Dmitry V. Levin | fced7b0 | 2014-12-11 19:25:02 +0000 | [diff] [blame] | 1 | { REG_A_BASE, "a0" }, |
| 2 | { REG_A_BASE+1, "a1" }, |
| 3 | { REG_A_BASE+2, "a2" }, |
| 4 | { REG_A_BASE+3, "a3" }, |
| 5 | { REG_A_BASE+4, "a4" }, |
| 6 | { REG_A_BASE+5, "a5" }, |
| 7 | { REG_A_BASE+6, "a6" }, |
| 8 | { REG_A_BASE+7, "a7" }, |
| 9 | { REG_A_BASE+8, "a8" }, |
| 10 | { REG_A_BASE+9, "a9" }, |
| 11 | { REG_A_BASE+10, "a10" }, |
| 12 | { REG_A_BASE+11, "a11" }, |
| 13 | { REG_A_BASE+12, "a12" }, |
| 14 | { REG_A_BASE+13, "a13" }, |
| 15 | { REG_A_BASE+14, "a14" }, |
| 16 | { REG_A_BASE+15, "a15" }, |
| 17 | { REG_PC, "pc" }, |
| 18 | { SYSCALL_NR, "syscall_nr" }, |
| 19 | { REG_AR_BASE, "ar0" }, |
| 20 | { REG_AR_BASE+1, "ar1" }, |
| 21 | { REG_AR_BASE+2, "ar2" }, |
| 22 | { REG_AR_BASE+3, "ar3" }, |
| 23 | { REG_AR_BASE+4, "ar4" }, |
| 24 | { REG_AR_BASE+5, "ar5" }, |
| 25 | { REG_AR_BASE+6, "ar6" }, |
| 26 | { REG_AR_BASE+7, "ar7" }, |
| 27 | { REG_AR_BASE+8, "ar8" }, |
| 28 | { REG_AR_BASE+9, "ar9" }, |
| 29 | { REG_AR_BASE+10, "ar10" }, |
| 30 | { REG_AR_BASE+11, "ar11" }, |
| 31 | { REG_AR_BASE+12, "ar12" }, |
| 32 | { REG_AR_BASE+13, "ar13" }, |
| 33 | { REG_AR_BASE+14, "ar14" }, |
| 34 | { REG_AR_BASE+15, "ar15" }, |
| 35 | { REG_AR_BASE+16, "ar16" }, |
| 36 | { REG_AR_BASE+17, "ar17" }, |
| 37 | { REG_AR_BASE+18, "ar18" }, |
| 38 | { REG_AR_BASE+19, "ar19" }, |
| 39 | { REG_AR_BASE+20, "ar20" }, |
| 40 | { REG_AR_BASE+21, "ar21" }, |
| 41 | { REG_AR_BASE+22, "ar22" }, |
| 42 | { REG_AR_BASE+23, "ar23" }, |
| 43 | { REG_AR_BASE+24, "ar24" }, |
| 44 | { REG_AR_BASE+25, "ar25" }, |
| 45 | { REG_AR_BASE+26, "ar26" }, |
| 46 | { REG_AR_BASE+27, "ar27" }, |
| 47 | { REG_AR_BASE+28, "ar28" }, |
| 48 | { REG_AR_BASE+29, "ar29" }, |
| 49 | { REG_AR_BASE+30, "ar30" }, |
| 50 | { REG_AR_BASE+31, "ar31" }, |
| 51 | { REG_AR_BASE+32, "ar32" }, |
| 52 | { REG_AR_BASE+33, "ar33" }, |
| 53 | { REG_AR_BASE+34, "ar34" }, |
| 54 | { REG_AR_BASE+35, "ar35" }, |
| 55 | { REG_AR_BASE+36, "ar36" }, |
| 56 | { REG_AR_BASE+37, "ar37" }, |
| 57 | { REG_AR_BASE+38, "ar38" }, |
| 58 | { REG_AR_BASE+39, "ar39" }, |
| 59 | { REG_AR_BASE+40, "ar40" }, |
| 60 | { REG_AR_BASE+41, "ar41" }, |
| 61 | { REG_AR_BASE+42, "ar42" }, |
| 62 | { REG_AR_BASE+43, "ar43" }, |
| 63 | { REG_AR_BASE+44, "ar44" }, |
| 64 | { REG_AR_BASE+45, "ar45" }, |
| 65 | { REG_AR_BASE+46, "ar46" }, |
| 66 | { REG_AR_BASE+47, "ar47" }, |
| 67 | { REG_AR_BASE+48, "ar48" }, |
| 68 | { REG_AR_BASE+49, "ar49" }, |
| 69 | { REG_AR_BASE+50, "ar50" }, |
| 70 | { REG_AR_BASE+51, "ar51" }, |
| 71 | { REG_AR_BASE+52, "ar52" }, |
| 72 | { REG_AR_BASE+53, "ar53" }, |
| 73 | { REG_AR_BASE+54, "ar54" }, |
| 74 | { REG_AR_BASE+55, "ar55" }, |
| 75 | { REG_AR_BASE+56, "ar56" }, |
| 76 | { REG_AR_BASE+57, "ar57" }, |
| 77 | { REG_AR_BASE+58, "ar58" }, |
| 78 | { REG_AR_BASE+59, "ar59" }, |
| 79 | { REG_AR_BASE+60, "ar60" }, |
| 80 | { REG_AR_BASE+61, "ar61" }, |
| 81 | { REG_AR_BASE+62, "ar62" }, |
| 82 | { REG_AR_BASE+63, "ar63" }, |
| 83 | { REG_LBEG, "lbeg" }, |
| 84 | { REG_LEND, "lend" }, |
| 85 | { REG_LCOUNT, "lcount" }, |
| 86 | { REG_SAR, "sar" }, |
| 87 | { REG_WB, "wb" }, |
| 88 | { REG_WS, "ws" }, |
| 89 | { REG_PS, "ps" }, |