Subzero: Make -reg-use and -reg-exclude specific to register class.
The main feature here is that when listing a register via the -reg-use or -reg-exclude option, we can limit the effect to a single register class, instead of applying it across all register classes. Example:
pnacl-sz -reg-use i32:eax,i32:ecx,i32:edx -reg-exclude f32:xmm0
Note that without the register class prefix, behavior is the same as before, specifically that the restriction applies to all register classes.
This requires a few high-level changes:
1. We need a mechanism to name *all* register classes, not just the standard ones that map to IceType values.
2. While we're at it, give standard types a more usable name, e.g. "v4i32" instead of "<4 x i32>".
3. Since we've commandeered ":" as the class/register token separator, we change ARM i64 register pair names from e.g. "r0:r1" to "r0r1".
The motivation is that for register allocator torture testing, we'd like to drastically restrict the registers available to e.g. the extensively-used i32 register class, while not overly restricting the seldom-used i32to8 register class (which reflects the set of i32 registers that may trivially truncate to i8).
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/1614273002 .
diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp
index 248c073..3cbf03e 100644
--- a/src/IceTargetLoweringMIPS32.cpp
+++ b/src/IceTargetLoweringMIPS32.cpp
@@ -60,6 +60,17 @@
// The maximum number of arguments to pass in GPR registers.
constexpr uint32_t MIPS32_MAX_GPR_ARG = 4;
+IceString getRegClassName(RegClass C) {
+ auto ClassNum = static_cast<RegClassMIPS32>(C);
+ assert(ClassNum < RCMIPS32_NUM);
+ switch (ClassNum) {
+ default:
+ assert(C < RC_Target);
+ return regClassString(C);
+ // Add handling of new register classes below.
+ }
+}
+
} // end of anonymous namespace
TargetMIPS32::TargetMIPS32(Cfg *Func) : TargetLowering(Func) {}
@@ -106,9 +117,8 @@
TypeToRegisterSet[IceType_v4f32] = VectorRegisters;
filterTypeToRegisterSet(Ctx, RegMIPS32::Reg_NUM, TypeToRegisterSet,
- RCMIPS32_NUM, [](int32_t RegNum) -> IceString {
- return RegMIPS32::getRegName(RegNum);
- });
+ llvm::array_lengthof(TypeToRegisterSet),
+ RegMIPS32::getRegName, getRegClassName);
}
void TargetMIPS32::translateO2() {
@@ -1115,7 +1125,7 @@
<< "nomips16\n";
}
-llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM];
+llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
} // end of namespace MIPS32