Subzero: Cleanly implement register allocation after phi lowering.
After finding a valid linearization of phi assignments, the old approach calls a complicated target-specific method that lowers and ad-hoc register allocates the phi assignments.
In the new approach, we use existing target lowering to lower assignments into mov/whatever instructions, and enhance the register allocator to be able to forcibly spill and reload a register if one is needed but none are available.
The new approach incrementally updates liveness and live ranges for newly added nodes and variable uses, to avoid having to expensively recompute it all.
Advanced phi lowering is enabled now on ARM, and constant blinding no longer needs to be disabled during phi lowering.
Some of the metadata regarding which CfgNode a local variable belongs to, needed to be made non-const, in order to add spill/fill instructions to a CfgNode during register allocation.
Most of the testing came from spec2k. There are some minor differences in the output regarding stack frame offsets, probably related to the order that new nodes are phi-lowered. The changes related to constant blinding were tested by running spec with "-randomize-pool-immediates=randomize -randomize-pool-threshold=8".
Unfortunately, this appears to add about 10% to the translation time for 176.gcc. The cost is clear in the -timing output so it can be investigated later. There is a TODO suggesting the possible cause and solution, for later investigation.
BUG= none
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/1253833002.
diff --git a/src/IceTargetLowering.h b/src/IceTargetLowering.h
index e87bf93..018a555 100644
--- a/src/IceTargetLowering.h
+++ b/src/IceTargetLowering.h
@@ -63,6 +63,8 @@
Inst *getLastInserted() const;
void advanceCur() { Cur = Next; }
void advanceNext() { advanceForward(Next); }
+ void setCur(InstList::iterator C) { Cur = C; }
+ void setNext(InstList::iterator N) { Next = N; }
void rewind();
void setInsertPoint(const InstList::iterator &Position) { Next = Position; }
@@ -136,16 +138,15 @@
void doNopInsertion();
/// Lowers a single non-Phi instruction.
void lower();
+ /// Inserts and lowers a single high-level instruction at a specific insertion
+ /// point.
+ void lowerInst(CfgNode *Node, InstList::iterator Next, InstHighLevel *Instr);
/// Does preliminary lowering of the set of Phi instructions in the
/// current node. The main intention is to do what's needed to keep
/// the unlowered Phi instructions consistent with the lowered
/// non-Phi instructions, e.g. to lower 64-bit operands on a 32-bit
/// target.
virtual void prelowerPhis() {}
- /// Lowers a list of "parallel" assignment instructions representing
- /// a topological sort of the Phi instructions.
- virtual void lowerPhiAssignments(CfgNode *Node,
- const AssignList &Assignments) = 0;
/// Tries to do branch optimization on a single instruction. Returns
/// true if some optimization was done.
virtual bool doBranchOpt(Inst * /*I*/, const CfgNode * /*NextNode*/) {