Subzero, MIPS32: Instruction NOR, pseudoinstruction NOT
These two are prerequisites for some intrinsic calls and
bitwise operations.
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/2356293002 .
Patch from Srdjan Obucina <Srdjan.Obucina@imgtec.com>.
diff --git a/src/IceAssemblerMIPS32.cpp b/src/IceAssemblerMIPS32.cpp
index 6e8731c..633e4e7 100644
--- a/src/IceAssemblerMIPS32.cpp
+++ b/src/IceAssemblerMIPS32.cpp
@@ -670,6 +670,12 @@
emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "mul.s");
}
+void AssemblerMIPS32::nor(const Operand *OpRd, const Operand *OpRs,
+ const Operand *OpRt) {
+ static constexpr IValueT Opcode = 0x00000027;
+ emitRdRsRt(Opcode, OpRd, OpRs, OpRt, "nor");
+}
+
void AssemblerMIPS32::or_(const Operand *OpRd, const Operand *OpRs,
const Operand *OpRt) {
static constexpr IValueT Opcode = 0x00000025;