Will Arthur | 54e04e4 | 2015-07-15 11:29:25 -0400 | [diff] [blame] | 1 | //**********************************************************************; |
Philip Tricca | 75c5ef8 | 2016-09-29 10:07:28 -0700 | [diff] [blame] | 2 | // Copyright (c) 2015, 2016 Intel Corporation |
Will Arthur | 54e04e4 | 2015-07-15 11:29:25 -0400 | [diff] [blame] | 3 | // All rights reserved. |
Philip Tricca | 1ea84a5 | 2015-11-19 18:07:06 -0800 | [diff] [blame] | 4 | // |
| 5 | // Redistribution and use in source and binary forms, with or without |
Will Arthur | 54e04e4 | 2015-07-15 11:29:25 -0400 | [diff] [blame] | 6 | // modification, are permitted provided that the following conditions are met: |
Philip Tricca | 1ea84a5 | 2015-11-19 18:07:06 -0800 | [diff] [blame] | 7 | // |
| 8 | // 1. Redistributions of source code must retain the above copyright notice, |
Will Arthur | 54e04e4 | 2015-07-15 11:29:25 -0400 | [diff] [blame] | 9 | // this list of conditions and the following disclaimer. |
Philip Tricca | 1ea84a5 | 2015-11-19 18:07:06 -0800 | [diff] [blame] | 10 | // |
| 11 | // 2. Redistributions in binary form must reproduce the above copyright notice, |
| 12 | // this list of conditions and the following disclaimer in the documentation |
Will Arthur | 54e04e4 | 2015-07-15 11:29:25 -0400 | [diff] [blame] | 13 | // and/or other materials provided with the distribution. |
Philip Tricca | 1ea84a5 | 2015-11-19 18:07:06 -0800 | [diff] [blame] | 14 | // |
| 15 | // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 16 | // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 17 | // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 18 | // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 19 | // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 20 | // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 21 | // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 22 | // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 23 | // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 24 | // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
Will Arthur | 54e04e4 | 2015-07-15 11:29:25 -0400 | [diff] [blame] | 25 | // THE POSSIBILITY OF SUCH DAMAGE. |
| 26 | //**********************************************************************; |
| 27 | |
Philip Tricca | e03b846 | 2016-07-08 19:51:23 -0700 | [diff] [blame] | 28 | #include <sapi/tpm20.h> |
Philip Tricca | c3dedc2 | 2016-01-15 13:47:22 -0800 | [diff] [blame] | 29 | #include "sysapi_util.h" |
Will Arthur | 54e04e4 | 2015-07-15 11:29:25 -0400 | [diff] [blame] | 30 | |
| 31 | |
| 32 | TSS2_RC CheckOverflow( UINT8 *buffer, UINT32 bufferSize, UINT8 *nextData, UINT32 size ) |
| 33 | { |
| 34 | TSS2_RC rval = TSS2_RC_SUCCESS; |
| 35 | INT64 usedSize; |
| 36 | |
Erez Geva | 30ddbaa | 2016-05-25 09:33:56 +0200 | [diff] [blame] | 37 | usedSize = (INT64)(nextData - buffer) - 1 + size; |
Will Arthur | 54e04e4 | 2015-07-15 11:29:25 -0400 | [diff] [blame] | 38 | if( usedSize > (INT64)bufferSize ) |
| 39 | { |
wcarthur | bad1755 | 2015-12-01 10:13:04 -0500 | [diff] [blame] | 40 | rval = TSS2_SYS_RC_INSUFFICIENT_CONTEXT; |
Will Arthur | 54e04e4 | 2015-07-15 11:29:25 -0400 | [diff] [blame] | 41 | } |
| 42 | |
| 43 | return( rval ); |
| 44 | } |
Philip Tricca | 75c5ef8 | 2016-09-29 10:07:28 -0700 | [diff] [blame] | 45 | /** |
| 46 | * The buffer and nextData parameters track the front of the output command |
| 47 | * buffer and the next location where data is to be written in said buffer |
| 48 | * respectively. In the marshal_* functions depend on these two pointers |
| 49 | * being in a relatively sane order. Specifically neither should be NULL, |
| 50 | * and buffer must be less than nextData. |
| 51 | */ |
| 52 | TSS2_RC CheckDataPointers( UINT8 *buffer, UINT8 **nextData ) |
| 53 | { |
| 54 | if( buffer == NULL || nextData == NULL || *nextData == NULL \ |
| 55 | || *nextData < buffer ) |
| 56 | { |
| 57 | return TSS2_SYS_RC_BAD_REFERENCE; |
| 58 | } |
| 59 | |
| 60 | return TSS2_RC_SUCCESS; |
| 61 | } |