| commit | 21a257b9b3b29ddb1445fdafe12e05727080a198 | [log] [tgz] |
|---|---|---|
| author | Zhichun Hua <zhichun.hua@freescale.com> | Mon Jun 29 15:49:37 2015 +0800 |
| committer | York Sun <yorksun@freescale.com> | Mon Jul 20 11:44:40 2015 -0700 |
| tree | 87ea425ec314d57771e74a0200c5ad0684329541 | |
| parent | 25195600173e618b1cf693bcf38d48973e3a08fb [diff] |
armv8: Fix TCR macros for shareability attribute For ARMv8, outer shareable is 0b10, inner shareable is 0b11 at bit position [13:12] of TCR_ELx register. Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>