driver/ddr: Add 256 byte interleaving support

Freescale LayerScape SoCs support controller interleaving on 256 byte size.
This interleaving is mandoratory.

Signed-off-by: York Sun <yorksun@freescale.com>
diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h
index 16cccc7..2a36431 100644
--- a/include/fsl_ddr_sdram.h
+++ b/include/fsl_ddr_sdram.h
@@ -76,6 +76,7 @@
 #define FSL_DDR_PAGE_INTERLEAVING	0x1
 #define FSL_DDR_BANK_INTERLEAVING	0x2
 #define FSL_DDR_SUPERBANK_INTERLEAVING	0x3
+#define FSL_DDR_256B_INTERLEAVING	0x8
 #define FSL_DDR_3WAY_1KB_INTERLEAVING	0xA
 #define FSL_DDR_3WAY_4KB_INTERLEAVING	0xC
 #define FSL_DDR_3WAY_8KB_INTERLEAVING	0xD