| commit | 7f9f4347cf325c63a39fe30910f3fb211ae2cc15 | [log] [tgz] |
|---|---|---|
| author | Kumar Gala <galak@kernel.crashing.org> | Mon Jul 14 14:07:02 2008 -0500 |
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | Mon Jul 14 20:19:59 2008 -0500 |
| tree | fa1cf8a170572b65af737680b1000d0324099c60 | |
| parent | e5852787f0c3c442a276262f13d91ca450605ac0 [diff] |
85xx: Add some L1/L2 SPR register definitions Add new L1/L2 SPRs related to e500mc cache config and control. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>