* Patches by Yuli Barcohen, 13 Jul 2003:
- Correct flash and JFFS2 support for MPC8260ADS
- fix PVR values and clock generation for PowerQUICC II family
(8270/8275/8280)
* Patch by Bernhard Kuhn, 08 Jul 2003:
- add support for M68K targets
* Patch by Ken Chou, 3 Jul:
- Fix PCI config table for A3000
- Fix iobase for natsemi.c
(PCI_BASE_ADDRESS_0 is the IO base register for DP83815)
* Allow to enable "slow" POST routines by key press on power-on
* Fix temperature dependend switching of LCD backlight on LWMON
* Tweak output format for LWMON
diff --git a/doc/README.POST b/doc/README.POST
index 62346ad..3d88231 100644
--- a/doc/README.POST
+++ b/doc/README.POST
@@ -212,7 +212,7 @@
argument will be a pointer to the board info structure, while
the second will be a combination of bit flags specifying the
mode the test is running in (POST_POWERON, POST_NORMAL,
- POST_POWERFAIL, POST_MANUAL) and whether the last execution of
+ POST_SLOWTEST, POST_MANUAL) and whether the last execution of
the test caused system rebooting (POST_REBOOT). The routine will
return 0 on successful execution of the test, and 1 if the test
failed.
@@ -220,7 +220,7 @@
The lists of the POST tests that should be run at power-on/normal/
power-fail booting will be kept in the environment. Namely, the
following environment variables will be used: post_poweron,
-powet_normal, post_shutdown.
+powet_normal, post_slowtest.
2.1.2. Test results
@@ -253,7 +253,7 @@
"On-board peripherals test", "board", \
" This test performs full check-up of the " \
"on-board hardware.", \
- POST_RAM | POST_POWERFAIL, \
+ POST_RAM | POST_SLOWTEST, \
&board_post_test \
}