| commit | dda3b610eee9dcd433627202584ded417327dd51 | [log] [tgz] |
|---|---|---|
| author | York Sun <yorksun@freescale.com> | Mon Dec 08 15:30:55 2014 -0800 |
| committer | York Sun <yorksun@freescale.com> | Fri Jan 23 22:29:13 2015 -0600 |
| tree | de7d6037e6730f3fd9bc2baa086dd74f449d0fd6 | |
| parent | 37b608a52dcb13312a4f7ccea199cd6bac76d298 [diff] |
arm/ls1021a: Add workaround for DDR erratum A008378 Internal memory controller counters can reach a bad state after training in DDR4 mode if accumulated ECC or DBI mode is eanbled. Signed-off-by: York Sun <yorksun@freescale.com>