| commit | f775c09d00cc355a87cf4ba935eff86eacd0c961 | [log] [tgz] |
|---|---|---|
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | Fri Feb 05 13:21:07 2016 +0900 |
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | Sun Feb 14 17:07:46 2016 +0900 |
| tree | 03b12c19637a6bbc0f808e77a3806402db3f24b9 | |
| parent | c9552895a8055fed424d6817008fccd37dbfd01c [diff] |
ARM: uniphier: adjust DDR clock delay line for ProXstream2 It turned out that DDR channel 2 was not working on ProXstream2 Vodka board. Add the missing ACBLDR0 register setting to adjust the delay between the clock lines and the address/command lines. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>