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Scott Woode4c09502008-06-30 14:13:28 -05001/*
2 * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine
3 *
4 * (C) Copyright 2006-2008
5 * Stefan Roese, DENX Software Engineering, sr@denx.de.
6 *
7 * Copyright (c) 2008 Freescale Semiconductor, Inc.
8 * Author: Scott Wood <scottwood@freescale.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/io.h>
Scott Woode4c09502008-06-30 14:13:28 -050028#include <asm/fsl_lbc.h>
29#include <linux/mtd/nand.h>
30
31#define WINDOW_SIZE 8192
32
33static void nand_wait(void)
34{
Becky Brucef51cdaf2010-06-17 11:37:20 -050035 fsl_lbc_t *regs = LBC_BASE_ADDR;
Scott Woode4c09502008-06-30 14:13:28 -050036
37 for (;;) {
38 uint32_t status = in_be32(&regs->ltesr);
39
40 if (status == 1)
41 return;
42
43 if (status & 1) {
44 puts("read failed (ltesr)\n");
45 for (;;);
46 }
47 }
48}
49
50static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
51{
Becky Brucef51cdaf2010-06-17 11:37:20 -050052 fsl_lbc_t *regs = LBC_BASE_ADDR;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053 uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
Matthew McClintock62974542011-04-05 14:39:34 -050054 const int large = CONFIG_SYS_NAND_OR_PRELIM & OR_FCM_PGS;
55 const int block_shift = large ? 17 : 14;
56 const int block_size = 1 << block_shift;
57 const int page_size = large ? 2048 : 512;
58 const int bad_marker = large ? page_size + 0 : page_size + 5;
Scott Woode4c09502008-06-30 14:13:28 -050059 int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2;
60 int pos = 0;
61
62 if (offs & (block_size - 1)) {
63 puts("bad offset\n");
64 for (;;);
65 }
66
67 if (large) {
68 fmr |= FMR_ECCM;
Scott Wood7b8f6682012-08-08 15:03:33 +000069 __raw_writel((NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
70 (NAND_CMD_READSTART << FCR_CMD1_SHIFT),
71 &regs->fcr);
72 __raw_writel(
73 (FIR_OP_CW0 << FIR_OP0_SHIFT) |
74 (FIR_OP_CA << FIR_OP1_SHIFT) |
75 (FIR_OP_PA << FIR_OP2_SHIFT) |
76 (FIR_OP_CW1 << FIR_OP3_SHIFT) |
77 (FIR_OP_RBW << FIR_OP4_SHIFT),
78 &regs->fir);
Scott Woode4c09502008-06-30 14:13:28 -050079 } else {
Scott Wood7b8f6682012-08-08 15:03:33 +000080 __raw_writel(NAND_CMD_READ0 << FCR_CMD0_SHIFT, &regs->fcr);
81 __raw_writel(
82 (FIR_OP_CW0 << FIR_OP0_SHIFT) |
83 (FIR_OP_CA << FIR_OP1_SHIFT) |
84 (FIR_OP_PA << FIR_OP2_SHIFT) |
85 (FIR_OP_RBW << FIR_OP3_SHIFT),
86 &regs->fir);
Scott Woode4c09502008-06-30 14:13:28 -050087 }
88
Scott Wood7b8f6682012-08-08 15:03:33 +000089 __raw_writel(0, &regs->fbcr);
Scott Woode4c09502008-06-30 14:13:28 -050090
91 while (pos < uboot_size) {
92 int i = 0;
Scott Wood7b8f6682012-08-08 15:03:33 +000093 __raw_writel(offs >> block_shift, &regs->fbar);
Scott Woode4c09502008-06-30 14:13:28 -050094
95 do {
96 int j;
97 unsigned int page_offs = (offs & (block_size - 1)) << 1;
98
Scott Wood7b8f6682012-08-08 15:03:33 +000099 __raw_writel(~0, &regs->ltesr);
100 __raw_writel(0, &regs->lteatr);
101 __raw_writel(page_offs, &regs->fpar);
102 __raw_writel(fmr, &regs->fmr);
103 sync();
104 __raw_writel(0, &regs->lsor);
Scott Woode4c09502008-06-30 14:13:28 -0500105 nand_wait();
106
107 page_offs %= WINDOW_SIZE;
108
109 /*
110 * If either of the first two pages are marked bad,
111 * continue to the next block.
112 */
113 if (i++ < 2 && buf[page_offs + bad_marker] != 0xff) {
114 puts("skipping\n");
115 offs = (offs + block_size) & ~(block_size - 1);
116 pos &= ~(block_size - 1);
117 break;
118 }
119
120 for (j = 0; j < page_size; j++)
121 dst[pos + j] = buf[page_offs + j];
122
123 pos += page_size;
124 offs += page_size;
Mingkai Hu269610f2009-07-30 17:56:51 +0800125 } while ((offs & (block_size - 1)) && (pos < uboot_size));
Scott Woode4c09502008-06-30 14:13:28 -0500126 }
127}
128
129/*
130 * The main entry for NAND booting. It's necessary that SDRAM is already
131 * configured and available since this code loads the main U-Boot image
132 * from NAND into SDRAM and starts it from there.
133 */
134void nand_boot(void)
135{
136 __attribute__((noreturn)) void (*uboot)(void);
137
Scott Woode4c09502008-06-30 14:13:28 -0500138 /*
139 * Load U-Boot image from NAND into RAM
140 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141 nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
142 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
Scott Woode4c09502008-06-30 14:13:28 -0500143
144 /*
145 * Jump to U-Boot image
146 */
147 puts("transfering control\n");
Dave Liuc70564e2008-12-02 11:48:51 +0800148 /*
149 * Clean d-cache and invalidate i-cache, to
150 * make sure that no stale data is executed.
151 */
152 flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200153 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
Scott Woode4c09502008-06-30 14:13:28 -0500154 uboot();
155}