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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2002
3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006 */
7
8#include <fpga.h>
9
10#ifndef _XILINX_H_
11#define _XILINX_H_
12
wdenkc6097192002-11-03 00:24:07 +000013/* Xilinx types
14 *********************************************************************/
Wolfgang Denk53677ef2008-05-20 16:00:29 +020015typedef enum { /* typedef Xilinx_iface */
16 min_xilinx_iface_type, /* low range check value */
17 slave_serial, /* serial data and external clock */
18 master_serial, /* serial data w/ internal clock (not used) */
19 slave_parallel, /* parallel data w/ external latch */
20 jtag_mode, /* jtag/tap serial (not used ) */
21 master_selectmap, /* master SelectMap (virtex2) */
22 slave_selectmap, /* slave SelectMap (virtex2) */
Michal Simekd5dae852013-04-22 15:43:02 +020023 devcfg, /* devcfg interface (zynq) */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020024 max_xilinx_iface_type /* insert all new types before this */
25} Xilinx_iface; /* end, typedef Xilinx_iface */
wdenkc6097192002-11-03 00:24:07 +000026
Wolfgang Denk53677ef2008-05-20 16:00:29 +020027typedef enum { /* typedef Xilinx_Family */
28 min_xilinx_type, /* low range check value */
Michal Simekb625b9a2014-03-13 11:23:43 +010029 xilinx_spartan2, /* Spartan-II Family */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020030 Xilinx_VirtexE, /* Virtex-E Family */
31 Xilinx_Virtex2, /* Virtex2 Family */
Michal Simek2a6e3862014-03-13 11:28:42 +010032 xilinx_spartan3, /* Spartan-III Family */
Michal Simekd5dae852013-04-22 15:43:02 +020033 xilinx_zynq, /* Zynq Family */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020034 max_xilinx_type /* insert all new types before this */
35} Xilinx_Family; /* end, typedef Xilinx_Family */
wdenkc6097192002-11-03 00:24:07 +000036
Wolfgang Denk53677ef2008-05-20 16:00:29 +020037typedef struct { /* typedef Xilinx_desc */
38 Xilinx_Family family; /* part type */
39 Xilinx_iface iface; /* interface type */
40 size_t size; /* bytes of data part can accept */
41 void *iface_fns; /* interface function table */
42 int cookie; /* implementation specific cookie */
Michal Simek6631db42013-04-26 15:04:48 +020043 char *name; /* device name in bitstream */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020044} Xilinx_desc; /* end, typedef Xilinx_desc */
wdenkc6097192002-11-03 00:24:07 +000045
46/* Generic Xilinx Functions
47 *********************************************************************/
Wolfgang Denke6a857d2011-07-30 13:33:49 +000048extern int xilinx_load(Xilinx_desc *desc, const void *image, size_t size);
49extern int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
50extern int xilinx_info(Xilinx_desc *desc);
wdenkc6097192002-11-03 00:24:07 +000051
52/* Board specific implementation specific function types
53 *********************************************************************/
54typedef int (*Xilinx_pgm_fn)( int assert_pgm, int flush, int cookie );
55typedef int (*Xilinx_init_fn)( int cookie );
56typedef int (*Xilinx_err_fn)( int cookie );
57typedef int (*Xilinx_done_fn)( int cookie );
58typedef int (*Xilinx_clk_fn)( int assert_clk, int flush, int cookie );
59typedef int (*Xilinx_cs_fn)( int assert_cs, int flush, int cookie );
60typedef int (*Xilinx_wr_fn)( int assert_write, int flush, int cookie );
61typedef int (*Xilinx_rdata_fn)( unsigned char *data, int cookie );
62typedef int (*Xilinx_wdata_fn)( unsigned char data, int flush, int cookie );
63typedef int (*Xilinx_busy_fn)( int cookie );
64typedef int (*Xilinx_abort_fn)( int cookie );
65typedef int (*Xilinx_pre_fn)( int cookie );
66typedef int (*Xilinx_post_fn)( int cookie );
Wolfgang Wegner89083342009-10-30 16:55:02 +010067typedef int (*Xilinx_bwr_fn)( void *buf, size_t len, int flush, int cookie );
wdenkc6097192002-11-03 00:24:07 +000068
69#endif /* _XILINX_H_ */