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Bo Shen927b9012014-11-10 15:24:02 +08001/*
2 * Configuration settings for the SAMA5D4EK board.
3 *
4 * Copyright (C) 2014 Atmel
5 * Bo Shen <voice.shen@atmel.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
Wu, Joshb2d387b2015-03-30 14:51:19 +080013/* No NOR flash, this definition should put before common header */
14#define CONFIG_SYS_NO_FLASH
Bo Shen927b9012014-11-10 15:24:02 +080015
Wu, Joshb2d387b2015-03-30 14:51:19 +080016#include "at91-sama5_common.h"
Bo Shen927b9012014-11-10 15:24:02 +080017
18/* serial console */
19#define CONFIG_ATMEL_USART
20#define CONFIG_USART_BASE ATMEL_BASE_USART3
21#define CONFIG_USART_ID ATMEL_ID_USART3
22
Bo Shen927b9012014-11-10 15:24:02 +080023/* SDRAM */
24#define CONFIG_NR_DRAM_BANKS 1
25#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
26#define CONFIG_SYS_SDRAM_SIZE 0x20000000
27
Bo Shen5a4c9c22014-12-15 13:24:38 +080028#ifdef CONFIG_SPL_BUILD
29#define CONFIG_SYS_INIT_SP_ADDR 0x210000
30#else
Bo Shen927b9012014-11-10 15:24:02 +080031#define CONFIG_SYS_INIT_SP_ADDR \
32 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
Bo Shen5a4c9c22014-12-15 13:24:38 +080033#endif
Bo Shen927b9012014-11-10 15:24:02 +080034
35#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
36
37/* SerialFlash */
Bo Shen927b9012014-11-10 15:24:02 +080038
39#ifdef CONFIG_CMD_SF
40#define CONFIG_ATMEL_SPI
41#define CONFIG_ATMEL_SPI0
Bo Shen927b9012014-11-10 15:24:02 +080042#define CONFIG_SF_DEFAULT_BUS 0
43#define CONFIG_SF_DEFAULT_CS 0
44#define CONFIG_SF_DEFAULT_SPEED 30000000
45#endif
46
47/* NAND flash */
48#define CONFIG_CMD_NAND
49
50#ifdef CONFIG_CMD_NAND
51#define CONFIG_NAND_ATMEL
52#define CONFIG_SYS_MAX_NAND_DEVICE 1
53#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
54/* our ALE is AD21 */
55#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
56/* our CLE is AD22 */
57#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
58#define CONFIG_SYS_NAND_ONFI_DETECTION
59/* PMECC & PMERRLOC */
60#define CONFIG_ATMEL_NAND_HWECC
61#define CONFIG_ATMEL_NAND_HW_PMECC
62#endif
63
64/* MMC */
Bo Shen927b9012014-11-10 15:24:02 +080065
66#ifdef CONFIG_CMD_MMC
67#define CONFIG_MMC
68#define CONFIG_GENERIC_MMC
69#define CONFIG_GENERIC_ATMEL_MCI
70#define ATMEL_BASE_MMCI ATMEL_BASE_MCI1
71#endif
72
73/* USB */
Bo Shen927b9012014-11-10 15:24:02 +080074
75#ifdef CONFIG_CMD_USB
76#define CONFIG_USB_EHCI
77#define CONFIG_USB_EHCI_ATMEL
78#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
Bo Shen927b9012014-11-10 15:24:02 +080079#endif
80
Bo Shencd5ca302014-12-03 18:02:21 +080081/* USB device */
Bo Shencd5ca302014-12-03 18:02:21 +080082#define CONFIG_USB_ETHER
83#define CONFIG_USB_ETH_RNDIS
84#define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D4EK"
85
Bo Shen927b9012014-11-10 15:24:02 +080086#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
Bo Shen927b9012014-11-10 15:24:02 +080087#define CONFIG_DOS_PARTITION
88#endif
89
90/* Ethernet Hardware */
91#define CONFIG_MACB
92#define CONFIG_RMII
93#define CONFIG_NET_RETRY_COUNT 20
94#define CONFIG_MACB_SEARCH_PHY
95
96/* LCD */
Bo Shen927b9012014-11-10 15:24:02 +080097#define LCD_BPP LCD_COLOR16
98#define LCD_OUTPUT_BPP 18
99#define CONFIG_LCD_LOGO
100#define CONFIG_LCD_INFO
101#define CONFIG_LCD_INFO_BELOW_LOGO
102#define CONFIG_SYS_WHITE_ON_BLACK
103#define CONFIG_ATMEL_HLCD
104#define CONFIG_ATMEL_LCD_RGB565
Bo Shen927b9012014-11-10 15:24:02 +0800105
106#ifdef CONFIG_SYS_USE_SERIALFLASH
Wu, Josh7a53b952015-08-19 19:11:21 +0800107/* override the bootcmd, bootargs and other configuration for spi flash env*/
Bo Shen927b9012014-11-10 15:24:02 +0800108#elif CONFIG_SYS_USE_NANDFLASH
Wu, Joshdc018fe2015-08-19 19:11:20 +0800109/* override the bootcmd, bootargs and other configuration for nandflash env*/
Bo Shen927b9012014-11-10 15:24:02 +0800110#elif CONFIG_SYS_USE_MMC
Wu, Josh372ca032015-08-19 19:11:18 +0800111/* override the bootcmd, bootargs and other configuration for sd/mmc env */
Bo Shen927b9012014-11-10 15:24:02 +0800112#endif
113
Bo Shen5a4c9c22014-12-15 13:24:38 +0800114/* SPL */
115#define CONFIG_SPL_FRAMEWORK
116#define CONFIG_SPL_TEXT_BASE 0x200000
117#define CONFIG_SPL_MAX_SIZE 0x10000
118#define CONFIG_SPL_BSS_START_ADDR 0x20000000
119#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
120#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
121#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
122
Bo Shen5a4c9c22014-12-15 13:24:38 +0800123#define CONFIG_SPL_BOARD_INIT
124#define CONFIG_SYS_MONITOR_LEN (512 << 10)
125
126#ifdef CONFIG_SYS_USE_MMC
Bo Shen993ea972015-03-04 13:32:57 +0800127#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
Bo Shen5a4c9c22014-12-15 13:24:38 +0800128#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
Bo Shen5a4c9c22014-12-15 13:24:38 +0800129#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
130#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shen5a4c9c22014-12-15 13:24:38 +0800131
132#elif CONFIG_SYS_USE_NANDFLASH
Bo Shen5a4c9c22014-12-15 13:24:38 +0800133#define CONFIG_SPL_NAND_DRIVERS
134#define CONFIG_SPL_NAND_BASE
135#define CONFIG_PMECC_CAP 8
136#define CONFIG_PMECC_SECTOR_SIZE 512
137#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
138#define CONFIG_SYS_NAND_5_ADDR_CYCLE
139#define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
140#define CONFIG_SYS_NAND_PAGE_COUNT 64
141#define CONFIG_SYS_NAND_OOBSIZE 224
142#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000
143#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
144#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
145
146#elif CONFIG_SYS_USE_SERIALFLASH
Bo Shen5a4c9c22014-12-15 13:24:38 +0800147#define CONFIG_SPL_SPI_LOAD
Wu, Josh7a53b952015-08-19 19:11:21 +0800148#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
Bo Shen5a4c9c22014-12-15 13:24:38 +0800149
150#endif
Bo Shen927b9012014-11-10 15:24:02 +0800151#endif