| Masahiro Yamada | 252ed87 | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 1 | CONFIG_ARM=y |
| Masahiro Yamada | 5ca269a | 2015-03-16 16:43:24 +0900 | [diff] [blame] | 2 | CONFIG_ARCH_ZYNQ=y |
| Michal Simek | 6ebf8a4 | 2016-12-16 11:57:17 +0100 | [diff] [blame] | 3 | CONFIG_SYS_TEXT_BASE=0x4000000 |
| Michal Simek | 0732d7c | 2017-12-13 10:35:06 +0100 | [diff] [blame] | 4 | CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM010" |
| Michal Simek | 52b36fd | 2017-12-01 13:50:33 +0100 | [diff] [blame] | 5 | CONFIG_SPL_STACK_R_ADDR=0x200000 |
| Masahiro Yamada | f1ef2b6 | 2014-09-22 19:59:06 +0900 | [diff] [blame] | 6 | CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010" |
| Michal Simek | 4c82ab9 | 2017-11-02 10:40:57 +0100 | [diff] [blame] | 7 | CONFIG_DEBUG_UART=y |
| Michal Simek | a587051 | 2018-01-09 19:31:16 +0100 | [diff] [blame] | 8 | CONFIG_DISTRO_DEFAULTS=y |
| Ruchika Gupta | 11a9662 | 2015-01-23 16:01:53 +0530 | [diff] [blame] | 9 | CONFIG_FIT=y |
| Ruchika Gupta | 11a9662 | 2015-01-23 16:01:53 +0530 | [diff] [blame] | 10 | CONFIG_FIT_SIGNATURE=y |
| Jagan Teki | 3788b45 | 2017-01-21 11:48:33 +0100 | [diff] [blame] | 11 | CONFIG_FIT_VERBOSE=y |
| Michal Simek | 83144cd | 2018-01-09 17:41:37 +0100 | [diff] [blame] | 12 | CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd" |
| Lokesh Vutla | 19a9747 | 2016-10-08 14:41:44 -0400 | [diff] [blame] | 13 | # CONFIG_DISPLAY_CPUINFO is not set |
| Simon Glass | c2ae7d8 | 2016-09-12 23:18:22 -0600 | [diff] [blame] | 14 | CONFIG_SPL=y |
| Michal Simek | 52b36fd | 2017-12-01 13:50:33 +0100 | [diff] [blame] | 15 | CONFIG_SPL_STACK_R=y |
| Heiko Schocher | c20ae2f | 2016-10-06 07:55:15 +0200 | [diff] [blame] | 16 | CONFIG_SPL_OS_BOOT=y |
| Siva Durga Prasad Paladugu | c5ca2db | 2016-01-11 12:01:10 +0530 | [diff] [blame] | 17 | CONFIG_SYS_PROMPT="Zynq> " |
| Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 18 | # CONFIG_CMD_FLASH is not set |
| Simon Glass | fe7604a | 2017-05-17 03:25:21 -0600 | [diff] [blame] | 19 | CONFIG_CMD_FPGA_LOADBP=y |
| 20 | CONFIG_CMD_FPGA_LOADFS=y | ||||
| 21 | CONFIG_CMD_FPGA_LOADMK=y | ||||
| 22 | CONFIG_CMD_FPGA_LOADP=y | ||||
| Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 23 | CONFIG_CMD_GPIO=y |
| Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 24 | CONFIG_CMD_MMC=y |
| 25 | CONFIG_CMD_SF=y | ||||
| Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 26 | # CONFIG_CMD_SETEXPR is not set |
| Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 27 | CONFIG_CMD_TFTPPUT=y |
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 28 | CONFIG_CMD_CACHE=y |
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 29 | CONFIG_CMD_EXT4_WRITE=y |
| Tom Rini | 5dc4dfd | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 30 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| Masahiro Yamada | 739968f | 2015-07-17 20:26:06 +0900 | [diff] [blame] | 31 | CONFIG_NET_RANDOM_ETHADDR=y |
| Nathan Rossi | 5c9b1d7 | 2016-01-08 03:00:46 +1000 | [diff] [blame] | 32 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| Michal Simek | 7fad612 | 2017-11-03 15:53:56 +0100 | [diff] [blame] | 33 | CONFIG_FPGA_XILINX=y |
| Michal Simek | 93561a3 | 2018-01-09 15:27:31 +0100 | [diff] [blame] | 34 | CONFIG_DM_GPIO=y |
| Masahiro Yamada | e1ce61f | 2016-12-07 22:10:28 +0900 | [diff] [blame] | 35 | CONFIG_MMC_SDHCI=y |
| Michal Simek | 2e0583b | 2017-02-10 13:57:35 +0100 | [diff] [blame] | 36 | CONFIG_MMC_SDHCI_ZYNQ=y |
| Joe Hershberger | c9bb942 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 37 | CONFIG_SPI_FLASH=y |
| Michal Simek | dce7e11 | 2016-01-12 13:44:29 +0100 | [diff] [blame] | 38 | CONFIG_SPI_FLASH_BAR=y |
| Michal Simek | b2ff7fb | 2017-11-02 10:44:48 +0100 | [diff] [blame] | 39 | CONFIG_SPI_FLASH_MACRONIX=y |
| Bin Meng | 68d5342 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 40 | CONFIG_SPI_FLASH_SPANSION=y |
| 41 | CONFIG_SPI_FLASH_STMICRO=y | ||||
| 42 | CONFIG_SPI_FLASH_SST=y | ||||
| 43 | CONFIG_SPI_FLASH_WINBOND=y | ||||
| Vipul Kumar | 77217c4 | 2018-01-24 10:51:30 +0530 | [diff] [blame] | 44 | CONFIG_PHY_MARVELL=y |
| 45 | CONFIG_PHY_REALTEK=y | ||||
| 46 | CONFIG_PHY_XILINX=y | ||||
| Michal Simek | 596e578 | 2015-11-30 14:34:52 +0100 | [diff] [blame] | 47 | CONFIG_ZYNQ_GEM=y |
| Michal Simek | 4c82ab9 | 2017-11-02 10:40:57 +0100 | [diff] [blame] | 48 | CONFIG_DEBUG_UART_ZYNQ=y |
| 49 | CONFIG_DEBUG_UART_BASE=0xe0001000 | ||||
| 50 | CONFIG_DEBUG_UART_CLOCK=50000000 | ||||
| Michal Simek | 809704e | 2017-11-06 09:16:05 +0100 | [diff] [blame] | 51 | CONFIG_ZYNQ_SERIAL=y |
| Bin Meng | e5d5d44 | 2015-11-25 05:34:53 -0800 | [diff] [blame] | 52 | CONFIG_ZYNQ_SPI=y |
| Jagan Teki | 38a4167 | 2015-08-31 17:38:40 +0530 | [diff] [blame] | 53 | CONFIG_ZYNQ_QSPI=y |