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Michal Simek76316a32007-03-11 13:42:58 +01001/*
Michal Simek188dc162008-03-28 11:53:02 +01002 * (C) Copyright 2007-2008 Michal Simek
Michal Simek76316a32007-03-11 13:42:58 +01003 *
Michal Simekcb1bc632007-09-24 00:30:42 +02004 * Michal SIMEK <monstr@monstr.eu>
Michal Simek76316a32007-03-11 13:42:58 +01005 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
28#include "../board/xilinx/ml401/xparameters.h"
29
30#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
Michal Simek1a50f1642007-05-08 14:52:52 +020031#define MICROBLAZE_V5 1
Michal Simek76316a32007-03-11 13:42:58 +010032#define CONFIG_ML401 1 /* ML401 Board */
33
34/* uart */
Michal Simekaf7ae1a2008-03-28 12:13:03 +010035#ifdef XILINX_UARTLITE_BASEADDR
Michal Simek853643d2007-09-24 00:41:30 +020036#define CONFIG_XILINX_UARTLITE
Michal Simekaf7ae1a2008-03-28 12:13:03 +010037#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
38#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
Michal Simekaf7ae1a2008-03-28 12:13:03 +010040#else
41#ifdef XILINX_UART16550_BASEADDR
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020042#define CONFIG_SYS_NS16550
43#define CONFIG_SYS_NS16550_SERIAL
44#define CONFIG_SYS_NS16550_REG_SIZE 4
Michal Simekaf7ae1a2008-03-28 12:13:03 +010045#define CONFIG_CONS_INDEX 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020046#define CONFIG_SYS_NS16550_COM1 XILINX_UART16550_BASEADDR
47#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
Michal Simekaf7ae1a2008-03-28 12:13:03 +010048#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 }
Michal Simekaf7ae1a2008-03-28 12:13:03 +010050#endif
51#endif
Michal Simek76316a32007-03-11 13:42:58 +010052
53/* setting reset address */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020054/*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/
Michal Simek76316a32007-03-11 13:42:58 +010055
Michal Simek17980492007-03-26 01:39:07 +020056/* ethernet */
Michal Simeke5845e22008-03-28 11:04:01 +010057#ifdef XILINX_EMAC_BASEADDR
58#define CONFIG_XILINX_EMAC 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020059#define CONFIG_SYS_ENET
Michal Simeke5845e22008-03-28 11:04:01 +010060#else
61#ifdef XILINX_EMACLITE_BASEADDR
62#define CONFIG_XILINX_EMACLITE 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063#define CONFIG_SYS_ENET
Michal Simeke5845e22008-03-28 11:04:01 +010064#endif
65#endif
66#undef ET_DEBUG
Michal Simek17980492007-03-26 01:39:07 +020067
Michal Simek76316a32007-03-11 13:42:58 +010068/* gpio */
Michal Simek4c6a6f02008-03-28 11:22:48 +010069#ifdef XILINX_GPIO_BASEADDR
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020070#define CONFIG_SYS_GPIO_0 1
71#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
Michal Simek4c6a6f02008-03-28 11:22:48 +010072#endif
Michal Simek76316a32007-03-11 13:42:58 +010073
74/* interrupt controller */
Michal Simek4d49b282008-05-04 15:42:41 +020075#ifdef XILINX_INTC_BASEADDR
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076#define CONFIG_SYS_INTC_0 1
77#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
78#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
Michal Simek4d49b282008-05-04 15:42:41 +020079#endif
Michal Simek76316a32007-03-11 13:42:58 +010080
81/* timer */
Michal Simek4d49b282008-05-04 15:42:41 +020082#ifdef XILINX_TIMER_BASEADDR
83#if (XILINX_TIMER_IRQ != -1)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020084#define CONFIG_SYS_TIMER_0 1
85#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
86#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
Michal Simek17980492007-03-26 01:39:07 +020087#define FREQUENCE XILINX_CLOCK_FREQ
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020088#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
Michal Simek4d49b282008-05-04 15:42:41 +020089#endif
90#else
91#ifdef XILINX_CLOCK_FREQ
Michal Simek853643d2007-09-24 00:41:30 +020092#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
Michal Simek4d49b282008-05-04 15:42:41 +020093#else
94#error BAD CLOCK FREQ
95#endif
96#endif
Michal Simek19bf1fb2007-05-07 19:33:51 +020097/* FSL */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020098/* #define CONFIG_SYS_FSL_2 */
Michal Simek188dc162008-03-28 11:53:02 +010099/* #define FSL_INTR_2 1 */
Michal Simek19bf1fb2007-05-07 19:33:51 +0200100
Michal Simek76316a32007-03-11 13:42:58 +0100101/*
102 * memory layout - Example
103 * TEXT_BASE = 0x1200_0000;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200104 * CONFIG_SYS_SRAM_BASE = 0x1000_0000;
105 * CONFIG_SYS_SRAM_SIZE = 0x0400_0000;
Michal Simek76316a32007-03-11 13:42:58 +0100106 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200107 * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
108 * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000
109 * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000
Michal Simek76316a32007-03-11 13:42:58 +0100110 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111 * 0x1000_0000 CONFIG_SYS_SDRAM_BASE
Michal Simek76316a32007-03-11 13:42:58 +0100112 * FREE
113 * 0x1200_0000 TEXT_BASE
114 * U-BOOT code
115 * 0x1202_0000
116 * FREE
117 *
118 * STACK
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119 * 0x13F7_F000 CONFIG_SYS_MALLOC_BASE
Michal Simek17980492007-03-26 01:39:07 +0200120 * MALLOC_AREA 256kB Alloc
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200121 * 0x11FB_F000 CONFIG_SYS_MONITOR_BASE
Michal Simek17980492007-03-26 01:39:07 +0200122 * MONITOR_CODE 256kB Env
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200123 * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET
Michal Simek853643d2007-09-24 00:41:30 +0200124 * GLOBAL_DATA 4kB bd, gd
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200125 * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE
Michal Simek76316a32007-03-11 13:42:58 +0100126 */
127
128/* ddr sdram - main memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
130#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
131#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
132#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
Michal Simek76316a32007-03-11 13:42:58 +0100133
134/* global pointer */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200135#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */
Michal Simek32556442007-04-21 21:07:22 +0200136/* start of global data */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
Michal Simek76316a32007-03-11 13:42:58 +0100138
139/* monitor code */
140#define SIZE 0x40000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_MONITOR_LEN SIZE
142#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN)
143#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
144#define CONFIG_SYS_MALLOC_LEN SIZE
145#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
Michal Simek76316a32007-03-11 13:42:58 +0100146
147/* stack */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200148#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MONITOR_BASE
Michal Simek76316a32007-03-11 13:42:58 +0100149
150/*#define RAMENV */
151#define FLASH
152
153#ifdef FLASH
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154 #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
155 #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
156 #define CONFIG_SYS_FLASH_CFI 1
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200157 #define CONFIG_FLASH_CFI_DRIVER 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158 #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */
159 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
160 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
161 #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
Michal Simek76316a32007-03-11 13:42:58 +0100162
163 #ifdef RAMENV
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200164 #define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200165 #define CONFIG_ENV_SIZE 0x1000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
Michal Simek76316a32007-03-11 13:42:58 +0100167
168 #else /* !RAMENV */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200169 #define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200170 #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200172 #define CONFIG_ENV_SIZE 0x40000
Michal Simek76316a32007-03-11 13:42:58 +0100173 #endif /* !RAMBOOT */
174#else /* !FLASH */
175 /* ENV in RAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176 #define CONFIG_SYS_NO_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200177 #define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200178 #define CONFIG_ENV_SIZE 0x1000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
180 #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
Michal Simek76316a32007-03-11 13:42:58 +0100181#endif /* !FLASH */
182
Michal Simek853643d2007-09-24 00:41:30 +0200183/* system ace */
184#ifdef XILINX_SYSACE_BASEADDR
185 #define CONFIG_SYSTEMACE
186 /* #define DEBUG_SYSTEMACE */
187 #define SYSTEMACE_CONFIG_FPGA
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200188 #define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
189 #define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
Michal Simek853643d2007-09-24 00:41:30 +0200190 #define CONFIG_DOS_PARTITION
191#endif
192
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500193/*
Jon Loeliger079a1362007-07-10 10:12:10 -0500194 * BOOTP options
195 */
196#define CONFIG_BOOTP_BOOTFILESIZE
197#define CONFIG_BOOTP_BOOTPATH
198#define CONFIG_BOOTP_GATEWAY
199#define CONFIG_BOOTP_HOSTNAME
Michal Simek76316a32007-03-11 13:42:58 +0100200
Jon Loeliger079a1362007-07-10 10:12:10 -0500201/*
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500202 * Command line configuration.
203 */
204#include <config_cmd_default.h>
205
206#define CONFIG_CMD_ASKENV
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500207#define CONFIG_CMD_CACHE
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500208#define CONFIG_CMD_IRQ
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500209#define CONFIG_CMD_MFSL
Michal Simek4d49b282008-05-04 15:42:41 +0200210
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200211#ifndef CONFIG_SYS_ENET
Michal Simek4d49b282008-05-04 15:42:41 +0200212 #undef CONFIG_CMD_NET
213#else
214 #define CONFIG_CMD_PING
215#endif
Michal Simek853643d2007-09-24 00:41:30 +0200216
217#if defined(CONFIG_SYSTEMACE)
218 #define CONFIG_CMD_EXT2
219 #define CONFIG_CMD_FAT
220#endif
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500221
222#if defined(FLASH)
223 #define CONFIG_CMD_ECHO
224 #define CONFIG_CMD_FLASH
225 #define CONFIG_CMD_IMLS
226 #define CONFIG_CMD_JFFS2
227
228 #if !defined(RAMENV)
229 #define CONFIG_CMD_ENV
230 #define CONFIG_CMD_SAVES
Michal Simek76316a32007-03-11 13:42:58 +0100231 #endif
Michal Simek853643d2007-09-24 00:41:30 +0200232#else
233 #undef CONFIG_CMD_FLASH
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500234#endif
Michal Simek76316a32007-03-11 13:42:58 +0100235
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500236#if defined(CONFIG_CMD_JFFS2)
Michal Simek144876a2007-04-24 23:01:02 +0200237/* JFFS2 partitions */
238#define CONFIG_JFFS2_CMDLINE /* mtdparts command line support */
239#define MTDIDS_DEFAULT "nor0=ml401-0"
240
241/* default mtd partition table */
242#define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\
243 "256k(env),3m(kernel),1m(romfs),"\
244 "1m(cramfs),-(jffs2)"
245#endif
246
Michal Simek76316a32007-03-11 13:42:58 +0100247/* Miscellaneous configurable options */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200248#define CONFIG_SYS_PROMPT "U-Boot-mONStR> "
249#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */
250#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
251#define CONFIG_SYS_MAXARGS 15 /* max number of command args */
252#define CONFIG_SYS_LONGHELP
253#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */
Michal Simek76316a32007-03-11 13:42:58 +0100254
Michal Simek144876a2007-04-24 23:01:02 +0200255#define CONFIG_BOOTDELAY 30
Michal Simek76316a32007-03-11 13:42:58 +0100256#define CONFIG_BOOTARGS "root=romfs"
257#define CONFIG_HOSTNAME "ml401"
Michal Simek853643d2007-09-24 00:41:30 +0200258#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
Michal Simek76316a32007-03-11 13:42:58 +0100259#define CONFIG_IPADDR 192.168.0.3
Michal Simek853643d2007-09-24 00:41:30 +0200260#define CONFIG_SERVERIP 192.168.0.5
261#define CONFIG_GATEWAYIP 192.168.0.1
Michal Simek76316a32007-03-11 13:42:58 +0100262#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
263
264/* architecture dependent code */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200265#define CONFIG_SYS_USR_EXCEP /* user exception */
266#define CONFIG_SYS_HZ 1000
Michal Simek76316a32007-03-11 13:42:58 +0100267
Michal Simek144876a2007-04-24 23:01:02 +0200268#define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo"
269
270#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\
271 "nor0=ml401-0\0"\
272 "mtdparts=mtdparts=ml401-0:"\
273 "256k(u-boot),256k(env),3m(kernel),"\
274 "1m(romfs),1m(cramfs),-(jffs2)\0"
275
Michal Simek188dc162008-03-28 11:53:02 +0100276#define CONFIG_CMDLINE_EDITING
277#define CONFIG_OF_LIBFDT 1
278
Michal Simek76316a32007-03-11 13:42:58 +0100279#endif /* __CONFIG_H */