blob: cbdf06f812e4b5a73a3c474d1d15bcf4db59376a [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
16#include <environment.h>
17#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000018#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000019#if defined(CONFIG_CMD_IDE)
20#include <ide.h>
21#endif
22#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000023#include <initcall.h>
24#include <logbuff.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000025
26/* TODO: Can we move these into arch/ headers? */
27#ifdef CONFIG_8xx
28#include <mpc8xx.h>
29#endif
30#ifdef CONFIG_5xx
31#include <mpc5xx.h>
32#endif
33#ifdef CONFIG_MPC5xxx
34#include <mpc5xxx.h>
35#endif
36
Simon Glassa733b062013-04-26 02:53:43 +000037#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000038#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000039#include <spi.h>
Simon Glass71c52db2013-06-11 11:14:42 -070040#include <trace.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000041#include <watchdog.h>
Simon Glassa733b062013-04-26 02:53:43 +000042#include <asm/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000043#include <asm/io.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000044#ifdef CONFIG_MP
45#include <asm/mp.h>
46#endif
Simon Glass1938f4a2013-03-11 06:49:53 +000047#include <asm/sections.h>
Simon Glass48a33802013-03-05 14:39:52 +000048#ifdef CONFIG_X86
49#include <asm/init_helpers.h>
50#include <asm/relocate.h>
51#endif
Simon Glassa733b062013-04-26 02:53:43 +000052#ifdef CONFIG_SANDBOX
53#include <asm/state.h>
54#endif
Simon Glass1938f4a2013-03-11 06:49:53 +000055#include <linux/compiler.h>
56
57/*
58 * Pointer to initial global data area
59 *
60 * Here we initialize it if needed.
61 */
62#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
63#undef XTRN_DECLARE_GLOBAL_DATA_PTR
64#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
65DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
66#else
67DECLARE_GLOBAL_DATA_PTR;
68#endif
69
70/*
71 * sjg: IMO this code should be
72 * refactored to a single function, something like:
73 *
74 * void led_set_state(enum led_colour_t colour, int on);
75 */
76/************************************************************************
77 * Coloured LED functionality
78 ************************************************************************
79 * May be supplied by boards if desired
80 */
81inline void __coloured_LED_init(void) {}
82void coloured_LED_init(void)
83 __attribute__((weak, alias("__coloured_LED_init")));
84inline void __red_led_on(void) {}
85void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
86inline void __red_led_off(void) {}
87void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
88inline void __green_led_on(void) {}
89void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
90inline void __green_led_off(void) {}
91void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
92inline void __yellow_led_on(void) {}
93void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
94inline void __yellow_led_off(void) {}
95void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
96inline void __blue_led_on(void) {}
97void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
98inline void __blue_led_off(void) {}
99void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
100
101/*
102 * Why is gd allocated a register? Prior to reloc it might be better to
103 * just pass it around to each function in this file?
104 *
105 * After reloc one could argue that it is hardly used and doesn't need
106 * to be in a register. Or if it is it should perhaps hold pointers to all
107 * global data for all modules, so that post-reloc we can avoid the massive
108 * literal pool we get on ARM. Or perhaps just encourage each module to use
109 * a structure...
110 */
111
112/*
113 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
114 */
115
Simon Glasse4fef6c2013-03-11 14:30:42 +0000116#if defined(CONFIG_WATCHDOG)
117static int init_func_watchdog_init(void)
118{
119 puts(" Watchdog enabled\n");
120 WATCHDOG_RESET();
121
122 return 0;
123}
124
125int init_func_watchdog_reset(void)
126{
127 WATCHDOG_RESET();
128
129 return 0;
130}
131#endif /* CONFIG_WATCHDOG */
132
133void __board_add_ram_info(int use_default)
134{
135 /* please define platform specific board_add_ram_info() */
136}
137
138void board_add_ram_info(int)
139 __attribute__ ((weak, alias("__board_add_ram_info")));
140
Simon Glass1938f4a2013-03-11 06:49:53 +0000141static int init_baud_rate(void)
142{
143 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
144 return 0;
145}
146
147static int display_text_info(void)
148{
Simon Glassa733b062013-04-26 02:53:43 +0000149#ifndef CONFIG_SANDBOX
Simon Glass1938f4a2013-03-11 06:49:53 +0000150 ulong bss_start, bss_end;
151
Simon Glass632efa72013-03-11 07:06:48 +0000152 bss_start = (ulong)&__bss_start;
153 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100154
Simon Glass1938f4a2013-03-11 06:49:53 +0000155 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
156 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000157#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000158
159#ifdef CONFIG_MODEM_SUPPORT
160 debug("Modem Support enabled\n");
161#endif
162#ifdef CONFIG_USE_IRQ
163 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
164 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
165#endif
166
167 return 0;
168}
169
170static int announce_dram_init(void)
171{
172 puts("DRAM: ");
173 return 0;
174}
175
Paul Burton3da7e5a2014-04-07 10:11:20 +0100176#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000177static int init_func_ram(void)
178{
179#ifdef CONFIG_BOARD_TYPES
180 int board_type = gd->board_type;
181#else
182 int board_type = 0; /* use dummy arg */
183#endif
184
185 gd->ram_size = initdram(board_type);
186
187 if (gd->ram_size > 0)
188 return 0;
189
190 puts("*** failed ***\n");
191 return 1;
192}
193#endif
194
Simon Glass1938f4a2013-03-11 06:49:53 +0000195static int show_dram_config(void)
196{
197 ulong size;
198
199#ifdef CONFIG_NR_DRAM_BANKS
200 int i;
201
202 debug("\nRAM Configuration:\n");
203 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
204 size += gd->bd->bi_dram[i].size;
205 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
206#ifdef DEBUG
207 print_size(gd->bd->bi_dram[i].size, "\n");
208#endif
209 }
210 debug("\nDRAM: ");
211#else
212 size = gd->ram_size;
213#endif
214
Simon Glasse4fef6c2013-03-11 14:30:42 +0000215 print_size(size, "");
216 board_add_ram_info(0);
217 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000218
219 return 0;
220}
221
222void __dram_init_banksize(void)
223{
224#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
225 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
226 gd->bd->bi_dram[0].size = get_effective_memsize();
227#endif
228}
229
230void dram_init_banksize(void)
231 __attribute__((weak, alias("__dram_init_banksize")));
232
Heiko Schocherea818db2013-01-29 08:53:15 +0100233#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000234static int init_func_i2c(void)
235{
236 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200237#ifdef CONFIG_SYS_I2C
238 i2c_init_all();
239#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000240 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200241#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000242 puts("ready\n");
243 return 0;
244}
245#endif
246
247#if defined(CONFIG_HARD_SPI)
248static int init_func_spi(void)
249{
250 puts("SPI: ");
251 spi_init();
252 puts("ready\n");
253 return 0;
254}
255#endif
256
257__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000258static int zero_global_data(void)
259{
260 memset((void *)gd, '\0', sizeof(gd_t));
261
262 return 0;
263}
264
265static int setup_mon_len(void)
266{
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100267#ifdef __ARM__
268 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Simon Glassa733b062013-04-26 02:53:43 +0000269#elif defined(CONFIG_SANDBOX)
270 gd->mon_len = (ulong)&_end - (ulong)_init;
Simon Glass632efa72013-03-11 07:06:48 +0000271#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000272 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
273 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000274#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000275 return 0;
276}
277
278__weak int arch_cpu_init(void)
279{
280 return 0;
281}
282
Simon Glassf828bf22013-04-20 08:42:41 +0000283#ifdef CONFIG_OF_HOSTFILE
284
Simon Glassf828bf22013-04-20 08:42:41 +0000285static int read_fdt_from_file(void)
286{
287 struct sandbox_state *state = state_get_current();
Simon Glass95fac6a2014-02-27 13:25:58 -0700288 const char *fname = state->fdt_fname;
Simon Glassf828bf22013-04-20 08:42:41 +0000289 void *blob;
Simon Glass95fac6a2014-02-27 13:25:58 -0700290 ssize_t size;
Simon Glassf828bf22013-04-20 08:42:41 +0000291 int err;
Simon Glass95fac6a2014-02-27 13:25:58 -0700292 int fd;
Simon Glassf828bf22013-04-20 08:42:41 +0000293
294 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
295 if (!state->fdt_fname) {
Simon Glass95fac6a2014-02-27 13:25:58 -0700296 err = fdt_create_empty_tree(blob, 256);
Simon Glassf828bf22013-04-20 08:42:41 +0000297 if (!err)
298 goto done;
Simon Glass95fac6a2014-02-27 13:25:58 -0700299 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
300 return -EINVAL;
Simon Glassf828bf22013-04-20 08:42:41 +0000301 }
Simon Glass95fac6a2014-02-27 13:25:58 -0700302
303 size = os_get_filesize(fname);
304 if (size < 0) {
305 printf("Failed to file FDT file '%s'\n", fname);
306 return -ENOENT;
307 }
308 fd = os_open(fname, OS_O_RDONLY);
309 if (fd < 0) {
310 printf("Failed to open FDT file '%s'\n", fname);
311 return -EACCES;
312 }
313 if (os_read(fd, blob, size) != size) {
314 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000315 return -EIO;
Simon Glass95fac6a2014-02-27 13:25:58 -0700316 }
317 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000318
319done:
320 gd->fdt_blob = blob;
321
322 return 0;
323}
324#endif
325
Simon Glassa733b062013-04-26 02:53:43 +0000326#ifdef CONFIG_SANDBOX
327static int setup_ram_buf(void)
328{
Simon Glass5c2859c2013-11-10 10:27:03 -0700329 struct sandbox_state *state = state_get_current();
330
331 gd->arch.ram_buf = state->ram_buf;
332 gd->ram_size = state->ram_size;
Simon Glassa733b062013-04-26 02:53:43 +0000333
334 return 0;
335}
336#endif
337
Simon Glass1938f4a2013-03-11 06:49:53 +0000338static int setup_fdt(void)
339{
340#ifdef CONFIG_OF_EMBED
341 /* Get a pointer to the FDT */
Masahiro Yamada6ab6b2a2014-02-05 11:28:25 +0900342 gd->fdt_blob = __dtb_dt_begin;
Simon Glass1938f4a2013-03-11 06:49:53 +0000343#elif defined CONFIG_OF_SEPARATE
344 /* FDT is at end of image */
Simon Glass632efa72013-03-11 07:06:48 +0000345 gd->fdt_blob = (ulong *)&_end;
Simon Glassf828bf22013-04-20 08:42:41 +0000346#elif defined(CONFIG_OF_HOSTFILE)
347 if (read_fdt_from_file()) {
348 puts("Failed to read control FDT\n");
349 return -1;
350 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000351#endif
352 /* Allow the early environment to override the fdt address */
353 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
354 (uintptr_t)gd->fdt_blob);
355 return 0;
356}
357
358/* Get the top of usable RAM */
359__weak ulong board_get_usable_ram_top(ulong total_size)
360{
361 return gd->ram_top;
362}
363
364static int setup_dest_addr(void)
365{
366 debug("Monitor len: %08lX\n", gd->mon_len);
367 /*
368 * Ram is setup, size stored in gd !!
369 */
370 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
371#if defined(CONFIG_SYS_MEM_TOP_HIDE)
372 /*
373 * Subtract specified amount of memory to hide so that it won't
374 * get "touched" at all by U-Boot. By fixing up gd->ram_size
375 * the Linux kernel should now get passed the now "corrected"
376 * memory size and won't touch it either. This should work
377 * for arch/ppc and arch/powerpc. Only Linux board ports in
378 * arch/powerpc with bootwrapper support, that recalculate the
379 * memory size from the SDRAM controller setup will have to
380 * get fixed.
381 */
382 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
383#endif
384#ifdef CONFIG_SYS_SDRAM_BASE
385 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
386#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000387 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000388 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000389 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000390 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000391#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
392 /*
393 * We need to make sure the location we intend to put secondary core
394 * boot code is reserved and not used by any part of u-boot
395 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000396 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
397 gd->relocaddr = determine_mp_bootpg(NULL);
398 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000399 }
400#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000401 return 0;
402}
403
404#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
405static int reserve_logbuffer(void)
406{
407 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000408 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000409 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000410 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000411 return 0;
412}
413#endif
414
415#ifdef CONFIG_PRAM
416/* reserve protected RAM */
417static int reserve_pram(void)
418{
419 ulong reg;
420
421 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000422 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000423 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000424 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000425 return 0;
426}
427#endif /* CONFIG_PRAM */
428
429/* Round memory pointer down to next 4 kB limit */
430static int reserve_round_4k(void)
431{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000432 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000433 return 0;
434}
435
436#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
437 defined(CONFIG_ARM)
438static int reserve_mmu(void)
439{
440 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800441 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000442 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000443
444 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000445 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000446
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000447 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000448 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
449 gd->arch.tlb_addr + gd->arch.tlb_size);
450 return 0;
451}
452#endif
453
454#ifdef CONFIG_LCD
455static int reserve_lcd(void)
456{
457#ifdef CONFIG_FB_ADDR
458 gd->fb_base = CONFIG_FB_ADDR;
459#else
460 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000461 gd->relocaddr = lcd_setmem(gd->relocaddr);
462 gd->fb_base = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000463#endif /* CONFIG_FB_ADDR */
464 return 0;
465}
466#endif /* CONFIG_LCD */
467
Simon Glass71c52db2013-06-11 11:14:42 -0700468static int reserve_trace(void)
469{
470#ifdef CONFIG_TRACE
471 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
472 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
473 debug("Reserving %dk for trace data at: %08lx\n",
474 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
475#endif
476
477 return 0;
478}
479
Simon Glasse4fef6c2013-03-11 14:30:42 +0000480#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
Simon Glass48a33802013-03-05 14:39:52 +0000481 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000482static int reserve_video(void)
483{
484 /* reserve memory for video display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000485 gd->relocaddr = video_setmem(gd->relocaddr);
486 gd->fb_base = gd->relocaddr;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000487
488 return 0;
489}
490#endif
491
Simon Glass1938f4a2013-03-11 06:49:53 +0000492static int reserve_uboot(void)
493{
494 /*
495 * reserve memory for U-Boot code, data & bss
496 * round down to next 4 kB limit
497 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000498 gd->relocaddr -= gd->mon_len;
499 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000500#ifdef CONFIG_E500
501 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000502 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000503#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000504
505 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000506 gd->relocaddr);
507
508 gd->start_addr_sp = gd->relocaddr;
509
Simon Glass1938f4a2013-03-11 06:49:53 +0000510 return 0;
511}
512
Simon Glass8cae8a62013-03-05 14:39:45 +0000513#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000514/* reserve memory for malloc() area */
515static int reserve_malloc(void)
516{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000517 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000518 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000519 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000520 return 0;
521}
522
523/* (permanently) allocate a Board Info struct */
524static int reserve_board(void)
525{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000526 gd->start_addr_sp -= sizeof(bd_t);
527 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000528 memset(gd->bd, '\0', sizeof(bd_t));
529 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000530 sizeof(bd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000531 return 0;
532}
Simon Glass8cae8a62013-03-05 14:39:45 +0000533#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000534
535static int setup_machine(void)
536{
537#ifdef CONFIG_MACH_TYPE
538 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
539#endif
540 return 0;
541}
542
543static int reserve_global_data(void)
544{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000545 gd->start_addr_sp -= sizeof(gd_t);
546 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000547 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000548 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000549 return 0;
550}
551
552static int reserve_fdt(void)
553{
554 /*
555 * If the device tree is sitting immediate above our image then we
556 * must relocate it. If it is embedded in the data section, then it
557 * will be relocated with other data.
558 */
559 if (gd->fdt_blob) {
560 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
561
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000562 gd->start_addr_sp -= gd->fdt_size;
563 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000564 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000565 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000566 }
567
568 return 0;
569}
570
571static int reserve_stacks(void)
572{
Simon Glass8cae8a62013-03-05 14:39:45 +0000573#ifdef CONFIG_SPL_BUILD
574# ifdef CONFIG_ARM
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000575 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
576 gd->irq_sp = gd->start_addr_sp;
Simon Glass8cae8a62013-03-05 14:39:45 +0000577# endif
578#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000579# ifdef CONFIG_PPC
580 ulong *s;
581# endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000582
Simon Glass1938f4a2013-03-11 06:49:53 +0000583 /* setup stack pointer for exceptions */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000584 gd->start_addr_sp -= 16;
585 gd->start_addr_sp &= ~0xf;
586 gd->irq_sp = gd->start_addr_sp;
Simon Glass1938f4a2013-03-11 06:49:53 +0000587
588 /*
589 * Handle architecture-specific things here
590 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
591 * to handle this and put in arch/xxx/lib/stack.c
592 */
David Fengcce6be72013-12-14 11:47:36 +0800593# if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000594# ifdef CONFIG_USE_IRQ
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000595 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
Simon Glass1938f4a2013-03-11 06:49:53 +0000596 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000597 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000598
599 /* 8-byte alignment for ARM ABI compliance */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000600 gd->start_addr_sp &= ~0x07;
Simon Glass1938f4a2013-03-11 06:49:53 +0000601# endif
602 /* leave 3 words for abort-stack, plus 1 for alignment */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000603 gd->start_addr_sp -= 16;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000604# elif defined(CONFIG_PPC)
605 /* Clear initial stack frame */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000606 s = (ulong *) gd->start_addr_sp;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000607 *s = 0; /* Terminate back chain */
608 *++s = 0; /* NULL return address */
Simon Glass8cae8a62013-03-05 14:39:45 +0000609# endif /* Architecture specific code */
Simon Glass1938f4a2013-03-11 06:49:53 +0000610
611 return 0;
Simon Glass8cae8a62013-03-05 14:39:45 +0000612#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000613}
614
615static int display_new_sp(void)
616{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000617 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000618
619 return 0;
620}
621
Simon Glasse4fef6c2013-03-11 14:30:42 +0000622#ifdef CONFIG_PPC
623static int setup_board_part1(void)
624{
625 bd_t *bd = gd->bd;
626
627 /*
628 * Save local variables to board info struct
629 */
630
631 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
632 bd->bi_memsize = gd->ram_size; /* size in bytes */
633
634#ifdef CONFIG_SYS_SRAM_BASE
635 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
636 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
637#endif
638
Masahiro Yamada58dac322014-03-05 17:40:10 +0900639#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000640 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
641 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
642#endif
643#if defined(CONFIG_MPC5xxx)
644 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
645#endif
646#if defined(CONFIG_MPC83xx)
647 bd->bi_immrbar = CONFIG_SYS_IMMR;
648#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000649
650 return 0;
651}
652
653static int setup_board_part2(void)
654{
655 bd_t *bd = gd->bd;
656
657 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
658 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
659#if defined(CONFIG_CPM2)
660 bd->bi_cpmfreq = gd->arch.cpm_clk;
661 bd->bi_brgfreq = gd->arch.brg_clk;
662 bd->bi_sccfreq = gd->arch.scc_clk;
663 bd->bi_vco = gd->arch.vco_out;
664#endif /* CONFIG_CPM2 */
665#if defined(CONFIG_MPC512X)
666 bd->bi_ipsfreq = gd->arch.ips_clk;
667#endif /* CONFIG_MPC512X */
668#if defined(CONFIG_MPC5xxx)
669 bd->bi_ipbfreq = gd->arch.ipb_clk;
670 bd->bi_pcifreq = gd->pci_clk;
671#endif /* CONFIG_MPC5xxx */
672
673 return 0;
674}
675#endif
676
677#ifdef CONFIG_SYS_EXTBDINFO
678static int setup_board_extra(void)
679{
680 bd_t *bd = gd->bd;
681
682 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
683 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
684 sizeof(bd->bi_r_version));
685
686 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
687 bd->bi_plb_busfreq = gd->bus_clk;
688#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
689 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
690 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
691 bd->bi_pci_busfreq = get_PCI_freq();
692 bd->bi_opbfreq = get_OPB_freq();
693#elif defined(CONFIG_XILINX_405)
694 bd->bi_pci_busfreq = get_PCI_freq();
695#endif
696
697 return 0;
698}
699#endif
700
Simon Glass1938f4a2013-03-11 06:49:53 +0000701#ifdef CONFIG_POST
702static int init_post(void)
703{
704 post_bootmode_init();
705 post_run(NULL, POST_ROM | post_bootmode_get(0));
706
707 return 0;
708}
709#endif
710
711static int setup_baud_rate(void)
712{
713 /* Ick, can we get rid of this line? */
714 gd->bd->bi_baudrate = gd->baudrate;
715
716 return 0;
717}
718
719static int setup_dram_config(void)
720{
721 /* Ram is board specific, so move it to board code ... */
722 dram_init_banksize();
723
724 return 0;
725}
726
727static int reloc_fdt(void)
728{
729 if (gd->new_fdt) {
730 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
731 gd->fdt_blob = gd->new_fdt;
732 }
733
734 return 0;
735}
736
737static int setup_reloc(void)
738{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000739 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000740 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
741
742 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000743 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000744 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
745 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000746
747 return 0;
748}
749
750/* ARM calls relocate_code from its crt0.S */
Simon Glass808434c2013-11-10 10:26:59 -0700751#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000752
753static int jump_to_copy(void)
754{
Simon Glass48a33802013-03-05 14:39:52 +0000755 /*
756 * x86 is special, but in a nice way. It uses a trampoline which
757 * enables the dcache if possible.
758 *
759 * For now, other archs use relocate_code(), which is implemented
760 * similarly for all archs. When we do generic relocation, hopefully
761 * we can make all archs enable the dcache prior to relocation.
762 */
763#ifdef CONFIG_X86
764 /*
765 * SDRAM and console are now initialised. The final stack can now
766 * be setup in SDRAM. Code execution will continue in Flash, but
767 * with the stack in SDRAM and Global Data in temporary memory
768 * (CPU cache)
769 */
770 board_init_f_r_trampoline(gd->start_addr_sp);
771#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000772 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000773#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000774
775 return 0;
776}
777#endif
778
779/* Record the board_init_f() bootstage (after arch_cpu_init()) */
780static int mark_bootstage(void)
781{
782 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
783
784 return 0;
785}
786
787static init_fnc_t init_sequence_f[] = {
Simon Glassa733b062013-04-26 02:53:43 +0000788#ifdef CONFIG_SANDBOX
789 setup_ram_buf,
790#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000791 setup_mon_len,
Simon Glass71c52db2013-06-11 11:14:42 -0700792 setup_fdt,
793 trace_early_init,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000794#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
795 /* TODO: can this go into arch_cpu_init()? */
796 probecpu,
797#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000798 arch_cpu_init, /* basic arch cpu dependent setup */
Simon Glass48a33802013-03-05 14:39:52 +0000799#ifdef CONFIG_X86
800 cpu_init_f, /* TODO(sjg@chromium.org): remove */
801# ifdef CONFIG_OF_CONTROL
802 find_fdt, /* TODO(sjg@chromium.org): remove */
803# endif
804#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000805 mark_bootstage,
806#ifdef CONFIG_OF_CONTROL
807 fdtdec_check_fdt,
808#endif
809#if defined(CONFIG_BOARD_EARLY_INIT_F)
810 board_early_init_f,
811#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000812 /* TODO: can any of this go into arch_cpu_init()? */
813#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
814 get_clocks, /* get CPU and bus clocks (etc.) */
815#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
816 && !defined(CONFIG_TQM885D)
817 adjust_sdram_tbs_8xx,
818#endif
819 /* TODO: can we rename this to timer_init()? */
820 init_timebase,
821#endif
Paul Burton6dc9bac2014-04-07 10:11:21 +0100822#if defined(CONFIG_ARM) || defined(CONFIG_MIPS)
Simon Glass1938f4a2013-03-11 06:49:53 +0000823 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000824#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000825#ifdef CONFIG_SYS_ALLOC_DPRAM
826#if !defined(CONFIG_CPM2)
827 dpram_init,
828#endif
829#endif
830#if defined(CONFIG_BOARD_POSTCLK_INIT)
831 board_postclk_init,
832#endif
Masahiro Yamadab8521b72013-05-21 21:08:09 +0000833#ifdef CONFIG_FSL_ESDHC
834 get_clocks,
835#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000836 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000837#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
838 /* get CPU and bus clocks according to the environment variable */
839 get_clocks_866,
840 /* adjust sdram refresh rate according to the new clock */
841 sdram_adjust_866,
842 init_timebase,
843#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000844 init_baud_rate, /* initialze baudrate settings */
845 serial_init, /* serial communications setup */
846 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000847#ifdef CONFIG_SANDBOX
848 sandbox_early_getopt_check,
849#endif
850#ifdef CONFIG_OF_CONTROL
851 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000852#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000853 display_options, /* say that we are here */
854 display_text_info, /* show debugging info if required */
Masahiro Yamada58dac322014-03-05 17:40:10 +0900855#if defined(CONFIG_MPC8260)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000856 prt_8260_rsr,
857 prt_8260_clks,
Masahiro Yamada58dac322014-03-05 17:40:10 +0900858#endif /* CONFIG_MPC8260 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000859#if defined(CONFIG_MPC83xx)
860 prt_83xx_rsr,
861#endif
862#ifdef CONFIG_PPC
863 checkcpu,
864#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000865 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000866#if defined(CONFIG_MPC5xxx)
867 prt_mpc5xxx_clks,
868#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000869#if defined(CONFIG_DISPLAY_BOARDINFO)
870 checkboard, /* display board info */
871#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000872 INIT_FUNC_WATCHDOG_INIT
873#if defined(CONFIG_MISC_INIT_F)
874 misc_init_f,
875#endif
876 INIT_FUNC_WATCHDOG_RESET
Heiko Schocherea818db2013-01-29 08:53:15 +0100877#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000878 init_func_i2c,
879#endif
880#if defined(CONFIG_HARD_SPI)
881 init_func_spi,
882#endif
883#ifdef CONFIG_X86
884 dram_init_f, /* configure available RAM banks */
Simon Glass8b42dfc2013-04-15 11:22:49 +0000885 calculate_relocation_address,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000886#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000887 announce_dram_init,
888 /* TODO: unify all these dram functions? */
889#ifdef CONFIG_ARM
890 dram_init, /* configure available RAM banks */
891#endif
Paul Burton3da7e5a2014-04-07 10:11:20 +0100892#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000893 init_func_ram,
894#endif
895#ifdef CONFIG_POST
896 post_init_f,
897#endif
898 INIT_FUNC_WATCHDOG_RESET
899#if defined(CONFIG_SYS_DRAM_TEST)
900 testdram,
901#endif /* CONFIG_SYS_DRAM_TEST */
902 INIT_FUNC_WATCHDOG_RESET
903
Simon Glass1938f4a2013-03-11 06:49:53 +0000904#ifdef CONFIG_POST
905 init_post,
906#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000907 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000908 /*
909 * Now that we have DRAM mapped and working, we can
910 * relocate the code and continue running from DRAM.
911 *
912 * Reserve memory at end of RAM for (top down in that order):
913 * - area that won't get touched by U-Boot and Linux (optional)
914 * - kernel log buffer
915 * - protected RAM
916 * - LCD framebuffer
917 * - monitor code
918 * - board info struct
919 */
920 setup_dest_addr,
921#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
922 reserve_logbuffer,
923#endif
924#ifdef CONFIG_PRAM
925 reserve_pram,
926#endif
927 reserve_round_4k,
928#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
929 defined(CONFIG_ARM)
930 reserve_mmu,
931#endif
932#ifdef CONFIG_LCD
933 reserve_lcd,
934#endif
Simon Glass71c52db2013-06-11 11:14:42 -0700935 reserve_trace,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000936 /* TODO: Why the dependency on CONFIG_8xx? */
937#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
Simon Glass48a33802013-03-05 14:39:52 +0000938 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000939 reserve_video,
940#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000941 reserve_uboot,
Simon Glass8cae8a62013-03-05 14:39:45 +0000942#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000943 reserve_malloc,
944 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +0000945#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000946 setup_machine,
947 reserve_global_data,
948 reserve_fdt,
949 reserve_stacks,
950 setup_dram_config,
951 show_dram_config,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000952#ifdef CONFIG_PPC
953 setup_board_part1,
954 INIT_FUNC_WATCHDOG_RESET
955 setup_board_part2,
956#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000957 setup_baud_rate,
958 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000959#ifdef CONFIG_SYS_EXTBDINFO
960 setup_board_extra,
961#endif
962 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000963 reloc_fdt,
964 setup_reloc,
Simon Glass808434c2013-11-10 10:26:59 -0700965#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000966 jump_to_copy,
967#endif
968 NULL,
969};
970
971void board_init_f(ulong boot_flags)
972{
Simon Glass48a33802013-03-05 14:39:52 +0000973#ifndef CONFIG_X86
Simon Glass1938f4a2013-03-11 06:49:53 +0000974 gd_t data;
975
976 gd = &data;
Simon Glass48a33802013-03-05 14:39:52 +0000977#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000978
David Fengcce6be72013-12-14 11:47:36 +0800979 /*
980 * Clear global data before it is accessed at debug print
981 * in initcall_run_list. Otherwise the debug print probably
982 * get the wrong vaule of gd->have_console.
983 */
984#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
985 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
986 !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86)
987 zero_global_data();
988#endif
989
Simon Glass1938f4a2013-03-11 06:49:53 +0000990 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +0400991 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000992
993 if (initcall_run_list(init_sequence_f))
994 hang();
995
Simon Glass808434c2013-11-10 10:26:59 -0700996#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000997 /* NOTREACHED - jump_to_copy() does not return */
998 hang();
999#endif
1000}
1001
Simon Glass48a33802013-03-05 14:39:52 +00001002#ifdef CONFIG_X86
1003/*
1004 * For now this code is only used on x86.
1005 *
1006 * init_sequence_f_r is the list of init functions which are run when
1007 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1008 * The following limitations must be considered when implementing an
1009 * '_f_r' function:
1010 * - 'static' variables are read-only
1011 * - Global Data (gd->xxx) is read/write
1012 *
1013 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1014 * supported). It _should_, if possible, copy global data to RAM and
1015 * initialise the CPU caches (to speed up the relocation process)
1016 *
1017 * NOTE: At present only x86 uses this route, but it is intended that
1018 * all archs will move to this when generic relocation is implemented.
1019 */
1020static init_fnc_t init_sequence_f_r[] = {
1021 init_cache_f_r,
1022 copy_uboot_to_ram,
1023 clear_bss,
1024 do_elf_reloc_fixups,
1025
1026 NULL,
1027};
1028
1029void board_init_f_r(void)
1030{
1031 if (initcall_run_list(init_sequence_f_r))
1032 hang();
1033
1034 /*
1035 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1036 * Transfer execution from Flash to RAM by calculating the address
1037 * of the in-RAM copy of board_init_r() and calling it
1038 */
1039 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1040
1041 /* NOTREACHED - board_init_r() does not return */
1042 hang();
1043}
1044#endif /* CONFIG_X86 */