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wdenkc6097192002-11-03 00:24:07 +00001/*
wdenk1a344f22005-02-03 23:00:49 +00002 * (C) Copyright 2000-2005
wdenkc6097192002-11-03 00:24:07 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * IDE support
27 */
28#include <common.h>
29#include <config.h>
30#include <watchdog.h>
31#include <command.h>
32#include <image.h>
33#include <asm/byteorder.h>
34#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
35# include <pcmcia.h>
36#endif
37#ifdef CONFIG_8xx
38# include <mpc8xx.h>
39#endif
wdenk132ba5f2004-02-27 08:20:54 +000040#ifdef CONFIG_MPC5xxx
41#include <mpc5xxx.h>
42#endif
wdenkc6097192002-11-03 00:24:07 +000043#include <ide.h>
44#include <ata.h>
wdenkc6097192002-11-03 00:24:07 +000045#ifdef CONFIG_STATUS_LED
46# include <status_led.h>
47#endif
wdenk15647dc2003-10-09 19:00:25 +000048#ifndef __PPC__
wdenk2262cfe2002-11-18 00:14:45 +000049#include <asm/io.h>
wdenk15647dc2003-10-09 19:00:25 +000050#ifdef __MIPS__
51/* Macros depend on this variable */
52static unsigned long mips_io_port_base = 0;
53#endif
wdenk2262cfe2002-11-18 00:14:45 +000054#endif
wdenkc6097192002-11-03 00:24:07 +000055
56#ifdef CONFIG_SHOW_BOOT_PROGRESS
57# include <status_led.h>
58# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
59#else
60# define SHOW_BOOT_PROGRESS(arg)
61#endif
62
wdenk5cf91d62004-04-23 20:32:05 +000063#ifdef __PPC__
64# define EIEIO __asm__ volatile ("eieio")
wdenk1a344f22005-02-03 23:00:49 +000065# define SYNC __asm__ volatile ("sync")
wdenk5cf91d62004-04-23 20:32:05 +000066#else
67# define EIEIO /* nothing */
wdenk1a344f22005-02-03 23:00:49 +000068# define SYNC /* nothing */
wdenkc6097192002-11-03 00:24:07 +000069#endif
70
71#if (CONFIG_COMMANDS & CFG_CMD_IDE)
72
wdenk15647dc2003-10-09 19:00:25 +000073#ifdef CONFIG_IDE_8xx_DIRECT
wdenkc6097192002-11-03 00:24:07 +000074/* Timings for IDE Interface
75 *
76 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
77 * 70 165 30 PIO-Mode 0, [ns]
78 * 4 9 2 [Cycles]
79 * 50 125 20 PIO-Mode 1, [ns]
80 * 3 7 2 [Cycles]
81 * 30 100 15 PIO-Mode 2, [ns]
82 * 2 6 1 [Cycles]
83 * 30 80 10 PIO-Mode 3, [ns]
84 * 2 5 1 [Cycles]
85 * 25 70 10 PIO-Mode 4, [ns]
86 * 2 4 1 [Cycles]
87 */
88
89const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
90{
91 /* Setup Length Hold */
92 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
93 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
94 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
95 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
96 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
97};
98
99static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
100
101#ifndef CFG_PIO_MODE
102#define CFG_PIO_MODE 0 /* use a relaxed default */
103#endif
104static int pio_mode = CFG_PIO_MODE;
105
106/* Make clock cycles and always round up */
107
108#define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
109
wdenk15647dc2003-10-09 19:00:25 +0000110#endif /* CONFIG_IDE_8xx_DIRECT */
111
wdenkc6097192002-11-03 00:24:07 +0000112/* ------------------------------------------------------------------------- */
113
114/* Current I/O Device */
115static int curr_device = -1;
116
117/* Current offset for IDE0 / IDE1 bus access */
118ulong ide_bus_offset[CFG_IDE_MAXBUS] = {
119#if defined(CFG_ATA_IDE0_OFFSET)
120 CFG_ATA_IDE0_OFFSET,
121#endif
122#if defined(CFG_ATA_IDE1_OFFSET) && (CFG_IDE_MAXBUS > 1)
123 CFG_ATA_IDE1_OFFSET,
124#endif
125};
126
wdenk15647dc2003-10-09 19:00:25 +0000127
wdenkc6097192002-11-03 00:24:07 +0000128#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
129
wdenkc7de8292002-11-19 11:04:11 +0000130#ifndef CONFIG_AMIGAONEG3SE
wdenk1a344f22005-02-03 23:00:49 +0000131static int ide_bus_ok[CFG_IDE_MAXBUS];
wdenkc7de8292002-11-19 11:04:11 +0000132#else
wdenk1a344f22005-02-03 23:00:49 +0000133static int ide_bus_ok[CFG_IDE_MAXBUS] = {0,};
wdenkc7de8292002-11-19 11:04:11 +0000134#endif
wdenkc6097192002-11-03 00:24:07 +0000135
stroesefa838872004-12-16 17:40:30 +0000136block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
wdenkc6097192002-11-03 00:24:07 +0000137/* ------------------------------------------------------------------------- */
138
139#ifdef CONFIG_IDE_LED
wdenke2ffd592004-12-31 09:32:47 +0000140#if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
wdenkc6097192002-11-03 00:24:07 +0000141static void ide_led (uchar led, uchar status);
142#else
wdenk1f53a412002-12-04 23:39:58 +0000143extern void ide_led (uchar led, uchar status);
144#endif
145#else
wdenkc7de8292002-11-19 11:04:11 +0000146#ifndef CONFIG_AMIGAONEG3SE
wdenkc6097192002-11-03 00:24:07 +0000147#define ide_led(a,b) /* dummy */
wdenkc7de8292002-11-19 11:04:11 +0000148#else
149extern void ide_led(uchar led, uchar status);
150#define LED_IDE1 1
151#define LED_IDE2 2
152#define CONFIG_IDE_LED 1
153#define DEVICE_LED(x) 1
154#endif
wdenkc6097192002-11-03 00:24:07 +0000155#endif
156
157#ifdef CONFIG_IDE_RESET
158static void ide_reset (void);
159#else
160#define ide_reset() /* dummy */
161#endif
162
163static void ide_ident (block_dev_desc_t *dev_desc);
164static uchar ide_wait (int dev, ulong t);
165
166#define IDE_TIME_OUT 2000 /* 2 sec timeout */
167
168#define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
169
170#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
171
wdenk2262cfe2002-11-18 00:14:45 +0000172static void __inline__ ide_outb(int dev, int port, unsigned char val);
173static unsigned char __inline__ ide_inb(int dev, int port);
wdenkc6097192002-11-03 00:24:07 +0000174static void input_data(int dev, ulong *sect_buf, int words);
175static void output_data(int dev, ulong *sect_buf, int words);
176static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
177
178
179#ifdef CONFIG_ATAPI
180static void atapi_inquiry(block_dev_desc_t *dev_desc);
wdenkc40b2952004-03-13 23:29:43 +0000181ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, ulong *buffer);
wdenkc6097192002-11-03 00:24:07 +0000182#endif
183
184
185#ifdef CONFIG_IDE_8xx_DIRECT
186static void set_pcmcia_timing (int pmode);
wdenkc6097192002-11-03 00:24:07 +0000187#endif
188
189/* ------------------------------------------------------------------------- */
190
191int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
192{
193 int rcode = 0;
194
195 switch (argc) {
196 case 0:
197 case 1:
198 printf ("Usage:\n%s\n", cmdtp->usage);
199 return 1;
200 case 2:
201 if (strncmp(argv[1],"res",3) == 0) {
202 puts ("\nReset IDE"
203#ifdef CONFIG_IDE_8xx_DIRECT
204 " on PCMCIA " PCMCIA_SLOT_MSG
205#endif
206 ": ");
207
208 ide_init ();
209 return 0;
210 } else if (strncmp(argv[1],"inf",3) == 0) {
211 int i;
212
213 putc ('\n');
214
215 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
216 if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
217 continue; /* list only known devices */
218 printf ("IDE device %d: ", i);
219 dev_print(&ide_dev_desc[i]);
220 }
221 return 0;
222
223 } else if (strncmp(argv[1],"dev",3) == 0) {
224 if ((curr_device < 0) || (curr_device >= CFG_IDE_MAXDEVICE)) {
225 puts ("\nno IDE devices available\n");
226 return 1;
227 }
228 printf ("\nIDE device %d: ", curr_device);
229 dev_print(&ide_dev_desc[curr_device]);
230 return 0;
231 } else if (strncmp(argv[1],"part",4) == 0) {
232 int dev, ok;
233
234 for (ok=0, dev=0; dev<CFG_IDE_MAXDEVICE; ++dev) {
235 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
236 ++ok;
237 if (dev)
238 putc ('\n');
239 print_part(&ide_dev_desc[dev]);
240 }
241 }
242 if (!ok) {
243 puts ("\nno IDE devices available\n");
244 rcode ++;
245 }
246 return rcode;
247 }
248 printf ("Usage:\n%s\n", cmdtp->usage);
249 return 1;
250 case 3:
251 if (strncmp(argv[1],"dev",3) == 0) {
252 int dev = (int)simple_strtoul(argv[2], NULL, 10);
253
254 printf ("\nIDE device %d: ", dev);
255 if (dev >= CFG_IDE_MAXDEVICE) {
256 puts ("unknown device\n");
257 return 1;
258 }
259 dev_print(&ide_dev_desc[dev]);
260 /*ide_print (dev);*/
261
262 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
263 return 1;
264 }
265
266 curr_device = dev;
267
268 puts ("... is now current device\n");
269
270 return 0;
271 } else if (strncmp(argv[1],"part",4) == 0) {
272 int dev = (int)simple_strtoul(argv[2], NULL, 10);
273
274 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
275 print_part(&ide_dev_desc[dev]);
276 } else {
277 printf ("\nIDE device %d not available\n", dev);
278 rcode = 1;
279 }
280 return rcode;
281#if 0
282 } else if (strncmp(argv[1],"pio",4) == 0) {
283 int mode = (int)simple_strtoul(argv[2], NULL, 10);
284
285 if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
286 puts ("\nSetting ");
287 pio_mode = mode;
288 ide_init ();
289 } else {
290 printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
291 mode, IDE_MAX_PIO_MODE);
292 }
293 return;
294#endif
295 }
296
297 printf ("Usage:\n%s\n", cmdtp->usage);
298 return 1;
299 default:
300 /* at least 4 args */
301
302 if (strcmp(argv[1],"read") == 0) {
303 ulong addr = simple_strtoul(argv[2], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000304 ulong cnt = simple_strtoul(argv[4], NULL, 16);
305 ulong n;
wdenk42dfe7a2004-03-14 22:25:36 +0000306#ifdef CFG_64BIT_STRTOUL
307 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000308
wdenkc40b2952004-03-13 23:29:43 +0000309 printf ("\nIDE read: device %d block # %qd, count %ld ... ",
wdenkc6097192002-11-03 00:24:07 +0000310 curr_device, blk, cnt);
wdenk42dfe7a2004-03-14 22:25:36 +0000311#else
312 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
313
314 printf ("\nIDE read: device %d block # %ld, count %ld ... ",
315 curr_device, blk, cnt);
316#endif
wdenkc6097192002-11-03 00:24:07 +0000317
318 n = ide_dev_desc[curr_device].block_read (curr_device,
319 blk, cnt,
320 (ulong *)addr);
321 /* flush cache after read */
322 flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
323
324 printf ("%ld blocks read: %s\n",
325 n, (n==cnt) ? "OK" : "ERROR");
326 if (n==cnt) {
327 return 0;
328 } else {
329 return 1;
330 }
331 } else if (strcmp(argv[1],"write") == 0) {
332 ulong addr = simple_strtoul(argv[2], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000333 ulong cnt = simple_strtoul(argv[4], NULL, 16);
334 ulong n;
wdenk42dfe7a2004-03-14 22:25:36 +0000335#ifdef CFG_64BIT_STRTOUL
336 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000337
wdenkc40b2952004-03-13 23:29:43 +0000338 printf ("\nIDE write: device %d block # %qd, count %ld ... ",
wdenkc6097192002-11-03 00:24:07 +0000339 curr_device, blk, cnt);
wdenk42dfe7a2004-03-14 22:25:36 +0000340#else
341 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
342
343 printf ("\nIDE write: device %d block # %ld, count %ld ... ",
344 curr_device, blk, cnt);
345#endif
wdenkc6097192002-11-03 00:24:07 +0000346
347 n = ide_write (curr_device, blk, cnt, (ulong *)addr);
348
349 printf ("%ld blocks written: %s\n",
350 n, (n==cnt) ? "OK" : "ERROR");
351 if (n==cnt) {
352 return 0;
353 } else {
354 return 1;
355 }
356 } else {
357 printf ("Usage:\n%s\n", cmdtp->usage);
358 rcode = 1;
359 }
360
361 return rcode;
362 }
363}
364
365int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
366{
367 char *boot_device = NULL;
368 char *ep;
369 int dev, part = 0;
wdenk1a344f22005-02-03 23:00:49 +0000370 ulong addr, cnt, checksum;
wdenkc6097192002-11-03 00:24:07 +0000371 disk_partition_t info;
372 image_header_t *hdr;
373 int rcode = 0;
374
375 switch (argc) {
376 case 1:
377 addr = CFG_LOAD_ADDR;
378 boot_device = getenv ("bootdevice");
379 break;
380 case 2:
381 addr = simple_strtoul(argv[1], NULL, 16);
382 boot_device = getenv ("bootdevice");
383 break;
384 case 3:
385 addr = simple_strtoul(argv[1], NULL, 16);
386 boot_device = argv[2];
387 break;
388 default:
389 printf ("Usage:\n%s\n", cmdtp->usage);
390 SHOW_BOOT_PROGRESS (-1);
391 return 1;
392 }
393
394 if (!boot_device) {
395 puts ("\n** No boot device **\n");
396 SHOW_BOOT_PROGRESS (-1);
397 return 1;
398 }
399
400 dev = simple_strtoul(boot_device, &ep, 16);
401
402 if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
403 printf ("\n** Device %d not available\n", dev);
404 SHOW_BOOT_PROGRESS (-1);
405 return 1;
406 }
407
408 if (*ep) {
409 if (*ep != ':') {
410 puts ("\n** Invalid boot device, use `dev[:part]' **\n");
411 SHOW_BOOT_PROGRESS (-1);
412 return 1;
413 }
414 part = simple_strtoul(++ep, NULL, 16);
415 }
wdenkb05dcb52005-03-04 11:27:31 +0000416 if (get_partition_info (ide_dev_desc, part, &info)) {
wdenkc6097192002-11-03 00:24:07 +0000417 SHOW_BOOT_PROGRESS (-1);
418 return 1;
419 }
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200420 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
421 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
wdenkc6097192002-11-03 00:24:07 +0000422 printf ("\n** Invalid partition type \"%.32s\""
423 " (expect \"" BOOT_PART_TYPE "\")\n",
424 info.type);
425 SHOW_BOOT_PROGRESS (-1);
426 return 1;
427 }
428
429 printf ("\nLoading from IDE device %d, partition %d: "
430 "Name: %.32s Type: %.32s\n",
431 dev, part, info.name, info.type);
432
wdenk1a344f22005-02-03 23:00:49 +0000433 debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
wdenkc6097192002-11-03 00:24:07 +0000434 info.start, info.size, info.blksz);
435
436 if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
437 printf ("** Read error on %d:%d\n", dev, part);
438 SHOW_BOOT_PROGRESS (-1);
439 return 1;
440 }
441
442 hdr = (image_header_t *)addr;
443
wdenk1a344f22005-02-03 23:00:49 +0000444 if (ntohl(hdr->ih_magic) != IH_MAGIC) {
wdenkc6097192002-11-03 00:24:07 +0000445 printf("\n** Bad Magic Number **\n");
446 SHOW_BOOT_PROGRESS (-1);
447 return 1;
448 }
449
wdenk1a344f22005-02-03 23:00:49 +0000450 checksum = ntohl(hdr->ih_hcrc);
451 hdr->ih_hcrc = 0;
452
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200453 if (crc32 (0, (uchar *)hdr, sizeof(image_header_t)) != checksum) {
wdenk1a344f22005-02-03 23:00:49 +0000454 puts ("\n** Bad Header Checksum **\n");
455 SHOW_BOOT_PROGRESS (-2);
456 return 1;
457 }
wdenkb9649852005-02-08 15:29:01 +0000458 hdr->ih_hcrc = htonl(checksum); /* restore checksum for later use */
wdenk1a344f22005-02-03 23:00:49 +0000459
460 print_image_hdr (hdr);
461
462 cnt = (ntohl(hdr->ih_size) + sizeof(image_header_t));
463 cnt += info.blksz - 1;
464 cnt /= info.blksz;
465 cnt -= 1;
466
wdenkc6097192002-11-03 00:24:07 +0000467 if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
468 (ulong *)(addr+info.blksz)) != cnt) {
469 printf ("** Read error on %d:%d\n", dev, part);
470 SHOW_BOOT_PROGRESS (-1);
471 return 1;
472 }
473
474
475 /* Loading ok, update default load address */
476
477 load_addr = addr;
478
479 /* Check if we should attempt an auto-start */
480 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
481 char *local_args[2];
482 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
483
484 local_args[0] = argv[0];
485 local_args[1] = NULL;
486
487 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
488
489 do_bootm (cmdtp, 0, 1, local_args);
490 rcode = 1;
491 }
492 return rcode;
493}
494
495/* ------------------------------------------------------------------------- */
496
497void ide_init (void)
498{
wdenkc6097192002-11-03 00:24:07 +0000499
500#ifdef CONFIG_IDE_8xx_DIRECT
wdenk15647dc2003-10-09 19:00:25 +0000501 DECLARE_GLOBAL_DATA_PTR;
wdenkc6097192002-11-03 00:24:07 +0000502 volatile immap_t *immr = (immap_t *)CFG_IMMR;
503 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
504#endif
505 unsigned char c;
506 int i, bus;
wdenkc7de8292002-11-19 11:04:11 +0000507#ifdef CONFIG_AMIGAONEG3SE
508 unsigned int max_bus_scan;
509 unsigned int ata_reset_time;
510 char *s;
511#endif
wdenk9fd5e312003-12-07 23:55:12 +0000512#ifdef CONFIG_IDE_8xx_PCCARD
513 extern int pcmcia_on (void);
514 extern int ide_devices_found; /* Initialized in check_ide_device() */
515#endif /* CONFIG_IDE_8xx_PCCARD */
516
517#ifdef CONFIG_IDE_PREINIT
wdenk4d13cba2004-03-14 14:09:05 +0000518 extern int ide_preinit (void);
wdenk9fd5e312003-12-07 23:55:12 +0000519 WATCHDOG_RESET();
520
521 if (ide_preinit ()) {
522 puts ("ide_preinit failed\n");
523 return;
524 }
525#endif /* CONFIG_IDE_PREINIT */
wdenkc6097192002-11-03 00:24:07 +0000526
527#ifdef CONFIG_IDE_8xx_PCCARD
528 extern int pcmcia_on (void);
wdenk6069ff22003-02-28 00:49:47 +0000529 extern int ide_devices_found; /* Initialized in check_ide_device() */
wdenkc6097192002-11-03 00:24:07 +0000530
531 WATCHDOG_RESET();
532
wdenk6069ff22003-02-28 00:49:47 +0000533 ide_devices_found = 0;
wdenkc6097192002-11-03 00:24:07 +0000534 /* initialize the PCMCIA IDE adapter card */
wdenk6069ff22003-02-28 00:49:47 +0000535 pcmcia_on();
536 if (!ide_devices_found)
wdenkc6097192002-11-03 00:24:07 +0000537 return;
538 udelay (1000000); /* 1 s */
539#endif /* CONFIG_IDE_8xx_PCCARD */
540
541 WATCHDOG_RESET();
542
wdenk15647dc2003-10-09 19:00:25 +0000543#ifdef CONFIG_IDE_8xx_DIRECT
wdenkc6097192002-11-03 00:24:07 +0000544 /* Initialize PIO timing tables */
545 for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
wdenk1a344f22005-02-03 23:00:49 +0000546 pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
547 gd->bus_clk);
548 pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
549 gd->bus_clk);
550 pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
551 gd->bus_clk);
552 debug ( "PIO Mode %d: setup=%2d ns/%d clk"
553 " len=%3d ns/%d clk"
554 " hold=%2d ns/%d clk\n",
555 i,
556 pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
557 pio_config_ns[i].t_length, pio_config_clk[i].t_length,
558 pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
wdenkc6097192002-11-03 00:24:07 +0000559 }
wdenk15647dc2003-10-09 19:00:25 +0000560#endif /* CONFIG_IDE_8xx_DIRECT */
wdenkc6097192002-11-03 00:24:07 +0000561
562 /* Reset the IDE just to be sure.
563 * Light LED's to show
564 */
565 ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
566 ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
567
568#ifdef CONFIG_IDE_8xx_DIRECT
569 /* PCMCIA / IDE initialization for common mem space */
570 pcmp->pcmc_pgcrb = 0;
wdenkc6097192002-11-03 00:24:07 +0000571
572 /* start in PIO mode 0 - most relaxed timings */
573 pio_mode = 0;
574 set_pcmcia_timing (pio_mode);
wdenk15647dc2003-10-09 19:00:25 +0000575#endif /* CONFIG_IDE_8xx_DIRECT */
wdenkc6097192002-11-03 00:24:07 +0000576
577 /*
578 * Wait for IDE to get ready.
579 * According to spec, this can take up to 31 seconds!
580 */
wdenkc7de8292002-11-19 11:04:11 +0000581#ifndef CONFIG_AMIGAONEG3SE
wdenkc6097192002-11-03 00:24:07 +0000582 for (bus=0; bus<CFG_IDE_MAXBUS; ++bus) {
583 int dev = bus * (CFG_IDE_MAXDEVICE / CFG_IDE_MAXBUS);
wdenkc7de8292002-11-19 11:04:11 +0000584#else
585 s = getenv("ide_maxbus");
586 if (s)
wdenk1a344f22005-02-03 23:00:49 +0000587 max_bus_scan = simple_strtol(s, NULL, 10);
wdenkc7de8292002-11-19 11:04:11 +0000588 else
wdenk1a344f22005-02-03 23:00:49 +0000589 max_bus_scan = CFG_IDE_MAXBUS;
wdenkc7de8292002-11-19 11:04:11 +0000590
591 for (bus=0; bus<max_bus_scan; ++bus) {
592 int dev = bus * (CFG_IDE_MAXDEVICE / max_bus_scan);
593#endif
wdenkc6097192002-11-03 00:24:07 +0000594
wdenk6069ff22003-02-28 00:49:47 +0000595#ifdef CONFIG_IDE_8xx_PCCARD
596 /* Skip non-ide devices from probing */
597 if ((ide_devices_found & (1 << bus)) == 0) {
598 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
599 continue;
600 }
601#endif
wdenkc6097192002-11-03 00:24:07 +0000602 printf ("Bus %d: ", bus);
603
604 ide_bus_ok[bus] = 0;
605
606 /* Select device
607 */
608 udelay (100000); /* 100 ms */
wdenk2262cfe2002-11-18 00:14:45 +0000609 ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
wdenkc6097192002-11-03 00:24:07 +0000610 udelay (100000); /* 100 ms */
wdenkc7de8292002-11-19 11:04:11 +0000611#ifdef CONFIG_AMIGAONEG3SE
612 ata_reset_time = ATA_RESET_TIME;
613 s = getenv("ide_reset_timeout");
614 if (s) ata_reset_time = 2*simple_strtol(s, NULL, 10);
615#endif
wdenkc6097192002-11-03 00:24:07 +0000616 i = 0;
617 do {
618 udelay (10000); /* 10 ms */
619
wdenk2262cfe2002-11-18 00:14:45 +0000620 c = ide_inb (dev, ATA_STATUS);
wdenkc6097192002-11-03 00:24:07 +0000621 i++;
wdenkc7de8292002-11-19 11:04:11 +0000622#ifdef CONFIG_AMIGAONEG3SE
623 if (i > (ata_reset_time * 100)) {
624#else
wdenkc6097192002-11-03 00:24:07 +0000625 if (i > (ATA_RESET_TIME * 100)) {
wdenkc7de8292002-11-19 11:04:11 +0000626#endif
wdenkc6097192002-11-03 00:24:07 +0000627 puts ("** Timeout **\n");
628 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
wdenkc7de8292002-11-19 11:04:11 +0000629#ifdef CONFIG_AMIGAONEG3SE
630 /* If this is the second bus, the first one was OK */
wdenkc40b2952004-03-13 23:29:43 +0000631 if (bus != 0) {
wdenk1a344f22005-02-03 23:00:49 +0000632 ide_bus_ok[bus] = 0;
633 goto skip_bus;
wdenkc7de8292002-11-19 11:04:11 +0000634 }
635#endif
wdenkc6097192002-11-03 00:24:07 +0000636 return;
637 }
638 if ((i >= 100) && ((i%100)==0)) {
639 putc ('.');
640 }
641 } while (c & ATA_STAT_BUSY);
642
643 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
644 puts ("not available ");
wdenk1a344f22005-02-03 23:00:49 +0000645 debug ("Status = 0x%02X ", c);
wdenkc6097192002-11-03 00:24:07 +0000646#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
647 } else if ((c & ATA_STAT_READY) == 0) {
648 puts ("not available ");
wdenk1a344f22005-02-03 23:00:49 +0000649 debug ("Status = 0x%02X ", c);
wdenkc6097192002-11-03 00:24:07 +0000650#endif
651 } else {
652 puts ("OK ");
653 ide_bus_ok[bus] = 1;
654 }
655 WATCHDOG_RESET();
656 }
wdenkc7de8292002-11-19 11:04:11 +0000657
658#ifdef CONFIG_AMIGAONEG3SE
659 skip_bus:
660#endif
wdenkc6097192002-11-03 00:24:07 +0000661 putc ('\n');
662
663 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
664
665 curr_device = -1;
666 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
667#ifdef CONFIG_IDE_LED
668 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
669#endif
wdenk5cf9da42003-11-07 13:42:26 +0000670 ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
wdenkc6097192002-11-03 00:24:07 +0000671 ide_dev_desc[i].if_type=IF_TYPE_IDE;
672 ide_dev_desc[i].dev=i;
673 ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
674 ide_dev_desc[i].blksz=0;
675 ide_dev_desc[i].lba=0;
676 ide_dev_desc[i].block_read=ide_read;
677 if (!ide_bus_ok[IDE_BUS(i)])
678 continue;
679 ide_led (led, 1); /* LED on */
680 ide_ident(&ide_dev_desc[i]);
681 ide_led (led, 0); /* LED off */
682 dev_print(&ide_dev_desc[i]);
683/* ide_print (i); */
684 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
685 init_part (&ide_dev_desc[i]); /* initialize partition type */
686 if (curr_device < 0)
687 curr_device = i;
688 }
689 }
690 WATCHDOG_RESET();
691}
692
693/* ------------------------------------------------------------------------- */
694
695block_dev_desc_t * ide_get_dev(int dev)
696{
697 return ((block_dev_desc_t *)&ide_dev_desc[dev]);
698}
699
700
701#ifdef CONFIG_IDE_8xx_DIRECT
702
703static void
704set_pcmcia_timing (int pmode)
705{
706 volatile immap_t *immr = (immap_t *)CFG_IMMR;
707 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
708 ulong timings;
709
wdenk1a344f22005-02-03 23:00:49 +0000710 debug ("Set timing for PIO Mode %d\n", pmode);
wdenkc6097192002-11-03 00:24:07 +0000711
712 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
713 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
714 | PCMCIA_SL (pio_config_clk[pmode].t_length)
715 ;
716
717 /* IDE 0
718 */
719 pcmp->pcmc_pbr0 = CFG_PCMCIA_PBR0;
720 pcmp->pcmc_por0 = CFG_PCMCIA_POR0
721#if (CFG_PCMCIA_POR0 != 0)
722 | timings
723#endif
724 ;
wdenk1a344f22005-02-03 23:00:49 +0000725 debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
wdenkc6097192002-11-03 00:24:07 +0000726
727 pcmp->pcmc_pbr1 = CFG_PCMCIA_PBR1;
728 pcmp->pcmc_por1 = CFG_PCMCIA_POR1
729#if (CFG_PCMCIA_POR1 != 0)
730 | timings
731#endif
732 ;
wdenk1a344f22005-02-03 23:00:49 +0000733 debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
wdenkc6097192002-11-03 00:24:07 +0000734
735 pcmp->pcmc_pbr2 = CFG_PCMCIA_PBR2;
736 pcmp->pcmc_por2 = CFG_PCMCIA_POR2
737#if (CFG_PCMCIA_POR2 != 0)
738 | timings
739#endif
740 ;
wdenk1a344f22005-02-03 23:00:49 +0000741 debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
wdenkc6097192002-11-03 00:24:07 +0000742
743 pcmp->pcmc_pbr3 = CFG_PCMCIA_PBR3;
744 pcmp->pcmc_por3 = CFG_PCMCIA_POR3
745#if (CFG_PCMCIA_POR3 != 0)
746 | timings
747#endif
748 ;
wdenk1a344f22005-02-03 23:00:49 +0000749 debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
wdenkc6097192002-11-03 00:24:07 +0000750
751 /* IDE 1
752 */
753 pcmp->pcmc_pbr4 = CFG_PCMCIA_PBR4;
754 pcmp->pcmc_por4 = CFG_PCMCIA_POR4
755#if (CFG_PCMCIA_POR4 != 0)
756 | timings
757#endif
758 ;
wdenk1a344f22005-02-03 23:00:49 +0000759 debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
wdenkc6097192002-11-03 00:24:07 +0000760
761 pcmp->pcmc_pbr5 = CFG_PCMCIA_PBR5;
762 pcmp->pcmc_por5 = CFG_PCMCIA_POR5
763#if (CFG_PCMCIA_POR5 != 0)
764 | timings
765#endif
766 ;
wdenk1a344f22005-02-03 23:00:49 +0000767 debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
wdenkc6097192002-11-03 00:24:07 +0000768
769 pcmp->pcmc_pbr6 = CFG_PCMCIA_PBR6;
770 pcmp->pcmc_por6 = CFG_PCMCIA_POR6
771#if (CFG_PCMCIA_POR6 != 0)
772 | timings
773#endif
774 ;
wdenk1a344f22005-02-03 23:00:49 +0000775 debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
wdenkc6097192002-11-03 00:24:07 +0000776
777 pcmp->pcmc_pbr7 = CFG_PCMCIA_PBR7;
778 pcmp->pcmc_por7 = CFG_PCMCIA_POR7
779#if (CFG_PCMCIA_POR7 != 0)
780 | timings
781#endif
782 ;
wdenk1a344f22005-02-03 23:00:49 +0000783 debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
wdenkc6097192002-11-03 00:24:07 +0000784
785}
786
787#endif /* CONFIG_IDE_8xx_DIRECT */
788
789/* ------------------------------------------------------------------------- */
790
wdenkdb01a2e2004-04-15 23:14:49 +0000791#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
wdenkc6097192002-11-03 00:24:07 +0000792static void __inline__
wdenk2262cfe2002-11-18 00:14:45 +0000793ide_outb(int dev, int port, unsigned char val)
wdenkc6097192002-11-03 00:24:07 +0000794{
wdenk1a344f22005-02-03 23:00:49 +0000795 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
wdenk9fd5e312003-12-07 23:55:12 +0000796 dev, port, val, (ATA_CURR_BASE(dev)+port));
wdenkd4ca31c2004-01-02 14:00:00 +0000797
wdenkc6097192002-11-03 00:24:07 +0000798 /* Ensure I/O operations complete */
wdenk5cf91d62004-04-23 20:32:05 +0000799 EIEIO;
wdenkc6097192002-11-03 00:24:07 +0000800 *((uchar *)(ATA_CURR_BASE(dev)+port)) = val;
wdenkc6097192002-11-03 00:24:07 +0000801}
wdenk2262cfe2002-11-18 00:14:45 +0000802#else /* ! __PPC__ */
803static void __inline__
804ide_outb(int dev, int port, unsigned char val)
805{
wdenk15647dc2003-10-09 19:00:25 +0000806 outb(val, ATA_CURR_BASE(dev)+port);
wdenk2262cfe2002-11-18 00:14:45 +0000807}
808#endif /* __PPC__ */
wdenkc6097192002-11-03 00:24:07 +0000809
wdenk2262cfe2002-11-18 00:14:45 +0000810
wdenkdb01a2e2004-04-15 23:14:49 +0000811#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
wdenkc6097192002-11-03 00:24:07 +0000812static unsigned char __inline__
wdenk2262cfe2002-11-18 00:14:45 +0000813ide_inb(int dev, int port)
wdenkc6097192002-11-03 00:24:07 +0000814{
815 uchar val;
816 /* Ensure I/O operations complete */
wdenk5cf91d62004-04-23 20:32:05 +0000817 EIEIO;
wdenkc6097192002-11-03 00:24:07 +0000818 val = *((uchar *)(ATA_CURR_BASE(dev)+port));
wdenk1a344f22005-02-03 23:00:49 +0000819 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
wdenk9fd5e312003-12-07 23:55:12 +0000820 dev, port, (ATA_CURR_BASE(dev)+port), val);
wdenkc6097192002-11-03 00:24:07 +0000821 return (val);
822}
wdenk2262cfe2002-11-18 00:14:45 +0000823#else /* ! __PPC__ */
824static unsigned char __inline__
825ide_inb(int dev, int port)
826{
wdenk15647dc2003-10-09 19:00:25 +0000827 return inb(ATA_CURR_BASE(dev)+port);
wdenk2262cfe2002-11-18 00:14:45 +0000828}
829#endif /* __PPC__ */
wdenkc6097192002-11-03 00:24:07 +0000830
wdenk2262cfe2002-11-18 00:14:45 +0000831#ifdef __PPC__
wdenkcceb8712003-06-23 18:12:28 +0000832# ifdef CONFIG_AMIGAONEG3SE
wdenkc7de8292002-11-19 11:04:11 +0000833static void
834output_data_short(int dev, ulong *sect_buf, int words)
835{
836 ushort *dbuf;
837 volatile ushort *pbuf;
wdenk8bde7f72003-06-27 21:31:46 +0000838
wdenkc7de8292002-11-19 11:04:11 +0000839 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
840 dbuf = (ushort *)sect_buf;
841 while (words--) {
wdenk5cf91d62004-04-23 20:32:05 +0000842 EIEIO;
wdenkc7de8292002-11-19 11:04:11 +0000843 *pbuf = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +0000844 EIEIO;
wdenkc7de8292002-11-19 11:04:11 +0000845 }
846
847 if (words&1)
wdenk1a344f22005-02-03 23:00:49 +0000848 *pbuf = 0;
wdenkc7de8292002-11-19 11:04:11 +0000849}
wdenkcceb8712003-06-23 18:12:28 +0000850# endif /* CONFIG_AMIGAONEG3SE */
wdenk5da627a2003-10-09 20:09:04 +0000851#endif /* __PPC_ */
wdenkc7de8292002-11-19 11:04:11 +0000852
wdenk5da627a2003-10-09 20:09:04 +0000853/* We only need to swap data if we are running on a big endian cpu. */
854/* But Au1x00 cpu:s already swaps data in big endian mode! */
855#if defined(__LITTLE_ENDIAN) || defined(CONFIG_AU1X00)
856#define input_swap_data(x,y,z) input_data(x,y,z)
857#else
wdenkc6097192002-11-03 00:24:07 +0000858static void
859input_swap_data(int dev, ulong *sect_buf, int words)
860{
wdenk1a344f22005-02-03 23:00:49 +0000861#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +0000862 uchar i;
863 volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
864 volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
865 ushort *dbuf = (ushort *)sect_buf;
866
867 while (words--) {
868 for (i=0; i<2; i++) {
869 *(((uchar *)(dbuf)) + 1) = *pbuf_even;
870 *(uchar *)dbuf = *pbuf_odd;
871 dbuf+=1;
872 }
873 }
wdenkf4733a02005-03-06 01:21:30 +0000874#else
wdenk1a344f22005-02-03 23:00:49 +0000875 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
876 ushort *dbuf = (ushort *)sect_buf;
877
878 debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
879
880 while (words--) {
881 *dbuf++ = ld_le16(pbuf);
882 *dbuf++ = ld_le16(pbuf);
883 }
884#endif
wdenkc6097192002-11-03 00:24:07 +0000885}
wdenk5da627a2003-10-09 20:09:04 +0000886#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
wdenkc6097192002-11-03 00:24:07 +0000887
wdenk2262cfe2002-11-18 00:14:45 +0000888
wdenkdb01a2e2004-04-15 23:14:49 +0000889#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
wdenkc6097192002-11-03 00:24:07 +0000890static void
891output_data(int dev, ulong *sect_buf, int words)
892{
wdenk1a344f22005-02-03 23:00:49 +0000893#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +0000894 uchar *dbuf;
895 volatile uchar *pbuf_even;
896 volatile uchar *pbuf_odd;
897
898 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
899 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
900 dbuf = (uchar *)sect_buf;
901 while (words--) {
wdenk5cf91d62004-04-23 20:32:05 +0000902 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000903 *pbuf_even = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +0000904 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000905 *pbuf_odd = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +0000906 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000907 *pbuf_even = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +0000908 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000909 *pbuf_odd = *dbuf++;
910 }
wdenk1a344f22005-02-03 23:00:49 +0000911#else
912 ushort *dbuf;
913 volatile ushort *pbuf;
914
915 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
916 dbuf = (ushort *)sect_buf;
917 while (words--) {
918 EIEIO;
919 *pbuf = *dbuf++;
920 EIEIO;
921 *pbuf = *dbuf++;
922 }
923#endif
wdenkc6097192002-11-03 00:24:07 +0000924}
wdenk2262cfe2002-11-18 00:14:45 +0000925#else /* ! __PPC__ */
926static void
927output_data(int dev, ulong *sect_buf, int words)
928{
wdenk15647dc2003-10-09 19:00:25 +0000929 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
wdenk2262cfe2002-11-18 00:14:45 +0000930}
931#endif /* __PPC__ */
wdenkc6097192002-11-03 00:24:07 +0000932
wdenkdb01a2e2004-04-15 23:14:49 +0000933#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
wdenkc6097192002-11-03 00:24:07 +0000934static void
935input_data(int dev, ulong *sect_buf, int words)
936{
wdenk1a344f22005-02-03 23:00:49 +0000937#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +0000938 uchar *dbuf;
939 volatile uchar *pbuf_even;
940 volatile uchar *pbuf_odd;
941
942 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
943 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
944 dbuf = (uchar *)sect_buf;
945 while (words--) {
wdenka522fa02004-01-04 22:51:12 +0000946 *dbuf++ = *pbuf_even;
wdenk5cf91d62004-04-23 20:32:05 +0000947 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +0000948 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000949 *dbuf++ = *pbuf_odd;
wdenk5cf91d62004-04-23 20:32:05 +0000950 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +0000951 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000952 *dbuf++ = *pbuf_even;
wdenk5cf91d62004-04-23 20:32:05 +0000953 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +0000954 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000955 *dbuf++ = *pbuf_odd;
wdenk1a344f22005-02-03 23:00:49 +0000956 EIEIO;
957 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000958 }
wdenk1a344f22005-02-03 23:00:49 +0000959#else
960 ushort *dbuf;
961 volatile ushort *pbuf;
962
963 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
964 dbuf = (ushort *)sect_buf;
965
966 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
967
968 while (words--) {
969 EIEIO;
970 *dbuf++ = *pbuf;
971 EIEIO;
972 *dbuf++ = *pbuf;
973 }
974#endif
wdenkc6097192002-11-03 00:24:07 +0000975}
wdenk2262cfe2002-11-18 00:14:45 +0000976#else /* ! __PPC__ */
977static void
978input_data(int dev, ulong *sect_buf, int words)
979{
wdenk15647dc2003-10-09 19:00:25 +0000980 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
wdenk2262cfe2002-11-18 00:14:45 +0000981}
982
983#endif /* __PPC__ */
wdenkc6097192002-11-03 00:24:07 +0000984
wdenkc7de8292002-11-19 11:04:11 +0000985#ifdef CONFIG_AMIGAONEG3SE
986static void
987input_data_short(int dev, ulong *sect_buf, int words)
988{
989 ushort *dbuf;
990 volatile ushort *pbuf;
991
992 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
993 dbuf = (ushort *)sect_buf;
994 while (words--) {
wdenk5cf91d62004-04-23 20:32:05 +0000995 EIEIO;
wdenkc7de8292002-11-19 11:04:11 +0000996 *dbuf++ = *pbuf;
wdenk5cf91d62004-04-23 20:32:05 +0000997 EIEIO;
wdenkc7de8292002-11-19 11:04:11 +0000998 }
999
wdenkc40b2952004-03-13 23:29:43 +00001000 if (words&1) {
wdenk1a344f22005-02-03 23:00:49 +00001001 ushort dummy;
1002 dummy = *pbuf;
wdenkc7de8292002-11-19 11:04:11 +00001003 }
1004}
1005#endif
1006
wdenkc6097192002-11-03 00:24:07 +00001007/* -------------------------------------------------------------------------
1008 */
1009static void ide_ident (block_dev_desc_t *dev_desc)
1010{
1011 ulong iobuf[ATA_SECTORWORDS];
1012 unsigned char c;
1013 hd_driveid_t *iop = (hd_driveid_t *)iobuf;
1014
wdenkc7de8292002-11-19 11:04:11 +00001015#ifdef CONFIG_AMIGAONEG3SE
1016 int max_bus_scan;
wdenkc7de8292002-11-19 11:04:11 +00001017 char *s;
wdenk64f70be2004-09-28 20:34:50 +00001018#endif
1019#ifdef CONFIG_ATAPI
1020 int retries = 0;
wdenkc7de8292002-11-19 11:04:11 +00001021 int do_retry = 0;
1022#endif
1023
wdenkc6097192002-11-03 00:24:07 +00001024#if 0
1025 int mode, cycle_time;
1026#endif
1027 int device;
1028 device=dev_desc->dev;
1029 printf (" Device %d: ", device);
1030
wdenkc7de8292002-11-19 11:04:11 +00001031#ifdef CONFIG_AMIGAONEG3SE
1032 s = getenv("ide_maxbus");
1033 if (s) {
1034 max_bus_scan = simple_strtol(s, NULL, 10);
1035 } else {
1036 max_bus_scan = CFG_IDE_MAXBUS;
1037 }
1038 if (device >= max_bus_scan*2) {
1039 dev_desc->type=DEV_TYPE_UNKNOWN;
1040 return;
1041 }
1042#endif
1043
wdenkc6097192002-11-03 00:24:07 +00001044 ide_led (DEVICE_LED(device), 1); /* LED on */
1045 /* Select device
1046 */
wdenk2262cfe2002-11-18 00:14:45 +00001047 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001048 dev_desc->if_type=IF_TYPE_IDE;
1049#ifdef CONFIG_ATAPI
wdenkc7de8292002-11-19 11:04:11 +00001050
wdenkc7de8292002-11-19 11:04:11 +00001051 do_retry = 0;
1052 retries = 0;
1053
1054 /* Warning: This will be tricky to read */
wdenkc40b2952004-03-13 23:29:43 +00001055 while (retries <= 1) {
wdenkc6097192002-11-03 00:24:07 +00001056 /* check signature */
wdenk2262cfe2002-11-18 00:14:45 +00001057 if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
1058 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
1059 (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
1060 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
wdenkc6097192002-11-03 00:24:07 +00001061 /* ATAPI Signature found */
1062 dev_desc->if_type=IF_TYPE_ATAPI;
1063 /* Start Ident Command
1064 */
wdenk2262cfe2002-11-18 00:14:45 +00001065 ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
wdenkc6097192002-11-03 00:24:07 +00001066 /*
1067 * Wait for completion - ATAPI devices need more time
1068 * to become ready
1069 */
1070 c = ide_wait (device, ATAPI_TIME_OUT);
wdenkc40b2952004-03-13 23:29:43 +00001071 } else
wdenkc6097192002-11-03 00:24:07 +00001072#endif
1073 {
1074 /* Start Ident Command
1075 */
wdenk2262cfe2002-11-18 00:14:45 +00001076 ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
wdenkc6097192002-11-03 00:24:07 +00001077
1078 /* Wait for completion
1079 */
1080 c = ide_wait (device, IDE_TIME_OUT);
1081 }
1082 ide_led (DEVICE_LED(device), 0); /* LED off */
1083
1084 if (((c & ATA_STAT_DRQ) == 0) ||
1085 ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
wdenk64f70be2004-09-28 20:34:50 +00001086#ifdef CONFIG_ATAPI
wdenkc7de8292002-11-19 11:04:11 +00001087#ifdef CONFIG_AMIGAONEG3SE
wdenk64f70be2004-09-28 20:34:50 +00001088 s = getenv("ide_doreset");
1089 if (s && strcmp(s, "on") == 0)
1090#endif
wdenk1a344f22005-02-03 23:00:49 +00001091 {
1092 /* Need to soft reset the device in case it's an ATAPI... */
1093 debug ("Retrying...\n");
1094 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1095 udelay(100000);
1096 ide_outb (device, ATA_COMMAND, 0x08);
1097 udelay (500000); /* 500 ms */
1098 }
wdenk64f70be2004-09-28 20:34:50 +00001099 /* Select device
1100 */
1101 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1102 retries++;
wdenkc7de8292002-11-19 11:04:11 +00001103#else
wdenkc6097192002-11-03 00:24:07 +00001104 return;
wdenk64f70be2004-09-28 20:34:50 +00001105#endif
wdenkc6097192002-11-03 00:24:07 +00001106 }
wdenk64f70be2004-09-28 20:34:50 +00001107#ifdef CONFIG_ATAPI
1108 else
1109 break;
wdenkc7de8292002-11-19 11:04:11 +00001110 } /* see above - ugly to read */
wdenk64f70be2004-09-28 20:34:50 +00001111
1112 if (retries == 2) /* Not found */
1113 return;
1114#endif
wdenkc7de8292002-11-19 11:04:11 +00001115
wdenkc6097192002-11-03 00:24:07 +00001116 input_swap_data (device, iobuf, ATA_SECTORWORDS);
1117
1118 ident_cpy (dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
1119 ident_cpy (dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
1120 ident_cpy (dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
wdenkc3f9d492004-03-14 00:59:59 +00001121#ifdef __LITTLE_ENDIAN
1122 /*
1123 * firmware revision and model number have Big Endian Byte
1124 * order in Word. Convert both to little endian.
1125 *
1126 * See CF+ and CompactFlash Specification Revision 2.0:
1127 * 6.2.1.6: Identfy Drive, Table 39 for more details
1128 */
1129
1130 strswab (dev_desc->revision);
1131 strswab (dev_desc->vendor);
1132#endif /* __LITTLE_ENDIAN */
wdenkc6097192002-11-03 00:24:07 +00001133
1134 if ((iop->config & 0x0080)==0x0080)
1135 dev_desc->removable = 1;
1136 else
1137 dev_desc->removable = 0;
1138
1139#if 0
1140 /*
1141 * Drive PIO mode autoselection
1142 */
1143 mode = iop->tPIO;
1144
1145 printf ("tPIO = 0x%02x = %d\n",mode, mode);
1146 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1147 mode = 2;
wdenk1a344f22005-02-03 23:00:49 +00001148 debug ("Override tPIO -> 2\n");
wdenkc6097192002-11-03 00:24:07 +00001149 }
1150 if (iop->field_valid & 2) { /* drive implements ATA2? */
wdenk1a344f22005-02-03 23:00:49 +00001151 debug ("Drive implements ATA2\n");
wdenkc6097192002-11-03 00:24:07 +00001152 if (iop->capability & 8) { /* drive supports use_iordy? */
1153 cycle_time = iop->eide_pio_iordy;
1154 } else {
1155 cycle_time = iop->eide_pio;
1156 }
wdenk1a344f22005-02-03 23:00:49 +00001157 debug ("cycle time = %d\n", cycle_time);
wdenkc6097192002-11-03 00:24:07 +00001158 mode = 4;
1159 if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
1160 if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
1161 if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
1162 if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
1163 }
1164 printf ("PIO mode to use: PIO %d\n", mode);
1165#endif /* 0 */
1166
1167#ifdef CONFIG_ATAPI
1168 if (dev_desc->if_type==IF_TYPE_ATAPI) {
1169 atapi_inquiry(dev_desc);
1170 return;
1171 }
1172#endif /* CONFIG_ATAPI */
1173
wdenkc3f9d492004-03-14 00:59:59 +00001174#ifdef __BIG_ENDIAN
wdenkc6097192002-11-03 00:24:07 +00001175 /* swap shorts */
1176 dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
wdenkc3f9d492004-03-14 00:59:59 +00001177#else /* ! __BIG_ENDIAN */
1178 /*
1179 * do not swap shorts on little endian
1180 *
1181 * See CF+ and CompactFlash Specification Revision 2.0:
1182 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1183 */
1184 dev_desc->lba = iop->lba_capacity;
1185#endif /* __BIG_ENDIAN */
wdenkc40b2952004-03-13 23:29:43 +00001186
wdenk42dfe7a2004-03-14 22:25:36 +00001187#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001188 if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
wdenk6e592382004-04-18 17:39:38 +00001189 dev_desc->lba48 = 1;
1190 dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
wdenkc40b2952004-03-13 23:29:43 +00001191 ((unsigned long long)iop->lba48_capacity[1] << 16) |
1192 ((unsigned long long)iop->lba48_capacity[2] << 32) |
1193 ((unsigned long long)iop->lba48_capacity[3] << 48);
1194 } else {
wdenkc40b2952004-03-13 23:29:43 +00001195 dev_desc->lba48 = 0;
1196 }
1197#endif /* CONFIG_LBA48 */
wdenkc6097192002-11-03 00:24:07 +00001198 /* assuming HD */
1199 dev_desc->type=DEV_TYPE_HARDDISK;
1200 dev_desc->blksz=ATA_BLOCKSIZE;
1201 dev_desc->lun=0; /* just to fill something in... */
1202
1203#if 0 /* only used to test the powersaving mode,
1204 * if enabled, the drive goes after 5 sec
1205 * in standby mode */
wdenk2262cfe2002-11-18 00:14:45 +00001206 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001207 c = ide_wait (device, IDE_TIME_OUT);
wdenk2262cfe2002-11-18 00:14:45 +00001208 ide_outb (device, ATA_SECT_CNT, 1);
1209 ide_outb (device, ATA_LBA_LOW, 0);
1210 ide_outb (device, ATA_LBA_MID, 0);
1211 ide_outb (device, ATA_LBA_HIGH, 0);
wdenk1a344f22005-02-03 23:00:49 +00001212 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenk2262cfe2002-11-18 00:14:45 +00001213 ide_outb (device, ATA_COMMAND, 0xe3);
wdenkc6097192002-11-03 00:24:07 +00001214 udelay (50);
1215 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1216#endif
1217}
1218
1219
1220/* ------------------------------------------------------------------------- */
1221
wdenkc40b2952004-03-13 23:29:43 +00001222ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, ulong *buffer)
wdenkc6097192002-11-03 00:24:07 +00001223{
1224 ulong n = 0;
1225 unsigned char c;
1226 unsigned char pwrsave=0; /* power save */
wdenk42dfe7a2004-03-14 22:25:36 +00001227#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001228 unsigned char lba48 = 0;
wdenkc6097192002-11-03 00:24:07 +00001229
wdenkc40b2952004-03-13 23:29:43 +00001230 if (blknr & 0x0000fffff0000000) {
1231 /* more than 28 bits used, use 48bit mode */
1232 lba48 = 1;
1233 }
1234#endif
wdenk1a344f22005-02-03 23:00:49 +00001235 debug ("ide_read dev %d start %qX, blocks %lX buffer at %lX\n",
wdenkc6097192002-11-03 00:24:07 +00001236 device, blknr, blkcnt, (ulong)buffer);
1237
1238 ide_led (DEVICE_LED(device), 1); /* LED on */
1239
1240 /* Select device
1241 */
wdenk2262cfe2002-11-18 00:14:45 +00001242 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001243 c = ide_wait (device, IDE_TIME_OUT);
1244
1245 if (c & ATA_STAT_BUSY) {
1246 printf ("IDE read: device %d not ready\n", device);
1247 goto IDE_READ_E;
1248 }
1249
1250 /* first check if the drive is in Powersaving mode, if yes,
1251 * increase the timeout value */
wdenk2262cfe2002-11-18 00:14:45 +00001252 ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
wdenkc6097192002-11-03 00:24:07 +00001253 udelay (50);
1254
1255 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1256
1257 if (c & ATA_STAT_BUSY) {
1258 printf ("IDE read: device %d not ready\n", device);
1259 goto IDE_READ_E;
1260 }
1261 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1262 printf ("No Powersaving mode %X\n", c);
1263 } else {
wdenk2262cfe2002-11-18 00:14:45 +00001264 c = ide_inb(device,ATA_SECT_CNT);
wdenk1a344f22005-02-03 23:00:49 +00001265 debug ("Powersaving %02X\n",c);
wdenkc6097192002-11-03 00:24:07 +00001266 if(c==0)
1267 pwrsave=1;
1268 }
1269
1270
1271 while (blkcnt-- > 0) {
1272
1273 c = ide_wait (device, IDE_TIME_OUT);
1274
1275 if (c & ATA_STAT_BUSY) {
1276 printf ("IDE read: device %d not ready\n", device);
1277 break;
1278 }
wdenk42dfe7a2004-03-14 22:25:36 +00001279#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001280 if (lba48) {
1281 /* write high bits */
1282 ide_outb (device, ATA_SECT_CNT, 0);
1283 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1284 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1285 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1286 }
1287#endif
wdenk2262cfe2002-11-18 00:14:45 +00001288 ide_outb (device, ATA_SECT_CNT, 1);
1289 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1290 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1291 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
wdenkc40b2952004-03-13 23:29:43 +00001292
wdenk42dfe7a2004-03-14 22:25:36 +00001293#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001294 if (lba48) {
1295 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1296 ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
1297
1298 } else
1299#endif
1300 {
1301 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1302 ATA_DEVICE(device) |
1303 ((blknr >> 24) & 0xF) );
1304 ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
1305 }
wdenkc6097192002-11-03 00:24:07 +00001306
1307 udelay (50);
1308
1309 if(pwrsave) {
1310 c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
1311 pwrsave=0;
1312 } else {
1313 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1314 }
1315
1316 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
wdenk42dfe7a2004-03-14 22:25:36 +00001317#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
wdenkc40b2952004-03-13 23:29:43 +00001318 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
wdenkc6097192002-11-03 00:24:07 +00001319 device, blknr, c);
wdenkc40b2952004-03-13 23:29:43 +00001320#else
1321 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1322 device, (ulong)blknr, c);
1323#endif
wdenkc6097192002-11-03 00:24:07 +00001324 break;
1325 }
1326
1327 input_data (device, buffer, ATA_SECTORWORDS);
wdenk2262cfe2002-11-18 00:14:45 +00001328 (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
wdenkc6097192002-11-03 00:24:07 +00001329
1330 ++n;
1331 ++blknr;
1332 buffer += ATA_SECTORWORDS;
1333 }
1334IDE_READ_E:
1335 ide_led (DEVICE_LED(device), 0); /* LED off */
1336 return (n);
1337}
1338
1339/* ------------------------------------------------------------------------- */
1340
1341
wdenkc40b2952004-03-13 23:29:43 +00001342ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, ulong *buffer)
wdenkc6097192002-11-03 00:24:07 +00001343{
1344 ulong n = 0;
1345 unsigned char c;
wdenk42dfe7a2004-03-14 22:25:36 +00001346#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001347 unsigned char lba48 = 0;
1348
1349 if (blknr & 0x0000fffff0000000) {
1350 /* more than 28 bits used, use 48bit mode */
1351 lba48 = 1;
1352 }
1353#endif
wdenkc6097192002-11-03 00:24:07 +00001354
1355 ide_led (DEVICE_LED(device), 1); /* LED on */
1356
1357 /* Select device
1358 */
wdenk2262cfe2002-11-18 00:14:45 +00001359 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001360
1361 while (blkcnt-- > 0) {
1362
1363 c = ide_wait (device, IDE_TIME_OUT);
1364
1365 if (c & ATA_STAT_BUSY) {
1366 printf ("IDE read: device %d not ready\n", device);
1367 goto WR_OUT;
1368 }
wdenk42dfe7a2004-03-14 22:25:36 +00001369#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001370 if (lba48) {
1371 /* write high bits */
1372 ide_outb (device, ATA_SECT_CNT, 0);
1373 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1374 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1375 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1376 }
1377#endif
wdenk2262cfe2002-11-18 00:14:45 +00001378 ide_outb (device, ATA_SECT_CNT, 1);
1379 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1380 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1381 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
wdenkc40b2952004-03-13 23:29:43 +00001382
wdenk42dfe7a2004-03-14 22:25:36 +00001383#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001384 if (lba48) {
1385 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1386 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1387
1388 } else
1389#endif
1390 {
1391 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1392 ATA_DEVICE(device) |
1393 ((blknr >> 24) & 0xF) );
1394 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
1395 }
wdenkc6097192002-11-03 00:24:07 +00001396
1397 udelay (50);
1398
1399 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1400
1401 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
wdenk42dfe7a2004-03-14 22:25:36 +00001402#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
wdenkc40b2952004-03-13 23:29:43 +00001403 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
wdenkc6097192002-11-03 00:24:07 +00001404 device, blknr, c);
wdenkc40b2952004-03-13 23:29:43 +00001405#else
1406 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1407 device, (ulong)blknr, c);
1408#endif
wdenkc6097192002-11-03 00:24:07 +00001409 goto WR_OUT;
1410 }
1411
1412 output_data (device, buffer, ATA_SECTORWORDS);
wdenk2262cfe2002-11-18 00:14:45 +00001413 c = ide_inb (device, ATA_STATUS); /* clear IRQ */
wdenkc6097192002-11-03 00:24:07 +00001414 ++n;
1415 ++blknr;
1416 buffer += ATA_SECTORWORDS;
1417 }
1418WR_OUT:
1419 ide_led (DEVICE_LED(device), 0); /* LED off */
1420 return (n);
1421}
1422
1423/* ------------------------------------------------------------------------- */
1424
1425/*
1426 * copy src to dest, skipping leading and trailing blanks and null
1427 * terminate the string
wdenk7d7ce412004-03-17 01:13:07 +00001428 * "len" is the size of available memory including the terminating '\0'
wdenkc6097192002-11-03 00:24:07 +00001429 */
wdenk7d7ce412004-03-17 01:13:07 +00001430static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
wdenkc6097192002-11-03 00:24:07 +00001431{
wdenk7d7ce412004-03-17 01:13:07 +00001432 unsigned char *end, *last;
wdenkc6097192002-11-03 00:24:07 +00001433
wdenk7d7ce412004-03-17 01:13:07 +00001434 last = dst;
wdenk6fb6af62004-03-23 23:20:24 +00001435 end = src + len - 1;
wdenk7d7ce412004-03-17 01:13:07 +00001436
1437 /* reserve space for '\0' */
1438 if (len < 2)
1439 goto OUT;
wdenkefa329c2004-03-23 20:18:25 +00001440
wdenk7d7ce412004-03-17 01:13:07 +00001441 /* skip leading white space */
1442 while ((*src) && (src<end) && (*src==' '))
1443 ++src;
1444
1445 /* copy string, omitting trailing white space */
1446 while ((*src) && (src<end)) {
1447 *dst++ = *src;
1448 if (*src++ != ' ')
1449 last = dst;
wdenkc6097192002-11-03 00:24:07 +00001450 }
wdenk7d7ce412004-03-17 01:13:07 +00001451OUT:
1452 *last = '\0';
wdenkc6097192002-11-03 00:24:07 +00001453}
1454
1455/* ------------------------------------------------------------------------- */
1456
1457/*
1458 * Wait until Busy bit is off, or timeout (in ms)
1459 * Return last status
1460 */
1461static uchar ide_wait (int dev, ulong t)
1462{
1463 ulong delay = 10 * t; /* poll every 100 us */
1464 uchar c;
1465
wdenk2262cfe2002-11-18 00:14:45 +00001466 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
wdenkc6097192002-11-03 00:24:07 +00001467 udelay (100);
1468 if (delay-- == 0) {
1469 break;
1470 }
1471 }
1472 return (c);
1473}
1474
1475/* ------------------------------------------------------------------------- */
1476
1477#ifdef CONFIG_IDE_RESET
1478extern void ide_set_reset(int idereset);
1479
1480static void ide_reset (void)
1481{
1482#if defined(CFG_PB_12V_ENABLE) || defined(CFG_PB_IDE_MOTOR)
1483 volatile immap_t *immr = (immap_t *)CFG_IMMR;
1484#endif
1485 int i;
1486
1487 curr_device = -1;
1488 for (i=0; i<CFG_IDE_MAXBUS; ++i)
1489 ide_bus_ok[i] = 0;
1490 for (i=0; i<CFG_IDE_MAXDEVICE; ++i)
1491 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1492
1493 ide_set_reset (1); /* assert reset */
1494
1495 WATCHDOG_RESET();
1496
1497#ifdef CFG_PB_12V_ENABLE
1498 immr->im_cpm.cp_pbdat &= ~(CFG_PB_12V_ENABLE); /* 12V Enable output OFF */
1499 immr->im_cpm.cp_pbpar &= ~(CFG_PB_12V_ENABLE);
1500 immr->im_cpm.cp_pbodr &= ~(CFG_PB_12V_ENABLE);
1501 immr->im_cpm.cp_pbdir |= CFG_PB_12V_ENABLE;
1502
1503 /* wait 500 ms for the voltage to stabilize
1504 */
1505 for (i=0; i<500; ++i) {
1506 udelay (1000);
1507 }
1508
1509 immr->im_cpm.cp_pbdat |= CFG_PB_12V_ENABLE; /* 12V Enable output ON */
1510#endif /* CFG_PB_12V_ENABLE */
1511
1512#ifdef CFG_PB_IDE_MOTOR
1513 /* configure IDE Motor voltage monitor pin as input */
1514 immr->im_cpm.cp_pbpar &= ~(CFG_PB_IDE_MOTOR);
1515 immr->im_cpm.cp_pbodr &= ~(CFG_PB_IDE_MOTOR);
1516 immr->im_cpm.cp_pbdir &= ~(CFG_PB_IDE_MOTOR);
1517
1518 /* wait up to 1 s for the motor voltage to stabilize
1519 */
1520 for (i=0; i<1000; ++i) {
1521 if ((immr->im_cpm.cp_pbdat & CFG_PB_IDE_MOTOR) != 0) {
1522 break;
1523 }
1524 udelay (1000);
1525 }
1526
1527 if (i == 1000) { /* Timeout */
1528 printf ("\nWarning: 5V for IDE Motor missing\n");
1529# ifdef CONFIG_STATUS_LED
1530# ifdef STATUS_LED_YELLOW
1531 status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
1532# endif
1533# ifdef STATUS_LED_GREEN
1534 status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
1535# endif
1536# endif /* CONFIG_STATUS_LED */
1537 }
1538#endif /* CFG_PB_IDE_MOTOR */
1539
1540 WATCHDOG_RESET();
1541
1542 /* de-assert RESET signal */
1543 ide_set_reset(0);
1544
1545 /* wait 250 ms */
1546 for (i=0; i<250; ++i) {
1547 udelay (1000);
1548 }
1549}
1550
1551#endif /* CONFIG_IDE_RESET */
1552
1553/* ------------------------------------------------------------------------- */
1554
wdenke2ffd592004-12-31 09:32:47 +00001555#if defined(CONFIG_IDE_LED) && \
1556 !defined(CONFIG_AMIGAONEG3SE)&& \
1557 !defined(CONFIG_CPC45) && \
1558 !defined(CONFIG_HMI10) && \
1559 !defined(CONFIG_KUP4K) && \
1560 !defined(CONFIG_KUP4X)
wdenkc6097192002-11-03 00:24:07 +00001561
1562static uchar led_buffer = 0; /* Buffer for current LED status */
1563
1564static void ide_led (uchar led, uchar status)
1565{
1566 uchar *led_port = LED_PORT;
1567
1568 if (status) { /* switch LED on */
1569 led_buffer |= led;
1570 } else { /* switch LED off */
1571 led_buffer &= ~led;
1572 }
1573
1574 *led_port = led_buffer;
1575}
1576
1577#endif /* CONFIG_IDE_LED */
1578
1579/* ------------------------------------------------------------------------- */
1580
1581#ifdef CONFIG_ATAPI
1582/****************************************************************************
1583 * ATAPI Support
1584 */
1585
wdenkdb01a2e2004-04-15 23:14:49 +00001586#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
wdenkc6097192002-11-03 00:24:07 +00001587/* since ATAPI may use commands with not 4 bytes alligned length
1588 * we have our own transfer functions, 2 bytes alligned */
1589static void
1590output_data_shorts(int dev, ushort *sect_buf, int shorts)
1591{
wdenk1a344f22005-02-03 23:00:49 +00001592#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +00001593 uchar *dbuf;
1594 volatile uchar *pbuf_even;
1595 volatile uchar *pbuf_odd;
1596
1597 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1598 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1599 while (shorts--) {
wdenk5cf91d62004-04-23 20:32:05 +00001600 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001601 *pbuf_even = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +00001602 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001603 *pbuf_odd = *dbuf++;
1604 }
wdenk1a344f22005-02-03 23:00:49 +00001605#else
wdenkc6097192002-11-03 00:24:07 +00001606 ushort *dbuf;
1607 volatile ushort *pbuf;
1608
1609 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1610 dbuf = (ushort *)sect_buf;
wdenkdb01a2e2004-04-15 23:14:49 +00001611
wdenk1a344f22005-02-03 23:00:49 +00001612 debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
wdenkdb01a2e2004-04-15 23:14:49 +00001613
wdenkc6097192002-11-03 00:24:07 +00001614 while (shorts--) {
wdenk5cf91d62004-04-23 20:32:05 +00001615 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +00001616 *pbuf = *dbuf++;
wdenkc6097192002-11-03 00:24:07 +00001617 }
wdenk1a344f22005-02-03 23:00:49 +00001618#endif
1619}
1620
1621static void
1622input_data_shorts(int dev, ushort *sect_buf, int shorts)
1623{
1624#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +00001625 uchar *dbuf;
1626 volatile uchar *pbuf_even;
1627 volatile uchar *pbuf_odd;
1628
1629 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1630 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1631 while (shorts--) {
wdenk5cf91d62004-04-23 20:32:05 +00001632 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001633 *dbuf++ = *pbuf_even;
wdenk5cf91d62004-04-23 20:32:05 +00001634 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001635 *dbuf++ = *pbuf_odd;
1636 }
wdenk1a344f22005-02-03 23:00:49 +00001637#else
1638 ushort *dbuf;
1639 volatile ushort *pbuf;
1640
1641 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1642 dbuf = (ushort *)sect_buf;
1643
1644 debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
1645
1646 while (shorts--) {
1647 EIEIO;
1648 *dbuf++ = *pbuf;
1649 }
1650#endif
wdenkc6097192002-11-03 00:24:07 +00001651}
1652
wdenk2262cfe2002-11-18 00:14:45 +00001653#else /* ! __PPC__ */
1654static void
1655output_data_shorts(int dev, ushort *sect_buf, int shorts)
1656{
wdenk15647dc2003-10-09 19:00:25 +00001657 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
wdenk2262cfe2002-11-18 00:14:45 +00001658}
1659
wdenk2262cfe2002-11-18 00:14:45 +00001660static void
1661input_data_shorts(int dev, ushort *sect_buf, int shorts)
1662{
wdenk15647dc2003-10-09 19:00:25 +00001663 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
wdenk2262cfe2002-11-18 00:14:45 +00001664}
1665
1666#endif /* __PPC__ */
1667
wdenkc6097192002-11-03 00:24:07 +00001668/*
1669 * Wait until (Status & mask) == res, or timeout (in ms)
1670 * Return last status
1671 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1672 * and then they set their DRQ Bit
1673 */
1674static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
1675{
1676 ulong delay = 10 * t; /* poll every 100 us */
1677 uchar c;
1678
wdenk2262cfe2002-11-18 00:14:45 +00001679 c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
1680 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
wdenkc6097192002-11-03 00:24:07 +00001681 /* break if error occurs (doesn't make sense to wait more) */
1682 if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
1683 break;
1684 udelay (100);
1685 if (delay-- == 0) {
1686 break;
1687 }
1688 }
1689 return (c);
1690}
1691
1692/*
1693 * issue an atapi command
1694 */
1695unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
1696{
1697 unsigned char c,err,mask,res;
1698 int n;
1699 ide_led (DEVICE_LED(device), 1); /* LED on */
1700
1701 /* Select device
1702 */
1703 mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
1704 res = 0;
wdenkc7de8292002-11-19 11:04:11 +00001705#ifdef CONFIG_AMIGAONEG3SE
1706# warning THF: Removed LBA mode ???
1707#endif
wdenk2262cfe2002-11-18 00:14:45 +00001708 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001709 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1710 if ((c & mask) != res) {
1711 printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
1712 err=0xFF;
1713 goto AI_OUT;
1714 }
1715 /* write taskfile */
wdenk2262cfe2002-11-18 00:14:45 +00001716 ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
wdenkc7de8292002-11-19 11:04:11 +00001717 ide_outb (device, ATA_SECT_CNT, 0);
1718 ide_outb (device, ATA_SECT_NUM, 0);
wdenk2262cfe2002-11-18 00:14:45 +00001719 ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
wdenkc7de8292002-11-19 11:04:11 +00001720 ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
1721#ifdef CONFIG_AMIGAONEG3SE
1722# warning THF: Removed LBA mode ???
1723#endif
wdenk2262cfe2002-11-18 00:14:45 +00001724 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001725
wdenk2262cfe2002-11-18 00:14:45 +00001726 ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
wdenkc6097192002-11-03 00:24:07 +00001727 udelay (50);
1728
1729 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1730 res = ATA_STAT_DRQ;
1731 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1732
1733 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1734 printf ("ATTAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
1735 err=0xFF;
1736 goto AI_OUT;
1737 }
1738
1739 output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
1740 /* ATAPI Command written wait for completition */
1741 udelay (5000); /* device must set bsy */
1742
1743 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1744 /* if no data wait for DRQ = 0 BSY = 0
1745 * if data wait for DRQ = 1 BSY = 0 */
1746 res=0;
1747 if(buflen)
1748 res = ATA_STAT_DRQ;
1749 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1750 if ((c & mask) != res ) {
1751 if (c & ATA_STAT_ERR) {
wdenk2262cfe2002-11-18 00:14:45 +00001752 err=(ide_inb(device,ATA_ERROR_REG))>>4;
wdenk1a344f22005-02-03 23:00:49 +00001753 debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
wdenkc6097192002-11-03 00:24:07 +00001754 } else {
1755 printf ("ATTAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
1756 err=0xFF;
1757 }
1758 goto AI_OUT;
1759 }
wdenk2262cfe2002-11-18 00:14:45 +00001760 n=ide_inb(device, ATA_CYL_HIGH);
wdenkc6097192002-11-03 00:24:07 +00001761 n<<=8;
wdenk2262cfe2002-11-18 00:14:45 +00001762 n+=ide_inb(device, ATA_CYL_LOW);
wdenkc6097192002-11-03 00:24:07 +00001763 if(n>buflen) {
1764 printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
1765 err=0xff;
1766 goto AI_OUT;
1767 }
1768 if((n==0)&&(buflen<0)) {
1769 printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
1770 err=0xff;
1771 goto AI_OUT;
1772 }
1773 if(n!=buflen) {
wdenk1a344f22005-02-03 23:00:49 +00001774 debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
wdenkc6097192002-11-03 00:24:07 +00001775 }
1776 if(n!=0) { /* data transfer */
wdenk1a344f22005-02-03 23:00:49 +00001777 debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
wdenkc6097192002-11-03 00:24:07 +00001778 /* we transfer shorts */
1779 n>>=1;
1780 /* ok now decide if it is an in or output */
wdenk2262cfe2002-11-18 00:14:45 +00001781 if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
wdenk1a344f22005-02-03 23:00:49 +00001782 debug ("Write to device\n");
wdenkc6097192002-11-03 00:24:07 +00001783 output_data_shorts(device,(unsigned short *)buffer,n);
1784 } else {
wdenk1a344f22005-02-03 23:00:49 +00001785 debug ("Read from device @ %p shorts %d\n",buffer,n);
wdenkc6097192002-11-03 00:24:07 +00001786 input_data_shorts(device,(unsigned short *)buffer,n);
1787 }
1788 }
1789 udelay(5000); /* seems that some CD ROMs need this... */
1790 mask = ATA_STAT_BUSY|ATA_STAT_ERR;
1791 res=0;
1792 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1793 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
wdenk2262cfe2002-11-18 00:14:45 +00001794 err=(ide_inb(device,ATA_ERROR_REG) >> 4);
wdenk1a344f22005-02-03 23:00:49 +00001795 debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
wdenkc6097192002-11-03 00:24:07 +00001796 } else {
1797 err = 0;
1798 }
1799AI_OUT:
1800 ide_led (DEVICE_LED(device), 0); /* LED off */
1801 return (err);
1802}
1803
1804/*
1805 * sending the command to atapi_issue. If an status other than good
1806 * returns, an request_sense will be issued
1807 */
1808
1809#define ATAPI_DRIVE_NOT_READY 100
1810#define ATAPI_UNIT_ATTN 10
1811
1812unsigned char atapi_issue_autoreq (int device,
1813 unsigned char* ccb,
1814 int ccblen,
1815 unsigned char *buffer,
1816 int buflen)
1817{
1818 unsigned char sense_data[18],sense_ccb[12];
1819 unsigned char res,key,asc,ascq;
1820 int notready,unitattn;
1821
wdenkc7de8292002-11-19 11:04:11 +00001822#ifdef CONFIG_AMIGAONEG3SE
1823 char *s;
1824 unsigned int timeout, retrycnt;
1825
1826 s = getenv("ide_cd_timeout");
1827 timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
1828
1829 retrycnt = 0;
1830#endif
1831
wdenkc6097192002-11-03 00:24:07 +00001832 unitattn=ATAPI_UNIT_ATTN;
1833 notready=ATAPI_DRIVE_NOT_READY;
1834
1835retry:
1836 res= atapi_issue(device,ccb,ccblen,buffer,buflen);
1837 if (res==0)
1838 return (0); /* Ok */
1839
1840 if (res==0xFF)
1841 return (0xFF); /* error */
1842
wdenk1a344f22005-02-03 23:00:49 +00001843 debug ("(auto_req)atapi_issue returned sense key %X\n",res);
wdenkc6097192002-11-03 00:24:07 +00001844
1845 memset(sense_ccb,0,sizeof(sense_ccb));
1846 memset(sense_data,0,sizeof(sense_data));
1847 sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
wdenkc7de8292002-11-19 11:04:11 +00001848 sense_ccb[4]=18; /* allocation Length */
wdenkc6097192002-11-03 00:24:07 +00001849
1850 res=atapi_issue(device,sense_ccb,12,sense_data,18);
1851 key=(sense_data[2]&0xF);
1852 asc=(sense_data[12]);
1853 ascq=(sense_data[13]);
1854
wdenk1a344f22005-02-03 23:00:49 +00001855 debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
1856 debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
wdenkc6097192002-11-03 00:24:07 +00001857 sense_data[0],
1858 key,
1859 asc,
1860 ascq);
1861
1862 if((key==0))
1863 return 0; /* ok device ready */
1864
1865 if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
1866 if(unitattn-->0) {
1867 udelay(200*1000);
1868 goto retry;
1869 }
1870 printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
1871 goto error;
1872 }
1873 if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
1874 if (notready-->0) {
1875 udelay(200*1000);
1876 goto retry;
1877 }
1878 printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
1879 goto error;
1880 }
1881 if(asc==0x3a) {
wdenk1a344f22005-02-03 23:00:49 +00001882 debug ("Media not present\n");
wdenkc6097192002-11-03 00:24:07 +00001883 goto error;
1884 }
wdenkc7de8292002-11-19 11:04:11 +00001885
1886#ifdef CONFIG_AMIGAONEG3SE
1887 if ((sense_data[2]&0xF)==0x0B) {
wdenk1a344f22005-02-03 23:00:49 +00001888 debug ("ABORTED COMMAND...retry\n");
wdenkc7de8292002-11-19 11:04:11 +00001889 if (retrycnt++ < 4)
1890 goto retry;
1891 return (0xFF);
1892 }
1893
1894 if ((sense_data[2]&0xf) == 0x02 &&
1895 sense_data[12] == 0x04 &&
1896 sense_data[13] == 0x01 ) {
wdenk1a344f22005-02-03 23:00:49 +00001897 debug ("Waiting for unit to become active\n");
wdenkc7de8292002-11-19 11:04:11 +00001898 udelay(timeout);
1899 if (retrycnt++ < 4)
1900 goto retry;
1901 return 0xFF;
1902 }
1903#endif /* CONFIG_AMIGAONEG3SE */
1904
wdenkc6097192002-11-03 00:24:07 +00001905 printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1906error:
wdenk1a344f22005-02-03 23:00:49 +00001907 debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
wdenkc6097192002-11-03 00:24:07 +00001908 return (0xFF);
1909}
1910
1911
wdenkc6097192002-11-03 00:24:07 +00001912static void atapi_inquiry(block_dev_desc_t * dev_desc)
1913{
1914 unsigned char ccb[12]; /* Command descriptor block */
1915 unsigned char iobuf[64]; /* temp buf */
1916 unsigned char c;
1917 int device;
1918
1919 device=dev_desc->dev;
1920 dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
1921 dev_desc->block_read=atapi_read;
1922
1923 memset(ccb,0,sizeof(ccb));
1924 memset(iobuf,0,sizeof(iobuf));
1925
1926 ccb[0]=ATAPI_CMD_INQUIRY;
1927 ccb[4]=40; /* allocation Legnth */
1928 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
1929
wdenk1a344f22005-02-03 23:00:49 +00001930 debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00001931 if (c!=0)
1932 return;
1933
1934 /* copy device ident strings */
1935 ident_cpy(dev_desc->vendor,&iobuf[8],8);
1936 ident_cpy(dev_desc->product,&iobuf[16],16);
1937 ident_cpy(dev_desc->revision,&iobuf[32],5);
1938
1939 dev_desc->lun=0;
1940 dev_desc->lba=0;
1941 dev_desc->blksz=0;
1942 dev_desc->type=iobuf[0] & 0x1f;
1943
1944 if ((iobuf[1]&0x80)==0x80)
1945 dev_desc->removable = 1;
1946 else
1947 dev_desc->removable = 0;
1948
1949 memset(ccb,0,sizeof(ccb));
1950 memset(iobuf,0,sizeof(iobuf));
1951 ccb[0]=ATAPI_CMD_START_STOP;
1952 ccb[4]=0x03; /* start */
1953
1954 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1955
wdenk1a344f22005-02-03 23:00:49 +00001956 debug ("ATAPI_CMD_START_STOP returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00001957 if (c!=0)
1958 return;
1959
1960 memset(ccb,0,sizeof(ccb));
1961 memset(iobuf,0,sizeof(iobuf));
1962 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1963
wdenk1a344f22005-02-03 23:00:49 +00001964 debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00001965 if (c!=0)
1966 return;
1967
1968 memset(ccb,0,sizeof(ccb));
1969 memset(iobuf,0,sizeof(iobuf));
1970 ccb[0]=ATAPI_CMD_READ_CAP;
1971 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
wdenk1a344f22005-02-03 23:00:49 +00001972 debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00001973 if (c!=0)
1974 return;
1975
wdenk1a344f22005-02-03 23:00:49 +00001976 debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
wdenkc6097192002-11-03 00:24:07 +00001977 iobuf[0],iobuf[1],iobuf[2],iobuf[3],
1978 iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
1979
1980 dev_desc->lba =((unsigned long)iobuf[0]<<24) +
1981 ((unsigned long)iobuf[1]<<16) +
1982 ((unsigned long)iobuf[2]<< 8) +
1983 ((unsigned long)iobuf[3]);
1984 dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
1985 ((unsigned long)iobuf[5]<<16) +
1986 ((unsigned long)iobuf[6]<< 8) +
1987 ((unsigned long)iobuf[7]);
wdenk42dfe7a2004-03-14 22:25:36 +00001988#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001989 dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
wdenk42dfe7a2004-03-14 22:25:36 +00001990#endif
wdenkc6097192002-11-03 00:24:07 +00001991 return;
1992}
1993
1994
1995/*
1996 * atapi_read:
1997 * we transfer only one block per command, since the multiple DRQ per
1998 * command is not yet implemented
1999 */
2000#define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
2001#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
2002#define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
2003
wdenkc40b2952004-03-13 23:29:43 +00002004ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, ulong *buffer)
wdenkc6097192002-11-03 00:24:07 +00002005{
2006 ulong n = 0;
2007 unsigned char ccb[12]; /* Command descriptor block */
2008 ulong cnt;
2009
wdenk1a344f22005-02-03 23:00:49 +00002010 debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
wdenkc6097192002-11-03 00:24:07 +00002011 device, blknr, blkcnt, (ulong)buffer);
2012
2013 do {
2014 if (blkcnt>ATAPI_READ_MAX_BLOCK) {
2015 cnt=ATAPI_READ_MAX_BLOCK;
2016 } else {
2017 cnt=blkcnt;
2018 }
2019 ccb[0]=ATAPI_CMD_READ_12;
2020 ccb[1]=0; /* reserved */
2021 ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
2022 ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
2023 ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
2024 ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
2025 ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
2026 ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
2027 ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
2028 ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
2029 ccb[10]=0; /* reserved */
2030 ccb[11]=0; /* reserved */
2031
2032 if (atapi_issue_autoreq(device,ccb,12,
2033 (unsigned char *)buffer,
2034 cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
2035 return (n);
2036 }
2037 n+=cnt;
2038 blkcnt-=cnt;
2039 blknr+=cnt;
2040 buffer+=cnt*(ATAPI_READ_BLOCK_SIZE/4); /* ulong blocksize in ulong */
2041 } while (blkcnt > 0);
2042 return (n);
2043}
2044
2045/* ------------------------------------------------------------------------- */
2046
2047#endif /* CONFIG_ATAPI */
2048
wdenk0d498392003-07-01 21:06:45 +00002049U_BOOT_CMD(
2050 ide, 5, 1, do_ide,
wdenk8bde7f72003-06-27 21:31:46 +00002051 "ide - IDE sub-system\n",
2052 "reset - reset IDE controller\n"
2053 "ide info - show available IDE devices\n"
2054 "ide device [dev] - show or set current device\n"
2055 "ide part [dev] - print partition table of one or all IDE devices\n"
2056 "ide read addr blk# cnt\n"
2057 "ide write addr blk# cnt - read/write `cnt'"
2058 " blocks starting at block `blk#'\n"
2059 " to/from memory address `addr'\n"
2060);
2061
wdenk0d498392003-07-01 21:06:45 +00002062U_BOOT_CMD(
2063 diskboot, 3, 1, do_diskboot,
wdenk8bde7f72003-06-27 21:31:46 +00002064 "diskboot- boot from IDE device\n",
2065 "loadAddr dev:part\n"
2066);
2067
wdenkc6097192002-11-03 00:24:07 +00002068#endif /* CONFIG_COMMANDS & CFG_CMD_IDE */