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Prafulla Wadaskaraa0c7a82009-09-07 15:05:02 +05301/*
2 * (C) Copyright 2008
3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Prafulla Wadaskaraa0c7a82009-09-07 15:05:02 +05307 */
8
9#ifndef _KWBIMAGE_H_
10#define _KWBIMAGE_H_
11
Reinhard Pfaua8840dc2015-11-29 15:48:25 +010012#include <compiler.h>
Prafulla Wadaskaraa0c7a82009-09-07 15:05:02 +053013#include <stdint.h>
14
15#define KWBIMAGE_MAX_CONFIG ((0x1dc - 0x20)/sizeof(struct reg_config))
16#define MAX_TEMPBUF_LEN 32
17
18/* NAND ECC Mode */
19#define IBR_HDR_ECC_DEFAULT 0x00
20#define IBR_HDR_ECC_FORCED_HAMMING 0x01
21#define IBR_HDR_ECC_FORCED_RS 0x02
22#define IBR_HDR_ECC_DISABLED 0x03
23
24/* Boot Type - block ID */
25#define IBR_HDR_I2C_ID 0x4D
26#define IBR_HDR_SPI_ID 0x5A
27#define IBR_HDR_NAND_ID 0x8B
28#define IBR_HDR_SATA_ID 0x78
29#define IBR_HDR_PEX_ID 0x9C
30#define IBR_HDR_UART_ID 0x69
31#define IBR_DEF_ATTRIB 0x00
32
Stefan Roesee29f1db2015-09-29 09:19:59 +020033#define ALIGN_SUP(x, a) (((x) + (a - 1)) & ~(a - 1))
34
35/* Structure of the main header, version 0 (Kirkwood, Dove) */
36struct main_hdr_v0 {
37 uint8_t blockid; /*0 */
38 uint8_t nandeccmode; /*1 */
39 uint16_t nandpagesize; /*2-3 */
40 uint32_t blocksize; /*4-7 */
41 uint32_t rsvd1; /*8-11 */
42 uint32_t srcaddr; /*12-15 */
43 uint32_t destaddr; /*16-19 */
44 uint32_t execaddr; /*20-23 */
45 uint8_t satapiomode; /*24 */
46 uint8_t rsvd3; /*25 */
47 uint16_t ddrinitdelay; /*26-27 */
48 uint16_t rsvd2; /*28-29 */
49 uint8_t ext; /*30 */
50 uint8_t checksum; /*31 */
51};
52
53struct ext_hdr_v0_reg {
54 uint32_t raddr;
55 uint32_t rdata;
56};
57
58#define EXT_HDR_V0_REG_COUNT ((0x1dc - 0x20) / sizeof(struct ext_hdr_v0_reg))
59
60struct ext_hdr_v0 {
61 uint32_t offset;
62 uint8_t reserved[0x20 - sizeof(uint32_t)];
63 struct ext_hdr_v0_reg rcfg[EXT_HDR_V0_REG_COUNT];
64 uint8_t reserved2[7];
65 uint8_t checksum;
66};
67
68struct kwb_header {
69 struct main_hdr_v0 kwb_hdr;
70 struct ext_hdr_v0 kwb_exthdr;
71};
72
73/* Structure of the main header, version 1 (Armada 370, Armada XP) */
74struct main_hdr_v1 {
75 uint8_t blockid; /* 0 */
76 uint8_t reserved1; /* 1 */
77 uint16_t reserved2; /* 2-3 */
78 uint32_t blocksize; /* 4-7 */
79 uint8_t version; /* 8 */
80 uint8_t headersz_msb; /* 9 */
81 uint16_t headersz_lsb; /* A-B */
82 uint32_t srcaddr; /* C-F */
83 uint32_t destaddr; /* 10-13 */
84 uint32_t execaddr; /* 14-17 */
85 uint8_t reserved3; /* 18 */
86 uint8_t nandblocksize; /* 19 */
87 uint8_t nandbadblklocation; /* 1A */
88 uint8_t reserved4; /* 1B */
89 uint16_t reserved5; /* 1C-1D */
90 uint8_t ext; /* 1E */
91 uint8_t checksum; /* 1F */
92};
93
94/*
95 * Header for the optional headers, version 1 (Armada 370, Armada XP)
96 */
97struct opt_hdr_v1 {
98 uint8_t headertype;
99 uint8_t headersz_msb;
100 uint16_t headersz_lsb;
101 char data[0];
102};
103
104/*
105 * Various values for the opt_hdr_v1->headertype field, describing the
106 * different types of optional headers. The "secure" header contains
107 * informations related to secure boot (encryption keys, etc.). The
108 * "binary" header contains ARM binary code to be executed prior to
109 * executing the main payload (usually the bootloader). This is
110 * typically used to execute DDR3 training code. The "register" header
111 * allows to describe a set of (address, value) tuples that are
112 * generally used to configure the DRAM controller.
113 */
114#define OPT_HDR_V1_SECURE_TYPE 0x1
115#define OPT_HDR_V1_BINARY_TYPE 0x2
116#define OPT_HDR_V1_REGISTER_TYPE 0x3
117
118#define KWBHEADER_V1_SIZE(hdr) \
Reinhard Pfaua8840dc2015-11-29 15:48:25 +0100119 (((hdr)->headersz_msb << 16) | le16_to_cpu((hdr)->headersz_lsb))
Stefan Roesee29f1db2015-09-29 09:19:59 +0200120
Prafulla Wadaskaraa0c7a82009-09-07 15:05:02 +0530121enum kwbimage_cmd {
122 CMD_INVALID,
123 CMD_BOOT_FROM,
124 CMD_NAND_ECC_MODE,
125 CMD_NAND_PAGE_SIZE,
126 CMD_SATA_PIO_MODE,
127 CMD_DDR_INIT_DELAY,
128 CMD_DATA
129};
130
131enum kwbimage_cmd_types {
132 CFG_INVALID = -1,
133 CFG_COMMAND,
134 CFG_DATA0,
135 CFG_DATA1
136};
137
Prafulla Wadaskaraa0c7a82009-09-07 15:05:02 +0530138/*
139 * functions
140 */
141void init_kwb_image_type (void);
142
Stefan Roesee29f1db2015-09-29 09:19:59 +0200143/*
144 * Byte 8 of the image header contains the version number. In the v0
145 * header, byte 8 was reserved, and always set to 0. In the v1 header,
146 * byte 8 has been changed to a proper field, set to 1.
147 */
148static inline unsigned int image_version(void *header)
149{
150 unsigned char *ptr = header;
151 return ptr[8];
152}
153
Prafulla Wadaskaraa0c7a82009-09-07 15:05:02 +0530154#endif /* _KWBIMAGE_H_ */