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Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +09001/*
2 * include/configs/koelsch.h
3 *
4 * Copyright (C) 2013 Renesas Electronics Corporation
5 *
6 * SPDX-License-Identifier: GPL-2.0
7 */
8
9#ifndef __KOELSCH_H
10#define __KOELSCH_H
11
12#undef DEBUG
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +090013#define CONFIG_R8A7791
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +090014#define CONFIG_ARCH_RMOBILE_BOARD_STRING "Koelsch"
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +090015
Nobuhiro Iwamatsu5ca6dfe2014-11-10 14:34:07 +090016#include "rcar-gen2-common.h"
Nobuhiro Iwamatsub6c96f72014-03-31 15:22:31 +090017
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +090018#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsu69191fe2014-10-31 16:16:27 +090019#define CONFIG_SYS_TEXT_BASE 0x70000000
20#else
Nobuhiro Iwamatsuc71b4dd2014-01-08 10:32:24 +090021#define CONFIG_SYS_TEXT_BASE 0xE6304000
Nobuhiro Iwamatsu69191fe2014-10-31 16:16:27 +090022#endif
23
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +090024/* STACK */
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +090025#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsu69191fe2014-10-31 16:16:27 +090026#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
27#else
28#define CONFIG_SYS_INIT_SP_ADDR 0xE633fffC
29#endif
30
31#define STACK_AREA_SIZE 0xC000
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +090032#define LOW_LEVEL_MERAM_STACK \
33 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
34
35/* MEMORY */
Nobuhiro Iwamatsu5ca6dfe2014-11-10 14:34:07 +090036#define RCAR_GEN2_SDRAM_BASE 0x40000000
37#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
38#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +090039
40/* SCIF */
41#define CONFIG_SCIF_CONSOLE
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +090042
43/* FLASH */
Nobuhiro Iwamatsuc71b4dd2014-01-08 10:32:24 +090044#define CONFIG_SYS_NO_FLASH
45#define CONFIG_SPI
46#define CONFIG_SH_QSPI
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +090047
Nobuhiro Iwamatsu90362c02013-10-20 20:37:17 +090048/* SH Ether */
Nobuhiro Iwamatsu90362c02013-10-20 20:37:17 +090049#define CONFIG_SH_ETHER
50#define CONFIG_SH_ETHER_USE_PORT 0
51#define CONFIG_SH_ETHER_PHY_ADDR 0x1
52#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
53#define CONFIG_SH_ETHER_CACHE_WRITEBACK
54#define CONFIG_SH_ETHER_CACHE_INVALIDATE
55#define CONFIG_PHYLIB
56#define CONFIG_PHY_MICREL
57#define CONFIG_BITBANGMII
58#define CONFIG_BITBANGMII_MULTI
59#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
60
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +090061/* Board Clock */
Nobuhiro Iwamatsuae8e1d92014-03-31 11:06:46 +090062#define RMOBILE_XTAL_CLK 20000000u
63#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
64#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +090065#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +090066
Nobuhiro Iwamatsubb611cc2013-09-11 15:04:33 +090067/* i2c */
Nobuhiro Iwamatsubb611cc2013-09-11 15:04:33 +090068#define CONFIG_SYS_I2C
69#define CONFIG_SYS_I2C_SH
70#define CONFIG_SYS_I2C_SLAVE 0x7F
71#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
Nobuhiro Iwamatsubb611cc2013-09-11 15:04:33 +090072#define CONFIG_SYS_I2C_SH_SPEED0 400000
Nobuhiro Iwamatsubb611cc2013-09-11 15:04:33 +090073#define CONFIG_SYS_I2C_SH_SPEED1 400000
Nobuhiro Iwamatsubb611cc2013-09-11 15:04:33 +090074#define CONFIG_SYS_I2C_SH_SPEED2 400000
75#define CONFIG_SH_I2C_DATA_HIGH 4
76#define CONFIG_SH_I2C_DATA_LOW 5
77#define CONFIG_SH_I2C_CLOCK 10000000
78
Nobuhiro Iwamatsub8f383b2013-10-10 10:48:20 +090079#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
80
Nobuhiro Iwamatsuaa44ae32014-03-27 14:13:06 +090081/* USB */
82#define CONFIG_USB_EHCI
83#define CONFIG_USB_EHCI_RMOBILE
Nobuhiro Iwamatsu5906fad2014-07-28 15:29:31 +090084#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
Nobuhiro Iwamatsuaa44ae32014-03-27 14:13:06 +090085
Nobuhiro Iwamatsu8e2e5882014-12-02 16:52:24 +090086/* Module stop status bits */
87/* INTC-RT */
88#define CONFIG_SMSTP0_ENA 0x00400000
89/* MSIF*/
90#define CONFIG_SMSTP2_ENA 0x00002000
91/* INTC-SYS, IRQC */
92#define CONFIG_SMSTP4_ENA 0x00000180
93/* SCIF0 */
94#define CONFIG_SMSTP7_ENA 0x00200000
95
Nobuhiro Iwamatsu11e32912014-11-12 13:03:54 +090096/* SD */
97#define CONFIG_MMC
Nobuhiro Iwamatsu11e32912014-11-12 13:03:54 +090098#define CONFIG_GENERIC_MMC
99#define CONFIG_SH_SDHI_FREQ 97500000
100
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900101#endif /* __KOELSCH_H */