blob: bdab38e89de12967d8e5086880f8c1c51375a8c4 [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
16#include <environment.h>
17#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000018#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000019#if defined(CONFIG_CMD_IDE)
20#include <ide.h>
21#endif
22#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000023#include <initcall.h>
24#include <logbuff.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000025
26/* TODO: Can we move these into arch/ headers? */
27#ifdef CONFIG_8xx
28#include <mpc8xx.h>
29#endif
30#ifdef CONFIG_5xx
31#include <mpc5xx.h>
32#endif
33#ifdef CONFIG_MPC5xxx
34#include <mpc5xxx.h>
35#endif
36
Simon Glassa733b062013-04-26 02:53:43 +000037#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000038#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000039#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020040#include <status_led.h>
Simon Glass71c52db2013-06-11 11:14:42 -070041#include <trace.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000042#include <watchdog.h>
Simon Glassa733b062013-04-26 02:53:43 +000043#include <asm/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000044#include <asm/io.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000045#ifdef CONFIG_MP
46#include <asm/mp.h>
47#endif
Simon Glass1938f4a2013-03-11 06:49:53 +000048#include <asm/sections.h>
Simon Glass48a33802013-03-05 14:39:52 +000049#ifdef CONFIG_X86
50#include <asm/init_helpers.h>
51#include <asm/relocate.h>
52#endif
Simon Glassa733b062013-04-26 02:53:43 +000053#ifdef CONFIG_SANDBOX
54#include <asm/state.h>
55#endif
Simon Glass1938f4a2013-03-11 06:49:53 +000056#include <linux/compiler.h>
57
58/*
59 * Pointer to initial global data area
60 *
61 * Here we initialize it if needed.
62 */
63#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
64#undef XTRN_DECLARE_GLOBAL_DATA_PTR
65#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
66DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
67#else
68DECLARE_GLOBAL_DATA_PTR;
69#endif
70
71/*
72 * sjg: IMO this code should be
73 * refactored to a single function, something like:
74 *
75 * void led_set_state(enum led_colour_t colour, int on);
76 */
77/************************************************************************
78 * Coloured LED functionality
79 ************************************************************************
80 * May be supplied by boards if desired
81 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020082__weak void coloured_LED_init(void) {}
83__weak void red_led_on(void) {}
84__weak void red_led_off(void) {}
85__weak void green_led_on(void) {}
86__weak void green_led_off(void) {}
87__weak void yellow_led_on(void) {}
88__weak void yellow_led_off(void) {}
89__weak void blue_led_on(void) {}
90__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000091
92/*
93 * Why is gd allocated a register? Prior to reloc it might be better to
94 * just pass it around to each function in this file?
95 *
96 * After reloc one could argue that it is hardly used and doesn't need
97 * to be in a register. Or if it is it should perhaps hold pointers to all
98 * global data for all modules, so that post-reloc we can avoid the massive
99 * literal pool we get on ARM. Or perhaps just encourage each module to use
100 * a structure...
101 */
102
103/*
104 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
105 */
106
Simon Glasse4fef6c2013-03-11 14:30:42 +0000107#if defined(CONFIG_WATCHDOG)
108static int init_func_watchdog_init(void)
109{
110 puts(" Watchdog enabled\n");
111 WATCHDOG_RESET();
112
113 return 0;
114}
115
116int init_func_watchdog_reset(void)
117{
118 WATCHDOG_RESET();
119
120 return 0;
121}
122#endif /* CONFIG_WATCHDOG */
123
124void __board_add_ram_info(int use_default)
125{
126 /* please define platform specific board_add_ram_info() */
127}
128
129void board_add_ram_info(int)
130 __attribute__ ((weak, alias("__board_add_ram_info")));
131
Simon Glass1938f4a2013-03-11 06:49:53 +0000132static int init_baud_rate(void)
133{
134 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
135 return 0;
136}
137
138static int display_text_info(void)
139{
Simon Glassa733b062013-04-26 02:53:43 +0000140#ifndef CONFIG_SANDBOX
Simon Glass1938f4a2013-03-11 06:49:53 +0000141 ulong bss_start, bss_end;
142
Simon Glass632efa72013-03-11 07:06:48 +0000143 bss_start = (ulong)&__bss_start;
144 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100145
Simon Glass1938f4a2013-03-11 06:49:53 +0000146 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
147 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000148#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000149
150#ifdef CONFIG_MODEM_SUPPORT
151 debug("Modem Support enabled\n");
152#endif
153#ifdef CONFIG_USE_IRQ
154 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
155 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
156#endif
157
158 return 0;
159}
160
161static int announce_dram_init(void)
162{
163 puts("DRAM: ");
164 return 0;
165}
166
Paul Burton3da7e5a2014-04-07 10:11:20 +0100167#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000168static int init_func_ram(void)
169{
170#ifdef CONFIG_BOARD_TYPES
171 int board_type = gd->board_type;
172#else
173 int board_type = 0; /* use dummy arg */
174#endif
175
176 gd->ram_size = initdram(board_type);
177
178 if (gd->ram_size > 0)
179 return 0;
180
181 puts("*** failed ***\n");
182 return 1;
183}
184#endif
185
Simon Glass1938f4a2013-03-11 06:49:53 +0000186static int show_dram_config(void)
187{
York Sunfa39ffe2014-05-02 17:28:05 -0700188 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000189
190#ifdef CONFIG_NR_DRAM_BANKS
191 int i;
192
193 debug("\nRAM Configuration:\n");
194 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
195 size += gd->bd->bi_dram[i].size;
196 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
197#ifdef DEBUG
198 print_size(gd->bd->bi_dram[i].size, "\n");
199#endif
200 }
201 debug("\nDRAM: ");
202#else
203 size = gd->ram_size;
204#endif
205
Simon Glasse4fef6c2013-03-11 14:30:42 +0000206 print_size(size, "");
207 board_add_ram_info(0);
208 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000209
210 return 0;
211}
212
213void __dram_init_banksize(void)
214{
215#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
216 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
217 gd->bd->bi_dram[0].size = get_effective_memsize();
218#endif
219}
220
221void dram_init_banksize(void)
222 __attribute__((weak, alias("__dram_init_banksize")));
223
Heiko Schocherea818db2013-01-29 08:53:15 +0100224#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000225static int init_func_i2c(void)
226{
227 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200228#ifdef CONFIG_SYS_I2C
229 i2c_init_all();
230#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000231 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200232#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000233 puts("ready\n");
234 return 0;
235}
236#endif
237
238#if defined(CONFIG_HARD_SPI)
239static int init_func_spi(void)
240{
241 puts("SPI: ");
242 spi_init();
243 puts("ready\n");
244 return 0;
245}
246#endif
247
248__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000249static int zero_global_data(void)
250{
251 memset((void *)gd, '\0', sizeof(gd_t));
252
253 return 0;
254}
255
256static int setup_mon_len(void)
257{
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100258#ifdef __ARM__
259 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Simon Glassa733b062013-04-26 02:53:43 +0000260#elif defined(CONFIG_SANDBOX)
261 gd->mon_len = (ulong)&_end - (ulong)_init;
Simon Glass632efa72013-03-11 07:06:48 +0000262#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000263 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
264 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000265#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000266 return 0;
267}
268
269__weak int arch_cpu_init(void)
270{
271 return 0;
272}
273
Simon Glassf828bf22013-04-20 08:42:41 +0000274#ifdef CONFIG_OF_HOSTFILE
275
Simon Glassf828bf22013-04-20 08:42:41 +0000276static int read_fdt_from_file(void)
277{
278 struct sandbox_state *state = state_get_current();
Simon Glass95fac6a2014-02-27 13:25:58 -0700279 const char *fname = state->fdt_fname;
Simon Glassf828bf22013-04-20 08:42:41 +0000280 void *blob;
Simon Glass95fac6a2014-02-27 13:25:58 -0700281 ssize_t size;
Simon Glassf828bf22013-04-20 08:42:41 +0000282 int err;
Simon Glass95fac6a2014-02-27 13:25:58 -0700283 int fd;
Simon Glassf828bf22013-04-20 08:42:41 +0000284
285 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
286 if (!state->fdt_fname) {
Simon Glass95fac6a2014-02-27 13:25:58 -0700287 err = fdt_create_empty_tree(blob, 256);
Simon Glassf828bf22013-04-20 08:42:41 +0000288 if (!err)
289 goto done;
Simon Glass95fac6a2014-02-27 13:25:58 -0700290 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
291 return -EINVAL;
Simon Glassf828bf22013-04-20 08:42:41 +0000292 }
Simon Glass95fac6a2014-02-27 13:25:58 -0700293
294 size = os_get_filesize(fname);
295 if (size < 0) {
296 printf("Failed to file FDT file '%s'\n", fname);
297 return -ENOENT;
298 }
299 fd = os_open(fname, OS_O_RDONLY);
300 if (fd < 0) {
301 printf("Failed to open FDT file '%s'\n", fname);
302 return -EACCES;
303 }
304 if (os_read(fd, blob, size) != size) {
305 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000306 return -EIO;
Simon Glass95fac6a2014-02-27 13:25:58 -0700307 }
308 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000309
310done:
311 gd->fdt_blob = blob;
312
313 return 0;
314}
315#endif
316
Simon Glassa733b062013-04-26 02:53:43 +0000317#ifdef CONFIG_SANDBOX
318static int setup_ram_buf(void)
319{
Simon Glass5c2859c2013-11-10 10:27:03 -0700320 struct sandbox_state *state = state_get_current();
321
322 gd->arch.ram_buf = state->ram_buf;
323 gd->ram_size = state->ram_size;
Simon Glassa733b062013-04-26 02:53:43 +0000324
325 return 0;
326}
327#endif
328
Simon Glass1938f4a2013-03-11 06:49:53 +0000329static int setup_fdt(void)
330{
331#ifdef CONFIG_OF_EMBED
332 /* Get a pointer to the FDT */
Masahiro Yamada6ab6b2a2014-02-05 11:28:25 +0900333 gd->fdt_blob = __dtb_dt_begin;
Simon Glass1938f4a2013-03-11 06:49:53 +0000334#elif defined CONFIG_OF_SEPARATE
335 /* FDT is at end of image */
Simon Glass632efa72013-03-11 07:06:48 +0000336 gd->fdt_blob = (ulong *)&_end;
Simon Glassf828bf22013-04-20 08:42:41 +0000337#elif defined(CONFIG_OF_HOSTFILE)
338 if (read_fdt_from_file()) {
339 puts("Failed to read control FDT\n");
340 return -1;
341 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000342#endif
343 /* Allow the early environment to override the fdt address */
344 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
345 (uintptr_t)gd->fdt_blob);
346 return 0;
347}
348
349/* Get the top of usable RAM */
350__weak ulong board_get_usable_ram_top(ulong total_size)
351{
352 return gd->ram_top;
353}
354
355static int setup_dest_addr(void)
356{
357 debug("Monitor len: %08lX\n", gd->mon_len);
358 /*
359 * Ram is setup, size stored in gd !!
360 */
361 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
362#if defined(CONFIG_SYS_MEM_TOP_HIDE)
363 /*
364 * Subtract specified amount of memory to hide so that it won't
365 * get "touched" at all by U-Boot. By fixing up gd->ram_size
366 * the Linux kernel should now get passed the now "corrected"
367 * memory size and won't touch it either. This should work
368 * for arch/ppc and arch/powerpc. Only Linux board ports in
369 * arch/powerpc with bootwrapper support, that recalculate the
370 * memory size from the SDRAM controller setup will have to
371 * get fixed.
372 */
373 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
374#endif
375#ifdef CONFIG_SYS_SDRAM_BASE
376 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
377#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000378 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000379 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000380 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000381 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000382#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
383 /*
384 * We need to make sure the location we intend to put secondary core
385 * boot code is reserved and not used by any part of u-boot
386 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000387 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
388 gd->relocaddr = determine_mp_bootpg(NULL);
389 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000390 }
391#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000392 return 0;
393}
394
395#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
396static int reserve_logbuffer(void)
397{
398 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000399 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000400 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000401 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000402 return 0;
403}
404#endif
405
406#ifdef CONFIG_PRAM
407/* reserve protected RAM */
408static int reserve_pram(void)
409{
410 ulong reg;
411
412 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000413 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000414 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000415 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000416 return 0;
417}
418#endif /* CONFIG_PRAM */
419
420/* Round memory pointer down to next 4 kB limit */
421static int reserve_round_4k(void)
422{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000423 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000424 return 0;
425}
426
427#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
428 defined(CONFIG_ARM)
429static int reserve_mmu(void)
430{
431 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800432 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000433 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000434
435 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000436 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000437
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000438 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000439 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
440 gd->arch.tlb_addr + gd->arch.tlb_size);
441 return 0;
442}
443#endif
444
445#ifdef CONFIG_LCD
446static int reserve_lcd(void)
447{
448#ifdef CONFIG_FB_ADDR
449 gd->fb_base = CONFIG_FB_ADDR;
450#else
451 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000452 gd->relocaddr = lcd_setmem(gd->relocaddr);
453 gd->fb_base = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000454#endif /* CONFIG_FB_ADDR */
455 return 0;
456}
457#endif /* CONFIG_LCD */
458
Simon Glass71c52db2013-06-11 11:14:42 -0700459static int reserve_trace(void)
460{
461#ifdef CONFIG_TRACE
462 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
463 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
464 debug("Reserving %dk for trace data at: %08lx\n",
465 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
466#endif
467
468 return 0;
469}
470
Simon Glasse4fef6c2013-03-11 14:30:42 +0000471#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
Simon Glass48a33802013-03-05 14:39:52 +0000472 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000473static int reserve_video(void)
474{
475 /* reserve memory for video display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000476 gd->relocaddr = video_setmem(gd->relocaddr);
477 gd->fb_base = gd->relocaddr;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000478
479 return 0;
480}
481#endif
482
Simon Glass1938f4a2013-03-11 06:49:53 +0000483static int reserve_uboot(void)
484{
485 /*
486 * reserve memory for U-Boot code, data & bss
487 * round down to next 4 kB limit
488 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000489 gd->relocaddr -= gd->mon_len;
490 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000491#ifdef CONFIG_E500
492 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000493 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000494#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000495
496 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000497 gd->relocaddr);
498
499 gd->start_addr_sp = gd->relocaddr;
500
Simon Glass1938f4a2013-03-11 06:49:53 +0000501 return 0;
502}
503
Simon Glass8cae8a62013-03-05 14:39:45 +0000504#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000505/* reserve memory for malloc() area */
506static int reserve_malloc(void)
507{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000508 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000509 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000510 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000511 return 0;
512}
513
514/* (permanently) allocate a Board Info struct */
515static int reserve_board(void)
516{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000517 gd->start_addr_sp -= sizeof(bd_t);
518 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000519 memset(gd->bd, '\0', sizeof(bd_t));
520 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000521 sizeof(bd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000522 return 0;
523}
Simon Glass8cae8a62013-03-05 14:39:45 +0000524#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000525
526static int setup_machine(void)
527{
528#ifdef CONFIG_MACH_TYPE
529 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
530#endif
531 return 0;
532}
533
534static int reserve_global_data(void)
535{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000536 gd->start_addr_sp -= sizeof(gd_t);
537 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000538 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000539 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000540 return 0;
541}
542
543static int reserve_fdt(void)
544{
545 /*
546 * If the device tree is sitting immediate above our image then we
547 * must relocate it. If it is embedded in the data section, then it
548 * will be relocated with other data.
549 */
550 if (gd->fdt_blob) {
551 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
552
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000553 gd->start_addr_sp -= gd->fdt_size;
554 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000555 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000556 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000557 }
558
559 return 0;
560}
561
562static int reserve_stacks(void)
563{
Simon Glass8cae8a62013-03-05 14:39:45 +0000564#ifdef CONFIG_SPL_BUILD
565# ifdef CONFIG_ARM
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000566 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
567 gd->irq_sp = gd->start_addr_sp;
Simon Glass8cae8a62013-03-05 14:39:45 +0000568# endif
569#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000570# ifdef CONFIG_PPC
571 ulong *s;
572# endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000573
Simon Glass1938f4a2013-03-11 06:49:53 +0000574 /* setup stack pointer for exceptions */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000575 gd->start_addr_sp -= 16;
576 gd->start_addr_sp &= ~0xf;
577 gd->irq_sp = gd->start_addr_sp;
Simon Glass1938f4a2013-03-11 06:49:53 +0000578
579 /*
580 * Handle architecture-specific things here
581 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
582 * to handle this and put in arch/xxx/lib/stack.c
583 */
David Fengcce6be72013-12-14 11:47:36 +0800584# if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000585# ifdef CONFIG_USE_IRQ
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000586 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
Simon Glass1938f4a2013-03-11 06:49:53 +0000587 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000588 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000589
590 /* 8-byte alignment for ARM ABI compliance */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000591 gd->start_addr_sp &= ~0x07;
Simon Glass1938f4a2013-03-11 06:49:53 +0000592# endif
593 /* leave 3 words for abort-stack, plus 1 for alignment */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000594 gd->start_addr_sp -= 16;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000595# elif defined(CONFIG_PPC)
596 /* Clear initial stack frame */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000597 s = (ulong *) gd->start_addr_sp;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000598 *s = 0; /* Terminate back chain */
599 *++s = 0; /* NULL return address */
Simon Glass8cae8a62013-03-05 14:39:45 +0000600# endif /* Architecture specific code */
Simon Glass1938f4a2013-03-11 06:49:53 +0000601
602 return 0;
Simon Glass8cae8a62013-03-05 14:39:45 +0000603#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000604}
605
606static int display_new_sp(void)
607{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000608 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000609
610 return 0;
611}
612
Simon Glasse4fef6c2013-03-11 14:30:42 +0000613#ifdef CONFIG_PPC
614static int setup_board_part1(void)
615{
616 bd_t *bd = gd->bd;
617
618 /*
619 * Save local variables to board info struct
620 */
621
622 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
623 bd->bi_memsize = gd->ram_size; /* size in bytes */
624
625#ifdef CONFIG_SYS_SRAM_BASE
626 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
627 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
628#endif
629
Masahiro Yamada58dac322014-03-05 17:40:10 +0900630#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000631 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
632 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
633#endif
634#if defined(CONFIG_MPC5xxx)
635 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
636#endif
637#if defined(CONFIG_MPC83xx)
638 bd->bi_immrbar = CONFIG_SYS_IMMR;
639#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000640
641 return 0;
642}
643
644static int setup_board_part2(void)
645{
646 bd_t *bd = gd->bd;
647
648 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
649 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
650#if defined(CONFIG_CPM2)
651 bd->bi_cpmfreq = gd->arch.cpm_clk;
652 bd->bi_brgfreq = gd->arch.brg_clk;
653 bd->bi_sccfreq = gd->arch.scc_clk;
654 bd->bi_vco = gd->arch.vco_out;
655#endif /* CONFIG_CPM2 */
656#if defined(CONFIG_MPC512X)
657 bd->bi_ipsfreq = gd->arch.ips_clk;
658#endif /* CONFIG_MPC512X */
659#if defined(CONFIG_MPC5xxx)
660 bd->bi_ipbfreq = gd->arch.ipb_clk;
661 bd->bi_pcifreq = gd->pci_clk;
662#endif /* CONFIG_MPC5xxx */
663
664 return 0;
665}
666#endif
667
668#ifdef CONFIG_SYS_EXTBDINFO
669static int setup_board_extra(void)
670{
671 bd_t *bd = gd->bd;
672
673 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
674 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
675 sizeof(bd->bi_r_version));
676
677 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
678 bd->bi_plb_busfreq = gd->bus_clk;
679#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
680 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
681 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
682 bd->bi_pci_busfreq = get_PCI_freq();
683 bd->bi_opbfreq = get_OPB_freq();
684#elif defined(CONFIG_XILINX_405)
685 bd->bi_pci_busfreq = get_PCI_freq();
686#endif
687
688 return 0;
689}
690#endif
691
Simon Glass1938f4a2013-03-11 06:49:53 +0000692#ifdef CONFIG_POST
693static int init_post(void)
694{
695 post_bootmode_init();
696 post_run(NULL, POST_ROM | post_bootmode_get(0));
697
698 return 0;
699}
700#endif
701
Simon Glass1938f4a2013-03-11 06:49:53 +0000702static int setup_dram_config(void)
703{
704 /* Ram is board specific, so move it to board code ... */
705 dram_init_banksize();
706
707 return 0;
708}
709
710static int reloc_fdt(void)
711{
712 if (gd->new_fdt) {
713 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
714 gd->fdt_blob = gd->new_fdt;
715 }
716
717 return 0;
718}
719
720static int setup_reloc(void)
721{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000722 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000723 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
724
725 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000726 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000727 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
728 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000729
730 return 0;
731}
732
733/* ARM calls relocate_code from its crt0.S */
Simon Glass808434c2013-11-10 10:26:59 -0700734#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000735
736static int jump_to_copy(void)
737{
Simon Glass48a33802013-03-05 14:39:52 +0000738 /*
739 * x86 is special, but in a nice way. It uses a trampoline which
740 * enables the dcache if possible.
741 *
742 * For now, other archs use relocate_code(), which is implemented
743 * similarly for all archs. When we do generic relocation, hopefully
744 * we can make all archs enable the dcache prior to relocation.
745 */
746#ifdef CONFIG_X86
747 /*
748 * SDRAM and console are now initialised. The final stack can now
749 * be setup in SDRAM. Code execution will continue in Flash, but
750 * with the stack in SDRAM and Global Data in temporary memory
751 * (CPU cache)
752 */
753 board_init_f_r_trampoline(gd->start_addr_sp);
754#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000755 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000756#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000757
758 return 0;
759}
760#endif
761
762/* Record the board_init_f() bootstage (after arch_cpu_init()) */
763static int mark_bootstage(void)
764{
765 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
766
767 return 0;
768}
769
770static init_fnc_t init_sequence_f[] = {
Simon Glassa733b062013-04-26 02:53:43 +0000771#ifdef CONFIG_SANDBOX
772 setup_ram_buf,
773#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000774 setup_mon_len,
Simon Glass71c52db2013-06-11 11:14:42 -0700775 setup_fdt,
776 trace_early_init,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000777#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
778 /* TODO: can this go into arch_cpu_init()? */
779 probecpu,
780#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000781 arch_cpu_init, /* basic arch cpu dependent setup */
Simon Glass48a33802013-03-05 14:39:52 +0000782#ifdef CONFIG_X86
783 cpu_init_f, /* TODO(sjg@chromium.org): remove */
784# ifdef CONFIG_OF_CONTROL
785 find_fdt, /* TODO(sjg@chromium.org): remove */
786# endif
787#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000788 mark_bootstage,
789#ifdef CONFIG_OF_CONTROL
790 fdtdec_check_fdt,
791#endif
792#if defined(CONFIG_BOARD_EARLY_INIT_F)
793 board_early_init_f,
794#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000795 /* TODO: can any of this go into arch_cpu_init()? */
796#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
797 get_clocks, /* get CPU and bus clocks (etc.) */
798#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
799 && !defined(CONFIG_TQM885D)
800 adjust_sdram_tbs_8xx,
801#endif
802 /* TODO: can we rename this to timer_init()? */
803 init_timebase,
804#endif
Paul Burton6dc9bac2014-04-07 10:11:21 +0100805#if defined(CONFIG_ARM) || defined(CONFIG_MIPS)
Simon Glass1938f4a2013-03-11 06:49:53 +0000806 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000807#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000808#ifdef CONFIG_SYS_ALLOC_DPRAM
809#if !defined(CONFIG_CPM2)
810 dpram_init,
811#endif
812#endif
813#if defined(CONFIG_BOARD_POSTCLK_INIT)
814 board_postclk_init,
815#endif
Masahiro Yamadab8521b72013-05-21 21:08:09 +0000816#ifdef CONFIG_FSL_ESDHC
817 get_clocks,
818#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000819 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000820#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
821 /* get CPU and bus clocks according to the environment variable */
822 get_clocks_866,
823 /* adjust sdram refresh rate according to the new clock */
824 sdram_adjust_866,
825 init_timebase,
826#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000827 init_baud_rate, /* initialze baudrate settings */
828 serial_init, /* serial communications setup */
829 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000830#ifdef CONFIG_SANDBOX
831 sandbox_early_getopt_check,
832#endif
833#ifdef CONFIG_OF_CONTROL
834 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000835#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000836 display_options, /* say that we are here */
837 display_text_info, /* show debugging info if required */
Masahiro Yamada58dac322014-03-05 17:40:10 +0900838#if defined(CONFIG_MPC8260)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000839 prt_8260_rsr,
840 prt_8260_clks,
Masahiro Yamada58dac322014-03-05 17:40:10 +0900841#endif /* CONFIG_MPC8260 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000842#if defined(CONFIG_MPC83xx)
843 prt_83xx_rsr,
844#endif
845#ifdef CONFIG_PPC
846 checkcpu,
847#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000848 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000849#if defined(CONFIG_MPC5xxx)
850 prt_mpc5xxx_clks,
851#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000852#if defined(CONFIG_DISPLAY_BOARDINFO)
853 checkboard, /* display board info */
854#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000855 INIT_FUNC_WATCHDOG_INIT
856#if defined(CONFIG_MISC_INIT_F)
857 misc_init_f,
858#endif
859 INIT_FUNC_WATCHDOG_RESET
Heiko Schocherea818db2013-01-29 08:53:15 +0100860#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000861 init_func_i2c,
862#endif
863#if defined(CONFIG_HARD_SPI)
864 init_func_spi,
865#endif
866#ifdef CONFIG_X86
867 dram_init_f, /* configure available RAM banks */
Simon Glass8b42dfc2013-04-15 11:22:49 +0000868 calculate_relocation_address,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000869#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000870 announce_dram_init,
871 /* TODO: unify all these dram functions? */
872#ifdef CONFIG_ARM
873 dram_init, /* configure available RAM banks */
874#endif
Paul Burton3da7e5a2014-04-07 10:11:20 +0100875#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000876 init_func_ram,
877#endif
878#ifdef CONFIG_POST
879 post_init_f,
880#endif
881 INIT_FUNC_WATCHDOG_RESET
882#if defined(CONFIG_SYS_DRAM_TEST)
883 testdram,
884#endif /* CONFIG_SYS_DRAM_TEST */
885 INIT_FUNC_WATCHDOG_RESET
886
Simon Glass1938f4a2013-03-11 06:49:53 +0000887#ifdef CONFIG_POST
888 init_post,
889#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000890 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000891 /*
892 * Now that we have DRAM mapped and working, we can
893 * relocate the code and continue running from DRAM.
894 *
895 * Reserve memory at end of RAM for (top down in that order):
896 * - area that won't get touched by U-Boot and Linux (optional)
897 * - kernel log buffer
898 * - protected RAM
899 * - LCD framebuffer
900 * - monitor code
901 * - board info struct
902 */
903 setup_dest_addr,
904#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
905 reserve_logbuffer,
906#endif
907#ifdef CONFIG_PRAM
908 reserve_pram,
909#endif
910 reserve_round_4k,
911#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
912 defined(CONFIG_ARM)
913 reserve_mmu,
914#endif
915#ifdef CONFIG_LCD
916 reserve_lcd,
917#endif
Simon Glass71c52db2013-06-11 11:14:42 -0700918 reserve_trace,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000919 /* TODO: Why the dependency on CONFIG_8xx? */
920#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
Simon Glass48a33802013-03-05 14:39:52 +0000921 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000922 reserve_video,
923#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000924 reserve_uboot,
Simon Glass8cae8a62013-03-05 14:39:45 +0000925#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000926 reserve_malloc,
927 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +0000928#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000929 setup_machine,
930 reserve_global_data,
931 reserve_fdt,
932 reserve_stacks,
933 setup_dram_config,
934 show_dram_config,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000935#ifdef CONFIG_PPC
936 setup_board_part1,
937 INIT_FUNC_WATCHDOG_RESET
938 setup_board_part2,
939#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000940 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000941#ifdef CONFIG_SYS_EXTBDINFO
942 setup_board_extra,
943#endif
944 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000945 reloc_fdt,
946 setup_reloc,
Simon Glass808434c2013-11-10 10:26:59 -0700947#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000948 jump_to_copy,
949#endif
950 NULL,
951};
952
953void board_init_f(ulong boot_flags)
954{
York Sun2a1680e2014-05-02 17:28:04 -0700955#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
956 /*
957 * For some archtectures, global data is initialized and used before
958 * calling this function. The data should be preserved. For others,
959 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
960 * here to host global data until relocation.
961 */
Simon Glass1938f4a2013-03-11 06:49:53 +0000962 gd_t data;
963
964 gd = &data;
965
David Fengcce6be72013-12-14 11:47:36 +0800966 /*
967 * Clear global data before it is accessed at debug print
968 * in initcall_run_list. Otherwise the debug print probably
969 * get the wrong vaule of gd->have_console.
970 */
David Fengcce6be72013-12-14 11:47:36 +0800971 zero_global_data();
972#endif
973
Simon Glass1938f4a2013-03-11 06:49:53 +0000974 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +0400975 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000976
977 if (initcall_run_list(init_sequence_f))
978 hang();
979
Simon Glass808434c2013-11-10 10:26:59 -0700980#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000981 /* NOTREACHED - jump_to_copy() does not return */
982 hang();
983#endif
984}
985
Simon Glass48a33802013-03-05 14:39:52 +0000986#ifdef CONFIG_X86
987/*
988 * For now this code is only used on x86.
989 *
990 * init_sequence_f_r is the list of init functions which are run when
991 * U-Boot is executing from Flash with a semi-limited 'C' environment.
992 * The following limitations must be considered when implementing an
993 * '_f_r' function:
994 * - 'static' variables are read-only
995 * - Global Data (gd->xxx) is read/write
996 *
997 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
998 * supported). It _should_, if possible, copy global data to RAM and
999 * initialise the CPU caches (to speed up the relocation process)
1000 *
1001 * NOTE: At present only x86 uses this route, but it is intended that
1002 * all archs will move to this when generic relocation is implemented.
1003 */
1004static init_fnc_t init_sequence_f_r[] = {
1005 init_cache_f_r,
1006 copy_uboot_to_ram,
1007 clear_bss,
1008 do_elf_reloc_fixups,
1009
1010 NULL,
1011};
1012
1013void board_init_f_r(void)
1014{
1015 if (initcall_run_list(init_sequence_f_r))
1016 hang();
1017
1018 /*
1019 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1020 * Transfer execution from Flash to RAM by calculating the address
1021 * of the in-RAM copy of board_init_r() and calling it
1022 */
1023 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1024
1025 /* NOTREACHED - board_init_r() does not return */
1026 hang();
1027}
1028#endif /* CONFIG_X86 */