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Piotr Wilczek4d6c9672013-09-20 15:01:27 +02001/*
2 * Copyright (C) 2013 Samsung Electronics
3 * Sanghee Kim <sh0130.kim@samsung.com>
4 * Piotr Wilczek <p.wilczek@samsung.com>
5 *
6 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010011#ifndef __CONFIG_TRATS2_H
12#define __CONFIG_TRATS2_H
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020013
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010014#include <configs/exynos4-dt.h>
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020015
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010016#define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020017
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010018#undef CONFIG_DEFAULT_DEVICE_TREE
19#define CONFIG_DEFAULT_DEVICE_TREE exynos4412-trats2
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020020
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010021#define CONFIG_TIZEN /* TIZEN lib */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020022
Łukasz Majewskic4e96db2014-01-14 08:02:26 +010023#define CONFIG_SYS_L2CACHE_OFF
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020024#ifndef CONFIG_SYS_L2CACHE_OFF
25#define CONFIG_SYS_L2_PL310
26#define CONFIG_SYS_PL310_BASE 0x10502000
27#endif
28
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010029/* TRATS2 has 4 banks of DRAM */
30#define CONFIG_NR_DRAM_BANKS 4
31#define CONFIG_SYS_SDRAM_BASE 0x40000000
32#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
33#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
34/* memtest works on */
35#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
36#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
37#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020038
Łukasz Majewski00b132b2014-03-19 14:47:06 +010039#define CONFIG_SYS_TEXT_BASE 0x43e00000
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020040
Alexey Brodkin1ace4022014-02-26 17:47:58 +040041#include <linux/sizes.h>
Piotr Wilczek09f98012013-11-12 15:22:46 +010042/* Size of malloc() pool */
43#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020044
45/* select serial console configuration */
46#define CONFIG_SERIAL2
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020047#define CONFIG_BAUDRATE 115200
48
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010049/* Console configuration */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020050#define CONFIG_SYS_CONSOLE_INFO_QUIET
51#define CONFIG_SYS_CONSOLE_IS_IN_ENV
52
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010053#define CONFIG_BOOTARGS "Please use defined boot"
54#define CONFIG_BOOTCOMMAND "run mmcboot"
Łukasz Majewski2ee93242014-04-09 10:44:33 +020055#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010056
57#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
58 - GENERATED_GBL_DATA_SIZE)
59
60#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
61
62#define CONFIG_SYS_MONITOR_BASE 0x00000000
63
64#define CONFIG_ENV_IS_IN_MMC
65#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
66#define CONFIG_ENV_SIZE 4096
67#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
68
69#define CONFIG_ENV_OVERWRITE
70
Piotr Wilczek8c57fb72014-01-22 15:54:36 +010071#define CONFIG_ENV_VARS_UBOOT_CONFIG
72#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
73
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020074/* Tizen - partitions definitions */
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010075#define PARTS_CSA "csa-mmc"
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020076#define PARTS_BOOT "boot"
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010077#define PARTS_QBOOT "qboot"
Piotr Wilczekdca36682013-11-27 11:11:02 +010078#define PARTS_CSC "csc"
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020079#define PARTS_ROOT "platform"
80#define PARTS_DATA "data"
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020081#define PARTS_UMS "ums"
82
83#define PARTS_DEFAULT \
Piotr Wilczeka5e15bb2013-12-30 09:40:40 +010084 "uuid_disk=${uuid_gpt_disk};" \
Piotr Wilczekdca36682013-11-27 11:11:02 +010085 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010086 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
87 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020088 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
Piotr Wilczekdca36682013-11-27 11:11:02 +010089 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010090 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020091 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
92
Piotr Wilczek09f98012013-11-12 15:22:46 +010093#define CONFIG_DFU_ALT \
Mateusz Zalegab7d42592014-04-28 21:13:25 +020094 "u-boot raw 0x80 0x800;" \
Łukasz Majewskidcb7eb62014-07-22 10:17:06 +020095 "/uImage ext4 0 2;" \
96 "/modem.bin ext4 0 2;" \
97 "/exynos4412-trats2.dtb ext4 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010098 ""PARTS_CSA" part 0 1;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +010099 ""PARTS_BOOT" part 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +0100100 ""PARTS_QBOOT" part 0 3;" \
101 ""PARTS_CSC" part 0 4;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +0100102 ""PARTS_ROOT" part 0 5;" \
103 ""PARTS_DATA" part 0 6;" \
Przemyslaw Marczaka0afc6f2014-01-22 12:02:47 +0100104 ""PARTS_UMS" part 0 7;" \
Mateusz Zalegab7d42592014-04-28 21:13:25 +0200105 "params.bin raw 0x38 0x8\0"
Piotr Wilczek09f98012013-11-12 15:22:46 +0100106
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200107#define CONFIG_EXTRA_ENV_SETTINGS \
108 "bootk=" \
Piotr Wilczek425e26d2014-01-22 15:54:37 +0100109 "run loaduimage;" \
110 "if run loaddtb; then " \
111 "bootm 0x40007FC0 - ${fdtaddr};" \
112 "fi;" \
113 "bootm 0x40007FC0;\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200114 "updatebackup=" \
Jaehoon Chung188c42b2014-04-30 09:09:15 +0900115 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
116 " mmc dev 0 0\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200117 "updatebootb=" \
Jaehoon Chung188c42b2014-04-30 09:09:15 +0900118 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200119 "mmcboot=" \
120 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
121 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
Piotr Wilczek425e26d2014-01-22 15:54:37 +0100122 "run bootk\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200123 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
124 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
125 "verify=n\0" \
126 "rootfstype=ext4\0" \
127 "console=" CONFIG_DEFAULT_CONSOLE \
128 "kernelname=uImage\0" \
Piotr Wilczek2c8043c2013-11-27 11:11:00 +0100129 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
130 "${kernelname}\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200131 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
132 "${fdtfile}\0" \
Piotr Wilczeka5e15bb2013-12-30 09:40:40 +0100133 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200134 "mmcbootpart=2\0" \
135 "mmcrootpart=5\0" \
136 "opts=always_resume=1\0" \
137 "partitions=" PARTS_DEFAULT \
Piotr Wilczek09f98012013-11-12 15:22:46 +0100138 "dfu_alt_info=" CONFIG_DFU_ALT \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200139 "uartpath=ap\0" \
140 "usbpath=ap\0" \
141 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
142 "consoleoff=set console console=ram; save; reset\0" \
143 "spladdr=0x40000100\0" \
144 "splsize=0x200\0" \
145 "splfile=falcon.bin\0" \
146 "spl_export=" \
147 "setexpr spl_imgsize ${splsize} + 8 ;" \
148 "setenv spl_imgsize 0x${spl_imgsize};" \
149 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
150 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
151 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
152 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
153 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
154 "spl export atags 0x40007FC0;" \
155 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
156 "mw.l ${spl_addr_tmp} ${splsize};" \
157 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
158 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
159 "setenv spl_imgsize;" \
160 "setenv spl_imgaddr;" \
161 "setenv spl_addr_tmp;\0" \
162 "fdtaddr=40800000\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200163
Albert ARIBAUD519fdde2014-04-08 09:25:08 +0200164/* GPT */
Przemyslaw Marczakaafd2c52014-04-02 10:20:07 +0200165#define CONFIG_RANDOM_UUID
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200166
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200167/* I2C */
168#include <asm/arch/gpio.h>
169
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +0100170#define CONFIG_CMD_I2C
171
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200172#define CONFIG_SYS_I2C
Piotr Wilczek2d8f1e22013-11-20 10:43:49 +0100173#define CONFIG_SYS_I2C_S3C24X0
174#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000
175#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0
176#define CONFIG_MAX_I2C_NUM 8
177#define CONFIG_SYS_I2C_SOFT
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200178#define CONFIG_SYS_I2C_SOFT_SPEED 50000
179#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
180#define I2C_SOFT_DECLARATIONS2
181#define CONFIG_SYS_I2C_SOFT_SPEED_2 50000
182#define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x00
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200183#define CONFIG_SOFT_I2C_READ_REPEATED_START
184#define CONFIG_SYS_I2C_INIT_BOARD
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200185
Piotr Wilczek2d8f1e22013-11-20 10:43:49 +0100186#ifndef __ASSEMBLY__
187int get_soft_i2c_scl_pin(void);
188int get_soft_i2c_sda_pin(void);
189#endif
190#define CONFIG_SOFT_I2C_GPIO_SCL get_soft_i2c_scl_pin()
191#define CONFIG_SOFT_I2C_GPIO_SDA get_soft_i2c_sda_pin()
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200192
193/* POWER */
194#define CONFIG_POWER
195#define CONFIG_POWER_I2C
196#define CONFIG_POWER_MAX77686
197#define CONFIG_POWER_PMIC_MAX77693
198#define CONFIG_POWER_MUIC_MAX77693
199#define CONFIG_POWER_FG_MAX77693
200#define CONFIG_POWER_BATTERY_TRATS2
201
Przemyslaw Marczake0021702014-03-25 10:58:22 +0100202/* Security subsystem - enable hw_rand() */
203#define CONFIG_EXYNOS_ACE_SHA
204#define CONFIG_LIB_HW_RAND
205
Przemyslaw Marczak679549d2014-01-22 11:24:12 +0100206/* Common misc for Samsung */
207#define CONFIG_MISC_COMMON
208
209#define CONFIG_MISC_INIT_R
210
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100211/* Download menu - Samsung common */
212#define CONFIG_LCD_MENU
213#define CONFIG_LCD_MENU_BOARD
214
215/* Download menu - definitions for check keys */
216#ifndef __ASSEMBLY__
217#include <power/max77686_pmic.h>
218
219#define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
220#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
221#define KEY_PWR_STATUS_MASK (1 << 0)
222#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
223#define KEY_PWR_INTERRUPT_MASK (1 << 1)
224
Akshay Saraswat9b97b722014-05-13 10:30:15 +0530225#define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
226#define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100227#endif /* __ASSEMBLY__ */
228
229/* LCD console */
230#define LCD_BPP LCD_COLOR16
231#define CONFIG_SYS_WHITE_ON_BLACK
232
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200233/* LCD */
234#define CONFIG_EXYNOS_FB
235#define CONFIG_LCD
236#define CONFIG_CMD_BMP
Przemyslaw Marczak2df21cb2014-01-22 11:24:16 +0100237#define CONFIG_BMP_16BPP
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200238#define CONFIG_FB_ADDR 0x52504000
239#define CONFIG_S6E8AX0
240#define CONFIG_EXYNOS_MIPI_DSIM
241#define CONFIG_VIDEO_BMP_GZIP
Przemyslaw Marczak903afe12013-11-29 18:30:43 +0100242#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200243
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +0100244#define LCD_XRES 720
245#define LCD_YRES 1280
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200246
247#endif /* __CONFIG_H */