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Daniel Hellstrom823edd82008-03-28 10:06:52 +01001/* Configuration header file for LEON3 GRSIM, trying to be similar
2 * to Gaisler's GR-XC3S-1500 board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom823edd82008-03-28 10:06:52 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 *
20 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
21 *
Francois Retiefb6b280c2014-11-04 16:51:44 +020022 * TSIM command:
23 * $ tsim-leon3 -sdram 32768 -ram 4096 -rom 2048 -mmu -cas
Daniel Hellstrom823edd82008-03-28 10:06:52 +010024 *
Francois Retiefb6b280c2014-11-04 16:51:44 +020025 * In the evaluation version of TSIM, the -sdram/-ram/-rom arguments are
26 * hard-coded to these values and need not be specified. (see below)
27 *
28 * Get TSIM from http://www.gaisler.com/index.php/downloads/simulators
Daniel Hellstrom823edd82008-03-28 10:06:52 +010029 */
30
Daniel Hellstrom823edd82008-03-28 10:06:52 +010031#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
32#define CONFIG_TSIM 1 /* ... running on TSIM */
33
34/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020035#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010036
Daniel Hellstrom823edd82008-03-28 10:06:52 +010037/*
38 * Serial console configuration
39 */
40#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020041#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom823edd82008-03-28 10:06:52 +010042
43/* Partitions */
44#define CONFIG_DOS_PARTITION
Daniel Hellstrom823edd82008-03-28 10:06:52 +010045#define CONFIG_ISO_PARTITION
46
47/*
48 * Supported commands
49 */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010050#define CONFIG_CMD_DIAG
Siva Durga Prasad Paladugu64e809a2014-03-14 16:35:38 +053051#define CONFIG_CMD_FPGA_LOADMK
Daniel Hellstrom823edd82008-03-28 10:06:52 +010052#define CONFIG_CMD_IRQ
Daniel Hellstrom823edd82008-03-28 10:06:52 +010053#define CONFIG_CMD_REGINFO
Daniel Hellstrom823edd82008-03-28 10:06:52 +010054
55/*
56 * Autobooting
57 */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010058
59#define CONFIG_PREBOOT "echo;" \
60 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
61 "echo"
62
63#undef CONFIG_BOOTARGS
Daniel Hellstrom823edd82008-03-28 10:06:52 +010064
65#define CONFIG_EXTRA_ENV_SETTINGS \
66 "netdev=eth0\0" \
67 "nfsargs=setenv bootargs root=/dev/nfs rw " \
68 "nfsroot=${serverip}:${rootpath}\0" \
69 "ramargs=setenv bootargs root=/dev/ram rw\0" \
70 "addip=setenv bootargs ${bootargs} " \
71 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
72 ":${hostname}:${netdev}:off panic=1\0" \
73 "flash_nfs=run nfsargs addip;" \
74 "bootm ${kernel_addr}\0" \
75 "flash_self=run ramargs addip;" \
76 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
77 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
78 "rootpath=/export/roofs\0" \
79 "scratch=40000000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000080 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom823edd82008-03-28 10:06:52 +010081 "bootargs=console=ttyS0,38400" \
82 ""
83#define CONFIG_NETMASK 255.255.255.0
84#define CONFIG_GATEWAYIP 192.168.0.1
85#define CONFIG_SERVERIP 192.168.0.81
86#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger8b3637c2011-10-13 13:03:47 +000087#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom823edd82008-03-28 10:06:52 +010088#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +000089#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom823edd82008-03-28 10:06:52 +010090
91#define CONFIG_BOOTCOMMAND "run flash_self"
92
93/* Memory MAP
94 *
95 * Flash:
96 * |--------------------------------|
97 * | 0x00000000 Text & Data & BSS | *
98 * | for Monitor | *
99 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
100 * | UNUSED / Growth | * 256kb
101 * |--------------------------------|
102 * | 0x00050000 Base custom area | *
103 * | kernel / FS | *
104 * | | * Rest of Flash
105 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
106 * | END-0x00008000 Environment | * 32kb
107 * |--------------------------------|
108 *
109 *
110 *
111 * Main Memory:
112 * |--------------------------------|
113 * | UNUSED / scratch area |
114 * | |
115 * | |
116 * | |
117 * | |
118 * |--------------------------------|
119 * | Monitor .Text / .DATA / .BSS | * 256kb
120 * | Relocated! | *
121 * |--------------------------------|
122 * | Monitor Malloc | * 128kb (contains relocated environment)
123 * |--------------------------------|
124 * | Monitor/kernel STACK | * 64kb
125 * |--------------------------------|
126 * | Page Table for MMU systems | * 2k
127 * |--------------------------------|
128 * | PROM Code accessed from Linux | * 6kb-128b
129 * |--------------------------------|
130 * | Global data (avail from kernel)| * 128b
131 * |--------------------------------|
132 *
133 */
134
135/*
136 * Flash configuration (8,16 or 32 MB)
137 * TEXT base always at 0xFFF00000
138 * ENV_ADDR always at 0xFFF40000
139 * FLASH_BASE at 0xFC000000 for 64 MB
140 * 0xFE000000 for 32 MB
141 * 0xFF000000 for 16 MB
142 * 0xFF800000 for 8 MB
143 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200144#define CONFIG_SYS_NO_FLASH 1
145#define CONFIG_SYS_FLASH_BASE 0x00000000
146#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200147#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100148
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100150
151#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
153#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100154
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
156#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
157#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
158#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100159
160#ifdef ENABLE_FLASH_SUPPORT
161/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100163
164#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
165
166/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200168#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100170#endif
171
172/*
173 * Environment settings
174 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200175#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200176/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200177/*#define CONFIG_ENV_SIZE 0x8000*/
178#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100179#define CONFIG_ENV_OVERWRITE 1
180
181/*
182 * Memory map
183 */
Francois Retiefb6b280c2014-11-04 16:51:44 +0200184#define CONFIG_SYS_SDRAM_BASE 0x60000000
185#define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32MiB SDRAM */
186#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100187
Francois Retiefb6b280c2014-11-04 16:51:44 +0200188#define CONFIG_SYS_SRAM_BASE 0x40000000
189#define CONFIG_SYS_SRAM_SIZE 0x00400000 /* 4MiB SRAM */
190#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100191
192/* Always Run U-Boot from SDRAM */
Francois Retiefb6b280c2014-11-04 16:51:44 +0200193#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
194#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
195#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100196
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200197#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100198
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200199#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200200#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100201
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200202#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
203#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100204
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200205#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200206#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
207# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100208#endif
209
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200210#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
211#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
212#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100213
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200214#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
215#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100216
217/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
219#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100220
221/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200222#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100223
Francois Retiefb6b280c2014-11-04 16:51:44 +0200224#ifdef CONFIG_CMD_NET
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100225/*
226 * Ethernet configuration
227 */
228#define CONFIG_GRETH 1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100229
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100230/*
231 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
232 */
233/* #define CONFIG_GRETH_10MBIT 1 */
234#define CONFIG_PHY_ADDR 0x00
235
Francois Retiefb6b280c2014-11-04 16:51:44 +0200236#endif /* CONFIG_CMD_NET */
237
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100238/*
239 * Miscellaneous configurable options
240 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200241#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100242#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200243#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100244#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200245#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100246#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200247#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
248#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
249#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100250
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200251#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
252#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100253
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200254#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100255
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100256/***** Gaisler GRLIB IP-Cores Config ********/
257
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200258#define CONFIG_SYS_GRLIB_SDRAM 0
Francois Retiefb6b280c2014-11-04 16:51:44 +0200259
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200260#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100261
262/* No SDRAM Configuration */
263#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
264
265/* LEON2 MCTRL configuration */
266#define CONFIG_SYS_GRLIB_ESA_MCTRL1
267#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100268#if CONFIG_GRSIM
269/* GRSIM configuration */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100270#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100271#else
272/* TSIM configuration */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100273#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x81805220
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100274#endif
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100275#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100276
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100277/* GRLIB FT-MCTRL configuration */
278#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
279#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
280#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
281#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100282
283/* no DDR controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100284#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100285
286/* no DDR2 Controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100287#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100288
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100289/* default kernel command line */
290#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
291
Francois Retiefb6b280c2014-11-04 16:51:44 +0200292/* TSIM command:
293 * $ ./tsim-leon3 -mmu -cas
294 *
295 * This TSIM evaluation version will expire 2015-04-02
296 *
297 *
298 * TSIM/LEON3 SPARC simulator, version 2.0.35 (evaluation version)
299 *
300 * Copyright (C) 2014, Aeroflex Gaisler - all rights reserved.
301 * This software may only be used with a valid license.
302 * For latest updates, go to http://www.gaisler.com/
303 * Comments or bug-reports to support@gaisler.com
304 *
305 * serial port A on stdin/stdout
306 * allocated 4096 K SRAM memory, in 1 bank
307 * allocated 32 M SDRAM memory, in 1 bank
308 * allocated 2048 K ROM memory
309 * icache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
310 * dcache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
311 * tsim> leon
312 * 0x80000000 Memory configuration register 1 0x000002ff
313 * 0x80000004 Memory configuration register 2 0x81805220
314 * 0x80000008 Memory configuration register 3 0x00000000
315 */
316
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100317#endif /* __CONFIG_H */