Revise the PPC32 subarchitecture kinds, so as to facilitated
supporting CPUs that have neither Altivec nor FPU.
git-svn-id: svn://svn.valgrind.org/vex/trunk@1452 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/guest-ppc32/toIR.c b/priv/guest-ppc32/toIR.c
index 141e898..db08aa9 100644
--- a/priv/guest-ppc32/toIR.c
+++ b/priv/guest-ppc32/toIR.c
@@ -7012,6 +7012,12 @@
DisResult dres;
UInt theInstr;
+ /* What insn variants are we supporting today? */
+ Bool allow_FP = archinfo->subarch == VexSubArchPPC32_FI
+ || archinfo->subarch == VexSubArchPPC32_VFI;
+
+ Bool allow_VMX = archinfo->subarch == VexSubArchPPC32_VFI;
+
/* The running delta */
Int delta = (Int)delta64;
@@ -7134,16 +7140,19 @@
/* Floating Point Load Instructions */
case 0x30: case 0x31: case 0x32: // lfs, lfsu, lfd
case 0x33: // lfdu
+ if (!allow_FP) goto decode_failure;
if (dis_fp_load( theInstr )) goto decode_success;
goto decode_failure;
/* Floating Point Store Instructions */
case 0x34: case 0x35: case 0x36: // stfsx, stfsux, stfdx
case 0x37: // stfdux
+ if (!allow_FP) goto decode_failure;
if (dis_fp_store( theInstr )) goto decode_success;
goto decode_failure;
case 0x3B:
+ if (!allow_FP) goto decode_failure;
opc2 = (theInstr >> 1) & 0x1F; /* theInstr[1:5] */
switch (opc2) {
/* Floating Point Arith Instructions */
@@ -7164,6 +7173,7 @@
break;
case 0x3F:
+ if (!allow_FP) goto decode_failure;
/* Instrs using opc[1:5] never overlap with instrs using opc[1:10],
so we can simply fall through the first switch statement */
@@ -7357,12 +7367,14 @@
/* Floating Point Load Instructions */
case 0x217: case 0x237: case 0x257: // lfsx, lfsux, lfdx
case 0x277: // lfdux
+ if (!allow_FP) goto decode_failure;
if (dis_fp_load( theInstr )) goto decode_success;
goto decode_failure;
/* Floating Point Store Instructions */
case 0x297: case 0x2B7: case 0x2D7: // stfs, stfsu, stfd
case 0x2F7: case 0x3D7: // stfdu, stfiwx
+ if (!allow_FP) goto decode_failure;
if (dis_fp_store( theInstr )) goto decode_success;
goto decode_failure;
@@ -7371,6 +7383,7 @@
/* AV Cache Control - Data streams */
case 0x156: case 0x176: case 0x336: // dst, dstst, dss
+ if (!allow_VMX) goto decode_failure;
if (dis_av_datastream( theInstr )) goto decode_success;
goto decode_failure;
@@ -7378,12 +7391,14 @@
case 0x006: case 0x026: // lvsl, lvsr
case 0x007: case 0x027: case 0x047: // lvebx, lvehx, lvewx
case 0x067: case 0x167: // lvx, lvxl
+ if (!allow_VMX) goto decode_failure;
if (dis_av_load( theInstr )) goto decode_success;
goto decode_failure;
/* AV Store */
case 0x087: case 0x0A7: case 0x0C7: // stvebx, stvehx, stvewx
case 0x0E7: case 0x1E7: // stvx, stvxl
+ if (!allow_VMX) goto decode_failure;
if (dis_av_store( theInstr )) goto decode_success;
goto decode_failure;
@@ -7402,6 +7417,7 @@
case 0x20: case 0x21: case 0x22: // vmhaddshs, vmhraddshs, vmladduhm
case 0x24: case 0x25: case 0x26: // vmsumubm, vmsummbm, vmsumuhm
case 0x27: case 0x28: case 0x29: // vmsumuhs, vmsumshm, vmsumshs
+ if (!allow_VMX) goto decode_failure;
if (dis_av_multarith( theInstr )) goto decode_success;
goto decode_failure;
@@ -7409,11 +7425,13 @@
case 0x2A: // vsel
case 0x2B: // vperm
case 0x2C: // vsldoi
+ if (!allow_VMX) goto decode_failure;
if (dis_av_permute( theInstr )) goto decode_success;
goto decode_failure;
/* AV Floating Point Mult-Add/Sub */
case 0x2E: case 0x2F: // vmaddfp, vnmsubfp
+ if (!allow_VMX) goto decode_failure;
if (dis_av_fp_arith( theInstr )) goto decode_success;
goto decode_failure;
@@ -7444,6 +7462,7 @@
case 0x308: case 0x348: // vmulesb, vmulesh
case 0x608: case 0x708: case 0x648: // vsum4ubs, vsum4sbs, vsum4shs
case 0x688: case 0x788: // vsum2sws, vsumsws
+ if (!allow_VMX) goto decode_failure;
if (dis_av_arith( theInstr )) goto decode_success;
goto decode_failure;
@@ -7454,17 +7473,20 @@
case 0x304: case 0x344: case 0x384: // vsrab, vsrah, vsraw
case 0x1C4: case 0x2C4: // vsl, vsr
case 0x40C: case 0x44C: // vslo, vsro
+ if (!allow_VMX) goto decode_failure;
if (dis_av_shift( theInstr )) goto decode_success;
goto decode_failure;
/* AV Logic */
case 0x404: case 0x444: case 0x484: // vand, vandc, vor
case 0x4C4: case 0x504: // vxor, vnor
+ if (!allow_VMX) goto decode_failure;
if (dis_av_logic( theInstr )) goto decode_success;
goto decode_failure;
/* AV Processor Control */
case 0x604: case 0x644: // mfvscr, mtvscr
+ if (!allow_VMX) goto decode_failure;
if (dis_av_procctl( theInstr )) goto decode_success;
goto decode_failure;
@@ -7473,6 +7495,7 @@
case 0x10A: case 0x14A: case 0x18A: // vrefp, vrsqrtefp, vexptefp
case 0x1CA: // vlogefp
case 0x40A: case 0x44A: // vmaxfp, vminfp
+ if (!allow_VMX) goto decode_failure;
if (dis_av_fp_arith( theInstr )) goto decode_success;
goto decode_failure;
@@ -7481,6 +7504,7 @@
case 0x2CA: // vrfim
case 0x30A: case 0x34A: case 0x38A: // vcfux, vcfsx, vctuxs
case 0x3CA: // vctsxs
+ if (!allow_VMX) goto decode_failure;
if (dis_av_fp_convert( theInstr )) goto decode_success;
goto decode_failure;
@@ -7489,6 +7513,7 @@
case 0x10C: case 0x14C: case 0x18C: // vmrglb, vmrglh, vmrglw
case 0x20C: case 0x24C: case 0x28C: // vspltb, vsplth, vspltw
case 0x30C: case 0x34C: case 0x38C: // vspltisb, vspltish, vspltisw
+ if (!allow_VMX) goto decode_failure;
if (dis_av_permute( theInstr )) goto decode_success;
goto decode_failure;
@@ -7500,6 +7525,7 @@
case 0x20E: case 0x24E: case 0x28E: // vupkhsb, vupkhsh, vupklsb
case 0x2CE: // vupklsh
case 0x30E: case 0x34E: case 0x3CE: // vpkpx, vupkhpx, vupklpx
+ if (!allow_VMX) goto decode_failure;
if (dis_av_pack( theInstr )) goto decode_success;
goto decode_failure;
@@ -7514,12 +7540,14 @@
case 0x006: case 0x046: case 0x086: // vcmpequb, vcmpequh, vcmpequw
case 0x206: case 0x246: case 0x286: // vcmpgtub, vcmpgtuh, vcmpgtuw
case 0x306: case 0x346: case 0x386: // vcmpgtsb, vcmpgtsh, vcmpgtsw
+ if (!allow_VMX) goto decode_failure;
if (dis_av_cmp( theInstr )) goto decode_success;
goto decode_failure;
/* AV Floating Point Compare */
case 0x0C6: case 0x1C6: case 0x2C6: // vcmpeqfp, vcmpgefp, vcmpgtfp
case 0x3C6: // vcmpbfp
+ if (!allow_VMX) goto decode_failure;
if (dis_av_fp_cmp( theInstr )) goto decode_success;
goto decode_failure;
diff --git a/priv/host-ppc32/isel.c b/priv/host-ppc32/isel.c
index aeb4620..2f4e908 100644
--- a/priv/host-ppc32/isel.c
+++ b/priv/host-ppc32/isel.c
@@ -3783,8 +3783,9 @@
VexSubArch subarch_host = archinfo_host->subarch;
/* sanity ... */
- vassert(subarch_host == VexSubArchPPC32_noAV
- || subarch_host == VexSubArchPPC32_AV);
+ vassert(subarch_host == VexSubArchPPC32_I
+ || subarch_host == VexSubArchPPC32_FI
+ || subarch_host == VexSubArchPPC32_VFI);
/* Make up an initial environment to use. */
env = LibVEX_Alloc(sizeof(ISelEnv));
diff --git a/priv/main/vex_main.c b/priv/main/vex_main.c
index 7c97e76..085093e 100644
--- a/priv/main/vex_main.c
+++ b/priv/main/vex_main.c
@@ -321,8 +321,9 @@
emit = (Int(*)(UChar*,Int,HInstr*)) emit_PPC32Instr;
host_is_bigendian = True;
host_word_type = Ity_I32;
- vassert(archinfo_guest->subarch == VexSubArchPPC32_noAV
- || archinfo_guest->subarch == VexSubArchPPC32_AV);
+ vassert(archinfo_guest->subarch == VexSubArchPPC32_I
+ || archinfo_guest->subarch == VexSubArchPPC32_FI
+ || archinfo_guest->subarch == VexSubArchPPC32_VFI);
break;
default:
@@ -385,8 +386,9 @@
guest_layout = &ppc32Guest_layout;
offB_TISTART = offsetof(VexGuestPPC32State,guest_TISTART);
offB_TILEN = offsetof(VexGuestPPC32State,guest_TILEN);
- vassert(archinfo_guest->subarch == VexSubArchPPC32_noAV
- || archinfo_guest->subarch == VexSubArchPPC32_AV);
+ vassert(archinfo_guest->subarch == VexSubArchPPC32_I
+ || archinfo_guest->subarch == VexSubArchPPC32_FI
+ || archinfo_guest->subarch == VexSubArchPPC32_VFI);
vassert(0 == sizeof(VexGuestPPC32State) % 8);
vassert(sizeof( ((VexGuestPPC32State*)0)->guest_TISTART ) == 4);
vassert(sizeof( ((VexGuestPPC32State*)0)->guest_TILEN ) == 4);
@@ -655,8 +657,9 @@
case VexSubArchX86_sse1: return "x86-sse1";
case VexSubArchX86_sse2: return "x86-sse2";
case VexSubArchARM_v4: return "arm-v4";
- case VexSubArchPPC32_noAV: return "ppc32-noAltivec";
- case VexSubArchPPC32_AV: return "ppc32-Altivec";
+ case VexSubArchPPC32_I: return "ppc32-int-only";
+ case VexSubArchPPC32_FI: return "ppc32-int-and-fp";
+ case VexSubArchPPC32_VFI: return "ppc32-int-fp-and-AV";
default: return "VexSubArch???";
}
}
diff --git a/pub/libvex.h b/pub/libvex.h
index e482737..361981b 100644
--- a/pub/libvex.h
+++ b/pub/libvex.h
@@ -78,8 +78,9 @@
VexSubArchX86_sse1, /* SSE1 support (Pentium III) */
VexSubArchX86_sse2, /* SSE2 support (Pentium 4) */
VexSubArchARM_v4, /* ARM version 4 */
- VexSubArchPPC32_noAV, /* 32-bit PowerPC, no Altivec */
- VexSubArchPPC32_AV /* 32-bit PowerPC with Altivec */
+ VexSubArchPPC32_I, /* 32-bit PowerPC, no FP, no Altivec */
+ VexSubArchPPC32_FI, /* 32-bit PowerPC, with FP but no Altivec */
+ VexSubArchPPC32_VFI /* 32-bit PowerPC, with FP and Altivec */
}
VexSubArch;
diff --git a/test_main.c b/test_main.c
index 0a9c067..7357260 100644
--- a/test_main.c
+++ b/test_main.c
@@ -130,7 +130,7 @@
vai_amd64.subarch = VexSubArch_NONE;
LibVEX_default_VexArchInfo(&vai_ppc32);
- vai_ppc32.subarch = VexSubArchPPC32_AV;
+ vai_ppc32.subarch = VexSubArchPPC32_VFI;
vai_ppc32.ppc32_cache_line_szB = 128;
for (i = 0; i < TEST_N_ITERS; i++)