Moved the variable VGOFF_(m_eip) from x86, and moved it (and its
computation) into the generic core, because it's needed by the dispatch
loop of all archs. Also renamed it VG_(instr_ptr_offset), which is
clearer. Since it was the last use of the VGOFF_ prefix, I removed that
prefix.
Also cleaned up the ARM stubs slightly, by removing some of the copied,
commented-out x86 code which has since fallen out of date with the real
x86 code and was thus misleading.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@3123 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/coregrind/arm/core_arch.h b/coregrind/arm/core_arch.h
index 4e89574..ee0124c 100644
--- a/coregrind/arm/core_arch.h
+++ b/coregrind/arm/core_arch.h
@@ -74,11 +74,6 @@
I_die_here; \
} while (0)
-#if 0
-// So the dispatch loop can find %EIP
-extern Int VGOFF_(m_eip);
-#endif
-
/* ---------------------------------------------------------------------
Elf stuff
------------------------------------------------------------------ */
diff --git a/coregrind/arm/state.c b/coregrind/arm/state.c
index 5204c9f..70a34f7 100644
--- a/coregrind/arm/state.c
+++ b/coregrind/arm/state.c
@@ -38,9 +38,6 @@
/*--- Initialising the first thread ---*/
/*------------------------------------------------------------*/
-Int VGOFF_(m_eip) = INVALID_OFFSET;
-
-
/* Given a pointer to the ThreadArchState for thread 1 (the root
thread), initialise the VEX guest state, and copy in essential
starting values.
@@ -51,49 +48,7 @@
{
I_die_here;
#if 0
- vg_assert(0 == sizeof(VexGuestX86State) % 8);
-
- /* Zero out the initial state, and set up the simulated FPU in a
- sane way. */
- LibVEX_GuestX86_initialise(&arch->vex);
-
- /* Zero out the shadow area. */
- VG_(memset)(&arch->vex_shadow, 0, sizeof(VexGuestX86State));
-
- /* Put essential stuff into the new state. */
- /* initialise %cs, %ds and %ss to point at the operating systems
- default code, data and stack segments */
- arch->vex.guest_ESP = esp_at_startup;
- arch->vex.guest_EIP = client_eip;
-
- asm volatile("movw %%cs, %0"
- :
- : "m" (arch->vex.guest_CS));
- asm volatile("movw %%ds, %0"
- :
- : "m" (arch->vex.guest_DS));
- asm volatile("movw %%ss, %0"
- :
- : "m" (arch->vex.guest_SS));
-
- /* The dispatch loop needs to be able to find %EIP given a pointer
- to the start of the .vex field. */
- VGOFF_(m_eip) = offsetof(VexGuestX86State,guest_EIP)/4;
-
- VG_TRACK( post_reg_write, Vg_CoreStartup, /*tid*/1, /*offset*/0,
- sizeof(VexGuestArchState));
-
- /* I assume that if we have SSE2 we also have SSE */
- VG_(have_ssestate) = False;
- // VG_(cpu_has_feature)(VG_X86_FEAT_FXSR) &&
- // VG_(cpu_has_feature)(VG_X86_FEAT_SSE);
-
- if (0) {
- if (VG_(have_ssestate))
- VG_(printf)("Looks like a SSE-capable CPU\n");
- else
- VG_(printf)("Looks like a MMX-only CPU\n");
- }
+ // When implementing this, look at x86/state.c
#endif
}
@@ -111,14 +66,6 @@
#endif
}
-void VGA_(init_thread)( ThreadArchState *arch )
-{
- I_die_here;
-#if 0
- VG_(baseBlock)[VGOFF_(tls_ptr)] = (UInt)arch->tls;
-#endif
-}
-
void VGA_(cleanup_thread) ( ThreadArchState *arch )
{
I_die_here;
@@ -136,19 +83,7 @@
{
I_die_here;
#if 0
- /* We inherit our parent's LDT. */
- if (parent_regs->ldt == NULL) {
- /* We hope this is the common case. */
- VG_(baseBlock)[VGOFF_(ldt)] = 0;
- } else {
- /* No luck .. we have to take a copy of the parent's. */
- regs->ldt = VG_(allocate_LDT_for_thread)( parent_regs->ldt );
- VG_(baseBlock)[VGOFF_(ldt)] = (UInt) regs->ldt;
- }
-
- /* Initialise the thread's TLS array */
- VG_(clear_TLS_for_thread)( regs->tls );
- VG_(baseBlock)[VGOFF_(tls_ptr)] = (UInt) regs->tls;
+ // XXX: look at x86/state.c
#endif
}
diff --git a/coregrind/core.h b/coregrind/core.h
index 4d4dd92..32eb3fd 100644
--- a/coregrind/core.h
+++ b/coregrind/core.h
@@ -1239,6 +1239,9 @@
/* Counts downwards in vg_run_innerloop. */
extern UInt VG_(dispatch_ctr);
+// Instruction pointer guest state offset, used by $VG_ARCH/dispatch.S.
+extern UInt VG_(instr_ptr_offset);
+
/* --- Counters, for informational purposes only. --- */
// These counters must be declared here because they're maintained by
@@ -1753,7 +1756,7 @@
#define PTHREQ_RET(regs) ((regs).vex.ARCH_PTHREQ_RET)
#define CLREQ_RET(regs) ((regs).vex.ARCH_CLREQ_RET)
-// Offsets for the shadow state
+// Offsets for the Vex state
#define O_STACK_PTR (offsetof(VexGuestArchState, ARCH_STACK_PTR))
#define O_FRAME_PTR (offsetof(VexGuestArchState, ARCH_FRAME_PTR))
diff --git a/coregrind/core_asm.h b/coregrind/core_asm.h
index 46190c2..ae11313 100644
--- a/coregrind/core_asm.h
+++ b/coregrind/core_asm.h
@@ -50,15 +50,11 @@
#define VG_TRC_INNER_COUNTERZERO 29 /* TRC only; means bb ctr == 0 */
#define VG_TRC_UNRESUMABLE_SIGNAL 37 /* TRC only; got sigsegv/sigbus */
-
/* Constants for the fast translation lookup cache. */
#define VG_TT_FAST_BITS 15
#define VG_TT_FAST_SIZE (1 << VG_TT_FAST_BITS)
#define VG_TT_FAST_MASK ((VG_TT_FAST_SIZE) - 1)
-/* Constants for the fast original-code-write check cache. */
-
-
/* Assembly code stubs make this request */
#define VG_USERREQ__SIGNAL_RETURNS 0x4001
diff --git a/coregrind/valgrind.vs b/coregrind/valgrind.vs
index e8233ea..c93f6db 100644
--- a/coregrind/valgrind.vs
+++ b/coregrind/valgrind.vs
@@ -3,7 +3,6 @@
vgPlain_*;
vgTool_*;
vgProf_*;
- vgOff_*;
vgArch_*;
*IROp*;
*IRExpr*;
diff --git a/coregrind/vg_main.c b/coregrind/vg_main.c
index 0930f2c..681058e 100644
--- a/coregrind/vg_main.c
+++ b/coregrind/vg_main.c
@@ -142,6 +142,9 @@
Char** VG_(client_argv);
Char** VG_(client_envp);
+// Instruction pointer guest state offset, used by $VG_ARCH/dispatch.S.
+UInt VG_(instr_ptr_offset);
+
/* ---------------------------------------------------------------------
Running stuff
------------------------------------------------------------------ */
@@ -2617,6 +2620,7 @@
// setup_scheduler() [for the rest of state 1 stuff]
//--------------------------------------------------------------
VGA_(init_thread1state)(client_eip, sp_at_startup, &VG_(threads)[1].arch );
+ VG_(instr_ptr_offset) = offsetof(VexGuestArchState, ARCH_INSTR_PTR);
//--------------------------------------------------------------
// Set up the ProxyLWP machinery
diff --git a/coregrind/x86/core_arch.h b/coregrind/x86/core_arch.h
index 06af902..064123f 100644
--- a/coregrind/x86/core_arch.h
+++ b/coregrind/x86/core_arch.h
@@ -69,7 +69,7 @@
} while (0)
// So the dispatch loop can find %EIP
-extern Int VGOFF_(m_eip);
+extern Int vgoff_m_eip;
/* ---------------------------------------------------------------------
diff --git a/coregrind/x86/dispatch.S b/coregrind/x86/dispatch.S
index 6279942..fb72d13 100644
--- a/coregrind/x86/dispatch.S
+++ b/coregrind/x86/dispatch.S
@@ -85,15 +85,15 @@
movl 28(%esp), %ebp
/* fetch m_eip into %eax */
- movl VGOFF_(m_eip), %esi
- movl (%ebp, %esi, 4), %eax
+ movl VG_(instr_ptr_offset), %esi
+ movl (%ebp, %esi, 1), %eax
/* fall into main loop */
dispatch_boring:
/* save the jump address in the guest state */
- movl VGOFF_(m_eip), %esi
- movl %eax, (%ebp, %esi, 4)
+ movl VG_(instr_ptr_offset), %esi
+ movl %eax, (%ebp, %esi, 1)
/* Are we out of timeslice? If yes, defer to scheduler. */
subl $1, VG_(dispatch_ctr)
@@ -160,9 +160,9 @@
jz counter_is_zero
/* save %eax in %EIP and defer to sched */
- movl VGOFF_(m_eip), %esi
+ movl VG_(instr_ptr_offset), %esi
movl 28(%esp), %edi
- movl %eax, (%edi, %esi, 4)
+ movl %eax, (%edi, %esi, 1)
movl %ebp, %eax
jmp run_innerloop_exit
diff --git a/coregrind/x86/state.c b/coregrind/x86/state.c
index 1525dda..0454a50 100644
--- a/coregrind/x86/state.c
+++ b/coregrind/x86/state.c
@@ -38,9 +38,6 @@
/*--- Initialising the first thread ---*/
/*------------------------------------------------------------*/
-Int VGOFF_(m_eip) = INVALID_OFFSET;
-
-
/* Given a pointer to the ThreadArchState for thread 1 (the root
thread), initialise the VEX guest state, and copy in essential
starting values.
@@ -74,10 +71,6 @@
:
: "m" (arch->vex.guest_SS));
- /* The dispatch loop needs to be able to find %EIP given a pointer
- to the start of the .vex field. */
- VGOFF_(m_eip) = offsetof(VexGuestX86State,guest_EIP)/4;
-
VG_TRACK( post_reg_write, Vg_CoreStartup, /*tid*/1, /*offset*/0,
sizeof(VexGuestArchState));
@@ -253,3 +246,4 @@
/*--------------------------------------------------------------------*/
/*--- end ---*/
/*--------------------------------------------------------------------*/
+
diff --git a/include/tool_asm.h b/include/tool_asm.h
index db36a85..9bd21cb 100644
--- a/include/tool_asm.h
+++ b/include/tool_asm.h
@@ -42,7 +42,6 @@
name can safely be used across different macros. */
#define VG_(str) VGAPPEND(vgPlain_,str)
#define VGP_(str) VGAPPEND(vgProf_,str)
-#define VGOFF_(str) VGAPPEND(vgOff_,str)
#define VGA_(str) VGAPPEND(vgArch_,str)
/* Tool-specific ones. Note that final name still starts with "vg". */