Implement {S,U}CVTF (scalar, fixedpt).
git-svn-id: svn://svn.valgrind.org/vex/trunk@2996 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/host_arm64_isel.c b/priv/host_arm64_isel.c
index d6da9a5..444b46a 100644
--- a/priv/host_arm64_isel.c
+++ b/priv/host_arm64_isel.c
@@ -2965,6 +2965,16 @@
addInstr(env, ARM64Instr_VDfromX(dst, src));
return dst;
}
+ if (con->tag == Ico_F64) {
+ HReg src = newVRegI(env);
+ HReg dst = newVRegD(env);
+ union { Double d64; ULong u64; } u;
+ vassert(sizeof(u) == 8);
+ u.d64 = con->Ico.F64;
+ addInstr(env, ARM64Instr_Imm64(src, u.u64));
+ addInstr(env, ARM64Instr_VDfromX(dst, src));
+ return dst;
+ }
}
if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) {
@@ -3134,6 +3144,16 @@
addInstr(env, ARM64Instr_VDfromX(dst, src));
return dst;
}
+ if (con->tag == Ico_F32) {
+ HReg src = newVRegI(env);
+ HReg dst = newVRegD(env);
+ union { Float f32; UInt u32; } u;
+ vassert(sizeof(u) == 4);
+ u.f32 = con->Ico.F32;
+ addInstr(env, ARM64Instr_Imm64(src, (ULong)u.u32));
+ addInstr(env, ARM64Instr_VDfromX(dst, src));
+ return dst;
+ }
}
if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) {