Dealt with some cases where imm > 0xFFFF
git-svn-id: svn://svn.valgrind.org/vex/trunk@880 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/host-ppc32/hdefs.c b/priv/host-ppc32/hdefs.c
index d3cd5b7..69b1b33 100644
--- a/priv/host-ppc32/hdefs.c
+++ b/priv/host-ppc32/hdefs.c
@@ -242,7 +242,7 @@
/* --------- PPCAMode: memory address expressions. --------- */
PPC32AMode* PPC32AMode_IR ( UInt idx, HReg base ) {
- // CAB: Rem assert immediate
+ vassert(idx < 0x10000);
PPC32AMode* am = LibVEX_Alloc(sizeof(PPC32AMode));
am->tag = Pam_IR;
am->Pam.IR.base = base;
@@ -319,7 +319,6 @@
/* --------- Operand, which can be reg or immediate only. --------- */
PPC32RI* PPC32RI_Imm ( UInt imm32 ) {
- // CAB: Rem assert immediate
PPC32RI* op = LibVEX_Alloc(sizeof(PPC32RI));
op->tag = Pri_Imm;
op->Pri.Imm.imm32 = imm32;
@@ -665,7 +664,8 @@
return;
}
if (i->Pin.Alu32.op == Palu_ADD && // add Rd,R0,Rs == li Rd,Rs
- i->Pin.Alu32.src1 == hregPPC32_GPR0()) {
+ i->Pin.Alu32.src1 == hregPPC32_GPR0() &&
+ i->Pin.Alu32.src2->tag == Pri_Imm) {
vex_printf("li ");
ppHRegPPC32(i->Pin.Alu32.dst);
vex_printf(",");