Don't use non-ansi features in valgrind.h in case it's used in a file
compiled with -ansi.  Added a regtest for it.  Fixed bug #103182.



git-svn-id: svn://svn.valgrind.org/valgrind/trunk@4044 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/include/valgrind.h b/include/valgrind.h
index 963fc86..4c06628 100644
--- a/include/valgrind.h
+++ b/include/valgrind.h
@@ -74,6 +74,10 @@
 
 #include <stdarg.h>
 
+/* Nb: this file might be included in a file compiled with -ansi.  So
+   we can't use C++ style "//" comments nor the "asm" keyword (instead
+   use "__asm__"). */
+
 /* If we're not compiling for our target architecture, don't generate
    any inline asms.  Note that in this file we're using the compiler's
    CPP symbols for identifying architectures, which are different to
@@ -132,15 +136,15 @@
     _zzq_args[2] = (volatile unsigned long long)(_zzq_arg2);    \
     _zzq_args[3] = (volatile unsigned long long)(_zzq_arg3);    \
     _zzq_args[4] = (volatile unsigned long long)(_zzq_arg4);    \
-    asm volatile("roll $29, %%eax ; roll $3, %%eax\n\t"		\
-                 "rorl $27, %%eax ; rorl $5, %%eax\n\t"		\
-                 "roll $13, %%eax ; roll $19, %%eax"		\
-                 : "=d" (_zzq_rlval)				\
-                 : "a" (&_zzq_args[0]), "0" (_zzq_default)	\
-                 : "cc", "memory"				\
-                );						\
+    __asm__ volatile("roll $29, %%eax ; roll $3, %%eax\n\t"	\
+                     "rorl $27, %%eax ; rorl $5, %%eax\n\t"	\
+                     "roll $13, %%eax ; roll $19, %%eax"		\
+                     : "=d" (_zzq_rlval)				\
+                     : "a" (&_zzq_args[0]), "0" (_zzq_default)	\
+                     : "cc", "memory"				\
+                    );						\
   }
-#endif  // __x86_64__
+#endif  /* __x86_64__ */
 
 #ifdef __i386__
 #define VALGRIND_MAGIC_SEQUENCE(				\
@@ -153,18 +157,18 @@
     _zzq_args[2] = (unsigned int)(_zzq_arg2);			\
     _zzq_args[3] = (unsigned int)(_zzq_arg3);			\
     _zzq_args[4] = (unsigned int)(_zzq_arg4);			\
-    asm volatile("roll $29, %%eax ; roll $3, %%eax\n\t"		\
-                 "rorl $27, %%eax ; rorl $5, %%eax\n\t"		\
-                 "roll $13, %%eax ; roll $19, %%eax"		\
-                 : "=d" (_zzq_rlval)				\
-                 : "a" (&_zzq_args[0]), "0" (_zzq_default)	\
-                 : "cc", "memory"				\
-                );						\
+    __asm__ volatile("roll $29, %%eax ; roll $3, %%eax\n\t"	\
+                     "rorl $27, %%eax ; rorl $5, %%eax\n\t"	\
+                     "roll $13, %%eax ; roll $19, %%eax"	\
+                     : "=d" (_zzq_rlval)			\
+                     : "a" (&_zzq_args[0]), "0" (_zzq_default)	\
+                     : "cc", "memory"				\
+                    );						\
   }
-#endif  // __i386__
+#endif  /* __i386__ */
 
 #ifdef __arm__
-// XXX: temporary, until MAGIC_SEQUENCE is written properly
+/* XXX: temporary, until MAGIC_SEQUENCE is written properly */
 extern int printf (__const char *__restrict __format, ...);
 extern void exit (int __status);
 #define VALGRIND_MAGIC_SEQUENCE(                                        \
@@ -179,11 +183,11 @@
     _zzq_args[4] = (volatile unsigned int)(_zzq_arg4);                  \
     (_zzq_rlval) = (_zzq_default);/* temporary only */  \
     printf("argh: MAGIC_SEQUENCE"); exit(1); \
-    asm volatile("");                                                   \
+    __asm__ volatile("");                                                   \
   }
-// XXX: make sure that the register holding the args and the register taking
-// the return value match what the scheduler is expecting.
-#endif  // __arm__
+/* XXX: make sure that the register holding the args and the register taking
+ * the return value match what the scheduler is expecting. */
+#endif  /* __arm__ */
 
 #ifdef __powerpc__
 #define VALGRIND_MAGIC_SEQUENCE(                                        \
@@ -199,20 +203,20 @@
     _zzq_args[3] = (volatile unsigned int)(_zzq_arg3);                  \
     _zzq_args[4] = (volatile unsigned int)(_zzq_arg4);                  \
     _zzq_ptr = _zzq_args;                                               \
-    asm volatile("tw 0,3,27\n\t"                                        \
-                 "rlwinm 0,0,29,0,0\n\t"                                \
-                 "rlwinm 0,0,3,0,0\n\t"                                 \
-                 "rlwinm 0,0,13,0,0\n\t"                                \
-                 "rlwinm 0,0,19,0,0\n\t"                                \
-                 "nop\n\t"                                              \
-                 : "=r" (_zzq_tmp)                                      \
-                 : "0" (_zzq_default), "r" (_zzq_ptr)                   \
-                 : "memory");                                           \
+    __asm__ volatile("tw 0,3,27\n\t"                                    \
+                     "rlwinm 0,0,29,0,0\n\t"                            \
+                     "rlwinm 0,0,3,0,0\n\t"                             \
+                     "rlwinm 0,0,13,0,0\n\t"                            \
+                     "rlwinm 0,0,19,0,0\n\t"                            \
+                     "nop\n\t"                                          \
+                     : "=r" (_zzq_tmp)                                  \
+                     : "0" (_zzq_default), "r" (_zzq_ptr)               \
+                     : "memory");                                       \
     _zzq_rlval = (__typeof__(_zzq_rlval)) _zzq_tmp;                     \
   }
-#endif   // __powerpc__
+#endif   /* __powerpc__ */
 
-// Insert assembly code for other architectures here...
+/* Insert assembly code for other architectures here... */
 
 #endif /* NVALGRIND */
 
@@ -229,8 +233,8 @@
    start at 0x2000.
 */
 
-// These macros are used by tools -- they must be public, but don't embed them
-// into other programs.
+/* These macros are used by tools -- they must be public, but don't embed them
+ * into other programs. */
 #define VG_USERREQ_TOOL_BASE(a,b) \
    ((unsigned int)(((a)&0xff) << 24 | ((b)&0xff) << 16))
 #define VG_IS_TOOL_USERREQ(a, b, v) \