Track minor Vex API changes that occurred in Vex rev 1059.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@3393 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/addrcheck/ac_main.c b/addrcheck/ac_main.c
index be85c3a..93ae96e 100644
--- a/addrcheck/ac_main.c
+++ b/addrcheck/ac_main.c
@@ -1003,7 +1003,7 @@
bb->jumpkind = bb_in->jumpkind;
/* No loads to consider in ->next. */
- tl_assert(isAtom(bb_in->next));
+ tl_assert(isIRAtom(bb_in->next));
for (i = 0; i < bb_in->stmts_used; i++) {
st = bb_in->stmts[i];
@@ -1031,23 +1031,23 @@
case Ist_STle:
data = st->Ist.STle.data;
aexpr = st->Ist.STle.addr;
- tl_assert(isAtom(data));
- tl_assert(isAtom(aexpr));
+ tl_assert(isIRAtom(data));
+ tl_assert(isIRAtom(aexpr));
hsz = sizeofIRType(typeOfIRExpr(bb_in->tyenv, data));
isLoad = False;
break;
case Ist_Put:
- tl_assert(isAtom(st->Ist.Put.data));
+ tl_assert(isIRAtom(st->Ist.Put.data));
break;
case Ist_PutI:
- tl_assert(isAtom(st->Ist.PutI.ix));
- tl_assert(isAtom(st->Ist.PutI.data));
+ tl_assert(isIRAtom(st->Ist.PutI.ix));
+ tl_assert(isIRAtom(st->Ist.PutI.data));
break;
case Ist_Exit:
- tl_assert(isAtom(st->Ist.Exit.guard));
+ tl_assert(isIRAtom(st->Ist.Exit.guard));
break;
case Ist_Dirty:
@@ -1057,7 +1057,7 @@
hsz = st->Ist.Dirty.details->mSize;
aexpr = st->Ist.Dirty.details->mAddr;
guard = st->Ist.Dirty.details->guard;
- tl_assert(isAtom(aexpr));
+ tl_assert(isIRAtom(aexpr));
}
break;
diff --git a/cachegrind/cg_main.c b/cachegrind/cg_main.c
index 1d5ab05..03feacb 100644
--- a/cachegrind/cg_main.c
+++ b/cachegrind/cg_main.c
@@ -408,7 +408,7 @@
IRExpr* data = st->Ist.Tmp.data;
if (data->tag == Iex_LDle) {
IRExpr* aexpr = data->Iex.LDle.addr;
- tl_assert( isAtom(aexpr) );
+ tl_assert( isIRAtom(aexpr) );
// XXX: repe cmpsb does two loads... the first one is ignored here!
//tl_assert( NULL == *loadAddrExpr ); // XXX: ???
@@ -422,7 +422,7 @@
case Ist_STle: {
IRExpr* data = st->Ist.STle.data;
IRExpr* aexpr = st->Ist.STle.addr;
- tl_assert( isAtom(aexpr) );
+ tl_assert( isIRAtom(aexpr) );
tl_assert( NULL == *storeAddrExpr ); // XXX: ???
*storeAddrExpr = aexpr;
*dataSize = sizeofIRType(typeOfIRExpr(tyenv, data));
@@ -478,18 +478,9 @@
// I'm assuming that for 'modify' instructions, that Vex always makes
// the loadAddrExpr and storeAddrExpr be of the same type, ie. both Tmp
// expressions, or both Const expressions.
- if ( (Iex_Tmp == loadAddrExpr->tag &&
- Iex_Tmp == storeAddrExpr->tag &&
- loadAddrExpr->Iex.Tmp.tmp == storeAddrExpr->Iex.Tmp.tmp)
- ||
- (Iex_Const == loadAddrExpr->tag &&
- Iex_Const == storeAddrExpr->tag &&
- loadAddrExpr->Iex.Const.con == storeAddrExpr->Iex.Const.con) )
- {
- return True;
- } else {
- return False;
- }
+ tl_assert(isIRAtom(loadAddrExpr));
+ tl_assert(isIRAtom(storeAddrExpr));
+ return eqIRAtom(loadAddrExpr, storeAddrExpr);
}
// Instrumentation for the end of each original instruction.
@@ -524,7 +515,7 @@
} else if (loadAddrExpr && !storeAddrExpr) {
// load
tl_assert( is_valid_data_size(dataSize) );
- tl_assert( isAtom(loadAddrExpr) );
+ tl_assert( isIRAtom(loadAddrExpr) );
helperName = "log_1I_1Dr_cache_access";
helperAddr = &log_1I_1Dr_cache_access;
argc = 2;
@@ -534,7 +525,7 @@
} else if (!loadAddrExpr && storeAddrExpr) {
// store
tl_assert( is_valid_data_size(dataSize) );
- tl_assert( isAtom(storeAddrExpr) );
+ tl_assert( isIRAtom(storeAddrExpr) );
helperName = "log_1I_1Dw_cache_access";
helperAddr = &log_1I_1Dw_cache_access;
argc = 2;
@@ -544,8 +535,8 @@
} else {
tl_assert( loadAddrExpr && storeAddrExpr );
tl_assert( is_valid_data_size(dataSize) );
- tl_assert( isAtom(loadAddrExpr) );
- tl_assert( isAtom(storeAddrExpr) );
+ tl_assert( isIRAtom(loadAddrExpr) );
+ tl_assert( isIRAtom(storeAddrExpr) );
if ( loadStoreAddrsMatch(loadAddrExpr, storeAddrExpr) ) {
// modify
diff --git a/coregrind/valgrind.vs b/coregrind/valgrind.vs
index c93f6db..17c7678 100644
--- a/coregrind/valgrind.vs
+++ b/coregrind/valgrind.vs
@@ -14,8 +14,8 @@
*IRConst*;
*IRCallee*;
*IRArray*;
+ *IRAtom*;
LibVEX_Alloc;
-
local:
*; # default to hidden
};
diff --git a/memcheck/mc_translate.c b/memcheck/mc_translate.c
index e73680b..7de3e06 100644
--- a/memcheck/mc_translate.c
+++ b/memcheck/mc_translate.c
@@ -134,7 +134,7 @@
/*------------------------------------------------------------*/
/* An atom is either an IRExpr_Const or an IRExpr_Tmp, as defined by
- isAtom() in libvex_ir.h. Because this instrumenter expects flat
+ isIRAtom() in libvex_ir.h. Because this instrumenter expects flat
input, most of this code deals in atoms. Usefully, a value atom
always has a V-value which is also an atom: constants are shadowed
by constants, and temps are shadowed by the corresponding shadow
@@ -701,7 +701,7 @@
/* Set the shadow tmp to be defined. First, update the
orig->shadow tmp mapping to reflect the fact that this shadow is
getting a new value. */
- tl_assert(isAtom(vatom));
+ tl_assert(isIRAtom(vatom));
/* sameKindedAtoms ... */
if (vatom->tag == Iex_Tmp) {
tl_assert(atom->tag == Iex_Tmp);
@@ -2293,7 +2293,7 @@
{
ULong n = 0;
IRConst* con;
- tl_assert(isAtom(at));
+ tl_assert(isIRAtom(at));
if (at->tag == Iex_Tmp)
return False;
tl_assert(at->tag == Iex_Const);