Test shrd/shld.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5009 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/none/tests/amd64/Makefile.am b/none/tests/amd64/Makefile.am
index 6fb93ae..42b58f5 100644
--- a/none/tests/amd64/Makefile.am
+++ b/none/tests/amd64/Makefile.am
@@ -11,10 +11,12 @@
$(addsuffix .vgtest,$(INSN_TESTS)) \
jrcxz.stderr.exp jrcxz.stdout.exp jrcxz.vgtest \
looper.stderr.exp looper.stdout.exp looper.vgtest \
- smc1.stderr.exp smc1.stdout.exp smc1.vgtest
+ smc1.stderr.exp smc1.stdout.exp smc1.vgtest \
+ shrld.stderr.exp shrld.stdout.exp shrld.vgtest
+
check_PROGRAMS = \
- faultstatus $(INSN_TESTS) looper jrcxz smc1
+ faultstatus $(INSN_TESTS) looper jrcxz smc1 shrld
AM_CFLAGS = $(WERROR) -Winline -Wall -Wshadow -g -I$(top_srcdir)/include
AM_CXXFLAGS = $(AM_CFLAGS)
diff --git a/none/tests/amd64/shrld.c b/none/tests/amd64/shrld.c
new file mode 100644
index 0000000..ca9d699
--- /dev/null
+++ b/none/tests/amd64/shrld.c
@@ -0,0 +1,247 @@
+
+#include <stdio.h>
+
+typedef unsigned long long int ULong;
+
+ULong data;
+ULong xtra;
+ULong amt;
+ULong flags_in;
+ULong result;
+ULong flags_out;
+
+#define AMD64G_CC_SHIFT_O 11
+#define AMD64G_CC_SHIFT_S 7
+#define AMD64G_CC_SHIFT_Z 6
+#define AMD64G_CC_SHIFT_A 4
+#define AMD64G_CC_SHIFT_C 0
+#define AMD64G_CC_SHIFT_P 2
+
+#define AMD64G_CC_MASK_O (1 << AMD64G_CC_SHIFT_O)
+#define AMD64G_CC_MASK_S (1 << AMD64G_CC_SHIFT_S)
+#define AMD64G_CC_MASK_Z (1 << AMD64G_CC_SHIFT_Z)
+#define AMD64G_CC_MASK_A (1 << AMD64G_CC_SHIFT_A)
+#define AMD64G_CC_MASK_C (1 << AMD64G_CC_SHIFT_C)
+#define AMD64G_CC_MASK_P (1 << AMD64G_CC_SHIFT_P)
+
+#define MASK_OSZACP \
+ (AMD64G_CC_MASK_O | AMD64G_CC_MASK_S | AMD64G_CC_MASK_Z \
+ | AMD64G_CC_MASK_A | AMD64G_CC_MASK_C | AMD64G_CC_MASK_P)
+
+extern void shld64 ( void );
+asm("\n"
+"shld64:\n"
+"\tpushq %rsi\n"
+"\tpushq %r11\n"
+"\tpushq %rcx\n"
+"\tmovq data, %rsi\n"
+"\tmovq xtra, %r11\n"
+"\tmovq amt, %rcx\n"
+"\tpushq flags_in\n"
+"\tpopfq\n"
+"\tshldq %cl, %r11, %rsi\n"
+"\tmovq %rsi, result\n"
+"\tpushfq\n"
+"\tpopq flags_out\n"
+"\tpopq %rcx\n"
+"\tpopq %r11\n"
+"\tpopq %rsi\n"
+"\tret\n"
+);
+
+extern void shld32 ( void );
+asm("\n"
+"shld32:\n"
+"\tpushq %rsi\n"
+"\tpushq %r11\n"
+"\tpushq %rcx\n"
+"\tmovq data, %rsi\n"
+"\tmovq xtra, %r11\n"
+"\tmovq amt, %rcx\n"
+"\tpushq flags_in\n"
+"\tpopfq\n"
+"\tshldl %cl, %r11d, %esi\n"
+"\tmovq %rsi, result\n"
+"\tpushfq\n"
+"\tpopq flags_out\n"
+"\tpopq %rcx\n"
+"\tpopq %r11\n"
+"\tpopq %rsi\n"
+"\tret\n"
+);
+
+extern void shld16 ( void );
+asm("\n"
+"shld16:\n"
+"\tpushq %rsi\n"
+"\tpushq %r11\n"
+"\tpushq %rcx\n"
+"\tmovq data, %rsi\n"
+"\tmovq xtra, %r11\n"
+"\tmovq amt, %rcx\n"
+"\tpushq flags_in\n"
+"\tpopfq\n"
+"\tshldw %cl, %r11w, %si\n"
+"\tmovq %rsi, result\n"
+"\tpushfq\n"
+"\tpopq flags_out\n"
+"\tpopq %rcx\n"
+"\tpopq %r11\n"
+"\tpopq %rsi\n"
+"\tret\n"
+);
+
+
+extern void shrd64 ( void );
+asm("\n"
+"shrd64:\n"
+"\tpushq %rsi\n"
+"\tpushq %r11\n"
+"\tpushq %rcx\n"
+"\tmovq data, %rsi\n"
+"\tmovq xtra, %r11\n"
+"\tmovq amt, %rcx\n"
+"\tpushq flags_in\n"
+"\tpopfq\n"
+"\tshrdq %cl, %r11, %rsi\n"
+"\tmovq %rsi, result\n"
+"\tpushfq\n"
+"\tpopq flags_out\n"
+"\tpopq %rcx\n"
+"\tpopq %r11\n"
+"\tpopq %rsi\n"
+"\tret\n"
+);
+
+extern void shrd32 ( void );
+asm("\n"
+"shrd32:\n"
+"\tpushq %rsi\n"
+"\tpushq %r11\n"
+"\tpushq %rcx\n"
+"\tmovq data, %rsi\n"
+"\tmovq xtra, %r11\n"
+"\tmovq amt, %rcx\n"
+"\tpushq flags_in\n"
+"\tpopfq\n"
+"\tshrdl %cl, %r11d, %esi\n"
+"\tmovq %rsi, result\n"
+"\tpushfq\n"
+"\tpopq flags_out\n"
+"\tpopq %rcx\n"
+"\tpopq %r11\n"
+"\tpopq %rsi\n"
+"\tret\n"
+);
+
+extern void shrd16 ( void );
+asm("\n"
+"shrd16:\n"
+"\tpushq %rsi\n"
+"\tpushq %r11\n"
+"\tpushq %rcx\n"
+"\tmovq data, %rsi\n"
+"\tmovq xtra, %r11\n"
+"\tmovq amt, %rcx\n"
+"\tpushq flags_in\n"
+"\tpopfq\n"
+"\tshrdw %cl, %r11w, %si\n"
+"\tmovq %rsi, result\n"
+"\tpushfq\n"
+"\tpopq flags_out\n"
+"\tpopq %rcx\n"
+"\tpopq %r11\n"
+"\tpopq %rsi\n"
+"\tret\n"
+);
+
+
+int main ( void )
+{
+ int i;
+ ULong mask;
+
+ printf("\nleft 64\n");
+ for (i = 0; i < 260; i++) {
+ mask = MASK_OSZACP;
+ if (i > 1) mask &= ~AMD64G_CC_MASK_O;
+ if (i > 0) mask &= ~AMD64G_CC_MASK_A;
+ data = 0x1122334455667788ULL;
+ xtra = 0x3141592727182818ULL;
+ flags_in = 0ULL;
+ amt = (ULong)i;
+ shld64();
+ printf("%3d 0x%016llx 0x%llx\n", i, result, flags_out & mask);
+ }
+
+ printf("\nleft 32\n");
+ for (i = 0; i < 260; i++) {
+ mask = MASK_OSZACP;
+ if (i > 1) mask &= ~AMD64G_CC_MASK_O;
+ if (i > 0) mask &= ~AMD64G_CC_MASK_A;
+ data = 0x1122334455667788ULL;
+ xtra = 0x3141592727182818ULL;
+ flags_in = 0ULL;
+ amt = (ULong)i;
+ shld32();
+ printf("%3d 0x%016llx 0x%llx\n", i, result, flags_out & mask);
+ }
+ printf("\n");
+
+ printf("\nleft 16\n");
+ for (i = 0; i < 260; i++) {
+ mask = MASK_OSZACP;
+ if (i > 1) mask &= ~AMD64G_CC_MASK_O;
+ if (i > 0) mask &= ~AMD64G_CC_MASK_A;
+ data = 0x1122334455667788ULL;
+ xtra = 0x987654321987abcdULL;
+ flags_in = 0ULL;
+ amt = (ULong)i;
+ shld16();
+ printf("%3d 0x%016llx 0x%llx\n", i, result, flags_out & mask);
+ }
+ printf("\n");
+
+ printf("\nright 64\n");
+ for (i = 0; i < 260; i++) {
+ mask = MASK_OSZACP;
+ if (i > 1) mask &= ~AMD64G_CC_MASK_O;
+ if (i > 0) mask &= ~AMD64G_CC_MASK_A;
+ data = 0x1122334455667788ULL;
+ xtra = 0x3141592727182818ULL;
+ flags_in = 0ULL;
+ amt = (ULong)i;
+ shrd64();
+ printf("%3d 0x%016llx 0x%llx\n", i, result, flags_out & mask);
+ }
+
+ printf("\nright 32\n");
+ for (i = 0; i < 260; i++) {
+ mask = MASK_OSZACP;
+ if (i > 1) mask &= ~AMD64G_CC_MASK_O;
+ if (i > 0) mask &= ~AMD64G_CC_MASK_A;
+ data = 0x1122334455667788ULL;
+ xtra = 0x3141592727182818ULL;
+ flags_in = 0ULL;
+ amt = (ULong)i;
+ shrd32();
+ printf("%3d 0x%016llx 0x%llx\n", i, result, flags_out & mask);
+ }
+ printf("\n");
+
+ printf("\nright 16\n");
+ for (i = 0; i < 260; i++) {
+ mask = MASK_OSZACP;
+ if (i > 1) mask &= ~AMD64G_CC_MASK_O;
+ if (i > 0) mask &= ~AMD64G_CC_MASK_A;
+ data = 0x1122334455667788ULL;
+ xtra = 0x987654321987abcdULL;
+ flags_in = 0ULL;
+ amt = (ULong)i;
+ shrd16();
+ printf("%3d 0x%016llx 0x%llx\n", i, result, flags_out & mask);
+ }
+ printf("\n");
+
+ return 0;
+}
diff --git a/none/tests/amd64/shrld.stderr.exp b/none/tests/amd64/shrld.stderr.exp
new file mode 100644
index 0000000..139597f
--- /dev/null
+++ b/none/tests/amd64/shrld.stderr.exp
@@ -0,0 +1,2 @@
+
+
diff --git a/none/tests/amd64/shrld.stdout.exp b/none/tests/amd64/shrld.stdout.exp
new file mode 100644
index 0000000..a8fbe09
--- /dev/null
+++ b/none/tests/amd64/shrld.stdout.exp
@@ -0,0 +1,1576 @@
+
+left 64
+ 0 0x1122334455667788 0x0
+ 1 0x22446688aaccef10 0x0
+ 2 0x4488cd115599de20 0x0
+ 3 0x89119a22ab33bc41 0x84
+ 4 0x1223344556677883 0x1
+ 5 0x2446688aaccef106 0x4
+ 6 0x488cd115599de20c 0x4
+ 7 0x9119a22ab33bc418 0x84
+ 8 0x2233445566778831 0x1
+ 9 0x446688aaccef1062 0x0
+ 10 0x88cd115599de20c5 0x84
+ 11 0x119a22ab33bc418a 0x1
+ 12 0x2334455667788314 0x4
+ 13 0x46688aaccef10628 0x4
+ 14 0x8cd115599de20c50 0x84
+ 15 0x19a22ab33bc418a0 0x5
+ 16 0x3344556677883141 0x4
+ 17 0x6688aaccef106282 0x4
+ 18 0xcd115599de20c505 0x84
+ 19 0x9a22ab33bc418a0a 0x85
+ 20 0x3445566778831415 0x1
+ 21 0x688aaccef106282b 0x4
+ 22 0xd115599de20c5056 0x84
+ 23 0xa22ab33bc418a0ac 0x85
+ 24 0x4455667788314159 0x5
+ 25 0x88aaccef106282b2 0x84
+ 26 0x115599de20c50564 0x1
+ 27 0x22ab33bc418a0ac9 0x4
+ 28 0x4556677883141592 0x0
+ 29 0x8aaccef106282b24 0x84
+ 30 0x15599de20c505649 0x1
+ 31 0x2ab33bc418a0ac93 0x4
+ 32 0x5566778831415927 0x4
+ 33 0xaaccef106282b24e 0x84
+ 34 0x5599de20c505649c 0x5
+ 35 0xab33bc418a0ac939 0x84
+ 36 0x5667788314159272 0x5
+ 37 0xaccef106282b24e4 0x84
+ 38 0x599de20c505649c9 0x5
+ 39 0xb33bc418a0ac9393 0x84
+ 40 0x6677883141592727 0x5
+ 41 0xccef106282b24e4e 0x84
+ 42 0x99de20c505649c9c 0x85
+ 43 0x33bc418a0ac93938 0x1
+ 44 0x6778831415927271 0x4
+ 45 0xcef106282b24e4e3 0x80
+ 46 0x9de20c505649c9c6 0x85
+ 47 0x3bc418a0ac93938c 0x1
+ 48 0x7788314159272718 0x4
+ 49 0xef106282b24e4e30 0x84
+ 50 0xde20c505649c9c60 0x85
+ 51 0xbc418a0ac93938c1 0x81
+ 52 0x7883141592727182 0x5
+ 53 0xf106282b24e4e305 0x84
+ 54 0xe20c505649c9c60a 0x85
+ 55 0xc418a0ac93938c14 0x85
+ 56 0x8831415927271828 0x85
+ 57 0x106282b24e4e3050 0x5
+ 58 0x20c505649c9c60a0 0x4
+ 59 0x418a0ac93938c140 0x0
+ 60 0x8314159272718281 0x84
+ 61 0x06282b24e4e30503 0x5
+ 62 0x0c505649c9c60a06 0x4
+ 63 0x18a0ac93938c140c 0x4
+ 64 0x1122334455667788 0x0
+ 65 0x22446688aaccef10 0x0
+ 66 0x4488cd115599de20 0x0
+ 67 0x89119a22ab33bc41 0x84
+ 68 0x1223344556677883 0x1
+ 69 0x2446688aaccef106 0x4
+ 70 0x488cd115599de20c 0x4
+ 71 0x9119a22ab33bc418 0x84
+ 72 0x2233445566778831 0x1
+ 73 0x446688aaccef1062 0x0
+ 74 0x88cd115599de20c5 0x84
+ 75 0x119a22ab33bc418a 0x1
+ 76 0x2334455667788314 0x4
+ 77 0x46688aaccef10628 0x4
+ 78 0x8cd115599de20c50 0x84
+ 79 0x19a22ab33bc418a0 0x5
+ 80 0x3344556677883141 0x4
+ 81 0x6688aaccef106282 0x4
+ 82 0xcd115599de20c505 0x84
+ 83 0x9a22ab33bc418a0a 0x85
+ 84 0x3445566778831415 0x1
+ 85 0x688aaccef106282b 0x4
+ 86 0xd115599de20c5056 0x84
+ 87 0xa22ab33bc418a0ac 0x85
+ 88 0x4455667788314159 0x5
+ 89 0x88aaccef106282b2 0x84
+ 90 0x115599de20c50564 0x1
+ 91 0x22ab33bc418a0ac9 0x4
+ 92 0x4556677883141592 0x0
+ 93 0x8aaccef106282b24 0x84
+ 94 0x15599de20c505649 0x1
+ 95 0x2ab33bc418a0ac93 0x4
+ 96 0x5566778831415927 0x4
+ 97 0xaaccef106282b24e 0x84
+ 98 0x5599de20c505649c 0x5
+ 99 0xab33bc418a0ac939 0x84
+100 0x5667788314159272 0x5
+101 0xaccef106282b24e4 0x84
+102 0x599de20c505649c9 0x5
+103 0xb33bc418a0ac9393 0x84
+104 0x6677883141592727 0x5
+105 0xccef106282b24e4e 0x84
+106 0x99de20c505649c9c 0x85
+107 0x33bc418a0ac93938 0x1
+108 0x6778831415927271 0x4
+109 0xcef106282b24e4e3 0x80
+110 0x9de20c505649c9c6 0x85
+111 0x3bc418a0ac93938c 0x1
+112 0x7788314159272718 0x4
+113 0xef106282b24e4e30 0x84
+114 0xde20c505649c9c60 0x85
+115 0xbc418a0ac93938c1 0x81
+116 0x7883141592727182 0x5
+117 0xf106282b24e4e305 0x84
+118 0xe20c505649c9c60a 0x85
+119 0xc418a0ac93938c14 0x85
+120 0x8831415927271828 0x85
+121 0x106282b24e4e3050 0x5
+122 0x20c505649c9c60a0 0x4
+123 0x418a0ac93938c140 0x0
+124 0x8314159272718281 0x84
+125 0x06282b24e4e30503 0x5
+126 0x0c505649c9c60a06 0x4
+127 0x18a0ac93938c140c 0x4
+128 0x1122334455667788 0x0
+129 0x22446688aaccef10 0x0
+130 0x4488cd115599de20 0x0
+131 0x89119a22ab33bc41 0x84
+132 0x1223344556677883 0x1
+133 0x2446688aaccef106 0x4
+134 0x488cd115599de20c 0x4
+135 0x9119a22ab33bc418 0x84
+136 0x2233445566778831 0x1
+137 0x446688aaccef1062 0x0
+138 0x88cd115599de20c5 0x84
+139 0x119a22ab33bc418a 0x1
+140 0x2334455667788314 0x4
+141 0x46688aaccef10628 0x4
+142 0x8cd115599de20c50 0x84
+143 0x19a22ab33bc418a0 0x5
+144 0x3344556677883141 0x4
+145 0x6688aaccef106282 0x4
+146 0xcd115599de20c505 0x84
+147 0x9a22ab33bc418a0a 0x85
+148 0x3445566778831415 0x1
+149 0x688aaccef106282b 0x4
+150 0xd115599de20c5056 0x84
+151 0xa22ab33bc418a0ac 0x85
+152 0x4455667788314159 0x5
+153 0x88aaccef106282b2 0x84
+154 0x115599de20c50564 0x1
+155 0x22ab33bc418a0ac9 0x4
+156 0x4556677883141592 0x0
+157 0x8aaccef106282b24 0x84
+158 0x15599de20c505649 0x1
+159 0x2ab33bc418a0ac93 0x4
+160 0x5566778831415927 0x4
+161 0xaaccef106282b24e 0x84
+162 0x5599de20c505649c 0x5
+163 0xab33bc418a0ac939 0x84
+164 0x5667788314159272 0x5
+165 0xaccef106282b24e4 0x84
+166 0x599de20c505649c9 0x5
+167 0xb33bc418a0ac9393 0x84
+168 0x6677883141592727 0x5
+169 0xccef106282b24e4e 0x84
+170 0x99de20c505649c9c 0x85
+171 0x33bc418a0ac93938 0x1
+172 0x6778831415927271 0x4
+173 0xcef106282b24e4e3 0x80
+174 0x9de20c505649c9c6 0x85
+175 0x3bc418a0ac93938c 0x1
+176 0x7788314159272718 0x4
+177 0xef106282b24e4e30 0x84
+178 0xde20c505649c9c60 0x85
+179 0xbc418a0ac93938c1 0x81
+180 0x7883141592727182 0x5
+181 0xf106282b24e4e305 0x84
+182 0xe20c505649c9c60a 0x85
+183 0xc418a0ac93938c14 0x85
+184 0x8831415927271828 0x85
+185 0x106282b24e4e3050 0x5
+186 0x20c505649c9c60a0 0x4
+187 0x418a0ac93938c140 0x0
+188 0x8314159272718281 0x84
+189 0x06282b24e4e30503 0x5
+190 0x0c505649c9c60a06 0x4
+191 0x18a0ac93938c140c 0x4
+192 0x1122334455667788 0x0
+193 0x22446688aaccef10 0x0
+194 0x4488cd115599de20 0x0
+195 0x89119a22ab33bc41 0x84
+196 0x1223344556677883 0x1
+197 0x2446688aaccef106 0x4
+198 0x488cd115599de20c 0x4
+199 0x9119a22ab33bc418 0x84
+200 0x2233445566778831 0x1
+201 0x446688aaccef1062 0x0
+202 0x88cd115599de20c5 0x84
+203 0x119a22ab33bc418a 0x1
+204 0x2334455667788314 0x4
+205 0x46688aaccef10628 0x4
+206 0x8cd115599de20c50 0x84
+207 0x19a22ab33bc418a0 0x5
+208 0x3344556677883141 0x4
+209 0x6688aaccef106282 0x4
+210 0xcd115599de20c505 0x84
+211 0x9a22ab33bc418a0a 0x85
+212 0x3445566778831415 0x1
+213 0x688aaccef106282b 0x4
+214 0xd115599de20c5056 0x84
+215 0xa22ab33bc418a0ac 0x85
+216 0x4455667788314159 0x5
+217 0x88aaccef106282b2 0x84
+218 0x115599de20c50564 0x1
+219 0x22ab33bc418a0ac9 0x4
+220 0x4556677883141592 0x0
+221 0x8aaccef106282b24 0x84
+222 0x15599de20c505649 0x1
+223 0x2ab33bc418a0ac93 0x4
+224 0x5566778831415927 0x4
+225 0xaaccef106282b24e 0x84
+226 0x5599de20c505649c 0x5
+227 0xab33bc418a0ac939 0x84
+228 0x5667788314159272 0x5
+229 0xaccef106282b24e4 0x84
+230 0x599de20c505649c9 0x5
+231 0xb33bc418a0ac9393 0x84
+232 0x6677883141592727 0x5
+233 0xccef106282b24e4e 0x84
+234 0x99de20c505649c9c 0x85
+235 0x33bc418a0ac93938 0x1
+236 0x6778831415927271 0x4
+237 0xcef106282b24e4e3 0x80
+238 0x9de20c505649c9c6 0x85
+239 0x3bc418a0ac93938c 0x1
+240 0x7788314159272718 0x4
+241 0xef106282b24e4e30 0x84
+242 0xde20c505649c9c60 0x85
+243 0xbc418a0ac93938c1 0x81
+244 0x7883141592727182 0x5
+245 0xf106282b24e4e305 0x84
+246 0xe20c505649c9c60a 0x85
+247 0xc418a0ac93938c14 0x85
+248 0x8831415927271828 0x85
+249 0x106282b24e4e3050 0x5
+250 0x20c505649c9c60a0 0x4
+251 0x418a0ac93938c140 0x0
+252 0x8314159272718281 0x84
+253 0x06282b24e4e30503 0x5
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diff --git a/none/tests/amd64/shrld.vgtest b/none/tests/amd64/shrld.vgtest
new file mode 100644
index 0000000..3f89929
--- /dev/null
+++ b/none/tests/amd64/shrld.vgtest
@@ -0,0 +1 @@
+prog: shrld