mips64: add tests for load indexed instructions
Tests that should be executed on MIPS64 platforms that support lwx, ldx
and lbux.
Relevant VEX change - r2819.
Patch by Zahid Anwar, with some changes.
Related to Bugzilla issue 326444. It closes this issue now.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13808 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/none/tests/mips64/Makefile.am b/none/tests/mips64/Makefile.am
index a88bcf0..93e9713 100644
--- a/none/tests/mips64/Makefile.am
+++ b/none/tests/mips64/Makefile.am
@@ -23,6 +23,10 @@
fpu_control_word.vgtest \
fpu_load_store.stdout.exp-BE fpu_load_store.stdout.exp-LE \
fpu_load_store.stderr.exp fpu_load_store.vgtest \
+ load_indexed_instructions.stdout.exp-BE \
+ load_indexed_instructions.stdout.exp-LE \
+ load_indexed_instructions.stdout.exp-non-octeon \
+ load_indexed_instructions.stderr.exp load_indexed_instructions.vgtest \
load_store.stdout.exp-BE load_store.stdout.exp-LE load_store.stderr.exp \
load_store.vgtest \
load_store_multiple.stdout.exp-BE load_store_multiple.stdout.exp-LE \
@@ -40,14 +44,14 @@
shift_instructions.stderr.exp shift_instructions.vgtest \
test_block_size.stdout.exp test_block_size.stderr.exp \
test_block_size.vgtest \
+ test_fcsr.stdout.exp test_fcsr.stderr.exp \
+ test_fcsr.vgtest \
+ test_math.stdout.exp test_math.stderr.exp test_math.vgtest \
unaligned_load.stdout.exp-BE unaligned_load.stdout.exp-LE \
unaligned_load.stderr.exp unaligned_load.vgtest \
unaligned_load_store.stdout.exp-LE unaligned_load_store.stdout.exp-BE \
unaligned_load_store.stderr.exp unaligned_load_store.vgtest \
- test_fcsr.stdout.exp test_fcsr.stderr.exp \
- test_fcsr.vgtest \
- const.h macro_fpu.h macro_int.h macro_load_store.h rounding_mode.h \
- test_math.stdout.exp test_math.stderr.exp test_math.vgtest
+ const.h macro_fpu.h macro_int.h macro_load_store.h rounding_mode.h
check_PROGRAMS = \
allexec \
@@ -61,6 +65,7 @@
fpu_branches \
fpu_control_word \
fpu_load_store \
+ load_indexed_instructions \
load_store \
load_store_multiple \
load_store_unaligned \
@@ -70,10 +75,10 @@
round \
shift_instructions \
test_block_size \
- unaligned_load \
- unaligned_load_store \
test_fcsr \
- test_math
+ test_math \
+ unaligned_load \
+ unaligned_load_store
AM_CFLAGS += @FLAG_M64@
AM_CXXFLAGS += @FLAG_M64@
@@ -83,6 +88,7 @@
cvm_ins_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON@
cvm_lx_ins_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON2@
+load_indexed_instructions_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON2@
fpu_arithmetic_CFLAGS = $(AM_CFLAGS) -lm
# C++ tests
diff --git a/none/tests/mips64/load_indexed_instructions.c b/none/tests/mips64/load_indexed_instructions.c
new file mode 100644
index 0000000..a36d222
--- /dev/null
+++ b/none/tests/mips64/load_indexed_instructions.c
@@ -0,0 +1,105 @@
+#include <stdio.h>
+const int reg_val[256] = {
+ 0x00000000L, 0x04c11db7L, 0x09823b6eL, 0x0d4326d9L,
+ 0x130476dcL, 0x17c56b6bL, 0x1a864db2L, 0x1e475005L,
+ 0x2608edb8L, 0x22c9f00fL, 0x2f8ad6d6L, 0x2b4bcb61L,
+ 0x350c9b64L, 0x31cd86d3L, 0x3c8ea00aL, 0x384fbdbdL,
+ 0x4c11db70L, 0x48d0c6c7L, 0x4593e01eL, 0x4152fda9L,
+ 0x5f15adacL, 0x5bd4b01bL, 0x569796c2L, 0x52568b75L,
+ 0x6a1936c8L, 0x6ed82b7fL, 0x639b0da6L, 0x675a1011L,
+ 0x791d4014L, 0x7ddc5da3L, 0x709f7b7aL, 0x745e66cdL,
+ 0x9823b6e0L, 0x9ce2ab57L, 0x91a18d8eL, 0x95609039L,
+ 0x8b27c03cL, 0x8fe6dd8bL, 0x82a5fb52L, 0x8664e6e5L,
+ 0xbe2b5b58L, 0xbaea46efL, 0xb7a96036L, 0xb3687d81L,
+ 0xad2f2d84L, 0xa9ee3033L, 0xa4ad16eaL, 0xa06c0b5dL,
+ 0xd4326d90L, 0xd0f37027L, 0xddb056feL, 0xd9714b49L,
+ 0xc7361b4cL, 0xc3f706fbL, 0xceb42022L, 0xca753d95L,
+ 0xf23a8028L, 0xf6fb9d9fL, 0xfbb8bb46L, 0xff79a6f1L,
+ 0xe13ef6f4L, 0xe5ffeb43L, 0xe8bccd9aL, 0xec7dd02dL,
+ 0x34867077L, 0x30476dc0L, 0x3d044b19L, 0x39c556aeL,
+ 0x278206abL, 0x23431b1cL, 0x2e003dc5L, 0x2ac12072L,
+ 0x128e9dcfL, 0x164f8078L, 0x1b0ca6a1L, 0x1fcdbb16L,
+ 0x018aeb13L, 0x054bf6a4L, 0x0808d07dL, 0x0cc9cdcaL,
+ 0x7897ab07L, 0x7c56b6b0L, 0x71159069L, 0x75d48ddeL,
+ 0x6b93dddbL, 0x6f52c06cL, 0x6211e6b5L, 0x66d0fb02L,
+ 0x5e9f46bfL, 0x5a5e5b08L, 0x571d7dd1L, 0x53dc6066L,
+ 0x4d9b3063L, 0x495a2dd4L, 0x44190b0dL, 0x40d816baL,
+ 0xaca5c697L, 0xa864db20L, 0xa527fdf9L, 0xa1e6e04eL,
+ 0xbfa1b04bL, 0xbb60adfcL, 0xb6238b25L, 0xb2e29692L,
+ 0x8aad2b2fL, 0x8e6c3698L, 0x832f1041L, 0x87ee0df6L,
+ 0x99a95df3L, 0x9d684044L, 0x902b669dL, 0x94ea7b2aL,
+ 0xe0b41de7L, 0xe4750050L, 0xe9362689L, 0xedf73b3eL,
+ 0xf3b06b3bL, 0xf771768cL, 0xfa325055L, 0xfef34de2L,
+ 0xc6bcf05fL, 0xc27dede8L, 0xcf3ecb31L, 0xcbffd686L,
+ 0xd5b88683L, 0xd1799b34L, 0xdc3abdedL, 0xd8fba05aL,
+ 0x690ce0eeL, 0x6dcdfd59L, 0x608edb80L, 0x644fc637L,
+ 0x7a089632L, 0x7ec98b85L, 0x738aad5cL, 0x774bb0ebL,
+ 0x4f040d56L, 0x4bc510e1L, 0x46863638L, 0x42472b8fL,
+ 0x5c007b8aL, 0x58c1663dL, 0x558240e4L, 0x51435d53L,
+ 0x251d3b9eL, 0x21dc2629L, 0x2c9f00f0L, 0x285e1d47L,
+ 0x36194d42L, 0x32d850f5L, 0x3f9b762cL, 0x3b5a6b9bL,
+ 0x0315d626L, 0x07d4cb91L, 0x0a97ed48L, 0x0e56f0ffL,
+ 0x1011a0faL, 0x14d0bd4dL, 0x19939b94L, 0x1d528623L,
+ 0xf12f560eL, 0xf5ee4bb9L, 0xf8ad6d60L, 0xfc6c70d7L,
+ 0xe22b20d2L, 0xe6ea3d65L, 0xeba91bbcL, 0xef68060bL,
+ 0xd727bbb6L, 0xd3e6a601L, 0xdea580d8L, 0xda649d6fL,
+ 0xc423cd6aL, 0xc0e2d0ddL, 0xcda1f604L, 0xc960ebb3L,
+ 0xbd3e8d7eL, 0xb9ff90c9L, 0xb4bcb610L, 0xb07daba7L,
+ 0xae3afba2L, 0xaafbe615L, 0xa7b8c0ccL, 0xa379dd7bL,
+ 0x9b3660c6L, 0x9ff77d71L, 0x92b45ba8L, 0x9675461fL,
+ 0x8832161aL, 0x8cf30badL, 0x81b02d74L, 0x857130c3L,
+ 0x5d8a9099L, 0x594b8d2eL, 0x5408abf7L, 0x50c9b640L,
+ 0x4e8ee645L, 0x4a4ffbf2L, 0x470cdd2bL, 0x43cdc09cL,
+ 0x7b827d21L, 0x7f436096L, 0x7200464fL, 0x76c15bf8L,
+ 0x68860bfdL, 0x6c47164aL, 0x61043093L, 0x65c52d24L,
+ 0x119b4be9L, 0x155a565eL, 0x18197087L, 0x1cd86d30L,
+ 0x029f3d35L, 0x065e2082L, 0x0b1d065bL, 0x0fdc1becL,
+ 0x3793a651L, 0x3352bbe6L, 0x3e119d3fL, 0x3ad08088L,
+ 0x2497d08dL, 0x2056cd3aL, 0x2d15ebe3L, 0x29d4f654L,
+ 0xc5a92679L, 0xc1683bceL, 0xcc2b1d17L, 0xc8ea00a0L,
+ 0xd6ad50a5L, 0xd26c4d12L, 0xdf2f6bcbL, 0xdbee767cL,
+ 0xe3a1cbc1L, 0xe760d676L, 0xea23f0afL, 0xeee2ed18L,
+ 0xf0a5bd1dL, 0xf464a0aaL, 0xf9278673L, 0xfde69bc4L,
+ 0x89b8fd09L, 0x8d79e0beL, 0x803ac667L, 0x84fbdbd0L,
+ 0x9abc8bd5L, 0x9e7d9662L, 0x933eb0bbL, 0x97ffad0cL,
+ 0xafb010b1L, 0xab710d06L, 0xa6322bdfL, 0xa2f33668L,
+ 0xbcb4666dL, 0xb8757bdaL, 0xb5365d03L, 0xb1f740b4L
+};
+
+/*
+Test 1 macro is used for ldx instructions. After executing each instructions
+the macro performs following operations:
+
+1: Move arguments to registers.
+2: Execute instruction.
+3: Move result from register. */
+
+#define TEST1(instruction, offset, mem) \
+{ \
+ unsigned long out = 0; \
+ __asm__ volatile( \
+ "move $t0, %1" "\n\t" \
+ "move $t1, %2" "\n\t" \
+ instruction" $t2, $t1($t0)" "\n\t" \
+ "move %0, $t2" "\n\t" \
+ : "=&r" (out) \
+ : "r" (mem) , "r" (offset) \
+ : "t0", "t1", "t2", "cc", "memory" \
+ ); \
+ printf("%s :: offset: 0x%x, out: 0x%lx\n", \
+ instruction, offset, out); \
+}
+
+int main()
+{
+#if (_MIPS_ARCH_OCTEON2) || (__mips_dsp)
+ int i;
+ for(i = 8; i <= 255; i += 8)
+ TEST1("ldx", i, reg_val);
+ for(i = 8; i <= 255; i += 8)
+ TEST1("lbux", i, reg_val);
+ for(i = 8; i <= 255; i += 8)
+ TEST1("lwx", i, reg_val);
+#endif
+ return 0;
+}
diff --git a/none/tests/mips64/load_indexed_instructions.stderr.exp b/none/tests/mips64/load_indexed_instructions.stderr.exp
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/none/tests/mips64/load_indexed_instructions.stderr.exp
diff --git a/none/tests/mips64/load_indexed_instructions.stdout.exp-BE b/none/tests/mips64/load_indexed_instructions.stdout.exp-BE
new file mode 100644
index 0000000..5f8f272
--- /dev/null
+++ b/none/tests/mips64/load_indexed_instructions.stdout.exp-BE
@@ -0,0 +1,93 @@
+ldx :: offset: 0x8, out: 0x9823b6e0d4326d9
+ldx :: offset: 0x10, out: 0x130476dc17c56b6b
+ldx :: offset: 0x18, out: 0x1a864db21e475005
+ldx :: offset: 0x20, out: 0x2608edb822c9f00f
+ldx :: offset: 0x28, out: 0x2f8ad6d62b4bcb61
+ldx :: offset: 0x30, out: 0x350c9b6431cd86d3
+ldx :: offset: 0x38, out: 0x3c8ea00a384fbdbd
+ldx :: offset: 0x40, out: 0x4c11db7048d0c6c7
+ldx :: offset: 0x48, out: 0x4593e01e4152fda9
+ldx :: offset: 0x50, out: 0x5f15adac5bd4b01b
+ldx :: offset: 0x58, out: 0x569796c252568b75
+ldx :: offset: 0x60, out: 0x6a1936c86ed82b7f
+ldx :: offset: 0x68, out: 0x639b0da6675a1011
+ldx :: offset: 0x70, out: 0x791d40147ddc5da3
+ldx :: offset: 0x78, out: 0x709f7b7a745e66cd
+ldx :: offset: 0x80, out: 0x9823b6e09ce2ab57
+ldx :: offset: 0x88, out: 0x91a18d8e95609039
+ldx :: offset: 0x90, out: 0x8b27c03c8fe6dd8b
+ldx :: offset: 0x98, out: 0x82a5fb528664e6e5
+ldx :: offset: 0xa0, out: 0xbe2b5b58baea46ef
+ldx :: offset: 0xa8, out: 0xb7a96036b3687d81
+ldx :: offset: 0xb0, out: 0xad2f2d84a9ee3033
+ldx :: offset: 0xb8, out: 0xa4ad16eaa06c0b5d
+ldx :: offset: 0xc0, out: 0xd4326d90d0f37027
+ldx :: offset: 0xc8, out: 0xddb056fed9714b49
+ldx :: offset: 0xd0, out: 0xc7361b4cc3f706fb
+ldx :: offset: 0xd8, out: 0xceb42022ca753d95
+ldx :: offset: 0xe0, out: 0xf23a8028f6fb9d9f
+ldx :: offset: 0xe8, out: 0xfbb8bb46ff79a6f1
+ldx :: offset: 0xf0, out: 0xe13ef6f4e5ffeb43
+ldx :: offset: 0xf8, out: 0xe8bccd9aec7dd02d
+lbux :: offset: 0x8, out: 0x9
+lbux :: offset: 0x10, out: 0x13
+lbux :: offset: 0x18, out: 0x1a
+lbux :: offset: 0x20, out: 0x26
+lbux :: offset: 0x28, out: 0x2f
+lbux :: offset: 0x30, out: 0x35
+lbux :: offset: 0x38, out: 0x3c
+lbux :: offset: 0x40, out: 0x4c
+lbux :: offset: 0x48, out: 0x45
+lbux :: offset: 0x50, out: 0x5f
+lbux :: offset: 0x58, out: 0x56
+lbux :: offset: 0x60, out: 0x6a
+lbux :: offset: 0x68, out: 0x63
+lbux :: offset: 0x70, out: 0x79
+lbux :: offset: 0x78, out: 0x70
+lbux :: offset: 0x80, out: 0x98
+lbux :: offset: 0x88, out: 0x91
+lbux :: offset: 0x90, out: 0x8b
+lbux :: offset: 0x98, out: 0x82
+lbux :: offset: 0xa0, out: 0xbe
+lbux :: offset: 0xa8, out: 0xb7
+lbux :: offset: 0xb0, out: 0xad
+lbux :: offset: 0xb8, out: 0xa4
+lbux :: offset: 0xc0, out: 0xd4
+lbux :: offset: 0xc8, out: 0xdd
+lbux :: offset: 0xd0, out: 0xc7
+lbux :: offset: 0xd8, out: 0xce
+lbux :: offset: 0xe0, out: 0xf2
+lbux :: offset: 0xe8, out: 0xfb
+lbux :: offset: 0xf0, out: 0xe1
+lbux :: offset: 0xf8, out: 0xe8
+lwx :: offset: 0x8, out: 0x9823b6e
+lwx :: offset: 0x10, out: 0x130476dc
+lwx :: offset: 0x18, out: 0x1a864db2
+lwx :: offset: 0x20, out: 0x2608edb8
+lwx :: offset: 0x28, out: 0x2f8ad6d6
+lwx :: offset: 0x30, out: 0x350c9b64
+lwx :: offset: 0x38, out: 0x3c8ea00a
+lwx :: offset: 0x40, out: 0x4c11db70
+lwx :: offset: 0x48, out: 0x4593e01e
+lwx :: offset: 0x50, out: 0x5f15adac
+lwx :: offset: 0x58, out: 0x569796c2
+lwx :: offset: 0x60, out: 0x6a1936c8
+lwx :: offset: 0x68, out: 0x639b0da6
+lwx :: offset: 0x70, out: 0x791d4014
+lwx :: offset: 0x78, out: 0x709f7b7a
+lwx :: offset: 0x80, out: 0xffffffff9823b6e0
+lwx :: offset: 0x88, out: 0xffffffff91a18d8e
+lwx :: offset: 0x90, out: 0xffffffff8b27c03c
+lwx :: offset: 0x98, out: 0xffffffff82a5fb52
+lwx :: offset: 0xa0, out: 0xffffffffbe2b5b58
+lwx :: offset: 0xa8, out: 0xffffffffb7a96036
+lwx :: offset: 0xb0, out: 0xffffffffad2f2d84
+lwx :: offset: 0xb8, out: 0xffffffffa4ad16ea
+lwx :: offset: 0xc0, out: 0xffffffffd4326d90
+lwx :: offset: 0xc8, out: 0xffffffffddb056fe
+lwx :: offset: 0xd0, out: 0xffffffffc7361b4c
+lwx :: offset: 0xd8, out: 0xffffffffceb42022
+lwx :: offset: 0xe0, out: 0xfffffffff23a8028
+lwx :: offset: 0xe8, out: 0xfffffffffbb8bb46
+lwx :: offset: 0xf0, out: 0xffffffffe13ef6f4
+lwx :: offset: 0xf8, out: 0xffffffffe8bccd9a
diff --git a/none/tests/mips64/load_indexed_instructions.stdout.exp-LE b/none/tests/mips64/load_indexed_instructions.stdout.exp-LE
new file mode 100644
index 0000000..072a6f5
--- /dev/null
+++ b/none/tests/mips64/load_indexed_instructions.stdout.exp-LE
@@ -0,0 +1,93 @@
+ldx :: offset: 0x8, out: 0xd4326d909823b6e
+ldx :: offset: 0x10, out: 0x17c56b6b130476dc
+ldx :: offset: 0x18, out: 0x1e4750051a864db2
+ldx :: offset: 0x20, out: 0x22c9f00f2608edb8
+ldx :: offset: 0x28, out: 0x2b4bcb612f8ad6d6
+ldx :: offset: 0x30, out: 0x31cd86d3350c9b64
+ldx :: offset: 0x38, out: 0x384fbdbd3c8ea00a
+ldx :: offset: 0x40, out: 0x48d0c6c74c11db70
+ldx :: offset: 0x48, out: 0x4152fda94593e01e
+ldx :: offset: 0x50, out: 0x5bd4b01b5f15adac
+ldx :: offset: 0x58, out: 0x52568b75569796c2
+ldx :: offset: 0x60, out: 0x6ed82b7f6a1936c8
+ldx :: offset: 0x68, out: 0x675a1011639b0da6
+ldx :: offset: 0x70, out: 0x7ddc5da3791d4014
+ldx :: offset: 0x78, out: 0x745e66cd709f7b7a
+ldx :: offset: 0x80, out: 0x9ce2ab579823b6e0
+ldx :: offset: 0x88, out: 0x9560903991a18d8e
+ldx :: offset: 0x90, out: 0x8fe6dd8b8b27c03c
+ldx :: offset: 0x98, out: 0x8664e6e582a5fb52
+ldx :: offset: 0xa0, out: 0xbaea46efbe2b5b58
+ldx :: offset: 0xa8, out: 0xb3687d81b7a96036
+ldx :: offset: 0xb0, out: 0xa9ee3033ad2f2d84
+ldx :: offset: 0xb8, out: 0xa06c0b5da4ad16ea
+ldx :: offset: 0xc0, out: 0xd0f37027d4326d90
+ldx :: offset: 0xc8, out: 0xd9714b49ddb056fe
+ldx :: offset: 0xd0, out: 0xc3f706fbc7361b4c
+ldx :: offset: 0xd8, out: 0xca753d95ceb42022
+ldx :: offset: 0xe0, out: 0xf6fb9d9ff23a8028
+ldx :: offset: 0xe8, out: 0xff79a6f1fbb8bb46
+ldx :: offset: 0xf0, out: 0xe5ffeb43e13ef6f4
+ldx :: offset: 0xf8, out: 0xec7dd02de8bccd9a
+lbux :: offset: 0x8, out: 0x6e
+lbux :: offset: 0x10, out: 0xdc
+lbux :: offset: 0x18, out: 0xb2
+lbux :: offset: 0x20, out: 0xb8
+lbux :: offset: 0x28, out: 0xd6
+lbux :: offset: 0x30, out: 0x64
+lbux :: offset: 0x38, out: 0xa
+lbux :: offset: 0x40, out: 0x70
+lbux :: offset: 0x48, out: 0x1e
+lbux :: offset: 0x50, out: 0xac
+lbux :: offset: 0x58, out: 0xc2
+lbux :: offset: 0x60, out: 0xc8
+lbux :: offset: 0x68, out: 0xa6
+lbux :: offset: 0x70, out: 0x14
+lbux :: offset: 0x78, out: 0x7a
+lbux :: offset: 0x80, out: 0xe0
+lbux :: offset: 0x88, out: 0x8e
+lbux :: offset: 0x90, out: 0x3c
+lbux :: offset: 0x98, out: 0x52
+lbux :: offset: 0xa0, out: 0x58
+lbux :: offset: 0xa8, out: 0x36
+lbux :: offset: 0xb0, out: 0x84
+lbux :: offset: 0xb8, out: 0xea
+lbux :: offset: 0xc0, out: 0x90
+lbux :: offset: 0xc8, out: 0xfe
+lbux :: offset: 0xd0, out: 0x4c
+lbux :: offset: 0xd8, out: 0x22
+lbux :: offset: 0xe0, out: 0x28
+lbux :: offset: 0xe8, out: 0x46
+lbux :: offset: 0xf0, out: 0xf4
+lbux :: offset: 0xf8, out: 0x9a
+lwx :: offset: 0x8, out: 0x9823b6e
+lwx :: offset: 0x10, out: 0x130476dc
+lwx :: offset: 0x18, out: 0x1a864db2
+lwx :: offset: 0x20, out: 0x2608edb8
+lwx :: offset: 0x28, out: 0x2f8ad6d6
+lwx :: offset: 0x30, out: 0x350c9b64
+lwx :: offset: 0x38, out: 0x3c8ea00a
+lwx :: offset: 0x40, out: 0x4c11db70
+lwx :: offset: 0x48, out: 0x4593e01e
+lwx :: offset: 0x50, out: 0x5f15adac
+lwx :: offset: 0x58, out: 0x569796c2
+lwx :: offset: 0x60, out: 0x6a1936c8
+lwx :: offset: 0x68, out: 0x639b0da6
+lwx :: offset: 0x70, out: 0x791d4014
+lwx :: offset: 0x78, out: 0x709f7b7a
+lwx :: offset: 0x80, out: 0xffffffff9823b6e0
+lwx :: offset: 0x88, out: 0xffffffff91a18d8e
+lwx :: offset: 0x90, out: 0xffffffff8b27c03c
+lwx :: offset: 0x98, out: 0xffffffff82a5fb52
+lwx :: offset: 0xa0, out: 0xffffffffbe2b5b58
+lwx :: offset: 0xa8, out: 0xffffffffb7a96036
+lwx :: offset: 0xb0, out: 0xffffffffad2f2d84
+lwx :: offset: 0xb8, out: 0xffffffffa4ad16ea
+lwx :: offset: 0xc0, out: 0xffffffffd4326d90
+lwx :: offset: 0xc8, out: 0xffffffffddb056fe
+lwx :: offset: 0xd0, out: 0xffffffffc7361b4c
+lwx :: offset: 0xd8, out: 0xffffffffceb42022
+lwx :: offset: 0xe0, out: 0xfffffffff23a8028
+lwx :: offset: 0xe8, out: 0xfffffffffbb8bb46
+lwx :: offset: 0xf0, out: 0xffffffffe13ef6f4
+lwx :: offset: 0xf8, out: 0xffffffffe8bccd9a
diff --git a/none/tests/mips64/load_indexed_instructions.stdout.exp-non-octeon b/none/tests/mips64/load_indexed_instructions.stdout.exp-non-octeon
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/none/tests/mips64/load_indexed_instructions.stdout.exp-non-octeon
diff --git a/none/tests/mips64/load_indexed_instructions.vgtest b/none/tests/mips64/load_indexed_instructions.vgtest
new file mode 100644
index 0000000..c2c8e80
--- /dev/null
+++ b/none/tests/mips64/load_indexed_instructions.vgtest
@@ -0,0 +1,3 @@
+prog: LoadIndexedInstructions
+prereq: ../../../tests/mips_features cavium-octeon2
+vgopts: -q