Eliminate IRRoundingModeDFP by merging its values into IRRoundingMode.
Retain encodings. The rationale is that a rounding mode is an abstraction
and as such independent of formats used to represent numeric values.
This was triggered by the need for a rounding mode to express conversions
between binary floating point values and decimal floating point values.


git-svn-id: svn://svn.valgrind.org/vex/trunk@2725 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/guest_s390_helpers.c b/priv/guest_s390_helpers.c
index cee85c0..2ad798a 100644
--- a/priv/guest_s390_helpers.c
+++ b/priv/guest_s390_helpers.c
@@ -1185,27 +1185,27 @@
    psw >> 28;   /* cc */ \
 })
 
-/* Convert an IRRoundingModeDFP value to s390_dfp_round_t */
+/* Convert an IRRoundingMode value to s390_dfp_round_t */
 #if defined(VGA_s390x)
 static s390_dfp_round_t
 decode_dfp_rounding_mode(UInt irrm)
 {
    switch (irrm) {
-   case Irrm_DFP_NEAREST:
+   case Irrm_NEAREST:
       return S390_DFP_ROUND_NEAREST_EVEN_4;
-   case Irrm_DFP_NegINF:
+   case Irrm_NegINF:
       return S390_DFP_ROUND_NEGINF_7;
-   case Irrm_DFP_PosINF:
+   case Irrm_PosINF:
       return S390_DFP_ROUND_POSINF_6;
-   case Irrm_DFP_ZERO:
+   case Irrm_ZERO:
       return S390_DFP_ROUND_ZERO_5;
-   case Irrm_DFP_NEAREST_TIE_AWAY_0:
+   case Irrm_NEAREST_TIE_AWAY_0:
       return S390_DFP_ROUND_NEAREST_TIE_AWAY_0_1;
-   case Irrm_DFP_PREPARE_SHORTER:
+   case Irrm_PREPARE_SHORTER:
       return S390_DFP_ROUND_PREPARE_SHORT_3;
-   case Irrm_DFP_AWAY_FROM_ZERO:
+   case Irrm_AWAY_FROM_ZERO:
       return S390_DFP_ROUND_AWAY_0;
-   case Irrm_DFP_NEAREST_TIE_TOWARD_0:
+   case Irrm_NEAREST_TIE_TOWARD_0:
       return S390_DFP_ROUND_NEAREST_TIE_TOWARD_0;
    }
    vpanic("decode_dfp_rounding_mode");
diff --git a/priv/guest_s390_toIR.c b/priv/guest_s390_toIR.c
index 5838804..2aefba2 100644
--- a/priv/guest_s390_toIR.c
+++ b/priv/guest_s390_toIR.c
@@ -1624,26 +1624,26 @@
       rm = get_dfp_rounding_mode_from_fpc(); break;
    case S390_DFP_ROUND_NEAREST_EVEN_4:
    case S390_DFP_ROUND_NEAREST_EVEN_8:
-      rm = mkU32(Irrm_DFP_NEAREST); break;
+      rm = mkU32(Irrm_NEAREST); break;
    case S390_DFP_ROUND_NEAREST_TIE_AWAY_0_1:
    case S390_DFP_ROUND_NEAREST_TIE_AWAY_0_12:
-      rm = mkU32(Irrm_DFP_NEAREST_TIE_AWAY_0); break;
+      rm = mkU32(Irrm_NEAREST_TIE_AWAY_0); break;
    case S390_DFP_ROUND_PREPARE_SHORT_3:
    case S390_DFP_ROUND_PREPARE_SHORT_15:
-      rm = mkU32(Irrm_DFP_PREPARE_SHORTER); break;
+      rm = mkU32(Irrm_PREPARE_SHORTER); break;
    case S390_DFP_ROUND_ZERO_5:
    case S390_DFP_ROUND_ZERO_9:
-      rm = mkU32(Irrm_DFP_ZERO ); break;
+      rm = mkU32(Irrm_ZERO ); break;
    case S390_DFP_ROUND_POSINF_6:
    case S390_DFP_ROUND_POSINF_10:
-      rm = mkU32(Irrm_DFP_PosINF); break;
+      rm = mkU32(Irrm_PosINF); break;
    case S390_DFP_ROUND_NEGINF_7:
    case S390_DFP_ROUND_NEGINF_11:
-      rm = mkU32(Irrm_DFP_NegINF); break;
+      rm = mkU32(Irrm_NegINF); break;
    case S390_DFP_ROUND_NEAREST_TIE_TOWARD_0:
-      rm = mkU32(Irrm_DFP_NEAREST_TIE_TOWARD_0); break;
+      rm = mkU32(Irrm_NEAREST_TIE_TOWARD_0); break;
    case S390_DFP_ROUND_AWAY_0:
-      rm = mkU32(Irrm_DFP_AWAY_FROM_ZERO); break;
+      rm = mkU32(Irrm_AWAY_FROM_ZERO); break;
    default:
       vpanic("encode_dfp_rounding_mode");
    }
diff --git a/priv/host_s390_isel.c b/priv/host_s390_isel.c
index ac51e90..c20bf59 100644
--- a/priv/host_s390_isel.c
+++ b/priv/host_s390_isel.c
@@ -683,8 +683,8 @@
    stick the rounding mode into the FPC -- a good thing. However, the
    rounding mode must be known.
 
-   When mapping an Irrm_DFP_ value to an S390_DFP_ROUND_ value there is
-   often a choice. For instance, Irrm_DFP_ZERO could be mapped to either
+   When mapping an Irrm_XYZ value to an S390_DFP_ROUND_ value there is
+   often a choice. For instance, Irrm_ZERO could be mapped to either
    S390_DFP_ROUND_ZERO_5 or S390_DFP_ROUND_ZERO_9. The difference between
    those two is that with S390_DFP_ROUND_ZERO_9 the recognition of the
    quantum exception is suppressed whereas with S390_DFP_ROUND_ZERO_5 it
@@ -696,7 +696,7 @@
    Translation table of
    s390 DFP rounding mode to IRRoundingMode to s390 DFP rounding mode
 
-   s390(S390_DFP_ROUND_)  |  IR(Irrm_DFP_)       |  s390(S390_DFP_ROUND_)
+   s390(S390_DFP_ROUND_)  |  IR(Irrm_)           |  s390(S390_DFP_ROUND_)
    --------------------------------------------------------------------
    NEAREST_TIE_AWAY_0_1   |  NEAREST_TIE_AWAY_0  |  NEAREST_TIE_AWAY_0_12
    NEAREST_TIE_AWAY_0_12  |     "                |     "
@@ -718,24 +718,24 @@
 {
    if (irrm->tag == Iex_Const) {          /* rounding mode is known */
       vassert(irrm->Iex.Const.con->tag == Ico_U32);
-      IRRoundingModeDFP mode = irrm->Iex.Const.con->Ico.U32;
+      IRRoundingMode mode = irrm->Iex.Const.con->Ico.U32;
 
       switch (mode) {
-      case Irrm_DFP_NEAREST:
+      case Irrm_NEAREST:
          return S390_DFP_ROUND_NEAREST_EVEN_8;
-      case Irrm_DFP_NegINF:
+      case Irrm_NegINF:
          return S390_DFP_ROUND_NEGINF_11;
-      case Irrm_DFP_PosINF:
+      case Irrm_PosINF:
          return S390_DFP_ROUND_POSINF_10;
-      case Irrm_DFP_ZERO:
+      case Irrm_ZERO:
          return S390_DFP_ROUND_ZERO_9;
-      case Irrm_DFP_NEAREST_TIE_AWAY_0:
+      case Irrm_NEAREST_TIE_AWAY_0:
          return S390_DFP_ROUND_NEAREST_TIE_AWAY_0_12;
-      case Irrm_DFP_PREPARE_SHORTER:
+      case Irrm_PREPARE_SHORTER:
           return S390_DFP_ROUND_PREPARE_SHORT_15;
-      case Irrm_DFP_AWAY_FROM_ZERO:
+      case Irrm_AWAY_FROM_ZERO:
          return S390_DFP_ROUND_AWAY_0;
-      case Irrm_DFP_NEAREST_TIE_TOWARD_0:
+      case Irrm_NEAREST_TIE_TOWARD_0:
          return S390_DFP_ROUND_NEAREST_TIE_TOWARD_0;
       default:
          vpanic("get_dfp_rounding_mode");
diff --git a/pub/libvex_ir.h b/pub/libvex_ir.h
index 806de63..4ff4964 100644
--- a/pub/libvex_ir.h
+++ b/pub/libvex_ir.h
@@ -1006,13 +1006,13 @@
 
       /* ARITHMETIC INSTRUCTIONS   64-bit
 	 ----------------------------------
-	 IRRoundingModeDFP(I32) X D64 X D64 -> D64
+	 IRRoundingMode(I32) X D64 X D64 -> D64
       */
       Iop_AddD64, Iop_SubD64, Iop_MulD64, Iop_DivD64,
 
       /* ARITHMETIC INSTRUCTIONS  128-bit
 	 ----------------------------------
-	 IRRoundingModeDFP(I32) X D128 X D128 -> D128
+	 IRRoundingMode(I32) X D128 X D128 -> D128
       */
       Iop_AddD128, Iop_SubD128, Iop_MulD128, Iop_DivD128,
 
@@ -1050,10 +1050,10 @@
       /*   I64U -> D128 */
       Iop_I64UtoD128,
 
-      /*   IRRoundingModeDFP(I32) x D64 -> D32 */
+      /*   IRRoundingMode(I32) x D64 -> D32 */
       Iop_D64toD32,
 
-      /*   IRRoundingModeDFP(I32) x D128 -> D64 */
+      /*   IRRoundingMode(I32) x D128 -> D64 */
       Iop_D128toD64,
 
       /*   I32S -> D64 */
@@ -1062,52 +1062,52 @@
       /*   I32U -> D64 */
       Iop_I32UtoD64,
 
-      /*   IRRoundingModeDFP(I32) x I64 -> D64 */
+      /*   IRRoundingMode(I32) x I64 -> D64 */
       Iop_I64StoD64,
 
-      /*   IRRoundingModeDFP(I32) x I64 -> D64 */
+      /*   IRRoundingMode(I32) x I64 -> D64 */
       Iop_I64UtoD64,
 
-      /*   IRRoundingModeDFP(I32) x D64 -> I32 */
+      /*   IRRoundingMode(I32) x D64 -> I32 */
       Iop_D64toI32S,
 
-      /*   IRRoundingModeDFP(I32) x D64 -> I32 */
+      /*   IRRoundingMode(I32) x D64 -> I32 */
       Iop_D64toI32U,
 
-      /*   IRRoundingModeDFP(I32) x D64 -> I64 */
+      /*   IRRoundingMode(I32) x D64 -> I64 */
       Iop_D64toI64S,
 
-      /*   IRRoundingModeDFP(I32) x D64 -> I64 */
+      /*   IRRoundingMode(I32) x D64 -> I64 */
       Iop_D64toI64U,
 
-      /*   IRRoundingModeDFP(I32) x D128 -> I32 */
+      /*   IRRoundingMode(I32) x D128 -> I32 */
       Iop_D128toI32S,
 
-      /*   IRRoundingModeDFP(I32) x D128 -> I32 */
+      /*   IRRoundingMode(I32) x D128 -> I32 */
       Iop_D128toI32U,
 
-      /*   IRRoundingModeDFP(I32) x D128 -> I64 */
+      /*   IRRoundingMode(I32) x D128 -> I64 */
       Iop_D128toI64S,
 
-      /*   IRRoundingModeDFP(I32) x D128 -> I64 */
+      /*   IRRoundingMode(I32) x D128 -> I64 */
       Iop_D128toI64U,
 
-      /*   IRRoundingModeDFP(I32) x F64 -> D64 */
+      /*   IRRoundingMode(I32) x F64 -> D64 */
       Iop_F64toD64,
 
-      /*   IRRoundingModeDFP(I32) x D64 -> F64 */
+      /*   IRRoundingMode(I32) x D64 -> F64 */
       Iop_D64toF64,
 
-      /*   IRRoundingModeDFP(I32) x F64 -> D128 */
+      /*   IRRoundingMode(I32) x F64 -> D128 */
       Iop_F64toD128,
 
-      /*   IRRoundingModeDFP(I32) x D128 -> F64 */
+      /*   IRRoundingMode(I32) x D128 -> F64 */
       Iop_D128toF64,
 
-      /*   IRRoundingModeDFP(I32) x F128 -> D128 */
+      /*   IRRoundingMode(I32) x F128 -> D128 */
       Iop_F128toD128,
 
-      /*   IRRoundingModeDFP(I32) x D128 -> F128 */
+      /*   IRRoundingMode(I32) x D128 -> F128 */
       Iop_D128toF128,
 
       /* ROUNDING INSTRUCTIONS
@@ -1142,20 +1142,20 @@
        * of the first operand's exponent and the rounded based on the specified
        * rounding mode parameter.
        *
-       * IRRoundingModeDFP(I32) x D64 x D64-> D64 */
+       * IRRoundingMode(I32) x D64 x D64-> D64 */
       Iop_QuantizeD64,
 
-      /* IRRoundingModeDFP(I32) x D128 x D128 -> D128 */
+      /* IRRoundingMode(I32) x D128 x D128 -> D128 */
       Iop_QuantizeD128,
 
-      /* IRRoundingModeDFP(I32) x I8 x D64 -> D64
+      /* IRRoundingMode(I32) x I8 x D64 -> D64
        *    The Decimal Floating point operand is rounded to the requested 
        *    significance given by the I8 operand as specified by the rounding 
        *    mode.
        */
       Iop_SignificanceRoundD64,
 
-      /* IRRoundingModeDFP(I32) x I8 x D128 -> D128 */
+      /* IRRoundingMode(I32) x I8 x D128 -> D128 */
       Iop_SignificanceRoundD128,
 
       /* EXTRACT AND INSERT INSTRUCTIONS
@@ -1585,40 +1585,23 @@
 extern void ppIROp ( IROp );
 
 
-/* Encoding of IEEE754-specified rounding modes.  This is the same as
-   the encoding used by Intel IA32 to indicate x87 rounding mode.
+/* Encoding of IEEE754-specified rounding modes.
    Note, various front and back ends rely on the actual numerical
    values of these, so do not change them. */
 typedef
    enum { 
-      Irrm_NEAREST = 0, 
-      Irrm_NegINF  = 1, 
-      Irrm_PosINF  = 2, 
-      Irrm_ZERO    = 3 
+      Irrm_NEAREST              = 0,  // Round to nearest, ties to even
+      Irrm_NegINF               = 1,  // Round to negative infinity
+      Irrm_PosINF               = 2,  // Round to positive infinity
+      Irrm_ZERO                 = 3,  // Round toward zero
+      Irrm_NEAREST_TIE_AWAY_0   = 4,  // Round to nearest, ties away from 0
+      Irrm_PREPARE_SHORTER      = 5,  // Round to prepare for storter 
+                                      // precision
+      Irrm_AWAY_FROM_ZERO       = 6,  // Round to away from 0
+      Irrm_NEAREST_TIE_TOWARD_0 = 7   // Round to nearest, ties towards 0
    }
    IRRoundingMode;
 
-/* DFP encoding of IEEE754 2008 specified rounding modes extends the two bit
- * binary floating point rounding mode (IRRoundingMode) to three bits.  The 
- * DFP rounding modes are a super set of the binary rounding modes.  The 
- * encoding was chosen such that the mapping of the least significant two bits
- * of the IR to POWER encodings is same.  The upper IR encoding bit is just
- * a logical OR of the upper rounding mode bit from the POWER encoding.
- */
-typedef
-   enum { 
-      Irrm_DFP_NEAREST              = 0,  // Round to nearest, ties to even
-      Irrm_DFP_NegINF               = 1,  // Round to negative infinity
-      Irrm_DFP_PosINF               = 2,  // Round to posative infinity
-      Irrm_DFP_ZERO                 = 3,  // Round toward zero
-      Irrm_DFP_NEAREST_TIE_AWAY_0   = 4,  // Round to nearest, ties away from 0
-      Irrm_DFP_PREPARE_SHORTER      = 5,  // Round to prepare for storter 
-                                          // precision
-      Irrm_DFP_AWAY_FROM_ZERO       = 6,  // Round to away from 0
-      Irrm_DFP_NEAREST_TIE_TOWARD_0 = 7   // Round to nearest, ties towards 0
-   }
-   IRRoundingModeDFP;
-
 /* Binary floating point comparison result values.
    This is also derived from what IA32 does. */
 typedef