commit 8fa4208a01f56c61e5ba064d4805b11920dc37b6
author sewardj <sewardj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> Fri Dec 31 17:22:04 2004 +0000
committer sewardj <sewardj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> Fri Dec 31 17:22:04 2004 +0000
tree 6b489972983f94c3febd9d55f65c976db868359f
parent b5d0f3d968bd77c3f96c408fb6517517b4fde4fd

C89 police (make buildable with gcc-2.96)


git-svn-id: svn://svn.valgrind.org/vex/trunk@688 8f6e269a-dfd6-0310-a8e1-e2731360e62c

priv/host-arm/isel.c

diff --git a/priv/host-arm/isel.c b/priv/host-arm/isel.c
index 092d3f5..6b239c7 100644
--- a/priv/host-arm/isel.c
+++ b/priv/host-arm/isel.c
@@ -739,10 +739,11 @@
    /* --------- STORE --------- */
    /* little-endian write to memory */
    case Ist_STle: {
+       HReg   reg;
        IRType tya = typeOfIRExpr(env->type_env, stmt->Ist.STle.addr);
        IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.STle.data);
        vassert(tya == Ity_I32);
-       HReg reg = iselIntExpr_R(env, stmt->Ist.STle.data);
+       reg = iselIntExpr_R(env, stmt->Ist.STle.data);
 
        if (tyd == Ity_I8) {
 	   ARMAMode2* am2 = iselIntExpr_AMode2(env, stmt->Ist.STle.addr);