Improve infrastructure for dealing with endianness in VEX. This patch
removes all decisions about endianness from VEX. Instead, it requires
that the LibVEX_* calls pass in information about the guest or host
endianness (depending on context) and in turn it passes that info
through to all the places that need it:
* the front ends (xx_toIR.c)
* the back ends (xx_isel.c)
* the patcher functions (Chain, UnChain, PatchProfInc)
Mostly it is boring and ugly plumbing. As far as types go, there is a
new type "VexEndness" that carries the endianness. This also makes it
possible to stop using Bools to indicate endianness. VexArchInfo has
a new field of type VexEndness. Apart from that, no other changes in
types.
Followups: MIPS front and back ends have not yet been fixed up to use
the passed-in endianness information. Currently they assume that the
endianness of both host and guest is the same as the endianness of the
target for which VEX is being compiled.
git-svn-id: svn://svn.valgrind.org/vex/trunk@2910 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/guest_s390_toIR.c b/priv/guest_s390_toIR.c
index b6fc165..4a5013b 100644
--- a/priv/guest_s390_toIR.c
+++ b/priv/guest_s390_toIR.c
@@ -16565,13 +16565,13 @@
VexArch guest_arch,
VexArchInfo *archinfo,
VexAbiInfo *abiinfo,
- Bool host_bigendian,
+ VexEndness host_endness,
Bool sigill_diag_IN)
{
vassert(guest_arch == VexArchS390X);
/* The instruction decoder requires a big-endian machine. */
- vassert(host_bigendian == True);
+ vassert(host_endness == VexEndnessBE);
/* Set globals (see top of this file) */
guest_IA_curr_instr = guest_IP;