Improve infrastructure for dealing with endianness in VEX.  This patch
removes all decisions about endianness from VEX.  Instead, it requires
that the LibVEX_* calls pass in information about the guest or host
endianness (depending on context) and in turn it passes that info
through to all the places that need it:

* the front ends (xx_toIR.c)
* the back ends (xx_isel.c)
* the patcher functions (Chain, UnChain, PatchProfInc)

Mostly it is boring and ugly plumbing.  As far as types go, there is a
new type "VexEndness" that carries the endianness.  This also makes it
possible to stop using Bools to indicate endianness.  VexArchInfo has
a new field of type VexEndness.  Apart from that, no other changes in
types.

Followups: MIPS front and back ends have not yet been fixed up to use
the passed-in endianness information.  Currently they assume that the
endianness of both host and guest is the same as the endianness of the
target for which VEX is being compiled.



git-svn-id: svn://svn.valgrind.org/vex/trunk@2910 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/host_x86_defs.c b/priv/host_x86_defs.c
index 8f5fcfe..54bad38 100644
--- a/priv/host_x86_defs.c
+++ b/priv/host_x86_defs.c
@@ -2102,7 +2102,7 @@
 
 Int emit_X86Instr ( /*MB_MOD*/Bool* is_profInc,
                     UChar* buf, Int nbuf, X86Instr* i, 
-                    Bool mode64,
+                    Bool mode64, VexEndness endness_host,
                     void* disp_cp_chain_me_to_slowEP,
                     void* disp_cp_chain_me_to_fastEP,
                     void* disp_cp_xindir,
@@ -3291,7 +3291,7 @@
       p = doAMode_M(p, fake(4), i->Xin.EvCheck.amFailAddr);
       vassert(p - p0 == 8); /* also ensures that 0x03 offset above is ok */
       /* And crosscheck .. */
-      vassert(evCheckSzB_X86() == 8);
+      vassert(evCheckSzB_X86(endness_host) == 8);
       goto done;
    }
 
@@ -3336,7 +3336,7 @@
 /* How big is an event check?  See case for Xin_EvCheck in
    emit_X86Instr just above.  That crosschecks what this returns, so
    we can tell if we're inconsistent. */
-Int evCheckSzB_X86 ( void )
+Int evCheckSzB_X86 ( VexEndness endness_host )
 {
    return 8;
 }
@@ -3344,10 +3344,13 @@
 
 /* NB: what goes on here has to be very closely coordinated with the
    emitInstr case for XDirect, above. */
-VexInvalRange chainXDirect_X86 ( void* place_to_chain,
+VexInvalRange chainXDirect_X86 ( VexEndness endness_host,
+                                 void* place_to_chain,
                                  void* disp_cp_chain_me_EXPECTED,
                                  void* place_to_jump_to )
 {
+   vassert(endness_host == VexEndnessLE);
+
    /* What we're expecting to see is:
         movl $disp_cp_chain_me_EXPECTED, %edx
         call *%edx
@@ -3389,10 +3392,13 @@
 
 /* NB: what goes on here has to be very closely coordinated with the
    emitInstr case for XDirect, above. */
-VexInvalRange unchainXDirect_X86 ( void* place_to_unchain,
+VexInvalRange unchainXDirect_X86 ( VexEndness endness_host,
+                                   void* place_to_unchain,
                                    void* place_to_jump_to_EXPECTED,
                                    void* disp_cp_chain_me )
 {
+   vassert(endness_host == VexEndnessLE);
+
    /* What we're expecting to see is:
           jmp d32
           ud2;
@@ -3432,9 +3438,11 @@
 
 /* Patch the counter address into a profile inc point, as previously
    created by the Xin_ProfInc case for emit_X86Instr. */
-VexInvalRange patchProfInc_X86 ( void*  place_to_patch,
+VexInvalRange patchProfInc_X86 ( VexEndness endness_host,
+                                 void*  place_to_patch,
                                  ULong* location_of_counter )
 {
+   vassert(endness_host == VexEndnessLE);
    vassert(sizeof(ULong*) == 4);
    UChar* p = (UChar*)place_to_patch;
    vassert(p[0] == 0x83);