commit ac7ecd74023580193b194274caffe305d222bd3e
author nethercote <nethercote@a5019735-40e9-0310-863c-91ae7b9d1cf9> Wed Oct 13 11:30:14 2004 +0000
committer nethercote <nethercote@a5019735-40e9-0310-863c-91ae7b9d1cf9> Wed Oct 13 11:30:14 2004 +0000
tree d69a8b380429b45a9c3ba71fea913683111d957c
parent 4d714384d45583b1566ad3a840ecc18e962ddda6

Add a new CPUID cache configuration for more recent Pentiums.


git-svn-id: svn://svn.valgrind.org/valgrind/trunk@2746 a5019735-40e9-0310-863c-91ae7b9d1cf9

cachegrind/x86/cg_arch.c

diff --git a/cachegrind/x86/cg_arch.c b/cachegrind/x86/cg_arch.c
index a104d2d..29cc283 100644
--- a/cachegrind/x86/cg_arch.c
+++ b/cachegrind/x86/cg_arch.c
@@ -125,6 +125,7 @@
       case 0x45: *L2c = (cache_t) { 2048, 4, 32 }; L2_found = True; break;
 
       /* These are sectored, whatever that means */
+      case 0x60: *D1c = (cache_t) { 16, 8, 64 };  break;      /* sectored */
       case 0x66: *D1c = (cache_t) {  8, 4, 64 };  break;      /* sectored */
       case 0x67: *D1c = (cache_t) { 16, 4, 64 };  break;      /* sectored */
       case 0x68: *D1c = (cache_t) { 32, 4, 64 };  break;      /* sectored */