Enhance IR so as to distinguish between little- and big-endian loads and
stores, so that PPC can be properly handled. Until now it's been hardwired
to assume little-endian.
As a result, IRStmt_STle is renamed IRStmt_Store and IRExpr_LDle is
renamed IRExpr_Load.
git-svn-id: svn://svn.valgrind.org/vex/trunk@1239 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/host-arm/isel.c b/priv/host-arm/isel.c
index 3c56dd5..94d47e4 100644
--- a/priv/host-arm/isel.c
+++ b/priv/host-arm/isel.c
@@ -738,25 +738,29 @@
/* --------- STORE --------- */
/* little-endian write to memory */
- case Ist_STle: {
+ case Ist_Store: {
HReg reg;
- IRType tya = typeOfIRExpr(env->type_env, stmt->Ist.STle.addr);
- IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.STle.data);
- vassert(tya == Ity_I32);
- reg = iselIntExpr_R(env, stmt->Ist.STle.data);
+ IRType tya = typeOfIRExpr(env->type_env, stmt->Ist.Store.addr);
+ IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Store.data);
+ IREndness end = stmt->Ist.Store.end;
+
+ if (tya != Ity_I32 || end != Iend_LE)
+ goto stmt_fail;
+
+ reg = iselIntExpr_R(env, stmt->Ist.Store.data);
if (tyd == Ity_I8) {
- ARMAMode2* am2 = iselIntExpr_AMode2(env, stmt->Ist.STle.addr);
+ ARMAMode2* am2 = iselIntExpr_AMode2(env, stmt->Ist.Store.addr);
addInstr(env, ARMInstr_StoreB(reg,am2));
return;
}
if (tyd == Ity_I16) {
- ARMAMode3* am3 = iselIntExpr_AMode3(env, stmt->Ist.STle.addr);
+ ARMAMode3* am3 = iselIntExpr_AMode3(env, stmt->Ist.Store.addr);
addInstr(env, ARMInstr_StoreH(reg,am3));
return;
}
if (tyd == Ity_I32) {
- ARMAMode2* am2 = iselIntExpr_AMode2(env, stmt->Ist.STle.addr);
+ ARMAMode2* am2 = iselIntExpr_AMode2(env, stmt->Ist.Store.addr);
addInstr(env, ARMInstr_StoreW(reg,am2));
return;
}
@@ -880,6 +884,7 @@
default: break;
}
+ stmt_fail:
ppIRStmt(stmt);
vpanic("iselStmt");
}