Update Valgrind and TSan.
Rebased local changes on:
http://valgrind-variant.googlecode.com/svn/trunk@125
http://data-race-test.googlecode.com/svn/trunk@3717
Change-Id: I4d7a227ad72fb8e9998015a5fe26e00496ec1da3
diff --git a/main/VEX/Makefile-gcc b/main/VEX/Makefile-gcc
new file mode 100644
index 0000000..a3611e0
--- /dev/null
+++ b/main/VEX/Makefile-gcc
@@ -0,0 +1,345 @@
+
+PUB_HEADERS = pub/libvex_basictypes.h \
+ pub/libvex_ir.h \
+ pub/libvex.h \
+ pub/libvex_trc_values.h \
+ pub/libvex_emwarn.h \
+ pub/libvex_guest_x86.h \
+ pub/libvex_guest_amd64.h \
+ pub/libvex_guest_arm.h \
+ pub/libvex_guest_ppc32.h \
+ pub/libvex_guest_ppc64.h \
+ pub/libvex_guest_s390x.h \
+ pub/libvex_s390x_common.h \
+ pub/libvex_guest_offsets.h
+
+PRIV_HEADERS = priv/host_x86_defs.h \
+ priv/host_amd64_defs.h \
+ priv/host_arm_defs.h \
+ priv/host_ppc_defs.h \
+ priv/host_s390_defs.h \
+ priv/host_s390_disasm.h \
+ priv/host_generic_regs.h \
+ priv/host_generic_simd64.h \
+ priv/host_generic_simd128.h \
+ priv/main_globals.h \
+ priv/main_util.h \
+ priv/guest_generic_x87.h \
+ priv/guest_generic_bb_to_IR.h \
+ priv/guest_x86_defs.h \
+ priv/guest_amd64_defs.h \
+ priv/guest_arm_defs.h \
+ priv/guest_ppc_defs.h \
+ priv/ir_match.h \
+ priv/ir_opt.h
+
+LIB_OBJS = priv/ir_defs.o \
+ priv/ir_match.o \
+ priv/ir_opt.o \
+ priv/main_main.o \
+ priv/main_globals.o \
+ priv/main_util.o \
+ priv/host_x86_defs.o \
+ priv/host_amd64_defs.o \
+ priv/host_arm_defs.o \
+ priv/host_ppc_defs.o \
+ priv/host_s390_defs.o \
+ priv/host_x86_isel.o \
+ priv/host_amd64_isel.o \
+ priv/host_arm_isel.o \
+ priv/host_ppc_isel.o \
+ priv/host_s390_isel.o \
+ priv/host_s390_disasm.o \
+ priv/host_generic_regs.o \
+ priv/host_generic_simd64.o \
+ priv/host_generic_simd128.o \
+ priv/host_generic_reg_alloc2.o \
+ priv/guest_generic_x87.o \
+ priv/guest_generic_bb_to_IR.o \
+ priv/guest_x86_helpers.o \
+ priv/guest_amd64_helpers.o \
+ priv/guest_arm_helpers.o \
+ priv/guest_ppc_helpers.o \
+ priv/guest_s390_helpers.o \
+ priv/guest_x86_toIR.o \
+ priv/guest_amd64_toIR.o \
+ priv/guest_arm_toIR.o \
+ priv/guest_ppc_toIR.o \
+ priv/guest_s390_toIR.o
+
+PUB_INCLUDES = -Ipub
+
+# Do not add any priv/host-ARCH or priv/guest-ARCH directories to this
+# list, as they contain duplicate file names (each host has a hdefs.h,
+# for example).
+PRIV_INCLUDES = -Ipriv
+
+
+ifndef CC
+ CC = gcc
+endif
+ifndef AR
+ AR = ar
+endif
+
+# Put -g -O2 after any flags we inherit from V. -O2 vs -O
+# makes a significant difference, at least with gcc4.
+CCFLAGS = -Wall -Wmissing-prototypes -Wshadow \
+ -Wpointer-arith -Wbad-function-cast -Wcast-qual \
+ -Wcast-align -Wmissing-declarations \
+ -Wno-pointer-sign \
+ $(EXTRA_CFLAGS) -g -O2 -fstrict-aliasing
+
+#CC = icc
+#CCFLAGS = -g -Wall -wd981 -wd279 -wd1287 -wd869 -wd111 -wd188 -wd186
+# 981: operands are evaluated in unspecified order
+# 279: controlling expression is constant
+# 1287: invalid attribute for parameter
+# 869: parameter "..." was never referenced
+# 111: statement is unreachable
+# 188: enumerated type mixed with another type
+# (the above are for icc 8.0 -- 8.0.0.55 I think)
+# 186: pointless comparison of unsigned integer with zero
+
+# kludge: stops V biarch builds screwing up at -j 2 or above
+# The Right fix is to autoconf/automake-ise vex.
+.NOTPARALLEL:
+
+all: vex
+
+# Empty, needed for Valgrind
+install:
+
+scratch: clean all
+
+vex: libvex.a test_main.o
+ $(CC) $(CCFLAGS) -o vex test_main.o libvex.a
+
+libvex.a: $(LIB_OBJS)
+ rm -f libvex.a
+ $(AR) crus libvex.a $(LIB_OBJS)
+
+
+# The idea with these TAG-s is to mark the flavour of libvex.a
+# most recently built, so if the same target is re-requested, we
+# don't rebuild everything, but if a different one is requested
+# then we scrub everything and start over.
+
+libvex-x86-linux.a: TAG-x86-linux libvex.a
+ mv -f libvex.a libvex-x86-linux.a
+TAG-x86-linux:
+ if [ ! -f TAG-x86-linux ] ; then rm -f $(LIB_OBJS) TAG-* libvex.a ; fi
+ touch TAG-x86-linux
+
+libvex-amd64-linux.a: TAG-amd64-linux libvex.a
+ mv -f libvex.a libvex-amd64-linux.a
+TAG-amd64-linux:
+ if [ ! -f TAG-amd64-linux ] ; then rm -f $(LIB_OBJS) TAG-* libvex.a ; fi
+ touch TAG-amd64-linux
+
+libvex-ppc32-linux.a: TAG-ppc32-linux libvex.a
+ mv -f libvex.a libvex-ppc32-linux.a
+TAG-ppc32-linux:
+ if [ ! -f TAG-ppc32-linux ] ; then rm -f $(LIB_OBJS) TAG-* libvex.a ; fi
+ touch TAG-ppc32-linux
+
+libvex-ppc64-linux.a: TAG-ppc64-linux libvex.a
+ mv -f libvex.a libvex-ppc64-linux.a
+TAG-ppc64-linux:
+ if [ ! -f TAG-ppc64-linux ] ; then rm -f $(LIB_OBJS) TAG-* libvex.a ; fi
+ touch TAG-ppc64-linux
+
+libvex-ppc32-aix5.a: TAG-ppc32-aix5 libvex.a
+ mv -f libvex.a libvex-ppc32-aix5.a
+TAG-ppc32-aix5:
+ if [ ! -f TAG-ppc32-aix5 ] ; then rm -f $(LIB_OBJS) TAG-* libvex.a ; fi
+ touch TAG-ppc32-aix5
+
+libvex-ppc64-aix5.a: TAG-ppc64-aix5 libvex.a
+ mv -f libvex.a libvex-ppc64-aix5.a
+TAG-ppc64-aix5:
+ if [ ! -f TAG-ppc64-aix5 ] ; then rm -f $(LIB_OBJS) TAG-* libvex.a ; fi
+ touch TAG-ppc64-aix5
+
+libvex-x86-darwin.a: TAG-x86-darwin libvex.a
+ mv -f libvex.a libvex-x86-darwin.a
+TAG-x86-darwin:
+ if [ ! -f TAG-x86-darwin ] ; then rm -f $(LIB_OBJS) TAG-* libvex.a ; fi
+ touch TAG-x86-darwin
+
+libvex-amd64-darwin.a: TAG-amd64-darwin libvex.a
+ mv -f libvex.a libvex-amd64-darwin.a
+TAG-amd64-darwin:
+ if [ ! -f TAG-amd64-darwin ] ; then rm -f $(LIB_OBJS) TAG-* libvex.a ; fi
+ touch TAG-amd64-darwin
+
+
+clean:
+ rm -f $(LIB_OBJS) *.a vex test_main.o TAG-* \
+ pub/libvex_guest_offsets.h \
+ auxprogs/genoffsets.s
+
+minidist:
+ rm -f vex--minidist-2005MMDD.tar
+ tar cf vex--minidist-2005MMDD.tar $(PUB_HEADERS) $(PRIV_HEADERS) \
+ test_main.c test_main.h \
+ Makefile \
+ `echo $(LIB_OBJS) | sed "s/\.o/\.c/g"`
+ @echo
+ @echo minidist done, size follows:
+ @ls -l vex--minidist-2005MMDD.tar
+ @echo
+
+# This is very uggerly. Need to sed out both "xyzzyN" and
+# "xyzzy$N" since gcc on different targets emits the constants
+# differently -- with a leading $ on x86/amd64 but none on ppc32/64.
+pub/libvex_guest_offsets.h:
+ rm -f auxprogs/genoffsets.s
+ $(CC) $(CCFLAGS) -O -S -o auxprogs/genoffsets.s \
+ auxprogs/genoffsets.c
+ grep xyzzy auxprogs/genoffsets.s | grep define \
+ | sed "s/xyzzy\\$$//g" \
+ | sed "s/xyzzy#//g" \
+ | sed "s/xyzzy//g" \
+ > pub/libvex_guest_offsets.h
+ rm -f auxprogs/genoffsets.s
+
+
+ALL_HEADERS = $(PUB_HEADERS) $(PRIV_HEADERS)
+ALL_INCLUDES = $(PUB_INCLUDES) $(PRIV_INCLUDES)
+
+test_main.o: $(PUB_HEADERS) test_main.c test_main.h
+ $(CC) $(CCFLAGS) $(PUB_INCLUDES) -o test_main.o \
+ -c test_main.c
+
+priv/ir_defs.o: $(ALL_HEADERS) priv/ir_defs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/ir_defs.o \
+ -c priv/ir_defs.c
+
+priv/ir_match.o: $(ALL_HEADERS) priv/ir_match.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/ir_match.o \
+ -c priv/ir_match.c
+
+priv/ir_opt.o: $(ALL_HEADERS) priv/ir_opt.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/ir_opt.o \
+ -c priv/ir_opt.c
+
+priv/main_main.o: $(ALL_HEADERS) priv/main_main.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/main_main.o \
+ -c priv/main_main.c
+
+priv/main_globals.o: $(ALL_HEADERS) priv/main_globals.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/main_globals.o \
+ -c priv/main_globals.c
+
+priv/main_util.o: $(ALL_HEADERS) priv/main_util.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/main_util.o \
+ -c priv/main_util.c
+
+priv/host_x86_defs.o: $(ALL_HEADERS) priv/host_x86_defs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_x86_defs.o \
+ -c priv/host_x86_defs.c
+
+priv/host_amd64_defs.o: $(ALL_HEADERS) priv/host_amd64_defs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_amd64_defs.o \
+ -c priv/host_amd64_defs.c
+
+priv/host_arm_defs.o: $(ALL_HEADERS) priv/host_arm_defs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_arm_defs.o \
+ -c priv/host_arm_defs.c
+
+priv/host_ppc_defs.o: $(ALL_HEADERS) priv/host_ppc_defs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_ppc_defs.o \
+ -c priv/host_ppc_defs.c
+
+priv/host_s390_defs.o: $(ALL_HEADERS) priv/host_s390_defs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_s390_defs.o \
+ -c priv/host_s390_defs.c
+
+priv/host_x86_isel.o: $(ALL_HEADERS) priv/host_x86_isel.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_x86_isel.o \
+ -c priv/host_x86_isel.c
+
+priv/host_amd64_isel.o: $(ALL_HEADERS) priv/host_amd64_isel.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_amd64_isel.o \
+ -c priv/host_amd64_isel.c
+
+priv/host_arm_isel.o: $(ALL_HEADERS) priv/host_arm_isel.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_arm_isel.o \
+ -c priv/host_arm_isel.c
+
+priv/host_ppc_isel.o: $(ALL_HEADERS) priv/host_ppc_isel.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_ppc_isel.o \
+ -c priv/host_ppc_isel.c
+
+priv/host_s390_isel.o: $(ALL_HEADERS) priv/host_s390_isel.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_s390_isel.o \
+ -c priv/host_s390_isel.c
+
+priv/host_generic_regs.o: $(ALL_HEADERS) priv/host_generic_regs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_generic_regs.o \
+ -c priv/host_generic_regs.c
+
+priv/host_generic_simd64.o: $(ALL_HEADERS) priv/host_generic_simd64.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_generic_simd64.o \
+ -c priv/host_generic_simd64.c
+
+priv/host_generic_simd128.o: $(ALL_HEADERS) priv/host_generic_simd128.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_generic_simd128.o \
+ -c priv/host_generic_simd128.c
+
+priv/host_generic_reg_alloc2.o: $(ALL_HEADERS) priv/host_generic_reg_alloc2.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_generic_reg_alloc2.o \
+ -c priv/host_generic_reg_alloc2.c
+
+priv/guest_x86_toIR.o: $(ALL_HEADERS) priv/guest_x86_toIR.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_x86_toIR.o \
+ -c priv/guest_x86_toIR.c
+
+priv/guest_generic_x87.o: $(ALL_HEADERS) priv/guest_generic_x87.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_generic_x87.o \
+ -c priv/guest_generic_x87.c
+
+priv/guest_generic_bb_to_IR.o: $(ALL_HEADERS) priv/guest_generic_bb_to_IR.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_generic_bb_to_IR.o \
+ -c priv/guest_generic_bb_to_IR.c
+
+priv/guest_x86_helpers.o: $(ALL_HEADERS) priv/guest_x86_helpers.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_x86_helpers.o \
+ -c priv/guest_x86_helpers.c
+
+priv/guest_amd64_helpers.o: $(ALL_HEADERS) priv/guest_amd64_helpers.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_amd64_helpers.o \
+ -c priv/guest_amd64_helpers.c
+
+priv/guest_amd64_toIR.o: $(ALL_HEADERS) priv/guest_amd64_toIR.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_amd64_toIR.o \
+ -c priv/guest_amd64_toIR.c
+
+priv/guest_arm_helpers.o: $(ALL_HEADERS) priv/guest_arm_helpers.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_arm_helpers.o \
+ -c priv/guest_arm_helpers.c
+
+priv/guest_arm_toIR.o: $(ALL_HEADERS) priv/guest_arm_toIR.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_arm_toIR.o \
+ -c priv/guest_arm_toIR.c
+
+priv/guest_ppc_helpers.o: $(ALL_HEADERS) priv/guest_ppc_helpers.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_ppc_helpers.o \
+ -c priv/guest_ppc_helpers.c
+
+priv/guest_s390_helpers.o: $(ALL_HEADERS) priv/guest_s390_helpers.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_s390_helpers.o \
+ -c priv/guest_s390_helpers.c
+
+priv/guest_ppc_toIR.o: $(ALL_HEADERS) priv/guest_ppc_toIR.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_ppc_toIR.o \
+ -c priv/guest_ppc_toIR.c
+
+priv/guest_s390_toIR.o: $(ALL_HEADERS) priv/guest_s390_toIR.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest_s390_toIR.o \
+ -c priv/guest_s390_toIR.c
+
+priv/host_s390_disasm.o: $(ALL_HEADERS) priv/host_s390_disasm.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host_s390_disasm.o \
+ -c priv/host_s390_disasm.c
diff --git a/main/VEX/Makefile-icc b/main/VEX/Makefile-icc
new file mode 100644
index 0000000..723c850
--- /dev/null
+++ b/main/VEX/Makefile-icc
@@ -0,0 +1,239 @@
+
+PUB_HEADERS = pub/libvex_basictypes.h \
+ pub/libvex_ir.h \
+ pub/libvex.h \
+ pub/libvex_trc_values.h \
+ pub/libvex_emwarn.h \
+ pub/libvex_guest_x86.h \
+ pub/libvex_guest_amd64.h \
+ pub/libvex_guest_arm.h \
+ pub/libvex_guest_ppc32.h \
+ pub/libvex_guest_ppc64.h \
+ pub/libvex_guest_offsets.h
+
+PRIV_HEADERS = priv/host-x86/hdefs.h \
+ priv/host-amd64/hdefs.h \
+ priv/host-arm/hdefs.h \
+ priv/host-ppc/hdefs.h \
+ priv/host-generic/h_generic_regs.h \
+ priv/host-generic/h_generic_simd64.h \
+ priv/main/vex_globals.h \
+ priv/main/vex_util.h \
+ priv/guest-generic/g_generic_x87.h \
+ priv/guest-generic/bb_to_IR.h \
+ priv/guest-x86/gdefs.h \
+ priv/guest-amd64/gdefs.h \
+ priv/guest-arm/gdefs.h \
+ priv/guest-ppc/gdefs.h \
+ priv/ir/irmatch.h \
+ priv/ir/iropt.h
+
+LIB_OBJS = priv/ir/irdefs.o \
+ priv/ir/irmatch.o \
+ priv/ir/iropt.o \
+ priv/main/vex_main.o \
+ priv/main/vex_globals.o \
+ priv/main/vex_util.o \
+ priv/host-x86/hdefs.o \
+ priv/host-amd64/hdefs.o \
+ priv/host-arm/hdefs.o \
+ priv/host-ppc/hdefs.o \
+ priv/host-x86/isel.o \
+ priv/host-amd64/isel.o \
+ priv/host-arm/isel.o \
+ priv/host-ppc/isel.o \
+ priv/host-generic/h_generic_regs.o \
+ priv/host-generic/h_generic_simd64.o \
+ priv/host-generic/reg_alloc2.o \
+ priv/guest-generic/g_generic_x87.o \
+ priv/guest-generic/bb_to_IR.o \
+ priv/guest-x86/ghelpers.o \
+ priv/guest-amd64/ghelpers.o \
+ priv/guest-arm/ghelpers.o \
+ priv/guest-ppc/ghelpers.o \
+ priv/guest-x86/toIR.o \
+ priv/guest-amd64/toIR.o \
+ priv/guest-arm/toIR.o \
+ priv/guest-ppc/toIR.o
+
+PUB_INCLUDES = -Ipub
+
+# Do not add any priv/host-ARCH or priv/guest-ARCH directories to this
+# list, as they contain duplicate file names (each host has a hdefs.h,
+# for example).
+PRIV_INCLUDES = -Ipriv
+
+
+#CC = gcc
+#CCFLAGS = -g -O -Wall -Wmissing-prototypes -Wshadow -Winline \
+# -Wpointer-arith -Wbad-function-cast -Wcast-qual \
+# -Wcast-align -Wmissing-declarations \
+# $(EXTRA_CFLAGS)
+
+CC = icc
+CCFLAGS = -g -Wall -wd981 -wd279 -wd1287 -wd869 -wd111 -wd188 -wd186 -wd810
+# 981: operands are evaluated in unspecified order
+# 279: controlling expression is constant
+# 1287: invalid attribute for parameter
+# 869: parameter "..." was never referenced
+# 111: statement is unreachable
+# 188: enumerated type mixed with another type
+# (the above are for icc 8.0 -- 8.0.0.55 I think)
+# 186: pointless comparison of unsigned integer with zero
+# 810: conversion from ... to ... may lose significant bits
+
+all: vex
+
+scratch: clean version all
+
+vex: libvex.a test_main.o
+ $(CC) $(CCFLAGS) -o vex test_main.o libvex.a
+
+libvex.a: $(LIB_OBJS)
+ rm -f libvex.a
+ ar clq libvex.a $(LIB_OBJS)
+
+clean:
+ rm -f $(LIB_OBJS) libvex.a vex test_main.o \
+ priv/main/vex_svnversion.h \
+ pub/libvex_guest_offsets.h
+
+version:
+ rm -f priv/main/vex_svnversion.h
+ echo -n "\"" > priv/main/vex_svnversion.h
+ svnversion -n . >> priv/main/vex_svnversion.h
+ echo "\"" >> priv/main/vex_svnversion.h
+
+minidist: version
+ rm -f vex--minidist-2005MMDD.tar
+ tar cf vex--minidist-2005MMDD.tar $(PUB_HEADERS) $(PRIV_HEADERS) \
+ priv/main/vex_svnversion.h \
+ test_main.c test_main.h \
+ Makefile \
+ `echo $(LIB_OBJS) | sed "s/\.o/\.c/g"`
+ @echo
+ @echo minidist done, size and svnversion follow:
+ @ls -l vex--minidist-2005MMDD.tar
+ @cat priv/main/vex_svnversion.h
+ @echo
+
+pub/libvex_guest_offsets.h:
+ gcc -Wall -g -o auxprogs/genoffsets auxprogs/genoffsets.c
+ ./auxprogs/genoffsets > pub/libvex_guest_offsets.h
+
+
+ALL_HEADERS = $(PUB_HEADERS) $(PRIV_HEADERS)
+ALL_INCLUDES = $(PUB_INCLUDES) $(PRIV_INCLUDES)
+
+test_main.o: $(PUB_HEADERS) test_main.c test_main.h
+ $(CC) $(CCFLAGS) $(PUB_INCLUDES) -o test_main.o \
+ -c test_main.c
+
+priv/ir/irdefs.o: $(ALL_HEADERS) priv/ir/irdefs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/ir/irdefs.o \
+ -c priv/ir/irdefs.c
+
+priv/ir/irmatch.o: $(ALL_HEADERS) priv/ir/irmatch.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/ir/irmatch.o \
+ -c priv/ir/irmatch.c
+
+priv/ir/iropt.o: $(ALL_HEADERS) priv/ir/iropt.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/ir/iropt.o \
+ -c priv/ir/iropt.c
+
+priv/main/vex_main.o: $(ALL_HEADERS) priv/main/vex_main.c \
+ priv/main/vex_svnversion.h
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/main/vex_main.o \
+ -c priv/main/vex_main.c
+
+priv/main/vex_globals.o: $(ALL_HEADERS) priv/main/vex_globals.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/main/vex_globals.o \
+ -c priv/main/vex_globals.c
+
+priv/main/vex_util.o: $(ALL_HEADERS) priv/main/vex_util.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/main/vex_util.o \
+ -c priv/main/vex_util.c
+
+priv/host-x86/hdefs.o: $(ALL_HEADERS) priv/host-x86/hdefs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host-x86/hdefs.o \
+ -c priv/host-x86/hdefs.c
+
+priv/host-amd64/hdefs.o: $(ALL_HEADERS) priv/host-amd64/hdefs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host-amd64/hdefs.o \
+ -c priv/host-amd64/hdefs.c
+
+priv/host-arm/hdefs.o: $(ALL_HEADERS) priv/host-arm/hdefs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host-arm/hdefs.o \
+ -c priv/host-arm/hdefs.c
+
+priv/host-ppc/hdefs.o: $(ALL_HEADERS) priv/host-ppc/hdefs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host-ppc/hdefs.o \
+ -c priv/host-ppc/hdefs.c
+
+priv/host-x86/isel.o: $(ALL_HEADERS) priv/host-x86/isel.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host-x86/isel.o \
+ -c priv/host-x86/isel.c
+
+priv/host-amd64/isel.o: $(ALL_HEADERS) priv/host-amd64/isel.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host-amd64/isel.o \
+ -c priv/host-amd64/isel.c
+
+priv/host-arm/isel.o: $(ALL_HEADERS) priv/host-arm/isel.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host-arm/isel.o \
+ -c priv/host-arm/isel.c
+
+priv/host-ppc/isel.o: $(ALL_HEADERS) priv/host-ppc/isel.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host-ppc/isel.o \
+ -c priv/host-ppc/isel.c
+
+priv/host-generic/h_generic_regs.o: $(ALL_HEADERS) priv/host-generic/h_generic_regs.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host-generic/h_generic_regs.o \
+ -c priv/host-generic/h_generic_regs.c
+
+priv/host-generic/h_generic_simd64.o: $(ALL_HEADERS) priv/host-generic/h_generic_simd64.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host-generic/h_generic_simd64.o \
+ -c priv/host-generic/h_generic_simd64.c
+
+priv/host-generic/reg_alloc2.o: $(ALL_HEADERS) priv/host-generic/reg_alloc2.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/host-generic/reg_alloc2.o \
+ -c priv/host-generic/reg_alloc2.c
+
+priv/guest-x86/toIR.o: $(ALL_HEADERS) priv/guest-x86/toIR.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-x86/toIR.o \
+ -c priv/guest-x86/toIR.c
+
+priv/guest-generic/g_generic_x87.o: $(ALL_HEADERS) priv/guest-generic/g_generic_x87.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-generic/g_generic_x87.o \
+ -c priv/guest-generic/g_generic_x87.c
+
+priv/guest-generic/bb_to_IR.o: $(ALL_HEADERS) priv/guest-generic/bb_to_IR.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-generic/bb_to_IR.o \
+ -c priv/guest-generic/bb_to_IR.c
+
+priv/guest-x86/ghelpers.o: $(ALL_HEADERS) priv/guest-x86/ghelpers.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-x86/ghelpers.o \
+ -c priv/guest-x86/ghelpers.c
+
+priv/guest-amd64/ghelpers.o: $(ALL_HEADERS) priv/guest-amd64/ghelpers.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-amd64/ghelpers.o \
+ -c priv/guest-amd64/ghelpers.c
+
+priv/guest-amd64/toIR.o: $(ALL_HEADERS) priv/guest-amd64/toIR.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-amd64/toIR.o \
+ -c priv/guest-amd64/toIR.c
+
+priv/guest-arm/ghelpers.o: $(ALL_HEADERS) priv/guest-arm/ghelpers.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-arm/ghelpers.o \
+ -c priv/guest-arm/ghelpers.c
+
+priv/guest-arm/toIR.o: $(ALL_HEADERS) priv/guest-arm/toIR.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-arm/toIR.o \
+ -c priv/guest-arm/toIR.c
+
+priv/guest-ppc/ghelpers.o: $(ALL_HEADERS) priv/guest-ppc/ghelpers.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-ppc/ghelpers.o \
+ -c priv/guest-ppc/ghelpers.c
+
+priv/guest-ppc/toIR.o: $(ALL_HEADERS) priv/guest-ppc/toIR.c
+ $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-ppc/toIR.o \
+ -c priv/guest-ppc/toIR.c
diff --git a/main/VEX/TODO.txt b/main/VEX/TODO.txt
new file mode 100644
index 0000000..24dc3cb
--- /dev/null
+++ b/main/VEX/TODO.txt
@@ -0,0 +1,55 @@
+
+Last updated 15 Nov 04
+~~~~~~~~~~~~~~~~~~~~~~
+
+Critical (correctness)
+~~~~~~~~~~~~~~~~~~~~~~
+x86 isel: should free up all fp reg tags when calling a helper.
+And save FP and SSE insns across the helper.
+
+iropt: reconsider precise exceptions
+
+x86 guest: look at FP accuracy
+
+
+Optimisation opportunities
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+Improved isel for memcheck artefacts on x86 (generate neg ; sbbl)
+
+Assess tt_fast miss rates
+
+improve stack-update pass
+
+proper profiling machinery
+
+do not CSE exprs :: Ity_Bit
+
+x86 iselIntExpr_RMI: actually generate the M case if possible
+
+
+JIT speedups
+~~~~~~~~~~~~
+Ensure incremental flatness throughout
+
+Profile again with cachegrind/calltree
+
+change IRTemp to 16 bits?
+
+
+Integration
+~~~~~~~~~~~
+Get rid of sloppy-malloc
+
+Get rid of partial-loads-ok
+
+Optimisation after first instrumentation rather than 2nd ?
+
+disallow dirty helpers from writing SP/IP
+
+write API doc, clarify IR semantics
+
+make IR utils module
+
+generic stack pointer identification at startup?
+
+New memstack_k: old or new sp?
diff --git a/main/VEX/auxprogs/genoffsets.c b/main/VEX/auxprogs/genoffsets.c
index b379691..c371a9d 100644
--- a/main/VEX/auxprogs/genoffsets.c
+++ b/main/VEX/auxprogs/genoffsets.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -51,6 +51,7 @@
#include "../pub/libvex_guest_ppc32.h"
#include "../pub/libvex_guest_ppc64.h"
#include "../pub/libvex_guest_arm.h"
+#include "../pub/libvex_guest_s390x.h"
#define VG_STRINGIFZ(__str) #__str
#define VG_STRINGIFY(__str) VG_STRINGIFZ(__str)
@@ -155,6 +156,19 @@
GENOFFSET(ARM,arm,R13);
GENOFFSET(ARM,arm,R14);
GENOFFSET(ARM,arm,R15T);
+
+ // s390x
+ GENOFFSET(S390X,s390x,r2);
+ GENOFFSET(S390X,s390x,r3);
+ GENOFFSET(S390X,s390x,r4);
+ GENOFFSET(S390X,s390x,r5);
+ GENOFFSET(S390X,s390x,r6);
+ GENOFFSET(S390X,s390x,r7);
+ GENOFFSET(S390X,s390x,r15);
+ GENOFFSET(S390X,s390x,IA);
+ GENOFFSET(S390X,s390x,SYSNO);
+ GENOFFSET(S390X,s390x,IP_AT_SYSCALL);
+ GENOFFSET(S390X,s390x,fpc);
}
/*--------------------------------------------------------------------*/
diff --git a/main/VEX/nanoarm.orig b/main/VEX/nanoarm.orig
new file mode 100644
index 0000000..90742df
--- /dev/null
+++ b/main/VEX/nanoarm.orig
@@ -0,0 +1,19 @@
+ 0: e1a0c00d mov ip, sp
+. 0 00008000 4
+. 0d c0 a0 e1
+
+ 4: e92dd810 stmdb sp!, {r4, fp, ip, lr, pc}
+. 1 00008004 4
+. 10 d8 2d e9
+
+ 8: e24cb004 sub fp, ip, #4 ; 0x4
+. 2 00008008 4
+. 04 b0 4c e2
+
+ c: e3a00014 mov r0, #20 ; 0x14
+. 3 0000800C 4
+. 14 00 a0 e3
+
+ 10: ebfffffe bl 0 <newHHW>
+. 4 00008010 4
+. fe ff ff eb
diff --git a/main/VEX/orig_amd64/Compare.hs b/main/VEX/orig_amd64/Compare.hs
new file mode 100644
index 0000000..6641267
--- /dev/null
+++ b/main/VEX/orig_amd64/Compare.hs
@@ -0,0 +1,63 @@
+
+module Main where
+
+import Char ( isSpace )
+
+{- Compares a .sorted file with a raw printout of instructions
+ and shows differences.
+
+ First file (REF) is has lines of format
+
+ hex-digits SPACEs insn(possibly with spaces)
+
+ Second file (TEST) has lines of format
+
+ insn(possibly with spaces)
+
+ Purpose is to extract the insn (text), remove spaces, and compare.
+
+ How to use:
+(cd .. && make) && (../vex test1.orig | grep LALALA | cut -b 22- > out.txt)
+/home/sewardj/Tools/HugsInst/bin/runhugs Compare.hs | grep FAIL
+-}
+
+main = mayn "test2.sorted" "out.txt"
+
+mayn :: String -> String -> IO ()
+
+mayn sorted_fn dump_fn
+ = do sorted <- readFile sorted_fn
+ dump <- readFile dump_fn
+ let ress = zipWith check (lines (deTab sorted))
+ (lines (deTab dump))
+ putStrLn (unlines ress)
+
+
+check :: String -> String -> String
+check ref test
+ = let ref_clean = dropWhile isHex ref
+ ok = compere ref_clean test
+ summary = grok ("REF: " ++ trim ref_clean)
+ ++ " " ++ grok ("TEST: " ++ trim test)
+ in
+ if ok
+ then "pass: " ++ summary
+ else "FAIL: " ++ summary
+
+trim = reverse . dropWhile isSpace . reverse . dropWhile isSpace
+
+compere s1 s2 = filter (not . isSpace) s1 == filter (not . isSpace) s2
+
+isHex c = c `elem` "ABCDEF0123456789abcdef"
+
+grok str
+ = let n = length str
+ limit = 40
+ in
+ if n >= limit
+ then str
+ else take limit (str ++ repeat ' ')
+
+deTab [] = []
+deTab (c:cs) = if c == '\t' then " " ++ deTab cs
+ else c: deTab cs
diff --git a/main/VEX/orig_amd64/SortedToOrig.hs b/main/VEX/orig_amd64/SortedToOrig.hs
new file mode 100644
index 0000000..0d947b6
--- /dev/null
+++ b/main/VEX/orig_amd64/SortedToOrig.hs
@@ -0,0 +1,29 @@
+
+module Main where
+
+main
+ = do x1 <- readFile "test2.sorted"
+ let x2 = lines x1
+ x3 = zip [1 ..] x2
+ x4 = concat (map qq x3)
+ --putStr x4
+ writeFile "test2.orig" x4
+
+
+qq :: (Int, String) -> String
+qq (n, s0)
+ = let ws = words s0
+ bytes = head ws
+ rest = unwords (tail ws)
+ bytes2 = foo bytes
+ in
+ unlines [
+ "",
+ rest,
+ ". " ++ show n ++ " 0x12345678 " ++ show (1 + (length bytes `div` 2)),
+ ". " ++ bytes2 ++ "C3"
+ ]
+
+
+foo [] = []
+foo (x:y:rest) = x:y:' ':foo rest
diff --git a/main/VEX/orig_amd64/test1.orig b/main/VEX/orig_amd64/test1.orig
new file mode 100644
index 0000000..68258c0
--- /dev/null
+++ b/main/VEX/orig_amd64/test1.orig
@@ -0,0 +1,5281 @@
+
+addl 1052(%rsp,%rdx,4), %eax
+. 1 0x12345678 8
+. 03 84 94 1C 04 00 00 C3
+
+addl 108(%rbx), %ecx
+. 2 0x12345678 4
+. 03 4B 6C C3
+
+addl $2, %eax
+. 3 0x12345678 4
+. 83 C0 02 C3
+
+addl $2, %edx
+. 4 0x12345678 4
+. 83 C2 02 C3
+
+addl $32, %ecx
+. 5 0x12345678 4
+. 83 C1 20 C3
+
+addl $32, %esi
+. 6 0x12345678 4
+. 83 C6 20 C3
+
+addl $49, %r12d
+. 7 0x12345678 5
+. 41 83 C4 31 C3
+
+addl $4, %ecx
+. 8 0x12345678 4
+. 83 C1 04 C3
+
+addl -4(%rbp,%rdx,4), %eax
+. 9 0x12345678 5
+. 03 44 95 FC C3
+
+addl 51640(%rax), %ecx
+. 10 0x12345678 7
+. 03 88 B8 C9 00 00 C3
+
+addl 51640(%rbp,%rax), %ecx
+. 11 0x12345678 8
+. 03 8C 05 B8 C9 00 00 C3
+
+addl 51640(%rdx), %ecx
+. 12 0x12345678 7
+. 03 8A B8 C9 00 00 C3
+
+addl 51644(%rax), %esi
+. 13 0x12345678 7
+. 03 B0 BC C9 00 00 C3
+
+addl 51644(%rdx), %esi
+. 14 0x12345678 7
+. 03 B2 BC C9 00 00 C3
+
+addl 51648(%rax), %edi
+. 15 0x12345678 7
+. 03 B8 C0 C9 00 00 C3
+
+addl 51648(%rdx), %edi
+. 16 0x12345678 7
+. 03 BA C0 C9 00 00 C3
+
+addl $5, %eax
+. 17 0x12345678 4
+. 83 C0 05 C3
+
+addl $5, %r14d
+. 18 0x12345678 5
+. 41 83 C6 05 C3
+
+addl 672(%rbp,%rax,4), %r13d
+. 19 0x12345678 9
+. 44 03 AC 85 A0 02 00 00 C3
+
+addl %ebx, %eax
+. 20 0x12345678 3
+. 01 D8 C3
+
+addl %ecx, %r9d
+. 21 0x12345678 4
+. 41 01 C9 C3
+
+addl %edx, %eax
+. 22 0x12345678 3
+. 01 D0 C3
+
+addl %r12d, %eax
+. 23 0x12345678 4
+. 44 01 E0 C3
+
+addl %r12d, %r13d
+. 24 0x12345678 4
+. 45 01 E5 C3
+
+addl %r13d, %eax
+. 25 0x12345678 4
+. 44 01 E8 C3
+
+addl (%rbp,%rax,4), %edi
+. 26 0x12345678 5
+. 03 7C 85 00 C3
+
+addq $104, %rsp
+. 27 0x12345678 5
+. 48 83 C4 68 C3
+
+addq $1304, %rsp
+. 28 0x12345678 8
+. 48 81 C4 18 05 00 00 C3
+
+addq $2104, %rsp
+. 29 0x12345678 8
+. 48 81 C4 38 08 00 00 C3
+
+addq $264, %rsp
+. 30 0x12345678 8
+. 48 81 C4 08 01 00 00 C3
+
+addq 32(%rbx), %rax
+. 31 0x12345678 5
+. 48 03 43 20 C3
+
+addq $3400, %rsp
+. 32 0x12345678 8
+. 48 81 C4 48 0D 00 00 C3
+
+addq $56, %rsp
+. 33 0x12345678 5
+. 48 83 C4 38 C3
+
+addq $72, %rsp
+. 34 0x12345678 5
+. 48 83 C4 48 C3
+
+addq $824, %rsp
+. 35 0x12345678 8
+. 48 81 C4 38 03 00 00 C3
+
+addq $8, %rsp
+. 36 0x12345678 5
+. 48 83 C4 08 C3
+
+addq %rax, %rax
+. 37 0x12345678 4
+. 48 01 C0 C3
+
+addq %rax, %rdi
+. 38 0x12345678 4
+. 48 01 C7 C3
+
+addq %rax, %rdx
+. 39 0x12345678 4
+. 48 01 C2 C3
+
+addq %rbp, %rax
+. 40 0x12345678 4
+. 48 01 E8 C3
+
+addq %rbp, %rdx
+. 41 0x12345678 4
+. 48 01 EA C3
+
+addq %rbp, %rsi
+. 42 0x12345678 4
+. 48 01 EE C3
+
+addq %rcx, %rax
+. 43 0x12345678 4
+. 48 01 C8 C3
+
+addq %rdx, %rax
+. 44 0x12345678 4
+. 48 01 D0 C3
+
+addq %rdx, %rdx
+. 45 0x12345678 4
+. 48 01 D2 C3
+
+addq %rsi, %rdx
+. 46 0x12345678 4
+. 48 01 F2 C3
+
+addw %dx, 80(%rsp,%rax,2)
+. 47 0x12345678 6
+. 66 01 54 44 50 C3
+
+andl $-2097153, %eax
+. 48 0x12345678 6
+. 25 FF FF DF FF C3
+
+andl $-2097153, %edx
+. 49 0x12345678 7
+. 81 E2 FF FF DF FF C3
+
+andl $-2097153, %r12d
+. 50 0x12345678 8
+. 41 81 E4 FF FF DF FF C3
+
+andl $-2097153, %r15d
+. 51 0x12345678 8
+. 41 81 E7 FF FF DF FF C3
+
+andl $-2097153, %r8d
+. 52 0x12345678 8
+. 41 81 E0 FF FF DF FF C3
+
+andl $255, %r8d
+. 53 0x12345678 8
+. 41 81 E0 FF 00 00 00 C3
+
+andl $-2, %eax
+. 54 0x12345678 4
+. 83 E0 FE C3
+
+andl $31, %ecx
+. 55 0x12345678 4
+. 83 E1 1F C3
+
+andl $32767, %eax
+. 56 0x12345678 6
+. 25 FF 7F 00 00 C3
+
+andl %edx, %eax
+. 57 0x12345678 3
+. 21 D0 C3
+
+andl %edx, (%rbx,%rax,4)
+. 58 0x12345678 4
+. 21 14 83 C3
+
+andl %esi, %edx
+. 59 0x12345678 3
+. 21 F2 C3
+
+call lalala
+. 60 0x12345678 5
+. E8 62 16 00 00
+
+cltd
+. 61 0x12345678 2
+. 99 C3
+
+cltq
+. 62 0x12345678 3
+. 48 98 C3
+
+cmova %ecx, %edx
+. 63 0x12345678 4
+. 0F 47 D1 C3
+
+cmovae %eax, %edi
+. 64 0x12345678 4
+. 0F 43 F8 C3
+
+cmovae %eax, %esi
+. 65 0x12345678 4
+. 0F 43 F0 C3
+
+cmovg %eax, %ecx
+. 66 0x12345678 4
+. 0F 4F C8 C3
+
+cmovg %eax, %edi
+. 67 0x12345678 4
+. 0F 4F F8 C3
+
+cmovg %eax, %esi
+. 68 0x12345678 4
+. 0F 4F F0 C3
+
+cmovg %eax, %r12d
+. 69 0x12345678 5
+. 44 0F 4F E0 C3
+
+cmovge %eax, %ecx
+. 70 0x12345678 4
+. 0F 4D C8 C3
+
+cmovg %r13d, %eax
+. 71 0x12345678 5
+. 41 0F 4F C5 C3
+
+cmovl %eax, %r13d
+. 72 0x12345678 5
+. 44 0F 4C E8 C3
+
+cmovle %eax, %ecx
+. 73 0x12345678 4
+. 0F 4E C8 C3
+
+cmovle %eax, %esi
+. 74 0x12345678 4
+. 0F 4E F0 C3
+
+cmovne %eax, %edx
+. 75 0x12345678 4
+. 0F 45 D0 C3
+
+cmovne %edi, %edx
+. 76 0x12345678 4
+. 0F 45 D7 C3
+
+cmpb $0, 128(%rbp,%rax)
+. 77 0x12345678 9
+. 80 BC 05 80 00 00 00 00 C3
+
+cmpb $0, 128(%rdi,%rdx)
+. 78 0x12345678 9
+. 80 BC 17 80 00 00 00 00 C3
+
+cmpb $0, 19706(%rbp,%rax)
+. 79 0x12345678 9
+. 80 BC 05 FA 4C 00 00 00 C3
+
+cmpb $0, 2112(%rsp,%rax)
+. 80 0x12345678 9
+. 80 BC 04 40 08 00 00 00 C3
+
+cmpb $0, 2112(%rsp,%rsi)
+. 81 0x12345678 9
+. 80 BC 34 40 08 00 00 00 C3
+
+cmpb $0, 32(%rsp,%rax)
+. 82 0x12345678 6
+. 80 7C 04 20 00 C3
+
+cmpb %al, %r10b
+. 83 0x12345678 4
+. 41 38 C2 C3
+
+cmpb %cl, %sil
+. 84 0x12345678 4
+. 40 38 CE C3
+
+cmpb %dl, %cl
+. 85 0x12345678 3
+. 38 D1 C3
+
+cmpb %sil, %cl
+. 86 0x12345678 4
+. 40 38 F1 C3
+
+cmpb %sil, %dl
+. 87 0x12345678 4
+. 40 38 F2 C3
+
+cmpb %sil, (%rsp)
+. 88 0x12345678 5
+. 40 38 34 24 C3
+
+cmpl $0, 1088(%rsp,%rdx,4)
+. 89 0x12345678 9
+. 83 BC 94 40 04 00 00 00 C3
+
+cmpl $0, 108(%rbx)
+. 90 0x12345678 5
+. 83 7B 6C 00 C3
+
+cmpl $0, 108(%rdi)
+. 91 0x12345678 5
+. 83 7F 6C 00 C3
+
+cmpl $0, 12(%rsp)
+. 92 0x12345678 6
+. 83 7C 24 0C 00 C3
+
+cmpl $0, 20(%rsp)
+. 93 0x12345678 6
+. 83 7C 24 14 00 C3
+
+cmpl $0, 24(%rsp)
+. 94 0x12345678 6
+. 83 7C 24 18 00 C3
+
+cmpl $0, 32(%rsp,%rax,4)
+. 95 0x12345678 6
+. 83 7C 84 20 00 C3
+
+cmpl $0, 644(%rdi)
+. 96 0x12345678 8
+. 83 BF 84 02 00 00 00 C3
+
+cmpl $0, 668(%rbp)
+. 97 0x12345678 8
+. 83 BD 9C 02 00 00 00 C3
+
+cmpl $0, (%r14,%rax,4)
+. 98 0x12345678 6
+. 41 83 3C 86 00 C3
+
+cmpl $0, (%rax)
+. 99 0x12345678 4
+. 83 38 00 C3
+
+cmpl $0, (%rbx,%rax,4)
+. 100 0x12345678 5
+. 83 3C 83 00 C3
+
+cmpl $0, (%rdi)
+. 101 0x12345678 4
+. 83 3F 00 C3
+
+cmpl $0, (%rsi)
+. 102 0x12345678 4
+. 83 3E 00 C3
+
+cmpl $101, %ecx
+. 103 0x12345678 4
+. 83 F9 65 C3
+
+cmpl 1088(%rsp,%rdi,4), %r12d
+. 104 0x12345678 9
+. 44 3B A4 BC 40 04 00 00 C3
+
+cmpl 1088(%rsp,%rdx,4), %r12d
+. 105 0x12345678 9
+. 44 3B A4 94 40 04 00 00 C3
+
+cmpl 108(%rbx), %edx
+. 106 0x12345678 4
+. 3B 53 6C C3
+
+cmpl 108(%rbx), %r9d
+. 107 0x12345678 5
+. 44 3B 4B 6C C3
+
+cmpl $1199, 668(%rbp)
+. 108 0x12345678 11
+. 81 BD 9C 02 00 00 AF 04 00 00 C3
+
+cmpl 124(%rbx), %r8d
+. 109 0x12345678 5
+. 44 3B 43 7C C3
+
+cmpl 12(%rsp), %edx
+. 110 0x12345678 5
+. 3B 54 24 0C C3
+
+cmpl $-1, 48(%rbx)
+. 111 0x12345678 5
+. 83 7B 30 FF C3
+
+cmpl $14, %r13d
+. 112 0x12345678 5
+. 41 83 FD 0E C3
+
+cmpl $15, %edi
+. 113 0x12345678 4
+. 83 FF 0F C3
+
+cmpl $15, %r8d
+. 114 0x12345678 5
+. 41 83 F8 0F C3
+
+cmpl $1, 656(%rbx)
+. 115 0x12345678 8
+. 83 BB 90 02 00 00 01 C3
+
+cmpl $1, 660(%rbx)
+. 116 0x12345678 8
+. 83 BB 94 02 00 00 01 C3
+
+cmpl $1, 660(%rdi)
+. 117 0x12345678 8
+. 83 BF 94 02 00 00 01 C3
+
+cmpl 16(%rsp), %edx
+. 118 0x12345678 5
+. 3B 54 24 10 C3
+
+cmpl $17, %r12d
+. 119 0x12345678 5
+. 41 83 FC 11 C3
+
+cmpl $18002, 24(%rsp)
+. 120 0x12345678 9
+. 81 7C 24 18 52 46 00 00 C3
+
+cmpl $199, 668(%rbp)
+. 121 0x12345678 11
+. 81 BD 9C 02 00 00 C7 00 00 00 C3
+
+cmpl $19, %eax
+. 122 0x12345678 4
+. 83 F8 13 C3
+
+cmpl $1, %ebx
+. 123 0x12345678 4
+. 83 FB 01 C3
+
+cmpl $-1, %ecx
+. 124 0x12345678 4
+. 83 F9 FF C3
+
+cmpl $1, %edi
+. 125 0x12345678 4
+. 83 FF 01 C3
+
+cmpl $1, %edx
+. 126 0x12345678 4
+. 83 FA 01 C3
+
+cmpl $-1, %esi
+. 127 0x12345678 4
+. 83 FE FF C3
+
+cmpl $1, %esi
+. 128 0x12345678 4
+. 83 FE 01 C3
+
+cmpl $-1, %r13d
+. 129 0x12345678 5
+. 41 83 FD FF C3
+
+cmpl $1, %r13d
+. 130 0x12345678 5
+. 41 83 FD 01 C3
+
+cmpl $-1, %r9d
+. 131 0x12345678 5
+. 41 83 F9 FF C3
+
+cmpl $-1, (%rbx,%rax,4)
+. 132 0x12345678 5
+. 83 3C 83 FF C3
+
+cmpl 20(%rsp), %edi
+. 133 0x12345678 5
+. 3B 7C 24 14 C3
+
+cmpl 20(%rsp), %edx
+. 134 0x12345678 5
+. 3B 54 24 14 C3
+
+cmpl $2399, 668(%rbp)
+. 135 0x12345678 11
+. 81 BD 9C 02 00 00 5F 09 00 00 C3
+
+cmpl 24(%rsp), %ebx
+. 136 0x12345678 5
+. 3B 5C 24 18 C3
+
+cmpl 24(%rsp), %edi
+. 137 0x12345678 5
+. 3B 7C 24 18 C3
+
+cmpl $254, %ebx
+. 138 0x12345678 7
+. 81 FB FE 00 00 00 C3
+
+cmpl $255, %ebx
+. 139 0x12345678 7
+. 81 FB FF 00 00 00 C3
+
+cmpl $255, %ecx
+. 140 0x12345678 7
+. 81 F9 FF 00 00 00 C3
+
+cmpl $255, %edi
+. 141 0x12345678 7
+. 81 FF FF 00 00 00 C3
+
+cmpl $255, %edx
+. 142 0x12345678 7
+. 81 FA FF 00 00 00 C3
+
+cmpl $255, %r12d
+. 143 0x12345678 8
+. 41 81 FC FF 00 00 00 C3
+
+cmpl $256, %edi
+. 144 0x12345678 7
+. 81 FF 00 01 00 00 C3
+
+cmpl $256, %esi
+. 145 0x12345678 7
+. 81 FE 00 01 00 00 C3
+
+cmpl $2, 656(%rbp)
+. 146 0x12345678 8
+. 83 BD 90 02 00 00 02 C3
+
+cmpl $2, 656(%rdi)
+. 147 0x12345678 8
+. 83 BF 90 02 00 00 02 C3
+
+cmpl 28(%rsp), %edi
+. 148 0x12345678 5
+. 3B 7C 24 1C C3
+
+cmpl 28(%rsp), %r12d
+. 149 0x12345678 6
+. 44 3B 64 24 1C C3
+
+cmpl 28(%rsp), %r13d
+. 150 0x12345678 6
+. 44 3B 6C 24 1C C3
+
+cmpl $2, %ebx
+. 151 0x12345678 4
+. 83 FB 02 C3
+
+cmpl $2, %r13d
+. 152 0x12345678 5
+. 41 83 FD 02 C3
+
+cmpl $31, %edi
+. 153 0x12345678 4
+. 83 FF 1F C3
+
+cmpl $3, 20(%rsp)
+. 154 0x12345678 6
+. 83 7C 24 14 03 C3
+
+cmpl $3, 32(%rsp)
+. 155 0x12345678 6
+. 83 7C 24 20 03 C3
+
+cmpl $33, %ebx
+. 156 0x12345678 4
+. 83 FB 21 C3
+
+cmpl $33, %r9d
+. 157 0x12345678 5
+. 41 83 F9 21 C3
+
+cmpl $3, %eax
+. 158 0x12345678 4
+. 83 F8 03 C3
+
+cmpl $3, %r13d
+. 159 0x12345678 5
+. 41 83 FD 03 C3
+
+cmpl $3, %r8d
+. 160 0x12345678 5
+. 41 83 F8 03 C3
+
+cmpl $3, %r9d
+. 161 0x12345678 5
+. 41 83 F9 03 C3
+
+cmpl $49, %eax
+. 162 0x12345678 4
+. 83 F8 31 C3
+
+cmpl $599, 668(%rbp)
+. 163 0x12345678 11
+. 81 BD 9C 02 00 00 57 02 00 00 C3
+
+cmpl $5, %ebx
+. 164 0x12345678 4
+. 83 FB 05 C3
+
+cmpl 64(%rsp,%rax,4), %r12d
+. 165 0x12345678 6
+. 44 3B 64 84 40 C3
+
+cmpl 64(%rsp,%rdi,4), %r12d
+. 166 0x12345678 6
+. 44 3B 64 BC 40 C3
+
+cmpl 64(%rsp,%rdx,4), %eax
+. 167 0x12345678 5
+. 3B 44 94 40 C3
+
+cmpl $65534, %eax
+. 168 0x12345678 6
+. 3D FE FF 00 00 C3
+
+cmpl $65534, %edx
+. 169 0x12345678 7
+. 81 FA FE FF 00 00 C3
+
+cmpl $65535, %eax
+. 170 0x12345678 6
+. 3D FF FF 00 00 C3
+
+cmpl $65536, %ebx
+. 171 0x12345678 7
+. 81 FB 00 00 01 00 C3
+
+cmpl 668(%rbp), %edx
+. 172 0x12345678 7
+. 3B 95 9C 02 00 00 C3
+
+cmpl 668(%rbp), %r12d
+. 173 0x12345678 8
+. 44 3B A5 9C 02 00 00 C3
+
+cmpl $6, %r14d
+. 174 0x12345678 5
+. 41 83 FE 06 C3
+
+cmpl $7, 644(%r11)
+. 175 0x12345678 9
+. 41 83 BB 84 02 00 00 07 C3
+
+cmpl $7, 644(%rbp)
+. 176 0x12345678 8
+. 83 BD 84 02 00 00 07 C3
+
+cmpl $7, 644(%rbx)
+. 177 0x12345678 8
+. 83 BB 84 02 00 00 07 C3
+
+cmpl $7, 644(%rdi)
+. 178 0x12345678 8
+. 83 BF 84 02 00 00 07 C3
+
+cmpl $7, 644(%rsi)
+. 179 0x12345678 8
+. 83 BE 84 02 00 00 07 C3
+
+cmpl $7, %r14d
+. 180 0x12345678 5
+. 41 83 FE 07 C3
+
+cmpl $99, 12(%rsp)
+. 181 0x12345678 6
+. 83 7C 24 0C 63 C3
+
+cmpl $99, 24(%rsp)
+. 182 0x12345678 6
+. 83 7C 24 18 63 C3
+
+cmpl $9999, %ebp
+. 183 0x12345678 7
+. 81 FD 0F 27 00 00 C3
+
+cmpl $9, %eax
+. 184 0x12345678 4
+. 83 F8 09 C3
+
+cmpl %eax, 64(%rsp,%rdx,4)
+. 185 0x12345678 5
+. 39 44 94 40 C3
+
+cmpl %eax, %ecx
+. 186 0x12345678 3
+. 39 C1 C3
+
+cmpl %eax, %edi
+. 187 0x12345678 3
+. 39 C7 C3
+
+cmpl %eax, %edx
+. 188 0x12345678 3
+. 39 C2 C3
+
+cmpl %eax, %esi
+. 189 0x12345678 3
+. 39 C6 C3
+
+cmpl %eax, %r13d
+. 190 0x12345678 4
+. 41 39 C5 C3
+
+cmpl %eax, %r8d
+. 191 0x12345678 4
+. 41 39 C0 C3
+
+cmpl %ebp, %edi
+. 192 0x12345678 3
+. 39 EF C3
+
+cmpl %ebp, %r12d
+. 193 0x12345678 4
+. 41 39 EC C3
+
+cmpl %ecx, %eax
+. 194 0x12345678 3
+. 39 C8 C3
+
+cmpl %ecx, %r13d
+. 195 0x12345678 4
+. 41 39 CD C3
+
+cmpl %edi, %eax
+. 196 0x12345678 3
+. 39 F8 C3
+
+cmpl %edi, %r10d
+. 197 0x12345678 4
+. 41 39 FA C3
+
+cmpl %edx, %ecx
+. 198 0x12345678 3
+. 39 D1 C3
+
+cmpl %edx, %edi
+. 199 0x12345678 3
+. 39 D7 C3
+
+cmpl %edx, 0x12345678(%rip)
+. 200 0x12345678 7
+. 39 15 78 56 34 12 C3
+
+cmpl %edx, %r12d
+. 201 0x12345678 4
+. 41 39 D4 C3
+
+cmpl %edx, %r9d
+. 202 0x12345678 4
+. 41 39 D1 C3
+
+cmpl %edx, (%rcx,%rax,4)
+. 203 0x12345678 4
+. 39 14 81 C3
+
+cmpl %r10d, %r9d
+. 204 0x12345678 4
+. 45 39 D1 C3
+
+cmpl (%r10,%rax,4), %r8d
+. 205 0x12345678 5
+. 45 3B 04 82 C3
+
+cmpl %r11d, %ecx
+. 206 0x12345678 4
+. 44 39 D9 C3
+
+cmpl %r12d, %eax
+. 207 0x12345678 4
+. 44 39 E0 C3
+
+cmpl %r12d, %ebp
+. 208 0x12345678 4
+. 44 39 E5 C3
+
+cmpl %r12d, %edi
+. 209 0x12345678 4
+. 44 39 E7 C3
+
+cmpl %r13d, 16(%rsp)
+. 210 0x12345678 6
+. 44 39 6C 24 10 C3
+
+cmpl %r13d, %eax
+. 211 0x12345678 4
+. 44 39 E8 C3
+
+cmpl %r13d, %ebp
+. 212 0x12345678 4
+. 44 39 ED C3
+
+cmpl %r13d, %edi
+. 213 0x12345678 4
+. 44 39 EF C3
+
+cmpl %r13d, %edx
+. 214 0x12345678 4
+. 44 39 EA C3
+
+cmpl %r13d, %r12d
+. 215 0x12345678 4
+. 45 39 EC C3
+
+cmpl %r14d, %eax
+. 216 0x12345678 4
+. 44 39 F0 C3
+
+cmpl %r14d, %ebx
+. 217 0x12345678 4
+. 44 39 F3 C3
+
+cmpl %r14d, %edi
+. 218 0x12345678 4
+. 44 39 F7 C3
+
+cmpl %r14d, %r12d
+. 219 0x12345678 4
+. 45 39 F4 C3
+
+cmpl %r14d, %r13d
+. 220 0x12345678 4
+. 45 39 F5 C3
+
+cmpl %r15d, %r14d
+. 221 0x12345678 4
+. 45 39 FE C3
+
+cmpl %r8d, %edi
+. 222 0x12345678 4
+. 44 39 C7 C3
+
+cmpl %r8d, %esi
+. 223 0x12345678 4
+. 44 39 C6 C3
+
+cmpl %r9d, %edx
+. 224 0x12345678 4
+. 44 39 CA C3
+
+cmpw %ax, %r10w
+. 225 0x12345678 5
+. 66 41 39 C2 C3
+
+decl 12(%rsp)
+. 226 0x12345678 5
+. FF 4C 24 0C C3
+
+decl 24(%rsp)
+. 227 0x12345678 5
+. FF 4C 24 18 C3
+
+decl 32(%rsp,%rax,4)
+. 228 0x12345678 5
+. FF 4C 84 20 C3
+
+decl %eax
+. 229 0x12345678 3
+. FF C8 C3
+
+decl %ebp
+. 230 0x12345678 3
+. FF CD C3
+
+decl %ebx
+. 231 0x12345678 3
+. FF CB C3
+
+decl %ecx
+. 232 0x12345678 3
+. FF C9 C3
+
+decl %edi
+. 233 0x12345678 3
+. FF CF C3
+
+decl %esi
+. 234 0x12345678 3
+. FF CE C3
+
+decl %r10d
+. 235 0x12345678 4
+. 41 FF CA C3
+
+decl %r11d
+. 236 0x12345678 4
+. 41 FF CB C3
+
+decl %r12d
+. 237 0x12345678 4
+. 41 FF CC C3
+
+decl %r8d
+. 238 0x12345678 4
+. 41 FF C8 C3
+
+decl (%r9)
+. 239 0x12345678 4
+. 41 FF 09 C3
+
+idivl %ebx
+. 240 0x12345678 3
+. F7 FB C3
+
+imull $7621, 8(%rsp), %eax
+. 241 0x12345678 9
+. 69 44 24 08 C5 1D 00 00 C3
+
+imull %eax, %r12d
+. 242 0x12345678 5
+. 44 0F AF E0 C3
+
+imulq $1431655766, %rax, %rax
+. 243 0x12345678 8
+. 48 69 C0 56 55 55 55 C3
+
+imulq %rdx, %rax
+. 244 0x12345678 5
+. 48 0F AF C2 C3
+
+incl 1056(%rsp,%rax,4)
+. 245 0x12345678 8
+. FF 84 84 20 04 00 00 C3
+
+incl 116(%r11)
+. 246 0x12345678 5
+. 41 FF 43 74 C3
+
+incl 116(%rdi)
+. 247 0x12345678 4
+. FF 47 74 C3
+
+incl 116(%rsi)
+. 248 0x12345678 4
+. FF 46 74 C3
+
+incl 124(%rdi)
+. 249 0x12345678 4
+. FF 47 7C C3
+
+incl 12(%rsp)
+. 250 0x12345678 5
+. FF 44 24 0C C3
+
+incl 24(%rsp)
+. 251 0x12345678 5
+. FF 44 24 18 C3
+
+incl 45448(%rbp,%rax,4)
+. 252 0x12345678 8
+. FF 84 85 88 B1 00 00 C3
+
+incl 45448(%rbp,%rdx,4)
+. 253 0x12345678 8
+. FF 84 95 88 B1 00 00 C3
+
+incl 48(%rsp,%rsi,4)
+. 254 0x12345678 5
+. FF 44 B4 30 C3
+
+incl 672(%rbx)
+. 255 0x12345678 7
+. FF 83 A0 02 00 00 C3
+
+incl 672(%rbx,%rax,4)
+. 256 0x12345678 8
+. FF 84 83 A0 02 00 00 C3
+
+incl 676(%rbx)
+. 257 0x12345678 7
+. FF 83 A4 02 00 00 C3
+
+incl 676(%rbx,%rax,4)
+. 258 0x12345678 8
+. FF 84 83 A4 02 00 00 C3
+
+incl %eax
+. 259 0x12345678 3
+. FF C0 C3
+
+incl %ebp
+. 260 0x12345678 3
+. FF C5 C3
+
+incl %ebx
+. 261 0x12345678 3
+. FF C3 C3
+
+incl %ecx
+. 262 0x12345678 3
+. FF C1 C3
+
+incl %edi
+. 263 0x12345678 3
+. FF C7 C3
+
+incl %edx
+. 264 0x12345678 3
+. FF C2 C3
+
+incl %esi
+. 265 0x12345678 3
+. FF C6 C3
+
+incl %r10d
+. 266 0x12345678 4
+. 41 FF C2 C3
+
+incl %r11d
+. 267 0x12345678 4
+. 41 FF C3 C3
+
+incl %r12d
+. 268 0x12345678 4
+. 41 FF C4 C3
+
+incl %r13d
+. 269 0x12345678 4
+. 41 FF C5 C3
+
+incl %r14d
+. 270 0x12345678 4
+. 41 FF C6 C3
+
+incl %r8d
+. 271 0x12345678 4
+. 41 FF C0 C3
+
+incl %r9d
+. 272 0x12345678 4
+. 41 FF C1 C3
+
+incl (%rbp,%rax,4)
+. 273 0x12345678 5
+. FF 44 85 00 C3
+
+incq %rdx
+. 274 0x12345678 4
+. 48 FF C2 C3
+
+ja lalala
+. 275 0x12345678 6
+. 0F 87 DD 12 00 00
+
+jbe lalala
+. 276 0x12345678 6
+. 0F 86 D7 12 00 00
+
+je lalala
+. 277 0x12345678 6
+. 0F 84 D1 12 00 00
+
+jge lalala
+. 278 0x12345678 6
+. 0F 8D CB 12 00 00
+
+jg lalala
+. 279 0x12345678 6
+. 0F 8F C5 12 00 00
+
+jle lalala
+. 280 0x12345678 6
+. 0F 8E BF 12 00 00
+
+jl lalala
+. 281 0x12345678 6
+. 0F 8C B9 12 00 00
+
+jmp lalala
+. 282 0x12345678 5
+. E9 B4 12 00 00
+
+jne lalala
+. 283 0x12345678 6
+. 0F 85 AE 12 00 00
+
+jns lalala
+. 284 0x12345678 6
+. 0F 89 A8 12 00 00
+
+js lalala
+. 285 0x12345678 6
+. 0F 88 A2 12 00 00
+
+leal -1(%r11), %edi
+. 286 0x12345678 5
+. 41 8D 7B FF C3
+
+leal -1(%r12,%rax), %eax
+. 287 0x12345678 6
+. 41 8D 44 04 FF C3
+
+leal 1(%r13), %eax
+. 288 0x12345678 5
+. 41 8D 45 01 C3
+
+leal 1(%r13), %edx
+. 289 0x12345678 5
+. 41 8D 55 01 C3
+
+leal 1(%r8), %edx
+. 290 0x12345678 5
+. 41 8D 50 01 C3
+
+leal 1(%rax), %esi
+. 291 0x12345678 4
+. 8D 70 01 C3
+
+leal -1(%rax), %r14d
+. 292 0x12345678 5
+. 44 8D 70 FF C3
+
+leal 1(%rax,%r8), %r8d
+. 293 0x12345678 6
+. 46 8D 44 00 01 C3
+
+leal 1(%rax,%rcx), %ecx
+. 294 0x12345678 5
+. 8D 4C 08 01 C3
+
+leal 1(%rbp), %esi
+. 295 0x12345678 4
+. 8D 75 01 C3
+
+leal -1(%rbx), %eax
+. 296 0x12345678 4
+. 8D 43 FF C3
+
+leal -1(%rcx), %eax
+. 297 0x12345678 4
+. 8D 41 FF C3
+
+leal 1(%rcx), %eax
+. 298 0x12345678 4
+. 8D 41 01 C3
+
+leal 1(%rdi), %eax
+. 299 0x12345678 4
+. 8D 47 01 C3
+
+leal 1(%rdi), %ecx
+. 300 0x12345678 4
+. 8D 4F 01 C3
+
+leal -1(%rdx), %eax
+. 301 0x12345678 4
+. 8D 42 FF C3
+
+leal 1(%rdx), %eax
+. 302 0x12345678 4
+. 8D 42 01 C3
+
+leal -1(%rsi), %ebp
+. 303 0x12345678 4
+. 8D 6E FF C3
+
+leal -1(%rsi), %r12d
+. 304 0x12345678 5
+. 44 8D 66 FF C3
+
+leal -1(%rsi), %r9d
+. 305 0x12345678 5
+. 44 8D 4E FF C3
+
+leal -2(%rbx), %eax
+. 306 0x12345678 4
+. 8D 43 FE C3
+
+leal -2(%rdi), %eax
+. 307 0x12345678 4
+. 8D 47 FE C3
+
+leal 31(%r13), %eax
+. 308 0x12345678 5
+. 41 8D 45 1F C3
+
+leal 34(%rbp), %edx
+. 309 0x12345678 4
+. 8D 55 22 C3
+
+leal 35(%rbp), %eax
+. 310 0x12345678 4
+. 8D 45 23 C3
+
+leal -3(%rbx), %eax
+. 311 0x12345678 4
+. 8D 43 FD C3
+
+leal 48(%rax), %esi
+. 312 0x12345678 4
+. 8D 70 30 C3
+
+leal -4(%r14), %edi
+. 313 0x12345678 5
+. 41 8D 7E FC C3
+
+leal 4(%rdi), %ecx
+. 314 0x12345678 4
+. 8D 4F 04 C3
+
+leal 7(%rcx), %eax
+. 315 0x12345678 4
+. 8D 41 07 C3
+
+leal 8(%r8), %r11d
+. 316 0x12345678 5
+. 45 8D 58 08 C3
+
+leal (%r10,%r13), %ecx
+. 317 0x12345678 5
+. 43 8D 0C 2A C3
+
+leal (%r12,%r8), %eax
+. 318 0x12345678 5
+. 43 8D 04 04 C3
+
+leal (%r13,%rdi,2), %edx
+. 319 0x12345678 6
+. 41 8D 54 7D 00 C3
+
+leal (%r13,%rsi), %eax
+. 320 0x12345678 6
+. 41 8D 44 35 00 C3
+
+leal (%r14,%r13), %eax
+. 321 0x12345678 5
+. 43 8D 04 2E C3
+
+leal (%r8,%r10), %eax
+. 322 0x12345678 5
+. 43 8D 04 10 C3
+
+leal (%r8,%rdx), %eax
+. 323 0x12345678 5
+. 41 8D 04 10 C3
+
+leal (%r9,%r15), %edi
+. 324 0x12345678 5
+. 43 8D 3C 39 C3
+
+leal (%rax,%r10), %eax
+. 325 0x12345678 5
+. 42 8D 04 10 C3
+
+leal (%rax,%r14), %r15d
+. 326 0x12345678 5
+. 46 8D 3C 30 C3
+
+leal (%rax,%r8), %eax
+. 327 0x12345678 5
+. 42 8D 04 00 C3
+
+leal (%rax,%r9), %eax
+. 328 0x12345678 5
+. 42 8D 04 08 C3
+
+leal (%rax,%rax,2), %eax
+. 329 0x12345678 4
+. 8D 04 40 C3
+
+leal (%rax,%rdi), %eax
+. 330 0x12345678 4
+. 8D 04 38 C3
+
+leal (%rax,%rdx), %eax
+. 331 0x12345678 4
+. 8D 04 10 C3
+
+leal (%rcx,%r9), %eax
+. 332 0x12345678 5
+. 42 8D 04 09 C3
+
+leal (%rdi,%r13), %eax
+. 333 0x12345678 5
+. 42 8D 04 2F C3
+
+leal (%rdx,%r13), %eax
+. 334 0x12345678 5
+. 42 8D 04 2A C3
+
+leal (%rdx,%r8), %edx
+. 335 0x12345678 5
+. 42 8D 14 02 C3
+
+leal (%rdx,%r9), %edx
+. 336 0x12345678 5
+. 42 8D 14 0A C3
+
+leal (%rdx,%rcx), %eax
+. 337 0x12345678 4
+. 8D 04 0A C3
+
+leal (%rdx,%rdi), %edx
+. 338 0x12345678 4
+. 8D 14 3A C3
+
+leal (%rsi,%r13), %eax
+. 339 0x12345678 5
+. 42 8D 04 2E C3
+
+leal (%rsi,%r15), %eax
+. 340 0x12345678 5
+. 42 8D 04 3E C3
+
+leal (%rsi,%rcx), %eax
+. 341 0x12345678 4
+. 8D 04 0E C3
+
+leal (%rsi,%rsi,2), %eax
+. 342 0x12345678 4
+. 8D 04 76 C3
+
+leaq 1(%r11), %rdx
+. 343 0x12345678 5
+. 49 8D 53 01 C3
+
+leaq 20(%rsp), %rax
+. 344 0x12345678 6
+. 48 8D 44 24 14 C3
+
+leaq 37696(%rcx,%rax), %r10
+. 345 0x12345678 9
+. 4C 8D 94 01 40 93 00 00 C3
+
+leaq 37696(%rcx,%rax), %r9
+. 346 0x12345678 9
+. 4C 8D 8C 01 40 93 00 00 C3
+
+leaq 37708(%rbp,%rax,2), %rdi
+. 347 0x12345678 9
+. 48 8D BC 45 4C 93 00 00 C3
+
+leaq 37708(%rbp,%rdi,2), %rdi
+. 348 0x12345678 9
+. 48 8D BC 7D 4C 93 00 00 C3
+
+leaq 37708(%rbp,%rdi,2), %rsi
+. 349 0x12345678 9
+. 48 8D B4 7D 4C 93 00 00 C3
+
+leaq 39256(%rbp,%rax,8), %r8
+. 350 0x12345678 9
+. 4C 8D 84 C5 58 99 00 00 C3
+
+leaq 39256(%rbp,%rdi,8), %rdi
+. 351 0x12345678 9
+. 48 8D BC FD 58 99 00 00 C3
+
+leaq 45448(%rbp,%rdi,8), %rsi
+. 352 0x12345678 9
+. 48 8D B4 FD 88 B1 00 00 C3
+
+leaq (%rax,%rax), %rdx
+. 353 0x12345678 5
+. 48 8D 14 00 C3
+
+leaq (%rax,%rdx), %rax
+. 354 0x12345678 5
+. 48 8D 04 10 C3
+
+leaq (%rbp,%rax,2), %r13
+. 355 0x12345678 6
+. 4C 8D 6C 45 00 C3
+
+leaq (%rbp,%rax,2), %rax
+. 356 0x12345678 6
+. 48 8D 44 45 00 C3
+
+leaq (%rbp,%rax,2), %rcx
+. 357 0x12345678 6
+. 48 8D 4C 45 00 C3
+
+leaq (%rbp,%rax,2), %rdx
+. 358 0x12345678 6
+. 48 8D 54 45 00 C3
+
+leaq (%rbp,%rax), %rdx
+. 359 0x12345678 6
+. 48 8D 54 05 00 C3
+
+leaq (%rbp,%rdx,2), %rdx
+. 360 0x12345678 6
+. 48 8D 54 55 00 C3
+
+leaq (%rdx,%rsi), %rdx
+. 361 0x12345678 5
+. 48 8D 14 32 C3
+
+movb $0, 2112(%rsp,%rax)
+. 362 0x12345678 9
+. C6 84 04 40 08 00 00 00 C3
+
+movb $0, 32(%rsp,%rax)
+. 363 0x12345678 6
+. C6 44 04 20 00 C3
+
+movb $0, 37450(%rax,%rcx)
+. 364 0x12345678 9
+. C6 84 08 4A 92 00 00 00 C3
+
+movb $1, 2112(%rsp,%rax)
+. 365 0x12345678 9
+. C6 84 04 40 08 00 00 01 C3
+
+movb $1, 32(%rsp,%rcx)
+. 366 0x12345678 6
+. C6 44 0C 20 01 C3
+
+movb $15, 37450(%rax,%rcx)
+. 367 0x12345678 9
+. C6 84 08 4A 92 00 00 0F C3
+
+movb $15, 37708(%rax,%rdx)
+. 368 0x12345678 9
+. C6 84 10 4C 93 00 00 0F C3
+
+movb %al, 1(%rsp)
+. 369 0x12345678 5
+. 88 44 24 01 C3
+
+movb %al, 384(%rdi,%rdx)
+. 370 0x12345678 8
+. 88 84 17 80 01 00 00 C3
+
+movb %al, (%rcx,%rdx)
+. 371 0x12345678 4
+. 88 04 11 C3
+
+movb %al, (%rdx)
+. 372 0x12345678 3
+. 88 02 C3
+
+movb %cl, 32(%rsp)
+. 373 0x12345678 5
+. 88 4C 24 20 C3
+
+movb %cl, (%rsp)
+. 374 0x12345678 4
+. 88 0C 24 C3
+
+movb %dil, 32(%rsp,%rax)
+. 375 0x12345678 6
+. 40 88 7C 04 20 C3
+
+movb %dl, 1704(%rbp,%rax)
+. 376 0x12345678 8
+. 88 94 05 A8 06 00 00 C3
+
+movb %dl, 32(%rsp,%rax)
+. 377 0x12345678 5
+. 88 54 04 20 C3
+
+movb %dl, (%rax,%rsi)
+. 378 0x12345678 4
+. 88 14 30 C3
+
+movb %r8b, 19706(%rbp,%rax)
+. 379 0x12345678 9
+. 44 88 84 05 FA 4C 00 00 C3
+
+movb %r9b, (%rsp,%rax)
+. 380 0x12345678 5
+. 44 88 0C 04 C3
+
+mov %eax, %eax
+. 381 0x12345678 3
+. 89 C0 C3
+
+mov %edi, %eax
+. 382 0x12345678 3
+. 89 F8 C3
+
+mov %esi, %eax
+. 383 0x12345678 3
+. 89 F0 C3
+
+movl $0, 1056(%rsp,%rax,4)
+. 384 0x12345678 12
+. C7 84 84 20 04 00 00 00 00 00 00 C3
+
+movl $0, 116(%rdi)
+. 385 0x12345678 8
+. C7 47 74 00 00 00 00 C3
+
+movl $0, 124(%rdi)
+. 386 0x12345678 8
+. C7 47 7C 00 00 00 00 C3
+
+movl $0, 12(%rsp)
+. 387 0x12345678 9
+. C7 44 24 0C 00 00 00 00 C3
+
+movl $0, 24(%rsp)
+. 388 0x12345678 9
+. C7 44 24 18 00 00 00 00 C3
+
+movl $0, 28(%rsp)
+. 389 0x12345678 9
+. C7 44 24 1C 00 00 00 00 C3
+
+movl $0, 45448(%rbp,%rax,4)
+. 390 0x12345678 12
+. C7 84 85 88 B1 00 00 00 00 00 00 C3
+
+movl $0, 48(%rsp,%rax,4)
+. 391 0x12345678 9
+. C7 44 84 30 00 00 00 00 C3
+
+movl $0, 640(%rdi)
+. 392 0x12345678 11
+. C7 87 80 02 00 00 00 00 00 00 C3
+
+movl $0, 644(%rdi)
+. 393 0x12345678 11
+. C7 87 84 02 00 00 00 00 00 00 C3
+
+movl $0, 672(%rbx,%rax,4)
+. 394 0x12345678 12
+. C7 84 83 A0 02 00 00 00 00 00 00 C3
+
+movl $0, 8(%rsp)
+. 395 0x12345678 9
+. C7 44 24 08 00 00 00 00 C3
+
+movl $0, %eax
+. 396 0x12345678 6
+. B8 00 00 00 00 C3
+
+movl $0, %ebx
+. 397 0x12345678 6
+. BB 00 00 00 00 C3
+
+movl $0, %ecx
+. 398 0x12345678 6
+. B9 00 00 00 00 C3
+
+movl $0, %edi
+. 399 0x12345678 6
+. BF 00 00 00 00 C3
+
+movl $0, %edx
+. 400 0x12345678 6
+. BA 00 00 00 00 C3
+
+movl $0, %r12d
+. 401 0x12345678 7
+. 41 BC 00 00 00 00 C3
+
+movl $0, %r13d
+. 402 0x12345678 7
+. 41 BD 00 00 00 00 C3
+
+movl $0, %r8d
+. 403 0x12345678 7
+. 41 B8 00 00 00 00 C3
+
+movl $0, %r9d
+. 404 0x12345678 7
+. 41 B9 00 00 00 00 C3
+
+movl $0, (%rbp,%rax,4)
+. 405 0x12345678 9
+. C7 44 85 00 00 00 00 00 C3
+
+movl $0, (%rbx,%rax,4)
+. 406 0x12345678 8
+. C7 04 83 00 00 00 00 C3
+
+movl $1001, %edi
+. 407 0x12345678 6
+. BF E9 03 00 00 C3
+
+movl $1002, %edi
+. 408 0x12345678 6
+. BF EA 03 00 00 C3
+
+movl $1003, %edi
+. 409 0x12345678 6
+. BF EB 03 00 00 C3
+
+movl $1004, %edi
+. 410 0x12345678 6
+. BF EC 03 00 00 C3
+
+movl $1005, %edi
+. 411 0x12345678 6
+. BF ED 03 00 00 C3
+
+movl $1006, %edi
+. 412 0x12345678 6
+. BF EE 03 00 00 C3
+
+movl $1007, %edi
+. 413 0x12345678 6
+. BF EF 03 00 00 C3
+
+movl $100, %eax
+. 414 0x12345678 6
+. B8 64 00 00 00 C3
+
+movl $104, %esi
+. 415 0x12345678 6
+. BE 68 00 00 00 C3
+
+movl 1056(%rsp,%rax,4), %ecx
+. 416 0x12345678 8
+. 8B 8C 84 20 04 00 00 C3
+
+movl 1056(%rsp,%rax,4), %esi
+. 417 0x12345678 8
+. 8B B4 84 20 04 00 00 C3
+
+movl 1056(%rsp,%rdx,4), %eax
+. 418 0x12345678 8
+. 8B 84 94 20 04 00 00 C3
+
+movl 1088(%rsp,%rdx,4), %eax
+. 419 0x12345678 8
+. 8B 84 94 40 04 00 00 C3
+
+movl 1088(%rsp,%rsi,4), %eax
+. 420 0x12345678 8
+. 8B 84 B4 40 04 00 00 C3
+
+movl 108(%rbx), %r9d
+. 421 0x12345678 5
+. 44 8B 4B 6C C3
+
+movl 108(%rdi), %ebp
+. 422 0x12345678 4
+. 8B 6F 6C C3
+
+movl 108(%rdi), %edx
+. 423 0x12345678 4
+. 8B 57 6C C3
+
+movl $10, %edi
+. 424 0x12345678 6
+. BF 0A 00 00 00 C3
+
+movl $1, 12(%rsp)
+. 425 0x12345678 9
+. C7 44 24 0C 01 00 00 00 C3
+
+movl 112(%rsp), %eax
+. 426 0x12345678 5
+. 8B 44 24 70 C3
+
+movl 112(%rsp), %edi
+. 427 0x12345678 5
+. 8B 7C 24 70 C3
+
+movl $114, %esi
+. 428 0x12345678 6
+. BE 72 00 00 00 C3
+
+movl 116(%rbp), %eax
+. 429 0x12345678 4
+. 8B 45 74 C3
+
+movl 116(%rbp), %edx
+. 430 0x12345678 4
+. 8B 55 74 C3
+
+movl $1, 16(%rsp)
+. 431 0x12345678 9
+. C7 44 24 10 01 00 00 00 C3
+
+movl 124(%rbp), %eax
+. 432 0x12345678 4
+. 8B 45 7C C3
+
+movl 124(%rbx), %edx
+. 433 0x12345678 4
+. 8B 53 7C C3
+
+movl 124(%rbx), %r10d
+. 434 0x12345678 5
+. 44 8B 53 7C C3
+
+movl 124(%rdi), %r8d
+. 435 0x12345678 5
+. 44 8B 47 7C C3
+
+movl $1, 24(%rsp)
+. 436 0x12345678 9
+. C7 44 24 18 01 00 00 00 C3
+
+movl 12(%rsp), %eax
+. 437 0x12345678 5
+. 8B 44 24 0C C3
+
+movl 12(%rsp), %edx
+. 438 0x12345678 5
+. 8B 54 24 0C C3
+
+movl 12(%rsp), %r8d
+. 439 0x12345678 6
+. 44 8B 44 24 0C C3
+
+movl 1360(%rsp), %eax
+. 440 0x12345678 8
+. 8B 84 24 50 05 00 00 C3
+
+movl $144, %esi
+. 441 0x12345678 6
+. BE 90 00 00 00 C3
+
+movl $-1, 48(%rbx)
+. 442 0x12345678 8
+. C7 43 30 FF FF FF FF C3
+
+movl $15, %r8d
+. 443 0x12345678 7
+. 41 B8 0F 00 00 00 C3
+
+movl 16(%rsp), %edx
+. 444 0x12345678 5
+. 8B 54 24 10 C3
+
+movl 16(%rsp,%rax,4), %r14d
+. 445 0x12345678 6
+. 44 8B 74 84 10 C3
+
+movl $17, %ecx
+. 446 0x12345678 6
+. B9 11 00 00 00 C3
+
+movl $1, %eax
+. 447 0x12345678 6
+. B8 01 00 00 00 C3
+
+movl $-1, %ebp
+. 448 0x12345678 6
+. BD FF FF FF FF C3
+
+movl $1, %ebx
+. 449 0x12345678 6
+. BB 01 00 00 00 C3
+
+movl $-1, %ecx
+. 450 0x12345678 6
+. B9 FF FF FF FF C3
+
+movl $1, %edi
+. 451 0x12345678 6
+. BF 01 00 00 00 C3
+
+movl $-1, %edx
+. 452 0x12345678 6
+. BA FF FF FF FF C3
+
+movl $1, %edx
+. 453 0x12345678 6
+. BA 01 00 00 00 C3
+
+movl $1, %esi
+. 454 0x12345678 6
+. BE 01 00 00 00 C3
+
+movl $1, %r14d
+. 455 0x12345678 7
+. 41 BE 01 00 00 00 C3
+
+movl $1, %r8d
+. 456 0x12345678 7
+. 41 B8 01 00 00 00 C3
+
+movl $1, %r9d
+. 457 0x12345678 7
+. 41 B9 01 00 00 00 C3
+
+movl $-2097153, %esi
+. 458 0x12345678 6
+. BE FF FF DF FF C3
+
+movl 20(%rsp), %eax
+. 459 0x12345678 5
+. 8B 44 24 14 C3
+
+movl 20(%rsp), %ecx
+. 460 0x12345678 5
+. 8B 4C 24 14 C3
+
+movl 20(%rsp), %edx
+. 461 0x12345678 5
+. 8B 54 24 14 C3
+
+movl 20(%rsp), %esi
+. 462 0x12345678 5
+. 8B 74 24 14 C3
+
+movl 20(%rsp), %r11d
+. 463 0x12345678 6
+. 44 8B 5C 24 14 C3
+
+movl 20(%rsp), %r12d
+. 464 0x12345678 6
+. 44 8B 64 24 14 C3
+
+movl 20(%rsp), %r8d
+. 465 0x12345678 6
+. 44 8B 44 24 14 C3
+
+movl 20(%rsp), %r9d
+. 466 0x12345678 6
+. 44 8B 4C 24 14 C3
+
+movl 2368(%rsp,%rax,4), %eax
+. 467 0x12345678 8
+. 8B 84 84 40 09 00 00 C3
+
+movl 2368(%rsp,%rax,4), %edx
+. 468 0x12345678 8
+. 8B 94 84 40 09 00 00 C3
+
+movl 2368(%rsp,%rax,4), %r13d
+. 469 0x12345678 9
+. 44 8B AC 84 40 09 00 00 C3
+
+movl 2368(%rsp,%rax,4), %r8d
+. 470 0x12345678 9
+. 44 8B 84 84 40 09 00 00 C3
+
+movl $23, %esi
+. 471 0x12345678 6
+. BE 17 00 00 00 C3
+
+movl $24, %r8d
+. 472 0x12345678 7
+. 41 B8 18 00 00 00 C3
+
+movl 24(%rsp), %ecx
+. 473 0x12345678 5
+. 8B 4C 24 18 C3
+
+movl 24(%rsp), %edi
+. 474 0x12345678 5
+. 8B 7C 24 18 C3
+
+movl 24(%rsp), %r8d
+. 475 0x12345678 6
+. 44 8B 44 24 18 C3
+
+movl $27, %edx
+. 476 0x12345678 6
+. BA 1B 00 00 00 C3
+
+movl $2863311531, %edx
+. 477 0x12345678 6
+. BA AB AA AA AA C3
+
+movl 28(%rsp), %ecx
+. 478 0x12345678 5
+. 8B 4C 24 1C C3
+
+movl 28(%rsp), %edi
+. 479 0x12345678 5
+. 8B 7C 24 1C C3
+
+movl 28(%rsp), %edx
+. 480 0x12345678 5
+. 8B 54 24 1C C3
+
+movl 28(%rsp), %r12d
+. 481 0x12345678 6
+. 44 8B 64 24 1C C3
+
+movl $2, %r10d
+. 482 0x12345678 7
+. 41 BA 02 00 00 00 C3
+
+movl $2, %r14d
+. 483 0x12345678 7
+. 41 BE 02 00 00 00 C3
+
+movl $2, %r9d
+. 484 0x12345678 7
+. 41 B9 02 00 00 00 C3
+
+movl $2, (%rsp)
+. 485 0x12345678 8
+. C7 04 24 02 00 00 00 C3
+
+movl $3001, %edi
+. 486 0x12345678 6
+. BF B9 0B 00 00 C3
+
+movl $3002, %edi
+. 487 0x12345678 6
+. BF BA 0B 00 00 C3
+
+movl $3003, %edi
+. 488 0x12345678 6
+. BF BB 0B 00 00 C3
+
+movl $3004, %edi
+. 489 0x12345678 6
+. BF BC 0B 00 00 C3
+
+movl $3005, %edi
+. 490 0x12345678 6
+. BF BD 0B 00 00 C3
+
+movl $3006, %edi
+. 491 0x12345678 6
+. BF BE 0B 00 00 C3
+
+movl $3007, %edi
+. 492 0x12345678 6
+. BF BF 0B 00 00 C3
+
+movl $32, %r13d
+. 493 0x12345678 7
+. 41 BD 20 00 00 00 C3
+
+movl 32(%rsp), %eax
+. 494 0x12345678 5
+. 8B 44 24 20 C3
+
+movl 32(%rsp), %r13d
+. 495 0x12345678 6
+. 44 8B 6C 24 20 C3
+
+movl $33, %edx
+. 496 0x12345678 6
+. BA 21 00 00 00 C3
+
+movl 36(%rsp), %eax
+. 497 0x12345678 5
+. 8B 44 24 24 C3
+
+movl 36(%rsp), %ebx
+. 498 0x12345678 5
+. 8B 5C 24 24 C3
+
+movl 36(%rsp), %ecx
+. 499 0x12345678 5
+. 8B 4C 24 24 C3
+
+movl 36(%rsp), %edx
+. 500 0x12345678 5
+. 8B 54 24 24 C3
+
+movl 36(%rsp), %esi
+. 501 0x12345678 5
+. 8B 74 24 24 C3
+
+movl 36(%rsp), %r8d
+. 502 0x12345678 6
+. 44 8B 44 24 24 C3
+
+movl $38, %esi
+. 503 0x12345678 6
+. BE 26 00 00 00 C3
+
+movl 39256(%rbp,%rax,4), %r9d
+. 504 0x12345678 9
+. 44 8B 8C 85 58 99 00 00 C3
+
+movl $3, %r12d
+. 505 0x12345678 7
+. 41 BC 03 00 00 00 C3
+
+movl $3, %r14d
+. 506 0x12345678 7
+. 41 BE 03 00 00 00 C3
+
+movl $3, %r8d
+. 507 0x12345678 7
+. 41 B8 03 00 00 00 C3
+
+movl 416(%rsp,%rax,4), %r13d
+. 508 0x12345678 9
+. 44 8B AC 84 A0 01 00 00 C3
+
+movl 48(%rbx), %edi
+. 509 0x12345678 4
+. 8B 7B 30 C3
+
+movl 48(%rsp), %eax
+. 510 0x12345678 5
+. 8B 44 24 30 C3
+
+movl 48(%rsp), %edx
+. 511 0x12345678 5
+. 8B 54 24 30 C3
+
+movl 48(%rsp,%rax,4), %edx
+. 512 0x12345678 5
+. 8B 54 84 30 C3
+
+movl 496(%rsp,%rax,4), %edx
+. 513 0x12345678 8
+. 8B 94 84 F0 01 00 00 C3
+
+movl $49, %esi
+. 514 0x12345678 6
+. BE 31 00 00 00 C3
+
+movl $4, %r14d
+. 515 0x12345678 7
+. 41 BE 04 00 00 00 C3
+
+movl 4(%rbp,%rax,4), %eax
+. 516 0x12345678 5
+. 8B 44 85 04 C3
+
+movl 4(%rbp,%rdx,4), %eax
+. 517 0x12345678 5
+. 8B 44 95 04 C3
+
+movl 51640(%rax), %ecx
+. 518 0x12345678 7
+. 8B 88 B8 C9 00 00 C3
+
+movl 51644(%rax), %esi
+. 519 0x12345678 7
+. 8B B0 BC C9 00 00 C3
+
+movl 51648(%rax), %edi
+. 520 0x12345678 7
+. 8B B8 C0 C9 00 00 C3
+
+movl 52(%rsp), %eax
+. 521 0x12345678 5
+. 8B 44 24 34 C3
+
+movl 52(%rsp), %edx
+. 522 0x12345678 5
+. 8B 54 24 34 C3
+
+movl $53, %edx
+. 523 0x12345678 6
+. BA 35 00 00 00 C3
+
+movl $56, %esi
+. 524 0x12345678 6
+. BE 38 00 00 00 C3
+
+movl 56(%rsp), %eax
+. 525 0x12345678 5
+. 8B 44 24 38 C3
+
+movl 644(%r11), %eax
+. 526 0x12345678 8
+. 41 8B 83 84 02 00 00 C3
+
+movl 644(%rdi), %eax
+. 527 0x12345678 7
+. 8B 87 84 02 00 00 C3
+
+movl 644(%rsi), %eax
+. 528 0x12345678 7
+. 8B 86 84 02 00 00 C3
+
+movl 644(%rsi), %edx
+. 529 0x12345678 7
+. 8B 96 84 02 00 00 C3
+
+movl 648(%rbx), %ecx
+. 530 0x12345678 7
+. 8B 8B 88 02 00 00 C3
+
+movl 648(%rbx), %esi
+. 531 0x12345678 7
+. 8B B3 88 02 00 00 C3
+
+movl 648(%rdi), %edx
+. 532 0x12345678 7
+. 8B 97 88 02 00 00 C3
+
+movl 64(%rsp), %eax
+. 533 0x12345678 5
+. 8B 44 24 40 C3
+
+movl 64(%rsp), %r8d
+. 534 0x12345678 6
+. 44 8B 44 24 40 C3
+
+movl 64(%rsp,%rsi,4), %eax
+. 535 0x12345678 5
+. 8B 44 B4 40 C3
+
+movl 652(%rbx), %edx
+. 536 0x12345678 7
+. 8B 93 8C 02 00 00 C3
+
+movl 652(%rbx), %esi
+. 537 0x12345678 7
+. 8B B3 8C 02 00 00 C3
+
+movl 652(%rbx), %r8d
+. 538 0x12345678 8
+. 44 8B 83 8C 02 00 00 C3
+
+movl 652(%rdi), %eax
+. 539 0x12345678 7
+. 8B 87 8C 02 00 00 C3
+
+movl $65536, %ebx
+. 540 0x12345678 6
+. BB 00 00 01 00 C3
+
+movl 656(%rdi), %r13d
+. 541 0x12345678 8
+. 44 8B AF 90 02 00 00 C3
+
+movl $65, %esi
+. 542 0x12345678 6
+. BE 41 00 00 00 C3
+
+movl 660(%rbx), %edx
+. 543 0x12345678 7
+. 8B 93 94 02 00 00 C3
+
+movl 668(%rbp), %edx
+. 544 0x12345678 7
+. 8B 95 9C 02 00 00 C3
+
+movl 668(%rbp), %r12d
+. 545 0x12345678 8
+. 44 8B A5 9C 02 00 00 C3
+
+movl 668(%rdi), %ecx
+. 546 0x12345678 7
+. 8B 8F 9C 02 00 00 C3
+
+movl $66, %esi
+. 547 0x12345678 6
+. BE 42 00 00 00 C3
+
+movl 68(%rsp), %eax
+. 548 0x12345678 5
+. 8B 44 24 44 C3
+
+movl 68(%rsp), %esi
+. 549 0x12345678 5
+. 8B 74 24 44 C3
+
+###movl 68(%rsp), %r8d
+###. 550 0x12345678 5
+###. 44 8B 44 24 C3
+
+movl $69, %esi
+. 551 0x12345678 6
+. BE 45 00 00 00 C3
+
+movl 72(%rsp), %eax
+. 552 0x12345678 5
+. 8B 44 24 48 C3
+
+movl 72(%rsp), %esi
+. 553 0x12345678 5
+. 8B 74 24 48 C3
+
+movl $80, %esi
+. 554 0x12345678 6
+. BE 50 00 00 00 C3
+
+movl 80(%rsp), %eax
+. 555 0x12345678 5
+. 8B 44 24 50 C3
+
+movl 80(%rsp), %edi
+. 556 0x12345678 5
+. 8B 7C 24 50 C3
+
+movl $83, %esi
+. 557 0x12345678 6
+. BE 53 00 00 00 C3
+
+movl 84(%rsp), %eax
+. 558 0x12345678 5
+. 8B 44 24 54 C3
+
+movl 84(%rsp), %ecx
+. 559 0x12345678 5
+. 8B 4C 24 54 C3
+
+movl 84(%rsp), %edi
+. 560 0x12345678 5
+. 8B 7C 24 54 C3
+
+movl 88(%rdi), %ecx
+. 561 0x12345678 4
+. 8B 4F 58 C3
+
+movl 88(%rsp), %eax
+. 562 0x12345678 5
+. 8B 44 24 58 C3
+
+movl 88(%rsp), %ecx
+. 563 0x12345678 5
+. 8B 4C 24 58 C3
+
+movl 896(%rsp,%rax,4), %r15d
+. 564 0x12345678 9
+. 44 8B BC 84 80 03 00 00 C3
+
+movl $89, %esi
+. 565 0x12345678 6
+. BE 59 00 00 00 C3
+
+movl $8, %r8d
+. 566 0x12345678 7
+. 41 B8 08 00 00 00 C3
+
+movl $8, %r9d
+. 567 0x12345678 7
+. 41 B9 08 00 00 00 C3
+
+movl 8(%rsp), %edx
+. 568 0x12345678 5
+. 8B 54 24 08 C3
+
+movl $90, %esi
+. 569 0x12345678 6
+. BE 5A 00 00 00 C3
+
+movl 96(%rsp,%rax,4), %r13d
+. 570 0x12345678 6
+. 44 8B 6C 84 60 C3
+
+movl $999999999, %ecx
+. 571 0x12345678 6
+. B9 FF C9 9A 3B C3
+
+movl %eax, 1056(%rsp,%rdx,4)
+. 572 0x12345678 8
+. 89 84 94 20 04 00 00 C3
+
+movl %eax, 1088(%rsp,%rsi,4)
+. 573 0x12345678 8
+. 89 84 B4 40 04 00 00 C3
+
+movl %eax, 12(%rsp)
+. 574 0x12345678 5
+. 89 44 24 0C C3
+
+movl %eax, -16(%rsi,%rdx,4)
+. 575 0x12345678 5
+. 89 44 96 F0 C3
+
+movl %eax, 16(%rsp)
+. 576 0x12345678 5
+. 89 44 24 10 C3
+
+movl %eax, 20(%rsp)
+. 577 0x12345678 5
+. 89 44 24 14 C3
+
+movl %eax, 2368(%rsp,%rcx,4)
+. 578 0x12345678 8
+. 89 84 8C 40 09 00 00 C3
+
+movl %eax, 28(%rsp)
+. 579 0x12345678 5
+. 89 44 24 1C C3
+
+movl %eax, 32(%rsp,%rdx,4)
+. 580 0x12345678 5
+. 89 44 94 20 C3
+
+movl %eax, 48(%rsp)
+. 581 0x12345678 5
+. 89 44 24 30 C3
+
+movl %eax, 496(%rsp,%rdx,4)
+. 582 0x12345678 8
+. 89 84 94 F0 01 00 00 C3
+
+movl %eax, -4(%rsi,%rdx,4)
+. 583 0x12345678 5
+. 89 44 96 FC C3
+
+movl %eax, 51640(%rsi)
+. 584 0x12345678 7
+. 89 86 B8 C9 00 00 C3
+
+movl %eax, 51644(%rsi)
+. 585 0x12345678 7
+. 89 86 BC C9 00 00 C3
+
+movl %eax, 51648(%rsi)
+. 586 0x12345678 7
+. 89 86 C0 C9 00 00 C3
+
+movl %eax, 52(%rsp)
+. 587 0x12345678 5
+. 89 44 24 34 C3
+
+movl %eax, 56(%rsp)
+. 588 0x12345678 5
+. 89 44 24 38 C3
+
+movl %eax, 644(%r11)
+. 589 0x12345678 8
+. 41 89 83 84 02 00 00 C3
+
+movl %eax, 644(%rdi)
+. 590 0x12345678 7
+. 89 87 84 02 00 00 C3
+
+movl %eax, 644(%rsi)
+. 591 0x12345678 7
+. 89 86 84 02 00 00 C3
+
+movl %eax, 64(%rsp,%rcx,4)
+. 592 0x12345678 5
+. 89 44 8C 40 C3
+
+movl %eax, 64(%rsp,%rsi,4)
+. 593 0x12345678 5
+. 89 44 B4 40 C3
+
+movl %eax, 652(%rdi)
+. 594 0x12345678 7
+. 89 87 8C 02 00 00 C3
+
+movl %eax, 72(%rsp)
+. 595 0x12345678 5
+. 89 44 24 48 C3
+
+movl %eax, 88(%rsp)
+. 596 0x12345678 5
+. 89 44 24 58 C3
+
+movl %eax, 896(%rsp,%rdx,4)
+. 597 0x12345678 8
+. 89 84 94 80 03 00 00 C3
+
+movl %eax, 8(%rsp)
+. 598 0x12345678 5
+. 89 44 24 08 C3
+
+movl %eax, 96(%rsp)
+. 599 0x12345678 5
+. 89 44 24 60 C3
+
+movl %eax, 96(%rsp,%rdx,4)
+. 600 0x12345678 5
+. 89 44 94 60 C3
+
+movl %eax, %ecx
+. 601 0x12345678 3
+. 89 C1 C3
+
+movl %eax, %edi
+. 602 0x12345678 3
+. 89 C7 C3
+
+movl %eax, %edx
+. 603 0x12345678 3
+. 89 C2 C3
+
+movl %eax, %esi
+. 604 0x12345678 3
+. 89 C6 C3
+
+movl %eax, %r15d
+. 605 0x12345678 4
+. 41 89 C7 C3
+
+movl %eax, (%rbp,%rcx,4)
+. 606 0x12345678 5
+. 89 44 8D 00 C3
+
+movl %eax, (%rbp,%rdx,4)
+. 607 0x12345678 5
+. 89 44 95 00 C3
+
+movl %eax, (%rbx,%rcx,4)
+. 608 0x12345678 4
+. 89 04 8B C3
+
+movl %eax, (%rbx,%rsi,4)
+. 609 0x12345678 4
+. 89 04 B3 C3
+
+movl %eax, (%rdi,%rdx,4)
+. 610 0x12345678 4
+. 89 04 97 C3
+
+movl %ebp, %eax
+. 611 0x12345678 3
+. 89 E8 C3
+
+movl %ebp, %ecx
+. 612 0x12345678 3
+. 89 E9 C3
+
+movl %ebp, %esi
+. 613 0x12345678 3
+. 89 EE C3
+
+movl %ebp, %r12d
+. 614 0x12345678 4
+. 41 89 EC C3
+
+movl %ebp, %r8d
+. 615 0x12345678 4
+. 41 89 E8 C3
+
+movl %ebx, 2368(%rsp,%rax,4)
+. 616 0x12345678 8
+. 89 9C 84 40 09 00 00 C3
+
+movl %ebx, %eax
+. 617 0x12345678 3
+. 89 D8 C3
+
+movl %ebx, %edx
+. 618 0x12345678 3
+. 89 DA C3
+
+movl %ebx, %esi
+. 619 0x12345678 3
+. 89 DE C3
+
+movl %ebx, %r12d
+. 620 0x12345678 4
+. 41 89 DC C3
+
+movl %ebx, %r8d
+. 621 0x12345678 4
+. 41 89 D8 C3
+
+movl %ebx, (%rdi,%rax,4)
+. 622 0x12345678 4
+. 89 1C 87 C3
+
+movl %ecx, 16(%rsp)
+. 623 0x12345678 5
+. 89 4C 24 10 C3
+
+movl %ecx, 16(%rsp,%rax,4)
+. 624 0x12345678 5
+. 89 4C 84 10 C3
+
+movl %ecx, 24(%rsp)
+. 625 0x12345678 5
+. 89 4C 24 18 C3
+
+movl %ecx, 28(%rsp)
+. 626 0x12345678 5
+. 89 4C 24 1C C3
+
+movl %ecx, 36(%rsp)
+. 627 0x12345678 5
+. 89 4C 24 24 C3
+
+movl %ecx, 80(%rsp)
+. 628 0x12345678 5
+. 89 4C 24 50 C3
+
+movl %ecx, 84(%rsp)
+. 629 0x12345678 5
+. 89 4C 24 54 C3
+
+movl %ecx, %eax
+. 630 0x12345678 3
+. 89 C8 C3
+
+movl %ecx, %ebx
+. 631 0x12345678 3
+. 89 CB C3
+
+movl %ecx, %edi
+. 632 0x12345678 3
+. 89 CF C3
+
+movl %ecx, %edx
+. 633 0x12345678 3
+. 89 CA C3
+
+movl %ecx, %r12d
+. 634 0x12345678 4
+. 41 89 CC C3
+
+movl %ecx, %r13d
+. 635 0x12345678 4
+. 41 89 CD C3
+
+movl %ecx, %r8d
+. 636 0x12345678 4
+. 41 89 C8 C3
+
+movl %ecx, (%r8,%rdx,4)
+. 637 0x12345678 5
+. 41 89 0C 90 C3
+
+movl %ecx, (%rbx,%rdx,4)
+. 638 0x12345678 4
+. 89 0C 93 C3
+
+movl %edi, 64(%rsp)
+. 639 0x12345678 5
+. 89 7C 24 40 C3
+
+movl %edi, 68(%rsp)
+. 640 0x12345678 5
+. 89 7C 24 44 C3
+
+movl %edi, 84(%rsp)
+. 641 0x12345678 5
+. 89 7C 24 54 C3
+
+movl %edi, 88(%rsp)
+. 642 0x12345678 5
+. 89 7C 24 58 C3
+
+movl %edi, %eax
+. 643 0x12345678 3
+. 89 F8 C3
+
+movl %edi, %ecx
+. 644 0x12345678 3
+. 89 F9 C3
+
+movl %edi, %edx
+. 645 0x12345678 3
+. 89 FA C3
+
+movl %edi, %r10d
+. 646 0x12345678 4
+. 41 89 FA C3
+
+movl %edi, %r11d
+. 647 0x12345678 4
+. 41 89 FB C3
+
+movl %edi, (%rsi,%rax,4)
+. 648 0x12345678 4
+. 89 3C 86 C3
+
+movl %edx, 1088(%rsp,%rcx,4)
+. 649 0x12345678 8
+. 89 94 8C 40 04 00 00 C3
+
+movl %edx, 12(%rsp)
+. 650 0x12345678 5
+. 89 54 24 0C C3
+
+movl %edx, 16(%rsp)
+. 651 0x12345678 5
+. 89 54 24 10 C3
+
+movl %edx, 20(%rsp)
+. 652 0x12345678 5
+. 89 54 24 14 C3
+
+movl %edx, 416(%rsp)
+. 653 0x12345678 8
+. 89 94 24 A0 01 00 00 C3
+
+movl %edx, 48(%rbx)
+. 654 0x12345678 4
+. 89 53 30 C3
+
+movl %edx, 496(%rsp,%rax,4)
+. 655 0x12345678 8
+. 89 94 84 F0 01 00 00 C3
+
+movl %edx, 52(%rsp)
+. 656 0x12345678 5
+. 89 54 24 34 C3
+
+movl %edx, 56(%rsp)
+. 657 0x12345678 5
+. 89 54 24 38 C3
+
+movl %edx, 644(%rsi)
+. 658 0x12345678 7
+. 89 96 84 02 00 00 C3
+
+movl %edx, 648(%rdi)
+. 659 0x12345678 7
+. 89 97 88 02 00 00 C3
+
+movl %edx, 96(%rsp,%rax,4)
+. 660 0x12345678 5
+. 89 54 84 60 C3
+
+movl %edx, %eax
+. 661 0x12345678 3
+. 89 D0 C3
+
+movl %edx, %ebp
+. 662 0x12345678 3
+. 89 D5 C3
+
+movl %edx, %ebx
+. 663 0x12345678 3
+. 89 D3 C3
+
+movl %edx, %ecx
+. 664 0x12345678 3
+. 89 D1 C3
+
+movl %edx, %edi
+. 665 0x12345678 3
+. 89 D7 C3
+
+movl %edx, %esi
+. 666 0x12345678 3
+. 89 D6 C3
+
+movl %edx, %r12d
+. 667 0x12345678 4
+. 41 89 D4 C3
+
+movl %edx, (%r15,%rax,4)
+. 668 0x12345678 5
+. 41 89 14 87 C3
+
+movl %esi, 1056(%rsp,%rax,4)
+. 669 0x12345678 8
+. 89 B4 84 20 04 00 00 C3
+
+movl %esi, 416(%rsp,%rax,4)
+. 670 0x12345678 8
+. 89 B4 84 A0 01 00 00 C3
+
+movl %esi, 64(%rsp)
+. 671 0x12345678 5
+. 89 74 24 40 C3
+
+movl %esi, 68(%rsp)
+. 672 0x12345678 5
+. 89 74 24 44 C3
+
+movl %esi, %eax
+. 673 0x12345678 3
+. 89 F0 C3
+
+movl %esi, %ebp
+. 674 0x12345678 3
+. 89 F5 C3
+
+movl %esi, %ebx
+. 675 0x12345678 3
+. 89 F3 C3
+
+movl %esi, %ecx
+. 676 0x12345678 3
+. 89 F1 C3
+
+movl %esi, %edx
+. 677 0x12345678 3
+. 89 F2 C3
+
+movl %esi, %r8d
+. 678 0x12345678 4
+. 41 89 F0 C3
+
+movl %esi, (%rbx,%rdx,4)
+. 679 0x12345678 4
+. 89 34 93 C3
+
+movl 12345(,%rax,4), %r12d
+. 680 0x12345678 9
+. 44 8B 24 85 39 30 00 00 C3
+
+movl $0x12345678, %esi
+. 681 0x12345678 6
+. BE 78 56 34 12 C3
+
+movl %r10d, %ecx
+. 682 0x12345678 4
+. 44 89 D1 C3
+
+movl %r10d, %r11d
+. 683 0x12345678 4
+. 45 89 D3 C3
+
+movl %r10d, %r9d
+. 684 0x12345678 4
+. 45 89 D1 C3
+
+movl (%r10,%rax,4), %r8d
+. 685 0x12345678 5
+. 45 8B 04 82 C3
+
+movl %r12d, 20(%rsp)
+. 686 0x12345678 6
+. 44 89 64 24 14 C3
+
+movl %r12d, 28(%rsp)
+. 687 0x12345678 6
+. 44 89 64 24 1C C3
+
+movl %r12d, %eax
+. 688 0x12345678 4
+. 44 89 E0 C3
+
+movl %r12d, %ecx
+. 689 0x12345678 4
+. 44 89 E1 C3
+
+movl %r12d, %edi
+. 690 0x12345678 4
+. 44 89 E7 C3
+
+movl %r12d, %edx
+. 691 0x12345678 4
+. 44 89 E2 C3
+
+movl %r12d, %esi
+. 692 0x12345678 4
+. 44 89 E6 C3
+
+movl %r12d, %r10d
+. 693 0x12345678 4
+. 45 89 E2 C3
+
+movl %r12d, %r8d
+. 694 0x12345678 4
+. 45 89 E0 C3
+
+movl %r12d, (%rbp,%rax,4)
+. 695 0x12345678 6
+. 44 89 64 85 00 C3
+
+movl (%r12,%rax,4), %ecx
+. 696 0x12345678 5
+. 41 8B 0C 84 C3
+
+movl %r13d, 416(%rsp,%rax,4)
+. 697 0x12345678 9
+. 44 89 AC 84 A0 01 00 00 C3
+
+movl %r13d, 48(%rsp)
+. 698 0x12345678 6
+. 44 89 6C 24 30 C3
+
+movl %r13d, 52(%rsp)
+. 699 0x12345678 6
+. 44 89 6C 24 34 C3
+
+movl %r13d, %eax
+. 700 0x12345678 4
+. 44 89 E8 C3
+
+movl %r13d, %ebp
+. 701 0x12345678 4
+. 44 89 ED C3
+
+movl %r13d, %ebx
+. 702 0x12345678 4
+. 44 89 EB C3
+
+movl %r13d, %edx
+. 703 0x12345678 4
+. 44 89 EA C3
+
+movl %r13d, %r10d
+. 704 0x12345678 4
+. 45 89 EA C3
+
+movl %r13d, %r11d
+. 705 0x12345678 4
+. 45 89 EB C3
+
+movl %r13d, %r12d
+. 706 0x12345678 4
+. 45 89 EC C3
+
+movl %r13d, %r8d
+. 707 0x12345678 4
+. 45 89 E8 C3
+
+movl %r13d, %r9d
+. 708 0x12345678 4
+. 45 89 E9 C3
+
+movl %r13d, (%rsp)
+. 709 0x12345678 5
+. 44 89 2C 24 C3
+
+movl %r14d, 16(%rsp,%rax,4)
+. 710 0x12345678 6
+. 44 89 74 84 10 C3
+
+movl %r14d, %eax
+. 711 0x12345678 4
+. 44 89 F0 C3
+
+movl %r14d, %ebp
+. 712 0x12345678 4
+. 44 89 F5 C3
+
+movl %r14d, %ebx
+. 713 0x12345678 4
+. 44 89 F3 C3
+
+movl %r14d, %edi
+. 714 0x12345678 4
+. 44 89 F7 C3
+
+movl %r14d, %edx
+. 715 0x12345678 4
+. 44 89 F2 C3
+
+movl %r14d, %esi
+. 716 0x12345678 4
+. 44 89 F6 C3
+
+movl %r14d, %r11d
+. 717 0x12345678 4
+. 45 89 F3 C3
+
+movl %r14d, %r8d
+. 718 0x12345678 4
+. 45 89 F0 C3
+
+movl %r14d, %r9d
+. 719 0x12345678 4
+. 45 89 F1 C3
+
+movl %r14d, (%rbp,%rax,4)
+. 720 0x12345678 6
+. 44 89 74 85 00 C3
+
+movl %r15d, 80(%rsp)
+. 721 0x12345678 6
+. 44 89 7C 24 50 C3
+
+movl %r15d, 84(%rsp)
+. 722 0x12345678 6
+. 44 89 7C 24 54 C3
+
+movl %r15d, 896(%rsp,%rax,4)
+. 723 0x12345678 9
+. 44 89 BC 84 80 03 00 00 C3
+
+movl %r15d, %ebp
+. 724 0x12345678 4
+. 44 89 FD C3
+
+movl %r15d, %esi
+. 725 0x12345678 4
+. 44 89 FE C3
+
+movl %r15d, %r14d
+. 726 0x12345678 4
+. 45 89 FE C3
+
+movl %r15d, %r8d
+. 727 0x12345678 4
+. 45 89 F8 C3
+
+movl %r15d, %r9d
+. 728 0x12345678 4
+. 45 89 F9 C3
+
+movl (%r15,%rax,4), %eax
+. 729 0x12345678 5
+. 41 8B 04 87 C3
+
+movl (%r15,%rax,4), %edx
+. 730 0x12345678 5
+. 41 8B 14 87 C3
+
+movl (%r15,%rax,4), %r8d
+. 731 0x12345678 5
+. 45 8B 04 87 C3
+
+movl %r8d, 12(%rsp)
+. 732 0x12345678 6
+. 44 89 44 24 0C C3
+
+movl %r8d, 20(%rsp)
+. 733 0x12345678 6
+. 44 89 44 24 14 C3
+
+movl %r8d, 2368(%rsp,%rax,4)
+. 734 0x12345678 9
+. 44 89 84 84 40 09 00 00 C3
+
+movl %r8d, 32(%rsp)
+. 735 0x12345678 6
+. 44 89 44 24 20 C3
+
+movl %r8d, 36(%rsp)
+. 736 0x12345678 6
+. 44 89 44 24 24 C3
+
+movl %r8d, 668(%rbx)
+. 737 0x12345678 8
+. 44 89 83 9C 02 00 00 C3
+
+movl %r8d, 68(%rsp)
+. 738 0x12345678 6
+. 44 89 44 24 44 C3
+
+movl %r8d, 72(%rsp)
+. 739 0x12345678 6
+. 44 89 44 24 48 C3
+
+movl %r8d, 896(%rsp)
+. 740 0x12345678 9
+. 44 89 84 24 80 03 00 00 C3
+
+movl %r8d, %edx
+. 741 0x12345678 4
+. 44 89 C2 C3
+
+movl %r8d, %esi
+. 742 0x12345678 4
+. 44 89 C6 C3
+
+movl (%r8,%rax,4), %ecx
+. 743 0x12345678 5
+. 41 8B 0C 80 C3
+
+movl (%r8,%rax,4), %r10d
+. 744 0x12345678 5
+. 45 8B 14 80 C3
+
+movl (%r8,%rax,4), %r8d
+. 745 0x12345678 5
+. 45 8B 04 80 C3
+
+movl %r9d, -16(%rsi,%rax,4)
+. 746 0x12345678 6
+. 44 89 4C 86 F0 C3
+
+movl %r9d, 28(%rsp)
+. 747 0x12345678 6
+. 44 89 4C 24 1C C3
+
+movl %r9d, 32(%rsp)
+. 748 0x12345678 6
+. 44 89 4C 24 20 C3
+
+movl %r9d, 496(%rsp)
+. 749 0x12345678 9
+. 44 89 8C 24 F0 01 00 00 C3
+
+movl %r9d, -4(%rsi,%rax,4)
+. 750 0x12345678 6
+. 44 89 4C 86 FC C3
+
+movl %r9d, %ebp
+. 751 0x12345678 4
+. 44 89 CD C3
+
+movl %r9d, %ecx
+. 752 0x12345678 4
+. 44 89 C9 C3
+
+movl %r9d, %edi
+. 753 0x12345678 4
+. 44 89 CF C3
+
+movl %r9d, %edx
+. 754 0x12345678 4
+. 44 89 CA C3
+
+movl %r9d, %r8d
+. 755 0x12345678 4
+. 45 89 C8 C3
+
+movl (%rbp,%rax,4), %eax
+. 756 0x12345678 5
+. 8B 44 85 00 C3
+
+movl (%rbp,%rax,4), %edx
+. 757 0x12345678 5
+. 8B 54 85 00 C3
+
+movl (%rbp,%rax,4), %r12d
+. 758 0x12345678 6
+. 44 8B 64 85 00 C3
+
+movl (%rbp,%rax,4), %r14d
+. 759 0x12345678 6
+. 44 8B 74 85 00 C3
+
+movl (%rbp,%rax), %eax
+. 760 0x12345678 5
+. 8B 44 05 00 C3
+
+movl (%rbp,%rax), %edx
+. 761 0x12345678 5
+. 8B 54 05 00 C3
+
+movl (%rbp,%rax), %r12d
+. 762 0x12345678 6
+. 44 8B 64 05 00 C3
+
+movl (%rbp,%rax), %r8d
+. 763 0x12345678 6
+. 44 8B 44 05 00 C3
+
+movl (%rbp,%rdx,4), %eax
+. 764 0x12345678 5
+. 8B 44 95 00 C3
+
+movl (%rbp,%rdx), %edx
+. 765 0x12345678 5
+. 8B 54 15 00 C3
+
+movl (%rbx,%rax,4), %edi
+. 766 0x12345678 4
+. 8B 3C 83 C3
+
+movl (%rbx,%rax,4), %edx
+. 767 0x12345678 4
+. 8B 14 83 C3
+
+movl (%rbx,%rcx,4), %esi
+. 768 0x12345678 4
+. 8B 34 8B C3
+
+movl (%rbx,%rdx,4), %eax
+. 769 0x12345678 4
+. 8B 04 93 C3
+
+movl (%rbx,%rsi,4), %ecx
+. 770 0x12345678 4
+. 8B 0C B3 C3
+
+movl (%rdx,%rax,4), %ecx
+. 771 0x12345678 4
+. 8B 0C 82 C3
+
+movl (%rsi,%rax,4), %r9d
+. 772 0x12345678 5
+. 44 8B 0C 86 C3
+
+movl (%rsi,%rdx,4), %eax
+. 773 0x12345678 4
+. 8B 04 96 C3
+
+movq 120(%rsp), %r9
+. 774 0x12345678 6
+. 4C 8B 4C 24 78 C3
+
+movq 120(%rsp), %rax
+. 775 0x12345678 6
+. 48 8B 44 24 78 C3
+
+movq 1368(%rsp), %rdi
+. 776 0x12345678 9
+. 48 8B BC 24 58 05 00 00 C3
+
+movq 1368(%rsp), %rsi
+. 777 0x12345678 9
+. 48 8B B4 24 58 05 00 00 C3
+
+movq 24(%rbx), %rdi
+. 778 0x12345678 5
+. 48 8B 7B 18 C3
+
+movq 24(%rsp), %rbp
+. 779 0x12345678 6
+. 48 8B 6C 24 18 C3
+
+movq 24(%rsp), %rbx
+. 780 0x12345678 6
+. 48 8B 5C 24 18 C3
+
+movq 24(%rsp), %rcx
+. 781 0x12345678 6
+. 48 8B 4C 24 18 C3
+
+movq 24(%rsp), %rdi
+. 782 0x12345678 6
+. 48 8B 7C 24 18 C3
+
+movq 24(%rsp), %rdx
+. 783 0x12345678 6
+. 48 8B 54 24 18 C3
+
+movq 24(%rsp), %rsi
+. 784 0x12345678 6
+. 48 8B 74 24 18 C3
+
+movq 32(%rbx), %rsi
+. 785 0x12345678 5
+. 48 8B 73 20 C3
+
+movq 32(%rsp), %rbp
+. 786 0x12345678 6
+. 48 8B 6C 24 20 C3
+
+movq 32(%rsp), %rdx
+. 787 0x12345678 6
+. 48 8B 54 24 20 C3
+
+movq 3456(%rsp), %rdx
+. 788 0x12345678 9
+. 48 8B 94 24 80 0D 00 00 C3
+
+movq 3456(%rsp), %rsi
+. 789 0x12345678 9
+. 48 8B B4 24 80 0D 00 00 C3
+
+movq 40(%rdi), %r15
+. 790 0x12345678 5
+. 4C 8B 7F 28 C3
+
+movq 40(%rsp), %r12
+. 791 0x12345678 6
+. 4C 8B 64 24 28 C3
+
+movq 40(%rsp), %r8
+. 792 0x12345678 6
+. 4C 8B 44 24 28 C3
+
+movq 40(%rsp), %rcx
+. 793 0x12345678 6
+. 48 8B 4C 24 28 C3
+
+movq 40(%rsp), %rdi
+. 794 0x12345678 6
+. 48 8B 7C 24 28 C3
+
+movq 40(%rsp), %rdx
+. 795 0x12345678 6
+. 48 8B 54 24 28 C3
+
+movq 40(%rsp), %rsi
+. 796 0x12345678 6
+. 48 8B 74 24 28 C3
+
+movq 48(%rsp), %r13
+. 797 0x12345678 6
+. 4C 8B 6C 24 30 C3
+
+movq 48(%rsp), %r8
+. 798 0x12345678 6
+. 4C 8B 44 24 30 C3
+
+movq 48(%rsp), %rax
+. 799 0x12345678 6
+. 48 8B 44 24 30 C3
+
+movq 48(%rsp), %rcx
+. 800 0x12345678 6
+. 48 8B 4C 24 30 C3
+
+movq 48(%rsp), %rdx
+. 801 0x12345678 6
+. 48 8B 54 24 30 C3
+
+movq 48(%rsp), %rsi
+. 802 0x12345678 6
+. 48 8B 74 24 30 C3
+
+movq 56(%rdi), %r12
+. 803 0x12345678 5
+. 4C 8B 67 38 C3
+
+movq 56(%rdi), %r14
+. 804 0x12345678 5
+. 4C 8B 77 38 C3
+
+movq 56(%rsp), %r14
+. 805 0x12345678 6
+. 4C 8B 74 24 38 C3
+
+movq 56(%rsp), %r8
+. 806 0x12345678 6
+. 4C 8B 44 24 38 C3
+
+movq 56(%rsp), %rdi
+. 807 0x12345678 6
+. 48 8B 7C 24 38 C3
+
+movq 56(%rsp), %rdx
+. 808 0x12345678 6
+. 48 8B 54 24 38 C3
+
+movq 56(%rsp), %rsi
+. 809 0x12345678 6
+. 48 8B 74 24 38 C3
+
+movq 64(%rdi), %r13
+. 810 0x12345678 5
+. 4C 8B 6F 40 C3
+
+movq 64(%rdi), %rsi
+. 811 0x12345678 5
+. 48 8B 77 40 C3
+
+movq 64(%rsp), %r15
+. 812 0x12345678 6
+. 4C 8B 7C 24 40 C3
+
+movq 72(%rdi), %r15
+. 813 0x12345678 5
+. 4C 8B 7F 48 C3
+
+movq 72(%rdi), %rbp
+. 814 0x12345678 5
+. 48 8B 6F 48 C3
+
+movq 80(%r11), %rdx
+. 815 0x12345678 5
+. 49 8B 53 50 C3
+
+movq 80(%rdi), %rdx
+. 816 0x12345678 5
+. 48 8B 57 50 C3
+
+movq 80(%rsi), %rdx
+. 817 0x12345678 5
+. 48 8B 56 50 C3
+
+movq %r12, -32(%rsp)
+. 818 0x12345678 6
+. 4C 89 64 24 E0 C3
+
+movq %r13, -24(%rsp)
+. 819 0x12345678 6
+. 4C 89 6C 24 E8 C3
+
+movq %r14, -16(%rsp)
+. 820 0x12345678 6
+. 4C 89 74 24 F0 C3
+
+movq %r14, %rdi
+. 821 0x12345678 4
+. 4C 89 F7 C3
+
+movq %r15, -8(%rsp)
+. 822 0x12345678 6
+. 4C 89 7C 24 F8 C3
+
+movq %r15, %r10
+. 823 0x12345678 4
+. 4D 89 FA C3
+
+movq %r15, %rcx
+. 824 0x12345678 4
+. 4C 89 F9 C3
+
+movq %r15, %rdx
+. 825 0x12345678 4
+. 4C 89 FA C3
+
+movq %r15, %rsi
+. 826 0x12345678 4
+. 4C 89 FE C3
+
+movq %rax, 80(%rbx)
+. 827 0x12345678 5
+. 48 89 43 50 C3
+
+movq %rax, %r10
+. 828 0x12345678 4
+. 49 89 C2 C3
+
+movq %rax, %rcx
+. 829 0x12345678 4
+. 48 89 C1 C3
+
+movq %rax, %rdi
+. 830 0x12345678 4
+. 48 89 C7 C3
+
+movq %rax, %rdx
+. 831 0x12345678 4
+. 48 89 C2 C3
+
+movq %rax, (%rsp)
+. 832 0x12345678 5
+. 48 89 04 24 C3
+
+movq %rbp, -40(%rsp)
+. 833 0x12345678 6
+. 48 89 6C 24 D8 C3
+
+movq %rbp, %r11
+. 834 0x12345678 4
+. 49 89 EB C3
+
+movq %rbp, %rsi
+. 835 0x12345678 4
+. 48 89 EE C3
+
+movq %rbx, -48(%rsp)
+. 836 0x12345678 6
+. 48 89 5C 24 D0 C3
+
+movq %rbx, %rdi
+. 837 0x12345678 4
+. 48 89 DF C3
+
+movq %rbx, %rsi
+. 838 0x12345678 4
+. 48 89 DE C3
+
+movq %rcx, %rbp
+. 839 0x12345678 4
+. 48 89 CD C3
+
+movq %rcx, %rsi
+. 840 0x12345678 4
+. 48 89 CE C3
+
+movq %rdi, 24(%rsp)
+. 841 0x12345678 6
+. 48 89 7C 24 18 C3
+
+movq %rdi, 56(%rsp)
+. 842 0x12345678 6
+. 48 89 7C 24 38 C3
+
+movq %rdi, %rbp
+. 843 0x12345678 4
+. 48 89 FD C3
+
+movq %rdi, %rbx
+. 844 0x12345678 4
+. 48 89 FB C3
+
+movq %rdi, %rsi
+. 845 0x12345678 4
+. 48 89 FE C3
+
+movq %rdx, 32(%rsp)
+. 846 0x12345678 6
+. 48 89 54 24 20 C3
+
+movq %rdx, 40(%rsp)
+. 847 0x12345678 6
+. 48 89 54 24 28 C3
+
+movq %rdx, 8(%rsp)
+. 848 0x12345678 6
+. 48 89 54 24 08 C3
+
+movq %rdx, %rax
+. 849 0x12345678 4
+. 48 89 D0 C3
+
+movq %rdx, %rbx
+. 850 0x12345678 4
+. 48 89 D3 C3
+
+movq %rdx, %rdi
+. 851 0x12345678 4
+. 48 89 D7 C3
+
+movq %rsi, 40(%rsp)
+. 852 0x12345678 6
+. 48 89 74 24 28 C3
+
+movq %rsi, 48(%rsp)
+. 853 0x12345678 6
+. 48 89 74 24 30 C3
+
+movq %rsi, 8(%rsp)
+. 854 0x12345678 6
+. 48 89 74 24 08 C3
+
+movq %rsi, %r15
+. 855 0x12345678 4
+. 49 89 F7 C3
+
+movq %rsi, %rdx
+. 856 0x12345678 4
+. 48 89 F2 C3
+
+movq %rsi, (%rsp)
+. 857 0x12345678 5
+. 48 89 34 24 C3
+
+movq %rsp, %r11
+. 858 0x12345678 4
+. 49 89 E3 C3
+
+movq (%rsp), %rcx
+. 859 0x12345678 5
+. 48 8B 0C 24 C3
+
+movq (%rsp), %rdx
+. 860 0x12345678 5
+. 48 8B 14 24 C3
+
+movq (%rsp), %rsi
+. 861 0x12345678 5
+. 48 8B 34 24 C3
+
+movq -999(%rip), %rcx
+. 862 0x12345678 8
+. 48 8B 0D 19 FC FF FF C3
+
+movq 1(%rip), %rdi
+. 863 0x12345678 8
+. 48 8B 3D 01 00 00 00 C3
+
+movq 2(%rip), %rsi
+. 864 0x12345678 8
+. 48 8B 35 02 00 00 00 C3
+
+mov (%rbx,%rax,4), %eax
+. 865 0x12345678 4
+. 8B 04 83 C3
+
+mov (%rbx,%rsi,4), %eax
+. 866 0x12345678 4
+. 8B 04 B3 C3
+
+mov (%rcx,%rax,4), %eax
+. 867 0x12345678 4
+. 8B 04 81 C3
+
+mov (%rdx,%rax,4), %eax
+. 868 0x12345678 4
+. 8B 04 82 C3
+
+mov (%rsi,%rax,4), %eax
+. 869 0x12345678 4
+. 8B 04 86 C3
+
+mov (%rsi,%rdx,4), %eax
+. 870 0x12345678 4
+. 8B 04 96 C3
+
+movslq 108(%rbx),%rax
+. 871 0x12345678 5
+. 48 63 43 6C C3
+
+movslq 116(%r11),%rcx
+. 872 0x12345678 5
+. 49 63 4B 74 C3
+
+movslq 116(%rdi),%rcx
+. 873 0x12345678 5
+. 48 63 4F 74 C3
+
+movslq 116(%rsi),%rcx
+. 874 0x12345678 5
+. 48 63 4E 74 C3
+
+movslq 12(%rsp),%rax
+. 875 0x12345678 6
+. 48 63 44 24 0C C3
+
+movslq 20(%rsp),%rax
+. 876 0x12345678 6
+. 48 63 44 24 14 C3
+
+movslq 24(%rsp),%rax
+. 877 0x12345678 6
+. 48 63 44 24 18 C3
+
+movslq 24(%rsp),%rdx
+. 878 0x12345678 6
+. 48 63 54 24 18 C3
+
+movslq 28(%rsp),%r8
+. 879 0x12345678 6
+. 4C 63 44 24 1C C3
+
+movslq 28(%rsp),%rax
+. 880 0x12345678 6
+. 48 63 44 24 1C C3
+
+movslq 28(%rsp),%rcx
+. 881 0x12345678 6
+. 48 63 4C 24 1C C3
+
+movslq %eax,%rdx
+. 882 0x12345678 4
+. 48 63 D0 C3
+
+movslq %ebp,%rcx
+. 883 0x12345678 4
+. 48 63 CD C3
+
+movslq %ebp,%rdx
+. 884 0x12345678 4
+. 48 63 D5 C3
+
+movslq %ebx,%r10
+. 885 0x12345678 4
+. 4C 63 D3 C3
+
+movslq %ebx,%rax
+. 886 0x12345678 4
+. 48 63 C3 C3
+
+movslq %ebx,%rcx
+. 887 0x12345678 4
+. 48 63 CB C3
+
+movslq %ebx,%rdx
+. 888 0x12345678 4
+. 48 63 D3 C3
+
+movslq %ecx,%rax
+. 889 0x12345678 4
+. 48 63 C1 C3
+
+movslq %ecx,%rdx
+. 890 0x12345678 4
+. 48 63 D1 C3
+
+movslq %edi,%rax
+. 891 0x12345678 4
+. 48 63 C7 C3
+
+movslq %edi,%rcx
+. 892 0x12345678 4
+. 48 63 CF C3
+
+movslq %edi,%rdx
+. 893 0x12345678 4
+. 48 63 D7 C3
+
+movslq %edi,%rsi
+. 894 0x12345678 4
+. 48 63 F7 C3
+
+movslq %edx,%rax
+. 895 0x12345678 4
+. 48 63 C2 C3
+
+movslq %edx,%rdx
+. 896 0x12345678 4
+. 48 63 D2 C3
+
+movslq %edx,%rsi
+. 897 0x12345678 4
+. 48 63 F2 C3
+
+movslq %esi,%rax
+. 898 0x12345678 4
+. 48 63 C6 C3
+
+movslq %r10d,%rax
+. 899 0x12345678 4
+. 49 63 C2 C3
+
+movslq %r10d,%rcx
+. 900 0x12345678 4
+. 49 63 CA C3
+
+movslq %r10d,%rdx
+. 901 0x12345678 4
+. 49 63 D2 C3
+
+movslq %r10d,%rsi
+. 902 0x12345678 4
+. 49 63 F2 C3
+
+movslq %r11d,%rcx
+. 903 0x12345678 4
+. 49 63 CB C3
+
+movslq %r11d,%rdx
+. 904 0x12345678 4
+. 49 63 D3 C3
+
+movslq %r12d,%rax
+. 905 0x12345678 4
+. 49 63 C4 C3
+
+movslq %r12d,%rcx
+. 906 0x12345678 4
+. 49 63 CC C3
+
+movslq %r12d,%rdx
+. 907 0x12345678 4
+. 49 63 D4 C3
+
+movslq %r13d,%rax
+. 908 0x12345678 4
+. 49 63 C5 C3
+
+movslq %r13d,%rdx
+. 909 0x12345678 4
+. 49 63 D5 C3
+
+movslq %r14d,%rax
+. 910 0x12345678 4
+. 49 63 C6 C3
+
+movslq %r14d,%rdx
+. 911 0x12345678 4
+. 49 63 D6 C3
+
+movslq %r15d,%rax
+. 912 0x12345678 4
+. 49 63 C7 C3
+
+movslq %r8d,%rax
+. 913 0x12345678 4
+. 49 63 C0 C3
+
+movslq %r8d,%rdx
+. 914 0x12345678 4
+. 49 63 D0 C3
+
+movslq %r9d,%rax
+. 915 0x12345678 4
+. 49 63 C1 C3
+
+movslq %r9d,%rcx
+. 916 0x12345678 4
+. 49 63 C9 C3
+
+movslq %r9d,%rdx
+. 917 0x12345678 4
+. 49 63 D1 C3
+
+movw $0, -2(%rdi,%rdx,2)
+. 918 0x12345678 8
+. 66 C7 44 57 FE 00 00 C3
+
+movw $0, -4(%rdi,%rdx,2)
+. 919 0x12345678 8
+. 66 C7 44 57 FC 00 00 C3
+
+movw $0, -6(%rdi,%rdx,2)
+. 920 0x12345678 8
+. 66 C7 44 57 FA 00 00 C3
+
+movw $0, 80(%rsp,%rax,2)
+. 921 0x12345678 8
+. 66 C7 44 44 50 00 00 C3
+
+movw $0, (%r8,%rax,2)
+. 922 0x12345678 8
+. 66 41 C7 04 40 00 00 C3
+
+movw $0, (%rbp,%rax,2)
+. 923 0x12345678 8
+. 66 C7 44 45 00 00 00 C3
+
+movw $0, (%rcx,%rdx,2)
+. 924 0x12345678 7
+. 66 C7 04 51 00 00 C3
+
+movw $0, (%rdi,%rax,2)
+. 925 0x12345678 7
+. 66 C7 04 47 00 00 C3
+
+movw $1, (%rbp,%rax,2)
+. 926 0x12345678 8
+. 66 C7 44 45 00 01 00 C3
+
+movw %ax, (%rbp,%rdx,2)
+. 927 0x12345678 6
+. 66 89 44 55 00 C3
+
+movw %cx, 80(%rsp)
+. 928 0x12345678 6
+. 66 89 4C 24 50 C3
+
+movw %cx, 82(%rsp)
+. 929 0x12345678 6
+. 66 89 4C 24 52 C3
+
+movw %di, 88(%rsp)
+. 930 0x12345678 6
+. 66 89 7C 24 58 C3
+
+movw %di, 90(%rsp)
+. 931 0x12345678 6
+. 66 89 7C 24 5A C3
+
+movw %r10w, (%rbp,%rax,2)
+. 932 0x12345678 7
+. 66 44 89 54 45 00 C3
+
+movw %si, 84(%rsp)
+. 933 0x12345678 6
+. 66 89 74 24 54 C3
+
+movw %si, 86(%rsp)
+. 934 0x12345678 6
+. 66 89 74 24 56 C3
+
+movw %si, (%rcx,%rax,2)
+. 935 0x12345678 5
+. 66 89 34 41 C3
+
+movzbl 124(%rdi), %eax
+. 936 0x12345678 5
+. 0F B6 47 7C C3
+
+movzbl 12(%r10), %eax
+. 937 0x12345678 6
+. 41 0F B6 42 0C C3
+
+movzbl 12(%r9), %eax
+. 938 0x12345678 6
+. 41 0F B6 41 0C C3
+
+movzbl 1704(%rbp,%rax), %eax
+. 939 0x12345678 9
+. 0F B6 84 05 A8 06 00 00 C3
+
+movzbl 1704(%rbp,%rax), %esi
+. 940 0x12345678 9
+. 0F B6 B4 05 A8 06 00 00 C3
+
+movzbl 19706(%rbp,%r10), %eax
+. 941 0x12345678 10
+. 42 0F B6 84 15 FA 4C 00 00 C3
+
+movzbl -1(%rcx,%r8), %eax
+. 942 0x12345678 7
+. 42 0F B6 44 01 FF C3
+
+movzbl -1(%rdx,%rsi), %eax
+. 943 0x12345678 6
+. 0F B6 44 32 FF C3
+
+movzbl 1(%rsp), %ecx
+. 944 0x12345678 6
+. 0F B6 4C 24 01 C3
+
+movzbl -2(%rcx,%r8), %eax
+. 945 0x12345678 7
+. 42 0F B6 44 01 FE C3
+
+movzbl -2(%rdx,%rsi), %eax
+. 946 0x12345678 6
+. 0F B6 44 32 FE C3
+
+movzbl 32(%rsp), %ecx
+. 947 0x12345678 6
+. 0F B6 4C 24 20 C3
+
+movzbl 32(%rsp,%rax), %ecx
+. 948 0x12345678 6
+. 0F B6 4C 04 20 C3
+
+movzbl 37708(%rax,%r13), %eax
+. 949 0x12345678 10
+. 42 0F B6 84 28 4C 93 00 00 C3
+
+movzbl 37708(%rax,%rdx), %eax
+. 950 0x12345678 9
+. 0F B6 84 10 4C 93 00 00 C3
+
+movzbl 37708(%rbp,%rax,2), %r8d
+. 951 0x12345678 10
+. 44 0F B6 84 45 4C 93 00 00 C3
+
+movzbl 37708(%rbp,%rcx), %edx
+. 952 0x12345678 9
+. 0F B6 94 0D 4C 93 00 00 C3
+
+movzbl 37708(%rcx,%rdx), %r8d
+. 953 0x12345678 10
+. 44 0F B6 84 11 4C 93 00 00 C3
+
+movzbl 37966(%rbp,%rcx), %eax
+. 954 0x12345678 9
+. 0F B6 84 0D 4E 94 00 00 C3
+
+movzbl 38224(%rbp,%rcx), %edx
+. 955 0x12345678 9
+. 0F B6 94 0D 50 95 00 00 C3
+
+movzbl 38482(%rbp,%rcx), %eax
+. 956 0x12345678 9
+. 0F B6 84 0D 52 96 00 00 C3
+
+movzbl 384(%rbx,%rax), %esi
+. 957 0x12345678 9
+. 0F B6 B4 03 80 01 00 00 C3
+
+movzbl 38740(%rbp,%rcx), %edx
+. 958 0x12345678 9
+. 0F B6 94 0D 54 97 00 00 C3
+
+movzbl 38998(%rbp,%rcx), %eax
+. 959 0x12345678 9
+. 0F B6 84 0D 56 98 00 00 C3
+
+movzbl -3(%rcx,%r8), %eax
+. 960 0x12345678 7
+. 42 0F B6 44 01 FD C3
+
+movzbl -3(%rdx,%rsi), %eax
+. 961 0x12345678 6
+. 0F B6 44 32 FD C3
+
+movzbl 643(%r11), %eax
+. 962 0x12345678 9
+. 41 0F B6 83 83 02 00 00 C3
+
+movzbl 643(%rdi), %eax
+. 963 0x12345678 8
+. 0F B6 87 83 02 00 00 C3
+
+movzbl 643(%rsi), %eax
+. 964 0x12345678 8
+. 0F B6 86 83 02 00 00 C3
+
+movzbl 664(%rbx), %eax
+. 965 0x12345678 8
+. 0F B6 83 98 02 00 00 C3
+
+movzbl %al, %eax
+. 966 0x12345678 4
+. 0F B6 C0 C3
+
+movzbl %al, %r14d
+. 967 0x12345678 5
+. 44 0F B6 F0 C3
+
+movzbl %bh, %ebp
+. 968 0x12345678 4
+. 0F B6 EF C3
+
+movzbl %bl,%esi
+. 969 0x12345678 4
+. 0F B6 F3 C3
+
+movzbl %dl, %r11d
+. 970 0x12345678 5
+. 44 0F B6 DA C3
+
+movzbl (%rax), %r12d
+. 971 0x12345678 5
+. 44 0F B6 20 C3
+
+movzbl (%rax,%rcx), %eax
+. 972 0x12345678 5
+. 0F B6 04 08 C3
+
+movzbl (%rax,%rdi), %eax
+. 973 0x12345678 5
+. 0F B6 04 38 C3
+
+movzbl (%rax,%rdi), %edi
+. 974 0x12345678 5
+. 0F B6 3C 38 C3
+
+movzbl (%rax,%rdi), %esi
+. 975 0x12345678 5
+. 0F B6 34 38 C3
+
+movzbl (%rax,%rdi), %r9d
+. 976 0x12345678 6
+. 44 0F B6 0C 38 C3
+
+movzbl (%rax,%rdx), %eax
+. 977 0x12345678 5
+. 0F B6 04 10 C3
+
+movzbl (%rax,%rdx), %r10d
+. 978 0x12345678 6
+. 44 0F B6 14 10 C3
+
+movzbl (%rax,%rsi), %ecx
+. 979 0x12345678 5
+. 0F B6 0C 30 C3
+
+movzbl (%rax,%rsi), %edx
+. 980 0x12345678 5
+. 0F B6 14 30 C3
+
+movzbl (%rcx,%rsi), %eax
+. 981 0x12345678 5
+. 0F B6 04 31 C3
+
+movzbl (%rdx), %ecx
+. 982 0x12345678 4
+. 0F B6 0A C3
+
+movzbl (%rdx,%rsi), %eax
+. 983 0x12345678 5
+. 0F B6 04 32 C3
+
+movzbl (%rdx,%rsi), %edx
+. 984 0x12345678 5
+. 0F B6 14 32 C3
+
+movzbl (%rsp), %eax
+. 985 0x12345678 5
+. 0F B6 04 24 C3
+
+movzbl %sil, %esi
+. 986 0x12345678 5
+. 40 0F B6 F6 C3
+
+movzbq 1704(%rbp,%r10), %rdx
+. 987 0x12345678 10
+. 4A 0F B6 94 15 A8 06 00 00 C3
+
+movzbq 1704(%rbp,%rax), %rdx
+. 988 0x12345678 10
+. 48 0F B6 94 05 A8 06 00 00 C3
+
+movzbq (%rax,%r13), %rax
+. 989 0x12345678 6
+. 4A 0F B6 04 28 C3
+
+movzbq (%rax,%r8), %rsi
+. 990 0x12345678 6
+. 4A 0F B6 34 00 C3
+
+movzbq (%rax,%rcx), %rax
+. 991 0x12345678 6
+. 48 0F B6 04 08 C3
+
+movzbq (%rax,%rdx), %rax
+. 992 0x12345678 6
+. 48 0F B6 04 10 C3
+
+movzbw 37708(%rcx,%rdx), %dx
+. 993 0x12345678 10
+. 66 0F B6 94 11 4C 93 00 00 C3
+
+movzbw (%r8), %si
+. 994 0x12345678 6
+. 66 41 0F B6 30 C3
+
+movzwl 80(%rsp,%rax,2), %eax
+. 995 0x12345678 6
+. 0F B7 44 44 50 C3
+
+movzwl 86(%r15,%r8,2), %edx
+. 996 0x12345678 7
+. 43 0F B7 54 47 56 C3
+
+movzwl %ax, %ecx
+. 997 0x12345678 4
+. 0F B7 C8 C3
+
+movzwl %dx, %eax
+. 998 0x12345678 4
+. 0F B7 C2 C3
+
+movzwl (%r15,%rax,2), %eax
+. 999 0x12345678 6
+. 41 0F B7 04 47 C3
+
+movzwl (%rcx,%rax,2), %eax
+. 1000 0x12345678 5
+. 0F B7 04 41 C3
+
+movzwl (%rcx,%rax,2), %r10d
+. 1001 0x12345678 6
+. 44 0F B7 14 41 C3
+
+movzwl %si, %eax
+. 1002 0x12345678 4
+. 0F B7 C6 C3
+
+movzwq 10(%r15,%r8,2), %rax
+. 1003 0x12345678 7
+. 4B 0F B7 44 47 0A C3
+
+movzwq 10(%r15,%rax,2), %rax
+. 1004 0x12345678 7
+. 49 0F B7 44 47 0A C3
+
+movzwq 10(%r15,%rcx,2), %rax
+. 1005 0x12345678 7
+. 49 0F B7 44 4F 0A C3
+
+movzwq 12(%r15,%r8,2), %rax
+. 1006 0x12345678 7
+. 4B 0F B7 44 47 0C C3
+
+movzwq 12(%r15,%rax,2), %rax
+. 1007 0x12345678 7
+. 49 0F B7 44 47 0C C3
+
+movzwq 12(%r15,%rcx,2), %rax
+. 1008 0x12345678 7
+. 49 0F B7 44 4F 0C C3
+
+movzwq 14(%r15,%r8,2), %rax
+. 1009 0x12345678 7
+. 4B 0F B7 44 47 0E C3
+
+movzwq 14(%r15,%rax,2), %rax
+. 1010 0x12345678 7
+. 49 0F B7 44 47 0E C3
+
+movzwq 14(%r15,%rcx,2), %rax
+. 1011 0x12345678 7
+. 49 0F B7 44 4F 0E C3
+
+movzwq 16(%r15,%r8,2), %rax
+. 1012 0x12345678 7
+. 4B 0F B7 44 47 10 C3
+
+movzwq 16(%r15,%rax,2), %rax
+. 1013 0x12345678 7
+. 49 0F B7 44 47 10 C3
+
+movzwq 16(%r15,%rcx,2), %rax
+. 1014 0x12345678 7
+. 49 0F B7 44 4F 10 C3
+
+movzwq 18(%r15,%r8,2), %rax
+. 1015 0x12345678 7
+. 4B 0F B7 44 47 12 C3
+
+movzwq 18(%r15,%rax,2), %rax
+. 1016 0x12345678 7
+. 49 0F B7 44 47 12 C3
+
+movzwq 18(%r15,%rcx,2), %rax
+. 1017 0x12345678 7
+. 49 0F B7 44 4F 12 C3
+
+movzwq 20(%r15,%r8,2), %rax
+. 1018 0x12345678 7
+. 4B 0F B7 44 47 14 C3
+
+movzwq 20(%r15,%rax,2), %rax
+. 1019 0x12345678 7
+. 49 0F B7 44 47 14 C3
+
+movzwq 20(%r15,%rcx,2), %rax
+. 1020 0x12345678 7
+. 49 0F B7 44 4F 14 C3
+
+movzwq 22(%r15,%r8,2), %rax
+. 1021 0x12345678 7
+. 4B 0F B7 44 47 16 C3
+
+movzwq 22(%r15,%rax,2), %rax
+. 1022 0x12345678 7
+. 49 0F B7 44 47 16 C3
+
+movzwq 22(%r15,%rcx,2), %rax
+. 1023 0x12345678 7
+. 49 0F B7 44 4F 16 C3
+
+movzwq 24(%r15,%r8,2), %rax
+. 1024 0x12345678 7
+. 4B 0F B7 44 47 18 C3
+
+movzwq 24(%r15,%rax,2), %rax
+. 1025 0x12345678 7
+. 49 0F B7 44 47 18 C3
+
+movzwq 24(%r15,%rcx,2), %rax
+. 1026 0x12345678 7
+. 49 0F B7 44 4F 18 C3
+
+movzwq 26(%r15,%r8,2), %rax
+. 1027 0x12345678 7
+. 4B 0F B7 44 47 1A C3
+
+movzwq 26(%r15,%rax,2), %rax
+. 1028 0x12345678 7
+. 49 0F B7 44 47 1A C3
+
+movzwq 26(%r15,%rcx,2), %rax
+. 1029 0x12345678 7
+. 49 0F B7 44 4F 1A C3
+
+movzwq 28(%r15,%r8,2), %rax
+. 1030 0x12345678 7
+. 4B 0F B7 44 47 1C C3
+
+movzwq 28(%r15,%rax,2), %rax
+. 1031 0x12345678 7
+. 49 0F B7 44 47 1C C3
+
+movzwq 28(%r15,%rcx,2), %rax
+. 1032 0x12345678 7
+. 49 0F B7 44 4F 1C C3
+
+movzwq 2(%r15,%r8,2), %rax
+. 1033 0x12345678 7
+. 4B 0F B7 44 47 02 C3
+
+movzwq 2(%r15,%rax,2), %rax
+. 1034 0x12345678 7
+. 49 0F B7 44 47 02 C3
+
+movzwq 2(%r15,%rcx,2), %rax
+. 1035 0x12345678 7
+. 49 0F B7 44 4F 02 C3
+
+movzwq 30(%r15,%r8,2), %rax
+. 1036 0x12345678 7
+. 4B 0F B7 44 47 1E C3
+
+movzwq 30(%r15,%rax,2), %rax
+. 1037 0x12345678 7
+. 49 0F B7 44 47 1E C3
+
+movzwq 30(%r15,%rcx,2), %rax
+. 1038 0x12345678 7
+. 49 0F B7 44 4F 1E C3
+
+movzwq 32(%r15,%r8,2), %rax
+. 1039 0x12345678 7
+. 4B 0F B7 44 47 20 C3
+
+movzwq 32(%r15,%rax,2), %rax
+. 1040 0x12345678 7
+. 49 0F B7 44 47 20 C3
+
+movzwq 32(%r15,%rcx,2), %rax
+. 1041 0x12345678 7
+. 49 0F B7 44 4F 20 C3
+
+movzwq 34(%r15,%r8,2), %rax
+. 1042 0x12345678 7
+. 4B 0F B7 44 47 22 C3
+
+movzwq 34(%r15,%rax,2), %rax
+. 1043 0x12345678 7
+. 49 0F B7 44 47 22 C3
+
+movzwq 34(%r15,%rcx,2), %rax
+. 1044 0x12345678 7
+. 49 0F B7 44 4F 22 C3
+
+movzwq 36(%r15,%r8,2), %rax
+. 1045 0x12345678 7
+. 4B 0F B7 44 47 24 C3
+
+movzwq 36(%r15,%rax,2), %rax
+. 1046 0x12345678 7
+. 49 0F B7 44 47 24 C3
+
+movzwq 36(%r15,%rcx,2), %rax
+. 1047 0x12345678 7
+. 49 0F B7 44 4F 24 C3
+
+movzwq 38(%r15,%r8,2), %rax
+. 1048 0x12345678 7
+. 4B 0F B7 44 47 26 C3
+
+movzwq 38(%r15,%rax,2), %rax
+. 1049 0x12345678 7
+. 49 0F B7 44 47 26 C3
+
+movzwq 38(%r15,%rcx,2), %rax
+. 1050 0x12345678 7
+. 49 0F B7 44 4F 26 C3
+
+movzwq 40(%r15,%r8,2), %rax
+. 1051 0x12345678 7
+. 4B 0F B7 44 47 28 C3
+
+movzwq 40(%r15,%rax,2), %rax
+. 1052 0x12345678 7
+. 49 0F B7 44 47 28 C3
+
+movzwq 40(%r15,%rcx,2), %rax
+. 1053 0x12345678 7
+. 49 0F B7 44 4F 28 C3
+
+movzwq 42(%r15,%r8,2), %rax
+. 1054 0x12345678 7
+. 4B 0F B7 44 47 2A C3
+
+movzwq 42(%r15,%rax,2), %rax
+. 1055 0x12345678 7
+. 49 0F B7 44 47 2A C3
+
+movzwq 42(%r15,%rcx,2), %rax
+. 1056 0x12345678 7
+. 49 0F B7 44 4F 2A C3
+
+movzwq 44(%r15,%r8,2), %rax
+. 1057 0x12345678 7
+. 4B 0F B7 44 47 2C C3
+
+movzwq 44(%r15,%rax,2), %rax
+. 1058 0x12345678 7
+. 49 0F B7 44 47 2C C3
+
+movzwq 44(%r15,%rcx,2), %rax
+. 1059 0x12345678 7
+. 49 0F B7 44 4F 2C C3
+
+movzwq 46(%r15,%r8,2), %rax
+. 1060 0x12345678 7
+. 4B 0F B7 44 47 2E C3
+
+movzwq 46(%r15,%rax,2), %rax
+. 1061 0x12345678 7
+. 49 0F B7 44 47 2E C3
+
+movzwq 46(%r15,%rcx,2), %rax
+. 1062 0x12345678 7
+. 49 0F B7 44 4F 2E C3
+
+movzwq 48(%r15,%r8,2), %rax
+. 1063 0x12345678 7
+. 4B 0F B7 44 47 30 C3
+
+movzwq 48(%r15,%rax,2), %rax
+. 1064 0x12345678 7
+. 49 0F B7 44 47 30 C3
+
+movzwq 48(%r15,%rcx,2), %rax
+. 1065 0x12345678 7
+. 49 0F B7 44 4F 30 C3
+
+movzwq 4(%r15,%r8,2), %rax
+. 1066 0x12345678 7
+. 4B 0F B7 44 47 04 C3
+
+movzwq 4(%r15,%rax,2), %rax
+. 1067 0x12345678 7
+. 49 0F B7 44 47 04 C3
+
+movzwq 4(%r15,%rcx,2), %rax
+. 1068 0x12345678 7
+. 49 0F B7 44 4F 04 C3
+
+movzwq 50(%r15,%r8,2), %rax
+. 1069 0x12345678 7
+. 4B 0F B7 44 47 32 C3
+
+movzwq 50(%r15,%rax,2), %rax
+. 1070 0x12345678 7
+. 49 0F B7 44 47 32 C3
+
+movzwq 50(%r15,%rcx,2), %rax
+. 1071 0x12345678 7
+. 49 0F B7 44 4F 32 C3
+
+movzwq 52(%r15,%r8,2), %rax
+. 1072 0x12345678 7
+. 4B 0F B7 44 47 34 C3
+
+movzwq 52(%r15,%rax,2), %rax
+. 1073 0x12345678 7
+. 49 0F B7 44 47 34 C3
+
+movzwq 52(%r15,%rcx,2), %rax
+. 1074 0x12345678 7
+. 49 0F B7 44 4F 34 C3
+
+movzwq 54(%r15,%r8,2), %rax
+. 1075 0x12345678 7
+. 4B 0F B7 44 47 36 C3
+
+movzwq 54(%r15,%rax,2), %rax
+. 1076 0x12345678 7
+. 49 0F B7 44 47 36 C3
+
+movzwq 54(%r15,%rcx,2), %rax
+. 1077 0x12345678 7
+. 49 0F B7 44 4F 36 C3
+
+movzwq 56(%r15,%r8,2), %rax
+. 1078 0x12345678 7
+. 4B 0F B7 44 47 38 C3
+
+movzwq 56(%r15,%rax,2), %rax
+. 1079 0x12345678 7
+. 49 0F B7 44 47 38 C3
+
+movzwq 56(%r15,%rcx,2), %rax
+. 1080 0x12345678 7
+. 49 0F B7 44 4F 38 C3
+
+movzwq 58(%r15,%r8,2), %rax
+. 1081 0x12345678 7
+. 4B 0F B7 44 47 3A C3
+
+movzwq 58(%r15,%rax,2), %rax
+. 1082 0x12345678 7
+. 49 0F B7 44 47 3A C3
+
+movzwq 58(%r15,%rcx,2), %rax
+. 1083 0x12345678 7
+. 49 0F B7 44 4F 3A C3
+
+movzwq 60(%r15,%r8,2), %rax
+. 1084 0x12345678 7
+. 4B 0F B7 44 47 3C C3
+
+movzwq 60(%r15,%rax,2), %rax
+. 1085 0x12345678 7
+. 49 0F B7 44 47 3C C3
+
+movzwq 60(%r15,%rcx,2), %rax
+. 1086 0x12345678 7
+. 49 0F B7 44 4F 3C C3
+
+movzwq 62(%r15,%r8,2), %rax
+. 1087 0x12345678 7
+. 4B 0F B7 44 47 3E C3
+
+movzwq 62(%r15,%rax,2), %rax
+. 1088 0x12345678 7
+. 49 0F B7 44 47 3E C3
+
+movzwq 62(%r15,%rcx,2), %rax
+. 1089 0x12345678 7
+. 49 0F B7 44 4F 3E C3
+
+movzwq 64(%r15,%r8,2), %rax
+. 1090 0x12345678 7
+. 4B 0F B7 44 47 40 C3
+
+movzwq 64(%r15,%rax,2), %rax
+. 1091 0x12345678 7
+. 49 0F B7 44 47 40 C3
+
+movzwq 64(%r15,%rcx,2), %rax
+. 1092 0x12345678 7
+. 49 0F B7 44 4F 40 C3
+
+movzwq 66(%r15,%r8,2), %rax
+. 1093 0x12345678 7
+. 4B 0F B7 44 47 42 C3
+
+movzwq 66(%r15,%rax,2), %rax
+. 1094 0x12345678 7
+. 49 0F B7 44 47 42 C3
+
+movzwq 66(%r15,%rcx,2), %rax
+. 1095 0x12345678 7
+. 49 0F B7 44 4F 42 C3
+
+movzwq 68(%r15,%r8,2), %rax
+. 1096 0x12345678 7
+. 4B 0F B7 44 47 44 C3
+
+movzwq 68(%r15,%rax,2), %rax
+. 1097 0x12345678 7
+. 49 0F B7 44 47 44 C3
+
+movzwq 68(%r15,%rcx,2), %rax
+. 1098 0x12345678 7
+. 49 0F B7 44 4F 44 C3
+
+movzwq 6(%r15,%r8,2), %rax
+. 1099 0x12345678 7
+. 4B 0F B7 44 47 06 C3
+
+movzwq 6(%r15,%rax,2), %rax
+. 1100 0x12345678 7
+. 49 0F B7 44 47 06 C3
+
+movzwq 6(%r15,%rcx,2), %rax
+. 1101 0x12345678 7
+. 49 0F B7 44 4F 06 C3
+
+movzwq 70(%r15,%r8,2), %rax
+. 1102 0x12345678 7
+. 4B 0F B7 44 47 46 C3
+
+movzwq 70(%r15,%rax,2), %rax
+. 1103 0x12345678 7
+. 49 0F B7 44 47 46 C3
+
+movzwq 70(%r15,%rcx,2), %rax
+. 1104 0x12345678 7
+. 49 0F B7 44 4F 46 C3
+
+movzwq 72(%r15,%r8,2), %rax
+. 1105 0x12345678 7
+. 4B 0F B7 44 47 48 C3
+
+movzwq 72(%r15,%rax,2), %rax
+. 1106 0x12345678 7
+. 49 0F B7 44 47 48 C3
+
+movzwq 72(%r15,%rcx,2), %rax
+. 1107 0x12345678 7
+. 49 0F B7 44 4F 48 C3
+
+movzwq 74(%r15,%r8,2), %rax
+. 1108 0x12345678 7
+. 4B 0F B7 44 47 4A C3
+
+movzwq 74(%r15,%rax,2), %rax
+. 1109 0x12345678 7
+. 49 0F B7 44 47 4A C3
+
+movzwq 74(%r15,%rcx,2), %rax
+. 1110 0x12345678 7
+. 49 0F B7 44 4F 4A C3
+
+movzwq 76(%r15,%r8,2), %rax
+. 1111 0x12345678 7
+. 4B 0F B7 44 47 4C C3
+
+movzwq 76(%r15,%rax,2), %rax
+. 1112 0x12345678 7
+. 49 0F B7 44 47 4C C3
+
+movzwq 76(%r15,%rcx,2), %rax
+. 1113 0x12345678 7
+. 49 0F B7 44 4F 4C C3
+
+movzwq 78(%r15,%r8,2), %rax
+. 1114 0x12345678 7
+. 4B 0F B7 44 47 4E C3
+
+movzwq 78(%r15,%rax,2), %rax
+. 1115 0x12345678 7
+. 49 0F B7 44 47 4E C3
+
+movzwq 78(%r15,%rcx,2), %rax
+. 1116 0x12345678 7
+. 49 0F B7 44 4F 4E C3
+
+movzwq 80(%r15,%r8,2), %rax
+. 1117 0x12345678 7
+. 4B 0F B7 44 47 50 C3
+
+movzwq 80(%r15,%rax,2), %rax
+. 1118 0x12345678 7
+. 49 0F B7 44 47 50 C3
+
+movzwq 80(%r15,%rcx,2), %rax
+. 1119 0x12345678 7
+. 49 0F B7 44 4F 50 C3
+
+movzwq 82(%r15,%r8,2), %rax
+. 1120 0x12345678 7
+. 4B 0F B7 44 47 52 C3
+
+movzwq 82(%r15,%rax,2), %rax
+. 1121 0x12345678 7
+. 49 0F B7 44 47 52 C3
+
+movzwq 82(%r15,%rcx,2), %rax
+. 1122 0x12345678 7
+. 49 0F B7 44 4F 52 C3
+
+movzwq 84(%r15,%r8,2), %rax
+. 1123 0x12345678 7
+. 4B 0F B7 44 47 54 C3
+
+movzwq 84(%r15,%rax,2), %rax
+. 1124 0x12345678 7
+. 49 0F B7 44 47 54 C3
+
+movzwq 84(%r15,%rcx,2), %rax
+. 1125 0x12345678 7
+. 49 0F B7 44 4F 54 C3
+
+movzwq 86(%r15,%rax,2), %rax
+. 1126 0x12345678 7
+. 49 0F B7 44 47 56 C3
+
+movzwq 86(%r15,%rcx,2), %rax
+. 1127 0x12345678 7
+. 49 0F B7 44 4F 56 C3
+
+movzwq 88(%r15,%r8,2), %rax
+. 1128 0x12345678 7
+. 4B 0F B7 44 47 58 C3
+
+movzwq 88(%r15,%rax,2), %rax
+. 1129 0x12345678 7
+. 49 0F B7 44 47 58 C3
+
+movzwq 88(%r15,%rcx,2), %rax
+. 1130 0x12345678 7
+. 49 0F B7 44 4F 58 C3
+
+movzwq 8(%r15,%r8,2), %rax
+. 1131 0x12345678 7
+. 4B 0F B7 44 47 08 C3
+
+movzwq 8(%r15,%rax,2), %rax
+. 1132 0x12345678 7
+. 49 0F B7 44 47 08 C3
+
+movzwq 8(%r15,%rcx,2), %rax
+. 1133 0x12345678 7
+. 49 0F B7 44 4F 08 C3
+
+movzwq 90(%r15,%r8,2), %rax
+. 1134 0x12345678 7
+. 4B 0F B7 44 47 5A C3
+
+movzwq 90(%r15,%rax,2), %rax
+. 1135 0x12345678 7
+. 49 0F B7 44 47 5A C3
+
+movzwq 90(%r15,%rcx,2), %rax
+. 1136 0x12345678 7
+. 49 0F B7 44 4F 5A C3
+
+movzwq 92(%r15,%r8,2), %rax
+. 1137 0x12345678 7
+. 4B 0F B7 44 47 5C C3
+
+movzwq 92(%r15,%rax,2), %rax
+. 1138 0x12345678 7
+. 49 0F B7 44 47 5C C3
+
+movzwq 92(%r15,%rcx,2), %rax
+. 1139 0x12345678 7
+. 49 0F B7 44 4F 5C C3
+
+movzwq 94(%r15,%r8,2), %rax
+. 1140 0x12345678 7
+. 4B 0F B7 44 47 5E C3
+
+movzwq 94(%r15,%rax,2), %rax
+. 1141 0x12345678 7
+. 49 0F B7 44 47 5E C3
+
+movzwq 94(%r15,%rcx,2), %rax
+. 1142 0x12345678 7
+. 49 0F B7 44 4F 5E C3
+
+movzwq 96(%r15,%r8,2), %rax
+. 1143 0x12345678 7
+. 4B 0F B7 44 47 60 C3
+
+movzwq 96(%r15,%rax,2), %rax
+. 1144 0x12345678 7
+. 49 0F B7 44 47 60 C3
+
+movzwq 96(%r15,%rcx,2), %rax
+. 1145 0x12345678 7
+. 49 0F B7 44 4F 60 C3
+
+movzwq 98(%r15,%r8,2), %rax
+. 1146 0x12345678 7
+. 4B 0F B7 44 47 62 C3
+
+movzwq 98(%r15,%rax,2), %rax
+. 1147 0x12345678 7
+. 49 0F B7 44 47 62 C3
+
+movzwq 98(%r15,%rcx,2), %rax
+. 1148 0x12345678 7
+. 49 0F B7 44 4F 62 C3
+
+movzwq (%r15,%r8,2), %rdx
+. 1149 0x12345678 6
+. 4B 0F B7 14 47 C3
+
+movzwq (%r15,%rax,2), %rax
+. 1150 0x12345678 6
+. 49 0F B7 04 47 C3
+
+movzwq (%r15,%rax,2), %rcx
+. 1151 0x12345678 6
+. 49 0F B7 0C 47 C3
+
+movzwq (%r15,%rcx,2), %rax
+. 1152 0x12345678 6
+. 49 0F B7 04 4F C3
+
+negl %ecx
+. 1153 0x12345678 3
+. F7 D9 C3
+
+notl %edx
+. 1154 0x12345678 3
+. F7 D2 C3
+
+orl $2097152, (%rbp,%rax,4)
+. 1155 0x12345678 9
+. 81 4C 85 00 00 00 20 00 C3
+
+orl %eax, 640(%rsi)
+. 1156 0x12345678 7
+. 09 86 80 02 00 00 C3
+
+orl %eax, %esi
+. 1157 0x12345678 3
+. 09 C6 C3
+
+orl %eax, %r12d
+. 1158 0x12345678 4
+. 41 09 C4 C3
+
+orl %ebp, 640(%rsi)
+. 1159 0x12345678 7
+. 09 AE 80 02 00 00 C3
+
+orl %ebp, (%rbx,%rax,4)
+. 1160 0x12345678 4
+. 09 2C 83 C3
+
+orl %edi, 640(%rsi)
+. 1161 0x12345678 7
+. 09 BE 80 02 00 00 C3
+
+orl %edx, 640(%rsi)
+. 1162 0x12345678 7
+. 09 96 80 02 00 00 C3
+
+orl %edx, %eax
+. 1163 0x12345678 3
+. 09 D0 C3
+
+orl %esi, 640(%r11)
+. 1164 0x12345678 8
+. 41 09 B3 80 02 00 00 C3
+
+orl %esi, 640(%rdi)
+. 1165 0x12345678 7
+. 09 B7 80 02 00 00 C3
+
+orl %r10d, 640(%rsi)
+. 1166 0x12345678 8
+. 44 09 96 80 02 00 00 C3
+
+orl %r8d, 640(%rsi)
+. 1167 0x12345678 8
+. 44 09 86 80 02 00 00 C3
+
+orl %r8d, (%rbx,%rax,4)
+. 1168 0x12345678 5
+. 44 09 04 83 C3
+
+orl %r9d, 640(%rsi)
+. 1169 0x12345678 8
+. 44 09 8E 80 02 00 00 C3
+
+popq %r12
+. 1170 0x12345678 3
+. 41 5C C3
+
+popq %r13
+. 1171 0x12345678 3
+. 41 5D C3
+
+popq %r14
+. 1172 0x12345678 3
+. 41 5E C3
+
+popq %r15
+. 1173 0x12345678 3
+. 41 5F C3
+
+popq %rbp
+. 1174 0x12345678 2
+. 5D C3
+
+popq %rbx
+. 1175 0x12345678 2
+. 5B C3
+
+pushq %r12
+. 1176 0x12345678 3
+. 41 54 C3
+
+pushq %r13
+. 1177 0x12345678 3
+. 41 55 C3
+
+pushq %r14
+. 1178 0x12345678 3
+. 41 56 C3
+
+pushq %r15
+. 1179 0x12345678 3
+. 41 57 C3
+
+pushq %rbp
+. 1180 0x12345678 2
+. 55 C3
+
+pushq %rbx
+. 1181 0x12345678 2
+. 53 C3
+
+rep ; ret
+. 1182 0x12345678 2
+. F3 C3
+
+ret
+. 1183 0x12345678 1
+. C3
+
+roll %eax
+. 1184 0x12345678 3
+. D1 C0 C3
+
+sall $16, %eax
+. 1185 0x12345678 4
+. C1 E0 10 C3
+
+sall 16(%rsp)
+. 1186 0x12345678 5
+. D1 64 24 10 C3
+
+sall $4, %edx
+. 1187 0x12345678 4
+. C1 E2 04 C3
+
+sall $4, %r10d
+. 1188 0x12345678 5
+. 41 C1 E2 04 C3
+
+sall $8, 640(%r11)
+. 1189 0x12345678 9
+. 41 C1 A3 80 02 00 00 08 C3
+
+sall $8, 640(%rdi)
+. 1190 0x12345678 8
+. C1 A7 80 02 00 00 08 C3
+
+sall $8, 640(%rsi)
+. 1191 0x12345678 8
+. C1 A6 80 02 00 00 08 C3
+
+sall $8, %eax
+. 1192 0x12345678 4
+. C1 E0 08 C3
+
+sall $8, %esi
+. 1193 0x12345678 4
+. C1 E6 08 C3
+
+sall $8, %r12d
+. 1194 0x12345678 5
+. 41 C1 E4 08 C3
+
+sall %cl, %eax
+. 1195 0x12345678 3
+. D3 E0 C3
+
+sall %cl, %ebp
+. 1196 0x12345678 3
+. D3 E5 C3
+
+sall %cl, %edi
+. 1197 0x12345678 3
+. D3 E7 C3
+
+sall %cl, %edx
+. 1198 0x12345678 3
+. D3 E2 C3
+
+sall %cl, %esi
+. 1199 0x12345678 3
+. D3 E6 C3
+
+sall %cl, %r10d
+. 1200 0x12345678 4
+. 41 D3 E2 C3
+
+sall %cl, %r8d
+. 1201 0x12345678 4
+. 41 D3 E0 C3
+
+sall %cl, %r9d
+. 1202 0x12345678 4
+. 41 D3 E1 C3
+
+salq $10, %rax
+. 1203 0x12345678 5
+. 48 C1 E0 0A C3
+
+salq $10, %rdx
+. 1204 0x12345678 5
+. 48 C1 E2 0A C3
+
+salq $4, %rax
+. 1205 0x12345678 5
+. 48 C1 E0 04 C3
+
+salq $4, %rdx
+. 1206 0x12345678 5
+. 48 C1 E2 04 C3
+
+salq $4, %rsi
+. 1207 0x12345678 5
+. 48 C1 E6 04 C3
+
+salq $7, %rax
+. 1208 0x12345678 5
+. 48 C1 E0 07 C3
+
+salq $7, %rdi
+. 1209 0x12345678 5
+. 48 C1 E7 07 C3
+
+salq $7, %rdx
+. 1210 0x12345678 5
+. 48 C1 E2 07 C3
+
+sarl $31, %ecx
+. 1211 0x12345678 4
+. C1 F9 1F C3
+
+sarl $3, %ecx
+. 1212 0x12345678 4
+. C1 F9 03 C3
+
+sarl $5, %eax
+. 1213 0x12345678 4
+. C1 F8 05 C3
+
+sarl $5, %edx
+. 1214 0x12345678 4
+. C1 FA 05 C3
+
+sarl $8, %ecx
+. 1215 0x12345678 4
+. C1 F9 08 C3
+
+sarl $8, %edx
+. 1216 0x12345678 4
+. C1 FA 08 C3
+
+sarl %cl, %eax
+. 1217 0x12345678 3
+. D3 F8 C3
+
+sarl %cl, %esi
+. 1218 0x12345678 3
+. D3 FE C3
+
+sarl %eax
+. 1219 0x12345678 3
+. D1 F8 C3
+
+sarl %edi
+. 1220 0x12345678 3
+. D1 FF C3
+
+seta %al
+. 1221 0x12345678 4
+. 0F 97 C0 C3
+
+sete %al
+. 1222 0x12345678 4
+. 0F 94 C0 C3
+
+setg %al
+. 1223 0x12345678 4
+. 0F 9F C0 C3
+
+setg %dl
+. 1224 0x12345678 4
+. 0F 9F C2 C3
+
+setge %dl
+. 1225 0x12345678 4
+. 0F 9D C2 C3
+
+setle %al
+. 1226 0x12345678 4
+. 0F 9E C0 C3
+
+setle %dl
+. 1227 0x12345678 4
+. 0F 9E C2 C3
+
+setne %al
+. 1228 0x12345678 4
+. 0F 95 C0 C3
+
+shrl $16, %ecx
+. 1229 0x12345678 4
+. C1 E9 10 C3
+
+shrl $16, %edi
+. 1230 0x12345678 4
+. C1 EF 10 C3
+
+shrl $16, %esi
+. 1231 0x12345678 4
+. C1 EE 10 C3
+
+shrl $16, %r8d
+. 1232 0x12345678 5
+. 41 C1 E8 10 C3
+
+shrl $24, %r8d
+. 1233 0x12345678 5
+. 41 C1 E8 18 C3
+
+shrl $31, %eax
+. 1234 0x12345678 4
+. C1 E8 1F C3
+
+shrl $31, %edx
+. 1235 0x12345678 4
+. C1 EA 1F C3
+
+shrl %eax
+. 1236 0x12345678 3
+. D1 E8 C3
+
+shrq $32, %rax
+. 1237 0x12345678 5
+. 48 C1 E8 20 C3
+
+shrq $32, %rcx
+. 1238 0x12345678 5
+. 48 C1 E9 20 C3
+
+shrw $8, %dx
+. 1239 0x12345678 5
+. 66 C1 EA 08 C3
+
+subl 16(%rsp), %edx
+. 1240 0x12345678 5
+. 2B 54 24 10 C3
+
+subl 16(%rsp), %esi
+. 1241 0x12345678 5
+. 2B 74 24 10 C3
+
+subl 20(%rsp), %eax
+. 1242 0x12345678 5
+. 2B 44 24 14 C3
+
+subl 20(%rsp), %edx
+. 1243 0x12345678 5
+. 2B 54 24 14 C3
+
+subl 24(%rsp), %r8d
+. 1244 0x12345678 6
+. 44 2B 44 24 18 C3
+
+subl 28(%rsp), %eax
+. 1245 0x12345678 5
+. 2B 44 24 1C C3
+
+subl $4, %ebx
+. 1246 0x12345678 4
+. 83 EB 04 C3
+
+subl $5, %ecx
+. 1247 0x12345678 4
+. 83 E9 05 C3
+
+subl 672(%rbp,%rax,4), %r13d
+. 1248 0x12345678 9
+. 44 2B AC 85 A0 02 00 00 C3
+
+subl $8, 644(%r11)
+. 1249 0x12345678 9
+. 41 83 AB 84 02 00 00 08 C3
+
+subl $8, 644(%rdi)
+. 1250 0x12345678 8
+. 83 AF 84 02 00 00 08 C3
+
+subl $8, 644(%rsi)
+. 1251 0x12345678 8
+. 83 AE 84 02 00 00 08 C3
+
+subl $8, %r11d
+. 1252 0x12345678 5
+. 41 83 EB 08 C3
+
+subl %eax, %ecx
+. 1253 0x12345678 3
+. 29 C1 C3
+
+subl %eax, %edx
+. 1254 0x12345678 3
+. 29 C2 C3
+
+subl %eax, %esi
+. 1255 0x12345678 3
+. 29 C6 C3
+
+subl %ebp, %eax
+. 1256 0x12345678 3
+. 29 E8 C3
+
+subl %ebx, %edx
+. 1257 0x12345678 3
+. 29 DA C3
+
+subl %ecx, %eax
+. 1258 0x12345678 3
+. 29 C8 C3
+
+subl %ecx, %r11d
+. 1259 0x12345678 4
+. 41 29 CB C3
+
+subl %ecx, %r9d
+. 1260 0x12345678 4
+. 41 29 C9 C3
+
+subl %edi, %eax
+. 1261 0x12345678 3
+. 29 F8 C3
+
+subl %edi, %ecx
+. 1262 0x12345678 3
+. 29 F9 C3
+
+subl %edi, %edx
+. 1263 0x12345678 3
+. 29 FA C3
+
+subl %edi, %esi
+. 1264 0x12345678 3
+. 29 FE C3
+
+subl %edi, %r8d
+. 1265 0x12345678 4
+. 41 29 F8 C3
+
+subl %edx, %ebx
+. 1266 0x12345678 3
+. 29 D3 C3
+
+subl %esi, %eax
+. 1267 0x12345678 3
+. 29 F0 C3
+
+subl %esi, %edx
+. 1268 0x12345678 3
+. 29 F2 C3
+
+subl %esi, %r9d
+. 1269 0x12345678 4
+. 41 29 F1 C3
+
+subl %r10d, %eax
+. 1270 0x12345678 4
+. 44 29 D0 C3
+
+subl %r10d, %ecx
+. 1271 0x12345678 4
+. 44 29 D1 C3
+
+subl %r11d, %ecx
+. 1272 0x12345678 4
+. 44 29 D9 C3
+
+subl %r11d, %edi
+. 1273 0x12345678 4
+. 44 29 DF C3
+
+subl %r12d, %eax
+. 1274 0x12345678 4
+. 44 29 E0 C3
+
+subl %r12d, %ecx
+. 1275 0x12345678 4
+. 44 29 E1 C3
+
+subl %r12d, %edx
+. 1276 0x12345678 4
+. 44 29 E2 C3
+
+subl %r13d, 12(%rsp)
+. 1277 0x12345678 6
+. 44 29 6C 24 0C C3
+
+subl %r13d, %eax
+. 1278 0x12345678 4
+. 44 29 E8 C3
+
+subl %r13d, %edx
+. 1279 0x12345678 4
+. 44 29 EA C3
+
+subl %r14d, %edi
+. 1280 0x12345678 4
+. 44 29 F7 C3
+
+subl %r15d, %eax
+. 1281 0x12345678 4
+. 44 29 F8 C3
+
+subl %r15d, %edx
+. 1282 0x12345678 4
+. 44 29 FA C3
+
+subl %r15d, %r9d
+. 1283 0x12345678 4
+. 45 29 F9 C3
+
+subl %r8d, %eax
+. 1284 0x12345678 4
+. 44 29 C0 C3
+
+subl %r8d, %ecx
+. 1285 0x12345678 4
+. 44 29 C1 C3
+
+subl %r8d, %edx
+. 1286 0x12345678 4
+. 44 29 C2 C3
+
+subl %r9d, %ecx
+. 1287 0x12345678 4
+. 44 29 C9 C3
+
+subl (%rbp,%rax), %edi
+. 1288 0x12345678 5
+. 2B 7C 05 00 C3
+
+subl (%rbp,%rdx), %eax
+. 1289 0x12345678 5
+. 2B 44 15 00 C3
+
+subq $104, %rsp
+. 1290 0x12345678 5
+. 48 83 EC 68 C3
+
+subq $1304, %rsp
+. 1291 0x12345678 8
+. 48 81 EC 18 05 00 00 C3
+
+subq $2104, %rsp
+. 1292 0x12345678 8
+. 48 81 EC 38 08 00 00 C3
+
+subq $264, %rsp
+. 1293 0x12345678 8
+. 48 81 EC 08 01 00 00 C3
+
+subq $3400, %rsp
+. 1294 0x12345678 8
+. 48 81 EC 48 0D 00 00 C3
+
+subq $56, %rsp
+. 1295 0x12345678 5
+. 48 83 EC 38 C3
+
+subq $72, %rsp
+. 1296 0x12345678 5
+. 48 83 EC 48 C3
+
+subq $824, %rsp
+. 1297 0x12345678 8
+. 48 81 EC 38 03 00 00 C3
+
+subq $8, %rsp
+. 1298 0x12345678 5
+. 48 83 EC 08 C3
+
+testb $1, %al
+. 1299 0x12345678 3
+. A8 01 C3
+
+testb $1, %dil
+. 1300 0x12345678 5
+. 40 F6 C7 01 C3
+
+testb $1, %dl
+. 1301 0x12345678 4
+. F6 C2 01 C3
+
+testb %al, %al
+. 1302 0x12345678 3
+. 84 C0 C3
+
+testb %bpl, %bpl
+. 1303 0x12345678 4
+. 40 84 ED C3
+
+testl $2097152, %eax
+. 1304 0x12345678 6
+. A9 00 00 20 00 C3
+
+testl %ebp, %ebp
+. 1305 0x12345678 3
+. 85 ED C3
+
+testl %ebp, (%rbx,%rax,4)
+. 1306 0x12345678 4
+. 85 2C 83 C3
+
+testl %ebx, %ebx
+. 1307 0x12345678 3
+. 85 DB C3
+
+testl %ecx, %ecx
+. 1308 0x12345678 3
+. 85 C9 C3
+
+testl %edi, %edi
+. 1309 0x12345678 3
+. 85 FF C3
+
+testl %edi, (%rbx,%rax,4)
+. 1310 0x12345678 4
+. 85 3C 83 C3
+
+testl %edx, (%rbx,%rax,4)
+. 1311 0x12345678 4
+. 85 14 83 C3
+
+testl %esi, %esi
+. 1312 0x12345678 3
+. 85 F6 C3
+
+testl %esi, (%rbx,%rax,4)
+. 1313 0x12345678 4
+. 85 34 83 C3
+
+testl %r11d, %r11d
+. 1314 0x12345678 4
+. 45 85 DB C3
+
+testl %r13d, %r13d
+. 1315 0x12345678 4
+. 45 85 ED C3
+
+testl %r14d, %r14d
+. 1316 0x12345678 4
+. 45 85 F6 C3
+
+testl %r8d, %r8d
+. 1317 0x12345678 4
+. 45 85 C0 C3
+
+testl %r8d, (%rbx,%rax,4)
+. 1318 0x12345678 5
+. 44 85 04 83 C3
+
+xorl %edx, %eax
+. 1319 0x12345678 3
+. 31 D0 C3
+
+nop
+. 1320 0x12345678 2
+. 90 C3
+
diff --git a/main/VEX/orig_amd64/test1.sorted b/main/VEX/orig_amd64/test1.sorted
new file mode 100644
index 0000000..993949b
--- /dev/null
+++ b/main/VEX/orig_amd64/test1.sorted
@@ -0,0 +1,1318 @@
+0384941C040000 addl 1052(%rsp,%rdx,4), %eax
+034B6C addl 108(%rbx), %ecx
+83C002 addl $2, %eax
+83C202 addl $2, %edx
+83C120 addl $32, %ecx
+83C620 addl $32, %esi
+4183C431 addl $49, %r12d
+83C104 addl $4, %ecx
+034495FC addl -4(%rbp,%rdx,4), %eax
+0388B8C90000 addl 51640(%rax), %ecx
+038C05B8C90000 addl 51640(%rbp,%rax), %ecx
+038AB8C90000 addl 51640(%rdx), %ecx
+03B0BCC90000 addl 51644(%rax), %esi
+03B2BCC90000 addl 51644(%rdx), %esi
+03B8C0C90000 addl 51648(%rax), %edi
+03BAC0C90000 addl 51648(%rdx), %edi
+83C005 addl $5, %eax
+4183C605 addl $5, %r14d
+4403AC85A0020000 addl 672(%rbp,%rax,4), %r13d
+01D8 addl %ebx, %eax
+4101C9 addl %ecx, %r9d
+01D0 addl %edx, %eax
+4401E0 addl %r12d, %eax
+4501E5 addl %r12d, %r13d
+4401E8 addl %r13d, %eax
+037C8500 addl (%rbp,%rax,4), %edi
+4883C468 addq $104, %rsp
+4881C418050000 addq $1304, %rsp
+4881C438080000 addq $2104, %rsp
+4881C408010000 addq $264, %rsp
+48034320 addq 32(%rbx), %rax
+4881C4480D0000 addq $3400, %rsp
+4883C438 addq $56, %rsp
+4883C448 addq $72, %rsp
+4881C438030000 addq $824, %rsp
+4883C408 addq $8, %rsp
+4801C0 addq %rax, %rax
+4801C7 addq %rax, %rdi
+4801C2 addq %rax, %rdx
+4801E8 addq %rbp, %rax
+4801EA addq %rbp, %rdx
+4801EE addq %rbp, %rsi
+4801C8 addq %rcx, %rax
+4801D0 addq %rdx, %rax
+4801D2 addq %rdx, %rdx
+4801F2 addq %rsi, %rdx
+6601544450 addw %dx, 80(%rsp,%rax,2)
+25FFFFDFFF andl $-2097153, %eax
+81E2FFFFDFFF andl $-2097153, %edx
+4181E4FFFFDFFF andl $-2097153, %r12d
+4181E7FFFFDFFF andl $-2097153, %r15d
+4181E0FFFFDFFF andl $-2097153, %r8d
+4181E0FF000000 andl $255, %r8d
+83E0FE andl $-2, %eax
+83E11F andl $31, %ecx
+25FF7F0000 andl $32767, %eax
+21D0 andl %edx, %eax
+211483 andl %edx, (%rbx,%rax,4)
+21F2 andl %esi, %edx
+E862160000 call lalala
+99 cltd
+4898 cltq
+0F47D1 cmova %ecx, %edx
+0F43F8 cmovae %eax, %edi
+0F43F0 cmovae %eax, %esi
+0F4FC8 cmovg %eax, %ecx
+0F4FF8 cmovg %eax, %edi
+0F4FF0 cmovg %eax, %esi
+440F4FE0 cmovg %eax, %r12d
+0F4DC8 cmovge %eax, %ecx
+410F4FC5 cmovg %r13d, %eax
+440F4CE8 cmovl %eax, %r13d
+0F4EC8 cmovle %eax, %ecx
+0F4EF0 cmovle %eax, %esi
+0F45D0 cmovne %eax, %edx
+0F45D7 cmovne %edi, %edx
+80BC058000000000 cmpb $0, 128(%rbp,%rax)
+80BC178000000000 cmpb $0, 128(%rdi,%rdx)
+80BC05FA4C000000 cmpb $0, 19706(%rbp,%rax)
+80BC044008000000 cmpb $0, 2112(%rsp,%rax)
+80BC344008000000 cmpb $0, 2112(%rsp,%rsi)
+807C042000 cmpb $0, 32(%rsp,%rax)
+4138C2 cmpb %al, %r10b
+4038CE cmpb %cl, %sil
+38D1 cmpb %dl, %cl
+4038F1 cmpb %sil, %cl
+4038F2 cmpb %sil, %dl
+40383424 cmpb %sil, (%rsp)
+83BC944004000000 cmpl $0, 1088(%rsp,%rdx,4)
+837B6C00 cmpl $0, 108(%rbx)
+837F6C00 cmpl $0, 108(%rdi)
+837C240C00 cmpl $0, 12(%rsp)
+837C241400 cmpl $0, 20(%rsp)
+837C241800 cmpl $0, 24(%rsp)
+837C842000 cmpl $0, 32(%rsp,%rax,4)
+83BF8402000000 cmpl $0, 644(%rdi)
+83BD9C02000000 cmpl $0, 668(%rbp)
+41833C8600 cmpl $0, (%r14,%rax,4)
+833800 cmpl $0, (%rax)
+833C8300 cmpl $0, (%rbx,%rax,4)
+833F00 cmpl $0, (%rdi)
+833E00 cmpl $0, (%rsi)
+83F965 cmpl $101, %ecx
+443BA4BC40040000 cmpl 1088(%rsp,%rdi,4), %r12d
+443BA49440040000 cmpl 1088(%rsp,%rdx,4), %r12d
+3B536C cmpl 108(%rbx), %edx
+443B4B6C cmpl 108(%rbx), %r9d
+81BD9C020000AF040000 cmpl $1199, 668(%rbp)
+443B437C cmpl 124(%rbx), %r8d
+3B54240C cmpl 12(%rsp), %edx
+837B30FF cmpl $-1, 48(%rbx)
+4183FD0E cmpl $14, %r13d
+83FF0F cmpl $15, %edi
+4183F80F cmpl $15, %r8d
+83BB9002000001 cmpl $1, 656(%rbx)
+83BB9402000001 cmpl $1, 660(%rbx)
+83BF9402000001 cmpl $1, 660(%rdi)
+3B542410 cmpl 16(%rsp), %edx
+4183FC11 cmpl $17, %r12d
+817C241852460000 cmpl $18002, 24(%rsp)
+81BD9C020000C7000000 cmpl $199, 668(%rbp)
+83F813 cmpl $19, %eax
+83FB01 cmpl $1, %ebx
+83F9FF cmpl $-1, %ecx
+83FF01 cmpl $1, %edi
+83FA01 cmpl $1, %edx
+83FEFF cmpl $-1, %esi
+83FE01 cmpl $1, %esi
+4183FDFF cmpl $-1, %r13d
+4183FD01 cmpl $1, %r13d
+4183F9FF cmpl $-1, %r9d
+833C83FF cmpl $-1, (%rbx,%rax,4)
+3B7C2414 cmpl 20(%rsp), %edi
+3B542414 cmpl 20(%rsp), %edx
+81BD9C0200005F090000 cmpl $2399, 668(%rbp)
+3B5C2418 cmpl 24(%rsp), %ebx
+3B7C2418 cmpl 24(%rsp), %edi
+81FBFE000000 cmpl $254, %ebx
+81FBFF000000 cmpl $255, %ebx
+81F9FF000000 cmpl $255, %ecx
+81FFFF000000 cmpl $255, %edi
+81FAFF000000 cmpl $255, %edx
+4181FCFF000000 cmpl $255, %r12d
+81FF00010000 cmpl $256, %edi
+81FE00010000 cmpl $256, %esi
+83BD9002000002 cmpl $2, 656(%rbp)
+83BF9002000002 cmpl $2, 656(%rdi)
+3B7C241C cmpl 28(%rsp), %edi
+443B64241C cmpl 28(%rsp), %r12d
+443B6C241C cmpl 28(%rsp), %r13d
+83FB02 cmpl $2, %ebx
+4183FD02 cmpl $2, %r13d
+83FF1F cmpl $31, %edi
+837C241403 cmpl $3, 20(%rsp)
+837C242003 cmpl $3, 32(%rsp)
+83FB21 cmpl $33, %ebx
+4183F921 cmpl $33, %r9d
+83F803 cmpl $3, %eax
+4183FD03 cmpl $3, %r13d
+4183F803 cmpl $3, %r8d
+4183F903 cmpl $3, %r9d
+83F831 cmpl $49, %eax
+81BD9C02000057020000 cmpl $599, 668(%rbp)
+83FB05 cmpl $5, %ebx
+443B648440 cmpl 64(%rsp,%rax,4), %r12d
+443B64BC40 cmpl 64(%rsp,%rdi,4), %r12d
+3B449440 cmpl 64(%rsp,%rdx,4), %eax
+3DFEFF0000 cmpl $65534, %eax
+81FAFEFF0000 cmpl $65534, %edx
+3DFFFF0000 cmpl $65535, %eax
+81FB00000100 cmpl $65536, %ebx
+3B959C020000 cmpl 668(%rbp), %edx
+443BA59C020000 cmpl 668(%rbp), %r12d
+4183FE06 cmpl $6, %r14d
+4183BB8402000007 cmpl $7, 644(%r11)
+83BD8402000007 cmpl $7, 644(%rbp)
+83BB8402000007 cmpl $7, 644(%rbx)
+83BF8402000007 cmpl $7, 644(%rdi)
+83BE8402000007 cmpl $7, 644(%rsi)
+4183FE07 cmpl $7, %r14d
+837C240C63 cmpl $99, 12(%rsp)
+837C241863 cmpl $99, 24(%rsp)
+81FD0F270000 cmpl $9999, %ebp
+83F809 cmpl $9, %eax
+39449440 cmpl %eax, 64(%rsp,%rdx,4)
+39C1 cmpl %eax, %ecx
+39C7 cmpl %eax, %edi
+39C2 cmpl %eax, %edx
+39C6 cmpl %eax, %esi
+4139C5 cmpl %eax, %r13d
+4139C0 cmpl %eax, %r8d
+39EF cmpl %ebp, %edi
+4139EC cmpl %ebp, %r12d
+39C8 cmpl %ecx, %eax
+4139CD cmpl %ecx, %r13d
+39F8 cmpl %edi, %eax
+4139FA cmpl %edi, %r10d
+39D1 cmpl %edx, %ecx
+39D7 cmpl %edx, %edi
+391578563412 cmpl %edx, 0x12345678(%rip)
+4139D4 cmpl %edx, %r12d
+4139D1 cmpl %edx, %r9d
+391481 cmpl %edx, (%rcx,%rax,4)
+4539D1 cmpl %r10d, %r9d
+453B0482 cmpl (%r10,%rax,4), %r8d
+4439D9 cmpl %r11d, %ecx
+4439E0 cmpl %r12d, %eax
+4439E5 cmpl %r12d, %ebp
+4439E7 cmpl %r12d, %edi
+44396C2410 cmpl %r13d, 16(%rsp)
+4439E8 cmpl %r13d, %eax
+4439ED cmpl %r13d, %ebp
+4439EF cmpl %r13d, %edi
+4439EA cmpl %r13d, %edx
+4539EC cmpl %r13d, %r12d
+4439F0 cmpl %r14d, %eax
+4439F3 cmpl %r14d, %ebx
+4439F7 cmpl %r14d, %edi
+4539F4 cmpl %r14d, %r12d
+4539F5 cmpl %r14d, %r13d
+4539FE cmpl %r15d, %r14d
+4439C7 cmpl %r8d, %edi
+4439C6 cmpl %r8d, %esi
+4439CA cmpl %r9d, %edx
+664139C2 cmpw %ax, %r10w
+FF4C240C decl 12(%rsp)
+FF4C2418 decl 24(%rsp)
+FF4C8420 decl 32(%rsp,%rax,4)
+FFC8 decl %eax
+FFCD decl %ebp
+FFCB decl %ebx
+FFC9 decl %ecx
+FFCF decl %edi
+FFCE decl %esi
+41FFCA decl %r10d
+41FFCB decl %r11d
+41FFCC decl %r12d
+41FFC8 decl %r8d
+41FF09 decl (%r9)
+F7FB idivl %ebx
+69442408C51D0000 imull $7621, 8(%rsp), %eax
+440FAFE0 imull %eax, %r12d
+4869C056555555 imulq $1431655766, %rax, %rax
+480FAFC2 imulq %rdx, %rax
+FF848420040000 incl 1056(%rsp,%rax,4)
+41FF4374 incl 116(%r11)
+FF4774 incl 116(%rdi)
+FF4674 incl 116(%rsi)
+FF477C incl 124(%rdi)
+FF44240C incl 12(%rsp)
+FF442418 incl 24(%rsp)
+FF848588B10000 incl 45448(%rbp,%rax,4)
+FF849588B10000 incl 45448(%rbp,%rdx,4)
+FF44B430 incl 48(%rsp,%rsi,4)
+FF83A0020000 incl 672(%rbx)
+FF8483A0020000 incl 672(%rbx,%rax,4)
+FF83A4020000 incl 676(%rbx)
+FF8483A4020000 incl 676(%rbx,%rax,4)
+FFC0 incl %eax
+FFC5 incl %ebp
+FFC3 incl %ebx
+FFC1 incl %ecx
+FFC7 incl %edi
+FFC2 incl %edx
+FFC6 incl %esi
+41FFC2 incl %r10d
+41FFC3 incl %r11d
+41FFC4 incl %r12d
+41FFC5 incl %r13d
+41FFC6 incl %r14d
+41FFC0 incl %r8d
+41FFC1 incl %r9d
+FF448500 incl (%rbp,%rax,4)
+48FFC2 incq %rdx
+0F87DD120000 ja lalala
+0F86D7120000 jbe lalala
+0F84D1120000 je lalala
+0F8DCB120000 jge lalala
+0F8FC5120000 jg lalala
+0F8EBF120000 jle lalala
+0F8CB9120000 jl lalala
+E9B4120000 jmp lalala
+0F85AE120000 jne lalala
+0F89A8120000 jns lalala
+0F88A2120000 js lalala
+418D7BFF leal -1(%r11), %edi
+418D4404FF leal -1(%r12,%rax), %eax
+418D4501 leal 1(%r13), %eax
+418D5501 leal 1(%r13), %edx
+418D5001 leal 1(%r8), %edx
+8D7001 leal 1(%rax), %esi
+448D70FF leal -1(%rax), %r14d
+468D440001 leal 1(%rax,%r8), %r8d
+8D4C0801 leal 1(%rax,%rcx), %ecx
+8D7501 leal 1(%rbp), %esi
+8D43FF leal -1(%rbx), %eax
+8D41FF leal -1(%rcx), %eax
+8D4101 leal 1(%rcx), %eax
+8D4701 leal 1(%rdi), %eax
+8D4F01 leal 1(%rdi), %ecx
+8D42FF leal -1(%rdx), %eax
+8D4201 leal 1(%rdx), %eax
+8D6EFF leal -1(%rsi), %ebp
+448D66FF leal -1(%rsi), %r12d
+448D4EFF leal -1(%rsi), %r9d
+8D43FE leal -2(%rbx), %eax
+8D47FE leal -2(%rdi), %eax
+418D451F leal 31(%r13), %eax
+8D5522 leal 34(%rbp), %edx
+8D4523 leal 35(%rbp), %eax
+8D43FD leal -3(%rbx), %eax
+8D7030 leal 48(%rax), %esi
+418D7EFC leal -4(%r14), %edi
+8D4F04 leal 4(%rdi), %ecx
+8D4107 leal 7(%rcx), %eax
+458D5808 leal 8(%r8), %r11d
+438D0C2A leal (%r10,%r13), %ecx
+438D0404 leal (%r12,%r8), %eax
+418D547D00 leal (%r13,%rdi,2), %edx
+418D443500 leal (%r13,%rsi), %eax
+438D042E leal (%r14,%r13), %eax
+438D0410 leal (%r8,%r10), %eax
+418D0410 leal (%r8,%rdx), %eax
+438D3C39 leal (%r9,%r15), %edi
+428D0410 leal (%rax,%r10), %eax
+468D3C30 leal (%rax,%r14), %r15d
+428D0400 leal (%rax,%r8), %eax
+428D0408 leal (%rax,%r9), %eax
+8D0440 leal (%rax,%rax,2), %eax
+8D0438 leal (%rax,%rdi), %eax
+8D0410 leal (%rax,%rdx), %eax
+428D0409 leal (%rcx,%r9), %eax
+428D042F leal (%rdi,%r13), %eax
+428D042A leal (%rdx,%r13), %eax
+428D1402 leal (%rdx,%r8), %edx
+428D140A leal (%rdx,%r9), %edx
+8D040A leal (%rdx,%rcx), %eax
+8D143A leal (%rdx,%rdi), %edx
+428D042E leal (%rsi,%r13), %eax
+428D043E leal (%rsi,%r15), %eax
+8D040E leal (%rsi,%rcx), %eax
+8D0476 leal (%rsi,%rsi,2), %eax
+498D5301 leaq 1(%r11), %rdx
+488D442414 leaq 20(%rsp), %rax
+4C8D940140930000 leaq 37696(%rcx,%rax), %r10
+4C8D8C0140930000 leaq 37696(%rcx,%rax), %r9
+488DBC454C930000 leaq 37708(%rbp,%rax,2), %rdi
+488DBC7D4C930000 leaq 37708(%rbp,%rdi,2), %rdi
+488DB47D4C930000 leaq 37708(%rbp,%rdi,2), %rsi
+4C8D84C558990000 leaq 39256(%rbp,%rax,8), %r8
+488DBCFD58990000 leaq 39256(%rbp,%rdi,8), %rdi
+488DB4FD88B10000 leaq 45448(%rbp,%rdi,8), %rsi
+488D1400 leaq (%rax,%rax), %rdx
+488D0410 leaq (%rax,%rdx), %rax
+4C8D6C4500 leaq (%rbp,%rax,2), %r13
+488D444500 leaq (%rbp,%rax,2), %rax
+488D4C4500 leaq (%rbp,%rax,2), %rcx
+488D544500 leaq (%rbp,%rax,2), %rdx
+488D540500 leaq (%rbp,%rax), %rdx
+488D545500 leaq (%rbp,%rdx,2), %rdx
+488D1432 leaq (%rdx,%rsi), %rdx
+C684044008000000 movb $0, 2112(%rsp,%rax)
+C644042000 movb $0, 32(%rsp,%rax)
+C684084A92000000 movb $0, 37450(%rax,%rcx)
+C684044008000001 movb $1, 2112(%rsp,%rax)
+C6440C2001 movb $1, 32(%rsp,%rcx)
+C684084A9200000F movb $15, 37450(%rax,%rcx)
+C684104C9300000F movb $15, 37708(%rax,%rdx)
+88442401 movb %al, 1(%rsp)
+88841780010000 movb %al, 384(%rdi,%rdx)
+880411 movb %al, (%rcx,%rdx)
+8802 movb %al, (%rdx)
+884C2420 movb %cl, 32(%rsp)
+880C24 movb %cl, (%rsp)
+40887C0420 movb %dil, 32(%rsp,%rax)
+889405A8060000 movb %dl, 1704(%rbp,%rax)
+88540420 movb %dl, 32(%rsp,%rax)
+881430 movb %dl, (%rax,%rsi)
+44888405FA4C0000 movb %r8b, 19706(%rbp,%rax)
+44880C04 movb %r9b, (%rsp,%rax)
+89C0 mov %eax, %eax
+89F8 mov %edi, %eax
+89F0 mov %esi, %eax
+C784842004000000000000 movl $0, 1056(%rsp,%rax,4)
+C7477400000000 movl $0, 116(%rdi)
+C7477C00000000 movl $0, 124(%rdi)
+C744240C00000000 movl $0, 12(%rsp)
+C744241800000000 movl $0, 24(%rsp)
+C744241C00000000 movl $0, 28(%rsp)
+C7848588B1000000000000 movl $0, 45448(%rbp,%rax,4)
+C744843000000000 movl $0, 48(%rsp,%rax,4)
+C7878002000000000000 movl $0, 640(%rdi)
+C7878402000000000000 movl $0, 644(%rdi)
+C78483A002000000000000 movl $0, 672(%rbx,%rax,4)
+C744240800000000 movl $0, 8(%rsp)
+B800000000 movl $0, %eax
+BB00000000 movl $0, %ebx
+B900000000 movl $0, %ecx
+BF00000000 movl $0, %edi
+BA00000000 movl $0, %edx
+41BC00000000 movl $0, %r12d
+41BD00000000 movl $0, %r13d
+41B800000000 movl $0, %r8d
+41B900000000 movl $0, %r9d
+C744850000000000 movl $0, (%rbp,%rax,4)
+C7048300000000 movl $0, (%rbx,%rax,4)
+BFE9030000 movl $1001, %edi
+BFEA030000 movl $1002, %edi
+BFEB030000 movl $1003, %edi
+BFEC030000 movl $1004, %edi
+BFED030000 movl $1005, %edi
+BFEE030000 movl $1006, %edi
+BFEF030000 movl $1007, %edi
+B864000000 movl $100, %eax
+BE68000000 movl $104, %esi
+8B8C8420040000 movl 1056(%rsp,%rax,4), %ecx
+8BB48420040000 movl 1056(%rsp,%rax,4), %esi
+8B849420040000 movl 1056(%rsp,%rdx,4), %eax
+8B849440040000 movl 1088(%rsp,%rdx,4), %eax
+8B84B440040000 movl 1088(%rsp,%rsi,4), %eax
+448B4B6C movl 108(%rbx), %r9d
+8B6F6C movl 108(%rdi), %ebp
+8B576C movl 108(%rdi), %edx
+BF0A000000 movl $10, %edi
+C744240C01000000 movl $1, 12(%rsp)
+8B442470 movl 112(%rsp), %eax
+8B7C2470 movl 112(%rsp), %edi
+BE72000000 movl $114, %esi
+8B4574 movl 116(%rbp), %eax
+8B5574 movl 116(%rbp), %edx
+C744241001000000 movl $1, 16(%rsp)
+8B457C movl 124(%rbp), %eax
+8B537C movl 124(%rbx), %edx
+448B537C movl 124(%rbx), %r10d
+448B477C movl 124(%rdi), %r8d
+C744241801000000 movl $1, 24(%rsp)
+8B44240C movl 12(%rsp), %eax
+8B54240C movl 12(%rsp), %edx
+448B44240C movl 12(%rsp), %r8d
+8B842450050000 movl 1360(%rsp), %eax
+BE90000000 movl $144, %esi
+C74330FFFFFFFF movl $-1, 48(%rbx)
+41B80F000000 movl $15, %r8d
+8B542410 movl 16(%rsp), %edx
+448B748410 movl 16(%rsp,%rax,4), %r14d
+B911000000 movl $17, %ecx
+B801000000 movl $1, %eax
+BDFFFFFFFF movl $-1, %ebp
+BB01000000 movl $1, %ebx
+B9FFFFFFFF movl $-1, %ecx
+BF01000000 movl $1, %edi
+BAFFFFFFFF movl $-1, %edx
+BA01000000 movl $1, %edx
+BE01000000 movl $1, %esi
+41BE01000000 movl $1, %r14d
+41B801000000 movl $1, %r8d
+41B901000000 movl $1, %r9d
+BEFFFFDFFF movl $-2097153, %esi
+8B442414 movl 20(%rsp), %eax
+8B4C2414 movl 20(%rsp), %ecx
+8B542414 movl 20(%rsp), %edx
+8B742414 movl 20(%rsp), %esi
+448B5C2414 movl 20(%rsp), %r11d
+448B642414 movl 20(%rsp), %r12d
+448B442414 movl 20(%rsp), %r8d
+448B4C2414 movl 20(%rsp), %r9d
+8B848440090000 movl 2368(%rsp,%rax,4), %eax
+8B948440090000 movl 2368(%rsp,%rax,4), %edx
+448BAC8440090000 movl 2368(%rsp,%rax,4), %r13d
+448B848440090000 movl 2368(%rsp,%rax,4), %r8d
+BE17000000 movl $23, %esi
+41B818000000 movl $24, %r8d
+8B4C2418 movl 24(%rsp), %ecx
+8B7C2418 movl 24(%rsp), %edi
+448B442418 movl 24(%rsp), %r8d
+BA1B000000 movl $27, %edx
+BAABAAAAAA movl $2863311531, %edx
+8B4C241C movl 28(%rsp), %ecx
+8B7C241C movl 28(%rsp), %edi
+8B54241C movl 28(%rsp), %edx
+448B64241C movl 28(%rsp), %r12d
+41BA02000000 movl $2, %r10d
+41BE02000000 movl $2, %r14d
+41B902000000 movl $2, %r9d
+C7042402000000 movl $2, (%rsp)
+BFB90B0000 movl $3001, %edi
+BFBA0B0000 movl $3002, %edi
+BFBB0B0000 movl $3003, %edi
+BFBC0B0000 movl $3004, %edi
+BFBD0B0000 movl $3005, %edi
+BFBE0B0000 movl $3006, %edi
+BFBF0B0000 movl $3007, %edi
+41BD20000000 movl $32, %r13d
+8B442420 movl 32(%rsp), %eax
+448B6C2420 movl 32(%rsp), %r13d
+BA21000000 movl $33, %edx
+8B442424 movl 36(%rsp), %eax
+8B5C2424 movl 36(%rsp), %ebx
+8B4C2424 movl 36(%rsp), %ecx
+8B542424 movl 36(%rsp), %edx
+8B742424 movl 36(%rsp), %esi
+448B442424 movl 36(%rsp), %r8d
+BE26000000 movl $38, %esi
+448B8C8558990000 movl 39256(%rbp,%rax,4), %r9d
+41BC03000000 movl $3, %r12d
+41BE03000000 movl $3, %r14d
+41B803000000 movl $3, %r8d
+448BAC84A0010000 movl 416(%rsp,%rax,4), %r13d
+8B7B30 movl 48(%rbx), %edi
+8B442430 movl 48(%rsp), %eax
+8B542430 movl 48(%rsp), %edx
+8B548430 movl 48(%rsp,%rax,4), %edx
+8B9484F0010000 movl 496(%rsp,%rax,4), %edx
+BE31000000 movl $49, %esi
+41BE04000000 movl $4, %r14d
+8B448504 movl 4(%rbp,%rax,4), %eax
+8B449504 movl 4(%rbp,%rdx,4), %eax
+8B88B8C90000 movl 51640(%rax), %ecx
+8BB0BCC90000 movl 51644(%rax), %esi
+8BB8C0C90000 movl 51648(%rax), %edi
+8B442434 movl 52(%rsp), %eax
+8B542434 movl 52(%rsp), %edx
+BA35000000 movl $53, %edx
+BE38000000 movl $56, %esi
+8B442438 movl 56(%rsp), %eax
+418B8384020000 movl 644(%r11), %eax
+8B8784020000 movl 644(%rdi), %eax
+8B8684020000 movl 644(%rsi), %eax
+8B9684020000 movl 644(%rsi), %edx
+8B8B88020000 movl 648(%rbx), %ecx
+8BB388020000 movl 648(%rbx), %esi
+8B9788020000 movl 648(%rdi), %edx
+8B442440 movl 64(%rsp), %eax
+448B442440 movl 64(%rsp), %r8d
+8B44B440 movl 64(%rsp,%rsi,4), %eax
+8B938C020000 movl 652(%rbx), %edx
+8BB38C020000 movl 652(%rbx), %esi
+448B838C020000 movl 652(%rbx), %r8d
+8B878C020000 movl 652(%rdi), %eax
+BB00000100 movl $65536, %ebx
+448BAF90020000 movl 656(%rdi), %r13d
+BE41000000 movl $65, %esi
+8B9394020000 movl 660(%rbx), %edx
+8B959C020000 movl 668(%rbp), %edx
+448BA59C020000 movl 668(%rbp), %r12d
+8B8F9C020000 movl 668(%rdi), %ecx
+BE42000000 movl $66, %esi
+8B442444 movl 68(%rsp), %eax
+8B742444 movl 68(%rsp), %esi
+BE45000000 movl $69, %esi
+8B442448 movl 72(%rsp), %eax
+8B742448 movl 72(%rsp), %esi
+BE50000000 movl $80, %esi
+8B442450 movl 80(%rsp), %eax
+8B7C2450 movl 80(%rsp), %edi
+BE53000000 movl $83, %esi
+8B442454 movl 84(%rsp), %eax
+8B4C2454 movl 84(%rsp), %ecx
+8B7C2454 movl 84(%rsp), %edi
+8B4F58 movl 88(%rdi), %ecx
+8B442458 movl 88(%rsp), %eax
+8B4C2458 movl 88(%rsp), %ecx
+448BBC8480030000 movl 896(%rsp,%rax,4), %r15d
+BE59000000 movl $89, %esi
+41B808000000 movl $8, %r8d
+41B908000000 movl $8, %r9d
+8B542408 movl 8(%rsp), %edx
+BE5A000000 movl $90, %esi
+448B6C8460 movl 96(%rsp,%rax,4), %r13d
+B9FFC99A3B movl $999999999, %ecx
+89849420040000 movl %eax, 1056(%rsp,%rdx,4)
+8984B440040000 movl %eax, 1088(%rsp,%rsi,4)
+8944240C movl %eax, 12(%rsp)
+894496F0 movl %eax, -16(%rsi,%rdx,4)
+89442410 movl %eax, 16(%rsp)
+89442414 movl %eax, 20(%rsp)
+89848C40090000 movl %eax, 2368(%rsp,%rcx,4)
+8944241C movl %eax, 28(%rsp)
+89449420 movl %eax, 32(%rsp,%rdx,4)
+89442430 movl %eax, 48(%rsp)
+898494F0010000 movl %eax, 496(%rsp,%rdx,4)
+894496FC movl %eax, -4(%rsi,%rdx,4)
+8986B8C90000 movl %eax, 51640(%rsi)
+8986BCC90000 movl %eax, 51644(%rsi)
+8986C0C90000 movl %eax, 51648(%rsi)
+89442434 movl %eax, 52(%rsp)
+89442438 movl %eax, 56(%rsp)
+41898384020000 movl %eax, 644(%r11)
+898784020000 movl %eax, 644(%rdi)
+898684020000 movl %eax, 644(%rsi)
+89448C40 movl %eax, 64(%rsp,%rcx,4)
+8944B440 movl %eax, 64(%rsp,%rsi,4)
+89878C020000 movl %eax, 652(%rdi)
+89442448 movl %eax, 72(%rsp)
+89442458 movl %eax, 88(%rsp)
+89849480030000 movl %eax, 896(%rsp,%rdx,4)
+89442408 movl %eax, 8(%rsp)
+89442460 movl %eax, 96(%rsp)
+89449460 movl %eax, 96(%rsp,%rdx,4)
+89C1 movl %eax, %ecx
+89C7 movl %eax, %edi
+89C2 movl %eax, %edx
+89C6 movl %eax, %esi
+4189C7 movl %eax, %r15d
+89448D00 movl %eax, (%rbp,%rcx,4)
+89449500 movl %eax, (%rbp,%rdx,4)
+89048B movl %eax, (%rbx,%rcx,4)
+8904B3 movl %eax, (%rbx,%rsi,4)
+890497 movl %eax, (%rdi,%rdx,4)
+89E8 movl %ebp, %eax
+89E9 movl %ebp, %ecx
+89EE movl %ebp, %esi
+4189EC movl %ebp, %r12d
+4189E8 movl %ebp, %r8d
+899C8440090000 movl %ebx, 2368(%rsp,%rax,4)
+89D8 movl %ebx, %eax
+89DA movl %ebx, %edx
+89DE movl %ebx, %esi
+4189DC movl %ebx, %r12d
+4189D8 movl %ebx, %r8d
+891C87 movl %ebx, (%rdi,%rax,4)
+894C2410 movl %ecx, 16(%rsp)
+894C8410 movl %ecx, 16(%rsp,%rax,4)
+894C2418 movl %ecx, 24(%rsp)
+894C241C movl %ecx, 28(%rsp)
+894C2424 movl %ecx, 36(%rsp)
+894C2450 movl %ecx, 80(%rsp)
+894C2454 movl %ecx, 84(%rsp)
+89C8 movl %ecx, %eax
+89CB movl %ecx, %ebx
+89CF movl %ecx, %edi
+89CA movl %ecx, %edx
+4189CC movl %ecx, %r12d
+4189CD movl %ecx, %r13d
+4189C8 movl %ecx, %r8d
+41890C90 movl %ecx, (%r8,%rdx,4)
+890C93 movl %ecx, (%rbx,%rdx,4)
+897C2440 movl %edi, 64(%rsp)
+897C2444 movl %edi, 68(%rsp)
+897C2454 movl %edi, 84(%rsp)
+897C2458 movl %edi, 88(%rsp)
+89F8 movl %edi, %eax
+89F9 movl %edi, %ecx
+89FA movl %edi, %edx
+4189FA movl %edi, %r10d
+4189FB movl %edi, %r11d
+893C86 movl %edi, (%rsi,%rax,4)
+89948C40040000 movl %edx, 1088(%rsp,%rcx,4)
+8954240C movl %edx, 12(%rsp)
+89542410 movl %edx, 16(%rsp)
+89542414 movl %edx, 20(%rsp)
+899424A0010000 movl %edx, 416(%rsp)
+895330 movl %edx, 48(%rbx)
+899484F0010000 movl %edx, 496(%rsp,%rax,4)
+89542434 movl %edx, 52(%rsp)
+89542438 movl %edx, 56(%rsp)
+899684020000 movl %edx, 644(%rsi)
+899788020000 movl %edx, 648(%rdi)
+89548460 movl %edx, 96(%rsp,%rax,4)
+89D0 movl %edx, %eax
+89D5 movl %edx, %ebp
+89D3 movl %edx, %ebx
+89D1 movl %edx, %ecx
+89D7 movl %edx, %edi
+89D6 movl %edx, %esi
+4189D4 movl %edx, %r12d
+41891487 movl %edx, (%r15,%rax,4)
+89B48420040000 movl %esi, 1056(%rsp,%rax,4)
+89B484A0010000 movl %esi, 416(%rsp,%rax,4)
+89742440 movl %esi, 64(%rsp)
+89742444 movl %esi, 68(%rsp)
+89F0 movl %esi, %eax
+89F5 movl %esi, %ebp
+89F3 movl %esi, %ebx
+89F1 movl %esi, %ecx
+89F2 movl %esi, %edx
+4189F0 movl %esi, %r8d
+893493 movl %esi, (%rbx,%rdx,4)
+448B248539300000 movl 12345(,%rax,4), %r12d
+BE78563412 movl $0x12345678, %esi
+4489D1 movl %r10d, %ecx
+4589D3 movl %r10d, %r11d
+4589D1 movl %r10d, %r9d
+458B0482 movl (%r10,%rax,4), %r8d
+4489642414 movl %r12d, 20(%rsp)
+448964241C movl %r12d, 28(%rsp)
+4489E0 movl %r12d, %eax
+4489E1 movl %r12d, %ecx
+4489E7 movl %r12d, %edi
+4489E2 movl %r12d, %edx
+4489E6 movl %r12d, %esi
+4589E2 movl %r12d, %r10d
+4589E0 movl %r12d, %r8d
+4489648500 movl %r12d, (%rbp,%rax,4)
+418B0C84 movl (%r12,%rax,4), %ecx
+4489AC84A0010000 movl %r13d, 416(%rsp,%rax,4)
+44896C2430 movl %r13d, 48(%rsp)
+44896C2434 movl %r13d, 52(%rsp)
+4489E8 movl %r13d, %eax
+4489ED movl %r13d, %ebp
+4489EB movl %r13d, %ebx
+4489EA movl %r13d, %edx
+4589EA movl %r13d, %r10d
+4589EB movl %r13d, %r11d
+4589EC movl %r13d, %r12d
+4589E8 movl %r13d, %r8d
+4589E9 movl %r13d, %r9d
+44892C24 movl %r13d, (%rsp)
+4489748410 movl %r14d, 16(%rsp,%rax,4)
+4489F0 movl %r14d, %eax
+4489F5 movl %r14d, %ebp
+4489F3 movl %r14d, %ebx
+4489F7 movl %r14d, %edi
+4489F2 movl %r14d, %edx
+4489F6 movl %r14d, %esi
+4589F3 movl %r14d, %r11d
+4589F0 movl %r14d, %r8d
+4589F1 movl %r14d, %r9d
+4489748500 movl %r14d, (%rbp,%rax,4)
+44897C2450 movl %r15d, 80(%rsp)
+44897C2454 movl %r15d, 84(%rsp)
+4489BC8480030000 movl %r15d, 896(%rsp,%rax,4)
+4489FD movl %r15d, %ebp
+4489FE movl %r15d, %esi
+4589FE movl %r15d, %r14d
+4589F8 movl %r15d, %r8d
+4589F9 movl %r15d, %r9d
+418B0487 movl (%r15,%rax,4), %eax
+418B1487 movl (%r15,%rax,4), %edx
+458B0487 movl (%r15,%rax,4), %r8d
+448944240C movl %r8d, 12(%rsp)
+4489442414 movl %r8d, 20(%rsp)
+4489848440090000 movl %r8d, 2368(%rsp,%rax,4)
+4489442420 movl %r8d, 32(%rsp)
+4489442424 movl %r8d, 36(%rsp)
+4489839C020000 movl %r8d, 668(%rbx)
+4489442444 movl %r8d, 68(%rsp)
+4489442448 movl %r8d, 72(%rsp)
+4489842480030000 movl %r8d, 896(%rsp)
+4489C2 movl %r8d, %edx
+4489C6 movl %r8d, %esi
+418B0C80 movl (%r8,%rax,4), %ecx
+458B1480 movl (%r8,%rax,4), %r10d
+458B0480 movl (%r8,%rax,4), %r8d
+44894C86F0 movl %r9d, -16(%rsi,%rax,4)
+44894C241C movl %r9d, 28(%rsp)
+44894C2420 movl %r9d, 32(%rsp)
+44898C24F0010000 movl %r9d, 496(%rsp)
+44894C86FC movl %r9d, -4(%rsi,%rax,4)
+4489CD movl %r9d, %ebp
+4489C9 movl %r9d, %ecx
+4489CF movl %r9d, %edi
+4489CA movl %r9d, %edx
+4589C8 movl %r9d, %r8d
+8B448500 movl (%rbp,%rax,4), %eax
+8B548500 movl (%rbp,%rax,4), %edx
+448B648500 movl (%rbp,%rax,4), %r12d
+448B748500 movl (%rbp,%rax,4), %r14d
+8B440500 movl (%rbp,%rax), %eax
+8B540500 movl (%rbp,%rax), %edx
+448B640500 movl (%rbp,%rax), %r12d
+448B440500 movl (%rbp,%rax), %r8d
+8B449500 movl (%rbp,%rdx,4), %eax
+8B541500 movl (%rbp,%rdx), %edx
+8B3C83 movl (%rbx,%rax,4), %edi
+8B1483 movl (%rbx,%rax,4), %edx
+8B348B movl (%rbx,%rcx,4), %esi
+8B0493 movl (%rbx,%rdx,4), %eax
+8B0CB3 movl (%rbx,%rsi,4), %ecx
+8B0C82 movl (%rdx,%rax,4), %ecx
+448B0C86 movl (%rsi,%rax,4), %r9d
+8B0496 movl (%rsi,%rdx,4), %eax
+4C8B4C2478 movq 120(%rsp), %r9
+488B442478 movq 120(%rsp), %rax
+488BBC2458050000 movq 1368(%rsp), %rdi
+488BB42458050000 movq 1368(%rsp), %rsi
+488B7B18 movq 24(%rbx), %rdi
+488B6C2418 movq 24(%rsp), %rbp
+488B5C2418 movq 24(%rsp), %rbx
+488B4C2418 movq 24(%rsp), %rcx
+488B7C2418 movq 24(%rsp), %rdi
+488B542418 movq 24(%rsp), %rdx
+488B742418 movq 24(%rsp), %rsi
+488B7320 movq 32(%rbx), %rsi
+488B6C2420 movq 32(%rsp), %rbp
+488B542420 movq 32(%rsp), %rdx
+488B9424800D0000 movq 3456(%rsp), %rdx
+488BB424800D0000 movq 3456(%rsp), %rsi
+4C8B7F28 movq 40(%rdi), %r15
+4C8B642428 movq 40(%rsp), %r12
+4C8B442428 movq 40(%rsp), %r8
+488B4C2428 movq 40(%rsp), %rcx
+488B7C2428 movq 40(%rsp), %rdi
+488B542428 movq 40(%rsp), %rdx
+488B742428 movq 40(%rsp), %rsi
+4C8B6C2430 movq 48(%rsp), %r13
+4C8B442430 movq 48(%rsp), %r8
+488B442430 movq 48(%rsp), %rax
+488B4C2430 movq 48(%rsp), %rcx
+488B542430 movq 48(%rsp), %rdx
+488B742430 movq 48(%rsp), %rsi
+4C8B6738 movq 56(%rdi), %r12
+4C8B7738 movq 56(%rdi), %r14
+4C8B742438 movq 56(%rsp), %r14
+4C8B442438 movq 56(%rsp), %r8
+488B7C2438 movq 56(%rsp), %rdi
+488B542438 movq 56(%rsp), %rdx
+488B742438 movq 56(%rsp), %rsi
+4C8B6F40 movq 64(%rdi), %r13
+488B7740 movq 64(%rdi), %rsi
+4C8B7C2440 movq 64(%rsp), %r15
+4C8B7F48 movq 72(%rdi), %r15
+488B6F48 movq 72(%rdi), %rbp
+498B5350 movq 80(%r11), %rdx
+488B5750 movq 80(%rdi), %rdx
+488B5650 movq 80(%rsi), %rdx
+4C896424E0 movq %r12, -32(%rsp)
+4C896C24E8 movq %r13, -24(%rsp)
+4C897424F0 movq %r14, -16(%rsp)
+4C89F7 movq %r14, %rdi
+4C897C24F8 movq %r15, -8(%rsp)
+4D89FA movq %r15, %r10
+4C89F9 movq %r15, %rcx
+4C89FA movq %r15, %rdx
+4C89FE movq %r15, %rsi
+48894350 movq %rax, 80(%rbx)
+4989C2 movq %rax, %r10
+4889C1 movq %rax, %rcx
+4889C7 movq %rax, %rdi
+4889C2 movq %rax, %rdx
+48890424 movq %rax, (%rsp)
+48896C24D8 movq %rbp, -40(%rsp)
+4989EB movq %rbp, %r11
+4889EE movq %rbp, %rsi
+48895C24D0 movq %rbx, -48(%rsp)
+4889DF movq %rbx, %rdi
+4889DE movq %rbx, %rsi
+4889CD movq %rcx, %rbp
+4889CE movq %rcx, %rsi
+48897C2418 movq %rdi, 24(%rsp)
+48897C2438 movq %rdi, 56(%rsp)
+4889FD movq %rdi, %rbp
+4889FB movq %rdi, %rbx
+4889FE movq %rdi, %rsi
+4889542420 movq %rdx, 32(%rsp)
+4889542428 movq %rdx, 40(%rsp)
+4889542408 movq %rdx, 8(%rsp)
+4889D0 movq %rdx, %rax
+4889D3 movq %rdx, %rbx
+4889D7 movq %rdx, %rdi
+4889742428 movq %rsi, 40(%rsp)
+4889742430 movq %rsi, 48(%rsp)
+4889742408 movq %rsi, 8(%rsp)
+4989F7 movq %rsi, %r15
+4889F2 movq %rsi, %rdx
+48893424 movq %rsi, (%rsp)
+4989E3 movq %rsp, %r11
+488B0C24 movq (%rsp), %rcx
+488B1424 movq (%rsp), %rdx
+488B3424 movq (%rsp), %rsi
+488B0D19FCFFFF movq -999(%rip), %rcx
+488B3D01000000 movq 1(%rip), %rdi
+488B3502000000 movq 2(%rip), %rsi
+8B0483 mov (%rbx,%rax,4), %eax
+8B04B3 mov (%rbx,%rsi,4), %eax
+8B0481 mov (%rcx,%rax,4), %eax
+8B0482 mov (%rdx,%rax,4), %eax
+8B0486 mov (%rsi,%rax,4), %eax
+8B0496 mov (%rsi,%rdx,4), %eax
+4863436C movslq 108(%rbx),%rax
+49634B74 movslq 116(%r11),%rcx
+48634F74 movslq 116(%rdi),%rcx
+48634E74 movslq 116(%rsi),%rcx
+486344240C movslq 12(%rsp),%rax
+4863442414 movslq 20(%rsp),%rax
+4863442418 movslq 24(%rsp),%rax
+4863542418 movslq 24(%rsp),%rdx
+4C6344241C movslq 28(%rsp),%r8
+486344241C movslq 28(%rsp),%rax
+48634C241C movslq 28(%rsp),%rcx
+4863D0 movslq %eax,%rdx
+4863CD movslq %ebp,%rcx
+4863D5 movslq %ebp,%rdx
+4C63D3 movslq %ebx,%r10
+4863C3 movslq %ebx,%rax
+4863CB movslq %ebx,%rcx
+4863D3 movslq %ebx,%rdx
+4863C1 movslq %ecx,%rax
+4863D1 movslq %ecx,%rdx
+4863C7 movslq %edi,%rax
+4863CF movslq %edi,%rcx
+4863D7 movslq %edi,%rdx
+4863F7 movslq %edi,%rsi
+4863C2 movslq %edx,%rax
+4863D2 movslq %edx,%rdx
+4863F2 movslq %edx,%rsi
+4863C6 movslq %esi,%rax
+4963C2 movslq %r10d,%rax
+4963CA movslq %r10d,%rcx
+4963D2 movslq %r10d,%rdx
+4963F2 movslq %r10d,%rsi
+4963CB movslq %r11d,%rcx
+4963D3 movslq %r11d,%rdx
+4963C4 movslq %r12d,%rax
+4963CC movslq %r12d,%rcx
+4963D4 movslq %r12d,%rdx
+4963C5 movslq %r13d,%rax
+4963D5 movslq %r13d,%rdx
+4963C6 movslq %r14d,%rax
+4963D6 movslq %r14d,%rdx
+4963C7 movslq %r15d,%rax
+4963C0 movslq %r8d,%rax
+4963D0 movslq %r8d,%rdx
+4963C1 movslq %r9d,%rax
+4963C9 movslq %r9d,%rcx
+4963D1 movslq %r9d,%rdx
+66C74457FE0000 movw $0, -2(%rdi,%rdx,2)
+66C74457FC0000 movw $0, -4(%rdi,%rdx,2)
+66C74457FA0000 movw $0, -6(%rdi,%rdx,2)
+66C74444500000 movw $0, 80(%rsp,%rax,2)
+6641C704400000 movw $0, (%r8,%rax,2)
+66C74445000000 movw $0, (%rbp,%rax,2)
+66C704510000 movw $0, (%rcx,%rdx,2)
+66C704470000 movw $0, (%rdi,%rax,2)
+66C74445000100 movw $1, (%rbp,%rax,2)
+6689445500 movw %ax, (%rbp,%rdx,2)
+66894C2450 movw %cx, 80(%rsp)
+66894C2452 movw %cx, 82(%rsp)
+66897C2458 movw %di, 88(%rsp)
+66897C245A movw %di, 90(%rsp)
+664489544500 movw %r10w, (%rbp,%rax,2)
+6689742454 movw %si, 84(%rsp)
+6689742456 movw %si, 86(%rsp)
+66893441 movw %si, (%rcx,%rax,2)
+0FB6477C movzbl 124(%rdi), %eax
+410FB6420C movzbl 12(%r10), %eax
+410FB6410C movzbl 12(%r9), %eax
+0FB68405A8060000 movzbl 1704(%rbp,%rax), %eax
+0FB6B405A8060000 movzbl 1704(%rbp,%rax), %esi
+420FB68415FA4C0000 movzbl 19706(%rbp,%r10), %eax
+420FB64401FF movzbl -1(%rcx,%r8), %eax
+0FB64432FF movzbl -1(%rdx,%rsi), %eax
+0FB64C2401 movzbl 1(%rsp), %ecx
+420FB64401FE movzbl -2(%rcx,%r8), %eax
+0FB64432FE movzbl -2(%rdx,%rsi), %eax
+0FB64C2420 movzbl 32(%rsp), %ecx
+0FB64C0420 movzbl 32(%rsp,%rax), %ecx
+420FB684284C930000 movzbl 37708(%rax,%r13), %eax
+0FB684104C930000 movzbl 37708(%rax,%rdx), %eax
+440FB684454C930000 movzbl 37708(%rbp,%rax,2), %r8d
+0FB6940D4C930000 movzbl 37708(%rbp,%rcx), %edx
+440FB684114C930000 movzbl 37708(%rcx,%rdx), %r8d
+0FB6840D4E940000 movzbl 37966(%rbp,%rcx), %eax
+0FB6940D50950000 movzbl 38224(%rbp,%rcx), %edx
+0FB6840D52960000 movzbl 38482(%rbp,%rcx), %eax
+0FB6B40380010000 movzbl 384(%rbx,%rax), %esi
+0FB6940D54970000 movzbl 38740(%rbp,%rcx), %edx
+0FB6840D56980000 movzbl 38998(%rbp,%rcx), %eax
+420FB64401FD movzbl -3(%rcx,%r8), %eax
+0FB64432FD movzbl -3(%rdx,%rsi), %eax
+410FB68383020000 movzbl 643(%r11), %eax
+0FB68783020000 movzbl 643(%rdi), %eax
+0FB68683020000 movzbl 643(%rsi), %eax
+0FB68398020000 movzbl 664(%rbx), %eax
+0FB6C0 movzbl %al, %eax
+440FB6F0 movzbl %al, %r14d
+0FB6EF movzbl %bh, %ebp
+0FB6F3 movzbl %bl,%esi
+440FB6DA movzbl %dl, %r11d
+440FB620 movzbl (%rax), %r12d
+0FB60408 movzbl (%rax,%rcx), %eax
+0FB60438 movzbl (%rax,%rdi), %eax
+0FB63C38 movzbl (%rax,%rdi), %edi
+0FB63438 movzbl (%rax,%rdi), %esi
+440FB60C38 movzbl (%rax,%rdi), %r9d
+0FB60410 movzbl (%rax,%rdx), %eax
+440FB61410 movzbl (%rax,%rdx), %r10d
+0FB60C30 movzbl (%rax,%rsi), %ecx
+0FB61430 movzbl (%rax,%rsi), %edx
+0FB60431 movzbl (%rcx,%rsi), %eax
+0FB60A movzbl (%rdx), %ecx
+0FB60432 movzbl (%rdx,%rsi), %eax
+0FB61432 movzbl (%rdx,%rsi), %edx
+0FB60424 movzbl (%rsp), %eax
+400FB6F6 movzbl %sil, %esi
+4A0FB69415A8060000 movzbq 1704(%rbp,%r10), %rdx
+480FB69405A8060000 movzbq 1704(%rbp,%rax), %rdx
+4A0FB60428 movzbq (%rax,%r13), %rax
+4A0FB63400 movzbq (%rax,%r8), %rsi
+480FB60408 movzbq (%rax,%rcx), %rax
+480FB60410 movzbq (%rax,%rdx), %rax
+660FB694114C930000 movzbw 37708(%rcx,%rdx), %dx
+66410FB630 movzbw (%r8), %si
+0FB7444450 movzwl 80(%rsp,%rax,2), %eax
+430FB7544756 movzwl 86(%r15,%r8,2), %edx
+0FB7C8 movzwl %ax, %ecx
+0FB7C2 movzwl %dx, %eax
+410FB70447 movzwl (%r15,%rax,2), %eax
+0FB70441 movzwl (%rcx,%rax,2), %eax
+440FB71441 movzwl (%rcx,%rax,2), %r10d
+0FB7C6 movzwl %si, %eax
+4B0FB744470A movzwq 10(%r15,%r8,2), %rax
+490FB744470A movzwq 10(%r15,%rax,2), %rax
+490FB7444F0A movzwq 10(%r15,%rcx,2), %rax
+4B0FB744470C movzwq 12(%r15,%r8,2), %rax
+490FB744470C movzwq 12(%r15,%rax,2), %rax
+490FB7444F0C movzwq 12(%r15,%rcx,2), %rax
+4B0FB744470E movzwq 14(%r15,%r8,2), %rax
+490FB744470E movzwq 14(%r15,%rax,2), %rax
+490FB7444F0E movzwq 14(%r15,%rcx,2), %rax
+4B0FB7444710 movzwq 16(%r15,%r8,2), %rax
+490FB7444710 movzwq 16(%r15,%rax,2), %rax
+490FB7444F10 movzwq 16(%r15,%rcx,2), %rax
+4B0FB7444712 movzwq 18(%r15,%r8,2), %rax
+490FB7444712 movzwq 18(%r15,%rax,2), %rax
+490FB7444F12 movzwq 18(%r15,%rcx,2), %rax
+4B0FB7444714 movzwq 20(%r15,%r8,2), %rax
+490FB7444714 movzwq 20(%r15,%rax,2), %rax
+490FB7444F14 movzwq 20(%r15,%rcx,2), %rax
+4B0FB7444716 movzwq 22(%r15,%r8,2), %rax
+490FB7444716 movzwq 22(%r15,%rax,2), %rax
+490FB7444F16 movzwq 22(%r15,%rcx,2), %rax
+4B0FB7444718 movzwq 24(%r15,%r8,2), %rax
+490FB7444718 movzwq 24(%r15,%rax,2), %rax
+490FB7444F18 movzwq 24(%r15,%rcx,2), %rax
+4B0FB744471A movzwq 26(%r15,%r8,2), %rax
+490FB744471A movzwq 26(%r15,%rax,2), %rax
+490FB7444F1A movzwq 26(%r15,%rcx,2), %rax
+4B0FB744471C movzwq 28(%r15,%r8,2), %rax
+490FB744471C movzwq 28(%r15,%rax,2), %rax
+490FB7444F1C movzwq 28(%r15,%rcx,2), %rax
+4B0FB7444702 movzwq 2(%r15,%r8,2), %rax
+490FB7444702 movzwq 2(%r15,%rax,2), %rax
+490FB7444F02 movzwq 2(%r15,%rcx,2), %rax
+4B0FB744471E movzwq 30(%r15,%r8,2), %rax
+490FB744471E movzwq 30(%r15,%rax,2), %rax
+490FB7444F1E movzwq 30(%r15,%rcx,2), %rax
+4B0FB7444720 movzwq 32(%r15,%r8,2), %rax
+490FB7444720 movzwq 32(%r15,%rax,2), %rax
+490FB7444F20 movzwq 32(%r15,%rcx,2), %rax
+4B0FB7444722 movzwq 34(%r15,%r8,2), %rax
+490FB7444722 movzwq 34(%r15,%rax,2), %rax
+490FB7444F22 movzwq 34(%r15,%rcx,2), %rax
+4B0FB7444724 movzwq 36(%r15,%r8,2), %rax
+490FB7444724 movzwq 36(%r15,%rax,2), %rax
+490FB7444F24 movzwq 36(%r15,%rcx,2), %rax
+4B0FB7444726 movzwq 38(%r15,%r8,2), %rax
+490FB7444726 movzwq 38(%r15,%rax,2), %rax
+490FB7444F26 movzwq 38(%r15,%rcx,2), %rax
+4B0FB7444728 movzwq 40(%r15,%r8,2), %rax
+490FB7444728 movzwq 40(%r15,%rax,2), %rax
+490FB7444F28 movzwq 40(%r15,%rcx,2), %rax
+4B0FB744472A movzwq 42(%r15,%r8,2), %rax
+490FB744472A movzwq 42(%r15,%rax,2), %rax
+490FB7444F2A movzwq 42(%r15,%rcx,2), %rax
+4B0FB744472C movzwq 44(%r15,%r8,2), %rax
+490FB744472C movzwq 44(%r15,%rax,2), %rax
+490FB7444F2C movzwq 44(%r15,%rcx,2), %rax
+4B0FB744472E movzwq 46(%r15,%r8,2), %rax
+490FB744472E movzwq 46(%r15,%rax,2), %rax
+490FB7444F2E movzwq 46(%r15,%rcx,2), %rax
+4B0FB7444730 movzwq 48(%r15,%r8,2), %rax
+490FB7444730 movzwq 48(%r15,%rax,2), %rax
+490FB7444F30 movzwq 48(%r15,%rcx,2), %rax
+4B0FB7444704 movzwq 4(%r15,%r8,2), %rax
+490FB7444704 movzwq 4(%r15,%rax,2), %rax
+490FB7444F04 movzwq 4(%r15,%rcx,2), %rax
+4B0FB7444732 movzwq 50(%r15,%r8,2), %rax
+490FB7444732 movzwq 50(%r15,%rax,2), %rax
+490FB7444F32 movzwq 50(%r15,%rcx,2), %rax
+4B0FB7444734 movzwq 52(%r15,%r8,2), %rax
+490FB7444734 movzwq 52(%r15,%rax,2), %rax
+490FB7444F34 movzwq 52(%r15,%rcx,2), %rax
+4B0FB7444736 movzwq 54(%r15,%r8,2), %rax
+490FB7444736 movzwq 54(%r15,%rax,2), %rax
+490FB7444F36 movzwq 54(%r15,%rcx,2), %rax
+4B0FB7444738 movzwq 56(%r15,%r8,2), %rax
+490FB7444738 movzwq 56(%r15,%rax,2), %rax
+490FB7444F38 movzwq 56(%r15,%rcx,2), %rax
+4B0FB744473A movzwq 58(%r15,%r8,2), %rax
+490FB744473A movzwq 58(%r15,%rax,2), %rax
+490FB7444F3A movzwq 58(%r15,%rcx,2), %rax
+4B0FB744473C movzwq 60(%r15,%r8,2), %rax
+490FB744473C movzwq 60(%r15,%rax,2), %rax
+490FB7444F3C movzwq 60(%r15,%rcx,2), %rax
+4B0FB744473E movzwq 62(%r15,%r8,2), %rax
+490FB744473E movzwq 62(%r15,%rax,2), %rax
+490FB7444F3E movzwq 62(%r15,%rcx,2), %rax
+4B0FB7444740 movzwq 64(%r15,%r8,2), %rax
+490FB7444740 movzwq 64(%r15,%rax,2), %rax
+490FB7444F40 movzwq 64(%r15,%rcx,2), %rax
+4B0FB7444742 movzwq 66(%r15,%r8,2), %rax
+490FB7444742 movzwq 66(%r15,%rax,2), %rax
+490FB7444F42 movzwq 66(%r15,%rcx,2), %rax
+4B0FB7444744 movzwq 68(%r15,%r8,2), %rax
+490FB7444744 movzwq 68(%r15,%rax,2), %rax
+490FB7444F44 movzwq 68(%r15,%rcx,2), %rax
+4B0FB7444706 movzwq 6(%r15,%r8,2), %rax
+490FB7444706 movzwq 6(%r15,%rax,2), %rax
+490FB7444F06 movzwq 6(%r15,%rcx,2), %rax
+4B0FB7444746 movzwq 70(%r15,%r8,2), %rax
+490FB7444746 movzwq 70(%r15,%rax,2), %rax
+490FB7444F46 movzwq 70(%r15,%rcx,2), %rax
+4B0FB7444748 movzwq 72(%r15,%r8,2), %rax
+490FB7444748 movzwq 72(%r15,%rax,2), %rax
+490FB7444F48 movzwq 72(%r15,%rcx,2), %rax
+4B0FB744474A movzwq 74(%r15,%r8,2), %rax
+490FB744474A movzwq 74(%r15,%rax,2), %rax
+490FB7444F4A movzwq 74(%r15,%rcx,2), %rax
+4B0FB744474C movzwq 76(%r15,%r8,2), %rax
+490FB744474C movzwq 76(%r15,%rax,2), %rax
+490FB7444F4C movzwq 76(%r15,%rcx,2), %rax
+4B0FB744474E movzwq 78(%r15,%r8,2), %rax
+490FB744474E movzwq 78(%r15,%rax,2), %rax
+490FB7444F4E movzwq 78(%r15,%rcx,2), %rax
+4B0FB7444750 movzwq 80(%r15,%r8,2), %rax
+490FB7444750 movzwq 80(%r15,%rax,2), %rax
+490FB7444F50 movzwq 80(%r15,%rcx,2), %rax
+4B0FB7444752 movzwq 82(%r15,%r8,2), %rax
+490FB7444752 movzwq 82(%r15,%rax,2), %rax
+490FB7444F52 movzwq 82(%r15,%rcx,2), %rax
+4B0FB7444754 movzwq 84(%r15,%r8,2), %rax
+490FB7444754 movzwq 84(%r15,%rax,2), %rax
+490FB7444F54 movzwq 84(%r15,%rcx,2), %rax
+490FB7444756 movzwq 86(%r15,%rax,2), %rax
+490FB7444F56 movzwq 86(%r15,%rcx,2), %rax
+4B0FB7444758 movzwq 88(%r15,%r8,2), %rax
+490FB7444758 movzwq 88(%r15,%rax,2), %rax
+490FB7444F58 movzwq 88(%r15,%rcx,2), %rax
+4B0FB7444708 movzwq 8(%r15,%r8,2), %rax
+490FB7444708 movzwq 8(%r15,%rax,2), %rax
+490FB7444F08 movzwq 8(%r15,%rcx,2), %rax
+4B0FB744475A movzwq 90(%r15,%r8,2), %rax
+490FB744475A movzwq 90(%r15,%rax,2), %rax
+490FB7444F5A movzwq 90(%r15,%rcx,2), %rax
+4B0FB744475C movzwq 92(%r15,%r8,2), %rax
+490FB744475C movzwq 92(%r15,%rax,2), %rax
+490FB7444F5C movzwq 92(%r15,%rcx,2), %rax
+4B0FB744475E movzwq 94(%r15,%r8,2), %rax
+490FB744475E movzwq 94(%r15,%rax,2), %rax
+490FB7444F5E movzwq 94(%r15,%rcx,2), %rax
+4B0FB7444760 movzwq 96(%r15,%r8,2), %rax
+490FB7444760 movzwq 96(%r15,%rax,2), %rax
+490FB7444F60 movzwq 96(%r15,%rcx,2), %rax
+4B0FB7444762 movzwq 98(%r15,%r8,2), %rax
+490FB7444762 movzwq 98(%r15,%rax,2), %rax
+490FB7444F62 movzwq 98(%r15,%rcx,2), %rax
+4B0FB71447 movzwq (%r15,%r8,2), %rdx
+490FB70447 movzwq (%r15,%rax,2), %rax
+490FB70C47 movzwq (%r15,%rax,2), %rcx
+490FB7044F movzwq (%r15,%rcx,2), %rax
+F7D9 negl %ecx
+F7D2 notl %edx
+814C850000002000 orl $2097152, (%rbp,%rax,4)
+098680020000 orl %eax, 640(%rsi)
+09C6 orl %eax, %esi
+4109C4 orl %eax, %r12d
+09AE80020000 orl %ebp, 640(%rsi)
+092C83 orl %ebp, (%rbx,%rax,4)
+09BE80020000 orl %edi, 640(%rsi)
+099680020000 orl %edx, 640(%rsi)
+09D0 orl %edx, %eax
+4109B380020000 orl %esi, 640(%r11)
+09B780020000 orl %esi, 640(%rdi)
+44099680020000 orl %r10d, 640(%rsi)
+44098680020000 orl %r8d, 640(%rsi)
+44090483 orl %r8d, (%rbx,%rax,4)
+44098E80020000 orl %r9d, 640(%rsi)
+415C popq %r12
+415D popq %r13
+415E popq %r14
+415F popq %r15
+5D popq %rbp
+5B popq %rbx
+4154 pushq %r12
+4155 pushq %r13
+4156 pushq %r14
+4157 pushq %r15
+55 pushq %rbp
+53 pushq %rbx
+F3C3 rep ; ret
+D1C0 roll %eax
+C1E010 sall $16, %eax
+D1642410 sall 16(%rsp)
+C1E204 sall $4, %edx
+41C1E204 sall $4, %r10d
+41C1A38002000008 sall $8, 640(%r11)
+C1A78002000008 sall $8, 640(%rdi)
+C1A68002000008 sall $8, 640(%rsi)
+C1E008 sall $8, %eax
+C1E608 sall $8, %esi
+41C1E408 sall $8, %r12d
+D3E0 sall %cl, %eax
+D3E5 sall %cl, %ebp
+D3E7 sall %cl, %edi
+D3E2 sall %cl, %edx
+D3E6 sall %cl, %esi
+41D3E2 sall %cl, %r10d
+41D3E0 sall %cl, %r8d
+41D3E1 sall %cl, %r9d
+48C1E00A salq $10, %rax
+48C1E20A salq $10, %rdx
+48C1E004 salq $4, %rax
+48C1E204 salq $4, %rdx
+48C1E604 salq $4, %rsi
+48C1E007 salq $7, %rax
+48C1E707 salq $7, %rdi
+48C1E207 salq $7, %rdx
+C1F91F sarl $31, %ecx
+C1F903 sarl $3, %ecx
+C1F805 sarl $5, %eax
+C1FA05 sarl $5, %edx
+C1F908 sarl $8, %ecx
+C1FA08 sarl $8, %edx
+D3F8 sarl %cl, %eax
+D3FE sarl %cl, %esi
+D1F8 sarl %eax
+D1FF sarl %edi
+0F97C0 seta %al
+0F94C0 sete %al
+0F9FC0 setg %al
+0F9FC2 setg %dl
+0F9DC2 setge %dl
+0F9EC0 setle %al
+0F9EC2 setle %dl
+0F95C0 setne %al
+C1E910 shrl $16, %ecx
+C1EF10 shrl $16, %edi
+C1EE10 shrl $16, %esi
+41C1E810 shrl $16, %r8d
+41C1E818 shrl $24, %r8d
+C1E81F shrl $31, %eax
+C1EA1F shrl $31, %edx
+D1E8 shrl %eax
+48C1E820 shrq $32, %rax
+48C1E920 shrq $32, %rcx
+66C1EA08 shrw $8, %dx
+2B542410 subl 16(%rsp), %edx
+2B742410 subl 16(%rsp), %esi
+2B442414 subl 20(%rsp), %eax
+2B542414 subl 20(%rsp), %edx
+442B442418 subl 24(%rsp), %r8d
+2B44241C subl 28(%rsp), %eax
+83EB04 subl $4, %ebx
+83E905 subl $5, %ecx
+442BAC85A0020000 subl 672(%rbp,%rax,4), %r13d
+4183AB8402000008 subl $8, 644(%r11)
+83AF8402000008 subl $8, 644(%rdi)
+83AE8402000008 subl $8, 644(%rsi)
+4183EB08 subl $8, %r11d
+29C1 subl %eax, %ecx
+29C2 subl %eax, %edx
+29C6 subl %eax, %esi
+29E8 subl %ebp, %eax
+29DA subl %ebx, %edx
+29C8 subl %ecx, %eax
+4129CB subl %ecx, %r11d
+4129C9 subl %ecx, %r9d
+29F8 subl %edi, %eax
+29F9 subl %edi, %ecx
+29FA subl %edi, %edx
+29FE subl %edi, %esi
+4129F8 subl %edi, %r8d
+29D3 subl %edx, %ebx
+29F0 subl %esi, %eax
+29F2 subl %esi, %edx
+4129F1 subl %esi, %r9d
+4429D0 subl %r10d, %eax
+4429D1 subl %r10d, %ecx
+4429D9 subl %r11d, %ecx
+4429DF subl %r11d, %edi
+4429E0 subl %r12d, %eax
+4429E1 subl %r12d, %ecx
+4429E2 subl %r12d, %edx
+44296C240C subl %r13d, 12(%rsp)
+4429E8 subl %r13d, %eax
+4429EA subl %r13d, %edx
+4429F7 subl %r14d, %edi
+4429F8 subl %r15d, %eax
+4429FA subl %r15d, %edx
+4529F9 subl %r15d, %r9d
+4429C0 subl %r8d, %eax
+4429C1 subl %r8d, %ecx
+4429C2 subl %r8d, %edx
+4429C9 subl %r9d, %ecx
+2B7C0500 subl (%rbp,%rax), %edi
+2B441500 subl (%rbp,%rdx), %eax
+4883EC68 subq $104, %rsp
+4881EC18050000 subq $1304, %rsp
+4881EC38080000 subq $2104, %rsp
+4881EC08010000 subq $264, %rsp
+4881EC480D0000 subq $3400, %rsp
+4883EC38 subq $56, %rsp
+4883EC48 subq $72, %rsp
+4881EC38030000 subq $824, %rsp
+4883EC08 subq $8, %rsp
+A801 testb $1, %al
+40F6C701 testb $1, %dil
+F6C201 testb $1, %dl
+84C0 testb %al, %al
+4084ED testb %bpl, %bpl
+A900002000 testl $2097152, %eax
+85ED testl %ebp, %ebp
+852C83 testl %ebp, (%rbx,%rax,4)
+85DB testl %ebx, %ebx
+85C9 testl %ecx, %ecx
+85FF testl %edi, %edi
+853C83 testl %edi, (%rbx,%rax,4)
+851483 testl %edx, (%rbx,%rax,4)
+85F6 testl %esi, %esi
+853483 testl %esi, (%rbx,%rax,4)
+4585DB testl %r11d, %r11d
+4585ED testl %r13d, %r13d
+4585F6 testl %r14d, %r14d
+4585C0 testl %r8d, %r8d
+44850483 testl %r8d, (%rbx,%rax,4)
+31D0 xorl %edx, %eax
+90 nop
diff --git a/main/VEX/orig_amd64/test2.orig b/main/VEX/orig_amd64/test2.orig
new file mode 100644
index 0000000..841a91a
--- /dev/null
+++ b/main/VEX/orig_amd64/test2.orig
@@ -0,0 +1,23917 @@
+
+addb 8(%rdx), %dil
+. 1 0x12345678 5
+. 40 02 7A 08 C3
+
+addl $102, %esi
+. 2 0x12345678 4
+. 83 C6 66 C3
+
+addl $108, %edx
+. 3 0x12345678 4
+. 83 C2 6C C3
+
+addl $108, %esi
+. 4 0x12345678 4
+. 83 C6 6C C3
+
+addl $10, %r13d
+. 5 0x12345678 5
+. 41 83 C5 0A C3
+
+addl $115, %esi
+. 6 0x12345678 4
+. 83 C6 73 C3
+
+addl $-128, %ebx
+. 7 0x12345678 4
+. 83 C3 80 C3
+
+addl $-128, %edi
+. 8 0x12345678 4
+. 83 C7 80 C3
+
+addl 12(%rsp), %eax
+. 9 0x12345678 5
+. 03 44 24 0C C3
+
+addl 136(%rsp), %edi
+. 10 0x12345678 8
+. 03 BC 24 88 00 00 00 C3
+
+addl $13, %ecx
+. 11 0x12345678 4
+. 83 C1 0D C3
+
+addl $16, %ebx
+. 12 0x12345678 4
+. 83 C3 10 C3
+
+addl $17, %eax
+. 13 0x12345678 4
+. 83 C0 11 C3
+
+addl $18, %ebp
+. 14 0x12345678 4
+. 83 C5 12 C3
+
+addl 20(%rsp), %eax
+. 15 0x12345678 5
+. 03 44 24 14 C3
+
+addl 20(%rsp), %r14d
+. 16 0x12345678 6
+. 44 03 74 24 14 C3
+
+addl $21, %ebx
+. 17 0x12345678 4
+. 83 C3 15 C3
+
+addl 24(%rsp), %eax
+. 18 0x12345678 5
+. 03 44 24 18 C3
+
+addl $28, 16(%rsp)
+. 19 0x12345678 6
+. 83 44 24 10 1C C3
+
+addl 28(%rsp), %eax
+. 20 0x12345678 5
+. 03 44 24 1C C3
+
+addl 28(%rsp), %ebp
+. 21 0x12345678 5
+. 03 6C 24 1C C3
+
+addl 28(%rsp), %r14d
+. 22 0x12345678 6
+. 44 03 74 24 1C C3
+
+addl 28(%rsp), %r15d
+. 23 0x12345678 6
+. 44 03 7C 24 1C C3
+
+addl $29, %eax
+. 24 0x12345678 4
+. 83 C0 1D C3
+
+addl $2, %eax
+. 25 0x12345678 4
+. 83 C0 02 C3
+
+addl $2, %ebp
+. 26 0x12345678 4
+. 83 C5 02 C3
+
+addl $2, %ebx
+. 27 0x12345678 4
+. 83 C3 02 C3
+
+addl $2, %edi
+. 28 0x12345678 4
+. 83 C7 02 C3
+
+addl $2, %r12d
+. 29 0x12345678 5
+. 41 83 C4 02 C3
+
+addl $2, %r15d
+. 30 0x12345678 5
+. 41 83 C7 02 C3
+
+addl $31, 16(%rsp)
+. 31 0x12345678 6
+. 83 44 24 10 1F C3
+
+addl 312(%rsp), %edi
+. 32 0x12345678 8
+. 03 BC 24 38 01 00 00 C3
+
+addl 324(%rsp), %r13d
+. 33 0x12345678 9
+. 44 03 AC 24 44 01 00 00 C3
+
+addl 332(%rsp), %ebp
+. 34 0x12345678 8
+. 03 AC 24 4C 01 00 00 C3
+
+addl $33, %eax
+. 35 0x12345678 4
+. 83 C0 21 C3
+
+addl 344(%rsp), %ebp
+. 36 0x12345678 8
+. 03 AC 24 58 01 00 00 C3
+
+addl 344(%rsp), %edi
+. 37 0x12345678 8
+. 03 BC 24 58 01 00 00 C3
+
+addl 352(%rsp), %ebp
+. 38 0x12345678 8
+. 03 AC 24 60 01 00 00 C3
+
+addl 356(%rsp), %ebp
+. 39 0x12345678 8
+. 03 AC 24 64 01 00 00 C3
+
+addl 368(%rsp), %ebp
+. 40 0x12345678 8
+. 03 AC 24 70 01 00 00 C3
+
+addl 36(%rsp), %eax
+. 41 0x12345678 5
+. 03 44 24 24 C3
+
+addl 36(%rsp), %edi
+. 42 0x12345678 5
+. 03 7C 24 24 C3
+
+addl $37, 16(%rsp)
+. 43 0x12345678 6
+. 83 44 24 10 25 C3
+
+addl $37, %ecx
+. 44 0x12345678 4
+. 83 C1 25 C3
+
+addl $3, %ebp
+. 45 0x12345678 4
+. 83 C5 03 C3
+
+addl $3, %ebx
+. 46 0x12345678 4
+. 83 C3 03 C3
+
+addl $3, %edi
+. 47 0x12345678 4
+. 83 C7 03 C3
+
+addl $41, 16(%rsp)
+. 48 0x12345678 6
+. 83 44 24 10 29 C3
+
+addl 44(%rsp), %edi
+. 49 0x12345678 5
+. 03 7C 24 2C C3
+
+addl 456(%rsp), %eax
+. 50 0x12345678 8
+. 03 84 24 C8 01 00 00 C3
+
+addl $4, %ebp
+. 51 0x12345678 4
+. 83 C5 04 C3
+
+addl $4, %ebx
+. 52 0x12345678 4
+. 83 C3 04 C3
+
+addl $4, %edi
+. 53 0x12345678 4
+. 83 C7 04 C3
+
+addl 556(%rsp), %eax
+. 54 0x12345678 8
+. 03 84 24 2C 02 00 00 C3
+
+addl 556(%rsp), %ebp
+. 55 0x12345678 8
+. 03 AC 24 2C 02 00 00 C3
+
+addl 56(%rsp), %eax
+. 56 0x12345678 5
+. 03 44 24 38 C3
+
+addl $5, %eax
+. 57 0x12345678 4
+. 83 C0 05 C3
+
+addl $5, %ebp
+. 58 0x12345678 4
+. 83 C5 05 C3
+
+addl 60(%rsp), %eax
+. 59 0x12345678 5
+. 03 44 24 3C C3
+
+addl 60(%rsp), %r12d
+. 60 0x12345678 6
+. 44 03 64 24 3C C3
+
+addl $69634, %eax
+. 61 0x12345678 6
+. 05 02 10 01 00 C3
+
+addl 76(%rsp), %r12d
+. 62 0x12345678 6
+. 44 03 64 24 4C C3
+
+addl $77851, %edi
+. 63 0x12345678 7
+. 81 C7 1B 30 01 00 C3
+
+addl $77851, %r12d
+. 64 0x12345678 8
+. 41 81 C4 1B 30 01 00 C3
+
+addl $77852, %r12d
+. 65 0x12345678 8
+. 41 81 C4 1C 30 01 00 C3
+
+addl $77873, %ebx
+. 66 0x12345678 7
+. 81 C3 31 30 01 00 C3
+
+addl $77874, %ebx
+. 67 0x12345678 7
+. 81 C3 32 30 01 00 C3
+
+addl $77875, %ebx
+. 68 0x12345678 7
+. 81 C3 33 30 01 00 C3
+
+addl $77886, %ebp
+. 69 0x12345678 7
+. 81 C5 3E 30 01 00 C3
+
+addl $77891, %eax
+. 70 0x12345678 6
+. 05 43 30 01 00 C3
+
+addl $77891, %edi
+. 71 0x12345678 7
+. 81 C7 43 30 01 00 C3
+
+addl $77891, %r12d
+. 72 0x12345678 8
+. 41 81 C4 43 30 01 00 C3
+
+addl $77892, %eax
+. 73 0x12345678 6
+. 05 44 30 01 00 C3
+
+addl $77892, %edi
+. 74 0x12345678 7
+. 81 C7 44 30 01 00 C3
+
+addl $77893, %eax
+. 75 0x12345678 6
+. 05 45 30 01 00 C3
+
+addl $77893, %edi
+. 76 0x12345678 7
+. 81 C7 45 30 01 00 C3
+
+addl $77893, %r12d
+. 77 0x12345678 8
+. 41 81 C4 45 30 01 00 C3
+
+addl $77893, %r13d
+. 78 0x12345678 8
+. 41 81 C5 45 30 01 00 C3
+
+addl $77894, %ebx
+. 79 0x12345678 7
+. 81 C3 46 30 01 00 C3
+
+addl $77900, %ebp
+. 80 0x12345678 7
+. 81 C5 4C 30 01 00 C3
+
+addl $77903, %ebp
+. 81 0x12345678 7
+. 81 C5 4F 30 01 00 C3
+
+addl $7, %edi
+. 82 0x12345678 4
+. 83 C7 07 C3
+
+addl $7, %r13d
+. 83 0x12345678 5
+. 41 83 C5 07 C3
+
+addl $81921, %eax
+. 84 0x12345678 6
+. 05 01 40 01 00 C3
+
+addl $8, %eax
+. 85 0x12345678 4
+. 83 C0 08 C3
+
+addl 8(%rdx), %edi
+. 86 0x12345678 4
+. 03 7A 08 C3
+
+addl 8(%rsp), %r15d
+. 87 0x12345678 6
+. 44 03 7C 24 08 C3
+
+addl %eax, 20(%rsp)
+. 88 0x12345678 5
+. 01 44 24 14 C3
+
+addl %eax, 24(%rsp)
+. 89 0x12345678 5
+. 01 44 24 18 C3
+
+addl %eax, 36(%rsp)
+. 90 0x12345678 5
+. 01 44 24 24 C3
+
+addl %eax, 40(%rsp)
+. 91 0x12345678 5
+. 01 44 24 28 C3
+
+addl %eax, 44(%rsp)
+. 92 0x12345678 5
+. 01 44 24 2C C3
+
+addl %eax, 56(%rsp)
+. 93 0x12345678 5
+. 01 44 24 38 C3
+
+addl %eax, 8(%r13)
+. 94 0x12345678 5
+. 41 01 45 08 C3
+
+addl %eax, %eax
+. 95 0x12345678 3
+. 01 C0 C3
+
+addl %eax, %edi
+. 96 0x12345678 3
+. 01 C7 C3
+
+addl %eax, %edx
+. 97 0x12345678 3
+. 01 C2 C3
+
+addl %eax, %esi
+. 98 0x12345678 3
+. 01 C6 C3
+
+addl %eax, %r15d
+. 99 0x12345678 4
+. 41 01 C7 C3
+
+addl %ebp, 8(%rsp)
+. 100 0x12345678 5
+. 01 6C 24 08 C3
+
+addl %ebp, %eax
+. 101 0x12345678 3
+. 01 E8 C3
+
+addl %ebp, %ebx
+. 102 0x12345678 3
+. 01 EB C3
+
+addl %ebp, %edi
+. 103 0x12345678 3
+. 01 EF C3
+
+addl %ebp, %esi
+. 104 0x12345678 3
+. 01 EE C3
+
+addl %ecx, 124(%rsp)
+. 105 0x12345678 5
+. 01 4C 24 7C C3
+
+addl %ecx, 292(%rsp)
+. 106 0x12345678 8
+. 01 8C 24 24 01 00 00 C3
+
+addl %ecx, 8(%rsp)
+. 107 0x12345678 5
+. 01 4C 24 08 C3
+
+addl %ecx, %ecx
+. 108 0x12345678 3
+. 01 C9 C3
+
+addl %ecx, %edi
+. 109 0x12345678 3
+. 01 CF C3
+
+addl %ecx, %edx
+. 110 0x12345678 3
+. 01 CA C3
+
+addl %ecx, %r8d
+. 111 0x12345678 4
+. 41 01 C8 C3
+
+addl %edi, 12(%rsp)
+. 112 0x12345678 5
+. 01 7C 24 0C C3
+
+addl %edi, %eax
+. 113 0x12345678 3
+. 01 F8 C3
+
+addl %edi, %edi
+. 114 0x12345678 3
+. 01 FF C3
+
+addl %edi, %esi
+. 115 0x12345678 3
+. 01 FE C3
+
+addl %edi, %r15d
+. 116 0x12345678 4
+. 41 01 FF C3
+
+addl %edi, 5555555(%rip)
+. 117 0x12345678 7
+. 01 3D 63 C5 54 00 C3
+
+addl %edx, %eax
+. 118 0x12345678 3
+. 01 D0 C3
+
+addl %edx, %ebx
+. 119 0x12345678 3
+. 01 D3 C3
+
+addl %edx, %ecx
+. 120 0x12345678 3
+. 01 D1 C3
+
+addl %edx, %edi
+. 121 0x12345678 3
+. 01 D7 C3
+
+addl %edx, %esi
+. 122 0x12345678 3
+. 01 D6 C3
+
+addl %edx, %r8d
+. 123 0x12345678 4
+. 41 01 D0 C3
+
+addl %esi, %eax
+. 124 0x12345678 3
+. 01 F0 C3
+
+addl %esi, %edi
+. 125 0x12345678 3
+. 01 F7 C3
+
+addl %esi, %r13d
+. 126 0x12345678 4
+. 41 01 F5 C3
+
+addl 1(%rip), %edi
+. 127 0x12345678 7
+. 03 3D 01 00 00 00 C3
+
+addl 2(%rip), %esi
+. 128 0x12345678 7
+. 03 35 02 00 00 00 C3
+
+addl 3(%rip), %edi
+. 129 0x12345678 7
+. 03 3D 03 00 00 00 C3
+
+addl 4(%rip), %esi
+. 130 0x12345678 7
+. 03 35 04 00 00 00 C3
+
+addl %r12d, 56(%rsp)
+. 131 0x12345678 6
+. 44 01 64 24 38 C3
+
+addl %r12d, 8(%rbx)
+. 132 0x12345678 5
+. 44 01 63 08 C3
+
+addl %r12d, %r15d
+. 133 0x12345678 4
+. 45 01 E7 C3
+
+addl %r13d, %edi
+. 134 0x12345678 4
+. 44 01 EF C3
+
+addl %r13d, %esi
+. 135 0x12345678 4
+. 44 01 EE C3
+
+addl %r14d, %eax
+. 136 0x12345678 4
+. 44 01 F0 C3
+
+addl %r14d, %ebp
+. 137 0x12345678 4
+. 44 01 F5 C3
+
+addl %r15d, 24(%rsp)
+. 138 0x12345678 6
+. 44 01 7C 24 18 C3
+
+addl %r15d, %eax
+. 139 0x12345678 4
+. 44 01 F8 C3
+
+addl %r8d, %edi
+. 140 0x12345678 4
+. 44 01 C7 C3
+
+addq $104, %rsp
+. 141 0x12345678 5
+. 48 83 C4 68 C3
+
+addq $120, %rsp
+. 142 0x12345678 5
+. 48 83 C4 78 C3
+
+addq $136, %rsp
+. 143 0x12345678 8
+. 48 81 C4 88 00 00 00 C3
+
+addq $152, %rsp
+. 144 0x12345678 8
+. 48 81 C4 98 00 00 00 C3
+
+addq $168, %rsp
+. 145 0x12345678 8
+. 48 81 C4 A8 00 00 00 C3
+
+addq 16(%rcx), %rdx
+. 146 0x12345678 5
+. 48 03 51 10 C3
+
+addq 16(%rsi), %rdx
+. 147 0x12345678 5
+. 48 03 56 10 C3
+
+addq $16, %rsp
+. 148 0x12345678 5
+. 48 83 C4 10 C3
+
+addq 16(%rsp), %rax
+. 149 0x12345678 6
+. 48 03 44 24 10 C3
+
+addq $184, %rsp
+. 150 0x12345678 8
+. 48 81 C4 B8 00 00 00 C3
+
+addq $208, %rsp
+. 151 0x12345678 8
+. 48 81 C4 D0 00 00 00 C3
+
+addq $216, %rsp
+. 152 0x12345678 8
+. 48 81 C4 D8 00 00 00 C3
+
+addq $24, %rsp
+. 153 0x12345678 5
+. 48 83 C4 18 C3
+
+addq 24(%rsp), %rax
+. 154 0x12345678 6
+. 48 03 44 24 18 C3
+
+addq $280, %rsp
+. 155 0x12345678 8
+. 48 81 C4 18 01 00 00 C3
+
+addq $312, %rsp
+. 156 0x12345678 8
+. 48 81 C4 38 01 00 00 C3
+
+addq 32(%rsp), %rax
+. 157 0x12345678 6
+. 48 03 44 24 20 C3
+
+addq $40, %rsp
+. 158 0x12345678 5
+. 48 83 C4 28 C3
+
+addq 40(%rsp), %rax
+. 159 0x12345678 6
+. 48 03 44 24 28 C3
+
+addq $472, %rsp
+. 160 0x12345678 8
+. 48 81 C4 D8 01 00 00 C3
+
+addq $4, %rbp
+. 161 0x12345678 5
+. 48 83 C5 04 C3
+
+addq $4, %rbx
+. 162 0x12345678 5
+. 48 83 C3 04 C3
+
+addq $56, %rsp
+. 163 0x12345678 5
+. 48 83 C4 38 C3
+
+addq $728, %rsp
+. 164 0x12345678 8
+. 48 81 C4 D8 02 00 00 C3
+
+addq $72, %rsp
+. 165 0x12345678 5
+. 48 83 C4 48 C3
+
+addq $88, %rsp
+. 166 0x12345678 5
+. 48 83 C4 58 C3
+
+addq $8, %rax
+. 167 0x12345678 5
+. 48 83 C0 08 C3
+
+addq $8, %rsp
+. 168 0x12345678 5
+. 48 83 C4 08 C3
+
+addq $968, %rsp
+. 169 0x12345678 8
+. 48 81 C4 C8 03 00 00 C3
+
+addq 7(%rip), %rdx
+. 170 0x12345678 8
+. 48 03 15 07 00 00 00 C3
+
+addq $2, %rdi
+. 171 0x12345678 5
+. 48 83 C7 02 C3
+
+addq $7878, %rax
+. 172 0x12345678 7
+. 48 05 C6 1E 00 00 C3
+
+addq %r15, %r12
+. 173 0x12345678 4
+. 4D 01 FC C3
+
+addq %r15, %rax
+. 174 0x12345678 4
+. 4C 01 F8 C3
+
+addq %r15, %rdi
+. 175 0x12345678 4
+. 4C 01 FF C3
+
+addq %r15, %rsi
+. 176 0x12345678 4
+. 4C 01 FE C3
+
+addq %rax, 112(%rsp)
+. 177 0x12345678 6
+. 48 01 44 24 70 C3
+
+addq %rax, 32(%rsp)
+. 178 0x12345678 6
+. 48 01 44 24 20 C3
+
+addq %rax, 48(%rsp)
+. 179 0x12345678 6
+. 48 01 44 24 30 C3
+
+addq %rax, 96(%rsp)
+. 180 0x12345678 6
+. 48 01 44 24 60 C3
+
+addq %rax, %r13
+. 181 0x12345678 4
+. 49 01 C5 C3
+
+addq %rax, %r15
+. 182 0x12345678 4
+. 49 01 C7 C3
+
+addq %rax, %rbp
+. 183 0x12345678 4
+. 48 01 C5 C3
+
+addq %rax, %rbx
+. 184 0x12345678 4
+. 48 01 C3 C3
+
+addq %rax, 989(%rip)
+. 185 0x12345678 8
+. 48 01 05 DD 03 00 00 C3
+
+addq %rbp, %rax
+. 186 0x12345678 4
+. 48 01 E8 C3
+
+addq %rbp, %rbx
+. 187 0x12345678 4
+. 48 01 EB C3
+
+addq %rbp, %rdi
+. 188 0x12345678 4
+. 48 01 EF C3
+
+addq %rbp, %rsi
+. 189 0x12345678 4
+. 48 01 EE C3
+
+addq %rbx, %rax
+. 190 0x12345678 4
+. 48 01 D8 C3
+
+addq $12345, %rax
+. 191 0x12345678 7
+. 48 05 39 30 00 00 C3
+
+addw %ax, 22(%r14,%rdx,2)
+. 192 0x12345678 7
+. 66 41 01 44 56 16 C3
+
+addw %ax, 22(%rbx,%rdx,2)
+. 193 0x12345678 6
+. 66 01 44 53 16 C3
+
+andb 8(%rdx), %dil
+. 194 0x12345678 5
+. 40 22 7A 08 C3
+
+andl $12, %eax
+. 195 0x12345678 4
+. 83 E0 0C C3
+
+andl $12, %esi
+. 196 0x12345678 4
+. 83 E6 0C C3
+
+andl $13, %esi
+. 197 0x12345678 4
+. 83 E6 0D C3
+
+andl $15, 20(%rsp)
+. 198 0x12345678 6
+. 83 64 24 14 0F C3
+
+andl $15, %eax
+. 199 0x12345678 4
+. 83 E0 0F C3
+
+andl $15, %ecx
+. 200 0x12345678 4
+. 83 E1 0F C3
+
+andl $15, %edx
+. 201 0x12345678 4
+. 83 E2 0F C3
+
+andl $15, %esi
+. 202 0x12345678 4
+. 83 E6 0F C3
+
+andl $15, %r13d
+. 203 0x12345678 5
+. 41 83 E5 0F C3
+
+andl $16383, %ecx
+. 204 0x12345678 7
+. 81 E1 FF 3F 00 00 C3
+
+andl $16711680, %esi
+. 205 0x12345678 7
+. 81 E6 00 00 FF 00 C3
+
+andl $16711680, %r8d
+. 206 0x12345678 8
+. 41 81 E0 00 00 FF 00 C3
+
+andl $16777215, %eax
+. 207 0x12345678 6
+. 25 FF FF FF 00 C3
+
+andl $16777215, %ebp
+. 208 0x12345678 7
+. 81 E5 FF FF FF 00 C3
+
+andl $16777215, %ebx
+. 209 0x12345678 7
+. 81 E3 FF FF FF 00 C3
+
+andl $16777215, %ecx
+. 210 0x12345678 7
+. 81 E1 FF FF FF 00 C3
+
+andl $16777215, %edx
+. 211 0x12345678 7
+. 81 E2 FF FF FF 00 C3
+
+andl $16777215, %r13d
+. 212 0x12345678 8
+. 41 81 E5 FF FF FF 00 C3
+
+andl $16777215, %r9d
+. 213 0x12345678 8
+. 41 81 E1 FF FF FF 00 C3
+
+andl $-16777216, %eax
+. 214 0x12345678 6
+. 25 00 00 00 FF C3
+
+andl $16777216, %edi
+. 215 0x12345678 7
+. 81 E7 00 00 00 01 C3
+
+andl $16777216, %esi
+. 216 0x12345678 7
+. 81 E6 00 00 00 01 C3
+
+andl 176(%rsp), %r12d
+. 217 0x12345678 9
+. 44 23 A4 24 B0 00 00 00 C3
+
+andl $192, %edi
+. 218 0x12345678 7
+. 81 E7 C0 00 00 00 C3
+
+andl $1, %eax
+. 219 0x12345678 4
+. 83 E0 01 C3
+
+andl $1, %ebx
+. 220 0x12345678 4
+. 83 E3 01 C3
+
+andl $1, %ecx
+. 221 0x12345678 4
+. 83 E1 01 C3
+
+andl $1, %edi
+. 222 0x12345678 4
+. 83 E7 01 C3
+
+andl $1, %edx
+. 223 0x12345678 4
+. 83 E2 01 C3
+
+andl $1, %esi
+. 224 0x12345678 4
+. 83 E6 01 C3
+
+andl $1, %r8d
+. 225 0x12345678 5
+. 41 83 E0 01 C3
+
+andl $249, %eax
+. 226 0x12345678 6
+. 25 F9 00 00 00 C3
+
+andl $24, %eax
+. 227 0x12345678 4
+. 83 E0 18 C3
+
+andl $251, %eax
+. 228 0x12345678 6
+. 25 FB 00 00 00 C3
+
+andl $254, %edi
+. 229 0x12345678 7
+. 81 E7 FE 00 00 00 C3
+
+andl $255, %eax
+. 230 0x12345678 6
+. 25 FF 00 00 00 C3
+
+andl $27, %edi
+. 231 0x12345678 4
+. 83 E7 1B C3
+
+andl $2, %r12d
+. 232 0x12345678 5
+. 41 83 E4 02 C3
+
+andl $30, %ecx
+. 233 0x12345678 4
+. 83 E1 1E C3
+
+andl $31, %eax
+. 234 0x12345678 4
+. 83 E0 1F C3
+
+andl $31, %ebp
+. 235 0x12345678 4
+. 83 E5 1F C3
+
+andl $31, %ebx
+. 236 0x12345678 4
+. 83 E3 1F C3
+
+andl $31, %ecx
+. 237 0x12345678 4
+. 83 E1 1F C3
+
+andl $31, %edx
+. 238 0x12345678 4
+. 83 E2 1F C3
+
+andl $31, %r12d
+. 239 0x12345678 5
+. 41 83 E4 1F C3
+
+andl $3, %eax
+. 240 0x12345678 4
+. 83 E0 03 C3
+
+andl $3, %ebp
+. 241 0x12345678 4
+. 83 E5 03 C3
+
+andl $3, %ebx
+. 242 0x12345678 4
+. 83 E3 03 C3
+
+andl $-3, %ecx
+. 243 0x12345678 4
+. 83 E1 FD C3
+
+andl $3, %esi
+. 244 0x12345678 4
+. 83 E6 03 C3
+
+andl $4095, %ebp
+. 245 0x12345678 7
+. 81 E5 FF 0F 00 00 C3
+
+andl $-4, %eax
+. 246 0x12345678 4
+. 83 E0 FC C3
+
+andl $-4, %ebx
+. 247 0x12345678 4
+. 83 E3 FC C3
+
+andl $4, %ebx
+. 248 0x12345678 4
+. 83 E3 04 C3
+
+andl $-4, %edi
+. 249 0x12345678 4
+. 83 E7 FC C3
+
+andl $-4, %r12d
+. 250 0x12345678 5
+. 41 83 E4 FC C3
+
+andl $4, %r12d
+. 251 0x12345678 5
+. 41 83 E4 04 C3
+
+andl $-4, %r13d
+. 252 0x12345678 5
+. 41 83 E5 FC C3
+
+andl $4, %r13d
+. 253 0x12345678 5
+. 41 83 E5 04 C3
+
+andl $511, %r13d
+. 254 0x12345678 8
+. 41 81 E5 FF 01 00 00 C3
+
+andl $512, %r14d
+. 255 0x12345678 8
+. 41 81 E6 00 02 00 00 C3
+
+andl $-57, %eax
+. 256 0x12345678 4
+. 83 E0 C7 C3
+
+andl $-57, %edx
+. 257 0x12345678 4
+. 83 E2 C7 C3
+
+andl $-57, %r12d
+. 258 0x12345678 5
+. 41 83 E4 C7 C3
+
+andl $5, %eax
+. 259 0x12345678 4
+. 83 E0 05 C3
+
+andl $63, %eax
+. 260 0x12345678 4
+. 83 E0 3F C3
+
+andl $63, %ebx
+. 261 0x12345678 4
+. 83 E3 3F C3
+
+andl $63, %r12d
+. 262 0x12345678 5
+. 41 83 E4 3F C3
+
+andl $63, %r15d
+. 263 0x12345678 5
+. 41 83 E7 3F C3
+
+andl $-64513, %esi
+. 264 0x12345678 7
+. 81 E6 FF 03 FF FF C3
+
+andl $65280, %edi
+. 265 0x12345678 7
+. 81 E7 00 FF 00 00 C3
+
+andl $65280, %edx
+. 266 0x12345678 7
+. 81 E2 00 FF 00 00 C3
+
+andl $65280, %r10d
+. 267 0x12345678 8
+. 41 81 E2 00 FF 00 00 C3
+
+andl $65535, %eax
+. 268 0x12345678 6
+. 25 FF FF 00 00 C3
+
+andl $65535, %r14d
+. 269 0x12345678 8
+. 41 81 E6 FF FF 00 00 C3
+
+andl $6, %esi
+. 270 0x12345678 4
+. 83 E6 06 C3
+
+andl $7, %eax
+. 271 0x12345678 4
+. 83 E0 07 C3
+
+andl $7, %ebp
+. 272 0x12345678 4
+. 83 E5 07 C3
+
+andl $7, %ecx
+. 273 0x12345678 4
+. 83 E1 07 C3
+
+andl $7, %edi
+. 274 0x12345678 4
+. 83 E7 07 C3
+
+andl $7, %edx
+. 275 0x12345678 4
+. 83 E2 07 C3
+
+andl $7, %esi
+. 276 0x12345678 4
+. 83 E6 07 C3
+
+andl $7, %r12d
+. 277 0x12345678 5
+. 41 83 E4 07 C3
+
+andl $7, %r13d
+. 278 0x12345678 5
+. 41 83 E5 07 C3
+
+andl $7, %r15d
+. 279 0x12345678 5
+. 41 83 E7 07 C3
+
+andl $7, %r9d
+. 280 0x12345678 5
+. 41 83 E1 07 C3
+
+andl $-8, %eax
+. 281 0x12345678 4
+. 83 E0 F8 C3
+
+andl $-8, %edi
+. 282 0x12345678 4
+. 83 E7 F8 C3
+
+andl $8, %edi
+. 283 0x12345678 4
+. 83 E7 08 C3
+
+andl 8(%rdx), %edi
+. 284 0x12345678 4
+. 23 7A 08 C3
+
+andl $9, %eax
+. 285 0x12345678 4
+. 83 E0 09 C3
+
+andl %eax, %ebp
+. 286 0x12345678 3
+. 21 C5 C3
+
+andl %eax, %ecx
+. 287 0x12345678 3
+. 21 C1 C3
+
+andl %ebx, %eax
+. 288 0x12345678 3
+. 21 D8 C3
+
+andl %ebx, %r14d
+. 289 0x12345678 4
+. 41 21 DE C3
+
+andl %edx, %eax
+. 290 0x12345678 3
+. 21 D0 C3
+
+andl %edx, %ecx
+. 291 0x12345678 3
+. 21 D1 C3
+
+andl %esi, %ecx
+. 292 0x12345678 3
+. 21 F1 C3
+
+andl %r12d, %eax
+. 293 0x12345678 4
+. 44 21 E0 C3
+
+andq %r12, %rsi
+. 294 0x12345678 4
+. 4C 21 E6 C3
+
+andq %rax, 112(%rsp)
+. 295 0x12345678 6
+. 48 21 44 24 70 C3
+
+andq %rax, 88(%rsp)
+. 296 0x12345678 6
+. 48 21 44 24 58 C3
+
+andq %rax, %rsi
+. 297 0x12345678 4
+. 48 21 C6 C3
+
+call *128(%rsp)
+. 298 0x12345678 7
+. FF 94 24 80 00 00 00
+
+call *136(%rsp)
+. 299 0x12345678 7
+. FF 94 24 88 00 00 00
+
+call *144(%rsp)
+. 300 0x12345678 7
+. FF 94 24 90 00 00 00
+
+call *16(%rsp)
+. 301 0x12345678 4
+. FF 54 24 10
+
+call *24(%rsp)
+. 302 0x12345678 4
+. FF 54 24 18
+
+call *264(%rsp)
+. 303 0x12345678 7
+. FF 94 24 08 01 00 00
+
+call *272(%rsp)
+. 304 0x12345678 7
+. FF 94 24 10 01 00 00
+
+call *296(%rsp)
+. 305 0x12345678 7
+. FF 94 24 28 01 00 00
+
+call *784(%rsp)
+. 306 0x12345678 7
+. FF 94 24 10 03 00 00
+
+call *792(%rsp)
+. 307 0x12345678 7
+. FF 94 24 18 03 00 00
+
+call *808(%rsp)
+. 308 0x12345678 7
+. FF 94 24 28 03 00 00
+
+call *%r10
+. 309 0x12345678 3
+. 41 FF D2
+
+call *%r13
+. 310 0x12345678 3
+. 41 FF D5
+
+call *%r14
+. 311 0x12345678 3
+. 41 FF D6
+
+call *%r15
+. 312 0x12345678 3
+. 41 FF D7
+
+call *313131(%rip)
+. 313 0x12345678 6
+. FF 15 2B C7 04 00
+
+call *9909(%rip)
+. 314 0x12345678 6
+. FF 15 B5 26 00 00
+
+cltd
+. 315 0x12345678 2
+. 99 C3
+
+cltq
+. 316 0x12345678 3
+. 48 98 C3
+
+cmova %ebx, %edx
+. 317 0x12345678 4
+. 0F 47 D3 C3
+
+cmova %ecx, %esi
+. 318 0x12345678 4
+. 0F 47 F1 C3
+
+cmova %ecx, %r10d
+. 319 0x12345678 5
+. 44 0F 47 D1 C3
+
+cmova %edx, %eax
+. 320 0x12345678 4
+. 0F 47 C2 C3
+
+cmova %edx, %edi
+. 321 0x12345678 4
+. 0F 47 FA C3
+
+cmova %edx, %r11d
+. 322 0x12345678 5
+. 44 0F 47 DA C3
+
+cmova %edx, %r8d
+. 323 0x12345678 5
+. 44 0F 47 C2 C3
+
+cmova %edx, %r9d
+. 324 0x12345678 5
+. 44 0F 47 CA C3
+
+cmovae %r9d, %eax
+. 325 0x12345678 5
+. 41 0F 43 C1 C3
+
+cmovae %r9d, %ebx
+. 326 0x12345678 5
+. 41 0F 43 D9 C3
+
+cmovae %r9d, %ecx
+. 327 0x12345678 5
+. 41 0F 43 C9 C3
+
+cmovae %r9d, %edi
+. 328 0x12345678 5
+. 41 0F 43 F9 C3
+
+cmovae %r9d, %edx
+. 329 0x12345678 5
+. 41 0F 43 D1 C3
+
+cmovae %r9d, %esi
+. 330 0x12345678 5
+. 41 0F 43 F1 C3
+
+cmovae %r9d, %r8d
+. 331 0x12345678 5
+. 45 0F 43 C1 C3
+
+cmovb %eax, %r12d
+. 332 0x12345678 5
+. 44 0F 42 E0 C3
+
+cmovb %ebx, %edx
+. 333 0x12345678 4
+. 0F 42 D3 C3
+
+cmovb %ecx, %esi
+. 334 0x12345678 4
+. 0F 42 F1 C3
+
+cmovb %ecx, %r10d
+. 335 0x12345678 5
+. 44 0F 42 D1 C3
+
+cmovb %edx, %eax
+. 336 0x12345678 4
+. 0F 42 C2 C3
+
+cmovb %edx, %ebp
+. 337 0x12345678 4
+. 0F 42 EA C3
+
+cmovb %edx, %edi
+. 338 0x12345678 4
+. 0F 42 FA C3
+
+cmovb %edx, %r11d
+. 339 0x12345678 5
+. 44 0F 42 DA C3
+
+cmovb %edx, %r8d
+. 340 0x12345678 5
+. 44 0F 42 C2 C3
+
+cmovb %edx, %r9d
+. 341 0x12345678 5
+. 44 0F 42 CA C3
+
+cmovbe %eax, %edx
+. 342 0x12345678 4
+. 0F 46 D0 C3
+
+cmovbe %eax, %esi
+. 343 0x12345678 4
+. 0F 46 F0 C3
+
+cmove 104(%rsp), %eax
+. 344 0x12345678 6
+. 0F 44 44 24 68 C3
+
+cmove 380(%rsp), %ecx
+. 345 0x12345678 9
+. 0F 44 8C 24 7C 01 00 00 C3
+
+cmove 380(%rsp), %edi
+. 346 0x12345678 9
+. 0F 44 BC 24 7C 01 00 00 C3
+
+cmove 380(%rsp), %edx
+. 347 0x12345678 9
+. 0F 44 94 24 7C 01 00 00 C3
+
+cmove 380(%rsp), %esi
+. 348 0x12345678 9
+. 0F 44 B4 24 7C 01 00 00 C3
+
+cmove 396(%rsp), %ecx
+. 349 0x12345678 9
+. 0F 44 8C 24 8C 01 00 00 C3
+
+cmove 396(%rsp), %edi
+. 350 0x12345678 9
+. 0F 44 BC 24 8C 01 00 00 C3
+
+cmove 396(%rsp), %edx
+. 351 0x12345678 9
+. 0F 44 94 24 8C 01 00 00 C3
+
+cmove 396(%rsp), %esi
+. 352 0x12345678 9
+. 0F 44 B4 24 8C 01 00 00 C3
+
+cmove 412(%rsp), %ecx
+. 353 0x12345678 9
+. 0F 44 8C 24 9C 01 00 00 C3
+
+cmove 412(%rsp), %edi
+. 354 0x12345678 9
+. 0F 44 BC 24 9C 01 00 00 C3
+
+cmove 412(%rsp), %edx
+. 355 0x12345678 9
+. 0F 44 94 24 9C 01 00 00 C3
+
+cmove 412(%rsp), %esi
+. 356 0x12345678 9
+. 0F 44 B4 24 9C 01 00 00 C3
+
+cmove 496(%rsp), %edi
+. 357 0x12345678 9
+. 0F 44 BC 24 F0 01 00 00 C3
+
+cmove 496(%rsp), %esi
+. 358 0x12345678 9
+. 0F 44 B4 24 F0 01 00 00 C3
+
+cmove 512(%rsp), %ecx
+. 359 0x12345678 9
+. 0F 44 8C 24 00 02 00 00 C3
+
+cmove 512(%rsp), %edx
+. 360 0x12345678 9
+. 0F 44 94 24 00 02 00 00 C3
+
+cmove 528(%rsp), %ecx
+. 361 0x12345678 9
+. 0F 44 8C 24 10 02 00 00 C3
+
+cmove 528(%rsp), %edi
+. 362 0x12345678 9
+. 0F 44 BC 24 10 02 00 00 C3
+
+cmove 528(%rsp), %edx
+. 363 0x12345678 9
+. 0F 44 94 24 10 02 00 00 C3
+
+cmove 528(%rsp), %esi
+. 364 0x12345678 9
+. 0F 44 B4 24 10 02 00 00 C3
+
+cmove %eax, %ebp
+. 365 0x12345678 4
+. 0F 44 E8 C3
+
+cmove %eax, %edx
+. 366 0x12345678 4
+. 0F 44 D0 C3
+
+cmove %eax, %r13d
+. 367 0x12345678 5
+. 44 0F 44 E8 C3
+
+cmove %ecx, %edx
+. 368 0x12345678 4
+. 0F 44 D1 C3
+
+cmove %rax, %rdi
+. 369 0x12345678 5
+. 48 0F 44 F8 C3
+
+cmove %rax, %rdx
+. 370 0x12345678 5
+. 48 0F 44 D0 C3
+
+cmove %rax, %rsi
+. 371 0x12345678 5
+. 48 0F 44 F0 C3
+
+cmove %rbp, %rax
+. 372 0x12345678 5
+. 48 0F 44 C5 C3
+
+cmove %rdi, %rbx
+. 373 0x12345678 5
+. 48 0F 44 DF C3
+
+cmove %rdx, %rsi
+. 374 0x12345678 5
+. 48 0F 44 F2 C3
+
+cmove %rsi, %rax
+. 375 0x12345678 5
+. 48 0F 44 C6 C3
+
+cmovg %edi, %esi
+. 376 0x12345678 4
+. 0F 4F F7 C3
+
+cmovg %edx, %eax
+. 377 0x12345678 4
+. 0F 4F C2 C3
+
+cmovg %edx, %ecx
+. 378 0x12345678 4
+. 0F 4F CA C3
+
+cmovge %ecx, %eax
+. 379 0x12345678 4
+. 0F 4D C1 C3
+
+cmovge %ecx, %edi
+. 380 0x12345678 4
+. 0F 4D F9 C3
+
+cmovge %ecx, %edx
+. 381 0x12345678 4
+. 0F 4D D1 C3
+
+cmovge %ecx, %esi
+. 382 0x12345678 4
+. 0F 4D F1 C3
+
+cmovge %edx, %eax
+. 383 0x12345678 4
+. 0F 4D C2 C3
+
+cmovge %r10d, %eax
+. 384 0x12345678 5
+. 41 0F 4D C2 C3
+
+cmovge %r10d, %ebx
+. 385 0x12345678 5
+. 41 0F 4D DA C3
+
+cmovge %r10d, %ecx
+. 386 0x12345678 5
+. 41 0F 4D CA C3
+
+cmovge %r10d, %edi
+. 387 0x12345678 5
+. 41 0F 4D FA C3
+
+cmovge %r10d, %edx
+. 388 0x12345678 5
+. 41 0F 4D D2 C3
+
+cmovge %r10d, %r11d
+. 389 0x12345678 5
+. 45 0F 4D DA C3
+
+cmovge %r10d, %r13d
+. 390 0x12345678 5
+. 45 0F 4D EA C3
+
+cmovge %r10d, %r8d
+. 391 0x12345678 5
+. 45 0F 4D C2 C3
+
+cmovge %r10d, %r9d
+. 392 0x12345678 5
+. 45 0F 4D CA C3
+
+cmovge %r8d, %ecx
+. 393 0x12345678 5
+. 41 0F 4D C8 C3
+
+cmovge %r8d, %r10d
+. 394 0x12345678 5
+. 45 0F 4D D0 C3
+
+cmovge %r9d, %eax
+. 395 0x12345678 5
+. 41 0F 4D C1 C3
+
+cmovge %r9d, %ebx
+. 396 0x12345678 5
+. 41 0F 4D D9 C3
+
+cmovge %r9d, %ecx
+. 397 0x12345678 5
+. 41 0F 4D C9 C3
+
+cmovge %r9d, %edi
+. 398 0x12345678 5
+. 41 0F 4D F9 C3
+
+cmovge %r9d, %edx
+. 399 0x12345678 5
+. 41 0F 4D D1 C3
+
+cmovge %r9d, %esi
+. 400 0x12345678 5
+. 41 0F 4D F1 C3
+
+cmovge %r9d, %r8d
+. 401 0x12345678 5
+. 45 0F 4D C1 C3
+
+cmovg %esi, %ecx
+. 402 0x12345678 4
+. 0F 4F CE C3
+
+cmovg %r8d, %eax
+. 403 0x12345678 5
+. 41 0F 4F C0 C3
+
+cmovg %r8d, %edx
+. 404 0x12345678 5
+. 41 0F 4F D0 C3
+
+cmovl %eax, %r13d
+. 405 0x12345678 5
+. 44 0F 4C E8 C3
+
+cmovl %ebx, %r12d
+. 406 0x12345678 5
+. 44 0F 4C E3 C3
+
+cmovl %edi, %esi
+. 407 0x12345678 4
+. 0F 4C F7 C3
+
+cmovl %edx, %ebp
+. 408 0x12345678 4
+. 0F 4C EA C3
+
+cmovl %edx, %ecx
+. 409 0x12345678 4
+. 0F 4C CA C3
+
+cmovl %edx, %r12d
+. 410 0x12345678 5
+. 44 0F 4C E2 C3
+
+cmovle %ecx, %eax
+. 411 0x12345678 4
+. 0F 4E C1 C3
+
+cmovle %ecx, %ebx
+. 412 0x12345678 4
+. 0F 4E D9 C3
+
+cmovle %ecx, %edi
+. 413 0x12345678 4
+. 0F 4E F9 C3
+
+cmovle %ecx, %edx
+. 414 0x12345678 4
+. 0F 4E D1 C3
+
+cmovle %ecx, %r11d
+. 415 0x12345678 5
+. 44 0F 4E D9 C3
+
+cmovle %ecx, %r8d
+. 416 0x12345678 5
+. 44 0F 4E C1 C3
+
+cmovle %ecx, %r9d
+. 417 0x12345678 5
+. 44 0F 4E C9 C3
+
+cmovle %r10d, %eax
+. 418 0x12345678 5
+. 41 0F 4E C2 C3
+
+cmovle %r10d, %ebx
+. 419 0x12345678 5
+. 41 0F 4E DA C3
+
+cmovle %r10d, %ecx
+. 420 0x12345678 5
+. 41 0F 4E CA C3
+
+cmovle %r10d, %edi
+. 421 0x12345678 5
+. 41 0F 4E FA C3
+
+cmovle %r10d, %edx
+. 422 0x12345678 5
+. 41 0F 4E D2 C3
+
+cmovle %r10d, %esi
+. 423 0x12345678 5
+. 41 0F 4E F2 C3
+
+cmovle %r10d, %r11d
+. 424 0x12345678 5
+. 45 0F 4E DA C3
+
+cmovle %r10d, %r12d
+. 425 0x12345678 5
+. 45 0F 4E E2 C3
+
+cmovle %r10d, %r8d
+. 426 0x12345678 5
+. 45 0F 4E C2 C3
+
+cmovle %r8d, %eax
+. 427 0x12345678 5
+. 41 0F 4E C0 C3
+
+cmovle %r8d, %edi
+. 428 0x12345678 5
+. 41 0F 4E F8 C3
+
+cmovle %r8d, %edx
+. 429 0x12345678 5
+. 41 0F 4E D0 C3
+
+cmovle %r8d, %esi
+. 430 0x12345678 5
+. 41 0F 4E F0 C3
+
+cmovl %r8d, %eax
+. 431 0x12345678 5
+. 41 0F 4C C0 C3
+
+cmovl %r8d, %edx
+. 432 0x12345678 5
+. 41 0F 4C D0 C3
+
+cmovne 104(%rsp), %eax
+. 433 0x12345678 6
+. 0F 45 44 24 68 C3
+
+cmovne 144(%rsp), %edx
+. 434 0x12345678 9
+. 0F 45 94 24 90 00 00 00 C3
+
+cmovne 152(%rsp), %ecx
+. 435 0x12345678 9
+. 0F 45 8C 24 98 00 00 00 C3
+
+cmovne 16(%rsp), %ebx
+. 436 0x12345678 6
+. 0F 45 5C 24 10 C3
+
+cmovne 16(%rsp), %r12d
+. 437 0x12345678 7
+. 44 0F 45 64 24 10 C3
+
+cmovne 24(%rsp), %ebx
+. 438 0x12345678 6
+. 0F 45 5C 24 18 C3
+
+cmovne 32(%rsp), %ebx
+. 439 0x12345678 6
+. 0F 45 5C 24 20 C3
+
+cmovne 40(%rsp), %ebx
+. 440 0x12345678 6
+. 0F 45 5C 24 28 C3
+
+cmovne 48(%rsp), %ebx
+. 441 0x12345678 6
+. 0F 45 5C 24 30 C3
+
+cmovne %eax, %ebp
+. 442 0x12345678 4
+. 0F 45 E8 C3
+
+cmovne %eax, %ebx
+. 443 0x12345678 4
+. 0F 45 D8 C3
+
+cmovne %eax, %ecx
+. 444 0x12345678 4
+. 0F 45 C8 C3
+
+cmovne %eax, %edi
+. 445 0x12345678 4
+. 0F 45 F8 C3
+
+cmovne %eax, %esi
+. 446 0x12345678 4
+. 0F 45 F0 C3
+
+cmovne %eax, %r14d
+. 447 0x12345678 5
+. 44 0F 45 F0 C3
+
+cmovne %edx, %eax
+. 448 0x12345678 4
+. 0F 45 C2 C3
+
+cmovne %r10d, %eax
+. 449 0x12345678 5
+. 41 0F 45 C2 C3
+
+cmovne %r10d, %ebx
+. 450 0x12345678 5
+. 41 0F 45 DA C3
+
+cmovne %r10d, %ecx
+. 451 0x12345678 5
+. 41 0F 45 CA C3
+
+cmovne %r10d, %edx
+. 452 0x12345678 5
+. 41 0F 45 D2 C3
+
+cmovne %r10d, %r11d
+. 453 0x12345678 5
+. 45 0F 45 DA C3
+
+cmovne %r10d, %r12d
+. 454 0x12345678 5
+. 45 0F 45 E2 C3
+
+cmovne %r10d, %r13d
+. 455 0x12345678 5
+. 45 0F 45 EA C3
+
+cmovne %r10d, %r9d
+. 456 0x12345678 5
+. 45 0F 45 CA C3
+
+cmovne %r14d, %esi
+. 457 0x12345678 5
+. 41 0F 45 F6 C3
+
+cmovne %r8d, %eax
+. 458 0x12345678 5
+. 41 0F 45 C0 C3
+
+cmovne %r8d, %ecx
+. 459 0x12345678 5
+. 41 0F 45 C8 C3
+
+cmovne %r8d, %edx
+. 460 0x12345678 5
+. 41 0F 45 D0 C3
+
+cmovne %r8d, %r10d
+. 461 0x12345678 5
+. 45 0F 45 D0 C3
+
+cmovne %rax, %r14
+. 462 0x12345678 5
+. 4C 0F 45 F0 C3
+
+cmovne %rax, %r9
+. 463 0x12345678 5
+. 4C 0F 45 C8 C3
+
+cmovne %rax, %rbx
+. 464 0x12345678 5
+. 48 0F 45 D8 C3
+
+cmovne %rax, %rcx
+. 465 0x12345678 5
+. 48 0F 45 C8 C3
+
+cmovne %rax, %rdi
+. 466 0x12345678 5
+. 48 0F 45 F8 C3
+
+cmovne %rax, %rdx
+. 467 0x12345678 5
+. 48 0F 45 D0 C3
+
+cmovne %rax, %rsi
+. 468 0x12345678 5
+. 48 0F 45 F0 C3
+
+cmovne %rdx, %r9
+. 469 0x12345678 5
+. 4C 0F 45 CA C3
+
+cmovne %rdx, %rax
+. 470 0x12345678 5
+. 48 0F 45 C2 C3
+
+cmovns %eax, %edx
+. 471 0x12345678 4
+. 0F 49 D0 C3
+
+cmovns %esi, %ecx
+. 472 0x12345678 4
+. 0F 49 CE C3
+
+cmovns %r8d, %ebx
+. 473 0x12345678 5
+. 41 0F 49 D8 C3
+
+cmovns %rax, %rdx
+. 474 0x12345678 5
+. 48 0F 49 D0 C3
+
+cmovs %ecx, %eax
+. 475 0x12345678 4
+. 0F 48 C1 C3
+
+cmovs %ecx, %ebx
+. 476 0x12345678 4
+. 0F 48 D9 C3
+
+cmovs %ecx, %edi
+. 477 0x12345678 4
+. 0F 48 F9 C3
+
+cmovs %ecx, %edx
+. 478 0x12345678 4
+. 0F 48 D1 C3
+
+cmovs %ecx, %r11d
+. 479 0x12345678 5
+. 44 0F 48 D9 C3
+
+cmovs %ecx, %r8d
+. 480 0x12345678 5
+. 44 0F 48 C1 C3
+
+cmovs %ecx, %r9d
+. 481 0x12345678 5
+. 44 0F 48 C9 C3
+
+cmovs %r10d, %eax
+. 482 0x12345678 5
+. 41 0F 48 C2 C3
+
+cmovs %r10d, %ebx
+. 483 0x12345678 5
+. 41 0F 48 DA C3
+
+cmovs %r10d, %ecx
+. 484 0x12345678 5
+. 41 0F 48 CA C3
+
+cmovs %r10d, %edi
+. 485 0x12345678 5
+. 41 0F 48 FA C3
+
+cmovs %r10d, %edx
+. 486 0x12345678 5
+. 41 0F 48 D2 C3
+
+cmovs %r10d, %esi
+. 487 0x12345678 5
+. 41 0F 48 F2 C3
+
+cmovs %r10d, %r8d
+. 488 0x12345678 5
+. 45 0F 48 C2 C3
+
+cmpb $0, 103(%rsp)
+. 489 0x12345678 6
+. 80 7C 24 67 00 C3
+
+cmpb $0, 107(%rsp)
+. 490 0x12345678 6
+. 80 7C 24 6B 00 C3
+
+cmpb $0, 115(%rsp)
+. 491 0x12345678 6
+. 80 7C 24 73 00 C3
+
+cmpb $0, 11(%rsp)
+. 492 0x12345678 6
+. 80 7C 24 0B 00 C3
+
+cmpb $0, 123(%rsp)
+. 493 0x12345678 6
+. 80 7C 24 7B 00 C3
+
+cmpb $0, 135(%rsp)
+. 494 0x12345678 9
+. 80 BC 24 87 00 00 00 00 C3
+
+cmpb $0, 13(%rsp)
+. 495 0x12345678 6
+. 80 7C 24 0D 00 C3
+
+cmpb $0, 14(%rsp)
+. 496 0x12345678 6
+. 80 7C 24 0E 00 C3
+
+cmpb $0, 151(%rsp)
+. 497 0x12345678 9
+. 80 BC 24 97 00 00 00 00 C3
+
+cmpb $0, 15(%rsp)
+. 498 0x12345678 6
+. 80 7C 24 0F 00 C3
+
+cmpb $0, 16(%rdx,%rax)
+. 499 0x12345678 6
+. 80 7C 02 10 00 C3
+
+cmpb $0, 16(%rsp)
+. 500 0x12345678 6
+. 80 7C 24 10 00 C3
+
+cmpb $0, 171(%rsp)
+. 501 0x12345678 9
+. 80 BC 24 AB 00 00 00 00 C3
+
+cmpb $0, 17(%rbx)
+. 502 0x12345678 5
+. 80 7B 11 00 C3
+
+cmpb $0, 183(%rsp)
+. 503 0x12345678 9
+. 80 BC 24 B7 00 00 00 00 C3
+
+cmpb $0, 18(%rbx)
+. 504 0x12345678 5
+. 80 7B 12 00 C3
+
+cmpb $0, 22(%rsp)
+. 505 0x12345678 6
+. 80 7C 24 16 00 C3
+
+cmpb $0, 239(%rsp)
+. 506 0x12345678 9
+. 80 BC 24 EF 00 00 00 00 C3
+
+cmpb $0, 23(%rsp)
+. 507 0x12345678 6
+. 80 7C 24 17 00 C3
+
+cmpb $0, 270(%rsp)
+. 508 0x12345678 9
+. 80 BC 24 0E 01 00 00 00 C3
+
+cmpb $0, 27(%rsp)
+. 509 0x12345678 6
+. 80 7C 24 1B 00 C3
+
+cmpb $0, 283(%rsp)
+. 510 0x12345678 9
+. 80 BC 24 1B 01 00 00 00 C3
+
+cmpb $0, 31(%rsp)
+. 511 0x12345678 6
+. 80 7C 24 1F 00 C3
+
+cmpb $0, 331(%rsp)
+. 512 0x12345678 9
+. 80 BC 24 4B 01 00 00 00 C3
+
+cmpb $0, 375(%rsp)
+. 513 0x12345678 9
+. 80 BC 24 77 01 00 00 00 C3
+
+cmpb $0, 37(%rsp)
+. 514 0x12345678 6
+. 80 7C 24 25 00 C3
+
+cmpb $0, 38(%rsp)
+. 515 0x12345678 6
+. 80 7C 24 26 00 C3
+
+cmpb $0, 39(%rsp)
+. 516 0x12345678 6
+. 80 7C 24 27 00 C3
+
+cmpb $0, 43(%rsp)
+. 517 0x12345678 6
+. 80 7C 24 2B 00 C3
+
+cmpb $0, 44(%r12)
+. 518 0x12345678 7
+. 41 80 7C 24 2C 00 C3
+
+cmpb $0, 44(%r13)
+. 519 0x12345678 6
+. 41 80 7D 2C 00 C3
+
+cmpb $0, 44(%rax)
+. 520 0x12345678 5
+. 80 78 2C 00 C3
+
+cmpb $0, 46(%rsp)
+. 521 0x12345678 6
+. 80 7C 24 2E 00 C3
+
+cmpb $0, 47(%rsp)
+. 522 0x12345678 6
+. 80 7C 24 2F 00 C3
+
+cmpb $0, 48(%rsp)
+. 523 0x12345678 6
+. 80 7C 24 30 00 C3
+
+cmpb $0, 4(%rax)
+. 524 0x12345678 5
+. 80 78 04 00 C3
+
+cmpb $0, 4(%rax,%rcx)
+. 525 0x12345678 6
+. 80 7C 08 04 00 C3
+
+cmpb $0, 55(%rsp)
+. 526 0x12345678 6
+. 80 7C 24 37 00 C3
+
+cmpb $0, 5(%rax)
+. 527 0x12345678 5
+. 80 78 05 00 C3
+
+cmpb $0, 60(%rsp)
+. 528 0x12345678 6
+. 80 7C 24 3C 00 C3
+
+cmpb $0, 6(%rsp)
+. 529 0x12345678 6
+. 80 7C 24 06 00 C3
+
+cmpb $0, 8(%rax)
+. 530 0x12345678 5
+. 80 78 08 00 C3
+
+cmpb $0, 8(%rdi)
+. 531 0x12345678 5
+. 80 7F 08 00 C3
+
+cmpb $0, 439043(%rip)
+. 532 0x12345678 8
+. 80 3D 03 B3 06 00 00 C3
+
+cmpb $0, 9(%rip)
+. 533 0x12345678 8
+. 80 3D 09 00 00 00 00 C3
+
+cmpb $0, (%rax,%r12)
+. 534 0x12345678 6
+. 42 80 3C 20 00 C3
+
+cmpb $0, (%rax,%r13)
+. 535 0x12345678 6
+. 42 80 3C 28 00 C3
+
+cmpb $0, (%rax,%rdi)
+. 536 0x12345678 5
+. 80 3C 38 00 C3
+
+cmpb $0, (%rbx,%rax)
+. 537 0x12345678 5
+. 80 3C 03 00 C3
+
+cmpb $0, (%rcx,%r10)
+. 538 0x12345678 6
+. 42 80 3C 11 00 C3
+
+cmpb $0, (%rcx,%r9)
+. 539 0x12345678 6
+. 42 80 3C 09 00 C3
+
+cmpb $0, (%rcx,%rdi)
+. 540 0x12345678 5
+. 80 3C 39 00 C3
+
+cmpb $0, (%rdi)
+. 541 0x12345678 4
+. 80 3F 00 C3
+
+cmpb $0, (%rdi,%rax)
+. 542 0x12345678 5
+. 80 3C 07 00 C3
+
+cmpb $0, (%rdx,%rax)
+. 543 0x12345678 5
+. 80 3C 02 00 C3
+
+cmpb $0, (%rsi)
+. 544 0x12345678 4
+. 80 3E 00 C3
+
+cmpb $100, 1(%r12)
+. 545 0x12345678 7
+. 41 80 7C 24 01 64 C3
+
+cmpb $101, 1(%r12)
+. 546 0x12345678 7
+. 41 80 7C 24 01 65 C3
+
+cmpb $-10, 1(%r12)
+. 547 0x12345678 7
+. 41 80 7C 24 01 F6 C3
+
+cmpb $102, 1(%r12)
+. 548 0x12345678 7
+. 41 80 7C 24 01 66 C3
+
+cmpb $102, %al
+. 549 0x12345678 3
+. 3C 66 C3
+
+cmpb $103, 1(%r12)
+. 550 0x12345678 7
+. 41 80 7C 24 01 67 C3
+
+cmpb $104, 1(%r12)
+. 551 0x12345678 7
+. 41 80 7C 24 01 68 C3
+
+cmpb $105, 1(%r12)
+. 552 0x12345678 7
+. 41 80 7C 24 01 69 C3
+
+cmpb $106, 1(%r12)
+. 553 0x12345678 7
+. 41 80 7C 24 01 6A C3
+
+cmpb $107, 1(%r12)
+. 554 0x12345678 7
+. 41 80 7C 24 01 6B C3
+
+cmpb $108, 1(%r12)
+. 555 0x12345678 7
+. 41 80 7C 24 01 6C C3
+
+cmpb $108, (%rcx,%r12)
+. 556 0x12345678 6
+. 42 80 3C 21 6C C3
+
+cmpb $109, 1(%r12)
+. 557 0x12345678 7
+. 41 80 7C 24 01 6D C3
+
+cmpb $10, %dil
+. 558 0x12345678 5
+. 40 80 FF 0A C3
+
+cmpb $110, 1(%r12)
+. 559 0x12345678 7
+. 41 80 7C 24 01 6E C3
+
+cmpb $1, 107(%rsp)
+. 560 0x12345678 6
+. 80 7C 24 6B 01 C3
+
+cmpb $1, 111(%rsp)
+. 561 0x12345678 6
+. 80 7C 24 6F 01 C3
+
+cmpb $111, 2(%r12)
+. 562 0x12345678 7
+. 41 80 7C 24 02 6F C3
+
+cmpb $1, 112(%rsp)
+. 563 0x12345678 6
+. 80 7C 24 70 01 C3
+
+cmpb $111, %cl
+. 564 0x12345678 4
+. 80 F9 6F C3
+
+cmpb $1, 11(%rsp)
+. 565 0x12345678 6
+. 80 7C 24 0B 01 C3
+
+cmpb $112, 1(%r12)
+. 566 0x12345678 7
+. 41 80 7C 24 01 70 C3
+
+cmpb $112, 2(%r12)
+. 567 0x12345678 7
+. 41 80 7C 24 02 70 C3
+
+cmpb $113, 1(%r12)
+. 568 0x12345678 7
+. 41 80 7C 24 01 71 C3
+
+cmpb $1, 138(%rsp)
+. 569 0x12345678 9
+. 80 BC 24 8A 00 00 00 01 C3
+
+cmpb $113, %bl
+. 570 0x12345678 4
+. 80 FB 71 C3
+
+cmpb $-113, %cl
+. 571 0x12345678 4
+. 80 F9 8F C3
+
+cmpb $114, 1(%r12)
+. 572 0x12345678 7
+. 41 80 7C 24 01 72 C3
+
+cmpb $114, %bl
+. 573 0x12345678 4
+. 80 FB 72 C3
+
+cmpb $115, 1(%r12)
+. 574 0x12345678 7
+. 41 80 7C 24 01 73 C3
+
+cmpb $115, %bl
+. 575 0x12345678 4
+. 80 FB 73 C3
+
+cmpb $1, 15(%rsp)
+. 576 0x12345678 6
+. 80 7C 24 0F 01 C3
+
+cmpb $116, 1(%r12)
+. 577 0x12345678 7
+. 41 80 7C 24 01 74 C3
+
+cmpb $1, 16(%rsp)
+. 578 0x12345678 6
+. 80 7C 24 10 01 C3
+
+cmpb $117, 1(%r12)
+. 579 0x12345678 7
+. 41 80 7C 24 01 75 C3
+
+cmpb $118, 1(%r12)
+. 580 0x12345678 7
+. 41 80 7C 24 01 76 C3
+
+cmpb $11, %cl
+. 581 0x12345678 4
+. 80 F9 0B C3
+
+cmpb $-12, 1(%r12)
+. 582 0x12345678 7
+. 41 80 7C 24 01 F4 C3
+
+cmpb $1, 22(%rsp)
+. 583 0x12345678 6
+. 80 7C 24 16 01 C3
+
+cmpb $-125, 1(%rax)
+. 584 0x12345678 5
+. 80 78 01 83 C3
+
+cmpb $126, 1(%r12)
+. 585 0x12345678 7
+. 41 80 7C 24 01 7E C3
+
+cmpb $126, 2(%r12)
+. 586 0x12345678 7
+. 41 80 7C 24 02 7E C3
+
+cmpb $127, 1(%r12)
+. 587 0x12345678 7
+. 41 80 7C 24 01 7F C3
+
+cmpb $127, 2(%r12)
+. 588 0x12345678 7
+. 41 80 7C 24 02 7F C3
+
+cmpb $1, 27(%rsp)
+. 589 0x12345678 6
+. 80 7C 24 1B 01 C3
+
+cmpb $-128, %al
+. 590 0x12345678 3
+. 3C 80 C3
+
+cmpb $13, 14(%rax)
+. 591 0x12345678 5
+. 80 78 0E 0D C3
+
+cmpb $-13, 1(%r12)
+. 592 0x12345678 7
+. 41 80 7C 24 01 F3 C3
+
+cmpb $1, 38(%rsp)
+. 593 0x12345678 6
+. 80 7C 24 26 01 C3
+
+cmpb $-13, %bl
+. 594 0x12345678 4
+. 80 FB F3 C3
+
+cmpb $-14, 1(%r12)
+. 595 0x12345678 7
+. 41 80 7C 24 01 F2 C3
+
+cmpb $1, 42(%rsp)
+. 596 0x12345678 6
+. 80 7C 24 2A 01 C3
+
+cmpb $1, 47(%rsp)
+. 597 0x12345678 6
+. 80 7C 24 2F 01 C3
+
+cmpb $1, 48(%rsp)
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+
+cmpb $-14, %bl
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+cmpb $15, 106(%rsp)
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+. 80 7C 24 6A 0F C3
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+cmpb $15, 139(%rsp)
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+cmpb $15, 19(%rsp)
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+cmpb $-15, 1(%r12)
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+cmpb $15, 1(%r12)
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+cmpb $15, 25(%rsp)
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+cmpb $15, 26(%rsp)
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+cmpb $15, 27(%rsp)
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+cmpb $15, 61(%rsp)
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+cmpb $15, 62(%rsp)
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+cmpb $15, 63(%rsp)
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+cmpb $15, 79(%rsp)
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+cmpb $15, %al
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+cmpb $15, %bl
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+cmpb $15, (%r12)
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+cmpb $15, %r12b
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+cmpb $15, %r15b
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+cmpb $16, 2(%r12)
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+cmpb $1, 67(%rsp)
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+cmpb $-16, %al
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+cmpb $16, %al
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+
+cmpb $16, %cl
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+cmpb $-16, (%rax)
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+cmpb $-17, 1(%r12)
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+cmpb $17, 2(%r12)
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+cmpb $-18, 1(%r12)
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+cmpb $18, 1(%r12)
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+cmpb $1, 8(%rdi)
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+cmpb $19, 17(%rax)
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+cmpb $-19, 1(%r12)
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+cmpb $19, 1(%r12)
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+cmpb $1, %al
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+cmpb $1, %bl
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+cmpb $1, %cl
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+cmpb $1, %dil
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+cmpb $1, %dl
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+cmpb $1, %r12b
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+cmpb $1, %r14b
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+cmpb $1, %r8b
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+cmpb $1, %sil
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+cmpb $-20, 1(%r12)
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+cmpb $-21, 1(%r12)
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+cmpb $21, 1(%r12)
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+cmpb $21, %dl
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+cmpb $-2, 1(%r12)
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+cmpb $-22, 1(%r12)
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+cmpb $22, 1(%r12)
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+cmpb $-23, 1(%r12)
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+cmpb $23, 1(%r12)
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+cmpb $-24, 1(%r12)
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+cmpb $24, 1(%r12)
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+cmpb $-25, 1(%r12)
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+cmpb $25, %al
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+cmpb $-26, 1(%r12)
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+cmpb $-26, 2(%r12)
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+cmpb $-27, 1(%r12)
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+cmpb $27, 8(%rax)
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+cmpb $-28, 1(%r12)
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+cmpb $-29, 1(%r12)
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+cmpb $29, 2(%rax)
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+cmpb $-29, %bl
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+cmpb $2, %cl
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+cmpb $-30, 1(%r12)
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+cmpb $-31, 1(%r12)
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+cmpb $-3, 1(%r12)
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+cmpb $-32, 1(%r12)
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+cmpb $-33, 1(%r12)
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+cmpb $3, 38(%rsp)
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+cmpb $-33, %r12b
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+cmpb $-34, 1(%r12)
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+cmpb $-34, %r12b
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+cmpb $-35, 1(%r12)
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+cmpb $-35, %r12b
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+cmpb $3, 5(%rax)
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+cmpb $-36, 1(%r12)
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+cmpb $36, 3(%rax)
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+cmpb $-36, %r12b
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+cmpb $-37, 1(%r12)
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+cmpb $37, %al
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+cmpb $-37, %r12b
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+cmpb $-38, 1(%r12)
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+cmpb $-38, %r12b
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+cmpb $-39, 1(%r12)
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+cmpb $-39, %r12b
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+cmpb $3, %bpl
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+cmpb $3, %r14b
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+cmpb $3, %sil
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+cmpb $-40, 1(%r12)
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+cmpb $40, %al
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+cmpb $40, %cl
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+cmpb $-40, %r12b
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+cmpb $-41, 1(%r12)
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+cmpb $41, 1(%r12)
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+cmpb $-4, 1(%r12)
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+cmpb $-42, 1(%r12)
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+cmpb $42, 1(%r12)
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+cmpb $-42, 2(%r12)
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+cmpb $42, 2(%r12)
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+cmpb $-43, 1(%r12)
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+cmpb $43, 1(%r12)
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+cmpb $-44, 1(%r12)
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+cmpb $44, 1(%r12)
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+cmpb $44, 2(%r12)
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+cmpb $44, (%rcx,%r12)
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+cmpb $-45, 1(%r12)
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+cmpb $45, (%rcx,%r12)
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+cmpb $-46, 1(%r12)
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+cmpb $46, %al
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+cmpb $-47, 1(%r12)
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+cmpb $48, (%rcx,%r12)
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+cmpb $4, %bpl
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+cmpb $4, %cl
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+cmpb $4, %dl
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+cmpb $4, %r13b
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+cmpb $5, 11(%rax)
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+cmpb $-5, 1(%r12)
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+cmpb $-56, 10(%rax)
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+cmpb $-56, 7(%rax)
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+cmpb $-58, 1(%r12)
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+cmpb $-59, 1(%r12)
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+cmpb $5, %al
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+cmpb $5, %r13b
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+cmpb $5, %r15b
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+cmpb $-60, 1(%r12)
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+cmpb $-61, 1(%r12)
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+cmpb $-6, 1(%r12)
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+cmpb $-62, 1(%r12)
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+cmpb $-62, 2(%r12)
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+cmpb $-63, 12(%rax)
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+cmpb $-63, 15(%rax)
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+cmpb $-63, 3(%rax)
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+cmpb $-63, 6(%rax)
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+cmpb $-63, 9(%rax)
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+cmpb $-63, (%rax)
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+cmpb $-64, 13(%rax)
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+. 80 78 0D C0 C3
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+cmpb $-64, 16(%rax)
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+cmpb $-64, 1(%rax)
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+. 80 78 01 C0 C3
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+cmpb $-64, 4(%rax)
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+cmpb $-65, %al
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+cmpb $68, 2(%rax)
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+cmpb $6, %cl
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+cmpb $-7, 1(%r12)
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+cmpb $80, 1(%r12)
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+cmpb $81, 1(%r12)
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+cmpb $81, 2(%r12)
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+cmpb $-8, 1(%r12)
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+cmpb $-82, 1(%r12)
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+cmpb $82, 1(%r12)
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+cmpb $82, 2(%r12)
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+cmpb $-82, %r13b
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+cmpb $83, 1(%r12)
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+cmpb $83, 2(%r12)
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+cmpb $83, (%rcx,%r12)
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+cmpb $84, 1(%r12)
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+cmpb $85, 1(%r12)
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+cmpb $86, 1(%r12)
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+cmpb $-86, %r13b
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+cmpb $87, 1(%r12)
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+cmpb $87, %al
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+cmpb $88, 1(%r12)
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+cmpb $88, 2(%r12)
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+cmpb $89, 1(%r12)
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+cmpb $89, 2(%r12)
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+cmpb $90, 1(%r12)
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+cmpb $90, 2(%r12)
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+cmpb $-90, %r13b
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+cmpb $91, 1(%r12)
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+cmpb $91, 2(%r12)
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+cmpb $92, 1(%r12)
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+cmpb $92, 2(%r12)
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+cmpb $-92, %r13b
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+cmpb $93, 1(%r12)
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+cmpb $93, 2(%r12)
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+cmpb $94, 1(%r12)
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+cmpb $94, 2(%r12)
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+cmpb $95, 1(%r12)
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+cmpb $95, 2(%r12)
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+cmpb $95, %al
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+cmpb $96, 1(%r12)
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+cmpb $97, 1(%r12)
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+cmpb $98, 1(%r12)
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+cmpb $99, 1(%r12)
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+cmpb $9, %al
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+cmpb $9, %cl
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+cmpb %al, 8(%rdi)
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+cmpb %al, 8(%rdx)
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+cmpb %al, %bl
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+cmpb %al, %dl
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+cmpb %bl, %dl
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+cmpb %cl, %r10b
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+cmpb %cl, %sil
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+cmpb %dil, %sil
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+cmpb %dl, %al
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+cmpb %dl, %bl
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+cmpb %dl, %cl
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+cmpb %dl, %dil
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+cmpb %dl, %r11b
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+cmpb %dl, %r8b
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+cmpb %dl, %r9b
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+cmpb %r11b, %r8b
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+cmpb %r15b, 139(%rsp)
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+cmpb %r15b, 79(%rsp)
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+cmpl $0, 8(%rax)
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+cmpl $1000000, %eax
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+cmpl $10000, 12(%rax)
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+cmpl $10000, %ebx
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+cmpl $10000, (%rdi)
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+cmpl $1000, %eax
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+cmpl $100, %eax
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+cmpl $100, %edx
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+cmpl $101, %eax
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+cmpl $101, %edx
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+cmpl $102, %eax
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+cmpl $103, %eax
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+cmpl $1073741824, %esi
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+cmpl 108(%rsp), %eax
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+cmpl 108(%rsp), %ebx
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+cmpl 108(%rsp), %r12d
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+cmpl $10, %eax
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+cmpl $10, %r13d
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+cmpl $10, %r9d
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+cmpl $1, 108(%rsp)
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+cmpl $11, %eax
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+cmpl 120(%rsp), %eax
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+cmpl 120(%rsp), %ebp
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+cmpl 120(%rsp), %ebx
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+. 3B 5C 24 78 C3
+
+cmpl 120(%rsp), %ecx
+. 826 0x12345678 5
+. 3B 4C 24 78 C3
+
+cmpl 120(%rsp), %r12d
+. 827 0x12345678 6
+. 44 3B 64 24 78 C3
+
+cmpl 120(%rsp), %r9d
+. 828 0x12345678 6
+. 44 3B 4C 24 78 C3
+
+cmpl $124, %eax
+. 829 0x12345678 4
+. 83 F8 7C C3
+
+cmpl $124, %r12d
+. 830 0x12345678 5
+. 41 83 FC 7C C3
+
+cmpl $-1, 24(%rax)
+. 831 0x12345678 5
+. 83 78 18 FF C3
+
+cmpl $1, 24(%rsp)
+. 832 0x12345678 6
+. 83 7C 24 18 01 C3
+
+cmpl 124(%rsp), %eax
+. 833 0x12345678 5
+. 3B 44 24 7C C3
+
+cmpl $128, %eax
+. 834 0x12345678 6
+. 3D 80 00 00 00 C3
+
+cmpl $128, %ebx
+. 835 0x12345678 7
+. 81 FB 80 00 00 00 C3
+
+cmpl $128, %ecx
+. 836 0x12345678 7
+. 81 F9 80 00 00 00 C3
+
+cmpl $128, %edi
+. 837 0x12345678 7
+. 81 FF 80 00 00 00 C3
+
+cmpl $128, %edx
+. 838 0x12345678 7
+. 81 FA 80 00 00 00 C3
+
+cmpl $128, %esi
+. 839 0x12345678 7
+. 81 FE 80 00 00 00 C3
+
+cmpl $128, %r8d
+. 840 0x12345678 8
+. 41 81 F8 80 00 00 00 C3
+
+cmpl $1, 28(%rsp)
+. 841 0x12345678 6
+. 83 7C 24 1C 01 C3
+
+cmpl $-129, %eax
+. 842 0x12345678 6
+. 3D 7F FF FF FF C3
+
+cmpl $-129, %ebx
+. 843 0x12345678 7
+. 81 FB 7F FF FF FF C3
+
+cmpl $-129, %ecx
+. 844 0x12345678 7
+. 81 F9 7F FF FF FF C3
+
+cmpl $-129, %edi
+. 845 0x12345678 7
+. 81 FF 7F FF FF FF C3
+
+cmpl $-129, %edx
+. 846 0x12345678 7
+. 81 FA 7F FF FF FF C3
+
+cmpl $-129, %esi
+. 847 0x12345678 7
+. 81 FE 7F FF FF FF C3
+
+cmpl $-129, %r8d
+. 848 0x12345678 8
+. 41 81 F8 7F FF FF FF C3
+
+cmpl $12, %eax
+. 849 0x12345678 4
+. 83 F8 0C C3
+
+cmpl 12(%r13), %r15d
+. 850 0x12345678 5
+. 45 3B 7D 0C C3
+
+cmpl 12(%r14), %eax
+. 851 0x12345678 5
+. 41 3B 46 0C C3
+
+cmpl 12(%r14), %r12d
+. 852 0x12345678 5
+. 45 3B 66 0C C3
+
+cmpl 12(%r14), %r13d
+. 853 0x12345678 5
+. 45 3B 6E 0C C3
+
+cmpl 12(%rax), %edx
+. 854 0x12345678 4
+. 3B 50 0C C3
+
+cmpl 12(%rbx), %esi
+. 855 0x12345678 4
+. 3B 73 0C C3
+
+cmpl 12(%rbx), %r13d
+. 856 0x12345678 5
+. 44 3B 6B 0C C3
+
+cmpl 12(%rcx), %ebx
+. 857 0x12345678 4
+. 3B 59 0C C3
+
+cmpl 12(%rdi), %eax
+. 858 0x12345678 4
+. 3B 47 0C C3
+
+cmpl 12(%rdi), %esi
+. 859 0x12345678 4
+. 3B 77 0C C3
+
+cmpl 12(%rdx), %eax
+. 860 0x12345678 4
+. 3B 42 0C C3
+
+cmpl 12(%rdx), %ebx
+. 861 0x12345678 4
+. 3B 5A 0C C3
+
+cmpl 12(%rsi), %edi
+. 862 0x12345678 4
+. 3B 7E 0C C3
+
+cmpl 12(%rsp), %eax
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+. 3B 44 24 0C C3
+
+cmpl 12(%rsp), %r15d
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+. 44 3B 7C 24 0C C3
+
+cmpl $1, 36(%rsp)
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+. 83 7C 24 24 01 C3
+
+cmpl $138, %eax
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+. 3D 8A 00 00 00 C3
+
+cmpl $138, %r13d
+. 867 0x12345678 8
+. 41 81 FD 8A 00 00 00 C3
+
+cmpl $13, %edi
+. 868 0x12345678 4
+. 83 FF 0D C3
+
+cmpl $13, %esi
+. 869 0x12345678 4
+. 83 FE 0D C3
+
+cmpl $13, (%rdi)
+. 870 0x12345678 4
+. 83 3F 0D C3
+
+cmpl $144, %ebx
+. 871 0x12345678 7
+. 81 FB 90 00 00 00 C3
+
+cmpl $14, %eax
+. 872 0x12345678 4
+. 83 F8 0E C3
+
+cmpl $14, %ebp
+. 873 0x12345678 4
+. 83 FD 0E C3
+
+cmpl $14, %edi
+. 874 0x12345678 4
+. 83 FF 0E C3
+
+cmpl $1, 528(%rsp)
+. 875 0x12345678 9
+. 83 BC 24 10 02 00 00 01 C3
+
+cmpl $158, %eax
+. 876 0x12345678 6
+. 3D 9E 00 00 00 C3
+
+cmpl $159, %ebx
+. 877 0x12345678 7
+. 81 FB 9F 00 00 00 C3
+
+cmpl $15, %eax
+. 878 0x12345678 4
+. 83 F8 0F C3
+
+cmpl $15, %ebp
+. 879 0x12345678 4
+. 83 FD 0F C3
+
+cmpl $15, %edi
+. 880 0x12345678 4
+. 83 FF 0F C3
+
+cmpl $15, %r14d
+. 881 0x12345678 5
+. 41 83 FE 0F C3
+
+cmpl $1, 688(%rsp,%rcx,4)
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+. 83 BC 8C B0 02 00 00 01 C3
+
+cmpl $1, 688(%rsp,%rsi,4)
+. 883 0x12345678 9
+. 83 BC B4 B0 02 00 00 01 C3
+
+cmpl $16, %eax
+. 884 0x12345678 4
+. 83 F8 10 C3
+
+cmpl $16, %edi
+. 885 0x12345678 4
+. 83 FF 10 C3
+
+cmpl $16, %edx
+. 886 0x12345678 4
+. 83 FA 10 C3
+
+cmpl $16, %r15d
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+. 41 83 FF 10 C3
+
+cmpl 16(%rbp), %r14d
+. 888 0x12345678 5
+. 44 3B 75 10 C3
+
+cmpl 16(%rsp), %eax
+. 889 0x12345678 5
+. 3B 44 24 10 C3
+
+cmpl 16(%rsp), %edx
+. 890 0x12345678 5
+. 3B 54 24 10 C3
+
+cmpl 16(%rsp), %r14d
+. 891 0x12345678 6
+. 44 3B 74 24 10 C3
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+cmpl $174, %eax
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+. 3D AE 00 00 00 C3
+
+cmpl $175, %eax
+. 893 0x12345678 6
+. 3D AF 00 00 00 C3
+
+cmpl $175, %ebx
+. 894 0x12345678 7
+. 81 FB AF 00 00 00 C3
+
+cmpl $17, %eax
+. 895 0x12345678 4
+. 83 F8 11 C3
+
+cmpl $182, %ebx
+. 896 0x12345678 7
+. 81 FB B6 00 00 00 C3
+
+cmpl $183, %ebx
+. 897 0x12345678 7
+. 81 FB B7 00 00 00 C3
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+cmpl $1, 88(%rsp)
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+. 83 7C 24 58 01 C3
+
+cmpl $18, %eax
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+. 83 F8 12 C3
+
+cmpl $18, %ecx
+. 900 0x12345678 4
+. 83 F9 12 C3
+
+cmpl $-1, 8(%rax)
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+. 83 78 08 FF C3
+
+cmpl $1, 8(%rbx,%rax)
+. 902 0x12345678 6
+. 83 7C 03 08 01 C3
+
+cmpl $1, 8(%rcx,%rdx)
+. 903 0x12345678 6
+. 83 7C 11 08 01 C3
+
+cmpl $1, 8(%rdi,%rax)
+. 904 0x12345678 6
+. 83 7C 07 08 01 C3
+
+cmpl $1, 8(%rdx,%rax)
+. 905 0x12345678 6
+. 83 7C 02 08 01 C3
+
+cmpl $1, 8(%rdx,%rax,4)
+. 906 0x12345678 6
+. 83 7C 82 08 01 C3
+
+cmpl $1, 8(%rsi,%rax)
+. 907 0x12345678 6
+. 83 7C 06 08 01 C3
+
+cmpl $1, 8(%rsi,%rdx)
+. 908 0x12345678 6
+. 83 7C 16 08 01 C3
+
+cmpl $1, 8(%rsp)
+. 909 0x12345678 6
+. 83 7C 24 08 01 C3
+
+cmpl $192, %edi
+. 910 0x12345678 7
+. 81 FF C0 00 00 00 C3
+
+cmpl $19, %eax
+. 911 0x12345678 4
+. 83 F8 13 C3
+
+cmpl $-1, %eax
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+. 83 F8 FF C3
+
+cmpl $1, %eax
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+. 83 F8 01 C3
+
+cmpl $1, %ebp
+. 914 0x12345678 4
+. 83 FD 01 C3
+
+cmpl $1, %ebx
+. 915 0x12345678 4
+. 83 FB 01 C3
+
+cmpl $-1, %ecx
+. 916 0x12345678 4
+. 83 F9 FF C3
+
+cmpl $1, %ecx
+. 917 0x12345678 4
+. 83 F9 01 C3
+
+cmpl $-1, %edi
+. 918 0x12345678 4
+. 83 FF FF C3
+
+cmpl $1, %edi
+. 919 0x12345678 4
+. 83 FF 01 C3
+
+cmpl $-1, %edx
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+. 83 FA FF C3
+
+cmpl $1, %edx
+. 921 0x12345678 4
+. 83 FA 01 C3
+
+cmpl $1, %esi
+. 922 0x12345678 4
+. 83 FE 01 C3
+
+cmpl $1, (%r12)
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+. 41 83 3C 24 01 C3
+
+cmpl $1, %r12d
+. 924 0x12345678 5
+. 41 83 FC 01 C3
+
+cmpl $1, (%r13)
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+. 41 83 7D 00 01 C3
+
+cmpl $1, %r13d
+. 926 0x12345678 5
+. 41 83 FD 01 C3
+
+cmpl $-1, (%r14)
+. 927 0x12345678 5
+. 41 83 3E FF C3
+
+cmpl $1, %r14d
+. 928 0x12345678 5
+. 41 83 FE 01 C3
+
+cmpl $1, (%r14,%rax,4)
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+. 41 83 3C 86 01 C3
+
+cmpl $-1, (%r15)
+. 930 0x12345678 5
+. 41 83 3F FF C3
+
+cmpl $-1, %r8d
+. 931 0x12345678 5
+. 41 83 F8 FF C3
+
+cmpl $1, %r9d
+. 932 0x12345678 5
+. 41 83 F9 01 C3
+
+cmpl $-1, (%rax)
+. 933 0x12345678 4
+. 83 38 FF C3
+
+cmpl $1, (%rax)
+. 934 0x12345678 4
+. 83 38 01 C3
+
+cmpl $-1, (%rbp)
+. 935 0x12345678 5
+. 83 7D 00 FF C3
+
+cmpl $1, (%rbx)
+. 936 0x12345678 4
+. 83 3B 01 C3
+
+cmpl $1, (%rdi)
+. 937 0x12345678 4
+. 83 3F 01 C3
+
+cmpl $202, %eax
+. 938 0x12345678 6
+. 3D CA 00 00 00 C3
+
+cmpl $202, %r13d
+. 939 0x12345678 8
+. 41 81 FD CA 00 00 00 C3
+
+cmpl $205, %eax
+. 940 0x12345678 6
+. 3D CD 00 00 00 C3
+
+cmpl 20(%rax), %ebx
+. 941 0x12345678 4
+. 3B 58 14 C3
+
+cmpl 20(%rbp), %r12d
+. 942 0x12345678 5
+. 44 3B 65 14 C3
+
+cmpl 20(%rsp), %r14d
+. 943 0x12345678 6
+. 44 3B 74 24 14 C3
+
+cmpl $2, 1024(%rsp)
+. 944 0x12345678 9
+. 83 BC 24 00 04 00 00 02 C3
+
+cmpl $2, 104(%rsp)
+. 945 0x12345678 6
+. 83 7C 24 68 02 C3
+
+cmpl $2, 108(%rsp)
+. 946 0x12345678 6
+. 83 7C 24 6C 02 C3
+
+cmpl $-2147483648, %edi
+. 947 0x12345678 7
+. 81 FF 00 00 00 80 C3
+
+cmpl $-2147483648, %edx
+. 948 0x12345678 7
+. 81 FA 00 00 00 80 C3
+
+cmpl $-2147483648, %esi
+. 949 0x12345678 7
+. 81 FE 00 00 00 80 C3
+
+cmpl $234, %eax
+. 950 0x12345678 6
+. 3D EA 00 00 00 C3
+
+cmpl $234, %r13d
+. 951 0x12345678 8
+. 41 81 FD EA 00 00 00 C3
+
+cmpl $2, 36(%rsp)
+. 952 0x12345678 6
+. 83 7C 24 24 02 C3
+
+cmpl $23, %eax
+. 953 0x12345678 4
+. 83 F8 17 C3
+
+cmpl $240, %eax
+. 954 0x12345678 6
+. 3D F0 00 00 00 C3
+
+cmpl $242, %eax
+. 955 0x12345678 6
+. 3D F2 00 00 00 C3
+
+cmpl $243, %eax
+. 956 0x12345678 6
+. 3D F3 00 00 00 C3
+
+cmpl 248(%rsp), %eax
+. 957 0x12345678 8
+. 3B 84 24 F8 00 00 00 C3
+
+cmpl 248(%rsp), %r12d
+. 958 0x12345678 9
+. 44 3B A4 24 F8 00 00 00 C3
+
+cmpl $24, %eax
+. 959 0x12345678 4
+. 83 F8 18 C3
+
+cmpl $255, %eax
+. 960 0x12345678 6
+. 3D FF 00 00 00 C3
+
+cmpl $255, %edi
+. 961 0x12345678 7
+. 81 FF FF 00 00 00 C3
+
+cmpl $255, %r14d
+. 962 0x12345678 8
+. 41 81 FE FF 00 00 00 C3
+
+cmpl $256, %eax
+. 963 0x12345678 6
+. 3D 00 01 00 00 C3
+
+cmpl $256, %ebx
+. 964 0x12345678 7
+. 81 FB 00 01 00 00 C3
+
+cmpl $256, %ecx
+. 965 0x12345678 7
+. 81 F9 00 01 00 00 C3
+
+cmpl $256, %edi
+. 966 0x12345678 7
+. 81 FF 00 01 00 00 C3
+
+cmpl $256, %edx
+. 967 0x12345678 7
+. 81 FA 00 01 00 00 C3
+
+cmpl $256, %esi
+. 968 0x12345678 7
+. 81 FE 00 01 00 00 C3
+
+cmpl $256, %r8d
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+. 41 81 F8 00 01 00 00 C3
+
+cmpl $266, %eax
+. 970 0x12345678 6
+. 3D 0A 01 00 00 C3
+
+cmpl $266, %r13d
+. 971 0x12345678 8
+. 41 81 FD 0A 01 00 00 C3
+
+cmpl $26, %eax
+. 972 0x12345678 4
+. 83 F8 1A C3
+
+cmpl $26, %r12d
+. 973 0x12345678 5
+. 41 83 FC 1A C3
+
+cmpl $27, %eax
+. 974 0x12345678 4
+. 83 F8 1B C3
+
+cmpl $284, %eax
+. 975 0x12345678 6
+. 3D 1C 01 00 00 C3
+
+cmpl $284, %r12d
+. 976 0x12345678 8
+. 41 81 FC 1C 01 00 00 C3
+
+cmpl $285, %eax
+. 977 0x12345678 6
+. 3D 1D 01 00 00 C3
+
+cmpl $28, %eax
+. 978 0x12345678 4
+. 83 F8 1C C3
+
+cmpl $28, %r12d
+. 979 0x12345678 5
+. 41 83 FC 1C C3
+
+cmpl 28(%r12), %ebp
+. 980 0x12345678 6
+. 41 3B 6C 24 1C C3
+
+cmpl 28(%r12), %ecx
+. 981 0x12345678 6
+. 41 3B 4C 24 1C C3
+
+cmpl 28(%r14), %ecx
+. 982 0x12345678 5
+. 41 3B 4E 1C C3
+
+cmpl $2, 8(%rax,%rdi)
+. 983 0x12345678 6
+. 83 7C 38 08 02 C3
+
+cmpl $2, 8(%rbx,%rax)
+. 984 0x12345678 6
+. 83 7C 03 08 02 C3
+
+cmpl $2, 8(%rcx,%r13)
+. 985 0x12345678 7
+. 42 83 7C 29 08 02 C3
+
+cmpl $2, 8(%rdi,%rdx)
+. 986 0x12345678 6
+. 83 7C 17 08 02 C3
+
+cmpl $2, 8(%rdx,%rax)
+. 987 0x12345678 6
+. 83 7C 02 08 02 C3
+
+cmpl $2, 8(%rsi,%rdx)
+. 988 0x12345678 6
+. 83 7C 16 08 02 C3
+
+cmpl 28(%rsp), %eax
+. 989 0x12345678 5
+. 3B 44 24 1C C3
+
+cmpl $2, %eax
+. 990 0x12345678 4
+. 83 F8 02 C3
+
+cmpl $2, %ebp
+. 991 0x12345678 4
+. 83 FD 02 C3
+
+cmpl $-2, %ebx
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+. 83 FB FE C3
+
+cmpl $2, %ebx
+. 993 0x12345678 4
+. 83 FB 02 C3
+
+cmpl $2, %ecx
+. 994 0x12345678 4
+. 83 F9 02 C3
+
+cmpl $2, %edi
+. 995 0x12345678 4
+. 83 FF 02 C3
+
+cmpl $2, %edx
+. 996 0x12345678 4
+. 83 FA 02 C3
+
+cmpl $2, %esi
+. 997 0x12345678 4
+. 83 FE 02 C3
+
+cmpl $2, (%r12)
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+. 41 83 3C 24 02 C3
+
+cmpl $2, %r12d
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+. 41 83 FC 02 C3
+
+cmpl $-2, %r13d
+. 1000 0x12345678 5
+. 41 83 FD FE C3
+
+cmpl $2, %r13d
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+. 41 83 FD 02 C3
+
+cmpl $2, %r14d
+. 1002 0x12345678 5
+. 41 83 FE 02 C3
+
+cmpl $-2, (%r14,%rax,4)
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+. 41 83 3C 86 FE C3
+
+cmpl $-2, (%r14,%rbx,4)
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+. 41 83 3C 9E FE C3
+
+cmpl $2, %r9d
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+. 41 83 F9 02 C3
+
+cmpl $2, (%rax)
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+. 83 38 02 C3
+
+cmpl $2, (%rbp)
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+. 83 7D 00 02 C3
+
+cmpl $2, (%rbx)
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+. 83 3B 02 C3
+
+cmpl $2, (%rdi)
+. 1009 0x12345678 4
+. 83 3F 02 C3
+
+cmpl $-2, (%rdi,%rbx,4)
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+. 83 3C 9F FE C3
+
+cmpl $2, (%rdx)
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+. 83 3A 02 C3
+
+cmpl $-2, (%rsi,%rbx,4)
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+. 83 3C 9E FE C3
+
+cmpl $3, 1024(%rsp)
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+. 83 BC 24 00 04 00 00 03 C3
+
+cmpl $316, %eax
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+. 3D 3C 01 00 00 C3
+
+cmpl $316, %r12d
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+. 41 81 FC 3C 01 00 00 C3
+
+cmpl $31, %eax
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+. 83 F8 1F C3
+
+cmpl $31, %ebx
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+. 83 FB 1F C3
+
+cmpl $31, %ecx
+. 1018 0x12345678 4
+. 83 F9 1F C3
+
+cmpl $31, %edi
+. 1019 0x12345678 4
+. 83 FF 1F C3
+
+cmpl $31, %esi
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+. 83 FE 1F C3
+
+cmpl $32768, %eax
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+. 3D 00 80 00 00 C3
+
+cmpl $32768, %edi
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+. 81 FF 00 80 00 00 C3
+
+cmpl $32768, %edx
+. 1023 0x12345678 7
+. 81 FA 00 80 00 00 C3
+
+cmpl $32768, %esi
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+. 81 FE 00 80 00 00 C3
+
+cmpl $32768, %r8d
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+. 41 81 F8 00 80 00 00 C3
+
+cmpl $-32769, %eax
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+. 3D FF 7F FF FF C3
+
+cmpl $-32769, %edi
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+. 81 FF FF 7F FF FF C3
+
+cmpl $-32769, %edx
+. 1028 0x12345678 7
+. 81 FA FF 7F FF FF C3
+
+cmpl $-32769, %esi
+. 1029 0x12345678 7
+. 81 FE FF 7F FF FF C3
+
+cmpl $-32769, %r8d
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+. 41 81 F8 FF 7F FF FF C3
+
+cmpl $32, %eax
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+. 83 F8 20 C3
+
+cmpl $32, %r15d
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+. 41 83 FF 20 C3
+
+cmpl 32(%rbp), %r12d
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+. 44 3B 65 20 C3
+
+cmpl 32(%rbx), %r12d
+. 1034 0x12345678 5
+. 44 3B 63 20 C3
+
+cmpl $3, 36(%rsp)
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+. 83 7C 24 24 03 C3
+
+cmpl $37, %eax
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+. 83 F8 25 C3
+
+cmpl $38, %eax
+. 1037 0x12345678 4
+. 83 F8 26 C3
+
+cmpl $38, %ebp
+. 1038 0x12345678 4
+. 83 FD 26 C3
+
+cmpl $38, %edx
+. 1039 0x12345678 4
+. 83 FA 26 C3
+
+cmpl $3, %eax
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+. 83 F8 03 C3
+
+cmpl $3, %ebx
+. 1041 0x12345678 4
+. 83 FB 03 C3
+
+cmpl $3, %ecx
+. 1042 0x12345678 4
+. 83 F9 03 C3
+
+cmpl $3, %edi
+. 1043 0x12345678 4
+. 83 FF 03 C3
+
+cmpl $3, %esi
+. 1044 0x12345678 4
+. 83 FE 03 C3
+
+cmpl $3, %r9d
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+. 41 83 F9 03 C3
+
+cmpl $3, (%rax)
+. 1046 0x12345678 4
+. 83 38 03 C3
+
+cmpl $3, (%rcx)
+. 1047 0x12345678 4
+. 83 39 03 C3
+
+cmpl $3, (%rdi)
+. 1048 0x12345678 4
+. 83 3F 03 C3
+
+cmpl $3, (%rdx)
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+. 83 3A 03 C3
+
+cmpl $400, %eax
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+. 3D 90 01 00 00 C3
+
+cmpl 40(%rsp), %ebx
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+. 3B 5C 24 28 C3
+
+cmpl $4, 1024(%rsp)
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+. 83 BC 24 00 04 00 00 04 C3
+
+cmpl $4, 104(%rsp)
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+. 83 7C 24 68 04 C3
+
+cmpl $412, %eax
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+. 3D 9C 01 00 00 C3
+
+cmpl $412, %r12d
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+. 41 81 FC 9C 01 00 00 C3
+
+cmpl $41, %eax
+. 1056 0x12345678 4
+. 83 F8 29 C3
+
+cmpl $43, %eax
+. 1057 0x12345678 4
+. 83 F8 2B C3
+
+cmpl $4, 40(%rsp)
+. 1058 0x12345678 6
+. 83 7C 24 28 04 C3
+
+cmpl $444, %eax
+. 1059 0x12345678 6
+. 3D BC 01 00 00 C3
+
+cmpl $444, %r12d
+. 1060 0x12345678 8
+. 41 81 FC BC 01 00 00 C3
+
+cmpl $4, 48(%rsp)
+. 1061 0x12345678 6
+. 83 7C 24 30 04 C3
+
+cmpl $46, %eax
+. 1062 0x12345678 4
+. 83 F8 2E C3
+
+cmpl $474, %eax
+. 1063 0x12345678 6
+. 3D DA 01 00 00 C3
+
+cmpl $474, %r12d
+. 1064 0x12345678 8
+. 41 81 FC DA 01 00 00 C3
+
+cmpl $48, %eax
+. 1065 0x12345678 4
+. 83 F8 30 C3
+
+cmpl 48(%r12), %ebp
+. 1066 0x12345678 6
+. 41 3B 6C 24 30 C3
+
+cmpl $499, %eax
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+. 3D F3 01 00 00 C3
+
+cmpl $4, %eax
+. 1068 0x12345678 4
+. 83 F8 04 C3
+
+cmpl $4, %ebp
+. 1069 0x12345678 4
+. 83 FD 04 C3
+
+cmpl $4, %ebx
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+. 83 FB 04 C3
+
+cmpl $4, %edi
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+. 83 FF 04 C3
+
+cmpl $4, %edx
+. 1072 0x12345678 4
+. 83 FA 04 C3
+
+cmpl $4, %esi
+. 1073 0x12345678 4
+. 83 FE 04 C3
+
+cmpl $4, %r13d
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+. 41 83 FD 04 C3
+
+cmpl $4, %r14d
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+. 41 83 FE 04 C3
+
+cmpl $4, %r15d
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+. 41 83 FF 04 C3
+
+cmpl $4, %r8d
+. 1077 0x12345678 5
+. 41 83 F8 04 C3
+
+cmpl $4, (%rbp)
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+. 83 7D 00 04 C3
+
+cmpl 4(%rcx), %eax
+. 1079 0x12345678 4
+. 3B 41 04 C3
+
+cmpl $4, (%rdi)
+. 1080 0x12345678 4
+. 83 3F 04 C3
+
+cmpl 4(%rdx), %eax
+. 1081 0x12345678 4
+. 3B 42 04 C3
+
+cmpl 4(%rsp), %r13d
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+. 44 3B 6C 24 04 C3
+
+cmpl $500, %eax
+. 1083 0x12345678 6
+. 3D F4 01 00 00 C3
+
+cmpl $-509604128, (%rax)
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+. 81 38 E0 0E A0 E1 C3
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+cmpl $-509604384, 8(%rax)
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+. 81 78 08 E0 0D A0 E1 C3
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+cmpl $-509605408, 20(%rax)
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+. 81 78 14 E0 09 A0 E1 C3
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+cmpl $-509606176, 16(%rax)
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+. 81 78 10 E0 06 A0 E1 C3
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+cmpl $-509607200, 12(%rax)
+. 1088 0x12345678 8
+. 81 78 0C E0 02 A0 E1 C3
+
+cmpl $-509607456, 4(%rax)
+. 1089 0x12345678 8
+. 81 78 04 E0 01 A0 E1 C3
+
+cmpl $50, %eax
+. 1090 0x12345678 4
+. 83 F8 32 C3
+
+cmpl $528, %eax
+. 1091 0x12345678 6
+. 3D 10 02 00 00 C3
+
+cmpl $528, %edx
+. 1092 0x12345678 7
+. 81 FA 10 02 00 00 C3
+
+cmpl $5, 368(%rsp)
+. 1093 0x12345678 9
+. 83 BC 24 70 01 00 00 05 C3
+
+cmpl $54, %eax
+. 1094 0x12345678 4
+. 83 F8 36 C3
+
+cmpl $55, %eax
+. 1095 0x12345678 4
+. 83 F8 37 C3
+
+cmpl $5, %eax
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+. 83 F8 05 C3
+
+cmpl $5, %ebp
+. 1097 0x12345678 4
+. 83 FD 05 C3
+
+cmpl $5, %ebx
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+. 83 FB 05 C3
+
+cmpl $5, %edi
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+. 83 FF 05 C3
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+cmpl $5, %edx
+. 1100 0x12345678 4
+. 83 FA 05 C3
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+cmpl $5, (%r12)
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+. 41 83 3C 24 05 C3
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+cmpl $5, (%rbp)
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+. 83 7D 00 05 C3
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+cmpl $5, (%rdi)
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+. 83 3F 05 C3
+
+cmpl $60, %eax
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+. 83 F8 3C C3
+
+cmpl $60, %r12d
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+. 41 83 FC 3C C3
+
+cmpl 60(%rsp), %r14d
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+. 44 3B 74 24 3C C3
+
+cmpl $62, %eax
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+. 83 F8 3E C3
+
+cmpl $62, %edx
+. 1108 0x12345678 4
+. 83 FA 3E C3
+
+cmpl $63, %eax
+. 1109 0x12345678 4
+. 83 F8 3F C3
+
+cmpl $64, %ebx
+. 1110 0x12345678 4
+. 83 FB 40 C3
+
+cmpl $65535, %esi
+. 1111 0x12345678 7
+. 81 FE FF FF 00 00 C3
+
+cmpl $65536, %eax
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+. 3D 00 00 01 00 C3
+
+cmpl $65536, %edi
+. 1113 0x12345678 7
+. 81 FF 00 00 01 00 C3
+
+cmpl $65536, %edx
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+. 81 FA 00 00 01 00 C3
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+cmpl $65536, %r8d
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+. 41 81 F8 00 00 01 00 C3
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+cmpl 672(%rsp,%rax,4), %esi
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+. 3B B4 84 A0 02 00 00 C3
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+cmpl $6, 80(%rsp)
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+. 83 7C 24 50 06 C3
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+cmpl $69631, 16(%rsp)
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+. 81 7C 24 10 FF 0F 01 00 C3
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+cmpl $69631, 20(%rsp)
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+. 81 7C 24 14 FF 0F 01 00 C3
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+cmpl $69632, 16(%rbp)
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+. 81 7D 10 00 10 01 00 C3
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+cmpl $69632, 4(%rdi)
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+. 81 7F 04 00 10 01 00 C3
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+cmpl $69632, %eax
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+. 3D 00 10 01 00 C3
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+cmpl $69632, %ebp
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+. 81 FD 00 10 01 00 C3
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+cmpl $69632, (%rax,%rdx,4)
+. 1124 0x12345678 8
+. 81 3C 90 00 10 01 00 C3
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+cmpl $69633, %eax
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+. 3D 01 10 01 00 C3
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+cmpl $69633, %ebp
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+. 81 FD 01 10 01 00 C3
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+cmpl $69633, %ebx
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+. 81 FB 01 10 01 00 C3
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+cmpl $69633, %ecx
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+. 81 F9 01 10 01 00 C3
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+cmpl $69633, %edi
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+. 81 FF 01 10 01 00 C3
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+cmpl $69633, %edx
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+. 81 FA 01 10 01 00 C3
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+cmpl $69633, %r12d
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+. 41 81 FC 01 10 01 00 C3
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+cmpl $69633, %r15d
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+. 41 81 FF 01 10 01 00 C3
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+cmpl $69634, %eax
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+. 3D 02 10 01 00 C3
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+cmpl $69634, %ebp
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+. 81 FD 02 10 01 00 C3
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+cmpl $69634, %ebx
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+. 81 FB 02 10 01 00 C3
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+cmpl $69634, %ecx
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+. 81 F9 02 10 01 00 C3
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+cmpl $69634, %edi
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+. 81 FF 02 10 01 00 C3
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+cmpl $69634, %edx
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+. 81 FA 02 10 01 00 C3
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+cmpl $69634, %r12d
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+. 41 81 FC 02 10 01 00 C3
+
+cmpl $69634, %r15d
+. 1140 0x12345678 8
+. 41 81 FF 02 10 01 00 C3
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+cmpl $69635, %eax
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+. 3D 03 10 01 00 C3
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+cmpl $69635, %ebp
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+. 81 FD 03 10 01 00 C3
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+cmpl $69635, %ebx
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+. 81 FB 03 10 01 00 C3
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+cmpl $69635, %ecx
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+. 81 F9 03 10 01 00 C3
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+cmpl $69635, %edi
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+. 81 FF 03 10 01 00 C3
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+cmpl $69635, %edx
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+cmpl $69635, %r12d
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+. 41 81 FC 03 10 01 00 C3
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+cmpl $69635, %r15d
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+cmpl $69636, %eax
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+. 3D 04 10 01 00 C3
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+cmpl $69636, %ebp
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+. 81 FD 04 10 01 00 C3
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+cmpl $69636, %ebx
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+. 81 FB 04 10 01 00 C3
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+cmpl $69636, %ecx
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+. 81 F9 04 10 01 00 C3
+
+cmpl $69636, %edi
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+. 81 FF 04 10 01 00 C3
+
+cmpl $69636, %edx
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+. 81 FA 04 10 01 00 C3
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+cmpl $69637, %eax
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+. 3D 05 10 01 00 C3
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+cmpl $69638, %eax
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+. 3D 06 10 01 00 C3
+
+cmpl $69639, %eax
+. 1157 0x12345678 6
+. 3D 07 10 01 00 C3
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+cmpl $6, %eax
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+. 83 F8 06 C3
+
+cmpl $6, %ebp
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+. 83 FD 06 C3
+
+cmpl $6, %edi
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+. 83 FF 06 C3
+
+cmpl $6, %edx
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+. 83 FA 06 C3
+
+cmpl $6, (%r12)
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+. 41 83 3C 24 06 C3
+
+cmpl $6, (%r14)
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+. 41 83 3E 06 C3
+
+cmpl $6, (%rbp)
+. 1164 0x12345678 5
+. 83 7D 00 06 C3
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+cmpl $6, (%rdi)
+. 1165 0x12345678 4
+. 83 3F 06 C3
+
+cmpl $73728, (%rax)
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+. 81 38 00 20 01 00 C3
+
+cmpl $73728, (%rdi)
+. 1167 0x12345678 7
+. 81 3F 00 20 01 00 C3
+
+cmpl $73729, (%rax)
+. 1168 0x12345678 7
+. 81 38 01 20 01 00 C3
+
+cmpl $73729, (%rdx)
+. 1169 0x12345678 7
+. 81 3A 01 20 01 00 C3
+
+cmpl $73731, (%rdi)
+. 1170 0x12345678 7
+. 81 3F 03 20 01 00 C3
+
+cmpl $73732, %ecx
+. 1171 0x12345678 7
+. 81 F9 04 20 01 00 C3
+
+cmpl $73732, %edx
+. 1172 0x12345678 7
+. 81 FA 04 20 01 00 C3
+
+cmpl $73734, (%rax)
+. 1173 0x12345678 7
+. 81 38 06 20 01 00 C3
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+cmpl $77824, %r13d
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+. 41 81 FD 00 30 01 00 C3
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+cmpl $77825, %ebp
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+. 81 FD 01 30 01 00 C3
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+cmpl $77825, %edi
+. 1176 0x12345678 7
+. 81 FF 01 30 01 00 C3
+
+cmpl $77825, %esi
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+. 81 FE 01 30 01 00 C3
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+cmpl $77825, %r8d
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+. 41 81 F8 01 30 01 00 C3
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+cmpl $77827, %eax
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+. 3D 03 30 01 00 C3
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+cmpl $77827, %ecx
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+. 81 F9 03 30 01 00 C3
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+cmpl $77828, %ecx
+. 1181 0x12345678 7
+. 81 F9 04 30 01 00 C3
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+cmpl $77829, %ebp
+. 1182 0x12345678 7
+. 81 FD 05 30 01 00 C3
+
+cmpl $77829, %edi
+. 1183 0x12345678 7
+. 81 FF 05 30 01 00 C3
+
+cmpl $77829, %esi
+. 1184 0x12345678 7
+. 81 FE 05 30 01 00 C3
+
+cmpl $77829, %r8d
+. 1185 0x12345678 8
+. 41 81 F8 05 30 01 00 C3
+
+cmpl $77831, 8(%rdi)
+. 1186 0x12345678 8
+. 81 7F 08 07 30 01 00 C3
+
+cmpl $77831, %eax
+. 1187 0x12345678 6
+. 3D 07 30 01 00 C3
+
+cmpl $77833, %esi
+. 1188 0x12345678 7
+. 81 FE 09 30 01 00 C3
+
+cmpl $77837, %edi
+. 1189 0x12345678 7
+. 81 FF 0D 30 01 00 C3
+
+cmpl $77837, %esi
+. 1190 0x12345678 7
+. 81 FE 0D 30 01 00 C3
+
+cmpl $77837, %r13d
+. 1191 0x12345678 8
+. 41 81 FD 0D 30 01 00 C3
+
+cmpl $77839, %ecx
+. 1192 0x12345678 7
+. 81 F9 0F 30 01 00 C3
+
+cmpl $77840, %ecx
+. 1193 0x12345678 7
+. 81 F9 10 30 01 00 C3
+
+cmpl $77841, %edi
+. 1194 0x12345678 7
+. 81 FF 11 30 01 00 C3
+
+cmpl $77841, %esi
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+. 81 FE 11 30 01 00 C3
+
+cmpl $77841, %r13d
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+. 41 81 FD 11 30 01 00 C3
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+cmpl $77843, %ecx
+. 1197 0x12345678 7
+. 81 F9 13 30 01 00 C3
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+cmpl $77845, %ebp
+. 1198 0x12345678 7
+. 81 FD 15 30 01 00 C3
+
+cmpl $77845, %edi
+. 1199 0x12345678 7
+. 81 FF 15 30 01 00 C3
+
+cmpl $77845, %esi
+. 1200 0x12345678 7
+. 81 FE 15 30 01 00 C3
+
+cmpl $77845, %r13d
+. 1201 0x12345678 8
+. 41 81 FD 15 30 01 00 C3
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+cmpl $77849, %esi
+. 1202 0x12345678 7
+. 81 FE 19 30 01 00 C3
+
+cmpl $77851, %ecx
+. 1203 0x12345678 7
+. 81 F9 1B 30 01 00 C3
+
+cmpl $77851, %edi
+. 1204 0x12345678 7
+. 81 FF 1B 30 01 00 C3
+
+cmpl $77852, 20(%rsp)
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+. 81 7C 24 14 1C 30 01 00 C3
+
+cmpl $77852, %ebp
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+. 81 FD 1C 30 01 00 C3
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+cmpl $77852, %r12d
+. 1207 0x12345678 8
+. 41 81 FC 1C 30 01 00 C3
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+cmpl $77853, %esi
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+. 81 FE 1D 30 01 00 C3
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+cmpl $77855, %ecx
+. 1209 0x12345678 7
+. 81 F9 1F 30 01 00 C3
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+cmpl $77855, %edi
+. 1210 0x12345678 7
+. 81 FF 1F 30 01 00 C3
+
+cmpl $77856, 20(%rsp)
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+. 81 7C 24 14 20 30 01 00 C3
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+cmpl $77856, %ebp
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+. 81 FD 20 30 01 00 C3
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+cmpl $77856, %r12d
+. 1213 0x12345678 8
+. 41 81 FC 20 30 01 00 C3
+
+cmpl $77857, %esi
+. 1214 0x12345678 7
+. 81 FE 21 30 01 00 C3
+
+cmpl $77859, 20(%rsp)
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+. 81 7C 24 14 23 30 01 00 C3
+
+cmpl $77859, %edi
+. 1216 0x12345678 7
+. 81 FF 23 30 01 00 C3
+
+cmpl $77860, 20(%rsp)
+. 1217 0x12345678 9
+. 81 7C 24 14 24 30 01 00 C3
+
+cmpl $77861, %esi
+. 1218 0x12345678 7
+. 81 FE 25 30 01 00 C3
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+cmpl $77865, %esi
+. 1219 0x12345678 7
+. 81 FE 29 30 01 00 C3
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+cmpl $77869, %esi
+. 1220 0x12345678 7
+. 81 FE 2D 30 01 00 C3
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+cmpl $77978, %ebp
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+. 81 FD 9A 30 01 00 C3
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+cmpl $77978, %r12d
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+. 41 81 FC 9A 30 01 00 C3
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+cmpl $77979, %ebp
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+. 81 FD 9B 30 01 00 C3
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+cmpl $77979, %r12d
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+. 41 81 FC 9B 30 01 00 C3
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+cmpl $77981, %ebp
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+. 81 FD 9D 30 01 00 C3
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+cmpl $77981, %r12d
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+. 41 81 FC 9D 30 01 00 C3
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+cmpl $77982, %ebp
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+. 81 FD 9E 30 01 00 C3
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+cmpl $77982, %r12d
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+. 41 81 FC 9E 30 01 00 C3
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+cmpl $77983, %ebp
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+. 81 FD 9F 30 01 00 C3
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+cmpl $77983, %r12d
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+. 41 81 FC 9F 30 01 00 C3
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+cmpl $79, %eax
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+. 83 F8 4F C3
+
+cmpl $79, %ebx
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+. 83 FB 4F C3
+
+cmpl $7, %eax
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+. 83 F8 07 C3
+
+cmpl $7, %ebp
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+. 83 FD 07 C3
+
+cmpl $7, %ebx
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+. 83 FB 07 C3
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+cmpl $7, %ecx
+. 1236 0x12345678 4
+. 83 F9 07 C3
+
+cmpl $7, %edi
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+. 83 FF 07 C3
+
+cmpl $7, %edx
+. 1238 0x12345678 4
+. 83 FA 07 C3
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+cmpl $7, %esi
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+. 83 FE 07 C3
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+cmpl $7, %r12d
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+. 41 83 FC 07 C3
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+cmpl $7, (%rax)
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+. 83 38 07 C3
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+cmpl $7, (%rbp)
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+. 83 7D 00 07 C3
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+cmpl $7, (%rcx)
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+. 83 39 07 C3
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+cmpl $7, (%rdi)
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+. 83 3F 07 C3
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+cmpl $7, (%rdx)
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+. 83 3A 07 C3
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+cmpl $7, (%rsi)
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+. 83 3E 07 C3
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+cmpl $8, 104(%rsp)
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+. 83 7C 24 68 08 C3
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+cmpl $81920, 16(%r14)
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+. 41 81 7E 10 00 40 01 00 C3
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+cmpl $81920, 32(%rbx)
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+cmpl $826343424, %edi
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+. 81 FF 00 00 41 31 C3
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+cmpl $8, 40(%rsp)
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+cmpl $86016, 28(%r12)
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+. 41 81 7C 24 1C 00 50 01 00 C3
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+cmpl $86016, 28(%r13)
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+. 41 81 7D 1C 00 50 01 00 C3
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+cmpl $86016, 28(%r15)
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+. 41 81 7F 1C 00 50 01 00 C3
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+cmpl $86016, 28(%rbp)
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+. 81 7D 1C 00 50 01 00 C3
+
+cmpl $86016, 28(%rdi)
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+. 81 7F 1C 00 50 01 00 C3
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+cmpl $86016, 4(%rax)
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+. 81 78 04 00 50 01 00 C3
+
+cmpl $86016, %edi
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+. 81 FF 00 50 01 00 C3
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+cmpl $86017, %edi
+. 1259 0x12345678 7
+. 81 FF 01 50 01 00 C3
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+cmpl $86018, %edi
+. 1260 0x12345678 7
+. 81 FF 02 50 01 00 C3
+
+cmpl $86019, %edi
+. 1261 0x12345678 7
+. 81 FF 03 50 01 00 C3
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+cmpl $8, 8(%rax)
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+. 83 78 08 08 C3
+
+cmpl $8, 8(%rsi,%rax)
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+. 83 7C 06 08 08 C3
+
+cmpl $8, 8(%rsp)
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+. 83 7C 24 08 08 C3
+
+cmpl $8, %eax
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+. 83 F8 08 C3
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+cmpl $8, %ebx
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+. 83 FB 08 C3
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+cmpl $8, %edi
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+. 83 FF 08 C3
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+cmpl $8, %edx
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+. 83 FA 08 C3
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+cmpl $8, %esi
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+. 83 FE 08 C3
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+cmpl $8, %r13d
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+. 41 83 FD 08 C3
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+cmpl 8(%r13), %edi
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+. 41 3B 7D 08 C3
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+cmpl $8, %r14d
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+. 41 83 FE 08 C3
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+cmpl $8, %r8d
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+. 41 83 F8 08 C3
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+cmpl 8(%rsp), %r15d
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+. 44 3B 7C 24 08 C3
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+cmpl $922, %eax
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+. 3D 9A 03 00 00 C3
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+cmpl $922, %r12d
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+. 41 81 FC 9A 03 00 00 C3
+
+cmpl $94208, %esi
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+. 81 FE 00 70 01 00 C3
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+cmpl $94209, %esi
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+. 81 FE 01 70 01 00 C3
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+cmpl $94210, %esi
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+. 81 FE 02 70 01 00 C3
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+cmpl $94, %ebx
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+. 83 FB 5E C3
+
+cmpl $954, %eax
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+. 3D BA 03 00 00 C3
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+cmpl $954, %r12d
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+. 41 81 FC BA 03 00 00 C3
+
+cmpl $95, %ebx
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+. 83 FB 5F C3
+
+cmpl $95, %r12d
+. 1284 0x12345678 5
+. 41 83 FC 5F C3
+
+cmpl $96, %ebx
+. 1285 0x12345678 4
+. 83 FB 60 C3
+
+cmpl $989, %edx
+. 1286 0x12345678 7
+. 81 FA DD 03 00 00 C3
+
+cmpl $999, %eax
+. 1287 0x12345678 6
+. 3D E7 03 00 00 C3
+
+cmpl $9, %eax
+. 1288 0x12345678 4
+. 83 F8 09 C3
+
+cmpl $9, %r14d
+. 1289 0x12345678 5
+. 41 83 FE 09 C3
+
+cmpl $9, (%rax)
+. 1290 0x12345678 4
+. 83 38 09 C3
+
+cmpl %eax, 120(%rsp)
+. 1291 0x12345678 5
+. 39 44 24 78 C3
+
+cmpl %eax, 124(%rsp)
+. 1292 0x12345678 5
+. 39 44 24 7C C3
+
+cmpl %eax, 12(%rsi,%rdx)
+. 1293 0x12345678 5
+. 39 44 16 0C C3
+
+cmpl %eax, 140(%rsp)
+. 1294 0x12345678 8
+. 39 84 24 8C 00 00 00 C3
+
+cmpl %eax, 16(%rbp)
+. 1295 0x12345678 4
+. 39 45 10 C3
+
+cmpl %eax, 16(%rsp)
+. 1296 0x12345678 5
+. 39 44 24 10 C3
+
+cmpl %eax, 20(%rsp)
+. 1297 0x12345678 5
+. 39 44 24 14 C3
+
+cmpl %eax, 288(%rsp)
+. 1298 0x12345678 8
+. 39 84 24 20 01 00 00 C3
+
+cmpl %eax, 32(%rbp)
+. 1299 0x12345678 4
+. 39 45 20 C3
+
+cmpl %eax, 4(%r14)
+. 1300 0x12345678 5
+. 41 39 46 04 C3
+
+cmpl %eax, 4(%rdi)
+. 1301 0x12345678 4
+. 39 47 04 C3
+
+cmpl %eax, 8(%rbp)
+. 1302 0x12345678 4
+. 39 45 08 C3
+
+cmpl %eax, 8(%rbx)
+. 1303 0x12345678 4
+. 39 43 08 C3
+
+cmpl %eax, 8(%rdi)
+. 1304 0x12345678 4
+. 39 47 08 C3
+
+cmpl %eax, 8(%rdx)
+. 1305 0x12345678 4
+. 39 42 08 C3
+
+cmpl %eax, 8(%rsi)
+. 1306 0x12345678 4
+. 39 46 08 C3
+
+cmpl %eax, 8(%rsp)
+. 1307 0x12345678 5
+. 39 44 24 08 C3
+
+cmpl %eax, %ebp
+. 1308 0x12345678 3
+. 39 C5 C3
+
+cmpl %eax, %ebx
+. 1309 0x12345678 3
+. 39 C3 C3
+
+cmpl %eax, %ecx
+. 1310 0x12345678 3
+. 39 C1 C3
+
+cmpl %eax, %edx
+. 1311 0x12345678 3
+. 39 C2 C3
+
+cmpl %eax, %esi
+. 1312 0x12345678 3
+. 39 C6 C3
+
+cmpl %eax, %r12d
+. 1313 0x12345678 4
+. 41 39 C4 C3
+
+cmpl %eax, %r13d
+. 1314 0x12345678 4
+. 41 39 C5 C3
+
+cmpl %eax, (%r14)
+. 1315 0x12345678 4
+. 41 39 06 C3
+
+cmpl %eax, %r15d
+. 1316 0x12345678 4
+. 41 39 C7 C3
+
+cmpl %eax, %r8d
+. 1317 0x12345678 4
+. 41 39 C0 C3
+
+cmpl %eax, (%rbx,%rdx,4)
+. 1318 0x12345678 4
+. 39 04 93 C3
+
+cmpl %eax, (%rdi)
+. 1319 0x12345678 3
+. 39 07 C3
+
+cmpl %ebp, 12(%rdx,%rax)
+. 1320 0x12345678 5
+. 39 6C 02 0C C3
+
+cmpl %ebp, 4(%rsp)
+. 1321 0x12345678 5
+. 39 6C 24 04 C3
+
+cmpl %ebp, 8(%rax)
+. 1322 0x12345678 4
+. 39 68 08 C3
+
+cmpl %ebp, %eax
+. 1323 0x12345678 3
+. 39 E8 C3
+
+cmpl %ebp, %ebx
+. 1324 0x12345678 3
+. 39 EB C3
+
+cmpl %ebp, %edx
+. 1325 0x12345678 3
+. 39 EA C3
+
+cmpl %ebp, %r12d
+. 1326 0x12345678 4
+. 41 39 EC C3
+
+cmpl %ebp, %r13d
+. 1327 0x12345678 4
+. 41 39 ED C3
+
+cmpl %ebp, (%rcx,%rax,4)
+. 1328 0x12345678 4
+. 39 2C 81 C3
+
+cmpl %ebp, (%rdx,%rax,4)
+. 1329 0x12345678 4
+. 39 2C 82 C3
+
+cmpl %ebx, 16(%rsp)
+. 1330 0x12345678 5
+. 39 5C 24 10 C3
+
+cmpl %ebx, %eax
+. 1331 0x12345678 3
+. 39 D8 C3
+
+cmpl %ebx, %ebp
+. 1332 0x12345678 3
+. 39 DD C3
+
+cmpl %ebx, %r13d
+. 1333 0x12345678 4
+. 41 39 DD C3
+
+cmpl %ebx, %r15d
+. 1334 0x12345678 4
+. 41 39 DF C3
+
+cmpl %ecx, %ebx
+. 1335 0x12345678 3
+. 39 CB C3
+
+cmpl %ecx, %edi
+. 1336 0x12345678 3
+. 39 CF C3
+
+cmpl %ecx, %edx
+. 1337 0x12345678 3
+. 39 CA C3
+
+cmpl %ecx, %esi
+. 1338 0x12345678 3
+. 39 CE C3
+
+cmpl %ecx, %r13d
+. 1339 0x12345678 4
+. 41 39 CD C3
+
+cmpl %ecx, %r14d
+. 1340 0x12345678 4
+. 41 39 CE C3
+
+cmpl %ecx, %r15d
+. 1341 0x12345678 4
+. 41 39 CF C3
+
+cmpl %ecx, %r8d
+. 1342 0x12345678 4
+. 41 39 C8 C3
+
+cmpl %ecx, (%rbx)
+. 1343 0x12345678 3
+. 39 0B C3
+
+cmpl %edi, %eax
+. 1344 0x12345678 3
+. 39 F8 C3
+
+cmpl %edi, %ecx
+. 1345 0x12345678 3
+. 39 F9 C3
+
+cmpl %edi, %edx
+. 1346 0x12345678 3
+. 39 FA C3
+
+cmpl %edi, %esi
+. 1347 0x12345678 3
+. 39 FE C3
+
+cmpl %edx, 12(%rsp)
+. 1348 0x12345678 5
+. 39 54 24 0C C3
+
+cmpl %edx, 16(%rsp)
+. 1349 0x12345678 5
+. 39 54 24 10 C3
+
+cmpl %edx, 288(%rsp,%rax,4)
+. 1350 0x12345678 8
+. 39 94 84 20 01 00 00 C3
+
+cmpl %edx, 292(%rsp,%rax,4)
+. 1351 0x12345678 8
+. 39 94 84 24 01 00 00 C3
+
+cmpl %edx, 68(%rsp)
+. 1352 0x12345678 5
+. 39 54 24 44 C3
+
+cmpl %edx, %eax
+. 1353 0x12345678 3
+. 39 D0 C3
+
+cmpl %edx, %ebp
+. 1354 0x12345678 3
+. 39 D5 C3
+
+cmpl %edx, %ebx
+. 1355 0x12345678 3
+. 39 D3 C3
+
+cmpl %edx, %ecx
+. 1356 0x12345678 3
+. 39 D1 C3
+
+cmpl %edx, %edi
+. 1357 0x12345678 3
+. 39 D7 C3
+
+cmpl %edx, %esi
+. 1358 0x12345678 3
+. 39 D6 C3
+
+cmpl %edx, %r12d
+. 1359 0x12345678 4
+. 41 39 D4 C3
+
+cmpl %edx, %r13d
+. 1360 0x12345678 4
+. 41 39 D5 C3
+
+cmpl %edx, %r14d
+. 1361 0x12345678 4
+. 41 39 D6 C3
+
+cmpl %edx, %r15d
+. 1362 0x12345678 4
+. 41 39 D7 C3
+
+cmpl %edx, (%rbx)
+. 1363 0x12345678 3
+. 39 13 C3
+
+cmpl %edx, (%rdi,%rax,4)
+. 1364 0x12345678 4
+. 39 14 87 C3
+
+cmpl %edx, (%rsi,%rax,4)
+. 1365 0x12345678 4
+. 39 14 86 C3
+
+cmpl %esi, 12(%rbx,%rax)
+. 1366 0x12345678 5
+. 39 74 03 0C C3
+
+cmpl %esi, %eax
+. 1367 0x12345678 3
+. 39 F0 C3
+
+cmpl %esi, %ecx
+. 1368 0x12345678 3
+. 39 F1 C3
+
+cmpl %esi, %edx
+. 1369 0x12345678 3
+. 39 F2 C3
+
+cmpl %esi, (%rcx,%rdx,8)
+. 1370 0x12345678 4
+. 39 34 D1 C3
+
+cmpl %esi, (%rdi,%rax,4)
+. 1371 0x12345678 4
+. 39 34 87 C3
+
+cmpl %r10d, %ecx
+. 1372 0x12345678 4
+. 44 39 D1 C3
+
+cmpl %r10d, %r12d
+. 1373 0x12345678 4
+. 45 39 D4 C3
+
+cmpl %r10d, %r8d
+. 1374 0x12345678 4
+. 45 39 D0 C3
+
+cmpl %r11d, %r12d
+. 1375 0x12345678 4
+. 45 39 DC C3
+
+cmpl %r11d, %r9d
+. 1376 0x12345678 4
+. 45 39 D9 C3
+
+cmpl %r12d, %eax
+. 1377 0x12345678 4
+. 44 39 E0 C3
+
+cmpl %r12d, %ebx
+. 1378 0x12345678 4
+. 44 39 E3 C3
+
+cmpl %r13d, 192(%rsp,%rax,4)
+. 1379 0x12345678 9
+. 44 39 AC 84 C0 00 00 00 C3
+
+cmpl %r13d, %ebp
+. 1380 0x12345678 4
+. 44 39 ED C3
+
+cmpl %r14d, 20(%rsp)
+. 1381 0x12345678 6
+. 44 39 74 24 14 C3
+
+cmpl %r14d, %ebp
+. 1382 0x12345678 4
+. 44 39 F5 C3
+
+cmpl %r15d, %ebp
+. 1383 0x12345678 4
+. 44 39 FD C3
+
+cmpl %r15d, %ebx
+. 1384 0x12345678 4
+. 44 39 FB C3
+
+cmpl %r15d, %ecx
+. 1385 0x12345678 4
+. 44 39 F9 C3
+
+cmpl %r15d, %r12d
+. 1386 0x12345678 4
+. 45 39 FC C3
+
+cmpl %r15d, %r14d
+. 1387 0x12345678 4
+. 45 39 FE C3
+
+cmpl %r15d, %r8d
+. 1388 0x12345678 4
+. 45 39 F8 C3
+
+cmpl %r8d, %ecx
+. 1389 0x12345678 4
+. 44 39 C1 C3
+
+cmpl %r8d, %edx
+. 1390 0x12345678 4
+. 44 39 C2 C3
+
+cmpl %r8d, %esi
+. 1391 0x12345678 4
+. 44 39 C6 C3
+
+cmpl %r9d, %esi
+. 1392 0x12345678 4
+. 44 39 CE C3
+
+cmpl (%rax), %edx
+. 1393 0x12345678 3
+. 3B 10 C3
+
+cmpl (%rdx), %eax
+. 1394 0x12345678 3
+. 3B 02 C3
+
+cmpl (%rsi), %eax
+. 1395 0x12345678 3
+. 3B 06 C3
+
+cmpl (%rsi), %edx
+. 1396 0x12345678 3
+. 3B 16 C3
+
+cmpl 16(%rip), %eax
+. 1397 0x12345678 7
+. 3B 05 10 00 00 00 C3
+
+cmpl 16(%rip), %r13d
+. 1398 0x12345678 8
+. 44 3B 2D 10 00 00 00 C3
+
+cmpl 16(%rip), %r15d
+. 1399 0x12345678 8
+. 44 3B 3D 10 00 00 00 C3
+
+cmpl 20(%rip), %ecx
+. 1400 0x12345678 7
+. 3B 0D 14 00 00 00 C3
+
+cmpq $0, 16(%rdi)
+. 1401 0x12345678 6
+. 48 83 7F 10 00 C3
+
+cmpq $0, 16(%rsp)
+. 1402 0x12345678 7
+. 48 83 7C 24 10 00 C3
+
+cmpq $0, 192(%rsp)
+. 1403 0x12345678 10
+. 48 83 BC 24 C0 00 00 00 00 C3
+
+cmpq $0, 200(%rsp)
+. 1404 0x12345678 10
+. 48 83 BC 24 C8 00 00 00 00 C3
+
+cmpq $0, 24(%rax)
+. 1405 0x12345678 6
+. 48 83 78 18 00 C3
+
+cmpq $0, 24(%rbx)
+. 1406 0x12345678 6
+. 48 83 7B 18 00 C3
+
+cmpq $0, 24(%rsp)
+. 1407 0x12345678 7
+. 48 83 7C 24 18 00 C3
+
+cmpq $0, 264(%rsp)
+. 1408 0x12345678 10
+. 48 83 BC 24 08 01 00 00 00 C3
+
+cmpq $0, 272(%rsp)
+. 1409 0x12345678 10
+. 48 83 BC 24 10 01 00 00 00 C3
+
+cmpq $0, 32(%r13)
+. 1410 0x12345678 6
+. 49 83 7D 20 00 C3
+
+cmpq $0, 32(%rbp)
+. 1411 0x12345678 6
+. 48 83 7D 20 00 C3
+
+cmpq $0, 560(%rsp)
+. 1412 0x12345678 10
+. 48 83 BC 24 30 02 00 00 00 C3
+
+cmpq $0, 8(%rax)
+. 1413 0x12345678 6
+. 48 83 78 08 00 C3
+
+cmpq $0, 8(%rbx)
+. 1414 0x12345678 6
+. 48 83 7B 08 00 C3
+
+cmpq $0, 8(%rdi)
+. 1415 0x12345678 6
+. 48 83 7F 08 00 C3
+
+cmpq $0, 8(%rdx,%rbx,8)
+. 1416 0x12345678 7
+. 48 83 7C DA 08 00 C3
+
+cmpq $0, (%r12,%rax,8)
+. 1417 0x12345678 6
+. 49 83 3C C4 00 C3
+
+cmpq $0, (%r13,%rax,8)
+. 1418 0x12345678 7
+. 49 83 7C C5 00 00 C3
+
+cmpq $0, (%r9,%rax,8)
+. 1419 0x12345678 6
+. 49 83 3C C1 00 C3
+
+cmpq $0, (%rax)
+. 1420 0x12345678 5
+. 48 83 38 00 C3
+
+cmpq $0, (%rax,%rbx,8)
+. 1421 0x12345678 6
+. 48 83 3C D8 00 C3
+
+cmpq $0, (%rax,%rcx,8)
+. 1422 0x12345678 6
+. 48 83 3C C8 00 C3
+
+cmpq $0, (%rax,%rdx,8)
+. 1423 0x12345678 6
+. 48 83 3C D0 00 C3
+
+cmpq $0, (%rbp,%rax,8)
+. 1424 0x12345678 7
+. 48 83 7C C5 00 00 C3
+
+cmpq $0, (%rbx)
+. 1425 0x12345678 5
+. 48 83 3B 00 C3
+
+cmpq $0, (%rbx,%rax,8)
+. 1426 0x12345678 6
+. 48 83 3C C3 00 C3
+
+cmpq $0, (%rbx,%rcx,8)
+. 1427 0x12345678 6
+. 48 83 3C CB 00 C3
+
+cmpq $0, (%rcx)
+. 1428 0x12345678 5
+. 48 83 39 00 C3
+
+cmpq $0, (%rcx,%rax,8)
+. 1429 0x12345678 6
+. 48 83 3C C1 00 C3
+
+cmpq $0, (%rdi)
+. 1430 0x12345678 5
+. 48 83 3F 00 C3
+
+cmpq $0, (%rdi,%rax,8)
+. 1431 0x12345678 6
+. 48 83 3C C7 00 C3
+
+cmpq $0, (%rdx)
+. 1432 0x12345678 5
+. 48 83 3A 00 C3
+
+cmpq $0, (%rdx,%rax,8)
+. 1433 0x12345678 6
+. 48 83 3C C2 00 C3
+
+cmpq $0, (%rdx,%rbx,8)
+. 1434 0x12345678 6
+. 48 83 3C DA 00 C3
+
+cmpq $0, (%rsi)
+. 1435 0x12345678 5
+. 48 83 3E 00 C3
+
+cmpq $0, (%rsi,%rax,8)
+. 1436 0x12345678 6
+. 48 83 3C C6 00 C3
+
+cmpq $0, (%rsp)
+. 1437 0x12345678 6
+. 48 83 3C 24 00 C3
+
+cmpq $255, %rdi
+. 1438 0x12345678 8
+. 48 81 FF FF 00 00 00 C3
+
+cmpq $65535, %rsi
+. 1439 0x12345678 8
+. 48 81 FE FF FF 00 00 C3
+
+cmpq %r13, %r8
+. 1440 0x12345678 4
+. 4D 39 E8 C3
+
+cmpq %r14, (%r12)
+. 1441 0x12345678 5
+. 4D 39 34 24 C3
+
+cmpq %rax, 8(%rbp)
+. 1442 0x12345678 5
+. 48 39 45 08 C3
+
+cmpq %rax, 8(%rdi)
+. 1443 0x12345678 5
+. 48 39 47 08 C3
+
+cmpq %rax, %rsi
+. 1444 0x12345678 4
+. 48 39 C6 C3
+
+cmpq %rbp, (%rax,%rcx,8)
+. 1445 0x12345678 5
+. 48 39 2C C8 C3
+
+cmpq %rcx, 8(%rdx)
+. 1446 0x12345678 5
+. 48 39 4A 08 C3
+
+cmpq %rdx, (%rax,%rcx,8)
+. 1447 0x12345678 5
+. 48 39 14 C8 C3
+
+cmpw $1, 142(%rsp)
+. 1448 0x12345678 10
+. 66 83 BC 24 8E 00 00 00 01 C3
+
+cmpw $128, %ax
+. 1449 0x12345678 5
+. 66 3D 80 00 C3
+
+cmpw $128, %bx
+. 1450 0x12345678 6
+. 66 81 FB 80 00 C3
+
+cmpw $128, %cx
+. 1451 0x12345678 6
+. 66 81 F9 80 00 C3
+
+cmpw $128, %di
+. 1452 0x12345678 6
+. 66 81 FF 80 00 C3
+
+cmpw $128, %dx
+. 1453 0x12345678 6
+. 66 81 FA 80 00 C3
+
+cmpw $128, %r11w
+. 1454 0x12345678 7
+. 66 41 81 FB 80 00 C3
+
+cmpw $128, %r8w
+. 1455 0x12345678 7
+. 66 41 81 F8 80 00 C3
+
+cmpw $128, %r9w
+. 1456 0x12345678 7
+. 66 41 81 F9 80 00 C3
+
+cmpw $-129, %ax
+. 1457 0x12345678 5
+. 66 3D 7F FF C3
+
+cmpw $-129, %bx
+. 1458 0x12345678 6
+. 66 81 FB 7F FF C3
+
+cmpw $-129, %di
+. 1459 0x12345678 6
+. 66 81 FF 7F FF C3
+
+cmpw $-129, %dx
+. 1460 0x12345678 6
+. 66 81 FA 7F FF C3
+
+cmpw $-129, %r11w
+. 1461 0x12345678 7
+. 66 41 81 FB 7F FF C3
+
+cmpw $-129, %r8w
+. 1462 0x12345678 7
+. 66 41 81 F8 7F FF C3
+
+cmpw $-129, %r9w
+. 1463 0x12345678 7
+. 66 41 81 F9 7F FF C3
+
+cmpw $-129, %si
+. 1464 0x12345678 6
+. 66 81 FE 7F FF C3
+
+cmpw $1, %ax
+. 1465 0x12345678 5
+. 66 83 F8 01 C3
+
+cmpw $1, %cx
+. 1466 0x12345678 5
+. 66 83 F9 01 C3
+
+cmpw $1, %di
+. 1467 0x12345678 5
+. 66 83 FF 01 C3
+
+cmpw $1, %dx
+. 1468 0x12345678 5
+. 66 83 FA 01 C3
+
+cmpw $2, 30(%rbx)
+. 1469 0x12345678 6
+. 66 83 7B 1E 02 C3
+
+cmpw $256, %ax
+. 1470 0x12345678 5
+. 66 3D 00 01 C3
+
+cmpw $256, %bx
+. 1471 0x12345678 6
+. 66 81 FB 00 01 C3
+
+cmpw $256, %cx
+. 1472 0x12345678 6
+. 66 81 F9 00 01 C3
+
+cmpw $256, %di
+. 1473 0x12345678 6
+. 66 81 FF 00 01 C3
+
+cmpw $256, %dx
+. 1474 0x12345678 6
+. 66 81 FA 00 01 C3
+
+cmpw $256, %r11w
+. 1475 0x12345678 7
+. 66 41 81 FB 00 01 C3
+
+cmpw $256, %r8w
+. 1476 0x12345678 7
+. 66 41 81 F8 00 01 C3
+
+cmpw $256, %r9w
+. 1477 0x12345678 7
+. 66 41 81 F9 00 01 C3
+
+cmpw $2, %ax
+. 1478 0x12345678 5
+. 66 83 F8 02 C3
+
+cmpw $-2, %dx
+. 1479 0x12345678 5
+. 66 83 FA FE C3
+
+cmpw $-2, (%rdx,%rax)
+. 1480 0x12345678 6
+. 66 83 3C 02 FE C3
+
+cmpw $-2, (%rsi,%rax)
+. 1481 0x12345678 6
+. 66 83 3C 06 FE C3
+
+cmpw $3, %ax
+. 1482 0x12345678 5
+. 66 83 F8 03 C3
+
+cmpw $9999, 24(%r12,%rax,2)
+. 1483 0x12345678 9
+. 66 41 81 7C 44 18 0F 27 C3
+
+cmpw %ax, 8(%rdi)
+. 1484 0x12345678 5
+. 66 39 47 08 C3
+
+cmpw %ax, %r9w
+. 1485 0x12345678 5
+. 66 41 39 C1 C3
+
+cmpw %di, %si
+. 1486 0x12345678 4
+. 66 39 FE C3
+
+cmpw %dx, %cx
+. 1487 0x12345678 4
+. 66 39 D1 C3
+
+cmpw %dx, %r9w
+. 1488 0x12345678 5
+. 66 41 39 D1 C3
+
+cmpw %r10w, %dx
+. 1489 0x12345678 5
+. 66 44 39 D2 C3
+
+cmpw %r8w, %ax
+. 1490 0x12345678 5
+. 66 44 39 C0 C3
+
+cmpw %r8w, %dx
+. 1491 0x12345678 5
+. 66 44 39 C2 C3
+
+cwtl
+. 1492 0x12345678 2
+. 98 C3
+
+decb %al
+. 1493 0x12345678 3
+. FE C8 C3
+
+decb %dl
+. 1494 0x12345678 3
+. FE CA C3
+
+decb %r14b
+. 1495 0x12345678 4
+. 41 FE CE C3
+
+decb %sil
+. 1496 0x12345678 4
+. 40 FE CE C3
+
+decl %eax
+. 1497 0x12345678 3
+. FF C8 C3
+
+decl %ebp
+. 1498 0x12345678 3
+. FF CD C3
+
+decl %ebx
+. 1499 0x12345678 3
+. FF CB C3
+
+decl %ecx
+. 1500 0x12345678 3
+. FF C9 C3
+
+decl %edi
+. 1501 0x12345678 3
+. FF CF C3
+
+decl %edx
+. 1502 0x12345678 3
+. FF CA C3
+
+decl %esi
+. 1503 0x12345678 3
+. FF CE C3
+
+decl %r13d
+. 1504 0x12345678 4
+. 41 FF CD C3
+
+decl %r14d
+. 1505 0x12345678 4
+. 41 FF CE C3
+
+decl %r15d
+. 1506 0x12345678 4
+. 41 FF CF C3
+
+divq %r8
+. 1507 0x12345678 4
+. 49 F7 F0 C3
+
+idivl %edi
+. 1508 0x12345678 3
+. F7 FF C3
+
+imull 8(%r13), %eax
+. 1509 0x12345678 6
+. 41 0F AF 45 08 C3
+
+imull 8(%r14), %eax
+. 1510 0x12345678 6
+. 41 0F AF 46 08 C3
+
+imull 8(%rbx), %eax
+. 1511 0x12345678 5
+. 0F AF 43 08 C3
+
+imull 8(%rdx), %edi
+. 1512 0x12345678 5
+. 0F AF 7A 08 C3
+
+imull %eax, %ebp
+. 1513 0x12345678 4
+. 0F AF E8 C3
+
+imull %ecx, %edx
+. 1514 0x12345678 4
+. 0F AF D1 C3
+
+imull %ecx, %r8d
+. 1515 0x12345678 5
+. 44 0F AF C1 C3
+
+imull %edx, %eax
+. 1516 0x12345678 4
+. 0F AF C2 C3
+
+imull %esi, %edi
+. 1517 0x12345678 4
+. 0F AF FE C3
+
+imulq $1431655766, %rax, %rbx
+. 1518 0x12345678 8
+. 48 69 D8 56 55 55 55 C3
+
+incl 108(%rsp)
+. 1519 0x12345678 5
+. FF 44 24 6C C3
+
+incl 120(%rsp)
+. 1520 0x12345678 5
+. FF 44 24 78 C3
+
+incl 124(%rsp)
+. 1521 0x12345678 5
+. FF 44 24 7C C3
+
+incl 12(%rsp)
+. 1522 0x12345678 5
+. FF 44 24 0C C3
+
+incl 140(%rsp)
+. 1523 0x12345678 8
+. FF 84 24 8C 00 00 00 C3
+
+incl 16(%rsp)
+. 1524 0x12345678 5
+. FF 44 24 10 C3
+
+incl 20(%rsp)
+. 1525 0x12345678 5
+. FF 44 24 14 C3
+
+incl 24(%rsp)
+. 1526 0x12345678 5
+. FF 44 24 18 C3
+
+incl 288(%rsp)
+. 1527 0x12345678 8
+. FF 84 24 20 01 00 00 C3
+
+incl 28(%rsp)
+. 1528 0x12345678 5
+. FF 44 24 1C C3
+
+incl 40(%rsp)
+. 1529 0x12345678 5
+. FF 44 24 28 C3
+
+incl 56(%rsp)
+. 1530 0x12345678 5
+. FF 44 24 38 C3
+
+incl 68(%rsp)
+. 1531 0x12345678 5
+. FF 44 24 44 C3
+
+incl %eax
+. 1532 0x12345678 3
+. FF C0 C3
+
+incl %ebp
+. 1533 0x12345678 3
+. FF C5 C3
+
+incl %ebx
+. 1534 0x12345678 3
+. FF C3 C3
+
+incl %ecx
+. 1535 0x12345678 3
+. FF C1 C3
+
+incl %edi
+. 1536 0x12345678 3
+. FF C7 C3
+
+incl %edx
+. 1537 0x12345678 3
+. FF C2 C3
+
+incl %esi
+. 1538 0x12345678 3
+. FF C6 C3
+
+incl 1(%rip)
+. 1539 0x12345678 7
+. FF 05 01 00 00 00 C3
+
+incl 8(%rip)
+. 1540 0x12345678 7
+. FF 05 08 00 00 00 C3
+
+incl 9(%rip)
+. 1541 0x12345678 7
+. FF 05 09 00 00 00 C3
+
+incl 0(%rip)
+. 1542 0x12345678 7
+. FF 05 00 00 00 00 C3
+
+incl %r10d
+. 1543 0x12345678 4
+. 41 FF C2 C3
+
+incl %r12d
+. 1544 0x12345678 4
+. 41 FF C4 C3
+
+incl %r13d
+. 1545 0x12345678 4
+. 41 FF C5 C3
+
+incl %r14d
+. 1546 0x12345678 4
+. 41 FF C6 C3
+
+incl (%r14,%rax,4)
+. 1547 0x12345678 5
+. 41 FF 04 86 C3
+
+incl %r15d
+. 1548 0x12345678 4
+. 41 FF C7 C3
+
+incl %r8d
+. 1549 0x12345678 4
+. 41 FF C0 C3
+
+incl %r9d
+. 1550 0x12345678 4
+. 41 FF C1 C3
+
+incl (%rax)
+. 1551 0x12345678 3
+. FF 00 C3
+
+incl -99(%rip)
+. 1552 0x12345678 7
+. FF 05 9D FF FF FF C3
+
+incq %r13
+. 1553 0x12345678 4
+. 49 FF C5 C3
+
+incq %rax
+. 1554 0x12345678 4
+. 48 FF C0 C3
+
+incq %rbp
+. 1555 0x12345678 4
+. 48 FF C5 C3
+
+incq %rbx
+. 1556 0x12345678 4
+. 48 FF C3 C3
+
+incq %rdi
+. 1557 0x12345678 4
+. 48 FF C7 C3
+
+incq %rsi
+. 1558 0x12345678 4
+. 48 FF C6 C3
+
+incq 33(%rip)
+. 1559 0x12345678 8
+. 48 FF 05 21 00 00 00 C3
+
+jmp *3998(,%rax,8)
+. 1560 0x12345678 7
+. FF 24 C5 9E 0F 00 00
+
+jmp *%rdx
+. 1561 0x12345678 2
+. FF E2
+
+leal 0(,%r14,8), %r12d
+. 1562 0x12345678 9
+. 46 8D 24 F5 00 00 00 00 C3
+
+leal 0(,%rdx,8), %eax
+. 1563 0x12345678 8
+. 8D 04 D5 00 00 00 00 C3
+
+leal 0(,%rdx,8), %edi
+. 1564 0x12345678 8
+. 8D 3C D5 00 00 00 00 C3
+
+leal 0(,%rsi,4), %edx
+. 1565 0x12345678 8
+. 8D 14 B5 00 00 00 00 C3
+
+leal 0(,%rsi,8), %edx
+. 1566 0x12345678 8
+. 8D 14 F5 00 00 00 00 C3
+
+leal -112(%rax), %ebx
+. 1567 0x12345678 4
+. 8D 58 90 C3
+
+leal -112(%rbx), %eax
+. 1568 0x12345678 4
+. 8D 43 90 C3
+
+leal -128(%rax), %ebx
+. 1569 0x12345678 4
+. 8D 58 80 C3
+
+leal -128(%rax), %edi
+. 1570 0x12345678 4
+. 8D 78 80 C3
+
+leal -129(%rax), %r12d
+. 1571 0x12345678 8
+. 44 8D A0 7F FF FF FF C3
+
+leal -144(%rax), %r12d
+. 1572 0x12345678 8
+. 44 8D A0 70 FF FF FF C3
+
+leal -144(%rax), %r14d
+. 1573 0x12345678 8
+. 44 8D B0 70 FF FF FF C3
+
+leal -176(%rdx), %ebx
+. 1574 0x12345678 7
+. 8D 9A 50 FF FF FF C3
+
+leal -184(%rax), %ebx
+. 1575 0x12345678 7
+. 8D 98 48 FF FF FF C3
+
+leal -184(%rdx), %ebx
+. 1576 0x12345678 7
+. 8D 9A 48 FF FF FF C3
+
+leal -192(%rax), %ebp
+. 1577 0x12345678 7
+. 8D A8 40 FF FF FF C3
+
+leal -1(%r12), %eax
+. 1578 0x12345678 6
+. 41 8D 44 24 FF C3
+
+leal 1(%r12), %eax
+. 1579 0x12345678 6
+. 41 8D 44 24 01 C3
+
+leal 1(%r12), %ebx
+. 1580 0x12345678 6
+. 41 8D 5C 24 01 C3
+
+leal 1(%r12), %edi
+. 1581 0x12345678 6
+. 41 8D 7C 24 01 C3
+
+leal -1(%r13), %eax
+. 1582 0x12345678 5
+. 41 8D 45 FF C3
+
+leal 1(%r13), %eax
+. 1583 0x12345678 5
+. 41 8D 45 01 C3
+
+leal -1(%r14), %eax
+. 1584 0x12345678 5
+. 41 8D 46 FF C3
+
+leal 1(%r14), %eax
+. 1585 0x12345678 5
+. 41 8D 46 01 C3
+
+leal -1(%r14), %edi
+. 1586 0x12345678 5
+. 41 8D 7E FF C3
+
+leal 1(%r15), %eax
+. 1587 0x12345678 5
+. 41 8D 47 01 C3
+
+leal 1(%r8), %ecx
+. 1588 0x12345678 5
+. 41 8D 48 01 C3
+
+leal -1(,%rax,8), %edi
+. 1589 0x12345678 8
+. 8D 3C C5 FF FF FF FF C3
+
+leal 1(%rax), %r12d
+. 1590 0x12345678 5
+. 44 8D 60 01 C3
+
+leal -1(%rax,%r12), %ebp
+. 1591 0x12345678 6
+. 42 8D 6C 20 FF C3
+
+leal -1(%rax,%r12), %edx
+. 1592 0x12345678 6
+. 42 8D 54 20 FF C3
+
+leal -1(%rax,%rbp), %eax
+. 1593 0x12345678 5
+. 8D 44 28 FF C3
+
+leal -1(%rax,%rbp), %ebx
+. 1594 0x12345678 5
+. 8D 5C 28 FF C3
+
+leal -1(%rax,%rbx), %eax
+. 1595 0x12345678 5
+. 8D 44 18 FF C3
+
+leal 1(%rax,%rbx), %r15d
+. 1596 0x12345678 6
+. 44 8D 7C 18 01 C3
+
+leal -1(%rbp), %eax
+. 1597 0x12345678 4
+. 8D 45 FF C3
+
+leal 1(%rbp), %eax
+. 1598 0x12345678 4
+. 8D 45 01 C3
+
+leal -1(%rbp), %edi
+. 1599 0x12345678 4
+. 8D 7D FF C3
+
+leal 1(%rbp), %edi
+. 1600 0x12345678 4
+. 8D 7D 01 C3
+
+leal -1(%rbp), %esi
+. 1601 0x12345678 4
+. 8D 75 FF C3
+
+leal 1(%rbp), %r12d
+. 1602 0x12345678 5
+. 44 8D 65 01 C3
+
+leal 1(%rbp), %r13d
+. 1603 0x12345678 5
+. 44 8D 6D 01 C3
+
+leal -1(%rbp,%rbx), %r12d
+. 1604 0x12345678 6
+. 44 8D 64 1D FF C3
+
+leal -1(%rbx), %eax
+. 1605 0x12345678 4
+. 8D 43 FF C3
+
+leal 1(%rbx), %edi
+. 1606 0x12345678 4
+. 8D 7B 01 C3
+
+leal 1(%rbx), %edx
+. 1607 0x12345678 4
+. 8D 53 01 C3
+
+leal -1(%rcx), %eax
+. 1608 0x12345678 4
+. 8D 41 FF C3
+
+leal 1(%rcx), %eax
+. 1609 0x12345678 4
+. 8D 41 01 C3
+
+leal 1(%rcx), %edi
+. 1610 0x12345678 4
+. 8D 79 01 C3
+
+leal 1(%rcx,%r8), %r8d
+. 1611 0x12345678 6
+. 46 8D 44 01 01 C3
+
+leal 1(%rcx,%rdx), %edx
+. 1612 0x12345678 5
+. 8D 54 11 01 C3
+
+leal 1(%rdi), %eax
+. 1613 0x12345678 4
+. 8D 47 01 C3
+
+leal -1(%rdi), %ebp
+. 1614 0x12345678 4
+. 8D 6F FF C3
+
+leal 1(%rdi), %edx
+. 1615 0x12345678 4
+. 8D 57 01 C3
+
+leal -1(%rdx), %eax
+. 1616 0x12345678 4
+. 8D 42 FF C3
+
+leal 1(%rdx), %eax
+. 1617 0x12345678 4
+. 8D 42 01 C3
+
+leal 1(%rdx), %edi
+. 1618 0x12345678 4
+. 8D 7A 01 C3
+
+leal 1(%rdx,%r8), %r8d
+. 1619 0x12345678 6
+. 46 8D 44 02 01 C3
+
+leal 1(%rdx,%rax), %eax
+. 1620 0x12345678 5
+. 8D 44 02 01 C3
+
+leal 1(%rdx,%rbp), %r10d
+. 1621 0x12345678 6
+. 44 8D 54 2A 01 C3
+
+leal 1(%rdx,%rbx), %ebx
+. 1622 0x12345678 5
+. 8D 5C 1A 01 C3
+
+leal 1(%rdx,%rcx), %ecx
+. 1623 0x12345678 5
+. 8D 4C 0A 01 C3
+
+leal 1(%rdx,%rdi), %edi
+. 1624 0x12345678 5
+. 8D 7C 3A 01 C3
+
+leal 1(%rdx,%rsi), %esi
+. 1625 0x12345678 5
+. 8D 74 32 01 C3
+
+leal -1(%rsi), %eax
+. 1626 0x12345678 4
+. 8D 46 FF C3
+
+leal 1(%rsi), %eax
+. 1627 0x12345678 4
+. 8D 46 01 C3
+
+leal 1(%rsi,%rdi), %edi
+. 1628 0x12345678 5
+. 8D 7C 3E 01 C3
+
+leal -200(%rax), %ebp
+. 1629 0x12345678 7
+. 8D A8 38 FF FF FF C3
+
+leal -200(%rax), %r14d
+. 1630 0x12345678 8
+. 44 8D B0 38 FF FF FF C3
+
+leal -208(%rax), %ebp
+. 1631 0x12345678 7
+. 8D A8 30 FF FF FF C3
+
+leal -208(%rax), %ebx
+. 1632 0x12345678 7
+. 8D 98 30 FF FF FF C3
+
+leal -20(%rdx), %eax
+. 1633 0x12345678 4
+. 8D 42 EC C3
+
+leal -216(%rax), %ebx
+. 1634 0x12345678 7
+. 8D 98 28 FF FF FF C3
+
+leal -224(%rax), %ebx
+. 1635 0x12345678 7
+. 8D 98 20 FF FF FF C3
+
+leal -232(%rax), %ebx
+. 1636 0x12345678 7
+. 8D 98 18 FF FF FF C3
+
+leal -24(%rbx), %eax
+. 1637 0x12345678 4
+. 8D 43 E8 C3
+
+leal -2(%r15), %eax
+. 1638 0x12345678 5
+. 41 8D 47 FE C3
+
+leal -2(%r9), %eax
+. 1639 0x12345678 5
+. 41 8D 41 FE C3
+
+leal 2(,%rax,4), %eax
+. 1640 0x12345678 8
+. 8D 04 85 02 00 00 00 C3
+
+leal 2(%rax), %ebp
+. 1641 0x12345678 4
+. 8D 68 02 C3
+
+leal -2(%rbp), %eax
+. 1642 0x12345678 4
+. 8D 45 FE C3
+
+leal 2(%rbp), %ebx
+. 1643 0x12345678 4
+. 8D 5D 02 C3
+
+leal 2(%rbp), %edi
+. 1644 0x12345678 4
+. 8D 7D 02 C3
+
+leal 2(%rbp), %edx
+. 1645 0x12345678 4
+. 8D 55 02 C3
+
+leal 2(%rbp), %esi
+. 1646 0x12345678 4
+. 8D 75 02 C3
+
+leal 2(%rbp), %r13d
+. 1647 0x12345678 5
+. 44 8D 6D 02 C3
+
+leal 2(%rbx), %eax
+. 1648 0x12345678 4
+. 8D 43 02 C3
+
+leal 2(%rcx), %edi
+. 1649 0x12345678 4
+. 8D 79 02 C3
+
+leal 2(%rdi), %edx
+. 1650 0x12345678 4
+. 8D 57 02 C3
+
+leal 2(%rsi), %eax
+. 1651 0x12345678 4
+. 8D 46 02 C3
+
+leal -32(%rdx), %eax
+. 1652 0x12345678 4
+. 8D 42 E0 C3
+
+leal 38(%r14), %eax
+. 1653 0x12345678 5
+. 41 8D 46 26 C3
+
+leal 3(%rax), %ebp
+. 1654 0x12345678 4
+. 8D 68 03 C3
+
+leal 3(%rbp), %ebx
+. 1655 0x12345678 4
+. 8D 5D 03 C3
+
+leal 3(%rbp), %edi
+. 1656 0x12345678 4
+. 8D 7D 03 C3
+
+leal 3(%rbp), %edx
+. 1657 0x12345678 4
+. 8D 55 03 C3
+
+leal 3(%rbp), %esi
+. 1658 0x12345678 4
+. 8D 75 03 C3
+
+leal 3(%rbp), %r12d
+. 1659 0x12345678 5
+. 44 8D 65 03 C3
+
+leal 3(%rbp), %r13d
+. 1660 0x12345678 5
+. 44 8D 6D 03 C3
+
+leal 3(%rdi), %eax
+. 1661 0x12345678 4
+. 8D 47 03 C3
+
+leal 3(%rdx), %eax
+. 1662 0x12345678 4
+. 8D 42 03 C3
+
+leal 3(%rdx,%rbp), %ebp
+. 1663 0x12345678 5
+. 8D 6C 2A 03 C3
+
+leal 3(%rsi), %eax
+. 1664 0x12345678 4
+. 8D 46 03 C3
+
+leal 43(%rdx,%rdx), %edx
+. 1665 0x12345678 5
+. 8D 54 12 2B C3
+
+leal 48(%r14), %eax
+. 1666 0x12345678 5
+. 41 8D 46 30 C3
+
+leal -48(%rax,%rbp), %ebp
+. 1667 0x12345678 5
+. 8D 6C 28 D0 C3
+
+leal -48(%rdx), %eax
+. 1668 0x12345678 4
+. 8D 42 D0 C3
+
+leal 4(%rax,%rbx), %r15d
+. 1669 0x12345678 6
+. 44 8D 7C 18 04 C3
+
+leal 4(%rbp), %eax
+. 1670 0x12345678 4
+. 8D 45 04 C3
+
+leal -4(%rbp), %edi
+. 1671 0x12345678 4
+. 8D 7D FC C3
+
+leal 4(%rbp), %edi
+. 1672 0x12345678 4
+. 8D 7D 04 C3
+
+leal -4(%rcx), %eax
+. 1673 0x12345678 4
+. 8D 41 FC C3
+
+leal -4(%rdi), %eax
+. 1674 0x12345678 4
+. 8D 47 FC C3
+
+leal -4(%rdx), %eax
+. 1675 0x12345678 4
+. 8D 42 FC C3
+
+leal 4(%rdx,%rbp), %ebp
+. 1676 0x12345678 5
+. 8D 6C 2A 04 C3
+
+leal -4(%rsi), %eax
+. 1677 0x12345678 4
+. 8D 46 FC C3
+
+leal -4(%rsi), %ecx
+. 1678 0x12345678 4
+. 8D 4E FC C3
+
+leal -64(%rax), %r13d
+. 1679 0x12345678 5
+. 44 8D 68 C0 C3
+
+leal 64(,%rbx,8), %edi
+. 1680 0x12345678 8
+. 8D 3C DD 40 00 00 00 C3
+
+leal 64(,%rdi,8), %edi
+. 1681 0x12345678 8
+. 8D 3C FD 40 00 00 00 C3
+
+leal -69631(%rdi), %eax
+. 1682 0x12345678 7
+. 8D 87 01 F0 FE FF C3
+
+leal -69633(%rbx), %eax
+. 1683 0x12345678 7
+. 8D 83 FF EF FE FF C3
+
+leal -69633(%rcx), %eax
+. 1684 0x12345678 7
+. 8D 81 FF EF FE FF C3
+
+leal -69633(%rdi), %eax
+. 1685 0x12345678 7
+. 8D 87 FF EF FE FF C3
+
+leal -69633(%rdx), %eax
+. 1686 0x12345678 7
+. 8D 82 FF EF FE FF C3
+
+leal 69634(%r13,%r13), %r13d
+. 1687 0x12345678 9
+. 47 8D AC 2D 02 10 01 00 C3
+
+leal -72(%rax), %r13d
+. 1688 0x12345678 5
+. 44 8D 68 B8 C3
+
+leal -73731(%rcx), %eax
+. 1689 0x12345678 7
+. 8D 81 FD DF FE FF C3
+
+leal -73731(%rdi), %eax
+. 1690 0x12345678 7
+. 8D 87 FD DF FE FF C3
+
+leal -73731(%rdx), %eax
+. 1691 0x12345678 7
+. 8D 82 FD DF FE FF C3
+
+leal -77825(%rdi), %eax
+. 1692 0x12345678 7
+. 8D 87 FF CF FE FF C3
+
+leal -77837(%rcx), %eax
+. 1693 0x12345678 7
+. 8D 81 F3 CF FE FF C3
+
+leal -78092(%r14), %eax
+. 1694 0x12345678 8
+. 41 8D 86 F4 CE FE FF C3
+
+leal -7(%rbx), %eax
+. 1695 0x12345678 4
+. 8D 43 F9 C3
+
+leal 7(%rdx), %eax
+. 1696 0x12345678 4
+. 8D 42 07 C3
+
+leal -80(%rax), %r12d
+. 1697 0x12345678 5
+. 44 8D 60 B0 C3
+
+leal -80(%rax), %r13d
+. 1698 0x12345678 5
+. 44 8D 68 B0 C3
+
+leal -81920(%rdi), %eax
+. 1699 0x12345678 7
+. 8D 87 00 C0 FE FF C3
+
+leal -88(%rax), %ebx
+. 1700 0x12345678 4
+. 8D 58 A8 C3
+
+leal -88(%rdx), %ebx
+. 1701 0x12345678 4
+. 8D 5A A8 C3
+
+leal -94208(%r13), %eax
+. 1702 0x12345678 8
+. 41 8D 85 00 90 FE FF C3
+
+leal -97(%rdx), %eax
+. 1703 0x12345678 4
+. 8D 42 9F C3
+
+leal (%r12,%r13), %eax
+. 1704 0x12345678 5
+. 43 8D 04 2C C3
+
+leal (%r9,%rbx), %ebp
+. 1705 0x12345678 5
+. 41 8D 2C 19 C3
+
+leal (%r9,%rcx), %r9d
+. 1706 0x12345678 5
+. 45 8D 0C 09 C3
+
+leal (%rax,%r12,2), %edi
+. 1707 0x12345678 5
+. 42 8D 3C 60 C3
+
+leal (%rax,%r13), %edi
+. 1708 0x12345678 5
+. 42 8D 3C 28 C3
+
+leal (%rax,%rax,2), %eax
+. 1709 0x12345678 4
+. 8D 04 40 C3
+
+leal (%rax,%rax), %edi
+. 1710 0x12345678 4
+. 8D 3C 00 C3
+
+leal (%rax,%rbp), %r15d
+. 1711 0x12345678 5
+. 44 8D 3C 28 C3
+
+leal (%rax,%rbx,4), %eax
+. 1712 0x12345678 4
+. 8D 04 98 C3
+
+leal (%rax,%rbx,8), %eax
+. 1713 0x12345678 4
+. 8D 04 D8 C3
+
+leal (%rax,%rbx), %r15d
+. 1714 0x12345678 5
+. 44 8D 3C 18 C3
+
+leal (%rax,%rdx), %eax
+. 1715 0x12345678 4
+. 8D 04 10 C3
+
+leal (%rbp,%r12), %eax
+. 1716 0x12345678 6
+. 42 8D 44 25 00 C3
+
+leal (%rbp,%r12), %ebx
+. 1717 0x12345678 6
+. 42 8D 5C 25 00 C3
+
+leal (%rbp,%r12), %esi
+. 1718 0x12345678 6
+. 42 8D 74 25 00 C3
+
+leal (%rbp,%rbx), %r8d
+. 1719 0x12345678 6
+. 44 8D 44 1D 00 C3
+
+leal (%rbx,%rbp), %edi
+. 1720 0x12345678 4
+. 8D 3C 2B C3
+
+leal (%rbx,%rbp), %esi
+. 1721 0x12345678 4
+. 8D 34 2B C3
+
+leal (%rcx,%rcx), %edi
+. 1722 0x12345678 4
+. 8D 3C 09 C3
+
+leal (%rdi,%rbx,4), %eax
+. 1723 0x12345678 4
+. 8D 04 9F C3
+
+leal (%rdi,%rcx), %edi
+. 1724 0x12345678 4
+. 8D 3C 0F C3
+
+leal (%rdx,%rbp), %r11d
+. 1725 0x12345678 5
+. 44 8D 1C 2A C3
+
+leal (%rdx,%rbx), %edx
+. 1726 0x12345678 4
+. 8D 14 1A C3
+
+leal (%rdx,%rdi), %r10d
+. 1727 0x12345678 5
+. 44 8D 14 3A C3
+
+leal (%rdx,%rdx), %eax
+. 1728 0x12345678 4
+. 8D 04 12 C3
+
+leal (%rdx,%rdx), %edi
+. 1729 0x12345678 4
+. 8D 3C 12 C3
+
+leal (%rsi,%rsi,2), %esi
+. 1730 0x12345678 4
+. 8D 34 76 C3
+
+leal (%rsi,%rsi), %eax
+. 1731 0x12345678 4
+. 8D 04 36 C3
+
+leal (%rsi,%rsi), %edx
+. 1732 0x12345678 4
+. 8D 14 36 C3
+
+leaq 0(,%rax,4), %r13
+. 1733 0x12345678 9
+. 4C 8D 2C 85 00 00 00 00 C3
+
+leaq 0(,%rax,4), %rbx
+. 1734 0x12345678 9
+. 48 8D 1C 85 00 00 00 00 C3
+
+leaq 0(,%rax,4), %rcx
+. 1735 0x12345678 9
+. 48 8D 0C 85 00 00 00 00 C3
+
+leaq 0(,%rax,4), %rdi
+. 1736 0x12345678 9
+. 48 8D 3C 85 00 00 00 00 C3
+
+leaq 0(,%rax,4), %rdx
+. 1737 0x12345678 9
+. 48 8D 14 85 00 00 00 00 C3
+
+leaq 0(,%rdx,4), %rax
+. 1738 0x12345678 9
+. 48 8D 04 95 00 00 00 00 C3
+
+leaq 100(%rsp), %rdx
+. 1739 0x12345678 6
+. 48 8D 54 24 64 C3
+
+leaq 104(%rsp), %rcx
+. 1740 0x12345678 6
+. 48 8D 4C 24 68 C3
+
+leaq 108(%rsp), %r8
+. 1741 0x12345678 6
+. 4C 8D 44 24 6C C3
+
+leaq 112(%rsp), %r15
+. 1742 0x12345678 6
+. 4C 8D 7C 24 70 C3
+
+leaq 116(%rsp), %rdi
+. 1743 0x12345678 6
+. 48 8D 7C 24 74 C3
+
+leaq 120(%rsp), %rsi
+. 1744 0x12345678 6
+. 48 8D 74 24 78 C3
+
+leaq 128(%rsp), %r15
+. 1745 0x12345678 9
+. 4C 8D BC 24 80 00 00 00 C3
+
+leaq 12(%rsp), %rdi
+. 1746 0x12345678 6
+. 48 8D 7C 24 0C C3
+
+leaq 12(%rsp), %rsi
+. 1747 0x12345678 6
+. 48 8D 74 24 0C C3
+
+leaq 144(%rsp), %r8
+. 1748 0x12345678 9
+. 4C 8D 84 24 90 00 00 00 C3
+
+leaq 144(%rsp), %rbx
+. 1749 0x12345678 9
+. 48 8D 9C 24 90 00 00 00 C3
+
+leaq 144(%rsp), %rdi
+. 1750 0x12345678 9
+. 48 8D BC 24 90 00 00 00 C3
+
+leaq 151(%rsp), %rdi
+. 1751 0x12345678 9
+. 48 8D BC 24 97 00 00 00 C3
+
+leaq 152(%rsp), %rdx
+. 1752 0x12345678 9
+. 48 8D 94 24 98 00 00 00 C3
+
+leaq 160(%rsp), %rax
+. 1753 0x12345678 9
+. 48 8D 84 24 A0 00 00 00 C3
+
+leaq 168(%rsp), %rdi
+. 1754 0x12345678 9
+. 48 8D BC 24 A8 00 00 00 C3
+
+leaq 168(%rsp), %rsi
+. 1755 0x12345678 9
+. 48 8D B4 24 A8 00 00 00 C3
+
+leaq 16(%rbp), %rdi
+. 1756 0x12345678 5
+. 48 8D 7D 10 C3
+
+leaq 16(%rbx), %rdi
+. 1757 0x12345678 5
+. 48 8D 7B 10 C3
+
+leaq 16(%rdx), %rsi
+. 1758 0x12345678 5
+. 48 8D 72 10 C3
+
+leaq 16(%rsp), %r13
+. 1759 0x12345678 6
+. 4C 8D 6C 24 10 C3
+
+leaq 16(%rsp), %r14
+. 1760 0x12345678 6
+. 4C 8D 74 24 10 C3
+
+leaq 16(%rsp), %r15
+. 1761 0x12345678 6
+. 4C 8D 7C 24 10 C3
+
+leaq 16(%rsp), %rcx
+. 1762 0x12345678 6
+. 48 8D 4C 24 10 C3
+
+leaq 16(%rsp), %rdx
+. 1763 0x12345678 6
+. 48 8D 54 24 10 C3
+
+leaq 16(%rsp), %rsi
+. 1764 0x12345678 6
+. 48 8D 74 24 10 C3
+
+leaq 172(%rsp), %rdi
+. 1765 0x12345678 9
+. 48 8D BC 24 AC 00 00 00 C3
+
+leaq 172(%rsp), %rdx
+. 1766 0x12345678 9
+. 48 8D 94 24 AC 00 00 00 C3
+
+leaq 176(%rsp), %r8
+. 1767 0x12345678 9
+. 4C 8D 84 24 B0 00 00 00 C3
+
+leaq 176(%rsp), %rdi
+. 1768 0x12345678 9
+. 48 8D BC 24 B0 00 00 00 C3
+
+leaq 17(%rbx), %rsi
+. 1769 0x12345678 5
+. 48 8D 73 11 C3
+
+leaq 180(%rsp), %rdi
+. 1770 0x12345678 9
+. 48 8D BC 24 B4 00 00 00 C3
+
+leaq 184(%rsp), %rdi
+. 1771 0x12345678 9
+. 48 8D BC 24 B8 00 00 00 C3
+
+leaq 188(%rsp), %rdi
+. 1772 0x12345678 9
+. 48 8D BC 24 BC 00 00 00 C3
+
+leaq 188(%rsp), %rsi
+. 1773 0x12345678 9
+. 48 8D B4 24 BC 00 00 00 C3
+
+leaq 18(%r15), %rbp
+. 1774 0x12345678 5
+. 49 8D 6F 12 C3
+
+leaq 192(%rsp), %r13
+. 1775 0x12345678 9
+. 4C 8D AC 24 C0 00 00 00 C3
+
+leaq 192(%rsp), %rdi
+. 1776 0x12345678 9
+. 48 8D BC 24 C0 00 00 00 C3
+
+leaq 1(%r15), %rax
+. 1777 0x12345678 5
+. 49 8D 47 01 C3
+
+leaq 1(%r15), %rdi
+. 1778 0x12345678 5
+. 49 8D 7F 01 C3
+
+leaq 1(%rbp), %rax
+. 1779 0x12345678 5
+. 48 8D 45 01 C3
+
+leaq 1(%rbx), %rdi
+. 1780 0x12345678 5
+. 48 8D 7B 01 C3
+
+leaq 1(%rcx), %rdi
+. 1781 0x12345678 5
+. 48 8D 79 01 C3
+
+leaq 207(%rsp), %rax
+. 1782 0x12345678 9
+. 48 8D 84 24 CF 00 00 00 C3
+
+leaq 208(%rsp), %r9
+. 1783 0x12345678 9
+. 4C 8D 8C 24 D0 00 00 00 C3
+
+leaq 208(%rsp), %rcx
+. 1784 0x12345678 9
+. 48 8D 8C 24 D0 00 00 00 C3
+
+leaq 208(%rsp), %rdi
+. 1785 0x12345678 9
+. 48 8D BC 24 D0 00 00 00 C3
+
+leaq 208(%rsp), %rdx
+. 1786 0x12345678 9
+. 48 8D 94 24 D0 00 00 00 C3
+
+leaq 20(%rsp), %r12
+. 1787 0x12345678 6
+. 4C 8D 64 24 14 C3
+
+leaq 20(%rsp), %rcx
+. 1788 0x12345678 6
+. 48 8D 4C 24 14 C3
+
+leaq 20(%rsp), %rdx
+. 1789 0x12345678 6
+. 48 8D 54 24 14 C3
+
+leaq 224(%rsp), %rax
+. 1790 0x12345678 9
+. 48 8D 84 24 E0 00 00 00 C3
+
+leaq 240(%rsp), %r13
+. 1791 0x12345678 9
+. 4C 8D AC 24 F0 00 00 00 C3
+
+leaq 240(%rsp), %rax
+. 1792 0x12345678 9
+. 48 8D 84 24 F0 00 00 00 C3
+
+leaq 240(%rsp), %rdi
+. 1793 0x12345678 9
+. 48 8D BC 24 F0 00 00 00 C3
+
+leaq 24(%rsp), %rsi
+. 1794 0x12345678 6
+. 48 8D 74 24 18 C3
+
+leaq 272(%rsp), %r13
+. 1795 0x12345678 9
+. 4C 8D AC 24 10 01 00 00 C3
+
+leaq 272(%rsp), %rcx
+. 1796 0x12345678 9
+. 48 8D 8C 24 10 01 00 00 C3
+
+leaq 28(%rsp), %rdi
+. 1797 0x12345678 6
+. 48 8D 7C 24 1C C3
+
+leaq 2(%r15), %rdi
+. 1798 0x12345678 5
+. 49 8D 7F 02 C3
+
+leaq 2(%rcx), %rdi
+. 1799 0x12345678 5
+. 48 8D 79 02 C3
+
+leaq 324(%rsp), %rdi
+. 1800 0x12345678 9
+. 48 8D BC 24 44 01 00 00 C3
+
+leaq 32(%rsp), %r13
+. 1801 0x12345678 6
+. 4C 8D 6C 24 20 C3
+
+leaq 32(%rsp), %r14
+. 1802 0x12345678 6
+. 4C 8D 74 24 20 C3
+
+leaq 32(%rsp), %r8
+. 1803 0x12345678 6
+. 4C 8D 44 24 20 C3
+
+leaq 32(%rsp), %rax
+. 1804 0x12345678 6
+. 48 8D 44 24 20 C3
+
+leaq 32(%rsp), %rbx
+. 1805 0x12345678 6
+. 48 8D 5C 24 20 C3
+
+leaq 32(%rsp), %rcx
+. 1806 0x12345678 6
+. 48 8D 4C 24 20 C3
+
+leaq 32(%rsp), %rdx
+. 1807 0x12345678 6
+. 48 8D 54 24 20 C3
+
+leaq 32(%rsp), %rsi
+. 1808 0x12345678 6
+. 48 8D 74 24 20 C3
+
+leaq 331(%rsp), %r15
+. 1809 0x12345678 9
+. 4C 8D BC 24 4B 01 00 00 C3
+
+leaq 332(%rsp), %rdi
+. 1810 0x12345678 9
+. 48 8D BC 24 4C 01 00 00 C3
+
+leaq 336(%rsp), %rbx
+. 1811 0x12345678 9
+. 48 8D 9C 24 50 01 00 00 C3
+
+leaq 336(%rsp), %rcx
+. 1812 0x12345678 9
+. 48 8D 8C 24 50 01 00 00 C3
+
+leaq 336(%rsp), %rdi
+. 1813 0x12345678 9
+. 48 8D BC 24 50 01 00 00 C3
+
+leaq 340(%rsp), %rdi
+. 1814 0x12345678 9
+. 48 8D BC 24 54 01 00 00 C3
+
+leaq 344(%rsp), %rdi
+. 1815 0x12345678 9
+. 48 8D BC 24 58 01 00 00 C3
+
+leaq 352(%rsp), %rdi
+. 1816 0x12345678 9
+. 48 8D BC 24 60 01 00 00 C3
+
+leaq 356(%rsp), %rdi
+. 1817 0x12345678 9
+. 48 8D BC 24 64 01 00 00 C3
+
+leaq 360(%rsp), %rdi
+. 1818 0x12345678 9
+. 48 8D BC 24 68 01 00 00 C3
+
+leaq 364(%rsp), %rdi
+. 1819 0x12345678 9
+. 48 8D BC 24 6C 01 00 00 C3
+
+leaq 368(%rsp), %rdi
+. 1820 0x12345678 9
+. 48 8D BC 24 70 01 00 00 C3
+
+leaq 36(%rsp), %rdi
+. 1821 0x12345678 6
+. 48 8D 7C 24 24 C3
+
+leaq 375(%rsp), %r15
+. 1822 0x12345678 9
+. 4C 8D BC 24 77 01 00 00 C3
+
+leaq 376(%rsp), %rsi
+. 1823 0x12345678 9
+. 48 8D B4 24 78 01 00 00 C3
+
+leaq 380(%rsp), %rdx
+. 1824 0x12345678 9
+. 48 8D 94 24 7C 01 00 00 C3
+
+leaq 384(%rsp), %rcx
+. 1825 0x12345678 9
+. 48 8D 8C 24 80 01 00 00 C3
+
+leaq 388(%rsp), %r8
+. 1826 0x12345678 9
+. 4C 8D 84 24 84 01 00 00 C3
+
+leaq 392(%rsp), %rsi
+. 1827 0x12345678 9
+. 48 8D B4 24 88 01 00 00 C3
+
+leaq 396(%rsp), %rdx
+. 1828 0x12345678 9
+. 48 8D 94 24 8C 01 00 00 C3
+
+leaq 3(%r15), %rdi
+. 1829 0x12345678 5
+. 49 8D 7F 03 C3
+
+leaq 3(%rcx), %rdi
+. 1830 0x12345678 5
+. 48 8D 79 03 C3
+
+leaq 400(%rsp), %r13
+. 1831 0x12345678 9
+. 4C 8D AC 24 90 01 00 00 C3
+
+leaq 400(%rsp), %rcx
+. 1832 0x12345678 9
+. 48 8D 8C 24 90 01 00 00 C3
+
+leaq 400(%rsp), %rdx
+. 1833 0x12345678 9
+. 48 8D 94 24 90 01 00 00 C3
+
+leaq 400(%rsp), %rsi
+. 1834 0x12345678 9
+. 48 8D B4 24 90 01 00 00 C3
+
+leaq 404(%rsp), %r8
+. 1835 0x12345678 9
+. 4C 8D 84 24 94 01 00 00 C3
+
+leaq 408(%rsp), %rsi
+. 1836 0x12345678 9
+. 48 8D B4 24 98 01 00 00 C3
+
+leaq 40(%rsp), %rcx
+. 1837 0x12345678 6
+. 48 8D 4C 24 28 C3
+
+leaq 40(%rsp), %rsi
+. 1838 0x12345678 6
+. 48 8D 74 24 28 C3
+
+leaq 412(%rsp), %rdx
+. 1839 0x12345678 9
+. 48 8D 94 24 9C 01 00 00 C3
+
+leaq 416(%rsp), %rcx
+. 1840 0x12345678 9
+. 48 8D 8C 24 A0 01 00 00 C3
+
+leaq 420(%rsp), %r8
+. 1841 0x12345678 9
+. 4C 8D 84 24 A4 01 00 00 C3
+
+leaq 424(%rsp), %rsi
+. 1842 0x12345678 9
+. 48 8D B4 24 A8 01 00 00 C3
+
+leaq 428(%rsp), %rdx
+. 1843 0x12345678 9
+. 48 8D 94 24 AC 01 00 00 C3
+
+leaq 432(%rsp), %rcx
+. 1844 0x12345678 9
+. 48 8D 8C 24 B0 01 00 00 C3
+
+leaq 436(%rsp), %r8
+. 1845 0x12345678 9
+. 4C 8D 84 24 B4 01 00 00 C3
+
+leaq 43(%rsp), %rdi
+. 1846 0x12345678 6
+. 48 8D 7C 24 2B C3
+
+leaq 440(%rsp), %rsi
+. 1847 0x12345678 9
+. 48 8D B4 24 B8 01 00 00 C3
+
+leaq 444(%rsp), %rdx
+. 1848 0x12345678 9
+. 48 8D 94 24 BC 01 00 00 C3
+
+leaq 448(%rsp), %rcx
+. 1849 0x12345678 9
+. 48 8D 8C 24 C0 01 00 00 C3
+
+leaq 44(%rsp), %r8
+. 1850 0x12345678 6
+. 4C 8D 44 24 2C C3
+
+leaq 44(%rsp), %rdi
+. 1851 0x12345678 6
+. 48 8D 7C 24 2C C3
+
+leaq 44(%rsp), %rsi
+. 1852 0x12345678 6
+. 48 8D 74 24 2C C3
+
+leaq 452(%rsp), %r8
+. 1853 0x12345678 9
+. 4C 8D 84 24 C4 01 00 00 C3
+
+leaq 456(%rsp), %rdi
+. 1854 0x12345678 9
+. 48 8D BC 24 C8 01 00 00 C3
+
+leaq 460(%rsp), %rsi
+. 1855 0x12345678 9
+. 48 8D B4 24 CC 01 00 00 C3
+
+leaq 464(%rsp), %rdx
+. 1856 0x12345678 9
+. 48 8D 94 24 D0 01 00 00 C3
+
+leaq 468(%rsp), %rcx
+. 1857 0x12345678 9
+. 48 8D 8C 24 D4 01 00 00 C3
+
+leaq 472(%rsp), %r8
+. 1858 0x12345678 9
+. 4C 8D 84 24 D8 01 00 00 C3
+
+leaq 476(%rsp), %rsi
+. 1859 0x12345678 9
+. 48 8D B4 24 DC 01 00 00 C3
+
+leaq 480(%rsp), %rdx
+. 1860 0x12345678 9
+. 48 8D 94 24 E0 01 00 00 C3
+
+leaq 484(%rsp), %rcx
+. 1861 0x12345678 9
+. 48 8D 8C 24 E4 01 00 00 C3
+
+leaq 488(%rsp), %r8
+. 1862 0x12345678 9
+. 4C 8D 84 24 E8 01 00 00 C3
+
+leaq 48(%r12,%rbx,4), %rbx
+. 1863 0x12345678 6
+. 49 8D 5C 9C 30 C3
+
+leaq 48(%r13,%rax,4), %rax
+. 1864 0x12345678 6
+. 49 8D 44 85 30 C3
+
+leaq 48(%rbp,%rax), %rax
+. 1865 0x12345678 6
+. 48 8D 44 05 30 C3
+
+leaq 48(%rbx,%rax), %rcx
+. 1866 0x12345678 6
+. 48 8D 4C 03 30 C3
+
+leaq 48(%rsp), %r8
+. 1867 0x12345678 6
+. 4C 8D 44 24 30 C3
+
+leaq 48(%rsp), %rbp
+. 1868 0x12345678 6
+. 48 8D 6C 24 30 C3
+
+leaq 48(%rsp), %rcx
+. 1869 0x12345678 6
+. 48 8D 4C 24 30 C3
+
+leaq 48(%rsp), %rsi
+. 1870 0x12345678 6
+. 48 8D 74 24 30 C3
+
+leaq 492(%rsp), %rsi
+. 1871 0x12345678 9
+. 48 8D B4 24 EC 01 00 00 C3
+
+leaq 496(%rsp), %rdx
+. 1872 0x12345678 9
+. 48 8D 94 24 F0 01 00 00 C3
+
+leaq 4(%rax,%rbx), %rax
+. 1873 0x12345678 6
+. 48 8D 44 18 04 C3
+
+leaq 500(%rsp), %rcx
+. 1874 0x12345678 9
+. 48 8D 8C 24 F4 01 00 00 C3
+
+leaq 504(%rsp), %r8
+. 1875 0x12345678 9
+. 4C 8D 84 24 F8 01 00 00 C3
+
+leaq 508(%rsp), %rsi
+. 1876 0x12345678 9
+. 48 8D B4 24 FC 01 00 00 C3
+
+leaq 512(%rsp), %rdx
+. 1877 0x12345678 9
+. 48 8D 94 24 00 02 00 00 C3
+
+leaq 516(%rsp), %rcx
+. 1878 0x12345678 9
+. 48 8D 8C 24 04 02 00 00 C3
+
+leaq 520(%rsp), %r8
+. 1879 0x12345678 9
+. 4C 8D 84 24 08 02 00 00 C3
+
+leaq 524(%rsp), %rsi
+. 1880 0x12345678 9
+. 48 8D B4 24 0C 02 00 00 C3
+
+leaq 528(%rsp), %rdx
+. 1881 0x12345678 9
+. 48 8D 94 24 10 02 00 00 C3
+
+leaq 52(%rsp), %rdx
+. 1882 0x12345678 6
+. 48 8D 54 24 34 C3
+
+leaq 532(%rsp), %rcx
+. 1883 0x12345678 9
+. 48 8D 8C 24 14 02 00 00 C3
+
+leaq 536(%rsp), %r8
+. 1884 0x12345678 9
+. 4C 8D 84 24 18 02 00 00 C3
+
+leaq 540(%rsp), %rsi
+. 1885 0x12345678 9
+. 48 8D B4 24 1C 02 00 00 C3
+
+leaq 544(%rsp), %rdx
+. 1886 0x12345678 9
+. 48 8D 94 24 20 02 00 00 C3
+
+leaq 548(%rsp), %rcx
+. 1887 0x12345678 9
+. 48 8D 8C 24 24 02 00 00 C3
+
+leaq 552(%rsp), %r8
+. 1888 0x12345678 9
+. 4C 8D 84 24 28 02 00 00 C3
+
+leaq 556(%rsp), %rdi
+. 1889 0x12345678 9
+. 48 8D BC 24 2C 02 00 00 C3
+
+leaq 576(%rsp), %r14
+. 1890 0x12345678 9
+. 4C 8D B4 24 40 02 00 00 C3
+
+leaq 576(%rsp), %rcx
+. 1891 0x12345678 9
+. 48 8D 8C 24 40 02 00 00 C3
+
+leaq 576(%rsp), %rdx
+. 1892 0x12345678 9
+. 48 8D 94 24 40 02 00 00 C3
+
+leaq 60(%rsp), %rdi
+. 1893 0x12345678 6
+. 48 8D 7C 24 3C C3
+
+leaq 640(%rsp), %rcx
+. 1894 0x12345678 9
+. 48 8D 8C 24 80 02 00 00 C3
+
+leaq 640(%rsp), %rdx
+. 1895 0x12345678 9
+. 48 8D 94 24 80 02 00 00 C3
+
+leaq 64(%rsp), %r14
+. 1896 0x12345678 6
+. 4C 8D 74 24 40 C3
+
+leaq 64(%rsp), %rcx
+. 1897 0x12345678 6
+. 48 8D 4C 24 40 C3
+
+leaq 64(%rsp), %rsi
+. 1898 0x12345678 6
+. 48 8D 74 24 40 C3
+
+leaq 672(%rsp), %rdi
+. 1899 0x12345678 9
+. 48 8D BC 24 A0 02 00 00 C3
+
+leaq 704(%rsp), %rcx
+. 1900 0x12345678 9
+. 48 8D 8C 24 C0 02 00 00 C3
+
+leaq 768(%rsp), %r13
+. 1901 0x12345678 9
+. 4C 8D AC 24 00 03 00 00 C3
+
+leaq 768(%rsp), %r14
+. 1902 0x12345678 9
+. 4C 8D B4 24 00 03 00 00 C3
+
+leaq 768(%rsp), %rcx
+. 1903 0x12345678 9
+. 48 8D 8C 24 00 03 00 00 C3
+
+leaq 768(%rsp), %rdx
+. 1904 0x12345678 9
+. 48 8D 94 24 00 03 00 00 C3
+
+leaq 76(%rsp), %rdi
+. 1905 0x12345678 6
+. 48 8D 7C 24 4C C3
+
+leaq 80(%rsp), %rcx
+. 1906 0x12345678 6
+. 48 8D 4C 24 50 C3
+
+leaq 832(%rsp), %r12
+. 1907 0x12345678 9
+. 4C 8D A4 24 40 03 00 00 C3
+
+leaq 832(%rsp), %r13
+. 1908 0x12345678 9
+. 4C 8D AC 24 40 03 00 00 C3
+
+leaq 832(%rsp), %r14
+. 1909 0x12345678 9
+. 4C 8D B4 24 40 03 00 00 C3
+
+leaq 832(%rsp), %r15
+. 1910 0x12345678 9
+. 4C 8D BC 24 40 03 00 00 C3
+
+leaq 896(%rsp), %r12
+. 1911 0x12345678 9
+. 4C 8D A4 24 80 03 00 00 C3
+
+leaq 896(%rsp), %r13
+. 1912 0x12345678 9
+. 4C 8D AC 24 80 03 00 00 C3
+
+leaq 896(%rsp), %r14
+. 1913 0x12345678 9
+. 4C 8D B4 24 80 03 00 00 C3
+
+leaq 896(%rsp), %r15
+. 1914 0x12345678 9
+. 4C 8D BC 24 80 03 00 00 C3
+
+leaq 896(%rsp), %rbx
+. 1915 0x12345678 9
+. 48 8D 9C 24 80 03 00 00 C3
+
+leaq 896(%rsp), %rcx
+. 1916 0x12345678 9
+. 48 8D 8C 24 80 03 00 00 C3
+
+leaq 896(%rsp), %rdx
+. 1917 0x12345678 9
+. 48 8D 94 24 80 03 00 00 C3
+
+leaq 896(%rsp), %rsi
+. 1918 0x12345678 9
+. 48 8D B4 24 80 03 00 00 C3
+
+leaq 8(%rdx), %rax
+. 1919 0x12345678 5
+. 48 8D 42 08 C3
+
+leaq 92(%rsp), %rax
+. 1920 0x12345678 6
+. 48 8D 44 24 5C C3
+
+leaq 96(%rsp), %rdx
+. 1921 0x12345678 6
+. 48 8D 54 24 60 C3
+
+leaq (%r12,%rbx), %rax
+. 1922 0x12345678 5
+. 49 8D 04 1C C3
+
+leaq (%rax,%rax,2), %rax
+. 1923 0x12345678 5
+. 48 8D 04 40 C3
+
+leaq (%rax,%rax,4), %rax
+. 1924 0x12345678 5
+. 48 8D 04 80 C3
+
+leaq (%rax,%rax,4), %rdx
+. 1925 0x12345678 5
+. 48 8D 14 80 C3
+
+leaq (%rax,%rbp), %rax
+. 1926 0x12345678 5
+. 48 8D 04 28 C3
+
+leaq (%rbp,%r12), %r13
+. 1927 0x12345678 6
+. 4E 8D 6C 25 00 C3
+
+leaq (%rbp,%r12), %rbx
+. 1928 0x12345678 6
+. 4A 8D 5C 25 00 C3
+
+leaq (%rbx,%rbx,2), %rbx
+. 1929 0x12345678 5
+. 48 8D 1C 5B C3
+
+leaq (%rbx,%rbx,4), %rax
+. 1930 0x12345678 5
+. 48 8D 04 9B C3
+
+leaq (%rbx,%rbx,4), %rdi
+. 1931 0x12345678 5
+. 48 8D 3C 9B C3
+
+leaq (%rcx,%rcx,2), %rax
+. 1932 0x12345678 5
+. 48 8D 04 49 C3
+
+leaq (%rcx,%rcx,2), %rdx
+. 1933 0x12345678 5
+. 48 8D 14 49 C3
+
+leaq (%rdi,%rbp), %rdi
+. 1934 0x12345678 5
+. 48 8D 3C 2F C3
+
+leaq (%rdi,%rdi,2), %rdi
+. 1935 0x12345678 5
+. 48 8D 3C 7F C3
+
+leaq (%rdx,%rdx,2), %rax
+. 1936 0x12345678 5
+. 48 8D 04 52 C3
+
+leaq (%rdx,%rdx,4), %rax
+. 1937 0x12345678 5
+. 48 8D 04 92 C3
+
+leaq (%rsi,%rbp), %rsi
+. 1938 0x12345678 5
+. 48 8D 34 2E C3
+
+leaq (%rsi,%rsi,4), %rax
+. 1939 0x12345678 5
+. 48 8D 04 B6 C3
+
+mov 104(%rsp), %r9d
+. 1940 0x12345678 6
+. 44 8B 4C 24 68 C3
+
+mov 124(%rsp), %ebx
+. 1941 0x12345678 5
+. 8B 5C 24 7C C3
+
+mov 12(%rax), %edi
+. 1942 0x12345678 4
+. 8B 78 0C C3
+
+mov -20(%rsp), %ecx
+. 1943 0x12345678 5
+. 8B 4C 24 EC C3
+
+mov 24(%rdx), %eax
+. 1944 0x12345678 4
+. 8B 42 18 C3
+
+mov 292(%rsp), %r12d
+. 1945 0x12345678 9
+. 44 8B A4 24 24 01 00 00 C3
+
+mov 48(%rsp), %eax
+. 1946 0x12345678 5
+. 8B 44 24 30 C3
+
+mov 8(%r12), %eax
+. 1947 0x12345678 6
+. 41 8B 44 24 08 C3
+
+mov 8(%rax), %eax
+. 1948 0x12345678 4
+. 8B 40 08 C3
+
+mov 8(%rax), %edi
+. 1949 0x12345678 4
+. 8B 78 08 C3
+
+mov 8(%rbp), %eax
+. 1950 0x12345678 4
+. 8B 45 08 C3
+
+mov 8(%rcx), %r8d
+. 1951 0x12345678 5
+. 44 8B 41 08 C3
+
+mov 8(%rdx), %r8d
+. 1952 0x12345678 5
+. 44 8B 42 08 C3
+
+mov -8(%rsp), %edx
+. 1953 0x12345678 5
+. 8B 54 24 F8 C3
+
+mov 8(%rsp), %edx
+. 1954 0x12345678 5
+. 8B 54 24 08 C3
+
+mov 8(%rsp), %esi
+. 1955 0x12345678 5
+. 8B 74 24 08 C3
+
+movabsq $4599094494223104511, %rdi
+. 1956 0x12345678 11
+. 48 BF FF 79 9F 50 13 44 D3 3F C3
+
+movabsq $4604418534313441775, %rdi
+. 1957 0x12345678 11
+. 48 BF EF 39 FA FE 42 2E E6 3F C3
+
+movabsq $4607182418800017408, %rdi
+. 1958 0x12345678 11
+. 48 BF 00 00 00 00 00 00 F0 3F C3
+
+movabsq $4609176140021203710, %rdi
+. 1959 0x12345678 11
+. 48 BF FE 82 2B 65 47 15 F7 3F C3
+
+movabsq $4614256656552045848, %rdi
+. 1960 0x12345678 11
+. 48 BF 18 2D 44 54 FB 21 09 40 C3
+
+movabsq $4614662735865160561, %rdi
+. 1961 0x12345678 11
+. 48 BF 71 A3 79 09 4F 93 0A 40 C3
+
+movabsq $9221120237041090560, %rdi
+. 1962 0x12345678 11
+. 48 BF 00 00 00 00 00 00 F8 7F C3
+
+movb $0, 140(%rdi)
+. 1963 0x12345678 8
+. C6 87 8C 00 00 00 00 C3
+
+movb $0, 144(%rsp)
+. 1964 0x12345678 9
+. C6 84 24 90 00 00 00 00 C3
+
+movb $0, 156(%rdi)
+. 1965 0x12345678 8
+. C6 87 9C 00 00 00 00 C3
+
+movb $0, 157(%rdi)
+. 1966 0x12345678 8
+. C6 87 9D 00 00 00 00 C3
+
+movb $0, 158(%rdi)
+. 1967 0x12345678 8
+. C6 87 9E 00 00 00 00 C3
+
+movb $0, 15(%rsp)
+. 1968 0x12345678 6
+. C6 44 24 0F 00 C3
+
+movb $0, 160(%rsp)
+. 1969 0x12345678 9
+. C6 84 24 A0 00 00 00 00 C3
+
+movb $0, 160(%rsp,%rax)
+. 1970 0x12345678 9
+. C6 84 04 A0 00 00 00 00 C3
+
+movb $0, 16(%rax)
+. 1971 0x12345678 5
+. C6 40 10 00 C3
+
+movb $0, 16(%rax,%rdx)
+. 1972 0x12345678 6
+. C6 44 10 10 00 C3
+
+movb $0, 16(%rbx)
+. 1973 0x12345678 5
+. C6 43 10 00 C3
+
+movb $0, 16(%rsi,%rdx)
+. 1974 0x12345678 6
+. C6 44 16 10 00 C3
+
+movb $0, 17(%rax)
+. 1975 0x12345678 5
+. C6 40 11 00 C3
+
+movb $0, 17(%rbx)
+. 1976 0x12345678 5
+. C6 43 11 00 C3
+
+movb $0, 18(%rax)
+. 1977 0x12345678 5
+. C6 40 12 00 C3
+
+movb $0, 18(%rbx)
+. 1978 0x12345678 5
+. C6 43 12 00 C3
+
+movb $0, 270(%rsp)
+. 1979 0x12345678 9
+. C6 84 24 0E 01 00 00 00 C3
+
+movb $0, 283(%rsp)
+. 1980 0x12345678 9
+. C6 84 24 1B 01 00 00 00 C3
+
+movb $0, 331(%rsp)
+. 1981 0x12345678 9
+. C6 84 24 4B 01 00 00 00 C3
+
+movb $0, 375(%rsp)
+. 1982 0x12345678 9
+. C6 84 24 77 01 00 00 00 C3
+
+movb $0, 37(%rsp)
+. 1983 0x12345678 6
+. C6 44 24 25 00 C3
+
+movb $0, 39(%rsp)
+. 1984 0x12345678 6
+. C6 44 24 27 00 C3
+
+movb $0, 43(%rsp)
+. 1985 0x12345678 6
+. C6 44 24 2B 00 C3
+
+movb $0, 44(%rax)
+. 1986 0x12345678 5
+. C6 40 2C 00 C3
+
+movb $0, 47(%rsp)
+. 1987 0x12345678 6
+. C6 44 24 2F 00 C3
+
+movb $0, 4(%rsi,%rdx)
+. 1988 0x12345678 6
+. C6 44 16 04 00 C3
+
+movb $0, 8(%rdi)
+. 1989 0x12345678 5
+. C6 47 08 00 C3
+
+movb $0, 8(%rip)
+. 1990 0x12345678 8
+. C6 05 08 00 00 00 00 C3
+
+movb $0, 9(%rax)
+. 1991 0x12345678 5
+. C6 40 09 00 C3
+
+movb $0, 11(%rip)
+. 1992 0x12345678 8
+. C6 05 0B 00 00 00 00 C3
+
+movb $0, (%r14)
+. 1993 0x12345678 5
+. 41 C6 06 00 C3
+
+movb $0, (%r15)
+. 1994 0x12345678 5
+. 41 C6 07 00 C3
+
+movb $0, (%rax,%r13)
+. 1995 0x12345678 6
+. 42 C6 04 28 00 C3
+
+movb $0, (%rbx,%rax)
+. 1996 0x12345678 5
+. C6 04 03 00 C3
+
+movb $0, (%rcx,%r10)
+. 1997 0x12345678 6
+. 42 C6 04 11 00 C3
+
+movb $0, (%rdi)
+. 1998 0x12345678 4
+. C6 07 00 C3
+
+movb $0, (%rdx,%rax)
+. 1999 0x12345678 5
+. C6 04 02 00 C3
+
+movb $1, 151(%rsp)
+. 2000 0x12345678 9
+. C6 84 24 97 00 00 00 01 C3
+
+movb $1, 15(%rsp)
+. 2001 0x12345678 6
+. C6 44 24 0F 01 C3
+
+movb $1, 16(%rcx,%rdx)
+. 2002 0x12345678 6
+. C6 44 11 10 01 C3
+
+movb $1, 37(%rsp)
+. 2003 0x12345678 6
+. C6 44 24 25 01 C3
+
+movb $1, 39(%rsp)
+. 2004 0x12345678 6
+. C6 44 24 27 01 C3
+
+movb $1, 44(%rax)
+. 2005 0x12345678 5
+. C6 40 2C 01 C3
+
+movb $1, 47(%rsp)
+. 2006 0x12345678 6
+. C6 44 24 2F 01 C3
+
+movb $1, 4(%rcx,%rax,4)
+. 2007 0x12345678 6
+. C6 44 81 04 01 C3
+
+movb $1, 13(%rip)
+. 2008 0x12345678 8
+. C6 05 0D 00 00 00 01 C3
+
+movb $1, (%r12)
+. 2009 0x12345678 6
+. 41 C6 04 24 01 C3
+
+movb $1, (%r13)
+. 2010 0x12345678 6
+. 41 C6 45 00 01 C3
+
+movb $1, (%r15)
+. 2011 0x12345678 5
+. 41 C6 07 01 C3
+
+movb $1, (%rax,%r12)
+. 2012 0x12345678 6
+. 42 C6 04 20 01 C3
+
+movb $1, (%rdi)
+. 2013 0x12345678 4
+. C6 07 01 C3
+
+movb $1, (%rdx,%r14)
+. 2014 0x12345678 6
+. 42 C6 04 32 01 C3
+
+movb $1, (%rdx,%rax)
+. 2015 0x12345678 5
+. C6 04 02 01 C3
+
+movb $1, 99(%rip)
+. 2016 0x12345678 8
+. C6 05 63 00 00 00 01 C3
+
+movb $44, 160(%rsp,%rax)
+. 2017 0x12345678 9
+. C6 84 04 A0 00 00 00 2C C3
+
+movb $44, (%rsp,%rax)
+. 2018 0x12345678 5
+. C6 04 04 2C C3
+
+movb $45, (%rsp,%rax)
+. 2019 0x12345678 5
+. C6 04 04 2D C3
+
+movb $48, (%rsp)
+. 2020 0x12345678 5
+. C6 04 24 30 C3
+
+movb $49, 160(%rsp,%rax)
+. 2021 0x12345678 9
+. C6 84 04 A0 00 00 00 31 C3
+
+movb $82, 160(%rsp,%rax)
+. 2022 0x12345678 9
+. C6 84 04 A0 00 00 00 52 C3
+
+movb %al, 103(%rsp)
+. 2023 0x12345678 5
+. 88 44 24 67 C3
+
+movb %al, 106(%rsp)
+. 2024 0x12345678 5
+. 88 44 24 6A C3
+
+movb %al, 107(%rsp)
+. 2025 0x12345678 5
+. 88 44 24 6B C3
+
+movb %al, 111(%rsp)
+. 2026 0x12345678 5
+. 88 44 24 6F C3
+
+movb %al, 112(%rsp)
+. 2027 0x12345678 5
+. 88 44 24 70 C3
+
+movb %al, 11(%rsp)
+. 2028 0x12345678 5
+. 88 44 24 0B C3
+
+movb %al, 127(%rsp)
+. 2029 0x12345678 5
+. 88 44 24 7F C3
+
+movb %al, 138(%rsp)
+. 2030 0x12345678 8
+. 88 84 24 8A 00 00 00 C3
+
+movb %al, 139(%rsp)
+. 2031 0x12345678 8
+. 88 84 24 8B 00 00 00 C3
+
+movb %al, 14(%rsp)
+. 2032 0x12345678 5
+. 88 44 24 0E C3
+
+movb %al, 15(%rsp)
+. 2033 0x12345678 5
+. 88 44 24 0F C3
+
+movb %al, 160(%rsp,%rdx)
+. 2034 0x12345678 8
+. 88 84 14 A0 00 00 00 C3
+
+movb %al, 16(%rsp)
+. 2035 0x12345678 5
+. 88 44 24 10 C3
+
+movb %al, 19(%rsp)
+. 2036 0x12345678 5
+. 88 44 24 13 C3
+
+movb %al, 22(%rsp)
+. 2037 0x12345678 5
+. 88 44 24 16 C3
+
+movb %al, 23(%rsp)
+. 2038 0x12345678 5
+. 88 44 24 17 C3
+
+movb %al, 25(%rsp)
+. 2039 0x12345678 5
+. 88 44 24 19 C3
+
+movb %al, 26(%rsp)
+. 2040 0x12345678 5
+. 88 44 24 1A C3
+
+movb %al, 270(%rsp)
+. 2041 0x12345678 8
+. 88 84 24 0E 01 00 00 C3
+
+movb %al, 271(%rsp)
+. 2042 0x12345678 8
+. 88 84 24 0F 01 00 00 C3
+
+movb %al, 27(%rsp)
+. 2043 0x12345678 5
+. 88 44 24 1B C3
+
+movb %al, 30(%rsp)
+. 2044 0x12345678 5
+. 88 44 24 1E C3
+
+movb %al, 31(%rsp)
+. 2045 0x12345678 5
+. 88 44 24 1F C3
+
+movb %al, 35(%rsp)
+. 2046 0x12345678 5
+. 88 44 24 23 C3
+
+movb %al, 38(%rsp)
+. 2047 0x12345678 5
+. 88 44 24 26 C3
+
+movb %al, 39(%rsp)
+. 2048 0x12345678 5
+. 88 44 24 27 C3
+
+movb %al, 43(%rsp)
+. 2049 0x12345678 5
+. 88 44 24 2B C3
+
+movb %al, 44(%rbx)
+. 2050 0x12345678 4
+. 88 43 2C C3
+
+movb %al, 47(%rsp)
+. 2051 0x12345678 5
+. 88 44 24 2F C3
+
+movb %al, 48(%rsp)
+. 2052 0x12345678 5
+. 88 44 24 30 C3
+
+movb %al, 60(%rsp)
+. 2053 0x12345678 5
+. 88 44 24 3C C3
+
+movb %al, 61(%rsp)
+. 2054 0x12345678 5
+. 88 44 24 3D C3
+
+movb %al, 62(%rsp)
+. 2055 0x12345678 5
+. 88 44 24 3E C3
+
+movb %al, 63(%rsp)
+. 2056 0x12345678 5
+. 88 44 24 3F C3
+
+movb %al, 67(%rsp)
+. 2057 0x12345678 5
+. 88 44 24 43 C3
+
+movb %al, 6(%rsp)
+. 2058 0x12345678 5
+. 88 44 24 06 C3
+
+movb %al, 79(%rsp)
+. 2059 0x12345678 5
+. 88 44 24 4F C3
+
+movb %al, 7(%rsp)
+. 2060 0x12345678 5
+. 88 44 24 07 C3
+
+movb %al, 87(%rsp)
+. 2061 0x12345678 5
+. 88 44 24 57 C3
+
+movb %al, (%rsp,%rcx)
+. 2062 0x12345678 4
+. 88 04 0C C3
+
+movb %bl, 135(%rsp)
+. 2063 0x12345678 8
+. 88 9C 24 87 00 00 00 C3
+
+movb %bl, 271(%rsp)
+. 2064 0x12345678 8
+. 88 9C 24 0F 01 00 00 C3
+
+movb %bl, 46(%rsp)
+. 2065 0x12345678 5
+. 88 5C 24 2E C3
+
+movb %bl, 8(%rax)
+. 2066 0x12345678 4
+. 88 58 08 C3
+
+movb %cl, 23(%rsp)
+. 2067 0x12345678 5
+. 88 4C 24 17 C3
+
+movb %cl, 271(%rsp)
+. 2068 0x12345678 8
+. 88 8C 24 0F 01 00 00 C3
+
+movb %cl, 27(%rsp)
+. 2069 0x12345678 5
+. 88 4C 24 1B C3
+
+movb %cl, 32(%rsp)
+. 2070 0x12345678 5
+. 88 4C 24 20 C3
+
+movb %cl, 39(%rsp)
+. 2071 0x12345678 5
+. 88 4C 24 27 C3
+
+movb %cl, 43(%rsp)
+. 2072 0x12345678 5
+. 88 4C 24 2B C3
+
+movb %cl, 48(%rsp)
+. 2073 0x12345678 5
+. 88 4C 24 30 C3
+
+movb %cl, 64(%rsp)
+. 2074 0x12345678 5
+. 88 4C 24 40 C3
+
+movb %cl, 96(%rsp)
+. 2075 0x12345678 5
+. 88 4C 24 60 C3
+
+movb %dil, 43(%rsp)
+. 2076 0x12345678 6
+. 40 88 7C 24 2B C3
+
+movb %dil, 75(%rsp)
+. 2077 0x12345678 6
+. 40 88 7C 24 4B C3
+
+movb %dil, (%rax)
+. 2078 0x12345678 4
+. 40 88 38 C3
+
+movb %dl, 13(%rsp)
+. 2079 0x12345678 5
+. 88 54 24 0D C3
+
+movb %dl, 23(%rsp)
+. 2080 0x12345678 5
+. 88 54 24 17 C3
+
+movb %dl, 271(%rsp)
+. 2081 0x12345678 8
+. 88 94 24 0F 01 00 00 C3
+
+movb %dl, 30(%rsp)
+. 2082 0x12345678 5
+. 88 54 24 1E C3
+
+movb %dl, 31(%rsp)
+. 2083 0x12345678 5
+. 88 54 24 1F C3
+
+movb %dl, 35(%rsp)
+. 2084 0x12345678 5
+. 88 54 24 23 C3
+
+movb %dl, 39(%rsp)
+. 2085 0x12345678 5
+. 88 54 24 27 C3
+
+movb %dl, 42(%rsp)
+. 2086 0x12345678 5
+. 88 54 24 2A C3
+
+movb %dl, 47(%rsp)
+. 2087 0x12345678 5
+. 88 54 24 2F C3
+
+movb %dl, 48(%rsp)
+. 2088 0x12345678 5
+. 88 54 24 30 C3
+
+movb %dl, 55(%rsp)
+. 2089 0x12345678 5
+. 88 54 24 37 C3
+
+movb %dl, 59(%rsp)
+. 2090 0x12345678 5
+. 88 54 24 3B C3
+
+movb %dl, 67(%rsp)
+. 2091 0x12345678 5
+. 88 54 24 43 C3
+
+movb %dl, 79(%rsp)
+. 2092 0x12345678 5
+. 88 54 24 4F C3
+
+movb %dl, 95(%rsp)
+. 2093 0x12345678 5
+. 88 54 24 5F C3
+
+movb %dl, (%rax,%rcx)
+. 2094 0x12345678 4
+. 88 14 08 C3
+
+movb %dl, (%rsp,%rax)
+. 2095 0x12345678 4
+. 88 14 04 C3
+
+movb %r12b, 271(%rsp)
+. 2096 0x12345678 9
+. 44 88 A4 24 0F 01 00 00 C3
+
+movb %r8b, 11(%rsp)
+. 2097 0x12345678 6
+. 44 88 44 24 0B C3
+
+movb %r8b, 15(%rsp)
+. 2098 0x12345678 6
+. 44 88 44 24 0F C3
+
+movb %r8b, 16(%rcx,%rdx)
+. 2099 0x12345678 6
+. 44 88 44 11 10 C3
+
+movb %r8b, 16(%rdi,%rdx)
+. 2100 0x12345678 6
+. 44 88 44 17 10 C3
+
+movb %r8b, 16(%rsi,%rdx)
+. 2101 0x12345678 6
+. 44 88 44 16 10 C3
+
+movb %r8b, 39(%rsp)
+. 2102 0x12345678 6
+. 44 88 44 24 27 C3
+
+movb %r9b, 39(%rsp)
+. 2103 0x12345678 6
+. 44 88 4C 24 27 C3
+
+movb %r9b, 4771(%rip)
+. 2104 0x12345678 8
+. 44 88 0D A3 12 00 00 C3
+
+movb %sil, 18(%rbx)
+. 2105 0x12345678 5
+. 40 88 73 12 C3
+
+movl %eax, %eax
+. 2106 0x12345678 3
+. 89 C0 C3
+
+movl %eax, %edx
+. 2107 0x12345678 3
+. 89 C2 C3
+
+movl %ebp, %eax
+. 2108 0x12345678 3
+. 89 E8 C3
+
+movl %ebp, %r15d
+. 2109 0x12345678 4
+. 41 89 EF C3
+
+movl %ebx, %eax
+. 2110 0x12345678 3
+. 89 D8 C3
+
+movl %ebx, %ebx
+. 2111 0x12345678 3
+. 89 DB C3
+
+movl %ebx, %edx
+. 2112 0x12345678 3
+. 89 DA C3
+
+movl %ecx, %ebx
+. 2113 0x12345678 3
+. 89 CB C3
+
+movl %ecx, %ecx
+. 2114 0x12345678 3
+. 89 C9 C3
+
+movl %edi, %eax
+. 2115 0x12345678 3
+. 89 F8 C3
+
+movl %edi, %edi
+. 2116 0x12345678 3
+. 89 FF C3
+
+movl %edx, %eax
+. 2117 0x12345678 3
+. 89 D0 C3
+
+movl %edx, %edx
+. 2118 0x12345678 3
+. 89 D2 C3
+
+movl %esi, %eax
+. 2119 0x12345678 3
+. 89 F0 C3
+
+movl %esi, %edx
+. 2120 0x12345678 3
+. 89 F2 C3
+
+movl %esi, %esi
+. 2121 0x12345678 3
+. 89 F6 C3
+
+movl $0, 100(%rdi)
+. 2122 0x12345678 8
+. C7 47 64 00 00 00 00 C3
+
+movl $0, 104(%rdi)
+. 2123 0x12345678 8
+. C7 47 68 00 00 00 00 C3
+
+movl $0, 108(%rdi)
+. 2124 0x12345678 8
+. C7 47 6C 00 00 00 00 C3
+
+movl $0, 108(%rsp)
+. 2125 0x12345678 9
+. C7 44 24 6C 00 00 00 00 C3
+
+movl $0, 112(%rdi)
+. 2126 0x12345678 8
+. C7 47 70 00 00 00 00 C3
+
+movl $0, 116(%rdi)
+. 2127 0x12345678 8
+. C7 47 74 00 00 00 00 C3
+
+movl $0, 116(%rsp)
+. 2128 0x12345678 9
+. C7 44 24 74 00 00 00 00 C3
+
+movl $0, 120(%rdi)
+. 2129 0x12345678 8
+. C7 47 78 00 00 00 00 C3
+
+movl $0, 120(%rsp)
+. 2130 0x12345678 9
+. C7 44 24 78 00 00 00 00 C3
+
+movl $0, 124(%rdi)
+. 2131 0x12345678 8
+. C7 47 7C 00 00 00 00 C3
+
+movl $0, 124(%rsp)
+. 2132 0x12345678 9
+. C7 44 24 7C 00 00 00 00 C3
+
+movl $0, 128(%rdi)
+. 2133 0x12345678 11
+. C7 87 80 00 00 00 00 00 00 00 C3
+
+movl $0, 12(%rax)
+. 2134 0x12345678 8
+. C7 40 0C 00 00 00 00 C3
+
+movl $0, 12(%rbx)
+. 2135 0x12345678 8
+. C7 43 0C 00 00 00 00 C3
+
+movl $0, 12(%rdi)
+. 2136 0x12345678 8
+. C7 47 0C 00 00 00 00 C3
+
+movl $0, 12(%rsp)
+. 2137 0x12345678 9
+. C7 44 24 0C 00 00 00 00 C3
+
+movl $0, 132(%rdi)
+. 2138 0x12345678 11
+. C7 87 84 00 00 00 00 00 00 00 C3
+
+movl $0, 136(%rdi)
+. 2139 0x12345678 11
+. C7 87 88 00 00 00 00 00 00 00 C3
+
+movl $0, 140(%rsp)
+. 2140 0x12345678 12
+. C7 84 24 8C 00 00 00 00 00 00 00 C3
+
+movl $0, 144(%rdi)
+. 2141 0x12345678 11
+. C7 87 90 00 00 00 00 00 00 00 C3
+
+movl $0, 148(%rdi)
+. 2142 0x12345678 11
+. C7 87 94 00 00 00 00 00 00 00 C3
+
+movl $0, 152(%rdi)
+. 2143 0x12345678 11
+. C7 87 98 00 00 00 00 00 00 00 C3
+
+movl $0, 156(%rsp)
+. 2144 0x12345678 12
+. C7 84 24 9C 00 00 00 00 00 00 00 C3
+
+movl $0, 160(%rdi)
+. 2145 0x12345678 11
+. C7 87 A0 00 00 00 00 00 00 00 C3
+
+movl $0, 16(%rbx)
+. 2146 0x12345678 8
+. C7 43 10 00 00 00 00 C3
+
+movl $0, 16(%rdi)
+. 2147 0x12345678 8
+. C7 47 10 00 00 00 00 C3
+
+movl $0, 16(%rsp)
+. 2148 0x12345678 9
+. C7 44 24 10 00 00 00 00 C3
+
+movl $0, 204(%rsp)
+. 2149 0x12345678 12
+. C7 84 24 CC 00 00 00 00 00 00 00 C3
+
+movl $0, 20(%rbx)
+. 2150 0x12345678 8
+. C7 43 14 00 00 00 00 C3
+
+movl $0, 20(%rdi)
+. 2151 0x12345678 8
+. C7 47 14 00 00 00 00 C3
+
+movl $0, 20(%rsp)
+. 2152 0x12345678 9
+. C7 44 24 14 00 00 00 00 C3
+
+movl $0, 24(%rax)
+. 2153 0x12345678 8
+. C7 40 18 00 00 00 00 C3
+
+movl $0, 24(%rdi)
+. 2154 0x12345678 8
+. C7 47 18 00 00 00 00 C3
+
+movl $0, 288(%rsp)
+. 2155 0x12345678 12
+. C7 84 24 20 01 00 00 00 00 00 00 C3
+
+movl $0, 288(%rsp,%rax,4)
+. 2156 0x12345678 12
+. C7 84 84 20 01 00 00 00 00 00 00 C3
+
+movl $0, 28(%rax)
+. 2157 0x12345678 8
+. C7 40 1C 00 00 00 00 C3
+
+movl $0, 28(%rdi)
+. 2158 0x12345678 8
+. C7 47 1C 00 00 00 00 C3
+
+movl $0, 28(%rsp)
+. 2159 0x12345678 9
+. C7 44 24 1C 00 00 00 00 C3
+
+movl $0, 292(%rsp)
+. 2160 0x12345678 12
+. C7 84 24 24 01 00 00 00 00 00 00 C3
+
+movl $0, 32(%rax)
+. 2161 0x12345678 8
+. C7 40 20 00 00 00 00 C3
+
+movl $0, 32(%rdi)
+. 2162 0x12345678 8
+. C7 47 20 00 00 00 00 C3
+
+movl $0, 348(%rsp)
+. 2163 0x12345678 12
+. C7 84 24 5C 01 00 00 00 00 00 00 C3
+
+movl $0, 36(%rdi)
+. 2164 0x12345678 8
+. C7 47 24 00 00 00 00 C3
+
+movl $0, 40(%rax)
+. 2165 0x12345678 8
+. C7 40 28 00 00 00 00 C3
+
+movl $0, 40(%rdi)
+. 2166 0x12345678 8
+. C7 47 28 00 00 00 00 C3
+
+movl $0, 44(%rdi)
+. 2167 0x12345678 8
+. C7 47 2C 00 00 00 00 C3
+
+movl $0, 48(%rax)
+. 2168 0x12345678 8
+. C7 40 30 00 00 00 00 C3
+
+movl $0, 48(%rdi)
+. 2169 0x12345678 8
+. C7 47 30 00 00 00 00 C3
+
+movl $0, 4(%rdi)
+. 2170 0x12345678 8
+. C7 47 04 00 00 00 00 C3
+
+movl $0, 52(%rdi)
+. 2171 0x12345678 8
+. C7 47 34 00 00 00 00 C3
+
+movl $0, 56(%rax)
+. 2172 0x12345678 8
+. C7 40 38 00 00 00 00 C3
+
+movl $0, 56(%rdi)
+. 2173 0x12345678 8
+. C7 47 38 00 00 00 00 C3
+
+movl $0, 56(%rsp)
+. 2174 0x12345678 9
+. C7 44 24 38 00 00 00 00 C3
+
+movl $0, 572(%rsp)
+. 2175 0x12345678 12
+. C7 84 24 3C 02 00 00 00 00 00 00 C3
+
+movl $0, 60(%rdi)
+. 2176 0x12345678 8
+. C7 47 3C 00 00 00 00 C3
+
+movl $0, 64(%rdi)
+. 2177 0x12345678 8
+. C7 47 40 00 00 00 00 C3
+
+movl $0, 68(%rdi)
+. 2178 0x12345678 8
+. C7 47 44 00 00 00 00 C3
+
+movl $0, 72(%rdi)
+. 2179 0x12345678 8
+. C7 47 48 00 00 00 00 C3
+
+movl $0, 76(%rdi)
+. 2180 0x12345678 8
+. C7 47 4C 00 00 00 00 C3
+
+movl $0, 80(%rdi)
+. 2181 0x12345678 8
+. C7 47 50 00 00 00 00 C3
+
+movl $0, 84(%rdi)
+. 2182 0x12345678 8
+. C7 47 54 00 00 00 00 C3
+
+movl $0, 88(%rdi)
+. 2183 0x12345678 8
+. C7 47 58 00 00 00 00 C3
+
+movl $0, 8(%rbx,%rax)
+. 2184 0x12345678 9
+. C7 44 03 08 00 00 00 00 C3
+
+movl $0, 8(%rbx,%rdx)
+. 2185 0x12345678 9
+. C7 44 13 08 00 00 00 00 C3
+
+movl $0, 8(%rdi)
+. 2186 0x12345678 8
+. C7 47 08 00 00 00 00 C3
+
+movl $0, 8(%rsi,%rdx)
+. 2187 0x12345678 9
+. C7 44 16 08 00 00 00 00 C3
+
+movl $0, 8(%rsp)
+. 2188 0x12345678 9
+. C7 44 24 08 00 00 00 00 C3
+
+movl $0, 92(%rdi)
+. 2189 0x12345678 8
+. C7 47 5C 00 00 00 00 C3
+
+movl $0, 96(%rdi)
+. 2190 0x12345678 8
+. C7 47 60 00 00 00 00 C3
+
+movl 0, %eax
+. 2191 0x12345678 8
+. 8B 04 25 00 00 00 00 C3
+
+movl $10000, %esi
+. 2192 0x12345678 6
+. BE 10 27 00 00 C3
+
+movl $1005, %edx
+. 2193 0x12345678 6
+. BA ED 03 00 00 C3
+
+movl $1006, %edx
+. 2194 0x12345678 6
+. BA EE 03 00 00 C3
+
+movl $100, %eax
+. 2195 0x12345678 6
+. B8 64 00 00 00 C3
+
+movl 100(%rsp), %edi
+. 2196 0x12345678 5
+. 8B 7C 24 64 C3
+
+movl 100(%rsp), %edx
+. 2197 0x12345678 5
+. 8B 54 24 64 C3
+
+movl 100(%rsp), %esi
+. 2198 0x12345678 5
+. 8B 74 24 64 C3
+
+movl $1013, %edx
+. 2199 0x12345678 6
+. BA F5 03 00 00 C3
+
+movl $10, 20(%rdi)
+. 2200 0x12345678 8
+. C7 47 14 0A 00 00 00 C3
+
+movl $1023, %edx
+. 2201 0x12345678 6
+. BA FF 03 00 00 C3
+
+movl $1024, %edi
+. 2202 0x12345678 6
+. BF 00 04 00 00 C3
+
+movl 1024(%rsp), %eax
+. 2203 0x12345678 8
+. 8B 84 24 00 04 00 00 C3
+
+movl $-1025, %edi
+. 2204 0x12345678 6
+. BF FF FB FF FF C3
+
+movl $1028, %edx
+. 2205 0x12345678 6
+. BA 04 04 00 00 C3
+
+movl $1029, %edx
+. 2206 0x12345678 6
+. BA 05 04 00 00 C3
+
+movl $10300, %edx
+. 2207 0x12345678 6
+. BA 3C 28 00 00 C3
+
+movl $1031, %edx
+. 2208 0x12345678 6
+. BA 07 04 00 00 C3
+
+movl $1034, %edx
+. 2209 0x12345678 6
+. BA 0A 04 00 00 C3
+
+movl $1035, %edx
+. 2210 0x12345678 6
+. BA 0B 04 00 00 C3
+
+movl $10377, %edx
+. 2211 0x12345678 6
+. BA 89 28 00 00 C3
+
+movl $1037, %edx
+. 2212 0x12345678 6
+. BA 0D 04 00 00 C3
+
+movl $10, 40(%rbx)
+. 2213 0x12345678 8
+. C7 43 28 0A 00 00 00 C3
+
+movl $1041, %edx
+. 2214 0x12345678 6
+. BA 11 04 00 00 C3
+
+movl $1042, %edx
+. 2215 0x12345678 6
+. BA 12 04 00 00 C3
+
+movl $10437, %edx
+. 2216 0x12345678 6
+. BA C5 28 00 00 C3
+
+movl $1043, %edx
+. 2217 0x12345678 6
+. BA 13 04 00 00 C3
+
+movl $10456, %edx
+. 2218 0x12345678 6
+. BA D8 28 00 00 C3
+
+movl $10496, %edx
+. 2219 0x12345678 6
+. BA 00 29 00 00 C3
+
+movl $104, %eax
+. 2220 0x12345678 6
+. B8 68 00 00 00 C3
+
+movl $104, %edx
+. 2221 0x12345678 6
+. BA 68 00 00 00 C3
+
+movl 104(%rsp), %ecx
+. 2222 0x12345678 5
+. 8B 4C 24 68 C3
+
+movl 104(%rsp), %edi
+. 2223 0x12345678 5
+. 8B 7C 24 68 C3
+
+movl 104(%rsp), %edx
+. 2224 0x12345678 5
+. 8B 54 24 68 C3
+
+movl 104(%rsp), %esi
+. 2225 0x12345678 5
+. 8B 74 24 68 C3
+
+movl 104(%rsp), %r8d
+. 2226 0x12345678 6
+. 44 8B 44 24 68 C3
+
+movl 104(%rsp), %r9d
+. 2227 0x12345678 6
+. 44 8B 4C 24 68 C3
+
+movl $10549, %edx
+. 2228 0x12345678 6
+. BA 35 29 00 00 C3
+
+movl $1054, %edx
+. 2229 0x12345678 6
+. BA 1E 04 00 00 C3
+
+movl $1055, %edx
+. 2230 0x12345678 6
+. BA 1F 04 00 00 C3
+
+movl $105, %edx
+. 2231 0x12345678 6
+. BA 69 00 00 00 C3
+
+movl $106, %edx
+. 2232 0x12345678 6
+. BA 6A 00 00 00 C3
+
+movl $10703, %edx
+. 2233 0x12345678 6
+. BA CF 29 00 00 C3
+
+movl $1073741824, %eax
+. 2234 0x12345678 6
+. B8 00 00 00 40 C3
+
+movl $1073741824, %edi
+. 2235 0x12345678 6
+. BF 00 00 00 40 C3
+
+movl $1073741824, %esi
+. 2236 0x12345678 6
+. BE 00 00 00 40 C3
+
+movl $1073741825, %eax
+. 2237 0x12345678 6
+. B8 01 00 00 40 C3
+
+movl $1073741826, %eax
+. 2238 0x12345678 6
+. B8 02 00 00 40 C3
+
+movl $1073741827, %eax
+. 2239 0x12345678 6
+. B8 03 00 00 40 C3
+
+movl $1073741828, %eax
+. 2240 0x12345678 6
+. B8 04 00 00 40 C3
+
+movl $1073741829, %eax
+. 2241 0x12345678 6
+. B8 05 00 00 40 C3
+
+movl $1073741830, %eax
+. 2242 0x12345678 6
+. B8 06 00 00 40 C3
+
+movl $1073741831, %eax
+. 2243 0x12345678 6
+. B8 07 00 00 40 C3
+
+movl $1073741832, %eax
+. 2244 0x12345678 6
+. B8 08 00 00 40 C3
+
+movl $1073741833, %eax
+. 2245 0x12345678 6
+. B8 09 00 00 40 C3
+
+movl $1073741834, %eax
+. 2246 0x12345678 6
+. B8 0A 00 00 40 C3
+
+movl $1073741835, %eax
+. 2247 0x12345678 6
+. B8 0B 00 00 40 C3
+
+movl $1073741836, %eax
+. 2248 0x12345678 6
+. B8 0C 00 00 40 C3
+
+movl $1073741837, %eax
+. 2249 0x12345678 6
+. B8 0D 00 00 40 C3
+
+movl $1073741838, %eax
+. 2250 0x12345678 6
+. B8 0E 00 00 40 C3
+
+movl $1073741839, %eax
+. 2251 0x12345678 6
+. B8 0F 00 00 40 C3
+
+movl $107, %edx
+. 2252 0x12345678 6
+. BA 6B 00 00 00 C3
+
+movl $108, 40(%rbx)
+. 2253 0x12345678 8
+. C7 43 28 6C 00 00 00 C3
+
+movl $10895, %edx
+. 2254 0x12345678 6
+. BA 8F 2A 00 00 C3
+
+movl $108, %eax
+. 2255 0x12345678 6
+. B8 6C 00 00 00 C3
+
+movl $108, %edx
+. 2256 0x12345678 6
+. BA 6C 00 00 00 C3
+
+movl 108(%rsp), %eax
+. 2257 0x12345678 5
+. 8B 44 24 6C C3
+
+movl 108(%rsp), %ebp
+. 2258 0x12345678 5
+. 8B 6C 24 6C C3
+
+movl 108(%rsp), %ecx
+. 2259 0x12345678 5
+. 8B 4C 24 6C C3
+
+movl 108(%rsp), %edi
+. 2260 0x12345678 5
+. 8B 7C 24 6C C3
+
+movl 108(%rsp), %edx
+. 2261 0x12345678 5
+. 8B 54 24 6C C3
+
+movl $10911, %edx
+. 2262 0x12345678 6
+. BA 9F 2A 00 00 C3
+
+movl $10921, %edx
+. 2263 0x12345678 6
+. BA A9 2A 00 00 C3
+
+movl $10922, %edx
+. 2264 0x12345678 6
+. BA AA 2A 00 00 C3
+
+movl $10998, %edx
+. 2265 0x12345678 6
+. BA F6 2A 00 00 C3
+
+movl $10, %eax
+. 2266 0x12345678 6
+. B8 0A 00 00 00 C3
+
+movl $10, %edi
+. 2267 0x12345678 6
+. BF 0A 00 00 00 C3
+
+movl $10, %edx
+. 2268 0x12345678 6
+. BA 0A 00 00 00 C3
+
+movl $10, %r14d
+. 2269 0x12345678 7
+. 41 BE 0A 00 00 00 C3
+
+movl $10, (%rax)
+. 2270 0x12345678 7
+. C7 00 0A 00 00 00 C3
+
+movl $11000, %edx
+. 2271 0x12345678 6
+. BA F8 2A 00 00 C3
+
+movl $1100, %edx
+. 2272 0x12345678 6
+. BA 4C 04 00 00 C3
+
+movl $1101, %edx
+. 2273 0x12345678 6
+. BA 4D 04 00 00 C3
+
+movl $11046, %edx
+. 2274 0x12345678 6
+. BA 26 2B 00 00 C3
+
+movl $1, 104(%rsp)
+. 2275 0x12345678 9
+. C7 44 24 68 01 00 00 00 C3
+
+movl $11073, %edx
+. 2276 0x12345678 6
+. BA 41 2B 00 00 C3
+
+movl $11074, %edx
+. 2277 0x12345678 6
+. BA 42 2B 00 00 C3
+
+movl $1, 108(%rsp)
+. 2278 0x12345678 9
+. C7 44 24 6C 01 00 00 00 C3
+
+movl $110, %edx
+. 2279 0x12345678 6
+. BA 6E 00 00 00 C3
+
+movl $1110, %edx
+. 2280 0x12345678 6
+. BA 56 04 00 00 C3
+
+movl $111, %edx
+. 2281 0x12345678 6
+. BA 6F 00 00 00 C3
+
+movl $11204, %edx
+. 2282 0x12345678 6
+. BA C4 2B 00 00 C3
+
+movl $11220, %edx
+. 2283 0x12345678 6
+. BA D4 2B 00 00 C3
+
+movl $11225, %edx
+. 2284 0x12345678 6
+. BA D9 2B 00 00 C3
+
+movl $1123, %edx
+. 2285 0x12345678 6
+. BA 63 04 00 00 C3
+
+movl $11257, %edx
+. 2286 0x12345678 6
+. BA F9 2B 00 00 C3
+
+movl $112, %eax
+. 2287 0x12345678 6
+. B8 70 00 00 00 C3
+
+movl $112, %edx
+. 2288 0x12345678 6
+. BA 70 00 00 00 C3
+
+movl $-1, 12(%rbx,%rax)
+. 2289 0x12345678 9
+. C7 44 03 0C FF FF FF FF C3
+
+movl $-1, 12(%rcx,%rax)
+. 2290 0x12345678 9
+. C7 44 01 0C FF FF FF FF C3
+
+movl $-1, 12(%rsi,%rdx)
+. 2291 0x12345678 9
+. C7 44 16 0C FF FF FF FF C3
+
+movl 112(%rsp), %edi
+. 2292 0x12345678 5
+. 8B 7C 24 70 C3
+
+movl $1136, %edx
+. 2293 0x12345678 6
+. BA 70 04 00 00 C3
+
+movl $113, %eax
+. 2294 0x12345678 6
+. B8 71 00 00 00 C3
+
+movl $113, %edx
+. 2295 0x12345678 6
+. BA 71 00 00 00 C3
+
+movl $11458, %edx
+. 2296 0x12345678 6
+. BA C2 2C 00 00 C3
+
+movl $114, %edx
+. 2297 0x12345678 6
+. BA 72 00 00 00 C3
+
+movl $11584, %edx
+. 2298 0x12345678 6
+. BA 40 2D 00 00 C3
+
+movl $11596, %edx
+. 2299 0x12345678 6
+. BA 4C 2D 00 00 C3
+
+movl $1159, %edx
+. 2300 0x12345678 6
+. BA 87 04 00 00 C3
+
+movl $115, %edx
+. 2301 0x12345678 6
+. BA 73 00 00 00 C3
+
+movl $11681, %edx
+. 2302 0x12345678 6
+. BA A1 2D 00 00 C3
+
+movl $116, %eax
+. 2303 0x12345678 6
+. B8 74 00 00 00 C3
+
+movl $116, %edx
+. 2304 0x12345678 6
+. BA 74 00 00 00 C3
+
+movl $-1, 16(%rsp)
+. 2305 0x12345678 9
+. C7 44 24 10 FF FF FF FF C3
+
+movl $1, 16(%rsp)
+. 2306 0x12345678 9
+. C7 44 24 10 01 00 00 00 C3
+
+movl 116(%rsp), %ebx
+. 2307 0x12345678 5
+. 8B 5C 24 74 C3
+
+movl 116(%rsp), %edi
+. 2308 0x12345678 5
+. 8B 7C 24 74 C3
+
+movl 116(%rsp), %edx
+. 2309 0x12345678 5
+. 8B 54 24 74 C3
+
+movl $1172, %edx
+. 2310 0x12345678 6
+. BA 94 04 00 00 C3
+
+movl $117, %edx
+. 2311 0x12345678 6
+. BA 75 00 00 00 C3
+
+movl $118, %edx
+. 2312 0x12345678 6
+. BA 76 00 00 00 C3
+
+movl $119, %eax
+. 2313 0x12345678 6
+. B8 77 00 00 00 C3
+
+movl $11, %edi
+. 2314 0x12345678 6
+. BF 0B 00 00 00 C3
+
+movl $11, %r14d
+. 2315 0x12345678 7
+. 41 BE 0B 00 00 00 C3
+
+movl $11, (%rax)
+. 2316 0x12345678 7
+. C7 00 0B 00 00 00 C3
+
+movl $120, 12(%rdi)
+. 2317 0x12345678 8
+. C7 47 0C 78 00 00 00 C3
+
+movl $1205, %edx
+. 2318 0x12345678 6
+. BA B5 04 00 00 C3
+
+movl $120, %eax
+. 2319 0x12345678 6
+. B8 78 00 00 00 C3
+
+movl $120, %edi
+. 2320 0x12345678 6
+. BF 78 00 00 00 C3
+
+movl $-1, 20(%rax)
+. 2321 0x12345678 8
+. C7 40 14 FF FF FF FF C3
+
+movl $-1, 20(%rsp)
+. 2322 0x12345678 9
+. C7 44 24 14 FF FF FF FF C3
+
+movl 120(%rsp), %eax
+. 2323 0x12345678 5
+. 8B 44 24 78 C3
+
+movl 120(%rsp), %ecx
+. 2324 0x12345678 5
+. 8B 4C 24 78 C3
+
+movl 120(%rsp), %edx
+. 2325 0x12345678 5
+. 8B 54 24 78 C3
+
+movl $1213, %edx
+. 2326 0x12345678 6
+. BA BD 04 00 00 C3
+
+movl $1214, %edx
+. 2327 0x12345678 6
+. BA BE 04 00 00 C3
+
+movl $121, %edx
+. 2328 0x12345678 6
+. BA 79 00 00 00 C3
+
+movl $1222, %edx
+. 2329 0x12345678 6
+. BA C6 04 00 00 C3
+
+movl $1229, %edx
+. 2330 0x12345678 6
+. BA CD 04 00 00 C3
+
+movl $1239, %edx
+. 2331 0x12345678 6
+. BA D7 04 00 00 C3
+
+movl $124, %eax
+. 2332 0x12345678 6
+. B8 7C 00 00 00 C3
+
+movl $-1, 24(%rax)
+. 2333 0x12345678 8
+. C7 40 18 FF FF FF FF C3
+
+movl $1, 24(%rdx)
+. 2334 0x12345678 8
+. C7 42 18 01 00 00 00 C3
+
+movl 124(%rsp), %eax
+. 2335 0x12345678 5
+. 8B 44 24 7C C3
+
+movl 124(%rsp), %ebx
+. 2336 0x12345678 5
+. 8B 5C 24 7C C3
+
+movl 124(%rsp), %ecx
+. 2337 0x12345678 5
+. 8B 4C 24 7C C3
+
+movl 124(%rsp), %edi
+. 2338 0x12345678 5
+. 8B 7C 24 7C C3
+
+movl 124(%rsp), %esi
+. 2339 0x12345678 5
+. 8B 74 24 7C C3
+
+movl 124(%rsp), %r13d
+. 2340 0x12345678 6
+. 44 8B 6C 24 7C C3
+
+movl $1250, %edx
+. 2341 0x12345678 6
+. BA E2 04 00 00 C3
+
+movl $1251, %edx
+. 2342 0x12345678 6
+. BA E3 04 00 00 C3
+
+movl $1252, %edx
+. 2343 0x12345678 6
+. BA E4 04 00 00 C3
+
+movl $12, 68(%rax)
+. 2344 0x12345678 8
+. C7 40 44 0C 00 00 00 C3
+
+movl $127, %r10d
+. 2345 0x12345678 7
+. 41 BA 7F 00 00 00 C3
+
+movl $127, %r9d
+. 2346 0x12345678 7
+. 41 B9 7F 00 00 00 C3
+
+movl $128, 120(%rbx)
+. 2347 0x12345678 8
+. C7 43 78 80 00 00 00 C3
+
+movl $1281, %edx
+. 2348 0x12345678 6
+. BA 01 05 00 00 C3
+
+movl $128, 68(%rbx)
+. 2349 0x12345678 8
+. C7 43 44 80 00 00 00 C3
+
+movl $128, 72(%rsp)
+. 2350 0x12345678 9
+. C7 44 24 48 80 00 00 00 C3
+
+movl $128, 80(%rax)
+. 2351 0x12345678 8
+. C7 40 50 80 00 00 00 C3
+
+movl $128, 80(%rbx)
+. 2352 0x12345678 8
+. C7 43 50 80 00 00 00 C3
+
+movl $1288, %edx
+. 2353 0x12345678 6
+. BA 08 05 00 00 C3
+
+movl $1289, %edx
+. 2354 0x12345678 6
+. BA 09 05 00 00 C3
+
+movl $-128, %ecx
+. 2355 0x12345678 6
+. B9 80 FF FF FF C3
+
+movl $128, %edi
+. 2356 0x12345678 6
+. BF 80 00 00 00 C3
+
+movl $-128, %r10d
+. 2357 0x12345678 7
+. 41 BA 80 FF FF FF C3
+
+movl $1, 28(%rsp)
+. 2358 0x12345678 9
+. C7 44 24 1C 01 00 00 00 C3
+
+movl 128(%rsp), %edi
+. 2359 0x12345678 8
+. 8B BC 24 80 00 00 00 C3
+
+movl $12, %eax
+. 2360 0x12345678 6
+. B8 0C 00 00 00 C3
+
+movl $12, %edi
+. 2361 0x12345678 6
+. BF 0C 00 00 00 C3
+
+movl $12, %r13d
+. 2362 0x12345678 7
+. 41 BD 0C 00 00 00 C3
+
+movl $12, %r14d
+. 2363 0x12345678 7
+. 41 BE 0C 00 00 00 C3
+
+movl 12(%r8), %eax
+. 2364 0x12345678 5
+. 41 8B 40 0C C3
+
+movl $12, (%rax)
+. 2365 0x12345678 7
+. C7 00 0C 00 00 00 C3
+
+movl 12(%rax), %eax
+. 2366 0x12345678 4
+. 8B 40 0C C3
+
+movl 12(%rax), %ebx
+. 2367 0x12345678 4
+. 8B 58 0C C3
+
+movl 12(%rax), %ecx
+. 2368 0x12345678 4
+. 8B 48 0C C3
+
+movl 12(%rax), %esi
+. 2369 0x12345678 4
+. 8B 70 0C C3
+
+movl 12(%rax,%rdi), %ecx
+. 2370 0x12345678 5
+. 8B 4C 38 0C C3
+
+movl 12(%rax,%rdi), %r13d
+. 2371 0x12345678 6
+. 44 8B 6C 38 0C C3
+
+movl 12(%rax,%rdx), %esi
+. 2372 0x12345678 5
+. 8B 74 10 0C C3
+
+movl 12(%rbp), %ebx
+. 2373 0x12345678 4
+. 8B 5D 0C C3
+
+movl 12(%rbp), %edi
+. 2374 0x12345678 4
+. 8B 7D 0C C3
+
+movl 12(%rbp), %edx
+. 2375 0x12345678 4
+. 8B 55 0C C3
+
+movl 12(%rbx), %eax
+. 2376 0x12345678 4
+. 8B 43 0C C3
+
+movl 12(%rbx), %ecx
+. 2377 0x12345678 4
+. 8B 4B 0C C3
+
+movl 12(%rbx), %edi
+. 2378 0x12345678 4
+. 8B 7B 0C C3
+
+movl 12(%rbx), %edx
+. 2379 0x12345678 4
+. 8B 53 0C C3
+
+movl 12(%rbx,%rdx), %esi
+. 2380 0x12345678 5
+. 8B 74 13 0C C3
+
+movl 12(%rdi), %edx
+. 2381 0x12345678 4
+. 8B 57 0C C3
+
+movl 12(%rdi), %esi
+. 2382 0x12345678 4
+. 8B 77 0C C3
+
+movl 12(%rdi,%rdx), %ebp
+. 2383 0x12345678 5
+. 8B 6C 17 0C C3
+
+movl 12(%rdx), %ecx
+. 2384 0x12345678 4
+. 8B 4A 0C C3
+
+movl 12(%rdx), %esi
+. 2385 0x12345678 4
+. 8B 72 0C C3
+
+movl 12(%rdx,%r13), %eax
+. 2386 0x12345678 6
+. 42 8B 44 2A 0C C3
+
+movl 12(%rsi), %eax
+. 2387 0x12345678 4
+. 8B 46 0C C3
+
+movl 12(%rsi,%rcx), %eax
+. 2388 0x12345678 5
+. 8B 44 0E 0C C3
+
+movl 12(%rsp), %eax
+. 2389 0x12345678 5
+. 8B 44 24 0C C3
+
+movl 12(%rsp), %ecx
+. 2390 0x12345678 5
+. 8B 4C 24 0C C3
+
+movl 12(%rsp), %edi
+. 2391 0x12345678 5
+. 8B 7C 24 0C C3
+
+movl 12(%rsp), %edx
+. 2392 0x12345678 5
+. 8B 54 24 0C C3
+
+movl 12(%rsp), %esi
+. 2393 0x12345678 5
+. 8B 74 24 0C C3
+
+movl $1306, %edx
+. 2394 0x12345678 6
+. BA 1A 05 00 00 C3
+
+movl $1307, %edx
+. 2395 0x12345678 6
+. BA 1B 05 00 00 C3
+
+movl $1313, %edx
+. 2396 0x12345678 6
+. BA 21 05 00 00 C3
+
+movl $1321, %edx
+. 2397 0x12345678 6
+. BA 29 05 00 00 C3
+
+movl $1324, %edx
+. 2398 0x12345678 6
+. BA 2C 05 00 00 C3
+
+movl $1327, %edx
+. 2399 0x12345678 6
+. BA 2F 05 00 00 C3
+
+movl $132, %edi
+. 2400 0x12345678 6
+. BF 84 00 00 00 C3
+
+movl $-1, 32(%rsp)
+. 2401 0x12345678 9
+. C7 44 24 20 FF FF FF FF C3
+
+movl 132(%rsp), %edi
+. 2402 0x12345678 8
+. 8B BC 24 84 00 00 00 C3
+
+movl $1338, %edx
+. 2403 0x12345678 6
+. BA 3A 05 00 00 C3
+
+movl $1343, %edx
+. 2404 0x12345678 6
+. BA 3F 05 00 00 C3
+
+movl $1344, %edx
+. 2405 0x12345678 6
+. BA 40 05 00 00 C3
+
+movl $1345, %edx
+. 2406 0x12345678 6
+. BA 41 05 00 00 C3
+
+movl $1347, %edx
+. 2407 0x12345678 6
+. BA 43 05 00 00 C3
+
+movl $1, 348(%rsp)
+. 2408 0x12345678 12
+. C7 84 24 5C 01 00 00 01 00 00 00 C3
+
+movl $1350, %edx
+. 2409 0x12345678 6
+. BA 46 05 00 00 C3
+
+movl $136, 80(%rbx)
+. 2410 0x12345678 8
+. C7 43 50 88 00 00 00 C3
+
+movl $136, 92(%rax)
+. 2411 0x12345678 8
+. C7 40 5C 88 00 00 00 C3
+
+movl $136, 92(%rbx)
+. 2412 0x12345678 8
+. C7 43 5C 88 00 00 00 C3
+
+movl $136, %edi
+. 2413 0x12345678 6
+. BF 88 00 00 00 C3
+
+movl $136, %edx
+. 2414 0x12345678 6
+. BA 88 00 00 00 C3
+
+movl 136(%rsp), %ebx
+. 2415 0x12345678 8
+. 8B 9C 24 88 00 00 00 C3
+
+movl 136(%rsp), %ecx
+. 2416 0x12345678 8
+. 8B 8C 24 88 00 00 00 C3
+
+movl 136(%rsp), %edi
+. 2417 0x12345678 8
+. 8B BC 24 88 00 00 00 C3
+
+movl $-1, 376(%rsp)
+. 2418 0x12345678 12
+. C7 84 24 78 01 00 00 FF FF FF FF C3
+
+movl $-1, 380(%rsp)
+. 2419 0x12345678 12
+. C7 84 24 7C 01 00 00 FF FF FF FF C3
+
+movl $-1, 384(%rsp)
+. 2420 0x12345678 12
+. C7 84 24 80 01 00 00 FF FF FF FF C3
+
+movl $1388, %edx
+. 2421 0x12345678 6
+. BA 6C 05 00 00 C3
+
+movl $-1, 388(%rsp)
+. 2422 0x12345678 12
+. C7 84 24 84 01 00 00 FF FF FF FF C3
+
+movl $-1, 392(%rsp)
+. 2423 0x12345678 12
+. C7 84 24 88 01 00 00 FF FF FF FF C3
+
+movl $-1, 396(%rsp)
+. 2424 0x12345678 12
+. C7 84 24 8C 01 00 00 FF FF FF FF C3
+
+movl $13, %eax
+. 2425 0x12345678 6
+. B8 0D 00 00 00 C3
+
+movl $13, %r14d
+. 2426 0x12345678 7
+. 41 BE 0D 00 00 00 C3
+
+movl $13, (%rax)
+. 2427 0x12345678 7
+. C7 00 0D 00 00 00 C3
+
+movl $-1, 400(%rsp)
+. 2428 0x12345678 12
+. C7 84 24 90 01 00 00 FF FF FF FF C3
+
+movl $140, 104(%rax)
+. 2429 0x12345678 8
+. C7 40 68 8C 00 00 00 C3
+
+movl $140, 104(%rbx)
+. 2430 0x12345678 8
+. C7 43 68 8C 00 00 00 C3
+
+movl $-1, 404(%rsp)
+. 2431 0x12345678 12
+. C7 84 24 94 01 00 00 FF FF FF FF C3
+
+movl $1407, %edx
+. 2432 0x12345678 6
+. BA 7F 05 00 00 C3
+
+movl $-1, 408(%rsp)
+. 2433 0x12345678 12
+. C7 84 24 98 01 00 00 FF FF FF FF C3
+
+movl $140, 92(%rbx)
+. 2434 0x12345678 8
+. C7 43 5C 8C 00 00 00 C3
+
+movl $140, %edi
+. 2435 0x12345678 6
+. BF 8C 00 00 00 C3
+
+movl 140(%rsp), %eax
+. 2436 0x12345678 8
+. 8B 84 24 8C 00 00 00 C3
+
+movl 140(%rsp), %ecx
+. 2437 0x12345678 8
+. 8B 8C 24 8C 00 00 00 C3
+
+movl 140(%rsp), %edi
+. 2438 0x12345678 8
+. 8B BC 24 8C 00 00 00 C3
+
+movl 140(%rsp), %edx
+. 2439 0x12345678 8
+. 8B 94 24 8C 00 00 00 C3
+
+movl $-1, 412(%rsp)
+. 2440 0x12345678 12
+. C7 84 24 9C 01 00 00 FF FF FF FF C3
+
+movl $-1, 416(%rsp)
+. 2441 0x12345678 12
+. C7 84 24 A0 01 00 00 FF FF FF FF C3
+
+movl $-1, 420(%rsp)
+. 2442 0x12345678 12
+. C7 84 24 A4 01 00 00 FF FF FF FF C3
+
+movl $1421, %edx
+. 2443 0x12345678 6
+. BA 8D 05 00 00 C3
+
+movl $1422, %edx
+. 2444 0x12345678 6
+. BA 8E 05 00 00 C3
+
+movl $1423, %edx
+. 2445 0x12345678 6
+. BA 8F 05 00 00 C3
+
+movl $1424, %edx
+. 2446 0x12345678 6
+. BA 90 05 00 00 C3
+
+movl $-1, 424(%rsp)
+. 2447 0x12345678 12
+. C7 84 24 A8 01 00 00 FF FF FF FF C3
+
+movl $-1, 428(%rsp)
+. 2448 0x12345678 12
+. C7 84 24 AC 01 00 00 FF FF FF FF C3
+
+movl $-1, 432(%rsp)
+. 2449 0x12345678 12
+. C7 84 24 B0 01 00 00 FF FF FF FF C3
+
+movl $-1, 436(%rsp)
+. 2450 0x12345678 12
+. C7 84 24 B4 01 00 00 FF FF FF FF C3
+
+movl $-1, 440(%rsp)
+. 2451 0x12345678 12
+. C7 84 24 B8 01 00 00 FF FF FF FF C3
+
+movl $144, 128(%rbx)
+. 2452 0x12345678 11
+. C7 83 80 00 00 00 90 00 00 00 C3
+
+movl $-1, 444(%rsp)
+. 2453 0x12345678 12
+. C7 84 24 BC 01 00 00 FF FF FF FF C3
+
+movl $-1, 448(%rsp)
+. 2454 0x12345678 12
+. C7 84 24 C0 01 00 00 FF FF FF FF C3
+
+movl $144, %edi
+. 2455 0x12345678 6
+. BF 90 00 00 00 C3
+
+movl 144(%rdi), %esi
+. 2456 0x12345678 7
+. 8B B7 90 00 00 00 C3
+
+movl 144(%rsp), %edi
+. 2457 0x12345678 8
+. 8B BC 24 90 00 00 00 C3
+
+movl $1450, %edx
+. 2458 0x12345678 6
+. BA AA 05 00 00 C3
+
+movl $-1, 452(%rsp)
+. 2459 0x12345678 12
+. C7 84 24 C4 01 00 00 FF FF FF FF C3
+
+movl $1459, %edx
+. 2460 0x12345678 6
+. BA B3 05 00 00 C3
+
+movl $145, %edx
+. 2461 0x12345678 6
+. BA 91 00 00 00 C3
+
+movl $-1, 460(%rsp)
+. 2462 0x12345678 12
+. C7 84 24 CC 01 00 00 FF FF FF FF C3
+
+movl $-1, 464(%rsp)
+. 2463 0x12345678 12
+. C7 84 24 D0 01 00 00 FF FF FF FF C3
+
+movl $-1, 468(%rsp)
+. 2464 0x12345678 12
+. C7 84 24 D4 01 00 00 FF FF FF FF C3
+
+movl $-1, 472(%rsp)
+. 2465 0x12345678 12
+. C7 84 24 D8 01 00 00 FF FF FF FF C3
+
+movl $-1, 476(%rsp)
+. 2466 0x12345678 12
+. C7 84 24 DC 01 00 00 FF FF FF FF C3
+
+movl $-1, 480(%rsp)
+. 2467 0x12345678 12
+. C7 84 24 E0 01 00 00 FF FF FF FF C3
+
+movl $148, 116(%rbx)
+. 2468 0x12345678 8
+. C7 43 74 94 00 00 00 C3
+
+movl $-1, 484(%rsp)
+. 2469 0x12345678 12
+. C7 84 24 E4 01 00 00 FF FF FF FF C3
+
+movl $-1, 488(%rsp)
+. 2470 0x12345678 12
+. C7 84 24 E8 01 00 00 FF FF FF FF C3
+
+movl $148, %eax
+. 2471 0x12345678 6
+. B8 94 00 00 00 C3
+
+movl $148, %edi
+. 2472 0x12345678 6
+. BF 94 00 00 00 C3
+
+movl 148(%rsp), %ecx
+. 2473 0x12345678 8
+. 8B 8C 24 94 00 00 00 C3
+
+movl 148(%rsp), %edi
+. 2474 0x12345678 8
+. 8B BC 24 94 00 00 00 C3
+
+movl $1490, %edx
+. 2475 0x12345678 6
+. BA D2 05 00 00 C3
+
+movl $-1, 492(%rsp)
+. 2476 0x12345678 12
+. C7 84 24 EC 01 00 00 FF FF FF FF C3
+
+movl $-1, 496(%rsp)
+. 2477 0x12345678 12
+. C7 84 24 F0 01 00 00 FF FF FF FF C3
+
+movl $14, %edi
+. 2478 0x12345678 6
+. BF 0E 00 00 00 C3
+
+movl $14, %r14d
+. 2479 0x12345678 7
+. 41 BE 0E 00 00 00 C3
+
+movl $-1, 500(%rsp)
+. 2480 0x12345678 12
+. C7 84 24 F4 01 00 00 FF FF FF FF C3
+
+movl $-1, 504(%rsp)
+. 2481 0x12345678 12
+. C7 84 24 F8 01 00 00 FF FF FF FF C3
+
+movl $-1, 508(%rsp)
+. 2482 0x12345678 12
+. C7 84 24 FC 01 00 00 FF FF FF FF C3
+
+movl $-1, 512(%rsp)
+. 2483 0x12345678 12
+. C7 84 24 00 02 00 00 FF FF FF FF C3
+
+movl $-1, 516(%rsp)
+. 2484 0x12345678 12
+. C7 84 24 04 02 00 00 FF FF FF FF C3
+
+movl $151, %edx
+. 2485 0x12345678 6
+. BA 97 00 00 00 C3
+
+movl $-1, 520(%rsp)
+. 2486 0x12345678 12
+. C7 84 24 08 02 00 00 FF FF FF FF C3
+
+movl $-1, 524(%rsp)
+. 2487 0x12345678 12
+. C7 84 24 0C 02 00 00 FF FF FF FF C3
+
+movl $-1, 528(%rsp)
+. 2488 0x12345678 12
+. C7 84 24 10 02 00 00 FF FF FF FF C3
+
+movl $152, %edi
+. 2489 0x12345678 6
+. BF 98 00 00 00 C3
+
+movl $152, %edx
+. 2490 0x12345678 6
+. BA 98 00 00 00 C3
+
+movl 152(%rsp), %edi
+. 2491 0x12345678 8
+. 8B BC 24 98 00 00 00 C3
+
+movl 152(%rsp), %edx
+. 2492 0x12345678 8
+. 8B 94 24 98 00 00 00 C3
+
+movl $1530, %edx
+. 2493 0x12345678 6
+. BA FA 05 00 00 C3
+
+movl $-1, 532(%rsp)
+. 2494 0x12345678 12
+. C7 84 24 14 02 00 00 FF FF FF FF C3
+
+movl $-1, 536(%rsp)
+. 2495 0x12345678 12
+. C7 84 24 18 02 00 00 FF FF FF FF C3
+
+movl $153, %edx
+. 2496 0x12345678 6
+. BA 99 00 00 00 C3
+
+movl $156, %edi
+. 2497 0x12345678 6
+. BF 9C 00 00 00 C3
+
+movl 156(%rsp), %eax
+. 2498 0x12345678 8
+. 8B 84 24 9C 00 00 00 C3
+
+movl 156(%rsp), %ecx
+. 2499 0x12345678 8
+. 8B 8C 24 9C 00 00 00 C3
+
+movl 156(%rsp), %edi
+. 2500 0x12345678 8
+. 8B BC 24 9C 00 00 00 C3
+
+movl $157, %edi
+. 2501 0x12345678 6
+. BF 9D 00 00 00 C3
+
+movl $158, %edi
+. 2502 0x12345678 6
+. BF 9E 00 00 00 C3
+
+movl $1590, %edx
+. 2503 0x12345678 6
+. BA 36 06 00 00 C3
+
+movl $15, %eax
+. 2504 0x12345678 6
+. B8 0F 00 00 00 C3
+
+movl $15, %edi
+. 2505 0x12345678 6
+. BF 0F 00 00 00 C3
+
+movl $15, %r14d
+. 2506 0x12345678 7
+. 41 BE 0F 00 00 00 C3
+
+movl $160, %edi
+. 2507 0x12345678 6
+. BF A0 00 00 00 C3
+
+movl $160, %edx
+. 2508 0x12345678 6
+. BA A0 00 00 00 C3
+
+movl 160(%rsp), %edi
+. 2509 0x12345678 8
+. 8B BC 24 A0 00 00 00 C3
+
+movl $161, %edx
+. 2510 0x12345678 6
+. BA A1 00 00 00 C3
+
+movl $163, %edx
+. 2511 0x12345678 6
+. BA A3 00 00 00 C3
+
+movl $164, %eax
+. 2512 0x12345678 6
+. B8 A4 00 00 00 C3
+
+movl $164, %edx
+. 2513 0x12345678 6
+. BA A4 00 00 00 C3
+
+movl 164(%rsp), %edi
+. 2514 0x12345678 8
+. 8B BC 24 A4 00 00 00 C3
+
+movl $16711680, %edi
+. 2515 0x12345678 6
+. BF 00 00 FF 00 C3
+
+movl $168, %edx
+. 2516 0x12345678 6
+. BA A8 00 00 00 C3
+
+movl $1, 68(%rsp)
+. 2517 0x12345678 9
+. C7 44 24 44 01 00 00 00 C3
+
+movl $16, 8(%rsp)
+. 2518 0x12345678 9
+. C7 44 24 08 10 00 00 00 C3
+
+movl 168(%rsp), %esi
+. 2519 0x12345678 8
+. 8B B4 24 A8 00 00 00 C3
+
+movl $16, %eax
+. 2520 0x12345678 6
+. B8 10 00 00 00 C3
+
+movl $16, %edi
+. 2521 0x12345678 6
+. BF 10 00 00 00 C3
+
+movl $16, %edx
+. 2522 0x12345678 6
+. BA 10 00 00 00 C3
+
+movl 16(%r12), %eax
+. 2523 0x12345678 6
+. 41 8B 44 24 10 C3
+
+movl 16(%r12), %esi
+. 2524 0x12345678 6
+. 41 8B 74 24 10 C3
+
+movl $16, %r14d
+. 2525 0x12345678 7
+. 41 BE 10 00 00 00 C3
+
+movl 16(%r8), %eax
+. 2526 0x12345678 5
+. 41 8B 40 10 C3
+
+movl 16(%rbp), %ebx
+. 2527 0x12345678 4
+. 8B 5D 10 C3
+
+movl 16(%rbp), %edi
+. 2528 0x12345678 4
+. 8B 7D 10 C3
+
+movl 16(%rbp), %esi
+. 2529 0x12345678 4
+. 8B 75 10 C3
+
+movl 16(%rbp), %r12d
+. 2530 0x12345678 5
+. 44 8B 65 10 C3
+
+movl 16(%rbp,%rbx,4), %edi
+. 2531 0x12345678 5
+. 8B 7C 9D 10 C3
+
+movl 16(%rbx), %eax
+. 2532 0x12345678 4
+. 8B 43 10 C3
+
+movl 16(%rbx), %edi
+. 2533 0x12345678 4
+. 8B 7B 10 C3
+
+movl 16(%rbx), %esi
+. 2534 0x12345678 4
+. 8B 73 10 C3
+
+movl 16(%rbx,%rbp,4), %eax
+. 2535 0x12345678 5
+. 8B 44 AB 10 C3
+
+movl 16(%rdi), %eax
+. 2536 0x12345678 4
+. 8B 47 10 C3
+
+movl 16(%rdi), %edi
+. 2537 0x12345678 4
+. 8B 7F 10 C3
+
+movl 16(%rdi,%rax,4), %eax
+. 2538 0x12345678 5
+. 8B 44 87 10 C3
+
+movl 16(%rdi,%rax,4), %edx
+. 2539 0x12345678 5
+. 8B 54 87 10 C3
+
+movl 16(%rdx), %eax
+. 2540 0x12345678 4
+. 8B 42 10 C3
+
+movl 16(%rsi), %eax
+. 2541 0x12345678 4
+. 8B 46 10 C3
+
+movl $16, (%rsp)
+. 2542 0x12345678 8
+. C7 04 24 10 00 00 00 C3
+
+movl 16(%rsp), %eax
+. 2543 0x12345678 5
+. 8B 44 24 10 C3
+
+movl 16(%rsp), %ebp
+. 2544 0x12345678 5
+. 8B 6C 24 10 C3
+
+movl -16(%rsp), %ecx
+. 2545 0x12345678 5
+. 8B 4C 24 F0 C3
+
+movl 16(%rsp), %ecx
+. 2546 0x12345678 5
+. 8B 4C 24 10 C3
+
+movl 16(%rsp), %edi
+. 2547 0x12345678 5
+. 8B 7C 24 10 C3
+
+movl -16(%rsp), %edx
+. 2548 0x12345678 5
+. 8B 54 24 F0 C3
+
+movl 16(%rsp), %edx
+. 2549 0x12345678 5
+. 8B 54 24 10 C3
+
+movl 16(%rsp), %esi
+. 2550 0x12345678 5
+. 8B 74 24 10 C3
+
+movl 16(%rsp), %r15d
+. 2551 0x12345678 6
+. 44 8B 7C 24 10 C3
+
+movl 16(%rsp), %r8d
+. 2552 0x12345678 6
+. 44 8B 44 24 10 C3
+
+movl $172, 68(%rsp)
+. 2553 0x12345678 9
+. C7 44 24 44 AC 00 00 00 C3
+
+movl 172(%rsp), %edi
+. 2554 0x12345678 8
+. 8B BC 24 AC 00 00 00 C3
+
+movl $1752, %edx
+. 2555 0x12345678 6
+. BA D8 06 00 00 C3
+
+movl $1758, %edx
+. 2556 0x12345678 6
+. BA DE 06 00 00 C3
+
+movl $1764, %edx
+. 2557 0x12345678 6
+. BA E4 06 00 00 C3
+
+movl $17664, %edi
+. 2558 0x12345678 6
+. BF 00 45 00 00 C3
+
+movl $176, 68(%rsp)
+. 2559 0x12345678 9
+. C7 44 24 44 B0 00 00 00 C3
+
+movl 176(%rsp), %ecx
+. 2560 0x12345678 8
+. 8B 8C 24 B0 00 00 00 C3
+
+movl 176(%rsp), %edi
+. 2561 0x12345678 8
+. 8B BC 24 B0 00 00 00 C3
+
+movl $1770, %edx
+. 2562 0x12345678 6
+. BA EA 06 00 00 C3
+
+movl $178, %edx
+. 2563 0x12345678 6
+. BA B2 00 00 00 C3
+
+movl $17, %eax
+. 2564 0x12345678 6
+. B8 11 00 00 00 C3
+
+movl $1802, %edx
+. 2565 0x12345678 6
+. BA 0A 07 00 00 C3
+
+movl $1803, %edx
+. 2566 0x12345678 6
+. BA 0B 07 00 00 C3
+
+movl $180, %eax
+. 2567 0x12345678 6
+. B8 B4 00 00 00 C3
+
+movl $18176, %edi
+. 2568 0x12345678 6
+. BF 00 47 00 00 C3
+
+movl $181, %edx
+. 2569 0x12345678 6
+. BA B5 00 00 00 C3
+
+movl $182, %edx
+. 2570 0x12345678 6
+. BA B6 00 00 00 C3
+
+movl $183, %edx
+. 2571 0x12345678 6
+. BA B7 00 00 00 C3
+
+movl $184, %edx
+. 2572 0x12345678 6
+. BA B8 00 00 00 C3
+
+movl 184(%rsp), %edi
+. 2573 0x12345678 8
+. 8B BC 24 B8 00 00 00 C3
+
+movl $186, %edx
+. 2574 0x12345678 6
+. BA BA 00 00 00 C3
+
+movl $-1879048193, %edi
+. 2575 0x12345678 6
+. BF FF FF FF 8F C3
+
+movl $1, 88(%rsp)
+. 2576 0x12345678 9
+. C7 44 24 58 01 00 00 00 C3
+
+movl 188(%rsp), %edi
+. 2577 0x12345678 8
+. 8B BC 24 BC 00 00 00 C3
+
+movl $1, 8(%rcx,%rax)
+. 2578 0x12345678 9
+. C7 44 01 08 01 00 00 00 C3
+
+movl $1, 8(%rdx,%rax)
+. 2579 0x12345678 9
+. C7 44 02 08 01 00 00 00 C3
+
+movl $1, 8(%rsp)
+. 2580 0x12345678 9
+. C7 44 24 08 01 00 00 00 C3
+
+movl $190, %edx
+. 2581 0x12345678 6
+. BA BE 00 00 00 C3
+
+movl $1910, %edx
+. 2582 0x12345678 6
+. BA 76 07 00 00 C3
+
+movl $1911, %edx
+. 2583 0x12345678 6
+. BA 77 07 00 00 C3
+
+movl $19, 24(%rax)
+. 2584 0x12345678 8
+. C7 40 18 13 00 00 00 C3
+
+movl $192, %edx
+. 2585 0x12345678 6
+. BA C0 00 00 00 C3
+
+movl 192(%rsp), %edi
+. 2586 0x12345678 8
+. 8B BC 24 C0 00 00 00 C3
+
+movl $1944, %edx
+. 2587 0x12345678 6
+. BA 98 07 00 00 C3
+
+movl $1958, %edx
+. 2588 0x12345678 6
+. BA A6 07 00 00 C3
+
+movl $196, %eax
+. 2589 0x12345678 6
+. B8 C4 00 00 00 C3
+
+movl 196(%rsp), %edi
+. 2590 0x12345678 8
+. 8B BC 24 C4 00 00 00 C3
+
+movl $197, %edx
+. 2591 0x12345678 6
+. BA C5 00 00 00 C3
+
+movl $199, %edx
+. 2592 0x12345678 6
+. BA C7 00 00 00 C3
+
+movl $-1, %eax
+. 2593 0x12345678 6
+. B8 FF FF FF FF C3
+
+movl $1, %eax
+. 2594 0x12345678 6
+. B8 01 00 00 00 C3
+
+movl $1, %ebp
+. 2595 0x12345678 6
+. BD 01 00 00 00 C3
+
+movl $1, %ecx
+. 2596 0x12345678 6
+. B9 01 00 00 00 C3
+
+movl $-1, %edi
+. 2597 0x12345678 6
+. BF FF FF FF FF C3
+
+movl $1, %edi
+. 2598 0x12345678 6
+. BF 01 00 00 00 C3
+
+movl $1, %edx
+. 2599 0x12345678 6
+. BA 01 00 00 00 C3
+
+movl $1, %esi
+. 2600 0x12345678 6
+. BE 01 00 00 00 C3
+
+movl $1, %r11d
+. 2601 0x12345678 7
+. 41 BB 01 00 00 00 C3
+
+movl $1, %r12d
+. 2602 0x12345678 7
+. 41 BC 01 00 00 00 C3
+
+movl $-1, %r13d
+. 2603 0x12345678 7
+. 41 BD FF FF FF FF C3
+
+movl $-1, %r14d
+. 2604 0x12345678 7
+. 41 BE FF FF FF FF C3
+
+movl $1, %r14d
+. 2605 0x12345678 7
+. 41 BE 01 00 00 00 C3
+
+movl $1, %r15d
+. 2606 0x12345678 7
+. 41 BF 01 00 00 00 C3
+
+movl $-1, %r8d
+. 2607 0x12345678 7
+. 41 B8 FF FF FF FF C3
+
+movl $1, %r8d
+. 2608 0x12345678 7
+. 41 B8 01 00 00 00 C3
+
+movl $1, %r9d
+. 2609 0x12345678 7
+. 41 B9 01 00 00 00 C3
+
+movl $1, (%rax)
+. 2610 0x12345678 7
+. C7 00 01 00 00 00 C3
+
+movl $-1, (%rsp)
+. 2611 0x12345678 8
+. C7 04 24 FF FF FF FF C3
+
+movl 200(%rsp), %edi
+. 2612 0x12345678 8
+. 8B BC 24 C8 00 00 00 C3
+
+movl $2048, %edi
+. 2613 0x12345678 6
+. BF 00 08 00 00 C3
+
+movl 204(%rsp), %eax
+. 2614 0x12345678 8
+. 8B 84 24 CC 00 00 00 C3
+
+movl 204(%rsp), %ecx
+. 2615 0x12345678 8
+. 8B 8C 24 CC 00 00 00 C3
+
+movl 204(%rsp), %edi
+. 2616 0x12345678 8
+. 8B BC 24 CC 00 00 00 C3
+
+movl $205, %edx
+. 2617 0x12345678 6
+. BA CD 00 00 00 C3
+
+movl $206, %edx
+. 2618 0x12345678 6
+. BA CE 00 00 00 C3
+
+movl $207, %edx
+. 2619 0x12345678 6
+. BA CF 00 00 00 C3
+
+movl $2084, %edx
+. 2620 0x12345678 6
+. BA 24 08 00 00 C3
+
+movl $208, %edx
+. 2621 0x12345678 6
+. BA D0 00 00 00 C3
+
+movl 208(%rsp), %edi
+. 2622 0x12345678 8
+. 8B BC 24 D0 00 00 00 C3
+
+movl $2092, %edx
+. 2623 0x12345678 6
+. BA 2C 08 00 00 C3
+
+movl $2093, %edx
+. 2624 0x12345678 6
+. BA 2D 08 00 00 C3
+
+movl $2095, %edx
+. 2625 0x12345678 6
+. BA 2F 08 00 00 C3
+
+movl $2097152, %edi
+. 2626 0x12345678 6
+. BF 00 00 20 00 C3
+
+movl $20, %eax
+. 2627 0x12345678 6
+. B8 14 00 00 00 C3
+
+movl $20, %edi
+. 2628 0x12345678 6
+. BF 14 00 00 00 C3
+
+movl $20, %edx
+. 2629 0x12345678 6
+. BA 14 00 00 00 C3
+
+movl 20(%r12), %ebx
+. 2630 0x12345678 6
+. 41 8B 5C 24 14 C3
+
+movl 20(%r12), %edx
+. 2631 0x12345678 6
+. 41 8B 54 24 14 C3
+
+movl 20(%r13), %eax
+. 2632 0x12345678 5
+. 41 8B 45 14 C3
+
+movl 20(%r13), %ebp
+. 2633 0x12345678 5
+. 41 8B 6D 14 C3
+
+movl 20(%r13), %ecx
+. 2634 0x12345678 5
+. 41 8B 4D 14 C3
+
+movl 20(%r13), %edx
+. 2635 0x12345678 5
+. 41 8B 55 14 C3
+
+movl 20(%r13), %r14d
+. 2636 0x12345678 5
+. 45 8B 75 14 C3
+
+movl 20(%r14), %ebp
+. 2637 0x12345678 5
+. 41 8B 6E 14 C3
+
+movl 20(%r14), %ecx
+. 2638 0x12345678 5
+. 41 8B 4E 14 C3
+
+movl 20(%r14), %edx
+. 2639 0x12345678 5
+. 41 8B 56 14 C3
+
+movl 20(%r15), %ecx
+. 2640 0x12345678 5
+. 41 8B 4F 14 C3
+
+movl 20(%r8), %esi
+. 2641 0x12345678 5
+. 41 8B 70 14 C3
+
+movl 20(%rax), %eax
+. 2642 0x12345678 4
+. 8B 40 14 C3
+
+movl 20(%rax), %edx
+. 2643 0x12345678 4
+. 8B 50 14 C3
+
+movl 20(%rax), %r10d
+. 2644 0x12345678 5
+. 44 8B 50 14 C3
+
+movl 20(%rax), %r14d
+. 2645 0x12345678 5
+. 44 8B 70 14 C3
+
+movl 20(%rbx), %eax
+. 2646 0x12345678 4
+. 8B 43 14 C3
+
+movl 20(%rbx), %ecx
+. 2647 0x12345678 4
+. 8B 4B 14 C3
+
+movl 20(%rbx), %r14d
+. 2648 0x12345678 5
+. 44 8B 73 14 C3
+
+movl $20, (%rdi)
+. 2649 0x12345678 7
+. C7 07 14 00 00 00 C3
+
+movl 20(%rdi), %ecx
+. 2650 0x12345678 4
+. 8B 4F 14 C3
+
+movl 20(%rdi), %r8d
+. 2651 0x12345678 5
+. 44 8B 47 14 C3
+
+movl 20(%rsp), %eax
+. 2652 0x12345678 5
+. 8B 44 24 14 C3
+
+movl 20(%rsp), %edi
+. 2653 0x12345678 5
+. 8B 7C 24 14 C3
+
+movl 20(%rsp), %edx
+. 2654 0x12345678 5
+. 8B 54 24 14 C3
+
+movl 20(%rsp), %esi
+. 2655 0x12345678 5
+. 8B 74 24 14 C3
+
+movl $2, 108(%rsp)
+. 2656 0x12345678 9
+. C7 44 24 6C 02 00 00 00 C3
+
+movl $210, %edx
+. 2657 0x12345678 6
+. BA D2 00 00 00 C3
+
+movl $2124, %edx
+. 2658 0x12345678 6
+. BA 4C 08 00 00 C3
+
+movl $212, %eax
+. 2659 0x12345678 6
+. B8 D4 00 00 00 C3
+
+movl 212(%rsp), %edi
+. 2660 0x12345678 8
+. 8B BC 24 D4 00 00 00 C3
+
+movl $213, %edi
+. 2661 0x12345678 6
+. BF D5 00 00 00 C3
+
+movl $-2147483648, %edi
+. 2662 0x12345678 6
+. BF 00 00 00 80 C3
+
+movl $2, 148(%rsp)
+. 2663 0x12345678 12
+. C7 84 24 94 00 00 00 02 00 00 00 C3
+
+movl $2, 16(%rdi,%rax,4)
+. 2664 0x12345678 9
+. C7 44 87 10 02 00 00 00 C3
+
+movl 216(%rsp), %edi
+. 2665 0x12345678 8
+. 8B BC 24 D8 00 00 00 C3
+
+movl $2172, %edx
+. 2666 0x12345678 6
+. BA 7C 08 00 00 C3
+
+movl $2173, %edx
+. 2667 0x12345678 6
+. BA 7D 08 00 00 C3
+
+movl $2184, %edx
+. 2668 0x12345678 6
+. BA 88 08 00 00 C3
+
+movl $2185, %edx
+. 2669 0x12345678 6
+. BA 89 08 00 00 C3
+
+movl $2186, %edx
+. 2670 0x12345678 6
+. BA 8A 08 00 00 C3
+
+movl $2187, %edx
+. 2671 0x12345678 6
+. BA 8B 08 00 00 C3
+
+movl $2188, %edx
+. 2672 0x12345678 6
+. BA 8C 08 00 00 C3
+
+movl $2195, %edx
+. 2673 0x12345678 6
+. BA 93 08 00 00 C3
+
+movl $2198, %edx
+. 2674 0x12345678 6
+. BA 96 08 00 00 C3
+
+movl $2199, %edx
+. 2675 0x12345678 6
+. BA 97 08 00 00 C3
+
+movl $21, %edi
+. 2676 0x12345678 6
+. BF 15 00 00 00 C3
+
+movl $2205, %edx
+. 2677 0x12345678 6
+. BA 9D 08 00 00 C3
+
+movl $2206, %edx
+. 2678 0x12345678 6
+. BA 9E 08 00 00 C3
+
+movl 220(%rsp), %edi
+. 2679 0x12345678 8
+. 8B BC 24 DC 00 00 00 C3
+
+movl $2211, %edx
+. 2680 0x12345678 6
+. BA A3 08 00 00 C3
+
+movl $2235, %edx
+. 2681 0x12345678 6
+. BA BB 08 00 00 C3
+
+movl $223, %edx
+. 2682 0x12345678 6
+. BA DF 00 00 00 C3
+
+movl $2240, %edx
+. 2683 0x12345678 6
+. BA C0 08 00 00 C3
+
+movl 224(%rsp), %ecx
+. 2684 0x12345678 8
+. 8B 8C 24 E0 00 00 00 C3
+
+movl 224(%rsp), %edi
+. 2685 0x12345678 8
+. 8B BC 24 E0 00 00 00 C3
+
+movl $2256, %edx
+. 2686 0x12345678 6
+. BA D0 08 00 00 C3
+
+movl $2261, %edi
+. 2687 0x12345678 6
+. BF D5 08 00 00 C3
+
+movl $2277, %edx
+. 2688 0x12345678 6
+. BA E5 08 00 00 C3
+
+movl $227, %edx
+. 2689 0x12345678 6
+. BA E3 00 00 00 C3
+
+movl $2285, %edx
+. 2690 0x12345678 6
+. BA ED 08 00 00 C3
+
+movl $228, %eax
+. 2691 0x12345678 6
+. B8 E4 00 00 00 C3
+
+movl 228(%rsp), %edi
+. 2692 0x12345678 8
+. 8B BC 24 E4 00 00 00 C3
+
+movl $2301, %edx
+. 2693 0x12345678 6
+. BA FD 08 00 00 C3
+
+movl $2302, %edx
+. 2694 0x12345678 6
+. BA FE 08 00 00 C3
+
+movl $2312, %edx
+. 2695 0x12345678 6
+. BA 08 09 00 00 C3
+
+movl $2319, %edx
+. 2696 0x12345678 6
+. BA 0F 09 00 00 C3
+
+movl $2324, %edx
+. 2697 0x12345678 6
+. BA 14 09 00 00 C3
+
+movl $232, %edx
+. 2698 0x12345678 6
+. BA E8 00 00 00 C3
+
+movl 232(%rsp), %edi
+. 2699 0x12345678 8
+. 8B BC 24 E8 00 00 00 C3
+
+movl $2336, %edx
+. 2700 0x12345678 6
+. BA 20 09 00 00 C3
+
+movl $2, 348(%rsp)
+. 2701 0x12345678 12
+. C7 84 24 5C 01 00 00 02 00 00 00 C3
+
+movl $234, %edx
+. 2702 0x12345678 6
+. BA EA 00 00 00 C3
+
+movl $2350, %edx
+. 2703 0x12345678 6
+. BA 2E 09 00 00 C3
+
+movl $2352, %edx
+. 2704 0x12345678 6
+. BA 30 09 00 00 C3
+
+movl $2355, %edx
+. 2705 0x12345678 6
+. BA 33 09 00 00 C3
+
+movl $2362, %edx
+. 2706 0x12345678 6
+. BA 3A 09 00 00 C3
+
+movl $2363, %edx
+. 2707 0x12345678 6
+. BA 3B 09 00 00 C3
+
+movl $2395, %edx
+. 2708 0x12345678 6
+. BA 5B 09 00 00 C3
+
+movl $2396, %edx
+. 2709 0x12345678 6
+. BA 5C 09 00 00 C3
+
+movl $240, %edx
+. 2710 0x12345678 6
+. BA F0 00 00 00 C3
+
+movl 240(%rsp), %edi
+. 2711 0x12345678 8
+. 8B BC 24 F0 00 00 00 C3
+
+movl $24, 156(%rsp)
+. 2712 0x12345678 12
+. C7 84 24 9C 00 00 00 18 00 00 00 C3
+
+movl $244, %eax
+. 2713 0x12345678 6
+. B8 F4 00 00 00 C3
+
+movl 244(%rsp), %edi
+. 2714 0x12345678 8
+. 8B BC 24 F4 00 00 00 C3
+
+movl $247, %edx
+. 2715 0x12345678 6
+. BA F7 00 00 00 C3
+
+movl $248, %edx
+. 2716 0x12345678 6
+. BA F8 00 00 00 C3
+
+movl 248(%rsp), %edi
+. 2717 0x12345678 8
+. 8B BC 24 F8 00 00 00 C3
+
+movl $249, %edx
+. 2718 0x12345678 6
+. BA F9 00 00 00 C3
+
+movl $24, %eax
+. 2719 0x12345678 6
+. B8 18 00 00 00 C3
+
+movl $24, %edi
+. 2720 0x12345678 6
+. BF 18 00 00 00 C3
+
+movl 24(%r12), %eax
+. 2721 0x12345678 6
+. 41 8B 44 24 18 C3
+
+movl 24(%r12), %edx
+. 2722 0x12345678 6
+. 41 8B 54 24 18 C3
+
+movl 24(%r12), %r9d
+. 2723 0x12345678 6
+. 45 8B 4C 24 18 C3
+
+movl 24(%r13), %eax
+. 2724 0x12345678 5
+. 41 8B 45 18 C3
+
+movl 24(%r13), %edx
+. 2725 0x12345678 5
+. 41 8B 55 18 C3
+
+movl 24(%r13), %r12d
+. 2726 0x12345678 5
+. 45 8B 65 18 C3
+
+movl 24(%rax), %eax
+. 2727 0x12345678 4
+. 8B 40 18 C3
+
+movl 24(%rbp), %eax
+. 2728 0x12345678 4
+. 8B 45 18 C3
+
+movl 24(%rbp), %ebx
+. 2729 0x12345678 4
+. 8B 5D 18 C3
+
+movl 24(%rbp), %edx
+. 2730 0x12345678 4
+. 8B 55 18 C3
+
+movl 24(%rbp), %esi
+. 2731 0x12345678 4
+. 8B 75 18 C3
+
+movl 24(%rbp), %r13d
+. 2732 0x12345678 5
+. 44 8B 6D 18 C3
+
+movl 24(%rbx), %ecx
+. 2733 0x12345678 4
+. 8B 4B 18 C3
+
+movl 24(%rbx), %edx
+. 2734 0x12345678 4
+. 8B 53 18 C3
+
+movl 24(%rbx), %esi
+. 2735 0x12345678 4
+. 8B 73 18 C3
+
+movl $2, 4(%rdi)
+. 2736 0x12345678 8
+. C7 47 04 02 00 00 00 C3
+
+movl 24(%rdi), %edi
+. 2737 0x12345678 4
+. 8B 7F 18 C3
+
+movl 24(%rdi), %r12d
+. 2738 0x12345678 5
+. 44 8B 67 18 C3
+
+movl 24(%rdx), %eax
+. 2739 0x12345678 4
+. 8B 42 18 C3
+
+movl 24(%rdx), %r9d
+. 2740 0x12345678 5
+. 44 8B 4A 18 C3
+
+movl 24(%rsi), %ebx
+. 2741 0x12345678 4
+. 8B 5E 18 C3
+
+movl 24(%rsp), %eax
+. 2742 0x12345678 5
+. 8B 44 24 18 C3
+
+movl 24(%rsp), %ecx
+. 2743 0x12345678 5
+. 8B 4C 24 18 C3
+
+movl 24(%rsp), %edi
+. 2744 0x12345678 5
+. 8B 7C 24 18 C3
+
+movl 24(%rsp), %edx
+. 2745 0x12345678 5
+. 8B 54 24 18 C3
+
+movl 24(%rsp), %esi
+. 2746 0x12345678 5
+. 8B 74 24 18 C3
+
+movl $250, %edx
+. 2747 0x12345678 6
+. BA FA 00 00 00 C3
+
+movl 252(%rsp), %edi
+. 2748 0x12345678 8
+. 8B BC 24 FC 00 00 00 C3
+
+movl $254, %edx
+. 2749 0x12345678 6
+. BA FE 00 00 00 C3
+
+movl $255, %eax
+. 2750 0x12345678 6
+. B8 FF 00 00 00 C3
+
+movl $255, %edi
+. 2751 0x12345678 6
+. BF FF 00 00 00 C3
+
+movl $255, %r10d
+. 2752 0x12345678 7
+. 41 BA FF 00 00 00 C3
+
+movl $255, %r12d
+. 2753 0x12345678 7
+. 41 BC FF 00 00 00 C3
+
+movl $255, %r9d
+. 2754 0x12345678 7
+. 41 B9 FF 00 00 00 C3
+
+movl $256, %edx
+. 2755 0x12345678 6
+. BA 00 01 00 00 C3
+
+movl $25, %eax
+. 2756 0x12345678 6
+. B8 19 00 00 00 C3
+
+movl $260, %eax
+. 2757 0x12345678 6
+. B8 04 01 00 00 C3
+
+movl $2611, %edx
+. 2758 0x12345678 6
+. BA 33 0A 00 00 C3
+
+movl $2617, %edx
+. 2759 0x12345678 6
+. BA 39 0A 00 00 C3
+
+movl $2621, %edx
+. 2760 0x12345678 6
+. BA 3D 0A 00 00 C3
+
+movl $2645, %edx
+. 2761 0x12345678 6
+. BA 55 0A 00 00 C3
+
+movl $2649, %edx
+. 2762 0x12345678 6
+. BA 59 0A 00 00 C3
+
+movl $265, %edx
+. 2763 0x12345678 6
+. BA 09 01 00 00 C3
+
+movl $2689, %edx
+. 2764 0x12345678 6
+. BA 81 0A 00 00 C3
+
+movl $2715, %edx
+. 2765 0x12345678 6
+. BA 9B 0A 00 00 C3
+
+movl 272(%rsp), %edi
+. 2766 0x12345678 8
+. 8B BC 24 10 01 00 00 C3
+
+movl $2733, %edx
+. 2767 0x12345678 6
+. BA AD 0A 00 00 C3
+
+movl $273, %edx
+. 2768 0x12345678 6
+. BA 11 01 00 00 C3
+
+movl $2740, %edx
+. 2769 0x12345678 6
+. BA B4 0A 00 00 C3
+
+movl $2765, %edx
+. 2770 0x12345678 6
+. BA CD 0A 00 00 C3
+
+movl $2768, %edx
+. 2771 0x12345678 6
+. BA D0 0A 00 00 C3
+
+movl $276, %eax
+. 2772 0x12345678 6
+. B8 14 01 00 00 C3
+
+movl $276, %edx
+. 2773 0x12345678 6
+. BA 14 01 00 00 C3
+
+movl 276(%rsp), %edi
+. 2774 0x12345678 8
+. 8B BC 24 14 01 00 00 C3
+
+movl 276(%rsp), %edx
+. 2775 0x12345678 8
+. 8B 94 24 14 01 00 00 C3
+
+movl $2771, %edx
+. 2776 0x12345678 6
+. BA D3 0A 00 00 C3
+
+movl $2774, %edx
+. 2777 0x12345678 6
+. BA D6 0A 00 00 C3
+
+movl $2776, %edx
+. 2778 0x12345678 6
+. BA D8 0A 00 00 C3
+
+movl $2777, %edx
+. 2779 0x12345678 6
+. BA D9 0A 00 00 C3
+
+movl $278, %eax
+. 2780 0x12345678 6
+. B8 16 01 00 00 C3
+
+movl $2799, %edx
+. 2781 0x12345678 6
+. BA EF 0A 00 00 C3
+
+movl $27, %eax
+. 2782 0x12345678 6
+. B8 1B 00 00 00 C3
+
+movl $280, %eax
+. 2783 0x12345678 6
+. B8 18 01 00 00 C3
+
+movl $281, %edx
+. 2784 0x12345678 6
+. BA 19 01 00 00 C3
+
+movl $282, %eax
+. 2785 0x12345678 6
+. B8 1A 01 00 00 C3
+
+movl $283, %edx
+. 2786 0x12345678 6
+. BA 1B 01 00 00 C3
+
+movl $28, 40(%rbx)
+. 2787 0x12345678 8
+. C7 43 28 1C 00 00 00 C3
+
+movl $284, %eax
+. 2788 0x12345678 6
+. B8 1C 01 00 00 C3
+
+movl $284, %edx
+. 2789 0x12345678 6
+. BA 1C 01 00 00 C3
+
+movl 284(%rsp), %ebx
+. 2790 0x12345678 8
+. 8B 9C 24 1C 01 00 00 C3
+
+movl $286, %eax
+. 2791 0x12345678 6
+. B8 1E 01 00 00 C3
+
+movl $286, %edx
+. 2792 0x12345678 6
+. BA 1E 01 00 00 C3
+
+movl $2875, %edx
+. 2793 0x12345678 6
+. BA 3B 0B 00 00 C3
+
+movl $287, %edx
+. 2794 0x12345678 6
+. BA 1F 01 00 00 C3
+
+movl $2884, %edx
+. 2795 0x12345678 6
+. BA 44 0B 00 00 C3
+
+movl $288, %edi
+. 2796 0x12345678 6
+. BF 20 01 00 00 C3
+
+movl $288, %edx
+. 2797 0x12345678 6
+. BA 20 01 00 00 C3
+
+movl $2, 88(%rsp)
+. 2798 0x12345678 9
+. C7 44 24 58 02 00 00 00 C3
+
+movl 288(%rsp), %eax
+. 2799 0x12345678 8
+. 8B 84 24 20 01 00 00 C3
+
+movl 288(%rsp), %ecx
+. 2800 0x12345678 8
+. 8B 8C 24 20 01 00 00 C3
+
+movl $28, %eax
+. 2801 0x12345678 6
+. B8 1C 00 00 00 C3
+
+movl $28, %edi
+. 2802 0x12345678 6
+. BF 1C 00 00 00 C3
+
+movl $28, %edx
+. 2803 0x12345678 6
+. BA 1C 00 00 00 C3
+
+movl 28(%r12), %edi
+. 2804 0x12345678 6
+. 41 8B 7C 24 1C C3
+
+movl 28(%r12), %edx
+. 2805 0x12345678 6
+. 41 8B 54 24 1C C3
+
+movl 28(%r13), %ecx
+. 2806 0x12345678 5
+. 41 8B 4D 1C C3
+
+movl 28(%rbp), %eax
+. 2807 0x12345678 4
+. 8B 45 1C C3
+
+movl 28(%rbx), %edx
+. 2808 0x12345678 4
+. 8B 53 1C C3
+
+movl 28(%rdi), %edx
+. 2809 0x12345678 4
+. 8B 57 1C C3
+
+movl 28(%rdi), %r10d
+. 2810 0x12345678 5
+. 44 8B 57 1C C3
+
+movl 28(%rdi), %r11d
+. 2811 0x12345678 5
+. 44 8B 5F 1C C3
+
+movl $2, 8(%rdx,%rbx)
+. 2812 0x12345678 9
+. C7 44 1A 08 02 00 00 00 C3
+
+movl 28(%rsp), %eax
+. 2813 0x12345678 5
+. 8B 44 24 1C C3
+
+movl 28(%rsp), %edi
+. 2814 0x12345678 5
+. 8B 7C 24 1C C3
+
+movl 28(%rsp), %esi
+. 2815 0x12345678 5
+. 8B 74 24 1C C3
+
+movl $2915, %edx
+. 2816 0x12345678 6
+. BA 63 0B 00 00 C3
+
+movl $2924, %edx
+. 2817 0x12345678 6
+. BA 6C 0B 00 00 C3
+
+movl $2929, %edx
+. 2818 0x12345678 6
+. BA 71 0B 00 00 C3
+
+movl 292(%rsp), %ebp
+. 2819 0x12345678 8
+. 8B AC 24 24 01 00 00 C3
+
+movl 292(%rsp), %edi
+. 2820 0x12345678 8
+. 8B BC 24 24 01 00 00 C3
+
+movl 292(%rsp), %esi
+. 2821 0x12345678 8
+. 8B B4 24 24 01 00 00 C3
+
+movl $294, %edx
+. 2822 0x12345678 6
+. BA 26 01 00 00 C3
+
+movl $296, %edi
+. 2823 0x12345678 6
+. BF 28 01 00 00 C3
+
+movl 296(%rsp), %eax
+. 2824 0x12345678 8
+. 8B 84 24 28 01 00 00 C3
+
+movl $2971, %edx
+. 2825 0x12345678 6
+. BA 9B 0B 00 00 C3
+
+movl $29, %edi
+. 2826 0x12345678 6
+. BF 1D 00 00 00 C3
+
+movl $2, %eax
+. 2827 0x12345678 6
+. B8 02 00 00 00 C3
+
+movl $2, %ecx
+. 2828 0x12345678 6
+. B9 02 00 00 00 C3
+
+movl $2, %edi
+. 2829 0x12345678 6
+. BF 02 00 00 00 C3
+
+movl $2, %edx
+. 2830 0x12345678 6
+. BA 02 00 00 00 C3
+
+movl $2, %esi
+. 2831 0x12345678 6
+. BE 02 00 00 00 C3
+
+movl $2, %r14d
+. 2832 0x12345678 7
+. 41 BE 02 00 00 00 C3
+
+movl $-2, (%r14,%rax,4)
+. 2833 0x12345678 9
+. 41 C7 04 86 FE FF FF FF C3
+
+movl $2, (%rax)
+. 2834 0x12345678 7
+. C7 00 02 00 00 00 C3
+
+movl $2, (%rcx)
+. 2835 0x12345678 7
+. C7 01 02 00 00 00 C3
+
+movl $-2, (%rcx,%rax,4)
+. 2836 0x12345678 8
+. C7 04 81 FE FF FF FF C3
+
+movl $2, (%rdx)
+. 2837 0x12345678 7
+. C7 02 02 00 00 00 C3
+
+movl $300, %edx
+. 2838 0x12345678 6
+. BA 2C 01 00 00 C3
+
+movl $304, %edi
+. 2839 0x12345678 6
+. BF 30 01 00 00 C3
+
+movl $304, %edx
+. 2840 0x12345678 6
+. BA 30 01 00 00 C3
+
+movl $305, %edx
+. 2841 0x12345678 6
+. BA 31 01 00 00 C3
+
+movl $309, %edx
+. 2842 0x12345678 6
+. BA 35 01 00 00 C3
+
+movl $30, %edi
+. 2843 0x12345678 6
+. BF 1E 00 00 00 C3
+
+movl $312, 68(%rsp)
+. 2844 0x12345678 9
+. C7 44 24 44 38 01 00 00 C3
+
+movl 312(%rsp), %ecx
+. 2845 0x12345678 8
+. 8B 8C 24 38 01 00 00 C3
+
+movl $314, %edx
+. 2846 0x12345678 6
+. BA 3A 01 00 00 C3
+
+movl $3181, %edx
+. 2847 0x12345678 6
+. BA 6D 0C 00 00 C3
+
+movl $3183, %edx
+. 2848 0x12345678 6
+. BA 6F 0C 00 00 C3
+
+movl $31, %eax
+. 2849 0x12345678 6
+. B8 1F 00 00 00 C3
+
+movl $31, %edi
+. 2850 0x12345678 6
+. BF 1F 00 00 00 C3
+
+movl $3203, %edx
+. 2851 0x12345678 6
+. BA 83 0C 00 00 C3
+
+movl $323, %edx
+. 2852 0x12345678 6
+. BA 43 01 00 00 C3
+
+movl $3, 24(%rax)
+. 2853 0x12345678 8
+. C7 40 18 03 00 00 00 C3
+
+movl $325, %edx
+. 2854 0x12345678 6
+. BA 45 01 00 00 C3
+
+movl $326, %edx
+. 2855 0x12345678 6
+. BA 46 01 00 00 C3
+
+movl $32767, %ecx
+. 2856 0x12345678 6
+. B9 FF 7F 00 00 C3
+
+movl $32767, %r9d
+. 2857 0x12345678 7
+. 41 B9 FF 7F 00 00 C3
+
+movl $-32768, %r10d
+. 2858 0x12345678 7
+. 41 BA 00 80 FF FF C3
+
+movl $-32768, %r8d
+. 2859 0x12345678 7
+. 41 B8 00 80 FF FF C3
+
+movl $327, %edx
+. 2860 0x12345678 6
+. BA 47 01 00 00 C3
+
+movl $32, 8(%rsp)
+. 2861 0x12345678 9
+. C7 44 24 08 20 00 00 00 C3
+
+movl $3298, %edx
+. 2862 0x12345678 6
+. BA E2 0C 00 00 C3
+
+movl $329, %edx
+. 2863 0x12345678 6
+. BA 49 01 00 00 C3
+
+movl $32, %eax
+. 2864 0x12345678 6
+. B8 20 00 00 00 C3
+
+movl $32, %edi
+. 2865 0x12345678 6
+. BF 20 00 00 00 C3
+
+movl $32, %edx
+. 2866 0x12345678 6
+. BA 20 00 00 00 C3
+
+movl $32, %esi
+. 2867 0x12345678 6
+. BE 20 00 00 00 C3
+
+movl 32(%r13), %eax
+. 2868 0x12345678 5
+. 41 8B 45 20 C3
+
+movl $32, %r14d
+. 2869 0x12345678 7
+. 41 BE 20 00 00 00 C3
+
+movl 32(%r14), %eax
+. 2870 0x12345678 5
+. 41 8B 46 20 C3
+
+movl 32(%r15), %eax
+. 2871 0x12345678 5
+. 41 8B 47 20 C3
+
+movl 32(%r15), %ebx
+. 2872 0x12345678 5
+. 41 8B 5F 20 C3
+
+movl 32(%rax), %edi
+. 2873 0x12345678 4
+. 8B 78 20 C3
+
+movl 32(%rbp), %ebx
+. 2874 0x12345678 4
+. 8B 5D 20 C3
+
+movl 32(%rbp), %edi
+. 2875 0x12345678 4
+. 8B 7D 20 C3
+
+movl 32(%rbp), %edx
+. 2876 0x12345678 4
+. 8B 55 20 C3
+
+movl 32(%rdi), %eax
+. 2877 0x12345678 4
+. 8B 47 20 C3
+
+movl 32(%rdi), %ecx
+. 2878 0x12345678 4
+. 8B 4F 20 C3
+
+movl 32(%rdi), %r8d
+. 2879 0x12345678 5
+. 44 8B 47 20 C3
+
+movl 32(%rdx), %eax
+. 2880 0x12345678 4
+. 8B 42 20 C3
+
+movl 32(%rsp), %eax
+. 2881 0x12345678 5
+. 8B 44 24 20 C3
+
+movl 32(%rsp), %ecx
+. 2882 0x12345678 5
+. 8B 4C 24 20 C3
+
+movl 32(%rsp), %edi
+. 2883 0x12345678 5
+. 8B 7C 24 20 C3
+
+movl 32(%rsp), %edx
+. 2884 0x12345678 5
+. 8B 54 24 20 C3
+
+movl 32(%rsp), %esi
+. 2885 0x12345678 5
+. 8B 74 24 20 C3
+
+movl 32(%rsp), %r8d
+. 2886 0x12345678 6
+. 44 8B 44 24 20 C3
+
+movl 32(%rsp), %r9d
+. 2887 0x12345678 6
+. 44 8B 4C 24 20 C3
+
+movl $3310, %edx
+. 2888 0x12345678 6
+. BA EE 0C 00 00 C3
+
+movl $3315, %edx
+. 2889 0x12345678 6
+. BA F3 0C 00 00 C3
+
+movl $3339, %edx
+. 2890 0x12345678 6
+. BA 0B 0D 00 00 C3
+
+movl $333, %edx
+. 2891 0x12345678 6
+. BA 4D 01 00 00 C3
+
+movl $3345, %edx
+. 2892 0x12345678 6
+. BA 11 0D 00 00 C3
+
+movl $3354, %edx
+. 2893 0x12345678 6
+. BA 1A 0D 00 00 C3
+
+movl $3357, %edx
+. 2894 0x12345678 6
+. BA 1D 0D 00 00 C3
+
+movl $3365, %edx
+. 2895 0x12345678 6
+. BA 25 0D 00 00 C3
+
+movl 336(%rsp), %eax
+. 2896 0x12345678 8
+. 8B 84 24 50 01 00 00 C3
+
+movl 340(%rsp), %eax
+. 2897 0x12345678 8
+. 8B 84 24 54 01 00 00 C3
+
+movl $342, %edx
+. 2898 0x12345678 6
+. BA 56 01 00 00 C3
+
+movl $345, %edx
+. 2899 0x12345678 6
+. BA 59 01 00 00 C3
+
+movl $3461, %edx
+. 2900 0x12345678 6
+. BA 85 0D 00 00 C3
+
+movl $3464, %edx
+. 2901 0x12345678 6
+. BA 88 0D 00 00 C3
+
+movl $3465, %edx
+. 2902 0x12345678 6
+. BA 89 0D 00 00 C3
+
+movl $3469, %edx
+. 2903 0x12345678 6
+. BA 8D 0D 00 00 C3
+
+movl $3471, %edx
+. 2904 0x12345678 6
+. BA 8F 0D 00 00 C3
+
+movl $3473, %edx
+. 2905 0x12345678 6
+. BA 91 0D 00 00 C3
+
+movl $3478, %edx
+. 2906 0x12345678 6
+. BA 96 0D 00 00 C3
+
+movl $347, %edx
+. 2907 0x12345678 6
+. BA 5B 01 00 00 C3
+
+movl 348(%rsp), %r12d
+. 2908 0x12345678 9
+. 44 8B A4 24 5C 01 00 00 C3
+
+movl $349, %edx
+. 2909 0x12345678 6
+. BA 5D 01 00 00 C3
+
+movl $350, %edx
+. 2910 0x12345678 6
+. BA 5E 01 00 00 C3
+
+movl $351, %edx
+. 2911 0x12345678 6
+. BA 5F 01 00 00 C3
+
+movl $352, %edx
+. 2912 0x12345678 6
+. BA 60 01 00 00 C3
+
+movl 360(%rsp), %eax
+. 2913 0x12345678 8
+. 8B 84 24 68 01 00 00 C3
+
+movl $3644, %edx
+. 2914 0x12345678 6
+. BA 3C 0E 00 00 C3
+
+movl $3, 64(%rsp)
+. 2915 0x12345678 9
+. C7 44 24 40 03 00 00 00 C3
+
+movl 364(%rsp), %eax
+. 2916 0x12345678 8
+. 8B 84 24 6C 01 00 00 C3
+
+movl $36, %eax
+. 2917 0x12345678 6
+. B8 24 00 00 00 C3
+
+movl $36, %edi
+. 2918 0x12345678 6
+. BF 24 00 00 00 C3
+
+movl 36(%rsp), %eax
+. 2919 0x12345678 5
+. 8B 44 24 24 C3
+
+movl 36(%rsp), %edi
+. 2920 0x12345678 5
+. 8B 7C 24 24 C3
+
+movl 36(%rsp), %edx
+. 2921 0x12345678 5
+. 8B 54 24 24 C3
+
+movl 36(%rsp), %esi
+. 2922 0x12345678 5
+. 8B 74 24 24 C3
+
+movl $375, %edx
+. 2923 0x12345678 6
+. BA 77 01 00 00 C3
+
+movl 376(%rsp), %ecx
+. 2924 0x12345678 8
+. 8B 8C 24 78 01 00 00 C3
+
+movl 376(%rsp), %edi
+. 2925 0x12345678 8
+. 8B BC 24 78 01 00 00 C3
+
+movl 376(%rsp), %edx
+. 2926 0x12345678 8
+. 8B 94 24 78 01 00 00 C3
+
+movl 376(%rsp), %esi
+. 2927 0x12345678 8
+. 8B B4 24 78 01 00 00 C3
+
+movl $37, %ecx
+. 2928 0x12345678 6
+. B9 25 00 00 00 C3
+
+movl $37, %edi
+. 2929 0x12345678 6
+. BF 25 00 00 00 C3
+
+movl 384(%rsp), %ecx
+. 2930 0x12345678 8
+. 8B 8C 24 80 01 00 00 C3
+
+movl 384(%rsp), %edi
+. 2931 0x12345678 8
+. 8B BC 24 80 01 00 00 C3
+
+movl 384(%rsp), %edx
+. 2932 0x12345678 8
+. 8B 94 24 80 01 00 00 C3
+
+movl 384(%rsp), %esi
+. 2933 0x12345678 8
+. 8B B4 24 80 01 00 00 C3
+
+movl $388, %edx
+. 2934 0x12345678 6
+. BA 84 01 00 00 C3
+
+movl $3, 88(%rsp)
+. 2935 0x12345678 9
+. C7 44 24 58 03 00 00 00 C3
+
+movl 388(%rsp), %ecx
+. 2936 0x12345678 8
+. 8B 8C 24 84 01 00 00 C3
+
+movl 388(%rsp), %edi
+. 2937 0x12345678 8
+. 8B BC 24 84 01 00 00 C3
+
+movl 388(%rsp), %edx
+. 2938 0x12345678 8
+. 8B 94 24 84 01 00 00 C3
+
+movl 388(%rsp), %esi
+. 2939 0x12345678 8
+. 8B B4 24 84 01 00 00 C3
+
+movl $390, %edx
+. 2940 0x12345678 6
+. BA 86 01 00 00 C3
+
+movl 392(%rsp), %ecx
+. 2941 0x12345678 8
+. 8B 8C 24 88 01 00 00 C3
+
+movl 392(%rsp), %edi
+. 2942 0x12345678 8
+. 8B BC 24 88 01 00 00 C3
+
+movl 392(%rsp), %edx
+. 2943 0x12345678 8
+. 8B 94 24 88 01 00 00 C3
+
+movl 392(%rsp), %esi
+. 2944 0x12345678 8
+. 8B B4 24 88 01 00 00 C3
+
+movl $3, %eax
+. 2945 0x12345678 6
+. B8 03 00 00 00 C3
+
+movl $3, %ebp
+. 2946 0x12345678 6
+. BD 03 00 00 00 C3
+
+movl $3, %ecx
+. 2947 0x12345678 6
+. B9 03 00 00 00 C3
+
+movl $3, %edi
+. 2948 0x12345678 6
+. BF 03 00 00 00 C3
+
+movl $3, %edx
+. 2949 0x12345678 6
+. BA 03 00 00 00 C3
+
+movl $3, %esi
+. 2950 0x12345678 6
+. BE 03 00 00 00 C3
+
+movl $3, (%rax)
+. 2951 0x12345678 7
+. C7 00 03 00 00 00 C3
+
+movl $3, (%rcx)
+. 2952 0x12345678 7
+. C7 01 03 00 00 00 C3
+
+movl $3, (%rdx)
+. 2953 0x12345678 7
+. C7 02 03 00 00 00 C3
+
+movl 400(%rsp), %ecx
+. 2954 0x12345678 8
+. 8B 8C 24 90 01 00 00 C3
+
+movl 400(%rsp), %edi
+. 2955 0x12345678 8
+. 8B BC 24 90 01 00 00 C3
+
+movl 400(%rsp), %edx
+. 2956 0x12345678 8
+. 8B 94 24 90 01 00 00 C3
+
+movl 400(%rsp), %esi
+. 2957 0x12345678 8
+. 8B B4 24 90 01 00 00 C3
+
+movl $402, %edx
+. 2958 0x12345678 6
+. BA 92 01 00 00 C3
+
+movl $403, %edx
+. 2959 0x12345678 6
+. BA 93 01 00 00 C3
+
+movl $404, %edx
+. 2960 0x12345678 6
+. BA 94 01 00 00 C3
+
+movl 404(%rsp), %ecx
+. 2961 0x12345678 8
+. 8B 8C 24 94 01 00 00 C3
+
+movl 404(%rsp), %edi
+. 2962 0x12345678 8
+. 8B BC 24 94 01 00 00 C3
+
+movl 404(%rsp), %edx
+. 2963 0x12345678 8
+. 8B 94 24 94 01 00 00 C3
+
+movl 404(%rsp), %esi
+. 2964 0x12345678 8
+. 8B B4 24 94 01 00 00 C3
+
+movl $405, %edx
+. 2965 0x12345678 6
+. BA 95 01 00 00 C3
+
+movl $406, %edx
+. 2966 0x12345678 6
+. BA 96 01 00 00 C3
+
+movl $408, %edx
+. 2967 0x12345678 6
+. BA 98 01 00 00 C3
+
+movl 408(%rsp), %ecx
+. 2968 0x12345678 8
+. 8B 8C 24 98 01 00 00 C3
+
+movl 408(%rsp), %edi
+. 2969 0x12345678 8
+. 8B BC 24 98 01 00 00 C3
+
+movl 408(%rsp), %edx
+. 2970 0x12345678 8
+. 8B 94 24 98 01 00 00 C3
+
+movl 408(%rsp), %esi
+. 2971 0x12345678 8
+. 8B B4 24 98 01 00 00 C3
+
+movl $40, %eax
+. 2972 0x12345678 6
+. B8 28 00 00 00 C3
+
+movl $40, %edi
+. 2973 0x12345678 6
+. BF 28 00 00 00 C3
+
+movl 40(%r12), %esi
+. 2974 0x12345678 6
+. 41 8B 74 24 28 C3
+
+movl 40(%r13), %edi
+. 2975 0x12345678 5
+. 41 8B 7D 28 C3
+
+movl 40(%r13), %esi
+. 2976 0x12345678 5
+. 41 8B 75 28 C3
+
+movl 40(%rbp), %eax
+. 2977 0x12345678 4
+. 8B 45 28 C3
+
+movl 40(%rsp), %eax
+. 2978 0x12345678 5
+. 8B 44 24 28 C3
+
+movl 40(%rsp), %edi
+. 2979 0x12345678 5
+. 8B 7C 24 28 C3
+
+movl 40(%rsp), %edx
+. 2980 0x12345678 5
+. 8B 54 24 28 C3
+
+movl 40(%rsp), %esi
+. 2981 0x12345678 5
+. 8B 74 24 28 C3
+
+movl $4, 104(%rsp)
+. 2982 0x12345678 9
+. C7 44 24 68 04 00 00 00 C3
+
+movl $4, 108(%rax)
+. 2983 0x12345678 8
+. C7 40 6C 04 00 00 00 C3
+
+movl $4, 108(%rbx)
+. 2984 0x12345678 8
+. C7 43 6C 04 00 00 00 C3
+
+movl $4, 132(%rbx)
+. 2985 0x12345678 11
+. C7 83 84 00 00 00 04 00 00 00 C3
+
+movl $4, 156(%rsp)
+. 2986 0x12345678 12
+. C7 84 24 9C 00 00 00 04 00 00 00 C3
+
+movl 416(%rsp), %ecx
+. 2987 0x12345678 8
+. 8B 8C 24 A0 01 00 00 C3
+
+movl 416(%rsp), %edi
+. 2988 0x12345678 8
+. 8B BC 24 A0 01 00 00 C3
+
+movl 416(%rsp), %edx
+. 2989 0x12345678 8
+. 8B 94 24 A0 01 00 00 C3
+
+movl 416(%rsp), %esi
+. 2990 0x12345678 8
+. 8B B4 24 A0 01 00 00 C3
+
+movl $4, 188(%rsp)
+. 2991 0x12345678 12
+. C7 84 24 BC 00 00 00 04 00 00 00 C3
+
+movl $4, 20(%rsp)
+. 2992 0x12345678 9
+. C7 44 24 14 04 00 00 00 C3
+
+movl 420(%rsp), %ecx
+. 2993 0x12345678 8
+. 8B 8C 24 A4 01 00 00 C3
+
+movl 420(%rsp), %edi
+. 2994 0x12345678 8
+. 8B BC 24 A4 01 00 00 C3
+
+movl 420(%rsp), %edx
+. 2995 0x12345678 8
+. 8B 94 24 A4 01 00 00 C3
+
+movl 420(%rsp), %esi
+. 2996 0x12345678 8
+. 8B B4 24 A4 01 00 00 C3
+
+movl $424, %edx
+. 2997 0x12345678 6
+. BA A8 01 00 00 C3
+
+movl $428, %edx
+. 2998 0x12345678 6
+. BA AC 01 00 00 C3
+
+movl 428(%rsp), %edi
+. 2999 0x12345678 8
+. 8B BC 24 AC 01 00 00 C3
+
+movl $4294967295, %eax
+. 3000 0x12345678 6
+. B8 FF FF FF FF C3
+
+movl $433, %edx
+. 3001 0x12345678 6
+. BA B1 01 00 00 C3
+
+movl 436(%rsp), %edi
+. 3002 0x12345678 8
+. 8B BC 24 B4 01 00 00 C3
+
+movl $440, %edx
+. 3003 0x12345678 6
+. BA B8 01 00 00 C3
+
+movl $442, %edx
+. 3004 0x12345678 6
+. BA BA 01 00 00 C3
+
+movl 444(%rsp), %edi
+. 3005 0x12345678 8
+. 8B BC 24 BC 01 00 00 C3
+
+movl $4, 48(%rax)
+. 3006 0x12345678 8
+. C7 40 30 04 00 00 00 C3
+
+movl $4, 48(%rbx)
+. 3007 0x12345678 8
+. C7 43 30 04 00 00 00 C3
+
+movl $44, %eax
+. 3008 0x12345678 6
+. B8 2C 00 00 00 C3
+
+movl $44, %edi
+. 3009 0x12345678 6
+. BF 2C 00 00 00 C3
+
+movl 44(%rsp), %eax
+. 3010 0x12345678 5
+. 8B 44 24 2C C3
+
+movl 44(%rsp), %ebx
+. 3011 0x12345678 5
+. 8B 5C 24 2C C3
+
+movl 44(%rsp), %edi
+. 3012 0x12345678 5
+. 8B 7C 24 2C C3
+
+movl 44(%rsp), %edx
+. 3013 0x12345678 5
+. 8B 54 24 2C C3
+
+movl 452(%rsp), %edi
+. 3014 0x12345678 8
+. 8B BC 24 C4 01 00 00 C3
+
+movl $4, 60(%rax)
+. 3015 0x12345678 8
+. C7 40 3C 04 00 00 00 C3
+
+movl $4, 60(%rbx)
+. 3016 0x12345678 8
+. C7 43 3C 04 00 00 00 C3
+
+movl 460(%rsp), %edi
+. 3017 0x12345678 8
+. 8B BC 24 CC 01 00 00 C3
+
+movl $463, %edx
+. 3018 0x12345678 6
+. BA CF 01 00 00 C3
+
+movl 464(%rsp), %edx
+. 3019 0x12345678 8
+. 8B 94 24 D0 01 00 00 C3
+
+movl $465, %edx
+. 3020 0x12345678 6
+. BA D1 01 00 00 C3
+
+movl $466, %edx
+. 3021 0x12345678 6
+. BA D2 01 00 00 C3
+
+movl $467, %edx
+. 3022 0x12345678 6
+. BA D3 01 00 00 C3
+
+movl 468(%rsp), %edi
+. 3023 0x12345678 8
+. 8B BC 24 D4 01 00 00 C3
+
+movl $469, %edx
+. 3024 0x12345678 6
+. BA D5 01 00 00 C3
+
+movl $4, 72(%rax)
+. 3025 0x12345678 8
+. C7 40 48 04 00 00 00 C3
+
+movl 472(%rsp), %edx
+. 3026 0x12345678 8
+. 8B 94 24 D8 01 00 00 C3
+
+movl $473, %edx
+. 3027 0x12345678 6
+. BA D9 01 00 00 C3
+
+movl $476, %edx
+. 3028 0x12345678 6
+. BA DC 01 00 00 C3
+
+movl 476(%rsp), %esi
+. 3029 0x12345678 8
+. 8B B4 24 DC 01 00 00 C3
+
+movl $477, %edx
+. 3030 0x12345678 6
+. BA DD 01 00 00 C3
+
+movl $478, %edx
+. 3031 0x12345678 6
+. BA DE 01 00 00 C3
+
+movl $479, %edx
+. 3032 0x12345678 6
+. BA DF 01 00 00 C3
+
+movl $4, 80(%rax)
+. 3033 0x12345678 8
+. C7 40 50 04 00 00 00 C3
+
+movl 480(%rsp), %ecx
+. 3034 0x12345678 8
+. 8B 8C 24 E0 01 00 00 C3
+
+movl $481, %edx
+. 3035 0x12345678 6
+. BA E1 01 00 00 C3
+
+movl $483, %edx
+. 3036 0x12345678 6
+. BA E3 01 00 00 C3
+
+movl $4, 84(%rax)
+. 3037 0x12345678 8
+. C7 40 54 04 00 00 00 C3
+
+movl $4, 84(%rbx)
+. 3038 0x12345678 8
+. C7 43 54 04 00 00 00 C3
+
+movl $48, 4(%rsp)
+. 3039 0x12345678 9
+. C7 44 24 04 30 00 00 00 C3
+
+movl 484(%rsp), %esi
+. 3040 0x12345678 8
+. 8B B4 24 E4 01 00 00 C3
+
+movl $487, %edx
+. 3041 0x12345678 6
+. BA E7 01 00 00 C3
+
+movl 488(%rsp), %ecx
+. 3042 0x12345678 8
+. 8B 8C 24 E8 01 00 00 C3
+
+movl $48, %eax
+. 3043 0x12345678 6
+. B8 30 00 00 00 C3
+
+movl $48, %edi
+. 3044 0x12345678 6
+. BF 30 00 00 00 C3
+
+movl $48, %edx
+. 3045 0x12345678 6
+. BA 30 00 00 00 C3
+
+movl 48(%r13), %edx
+. 3046 0x12345678 5
+. 41 8B 55 30 C3
+
+movl 48(%r8), %edi
+. 3047 0x12345678 5
+. 41 8B 78 30 C3
+
+movl $4, 8(%rax)
+. 3048 0x12345678 8
+. C7 40 08 04 00 00 00 C3
+
+movl 48(%rax), %edx
+. 3049 0x12345678 4
+. 8B 50 30 C3
+
+movl 48(%rax), %r8d
+. 3050 0x12345678 5
+. 44 8B 40 30 C3
+
+movl 48(%rax), %r9d
+. 3051 0x12345678 5
+. 44 8B 48 30 C3
+
+movl 48(%rbp), %edi
+. 3052 0x12345678 4
+. 8B 7D 30 C3
+
+movl 48(%rsp), %eax
+. 3053 0x12345678 5
+. 8B 44 24 30 C3
+
+movl 48(%rsp), %edi
+. 3054 0x12345678 5
+. 8B 7C 24 30 C3
+
+movl 48(%rsp), %edx
+. 3055 0x12345678 5
+. 8B 54 24 30 C3
+
+movl 48(%rsp), %esi
+. 3056 0x12345678 5
+. 8B 74 24 30 C3
+
+movl 492(%rsp), %edi
+. 3057 0x12345678 8
+. 8B BC 24 EC 01 00 00 C3
+
+movl 492(%rsp), %esi
+. 3058 0x12345678 8
+. 8B B4 24 EC 01 00 00 C3
+
+movl $4950, %edx
+. 3059 0x12345678 6
+. BA 56 13 00 00 C3
+
+movl $4957, %edx
+. 3060 0x12345678 6
+. BA 5D 13 00 00 C3
+
+movl $4958, %edx
+. 3061 0x12345678 6
+. BA 5E 13 00 00 C3
+
+movl $496, %edx
+. 3062 0x12345678 6
+. BA F0 01 00 00 C3
+
+movl $4, 96(%rax)
+. 3063 0x12345678 8
+. C7 40 60 04 00 00 00 C3
+
+movl $4, 96(%rbx)
+. 3064 0x12345678 8
+. C7 43 60 04 00 00 00 C3
+
+movl $499, %edx
+. 3065 0x12345678 6
+. BA F3 01 00 00 C3
+
+movl $49, %ecx
+. 3066 0x12345678 6
+. B9 31 00 00 00 C3
+
+movl $4, %eax
+. 3067 0x12345678 6
+. B8 04 00 00 00 C3
+
+movl $4, %ebp
+. 3068 0x12345678 6
+. BD 04 00 00 00 C3
+
+movl $4, %ecx
+. 3069 0x12345678 6
+. B9 04 00 00 00 C3
+
+movl $-4, %edi
+. 3070 0x12345678 6
+. BF FC FF FF FF C3
+
+movl $4, %edi
+. 3071 0x12345678 6
+. BF 04 00 00 00 C3
+
+movl 4, %edx
+. 3072 0x12345678 8
+. 8B 14 25 04 00 00 00 C3
+
+movl $4, %esi
+. 3073 0x12345678 6
+. BE 04 00 00 00 C3
+
+movl 4(%r13), %eax
+. 3074 0x12345678 5
+. 41 8B 45 04 C3
+
+movl 4(%r13), %edi
+. 3075 0x12345678 5
+. 41 8B 7D 04 C3
+
+movl $4, %r14d
+. 3076 0x12345678 7
+. 41 BE 04 00 00 00 C3
+
+movl $4, %r8d
+. 3077 0x12345678 7
+. 41 B8 04 00 00 00 C3
+
+movl 4(%r8), %eax
+. 3078 0x12345678 5
+. 41 8B 40 04 C3
+
+movl $4, (%rax)
+. 3079 0x12345678 7
+. C7 00 04 00 00 00 C3
+
+movl 4(%rax), %eax
+. 3080 0x12345678 4
+. 8B 40 04 C3
+
+movl 4(%rax), %edi
+. 3081 0x12345678 4
+. 8B 78 04 C3
+
+movl 4(%rbx), %edi
+. 3082 0x12345678 4
+. 8B 7B 04 C3
+
+movl 4(%rdi), %edi
+. 3083 0x12345678 4
+. 8B 7F 04 C3
+
+movl 4(%rdi), %esi
+. 3084 0x12345678 4
+. 8B 77 04 C3
+
+movl 4(%rsi), %eax
+. 3085 0x12345678 4
+. 8B 46 04 C3
+
+movl 4(%rsp), %ebx
+. 3086 0x12345678 5
+. 8B 5C 24 04 C3
+
+movl 4(%rsp), %ecx
+. 3087 0x12345678 5
+. 8B 4C 24 04 C3
+
+movl 4(%rsp), %edi
+. 3088 0x12345678 5
+. 8B 7C 24 04 C3
+
+movl 4(%rsp), %esi
+. 3089 0x12345678 5
+. 8B 74 24 04 C3
+
+movl $5000, 24(%rsp)
+. 3090 0x12345678 9
+. C7 44 24 18 88 13 00 00 C3
+
+movl 500(%rsp), %edi
+. 3091 0x12345678 8
+. 8B BC 24 F4 01 00 00 C3
+
+movl 500(%rsp), %esi
+. 3092 0x12345678 8
+. 8B B4 24 F4 01 00 00 C3
+
+movl $50, 16(%rdi)
+. 3093 0x12345678 8
+. C7 47 10 32 00 00 00 C3
+
+movl $501, %edx
+. 3094 0x12345678 6
+. BA F5 01 00 00 C3
+
+movl $504, %edx
+. 3095 0x12345678 6
+. BA F8 01 00 00 C3
+
+movl 504(%rsp), %edi
+. 3096 0x12345678 8
+. 8B BC 24 F8 01 00 00 C3
+
+movl 504(%rsp), %esi
+. 3097 0x12345678 8
+. 8B B4 24 F8 01 00 00 C3
+
+movl $505, %edx
+. 3098 0x12345678 6
+. BA F9 01 00 00 C3
+
+movl $507, %edx
+. 3099 0x12345678 6
+. BA FB 01 00 00 C3
+
+movl $5088, %edx
+. 3100 0x12345678 6
+. BA E0 13 00 00 C3
+
+movl $5089, %edx
+. 3101 0x12345678 6
+. BA E1 13 00 00 C3
+
+movl 508(%rsp), %ecx
+. 3102 0x12345678 8
+. 8B 8C 24 FC 01 00 00 C3
+
+movl 508(%rsp), %edx
+. 3103 0x12345678 8
+. 8B 94 24 FC 01 00 00 C3
+
+movl $5092, %edx
+. 3104 0x12345678 6
+. BA E4 13 00 00 C3
+
+movl $5093, %edx
+. 3105 0x12345678 6
+. BA E5 13 00 00 C3
+
+movl $509, %edx
+. 3106 0x12345678 6
+. BA FD 01 00 00 C3
+
+movl $511, %edx
+. 3107 0x12345678 6
+. BA FF 01 00 00 C3
+
+movl $512, 40(%rbx)
+. 3108 0x12345678 8
+. C7 43 28 00 02 00 00 C3
+
+movl $512, %edx
+. 3109 0x12345678 6
+. BA 00 02 00 00 C3
+
+movl $5158, %edx
+. 3110 0x12345678 6
+. BA 26 14 00 00 C3
+
+movl 516(%rsp), %ecx
+. 3111 0x12345678 8
+. 8B 8C 24 04 02 00 00 C3
+
+movl 516(%rsp), %edx
+. 3112 0x12345678 8
+. 8B 94 24 04 02 00 00 C3
+
+movl $5181, %edx
+. 3113 0x12345678 6
+. BA 3D 14 00 00 C3
+
+movl $519, %edx
+. 3114 0x12345678 6
+. BA 07 02 00 00 C3
+
+movl $5200, %edx
+. 3115 0x12345678 6
+. BA 50 14 00 00 C3
+
+movl $5202, %edx
+. 3116 0x12345678 6
+. BA 52 14 00 00 C3
+
+movl 520(%rsp), %ecx
+. 3117 0x12345678 8
+. 8B 8C 24 08 02 00 00 C3
+
+movl 520(%rsp), %edx
+. 3118 0x12345678 8
+. 8B 94 24 08 02 00 00 C3
+
+movl $5222, %edx
+. 3119 0x12345678 6
+. BA 66 14 00 00 C3
+
+movl $5237, %edx
+. 3120 0x12345678 6
+. BA 75 14 00 00 C3
+
+movl 524(%rsp), %ecx
+. 3121 0x12345678 8
+. 8B 8C 24 0C 02 00 00 C3
+
+movl 524(%rsp), %edi
+. 3122 0x12345678 8
+. 8B BC 24 0C 02 00 00 C3
+
+movl 524(%rsp), %edx
+. 3123 0x12345678 8
+. 8B 94 24 0C 02 00 00 C3
+
+movl 524(%rsp), %esi
+. 3124 0x12345678 8
+. 8B B4 24 0C 02 00 00 C3
+
+movl $52, %eax
+. 3125 0x12345678 6
+. B8 34 00 00 00 C3
+
+movl $52, %edi
+. 3126 0x12345678 6
+. BF 34 00 00 00 C3
+
+movl 52(%r8,%rax,4), %eax
+. 3127 0x12345678 6
+. 41 8B 44 80 34 C3
+
+movl 52(%rsp), %edi
+. 3128 0x12345678 5
+. 8B 7C 24 34 C3
+
+movl 532(%rsp), %ecx
+. 3129 0x12345678 8
+. 8B 8C 24 14 02 00 00 C3
+
+movl 532(%rsp), %edi
+. 3130 0x12345678 8
+. 8B BC 24 14 02 00 00 C3
+
+movl 532(%rsp), %edx
+. 3131 0x12345678 8
+. 8B 94 24 14 02 00 00 C3
+
+movl 532(%rsp), %esi
+. 3132 0x12345678 8
+. 8B B4 24 14 02 00 00 C3
+
+movl 536(%rsp), %ecx
+. 3133 0x12345678 8
+. 8B 8C 24 18 02 00 00 C3
+
+movl 536(%rsp), %edi
+. 3134 0x12345678 8
+. 8B BC 24 18 02 00 00 C3
+
+movl 536(%rsp), %edx
+. 3135 0x12345678 8
+. 8B 94 24 18 02 00 00 C3
+
+movl 536(%rsp), %esi
+. 3136 0x12345678 8
+. 8B B4 24 18 02 00 00 C3
+
+movl 540(%rsp), %edi
+. 3137 0x12345678 8
+. 8B BC 24 1C 02 00 00 C3
+
+movl $541, %edx
+. 3138 0x12345678 6
+. BA 1D 02 00 00 C3
+
+movl $544, %edx
+. 3139 0x12345678 6
+. BA 20 02 00 00 C3
+
+movl 544(%rsp), %edi
+. 3140 0x12345678 8
+. 8B BC 24 20 02 00 00 C3
+
+movl 544(%rsp), %esi
+. 3141 0x12345678 8
+. 8B B4 24 20 02 00 00 C3
+
+movl $5, 48(%rax)
+. 3142 0x12345678 8
+. C7 40 30 05 00 00 00 C3
+
+movl $5, 48(%rbx)
+. 3143 0x12345678 8
+. C7 43 30 05 00 00 00 C3
+
+movl 548(%rsp), %edi
+. 3144 0x12345678 8
+. 8B BC 24 24 02 00 00 C3
+
+movl 548(%rsp), %edx
+. 3145 0x12345678 8
+. 8B 94 24 24 02 00 00 C3
+
+movl 548(%rsp), %esi
+. 3146 0x12345678 8
+. 8B B4 24 24 02 00 00 C3
+
+movl 552(%rsp), %ecx
+. 3147 0x12345678 8
+. 8B 8C 24 28 02 00 00 C3
+
+movl 552(%rsp), %edi
+. 3148 0x12345678 8
+. 8B BC 24 28 02 00 00 C3
+
+movl 556(%rsp), %edx
+. 3149 0x12345678 8
+. 8B 94 24 2C 02 00 00 C3
+
+movl $5583, %edx
+. 3150 0x12345678 6
+. BA CF 15 00 00 C3
+
+movl $560, %edx
+. 3151 0x12345678 6
+. BA 30 02 00 00 C3
+
+movl 560(%rsp), %edx
+. 3152 0x12345678 8
+. 8B 94 24 30 02 00 00 C3
+
+movl $567, %edx
+. 3153 0x12345678 6
+. BA 37 02 00 00 C3
+
+movl $569, %edx
+. 3154 0x12345678 6
+. BA 39 02 00 00 C3
+
+movl $56, %eax
+. 3155 0x12345678 6
+. B8 38 00 00 00 C3
+
+movl $56, %edi
+. 3156 0x12345678 6
+. BF 38 00 00 00 C3
+
+movl 56(%rsp), %eax
+. 3157 0x12345678 5
+. 8B 44 24 38 C3
+
+movl 56(%rsp), %edi
+. 3158 0x12345678 5
+. 8B 7C 24 38 C3
+
+movl 56(%rsp), %edx
+. 3159 0x12345678 5
+. 8B 54 24 38 C3
+
+movl 56(%rsp), %esi
+. 3160 0x12345678 5
+. 8B 74 24 38 C3
+
+movl $5700, %edx
+. 3161 0x12345678 6
+. BA 44 16 00 00 C3
+
+movl 572(%rsp), %eax
+. 3162 0x12345678 8
+. 8B 84 24 3C 02 00 00 C3
+
+movl 572(%rsp), %ecx
+. 3163 0x12345678 8
+. 8B 8C 24 3C 02 00 00 C3
+
+movl $574, %edx
+. 3164 0x12345678 6
+. BA 3E 02 00 00 C3
+
+movl $575, %edx
+. 3165 0x12345678 6
+. BA 3F 02 00 00 C3
+
+movl $5835, %edx
+. 3166 0x12345678 6
+. BA CB 16 00 00 C3
+
+movl $5930, %edx
+. 3167 0x12345678 6
+. BA 2A 17 00 00 C3
+
+movl $5, %eax
+. 3168 0x12345678 6
+. B8 05 00 00 00 C3
+
+movl $5, %ebp
+. 3169 0x12345678 6
+. BD 05 00 00 00 C3
+
+movl $5, %edi
+. 3170 0x12345678 6
+. BF 05 00 00 00 C3
+
+movl $5, %edx
+. 3171 0x12345678 6
+. BA 05 00 00 00 C3
+
+movl $5, %esi
+. 3172 0x12345678 6
+. BE 05 00 00 00 C3
+
+movl $5, (%rax)
+. 3173 0x12345678 7
+. C7 00 05 00 00 00 C3
+
+movl $5, (%rcx)
+. 3174 0x12345678 7
+. C7 01 05 00 00 00 C3
+
+movl $5, (%rdx)
+. 3175 0x12345678 7
+. C7 02 05 00 00 00 C3
+
+movl $604, %edx
+. 3176 0x12345678 6
+. BA 5C 02 00 00 C3
+
+movl $60, 56(%rax)
+. 3177 0x12345678 8
+. C7 40 38 3C 00 00 00 C3
+
+movl $60, 56(%rbx)
+. 3178 0x12345678 8
+. C7 43 38 3C 00 00 00 C3
+
+movl $607, %edx
+. 3179 0x12345678 6
+. BA 5F 02 00 00 C3
+
+movl $608, %edx
+. 3180 0x12345678 6
+. BA 60 02 00 00 C3
+
+movl $60, %eax
+. 3181 0x12345678 6
+. B8 3C 00 00 00 C3
+
+movl $60, %edi
+. 3182 0x12345678 6
+. BF 3C 00 00 00 C3
+
+movl 60(%rsp), %eax
+. 3183 0x12345678 5
+. 8B 44 24 3C C3
+
+movl 60(%rsp), %edi
+. 3184 0x12345678 5
+. 8B 7C 24 3C C3
+
+movl 60(%rsp), %edx
+. 3185 0x12345678 5
+. 8B 54 24 3C C3
+
+movl 60(%rsp), %esi
+. 3186 0x12345678 5
+. 8B 74 24 3C C3
+
+movl $612, %edx
+. 3187 0x12345678 6
+. BA 64 02 00 00 C3
+
+movl $615, %edx
+. 3188 0x12345678 6
+. BA 67 02 00 00 C3
+
+movl $616, %edx
+. 3189 0x12345678 6
+. BA 68 02 00 00 C3
+
+movl $623, %edx
+. 3190 0x12345678 6
+. BA 6F 02 00 00 C3
+
+movl $624, %edx
+. 3191 0x12345678 6
+. BA 70 02 00 00 C3
+
+movl $6253, %edx
+. 3192 0x12345678 6
+. BA 6D 18 00 00 C3
+
+movl $6277, %edx
+. 3193 0x12345678 6
+. BA 85 18 00 00 C3
+
+movl $6292, %edx
+. 3194 0x12345678 6
+. BA 94 18 00 00 C3
+
+movl $630, %edx
+. 3195 0x12345678 6
+. BA 76 02 00 00 C3
+
+movl $631, %edx
+. 3196 0x12345678 6
+. BA 77 02 00 00 C3
+
+movl $63, %edi
+. 3197 0x12345678 6
+. BF 3F 00 00 00 C3
+
+movl $640, %edx
+. 3198 0x12345678 6
+. BA 80 02 00 00 C3
+
+movl $641, %edx
+. 3199 0x12345678 6
+. BA 81 02 00 00 C3
+
+movl $642, %edx
+. 3200 0x12345678 6
+. BA 82 02 00 00 C3
+
+movl $644, %edx
+. 3201 0x12345678 6
+. BA 84 02 00 00 C3
+
+movl $64, 68(%rax)
+. 3202 0x12345678 8
+. C7 40 44 40 00 00 00 C3
+
+movl $64, 68(%rbx)
+. 3203 0x12345678 8
+. C7 43 44 40 00 00 00 C3
+
+movl $64, 72(%rax)
+. 3204 0x12345678 8
+. C7 40 48 40 00 00 00 C3
+
+movl $64, 72(%rbx)
+. 3205 0x12345678 8
+. C7 43 48 40 00 00 00 C3
+
+movl $64, 8(%rsp)
+. 3206 0x12345678 9
+. C7 44 24 08 40 00 00 00 C3
+
+movl $64, %eax
+. 3207 0x12345678 6
+. B8 40 00 00 00 C3
+
+movl $64, %edi
+. 3208 0x12345678 6
+. BF 40 00 00 00 C3
+
+movl $64, %edx
+. 3209 0x12345678 6
+. BA 40 00 00 00 C3
+
+movl $64, %r14d
+. 3210 0x12345678 7
+. 41 BE 40 00 00 00 C3
+
+movl 64(%rsp), %ecx
+. 3211 0x12345678 5
+. 8B 4C 24 40 C3
+
+movl 64(%rsp), %edx
+. 3212 0x12345678 5
+. 8B 54 24 40 C3
+
+movl $65280, %edi
+. 3213 0x12345678 6
+. BF 00 FF 00 00 C3
+
+movl $653, %edx
+. 3214 0x12345678 6
+. BA 8D 02 00 00 C3
+
+movl $65535, %eax
+. 3215 0x12345678 6
+. B8 FF FF 00 00 C3
+
+movl $65535, %ecx
+. 3216 0x12345678 6
+. B9 FF FF 00 00 C3
+
+movl $65535, %r12d
+. 3217 0x12345678 7
+. 41 BC FF FF 00 00 C3
+
+movl $65535, %r9d
+. 3218 0x12345678 7
+. 41 B9 FF FF 00 00 C3
+
+movl $659, %edx
+. 3219 0x12345678 6
+. BA 93 02 00 00 C3
+
+movl $6604, %edx
+. 3220 0x12345678 6
+. BA CC 19 00 00 C3
+
+movl $664, %edx
+. 3221 0x12345678 6
+. BA 98 02 00 00 C3
+
+movl $6660, %edx
+. 3222 0x12345678 6
+. BA 04 1A 00 00 C3
+
+movl 672(%rsp,%r8,4), %ebp
+. 3223 0x12345678 9
+. 42 8B AC 84 A0 02 00 00 C3
+
+movl 672(%rsp,%rax,4), %ebp
+. 3224 0x12345678 8
+. 8B AC 84 A0 02 00 00 C3
+
+movl 672(%rsp,%rdx,4), %ebp
+. 3225 0x12345678 8
+. 8B AC 94 A0 02 00 00 C3
+
+movl $673, %edx
+. 3226 0x12345678 6
+. BA A1 02 00 00 C3
+
+movl $6745, %edx
+. 3227 0x12345678 6
+. BA 59 1A 00 00 C3
+
+movl $674, %edx
+. 3228 0x12345678 6
+. BA A2 02 00 00 C3
+
+movl $6768, %edx
+. 3229 0x12345678 6
+. BA 70 1A 00 00 C3
+
+movl $6786, %edx
+. 3230 0x12345678 6
+. BA 82 1A 00 00 C3
+
+movl $6788, %edx
+. 3231 0x12345678 6
+. BA 84 1A 00 00 C3
+
+movl $6807, %edx
+. 3232 0x12345678 6
+. BA 97 1A 00 00 C3
+
+movl $680, %edx
+. 3233 0x12345678 6
+. BA A8 02 00 00 C3
+
+movl $681, %edx
+. 3234 0x12345678 6
+. BA A9 02 00 00 C3
+
+movl $6822, %edx
+. 3235 0x12345678 6
+. BA A6 1A 00 00 C3
+
+movl $6841, %edx
+. 3236 0x12345678 6
+. BA B9 1A 00 00 C3
+
+movl $684, %edx
+. 3237 0x12345678 6
+. BA AC 02 00 00 C3
+
+movl $6857, %edx
+. 3238 0x12345678 6
+. BA C9 1A 00 00 C3
+
+movl $6858, %edx
+. 3239 0x12345678 6
+. BA CA 1A 00 00 C3
+
+movl $6859, %edx
+. 3240 0x12345678 6
+. BA CB 1A 00 00 C3
+
+movl $6860, %edx
+. 3241 0x12345678 6
+. BA CC 1A 00 00 C3
+
+movl $686, %edx
+. 3242 0x12345678 6
+. BA AE 02 00 00 C3
+
+movl $687, %edx
+. 3243 0x12345678 6
+. BA AF 02 00 00 C3
+
+movl 688(%rsp,%r8,4), %eax
+. 3244 0x12345678 9
+. 42 8B 84 84 B0 02 00 00 C3
+
+movl 688(%rsp,%rdx,4), %eax
+. 3245 0x12345678 8
+. 8B 84 94 B0 02 00 00 C3
+
+movl $6896, %edx
+. 3246 0x12345678 6
+. BA F0 1A 00 00 C3
+
+movl $6897, %edx
+. 3247 0x12345678 6
+. BA F1 1A 00 00 C3
+
+movl $6898, %edx
+. 3248 0x12345678 6
+. BA F2 1A 00 00 C3
+
+movl $6899, %edx
+. 3249 0x12345678 6
+. BA F3 1A 00 00 C3
+
+movl $68, %eax
+. 3250 0x12345678 6
+. B8 44 00 00 00 C3
+
+movl $68, %edi
+. 3251 0x12345678 6
+. BF 44 00 00 00 C3
+
+movl 68(%rsp), %eax
+. 3252 0x12345678 5
+. 8B 44 24 44 C3
+
+movl 68(%rsp), %ebp
+. 3253 0x12345678 5
+. 8B 6C 24 44 C3
+
+movl 68(%rsp), %ebx
+. 3254 0x12345678 5
+. 8B 5C 24 44 C3
+
+movl 68(%rsp), %edi
+. 3255 0x12345678 5
+. 8B 7C 24 44 C3
+
+movl 68(%rsp), %edx
+. 3256 0x12345678 5
+. 8B 54 24 44 C3
+
+movl $690, %edx
+. 3257 0x12345678 6
+. BA B2 02 00 00 C3
+
+movl $691, %edx
+. 3258 0x12345678 6
+. BA B3 02 00 00 C3
+
+movl $69631, (%rcx)
+. 3259 0x12345678 7
+. C7 01 FF 0F 01 00 C3
+
+movl $69631, (%rdx)
+. 3260 0x12345678 7
+. C7 02 FF 0F 01 00 C3
+
+movl $69631, (%rsi)
+. 3261 0x12345678 7
+. C7 06 FF 0F 01 00 C3
+
+movl $69632, %eax
+. 3262 0x12345678 6
+. B8 00 10 01 00 C3
+
+movl $69632, (%rdx)
+. 3263 0x12345678 7
+. C7 02 00 10 01 00 C3
+
+movl $69632, (%rsi)
+. 3264 0x12345678 7
+. C7 06 00 10 01 00 C3
+
+movl $69633, %eax
+. 3265 0x12345678 6
+. B8 01 10 01 00 C3
+
+movl $69633, %edi
+. 3266 0x12345678 6
+. BF 01 10 01 00 C3
+
+movl $69633, %edx
+. 3267 0x12345678 6
+. BA 01 10 01 00 C3
+
+movl $69633, %esi
+. 3268 0x12345678 6
+. BE 01 10 01 00 C3
+
+movl $69633, (%rcx)
+. 3269 0x12345678 7
+. C7 01 01 10 01 00 C3
+
+movl $69633, (%rdx)
+. 3270 0x12345678 7
+. C7 02 01 10 01 00 C3
+
+movl $69633, (%rsi)
+. 3271 0x12345678 7
+. C7 06 01 10 01 00 C3
+
+movl $69634, %eax
+. 3272 0x12345678 6
+. B8 02 10 01 00 C3
+
+movl $69634, %edi
+. 3273 0x12345678 6
+. BF 02 10 01 00 C3
+
+movl $69634, %esi
+. 3274 0x12345678 6
+. BE 02 10 01 00 C3
+
+movl $69634, (%rcx)
+. 3275 0x12345678 7
+. C7 01 02 10 01 00 C3
+
+movl $69634, (%rdx)
+. 3276 0x12345678 7
+. C7 02 02 10 01 00 C3
+
+movl $69634, (%rsi)
+. 3277 0x12345678 7
+. C7 06 02 10 01 00 C3
+
+movl $69635, 64(%rsp)
+. 3278 0x12345678 9
+. C7 44 24 40 03 10 01 00 C3
+
+movl $69635, %eax
+. 3279 0x12345678 6
+. B8 03 10 01 00 C3
+
+movl $69635, %edi
+. 3280 0x12345678 6
+. BF 03 10 01 00 C3
+
+movl $69635, %edx
+. 3281 0x12345678 6
+. BA 03 10 01 00 C3
+
+movl $69635, %esi
+. 3282 0x12345678 6
+. BE 03 10 01 00 C3
+
+movl $69635, (%rcx)
+. 3283 0x12345678 7
+. C7 01 03 10 01 00 C3
+
+movl $69635, (%rdx)
+. 3284 0x12345678 7
+. C7 02 03 10 01 00 C3
+
+movl $69635, (%rsi)
+. 3285 0x12345678 7
+. C7 06 03 10 01 00 C3
+
+movl $69636, 64(%rsp)
+. 3286 0x12345678 9
+. C7 44 24 40 04 10 01 00 C3
+
+movl $69636, %eax
+. 3287 0x12345678 6
+. B8 04 10 01 00 C3
+
+movl $69636, %edi
+. 3288 0x12345678 6
+. BF 04 10 01 00 C3
+
+movl $69636, %esi
+. 3289 0x12345678 6
+. BE 04 10 01 00 C3
+
+movl $69636, (%rcx)
+. 3290 0x12345678 7
+. C7 01 04 10 01 00 C3
+
+movl $69636, (%rdx)
+. 3291 0x12345678 7
+. C7 02 04 10 01 00 C3
+
+movl $69636, (%rsi)
+. 3292 0x12345678 7
+. C7 06 04 10 01 00 C3
+
+movl $69637, %edi
+. 3293 0x12345678 6
+. BF 05 10 01 00 C3
+
+movl $69637, %esi
+. 3294 0x12345678 6
+. BE 05 10 01 00 C3
+
+movl $69637, (%rdx)
+. 3295 0x12345678 7
+. C7 02 05 10 01 00 C3
+
+movl $69637, (%rsi)
+. 3296 0x12345678 7
+. C7 06 05 10 01 00 C3
+
+movl $69638, %eax
+. 3297 0x12345678 6
+. B8 06 10 01 00 C3
+
+movl $69638, %edi
+. 3298 0x12345678 6
+. BF 06 10 01 00 C3
+
+movl $69638, %esi
+. 3299 0x12345678 6
+. BE 06 10 01 00 C3
+
+movl $69638, (%rcx)
+. 3300 0x12345678 7
+. C7 01 06 10 01 00 C3
+
+movl $69638, (%rdx)
+. 3301 0x12345678 7
+. C7 02 06 10 01 00 C3
+
+movl $69638, (%rsi)
+. 3302 0x12345678 7
+. C7 06 06 10 01 00 C3
+
+movl $69639, %eax
+. 3303 0x12345678 6
+. B8 07 10 01 00 C3
+
+movl $69639, %edi
+. 3304 0x12345678 6
+. BF 07 10 01 00 C3
+
+movl $69639, %esi
+. 3305 0x12345678 6
+. BE 07 10 01 00 C3
+
+movl $69639, (%rcx)
+. 3306 0x12345678 7
+. C7 01 07 10 01 00 C3
+
+movl $69639, (%rdx)
+. 3307 0x12345678 7
+. C7 02 07 10 01 00 C3
+
+movl $69639, (%rsi)
+. 3308 0x12345678 7
+. C7 06 07 10 01 00 C3
+
+movl $696, %edx
+. 3309 0x12345678 6
+. BA B8 02 00 00 C3
+
+movl $69, %edi
+. 3310 0x12345678 6
+. BF 45 00 00 00 C3
+
+movl $6, %eax
+. 3311 0x12345678 6
+. B8 06 00 00 00 C3
+
+movl $6, %edi
+. 3312 0x12345678 6
+. BF 06 00 00 00 C3
+
+movl $6, %edx
+. 3313 0x12345678 6
+. BA 06 00 00 00 C3
+
+movl $6, %esi
+. 3314 0x12345678 6
+. BE 06 00 00 00 C3
+
+movl $6, (%rax)
+. 3315 0x12345678 7
+. C7 00 06 00 00 00 C3
+
+movl $6, (%rcx)
+. 3316 0x12345678 7
+. C7 01 06 00 00 00 C3
+
+movl $6, (%rdx)
+. 3317 0x12345678 7
+. C7 02 06 00 00 00 C3
+
+movl $702, %edx
+. 3318 0x12345678 6
+. BA BE 02 00 00 C3
+
+movl 704(%rsp), %r10d
+. 3319 0x12345678 9
+. 44 8B 94 24 C0 02 00 00 C3
+
+movl $708, %edx
+. 3320 0x12345678 6
+. BA C4 02 00 00 C3
+
+movl $7092, %edx
+. 3321 0x12345678 6
+. BA B4 1B 00 00 C3
+
+movl $70, %edx
+. 3322 0x12345678 6
+. BA 46 00 00 00 C3
+
+movl $714, %edx
+. 3323 0x12345678 6
+. BA CA 02 00 00 C3
+
+movl $7174, %edx
+. 3324 0x12345678 6
+. BA 06 1C 00 00 C3
+
+movl $7199, %edx
+. 3325 0x12345678 6
+. BA 1F 1C 00 00 C3
+
+movl $721, %edx
+. 3326 0x12345678 6
+. BA D1 02 00 00 C3
+
+movl $722, %edx
+. 3327 0x12345678 6
+. BA D2 02 00 00 C3
+
+movl $723, %edx
+. 3328 0x12345678 6
+. BA D3 02 00 00 C3
+
+movl $7284, %edx
+. 3329 0x12345678 6
+. BA 74 1C 00 00 C3
+
+movl $72, %eax
+. 3330 0x12345678 6
+. B8 48 00 00 00 C3
+
+movl $72, %edi
+. 3331 0x12345678 6
+. BF 48 00 00 00 C3
+
+movl 72(%rsp), %edi
+. 3332 0x12345678 5
+. 8B 7C 24 48 C3
+
+movl $736, %edx
+. 3333 0x12345678 6
+. BA E0 02 00 00 C3
+
+movl $73728, (%rax)
+. 3334 0x12345678 7
+. C7 00 00 20 01 00 C3
+
+movl $73729, (%rax)
+. 3335 0x12345678 7
+. C7 00 01 20 01 00 C3
+
+movl $73730, (%rax)
+. 3336 0x12345678 7
+. C7 00 02 20 01 00 C3
+
+movl $73731, (%rax)
+. 3337 0x12345678 7
+. C7 00 03 20 01 00 C3
+
+movl $73732, (%rax)
+. 3338 0x12345678 7
+. C7 00 04 20 01 00 C3
+
+movl $73733, (%rax)
+. 3339 0x12345678 7
+. C7 00 05 20 01 00 C3
+
+movl $73734, (%rax)
+. 3340 0x12345678 7
+. C7 00 06 20 01 00 C3
+
+movl $73735, (%rax)
+. 3341 0x12345678 7
+. C7 00 07 20 01 00 C3
+
+movl $7375, %edx
+. 3342 0x12345678 6
+. BA CF 1C 00 00 C3
+
+movl $737, %edx
+. 3343 0x12345678 6
+. BA E1 02 00 00 C3
+
+movl $738, %edx
+. 3344 0x12345678 6
+. BA E2 02 00 00 C3
+
+movl $7416, %edx
+. 3345 0x12345678 6
+. BA F8 1C 00 00 C3
+
+movl $741, %edx
+. 3346 0x12345678 6
+. BA E5 02 00 00 C3
+
+movl $7429, %edx
+. 3347 0x12345678 6
+. BA 05 1D 00 00 C3
+
+movl $7430, %edx
+. 3348 0x12345678 6
+. BA 06 1D 00 00 C3
+
+movl $745, %edx
+. 3349 0x12345678 6
+. BA E9 02 00 00 C3
+
+movl $7476, %edx
+. 3350 0x12345678 6
+. BA 34 1D 00 00 C3
+
+movl $7489, %edx
+. 3351 0x12345678 6
+. BA 41 1D 00 00 C3
+
+movl $7, 48(%rbx)
+. 3352 0x12345678 8
+. C7 43 30 07 00 00 00 C3
+
+movl $751, %edx
+. 3353 0x12345678 6
+. BA EF 02 00 00 C3
+
+movl $761, %edx
+. 3354 0x12345678 6
+. BA F9 02 00 00 C3
+
+movl $764, %edx
+. 3355 0x12345678 6
+. BA FC 02 00 00 C3
+
+movl $7679, %edx
+. 3356 0x12345678 6
+. BA FF 1D 00 00 C3
+
+movl $76, %eax
+. 3357 0x12345678 6
+. B8 4C 00 00 00 C3
+
+movl $76, %edi
+. 3358 0x12345678 6
+. BF 4C 00 00 00 C3
+
+movl 76(%rsp), %edi
+. 3359 0x12345678 5
+. 8B 7C 24 4C C3
+
+movl 76(%rsp), %edx
+. 3360 0x12345678 5
+. 8B 54 24 4C C3
+
+movl $7702, %edx
+. 3361 0x12345678 6
+. BA 16 1E 00 00 C3
+
+movl $770, %edx
+. 3362 0x12345678 6
+. BA 02 03 00 00 C3
+
+movl $7725, %edx
+. 3363 0x12345678 6
+. BA 2D 1E 00 00 C3
+
+movl $776, %edx
+. 3364 0x12345678 6
+. BA 08 03 00 00 C3
+
+movl $7770, %edx
+. 3365 0x12345678 6
+. BA 5A 1E 00 00 C3
+
+movl $77824, 12(%rsp)
+. 3366 0x12345678 9
+. C7 44 24 0C 00 30 01 00 C3
+
+movl $77824, 44(%rsp)
+. 3367 0x12345678 9
+. C7 44 24 2C 00 30 01 00 C3
+
+movl $77824, 8(%rsp)
+. 3368 0x12345678 9
+. C7 44 24 08 00 30 01 00 C3
+
+movl $77824, %r13d
+. 3369 0x12345678 7
+. 41 BD 00 30 01 00 C3
+
+movl $77824, (%rsi)
+. 3370 0x12345678 7
+. C7 06 00 30 01 00 C3
+
+movl $77825, 12(%rsp)
+. 3371 0x12345678 9
+. C7 44 24 0C 01 30 01 00 C3
+
+movl $77825, 8(%rsp)
+. 3372 0x12345678 9
+. C7 44 24 08 01 30 01 00 C3
+
+movl $77825, %eax
+. 3373 0x12345678 6
+. B8 01 30 01 00 C3
+
+movl $77825, %edi
+. 3374 0x12345678 6
+. BF 01 30 01 00 C3
+
+movl $77825, %edx
+. 3375 0x12345678 6
+. BA 01 30 01 00 C3
+
+movl $77825, %esi
+. 3376 0x12345678 6
+. BE 01 30 01 00 C3
+
+movl $77827, %edi
+. 3377 0x12345678 6
+. BF 03 30 01 00 C3
+
+movl $77828, %edi
+. 3378 0x12345678 6
+. BF 04 30 01 00 C3
+
+movl $77828, %r13d
+. 3379 0x12345678 7
+. 41 BD 04 30 01 00 C3
+
+movl $77829, 12(%rsp)
+. 3380 0x12345678 9
+. C7 44 24 0C 05 30 01 00 C3
+
+movl $77829, 8(%rsp)
+. 3381 0x12345678 9
+. C7 44 24 08 05 30 01 00 C3
+
+movl $77829, %eax
+. 3382 0x12345678 6
+. B8 05 30 01 00 C3
+
+movl $77829, %edi
+. 3383 0x12345678 6
+. BF 05 30 01 00 C3
+
+movl $77829, %edx
+. 3384 0x12345678 6
+. BA 05 30 01 00 C3
+
+movl $77829, %esi
+. 3385 0x12345678 6
+. BE 05 30 01 00 C3
+
+movl $77831, %edi
+. 3386 0x12345678 6
+. BF 07 30 01 00 C3
+
+movl $77832, %edi
+. 3387 0x12345678 6
+. BF 08 30 01 00 C3
+
+movl $77832, %r13d
+. 3388 0x12345678 7
+. 41 BD 08 30 01 00 C3
+
+movl $77833, %eax
+. 3389 0x12345678 6
+. B8 09 30 01 00 C3
+
+movl $77833, %esi
+. 3390 0x12345678 6
+. BE 09 30 01 00 C3
+
+movl $77837, 12(%rsp)
+. 3391 0x12345678 9
+. C7 44 24 0C 0D 30 01 00 C3
+
+movl $77837, 8(%rsp)
+. 3392 0x12345678 9
+. C7 44 24 08 0D 30 01 00 C3
+
+movl $77837, %eax
+. 3393 0x12345678 6
+. B8 0D 30 01 00 C3
+
+movl $77837, %edi
+. 3394 0x12345678 6
+. BF 0D 30 01 00 C3
+
+movl $77837, %edx
+. 3395 0x12345678 6
+. BA 0D 30 01 00 C3
+
+movl $77837, %esi
+. 3396 0x12345678 6
+. BE 0D 30 01 00 C3
+
+movl $77839, %edi
+. 3397 0x12345678 6
+. BF 0F 30 01 00 C3
+
+movl $77840, %edi
+. 3398 0x12345678 6
+. BF 10 30 01 00 C3
+
+movl $77840, %r13d
+. 3399 0x12345678 7
+. 41 BD 10 30 01 00 C3
+
+movl $77841, 12(%rsp)
+. 3400 0x12345678 9
+. C7 44 24 0C 11 30 01 00 C3
+
+movl $77841, 8(%rsp)
+. 3401 0x12345678 9
+. C7 44 24 08 11 30 01 00 C3
+
+movl $77841, %eax
+. 3402 0x12345678 6
+. B8 11 30 01 00 C3
+
+movl $77841, %edi
+. 3403 0x12345678 6
+. BF 11 30 01 00 C3
+
+movl $77841, %edx
+. 3404 0x12345678 6
+. BA 11 30 01 00 C3
+
+movl $77841, %esi
+. 3405 0x12345678 6
+. BE 11 30 01 00 C3
+
+movl $77843, %edi
+. 3406 0x12345678 6
+. BF 13 30 01 00 C3
+
+movl $77844, %edi
+. 3407 0x12345678 6
+. BF 14 30 01 00 C3
+
+movl $77844, %r13d
+. 3408 0x12345678 7
+. 41 BD 14 30 01 00 C3
+
+movl $77845, 12(%rsp)
+. 3409 0x12345678 9
+. C7 44 24 0C 15 30 01 00 C3
+
+movl $77845, 8(%rsp)
+. 3410 0x12345678 9
+. C7 44 24 08 15 30 01 00 C3
+
+movl $77845, %eax
+. 3411 0x12345678 6
+. B8 15 30 01 00 C3
+
+movl $77845, %edi
+. 3412 0x12345678 6
+. BF 15 30 01 00 C3
+
+movl $77845, %edx
+. 3413 0x12345678 6
+. BA 15 30 01 00 C3
+
+movl $77845, %esi
+. 3414 0x12345678 6
+. BE 15 30 01 00 C3
+
+movl $77847, %edi
+. 3415 0x12345678 6
+. BF 17 30 01 00 C3
+
+movl $77848, %r13d
+. 3416 0x12345678 7
+. 41 BD 18 30 01 00 C3
+
+movl $77849, %eax
+. 3417 0x12345678 6
+. B8 19 30 01 00 C3
+
+movl $77849, %edi
+. 3418 0x12345678 6
+. BF 19 30 01 00 C3
+
+movl $77849, %esi
+. 3419 0x12345678 6
+. BE 19 30 01 00 C3
+
+movl $77851, 20(%rsp)
+. 3420 0x12345678 9
+. C7 44 24 14 1B 30 01 00 C3
+
+movl $77851, 28(%rsp)
+. 3421 0x12345678 9
+. C7 44 24 1C 1B 30 01 00 C3
+
+movl $77851, %edi
+. 3422 0x12345678 6
+. BF 1B 30 01 00 C3
+
+movl $77852, 20(%rsp)
+. 3423 0x12345678 9
+. C7 44 24 14 1C 30 01 00 C3
+
+movl $77852, %ecx
+. 3424 0x12345678 6
+. B9 1C 30 01 00 C3
+
+movl $77852, %edi
+. 3425 0x12345678 6
+. BF 1C 30 01 00 C3
+
+movl $77852, %edx
+. 3426 0x12345678 6
+. BA 1C 30 01 00 C3
+
+movl $77853, %eax
+. 3427 0x12345678 6
+. B8 1D 30 01 00 C3
+
+movl $77853, %esi
+. 3428 0x12345678 6
+. BE 1D 30 01 00 C3
+
+movl $77855, 20(%rsp)
+. 3429 0x12345678 9
+. C7 44 24 14 1F 30 01 00 C3
+
+movl $77855, 28(%rsp)
+. 3430 0x12345678 9
+. C7 44 24 1C 1F 30 01 00 C3
+
+movl $77855, %edi
+. 3431 0x12345678 6
+. BF 1F 30 01 00 C3
+
+movl $77856, 20(%rsp)
+. 3432 0x12345678 9
+. C7 44 24 14 20 30 01 00 C3
+
+movl $77856, %ecx
+. 3433 0x12345678 6
+. B9 20 30 01 00 C3
+
+movl $77856, %edi
+. 3434 0x12345678 6
+. BF 20 30 01 00 C3
+
+movl $77856, %edx
+. 3435 0x12345678 6
+. BA 20 30 01 00 C3
+
+movl $77857, %eax
+. 3436 0x12345678 6
+. B8 21 30 01 00 C3
+
+movl $77857, %esi
+. 3437 0x12345678 6
+. BE 21 30 01 00 C3
+
+movl $77859, 20(%rsp)
+. 3438 0x12345678 9
+. C7 44 24 14 23 30 01 00 C3
+
+movl $77859, 28(%rsp)
+. 3439 0x12345678 9
+. C7 44 24 1C 23 30 01 00 C3
+
+movl $77859, %edi
+. 3440 0x12345678 6
+. BF 23 30 01 00 C3
+
+movl $77860, 20(%rsp)
+. 3441 0x12345678 9
+. C7 44 24 14 24 30 01 00 C3
+
+movl $77861, %eax
+. 3442 0x12345678 6
+. B8 25 30 01 00 C3
+
+movl $77861, %edi
+. 3443 0x12345678 6
+. BF 25 30 01 00 C3
+
+movl $77861, %esi
+. 3444 0x12345678 6
+. BE 25 30 01 00 C3
+
+movl $77863, %edi
+. 3445 0x12345678 6
+. BF 27 30 01 00 C3
+
+movl $77865, %eax
+. 3446 0x12345678 6
+. B8 29 30 01 00 C3
+
+movl $77865, %esi
+. 3447 0x12345678 6
+. BE 29 30 01 00 C3
+
+movl $77867, %edi
+. 3448 0x12345678 6
+. BF 2B 30 01 00 C3
+
+movl $77869, %eax
+. 3449 0x12345678 6
+. B8 2D 30 01 00 C3
+
+movl $77869, %edi
+. 3450 0x12345678 6
+. BF 2D 30 01 00 C3
+
+movl $77869, %esi
+. 3451 0x12345678 6
+. BE 2D 30 01 00 C3
+
+movl $77871, %edi
+. 3452 0x12345678 6
+. BF 2F 30 01 00 C3
+
+movl $77872, %edi
+. 3453 0x12345678 6
+. BF 30 30 01 00 C3
+
+movl $77878, %edi
+. 3454 0x12345678 6
+. BF 36 30 01 00 C3
+
+movl $77879, %edi
+. 3455 0x12345678 6
+. BF 37 30 01 00 C3
+
+movl $77880, %edi
+. 3456 0x12345678 6
+. BF 38 30 01 00 C3
+
+movl $77881, %edi
+. 3457 0x12345678 6
+. BF 39 30 01 00 C3
+
+movl $77883, %edi
+. 3458 0x12345678 6
+. BF 3B 30 01 00 C3
+
+movl $77886, %edi
+. 3459 0x12345678 6
+. BF 3E 30 01 00 C3
+
+movl $77888, %edi
+. 3460 0x12345678 6
+. BF 40 30 01 00 C3
+
+movl $77889, %edi
+. 3461 0x12345678 6
+. BF 41 30 01 00 C3
+
+movl $77890, %edi
+. 3462 0x12345678 6
+. BF 42 30 01 00 C3
+
+movl $77891, %edi
+. 3463 0x12345678 6
+. BF 43 30 01 00 C3
+
+movl $77892, %edi
+. 3464 0x12345678 6
+. BF 44 30 01 00 C3
+
+movl $77893, %edi
+. 3465 0x12345678 6
+. BF 45 30 01 00 C3
+
+movl $77894, %edi
+. 3466 0x12345678 6
+. BF 46 30 01 00 C3
+
+movl $77895, %edi
+. 3467 0x12345678 6
+. BF 47 30 01 00 C3
+
+movl $77896, %edi
+. 3468 0x12345678 6
+. BF 48 30 01 00 C3
+
+movl $77897, %edi
+. 3469 0x12345678 6
+. BF 49 30 01 00 C3
+
+movl $77899, %edi
+. 3470 0x12345678 6
+. BF 4B 30 01 00 C3
+
+movl $778, %edx
+. 3471 0x12345678 6
+. BA 0A 03 00 00 C3
+
+movl $77900, %edi
+. 3472 0x12345678 6
+. BF 4C 30 01 00 C3
+
+movl $77901, 4(%rsp)
+. 3473 0x12345678 9
+. C7 44 24 04 4D 30 01 00 C3
+
+movl $77901, %edi
+. 3474 0x12345678 6
+. BF 4D 30 01 00 C3
+
+movl $77902, %edi
+. 3475 0x12345678 6
+. BF 4E 30 01 00 C3
+
+movl $77903, %edi
+. 3476 0x12345678 6
+. BF 4F 30 01 00 C3
+
+movl $77904, 4(%rsp)
+. 3477 0x12345678 9
+. C7 44 24 04 50 30 01 00 C3
+
+movl $77904, %edi
+. 3478 0x12345678 6
+. BF 50 30 01 00 C3
+
+movl $77905, %edi
+. 3479 0x12345678 6
+. BF 51 30 01 00 C3
+
+movl $77906, %edi
+. 3480 0x12345678 6
+. BF 52 30 01 00 C3
+
+movl $77907, %edi
+. 3481 0x12345678 6
+. BF 53 30 01 00 C3
+
+movl $77913, %ebp
+. 3482 0x12345678 6
+. BD 59 30 01 00 C3
+
+movl $77913, %ecx
+. 3483 0x12345678 6
+. B9 59 30 01 00 C3
+
+movl $77913, %esi
+. 3484 0x12345678 6
+. BE 59 30 01 00 C3
+
+movl $77914, %ebp
+. 3485 0x12345678 6
+. BD 5A 30 01 00 C3
+
+movl $77914, %ecx
+. 3486 0x12345678 6
+. B9 5A 30 01 00 C3
+
+movl $77914, %esi
+. 3487 0x12345678 6
+. BE 5A 30 01 00 C3
+
+movl $77915, %ebp
+. 3488 0x12345678 6
+. BD 5B 30 01 00 C3
+
+movl $77915, %ecx
+. 3489 0x12345678 6
+. B9 5B 30 01 00 C3
+
+movl $77915, %esi
+. 3490 0x12345678 6
+. BE 5B 30 01 00 C3
+
+movl $77916, %ebp
+. 3491 0x12345678 6
+. BD 5C 30 01 00 C3
+
+movl $77916, %ecx
+. 3492 0x12345678 6
+. B9 5C 30 01 00 C3
+
+movl $77916, %esi
+. 3493 0x12345678 6
+. BE 5C 30 01 00 C3
+
+movl $77917, %edi
+. 3494 0x12345678 6
+. BF 5D 30 01 00 C3
+
+movl $77918, %edi
+. 3495 0x12345678 6
+. BF 5E 30 01 00 C3
+
+movl $77919, %edi
+. 3496 0x12345678 6
+. BF 5F 30 01 00 C3
+
+movl $77920, %edi
+. 3497 0x12345678 6
+. BF 60 30 01 00 C3
+
+movl $77921, %edi
+. 3498 0x12345678 6
+. BF 61 30 01 00 C3
+
+movl $77922, %edi
+. 3499 0x12345678 6
+. BF 62 30 01 00 C3
+
+movl $77923, %edi
+. 3500 0x12345678 6
+. BF 63 30 01 00 C3
+
+movl $77924, %edi
+. 3501 0x12345678 6
+. BF 64 30 01 00 C3
+
+movl $77925, %edi
+. 3502 0x12345678 6
+. BF 65 30 01 00 C3
+
+movl $77926, %edi
+. 3503 0x12345678 6
+. BF 66 30 01 00 C3
+
+movl $77927, %edi
+. 3504 0x12345678 6
+. BF 67 30 01 00 C3
+
+movl $77928, %edi
+. 3505 0x12345678 6
+. BF 68 30 01 00 C3
+
+movl $77929, %edi
+. 3506 0x12345678 6
+. BF 69 30 01 00 C3
+
+movl $77930, %edi
+. 3507 0x12345678 6
+. BF 6A 30 01 00 C3
+
+movl $77931, %edi
+. 3508 0x12345678 6
+. BF 6B 30 01 00 C3
+
+movl $77932, %edi
+. 3509 0x12345678 6
+. BF 6C 30 01 00 C3
+
+movl $77933, %edi
+. 3510 0x12345678 6
+. BF 6D 30 01 00 C3
+
+movl $77934, %edi
+. 3511 0x12345678 6
+. BF 6E 30 01 00 C3
+
+movl $77935, %edi
+. 3512 0x12345678 6
+. BF 6F 30 01 00 C3
+
+movl $77937, %edi
+. 3513 0x12345678 6
+. BF 71 30 01 00 C3
+
+movl $77938, %edi
+. 3514 0x12345678 6
+. BF 72 30 01 00 C3
+
+movl $77939, %edi
+. 3515 0x12345678 6
+. BF 73 30 01 00 C3
+
+movl $77940, %edi
+. 3516 0x12345678 6
+. BF 74 30 01 00 C3
+
+movl $77941, %edi
+. 3517 0x12345678 6
+. BF 75 30 01 00 C3
+
+movl $77942, %edi
+. 3518 0x12345678 6
+. BF 76 30 01 00 C3
+
+movl $77943, %edi
+. 3519 0x12345678 6
+. BF 77 30 01 00 C3
+
+movl $77945, %edi
+. 3520 0x12345678 6
+. BF 79 30 01 00 C3
+
+movl $77949, %r13d
+. 3521 0x12345678 7
+. 41 BD 7D 30 01 00 C3
+
+movl $77950, %r13d
+. 3522 0x12345678 7
+. 41 BD 7E 30 01 00 C3
+
+movl $77951, %r13d
+. 3523 0x12345678 7
+. 41 BD 7F 30 01 00 C3
+
+movl $77952, %r13d
+. 3524 0x12345678 7
+. 41 BD 80 30 01 00 C3
+
+movl $77953, %r13d
+. 3525 0x12345678 7
+. 41 BD 81 30 01 00 C3
+
+movl $77954, %r13d
+. 3526 0x12345678 7
+. 41 BD 82 30 01 00 C3
+
+movl $77955, %r13d
+. 3527 0x12345678 7
+. 41 BD 83 30 01 00 C3
+
+movl $77956, %r13d
+. 3528 0x12345678 7
+. 41 BD 84 30 01 00 C3
+
+movl $77957, %r13d
+. 3529 0x12345678 7
+. 41 BD 85 30 01 00 C3
+
+movl $77958, %r13d
+. 3530 0x12345678 7
+. 41 BD 86 30 01 00 C3
+
+movl $77959, %r13d
+. 3531 0x12345678 7
+. 41 BD 87 30 01 00 C3
+
+movl $77960, %r13d
+. 3532 0x12345678 7
+. 41 BD 88 30 01 00 C3
+
+movl $77961, %r13d
+. 3533 0x12345678 7
+. 41 BD 89 30 01 00 C3
+
+movl $77962, %r13d
+. 3534 0x12345678 7
+. 41 BD 8A 30 01 00 C3
+
+movl $77963, %r13d
+. 3535 0x12345678 7
+. 41 BD 8B 30 01 00 C3
+
+movl $77964, %r13d
+. 3536 0x12345678 7
+. 41 BD 8C 30 01 00 C3
+
+movl $77965, %r13d
+. 3537 0x12345678 7
+. 41 BD 8D 30 01 00 C3
+
+movl $77966, %r13d
+. 3538 0x12345678 7
+. 41 BD 8E 30 01 00 C3
+
+movl $77967, %r13d
+. 3539 0x12345678 7
+. 41 BD 8F 30 01 00 C3
+
+movl $77968, %r13d
+. 3540 0x12345678 7
+. 41 BD 90 30 01 00 C3
+
+movl $77969, %r13d
+. 3541 0x12345678 7
+. 41 BD 91 30 01 00 C3
+
+movl $77970, %r13d
+. 3542 0x12345678 7
+. 41 BD 92 30 01 00 C3
+
+movl $77971, %r13d
+. 3543 0x12345678 7
+. 41 BD 93 30 01 00 C3
+
+movl $77972, %r13d
+. 3544 0x12345678 7
+. 41 BD 94 30 01 00 C3
+
+movl $77973, %r13d
+. 3545 0x12345678 7
+. 41 BD 95 30 01 00 C3
+
+movl $77974, %r13d
+. 3546 0x12345678 7
+. 41 BD 96 30 01 00 C3
+
+movl $77975, %r13d
+. 3547 0x12345678 7
+. 41 BD 97 30 01 00 C3
+
+movl $77976, %r13d
+. 3548 0x12345678 7
+. 41 BD 98 30 01 00 C3
+
+movl $77977, %r13d
+. 3549 0x12345678 7
+. 41 BD 99 30 01 00 C3
+
+movl $77978, %ecx
+. 3550 0x12345678 6
+. B9 9A 30 01 00 C3
+
+movl $77978, %edx
+. 3551 0x12345678 6
+. BA 9A 30 01 00 C3
+
+movl $77979, %ecx
+. 3552 0x12345678 6
+. B9 9B 30 01 00 C3
+
+movl $77979, %edx
+. 3553 0x12345678 6
+. BA 9B 30 01 00 C3
+
+movl $77980, %ecx
+. 3554 0x12345678 6
+. B9 9C 30 01 00 C3
+
+movl $77980, %edx
+. 3555 0x12345678 6
+. BA 9C 30 01 00 C3
+
+movl $77981, %ecx
+. 3556 0x12345678 6
+. B9 9D 30 01 00 C3
+
+movl $77981, %edx
+. 3557 0x12345678 6
+. BA 9D 30 01 00 C3
+
+movl $77982, %ecx
+. 3558 0x12345678 6
+. B9 9E 30 01 00 C3
+
+movl $77982, %edx
+. 3559 0x12345678 6
+. BA 9E 30 01 00 C3
+
+movl $77983, %ecx
+. 3560 0x12345678 6
+. B9 9F 30 01 00 C3
+
+movl $77983, %edx
+. 3561 0x12345678 6
+. BA 9F 30 01 00 C3
+
+movl $77984, %r13d
+. 3562 0x12345678 7
+. 41 BD A0 30 01 00 C3
+
+movl $77985, %r13d
+. 3563 0x12345678 7
+. 41 BD A1 30 01 00 C3
+
+movl $77986, %r13d
+. 3564 0x12345678 7
+. 41 BD A2 30 01 00 C3
+
+movl $77987, %r13d
+. 3565 0x12345678 7
+. 41 BD A3 30 01 00 C3
+
+movl $77988, %r13d
+. 3566 0x12345678 7
+. 41 BD A4 30 01 00 C3
+
+movl $77989, %r13d
+. 3567 0x12345678 7
+. 41 BD A5 30 01 00 C3
+
+movl $77990, %r13d
+. 3568 0x12345678 7
+. 41 BD A6 30 01 00 C3
+
+movl $77991, %r13d
+. 3569 0x12345678 7
+. 41 BD A7 30 01 00 C3
+
+movl $77992, %r13d
+. 3570 0x12345678 7
+. 41 BD A8 30 01 00 C3
+
+movl $77993, %ecx
+. 3571 0x12345678 6
+. B9 A9 30 01 00 C3
+
+movl $77994, %ecx
+. 3572 0x12345678 6
+. B9 AA 30 01 00 C3
+
+movl $77995, %ecx
+. 3573 0x12345678 6
+. B9 AB 30 01 00 C3
+
+movl $77996, %ecx
+. 3574 0x12345678 6
+. B9 AC 30 01 00 C3
+
+movl $77997, %ecx
+. 3575 0x12345678 6
+. B9 AD 30 01 00 C3
+
+movl $77998, %ecx
+. 3576 0x12345678 6
+. B9 AE 30 01 00 C3
+
+movl $77999, (%rsi)
+. 3577 0x12345678 7
+. C7 06 AF 30 01 00 C3
+
+movl $779, %edx
+. 3578 0x12345678 6
+. BA 0B 03 00 00 C3
+
+movl $78000, (%rsi)
+. 3579 0x12345678 7
+. C7 06 B0 30 01 00 C3
+
+movl $78001, (%rsi)
+. 3580 0x12345678 7
+. C7 06 B1 30 01 00 C3
+
+movl $78002, (%rsi)
+. 3581 0x12345678 7
+. C7 06 B2 30 01 00 C3
+
+movl $78003, %ecx
+. 3582 0x12345678 6
+. B9 B3 30 01 00 C3
+
+movl $78004, %ecx
+. 3583 0x12345678 6
+. B9 B4 30 01 00 C3
+
+movl $78005, %ecx
+. 3584 0x12345678 6
+. B9 B5 30 01 00 C3
+
+movl $78006, %ecx
+. 3585 0x12345678 6
+. B9 B6 30 01 00 C3
+
+movl $78007, %ecx
+. 3586 0x12345678 6
+. B9 B7 30 01 00 C3
+
+movl $78008, %ecx
+. 3587 0x12345678 6
+. B9 B8 30 01 00 C3
+
+movl $78009, %ecx
+. 3588 0x12345678 6
+. B9 B9 30 01 00 C3
+
+movl $78010, %ecx
+. 3589 0x12345678 6
+. B9 BA 30 01 00 C3
+
+movl $78011, %ecx
+. 3590 0x12345678 6
+. B9 BB 30 01 00 C3
+
+movl $78012, (%rsi)
+. 3591 0x12345678 7
+. C7 06 BC 30 01 00 C3
+
+movl $78013, (%rsi)
+. 3592 0x12345678 7
+. C7 06 BD 30 01 00 C3
+
+movl $78014, (%rsi)
+. 3593 0x12345678 7
+. C7 06 BE 30 01 00 C3
+
+movl $78015, (%rsi)
+. 3594 0x12345678 7
+. C7 06 BF 30 01 00 C3
+
+movl $78016, %ecx
+. 3595 0x12345678 6
+. B9 C0 30 01 00 C3
+
+movl $78017, %ecx
+. 3596 0x12345678 6
+. B9 C1 30 01 00 C3
+
+movl $78018, %ecx
+. 3597 0x12345678 6
+. B9 C2 30 01 00 C3
+
+movl $78019, %ecx
+. 3598 0x12345678 6
+. B9 C3 30 01 00 C3
+
+movl $78020, %ecx
+. 3599 0x12345678 6
+. B9 C4 30 01 00 C3
+
+movl $78021, %ecx
+. 3600 0x12345678 6
+. B9 C5 30 01 00 C3
+
+movl $78022, %ecx
+. 3601 0x12345678 6
+. B9 C6 30 01 00 C3
+
+movl $78023, %ecx
+. 3602 0x12345678 6
+. B9 C7 30 01 00 C3
+
+movl $78024, %ecx
+. 3603 0x12345678 6
+. B9 C8 30 01 00 C3
+
+movl $78025, (%rsi)
+. 3604 0x12345678 7
+. C7 06 C9 30 01 00 C3
+
+movl $78026, (%rsi)
+. 3605 0x12345678 7
+. C7 06 CA 30 01 00 C3
+
+movl $78027, (%rsi)
+. 3606 0x12345678 7
+. C7 06 CB 30 01 00 C3
+
+movl $78028, (%rsi)
+. 3607 0x12345678 7
+. C7 06 CC 30 01 00 C3
+
+movl $78030, %ecx
+. 3608 0x12345678 6
+. B9 CE 30 01 00 C3
+
+movl $78032, %ecx
+. 3609 0x12345678 6
+. B9 D0 30 01 00 C3
+
+movl $78033, %ecx
+. 3610 0x12345678 6
+. B9 D1 30 01 00 C3
+
+movl $78034, %ecx
+. 3611 0x12345678 6
+. B9 D2 30 01 00 C3
+
+movl $78035, %ecx
+. 3612 0x12345678 6
+. B9 D3 30 01 00 C3
+
+movl $78036, %ecx
+. 3613 0x12345678 6
+. B9 D4 30 01 00 C3
+
+movl $78037, %ecx
+. 3614 0x12345678 6
+. B9 D5 30 01 00 C3
+
+movl $78038, (%rsi)
+. 3615 0x12345678 7
+. C7 06 D6 30 01 00 C3
+
+movl $78039, (%rsi)
+. 3616 0x12345678 7
+. C7 06 D7 30 01 00 C3
+
+movl $78040, (%rsi)
+. 3617 0x12345678 7
+. C7 06 D8 30 01 00 C3
+
+movl $78041, (%rsi)
+. 3618 0x12345678 7
+. C7 06 D9 30 01 00 C3
+
+movl $78043, %edi
+. 3619 0x12345678 6
+. BF DB 30 01 00 C3
+
+movl $78045, %edi
+. 3620 0x12345678 6
+. BF DD 30 01 00 C3
+
+movl $78046, %edi
+. 3621 0x12345678 6
+. BF DE 30 01 00 C3
+
+movl $78047, %edi
+. 3622 0x12345678 6
+. BF DF 30 01 00 C3
+
+movl $78048, %edi
+. 3623 0x12345678 6
+. BF E0 30 01 00 C3
+
+movl $78049, %edi
+. 3624 0x12345678 6
+. BF E1 30 01 00 C3
+
+movl $78050, %edi
+. 3625 0x12345678 6
+. BF E2 30 01 00 C3
+
+movl $78052, %edi
+. 3626 0x12345678 6
+. BF E4 30 01 00 C3
+
+movl $78053, %edi
+. 3627 0x12345678 6
+. BF E5 30 01 00 C3
+
+movl $78054, %ecx
+. 3628 0x12345678 6
+. B9 E6 30 01 00 C3
+
+movl $78055, %ecx
+. 3629 0x12345678 6
+. B9 E7 30 01 00 C3
+
+movl $78056, %ecx
+. 3630 0x12345678 6
+. B9 E8 30 01 00 C3
+
+movl $78056, %edi
+. 3631 0x12345678 6
+. BF E8 30 01 00 C3
+
+movl $78061, %ecx
+. 3632 0x12345678 6
+. B9 ED 30 01 00 C3
+
+movl $78062, %ecx
+. 3633 0x12345678 6
+. B9 EE 30 01 00 C3
+
+movl $78063, %ecx
+. 3634 0x12345678 6
+. B9 EF 30 01 00 C3
+
+movl $78064, %ecx
+. 3635 0x12345678 6
+. B9 F0 30 01 00 C3
+
+movl $78065, %ecx
+. 3636 0x12345678 6
+. B9 F1 30 01 00 C3
+
+movl $78066, %ecx
+. 3637 0x12345678 6
+. B9 F2 30 01 00 C3
+
+movl $78067, %ecx
+. 3638 0x12345678 6
+. B9 F3 30 01 00 C3
+
+movl $78068, %ecx
+. 3639 0x12345678 6
+. B9 F4 30 01 00 C3
+
+movl $78069, %ecx
+. 3640 0x12345678 6
+. B9 F5 30 01 00 C3
+
+movl $78070, %ecx
+. 3641 0x12345678 6
+. B9 F6 30 01 00 C3
+
+movl $78071, %ecx
+. 3642 0x12345678 6
+. B9 F7 30 01 00 C3
+
+movl $78072, %ecx
+. 3643 0x12345678 6
+. B9 F8 30 01 00 C3
+
+movl $78073, %ecx
+. 3644 0x12345678 6
+. B9 F9 30 01 00 C3
+
+movl $78074, %ecx
+. 3645 0x12345678 6
+. B9 FA 30 01 00 C3
+
+movl $78075, %ecx
+. 3646 0x12345678 6
+. B9 FB 30 01 00 C3
+
+movl $78076, %ecx
+. 3647 0x12345678 6
+. B9 FC 30 01 00 C3
+
+movl $78077, %ecx
+. 3648 0x12345678 6
+. B9 FD 30 01 00 C3
+
+movl $78078, %ecx
+. 3649 0x12345678 6
+. B9 FE 30 01 00 C3
+
+movl $78079, %ecx
+. 3650 0x12345678 6
+. B9 FF 30 01 00 C3
+
+movl $78080, %ecx
+. 3651 0x12345678 6
+. B9 00 31 01 00 C3
+
+movl $78081, %ecx
+. 3652 0x12345678 6
+. B9 01 31 01 00 C3
+
+movl $78082, %ecx
+. 3653 0x12345678 6
+. B9 02 31 01 00 C3
+
+movl $78083, %ecx
+. 3654 0x12345678 6
+. B9 03 31 01 00 C3
+
+movl $78084, %ecx
+. 3655 0x12345678 6
+. B9 04 31 01 00 C3
+
+movl $78085, %ecx
+. 3656 0x12345678 6
+. B9 05 31 01 00 C3
+
+movl $78086, %ecx
+. 3657 0x12345678 6
+. B9 06 31 01 00 C3
+
+movl $78087, %ecx
+. 3658 0x12345678 6
+. B9 07 31 01 00 C3
+
+movl $78088, %ecx
+. 3659 0x12345678 6
+. B9 08 31 01 00 C3
+
+movl $78089, %ecx
+. 3660 0x12345678 6
+. B9 09 31 01 00 C3
+
+movl $78090, %ecx
+. 3661 0x12345678 6
+. B9 0A 31 01 00 C3
+
+movl $78091, %ecx
+. 3662 0x12345678 6
+. B9 0B 31 01 00 C3
+
+movl $78092, %ecx
+. 3663 0x12345678 6
+. B9 0C 31 01 00 C3
+
+movl $78092, %edx
+. 3664 0x12345678 6
+. BA 0C 31 01 00 C3
+
+movl $78093, %ecx
+. 3665 0x12345678 6
+. B9 0D 31 01 00 C3
+
+movl $78093, %edx
+. 3666 0x12345678 6
+. BA 0D 31 01 00 C3
+
+movl $78094, %ecx
+. 3667 0x12345678 6
+. B9 0E 31 01 00 C3
+
+movl $78094, %edx
+. 3668 0x12345678 6
+. BA 0E 31 01 00 C3
+
+movl $78095, %ecx
+. 3669 0x12345678 6
+. B9 0F 31 01 00 C3
+
+movl $78095, %edx
+. 3670 0x12345678 6
+. BA 0F 31 01 00 C3
+
+movl $78096, %ecx
+. 3671 0x12345678 6
+. B9 10 31 01 00 C3
+
+movl $78096, %edx
+. 3672 0x12345678 6
+. BA 10 31 01 00 C3
+
+movl $78097, %ecx
+. 3673 0x12345678 6
+. B9 11 31 01 00 C3
+
+movl $78097, %edx
+. 3674 0x12345678 6
+. BA 11 31 01 00 C3
+
+movl $78098, %ecx
+. 3675 0x12345678 6
+. B9 12 31 01 00 C3
+
+movl $78098, %edx
+. 3676 0x12345678 6
+. BA 12 31 01 00 C3
+
+movl $78099, %ecx
+. 3677 0x12345678 6
+. B9 13 31 01 00 C3
+
+movl $78099, %edx
+. 3678 0x12345678 6
+. BA 13 31 01 00 C3
+
+movl $780, %edx
+. 3679 0x12345678 6
+. BA 0C 03 00 00 C3
+
+movl $78100, %ecx
+. 3680 0x12345678 6
+. B9 14 31 01 00 C3
+
+movl $78101, %ecx
+. 3681 0x12345678 6
+. B9 15 31 01 00 C3
+
+movl $78102, %ecx
+. 3682 0x12345678 6
+. B9 16 31 01 00 C3
+
+movl $78103, %ecx
+. 3683 0x12345678 6
+. B9 17 31 01 00 C3
+
+movl $78104, %ecx
+. 3684 0x12345678 6
+. B9 18 31 01 00 C3
+
+movl $78105, %ecx
+. 3685 0x12345678 6
+. B9 19 31 01 00 C3
+
+movl $78106, %ecx
+. 3686 0x12345678 6
+. B9 1A 31 01 00 C3
+
+movl $78107, %ecx
+. 3687 0x12345678 6
+. B9 1B 31 01 00 C3
+
+movl $78108, %ecx
+. 3688 0x12345678 6
+. B9 1C 31 01 00 C3
+
+movl $78109, %ecx
+. 3689 0x12345678 6
+. B9 1D 31 01 00 C3
+
+movl $78110, %ecx
+. 3690 0x12345678 6
+. B9 1E 31 01 00 C3
+
+movl $7816, %edx
+. 3691 0x12345678 6
+. BA 88 1E 00 00 C3
+
+movl $781, %edx
+. 3692 0x12345678 6
+. BA 0D 03 00 00 C3
+
+movl $782, %edx
+. 3693 0x12345678 6
+. BA 0E 03 00 00 C3
+
+movl $788, %edx
+. 3694 0x12345678 6
+. BA 14 03 00 00 C3
+
+movl $7902, %edx
+. 3695 0x12345678 6
+. BA DE 1E 00 00 C3
+
+movl $7912, %edx
+. 3696 0x12345678 6
+. BA E8 1E 00 00 C3
+
+movl $7922, %edx
+. 3697 0x12345678 6
+. BA F2 1E 00 00 C3
+
+movl $794, %edx
+. 3698 0x12345678 6
+. BA 1A 03 00 00 C3
+
+movl $7970, %edx
+. 3699 0x12345678 6
+. BA 22 1F 00 00 C3
+
+movl $7978, %edx
+. 3700 0x12345678 6
+. BA 2A 1F 00 00 C3
+
+movl $797, %edx
+. 3701 0x12345678 6
+. BA 1D 03 00 00 C3
+
+movl $7986, %edx
+. 3702 0x12345678 6
+. BA 32 1F 00 00 C3
+
+movl $7994, %edx
+. 3703 0x12345678 6
+. BA 3A 1F 00 00 C3
+
+movl $7, %eax
+. 3704 0x12345678 6
+. B8 07 00 00 00 C3
+
+movl $7, %edi
+. 3705 0x12345678 6
+. BF 07 00 00 00 C3
+
+movl $7, %esi
+. 3706 0x12345678 6
+. BE 07 00 00 00 C3
+
+movl $7, (%rax)
+. 3707 0x12345678 7
+. C7 00 07 00 00 00 C3
+
+movl $8003, %edx
+. 3708 0x12345678 6
+. BA 43 1F 00 00 C3
+
+movl $800, %edx
+. 3709 0x12345678 6
+. BA 20 03 00 00 C3
+
+movl 800(%rsp), %edi
+. 3710 0x12345678 8
+. 8B BC 24 20 03 00 00 C3
+
+movl $801, %edx
+. 3711 0x12345678 6
+. BA 21 03 00 00 C3
+
+movl $8067, %edx
+. 3712 0x12345678 6
+. BA 83 1F 00 00 C3
+
+movl $8077, %edx
+. 3713 0x12345678 6
+. BA 8D 1F 00 00 C3
+
+movl $8078, %edx
+. 3714 0x12345678 6
+. BA 8E 1F 00 00 C3
+
+movl $80, %eax
+. 3715 0x12345678 6
+. B8 50 00 00 00 C3
+
+movl $80, %edi
+. 3716 0x12345678 6
+. BF 50 00 00 00 C3
+
+movl 80(%rsp), %edi
+. 3717 0x12345678 5
+. 8B 7C 24 50 C3
+
+movl 80(%rsp), %esi
+. 3718 0x12345678 5
+. 8B 74 24 50 C3
+
+movl $8106, %edx
+. 3719 0x12345678 6
+. BA AA 1F 00 00 C3
+
+movl $8, 16(%rbx)
+. 3720 0x12345678 8
+. C7 43 10 08 00 00 00 C3
+
+movl $8180, %edx
+. 3721 0x12345678 6
+. BA F4 1F 00 00 C3
+
+movl $81920, 32(%rax)
+. 3722 0x12345678 8
+. C7 40 20 00 40 01 00 C3
+
+movl $81920, 32(%rbx)
+. 3723 0x12345678 8
+. C7 43 20 00 40 01 00 C3
+
+movl $81920, %edi
+. 3724 0x12345678 6
+. BF 00 40 01 00 C3
+
+movl $81920, %esi
+. 3725 0x12345678 6
+. BE 00 40 01 00 C3
+
+movl $81921, %edi
+. 3726 0x12345678 6
+. BF 01 40 01 00 C3
+
+movl $81922, 32(%rax)
+. 3727 0x12345678 8
+. C7 40 20 02 40 01 00 C3
+
+movl $81922, %edi
+. 3728 0x12345678 6
+. BF 02 40 01 00 C3
+
+movl $81923, 32(%rax)
+. 3729 0x12345678 8
+. C7 40 20 03 40 01 00 C3
+
+movl $81923, %edi
+. 3730 0x12345678 6
+. BF 03 40 01 00 C3
+
+movl $81924, %edi
+. 3731 0x12345678 6
+. BF 04 40 01 00 C3
+
+movl $81926, %esi
+. 3732 0x12345678 6
+. BE 06 40 01 00 C3
+
+movl $81927, %edi
+. 3733 0x12345678 6
+. BF 07 40 01 00 C3
+
+movl $81928, %esi
+. 3734 0x12345678 6
+. BE 08 40 01 00 C3
+
+movl $8205, %edx
+. 3735 0x12345678 6
+. BA 0D 20 00 00 C3
+
+movl $8246, %edx
+. 3736 0x12345678 6
+. BA 36 20 00 00 C3
+
+movl $8, 24(%rax)
+. 3737 0x12345678 8
+. C7 40 18 08 00 00 00 C3
+
+movl $826343424, %edi
+. 3738 0x12345678 6
+. BF 00 00 41 31 C3
+
+movl $826343424, %r14d
+. 3739 0x12345678 7
+. 41 BE 00 00 41 31 C3
+
+movl $8, 28(%rsp)
+. 3740 0x12345678 9
+. C7 44 24 1C 08 00 00 00 C3
+
+movl $8317, %edx
+. 3741 0x12345678 6
+. BA 7D 20 00 00 C3
+
+movl $836, %edx
+. 3742 0x12345678 6
+. BA 44 03 00 00 C3
+
+movl $837, %edx
+. 3743 0x12345678 6
+. BA 45 03 00 00 C3
+
+movl $838, %edx
+. 3744 0x12345678 6
+. BA 46 03 00 00 C3
+
+movl $839, %edx
+. 3745 0x12345678 6
+. BA 47 03 00 00 C3
+
+movl $841, %edx
+. 3746 0x12345678 6
+. BA 49 03 00 00 C3
+
+movl $842, %edx
+. 3747 0x12345678 6
+. BA 4A 03 00 00 C3
+
+movl $84, %eax
+. 3748 0x12345678 6
+. B8 54 00 00 00 C3
+
+movl 84(%rsp), %edi
+. 3749 0x12345678 5
+. 8B 7C 24 54 C3
+
+movl $8565, %edx
+. 3750 0x12345678 6
+. BA 75 21 00 00 C3
+
+movl $8600, %edx
+. 3751 0x12345678 6
+. BA 98 21 00 00 C3
+
+movl $86016, 28(%rax)
+. 3752 0x12345678 8
+. C7 40 1C 00 50 01 00 C3
+
+movl $86017, 100(%rbx)
+. 3753 0x12345678 8
+. C7 43 64 01 50 01 00 C3
+
+movl $86017, 112(%rbx)
+. 3754 0x12345678 8
+. C7 43 70 01 50 01 00 C3
+
+movl $86017, 124(%rbx)
+. 3755 0x12345678 8
+. C7 43 7C 01 50 01 00 C3
+
+movl $86017, 28(%rax)
+. 3756 0x12345678 8
+. C7 40 1C 01 50 01 00 C3
+
+movl $86017, 52(%rbx)
+. 3757 0x12345678 8
+. C7 43 34 01 50 01 00 C3
+
+movl $86017, 64(%rbx)
+. 3758 0x12345678 8
+. C7 43 40 01 50 01 00 C3
+
+movl $86017, 76(%rbx)
+. 3759 0x12345678 8
+. C7 43 4C 01 50 01 00 C3
+
+movl $86017, 88(%rbx)
+. 3760 0x12345678 8
+. C7 43 58 01 50 01 00 C3
+
+movl $86018, 100(%rax)
+. 3761 0x12345678 8
+. C7 40 64 02 50 01 00 C3
+
+movl $86018, 100(%rbx)
+. 3762 0x12345678 8
+. C7 43 64 02 50 01 00 C3
+
+movl $86018, 28(%rax)
+. 3763 0x12345678 8
+. C7 40 1C 02 50 01 00 C3
+
+movl $86018, 52(%rax)
+. 3764 0x12345678 8
+. C7 40 34 02 50 01 00 C3
+
+movl $86018, 52(%rbx)
+. 3765 0x12345678 8
+. C7 43 34 02 50 01 00 C3
+
+movl $86018, 64(%rax)
+. 3766 0x12345678 8
+. C7 40 40 02 50 01 00 C3
+
+movl $86018, 64(%rbx)
+. 3767 0x12345678 8
+. C7 43 40 02 50 01 00 C3
+
+movl $86018, 76(%rax)
+. 3768 0x12345678 8
+. C7 40 4C 02 50 01 00 C3
+
+movl $86018, 76(%rbx)
+. 3769 0x12345678 8
+. C7 43 4C 02 50 01 00 C3
+
+movl $86018, 88(%rax)
+. 3770 0x12345678 8
+. C7 40 58 02 50 01 00 C3
+
+movl $86018, 88(%rbx)
+. 3771 0x12345678 8
+. C7 43 58 02 50 01 00 C3
+
+movl $86019, 52(%rax)
+. 3772 0x12345678 8
+. C7 40 34 03 50 01 00 C3
+
+movl $8629, %edx
+. 3773 0x12345678 6
+. BA B5 21 00 00 C3
+
+movl $8656, %edx
+. 3774 0x12345678 6
+. BA D0 21 00 00 C3
+
+movl $8726, %edx
+. 3775 0x12345678 6
+. BA 16 22 00 00 C3
+
+movl $8, 72(%rbx)
+. 3776 0x12345678 8
+. C7 43 48 08 00 00 00 C3
+
+movl $8771, %edx
+. 3777 0x12345678 6
+. BA 43 22 00 00 C3
+
+movl $8781, %edx
+. 3778 0x12345678 6
+. BA 4D 22 00 00 C3
+
+movl $8798, %edx
+. 3779 0x12345678 6
+. BA 5E 22 00 00 C3
+
+movl $8811, %edx
+. 3780 0x12345678 6
+. BA 6B 22 00 00 C3
+
+movl $8, 84(%rax)
+. 3781 0x12345678 8
+. C7 40 54 08 00 00 00 C3
+
+movl $8, 84(%rbx)
+. 3782 0x12345678 8
+. C7 43 54 08 00 00 00 C3
+
+movl $88, 68(%rsp)
+. 3783 0x12345678 9
+. C7 44 24 44 58 00 00 00 C3
+
+movl $887, %edx
+. 3784 0x12345678 6
+. BA 77 03 00 00 C3
+
+movl $88, %eax
+. 3785 0x12345678 6
+. B8 58 00 00 00 C3
+
+movl $8, 8(%rbx)
+. 3786 0x12345678 8
+. C7 43 08 08 00 00 00 C3
+
+movl 88(%rsp), %edi
+. 3787 0x12345678 5
+. 8B 7C 24 58 C3
+
+movl $8920, %edx
+. 3788 0x12345678 6
+. BA D8 22 00 00 C3
+
+movl $892, %edx
+. 3789 0x12345678 6
+. BA 7C 03 00 00 C3
+
+movl $8, 92(%rax)
+. 3790 0x12345678 8
+. C7 40 5C 08 00 00 00 C3
+
+movl $8943, %edx
+. 3791 0x12345678 6
+. BA EF 22 00 00 C3
+
+movl $894, %edx
+. 3792 0x12345678 6
+. BA 7E 03 00 00 C3
+
+movl $895, %edx
+. 3793 0x12345678 6
+. BA 7F 03 00 00 C3
+
+movl $8962, %edx
+. 3794 0x12345678 6
+. BA 02 23 00 00 C3
+
+movl $896, %edx
+. 3795 0x12345678 6
+. BA 80 03 00 00 C3
+
+movl $897, %edx
+. 3796 0x12345678 6
+. BA 81 03 00 00 C3
+
+movl $8, %eax
+. 3797 0x12345678 6
+. B8 08 00 00 00 C3
+
+movl $8, %ebp
+. 3798 0x12345678 6
+. BD 08 00 00 00 C3
+
+movl $8, %edi
+. 3799 0x12345678 6
+. BF 08 00 00 00 C3
+
+movl $8, %edx
+. 3800 0x12345678 6
+. BA 08 00 00 00 C3
+
+movl $8, %esi
+. 3801 0x12345678 6
+. BE 08 00 00 00 C3
+
+movl 8(%r12), %edi
+. 3802 0x12345678 6
+. 41 8B 7C 24 08 C3
+
+movl 8(%r12), %edx
+. 3803 0x12345678 6
+. 41 8B 54 24 08 C3
+
+movl 8(%r13), %esi
+. 3804 0x12345678 5
+. 41 8B 75 08 C3
+
+movl 8(%r14), %edi
+. 3805 0x12345678 5
+. 41 8B 7E 08 C3
+
+movl $8, %r8d
+. 3806 0x12345678 7
+. 41 B8 08 00 00 00 C3
+
+movl $8, (%rax)
+. 3807 0x12345678 7
+. C7 00 08 00 00 00 C3
+
+movl 8(%rax), %eax
+. 3808 0x12345678 4
+. 8B 40 08 C3
+
+movl 8(%rax), %edi
+. 3809 0x12345678 4
+. 8B 78 08 C3
+
+movl 8(%rax), %edx
+. 3810 0x12345678 4
+. 8B 50 08 C3
+
+movl 8(%rax), %r10d
+. 3811 0x12345678 5
+. 44 8B 50 08 C3
+
+movl 8(%rax), %r11d
+. 3812 0x12345678 5
+. 44 8B 58 08 C3
+
+movl 8(%rax,%rcx), %edi
+. 3813 0x12345678 5
+. 8B 7C 08 08 C3
+
+movl 8(%rbp), %eax
+. 3814 0x12345678 4
+. 8B 45 08 C3
+
+movl 8(%rbp), %ecx
+. 3815 0x12345678 4
+. 8B 4D 08 C3
+
+movl 8(%rbp), %edi
+. 3816 0x12345678 4
+. 8B 7D 08 C3
+
+movl 8(%rbp), %esi
+. 3817 0x12345678 4
+. 8B 75 08 C3
+
+movl 8(%rbx), %eax
+. 3818 0x12345678 4
+. 8B 43 08 C3
+
+movl 8(%rbx), %edi
+. 3819 0x12345678 4
+. 8B 7B 08 C3
+
+movl 8(%rbx), %edx
+. 3820 0x12345678 4
+. 8B 53 08 C3
+
+movl 8(%rbx), %esi
+. 3821 0x12345678 4
+. 8B 73 08 C3
+
+movl 8(%rbx,%rax,4), %ecx
+. 3822 0x12345678 5
+. 8B 4C 83 08 C3
+
+movl 8(%rdi), %eax
+. 3823 0x12345678 4
+. 8B 47 08 C3
+
+movl 8(%rdi), %edi
+. 3824 0x12345678 4
+. 8B 7F 08 C3
+
+movl 8(%rdi), %edx
+. 3825 0x12345678 4
+. 8B 57 08 C3
+
+movl 8(%rdi), %esi
+. 3826 0x12345678 4
+. 8B 77 08 C3
+
+movl 8(%rdx), %eax
+. 3827 0x12345678 4
+. 8B 42 08 C3
+
+movl 8(%rdx), %edi
+. 3828 0x12345678 4
+. 8B 7A 08 C3
+
+movl 8(%rdx), %edx
+. 3829 0x12345678 4
+. 8B 52 08 C3
+
+movl 8(%rsi), %eax
+. 3830 0x12345678 4
+. 8B 46 08 C3
+
+movl 8(%rsi), %edi
+. 3831 0x12345678 4
+. 8B 7E 08 C3
+
+movl 8(%rsi,%rcx), %eax
+. 3832 0x12345678 5
+. 8B 44 0E 08 C3
+
+movl $8, (%rsp)
+. 3833 0x12345678 8
+. C7 04 24 08 00 00 00 C3
+
+movl 8(%rsp), %eax
+. 3834 0x12345678 5
+. 8B 44 24 08 C3
+
+movl 8(%rsp), %ecx
+. 3835 0x12345678 5
+. 8B 4C 24 08 C3
+
+movl 8(%rsp), %edi
+. 3836 0x12345678 5
+. 8B 7C 24 08 C3
+
+movl 8(%rsp), %edx
+. 3837 0x12345678 5
+. 8B 54 24 08 C3
+
+movl 8(%rsp), %esi
+. 3838 0x12345678 5
+. 8B 74 24 08 C3
+
+movl 8(%rsp), %r8d
+. 3839 0x12345678 6
+. 44 8B 44 24 08 C3
+
+movl $905, %edx
+. 3840 0x12345678 6
+. BA 89 03 00 00 C3
+
+movl $9088, %edx
+. 3841 0x12345678 6
+. BA 80 23 00 00 C3
+
+movl $9120, %edx
+. 3842 0x12345678 6
+. BA A0 23 00 00 C3
+
+movl $9142, %edx
+. 3843 0x12345678 6
+. BA B6 23 00 00 C3
+
+movl $9165, %edx
+. 3844 0x12345678 6
+. BA CD 23 00 00 C3
+
+movl $9188, %edx
+. 3845 0x12345678 6
+. BA E4 23 00 00 C3
+
+movl $9, 24(%rax)
+. 3846 0x12345678 8
+. C7 40 18 09 00 00 00 C3
+
+movl $9, 24(%rdx)
+. 3847 0x12345678 8
+. C7 42 18 09 00 00 00 C3
+
+movl $9257, %edx
+. 3848 0x12345678 6
+. BA 29 24 00 00 C3
+
+movl $9271, %edx
+. 3849 0x12345678 6
+. BA 37 24 00 00 C3
+
+movl $92, %eax
+. 3850 0x12345678 6
+. B8 5C 00 00 00 C3
+
+movl $92, %edx
+. 3851 0x12345678 6
+. BA 5C 00 00 00 C3
+
+movl 92(%rsp), %edi
+. 3852 0x12345678 5
+. 8B 7C 24 5C C3
+
+movl 92(%rsp), %edx
+. 3853 0x12345678 5
+. 8B 54 24 5C C3
+
+movl 92(%rsp), %esi
+. 3854 0x12345678 5
+. 8B 74 24 5C C3
+
+movl $93, %edx
+. 3855 0x12345678 6
+. BA 5D 00 00 00 C3
+
+movl $94208, %esi
+. 3856 0x12345678 6
+. BE 00 70 01 00 C3
+
+movl $94209, %esi
+. 3857 0x12345678 6
+. BE 01 70 01 00 C3
+
+movl $94210, %esi
+. 3858 0x12345678 6
+. BE 02 70 01 00 C3
+
+movl $9500, %edx
+. 3859 0x12345678 6
+. BA 1C 25 00 00 C3
+
+movl $957, %edx
+. 3860 0x12345678 6
+. BA BD 03 00 00 C3
+
+movl $96, %eax
+. 3861 0x12345678 6
+. B8 60 00 00 00 C3
+
+movl 96(%rsp), %edi
+. 3862 0x12345678 5
+. 8B 7C 24 60 C3
+
+movl 96(%rsp), %esi
+. 3863 0x12345678 5
+. 8B 74 24 60 C3
+
+movl $978, %edx
+. 3864 0x12345678 6
+. BA D2 03 00 00 C3
+
+movl $979, %edx
+. 3865 0x12345678 6
+. BA D3 03 00 00 C3
+
+movl $9836, %edx
+. 3866 0x12345678 6
+. BA 6C 26 00 00 C3
+
+movl $9847, %edx
+. 3867 0x12345678 6
+. BA 77 26 00 00 C3
+
+movl $9862, %edx
+. 3868 0x12345678 6
+. BA 86 26 00 00 C3
+
+movl $988, %edx
+. 3869 0x12345678 6
+. BA DC 03 00 00 C3
+
+movl $98, %eax
+. 3870 0x12345678 6
+. B8 62 00 00 00 C3
+
+movl $9963, %edx
+. 3871 0x12345678 6
+. BA EB 26 00 00 C3
+
+movl $9974, %edx
+. 3872 0x12345678 6
+. BA F6 26 00 00 C3
+
+movl $9989, %edx
+. 3873 0x12345678 6
+. BA 05 27 00 00 C3
+
+movl $9, %eax
+. 3874 0x12345678 6
+. B8 09 00 00 00 C3
+
+movl $9, %r13d
+. 3875 0x12345678 7
+. 41 BD 09 00 00 00 C3
+
+movl $9, %r14d
+. 3876 0x12345678 7
+. 41 BE 09 00 00 00 C3
+
+movl $9, (%rax)
+. 3877 0x12345678 7
+. C7 00 09 00 00 00 C3
+
+movl %eax, 100(%rsp)
+. 3878 0x12345678 5
+. 89 44 24 64 C3
+
+movl %eax, 104(%rsp)
+. 3879 0x12345678 5
+. 89 44 24 68 C3
+
+movl %eax, 108(%rsp)
+. 3880 0x12345678 5
+. 89 44 24 6C C3
+
+movl %eax, 112(%rsp)
+. 3881 0x12345678 5
+. 89 44 24 70 C3
+
+movl %eax, 116(%rsp)
+. 3882 0x12345678 5
+. 89 44 24 74 C3
+
+movl %eax, 124(%rsp)
+. 3883 0x12345678 5
+. 89 44 24 7C C3
+
+movl %eax, 128(%rsp)
+. 3884 0x12345678 8
+. 89 84 24 80 00 00 00 C3
+
+movl %eax, 12(%rbp)
+. 3885 0x12345678 4
+. 89 45 0C C3
+
+movl %eax, 12(%rbx)
+. 3886 0x12345678 4
+. 89 43 0C C3
+
+movl %eax, 12(%rcx)
+. 3887 0x12345678 4
+. 89 41 0C C3
+
+movl %eax, 12(%rsi)
+. 3888 0x12345678 4
+. 89 46 0C C3
+
+movl %eax, 12(%rsp)
+. 3889 0x12345678 5
+. 89 44 24 0C C3
+
+movl %eax, 132(%rsp)
+. 3890 0x12345678 8
+. 89 84 24 84 00 00 00 C3
+
+movl %eax, 136(%rsp)
+. 3891 0x12345678 8
+. 89 84 24 88 00 00 00 C3
+
+movl %eax, 140(%rsp)
+. 3892 0x12345678 8
+. 89 84 24 8C 00 00 00 C3
+
+movl %eax, 144(%rsp)
+. 3893 0x12345678 8
+. 89 84 24 90 00 00 00 C3
+
+movl %eax, 148(%rsp)
+. 3894 0x12345678 8
+. 89 84 24 94 00 00 00 C3
+
+movl %eax, 152(%rsp)
+. 3895 0x12345678 8
+. 89 84 24 98 00 00 00 C3
+
+movl %eax, 156(%rsp)
+. 3896 0x12345678 8
+. 89 84 24 9C 00 00 00 C3
+
+movl %eax, 160(%rsp)
+. 3897 0x12345678 8
+. 89 84 24 A0 00 00 00 C3
+
+movl %eax, 164(%rsp)
+. 3898 0x12345678 8
+. 89 84 24 A4 00 00 00 C3
+
+movl %eax, 16(%r12)
+. 3899 0x12345678 6
+. 41 89 44 24 10 C3
+
+movl %eax, 16(%rbx)
+. 3900 0x12345678 4
+. 89 43 10 C3
+
+movl %eax, 16(%rsi)
+. 3901 0x12345678 4
+. 89 46 10 C3
+
+movl %eax, 16(%rsp)
+. 3902 0x12345678 5
+. 89 44 24 10 C3
+
+movl %eax, 172(%rsp)
+. 3903 0x12345678 8
+. 89 84 24 AC 00 00 00 C3
+
+movl %eax, 176(%rsp)
+. 3904 0x12345678 8
+. 89 84 24 B0 00 00 00 C3
+
+movl %eax, 184(%rsp)
+. 3905 0x12345678 8
+. 89 84 24 B8 00 00 00 C3
+
+movl %eax, 188(%rsp)
+. 3906 0x12345678 8
+. 89 84 24 BC 00 00 00 C3
+
+movl %eax, 192(%rsp)
+. 3907 0x12345678 8
+. 89 84 24 C0 00 00 00 C3
+
+movl %eax, 196(%rsp)
+. 3908 0x12345678 8
+. 89 84 24 C4 00 00 00 C3
+
+movl %eax, 200(%rsp)
+. 3909 0x12345678 8
+. 89 84 24 C8 00 00 00 C3
+
+movl %eax, 204(%rsp)
+. 3910 0x12345678 8
+. 89 84 24 CC 00 00 00 C3
+
+movl %eax, 208(%rsp)
+. 3911 0x12345678 8
+. 89 84 24 D0 00 00 00 C3
+
+movl %eax, 20(%r12)
+. 3912 0x12345678 6
+. 41 89 44 24 14 C3
+
+movl %eax, 20(%r13)
+. 3913 0x12345678 5
+. 41 89 45 14 C3
+
+movl %eax, 20(%rbx)
+. 3914 0x12345678 4
+. 89 43 14 C3
+
+movl %eax, 20(%rsp)
+. 3915 0x12345678 5
+. 89 44 24 14 C3
+
+movl %eax, 216(%rsp)
+. 3916 0x12345678 8
+. 89 84 24 D8 00 00 00 C3
+
+movl %eax, 228(%rsp)
+. 3917 0x12345678 8
+. 89 84 24 E4 00 00 00 C3
+
+movl %eax, 232(%rsp)
+. 3918 0x12345678 8
+. 89 84 24 E8 00 00 00 C3
+
+movl %eax, 240(%rsp)
+. 3919 0x12345678 8
+. 89 84 24 F0 00 00 00 C3
+
+movl %eax, 244(%rsp)
+. 3920 0x12345678 8
+. 89 84 24 F4 00 00 00 C3
+
+movl %eax, 248(%rsp)
+. 3921 0x12345678 8
+. 89 84 24 F8 00 00 00 C3
+
+movl %eax, 24(%r13)
+. 3922 0x12345678 5
+. 41 89 45 18 C3
+
+movl %eax, 24(%rbx)
+. 3923 0x12345678 4
+. 89 43 18 C3
+
+movl %eax, 24(%rsp)
+. 3924 0x12345678 5
+. 89 44 24 18 C3
+
+movl %eax, 252(%rsp)
+. 3925 0x12345678 8
+. 89 84 24 FC 00 00 00 C3
+
+movl %eax, 272(%rsp)
+. 3926 0x12345678 8
+. 89 84 24 10 01 00 00 C3
+
+movl %eax, 276(%rsp)
+. 3927 0x12345678 8
+. 89 84 24 14 01 00 00 C3
+
+movl %eax, 284(%rsp)
+. 3928 0x12345678 8
+. 89 84 24 1C 01 00 00 C3
+
+movl %eax, 288(%rsp,%rdx,4)
+. 3929 0x12345678 8
+. 89 84 94 20 01 00 00 C3
+
+movl %eax, 28(%rbx)
+. 3930 0x12345678 4
+. 89 43 1C C3
+
+movl %eax, 28(%rsp)
+. 3931 0x12345678 5
+. 89 44 24 1C C3
+
+movl %eax, 32(%r12)
+. 3932 0x12345678 6
+. 41 89 44 24 20 C3
+
+movl %eax, 32(%r13)
+. 3933 0x12345678 5
+. 41 89 45 20 C3
+
+movl %eax, 32(%rbx)
+. 3934 0x12345678 4
+. 89 43 20 C3
+
+movl %eax, 32(%rdi)
+. 3935 0x12345678 4
+. 89 47 20 C3
+
+movl %eax, 32(%rdx)
+. 3936 0x12345678 4
+. 89 42 20 C3
+
+movl %eax, 32(%rsi)
+. 3937 0x12345678 4
+. 89 46 20 C3
+
+movl %eax, 32(%rsp)
+. 3938 0x12345678 5
+. 89 44 24 20 C3
+
+movl %eax, 36(%rbx)
+. 3939 0x12345678 4
+. 89 43 24 C3
+
+movl %eax, 36(%rsp)
+. 3940 0x12345678 5
+. 89 44 24 24 C3
+
+movl %eax, 40(%rbx)
+. 3941 0x12345678 4
+. 89 43 28 C3
+
+movl %eax, 40(%rsp)
+. 3942 0x12345678 5
+. 89 44 24 28 C3
+
+movl %eax, 44(%rbx)
+. 3943 0x12345678 4
+. 89 43 2C C3
+
+movl %eax, 44(%rsp)
+. 3944 0x12345678 5
+. 89 44 24 2C C3
+
+movl %eax, 48(%rbx)
+. 3945 0x12345678 4
+. 89 43 30 C3
+
+movl %eax, 48(%rsp)
+. 3946 0x12345678 5
+. 89 44 24 30 C3
+
+movl %eax, 4(%rbx)
+. 3947 0x12345678 4
+. 89 43 04 C3
+
+movl %eax, 4(%rsp)
+. 3948 0x12345678 5
+. 89 44 24 04 C3
+
+movl %eax, 52(%rbx)
+. 3949 0x12345678 4
+. 89 43 34 C3
+
+movl %eax, 52(%rsp)
+. 3950 0x12345678 5
+. 89 44 24 34 C3
+
+movl %eax, 540(%rsp)
+. 3951 0x12345678 8
+. 89 84 24 1C 02 00 00 C3
+
+movl %eax, 544(%rsp)
+. 3952 0x12345678 8
+. 89 84 24 20 02 00 00 C3
+
+movl %eax, 548(%rsp)
+. 3953 0x12345678 8
+. 89 84 24 24 02 00 00 C3
+
+movl %eax, 552(%rsp)
+. 3954 0x12345678 8
+. 89 84 24 28 02 00 00 C3
+
+movl %eax, 56(%rbx)
+. 3955 0x12345678 4
+. 89 43 38 C3
+
+movl %eax, 56(%rsp)
+. 3956 0x12345678 5
+. 89 44 24 38 C3
+
+movl %eax, 60(%rbx)
+. 3957 0x12345678 4
+. 89 43 3C C3
+
+movl %eax, 60(%rsp)
+. 3958 0x12345678 5
+. 89 44 24 3C C3
+
+movl %eax, 64(%rsp)
+. 3959 0x12345678 5
+. 89 44 24 40 C3
+
+movl %eax, 68(%rsp)
+. 3960 0x12345678 5
+. 89 44 24 44 C3
+
+movl %eax, 72(%rsp)
+. 3961 0x12345678 5
+. 89 44 24 48 C3
+
+movl %eax, 76(%rsp)
+. 3962 0x12345678 5
+. 89 44 24 4C C3
+
+movl %eax, 80(%rsp)
+. 3963 0x12345678 5
+. 89 44 24 50 C3
+
+movl %eax, 84(%rsp)
+. 3964 0x12345678 5
+. 89 44 24 54 C3
+
+movl %eax, 88(%rsp)
+. 3965 0x12345678 5
+. 89 44 24 58 C3
+
+movl %eax, 8(%rbx)
+. 3966 0x12345678 4
+. 89 43 08 C3
+
+movl %eax, 8(%rsi)
+. 3967 0x12345678 4
+. 89 46 08 C3
+
+movl %eax, 8(%rsp)
+. 3968 0x12345678 5
+. 89 44 24 08 C3
+
+movl %eax, 92(%rsp)
+. 3969 0x12345678 5
+. 89 44 24 5C C3
+
+movl %eax, 96(%rsp)
+. 3970 0x12345678 5
+. 89 44 24 60 C3
+
+movl %eax, %ebp
+. 3971 0x12345678 3
+. 89 C5 C3
+
+movl %eax, %ebx
+. 3972 0x12345678 3
+. 89 C3 C3
+
+movl %eax, %ecx
+. 3973 0x12345678 3
+. 89 C1 C3
+
+movl %eax, %edi
+. 3974 0x12345678 3
+. 89 C7 C3
+
+movl %eax, %edx
+. 3975 0x12345678 3
+. 89 C2 C3
+
+movl %eax, %esi
+. 3976 0x12345678 3
+. 89 C6 C3
+
+movl %eax, 12345(%rip)
+. 3977 0x12345678 7
+. 89 05 39 30 00 00 C3
+
+movl %eax, %r11d
+. 3978 0x12345678 4
+. 41 89 C3 C3
+
+movl %eax, %r12d
+. 3979 0x12345678 4
+. 41 89 C4 C3
+
+movl %eax, %r13d
+. 3980 0x12345678 4
+. 41 89 C5 C3
+
+movl %eax, (%r14)
+. 3981 0x12345678 4
+. 41 89 06 C3
+
+movl %eax, %r14d
+. 3982 0x12345678 4
+. 41 89 C6 C3
+
+movl %eax, (%r15)
+. 3983 0x12345678 4
+. 41 89 07 C3
+
+movl %eax, %r15d
+. 3984 0x12345678 4
+. 41 89 C7 C3
+
+movl %eax, %r8d
+. 3985 0x12345678 4
+. 41 89 C0 C3
+
+movl %eax, (%r8,%rdx,4)
+. 3986 0x12345678 5
+. 41 89 04 90 C3
+
+movl %eax, %r9d
+. 3987 0x12345678 4
+. 41 89 C1 C3
+
+movl %eax, (%rbp)
+. 3988 0x12345678 4
+. 89 45 00 C3
+
+movl %eax, (%rbx)
+. 3989 0x12345678 3
+. 89 03 C3
+
+movl %eax, (%rcx)
+. 3990 0x12345678 3
+. 89 01 C3
+
+movl %eax, (%rcx,%rdx,8)
+. 3991 0x12345678 4
+. 89 04 D1 C3
+
+movl %eax, (%rdx)
+. 3992 0x12345678 3
+. 89 02 C3
+
+movl %eax, (%rsi)
+. 3993 0x12345678 3
+. 89 06 C3
+
+movl %eax, (%rsi,%rdx)
+. 3994 0x12345678 4
+. 89 04 16 C3
+
+movl %eax, (%rsp)
+. 3995 0x12345678 4
+. 89 04 24 C3
+
+movl %ebp, 12(%rdx,%r13)
+. 3996 0x12345678 6
+. 42 89 6C 2A 0C C3
+
+movl %ebp, 12(%rdx,%rbx)
+. 3997 0x12345678 5
+. 89 6C 1A 0C C3
+
+movl %ebp, 24(%rbx)
+. 3998 0x12345678 4
+. 89 6B 18 C3
+
+movl %ebp, 4(%rax)
+. 3999 0x12345678 4
+. 89 68 04 C3
+
+movl %ebp, 572(%rsp)
+. 4000 0x12345678 8
+. 89 AC 24 3C 02 00 00 C3
+
+movl %ebp, 68(%rsp)
+. 4001 0x12345678 5
+. 89 6C 24 44 C3
+
+movl %ebp, 8(%rbx)
+. 4002 0x12345678 4
+. 89 6B 08 C3
+
+movl %ebp, 8(%rsp)
+. 4003 0x12345678 5
+. 89 6C 24 08 C3
+
+movl %ebp, %eax
+. 4004 0x12345678 3
+. 89 E8 C3
+
+movl %ebp, %ebx
+. 4005 0x12345678 3
+. 89 EB C3
+
+movl %ebp, %ecx
+. 4006 0x12345678 3
+. 89 E9 C3
+
+movl %ebp, %edi
+. 4007 0x12345678 3
+. 89 EF C3
+
+movl %ebp, %edx
+. 4008 0x12345678 3
+. 89 EA C3
+
+movl %ebp, %esi
+. 4009 0x12345678 3
+. 89 EE C3
+
+movl %ebp, %r12d
+. 4010 0x12345678 4
+. 41 89 EC C3
+
+movl %ebp, %r13d
+. 4011 0x12345678 4
+. 41 89 ED C3
+
+movl %ebp, (%r15)
+. 4012 0x12345678 4
+. 41 89 2F C3
+
+movl %ebp, %r8d
+. 4013 0x12345678 4
+. 41 89 E8 C3
+
+movl %ebp, %r9d
+. 4014 0x12345678 4
+. 41 89 E9 C3
+
+movl %ebp, (%rcx,%rax,8)
+. 4015 0x12345678 4
+. 89 2C C1 C3
+
+movl %ebp, (%rsp)
+. 4016 0x12345678 4
+. 89 2C 24 C3
+
+movl %ebx, 12(%rbp)
+. 4017 0x12345678 4
+. 89 5D 0C C3
+
+movl %ebx, 16(%rbp)
+. 4018 0x12345678 4
+. 89 5D 10 C3
+
+movl %ebx, 24(%rsp)
+. 4019 0x12345678 5
+. 89 5C 24 18 C3
+
+movl %ebx, 32(%rbp)
+. 4020 0x12345678 4
+. 89 5D 20 C3
+
+movl %ebx, 40(%rsp)
+. 4021 0x12345678 5
+. 89 5C 24 28 C3
+
+movl %ebx, 4(%rax)
+. 4022 0x12345678 4
+. 89 58 04 C3
+
+movl %ebx, 52(%rsp)
+. 4023 0x12345678 5
+. 89 5C 24 34 C3
+
+movl %ebx, 8(%rax)
+. 4024 0x12345678 4
+. 89 58 08 C3
+
+movl %ebx, 8(%rsp)
+. 4025 0x12345678 5
+. 89 5C 24 08 C3
+
+movl %ebx, %eax
+. 4026 0x12345678 3
+. 89 D8 C3
+
+movl %ebx, %ebp
+. 4027 0x12345678 3
+. 89 DD C3
+
+movl %ebx, %ecx
+. 4028 0x12345678 3
+. 89 D9 C3
+
+movl %ebx, %edi
+. 4029 0x12345678 3
+. 89 DF C3
+
+movl %ebx, %edx
+. 4030 0x12345678 3
+. 89 DA C3
+
+movl %ebx, %esi
+. 4031 0x12345678 3
+. 89 DE C3
+
+movl %ebx, %r12d
+. 4032 0x12345678 4
+. 41 89 DC C3
+
+movl %ebx, %r15d
+. 4033 0x12345678 4
+. 41 89 DF C3
+
+movl %ebx, %r8d
+. 4034 0x12345678 4
+. 41 89 D8 C3
+
+movl %ebx, (%rax)
+. 4035 0x12345678 3
+. 89 18 C3
+
+movl %ebx, (%rcx,%rax,4)
+. 4036 0x12345678 4
+. 89 1C 81 C3
+
+movl %ecx, 12(%rsp)
+. 4037 0x12345678 5
+. 89 4C 24 0C C3
+
+movl %ecx, 16(%rsp)
+. 4038 0x12345678 5
+. 89 4C 24 10 C3
+
+movl %ecx, 220(%rsp)
+. 4039 0x12345678 8
+. 89 8C 24 DC 00 00 00 C3
+
+movl %ecx, 24(%rbx)
+. 4040 0x12345678 4
+. 89 4B 18 C3
+
+movl %ecx, 24(%rsp)
+. 4041 0x12345678 5
+. 89 4C 24 18 C3
+
+movl %ecx, 28(%rsp)
+. 4042 0x12345678 5
+. 89 4C 24 1C C3
+
+movl %ecx, 32(%rdi)
+. 4043 0x12345678 4
+. 89 4F 20 C3
+
+movl %ecx, 32(%rsp)
+. 4044 0x12345678 5
+. 89 4C 24 20 C3
+
+movl %ecx, 36(%rsp)
+. 4045 0x12345678 5
+. 89 4C 24 24 C3
+
+movl %ecx, %eax
+. 4046 0x12345678 3
+. 89 C8 C3
+
+movl %ecx, %ebp
+. 4047 0x12345678 3
+. 89 CD C3
+
+movl %ecx, %ebx
+. 4048 0x12345678 3
+. 89 CB C3
+
+movl %ecx, %edi
+. 4049 0x12345678 3
+. 89 CF C3
+
+movl %ecx, %edx
+. 4050 0x12345678 3
+. 89 CA C3
+
+movl %ecx, %esi
+. 4051 0x12345678 3
+. 89 CE C3
+
+movl %ecx, %r10d
+. 4052 0x12345678 4
+. 41 89 CA C3
+
+movl %ecx, %r12d
+. 4053 0x12345678 4
+. 41 89 CC C3
+
+movl %ecx, %r13d
+. 4054 0x12345678 4
+. 41 89 CD C3
+
+movl %ecx, %r14d
+. 4055 0x12345678 4
+. 41 89 CE C3
+
+movl %ecx, %r15d
+. 4056 0x12345678 4
+. 41 89 CF C3
+
+movl %ecx, (%rsi)
+. 4057 0x12345678 3
+. 89 0E C3
+
+movl %edi, 120(%rsp)
+. 4058 0x12345678 5
+. 89 7C 24 78 C3
+
+movl %edi, 12(%rsi,%rax,4)
+. 4059 0x12345678 5
+. 89 7C 86 0C C3
+
+movl %edi, 16(%rbp)
+. 4060 0x12345678 4
+. 89 7D 10 C3
+
+movl %edi, 24(%rsp)
+. 4061 0x12345678 5
+. 89 7C 24 18 C3
+
+movl %edi, 40(%rsp)
+. 4062 0x12345678 5
+. 89 7C 24 28 C3
+
+movl %edi, 44(%rsp)
+. 4063 0x12345678 5
+. 89 7C 24 2C C3
+
+movl %edi, 48(%rbx)
+. 4064 0x12345678 4
+. 89 7B 30 C3
+
+movl %edi, 56(%rsp)
+. 4065 0x12345678 5
+. 89 7C 24 38 C3
+
+movl %edi, 8(%rax)
+. 4066 0x12345678 4
+. 89 78 08 C3
+
+movl %edi, %eax
+. 4067 0x12345678 3
+. 89 F8 C3
+
+movl %edi, %ebp
+. 4068 0x12345678 3
+. 89 FD C3
+
+movl %edi, %ebx
+. 4069 0x12345678 3
+. 89 FB C3
+
+movl %edi, %ecx
+. 4070 0x12345678 3
+. 89 F9 C3
+
+movl %edi, %edx
+. 4071 0x12345678 3
+. 89 FA C3
+
+movl %edi, %esi
+. 4072 0x12345678 3
+. 89 FE C3
+
+movl %edi, -9(%rip)
+. 4073 0x12345678 7
+. 89 3D F7 FF FF FF C3
+
+movl %edi, %r12d
+. 4074 0x12345678 4
+. 41 89 FC C3
+
+movl %edi, %r13d
+. 4075 0x12345678 4
+. 41 89 FD C3
+
+movl %edi, %r14d
+. 4076 0x12345678 4
+. 41 89 FE C3
+
+movl %edi, %r15d
+. 4077 0x12345678 4
+. 41 89 FF C3
+
+movl %edi, %r8d
+. 4078 0x12345678 4
+. 41 89 F8 C3
+
+movl %edi, %r9d
+. 4079 0x12345678 4
+. 41 89 F9 C3
+
+movl %edi, (%rsi)
+. 4080 0x12345678 3
+. 89 3E C3
+
+movl %edx, 12(%rsp)
+. 4081 0x12345678 5
+. 89 54 24 0C C3
+
+movl %edx, 16(%rax)
+. 4082 0x12345678 4
+. 89 50 10 C3
+
+movl %edx, 16(%rdi,%rax,4)
+. 4083 0x12345678 5
+. 89 54 87 10 C3
+
+movl %edx, -16(%rsp)
+. 4084 0x12345678 5
+. 89 54 24 F0 C3
+
+movl %edx, 16(%rsp)
+. 4085 0x12345678 5
+. 89 54 24 10 C3
+
+movl %edx, -20(%rsp)
+. 4086 0x12345678 5
+. 89 54 24 EC C3
+
+movl %edx, 20(%rsp)
+. 4087 0x12345678 5
+. 89 54 24 14 C3
+
+movl %edx, 212(%rsp)
+. 4088 0x12345678 8
+. 89 94 24 D4 00 00 00 C3
+
+movl %edx, 224(%rsp)
+. 4089 0x12345678 8
+. 89 94 24 E0 00 00 00 C3
+
+movl %edx, 24(%rax)
+. 4090 0x12345678 4
+. 89 50 18 C3
+
+movl %edx, 24(%rsp)
+. 4091 0x12345678 5
+. 89 54 24 18 C3
+
+movl %edx, 288(%rsp,%rax,4)
+. 4092 0x12345678 8
+. 89 94 84 20 01 00 00 C3
+
+movl %edx, 28(%rbx)
+. 4093 0x12345678 4
+. 89 53 1C C3
+
+movl %edx, 292(%rsp)
+. 4094 0x12345678 8
+. 89 94 24 24 01 00 00 C3
+
+movl %edx, 292(%rsp,%rax,4)
+. 4095 0x12345678 8
+. 89 94 84 24 01 00 00 C3
+
+movl %edx, 32(%rdi)
+. 4096 0x12345678 4
+. 89 57 20 C3
+
+movl %edx, 32(%rsp)
+. 4097 0x12345678 5
+. 89 54 24 20 C3
+
+movl %edx, 348(%rsp)
+. 4098 0x12345678 8
+. 89 94 24 5C 01 00 00 C3
+
+movl %edx, 40(%rsp)
+. 4099 0x12345678 5
+. 89 54 24 28 C3
+
+movl %edx, 4(%rsi)
+. 4100 0x12345678 4
+. 89 56 04 C3
+
+movl %edx, -8(%rsp)
+. 4101 0x12345678 5
+. 89 54 24 F8 C3
+
+movl %edx, 8(%rsp)
+. 4102 0x12345678 5
+. 89 54 24 08 C3
+
+movl %edx, %eax
+. 4103 0x12345678 3
+. 89 D0 C3
+
+movl %edx, %ebp
+. 4104 0x12345678 3
+. 89 D5 C3
+
+movl %edx, %ebx
+. 4105 0x12345678 3
+. 89 D3 C3
+
+movl %edx, %ecx
+. 4106 0x12345678 3
+. 89 D1 C3
+
+movl %edx, %edi
+. 4107 0x12345678 3
+. 89 D7 C3
+
+movl %edx, %esi
+. 4108 0x12345678 3
+. 89 D6 C3
+
+movl %edx, %r11d
+. 4109 0x12345678 4
+. 41 89 D3 C3
+
+movl %edx, (%r12)
+. 4110 0x12345678 5
+. 41 89 14 24 C3
+
+movl %edx, %r12d
+. 4111 0x12345678 4
+. 41 89 D4 C3
+
+movl %edx, %r13d
+. 4112 0x12345678 4
+. 41 89 D5 C3
+
+movl %edx, %r14d
+. 4113 0x12345678 4
+. 41 89 D6 C3
+
+movl %edx, %r15d
+. 4114 0x12345678 4
+. 41 89 D7 C3
+
+movl %edx, %r8d
+. 4115 0x12345678 4
+. 41 89 D0 C3
+
+movl %edx, %r9d
+. 4116 0x12345678 4
+. 41 89 D1 C3
+
+movl %edx, (%rdi,%rax,4)
+. 4117 0x12345678 4
+. 89 14 87 C3
+
+movl %edx, (%rdi,%rcx,4)
+. 4118 0x12345678 4
+. 89 14 8F C3
+
+movl %edx, (%rsp)
+. 4119 0x12345678 4
+. 89 14 24 C3
+
+movl %esi, 16(%rdi,%rax,4)
+. 4120 0x12345678 5
+. 89 74 87 10 C3
+
+movl %esi, 20(%rsp)
+. 4121 0x12345678 5
+. 89 74 24 14 C3
+
+movl %esi, 32(%rbp)
+. 4122 0x12345678 4
+. 89 75 20 C3
+
+movl %esi, 36(%rsp)
+. 4123 0x12345678 5
+. 89 74 24 24 C3
+
+movl %esi, 4(%rsp)
+. 4124 0x12345678 5
+. 89 74 24 04 C3
+
+movl %esi, 56(%rsp)
+. 4125 0x12345678 5
+. 89 74 24 38 C3
+
+movl %esi, 8(%rbx,%rcx)
+. 4126 0x12345678 5
+. 89 74 0B 08 C3
+
+movl %esi, %eax
+. 4127 0x12345678 3
+. 89 F0 C3
+
+movl %esi, %ebp
+. 4128 0x12345678 3
+. 89 F5 C3
+
+movl %esi, %ebx
+. 4129 0x12345678 3
+. 89 F3 C3
+
+movl %esi, %ecx
+. 4130 0x12345678 3
+. 89 F1 C3
+
+movl %esi, %edi
+. 4131 0x12345678 3
+. 89 F7 C3
+
+movl %esi, %edx
+. 4132 0x12345678 3
+. 89 F2 C3
+
+movl %esi, -545454(%rip)
+. 4133 0x12345678 7
+. 89 35 52 AD F7 FF C3
+
+movl %esi, %r10d
+. 4134 0x12345678 4
+. 41 89 F2 C3
+
+movl %esi, %r11d
+. 4135 0x12345678 4
+. 41 89 F3 C3
+
+movl %esi, %r12d
+. 4136 0x12345678 4
+. 41 89 F4 C3
+
+movl %esi, %r13d
+. 4137 0x12345678 4
+. 41 89 F5 C3
+
+movl %esi, %r14d
+. 4138 0x12345678 4
+. 41 89 F6 C3
+
+movl %esi, (%r14,%rax,4)
+. 4139 0x12345678 5
+. 41 89 34 86 C3
+
+movl %esi, %r15d
+. 4140 0x12345678 4
+. 41 89 F7 C3
+
+movl %esi, %r8d
+. 4141 0x12345678 4
+. 41 89 F0 C3
+
+movl %esi, %r9d
+. 4142 0x12345678 4
+. 41 89 F1 C3
+
+movl %esi, (%rdi,%rax,4)
+. 4143 0x12345678 4
+. 89 34 87 C3
+
+movl %r10d, %eax
+. 4144 0x12345678 4
+. 44 89 D0 C3
+
+movl %r10d, %edi
+. 4145 0x12345678 4
+. 44 89 D7 C3
+
+movl %r10d, %edx
+. 4146 0x12345678 4
+. 44 89 D2 C3
+
+movl %r10d, %r11d
+. 4147 0x12345678 4
+. 45 89 D3 C3
+
+movl %r10d, %r8d
+. 4148 0x12345678 4
+. 45 89 D0 C3
+
+movl %r10d, %r9d
+. 4149 0x12345678 4
+. 45 89 D1 C3
+
+movl %r11d, -4(%rsp)
+. 4150 0x12345678 6
+. 44 89 5C 24 FC C3
+
+movl %r11d, %eax
+. 4151 0x12345678 4
+. 44 89 D8 C3
+
+movl %r11d, %ecx
+. 4152 0x12345678 4
+. 44 89 D9 C3
+
+movl %r11d, %edx
+. 4153 0x12345678 4
+. 44 89 DA C3
+
+movl %r11d, %r8d
+. 4154 0x12345678 4
+. 45 89 D8 C3
+
+movl %r12d, 12(%rax)
+. 4155 0x12345678 5
+. 44 89 60 0C C3
+
+movl %r12d, 16(%rax)
+. 4156 0x12345678 5
+. 44 89 60 10 C3
+
+movl %r12d, 24(%rax)
+. 4157 0x12345678 5
+. 44 89 60 18 C3
+
+movl %r12d, 32(%rax)
+. 4158 0x12345678 5
+. 44 89 60 20 C3
+
+movl %r12d, 8(%rax)
+. 4159 0x12345678 5
+. 44 89 60 08 C3
+
+movl %r12d, %eax
+. 4160 0x12345678 4
+. 44 89 E0 C3
+
+movl %r12d, %ebp
+. 4161 0x12345678 4
+. 44 89 E5 C3
+
+movl %r12d, %ebx
+. 4162 0x12345678 4
+. 44 89 E3 C3
+
+movl %r12d, %ecx
+. 4163 0x12345678 4
+. 44 89 E1 C3
+
+movl %r12d, %edi
+. 4164 0x12345678 4
+. 44 89 E7 C3
+
+movl %r12d, %edx
+. 4165 0x12345678 4
+. 44 89 E2 C3
+
+movl %r12d, %esi
+. 4166 0x12345678 4
+. 44 89 E6 C3
+
+movl %r12d, %r8d
+. 4167 0x12345678 4
+. 45 89 E0 C3
+
+movl %r12d, (%rax)
+. 4168 0x12345678 4
+. 44 89 20 C3
+
+movl %r12d, (%rdx,%rax,4)
+. 4169 0x12345678 5
+. 44 89 24 82 C3
+
+movl (%r12), %eax
+. 4170 0x12345678 5
+. 41 8B 04 24 C3
+
+movl (%r12), %edx
+. 4171 0x12345678 5
+. 41 8B 14 24 C3
+
+movl %r13d, 12(%rax)
+. 4172 0x12345678 5
+. 44 89 68 0C C3
+
+movl %r13d, 16(%rax)
+. 4173 0x12345678 5
+. 44 89 68 10 C3
+
+movl %r13d, 24(%rax)
+. 4174 0x12345678 5
+. 44 89 68 18 C3
+
+movl %r13d, 540(%rsp)
+. 4175 0x12345678 9
+. 44 89 AC 24 1C 02 00 00 C3
+
+movl %r13d, 544(%rsp)
+. 4176 0x12345678 9
+. 44 89 AC 24 20 02 00 00 C3
+
+movl %r13d, 548(%rsp)
+. 4177 0x12345678 9
+. 44 89 AC 24 24 02 00 00 C3
+
+movl %r13d, 552(%rsp)
+. 4178 0x12345678 9
+. 44 89 AC 24 28 02 00 00 C3
+
+movl %r13d, %eax
+. 4179 0x12345678 4
+. 44 89 E8 C3
+
+movl %r13d, %ebp
+. 4180 0x12345678 4
+. 44 89 ED C3
+
+movl %r13d, %ecx
+. 4181 0x12345678 4
+. 44 89 E9 C3
+
+movl %r13d, %edi
+. 4182 0x12345678 4
+. 44 89 EF C3
+
+movl %r13d, %edx
+. 4183 0x12345678 4
+. 44 89 EA C3
+
+movl %r13d, %esi
+. 4184 0x12345678 4
+. 44 89 EE C3
+
+movl %r13d, %r8d
+. 4185 0x12345678 4
+. 45 89 E8 C3
+
+movl (%r13), %eax
+. 4186 0x12345678 5
+. 41 8B 45 00 C3
+
+movl (%r13), %ebx
+. 4187 0x12345678 5
+. 41 8B 5D 00 C3
+
+movl (%r13,%rax,4), %eax
+. 4188 0x12345678 6
+. 41 8B 44 85 00 C3
+
+movl %r14d, 20(%rbx)
+. 4189 0x12345678 5
+. 44 89 73 14 C3
+
+movl %r14d, %eax
+. 4190 0x12345678 4
+. 44 89 F0 C3
+
+movl %r14d, %ebp
+. 4191 0x12345678 4
+. 44 89 F5 C3
+
+movl %r14d, %ecx
+. 4192 0x12345678 4
+. 44 89 F1 C3
+
+movl %r14d, %edi
+. 4193 0x12345678 4
+. 44 89 F7 C3
+
+movl %r14d, %edx
+. 4194 0x12345678 4
+. 44 89 F2 C3
+
+movl %r14d, %esi
+. 4195 0x12345678 4
+. 44 89 F6 C3
+
+movl %r14d, %r8d
+. 4196 0x12345678 4
+. 45 89 F0 C3
+
+movl %r14d, %r9d
+. 4197 0x12345678 4
+. 45 89 F1 C3
+
+movl %r14d, (%rax)
+. 4198 0x12345678 4
+. 44 89 30 C3
+
+movl (%r14), %edi
+. 4199 0x12345678 4
+. 41 8B 3E C3
+
+movl (%r14,%rdx,4), %ebx
+. 4200 0x12345678 5
+. 41 8B 1C 96 C3
+
+movl %r15d, %eax
+. 4201 0x12345678 4
+. 44 89 F8 C3
+
+movl %r15d, %ebp
+. 4202 0x12345678 4
+. 44 89 FD C3
+
+movl %r15d, %ebx
+. 4203 0x12345678 4
+. 44 89 FB C3
+
+movl %r15d, %ecx
+. 4204 0x12345678 4
+. 44 89 F9 C3
+
+movl %r15d, %edi
+. 4205 0x12345678 4
+. 44 89 FF C3
+
+movl %r15d, %edx
+. 4206 0x12345678 4
+. 44 89 FA C3
+
+movl %r15d, %esi
+. 4207 0x12345678 4
+. 44 89 FE C3
+
+movl %r15d, %r13d
+. 4208 0x12345678 4
+. 45 89 FD C3
+
+movl %r15d, %r8d
+. 4209 0x12345678 4
+. 45 89 F8 C3
+
+movl (%r15), %edi
+. 4210 0x12345678 4
+. 41 8B 3F C3
+
+movl %r8d, 20(%rsp)
+. 4211 0x12345678 6
+. 44 89 44 24 14 C3
+
+movl %r8d, 24(%rsp)
+. 4212 0x12345678 6
+. 44 89 44 24 18 C3
+
+movl %r8d, 28(%rbx)
+. 4213 0x12345678 5
+. 44 89 43 1C C3
+
+movl %r8d, 40(%rsp)
+. 4214 0x12345678 6
+. 44 89 44 24 28 C3
+
+movl %r8d, 4(%rsi)
+. 4215 0x12345678 5
+. 44 89 46 04 C3
+
+movl %r8d, 8(%rsi)
+. 4216 0x12345678 5
+. 44 89 46 08 C3
+
+movl %r8d, 8(%rsp)
+. 4217 0x12345678 6
+. 44 89 44 24 08 C3
+
+movl %r8d, %eax
+. 4218 0x12345678 4
+. 44 89 C0 C3
+
+movl %r8d, %ebp
+. 4219 0x12345678 4
+. 44 89 C5 C3
+
+movl %r8d, %ebx
+. 4220 0x12345678 4
+. 44 89 C3 C3
+
+movl %r8d, %edi
+. 4221 0x12345678 4
+. 44 89 C7 C3
+
+movl %r8d, %edx
+. 4222 0x12345678 4
+. 44 89 C2 C3
+
+movl %r8d, %r12d
+. 4223 0x12345678 4
+. 45 89 C4 C3
+
+movl %r8d, %r13d
+. 4224 0x12345678 4
+. 45 89 C5 C3
+
+movl %r8d, %r14d
+. 4225 0x12345678 4
+. 45 89 C6 C3
+
+movl (%r8), %eax
+. 4226 0x12345678 4
+. 41 8B 00 C3
+
+movl %r9d, 20(%rsp)
+. 4227 0x12345678 6
+. 44 89 4C 24 14 C3
+
+movl %r9d, 40(%rsp)
+. 4228 0x12345678 6
+. 44 89 4C 24 28 C3
+
+movl %r9d, 48(%rsp)
+. 4229 0x12345678 6
+. 44 89 4C 24 30 C3
+
+movl %r9d, %eax
+. 4230 0x12345678 4
+. 44 89 C8 C3
+
+movl %r9d, %ebp
+. 4231 0x12345678 4
+. 44 89 CD C3
+
+movl %r9d, %ebx
+. 4232 0x12345678 4
+. 44 89 CB C3
+
+movl %r9d, %ecx
+. 4233 0x12345678 4
+. 44 89 C9 C3
+
+movl %r9d, %edi
+. 4234 0x12345678 4
+. 44 89 CF C3
+
+movl %r9d, %edx
+. 4235 0x12345678 4
+. 44 89 CA C3
+
+movl %r9d, %esi
+. 4236 0x12345678 4
+. 44 89 CE C3
+
+movl %r9d, %r11d
+. 4237 0x12345678 4
+. 45 89 CB C3
+
+movl %r9d, %r12d
+. 4238 0x12345678 4
+. 45 89 CC C3
+
+movl %r9d, %r13d
+. 4239 0x12345678 4
+. 45 89 CD C3
+
+movl %r9d, %r15d
+. 4240 0x12345678 4
+. 45 89 CF C3
+
+movl (%rax), %eax
+. 4241 0x12345678 3
+. 8B 00 C3
+
+movl (%rax), %ecx
+. 4242 0x12345678 3
+. 8B 08 C3
+
+movl (%rax), %edi
+. 4243 0x12345678 3
+. 8B 38 C3
+
+movl (%rax), %esi
+. 4244 0x12345678 3
+. 8B 30 C3
+
+movl (%rax,%rcx,8), %eax
+. 4245 0x12345678 4
+. 8B 04 C8 C3
+
+movl (%rax,%rdx,4), %eax
+. 4246 0x12345678 4
+. 8B 04 90 C3
+
+movl (%rax,%rdx,4), %ebx
+. 4247 0x12345678 4
+. 8B 1C 90 C3
+
+movl (%rax,%rdx,4), %esi
+. 4248 0x12345678 4
+. 8B 34 90 C3
+
+movl (%rax,%rdx,8), %ebp
+. 4249 0x12345678 4
+. 8B 2C D0 C3
+
+movl (%rbp), %eax
+. 4250 0x12345678 4
+. 8B 45 00 C3
+
+movl (%rbp), %edi
+. 4251 0x12345678 4
+. 8B 7D 00 C3
+
+movl (%rbp), %edx
+. 4252 0x12345678 4
+. 8B 55 00 C3
+
+movl (%rbp), %esi
+. 4253 0x12345678 4
+. 8B 75 00 C3
+
+movl (%rbp,%rbx,4), %edi
+. 4254 0x12345678 5
+. 8B 7C 9D 00 C3
+
+movl (%rbx), %eax
+. 4255 0x12345678 3
+. 8B 03 C3
+
+movl (%rbx), %ebp
+. 4256 0x12345678 3
+. 8B 2B C3
+
+movl (%rbx), %edx
+. 4257 0x12345678 3
+. 8B 13 C3
+
+movl (%rbx), %esi
+. 4258 0x12345678 3
+. 8B 33 C3
+
+movl (%rbx,%rax), %r15d
+. 4259 0x12345678 5
+. 44 8B 3C 03 C3
+
+movl (%rbx,%rbp,4), %edi
+. 4260 0x12345678 4
+. 8B 3C AB C3
+
+movl (%rcx), %eax
+. 4261 0x12345678 3
+. 8B 01 C3
+
+movl (%rcx), %edi
+. 4262 0x12345678 3
+. 8B 39 C3
+
+movl (%rcx), %edx
+. 4263 0x12345678 3
+. 8B 11 C3
+
+movl (%rcx,%rax,4), %eax
+. 4264 0x12345678 4
+. 8B 04 81 C3
+
+movl (%rcx,%rax,4), %edx
+. 4265 0x12345678 4
+. 8B 14 81 C3
+
+movl (%rcx,%rbx), %edi
+. 4266 0x12345678 4
+. 8B 3C 19 C3
+
+movl (%rcx,%rdx,8), %edx
+. 4267 0x12345678 4
+. 8B 14 D1 C3
+
+movl (%rcx,%rsi,8), %esi
+. 4268 0x12345678 4
+. 8B 34 F1 C3
+
+movl (%rdi), %eax
+. 4269 0x12345678 3
+. 8B 07 C3
+
+movl (%rdi), %ebp
+. 4270 0x12345678 3
+. 8B 2F C3
+
+movl (%rdi), %edi
+. 4271 0x12345678 3
+. 8B 3F C3
+
+movl (%rdi), %esi
+. 4272 0x12345678 3
+. 8B 37 C3
+
+movl (%rdi), %r12d
+. 4273 0x12345678 4
+. 44 8B 27 C3
+
+movl (%rdi,%rdx), %edi
+. 4274 0x12345678 4
+. 8B 3C 17 C3
+
+movl (%rdx), %eax
+. 4275 0x12345678 3
+. 8B 02 C3
+
+movl (%rdx), %ecx
+. 4276 0x12345678 3
+. 8B 0A C3
+
+movl (%rdx), %esi
+. 4277 0x12345678 3
+. 8B 32 C3
+
+movl (%rdx,%rax,4), %eax
+. 4278 0x12345678 4
+. 8B 04 82 C3
+
+movl (%rdx,%rax,4), %ebp
+. 4279 0x12345678 4
+. 8B 2C 82 C3
+
+movl (%rdx,%rax,4), %edi
+. 4280 0x12345678 4
+. 8B 3C 82 C3
+
+movl (%rdx,%rax), %r12d
+. 4281 0x12345678 5
+. 44 8B 24 02 C3
+
+movl (%rdx,%rbx), %edx
+. 4282 0x12345678 4
+. 8B 14 1A C3
+
+movl (%rdx,%rdi), %edi
+. 4283 0x12345678 4
+. 8B 3C 3A C3
+
+movl (%rsi), %eax
+. 4284 0x12345678 3
+. 8B 06 C3
+
+movl (%rsi), %edx
+. 4285 0x12345678 3
+. 8B 16 C3
+
+movl (%rsi,%r13), %edi
+. 4286 0x12345678 5
+. 42 8B 3C 2E C3
+
+movl (%rsi,%rax), %esi
+. 4287 0x12345678 4
+. 8B 34 06 C3
+
+movl (%rsi,%rbx,4), %eax
+. 4288 0x12345678 4
+. 8B 04 9E C3
+
+movl (%rsi,%rcx), %edx
+. 4289 0x12345678 4
+. 8B 14 0E C3
+
+movl (%rsi,%rdx,4), %eax
+. 4290 0x12345678 4
+. 8B 04 96 C3
+
+movl (%rsi,%rdx,4), %r13d
+. 4291 0x12345678 5
+. 44 8B 2C 96 C3
+
+movl (%rsi,%rdx), %ecx
+. 4292 0x12345678 4
+. 8B 0C 16 C3
+
+movl (%rsp), %edi
+. 4293 0x12345678 4
+. 8B 3C 24 C3
+
+movl (%rsp), %edx
+. 4294 0x12345678 4
+. 8B 14 24 C3
+
+movq $0, 112(%rsp)
+. 4295 0x12345678 10
+. 48 C7 44 24 70 00 00 00 00 C3
+
+movq $0, 120(%rsp)
+. 4296 0x12345678 10
+. 48 C7 44 24 78 00 00 00 00 C3
+
+movq $0, 16(%rax)
+. 4297 0x12345678 9
+. 48 C7 40 10 00 00 00 00 C3
+
+movq $0, 16(%rsp)
+. 4298 0x12345678 10
+. 48 C7 44 24 10 00 00 00 00 C3
+
+movq $0, 192(%rsp)
+. 4299 0x12345678 13
+. 48 C7 84 24 C0 00 00 00 00 00 00 00 C3
+
+movq $0, 24(%rax)
+. 4300 0x12345678 9
+. 48 C7 40 18 00 00 00 00 C3
+
+movq $0, 24(%rbx)
+. 4301 0x12345678 9
+. 48 C7 43 18 00 00 00 00 C3
+
+movq $0, 24(%rsp)
+. 4302 0x12345678 10
+. 48 C7 44 24 18 00 00 00 00 C3
+
+movq $0, 32(%rax)
+. 4303 0x12345678 9
+. 48 C7 40 20 00 00 00 00 C3
+
+movq $0, 40(%rax)
+. 4304 0x12345678 9
+. 48 C7 40 28 00 00 00 00 C3
+
+movq $0, 40(%rsp)
+. 4305 0x12345678 10
+. 48 C7 44 24 28 00 00 00 00 C3
+
+movq $0, 48(%rsp)
+. 4306 0x12345678 10
+. 48 C7 44 24 30 00 00 00 00 C3
+
+movq $0, 560(%rsp)
+. 4307 0x12345678 13
+. 48 C7 84 24 30 02 00 00 00 00 00 00 C3
+
+movq $0, 64(%rsp)
+. 4308 0x12345678 10
+. 48 C7 44 24 40 00 00 00 00 C3
+
+movq $0, 8(%rax)
+. 4309 0x12345678 9
+. 48 C7 40 08 00 00 00 00 C3
+
+movq $0, 8(%rbx)
+. 4310 0x12345678 9
+. 48 C7 43 08 00 00 00 00 C3
+
+movq $0, 8(%rdx)
+. 4311 0x12345678 9
+. 48 C7 42 08 00 00 00 00 C3
+
+movq $0, 8(%rsp)
+. 4312 0x12345678 10
+. 48 C7 44 24 08 00 00 00 00 C3
+
+movq $0, (%r14,%rax,8)
+. 4313 0x12345678 9
+. 49 C7 04 C6 00 00 00 00 C3
+
+movq $0, (%rax)
+. 4314 0x12345678 8
+. 48 C7 00 00 00 00 00 C3
+
+movq $0, (%rax,%rbp,8)
+. 4315 0x12345678 9
+. 48 C7 04 E8 00 00 00 00 C3
+
+movq $0, (%rax,%rcx,8)
+. 4316 0x12345678 9
+. 48 C7 04 C8 00 00 00 00 C3
+
+movq $0, (%rbp,%rax,8)
+. 4317 0x12345678 10
+. 48 C7 44 C5 00 00 00 00 00 C3
+
+movq $0, (%rcx,%rsi,8)
+. 4318 0x12345678 9
+. 48 C7 04 F1 00 00 00 00 C3
+
+movq $0, (%rsi,%rcx,8)
+. 4319 0x12345678 9
+. 48 C7 04 CE 00 00 00 00 C3
+
+movq 104(%rsp), %r12
+. 4320 0x12345678 6
+. 4C 8B 64 24 68 C3
+
+movq 104(%rsp), %r13
+. 4321 0x12345678 6
+. 4C 8B 6C 24 68 C3
+
+movq 104(%rsp), %r14
+. 4322 0x12345678 6
+. 4C 8B 74 24 68 C3
+
+movq 104(%rsp), %rbx
+. 4323 0x12345678 6
+. 48 8B 5C 24 68 C3
+
+movq 104(%rsp), %rdi
+. 4324 0x12345678 6
+. 48 8B 7C 24 68 C3
+
+movq 104(%rsp), %rdx
+. 4325 0x12345678 6
+. 48 8B 54 24 68 C3
+
+movq 112(%rsp), %r13
+. 4326 0x12345678 6
+. 4C 8B 6C 24 70 C3
+
+movq 112(%rsp), %r14
+. 4327 0x12345678 6
+. 4C 8B 74 24 70 C3
+
+movq 112(%rsp), %r15
+. 4328 0x12345678 6
+. 4C 8B 7C 24 70 C3
+
+movq 112(%rsp), %rax
+. 4329 0x12345678 6
+. 48 8B 44 24 70 C3
+
+movq 112(%rsp), %rbp
+. 4330 0x12345678 6
+. 48 8B 6C 24 70 C3
+
+movq 112(%rsp), %rbx
+. 4331 0x12345678 6
+. 48 8B 5C 24 70 C3
+
+movq 112(%rsp), %rcx
+. 4332 0x12345678 6
+. 48 8B 4C 24 70 C3
+
+movq 112(%rsp), %rdi
+. 4333 0x12345678 6
+. 48 8B 7C 24 70 C3
+
+movq 112(%rsp), %rdx
+. 4334 0x12345678 6
+. 48 8B 54 24 70 C3
+
+movq 112(%rsp), %rsi
+. 4335 0x12345678 6
+. 48 8B 74 24 70 C3
+
+movq 120(%rsp), %r12
+. 4336 0x12345678 6
+. 4C 8B 64 24 78 C3
+
+movq 120(%rsp), %r14
+. 4337 0x12345678 6
+. 4C 8B 74 24 78 C3
+
+movq 120(%rsp), %rax
+. 4338 0x12345678 6
+. 48 8B 44 24 78 C3
+
+movq 120(%rsp), %rcx
+. 4339 0x12345678 6
+. 48 8B 4C 24 78 C3
+
+movq 120(%rsp), %rsi
+. 4340 0x12345678 6
+. 48 8B 74 24 78 C3
+
+movq 128(%rsp), %r13
+. 4341 0x12345678 9
+. 4C 8B AC 24 80 00 00 00 C3
+
+movq 128(%rsp), %r15
+. 4342 0x12345678 9
+. 4C 8B BC 24 80 00 00 00 C3
+
+movq 128(%rsp), %rax
+. 4343 0x12345678 9
+. 48 8B 84 24 80 00 00 00 C3
+
+movq 128(%rsp), %rbx
+. 4344 0x12345678 9
+. 48 8B 9C 24 80 00 00 00 C3
+
+movq 136(%rsp), %r14
+. 4345 0x12345678 9
+. 4C 8B B4 24 88 00 00 00 C3
+
+movq 136(%rsp), %rax
+. 4346 0x12345678 9
+. 48 8B 84 24 88 00 00 00 C3
+
+movq 136(%rsp), %rbx
+. 4347 0x12345678 9
+. 48 8B 9C 24 88 00 00 00 C3
+
+movq 136(%rsp), %rdx
+. 4348 0x12345678 9
+. 48 8B 94 24 88 00 00 00 C3
+
+movq 144(%rsp), %r15
+. 4349 0x12345678 9
+. 4C 8B BC 24 90 00 00 00 C3
+
+movq 144(%rsp), %rbp
+. 4350 0x12345678 9
+. 48 8B AC 24 90 00 00 00 C3
+
+movq 152(%rsp), %r12
+. 4351 0x12345678 9
+. 4C 8B A4 24 98 00 00 00 C3
+
+movq 152(%rsp), %rax
+. 4352 0x12345678 9
+. 48 8B 84 24 98 00 00 00 C3
+
+movq 152(%rsp), %rbx
+. 4353 0x12345678 9
+. 48 8B 9C 24 98 00 00 00 C3
+
+movq 152(%rsp), %rcx
+. 4354 0x12345678 9
+. 48 8B 8C 24 98 00 00 00 C3
+
+movq 152(%rsp), %rsi
+. 4355 0x12345678 9
+. 48 8B B4 24 98 00 00 00 C3
+
+movq 160(%rsp), %r13
+. 4356 0x12345678 9
+. 4C 8B AC 24 A0 00 00 00 C3
+
+movq 160(%rsp), %rax
+. 4357 0x12345678 9
+. 48 8B 84 24 A0 00 00 00 C3
+
+movq 160(%rsp), %rbx
+. 4358 0x12345678 9
+. 48 8B 9C 24 A0 00 00 00 C3
+
+movq 160(%rsp), %rcx
+. 4359 0x12345678 9
+. 48 8B 8C 24 A0 00 00 00 C3
+
+movq 160(%rsp), %rdi
+. 4360 0x12345678 9
+. 48 8B BC 24 A0 00 00 00 C3
+
+movq 160(%rsp), %rdx
+. 4361 0x12345678 9
+. 48 8B 94 24 A0 00 00 00 C3
+
+movq 160(%rsp), %rsi
+. 4362 0x12345678 9
+. 48 8B B4 24 A0 00 00 00 C3
+
+movq 168(%rsp), %r14
+. 4363 0x12345678 9
+. 4C 8B B4 24 A8 00 00 00 C3
+
+movq 16(%r12), %r8
+. 4364 0x12345678 6
+. 4D 8B 44 24 10 C3
+
+movq 16(%r12), %rax
+. 4365 0x12345678 6
+. 49 8B 44 24 10 C3
+
+movq 16(%r12), %rdi
+. 4366 0x12345678 6
+. 49 8B 7C 24 10 C3
+
+movq 16(%r12), %rdx
+. 4367 0x12345678 6
+. 49 8B 54 24 10 C3
+
+movq 16(%r12), %rsi
+. 4368 0x12345678 6
+. 49 8B 74 24 10 C3
+
+movq 16(%r13), %rax
+. 4369 0x12345678 5
+. 49 8B 45 10 C3
+
+movq 16(%r13), %rbx
+. 4370 0x12345678 5
+. 49 8B 5D 10 C3
+
+movq 16(%r13), %rcx
+. 4371 0x12345678 5
+. 49 8B 4D 10 C3
+
+movq 16(%r13), %rdi
+. 4372 0x12345678 5
+. 49 8B 7D 10 C3
+
+movq 16(%r13), %rsi
+. 4373 0x12345678 5
+. 49 8B 75 10 C3
+
+movq 16(%r15), %rax
+. 4374 0x12345678 5
+. 49 8B 47 10 C3
+
+movq 16(%r15), %rdx
+. 4375 0x12345678 5
+. 49 8B 57 10 C3
+
+movq 16(%r8), %rax
+. 4376 0x12345678 5
+. 49 8B 40 10 C3
+
+movq 16(%rax), %rbx
+. 4377 0x12345678 5
+. 48 8B 58 10 C3
+
+movq 16(%rax), %rdi
+. 4378 0x12345678 5
+. 48 8B 78 10 C3
+
+movq 16(%rax), %rdx
+. 4379 0x12345678 5
+. 48 8B 50 10 C3
+
+movq 16(%rbp), %rax
+. 4380 0x12345678 5
+. 48 8B 45 10 C3
+
+movq 16(%rbp), %rbx
+. 4381 0x12345678 5
+. 48 8B 5D 10 C3
+
+movq 16(%rbp), %rdi
+. 4382 0x12345678 5
+. 48 8B 7D 10 C3
+
+movq 16(%rbp), %rdx
+. 4383 0x12345678 5
+. 48 8B 55 10 C3
+
+movq 16(%rbp), %rsi
+. 4384 0x12345678 5
+. 48 8B 75 10 C3
+
+movq 16(%rbx), %rax
+. 4385 0x12345678 5
+. 48 8B 43 10 C3
+
+movq 16(%rbx), %rbx
+. 4386 0x12345678 5
+. 48 8B 5B 10 C3
+
+movq 16(%rbx), %rcx
+. 4387 0x12345678 5
+. 48 8B 4B 10 C3
+
+movq 16(%rbx), %rdi
+. 4388 0x12345678 5
+. 48 8B 7B 10 C3
+
+movq 16(%rbx), %rdx
+. 4389 0x12345678 5
+. 48 8B 53 10 C3
+
+movq 16(%rbx), %rsi
+. 4390 0x12345678 5
+. 48 8B 73 10 C3
+
+movq 16(%rcx), %rax
+. 4391 0x12345678 5
+. 48 8B 41 10 C3
+
+movq 16(%rdi), %rax
+. 4392 0x12345678 5
+. 48 8B 47 10 C3
+
+movq 16(%rdi), %rcx
+. 4393 0x12345678 5
+. 48 8B 4F 10 C3
+
+movq 16(%rdi), %rdi
+. 4394 0x12345678 5
+. 48 8B 7F 10 C3
+
+movq 16(%rdi), %rdx
+. 4395 0x12345678 5
+. 48 8B 57 10 C3
+
+movq 16(%rdx), %r8
+. 4396 0x12345678 5
+. 4C 8B 42 10 C3
+
+movq 16(%rdx), %rcx
+. 4397 0x12345678 5
+. 48 8B 4A 10 C3
+
+movq 16(%rdx), %rdx
+. 4398 0x12345678 5
+. 48 8B 52 10 C3
+
+movq 16(%rsi), %rax
+. 4399 0x12345678 5
+. 48 8B 46 10 C3
+
+movq 16(%rsi), %rsi
+. 4400 0x12345678 5
+. 48 8B 76 10 C3
+
+movq 16(%rsp), %r12
+. 4401 0x12345678 6
+. 4C 8B 64 24 10 C3
+
+movq 16(%rsp), %r13
+. 4402 0x12345678 6
+. 4C 8B 6C 24 10 C3
+
+movq 16(%rsp), %rax
+. 4403 0x12345678 6
+. 48 8B 44 24 10 C3
+
+movq 16(%rsp), %rbp
+. 4404 0x12345678 6
+. 48 8B 6C 24 10 C3
+
+movq 16(%rsp), %rcx
+. 4405 0x12345678 6
+. 48 8B 4C 24 10 C3
+
+movq 16(%rsp), %rdx
+. 4406 0x12345678 6
+. 48 8B 54 24 10 C3
+
+movq 16(%rsp), %rsi
+. 4407 0x12345678 6
+. 48 8B 74 24 10 C3
+
+movq 176(%rsp), %r15
+. 4408 0x12345678 9
+. 4C 8B BC 24 B0 00 00 00 C3
+
+movq 176(%rsp), %rax
+. 4409 0x12345678 9
+. 48 8B 84 24 B0 00 00 00 C3
+
+movq 176(%rsp), %rcx
+. 4410 0x12345678 9
+. 48 8B 8C 24 B0 00 00 00 C3
+
+movq 176(%rsp), %rsi
+. 4411 0x12345678 9
+. 48 8B B4 24 B0 00 00 00 C3
+
+movq 192(%rsp), %rcx
+. 4412 0x12345678 9
+. 48 8B 8C 24 C0 00 00 00 C3
+
+movq 192(%rsp), %rdi
+. 4413 0x12345678 9
+. 48 8B BC 24 C0 00 00 00 C3
+
+movq 192(%rsp), %rdx
+. 4414 0x12345678 9
+. 48 8B 94 24 C0 00 00 00 C3
+
+movq 192(%rsp), %rsi
+. 4415 0x12345678 9
+. 48 8B B4 24 C0 00 00 00 C3
+
+movq $-1, %rax
+. 4416 0x12345678 8
+. 48 C7 C0 FF FF FF FF C3
+
+movq 200(%rsp), %rsi
+. 4417 0x12345678 9
+. 48 8B B4 24 C8 00 00 00 C3
+
+movq 224(%rsp), %r8
+. 4418 0x12345678 9
+. 4C 8B 84 24 E0 00 00 00 C3
+
+movq 232(%rsp), %r12
+. 4419 0x12345678 9
+. 4C 8B A4 24 E8 00 00 00 C3
+
+movq 240(%rsp), %rcx
+. 4420 0x12345678 9
+. 48 8B 8C 24 F0 00 00 00 C3
+
+movq 24(%r12), %rax
+. 4421 0x12345678 6
+. 49 8B 44 24 18 C3
+
+movq 24(%r12), %rdx
+. 4422 0x12345678 6
+. 49 8B 54 24 18 C3
+
+movq 24(%r12), %rsi
+. 4423 0x12345678 6
+. 49 8B 74 24 18 C3
+
+movq 24(%r13), %rdi
+. 4424 0x12345678 5
+. 49 8B 7D 18 C3
+
+movq 24(%r13), %rsi
+. 4425 0x12345678 5
+. 49 8B 75 18 C3
+
+movq 24(%r14), %rcx
+. 4426 0x12345678 5
+. 49 8B 4E 18 C3
+
+movq 24(%r14), %rsi
+. 4427 0x12345678 5
+. 49 8B 76 18 C3
+
+movq 24(%r15), %r12
+. 4428 0x12345678 5
+. 4D 8B 67 18 C3
+
+movq 24(%r15), %rsi
+. 4429 0x12345678 5
+. 49 8B 77 18 C3
+
+movq 24(%rax), %rdi
+. 4430 0x12345678 5
+. 48 8B 78 18 C3
+
+movq 24(%rax), %rsi
+. 4431 0x12345678 5
+. 48 8B 70 18 C3
+
+movq 24(%rbp), %rax
+. 4432 0x12345678 5
+. 48 8B 45 18 C3
+
+movq 24(%rbp), %rbx
+. 4433 0x12345678 5
+. 48 8B 5D 18 C3
+
+movq 24(%rbp), %rcx
+. 4434 0x12345678 5
+. 48 8B 4D 18 C3
+
+movq 24(%rbp), %rdi
+. 4435 0x12345678 5
+. 48 8B 7D 18 C3
+
+movq 24(%rbp), %rdx
+. 4436 0x12345678 5
+. 48 8B 55 18 C3
+
+movq 24(%rbp), %rsi
+. 4437 0x12345678 5
+. 48 8B 75 18 C3
+
+movq 24(%rbx), %rax
+. 4438 0x12345678 5
+. 48 8B 43 18 C3
+
+movq 24(%rbx), %rbx
+. 4439 0x12345678 5
+. 48 8B 5B 18 C3
+
+movq 24(%rbx), %rdi
+. 4440 0x12345678 5
+. 48 8B 7B 18 C3
+
+movq 24(%rbx), %rdx
+. 4441 0x12345678 5
+. 48 8B 53 18 C3
+
+movq 24(%rbx), %rsi
+. 4442 0x12345678 5
+. 48 8B 73 18 C3
+
+movq 24(%rcx), %rax
+. 4443 0x12345678 5
+. 48 8B 41 18 C3
+
+movq 24(%rcx), %rcx
+. 4444 0x12345678 5
+. 48 8B 49 18 C3
+
+movq 24(%rdi), %rax
+. 4445 0x12345678 5
+. 48 8B 47 18 C3
+
+movq 24(%rdi), %rdi
+. 4446 0x12345678 5
+. 48 8B 7F 18 C3
+
+movq 24(%rsi), %rax
+. 4447 0x12345678 5
+. 48 8B 46 18 C3
+
+movq 24(%rsi), %rdi
+. 4448 0x12345678 5
+. 48 8B 7E 18 C3
+
+movq 24(%rsi), %rsi
+. 4449 0x12345678 5
+. 48 8B 76 18 C3
+
+movq 24(%rsp), %r12
+. 4450 0x12345678 6
+. 4C 8B 64 24 18 C3
+
+movq 24(%rsp), %r13
+. 4451 0x12345678 6
+. 4C 8B 6C 24 18 C3
+
+movq 24(%rsp), %r14
+. 4452 0x12345678 6
+. 4C 8B 74 24 18 C3
+
+movq 24(%rsp), %rax
+. 4453 0x12345678 6
+. 48 8B 44 24 18 C3
+
+movq 24(%rsp), %rbx
+. 4454 0x12345678 6
+. 48 8B 5C 24 18 C3
+
+movq 24(%rsp), %rcx
+. 4455 0x12345678 6
+. 48 8B 4C 24 18 C3
+
+movq 24(%rsp), %rdi
+. 4456 0x12345678 6
+. 48 8B 7C 24 18 C3
+
+movq 24(%rsp), %rdx
+. 4457 0x12345678 6
+. 48 8B 54 24 18 C3
+
+movq 24(%rsp), %rsi
+. 4458 0x12345678 6
+. 48 8B 74 24 18 C3
+
+movq 256(%rsp), %r12
+. 4459 0x12345678 9
+. 4C 8B A4 24 00 01 00 00 C3
+
+movq 256(%rsp), %rax
+. 4460 0x12345678 9
+. 48 8B 84 24 00 01 00 00 C3
+
+movq 264(%rsp), %rcx
+. 4461 0x12345678 9
+. 48 8B 8C 24 08 01 00 00 C3
+
+movq 288(%rsp), %rcx
+. 4462 0x12345678 9
+. 48 8B 8C 24 20 01 00 00 C3
+
+movq 304(%rsp), %rax
+. 4463 0x12345678 9
+. 48 8B 84 24 30 01 00 00 C3
+
+movq 304(%rsp), %rbx
+. 4464 0x12345678 9
+. 48 8B 9C 24 30 01 00 00 C3
+
+movq 304(%rsp), %rcx
+. 4465 0x12345678 9
+. 48 8B 8C 24 30 01 00 00 C3
+
+movq 312(%rsp), %rax
+. 4466 0x12345678 9
+. 48 8B 84 24 38 01 00 00 C3
+
+movq 312(%rsp), %rdx
+. 4467 0x12345678 9
+. 48 8B 94 24 38 01 00 00 C3
+
+movq 32(%r12), %r12
+. 4468 0x12345678 6
+. 4D 8B 64 24 20 C3
+
+movq 32(%r12), %rax
+. 4469 0x12345678 6
+. 49 8B 44 24 20 C3
+
+movq 32(%r12), %rcx
+. 4470 0x12345678 6
+. 49 8B 4C 24 20 C3
+
+movq 32(%r12), %rdi
+. 4471 0x12345678 6
+. 49 8B 7C 24 20 C3
+
+movq 32(%r12), %rsi
+. 4472 0x12345678 6
+. 49 8B 74 24 20 C3
+
+movq 32(%r13), %rdi
+. 4473 0x12345678 5
+. 49 8B 7D 20 C3
+
+movq 32(%r13), %rdx
+. 4474 0x12345678 5
+. 49 8B 55 20 C3
+
+movq 32(%r13), %rsi
+. 4475 0x12345678 5
+. 49 8B 75 20 C3
+
+movq 32(%r15), %rsi
+. 4476 0x12345678 5
+. 49 8B 77 20 C3
+
+movq 32(%rbp), %rdi
+. 4477 0x12345678 5
+. 48 8B 7D 20 C3
+
+movq 32(%rbp), %rdx
+. 4478 0x12345678 5
+. 48 8B 55 20 C3
+
+movq 32(%rbp), %rsi
+. 4479 0x12345678 5
+. 48 8B 75 20 C3
+
+movq 32(%rbx), %rax
+. 4480 0x12345678 5
+. 48 8B 43 20 C3
+
+movq 32(%rbx), %rdi
+. 4481 0x12345678 5
+. 48 8B 7B 20 C3
+
+movq 32(%rbx), %rsi
+. 4482 0x12345678 5
+. 48 8B 73 20 C3
+
+movq 32(%rdi), %rax
+. 4483 0x12345678 5
+. 48 8B 47 20 C3
+
+movq 32(%rdi), %rdi
+. 4484 0x12345678 5
+. 48 8B 7F 20 C3
+
+movq 32(%rsp), %r13
+. 4485 0x12345678 6
+. 4C 8B 6C 24 20 C3
+
+movq 32(%rsp), %r14
+. 4486 0x12345678 6
+. 4C 8B 74 24 20 C3
+
+movq 32(%rsp), %r15
+. 4487 0x12345678 6
+. 4C 8B 7C 24 20 C3
+
+movq 32(%rsp), %rax
+. 4488 0x12345678 6
+. 48 8B 44 24 20 C3
+
+movq 32(%rsp), %rbp
+. 4489 0x12345678 6
+. 48 8B 6C 24 20 C3
+
+movq 32(%rsp), %rcx
+. 4490 0x12345678 6
+. 48 8B 4C 24 20 C3
+
+movq 32(%rsp), %rdi
+. 4491 0x12345678 6
+. 48 8B 7C 24 20 C3
+
+movq 32(%rsp), %rdx
+. 4492 0x12345678 6
+. 48 8B 54 24 20 C3
+
+movq 32(%rsp), %rsi
+. 4493 0x12345678 6
+. 48 8B 74 24 20 C3
+
+movq 40(%rsp), %r12
+. 4494 0x12345678 6
+. 4C 8B 64 24 28 C3
+
+movq 40(%rsp), %r14
+. 4495 0x12345678 6
+. 4C 8B 74 24 28 C3
+
+movq 40(%rsp), %rax
+. 4496 0x12345678 6
+. 48 8B 44 24 28 C3
+
+movq 40(%rsp), %rbx
+. 4497 0x12345678 6
+. 48 8B 5C 24 28 C3
+
+movq 40(%rsp), %rcx
+. 4498 0x12345678 6
+. 48 8B 4C 24 28 C3
+
+movq 40(%rsp), %rdi
+. 4499 0x12345678 6
+. 48 8B 7C 24 28 C3
+
+movq 40(%rsp), %rsi
+. 4500 0x12345678 6
+. 48 8B 74 24 28 C3
+
+movq 48(%rsp), %r13
+. 4501 0x12345678 6
+. 4C 8B 6C 24 30 C3
+
+movq 48(%rsp), %r15
+. 4502 0x12345678 6
+. 4C 8B 7C 24 30 C3
+
+movq 48(%rsp), %rax
+. 4503 0x12345678 6
+. 48 8B 44 24 30 C3
+
+movq 48(%rsp), %rbp
+. 4504 0x12345678 6
+. 48 8B 6C 24 30 C3
+
+movq 48(%rsp), %rcx
+. 4505 0x12345678 6
+. 48 8B 4C 24 30 C3
+
+movq 48(%rsp), %rdx
+. 4506 0x12345678 6
+. 48 8B 54 24 30 C3
+
+movq 48(%rsp), %rsi
+. 4507 0x12345678 6
+. 48 8B 74 24 30 C3
+
+movq 4(%rax), %rdx
+. 4508 0x12345678 5
+. 48 8B 50 04 C3
+
+movq 4(%rdi), %rdi
+. 4509 0x12345678 5
+. 48 8B 7F 04 C3
+
+movq 560(%rsp), %rax
+. 4510 0x12345678 9
+. 48 8B 84 24 30 02 00 00 C3
+
+movq 560(%rsp), %rdi
+. 4511 0x12345678 9
+. 48 8B BC 24 30 02 00 00 C3
+
+movq 56(%rsp), %r10
+. 4512 0x12345678 6
+. 4C 8B 54 24 38 C3
+
+movq 56(%rsp), %r12
+. 4513 0x12345678 6
+. 4C 8B 64 24 38 C3
+
+movq 56(%rsp), %r14
+. 4514 0x12345678 6
+. 4C 8B 74 24 38 C3
+
+movq 56(%rsp), %rcx
+. 4515 0x12345678 6
+. 48 8B 4C 24 38 C3
+
+movq 56(%rsp), %rdi
+. 4516 0x12345678 6
+. 48 8B 7C 24 38 C3
+
+movq 56(%rsp), %rdx
+. 4517 0x12345678 6
+. 48 8B 54 24 38 C3
+
+movq 64(%rsp), %r13
+. 4518 0x12345678 6
+. 4C 8B 6C 24 40 C3
+
+movq 64(%rsp), %r15
+. 4519 0x12345678 6
+. 4C 8B 7C 24 40 C3
+
+movq 64(%rsp), %rdi
+. 4520 0x12345678 6
+. 48 8B 7C 24 40 C3
+
+movq 72(%rsp), %r14
+. 4521 0x12345678 6
+. 4C 8B 74 24 48 C3
+
+movq 72(%rsp), %rbx
+. 4522 0x12345678 6
+. 48 8B 5C 24 48 C3
+
+movq 72(%rsp), %rsi
+. 4523 0x12345678 6
+. 48 8B 74 24 48 C3
+
+movq 80(%rsp), %r15
+. 4524 0x12345678 6
+. 4C 8B 7C 24 50 C3
+
+movq 80(%rsp), %rax
+. 4525 0x12345678 6
+. 48 8B 44 24 50 C3
+
+movq 80(%rsp), %rbp
+. 4526 0x12345678 6
+. 48 8B 6C 24 50 C3
+
+movq 80(%rsp), %rbx
+. 4527 0x12345678 6
+. 48 8B 5C 24 50 C3
+
+movq 80(%rsp), %rdi
+. 4528 0x12345678 6
+. 48 8B 7C 24 50 C3
+
+movq 80(%rsp), %rdx
+. 4529 0x12345678 6
+. 48 8B 54 24 50 C3
+
+movq 88(%rsp), %r12
+. 4530 0x12345678 6
+. 4C 8B 64 24 58 C3
+
+movq 88(%rsp), %rax
+. 4531 0x12345678 6
+. 48 8B 44 24 58 C3
+
+movq 88(%rsp), %rbp
+. 4532 0x12345678 6
+. 48 8B 6C 24 58 C3
+
+movq 88(%rsp), %rbx
+. 4533 0x12345678 6
+. 48 8B 5C 24 58 C3
+
+movq 88(%rsp), %rcx
+. 4534 0x12345678 6
+. 48 8B 4C 24 58 C3
+
+movq 88(%rsp), %rdi
+. 4535 0x12345678 6
+. 48 8B 7C 24 58 C3
+
+movq 88(%rsp), %rdx
+. 4536 0x12345678 6
+. 48 8B 54 24 58 C3
+
+movq 88(%rsp), %rsi
+. 4537 0x12345678 6
+. 48 8B 74 24 58 C3
+
+movq 8(%r12), %r12
+. 4538 0x12345678 6
+. 4D 8B 64 24 08 C3
+
+movq 8(%r12), %rax
+. 4539 0x12345678 6
+. 49 8B 44 24 08 C3
+
+movq 8(%r12), %rbx
+. 4540 0x12345678 6
+. 49 8B 5C 24 08 C3
+
+movq 8(%r12), %rcx
+. 4541 0x12345678 6
+. 49 8B 4C 24 08 C3
+
+movq 8(%r12), %rdi
+. 4542 0x12345678 6
+. 49 8B 7C 24 08 C3
+
+movq 8(%r12), %rsi
+. 4543 0x12345678 6
+. 49 8B 74 24 08 C3
+
+movq 8(%r13), %r13
+. 4544 0x12345678 5
+. 4D 8B 6D 08 C3
+
+movq 8(%r13), %rax
+. 4545 0x12345678 5
+. 49 8B 45 08 C3
+
+movq 8(%r13), %rbx
+. 4546 0x12345678 5
+. 49 8B 5D 08 C3
+
+movq 8(%r13), %rcx
+. 4547 0x12345678 5
+. 49 8B 4D 08 C3
+
+movq 8(%r13), %rdi
+. 4548 0x12345678 5
+. 49 8B 7D 08 C3
+
+movq 8(%r13), %rdx
+. 4549 0x12345678 5
+. 49 8B 55 08 C3
+
+movq 8(%r13), %rsi
+. 4550 0x12345678 5
+. 49 8B 75 08 C3
+
+movq 8(%r14), %rax
+. 4551 0x12345678 5
+. 49 8B 46 08 C3
+
+movq 8(%r14), %rcx
+. 4552 0x12345678 5
+. 49 8B 4E 08 C3
+
+movq 8(%r14), %rdi
+. 4553 0x12345678 5
+. 49 8B 7E 08 C3
+
+movq 8(%r14), %rdx
+. 4554 0x12345678 5
+. 49 8B 56 08 C3
+
+movq 8(%r15), %rax
+. 4555 0x12345678 5
+. 49 8B 47 08 C3
+
+movq 8(%r15), %rsi
+. 4556 0x12345678 5
+. 49 8B 77 08 C3
+
+movq 8(%r8), %rax
+. 4557 0x12345678 5
+. 49 8B 40 08 C3
+
+movq 8(%rax), %r9
+. 4558 0x12345678 5
+. 4C 8B 48 08 C3
+
+movq 8(%rax), %rax
+. 4559 0x12345678 5
+. 48 8B 40 08 C3
+
+movq 8(%rax), %rcx
+. 4560 0x12345678 5
+. 48 8B 48 08 C3
+
+movq 8(%rax), %rdi
+. 4561 0x12345678 5
+. 48 8B 78 08 C3
+
+movq 8(%rax), %rdx
+. 4562 0x12345678 5
+. 48 8B 50 08 C3
+
+movq 8(%rax), %rsi
+. 4563 0x12345678 5
+. 48 8B 70 08 C3
+
+movq 8(%rbp), %r13
+. 4564 0x12345678 5
+. 4C 8B 6D 08 C3
+
+movq 8(%rbp), %rax
+. 4565 0x12345678 5
+. 48 8B 45 08 C3
+
+movq 8(%rbp), %rbx
+. 4566 0x12345678 5
+. 48 8B 5D 08 C3
+
+movq 8(%rbp), %rdi
+. 4567 0x12345678 5
+. 48 8B 7D 08 C3
+
+movq 8(%rbp), %rdx
+. 4568 0x12345678 5
+. 48 8B 55 08 C3
+
+movq 8(%rbp), %rsi
+. 4569 0x12345678 5
+. 48 8B 75 08 C3
+
+movq 8(%rbx), %r12
+. 4570 0x12345678 5
+. 4C 8B 63 08 C3
+
+movq 8(%rbx), %r8
+. 4571 0x12345678 5
+. 4C 8B 43 08 C3
+
+movq 8(%rbx), %r9
+. 4572 0x12345678 5
+. 4C 8B 4B 08 C3
+
+movq 8(%rbx), %rax
+. 4573 0x12345678 5
+. 48 8B 43 08 C3
+
+movq 8(%rbx), %rbx
+. 4574 0x12345678 5
+. 48 8B 5B 08 C3
+
+movq 8(%rbx), %rdi
+. 4575 0x12345678 5
+. 48 8B 7B 08 C3
+
+movq 8(%rbx), %rdx
+. 4576 0x12345678 5
+. 48 8B 53 08 C3
+
+movq 8(%rbx), %rsi
+. 4577 0x12345678 5
+. 48 8B 73 08 C3
+
+movq 8(%rcx), %r8
+. 4578 0x12345678 5
+. 4C 8B 41 08 C3
+
+movq 8(%rcx), %rax
+. 4579 0x12345678 5
+. 48 8B 41 08 C3
+
+movq 8(%rcx), %rdx
+. 4580 0x12345678 5
+. 48 8B 51 08 C3
+
+movq 8(%rdi), %rax
+. 4581 0x12345678 5
+. 48 8B 47 08 C3
+
+movq 8(%rdi), %rcx
+. 4582 0x12345678 5
+. 48 8B 4F 08 C3
+
+movq 8(%rdi), %rdi
+. 4583 0x12345678 5
+. 48 8B 7F 08 C3
+
+movq 8(%rdi), %rdx
+. 4584 0x12345678 5
+. 48 8B 57 08 C3
+
+movq 8(%rdi), %rsi
+. 4585 0x12345678 5
+. 48 8B 77 08 C3
+
+movq 8(%rdx), %r8
+. 4586 0x12345678 5
+. 4C 8B 42 08 C3
+
+movq 8(%rdx), %rax
+. 4587 0x12345678 5
+. 48 8B 42 08 C3
+
+movq 8(%rdx), %rbx
+. 4588 0x12345678 5
+. 48 8B 5A 08 C3
+
+movq 8(%rdx), %rcx
+. 4589 0x12345678 5
+. 48 8B 4A 08 C3
+
+movq 8(%rdx), %rdi
+. 4590 0x12345678 5
+. 48 8B 7A 08 C3
+
+movq 8(%rdx), %rdx
+. 4591 0x12345678 5
+. 48 8B 52 08 C3
+
+movq 8(%rsi), %rax
+. 4592 0x12345678 5
+. 48 8B 46 08 C3
+
+movq 8(%rsi), %rdi
+. 4593 0x12345678 5
+. 48 8B 7E 08 C3
+
+movq 8(%rsi), %rdx
+. 4594 0x12345678 5
+. 48 8B 56 08 C3
+
+movq 8(%rsi), %rsi
+. 4595 0x12345678 5
+. 48 8B 76 08 C3
+
+movq 8(%rsp), %r12
+. 4596 0x12345678 6
+. 4C 8B 64 24 08 C3
+
+movq 8(%rsp), %r8
+. 4597 0x12345678 6
+. 4C 8B 44 24 08 C3
+
+movq 8(%rsp), %rax
+. 4598 0x12345678 6
+. 48 8B 44 24 08 C3
+
+movq 8(%rsp), %rbp
+. 4599 0x12345678 6
+. 48 8B 6C 24 08 C3
+
+movq 8(%rsp), %rbx
+. 4600 0x12345678 6
+. 48 8B 5C 24 08 C3
+
+movq 8(%rsp), %rcx
+. 4601 0x12345678 6
+. 48 8B 4C 24 08 C3
+
+movq 8(%rsp), %rsi
+. 4602 0x12345678 6
+. 48 8B 74 24 08 C3
+
+movq 96(%rsp), %r12
+. 4603 0x12345678 6
+. 4C 8B 64 24 60 C3
+
+movq 96(%rsp), %r13
+. 4604 0x12345678 6
+. 4C 8B 6C 24 60 C3
+
+movq 96(%rsp), %rbp
+. 4605 0x12345678 6
+. 48 8B 6C 24 60 C3
+
+movq 96(%rsp), %rcx
+. 4606 0x12345678 6
+. 48 8B 4C 24 60 C3
+
+movq 96(%rsp), %rdi
+. 4607 0x12345678 6
+. 48 8B 7C 24 60 C3
+
+movq 96(%rsp), %rsi
+. 4608 0x12345678 6
+. 48 8B 74 24 60 C3
+
+movq $999, 72(%rsp)
+. 4609 0x12345678 10
+. 48 C7 44 24 48 E7 03 00 00 C3
+
+movq $998, (%rsp)
+. 4610 0x12345678 9
+. 48 C7 04 24 E6 03 00 00 C3
+
+movq 333(,%rax,8), %rax
+. 4611 0x12345678 9
+. 48 8B 04 C5 4D 01 00 00 C3
+
+movq 5(,%rax,8), %rax
+. 4612 0x12345678 9
+. 48 8B 04 C5 05 00 00 00 C3
+
+movq 3(,%rax,8), %rax
+. 4613 0x12345678 9
+. 48 8B 04 C5 03 00 00 00 C3
+
+movq 6(,%rax,8), %rax
+. 4614 0x12345678 9
+. 48 8B 04 C5 06 00 00 00 C3
+
+movq 444(%rip), %rax
+. 4615 0x12345678 8
+. 48 8B 05 BC 01 00 00 C3
+
+movq 41(%rip), %rax
+. 4616 0x12345678 8
+. 48 8B 05 29 00 00 00 C3
+
+movq 42(%rip), %rbx
+. 4617 0x12345678 8
+. 48 8B 1D 2A 00 00 00 C3
+
+movq 43(%rip), %rdi
+. 4618 0x12345678 8
+. 48 8B 3D 2B 00 00 00 C3
+
+movq 2(,%rax,8), %rax
+. 4619 0x12345678 9
+. 48 8B 04 C5 02 00 00 00 C3
+
+movq 7(,%rax,8), %rax
+. 4620 0x12345678 9
+. 48 8B 04 C5 07 00 00 00 C3
+
+movq 0(,%rax,8), %rsi
+. 4621 0x12345678 9
+. 48 8B 34 C5 00 00 00 00 C3
+
+movq 1(,%rax,8), %rax
+. 4622 0x12345678 9
+. 48 8B 04 C5 01 00 00 00 C3
+
+movq %r10, 56(%rsp)
+. 4623 0x12345678 6
+. 4C 89 54 24 38 C3
+
+movq %r10, %rax
+. 4624 0x12345678 4
+. 4C 89 D0 C3
+
+movq %r11, %rax
+. 4625 0x12345678 4
+. 4C 89 D8 C3
+
+movq %r12, 16(%rax)
+. 4626 0x12345678 5
+. 4C 89 60 10 C3
+
+movq %r12, -16(%rsp)
+. 4627 0x12345678 6
+. 4C 89 64 24 F0 C3
+
+movq %r12, -24(%rsp)
+. 4628 0x12345678 6
+. 4C 89 64 24 E8 C3
+
+movq %r12, -32(%rsp)
+. 4629 0x12345678 6
+. 4C 89 64 24 E0 C3
+
+movq %r12, 8(%rax)
+. 4630 0x12345678 5
+. 4C 89 60 08 C3
+
+movq %r12, -8(%rsp)
+. 4631 0x12345678 6
+. 4C 89 64 24 F8 C3
+
+movq (%r12), %r13
+. 4632 0x12345678 5
+. 4D 8B 2C 24 C3
+
+movq (%r12), %r14
+. 4633 0x12345678 5
+. 4D 8B 34 24 C3
+
+movq %r12, %r8
+. 4634 0x12345678 4
+. 4D 89 E0 C3
+
+movq %r12, %r9
+. 4635 0x12345678 4
+. 4D 89 E1 C3
+
+movq (%r12), %rax
+. 4636 0x12345678 5
+. 49 8B 04 24 C3
+
+movq %r12, %rax
+. 4637 0x12345678 4
+. 4C 89 E0 C3
+
+movq %r12, (%rax,%rcx,8)
+. 4638 0x12345678 5
+. 4C 89 24 C8 C3
+
+movq (%r12,%rbx,8), %rax
+. 4639 0x12345678 5
+. 49 8B 04 DC C3
+
+movq (%r12,%rbx,8), %rsi
+. 4640 0x12345678 5
+. 49 8B 34 DC C3
+
+movq %r12, %rcx
+. 4641 0x12345678 4
+. 4C 89 E1 C3
+
+movq (%r12), %rdi
+. 4642 0x12345678 5
+. 49 8B 3C 24 C3
+
+movq %r12, %rdi
+. 4643 0x12345678 4
+. 4C 89 E7 C3
+
+movq %r12, %rdx
+. 4644 0x12345678 4
+. 4C 89 E2 C3
+
+movq %r12, %rsi
+. 4645 0x12345678 4
+. 4C 89 E6 C3
+
+movq %r13, 16(%rax)
+. 4646 0x12345678 5
+. 4C 89 68 10 C3
+
+movq %r13, -16(%rsp)
+. 4647 0x12345678 6
+. 4C 89 6C 24 F0 C3
+
+movq %r13, 24(%rax)
+. 4648 0x12345678 5
+. 4C 89 68 18 C3
+
+movq %r13, -24(%rsp)
+. 4649 0x12345678 6
+. 4C 89 6C 24 E8 C3
+
+movq %r13, 8(%rbx)
+. 4650 0x12345678 5
+. 4C 89 6B 08 C3
+
+movq %r13, -8(%rsp)
+. 4651 0x12345678 6
+. 4C 89 6C 24 F8 C3
+
+movq %r13, %r14
+. 4652 0x12345678 4
+. 4D 89 EE C3
+
+movq %r13, %r8
+. 4653 0x12345678 4
+. 4D 89 E8 C3
+
+movq %r13, %r9
+. 4654 0x12345678 4
+. 4D 89 E9 C3
+
+movq (%r13), %rax
+. 4655 0x12345678 5
+. 49 8B 45 00 C3
+
+movq %r13, %rax
+. 4656 0x12345678 4
+. 4C 89 E8 C3
+
+movq (%r13), %rbx
+. 4657 0x12345678 5
+. 49 8B 5D 00 C3
+
+movq (%r13,%rbx,8), %rsi
+. 4658 0x12345678 6
+. 49 8B 74 DD 00 C3
+
+movq %r13, %rcx
+. 4659 0x12345678 4
+. 4C 89 E9 C3
+
+movq (%r13), %rdi
+. 4660 0x12345678 5
+. 49 8B 7D 00 C3
+
+movq %r13, %rdi
+. 4661 0x12345678 4
+. 4C 89 EF C3
+
+movq (%r13), %rdx
+. 4662 0x12345678 5
+. 49 8B 55 00 C3
+
+movq %r13, %rdx
+. 4663 0x12345678 4
+. 4C 89 EA C3
+
+movq %r13, %rsi
+. 4664 0x12345678 4
+. 4C 89 EE C3
+
+movq %r13, (%rsp)
+. 4665 0x12345678 5
+. 4C 89 2C 24 C3
+
+movq %r14, -16(%rsp)
+. 4666 0x12345678 6
+. 4C 89 74 24 F0 C3
+
+movq %r14, 24(%rax)
+. 4667 0x12345678 5
+. 4C 89 70 18 C3
+
+movq %r14, 32(%rax)
+. 4668 0x12345678 5
+. 4C 89 70 20 C3
+
+movq %r14, 8(%r12)
+. 4669 0x12345678 6
+. 4D 89 74 24 08 C3
+
+movq %r14, -8(%rsp)
+. 4670 0x12345678 6
+. 4C 89 74 24 F8 C3
+
+movq %r14, %r8
+. 4671 0x12345678 4
+. 4D 89 F0 C3
+
+movq %r14, %r9
+. 4672 0x12345678 4
+. 4D 89 F1 C3
+
+movq (%r14), %rax
+. 4673 0x12345678 4
+. 49 8B 06 C3
+
+movq %r14, %rax
+. 4674 0x12345678 4
+. 4C 89 F0 C3
+
+movq %r14, (%rbx)
+. 4675 0x12345678 4
+. 4C 89 33 C3
+
+movq %r14, %rcx
+. 4676 0x12345678 4
+. 4C 89 F1 C3
+
+movq (%r14), %rdi
+. 4677 0x12345678 4
+. 49 8B 3E C3
+
+movq %r14, %rdi
+. 4678 0x12345678 4
+. 4C 89 F7 C3
+
+movq (%r14), %rdx
+. 4679 0x12345678 4
+. 49 8B 16 C3
+
+movq %r14, %rdx
+. 4680 0x12345678 4
+. 4C 89 F2 C3
+
+movq %r14, %rsi
+. 4681 0x12345678 4
+. 4C 89 F6 C3
+
+movq %r15, 16(%rbx)
+. 4682 0x12345678 5
+. 4C 89 7B 10 C3
+
+movq %r15, 32(%rax)
+. 4683 0x12345678 5
+. 4C 89 78 20 C3
+
+movq %r15, -8(%rsp)
+. 4684 0x12345678 6
+. 4C 89 7C 24 F8 C3
+
+movq %r15, 8(%rsp)
+. 4685 0x12345678 6
+. 4C 89 7C 24 08 C3
+
+movq %r15, %r8
+. 4686 0x12345678 4
+. 4D 89 F8 C3
+
+movq (%r15), %rax
+. 4687 0x12345678 4
+. 49 8B 07 C3
+
+movq %r15, (%rax,%rcx,8)
+. 4688 0x12345678 5
+. 4C 89 3C C8 C3
+
+movq %r15, %rbp
+. 4689 0x12345678 4
+. 4C 89 FD C3
+
+movq %r15, %rcx
+. 4690 0x12345678 4
+. 4C 89 F9 C3
+
+movq (%r15), %rdi
+. 4691 0x12345678 4
+. 49 8B 3F C3
+
+movq %r15, %rdi
+. 4692 0x12345678 4
+. 4C 89 FF C3
+
+movq %r15, %rdx
+. 4693 0x12345678 4
+. 4C 89 FA C3
+
+movq %r15, %rsi
+. 4694 0x12345678 4
+. 4C 89 FE C3
+
+movq %r8, 104(%rsp)
+. 4695 0x12345678 6
+. 4C 89 44 24 68 C3
+
+movq %r8, 136(%rsp)
+. 4696 0x12345678 9
+. 4C 89 84 24 88 00 00 00 C3
+
+movq %r8, 144(%rsp)
+. 4697 0x12345678 9
+. 4C 89 84 24 90 00 00 00 C3
+
+movq %r8, 24(%rsp)
+. 4698 0x12345678 6
+. 4C 89 44 24 18 C3
+
+movq %r8, 296(%rsp)
+. 4699 0x12345678 9
+. 4C 89 84 24 28 01 00 00 C3
+
+movq %r8, 32(%rsp)
+. 4700 0x12345678 6
+. 4C 89 44 24 20 C3
+
+movq %r8, 40(%rsp)
+. 4701 0x12345678 6
+. 4C 89 44 24 28 C3
+
+movq %r8, 48(%rsp)
+. 4702 0x12345678 6
+. 4C 89 44 24 30 C3
+
+movq %r8, 64(%rsp)
+. 4703 0x12345678 6
+. 4C 89 44 24 40 C3
+
+movq %r8, 8(%rbx)
+. 4704 0x12345678 5
+. 4C 89 43 08 C3
+
+movq %r8, 8(%rsi)
+. 4705 0x12345678 5
+. 4C 89 46 08 C3
+
+movq %r8, 8(%rsp)
+. 4706 0x12345678 6
+. 4C 89 44 24 08 C3
+
+movq %r8, %r15
+. 4707 0x12345678 4
+. 4D 89 C7 C3
+
+movq (%r8), %rax
+. 4708 0x12345678 4
+. 49 8B 00 C3
+
+movq %r8, %rax
+. 4709 0x12345678 4
+. 4C 89 C0 C3
+
+movq %r8, %rbp
+. 4710 0x12345678 4
+. 4C 89 C5 C3
+
+movq %r8, (%rbx)
+. 4711 0x12345678 4
+. 4C 89 03 C3
+
+movq %r8, %rbx
+. 4712 0x12345678 4
+. 4C 89 C3 C3
+
+movq %r8, %rsi
+. 4713 0x12345678 4
+. 4C 89 C6 C3
+
+movq %r8, (%rsp)
+. 4714 0x12345678 5
+. 4C 89 04 24 C3
+
+movq %r9, 128(%rsp)
+. 4715 0x12345678 9
+. 4C 89 8C 24 80 00 00 00 C3
+
+movq %r9, 16(%rbx)
+. 4716 0x12345678 5
+. 4C 89 4B 10 C3
+
+movq %r9, 24(%rsp)
+. 4717 0x12345678 6
+. 4C 89 4C 24 18 C3
+
+movq %r9, 32(%rsp)
+. 4718 0x12345678 6
+. 4C 89 4C 24 20 C3
+
+movq %r9, 72(%rsp)
+. 4719 0x12345678 6
+. 4C 89 4C 24 48 C3
+
+movq %r9, %r14
+. 4720 0x12345678 4
+. 4D 89 CE C3
+
+movq %r9, %rax
+. 4721 0x12345678 4
+. 4C 89 C8 C3
+
+movq (%r9,%rax,8), %rdi
+. 4722 0x12345678 5
+. 49 8B 3C C1 C3
+
+movq %r9, %rdx
+. 4723 0x12345678 4
+. 4C 89 CA C3
+
+movq %r9, (%rsp)
+. 4724 0x12345678 5
+. 4C 89 0C 24 C3
+
+movq %rax, 112(%rsp)
+. 4725 0x12345678 6
+. 48 89 44 24 70 C3
+
+movq %rax, 16(%r12)
+. 4726 0x12345678 6
+. 49 89 44 24 10 C3
+
+movq %rax, 16(%rbp)
+. 4727 0x12345678 5
+. 48 89 45 10 C3
+
+movq %rax, 16(%rbx)
+. 4728 0x12345678 5
+. 48 89 43 10 C3
+
+movq %rax, 16(%rsi)
+. 4729 0x12345678 5
+. 48 89 46 10 C3
+
+movq %rax, 16(%rsp)
+. 4730 0x12345678 6
+. 48 89 44 24 10 C3
+
+movq %rax, 176(%rsp)
+. 4731 0x12345678 9
+. 48 89 84 24 B0 00 00 00 C3
+
+movq %rax, 24(%r12)
+. 4732 0x12345678 6
+. 49 89 44 24 18 C3
+
+movq %rax, 24(%r13)
+. 4733 0x12345678 5
+. 49 89 45 18 C3
+
+movq %rax, 24(%rbp)
+. 4734 0x12345678 5
+. 48 89 45 18 C3
+
+movq %rax, 24(%rbx)
+. 4735 0x12345678 5
+. 48 89 43 18 C3
+
+movq %rax, 24(%rdx)
+. 4736 0x12345678 5
+. 48 89 42 18 C3
+
+movq %rax, 24(%rsi)
+. 4737 0x12345678 5
+. 48 89 46 18 C3
+
+movq %rax, 24(%rsp)
+. 4738 0x12345678 6
+. 48 89 44 24 18 C3
+
+movq %rax, 256(%rsp)
+. 4739 0x12345678 9
+. 48 89 84 24 00 01 00 00 C3
+
+movq %rax, 32(%r12)
+. 4740 0x12345678 6
+. 49 89 44 24 20 C3
+
+movq %rax, 32(%r15)
+. 4741 0x12345678 5
+. 49 89 47 20 C3
+
+movq %rax, 32(%rbp)
+. 4742 0x12345678 5
+. 48 89 45 20 C3
+
+movq %rax, 32(%rbx)
+. 4743 0x12345678 5
+. 48 89 43 20 C3
+
+movq %rax, 32(%rsp)
+. 4744 0x12345678 6
+. 48 89 44 24 20 C3
+
+movq %rax, 40(%rsp)
+. 4745 0x12345678 6
+. 48 89 44 24 28 C3
+
+movq %rax, 48(%rsp)
+. 4746 0x12345678 6
+. 48 89 44 24 30 C3
+
+movq %rax, 56(%rsp)
+. 4747 0x12345678 6
+. 48 89 44 24 38 C3
+
+movq %rax, 80(%rsp)
+. 4748 0x12345678 6
+. 48 89 44 24 50 C3
+
+movq %rax, 88(%rsp)
+. 4749 0x12345678 6
+. 48 89 44 24 58 C3
+
+movq %rax, 8(%r12)
+. 4750 0x12345678 6
+. 49 89 44 24 08 C3
+
+movq %rax, 8(%r14)
+. 4751 0x12345678 5
+. 49 89 46 08 C3
+
+movq %rax, 8(%r15)
+. 4752 0x12345678 5
+. 49 89 47 08 C3
+
+movq %rax, 8(%rbp)
+. 4753 0x12345678 5
+. 48 89 45 08 C3
+
+movq %rax, 8(%rbx)
+. 4754 0x12345678 5
+. 48 89 43 08 C3
+
+movq %rax, 8(%rcx)
+. 4755 0x12345678 5
+. 48 89 41 08 C3
+
+movq %rax, -8(%rcx,%rdx,8)
+. 4756 0x12345678 6
+. 48 89 44 D1 F8 C3
+
+movq %rax, 8(%rsi)
+. 4757 0x12345678 5
+. 48 89 46 08 C3
+
+movq %rax, 8(%rsp)
+. 4758 0x12345678 6
+. 48 89 44 24 08 C3
+
+movq %rax, 96(%rsp)
+. 4759 0x12345678 6
+. 48 89 44 24 60 C3
+
+movq %rax, 388989(%rip)
+. 4760 0x12345678 8
+. 48 89 05 7D EF 05 00 C3
+
+movq %rax, (%r12)
+. 4761 0x12345678 5
+. 49 89 04 24 C3
+
+movq %rax, %r12
+. 4762 0x12345678 4
+. 49 89 C4 C3
+
+movq (%rax,%r12,8), %rbx
+. 4763 0x12345678 5
+. 4A 8B 1C E0 C3
+
+movq %rax, (%r12,%rbx,8)
+. 4764 0x12345678 5
+. 49 89 04 DC C3
+
+movq %rax, (%r13)
+. 4765 0x12345678 5
+. 49 89 45 00 C3
+
+movq %rax, %r13
+. 4766 0x12345678 4
+. 49 89 C5 C3
+
+movq (%rax,%r13,8), %r12
+. 4767 0x12345678 5
+. 4E 8B 24 E8 C3
+
+movq %rax, (%r13,%rbx,8)
+. 4768 0x12345678 6
+. 49 89 44 DD 00 C3
+
+movq %rax, (%r13,%rdx,8)
+. 4769 0x12345678 6
+. 49 89 44 D5 00 C3
+
+movq %rax, (%r14)
+. 4770 0x12345678 4
+. 49 89 06 C3
+
+movq %rax, %r14
+. 4771 0x12345678 4
+. 49 89 C6 C3
+
+movq %rax, (%r14,%rbx,8)
+. 4772 0x12345678 5
+. 49 89 04 DE C3
+
+movq %rax, %r15
+. 4773 0x12345678 4
+. 49 89 C7 C3
+
+movq (%rax,%r15,8), %rax
+. 4774 0x12345678 5
+. 4A 8B 04 F8 C3
+
+movq %rax, %r8
+. 4775 0x12345678 4
+. 49 89 C0 C3
+
+movq %rax, (%r8,%rdx,8)
+. 4776 0x12345678 5
+. 49 89 04 D0 C3
+
+movq %rax, %r9
+. 4777 0x12345678 4
+. 49 89 C1 C3
+
+movq %rax, (%r9,%rdx,8)
+. 4778 0x12345678 5
+. 49 89 04 D1 C3
+
+movq (%rax), %rax
+. 4779 0x12345678 4
+. 48 8B 00 C3
+
+movq %rax, (%rbp)
+. 4780 0x12345678 5
+. 48 89 45 00 C3
+
+movq %rax, %rbp
+. 4781 0x12345678 4
+. 48 89 C5 C3
+
+movq (%rax,%rbp,8), %rbx
+. 4782 0x12345678 5
+. 48 8B 1C E8 C3
+
+movq %rax, (%rbp,%rbx,8)
+. 4783 0x12345678 6
+. 48 89 44 DD 00 C3
+
+movq %rax, (%rbx)
+. 4784 0x12345678 4
+. 48 89 03 C3
+
+movq %rax, %rbx
+. 4785 0x12345678 4
+. 48 89 C3 C3
+
+movq (%rax,%rbx,8), %rdi
+. 4786 0x12345678 5
+. 48 8B 3C D8 C3
+
+movq (%rax,%rbx,8), %rdx
+. 4787 0x12345678 5
+. 48 8B 14 D8 C3
+
+movq (%rax,%rbx,8), %rsi
+. 4788 0x12345678 5
+. 48 8B 34 D8 C3
+
+movq %rax, (%rbx,%r12,8)
+. 4789 0x12345678 5
+. 4A 89 04 E3 C3
+
+movq %rax, %rcx
+. 4790 0x12345678 4
+. 48 89 C1 C3
+
+movq (%rax,%rcx,8), %r13
+. 4791 0x12345678 5
+. 4C 8B 2C C8 C3
+
+movq (%rax,%rcx,8), %rax
+. 4792 0x12345678 5
+. 48 8B 04 C8 C3
+
+movq (%rax,%rcx,8), %rsi
+. 4793 0x12345678 5
+. 48 8B 34 C8 C3
+
+movq %rax, (%rcx,%rsi,8)
+. 4794 0x12345678 5
+. 48 89 04 F1 C3
+
+movq (%rax), %rdi
+. 4795 0x12345678 4
+. 48 8B 38 C3
+
+movq %rax, %rdi
+. 4796 0x12345678 4
+. 48 89 C7 C3
+
+movq (%rax,%rdi,8), %rax
+. 4797 0x12345678 5
+. 48 8B 04 F8 C3
+
+movq (%rax,%rdi,8), %rsi
+. 4798 0x12345678 5
+. 48 8B 34 F8 C3
+
+movq %rax, (%rdi,%rdx,8)
+. 4799 0x12345678 5
+. 48 89 04 D7 C3
+
+movq %rax, (%rdx)
+. 4800 0x12345678 4
+. 48 89 02 C3
+
+movq %rax, %rdx
+. 4801 0x12345678 4
+. 48 89 C2 C3
+
+movq (%rax,%rdx,8), %r12
+. 4802 0x12345678 5
+. 4C 8B 24 D0 C3
+
+movq (%rax,%rdx,8), %r13
+. 4803 0x12345678 5
+. 4C 8B 2C D0 C3
+
+movq (%rax,%rdx,8), %r14
+. 4804 0x12345678 5
+. 4C 8B 34 D0 C3
+
+movq (%rax,%rdx,8), %rax
+. 4805 0x12345678 5
+. 48 8B 04 D0 C3
+
+movq (%rax,%rdx,8), %rbp
+. 4806 0x12345678 5
+. 48 8B 2C D0 C3
+
+movq (%rax,%rdx,8), %rbx
+. 4807 0x12345678 5
+. 48 8B 1C D0 C3
+
+movq (%rax,%rdx,8), %rdi
+. 4808 0x12345678 5
+. 48 8B 3C D0 C3
+
+movq (%rax,%rdx,8), %rdx
+. 4809 0x12345678 5
+. 48 8B 14 D0 C3
+
+movq (%rax,%rdx,8), %rsi
+. 4810 0x12345678 5
+. 48 8B 34 D0 C3
+
+movq %rax, (%rdx,%r12,8)
+. 4811 0x12345678 5
+. 4A 89 04 E2 C3
+
+movq %rax, (%rdx,%r13,8)
+. 4812 0x12345678 5
+. 4A 89 04 EA C3
+
+movq %rax, (%rdx,%r15,8)
+. 4813 0x12345678 5
+. 4A 89 04 FA C3
+
+movq %rax, (%rdx,%rbp,8)
+. 4814 0x12345678 5
+. 48 89 04 EA C3
+
+movq %rax, (%rdx,%rbx,8)
+. 4815 0x12345678 5
+. 48 89 04 DA C3
+
+movq %rax, (%rsi)
+. 4816 0x12345678 4
+. 48 89 06 C3
+
+movq %rax, %rsi
+. 4817 0x12345678 4
+. 48 89 C6 C3
+
+movq (%rax,%rsi,8), %rdi
+. 4818 0x12345678 5
+. 48 8B 3C F0 C3
+
+movq %rax, (%rsi,%rcx,8)
+. 4819 0x12345678 5
+. 48 89 04 CE C3
+
+movq %rax, (%rsp)
+. 4820 0x12345678 5
+. 48 89 04 24 C3
+
+movq %rax, 16(%rip)
+. 4821 0x12345678 8
+. 48 89 05 10 00 00 00 C3
+
+movq %rax, 8(%rip)
+. 4822 0x12345678 8
+. 48 89 05 08 00 00 00 C3
+
+movq %rax, (%rip)
+. 4823 0x12345678 8
+. 48 89 05 00 00 00 00 C3
+
+movq %rbp, -16(%rsp)
+. 4824 0x12345678 6
+. 48 89 6C 24 F0 C3
+
+movq %rbp, -24(%rsp)
+. 4825 0x12345678 6
+. 48 89 6C 24 E8 C3
+
+movq %rbp, -32(%rsp)
+. 4826 0x12345678 6
+. 48 89 6C 24 E0 C3
+
+movq %rbp, -40(%rsp)
+. 4827 0x12345678 6
+. 48 89 6C 24 D8 C3
+
+movq %rbp, 8(%rax)
+. 4828 0x12345678 5
+. 48 89 68 08 C3
+
+movq %rbp, -8(%rsp)
+. 4829 0x12345678 6
+. 48 89 6C 24 F8 C3
+
+movq %rbp, 96(%rsp)
+. 4830 0x12345678 6
+. 48 89 6C 24 60 C3
+
+movq %rbp, %r8
+. 4831 0x12345678 4
+. 49 89 E8 C3
+
+movq %rbp, %r9
+. 4832 0x12345678 4
+. 49 89 E9 C3
+
+movq %rbp, %rax
+. 4833 0x12345678 4
+. 48 89 E8 C3
+
+movq (%rbp,%rax,8), %rbx
+. 4834 0x12345678 6
+. 48 8B 5C C5 00 C3
+
+movq %rbp, (%rax,%rcx,8)
+. 4835 0x12345678 5
+. 48 89 2C C8 C3
+
+movq (%rbp,%rbx,8), %rdi
+. 4836 0x12345678 6
+. 48 8B 7C DD 00 C3
+
+movq %rbp, %rcx
+. 4837 0x12345678 4
+. 48 89 E9 C3
+
+movq (%rbp), %rdi
+. 4838 0x12345678 5
+. 48 8B 7D 00 C3
+
+movq %rbp, %rdi
+. 4839 0x12345678 4
+. 48 89 EF C3
+
+movq (%rbp), %rdx
+. 4840 0x12345678 5
+. 48 8B 55 00 C3
+
+movq %rbp, %rdx
+. 4841 0x12345678 4
+. 48 89 EA C3
+
+movq %rbp, (%rdx,%rax,8)
+. 4842 0x12345678 5
+. 48 89 2C C2 C3
+
+movq (%rbp), %rsi
+. 4843 0x12345678 5
+. 48 8B 75 00 C3
+
+movq %rbp, %rsi
+. 4844 0x12345678 4
+. 48 89 EE C3
+
+movq %rbx, 112(%rsp)
+. 4845 0x12345678 6
+. 48 89 5C 24 70 C3
+
+movq %rbx, 16(%rax)
+. 4846 0x12345678 5
+. 48 89 58 10 C3
+
+movq %rbx, -16(%rsp)
+. 4847 0x12345678 6
+. 48 89 5C 24 F0 C3
+
+movq %rbx, -24(%rsp)
+. 4848 0x12345678 6
+. 48 89 5C 24 E8 C3
+
+movq %rbx, -32(%rsp)
+. 4849 0x12345678 6
+. 48 89 5C 24 E0 C3
+
+movq %rbx, -40(%rsp)
+. 4850 0x12345678 6
+. 48 89 5C 24 D8 C3
+
+movq %rbx, -48(%rsp)
+. 4851 0x12345678 6
+. 48 89 5C 24 D0 C3
+
+movq %rbx, 4(%rax)
+. 4852 0x12345678 5
+. 48 89 58 04 C3
+
+movq %rbx, 560(%rsp)
+. 4853 0x12345678 9
+. 48 89 9C 24 30 02 00 00 C3
+
+movq %rbx, 8(%rax)
+. 4854 0x12345678 5
+. 48 89 58 08 C3
+
+movq (%rbx,%r12,8), %rsi
+. 4855 0x12345678 5
+. 4A 8B 34 E3 C3
+
+movq %rbx, (%r13)
+. 4856 0x12345678 5
+. 49 89 5D 00 C3
+
+movq %rbx, %r8
+. 4857 0x12345678 4
+. 49 89 D8 C3
+
+movq (%rbx), %rax
+. 4858 0x12345678 4
+. 48 8B 03 C3
+
+movq %rbx, (%rax)
+. 4859 0x12345678 4
+. 48 89 18 C3
+
+movq %rbx, %rax
+. 4860 0x12345678 4
+. 48 89 D8 C3
+
+movq %rbx, %rcx
+. 4861 0x12345678 4
+. 48 89 D9 C3
+
+movq (%rbx,%rcx,8), %rax
+. 4862 0x12345678 5
+. 48 8B 04 CB C3
+
+movq (%rbx), %rdi
+. 4863 0x12345678 4
+. 48 8B 3B C3
+
+movq %rbx, %rdi
+. 4864 0x12345678 4
+. 48 89 DF C3
+
+movq (%rbx), %rdx
+. 4865 0x12345678 4
+. 48 8B 13 C3
+
+movq %rbx, %rdx
+. 4866 0x12345678 4
+. 48 89 DA C3
+
+movq (%rbx), %rsi
+. 4867 0x12345678 4
+. 48 8B 33 C3
+
+movq %rbx, %rsi
+. 4868 0x12345678 4
+. 48 89 DE C3
+
+movq %rbx, (%rsp)
+. 4869 0x12345678 5
+. 48 89 1C 24 C3
+
+movq %rcx, 144(%rsp)
+. 4870 0x12345678 9
+. 48 89 8C 24 90 00 00 00 C3
+
+movq %rcx, 24(%rsp)
+. 4871 0x12345678 6
+. 48 89 4C 24 18 C3
+
+movq %rcx, 32(%rsp)
+. 4872 0x12345678 6
+. 48 89 4C 24 20 C3
+
+movq %rcx, 40(%rsp)
+. 4873 0x12345678 6
+. 48 89 4C 24 28 C3
+
+movq %rcx, 56(%rsp)
+. 4874 0x12345678 6
+. 48 89 4C 24 38 C3
+
+movq %rcx, 64(%rsp)
+. 4875 0x12345678 6
+. 48 89 4C 24 40 C3
+
+movq %rcx, %r12
+. 4876 0x12345678 4
+. 49 89 CC C3
+
+movq %rcx, %r13
+. 4877 0x12345678 4
+. 49 89 CD C3
+
+movq (%rcx,%r13,8), %rbp
+. 4878 0x12345678 5
+. 4A 8B 2C E9 C3
+
+movq %rcx, %r14
+. 4879 0x12345678 4
+. 49 89 CE C3
+
+movq %rcx, (%r14,%rax,8)
+. 4880 0x12345678 5
+. 49 89 0C C6 C3
+
+movq %rcx, %r15
+. 4881 0x12345678 4
+. 49 89 CF C3
+
+movq %rcx, %r8
+. 4882 0x12345678 4
+. 49 89 C8 C3
+
+movq (%rcx), %rax
+. 4883 0x12345678 4
+. 48 8B 01 C3
+
+movq %rcx, %rax
+. 4884 0x12345678 4
+. 48 89 C8 C3
+
+movq (%rcx,%rax,8), %r12
+. 4885 0x12345678 5
+. 4C 8B 24 C1 C3
+
+movq (%rcx,%rax,8), %r13
+. 4886 0x12345678 5
+. 4C 8B 2C C1 C3
+
+movq (%rcx,%rax,8), %rax
+. 4887 0x12345678 5
+. 48 8B 04 C1 C3
+
+movq (%rcx,%rax,8), %rsi
+. 4888 0x12345678 5
+. 48 8B 34 C1 C3
+
+movq (%rcx), %rdi
+. 4889 0x12345678 4
+. 48 8B 39 C3
+
+movq %rcx, %rdi
+. 4890 0x12345678 4
+. 48 89 CF C3
+
+movq %rcx, %rdx
+. 4891 0x12345678 4
+. 48 89 CA C3
+
+movq %rcx, %rsi
+. 4892 0x12345678 4
+. 48 89 CE C3
+
+movq (%rcx,%rsi,8), %rbx
+. 4893 0x12345678 5
+. 48 8B 1C F1 C3
+
+movq %rdi, 120(%rsp)
+. 4894 0x12345678 6
+. 48 89 7C 24 78 C3
+
+movq %rdi, 160(%rsp)
+. 4895 0x12345678 9
+. 48 89 BC 24 A0 00 00 00 C3
+
+movq %rdi, 32(%rsp)
+. 4896 0x12345678 6
+. 48 89 7C 24 20 C3
+
+movq %rdi, 72(%rsp)
+. 4897 0x12345678 6
+. 48 89 7C 24 48 C3
+
+movq %rdi, 66(%rip)
+. 4898 0x12345678 8
+. 48 89 3D 42 00 00 00 C3
+
+movq (%rdi), %r10
+. 4899 0x12345678 4
+. 4C 8B 17 C3
+
+movq %rdi, %r10
+. 4900 0x12345678 4
+. 49 89 FA C3
+
+movq %rdi, %r11
+. 4901 0x12345678 4
+. 49 89 FB C3
+
+movq %rdi, %r12
+. 4902 0x12345678 4
+. 49 89 FC C3
+
+movq %rdi, %r13
+. 4903 0x12345678 4
+. 49 89 FD C3
+
+movq (%rdi), %r14
+. 4904 0x12345678 4
+. 4C 8B 37 C3
+
+movq %rdi, %r14
+. 4905 0x12345678 4
+. 49 89 FE C3
+
+movq %rdi, %r15
+. 4906 0x12345678 4
+. 49 89 FF C3
+
+movq %rdi, %r8
+. 4907 0x12345678 4
+. 49 89 F8 C3
+
+movq (%rdi), %r9
+. 4908 0x12345678 4
+. 4C 8B 0F C3
+
+movq %rdi, %r9
+. 4909 0x12345678 4
+. 49 89 F9 C3
+
+movq (%rdi), %rax
+. 4910 0x12345678 4
+. 48 8B 07 C3
+
+movq %rdi, %rax
+. 4911 0x12345678 4
+. 48 89 F8 C3
+
+movq (%rdi,%rax,8), %rax
+. 4912 0x12345678 5
+. 48 8B 04 C7 C3
+
+movq (%rdi,%rax,8), %rdx
+. 4913 0x12345678 5
+. 48 8B 14 C7 C3
+
+movq %rdi, (%rbp)
+. 4914 0x12345678 5
+. 48 89 7D 00 C3
+
+movq %rdi, %rbp
+. 4915 0x12345678 4
+. 48 89 FD C3
+
+movq %rdi, %rbx
+. 4916 0x12345678 4
+. 48 89 FB C3
+
+movq %rdi, %rcx
+. 4917 0x12345678 4
+. 48 89 F9 C3
+
+movq (%rdi), %rdi
+. 4918 0x12345678 4
+. 48 8B 3F C3
+
+movq (%rdi), %rdx
+. 4919 0x12345678 4
+. 48 8B 17 C3
+
+movq %rdi, %rdx
+. 4920 0x12345678 4
+. 48 89 FA C3
+
+movq (%rdi,%rdx,8), %rax
+. 4921 0x12345678 5
+. 48 8B 04 D7 C3
+
+movq %rdi, %rsi
+. 4922 0x12345678 4
+. 48 89 FE C3
+
+movq %rdi, 33(%rip)
+. 4923 0x12345678 8
+. 48 89 3D 21 00 00 00 C3
+
+movq %rdi, -898989(%rip)
+. 4924 0x12345678 8
+. 48 89 3D 53 48 F2 FF C3
+
+movq %rdx, 128(%rsp)
+. 4925 0x12345678 9
+. 48 89 94 24 80 00 00 00 C3
+
+movq %rdx, 152(%rsp)
+. 4926 0x12345678 9
+. 48 89 94 24 98 00 00 00 C3
+
+movq %rdx, 16(%rsp)
+. 4927 0x12345678 6
+. 48 89 54 24 10 C3
+
+movq %rdx, 24(%rsp)
+. 4928 0x12345678 6
+. 48 89 54 24 18 C3
+
+movq %rdx, 304(%rsp)
+. 4929 0x12345678 9
+. 48 89 94 24 30 01 00 00 C3
+
+movq %rdx, 32(%rsp)
+. 4930 0x12345678 6
+. 48 89 54 24 20 C3
+
+movq %rdx, 48(%rsp)
+. 4931 0x12345678 6
+. 48 89 54 24 30 C3
+
+movq %rdx, 4(%rcx)
+. 4932 0x12345678 5
+. 48 89 51 04 C3
+
+movq %rdx, -8(%rbx,%rax,8)
+. 4933 0x12345678 6
+. 48 89 54 C3 F8 C3
+
+movq %rdx, 8(%rcx)
+. 4934 0x12345678 5
+. 48 89 51 08 C3
+
+movq %rdx, 8989(%rip)
+. 4935 0x12345678 8
+. 48 89 15 1D 23 00 00 C3
+
+movq %rdx, %r12
+. 4936 0x12345678 4
+. 49 89 D4 C3
+
+movq %rdx, (%r12,%rax,8)
+. 4937 0x12345678 5
+. 49 89 14 C4 C3
+
+movq %rdx, %r13
+. 4938 0x12345678 4
+. 49 89 D5 C3
+
+movq %rdx, %r14
+. 4939 0x12345678 4
+. 49 89 D6 C3
+
+movq %rdx, %r15
+. 4940 0x12345678 4
+. 49 89 D7 C3
+
+movq (%rdx), %r8
+. 4941 0x12345678 4
+. 4C 8B 02 C3
+
+movq (%rdx), %rax
+. 4942 0x12345678 4
+. 48 8B 02 C3
+
+movq %rdx, (%rax)
+. 4943 0x12345678 4
+. 48 89 10 C3
+
+movq %rdx, %rax
+. 4944 0x12345678 4
+. 48 89 D0 C3
+
+movq (%rdx,%rax,8), %r12
+. 4945 0x12345678 5
+. 4C 8B 24 C2 C3
+
+movq (%rdx,%rax,8), %rdi
+. 4946 0x12345678 5
+. 48 8B 3C C2 C3
+
+movq (%rdx,%rax,8), %rdx
+. 4947 0x12345678 5
+. 48 8B 14 C2 C3
+
+movq (%rdx,%rax,8), %rsi
+. 4948 0x12345678 5
+. 48 8B 34 C2 C3
+
+movq %rdx, %rbp
+. 4949 0x12345678 4
+. 48 89 D5 C3
+
+movq %rdx, %rbx
+. 4950 0x12345678 4
+. 48 89 D3 C3
+
+movq (%rdx,%rbx,8), %rdi
+. 4951 0x12345678 5
+. 48 8B 3C DA C3
+
+movq %rdx, %rcx
+. 4952 0x12345678 4
+. 48 89 D1 C3
+
+movq (%rdx,%rcx,8), %rsi
+. 4953 0x12345678 5
+. 48 8B 34 CA C3
+
+movq %rdx, %rdi
+. 4954 0x12345678 4
+. 48 89 D7 C3
+
+movq (%rdx), %rdx
+. 4955 0x12345678 4
+. 48 8B 12 C3
+
+movq %rdx, %rsi
+. 4956 0x12345678 4
+. 48 89 D6 C3
+
+movq %rdx, (%rsp)
+. 4957 0x12345678 5
+. 48 89 14 24 C3
+
+movq %rsi, 136(%rsp)
+. 4958 0x12345678 9
+. 48 89 B4 24 88 00 00 00 C3
+
+movq %rsi, 152(%rsp)
+. 4959 0x12345678 9
+. 48 89 B4 24 98 00 00 00 C3
+
+movq %rsi, 160(%rsp)
+. 4960 0x12345678 9
+. 48 89 B4 24 A0 00 00 00 C3
+
+movq %rsi, 16(%rsp)
+. 4961 0x12345678 6
+. 48 89 74 24 10 C3
+
+movq %rsi, 24(%rsp)
+. 4962 0x12345678 6
+. 48 89 74 24 18 C3
+
+movq %rsi, 312(%rsp)
+. 4963 0x12345678 9
+. 48 89 B4 24 38 01 00 00 C3
+
+movq %rsi, 32(%rsp)
+. 4964 0x12345678 6
+. 48 89 74 24 20 C3
+
+movq %rsi, 40(%rsp)
+. 4965 0x12345678 6
+. 48 89 74 24 28 C3
+
+movq %rsi, 48(%rsp)
+. 4966 0x12345678 6
+. 48 89 74 24 30 C3
+
+movq %rsi, 56(%rsp)
+. 4967 0x12345678 6
+. 48 89 74 24 38 C3
+
+movq %rsi, 8(%rsp)
+. 4968 0x12345678 6
+. 48 89 74 24 08 C3
+
+movq %rsi, 77(%rip)
+. 4969 0x12345678 8
+. 48 89 35 4D 00 00 00 C3
+
+movq %rsi, %r10
+. 4970 0x12345678 4
+. 49 89 F2 C3
+
+movq %rsi, %r12
+. 4971 0x12345678 4
+. 49 89 F4 C3
+
+movq %rsi, %r13
+. 4972 0x12345678 4
+. 49 89 F5 C3
+
+movq %rsi, %r14
+. 4973 0x12345678 4
+. 49 89 F6 C3
+
+movq %rsi, %r15
+. 4974 0x12345678 4
+. 49 89 F7 C3
+
+movq %rsi, %r8
+. 4975 0x12345678 4
+. 49 89 F0 C3
+
+movq %rsi, %r9
+. 4976 0x12345678 4
+. 49 89 F1 C3
+
+movq %rsi, %rax
+. 4977 0x12345678 4
+. 48 89 F0 C3
+
+movq %rsi, %rbp
+. 4978 0x12345678 4
+. 48 89 F5 C3
+
+movq %rsi, %rbx
+. 4979 0x12345678 4
+. 48 89 F3 C3
+
+movq %rsi, %rcx
+. 4980 0x12345678 4
+. 48 89 F1 C3
+
+movq %rsi, %rdi
+. 4981 0x12345678 4
+. 48 89 F7 C3
+
+movq (%rsi), %rdx
+. 4982 0x12345678 4
+. 48 8B 16 C3
+
+movq %rsi, %rdx
+. 4983 0x12345678 4
+. 48 89 F2 C3
+
+movq (%rsi,%rdx,8), %rax
+. 4984 0x12345678 5
+. 48 8B 04 D6 C3
+
+movq %rsi, (%rsp)
+. 4985 0x12345678 5
+. 48 89 34 24 C3
+
+movq %rsi, 77(%rip)
+. 4986 0x12345678 8
+. 48 89 35 4D 00 00 00 C3
+
+movq (%rsp), %r9
+. 4987 0x12345678 5
+. 4C 8B 0C 24 C3
+
+movq (%rsp), %rax
+. 4988 0x12345678 5
+. 48 8B 04 24 C3
+
+movq (%rsp), %rbx
+. 4989 0x12345678 5
+. 48 8B 1C 24 C3
+
+movq (%rsp), %rdi
+. 4990 0x12345678 5
+. 48 8B 3C 24 C3
+
+movq (%rsp), %rdx
+. 4991 0x12345678 5
+. 48 8B 14 24 C3
+
+movq %rsp, %rdx
+. 4992 0x12345678 4
+. 48 89 E2 C3
+
+movq (%rsp), %rsi
+. 4993 0x12345678 5
+. 48 8B 34 24 C3
+
+movq 33(%rip), %rcx
+. 4994 0x12345678 8
+. 48 8B 0D 21 00 00 00 C3
+
+movq 66(%rip), %rdi
+. 4995 0x12345678 8
+. 48 8B 3D 42 00 00 00 C3
+
+movl %r12d, %eax
+. 4996 0x12345678 4
+. 44 89 E0 C3
+
+movl %r13d, %eax
+. 4997 0x12345678 4
+. 44 89 E8 C3
+
+movl %r13d, %edx
+. 4998 0x12345678 4
+. 44 89 EA C3
+
+movl %r14d, %edi
+. 4999 0x12345678 4
+. 44 89 F7 C3
+
+movl %r15d, %eax
+. 5000 0x12345678 4
+. 44 89 F8 C3
+
+movl %r15d, %ebx
+. 5001 0x12345678 4
+. 44 89 FB C3
+
+movl %r15d, %esi
+. 5002 0x12345678 4
+. 44 89 FE C3
+
+movl (%rax,%rdx,8), %ebx
+. 5003 0x12345678 4
+. 8B 1C D0 C3
+
+movl (%rdx), %r8d
+. 5004 0x12345678 4
+. 44 8B 02 C3
+
+movsbl 8(%rax),%edi
+. 5005 0x12345678 5
+. 0F BE 78 08 C3
+
+movsbl %ah, %ebx
+. 5006 0x12345678 4
+. 0F BE DC C3
+
+movsbl %ah, %edx
+. 5007 0x12345678 4
+. 0F BE D4 C3
+
+movsbl %al,%ebx
+. 5008 0x12345678 4
+. 0F BE D8 C3
+
+movsbl %al,%ecx
+. 5009 0x12345678 4
+. 0F BE C8 C3
+
+movsbl %al,%edi
+. 5010 0x12345678 4
+. 0F BE F8 C3
+
+movsbl %al,%edx
+. 5011 0x12345678 4
+. 0F BE D0 C3
+
+movsbl %al,%esi
+. 5012 0x12345678 4
+. 0F BE F0 C3
+
+movsbl %al,%r12d
+. 5013 0x12345678 5
+. 44 0F BE E0 C3
+
+movsbl %bh, %edi
+. 5014 0x12345678 4
+. 0F BE FF C3
+
+movsbl %bl,%ebx
+. 5015 0x12345678 4
+. 0F BE DB C3
+
+movsbl %ch, %edx
+. 5016 0x12345678 4
+. 0F BE D5 C3
+
+movsbl %cl,%eax
+. 5017 0x12345678 4
+. 0F BE C1 C3
+
+movsbl %cl,%ecx
+. 5018 0x12345678 4
+. 0F BE C9 C3
+
+movsbl %dil,%ecx
+. 5019 0x12345678 5
+. 40 0F BE CF C3
+
+movsbl %dl,%eax
+. 5020 0x12345678 4
+. 0F BE C2 C3
+
+movsbl %dl,%edx
+. 5021 0x12345678 4
+. 0F BE D2 C3
+
+movsbl %r11b,%edx
+. 5022 0x12345678 5
+. 41 0F BE D3 C3
+
+movsbl %r8b,%r8d
+. 5023 0x12345678 5
+. 45 0F BE C0 C3
+
+movsbl (%rax,%rcx),%edi
+. 5024 0x12345678 5
+. 0F BE 3C 08 C3
+
+movsbl (%rax,%rdx),%edi
+. 5025 0x12345678 5
+. 0F BE 3C 10 C3
+
+movsbl (%rax,%rsi),%edi
+. 5026 0x12345678 5
+. 0F BE 3C 30 C3
+
+movsbl (%rcx,%r12),%eax
+. 5027 0x12345678 6
+. 42 0F BE 04 21 C3
+
+movsbl (%rdi,%rax),%eax
+. 5028 0x12345678 5
+. 0F BE 04 07 C3
+
+movsbl (%rdx),%edi
+. 5029 0x12345678 4
+. 0F BE 3A C3
+
+movsbl (%rsp,%rax),%edi
+. 5030 0x12345678 5
+. 0F BE 3C 04 C3
+
+movsbq (%rdi,%rax),%rax
+. 5031 0x12345678 6
+. 48 0F BE 04 07 C3
+
+movslq 104(%rsp),%rdi
+. 5033 0x12345678 6
+. 48 63 7C 24 68 C3
+
+movslq 108(%rsp),%rax
+. 5034 0x12345678 6
+. 48 63 44 24 6C C3
+
+movslq 108(%rsp),%rdx
+. 5035 0x12345678 6
+. 48 63 54 24 6C C3
+
+movslq 120(%rsp),%rdi
+. 5036 0x12345678 6
+. 48 63 7C 24 78 C3
+
+movslq 124(%rsp),%rdi
+. 5037 0x12345678 6
+. 48 63 7C 24 7C C3
+
+movslq 124(%rsp),%rsi
+. 5038 0x12345678 6
+. 48 63 74 24 7C C3
+
+movslq 12(%rax),%rdi
+. 5039 0x12345678 5
+. 48 63 78 0C C3
+
+movslq 12(%rsp),%r15
+. 5040 0x12345678 6
+. 4C 63 7C 24 0C C3
+
+movslq 12(%rsp),%rax
+. 5041 0x12345678 6
+. 48 63 44 24 0C C3
+
+movslq 12(%rsp),%rdi
+. 5042 0x12345678 6
+. 48 63 7C 24 0C C3
+
+movslq 168(%rsp),%rax
+. 5043 0x12345678 9
+. 48 63 84 24 A8 00 00 00 C3
+
+movslq 16(%rsp),%rax
+. 5044 0x12345678 6
+. 48 63 44 24 10 C3
+
+movslq 16(%rsp),%rdi
+. 5045 0x12345678 6
+. 48 63 7C 24 10 C3
+
+movslq 176(%rsp),%rax
+. 5046 0x12345678 9
+. 48 63 84 24 B0 00 00 00 C3
+
+movslq 180(%rsp),%rax
+. 5047 0x12345678 9
+. 48 63 84 24 B4 00 00 00 C3
+
+movslq 184(%rsp),%rax
+. 5048 0x12345678 9
+. 48 63 84 24 B8 00 00 00 C3
+
+movslq 188(%rsp),%rax
+. 5049 0x12345678 9
+. 48 63 84 24 BC 00 00 00 C3
+
+movslq 20(%rsp),%rax
+. 5050 0x12345678 6
+. 48 63 44 24 14 C3
+
+movslq 24(%rbx),%rdi
+. 5051 0x12345678 5
+. 48 63 7B 18 C3
+
+movslq 28(%rsp),%rax
+. 5052 0x12345678 6
+. 48 63 44 24 1C C3
+
+movslq 44(%rsp),%rax
+. 5053 0x12345678 6
+. 48 63 44 24 2C C3
+
+movslq 8(%r12),%rax
+. 5054 0x12345678 6
+. 49 63 44 24 08 C3
+
+movslq 8(%rbx),%rax
+. 5055 0x12345678 5
+. 48 63 43 08 C3
+
+movslq 8(%rbx),%rbx
+. 5056 0x12345678 5
+. 48 63 5B 08 C3
+
+movslq 8(%rbx),%rdi
+. 5057 0x12345678 5
+. 48 63 7B 08 C3
+
+movslq 8(%rdx),%rax
+. 5058 0x12345678 5
+. 48 63 42 08 C3
+
+movslq 8(%rsi),%rax
+. 5059 0x12345678 5
+. 48 63 46 08 C3
+
+movslq %eax,%rdi
+. 5060 0x12345678 4
+. 48 63 F8 C3
+
+movslq %ebp,%r12
+. 5061 0x12345678 4
+. 4C 63 E5 C3
+
+movslq %ebp,%r13
+. 5062 0x12345678 4
+. 4C 63 ED C3
+
+movslq %ebp,%rax
+. 5063 0x12345678 4
+. 48 63 C5 C3
+
+movslq %ebp,%rbx
+. 5064 0x12345678 4
+. 48 63 DD C3
+
+movslq %ebp,%rcx
+. 5065 0x12345678 4
+. 48 63 CD C3
+
+movslq %ebp,%rdi
+. 5066 0x12345678 4
+. 48 63 FD C3
+
+movslq %ebp,%rdx
+. 5067 0x12345678 4
+. 48 63 D5 C3
+
+movslq %ebp,%rsi
+. 5068 0x12345678 4
+. 48 63 F5 C3
+
+movslq %ebx,%r13
+. 5069 0x12345678 4
+. 4C 63 EB C3
+
+movslq %ebx,%rax
+. 5070 0x12345678 4
+. 48 63 C3 C3
+
+movslq %ebx,%rcx
+. 5071 0x12345678 4
+. 48 63 CB C3
+
+movslq %ebx,%rdi
+. 5072 0x12345678 4
+. 48 63 FB C3
+
+movslq %ebx,%rdx
+. 5073 0x12345678 4
+. 48 63 D3 C3
+
+movslq %ecx,%rax
+. 5074 0x12345678 4
+. 48 63 C1 C3
+
+movslq %ecx,%rdi
+. 5075 0x12345678 4
+. 48 63 F9 C3
+
+movslq %ecx,%rdx
+. 5076 0x12345678 4
+. 48 63 D1 C3
+
+movslq %edi,%rax
+. 5077 0x12345678 4
+. 48 63 C7 C3
+
+movslq %edi,%rdi
+. 5078 0x12345678 4
+. 48 63 FF C3
+
+movslq %edx,%rax
+. 5079 0x12345678 4
+. 48 63 C2 C3
+
+movslq %edx,%rcx
+. 5080 0x12345678 4
+. 48 63 CA C3
+
+movslq %edx,%rdi
+. 5081 0x12345678 4
+. 48 63 FA C3
+
+movslq %edx,%rdx
+. 5082 0x12345678 4
+. 48 63 D2 C3
+
+movslq %edx,%rsi
+. 5083 0x12345678 4
+. 48 63 F2 C3
+
+movslq %esi,%rax
+. 5084 0x12345678 4
+. 48 63 C6 C3
+
+movslq %esi,%rcx
+. 5085 0x12345678 4
+. 48 63 CE C3
+
+movslq %esi,%rdi
+. 5086 0x12345678 4
+. 48 63 FE C3
+
+movslq %esi,%rdx
+. 5087 0x12345678 4
+. 48 63 D6 C3
+
+movslq %r12d,%r8
+. 5088 0x12345678 4
+. 4D 63 C4 C3
+
+movslq %r12d,%rax
+. 5089 0x12345678 4
+. 49 63 C4 C3
+
+movslq %r12d,%rbp
+. 5090 0x12345678 4
+. 49 63 EC C3
+
+movslq %r12d,%rbx
+. 5091 0x12345678 4
+. 49 63 DC C3
+
+movslq %r12d,%rcx
+. 5092 0x12345678 4
+. 49 63 CC C3
+
+movslq %r12d,%rdx
+. 5093 0x12345678 4
+. 49 63 D4 C3
+
+movslq %r12d,%rsi
+. 5094 0x12345678 4
+. 49 63 F4 C3
+
+movslq %r13d,%rax
+. 5095 0x12345678 4
+. 49 63 C5 C3
+
+movslq %r13d,%rbx
+. 5096 0x12345678 4
+. 49 63 DD C3
+
+movslq %r13d,%rdx
+. 5097 0x12345678 4
+. 49 63 D5 C3
+
+movslq %r14d,%rax
+. 5098 0x12345678 4
+. 49 63 C6 C3
+
+movslq %r14d,%rbp
+. 5099 0x12345678 4
+. 49 63 EE C3
+
+movslq %r14d,%rcx
+. 5100 0x12345678 4
+. 49 63 CE C3
+
+movslq %r14d,%rdx
+. 5101 0x12345678 4
+. 49 63 D6 C3
+
+movslq %r15d,%rax
+. 5102 0x12345678 4
+. 49 63 C7 C3
+
+movslq %r15d,%rbx
+. 5103 0x12345678 4
+. 49 63 DF C3
+
+movslq %r15d,%rdx
+. 5104 0x12345678 4
+. 49 63 D7 C3
+
+movslq %r8d,%rax
+. 5105 0x12345678 4
+. 49 63 C0 C3
+
+movslq %r8d,%rbx
+. 5106 0x12345678 4
+. 49 63 D8 C3
+
+movslq %r8d,%rcx
+. 5107 0x12345678 4
+. 49 63 C8 C3
+
+movslq %r8d,%rdx
+. 5108 0x12345678 4
+. 49 63 D0 C3
+
+movslq %r9d,%r8
+. 5109 0x12345678 4
+. 4D 63 C1 C3
+
+movslq %r9d,%rcx
+. 5110 0x12345678 4
+. 49 63 C9 C3
+
+movslq %r9d,%rdx
+. 5111 0x12345678 4
+. 49 63 D1 C3
+
+movslq (%rdx),%r8
+. 5112 0x12345678 4
+. 4C 63 02 C3
+
+movswl 2(%rcx,%rax,4),%eax
+. 5113 0x12345678 6
+. 0F BF 44 81 02 C3
+
+movswl 2(%rcx,%rdx),%eax
+. 5114 0x12345678 6
+. 0F BF 44 11 02 C3
+
+movswl 2(%rdi,%rsi),%eax
+. 5115 0x12345678 6
+. 0F BF 44 37 02 C3
+
+movswl 2(%rdx,%rax,4),%eax
+. 5116 0x12345678 6
+. 0F BF 44 82 02 C3
+
+movswl 2(%rsi,%rdx,4),%edx
+. 5117 0x12345678 6
+. 0F BF 54 96 02 C3
+
+movswl 4(%rax,%rdx),%esi
+. 5118 0x12345678 6
+. 0F BF 74 10 04 C3
+
+movswl 4(%rcx,%rdx,8),%eax
+. 5119 0x12345678 6
+. 0F BF 44 D1 04 C3
+
+movswl 4(%rcx,%rsi,8),%eax
+. 5120 0x12345678 6
+. 0F BF 44 F1 04 C3
+
+movswl 4(%rdi,%rax),%esi
+. 5121 0x12345678 6
+. 0F BF 74 07 04 C3
+
+movswl 4(%rdx,%rax),%esi
+. 5122 0x12345678 6
+. 0F BF 74 02 04 C3
+
+movswl 6(%rcx,%rdx,8),%eax
+. 5123 0x12345678 6
+. 0F BF 44 D1 06 C3
+
+movswl 6(%rcx,%rsi,8),%eax
+. 5124 0x12345678 6
+. 0F BF 44 F1 06 C3
+
+movswl %cx,%ecx
+. 5125 0x12345678 4
+. 0F BF C9 C3
+
+movswl %di,%eax
+. 5126 0x12345678 4
+. 0F BF C7 C3
+
+movswl %di,%edi
+. 5127 0x12345678 4
+. 0F BF FF C3
+
+movswl %dx,%edx
+. 5128 0x12345678 4
+. 0F BF D2 C3
+
+movswl %r8w,%r8d
+. 5129 0x12345678 5
+. 45 0F BF C0 C3
+
+movswl (%rdx,%rax,4),%eax
+. 5130 0x12345678 5
+. 0F BF 04 82 C3
+
+movswl %si,%esi
+. 5131 0x12345678 4
+. 0F BF F6 C3
+
+movswq %ax,%rax
+. 5132 0x12345678 5
+. 48 0F BF C0 C3
+
+movw $0, 22(%rbx,%rax,2)
+. 5133 0x12345678 8
+. 66 C7 44 43 16 00 00 C3
+
+movw $0, 22(%rcx,%rdx,2)
+. 5134 0x12345678 8
+. 66 C7 44 51 16 00 00 C3
+
+movw $0, 24(%r14)
+. 5135 0x12345678 8
+. 66 41 C7 46 18 00 00 C3
+
+movw $0, 24(%rax)
+. 5136 0x12345678 7
+. 66 C7 40 18 00 00 C3
+
+movw $0, 4(%rdx,%rax)
+. 5137 0x12345678 8
+. 66 C7 44 02 04 00 00 C3
+
+movw $0, 6(%rdx,%rax)
+. 5138 0x12345678 8
+. 66 C7 44 02 06 00 00 C3
+
+movw $1, 30(%r14)
+. 5139 0x12345678 8
+. 66 41 C7 46 1E 01 00 C3
+
+movw $1, 30(%rax)
+. 5140 0x12345678 7
+. 66 C7 40 1E 01 00 C3
+
+movw $-2, 2(%rdx,%rax)
+. 5141 0x12345678 8
+. 66 C7 44 02 02 FE FF C3
+
+movw $-2, (%rdx,%rax)
+. 5142 0x12345678 7
+. 66 C7 04 02 FE FF C3
+
+movw %ax, 30(%rbx)
+. 5143 0x12345678 5
+. 66 89 43 1E C3
+
+movw %ax, 30(%rcx)
+. 5144 0x12345678 5
+. 66 89 41 1E C3
+
+movw %ax, 4(%rcx,%rdx,4)
+. 5145 0x12345678 6
+. 66 89 44 91 04 C3
+
+movw %ax, 4(%rcx,%rdx,8)
+. 5146 0x12345678 6
+. 66 89 44 D1 04 C3
+
+movw %ax, 6(%rcx,%rdx,8)
+. 5147 0x12345678 6
+. 66 89 44 D1 06 C3
+
+movw %bx, 4(%rcx,%rax,8)
+. 5148 0x12345678 6
+. 66 89 5C C1 04 C3
+
+movw %bx, 8(%rax)
+. 5149 0x12345678 5
+. 66 89 58 08 C3
+
+movw %cx, (%rdx,%rax)
+. 5150 0x12345678 5
+. 66 89 0C 02 C3
+
+movw %r13w, 2(%rbx,%rax)
+. 5151 0x12345678 7
+. 66 44 89 6C 03 02 C3
+
+movw %r13w, 2(%rdi,%rax)
+. 5152 0x12345678 7
+. 66 44 89 6C 07 02 C3
+
+movw %r13w, 6(%rcx,%rax,8)
+. 5153 0x12345678 7
+. 66 44 89 6C C1 06 C3
+
+movzbl 106(%rsp), %edi
+. 5154 0x12345678 6
+. 0F B6 7C 24 6A C3
+
+movzbl 106(%rsp), %r8d
+. 5155 0x12345678 7
+. 44 0F B6 44 24 6A C3
+
+movzbl 112(%rsp), %eax
+. 5156 0x12345678 6
+. 0F B6 44 24 70 C3
+
+movzbl 112(%rsp), %edx
+. 5157 0x12345678 6
+. 0F B6 54 24 70 C3
+
+movzbl 11(%rsp), %ebx
+. 5158 0x12345678 6
+. 0F B6 5C 24 0B C3
+
+movzbl 11(%rsp), %edi
+. 5159 0x12345678 6
+. 0F B6 7C 24 0B C3
+
+movzbl 11(%rsp), %edx
+. 5160 0x12345678 6
+. 0F B6 54 24 0B C3
+
+movzbl 11(%rsp), %r12d
+. 5161 0x12345678 7
+. 44 0F B6 64 24 0B C3
+
+movzbl 127(%rsp), %eax
+. 5162 0x12345678 6
+. 0F B6 44 24 7F C3
+
+movzbl 127(%rsp), %edi
+. 5163 0x12345678 6
+. 0F B6 7C 24 7F C3
+
+movzbl 128(%rsp,%rax), %eax
+. 5164 0x12345678 9
+. 0F B6 84 04 80 00 00 00 C3
+
+movzbl 128(%rsp,%rdx), %edx
+. 5165 0x12345678 9
+. 0F B6 94 14 80 00 00 00 C3
+
+movzbl 139(%rsp), %edi
+. 5166 0x12345678 9
+. 0F B6 BC 24 8B 00 00 00 C3
+
+movzbl 139(%rsp), %r8d
+. 5167 0x12345678 10
+. 44 0F B6 84 24 8B 00 00 00 C3
+
+movzbl 140(%rdi), %eax
+. 5168 0x12345678 8
+. 0F B6 87 8C 00 00 00 C3
+
+movzbl 148(%rdi), %edx
+. 5169 0x12345678 8
+. 0F B6 97 94 00 00 00 C3
+
+movzbl 15(%rsp), %ebx
+. 5170 0x12345678 6
+. 0F B6 5C 24 0F C3
+
+movzbl 15(%rsp), %edi
+. 5171 0x12345678 6
+. 0F B6 7C 24 0F C3
+
+movzbl 15(%rsp), %edx
+. 5172 0x12345678 6
+. 0F B6 54 24 0F C3
+
+movzbl 15(%rsp), %r9d
+. 5173 0x12345678 7
+. 44 0F B6 4C 24 0F C3
+
+movzbl 16(%rbx), %eax
+. 5174 0x12345678 5
+. 0F B6 43 10 C3
+
+movzbl 16(%rsp), %eax
+. 5175 0x12345678 6
+. 0F B6 44 24 10 C3
+
+movzbl 16(%rsp), %edx
+. 5176 0x12345678 6
+. 0F B6 54 24 10 C3
+
+movzbl 19(%rsp), %ebp
+. 5177 0x12345678 6
+. 0F B6 6C 24 13 C3
+
+movzbl 19(%rsp), %ebx
+. 5178 0x12345678 6
+. 0F B6 5C 24 13 C3
+
+movzbl 19(%rsp), %edi
+. 5179 0x12345678 6
+. 0F B6 7C 24 13 C3
+
+movzbl 19(%rsp), %edx
+. 5180 0x12345678 6
+. 0F B6 54 24 13 C3
+
+movzbl 1(%r12), %eax
+. 5181 0x12345678 7
+. 41 0F B6 44 24 01 C3
+
+movzbl 1(%r12), %ecx
+. 5182 0x12345678 7
+. 41 0F B6 4C 24 01 C3
+
+movzbl 1(%r12), %edx
+. 5183 0x12345678 7
+. 41 0F B6 54 24 01 C3
+
+movzbl 1(%rdi,%rcx), %edx
+. 5184 0x12345678 6
+. 0F B6 54 0F 01 C3
+
+movzbl 1(%rdx), %edx
+. 5185 0x12345678 5
+. 0F B6 52 01 C3
+
+movzbl 1(%rsi,%rdx), %eax
+. 5186 0x12345678 6
+. 0F B6 44 16 01 C3
+
+movzbl 200(%rsp), %eax
+. 5187 0x12345678 9
+. 0F B6 84 24 C8 00 00 00 C3
+
+movzbl 22(%rsp), %edi
+. 5188 0x12345678 6
+. 0F B6 7C 24 16 C3
+
+movzbl 22(%rsp), %edx
+. 5189 0x12345678 6
+. 0F B6 54 24 16 C3
+
+movzbl 22(%rsp), %r8d
+. 5190 0x12345678 7
+. 44 0F B6 44 24 16 C3
+
+movzbl 23(%rsp), %ecx
+. 5191 0x12345678 6
+. 0F B6 4C 24 17 C3
+
+movzbl 23(%rsp), %edi
+. 5192 0x12345678 6
+. 0F B6 7C 24 17 C3
+
+movzbl 23(%rsp), %esi
+. 5193 0x12345678 6
+. 0F B6 74 24 17 C3
+
+movzbl 25(%rsp), %ecx
+. 5194 0x12345678 6
+. 0F B6 4C 24 19 C3
+
+movzbl 26(%rsp), %ebx
+. 5195 0x12345678 6
+. 0F B6 5C 24 1A C3
+
+movzbl 26(%rsp), %edi
+. 5196 0x12345678 6
+. 0F B6 7C 24 1A C3
+
+movzbl 270(%rsp), %ecx
+. 5197 0x12345678 9
+. 0F B6 8C 24 0E 01 00 00 C3
+
+movzbl 270(%rsp), %edi
+. 5198 0x12345678 9
+. 0F B6 BC 24 0E 01 00 00 C3
+
+movzbl 270(%rsp), %esi
+. 5199 0x12345678 9
+. 0F B6 B4 24 0E 01 00 00 C3
+
+movzbl 270(%rsp), %r12d
+. 5200 0x12345678 10
+. 44 0F B6 A4 24 0E 01 00 00 C3
+
+movzbl 271(%rsp), %ebx
+. 5201 0x12345678 9
+. 0F B6 9C 24 0F 01 00 00 C3
+
+movzbl 271(%rsp), %edi
+. 5202 0x12345678 9
+. 0F B6 BC 24 0F 01 00 00 C3
+
+movzbl 271(%rsp), %edx
+. 5203 0x12345678 9
+. 0F B6 94 24 0F 01 00 00 C3
+
+movzbl 271(%rsp), %r12d
+. 5204 0x12345678 10
+. 44 0F B6 A4 24 0F 01 00 00 C3
+
+movzbl 271(%rsp), %r14d
+. 5205 0x12345678 10
+. 44 0F B6 B4 24 0F 01 00 00 C3
+
+movzbl 27(%rsp), %ebx
+. 5206 0x12345678 6
+. 0F B6 5C 24 1B C3
+
+movzbl 27(%rsp), %r13d
+. 5207 0x12345678 7
+. 44 0F B6 6C 24 1B C3
+
+movzbl 280(%rsp), %eax
+. 5208 0x12345678 9
+. 0F B6 84 24 18 01 00 00 C3
+
+movzbl 2(%r12), %eax
+. 5209 0x12345678 7
+. 41 0F B6 44 24 02 C3
+
+movzbl 2(%r12), %ebx
+. 5210 0x12345678 7
+. 41 0F B6 5C 24 02 C3
+
+movzbl 2(%r12), %ecx
+. 5211 0x12345678 7
+. 41 0F B6 4C 24 02 C3
+
+movzbl 2(%r12), %edi
+. 5212 0x12345678 7
+. 41 0F B6 7C 24 02 C3
+
+movzbl 2(%r12), %edx
+. 5213 0x12345678 7
+. 41 0F B6 54 24 02 C3
+
+movzbl 2(%r12), %r12d
+. 5214 0x12345678 7
+. 45 0F B6 64 24 02 C3
+
+movzbl 2(%r12), %r13d
+. 5215 0x12345678 7
+. 45 0F B6 6C 24 02 C3
+
+movzbl 2(%r12), %r15d
+. 5216 0x12345678 7
+. 45 0F B6 7C 24 02 C3
+
+movzbl 2(%rax,%r12), %r12d
+. 5217 0x12345678 7
+. 46 0F B6 64 20 02 C3
+
+movzbl 2(%rdi,%rcx), %edx
+. 5218 0x12345678 6
+. 0F B6 54 0F 02 C3
+
+movzbl 30(%rsp), %ecx
+. 5219 0x12345678 6
+. 0F B6 4C 24 1E C3
+
+movzbl 30(%rsp), %edi
+. 5220 0x12345678 6
+. 0F B6 7C 24 1E C3
+
+movzbl 30(%rsp), %edx
+. 5221 0x12345678 6
+. 0F B6 54 24 1E C3
+
+movzbl 31(%rsp), %ebx
+. 5222 0x12345678 6
+. 0F B6 5C 24 1F C3
+
+movzbl 31(%rsp), %ecx
+. 5223 0x12345678 6
+. 0F B6 4C 24 1F C3
+
+movzbl 31(%rsp), %edi
+. 5224 0x12345678 6
+. 0F B6 7C 24 1F C3
+
+movzbl 31(%rsp), %r12d
+. 5225 0x12345678 7
+. 44 0F B6 64 24 1F C3
+
+movzbl 31(%rsp), %r15d
+. 5226 0x12345678 7
+. 44 0F B6 7C 24 1F C3
+
+movzbl 32(%rsp), %ecx
+. 5227 0x12345678 6
+. 0F B6 4C 24 20 C3
+
+movzbl 35(%rsp), %ebx
+. 5228 0x12345678 6
+. 0F B6 5C 24 23 C3
+
+movzbl 35(%rsp), %edi
+. 5229 0x12345678 6
+. 0F B6 7C 24 23 C3
+
+movzbl 35(%rsp), %r12d
+. 5230 0x12345678 7
+. 44 0F B6 64 24 23 C3
+
+movzbl 38(%rsp), %ecx
+. 5231 0x12345678 6
+. 0F B6 4C 24 26 C3
+
+movzbl 38(%rsp), %edi
+. 5232 0x12345678 6
+. 0F B6 7C 24 26 C3
+
+movzbl 38(%rsp), %edx
+. 5233 0x12345678 6
+. 0F B6 54 24 26 C3
+
+movzbl 38(%rsp), %r8d
+. 5234 0x12345678 7
+. 44 0F B6 44 24 26 C3
+
+movzbl 39(%rsp), %eax
+. 5235 0x12345678 6
+. 0F B6 44 24 27 C3
+
+movzbl 39(%rsp), %ebp
+. 5236 0x12345678 6
+. 0F B6 6C 24 27 C3
+
+movzbl 39(%rsp), %ebx
+. 5237 0x12345678 6
+. 0F B6 5C 24 27 C3
+
+movzbl 39(%rsp), %ecx
+. 5238 0x12345678 6
+. 0F B6 4C 24 27 C3
+
+movzbl 39(%rsp), %edi
+. 5239 0x12345678 6
+. 0F B6 7C 24 27 C3
+
+movzbl 39(%rsp), %edx
+. 5240 0x12345678 6
+. 0F B6 54 24 27 C3
+
+movzbl 39(%rsp), %esi
+. 5241 0x12345678 6
+. 0F B6 74 24 27 C3
+
+movzbl 39(%rsp), %r13d
+. 5242 0x12345678 7
+. 44 0F B6 6C 24 27 C3
+
+movzbl 3(%r12), %eax
+. 5243 0x12345678 7
+. 41 0F B6 44 24 03 C3
+
+movzbl 3(%r12), %ebx
+. 5244 0x12345678 7
+. 41 0F B6 5C 24 03 C3
+
+movzbl 3(%r12), %esi
+. 5245 0x12345678 7
+. 41 0F B6 74 24 03 C3
+
+movzbl 3(%r12), %r12d
+. 5246 0x12345678 7
+. 45 0F B6 64 24 03 C3
+
+movzbl 3(%r12), %r14d
+. 5247 0x12345678 7
+. 45 0F B6 74 24 03 C3
+
+movzbl 3(%rax,%r12), %r12d
+. 5248 0x12345678 7
+. 46 0F B6 64 20 03 C3
+
+movzbl 3(%rdi,%rcx), %eax
+. 5249 0x12345678 6
+. 0F B6 44 0F 03 C3
+
+movzbl 42(%rsp), %edx
+. 5250 0x12345678 6
+. 0F B6 54 24 2A C3
+
+movzbl 43(%rsp), %eax
+. 5251 0x12345678 6
+. 0F B6 44 24 2B C3
+
+movzbl 43(%rsp), %ebx
+. 5252 0x12345678 6
+. 0F B6 5C 24 2B C3
+
+movzbl 43(%rsp), %edi
+. 5253 0x12345678 6
+. 0F B6 7C 24 2B C3
+
+movzbl 43(%rsp), %esi
+. 5254 0x12345678 6
+. 0F B6 74 24 2B C3
+
+movzbl 43(%rsp), %r12d
+. 5255 0x12345678 7
+. 44 0F B6 64 24 2B C3
+
+movzbl 44(%rbp), %eax
+. 5256 0x12345678 5
+. 0F B6 45 2C C3
+
+movzbl 46(%rsp), %eax
+. 5257 0x12345678 6
+. 0F B6 44 24 2E C3
+
+movzbl 46(%rsp), %esi
+. 5258 0x12345678 6
+. 0F B6 74 24 2E C3
+
+movzbl 47(%rsp), %eax
+. 5259 0x12345678 6
+. 0F B6 44 24 2F C3
+
+movzbl 47(%rsp), %ebx
+. 5260 0x12345678 6
+. 0F B6 5C 24 2F C3
+
+movzbl 47(%rsp), %edi
+. 5261 0x12345678 6
+. 0F B6 7C 24 2F C3
+
+movzbl 47(%rsp), %r12d
+. 5262 0x12345678 7
+. 44 0F B6 64 24 2F C3
+
+movzbl 47(%rsp), %r13d
+. 5263 0x12345678 7
+. 44 0F B6 6C 24 2F C3
+
+movzbl 48(%rsp), %eax
+. 5264 0x12345678 6
+. 0F B6 44 24 30 C3
+
+movzbl 48(%rsp), %ebx
+. 5265 0x12345678 6
+. 0F B6 5C 24 30 C3
+
+movzbl 48(%rsp), %edx
+. 5266 0x12345678 6
+. 0F B6 54 24 30 C3
+
+movzbl 48(%rsp), %esi
+. 5267 0x12345678 6
+. 0F B6 74 24 30 C3
+
+movzbl 4(%r12), %r12d
+. 5268 0x12345678 7
+. 45 0F B6 64 24 04 C3
+
+movzbl 55(%rsp), %ebx
+. 5269 0x12345678 6
+. 0F B6 5C 24 37 C3
+
+movzbl 55(%rsp), %edi
+. 5270 0x12345678 6
+. 0F B6 7C 24 37 C3
+
+movzbl 55(%rsp), %r12d
+. 5271 0x12345678 7
+. 44 0F B6 64 24 37 C3
+
+movzbl 59(%rsp), %eax
+. 5272 0x12345678 6
+. 0F B6 44 24 3B C3
+
+movzbl 59(%rsp), %edi
+. 5273 0x12345678 6
+. 0F B6 7C 24 3B C3
+
+movzbl 59(%rsp), %esi
+. 5274 0x12345678 6
+. 0F B6 74 24 3B C3
+
+movzbl 60(%rsp), %ebp
+. 5275 0x12345678 6
+. 0F B6 6C 24 3C C3
+
+movzbl 61(%rsp), %edi
+. 5276 0x12345678 6
+. 0F B6 7C 24 3D C3
+
+movzbl 61(%rsp), %edx
+. 5277 0x12345678 6
+. 0F B6 54 24 3D C3
+
+movzbl 62(%rsp), %r8d
+. 5278 0x12345678 7
+. 44 0F B6 44 24 3E C3
+
+movzbl 64(%rsp), %ecx
+. 5279 0x12345678 6
+. 0F B6 4C 24 40 C3
+
+movzbl 67(%rsp), %ebx
+. 5280 0x12345678 6
+. 0F B6 5C 24 43 C3
+
+movzbl 67(%rsp), %edi
+. 5281 0x12345678 6
+. 0F B6 7C 24 43 C3
+
+movzbl 75(%rsp), %esi
+. 5282 0x12345678 6
+. 0F B6 74 24 4B C3
+
+movzbl 79(%rsp), %ecx
+. 5283 0x12345678 6
+. 0F B6 4C 24 4F C3
+
+movzbl 79(%rsp), %edi
+. 5284 0x12345678 6
+. 0F B6 7C 24 4F C3
+
+movzbl 79(%rsp), %edx
+. 5285 0x12345678 6
+. 0F B6 54 24 4F C3
+
+movzbl 79(%rsp), %r8d
+. 5286 0x12345678 7
+. 44 0F B6 44 24 4F C3
+
+movzbl 7(%rsp), %ebx
+. 5287 0x12345678 6
+. 0F B6 5C 24 07 C3
+
+movzbl 7(%rsp), %ecx
+. 5288 0x12345678 6
+. 0F B6 4C 24 07 C3
+
+movzbl 7(%rsp), %edi
+. 5289 0x12345678 6
+. 0F B6 7C 24 07 C3
+
+movzbl 7(%rsp), %edx
+. 5290 0x12345678 6
+. 0F B6 54 24 07 C3
+
+movzbl 7(%rsp), %r12d
+. 5291 0x12345678 7
+. 44 0F B6 64 24 07 C3
+
+movzbl 87(%rsp), %ebp
+. 5292 0x12345678 6
+. 0F B6 6C 24 57 C3
+
+movzbl 87(%rsp), %ebx
+. 5293 0x12345678 6
+. 0F B6 5C 24 57 C3
+
+movzbl 8(%rax), %eax
+. 5294 0x12345678 5
+. 0F B6 40 08 C3
+
+movzbl 8(%rax), %ecx
+. 5295 0x12345678 5
+. 0F B6 48 08 C3
+
+movzbl 8(%rax), %edi
+. 5296 0x12345678 5
+. 0F B6 78 08 C3
+
+movzbl 8(%rdi), %eax
+. 5297 0x12345678 5
+. 0F B6 47 08 C3
+
+movzbl 8(%rdi), %edi
+. 5298 0x12345678 5
+. 0F B6 7F 08 C3
+
+movzbl 8(%rdi), %esi
+. 5299 0x12345678 5
+. 0F B6 77 08 C3
+
+movzbl 8(%rdx), %ecx
+. 5300 0x12345678 5
+. 0F B6 4A 08 C3
+
+movzbl 8(%rsi), %eax
+. 5301 0x12345678 5
+. 0F B6 46 08 C3
+
+movzbl 8(%rsi), %edx
+. 5302 0x12345678 5
+. 0F B6 56 08 C3
+
+movzbl 95(%rsp), %edx
+. 5303 0x12345678 6
+. 0F B6 54 24 5F C3
+
+movzbl 96(%rsp), %eax
+. 5304 0x12345678 6
+. 0F B6 44 24 60 C3
+
+movzbl 96(%rsp), %ecx
+. 5305 0x12345678 6
+. 0F B6 4C 24 60 C3
+
+movzbl %ah, %ebx
+. 5306 0x12345678 4
+. 0F B6 DC C3
+
+movzbl %ah, %edx
+. 5307 0x12345678 4
+. 0F B6 D4 C3
+
+movzbl %al, %eax
+. 5308 0x12345678 4
+. 0F B6 C0 C3
+
+movzbl %al, %ebp
+. 5309 0x12345678 4
+. 0F B6 E8 C3
+
+movzbl %al, %ebx
+. 5310 0x12345678 4
+. 0F B6 D8 C3
+
+movzbl %al, %ecx
+. 5311 0x12345678 4
+. 0F B6 C8 C3
+
+movzbl %al, %edi
+. 5312 0x12345678 4
+. 0F B6 F8 C3
+
+movzbl %al, %edi
+. 5313 0x12345678 4
+. 0F B6 F8 C3
+
+movzbl %al,%edi
+. 5314 0x12345678 4
+. 0F B6 F8 C3
+
+movzbl %al, %edx
+. 5315 0x12345678 4
+. 0F B6 D0 C3
+
+movzbl %al, %edx
+. 5316 0x12345678 4
+. 0F B6 D0 C3
+
+movzbl %al, %esi
+. 5317 0x12345678 4
+. 0F B6 F0 C3
+
+movzbl %al, %r12d
+. 5318 0x12345678 5
+. 44 0F B6 E0 C3
+
+movzbl %al, %r13d
+. 5319 0x12345678 5
+. 44 0F B6 E8 C3
+
+movzbl %al, %r14d
+. 5320 0x12345678 5
+. 44 0F B6 F0 C3
+
+movzbl %al, %r15d
+. 5321 0x12345678 5
+. 44 0F B6 F8 C3
+
+movzbl %bh, %ebp
+. 5322 0x12345678 4
+. 0F B6 EF C3
+
+movzbl %bh, %ecx
+. 5323 0x12345678 4
+. 0F B6 CF C3
+
+movzbl %bh, %edi
+. 5324 0x12345678 4
+. 0F B6 FF C3
+
+movzbl %bh, %edx
+. 5325 0x12345678 4
+. 0F B6 D7 C3
+
+movzbl %bl, %eax
+. 5326 0x12345678 4
+. 0F B6 C3 C3
+
+movzbl %bl, %ebx
+. 5327 0x12345678 4
+. 0F B6 DB C3
+
+movzbl %bl, %ecx
+. 5328 0x12345678 4
+. 0F B6 CB C3
+
+movzbl %bl, %edi
+. 5329 0x12345678 4
+. 0F B6 FB C3
+
+movzbl %bl, %edx
+. 5330 0x12345678 4
+. 0F B6 D3 C3
+
+movzbl %bl, %esi
+. 5331 0x12345678 4
+. 0F B6 F3 C3
+
+movzbl %bpl, %eax
+. 5332 0x12345678 5
+. 40 0F B6 C5 C3
+
+movzbl %bpl, %ebp
+. 5333 0x12345678 5
+. 40 0F B6 ED C3
+
+movzbl %bpl, %ecx
+. 5334 0x12345678 5
+. 40 0F B6 CD C3
+
+movzbl %bpl, %edi
+. 5335 0x12345678 5
+. 40 0F B6 FD C3
+
+movzbl %bpl, %edx
+. 5336 0x12345678 5
+. 40 0F B6 D5 C3
+
+movzbl %bpl, %esi
+. 5337 0x12345678 5
+. 40 0F B6 F5 C3
+
+movzbl %bpl, %r9d
+. 5338 0x12345678 5
+. 44 0F B6 CD C3
+
+movzbl %ch, %ebx
+. 5339 0x12345678 4
+. 0F B6 DD C3
+
+movzbl %ch, %edi
+. 5340 0x12345678 4
+. 0F B6 FD C3
+
+movzbl %ch, %edx
+. 5341 0x12345678 4
+. 0F B6 D5 C3
+
+movzbl %cl, %eax
+. 5342 0x12345678 4
+. 0F B6 C1 C3
+
+movzbl %cl, %ebx
+. 5343 0x12345678 4
+. 0F B6 D9 C3
+
+movzbl %cl, %ecx
+. 5344 0x12345678 4
+. 0F B6 C9 C3
+
+movzbl %cl, %edx
+. 5345 0x12345678 4
+. 0F B6 D1 C3
+
+movzbl %cl, %esi
+. 5346 0x12345678 4
+. 0F B6 F1 C3
+
+movzbl %dh, %ebp
+. 5347 0x12345678 4
+. 0F B6 EE C3
+
+movzbl %dh, %edi
+. 5348 0x12345678 4
+. 0F B6 FE C3
+
+movzbl %dil, %eax
+. 5349 0x12345678 5
+. 40 0F B6 C7 C3
+
+movzbl %dil,%eax
+. 5350 0x12345678 5
+. 40 0F B6 C7 C3
+
+movzbl %dil, %edi
+. 5351 0x12345678 5
+. 40 0F B6 FF C3
+
+movzbl %dil, %edx
+. 5352 0x12345678 5
+. 40 0F B6 D7 C3
+
+movzbl %dl, %eax
+. 5353 0x12345678 4
+. 0F B6 C2 C3
+
+movzbl %dl, %ebx
+. 5354 0x12345678 4
+. 0F B6 DA C3
+
+movzbl %dl, %edi
+. 5355 0x12345678 4
+. 0F B6 FA C3
+
+movzbl %dl, %edx
+. 5356 0x12345678 4
+. 0F B6 D2 C3
+
+movzbl 14(%rip), %r8d
+. 5357 0x12345678 9
+. 44 0F B6 05 0E 00 00 00 C3
+
+movzbl 15(%rdx), %eax
+. 5358 0x12345678 5
+. 0F B6 42 0F C3
+
+movzbl 17(%rip), %eax
+. 5359 0x12345678 8
+. 0F B6 05 11 00 00 00 C3
+
+movzbl %r10b, %edx
+. 5360 0x12345678 5
+. 41 0F B6 D2 C3
+
+movzbl %r10b, %r10d
+. 5361 0x12345678 5
+. 45 0F B6 D2 C3
+
+movzbl %r11b, %edx
+. 5362 0x12345678 5
+. 41 0F B6 D3 C3
+
+movzbl %r11b, %r11d
+. 5363 0x12345678 5
+. 45 0F B6 DB C3
+
+movzbl %r12b, %eax
+. 5364 0x12345678 5
+. 41 0F B6 C4 C3
+
+movzbl %r12b, %ebx
+. 5365 0x12345678 5
+. 41 0F B6 DC C3
+
+movzbl %r12b, %edi
+. 5366 0x12345678 5
+. 41 0F B6 FC C3
+
+movzbl %r12b, %edx
+. 5367 0x12345678 5
+. 41 0F B6 D4 C3
+
+movzbl %r12b, %esi
+. 5368 0x12345678 5
+. 41 0F B6 F4 C3
+
+movzbl %r12b, %r13d
+. 5369 0x12345678 5
+. 45 0F B6 EC C3
+
+movzbl (%r12), %ebx
+. 5370 0x12345678 6
+. 41 0F B6 1C 24 C3
+
+movzbl %r13b, %eax
+. 5371 0x12345678 5
+. 41 0F B6 C5 C3
+
+movzbl %r13b, %ebx
+. 5372 0x12345678 5
+. 41 0F B6 DD C3
+
+movzbl %r13b, %edi
+. 5373 0x12345678 5
+. 41 0F B6 FD C3
+
+movzbl %r13b, %edx
+. 5374 0x12345678 5
+. 41 0F B6 D5 C3
+
+movzbl %r13b, %esi
+. 5375 0x12345678 5
+. 41 0F B6 F5 C3
+
+movzbl %r13b,%r12d
+. 5376 0x12345678 5
+. 45 0F B6 E5 C3
+
+movzbl %r14b, %eax
+. 5377 0x12345678 5
+. 41 0F B6 C6 C3
+
+movzbl %r14b, %ebp
+. 5378 0x12345678 5
+. 41 0F B6 EE C3
+
+movzbl %r14b, %ebx
+. 5379 0x12345678 5
+. 41 0F B6 DE C3
+
+movzbl %r14b, %edi
+. 5380 0x12345678 5
+. 41 0F B6 FE C3
+
+movzbl %r14b, %esi
+. 5381 0x12345678 5
+. 41 0F B6 F6 C3
+
+movzbl %r14b, %r14d
+. 5382 0x12345678 5
+. 45 0F B6 F6 C3
+
+movzbl %r15b, %ebx
+. 5383 0x12345678 5
+. 41 0F B6 DF C3
+
+movzbl %r15b, %ecx
+. 5384 0x12345678 5
+. 41 0F B6 CF C3
+
+movzbl %r15b, %edi
+. 5385 0x12345678 5
+. 41 0F B6 FF C3
+
+movzbl %r15b, %edx
+. 5386 0x12345678 5
+. 41 0F B6 D7 C3
+
+movzbl %r15b, %esi
+. 5387 0x12345678 5
+. 41 0F B6 F7 C3
+
+movzbl %r15b, %r12d
+. 5388 0x12345678 5
+. 45 0F B6 E7 C3
+
+movzbl %r8b, %r8d
+. 5389 0x12345678 5
+. 45 0F B6 C0 C3
+
+movzbl %r9b, %edx
+. 5390 0x12345678 5
+. 41 0F B6 D1 C3
+
+movzbl %r9b, %r9d
+. 5391 0x12345678 5
+. 45 0F B6 C9 C3
+
+movzbl (%rax,%rcx), %eax
+. 5392 0x12345678 5
+. 0F B6 04 08 C3
+
+movzbl (%rax,%rdx), %eax
+. 5393 0x12345678 5
+. 0F B6 04 10 C3
+
+movzbl (%rax,%rdx), %esi
+. 5394 0x12345678 5
+. 0F B6 34 10 C3
+
+movzbl (%rcx,%r12), %eax
+. 5395 0x12345678 6
+. 42 0F B6 04 21 C3
+
+movzbl (%rcx,%r12), %edx
+. 5396 0x12345678 6
+. 42 0F B6 14 21 C3
+
+movzbl (%rdi), %ecx
+. 5397 0x12345678 4
+. 0F B6 0F C3
+
+movzbl (%rdi,%rax), %eax
+. 5398 0x12345678 5
+. 0F B6 04 07 C3
+
+movzbl (%rdi,%rcx), %edx
+. 5399 0x12345678 5
+. 0F B6 14 0F C3
+
+movzbl (%rdi,%rdx), %edx
+. 5400 0x12345678 5
+. 0F B6 14 17 C3
+
+movzbl (%rdx), %eax
+. 5401 0x12345678 4
+. 0F B6 02 C3
+
+movzbl (%rdx,%rcx), %edx
+. 5402 0x12345678 5
+. 0F B6 14 0A C3
+
+movzbl (%rsi), %edx
+. 5403 0x12345678 4
+. 0F B6 16 C3
+
+movzbl (%rsi,%rdx), %edx
+. 5404 0x12345678 5
+. 0F B6 14 16 C3
+
+movzbl %sil, %edx
+. 5405 0x12345678 5
+. 40 0F B6 D6 C3
+
+movzbl %sil, %esi
+. 5406 0x12345678 5
+. 40 0F B6 F6 C3
+
+movzbl 6776(%rax), %eax
+. 5407 0x12345678 8
+. 0F B6 80 78 1A 00 00 C3
+
+movzbl 78(%rip), %eax
+. 5408 0x12345678 8
+. 0F B6 05 4E 00 00 00 C3
+
+movzbl 79(%rip), %ecx
+. 5409 0x12345678 8
+. 0F B6 0D 4F 00 00 00 C3
+
+movzbl 81(%rip), %esi
+. 5410 0x12345678 8
+. 0F B6 35 51 00 00 00 C3
+
+movzbl 83(%rip), %r8d
+. 5411 0x12345678 9
+. 44 0F B6 05 53 00 00 00 C3
+
+movzbq 32(%rsp), %rdi
+. 5412 0x12345678 7
+. 48 0F B6 7C 24 20 C3
+
+movzbq 64(%rsp), %rdi
+. 5413 0x12345678 7
+. 48 0F B6 7C 24 40 C3
+
+movzbq 96(%rsp), %rdi
+. 5414 0x12345678 7
+. 48 0F B6 7C 24 60 C3
+
+movzwl 24(%r12), %ebp
+. 5415 0x12345678 7
+. 41 0F B7 6C 24 18 C3
+
+movzwl 30(%r12), %ecx
+. 5416 0x12345678 7
+. 41 0F B7 4C 24 1E C3
+
+movzwl 30(%rbx), %eax
+. 5417 0x12345678 5
+. 0F B7 43 1E C3
+
+movzwl 30(%rcx), %eax
+. 5418 0x12345678 5
+. 0F B7 41 1E C3
+
+movzwl 8(%rax), %edi
+. 5419 0x12345678 5
+. 0F B7 78 08 C3
+
+movzwl 8(%rdi), %edi
+. 5420 0x12345678 5
+. 0F B7 7F 08 C3
+
+movzwl 8(%rdi), %esi
+. 5421 0x12345678 5
+. 0F B7 77 08 C3
+
+movzwl 8(%rsi), %eax
+. 5422 0x12345678 5
+. 0F B7 46 08 C3
+
+movzwl %ax, %eax
+. 5423 0x12345678 4
+. 0F B7 C0 C3
+
+movzwl %ax, %edx
+. 5424 0x12345678 4
+. 0F B7 D0 C3
+
+movzwl %ax,%edx
+. 5425 0x12345678 4
+. 0F B7 D0 C3
+
+movzwl %ax,%r14d
+. 5426 0x12345678 5
+. 44 0F B7 F0 C3
+
+movzwl %bp,%eax
+. 5427 0x12345678 4
+. 0F B7 C5 C3
+
+movzwl %cx, %eax
+. 5428 0x12345678 4
+. 0F B7 C1 C3
+
+movzwl %cx, %ecx
+. 5429 0x12345678 4
+. 0F B7 C9 C3
+
+movzwl %di, %edi
+. 5430 0x12345678 4
+. 0F B7 FF C3
+
+movzwl %dx, %edx
+. 5431 0x12345678 4
+. 0F B7 D2 C3
+
+movzwl (%r14,%rbx,4), %eax
+. 5432 0x12345678 6
+. 41 0F B7 04 9E C3
+
+movzwl %r15w,%eax
+. 5433 0x12345678 5
+. 41 0F B7 C7 C3
+
+movzwl %r8w, %ecx
+. 5434 0x12345678 5
+. 41 0F B7 C8 C3
+
+movzwl %r8w, %r8d
+. 5435 0x12345678 5
+. 45 0F B7 C0 C3
+
+movzwl (%rbx,%rax), %edx
+. 5436 0x12345678 5
+. 0F B7 14 03 C3
+
+movzwl (%rdi,%rbx,4), %eax
+. 5437 0x12345678 5
+. 0F B7 04 9F C3
+
+movzwl %si, %edi
+. 5438 0x12345678 4
+. 0F B7 FE C3
+
+movzwl %si, %esi
+. 5439 0x12345678 4
+. 0F B7 F6 C3
+
+movzwq 2(%rax,%rbx,8), %rdi
+. 5440 0x12345678 7
+. 48 0F B7 7C D8 02 C3
+
+movzwq 30(%r14), %rdx
+. 5441 0x12345678 6
+. 49 0F B7 56 1E C3
+
+movzwq 30(%rbx), %rdx
+. 5442 0x12345678 6
+. 48 0F B7 53 1E C3
+
+movzwq (%rax,%rbx,8), %rsi
+. 5443 0x12345678 6
+. 48 0F B7 34 D8 C3
+
+negl %eax
+. 5444 0x12345678 3
+. F7 D8 C3
+
+negl %edi
+. 5445 0x12345678 3
+. F7 DF C3
+
+negq %rsi
+. 5446 0x12345678 4
+. 48 F7 DE C3
+
+notl %eax
+. 5447 0x12345678 3
+. F7 D0 C3
+
+notl %ecx
+. 5448 0x12345678 3
+. F7 D1 C3
+
+notl %edi
+. 5449 0x12345678 3
+. F7 D7 C3
+
+notl %edx
+. 5450 0x12345678 3
+. F7 D2 C3
+
+notl %esi
+. 5451 0x12345678 3
+. F7 D6 C3
+
+notl %r10d
+. 5452 0x12345678 4
+. 41 F7 D2 C3
+
+notl %r8d
+. 5453 0x12345678 4
+. 41 F7 D0 C3
+
+notl %r9d
+. 5454 0x12345678 4
+. 41 F7 D1 C3
+
+notq %rdi
+. 5455 0x12345678 4
+. 48 F7 D7 C3
+
+orb $-128, %r14b
+. 5456 0x12345678 5
+. 41 80 CE 80 C3
+
+orb 46(%rsp), %al
+. 5457 0x12345678 5
+. 0A 44 24 2E C3
+
+orb 8(%rdx), %dil
+. 5458 0x12345678 5
+. 40 0A 7A 08 C3
+
+orb %cl, %al
+. 5459 0x12345678 3
+. 08 C8 C3
+
+orb %cl, %dl
+. 5460 0x12345678 3
+. 08 CA C3
+
+orb %dl, %al
+. 5461 0x12345678 3
+. 08 D0 C3
+
+orb %r12b, %al
+. 5462 0x12345678 4
+. 44 08 E0 C3
+
+orl $1024, %r14d
+. 5463 0x12345678 8
+. 41 81 CE 00 04 00 00 C3
+
+orl $1090519040, %eax
+. 5464 0x12345678 6
+. 0D 00 00 00 41 C3
+
+orl $1090519040, %edx
+. 5465 0x12345678 7
+. 81 CA 00 00 00 41 C3
+
+orl $1, 28(%rsp)
+. 5466 0x12345678 6
+. 83 4C 24 1C 01 C3
+
+orl $16, 28(%rsp)
+. 5467 0x12345678 6
+. 83 4C 24 1C 10 C3
+
+orl $16384, %r14d
+. 5468 0x12345678 8
+. 41 81 CE 00 40 00 00 C3
+
+orl $16, %eax
+. 5469 0x12345678 4
+. 83 C8 10 C3
+
+orl $1, %edx
+. 5470 0x12345678 4
+. 83 CA 01 C3
+
+orl $1, %r14d
+. 5471 0x12345678 5
+. 41 83 CE 01 C3
+
+orl $2048, %r14d
+. 5472 0x12345678 8
+. 41 81 CE 00 08 00 00 C3
+
+orl $2, 28(%rsp)
+. 5473 0x12345678 6
+. 83 4C 24 1C 02 C3
+
+orl $256, %r14d
+. 5474 0x12345678 8
+. 41 81 CE 00 01 00 00 C3
+
+orl $2, %edx
+. 5475 0x12345678 4
+. 83 CA 02 C3
+
+orl $2, %r14d
+. 5476 0x12345678 5
+. 41 83 CE 02 C3
+
+orl $32768, %r14d
+. 5477 0x12345678 8
+. 41 81 CE 00 80 00 00 C3
+
+orl $32, %eax
+. 5478 0x12345678 4
+. 83 C8 20 C3
+
+orl $4096, %r14d
+. 5479 0x12345678 8
+. 41 81 CE 00 10 00 00 C3
+
+orl $4, 28(%rsp)
+. 5480 0x12345678 6
+. 83 4C 24 1C 04 C3
+
+orl $4, %eax
+. 5481 0x12345678 4
+. 83 C8 04 C3
+
+orl $4, %r14d
+. 5482 0x12345678 5
+. 41 83 CE 04 C3
+
+orl -4(%rsp), %eax
+. 5483 0x12345678 5
+. 0B 44 24 FC C3
+
+orl $512, %r14d
+. 5484 0x12345678 8
+. 41 81 CE 00 02 00 00 C3
+
+orl $64, %eax
+. 5485 0x12345678 4
+. 83 C8 40 C3
+
+orl $8192, %r14d
+. 5486 0x12345678 8
+. 41 81 CE 00 20 00 00 C3
+
+orl $8, %eax
+. 5487 0x12345678 4
+. 83 C8 08 C3
+
+orl 8(%rdx), %edi
+. 5488 0x12345678 4
+. 0B 7A 08 C3
+
+orl %eax, %ebp
+. 5489 0x12345678 3
+. 09 C5 C3
+
+orl %eax, %ecx
+. 5490 0x12345678 3
+. 09 C1 C3
+
+orl %eax, %edi
+. 5491 0x12345678 3
+. 09 C7 C3
+
+orl %eax, %edx
+. 5492 0x12345678 3
+. 09 C2 C3
+
+orl %eax, %r12d
+. 5493 0x12345678 4
+. 41 09 C4 C3
+
+orl %ebx, %eax
+. 5494 0x12345678 3
+. 09 D8 C3
+
+orl %ebx, %ecx
+. 5495 0x12345678 3
+. 09 D9 C3
+
+orl %ebx, %edx
+. 5496 0x12345678 3
+. 09 DA C3
+
+orl %ebx, %esi
+. 5497 0x12345678 3
+. 09 DE C3
+
+orl %ecx, %eax
+. 5498 0x12345678 3
+. 09 C8 C3
+
+orl %ecx, %edx
+. 5499 0x12345678 3
+. 09 CA C3
+
+orl %ecx, %esi
+. 5500 0x12345678 3
+. 09 CE C3
+
+orl %edi, %eax
+. 5501 0x12345678 3
+. 09 F8 C3
+
+orl %edi, %ecx
+. 5502 0x12345678 3
+. 09 F9 C3
+
+orl %edi, %edx
+. 5503 0x12345678 3
+. 09 FA C3
+
+orl %edi, %esi
+. 5504 0x12345678 3
+. 09 FE C3
+
+orl %edx, -20(%rsp)
+. 5505 0x12345678 5
+. 09 54 24 EC C3
+
+orl %edx, -8(%rsp)
+. 5506 0x12345678 5
+. 09 54 24 F8 C3
+
+orl %edx, %eax
+. 5507 0x12345678 3
+. 09 D0 C3
+
+orl %edx, %ecx
+. 5508 0x12345678 3
+. 09 D1 C3
+
+orl %edx, %edi
+. 5509 0x12345678 3
+. 09 D7 C3
+
+orl %esi, %eax
+. 5510 0x12345678 3
+. 09 F0 C3
+
+orl %esi, %ecx
+. 5511 0x12345678 3
+. 09 F1 C3
+
+orl %esi, %edi
+. 5512 0x12345678 3
+. 09 F7 C3
+
+orl %esi, %edx
+. 5513 0x12345678 3
+. 09 F2 C3
+
+orl %r10d, %eax
+. 5514 0x12345678 4
+. 44 09 D0 C3
+
+orl %r11d, %eax
+. 5515 0x12345678 4
+. 44 09 D8 C3
+
+orl %r11d, %ecx
+. 5516 0x12345678 4
+. 44 09 D9 C3
+
+orl %r11d, %edx
+. 5517 0x12345678 4
+. 44 09 DA C3
+
+orl %r12d, %eax
+. 5518 0x12345678 4
+. 44 09 E0 C3
+
+orl %r12d, %edi
+. 5519 0x12345678 4
+. 44 09 E7 C3
+
+orl %r13d, %eax
+. 5520 0x12345678 4
+. 44 09 E8 C3
+
+orl %r15d, %eax
+. 5521 0x12345678 4
+. 44 09 F8 C3
+
+orl %r15d, %edx
+. 5522 0x12345678 4
+. 44 09 FA C3
+
+orl %r8d, %eax
+. 5523 0x12345678 4
+. 44 09 C0 C3
+
+orl %r8d, %edi
+. 5524 0x12345678 4
+. 44 09 C7 C3
+
+orl %r9d, %eax
+. 5525 0x12345678 4
+. 44 09 C8 C3
+
+orl %r9d, %ecx
+. 5526 0x12345678 4
+. 44 09 C9 C3
+
+orq 272(%rsp), %rcx
+. 5527 0x12345678 9
+. 48 0B 8C 24 10 01 00 00 C3
+
+orq %rax, %rdi
+. 5528 0x12345678 4
+. 48 09 C7 C3
+
+orq %rcx, %rax
+. 5529 0x12345678 4
+. 48 09 C8 C3
+
+orq %rdi, %rax
+. 5530 0x12345678 4
+. 48 09 F8 C3
+
+orq %rdx, %rax
+. 5531 0x12345678 4
+. 48 09 D0 C3
+
+orq %rsi, %rax
+. 5532 0x12345678 4
+. 48 09 F0 C3
+
+orq %rsi, %rdi
+. 5533 0x12345678 4
+. 48 09 F7 C3
+
+orw 8(%rdx), %di
+. 5534 0x12345678 5
+. 66 0B 7A 08 C3
+
+popq %r12
+. 5535 0x12345678 3
+. 41 5C C3
+
+popq %r13
+. 5536 0x12345678 3
+. 41 5D C3
+
+popq %r14
+. 5537 0x12345678 3
+. 41 5E C3
+
+popq %r15
+. 5538 0x12345678 3
+. 41 5F C3
+
+popq %rbp
+. 5539 0x12345678 2
+. 5D C3
+
+popq %rbx
+. 5540 0x12345678 2
+. 5B C3
+
+pushq %r12
+. 5541 0x12345678 3
+. 41 54 C3
+
+pushq %r13
+. 5542 0x12345678 3
+. 41 55 C3
+
+pushq %r14
+. 5543 0x12345678 3
+. 41 56 C3
+
+pushq %r15
+. 5544 0x12345678 3
+. 41 57 C3
+
+pushq %rbp
+. 5545 0x12345678 2
+. 55 C3
+
+pushq %rbx
+. 5546 0x12345678 2
+. 53 C3
+
+rep ; ret
+. 5547 0x12345678 2
+. F3 C3
+
+ret
+. 5548 0x12345678 1
+. C3
+
+rorl %cl, %r12d
+. 5549 0x12345678 4
+. 41 D3 CC C3
+
+sall $10, %edi
+. 5550 0x12345678 4
+. C1 E7 0A C3
+
+sall $15, %esi
+. 5551 0x12345678 4
+. C1 E6 0F C3
+
+sall $15, %r8d
+. 5552 0x12345678 5
+. 41 C1 E0 0F C3
+
+sall $16, %eax
+. 5553 0x12345678 4
+. C1 E0 10 C3
+
+sall $16, %ebp
+. 5554 0x12345678 4
+. C1 E5 10 C3
+
+sall $16, %ebx
+. 5555 0x12345678 4
+. C1 E3 10 C3
+
+sall $16, %ecx
+. 5556 0x12345678 4
+. C1 E1 10 C3
+
+sall $16, %edi
+. 5557 0x12345678 4
+. C1 E7 10 C3
+
+sall $16, %edx
+. 5558 0x12345678 4
+. C1 E2 10 C3
+
+sall $16, %esi
+. 5559 0x12345678 4
+. C1 E6 10 C3
+
+sall $16, %r11d
+. 5560 0x12345678 5
+. 41 C1 E3 10 C3
+
+sall $16, %r12d
+. 5561 0x12345678 5
+. 41 C1 E4 10 C3
+
+sall $16, %r8d
+. 5562 0x12345678 5
+. 41 C1 E0 10 C3
+
+sall $16, %r9d
+. 5563 0x12345678 5
+. 41 C1 E1 10 C3
+
+sall $24, %eax
+. 5564 0x12345678 4
+. C1 E0 18 C3
+
+sall $24, %ecx
+. 5565 0x12345678 4
+. C1 E1 18 C3
+
+sall $24, %edi
+. 5566 0x12345678 4
+. C1 E7 18 C3
+
+sall $24, %edx
+. 5567 0x12345678 4
+. C1 E2 18 C3
+
+sall $24, %esi
+. 5568 0x12345678 4
+. C1 E6 18 C3
+
+sall $25, %edi
+. 5569 0x12345678 4
+. C1 E7 19 C3
+
+sall $2, %edi
+. 5570 0x12345678 4
+. C1 E7 02 C3
+
+sall $3, %edi
+. 5571 0x12345678 4
+. C1 E7 03 C3
+
+sall $3, %edx
+. 5572 0x12345678 4
+. C1 E2 03 C3
+
+sall $7, %eax
+. 5573 0x12345678 4
+. C1 E0 07 C3
+
+sall $7, %edi
+. 5574 0x12345678 4
+. C1 E7 07 C3
+
+sall $7, %r10d
+. 5575 0x12345678 5
+. 41 C1 E2 07 C3
+
+sall $8, -4(%rsp)
+. 5576 0x12345678 6
+. C1 64 24 FC 08 C3
+
+sall $8, %eax
+. 5577 0x12345678 4
+. C1 E0 08 C3
+
+sall $8, %ebp
+. 5578 0x12345678 4
+. C1 E5 08 C3
+
+sall $8, %ebx
+. 5579 0x12345678 4
+. C1 E3 08 C3
+
+sall $8, %edi
+. 5580 0x12345678 4
+. C1 E7 08 C3
+
+sall $8, %edx
+. 5581 0x12345678 4
+. C1 E2 08 C3
+
+sall $8, %r8d
+. 5582 0x12345678 5
+. 41 C1 E0 08 C3
+
+sall $8, %r9d
+. 5583 0x12345678 5
+. 41 C1 E1 08 C3
+
+sall %cl, %eax
+. 5584 0x12345678 3
+. D3 E0 C3
+
+sall %cl, %edi
+. 5585 0x12345678 3
+. D3 E7 C3
+
+sall %cl, %edx
+. 5586 0x12345678 3
+. D3 E2 C3
+
+sall %cl, %esi
+. 5587 0x12345678 3
+. D3 E6 C3
+
+sall %cl, %r9d
+. 5588 0x12345678 4
+. 41 D3 E1 C3
+
+salq $2, %rax
+. 5589 0x12345678 5
+. 48 C1 E0 02 C3
+
+salq $2, %rbx
+. 5590 0x12345678 5
+. 48 C1 E3 02 C3
+
+salq $2, %rdi
+. 5591 0x12345678 5
+. 48 C1 E7 02 C3
+
+salq $2, %rdx
+. 5592 0x12345678 5
+. 48 C1 E2 02 C3
+
+salq $32, %rax
+. 5593 0x12345678 5
+. 48 C1 E0 20 C3
+
+salq $32, %rdi
+. 5594 0x12345678 5
+. 48 C1 E7 20 C3
+
+salq $3, %rdi
+. 5595 0x12345678 5
+. 48 C1 E7 03 C3
+
+salq $4, %rdi
+. 5596 0x12345678 5
+. 48 C1 E7 04 C3
+
+sarl $11, %eax
+. 5597 0x12345678 4
+. C1 F8 0B C3
+
+sarl $16, %eax
+. 5598 0x12345678 4
+. C1 F8 10 C3
+
+sarl $16, %ecx
+. 5599 0x12345678 4
+. C1 F9 10 C3
+
+sarl $16, %edx
+. 5600 0x12345678 4
+. C1 FA 10 C3
+
+sarl $21, %edi
+. 5601 0x12345678 4
+. C1 FF 15 C3
+
+sarl $24, %eax
+. 5602 0x12345678 4
+. C1 F8 18 C3
+
+sarl $24, %edx
+. 5603 0x12345678 4
+. C1 FA 18 C3
+
+sarl $24, %esi
+. 5604 0x12345678 4
+. C1 FE 18 C3
+
+sarl $2, %eax
+. 5605 0x12345678 4
+. C1 F8 02 C3
+
+sarl $3, %eax
+. 5606 0x12345678 4
+. C1 F8 03 C3
+
+sarl $4, %eax
+. 5607 0x12345678 4
+. C1 F8 04 C3
+
+sarl $6, %ebp
+. 5608 0x12345678 4
+. C1 FD 06 C3
+
+sarl $6, %edx
+. 5609 0x12345678 4
+. C1 FA 06 C3
+
+sarl $8, %edi
+. 5610 0x12345678 4
+. C1 FF 08 C3
+
+sarl $9, %edi
+. 5611 0x12345678 4
+. C1 FF 09 C3
+
+sarl %cl, %eax
+. 5612 0x12345678 3
+. D3 F8 C3
+
+sarl %cl, %edi
+. 5613 0x12345678 3
+. D3 FF C3
+
+sarl %cl, %edx
+. 5614 0x12345678 3
+. D3 FA C3
+
+sarl %cl, %r8d
+. 5615 0x12345678 4
+. 41 D3 F8 C3
+
+sarl %eax
+. 5616 0x12345678 3
+. D1 F8 C3
+
+sarl %edi
+. 5617 0x12345678 3
+. D1 FF C3
+
+sbbl %eax, %eax
+. 5618 0x12345678 3
+. 19 C0 C3
+
+sbbl %ebp, %ebp
+. 5619 0x12345678 3
+. 19 ED C3
+
+sbbl %ebx, %ebx
+. 5620 0x12345678 3
+. 19 DB C3
+
+sbbl %ecx, %ecx
+. 5621 0x12345678 3
+. 19 C9 C3
+
+sbbl %edi, %edi
+. 5622 0x12345678 3
+. 19 FF C3
+
+sbbl %edx, %edx
+. 5623 0x12345678 3
+. 19 D2 C3
+
+sbbl %esi, %esi
+. 5624 0x12345678 3
+. 19 F6 C3
+
+sbbl %r10d, %r10d
+. 5625 0x12345678 4
+. 45 19 D2 C3
+
+sbbl %r12d, %r12d
+. 5626 0x12345678 4
+. 45 19 E4 C3
+
+sbbl %r13d, %r13d
+. 5627 0x12345678 4
+. 45 19 ED C3
+
+sbbl %r8d, %r8d
+. 5628 0x12345678 4
+. 45 19 C0 C3
+
+sbbl %r9d, %r9d
+. 5629 0x12345678 4
+. 45 19 C9 C3
+
+sbbq %rdi, %rdi
+. 5630 0x12345678 4
+. 48 19 FF C3
+
+seta %dl
+. 5631 0x12345678 4
+. 0F 97 C2 C3
+
+setb %al
+. 5632 0x12345678 4
+. 0F 92 C0 C3
+
+setb %dil
+. 5633 0x12345678 5
+. 40 0F 92 C7 C3
+
+setb %dl
+. 5634 0x12345678 4
+. 0F 92 C2 C3
+
+setbe 283(%rsp)
+. 5635 0x12345678 9
+. 0F 96 84 24 1B 01 00 00 C3
+
+setbe 46(%rsp)
+. 5636 0x12345678 6
+. 0F 96 44 24 2E C3
+
+setbe %al
+. 5637 0x12345678 4
+. 0F 96 C0 C3
+
+setbe %cl
+. 5638 0x12345678 4
+. 0F 96 C1 C3
+
+setbe %dil
+. 5639 0x12345678 5
+. 40 0F 96 C7 C3
+
+setbe %dl
+. 5640 0x12345678 4
+. 0F 96 C2 C3
+
+sete 123(%rsp)
+. 5641 0x12345678 6
+. 0F 94 44 24 7B C3
+
+sete 15(%rsp)
+. 5642 0x12345678 6
+. 0F 94 44 24 0F C3
+
+sete 171(%rsp)
+. 5643 0x12345678 9
+. 0F 94 84 24 AB 00 00 00 C3
+
+sete 183(%rsp)
+. 5644 0x12345678 9
+. 0F 94 84 24 B7 00 00 00 C3
+
+sete 239(%rsp)
+. 5645 0x12345678 9
+. 0F 94 84 24 EF 00 00 00 C3
+
+sete %al
+. 5646 0x12345678 4
+. 0F 94 C0 C3
+
+sete %dil
+. 5647 0x12345678 5
+. 40 0F 94 C7 C3
+
+sete %dl
+. 5648 0x12345678 4
+. 0F 94 C2 C3
+
+sete %r12b
+. 5649 0x12345678 5
+. 41 0F 94 C4 C3
+
+sete %r13b
+. 5650 0x12345678 5
+. 41 0F 94 C5 C3
+
+sete %r15b
+. 5651 0x12345678 5
+. 41 0F 94 C7 C3
+
+sete %sil
+. 5652 0x12345678 5
+. 40 0F 94 C6 C3
+
+setge %al
+. 5653 0x12345678 4
+. 0F 9D C0 C3
+
+setge %dl
+. 5654 0x12345678 4
+. 0F 9D C2 C3
+
+setl 115(%rsp)
+. 5655 0x12345678 6
+. 0F 9C 44 24 73 C3
+
+setl %dil
+. 5656 0x12345678 5
+. 40 0F 9C C7 C3
+
+setle %al
+. 5657 0x12345678 4
+. 0F 9E C0 C3
+
+setle %dil
+. 5658 0x12345678 5
+. 40 0F 9E C7 C3
+
+setne %al
+. 5659 0x12345678 4
+. 0F 95 C0 C3
+
+setne %cl
+. 5660 0x12345678 4
+. 0F 95 C1 C3
+
+setne %dil
+. 5661 0x12345678 5
+. 40 0F 95 C7 C3
+
+setne %dl
+. 5662 0x12345678 4
+. 0F 95 C2 C3
+
+setne %r13b
+. 5663 0x12345678 5
+. 41 0F 95 C5 C3
+
+setne %sil
+. 5664 0x12345678 5
+. 40 0F 95 C6 C3
+
+setnp %dl
+. 5665 0x12345678 4
+. 0F 9B C2 C3
+
+sets %al
+. 5666 0x12345678 4
+. 0F 98 C0 C3
+
+shrb $2, %al
+. 5667 0x12345678 4
+. C0 E8 02 C3
+
+shrb $3, %al
+. 5668 0x12345678 4
+. C0 E8 03 C3
+
+shrb $3, %cl
+. 5669 0x12345678 4
+. C0 E9 03 C3
+
+shrb $3, %dil
+. 5670 0x12345678 5
+. 40 C0 EF 03 C3
+
+shrb $3, %dl
+. 5671 0x12345678 4
+. C0 EA 03 C3
+
+shrb $4, %al
+. 5672 0x12345678 4
+. C0 E8 04 C3
+
+shrb $4, %cl
+. 5673 0x12345678 4
+. C0 E9 04 C3
+
+shrb $6, %dl
+. 5674 0x12345678 4
+. C0 EA 06 C3
+
+shrb %al
+. 5675 0x12345678 3
+. D0 E8 C3
+
+shrb %bl
+. 5676 0x12345678 3
+. D0 EB C3
+
+shrb %dl
+. 5677 0x12345678 3
+. D0 EA C3
+
+shrl $10, %eax
+. 5678 0x12345678 4
+. C1 E8 0A C3
+
+shrl $10, %edi
+. 5679 0x12345678 4
+. C1 EF 0A C3
+
+shrl $10, %esi
+. 5680 0x12345678 4
+. C1 EE 0A C3
+
+shrl $11, %eax
+. 5681 0x12345678 4
+. C1 E8 0B C3
+
+shrl $11, %ebx
+. 5682 0x12345678 4
+. C1 EB 0B C3
+
+shrl $11, %ecx
+. 5683 0x12345678 4
+. C1 E9 0B C3
+
+shrl $12, %eax
+. 5684 0x12345678 4
+. C1 E8 0C C3
+
+shrl $12, %edx
+. 5685 0x12345678 4
+. C1 EA 0C C3
+
+shrl $13, %eax
+. 5686 0x12345678 4
+. C1 E8 0D C3
+
+shrl $14, %edi
+. 5687 0x12345678 4
+. C1 EF 0E C3
+
+shrl $16, %eax
+. 5688 0x12345678 4
+. C1 E8 10 C3
+
+shrl $16, %ebx
+. 5689 0x12345678 4
+. C1 EB 10 C3
+
+shrl $16, %ecx
+. 5690 0x12345678 4
+. C1 E9 10 C3
+
+shrl $16, %edi
+. 5691 0x12345678 4
+. C1 EF 10 C3
+
+shrl $16, %edx
+. 5692 0x12345678 4
+. C1 EA 10 C3
+
+shrl $16, %esi
+. 5693 0x12345678 4
+. C1 EE 10 C3
+
+shrl $16, %r11d
+. 5694 0x12345678 5
+. 41 C1 EB 10 C3
+
+shrl $16, %r8d
+. 5695 0x12345678 5
+. 41 C1 E8 10 C3
+
+shrl $16, %r9d
+. 5696 0x12345678 5
+. 41 C1 E9 10 C3
+
+shrl $20, %eax
+. 5697 0x12345678 4
+. C1 E8 14 C3
+
+shrl $20, %ebx
+. 5698 0x12345678 4
+. C1 EB 14 C3
+
+shrl $20, %edx
+. 5699 0x12345678 4
+. C1 EA 14 C3
+
+shrl $20, %r12d
+. 5700 0x12345678 5
+. 41 C1 EC 14 C3
+
+shrl $21, %eax
+. 5701 0x12345678 4
+. C1 E8 15 C3
+
+shrl $21, %ebp
+. 5702 0x12345678 4
+. C1 ED 15 C3
+
+shrl $21, %edi
+. 5703 0x12345678 4
+. C1 EF 15 C3
+
+shrl $22, %ebp
+. 5704 0x12345678 4
+. C1 ED 16 C3
+
+shrl $24, %eax
+. 5705 0x12345678 4
+. C1 E8 18 C3
+
+shrl $24, %ecx
+. 5706 0x12345678 4
+. C1 E9 18 C3
+
+shrl $24, %edi
+. 5707 0x12345678 4
+. C1 EF 18 C3
+
+shrl $24, %edx
+. 5708 0x12345678 4
+. C1 EA 18 C3
+
+shrl $24, %esi
+. 5709 0x12345678 4
+. C1 EE 18 C3
+
+shrl $25, %eax
+. 5710 0x12345678 4
+. C1 E8 19 C3
+
+shrl $25, %ebx
+. 5711 0x12345678 4
+. C1 EB 19 C3
+
+shrl $26, %eax
+. 5712 0x12345678 4
+. C1 E8 1A C3
+
+shrl $28, %ebp
+. 5713 0x12345678 4
+. C1 ED 1C C3
+
+shrl $28, %ecx
+. 5714 0x12345678 4
+. C1 E9 1C C3
+
+shrl $28, %edi
+. 5715 0x12345678 4
+. C1 EF 1C C3
+
+shrl $28, %edx
+. 5716 0x12345678 4
+. C1 EA 1C C3
+
+shrl $28, %esi
+. 5717 0x12345678 4
+. C1 EE 1C C3
+
+shrl $28, %r15d
+. 5718 0x12345678 5
+. 41 C1 EF 1C C3
+
+shrl $2, %eax
+. 5719 0x12345678 4
+. C1 E8 02 C3
+
+shrl $31, %eax
+. 5720 0x12345678 4
+. C1 E8 1F C3
+
+shrl $31, %ecx
+. 5721 0x12345678 4
+. C1 E9 1F C3
+
+shrl $31, %edi
+. 5722 0x12345678 4
+. C1 EF 1F C3
+
+shrl $31, %edx
+. 5723 0x12345678 4
+. C1 EA 1F C3
+
+shrl $3, %ebp
+. 5724 0x12345678 4
+. C1 ED 03 C3
+
+shrl $3, %edx
+. 5725 0x12345678 4
+. C1 EA 03 C3
+
+shrl $3, %r12d
+. 5726 0x12345678 5
+. 41 C1 EC 03 C3
+
+shrl $4, %eax
+. 5727 0x12345678 4
+. C1 E8 04 C3
+
+shrl $4, %edi
+. 5728 0x12345678 4
+. C1 EF 04 C3
+
+shrl $4, %edx
+. 5729 0x12345678 4
+. C1 EA 04 C3
+
+shrl $4, %r13d
+. 5730 0x12345678 5
+. 41 C1 ED 04 C3
+
+shrl $5, %eax
+. 5731 0x12345678 4
+. C1 E8 05 C3
+
+shrl $6, %eax
+. 5732 0x12345678 4
+. C1 E8 06 C3
+
+shrl $6, %ecx
+. 5733 0x12345678 4
+. C1 E9 06 C3
+
+shrl $6, %edi
+. 5734 0x12345678 4
+. C1 EF 06 C3
+
+shrl $7, %eax
+. 5735 0x12345678 4
+. C1 E8 07 C3
+
+shrl $7, %ecx
+. 5736 0x12345678 4
+. C1 E9 07 C3
+
+shrl $8, %eax
+. 5737 0x12345678 4
+. C1 E8 08 C3
+
+shrl $8, %ecx
+. 5738 0x12345678 4
+. C1 E9 08 C3
+
+shrl $8, %edx
+. 5739 0x12345678 4
+. C1 EA 08 C3
+
+shrl $8, %r13d
+. 5740 0x12345678 5
+. 41 C1 ED 08 C3
+
+shrl $8, %r8d
+. 5741 0x12345678 5
+. 41 C1 E8 08 C3
+
+shrl $8, %r9d
+. 5742 0x12345678 5
+. 41 C1 E9 08 C3
+
+shrl $9, %eax
+. 5743 0x12345678 4
+. C1 E8 09 C3
+
+shrl $9, %edi
+. 5744 0x12345678 4
+. C1 EF 09 C3
+
+shrl %cl, %eax
+. 5745 0x12345678 3
+. D3 E8 C3
+
+shrl %cl, %edi
+. 5746 0x12345678 3
+. D3 EF C3
+
+shrl %eax
+. 5747 0x12345678 3
+. D1 E8 C3
+
+shrl %ebx
+. 5748 0x12345678 3
+. D1 EB C3
+
+shrl %ecx
+. 5749 0x12345678 3
+. D1 E9 C3
+
+shrl %edi
+. 5750 0x12345678 3
+. D1 EF C3
+
+shrl %edx
+. 5751 0x12345678 3
+. D1 EA C3
+
+shrl %r11d
+. 5752 0x12345678 4
+. 41 D1 EB C3
+
+shrl %r12d
+. 5753 0x12345678 4
+. 41 D1 EC C3
+
+shrl %r8d
+. 5754 0x12345678 4
+. 41 D1 E8 C3
+
+shrq $32, %r10
+. 5755 0x12345678 5
+. 49 C1 EA 20 C3
+
+shrq $32, %r11
+. 5756 0x12345678 5
+. 49 C1 EB 20 C3
+
+shrq $32, %r8
+. 5757 0x12345678 5
+. 49 C1 E8 20 C3
+
+shrq $32, %r9
+. 5758 0x12345678 5
+. 49 C1 E9 20 C3
+
+shrq $32, %rax
+. 5759 0x12345678 5
+. 48 C1 E8 20 C3
+
+shrq $32, %rbx
+. 5760 0x12345678 5
+. 48 C1 EB 20 C3
+
+shrq $32, %rcx
+. 5761 0x12345678 5
+. 48 C1 E9 20 C3
+
+shrq $32, %rdi
+. 5762 0x12345678 5
+. 48 C1 EF 20 C3
+
+shrq $32, %rdx
+. 5763 0x12345678 5
+. 48 C1 EA 20 C3
+
+shrq $32, %rsi
+. 5764 0x12345678 5
+. 48 C1 EE 20 C3
+
+shrq $63, %rax
+. 5765 0x12345678 5
+. 48 C1 E8 3F C3
+
+subb 8(%rdx), %dil
+. 5766 0x12345678 5
+. 40 2A 7A 08 C3
+
+subb %bl, %cl
+. 5767 0x12345678 3
+. 28 D9 C3
+
+subb %cl, %bl
+. 5768 0x12345678 3
+. 28 CB C3
+
+subb %dl, %al
+. 5769 0x12345678 3
+. 28 D0 C3
+
+subb %dl, %dil
+. 5770 0x12345678 4
+. 40 28 D7 C3
+
+subb %dl, %r8b
+. 5771 0x12345678 4
+. 41 28 D0 C3
+
+subb %dl, %sil
+. 5772 0x12345678 4
+. 40 28 D6 C3
+
+subl $100, %eax
+. 5773 0x12345678 4
+. 83 E8 64 C3
+
+subl $12, %eax
+. 5774 0x12345678 4
+. 83 E8 0C C3
+
+subl $144, %eax
+. 5775 0x12345678 6
+. 2D 90 00 00 00 C3
+
+subl $144, %ebx
+. 5776 0x12345678 7
+. 81 EB 90 00 00 00 C3
+
+subl $192, %eax
+. 5777 0x12345678 6
+. 2D C0 00 00 00 C3
+
+subl $192, %ecx
+. 5778 0x12345678 7
+. 81 E9 C0 00 00 00 C3
+
+subl $192, %edx
+. 5779 0x12345678 7
+. 81 EA C0 00 00 00 C3
+
+subl $200, %ecx
+. 5780 0x12345678 7
+. 81 E9 C8 00 00 00 C3
+
+subl $200, %edx
+. 5781 0x12345678 7
+. 81 EA C8 00 00 00 C3
+
+subl $208, %eax
+. 5782 0x12345678 6
+. 2D D0 00 00 00 C3
+
+subl $20, %eax
+. 5783 0x12345678 4
+. 83 E8 14 C3
+
+subl $224, %eax
+. 5784 0x12345678 6
+. 2D E0 00 00 00 C3
+
+subl $224, %ecx
+. 5785 0x12345678 7
+. 81 E9 E0 00 00 00 C3
+
+subl $224, %edx
+. 5786 0x12345678 7
+. 81 EA E0 00 00 00 C3
+
+subl $232, %ecx
+. 5787 0x12345678 7
+. 81 E9 E8 00 00 00 C3
+
+subl $232, %edi
+. 5788 0x12345678 7
+. 81 EF E8 00 00 00 C3
+
+subl $232, %edx
+. 5789 0x12345678 7
+. 81 EA E8 00 00 00 C3
+
+subl $240, %ecx
+. 5790 0x12345678 7
+. 81 E9 F0 00 00 00 C3
+
+subl $240, %edi
+. 5791 0x12345678 7
+. 81 EF F0 00 00 00 C3
+
+subl $240, %edx
+. 5792 0x12345678 7
+. 81 EA F0 00 00 00 C3
+
+subl $248, %ecx
+. 5793 0x12345678 7
+. 81 E9 F8 00 00 00 C3
+
+subl $248, %edx
+. 5794 0x12345678 7
+. 81 EA F8 00 00 00 C3
+
+subl 292(%rsp), %ebp
+. 5795 0x12345678 8
+. 2B AC 24 24 01 00 00 C3
+
+subl $2, %eax
+. 5796 0x12345678 4
+. 83 E8 02 C3
+
+subl $3, %edx
+. 5797 0x12345678 4
+. 83 EA 03 C3
+
+subl $44, %eax
+. 5798 0x12345678 4
+. 83 E8 2C C3
+
+subl $46, %eax
+. 5799 0x12345678 4
+. 83 E8 2E C3
+
+subl $49, %eax
+. 5800 0x12345678 4
+. 83 E8 31 C3
+
+subl $4, %r9d
+. 5801 0x12345678 5
+. 41 83 E9 04 C3
+
+subl 4(%rsp), %ebp
+. 5802 0x12345678 5
+. 2B 6C 24 04 C3
+
+subl $64, %eax
+. 5803 0x12345678 4
+. 83 E8 40 C3
+
+subl $64, %ebx
+. 5804 0x12345678 4
+. 83 EB 40 C3
+
+subl $69631, %edi
+. 5805 0x12345678 7
+. 81 EF FF 0F 01 00 C3
+
+subl $69633, %eax
+. 5806 0x12345678 6
+. 2D 01 10 01 00 C3
+
+subl $69635, %eax
+. 5807 0x12345678 6
+. 2D 03 10 01 00 C3
+
+subl $73728, %eax
+. 5808 0x12345678 6
+. 2D 00 20 01 00 C3
+
+subl $77825, %eax
+. 5809 0x12345678 6
+. 2D 01 30 01 00 C3
+
+subl $77869, %eax
+. 5810 0x12345678 6
+. 2D 2D 30 01 00 C3
+
+subl $78092, %eax
+. 5811 0x12345678 6
+. 2D 0C 31 01 00 C3
+
+subl $83, %eax
+. 5812 0x12345678 4
+. 83 E8 53 C3
+
+subl $86018, %eax
+. 5813 0x12345678 6
+. 2D 02 50 01 00 C3
+
+subl 8(%rdx), %edi
+. 5814 0x12345678 4
+. 2B 7A 08 C3
+
+subl $96, %eax
+. 5815 0x12345678 4
+. 83 E8 60 C3
+
+subl %eax, %edi
+. 5816 0x12345678 3
+. 29 C7 C3
+
+subl %eax, %edx
+. 5817 0x12345678 3
+. 29 C2 C3
+
+subl %ebp, %r14d
+. 5818 0x12345678 4
+. 41 29 EE C3
+
+subl %ecx, %edx
+. 5819 0x12345678 3
+. 29 CA C3
+
+subl %ecx, %r8d
+. 5820 0x12345678 4
+. 41 29 C8 C3
+
+subl %edi, %eax
+. 5821 0x12345678 3
+. 29 F8 C3
+
+subl %edx, %eax
+. 5822 0x12345678 3
+. 29 D0 C3
+
+subl %edx, %ebx
+. 5823 0x12345678 3
+. 29 D3 C3
+
+subl %edx, %ecx
+. 5824 0x12345678 3
+. 29 D1 C3
+
+subl %edx, %edi
+. 5825 0x12345678 3
+. 29 D7 C3
+
+subl %edx, %esi
+. 5826 0x12345678 3
+. 29 D6 C3
+
+subl %edx, %r8d
+. 5827 0x12345678 4
+. 41 29 D0 C3
+
+subl %esi, %edi
+. 5828 0x12345678 3
+. 29 F7 C3
+
+subl %r10d, %ecx
+. 5829 0x12345678 4
+. 44 29 D1 C3
+
+subl %r14d, %edi
+. 5830 0x12345678 4
+. 44 29 F7 C3
+
+subl %r15d, %eax
+. 5831 0x12345678 4
+. 44 29 F8 C3
+
+subq $104, %rsp
+. 5832 0x12345678 5
+. 48 83 EC 68 C3
+
+subq $120, %rsp
+. 5833 0x12345678 5
+. 48 83 EC 78 C3
+
+subq $136, %rsp
+. 5834 0x12345678 8
+. 48 81 EC 88 00 00 00 C3
+
+subq $152, %rsp
+. 5835 0x12345678 8
+. 48 81 EC 98 00 00 00 C3
+
+subq 160(%rsp), %r15
+. 5836 0x12345678 9
+. 4C 2B BC 24 A0 00 00 00 C3
+
+subq $168, %rsp
+. 5837 0x12345678 8
+. 48 81 EC A8 00 00 00 C3
+
+subq $16, %rsp
+. 5838 0x12345678 5
+. 48 83 EC 10 C3
+
+subq $184, %rsp
+. 5839 0x12345678 8
+. 48 81 EC B8 00 00 00 C3
+
+subq $208, %rsp
+. 5840 0x12345678 8
+. 48 81 EC D0 00 00 00 C3
+
+subq $216, %rsp
+. 5841 0x12345678 8
+. 48 81 EC D8 00 00 00 C3
+
+subq $24, %rsp
+. 5842 0x12345678 5
+. 48 83 EC 18 C3
+
+subq $280, %rsp
+. 5843 0x12345678 8
+. 48 81 EC 18 01 00 00 C3
+
+subq $312, %rsp
+. 5844 0x12345678 8
+. 48 81 EC 38 01 00 00 C3
+
+subq $40, %rsp
+. 5845 0x12345678 5
+. 48 83 EC 28 C3
+
+subq $472, %rsp
+. 5846 0x12345678 8
+. 48 81 EC D8 01 00 00 C3
+
+subq $56, %rsp
+. 5847 0x12345678 5
+. 48 83 EC 38 C3
+
+subq $728, %rsp
+. 5848 0x12345678 8
+. 48 81 EC D8 02 00 00 C3
+
+subq $72, %rsp
+. 5849 0x12345678 5
+. 48 83 EC 48 C3
+
+subq $88, %rsp
+. 5850 0x12345678 5
+. 48 83 EC 58 C3
+
+subq $8, %rsp
+. 5851 0x12345678 5
+. 48 83 EC 08 C3
+
+subq $968, %rsp
+. 5852 0x12345678 8
+. 48 81 EC C8 03 00 00 C3
+
+subq %rax, %rdx
+. 5853 0x12345678 4
+. 48 29 C2 C3
+
+subw %cx, %dx
+. 5854 0x12345678 4
+. 66 29 CA C3
+
+subw %cx, %r8w
+. 5855 0x12345678 5
+. 66 41 29 C8 C3
+
+subw %dx, %ax
+. 5856 0x12345678 4
+. 66 29 D0 C3
+
+subw %si, %di
+. 5857 0x12345678 4
+. 66 29 F7 C3
+
+testb $16, 44(%rip)
+. 5858 0x12345678 8
+. F6 05 2C 00 00 00 10 C3
+
+testb $1, %al
+. 5859 0x12345678 3
+. A8 01 C3
+
+testb $1, %bl
+. 5860 0x12345678 4
+. F6 C3 01 C3
+
+testb $1, %dil
+. 5861 0x12345678 5
+. 40 F6 C7 01 C3
+
+testb $1, %r12b
+. 5862 0x12345678 5
+. 41 F6 C4 01 C3
+
+testb $1, 45(%rip)
+. 5863 0x12345678 8
+. F6 05 2D 00 00 00 01 C3
+
+testb $28, %dil
+. 5864 0x12345678 5
+. 40 F6 C7 1C C3
+
+testb $2, %al
+. 5865 0x12345678 3
+. A8 02 C3
+
+testb $2, %dl
+. 5866 0x12345678 4
+. F6 C2 02 C3
+
+testb $2, %r13b
+. 5867 0x12345678 5
+. 41 F6 C5 02 C3
+
+testb $2, %r14b
+. 5868 0x12345678 5
+. 41 F6 C6 02 C3
+
+testb $-32, %dl
+. 5869 0x12345678 4
+. F6 C2 E0 C3
+
+testb $32, 47(%rip)
+. 5870 0x12345678 8
+. F6 05 2F 00 00 00 20 C3
+
+testb $4, 28(%rsp)
+. 5871 0x12345678 6
+. F6 44 24 1C 04 C3
+
+testb $4, %al
+. 5872 0x12345678 3
+. A8 04 C3
+
+testb $4, %dil
+. 5873 0x12345678 5
+. 40 F6 C7 04 C3
+
+testb $4, %dl
+. 5874 0x12345678 4
+. F6 C2 04 C3
+
+testb $4, %r13b
+. 5875 0x12345678 5
+. 41 F6 C5 04 C3
+
+testb $4, 49(%rip)
+. 5876 0x12345678 8
+. F6 05 31 00 00 00 04 C3
+
+testb $64, 66(%rip)
+. 5877 0x12345678 8
+. F6 05 42 00 00 00 40 C3
+
+testb $7, 800(%rsp)
+. 5878 0x12345678 9
+. F6 84 24 20 03 00 00 07 C3
+
+testb $8, %al
+. 5879 0x12345678 3
+. A8 08 C3
+
+testb $8, %dl
+. 5880 0x12345678 4
+. F6 C2 08 C3
+
+testb $8, %r14b
+. 5881 0x12345678 5
+. 41 F6 C6 08 C3
+
+testb %al, %al
+. 5882 0x12345678 3
+. 84 C0 C3
+
+testb %bl, %bl
+. 5883 0x12345678 3
+. 84 DB C3
+
+testb %bpl, %bpl
+. 5884 0x12345678 4
+. 40 84 ED C3
+
+testb %cl, %cl
+. 5885 0x12345678 3
+. 84 C9 C3
+
+testb %dil, %dil
+. 5886 0x12345678 4
+. 40 84 FF C3
+
+testb %dl, %dl
+. 5887 0x12345678 3
+. 84 D2 C3
+
+testb %r11b, %r11b
+. 5888 0x12345678 4
+. 45 84 DB C3
+
+testb %r12b, %r12b
+. 5889 0x12345678 4
+. 45 84 E4 C3
+
+testb %r13b, %r13b
+. 5890 0x12345678 4
+. 45 84 ED C3
+
+testb %r14b, %r14b
+. 5891 0x12345678 4
+. 45 84 F6 C3
+
+testb %r15b, %r15b
+. 5892 0x12345678 4
+. 45 84 FF C3
+
+testb %r8b, %r8b
+. 5893 0x12345678 4
+. 45 84 C0 C3
+
+testb %sil, %sil
+. 5894 0x12345678 4
+. 40 84 F6 C3
+
+testl $1024, %edi
+. 5895 0x12345678 7
+. F7 C7 00 04 00 00 C3
+
+testl $1024, %r14d
+. 5896 0x12345678 8
+. 41 F7 C6 00 04 00 00 C3
+
+testl $16384, %edi
+. 5897 0x12345678 7
+. F7 C7 00 40 00 00 C3
+
+testl $16384, %r14d
+. 5898 0x12345678 8
+. 41 F7 C6 00 40 00 00 C3
+
+testl $16777216, %ebp
+. 5899 0x12345678 7
+. F7 C5 00 00 00 01 C3
+
+testl $16777216, %edi
+. 5900 0x12345678 7
+. F7 C7 00 00 00 01 C3
+
+testl $16777216, %edx
+. 5901 0x12345678 7
+. F7 C2 00 00 00 01 C3
+
+testl $16777216, %esi
+. 5902 0x12345678 7
+. F7 C6 00 00 00 01 C3
+
+testl $2048, %edi
+. 5903 0x12345678 7
+. F7 C7 00 08 00 00 C3
+
+testl $2048, %r14d
+. 5904 0x12345678 8
+. 41 F7 C6 00 08 00 00 C3
+
+testl $256, %r14d
+. 5905 0x12345678 8
+. 41 F7 C6 00 01 00 00 C3
+
+testl $4096, %edi
+. 5906 0x12345678 7
+. F7 C7 00 10 00 00 C3
+
+testl $4096, %r14d
+. 5907 0x12345678 8
+. 41 F7 C6 00 10 00 00 C3
+
+testl $512, %r14d
+. 5908 0x12345678 8
+. 41 F7 C6 00 02 00 00 C3
+
+testl $-65536, %eax
+. 5909 0x12345678 6
+. A9 00 00 FF FF C3
+
+testl $-65536, %ebp
+. 5910 0x12345678 7
+. F7 C5 00 00 FF FF C3
+
+testl $-65536, %ebx
+. 5911 0x12345678 7
+. F7 C3 00 00 FF FF C3
+
+testl $-65536, %r12d
+. 5912 0x12345678 8
+. 41 F7 C4 00 00 FF FF C3
+
+testl $768, %edi
+. 5913 0x12345678 7
+. F7 C7 00 03 00 00 C3
+
+testl $8192, %edi
+. 5914 0x12345678 7
+. F7 C7 00 20 00 00 C3
+
+testl $8192, %r14d
+. 5915 0x12345678 8
+. 41 F7 C6 00 20 00 00 C3
+
+testl %eax, %eax
+. 5916 0x12345678 3
+. 85 C0 C3
+
+testl %eax, %edi
+. 5917 0x12345678 3
+. 85 F8 C3
+
+testl %eax, %edx
+. 5918 0x12345678 3
+. 85 D0 C3
+
+testl %ebp, %ebp
+. 5919 0x12345678 3
+. 85 ED C3
+
+testl %ebx, %ebx
+. 5920 0x12345678 3
+. 85 DB C3
+
+testl %ecx, %ecx
+. 5921 0x12345678 3
+. 85 C9 C3
+
+testl %edi, %edi
+. 5922 0x12345678 3
+. 85 FF C3
+
+testl %edx, %edx
+. 5923 0x12345678 3
+. 85 D2 C3
+
+testl %esi, %esi
+. 5924 0x12345678 3
+. 85 F6 C3
+
+testl %r10d, %r10d
+. 5925 0x12345678 4
+. 45 85 D2 C3
+
+testl %r11d, %r11d
+. 5926 0x12345678 4
+. 45 85 DB C3
+
+testl %r12d, %r12d
+. 5927 0x12345678 4
+. 45 85 E4 C3
+
+testl %r13d, %r13d
+. 5928 0x12345678 4
+. 45 85 ED C3
+
+testl %r14d, %r14d
+. 5929 0x12345678 4
+. 45 85 F6 C3
+
+testl %r15d, %r15d
+. 5930 0x12345678 4
+. 45 85 FF C3
+
+testl %r8d, %r8d
+. 5931 0x12345678 4
+. 45 85 C0 C3
+
+testl %r9d, %r9d
+. 5932 0x12345678 4
+. 45 85 C9 C3
+
+testq %r12, %r12
+. 5933 0x12345678 4
+. 4D 85 E4 C3
+
+testq %r13, %r13
+. 5934 0x12345678 4
+. 4D 85 ED C3
+
+testq %r14, %r14
+. 5935 0x12345678 4
+. 4D 85 F6 C3
+
+testq %r15, %r15
+. 5936 0x12345678 4
+. 4D 85 FF C3
+
+testq %rax, %rax
+. 5937 0x12345678 4
+. 48 85 C0 C3
+
+testq %rbp, %rbp
+. 5938 0x12345678 4
+. 48 85 ED C3
+
+testq %rbx, %rbx
+. 5939 0x12345678 4
+. 48 85 DB C3
+
+testq %rcx, %rcx
+. 5940 0x12345678 4
+. 48 85 C9 C3
+
+testq %rdi, %rdi
+. 5941 0x12345678 4
+. 48 85 FF C3
+
+testq %rdx, %rdx
+. 5942 0x12345678 4
+. 48 85 D2 C3
+
+testq %rsi, %rsi
+. 5943 0x12345678 4
+. 48 85 F6 C3
+
+testw %ax, %ax
+. 5944 0x12345678 4
+. 66 85 C0 C3
+
+testw %bx, %bx
+. 5945 0x12345678 4
+. 66 85 DB C3
+
+testw %di, %di
+. 5946 0x12345678 4
+. 66 85 FF C3
+
+testw %dx, %dx
+. 5947 0x12345678 4
+. 66 85 D2 C3
+
+testw %r11w, %r11w
+. 5948 0x12345678 5
+. 66 45 85 DB C3
+
+testw %r14w, %r14w
+. 5949 0x12345678 5
+. 66 45 85 F6 C3
+
+testw %r8w, %r8w
+. 5950 0x12345678 5
+. 66 45 85 C0 C3
+
+testw %r9w, %r9w
+. 5951 0x12345678 5
+. 66 45 85 C9 C3
+
+testw %si, %si
+. 5952 0x12345678 4
+. 66 85 F6 C3
+
+xorb 8(%rdx), %dil
+. 5953 0x12345678 5
+. 40 32 7A 08 C3
+
+xorl $1, %eax
+. 5954 0x12345678 4
+. 83 F0 01 C3
+
+xorl $1, %edx
+. 5955 0x12345678 4
+. 83 F2 01 C3
+
+xorl 8(%rdx), %edi
+. 5956 0x12345678 4
+. 33 7A 08 C3
+
+xorl %eax, %eax
+. 5957 0x12345678 3
+. 31 C0 C3
+
+xorl %ebp, %ebp
+. 5958 0x12345678 3
+. 31 ED C3
+
+xorl %ebx, %ebx
+. 5959 0x12345678 3
+. 31 DB C3
+
+xorl %ecx, %ecx
+. 5960 0x12345678 3
+. 31 C9 C3
+
+xorl %edi, %edi
+. 5961 0x12345678 3
+. 31 FF C3
+
+xorl %edx, %ecx
+. 5962 0x12345678 3
+. 31 D1 C3
+
+xorl %edx, %edx
+. 5963 0x12345678 3
+. 31 D2 C3
+
+xorl %esi, %eax
+. 5964 0x12345678 3
+. 31 F0 C3
+
+xorl %esi, %ecx
+. 5965 0x12345678 3
+. 31 F1 C3
+
+xorl %esi, %edx
+. 5966 0x12345678 3
+. 31 F2 C3
+
+xorl %esi, %esi
+. 5967 0x12345678 3
+. 31 F6 C3
+
+xorl %r10d, %r10d
+. 5968 0x12345678 4
+. 45 31 D2 C3
+
+xorl %r11d, %r11d
+. 5969 0x12345678 4
+. 45 31 DB C3
+
+xorl %r12d, %r12d
+. 5970 0x12345678 4
+. 45 31 E4 C3
+
+xorl %r13d, %r13d
+. 5971 0x12345678 4
+. 45 31 ED C3
+
+xorl %r14d, %r14d
+. 5972 0x12345678 4
+. 45 31 F6 C3
+
+xorl %r15d, %r15d
+. 5973 0x12345678 4
+. 45 31 FF C3
+
+xorl %r8d, %r8d
+. 5974 0x12345678 4
+. 45 31 C0 C3
+
+xorl %r9d, %r9d
+. 5975 0x12345678 4
+. 45 31 C9 C3
+
+xorw %ax, %ax
+. 5976 0x12345678 4
+. 66 31 C0 C3
+
+xorw %di, %di
+. 5977 0x12345678 4
+. 66 31 FF C3
+
+xorw %dx, %dx
+. 5978 0x12345678 4
+. 66 31 D2 C3
+
+nop
+. 5979 0x12345678 2
+. 90 C3
+
+nop
+. 5980 0x12345678 2
+. 90 C3
+
diff --git a/main/VEX/orig_amd64/test2.sorted b/main/VEX/orig_amd64/test2.sorted
new file mode 100644
index 0000000..c3343be
--- /dev/null
+++ b/main/VEX/orig_amd64/test2.sorted
@@ -0,0 +1,5978 @@
+40027A08 addb 8(%rdx), %dil
+83C666 addl $102, %esi
+83C26C addl $108, %edx
+83C66C addl $108, %esi
+4183C50A addl $10, %r13d
+83C673 addl $115, %esi
+83C380 addl $-128, %ebx
+83C780 addl $-128, %edi
+0344240C addl 12(%rsp), %eax
+03BC2488000000 addl 136(%rsp), %edi
+83C10D addl $13, %ecx
+83C310 addl $16, %ebx
+83C011 addl $17, %eax
+83C512 addl $18, %ebp
+03442414 addl 20(%rsp), %eax
+4403742414 addl 20(%rsp), %r14d
+83C315 addl $21, %ebx
+03442418 addl 24(%rsp), %eax
+834424101C addl $28, 16(%rsp)
+0344241C addl 28(%rsp), %eax
+036C241C addl 28(%rsp), %ebp
+440374241C addl 28(%rsp), %r14d
+44037C241C addl 28(%rsp), %r15d
+83C01D addl $29, %eax
+83C002 addl $2, %eax
+83C502 addl $2, %ebp
+83C302 addl $2, %ebx
+83C702 addl $2, %edi
+4183C402 addl $2, %r12d
+4183C702 addl $2, %r15d
+834424101F addl $31, 16(%rsp)
+03BC2438010000 addl 312(%rsp), %edi
+4403AC2444010000 addl 324(%rsp), %r13d
+03AC244C010000 addl 332(%rsp), %ebp
+83C021 addl $33, %eax
+03AC2458010000 addl 344(%rsp), %ebp
+03BC2458010000 addl 344(%rsp), %edi
+03AC2460010000 addl 352(%rsp), %ebp
+03AC2464010000 addl 356(%rsp), %ebp
+03AC2470010000 addl 368(%rsp), %ebp
+03442424 addl 36(%rsp), %eax
+037C2424 addl 36(%rsp), %edi
+8344241025 addl $37, 16(%rsp)
+83C125 addl $37, %ecx
+83C503 addl $3, %ebp
+83C303 addl $3, %ebx
+83C703 addl $3, %edi
+8344241029 addl $41, 16(%rsp)
+037C242C addl 44(%rsp), %edi
+038424C8010000 addl 456(%rsp), %eax
+83C504 addl $4, %ebp
+83C304 addl $4, %ebx
+83C704 addl $4, %edi
+0384242C020000 addl 556(%rsp), %eax
+03AC242C020000 addl 556(%rsp), %ebp
+03442438 addl 56(%rsp), %eax
+83C005 addl $5, %eax
+83C505 addl $5, %ebp
+0344243C addl 60(%rsp), %eax
+440364243C addl 60(%rsp), %r12d
+0502100100 addl $69634, %eax
+440364244C addl 76(%rsp), %r12d
+81C71B300100 addl $77851, %edi
+4181C41B300100 addl $77851, %r12d
+4181C41C300100 addl $77852, %r12d
+81C331300100 addl $77873, %ebx
+81C332300100 addl $77874, %ebx
+81C333300100 addl $77875, %ebx
+81C53E300100 addl $77886, %ebp
+0543300100 addl $77891, %eax
+81C743300100 addl $77891, %edi
+4181C443300100 addl $77891, %r12d
+0544300100 addl $77892, %eax
+81C744300100 addl $77892, %edi
+0545300100 addl $77893, %eax
+81C745300100 addl $77893, %edi
+4181C445300100 addl $77893, %r12d
+4181C545300100 addl $77893, %r13d
+81C346300100 addl $77894, %ebx
+81C54C300100 addl $77900, %ebp
+81C54F300100 addl $77903, %ebp
+83C707 addl $7, %edi
+4183C507 addl $7, %r13d
+0501400100 addl $81921, %eax
+83C008 addl $8, %eax
+037A08 addl 8(%rdx), %edi
+44037C2408 addl 8(%rsp), %r15d
+01442414 addl %eax, 20(%rsp)
+01442418 addl %eax, 24(%rsp)
+01442424 addl %eax, 36(%rsp)
+01442428 addl %eax, 40(%rsp)
+0144242C addl %eax, 44(%rsp)
+01442438 addl %eax, 56(%rsp)
+41014508 addl %eax, 8(%r13)
+01C0 addl %eax, %eax
+01C7 addl %eax, %edi
+01C2 addl %eax, %edx
+01C6 addl %eax, %esi
+4101C7 addl %eax, %r15d
+016C2408 addl %ebp, 8(%rsp)
+01E8 addl %ebp, %eax
+01EB addl %ebp, %ebx
+01EF addl %ebp, %edi
+01EE addl %ebp, %esi
+014C247C addl %ecx, 124(%rsp)
+018C2424010000 addl %ecx, 292(%rsp)
+014C2408 addl %ecx, 8(%rsp)
+01C9 addl %ecx, %ecx
+01CF addl %ecx, %edi
+01CA addl %ecx, %edx
+4101C8 addl %ecx, %r8d
+017C240C addl %edi, 12(%rsp)
+01F8 addl %edi, %eax
+01FF addl %edi, %edi
+01FE addl %edi, %esi
+4101FF addl %edi, %r15d
+013D63C55400 addl %edi, 5555555(%rip)
+01D0 addl %edx, %eax
+01D3 addl %edx, %ebx
+01D1 addl %edx, %ecx
+01D7 addl %edx, %edi
+01D6 addl %edx, %esi
+4101D0 addl %edx, %r8d
+01F0 addl %esi, %eax
+01F7 addl %esi, %edi
+4101F5 addl %esi, %r13d
+033D01000000 addl 1(%rip), %edi
+033502000000 addl 2(%rip), %esi
+033D03000000 addl 3(%rip), %edi
+033504000000 addl 4(%rip), %esi
+4401642438 addl %r12d, 56(%rsp)
+44016308 addl %r12d, 8(%rbx)
+4501E7 addl %r12d, %r15d
+4401EF addl %r13d, %edi
+4401EE addl %r13d, %esi
+4401F0 addl %r14d, %eax
+4401F5 addl %r14d, %ebp
+44017C2418 addl %r15d, 24(%rsp)
+4401F8 addl %r15d, %eax
+4401C7 addl %r8d, %edi
+4883C468 addq $104, %rsp
+4883C478 addq $120, %rsp
+4881C488000000 addq $136, %rsp
+4881C498000000 addq $152, %rsp
+4881C4A8000000 addq $168, %rsp
+48035110 addq 16(%rcx), %rdx
+48035610 addq 16(%rsi), %rdx
+4883C410 addq $16, %rsp
+4803442410 addq 16(%rsp), %rax
+4881C4B8000000 addq $184, %rsp
+4881C4D0000000 addq $208, %rsp
+4881C4D8000000 addq $216, %rsp
+4883C418 addq $24, %rsp
+4803442418 addq 24(%rsp), %rax
+4881C418010000 addq $280, %rsp
+4881C438010000 addq $312, %rsp
+4803442420 addq 32(%rsp), %rax
+4883C428 addq $40, %rsp
+4803442428 addq 40(%rsp), %rax
+4881C4D8010000 addq $472, %rsp
+4883C504 addq $4, %rbp
+4883C304 addq $4, %rbx
+4883C438 addq $56, %rsp
+4881C4D8020000 addq $728, %rsp
+4883C448 addq $72, %rsp
+4883C458 addq $88, %rsp
+4883C008 addq $8, %rax
+4883C408 addq $8, %rsp
+4881C4C8030000 addq $968, %rsp
+48031507000000 addq 7(%rip), %rdx
+4883C702 addq $2, %rdi
+4805C61E0000 addq $7878, %rax
+4D01FC addq %r15, %r12
+4C01F8 addq %r15, %rax
+4C01FF addq %r15, %rdi
+4C01FE addq %r15, %rsi
+4801442470 addq %rax, 112(%rsp)
+4801442420 addq %rax, 32(%rsp)
+4801442430 addq %rax, 48(%rsp)
+4801442460 addq %rax, 96(%rsp)
+4901C5 addq %rax, %r13
+4901C7 addq %rax, %r15
+4801C5 addq %rax, %rbp
+4801C3 addq %rax, %rbx
+480105DD030000 addq %rax, 989(%rip)
+4801E8 addq %rbp, %rax
+4801EB addq %rbp, %rbx
+4801EF addq %rbp, %rdi
+4801EE addq %rbp, %rsi
+4801D8 addq %rbx, %rax
+480539300000 addq $12345, %rax
+664101445616 addw %ax, 22(%r14,%rdx,2)
+6601445316 addw %ax, 22(%rbx,%rdx,2)
+40227A08 andb 8(%rdx), %dil
+83E00C andl $12, %eax
+83E60C andl $12, %esi
+83E60D andl $13, %esi
+836424140F andl $15, 20(%rsp)
+83E00F andl $15, %eax
+83E10F andl $15, %ecx
+83E20F andl $15, %edx
+83E60F andl $15, %esi
+4183E50F andl $15, %r13d
+81E1FF3F0000 andl $16383, %ecx
+81E60000FF00 andl $16711680, %esi
+4181E00000FF00 andl $16711680, %r8d
+25FFFFFF00 andl $16777215, %eax
+81E5FFFFFF00 andl $16777215, %ebp
+81E3FFFFFF00 andl $16777215, %ebx
+81E1FFFFFF00 andl $16777215, %ecx
+81E2FFFFFF00 andl $16777215, %edx
+4181E5FFFFFF00 andl $16777215, %r13d
+4181E1FFFFFF00 andl $16777215, %r9d
+25000000FF andl $-16777216, %eax
+81E700000001 andl $16777216, %edi
+81E600000001 andl $16777216, %esi
+4423A424B0000000 andl 176(%rsp), %r12d
+81E7C0000000 andl $192, %edi
+83E001 andl $1, %eax
+83E301 andl $1, %ebx
+83E101 andl $1, %ecx
+83E701 andl $1, %edi
+83E201 andl $1, %edx
+83E601 andl $1, %esi
+4183E001 andl $1, %r8d
+25F9000000 andl $249, %eax
+83E018 andl $24, %eax
+25FB000000 andl $251, %eax
+81E7FE000000 andl $254, %edi
+25FF000000 andl $255, %eax
+83E71B andl $27, %edi
+4183E402 andl $2, %r12d
+83E11E andl $30, %ecx
+83E01F andl $31, %eax
+83E51F andl $31, %ebp
+83E31F andl $31, %ebx
+83E11F andl $31, %ecx
+83E21F andl $31, %edx
+4183E41F andl $31, %r12d
+83E003 andl $3, %eax
+83E503 andl $3, %ebp
+83E303 andl $3, %ebx
+83E1FD andl $-3, %ecx
+83E603 andl $3, %esi
+81E5FF0F0000 andl $4095, %ebp
+83E0FC andl $-4, %eax
+83E3FC andl $-4, %ebx
+83E304 andl $4, %ebx
+83E7FC andl $-4, %edi
+4183E4FC andl $-4, %r12d
+4183E404 andl $4, %r12d
+4183E5FC andl $-4, %r13d
+4183E504 andl $4, %r13d
+4181E5FF010000 andl $511, %r13d
+4181E600020000 andl $512, %r14d
+83E0C7 andl $-57, %eax
+83E2C7 andl $-57, %edx
+4183E4C7 andl $-57, %r12d
+83E005 andl $5, %eax
+83E03F andl $63, %eax
+83E33F andl $63, %ebx
+4183E43F andl $63, %r12d
+4183E73F andl $63, %r15d
+81E6FF03FFFF andl $-64513, %esi
+81E700FF0000 andl $65280, %edi
+81E200FF0000 andl $65280, %edx
+4181E200FF0000 andl $65280, %r10d
+25FFFF0000 andl $65535, %eax
+4181E6FFFF0000 andl $65535, %r14d
+83E606 andl $6, %esi
+83E007 andl $7, %eax
+83E507 andl $7, %ebp
+83E107 andl $7, %ecx
+83E707 andl $7, %edi
+83E207 andl $7, %edx
+83E607 andl $7, %esi
+4183E407 andl $7, %r12d
+4183E507 andl $7, %r13d
+4183E707 andl $7, %r15d
+4183E107 andl $7, %r9d
+83E0F8 andl $-8, %eax
+83E7F8 andl $-8, %edi
+83E708 andl $8, %edi
+237A08 andl 8(%rdx), %edi
+83E009 andl $9, %eax
+21C5 andl %eax, %ebp
+21C1 andl %eax, %ecx
+21D8 andl %ebx, %eax
+4121DE andl %ebx, %r14d
+21D0 andl %edx, %eax
+21D1 andl %edx, %ecx
+21F1 andl %esi, %ecx
+4421E0 andl %r12d, %eax
+4C21E6 andq %r12, %rsi
+4821442470 andq %rax, 112(%rsp)
+4821442458 andq %rax, 88(%rsp)
+4821C6 andq %rax, %rsi
+FF942480000000 call *128(%rsp)
+FF942488000000 call *136(%rsp)
+FF942490000000 call *144(%rsp)
+FF542410 call *16(%rsp)
+FF542418 call *24(%rsp)
+FF942408010000 call *264(%rsp)
+FF942410010000 call *272(%rsp)
+FF942428010000 call *296(%rsp)
+FF942410030000 call *784(%rsp)
+FF942418030000 call *792(%rsp)
+FF942428030000 call *808(%rsp)
+41FFD2 call *%r10
+41FFD5 call *%r13
+41FFD6 call *%r14
+41FFD7 call *%r15
+FF152BC70400 call *313131(%rip)
+FF15B5260000 call *9909(%rip)
+99 cltd
+4898 cltq
+0F47D3 cmova %ebx, %edx
+0F47F1 cmova %ecx, %esi
+440F47D1 cmova %ecx, %r10d
+0F47C2 cmova %edx, %eax
+0F47FA cmova %edx, %edi
+440F47DA cmova %edx, %r11d
+440F47C2 cmova %edx, %r8d
+440F47CA cmova %edx, %r9d
+410F43C1 cmovae %r9d, %eax
+410F43D9 cmovae %r9d, %ebx
+410F43C9 cmovae %r9d, %ecx
+410F43F9 cmovae %r9d, %edi
+410F43D1 cmovae %r9d, %edx
+410F43F1 cmovae %r9d, %esi
+450F43C1 cmovae %r9d, %r8d
+440F42E0 cmovb %eax, %r12d
+0F42D3 cmovb %ebx, %edx
+0F42F1 cmovb %ecx, %esi
+440F42D1 cmovb %ecx, %r10d
+0F42C2 cmovb %edx, %eax
+0F42EA cmovb %edx, %ebp
+0F42FA cmovb %edx, %edi
+440F42DA cmovb %edx, %r11d
+440F42C2 cmovb %edx, %r8d
+440F42CA cmovb %edx, %r9d
+0F46D0 cmovbe %eax, %edx
+0F46F0 cmovbe %eax, %esi
+0F44442468 cmove 104(%rsp), %eax
+0F448C247C010000 cmove 380(%rsp), %ecx
+0F44BC247C010000 cmove 380(%rsp), %edi
+0F4494247C010000 cmove 380(%rsp), %edx
+0F44B4247C010000 cmove 380(%rsp), %esi
+0F448C248C010000 cmove 396(%rsp), %ecx
+0F44BC248C010000 cmove 396(%rsp), %edi
+0F4494248C010000 cmove 396(%rsp), %edx
+0F44B4248C010000 cmove 396(%rsp), %esi
+0F448C249C010000 cmove 412(%rsp), %ecx
+0F44BC249C010000 cmove 412(%rsp), %edi
+0F4494249C010000 cmove 412(%rsp), %edx
+0F44B4249C010000 cmove 412(%rsp), %esi
+0F44BC24F0010000 cmove 496(%rsp), %edi
+0F44B424F0010000 cmove 496(%rsp), %esi
+0F448C2400020000 cmove 512(%rsp), %ecx
+0F44942400020000 cmove 512(%rsp), %edx
+0F448C2410020000 cmove 528(%rsp), %ecx
+0F44BC2410020000 cmove 528(%rsp), %edi
+0F44942410020000 cmove 528(%rsp), %edx
+0F44B42410020000 cmove 528(%rsp), %esi
+0F44E8 cmove %eax, %ebp
+0F44D0 cmove %eax, %edx
+440F44E8 cmove %eax, %r13d
+0F44D1 cmove %ecx, %edx
+480F44F8 cmove %rax, %rdi
+480F44D0 cmove %rax, %rdx
+480F44F0 cmove %rax, %rsi
+480F44C5 cmove %rbp, %rax
+480F44DF cmove %rdi, %rbx
+480F44F2 cmove %rdx, %rsi
+480F44C6 cmove %rsi, %rax
+0F4FF7 cmovg %edi, %esi
+0F4FC2 cmovg %edx, %eax
+0F4FCA cmovg %edx, %ecx
+0F4DC1 cmovge %ecx, %eax
+0F4DF9 cmovge %ecx, %edi
+0F4DD1 cmovge %ecx, %edx
+0F4DF1 cmovge %ecx, %esi
+0F4DC2 cmovge %edx, %eax
+410F4DC2 cmovge %r10d, %eax
+410F4DDA cmovge %r10d, %ebx
+410F4DCA cmovge %r10d, %ecx
+410F4DFA cmovge %r10d, %edi
+410F4DD2 cmovge %r10d, %edx
+450F4DDA cmovge %r10d, %r11d
+450F4DEA cmovge %r10d, %r13d
+450F4DC2 cmovge %r10d, %r8d
+450F4DCA cmovge %r10d, %r9d
+410F4DC8 cmovge %r8d, %ecx
+450F4DD0 cmovge %r8d, %r10d
+410F4DC1 cmovge %r9d, %eax
+410F4DD9 cmovge %r9d, %ebx
+410F4DC9 cmovge %r9d, %ecx
+410F4DF9 cmovge %r9d, %edi
+410F4DD1 cmovge %r9d, %edx
+410F4DF1 cmovge %r9d, %esi
+450F4DC1 cmovge %r9d, %r8d
+0F4FCE cmovg %esi, %ecx
+410F4FC0 cmovg %r8d, %eax
+410F4FD0 cmovg %r8d, %edx
+440F4CE8 cmovl %eax, %r13d
+440F4CE3 cmovl %ebx, %r12d
+0F4CF7 cmovl %edi, %esi
+0F4CEA cmovl %edx, %ebp
+0F4CCA cmovl %edx, %ecx
+440F4CE2 cmovl %edx, %r12d
+0F4EC1 cmovle %ecx, %eax
+0F4ED9 cmovle %ecx, %ebx
+0F4EF9 cmovle %ecx, %edi
+0F4ED1 cmovle %ecx, %edx
+440F4ED9 cmovle %ecx, %r11d
+440F4EC1 cmovle %ecx, %r8d
+440F4EC9 cmovle %ecx, %r9d
+410F4EC2 cmovle %r10d, %eax
+410F4EDA cmovle %r10d, %ebx
+410F4ECA cmovle %r10d, %ecx
+410F4EFA cmovle %r10d, %edi
+410F4ED2 cmovle %r10d, %edx
+410F4EF2 cmovle %r10d, %esi
+450F4EDA cmovle %r10d, %r11d
+450F4EE2 cmovle %r10d, %r12d
+450F4EC2 cmovle %r10d, %r8d
+410F4EC0 cmovle %r8d, %eax
+410F4EF8 cmovle %r8d, %edi
+410F4ED0 cmovle %r8d, %edx
+410F4EF0 cmovle %r8d, %esi
+410F4CC0 cmovl %r8d, %eax
+410F4CD0 cmovl %r8d, %edx
+0F45442468 cmovne 104(%rsp), %eax
+0F45942490000000 cmovne 144(%rsp), %edx
+0F458C2498000000 cmovne 152(%rsp), %ecx
+0F455C2410 cmovne 16(%rsp), %ebx
+440F45642410 cmovne 16(%rsp), %r12d
+0F455C2418 cmovne 24(%rsp), %ebx
+0F455C2420 cmovne 32(%rsp), %ebx
+0F455C2428 cmovne 40(%rsp), %ebx
+0F455C2430 cmovne 48(%rsp), %ebx
+0F45E8 cmovne %eax, %ebp
+0F45D8 cmovne %eax, %ebx
+0F45C8 cmovne %eax, %ecx
+0F45F8 cmovne %eax, %edi
+0F45F0 cmovne %eax, %esi
+440F45F0 cmovne %eax, %r14d
+0F45C2 cmovne %edx, %eax
+410F45C2 cmovne %r10d, %eax
+410F45DA cmovne %r10d, %ebx
+410F45CA cmovne %r10d, %ecx
+410F45D2 cmovne %r10d, %edx
+450F45DA cmovne %r10d, %r11d
+450F45E2 cmovne %r10d, %r12d
+450F45EA cmovne %r10d, %r13d
+450F45CA cmovne %r10d, %r9d
+410F45F6 cmovne %r14d, %esi
+410F45C0 cmovne %r8d, %eax
+410F45C8 cmovne %r8d, %ecx
+410F45D0 cmovne %r8d, %edx
+450F45D0 cmovne %r8d, %r10d
+4C0F45F0 cmovne %rax, %r14
+4C0F45C8 cmovne %rax, %r9
+480F45D8 cmovne %rax, %rbx
+480F45C8 cmovne %rax, %rcx
+480F45F8 cmovne %rax, %rdi
+480F45D0 cmovne %rax, %rdx
+480F45F0 cmovne %rax, %rsi
+4C0F45CA cmovne %rdx, %r9
+480F45C2 cmovne %rdx, %rax
+0F49D0 cmovns %eax, %edx
+0F49CE cmovns %esi, %ecx
+410F49D8 cmovns %r8d, %ebx
+480F49D0 cmovns %rax, %rdx
+0F48C1 cmovs %ecx, %eax
+0F48D9 cmovs %ecx, %ebx
+0F48F9 cmovs %ecx, %edi
+0F48D1 cmovs %ecx, %edx
+440F48D9 cmovs %ecx, %r11d
+440F48C1 cmovs %ecx, %r8d
+440F48C9 cmovs %ecx, %r9d
+410F48C2 cmovs %r10d, %eax
+410F48DA cmovs %r10d, %ebx
+410F48CA cmovs %r10d, %ecx
+410F48FA cmovs %r10d, %edi
+410F48D2 cmovs %r10d, %edx
+410F48F2 cmovs %r10d, %esi
+450F48C2 cmovs %r10d, %r8d
+807C246700 cmpb $0, 103(%rsp)
+807C246B00 cmpb $0, 107(%rsp)
+807C247300 cmpb $0, 115(%rsp)
+807C240B00 cmpb $0, 11(%rsp)
+807C247B00 cmpb $0, 123(%rsp)
+80BC248700000000 cmpb $0, 135(%rsp)
+807C240D00 cmpb $0, 13(%rsp)
+807C240E00 cmpb $0, 14(%rsp)
+80BC249700000000 cmpb $0, 151(%rsp)
+807C240F00 cmpb $0, 15(%rsp)
+807C021000 cmpb $0, 16(%rdx,%rax)
+807C241000 cmpb $0, 16(%rsp)
+80BC24AB00000000 cmpb $0, 171(%rsp)
+807B1100 cmpb $0, 17(%rbx)
+80BC24B700000000 cmpb $0, 183(%rsp)
+807B1200 cmpb $0, 18(%rbx)
+807C241600 cmpb $0, 22(%rsp)
+80BC24EF00000000 cmpb $0, 239(%rsp)
+807C241700 cmpb $0, 23(%rsp)
+80BC240E01000000 cmpb $0, 270(%rsp)
+807C241B00 cmpb $0, 27(%rsp)
+80BC241B01000000 cmpb $0, 283(%rsp)
+807C241F00 cmpb $0, 31(%rsp)
+80BC244B01000000 cmpb $0, 331(%rsp)
+80BC247701000000 cmpb $0, 375(%rsp)
+807C242500 cmpb $0, 37(%rsp)
+807C242600 cmpb $0, 38(%rsp)
+807C242700 cmpb $0, 39(%rsp)
+807C242B00 cmpb $0, 43(%rsp)
+41807C242C00 cmpb $0, 44(%r12)
+41807D2C00 cmpb $0, 44(%r13)
+80782C00 cmpb $0, 44(%rax)
+807C242E00 cmpb $0, 46(%rsp)
+807C242F00 cmpb $0, 47(%rsp)
+807C243000 cmpb $0, 48(%rsp)
+80780400 cmpb $0, 4(%rax)
+807C080400 cmpb $0, 4(%rax,%rcx)
+807C243700 cmpb $0, 55(%rsp)
+80780500 cmpb $0, 5(%rax)
+807C243C00 cmpb $0, 60(%rsp)
+807C240600 cmpb $0, 6(%rsp)
+80780800 cmpb $0, 8(%rax)
+807F0800 cmpb $0, 8(%rdi)
+803D03B3060000 cmpb $0, 439043(%rip)
+803D0900000000 cmpb $0, 9(%rip)
+42803C2000 cmpb $0, (%rax,%r12)
+42803C2800 cmpb $0, (%rax,%r13)
+803C3800 cmpb $0, (%rax,%rdi)
+803C0300 cmpb $0, (%rbx,%rax)
+42803C1100 cmpb $0, (%rcx,%r10)
+42803C0900 cmpb $0, (%rcx,%r9)
+803C3900 cmpb $0, (%rcx,%rdi)
+803F00 cmpb $0, (%rdi)
+803C0700 cmpb $0, (%rdi,%rax)
+803C0200 cmpb $0, (%rdx,%rax)
+803E00 cmpb $0, (%rsi)
+41807C240164 cmpb $100, 1(%r12)
+41807C240165 cmpb $101, 1(%r12)
+41807C2401F6 cmpb $-10, 1(%r12)
+41807C240166 cmpb $102, 1(%r12)
+3C66 cmpb $102, %al
+41807C240167 cmpb $103, 1(%r12)
+41807C240168 cmpb $104, 1(%r12)
+41807C240169 cmpb $105, 1(%r12)
+41807C24016A cmpb $106, 1(%r12)
+41807C24016B cmpb $107, 1(%r12)
+41807C24016C cmpb $108, 1(%r12)
+42803C216C cmpb $108, (%rcx,%r12)
+41807C24016D cmpb $109, 1(%r12)
+4080FF0A cmpb $10, %dil
+41807C24016E cmpb $110, 1(%r12)
+807C246B01 cmpb $1, 107(%rsp)
+807C246F01 cmpb $1, 111(%rsp)
+41807C24026F cmpb $111, 2(%r12)
+807C247001 cmpb $1, 112(%rsp)
+80F96F cmpb $111, %cl
+807C240B01 cmpb $1, 11(%rsp)
+41807C240170 cmpb $112, 1(%r12)
+41807C240270 cmpb $112, 2(%r12)
+41807C240171 cmpb $113, 1(%r12)
+80BC248A00000001 cmpb $1, 138(%rsp)
+80FB71 cmpb $113, %bl
+80F98F cmpb $-113, %cl
+41807C240172 cmpb $114, 1(%r12)
+80FB72 cmpb $114, %bl
+41807C240173 cmpb $115, 1(%r12)
+80FB73 cmpb $115, %bl
+807C240F01 cmpb $1, 15(%rsp)
+41807C240174 cmpb $116, 1(%r12)
+807C241001 cmpb $1, 16(%rsp)
+41807C240175 cmpb $117, 1(%r12)
+41807C240176 cmpb $118, 1(%r12)
+80F90B cmpb $11, %cl
+41807C2401F4 cmpb $-12, 1(%r12)
+807C241601 cmpb $1, 22(%rsp)
+80780183 cmpb $-125, 1(%rax)
+41807C24017E cmpb $126, 1(%r12)
+41807C24027E cmpb $126, 2(%r12)
+41807C24017F cmpb $127, 1(%r12)
+41807C24027F cmpb $127, 2(%r12)
+807C241B01 cmpb $1, 27(%rsp)
+3C80 cmpb $-128, %al
+80780E0D cmpb $13, 14(%rax)
+41807C2401F3 cmpb $-13, 1(%r12)
+807C242601 cmpb $1, 38(%rsp)
+80FBF3 cmpb $-13, %bl
+41807C2401F2 cmpb $-14, 1(%r12)
+807C242A01 cmpb $1, 42(%rsp)
+807C242F01 cmpb $1, 47(%rsp)
+807C243001 cmpb $1, 48(%rsp)
+80FBF2 cmpb $-14, %bl
+807C246A0F cmpb $15, 106(%rsp)
+80BC248B0000000F cmpb $15, 139(%rsp)
+807C24130F cmpb $15, 19(%rsp)
+41807C2401F1 cmpb $-15, 1(%r12)
+41807C24010F cmpb $15, 1(%r12)
+807C24190F cmpb $15, 25(%rsp)
+807C241A0F cmpb $15, 26(%rsp)
+807C241B0F cmpb $15, 27(%rsp)
+807C243D0F cmpb $15, 61(%rsp)
+807C243E0F cmpb $15, 62(%rsp)
+807C243F0F cmpb $15, 63(%rsp)
+807C244F0F cmpb $15, 79(%rsp)
+3C0F cmpb $15, %al
+80FB0F cmpb $15, %bl
+41803C240F cmpb $15, (%r12)
+4180FC0F cmpb $15, %r12b
+4180FF0F cmpb $15, %r15b
+41807C240210 cmpb $16, 2(%r12)
+807C244301 cmpb $1, 67(%rsp)
+3CF0 cmpb $-16, %al
+3C10 cmpb $16, %al
+80F910 cmpb $16, %cl
+8038F0 cmpb $-16, (%rax)
+41807C2401EF cmpb $-17, 1(%r12)
+41807C240211 cmpb $17, 2(%r12)
+41807C2401EE cmpb $-18, 1(%r12)
+41807C240112 cmpb $18, 1(%r12)
+807F0801 cmpb $1, 8(%rdi)
+80781113 cmpb $19, 17(%rax)
+41807C2401ED cmpb $-19, 1(%r12)
+41807C240113 cmpb $19, 1(%r12)
+3C01 cmpb $1, %al
+80FB01 cmpb $1, %bl
+80F901 cmpb $1, %cl
+4080FF01 cmpb $1, %dil
+80FA01 cmpb $1, %dl
+4180FC01 cmpb $1, %r12b
+4180FE01 cmpb $1, %r14b
+4180F801 cmpb $1, %r8b
+4080FE01 cmpb $1, %sil
+41807C2401EC cmpb $-20, 1(%r12)
+41807C2401EB cmpb $-21, 1(%r12)
+41807C240115 cmpb $21, 1(%r12)
+80FA15 cmpb $21, %dl
+41807C2401FE cmpb $-2, 1(%r12)
+41807C2401EA cmpb $-22, 1(%r12)
+41807C240116 cmpb $22, 1(%r12)
+41807C2401E9 cmpb $-23, 1(%r12)
+41807C240117 cmpb $23, 1(%r12)
+41807C2401E8 cmpb $-24, 1(%r12)
+41807C240118 cmpb $24, 1(%r12)
+41807C2401E7 cmpb $-25, 1(%r12)
+3C19 cmpb $25, %al
+41807C2401E6 cmpb $-26, 1(%r12)
+41807C2402E6 cmpb $-26, 2(%r12)
+41807C2401E5 cmpb $-27, 1(%r12)
+8078081B cmpb $27, 8(%rax)
+41807C2401E4 cmpb $-28, 1(%r12)
+41807C2401E3 cmpb $-29, 1(%r12)
+8078021D cmpb $29, 2(%rax)
+80FBE3 cmpb $-29, %bl
+80F902 cmpb $2, %cl
+41807C2401E2 cmpb $-30, 1(%r12)
+41807C2401E1 cmpb $-31, 1(%r12)
+41807C2401FD cmpb $-3, 1(%r12)
+41807C2401E0 cmpb $-32, 1(%r12)
+41807C2401DF cmpb $-33, 1(%r12)
+807C242603 cmpb $3, 38(%rsp)
+4180FCDF cmpb $-33, %r12b
+41807C2401DE cmpb $-34, 1(%r12)
+4180FCDE cmpb $-34, %r12b
+41807C2401DD cmpb $-35, 1(%r12)
+4180FCDD cmpb $-35, %r12b
+80780503 cmpb $3, 5(%rax)
+41807C2401DC cmpb $-36, 1(%r12)
+80780324 cmpb $36, 3(%rax)
+4180FCDC cmpb $-36, %r12b
+41807C2401DB cmpb $-37, 1(%r12)
+3C25 cmpb $37, %al
+4180FCDB cmpb $-37, %r12b
+41807C2401DA cmpb $-38, 1(%r12)
+4180FCDA cmpb $-38, %r12b
+41807C2401D9 cmpb $-39, 1(%r12)
+4180FCD9 cmpb $-39, %r12b
+4080FD03 cmpb $3, %bpl
+4180FE03 cmpb $3, %r14b
+4080FE03 cmpb $3, %sil
+41807C2401D8 cmpb $-40, 1(%r12)
+3C28 cmpb $40, %al
+80F928 cmpb $40, %cl
+4180FCD8 cmpb $-40, %r12b
+41807C2401D7 cmpb $-41, 1(%r12)
+41807C240129 cmpb $41, 1(%r12)
+41807C2401FC cmpb $-4, 1(%r12)
+41807C2401D6 cmpb $-42, 1(%r12)
+41807C24012A cmpb $42, 1(%r12)
+41807C2402D6 cmpb $-42, 2(%r12)
+41807C24022A cmpb $42, 2(%r12)
+41807C2401D5 cmpb $-43, 1(%r12)
+41807C24012B cmpb $43, 1(%r12)
+41807C2401D4 cmpb $-44, 1(%r12)
+41807C24012C cmpb $44, 1(%r12)
+41807C24022C cmpb $44, 2(%r12)
+42803C212C cmpb $44, (%rcx,%r12)
+41807C2401D3 cmpb $-45, 1(%r12)
+42803C212D cmpb $45, (%rcx,%r12)
+41807C2401D2 cmpb $-46, 1(%r12)
+3C2E cmpb $46, %al
+41807C2401D1 cmpb $-47, 1(%r12)
+42803C2130 cmpb $48, (%rcx,%r12)
+4080FD04 cmpb $4, %bpl
+80F904 cmpb $4, %cl
+80FA04 cmpb $4, %dl
+4180FD04 cmpb $4, %r13b
+80780B05 cmpb $5, 11(%rax)
+41807C2401FB cmpb $-5, 1(%r12)
+80780AC8 cmpb $-56, 10(%rax)
+807807C8 cmpb $-56, 7(%rax)
+41807C2401C6 cmpb $-58, 1(%r12)
+41807C2401C5 cmpb $-59, 1(%r12)
+3C05 cmpb $5, %al
+4180FD05 cmpb $5, %r13b
+4180FF05 cmpb $5, %r15b
+41807C2401C4 cmpb $-60, 1(%r12)
+41807C2401C3 cmpb $-61, 1(%r12)
+41807C2401FA cmpb $-6, 1(%r12)
+41807C2401C2 cmpb $-62, 1(%r12)
+41807C2402C2 cmpb $-62, 2(%r12)
+80780CC1 cmpb $-63, 12(%rax)
+80780FC1 cmpb $-63, 15(%rax)
+807803C1 cmpb $-63, 3(%rax)
+807806C1 cmpb $-63, 6(%rax)
+807809C1 cmpb $-63, 9(%rax)
+8038C1 cmpb $-63, (%rax)
+80780DC0 cmpb $-64, 13(%rax)
+807810C0 cmpb $-64, 16(%rax)
+807801C0 cmpb $-64, 1(%rax)
+807804C0 cmpb $-64, 4(%rax)
+3CBF cmpb $-65, %al
+80780244 cmpb $68, 2(%rax)
+80F906 cmpb $6, %cl
+41807C2401F9 cmpb $-7, 1(%r12)
+41807C240150 cmpb $80, 1(%r12)
+41807C240151 cmpb $81, 1(%r12)
+41807C240251 cmpb $81, 2(%r12)
+41807C2401F8 cmpb $-8, 1(%r12)
+41807C2401AE cmpb $-82, 1(%r12)
+41807C240152 cmpb $82, 1(%r12)
+41807C240252 cmpb $82, 2(%r12)
+4180FDAE cmpb $-82, %r13b
+41807C240153 cmpb $83, 1(%r12)
+41807C240253 cmpb $83, 2(%r12)
+42803C2153 cmpb $83, (%rcx,%r12)
+41807C240154 cmpb $84, 1(%r12)
+41807C240155 cmpb $85, 1(%r12)
+41807C240156 cmpb $86, 1(%r12)
+4180FDAA cmpb $-86, %r13b
+41807C240157 cmpb $87, 1(%r12)
+3C57 cmpb $87, %al
+41807C240158 cmpb $88, 1(%r12)
+41807C240258 cmpb $88, 2(%r12)
+41807C240159 cmpb $89, 1(%r12)
+41807C240259 cmpb $89, 2(%r12)
+41807C24015A cmpb $90, 1(%r12)
+41807C24025A cmpb $90, 2(%r12)
+4180FDA6 cmpb $-90, %r13b
+41807C24015B cmpb $91, 1(%r12)
+41807C24025B cmpb $91, 2(%r12)
+41807C24015C cmpb $92, 1(%r12)
+41807C24025C cmpb $92, 2(%r12)
+4180FDA4 cmpb $-92, %r13b
+41807C24015D cmpb $93, 1(%r12)
+41807C24025D cmpb $93, 2(%r12)
+41807C24015E cmpb $94, 1(%r12)
+41807C24025E cmpb $94, 2(%r12)
+41807C24015F cmpb $95, 1(%r12)
+41807C24025F cmpb $95, 2(%r12)
+3C5F cmpb $95, %al
+41807C240160 cmpb $96, 1(%r12)
+41807C240161 cmpb $97, 1(%r12)
+41807C240162 cmpb $98, 1(%r12)
+41807C240163 cmpb $99, 1(%r12)
+3C09 cmpb $9, %al
+80F909 cmpb $9, %cl
+384708 cmpb %al, 8(%rdi)
+384208 cmpb %al, 8(%rdx)
+38C3 cmpb %al, %bl
+38C2 cmpb %al, %dl
+38DA cmpb %bl, %dl
+4138CA cmpb %cl, %r10b
+4038CE cmpb %cl, %sil
+4038FE cmpb %dil, %sil
+38D0 cmpb %dl, %al
+38D3 cmpb %dl, %bl
+38D1 cmpb %dl, %cl
+4038D7 cmpb %dl, %dil
+4138D3 cmpb %dl, %r11b
+4138D0 cmpb %dl, %r8b
+4138D1 cmpb %dl, %r9b
+4538D8 cmpb %r11b, %r8b
+4438BC248B000000 cmpb %r15b, 139(%rsp)
+44387C244F cmpb %r15b, 79(%rsp)
+83780800 cmpl $0, 8(%rax)
+3D40420F00 cmpl $1000000, %eax
+81780C10270000 cmpl $10000, 12(%rax)
+81FB10270000 cmpl $10000, %ebx
+813F10270000 cmpl $10000, (%rdi)
+3DE8030000 cmpl $1000, %eax
+83F864 cmpl $100, %eax
+83FA64 cmpl $100, %edx
+83F865 cmpl $101, %eax
+83FA65 cmpl $101, %edx
+83F866 cmpl $102, %eax
+83F867 cmpl $103, %eax
+81FE00000040 cmpl $1073741824, %esi
+3B44246C cmpl 108(%rsp), %eax
+3B5C246C cmpl 108(%rsp), %ebx
+443B64246C cmpl 108(%rsp), %r12d
+83F80A cmpl $10, %eax
+4183FD0A cmpl $10, %r13d
+4183F90A cmpl $10, %r9d
+837C246C01 cmpl $1, 108(%rsp)
+83F80B cmpl $11, %eax
+3B442478 cmpl 120(%rsp), %eax
+3B6C2478 cmpl 120(%rsp), %ebp
+3B5C2478 cmpl 120(%rsp), %ebx
+3B4C2478 cmpl 120(%rsp), %ecx
+443B642478 cmpl 120(%rsp), %r12d
+443B4C2478 cmpl 120(%rsp), %r9d
+83F87C cmpl $124, %eax
+4183FC7C cmpl $124, %r12d
+837818FF cmpl $-1, 24(%rax)
+837C241801 cmpl $1, 24(%rsp)
+3B44247C cmpl 124(%rsp), %eax
+3D80000000 cmpl $128, %eax
+81FB80000000 cmpl $128, %ebx
+81F980000000 cmpl $128, %ecx
+81FF80000000 cmpl $128, %edi
+81FA80000000 cmpl $128, %edx
+81FE80000000 cmpl $128, %esi
+4181F880000000 cmpl $128, %r8d
+837C241C01 cmpl $1, 28(%rsp)
+3D7FFFFFFF cmpl $-129, %eax
+81FB7FFFFFFF cmpl $-129, %ebx
+81F97FFFFFFF cmpl $-129, %ecx
+81FF7FFFFFFF cmpl $-129, %edi
+81FA7FFFFFFF cmpl $-129, %edx
+81FE7FFFFFFF cmpl $-129, %esi
+4181F87FFFFFFF cmpl $-129, %r8d
+83F80C cmpl $12, %eax
+453B7D0C cmpl 12(%r13), %r15d
+413B460C cmpl 12(%r14), %eax
+453B660C cmpl 12(%r14), %r12d
+453B6E0C cmpl 12(%r14), %r13d
+3B500C cmpl 12(%rax), %edx
+3B730C cmpl 12(%rbx), %esi
+443B6B0C cmpl 12(%rbx), %r13d
+3B590C cmpl 12(%rcx), %ebx
+3B470C cmpl 12(%rdi), %eax
+3B770C cmpl 12(%rdi), %esi
+3B420C cmpl 12(%rdx), %eax
+3B5A0C cmpl 12(%rdx), %ebx
+3B7E0C cmpl 12(%rsi), %edi
+3B44240C cmpl 12(%rsp), %eax
+443B7C240C cmpl 12(%rsp), %r15d
+837C242401 cmpl $1, 36(%rsp)
+3D8A000000 cmpl $138, %eax
+4181FD8A000000 cmpl $138, %r13d
+83FF0D cmpl $13, %edi
+83FE0D cmpl $13, %esi
+833F0D cmpl $13, (%rdi)
+81FB90000000 cmpl $144, %ebx
+83F80E cmpl $14, %eax
+83FD0E cmpl $14, %ebp
+83FF0E cmpl $14, %edi
+83BC241002000001 cmpl $1, 528(%rsp)
+3D9E000000 cmpl $158, %eax
+81FB9F000000 cmpl $159, %ebx
+83F80F cmpl $15, %eax
+83FD0F cmpl $15, %ebp
+83FF0F cmpl $15, %edi
+4183FE0F cmpl $15, %r14d
+83BC8CB002000001 cmpl $1, 688(%rsp,%rcx,4)
+83BCB4B002000001 cmpl $1, 688(%rsp,%rsi,4)
+83F810 cmpl $16, %eax
+83FF10 cmpl $16, %edi
+83FA10 cmpl $16, %edx
+4183FF10 cmpl $16, %r15d
+443B7510 cmpl 16(%rbp), %r14d
+3B442410 cmpl 16(%rsp), %eax
+3B542410 cmpl 16(%rsp), %edx
+443B742410 cmpl 16(%rsp), %r14d
+3DAE000000 cmpl $174, %eax
+3DAF000000 cmpl $175, %eax
+81FBAF000000 cmpl $175, %ebx
+83F811 cmpl $17, %eax
+81FBB6000000 cmpl $182, %ebx
+81FBB7000000 cmpl $183, %ebx
+837C245801 cmpl $1, 88(%rsp)
+83F812 cmpl $18, %eax
+83F912 cmpl $18, %ecx
+837808FF cmpl $-1, 8(%rax)
+837C030801 cmpl $1, 8(%rbx,%rax)
+837C110801 cmpl $1, 8(%rcx,%rdx)
+837C070801 cmpl $1, 8(%rdi,%rax)
+837C020801 cmpl $1, 8(%rdx,%rax)
+837C820801 cmpl $1, 8(%rdx,%rax,4)
+837C060801 cmpl $1, 8(%rsi,%rax)
+837C160801 cmpl $1, 8(%rsi,%rdx)
+837C240801 cmpl $1, 8(%rsp)
+81FFC0000000 cmpl $192, %edi
+83F813 cmpl $19, %eax
+83F8FF cmpl $-1, %eax
+83F801 cmpl $1, %eax
+83FD01 cmpl $1, %ebp
+83FB01 cmpl $1, %ebx
+83F9FF cmpl $-1, %ecx
+83F901 cmpl $1, %ecx
+83FFFF cmpl $-1, %edi
+83FF01 cmpl $1, %edi
+83FAFF cmpl $-1, %edx
+83FA01 cmpl $1, %edx
+83FE01 cmpl $1, %esi
+41833C2401 cmpl $1, (%r12)
+4183FC01 cmpl $1, %r12d
+41837D0001 cmpl $1, (%r13)
+4183FD01 cmpl $1, %r13d
+41833EFF cmpl $-1, (%r14)
+4183FE01 cmpl $1, %r14d
+41833C8601 cmpl $1, (%r14,%rax,4)
+41833FFF cmpl $-1, (%r15)
+4183F8FF cmpl $-1, %r8d
+4183F901 cmpl $1, %r9d
+8338FF cmpl $-1, (%rax)
+833801 cmpl $1, (%rax)
+837D00FF cmpl $-1, (%rbp)
+833B01 cmpl $1, (%rbx)
+833F01 cmpl $1, (%rdi)
+3DCA000000 cmpl $202, %eax
+4181FDCA000000 cmpl $202, %r13d
+3DCD000000 cmpl $205, %eax
+3B5814 cmpl 20(%rax), %ebx
+443B6514 cmpl 20(%rbp), %r12d
+443B742414 cmpl 20(%rsp), %r14d
+83BC240004000002 cmpl $2, 1024(%rsp)
+837C246802 cmpl $2, 104(%rsp)
+837C246C02 cmpl $2, 108(%rsp)
+81FF00000080 cmpl $-2147483648, %edi
+81FA00000080 cmpl $-2147483648, %edx
+81FE00000080 cmpl $-2147483648, %esi
+3DEA000000 cmpl $234, %eax
+4181FDEA000000 cmpl $234, %r13d
+837C242402 cmpl $2, 36(%rsp)
+83F817 cmpl $23, %eax
+3DF0000000 cmpl $240, %eax
+3DF2000000 cmpl $242, %eax
+3DF3000000 cmpl $243, %eax
+3B8424F8000000 cmpl 248(%rsp), %eax
+443BA424F8000000 cmpl 248(%rsp), %r12d
+83F818 cmpl $24, %eax
+3DFF000000 cmpl $255, %eax
+81FFFF000000 cmpl $255, %edi
+4181FEFF000000 cmpl $255, %r14d
+3D00010000 cmpl $256, %eax
+81FB00010000 cmpl $256, %ebx
+81F900010000 cmpl $256, %ecx
+81FF00010000 cmpl $256, %edi
+81FA00010000 cmpl $256, %edx
+81FE00010000 cmpl $256, %esi
+4181F800010000 cmpl $256, %r8d
+3D0A010000 cmpl $266, %eax
+4181FD0A010000 cmpl $266, %r13d
+83F81A cmpl $26, %eax
+4183FC1A cmpl $26, %r12d
+83F81B cmpl $27, %eax
+3D1C010000 cmpl $284, %eax
+4181FC1C010000 cmpl $284, %r12d
+3D1D010000 cmpl $285, %eax
+83F81C cmpl $28, %eax
+4183FC1C cmpl $28, %r12d
+413B6C241C cmpl 28(%r12), %ebp
+413B4C241C cmpl 28(%r12), %ecx
+413B4E1C cmpl 28(%r14), %ecx
+837C380802 cmpl $2, 8(%rax,%rdi)
+837C030802 cmpl $2, 8(%rbx,%rax)
+42837C290802 cmpl $2, 8(%rcx,%r13)
+837C170802 cmpl $2, 8(%rdi,%rdx)
+837C020802 cmpl $2, 8(%rdx,%rax)
+837C160802 cmpl $2, 8(%rsi,%rdx)
+3B44241C cmpl 28(%rsp), %eax
+83F802 cmpl $2, %eax
+83FD02 cmpl $2, %ebp
+83FBFE cmpl $-2, %ebx
+83FB02 cmpl $2, %ebx
+83F902 cmpl $2, %ecx
+83FF02 cmpl $2, %edi
+83FA02 cmpl $2, %edx
+83FE02 cmpl $2, %esi
+41833C2402 cmpl $2, (%r12)
+4183FC02 cmpl $2, %r12d
+4183FDFE cmpl $-2, %r13d
+4183FD02 cmpl $2, %r13d
+4183FE02 cmpl $2, %r14d
+41833C86FE cmpl $-2, (%r14,%rax,4)
+41833C9EFE cmpl $-2, (%r14,%rbx,4)
+4183F902 cmpl $2, %r9d
+833802 cmpl $2, (%rax)
+837D0002 cmpl $2, (%rbp)
+833B02 cmpl $2, (%rbx)
+833F02 cmpl $2, (%rdi)
+833C9FFE cmpl $-2, (%rdi,%rbx,4)
+833A02 cmpl $2, (%rdx)
+833C9EFE cmpl $-2, (%rsi,%rbx,4)
+83BC240004000003 cmpl $3, 1024(%rsp)
+3D3C010000 cmpl $316, %eax
+4181FC3C010000 cmpl $316, %r12d
+83F81F cmpl $31, %eax
+83FB1F cmpl $31, %ebx
+83F91F cmpl $31, %ecx
+83FF1F cmpl $31, %edi
+83FE1F cmpl $31, %esi
+3D00800000 cmpl $32768, %eax
+81FF00800000 cmpl $32768, %edi
+81FA00800000 cmpl $32768, %edx
+81FE00800000 cmpl $32768, %esi
+4181F800800000 cmpl $32768, %r8d
+3DFF7FFFFF cmpl $-32769, %eax
+81FFFF7FFFFF cmpl $-32769, %edi
+81FAFF7FFFFF cmpl $-32769, %edx
+81FEFF7FFFFF cmpl $-32769, %esi
+4181F8FF7FFFFF cmpl $-32769, %r8d
+83F820 cmpl $32, %eax
+4183FF20 cmpl $32, %r15d
+443B6520 cmpl 32(%rbp), %r12d
+443B6320 cmpl 32(%rbx), %r12d
+837C242403 cmpl $3, 36(%rsp)
+83F825 cmpl $37, %eax
+83F826 cmpl $38, %eax
+83FD26 cmpl $38, %ebp
+83FA26 cmpl $38, %edx
+83F803 cmpl $3, %eax
+83FB03 cmpl $3, %ebx
+83F903 cmpl $3, %ecx
+83FF03 cmpl $3, %edi
+83FE03 cmpl $3, %esi
+4183F903 cmpl $3, %r9d
+833803 cmpl $3, (%rax)
+833903 cmpl $3, (%rcx)
+833F03 cmpl $3, (%rdi)
+833A03 cmpl $3, (%rdx)
+3D90010000 cmpl $400, %eax
+3B5C2428 cmpl 40(%rsp), %ebx
+83BC240004000004 cmpl $4, 1024(%rsp)
+837C246804 cmpl $4, 104(%rsp)
+3D9C010000 cmpl $412, %eax
+4181FC9C010000 cmpl $412, %r12d
+83F829 cmpl $41, %eax
+83F82B cmpl $43, %eax
+837C242804 cmpl $4, 40(%rsp)
+3DBC010000 cmpl $444, %eax
+4181FCBC010000 cmpl $444, %r12d
+837C243004 cmpl $4, 48(%rsp)
+83F82E cmpl $46, %eax
+3DDA010000 cmpl $474, %eax
+4181FCDA010000 cmpl $474, %r12d
+83F830 cmpl $48, %eax
+413B6C2430 cmpl 48(%r12), %ebp
+3DF3010000 cmpl $499, %eax
+83F804 cmpl $4, %eax
+83FD04 cmpl $4, %ebp
+83FB04 cmpl $4, %ebx
+83FF04 cmpl $4, %edi
+83FA04 cmpl $4, %edx
+83FE04 cmpl $4, %esi
+4183FD04 cmpl $4, %r13d
+4183FE04 cmpl $4, %r14d
+4183FF04 cmpl $4, %r15d
+4183F804 cmpl $4, %r8d
+837D0004 cmpl $4, (%rbp)
+3B4104 cmpl 4(%rcx), %eax
+833F04 cmpl $4, (%rdi)
+3B4204 cmpl 4(%rdx), %eax
+443B6C2404 cmpl 4(%rsp), %r13d
+3DF4010000 cmpl $500, %eax
+8138E00EA0E1 cmpl $-509604128, (%rax)
+817808E00DA0E1 cmpl $-509604384, 8(%rax)
+817814E009A0E1 cmpl $-509605408, 20(%rax)
+817810E006A0E1 cmpl $-509606176, 16(%rax)
+81780CE002A0E1 cmpl $-509607200, 12(%rax)
+817804E001A0E1 cmpl $-509607456, 4(%rax)
+83F832 cmpl $50, %eax
+3D10020000 cmpl $528, %eax
+81FA10020000 cmpl $528, %edx
+83BC247001000005 cmpl $5, 368(%rsp)
+83F836 cmpl $54, %eax
+83F837 cmpl $55, %eax
+83F805 cmpl $5, %eax
+83FD05 cmpl $5, %ebp
+83FB05 cmpl $5, %ebx
+83FF05 cmpl $5, %edi
+83FA05 cmpl $5, %edx
+41833C2405 cmpl $5, (%r12)
+837D0005 cmpl $5, (%rbp)
+833F05 cmpl $5, (%rdi)
+83F83C cmpl $60, %eax
+4183FC3C cmpl $60, %r12d
+443B74243C cmpl 60(%rsp), %r14d
+83F83E cmpl $62, %eax
+83FA3E cmpl $62, %edx
+83F83F cmpl $63, %eax
+83FB40 cmpl $64, %ebx
+81FEFFFF0000 cmpl $65535, %esi
+3D00000100 cmpl $65536, %eax
+81FF00000100 cmpl $65536, %edi
+81FA00000100 cmpl $65536, %edx
+4181F800000100 cmpl $65536, %r8d
+3BB484A0020000 cmpl 672(%rsp,%rax,4), %esi
+837C245006 cmpl $6, 80(%rsp)
+817C2410FF0F0100 cmpl $69631, 16(%rsp)
+817C2414FF0F0100 cmpl $69631, 20(%rsp)
+817D1000100100 cmpl $69632, 16(%rbp)
+817F0400100100 cmpl $69632, 4(%rdi)
+3D00100100 cmpl $69632, %eax
+81FD00100100 cmpl $69632, %ebp
+813C9000100100 cmpl $69632, (%rax,%rdx,4)
+3D01100100 cmpl $69633, %eax
+81FD01100100 cmpl $69633, %ebp
+81FB01100100 cmpl $69633, %ebx
+81F901100100 cmpl $69633, %ecx
+81FF01100100 cmpl $69633, %edi
+81FA01100100 cmpl $69633, %edx
+4181FC01100100 cmpl $69633, %r12d
+4181FF01100100 cmpl $69633, %r15d
+3D02100100 cmpl $69634, %eax
+81FD02100100 cmpl $69634, %ebp
+81FB02100100 cmpl $69634, %ebx
+81F902100100 cmpl $69634, %ecx
+81FF02100100 cmpl $69634, %edi
+81FA02100100 cmpl $69634, %edx
+4181FC02100100 cmpl $69634, %r12d
+4181FF02100100 cmpl $69634, %r15d
+3D03100100 cmpl $69635, %eax
+81FD03100100 cmpl $69635, %ebp
+81FB03100100 cmpl $69635, %ebx
+81F903100100 cmpl $69635, %ecx
+81FF03100100 cmpl $69635, %edi
+81FA03100100 cmpl $69635, %edx
+4181FC03100100 cmpl $69635, %r12d
+4181FF03100100 cmpl $69635, %r15d
+3D04100100 cmpl $69636, %eax
+81FD04100100 cmpl $69636, %ebp
+81FB04100100 cmpl $69636, %ebx
+81F904100100 cmpl $69636, %ecx
+81FF04100100 cmpl $69636, %edi
+81FA04100100 cmpl $69636, %edx
+3D05100100 cmpl $69637, %eax
+3D06100100 cmpl $69638, %eax
+3D07100100 cmpl $69639, %eax
+83F806 cmpl $6, %eax
+83FD06 cmpl $6, %ebp
+83FF06 cmpl $6, %edi
+83FA06 cmpl $6, %edx
+41833C2406 cmpl $6, (%r12)
+41833E06 cmpl $6, (%r14)
+837D0006 cmpl $6, (%rbp)
+833F06 cmpl $6, (%rdi)
+813800200100 cmpl $73728, (%rax)
+813F00200100 cmpl $73728, (%rdi)
+813801200100 cmpl $73729, (%rax)
+813A01200100 cmpl $73729, (%rdx)
+813F03200100 cmpl $73731, (%rdi)
+81F904200100 cmpl $73732, %ecx
+81FA04200100 cmpl $73732, %edx
+813806200100 cmpl $73734, (%rax)
+4181FD00300100 cmpl $77824, %r13d
+81FD01300100 cmpl $77825, %ebp
+81FF01300100 cmpl $77825, %edi
+81FE01300100 cmpl $77825, %esi
+4181F801300100 cmpl $77825, %r8d
+3D03300100 cmpl $77827, %eax
+81F903300100 cmpl $77827, %ecx
+81F904300100 cmpl $77828, %ecx
+81FD05300100 cmpl $77829, %ebp
+81FF05300100 cmpl $77829, %edi
+81FE05300100 cmpl $77829, %esi
+4181F805300100 cmpl $77829, %r8d
+817F0807300100 cmpl $77831, 8(%rdi)
+3D07300100 cmpl $77831, %eax
+81FE09300100 cmpl $77833, %esi
+81FF0D300100 cmpl $77837, %edi
+81FE0D300100 cmpl $77837, %esi
+4181FD0D300100 cmpl $77837, %r13d
+81F90F300100 cmpl $77839, %ecx
+81F910300100 cmpl $77840, %ecx
+81FF11300100 cmpl $77841, %edi
+81FE11300100 cmpl $77841, %esi
+4181FD11300100 cmpl $77841, %r13d
+81F913300100 cmpl $77843, %ecx
+81FD15300100 cmpl $77845, %ebp
+81FF15300100 cmpl $77845, %edi
+81FE15300100 cmpl $77845, %esi
+4181FD15300100 cmpl $77845, %r13d
+81FE19300100 cmpl $77849, %esi
+81F91B300100 cmpl $77851, %ecx
+81FF1B300100 cmpl $77851, %edi
+817C24141C300100 cmpl $77852, 20(%rsp)
+81FD1C300100 cmpl $77852, %ebp
+4181FC1C300100 cmpl $77852, %r12d
+81FE1D300100 cmpl $77853, %esi
+81F91F300100 cmpl $77855, %ecx
+81FF1F300100 cmpl $77855, %edi
+817C241420300100 cmpl $77856, 20(%rsp)
+81FD20300100 cmpl $77856, %ebp
+4181FC20300100 cmpl $77856, %r12d
+81FE21300100 cmpl $77857, %esi
+817C241423300100 cmpl $77859, 20(%rsp)
+81FF23300100 cmpl $77859, %edi
+817C241424300100 cmpl $77860, 20(%rsp)
+81FE25300100 cmpl $77861, %esi
+81FE29300100 cmpl $77865, %esi
+81FE2D300100 cmpl $77869, %esi
+81FD9A300100 cmpl $77978, %ebp
+4181FC9A300100 cmpl $77978, %r12d
+81FD9B300100 cmpl $77979, %ebp
+4181FC9B300100 cmpl $77979, %r12d
+81FD9D300100 cmpl $77981, %ebp
+4181FC9D300100 cmpl $77981, %r12d
+81FD9E300100 cmpl $77982, %ebp
+4181FC9E300100 cmpl $77982, %r12d
+81FD9F300100 cmpl $77983, %ebp
+4181FC9F300100 cmpl $77983, %r12d
+83F84F cmpl $79, %eax
+83FB4F cmpl $79, %ebx
+83F807 cmpl $7, %eax
+83FD07 cmpl $7, %ebp
+83FB07 cmpl $7, %ebx
+83F907 cmpl $7, %ecx
+83FF07 cmpl $7, %edi
+83FA07 cmpl $7, %edx
+83FE07 cmpl $7, %esi
+4183FC07 cmpl $7, %r12d
+833807 cmpl $7, (%rax)
+837D0007 cmpl $7, (%rbp)
+833907 cmpl $7, (%rcx)
+833F07 cmpl $7, (%rdi)
+833A07 cmpl $7, (%rdx)
+833E07 cmpl $7, (%rsi)
+837C246808 cmpl $8, 104(%rsp)
+41817E1000400100 cmpl $81920, 16(%r14)
+817B2000400100 cmpl $81920, 32(%rbx)
+81FF00004131 cmpl $826343424, %edi
+837C242808 cmpl $8, 40(%rsp)
+41817C241C00500100 cmpl $86016, 28(%r12)
+41817D1C00500100 cmpl $86016, 28(%r13)
+41817F1C00500100 cmpl $86016, 28(%r15)
+817D1C00500100 cmpl $86016, 28(%rbp)
+817F1C00500100 cmpl $86016, 28(%rdi)
+81780400500100 cmpl $86016, 4(%rax)
+81FF00500100 cmpl $86016, %edi
+81FF01500100 cmpl $86017, %edi
+81FF02500100 cmpl $86018, %edi
+81FF03500100 cmpl $86019, %edi
+83780808 cmpl $8, 8(%rax)
+837C060808 cmpl $8, 8(%rsi,%rax)
+837C240808 cmpl $8, 8(%rsp)
+83F808 cmpl $8, %eax
+83FB08 cmpl $8, %ebx
+83FF08 cmpl $8, %edi
+83FA08 cmpl $8, %edx
+83FE08 cmpl $8, %esi
+4183FD08 cmpl $8, %r13d
+413B7D08 cmpl 8(%r13), %edi
+4183FE08 cmpl $8, %r14d
+4183F808 cmpl $8, %r8d
+443B7C2408 cmpl 8(%rsp), %r15d
+3D9A030000 cmpl $922, %eax
+4181FC9A030000 cmpl $922, %r12d
+81FE00700100 cmpl $94208, %esi
+81FE01700100 cmpl $94209, %esi
+81FE02700100 cmpl $94210, %esi
+83FB5E cmpl $94, %ebx
+3DBA030000 cmpl $954, %eax
+4181FCBA030000 cmpl $954, %r12d
+83FB5F cmpl $95, %ebx
+4183FC5F cmpl $95, %r12d
+83FB60 cmpl $96, %ebx
+81FADD030000 cmpl $989, %edx
+3DE7030000 cmpl $999, %eax
+83F809 cmpl $9, %eax
+4183FE09 cmpl $9, %r14d
+833809 cmpl $9, (%rax)
+39442478 cmpl %eax, 120(%rsp)
+3944247C cmpl %eax, 124(%rsp)
+3944160C cmpl %eax, 12(%rsi,%rdx)
+3984248C000000 cmpl %eax, 140(%rsp)
+394510 cmpl %eax, 16(%rbp)
+39442410 cmpl %eax, 16(%rsp)
+39442414 cmpl %eax, 20(%rsp)
+39842420010000 cmpl %eax, 288(%rsp)
+394520 cmpl %eax, 32(%rbp)
+41394604 cmpl %eax, 4(%r14)
+394704 cmpl %eax, 4(%rdi)
+394508 cmpl %eax, 8(%rbp)
+394308 cmpl %eax, 8(%rbx)
+394708 cmpl %eax, 8(%rdi)
+394208 cmpl %eax, 8(%rdx)
+394608 cmpl %eax, 8(%rsi)
+39442408 cmpl %eax, 8(%rsp)
+39C5 cmpl %eax, %ebp
+39C3 cmpl %eax, %ebx
+39C1 cmpl %eax, %ecx
+39C2 cmpl %eax, %edx
+39C6 cmpl %eax, %esi
+4139C4 cmpl %eax, %r12d
+4139C5 cmpl %eax, %r13d
+413906 cmpl %eax, (%r14)
+4139C7 cmpl %eax, %r15d
+4139C0 cmpl %eax, %r8d
+390493 cmpl %eax, (%rbx,%rdx,4)
+3907 cmpl %eax, (%rdi)
+396C020C cmpl %ebp, 12(%rdx,%rax)
+396C2404 cmpl %ebp, 4(%rsp)
+396808 cmpl %ebp, 8(%rax)
+39E8 cmpl %ebp, %eax
+39EB cmpl %ebp, %ebx
+39EA cmpl %ebp, %edx
+4139EC cmpl %ebp, %r12d
+4139ED cmpl %ebp, %r13d
+392C81 cmpl %ebp, (%rcx,%rax,4)
+392C82 cmpl %ebp, (%rdx,%rax,4)
+395C2410 cmpl %ebx, 16(%rsp)
+39D8 cmpl %ebx, %eax
+39DD cmpl %ebx, %ebp
+4139DD cmpl %ebx, %r13d
+4139DF cmpl %ebx, %r15d
+39CB cmpl %ecx, %ebx
+39CF cmpl %ecx, %edi
+39CA cmpl %ecx, %edx
+39CE cmpl %ecx, %esi
+4139CD cmpl %ecx, %r13d
+4139CE cmpl %ecx, %r14d
+4139CF cmpl %ecx, %r15d
+4139C8 cmpl %ecx, %r8d
+390B cmpl %ecx, (%rbx)
+39F8 cmpl %edi, %eax
+39F9 cmpl %edi, %ecx
+39FA cmpl %edi, %edx
+39FE cmpl %edi, %esi
+3954240C cmpl %edx, 12(%rsp)
+39542410 cmpl %edx, 16(%rsp)
+39948420010000 cmpl %edx, 288(%rsp,%rax,4)
+39948424010000 cmpl %edx, 292(%rsp,%rax,4)
+39542444 cmpl %edx, 68(%rsp)
+39D0 cmpl %edx, %eax
+39D5 cmpl %edx, %ebp
+39D3 cmpl %edx, %ebx
+39D1 cmpl %edx, %ecx
+39D7 cmpl %edx, %edi
+39D6 cmpl %edx, %esi
+4139D4 cmpl %edx, %r12d
+4139D5 cmpl %edx, %r13d
+4139D6 cmpl %edx, %r14d
+4139D7 cmpl %edx, %r15d
+3913 cmpl %edx, (%rbx)
+391487 cmpl %edx, (%rdi,%rax,4)
+391486 cmpl %edx, (%rsi,%rax,4)
+3974030C cmpl %esi, 12(%rbx,%rax)
+39F0 cmpl %esi, %eax
+39F1 cmpl %esi, %ecx
+39F2 cmpl %esi, %edx
+3934D1 cmpl %esi, (%rcx,%rdx,8)
+393487 cmpl %esi, (%rdi,%rax,4)
+4439D1 cmpl %r10d, %ecx
+4539D4 cmpl %r10d, %r12d
+4539D0 cmpl %r10d, %r8d
+4539DC cmpl %r11d, %r12d
+4539D9 cmpl %r11d, %r9d
+4439E0 cmpl %r12d, %eax
+4439E3 cmpl %r12d, %ebx
+4439AC84C0000000 cmpl %r13d, 192(%rsp,%rax,4)
+4439ED cmpl %r13d, %ebp
+4439742414 cmpl %r14d, 20(%rsp)
+4439F5 cmpl %r14d, %ebp
+4439FD cmpl %r15d, %ebp
+4439FB cmpl %r15d, %ebx
+4439F9 cmpl %r15d, %ecx
+4539FC cmpl %r15d, %r12d
+4539FE cmpl %r15d, %r14d
+4539F8 cmpl %r15d, %r8d
+4439C1 cmpl %r8d, %ecx
+4439C2 cmpl %r8d, %edx
+4439C6 cmpl %r8d, %esi
+4439CE cmpl %r9d, %esi
+3B10 cmpl (%rax), %edx
+3B02 cmpl (%rdx), %eax
+3B06 cmpl (%rsi), %eax
+3B16 cmpl (%rsi), %edx
+3B0510000000 cmpl 16(%rip), %eax
+443B2D10000000 cmpl 16(%rip), %r13d
+443B3D10000000 cmpl 16(%rip), %r15d
+3B0D14000000 cmpl 20(%rip), %ecx
+48837F1000 cmpq $0, 16(%rdi)
+48837C241000 cmpq $0, 16(%rsp)
+4883BC24C000000000 cmpq $0, 192(%rsp)
+4883BC24C800000000 cmpq $0, 200(%rsp)
+4883781800 cmpq $0, 24(%rax)
+48837B1800 cmpq $0, 24(%rbx)
+48837C241800 cmpq $0, 24(%rsp)
+4883BC240801000000 cmpq $0, 264(%rsp)
+4883BC241001000000 cmpq $0, 272(%rsp)
+49837D2000 cmpq $0, 32(%r13)
+48837D2000 cmpq $0, 32(%rbp)
+4883BC243002000000 cmpq $0, 560(%rsp)
+4883780800 cmpq $0, 8(%rax)
+48837B0800 cmpq $0, 8(%rbx)
+48837F0800 cmpq $0, 8(%rdi)
+48837CDA0800 cmpq $0, 8(%rdx,%rbx,8)
+49833CC400 cmpq $0, (%r12,%rax,8)
+49837CC50000 cmpq $0, (%r13,%rax,8)
+49833CC100 cmpq $0, (%r9,%rax,8)
+48833800 cmpq $0, (%rax)
+48833CD800 cmpq $0, (%rax,%rbx,8)
+48833CC800 cmpq $0, (%rax,%rcx,8)
+48833CD000 cmpq $0, (%rax,%rdx,8)
+48837CC50000 cmpq $0, (%rbp,%rax,8)
+48833B00 cmpq $0, (%rbx)
+48833CC300 cmpq $0, (%rbx,%rax,8)
+48833CCB00 cmpq $0, (%rbx,%rcx,8)
+48833900 cmpq $0, (%rcx)
+48833CC100 cmpq $0, (%rcx,%rax,8)
+48833F00 cmpq $0, (%rdi)
+48833CC700 cmpq $0, (%rdi,%rax,8)
+48833A00 cmpq $0, (%rdx)
+48833CC200 cmpq $0, (%rdx,%rax,8)
+48833CDA00 cmpq $0, (%rdx,%rbx,8)
+48833E00 cmpq $0, (%rsi)
+48833CC600 cmpq $0, (%rsi,%rax,8)
+48833C2400 cmpq $0, (%rsp)
+4881FFFF000000 cmpq $255, %rdi
+4881FEFFFF0000 cmpq $65535, %rsi
+4D39E8 cmpq %r13, %r8
+4D393424 cmpq %r14, (%r12)
+48394508 cmpq %rax, 8(%rbp)
+48394708 cmpq %rax, 8(%rdi)
+4839C6 cmpq %rax, %rsi
+48392CC8 cmpq %rbp, (%rax,%rcx,8)
+48394A08 cmpq %rcx, 8(%rdx)
+483914C8 cmpq %rdx, (%rax,%rcx,8)
+6683BC248E00000001 cmpw $1, 142(%rsp)
+663D8000 cmpw $128, %ax
+6681FB8000 cmpw $128, %bx
+6681F98000 cmpw $128, %cx
+6681FF8000 cmpw $128, %di
+6681FA8000 cmpw $128, %dx
+664181FB8000 cmpw $128, %r11w
+664181F88000 cmpw $128, %r8w
+664181F98000 cmpw $128, %r9w
+663D7FFF cmpw $-129, %ax
+6681FB7FFF cmpw $-129, %bx
+6681FF7FFF cmpw $-129, %di
+6681FA7FFF cmpw $-129, %dx
+664181FB7FFF cmpw $-129, %r11w
+664181F87FFF cmpw $-129, %r8w
+664181F97FFF cmpw $-129, %r9w
+6681FE7FFF cmpw $-129, %si
+6683F801 cmpw $1, %ax
+6683F901 cmpw $1, %cx
+6683FF01 cmpw $1, %di
+6683FA01 cmpw $1, %dx
+66837B1E02 cmpw $2, 30(%rbx)
+663D0001 cmpw $256, %ax
+6681FB0001 cmpw $256, %bx
+6681F90001 cmpw $256, %cx
+6681FF0001 cmpw $256, %di
+6681FA0001 cmpw $256, %dx
+664181FB0001 cmpw $256, %r11w
+664181F80001 cmpw $256, %r8w
+664181F90001 cmpw $256, %r9w
+6683F802 cmpw $2, %ax
+6683FAFE cmpw $-2, %dx
+66833C02FE cmpw $-2, (%rdx,%rax)
+66833C06FE cmpw $-2, (%rsi,%rax)
+6683F803 cmpw $3, %ax
+6641817C44180F27 cmpw $9999, 24(%r12,%rax,2)
+66394708 cmpw %ax, 8(%rdi)
+664139C1 cmpw %ax, %r9w
+6639FE cmpw %di, %si
+6639D1 cmpw %dx, %cx
+664139D1 cmpw %dx, %r9w
+664439D2 cmpw %r10w, %dx
+664439C0 cmpw %r8w, %ax
+664439C2 cmpw %r8w, %dx
+98 cwtl
+FEC8 decb %al
+FECA decb %dl
+41FECE decb %r14b
+40FECE decb %sil
+FFC8 decl %eax
+FFCD decl %ebp
+FFCB decl %ebx
+FFC9 decl %ecx
+FFCF decl %edi
+FFCA decl %edx
+FFCE decl %esi
+41FFCD decl %r13d
+41FFCE decl %r14d
+41FFCF decl %r15d
+49F7F0 divq %r8
+F7FF idivl %edi
+410FAF4508 imull 8(%r13), %eax
+410FAF4608 imull 8(%r14), %eax
+0FAF4308 imull 8(%rbx), %eax
+0FAF7A08 imull 8(%rdx), %edi
+0FAFE8 imull %eax, %ebp
+0FAFD1 imull %ecx, %edx
+440FAFC1 imull %ecx, %r8d
+0FAFC2 imull %edx, %eax
+0FAFFE imull %esi, %edi
+4869D856555555 imulq $1431655766, %rax, %rbx
+FF44246C incl 108(%rsp)
+FF442478 incl 120(%rsp)
+FF44247C incl 124(%rsp)
+FF44240C incl 12(%rsp)
+FF84248C000000 incl 140(%rsp)
+FF442410 incl 16(%rsp)
+FF442414 incl 20(%rsp)
+FF442418 incl 24(%rsp)
+FF842420010000 incl 288(%rsp)
+FF44241C incl 28(%rsp)
+FF442428 incl 40(%rsp)
+FF442438 incl 56(%rsp)
+FF442444 incl 68(%rsp)
+FFC0 incl %eax
+FFC5 incl %ebp
+FFC3 incl %ebx
+FFC1 incl %ecx
+FFC7 incl %edi
+FFC2 incl %edx
+FFC6 incl %esi
+FF0501000000 incl 1(%rip)
+FF0508000000 incl 8(%rip)
+FF0509000000 incl 9(%rip)
+FF0500000000 incl 0(%rip)
+41FFC2 incl %r10d
+41FFC4 incl %r12d
+41FFC5 incl %r13d
+41FFC6 incl %r14d
+41FF0486 incl (%r14,%rax,4)
+41FFC7 incl %r15d
+41FFC0 incl %r8d
+41FFC1 incl %r9d
+FF00 incl (%rax)
+FF059DFFFFFF incl -99(%rip)
+49FFC5 incq %r13
+48FFC0 incq %rax
+48FFC5 incq %rbp
+48FFC3 incq %rbx
+48FFC7 incq %rdi
+48FFC6 incq %rsi
+48FF0521000000 incq 33(%rip)
+FF24C59E0F0000 jmp *3998(,%rax,8)
+FFE2 jmp *%rdx
+468D24F500000000 leal 0(,%r14,8), %r12d
+8D04D500000000 leal 0(,%rdx,8), %eax
+8D3CD500000000 leal 0(,%rdx,8), %edi
+8D14B500000000 leal 0(,%rsi,4), %edx
+8D14F500000000 leal 0(,%rsi,8), %edx
+8D5890 leal -112(%rax), %ebx
+8D4390 leal -112(%rbx), %eax
+8D5880 leal -128(%rax), %ebx
+8D7880 leal -128(%rax), %edi
+448DA07FFFFFFF leal -129(%rax), %r12d
+448DA070FFFFFF leal -144(%rax), %r12d
+448DB070FFFFFF leal -144(%rax), %r14d
+8D9A50FFFFFF leal -176(%rdx), %ebx
+8D9848FFFFFF leal -184(%rax), %ebx
+8D9A48FFFFFF leal -184(%rdx), %ebx
+8DA840FFFFFF leal -192(%rax), %ebp
+418D4424FF leal -1(%r12), %eax
+418D442401 leal 1(%r12), %eax
+418D5C2401 leal 1(%r12), %ebx
+418D7C2401 leal 1(%r12), %edi
+418D45FF leal -1(%r13), %eax
+418D4501 leal 1(%r13), %eax
+418D46FF leal -1(%r14), %eax
+418D4601 leal 1(%r14), %eax
+418D7EFF leal -1(%r14), %edi
+418D4701 leal 1(%r15), %eax
+418D4801 leal 1(%r8), %ecx
+8D3CC5FFFFFFFF leal -1(,%rax,8), %edi
+448D6001 leal 1(%rax), %r12d
+428D6C20FF leal -1(%rax,%r12), %ebp
+428D5420FF leal -1(%rax,%r12), %edx
+8D4428FF leal -1(%rax,%rbp), %eax
+8D5C28FF leal -1(%rax,%rbp), %ebx
+8D4418FF leal -1(%rax,%rbx), %eax
+448D7C1801 leal 1(%rax,%rbx), %r15d
+8D45FF leal -1(%rbp), %eax
+8D4501 leal 1(%rbp), %eax
+8D7DFF leal -1(%rbp), %edi
+8D7D01 leal 1(%rbp), %edi
+8D75FF leal -1(%rbp), %esi
+448D6501 leal 1(%rbp), %r12d
+448D6D01 leal 1(%rbp), %r13d
+448D641DFF leal -1(%rbp,%rbx), %r12d
+8D43FF leal -1(%rbx), %eax
+8D7B01 leal 1(%rbx), %edi
+8D5301 leal 1(%rbx), %edx
+8D41FF leal -1(%rcx), %eax
+8D4101 leal 1(%rcx), %eax
+8D7901 leal 1(%rcx), %edi
+468D440101 leal 1(%rcx,%r8), %r8d
+8D541101 leal 1(%rcx,%rdx), %edx
+8D4701 leal 1(%rdi), %eax
+8D6FFF leal -1(%rdi), %ebp
+8D5701 leal 1(%rdi), %edx
+8D42FF leal -1(%rdx), %eax
+8D4201 leal 1(%rdx), %eax
+8D7A01 leal 1(%rdx), %edi
+468D440201 leal 1(%rdx,%r8), %r8d
+8D440201 leal 1(%rdx,%rax), %eax
+448D542A01 leal 1(%rdx,%rbp), %r10d
+8D5C1A01 leal 1(%rdx,%rbx), %ebx
+8D4C0A01 leal 1(%rdx,%rcx), %ecx
+8D7C3A01 leal 1(%rdx,%rdi), %edi
+8D743201 leal 1(%rdx,%rsi), %esi
+8D46FF leal -1(%rsi), %eax
+8D4601 leal 1(%rsi), %eax
+8D7C3E01 leal 1(%rsi,%rdi), %edi
+8DA838FFFFFF leal -200(%rax), %ebp
+448DB038FFFFFF leal -200(%rax), %r14d
+8DA830FFFFFF leal -208(%rax), %ebp
+8D9830FFFFFF leal -208(%rax), %ebx
+8D42EC leal -20(%rdx), %eax
+8D9828FFFFFF leal -216(%rax), %ebx
+8D9820FFFFFF leal -224(%rax), %ebx
+8D9818FFFFFF leal -232(%rax), %ebx
+8D43E8 leal -24(%rbx), %eax
+418D47FE leal -2(%r15), %eax
+418D41FE leal -2(%r9), %eax
+8D048502000000 leal 2(,%rax,4), %eax
+8D6802 leal 2(%rax), %ebp
+8D45FE leal -2(%rbp), %eax
+8D5D02 leal 2(%rbp), %ebx
+8D7D02 leal 2(%rbp), %edi
+8D5502 leal 2(%rbp), %edx
+8D7502 leal 2(%rbp), %esi
+448D6D02 leal 2(%rbp), %r13d
+8D4302 leal 2(%rbx), %eax
+8D7902 leal 2(%rcx), %edi
+8D5702 leal 2(%rdi), %edx
+8D4602 leal 2(%rsi), %eax
+8D42E0 leal -32(%rdx), %eax
+418D4626 leal 38(%r14), %eax
+8D6803 leal 3(%rax), %ebp
+8D5D03 leal 3(%rbp), %ebx
+8D7D03 leal 3(%rbp), %edi
+8D5503 leal 3(%rbp), %edx
+8D7503 leal 3(%rbp), %esi
+448D6503 leal 3(%rbp), %r12d
+448D6D03 leal 3(%rbp), %r13d
+8D4703 leal 3(%rdi), %eax
+8D4203 leal 3(%rdx), %eax
+8D6C2A03 leal 3(%rdx,%rbp), %ebp
+8D4603 leal 3(%rsi), %eax
+8D54122B leal 43(%rdx,%rdx), %edx
+418D4630 leal 48(%r14), %eax
+8D6C28D0 leal -48(%rax,%rbp), %ebp
+8D42D0 leal -48(%rdx), %eax
+448D7C1804 leal 4(%rax,%rbx), %r15d
+8D4504 leal 4(%rbp), %eax
+8D7DFC leal -4(%rbp), %edi
+8D7D04 leal 4(%rbp), %edi
+8D41FC leal -4(%rcx), %eax
+8D47FC leal -4(%rdi), %eax
+8D42FC leal -4(%rdx), %eax
+8D6C2A04 leal 4(%rdx,%rbp), %ebp
+8D46FC leal -4(%rsi), %eax
+8D4EFC leal -4(%rsi), %ecx
+448D68C0 leal -64(%rax), %r13d
+8D3CDD40000000 leal 64(,%rbx,8), %edi
+8D3CFD40000000 leal 64(,%rdi,8), %edi
+8D8701F0FEFF leal -69631(%rdi), %eax
+8D83FFEFFEFF leal -69633(%rbx), %eax
+8D81FFEFFEFF leal -69633(%rcx), %eax
+8D87FFEFFEFF leal -69633(%rdi), %eax
+8D82FFEFFEFF leal -69633(%rdx), %eax
+478DAC2D02100100 leal 69634(%r13,%r13), %r13d
+448D68B8 leal -72(%rax), %r13d
+8D81FDDFFEFF leal -73731(%rcx), %eax
+8D87FDDFFEFF leal -73731(%rdi), %eax
+8D82FDDFFEFF leal -73731(%rdx), %eax
+8D87FFCFFEFF leal -77825(%rdi), %eax
+8D81F3CFFEFF leal -77837(%rcx), %eax
+418D86F4CEFEFF leal -78092(%r14), %eax
+8D43F9 leal -7(%rbx), %eax
+8D4207 leal 7(%rdx), %eax
+448D60B0 leal -80(%rax), %r12d
+448D68B0 leal -80(%rax), %r13d
+8D8700C0FEFF leal -81920(%rdi), %eax
+8D58A8 leal -88(%rax), %ebx
+8D5AA8 leal -88(%rdx), %ebx
+418D850090FEFF leal -94208(%r13), %eax
+8D429F leal -97(%rdx), %eax
+438D042C leal (%r12,%r13), %eax
+418D2C19 leal (%r9,%rbx), %ebp
+458D0C09 leal (%r9,%rcx), %r9d
+428D3C60 leal (%rax,%r12,2), %edi
+428D3C28 leal (%rax,%r13), %edi
+8D0440 leal (%rax,%rax,2), %eax
+8D3C00 leal (%rax,%rax), %edi
+448D3C28 leal (%rax,%rbp), %r15d
+8D0498 leal (%rax,%rbx,4), %eax
+8D04D8 leal (%rax,%rbx,8), %eax
+448D3C18 leal (%rax,%rbx), %r15d
+8D0410 leal (%rax,%rdx), %eax
+428D442500 leal (%rbp,%r12), %eax
+428D5C2500 leal (%rbp,%r12), %ebx
+428D742500 leal (%rbp,%r12), %esi
+448D441D00 leal (%rbp,%rbx), %r8d
+8D3C2B leal (%rbx,%rbp), %edi
+8D342B leal (%rbx,%rbp), %esi
+8D3C09 leal (%rcx,%rcx), %edi
+8D049F leal (%rdi,%rbx,4), %eax
+8D3C0F leal (%rdi,%rcx), %edi
+448D1C2A leal (%rdx,%rbp), %r11d
+8D141A leal (%rdx,%rbx), %edx
+448D143A leal (%rdx,%rdi), %r10d
+8D0412 leal (%rdx,%rdx), %eax
+8D3C12 leal (%rdx,%rdx), %edi
+8D3476 leal (%rsi,%rsi,2), %esi
+8D0436 leal (%rsi,%rsi), %eax
+8D1436 leal (%rsi,%rsi), %edx
+4C8D2C8500000000 leaq 0(,%rax,4), %r13
+488D1C8500000000 leaq 0(,%rax,4), %rbx
+488D0C8500000000 leaq 0(,%rax,4), %rcx
+488D3C8500000000 leaq 0(,%rax,4), %rdi
+488D148500000000 leaq 0(,%rax,4), %rdx
+488D049500000000 leaq 0(,%rdx,4), %rax
+488D542464 leaq 100(%rsp), %rdx
+488D4C2468 leaq 104(%rsp), %rcx
+4C8D44246C leaq 108(%rsp), %r8
+4C8D7C2470 leaq 112(%rsp), %r15
+488D7C2474 leaq 116(%rsp), %rdi
+488D742478 leaq 120(%rsp), %rsi
+4C8DBC2480000000 leaq 128(%rsp), %r15
+488D7C240C leaq 12(%rsp), %rdi
+488D74240C leaq 12(%rsp), %rsi
+4C8D842490000000 leaq 144(%rsp), %r8
+488D9C2490000000 leaq 144(%rsp), %rbx
+488DBC2490000000 leaq 144(%rsp), %rdi
+488DBC2497000000 leaq 151(%rsp), %rdi
+488D942498000000 leaq 152(%rsp), %rdx
+488D8424A0000000 leaq 160(%rsp), %rax
+488DBC24A8000000 leaq 168(%rsp), %rdi
+488DB424A8000000 leaq 168(%rsp), %rsi
+488D7D10 leaq 16(%rbp), %rdi
+488D7B10 leaq 16(%rbx), %rdi
+488D7210 leaq 16(%rdx), %rsi
+4C8D6C2410 leaq 16(%rsp), %r13
+4C8D742410 leaq 16(%rsp), %r14
+4C8D7C2410 leaq 16(%rsp), %r15
+488D4C2410 leaq 16(%rsp), %rcx
+488D542410 leaq 16(%rsp), %rdx
+488D742410 leaq 16(%rsp), %rsi
+488DBC24AC000000 leaq 172(%rsp), %rdi
+488D9424AC000000 leaq 172(%rsp), %rdx
+4C8D8424B0000000 leaq 176(%rsp), %r8
+488DBC24B0000000 leaq 176(%rsp), %rdi
+488D7311 leaq 17(%rbx), %rsi
+488DBC24B4000000 leaq 180(%rsp), %rdi
+488DBC24B8000000 leaq 184(%rsp), %rdi
+488DBC24BC000000 leaq 188(%rsp), %rdi
+488DB424BC000000 leaq 188(%rsp), %rsi
+498D6F12 leaq 18(%r15), %rbp
+4C8DAC24C0000000 leaq 192(%rsp), %r13
+488DBC24C0000000 leaq 192(%rsp), %rdi
+498D4701 leaq 1(%r15), %rax
+498D7F01 leaq 1(%r15), %rdi
+488D4501 leaq 1(%rbp), %rax
+488D7B01 leaq 1(%rbx), %rdi
+488D7901 leaq 1(%rcx), %rdi
+488D8424CF000000 leaq 207(%rsp), %rax
+4C8D8C24D0000000 leaq 208(%rsp), %r9
+488D8C24D0000000 leaq 208(%rsp), %rcx
+488DBC24D0000000 leaq 208(%rsp), %rdi
+488D9424D0000000 leaq 208(%rsp), %rdx
+4C8D642414 leaq 20(%rsp), %r12
+488D4C2414 leaq 20(%rsp), %rcx
+488D542414 leaq 20(%rsp), %rdx
+488D8424E0000000 leaq 224(%rsp), %rax
+4C8DAC24F0000000 leaq 240(%rsp), %r13
+488D8424F0000000 leaq 240(%rsp), %rax
+488DBC24F0000000 leaq 240(%rsp), %rdi
+488D742418 leaq 24(%rsp), %rsi
+4C8DAC2410010000 leaq 272(%rsp), %r13
+488D8C2410010000 leaq 272(%rsp), %rcx
+488D7C241C leaq 28(%rsp), %rdi
+498D7F02 leaq 2(%r15), %rdi
+488D7902 leaq 2(%rcx), %rdi
+488DBC2444010000 leaq 324(%rsp), %rdi
+4C8D6C2420 leaq 32(%rsp), %r13
+4C8D742420 leaq 32(%rsp), %r14
+4C8D442420 leaq 32(%rsp), %r8
+488D442420 leaq 32(%rsp), %rax
+488D5C2420 leaq 32(%rsp), %rbx
+488D4C2420 leaq 32(%rsp), %rcx
+488D542420 leaq 32(%rsp), %rdx
+488D742420 leaq 32(%rsp), %rsi
+4C8DBC244B010000 leaq 331(%rsp), %r15
+488DBC244C010000 leaq 332(%rsp), %rdi
+488D9C2450010000 leaq 336(%rsp), %rbx
+488D8C2450010000 leaq 336(%rsp), %rcx
+488DBC2450010000 leaq 336(%rsp), %rdi
+488DBC2454010000 leaq 340(%rsp), %rdi
+488DBC2458010000 leaq 344(%rsp), %rdi
+488DBC2460010000 leaq 352(%rsp), %rdi
+488DBC2464010000 leaq 356(%rsp), %rdi
+488DBC2468010000 leaq 360(%rsp), %rdi
+488DBC246C010000 leaq 364(%rsp), %rdi
+488DBC2470010000 leaq 368(%rsp), %rdi
+488D7C2424 leaq 36(%rsp), %rdi
+4C8DBC2477010000 leaq 375(%rsp), %r15
+488DB42478010000 leaq 376(%rsp), %rsi
+488D94247C010000 leaq 380(%rsp), %rdx
+488D8C2480010000 leaq 384(%rsp), %rcx
+4C8D842484010000 leaq 388(%rsp), %r8
+488DB42488010000 leaq 392(%rsp), %rsi
+488D94248C010000 leaq 396(%rsp), %rdx
+498D7F03 leaq 3(%r15), %rdi
+488D7903 leaq 3(%rcx), %rdi
+4C8DAC2490010000 leaq 400(%rsp), %r13
+488D8C2490010000 leaq 400(%rsp), %rcx
+488D942490010000 leaq 400(%rsp), %rdx
+488DB42490010000 leaq 400(%rsp), %rsi
+4C8D842494010000 leaq 404(%rsp), %r8
+488DB42498010000 leaq 408(%rsp), %rsi
+488D4C2428 leaq 40(%rsp), %rcx
+488D742428 leaq 40(%rsp), %rsi
+488D94249C010000 leaq 412(%rsp), %rdx
+488D8C24A0010000 leaq 416(%rsp), %rcx
+4C8D8424A4010000 leaq 420(%rsp), %r8
+488DB424A8010000 leaq 424(%rsp), %rsi
+488D9424AC010000 leaq 428(%rsp), %rdx
+488D8C24B0010000 leaq 432(%rsp), %rcx
+4C8D8424B4010000 leaq 436(%rsp), %r8
+488D7C242B leaq 43(%rsp), %rdi
+488DB424B8010000 leaq 440(%rsp), %rsi
+488D9424BC010000 leaq 444(%rsp), %rdx
+488D8C24C0010000 leaq 448(%rsp), %rcx
+4C8D44242C leaq 44(%rsp), %r8
+488D7C242C leaq 44(%rsp), %rdi
+488D74242C leaq 44(%rsp), %rsi
+4C8D8424C4010000 leaq 452(%rsp), %r8
+488DBC24C8010000 leaq 456(%rsp), %rdi
+488DB424CC010000 leaq 460(%rsp), %rsi
+488D9424D0010000 leaq 464(%rsp), %rdx
+488D8C24D4010000 leaq 468(%rsp), %rcx
+4C8D8424D8010000 leaq 472(%rsp), %r8
+488DB424DC010000 leaq 476(%rsp), %rsi
+488D9424E0010000 leaq 480(%rsp), %rdx
+488D8C24E4010000 leaq 484(%rsp), %rcx
+4C8D8424E8010000 leaq 488(%rsp), %r8
+498D5C9C30 leaq 48(%r12,%rbx,4), %rbx
+498D448530 leaq 48(%r13,%rax,4), %rax
+488D440530 leaq 48(%rbp,%rax), %rax
+488D4C0330 leaq 48(%rbx,%rax), %rcx
+4C8D442430 leaq 48(%rsp), %r8
+488D6C2430 leaq 48(%rsp), %rbp
+488D4C2430 leaq 48(%rsp), %rcx
+488D742430 leaq 48(%rsp), %rsi
+488DB424EC010000 leaq 492(%rsp), %rsi
+488D9424F0010000 leaq 496(%rsp), %rdx
+488D441804 leaq 4(%rax,%rbx), %rax
+488D8C24F4010000 leaq 500(%rsp), %rcx
+4C8D8424F8010000 leaq 504(%rsp), %r8
+488DB424FC010000 leaq 508(%rsp), %rsi
+488D942400020000 leaq 512(%rsp), %rdx
+488D8C2404020000 leaq 516(%rsp), %rcx
+4C8D842408020000 leaq 520(%rsp), %r8
+488DB4240C020000 leaq 524(%rsp), %rsi
+488D942410020000 leaq 528(%rsp), %rdx
+488D542434 leaq 52(%rsp), %rdx
+488D8C2414020000 leaq 532(%rsp), %rcx
+4C8D842418020000 leaq 536(%rsp), %r8
+488DB4241C020000 leaq 540(%rsp), %rsi
+488D942420020000 leaq 544(%rsp), %rdx
+488D8C2424020000 leaq 548(%rsp), %rcx
+4C8D842428020000 leaq 552(%rsp), %r8
+488DBC242C020000 leaq 556(%rsp), %rdi
+4C8DB42440020000 leaq 576(%rsp), %r14
+488D8C2440020000 leaq 576(%rsp), %rcx
+488D942440020000 leaq 576(%rsp), %rdx
+488D7C243C leaq 60(%rsp), %rdi
+488D8C2480020000 leaq 640(%rsp), %rcx
+488D942480020000 leaq 640(%rsp), %rdx
+4C8D742440 leaq 64(%rsp), %r14
+488D4C2440 leaq 64(%rsp), %rcx
+488D742440 leaq 64(%rsp), %rsi
+488DBC24A0020000 leaq 672(%rsp), %rdi
+488D8C24C0020000 leaq 704(%rsp), %rcx
+4C8DAC2400030000 leaq 768(%rsp), %r13
+4C8DB42400030000 leaq 768(%rsp), %r14
+488D8C2400030000 leaq 768(%rsp), %rcx
+488D942400030000 leaq 768(%rsp), %rdx
+488D7C244C leaq 76(%rsp), %rdi
+488D4C2450 leaq 80(%rsp), %rcx
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+488D942480030000 leaq 896(%rsp), %rdx
+488DB42480030000 leaq 896(%rsp), %rsi
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+488D0492 leaq (%rdx,%rdx,4), %rax
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+488D04B6 leaq (%rsi,%rsi,4), %rax
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+48C744C50000000000 movq $0, (%rbp,%rax,8)
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+48894520 movq %rax, 32(%rbp)
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+4889442420 movq %rax, 32(%rsp)
+4889442428 movq %rax, 40(%rsp)
+4889442430 movq %rax, 48(%rsp)
+4889442438 movq %rax, 56(%rsp)
+4889442450 movq %rax, 80(%rsp)
+4889442458 movq %rax, 88(%rsp)
+4989442408 movq %rax, 8(%r12)
+49894608 movq %rax, 8(%r14)
+49894708 movq %rax, 8(%r15)
+48894508 movq %rax, 8(%rbp)
+48894308 movq %rax, 8(%rbx)
+48894108 movq %rax, 8(%rcx)
+488944D1F8 movq %rax, -8(%rcx,%rdx,8)
+48894608 movq %rax, 8(%rsi)
+4889442408 movq %rax, 8(%rsp)
+4889442460 movq %rax, 96(%rsp)
+4889057DEF0500 movq %rax, 388989(%rip)
+49890424 movq %rax, (%r12)
+4989C4 movq %rax, %r12
+4A8B1CE0 movq (%rax,%r12,8), %rbx
+498904DC movq %rax, (%r12,%rbx,8)
+49894500 movq %rax, (%r13)
+4989C5 movq %rax, %r13
+4E8B24E8 movq (%rax,%r13,8), %r12
+498944DD00 movq %rax, (%r13,%rbx,8)
+498944D500 movq %rax, (%r13,%rdx,8)
+498906 movq %rax, (%r14)
+4989C6 movq %rax, %r14
+498904DE movq %rax, (%r14,%rbx,8)
+4989C7 movq %rax, %r15
+4A8B04F8 movq (%rax,%r15,8), %rax
+4989C0 movq %rax, %r8
+498904D0 movq %rax, (%r8,%rdx,8)
+4989C1 movq %rax, %r9
+498904D1 movq %rax, (%r9,%rdx,8)
+488B00 movq (%rax), %rax
+48894500 movq %rax, (%rbp)
+4889C5 movq %rax, %rbp
+488B1CE8 movq (%rax,%rbp,8), %rbx
+488944DD00 movq %rax, (%rbp,%rbx,8)
+488903 movq %rax, (%rbx)
+4889C3 movq %rax, %rbx
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+488B14D8 movq (%rax,%rbx,8), %rdx
+488B34D8 movq (%rax,%rbx,8), %rsi
+4A8904E3 movq %rax, (%rbx,%r12,8)
+4889C1 movq %rax, %rcx
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+488B04C8 movq (%rax,%rcx,8), %rax
+488B34C8 movq (%rax,%rcx,8), %rsi
+488904F1 movq %rax, (%rcx,%rsi,8)
+488B38 movq (%rax), %rdi
+4889C7 movq %rax, %rdi
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+488B34F8 movq (%rax,%rdi,8), %rsi
+488904D7 movq %rax, (%rdi,%rdx,8)
+488902 movq %rax, (%rdx)
+4889C2 movq %rax, %rdx
+4C8B24D0 movq (%rax,%rdx,8), %r12
+4C8B2CD0 movq (%rax,%rdx,8), %r13
+4C8B34D0 movq (%rax,%rdx,8), %r14
+488B04D0 movq (%rax,%rdx,8), %rax
+488B2CD0 movq (%rax,%rdx,8), %rbp
+488B1CD0 movq (%rax,%rdx,8), %rbx
+488B3CD0 movq (%rax,%rdx,8), %rdi
+488B14D0 movq (%rax,%rdx,8), %rdx
+488B34D0 movq (%rax,%rdx,8), %rsi
+4A8904E2 movq %rax, (%rdx,%r12,8)
+4A8904EA movq %rax, (%rdx,%r13,8)
+4A8904FA movq %rax, (%rdx,%r15,8)
+488904EA movq %rax, (%rdx,%rbp,8)
+488904DA movq %rax, (%rdx,%rbx,8)
+488906 movq %rax, (%rsi)
+4889C6 movq %rax, %rsi
+488B3CF0 movq (%rax,%rsi,8), %rdi
+488904CE movq %rax, (%rsi,%rcx,8)
+48890424 movq %rax, (%rsp)
+48890510000000 movq %rax, 16(%rip)
+48890508000000 movq %rax, 8(%rip)
+48890500000000 movq %rax, (%rip)
+48896C24F0 movq %rbp, -16(%rsp)
+48896C24E8 movq %rbp, -24(%rsp)
+48896C24E0 movq %rbp, -32(%rsp)
+48896C24D8 movq %rbp, -40(%rsp)
+48896808 movq %rbp, 8(%rax)
+48896C24F8 movq %rbp, -8(%rsp)
+48896C2460 movq %rbp, 96(%rsp)
+4989E8 movq %rbp, %r8
+4989E9 movq %rbp, %r9
+4889E8 movq %rbp, %rax
+488B5CC500 movq (%rbp,%rax,8), %rbx
+48892CC8 movq %rbp, (%rax,%rcx,8)
+488B7CDD00 movq (%rbp,%rbx,8), %rdi
+4889E9 movq %rbp, %rcx
+488B7D00 movq (%rbp), %rdi
+4889EF movq %rbp, %rdi
+488B5500 movq (%rbp), %rdx
+4889EA movq %rbp, %rdx
+48892CC2 movq %rbp, (%rdx,%rax,8)
+488B7500 movq (%rbp), %rsi
+4889EE movq %rbp, %rsi
+48895C2470 movq %rbx, 112(%rsp)
+48895810 movq %rbx, 16(%rax)
+48895C24F0 movq %rbx, -16(%rsp)
+48895C24E8 movq %rbx, -24(%rsp)
+48895C24E0 movq %rbx, -32(%rsp)
+48895C24D8 movq %rbx, -40(%rsp)
+48895C24D0 movq %rbx, -48(%rsp)
+48895804 movq %rbx, 4(%rax)
+48899C2430020000 movq %rbx, 560(%rsp)
+48895808 movq %rbx, 8(%rax)
+4A8B34E3 movq (%rbx,%r12,8), %rsi
+49895D00 movq %rbx, (%r13)
+4989D8 movq %rbx, %r8
+488B03 movq (%rbx), %rax
+488918 movq %rbx, (%rax)
+4889D8 movq %rbx, %rax
+4889D9 movq %rbx, %rcx
+488B04CB movq (%rbx,%rcx,8), %rax
+488B3B movq (%rbx), %rdi
+4889DF movq %rbx, %rdi
+488B13 movq (%rbx), %rdx
+4889DA movq %rbx, %rdx
+488B33 movq (%rbx), %rsi
+4889DE movq %rbx, %rsi
+48891C24 movq %rbx, (%rsp)
+48898C2490000000 movq %rcx, 144(%rsp)
+48894C2418 movq %rcx, 24(%rsp)
+48894C2420 movq %rcx, 32(%rsp)
+48894C2428 movq %rcx, 40(%rsp)
+48894C2438 movq %rcx, 56(%rsp)
+48894C2440 movq %rcx, 64(%rsp)
+4989CC movq %rcx, %r12
+4989CD movq %rcx, %r13
+4A8B2CE9 movq (%rcx,%r13,8), %rbp
+4989CE movq %rcx, %r14
+49890CC6 movq %rcx, (%r14,%rax,8)
+4989CF movq %rcx, %r15
+4989C8 movq %rcx, %r8
+488B01 movq (%rcx), %rax
+4889C8 movq %rcx, %rax
+4C8B24C1 movq (%rcx,%rax,8), %r12
+4C8B2CC1 movq (%rcx,%rax,8), %r13
+488B04C1 movq (%rcx,%rax,8), %rax
+488B34C1 movq (%rcx,%rax,8), %rsi
+488B39 movq (%rcx), %rdi
+4889CF movq %rcx, %rdi
+4889CA movq %rcx, %rdx
+4889CE movq %rcx, %rsi
+488B1CF1 movq (%rcx,%rsi,8), %rbx
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+4889BC24A0000000 movq %rdi, 160(%rsp)
+48897C2420 movq %rdi, 32(%rsp)
+48897C2448 movq %rdi, 72(%rsp)
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+4989FA movq %rdi, %r10
+4989FB movq %rdi, %r11
+4989FC movq %rdi, %r12
+4989FD movq %rdi, %r13
+4C8B37 movq (%rdi), %r14
+4989FE movq %rdi, %r14
+4989FF movq %rdi, %r15
+4989F8 movq %rdi, %r8
+4C8B0F movq (%rdi), %r9
+4989F9 movq %rdi, %r9
+488B07 movq (%rdi), %rax
+4889F8 movq %rdi, %rax
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+488B14C7 movq (%rdi,%rax,8), %rdx
+48897D00 movq %rdi, (%rbp)
+4889FD movq %rdi, %rbp
+4889FB movq %rdi, %rbx
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+488B17 movq (%rdi), %rdx
+4889FA movq %rdi, %rdx
+488B04D7 movq (%rdi,%rdx,8), %rax
+4889FE movq %rdi, %rsi
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+48893D5348F2FF movq %rdi, -898989(%rip)
+4889942480000000 movq %rdx, 128(%rsp)
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+4889542410 movq %rdx, 16(%rsp)
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+4889542420 movq %rdx, 32(%rsp)
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+4889D5 movq %rdx, %rbp
+4889D3 movq %rdx, %rbx
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+4889D1 movq %rdx, %rcx
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+488B12 movq (%rdx), %rdx
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+4889742408 movq %rsi, 8(%rsp)
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+4989F2 movq %rsi, %r10
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+4C8B0C24 movq (%rsp), %r9
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+4889E2 movq %rsp, %rdx
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+488B3D42000000 movq 66(%rip), %rdi
+4489E0 movl %r12d, %eax
+4489E8 movl %r13d, %eax
+4489EA movl %r13d, %edx
+4489F7 movl %r14d, %edi
+4489F8 movl %r15d, %eax
+4489FB movl %r15d, %ebx
+4489FE movl %r15d, %esi
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+448B02 movl (%rdx), %r8d
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+0FBEC8 movsbl %al,%ecx
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+0FBEDB movsbl %bl,%ebx
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+0FBEC2 movsbl %dl,%eax
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+0FB67C241A movzbl 26(%rsp), %edi
+0FB68C240E010000 movzbl 270(%rsp), %ecx
+0FB6BC240E010000 movzbl 270(%rsp), %edi
+0FB6B4240E010000 movzbl 270(%rsp), %esi
+440FB6A4240E010000 movzbl 270(%rsp), %r12d
+0FB69C240F010000 movzbl 271(%rsp), %ebx
+0FB6BC240F010000 movzbl 271(%rsp), %edi
+0FB694240F010000 movzbl 271(%rsp), %edx
+440FB6A4240F010000 movzbl 271(%rsp), %r12d
+440FB6B4240F010000 movzbl 271(%rsp), %r14d
+0FB65C241B movzbl 27(%rsp), %ebx
+440FB66C241B movzbl 27(%rsp), %r13d
+0FB6842418010000 movzbl 280(%rsp), %eax
+410FB6442402 movzbl 2(%r12), %eax
+410FB65C2402 movzbl 2(%r12), %ebx
+410FB64C2402 movzbl 2(%r12), %ecx
+410FB67C2402 movzbl 2(%r12), %edi
+410FB6542402 movzbl 2(%r12), %edx
+450FB6642402 movzbl 2(%r12), %r12d
+450FB66C2402 movzbl 2(%r12), %r13d
+450FB67C2402 movzbl 2(%r12), %r15d
+460FB6642002 movzbl 2(%rax,%r12), %r12d
+0FB6540F02 movzbl 2(%rdi,%rcx), %edx
+0FB64C241E movzbl 30(%rsp), %ecx
+0FB67C241E movzbl 30(%rsp), %edi
+0FB654241E movzbl 30(%rsp), %edx
+0FB65C241F movzbl 31(%rsp), %ebx
+0FB64C241F movzbl 31(%rsp), %ecx
+0FB67C241F movzbl 31(%rsp), %edi
+440FB664241F movzbl 31(%rsp), %r12d
+440FB67C241F movzbl 31(%rsp), %r15d
+0FB64C2420 movzbl 32(%rsp), %ecx
+0FB65C2423 movzbl 35(%rsp), %ebx
+0FB67C2423 movzbl 35(%rsp), %edi
+440FB6642423 movzbl 35(%rsp), %r12d
+0FB64C2426 movzbl 38(%rsp), %ecx
+0FB67C2426 movzbl 38(%rsp), %edi
+0FB6542426 movzbl 38(%rsp), %edx
+440FB6442426 movzbl 38(%rsp), %r8d
+0FB6442427 movzbl 39(%rsp), %eax
+0FB66C2427 movzbl 39(%rsp), %ebp
+0FB65C2427 movzbl 39(%rsp), %ebx
+0FB64C2427 movzbl 39(%rsp), %ecx
+0FB67C2427 movzbl 39(%rsp), %edi
+0FB6542427 movzbl 39(%rsp), %edx
+0FB6742427 movzbl 39(%rsp), %esi
+440FB66C2427 movzbl 39(%rsp), %r13d
+410FB6442403 movzbl 3(%r12), %eax
+410FB65C2403 movzbl 3(%r12), %ebx
+410FB6742403 movzbl 3(%r12), %esi
+450FB6642403 movzbl 3(%r12), %r12d
+450FB6742403 movzbl 3(%r12), %r14d
+460FB6642003 movzbl 3(%rax,%r12), %r12d
+0FB6440F03 movzbl 3(%rdi,%rcx), %eax
+0FB654242A movzbl 42(%rsp), %edx
+0FB644242B movzbl 43(%rsp), %eax
+0FB65C242B movzbl 43(%rsp), %ebx
+0FB67C242B movzbl 43(%rsp), %edi
+0FB674242B movzbl 43(%rsp), %esi
+440FB664242B movzbl 43(%rsp), %r12d
+0FB6452C movzbl 44(%rbp), %eax
+0FB644242E movzbl 46(%rsp), %eax
+0FB674242E movzbl 46(%rsp), %esi
+0FB644242F movzbl 47(%rsp), %eax
+0FB65C242F movzbl 47(%rsp), %ebx
+0FB67C242F movzbl 47(%rsp), %edi
+440FB664242F movzbl 47(%rsp), %r12d
+440FB66C242F movzbl 47(%rsp), %r13d
+0FB6442430 movzbl 48(%rsp), %eax
+0FB65C2430 movzbl 48(%rsp), %ebx
+0FB6542430 movzbl 48(%rsp), %edx
+0FB6742430 movzbl 48(%rsp), %esi
+450FB6642404 movzbl 4(%r12), %r12d
+0FB65C2437 movzbl 55(%rsp), %ebx
+0FB67C2437 movzbl 55(%rsp), %edi
+440FB6642437 movzbl 55(%rsp), %r12d
+0FB644243B movzbl 59(%rsp), %eax
+0FB67C243B movzbl 59(%rsp), %edi
+0FB674243B movzbl 59(%rsp), %esi
+0FB66C243C movzbl 60(%rsp), %ebp
+0FB67C243D movzbl 61(%rsp), %edi
+0FB654243D movzbl 61(%rsp), %edx
+440FB644243E movzbl 62(%rsp), %r8d
+0FB64C2440 movzbl 64(%rsp), %ecx
+0FB65C2443 movzbl 67(%rsp), %ebx
+0FB67C2443 movzbl 67(%rsp), %edi
+0FB674244B movzbl 75(%rsp), %esi
+0FB64C244F movzbl 79(%rsp), %ecx
+0FB67C244F movzbl 79(%rsp), %edi
+0FB654244F movzbl 79(%rsp), %edx
+440FB644244F movzbl 79(%rsp), %r8d
+0FB65C2407 movzbl 7(%rsp), %ebx
+0FB64C2407 movzbl 7(%rsp), %ecx
+0FB67C2407 movzbl 7(%rsp), %edi
+0FB6542407 movzbl 7(%rsp), %edx
+440FB6642407 movzbl 7(%rsp), %r12d
+0FB66C2457 movzbl 87(%rsp), %ebp
+0FB65C2457 movzbl 87(%rsp), %ebx
+0FB64008 movzbl 8(%rax), %eax
+0FB64808 movzbl 8(%rax), %ecx
+0FB67808 movzbl 8(%rax), %edi
+0FB64708 movzbl 8(%rdi), %eax
+0FB67F08 movzbl 8(%rdi), %edi
+0FB67708 movzbl 8(%rdi), %esi
+0FB64A08 movzbl 8(%rdx), %ecx
+0FB64608 movzbl 8(%rsi), %eax
+0FB65608 movzbl 8(%rsi), %edx
+0FB654245F movzbl 95(%rsp), %edx
+0FB6442460 movzbl 96(%rsp), %eax
+0FB64C2460 movzbl 96(%rsp), %ecx
+0FB6DC movzbl %ah, %ebx
+0FB6D4 movzbl %ah, %edx
+0FB6C0 movzbl %al, %eax
+0FB6E8 movzbl %al, %ebp
+0FB6D8 movzbl %al, %ebx
+0FB6C8 movzbl %al, %ecx
+0FB6F8 movzbl %al, %edi
+0FB6F8 movzbl %al, %edi
+0FB6F8 movzbl %al,%edi
+0FB6D0 movzbl %al, %edx
+0FB6D0 movzbl %al, %edx
+0FB6F0 movzbl %al, %esi
+440FB6E0 movzbl %al, %r12d
+440FB6E8 movzbl %al, %r13d
+440FB6F0 movzbl %al, %r14d
+440FB6F8 movzbl %al, %r15d
+0FB6EF movzbl %bh, %ebp
+0FB6CF movzbl %bh, %ecx
+0FB6FF movzbl %bh, %edi
+0FB6D7 movzbl %bh, %edx
+0FB6C3 movzbl %bl, %eax
+0FB6DB movzbl %bl, %ebx
+0FB6CB movzbl %bl, %ecx
+0FB6FB movzbl %bl, %edi
+0FB6D3 movzbl %bl, %edx
+0FB6F3 movzbl %bl, %esi
+400FB6C5 movzbl %bpl, %eax
+400FB6ED movzbl %bpl, %ebp
+400FB6CD movzbl %bpl, %ecx
+400FB6FD movzbl %bpl, %edi
+400FB6D5 movzbl %bpl, %edx
+400FB6F5 movzbl %bpl, %esi
+440FB6CD movzbl %bpl, %r9d
+0FB6DD movzbl %ch, %ebx
+0FB6FD movzbl %ch, %edi
+0FB6D5 movzbl %ch, %edx
+0FB6C1 movzbl %cl, %eax
+0FB6D9 movzbl %cl, %ebx
+0FB6C9 movzbl %cl, %ecx
+0FB6D1 movzbl %cl, %edx
+0FB6F1 movzbl %cl, %esi
+0FB6EE movzbl %dh, %ebp
+0FB6FE movzbl %dh, %edi
+400FB6C7 movzbl %dil, %eax
+400FB6C7 movzbl %dil,%eax
+400FB6FF movzbl %dil, %edi
+400FB6D7 movzbl %dil, %edx
+0FB6C2 movzbl %dl, %eax
+0FB6DA movzbl %dl, %ebx
+0FB6FA movzbl %dl, %edi
+0FB6D2 movzbl %dl, %edx
+440FB6050E000000 movzbl 14(%rip), %r8d
+0FB6420F movzbl 15(%rdx), %eax
+0FB60511000000 movzbl 17(%rip), %eax
+410FB6D2 movzbl %r10b, %edx
+450FB6D2 movzbl %r10b, %r10d
+410FB6D3 movzbl %r11b, %edx
+450FB6DB movzbl %r11b, %r11d
+410FB6C4 movzbl %r12b, %eax
+410FB6DC movzbl %r12b, %ebx
+410FB6FC movzbl %r12b, %edi
+410FB6D4 movzbl %r12b, %edx
+410FB6F4 movzbl %r12b, %esi
+450FB6EC movzbl %r12b, %r13d
+410FB61C24 movzbl (%r12), %ebx
+410FB6C5 movzbl %r13b, %eax
+410FB6DD movzbl %r13b, %ebx
+410FB6FD movzbl %r13b, %edi
+410FB6D5 movzbl %r13b, %edx
+410FB6F5 movzbl %r13b, %esi
+450FB6E5 movzbl %r13b,%r12d
+410FB6C6 movzbl %r14b, %eax
+410FB6EE movzbl %r14b, %ebp
+410FB6DE movzbl %r14b, %ebx
+410FB6FE movzbl %r14b, %edi
+410FB6F6 movzbl %r14b, %esi
+450FB6F6 movzbl %r14b, %r14d
+410FB6DF movzbl %r15b, %ebx
+410FB6CF movzbl %r15b, %ecx
+410FB6FF movzbl %r15b, %edi
+410FB6D7 movzbl %r15b, %edx
+410FB6F7 movzbl %r15b, %esi
+450FB6E7 movzbl %r15b, %r12d
+450FB6C0 movzbl %r8b, %r8d
+410FB6D1 movzbl %r9b, %edx
+450FB6C9 movzbl %r9b, %r9d
+0FB60408 movzbl (%rax,%rcx), %eax
+0FB60410 movzbl (%rax,%rdx), %eax
+0FB63410 movzbl (%rax,%rdx), %esi
+420FB60421 movzbl (%rcx,%r12), %eax
+420FB61421 movzbl (%rcx,%r12), %edx
+0FB60F movzbl (%rdi), %ecx
+0FB60407 movzbl (%rdi,%rax), %eax
+0FB6140F movzbl (%rdi,%rcx), %edx
+0FB61417 movzbl (%rdi,%rdx), %edx
+0FB602 movzbl (%rdx), %eax
+0FB6140A movzbl (%rdx,%rcx), %edx
+0FB616 movzbl (%rsi), %edx
+0FB61416 movzbl (%rsi,%rdx), %edx
+400FB6D6 movzbl %sil, %edx
+400FB6F6 movzbl %sil, %esi
+0FB680781A0000 movzbl 6776(%rax), %eax
+0FB6054E000000 movzbl 78(%rip), %eax
+0FB60D4F000000 movzbl 79(%rip), %ecx
+0FB63551000000 movzbl 81(%rip), %esi
+440FB60553000000 movzbl 83(%rip), %r8d
+480FB67C2420 movzbq 32(%rsp), %rdi
+480FB67C2440 movzbq 64(%rsp), %rdi
+480FB67C2460 movzbq 96(%rsp), %rdi
+410FB76C2418 movzwl 24(%r12), %ebp
+410FB74C241E movzwl 30(%r12), %ecx
+0FB7431E movzwl 30(%rbx), %eax
+0FB7411E movzwl 30(%rcx), %eax
+0FB77808 movzwl 8(%rax), %edi
+0FB77F08 movzwl 8(%rdi), %edi
+0FB77708 movzwl 8(%rdi), %esi
+0FB74608 movzwl 8(%rsi), %eax
+0FB7C0 movzwl %ax, %eax
+0FB7D0 movzwl %ax, %edx
+0FB7D0 movzwl %ax,%edx
+440FB7F0 movzwl %ax,%r14d
+0FB7C5 movzwl %bp,%eax
+0FB7C1 movzwl %cx, %eax
+0FB7C9 movzwl %cx, %ecx
+0FB7FF movzwl %di, %edi
+0FB7D2 movzwl %dx, %edx
+410FB7049E movzwl (%r14,%rbx,4), %eax
+410FB7C7 movzwl %r15w,%eax
+410FB7C8 movzwl %r8w, %ecx
+450FB7C0 movzwl %r8w, %r8d
+0FB71403 movzwl (%rbx,%rax), %edx
+0FB7049F movzwl (%rdi,%rbx,4), %eax
+0FB7FE movzwl %si, %edi
+0FB7F6 movzwl %si, %esi
+480FB77CD802 movzwq 2(%rax,%rbx,8), %rdi
+490FB7561E movzwq 30(%r14), %rdx
+480FB7531E movzwq 30(%rbx), %rdx
+480FB734D8 movzwq (%rax,%rbx,8), %rsi
+F7D8 negl %eax
+F7DF negl %edi
+48F7DE negq %rsi
+F7D0 notl %eax
+F7D1 notl %ecx
+F7D7 notl %edi
+F7D2 notl %edx
+F7D6 notl %esi
+41F7D2 notl %r10d
+41F7D0 notl %r8d
+41F7D1 notl %r9d
+48F7D7 notq %rdi
+4180CE80 orb $-128, %r14b
+0A44242E orb 46(%rsp), %al
+400A7A08 orb 8(%rdx), %dil
+08C8 orb %cl, %al
+08CA orb %cl, %dl
+08D0 orb %dl, %al
+4408E0 orb %r12b, %al
+4181CE00040000 orl $1024, %r14d
+0D00000041 orl $1090519040, %eax
+81CA00000041 orl $1090519040, %edx
+834C241C01 orl $1, 28(%rsp)
+834C241C10 orl $16, 28(%rsp)
+4181CE00400000 orl $16384, %r14d
+83C810 orl $16, %eax
+83CA01 orl $1, %edx
+4183CE01 orl $1, %r14d
+4181CE00080000 orl $2048, %r14d
+834C241C02 orl $2, 28(%rsp)
+4181CE00010000 orl $256, %r14d
+83CA02 orl $2, %edx
+4183CE02 orl $2, %r14d
+4181CE00800000 orl $32768, %r14d
+83C820 orl $32, %eax
+4181CE00100000 orl $4096, %r14d
+834C241C04 orl $4, 28(%rsp)
+83C804 orl $4, %eax
+4183CE04 orl $4, %r14d
+0B4424FC orl -4(%rsp), %eax
+4181CE00020000 orl $512, %r14d
+83C840 orl $64, %eax
+4181CE00200000 orl $8192, %r14d
+83C808 orl $8, %eax
+0B7A08 orl 8(%rdx), %edi
+09C5 orl %eax, %ebp
+09C1 orl %eax, %ecx
+09C7 orl %eax, %edi
+09C2 orl %eax, %edx
+4109C4 orl %eax, %r12d
+09D8 orl %ebx, %eax
+09D9 orl %ebx, %ecx
+09DA orl %ebx, %edx
+09DE orl %ebx, %esi
+09C8 orl %ecx, %eax
+09CA orl %ecx, %edx
+09CE orl %ecx, %esi
+09F8 orl %edi, %eax
+09F9 orl %edi, %ecx
+09FA orl %edi, %edx
+09FE orl %edi, %esi
+095424EC orl %edx, -20(%rsp)
+095424F8 orl %edx, -8(%rsp)
+09D0 orl %edx, %eax
+09D1 orl %edx, %ecx
+09D7 orl %edx, %edi
+09F0 orl %esi, %eax
+09F1 orl %esi, %ecx
+09F7 orl %esi, %edi
+09F2 orl %esi, %edx
+4409D0 orl %r10d, %eax
+4409D8 orl %r11d, %eax
+4409D9 orl %r11d, %ecx
+4409DA orl %r11d, %edx
+4409E0 orl %r12d, %eax
+4409E7 orl %r12d, %edi
+4409E8 orl %r13d, %eax
+4409F8 orl %r15d, %eax
+4409FA orl %r15d, %edx
+4409C0 orl %r8d, %eax
+4409C7 orl %r8d, %edi
+4409C8 orl %r9d, %eax
+4409C9 orl %r9d, %ecx
+480B8C2410010000 orq 272(%rsp), %rcx
+4809C7 orq %rax, %rdi
+4809C8 orq %rcx, %rax
+4809F8 orq %rdi, %rax
+4809D0 orq %rdx, %rax
+4809F0 orq %rsi, %rax
+4809F7 orq %rsi, %rdi
+660B7A08 orw 8(%rdx), %di
+415C popq %r12
+415D popq %r13
+415E popq %r14
+415F popq %r15
+5D popq %rbp
+5B popq %rbx
+4154 pushq %r12
+4155 pushq %r13
+4156 pushq %r14
+4157 pushq %r15
+55 pushq %rbp
+53 pushq %rbx
+F3C3 rep ; ret
+41D3CC rorl %cl, %r12d
+C1E70A sall $10, %edi
+C1E60F sall $15, %esi
+41C1E00F sall $15, %r8d
+C1E010 sall $16, %eax
+C1E510 sall $16, %ebp
+C1E310 sall $16, %ebx
+C1E110 sall $16, %ecx
+C1E710 sall $16, %edi
+C1E210 sall $16, %edx
+C1E610 sall $16, %esi
+41C1E310 sall $16, %r11d
+41C1E410 sall $16, %r12d
+41C1E010 sall $16, %r8d
+41C1E110 sall $16, %r9d
+C1E018 sall $24, %eax
+C1E118 sall $24, %ecx
+C1E718 sall $24, %edi
+C1E218 sall $24, %edx
+C1E618 sall $24, %esi
+C1E719 sall $25, %edi
+C1E702 sall $2, %edi
+C1E703 sall $3, %edi
+C1E203 sall $3, %edx
+C1E007 sall $7, %eax
+C1E707 sall $7, %edi
+41C1E207 sall $7, %r10d
+C16424FC08 sall $8, -4(%rsp)
+C1E008 sall $8, %eax
+C1E508 sall $8, %ebp
+C1E308 sall $8, %ebx
+C1E708 sall $8, %edi
+C1E208 sall $8, %edx
+41C1E008 sall $8, %r8d
+41C1E108 sall $8, %r9d
+D3E0 sall %cl, %eax
+D3E7 sall %cl, %edi
+D3E2 sall %cl, %edx
+D3E6 sall %cl, %esi
+41D3E1 sall %cl, %r9d
+48C1E002 salq $2, %rax
+48C1E302 salq $2, %rbx
+48C1E702 salq $2, %rdi
+48C1E202 salq $2, %rdx
+48C1E020 salq $32, %rax
+48C1E720 salq $32, %rdi
+48C1E703 salq $3, %rdi
+48C1E704 salq $4, %rdi
+C1F80B sarl $11, %eax
+C1F810 sarl $16, %eax
+C1F910 sarl $16, %ecx
+C1FA10 sarl $16, %edx
+C1FF15 sarl $21, %edi
+C1F818 sarl $24, %eax
+C1FA18 sarl $24, %edx
+C1FE18 sarl $24, %esi
+C1F802 sarl $2, %eax
+C1F803 sarl $3, %eax
+C1F804 sarl $4, %eax
+C1FD06 sarl $6, %ebp
+C1FA06 sarl $6, %edx
+C1FF08 sarl $8, %edi
+C1FF09 sarl $9, %edi
+D3F8 sarl %cl, %eax
+D3FF sarl %cl, %edi
+D3FA sarl %cl, %edx
+41D3F8 sarl %cl, %r8d
+D1F8 sarl %eax
+D1FF sarl %edi
+19C0 sbbl %eax, %eax
+19ED sbbl %ebp, %ebp
+19DB sbbl %ebx, %ebx
+19C9 sbbl %ecx, %ecx
+19FF sbbl %edi, %edi
+19D2 sbbl %edx, %edx
+19F6 sbbl %esi, %esi
+4519D2 sbbl %r10d, %r10d
+4519E4 sbbl %r12d, %r12d
+4519ED sbbl %r13d, %r13d
+4519C0 sbbl %r8d, %r8d
+4519C9 sbbl %r9d, %r9d
+4819FF sbbq %rdi, %rdi
+0F97C2 seta %dl
+0F92C0 setb %al
+400F92C7 setb %dil
+0F92C2 setb %dl
+0F9684241B010000 setbe 283(%rsp)
+0F9644242E setbe 46(%rsp)
+0F96C0 setbe %al
+0F96C1 setbe %cl
+400F96C7 setbe %dil
+0F96C2 setbe %dl
+0F9444247B sete 123(%rsp)
+0F9444240F sete 15(%rsp)
+0F948424AB000000 sete 171(%rsp)
+0F948424B7000000 sete 183(%rsp)
+0F948424EF000000 sete 239(%rsp)
+0F94C0 sete %al
+400F94C7 sete %dil
+0F94C2 sete %dl
+410F94C4 sete %r12b
+410F94C5 sete %r13b
+410F94C7 sete %r15b
+400F94C6 sete %sil
+0F9DC0 setge %al
+0F9DC2 setge %dl
+0F9C442473 setl 115(%rsp)
+400F9CC7 setl %dil
+0F9EC0 setle %al
+400F9EC7 setle %dil
+0F95C0 setne %al
+0F95C1 setne %cl
+400F95C7 setne %dil
+0F95C2 setne %dl
+410F95C5 setne %r13b
+400F95C6 setne %sil
+0F9BC2 setnp %dl
+0F98C0 sets %al
+C0E802 shrb $2, %al
+C0E803 shrb $3, %al
+C0E903 shrb $3, %cl
+40C0EF03 shrb $3, %dil
+C0EA03 shrb $3, %dl
+C0E804 shrb $4, %al
+C0E904 shrb $4, %cl
+C0EA06 shrb $6, %dl
+D0E8 shrb %al
+D0EB shrb %bl
+D0EA shrb %dl
+C1E80A shrl $10, %eax
+C1EF0A shrl $10, %edi
+C1EE0A shrl $10, %esi
+C1E80B shrl $11, %eax
+C1EB0B shrl $11, %ebx
+C1E90B shrl $11, %ecx
+C1E80C shrl $12, %eax
+C1EA0C shrl $12, %edx
+C1E80D shrl $13, %eax
+C1EF0E shrl $14, %edi
+C1E810 shrl $16, %eax
+C1EB10 shrl $16, %ebx
+C1E910 shrl $16, %ecx
+C1EF10 shrl $16, %edi
+C1EA10 shrl $16, %edx
+C1EE10 shrl $16, %esi
+41C1EB10 shrl $16, %r11d
+41C1E810 shrl $16, %r8d
+41C1E910 shrl $16, %r9d
+C1E814 shrl $20, %eax
+C1EB14 shrl $20, %ebx
+C1EA14 shrl $20, %edx
+41C1EC14 shrl $20, %r12d
+C1E815 shrl $21, %eax
+C1ED15 shrl $21, %ebp
+C1EF15 shrl $21, %edi
+C1ED16 shrl $22, %ebp
+C1E818 shrl $24, %eax
+C1E918 shrl $24, %ecx
+C1EF18 shrl $24, %edi
+C1EA18 shrl $24, %edx
+C1EE18 shrl $24, %esi
+C1E819 shrl $25, %eax
+C1EB19 shrl $25, %ebx
+C1E81A shrl $26, %eax
+C1ED1C shrl $28, %ebp
+C1E91C shrl $28, %ecx
+C1EF1C shrl $28, %edi
+C1EA1C shrl $28, %edx
+C1EE1C shrl $28, %esi
+41C1EF1C shrl $28, %r15d
+C1E802 shrl $2, %eax
+C1E81F shrl $31, %eax
+C1E91F shrl $31, %ecx
+C1EF1F shrl $31, %edi
+C1EA1F shrl $31, %edx
+C1ED03 shrl $3, %ebp
+C1EA03 shrl $3, %edx
+41C1EC03 shrl $3, %r12d
+C1E804 shrl $4, %eax
+C1EF04 shrl $4, %edi
+C1EA04 shrl $4, %edx
+41C1ED04 shrl $4, %r13d
+C1E805 shrl $5, %eax
+C1E806 shrl $6, %eax
+C1E906 shrl $6, %ecx
+C1EF06 shrl $6, %edi
+C1E807 shrl $7, %eax
+C1E907 shrl $7, %ecx
+C1E808 shrl $8, %eax
+C1E908 shrl $8, %ecx
+C1EA08 shrl $8, %edx
+41C1ED08 shrl $8, %r13d
+41C1E808 shrl $8, %r8d
+41C1E908 shrl $8, %r9d
+C1E809 shrl $9, %eax
+C1EF09 shrl $9, %edi
+D3E8 shrl %cl, %eax
+D3EF shrl %cl, %edi
+D1E8 shrl %eax
+D1EB shrl %ebx
+D1E9 shrl %ecx
+D1EF shrl %edi
+D1EA shrl %edx
+41D1EB shrl %r11d
+41D1EC shrl %r12d
+41D1E8 shrl %r8d
+49C1EA20 shrq $32, %r10
+49C1EB20 shrq $32, %r11
+49C1E820 shrq $32, %r8
+49C1E920 shrq $32, %r9
+48C1E820 shrq $32, %rax
+48C1EB20 shrq $32, %rbx
+48C1E920 shrq $32, %rcx
+48C1EF20 shrq $32, %rdi
+48C1EA20 shrq $32, %rdx
+48C1EE20 shrq $32, %rsi
+48C1E83F shrq $63, %rax
+402A7A08 subb 8(%rdx), %dil
+28D9 subb %bl, %cl
+28CB subb %cl, %bl
+28D0 subb %dl, %al
+4028D7 subb %dl, %dil
+4128D0 subb %dl, %r8b
+4028D6 subb %dl, %sil
+83E864 subl $100, %eax
+83E80C subl $12, %eax
+2D90000000 subl $144, %eax
+81EB90000000 subl $144, %ebx
+2DC0000000 subl $192, %eax
+81E9C0000000 subl $192, %ecx
+81EAC0000000 subl $192, %edx
+81E9C8000000 subl $200, %ecx
+81EAC8000000 subl $200, %edx
+2DD0000000 subl $208, %eax
+83E814 subl $20, %eax
+2DE0000000 subl $224, %eax
+81E9E0000000 subl $224, %ecx
+81EAE0000000 subl $224, %edx
+81E9E8000000 subl $232, %ecx
+81EFE8000000 subl $232, %edi
+81EAE8000000 subl $232, %edx
+81E9F0000000 subl $240, %ecx
+81EFF0000000 subl $240, %edi
+81EAF0000000 subl $240, %edx
+81E9F8000000 subl $248, %ecx
+81EAF8000000 subl $248, %edx
+2BAC2424010000 subl 292(%rsp), %ebp
+83E802 subl $2, %eax
+83EA03 subl $3, %edx
+83E82C subl $44, %eax
+83E82E subl $46, %eax
+83E831 subl $49, %eax
+4183E904 subl $4, %r9d
+2B6C2404 subl 4(%rsp), %ebp
+83E840 subl $64, %eax
+83EB40 subl $64, %ebx
+81EFFF0F0100 subl $69631, %edi
+2D01100100 subl $69633, %eax
+2D03100100 subl $69635, %eax
+2D00200100 subl $73728, %eax
+2D01300100 subl $77825, %eax
+2D2D300100 subl $77869, %eax
+2D0C310100 subl $78092, %eax
+83E853 subl $83, %eax
+2D02500100 subl $86018, %eax
+2B7A08 subl 8(%rdx), %edi
+83E860 subl $96, %eax
+29C7 subl %eax, %edi
+29C2 subl %eax, %edx
+4129EE subl %ebp, %r14d
+29CA subl %ecx, %edx
+4129C8 subl %ecx, %r8d
+29F8 subl %edi, %eax
+29D0 subl %edx, %eax
+29D3 subl %edx, %ebx
+29D1 subl %edx, %ecx
+29D7 subl %edx, %edi
+29D6 subl %edx, %esi
+4129D0 subl %edx, %r8d
+29F7 subl %esi, %edi
+4429D1 subl %r10d, %ecx
+4429F7 subl %r14d, %edi
+4429F8 subl %r15d, %eax
+4883EC68 subq $104, %rsp
+4883EC78 subq $120, %rsp
+4881EC88000000 subq $136, %rsp
+4881EC98000000 subq $152, %rsp
+4C2BBC24A0000000 subq 160(%rsp), %r15
+4881ECA8000000 subq $168, %rsp
+4883EC10 subq $16, %rsp
+4881ECB8000000 subq $184, %rsp
+4881ECD0000000 subq $208, %rsp
+4881ECD8000000 subq $216, %rsp
+4883EC18 subq $24, %rsp
+4881EC18010000 subq $280, %rsp
+4881EC38010000 subq $312, %rsp
+4883EC28 subq $40, %rsp
+4881ECD8010000 subq $472, %rsp
+4883EC38 subq $56, %rsp
+4881ECD8020000 subq $728, %rsp
+4883EC48 subq $72, %rsp
+4883EC58 subq $88, %rsp
+4883EC08 subq $8, %rsp
+4881ECC8030000 subq $968, %rsp
+4829C2 subq %rax, %rdx
+6629CA subw %cx, %dx
+664129C8 subw %cx, %r8w
+6629D0 subw %dx, %ax
+6629F7 subw %si, %di
+F6052C00000010 testb $16, 44(%rip)
+A801 testb $1, %al
+F6C301 testb $1, %bl
+40F6C701 testb $1, %dil
+41F6C401 testb $1, %r12b
+F6052D00000001 testb $1, 45(%rip)
+40F6C71C testb $28, %dil
+A802 testb $2, %al
+F6C202 testb $2, %dl
+41F6C502 testb $2, %r13b
+41F6C602 testb $2, %r14b
+F6C2E0 testb $-32, %dl
+F6052F00000020 testb $32, 47(%rip)
+F644241C04 testb $4, 28(%rsp)
+A804 testb $4, %al
+40F6C704 testb $4, %dil
+F6C204 testb $4, %dl
+41F6C504 testb $4, %r13b
+F6053100000004 testb $4, 49(%rip)
+F6054200000040 testb $64, 66(%rip)
+F684242003000007 testb $7, 800(%rsp)
+A808 testb $8, %al
+F6C208 testb $8, %dl
+41F6C608 testb $8, %r14b
+84C0 testb %al, %al
+84DB testb %bl, %bl
+4084ED testb %bpl, %bpl
+84C9 testb %cl, %cl
+4084FF testb %dil, %dil
+84D2 testb %dl, %dl
+4584DB testb %r11b, %r11b
+4584E4 testb %r12b, %r12b
+4584ED testb %r13b, %r13b
+4584F6 testb %r14b, %r14b
+4584FF testb %r15b, %r15b
+4584C0 testb %r8b, %r8b
+4084F6 testb %sil, %sil
+F7C700040000 testl $1024, %edi
+41F7C600040000 testl $1024, %r14d
+F7C700400000 testl $16384, %edi
+41F7C600400000 testl $16384, %r14d
+F7C500000001 testl $16777216, %ebp
+F7C700000001 testl $16777216, %edi
+F7C200000001 testl $16777216, %edx
+F7C600000001 testl $16777216, %esi
+F7C700080000 testl $2048, %edi
+41F7C600080000 testl $2048, %r14d
+41F7C600010000 testl $256, %r14d
+F7C700100000 testl $4096, %edi
+41F7C600100000 testl $4096, %r14d
+41F7C600020000 testl $512, %r14d
+A90000FFFF testl $-65536, %eax
+F7C50000FFFF testl $-65536, %ebp
+F7C30000FFFF testl $-65536, %ebx
+41F7C40000FFFF testl $-65536, %r12d
+F7C700030000 testl $768, %edi
+F7C700200000 testl $8192, %edi
+41F7C600200000 testl $8192, %r14d
+85C0 testl %eax, %eax
+85F8 testl %eax, %edi
+85D0 testl %eax, %edx
+85ED testl %ebp, %ebp
+85DB testl %ebx, %ebx
+85C9 testl %ecx, %ecx
+85FF testl %edi, %edi
+85D2 testl %edx, %edx
+85F6 testl %esi, %esi
+4585D2 testl %r10d, %r10d
+4585DB testl %r11d, %r11d
+4585E4 testl %r12d, %r12d
+4585ED testl %r13d, %r13d
+4585F6 testl %r14d, %r14d
+4585FF testl %r15d, %r15d
+4585C0 testl %r8d, %r8d
+4585C9 testl %r9d, %r9d
+4D85E4 testq %r12, %r12
+4D85ED testq %r13, %r13
+4D85F6 testq %r14, %r14
+4D85FF testq %r15, %r15
+4885C0 testq %rax, %rax
+4885ED testq %rbp, %rbp
+4885DB testq %rbx, %rbx
+4885C9 testq %rcx, %rcx
+4885FF testq %rdi, %rdi
+4885D2 testq %rdx, %rdx
+4885F6 testq %rsi, %rsi
+6685C0 testw %ax, %ax
+6685DB testw %bx, %bx
+6685FF testw %di, %di
+6685D2 testw %dx, %dx
+664585DB testw %r11w, %r11w
+664585F6 testw %r14w, %r14w
+664585C0 testw %r8w, %r8w
+664585C9 testw %r9w, %r9w
+6685F6 testw %si, %si
+40327A08 xorb 8(%rdx), %dil
+83F001 xorl $1, %eax
+83F201 xorl $1, %edx
+337A08 xorl 8(%rdx), %edi
+31C0 xorl %eax, %eax
+31ED xorl %ebp, %ebp
+31DB xorl %ebx, %ebx
+31C9 xorl %ecx, %ecx
+31FF xorl %edi, %edi
+31D1 xorl %edx, %ecx
+31D2 xorl %edx, %edx
+31F0 xorl %esi, %eax
+31F1 xorl %esi, %ecx
+31F2 xorl %esi, %edx
+31F6 xorl %esi, %esi
+4531D2 xorl %r10d, %r10d
+4531DB xorl %r11d, %r11d
+4531E4 xorl %r12d, %r12d
+4531ED xorl %r13d, %r13d
+4531F6 xorl %r14d, %r14d
+4531FF xorl %r15d, %r15d
+4531C0 xorl %r8d, %r8d
+4531C9 xorl %r9d, %r9d
+6631C0 xorw %ax, %ax
+6631FF xorw %di, %di
+6631D2 xorw %dx, %dx
+90 nop
+90 nop
diff --git a/main/VEX/orig_arm/nanoarm b/main/VEX/orig_arm/nanoarm
new file mode 100644
index 0000000..747098a
--- /dev/null
+++ b/main/VEX/orig_arm/nanoarm
@@ -0,0 +1,7 @@
+ 0: e1a0c00d mov ip, sp
+ 4: e92dd810 stmdb sp!, {r4, fp, ip, lr, pc}
+ 8: e24cb004 sub fp, ip, #5 ; 0x4
+ c: e3a00014 mov r0, #20 ; 0x14
+ 10: ebfffffe bl 0 <newHHW>
+. 0 00008000 20
+. 0d c0 a0 e1 10 d8 2d e9 05 b0 4c e2 14 00 a0 e3 fe ff ff eb
diff --git a/main/VEX/orig_arm/nanoarm.orig b/main/VEX/orig_arm/nanoarm.orig
new file mode 100644
index 0000000..90742df
--- /dev/null
+++ b/main/VEX/orig_arm/nanoarm.orig
@@ -0,0 +1,19 @@
+ 0: e1a0c00d mov ip, sp
+. 0 00008000 4
+. 0d c0 a0 e1
+
+ 4: e92dd810 stmdb sp!, {r4, fp, ip, lr, pc}
+. 1 00008004 4
+. 10 d8 2d e9
+
+ 8: e24cb004 sub fp, ip, #4 ; 0x4
+. 2 00008008 4
+. 04 b0 4c e2
+
+ c: e3a00014 mov r0, #20 ; 0x14
+. 3 0000800C 4
+. 14 00 a0 e3
+
+ 10: ebfffffe bl 0 <newHHW>
+. 4 00008010 4
+. fe ff ff eb
diff --git a/main/VEX/orig_ppc32/date.orig b/main/VEX/orig_ppc32/date.orig
new file mode 100644
index 0000000..24d729b
--- /dev/null
+++ b/main/VEX/orig_ppc32/date.orig
@@ -0,0 +1,138635 @@
+==== BB 0 _start(0x254804D4) approx BBs exec'd 0 ====
+
+ 0x254804D4: 7C230B78 or r3,r1,r1
+ 0: GETL R1, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254804D8: 38800000 li r4,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x254804DC: 3821FFF0 addi r1,r1,-16
+ 6: GETL R1, t4
+ 7: ADDL $0xFFFFFFF0, t4
+ 8: PUTL t4, R1
+ 9: INCEIPL $4
+
+ 0x254804E0: 90810000 stw r4,0(r1)
+ 10: GETL R4, t6
+ 11: GETL R1, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x254804E4: 4BFF1581 bl 0x25471A64
+ 14: MOVL $0x254804E8, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x25471A64 ($4)
+
+
+
+. 0 254804D4 20
+. 7C 23 0B 78 38 80 00 00 38 21 FF F0 90 81 00 00 4B FF 15 81
+==== BB 1 _dl_start(0x25471A64) approx BBs exec'd 0 ====
+
+ 0x25471A64: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25471A68: 3960004B li r11,75
+ 3: MOVL $0x4B, t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0x25471A6C: 9421FD50 stwu r1,-688(r1)
+ 6: GETL R1, t4
+ 7: GETL R1, t6
+ 8: ADDL $0xFFFFFD50, t6
+ 9: PUTL t6, R1
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x25471A70: 7D6903A6 mtctr r11
+ 12: GETL R11, t8
+ 13: PUTL t8, CTR
+ 14: INCEIPL $4
+
+ 0x25471A74: 92E1028C stw r23,652(r1)
+ 15: GETL R23, t10
+ 16: GETL R1, t12
+ 17: ADDL $0x28C, t12
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0x25471A78: 900102B4 stw r0,692(r1)
+ 20: GETL R0, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x2B4, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x25471A7C: 7C771B78 or r23,r3,r3
+ 25: GETL R3, t18
+ 26: PUTL t18, R23
+ 27: INCEIPL $4
+
+ 0x25471A80: 93010290 stw r24,656(r1)
+ 28: GETL R24, t20
+ 29: GETL R1, t22
+ 30: ADDL $0x290, t22
+ 31: STL t20, (t22)
+ 32: INCEIPL $4
+
+ 0x25471A84: 38000000 li r0,0
+ 33: MOVL $0x0, t24
+ 34: PUTL t24, R0
+ 35: INCEIPL $4
+
+ 0x25471A88: 93210294 stw r25,660(r1)
+ 36: GETL R25, t26
+ 37: GETL R1, t28
+ 38: ADDL $0x294, t28
+ 39: STL t26, (t28)
+ 40: INCEIPL $4
+
+ 0x25471A8C: 39210030 addi r9,r1,48
+ 41: GETL R1, t30
+ 42: ADDL $0x30, t30
+ 43: PUTL t30, R9
+ 44: INCEIPL $4
+
+ 0x25471A90: 93410298 stw r26,664(r1)
+ 45: GETL R26, t32
+ 46: GETL R1, t34
+ 47: ADDL $0x298, t34
+ 48: STL t32, (t34)
+ 49: INCEIPL $4
+
+ 0x25471A94: 9361029C stw r27,668(r1)
+ 50: GETL R27, t36
+ 51: GETL R1, t38
+ 52: ADDL $0x29C, t38
+ 53: STL t36, (t38)
+ 54: INCEIPL $4
+
+ 0x25471A98: 938102A0 stw r28,672(r1)
+ 55: GETL R28, t40
+ 56: GETL R1, t42
+ 57: ADDL $0x2A0, t42
+ 58: STL t40, (t42)
+ 59: INCEIPL $4
+
+ 0x25471A9C: 93A102A4 stw r29,676(r1)
+ 60: GETL R29, t44
+ 61: GETL R1, t46
+ 62: ADDL $0x2A4, t46
+ 63: STL t44, (t46)
+ 64: INCEIPL $4
+
+ 0x25471AA0: 93C102A8 stw r30,680(r1)
+ 65: GETL R30, t48
+ 66: GETL R1, t50
+ 67: ADDL $0x2A8, t50
+ 68: STL t48, (t50)
+ 69: INCEIPL $4
+
+ 0x25471AA4: 93E102AC stw r31,684(r1)
+ 70: GETL R31, t52
+ 71: GETL R1, t54
+ 72: ADDL $0x2AC, t54
+ 73: STL t52, (t54)
+ 74: INCEIPL $4
+
+ 0x25471AA8: 90090000 stw r0,0(r9)
+ 75: GETL R0, t56
+ 76: GETL R9, t58
+ 77: STL t56, (t58)
+ 78: INCEIPL $4
+
+ 0x25471AAC: 39290004 addi r9,r9,4
+ 79: GETL R9, t60
+ 80: ADDL $0x4, t60
+ 81: PUTL t60, R9
+ 82: INCEIPL $4
+
+ 0x25471AB0: 4200FFF8 bc 16,0,0x25471AA8
+ 83: GETL CTR, t62
+ 84: ADDL $0xFFFFFFFF, t62
+ 85: PUTL t62, CTR
+ 86: JIFZL t62, $0x25471AB4
+ 87: JMPo $0x25471AA8 ($4)
+
+
+
+. 1 25471A64 80
+. 7C 08 02 A6 39 60 00 4B 94 21 FD 50 7D 69 03 A6 92 E1 02 8C 90 01 02 B4 7C 77 1B 78 93 01 02 90 38 00 00 00 93 21 02 94 39 21 00 30 93 41 02 98 93 61 02 9C 93 81 02 A0 93 A1 02 A4 93 C1 02 A8 93 E1 02 AC 90 09 00 00 39 29 00 04 42 00 FF F8
+==== BB 2 (0x25471AA8) approx BBs exec'd 0 ====
+
+ 0x25471AA8: 90090000 stw r0,0(r9)
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25471AAC: 39290004 addi r9,r9,4
+ 4: GETL R9, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x25471AB0: 4200FFF8 bc 16,0,0x25471AA8
+ 8: GETL CTR, t6
+ 9: ADDL $0xFFFFFFFF, t6
+ 10: PUTL t6, CTR
+ 11: JIFZL t6, $0x25471AB4
+ 12: JMPo $0x25471AA8 ($4)
+
+
+
+. 2 25471AA8 12
+. 90 09 00 00 39 29 00 04 42 00 FF F8
+==== BB 3 (0x25471AB4) approx BBs exec'd 0 ====
+
+ 0x25471AB4: 48000009 bl 0x25471ABC
+ 0: MOVL $0x25471AB8, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25471ABC ($4)
+
+
+
+. 3 25471AB4 4
+. 48 00 00 09
+==== BB 4 (0x25471ABC) approx BBs exec'd 0 ====
+
+ 0x25471ABC: 7CE802A6 mflr r7
+ 0: GETL LR, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x25471AC0: 3B010010 addi r24,r1,16
+ 3: GETL R1, t2
+ 4: ADDL $0x10, t2
+ 5: PUTL t2, R24
+ 6: INCEIPL $4
+
+ 0x25471AC4: 4802553D bl 0x25497000
+ 7: MOVL $0x25471AC8, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0x25497000 ($4)
+
+
+
+. 4 25471ABC 12
+. 7C E8 02 A6 3B 01 00 10 48 02 55 3D
+==== BB 5 (0x25497000) approx BBs exec'd 0 ====
+
+ 0x25497000: 4E800021 blrl
+ 0: GETL LR, t0
+ 1: MOVL $0x25497004, t2
+ 2: PUTL t2, LR
+ 3: JMPo-r t0 ($4)
+
+
+
+. 5 25497000 4
+. 4E 80 00 21
+==== BB 6 (0x25471AC8) approx BBs exec'd 0 ====
+
+ 0x25471AC8: 7D4802A6 mflr r10
+ 0: GETL LR, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x25471ACC: 81870000 lwz r12,0(r7)
+ 3: GETL R7, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R12
+ 6: INCEIPL $4
+
+ 0x25471AD0: 810A0000 lwz r8,0(r10)
+ 7: GETL R10, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R8
+ 10: INCEIPL $4
+
+ 0x25471AD4: 5586302E rlwinm r6,r12,6,0,23
+ 11: GETL R12, t10
+ 12: ROLL $0x6, t10
+ 13: ANDL $0xFFFFFF00, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x25471AD8: 7CC43670 srawi r4,r6,6
+ 16: GETL R6, t12
+ 17: SARL $0x6, t12 (-wCa)
+ 18: PUTL t12, R4
+ 19: INCEIPL $4
+
+ 0x25471ADC: 7CA83850 subf r5,r8,r7
+ 20: GETL R8, t14
+ 21: GETL R7, t16
+ 22: SUBL t14, t16
+ 23: PUTL t16, R5
+ 24: INCEIPL $4
+
+ 0x25471AE0: 39010030 addi r8,r1,48
+ 25: GETL R1, t18
+ 26: ADDL $0x30, t18
+ 27: PUTL t18, R8
+ 28: INCEIPL $4
+
+ 0x25471AE4: 7CE52214 add r7,r5,r4
+ 29: GETL R5, t20
+ 30: GETL R4, t22
+ 31: ADDL t20, t22
+ 32: PUTL t22, R7
+ 33: INCEIPL $4
+
+ 0x25471AE8: 90E10010 stw r7,16(r1)
+ 34: GETL R7, t24
+ 35: GETL R1, t26
+ 36: ADDL $0x10, t26
+ 37: STL t24, (t26)
+ 38: INCEIPL $4
+
+ 0x25471AEC: 806A0000 lwz r3,0(r10)
+ 39: GETL R10, t28
+ 40: LDL (t28), t30
+ 41: PUTL t30, R3
+ 42: INCEIPL $4
+
+ 0x25471AF0: 7C07182E lwzx r0,r7,r3
+ 43: GETL R3, t32
+ 44: GETL R7, t34
+ 45: ADDL t34, t32
+ 46: LDL (t32), t36
+ 47: PUTL t36, R0
+ 48: INCEIPL $4
+
+ 0x25471AF4: 7D271A14 add r9,r7,r3
+ 49: GETL R7, t38
+ 50: GETL R3, t40
+ 51: ADDL t38, t40
+ 52: PUTL t40, R9
+ 53: INCEIPL $4
+
+ 0x25471AF8: 91210018 stw r9,24(r1)
+ 54: GETL R9, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x18, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0x25471AFC: 7D2A4B78 or r10,r9,r9
+ 59: GETL R9, t46
+ 60: PUTL t46, R10
+ 61: INCEIPL $4
+
+ 0x25471B00: 2F800000 cmpi cr7,r0,0
+ 62: GETL R0, t48
+ 63: CMP0L t48, t50 (-rSo)
+ 64: ICRFL t50, $0x7, CR
+ 65: INCEIPL $4
+
+ 0x25471B04: 419E0068 bc 12,30,0x25471B6C
+ 66: Js30o $0x25471B6C
+
+
+
+. 6 25471AC8 64
+. 7D 48 02 A6 81 87 00 00 81 0A 00 00 55 86 30 2E 7C C4 36 70 7C A8 38 50 39 01 00 30 7C E5 22 14 90 E1 00 10 80 6A 00 00 7C 07 18 2E 7D 27 1A 14 91 21 00 18 7D 2A 4B 78 2F 80 00 00 41 9E 00 68
+==== BB 7 (0x25471B08) approx BBs exec'd 0 ====
+
+ 0x25471B08: 3FE06FFF lis r31,28671
+ 0: MOVL $0x6FFF0000, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0x25471B0C: 3F607000 lis r27,28672
+ 3: MOVL $0x70000000, t2
+ 4: PUTL t2, R27
+ 5: INCEIPL $4
+
+ 0x25471B10: 3F406FFF lis r26,28671
+ 6: MOVL $0x6FFF0000, t4
+ 7: PUTL t4, R26
+ 8: INCEIPL $4
+
+ 0x25471B14: 3F206FFF lis r25,28671
+ 9: MOVL $0x6FFF0000, t6
+ 10: PUTL t6, R25
+ 11: INCEIPL $4
+
+ 0x25471B18: 3FA06FFF lis r29,28671
+ 12: MOVL $0x6FFF0000, t8
+ 13: PUTL t8, R29
+ 14: INCEIPL $4
+
+ 0x25471B1C: 3F806FFF lis r28,28671
+ 15: MOVL $0x6FFF0000, t10
+ 16: PUTL t10, R28
+ 17: INCEIPL $4
+
+ 0x25471B20: 7C0B0378 or r11,r0,r0
+ 18: GETL R0, t12
+ 19: PUTL t12, R11
+ 20: INCEIPL $4
+
+ 0x25471B24: 63E6FFFF ori r6,r31,0xFFFF
+ 21: MOVL $0x6FFFFFFF, t14
+ 22: PUTL t14, R6
+ 23: INCEIPL $4
+
+ 0x25471B28: 63650021 ori r5,r27,0x21
+ 24: MOVL $0x70000021, t16
+ 25: PUTL t16, R5
+ 26: INCEIPL $4
+
+ 0x25471B2C: 6344FDFF ori r4,r26,0xFDFF
+ 27: MOVL $0x6FFFFDFF, t18
+ 28: PUTL t18, R4
+ 29: INCEIPL $4
+
+ 0x25471B30: 6323FE34 ori r3,r25,0xFE34
+ 30: MOVL $0x6FFFFE34, t20
+ 31: PUTL t20, R3
+ 32: INCEIPL $4
+
+ 0x25471B34: 63BDFEFF ori r29,r29,0xFEFF
+ 33: MOVL $0x6FFFFEFF, t22
+ 34: PUTL t22, R29
+ 35: INCEIPL $4
+
+ 0x25471B38: 639CFF40 ori r28,r28,0xFF40
+ 36: MOVL $0x6FFFFF40, t24
+ 37: PUTL t24, R28
+ 38: INCEIPL $4
+
+ 0x25471B3C: 2C0B0021 cmpi cr0,r11,33
+ 39: GETL R11, t26
+ 40: MOVL $0x21, t30
+ 41: CMPL t26, t30, t28 (-rSo)
+ 42: ICRFL t28, $0x0, CR
+ 43: INCEIPL $4
+
+ 0x25471B40: 5560103A rlwinm r0,r11,2,0,29
+ 44: GETL R11, t32
+ 45: SHLL $0x2, t32
+ 46: PUTL t32, R0
+ 47: INCEIPL $4
+
+ 0x25471B44: 40810018 bc 4,1,0x25471B5C
+ 48: Jc01o $0x25471B5C
+
+
+
+. 7 25471B08 64
+. 3F E0 6F FF 3F 60 70 00 3F 40 6F FF 3F 20 6F FF 3F A0 6F FF 3F 80 6F FF 7C 0B 03 78 63 E6 FF FF 63 65 00 21 63 44 FD FF 63 23 FE 34 63 BD FE FF 63 9C FF 40 2C 0B 00 21 55 60 10 3A 40 81 00 18
+==== BB 8 (0x25471B5C) approx BBs exec'd 0 ====
+
+ 0x25471B5C: 7D48012E stwx r10,r8,r0
+ 0: GETL R0, t0
+ 1: GETL R8, t2
+ 2: ADDL t2, t0
+ 3: GETL R10, t4
+ 4: STL t4, (t0)
+ 5: INCEIPL $4
+
+ 0x25471B60: 856A0008 lwzu r11,8(r10)
+ 6: GETL R10, t6
+ 7: ADDL $0x8, t6
+ 8: PUTL t6, R10
+ 9: LDL (t6), t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x25471B64: 2C8B0000 cmpi cr1,r11,0
+ 12: GETL R11, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x1, CR
+ 15: INCEIPL $4
+
+ 0x25471B68: 4086FFD4 bc 4,6,0x25471B3C
+ 16: Jc06o $0x25471B3C
+
+
+
+. 8 25471B5C 16
+. 7D 48 01 2E 85 6A 00 08 2C 8B 00 00 40 86 FF D4
+==== BB 9 (0x25471B3C) approx BBs exec'd 0 ====
+
+ 0x25471B3C: 2C0B0021 cmpi cr0,r11,33
+ 0: GETL R11, t0
+ 1: MOVL $0x21, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25471B40: 5560103A rlwinm r0,r11,2,0,29
+ 5: GETL R11, t6
+ 6: SHLL $0x2, t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x25471B44: 40810018 bc 4,1,0x25471B5C
+ 9: Jc01o $0x25471B5C
+
+
+
+. 9 25471B3C 12
+. 2C 0B 00 21 55 60 10 3A 40 81 00 18
+==== BB 10 (0x25471B48) approx BBs exec'd 0 ====
+
+ 0x25471B48: 7C0B3050 subf r0,r11,r6
+ 0: GETL R11, t0
+ 1: GETL R6, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25471B4C: 2880000F cmpli cr1,r0,15
+ 5: GETL R0, t4
+ 6: MOVL $0xF, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x25471B50: 418502D8 bc 12,5,0x25471E28
+ 10: Js05o $0x25471E28
+
+
+
+. 10 25471B48 12
+. 7C 0B 30 50 28 80 00 0F 41 85 02 D8
+==== BB 11 (0x25471B54) approx BBs exec'd 0 ====
+
+ 0x25471B54: 7C0B2850 subf r0,r11,r5
+ 0: GETL R11, t0
+ 1: GETL R5, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25471B58: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25471B5C: 7D48012E stwx r10,r8,r0
+ 9: GETL R0, t6
+ 10: GETL R8, t8
+ 11: ADDL t8, t6
+ 12: GETL R10, t10
+ 13: STL t10, (t6)
+ 14: INCEIPL $4
+
+ 0x25471B60: 856A0008 lwzu r11,8(r10)
+ 15: GETL R10, t12
+ 16: ADDL $0x8, t12
+ 17: PUTL t12, R10
+ 18: LDL (t12), t14
+ 19: PUTL t14, R11
+ 20: INCEIPL $4
+
+ 0x25471B64: 2C8B0000 cmpi cr1,r11,0
+ 21: GETL R11, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x1, CR
+ 24: INCEIPL $4
+
+ 0x25471B68: 4086FFD4 bc 4,6,0x25471B3C
+ 25: Jc06o $0x25471B3C
+
+
+
+. 11 25471B54 24
+. 7C 0B 28 50 54 00 10 3A 7D 48 01 2E 85 6A 00 08 2C 8B 00 00 40 86 FF D4
+==== BB 12 (0x25471E28) approx BBs exec'd 0 ====
+
+ 0x25471E28: 5579083C rlwinm r25,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0x25471E2C: 7F2C0E70 srawi r12,r25,1
+ 4: GETL R25, t2
+ 5: SARL $0x1, t2 (-wCa)
+ 6: PUTL t2, R12
+ 7: INCEIPL $4
+
+ 0x25471E30: 7D8960F8 nor r9,r12,r12
+ 8: GETL R12, t4
+ 9: NOTL t4
+ 10: PUTL t4, R9
+ 11: INCEIPL $4
+
+ 0x25471E34: 200C0031 subfic r0,r12,49
+ 12: GETL R12, t6
+ 13: MOVL $0x31, t8
+ 14: SBBL t6, t8 (-wCa)
+ 15: PUTL t8, R0
+ 16: INCEIPL $4
+
+ 0x25471E38: 2B090002 cmpli cr6,r9,2
+ 17: GETL R9, t10
+ 18: MOVL $0x2, t14
+ 19: CMPUL t10, t14, t12 (-rSo)
+ 20: ICRFL t12, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x25471E3C: 40B9FD1C bc 5,25,0x25471B58
+ 22: Jc25o $0x25471B58
+
+
+
+. 12 25471E28 24
+. 55 79 08 3C 7F 2C 0E 70 7D 89 60 F8 20 0C 00 31 2B 09 00 02 40 B9 FD 1C
+==== BB 13 (0x25471E40) approx BBs exec'd 0 ====
+
+ 0x25471E40: 7F4B2050 subf r26,r11,r4
+ 0: GETL R11, t0
+ 1: GETL R4, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25471E44: 2B9A000B cmpli cr7,r26,11
+ 5: GETL R26, t4
+ 6: MOVL $0xB, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x25471E48: 419D0010 bc 12,29,0x25471E58
+ 10: Js29o $0x25471E58
+
+
+
+. 13 25471E40 12
+. 7F 4B 20 50 2B 9A 00 0B 41 9D 00 10
+==== BB 14 (0x25471E4C) approx BBs exec'd 0 ====
+
+ 0x25471E4C: 7C0B1850 subf r0,r11,r3
+ 0: GETL R11, t0
+ 1: GETL R3, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25471E50: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25471E54: 4BFFFD08 b 0x25471B5C
+ 9: JMPo $0x25471B5C ($4)
+
+
+
+. 14 25471E4C 12
+. 7C 0B 18 50 54 00 10 3A 4B FF FD 08
+==== BB 15 (0x25471B6C) approx BBs exec'd 0 ====
+
+ 0x25471B6C: 81780000 lwz r11,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25471B70: 2F0B0000 cmpi cr6,r11,0
+ 4: GETL R11, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x25471B74: 419A00B0 bc 12,26,0x25471C24
+ 8: Js26o $0x25471C24
+
+
+
+. 15 25471B6C 12
+. 81 78 00 00 2F 0B 00 00 41 9A 00 B0
+==== BB 16 (0x25471B78) approx BBs exec'd 0 ====
+
+ 0x25471B78: 81280010 lwz r9,16(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25471B7C: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25471B80: 419E0010 bc 12,30,0x25471B90
+ 9: Js30o $0x25471B90
+
+
+
+. 16 25471B78 12
+. 81 28 00 10 2F 89 00 00 41 9E 00 10
+==== BB 17 (0x25471B84) approx BBs exec'd 0 ====
+
+ 0x25471B84: 81490004 lwz r10,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25471B88: 7C6A5A14 add r3,r10,r11
+ 5: GETL R10, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25471B8C: 90690004 stw r3,4(r9)
+ 10: GETL R3, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471B90: 8128000C lwz r9,12(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0xC, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471B94: 2C090000 cmpi cr0,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x25471B98: 41820010 bc 12,2,0x25471BA8
+ 24: Js02o $0x25471BA8
+
+
+
+. 17 25471B84 24
+. 81 49 00 04 7C 6A 5A 14 90 69 00 04 81 28 00 0C 2C 09 00 00 41 82 00 10
+==== BB 18 (0x25471B9C) approx BBs exec'd 0 ====
+
+ 0x25471B9C: 80A90004 lwz r5,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25471BA0: 7C855A14 add r4,r5,r11
+ 5: GETL R5, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25471BA4: 90890004 stw r4,4(r9)
+ 10: GETL R4, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471BA8: 81280014 lwz r9,20(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x14, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471BAC: 2C890000 cmpi cr1,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x1, CR
+ 23: INCEIPL $4
+
+ 0x25471BB0: 41860010 bc 12,6,0x25471BC0
+ 24: Js06o $0x25471BC0
+
+
+
+. 18 25471B9C 24
+. 80 A9 00 04 7C 85 5A 14 90 89 00 04 81 28 00 14 2C 89 00 00 41 86 00 10
+==== BB 19 (0x25471BB4) approx BBs exec'd 0 ====
+
+ 0x25471BB4: 80E90004 lwz r7,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25471BB8: 7CC75A14 add r6,r7,r11
+ 5: GETL R7, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x25471BBC: 90C90004 stw r6,4(r9)
+ 10: GETL R6, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471BC0: 81280018 lwz r9,24(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x18, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471BC4: 2F090000 cmpi cr6,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x6, CR
+ 23: INCEIPL $4
+
+ 0x25471BC8: 419A0010 bc 12,26,0x25471BD8
+ 24: Js26o $0x25471BD8
+
+
+
+. 19 25471BB4 24
+. 80 E9 00 04 7C C7 5A 14 90 C9 00 04 81 28 00 18 2F 09 00 00 41 9A 00 10
+==== BB 20 (0x25471BCC) approx BBs exec'd 0 ====
+
+ 0x25471BCC: 83A90004 lwz r29,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25471BD0: 7F9D5A14 add r28,r29,r11
+ 5: GETL R29, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25471BD4: 93890004 stw r28,4(r9)
+ 10: GETL R28, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471BD8: 8128001C lwz r9,28(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x1C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471BDC: 2F890000 cmpi cr7,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x7, CR
+ 23: INCEIPL $4
+
+ 0x25471BE0: 419E0010 bc 12,30,0x25471BF0
+ 24: Js30o $0x25471BF0
+
+
+
+. 20 25471BCC 24
+. 83 A9 00 04 7F 9D 5A 14 93 89 00 04 81 28 00 1C 2F 89 00 00 41 9E 00 10
+==== BB 21 (0x25471BE4) approx BBs exec'd 0 ====
+
+ 0x25471BE4: 80090004 lwz r0,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25471BE8: 7FE05A14 add r31,r0,r11
+ 5: GETL R0, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0x25471BEC: 93E90004 stw r31,4(r9)
+ 10: GETL R31, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471BF0: 8128005C lwz r9,92(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x5C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471BF4: 2C090000 cmpi cr0,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x25471BF8: 41820010 bc 12,2,0x25471C08
+ 24: Js02o $0x25471C08
+
+
+
+. 21 25471BE4 24
+. 80 09 00 04 7F E0 5A 14 93 E9 00 04 81 28 00 5C 2C 09 00 00 41 82 00 10
+==== BB 22 (0x25471BFC) approx BBs exec'd 0 ====
+
+ 0x25471BFC: 83290004 lwz r25,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x25471C00: 7D995A14 add r12,r25,r11
+ 5: GETL R25, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25471C04: 91890004 stw r12,4(r9)
+ 10: GETL R12, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471C08: 812800C4 lwz r9,196(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0xC4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471C0C: 2C890000 cmpi cr1,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x1, CR
+ 23: INCEIPL $4
+
+ 0x25471C10: 41860010 bc 12,6,0x25471C20
+ 24: Js06o $0x25471C20
+
+
+
+. 22 25471BFC 24
+. 83 29 00 04 7D 99 5A 14 91 89 00 04 81 28 00 C4 2C 89 00 00 41 86 00 10
+==== BB 23 (0x25471C14) approx BBs exec'd 0 ====
+
+ 0x25471C14: 83490004 lwz r26,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25471C18: 7D1A5A14 add r8,r26,r11
+ 5: GETL R26, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x25471C1C: 91090004 stw r8,4(r9)
+ 10: GETL R8, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471C20: 80E10010 lwz r7,16(r1)
+ 15: GETL R1, t12
+ 16: ADDL $0x10, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R7
+ 19: INCEIPL $4
+
+ 0x25471C24: 2F070000 cmpi cr6,r7,0
+ 20: GETL R7, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x6, CR
+ 23: INCEIPL $4
+
+ 0x25471C28: 3960FFFF li r11,-1
+ 24: MOVL $0xFFFFFFFF, t20
+ 25: PUTL t20, R11
+ 26: INCEIPL $4
+
+ 0x25471C2C: 9161023C stw r11,572(r1)
+ 27: GETL R11, t22
+ 28: GETL R1, t24
+ 29: ADDL $0x23C, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0x25471C30: 409A0010 bc 4,26,0x25471C40
+ 32: Jc26o $0x25471C40
+
+
+
+. 23 25471C14 32
+. 83 49 00 04 7D 1A 5A 14 91 09 00 04 80 E1 00 10 2F 07 00 00 39 60 FF FF 91 61 02 3C 40 9A 00 10
+==== BB 24 (0x25471C40) approx BBs exec'd 0 ====
+
+ 0x25471C40: 7F03C378 or r3,r24,r24
+ 0: GETL R24, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25471C44: 38800000 li r4,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25471C48: 38A00000 li r5,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x25471C4C: 3B600000 li r27,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R27
+ 11: INCEIPL $4
+
+ 0x25471C50: 4800EBE1 bl 0x25480830
+ 12: MOVL $0x25471C54, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25480830 ($4)
+
+
+
+. 24 25471C40 20
+. 7F 03 C3 78 38 80 00 00 38 A0 00 00 3B 60 00 00 48 00 EB E1
+==== BB 25 __elf_machine_runtime_setup(0x25480830) approx BBs exec'd 0 ====
+
+ 0x25480830: 7CC802A6 mflr r6
+ 0: GETL LR, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x25480834: 9421FFD0 stwu r1,-48(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFD0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x25480838: 7D800026 mfcr r12
+ 9: GETL CR, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x2548083C: 480167C5 bl 0x25497000
+ 12: MOVL $0x25480840, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25497000 ($4)
+
+
+
+. 25 25480830 16
+. 7C C8 02 A6 94 21 FF D0 7D 80 00 26 48 01 67 C5
+==== BB 26 (0x25480840) approx BBs exec'd 0 ====
+
+ 0x25480840: 93210014 stw r25,20(r1)
+ 0: GETL R25, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25480844: 7C992378 or r25,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R25
+ 7: INCEIPL $4
+
+ 0x25480848: 90C10034 stw r6,52(r1)
+ 8: GETL R6, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x34, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2548084C: 8003007C lwz r0,124(r3)
+ 13: GETL R3, t10
+ 14: ADDL $0x7C, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R0
+ 17: INCEIPL $4
+
+ 0x25480850: 93A10024 stw r29,36(r1)
+ 18: GETL R29, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x24, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25480854: 7C7D1B78 or r29,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x25480858: 2F800000 cmpi cr7,r0,0
+ 26: GETL R0, t20
+ 27: CMP0L t20, t22 (-rSo)
+ 28: ICRFL t22, $0x7, CR
+ 29: INCEIPL $4
+
+ 0x2548085C: 93C10028 stw r30,40(r1)
+ 30: GETL R30, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x28, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x25480860: 92E1000C stw r23,12(r1)
+ 35: GETL R23, t28
+ 36: GETL R1, t30
+ 37: ADDL $0xC, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x25480864: 7FC802A6 mflr r30
+ 40: GETL LR, t32
+ 41: PUTL t32, R30
+ 42: INCEIPL $4
+
+ 0x25480868: 93010010 stw r24,16(r1)
+ 43: GETL R24, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x10, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x2548086C: 93410018 stw r26,24(r1)
+ 48: GETL R26, t38
+ 49: GETL R1, t40
+ 50: ADDL $0x18, t40
+ 51: STL t38, (t40)
+ 52: INCEIPL $4
+
+ 0x25480870: 9361001C stw r27,28(r1)
+ 53: GETL R27, t42
+ 54: GETL R1, t44
+ 55: ADDL $0x1C, t44
+ 56: STL t42, (t44)
+ 57: INCEIPL $4
+
+ 0x25480874: 93810020 stw r28,32(r1)
+ 58: GETL R28, t46
+ 59: GETL R1, t48
+ 60: ADDL $0x20, t48
+ 61: STL t46, (t48)
+ 62: INCEIPL $4
+
+ 0x25480878: 93E1002C stw r31,44(r1)
+ 63: GETL R31, t50
+ 64: GETL R1, t52
+ 65: ADDL $0x2C, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0x2548087C: 91810008 stw r12,8(r1)
+ 68: GETL R12, t54
+ 69: GETL R1, t56
+ 70: ADDL $0x8, t56
+ 71: STL t54, (t56)
+ 72: INCEIPL $4
+
+ 0x25480880: 419E0294 bc 12,30,0x25480B14
+ 73: Js30o $0x25480B14
+
+
+
+. 26 25480840 68
+. 93 21 00 14 7C 99 23 78 90 C1 00 34 80 03 00 7C 93 A1 00 24 7C 7D 1B 78 2F 80 00 00 93 C1 00 28 92 E1 00 0C 7F C8 02 A6 93 01 00 10 93 41 00 18 93 61 00 1C 93 81 00 20 93 E1 00 2C 91 81 00 08 41 9E 02 94
+==== BB 27 (0x25480884) approx BBs exec'd 0 ====
+
+ 0x25480884: 82E30028 lwz r23,40(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x28, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x25480888: 3D40AAAA lis r10,-21846
+ 5: MOVL $0xAAAA0000, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0x2548088C: 6148AAAB ori r8,r10,0xAAAB
+ 8: MOVL $0xAAAAAAAB, t6
+ 9: PUTL t6, R8
+ 10: INCEIPL $4
+
+ 0x25480890: 8083002C lwz r4,44(r3)
+ 11: GETL R3, t8
+ 12: ADDL $0x2C, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0x25480894: 80F70004 lwz r7,4(r23)
+ 16: GETL R23, t12
+ 17: ADDL $0x4, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R7
+ 20: INCEIPL $4
+
+ 0x25480898: 83E40004 lwz r31,4(r4)
+ 21: GETL R4, t16
+ 22: ADDL $0x4, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0x2548089C: 7D674016 mulhwu r11,r7,r8
+ 26: GETL R7, t20
+ 27: GETL R8, t22
+ 28: UMULHL t20, t22
+ 29: PUTL t22, R11
+ 30: INCEIPL $4
+
+ 0x254808A0: 557BE8FE rlwinm r27,r11,29,3,31
+ 31: GETL R11, t24
+ 32: SHRL $0x3, t24
+ 33: PUTL t24, R27
+ 34: INCEIPL $4
+
+ 0x254808A4: 281B2000 cmpli cr0,r27,8192
+ 35: GETL R27, t26
+ 36: MOVL $0x2000, t30
+ 37: CMPUL t26, t30, t28 (-rSo)
+ 38: ICRFL t28, $0x0, CR
+ 39: INCEIPL $4
+
+ 0x254808A8: 5763083C rlwinm r3,r27,1,0,30
+ 40: GETL R27, t32
+ 41: SHLL $0x1, t32
+ 42: PUTL t32, R3
+ 43: INCEIPL $4
+
+ 0x254808AC: 38030012 addi r0,r3,18
+ 44: GETL R3, t34
+ 45: ADDL $0x12, t34
+ 46: PUTL t34, R0
+ 47: INCEIPL $4
+
+ 0x254808B0: 7D201A14 add r9,r0,r3
+ 48: GETL R0, t36
+ 49: GETL R3, t38
+ 50: ADDL t36, t38
+ 51: PUTL t38, R9
+ 52: INCEIPL $4
+
+ 0x254808B4: 3AE9C000 addi r23,r9,-16384
+ 53: GETL R9, t40
+ 54: ADDL $0xFFFFC000, t40
+ 55: PUTL t40, R23
+ 56: INCEIPL $4
+
+ 0x254808B8: 4081029C bc 4,1,0x25480B54
+ 57: Jc01o $0x25480B54
+
+
+
+. 27 25480884 56
+. 82 E3 00 28 3D 40 AA AA 61 48 AA AB 80 83 00 2C 80 F7 00 04 83 E4 00 04 7D 67 40 16 55 7B E8 FE 28 1B 20 00 57 63 08 3C 38 03 00 12 7D 20 1A 14 3A E9 C0 00 40 81 02 9C
+==== BB 28 (0x25480B54) approx BBs exec'd 0 ====
+
+ 0x25480B54: 7C170378 or r23,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R23
+ 2: INCEIPL $4
+
+ 0x25480B58: 4BFFFD64 b 0x254808BC
+ 3: JMPo $0x254808BC ($4)
+
+
+
+. 28 25480B54 8
+. 7C 17 03 78 4B FF FD 64
+==== BB 29 (0x254808BC) approx BBs exec'd 0 ====
+
+ 0x254808BC: 56E8103A rlwinm r8,r23,2,0,29
+ 0: GETL R23, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x254808C0: 2E190000 cmpi cr4,r25,0
+ 4: GETL R25, t2
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x4, CR
+ 7: INCEIPL $4
+
+ 0x254808C4: 7F48FA14 add r26,r8,r31
+ 8: GETL R8, t6
+ 9: GETL R31, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x254808C8: 3C607D69 lis r3,32105
+ 13: MOVL $0x7D690000, t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0x254808CC: 3CFA0001 addis r7,r26,1
+ 16: GETL R26, t12
+ 17: ADDL $0x10000, t12
+ 18: PUTL t12, R7
+ 19: INCEIPL $4
+
+ 0x254808D0: 574B043E rlwinm r11,r26,0,16,31
+ 20: GETL R26, t14
+ 21: ANDL $0xFFFF, t14
+ 22: PUTL t14, R11
+ 23: INCEIPL $4
+
+ 0x254808D4: 38878000 addi r4,r7,-32768
+ 24: GETL R7, t16
+ 25: ADDL $0xFFFF8000, t16
+ 26: PUTL t16, R4
+ 27: INCEIPL $4
+
+ 0x254808D8: 3CC04E80 lis r6,20096
+ 28: MOVL $0x4E800000, t18
+ 29: PUTL t18, R6
+ 30: INCEIPL $4
+
+ 0x254808DC: 5489843E rlwinm r9,r4,16,16,31
+ 31: GETL R4, t20
+ 32: SHRL $0x10, t20
+ 33: PUTL t20, R9
+ 34: INCEIPL $4
+
+ 0x254808E0: 6560816B oris r0,r11,0x816B
+ 35: GETL R11, t22
+ 36: ORL $0x816B0000, t22
+ 37: PUTL t22, R0
+ 38: INCEIPL $4
+
+ 0x254808E4: 652C3D6B oris r12,r9,0x3D6B
+ 39: GETL R9, t24
+ 40: ORL $0x3D6B0000, t24
+ 41: PUTL t24, R12
+ 42: INCEIPL $4
+
+ 0x254808E8: 607C03A6 ori r28,r3,0x3A6
+ 43: MOVL $0x7D6903A6, t26
+ 44: PUTL t26, R28
+ 45: INCEIPL $4
+
+ 0x254808EC: 60D80420 ori r24,r6,0x420
+ 46: MOVL $0x4E800420, t28
+ 47: PUTL t28, R24
+ 48: INCEIPL $4
+
+ 0x254808F0: 919F0000 stw r12,0(r31)
+ 49: GETL R12, t30
+ 50: GETL R31, t32
+ 51: STL t30, (t32)
+ 52: INCEIPL $4
+
+ 0x254808F4: 901F0004 stw r0,4(r31)
+ 53: GETL R0, t34
+ 54: GETL R31, t36
+ 55: ADDL $0x4, t36
+ 56: STL t34, (t36)
+ 57: INCEIPL $4
+
+ 0x254808F8: 939F0008 stw r28,8(r31)
+ 58: GETL R28, t38
+ 59: GETL R31, t40
+ 60: ADDL $0x8, t40
+ 61: STL t38, (t40)
+ 62: INCEIPL $4
+
+ 0x254808FC: 931F000C stw r24,12(r31)
+ 63: GETL R24, t42
+ 64: GETL R31, t44
+ 65: ADDL $0xC, t44
+ 66: STL t42, (t44)
+ 67: INCEIPL $4
+
+ 0x25480900: 41920178 bc 12,18,0x25480A78
+ 68: Js18o $0x25480A78
+
+
+
+. 29 254808BC 72
+. 56 E8 10 3A 2E 19 00 00 7F 48 FA 14 3C 60 7D 69 3C FA 00 01 57 4B 04 3E 38 87 80 00 3C C0 4E 80 54 89 84 3E 65 60 81 6B 65 2C 3D 6B 60 7C 03 A6 60 D8 04 20 91 9F 00 00 90 1F 00 04 93 9F 00 08 93 1F 00 0C 41 92 01 78
+==== BB 30 (0x25480A78) approx BBs exec'd 0 ====
+
+ 0x25480A78: 817E04F0 lwz r11,1264(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25480A7C: 3159FFFF addic r10,r25,-1
+ 5: GETL R25, t4
+ 6: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x25480A80: 7CAAC910 subfe r5,r10,r25
+ 9: GETL R10, t6
+ 10: GETL R25, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0x25480A84: 314BFFFF addic r10,r11,-1
+ 14: GETL R11, t10
+ 15: ADCL $0xFFFFFFFF, t10 (-wCa)
+ 16: PUTL t10, R10
+ 17: INCEIPL $4
+
+ 0x25480A88: 7C8A5910 subfe r4,r10,r11
+ 18: GETL R10, t12
+ 19: GETL R11, t14
+ 20: SBBL t12, t14 (-rCa-wCa)
+ 21: PUTL t14, R4
+ 22: INCEIPL $4
+
+ 0x25480A8C: 7CAA2039 and. r10,r5,r4
+ 23: GETL R5, t16
+ 24: GETL R4, t18
+ 25: ANDL t16, t18
+ 26: PUTL t18, R10
+ 27: CMP0L t18, t20 (-rSo)
+ 28: ICRFL t20, $0x0, CR
+ 29: INCEIPL $4
+
+ 0x25480A90: 39400004 li r10,4
+ 30: MOVL $0x4, t22
+ 31: PUTL t22, R10
+ 32: INCEIPL $4
+
+ 0x25480A94: 41820010 bc 12,2,0x25480AA4
+ 33: Js02o $0x25480AA4
+
+
+
+. 30 25480A78 32
+. 81 7E 04 F0 31 59 FF FF 7C AA C9 10 31 4B FF FF 7C 8A 59 10 7C AA 20 39 39 40 00 04 41 82 00 10
+==== BB 31 (0x25480AA4) approx BBs exec'd 0 ====
+
+ 0x25480AA4: 419200B8 bc 12,18,0x25480B5C
+ 0: Js18o $0x25480B5C
+
+
+
+. 31 25480AA4 4
+. 41 92 00 B8
+==== BB 32 (0x25480B5C) approx BBs exec'd 0 ====
+
+ 0x25480B5C: 39600006 li r11,6
+ 0: MOVL $0x6, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x25480B60: 4BFFFF4C b 0x25480AAC
+ 3: JMPo $0x25480AAC ($4)
+
+
+
+. 32 25480B5C 8
+. 39 60 00 06 4B FF FF 4C
+==== BB 33 (0x25480AAC) approx BBs exec'd 0 ====
+
+ 0x25480AAC: 39200000 li r9,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25480AB0: 48000014 b 0x25480AC4
+ 3: JMPo $0x25480AC4 ($4)
+
+
+
+. 33 25480AAC 8
+. 39 20 00 00 48 00 00 14
+==== BB 34 (0x25480AC4) approx BBs exec'd 0 ====
+
+ 0x25480AC4: 7E095840 cmpl cr4,r9,r11
+ 0: GETL R9, t0
+ 1: GETL R11, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x25480AC8: 4190FFEC bc 12,16,0x25480AB4
+ 5: Js16o $0x25480AB4
+
+
+
+. 34 25480AC4 8
+. 7E 09 58 40 41 90 FF EC
+==== BB 35 (0x25480AB4) approx BBs exec'd 0 ====
+
+ 0x25480AB4: 553A103A rlwinm r26,r9,2,0,29
+ 0: GETL R9, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x25480AB8: 7EFAFA14 add r23,r26,r31
+ 4: GETL R26, t2
+ 5: GETL R31, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R23
+ 8: INCEIPL $4
+
+ 0x25480ABC: 7C00B86C dcbst r0,r23
+ 9: INCEIPL $4
+
+ 0x25480AC0: 7D295214 add r9,r9,r10
+ 10: GETL R9, t6
+ 11: GETL R10, t8
+ 12: ADDL t6, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x25480AC4: 7E095840 cmpl cr4,r9,r11
+ 15: GETL R9, t10
+ 16: GETL R11, t12
+ 17: CMPUL t10, t12, t14 (-rSo)
+ 18: ICRFL t14, $0x4, CR
+ 19: INCEIPL $4
+
+ 0x25480AC8: 4190FFEC bc 12,16,0x25480AB4
+ 20: Js16o $0x25480AB4
+
+
+
+. 35 25480AB4 24
+. 55 3A 10 3A 7E FA FA 14 7C 00 B8 6C 7D 29 52 14 7E 09 58 40 41 90 FF EC
+==== BB 36 (0x25480ACC) approx BBs exec'd 0 ====
+
+ 0x25480ACC: 5568103A rlwinm r8,r11,2,0,29
+ 0: GETL R11, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x25480AD0: 7CE8FA14 add r7,r8,r31
+ 4: GETL R8, t2
+ 5: GETL R31, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x25480AD4: 3927FFFC addi r9,r7,-4
+ 9: GETL R7, t6
+ 10: ADDL $0xFFFFFFFC, t6
+ 11: PUTL t6, R9
+ 12: INCEIPL $4
+
+ 0x25480AD8: 7C00486C dcbst r0,r9
+ 13: INCEIPL $4
+
+ 0x25480ADC: 7C0004AC sync
+ 14: INCEIPL $4
+
+ 0x25480AE0: 39200000 li r9,0
+ 15: MOVL $0x0, t8
+ 16: PUTL t8, R9
+ 17: INCEIPL $4
+
+ 0x25480AE4: 48000014 b 0x25480AF8
+ 18: JMPo $0x25480AF8 ($4)
+
+
+
+. 36 25480ACC 28
+. 55 68 10 3A 7C E8 FA 14 39 27 FF FC 7C 00 48 6C 7C 00 04 AC 39 20 00 00 48 00 00 14
+==== BB 37 (0x25480AF8) approx BBs exec'd 0 ====
+
+ 0x25480AF8: 7F895840 cmpl cr7,r9,r11
+ 0: GETL R9, t0
+ 1: GETL R11, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25480AFC: 419CFFEC bc 12,28,0x25480AE8
+ 5: Js28o $0x25480AE8
+
+
+
+. 37 25480AF8 8
+. 7F 89 58 40 41 9C FF EC
+==== BB 38 (0x25480AE8) approx BBs exec'd 0 ====
+
+ 0x25480AE8: 553B103A rlwinm r27,r9,2,0,29
+ 0: GETL R9, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25480AEC: 7CDBFA14 add r6,r27,r31
+ 4: GETL R27, t2
+ 5: GETL R31, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x25480AF0: 7C0037AC icbi r0,r6
+ 9: GETL R6, t6
+ 10: CALLM_So
+ 11: PUSHL t6
+ 12: CALLMo $0x68
+ 13: CALLM_Eo
+ 14: INCEIPL $4
+
+ 0x25480AF4: 7D295214 add r9,r9,r10
+ 15: GETL R9, t8
+ 16: GETL R10, t10
+ 17: ADDL t8, t10
+ 18: PUTL t10, R9
+ 19: INCEIPL $4
+
+ 0x25480AF8: 7F895840 cmpl cr7,r9,r11
+ 20: GETL R9, t12
+ 21: GETL R11, t14
+ 22: CMPUL t12, t14, t16 (-rSo)
+ 23: ICRFL t16, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x25480AFC: 419CFFEC bc 12,28,0x25480AE8
+ 25: Js28o $0x25480AE8
+
+
+
+. 38 25480AE8 24
+. 55 3B 10 3A 7C DB FA 14 7C 00 37 AC 7D 29 52 14 7F 89 58 40 41 9C FF EC
+==== BB 39 (0x25480B00) approx BBs exec'd 0 ====
+
+ 0x25480B00: 7C68FA14 add r3,r8,r31
+ 0: GETL R8, t0
+ 1: GETL R31, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25480B04: 3BE3FFFC addi r31,r3,-4
+ 5: GETL R3, t4
+ 6: ADDL $0xFFFFFFFC, t4
+ 7: PUTL t4, R31
+ 8: INCEIPL $4
+
+ 0x25480B08: 7C00FFAC icbi r0,r31
+ 9: GETL R31, t6
+ 10: CALLM_So
+ 11: PUSHL t6
+ 12: CALLMo $0x68
+ 13: CALLM_Eo
+ 14: INCEIPL $4
+
+ 0x25480B0C: 7C0004AC sync
+ 15: INCEIPL $4
+
+ 0x25480B10: 4C00012C 16: INCEIPL $4
+
+ 0x25480B14: 7F23CB78 or r3,r25,r25
+ 17: GETL R25, t8
+ 18: PUTL t8, R3
+ 19: INCEIPL $4
+
+ 0x25480B18: 81010008 lwz r8,8(r1)
+ 20: GETL R1, t10
+ 21: ADDL $0x8, t10
+ 22: LDL (t10), t12
+ 23: PUTL t12, R8
+ 24: INCEIPL $4
+
+ 0x25480B1C: 83210034 lwz r25,52(r1)
+ 25: GETL R1, t14
+ 26: ADDL $0x34, t14
+ 27: LDL (t14), t16
+ 28: PUTL t16, R25
+ 29: INCEIPL $4
+
+ 0x25480B20: 82E1000C lwz r23,12(r1)
+ 30: GETL R1, t18
+ 31: ADDL $0xC, t18
+ 32: LDL (t18), t20
+ 33: PUTL t20, R23
+ 34: INCEIPL $4
+
+ 0x25480B24: 7D008120 mtcrf 0x8,r8
+ 35: GETL R8, t22
+ 36: ICRFL t22, $0x4, CR
+ 37: INCEIPL $4
+
+ 0x25480B28: 7F2803A6 mtlr r25
+ 38: GETL R25, t24
+ 39: PUTL t24, LR
+ 40: INCEIPL $4
+
+ 0x25480B2C: 83010010 lwz r24,16(r1)
+ 41: GETL R1, t26
+ 42: ADDL $0x10, t26
+ 43: LDL (t26), t28
+ 44: PUTL t28, R24
+ 45: INCEIPL $4
+
+ 0x25480B30: 83210014 lwz r25,20(r1)
+ 46: GETL R1, t30
+ 47: ADDL $0x14, t30
+ 48: LDL (t30), t32
+ 49: PUTL t32, R25
+ 50: INCEIPL $4
+
+ 0x25480B34: 83410018 lwz r26,24(r1)
+ 51: GETL R1, t34
+ 52: ADDL $0x18, t34
+ 53: LDL (t34), t36
+ 54: PUTL t36, R26
+ 55: INCEIPL $4
+
+ 0x25480B38: 8361001C lwz r27,28(r1)
+ 56: GETL R1, t38
+ 57: ADDL $0x1C, t38
+ 58: LDL (t38), t40
+ 59: PUTL t40, R27
+ 60: INCEIPL $4
+
+ 0x25480B3C: 83810020 lwz r28,32(r1)
+ 61: GETL R1, t42
+ 62: ADDL $0x20, t42
+ 63: LDL (t42), t44
+ 64: PUTL t44, R28
+ 65: INCEIPL $4
+
+ 0x25480B40: 83A10024 lwz r29,36(r1)
+ 66: GETL R1, t46
+ 67: ADDL $0x24, t46
+ 68: LDL (t46), t48
+ 69: PUTL t48, R29
+ 70: INCEIPL $4
+
+ 0x25480B44: 83C10028 lwz r30,40(r1)
+ 71: GETL R1, t50
+ 72: ADDL $0x28, t50
+ 73: LDL (t50), t52
+ 74: PUTL t52, R30
+ 75: INCEIPL $4
+
+ 0x25480B48: 83E1002C lwz r31,44(r1)
+ 76: GETL R1, t54
+ 77: ADDL $0x2C, t54
+ 78: LDL (t54), t56
+ 79: PUTL t56, R31
+ 80: INCEIPL $4
+
+ 0x25480B4C: 38210030 addi r1,r1,48
+ 81: GETL R1, t58
+ 82: ADDL $0x30, t58
+ 83: PUTL t58, R1
+ 84: INCEIPL $4
+
+ 0x25480B50: 4E800020 blr
+ 85: GETL LR, t60
+ 86: JMPo-r t60 ($4)
+
+
+
+. 39 25480B00 84
+. 7C 68 FA 14 3B E3 FF FC 7C 00 FF AC 7C 00 04 AC 4C 00 01 2C 7F 23 CB 78 81 01 00 08 83 21 00 34 82 E1 00 0C 7D 00 81 20 7F 28 03 A6 83 01 00 10 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 40 (0x25471C54) approx BBs exec'd 0 ====
+
+ 0x25471C54: 38E00000 li r7,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x25471C58: 8161004C lwz r11,76(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x4C, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x25471C5C: 39400001 li r10,1
+ 8: MOVL $0x1, t6
+ 9: PUTL t6, R10
+ 10: INCEIPL $4
+
+ 0x25471C60: 91410264 stw r10,612(r1)
+ 11: GETL R10, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x264, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25471C64: 2C0B0000 cmpi cr0,r11,0
+ 16: GETL R11, t12
+ 17: CMP0L t12, t14 (-rSo)
+ 18: ICRFL t14, $0x0, CR
+ 19: INCEIPL $4
+
+ 0x25471C68: 93610260 stw r27,608(r1)
+ 20: GETL R27, t16
+ 21: GETL R1, t18
+ 22: ADDL $0x260, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25471C6C: 93610270 stw r27,624(r1)
+ 25: GETL R27, t20
+ 26: GETL R1, t22
+ 27: ADDL $0x270, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0x25471C70: 93610258 stw r27,600(r1)
+ 30: GETL R27, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x258, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x25471C74: 9361026C stw r27,620(r1)
+ 35: GETL R27, t28
+ 36: GETL R1, t30
+ 37: ADDL $0x26C, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x25471C78: 90E10254 stw r7,596(r1)
+ 40: GETL R7, t32
+ 41: GETL R1, t34
+ 42: ADDL $0x254, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0x25471C7C: 41820018 bc 12,2,0x25471C94
+ 45: Js02o $0x25471C94
+
+
+
+. 40 25471C54 44
+. 38 E0 00 00 81 61 00 4C 39 40 00 01 91 41 02 64 2C 0B 00 00 93 61 02 60 93 61 02 70 93 61 02 58 93 61 02 6C 90 E1 02 54 41 82 00 18
+==== BB 41 (0x25471C80) approx BBs exec'd 0 ====
+
+ 0x25471C80: 80AB0004 lwz r5,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25471C84: 80810050 lwz r4,80(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x50, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25471C88: 90A10250 stw r5,592(r1)
+ 10: GETL R5, t8
+ 11: GETL R1, t10
+ 12: ADDL $0x250, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471C8C: 80E40004 lwz r7,4(r4)
+ 15: GETL R4, t12
+ 16: ADDL $0x4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R7
+ 19: INCEIPL $4
+
+ 0x25471C90: 90E10254 stw r7,596(r1)
+ 20: GETL R7, t16
+ 21: GETL R1, t18
+ 22: ADDL $0x254, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25471C94: 2C830000 cmpi cr1,r3,0
+ 25: GETL R3, t20
+ 26: CMP0L t20, t22 (-rSo)
+ 27: ICRFL t22, $0x1, CR
+ 28: INCEIPL $4
+
+ 0x25471C98: 41860010 bc 12,6,0x25471CA8
+ 29: Js06o $0x25471CA8
+
+
+
+. 41 25471C80 28
+. 80 AB 00 04 80 81 00 50 90 A1 02 50 80 E4 00 04 90 E1 02 54 2C 83 00 00 41 86 00 10
+==== BB 42 (0x25471CA8) approx BBs exec'd 0 ====
+
+ 0x25471CA8: 3B610008 addi r27,r1,8
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25471CAC: 3B200002 li r25,2
+ 4: MOVL $0x2, t2
+ 5: PUTL t2, R25
+ 6: INCEIPL $4
+
+ 0x25471CB0: 814100D0 lwz r10,208(r1)
+ 7: GETL R1, t4
+ 8: ADDL $0xD0, t4
+ 9: LDL (t4), t6
+ 10: PUTL t6, R10
+ 11: INCEIPL $4
+
+ 0x25471CB4: 81210048 lwz r9,72(r1)
+ 12: GETL R1, t8
+ 13: ADDL $0x48, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R9
+ 16: INCEIPL $4
+
+ 0x25471CB8: 2F8A0000 cmpi cr7,r10,0
+ 17: GETL R10, t12
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x7, CR
+ 20: INCEIPL $4
+
+ 0x25471CBC: 811B0248 lwz r8,584(r27)
+ 21: GETL R27, t16
+ 22: ADDL $0x248, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R8
+ 25: INCEIPL $4
+
+ 0x25471CC0: 817B024C lwz r11,588(r27)
+ 26: GETL R27, t20
+ 27: ADDL $0x24C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R11
+ 30: INCEIPL $4
+
+ 0x25471CC4: 83490004 lwz r26,4(r9)
+ 31: GETL R9, t24
+ 32: ADDL $0x4, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R26
+ 35: INCEIPL $4
+
+ 0x25471CC8: 39200000 li r9,0
+ 36: MOVL $0x0, t28
+ 37: PUTL t28, R9
+ 38: INCEIPL $4
+
+ 0x25471CCC: 7F885A14 add r28,r8,r11
+ 39: GETL R8, t30
+ 40: GETL R11, t32
+ 41: ADDL t30, t32
+ 42: PUTL t32, R28
+ 43: INCEIPL $4
+
+ 0x25471CD0: 83A10010 lwz r29,16(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x10, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R29
+ 48: INCEIPL $4
+
+ 0x25471CD4: 419E0008 bc 12,30,0x25471CDC
+ 49: Js30o $0x25471CDC
+
+
+
+. 42 25471CA8 48
+. 3B 61 00 08 3B 20 00 02 81 41 00 D0 81 21 00 48 2F 8A 00 00 81 1B 02 48 81 7B 02 4C 83 49 00 04 39 20 00 00 7F 88 5A 14 83 A1 00 10 41 9E 00 08
+==== BB 43 (0x25471CD8) approx BBs exec'd 0 ====
+
+ 0x25471CD8: 812A0004 lwz r9,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25471CDC: 3CA0AAAA lis r5,-21846
+ 5: MOVL $0xAAAA0000, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25471CE0: 60A4AAAB ori r4,r5,0xAAAB
+ 8: MOVL $0xAAAAAAAB, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x25471CE4: 7D4B2016 mulhwu r10,r11,r4
+ 11: GETL R11, t8
+ 12: GETL R4, t10
+ 13: UMULHL t8, t10
+ 14: PUTL t10, R10
+ 15: INCEIPL $4
+
+ 0x25471CE8: 7D0B4378 or r11,r8,r8
+ 16: GETL R8, t12
+ 17: PUTL t12, R11
+ 18: INCEIPL $4
+
+ 0x25471CEC: 5540E8FE rlwinm r0,r10,29,3,31
+ 19: GETL R10, t14
+ 20: SHRL $0x3, t14
+ 21: PUTL t14, R0
+ 22: INCEIPL $4
+
+ 0x25471CF0: 7C004840 cmpl cr0,r0,r9
+ 23: GETL R0, t16
+ 24: GETL R9, t18
+ 25: CMPUL t16, t18, t20 (-rSo)
+ 26: ICRFL t20, $0x0, CR
+ 27: INCEIPL $4
+
+ 0x25471CF4: 40810008 bc 4,1,0x25471CFC
+ 28: Jc01o $0x25471CFC
+
+
+
+. 43 25471CD8 32
+. 81 2A 00 04 3C A0 AA AA 60 A4 AA AB 7D 4B 20 16 7D 0B 43 78 55 40 E8 FE 7C 00 48 40 40 81 00 08
+==== BB 44 (0x25471CF8) approx BBs exec'd 0 ====
+
+ 0x25471CF8: 7D204B78 or r0,r9,r9
+ 0: GETL R9, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25471CFC: 1C60000C mulli r3,r0,12
+ 3: GETL R0, t2
+ 4: MULL $0xC, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0x25471D00: 7FEB1A14 add r31,r11,r3
+ 7: GETL R11, t4
+ 8: GETL R3, t6
+ 9: ADDL t4, t6
+ 10: PUTL t6, R31
+ 11: INCEIPL $4
+
+ 0x25471D04: 7F8BF840 cmpl cr7,r11,r31
+ 12: GETL R11, t8
+ 13: GETL R31, t10
+ 14: CMPUL t8, t10, t12 (-rSo)
+ 15: ICRFL t12, $0x7, CR
+ 16: INCEIPL $4
+
+ 0x25471D08: 409C0020 bc 4,28,0x25471D28
+ 17: Jc28o $0x25471D28
+
+
+
+. 44 25471CF8 20
+. 7D 20 4B 78 1C 60 00 0C 7F EB 1A 14 7F 8B F8 40 40 9C 00 20
+==== BB 45 (0x25471D0C) approx BBs exec'd 0 ====
+
+ 0x25471D0C: 818B0008 lwz r12,8(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x25471D10: 80CB0000 lwz r6,0(r11)
+ 5: GETL R11, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x25471D14: 396B000C addi r11,r11,12
+ 9: GETL R11, t8
+ 10: ADDL $0xC, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x25471D18: 7CECEA14 add r7,r12,r29
+ 13: GETL R12, t10
+ 14: GETL R29, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R7
+ 17: INCEIPL $4
+
+ 0x25471D1C: 7F8BF840 cmpl cr7,r11,r31
+ 18: GETL R11, t14
+ 19: GETL R31, t16
+ 20: CMPUL t14, t16, t18 (-rSo)
+ 21: ICRFL t18, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x25471D20: 7CE6E92E stwx r7,r6,r29
+ 23: GETL R29, t20
+ 24: GETL R6, t22
+ 25: ADDL t22, t20
+ 26: GETL R7, t24
+ 27: STL t24, (t20)
+ 28: INCEIPL $4
+
+ 0x25471D24: 419CFFE8 bc 12,28,0x25471D0C
+ 29: Js28o $0x25471D0C
+
+
+
+. 45 25471D0C 28
+. 81 8B 00 08 80 CB 00 00 39 6B 00 0C 7C EC EA 14 7F 8B F8 40 7C E6 E9 2E 41 9C FF E8
+==== BB 46 (0x25471D28) approx BBs exec'd 0 ====
+
+ 0x25471D28: 7C9FE040 cmpl cr1,r31,r28
+ 0: GETL R31, t0
+ 1: GETL R28, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25471D2C: 4084008C bc 4,4,0x25471DB8
+ 5: Jc04o $0x25471DB8
+
+
+
+. 46 25471D28 8
+. 7C 9F E0 40 40 84 00 8C
+==== BB 47 (0x25471D30) approx BBs exec'd 0 ====
+
+ 0x25471D30: 811F0004 lwz r8,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25471D34: 817F0000 lwz r11,0(r31)
+ 5: GETL R31, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0x25471D38: 550A063E rlwinm r10,r8,0,24,31
+ 9: GETL R8, t8
+ 10: ANDL $0xFF, t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x25471D3C: 5500E136 rlwinm r0,r8,28,4,27
+ 13: GETL R8, t10
+ 14: ROLL $0x1C, t10
+ 15: ANDL $0xFFFFFF0, t10
+ 16: PUTL t10, R0
+ 17: INCEIPL $4
+
+ 0x25471D40: 2F0A0016 cmpi cr6,r10,22
+ 18: GETL R10, t12
+ 19: MOVL $0x16, t16
+ 20: CMPL t12, t16, t14 (-rSo)
+ 21: ICRFL t14, $0x6, CR
+ 22: INCEIPL $4
+
+ 0x25471D44: 7CC0D214 add r6,r0,r26
+ 23: GETL R0, t18
+ 24: GETL R26, t20
+ 25: ADDL t18, t20
+ 26: PUTL t20, R6
+ 27: INCEIPL $4
+
+ 0x25471D48: 7D0BEA14 add r8,r11,r29
+ 28: GETL R11, t22
+ 29: GETL R29, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R8
+ 32: INCEIPL $4
+
+ 0x25471D4C: 419A00C4 bc 12,26,0x25471E10
+ 33: Js26o $0x25471E10
+
+
+
+. 47 25471D30 32
+. 81 1F 00 04 81 7F 00 00 55 0A 06 3E 55 00 E1 36 2F 0A 00 16 7C C0 D2 14 7D 0B EA 14 41 9A 00 C4
+==== BB 48 (0x25471D50) approx BBs exec'd 0 ====
+
+ 0x25471D50: 2F8A0000 cmpi cr7,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25471D54: 419E0058 bc 12,30,0x25471DAC
+ 4: Js30o $0x25471DAC
+
+
+
+. 48 25471D50 8
+. 2F 8A 00 00 41 9E 00 58
+==== BB 49 (0x25471D58) approx BBs exec'd 0 ====
+
+ 0x25471D58: 8966000C lbz r11,12(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25471D5C: 5569E13F rlwinm. r9,r11,28,4,31
+ 5: GETL R11, t4
+ 6: SHRL $0x4, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25471D60: 4182014C bc 12,2,0x25471EAC
+ 11: Js02o $0x25471EAC
+
+
+
+. 49 25471D58 12
+. 89 66 00 0C 55 69 E1 3F 41 82 01 4C
+==== BB 50 (0x25471D64) approx BBs exec'd 0 ====
+
+ 0x25471D64: A006000E lhz r0,14(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0xE, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25471D68: 2F000000 cmpi cr6,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25471D6C: 39200000 li r9,0
+ 9: MOVL $0x0, t8
+ 10: PUTL t8, R9
+ 11: INCEIPL $4
+
+ 0x25471D70: 419A0008 bc 12,26,0x25471D78
+ 12: Js26o $0x25471D78
+
+
+
+. 50 25471D64 16
+. A0 06 00 0E 2F 00 00 00 39 20 00 00 41 9A 00 08
+==== BB 51 (0x25471D74) approx BBs exec'd 0 ====
+
+ 0x25471D74: 81210010 lwz r9,16(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25471D78: 80A60004 lwz r5,4(r6)
+ 5: GETL R6, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0x25471D7C: 7D292A14 add r9,r9,r5
+ 10: GETL R9, t8
+ 11: GETL R5, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x25471D80: 2F8A0001 cmpi cr7,r10,1
+ 15: GETL R10, t12
+ 16: MOVL $0x1, t16
+ 17: CMPL t12, t16, t14 (-rSo)
+ 18: ICRFL t14, $0x7, CR
+ 19: INCEIPL $4
+
+ 0x25471D84: 807F0008 lwz r3,8(r31)
+ 20: GETL R31, t18
+ 21: ADDL $0x8, t18
+ 22: LDL (t18), t20
+ 23: PUTL t20, R3
+ 24: INCEIPL $4
+
+ 0x25471D88: 7D291A14 add r9,r9,r3
+ 25: GETL R9, t22
+ 26: GETL R3, t24
+ 27: ADDL t22, t24
+ 28: PUTL t24, R9
+ 29: INCEIPL $4
+
+ 0x25471D8C: 419E0078 bc 12,30,0x25471E04
+ 30: Js30o $0x25471E04
+
+
+
+. 51 25471D74 28
+. 81 21 00 10 80 A6 00 04 7D 29 2A 14 2F 8A 00 01 80 7F 00 08 7D 29 1A 14 41 9E 00 78
+==== BB 52 (0x25471D90) approx BBs exec'd 0 ====
+
+ 0x25471D90: 2C0A0014 cmpi cr0,r10,20
+ 0: GETL R10, t0
+ 1: MOVL $0x14, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25471D94: 41820070 bc 12,2,0x25471E04
+ 5: Js02o $0x25471E04
+
+
+
+. 52 25471D90 8
+. 2C 0A 00 14 41 82 00 70
+==== BB 53 (0x25471E04) approx BBs exec'd 0 ====
+
+ 0x25471E04: 3BFF000C addi r31,r31,12
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0x25471E08: 91280000 stw r9,0(r8)
+ 4: GETL R9, t2
+ 5: GETL R8, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x25471E0C: 4BFFFFA4 b 0x25471DB0
+ 8: JMPo $0x25471DB0 ($4)
+
+
+
+. 53 25471E04 12
+. 3B FF 00 0C 91 28 00 00 4B FF FF A4
+==== BB 54 (0x25471DB0) approx BBs exec'd 0 ====
+
+ 0x25471DB0: 7C9FE040 cmpl cr1,r31,r28
+ 0: GETL R31, t0
+ 1: GETL R28, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25471DB4: 4184FF7C bc 12,4,0x25471D30
+ 5: Js04o $0x25471D30
+
+
+
+. 54 25471DB0 8
+. 7C 9F E0 40 41 84 FF 7C
+==== BB 55 (0x25471D98) approx BBs exec'd 0 ====
+
+ 0x25471D98: 7F03C378 or r3,r24,r24
+ 0: GETL R24, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25471D9C: 7FE4FB78 or r4,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25471DA0: 38A00000 li r5,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x25471DA4: 7CC73378 or r7,r6,r6
+ 9: GETL R6, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0x25471DA8: 4800EF01 bl 0x25480CA8
+ 12: MOVL $0x25471DAC, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25480CA8 ($4)
+
+
+
+. 55 25471D98 20
+. 7F 03 C3 78 7F E4 FB 78 38 A0 00 00 7C C7 33 78 48 00 EF 01
+==== BB 56 __process_machine_rela(0x25480CA8) approx BBs exec'd 0 ====
+
+ 0x25480CA8: 2B8A004D cmpli cr7,r10,77
+ 0: GETL R10, t0
+ 1: MOVL $0x4D, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25480CAC: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0x25480CB0: 9421FFD0 stwu r1,-48(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFFD0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25480CB4: 4801634D bl 0x25497000
+ 14: MOVL $0x25480CB8, t12
+ 15: PUTL t12, LR
+ 16: JMPo-c $0x25497000 ($4)
+
+
+
+. 56 25480CA8 16
+. 2B 8A 00 4D 7C 08 02 A6 94 21 FF D0 48 01 63 4D
+==== BB 57 (0x25480CB8) approx BBs exec'd 0 ====
+
+ 0x25480CB8: 93410018 stw r26,24(r1)
+ 0: GETL R26, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25480CBC: 7D3A4B78 or r26,r9,r9
+ 5: GETL R9, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x25480CC0: 9361001C stw r27,28(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25480CC4: 7CDB3378 or r27,r6,r6
+ 13: GETL R6, t10
+ 14: PUTL t10, R27
+ 15: INCEIPL $4
+
+ 0x25480CC8: 93810020 stw r28,32(r1)
+ 16: GETL R28, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x20, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x25480CCC: 7C9C2378 or r28,r4,r4
+ 21: GETL R4, t16
+ 22: PUTL t16, R28
+ 23: INCEIPL $4
+
+ 0x25480CD0: 93A10024 stw r29,36(r1)
+ 24: GETL R29, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x24, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x25480CD4: 7CBD2B78 or r29,r5,r5
+ 29: GETL R5, t22
+ 30: PUTL t22, R29
+ 31: INCEIPL $4
+
+ 0x25480CD8: 93C10028 stw r30,40(r1)
+ 32: GETL R30, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x28, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x25480CDC: 7FC802A6 mflr r30
+ 37: GETL LR, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0x25480CE0: 93E1002C stw r31,44(r1)
+ 40: GETL R31, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x2C, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x25480CE4: 7D5F5378 or r31,r10,r10
+ 45: GETL R10, t34
+ 46: PUTL t34, R31
+ 47: INCEIPL $4
+
+ 0x25480CE8: 90010034 stw r0,52(r1)
+ 48: GETL R0, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x34, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x25480CEC: 90610008 stw r3,8(r1)
+ 53: GETL R3, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x8, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x25480CF0: 90E10010 stw r7,16(r1)
+ 58: GETL R7, t44
+ 59: GETL R1, t46
+ 60: ADDL $0x10, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x25480CF4: 9101000C stw r8,12(r1)
+ 63: GETL R8, t48
+ 64: GETL R1, t50
+ 65: ADDL $0xC, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x25480CF8: 419D0140 bc 12,29,0x25480E38
+ 68: Js29o $0x25480E38
+
+
+
+. 57 25480CB8 68
+. 93 41 00 18 7D 3A 4B 78 93 61 00 1C 7C DB 33 78 93 81 00 20 7C 9C 23 78 93 A1 00 24 7C BD 2B 78 93 C1 00 28 7F C8 02 A6 93 E1 00 2C 7D 5F 53 78 90 01 00 34 90 61 00 08 90 E1 00 10 91 01 00 0C 41 9D 01 40
+==== BB 58 (0x25480CFC) approx BBs exec'd 0 ====
+
+ 0x25480CFC: 817E0450 lwz r11,1104(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x450, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25480D00: 5544103A rlwinm r4,r10,2,0,29
+ 5: GETL R10, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x25480D04: 7C64582E lwzx r3,r4,r11
+ 9: GETL R11, t6
+ 10: GETL R4, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x25480D08: 7D235A14 add r9,r3,r11
+ 15: GETL R3, t12
+ 16: GETL R11, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25480D0C: 7D2903A6 mtctr r9
+ 20: GETL R9, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0x25480D10: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+
+. 58 25480CFC 24
+. 81 7E 04 50 55 44 10 3A 7C 64 58 2E 7D 23 5A 14 7D 29 03 A6 4E 80 04 20
+==== BB 59 (0x25480FD8) approx BBs exec'd 0 ====
+
+ 0x25480FD8: 80A1000C lwz r5,12(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25480FDC: 7FA5D050 subf r29,r5,r26
+ 5: GETL R5, t4
+ 6: GETL R26, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x25480FE0: 57BF3032 rlwinm r31,r29,6,0,25
+ 10: GETL R29, t8
+ 11: SHLL $0x6, t8
+ 12: PUTL t8, R31
+ 13: INCEIPL $4
+
+ 0x25480FE4: 7FE93670 srawi r9,r31,6
+ 14: GETL R31, t10
+ 15: SARL $0x6, t10 (-wCa)
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x25480FE8: 7F89E800 cmp cr7,r9,r29
+ 18: GETL R9, t12
+ 19: GETL R29, t14
+ 20: CMPL t12, t14, t16 (-rSo)
+ 21: ICRFL t16, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x25480FEC: 419E0254 bc 12,30,0x25481240
+ 23: Js30o $0x25481240
+
+
+
+. 59 25480FD8 24
+. 80 A1 00 0C 7F A5 D0 50 57 BF 30 32 7F E9 36 70 7F 89 E8 00 41 9E 02 54
+==== BB 60 (0x25481240) approx BBs exec'd 0 ====
+
+ 0x25481240: 553A01BA rlwinm r26,r9,0,6,29
+ 0: GETL R9, t0
+ 1: ANDL $0x3FFFFFC, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x25481244: 67404800 oris r0,r26,0x4800
+ 4: GETL R26, t2
+ 5: ORL $0x48000000, t2
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0x25481248: 90050000 stw r0,0(r5)
+ 8: GETL R0, t4
+ 9: GETL R5, t6
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x2548124C: 4BFFFBB4 b 0x25480E00
+ 12: JMPo $0x25480E00 ($4)
+
+
+
+. 60 25481240 16
+. 55 3A 01 BA 67 40 48 00 90 05 00 00 4B FF FB B4
+==== BB 61 (0x25480E00) approx BBs exec'd 0 ====
+
+ 0x25480E00: 7C00286C dcbst r0,r5
+ 0: INCEIPL $4
+
+ 0x25480E04: 7C0004AC sync
+ 1: INCEIPL $4
+
+ 0x25480E08: 8381000C lwz r28,12(r1)
+ 2: GETL R1, t0
+ 3: ADDL $0xC, t0
+ 4: LDL (t0), t2
+ 5: PUTL t2, R28
+ 6: INCEIPL $4
+
+ 0x25480E0C: 7C00E7AC icbi r0,r28
+ 7: GETL R28, t4
+ 8: CALLM_So
+ 9: PUSHL t4
+ 10: CALLMo $0x68
+ 11: CALLM_Eo
+ 12: INCEIPL $4
+
+ 0x25480E10: 80610034 lwz r3,52(r1)
+ 13: GETL R1, t6
+ 14: ADDL $0x34, t6
+ 15: LDL (t6), t8
+ 16: PUTL t8, R3
+ 17: INCEIPL $4
+
+ 0x25480E14: 83410018 lwz r26,24(r1)
+ 18: GETL R1, t10
+ 19: ADDL $0x18, t10
+ 20: LDL (t10), t12
+ 21: PUTL t12, R26
+ 22: INCEIPL $4
+
+ 0x25480E18: 8361001C lwz r27,28(r1)
+ 23: GETL R1, t14
+ 24: ADDL $0x1C, t14
+ 25: LDL (t14), t16
+ 26: PUTL t16, R27
+ 27: INCEIPL $4
+
+ 0x25480E1C: 7C6803A6 mtlr r3
+ 28: GETL R3, t18
+ 29: PUTL t18, LR
+ 30: INCEIPL $4
+
+ 0x25480E20: 83810020 lwz r28,32(r1)
+ 31: GETL R1, t20
+ 32: ADDL $0x20, t20
+ 33: LDL (t20), t22
+ 34: PUTL t22, R28
+ 35: INCEIPL $4
+
+ 0x25480E24: 83A10024 lwz r29,36(r1)
+ 36: GETL R1, t24
+ 37: ADDL $0x24, t24
+ 38: LDL (t24), t26
+ 39: PUTL t26, R29
+ 40: INCEIPL $4
+
+ 0x25480E28: 83C10028 lwz r30,40(r1)
+ 41: GETL R1, t28
+ 42: ADDL $0x28, t28
+ 43: LDL (t28), t30
+ 44: PUTL t30, R30
+ 45: INCEIPL $4
+
+ 0x25480E2C: 83E1002C lwz r31,44(r1)
+ 46: GETL R1, t32
+ 47: ADDL $0x2C, t32
+ 48: LDL (t32), t34
+ 49: PUTL t34, R31
+ 50: INCEIPL $4
+
+ 0x25480E30: 38210030 addi r1,r1,48
+ 51: GETL R1, t36
+ 52: ADDL $0x30, t36
+ 53: PUTL t36, R1
+ 54: INCEIPL $4
+
+ 0x25480E34: 4E800020 blr
+ 55: GETL LR, t38
+ 56: JMPo-r t38 ($4)
+
+
+
+. 61 25480E00 56
+. 7C 00 28 6C 7C 00 04 AC 83 81 00 0C 7C 00 E7 AC 80 61 00 34 83 41 00 18 83 61 00 1C 7C 68 03 A6 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 62 (0x25471DAC) approx BBs exec'd 0 ====
+
+ 0x25471DAC: 3BFF000C addi r31,r31,12
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0x25471DB0: 7C9FE040 cmpl cr1,r31,r28
+ 4: GETL R31, t2
+ 5: GETL R28, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25471DB4: 4184FF7C bc 12,4,0x25471D30
+ 9: Js04o $0x25471D30
+
+
+
+. 62 25471DAC 12
+. 3B FF 00 0C 7C 9F E0 40 41 84 FF 7C
+==== BB 63 (0x25471DB8) approx BBs exec'd 0 ====
+
+ 0x25471DB8: 3739FFFF addic. r25,r25,-1
+ 0: GETL R25, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R25
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25471DBC: 3B7B000C addi r27,r27,12
+ 6: GETL R27, t4
+ 7: ADDL $0xC, t4
+ 8: PUTL t4, R27
+ 9: INCEIPL $4
+
+ 0x25471DC0: 4080FEF0 bc 4,0,0x25471CB0
+ 10: Jc00o $0x25471CB0
+
+
+
+. 63 25471DB8 12
+. 37 39 FF FF 3B 7B 00 0C 40 80 FE F0
+==== BB 64 (0x25471CB0) approx BBs exec'd 0 ====
+
+ 0x25471CB0: 814100D0 lwz r10,208(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0xD0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25471CB4: 81210048 lwz r9,72(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x48, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25471CB8: 2F8A0000 cmpi cr7,r10,0
+ 10: GETL R10, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25471CBC: 811B0248 lwz r8,584(r27)
+ 14: GETL R27, t12
+ 15: ADDL $0x248, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R8
+ 18: INCEIPL $4
+
+ 0x25471CC0: 817B024C lwz r11,588(r27)
+ 19: GETL R27, t16
+ 20: ADDL $0x24C, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R11
+ 23: INCEIPL $4
+
+ 0x25471CC4: 83490004 lwz r26,4(r9)
+ 24: GETL R9, t20
+ 25: ADDL $0x4, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R26
+ 28: INCEIPL $4
+
+ 0x25471CC8: 39200000 li r9,0
+ 29: MOVL $0x0, t24
+ 30: PUTL t24, R9
+ 31: INCEIPL $4
+
+ 0x25471CCC: 7F885A14 add r28,r8,r11
+ 32: GETL R8, t26
+ 33: GETL R11, t28
+ 34: ADDL t26, t28
+ 35: PUTL t28, R28
+ 36: INCEIPL $4
+
+ 0x25471CD0: 83A10010 lwz r29,16(r1)
+ 37: GETL R1, t30
+ 38: ADDL $0x10, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R29
+ 41: INCEIPL $4
+
+ 0x25471CD4: 419E0008 bc 12,30,0x25471CDC
+ 42: Js30o $0x25471CDC
+
+
+
+. 64 25471CB0 40
+. 81 41 00 D0 81 21 00 48 2F 8A 00 00 81 1B 02 48 81 7B 02 4C 83 49 00 04 39 20 00 00 7F 88 5A 14 83 A1 00 10 41 9E 00 08
+==== BB 65 (0x25471CFC) approx BBs exec'd 0 ====
+
+ 0x25471CFC: 1C60000C mulli r3,r0,12
+ 0: GETL R0, t0
+ 1: MULL $0xC, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x25471D00: 7FEB1A14 add r31,r11,r3
+ 4: GETL R11, t2
+ 5: GETL R3, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R31
+ 8: INCEIPL $4
+
+ 0x25471D04: 7F8BF840 cmpl cr7,r11,r31
+ 9: GETL R11, t6
+ 10: GETL R31, t8
+ 11: CMPUL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25471D08: 409C0020 bc 4,28,0x25471D28
+ 14: Jc28o $0x25471D28
+
+
+
+. 65 25471CFC 16
+. 1C 60 00 0C 7F EB 1A 14 7F 8B F8 40 40 9C 00 20
+==== BB 66 (0x25471DC4) approx BBs exec'd 0 ====
+
+ 0x25471DC4: 7EE3BB78 or r3,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25471DC8: 7F04C378 or r4,r24,r24
+ 3: GETL R24, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25471DCC: 4BFFFBBD bl 0x25471988
+ 6: MOVL $0x25471DD0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25471988 ($4)
+
+
+
+. 66 25471DC4 12
+. 7E E3 BB 78 7F 04 C3 78 4B FF FB BD
+==== BB 67 _dl_start_final(0x25471988) approx BBs exec'd 0 ====
+
+ 0x25471988: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547198C: 7D2802A6 mflr r9
+ 6: GETL LR, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x25471990: 48025671 bl 0x25497000
+ 9: MOVL $0x25471994, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 67 25471988 12
+. 94 21 FF E0 7D 28 02 A6 48 02 56 71
+==== BB 68 (0x25471994) approx BBs exec'd 0 ====
+
+ 0x25471994: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25471998: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547199C: 93A10014 stw r29,20(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x254719A0: 91210024 stw r9,36(r1)
+ 13: GETL R9, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254719A4: 38A0012C li r5,300
+ 18: MOVL $0x12C, t14
+ 19: PUTL t14, R5
+ 20: INCEIPL $4
+
+ 0x254719A8: 80040000 lwz r0,0(r4)
+ 21: GETL R4, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R0
+ 24: INCEIPL $4
+
+ 0x254719AC: 83BE04C8 lwz r29,1224(r30)
+ 25: GETL R30, t20
+ 26: ADDL $0x4C8, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R29
+ 29: INCEIPL $4
+
+ 0x254719B0: 81840008 lwz r12,8(r4)
+ 30: GETL R4, t24
+ 31: ADDL $0x8, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R12
+ 34: INCEIPL $4
+
+ 0x254719B4: 38840020 addi r4,r4,32
+ 35: GETL R4, t28
+ 36: ADDL $0x20, t28
+ 37: PUTL t28, R4
+ 38: INCEIPL $4
+
+ 0x254719B8: 901D01B8 stw r0,440(r29)
+ 39: GETL R0, t30
+ 40: GETL R29, t32
+ 41: ADDL $0x1B8, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0x254719BC: 919D01C0 stw r12,448(r29)
+ 44: GETL R12, t34
+ 45: GETL R29, t36
+ 46: ADDL $0x1C0, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0x254719C0: 9361000C stw r27,12(r1)
+ 49: GETL R27, t38
+ 50: GETL R1, t40
+ 51: ADDL $0xC, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0x254719C4: 7C7B1B78 or r27,r3,r3
+ 54: GETL R3, t42
+ 55: PUTL t42, R27
+ 56: INCEIPL $4
+
+ 0x254719C8: 93810010 stw r28,16(r1)
+ 57: GETL R28, t44
+ 58: GETL R1, t46
+ 59: ADDL $0x10, t46
+ 60: STL t44, (t46)
+ 61: INCEIPL $4
+
+ 0x254719CC: 387D01D8 addi r3,r29,472
+ 62: GETL R29, t48
+ 63: ADDL $0x1D8, t48
+ 64: PUTL t48, R3
+ 65: INCEIPL $4
+
+ 0x254719D0: 3B9D01B8 addi r28,r29,440
+ 66: GETL R29, t50
+ 67: ADDL $0x1B8, t50
+ 68: PUTL t50, R28
+ 69: INCEIPL $4
+
+ 0x254719D4: 4801220D bl 0x25483BE0
+ 70: MOVL $0x254719D8, t52
+ 71: PUTL t52, LR
+ 72: JMPo-c $0x25483BE0 ($4)
+
+
+
+. 68 25471994 68
+. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 91 21 00 24 38 A0 01 2C 80 04 00 00 83 BE 04 C8 81 84 00 08 38 84 00 20 90 1D 01 B8 91 9D 01 C0 93 61 00 0C 7C 7B 1B 78 93 81 00 10 38 7D 01 D8 3B 9D 01 B8 48 01 22 0D
+==== BB 69 memcpy(0x25483BE0) approx BBs exec'd 0 ====
+
+ 0x25483BE0: 2B85000F cmpli cr7,r5,15
+ 0: GETL R5, t0
+ 1: MOVL $0xF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25483BE4: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0x25483BE8: 9421FFE0 stwu r1,-32(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFFE0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25483BEC: 9361000C stw r27,12(r1)
+ 14: GETL R27, t12
+ 15: GETL R1, t14
+ 16: ADDL $0xC, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25483BF0: 7C7B1B78 or r27,r3,r3
+ 19: GETL R3, t16
+ 20: PUTL t16, R27
+ 21: INCEIPL $4
+
+ 0x25483BF4: 93A10014 stw r29,20(r1)
+ 22: GETL R29, t18
+ 23: GETL R1, t20
+ 24: ADDL $0x14, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0x25483BF8: 7C9D2378 or r29,r4,r4
+ 27: GETL R4, t22
+ 28: PUTL t22, R29
+ 29: INCEIPL $4
+
+ 0x25483BFC: 93E1001C stw r31,28(r1)
+ 30: GETL R31, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x1C, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x25483C00: 7C7F1B78 or r31,r3,r3
+ 35: GETL R3, t28
+ 36: PUTL t28, R31
+ 37: INCEIPL $4
+
+ 0x25483C04: 93810010 stw r28,16(r1)
+ 38: GETL R28, t30
+ 39: GETL R1, t32
+ 40: ADDL $0x10, t32
+ 41: STL t30, (t32)
+ 42: INCEIPL $4
+
+ 0x25483C08: 93C10018 stw r30,24(r1)
+ 43: GETL R30, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x18, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x25483C0C: 90010024 stw r0,36(r1)
+ 48: GETL R0, t38
+ 49: GETL R1, t40
+ 50: ADDL $0x24, t40
+ 51: STL t38, (t40)
+ 52: INCEIPL $4
+
+ 0x25483C10: 409D0058 bc 4,29,0x25483C68
+ 53: Jc29o $0x25483C68
+
+
+
+. 69 25483BE0 52
+. 2B 85 00 0F 7C 08 02 A6 94 21 FF E0 93 61 00 0C 7C 7B 1B 78 93 A1 00 14 7C 9D 23 78 93 E1 00 1C 7C 7F 1B 78 93 81 00 10 93 C1 00 18 90 01 00 24 40 9D 00 58
+==== BB 70 (0x25483C14) approx BBs exec'd 0 ====
+
+ 0x25483C14: 7C8300D0 neg r4,r3
+ 0: GETL R3, t0
+ 1: NEGL t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x25483C18: 548307BE rlwinm r3,r4,0,30,31
+ 4: GETL R4, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R3
+ 7: INCEIPL $4
+
+ 0x25483C1C: 7C691B79 or. r9,r3,r3
+ 8: GETL R3, t4
+ 9: PUTL t4, R9
+ 10: CMP0L t4, t6 (-rSo)
+ 11: ICRFL t6, $0x0, CR
+ 12: INCEIPL $4
+
+ 0x25483C20: 7F832850 subf r28,r3,r5
+ 13: GETL R3, t8
+ 14: GETL R5, t10
+ 15: SUBL t8, t10
+ 16: PUTL t10, R28
+ 17: INCEIPL $4
+
+ 0x25483C24: 4182001C bc 12,2,0x25483C40
+ 18: Js02o $0x25483C40
+
+
+
+. 70 25483C14 20
+. 7C 83 00 D0 54 83 07 BE 7C 69 1B 79 7F 83 28 50 41 82 00 1C
+==== BB 71 (0x25483C40) approx BBs exec'd 0 ====
+
+ 0x25483C40: 73A00003 andi. r0,r29,0x3
+ 0: GETL R29, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25483C44: 4082006C bc 4,2,0x25483CB0
+ 6: Jc02o $0x25483CB0
+
+
+
+. 71 25483C40 8
+. 73 A0 00 03 40 82 00 6C
+==== BB 72 (0x25483C48) approx BBs exec'd 0 ====
+
+ 0x25483C48: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25483C4C: 7FA4EB78 or r4,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25483C50: 5785F0BE rlwinm r5,r28,30,2,31
+ 6: GETL R28, t4
+ 7: SHRL $0x2, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0x25483C54: 48000071 bl 0x25483CC4
+ 10: MOVL $0x25483C58, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0x25483CC4 ($4)
+
+
+
+. 72 25483C48 16
+. 7F E3 FB 78 7F A4 EB 78 57 85 F0 BE 48 00 00 71
+==== BB 73 _wordcopy_fwd_aligned(0x25483CC4) approx BBs exec'd 0 ====
+
+ 0x25483CC4: 54A0077E rlwinm r0,r5,0,29,31
+ 0: GETL R5, t0
+ 1: ANDL $0x7, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x25483CC8: 7D8802A6 mflr r12
+ 4: GETL LR, t2
+ 5: PUTL t2, R12
+ 6: INCEIPL $4
+
+ 0x25483CCC: 2B800007 cmpli cr7,r0,7
+ 7: GETL R0, t4
+ 8: MOVL $0x7, t8
+ 9: CMPUL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x25483CD0: 48013331 bl 0x25497000
+ 12: MOVL $0x25483CD4, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0x25497000 ($4)
+
+
+
+. 73 25483CC4 16
+. 54 A0 07 7E 7D 88 02 A6 2B 80 00 07 48 01 33 31
+==== BB 74 (0x25483CD4) approx BBs exec'd 0 ====
+
+ 0x25483CD4: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25483CD8: 93C10008 stw r30,8(r1)
+ 6: GETL R30, t4
+ 7: GETL R1, t6
+ 8: ADDL $0x8, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x25483CDC: 7FC802A6 mflr r30
+ 11: GETL LR, t8
+ 12: PUTL t8, R30
+ 13: INCEIPL $4
+
+ 0x25483CE0: 7D8803A6 mtlr r12
+ 14: GETL R12, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0x25483CE4: 419D0028 bc 12,29,0x25483D0C
+ 17: Js29o $0x25483D0C
+
+
+
+. 74 25483CD4 20
+. 94 21 FF F0 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 41 9D 00 28
+==== BB 75 (0x25483CE8) approx BBs exec'd 0 ====
+
+ 0x25483CE8: 817E0490 lwz r11,1168(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x490, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25483CEC: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25483CF0: 7CCB002E lwzx r6,r11,r0
+ 9: GETL R0, t6
+ 10: GETL R11, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R6
+ 14: INCEIPL $4
+
+ 0x25483CF4: 7D265A14 add r9,r6,r11
+ 15: GETL R6, t12
+ 16: GETL R11, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25483CF8: 7D2903A6 mtctr r9
+ 20: GETL R9, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0x25483CFC: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+
+. 75 25483CE8 24
+. 81 7E 04 90 54 00 10 3A 7C CB 00 2E 7D 26 5A 14 7D 29 03 A6 4E 80 04 20
+==== BB 76 (0x25483D94) approx BBs exec'd 0 ====
+
+ 0x25483D94: 81240000 lwz r9,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25483D98: 3863FFE8 addi r3,r3,-24
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFE8, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483D9C: 3884FFEC addi r4,r4,-20
+ 8: GETL R4, t6
+ 9: ADDL $0xFFFFFFEC, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0x25483DA0: 38A50005 addi r5,r5,5
+ 12: GETL R5, t8
+ 13: ADDL $0x5, t8
+ 14: PUTL t8, R5
+ 15: INCEIPL $4
+
+ 0x25483DA4: 4BFFFF98 b 0x25483D3C
+ 16: JMPo $0x25483D3C ($4)
+
+
+
+. 76 25483D94 20
+. 81 24 00 00 38 63 FF E8 38 84 FF EC 38 A5 00 05 4B FF FF 98
+==== BB 77 (0x25483D3C) approx BBs exec'd 0 ====
+
+ 0x25483D3C: 80040018 lwz r0,24(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25483D40: 91230018 stw r9,24(r3)
+ 5: GETL R9, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x18, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25483D44: 34A5FFF8 addic. r5,r5,-8
+ 10: GETL R5, t8
+ 11: ADCL $0xFFFFFFF8, t8 (-wCa)
+ 12: PUTL t8, R5
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x25483D48: 8124001C lwz r9,28(r4)
+ 16: GETL R4, t12
+ 17: ADDL $0x1C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R9
+ 20: INCEIPL $4
+
+ 0x25483D4C: 9003001C stw r0,28(r3)
+ 21: GETL R0, t16
+ 22: GETL R3, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25483D50: 38840020 addi r4,r4,32
+ 26: GETL R4, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R4
+ 29: INCEIPL $4
+
+ 0x25483D54: 38630020 addi r3,r3,32
+ 30: GETL R3, t22
+ 31: ADDL $0x20, t22
+ 32: PUTL t22, R3
+ 33: INCEIPL $4
+
+ 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
+ 34: Jc02o $0x25483D0C
+
+
+
+. 77 25483D3C 32
+. 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+==== BB 78 (0x25483D0C) approx BBs exec'd 0 ====
+
+ 0x25483D0C: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25483D10: 91230000 stw r9,0(r3)
+ 4: GETL R9, t4
+ 5: GETL R3, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0x25483D14: 81240004 lwz r9,4(r4)
+ 8: GETL R4, t8
+ 9: ADDL $0x4, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R9
+ 12: INCEIPL $4
+
+ 0x25483D18: 90030004 stw r0,4(r3)
+ 13: GETL R0, t12
+ 14: GETL R3, t14
+ 15: ADDL $0x4, t14
+ 16: STL t12, (t14)
+ 17: INCEIPL $4
+
+ 0x25483D1C: 80040008 lwz r0,8(r4)
+ 18: GETL R4, t16
+ 19: ADDL $0x8, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R0
+ 22: INCEIPL $4
+
+ 0x25483D20: 91230008 stw r9,8(r3)
+ 23: GETL R9, t20
+ 24: GETL R3, t22
+ 25: ADDL $0x8, t22
+ 26: STL t20, (t22)
+ 27: INCEIPL $4
+
+ 0x25483D24: 8124000C lwz r9,12(r4)
+ 28: GETL R4, t24
+ 29: ADDL $0xC, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R9
+ 32: INCEIPL $4
+
+ 0x25483D28: 9003000C stw r0,12(r3)
+ 33: GETL R0, t28
+ 34: GETL R3, t30
+ 35: ADDL $0xC, t30
+ 36: STL t28, (t30)
+ 37: INCEIPL $4
+
+ 0x25483D2C: 80040010 lwz r0,16(r4)
+ 38: GETL R4, t32
+ 39: ADDL $0x10, t32
+ 40: LDL (t32), t34
+ 41: PUTL t34, R0
+ 42: INCEIPL $4
+
+ 0x25483D30: 91230010 stw r9,16(r3)
+ 43: GETL R9, t36
+ 44: GETL R3, t38
+ 45: ADDL $0x10, t38
+ 46: STL t36, (t38)
+ 47: INCEIPL $4
+
+ 0x25483D34: 81240014 lwz r9,20(r4)
+ 48: GETL R4, t40
+ 49: ADDL $0x14, t40
+ 50: LDL (t40), t42
+ 51: PUTL t42, R9
+ 52: INCEIPL $4
+
+ 0x25483D38: 90030014 stw r0,20(r3)
+ 53: GETL R0, t44
+ 54: GETL R3, t46
+ 55: ADDL $0x14, t46
+ 56: STL t44, (t46)
+ 57: INCEIPL $4
+
+ 0x25483D3C: 80040018 lwz r0,24(r4)
+ 58: GETL R4, t48
+ 59: ADDL $0x18, t48
+ 60: LDL (t48), t50
+ 61: PUTL t50, R0
+ 62: INCEIPL $4
+
+ 0x25483D40: 91230018 stw r9,24(r3)
+ 63: GETL R9, t52
+ 64: GETL R3, t54
+ 65: ADDL $0x18, t54
+ 66: STL t52, (t54)
+ 67: INCEIPL $4
+
+ 0x25483D44: 34A5FFF8 addic. r5,r5,-8
+ 68: GETL R5, t56
+ 69: ADCL $0xFFFFFFF8, t56 (-wCa)
+ 70: PUTL t56, R5
+ 71: CMP0L t56, t58 (-rSo)
+ 72: ICRFL t58, $0x0, CR
+ 73: INCEIPL $4
+
+ 0x25483D48: 8124001C lwz r9,28(r4)
+ 74: GETL R4, t60
+ 75: ADDL $0x1C, t60
+ 76: LDL (t60), t62
+ 77: PUTL t62, R9
+ 78: INCEIPL $4
+
+ 0x25483D4C: 9003001C stw r0,28(r3)
+ 79: GETL R0, t64
+ 80: GETL R3, t66
+ 81: ADDL $0x1C, t66
+ 82: STL t64, (t66)
+ 83: INCEIPL $4
+
+ 0x25483D50: 38840020 addi r4,r4,32
+ 84: GETL R4, t68
+ 85: ADDL $0x20, t68
+ 86: PUTL t68, R4
+ 87: INCEIPL $4
+
+ 0x25483D54: 38630020 addi r3,r3,32
+ 88: GETL R3, t70
+ 89: ADDL $0x20, t70
+ 90: PUTL t70, R3
+ 91: INCEIPL $4
+
+ 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
+ 92: Jc02o $0x25483D0C
+
+
+
+. 78 25483D0C 80
+. 80 04 00 00 91 23 00 00 81 24 00 04 90 03 00 04 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+==== BB 79 (0x25483D5C) approx BBs exec'd 0 ====
+
+ 0x25483D5C: 83C10008 lwz r30,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R30
+ 4: INCEIPL $4
+
+ 0x25483D60: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x25483D64: 91230000 stw r9,0(r3)
+ 9: GETL R9, t6
+ 10: GETL R3, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25483D68: 4E800020 blr
+ 13: GETL LR, t10
+ 14: JMPo-r t10 ($4)
+
+
+
+. 79 25483D5C 16
+. 83 C1 00 08 38 21 00 10 91 23 00 00 4E 80 00 20
+==== BB 80 (0x25483C58) approx BBs exec'd 0 ====
+
+ 0x25483C58: 5786003A rlwinm r6,r28,0,0,29
+ 0: GETL R28, t0
+ 1: ANDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x25483C5C: 578507BE rlwinm r5,r28,0,30,31
+ 4: GETL R28, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0x25483C60: 7FFF3214 add r31,r31,r6
+ 8: GETL R31, t4
+ 9: GETL R6, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R31
+ 12: INCEIPL $4
+
+ 0x25483C64: 7FBD3214 add r29,r29,r6
+ 13: GETL R29, t8
+ 14: GETL R6, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0x25483C68: 2C850000 cmpi cr1,r5,0
+ 18: GETL R5, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x1, CR
+ 21: INCEIPL $4
+
+ 0x25483C6C: 4186001C bc 12,6,0x25483C88
+ 22: Js06o $0x25483C88
+
+
+
+. 80 25483C58 24
+. 57 86 00 3A 57 85 07 BE 7F FF 32 14 7F BD 32 14 2C 85 00 00 41 86 00 1C
+==== BB 81 (0x25483C88) approx BBs exec'd 0 ====
+
+ 0x25483C88: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25483C8C: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483C90: 83810010 lwz r28,16(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0x25483C94: 8361000C lwz r27,12(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0xC, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R27
+ 17: INCEIPL $4
+
+ 0x25483C98: 7D0803A6 mtlr r8
+ 18: GETL R8, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x25483C9C: 83A10014 lwz r29,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x25483CA0: 83C10018 lwz r30,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0x25483CA4: 83E1001C lwz r31,28(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x1C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R31
+ 35: INCEIPL $4
+
+ 0x25483CA8: 38210020 addi r1,r1,32
+ 36: GETL R1, t28
+ 37: ADDL $0x20, t28
+ 38: PUTL t28, R1
+ 39: INCEIPL $4
+
+ 0x25483CAC: 4E800020 blr
+ 40: GETL LR, t30
+ 41: JMPo-r t30 ($4)
+
+
+
+. 81 25483C88 40
+. 81 01 00 24 7F 63 DB 78 83 81 00 10 83 61 00 0C 7D 08 03 A6 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 82 (0x254719D8) approx BBs exec'd 0 ====
+
+ 0x254719D8: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254719DC: 48006B91 bl 0x2547856C
+ 3: MOVL $0x254719E0, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x2547856C ($4)
+
+
+
+. 82 254719D8 8
+. 7F 83 E3 78 48 00 6B 91
+==== BB 83 _dl_setup_hash(0x2547856C) approx BBs exec'd 0 ====
+
+ 0x2547856C: 81230030 lwz r9,48(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25478570: 9421FFF0 stwu r1,-16(r1)
+ 5: GETL R1, t4
+ 6: GETL R1, t6
+ 7: ADDL $0xFFFFFFF0, t6
+ 8: PUTL t6, R1
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x25478574: 2F890000 cmpi cr7,r9,0
+ 11: GETL R9, t8
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x7, CR
+ 14: INCEIPL $4
+
+ 0x25478578: 419E0024 bc 12,30,0x2547859C
+ 15: Js30o $0x2547859C
+
+
+
+. 83 2547856C 16
+. 81 23 00 30 94 21 FF F0 2F 89 00 00 41 9E 00 24
+==== BB 84 (0x2547857C) approx BBs exec'd 0 ====
+
+ 0x2547857C: 81690004 lwz r11,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25478580: 814B0000 lwz r10,0(r11)
+ 5: GETL R11, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0x25478584: 388B0008 addi r4,r11,8
+ 9: GETL R11, t8
+ 10: ADDL $0x8, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25478588: 90830170 stw r4,368(r3)
+ 13: GETL R4, t10
+ 14: GETL R3, t12
+ 15: ADDL $0x170, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547858C: 5549103A rlwinm r9,r10,2,0,29
+ 18: GETL R10, t14
+ 19: SHLL $0x2, t14
+ 20: PUTL t14, R9
+ 21: INCEIPL $4
+
+ 0x25478590: 9143016C stw r10,364(r3)
+ 22: GETL R10, t16
+ 23: GETL R3, t18
+ 24: ADDL $0x16C, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0x25478594: 7C044A14 add r0,r4,r9
+ 27: GETL R4, t20
+ 28: GETL R9, t22
+ 29: ADDL t20, t22
+ 30: PUTL t22, R0
+ 31: INCEIPL $4
+
+ 0x25478598: 90030174 stw r0,372(r3)
+ 32: GETL R0, t24
+ 33: GETL R3, t26
+ 34: ADDL $0x174, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x2547859C: 38210010 addi r1,r1,16
+ 37: GETL R1, t28
+ 38: ADDL $0x10, t28
+ 39: PUTL t28, R1
+ 40: INCEIPL $4
+
+ 0x254785A0: 4E800020 blr
+ 41: GETL LR, t30
+ 42: JMPo-r t30 ($4)
+
+
+
+. 84 2547857C 40
+. 81 69 00 04 81 4B 00 00 38 8B 00 08 90 83 01 70 55 49 10 3A 91 43 01 6C 7C 04 4A 14 90 03 01 74 38 21 00 10 4E 80 00 20
+==== BB 85 (0x254719E0) approx BBs exec'd 0 ====
+
+ 0x254719E0: 80FE04FC lwz r7,1276(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254719E4: 80DE0500 lwz r6,1280(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x500, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x254719E8: 3940FFFF li r10,-1
+ 10: MOVL $0xFFFFFFFF, t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x254719EC: 80BE04A4 lwz r5,1188(r30)
+ 13: GETL R30, t10
+ 14: ADDL $0x4A4, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R5
+ 17: INCEIPL $4
+
+ 0x254719F0: 39000001 li r8,1
+ 18: MOVL $0x1, t14
+ 19: PUTL t14, R8
+ 20: INCEIPL $4
+
+ 0x254719F4: 817E04C0 lwz r11,1216(r30)
+ 21: GETL R30, t16
+ 22: ADDL $0x4C0, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R11
+ 25: INCEIPL $4
+
+ 0x254719F8: 7F63DB78 or r3,r27,r27
+ 26: GETL R27, t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0x254719FC: 809E0024 lwz r4,36(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x24, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R4
+ 33: INCEIPL $4
+
+ 0x25471A00: 915D03E4 stw r10,996(r29)
+ 34: GETL R10, t26
+ 35: GETL R29, t28
+ 36: ADDL $0x3E4, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x25471A04: 939D01CC stw r28,460(r29)
+ 39: GETL R28, t30
+ 40: GETL R29, t32
+ 41: ADDL $0x1CC, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0x25471A08: 911D0330 stw r8,816(r29)
+ 44: GETL R8, t34
+ 45: GETL R29, t36
+ 46: ADDL $0x330, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0x25471A0C: 90FD0358 stw r7,856(r29)
+ 49: GETL R7, t38
+ 50: GETL R29, t40
+ 51: ADDL $0x358, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0x25471A10: 90DD035C stw r6,860(r29)
+ 54: GETL R6, t42
+ 55: GETL R29, t44
+ 56: ADDL $0x35C, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0x25471A14: 90BD0360 stw r5,864(r29)
+ 59: GETL R5, t46
+ 60: GETL R29, t48
+ 61: ADDL $0x360, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0x25471A18: 902B0000 stw r1,0(r11)
+ 64: GETL R1, t50
+ 65: GETL R11, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0x25471A1C: 4800D629 bl 0x2547F044
+ 68: MOVL $0x25471A20, t54
+ 69: PUTL t54, LR
+ 70: JMPo-c $0x2547F044 ($4)
+
+
+
+. 85 254719E0 64
+. 80 FE 04 FC 80 DE 05 00 39 40 FF FF 80 BE 04 A4 39 00 00 01 81 7E 04 C0 7F 63 DB 78 80 9E 00 24 91 5D 03 E4 93 9D 01 CC 91 1D 03 30 90 FD 03 58 90 DD 03 5C 90 BD 03 60 90 2B 00 00 48 00 D6 29
+==== BB 86 _dl_sysdep_start(0x2547F044) approx BBs exec'd 0 ====
+
+ 0x2547F044: 7D8802A6 mflr r12
+ 0: GETL LR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0x2547F048: 9421FDE0 stwu r1,-544(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFDE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547F04C: 38E30004 addi r7,r3,4
+ 9: GETL R3, t6
+ 10: ADDL $0x4, t6
+ 11: PUTL t6, R7
+ 12: INCEIPL $4
+
+ 0x2547F050: 48017FB1 bl 0x25497000
+ 13: MOVL $0x2547F054, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0x25497000 ($4)
+
+
+
+. 86 2547F044 16
+. 7D 88 02 A6 94 21 FD E0 38 E3 00 04 48 01 7F B1
+==== BB 87 (0x2547F054) approx BBs exec'd 0 ====
+
+ 0x2547F054: 93C10218 stw r30,536(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x218, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547F058: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547F05C: 91810224 stw r12,548(r1)
+ 8: GETL R12, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x224, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547F060: 81030000 lwz r8,0(r3)
+ 13: GETL R3, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R8
+ 16: INCEIPL $4
+
+ 0x2547F064: 80BE04C0 lwz r5,1216(r30)
+ 17: GETL R30, t14
+ 18: ADDL $0x4C0, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R5
+ 21: INCEIPL $4
+
+ 0x2547F068: 5506103A rlwinm r6,r8,2,0,29
+ 22: GETL R8, t18
+ 23: SHLL $0x2, t18
+ 24: PUTL t18, R6
+ 25: INCEIPL $4
+
+ 0x2547F06C: 813E04D4 lwz r9,1236(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4D4, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R9
+ 30: INCEIPL $4
+
+ 0x2547F070: 7D463A14 add r10,r6,r7
+ 31: GETL R6, t24
+ 32: GETL R7, t26
+ 33: ADDL t24, t26
+ 34: PUTL t26, R10
+ 35: INCEIPL $4
+
+ 0x2547F074: 90650000 stw r3,0(r5)
+ 36: GETL R3, t28
+ 37: GETL R5, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x2547F078: 800A0004 lwz r0,4(r10)
+ 40: GETL R10, t32
+ 41: ADDL $0x4, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R0
+ 44: INCEIPL $4
+
+ 0x2547F07C: 394A0004 addi r10,r10,4
+ 45: GETL R10, t36
+ 46: ADDL $0x4, t36
+ 47: PUTL t36, R10
+ 48: INCEIPL $4
+
+ 0x2547F080: 807E04D0 lwz r3,1232(r30)
+ 49: GETL R30, t38
+ 50: ADDL $0x4D0, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R3
+ 53: INCEIPL $4
+
+ 0x2547F084: 2F800000 cmpi cr7,r0,0
+ 54: GETL R0, t42
+ 55: CMP0L t42, t44 (-rSo)
+ 56: ICRFL t44, $0x7, CR
+ 57: INCEIPL $4
+
+ 0x2547F088: 817E04B8 lwz r11,1208(r30)
+ 58: GETL R30, t46
+ 59: ADDL $0x4B8, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R11
+ 62: INCEIPL $4
+
+ 0x2547F08C: 92A101F4 stw r21,500(r1)
+ 63: GETL R21, t50
+ 64: GETL R1, t52
+ 65: ADDL $0x1F4, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0x2547F090: 3AA00000 li r21,0
+ 68: MOVL $0x0, t54
+ 69: PUTL t54, R21
+ 70: INCEIPL $4
+
+ 0x2547F094: 92C101F8 stw r22,504(r1)
+ 71: GETL R22, t56
+ 72: GETL R1, t58
+ 73: ADDL $0x1F8, t58
+ 74: STL t56, (t58)
+ 75: INCEIPL $4
+
+ 0x2547F098: 3AC00000 li r22,0
+ 76: MOVL $0x0, t60
+ 77: PUTL t60, R22
+ 78: INCEIPL $4
+
+ 0x2547F09C: 92E101FC stw r23,508(r1)
+ 79: GETL R23, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x1FC, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x2547F0A0: 7C972378 or r23,r4,r4
+ 84: GETL R4, t66
+ 85: PUTL t66, R23
+ 86: INCEIPL $4
+
+ 0x2547F0A4: 93010200 stw r24,512(r1)
+ 87: GETL R24, t68
+ 88: GETL R1, t70
+ 89: ADDL $0x200, t70
+ 90: STL t68, (t70)
+ 91: INCEIPL $4
+
+ 0x2547F0A8: 3B000000 li r24,0
+ 92: MOVL $0x0, t72
+ 93: PUTL t72, R24
+ 94: INCEIPL $4
+
+ 0x2547F0AC: 93210204 stw r25,516(r1)
+ 95: GETL R25, t74
+ 96: GETL R1, t76
+ 97: ADDL $0x204, t76
+ 98: STL t74, (t76)
+ 99: INCEIPL $4
+
+ 0x2547F0B0: 3B200000 li r25,0
+ 100: MOVL $0x0, t78
+ 101: PUTL t78, R25
+ 102: INCEIPL $4
+
+ 0x2547F0B4: 93E1021C stw r31,540(r1)
+ 103: GETL R31, t80
+ 104: GETL R1, t82
+ 105: ADDL $0x21C, t82
+ 106: STL t80, (t82)
+ 107: INCEIPL $4
+
+ 0x2547F0B8: 3BE00000 li r31,0
+ 108: MOVL $0x0, t84
+ 109: PUTL t84, R31
+ 110: INCEIPL $4
+
+ 0x2547F0BC: 93410208 stw r26,520(r1)
+ 111: GETL R26, t86
+ 112: GETL R1, t88
+ 113: ADDL $0x208, t88
+ 114: STL t86, (t88)
+ 115: INCEIPL $4
+
+ 0x2547F0C0: 9361020C stw r27,524(r1)
+ 116: GETL R27, t90
+ 117: GETL R1, t92
+ 118: ADDL $0x20C, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0x2547F0C4: 93810210 stw r28,528(r1)
+ 121: GETL R28, t94
+ 122: GETL R1, t96
+ 123: ADDL $0x210, t96
+ 124: STL t94, (t96)
+ 125: INCEIPL $4
+
+ 0x2547F0C8: 93A10214 stw r29,532(r1)
+ 126: GETL R29, t98
+ 127: GETL R1, t100
+ 128: ADDL $0x214, t100
+ 129: STL t98, (t100)
+ 130: INCEIPL $4
+
+ 0x2547F0CC: 91030000 stw r8,0(r3)
+ 131: GETL R8, t102
+ 132: GETL R3, t104
+ 133: STL t102, (t104)
+ 134: INCEIPL $4
+
+ 0x2547F0D0: 90E90000 stw r7,0(r9)
+ 135: GETL R7, t106
+ 136: GETL R9, t108
+ 137: STL t106, (t108)
+ 138: INCEIPL $4
+
+ 0x2547F0D4: 914B0000 stw r10,0(r11)
+ 139: GETL R10, t110
+ 140: GETL R11, t112
+ 141: STL t110, (t112)
+ 142: INCEIPL $4
+
+ 0x2547F0D8: 419E0010 bc 12,30,0x2547F0E8
+ 143: Js30o $0x2547F0E8
+
+
+
+. 87 2547F054 136
+. 93 C1 02 18 7F C8 02 A6 91 81 02 24 81 03 00 00 80 BE 04 C0 55 06 10 3A 81 3E 04 D4 7D 46 3A 14 90 65 00 00 80 0A 00 04 39 4A 00 04 80 7E 04 D0 2F 80 00 00 81 7E 04 B8 92 A1 01 F4 3A A0 00 00 92 C1 01 F8 3A C0 00 00 92 E1 01 FC 7C 97 23 78 93 01 02 00 3B 00 00 00 93 21 02 04 3B 20 00 00 93 E1 02 1C 3B E0 00 00 93 41 02 08 93 61 02 0C 93 81 02 10 93 A1 02 14 91 03 00 00 90 E9 00 00 91 4B 00 00 41 9E 00 10
+==== BB 88 (0x2547F0DC) approx BBs exec'd 0 ====
+
+ 0x2547F0DC: 848A0004 lwzu r4,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R10
+ 3: LDL (t0), t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x2547F0E0: 2F840000 cmpi cr7,r4,0
+ 6: GETL R4, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x2547F0E4: 409EFFF8 bc 4,30,0x2547F0DC
+ 10: Jc30o $0x2547F0DC
+
+
+
+. 88 2547F0DC 12
+. 84 8A 00 04 2F 84 00 00 40 9E FF F8
+==== BB 89 (0x2547F0E8) approx BBs exec'd 0 ====
+
+ 0x2547F0E8: 3B6A0013 addi r27,r10,19
+ 0: GETL R10, t0
+ 1: ADDL $0x13, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x2547F0EC: 380A0004 addi r0,r10,4
+ 4: GETL R10, t2
+ 5: ADDL $0x4, t2
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0x2547F0F0: 576B0036 rlwinm r11,r27,0,0,27
+ 8: GETL R27, t4
+ 9: ANDL $0xFFFFFFF0, t4
+ 10: PUTL t4, R11
+ 11: INCEIPL $4
+
+ 0x2547F0F4: 834B0000 lwz r26,0(r11)
+ 12: GETL R11, t6
+ 13: LDL (t6), t8
+ 14: PUTL t8, R26
+ 15: INCEIPL $4
+
+ 0x2547F0F8: 2F9A0010 cmpi cr7,r26,16
+ 16: GETL R26, t10
+ 17: MOVL $0x10, t14
+ 18: CMPL t10, t14, t12 (-rSo)
+ 19: ICRFL t12, $0x7, CR
+ 20: INCEIPL $4
+
+ 0x2547F0FC: 419D0008 bc 12,29,0x2547F104
+ 21: Js29o $0x2547F104
+
+
+
+. 89 2547F0E8 24
+. 3B 6A 00 13 38 0A 00 04 57 6B 00 36 83 4B 00 00 2F 9A 00 10 41 9D 00 08
+==== BB 90 (0x2547F104) approx BBs exec'd 0 ====
+
+ 0x2547F104: 7C080378 or r8,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0x2547F108: 835E04F4 lwz r26,1268(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x4F4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x2547F10C: 81680000 lwz r11,0(r8)
+ 8: GETL R8, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x2547F110: 3B800000 li r28,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R28
+ 14: INCEIPL $4
+
+ 0x2547F114: 813E03EC lwz r9,1004(r30)
+ 15: GETL R30, t12
+ 16: ADDL $0x3EC, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x2547F118: 2C0B0000 cmpi cr0,r11,0
+ 20: GETL R11, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x2547F11C: 83BE04E0 lwz r29,1248(r30)
+ 24: GETL R30, t20
+ 25: ADDL $0x4E0, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R29
+ 28: INCEIPL $4
+
+ 0x2547F120: 90090000 stw r0,0(r9)
+ 29: GETL R0, t24
+ 30: GETL R9, t26
+ 31: STL t24, (t26)
+ 32: INCEIPL $4
+
+ 0x2547F124: 93A101E0 stw r29,480(r1)
+ 33: GETL R29, t28
+ 34: GETL R1, t30
+ 35: ADDL $0x1E0, t30
+ 36: STL t28, (t30)
+ 37: INCEIPL $4
+
+ 0x2547F128: 939A000C stw r28,12(r26)
+ 38: GETL R28, t32
+ 39: GETL R26, t34
+ 40: ADDL $0xC, t34
+ 41: STL t32, (t34)
+ 42: INCEIPL $4
+
+ 0x2547F12C: 4182004C bc 12,2,0x2547F178
+ 43: Js02o $0x2547F178
+
+
+
+. 90 2547F104 44
+. 7C 08 03 78 83 5E 04 F4 81 68 00 00 3B 80 00 00 81 3E 03 EC 2C 0B 00 00 83 BE 04 E0 90 09 00 00 93 A1 01 E0 93 9A 00 0C 41 82 00 4C
+==== BB 91 (0x2547F130) approx BBs exec'd 0 ====
+
+ 0x2547F130: 7D6A5B78 or r10,r11,r11
+ 0: GETL R11, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x2547F134: 380AFFFD addi r0,r10,-3
+ 3: GETL R10, t2
+ 4: ADDL $0xFFFFFFFD, t2
+ 5: PUTL t2, R0
+ 6: INCEIPL $4
+
+ 0x2547F138: 28800014 cmpli cr1,r0,20
+ 7: GETL R0, t4
+ 8: MOVL $0x14, t8
+ 9: CMPUL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x2547F13C: 41850024 bc 12,5,0x2547F160
+ 12: Js05o $0x2547F160
+
+
+
+. 91 2547F130 16
+. 7D 6A 5B 78 38 0A FF FD 28 80 00 14 41 85 00 24
+==== BB 92 (0x2547F140) approx BBs exec'd 0 ====
+
+ 0x2547F140: 817E03F4 lwz r11,1012(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x3F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547F144: 5405103A rlwinm r5,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547F148: 7C65582E lwzx r3,r5,r11
+ 9: GETL R11, t6
+ 10: GETL R5, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x2547F14C: 7CE35A14 add r7,r3,r11
+ 15: GETL R3, t12
+ 16: GETL R11, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R7
+ 19: INCEIPL $4
+
+ 0x2547F150: 7CE903A6 mtctr r7
+ 20: GETL R7, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0x2547F154: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+
+. 92 2547F140 24
+. 81 7E 03 F4 54 05 10 3A 7C 65 58 2E 7C E3 5A 14 7C E9 03 A6 4E 80 04 20
+==== BB 93 (0x2547F160) approx BBs exec'd 0 ====
+
+ 0x2547F160: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F164: 7CAB5030 slw r11,r5,r10
+ 3: GETL R5, t4
+ 4: GETL R10, t2
+ 5: SHLL t2, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x2547F168: 85480008 lwzu r10,8(r8)
+ 8: GETL R8, t6
+ 9: ADDL $0x8, t6
+ 10: PUTL t6, R8
+ 11: LDL (t6), t8
+ 12: PUTL t8, R10
+ 13: INCEIPL $4
+
+ 0x2547F16C: 7FFF5B78 or r31,r31,r11
+ 14: GETL R31, t10
+ 15: GETL R11, t12
+ 16: ORL t12, t10
+ 17: PUTL t10, R31
+ 18: INCEIPL $4
+
+ 0x2547F170: 2F8A0000 cmpi cr7,r10,0
+ 19: GETL R10, t14
+ 20: CMP0L t14, t16 (-rSo)
+ 21: ICRFL t16, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x2547F174: 409EFFC0 bc 4,30,0x2547F134
+ 23: Jc30o $0x2547F134
+
+
+
+. 93 2547F160 24
+. 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FF C0
+==== BB 94 (0x2547F134) approx BBs exec'd 0 ====
+
+ 0x2547F134: 380AFFFD addi r0,r10,-3
+ 0: GETL R10, t0
+ 1: ADDL $0xFFFFFFFD, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x2547F138: 28800014 cmpli cr1,r0,20
+ 4: GETL R0, t2
+ 5: MOVL $0x14, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547F13C: 41850024 bc 12,5,0x2547F160
+ 9: Js05o $0x2547F160
+
+
+
+. 94 2547F134 12
+. 38 0A FF FD 28 80 00 14 41 85 00 24
+==== BB 95 (0x2547F3D4) approx BBs exec'd 0 ====
+
+ 0x2547F3D4: 813E04F0 lwz r9,1264(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547F3D8: 2F090000 cmpi cr6,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547F3DC: 41BAFD84 bc 13,26,0x2547F160
+ 9: Js26o $0x2547F160
+
+
+
+. 95 2547F3D4 12
+. 81 3E 04 F0 2F 09 00 00 41 BA FD 84
+==== BB 96 (0x2547F3E0) approx BBs exec'd 0 ====
+
+ 0x2547F3E0: 80680004 lwz r3,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547F3E4: 90690000 stw r3,0(r9)
+ 5: GETL R3, t4
+ 6: GETL R9, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547F3E8: 81480000 lwz r10,0(r8)
+ 9: GETL R8, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R10
+ 12: INCEIPL $4
+
+ 0x2547F3EC: 38A00001 li r5,1
+ 13: MOVL $0x1, t12
+ 14: PUTL t12, R5
+ 15: INCEIPL $4
+
+ 0x2547F3F0: 7CAB5030 slw r11,r5,r10
+ 16: GETL R5, t16
+ 17: GETL R10, t14
+ 18: SHLL t14, t16
+ 19: PUTL t16, R11
+ 20: INCEIPL $4
+
+ 0x2547F3F4: 85480008 lwzu r10,8(r8)
+ 21: GETL R8, t18
+ 22: ADDL $0x8, t18
+ 23: PUTL t18, R8
+ 24: LDL (t18), t20
+ 25: PUTL t20, R10
+ 26: INCEIPL $4
+
+ 0x2547F3F8: 7FFF5B78 or r31,r31,r11
+ 27: GETL R31, t22
+ 28: GETL R11, t24
+ 29: ORL t24, t22
+ 30: PUTL t22, R31
+ 31: INCEIPL $4
+
+ 0x2547F3FC: 2F8A0000 cmpi cr7,r10,0
+ 32: GETL R10, t26
+ 33: CMP0L t26, t28 (-rSo)
+ 34: ICRFL t28, $0x7, CR
+ 35: INCEIPL $4
+
+ 0x2547F400: 409EFD34 bc 4,30,0x2547F134
+ 36: Jc30o $0x2547F134
+
+
+
+. 96 2547F3E0 36
+. 80 68 00 04 90 69 00 00 81 48 00 00 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FD 34
+==== BB 97 (0x2547F158) approx BBs exec'd 0 ====
+
+ 0x2547F158: 83A80004 lwz r29,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x2547F15C: 93BA003C stw r29,60(r26)
+ 5: GETL R29, t4
+ 6: GETL R26, t6
+ 7: ADDL $0x3C, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547F160: 38A00001 li r5,1
+ 10: MOVL $0x1, t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0x2547F164: 7CAB5030 slw r11,r5,r10
+ 13: GETL R5, t12
+ 14: GETL R10, t10
+ 15: SHLL t10, t12
+ 16: PUTL t12, R11
+ 17: INCEIPL $4
+
+ 0x2547F168: 85480008 lwzu r10,8(r8)
+ 18: GETL R8, t14
+ 19: ADDL $0x8, t14
+ 20: PUTL t14, R8
+ 21: LDL (t14), t16
+ 22: PUTL t16, R10
+ 23: INCEIPL $4
+
+ 0x2547F16C: 7FFF5B78 or r31,r31,r11
+ 24: GETL R31, t18
+ 25: GETL R11, t20
+ 26: ORL t20, t18
+ 27: PUTL t18, R31
+ 28: INCEIPL $4
+
+ 0x2547F170: 2F8A0000 cmpi cr7,r10,0
+ 29: GETL R10, t22
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x7, CR
+ 32: INCEIPL $4
+
+ 0x2547F174: 409EFFC0 bc 4,30,0x2547F134
+ 33: Jc30o $0x2547F134
+
+
+
+. 97 2547F158 32
+. 83 A8 00 04 93 BA 00 3C 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FF C0
+==== BB 98 (0x2547F4BC) approx BBs exec'd 0 ====
+
+ 0x2547F4BC: 81480004 lwz r10,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547F4C0: 915A0004 stw r10,4(r26)
+ 5: GETL R10, t4
+ 6: GETL R26, t6
+ 7: ADDL $0x4, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547F4C4: 81480000 lwz r10,0(r8)
+ 10: GETL R8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R10
+ 13: INCEIPL $4
+
+ 0x2547F4C8: 4BFFFF24 b 0x2547F3EC
+ 14: JMPo $0x2547F3EC ($4)
+
+
+
+. 98 2547F4BC 16
+. 81 48 00 04 91 5A 00 04 81 48 00 00 4B FF FF 24
+==== BB 99 (0x2547F3EC) approx BBs exec'd 0 ====
+
+ 0x2547F3EC: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F3F0: 7CAB5030 slw r11,r5,r10
+ 3: GETL R5, t4
+ 4: GETL R10, t2
+ 5: SHLL t2, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x2547F3F4: 85480008 lwzu r10,8(r8)
+ 8: GETL R8, t6
+ 9: ADDL $0x8, t6
+ 10: PUTL t6, R8
+ 11: LDL (t6), t8
+ 12: PUTL t8, R10
+ 13: INCEIPL $4
+
+ 0x2547F3F8: 7FFF5B78 or r31,r31,r11
+ 14: GETL R31, t10
+ 15: GETL R11, t12
+ 16: ORL t12, t10
+ 17: PUTL t10, R31
+ 18: INCEIPL $4
+
+ 0x2547F3FC: 2F8A0000 cmpi cr7,r10,0
+ 19: GETL R10, t14
+ 20: CMP0L t14, t16 (-rSo)
+ 21: ICRFL t16, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x2547F400: 409EFD34 bc 4,30,0x2547F134
+ 23: Jc30o $0x2547F134
+
+
+
+. 99 2547F3EC 24
+. 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FD 34
+==== BB 100 (0x2547F418) approx BBs exec'd 0 ====
+
+ 0x2547F418: 81280004 lwz r9,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547F41C: 913A001C stw r9,28(r26)
+ 5: GETL R9, t4
+ 6: GETL R26, t6
+ 7: ADDL $0x1C, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547F420: 81480000 lwz r10,0(r8)
+ 10: GETL R8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R10
+ 13: INCEIPL $4
+
+ 0x2547F424: 4BFFFFC8 b 0x2547F3EC
+ 14: JMPo $0x2547F3EC ($4)
+
+
+
+. 100 2547F418 16
+. 81 28 00 04 91 3A 00 1C 81 48 00 00 4B FF FF C8
+==== BB 101 (0x2547F4EC) approx BBs exec'd 0 ====
+
+ 0x2547F4EC: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F4F0: 82C80004 lwz r22,4(r8)
+ 3: GETL R8, t2
+ 4: ADDL $0x4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R22
+ 7: INCEIPL $4
+
+ 0x2547F4F4: 7CAB5030 slw r11,r5,r10
+ 8: GETL R5, t8
+ 9: GETL R10, t6
+ 10: SHLL t6, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x2547F4F8: 85480008 lwzu r10,8(r8)
+ 13: GETL R8, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R8
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547F4FC: 7FFF5B78 or r31,r31,r11
+ 19: GETL R31, t14
+ 20: GETL R11, t16
+ 21: ORL t16, t14
+ 22: PUTL t14, R31
+ 23: INCEIPL $4
+
+ 0x2547F500: 2F8A0000 cmpi cr7,r10,0
+ 24: GETL R10, t18
+ 25: CMP0L t18, t20 (-rSo)
+ 26: ICRFL t20, $0x7, CR
+ 27: INCEIPL $4
+
+ 0x2547F504: 409EFC30 bc 4,30,0x2547F134
+ 28: Jc30o $0x2547F134
+
+
+
+. 101 2547F4EC 28
+. 38 A0 00 01 82 C8 00 04 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FC 30
+==== BB 102 (0x2547F4CC) approx BBs exec'd 0 ====
+
+ 0x2547F4CC: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F4D0: 82A80004 lwz r21,4(r8)
+ 3: GETL R8, t2
+ 4: ADDL $0x4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R21
+ 7: INCEIPL $4
+
+ 0x2547F4D4: 7CAB5030 slw r11,r5,r10
+ 8: GETL R5, t8
+ 9: GETL R10, t6
+ 10: SHLL t6, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x2547F4D8: 85480008 lwzu r10,8(r8)
+ 13: GETL R8, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R8
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547F4DC: 7FFF5B78 or r31,r31,r11
+ 19: GETL R31, t14
+ 20: GETL R11, t16
+ 21: ORL t16, t14
+ 22: PUTL t14, R31
+ 23: INCEIPL $4
+
+ 0x2547F4E0: 2F8A0000 cmpi cr7,r10,0
+ 24: GETL R10, t18
+ 25: CMP0L t18, t20 (-rSo)
+ 26: ICRFL t20, $0x7, CR
+ 27: INCEIPL $4
+
+ 0x2547F4E4: 409EFC50 bc 4,30,0x2547F134
+ 28: Jc30o $0x2547F134
+
+
+
+. 102 2547F4CC 28
+. 38 A0 00 01 82 A8 00 04 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FC 50
+==== BB 103 (0x2547F494) approx BBs exec'd 0 ====
+
+ 0x2547F494: 80080004 lwz r0,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547F498: 38A00001 li r5,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547F49C: 81480000 lwz r10,0(r8)
+ 8: GETL R8, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R10
+ 11: INCEIPL $4
+
+ 0x2547F4A0: 900101E0 stw r0,480(r1)
+ 12: GETL R0, t10
+ 13: GETL R1, t12
+ 14: ADDL $0x1E0, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0x2547F4A4: 7CAB5030 slw r11,r5,r10
+ 17: GETL R5, t16
+ 18: GETL R10, t14
+ 19: SHLL t14, t16
+ 20: PUTL t16, R11
+ 21: INCEIPL $4
+
+ 0x2547F4A8: 85480008 lwzu r10,8(r8)
+ 22: GETL R8, t18
+ 23: ADDL $0x8, t18
+ 24: PUTL t18, R8
+ 25: LDL (t18), t20
+ 26: PUTL t20, R10
+ 27: INCEIPL $4
+
+ 0x2547F4AC: 7FFF5B78 or r31,r31,r11
+ 28: GETL R31, t22
+ 29: GETL R11, t24
+ 30: ORL t24, t22
+ 31: PUTL t22, R31
+ 32: INCEIPL $4
+
+ 0x2547F4B0: 2F8A0000 cmpi cr7,r10,0
+ 33: GETL R10, t26
+ 34: CMP0L t26, t28 (-rSo)
+ 35: ICRFL t28, $0x7, CR
+ 36: INCEIPL $4
+
+ 0x2547F4B4: 409EFC80 bc 4,30,0x2547F134
+ 37: Jc30o $0x2547F134
+
+
+
+. 103 2547F494 36
+. 80 08 00 04 38 A0 00 01 81 48 00 00 90 01 01 E0 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FC 80
+==== BB 104 (0x2547F470) approx BBs exec'd 0 ====
+
+ 0x2547F470: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F474: 80C80004 lwz r6,4(r8)
+ 3: GETL R8, t2
+ 4: ADDL $0x4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0x2547F478: 7CAB5030 slw r11,r5,r10
+ 8: GETL R5, t8
+ 9: GETL R10, t6
+ 10: SHLL t6, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x2547F47C: 85480008 lwzu r10,8(r8)
+ 13: GETL R8, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R8
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547F480: 7F393278 xor r25,r25,r6
+ 19: GETL R25, t14
+ 20: GETL R6, t16
+ 21: XORL t14, t16
+ 22: PUTL t16, R25
+ 23: INCEIPL $4
+
+ 0x2547F484: 7FFF5B78 or r31,r31,r11
+ 24: GETL R31, t18
+ 25: GETL R11, t20
+ 26: ORL t20, t18
+ 27: PUTL t18, R31
+ 28: INCEIPL $4
+
+ 0x2547F488: 2F8A0000 cmpi cr7,r10,0
+ 29: GETL R10, t22
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x7, CR
+ 32: INCEIPL $4
+
+ 0x2547F48C: 409EFCA8 bc 4,30,0x2547F134
+ 33: Jc30o $0x2547F134
+
+
+
+. 104 2547F470 32
+. 38 A0 00 01 80 C8 00 04 7C AB 50 30 85 48 00 08 7F 39 32 78 7F FF 5B 78 2F 8A 00 00 40 9E FC A8
+==== BB 105 (0x2547F44C) approx BBs exec'd 0 ====
+
+ 0x2547F44C: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F450: 81880004 lwz r12,4(r8)
+ 3: GETL R8, t2
+ 4: ADDL $0x4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0x2547F454: 7CAB5030 slw r11,r5,r10
+ 8: GETL R5, t8
+ 9: GETL R10, t6
+ 10: SHLL t6, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x2547F458: 85480008 lwzu r10,8(r8)
+ 13: GETL R8, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R8
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547F45C: 7F186278 xor r24,r24,r12
+ 19: GETL R24, t14
+ 20: GETL R12, t16
+ 21: XORL t14, t16
+ 22: PUTL t16, R24
+ 23: INCEIPL $4
+
+ 0x2547F460: 7FFF5B78 or r31,r31,r11
+ 24: GETL R31, t18
+ 25: GETL R11, t20
+ 26: ORL t20, t18
+ 27: PUTL t18, R31
+ 28: INCEIPL $4
+
+ 0x2547F464: 2F8A0000 cmpi cr7,r10,0
+ 29: GETL R10, t22
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x7, CR
+ 32: INCEIPL $4
+
+ 0x2547F468: 409EFCCC bc 4,30,0x2547F134
+ 33: Jc30o $0x2547F134
+
+
+
+. 105 2547F44C 32
+. 38 A0 00 01 81 88 00 04 7C AB 50 30 85 48 00 08 7F 18 62 78 7F FF 5B 78 2F 8A 00 00 40 9E FC CC
+==== BB 106 (0x2547F3A4) approx BBs exec'd 0 ====
+
+ 0x2547F3A4: 83680004 lwz r27,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x2547F3A8: 38A00001 li r5,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547F3AC: 809E04B4 lwz r4,1204(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x4B4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x2547F3B0: 3BE0FFFF li r31,-1
+ 13: MOVL $0xFFFFFFFF, t10
+ 14: PUTL t10, R31
+ 15: INCEIPL $4
+
+ 0x2547F3B4: 81480000 lwz r10,0(r8)
+ 16: GETL R8, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R10
+ 19: INCEIPL $4
+
+ 0x2547F3B8: 93640000 stw r27,0(r4)
+ 20: GETL R27, t16
+ 21: GETL R4, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0x2547F3BC: 7CAB5030 slw r11,r5,r10
+ 24: GETL R5, t22
+ 25: GETL R10, t20
+ 26: SHLL t20, t22
+ 27: PUTL t22, R11
+ 28: INCEIPL $4
+
+ 0x2547F3C0: 85480008 lwzu r10,8(r8)
+ 29: GETL R8, t24
+ 30: ADDL $0x8, t24
+ 31: PUTL t24, R8
+ 32: LDL (t24), t26
+ 33: PUTL t26, R10
+ 34: INCEIPL $4
+
+ 0x2547F3C4: 7FFF5B78 or r31,r31,r11
+ 35: GETL R31, t28
+ 36: GETL R11, t30
+ 37: ORL t30, t28
+ 38: PUTL t28, R31
+ 39: INCEIPL $4
+
+ 0x2547F3C8: 2F8A0000 cmpi cr7,r10,0
+ 40: GETL R10, t32
+ 41: CMP0L t32, t34 (-rSo)
+ 42: ICRFL t34, $0x7, CR
+ 43: INCEIPL $4
+
+ 0x2547F3CC: 409EFD68 bc 4,30,0x2547F134
+ 44: Jc30o $0x2547F134
+
+
+
+. 106 2547F3A4 44
+. 83 68 00 04 38 A0 00 01 80 9E 04 B4 3B E0 FF FF 81 48 00 00 93 64 00 00 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FD 68
+==== BB 107 (0x2547F3D0) approx BBs exec'd 0 ====
+
+ 0x2547F3D0: 4BFFFDA8 b 0x2547F178
+ 0: JMPo $0x2547F178 ($4)
+
+
+
+. 107 2547F3D0 4
+. 4B FF FD A8
+==== BB 108 (0x2547F178) approx BBs exec'd 0 ====
+
+ 0x2547F178: 38610050 addi r3,r1,80
+ 0: GETL R1, t0
+ 1: ADDL $0x50, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x2547F17C: 4800364D bl 0x254827C8
+ 4: MOVL $0x2547F180, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0x254827C8 ($4)
+
+
+
+. 108 2547F178 8
+. 38 61 00 50 48 00 36 4D
+==== BB 109 uname(0x254827C8) approx BBs exec'd 0 ====
+
+ 0x254827C8: 3800007A li r0,122
+ 0: MOVL $0x7A, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254827CC: 44000002 sc
+ 3: JMPo-sys $0x254827D0 ($4)
+
+
+
+. 109 254827C8 8
+. 38 00 00 7A 44 00 00 02
+==== BB 110 (0x254827D0) approx BBs exec'd 0 ====
+
+ 0x254827D0: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 110 254827D0 4
+. 4C A3 00 20
+==== BB 111 (0x2547F180) approx BBs exec'd 0 ====
+
+ 0x2547F180: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x2547F184: 3BA10010 addi r29,r1,16
+ 4: GETL R1, t4
+ 5: ADDL $0x10, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x2547F188: 408201DC bc 4,2,0x2547F364
+ 8: Jc02o $0x2547F364
+
+
+
+. 111 2547F180 12
+. 2C 03 00 00 3B A1 00 10 40 82 01 DC
+==== BB 112 (0x2547F18C) approx BBs exec'd 0 ====
+
+ 0x2547F18C: 3BA100D2 addi r29,r1,210
+ 0: GETL R1, t0
+ 1: ADDL $0xD2, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x2547F190: 893D0000 lbz r9,0(r29)
+ 4: GETL R29, t2
+ 5: LDB (t2), t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x2547F194: 7FA3EB78 or r3,r29,r29
+ 8: GETL R29, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x2547F198: 38E00000 li r7,0
+ 11: MOVL $0x0, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0x2547F19C: 39000000 li r8,0
+ 14: MOVL $0x0, t10
+ 15: PUTL t10, R8
+ 16: INCEIPL $4
+
+ 0x2547F1A0: 3949FFD0 addi r10,r9,-48
+ 17: GETL R9, t12
+ 18: ADDL $0xFFFFFFD0, t12
+ 19: PUTL t12, R10
+ 20: INCEIPL $4
+
+ 0x2547F1A4: 2B8A0009 cmpli cr7,r10,9
+ 21: GETL R10, t14
+ 22: MOVL $0x9, t18
+ 23: CMPUL t14, t18, t16 (-rSo)
+ 24: ICRFL t16, $0x7, CR
+ 25: INCEIPL $4
+
+ 0x2547F1A8: 419D0068 bc 12,29,0x2547F210
+ 26: Js29o $0x2547F210
+
+
+
+. 112 2547F18C 32
+. 3B A1 00 D2 89 3D 00 00 7F A3 EB 78 38 E0 00 00 39 00 00 00 39 49 FF D0 2B 8A 00 09 41 9D 00 68
+==== BB 113 (0x2547F1AC) approx BBs exec'd 0 ====
+
+ 0x2547F1AC: 89630001 lbz r11,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547F1B0: 3929FFD0 addi r9,r9,-48
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFD0, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x2547F1B4: 39430001 addi r10,r3,1
+ 9: GETL R3, t6
+ 10: ADDL $0x1, t6
+ 11: PUTL t6, R10
+ 12: INCEIPL $4
+
+ 0x2547F1B8: 380BFFD0 addi r0,r11,-48
+ 13: GETL R11, t8
+ 14: ADDL $0xFFFFFFD0, t8
+ 15: PUTL t8, R0
+ 16: INCEIPL $4
+
+ 0x2547F1BC: 2B800009 cmpli cr7,r0,9
+ 17: GETL R0, t10
+ 18: MOVL $0x9, t14
+ 19: CMPUL t10, t14, t12 (-rSo)
+ 20: ICRFL t12, $0x7, CR
+ 21: INCEIPL $4
+
+ 0x2547F1C0: 419D0020 bc 12,29,0x2547F1E0
+ 22: Js29o $0x2547F1E0
+
+
+
+. 113 2547F1AC 24
+. 89 63 00 01 39 29 FF D0 39 43 00 01 38 0B FF D0 2B 80 00 09 41 9D 00 20
+==== BB 114 (0x2547F1E0) approx BBs exec'd 0 ====
+
+ 0x2547F1E0: 2C8B002E cmpi cr1,r11,46
+ 0: GETL R11, t0
+ 1: MOVL $0x2E, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x2547F1E4: 54FB402E rlwinm r27,r7,8,0,23
+ 5: GETL R7, t6
+ 6: SHLL $0x8, t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0x2547F1E8: 7F674B78 or r7,r27,r9
+ 9: GETL R27, t8
+ 10: GETL R9, t10
+ 11: ORL t10, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0x2547F1EC: 39080001 addi r8,r8,1
+ 14: GETL R8, t12
+ 15: ADDL $0x1, t12
+ 16: PUTL t12, R8
+ 17: INCEIPL $4
+
+ 0x2547F1F0: 386A0001 addi r3,r10,1
+ 18: GETL R10, t14
+ 19: ADDL $0x1, t14
+ 20: PUTL t14, R3
+ 21: INCEIPL $4
+
+ 0x2547F1F4: 40860014 bc 4,6,0x2547F208
+ 22: Jc06o $0x2547F208
+
+
+
+. 114 2547F1E0 24
+. 2C 8B 00 2E 54 FB 40 2E 7F 67 4B 78 39 08 00 01 38 6A 00 01 40 86 00 14
+==== BB 115 (0x2547F1F8) approx BBs exec'd 0 ====
+
+ 0x2547F1F8: 892A0001 lbz r9,1(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547F1FC: 3B89FFD0 addi r28,r9,-48
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFD0, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x2547F200: 281C0009 cmpli cr0,r28,9
+ 9: GETL R28, t6
+ 10: MOVL $0x9, t10
+ 11: CMPUL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x0, CR
+ 13: INCEIPL $4
+
+ 0x2547F204: 4081FFA8 bc 4,1,0x2547F1AC
+ 14: Jc01o $0x2547F1AC
+
+
+
+. 115 2547F1F8 16
+. 89 2A 00 01 3B 89 FF D0 28 1C 00 09 40 81 FF A8
+==== BB 116 (0x2547F208) approx BBs exec'd 0 ====
+
+ 0x2547F208: 2F080002 cmpi cr6,r8,2
+ 0: GETL R8, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x2547F20C: 41990010 bc 12,25,0x2547F21C
+ 5: Js25o $0x2547F21C
+
+
+
+. 116 2547F208 8
+. 2F 08 00 02 41 99 00 10
+==== BB 117 (0x2547F21C) approx BBs exec'd 0 ====
+
+ 0x2547F21C: 3CA00002 lis r5,2
+ 0: MOVL $0x20000, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F220: 60AB0204 ori r11,r5,0x204
+ 3: MOVL $0x20204, t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0x2547F224: 7F875840 cmpl cr7,r7,r11
+ 6: GETL R7, t4
+ 7: GETL R11, t6
+ 8: CMPUL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x2547F228: 409D03B4 bc 4,29,0x2547F5DC
+ 11: Jc29o $0x2547F5DC
+
+
+
+. 117 2547F21C 16
+. 3C A0 00 02 60 AB 02 04 7F 87 58 40 40 9D 03 B4
+==== BB 118 (0x2547F22C) approx BBs exec'd 0 ====
+
+ 0x2547F22C: 90FA0008 stw r7,8(r26)
+ 0: GETL R7, t0
+ 1: GETL R26, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547F230: 3880006E li r4,110
+ 5: MOVL $0x6E, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x2547F234: 48003BCD bl 0x25482E00
+ 8: MOVL $0x2547F238, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x25482E00 ($4)
+
+
+
+. 118 2547F22C 12
+. 90 FA 00 08 38 80 00 6E 48 00 3B CD
+==== BB 119 strchr(0x25482E00) approx BBs exec'd 0 ====
+
+ 0x25482E00: 5084442E rlwimi r4,r4,8,16,23
+ 0: GETL R4, t0
+ 1: GETL R4, t2
+ 2: ROLL $0x8, t2
+ 3: ANDL $0xFF00, t2
+ 4: ANDL $0xFFFF00FF, t0
+ 5: ORL t0, t2
+ 6: PUTL t2, R4
+ 7: INCEIPL $4
+
+ 0x25482E04: 3960FFFF li r11,-1
+ 8: MOVL $0xFFFFFFFF, t4
+ 9: PUTL t4, R11
+ 10: INCEIPL $4
+
+ 0x25482E08: 5084801E rlwimi r4,r4,16,0,15
+ 11: GETL R4, t6
+ 12: GETL R4, t8
+ 13: ROLL $0x10, t8
+ 14: ANDL $0xFFFF0000, t8
+ 15: ANDL $0xFFFF, t6
+ 16: ORL t6, t8
+ 17: PUTL t8, R4
+ 18: INCEIPL $4
+
+ 0x25482E0C: 546A1EF8 rlwinm r10,r3,3,27,28
+ 19: GETL R3, t10
+ 20: ROLL $0x3, t10
+ 21: ANDL $0x18, t10
+ 22: PUTL t10, R10
+ 23: INCEIPL $4
+
+ 0x25482E10: 3CC0FEFF lis r6,-257
+ 24: MOVL $0xFEFF0000, t12
+ 25: PUTL t12, R6
+ 26: INCEIPL $4
+
+ 0x25482E14: 3CE07F7F lis r7,32639
+ 27: MOVL $0x7F7F0000, t14
+ 28: PUTL t14, R7
+ 29: INCEIPL $4
+
+ 0x25482E18: 5468003A rlwinm r8,r3,0,0,29
+ 30: GETL R3, t16
+ 31: ANDL $0xFFFFFFFC, t16
+ 32: PUTL t16, R8
+ 33: INCEIPL $4
+
+ 0x25482E1C: 38C6FEFF addi r6,r6,-257
+ 34: MOVL $0xFEFEFEFF, t18
+ 35: PUTL t18, R6
+ 36: INCEIPL $4
+
+ 0x25482E20: 38E77F7F addi r7,r7,32639
+ 37: MOVL $0x7F7F7F7F, t20
+ 38: PUTL t20, R7
+ 39: INCEIPL $4
+
+ 0x25482E24: 80A80000 lwz r5,0(r8)
+ 40: GETL R8, t22
+ 41: LDL (t22), t24
+ 42: PUTL t24, R5
+ 43: INCEIPL $4
+
+ 0x25482E28: 7D6B5430 srw r11,r11,r10
+ 44: GETL R11, t28
+ 45: GETL R10, t26
+ 46: SHRL t26, t28
+ 47: PUTL t28, R11
+ 48: INCEIPL $4
+
+ 0x25482E2C: 7CA55B38 orc r5,r5,r11
+ 49: GETL R5, t30
+ 50: GETL R11, t32
+ 51: NOTL t32
+ 52: ORL t30, t32
+ 53: PUTL t32, R5
+ 54: INCEIPL $4
+
+ 0x25482E30: 7C062A14 add r0,r6,r5
+ 55: GETL R6, t34
+ 56: GETL R5, t36
+ 57: ADDL t34, t36
+ 58: PUTL t36, R0
+ 59: INCEIPL $4
+
+ 0x25482E34: 7CE928F8 nor r9,r7,r5
+ 60: GETL R7, t38
+ 61: GETL R5, t40
+ 62: ORL t40, t38
+ 63: NOTL t38
+ 64: PUTL t38, R9
+ 65: INCEIPL $4
+
+ 0x25482E38: 7C004839 and. r0,r0,r9
+ 66: GETL R0, t42
+ 67: GETL R9, t44
+ 68: ANDL t42, t44
+ 69: PUTL t44, R0
+ 70: CMP0L t44, t46 (-rSo)
+ 71: ICRFL t46, $0x0, CR
+ 72: INCEIPL $4
+
+ 0x25482E3C: 7C8C2A78 xor r12,r4,r5
+ 73: GETL R4, t48
+ 74: GETL R5, t50
+ 75: XORL t48, t50
+ 76: PUTL t50, R12
+ 77: INCEIPL $4
+
+ 0x25482E40: 7D8C5B38 orc r12,r12,r11
+ 78: GETL R12, t52
+ 79: GETL R11, t54
+ 80: NOTL t54
+ 81: ORL t52, t54
+ 82: PUTL t54, R12
+ 83: INCEIPL $4
+
+ 0x25482E44: 48000020 b 0x25482E64
+ 84: JMPo $0x25482E64 ($4)
+
+
+
+. 119 25482E00 72
+. 50 84 44 2E 39 60 FF FF 50 84 80 1E 54 6A 1E F8 3C C0 FE FF 3C E0 7F 7F 54 68 00 3A 38 C6 FE FF 38 E7 7F 7F 80 A8 00 00 7D 6B 54 30 7C A5 5B 38 7C 06 2A 14 7C E9 28 F8 7C 00 48 39 7C 8C 2A 78 7D 8C 5B 38 48 00 00 20
+==== BB 120 (0x25482E64) approx BBs exec'd 0 ====
+
+ 0x25482E64: 7C066214 add r0,r6,r12
+ 0: GETL R6, t0
+ 1: GETL R12, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25482E68: 7CE960F8 nor r9,r7,r12
+ 5: GETL R7, t4
+ 6: GETL R12, t6
+ 7: ORL t6, t4
+ 8: NOTL t4
+ 9: PUTL t4, R9
+ 10: INCEIPL $4
+
+ 0x25482E6C: 4182FFDC bc 12,2,0x25482E48
+ 11: Js02o $0x25482E48
+
+
+
+. 120 25482E64 12
+. 7C 06 62 14 7C E9 60 F8 41 82 FF DC
+==== BB 121 (0x25482E48) approx BBs exec'd 0 ====
+
+ 0x25482E48: 84A80004 lwzu r5,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R8
+ 3: LDL (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25482E4C: 7C004839 and. r0,r0,r9
+ 6: GETL R0, t4
+ 7: GETL R9, t6
+ 8: ANDL t4, t6
+ 9: PUTL t6, R0
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x0, CR
+ 12: INCEIPL $4
+
+ 0x25482E50: 7C062A14 add r0,r6,r5
+ 13: GETL R6, t10
+ 14: GETL R5, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R0
+ 17: INCEIPL $4
+
+ 0x25482E54: 7CE928F8 nor r9,r7,r5
+ 18: GETL R7, t14
+ 19: GETL R5, t16
+ 20: ORL t16, t14
+ 21: NOTL t14
+ 22: PUTL t14, R9
+ 23: INCEIPL $4
+
+ 0x25482E58: 4082005C bc 4,2,0x25482EB4
+ 24: Jc02o $0x25482EB4
+
+
+
+. 121 25482E48 20
+. 84 A8 00 04 7C 00 48 39 7C 06 2A 14 7C E9 28 F8 40 82 00 5C
+==== BB 122 (0x25482E5C) approx BBs exec'd 0 ====
+
+ 0x25482E5C: 7C004839 and. r0,r0,r9
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0x25482E60: 7C8C2A78 xor r12,r4,r5
+ 7: GETL R4, t6
+ 8: GETL R5, t8
+ 9: XORL t6, t8
+ 10: PUTL t8, R12
+ 11: INCEIPL $4
+
+ 0x25482E64: 7C066214 add r0,r6,r12
+ 12: GETL R6, t10
+ 13: GETL R12, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R0
+ 16: INCEIPL $4
+
+ 0x25482E68: 7CE960F8 nor r9,r7,r12
+ 17: GETL R7, t14
+ 18: GETL R12, t16
+ 19: ORL t16, t14
+ 20: NOTL t14
+ 21: PUTL t14, R9
+ 22: INCEIPL $4
+
+ 0x25482E6C: 4182FFDC bc 12,2,0x25482E48
+ 23: Js02o $0x25482E48
+
+
+
+. 122 25482E5C 20
+. 7C 00 48 39 7C 8C 2A 78 7C 06 62 14 7C E9 60 F8 41 82 FF DC
+==== BB 123 (0x25482E70) approx BBs exec'd 0 ====
+
+ 0x25482E70: 7C004839 and. r0,r0,r9
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0x25482E74: 38600000 li r3,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25482E78: 4D820020 bclr 12,2
+ 10: GETL LR, t8
+ 11: Js02o-r t8
+
+
+
+. 123 25482E70 12
+. 7C 00 48 39 38 60 00 00 4D 82 00 20
+==== BB 124 (0x2547F238) approx BBs exec'd 0 ====
+
+ 0x2547F238: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547F23C: 418602F4 bc 12,6,0x2547F530
+ 4: Js06o $0x2547F530
+
+
+
+. 124 2547F238 8
+. 2C 83 00 00 41 86 02 F4
+==== BB 125 (0x2547F530) approx BBs exec'd 0 ====
+
+ 0x2547F530: 813A0008 lwz r9,8(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547F534: 3C000002 lis r0,2
+ 5: MOVL $0x20000, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x2547F538: 60030544 ori r3,r0,0x544
+ 8: MOVL $0x20544, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x2547F53C: 7C891840 cmpl cr1,r9,r3
+ 11: GETL R9, t8
+ 12: GETL R3, t10
+ 13: CMPUL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x1, CR
+ 15: INCEIPL $4
+
+ 0x2547F540: 41A5FD24 bc 13,5,0x2547F264
+ 16: Js05o $0x2547F264
+
+
+
+. 125 2547F530 20
+. 81 3A 00 08 3C 00 00 02 60 03 05 44 7C 89 18 40 41 A5 FD 24
+==== BB 126 (0x2547F264) approx BBs exec'd 0 ====
+
+ 0x2547F264: 2F1FFFFF cmpi cr6,r31,-1
+ 0: GETL R31, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x2547F268: 83BE04B4 lwz r29,1204(r30)
+ 5: GETL R30, t6
+ 6: ADDL $0x4B4, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R29
+ 9: INCEIPL $4
+
+ 0x2547F26C: 419A0030 bc 12,26,0x2547F29C
+ 10: Js26o $0x2547F29C
+
+
+
+. 126 2547F264 12
+. 2F 1F FF FF 83 BE 04 B4 41 9A 00 30
+==== BB 127 (0x2547F29C) approx BBs exec'd 0 ====
+
+ 0x2547F29C: 831A0004 lwz r24,4(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0x2547F2A0: 2F980000 cmpi cr7,r24,0
+ 5: GETL R24, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547F2A4: 409E000C bc 4,30,0x2547F2B0
+ 9: Jc30o $0x2547F2B0
+
+
+
+. 127 2547F29C 12
+. 83 1A 00 04 2F 98 00 00 40 9E 00 0C
+==== BB 128 (0x2547F2B0) approx BBs exec'd 0 ====
+
+ 0x2547F2B0: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547F2B4: 839E0500 lwz r28,1280(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x500, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x2547F2B8: 48001119 bl 0x254803D0
+ 8: MOVL $0x2547F2BC, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x254803D0 ($4)
+
+
+
+. 128 2547F2B0 12
+. 38 60 00 00 83 9E 05 00 48 00 11 19
+==== BB 129 brk(0x254803D0) approx BBs exec'd 0 ====
+
+ 0x254803D0: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x254803D4: 90610008 stw r3,8(r1)
+ 6: GETL R3, t4
+ 7: GETL R1, t6
+ 8: ADDL $0x8, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x254803D8: 3800002D li r0,45
+ 11: MOVL $0x2D, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x254803DC: 44000002 sc
+ 14: JMPo-sys $0x254803E0 ($4)
+
+
+
+. 129 254803D0 16
+. 94 21 FF F0 90 61 00 08 38 00 00 2D 44 00 00 02
+==== BB 130 (0x254803E0) approx BBs exec'd 0 ====
+
+ 0x254803E0: 80C10008 lwz r6,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254803E4: 7C8802A6 mflr r4
+ 5: GETL LR, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x254803E8: 48016C19 bl 0x25497000
+ 8: MOVL $0x254803EC, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x25497000 ($4)
+
+
+
+. 130 254803E0 12
+. 80 C1 00 08 7C 88 02 A6 48 01 6C 19
+==== BB 131 (0x254803EC) approx BBs exec'd 0 ====
+
+ 0x254803EC: 7CA802A6 mflr r5
+ 0: GETL LR, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x254803F0: 80A50504 lwz r5,1284(r5)
+ 3: GETL R5, t2
+ 4: ADDL $0x504, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x254803F4: 7C8803A6 mtlr r4
+ 8: GETL R4, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0x254803F8: 90650000 stw r3,0(r5)
+ 11: GETL R3, t8
+ 12: GETL R5, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x254803FC: 7C061840 cmpl cr0,r6,r3
+ 15: GETL R6, t12
+ 16: GETL R3, t14
+ 17: CMPUL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x0, CR
+ 19: INCEIPL $4
+
+ 0x25480400: 38210010 addi r1,r1,16
+ 20: GETL R1, t18
+ 21: ADDL $0x10, t18
+ 22: PUTL t18, R1
+ 23: INCEIPL $4
+
+ 0x25480404: 38600000 li r3,0
+ 24: MOVL $0x0, t20
+ 25: PUTL t20, R3
+ 26: INCEIPL $4
+
+ 0x25480408: 4CA10020 bclr 5,1
+ 27: GETL LR, t22
+ 28: Jc01o-r t22
+
+
+
+. 131 254803EC 32
+. 7C A8 02 A6 80 A5 05 04 7C 88 03 A6 90 65 00 00 7C 06 18 40 38 21 00 10 38 60 00 00 4C A1 00 20
+==== BB 132 (0x2547F2BC) approx BBs exec'd 0 ====
+
+ 0x2547F2BC: 813E0504 lwz r9,1284(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x504, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547F2C0: 809A0004 lwz r4,4(r26)
+ 5: GETL R26, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x2547F2C4: 81690000 lwz r11,0(r9)
+ 10: GETL R9, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0x2547F2C8: 7F2400D0 neg r25,r4
+ 14: GETL R4, t12
+ 15: NEGL t12
+ 16: PUTL t12, R25
+ 17: INCEIPL $4
+
+ 0x2547F2CC: 7C8BE040 cmpl cr1,r11,r28
+ 18: GETL R11, t14
+ 19: GETL R28, t16
+ 20: CMPUL t14, t16, t18 (-rSo)
+ 21: ICRFL t18, $0x1, CR
+ 22: INCEIPL $4
+
+ 0x2547F2D0: 7F645A14 add r27,r4,r11
+ 23: GETL R4, t20
+ 24: GETL R11, t22
+ 25: ADDL t20, t22
+ 26: PUTL t22, R27
+ 27: INCEIPL $4
+
+ 0x2547F2D4: 399BFFFF addi r12,r27,-1
+ 28: GETL R27, t24
+ 29: ADDL $0xFFFFFFFF, t24
+ 30: PUTL t24, R12
+ 31: INCEIPL $4
+
+ 0x2547F2D8: 7D83C838 and r3,r12,r25
+ 32: GETL R12, t26
+ 33: GETL R25, t28
+ 34: ANDL t26, t28
+ 35: PUTL t28, R3
+ 36: INCEIPL $4
+
+ 0x2547F2DC: 408402D8 bc 4,4,0x2547F5B4
+ 37: Jc04o $0x2547F5B4
+
+
+
+. 132 2547F2BC 36
+. 81 3E 05 04 80 9A 00 04 81 69 00 00 7F 24 00 D0 7C 8B E0 40 7F 64 5A 14 39 9B FF FF 7D 83 C8 38 40 84 02 D8
+==== BB 133 (0x2547F2E0) approx BBs exec'd 0 ====
+
+ 0x2547F2E0: 807A000C lwz r3,12(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547F2E4: 2C030000 cmpi cr0,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547F2E8: 4182000C bc 12,2,0x2547F2F4
+ 9: Js02o $0x2547F2F4
+
+
+
+. 133 2547F2E0 12
+. 80 7A 00 0C 2C 03 00 00 41 82 00 0C
+==== BB 134 (0x2547F2F4) approx BBs exec'd 0 ====
+
+ 0x2547F2F4: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547F2F8: 4800111D bl 0x25480414
+ 3: MOVL $0x2547F2FC, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25480414 ($4)
+
+
+
+. 134 2547F2F4 8
+. 38 60 00 00 48 00 11 1D
+==== BB 135 sbrk(0x25480414) approx BBs exec'd 0 ====
+
+ 0x25480414: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25480418: 7C8802A6 mflr r4
+ 6: GETL LR, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2548041C: 48016BE5 bl 0x25497000
+ 9: MOVL $0x25480420, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 135 25480414 12
+. 94 21 FF E0 7C 88 02 A6 48 01 6B E5
+==== BB 136 (0x25480420) approx BBs exec'd 0 ====
+
+ 0x25480420: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25480424: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25480428: 93E1001C stw r31,28(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2548042C: 90810024 stw r4,36(r1)
+ 13: GETL R4, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25480430: 93A10014 stw r29,20(r1)
+ 18: GETL R29, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25480434: 7C7D1B78 or r29,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x25480438: 83FE0504 lwz r31,1284(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x504, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0x2548043C: 38600000 li r3,0
+ 31: MOVL $0x0, t24
+ 32: PUTL t24, R3
+ 33: INCEIPL $4
+
+ 0x25480440: 801F0000 lwz r0,0(r31)
+ 34: GETL R31, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R0
+ 37: INCEIPL $4
+
+ 0x25480444: 2F800000 cmpi cr7,r0,0
+ 38: GETL R0, t30
+ 39: CMP0L t30, t32 (-rSo)
+ 40: ICRFL t32, $0x7, CR
+ 41: INCEIPL $4
+
+ 0x25480448: 419E003C bc 12,30,0x25480484
+ 42: Js30o $0x25480484
+
+
+
+. 136 25480420 44
+. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 81 00 24 93 A1 00 14 7C 7D 1B 78 83 FE 05 04 38 60 00 00 80 1F 00 00 2F 80 00 00 41 9E 00 3C
+==== BB 137 (0x2548044C) approx BBs exec'd 0 ====
+
+ 0x2548044C: 813E049C lwz r9,1180(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x49C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25480450: 80A90000 lwz r5,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R5
+ 8: INCEIPL $4
+
+ 0x25480454: 2C050000 cmpi cr0,r5,0
+ 9: GETL R5, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x0, CR
+ 12: INCEIPL $4
+
+ 0x25480458: 4082002C bc 4,2,0x25480484
+ 13: Jc02o $0x25480484
+
+
+
+. 137 2548044C 16
+. 81 3E 04 9C 80 A9 00 00 2C 05 00 00 40 82 00 2C
+==== BB 138 (0x2548045C) approx BBs exec'd 0 ====
+
+ 0x2548045C: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25480460: 409A003C bc 4,26,0x2548049C
+ 4: Jc26o $0x2548049C
+
+
+
+. 138 2548045C 8
+. 2F 1D 00 00 40 9A 00 3C
+==== BB 139 (0x25480464) approx BBs exec'd 0 ====
+
+ 0x25480464: 807F0000 lwz r3,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25480468: 80C10024 lwz r6,36(r1)
+ 4: GETL R1, t4
+ 5: ADDL $0x24, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x2548046C: 83A10014 lwz r29,20(r1)
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R29
+ 13: INCEIPL $4
+
+ 0x25480470: 83C10018 lwz r30,24(r1)
+ 14: GETL R1, t12
+ 15: ADDL $0x18, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R30
+ 18: INCEIPL $4
+
+ 0x25480474: 7CC803A6 mtlr r6
+ 19: GETL R6, t16
+ 20: PUTL t16, LR
+ 21: INCEIPL $4
+
+ 0x25480478: 83E1001C lwz r31,28(r1)
+ 22: GETL R1, t18
+ 23: ADDL $0x1C, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R31
+ 26: INCEIPL $4
+
+ 0x2548047C: 38210020 addi r1,r1,32
+ 27: GETL R1, t22
+ 28: ADDL $0x20, t22
+ 29: PUTL t22, R1
+ 30: INCEIPL $4
+
+ 0x25480480: 4E800020 blr
+ 31: GETL LR, t24
+ 32: JMPo-r t24 ($4)
+
+
+
+. 139 25480464 32
+. 80 7F 00 00 80 C1 00 24 83 A1 00 14 83 C1 00 18 7C C8 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 140 (0x2547F2FC) approx BBs exec'd 0 ====
+
+ 0x2547F2FC: 7F83E000 cmp cr7,r3,r28
+ 0: GETL R3, t0
+ 1: GETL R28, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x2547F300: 419E02C4 bc 12,30,0x2547F5C4
+ 5: Js30o $0x2547F5C4
+
+
+
+. 140 2547F2FC 8
+. 7F 83 E0 00 41 9E 02 C4
+==== BB 141 (0x2547F304) approx BBs exec'd 0 ====
+
+ 0x2547F304: 80BD0000 lwz r5,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x2547F308: 2C850000 cmpi cr1,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x2547F30C: 408602A0 bc 4,6,0x2547F5AC
+ 8: Jc06o $0x2547F5AC
+
+
+
+. 141 2547F304 12
+. 80 BD 00 00 2C 85 00 00 40 86 02 A0
+==== BB 142 (0x2547F310) approx BBs exec'd 0 ====
+
+ 0x2547F310: 7EC3B378 or r3,r22,r22
+ 0: GETL R22, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547F314: 7EE803A6 mtlr r23
+ 3: GETL R23, t2
+ 4: PUTL t2, LR
+ 5: INCEIPL $4
+
+ 0x2547F318: 7EA4AB78 or r4,r21,r21
+ 6: GETL R21, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2547F31C: 38A101E0 addi r5,r1,480
+ 9: GETL R1, t6
+ 10: ADDL $0x1E0, t6
+ 11: PUTL t6, R5
+ 12: INCEIPL $4
+
+ 0x2547F320: 4E800021 blrl
+ 13: GETL LR, t8
+ 14: MOVL $0x2547F324, t10
+ 15: PUTL t10, LR
+ 16: JMPo-r t8 ($4)
+
+
+
+. 142 2547F310 20
+. 7E C3 B3 78 7E E8 03 A6 7E A4 AB 78 38 A1 01 E0 4E 80 00 21
+==== BB 143 dl_main(0x254721F0) approx BBs exec'd 0 ====
+
+ 0x254721F0: 9421FF30 stwu r1,-208(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF30, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x254721F4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254721F8: 48024E09 bl 0x25497000
+ 9: MOVL $0x254721FC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 143 254721F0 12
+. 94 21 FF 30 7C 08 02 A6 48 02 4E 09
+==== BB 144 (0x254721FC) approx BBs exec'd 0 ====
+
+ 0x254721FC: 93C100C8 stw r30,200(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xC8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25472200: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25472204: 92010090 stw r16,144(r1)
+ 8: GETL R16, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x90, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25472208: 900100D4 stw r0,212(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0xD4, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547220C: 7D600026 mfcr r11
+ 18: GETL CR, t14
+ 19: PUTL t14, R11
+ 20: INCEIPL $4
+
+ 0x25472210: 91C10088 stw r14,136(r1)
+ 21: GETL R14, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x88, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25472214: 821E04B4 lwz r16,1204(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4B4, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R16
+ 30: INCEIPL $4
+
+ 0x25472218: 819E04B8 lwz r12,1208(r30)
+ 31: GETL R30, t24
+ 32: ADDL $0x4B8, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R12
+ 35: INCEIPL $4
+
+ 0x2547221C: 81500000 lwz r10,0(r16)
+ 36: GETL R16, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R10
+ 39: INCEIPL $4
+
+ 0x25472220: 81DE04C8 lwz r14,1224(r30)
+ 40: GETL R30, t32
+ 41: ADDL $0x4C8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R14
+ 44: INCEIPL $4
+
+ 0x25472224: 2F8A0000 cmpi cr7,r10,0
+ 45: GETL R10, t36
+ 46: CMP0L t36, t38 (-rSo)
+ 47: ICRFL t38, $0x7, CR
+ 48: INCEIPL $4
+
+ 0x25472228: 813E0020 lwz r9,32(r30)
+ 49: GETL R30, t40
+ 50: ADDL $0x20, t40
+ 51: LDL (t40), t42
+ 52: PUTL t42, R9
+ 53: INCEIPL $4
+
+ 0x2547222C: 91610084 stw r11,132(r1)
+ 54: GETL R11, t44
+ 55: GETL R1, t46
+ 56: ADDL $0x84, t46
+ 57: STL t44, (t46)
+ 58: INCEIPL $4
+
+ 0x25472230: 811E04D8 lwz r8,1240(r30)
+ 59: GETL R30, t48
+ 60: ADDL $0x4D8, t48
+ 61: LDL (t48), t50
+ 62: PUTL t50, R8
+ 63: INCEIPL $4
+
+ 0x25472234: 816C0000 lwz r11,0(r12)
+ 64: GETL R12, t52
+ 65: LDL (t52), t54
+ 66: PUTL t54, R11
+ 67: INCEIPL $4
+
+ 0x25472238: 80FE04B0 lwz r7,1200(r30)
+ 68: GETL R30, t56
+ 69: ADDL $0x4B0, t56
+ 70: LDL (t56), t58
+ 71: PUTL t58, R7
+ 72: INCEIPL $4
+
+ 0x2547223C: 80DE001C lwz r6,28(r30)
+ 73: GETL R30, t60
+ 74: ADDL $0x1C, t60
+ 75: LDL (t60), t62
+ 76: PUTL t62, R6
+ 77: INCEIPL $4
+
+ 0x25472240: 801E04A8 lwz r0,1192(r30)
+ 78: GETL R30, t64
+ 79: ADDL $0x4A8, t64
+ 80: LDL (t64), t66
+ 81: PUTL t66, R0
+ 82: INCEIPL $4
+
+ 0x25472244: 93E100CC stw r31,204(r1)
+ 83: GETL R31, t68
+ 84: GETL R1, t70
+ 85: ADDL $0xCC, t70
+ 86: STL t68, (t70)
+ 87: INCEIPL $4
+
+ 0x25472248: 7C3F0B78 or r31,r1,r1
+ 88: GETL R1, t72
+ 89: PUTL t72, R31
+ 90: INCEIPL $4
+
+ 0x2547224C: 91E1008C stw r15,140(r1)
+ 91: GETL R15, t74
+ 92: GETL R1, t76
+ 93: ADDL $0x8C, t76
+ 94: STL t74, (t76)
+ 95: INCEIPL $4
+
+ 0x25472250: 92410098 stw r18,152(r1)
+ 96: GETL R18, t78
+ 97: GETL R1, t80
+ 98: ADDL $0x98, t80
+ 99: STL t78, (t80)
+ 100: INCEIPL $4
+
+ 0x25472254: 3A400000 li r18,0
+ 101: MOVL $0x0, t82
+ 102: PUTL t82, R18
+ 103: INCEIPL $4
+
+ 0x25472258: 9261009C stw r19,156(r1)
+ 104: GETL R19, t84
+ 105: GETL R1, t86
+ 106: ADDL $0x9C, t86
+ 107: STL t84, (t86)
+ 108: INCEIPL $4
+
+ 0x2547225C: 3A600000 li r19,0
+ 109: MOVL $0x0, t88
+ 110: PUTL t88, R19
+ 111: INCEIPL $4
+
+ 0x25472260: 928100A0 stw r20,160(r1)
+ 112: GETL R20, t90
+ 113: GETL R1, t92
+ 114: ADDL $0xA0, t92
+ 115: STL t90, (t92)
+ 116: INCEIPL $4
+
+ 0x25472264: 3A800000 li r20,0
+ 117: MOVL $0x0, t94
+ 118: PUTL t94, R20
+ 119: INCEIPL $4
+
+ 0x25472268: 92A100A4 stw r21,164(r1)
+ 120: GETL R21, t96
+ 121: GETL R1, t98
+ 122: ADDL $0xA4, t98
+ 123: STL t96, (t98)
+ 124: INCEIPL $4
+
+ 0x2547226C: 3AA00000 li r21,0
+ 125: MOVL $0x0, t100
+ 126: PUTL t100, R21
+ 127: INCEIPL $4
+
+ 0x25472270: 92C100A8 stw r22,168(r1)
+ 128: GETL R22, t102
+ 129: GETL R1, t104
+ 130: ADDL $0xA8, t104
+ 131: STL t102, (t104)
+ 132: INCEIPL $4
+
+ 0x25472274: 7CB62B78 or r22,r5,r5
+ 133: GETL R5, t106
+ 134: PUTL t106, R22
+ 135: INCEIPL $4
+
+ 0x25472278: 92E100AC stw r23,172(r1)
+ 136: GETL R23, t108
+ 137: GETL R1, t110
+ 138: ADDL $0xAC, t110
+ 139: STL t108, (t110)
+ 140: INCEIPL $4
+
+ 0x2547227C: 7C972378 or r23,r4,r4
+ 141: GETL R4, t112
+ 142: PUTL t112, R23
+ 143: INCEIPL $4
+
+ 0x25472280: 930100B0 stw r24,176(r1)
+ 144: GETL R24, t114
+ 145: GETL R1, t116
+ 146: ADDL $0xB0, t116
+ 147: STL t114, (t116)
+ 148: INCEIPL $4
+
+ 0x25472284: 7C781B78 or r24,r3,r3
+ 149: GETL R3, t118
+ 150: PUTL t118, R24
+ 151: INCEIPL $4
+
+ 0x25472288: 932100B4 stw r25,180(r1)
+ 152: GETL R25, t120
+ 153: GETL R1, t122
+ 154: ADDL $0xB4, t122
+ 155: STL t120, (t122)
+ 156: INCEIPL $4
+
+ 0x2547228C: 3B200000 li r25,0
+ 157: MOVL $0x0, t124
+ 158: PUTL t124, R25
+ 159: INCEIPL $4
+
+ 0x25472290: 912E03FC stw r9,1020(r14)
+ 160: GETL R9, t126
+ 161: GETL R14, t128
+ 162: ADDL $0x3FC, t128
+ 163: STL t126, (t128)
+ 164: INCEIPL $4
+
+ 0x25472294: 92210094 stw r17,148(r1)
+ 165: GETL R17, t130
+ 166: GETL R1, t132
+ 167: ADDL $0x94, t132
+ 168: STL t130, (t132)
+ 169: INCEIPL $4
+
+ 0x25472298: 934100B8 stw r26,184(r1)
+ 170: GETL R26, t134
+ 171: GETL R1, t136
+ 172: ADDL $0xB8, t136
+ 173: STL t134, (t136)
+ 174: INCEIPL $4
+
+ 0x2547229C: 936100BC stw r27,188(r1)
+ 175: GETL R27, t138
+ 176: GETL R1, t140
+ 177: ADDL $0xBC, t140
+ 178: STL t138, (t140)
+ 179: INCEIPL $4
+
+ 0x254722A0: 938100C0 stw r28,192(r1)
+ 180: GETL R28, t142
+ 181: GETL R1, t144
+ 182: ADDL $0xC0, t144
+ 183: STL t142, (t144)
+ 184: INCEIPL $4
+
+ 0x254722A4: 93A100C4 stw r29,196(r1)
+ 185: GETL R29, t146
+ 186: GETL R1, t148
+ 187: ADDL $0xC4, t148
+ 188: STL t146, (t148)
+ 189: INCEIPL $4
+
+ 0x254722A8: 910E01B4 stw r8,436(r14)
+ 190: GETL R8, t150
+ 191: GETL R14, t152
+ 192: ADDL $0x1B4, t152
+ 193: STL t150, (t152)
+ 194: INCEIPL $4
+
+ 0x254722AC: 90EE042C stw r7,1068(r14)
+ 195: GETL R7, t154
+ 196: GETL R14, t156
+ 197: ADDL $0x42C, t156
+ 198: STL t154, (t156)
+ 199: INCEIPL $4
+
+ 0x254722B0: 90CE03F8 stw r6,1016(r14)
+ 200: GETL R6, t158
+ 201: GETL R14, t160
+ 202: ADDL $0x3F8, t160
+ 203: STL t158, (t160)
+ 204: INCEIPL $4
+
+ 0x254722B4: 900E0404 stw r0,1028(r14)
+ 205: GETL R0, t162
+ 206: GETL R14, t164
+ 207: ADDL $0x404, t164
+ 208: STL t162, (t164)
+ 209: INCEIPL $4
+
+ 0x254722B8: 917F0038 stw r11,56(r31)
+ 210: GETL R11, t166
+ 211: GETL R31, t168
+ 212: ADDL $0x38, t168
+ 213: STL t166, (t168)
+ 214: INCEIPL $4
+
+ 0x254722BC: 81FE04F4 lwz r15,1268(r30)
+ 215: GETL R30, t170
+ 216: ADDL $0x4F4, t170
+ 217: LDL (t170), t172
+ 218: PUTL t172, R15
+ 219: INCEIPL $4
+
+ 0x254722C0: 813E007C lwz r9,124(r30)
+ 220: GETL R30, t174
+ 221: ADDL $0x7C, t174
+ 222: LDL (t174), t176
+ 223: PUTL t176, R9
+ 224: INCEIPL $4
+
+ 0x254722C4: 419E0008 bc 12,30,0x254722CC
+ 225: Js30o $0x254722CC
+
+
+
+. 144 254721FC 204
+. 93 C1 00 C8 7F C8 02 A6 92 01 00 90 90 01 00 D4 7D 60 00 26 91 C1 00 88 82 1E 04 B4 81 9E 04 B8 81 50 00 00 81 DE 04 C8 2F 8A 00 00 81 3E 00 20 91 61 00 84 81 1E 04 D8 81 6C 00 00 80 FE 04 B0 80 DE 00 1C 80 1E 04 A8 93 E1 00 CC 7C 3F 0B 78 91 E1 00 8C 92 41 00 98 3A 40 00 00 92 61 00 9C 3A 60 00 00 92 81 00 A0 3A 80 00 00 92 A1 00 A4 3A A0 00 00 92 C1 00 A8 7C B6 2B 78 92 E1 00 AC 7C 97 23 78 93 01 00 B0 7C 78 1B 78 93 21 00 B4 3B 20 00 00 91 2E 03 FC 92 21 00 94 93 41 00 B8 93 61 00 BC 93 81 00 C0 93 A1 00 C4 91 0E 01 B4 90 EE 04 2C 90 CE 03 F8 90 0E 04 04 91 7F 00 38 81 FE 04 F4 81 3E 00 7C 41 9E 00 08
+==== BB 145 (0x254722CC) approx BBs exec'd 0 ====
+
+ 0x254722CC: 823E0040 lwz r17,64(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x40, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R17
+ 4: INCEIPL $4
+
+ 0x254722D0: 912F0054 stw r9,84(r15)
+ 5: GETL R9, t4
+ 6: GETL R15, t6
+ 7: ADDL $0x54, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x254722D4: 387F0038 addi r3,r31,56
+ 10: GETL R31, t8
+ 11: ADDL $0x38, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0x254722D8: 4800D951 bl 0x2547FC28
+ 14: MOVL $0x254722DC, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x2547FC28 ($4)
+
+
+
+. 145 254722CC 16
+. 82 3E 00 40 91 2F 00 54 38 7F 00 38 48 00 D9 51
+==== BB 146 _dl_next_ld_env_entry(0x2547FC28) approx BBs exec'd 0 ====
+
+ 0x2547FC28: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547FC2C: 39400000 li r10,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x2547FC30: 81630000 lwz r11,0(r3)
+ 9: GETL R3, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x2547FC34: 812B0000 lwz r9,0(r11)
+ 13: GETL R11, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R9
+ 16: INCEIPL $4
+
+ 0x2547FC38: 2F890000 cmpi cr7,r9,0
+ 17: GETL R9, t14
+ 18: CMP0L t14, t16 (-rSo)
+ 19: ICRFL t16, $0x7, CR
+ 20: INCEIPL $4
+
+ 0x2547FC3C: 419E001C bc 12,30,0x2547FC58
+ 21: Js30o $0x2547FC58
+
+
+
+. 146 2547FC28 24
+. 94 21 FF F0 39 40 00 00 81 63 00 00 81 2B 00 00 2F 89 00 00 41 9E 00 1C
+==== BB 147 (0x2547FC40) approx BBs exec'd 0 ====
+
+ 0x2547FC40: 88090000 lbz r0,0(r9)
+ 0: GETL R9, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547FC44: 2C00004C cmpi cr0,r0,76
+ 4: GETL R0, t4
+ 5: MOVL $0x4C, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547FC48: 4182001C bc 12,2,0x2547FC64
+ 9: Js02o $0x2547FC64
+
+
+
+. 147 2547FC40 12
+. 88 09 00 00 2C 00 00 4C 41 82 00 1C
+==== BB 148 (0x2547FC4C) approx BBs exec'd 0 ====
+
+ 0x2547FC4C: 852B0004 lwzu r9,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R11
+ 3: LDL (t0), t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x2547FC50: 2F890000 cmpi cr7,r9,0
+ 6: GETL R9, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x2547FC54: 409EFFEC bc 4,30,0x2547FC40
+ 10: Jc30o $0x2547FC40
+
+
+
+. 148 2547FC4C 12
+. 85 2B 00 04 2F 89 00 00 40 9E FF EC
+==== BB 149 (0x2547FC64) approx BBs exec'd 0 ====
+
+ 0x2547FC64: 88890001 lbz r4,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547FC68: 2C840044 cmpi cr1,r4,68
+ 5: GETL R4, t4
+ 6: MOVL $0x44, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x2547FC6C: 4086FFE0 bc 4,6,0x2547FC4C
+ 10: Jc06o $0x2547FC4C
+
+
+
+. 149 2547FC64 12
+. 88 89 00 01 2C 84 00 44 40 86 FF E0
+==== BB 150 (0x2547FC70) approx BBs exec'd 0 ====
+
+ 0x2547FC70: 88A90002 lbz r5,2(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x2, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547FC74: 2F05005F cmpi cr6,r5,95
+ 5: GETL R5, t4
+ 6: MOVL $0x5F, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x2547FC78: 409AFFD4 bc 4,26,0x2547FC4C
+ 10: Jc26o $0x2547FC4C
+
+
+
+. 150 2547FC70 12
+. 88 A9 00 02 2F 05 00 5F 40 9A FF D4
+==== BB 151 (0x2547FC7C) approx BBs exec'd 0 ====
+
+ 0x2547FC7C: 38CB0004 addi r6,r11,4
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x2547FC80: 39490003 addi r10,r9,3
+ 4: GETL R9, t2
+ 5: ADDL $0x3, t2
+ 6: PUTL t2, R10
+ 7: INCEIPL $4
+
+ 0x2547FC84: 90C30000 stw r6,0(r3)
+ 8: GETL R6, t4
+ 9: GETL R3, t6
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x2547FC88: 4BFFFFD0 b 0x2547FC58
+ 12: JMPo $0x2547FC58 ($4)
+
+
+
+. 151 2547FC7C 16
+. 38 CB 00 04 39 49 00 03 90 C3 00 00 4B FF FF D0
+==== BB 152 (0x2547FC58) approx BBs exec'd 0 ====
+
+ 0x2547FC58: 7D435378 or r3,r10,r10
+ 0: GETL R10, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547FC5C: 38210010 addi r1,r1,16
+ 3: GETL R1, t2
+ 4: ADDL $0x10, t2
+ 5: PUTL t2, R1
+ 6: INCEIPL $4
+
+ 0x2547FC60: 4E800020 blr
+ 7: GETL LR, t4
+ 8: JMPo-r t4 ($4)
+
+
+
+. 152 2547FC58 12
+. 7D 43 53 78 38 21 00 10 4E 80 00 20
+==== BB 153 (0x254722DC) approx BBs exec'd 0 ====
+
+ 0x254722DC: 7C7D1B79 or. r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254722E0: 41820064 bc 12,2,0x25472344
+ 5: Js02o $0x25472344
+
+
+
+. 153 254722DC 8
+. 7C 7D 1B 79 41 82 00 64
+==== BB 154 (0x254722E4) approx BBs exec'd 0 ====
+
+ 0x254722E4: 881D0000 lbz r0,0(r29)
+ 0: GETL R29, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x254722E8: 39600000 li r11,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R11
+ 6: INCEIPL $4
+
+ 0x254722EC: 7C090379 or. r9,r0,r0
+ 7: GETL R0, t6
+ 8: PUTL t6, R9
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x254722F0: 40A20018 bc 5,2,0x25472308
+ 12: Jc02o $0x25472308
+
+
+
+. 154 254722E4 16
+. 88 1D 00 00 39 60 00 00 7C 09 03 79 40 A2 00 18
+==== BB 155 (0x25472308) approx BBs exec'd 0 ====
+
+ 0x25472308: 2C89003D cmpi cr1,r9,61
+ 0: GETL R9, t0
+ 1: MOVL $0x3D, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x2547230C: 4086FFEC bc 4,6,0x254722F8
+ 5: Jc06o $0x254722F8
+
+
+
+. 155 25472308 8
+. 2C 89 00 3D 40 86 FF EC
+==== BB 156 (0x254722F8) approx BBs exec'd 0 ====
+
+ 0x254722F8: 396B0001 addi r11,r11,1
+ 0: GETL R11, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0x254722FC: 7C1D58AE lbzx r0,r29,r11
+ 4: GETL R11, t2
+ 5: GETL R29, t4
+ 6: ADDL t4, t2
+ 7: LDB (t2), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x25472300: 7C090379 or. r9,r0,r0
+ 10: GETL R0, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25472304: 4182000C bc 12,2,0x25472310
+ 15: Js02o $0x25472310
+
+
+
+. 156 254722F8 16
+. 39 6B 00 01 7C 1D 58 AE 7C 09 03 79 41 82 00 0C
+==== BB 157 (0x25472310) approx BBs exec'd 0 ====
+
+ 0x25472310: 2D80003D cmpi cr3,r0,61
+ 0: GETL R0, t0
+ 1: MOVL $0x3D, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x3, CR
+ 4: INCEIPL $4
+
+ 0x25472314: 408EFFC0 bc 4,14,0x254722D4
+ 5: Jc14o $0x254722D4
+
+
+
+. 157 25472310 8
+. 2D 80 00 3D 40 8E FF C0
+==== BB 158 (0x25472318) approx BBs exec'd 0 ====
+
+ 0x25472318: 380BFFFC addi r0,r11,-4
+ 0: GETL R11, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x2547231C: 2A000010 cmpli cr4,r0,16
+ 4: GETL R0, t2
+ 5: MOVL $0x10, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x25472320: 41B1FFB4 bc 13,17,0x254722D4
+ 9: Js17o $0x254722D4
+
+
+
+. 158 25472318 12
+. 38 0B FF FC 2A 00 00 10 41 B1 FF B4
+==== BB 159 (0x25472324) approx BBs exec'd 0 ====
+
+ 0x25472324: 80BE0080 lwz r5,128(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x80, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25472328: 541A103A rlwinm r26,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R26
+ 8: INCEIPL $4
+
+ 0x2547232C: 7C9A282E lwzx r4,r26,r5
+ 9: GETL R5, t6
+ 10: GETL R26, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0x25472330: 7C642A14 add r3,r4,r5
+ 15: GETL R4, t12
+ 16: GETL R5, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R3
+ 19: INCEIPL $4
+
+ 0x25472334: 7C6903A6 mtctr r3
+ 20: GETL R3, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0x25472338: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+
+. 159 25472324 24
+. 80 BE 00 80 54 1A 10 3A 7C 9A 28 2E 7C 64 2A 14 7C 69 03 A6 4E 80 04 20
+==== BB 160 (0x25473248) approx BBs exec'd 0 ====
+
+ 0x25473248: 809E00C4 lwz r4,196(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xC4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547324C: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25473250: 38A0000C li r5,12
+ 8: MOVL $0xC, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x25473254: 48010045 bl 0x25483298
+ 11: MOVL $0x25473258, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483298 ($4)
+
+
+
+. 160 25473248 16
+. 80 9E 00 C4 7F A3 EB 78 38 A0 00 0C 48 01 00 45
+==== BB 161 memcmp(0x25483298) approx BBs exec'd 0 ====
+
+ 0x25483298: 2B85000F cmpli cr7,r5,15
+ 0: GETL R5, t0
+ 1: MOVL $0xF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x2548329C: 9421FFE0 stwu r1,-32(r1)
+ 5: GETL R1, t6
+ 6: GETL R1, t8
+ 7: ADDL $0xFFFFFFE0, t8
+ 8: PUTL t8, R1
+ 9: STL t6, (t8)
+ 10: INCEIPL $4
+
+ 0x254832A0: 93810010 stw r28,16(r1)
+ 11: GETL R28, t10
+ 12: GETL R1, t12
+ 13: ADDL $0x10, t12
+ 14: STL t10, (t12)
+ 15: INCEIPL $4
+
+ 0x254832A4: 7C6B1B78 or r11,r3,r3
+ 16: GETL R3, t14
+ 17: PUTL t14, R11
+ 18: INCEIPL $4
+
+ 0x254832A8: 93A10014 stw r29,20(r1)
+ 19: GETL R29, t16
+ 20: GETL R1, t18
+ 21: ADDL $0x14, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0x254832AC: 93C10018 stw r30,24(r1)
+ 24: GETL R30, t20
+ 25: GETL R1, t22
+ 26: ADDL $0x18, t22
+ 27: STL t20, (t22)
+ 28: INCEIPL $4
+
+ 0x254832B0: 93E1001C stw r31,28(r1)
+ 29: GETL R31, t24
+ 30: GETL R1, t26
+ 31: ADDL $0x1C, t26
+ 32: STL t24, (t26)
+ 33: INCEIPL $4
+
+ 0x254832B4: 409D00BC bc 4,29,0x25483370
+ 34: Jc29o $0x25483370
+
+
+
+. 161 25483298 32
+. 2B 85 00 0F 94 21 FF E0 93 81 00 10 7C 6B 1B 78 93 A1 00 14 93 C1 00 18 93 E1 00 1C 40 9D 00 BC
+==== BB 162 (0x25483370) approx BBs exec'd 0 ====
+
+ 0x25483370: 2C050000 cmpi cr0,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25483374: 41820024 bc 12,2,0x25483398
+ 4: Js02o $0x25483398
+
+
+
+. 162 25483370 8
+. 2C 05 00 00 41 82 00 24
+==== BB 163 (0x25483378) approx BBs exec'd 0 ====
+
+ 0x25483378: 898B0000 lbz r12,0(r11)
+ 0: GETL R11, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R12
+ 3: INCEIPL $4
+
+ 0x2548337C: 396B0001 addi r11,r11,1
+ 4: GETL R11, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x25483380: 8BA40000 lbz r29,0(r4)
+ 8: GETL R4, t6
+ 9: LDB (t6), t8
+ 10: PUTL t8, R29
+ 11: INCEIPL $4
+
+ 0x25483384: 38840001 addi r4,r4,1
+ 12: GETL R4, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0x25483388: 7C7D6051 subf. r3,r29,r12
+ 16: GETL R29, t12
+ 17: GETL R12, t14
+ 18: SUBL t12, t14
+ 19: PUTL t14, R3
+ 20: CMP0L t14, t16 (-rSo)
+ 21: ICRFL t16, $0x0, CR
+ 22: INCEIPL $4
+
+ 0x2548338C: 40820010 bc 4,2,0x2548339C
+ 23: Jc02o $0x2548339C
+
+
+
+. 163 25483378 24
+. 89 8B 00 00 39 6B 00 01 8B A4 00 00 38 84 00 01 7C 7D 60 51 40 82 00 10
+==== BB 164 (0x25483390) approx BBs exec'd 0 ====
+
+ 0x25483390: 34A5FFFF addic. r5,r5,-1
+ 0: GETL R5, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R5
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25483394: 4082FFE4 bc 4,2,0x25483378
+ 6: Jc02o $0x25483378
+
+
+
+. 164 25483390 8
+. 34 A5 FF FF 40 82 FF E4
+==== BB 165 (0x25483398) approx BBs exec'd 0 ====
+
+ 0x25483398: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2548339C: 83810010 lwz r28,16(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x10, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x254833A0: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x254833A4: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0x254833A8: 83E1001C lwz r31,28(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x1C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R31
+ 22: INCEIPL $4
+
+ 0x254833AC: 38210020 addi r1,r1,32
+ 23: GETL R1, t18
+ 24: ADDL $0x20, t18
+ 25: PUTL t18, R1
+ 26: INCEIPL $4
+
+ 0x254833B0: 4E800020 blr
+ 27: GETL LR, t20
+ 28: JMPo-r t20 ($4)
+
+
+
+. 165 25483398 28
+. 38 60 00 00 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 166 (0x25473258) approx BBs exec'd 0 ====
+
+ 0x25473258: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547325C: 409E0428 bc 4,30,0x25473684
+ 4: Jc30o $0x25473684
+
+
+
+. 166 25473258 8
+. 2F 83 00 00 40 9E 04 28
+==== BB 167 (0x25473260) approx BBs exec'd 0 ====
+
+ 0x25473260: 813E004C lwz r9,76(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25473264: 381D000D addi r0,r29,13
+ 5: GETL R29, t4
+ 6: ADDL $0xD, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25473268: 90090000 stw r0,0(r9)
+ 9: GETL R0, t6
+ 10: GETL R9, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547326C: 4BFFF068 b 0x254722D4
+ 13: JMPo $0x254722D4 ($4)
+
+
+
+. 167 25473260 16
+. 81 3E 00 4C 38 1D 00 0D 90 09 00 00 4B FF F0 68
+==== BB 168 (0x254722D4) approx BBs exec'd 0 ====
+
+ 0x254722D4: 387F0038 addi r3,r31,56
+ 0: GETL R31, t0
+ 1: ADDL $0x38, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x254722D8: 4800D951 bl 0x2547FC28
+ 4: MOVL $0x254722DC, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0x2547FC28 ($4)
+
+
+
+. 168 254722D4 8
+. 38 7F 00 38 48 00 D9 51
+==== BB 169 (0x25473218) approx BBs exec'd 0 ====
+
+ 0x25473218: 809E00C0 lwz r4,192(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xC0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547321C: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25473220: 38A00007 li r5,7
+ 8: MOVL $0x7, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x25473224: 48010075 bl 0x25483298
+ 11: MOVL $0x25473228, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483298 ($4)
+
+
+
+. 169 25473218 16
+. 80 9E 00 C0 7F A3 EB 78 38 A0 00 07 48 01 00 75
+==== BB 170 (0x2548339C) approx BBs exec'd 0 ====
+
+ 0x2548339C: 83810010 lwz r28,16(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x254833A0: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x254833A4: 83C10018 lwz r30,24(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R30
+ 14: INCEIPL $4
+
+ 0x254833A8: 83E1001C lwz r31,28(r1)
+ 15: GETL R1, t12
+ 16: ADDL $0x1C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R31
+ 19: INCEIPL $4
+
+ 0x254833AC: 38210020 addi r1,r1,32
+ 20: GETL R1, t16
+ 21: ADDL $0x20, t16
+ 22: PUTL t16, R1
+ 23: INCEIPL $4
+
+ 0x254833B0: 4E800020 blr
+ 24: GETL LR, t18
+ 25: JMPo-r t18 ($4)
+
+
+
+. 170 2548339C 24
+. 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 171 (0x25473228) approx BBs exec'd 0 ====
+
+ 0x25473228: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547322C: 4086048C bc 4,6,0x254736B8
+ 4: Jc06o $0x254736B8
+
+
+
+. 171 25473228 8
+. 2C 83 00 00 40 86 04 8C
+==== BB 172 (0x254736B8) approx BBs exec'd 0 ====
+
+ 0x254736B8: 809E00E0 lwz r4,224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xE0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254736BC: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254736C0: 38A00007 li r5,7
+ 8: MOVL $0x7, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x254736C4: 4800FBD5 bl 0x25483298
+ 11: MOVL $0x254736C8, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483298 ($4)
+
+
+
+. 172 254736B8 16
+. 80 9E 00 E0 7F A3 EB 78 38 A0 00 07 48 00 FB D5
+==== BB 173 (0x254736C8) approx BBs exec'd 0 ====
+
+ 0x254736C8: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x254736CC: 40820088 bc 4,2,0x25473754
+ 4: Jc02o $0x25473754
+
+
+
+. 173 254736C8 8
+. 2C 03 00 00 40 82 00 88
+==== BB 174 (0x254736D0) approx BBs exec'd 0 ====
+
+ 0x254736D0: 38FD0008 addi r7,r29,8
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: PUTL t0, R7
+ 3: INCEIPL $4
+
+ 0x254736D4: 90F10000 stw r7,0(r17)
+ 4: GETL R7, t2
+ 5: GETL R17, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x254736D8: 4BFFEBFC b 0x254722D4
+ 8: JMPo $0x254722D4 ($4)
+
+
+
+. 174 254736D0 12
+. 38 FD 00 08 90 F1 00 00 4B FF EB FC
+==== BB 175 (0x25472344) approx BBs exec'd 0 ====
+
+ 0x25472344: 83700000 lwz r27,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R27
+ 3: INCEIPL $4
+
+ 0x25472348: 933F0030 stw r25,48(r31)
+ 4: GETL R25, t4
+ 5: GETL R31, t6
+ 6: ADDL $0x30, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547234C: 2D9B0000 cmpi cr3,r27,0
+ 9: GETL R27, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x3, CR
+ 12: INCEIPL $4
+
+ 0x25472350: 408E128C bc 4,14,0x254735DC
+ 13: Jc14o $0x254735DC
+
+
+
+. 175 25472344 16
+. 83 70 00 00 93 3F 00 30 2D 9B 00 00 40 8E 12 8C
+==== BB 176 (0x25472354) approx BBs exec'd 0 ====
+
+ 0x25472354: 813E0034 lwz r9,52(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25472358: 3014FFFF addic r0,r20,-1
+ 5: GETL R20, t4
+ 6: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547235C: 7F40A110 subfe r26,r0,r20
+ 9: GETL R0, t6
+ 10: GETL R20, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R26
+ 13: INCEIPL $4
+
+ 0x25472360: 83A90000 lwz r29,0(r9)
+ 14: GETL R9, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0x25472364: 313DFFFF addic r9,r29,-1
+ 18: GETL R29, t14
+ 19: ADCL $0xFFFFFFFF, t14 (-wCa)
+ 20: PUTL t14, R9
+ 21: INCEIPL $4
+
+ 0x25472368: 7F89E910 subfe r28,r9,r29
+ 22: GETL R9, t16
+ 23: GETL R29, t18
+ 24: SBBL t16, t18 (-rCa-wCa)
+ 25: PUTL t18, R28
+ 26: INCEIPL $4
+
+ 0x2547236C: 7F80D039 and. r0,r28,r26
+ 27: GETL R28, t20
+ 28: GETL R26, t22
+ 29: ANDL t20, t22
+ 30: PUTL t22, R0
+ 31: CMP0L t22, t24 (-rSo)
+ 32: ICRFL t24, $0x0, CR
+ 33: INCEIPL $4
+
+ 0x25472370: 40820B58 bc 4,2,0x25472EC8
+ 34: Jc02o $0x25472EC8
+
+
+
+. 176 25472354 32
+. 81 3E 00 34 30 14 FF FF 7F 40 A1 10 83 A9 00 00 31 3D FF FF 7F 89 E9 10 7F 80 D0 39 40 82 0B 58
+==== BB 177 (0x25472374) approx BBs exec'd 0 ====
+
+ 0x25472374: 83560000 lwz r26,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R26
+ 3: INCEIPL $4
+
+ 0x25472378: 80BE04E0 lwz r5,1248(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x4E0, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R5
+ 8: INCEIPL $4
+
+ 0x2547237C: 7D9A2800 cmp cr3,r26,r5
+ 9: GETL R26, t8
+ 10: GETL R5, t10
+ 11: CMPL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x3, CR
+ 13: INCEIPL $4
+
+ 0x25472380: 418E0940 bc 12,14,0x25472CC0
+ 14: Js14o $0x25472CC0
+
+
+
+. 177 25472374 16
+. 83 56 00 00 80 BE 04 E0 7D 9A 28 00 41 8E 09 40
+==== BB 178 (0x25472384) approx BBs exec'd 0 ====
+
+ 0x25472384: 807E0084 lwz r3,132(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25472388: 38A00000 li r5,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547238C: 38C00000 li r6,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0x25472390: 38E00000 li r7,0
+ 11: MOVL $0x0, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0x25472394: 7C641B78 or r4,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R4
+ 16: INCEIPL $4
+
+ 0x25472398: 39000000 li r8,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R8
+ 19: INCEIPL $4
+
+ 0x2547239C: 48006D59 bl 0x254790F4
+ 20: MOVL $0x254723A0, t14
+ 21: PUTL t14, LR
+ 22: JMPo-c $0x254790F4 ($4)
+
+
+
+. 178 25472384 28
+. 80 7E 00 84 38 A0 00 00 38 C0 00 00 38 E0 00 00 7C 64 1B 78 39 00 00 00 48 00 6D 59
+==== BB 179 _dl_new_object(0x254790F4) approx BBs exec'd 0 ====
+
+ 0x254790F4: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x254790F8: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254790FC: 4801DF05 bl 0x25497000
+ 9: MOVL $0x25479100, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 179 254790F4 12
+. 94 21 FF D0 7C 08 02 A6 48 01 DF 05
+==== BB 180 (0x25479100) approx BBs exec'd 0 ====
+
+ 0x25479100: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25479104: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25479108: 92C10008 stw r22,8(r1)
+ 8: GETL R22, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x8, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547910C: 92E1000C stw r23,12(r1)
+ 13: GETL R23, t10
+ 14: GETL R1, t12
+ 15: ADDL $0xC, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25479110: 7C771B78 or r23,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R23
+ 20: INCEIPL $4
+
+ 0x25479114: 93010010 stw r24,16(r1)
+ 21: GETL R24, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x10, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25479118: 7C832378 or r3,r4,r4
+ 26: GETL R4, t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0x2547911C: 93210014 stw r25,20(r1)
+ 29: GETL R25, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x14, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0x25479120: 7CB82B78 or r24,r5,r5
+ 34: GETL R5, t26
+ 35: PUTL t26, R24
+ 36: INCEIPL $4
+
+ 0x25479124: 93410018 stw r26,24(r1)
+ 37: GETL R26, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x18, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0x25479128: 7CF63B78 or r22,r7,r7
+ 42: GETL R7, t32
+ 43: PUTL t32, R22
+ 44: INCEIPL $4
+
+ 0x2547912C: 9361001C stw r27,28(r1)
+ 45: GETL R27, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x1C, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0x25479130: 7C9A2378 or r26,r4,r4
+ 50: GETL R4, t38
+ 51: PUTL t38, R26
+ 52: INCEIPL $4
+
+ 0x25479134: 93810020 stw r28,32(r1)
+ 53: GETL R28, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x20, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x25479138: 7D194378 or r25,r8,r8
+ 58: GETL R8, t44
+ 59: PUTL t44, R25
+ 60: INCEIPL $4
+
+ 0x2547913C: 93E1002C stw r31,44(r1)
+ 61: GETL R31, t46
+ 62: GETL R1, t48
+ 63: ADDL $0x2C, t48
+ 64: STL t46, (t48)
+ 65: INCEIPL $4
+
+ 0x25479140: 7CDC3378 or r28,r6,r6
+ 66: GETL R6, t50
+ 67: PUTL t50, R28
+ 68: INCEIPL $4
+
+ 0x25479144: 90010034 stw r0,52(r1)
+ 69: GETL R0, t52
+ 70: GETL R1, t54
+ 71: ADDL $0x34, t54
+ 72: STL t52, (t54)
+ 73: INCEIPL $4
+
+ 0x25479148: 93A10024 stw r29,36(r1)
+ 74: GETL R29, t56
+ 75: GETL R1, t58
+ 76: ADDL $0x24, t58
+ 77: STL t56, (t58)
+ 78: INCEIPL $4
+
+ 0x2547914C: 48009E85 bl 0x25482FD0
+ 79: MOVL $0x25479150, t60
+ 80: PUTL t60, LR
+ 81: JMPo-c $0x25482FD0 ($4)
+
+
+
+. 180 25479100 80
+. 93 C1 00 28 7F C8 02 A6 92 C1 00 08 92 E1 00 0C 7C 77 1B 78 93 01 00 10 7C 83 23 78 93 21 00 14 7C B8 2B 78 93 41 00 18 7C F6 3B 78 93 61 00 1C 7C 9A 23 78 93 81 00 20 7D 19 43 78 93 E1 00 2C 7C DC 33 78 90 01 00 34 93 A1 00 24 48 00 9E 85
+==== BB 181 strlen(0x25482FD0) approx BBs exec'd 0 ====
+
+ 0x25482FD0: 5464003A rlwinm r4,r3,0,0,29
+ 0: GETL R3, t0
+ 1: ANDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x25482FD4: 3CE07F7F lis r7,32639
+ 4: MOVL $0x7F7F0000, t2
+ 5: PUTL t2, R7
+ 6: INCEIPL $4
+
+ 0x25482FD8: 54651EF8 rlwinm r5,r3,3,27,28
+ 7: GETL R3, t4
+ 8: ROLL $0x3, t4
+ 9: ANDL $0x18, t4
+ 10: PUTL t4, R5
+ 11: INCEIPL $4
+
+ 0x25482FDC: 81040000 lwz r8,0(r4)
+ 12: GETL R4, t6
+ 13: LDL (t6), t8
+ 14: PUTL t8, R8
+ 15: INCEIPL $4
+
+ 0x25482FE0: 3920FFFF li r9,-1
+ 16: MOVL $0xFFFFFFFF, t10
+ 17: PUTL t10, R9
+ 18: INCEIPL $4
+
+ 0x25482FE4: 38E77F7F addi r7,r7,32639
+ 19: MOVL $0x7F7F7F7F, t12
+ 20: PUTL t12, R7
+ 21: INCEIPL $4
+
+ 0x25482FE8: 7D292C30 srw r9,r9,r5
+ 22: GETL R9, t16
+ 23: GETL R5, t14
+ 24: SHRL t14, t16
+ 25: PUTL t16, R9
+ 26: INCEIPL $4
+
+ 0x25482FEC: 7CE04038 and r0,r7,r8
+ 27: GETL R7, t18
+ 28: GETL R8, t20
+ 29: ANDL t18, t20
+ 30: PUTL t20, R0
+ 31: INCEIPL $4
+
+ 0x25482FF0: 7CEA4378 or r10,r7,r8
+ 32: GETL R7, t22
+ 33: GETL R8, t24
+ 34: ORL t24, t22
+ 35: PUTL t22, R10
+ 36: INCEIPL $4
+
+ 0x25482FF4: 7C003A14 add r0,r0,r7
+ 37: GETL R0, t26
+ 38: GETL R7, t28
+ 39: ADDL t26, t28
+ 40: PUTL t28, R0
+ 41: INCEIPL $4
+
+ 0x25482FF8: 7D4000F8 nor r0,r10,r0
+ 42: GETL R10, t30
+ 43: GETL R0, t32
+ 44: ORL t32, t30
+ 45: NOTL t30
+ 46: PUTL t30, R0
+ 47: INCEIPL $4
+
+ 0x25482FFC: 7C084839 and. r8,r0,r9
+ 48: GETL R0, t34
+ 49: GETL R9, t36
+ 50: ANDL t34, t36
+ 51: PUTL t36, R8
+ 52: CMP0L t36, t38 (-rSo)
+ 53: ICRFL t38, $0x0, CR
+ 54: INCEIPL $4
+
+ 0x25483000: 7C601120 mtcrf 0x1,r3
+ 55: GETL R3, t40
+ 56: ICRFL t40, $0x7, CR
+ 57: INCEIPL $4
+
+ 0x25483004: 40820070 bc 4,2,0x25483074
+ 58: Jc02o $0x25483074
+
+
+
+. 181 25482FD0 56
+. 54 64 00 3A 3C E0 7F 7F 54 65 1E F8 81 04 00 00 39 20 FF FF 38 E7 7F 7F 7D 29 2C 30 7C E0 40 38 7C EA 43 78 7C 00 3A 14 7D 40 00 F8 7C 08 48 39 7C 60 11 20 40 82 00 70
+==== BB 182 (0x25483074) approx BBs exec'd 0 ====
+
+ 0x25483074: 7D0B0034 cntlzw r11,r8
+ 0: GETL R8, t0
+ 1: CNTLZL t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0x25483078: 7C032050 subf r0,r3,r4
+ 4: GETL R3, t2
+ 5: GETL R4, t4
+ 6: SUBL t2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2548307C: 556BE8FE rlwinm r11,r11,29,3,31
+ 9: GETL R11, t6
+ 10: SHRL $0x3, t6
+ 11: PUTL t6, R11
+ 12: INCEIPL $4
+
+ 0x25483080: 7C605A14 add r3,r0,r11
+ 13: GETL R0, t8
+ 14: GETL R11, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0x25483084: 4E800020 blr
+ 18: GETL LR, t12
+ 19: JMPo-r t12 ($4)
+
+
+
+. 182 25483074 20
+. 7D 0B 00 34 7C 03 20 50 55 6B E8 FE 7C 60 5A 14 4E 80 00 20
+==== BB 183 (0x25479150) approx BBs exec'd 0 ====
+
+ 0x25479150: 38800001 li r4,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x25479154: 7C691B78 or r9,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x25479158: 3863024D addi r3,r3,589
+ 6: GETL R3, t4
+ 7: ADDL $0x24D, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0x2547915C: 3B690001 addi r27,r9,1
+ 10: GETL R9, t6
+ 11: ADDL $0x1, t6
+ 12: PUTL t6, R27
+ 13: INCEIPL $4
+
+ 0x25479160: 4801E8CD bl 0x25497A2C
+ 14: MOVL $0x25479164, t8
+ 15: PUTL t8, LR
+ 16: JMPo-c $0x25497A2C ($4)
+
+
+
+. 183 25479150 20
+. 38 80 00 01 7C 69 1B 78 38 63 02 4D 3B 69 00 01 48 01 E8 CD
+==== BB 184 (0x25497A2C) approx BBs exec'd 0 ====
+
+ 0x25497A2C: 4BFE848C b 0x2547FEB8
+ 0: JMPo $0x2547FEB8 ($4)
+
+
+
+. 184 25497A2C 4
+. 4B FE 84 8C
+==== BB 185 calloc(0x2547FEB8) approx BBs exec'd 0 ====
+
+ 0x2547FEB8: 7C6321D6 mullw r3,r3,r4
+ 0: GETL R3, t0
+ 1: GETL R4, t2
+ 2: MULL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547FEBC: 7CA802A6 mflr r5
+ 5: GETL LR, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547FEC0: 9421FFF0 stwu r1,-16(r1)
+ 8: GETL R1, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xFFFFFFF0, t8
+ 11: PUTL t8, R1
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547FEC4: 90A10014 stw r5,20(r1)
+ 14: GETL R5, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x14, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x2547FEC8: 48017B5D bl 0x25497A24
+ 19: MOVL $0x2547FECC, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x25497A24 ($4)
+
+
+
+. 185 2547FEB8 20
+. 7C 63 21 D6 7C A8 02 A6 94 21 FF F0 90 A1 00 14 48 01 7B 5D
+==== BB 186 (0x25497A24) approx BBs exec'd 0 ====
+
+ 0x25497A24: 4BFE846C b 0x2547FE90
+ 0: JMPo $0x2547FE90 ($4)
+
+
+
+. 186 25497A24 4
+. 4B FE 84 6C
+==== BB 187 malloc(0x2547FE90) approx BBs exec'd 0 ====
+
+ 0x2547FE90: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547FE94: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547FE98: 90810014 stw r4,20(r1)
+ 9: GETL R4, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547FE9C: 7C641B78 or r4,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R4
+ 16: INCEIPL $4
+
+ 0x2547FEA0: 38600008 li r3,8
+ 17: MOVL $0x8, t12
+ 18: PUTL t12, R3
+ 19: INCEIPL $4
+
+ 0x2547FEA4: 48017B79 bl 0x25497A1C
+ 20: MOVL $0x2547FEA8, t14
+ 21: PUTL t14, LR
+ 22: JMPo-c $0x25497A1C ($4)
+
+
+
+. 187 2547FE90 24
+. 7C 88 02 A6 94 21 FF F0 90 81 00 14 7C 64 1B 78 38 60 00 08 48 01 7B 79
+==== BB 188 (0x25497A1C) approx BBs exec'd 0 ====
+
+ 0x25497A1C: 4BFE832C b 0x2547FD48
+ 0: JMPo $0x2547FD48 ($4)
+
+
+
+. 188 25497A1C 4
+. 4B FE 83 2C
+==== BB 189 __libc_memalign(0x2547FD48) approx BBs exec'd 0 ====
+
+ 0x2547FD48: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547FD4C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547FD50: 480172B1 bl 0x25497000
+ 9: MOVL $0x2547FD54, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 189 2547FD48 12
+. 94 21 FF E0 7C 08 02 A6 48 01 72 B1
+==== BB 190 (0x2547FD54) approx BBs exec'd 0 ====
+
+ 0x2547FD54: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547FD58: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547FD5C: 9361000C stw r27,12(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547FD60: 90010024 stw r0,36(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547FD64: 7C6A1B78 or r10,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R10
+ 20: INCEIPL $4
+
+ 0x2547FD68: 93810010 stw r28,16(r1)
+ 21: GETL R28, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x10, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547FD6C: 38A00003 li r5,3
+ 26: MOVL $0x3, t20
+ 27: PUTL t20, R5
+ 28: INCEIPL $4
+
+ 0x2547FD70: 837E0418 lwz r27,1048(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x418, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R27
+ 33: INCEIPL $4
+
+ 0x2547FD74: 38C00022 li r6,34
+ 34: MOVL $0x22, t26
+ 35: PUTL t26, R6
+ 36: INCEIPL $4
+
+ 0x2547FD78: 93A10014 stw r29,20(r1)
+ 37: GETL R29, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x14, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0x2547FD7C: 38E0FFFF li r7,-1
+ 42: MOVL $0xFFFFFFFF, t32
+ 43: PUTL t32, R7
+ 44: INCEIPL $4
+
+ 0x2547FD80: 817B0000 lwz r11,0(r27)
+ 45: GETL R27, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R11
+ 48: INCEIPL $4
+
+ 0x2547FD84: 7FA300D0 neg r29,r3
+ 49: GETL R3, t38
+ 50: NEGL t38
+ 51: PUTL t38, R29
+ 52: INCEIPL $4
+
+ 0x2547FD88: 93E1001C stw r31,28(r1)
+ 53: GETL R31, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x1C, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x2547FD8C: 39000000 li r8,0
+ 58: MOVL $0x0, t44
+ 59: PUTL t44, R8
+ 60: INCEIPL $4
+
+ 0x2547FD90: 2F8B0000 cmpi cr7,r11,0
+ 61: GETL R11, t46
+ 62: CMP0L t46, t48 (-rSo)
+ 63: ICRFL t48, $0x7, CR
+ 64: INCEIPL $4
+
+ 0x2547FD94: 819E0500 lwz r12,1280(r30)
+ 65: GETL R30, t50
+ 66: ADDL $0x500, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R12
+ 69: INCEIPL $4
+
+ 0x2547FD98: 38600000 li r3,0
+ 70: MOVL $0x0, t54
+ 71: PUTL t54, R3
+ 72: INCEIPL $4
+
+ 0x2547FD9C: 7C9C2378 or r28,r4,r4
+ 73: GETL R4, t56
+ 74: PUTL t56, R28
+ 75: INCEIPL $4
+
+ 0x2547FDA0: 83FE041C lwz r31,1052(r30)
+ 76: GETL R30, t58
+ 77: ADDL $0x41C, t58
+ 78: LDL (t58), t60
+ 79: PUTL t60, R31
+ 80: INCEIPL $4
+
+ 0x2547FDA4: 409E0024 bc 4,30,0x2547FDC8
+ 81: Jc30o $0x2547FDC8
+
+
+
+. 190 2547FD54 84
+. 93 C1 00 18 7F C8 02 A6 93 61 00 0C 90 01 00 24 7C 6A 1B 78 93 81 00 10 38 A0 00 03 83 7E 04 18 38 C0 00 22 93 A1 00 14 38 E0 FF FF 81 7B 00 00 7F A3 00 D0 93 E1 00 1C 39 00 00 00 2F 8B 00 00 81 9E 05 00 38 60 00 00 7C 9C 23 78 83 FE 04 1C 40 9E 00 24
+==== BB 191 (0x2547FDA8) approx BBs exec'd 0 ====
+
+ 0x2547FDA8: 813E04F4 lwz r9,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547FDAC: 919F0000 stw r12,0(r31)
+ 5: GETL R12, t4
+ 6: GETL R31, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547FDB0: 81690004 lwz r11,4(r9)
+ 9: GETL R9, t8
+ 10: ADDL $0x4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0x2547FDB4: 7C8B6214 add r4,r11,r12
+ 14: GETL R11, t12
+ 15: GETL R12, t14
+ 16: ADDL t12, t14
+ 17: PUTL t14, R4
+ 18: INCEIPL $4
+
+ 0x2547FDB8: 3924FFFF addi r9,r4,-1
+ 19: GETL R4, t16
+ 20: ADDL $0xFFFFFFFF, t16
+ 21: PUTL t16, R9
+ 22: INCEIPL $4
+
+ 0x2547FDBC: 7C8B00D0 neg r4,r11
+ 23: GETL R11, t18
+ 24: NEGL t18
+ 25: PUTL t18, R4
+ 26: INCEIPL $4
+
+ 0x2547FDC0: 7D2B2038 and r11,r9,r4
+ 27: GETL R9, t20
+ 28: GETL R4, t22
+ 29: ANDL t20, t22
+ 30: PUTL t22, R11
+ 31: INCEIPL $4
+
+ 0x2547FDC4: 917B0000 stw r11,0(r27)
+ 32: GETL R11, t24
+ 33: GETL R27, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547FDC8: 813F0000 lwz r9,0(r31)
+ 36: GETL R31, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R9
+ 39: INCEIPL $4
+
+ 0x2547FDCC: 7C895214 add r4,r9,r10
+ 40: GETL R9, t32
+ 41: GETL R10, t34
+ 42: ADDL t32, t34
+ 43: PUTL t34, R4
+ 44: INCEIPL $4
+
+ 0x2547FDD0: 3804FFFF addi r0,r4,-1
+ 45: GETL R4, t36
+ 46: ADDL $0xFFFFFFFF, t36
+ 47: PUTL t36, R0
+ 48: INCEIPL $4
+
+ 0x2547FDD4: 7C0AE838 and r10,r0,r29
+ 49: GETL R0, t38
+ 50: GETL R29, t40
+ 51: ANDL t38, t40
+ 52: PUTL t40, R10
+ 53: INCEIPL $4
+
+ 0x2547FDD8: 7D8AE214 add r12,r10,r28
+ 54: GETL R10, t42
+ 55: GETL R28, t44
+ 56: ADDL t42, t44
+ 57: PUTL t44, R12
+ 58: INCEIPL $4
+
+ 0x2547FDDC: 915F0000 stw r10,0(r31)
+ 59: GETL R10, t46
+ 60: GETL R31, t48
+ 61: STL t46, (t48)
+ 62: INCEIPL $4
+
+ 0x2547FDE0: 7C0C5840 cmpl cr0,r12,r11
+ 63: GETL R12, t50
+ 64: GETL R11, t52
+ 65: CMPUL t50, t52, t54 (-rSo)
+ 66: ICRFL t54, $0x0, CR
+ 67: INCEIPL $4
+
+ 0x2547FDE4: 4080003C bc 4,0,0x2547FE20
+ 68: Jc00o $0x2547FE20
+
+
+
+. 191 2547FDA8 64
+. 81 3E 04 F4 91 9F 00 00 81 69 00 04 7C 8B 62 14 39 24 FF FF 7C 8B 00 D0 7D 2B 20 38 91 7B 00 00 81 3F 00 00 7C 89 52 14 38 04 FF FF 7C 0A E8 38 7D 8A E2 14 91 5F 00 00 7C 0C 58 40 40 80 00 3C
+==== BB 192 (0x2547FDE8) approx BBs exec'd 0 ====
+
+ 0x2547FDE8: 807F0000 lwz r3,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x2547FDEC: 80C10024 lwz r6,36(r1)
+ 4: GETL R1, t4
+ 5: ADDL $0x24, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x2547FDF0: 7D03E214 add r8,r3,r28
+ 9: GETL R3, t8
+ 10: GETL R28, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R8
+ 13: INCEIPL $4
+
+ 0x2547FDF4: 80FE0420 lwz r7,1056(r30)
+ 14: GETL R30, t12
+ 15: ADDL $0x420, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R7
+ 18: INCEIPL $4
+
+ 0x2547FDF8: 911F0000 stw r8,0(r31)
+ 19: GETL R8, t16
+ 20: GETL R31, t18
+ 21: STL t16, (t18)
+ 22: INCEIPL $4
+
+ 0x2547FDFC: 7CC803A6 mtlr r6
+ 23: GETL R6, t20
+ 24: PUTL t20, LR
+ 25: INCEIPL $4
+
+ 0x2547FE00: 8361000C lwz r27,12(r1)
+ 26: GETL R1, t22
+ 27: ADDL $0xC, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R27
+ 30: INCEIPL $4
+
+ 0x2547FE04: 83810010 lwz r28,16(r1)
+ 31: GETL R1, t26
+ 32: ADDL $0x10, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R28
+ 35: INCEIPL $4
+
+ 0x2547FE08: 83A10014 lwz r29,20(r1)
+ 36: GETL R1, t30
+ 37: ADDL $0x14, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R29
+ 40: INCEIPL $4
+
+ 0x2547FE0C: 83C10018 lwz r30,24(r1)
+ 41: GETL R1, t34
+ 42: ADDL $0x18, t34
+ 43: LDL (t34), t36
+ 44: PUTL t36, R30
+ 45: INCEIPL $4
+
+ 0x2547FE10: 83E1001C lwz r31,28(r1)
+ 46: GETL R1, t38
+ 47: ADDL $0x1C, t38
+ 48: LDL (t38), t40
+ 49: PUTL t40, R31
+ 50: INCEIPL $4
+
+ 0x2547FE14: 38210020 addi r1,r1,32
+ 51: GETL R1, t42
+ 52: ADDL $0x20, t42
+ 53: PUTL t42, R1
+ 54: INCEIPL $4
+
+ 0x2547FE18: 90670000 stw r3,0(r7)
+ 55: GETL R3, t44
+ 56: GETL R7, t46
+ 57: STL t44, (t46)
+ 58: INCEIPL $4
+
+ 0x2547FE1C: 4E800020 blr
+ 59: GETL LR, t48
+ 60: JMPo-r t48 ($4)
+
+
+
+. 192 2547FDE8 56
+. 80 7F 00 00 80 C1 00 24 7D 03 E2 14 80 FE 04 20 91 1F 00 00 7C C8 03 A6 83 61 00 0C 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 90 67 00 00 4E 80 00 20
+==== BB 193 (0x2547FEA8) approx BBs exec'd 0 ====
+
+ 0x2547FEA8: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547FEAC: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x2547FEB0: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x2547FEB4: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 193 2547FEA8 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 194 (0x2547FECC) approx BBs exec'd 0 ====
+
+ 0x2547FECC: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547FED0: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x2547FED4: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x2547FED8: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 194 2547FECC 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 195 (0x25479164) approx BBs exec'd 0 ====
+
+ 0x25479164: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25479168: 38600000 li r3,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547916C: 41820174 bc 12,2,0x254792E0
+ 8: Js02o $0x254792E0
+
+
+
+. 195 25479164 12
+. 7C 7F 1B 79 38 60 00 00 41 82 01 74
+==== BB 196 (0x25479170) approx BBs exec'd 0 ====
+
+ 0x25479170: 3BBF0240 addi r29,r31,576
+ 0: GETL R31, t0
+ 1: ADDL $0x240, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x25479174: 7F44D378 or r4,r26,r26
+ 4: GETL R26, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0x25479178: 7F65DB78 or r5,r27,r27
+ 7: GETL R27, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0x2547917C: 93FF0014 stw r31,20(r31)
+ 10: GETL R31, t6
+ 11: GETL R31, t8
+ 12: ADDL $0x14, t8
+ 13: STL t6, (t8)
+ 14: INCEIPL $4
+
+ 0x25479180: 93BF001C stw r29,28(r31)
+ 15: GETL R29, t10
+ 16: GETL R31, t12
+ 17: ADDL $0x1C, t12
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0x25479184: 387F024C addi r3,r31,588
+ 20: GETL R31, t14
+ 21: ADDL $0x24C, t14
+ 22: PUTL t14, R3
+ 23: INCEIPL $4
+
+ 0x25479188: 4800AA59 bl 0x25483BE0
+ 24: MOVL $0x2547918C, t16
+ 25: PUTL t16, LR
+ 26: JMPo-c $0x25483BE0 ($4)
+
+
+
+. 196 25479170 28
+. 3B BF 02 40 7F 44 D3 78 7F 65 DB 78 93 FF 00 14 93 BF 00 1C 38 7F 02 4C 48 00 AA 59
+==== BB 197 (0x25483C68) approx BBs exec'd 0 ====
+
+ 0x25483C68: 2C850000 cmpi cr1,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x25483C6C: 4186001C bc 12,6,0x25483C88
+ 4: Js06o $0x25483C88
+
+
+
+. 197 25483C68 8
+. 2C 85 00 00 41 86 00 1C
+==== BB 198 (0x25483C70) approx BBs exec'd 0 ====
+
+ 0x25483C70: 7CA903A6 mtctr r5
+ 0: GETL R5, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x25483C74: 88FD0000 lbz r7,0(r29)
+ 3: GETL R29, t2
+ 4: LDB (t2), t4
+ 5: PUTL t4, R7
+ 6: INCEIPL $4
+
+ 0x25483C78: 3BBD0001 addi r29,r29,1
+ 7: GETL R29, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R29
+ 10: INCEIPL $4
+
+ 0x25483C7C: 98FF0000 stb r7,0(r31)
+ 11: GETL R7, t8
+ 12: GETL R31, t10
+ 13: STB t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25483C80: 3BFF0001 addi r31,r31,1
+ 15: GETL R31, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R31
+ 18: INCEIPL $4
+
+ 0x25483C84: 4200FFF0 bc 16,0,0x25483C74
+ 19: GETL CTR, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, CTR
+ 22: JIFZL t14, $0x25483C88
+ 23: JMPo $0x25483C74 ($4)
+
+
+
+. 198 25483C70 24
+. 7C A9 03 A6 88 FD 00 00 3B BD 00 01 98 FF 00 00 3B FF 00 01 42 00 FF F0
+==== BB 199 (0x2547918C) approx BBs exec'd 0 ====
+
+ 0x2547918C: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x25479190: 90BD0008 stw r5,8(r29)
+ 3: GETL R5, t2
+ 4: GETL R29, t4
+ 5: ADDL $0x8, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x25479194: 1D590018 mulli r10,r25,24
+ 8: GETL R25, t6
+ 9: MULL $0x18, t6
+ 10: PUTL t6, R10
+ 11: INCEIPL $4
+
+ 0x25479198: 80DF0180 lwz r6,384(r31)
+ 12: GETL R31, t8
+ 13: ADDL $0x180, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R6
+ 16: INCEIPL $4
+
+ 0x2547919C: 3880FFFF li r4,-1
+ 17: MOVL $0xFFFFFFFF, t12
+ 18: PUTL t12, R4
+ 19: INCEIPL $4
+
+ 0x254791A0: 80BE04C8 lwz r5,1224(r30)
+ 20: GETL R30, t14
+ 21: ADDL $0x4C8, t14
+ 22: LDL (t14), t16
+ 23: PUTL t16, R5
+ 24: INCEIPL $4
+
+ 0x254791A4: 5306F002 rlwimi r6,r24,30,0,1
+ 25: GETL R6, t18
+ 26: GETL R24, t20
+ 27: ROLL $0x1E, t20
+ 28: ANDL $0xC0000000, t20
+ 29: ANDL $0x3FFFFFFF, t18
+ 30: ORL t18, t20
+ 31: PUTL t20, R6
+ 32: INCEIPL $4
+
+ 0x254791A8: 939F0168 stw r28,360(r31)
+ 33: GETL R28, t22
+ 34: GETL R31, t24
+ 35: ADDL $0x168, t24
+ 36: STL t22, (t24)
+ 37: INCEIPL $4
+
+ 0x254791AC: 90DF0180 stw r6,384(r31)
+ 38: GETL R6, t26
+ 39: GETL R31, t28
+ 40: ADDL $0x180, t28
+ 41: STL t26, (t28)
+ 42: INCEIPL $4
+
+ 0x254791B0: 38DF01AC addi r6,r31,428
+ 43: GETL R31, t30
+ 44: ADDL $0x1AC, t30
+ 45: PUTL t30, R6
+ 46: INCEIPL $4
+
+ 0x254791B4: 7D6A282E lwzx r11,r10,r5
+ 47: GETL R5, t32
+ 48: GETL R10, t34
+ 49: ADDL t34, t32
+ 50: LDL (t32), t36
+ 51: PUTL t36, R11
+ 52: INCEIPL $4
+
+ 0x254791B8: 907F0240 stw r3,576(r31)
+ 53: GETL R3, t38
+ 54: GETL R31, t40
+ 55: ADDL $0x240, t40
+ 56: STL t38, (t40)
+ 57: INCEIPL $4
+
+ 0x254791BC: 38600004 li r3,4
+ 58: MOVL $0x4, t42
+ 59: PUTL t42, R3
+ 60: INCEIPL $4
+
+ 0x254791C0: 2F8B0000 cmpi cr7,r11,0
+ 61: GETL R11, t44
+ 62: CMP0L t44, t46 (-rSo)
+ 63: ICRFL t46, $0x7, CR
+ 64: INCEIPL $4
+
+ 0x254791C4: 909F022C stw r4,556(r31)
+ 65: GETL R4, t48
+ 66: GETL R31, t50
+ 67: ADDL $0x22C, t50
+ 68: STL t48, (t50)
+ 69: INCEIPL $4
+
+ 0x254791C8: 907F01BC stw r3,444(r31)
+ 70: GETL R3, t52
+ 71: GETL R31, t54
+ 72: ADDL $0x1BC, t54
+ 73: STL t52, (t54)
+ 74: INCEIPL $4
+
+ 0x254791CC: 38800000 li r4,0
+ 75: MOVL $0x0, t56
+ 76: PUTL t56, R4
+ 77: INCEIPL $4
+
+ 0x254791D0: 92FF0004 stw r23,4(r31)
+ 78: GETL R23, t58
+ 79: GETL R31, t60
+ 80: ADDL $0x4, t60
+ 81: STL t58, (t60)
+ 82: INCEIPL $4
+
+ 0x254791D4: 933F0018 stw r25,24(r31)
+ 83: GETL R25, t62
+ 84: GETL R31, t64
+ 85: ADDL $0x18, t64
+ 86: STL t62, (t64)
+ 87: INCEIPL $4
+
+ 0x254791D8: 90DF01C0 stw r6,448(r31)
+ 88: GETL R6, t66
+ 89: GETL R31, t68
+ 90: ADDL $0x1C0, t68
+ 91: STL t66, (t68)
+ 92: INCEIPL $4
+
+ 0x254791DC: 409E013C bc 4,30,0x25479318
+ 93: Jc30o $0x25479318
+
+
+
+. 199 2547918C 84
+. 38 A0 00 01 90 BD 00 08 1D 59 00 18 80 DF 01 80 38 80 FF FF 80 BE 04 C8 53 06 F0 02 93 9F 01 68 90 DF 01 80 38 DF 01 AC 7D 6A 28 2E 90 7F 02 40 38 60 00 04 2F 8B 00 00 90 9F 02 2C 90 7F 01 BC 38 80 00 00 92 FF 00 04 93 3F 00 18 90 DF 01 C0 40 9E 01 3C
+==== BB 200 (0x254791E0) approx BBs exec'd 0 ====
+
+ 0x254791E0: 7FEA292E stwx r31,r10,r5
+ 0: GETL R5, t0
+ 1: GETL R10, t2
+ 2: ADDL t2, t0
+ 3: GETL R31, t4
+ 4: STL t4, (t0)
+ 5: INCEIPL $4
+
+ 0x254791E4: 2F1C0000 cmpi cr6,r28,0
+ 6: GETL R28, t6
+ 7: CMP0L t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x254791E8: 7D4A2A14 add r10,r10,r5
+ 10: GETL R10, t10
+ 11: GETL R5, t12
+ 12: ADDL t10, t12
+ 13: PUTL t12, R10
+ 14: INCEIPL $4
+
+ 0x254791EC: 81650198 lwz r11,408(r5)
+ 15: GETL R5, t14
+ 16: ADDL $0x198, t14
+ 17: LDL (t14), t16
+ 18: PUTL t16, R11
+ 19: INCEIPL $4
+
+ 0x254791F0: 832A0004 lwz r25,4(r10)
+ 20: GETL R10, t18
+ 21: ADDL $0x4, t18
+ 22: LDL (t18), t20
+ 23: PUTL t20, R25
+ 24: INCEIPL $4
+
+ 0x254791F4: 8185019C lwz r12,412(r5)
+ 25: GETL R5, t22
+ 26: ADDL $0x19C, t22
+ 27: LDL (t22), t24
+ 28: PUTL t24, R12
+ 29: INCEIPL $4
+
+ 0x254791F8: 3B190001 addi r24,r25,1
+ 30: GETL R25, t26
+ 31: ADDL $0x1, t26
+ 32: PUTL t26, R24
+ 33: INCEIPL $4
+
+ 0x254791FC: 310C0001 addic r8,r12,1
+ 34: GETL R12, t28
+ 35: ADCL $0x1, t28 (-wCa)
+ 36: PUTL t28, R8
+ 37: INCEIPL $4
+
+ 0x25479200: 7CEB0194 addze r7,r11
+ 38: GETL R11, t30
+ 39: ADCL $0x0, t30 (-rCa-wCa)
+ 40: PUTL t30, R7
+ 41: INCEIPL $4
+
+ 0x25479204: 930A0004 stw r24,4(r10)
+ 42: GETL R24, t32
+ 43: GETL R10, t34
+ 44: ADDL $0x4, t34
+ 45: STL t32, (t34)
+ 46: INCEIPL $4
+
+ 0x25479208: 90E50198 stw r7,408(r5)
+ 47: GETL R7, t36
+ 48: GETL R5, t38
+ 49: ADDL $0x198, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0x2547920C: 9105019C stw r8,412(r5)
+ 52: GETL R8, t40
+ 53: GETL R5, t42
+ 54: ADDL $0x19C, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0x25479210: 40BA000C bc 5,26,0x2547921C
+ 57: Jc26o $0x2547921C
+
+
+
+. 200 254791E0 52
+. 7F EA 29 2E 2F 1C 00 00 7D 4A 2A 14 81 65 01 98 83 2A 00 04 81 85 01 9C 3B 19 00 01 31 0C 00 01 7C EB 01 94 93 0A 00 04 90 E5 01 98 91 05 01 9C 40 BA 00 0C
+==== BB 201 (0x25479214) approx BBs exec'd 0 ====
+
+ 0x25479214: 48000164 b 0x25479378
+ 0: JMPo $0x25479378 ($4)
+
+
+
+. 201 25479214 4
+. 48 00 01 64
+==== BB 202 (0x25479378) approx BBs exec'd 0 ====
+
+ 0x25479378: 7FFCFB78 or r28,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0x2547937C: 4BFFFEAC b 0x25479228
+ 3: JMPo $0x25479228 ($4)
+
+
+
+. 202 25479378 8
+. 7F FC FB 78 4B FF FE AC
+==== BB 203 (0x25479228) approx BBs exec'd 0 ====
+
+ 0x25479228: 2F840000 cmpi cr7,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547922C: 393C0158 addi r9,r28,344
+ 4: GETL R28, t4
+ 5: ADDL $0x158, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x25479230: 419E0010 bc 12,30,0x25479240
+ 8: Js30o $0x25479240
+
+
+
+. 203 25479228 12
+. 2F 84 00 00 39 3C 01 58 41 9E 00 10
+==== BB 204 (0x25479240) approx BBs exec'd 0 ====
+
+ 0x25479240: 56CCEFFE rlwinm r12,r22,29,31,31
+ 0: GETL R22, t0
+ 1: ROLL $0x1D, t0
+ 2: ANDL $0x1, t0
+ 3: PUTL t0, R12
+ 4: INCEIPL $4
+
+ 0x25479244: 7D8B2039 and. r11,r12,r4
+ 5: GETL R12, t2
+ 6: GETL R4, t4
+ 7: ANDL t2, t4
+ 8: PUTL t4, R11
+ 9: CMP0L t4, t6 (-rSo)
+ 10: ICRFL t6, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25479248: 41820010 bc 12,2,0x25479258
+ 12: Js02o $0x25479258
+
+
+
+. 204 25479240 12
+. 56 CC EF FE 7D 8B 20 39 41 82 00 10
+==== BB 205 (0x25479258) approx BBs exec'd 0 ====
+
+ 0x25479258: 549A103A rlwinm r26,r4,2,0,29
+ 0: GETL R4, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x2547925C: 7D3A312E stwx r9,r26,r6
+ 4: GETL R6, t2
+ 5: GETL R26, t4
+ 6: ADDL t4, t2
+ 7: GETL R9, t6
+ 8: STL t6, (t2)
+ 9: INCEIPL $4
+
+ 0x25479260: 3B7F0158 addi r27,r31,344
+ 10: GETL R31, t8
+ 11: ADDL $0x158, t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0x25479264: 937F01C4 stw r27,452(r31)
+ 14: GETL R27, t10
+ 15: GETL R31, t12
+ 16: ADDL $0x1C4, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x25479268: 8BB70000 lbz r29,0(r23)
+ 19: GETL R23, t14
+ 20: LDB (t14), t16
+ 21: PUTL t16, R29
+ 22: INCEIPL $4
+
+ 0x2547926C: 2F1D0000 cmpi cr6,r29,0
+ 23: GETL R29, t18
+ 24: CMP0L t18, t20 (-rSo)
+ 25: ICRFL t20, $0x6, CR
+ 26: INCEIPL $4
+
+ 0x25479270: 419A006C bc 12,26,0x254792DC
+ 27: Js26o $0x254792DC
+
+
+
+. 205 25479258 28
+. 54 9A 10 3A 7D 3A 31 2E 3B 7F 01 58 93 7F 01 C4 8B B7 00 00 2F 1D 00 00 41 9A 00 6C
+==== BB 206 (0x254792DC) approx BBs exec'd 0 ====
+
+ 0x254792DC: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254792E0: 83810034 lwz r28,52(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x34, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x254792E4: 82C10008 lwz r22,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R22
+ 12: INCEIPL $4
+
+ 0x254792E8: 7F8803A6 mtlr r28
+ 13: GETL R28, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x254792EC: 82E1000C lwz r23,12(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0xC, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R23
+ 20: INCEIPL $4
+
+ 0x254792F0: 83010010 lwz r24,16(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x10, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R24
+ 25: INCEIPL $4
+
+ 0x254792F4: 83210014 lwz r25,20(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R25
+ 30: INCEIPL $4
+
+ 0x254792F8: 83410018 lwz r26,24(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x18, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R26
+ 35: INCEIPL $4
+
+ 0x254792FC: 8361001C lwz r27,28(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R27
+ 40: INCEIPL $4
+
+ 0x25479300: 83810020 lwz r28,32(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x20, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R28
+ 45: INCEIPL $4
+
+ 0x25479304: 83A10024 lwz r29,36(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x24, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R29
+ 50: INCEIPL $4
+
+ 0x25479308: 83C10028 lwz r30,40(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x28, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R30
+ 55: INCEIPL $4
+
+ 0x2547930C: 83E1002C lwz r31,44(r1)
+ 56: GETL R1, t44
+ 57: ADDL $0x2C, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R31
+ 60: INCEIPL $4
+
+ 0x25479310: 38210030 addi r1,r1,48
+ 61: GETL R1, t48
+ 62: ADDL $0x30, t48
+ 63: PUTL t48, R1
+ 64: INCEIPL $4
+
+ 0x25479314: 4E800020 blr
+ 65: GETL LR, t50
+ 66: JMPo-r t50 ($4)
+
+
+
+. 206 254792DC 60
+. 7F E3 FB 78 83 81 00 34 82 C1 00 08 7F 88 03 A6 82 E1 00 0C 83 01 00 10 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 207 (0x254723A0) approx BBs exec'd 0 ====
+
+ 0x254723A0: 828E0000 lwz r20,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R20
+ 3: INCEIPL $4
+
+ 0x254723A4: 2D940000 cmpi cr3,r20,0
+ 4: GETL R20, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x3, CR
+ 7: INCEIPL $4
+
+ 0x254723A8: 418E0C90 bc 12,14,0x25473038
+ 8: Js14o $0x25473038
+
+
+
+. 207 254723A0 12
+. 82 8E 00 00 2D 94 00 00 41 8E 0C 90
+==== BB 208 (0x254723AC) approx BBs exec'd 0 ====
+
+ 0x254723AC: 80D60000 lwz r6,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x254723B0: 9314014C stw r24,332(r20)
+ 4: GETL R24, t4
+ 5: GETL R20, t6
+ 6: ADDL $0x14C, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x254723B4: 90D40150 stw r6,336(r20)
+ 9: GETL R6, t8
+ 10: GETL R20, t10
+ 11: ADDL $0x150, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x254723B8: B2F40154 sth r23,340(r20)
+ 14: GETL R23, t12
+ 15: GETL R20, t14
+ 16: ADDL $0x154, t14
+ 17: STW t12, (t14)
+ 18: INCEIPL $4
+
+ 0x254723BC: 56EC2834 rlwinm r12,r23,5,0,26
+ 19: GETL R23, t16
+ 20: SHLL $0x5, t16
+ 21: PUTL t16, R12
+ 22: INCEIPL $4
+
+ 0x254723C0: 81140178 lwz r8,376(r20)
+ 23: GETL R20, t18
+ 24: ADDL $0x178, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R8
+ 27: INCEIPL $4
+
+ 0x254723C4: 7C8CC214 add r4,r12,r24
+ 28: GETL R12, t22
+ 29: GETL R24, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R4
+ 32: INCEIPL $4
+
+ 0x254723C8: 80F4017C lwz r7,380(r20)
+ 33: GETL R20, t26
+ 34: ADDL $0x17C, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R7
+ 37: INCEIPL $4
+
+ 0x254723CC: 7E04C040 cmpl cr4,r4,r24
+ 38: GETL R4, t30
+ 39: GETL R24, t32
+ 40: CMPUL t30, t32, t34 (-rSo)
+ 41: ICRFL t34, $0x4, CR
+ 42: INCEIPL $4
+
+ 0x254723D0: 39280001 addi r9,r8,1
+ 43: GETL R8, t36
+ 44: ADDL $0x1, t36
+ 45: PUTL t36, R9
+ 46: INCEIPL $4
+
+ 0x254723D4: 3B270001 addi r25,r7,1
+ 47: GETL R7, t38
+ 48: ADDL $0x1, t38
+ 49: PUTL t38, R25
+ 50: INCEIPL $4
+
+ 0x254723D8: 39000000 li r8,0
+ 51: MOVL $0x0, t40
+ 52: PUTL t40, R8
+ 53: INCEIPL $4
+
+ 0x254723DC: 38E00000 li r7,0
+ 54: MOVL $0x0, t42
+ 55: PUTL t42, R7
+ 56: INCEIPL $4
+
+ 0x254723E0: 3B80FFFF li r28,-1
+ 57: MOVL $0xFFFFFFFF, t44
+ 58: PUTL t44, R28
+ 59: INCEIPL $4
+
+ 0x254723E4: 7F0AC378 or r10,r24,r24
+ 60: GETL R24, t46
+ 61: PUTL t46, R10
+ 62: INCEIPL $4
+
+ 0x254723E8: 939401A0 stw r28,416(r20)
+ 63: GETL R28, t48
+ 64: GETL R20, t50
+ 65: ADDL $0x1A0, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x254723EC: 91340178 stw r9,376(r20)
+ 68: GETL R9, t52
+ 69: GETL R20, t54
+ 70: ADDL $0x178, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0x254723F0: 9334017C stw r25,380(r20)
+ 73: GETL R25, t56
+ 74: GETL R20, t58
+ 75: ADDL $0x17C, t58
+ 76: STL t56, (t58)
+ 77: INCEIPL $4
+
+ 0x254723F4: 911401A4 stw r8,420(r20)
+ 78: GETL R8, t60
+ 79: GETL R20, t62
+ 80: ADDL $0x1A4, t62
+ 81: STL t60, (t62)
+ 82: INCEIPL $4
+
+ 0x254723F8: 90F401A8 stw r7,424(r20)
+ 83: GETL R7, t64
+ 84: GETL R20, t66
+ 85: ADDL $0x1A8, t66
+ 86: STL t64, (t66)
+ 87: INCEIPL $4
+
+ 0x254723FC: 409100C8 bc 4,17,0x254724C4
+ 88: Jc17o $0x254724C4
+
+
+
+. 208 254723AC 84
+. 80 D6 00 00 93 14 01 4C 90 D4 01 50 B2 F4 01 54 56 EC 28 34 81 14 01 78 7C 8C C2 14 80 F4 01 7C 7E 04 C0 40 39 28 00 01 3B 27 00 01 39 00 00 00 38 E0 00 00 3B 80 FF FF 7F 0A C3 78 93 94 01 A0 91 34 01 78 93 34 01 7C 91 14 01 A4 90 F4 01 A8 40 91 00 C8
+==== BB 209 (0x25472400) approx BBs exec'd 0 ====
+
+ 0x25472400: 3F606474 lis r27,25716
+ 0: MOVL $0x64740000, t0
+ 1: PUTL t0, R27
+ 2: INCEIPL $4
+
+ 0x25472404: 83BE0044 lwz r29,68(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x44, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25472408: 80DE0048 lwz r6,72(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x48, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R6
+ 12: INCEIPL $4
+
+ 0x2547240C: 6363E552 ori r3,r27,0xE552
+ 13: MOVL $0x6474E552, t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0x25472410: 38A00001 li r5,1
+ 16: MOVL $0x1, t12
+ 17: PUTL t12, R5
+ 18: INCEIPL $4
+
+ 0x25472414: 48000028 b 0x2547243C
+ 19: JMPo $0x2547243C ($4)
+
+
+
+. 209 25472400 24
+. 3F 60 64 74 83 BE 00 44 80 DE 00 48 63 63 E5 52 38 A0 00 01 48 00 00 28
+==== BB 210 (0x2547243C) approx BBs exec'd 0 ====
+
+ 0x2547243C: 800A0000 lwz r0,0(r10)
+ 0: GETL R10, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25472440: 2F000006 cmpi cr6,r0,6
+ 4: GETL R0, t4
+ 5: MOVL $0x6, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25472444: 419A0798 bc 12,26,0x25472BDC
+ 9: Js26o $0x25472BDC
+
+
+
+. 210 2547243C 12
+. 80 0A 00 00 2F 00 00 06 41 9A 07 98
+==== BB 211 (0x25472BDC) approx BBs exec'd 0 ====
+
+ 0x25472BDC: 816A0008 lwz r11,8(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25472BE0: 7F4BC050 subf r26,r11,r24
+ 5: GETL R11, t4
+ 6: GETL R24, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0x25472BE4: 93540000 stw r26,0(r20)
+ 10: GETL R26, t8
+ 11: GETL R20, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25472BE8: 4BFFF848 b 0x25472430
+ 14: JMPo $0x25472430 ($4)
+
+
+
+. 211 25472BDC 16
+. 81 6A 00 08 7F 4B C0 50 93 54 00 00 4B FF F8 48
+==== BB 212 (0x25472430) approx BBs exec'd 0 ====
+
+ 0x25472430: 394A0020 addi r10,r10,32
+ 0: GETL R10, t0
+ 1: ADDL $0x20, t0
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0x25472434: 7F845040 cmpl cr7,r4,r10
+ 4: GETL R4, t2
+ 5: GETL R10, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25472438: 409D0084 bc 4,29,0x254724BC
+ 9: Jc29o $0x254724BC
+
+
+
+. 212 25472430 12
+. 39 4A 00 20 7F 84 50 40 40 9D 00 84
+==== BB 213 (0x25472448) approx BBs exec'd 0 ====
+
+ 0x25472448: 2B800006 cmpli cr7,r0,6
+ 0: GETL R0, t0
+ 1: MOVL $0x6, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x2547244C: 40BDFFCC bc 5,29,0x25472418
+ 5: Jc29o $0x25472418
+
+
+
+. 213 25472448 8
+. 2B 80 00 06 40 BD FF CC
+==== BB 214 (0x25472418) approx BBs exec'd 0 ====
+
+ 0x25472418: 2C000002 cmpi cr0,r0,2
+ 0: GETL R0, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547241C: 41820854 bc 12,2,0x25472C70
+ 5: Js02o $0x25472C70
+
+
+
+. 214 25472418 8
+. 2C 00 00 02 41 82 08 54
+==== BB 215 (0x25472420) approx BBs exec'd 0 ====
+
+ 0x25472420: 28800002 cmpli cr1,r0,2
+ 0: GETL R0, t0
+ 1: MOVL $0x2, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25472424: 418507E4 bc 12,5,0x25472C08
+ 5: Js05o $0x25472C08
+
+
+
+. 215 25472420 8
+. 28 80 00 02 41 85 07 E4
+==== BB 216 (0x25472C08) approx BBs exec'd 0 ====
+
+ 0x25472C08: 2F000003 cmpi cr6,r0,3
+ 0: GETL R0, t0
+ 1: MOVL $0x3, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25472C0C: 409AF824 bc 4,26,0x25472430
+ 5: Jc26o $0x25472430
+
+
+
+. 216 25472C08 8
+. 2F 00 00 03 40 9A F8 24
+==== BB 217 (0x25472C10) approx BBs exec'd 0 ====
+
+ 0x25472C10: 82AE01C0 lwz r21,448(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1C0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x25472C14: 7FA7EB78 or r7,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x25472C18: 81740000 lwz r11,0(r20)
+ 8: GETL R20, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x25472C1C: 2F150000 cmpi cr6,r21,0
+ 12: GETL R21, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x6, CR
+ 15: INCEIPL $4
+
+ 0x25472C20: 812A0008 lwz r9,8(r10)
+ 16: GETL R10, t14
+ 17: ADDL $0x8, t14
+ 18: LDL (t14), t16
+ 19: PUTL t16, R9
+ 20: INCEIPL $4
+
+ 0x25472C24: 93AE01D4 stw r29,468(r14)
+ 21: GETL R29, t18
+ 22: GETL R14, t20
+ 23: ADDL $0x1D4, t20
+ 24: STL t18, (t20)
+ 25: INCEIPL $4
+
+ 0x25472C28: 7C0B4A14 add r0,r11,r9
+ 26: GETL R11, t22
+ 27: GETL R9, t24
+ 28: ADDL t22, t24
+ 29: PUTL t24, R0
+ 30: INCEIPL $4
+
+ 0x25472C2C: 901D0000 stw r0,0(r29)
+ 31: GETL R0, t26
+ 32: GETL R29, t28
+ 33: STL t26, (t28)
+ 34: INCEIPL $4
+
+ 0x25472C30: 409A0444 bc 4,26,0x25473074
+ 35: Jc26o $0x25473074
+
+
+
+. 217 25472C10 36
+. 82 AE 01 C0 7F A7 EB 78 81 74 00 00 2F 15 00 00 81 2A 00 08 93 AE 01 D4 7C 0B 4A 14 90 1D 00 00 40 9A 04 44
+==== BB 218 (0x25473074) approx BBs exec'd 0 ====
+
+ 0x25473074: 3AA00001 li r21,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R21
+ 2: INCEIPL $4
+
+ 0x25473078: 4BFFF3B8 b 0x25472430
+ 3: JMPo $0x25472430 ($4)
+
+
+
+. 218 25473074 8
+. 3A A0 00 01 4B FF F3 B8
+==== BB 219 (0x25472428) approx BBs exec'd 0 ====
+
+ 0x25472428: 2E000001 cmpi cr4,r0,1
+ 0: GETL R0, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x2547242C: 41920B80 bc 12,18,0x25472FAC
+ 5: Js18o $0x25472FAC
+
+
+
+. 219 25472428 8
+. 2E 00 00 01 41 92 0B 80
+==== BB 220 (0x25472FAC) approx BBs exec'd 0 ====
+
+ 0x25472FAC: 80EA001C lwz r7,28(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25472FB0: 810A0008 lwz r8,8(r10)
+ 5: GETL R10, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x25472FB4: 7D8700D0 neg r12,r7
+ 10: GETL R7, t8
+ 11: NEGL t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0x25472FB8: 80F40000 lwz r7,0(r20)
+ 14: GETL R20, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R7
+ 17: INCEIPL $4
+
+ 0x25472FBC: 7D1C6038 and r28,r8,r12
+ 18: GETL R8, t14
+ 19: GETL R12, t16
+ 20: ANDL t14, t16
+ 21: PUTL t16, R28
+ 22: INCEIPL $4
+
+ 0x25472FC0: 813401A0 lwz r9,416(r20)
+ 23: GETL R20, t18
+ 24: ADDL $0x1A0, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R9
+ 27: INCEIPL $4
+
+ 0x25472FC4: 7C07E214 add r0,r7,r28
+ 28: GETL R7, t22
+ 29: GETL R28, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R0
+ 32: INCEIPL $4
+
+ 0x25472FC8: 7F090040 cmpl cr6,r9,r0
+ 33: GETL R9, t26
+ 34: GETL R0, t28
+ 35: CMPUL t26, t28, t30 (-rSo)
+ 36: ICRFL t30, $0x6, CR
+ 37: INCEIPL $4
+
+ 0x25472FCC: 419900B0 bc 12,25,0x2547307C
+ 38: Js25o $0x2547307C
+
+
+
+. 220 25472FAC 36
+. 80 EA 00 1C 81 0A 00 08 7D 87 00 D0 80 F4 00 00 7D 1C 60 38 81 34 01 A0 7C 07 E2 14 7F 09 00 40 41 99 00 B0
+==== BB 221 (0x2547307C) approx BBs exec'd 0 ====
+
+ 0x2547307C: 901401A0 stw r0,416(r20)
+ 0: GETL R0, t0
+ 1: GETL R20, t2
+ 2: ADDL $0x1A0, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25473080: 810A0008 lwz r8,8(r10)
+ 5: GETL R10, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x25473084: 4BFFFF4C b 0x25472FD0
+ 10: JMPo $0x25472FD0 ($4)
+
+
+
+. 221 2547307C 12
+. 90 14 01 A0 81 0A 00 08 4B FF FF 4C
+==== BB 222 (0x25472FD0) approx BBs exec'd 0 ====
+
+ 0x25472FD0: 836A0014 lwz r27,20(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x25472FD4: 7EE74214 add r23,r7,r8
+ 5: GETL R7, t4
+ 6: GETL R8, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R23
+ 9: INCEIPL $4
+
+ 0x25472FD8: 811401A4 lwz r8,420(r20)
+ 10: GETL R20, t8
+ 11: ADDL $0x1A4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R8
+ 14: INCEIPL $4
+
+ 0x25472FDC: 7D77DA14 add r11,r23,r27
+ 15: GETL R23, t12
+ 16: GETL R27, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R11
+ 19: INCEIPL $4
+
+ 0x25472FE0: 7F885840 cmpl cr7,r8,r11
+ 20: GETL R8, t16
+ 21: GETL R11, t18
+ 22: CMPUL t16, t18, t20 (-rSo)
+ 23: ICRFL t20, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x25472FE4: 409C0008 bc 4,28,0x25472FEC
+ 25: Jc28o $0x25472FEC
+
+
+
+. 222 25472FD0 24
+. 83 6A 00 14 7E E7 42 14 81 14 01 A4 7D 77 DA 14 7F 88 58 40 40 9C 00 08
+==== BB 223 (0x25472FE8) approx BBs exec'd 0 ====
+
+ 0x25472FE8: 917401A4 stw r11,420(r20)
+ 0: GETL R11, t0
+ 1: GETL R20, t2
+ 2: ADDL $0x1A4, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25472FEC: 834A0018 lwz r26,24(r10)
+ 5: GETL R10, t4
+ 6: ADDL $0x18, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0x25472FF0: 73490001 andi. r9,r26,0x1
+ 10: GETL R26, t8
+ 11: ANDL $0x1, t8
+ 12: PUTL t8, R9
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x25472FF4: 41A2F43C bc 13,2,0x25472430
+ 16: Js02o $0x25472430
+
+
+
+. 223 25472FE8 16
+. 91 74 01 A4 83 4A 00 18 73 49 00 01 41 A2 F4 3C
+==== BB 224 (0x25472FF8) approx BBs exec'd 0 ====
+
+ 0x25472FF8: 801401A8 lwz r0,424(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x1A8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25472FFC: 7C805840 cmpl cr1,r0,r11
+ 5: GETL R0, t4
+ 6: GETL R11, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x25473000: 40A4F430 bc 5,4,0x25472430
+ 10: Jc04o $0x25472430
+
+
+
+. 224 25472FF8 12
+. 80 14 01 A8 7C 80 58 40 40 A4 F4 30
+==== BB 225 (0x25473004) approx BBs exec'd 0 ====
+
+ 0x25473004: 917401A8 stw r11,424(r20)
+ 0: GETL R11, t0
+ 1: GETL R20, t2
+ 2: ADDL $0x1A8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25473008: 4BFFF428 b 0x25472430
+ 5: JMPo $0x25472430 ($4)
+
+
+
+. 225 25473004 8
+. 91 74 01 A8 4B FF F4 28
+==== BB 226 (0x25472C70) approx BBs exec'd 0 ====
+
+ 0x25472C70: 82D40000 lwz r22,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R22
+ 3: INCEIPL $4
+
+ 0x25472C74: 832A0008 lwz r25,8(r10)
+ 4: GETL R10, t4
+ 5: ADDL $0x8, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R25
+ 8: INCEIPL $4
+
+ 0x25472C78: 7C16CA14 add r0,r22,r25
+ 9: GETL R22, t8
+ 10: GETL R25, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R0
+ 13: INCEIPL $4
+
+ 0x25472C7C: 90140008 stw r0,8(r20)
+ 14: GETL R0, t12
+ 15: GETL R20, t14
+ 16: ADDL $0x8, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25472C80: 4BFFF7B0 b 0x25472430
+ 19: JMPo $0x25472430 ($4)
+
+
+
+. 226 25472C70 20
+. 82 D4 00 00 83 2A 00 08 7C 16 CA 14 90 14 00 08 4B FF F7 B0
+==== BB 227 (0x25472450) approx BBs exec'd 0 ====
+
+ 0x25472450: 3EE06474 lis r23,25716
+ 0: MOVL $0x64740000, t0
+ 1: PUTL t0, R23
+ 2: INCEIPL $4
+
+ 0x25472454: 62E9E551 ori r9,r23,0xE551
+ 3: MOVL $0x6474E551, t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x25472458: 7F804800 cmp cr7,r0,r9
+ 6: GETL R0, t4
+ 7: GETL R9, t6
+ 8: CMPL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x2547245C: 419E0828 bc 12,30,0x25472C84
+ 11: Js30o $0x25472C84
+
+
+
+. 227 25472450 16
+. 3E E0 64 74 62 E9 E5 51 7F 80 48 00 41 9E 08 28
+==== BB 228 (0x25472460) approx BBs exec'd 0 ====
+
+ 0x25472460: 7C004840 cmpl cr0,r0,r9
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25472464: 41810788 bc 12,1,0x25472BEC
+ 5: Js01o $0x25472BEC
+
+
+
+. 228 25472460 8
+. 7C 00 48 40 41 81 07 88
+==== BB 229 (0x25472468) approx BBs exec'd 0 ====
+
+ 0x25472468: 2C800007 cmpi cr1,r0,7
+ 0: GETL R0, t0
+ 1: MOVL $0x7, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x2547246C: 4086FFC4 bc 4,6,0x25472430
+ 5: Jc06o $0x25472430
+
+
+
+. 229 25472468 8
+. 2C 80 00 07 40 86 FF C4
+==== BB 230 (0x25472C84) approx BBs exec'd 0 ====
+
+ 0x25472C84: 80EA0018 lwz r7,24(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25472C88: 90EE0400 stw r7,1024(r14)
+ 5: GETL R7, t4
+ 6: GETL R14, t6
+ 7: ADDL $0x400, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25472C8C: 4BFFF7A4 b 0x25472430
+ 10: JMPo $0x25472430 ($4)
+
+
+
+. 230 25472C84 12
+. 80 EA 00 18 90 EE 04 00 4B FF F7 A4
+==== BB 231 (0x254724BC) approx BBs exec'd 0 ====
+
+ 0x254724BC: 811401A4 lwz r8,420(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x1A4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254724C0: 80F401A8 lwz r7,424(r20)
+ 5: GETL R20, t4
+ 6: ADDL $0x1A8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0x254724C4: 81340218 lwz r9,536(r20)
+ 10: GETL R20, t8
+ 11: ADDL $0x218, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x254724C8: 2C090000 cmpi cr0,r9,0
+ 15: GETL R9, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x254724CC: 41820010 bc 12,2,0x254724DC
+ 19: Js02o $0x254724DC
+
+
+
+. 231 254724BC 20
+. 81 14 01 A4 80 F4 01 A8 81 34 02 18 2C 09 00 00 41 82 00 10
+==== BB 232 (0x254724DC) approx BBs exec'd 0 ====
+
+ 0x254724DC: 2C880000 cmpi cr1,r8,0
+ 0: GETL R8, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x254724E0: 4086000C bc 4,6,0x254724EC
+ 4: Jc06o $0x254724EC
+
+
+
+. 232 254724DC 8
+. 2C 88 00 00 40 86 00 0C
+==== BB 233 (0x254724EC) approx BBs exec'd 0 ====
+
+ 0x254724EC: 2E070000 cmpi cr4,r7,0
+ 0: GETL R7, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x254724F0: 4092000C bc 4,18,0x254724FC
+ 4: Jc18o $0x254724FC
+
+
+
+. 233 254724EC 8
+. 2E 07 00 00 40 92 00 0C
+==== BB 234 (0x254724FC) approx BBs exec'd 0 ====
+
+ 0x254724FC: 80AE01D4 lwz r5,468(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1D4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25472500: 2F050000 cmpi cr6,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25472504: 409A001C bc 4,26,0x25472520
+ 9: Jc26o $0x25472520
+
+
+
+. 234 254724FC 12
+. 80 AE 01 D4 2F 05 00 00 40 9A 00 1C
+==== BB 235 (0x25472520) approx BBs exec'd 0 ====
+
+ 0x25472520: 2E130000 cmpi cr4,r19,0
+ 0: GETL R19, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25472524: 409201A8 bc 4,18,0x254726CC
+ 4: Jc18o $0x254726CC
+
+
+
+. 235 25472520 8
+. 2E 13 00 00 40 92 01 A8
+==== BB 236 (0x25472528) approx BBs exec'd 0 ====
+
+ 0x25472528: 81540008 lwz r10,8(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547252C: 2C0A0000 cmpi cr0,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25472530: 41820194 bc 12,2,0x254726C4
+ 9: Js02o $0x254726C4
+
+
+
+. 236 25472528 12
+. 81 54 00 08 2C 0A 00 00 41 82 01 94
+==== BB 237 (0x25472534) approx BBs exec'd 0 ====
+
+ 0x25472534: 816A0000 lwz r11,0(r10)
+ 0: GETL R10, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25472538: 39140020 addi r8,r20,32
+ 4: GETL R20, t4
+ 5: ADDL $0x20, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0x2547253C: 2C8B0000 cmpi cr1,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x25472540: 41860064 bc 12,6,0x254725A4
+ 12: Js06o $0x254725A4
+
+
+
+. 237 25472534 16
+. 81 6A 00 00 39 14 00 20 2C 8B 00 00 41 86 00 64
+==== BB 238 (0x25472544) approx BBs exec'd 0 ====
+
+ 0x25472544: 3EC06FFF lis r22,28671
+ 0: MOVL $0x6FFF0000, t0
+ 1: PUTL t0, R22
+ 2: INCEIPL $4
+
+ 0x25472548: 3CC07000 lis r6,28672
+ 3: MOVL $0x70000000, t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0x2547254C: 3C006FFF lis r0,28671
+ 6: MOVL $0x6FFF0000, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25472550: 3F406FFF lis r26,28671
+ 9: MOVL $0x6FFF0000, t6
+ 10: PUTL t6, R26
+ 11: INCEIPL $4
+
+ 0x25472554: 3EE06FFF lis r23,28671
+ 12: MOVL $0x6FFF0000, t8
+ 13: PUTL t8, R23
+ 14: INCEIPL $4
+
+ 0x25472558: 3E606FFF lis r19,28671
+ 15: MOVL $0x6FFF0000, t10
+ 16: PUTL t10, R19
+ 17: INCEIPL $4
+
+ 0x2547255C: 62C7FFFF ori r7,r22,0xFFFF
+ 18: MOVL $0x6FFFFFFF, t12
+ 19: PUTL t12, R7
+ 20: INCEIPL $4
+
+ 0x25472560: 60C60021 ori r6,r6,0x21
+ 21: MOVL $0x70000021, t14
+ 22: PUTL t14, R6
+ 23: INCEIPL $4
+
+ 0x25472564: 6005FDFF ori r5,r0,0xFDFF
+ 24: MOVL $0x6FFFFDFF, t16
+ 25: PUTL t16, R5
+ 26: INCEIPL $4
+
+ 0x25472568: 6344FE34 ori r4,r26,0xFE34
+ 27: MOVL $0x6FFFFE34, t18
+ 28: PUTL t18, R4
+ 29: INCEIPL $4
+
+ 0x2547256C: 62E3FEFF ori r3,r23,0xFEFF
+ 30: MOVL $0x6FFFFEFF, t20
+ 31: PUTL t20, R3
+ 32: INCEIPL $4
+
+ 0x25472570: 627DFF40 ori r29,r19,0xFF40
+ 33: MOVL $0x6FFFFF40, t22
+ 34: PUTL t22, R29
+ 35: INCEIPL $4
+
+ 0x25472574: 2F0B0021 cmpi cr6,r11,33
+ 36: GETL R11, t24
+ 37: MOVL $0x21, t28
+ 38: CMPL t24, t28, t26 (-rSo)
+ 39: ICRFL t26, $0x6, CR
+ 40: INCEIPL $4
+
+ 0x25472578: 5560103A rlwinm r0,r11,2,0,29
+ 41: GETL R11, t30
+ 42: SHLL $0x2, t30
+ 43: PUTL t30, R0
+ 44: INCEIPL $4
+
+ 0x2547257C: 40990018 bc 4,25,0x25472594
+ 45: Jc25o $0x25472594
+
+
+
+. 238 25472544 60
+. 3E C0 6F FF 3C C0 70 00 3C 00 6F FF 3F 40 6F FF 3E E0 6F FF 3E 60 6F FF 62 C7 FF FF 60 C6 00 21 60 05 FD FF 63 44 FE 34 62 E3 FE FF 62 7D FF 40 2F 0B 00 21 55 60 10 3A 40 99 00 18
+==== BB 239 (0x25472594) approx BBs exec'd 0 ====
+
+ 0x25472594: 7D48012E stwx r10,r8,r0
+ 0: GETL R0, t0
+ 1: GETL R8, t2
+ 2: ADDL t2, t0
+ 3: GETL R10, t4
+ 4: STL t4, (t0)
+ 5: INCEIPL $4
+
+ 0x25472598: 856A0008 lwzu r11,8(r10)
+ 6: GETL R10, t6
+ 7: ADDL $0x8, t6
+ 8: PUTL t6, R10
+ 9: LDL (t6), t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x2547259C: 2F8B0000 cmpi cr7,r11,0
+ 12: GETL R11, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0x254725A0: 409EFFD4 bc 4,30,0x25472574
+ 16: Jc30o $0x25472574
+
+
+
+. 239 25472594 16
+. 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
+==== BB 240 (0x25472574) approx BBs exec'd 0 ====
+
+ 0x25472574: 2F0B0021 cmpi cr6,r11,33
+ 0: GETL R11, t0
+ 1: MOVL $0x21, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25472578: 5560103A rlwinm r0,r11,2,0,29
+ 5: GETL R11, t6
+ 6: SHLL $0x2, t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x2547257C: 40990018 bc 4,25,0x25472594
+ 9: Jc25o $0x25472594
+
+
+
+. 240 25472574 12
+. 2F 0B 00 21 55 60 10 3A 40 99 00 18
+==== BB 241 (0x25472580) approx BBs exec'd 0 ====
+
+ 0x25472580: 7F2B3850 subf r25,r11,r7
+ 0: GETL R11, t0
+ 1: GETL R7, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x25472584: 2B99000F cmpli cr7,r25,15
+ 5: GETL R25, t4
+ 6: MOVL $0xF, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x25472588: 419D0708 bc 12,29,0x25472C90
+ 10: Js29o $0x25472C90
+
+
+
+. 241 25472580 12
+. 7F 2B 38 50 2B 99 00 0F 41 9D 07 08
+==== BB 242 (0x2547258C) approx BBs exec'd 0 ====
+
+ 0x2547258C: 7C0B3050 subf r0,r11,r6
+ 0: GETL R11, t0
+ 1: GETL R6, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25472590: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25472594: 7D48012E stwx r10,r8,r0
+ 9: GETL R0, t6
+ 10: GETL R8, t8
+ 11: ADDL t8, t6
+ 12: GETL R10, t10
+ 13: STL t10, (t6)
+ 14: INCEIPL $4
+
+ 0x25472598: 856A0008 lwzu r11,8(r10)
+ 15: GETL R10, t12
+ 16: ADDL $0x8, t12
+ 17: PUTL t12, R10
+ 18: LDL (t12), t14
+ 19: PUTL t14, R11
+ 20: INCEIPL $4
+
+ 0x2547259C: 2F8B0000 cmpi cr7,r11,0
+ 21: GETL R11, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x254725A0: 409EFFD4 bc 4,30,0x25472574
+ 25: Jc30o $0x25472574
+
+
+
+. 242 2547258C 24
+. 7C 0B 30 50 54 00 10 3A 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
+==== BB 243 (0x25472C90) approx BBs exec'd 0 ====
+
+ 0x25472C90: 556C083C rlwinm r12,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0x25472C94: 7D9C0E70 srawi r28,r12,1
+ 4: GETL R12, t2
+ 5: SARL $0x1, t2 (-wCa)
+ 6: PUTL t2, R28
+ 7: INCEIPL $4
+
+ 0x25472C98: 7F89E0F8 nor r9,r28,r28
+ 8: GETL R28, t4
+ 9: NOTL t4
+ 10: PUTL t4, R9
+ 11: INCEIPL $4
+
+ 0x25472C9C: 201C0031 subfic r0,r28,49
+ 12: GETL R28, t6
+ 13: MOVL $0x31, t8
+ 14: SBBL t6, t8 (-wCa)
+ 15: PUTL t8, R0
+ 16: INCEIPL $4
+
+ 0x25472CA0: 28090002 cmpli cr0,r9,2
+ 17: GETL R9, t10
+ 18: MOVL $0x2, t14
+ 19: CMPUL t10, t14, t12 (-rSo)
+ 20: ICRFL t12, $0x0, CR
+ 21: INCEIPL $4
+
+ 0x25472CA4: 40A1F8EC bc 5,1,0x25472590
+ 22: Jc01o $0x25472590
+
+
+
+. 243 25472C90 24
+. 55 6C 08 3C 7D 9C 0E 70 7F 89 E0 F8 20 1C 00 31 28 09 00 02 40 A1 F8 EC
+==== BB 244 (0x25472CA8) approx BBs exec'd 0 ====
+
+ 0x25472CA8: 7F6B2850 subf r27,r11,r5
+ 0: GETL R11, t0
+ 1: GETL R5, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x25472CAC: 289B000B cmpli cr1,r27,11
+ 5: GETL R27, t4
+ 6: MOVL $0xB, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x25472CB0: 418502E4 bc 12,5,0x25472F94
+ 10: Js05o $0x25472F94
+
+
+
+. 244 25472CA8 12
+. 7F 6B 28 50 28 9B 00 0B 41 85 02 E4
+==== BB 245 (0x25472F94) approx BBs exec'd 0 ====
+
+ 0x25472F94: 7F0B1850 subf r24,r11,r3
+ 0: GETL R11, t0
+ 1: GETL R3, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0x25472F98: 2B180009 cmpli cr6,r24,9
+ 5: GETL R24, t4
+ 6: MOVL $0x9, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x25472F9C: 41B9F5FC bc 13,25,0x25472598
+ 10: Js25o $0x25472598
+
+
+
+. 245 25472F94 12
+. 7F 0B 18 50 2B 18 00 09 41 B9 F5 FC
+==== BB 246 (0x25472FA0) approx BBs exec'd 0 ====
+
+ 0x25472FA0: 7C0BE850 subf r0,r11,r29
+ 0: GETL R11, t0
+ 1: GETL R29, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25472FA4: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25472FA8: 4BFFF5EC b 0x25472594
+ 9: JMPo $0x25472594 ($4)
+
+
+
+. 246 25472FA0 12
+. 7C 0B E8 50 54 00 10 3A 4B FF F5 EC
+==== BB 247 (0x25472CB4) approx BBs exec'd 0 ====
+
+ 0x25472CB4: 7C0B2050 subf r0,r11,r4
+ 0: GETL R11, t0
+ 1: GETL R4, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25472CB8: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25472CBC: 4BFFF8D8 b 0x25472594
+ 9: JMPo $0x25472594 ($4)
+
+
+
+. 247 25472CB4 12
+. 7C 0B 20 50 54 00 10 3A 4B FF F8 D8
+==== BB 248 (0x254725A4) approx BBs exec'd 0 ====
+
+ 0x254725A4: 81740000 lwz r11,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x254725A8: 2C0B0000 cmpi cr0,r11,0
+ 4: GETL R11, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x254725AC: 418200AC bc 12,2,0x25472658
+ 8: Js02o $0x25472658
+
+
+
+. 248 254725A4 12
+. 81 74 00 00 2C 0B 00 00 41 82 00 AC
+==== BB 249 (0x25472658) approx BBs exec'd 0 ====
+
+ 0x25472658: 81280078 lwz r9,120(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x78, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547265C: 2C090000 cmpi cr0,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25472660: 41820030 bc 12,2,0x25472690
+ 9: Js02o $0x25472690
+
+
+
+. 249 25472658 12
+. 81 28 00 78 2C 09 00 00 41 82 00 30
+==== BB 250 (0x25472690) approx BBs exec'd 0 ====
+
+ 0x25472690: 81280098 lwz r9,152(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x98, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25472694: 2C890000 cmpi cr1,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25472698: 41860018 bc 12,6,0x254726B0
+ 9: Js06o $0x254726B0
+
+
+
+. 250 25472690 12
+. 81 28 00 98 2C 89 00 00 41 86 00 18
+==== BB 251 (0x254726B0) approx BBs exec'd 0 ====
+
+ 0x254726B0: 81680074 lwz r11,116(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254726B4: 2F0B0000 cmpi cr6,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x254726B8: 419A000C bc 12,26,0x254726C4
+ 9: Js26o $0x254726C4
+
+
+
+. 251 254726B0 12
+. 81 68 00 74 2F 0B 00 00 41 9A 00 0C
+==== BB 252 (0x254726C4) approx BBs exec'd 0 ====
+
+ 0x254726C4: 7E83A378 or r3,r20,r20
+ 0: GETL R20, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254726C8: 48005EA5 bl 0x2547856C
+ 3: MOVL $0x254726CC, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x2547856C ($4)
+
+
+
+. 252 254726C4 8
+. 7E 83 A3 78 48 00 5E A5
+==== BB 253 (0x254726CC) approx BBs exec'd 0 ====
+
+ 0x254726CC: 811F0030 lwz r8,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254726D0: 2F880002 cmpi cr7,r8,2
+ 5: GETL R8, t4
+ 6: MOVL $0x2, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x254726D4: 419E0A04 bc 12,30,0x254730D8
+ 10: Js30o $0x254730D8
+
+
+
+. 253 254726CC 12
+. 81 1F 00 30 2F 88 00 02 41 9E 0A 04
+==== BB 254 (0x254726D8) approx BBs exec'd 0 ====
+
+ 0x254726D8: 4192088C bc 12,18,0x25472F64
+ 0: Js18o $0x25472F64
+
+
+
+. 254 254726D8 4
+. 41 92 08 8C
+==== BB 255 (0x25472F64) approx BBs exec'd 0 ====
+
+ 0x25472F64: 82BE004C lwz r21,76(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x25472F68: 80750000 lwz r3,0(r21)
+ 5: GETL R21, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0x25472F6C: 48002169 bl 0x254750D4
+ 9: MOVL $0x25472F70, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0x254750D4 ($4)
+
+
+
+. 255 25472F64 12
+. 82 BE 00 4C 80 75 00 00 48 00 21 69
+==== BB 256 _dl_init_paths(0x254750D4) approx BBs exec'd 0 ====
+
+ 0x254750D4: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x254750D8: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254750DC: 48021F25 bl 0x25497000
+ 9: MOVL $0x254750E0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 256 254750D4 12
+. 94 21 FF D0 7C 08 02 A6 48 02 1F 25
+==== BB 257 (0x254750E0) approx BBs exec'd 0 ====
+
+ 0x254750E0: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254750E4: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x254750E8: 93010010 stw r24,16(r1)
+ 8: GETL R24, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x254750EC: 90010034 stw r0,52(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x34, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254750F0: 93210014 stw r25,20(r1)
+ 18: GETL R25, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x254750F4: 7C791B78 or r25,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R25
+ 25: INCEIPL $4
+
+ 0x254750F8: 831E04F4 lwz r24,1268(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4F4, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R24
+ 30: INCEIPL $4
+
+ 0x254750FC: 80BE0154 lwz r5,340(r30)
+ 31: GETL R30, t24
+ 32: ADDL $0x154, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R5
+ 35: INCEIPL $4
+
+ 0x25475100: 80980010 lwz r4,16(r24)
+ 36: GETL R24, t28
+ 37: ADDL $0x10, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R4
+ 40: INCEIPL $4
+
+ 0x25475104: 80DE015C lwz r6,348(r30)
+ 41: GETL R30, t32
+ 42: ADDL $0x15C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R6
+ 45: INCEIPL $4
+
+ 0x25475108: 8078000C lwz r3,12(r24)
+ 46: GETL R24, t36
+ 47: ADDL $0xC, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R3
+ 50: INCEIPL $4
+
+ 0x2547510C: 9361001C stw r27,28(r1)
+ 51: GETL R27, t40
+ 52: GETL R1, t42
+ 53: ADDL $0x1C, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0x25475110: 93810020 stw r28,32(r1)
+ 56: GETL R28, t44
+ 57: GETL R1, t46
+ 58: ADDL $0x20, t46
+ 59: STL t44, (t46)
+ 60: INCEIPL $4
+
+ 0x25475114: 93E1002C stw r31,44(r1)
+ 61: GETL R31, t48
+ 62: GETL R1, t50
+ 63: ADDL $0x2C, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0x25475118: 7C3F0B78 or r31,r1,r1
+ 66: GETL R1, t52
+ 67: PUTL t52, R31
+ 68: INCEIPL $4
+
+ 0x2547511C: 92E1000C stw r23,12(r1)
+ 69: GETL R23, t54
+ 70: GETL R1, t56
+ 71: ADDL $0xC, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0x25475120: 93410018 stw r26,24(r1)
+ 74: GETL R26, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x18, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0x25475124: 93A10024 stw r29,36(r1)
+ 79: GETL R29, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x24, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x25475128: 4800A629 bl 0x2547F750
+ 84: MOVL $0x2547512C, t66
+ 85: PUTL t66, LR
+ 86: JMPo-c $0x2547F750 ($4)
+
+
+
+. 257 254750E0 76
+. 93 C1 00 28 7F C8 02 A6 93 01 00 10 90 01 00 34 93 21 00 14 7C 79 1B 78 83 1E 04 F4 80 BE 01 54 80 98 00 10 80 DE 01 5C 80 78 00 0C 93 61 00 1C 93 81 00 20 93 E1 00 2C 7C 3F 0B 78 92 E1 00 0C 93 41 00 18 93 A1 00 24 48 00 A6 29
+==== BB 258 _dl_important_hwcaps(0x2547F750) approx BBs exec'd 0 ====
+
+ 0x2547F750: 9421FFB0 stwu r1,-80(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFB0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547F754: 7CE802A6 mflr r7
+ 6: GETL LR, t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x2547F758: 480178A9 bl 0x25497000
+ 9: MOVL $0x2547F75C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 258 2547F750 12
+. 94 21 FF B0 7C E8 02 A6 48 01 78 A9
+==== BB 259 (0x2547F75C) approx BBs exec'd 0 ====
+
+ 0x2547F75C: 93C10048 stw r30,72(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x48, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547F760: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547F764: 93810040 stw r28,64(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x40, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547F768: 90E10054 stw r7,84(r1)
+ 13: GETL R7, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x54, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547F76C: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0x2547F770: 92010010 stw r16,16(r1)
+ 21: GETL R16, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x10, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547F774: 7CD03378 or r16,r6,r6
+ 26: GETL R6, t20
+ 27: PUTL t20, R16
+ 28: INCEIPL $4
+
+ 0x2547F778: 813E04F4 lwz r9,1268(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x4F4, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R9
+ 33: INCEIPL $4
+
+ 0x2547F77C: 9261001C stw r19,28(r1)
+ 34: GETL R19, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x1C, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x2547F780: 7C932378 or r19,r4,r4
+ 39: GETL R4, t30
+ 40: PUTL t30, R19
+ 41: INCEIPL $4
+
+ 0x2547F784: 81690040 lwz r11,64(r9)
+ 42: GETL R9, t32
+ 43: ADDL $0x40, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R11
+ 46: INCEIPL $4
+
+ 0x2547F788: 8009003C lwz r0,60(r9)
+ 47: GETL R9, t36
+ 48: ADDL $0x3C, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R0
+ 51: INCEIPL $4
+
+ 0x2547F78C: 92810020 stw r20,32(r1)
+ 52: GETL R20, t40
+ 53: GETL R1, t42
+ 54: ADDL $0x20, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0x2547F790: 7CB42B78 or r20,r5,r5
+ 57: GETL R5, t44
+ 58: PUTL t44, R20
+ 59: INCEIPL $4
+
+ 0x2547F794: 7C1C5838 and r28,r0,r11
+ 60: GETL R0, t46
+ 61: GETL R11, t48
+ 62: ANDL t46, t48
+ 63: PUTL t48, R28
+ 64: INCEIPL $4
+
+ 0x2547F798: 92C10028 stw r22,40(r1)
+ 65: GETL R22, t50
+ 66: GETL R1, t52
+ 67: ADDL $0x28, t52
+ 68: STL t50, (t52)
+ 69: INCEIPL $4
+
+ 0x2547F79C: 2F9C0000 cmpi cr7,r28,0
+ 70: GETL R28, t54
+ 71: CMP0L t54, t56 (-rSo)
+ 72: ICRFL t56, $0x7, CR
+ 73: INCEIPL $4
+
+ 0x2547F7A0: 93E1004C stw r31,76(r1)
+ 74: GETL R31, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x4C, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0x2547F7A4: 92210014 stw r17,20(r1)
+ 79: GETL R17, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x14, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x2547F7A8: 7C3F0B78 or r31,r1,r1
+ 84: GETL R1, t66
+ 85: PUTL t66, R31
+ 86: INCEIPL $4
+
+ 0x2547F7AC: 92410018 stw r18,24(r1)
+ 87: GETL R18, t68
+ 88: GETL R1, t70
+ 89: ADDL $0x18, t70
+ 90: STL t68, (t70)
+ 91: INCEIPL $4
+
+ 0x2547F7B0: 7C761B78 or r22,r3,r3
+ 92: GETL R3, t72
+ 93: PUTL t72, R22
+ 94: INCEIPL $4
+
+ 0x2547F7B4: 92A10024 stw r21,36(r1)
+ 95: GETL R21, t74
+ 96: GETL R1, t76
+ 97: ADDL $0x24, t76
+ 98: STL t74, (t76)
+ 99: INCEIPL $4
+
+ 0x2547F7B8: 3003FFFF addic r0,r3,-1
+ 100: GETL R3, t78
+ 101: ADCL $0xFFFFFFFF, t78 (-wCa)
+ 102: PUTL t78, R0
+ 103: INCEIPL $4
+
+ 0x2547F7BC: 7D401910 subfe r10,r0,r3
+ 104: GETL R0, t80
+ 105: GETL R3, t82
+ 106: SBBL t80, t82 (-rCa-wCa)
+ 107: PUTL t82, R10
+ 108: INCEIPL $4
+
+ 0x2547F7C0: 92E1002C stw r23,44(r1)
+ 109: GETL R23, t84
+ 110: GETL R1, t86
+ 111: ADDL $0x2C, t86
+ 112: STL t84, (t86)
+ 113: INCEIPL $4
+
+ 0x2547F7C4: 39600000 li r11,0
+ 114: MOVL $0x0, t88
+ 115: PUTL t88, R11
+ 116: INCEIPL $4
+
+ 0x2547F7C8: 93010030 stw r24,48(r1)
+ 117: GETL R24, t90
+ 118: GETL R1, t92
+ 119: ADDL $0x30, t92
+ 120: STL t90, (t92)
+ 121: INCEIPL $4
+
+ 0x2547F7CC: 93210034 stw r25,52(r1)
+ 122: GETL R25, t94
+ 123: GETL R1, t96
+ 124: ADDL $0x34, t96
+ 125: STL t94, (t96)
+ 126: INCEIPL $4
+
+ 0x2547F7D0: 93410038 stw r26,56(r1)
+ 127: GETL R26, t98
+ 128: GETL R1, t100
+ 129: ADDL $0x38, t100
+ 130: STL t98, (t100)
+ 131: INCEIPL $4
+
+ 0x2547F7D4: 9361003C stw r27,60(r1)
+ 132: GETL R27, t102
+ 133: GETL R1, t104
+ 134: ADDL $0x3C, t104
+ 135: STL t102, (t104)
+ 136: INCEIPL $4
+
+ 0x2547F7D8: 93A10044 stw r29,68(r1)
+ 137: GETL R29, t106
+ 138: GETL R1, t108
+ 139: ADDL $0x44, t108
+ 140: STL t106, (t108)
+ 141: INCEIPL $4
+
+ 0x2547F7DC: 9181000C stw r12,12(r1)
+ 142: GETL R12, t110
+ 143: GETL R1, t112
+ 144: ADDL $0xC, t112
+ 145: STL t110, (t112)
+ 146: INCEIPL $4
+
+ 0x2547F7E0: 419E0028 bc 12,30,0x2547F808
+ 147: Js30o $0x2547F808
+
+
+
+. 259 2547F75C 136
+. 93 C1 00 48 7F C8 02 A6 93 81 00 40 90 E1 00 54 7D 80 00 26 92 01 00 10 7C D0 33 78 81 3E 04 F4 92 61 00 1C 7C 93 23 78 81 69 00 40 80 09 00 3C 92 81 00 20 7C B4 2B 78 7C 1C 58 38 92 C1 00 28 2F 9C 00 00 93 E1 00 4C 92 21 00 14 7C 3F 0B 78 92 41 00 18 7C 76 1B 78 92 A1 00 24 30 03 FF FF 7D 40 19 10 92 E1 00 2C 39 60 00 00 93 01 00 30 93 21 00 34 93 41 00 38 93 61 00 3C 93 A1 00 44 91 81 00 0C 41 9E 00 28
+==== BB 260 (0x2547F808) approx BBs exec'd 0 ====
+
+ 0x2547F808: 3B0A0001 addi r24,r10,1
+ 0: GETL R10, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R24
+ 3: INCEIPL $4
+
+ 0x2547F80C: 82210000 lwz r17,0(r1)
+ 4: GETL R1, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R17
+ 7: INCEIPL $4
+
+ 0x2547F810: 57121838 rlwinm r18,r24,3,0,28
+ 8: GETL R24, t6
+ 9: SHLL $0x3, t6
+ 10: PUTL t6, R18
+ 11: INCEIPL $4
+
+ 0x2547F814: 3B200000 li r25,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R25
+ 14: INCEIPL $4
+
+ 0x2547F818: 3AF2001E addi r23,r18,30
+ 15: GETL R18, t10
+ 16: ADDL $0x1E, t10
+ 17: PUTL t10, R23
+ 18: INCEIPL $4
+
+ 0x2547F81C: 3B400000 li r26,0
+ 19: MOVL $0x0, t12
+ 20: PUTL t12, R26
+ 21: INCEIPL $4
+
+ 0x2547F820: 56F50036 rlwinm r21,r23,0,0,27
+ 22: GETL R23, t14
+ 23: ANDL $0xFFFFFFF0, t14
+ 24: PUTL t14, R21
+ 25: INCEIPL $4
+
+ 0x2547F824: 7D5500D0 neg r10,r21
+ 26: GETL R21, t16
+ 27: NEGL t16
+ 28: PUTL t16, R10
+ 29: INCEIPL $4
+
+ 0x2547F828: 7E21516E stwux r17,r1,r10
+ 30: GETL R10, t18
+ 31: GETL R1, t20
+ 32: ADDL t20, t18
+ 33: PUTL t18, R1
+ 34: GETL R17, t22
+ 35: STL t22, (t18)
+ 36: INCEIPL $4
+
+ 0x2547F82C: 39010017 addi r8,r1,23
+ 37: GETL R1, t24
+ 38: ADDL $0x17, t24
+ 39: PUTL t24, R8
+ 40: INCEIPL $4
+
+ 0x2547F830: 551B0036 rlwinm r27,r8,0,0,27
+ 41: GETL R8, t26
+ 42: ANDL $0xFFFFFFF0, t26
+ 43: PUTL t26, R27
+ 44: INCEIPL $4
+
+ 0x2547F834: 419E0048 bc 12,30,0x2547F87C
+ 45: Js30o $0x2547F87C
+
+
+
+. 260 2547F808 48
+. 3B 0A 00 01 82 21 00 00 57 12 18 38 3B 20 00 00 3A F2 00 1E 3B 40 00 00 56 F5 00 36 7D 55 00 D0 7E 21 51 6E 39 01 00 17 55 1B 00 36 41 9E 00 48
+==== BB 261 (0x2547F87C) approx BBs exec'd 0 ====
+
+ 0x2547F87C: 2F960000 cmpi cr7,r22,0
+ 0: GETL R22, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547F880: 419E0018 bc 12,30,0x2547F898
+ 4: Js30o $0x2547F898
+
+
+
+. 261 2547F87C 8
+. 2F 96 00 00 41 9E 00 18
+==== BB 262 (0x2547F898) approx BBs exec'd 0 ====
+
+ 0x2547F898: 2E180001 cmpi cr4,r24,1
+ 0: GETL R24, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x2547F89C: 57291838 rlwinm r9,r25,3,0,28
+ 5: GETL R25, t6
+ 6: SHLL $0x3, t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0x2547F8A0: 833E0410 lwz r25,1040(r30)
+ 9: GETL R30, t8
+ 10: ADDL $0x410, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R25
+ 13: INCEIPL $4
+
+ 0x2547F8A4: 7E69DA14 add r19,r9,r27
+ 14: GETL R9, t12
+ 15: GETL R27, t14
+ 16: ADDL t12, t14
+ 17: PUTL t14, R19
+ 18: INCEIPL $4
+
+ 0x2547F8A8: 3AC00003 li r22,3
+ 19: MOVL $0x3, t16
+ 20: PUTL t16, R22
+ 21: INCEIPL $4
+
+ 0x2547F8AC: 7F29D92E stwx r25,r9,r27
+ 22: GETL R27, t18
+ 23: GETL R9, t20
+ 24: ADDL t20, t18
+ 25: GETL R25, t22
+ 26: STL t22, (t18)
+ 27: INCEIPL $4
+
+ 0x2547F8B0: 92D30004 stw r22,4(r19)
+ 28: GETL R22, t24
+ 29: GETL R19, t26
+ 30: ADDL $0x4, t26
+ 31: STL t24, (t26)
+ 32: INCEIPL $4
+
+ 0x2547F8B4: 41920324 bc 12,18,0x2547FBD8
+ 33: Js18o $0x2547FBD8
+
+
+
+. 262 2547F898 32
+. 2E 18 00 01 57 29 18 38 83 3E 04 10 7E 69 DA 14 3A C0 00 03 7F 29 D9 2E 92 D3 00 04 41 92 03 24
+==== BB 263 (0x2547FBD8) approx BBs exec'd 0 ====
+
+ 0x2547FBD8: 819B0004 lwz r12,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x2547FBDC: 390C0001 addi r8,r12,1
+ 5: GETL R12, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x2547FBE0: 4BFFFD30 b 0x2547F910
+ 9: JMPo $0x2547F910 ($4)
+
+
+
+. 263 2547FBD8 12
+. 81 9B 00 04 39 0C 00 01 4B FF FD 30
+==== BB 264 (0x2547F910) approx BBs exec'd 0 ====
+
+ 0x2547F910: 3BA00001 li r29,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0x2547F914: 7FAAC030 slw r10,r29,r24
+ 3: GETL R29, t4
+ 4: GETL R24, t2
+ 5: SHLL t2, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0x2547F918: 555A1838 rlwinm r26,r10,3,0,28
+ 8: GETL R10, t6
+ 9: SHLL $0x3, t6
+ 10: PUTL t6, R26
+ 11: INCEIPL $4
+
+ 0x2547F91C: 91540000 stw r10,0(r20)
+ 12: GETL R10, t8
+ 13: GETL R20, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x2547F920: 7C7A4214 add r3,r26,r8
+ 16: GETL R26, t12
+ 17: GETL R8, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R3
+ 20: INCEIPL $4
+
+ 0x2547F924: 48018101 bl 0x25497A24
+ 21: MOVL $0x2547F928, t16
+ 22: PUTL t16, LR
+ 23: JMPo-c $0x25497A24 ($4)
+
+
+
+. 264 2547F910 24
+. 3B A0 00 01 7F AA C0 30 55 5A 18 38 91 54 00 00 7C 7A 42 14 48 01 81 01
+==== BB 265 (0x2547FDC8) approx BBs exec'd 0 ====
+
+ 0x2547FDC8: 813F0000 lwz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547FDCC: 7C895214 add r4,r9,r10
+ 4: GETL R9, t4
+ 5: GETL R10, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x2547FDD0: 3804FFFF addi r0,r4,-1
+ 9: GETL R4, t8
+ 10: ADDL $0xFFFFFFFF, t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x2547FDD4: 7C0AE838 and r10,r0,r29
+ 13: GETL R0, t10
+ 14: GETL R29, t12
+ 15: ANDL t10, t12
+ 16: PUTL t12, R10
+ 17: INCEIPL $4
+
+ 0x2547FDD8: 7D8AE214 add r12,r10,r28
+ 18: GETL R10, t14
+ 19: GETL R28, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R12
+ 22: INCEIPL $4
+
+ 0x2547FDDC: 915F0000 stw r10,0(r31)
+ 23: GETL R10, t18
+ 24: GETL R31, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0x2547FDE0: 7C0C5840 cmpl cr0,r12,r11
+ 27: GETL R12, t22
+ 28: GETL R11, t24
+ 29: CMPUL t22, t24, t26 (-rSo)
+ 30: ICRFL t26, $0x0, CR
+ 31: INCEIPL $4
+
+ 0x2547FDE4: 4080003C bc 4,0,0x2547FE20
+ 32: Jc00o $0x2547FE20
+
+
+
+. 265 2547FDC8 32
+. 81 3F 00 00 7C 89 52 14 38 04 FF FF 7C 0A E8 38 7D 8A E2 14 91 5F 00 00 7C 0C 58 40 40 80 00 3C
+==== BB 266 (0x2547F928) approx BBs exec'd 0 ====
+
+ 0x2547F928: 7C761B79 or. r22,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R22
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547F92C: 418202E8 bc 12,2,0x2547FC14
+ 5: Js02o $0x2547FC14
+
+
+
+. 266 2547F928 8
+. 7C 76 1B 79 41 82 02 E8
+==== BB 267 (0x2547F930) approx BBs exec'd 0 ====
+
+ 0x2547F930: 419201FC bc 12,18,0x2547FB2C
+ 0: Js18o $0x2547FB2C
+
+
+
+. 267 2547F930 4
+. 41 92 01 FC
+==== BB 268 (0x2547FB2C) approx BBs exec'd 0 ====
+
+ 0x2547FB2C: 83340000 lwz r25,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R25
+ 3: INCEIPL $4
+
+ 0x2547FB30: 39000000 li r8,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R8
+ 6: INCEIPL $4
+
+ 0x2547FB34: 827B0004 lwz r19,4(r27)
+ 7: GETL R27, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R19
+ 11: INCEIPL $4
+
+ 0x2547FB38: 3B00002F li r24,47
+ 12: MOVL $0x2F, t10
+ 13: PUTL t10, R24
+ 14: INCEIPL $4
+
+ 0x2547FB3C: 57291838 rlwinm r9,r25,3,0,28
+ 15: GETL R25, t12
+ 16: SHLL $0x3, t12
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0x2547FB40: 9116000C stw r8,12(r22)
+ 19: GETL R8, t14
+ 20: GETL R22, t16
+ 21: ADDL $0xC, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x2547FB44: 7C69B214 add r3,r9,r22
+ 24: GETL R9, t18
+ 25: GETL R22, t20
+ 26: ADDL t18, t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0x2547FB48: 3B930001 addi r28,r19,1
+ 29: GETL R19, t22
+ 30: ADDL $0x1, t22
+ 31: PUTL t22, R28
+ 32: INCEIPL $4
+
+ 0x2547FB4C: 93960004 stw r28,4(r22)
+ 33: GETL R28, t24
+ 34: GETL R22, t26
+ 35: ADDL $0x4, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0x2547FB50: 3A400002 li r18,2
+ 38: MOVL $0x2, t28
+ 39: PUTL t28, R18
+ 40: INCEIPL $4
+
+ 0x2547FB54: 90760000 stw r3,0(r22)
+ 41: GETL R3, t30
+ 42: GETL R22, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x2547FB58: 90760008 stw r3,8(r22)
+ 45: GETL R3, t34
+ 46: GETL R22, t36
+ 47: ADDL $0x8, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0x2547FB5C: 80BB0004 lwz r5,4(r27)
+ 50: GETL R27, t38
+ 51: ADDL $0x4, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R5
+ 54: INCEIPL $4
+
+ 0x2547FB60: 809B0000 lwz r4,0(r27)
+ 55: GETL R27, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R4
+ 58: INCEIPL $4
+
+ 0x2547FB64: 48003EBD bl 0x25483A20
+ 59: MOVL $0x2547FB68, t46
+ 60: PUTL t46, LR
+ 61: JMPo-c $0x25483A20 ($4)
+
+
+
+. 268 2547FB2C 60
+. 83 34 00 00 39 00 00 00 82 7B 00 04 3B 00 00 2F 57 29 18 38 91 16 00 0C 7C 69 B2 14 3B 93 00 01 93 96 00 04 3A 40 00 02 90 76 00 00 90 76 00 08 80 BB 00 04 80 9B 00 00 48 00 3E BD
+==== BB 269 mempcpy(0x25483A20) approx BBs exec'd 0 ====
+
+ 0x25483A20: 2B85000F cmpli cr7,r5,15
+ 0: GETL R5, t0
+ 1: MOVL $0xF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25483A24: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0x25483A28: 9421FFE0 stwu r1,-32(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFFE0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25483A2C: 93A10014 stw r29,20(r1)
+ 14: GETL R29, t12
+ 15: GETL R1, t14
+ 16: ADDL $0x14, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25483A30: 7C7D1B78 or r29,r3,r3
+ 19: GETL R3, t16
+ 20: PUTL t16, R29
+ 21: INCEIPL $4
+
+ 0x25483A34: 93E1001C stw r31,28(r1)
+ 22: GETL R31, t18
+ 23: GETL R1, t20
+ 24: ADDL $0x1C, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0x25483A38: 7C9F2378 or r31,r4,r4
+ 27: GETL R4, t22
+ 28: PUTL t22, R31
+ 29: INCEIPL $4
+
+ 0x25483A3C: 93810010 stw r28,16(r1)
+ 30: GETL R28, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x10, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x25483A40: 93C10018 stw r30,24(r1)
+ 35: GETL R30, t28
+ 36: GETL R1, t30
+ 37: ADDL $0x18, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x25483A44: 90010024 stw r0,36(r1)
+ 40: GETL R0, t32
+ 41: GETL R1, t34
+ 42: ADDL $0x24, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0x25483A48: 409D0058 bc 4,29,0x25483AA0
+ 45: Jc29o $0x25483AA0
+
+
+
+. 269 25483A20 44
+. 2B 85 00 0F 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 E1 00 1C 7C 9F 23 78 93 81 00 10 93 C1 00 18 90 01 00 24 40 9D 00 58
+==== BB 270 (0x25483AA0) approx BBs exec'd 0 ====
+
+ 0x25483AA0: 2C850000 cmpi cr1,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x25483AA4: 4186001C bc 12,6,0x25483AC0
+ 4: Js06o $0x25483AC0
+
+
+
+. 270 25483AA0 8
+. 2C 85 00 00 41 86 00 1C
+==== BB 271 (0x25483AA8) approx BBs exec'd 0 ====
+
+ 0x25483AA8: 7CA903A6 mtctr r5
+ 0: GETL R5, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x25483AAC: 88FF0000 lbz r7,0(r31)
+ 3: GETL R31, t2
+ 4: LDB (t2), t4
+ 5: PUTL t4, R7
+ 6: INCEIPL $4
+
+ 0x25483AB0: 3BFF0001 addi r31,r31,1
+ 7: GETL R31, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R31
+ 10: INCEIPL $4
+
+ 0x25483AB4: 98FD0000 stb r7,0(r29)
+ 11: GETL R7, t8
+ 12: GETL R29, t10
+ 13: STB t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25483AB8: 3BBD0001 addi r29,r29,1
+ 15: GETL R29, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0x25483ABC: 4200FFF0 bc 16,0,0x25483AAC
+ 19: GETL CTR, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, CTR
+ 22: JIFZL t14, $0x25483AC0
+ 23: JMPo $0x25483AAC ($4)
+
+
+
+. 271 25483AA8 24
+. 7C A9 03 A6 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
+==== BB 272 (0x25483AAC) approx BBs exec'd 0 ====
+
+ 0x25483AAC: 88FF0000 lbz r7,0(r31)
+ 0: GETL R31, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25483AB0: 3BFF0001 addi r31,r31,1
+ 4: GETL R31, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0x25483AB4: 98FD0000 stb r7,0(r29)
+ 8: GETL R7, t6
+ 9: GETL R29, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25483AB8: 3BBD0001 addi r29,r29,1
+ 12: GETL R29, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0x25483ABC: 4200FFF0 bc 16,0,0x25483AAC
+ 16: GETL CTR, t12
+ 17: ADDL $0xFFFFFFFF, t12
+ 18: PUTL t12, CTR
+ 19: JIFZL t12, $0x25483AC0
+ 20: JMPo $0x25483AAC ($4)
+
+
+
+. 272 25483AAC 20
+. 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
+==== BB 273 (0x25483AC0) approx BBs exec'd 0 ====
+
+ 0x25483AC0: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25483AC4: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483AC8: 83810010 lwz r28,16(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0x25483ACC: 83A10014 lwz r29,20(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x14, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0x25483AD0: 7D0803A6 mtlr r8
+ 18: GETL R8, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x25483AD4: 83C10018 lwz r30,24(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x18, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R30
+ 25: INCEIPL $4
+
+ 0x25483AD8: 83E1001C lwz r31,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0x25483ADC: 38210020 addi r1,r1,32
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0x25483AE0: 4E800020 blr
+ 35: GETL LR, t26
+ 36: JMPo-r t26 ($4)
+
+
+
+. 273 25483AC0 36
+. 81 01 00 24 7F A3 EB 78 83 81 00 10 83 A1 00 14 7D 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 274 (0x2547FB68) approx BBs exec'd 0 ====
+
+ 0x2547FB68: 9B030000 stb r24,0(r3)
+ 0: GETL R24, t0
+ 1: GETL R3, t2
+ 2: STB t0, (t2)
+ 3: INCEIPL $4
+
+ 0x2547FB6C: 92540000 stw r18,0(r20)
+ 4: GETL R18, t4
+ 5: GETL R20, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0x2547FB70: 83760004 lwz r27,4(r22)
+ 8: GETL R22, t8
+ 9: ADDL $0x4, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R27
+ 12: INCEIPL $4
+
+ 0x2547FB74: 7EC3B378 or r3,r22,r22
+ 13: GETL R22, t12
+ 14: PUTL t12, R3
+ 15: INCEIPL $4
+
+ 0x2547FB78: 93700000 stw r27,0(r16)
+ 16: GETL R27, t14
+ 17: GETL R16, t16
+ 18: STL t14, (t16)
+ 19: INCEIPL $4
+
+ 0x2547FB7C: 81010000 lwz r8,0(r1)
+ 20: GETL R1, t18
+ 21: LDL (t18), t20
+ 22: PUTL t20, R8
+ 23: INCEIPL $4
+
+ 0x2547FB80: 82080004 lwz r16,4(r8)
+ 24: GETL R8, t22
+ 25: ADDL $0x4, t22
+ 26: LDL (t22), t24
+ 27: PUTL t24, R16
+ 28: INCEIPL $4
+
+ 0x2547FB84: 80E8FFBC lwz r7,-68(r8)
+ 29: GETL R8, t26
+ 30: ADDL $0xFFFFFFBC, t26
+ 31: LDL (t26), t28
+ 32: PUTL t28, R7
+ 33: INCEIPL $4
+
+ 0x2547FB88: 7E0803A6 mtlr r16
+ 34: GETL R16, t30
+ 35: PUTL t30, LR
+ 36: INCEIPL $4
+
+ 0x2547FB8C: 8228FFC4 lwz r17,-60(r8)
+ 37: GETL R8, t32
+ 38: ADDL $0xFFFFFFC4, t32
+ 39: LDL (t32), t34
+ 40: PUTL t34, R17
+ 41: INCEIPL $4
+
+ 0x2547FB90: 8208FFC0 lwz r16,-64(r8)
+ 42: GETL R8, t36
+ 43: ADDL $0xFFFFFFC0, t36
+ 44: LDL (t36), t38
+ 45: PUTL t38, R16
+ 46: INCEIPL $4
+
+ 0x2547FB94: 7CE08120 mtcrf 0x8,r7
+ 47: GETL R7, t40
+ 48: ICRFL t40, $0x4, CR
+ 49: INCEIPL $4
+
+ 0x2547FB98: 8248FFC8 lwz r18,-56(r8)
+ 50: GETL R8, t42
+ 51: ADDL $0xFFFFFFC8, t42
+ 52: LDL (t42), t44
+ 53: PUTL t44, R18
+ 54: INCEIPL $4
+
+ 0x2547FB9C: 8268FFCC lwz r19,-52(r8)
+ 55: GETL R8, t46
+ 56: ADDL $0xFFFFFFCC, t46
+ 57: LDL (t46), t48
+ 58: PUTL t48, R19
+ 59: INCEIPL $4
+
+ 0x2547FBA0: 8288FFD0 lwz r20,-48(r8)
+ 60: GETL R8, t50
+ 61: ADDL $0xFFFFFFD0, t50
+ 62: LDL (t50), t52
+ 63: PUTL t52, R20
+ 64: INCEIPL $4
+
+ 0x2547FBA4: 82A8FFD4 lwz r21,-44(r8)
+ 65: GETL R8, t54
+ 66: ADDL $0xFFFFFFD4, t54
+ 67: LDL (t54), t56
+ 68: PUTL t56, R21
+ 69: INCEIPL $4
+
+ 0x2547FBA8: 82C8FFD8 lwz r22,-40(r8)
+ 70: GETL R8, t58
+ 71: ADDL $0xFFFFFFD8, t58
+ 72: LDL (t58), t60
+ 73: PUTL t60, R22
+ 74: INCEIPL $4
+
+ 0x2547FBAC: 82E8FFDC lwz r23,-36(r8)
+ 75: GETL R8, t62
+ 76: ADDL $0xFFFFFFDC, t62
+ 77: LDL (t62), t64
+ 78: PUTL t64, R23
+ 79: INCEIPL $4
+
+ 0x2547FBB0: 8308FFE0 lwz r24,-32(r8)
+ 80: GETL R8, t66
+ 81: ADDL $0xFFFFFFE0, t66
+ 82: LDL (t66), t68
+ 83: PUTL t68, R24
+ 84: INCEIPL $4
+
+ 0x2547FBB4: 8328FFE4 lwz r25,-28(r8)
+ 85: GETL R8, t70
+ 86: ADDL $0xFFFFFFE4, t70
+ 87: LDL (t70), t72
+ 88: PUTL t72, R25
+ 89: INCEIPL $4
+
+ 0x2547FBB8: 8348FFE8 lwz r26,-24(r8)
+ 90: GETL R8, t74
+ 91: ADDL $0xFFFFFFE8, t74
+ 92: LDL (t74), t76
+ 93: PUTL t76, R26
+ 94: INCEIPL $4
+
+ 0x2547FBBC: 8368FFEC lwz r27,-20(r8)
+ 95: GETL R8, t78
+ 96: ADDL $0xFFFFFFEC, t78
+ 97: LDL (t78), t80
+ 98: PUTL t80, R27
+ 99: INCEIPL $4
+
+ 0x2547FBC0: 8388FFF0 lwz r28,-16(r8)
+ 100: GETL R8, t82
+ 101: ADDL $0xFFFFFFF0, t82
+ 102: LDL (t82), t84
+ 103: PUTL t84, R28
+ 104: INCEIPL $4
+
+ 0x2547FBC4: 83A8FFF4 lwz r29,-12(r8)
+ 105: GETL R8, t86
+ 106: ADDL $0xFFFFFFF4, t86
+ 107: LDL (t86), t88
+ 108: PUTL t88, R29
+ 109: INCEIPL $4
+
+ 0x2547FBC8: 83C8FFF8 lwz r30,-8(r8)
+ 110: GETL R8, t90
+ 111: ADDL $0xFFFFFFF8, t90
+ 112: LDL (t90), t92
+ 113: PUTL t92, R30
+ 114: INCEIPL $4
+
+ 0x2547FBCC: 83E8FFFC lwz r31,-4(r8)
+ 115: GETL R8, t94
+ 116: ADDL $0xFFFFFFFC, t94
+ 117: LDL (t94), t96
+ 118: PUTL t96, R31
+ 119: INCEIPL $4
+
+ 0x2547FBD0: 7D014378 or r1,r8,r8
+ 120: GETL R8, t98
+ 121: PUTL t98, R1
+ 122: INCEIPL $4
+
+ 0x2547FBD4: 4E800020 blr
+ 123: GETL LR, t100
+ 124: JMPo-r t100 ($4)
+
+
+
+. 274 2547FB68 112
+. 9B 03 00 00 92 54 00 00 83 76 00 04 7E C3 B3 78 93 70 00 00 81 01 00 00 82 08 00 04 80 E8 FF BC 7E 08 03 A6 82 28 FF C4 82 08 FF C0 7C E0 81 20 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
+==== BB 275 (0x2547512C) approx BBs exec'd 0 ====
+
+ 0x2547512C: 813E0160 lwz r9,352(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x160, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475130: 837E0164 lwz r27,356(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x164, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R27
+ 9: INCEIPL $4
+
+ 0x25475134: 90690000 stw r3,0(r9)
+ 10: GETL R3, t8
+ 11: GETL R9, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25475138: 3860000C li r3,12
+ 14: MOVL $0xC, t12
+ 15: PUTL t12, R3
+ 16: INCEIPL $4
+
+ 0x2547513C: 480228E9 bl 0x25497A24
+ 17: MOVL $0x25475140, t14
+ 18: PUTL t14, LR
+ 19: JMPo-c $0x25497A24 ($4)
+
+
+
+. 275 2547512C 20
+. 81 3E 01 60 83 7E 01 64 90 69 00 00 38 60 00 0C 48 02 28 E9
+==== BB 276 (0x25475140) approx BBs exec'd 0 ====
+
+ 0x25475140: 7C7C1B79 or. r28,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R28
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25475144: 907B0000 stw r3,0(r27)
+ 5: GETL R3, t4
+ 6: GETL R27, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x25475148: 41820188 bc 12,2,0x254752D0
+ 9: Js02o $0x254752D0
+
+
+
+. 276 25475140 12
+. 7C 7C 1B 79 90 7B 00 00 41 82 01 88
+==== BB 277 (0x2547514C) approx BBs exec'd 0 ====
+
+ 0x2547514C: 835E0154 lwz r26,340(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x154, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25475150: 3D40CCCC lis r10,-13108
+ 5: MOVL $0xCCCC0000, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0x25475154: 6146CCCD ori r6,r10,0xCCCD
+ 8: MOVL $0xCCCCCCCD, t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0x25475158: 811A0000 lwz r8,0(r26)
+ 11: GETL R26, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R8
+ 14: INCEIPL $4
+
+ 0x2547515C: 5507103A rlwinm r7,r8,2,0,29
+ 15: GETL R8, t12
+ 16: SHLL $0x2, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0x25475160: 38A70027 addi r5,r7,39
+ 19: GETL R7, t14
+ 20: ADDL $0x27, t14
+ 21: PUTL t14, R5
+ 22: INCEIPL $4
+
+ 0x25475164: 7C653016 mulhwu r3,r5,r6
+ 23: GETL R5, t16
+ 24: GETL R6, t18
+ 25: UMULHL t16, t18
+ 26: PUTL t18, R3
+ 27: INCEIPL $4
+
+ 0x25475168: 547DE13E rlwinm r29,r3,28,4,31
+ 28: GETL R3, t20
+ 29: SHRL $0x4, t20
+ 30: PUTL t20, R29
+ 31: INCEIPL $4
+
+ 0x2547516C: 1C7D0140 mulli r3,r29,320
+ 32: GETL R29, t22
+ 33: MULL $0x140, t22
+ 34: PUTL t22, R3
+ 35: INCEIPL $4
+
+ 0x25475170: 480228B5 bl 0x25497A24
+ 36: MOVL $0x25475174, t24
+ 37: PUTL t24, LR
+ 38: JMPo-c $0x25497A24 ($4)
+
+
+
+. 277 2547514C 40
+. 83 5E 01 54 3D 40 CC CC 61 46 CC CD 81 1A 00 00 55 07 10 3A 38 A7 00 27 7C 65 30 16 54 7D E1 3E 1C 7D 01 40 48 02 28 B5
+==== BB 278 (0x25475174) approx BBs exec'd 0 ====
+
+ 0x25475174: 809B0000 lwz r4,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25475178: 907C0000 stw r3,0(r28)
+ 4: GETL R3, t4
+ 5: GETL R28, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0x2547517C: 81240000 lwz r9,0(r4)
+ 8: GETL R4, t8
+ 9: LDL (t8), t10
+ 10: PUTL t10, R9
+ 11: INCEIPL $4
+
+ 0x25475180: 80DE0188 lwz r6,392(r30)
+ 12: GETL R30, t12
+ 13: ADDL $0x188, t12
+ 14: LDL (t12), t14
+ 15: PUTL t14, R6
+ 16: INCEIPL $4
+
+ 0x25475184: 2F890000 cmpi cr7,r9,0
+ 17: GETL R9, t16
+ 18: CMP0L t16, t18 (-rSo)
+ 19: ICRFL t18, $0x7, CR
+ 20: INCEIPL $4
+
+ 0x25475188: 419E014C bc 12,30,0x254752D4
+ 21: Js30o $0x254752D4
+
+
+
+. 278 25475174 24
+. 80 9B 00 00 90 7C 00 00 81 24 00 00 80 DE 01 88 2F 89 00 00 41 9E 01 4C
+==== BB 279 (0x2547518C) approx BBs exec'd 0 ====
+
+ 0x2547518C: 82FE04C8 lwz r23,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x25475190: 39600000 li r11,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x25475194: 1C7D0014 mulli r3,r29,20
+ 8: GETL R29, t6
+ 9: MULL $0x14, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x25475198: 80FA0000 lwz r7,0(r26)
+ 12: GETL R26, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R7
+ 15: INCEIPL $4
+
+ 0x2547519C: 811E014C lwz r8,332(r30)
+ 16: GETL R30, t12
+ 17: ADDL $0x14C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R8
+ 20: INCEIPL $4
+
+ 0x254751A0: 39400000 li r10,0
+ 21: MOVL $0x0, t16
+ 22: PUTL t16, R10
+ 23: INCEIPL $4
+
+ 0x254751A4: 809E0194 lwz r4,404(r30)
+ 24: GETL R30, t18
+ 25: ADDL $0x194, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R4
+ 28: INCEIPL $4
+
+ 0x254751A8: 38C00000 li r6,0
+ 29: MOVL $0x0, t22
+ 30: PUTL t22, R6
+ 31: INCEIPL $4
+
+ 0x254751AC: 80BE0148 lwz r5,328(r30)
+ 32: GETL R30, t24
+ 33: ADDL $0x148, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R5
+ 36: INCEIPL $4
+
+ 0x254751B0: 917B0004 stw r11,4(r27)
+ 37: GETL R11, t28
+ 38: GETL R27, t30
+ 39: ADDL $0x4, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0x254751B4: 7D2B4B78 or r11,r9,r9
+ 42: GETL R9, t32
+ 43: PUTL t32, R11
+ 44: INCEIPL $4
+
+ 0x254751B8: 913701B0 stw r9,432(r23)
+ 45: GETL R9, t34
+ 46: GETL R23, t36
+ 47: ADDL $0x1B0, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0x254751BC: 555B103A rlwinm r27,r10,2,0,29
+ 50: GETL R10, t38
+ 51: SHLL $0x2, t38
+ 52: PUTL t38, R27
+ 53: INCEIPL $4
+
+ 0x254751C0: 7C863840 cmpl cr1,r6,r7
+ 54: GETL R6, t40
+ 55: GETL R7, t42
+ 56: CMPUL t40, t42, t44 (-rSo)
+ 57: ICRFL t44, $0x1, CR
+ 58: INCEIPL $4
+
+ 0x254751C4: 7F5B282E lwzx r26,r27,r5
+ 59: GETL R5, t46
+ 60: GETL R27, t48
+ 61: ADDL t48, t46
+ 62: LDL (t46), t50
+ 63: PUTL t50, R26
+ 64: INCEIPL $4
+
+ 0x254751C8: 917C0000 stw r11,0(r28)
+ 65: GETL R11, t52
+ 66: GETL R28, t54
+ 67: STL t52, (t54)
+ 68: INCEIPL $4
+
+ 0x254751CC: 3B9C0004 addi r28,r28,4
+ 69: GETL R28, t56
+ 70: ADDL $0x4, t56
+ 71: PUTL t56, R28
+ 72: INCEIPL $4
+
+ 0x254751D0: 7D9A4214 add r12,r26,r8
+ 73: GETL R26, t58
+ 74: GETL R8, t60
+ 75: ADDL t58, t60
+ 76: PUTL t60, R12
+ 77: INCEIPL $4
+
+ 0x254751D4: 910B000C stw r8,12(r11)
+ 78: GETL R8, t62
+ 79: GETL R11, t64
+ 80: ADDL $0xC, t64
+ 81: STL t62, (t64)
+ 82: INCEIPL $4
+
+ 0x254751D8: 908B0004 stw r4,4(r11)
+ 83: GETL R4, t66
+ 84: GETL R11, t68
+ 85: ADDL $0x4, t68
+ 86: STL t66, (t68)
+ 87: INCEIPL $4
+
+ 0x254751DC: 390C0001 addi r8,r12,1
+ 88: GETL R12, t70
+ 89: ADDL $0x1, t70
+ 90: PUTL t70, R8
+ 91: INCEIPL $4
+
+ 0x254751E0: 90CB0008 stw r6,8(r11)
+ 92: GETL R6, t72
+ 93: GETL R11, t74
+ 94: ADDL $0x8, t74
+ 95: STL t72, (t74)
+ 96: INCEIPL $4
+
+ 0x254751E4: 934B0010 stw r26,16(r11)
+ 97: GETL R26, t76
+ 98: GETL R11, t78
+ 99: ADDL $0x10, t78
+ 100: STL t76, (t78)
+ 101: INCEIPL $4
+
+ 0x254751E8: 4084001C bc 4,4,0x25475204
+ 102: Jc04o $0x25475204
+
+
+
+. 279 2547518C 96
+. 82 FE 04 C8 39 60 00 00 1C 7D 00 14 80 FA 00 00 81 1E 01 4C 39 40 00 00 80 9E 01 94 38 C0 00 00 80 BE 01 48 91 7B 00 04 7D 2B 4B 78 91 37 01 B0 55 5B 10 3A 7C 86 38 40 7F 5B 28 2E 91 7C 00 00 3B 9C 00 04 7D 9A 42 14 91 0B 00 0C 90 8B 00 04 39 0C 00 01 90 CB 00 08 93 4B 00 10 40 84 00 1C
+==== BB 280 (0x254751EC) approx BBs exec'd 0 ====
+
+ 0x254751EC: 7CE903A6 mtctr r7
+ 0: GETL R7, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x254751F0: 38000000 li r0,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x254751F4: 392B0014 addi r9,r11,20
+ 6: GETL R11, t4
+ 7: ADDL $0x14, t4
+ 8: PUTL t4, R9
+ 9: INCEIPL $4
+
+ 0x254751F8: 90090000 stw r0,0(r9)
+ 10: GETL R0, t6
+ 11: GETL R9, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x254751FC: 39290004 addi r9,r9,4
+ 14: GETL R9, t10
+ 15: ADDL $0x4, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x25475200: 4200FFF8 bc 16,0,0x254751F8
+ 18: GETL CTR, t12
+ 19: ADDL $0xFFFFFFFF, t12
+ 20: PUTL t12, CTR
+ 21: JIFZL t12, $0x25475204
+ 22: JMPo $0x254751F8 ($4)
+
+
+
+. 280 254751EC 24
+. 7C E9 03 A6 38 00 00 00 39 2B 00 14 90 09 00 00 39 29 00 04 42 00 FF F8
+==== BB 281 (0x254751F8) approx BBs exec'd 0 ====
+
+ 0x254751F8: 90090000 stw r0,0(r9)
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x254751FC: 39290004 addi r9,r9,4
+ 4: GETL R9, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x25475200: 4200FFF8 bc 16,0,0x254751F8
+ 8: GETL CTR, t6
+ 9: ADDL $0xFFFFFFFF, t6
+ 10: PUTL t6, CTR
+ 11: JIFZL t6, $0x25475204
+ 12: JMPo $0x254751F8 ($4)
+
+
+
+. 281 254751F8 12
+. 90 09 00 00 39 29 00 04 42 00 FF F8
+==== BB 282 (0x25475204) approx BBs exec'd 0 ====
+
+ 0x25475204: 2F0A0001 cmpi cr6,r10,1
+ 0: GETL R10, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25475208: 394A0001 addi r10,r10,1
+ 5: GETL R10, t6
+ 6: ADDL $0x1, t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0x2547520C: 419A00BC bc 12,26,0x254752C8
+ 9: Js26o $0x254752C8
+
+
+
+. 282 25475204 12
+. 2F 0A 00 01 39 4A 00 01 41 9A 00 BC
+==== BB 283 (0x25475210) approx BBs exec'd 0 ====
+
+ 0x25475210: 7C035A14 add r0,r3,r11
+ 0: GETL R3, t0
+ 1: GETL R11, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475214: 280A0001 cmpli cr0,r10,1
+ 5: GETL R10, t4
+ 6: MOVL $0x1, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x25475218: 900B0000 stw r0,0(r11)
+ 10: GETL R0, t10
+ 11: GETL R11, t12
+ 12: STL t10, (t12)
+ 13: INCEIPL $4
+
+ 0x2547521C: 7D6B1A14 add r11,r11,r3
+ 14: GETL R11, t14
+ 15: GETL R3, t16
+ 16: ADDL t14, t16
+ 17: PUTL t16, R11
+ 18: INCEIPL $4
+
+ 0x25475220: 40A1FF9C bc 5,1,0x254751BC
+ 19: Jc01o $0x254751BC
+
+
+
+. 283 25475210 20
+. 7C 03 5A 14 28 0A 00 01 90 0B 00 00 7D 6B 1A 14 40 A1 FF 9C
+==== BB 284 (0x254751BC) approx BBs exec'd 0 ====
+
+ 0x254751BC: 555B103A rlwinm r27,r10,2,0,29
+ 0: GETL R10, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x254751C0: 7C863840 cmpl cr1,r6,r7
+ 4: GETL R6, t2
+ 5: GETL R7, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x254751C4: 7F5B282E lwzx r26,r27,r5
+ 9: GETL R5, t8
+ 10: GETL R27, t10
+ 11: ADDL t10, t8
+ 12: LDL (t8), t12
+ 13: PUTL t12, R26
+ 14: INCEIPL $4
+
+ 0x254751C8: 917C0000 stw r11,0(r28)
+ 15: GETL R11, t14
+ 16: GETL R28, t16
+ 17: STL t14, (t16)
+ 18: INCEIPL $4
+
+ 0x254751CC: 3B9C0004 addi r28,r28,4
+ 19: GETL R28, t18
+ 20: ADDL $0x4, t18
+ 21: PUTL t18, R28
+ 22: INCEIPL $4
+
+ 0x254751D0: 7D9A4214 add r12,r26,r8
+ 23: GETL R26, t20
+ 24: GETL R8, t22
+ 25: ADDL t20, t22
+ 26: PUTL t22, R12
+ 27: INCEIPL $4
+
+ 0x254751D4: 910B000C stw r8,12(r11)
+ 28: GETL R8, t24
+ 29: GETL R11, t26
+ 30: ADDL $0xC, t26
+ 31: STL t24, (t26)
+ 32: INCEIPL $4
+
+ 0x254751D8: 908B0004 stw r4,4(r11)
+ 33: GETL R4, t28
+ 34: GETL R11, t30
+ 35: ADDL $0x4, t30
+ 36: STL t28, (t30)
+ 37: INCEIPL $4
+
+ 0x254751DC: 390C0001 addi r8,r12,1
+ 38: GETL R12, t32
+ 39: ADDL $0x1, t32
+ 40: PUTL t32, R8
+ 41: INCEIPL $4
+
+ 0x254751E0: 90CB0008 stw r6,8(r11)
+ 42: GETL R6, t34
+ 43: GETL R11, t36
+ 44: ADDL $0x8, t36
+ 45: STL t34, (t36)
+ 46: INCEIPL $4
+
+ 0x254751E4: 934B0010 stw r26,16(r11)
+ 47: GETL R26, t38
+ 48: GETL R11, t40
+ 49: ADDL $0x10, t40
+ 50: STL t38, (t40)
+ 51: INCEIPL $4
+
+ 0x254751E8: 4084001C bc 4,4,0x25475204
+ 52: Jc04o $0x25475204
+
+
+
+. 284 254751BC 48
+. 55 5B 10 3A 7C 86 38 40 7F 5B 28 2E 91 7C 00 00 3B 9C 00 04 7D 9A 42 14 91 0B 00 0C 90 8B 00 04 39 0C 00 01 90 CB 00 08 93 4B 00 10 40 84 00 1C
+==== BB 285 (0x254752C8) approx BBs exec'd 0 ====
+
+ 0x254752C8: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254752CC: 4BFFFF48 b 0x25475214
+ 3: JMPo $0x25475214 ($4)
+
+
+
+. 285 254752C8 8
+. 38 00 00 00 4B FF FF 48
+==== BB 286 (0x25475214) approx BBs exec'd 0 ====
+
+ 0x25475214: 280A0001 cmpli cr0,r10,1
+ 0: GETL R10, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25475218: 900B0000 stw r0,0(r11)
+ 5: GETL R0, t6
+ 6: GETL R11, t8
+ 7: STL t6, (t8)
+ 8: INCEIPL $4
+
+ 0x2547521C: 7D6B1A14 add r11,r11,r3
+ 9: GETL R11, t10
+ 10: GETL R3, t12
+ 11: ADDL t10, t12
+ 12: PUTL t12, R11
+ 13: INCEIPL $4
+
+ 0x25475220: 40A1FF9C bc 5,1,0x254751BC
+ 14: Jc01o $0x254751BC
+
+
+
+. 286 25475214 16
+. 28 0A 00 01 90 0B 00 00 7D 6B 1A 14 40 A1 FF 9C
+==== BB 287 (0x25475224) approx BBs exec'd 0 ====
+
+ 0x25475224: 83B70000 lwz r29,0(r23)
+ 0: GETL R23, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0x25475228: 38000009 li r0,9
+ 4: MOVL $0x9, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0x2547522C: 809E0158 lwz r4,344(r30)
+ 7: GETL R30, t6
+ 8: ADDL $0x158, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R4
+ 11: INCEIPL $4
+
+ 0x25475230: 39200000 li r9,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x25475234: 2F9D0000 cmpi cr7,r29,0
+ 15: GETL R29, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x25475238: 913C0000 stw r9,0(r28)
+ 19: GETL R9, t16
+ 20: GETL R28, t18
+ 21: STL t16, (t18)
+ 22: INCEIPL $4
+
+ 0x2547523C: 90040000 stw r0,0(r4)
+ 23: GETL R0, t20
+ 24: GETL R4, t22
+ 25: STL t20, (t22)
+ 26: INCEIPL $4
+
+ 0x25475240: 419E0028 bc 12,30,0x25475268
+ 27: Js30o $0x25475268
+
+
+
+. 287 25475224 32
+. 83 B7 00 00 38 00 00 09 80 9E 01 58 39 20 00 00 2F 9D 00 00 91 3C 00 00 90 04 00 00 41 9E 00 28
+==== BB 288 (0x25475244) approx BBs exec'd 0 ====
+
+ 0x25475244: 839D0094 lwz r28,148(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x94, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x25475248: 2C9C0000 cmpi cr1,r28,0
+ 5: GETL R28, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547524C: 408601BC bc 4,6,0x25475408
+ 9: Jc06o $0x25475408
+
+
+
+. 288 25475244 12
+. 83 9D 00 94 2C 9C 00 00 40 86 01 BC
+==== BB 289 (0x25475250) approx BBs exec'd 0 ====
+
+ 0x25475250: 817D005C lwz r11,92(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x5C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25475254: 3800FFFF li r0,-1
+ 5: MOVL $0xFFFFFFFF, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x25475258: 901D01E0 stw r0,480(r29)
+ 8: GETL R0, t6
+ 9: GETL R29, t8
+ 10: ADDL $0x1E0, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547525C: 2F0B0000 cmpi cr6,r11,0
+ 13: GETL R11, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x6, CR
+ 16: INCEIPL $4
+
+ 0x25475260: 409A0084 bc 4,26,0x254752E4
+ 17: Jc26o $0x254752E4
+
+
+
+. 289 25475250 20
+. 81 7D 00 5C 38 00 FF FF 90 1D 01 E0 2F 0B 00 00 40 9A 00 84
+==== BB 290 (0x25475264) approx BBs exec'd 0 ====
+
+ 0x25475264: 901D018C stw r0,396(r29)
+ 0: GETL R0, t0
+ 1: GETL R29, t2
+ 2: ADDL $0x18C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25475268: 2C190000 cmpi cr0,r25,0
+ 5: GETL R25, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547526C: 41820010 bc 12,2,0x2547527C
+ 9: Js02o $0x2547527C
+
+
+
+. 290 25475264 12
+. 90 1D 01 8C 2C 19 00 00 41 82 00 10
+==== BB 291 (0x25475270) approx BBs exec'd 0 ====
+
+ 0x25475270: 8BB90000 lbz r29,0(r25)
+ 0: GETL R25, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0x25475274: 2F9D0000 cmpi cr7,r29,0
+ 4: GETL R29, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0x25475278: 409E0094 bc 4,30,0x2547530C
+ 8: Jc30o $0x2547530C
+
+
+
+. 291 25475270 12
+. 8B B9 00 00 2F 9D 00 00 40 9E 00 94
+==== BB 292 (0x2547530C) approx BBs exec'd 0 ====
+
+ 0x2547530C: 7F23CB78 or r3,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25475310: 7F3DCB78 or r29,r25,r25
+ 3: GETL R25, t2
+ 4: PUTL t2, R29
+ 5: INCEIPL $4
+
+ 0x25475314: 4800DCBD bl 0x25482FD0
+ 6: MOVL $0x25475318, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25482FD0 ($4)
+
+
+
+. 292 2547530C 12
+. 7F 23 CB 78 7F 3D CB 78 48 00 DC BD
+==== BB 293 (0x25483008) approx BBs exec'd 0 ====
+
+ 0x25483008: 3CC0FEFF lis r6,-257
+ 0: MOVL $0xFEFF0000, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x2548300C: 38C6FEFF addi r6,r6,-257
+ 3: MOVL $0xFEFEFEFF, t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0x25483010: 419D001C bc 12,29,0x2548302C
+ 6: Js29o $0x2548302C
+
+
+
+. 293 25483008 12
+. 3C C0 FE FF 38 C6 FE FF 41 9D 00 1C
+==== BB 294 (0x25483014) approx BBs exec'd 0 ====
+
+ 0x25483014: 85040004 lwzu r8,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R4
+ 3: LDL (t0), t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0x25483018: 7CE04038 and r0,r7,r8
+ 6: GETL R7, t4
+ 7: GETL R8, t6
+ 8: ANDL t4, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x2548301C: 7CEA4378 or r10,r7,r8
+ 11: GETL R7, t8
+ 12: GETL R8, t10
+ 13: ORL t10, t8
+ 14: PUTL t8, R10
+ 15: INCEIPL $4
+
+ 0x25483020: 7C003A14 add r0,r0,r7
+ 16: GETL R0, t12
+ 17: GETL R7, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0x25483024: 7D4800F9 nor. r8,r10,r0
+ 21: GETL R10, t16
+ 22: GETL R0, t18
+ 23: ORL t18, t16
+ 24: NOTL t16
+ 25: PUTL t16, R8
+ 26: CMP0L t16, t20 (-rSo)
+ 27: ICRFL t20, $0x0, CR
+ 28: INCEIPL $4
+
+ 0x25483028: 4082004C bc 4,2,0x25483074
+ 29: Jc02o $0x25483074
+
+
+
+. 294 25483014 24
+. 85 04 00 04 7C E0 40 38 7C EA 43 78 7C 00 3A 14 7D 48 00 F9 40 82 00 4C
+==== BB 295 (0x2548302C) approx BBs exec'd 0 ====
+
+ 0x2548302C: 81040004 lwz r8,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25483030: 85240008 lwzu r9,8(r4)
+ 5: GETL R4, t4
+ 6: ADDL $0x8, t4
+ 7: PUTL t4, R4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0x25483034: 7C064214 add r0,r6,r8
+ 11: GETL R6, t8
+ 12: GETL R8, t10
+ 13: ADDL t8, t10
+ 14: PUTL t10, R0
+ 15: INCEIPL $4
+
+ 0x25483038: 7CEA40F8 nor r10,r7,r8
+ 16: GETL R7, t12
+ 17: GETL R8, t14
+ 18: ORL t14, t12
+ 19: NOTL t12
+ 20: PUTL t12, R10
+ 21: INCEIPL $4
+
+ 0x2548303C: 7C005039 and. r0,r0,r10
+ 22: GETL R0, t16
+ 23: GETL R10, t18
+ 24: ANDL t16, t18
+ 25: PUTL t18, R0
+ 26: CMP0L t18, t20 (-rSo)
+ 27: ICRFL t20, $0x0, CR
+ 28: INCEIPL $4
+
+ 0x25483040: 7D664A14 add r11,r6,r9
+ 29: GETL R6, t22
+ 30: GETL R9, t24
+ 31: ADDL t22, t24
+ 32: PUTL t24, R11
+ 33: INCEIPL $4
+
+ 0x25483044: 7CEC48F8 nor r12,r7,r9
+ 34: GETL R7, t26
+ 35: GETL R9, t28
+ 36: ORL t28, t26
+ 37: NOTL t26
+ 38: PUTL t26, R12
+ 39: INCEIPL $4
+
+ 0x25483048: 4082001C bc 4,2,0x25483064
+ 40: Jc02o $0x25483064
+
+
+
+. 295 2548302C 32
+. 81 04 00 04 85 24 00 08 7C 06 42 14 7C EA 40 F8 7C 00 50 39 7D 66 4A 14 7C EC 48 F8 40 82 00 1C
+==== BB 296 (0x2548304C) approx BBs exec'd 0 ====
+
+ 0x2548304C: 7D606039 and. r0,r11,r12
+ 0: GETL R11, t0
+ 1: GETL R12, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0x25483050: 4182FFDC bc 12,2,0x2548302C
+ 7: Js02o $0x2548302C
+
+
+
+. 296 2548304C 8
+. 7D 60 60 39 41 82 FF DC
+==== BB 297 (0x25483054) approx BBs exec'd 0 ====
+
+ 0x25483054: 7CE04838 and r0,r7,r9
+ 0: GETL R7, t0
+ 1: GETL R9, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25483058: 7C003A14 add r0,r0,r7
+ 5: GETL R0, t4
+ 6: GETL R7, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x2548305C: 7D880078 andc r8,r12,r0
+ 10: GETL R12, t8
+ 11: GETL R0, t10
+ 12: NOTL t10
+ 13: ANDL t8, t10
+ 14: PUTL t10, R8
+ 15: INCEIPL $4
+
+ 0x25483060: 48000014 b 0x25483074
+ 16: JMPo $0x25483074 ($4)
+
+
+
+. 297 25483054 16
+. 7C E0 48 38 7C 00 3A 14 7D 88 00 78 48 00 00 14
+==== BB 298 (0x25475318) approx BBs exec'd 0 ====
+
+ 0x25475318: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547531C: 3B63001F addi r27,r3,31
+ 3: GETL R3, t2
+ 4: ADDL $0x1F, t2
+ 5: PUTL t2, R27
+ 6: INCEIPL $4
+
+ 0x25475320: 81810000 lwz r12,0(r1)
+ 7: GETL R1, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0x25475324: 577A0036 rlwinm r26,r27,0,0,27
+ 11: GETL R27, t8
+ 12: ANDL $0xFFFFFFF0, t8
+ 13: PUTL t8, R26
+ 14: INCEIPL $4
+
+ 0x25475328: 7C791B78 or r25,r3,r3
+ 15: GETL R3, t10
+ 16: PUTL t10, R25
+ 17: INCEIPL $4
+
+ 0x2547532C: 7D7A00D0 neg r11,r26
+ 18: GETL R26, t12
+ 19: NEGL t12
+ 20: PUTL t12, R11
+ 21: INCEIPL $4
+
+ 0x25475330: 38B90001 addi r5,r25,1
+ 22: GETL R25, t14
+ 23: ADDL $0x1, t14
+ 24: PUTL t14, R5
+ 25: INCEIPL $4
+
+ 0x25475334: 7D81596E stwux r12,r1,r11
+ 26: GETL R11, t16
+ 27: GETL R1, t18
+ 28: ADDL t18, t16
+ 29: PUTL t16, R1
+ 30: GETL R12, t20
+ 31: STL t20, (t16)
+ 32: INCEIPL $4
+
+ 0x25475338: 39410017 addi r10,r1,23
+ 33: GETL R1, t22
+ 34: ADDL $0x17, t22
+ 35: PUTL t22, R10
+ 36: INCEIPL $4
+
+ 0x2547533C: 55430036 rlwinm r3,r10,0,0,27
+ 37: GETL R10, t24
+ 38: ANDL $0xFFFFFFF0, t24
+ 39: PUTL t24, R3
+ 40: INCEIPL $4
+
+ 0x25475340: 4800E8A1 bl 0x25483BE0
+ 41: MOVL $0x25475344, t26
+ 42: PUTL t26, LR
+ 43: JMPo-c $0x25483BE0 ($4)
+
+
+
+. 298 25475318 44
+. 7F A4 EB 78 3B 63 00 1F 81 81 00 00 57 7A 00 36 7C 79 1B 78 7D 7A 00 D0 38 B9 00 01 7D 81 59 6E 39 41 00 17 55 43 00 36 48 00 E8 A1
+==== BB 299 (0x25483CB0) approx BBs exec'd 0 ====
+
+ 0x25483CB0: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25483CB4: 7FA4EB78 or r4,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25483CB8: 5785F0BE rlwinm r5,r28,30,2,31
+ 6: GETL R28, t4
+ 7: SHRL $0x2, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0x25483CBC: 4800015D bl 0x25483E18
+ 10: MOVL $0x25483CC0, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0x25483E18 ($4)
+
+
+
+. 299 25483CB0 16
+. 7F E3 FB 78 7F A4 EB 78 57 85 F0 BE 48 00 01 5D
+==== BB 300 _wordcopy_fwd_dest_aligned(0x25483E18) approx BBs exec'd 0 ====
+
+ 0x25483E18: 54A007BE rlwinm r0,r5,0,30,31
+ 0: GETL R5, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x25483E1C: 54881EF8 rlwinm r8,r4,3,27,28
+ 4: GETL R4, t2
+ 5: ROLL $0x3, t2
+ 6: ANDL $0x18, t2
+ 7: PUTL t2, R8
+ 8: INCEIPL $4
+
+ 0x25483E20: 2F800001 cmpi cr7,r0,1
+ 9: GETL R0, t4
+ 10: MOVL $0x1, t8
+ 11: CMPL t4, t8, t6 (-rSo)
+ 12: ICRFL t6, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25483E24: 9421FFF0 stwu r1,-16(r1)
+ 14: GETL R1, t10
+ 15: GETL R1, t12
+ 16: ADDL $0xFFFFFFF0, t12
+ 17: PUTL t12, R1
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0x25483E28: 5484003A rlwinm r4,r4,0,0,29
+ 20: GETL R4, t14
+ 21: ANDL $0xFFFFFFFC, t14
+ 22: PUTL t14, R4
+ 23: INCEIPL $4
+
+ 0x25483E2C: 20E80020 subfic r7,r8,32
+ 24: GETL R8, t16
+ 25: MOVL $0x20, t18
+ 26: SBBL t16, t18 (-wCa)
+ 27: PUTL t18, R7
+ 28: INCEIPL $4
+
+ 0x25483E30: 419E00B8 bc 12,30,0x25483EE8
+ 29: Js30o $0x25483EE8
+
+
+
+. 300 25483E18 28
+. 54 A0 07 BE 54 88 1E F8 2F 80 00 01 94 21 FF F0 54 84 00 3A 20 E8 00 20 41 9E 00 B8
+==== BB 301 (0x25483E34) approx BBs exec'd 0 ====
+
+ 0x25483E34: 28000001 cmpli cr0,r0,1
+ 0: GETL R0, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25483E38: 4180008C bc 12,0,0x25483EC4
+ 5: Js00o $0x25483EC4
+
+
+
+. 301 25483E34 8
+. 28 00 00 01 41 80 00 8C
+==== BB 302 (0x25483EC4) approx BBs exec'd 0 ====
+
+ 0x25483EC4: 81440000 lwz r10,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0x25483EC8: 3863FFFC addi r3,r3,-4
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFFC, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483ECC: 85640004 lwzu r11,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: PUTL t6, R4
+ 11: LDL (t6), t8
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0x25483ED0: 4BFFFF90 b 0x25483E60
+ 14: JMPo $0x25483E60 ($4)
+
+
+
+. 302 25483EC4 16
+. 81 44 00 00 38 63 FF FC 85 64 00 04 4B FF FF 90
+==== BB 303 (0x25483E60) approx BBs exec'd 0 ====
+
+ 0x25483E60: 7D404030 slw r0,r10,r8
+ 0: GETL R10, t2
+ 1: GETL R8, t0
+ 2: SHLL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25483E64: 7D6A3C30 srw r10,r11,r7
+ 5: GETL R11, t6
+ 6: GETL R7, t4
+ 7: SHRL t4, t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x25483E68: 7C0C5378 or r12,r0,r10
+ 10: GETL R0, t8
+ 11: GETL R10, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R12
+ 14: INCEIPL $4
+
+ 0x25483E6C: 81440004 lwz r10,4(r4)
+ 15: GETL R4, t12
+ 16: ADDL $0x4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R10
+ 19: INCEIPL $4
+
+ 0x25483E70: 91830004 stw r12,4(r3)
+ 20: GETL R12, t16
+ 21: GETL R3, t18
+ 22: ADDL $0x4, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25483E74: 7D6C4030 slw r12,r11,r8
+ 25: GETL R11, t22
+ 26: GETL R8, t20
+ 27: SHLL t20, t22
+ 28: PUTL t22, R12
+ 29: INCEIPL $4
+
+ 0x25483E78: 7D4B3C30 srw r11,r10,r7
+ 30: GETL R10, t26
+ 31: GETL R7, t24
+ 32: SHRL t24, t26
+ 33: PUTL t26, R11
+ 34: INCEIPL $4
+
+ 0x25483E7C: 7D865B78 or r6,r12,r11
+ 35: GETL R12, t28
+ 36: GETL R11, t30
+ 37: ORL t30, t28
+ 38: PUTL t28, R6
+ 39: INCEIPL $4
+
+ 0x25483E80: 81640008 lwz r11,8(r4)
+ 40: GETL R4, t32
+ 41: ADDL $0x8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R11
+ 44: INCEIPL $4
+
+ 0x25483E84: 90C30008 stw r6,8(r3)
+ 45: GETL R6, t36
+ 46: GETL R3, t38
+ 47: ADDL $0x8, t38
+ 48: STL t36, (t38)
+ 49: INCEIPL $4
+
+ 0x25483E88: 34A5FFFC addic. r5,r5,-4
+ 50: GETL R5, t40
+ 51: ADCL $0xFFFFFFFC, t40 (-wCa)
+ 52: PUTL t40, R5
+ 53: CMP0L t40, t42 (-rSo)
+ 54: ICRFL t42, $0x0, CR
+ 55: INCEIPL $4
+
+ 0x25483E8C: 7D464030 slw r6,r10,r8
+ 56: GETL R10, t46
+ 57: GETL R8, t44
+ 58: SHLL t44, t46
+ 59: PUTL t46, R6
+ 60: INCEIPL $4
+
+ 0x25483E90: 7D693C30 srw r9,r11,r7
+ 61: GETL R11, t50
+ 62: GETL R7, t48
+ 63: SHRL t48, t50
+ 64: PUTL t50, R9
+ 65: INCEIPL $4
+
+ 0x25483E94: 8144000C lwz r10,12(r4)
+ 66: GETL R4, t52
+ 67: ADDL $0xC, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R10
+ 70: INCEIPL $4
+
+ 0x25483E98: 7CC04B78 or r0,r6,r9
+ 71: GETL R6, t56
+ 72: GETL R9, t58
+ 73: ORL t58, t56
+ 74: PUTL t56, R0
+ 75: INCEIPL $4
+
+ 0x25483E9C: 38840010 addi r4,r4,16
+ 76: GETL R4, t60
+ 77: ADDL $0x10, t60
+ 78: PUTL t60, R4
+ 79: INCEIPL $4
+
+ 0x25483EA0: 9003000C stw r0,12(r3)
+ 80: GETL R0, t62
+ 81: GETL R3, t64
+ 82: ADDL $0xC, t64
+ 83: STL t62, (t64)
+ 84: INCEIPL $4
+
+ 0x25483EA4: 38630010 addi r3,r3,16
+ 85: GETL R3, t66
+ 86: ADDL $0x10, t66
+ 87: PUTL t66, R3
+ 88: INCEIPL $4
+
+ 0x25483EA8: 40A2FFA4 bc 5,2,0x25483E4C
+ 89: Jc02o $0x25483E4C
+
+
+
+. 303 25483E60 76
+. 7D 40 40 30 7D 6A 3C 30 7C 0C 53 78 81 44 00 04 91 83 00 04 7D 6C 40 30 7D 4B 3C 30 7D 86 5B 78 81 64 00 08 90 C3 00 08 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
+==== BB 304 (0x25483E4C) approx BBs exec'd 0 ====
+
+ 0x25483E4C: 7D664030 slw r6,r11,r8
+ 0: GETL R11, t2
+ 1: GETL R8, t0
+ 2: SHLL t0, t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x25483E50: 7D493C30 srw r9,r10,r7
+ 5: GETL R10, t6
+ 6: GETL R7, t4
+ 7: SHRL t4, t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25483E54: 7CC04B78 or r0,r6,r9
+ 10: GETL R6, t8
+ 11: GETL R9, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R0
+ 14: INCEIPL $4
+
+ 0x25483E58: 81640000 lwz r11,0(r4)
+ 15: GETL R4, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R11
+ 18: INCEIPL $4
+
+ 0x25483E5C: 90030000 stw r0,0(r3)
+ 19: GETL R0, t16
+ 20: GETL R3, t18
+ 21: STL t16, (t18)
+ 22: INCEIPL $4
+
+ 0x25483E60: 7D404030 slw r0,r10,r8
+ 23: GETL R10, t22
+ 24: GETL R8, t20
+ 25: SHLL t20, t22
+ 26: PUTL t22, R0
+ 27: INCEIPL $4
+
+ 0x25483E64: 7D6A3C30 srw r10,r11,r7
+ 28: GETL R11, t26
+ 29: GETL R7, t24
+ 30: SHRL t24, t26
+ 31: PUTL t26, R10
+ 32: INCEIPL $4
+
+ 0x25483E68: 7C0C5378 or r12,r0,r10
+ 33: GETL R0, t28
+ 34: GETL R10, t30
+ 35: ORL t30, t28
+ 36: PUTL t28, R12
+ 37: INCEIPL $4
+
+ 0x25483E6C: 81440004 lwz r10,4(r4)
+ 38: GETL R4, t32
+ 39: ADDL $0x4, t32
+ 40: LDL (t32), t34
+ 41: PUTL t34, R10
+ 42: INCEIPL $4
+
+ 0x25483E70: 91830004 stw r12,4(r3)
+ 43: GETL R12, t36
+ 44: GETL R3, t38
+ 45: ADDL $0x4, t38
+ 46: STL t36, (t38)
+ 47: INCEIPL $4
+
+ 0x25483E74: 7D6C4030 slw r12,r11,r8
+ 48: GETL R11, t42
+ 49: GETL R8, t40
+ 50: SHLL t40, t42
+ 51: PUTL t42, R12
+ 52: INCEIPL $4
+
+ 0x25483E78: 7D4B3C30 srw r11,r10,r7
+ 53: GETL R10, t46
+ 54: GETL R7, t44
+ 55: SHRL t44, t46
+ 56: PUTL t46, R11
+ 57: INCEIPL $4
+
+ 0x25483E7C: 7D865B78 or r6,r12,r11
+ 58: GETL R12, t48
+ 59: GETL R11, t50
+ 60: ORL t50, t48
+ 61: PUTL t48, R6
+ 62: INCEIPL $4
+
+ 0x25483E80: 81640008 lwz r11,8(r4)
+ 63: GETL R4, t52
+ 64: ADDL $0x8, t52
+ 65: LDL (t52), t54
+ 66: PUTL t54, R11
+ 67: INCEIPL $4
+
+ 0x25483E84: 90C30008 stw r6,8(r3)
+ 68: GETL R6, t56
+ 69: GETL R3, t58
+ 70: ADDL $0x8, t58
+ 71: STL t56, (t58)
+ 72: INCEIPL $4
+
+ 0x25483E88: 34A5FFFC addic. r5,r5,-4
+ 73: GETL R5, t60
+ 74: ADCL $0xFFFFFFFC, t60 (-wCa)
+ 75: PUTL t60, R5
+ 76: CMP0L t60, t62 (-rSo)
+ 77: ICRFL t62, $0x0, CR
+ 78: INCEIPL $4
+
+ 0x25483E8C: 7D464030 slw r6,r10,r8
+ 79: GETL R10, t66
+ 80: GETL R8, t64
+ 81: SHLL t64, t66
+ 82: PUTL t66, R6
+ 83: INCEIPL $4
+
+ 0x25483E90: 7D693C30 srw r9,r11,r7
+ 84: GETL R11, t70
+ 85: GETL R7, t68
+ 86: SHRL t68, t70
+ 87: PUTL t70, R9
+ 88: INCEIPL $4
+
+ 0x25483E94: 8144000C lwz r10,12(r4)
+ 89: GETL R4, t72
+ 90: ADDL $0xC, t72
+ 91: LDL (t72), t74
+ 92: PUTL t74, R10
+ 93: INCEIPL $4
+
+ 0x25483E98: 7CC04B78 or r0,r6,r9
+ 94: GETL R6, t76
+ 95: GETL R9, t78
+ 96: ORL t78, t76
+ 97: PUTL t76, R0
+ 98: INCEIPL $4
+
+ 0x25483E9C: 38840010 addi r4,r4,16
+ 99: GETL R4, t80
+ 100: ADDL $0x10, t80
+ 101: PUTL t80, R4
+ 102: INCEIPL $4
+
+ 0x25483EA0: 9003000C stw r0,12(r3)
+ 103: GETL R0, t82
+ 104: GETL R3, t84
+ 105: ADDL $0xC, t84
+ 106: STL t82, (t84)
+ 107: INCEIPL $4
+
+ 0x25483EA4: 38630010 addi r3,r3,16
+ 108: GETL R3, t86
+ 109: ADDL $0x10, t86
+ 110: PUTL t86, R3
+ 111: INCEIPL $4
+
+ 0x25483EA8: 40A2FFA4 bc 5,2,0x25483E4C
+ 112: Jc02o $0x25483E4C
+
+
+
+. 304 25483E4C 96
+. 7D 66 40 30 7D 49 3C 30 7C C0 4B 78 81 64 00 00 90 03 00 00 7D 40 40 30 7D 6A 3C 30 7C 0C 53 78 81 44 00 04 91 83 00 04 7D 6C 40 30 7D 4B 3C 30 7D 86 5B 78 81 64 00 08 90 C3 00 08 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
+==== BB 305 (0x25483EAC) approx BBs exec'd 0 ====
+
+ 0x25483EAC: 7D654030 slw r5,r11,r8
+ 0: GETL R11, t2
+ 1: GETL R8, t0
+ 2: SHLL t0, t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25483EB0: 7D483C30 srw r8,r10,r7
+ 5: GETL R10, t6
+ 6: GETL R7, t4
+ 7: SHRL t4, t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x25483EB4: 7CA44378 or r4,r5,r8
+ 10: GETL R5, t8
+ 11: GETL R8, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R4
+ 14: INCEIPL $4
+
+ 0x25483EB8: 38210010 addi r1,r1,16
+ 15: GETL R1, t12
+ 16: ADDL $0x10, t12
+ 17: PUTL t12, R1
+ 18: INCEIPL $4
+
+ 0x25483EBC: 90830000 stw r4,0(r3)
+ 19: GETL R4, t14
+ 20: GETL R3, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25483EC0: 4E800020 blr
+ 23: GETL LR, t18
+ 24: JMPo-r t18 ($4)
+
+
+
+. 305 25483EAC 24
+. 7D 65 40 30 7D 48 3C 30 7C A4 43 78 38 21 00 10 90 83 00 00 4E 80 00 20
+==== BB 306 (0x25483CC0) approx BBs exec'd 0 ====
+
+ 0x25483CC0: 4BFFFF98 b 0x25483C58
+ 0: JMPo $0x25483C58 ($4)
+
+
+
+. 306 25483CC0 4
+. 4B FF FF 98
+==== BB 307 (0x25483C74) approx BBs exec'd 0 ====
+
+ 0x25483C74: 88FD0000 lbz r7,0(r29)
+ 0: GETL R29, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25483C78: 3BBD0001 addi r29,r29,1
+ 4: GETL R29, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25483C7C: 98FF0000 stb r7,0(r31)
+ 8: GETL R7, t6
+ 9: GETL R31, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25483C80: 3BFF0001 addi r31,r31,1
+ 12: GETL R31, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R31
+ 15: INCEIPL $4
+
+ 0x25483C84: 4200FFF0 bc 16,0,0x25483C74
+ 16: GETL CTR, t12
+ 17: ADDL $0xFFFFFFFF, t12
+ 18: PUTL t12, CTR
+ 19: JIFZL t12, $0x25483C88
+ 20: JMPo $0x25483C74 ($4)
+
+
+
+. 307 25483C74 20
+. 88 FD 00 00 3B BD 00 01 98 FF 00 00 3B FF 00 01 42 00 FF F0
+==== BB 308 (0x25475344) approx BBs exec'd 0 ====
+
+ 0x25475344: 893D0000 lbz r9,0(r29)
+ 0: GETL R29, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25475348: 7C7C1B78 or r28,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R28
+ 6: INCEIPL $4
+
+ 0x2547534C: 38600001 li r3,1
+ 7: MOVL $0x1, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25475350: 48000018 b 0x25475368
+ 10: JMPo $0x25475368 ($4)
+
+
+
+. 308 25475344 16
+. 89 3D 00 00 7C 7C 1B 78 38 60 00 01 48 00 00 18
+==== BB 309 (0x25475368) approx BBs exec'd 0 ====
+
+ 0x25475368: 2C890000 cmpi cr1,r9,0
+ 0: GETL R9, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547536C: 4086FFE8 bc 4,6,0x25475354
+ 4: Jc06o $0x25475354
+
+
+
+. 309 25475368 8
+. 2C 89 00 00 40 86 FF E8
+==== BB 310 (0x25475354) approx BBs exec'd 0 ====
+
+ 0x25475354: 3809FFC6 addi r0,r9,-58
+ 0: GETL R9, t0
+ 1: ADDL $0xFFFFFFC6, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x25475358: 8D3D0001 lbzu r9,1(r29)
+ 4: GETL R29, t2
+ 5: ADDL $0x1, t2
+ 6: PUTL t2, R29
+ 7: LDB (t2), t4
+ 8: PUTL t4, R9
+ 9: INCEIPL $4
+
+ 0x2547535C: 20800001 subfic r4,r0,1
+ 10: GETL R0, t6
+ 11: MOVL $0x1, t8
+ 12: SBBL t6, t8 (-wCa)
+ 13: PUTL t8, R4
+ 14: INCEIPL $4
+
+ 0x25475360: 7C830194 addze r4,r3
+ 15: GETL R3, t10
+ 16: ADCL $0x0, t10 (-rCa-wCa)
+ 17: PUTL t10, R4
+ 18: INCEIPL $4
+
+ 0x25475364: 7C832378 or r3,r4,r4
+ 19: GETL R4, t12
+ 20: PUTL t12, R3
+ 21: INCEIPL $4
+
+ 0x25475368: 2C890000 cmpi cr1,r9,0
+ 22: GETL R9, t14
+ 23: CMP0L t14, t16 (-rSo)
+ 24: ICRFL t16, $0x1, CR
+ 25: INCEIPL $4
+
+ 0x2547536C: 4086FFE8 bc 4,6,0x25475354
+ 26: Jc06o $0x25475354
+
+
+
+. 310 25475354 28
+. 38 09 FF C6 8D 3D 00 01 20 80 00 01 7C 83 01 94 7C 83 23 78 2C 89 00 00 40 86 FF E8
+==== BB 311 (0x25475370) approx BBs exec'd 0 ====
+
+ 0x25475370: 5469103A rlwinm r9,r3,2,0,29
+ 0: GETL R3, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x25475374: 83BE0168 lwz r29,360(r30)
+ 4: GETL R30, t2
+ 5: ADDL $0x168, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0x25475378: 38690004 addi r3,r9,4
+ 9: GETL R9, t6
+ 10: ADDL $0x4, t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0x2547537C: 480226A9 bl 0x25497A24
+ 13: MOVL $0x25475380, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0x25497A24 ($4)
+
+
+
+. 311 25475370 16
+. 54 69 10 3A 83 BE 01 68 38 69 00 04 48 02 26 A9
+==== BB 312 (0x25475380) approx BBs exec'd 0 ====
+
+ 0x25475380: 80DE0188 lwz r6,392(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x188, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x25475384: 2F030000 cmpi cr6,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25475388: 7C641B78 or r4,r3,r3
+ 9: GETL R3, t8
+ 10: PUTL t8, R4
+ 11: INCEIPL $4
+
+ 0x2547538C: 907D0000 stw r3,0(r29)
+ 12: GETL R3, t10
+ 13: GETL R29, t12
+ 14: STL t10, (t12)
+ 15: INCEIPL $4
+
+ 0x25475390: 41BAFF44 bc 13,26,0x254752D4
+ 16: Js26o $0x254752D4
+
+
+
+. 312 25475380 20
+. 80 DE 01 88 2F 03 00 00 7C 64 1B 78 90 7D 00 00 41 BA FF 44
+==== BB 313 (0x25475394) approx BBs exec'd 0 ====
+
+ 0x25475394: 807E04B4 lwz r3,1204(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4B4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25475398: 39000000 li r8,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0x2547539C: 80BE01A0 lwz r5,416(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x1A0, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0x254753A0: 80C30000 lwz r6,0(r3)
+ 13: GETL R3, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R6
+ 16: INCEIPL $4
+
+ 0x254753A4: 7F83E378 or r3,r28,r28
+ 17: GETL R28, t14
+ 18: PUTL t14, R3
+ 19: INCEIPL $4
+
+ 0x254753A8: 80FE01A4 lwz r7,420(r30)
+ 20: GETL R30, t16
+ 21: ADDL $0x1A4, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R7
+ 24: INCEIPL $4
+
+ 0x254753AC: 4BFFF79D bl 0x25474B48
+ 25: MOVL $0x254753B0, t20
+ 26: PUTL t20, LR
+ 27: JMPo-c $0x25474B48 ($4)
+
+
+
+. 313 25475394 28
+. 80 7E 04 B4 39 00 00 00 80 BE 01 A0 80 C3 00 00 7F 83 E3 78 80 FE 01 A4 4B FF F7 9D
+==== BB 314 fillin_rpath(0x25474B48) approx BBs exec'd 0 ====
+
+ 0x25474B48: 9421FFA0 stwu r1,-96(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFA0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25474B4C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25474B50: 480224B1 bl 0x25497000
+ 9: MOVL $0x25474B54, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 314 25474B48 12
+. 94 21 FF A0 7C 08 02 A6 48 02 24 B1
+==== BB 315 (0x25474B54) approx BBs exec'd 0 ====
+
+ 0x25474B54: 93C10058 stw r30,88(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x58, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25474B58: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25474B5C: 7D800026 mfcr r12
+ 8: GETL CR, t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0x25474B60: 91E1001C stw r15,28(r1)
+ 11: GETL R15, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x1C, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25474B64: 2D880000 cmpi cr3,r8,0
+ 16: GETL R8, t12
+ 17: CMP0L t12, t14 (-rSo)
+ 18: ICRFL t14, $0x3, CR
+ 19: INCEIPL $4
+
+ 0x25474B68: 92010020 stw r16,32(r1)
+ 20: GETL R16, t16
+ 21: GETL R1, t18
+ 22: ADDL $0x20, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25474B6C: 92210024 stw r17,36(r1)
+ 25: GETL R17, t20
+ 26: GETL R1, t22
+ 27: ADDL $0x24, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0x25474B70: 92410028 stw r18,40(r1)
+ 30: GETL R18, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x28, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x25474B74: 81FE0148 lwz r15,328(r30)
+ 35: GETL R30, t28
+ 36: ADDL $0x148, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R15
+ 39: INCEIPL $4
+
+ 0x25474B78: 823E04C8 lwz r17,1224(r30)
+ 40: GETL R30, t32
+ 41: ADDL $0x4C8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R17
+ 44: INCEIPL $4
+
+ 0x25474B7C: 821E0154 lwz r16,340(r30)
+ 45: GETL R30, t36
+ 46: ADDL $0x154, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R16
+ 49: INCEIPL $4
+
+ 0x25474B80: 825E0158 lwz r18,344(r30)
+ 50: GETL R30, t40
+ 51: ADDL $0x158, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R18
+ 54: INCEIPL $4
+
+ 0x25474B84: 9261002C stw r19,44(r1)
+ 55: GETL R19, t44
+ 56: GETL R1, t46
+ 57: ADDL $0x2C, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0x25474B88: 7CF33B78 or r19,r7,r7
+ 60: GETL R7, t48
+ 61: PUTL t48, R19
+ 62: INCEIPL $4
+
+ 0x25474B8C: 92810030 stw r20,48(r1)
+ 63: GETL R20, t50
+ 64: GETL R1, t52
+ 65: ADDL $0x30, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0x25474B90: 7CD43378 or r20,r6,r6
+ 68: GETL R6, t54
+ 69: PUTL t54, R20
+ 70: INCEIPL $4
+
+ 0x25474B94: 92A10034 stw r21,52(r1)
+ 71: GETL R21, t56
+ 72: GETL R1, t58
+ 73: ADDL $0x34, t58
+ 74: STL t56, (t58)
+ 75: INCEIPL $4
+
+ 0x25474B98: 7CB52B78 or r21,r5,r5
+ 76: GETL R5, t60
+ 77: PUTL t60, R21
+ 78: INCEIPL $4
+
+ 0x25474B9C: 92C10038 stw r22,56(r1)
+ 79: GETL R22, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x38, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x25474BA0: 7C962378 or r22,r4,r4
+ 84: GETL R4, t66
+ 85: PUTL t66, R22
+ 86: INCEIPL $4
+
+ 0x25474BA4: 92E1003C stw r23,60(r1)
+ 87: GETL R23, t68
+ 88: GETL R1, t70
+ 89: ADDL $0x3C, t70
+ 90: STL t68, (t70)
+ 91: INCEIPL $4
+
+ 0x25474BA8: 7D174378 or r23,r8,r8
+ 92: GETL R8, t72
+ 93: PUTL t72, R23
+ 94: INCEIPL $4
+
+ 0x25474BAC: 93010040 stw r24,64(r1)
+ 95: GETL R24, t74
+ 96: GETL R1, t76
+ 97: ADDL $0x40, t76
+ 98: STL t74, (t76)
+ 99: INCEIPL $4
+
+ 0x25474BB0: 3B000000 li r24,0
+ 100: MOVL $0x0, t78
+ 101: PUTL t78, R24
+ 102: INCEIPL $4
+
+ 0x25474BB4: 93210044 stw r25,68(r1)
+ 103: GETL R25, t80
+ 104: GETL R1, t82
+ 105: ADDL $0x44, t82
+ 106: STL t80, (t82)
+ 107: INCEIPL $4
+
+ 0x25474BB8: 93410048 stw r26,72(r1)
+ 108: GETL R26, t84
+ 109: GETL R1, t86
+ 110: ADDL $0x48, t86
+ 111: STL t84, (t86)
+ 112: INCEIPL $4
+
+ 0x25474BBC: 9361004C stw r27,76(r1)
+ 113: GETL R27, t88
+ 114: GETL R1, t90
+ 115: ADDL $0x4C, t90
+ 116: STL t88, (t90)
+ 117: INCEIPL $4
+
+ 0x25474BC0: 93810050 stw r28,80(r1)
+ 118: GETL R28, t92
+ 119: GETL R1, t94
+ 120: ADDL $0x50, t94
+ 121: STL t92, (t94)
+ 122: INCEIPL $4
+
+ 0x25474BC4: 93A10054 stw r29,84(r1)
+ 123: GETL R29, t96
+ 124: GETL R1, t98
+ 125: ADDL $0x54, t98
+ 126: STL t96, (t98)
+ 127: INCEIPL $4
+
+ 0x25474BC8: 93E1005C stw r31,92(r1)
+ 128: GETL R31, t100
+ 129: GETL R1, t102
+ 130: ADDL $0x5C, t102
+ 131: STL t100, (t102)
+ 132: INCEIPL $4
+
+ 0x25474BCC: 90010064 stw r0,100(r1)
+ 133: GETL R0, t104
+ 134: GETL R1, t106
+ 135: ADDL $0x64, t106
+ 136: STL t104, (t106)
+ 137: INCEIPL $4
+
+ 0x25474BD0: 91810018 stw r12,24(r1)
+ 138: GETL R12, t108
+ 139: GETL R1, t110
+ 140: ADDL $0x18, t110
+ 141: STL t108, (t110)
+ 142: INCEIPL $4
+
+ 0x25474BD4: 90610008 stw r3,8(r1)
+ 143: GETL R3, t112
+ 144: GETL R1, t114
+ 145: ADDL $0x8, t114
+ 146: STL t112, (t114)
+ 147: INCEIPL $4
+
+ 0x25474BD8: 38610008 addi r3,r1,8
+ 148: GETL R1, t116
+ 149: ADDL $0x8, t116
+ 150: PUTL t116, R3
+ 151: INCEIPL $4
+
+ 0x25474BDC: 7EA4AB78 or r4,r21,r21
+ 152: GETL R21, t118
+ 153: PUTL t118, R4
+ 154: INCEIPL $4
+
+ 0x25474BE0: 4800B75D bl 0x2548033C
+ 155: MOVL $0x25474BE4, t120
+ 156: PUTL t120, LR
+ 157: JMPo-c $0x2548033C ($4)
+
+
+
+. 315 25474B54 144
+. 93 C1 00 58 7F C8 02 A6 7D 80 00 26 91 E1 00 1C 2D 88 00 00 92 01 00 20 92 21 00 24 92 41 00 28 81 FE 01 48 82 3E 04 C8 82 1E 01 54 82 5E 01 58 92 61 00 2C 7C F3 3B 78 92 81 00 30 7C D4 33 78 92 A1 00 34 7C B5 2B 78 92 C1 00 38 7C 96 23 78 92 E1 00 3C 7D 17 43 78 93 01 00 40 3B 00 00 00 93 21 00 44 93 41 00 48 93 61 00 4C 93 81 00 50 93 A1 00 54 93 E1 00 5C 90 01 00 64 91 81 00 18 90 61 00 08 38 61 00 08 7E A4 AB 78 48 00 B7 5D
+==== BB 316 __strsep_g(0x2548033C) approx BBs exec'd 0 ====
+
+ 0x2548033C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25480340: 7C681B78 or r8,r3,r3
+ 6: GETL R3, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x25480344: 80630000 lwz r3,0(r3)
+ 9: GETL R3, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0x25480348: 2F830000 cmpi cr7,r3,0
+ 13: GETL R3, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x7, CR
+ 16: INCEIPL $4
+
+ 0x2548034C: 419E0054 bc 12,30,0x254803A0
+ 17: Js30o $0x254803A0
+
+
+
+. 316 2548033C 20
+. 94 21 FF F0 7C 68 1B 78 80 63 00 00 2F 83 00 00 41 9E 00 54
+==== BB 317 (0x25480350) approx BBs exec'd 0 ====
+
+ 0x25480350: 88030000 lbz r0,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25480354: 7C6A1B78 or r10,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R10
+ 6: INCEIPL $4
+
+ 0x25480358: 39200000 li r9,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x2548035C: 2C000000 cmpi cr0,r0,0
+ 10: GETL R0, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x0, CR
+ 13: INCEIPL $4
+
+ 0x25480360: 4182003C bc 12,2,0x2548039C
+ 14: Js02o $0x2548039C
+
+
+
+. 317 25480350 20
+. 88 03 00 00 7C 6A 1B 78 39 20 00 00 2C 00 00 00 41 82 00 3C
+==== BB 318 (0x25480364) approx BBs exec'd 0 ====
+
+ 0x25480364: 7C0B0378 or r11,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x25480368: 88040000 lbz r0,0(r4)
+ 3: GETL R4, t2
+ 4: LDB (t2), t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0x2548036C: 7C892378 or r9,r4,r4
+ 7: GETL R4, t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25480370: 7C805800 cmp cr1,r0,r11
+ 10: GETL R0, t8
+ 11: GETL R11, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x25480374: 41860010 bc 12,6,0x25480384
+ 15: Js06o $0x25480384
+
+
+
+. 318 25480364 20
+. 7C 0B 03 78 88 04 00 00 7C 89 23 78 7C 80 58 00 41 86 00 10
+==== BB 319 (0x25480378) approx BBs exec'd 0 ====
+
+ 0x25480378: 8C090001 lbzu r0,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R9
+ 3: LDB (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x2548037C: 2F000000 cmpi cr6,r0,0
+ 6: GETL R0, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x25480380: 409AFFF0 bc 4,26,0x25480370
+ 10: Jc26o $0x25480370
+
+
+
+. 319 25480378 12
+. 8C 09 00 01 2F 00 00 00 40 9A FF F0
+==== BB 320 (0x25480370) approx BBs exec'd 0 ====
+
+ 0x25480370: 7C805800 cmp cr1,r0,r11
+ 0: GETL R0, t0
+ 1: GETL R11, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25480374: 41860010 bc 12,6,0x25480384
+ 5: Js06o $0x25480384
+
+
+
+. 320 25480370 8
+. 7C 80 58 00 41 86 00 10
+==== BB 321 (0x25480384) approx BBs exec'd 0 ====
+
+ 0x25480384: 2F800000 cmpi cr7,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25480388: 409E0020 bc 4,30,0x254803A8
+ 4: Jc30o $0x254803A8
+
+
+
+. 321 25480384 8
+. 2F 80 00 00 40 9E 00 20
+==== BB 322 (0x2548038C) approx BBs exec'd 0 ====
+
+ 0x2548038C: 8D6A0001 lbzu r11,1(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R10
+ 3: LDB (t0), t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0x25480390: 2C0B0000 cmpi cr0,r11,0
+ 6: GETL R11, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x25480394: 4082FFD4 bc 4,2,0x25480368
+ 10: Jc02o $0x25480368
+
+
+
+. 322 2548038C 12
+. 8D 6A 00 01 2C 0B 00 00 40 82 FF D4
+==== BB 323 (0x25480368) approx BBs exec'd 0 ====
+
+ 0x25480368: 88040000 lbz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2548036C: 7C892378 or r9,r4,r4
+ 4: GETL R4, t4
+ 5: PUTL t4, R9
+ 6: INCEIPL $4
+
+ 0x25480370: 7C805800 cmp cr1,r0,r11
+ 7: GETL R0, t6
+ 8: GETL R11, t8
+ 9: CMPL t6, t8, t10 (-rSo)
+ 10: ICRFL t10, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x25480374: 41860010 bc 12,6,0x25480384
+ 12: Js06o $0x25480384
+
+
+
+. 323 25480368 16
+. 88 04 00 00 7C 89 23 78 7C 80 58 00 41 86 00 10
+==== BB 324 (0x25480398) approx BBs exec'd 0 ====
+
+ 0x25480398: 39200000 li r9,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x2548039C: 91280000 stw r9,0(r8)
+ 3: GETL R9, t2
+ 4: GETL R8, t4
+ 5: STL t2, (t4)
+ 6: INCEIPL $4
+
+ 0x254803A0: 38210010 addi r1,r1,16
+ 7: GETL R1, t6
+ 8: ADDL $0x10, t6
+ 9: PUTL t6, R1
+ 10: INCEIPL $4
+
+ 0x254803A4: 4E800020 blr
+ 11: GETL LR, t8
+ 12: JMPo-r t8 ($4)
+
+
+
+. 324 25480398 16
+. 39 20 00 00 91 28 00 00 38 21 00 10 4E 80 00 20
+==== BB 325 (0x25474BE4) approx BBs exec'd 0 ====
+
+ 0x25474BE4: 2E030000 cmpi cr4,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25474BE8: 7C7F1B78 or r31,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R31
+ 6: INCEIPL $4
+
+ 0x25474BEC: 7C7C1B78 or r28,r3,r3
+ 7: GETL R3, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25474BF0: 4192014C bc 12,18,0x25474D3C
+ 10: Js18o $0x25474D3C
+
+
+
+. 325 25474BE4 16
+. 2E 03 00 00 7C 7F 1B 78 7C 7C 1B 78 41 92 01 4C
+==== BB 326 (0x25474BF4) approx BBs exec'd 0 ====
+
+ 0x25474BF4: 4800E3DD bl 0x25482FD0
+ 0: MOVL $0x25474BF8, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25482FD0 ($4)
+
+
+
+. 326 25474BF4 4
+. 48 00 E3 DD
+==== BB 327 (0x25483064) approx BBs exec'd 0 ====
+
+ 0x25483064: 7CE04038 and r0,r7,r8
+ 0: GETL R7, t0
+ 1: GETL R8, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25483068: 3884FFFC addi r4,r4,-4
+ 5: GETL R4, t4
+ 6: ADDL $0xFFFFFFFC, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2548306C: 7C003A14 add r0,r0,r7
+ 9: GETL R0, t6
+ 10: GETL R7, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x25483070: 7D480078 andc r8,r10,r0
+ 14: GETL R10, t10
+ 15: GETL R0, t12
+ 16: NOTL t12
+ 17: ANDL t10, t12
+ 18: PUTL t12, R8
+ 19: INCEIPL $4
+
+ 0x25483074: 7D0B0034 cntlzw r11,r8
+ 20: GETL R8, t14
+ 21: CNTLZL t14
+ 22: PUTL t14, R11
+ 23: INCEIPL $4
+
+ 0x25483078: 7C032050 subf r0,r3,r4
+ 24: GETL R3, t16
+ 25: GETL R4, t18
+ 26: SUBL t16, t18
+ 27: PUTL t18, R0
+ 28: INCEIPL $4
+
+ 0x2548307C: 556BE8FE rlwinm r11,r11,29,3,31
+ 29: GETL R11, t20
+ 30: SHRL $0x3, t20
+ 31: PUTL t20, R11
+ 32: INCEIPL $4
+
+ 0x25483080: 7C605A14 add r3,r0,r11
+ 33: GETL R0, t22
+ 34: GETL R11, t24
+ 35: ADDL t22, t24
+ 36: PUTL t24, R3
+ 37: INCEIPL $4
+
+ 0x25483084: 4E800020 blr
+ 38: GETL LR, t26
+ 39: JMPo-r t26 ($4)
+
+
+
+. 327 25483064 36
+. 7C E0 40 38 38 84 FF FC 7C 00 3A 14 7D 48 00 78 7D 0B 00 34 7C 03 20 50 55 6B E8 FE 7C 60 5A 14 4E 80 00 20
+==== BB 328 (0x25474BF8) approx BBs exec'd 0 ====
+
+ 0x25474BF8: 7C7D1B79 or. r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25474BFC: 408201A8 bc 4,2,0x25474DA4
+ 5: Jc02o $0x25474DA4
+
+
+
+. 328 25474BF8 8
+. 7C 7D 1B 79 40 82 01 A8
+==== BB 329 (0x25474DA4) approx BBs exec'd 0 ====
+
+ 0x25474DA4: 2B9D0001 cmpli cr7,r29,1
+ 0: GETL R29, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25474DA8: 409D0024 bc 4,29,0x25474DCC
+ 5: Jc29o $0x25474DCC
+
+
+
+. 329 25474DA4 8
+. 2B 9D 00 01 40 9D 00 24
+==== BB 330 (0x25474DAC) approx BBs exec'd 0 ====
+
+ 0x25474DAC: 7D3FEA14 add r9,r31,r29
+ 0: GETL R31, t0
+ 1: GETL R29, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25474DB0: 8869FFFF lbz r3,-1(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: LDB (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25474DB4: 2C83002F cmpi cr1,r3,47
+ 10: GETL R3, t8
+ 11: MOVL $0x2F, t12
+ 12: CMPL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x25474DB8: 40860014 bc 4,6,0x25474DCC
+ 15: Jc06o $0x25474DCC
+
+
+
+. 330 25474DAC 16
+. 7D 3F EA 14 88 69 FF FF 2C 83 00 2F 40 86 00 14
+==== BB 331 (0x25474DCC) approx BBs exec'd 0 ====
+
+ 0x25474DCC: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25474DD0: 41BAFE34 bc 13,26,0x25474C04
+ 4: Js26o $0x25474C04
+
+
+
+. 331 25474DCC 8
+. 2F 1D 00 00 41 BA FE 34
+==== BB 332 (0x25474DD4) approx BBs exec'd 0 ====
+
+ 0x25474DD4: 7D3CEA14 add r9,r28,r29
+ 0: GETL R28, t0
+ 1: GETL R29, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25474DD8: 8889FFFF lbz r4,-1(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: LDB (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25474DDC: 2C04002F cmpi cr0,r4,47
+ 10: GETL R4, t8
+ 11: MOVL $0x2F, t12
+ 12: CMPL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25474DE0: 41A2FE24 bc 13,2,0x25474C04
+ 15: Js02o $0x25474C04
+
+
+
+. 332 25474DD4 16
+. 7D 3C EA 14 88 89 FF FF 2C 04 00 2F 41 A2 FE 24
+==== BB 333 (0x25474DE4) approx BBs exec'd 0 ====
+
+ 0x25474DE4: 2F940000 cmpi cr7,r20,0
+ 0: GETL R20, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25474DE8: 38A0002F li r5,47
+ 4: MOVL $0x2F, t4
+ 5: PUTL t4, R5
+ 6: INCEIPL $4
+
+ 0x25474DEC: 7CBCE9AE stbx r5,r28,r29
+ 7: GETL R29, t6
+ 8: GETL R28, t8
+ 9: ADDL t8, t6
+ 10: GETL R5, t10
+ 11: STB t10, (t6)
+ 12: INCEIPL $4
+
+ 0x25474DF0: 3BBD0001 addi r29,r29,1
+ 13: GETL R29, t12
+ 14: ADDL $0x1, t12
+ 15: PUTL t12, R29
+ 16: INCEIPL $4
+
+ 0x25474DF4: 419EFE18 bc 12,30,0x25474C0C
+ 17: Js30o $0x25474C0C
+
+
+
+. 333 25474DE4 20
+. 2F 94 00 00 38 A0 00 2F 7C BC E9 AE 3B BD 00 01 41 9E FE 18
+==== BB 334 (0x25474C0C) approx BBs exec'd 0 ====
+
+ 0x25474C0C: 83F101B0 lwz r31,432(r17)
+ 0: GETL R17, t0
+ 1: ADDL $0x1B0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x25474C10: 7E398B78 or r25,r17,r17
+ 5: GETL R17, t4
+ 6: PUTL t4, R25
+ 7: INCEIPL $4
+
+ 0x25474C14: 2E1F0000 cmpi cr4,r31,0
+ 8: GETL R31, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x4, CR
+ 11: INCEIPL $4
+
+ 0x25474C18: 41920024 bc 12,18,0x25474C3C
+ 12: Js18o $0x25474C3C
+
+
+
+. 334 25474C0C 16
+. 83 F1 01 B0 7E 39 8B 78 2E 1F 00 00 41 92 00 24
+==== BB 335 (0x25474C1C) approx BBs exec'd 0 ====
+
+ 0x25474C1C: 815F0010 lwz r10,16(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25474C20: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25474C24: 7FA5EB78 or r5,r29,r29
+ 8: GETL R29, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x25474C28: 7F8AE800 cmp cr7,r10,r29
+ 11: GETL R10, t8
+ 12: GETL R29, t10
+ 13: CMPL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0x25474C2C: 419E0240 bc 12,30,0x25474E6C
+ 16: Js30o $0x25474E6C
+
+
+
+. 335 25474C1C 20
+. 81 5F 00 10 7F 83 E3 78 7F A5 EB 78 7F 8A E8 00 41 9E 02 40
+==== BB 336 (0x25474C30) approx BBs exec'd 0 ====
+
+ 0x25474C30: 83FF0000 lwz r31,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R31
+ 3: INCEIPL $4
+
+ 0x25474C34: 2E1F0000 cmpi cr4,r31,0
+ 4: GETL R31, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x4, CR
+ 7: INCEIPL $4
+
+ 0x25474C38: 4092FFE4 bc 4,18,0x25474C1C
+ 8: Jc18o $0x25474C1C
+
+
+
+. 336 25474C30 12
+. 83 FF 00 00 2E 1F 00 00 40 92 FF E4
+==== BB 337 (0x25474C3C) approx BBs exec'd 0 ====
+
+ 0x25474C3C: 418E0284 bc 12,14,0x25474EC0
+ 0: Js14o $0x25474EC0
+
+
+
+. 337 25474C3C 4
+. 41 8E 02 84
+==== BB 338 (0x25474EC0) approx BBs exec'd 0 ====
+
+ 0x25474EC0: 80700000 lwz r3,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25474EC4: 3B600000 li r27,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R27
+ 6: INCEIPL $4
+
+ 0x25474EC8: 7E1A8378 or r26,r16,r16
+ 7: GETL R16, t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0x25474ECC: 5460103A rlwinm r0,r3,2,0,29
+ 10: GETL R3, t8
+ 11: SHLL $0x2, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x25474ED0: 7D80DA14 add r12,r0,r27
+ 14: GETL R0, t10
+ 15: GETL R27, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R12
+ 18: INCEIPL $4
+
+ 0x25474ED4: 7FECEA14 add r31,r12,r29
+ 19: GETL R12, t14
+ 20: GETL R29, t16
+ 21: ADDL t14, t16
+ 22: PUTL t16, R31
+ 23: INCEIPL $4
+
+ 0x25474ED8: 387F0015 addi r3,r31,21
+ 24: GETL R31, t18
+ 25: ADDL $0x15, t18
+ 26: PUTL t18, R3
+ 27: INCEIPL $4
+
+ 0x25474EDC: 48022B49 bl 0x25497A24
+ 28: MOVL $0x25474EE0, t20
+ 29: PUTL t20, LR
+ 30: JMPo-c $0x25497A24 ($4)
+
+
+
+. 338 25474EC0 32
+. 80 70 00 00 3B 60 00 00 7E 1A 83 78 54 60 10 3A 7D 80 DA 14 7F EC EA 14 38 7F 00 15 48 02 2B 49
+==== BB 339 (0x25474EE0) approx BBs exec'd 0 ====
+
+ 0x25474EE0: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25474EE4: 4082FD8C bc 4,2,0x25474C70
+ 5: Jc02o $0x25474C70
+
+
+
+. 339 25474EE0 8
+. 7C 7F 1B 79 40 82 FD 8C
+==== BB 340 (0x25474C70) approx BBs exec'd 0 ====
+
+ 0x25474C70: 80F00000 lwz r7,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25474C74: 7F84E378 or r4,r28,r28
+ 4: GETL R28, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0x25474C78: 54E6103A rlwinm r6,r7,2,0,29
+ 7: GETL R7, t6
+ 8: SHLL $0x2, t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0x25474C7C: 7CA6FA14 add r5,r6,r31
+ 11: GETL R6, t8
+ 12: GETL R31, t10
+ 13: ADDL t8, t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0x25474C80: 38650014 addi r3,r5,20
+ 16: GETL R5, t12
+ 17: ADDL $0x14, t12
+ 18: PUTL t12, R3
+ 19: INCEIPL $4
+
+ 0x25474C84: 7FA5EB78 or r5,r29,r29
+ 20: GETL R29, t14
+ 21: PUTL t14, R5
+ 22: INCEIPL $4
+
+ 0x25474C88: 907F000C stw r3,12(r31)
+ 23: GETL R3, t16
+ 24: GETL R31, t18
+ 25: ADDL $0xC, t18
+ 26: STL t16, (t18)
+ 27: INCEIPL $4
+
+ 0x25474C8C: 4800ED95 bl 0x25483A20
+ 28: MOVL $0x25474C90, t20
+ 29: PUTL t20, LR
+ 30: JMPo-c $0x25483A20 ($4)
+
+
+
+. 340 25474C70 32
+. 80 F0 00 00 7F 84 E3 78 54 E6 10 3A 7C A6 FA 14 38 65 00 14 7F A5 EB 78 90 7F 00 0C 48 00 ED 95
+==== BB 341 (0x25483A4C) approx BBs exec'd 0 ====
+
+ 0x25483A4C: 7C8300D0 neg r4,r3
+ 0: GETL R3, t0
+ 1: NEGL t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x25483A50: 548307BE rlwinm r3,r4,0,30,31
+ 4: GETL R4, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R3
+ 7: INCEIPL $4
+
+ 0x25483A54: 7C691B79 or. r9,r3,r3
+ 8: GETL R3, t4
+ 9: PUTL t4, R9
+ 10: CMP0L t4, t6 (-rSo)
+ 11: ICRFL t6, $0x0, CR
+ 12: INCEIPL $4
+
+ 0x25483A58: 7F832850 subf r28,r3,r5
+ 13: GETL R3, t8
+ 14: GETL R5, t10
+ 15: SUBL t8, t10
+ 16: PUTL t10, R28
+ 17: INCEIPL $4
+
+ 0x25483A5C: 4182001C bc 12,2,0x25483A78
+ 18: Js02o $0x25483A78
+
+
+
+. 341 25483A4C 20
+. 7C 83 00 D0 54 83 07 BE 7C 69 1B 79 7F 83 28 50 41 82 00 1C
+==== BB 342 (0x25483A78) approx BBs exec'd 0 ====
+
+ 0x25483A78: 73E00003 andi. r0,r31,0x3
+ 0: GETL R31, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25483A7C: 40820068 bc 4,2,0x25483AE4
+ 6: Jc02o $0x25483AE4
+
+
+
+. 342 25483A78 8
+. 73 E0 00 03 40 82 00 68
+==== BB 343 (0x25483A80) approx BBs exec'd 0 ====
+
+ 0x25483A80: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25483A84: 7FE4FB78 or r4,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25483A88: 5785F0BE rlwinm r5,r28,30,2,31
+ 6: GETL R28, t4
+ 7: SHRL $0x2, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0x25483A8C: 48000239 bl 0x25483CC4
+ 10: MOVL $0x25483A90, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0x25483CC4 ($4)
+
+
+
+. 343 25483A80 16
+. 7F A3 EB 78 7F E4 FB 78 57 85 F0 BE 48 00 02 39
+==== BB 344 (0x25483DA8) approx BBs exec'd 0 ====
+
+ 0x25483DA8: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25483DAC: 3884FFF0 addi r4,r4,-16
+ 4: GETL R4, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25483DB0: 81240014 lwz r9,20(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0x25483DB4: 3863FFEC addi r3,r3,-20
+ 13: GETL R3, t10
+ 14: ADDL $0xFFFFFFEC, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0x25483DB8: 38A50004 addi r5,r5,4
+ 17: GETL R5, t12
+ 18: ADDL $0x4, t12
+ 19: PUTL t12, R5
+ 20: INCEIPL $4
+
+ 0x25483DBC: 90030014 stw r0,20(r3)
+ 21: GETL R0, t14
+ 22: GETL R3, t16
+ 23: ADDL $0x14, t16
+ 24: STL t14, (t16)
+ 25: INCEIPL $4
+
+ 0x25483DC0: 4BFFFF7C b 0x25483D3C
+ 26: JMPo $0x25483D3C ($4)
+
+
+
+. 344 25483DA8 28
+. 80 04 00 00 38 84 FF F0 81 24 00 14 38 63 FF EC 38 A5 00 04 90 03 00 14 4B FF FF 7C
+==== BB 345 (0x25483A90) approx BBs exec'd 0 ====
+
+ 0x25483A90: 5786003A rlwinm r6,r28,0,0,29
+ 0: GETL R28, t0
+ 1: ANDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x25483A94: 578507BE rlwinm r5,r28,0,30,31
+ 4: GETL R28, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0x25483A98: 7FBD3214 add r29,r29,r6
+ 8: GETL R29, t4
+ 9: GETL R6, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R29
+ 12: INCEIPL $4
+
+ 0x25483A9C: 7FFF3214 add r31,r31,r6
+ 13: GETL R31, t8
+ 14: GETL R6, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R31
+ 17: INCEIPL $4
+
+ 0x25483AA0: 2C850000 cmpi cr1,r5,0
+ 18: GETL R5, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x1, CR
+ 21: INCEIPL $4
+
+ 0x25483AA4: 4186001C bc 12,6,0x25483AC0
+ 22: Js06o $0x25483AC0
+
+
+
+. 345 25483A90 24
+. 57 86 00 3A 57 85 07 BE 7F BD 32 14 7F FF 32 14 2C 85 00 00 41 86 00 1C
+==== BB 346 (0x25474C90) approx BBs exec'd 0 ====
+
+ 0x25474C90: 39200000 li r9,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25474C94: 99230000 stb r9,0(r3)
+ 3: GETL R9, t2
+ 4: GETL R3, t4
+ 5: STB t2, (t4)
+ 6: INCEIPL $4
+
+ 0x25474C98: 80920000 lwz r4,0(r18)
+ 7: GETL R18, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R4
+ 10: INCEIPL $4
+
+ 0x25474C9C: 93BF0010 stw r29,16(r31)
+ 11: GETL R29, t10
+ 12: GETL R31, t12
+ 13: ADDL $0x10, t12
+ 14: STL t10, (t12)
+ 15: INCEIPL $4
+
+ 0x25474CA0: 7F9D2040 cmpl cr7,r29,r4
+ 16: GETL R29, t14
+ 17: GETL R4, t16
+ 18: CMPUL t14, t16, t18 (-rSo)
+ 19: ICRFL t18, $0x7, CR
+ 20: INCEIPL $4
+
+ 0x25474CA4: 409D0008 bc 4,29,0x25474CAC
+ 21: Jc29o $0x25474CAC
+
+
+
+. 346 25474C90 24
+. 39 20 00 00 99 23 00 00 80 92 00 00 93 BF 00 10 7F 9D 20 40 40 9D 00 08
+==== BB 347 (0x25474CA8) approx BBs exec'd 0 ====
+
+ 0x25474CA8: 93B20000 stw r29,0(r18)
+ 0: GETL R29, t0
+ 1: GETL R18, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25474CAC: 813A0000 lwz r9,0(r26)
+ 4: GETL R26, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R9
+ 7: INCEIPL $4
+
+ 0x25474CB0: 895C0000 lbz r10,0(r28)
+ 8: GETL R28, t8
+ 9: LDB (t8), t10
+ 10: PUTL t10, R10
+ 11: INCEIPL $4
+
+ 0x25474CB4: 2C890000 cmpi cr1,r9,0
+ 12: GETL R9, t12
+ 13: CMP0L t12, t14 (-rSo)
+ 14: ICRFL t14, $0x1, CR
+ 15: INCEIPL $4
+
+ 0x25474CB8: 6948002F xori r8,r10,0x2F
+ 16: GETL R10, t16
+ 17: XORL $0x2F, t16
+ 18: PUTL t16, R8
+ 19: INCEIPL $4
+
+ 0x25474CBC: 7F8800D0 neg r28,r8
+ 20: GETL R8, t18
+ 21: NEGL t18
+ 22: PUTL t18, R28
+ 23: INCEIPL $4
+
+ 0x25474CC0: 578317BC rlwinm r3,r28,2,30,30
+ 24: GETL R28, t20
+ 25: ROLL $0x2, t20
+ 26: ANDL $0x2, t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0x25474CC4: 41860018 bc 12,6,0x25474CDC
+ 29: Js06o $0x25474CDC
+
+
+
+. 347 25474CA8 32
+. 93 B2 00 00 81 3A 00 00 89 5C 00 00 2C 89 00 00 69 48 00 2F 7F 88 00 D0 57 83 17 BC 41 86 00 18
+==== BB 348 (0x25474CC8) approx BBs exec'd 0 ====
+
+ 0x25474CC8: 7D2903A6 mtctr r9
+ 0: GETL R9, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x25474CCC: 397F0014 addi r11,r31,20
+ 3: GETL R31, t2
+ 4: ADDL $0x14, t2
+ 5: PUTL t2, R11
+ 6: INCEIPL $4
+
+ 0x25474CD0: 906B0000 stw r3,0(r11)
+ 7: GETL R3, t4
+ 8: GETL R11, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x25474CD4: 396B0004 addi r11,r11,4
+ 11: GETL R11, t8
+ 12: ADDL $0x4, t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0x25474CD8: 4200FFF8 bc 16,0,0x25474CD0
+ 15: GETL CTR, t10
+ 16: ADDL $0xFFFFFFFF, t10
+ 17: PUTL t10, CTR
+ 18: JIFZL t10, $0x25474CDC
+ 19: JMPo $0x25474CD0 ($4)
+
+
+
+. 348 25474CC8 20
+. 7D 29 03 A6 39 7F 00 14 90 6B 00 00 39 6B 00 04 42 00 FF F8
+==== BB 349 (0x25474CD0) approx BBs exec'd 0 ====
+
+ 0x25474CD0: 906B0000 stw r3,0(r11)
+ 0: GETL R3, t0
+ 1: GETL R11, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25474CD4: 396B0004 addi r11,r11,4
+ 4: GETL R11, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x25474CD8: 4200FFF8 bc 16,0,0x25474CD0
+ 8: GETL CTR, t6
+ 9: ADDL $0xFFFFFFFF, t6
+ 10: PUTL t6, CTR
+ 11: JIFZL t6, $0x25474CDC
+ 12: JMPo $0x25474CD0 ($4)
+
+
+
+. 349 25474CD0 12
+. 90 6B 00 00 39 6B 00 04 42 00 FF F8
+==== BB 350 (0x25474CDC) approx BBs exec'd 0 ====
+
+ 0x25474CDC: 927F0004 stw r19,4(r31)
+ 0: GETL R19, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x4, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25474CE0: 418E021C bc 12,14,0x25474EFC
+ 5: Js14o $0x25474EFC
+
+
+
+. 350 25474CDC 8
+. 92 7F 00 04 41 8E 02 1C
+==== BB 351 (0x25474EFC) approx BBs exec'd 0 ====
+
+ 0x25474EFC: 92FF0008 stw r23,8(r31)
+ 0: GETL R23, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25474F00: 4BFFFE08 b 0x25474D08
+ 5: JMPo $0x25474D08 ($4)
+
+
+
+. 351 25474EFC 8
+. 92 FF 00 08 4B FF FE 08
+==== BB 352 (0x25474D08) approx BBs exec'd 0 ====
+
+ 0x25474D08: 801901B0 lwz r0,432(r25)
+ 0: GETL R25, t0
+ 1: ADDL $0x1B0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25474D0C: 571D103A rlwinm r29,r24,2,0,29
+ 5: GETL R24, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0x25474D10: 38610008 addi r3,r1,8
+ 9: GETL R1, t6
+ 10: ADDL $0x8, t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0x25474D14: 7EA4AB78 or r4,r21,r21
+ 13: GETL R21, t8
+ 14: PUTL t8, R4
+ 15: INCEIPL $4
+
+ 0x25474D18: 901F0000 stw r0,0(r31)
+ 16: GETL R0, t10
+ 17: GETL R31, t12
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0x25474D1C: 3B180001 addi r24,r24,1
+ 20: GETL R24, t14
+ 21: ADDL $0x1, t14
+ 22: PUTL t14, R24
+ 23: INCEIPL $4
+
+ 0x25474D20: 93F901B0 stw r31,432(r25)
+ 24: GETL R31, t16
+ 25: GETL R25, t18
+ 26: ADDL $0x1B0, t18
+ 27: STL t16, (t18)
+ 28: INCEIPL $4
+
+ 0x25474D24: 7FFDB12E stwx r31,r29,r22
+ 29: GETL R22, t20
+ 30: GETL R29, t22
+ 31: ADDL t22, t20
+ 32: GETL R31, t24
+ 33: STL t24, (t20)
+ 34: INCEIPL $4
+
+ 0x25474D28: 4800B615 bl 0x2548033C
+ 35: MOVL $0x25474D2C, t26
+ 36: PUTL t26, LR
+ 37: JMPo-c $0x2548033C ($4)
+
+
+
+. 352 25474D08 36
+. 80 19 01 B0 57 1D 10 3A 38 61 00 08 7E A4 AB 78 90 1F 00 00 3B 18 00 01 93 F9 01 B0 7F FD B1 2E 48 00 B6 15
+==== BB 353 (0x254803A0) approx BBs exec'd 0 ====
+
+ 0x254803A0: 38210010 addi r1,r1,16
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: PUTL t0, R1
+ 3: INCEIPL $4
+
+ 0x254803A4: 4E800020 blr
+ 4: GETL LR, t2
+ 5: JMPo-r t2 ($4)
+
+
+
+. 353 254803A0 8
+. 38 21 00 10 4E 80 00 20
+==== BB 354 (0x25474D2C) approx BBs exec'd 0 ====
+
+ 0x25474D2C: 2E030000 cmpi cr4,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25474D30: 7C7F1B78 or r31,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R31
+ 6: INCEIPL $4
+
+ 0x25474D34: 7C7C1B78 or r28,r3,r3
+ 7: GETL R3, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25474D38: 4092FEBC bc 4,18,0x25474BF4
+ 10: Jc18o $0x25474BF4
+
+
+
+. 354 25474D2C 16
+. 2E 03 00 00 7C 7F 1B 78 7C 7C 1B 78 40 92 FE BC
+==== BB 355 (0x25474D3C) approx BBs exec'd 0 ====
+
+ 0x25474D3C: 81E10064 lwz r15,100(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x64, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R15
+ 4: INCEIPL $4
+
+ 0x25474D40: 5710103A rlwinm r16,r24,2,0,29
+ 5: GETL R24, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R16
+ 8: INCEIPL $4
+
+ 0x25474D44: 81810018 lwz r12,24(r1)
+ 9: GETL R1, t6
+ 10: ADDL $0x18, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0x25474D48: 7C70B12E stwx r3,r16,r22
+ 14: GETL R22, t10
+ 15: GETL R16, t12
+ 16: ADDL t12, t10
+ 17: GETL R3, t14
+ 18: STL t14, (t10)
+ 19: INCEIPL $4
+
+ 0x25474D4C: 7DE803A6 mtlr r15
+ 20: GETL R15, t16
+ 21: PUTL t16, LR
+ 22: INCEIPL $4
+
+ 0x25474D50: 7EC3B378 or r3,r22,r22
+ 23: GETL R22, t18
+ 24: PUTL t18, R3
+ 25: INCEIPL $4
+
+ 0x25474D54: 81E1001C lwz r15,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R15
+ 30: INCEIPL $4
+
+ 0x25474D58: 82010020 lwz r16,32(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R16
+ 35: INCEIPL $4
+
+ 0x25474D5C: 7D818120 mtcrf 0x18,r12
+ 36: GETL R12, t28
+ 37: ICRFL t28, $0x3, CR
+ 38: ICRFL t28, $0x4, CR
+ 39: INCEIPL $4
+
+ 0x25474D60: 82210024 lwz r17,36(r1)
+ 40: GETL R1, t30
+ 41: ADDL $0x24, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R17
+ 44: INCEIPL $4
+
+ 0x25474D64: 82410028 lwz r18,40(r1)
+ 45: GETL R1, t34
+ 46: ADDL $0x28, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R18
+ 49: INCEIPL $4
+
+ 0x25474D68: 8261002C lwz r19,44(r1)
+ 50: GETL R1, t38
+ 51: ADDL $0x2C, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R19
+ 54: INCEIPL $4
+
+ 0x25474D6C: 82810030 lwz r20,48(r1)
+ 55: GETL R1, t42
+ 56: ADDL $0x30, t42
+ 57: LDL (t42), t44
+ 58: PUTL t44, R20
+ 59: INCEIPL $4
+
+ 0x25474D70: 82A10034 lwz r21,52(r1)
+ 60: GETL R1, t46
+ 61: ADDL $0x34, t46
+ 62: LDL (t46), t48
+ 63: PUTL t48, R21
+ 64: INCEIPL $4
+
+ 0x25474D74: 82C10038 lwz r22,56(r1)
+ 65: GETL R1, t50
+ 66: ADDL $0x38, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R22
+ 69: INCEIPL $4
+
+ 0x25474D78: 82E1003C lwz r23,60(r1)
+ 70: GETL R1, t54
+ 71: ADDL $0x3C, t54
+ 72: LDL (t54), t56
+ 73: PUTL t56, R23
+ 74: INCEIPL $4
+
+ 0x25474D7C: 83010040 lwz r24,64(r1)
+ 75: GETL R1, t58
+ 76: ADDL $0x40, t58
+ 77: LDL (t58), t60
+ 78: PUTL t60, R24
+ 79: INCEIPL $4
+
+ 0x25474D80: 83210044 lwz r25,68(r1)
+ 80: GETL R1, t62
+ 81: ADDL $0x44, t62
+ 82: LDL (t62), t64
+ 83: PUTL t64, R25
+ 84: INCEIPL $4
+
+ 0x25474D84: 83410048 lwz r26,72(r1)
+ 85: GETL R1, t66
+ 86: ADDL $0x48, t66
+ 87: LDL (t66), t68
+ 88: PUTL t68, R26
+ 89: INCEIPL $4
+
+ 0x25474D88: 8361004C lwz r27,76(r1)
+ 90: GETL R1, t70
+ 91: ADDL $0x4C, t70
+ 92: LDL (t70), t72
+ 93: PUTL t72, R27
+ 94: INCEIPL $4
+
+ 0x25474D8C: 83810050 lwz r28,80(r1)
+ 95: GETL R1, t74
+ 96: ADDL $0x50, t74
+ 97: LDL (t74), t76
+ 98: PUTL t76, R28
+ 99: INCEIPL $4
+
+ 0x25474D90: 83A10054 lwz r29,84(r1)
+ 100: GETL R1, t78
+ 101: ADDL $0x54, t78
+ 102: LDL (t78), t80
+ 103: PUTL t80, R29
+ 104: INCEIPL $4
+
+ 0x25474D94: 83C10058 lwz r30,88(r1)
+ 105: GETL R1, t82
+ 106: ADDL $0x58, t82
+ 107: LDL (t82), t84
+ 108: PUTL t84, R30
+ 109: INCEIPL $4
+
+ 0x25474D98: 83E1005C lwz r31,92(r1)
+ 110: GETL R1, t86
+ 111: ADDL $0x5C, t86
+ 112: LDL (t86), t88
+ 113: PUTL t88, R31
+ 114: INCEIPL $4
+
+ 0x25474D9C: 38210060 addi r1,r1,96
+ 115: GETL R1, t90
+ 116: ADDL $0x60, t90
+ 117: PUTL t90, R1
+ 118: INCEIPL $4
+
+ 0x25474DA0: 4E800020 blr
+ 119: GETL LR, t92
+ 120: JMPo-r t92 ($4)
+
+
+
+. 355 25474D3C 104
+. 81 E1 00 64 57 10 10 3A 81 81 00 18 7C 70 B1 2E 7D E8 03 A6 7E C3 B3 78 81 E1 00 1C 82 01 00 20 7D 81 81 20 82 21 00 24 82 41 00 28 82 61 00 2C 82 81 00 30 82 A1 00 34 82 C1 00 38 82 E1 00 3C 83 01 00 40 83 21 00 44 83 41 00 48 83 61 00 4C 83 81 00 50 83 A1 00 54 83 C1 00 58 83 E1 00 5C 38 21 00 60 4E 80 00 20
+==== BB 356 (0x254753B0) approx BBs exec'd 0 ====
+
+ 0x254753B0: 807D0000 lwz r3,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x254753B4: 83830000 lwz r28,0(r3)
+ 4: GETL R3, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R28
+ 7: INCEIPL $4
+
+ 0x254753B8: 2C1C0000 cmpi cr0,r28,0
+ 8: GETL R28, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x254753BC: 41820074 bc 12,2,0x25475430
+ 12: Js02o $0x25475430
+
+
+
+. 356 254753B0 16
+. 80 7D 00 00 83 83 00 00 2C 1C 00 00 41 82 00 74
+==== BB 357 (0x254753C0) approx BBs exec'd 0 ====
+
+ 0x254753C0: 38E00000 li r7,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x254753C4: 90FD0004 stw r7,4(r29)
+ 3: GETL R7, t2
+ 4: GETL R29, t4
+ 5: ADDL $0x4, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x254753C8: 83B701B0 lwz r29,432(r23)
+ 8: GETL R23, t6
+ 9: ADDL $0x1B0, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x254753CC: 93B80060 stw r29,96(r24)
+ 13: GETL R29, t10
+ 14: GETL R24, t12
+ 15: ADDL $0x60, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254753D0: 81410000 lwz r10,0(r1)
+ 18: GETL R1, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R10
+ 21: INCEIPL $4
+
+ 0x254753D4: 82EA0004 lwz r23,4(r10)
+ 22: GETL R10, t18
+ 23: ADDL $0x4, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R23
+ 26: INCEIPL $4
+
+ 0x254753D8: 830AFFE0 lwz r24,-32(r10)
+ 27: GETL R10, t22
+ 28: ADDL $0xFFFFFFE0, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R24
+ 31: INCEIPL $4
+
+ 0x254753DC: 7EE803A6 mtlr r23
+ 32: GETL R23, t26
+ 33: PUTL t26, LR
+ 34: INCEIPL $4
+
+ 0x254753E0: 832AFFE4 lwz r25,-28(r10)
+ 35: GETL R10, t28
+ 36: ADDL $0xFFFFFFE4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R25
+ 39: INCEIPL $4
+
+ 0x254753E4: 82EAFFDC lwz r23,-36(r10)
+ 40: GETL R10, t32
+ 41: ADDL $0xFFFFFFDC, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R23
+ 44: INCEIPL $4
+
+ 0x254753E8: 834AFFE8 lwz r26,-24(r10)
+ 45: GETL R10, t36
+ 46: ADDL $0xFFFFFFE8, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R26
+ 49: INCEIPL $4
+
+ 0x254753EC: 836AFFEC lwz r27,-20(r10)
+ 50: GETL R10, t40
+ 51: ADDL $0xFFFFFFEC, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R27
+ 54: INCEIPL $4
+
+ 0x254753F0: 838AFFF0 lwz r28,-16(r10)
+ 55: GETL R10, t44
+ 56: ADDL $0xFFFFFFF0, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R28
+ 59: INCEIPL $4
+
+ 0x254753F4: 83AAFFF4 lwz r29,-12(r10)
+ 60: GETL R10, t48
+ 61: ADDL $0xFFFFFFF4, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R29
+ 64: INCEIPL $4
+
+ 0x254753F8: 83CAFFF8 lwz r30,-8(r10)
+ 65: GETL R10, t52
+ 66: ADDL $0xFFFFFFF8, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R30
+ 69: INCEIPL $4
+
+ 0x254753FC: 83EAFFFC lwz r31,-4(r10)
+ 70: GETL R10, t56
+ 71: ADDL $0xFFFFFFFC, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R31
+ 74: INCEIPL $4
+
+ 0x25475400: 7D415378 or r1,r10,r10
+ 75: GETL R10, t60
+ 76: PUTL t60, R1
+ 77: INCEIPL $4
+
+ 0x25475404: 4E800020 blr
+ 78: GETL LR, t62
+ 79: JMPo-r t62 ($4)
+
+
+
+. 357 254753C0 72
+. 38 E0 00 00 90 FD 00 04 83 B7 01 B0 93 B8 00 60 81 41 00 00 82 EA 00 04 83 0A FF E0 7E E8 03 A6 83 2A FF E4 82 EA FF DC 83 4A FF E8 83 6A FF EC 83 8A FF F0 83 AA FF F4 83 CA FF F8 83 EA FF FC 7D 41 53 78 4E 80 00 20
+==== BB 358 (0x25472F70) approx BBs exec'd 0 ====
+
+ 0x25472F70: 4BFFF76C b 0x254726DC
+ 0: JMPo $0x254726DC ($4)
+
+
+
+. 358 25472F70 4
+. 4B FF F7 6C
+==== BB 359 (0x254726DC) approx BBs exec'd 0 ====
+
+ 0x254726DC: 80EE01BC lwz r7,444(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1BC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254726E0: 2E070000 cmpi cr4,r7,0
+ 5: GETL R7, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254726E4: 40920010 bc 4,18,0x254726F4
+ 9: Jc18o $0x254726F4
+
+
+
+. 359 254726DC 12
+. 80 EE 01 BC 2E 07 00 00 40 92 00 10
+==== BB 360 (0x254726E8) approx BBs exec'd 0 ====
+
+ 0x254726E8: 83AE01D4 lwz r29,468(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1D4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254726EC: 815D0000 lwz r10,0(r29)
+ 5: GETL R29, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0x254726F0: 914E01BC stw r10,444(r14)
+ 9: GETL R10, t8
+ 10: GETL R14, t10
+ 11: ADDL $0x1BC, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x254726F4: 834F004C lwz r26,76(r15)
+ 14: GETL R15, t12
+ 15: ADDL $0x4C, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R26
+ 18: INCEIPL $4
+
+ 0x254726F8: 3AE00001 li r23,1
+ 19: MOVL $0x1, t16
+ 20: PUTL t16, R23
+ 21: INCEIPL $4
+
+ 0x254726FC: 808E0338 lwz r4,824(r14)
+ 22: GETL R14, t18
+ 23: ADDL $0x338, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R4
+ 26: INCEIPL $4
+
+ 0x25472700: 386E01B8 addi r3,r14,440
+ 27: GETL R14, t22
+ 28: ADDL $0x1B8, t22
+ 29: PUTL t22, R3
+ 30: INCEIPL $4
+
+ 0x25472704: 2C1AFFFE cmpi cr0,r26,-2
+ 31: GETL R26, t24
+ 32: MOVL $0xFFFFFFFE, t28
+ 33: CMPL t24, t28, t26 (-rSo)
+ 34: ICRFL t26, $0x0, CR
+ 35: INCEIPL $4
+
+ 0x25472708: 826E0004 lwz r19,4(r14)
+ 36: GETL R14, t30
+ 37: ADDL $0x4, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R19
+ 40: INCEIPL $4
+
+ 0x2547270C: 816E0198 lwz r11,408(r14)
+ 41: GETL R14, t34
+ 42: ADDL $0x198, t34
+ 43: LDL (t34), t36
+ 44: PUTL t36, R11
+ 45: INCEIPL $4
+
+ 0x25472710: 52E4F002 rlwimi r4,r23,30,0,1
+ 46: GETL R4, t38
+ 47: GETL R23, t40
+ 48: ROLL $0x1E, t40
+ 49: ANDL $0xC0000000, t40
+ 50: ANDL $0x3FFFFFFF, t38
+ 51: ORL t38, t40
+ 52: PUTL t40, R4
+ 53: INCEIPL $4
+
+ 0x25472714: 818E019C lwz r12,412(r14)
+ 54: GETL R14, t42
+ 55: ADDL $0x19C, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R12
+ 58: INCEIPL $4
+
+ 0x25472718: 38B30001 addi r5,r19,1
+ 59: GETL R19, t46
+ 60: ADDL $0x1, t46
+ 61: PUTL t46, R5
+ 62: INCEIPL $4
+
+ 0x2547271C: 908E0338 stw r4,824(r14)
+ 63: GETL R4, t48
+ 64: GETL R14, t50
+ 65: ADDL $0x338, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x25472720: 310C0001 addic r8,r12,1
+ 68: GETL R12, t52
+ 69: ADCL $0x1, t52 (-wCa)
+ 70: PUTL t52, R8
+ 71: INCEIPL $4
+
+ 0x25472724: 7CEB0194 addze r7,r11
+ 72: GETL R11, t54
+ 73: ADCL $0x0, t54 (-rCa-wCa)
+ 74: PUTL t54, R7
+ 75: INCEIPL $4
+
+ 0x25472728: 90AE0004 stw r5,4(r14)
+ 76: GETL R5, t56
+ 77: GETL R14, t58
+ 78: ADDL $0x4, t58
+ 79: STL t56, (t58)
+ 80: INCEIPL $4
+
+ 0x2547272C: 9074000C stw r3,12(r20)
+ 81: GETL R3, t60
+ 82: GETL R20, t62
+ 83: ADDL $0xC, t62
+ 84: STL t60, (t62)
+ 85: INCEIPL $4
+
+ 0x25472730: 90EE0198 stw r7,408(r14)
+ 86: GETL R7, t64
+ 87: GETL R14, t66
+ 88: ADDL $0x198, t66
+ 89: STL t64, (t66)
+ 90: INCEIPL $4
+
+ 0x25472734: 910E019C stw r8,412(r14)
+ 91: GETL R8, t68
+ 92: GETL R14, t70
+ 93: ADDL $0x19C, t70
+ 94: STL t68, (t70)
+ 95: INCEIPL $4
+
+ 0x25472738: 928E01C8 stw r20,456(r14)
+ 96: GETL R20, t72
+ 97: GETL R14, t74
+ 98: ADDL $0x1C8, t74
+ 99: STL t72, (t74)
+ 100: INCEIPL $4
+
+ 0x2547273C: 41820838 bc 12,2,0x25472F74
+ 101: Js02o $0x25472F74
+
+
+
+. 360 254726E8 88
+. 83 AE 01 D4 81 5D 00 00 91 4E 01 BC 83 4F 00 4C 3A E0 00 01 80 8E 03 38 38 6E 01 B8 2C 1A FF FE 82 6E 00 04 81 6E 01 98 52 E4 F0 02 81 8E 01 9C 38 B3 00 01 90 8E 03 38 31 0C 00 01 7C EB 01 94 90 AE 00 04 90 74 00 0C 90 EE 01 98 91 0E 01 9C 92 8E 01 C8 41 82 08 38
+==== BB 361 (0x25472F74) approx BBs exec'd 0 ====
+
+ 0x25472F74: 80140000 lwz r0,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25472F78: 7DE97B78 or r9,r15,r15
+ 4: GETL R15, t4
+ 5: PUTL t4, R9
+ 6: INCEIPL $4
+
+ 0x25472F7C: 2F000000 cmpi cr6,r0,0
+ 7: GETL R0, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x6, CR
+ 10: INCEIPL $4
+
+ 0x25472F80: 3800FFFF li r0,-1
+ 11: MOVL $0xFFFFFFFF, t10
+ 12: PUTL t10, R0
+ 13: INCEIPL $4
+
+ 0x25472F84: 419A0008 bc 12,26,0x25472F8C
+ 14: Js26o $0x25472F8C
+
+
+
+. 361 25472F74 20
+. 80 14 00 00 7D E9 7B 78 2F 00 00 00 38 00 FF FF 41 9A 00 08
+==== BB 362 (0x25472F8C) approx BBs exec'd 0 ====
+
+ 0x25472F8C: 9009004C stw r0,76(r9)
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ADDL $0x4C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25472F90: 4BFFF7B0 b 0x25472740
+ 5: JMPo $0x25472740 ($4)
+
+
+
+. 362 25472F8C 8
+. 90 09 00 4C 4B FF F7 B0
+==== BB 363 (0x25472740) approx BBs exec'd 0 ====
+
+ 0x25472740: 818E0358 lwz r12,856(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x358, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x25472744: A16C002C lhz r11,44(r12)
+ 5: GETL R12, t4
+ 6: ADDL $0x2C, t4
+ 7: LDW (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25472748: 838C001C lwz r28,28(r12)
+ 10: GETL R12, t8
+ 11: ADDL $0x1C, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R28
+ 14: INCEIPL $4
+
+ 0x2547274C: B16E030C sth r11,780(r14)
+ 15: GETL R11, t12
+ 16: GETL R14, t14
+ 17: ADDL $0x30C, t14
+ 18: STW t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25472750: A32C002C lhz r25,44(r12)
+ 20: GETL R12, t16
+ 21: ADDL $0x2C, t16
+ 22: LDW (t16), t18
+ 23: PUTL t18, R25
+ 24: INCEIPL $4
+
+ 0x25472754: 7D6CE214 add r11,r12,r28
+ 25: GETL R12, t20
+ 26: GETL R28, t22
+ 27: ADDL t20, t22
+ 28: PUTL t22, R11
+ 29: INCEIPL $4
+
+ 0x25472758: 916E0304 stw r11,772(r14)
+ 30: GETL R11, t24
+ 31: GETL R14, t26
+ 32: ADDL $0x304, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x2547275C: 2F990000 cmpi cr7,r25,0
+ 35: GETL R25, t28
+ 36: CMP0L t28, t30 (-rSo)
+ 37: ICRFL t30, $0x7, CR
+ 38: INCEIPL $4
+
+ 0x25472760: 3959FFFF addi r10,r25,-1
+ 39: GETL R25, t32
+ 40: ADDL $0xFFFFFFFF, t32
+ 41: PUTL t32, R10
+ 42: INCEIPL $4
+
+ 0x25472764: 419E002C bc 12,30,0x25472790
+ 43: Js30o $0x25472790
+
+
+
+. 363 25472740 40
+. 81 8E 03 58 A1 6C 00 2C 83 8C 00 1C B1 6E 03 0C A3 2C 00 2C 7D 6C E2 14 91 6E 03 04 2F 99 00 00 39 59 FF FF 41 9E 00 2C
+==== BB 364 (0x25472768) approx BBs exec'd 0 ====
+
+ 0x25472768: 3D206474 lis r9,25716
+ 0: MOVL $0x64740000, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x2547276C: 6127E552 ori r7,r9,0xE552
+ 3: MOVL $0x6474E552, t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x25472770: 55582834 rlwinm r24,r10,5,0,26
+ 6: GETL R10, t4
+ 7: SHLL $0x5, t4
+ 8: PUTL t4, R24
+ 9: INCEIPL $4
+
+ 0x25472774: 7F78582E lwzx r27,r24,r11
+ 10: GETL R11, t6
+ 11: GETL R24, t8
+ 12: ADDL t8, t6
+ 13: LDL (t6), t10
+ 14: PUTL t10, R27
+ 15: INCEIPL $4
+
+ 0x25472778: 7D185A14 add r8,r24,r11
+ 16: GETL R24, t12
+ 17: GETL R11, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R8
+ 20: INCEIPL $4
+
+ 0x2547277C: 7C9B3800 cmp cr1,r27,r7
+ 21: GETL R27, t16
+ 22: GETL R7, t18
+ 23: CMPL t16, t18, t20 (-rSo)
+ 24: ICRFL t20, $0x1, CR
+ 25: INCEIPL $4
+
+ 0x25472780: 41860C80 bc 12,6,0x25473400
+ 26: Js06o $0x25473400
+
+
+
+. 364 25472768 28
+. 3D 20 64 74 61 27 E5 52 55 58 28 34 7F 78 58 2E 7D 18 5A 14 7C 9B 38 00 41 86 0C 80
+==== BB 365 (0x25473400) approx BBs exec'd 0 ====
+
+ 0x25473400: 83B10000 lwz r29,0(r17)
+ 0: GETL R17, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0x25473404: 3B400000 li r26,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R26
+ 6: INCEIPL $4
+
+ 0x25473408: 82C80008 lwz r22,8(r8)
+ 7: GETL R8, t6
+ 8: ADDL $0x8, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R22
+ 11: INCEIPL $4
+
+ 0x2547340C: 3B200000 li r25,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R25
+ 14: INCEIPL $4
+
+ 0x25473410: 2C1D0000 cmpi cr0,r29,0
+ 15: GETL R29, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x25473414: 92CE03EC stw r22,1004(r14)
+ 19: GETL R22, t16
+ 20: GETL R14, t18
+ 21: ADDL $0x3EC, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0x25473418: 80C80014 lwz r6,20(r8)
+ 24: GETL R8, t20
+ 25: ADDL $0x14, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R6
+ 28: INCEIPL $4
+
+ 0x2547341C: 90CE03F0 stw r6,1008(r14)
+ 29: GETL R6, t24
+ 30: GETL R14, t26
+ 31: ADDL $0x3F0, t26
+ 32: STL t24, (t26)
+ 33: INCEIPL $4
+
+ 0x25473420: 4182F384 bc 12,2,0x254727A4
+ 34: Js02o $0x254727A4
+
+
+
+. 365 25473400 36
+. 83 B1 00 00 3B 40 00 00 82 C8 00 08 3B 20 00 00 2C 1D 00 00 92 CE 03 EC 80 C8 00 14 90 CE 03 F0 41 82 F3 84
+==== BB 366 (0x25473424) approx BBs exec'd 0 ====
+
+ 0x25473424: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25473428: 4800FBA9 bl 0x25482FD0
+ 3: MOVL $0x2547342C, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25482FD0 ($4)
+
+
+
+. 366 25473424 8
+. 7F A3 EB 78 48 00 FB A9
+==== BB 367 (0x2547342C) approx BBs exec'd 0 ====
+
+ 0x2547342C: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x25473430: 7C711B78 or r17,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R17
+ 5: INCEIPL $4
+
+ 0x25473434: 3863001F addi r3,r3,31
+ 6: GETL R3, t4
+ 7: ADDL $0x1F, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0x25473438: 546A0036 rlwinm r10,r3,0,0,27
+ 10: GETL R3, t6
+ 11: ANDL $0xFFFFFFF0, t6
+ 12: PUTL t6, R10
+ 13: INCEIPL $4
+
+ 0x2547343C: 80E10000 lwz r7,0(r1)
+ 14: GETL R1, t8
+ 15: LDL (t8), t10
+ 16: PUTL t10, R7
+ 17: INCEIPL $4
+
+ 0x25473440: 7EAA00D0 neg r21,r10
+ 18: GETL R10, t12
+ 19: NEGL t12
+ 20: PUTL t12, R21
+ 21: INCEIPL $4
+
+ 0x25473444: 38B10001 addi r5,r17,1
+ 22: GETL R17, t14
+ 23: ADDL $0x1, t14
+ 24: PUTL t14, R5
+ 25: INCEIPL $4
+
+ 0x25473448: 7CE1A96E stwux r7,r1,r21
+ 26: GETL R21, t16
+ 27: GETL R1, t18
+ 28: ADDL t18, t16
+ 29: PUTL t16, R1
+ 30: GETL R7, t20
+ 31: STL t20, (t16)
+ 32: INCEIPL $4
+
+ 0x2547344C: 39010017 addi r8,r1,23
+ 33: GETL R1, t22
+ 34: ADDL $0x17, t22
+ 35: PUTL t22, R8
+ 36: INCEIPL $4
+
+ 0x25473450: 55030036 rlwinm r3,r8,0,0,27
+ 37: GETL R8, t24
+ 38: ANDL $0xFFFFFFF0, t24
+ 39: PUTL t24, R3
+ 40: INCEIPL $4
+
+ 0x25473454: 4801078D bl 0x25483BE0
+ 41: MOVL $0x25473458, t26
+ 42: PUTL t26, LR
+ 43: JMPo-c $0x25483BE0 ($4)
+
+
+
+. 367 2547342C 44
+. 7F A4 EB 78 7C 71 1B 78 38 63 00 1F 54 6A 00 36 80 E1 00 00 7E AA 00 D0 38 B1 00 01 7C E1 A9 6E 39 01 00 17 55 03 00 36 48 01 07 8D
+==== BB 368 (0x25483D6C) approx BBs exec'd 0 ====
+
+ 0x25483D6C: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25483D70: 3863FFFC addi r3,r3,-4
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFFC, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483D74: 81240004 lwz r9,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0x25483D78: 90030004 stw r0,4(r3)
+ 13: GETL R0, t10
+ 14: GETL R3, t12
+ 15: ADDL $0x4, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25483D7C: 4BFFFFA0 b 0x25483D1C
+ 18: JMPo $0x25483D1C ($4)
+
+
+
+. 368 25483D6C 20
+. 80 04 00 00 38 63 FF FC 81 24 00 04 90 03 00 04 4B FF FF A0
+==== BB 369 (0x25483D1C) approx BBs exec'd 0 ====
+
+ 0x25483D1C: 80040008 lwz r0,8(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25483D20: 91230008 stw r9,8(r3)
+ 5: GETL R9, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25483D24: 8124000C lwz r9,12(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x25483D28: 9003000C stw r0,12(r3)
+ 15: GETL R0, t12
+ 16: GETL R3, t14
+ 17: ADDL $0xC, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25483D2C: 80040010 lwz r0,16(r4)
+ 20: GETL R4, t16
+ 21: ADDL $0x10, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R0
+ 24: INCEIPL $4
+
+ 0x25483D30: 91230010 stw r9,16(r3)
+ 25: GETL R9, t20
+ 26: GETL R3, t22
+ 27: ADDL $0x10, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0x25483D34: 81240014 lwz r9,20(r4)
+ 30: GETL R4, t24
+ 31: ADDL $0x14, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R9
+ 34: INCEIPL $4
+
+ 0x25483D38: 90030014 stw r0,20(r3)
+ 35: GETL R0, t28
+ 36: GETL R3, t30
+ 37: ADDL $0x14, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x25483D3C: 80040018 lwz r0,24(r4)
+ 40: GETL R4, t32
+ 41: ADDL $0x18, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R0
+ 44: INCEIPL $4
+
+ 0x25483D40: 91230018 stw r9,24(r3)
+ 45: GETL R9, t36
+ 46: GETL R3, t38
+ 47: ADDL $0x18, t38
+ 48: STL t36, (t38)
+ 49: INCEIPL $4
+
+ 0x25483D44: 34A5FFF8 addic. r5,r5,-8
+ 50: GETL R5, t40
+ 51: ADCL $0xFFFFFFF8, t40 (-wCa)
+ 52: PUTL t40, R5
+ 53: CMP0L t40, t42 (-rSo)
+ 54: ICRFL t42, $0x0, CR
+ 55: INCEIPL $4
+
+ 0x25483D48: 8124001C lwz r9,28(r4)
+ 56: GETL R4, t44
+ 57: ADDL $0x1C, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R9
+ 60: INCEIPL $4
+
+ 0x25483D4C: 9003001C stw r0,28(r3)
+ 61: GETL R0, t48
+ 62: GETL R3, t50
+ 63: ADDL $0x1C, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0x25483D50: 38840020 addi r4,r4,32
+ 66: GETL R4, t52
+ 67: ADDL $0x20, t52
+ 68: PUTL t52, R4
+ 69: INCEIPL $4
+
+ 0x25483D54: 38630020 addi r3,r3,32
+ 70: GETL R3, t54
+ 71: ADDL $0x20, t54
+ 72: PUTL t54, R3
+ 73: INCEIPL $4
+
+ 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
+ 74: Jc02o $0x25483D0C
+
+
+
+. 369 25483D1C 64
+. 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+==== BB 370 (0x25473458) approx BBs exec'd 0 ====
+
+ 0x25473458: 907F0044 stw r3,68(r31)
+ 0: GETL R3, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x44, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547345C: 809E00D0 lwz r4,208(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0xD0, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25473460: 387F0044 addi r3,r31,68
+ 10: GETL R31, t8
+ 11: ADDL $0x44, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0x25473464: 4800CED9 bl 0x2548033C
+ 14: MOVL $0x25473468, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x2548033C ($4)
+
+
+
+. 370 25473458 16
+. 90 7F 00 44 80 9E 00 D0 38 7F 00 44 48 00 CE D9
+==== BB 371 (0x25473468) approx BBs exec'd 0 ====
+
+ 0x25473468: 7C7D1B79 or. r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547346C: 41A2F338 bc 13,2,0x254727A4
+ 5: Js02o $0x254727A4
+
+
+
+. 371 25473468 8
+. 7C 7D 1B 79 41 A2 F3 38
+==== BB 372 (0x25473470) approx BBs exec'd 0 ====
+
+ 0x25473470: 88BD0000 lbz r5,0(r29)
+ 0: GETL R29, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x25473474: 2F050000 cmpi cr6,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x25473478: 41BAFFE4 bc 13,26,0x2547345C
+ 8: Js26o $0x2547345C
+
+
+
+. 372 25473470 12
+. 88 BD 00 00 2F 05 00 00 41 BA FF E4
+==== BB 373 (0x2547347C) approx BBs exec'd 0 ====
+
+ 0x2547347C: 80900000 lwz r4,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25473480: 2F840000 cmpi cr7,r4,0
+ 4: GETL R4, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0x25473484: 409E0774 bc 4,30,0x25473BF8
+ 8: Jc30o $0x25473BF8
+
+
+
+. 373 2547347C 12
+. 80 90 00 00 2F 84 00 00 40 9E 07 74
+==== BB 374 (0x25473488) approx BBs exec'd 0 ====
+
+ 0x25473488: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547348C: 38A00001 li r5,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25473490: 38C00001 li r6,1
+ 6: MOVL $0x1, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x25473494: 38E00000 li r7,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0x25473498: 39000000 li r8,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R8
+ 14: INCEIPL $4
+
+ 0x2547349C: 39200000 li r9,0
+ 15: MOVL $0x0, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x254734A0: 7E83A378 or r3,r20,r20
+ 18: GETL R20, t12
+ 19: PUTL t12, R3
+ 20: INCEIPL $4
+
+ 0x254734A4: 48003845 bl 0x25476CE8
+ 21: MOVL $0x254734A8, t14
+ 22: PUTL t14, LR
+ 23: JMPo-c $0x25476CE8 ($4)
+
+
+
+. 374 25473488 32
+. 7F A4 EB 78 38 A0 00 01 38 C0 00 01 38 E0 00 00 39 00 00 00 39 20 00 00 7E 83 A3 78 48 00 38 45
+==== BB 375 _dl_map_object(0x25476CE8) approx BBs exec'd 0 ====
+
+ 0x25476CE8: 9421FD70 stwu r1,-656(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFD70, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25476CEC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25476CF0: 48020311 bl 0x25497000
+ 9: MOVL $0x25476CF4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 375 25476CE8 12
+. 94 21 FD 70 7C 08 02 A6 48 02 03 11
+==== BB 376 (0x25476CF4) approx BBs exec'd 0 ====
+
+ 0x25476CF4: 93C10288 stw r30,648(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x288, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25476CF8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25476CFC: 9261025C stw r19,604(r1)
+ 8: GETL R19, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x25C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25476D00: 92A10264 stw r21,612(r1)
+ 13: GETL R21, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x264, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25476D04: 1E690018 mulli r19,r9,24
+ 18: GETL R9, t14
+ 19: MULL $0x18, t14
+ 20: PUTL t14, R19
+ 21: INCEIPL $4
+
+ 0x25476D08: 90010294 stw r0,660(r1)
+ 22: GETL R0, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x294, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0x25476D0C: 7D800026 mfcr r12
+ 27: GETL CR, t20
+ 28: PUTL t20, R12
+ 29: INCEIPL $4
+
+ 0x25476D10: 82BE04C8 lwz r21,1224(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0x4C8, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R21
+ 34: INCEIPL $4
+
+ 0x25476D14: 93A10284 stw r29,644(r1)
+ 35: GETL R29, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x284, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0x25476D18: 7FB3A82E lwzx r29,r19,r21
+ 40: GETL R21, t30
+ 41: GETL R19, t32
+ 42: ADDL t32, t30
+ 43: LDL (t30), t34
+ 44: PUTL t34, R29
+ 45: INCEIPL $4
+
+ 0x25476D1C: 92010250 stw r16,592(r1)
+ 46: GETL R16, t36
+ 47: GETL R1, t38
+ 48: ADDL $0x250, t38
+ 49: STL t36, (t38)
+ 50: INCEIPL $4
+
+ 0x25476D20: 7CD03378 or r16,r6,r6
+ 51: GETL R6, t40
+ 52: PUTL t40, R16
+ 53: INCEIPL $4
+
+ 0x25476D24: 2F9D0000 cmpi cr7,r29,0
+ 54: GETL R29, t42
+ 55: CMP0L t42, t44 (-rSo)
+ 56: ICRFL t44, $0x7, CR
+ 57: INCEIPL $4
+
+ 0x25476D28: 92210254 stw r17,596(r1)
+ 58: GETL R17, t46
+ 59: GETL R1, t48
+ 60: ADDL $0x254, t48
+ 61: STL t46, (t48)
+ 62: INCEIPL $4
+
+ 0x25476D2C: 92E1026C stw r23,620(r1)
+ 63: GETL R23, t50
+ 64: GETL R1, t52
+ 65: ADDL $0x26C, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0x25476D30: 7CF13B78 or r17,r7,r7
+ 68: GETL R7, t54
+ 69: PUTL t54, R17
+ 70: INCEIPL $4
+
+ 0x25476D34: 93010270 stw r24,624(r1)
+ 71: GETL R24, t56
+ 72: GETL R1, t58
+ 73: ADDL $0x270, t58
+ 74: STL t56, (t58)
+ 75: INCEIPL $4
+
+ 0x25476D38: 7CB72B78 or r23,r5,r5
+ 76: GETL R5, t60
+ 77: PUTL t60, R23
+ 78: INCEIPL $4
+
+ 0x25476D3C: 93210274 stw r25,628(r1)
+ 79: GETL R25, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x274, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x25476D40: 7D184378 or r24,r8,r8
+ 84: GETL R8, t66
+ 85: PUTL t66, R24
+ 86: INCEIPL $4
+
+ 0x25476D44: 9361027C stw r27,636(r1)
+ 87: GETL R27, t68
+ 88: GETL R1, t70
+ 89: ADDL $0x27C, t70
+ 90: STL t68, (t70)
+ 91: INCEIPL $4
+
+ 0x25476D48: 7D394B78 or r25,r9,r9
+ 92: GETL R9, t72
+ 93: PUTL t72, R25
+ 94: INCEIPL $4
+
+ 0x25476D4C: 93E1028C stw r31,652(r1)
+ 95: GETL R31, t74
+ 96: GETL R1, t76
+ 97: ADDL $0x28C, t76
+ 98: STL t74, (t76)
+ 99: INCEIPL $4
+
+ 0x25476D50: 7C7B1B78 or r27,r3,r3
+ 100: GETL R3, t78
+ 101: PUTL t78, R27
+ 102: INCEIPL $4
+
+ 0x25476D54: 91C10248 stw r14,584(r1)
+ 103: GETL R14, t80
+ 104: GETL R1, t82
+ 105: ADDL $0x248, t82
+ 106: STL t80, (t82)
+ 107: INCEIPL $4
+
+ 0x25476D58: 7C9F2378 or r31,r4,r4
+ 108: GETL R4, t84
+ 109: PUTL t84, R31
+ 110: INCEIPL $4
+
+ 0x25476D5C: 91E1024C stw r15,588(r1)
+ 111: GETL R15, t86
+ 112: GETL R1, t88
+ 113: ADDL $0x24C, t88
+ 114: STL t86, (t88)
+ 115: INCEIPL $4
+
+ 0x25476D60: 92410258 stw r18,600(r1)
+ 116: GETL R18, t90
+ 117: GETL R1, t92
+ 118: ADDL $0x258, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0x25476D64: 92810260 stw r20,608(r1)
+ 121: GETL R20, t94
+ 122: GETL R1, t96
+ 123: ADDL $0x260, t96
+ 124: STL t94, (t96)
+ 125: INCEIPL $4
+
+ 0x25476D68: 92C10268 stw r22,616(r1)
+ 126: GETL R22, t98
+ 127: GETL R1, t100
+ 128: ADDL $0x268, t100
+ 129: STL t98, (t100)
+ 130: INCEIPL $4
+
+ 0x25476D6C: 93410278 stw r26,632(r1)
+ 131: GETL R26, t102
+ 132: GETL R1, t104
+ 133: ADDL $0x278, t104
+ 134: STL t102, (t104)
+ 135: INCEIPL $4
+
+ 0x25476D70: 93810280 stw r28,640(r1)
+ 136: GETL R28, t106
+ 137: GETL R1, t108
+ 138: ADDL $0x280, t108
+ 139: STL t106, (t108)
+ 140: INCEIPL $4
+
+ 0x25476D74: 91810244 stw r12,580(r1)
+ 141: GETL R12, t110
+ 142: GETL R1, t112
+ 143: ADDL $0x244, t112
+ 144: STL t110, (t112)
+ 145: INCEIPL $4
+
+ 0x25476D78: 419E0040 bc 12,30,0x25476DB8
+ 146: Js30o $0x25476DB8
+
+
+
+. 376 25476CF4 136
+. 93 C1 02 88 7F C8 02 A6 92 61 02 5C 92 A1 02 64 1E 69 00 18 90 01 02 94 7D 80 00 26 82 BE 04 C8 93 A1 02 84 7F B3 A8 2E 92 01 02 50 7C D0 33 78 2F 9D 00 00 92 21 02 54 92 E1 02 6C 7C F1 3B 78 93 01 02 70 7C B7 2B 78 93 21 02 74 7D 18 43 78 93 61 02 7C 7D 39 4B 78 93 E1 02 8C 7C 7B 1B 78 91 C1 02 48 7C 9F 23 78 91 E1 02 4C 92 41 02 58 92 81 02 60 92 C1 02 68 93 41 02 78 93 81 02 80 91 81 02 44 41 9E 00 40
+==== BB 377 (0x25476D7C) approx BBs exec'd 0 ====
+
+ 0x25476D7C: 3AC00000 li r22,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R22
+ 2: INCEIPL $4
+
+ 0x25476D80: 80BD0180 lwz r5,384(r29)
+ 3: GETL R29, t2
+ 4: ADDL $0x180, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25476D84: 7FA4EB78 or r4,r29,r29
+ 8: GETL R29, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x25476D88: 7FE3FB78 or r3,r31,r31
+ 11: GETL R31, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0x25476D8C: 74A90040 andis. r9,r5,0x40
+ 14: GETL R5, t10
+ 15: ANDL $0x400000, t10
+ 16: PUTL t10, R9
+ 17: CMP0L t10, t12 (-rSo)
+ 18: ICRFL t12, $0x0, CR
+ 19: INCEIPL $4
+
+ 0x25476D90: 4082001C bc 4,2,0x25476DAC
+ 20: Jc02o $0x25476DAC
+
+
+
+. 377 25476D7C 24
+. 3A C0 00 00 80 BD 01 80 7F A4 EB 78 7F E3 FB 78 74 A9 00 40 40 82 00 1C
+==== BB 378 (0x25476D94) approx BBs exec'd 0 ====
+
+ 0x25476D94: 48005941 bl 0x2547C6D4
+ 0: MOVL $0x25476D98, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547C6D4 ($4)
+
+
+
+. 378 25476D94 4
+. 48 00 59 41
+==== BB 379 _dl_name_match_p(0x2547C6D4) approx BBs exec'd 0 ====
+
+ 0x2547C6D4: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x2547C6D8: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547C6DC: 93E1001C stw r31,28(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547C6E0: 7C9F2378 or r31,r4,r4
+ 14: GETL R4, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0x2547C6E4: 93A10014 stw r29,20(r1)
+ 17: GETL R29, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0x2547C6E8: 7C7D1B78 or r29,r3,r3
+ 22: GETL R3, t16
+ 23: PUTL t16, R29
+ 24: INCEIPL $4
+
+ 0x2547C6EC: 90010024 stw r0,36(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x24, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0x2547C6F0: 80840004 lwz r4,4(r4)
+ 30: GETL R4, t22
+ 31: ADDL $0x4, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R4
+ 34: INCEIPL $4
+
+ 0x2547C6F4: 93C10018 stw r30,24(r1)
+ 35: GETL R30, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x18, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0x2547C6F8: 480067E9 bl 0x25482EE0
+ 40: MOVL $0x2547C6FC, t30
+ 41: PUTL t30, LR
+ 42: JMPo-c $0x25482EE0 ($4)
+
+
+
+. 379 2547C6D4 40
+. 7C 08 02 A6 94 21 FF E0 93 E1 00 1C 7C 9F 23 78 93 A1 00 14 7C 7D 1B 78 90 01 00 24 80 84 00 04 93 C1 00 18 48 00 67 E9
+==== BB 380 strcmp(0x25482EE0) approx BBs exec'd 0 ====
+
+ 0x25482EE0: 7C801B78 or r0,r4,r3
+ 0: GETL R4, t0
+ 1: GETL R3, t2
+ 2: ORL t2, t0
+ 3: PUTL t0, R0
+ 4: INCEIPL $4
+
+ 0x25482EE4: 540007BF rlwinm. r0,r0,0,30,31
+ 5: GETL R0, t4
+ 6: ANDL $0x3, t4
+ 7: PUTL t4, R0
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25482EE8: 3CE0FEFF lis r7,-257
+ 11: MOVL $0xFEFF0000, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0x25482EEC: 40820094 bc 4,2,0x25482F80
+ 14: Jc02o $0x25482F80
+
+
+
+. 380 25482EE0 16
+. 7C 80 1B 78 54 00 07 BF 3C E0 FE FF 40 82 00 94
+==== BB 381 (0x25482EF0) approx BBs exec'd 0 ====
+
+ 0x25482EF0: 80A30000 lwz r5,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x25482EF4: 80C40000 lwz r6,0(r4)
+ 4: GETL R4, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R6
+ 7: INCEIPL $4
+
+ 0x25482EF8: 3D007F7F lis r8,32639
+ 8: MOVL $0x7F7F0000, t8
+ 9: PUTL t8, R8
+ 10: INCEIPL $4
+
+ 0x25482EFC: 38E7FEFF addi r7,r7,-257
+ 11: GETL R7, t10
+ 12: ADDL $0xFFFFFEFF, t10
+ 13: PUTL t10, R7
+ 14: INCEIPL $4
+
+ 0x25482F00: 39087F7F addi r8,r8,32639
+ 15: MOVL $0x7F7F7F7F, t12
+ 16: PUTL t12, R8
+ 17: INCEIPL $4
+
+ 0x25482F04: 48000010 b 0x25482F14
+ 18: JMPo $0x25482F14 ($4)
+
+
+
+. 381 25482EF0 24
+. 80 A3 00 00 80 C4 00 00 3D 00 7F 7F 38 E7 FE FF 39 08 7F 7F 48 00 00 10
+==== BB 382 (0x25482F14) approx BBs exec'd 0 ====
+
+ 0x25482F14: 7C072A14 add r0,r7,r5
+ 0: GETL R7, t0
+ 1: GETL R5, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25482F18: 7D0928F8 nor r9,r8,r5
+ 5: GETL R8, t4
+ 6: GETL R5, t6
+ 7: ORL t6, t4
+ 8: NOTL t4
+ 9: PUTL t4, R9
+ 10: INCEIPL $4
+
+ 0x25482F1C: 7C004839 and. r0,r0,r9
+ 11: GETL R0, t8
+ 12: GETL R9, t10
+ 13: ANDL t8, t10
+ 14: PUTL t10, R0
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x0, CR
+ 17: INCEIPL $4
+
+ 0x25482F20: 7C853000 cmp cr1,r5,r6
+ 18: GETL R5, t14
+ 19: GETL R6, t16
+ 20: CMPL t14, t16, t18 (-rSo)
+ 21: ICRFL t18, $0x1, CR
+ 22: INCEIPL $4
+
+ 0x25482F24: 4182FFE4 bc 12,2,0x25482F08
+ 23: Js02o $0x25482F08
+
+
+
+. 382 25482F14 20
+. 7C 07 2A 14 7D 09 28 F8 7C 00 48 39 7C 85 30 00 41 82 FF E4
+==== BB 383 (0x25482F08) approx BBs exec'd 0 ====
+
+ 0x25482F08: 84A30004 lwzu r5,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R3
+ 3: LDL (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25482F0C: 40860054 bc 4,6,0x25482F60
+ 6: Jc06o $0x25482F60
+
+
+
+. 383 25482F08 8
+. 84 A3 00 04 40 86 00 54
+==== BB 384 (0x25482F60) approx BBs exec'd 0 ====
+
+ 0x25482F60: 80A3FFFC lwz r5,-4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25482F64: 7CAA3279 xor. r10,r5,r6
+ 5: GETL R5, t4
+ 6: GETL R6, t6
+ 7: XORL t4, t6
+ 8: PUTL t6, R10
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25482F68: 7C662850 subf r3,r6,r5
+ 12: GETL R6, t10
+ 13: GETL R5, t12
+ 14: SUBL t10, t12
+ 15: PUTL t12, R3
+ 16: INCEIPL $4
+
+ 0x25482F6C: 4CA00020 bclr 5,0
+ 17: GETL LR, t14
+ 18: Jc00o-r t14
+
+
+
+. 384 25482F60 16
+. 80 A3 FF FC 7C AA 32 79 7C 66 28 50 4C A0 00 20
+==== BB 385 (0x2547C6FC) approx BBs exec'd 0 ====
+
+ 0x2547C6FC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547C700: 38600001 li r3,1
+ 4: MOVL $0x1, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x2547C704: 419E0030 bc 12,30,0x2547C734
+ 7: Js30o $0x2547C734
+
+
+
+. 385 2547C6FC 12
+. 2F 83 00 00 38 60 00 01 41 9E 00 30
+==== BB 386 (0x2547C708) approx BBs exec'd 0 ====
+
+ 0x2547C708: 83FF001C lwz r31,28(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x2547C70C: 4800001C b 0x2547C728
+ 5: JMPo $0x2547C728 ($4)
+
+
+
+. 386 2547C708 8
+. 83 FF 00 1C 48 00 00 1C
+==== BB 387 (0x2547C728) approx BBs exec'd 0 ====
+
+ 0x2547C728: 2C1F0000 cmpi cr0,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x2547C72C: 4082FFE4 bc 4,2,0x2547C710
+ 4: Jc02o $0x2547C710
+
+
+
+. 387 2547C728 8
+. 2C 1F 00 00 40 82 FF E4
+==== BB 388 (0x2547C710) approx BBs exec'd 0 ====
+
+ 0x2547C710: 809F0000 lwz r4,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x2547C714: 7FA3EB78 or r3,r29,r29
+ 4: GETL R29, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x2547C718: 480067C9 bl 0x25482EE0
+ 7: MOVL $0x2547C71C, t6
+ 8: PUTL t6, LR
+ 9: JMPo-c $0x25482EE0 ($4)
+
+
+
+. 388 2547C710 12
+. 80 9F 00 00 7F A3 EB 78 48 00 67 C9
+==== BB 389 (0x2547C71C) approx BBs exec'd 0 ====
+
+ 0x2547C71C: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547C720: 41860030 bc 12,6,0x2547C750
+ 4: Js06o $0x2547C750
+
+
+
+. 389 2547C71C 8
+. 2C 83 00 00 41 86 00 30
+==== BB 390 (0x2547C724) approx BBs exec'd 0 ====
+
+ 0x2547C724: 83FF0004 lwz r31,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x2547C728: 2C1F0000 cmpi cr0,r31,0
+ 5: GETL R31, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547C72C: 4082FFE4 bc 4,2,0x2547C710
+ 9: Jc02o $0x2547C710
+
+
+
+. 390 2547C724 12
+. 83 FF 00 04 2C 1F 00 00 40 82 FF E4
+==== BB 391 (0x2547C730) approx BBs exec'd 0 ====
+
+ 0x2547C730: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547C734: 80810024 lwz r4,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x2547C738: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x2547C73C: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0x2547C740: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547C744: 83E1001C lwz r31,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0x2547C748: 38210020 addi r1,r1,32
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0x2547C74C: 4E800020 blr
+ 30: GETL LR, t22
+ 31: JMPo-r t22 ($4)
+
+
+
+. 391 2547C730 32
+. 38 60 00 00 80 81 00 24 83 A1 00 14 83 C1 00 18 7C 88 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 392 (0x25476D98) approx BBs exec'd 0 ====
+
+ 0x25476D98: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x25476D9C: 408601B8 bc 4,6,0x25476F54
+ 4: Jc06o $0x25476F54
+
+
+
+. 392 25476D98 8
+. 2C 83 00 00 40 86 01 B8
+==== BB 393 (0x25476DA0) approx BBs exec'd 0 ====
+
+ 0x25476DA0: 807D0180 lwz r3,384(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25476DA4: 74690080 andis. r9,r3,0x80
+ 5: GETL R3, t4
+ 6: ANDL $0x800000, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25476DA8: 418200F8 bc 12,2,0x25476EA0
+ 11: Js02o $0x25476EA0
+
+
+
+. 393 25476DA0 12
+. 80 7D 01 80 74 69 00 80 41 82 00 F8
+==== BB 394 (0x25476EA0) approx BBs exec'd 0 ====
+
+ 0x25476EA0: 817D0058 lwz r11,88(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x58, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25476EA4: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25476EA8: 2D8B0000 cmpi cr3,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x3, CR
+ 11: INCEIPL $4
+
+ 0x25476EAC: 41AEFF00 bc 13,14,0x25476DAC
+ 12: Js14o $0x25476DAC
+
+
+
+. 394 25476EA0 16
+. 81 7D 00 58 7F E3 FB 78 2D 8B 00 00 41 AE FF 00
+==== BB 395 (0x25476DAC) approx BBs exec'd 0 ====
+
+ 0x25476DAC: 83BD000C lwz r29,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25476DB0: 2C9D0000 cmpi cr1,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25476DB4: 4086FFCC bc 4,6,0x25476D80
+ 9: Jc06o $0x25476D80
+
+
+
+. 395 25476DAC 12
+. 83 BD 00 0C 2C 9D 00 00 40 86 FF CC
+==== BB 396 (0x25476D80) approx BBs exec'd 0 ====
+
+ 0x25476D80: 80BD0180 lwz r5,384(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25476D84: 7FA4EB78 or r4,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25476D88: 7FE3FB78 or r3,r31,r31
+ 8: GETL R31, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x25476D8C: 74A90040 andis. r9,r5,0x40
+ 11: GETL R5, t8
+ 12: ANDL $0x400000, t8
+ 13: PUTL t8, R9
+ 14: CMP0L t8, t10 (-rSo)
+ 15: ICRFL t10, $0x0, CR
+ 16: INCEIPL $4
+
+ 0x25476D90: 4082001C bc 4,2,0x25476DAC
+ 17: Jc02o $0x25476DAC
+
+
+
+. 396 25476D80 20
+. 80 BD 01 80 7F A4 EB 78 7F E3 FB 78 74 A9 00 40 40 82 00 1C
+==== BB 397 (0x25476EB0) approx BBs exec'd 0 ====
+
+ 0x25476EB0: 813D0034 lwz r9,52(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25476EB4: 816B0004 lwz r11,4(r11)
+ 5: GETL R11, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25476EB8: 80890004 lwz r4,4(r9)
+ 10: GETL R9, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0x25476EBC: 7F845A14 add r28,r4,r11
+ 15: GETL R4, t12
+ 16: GETL R11, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R28
+ 19: INCEIPL $4
+
+ 0x25476EC0: 7F84E378 or r4,r28,r28
+ 20: GETL R28, t16
+ 21: PUTL t16, R4
+ 22: INCEIPL $4
+
+ 0x25476EC4: 4800C01D bl 0x25482EE0
+ 23: MOVL $0x25476EC8, t18
+ 24: PUTL t18, LR
+ 25: JMPo-c $0x25482EE0 ($4)
+
+
+
+. 397 25476EB0 24
+. 81 3D 00 34 81 6B 00 04 80 89 00 04 7F 84 5A 14 7F 84 E3 78 48 00 C0 1D
+==== BB 398 (0x25482F80) approx BBs exec'd 0 ====
+
+ 0x25482F80: 88A30000 lbz r5,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x25482F84: 88C40000 lbz r6,0(r4)
+ 4: GETL R4, t4
+ 5: LDB (t4), t6
+ 6: PUTL t6, R6
+ 7: INCEIPL $4
+
+ 0x25482F88: 48000010 b 0x25482F98
+ 8: JMPo $0x25482F98 ($4)
+
+
+
+. 398 25482F80 12
+. 88 A3 00 00 88 C4 00 00 48 00 00 10
+==== BB 399 (0x25482F98) approx BBs exec'd 0 ====
+
+ 0x25482F98: 2C850000 cmpi cr1,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x25482F9C: 41860020 bc 12,6,0x25482FBC
+ 4: Js06o $0x25482FBC
+
+
+
+. 399 25482F98 8
+. 2C 85 00 00 41 86 00 20
+==== BB 400 (0x25482FA0) approx BBs exec'd 0 ====
+
+ 0x25482FA0: 7C053000 cmp cr0,r5,r6
+ 0: GETL R5, t0
+ 1: GETL R6, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25482FA4: 40820018 bc 4,2,0x25482FBC
+ 5: Jc02o $0x25482FBC
+
+
+
+. 400 25482FA0 8
+. 7C 05 30 00 40 82 00 18
+==== BB 401 (0x25482FBC) approx BBs exec'd 0 ====
+
+ 0x25482FBC: 7C662850 subf r3,r6,r5
+ 0: GETL R6, t0
+ 1: GETL R5, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25482FC0: 4E800020 blr
+ 5: GETL LR, t4
+ 6: JMPo-r t4 ($4)
+
+
+
+. 401 25482FBC 8
+. 7C 66 28 50 4E 80 00 20
+==== BB 402 (0x25476EC8) approx BBs exec'd 0 ====
+
+ 0x25476EC8: 2E030000 cmpi cr4,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25476ECC: 4092FEE0 bc 4,18,0x25476DAC
+ 4: Jc18o $0x25476DAC
+
+
+
+. 402 25476EC8 8
+. 2E 03 00 00 40 92 FE E0
+==== BB 403 (0x25476DB8) approx BBs exec'd 0 ====
+
+ 0x25476DB8: 829E04F4 lwz r20,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R20
+ 4: INCEIPL $4
+
+ 0x25476DBC: 2D9B0000 cmpi cr3,r27,0
+ 5: GETL R27, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x3, CR
+ 8: INCEIPL $4
+
+ 0x25476DC0: 81540000 lwz r10,0(r20)
+ 9: GETL R20, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R10
+ 12: INCEIPL $4
+
+ 0x25476DC4: 71490040 andi. r9,r10,0x40
+ 13: GETL R10, t12
+ 14: ANDL $0x40, t12
+ 15: PUTL t12, R9
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x25476DC8: 40820390 bc 4,2,0x25477158
+ 19: Jc02o $0x25477158
+
+
+
+. 403 25476DB8 20
+. 82 9E 04 F4 2D 9B 00 00 81 54 00 00 71 49 00 40 40 82 03 90
+==== BB 404 (0x25476DCC) approx BBs exec'd 0 ====
+
+ 0x25476DCC: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476DD0: 3880002F li r4,47
+ 3: MOVL $0x2F, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25476DD4: 4800C02D bl 0x25482E00
+ 6: MOVL $0x25476DD8, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25482E00 ($4)
+
+
+
+. 404 25476DCC 12
+. 7F E3 FB 78 38 80 00 2F 48 00 C0 2D
+==== BB 405 (0x25482EB4) approx BBs exec'd 0 ====
+
+ 0x25482EB4: 7CE06038 and r0,r7,r12
+ 0: GETL R7, t0
+ 1: GETL R12, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25482EB8: 7CEA6378 or r10,r7,r12
+ 5: GETL R7, t4
+ 6: GETL R12, t6
+ 7: ORL t6, t4
+ 8: PUTL t4, R10
+ 9: INCEIPL $4
+
+ 0x25482EBC: 7C003A14 add r0,r0,r7
+ 10: GETL R0, t8
+ 11: GETL R7, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0x25482EC0: 7D4900F8 nor r9,r10,r0
+ 15: GETL R10, t12
+ 16: GETL R0, t14
+ 17: ORL t14, t12
+ 18: NOTL t12
+ 19: PUTL t12, R9
+ 20: INCEIPL $4
+
+ 0x25482EC4: 7D240034 cntlzw r4,r9
+ 21: GETL R9, t16
+ 22: CNTLZL t16
+ 23: PUTL t16, R4
+ 24: INCEIPL $4
+
+ 0x25482EC8: 3908FFFC addi r8,r8,-4
+ 25: GETL R8, t18
+ 26: ADDL $0xFFFFFFFC, t18
+ 27: PUTL t18, R8
+ 28: INCEIPL $4
+
+ 0x25482ECC: 5484E8FE rlwinm r4,r4,29,3,31
+ 29: GETL R4, t20
+ 30: SHRL $0x3, t20
+ 31: PUTL t20, R4
+ 32: INCEIPL $4
+
+ 0x25482ED0: 7C682214 add r3,r8,r4
+ 33: GETL R8, t22
+ 34: GETL R4, t24
+ 35: ADDL t22, t24
+ 36: PUTL t24, R3
+ 37: INCEIPL $4
+
+ 0x25482ED4: 4E800020 blr
+ 38: GETL LR, t26
+ 39: JMPo-r t26 ($4)
+
+
+
+. 405 25482EB4 36
+. 7C E0 60 38 7C EA 63 78 7C 00 3A 14 7D 49 00 F8 7D 24 00 34 39 08 FF FC 54 84 E8 FE 7C 68 22 14 4E 80 00 20
+==== BB 406 (0x25476DD8) approx BBs exec'd 0 ====
+
+ 0x25476DD8: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25476DDC: 419A0290 bc 12,26,0x2547706C
+ 4: Js26o $0x2547706C
+
+
+
+. 406 25476DD8 8
+. 2F 03 00 00 41 9A 02 90
+==== BB 407 (0x25476DE0) approx BBs exec'd 0 ====
+
+ 0x25476DE0: 418E01D8 bc 12,14,0x25476FB8
+ 0: Js14o $0x25476FB8
+
+
+
+. 407 25476DE0 4
+. 41 8E 01 D8
+==== BB 408 (0x25476DE4) approx BBs exec'd 0 ====
+
+ 0x25476DE4: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476DE8: 7FE4FB78 or r4,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25476DEC: 4BFFD941 bl 0x2547472C
+ 6: MOVL $0x25476DF0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x2547472C ($4)
+
+
+
+. 408 25476DE4 12
+. 7F 63 DB 78 7F E4 FB 78 4B FF D9 41
+==== BB 409 expand_dynamic_string_token(0x2547472C) approx BBs exec'd 0 ====
+
+ 0x2547472C: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25474730: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25474734: 480228CD bl 0x25497000
+ 9: MOVL $0x25474738, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 409 2547472C 12
+. 94 21 FF D0 7C 08 02 A6 48 02 28 CD
+==== BB 410 (0x25474738) approx BBs exec'd 0 ====
+
+ 0x25474738: 7D800026 mfcr r12
+ 0: GETL CR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0x2547473C: 93C10028 stw r30,40(r1)
+ 3: GETL R30, t2
+ 4: GETL R1, t4
+ 5: ADDL $0x28, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x25474740: 7FC802A6 mflr r30
+ 8: GETL LR, t6
+ 9: PUTL t6, R30
+ 10: INCEIPL $4
+
+ 0x25474744: 93A10024 stw r29,36(r1)
+ 11: GETL R29, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x24, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25474748: 7C9D2378 or r29,r4,r4
+ 16: GETL R4, t12
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0x2547474C: 93410018 stw r26,24(r1)
+ 19: GETL R26, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x18, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x25474750: 38800024 li r4,36
+ 24: MOVL $0x24, t18
+ 25: PUTL t18, R4
+ 26: INCEIPL $4
+
+ 0x25474754: 93810020 stw r28,32(r1)
+ 27: GETL R28, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0x25474758: 7C7C1B78 or r28,r3,r3
+ 32: GETL R3, t24
+ 33: PUTL t24, R28
+ 34: INCEIPL $4
+
+ 0x2547475C: 92E1000C stw r23,12(r1)
+ 35: GETL R23, t26
+ 36: GETL R1, t28
+ 37: ADDL $0xC, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0x25474760: 7FA3EB78 or r3,r29,r29
+ 40: GETL R29, t30
+ 41: PUTL t30, R3
+ 42: INCEIPL $4
+
+ 0x25474764: 93010010 stw r24,16(r1)
+ 43: GETL R24, t32
+ 44: GETL R1, t34
+ 45: ADDL $0x10, t34
+ 46: STL t32, (t34)
+ 47: INCEIPL $4
+
+ 0x25474768: 93210014 stw r25,20(r1)
+ 48: GETL R25, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x14, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x2547476C: 9361001C stw r27,28(r1)
+ 53: GETL R27, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x1C, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x25474770: 93E1002C stw r31,44(r1)
+ 58: GETL R31, t44
+ 59: GETL R1, t46
+ 60: ADDL $0x2C, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x25474774: 90010034 stw r0,52(r1)
+ 63: GETL R0, t48
+ 64: GETL R1, t50
+ 65: ADDL $0x34, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x25474778: 91810008 stw r12,8(r1)
+ 68: GETL R12, t52
+ 69: GETL R1, t54
+ 70: ADDL $0x8, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0x2547477C: 4800E685 bl 0x25482E00
+ 73: MOVL $0x25474780, t56
+ 74: PUTL t56, LR
+ 75: JMPo-c $0x25482E00 ($4)
+
+
+
+. 410 25474738 72
+. 7D 80 00 26 93 C1 00 28 7F C8 02 A6 93 A1 00 24 7C 9D 23 78 93 41 00 18 38 80 00 24 93 81 00 20 7C 7C 1B 78 92 E1 00 0C 7F A3 EB 78 93 01 00 10 93 21 00 14 93 61 00 1C 93 E1 00 2C 90 01 00 34 91 81 00 08 48 00 E6 85
+==== BB 411 (0x25474780) approx BBs exec'd 0 ====
+
+ 0x25474780: 7C7A1B79 or. r26,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R26
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25474784: 40820074 bc 4,2,0x254747F8
+ 5: Jc02o $0x254747F8
+
+
+
+. 411 25474780 8
+. 7C 7A 1B 79 40 82 00 74
+==== BB 412 (0x25474788) approx BBs exec'd 0 ====
+
+ 0x25474788: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547478C: 4800E845 bl 0x25482FD0
+ 3: MOVL $0x25474790, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25482FD0 ($4)
+
+
+
+. 412 25474788 8
+. 7F A3 EB 78 48 00 E8 45
+==== BB 413 (0x25474790) approx BBs exec'd 0 ====
+
+ 0x25474790: 3BE30001 addi r31,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0x25474794: 7FE3FB78 or r3,r31,r31
+ 4: GETL R31, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0x25474798: 4802328D bl 0x25497A24
+ 7: MOVL $0x2547479C, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0x25497A24 ($4)
+
+
+
+. 413 25474790 12
+. 3B E3 00 01 7F E3 FB 78 48 02 32 8D
+==== BB 414 (0x2547FE20) approx BBs exec'd 0 ====
+
+ 0x2547FE20: 813E04F4 lwz r9,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547FE24: 81890004 lwz r12,4(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x2547FE28: 7C8CE214 add r4,r12,r28
+ 10: GETL R12, t8
+ 11: GETL R28, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0x2547FE2C: 7D4C00D0 neg r10,r12
+ 15: GETL R12, t12
+ 16: NEGL t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547FE30: 3964FFFF addi r11,r4,-1
+ 19: GETL R4, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, R11
+ 22: INCEIPL $4
+
+ 0x2547FE34: 7D7D5038 and r29,r11,r10
+ 23: GETL R11, t16
+ 24: GETL R10, t18
+ 25: ANDL t16, t18
+ 26: PUTL t18, R29
+ 27: INCEIPL $4
+
+ 0x2547FE38: 7FA4EB78 or r4,r29,r29
+ 28: GETL R29, t20
+ 29: PUTL t20, R4
+ 30: INCEIPL $4
+
+ 0x2547FE3C: 4800295D bl 0x25482798
+ 31: MOVL $0x2547FE40, t22
+ 32: PUTL t22, LR
+ 33: JMPo-c $0x25482798 ($4)
+
+
+
+. 414 2547FE20 32
+. 81 3E 04 F4 81 89 00 04 7C 8C E2 14 7D 4C 00 D0 39 64 FF FF 7D 7D 50 38 7F A4 EB 78 48 00 29 5D
+==== BB 415 mmap(0x25482798) approx BBs exec'd 0 ====
+
+ 0x25482798: 3800005A li r0,90
+ 0: MOVL $0x5A, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x2548279C: 44000002 sc
+ 3: JMPo-sys $0x254827A0 ($4)
+
+
+
+. 415 25482798 8
+. 38 00 00 5A 44 00 00 02
+==== BB 416 (0x254827A0) approx BBs exec'd 0 ====
+
+ 0x254827A0: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 416 254827A0 4
+. 4C A3 00 20
+==== BB 417 (0x2547FE40) approx BBs exec'd 0 ====
+
+ 0x2547FE40: 80BB0000 lwz r5,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x2547FE44: 7D23EA14 add r9,r3,r29
+ 4: GETL R3, t4
+ 5: GETL R29, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0x2547FE48: 7C832800 cmp cr1,r3,r5
+ 9: GETL R3, t8
+ 10: GETL R5, t10
+ 11: CMPL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x2547FE4C: 41860008 bc 12,6,0x2547FE54
+ 14: Js06o $0x2547FE54
+
+
+
+. 417 2547FE40 16
+. 80 BB 00 00 7D 23 EA 14 7C 83 28 00 41 86 00 08
+==== BB 418 (0x2547FE50) approx BBs exec'd 0 ====
+
+ 0x2547FE50: 907F0000 stw r3,0(r31)
+ 0: GETL R3, t0
+ 1: GETL R31, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x2547FE54: 807F0000 lwz r3,0(r31)
+ 4: GETL R31, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R3
+ 7: INCEIPL $4
+
+ 0x2547FE58: 80C10024 lwz r6,36(r1)
+ 8: GETL R1, t8
+ 9: ADDL $0x24, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R6
+ 12: INCEIPL $4
+
+ 0x2547FE5C: 7D03E214 add r8,r3,r28
+ 13: GETL R3, t12
+ 14: GETL R28, t14
+ 15: ADDL t12, t14
+ 16: PUTL t14, R8
+ 17: INCEIPL $4
+
+ 0x2547FE60: 80FE0420 lwz r7,1056(r30)
+ 18: GETL R30, t16
+ 19: ADDL $0x420, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R7
+ 22: INCEIPL $4
+
+ 0x2547FE64: 913B0000 stw r9,0(r27)
+ 23: GETL R9, t20
+ 24: GETL R27, t22
+ 25: STL t20, (t22)
+ 26: INCEIPL $4
+
+ 0x2547FE68: 7CC803A6 mtlr r6
+ 27: GETL R6, t24
+ 28: PUTL t24, LR
+ 29: INCEIPL $4
+
+ 0x2547FE6C: 911F0000 stw r8,0(r31)
+ 30: GETL R8, t26
+ 31: GETL R31, t28
+ 32: STL t26, (t28)
+ 33: INCEIPL $4
+
+ 0x2547FE70: 8361000C lwz r27,12(r1)
+ 34: GETL R1, t30
+ 35: ADDL $0xC, t30
+ 36: LDL (t30), t32
+ 37: PUTL t32, R27
+ 38: INCEIPL $4
+
+ 0x2547FE74: 83810010 lwz r28,16(r1)
+ 39: GETL R1, t34
+ 40: ADDL $0x10, t34
+ 41: LDL (t34), t36
+ 42: PUTL t36, R28
+ 43: INCEIPL $4
+
+ 0x2547FE78: 83A10014 lwz r29,20(r1)
+ 44: GETL R1, t38
+ 45: ADDL $0x14, t38
+ 46: LDL (t38), t40
+ 47: PUTL t40, R29
+ 48: INCEIPL $4
+
+ 0x2547FE7C: 83C10018 lwz r30,24(r1)
+ 49: GETL R1, t42
+ 50: ADDL $0x18, t42
+ 51: LDL (t42), t44
+ 52: PUTL t44, R30
+ 53: INCEIPL $4
+
+ 0x2547FE80: 83E1001C lwz r31,28(r1)
+ 54: GETL R1, t46
+ 55: ADDL $0x1C, t46
+ 56: LDL (t46), t48
+ 57: PUTL t48, R31
+ 58: INCEIPL $4
+
+ 0x2547FE84: 38210020 addi r1,r1,32
+ 59: GETL R1, t50
+ 60: ADDL $0x20, t50
+ 61: PUTL t50, R1
+ 62: INCEIPL $4
+
+ 0x2547FE88: 90670000 stw r3,0(r7)
+ 63: GETL R3, t52
+ 64: GETL R7, t54
+ 65: STL t52, (t54)
+ 66: INCEIPL $4
+
+ 0x2547FE8C: 4E800020 blr
+ 67: GETL LR, t56
+ 68: JMPo-r t56 ($4)
+
+
+
+. 418 2547FE50 64
+. 90 7F 00 00 80 7F 00 00 80 C1 00 24 7D 03 E2 14 80 FE 04 20 91 3B 00 00 7C C8 03 A6 91 1F 00 00 83 61 00 0C 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 90 67 00 00 4E 80 00 20
+==== BB 419 (0x2547479C) approx BBs exec'd 0 ====
+
+ 0x2547479C: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254747A0: 2C030000 cmpi cr0,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0x254747A4: 41820014 bc 12,2,0x254747B8
+ 7: Js02o $0x254747B8
+
+
+
+. 419 2547479C 12
+. 38 00 00 00 2C 03 00 00 41 82 00 14
+==== BB 420 (0x254747A8) approx BBs exec'd 0 ====
+
+ 0x254747A8: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254747AC: 7FE5FB78 or r5,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x254747B0: 4800F431 bl 0x25483BE0
+ 6: MOVL $0x254747B4, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25483BE0 ($4)
+
+
+
+. 420 254747A8 12
+. 7F A4 EB 78 7F E5 FB 78 48 00 F4 31
+==== BB 421 (0x254747B4) approx BBs exec'd 0 ====
+
+ 0x254747B4: 7C601B78 or r0,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254747B8: 7C030378 or r3,r0,r0
+ 3: GETL R0, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0x254747BC: 83810034 lwz r28,52(r1)
+ 6: GETL R1, t4
+ 7: ADDL $0x34, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R28
+ 10: INCEIPL $4
+
+ 0x254747C0: 81410008 lwz r10,8(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x8, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R10
+ 15: INCEIPL $4
+
+ 0x254747C4: 7F8803A6 mtlr r28
+ 16: GETL R28, t12
+ 17: PUTL t12, LR
+ 18: INCEIPL $4
+
+ 0x254747C8: 82E1000C lwz r23,12(r1)
+ 19: GETL R1, t14
+ 20: ADDL $0xC, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R23
+ 23: INCEIPL $4
+
+ 0x254747CC: 83010010 lwz r24,16(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x10, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R24
+ 28: INCEIPL $4
+
+ 0x254747D0: 7D408120 mtcrf 0x8,r10
+ 29: GETL R10, t22
+ 30: ICRFL t22, $0x4, CR
+ 31: INCEIPL $4
+
+ 0x254747D4: 83210014 lwz r25,20(r1)
+ 32: GETL R1, t24
+ 33: ADDL $0x14, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R25
+ 36: INCEIPL $4
+
+ 0x254747D8: 83410018 lwz r26,24(r1)
+ 37: GETL R1, t28
+ 38: ADDL $0x18, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R26
+ 41: INCEIPL $4
+
+ 0x254747DC: 8361001C lwz r27,28(r1)
+ 42: GETL R1, t32
+ 43: ADDL $0x1C, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R27
+ 46: INCEIPL $4
+
+ 0x254747E0: 83810020 lwz r28,32(r1)
+ 47: GETL R1, t36
+ 48: ADDL $0x20, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R28
+ 51: INCEIPL $4
+
+ 0x254747E4: 83A10024 lwz r29,36(r1)
+ 52: GETL R1, t40
+ 53: ADDL $0x24, t40
+ 54: LDL (t40), t42
+ 55: PUTL t42, R29
+ 56: INCEIPL $4
+
+ 0x254747E8: 83C10028 lwz r30,40(r1)
+ 57: GETL R1, t44
+ 58: ADDL $0x28, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R30
+ 61: INCEIPL $4
+
+ 0x254747EC: 83E1002C lwz r31,44(r1)
+ 62: GETL R1, t48
+ 63: ADDL $0x2C, t48
+ 64: LDL (t48), t50
+ 65: PUTL t50, R31
+ 66: INCEIPL $4
+
+ 0x254747F0: 38210030 addi r1,r1,48
+ 67: GETL R1, t52
+ 68: ADDL $0x30, t52
+ 69: PUTL t52, R1
+ 70: INCEIPL $4
+
+ 0x254747F4: 4E800020 blr
+ 71: GETL LR, t54
+ 72: JMPo-r t54 ($4)
+
+
+
+. 421 254747B4 68
+. 7C 60 1B 78 7C 03 03 78 83 81 00 34 81 41 00 08 7F 88 03 A6 82 E1 00 0C 83 01 00 10 7D 40 81 20 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 422 (0x25476DF0) approx BBs exec'd 0 ====
+
+ 0x25476DF0: 3B40FFFF li r26,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R26
+ 2: INCEIPL $4
+
+ 0x25476DF4: 2F030000 cmpi cr6,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x6, CR
+ 6: INCEIPL $4
+
+ 0x25476DF8: 90610228 stw r3,552(r1)
+ 7: GETL R3, t6
+ 8: GETL R1, t8
+ 9: ADDL $0x228, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25476DFC: 2E1AFFFF cmpi cr4,r26,-1
+ 12: GETL R26, t10
+ 13: MOVL $0xFFFFFFFF, t14
+ 14: CMPL t10, t14, t12 (-rSo)
+ 15: ICRFL t12, $0x4, CR
+ 16: INCEIPL $4
+
+ 0x25476E00: 409A0200 bc 4,26,0x25477000
+ 17: Jc26o $0x25477000
+
+
+
+. 422 25476DF0 20
+. 3B 40 FF FF 2F 03 00 00 90 61 02 28 2E 1A FF FF 40 9A 02 00
+==== BB 423 (0x25477000) approx BBs exec'd 0 ====
+
+ 0x25477000: 38810018 addi r4,r1,24
+ 0: GETL R1, t0
+ 1: ADDL $0x18, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x25477004: 4BFFF441 bl 0x25476444
+ 4: MOVL $0x25477008, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0x25476444 ($4)
+
+
+
+. 423 25477000 8
+. 38 81 00 18 4B FF F4 41
+==== BB 424 open_verify(0x25476444) approx BBs exec'd 0 ====
+
+ 0x25476444: 9421FFA0 stwu r1,-96(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFA0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25476448: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547644C: 48020BB5 bl 0x25497000
+ 9: MOVL $0x25476450, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 424 25476444 12
+. 94 21 FF A0 7C 08 02 A6 48 02 0B B5
+==== BB 425 (0x25476450) approx BBs exec'd 0 ====
+
+ 0x25476450: 93C10058 stw r30,88(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x58, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25476454: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25476458: 93010040 stw r24,64(r1)
+ 8: GETL R24, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x40, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547645C: 93E1005C stw r31,92(r1)
+ 13: GETL R31, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x5C, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25476460: 7C982378 or r24,r4,r4
+ 18: GETL R4, t14
+ 19: PUTL t14, R24
+ 20: INCEIPL $4
+
+ 0x25476464: 7C3F0B78 or r31,r1,r1
+ 21: GETL R1, t16
+ 22: PUTL t16, R31
+ 23: INCEIPL $4
+
+ 0x25476468: 38800000 li r4,0
+ 24: MOVL $0x0, t18
+ 25: PUTL t18, R4
+ 26: INCEIPL $4
+
+ 0x2547646C: 92C10038 stw r22,56(r1)
+ 27: GETL R22, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x38, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0x25476470: 7C761B78 or r22,r3,r3
+ 32: GETL R3, t24
+ 33: PUTL t24, R22
+ 34: INCEIPL $4
+
+ 0x25476474: 93210044 stw r25,68(r1)
+ 35: GETL R25, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x44, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0x25476478: 9361004C stw r27,76(r1)
+ 40: GETL R27, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x4C, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x2547647C: 3B600000 li r27,0
+ 45: MOVL $0x0, t34
+ 46: PUTL t34, R27
+ 47: INCEIPL $4
+
+ 0x25476480: 92A10034 stw r21,52(r1)
+ 48: GETL R21, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x34, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x25476484: 92E1003C stw r23,60(r1)
+ 53: GETL R23, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x3C, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x25476488: 93410048 stw r26,72(r1)
+ 58: GETL R26, t44
+ 59: GETL R1, t46
+ 60: ADDL $0x48, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x2547648C: 93810050 stw r28,80(r1)
+ 63: GETL R28, t48
+ 64: GETL R1, t50
+ 65: ADDL $0x50, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x25476490: 93A10054 stw r29,84(r1)
+ 68: GETL R29, t52
+ 69: GETL R1, t54
+ 70: ADDL $0x54, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0x25476494: 90010064 stw r0,100(r1)
+ 73: GETL R0, t56
+ 74: GETL R1, t58
+ 75: ADDL $0x64, t58
+ 76: STL t56, (t58)
+ 77: INCEIPL $4
+
+ 0x25476498: 4800BB49 bl 0x25481FE0
+ 78: MOVL $0x2547649C, t60
+ 79: PUTL t60, LR
+ 80: JMPo-c $0x25481FE0 ($4)
+
+
+
+. 425 25476450 76
+. 93 C1 00 58 7F C8 02 A6 93 01 00 40 93 E1 00 5C 7C 98 23 78 7C 3F 0B 78 38 80 00 00 92 C1 00 38 7C 76 1B 78 93 21 00 44 93 61 00 4C 3B 60 00 00 92 A1 00 34 92 E1 00 3C 93 41 00 48 93 81 00 50 93 A1 00 54 90 01 00 64 48 00 BB 49
+==== BB 426 open(0x25481FE0) approx BBs exec'd 0 ====
+
+ 0x25481FE0: 38000005 li r0,5
+ 0: MOVL $0x5, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25481FE4: 44000002 sc
+ 3: JMPo-sys $0x25481FE8 ($4)
+
+
+
+. 426 25481FE0 8
+. 38 00 00 05 44 00 00 02
+==== BB 427 (0x25481FE8) approx BBs exec'd 0 ====
+
+ 0x25481FE8: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 427 25481FE8 4
+. 4C A3 00 20
+==== BB 428 (0x2547649C) approx BBs exec'd 0 ====
+
+ 0x2547649C: 2F83FFFF cmpi cr7,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x254764A0: 7C791B78 or r25,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R25
+ 7: INCEIPL $4
+
+ 0x254764A4: 419E00CC bc 12,30,0x25476570
+ 8: Js30o $0x25476570
+
+
+
+. 428 2547649C 12
+. 2F 83 FF FF 7C 79 1B 78 41 9E 00 CC
+==== BB 429 (0x254764A8) approx BBs exec'd 0 ====
+
+ 0x254764A8: 82FE0514 lwz r23,1300(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x514, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x254764AC: 3B980004 addi r28,r24,4
+ 5: GETL R24, t4
+ 6: ADDL $0x4, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x254764B0: 7F84E378 or r4,r28,r28
+ 9: GETL R28, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0x254764B4: 38A00200 li r5,512
+ 12: MOVL $0x200, t8
+ 13: PUTL t8, R5
+ 14: INCEIPL $4
+
+ 0x254764B8: 93770000 stw r27,0(r23)
+ 15: GETL R27, t10
+ 16: GETL R23, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x254764BC: 4800BB45 bl 0x25482000
+ 19: MOVL $0x254764C0, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x25482000 ($4)
+
+
+
+. 429 254764A8 24
+. 82 FE 05 14 3B 98 00 04 7F 84 E3 78 38 A0 02 00 93 77 00 00 48 00 BB 45
+==== BB 430 read(0x25482000) approx BBs exec'd 0 ====
+
+ 0x25482000: 38000003 li r0,3
+ 0: MOVL $0x3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25482004: 44000002 sc
+ 3: JMPo-sys $0x25482008 ($4)
+
+
+
+. 430 25482000 8
+. 38 00 00 03 44 00 00 02
+==== BB 431 (0x25482008) approx BBs exec'd 0 ====
+
+ 0x25482008: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 431 25482008 4
+. 4C A3 00 20
+==== BB 432 (0x254764C0) approx BBs exec'd 0 ====
+
+ 0x254764C0: 2C030033 cmpi cr0,r3,51
+ 0: GETL R3, t0
+ 1: MOVL $0x33, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254764C4: 7C7D1B78 or r29,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R29
+ 7: INCEIPL $4
+
+ 0x254764C8: 90780000 stw r3,0(r24)
+ 8: GETL R3, t8
+ 9: GETL R24, t10
+ 10: STL t8, (t10)
+ 11: INCEIPL $4
+
+ 0x254764CC: 4081014C bc 4,1,0x25476618
+ 12: Jc01o $0x25476618
+
+
+
+. 432 254764C0 16
+. 2C 03 00 33 7C 7D 1B 78 90 78 00 00 40 81 01 4C
+==== BB 433 (0x254764D0) approx BBs exec'd 0 ====
+
+ 0x254764D0: 809E016C lwz r4,364(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x16C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254764D4: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254764D8: 38A00009 li r5,9
+ 8: MOVL $0x9, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x254764DC: 4800CDBD bl 0x25483298
+ 11: MOVL $0x254764E0, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483298 ($4)
+
+
+
+. 433 254764D0 16
+. 80 9E 01 6C 7F 83 E3 78 38 A0 00 09 48 00 CD BD
+==== BB 434 (0x254764E0) approx BBs exec'd 0 ====
+
+ 0x254764E0: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x254764E4: 409A0234 bc 4,26,0x25476718
+ 4: Jc26o $0x25476718
+
+
+
+. 434 254764E0 8
+. 2F 03 00 00 40 9A 02 34
+==== BB 435 (0x254764E8) approx BBs exec'd 0 ====
+
+ 0x254764E8: 819C0014 lwz r12,20(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x254764EC: 811E0200 lwz r8,512(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x200, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x254764F0: 2C8C0001 cmpi cr1,r12,1
+ 10: GETL R12, t8
+ 11: MOVL $0x1, t12
+ 12: CMPL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x254764F4: 40860138 bc 4,6,0x2547662C
+ 15: Jc06o $0x2547662C
+
+
+
+. 435 254764E8 16
+. 81 9C 00 14 81 1E 02 00 2C 8C 00 01 40 86 01 38
+==== BB 436 (0x254764F8) approx BBs exec'd 0 ====
+
+ 0x254764F8: A11C0012 lhz r8,18(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x12, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254764FC: 2F080014 cmpi cr6,r8,20
+ 5: GETL R8, t4
+ 6: MOVL $0x14, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x25476500: 409A01D0 bc 4,26,0x254766D0
+ 10: Jc26o $0x254766D0
+
+
+
+. 436 254764F8 12
+. A1 1C 00 12 2F 08 00 14 40 9A 01 D0
+==== BB 437 (0x25476504) approx BBs exec'd 0 ====
+
+ 0x25476504: A01C0010 lhz r0,16(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x10, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25476508: 2F800003 cmpi cr7,r0,3
+ 5: GETL R0, t4
+ 6: MOVL $0x3, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x2547650C: 409E0278 bc 4,30,0x25476784
+ 10: Jc30o $0x25476784
+
+
+
+. 437 25476504 12
+. A0 1C 00 10 2F 80 00 03 40 9E 02 78
+==== BB 438 (0x25476510) approx BBs exec'd 0 ====
+
+ 0x25476510: A2BC002A lhz r21,42(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x2A, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x25476514: 811E0204 lwz r8,516(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x204, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x25476518: 2C950020 cmpi cr1,r21,32
+ 10: GETL R21, t8
+ 11: MOVL $0x20, t12
+ 12: CMPL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x2547651C: 40860110 bc 4,6,0x2547662C
+ 15: Jc06o $0x2547662C
+
+
+
+. 438 25476510 16
+. A2 BC 00 2A 81 1E 02 04 2C 95 00 20 40 86 01 10
+==== BB 439 (0x25476520) approx BBs exec'd 0 ====
+
+ 0x25476520: A17C002C lhz r11,44(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x2C, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25476524: 809C001C lwz r4,28(r28)
+ 5: GETL R28, t4
+ 6: ADDL $0x1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25476528: 557B2834 rlwinm r27,r11,5,0,26
+ 10: GETL R11, t8
+ 11: SHLL $0x5, t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0x2547652C: 7F44DA14 add r26,r4,r27
+ 14: GETL R4, t10
+ 15: GETL R27, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R26
+ 18: INCEIPL $4
+
+ 0x25476530: 7F1AE840 cmpl cr6,r26,r29
+ 19: GETL R26, t14
+ 20: GETL R29, t16
+ 21: CMPUL t14, t16, t18 (-rSo)
+ 22: ICRFL t18, $0x6, CR
+ 23: INCEIPL $4
+
+ 0x25476534: 7FA4C214 add r29,r4,r24
+ 24: GETL R4, t20
+ 25: GETL R24, t22
+ 26: ADDL t20, t22
+ 27: PUTL t22, R29
+ 28: INCEIPL $4
+
+ 0x25476538: 3B5D0004 addi r26,r29,4
+ 29: GETL R29, t24
+ 30: ADDL $0x4, t24
+ 31: PUTL t24, R26
+ 32: INCEIPL $4
+
+ 0x2547653C: 41990108 bc 12,25,0x25476644
+ 33: Js25o $0x25476644
+
+
+
+. 439 25476520 32
+. A1 7C 00 2C 80 9C 00 1C 55 7B 28 34 7F 44 DA 14 7F 1A E8 40 7F A4 C2 14 3B 5D 00 04 41 99 01 08
+==== BB 440 (0x25476540) approx BBs exec'd 0 ====
+
+ 0x25476540: 557B2834 rlwinm r27,r11,5,0,26
+ 0: GETL R11, t0
+ 1: SHLL $0x5, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25476544: 7F5DD378 or r29,r26,r26
+ 4: GETL R26, t2
+ 5: PUTL t2, R29
+ 6: INCEIPL $4
+
+ 0x25476548: 7C1BD214 add r0,r27,r26
+ 7: GETL R27, t4
+ 8: GETL R26, t6
+ 9: ADDL t4, t6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0x2547654C: 4800001C b 0x25476568
+ 12: JMPo $0x25476568 ($4)
+
+
+
+. 440 25476540 16
+. 55 7B 28 34 7F 5D D3 78 7C 1B D2 14 48 00 00 1C
+==== BB 441 (0x25476568) approx BBs exec'd 0 ====
+
+ 0x25476568: 7C00E840 cmpl cr0,r0,r29
+ 0: GETL R0, t0
+ 1: GETL R29, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547656C: 4181FFE4 bc 12,1,0x25476550
+ 5: Js01o $0x25476550
+
+
+
+. 441 25476568 8
+. 7C 00 E8 40 41 81 FF E4
+==== BB 442 (0x25476550) approx BBs exec'd 0 ====
+
+ 0x25476550: 809D0000 lwz r4,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25476554: 2C840004 cmpi cr1,r4,4
+ 4: GETL R4, t4
+ 5: MOVL $0x4, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25476558: 4186005C bc 12,6,0x254765B4
+ 9: Js06o $0x254765B4
+
+
+
+. 442 25476550 12
+. 80 9D 00 00 2C 84 00 04 41 86 00 5C
+==== BB 443 (0x2547655C) approx BBs exec'd 0 ====
+
+ 0x2547655C: 55662834 rlwinm r6,r11,5,0,26
+ 0: GETL R11, t0
+ 1: SHLL $0x5, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x25476560: 3BBD0020 addi r29,r29,32
+ 4: GETL R29, t2
+ 5: ADDL $0x20, t2
+ 6: PUTL t2, R29
+ 7: INCEIPL $4
+
+ 0x25476564: 7C06D214 add r0,r6,r26
+ 8: GETL R6, t4
+ 9: GETL R26, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R0
+ 12: INCEIPL $4
+
+ 0x25476568: 7C00E840 cmpl cr0,r0,r29
+ 13: GETL R0, t8
+ 14: GETL R29, t10
+ 15: CMPUL t8, t10, t12 (-rSo)
+ 16: ICRFL t12, $0x0, CR
+ 17: INCEIPL $4
+
+ 0x2547656C: 4181FFE4 bc 12,1,0x25476550
+ 18: Js01o $0x25476550
+
+
+
+. 443 2547655C 20
+. 55 66 28 34 3B BD 00 20 7C 06 D2 14 7C 00 E8 40 41 81 FF E4
+==== BB 444 (0x25476570) approx BBs exec'd 0 ====
+
+ 0x25476570: 80810000 lwz r4,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25476574: 7F23CB78 or r3,r25,r25
+ 4: GETL R25, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x25476578: 82E40004 lwz r23,4(r4)
+ 7: GETL R4, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R23
+ 11: INCEIPL $4
+
+ 0x2547657C: 82A4FFD4 lwz r21,-44(r4)
+ 12: GETL R4, t10
+ 13: ADDL $0xFFFFFFD4, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R21
+ 16: INCEIPL $4
+
+ 0x25476580: 7EE803A6 mtlr r23
+ 17: GETL R23, t14
+ 18: PUTL t14, LR
+ 19: INCEIPL $4
+
+ 0x25476584: 82C4FFD8 lwz r22,-40(r4)
+ 20: GETL R4, t16
+ 21: ADDL $0xFFFFFFD8, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R22
+ 24: INCEIPL $4
+
+ 0x25476588: 82E4FFDC lwz r23,-36(r4)
+ 25: GETL R4, t20
+ 26: ADDL $0xFFFFFFDC, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R23
+ 29: INCEIPL $4
+
+ 0x2547658C: 8304FFE0 lwz r24,-32(r4)
+ 30: GETL R4, t24
+ 31: ADDL $0xFFFFFFE0, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R24
+ 34: INCEIPL $4
+
+ 0x25476590: 8324FFE4 lwz r25,-28(r4)
+ 35: GETL R4, t28
+ 36: ADDL $0xFFFFFFE4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R25
+ 39: INCEIPL $4
+
+ 0x25476594: 8344FFE8 lwz r26,-24(r4)
+ 40: GETL R4, t32
+ 41: ADDL $0xFFFFFFE8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R26
+ 44: INCEIPL $4
+
+ 0x25476598: 8364FFEC lwz r27,-20(r4)
+ 45: GETL R4, t36
+ 46: ADDL $0xFFFFFFEC, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R27
+ 49: INCEIPL $4
+
+ 0x2547659C: 8384FFF0 lwz r28,-16(r4)
+ 50: GETL R4, t40
+ 51: ADDL $0xFFFFFFF0, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R28
+ 54: INCEIPL $4
+
+ 0x254765A0: 83A4FFF4 lwz r29,-12(r4)
+ 55: GETL R4, t44
+ 56: ADDL $0xFFFFFFF4, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R29
+ 59: INCEIPL $4
+
+ 0x254765A4: 83C4FFF8 lwz r30,-8(r4)
+ 60: GETL R4, t48
+ 61: ADDL $0xFFFFFFF8, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R30
+ 64: INCEIPL $4
+
+ 0x254765A8: 83E4FFFC lwz r31,-4(r4)
+ 65: GETL R4, t52
+ 66: ADDL $0xFFFFFFFC, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R31
+ 69: INCEIPL $4
+
+ 0x254765AC: 7C812378 or r1,r4,r4
+ 70: GETL R4, t56
+ 71: PUTL t56, R1
+ 72: INCEIPL $4
+
+ 0x254765B0: 4E800020 blr
+ 73: GETL LR, t58
+ 74: JMPo-r t58 ($4)
+
+
+
+. 444 25476570 68
+. 80 81 00 00 7F 23 CB 78 82 E4 00 04 82 A4 FF D4 7E E8 03 A6 82 C4 FF D8 82 E4 FF DC 83 04 FF E0 83 24 FF E4 83 44 FF E8 83 64 FF EC 83 84 FF F0 83 A4 FF F4 83 C4 FF F8 83 E4 FF FC 7C 81 23 78 4E 80 00 20
+==== BB 445 (0x25477008) approx BBs exec'd 0 ====
+
+ 0x25477008: 2E03FFFF cmpi cr4,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x2547700C: 7C7A1B78 or r26,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R26
+ 7: INCEIPL $4
+
+ 0x25477010: 4092FDF4 bc 4,18,0x25476E04
+ 8: Jc18o $0x25476E04
+
+
+
+. 445 25477008 12
+. 2E 03 FF FF 7C 7A 1B 78 40 92 FD F4
+==== BB 446 (0x25476E04) approx BBs exec'd 0 ====
+
+ 0x25476E04: 571227FE rlwinm r18,r24,4,31,31
+ 0: GETL R24, t0
+ 1: ROLL $0x4, t0
+ 2: ANDL $0x1, t0
+ 3: PUTL t0, R18
+ 4: INCEIPL $4
+
+ 0x25476E08: 32D2FFFF addic r22,r18,-1
+ 5: GETL R18, t2
+ 6: ADCL $0xFFFFFFFF, t2 (-wCa)
+ 7: PUTL t2, R22
+ 8: INCEIPL $4
+
+ 0x25476E0C: 7ED6B110 subfe r22,r22,r22
+ 9: GETL R22, t4
+ 10: GETL R22, t6
+ 11: SBBL t4, t6 (-rCa-wCa)
+ 12: PUTL t6, R22
+ 13: INCEIPL $4
+
+ 0x25476E10: 7F7CB038 and r28,r27,r22
+ 14: GETL R27, t8
+ 15: GETL R22, t10
+ 16: ANDL t8, t10
+ 17: PUTL t10, R28
+ 18: INCEIPL $4
+
+ 0x25476E14: 4092020C bc 4,18,0x25477020
+ 19: Jc18o $0x25477020
+
+
+
+. 446 25476E04 20
+. 57 12 27 FE 32 D2 FF FF 7E D6 B1 10 7F 7C B0 38 40 92 02 0C
+==== BB 447 (0x25477020) approx BBs exec'd 0 ====
+
+ 0x25477020: 80FE04C0 lwz r7,1216(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25477024: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25477028: 80C10228 lwz r6,552(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x228, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R6
+ 12: INCEIPL $4
+
+ 0x2547702C: 7F44D378 or r4,r26,r26
+ 13: GETL R26, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0x25477030: 81C70000 lwz r14,0(r7)
+ 16: GETL R7, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R14
+ 19: INCEIPL $4
+
+ 0x25477034: 7E088378 or r8,r16,r16
+ 20: GETL R16, t16
+ 21: PUTL t16, R8
+ 22: INCEIPL $4
+
+ 0x25477038: 7F87E378 or r7,r28,r28
+ 23: GETL R28, t18
+ 24: PUTL t18, R7
+ 25: INCEIPL $4
+
+ 0x2547703C: 7F09C378 or r9,r24,r24
+ 26: GETL R24, t20
+ 27: PUTL t20, R9
+ 28: INCEIPL $4
+
+ 0x25477040: 38A10018 addi r5,r1,24
+ 29: GETL R1, t22
+ 30: ADDL $0x18, t22
+ 31: PUTL t22, R5
+ 32: INCEIPL $4
+
+ 0x25477044: 3941022C addi r10,r1,556
+ 33: GETL R1, t24
+ 34: ADDL $0x22C, t24
+ 35: PUTL t24, R10
+ 36: INCEIPL $4
+
+ 0x25477048: 91C1022C stw r14,556(r1)
+ 37: GETL R14, t26
+ 38: GETL R1, t28
+ 39: ADDL $0x22C, t28
+ 40: STL t26, (t28)
+ 41: INCEIPL $4
+
+ 0x2547704C: 93210008 stw r25,8(r1)
+ 42: GETL R25, t30
+ 43: GETL R1, t32
+ 44: ADDL $0x8, t32
+ 45: STL t30, (t32)
+ 46: INCEIPL $4
+
+ 0x25477050: 4BFFE4B9 bl 0x25475508
+ 47: MOVL $0x25477054, t34
+ 48: PUTL t34, LR
+ 49: JMPo-c $0x25475508 ($4)
+
+
+
+. 447 25477020 52
+. 80 FE 04 C0 7F E3 FB 78 80 C1 02 28 7F 44 D3 78 81 C7 00 00 7E 08 83 78 7F 87 E3 78 7F 09 C3 78 38 A1 00 18 39 41 02 2C 91 C1 02 2C 93 21 00 08 4B FF E4 B9
+==== BB 448 _dl_map_object_from_fd(0x25475508) approx BBs exec'd 0 ====
+
+ 0x25475508: 9421FF00 stwu r1,-256(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF00, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547550C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25475510: 48021AF1 bl 0x25497000
+ 9: MOVL $0x25475514, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 448 25475508 12
+. 94 21 FF 00 7C 08 02 A6 48 02 1A F1
+==== BB 449 (0x25475514) approx BBs exec'd 0 ====
+
+ 0x25475514: 7D800026 mfcr r12
+ 0: GETL CR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0x25475518: 93C100F8 stw r30,248(r1)
+ 3: GETL R30, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xF8, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x2547551C: 7FC802A6 mflr r30
+ 8: GETL LR, t6
+ 9: PUTL t6, R30
+ 10: INCEIPL $4
+
+ 0x25475520: 93E100FC stw r31,252(r1)
+ 11: GETL R31, t8
+ 12: GETL R1, t10
+ 13: ADDL $0xFC, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25475524: 7C3F0B78 or r31,r1,r1
+ 16: GETL R1, t12
+ 17: PUTL t12, R31
+ 18: INCEIPL $4
+
+ 0x25475528: 90010104 stw r0,260(r1)
+ 19: GETL R0, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x104, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x2547552C: 920100C0 stw r16,192(r1)
+ 24: GETL R16, t18
+ 25: GETL R1, t20
+ 26: ADDL $0xC0, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x25475530: 7CD03378 or r16,r6,r6
+ 29: GETL R6, t22
+ 30: PUTL t22, R16
+ 31: INCEIPL $4
+
+ 0x25475534: 926100CC stw r19,204(r1)
+ 32: GETL R19, t24
+ 33: GETL R1, t26
+ 34: ADDL $0xCC, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x25475538: 7C932378 or r19,r4,r4
+ 37: GETL R4, t28
+ 38: PUTL t28, R19
+ 39: INCEIPL $4
+
+ 0x2547553C: 928100D0 stw r20,208(r1)
+ 40: GETL R20, t30
+ 41: GETL R1, t32
+ 42: ADDL $0xD0, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x25475540: 7C741B78 or r20,r3,r3
+ 45: GETL R3, t34
+ 46: PUTL t34, R20
+ 47: INCEIPL $4
+
+ 0x25475544: 92C100D8 stw r22,216(r1)
+ 48: GETL R22, t36
+ 49: GETL R1, t38
+ 50: ADDL $0xD8, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x25475548: 38600003 li r3,3
+ 53: MOVL $0x3, t40
+ 54: PUTL t40, R3
+ 55: INCEIPL $4
+
+ 0x2547554C: 92E100DC stw r23,220(r1)
+ 56: GETL R23, t42
+ 57: GETL R1, t44
+ 58: ADDL $0xDC, t44
+ 59: STL t42, (t44)
+ 60: INCEIPL $4
+
+ 0x25475550: 7D364B78 or r22,r9,r9
+ 61: GETL R9, t46
+ 62: PUTL t46, R22
+ 63: INCEIPL $4
+
+ 0x25475554: 932100E4 stw r25,228(r1)
+ 64: GETL R25, t48
+ 65: GETL R1, t50
+ 66: ADDL $0xE4, t50
+ 67: STL t48, (t50)
+ 68: INCEIPL $4
+
+ 0x25475558: 7CF73B78 or r23,r7,r7
+ 69: GETL R7, t52
+ 70: PUTL t52, R23
+ 71: INCEIPL $4
+
+ 0x2547555C: 934100E8 stw r26,232(r1)
+ 72: GETL R26, t54
+ 73: GETL R1, t56
+ 74: ADDL $0xE8, t56
+ 75: STL t54, (t56)
+ 76: INCEIPL $4
+
+ 0x25475560: 7D194378 or r25,r8,r8
+ 77: GETL R8, t58
+ 78: PUTL t58, R25
+ 79: INCEIPL $4
+
+ 0x25475564: 936100EC stw r27,236(r1)
+ 80: GETL R27, t60
+ 81: GETL R1, t62
+ 82: ADDL $0xEC, t62
+ 83: STL t60, (t62)
+ 84: INCEIPL $4
+
+ 0x25475568: 3B400000 li r26,0
+ 85: MOVL $0x0, t64
+ 86: PUTL t64, R26
+ 87: INCEIPL $4
+
+ 0x2547556C: 938100F0 stw r28,240(r1)
+ 88: GETL R28, t66
+ 89: GETL R1, t68
+ 90: ADDL $0xF0, t68
+ 91: STL t66, (t68)
+ 92: INCEIPL $4
+
+ 0x25475570: 7CBC2B78 or r28,r5,r5
+ 93: GETL R5, t70
+ 94: PUTL t70, R28
+ 95: INCEIPL $4
+
+ 0x25475574: 91C100B8 stw r14,184(r1)
+ 96: GETL R14, t72
+ 97: GETL R1, t74
+ 98: ADDL $0xB8, t74
+ 99: STL t72, (t74)
+ 100: INCEIPL $4
+
+ 0x25475578: 38BF0028 addi r5,r31,40
+ 101: GETL R31, t76
+ 102: ADDL $0x28, t76
+ 103: PUTL t76, R5
+ 104: INCEIPL $4
+
+ 0x2547557C: 91E100BC stw r15,188(r1)
+ 105: GETL R15, t78
+ 106: GETL R1, t80
+ 107: ADDL $0xBC, t80
+ 108: STL t78, (t80)
+ 109: INCEIPL $4
+
+ 0x25475580: 922100C4 stw r17,196(r1)
+ 110: GETL R17, t82
+ 111: GETL R1, t84
+ 112: ADDL $0xC4, t84
+ 113: STL t82, (t84)
+ 114: INCEIPL $4
+
+ 0x25475584: 924100C8 stw r18,200(r1)
+ 115: GETL R18, t86
+ 116: GETL R1, t88
+ 117: ADDL $0xC8, t88
+ 118: STL t86, (t88)
+ 119: INCEIPL $4
+
+ 0x25475588: 92A100D4 stw r21,212(r1)
+ 120: GETL R21, t90
+ 121: GETL R1, t92
+ 122: ADDL $0xD4, t92
+ 123: STL t90, (t92)
+ 124: INCEIPL $4
+
+ 0x2547558C: 930100E0 stw r24,224(r1)
+ 125: GETL R24, t94
+ 126: GETL R1, t96
+ 127: ADDL $0xE0, t96
+ 128: STL t94, (t96)
+ 129: INCEIPL $4
+
+ 0x25475590: 93A100F4 stw r29,244(r1)
+ 130: GETL R29, t98
+ 131: GETL R1, t100
+ 132: ADDL $0xF4, t100
+ 133: STL t98, (t100)
+ 134: INCEIPL $4
+
+ 0x25475594: 918100B4 stw r12,180(r1)
+ 135: GETL R12, t102
+ 136: GETL R1, t104
+ 137: ADDL $0xB4, t104
+ 138: STL t102, (t104)
+ 139: INCEIPL $4
+
+ 0x25475598: 915F0098 stw r10,152(r31)
+ 140: GETL R10, t106
+ 141: GETL R31, t108
+ 142: ADDL $0x98, t108
+ 143: STL t106, (t108)
+ 144: INCEIPL $4
+
+ 0x2547559C: 837F0108 lwz r27,264(r31)
+ 145: GETL R31, t110
+ 146: ADDL $0x108, t110
+ 147: LDL (t110), t112
+ 148: PUTL t112, R27
+ 149: INCEIPL $4
+
+ 0x254755A0: 4800C905 bl 0x25481EA4
+ 150: MOVL $0x254755A4, t114
+ 151: PUTL t114, LR
+ 152: JMPo-c $0x25481EA4 ($4)
+
+
+
+. 449 25475514 144
+. 7D 80 00 26 93 C1 00 F8 7F C8 02 A6 93 E1 00 FC 7C 3F 0B 78 90 01 01 04 92 01 00 C0 7C D0 33 78 92 61 00 CC 7C 93 23 78 92 81 00 D0 7C 74 1B 78 92 C1 00 D8 38 60 00 03 92 E1 00 DC 7D 36 4B 78 93 21 00 E4 7C F7 3B 78 93 41 00 E8 7D 19 43 78 93 61 00 EC 3B 40 00 00 93 81 00 F0 7C BC 2B 78 91 C1 00 B8 38 BF 00 28 91 E1 00 BC 92 21 00 C4 92 41 00 C8 92 A1 00 D4 93 01 00 E0 93 A1 00 F4 91 81 00 B4 91 5F 00 98 83 7F 01 08 48 00 C9 05
+==== BB 450 __GI___fxstat64(0x25481EA4) approx BBs exec'd 0 ====
+
+ 0x25481EA4: 9421FF80 stwu r1,-128(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF80, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25481EA8: 7CC802A6 mflr r6
+ 6: GETL LR, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x25481EAC: 48015155 bl 0x25497000
+ 9: MOVL $0x25481EB0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 450 25481EA4 12
+. 94 21 FF 80 7C C8 02 A6 48 01 51 55
+==== BB 451 (0x25481EB0) approx BBs exec'd 0 ====
+
+ 0x25481EB0: 93C10078 stw r30,120(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x78, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25481EB4: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25481EB8: 9361006C stw r27,108(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x6C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25481EBC: 90C10084 stw r6,132(r1)
+ 13: GETL R6, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x84, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25481EC0: 93210064 stw r25,100(r1)
+ 18: GETL R25, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x64, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25481EC4: 7C791B78 or r25,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R25
+ 25: INCEIPL $4
+
+ 0x25481EC8: 837E04EC lwz r27,1260(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4EC, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R27
+ 30: INCEIPL $4
+
+ 0x25481ECC: 93810070 stw r28,112(r1)
+ 31: GETL R28, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x70, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x25481ED0: 7CBC2B78 or r28,r5,r5
+ 36: GETL R5, t28
+ 37: PUTL t28, R28
+ 38: INCEIPL $4
+
+ 0x25481ED4: 801B0000 lwz r0,0(r27)
+ 39: GETL R27, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R0
+ 42: INCEIPL $4
+
+ 0x25481ED8: 93E1007C stw r31,124(r1)
+ 43: GETL R31, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x7C, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x25481EDC: 7C9F2378 or r31,r4,r4
+ 48: GETL R4, t38
+ 49: PUTL t38, R31
+ 50: INCEIPL $4
+
+ 0x25481EE0: 2F800000 cmpi cr7,r0,0
+ 51: GETL R0, t40
+ 52: CMP0L t40, t42 (-rSo)
+ 53: ICRFL t42, $0x7, CR
+ 54: INCEIPL $4
+
+ 0x25481EE4: 93410068 stw r26,104(r1)
+ 55: GETL R26, t44
+ 56: GETL R1, t46
+ 57: ADDL $0x68, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0x25481EE8: 93A10074 stw r29,116(r1)
+ 60: GETL R29, t48
+ 61: GETL R1, t50
+ 62: ADDL $0x74, t50
+ 63: STL t48, (t50)
+ 64: INCEIPL $4
+
+ 0x25481EEC: 409E0048 bc 4,30,0x25481F34
+ 65: Jc30o $0x25481F34
+
+
+
+. 451 25481EB0 64
+. 93 C1 00 78 7F C8 02 A6 93 61 00 6C 90 C1 00 84 93 21 00 64 7C 79 1B 78 83 7E 04 EC 93 81 00 70 7C BC 2B 78 80 1B 00 00 93 E1 00 7C 7C 9F 23 78 2F 80 00 00 93 41 00 68 93 A1 00 74 40 9E 00 48
+==== BB 452 (0x25481EF0) approx BBs exec'd 0 ====
+
+ 0x25481EF0: 83BE0514 lwz r29,1300(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x514, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25481EF4: 7C832378 or r3,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25481EF8: 380000C5 li r0,197
+ 8: MOVL $0xC5, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x25481EFC: 7CA42B78 or r4,r5,r5
+ 11: GETL R5, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x25481F00: 835D0000 lwz r26,0(r29)
+ 14: GETL R29, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R26
+ 17: INCEIPL $4
+
+ 0x25481F04: 44000002 sc
+ 18: JMPo-sys $0x25481F08 ($4)
+
+
+
+. 452 25481EF0 24
+. 83 BE 05 14 7C 83 23 78 38 00 00 C5 7C A4 2B 78 83 5D 00 00 44 00 00 02
+==== BB 453 (0x25481F08) approx BBs exec'd 0 ====
+
+ 0x25481F08: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25481F0C: 74091000 andis. r9,r0,0x1000
+ 3: GETL R0, t2
+ 4: ANDL $0x10000000, t2
+ 5: PUTL t2, R9
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25481F10: 408200C4 bc 4,2,0x25481FD4
+ 9: Jc02o $0x25481FD4
+
+
+
+. 453 25481F08 12
+. 7C 00 00 26 74 09 10 00 40 82 00 C4
+==== BB 454 (0x25481F14) approx BBs exec'd 0 ====
+
+ 0x25481F14: 2C83FFFF cmpi cr1,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25481F18: 40A60044 bc 5,6,0x25481F5C
+ 5: Jc06o $0x25481F5C
+
+
+
+. 454 25481F14 8
+. 2C 83 FF FF 40 A6 00 44
+==== BB 455 (0x25481F5C) approx BBs exec'd 0 ====
+
+ 0x25481F5C: 80A10084 lwz r5,132(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25481F60: 83210064 lwz r25,100(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x64, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0x25481F64: 83410068 lwz r26,104(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x68, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R26
+ 14: INCEIPL $4
+
+ 0x25481F68: 7CA803A6 mtlr r5
+ 15: GETL R5, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x25481F6C: 8361006C lwz r27,108(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x6C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R27
+ 22: INCEIPL $4
+
+ 0x25481F70: 83810070 lwz r28,112(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x70, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R28
+ 27: INCEIPL $4
+
+ 0x25481F74: 83A10074 lwz r29,116(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x74, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R29
+ 32: INCEIPL $4
+
+ 0x25481F78: 83C10078 lwz r30,120(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x78, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R30
+ 37: INCEIPL $4
+
+ 0x25481F7C: 83E1007C lwz r31,124(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x7C, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R31
+ 42: INCEIPL $4
+
+ 0x25481F80: 38210080 addi r1,r1,128
+ 43: GETL R1, t34
+ 44: ADDL $0x80, t34
+ 45: PUTL t34, R1
+ 46: INCEIPL $4
+
+ 0x25481F84: 4E800020 blr
+ 47: GETL LR, t36
+ 48: JMPo-r t36 ($4)
+
+
+
+. 455 25481F5C 44
+. 80 A1 00 84 83 21 00 64 83 41 00 68 7C A8 03 A6 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C 38 21 00 80 4E 80 00 20
+==== BB 456 (0x254755A4) approx BBs exec'd 0 ====
+
+ 0x254755A4: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x254755A8: 935F00A0 stw r26,160(r31)
+ 4: GETL R26, t4
+ 5: GETL R31, t6
+ 6: ADDL $0xA0, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x254755AC: 419C082C bc 12,28,0x25475DD8
+ 9: Js28o $0x25475DD8
+
+
+
+. 456 254755A4 12
+. 2F 83 00 00 93 5F 00 A0 41 9C 08 2C
+==== BB 457 (0x254755B0) approx BBs exec'd 0 ====
+
+ 0x254755B0: 1CBB0018 mulli r5,r27,24
+ 0: GETL R27, t0
+ 1: MULL $0x18, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0x254755B4: 809E04C8 lwz r4,1224(r30)
+ 4: GETL R30, t2
+ 5: ADDL $0x4C8, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x254755B8: 7FA5202E lwzx r29,r5,r4
+ 9: GETL R4, t6
+ 10: GETL R5, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0x254755BC: 2C1D0000 cmpi cr0,r29,0
+ 15: GETL R29, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x254755C0: 41820148 bc 12,2,0x25475708
+ 19: Js02o $0x25475708
+
+
+
+. 457 254755B0 20
+. 1C BB 00 18 80 9E 04 C8 7F A5 20 2E 2C 1D 00 00 41 82 01 48
+==== BB 458 (0x254755C4) approx BBs exec'd 0 ====
+
+ 0x254755C4: 817F0030 lwz r11,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254755C8: 3B400000 li r26,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x254755CC: 48000010 b 0x254755DC
+ 8: JMPo $0x254755DC ($4)
+
+
+
+. 458 254755C4 12
+. 81 7F 00 30 3B 40 00 00 48 00 00 10
+==== BB 459 (0x254755DC) approx BBs exec'd 0 ====
+
+ 0x254755DC: 80DD01D8 lwz r6,472(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1D8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254755E0: 7C865800 cmp cr1,r6,r11
+ 5: GETL R6, t4
+ 6: GETL R11, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x254755E4: 4086FFEC bc 4,6,0x254755D0
+ 10: Jc06o $0x254755D0
+
+
+
+. 459 254755DC 12
+. 80 DD 01 D8 7C 86 58 00 40 86 FF EC
+==== BB 460 (0x254755E8) approx BBs exec'd 0 ====
+
+ 0x254755E8: 811D01DC lwz r8,476(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1DC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254755EC: 80FF0034 lwz r7,52(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x34, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0x254755F0: 7E083800 cmp cr4,r8,r7
+ 10: GETL R8, t8
+ 11: GETL R7, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x4, CR
+ 14: INCEIPL $4
+
+ 0x254755F4: 4092FFDC bc 4,18,0x254755D0
+ 15: Jc18o $0x254755D0
+
+
+
+. 460 254755E8 16
+. 81 1D 01 DC 80 FF 00 34 7E 08 38 00 40 92 FF DC
+==== BB 461 (0x254755D0) approx BBs exec'd 0 ====
+
+ 0x254755D0: 83BD000C lwz r29,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254755D4: 2E1D0000 cmpi cr4,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254755D8: 41920130 bc 12,18,0x25475708
+ 9: Js18o $0x25475708
+
+
+
+. 461 254755D0 12
+. 83 BD 00 0C 2E 1D 00 00 41 92 01 30
+==== BB 462 (0x25475708) approx BBs exec'd 0 ====
+
+ 0x25475708: 2F1B0000 cmpi cr6,r27,0
+ 0: GETL R27, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547570C: 409A06E0 bc 4,26,0x25475DEC
+ 4: Jc26o $0x25475DEC
+
+
+
+. 462 25475708 8
+. 2F 1B 00 00 40 9A 06 E0
+==== BB 463 (0x25475710) approx BBs exec'd 0 ====
+
+ 0x25475710: 72C00004 andi. r0,r22,0x4
+ 0: GETL R22, t0
+ 1: ANDL $0x4, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25475714: 38600000 li r3,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x25475718: 40A2FF8C bc 5,2,0x254756A4
+ 9: Jc02o $0x254756A4
+
+
+
+. 463 25475710 12
+. 72 C0 00 04 38 60 00 00 40 A2 FF 8C
+==== BB 464 (0x2547571C) approx BBs exec'd 0 ====
+
+ 0x2547571C: 823E04F4 lwz r17,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R17
+ 4: INCEIPL $4
+
+ 0x25475720: 80910000 lwz r4,0(r17)
+ 5: GETL R17, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x25475724: 70890040 andi. r9,r4,0x40
+ 9: GETL R4, t8
+ 10: ANDL $0x40, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25475728: 40820738 bc 4,2,0x25475E60
+ 15: Jc02o $0x25475E60
+
+
+
+. 464 2547571C 16
+. 82 3E 04 F4 80 91 00 00 70 89 00 40 40 82 07 38
+==== BB 465 (0x2547572C) approx BBs exec'd 0 ====
+
+ 0x2547572C: 7F25CB78 or r5,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x25475730: 7F68DB78 or r8,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0x25475734: 7E038378 or r3,r16,r16
+ 6: GETL R16, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x25475738: 7E84A378 or r4,r20,r20
+ 9: GETL R20, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0x2547573C: 7EE6BB78 or r6,r23,r23
+ 12: GETL R23, t8
+ 13: PUTL t8, R6
+ 14: INCEIPL $4
+
+ 0x25475740: 7EC7B378 or r7,r22,r22
+ 15: GETL R22, t10
+ 16: PUTL t10, R7
+ 17: INCEIPL $4
+
+ 0x25475744: 480039B1 bl 0x254790F4
+ 18: MOVL $0x25475748, t12
+ 19: PUTL t12, LR
+ 20: JMPo-c $0x254790F4 ($4)
+
+
+
+. 465 2547572C 28
+. 7F 25 CB 78 7F 68 DB 78 7E 03 83 78 7E 84 A3 78 7E E6 BB 78 7E C7 B3 78 48 00 39 B1
+==== BB 466 (0x25479318) approx BBs exec'd 0 ====
+
+ 0x25479318: 7D695B78 or r9,r11,r11
+ 0: GETL R11, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x2547931C: 48000008 b 0x25479324
+ 3: JMPo $0x25479324 ($4)
+
+
+
+. 466 25479318 8
+. 7D 69 5B 78 48 00 00 08
+==== BB 467 (0x25479324) approx BBs exec'd 0 ====
+
+ 0x25479324: 8009000C lwz r0,12(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25479328: 2C800000 cmpi cr1,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547932C: 4086FFF4 bc 4,6,0x25479320
+ 9: Jc06o $0x25479320
+
+
+
+. 467 25479324 12
+. 80 09 00 0C 2C 80 00 00 40 86 FF F4
+==== BB 468 (0x25479320) approx BBs exec'd 0 ====
+
+ 0x25479320: 7C090378 or r9,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25479324: 8009000C lwz r0,12(r9)
+ 3: GETL R9, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x25479328: 2C800000 cmpi cr1,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x2547932C: 4086FFF4 bc 4,6,0x25479320
+ 12: Jc06o $0x25479320
+
+
+
+. 468 25479320 16
+. 7C 09 03 78 80 09 00 0C 2C 80 00 00 40 86 FF F4
+==== BB 469 (0x25479330) approx BBs exec'd 0 ====
+
+ 0x25479330: 93E9000C stw r31,12(r9)
+ 0: GETL R31, t0
+ 1: GETL R9, t2
+ 2: ADDL $0xC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25479334: 2F1C0000 cmpi cr6,r28,0
+ 5: GETL R28, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25479338: 913F0010 stw r9,16(r31)
+ 9: GETL R9, t8
+ 10: GETL R31, t10
+ 11: ADDL $0x10, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x2547933C: 38800001 li r4,1
+ 14: MOVL $0x1, t12
+ 15: PUTL t12, R4
+ 16: INCEIPL $4
+
+ 0x25479340: 7D0A282E lwzx r8,r10,r5
+ 17: GETL R5, t14
+ 18: GETL R10, t16
+ 19: ADDL t16, t14
+ 20: LDL (t14), t18
+ 21: PUTL t18, R8
+ 22: INCEIPL $4
+
+ 0x25479344: 7D4A2A14 add r10,r10,r5
+ 23: GETL R10, t20
+ 24: GETL R5, t22
+ 25: ADDL t20, t22
+ 26: PUTL t22, R10
+ 27: INCEIPL $4
+
+ 0x25479348: 832A0004 lwz r25,4(r10)
+ 28: GETL R10, t24
+ 29: ADDL $0x4, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R25
+ 32: INCEIPL $4
+
+ 0x2547934C: 81650198 lwz r11,408(r5)
+ 33: GETL R5, t28
+ 34: ADDL $0x198, t28
+ 35: LDL (t28), t30
+ 36: PUTL t30, R11
+ 37: INCEIPL $4
+
+ 0x25479350: 38E80158 addi r7,r8,344
+ 38: GETL R8, t32
+ 39: ADDL $0x158, t32
+ 40: PUTL t32, R7
+ 41: INCEIPL $4
+
+ 0x25479354: 8185019C lwz r12,412(r5)
+ 42: GETL R5, t34
+ 43: ADDL $0x19C, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R12
+ 46: INCEIPL $4
+
+ 0x25479358: 3B190001 addi r24,r25,1
+ 47: GETL R25, t38
+ 48: ADDL $0x1, t38
+ 49: PUTL t38, R24
+ 50: INCEIPL $4
+
+ 0x2547935C: 90E60000 stw r7,0(r6)
+ 51: GETL R7, t40
+ 52: GETL R6, t42
+ 53: STL t40, (t42)
+ 54: INCEIPL $4
+
+ 0x25479360: 310C0001 addic r8,r12,1
+ 55: GETL R12, t44
+ 56: ADCL $0x1, t44 (-wCa)
+ 57: PUTL t44, R8
+ 58: INCEIPL $4
+
+ 0x25479364: 7CEB0194 addze r7,r11
+ 59: GETL R11, t46
+ 60: ADCL $0x0, t46 (-rCa-wCa)
+ 61: PUTL t46, R7
+ 62: INCEIPL $4
+
+ 0x25479368: 930A0004 stw r24,4(r10)
+ 63: GETL R24, t48
+ 64: GETL R10, t50
+ 65: ADDL $0x4, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x2547936C: 90E50198 stw r7,408(r5)
+ 68: GETL R7, t52
+ 69: GETL R5, t54
+ 70: ADDL $0x198, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0x25479370: 9105019C stw r8,412(r5)
+ 73: GETL R8, t56
+ 74: GETL R5, t58
+ 75: ADDL $0x19C, t58
+ 76: STL t56, (t58)
+ 77: INCEIPL $4
+
+ 0x25479374: 409AFEA8 bc 4,26,0x2547921C
+ 78: Jc26o $0x2547921C
+
+
+
+. 469 25479330 72
+. 93 E9 00 0C 2F 1C 00 00 91 3F 00 10 38 80 00 01 7D 0A 28 2E 7D 4A 2A 14 83 2A 00 04 81 65 01 98 38 E8 01 58 81 85 01 9C 3B 19 00 01 90 E6 00 00 31 0C 00 01 7C EB 01 94 93 0A 00 04 90 E5 01 98 91 05 01 9C 40 9A FE A8
+==== BB 470 (0x2547921C) approx BBs exec'd 0 ====
+
+ 0x2547921C: 801C0168 lwz r0,360(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x168, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25479220: 2C000000 cmpi cr0,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25479224: 4082FFF4 bc 4,2,0x25479218
+ 9: Jc02o $0x25479218
+
+
+
+. 470 2547921C 12
+. 80 1C 01 68 2C 00 00 00 40 82 FF F4
+==== BB 471 (0x25479234) approx BBs exec'd 0 ====
+
+ 0x25479234: 81660000 lwz r11,0(r6)
+ 0: GETL R6, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25479238: 7C895800 cmp cr1,r9,r11
+ 4: GETL R9, t4
+ 5: GETL R11, t6
+ 6: CMPL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547923C: 41860024 bc 12,6,0x25479260
+ 9: Js06o $0x25479260
+
+
+
+. 471 25479234 12
+. 81 66 00 00 7C 89 58 00 41 86 00 24
+==== BB 472 (0x25479260) approx BBs exec'd 0 ====
+
+ 0x25479260: 3B7F0158 addi r27,r31,344
+ 0: GETL R31, t0
+ 1: ADDL $0x158, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25479264: 937F01C4 stw r27,452(r31)
+ 4: GETL R27, t2
+ 5: GETL R31, t4
+ 6: ADDL $0x1C4, t4
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x25479268: 8BB70000 lbz r29,0(r23)
+ 9: GETL R23, t6
+ 10: LDB (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x2547926C: 2F1D0000 cmpi cr6,r29,0
+ 13: GETL R29, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x6, CR
+ 16: INCEIPL $4
+
+ 0x25479270: 419A006C bc 12,26,0x254792DC
+ 17: Js26o $0x254792DC
+
+
+
+. 472 25479260 20
+. 3B 7F 01 58 93 7F 01 C4 8B B7 00 00 2F 1D 00 00 41 9A 00 6C
+==== BB 473 (0x25479274) approx BBs exec'd 0 ====
+
+ 0x25479274: 7EE3BB78 or r3,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25479278: 3B800000 li r28,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R28
+ 5: INCEIPL $4
+
+ 0x2547927C: 48009D55 bl 0x25482FD0
+ 6: MOVL $0x25479280, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25482FD0 ($4)
+
+
+
+. 473 25479274 12
+. 7E E3 BB 78 3B 80 00 00 48 00 9D 55
+==== BB 474 (0x25479280) approx BBs exec'd 0 ====
+
+ 0x25479280: 2F9D002F cmpi cr7,r29,47
+ 0: GETL R29, t0
+ 1: MOVL $0x2F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25479284: 3B630001 addi r27,r3,1
+ 5: GETL R3, t6
+ 6: ADDL $0x1, t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0x25479288: 835E0514 lwz r26,1300(r30)
+ 9: GETL R30, t8
+ 10: ADDL $0x514, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R26
+ 13: INCEIPL $4
+
+ 0x2547928C: 7F7DDB78 or r29,r27,r27
+ 14: GETL R27, t12
+ 15: PUTL t12, R29
+ 16: INCEIPL $4
+
+ 0x25479290: 419E0154 bc 12,30,0x254793E4
+ 17: Js30o $0x254793E4
+
+
+
+. 474 25479280 20
+. 2F 9D 00 2F 3B 63 00 01 83 5E 05 14 7F 7D DB 78 41 9E 01 54
+==== BB 475 (0x254793E4) approx BBs exec'd 0 ====
+
+ 0x254793E4: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254793E8: 4801E63D bl 0x25497A24
+ 3: MOVL $0x254793EC, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25497A24 ($4)
+
+
+
+. 475 254793E4 8
+. 7F 63 DB 78 48 01 E6 3D
+==== BB 476 (0x254793EC) approx BBs exec'd 0 ====
+
+ 0x254793EC: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x254793F0: 7C7C1B78 or r28,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R28
+ 6: INCEIPL $4
+
+ 0x254793F4: 4086FFB0 bc 4,6,0x254793A4
+ 7: Jc06o $0x254793A4
+
+
+
+. 476 254793EC 12
+. 2C 83 00 00 7C 7C 1B 78 40 86 FF B0
+==== BB 477 (0x254793A4) approx BBs exec'd 0 ====
+
+ 0x254793A4: 7EE4BB78 or r4,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254793A8: 7F65DB78 or r5,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x254793AC: 4800A675 bl 0x25483A20
+ 6: MOVL $0x254793B0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25483A20 ($4)
+
+
+
+. 477 254793A4 12
+. 7E E4 BB 78 7F 65 DB 78 48 00 A6 75
+==== BB 478 (0x254793B0) approx BBs exec'd 0 ====
+
+ 0x254793B0: 8EE3FFFF lbzu r23,-1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R23
+ 5: INCEIPL $4
+
+ 0x254793B4: 2C17002F cmpi cr0,r23,47
+ 6: GETL R23, t4
+ 7: MOVL $0x2F, t8
+ 8: CMPL t4, t8, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x254793B8: 4082FFF8 bc 4,2,0x254793B0
+ 11: Jc02o $0x254793B0
+
+
+
+. 478 254793B0 12
+. 8E E3 FF FF 2C 17 00 2F 40 82 FF F8
+==== BB 479 (0x254793BC) approx BBs exec'd 0 ====
+
+ 0x254793BC: 7F03E000 cmp cr6,r3,r28
+ 0: GETL R3, t0
+ 1: GETL R28, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x254793C0: 419A0014 bc 12,26,0x254793D4
+ 5: Js26o $0x254793D4
+
+
+
+. 479 254793BC 8
+. 7F 03 E0 00 41 9A 00 14
+==== BB 480 (0x254793C4) approx BBs exec'd 0 ====
+
+ 0x254793C4: 38C00000 li r6,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x254793C8: 98C30000 stb r6,0(r3)
+ 3: GETL R6, t2
+ 4: GETL R3, t4
+ 5: STB t2, (t4)
+ 6: INCEIPL $4
+
+ 0x254793CC: 939F019C stw r28,412(r31)
+ 7: GETL R28, t6
+ 8: GETL R31, t8
+ 9: ADDL $0x19C, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x254793D0: 4BFFFF0C b 0x254792DC
+ 12: JMPo $0x254792DC ($4)
+
+
+
+. 480 254793C4 16
+. 38 C0 00 00 98 C3 00 00 93 9F 01 9C 4B FF FF 0C
+==== BB 481 (0x25475748) approx BBs exec'd 0 ====
+
+ 0x25475748: 3B1C0004 addi r24,r28,4
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R24
+ 3: INCEIPL $4
+
+ 0x2547574C: 7C7A1B79 or. r26,r3,r3
+ 4: GETL R3, t2
+ 5: PUTL t2, R26
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25475750: 41820708 bc 12,2,0x25475E58
+ 9: Js02o $0x25475E58
+
+
+
+. 481 25475748 12
+. 3B 1C 00 04 7C 7A 1B 79 41 82 07 08
+==== BB 482 (0x25475754) approx BBs exec'd 0 ====
+
+ 0x25475754: A1F8002C lhz r15,44(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0x2C, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R15
+ 4: INCEIPL $4
+
+ 0x25475758: 81D80018 lwz r14,24(r24)
+ 5: GETL R24, t4
+ 6: ADDL $0x18, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R14
+ 9: INCEIPL $4
+
+ 0x2547575C: A1580010 lhz r10,16(r24)
+ 10: GETL R24, t8
+ 11: ADDL $0x10, t8
+ 12: LDW (t8), t10
+ 13: PUTL t10, R10
+ 14: INCEIPL $4
+
+ 0x25475760: B1FA0154 sth r15,340(r26)
+ 15: GETL R15, t12
+ 16: GETL R26, t14
+ 17: ADDL $0x154, t14
+ 18: STW t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25475764: 91DA0150 stw r14,336(r26)
+ 20: GETL R14, t16
+ 21: GETL R26, t18
+ 22: ADDL $0x150, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25475768: A118002C lhz r8,44(r24)
+ 25: GETL R24, t20
+ 26: ADDL $0x2C, t20
+ 27: LDW (t20), t22
+ 28: PUTL t22, R8
+ 29: INCEIPL $4
+
+ 0x2547576C: 8378001C lwz r27,28(r24)
+ 30: GETL R24, t24
+ 31: ADDL $0x1C, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R27
+ 34: INCEIPL $4
+
+ 0x25475770: 551D2834 rlwinm r29,r8,5,0,26
+ 35: GETL R8, t28
+ 36: SHLL $0x5, t28
+ 37: PUTL t28, R29
+ 38: INCEIPL $4
+
+ 0x25475774: 80DC0000 lwz r6,0(r28)
+ 39: GETL R28, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R6
+ 42: INCEIPL $4
+
+ 0x25475778: 7CFBEA14 add r7,r27,r29
+ 43: GETL R27, t34
+ 44: GETL R29, t36
+ 45: ADDL t34, t36
+ 46: PUTL t36, R7
+ 47: INCEIPL $4
+
+ 0x2547577C: 7F3BE214 add r25,r27,r28
+ 48: GETL R27, t38
+ 49: GETL R28, t40
+ 50: ADDL t38, t40
+ 51: PUTL t40, R25
+ 52: INCEIPL $4
+
+ 0x25475780: 7F873040 cmpl cr7,r7,r6
+ 53: GETL R7, t42
+ 54: GETL R6, t44
+ 55: CMPUL t42, t44, t46 (-rSo)
+ 56: ICRFL t46, $0x7, CR
+ 57: INCEIPL $4
+
+ 0x25475784: 915F009C stw r10,156(r31)
+ 58: GETL R10, t48
+ 59: GETL R31, t50
+ 60: ADDL $0x9C, t50
+ 61: STL t48, (t50)
+ 62: INCEIPL $4
+
+ 0x25475788: 3B790004 addi r27,r25,4
+ 63: GETL R25, t52
+ 64: ADDL $0x4, t52
+ 65: PUTL t52, R27
+ 66: INCEIPL $4
+
+ 0x2547578C: 419D0438 bc 12,29,0x25475BC4
+ 67: Js29o $0x25475BC4
+
+
+
+. 482 25475754 60
+. A1 F8 00 2C 81 D8 00 18 A1 58 00 10 B1 FA 01 54 91 DA 01 50 A1 18 00 2C 83 78 00 1C 55 1D 28 34 80 DC 00 00 7C FB EA 14 7F 3B E2 14 7F 87 30 40 91 5F 00 9C 3B 79 00 04 41 9D 04 38
+==== BB 483 (0x25475790) approx BBs exec'd 0 ====
+
+ 0x25475790: A11A0154 lhz r8,340(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x154, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25475794: 7C320B78 or r18,r1,r1
+ 5: GETL R1, t4
+ 6: PUTL t4, R18
+ 7: INCEIPL $4
+
+ 0x25475798: 80810000 lwz r4,0(r1)
+ 8: GETL R1, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R4
+ 11: INCEIPL $4
+
+ 0x2547579C: 3BA00007 li r29,7
+ 12: MOVL $0x7, t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0x254757A0: 1CE80018 mulli r7,r8,24
+ 15: GETL R8, t12
+ 16: MULL $0x18, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0x254757A4: 3B800000 li r28,0
+ 19: MOVL $0x0, t14
+ 20: PUTL t14, R28
+ 21: INCEIPL $4
+
+ 0x254757A8: 38C7001E addi r6,r7,30
+ 22: GETL R7, t16
+ 23: ADDL $0x1E, t16
+ 24: PUTL t16, R6
+ 25: INCEIPL $4
+
+ 0x254757AC: 54D902B6 rlwinm r25,r6,0,10,27
+ 26: GETL R6, t18
+ 27: ANDL $0x3FFFF0, t18
+ 28: PUTL t18, R25
+ 29: INCEIPL $4
+
+ 0x254757B0: 7CB900D0 neg r5,r25
+ 30: GETL R25, t20
+ 31: NEGL t20
+ 32: PUTL t20, R5
+ 33: INCEIPL $4
+
+ 0x254757B4: 7C81296E stwux r4,r1,r5
+ 34: GETL R5, t22
+ 35: GETL R1, t24
+ 36: ADDL t24, t22
+ 37: PUTL t22, R1
+ 38: GETL R4, t26
+ 39: STL t26, (t22)
+ 40: INCEIPL $4
+
+ 0x254757B8: A0FA0154 lhz r7,340(r26)
+ 41: GETL R26, t28
+ 42: ADDL $0x154, t28
+ 43: LDW (t28), t30
+ 44: PUTL t30, R7
+ 45: INCEIPL $4
+
+ 0x254757BC: 3861002F addi r3,r1,47
+ 46: GETL R1, t32
+ 47: ADDL $0x2F, t32
+ 48: PUTL t32, R3
+ 49: INCEIPL $4
+
+ 0x254757C0: 93BF00A4 stw r29,164(r31)
+ 50: GETL R29, t34
+ 51: GETL R31, t36
+ 52: ADDL $0xA4, t36
+ 53: STL t34, (t36)
+ 54: INCEIPL $4
+
+ 0x254757C4: 54750036 rlwinm r21,r3,0,0,27
+ 55: GETL R3, t38
+ 56: ANDL $0xFFFFFFF0, t38
+ 57: PUTL t38, R21
+ 58: INCEIPL $4
+
+ 0x254757C8: 54E92834 rlwinm r9,r7,5,0,26
+ 59: GETL R7, t40
+ 60: SHLL $0x5, t40
+ 61: PUTL t40, R9
+ 62: INCEIPL $4
+
+ 0x254757CC: 939F00A8 stw r28,168(r31)
+ 63: GETL R28, t42
+ 64: GETL R31, t44
+ 65: ADDL $0xA8, t44
+ 66: STL t42, (t44)
+ 67: INCEIPL $4
+
+ 0x254757D0: 7C09DA14 add r0,r9,r27
+ 68: GETL R9, t46
+ 69: GETL R27, t48
+ 70: ADDL t46, t48
+ 71: PUTL t48, R0
+ 72: INCEIPL $4
+
+ 0x254757D4: 7F7DDB78 or r29,r27,r27
+ 73: GETL R27, t50
+ 74: PUTL t50, R29
+ 75: INCEIPL $4
+
+ 0x254757D8: 7E00D840 cmpl cr4,r0,r27
+ 76: GETL R0, t52
+ 77: GETL R27, t54
+ 78: CMPUL t52, t54, t56 (-rSo)
+ 79: ICRFL t56, $0x4, CR
+ 80: INCEIPL $4
+
+ 0x254757DC: 409103A8 bc 4,17,0x25475B84
+ 81: Jc17o $0x25475B84
+
+
+
+. 483 25475790 80
+. A1 1A 01 54 7C 32 0B 78 80 81 00 00 3B A0 00 07 1C E8 00 18 3B 80 00 00 38 C7 00 1E 54 D9 02 B6 7C B9 00 D0 7C 81 29 6E A0 FA 01 54 38 61 00 2F 93 BF 00 A4 54 75 00 36 54 E9 28 34 93 9F 00 A8 7C 09 DA 14 7F 7D DB 78 7E 00 D8 40 40 91 03 A8
+==== BB 484 (0x254757E0) approx BBs exec'd 0 ====
+
+ 0x254757E0: 3B200000 li r25,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R25
+ 2: INCEIPL $4
+
+ 0x254757E4: 48000028 b 0x2547580C
+ 3: JMPo $0x2547580C ($4)
+
+
+
+. 484 254757E0 8
+. 3B 20 00 00 48 00 00 28
+==== BB 485 (0x2547580C) approx BBs exec'd 0 ====
+
+ 0x2547580C: 813D0000 lwz r9,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25475810: 2F090006 cmpi cr6,r9,6
+ 4: GETL R9, t4
+ 5: MOVL $0x6, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25475814: 419A0094 bc 12,26,0x254758A8
+ 9: Js26o $0x254758A8
+
+
+
+. 485 2547580C 12
+. 81 3D 00 00 2F 09 00 06 41 9A 00 94
+==== BB 486 (0x25475818) approx BBs exec'd 0 ====
+
+ 0x25475818: 28090006 cmpli cr0,r9,6
+ 0: GETL R9, t0
+ 1: MOVL $0x6, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547581C: 40A1FFCC bc 5,1,0x254757E8
+ 5: Jc01o $0x254757E8
+
+
+
+. 486 25475818 8
+. 28 09 00 06 40 A1 FF CC
+==== BB 487 (0x254757E8) approx BBs exec'd 0 ====
+
+ 0x254757E8: 2F890001 cmpi cr7,r9,1
+ 0: GETL R9, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x254757EC: 419E02C4 bc 12,30,0x25475AB0
+ 5: Js30o $0x25475AB0
+
+
+
+. 487 254757E8 8
+. 2F 89 00 01 41 9E 02 C4
+==== BB 488 (0x25475AB0) approx BBs exec'd 0 ====
+
+ 0x25475AB0: 81310004 lwz r9,4(r17)
+ 0: GETL R17, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475AB4: 817D001C lwz r11,28(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25475AB8: 3909FFFF addi r8,r9,-1
+ 10: GETL R9, t8
+ 11: ADDL $0xFFFFFFFF, t8
+ 12: PUTL t8, R8
+ 13: INCEIPL $4
+
+ 0x25475ABC: 7D694039 and. r9,r11,r8
+ 14: GETL R11, t10
+ 15: GETL R8, t12
+ 16: ANDL t10, t12
+ 17: PUTL t12, R9
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x0, CR
+ 20: INCEIPL $4
+
+ 0x25475AC0: 4082062C bc 4,2,0x254760EC
+ 21: Jc02o $0x254760EC
+
+
+
+. 488 25475AB0 20
+. 81 31 00 04 81 7D 00 1C 39 09 FF FF 7D 69 40 39 40 82 06 2C
+==== BB 489 (0x25475AC4) approx BBs exec'd 0 ====
+
+ 0x25475AC4: 815D0008 lwz r10,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25475AC8: 38ABFFFF addi r5,r11,-1
+ 5: GETL R11, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x25475ACC: 80DD0004 lwz r6,4(r29)
+ 9: GETL R29, t6
+ 10: ADDL $0x4, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R6
+ 13: INCEIPL $4
+
+ 0x25475AD0: 7C865050 subf r4,r6,r10
+ 14: GETL R6, t10
+ 15: GETL R10, t12
+ 16: SUBL t10, t12
+ 17: PUTL t12, R4
+ 18: INCEIPL $4
+
+ 0x25475AD4: 7C8B2839 and. r11,r4,r5
+ 19: GETL R4, t14
+ 20: GETL R5, t16
+ 21: ANDL t14, t16
+ 22: PUTL t16, R11
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x0, CR
+ 25: INCEIPL $4
+
+ 0x25475AD8: 40820650 bc 4,2,0x25476128
+ 26: Jc02o $0x25476128
+
+
+
+. 489 25475AC4 24
+. 81 5D 00 08 38 AB FF FF 80 DD 00 04 7C 86 50 50 7C 8B 28 39 40 82 06 50
+==== BB 490 (0x25475ADC) approx BBs exec'd 0 ====
+
+ 0x25475ADC: 7D4A4078 andc r10,r10,r8
+ 0: GETL R10, t0
+ 1: GETL R8, t2
+ 2: NOTL t2
+ 3: ANDL t0, t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0x25475AE0: 3B9C0001 addi r28,r28,1
+ 6: GETL R28, t4
+ 7: ADDL $0x1, t4
+ 8: PUTL t4, R28
+ 9: INCEIPL $4
+
+ 0x25475AE4: 7D55C92E stwx r10,r21,r25
+ 10: GETL R25, t6
+ 11: GETL R21, t8
+ 12: ADDL t8, t6
+ 13: GETL R10, t10
+ 14: STL t10, (t6)
+ 15: INCEIPL $4
+
+ 0x25475AE8: 289C0001 cmpli cr1,r28,1
+ 16: GETL R28, t12
+ 17: MOVL $0x1, t16
+ 18: CMPUL t12, t16, t14 (-rSo)
+ 19: ICRFL t14, $0x1, CR
+ 20: INCEIPL $4
+
+ 0x25475AEC: 813D0008 lwz r9,8(r29)
+ 21: GETL R29, t18
+ 22: ADDL $0x8, t18
+ 23: LDL (t18), t20
+ 24: PUTL t20, R9
+ 25: INCEIPL $4
+
+ 0x25475AF0: 801D0010 lwz r0,16(r29)
+ 26: GETL R29, t22
+ 27: ADDL $0x10, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R0
+ 30: INCEIPL $4
+
+ 0x25475AF4: 81F10004 lwz r15,4(r17)
+ 31: GETL R17, t26
+ 32: ADDL $0x4, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R15
+ 35: INCEIPL $4
+
+ 0x25475AF8: 7C690214 add r3,r9,r0
+ 36: GETL R9, t30
+ 37: GETL R0, t32
+ 38: ADDL t30, t32
+ 39: PUTL t32, R3
+ 40: INCEIPL $4
+
+ 0x25475AFC: 7D837A14 add r12,r3,r15
+ 41: GETL R3, t34
+ 42: GETL R15, t36
+ 43: ADDL t34, t36
+ 44: PUTL t36, R12
+ 45: INCEIPL $4
+
+ 0x25475B00: 7DCF00D0 neg r14,r15
+ 46: GETL R15, t38
+ 47: NEGL t38
+ 48: PUTL t38, R14
+ 49: INCEIPL $4
+
+ 0x25475B04: 396CFFFF addi r11,r12,-1
+ 50: GETL R12, t40
+ 51: ADDL $0xFFFFFFFF, t40
+ 52: PUTL t40, R11
+ 53: INCEIPL $4
+
+ 0x25475B08: 7D687038 and r8,r11,r14
+ 54: GETL R11, t42
+ 55: GETL R14, t44
+ 56: ANDL t42, t44
+ 57: PUTL t44, R8
+ 58: INCEIPL $4
+
+ 0x25475B0C: 7D75CA14 add r11,r21,r25
+ 59: GETL R21, t46
+ 60: GETL R25, t48
+ 61: ADDL t46, t48
+ 62: PUTL t48, R11
+ 63: INCEIPL $4
+
+ 0x25475B10: 910B0004 stw r8,4(r11)
+ 64: GETL R8, t50
+ 65: GETL R11, t52
+ 66: ADDL $0x4, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0x25475B14: 3B390018 addi r25,r25,24
+ 69: GETL R25, t54
+ 70: ADDL $0x18, t54
+ 71: PUTL t54, R25
+ 72: INCEIPL $4
+
+ 0x25475B18: 809D0008 lwz r4,8(r29)
+ 73: GETL R29, t56
+ 74: ADDL $0x8, t56
+ 75: LDL (t56), t58
+ 76: PUTL t58, R4
+ 77: INCEIPL $4
+
+ 0x25475B1C: 80DD0010 lwz r6,16(r29)
+ 78: GETL R29, t60
+ 79: ADDL $0x10, t60
+ 80: LDL (t60), t62
+ 81: PUTL t62, R6
+ 82: INCEIPL $4
+
+ 0x25475B20: 7CA43214 add r5,r4,r6
+ 83: GETL R4, t64
+ 84: GETL R6, t66
+ 85: ADDL t64, t66
+ 86: PUTL t66, R5
+ 87: INCEIPL $4
+
+ 0x25475B24: 90AB0008 stw r5,8(r11)
+ 88: GETL R5, t68
+ 89: GETL R11, t70
+ 90: ADDL $0x8, t70
+ 91: STL t68, (t70)
+ 92: INCEIPL $4
+
+ 0x25475B28: 813D0008 lwz r9,8(r29)
+ 93: GETL R29, t72
+ 94: ADDL $0x8, t72
+ 95: LDL (t72), t74
+ 96: PUTL t74, R9
+ 97: INCEIPL $4
+
+ 0x25475B2C: 801D0014 lwz r0,20(r29)
+ 98: GETL R29, t76
+ 99: ADDL $0x14, t76
+ 100: LDL (t76), t78
+ 101: PUTL t78, R0
+ 102: INCEIPL $4
+
+ 0x25475B30: 7C690214 add r3,r9,r0
+ 103: GETL R9, t80
+ 104: GETL R0, t82
+ 105: ADDL t80, t82
+ 106: PUTL t82, R3
+ 107: INCEIPL $4
+
+ 0x25475B34: 906B000C stw r3,12(r11)
+ 108: GETL R3, t84
+ 109: GETL R11, t86
+ 110: ADDL $0xC, t86
+ 111: STL t84, (t86)
+ 112: INCEIPL $4
+
+ 0x25475B38: 81910004 lwz r12,4(r17)
+ 113: GETL R17, t88
+ 114: ADDL $0x4, t88
+ 115: LDL (t88), t90
+ 116: PUTL t90, R12
+ 117: INCEIPL $4
+
+ 0x25475B3C: 81DD0004 lwz r14,4(r29)
+ 118: GETL R29, t92
+ 119: ADDL $0x4, t92
+ 120: LDL (t92), t94
+ 121: PUTL t94, R14
+ 122: INCEIPL $4
+
+ 0x25475B40: 7DEC00D0 neg r15,r12
+ 123: GETL R12, t96
+ 124: NEGL t96
+ 125: PUTL t96, R15
+ 126: INCEIPL $4
+
+ 0x25475B44: 7DC87838 and r8,r14,r15
+ 127: GETL R14, t98
+ 128: GETL R15, t100
+ 129: ANDL t98, t100
+ 130: PUTL t100, R8
+ 131: INCEIPL $4
+
+ 0x25475B48: 910B0010 stw r8,16(r11)
+ 132: GETL R8, t102
+ 133: GETL R11, t104
+ 134: ADDL $0x10, t104
+ 135: STL t102, (t104)
+ 136: INCEIPL $4
+
+ 0x25475B4C: 40850018 bc 4,5,0x25475B64
+ 137: Jc05o $0x25475B64
+
+
+
+. 490 25475ADC 116
+. 7D 4A 40 78 3B 9C 00 01 7D 55 C9 2E 28 9C 00 01 81 3D 00 08 80 1D 00 10 81 F1 00 04 7C 69 02 14 7D 83 7A 14 7D CF 00 D0 39 6C FF FF 7D 68 70 38 7D 75 CA 14 91 0B 00 04 3B 39 00 18 80 9D 00 08 80 DD 00 10 7C A4 32 14 90 AB 00 08 81 3D 00 08 80 1D 00 14 7C 69 02 14 90 6B 00 0C 81 91 00 04 81 DD 00 04 7D EC 00 D0 7D C8 78 38 91 0B 00 10 40 85 00 18
+==== BB 491 (0x25475B64) approx BBs exec'd 0 ====
+
+ 0x25475B64: 807D0018 lwz r3,24(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25475B68: 3D807351 lis r12,29521
+ 5: MOVL $0x73510000, t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0x25475B6C: 618E6240 ori r14,r12,0x6240
+ 8: MOVL $0x73516240, t6
+ 9: PUTL t6, R14
+ 10: INCEIPL $4
+
+ 0x25475B70: 546F16FA rlwinm r15,r3,2,27,29
+ 11: GETL R3, t8
+ 12: ROLL $0x2, t8
+ 13: ANDL $0x1C, t8
+ 14: PUTL t8, R15
+ 15: INCEIPL $4
+
+ 0x25475B74: 7DC87E30 sraw r8,r14,r15
+ 16: GETL R14, t12
+ 17: GETL R15, t10
+ 18: SARL t10, t12 (-wCa)
+ 19: PUTL t12, R8
+ 20: INCEIPL $4
+
+ 0x25475B78: 5506073E rlwinm r6,r8,0,28,31
+ 21: GETL R8, t14
+ 22: ANDL $0xF, t14
+ 23: PUTL t14, R6
+ 24: INCEIPL $4
+
+ 0x25475B7C: 90CB0014 stw r6,20(r11)
+ 25: GETL R6, t16
+ 26: GETL R11, t18
+ 27: ADDL $0x14, t18
+ 28: STL t16, (t18)
+ 29: INCEIPL $4
+
+ 0x25475B80: 4BFFFC78 b 0x254757F8
+ 30: JMPo $0x254757F8 ($4)
+
+
+
+. 491 25475B64 32
+. 80 7D 00 18 3D 80 73 51 61 8E 62 40 54 6F 16 FA 7D C8 7E 30 55 06 07 3E 90 CB 00 14 4B FF FC 78
+==== BB 492 (0x254757F8) approx BBs exec'd 0 ====
+
+ 0x254757F8: 54EF2834 rlwinm r15,r7,5,0,26
+ 0: GETL R7, t0
+ 1: SHLL $0x5, t0
+ 2: PUTL t0, R15
+ 3: INCEIPL $4
+
+ 0x254757FC: 3BBD0020 addi r29,r29,32
+ 4: GETL R29, t2
+ 5: ADDL $0x20, t2
+ 6: PUTL t2, R29
+ 7: INCEIPL $4
+
+ 0x25475800: 7DCFDA14 add r14,r15,r27
+ 8: GETL R15, t4
+ 9: GETL R27, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R14
+ 12: INCEIPL $4
+
+ 0x25475804: 7C8EE840 cmpl cr1,r14,r29
+ 13: GETL R14, t8
+ 14: GETL R29, t10
+ 15: CMPUL t8, t10, t12 (-rSo)
+ 16: ICRFL t12, $0x1, CR
+ 17: INCEIPL $4
+
+ 0x25475808: 408500BC bc 4,5,0x254758C4
+ 18: Jc05o $0x254758C4
+
+
+
+. 492 254757F8 20
+. 54 EF 28 34 3B BD 00 20 7D CF DA 14 7C 8E E8 40 40 85 00 BC
+==== BB 493 (0x25475B50) approx BBs exec'd 0 ====
+
+ 0x25475B50: 808BFFEC lwz r4,-20(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0xFFFFFFEC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25475B54: 7E045000 cmp cr4,r4,r10
+ 5: GETL R4, t4
+ 6: GETL R10, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x4, CR
+ 9: INCEIPL $4
+
+ 0x25475B58: 4192000C bc 12,18,0x25475B64
+ 10: Js18o $0x25475B64
+
+
+
+. 493 25475B50 12
+. 80 8B FF EC 7E 04 50 00 41 92 00 0C
+==== BB 494 (0x25475B5C) approx BBs exec'd 0 ====
+
+ 0x25475B5C: 39400001 li r10,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x25475B60: 915F00A8 stw r10,168(r31)
+ 3: GETL R10, t2
+ 4: GETL R31, t4
+ 5: ADDL $0xA8, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x25475B64: 807D0018 lwz r3,24(r29)
+ 8: GETL R29, t6
+ 9: ADDL $0x18, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0x25475B68: 3D807351 lis r12,29521
+ 13: MOVL $0x73510000, t10
+ 14: PUTL t10, R12
+ 15: INCEIPL $4
+
+ 0x25475B6C: 618E6240 ori r14,r12,0x6240
+ 16: MOVL $0x73516240, t12
+ 17: PUTL t12, R14
+ 18: INCEIPL $4
+
+ 0x25475B70: 546F16FA rlwinm r15,r3,2,27,29
+ 19: GETL R3, t14
+ 20: ROLL $0x2, t14
+ 21: ANDL $0x1C, t14
+ 22: PUTL t14, R15
+ 23: INCEIPL $4
+
+ 0x25475B74: 7DC87E30 sraw r8,r14,r15
+ 24: GETL R14, t18
+ 25: GETL R15, t16
+ 26: SARL t16, t18 (-wCa)
+ 27: PUTL t18, R8
+ 28: INCEIPL $4
+
+ 0x25475B78: 5506073E rlwinm r6,r8,0,28,31
+ 29: GETL R8, t20
+ 30: ANDL $0xF, t20
+ 31: PUTL t20, R6
+ 32: INCEIPL $4
+
+ 0x25475B7C: 90CB0014 stw r6,20(r11)
+ 33: GETL R6, t22
+ 34: GETL R11, t24
+ 35: ADDL $0x14, t24
+ 36: STL t22, (t24)
+ 37: INCEIPL $4
+
+ 0x25475B80: 4BFFFC78 b 0x254757F8
+ 38: JMPo $0x254757F8 ($4)
+
+
+
+. 494 25475B5C 40
+. 39 40 00 01 91 5F 00 A8 80 7D 00 18 3D 80 73 51 61 8E 62 40 54 6F 16 FA 7D C8 7E 30 55 06 07 3E 90 CB 00 14 4B FF FC 78
+==== BB 495 (0x254757F0) approx BBs exec'd 0 ====
+
+ 0x254757F0: 2C890002 cmpi cr1,r9,2
+ 0: GETL R9, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254757F4: 418603B8 bc 12,6,0x25475BAC
+ 5: Js06o $0x25475BAC
+
+
+
+. 495 254757F0 8
+. 2C 89 00 02 41 86 03 B8
+==== BB 496 (0x25475BAC) approx BBs exec'd 0 ====
+
+ 0x25475BAC: 807D0014 lwz r3,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25475BB0: 819D0008 lwz r12,8(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25475BB4: 546BE8FE rlwinm r11,r3,29,3,31
+ 10: GETL R3, t8
+ 11: SHRL $0x3, t8
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0x25475BB8: 919A0008 stw r12,8(r26)
+ 14: GETL R12, t10
+ 15: GETL R26, t12
+ 16: ADDL $0x8, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x25475BBC: B17A0156 sth r11,342(r26)
+ 19: GETL R11, t14
+ 20: GETL R26, t16
+ 21: ADDL $0x156, t16
+ 22: STW t14, (t16)
+ 23: INCEIPL $4
+
+ 0x25475BC0: 4BFFFC38 b 0x254757F8
+ 24: JMPo $0x254757F8 ($4)
+
+
+
+. 496 25475BAC 24
+. 80 7D 00 14 81 9D 00 08 54 6B E8 FE 91 9A 00 08 B1 7A 01 56 4B FF FC 38
+==== BB 497 (0x25475820) approx BBs exec'd 0 ====
+
+ 0x25475820: 3DC06474 lis r14,25716
+ 0: MOVL $0x64740000, t0
+ 1: PUTL t0, R14
+ 2: INCEIPL $4
+
+ 0x25475824: 61C0E551 ori r0,r14,0xE551
+ 3: MOVL $0x6474E551, t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x25475828: 7E090000 cmp cr4,r9,r0
+ 6: GETL R9, t4
+ 7: GETL R0, t6
+ 8: CMPL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x4, CR
+ 10: INCEIPL $4
+
+ 0x2547582C: 41920278 bc 12,18,0x25475AA4
+ 11: Js18o $0x25475AA4
+
+
+
+. 497 25475820 16
+. 3D C0 64 74 61 C0 E5 51 7E 09 00 00 41 92 02 78
+==== BB 498 (0x25475AA4) approx BBs exec'd 0 ====
+
+ 0x25475AA4: 815D0018 lwz r10,24(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25475AA8: 915F00A4 stw r10,164(r31)
+ 5: GETL R10, t4
+ 6: GETL R31, t6
+ 7: ADDL $0xA4, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25475AAC: 4BFFFD4C b 0x254757F8
+ 10: JMPo $0x254757F8 ($4)
+
+
+
+. 498 25475AA4 12
+. 81 5D 00 18 91 5F 00 A4 4B FF FD 4C
+==== BB 499 (0x254758C4) approx BBs exec'd 0 ====
+
+ 0x254758C4: 2E1C0000 cmpi cr4,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x254758C8: 419202BC bc 12,18,0x25475B84
+ 4: Js18o $0x25475B84
+
+
+
+. 499 254758C4 8
+. 2E 1C 00 00 41 92 02 BC
+==== BB 500 (0x254758CC) approx BBs exec'd 0 ====
+
+ 0x254758CC: 1DFC0018 mulli r15,r28,24
+ 0: GETL R28, t0
+ 1: MULL $0x18, t0
+ 2: PUTL t0, R15
+ 3: INCEIPL $4
+
+ 0x254758D0: 839F009C lwz r28,156(r31)
+ 4: GETL R31, t2
+ 5: ADDL $0x9C, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x254758D4: 81750000 lwz r11,0(r21)
+ 9: GETL R21, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x254758D8: 7EBDAB78 or r29,r21,r21
+ 13: GETL R21, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0x254758DC: 2E1C0003 cmpi cr4,r28,3
+ 16: GETL R28, t12
+ 17: MOVL $0x3, t16
+ 18: CMPL t12, t16, t14 (-rSo)
+ 19: ICRFL t14, $0x4, CR
+ 20: INCEIPL $4
+
+ 0x254758E0: 7F8FAA14 add r28,r15,r21
+ 21: GETL R15, t18
+ 22: GETL R21, t20
+ 23: ADDL t18, t20
+ 24: PUTL t20, R28
+ 25: INCEIPL $4
+
+ 0x254758E4: 833CFFF4 lwz r25,-12(r28)
+ 26: GETL R28, t22
+ 27: ADDL $0xFFFFFFF4, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R25
+ 30: INCEIPL $4
+
+ 0x254758E8: 7DCBC850 subf r14,r11,r25
+ 31: GETL R11, t26
+ 32: GETL R25, t28
+ 33: SUBL t26, t28
+ 34: PUTL t28, R14
+ 35: INCEIPL $4
+
+ 0x254758EC: 40920818 bc 4,18,0x25476104
+ 36: Jc18o $0x25476104
+
+
+
+. 500 254758CC 36
+. 1D FC 00 18 83 9F 00 9C 81 75 00 00 7E BD AB 78 2E 1C 00 03 7F 8F AA 14 83 3C FF F4 7D CB C8 50 40 92 08 18
+==== BB 501 (0x254758F0) approx BBs exec'd 0 ====
+
+ 0x254758F0: 8191004C lwz r12,76(r17)
+ 0: GETL R17, t0
+ 1: ADDL $0x4C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x254758F4: 7DC47378 or r4,r14,r14
+ 5: GETL R14, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x254758F8: 7EE3BB78 or r3,r23,r23
+ 8: GETL R23, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x254758FC: 7D656038 and r5,r11,r12
+ 11: GETL R11, t8
+ 12: GETL R12, t10
+ 13: ANDL t8, t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0x25475900: 4800ADE9 bl 0x254806E8
+ 16: MOVL $0x25475904, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0x254806E8 ($4)
+
+
+
+. 501 254758F0 20
+. 81 91 00 4C 7D C4 73 78 7E E3 BB 78 7D 65 60 38 48 00 AD E9
+==== BB 502 __elf_preferred_address(0x254806E8) approx BBs exec'd 0 ====
+
+ 0x254806E8: 7CA32B79 or. r3,r5,r5
+ 0: GETL R5, t0
+ 1: PUTL t0, R3
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254806EC: 7D8802A6 mflr r12
+ 5: GETL LR, t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0x254806F0: 9421FFE0 stwu r1,-32(r1)
+ 8: GETL R1, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xFFFFFFE0, t8
+ 11: PUTL t8, R1
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x254806F4: 4801690D bl 0x25497000
+ 14: MOVL $0x254806F8, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x25497000 ($4)
+
+
+
+. 502 254806E8 16
+. 7C A3 2B 79 7D 88 02 A6 94 21 FF E0 48 01 69 0D
+==== BB 503 (0x254806F8) approx BBs exec'd 0 ====
+
+ 0x254806F8: 93A10014 stw r29,20(r1)
+ 0: GETL R29, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254806FC: 7C9D2378 or r29,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25480700: 93C10018 stw r30,24(r1)
+ 8: GETL R30, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x18, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25480704: 7FC802A6 mflr r30
+ 13: GETL LR, t10
+ 14: PUTL t10, R30
+ 15: INCEIPL $4
+
+ 0x25480708: 93810010 stw r28,16(r1)
+ 16: GETL R28, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x10, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x2548070C: 93E1001C stw r31,28(r1)
+ 21: GETL R31, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25480710: 7D8803A6 mtlr r12
+ 26: GETL R12, t20
+ 27: PUTL t20, LR
+ 28: INCEIPL $4
+
+ 0x25480714: 408200FC bc 4,2,0x25480810
+ 29: Jc02o $0x25480810
+
+
+
+. 503 254806F8 32
+. 93 A1 00 14 7C 9D 23 78 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 E1 00 1C 7D 88 03 A6 40 82 00 FC
+==== BB 504 (0x25480718) approx BBs exec'd 0 ====
+
+ 0x25480718: 3CC00003 lis r6,3
+ 0: MOVL $0x30000, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x2548071C: 83FE04F4 lwz r31,1268(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x4F4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0x25480720: 809E04C8 lwz r4,1224(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x4C8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25480724: 60C6FFFF ori r6,r6,0xFFFF
+ 13: MOVL $0x3FFFF, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x25480728: 3CE07000 lis r7,28672
+ 16: MOVL $0x70000000, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0x2548072C: 3980000F li r12,15
+ 19: MOVL $0xF, t14
+ 20: PUTL t14, R12
+ 21: INCEIPL $4
+
+ 0x25480730: 81640000 lwz r11,0(r4)
+ 22: GETL R4, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R11
+ 25: INCEIPL $4
+
+ 0x25480734: 38840018 addi r4,r4,24
+ 26: GETL R4, t20
+ 27: ADDL $0x18, t20
+ 28: PUTL t20, R4
+ 29: INCEIPL $4
+
+ 0x25480738: 2F8B0000 cmpi cr7,r11,0
+ 30: GETL R11, t22
+ 31: CMP0L t22, t24 (-rSo)
+ 32: ICRFL t24, $0x7, CR
+ 33: INCEIPL $4
+
+ 0x2548073C: 419E009C bc 12,30,0x254807D8
+ 34: Js30o $0x254807D8
+
+
+
+. 504 25480718 40
+. 3C C0 00 03 83 FE 04 F4 80 9E 04 C8 60 C6 FF FF 3C E0 70 00 39 80 00 0F 81 64 00 00 38 84 00 18 2F 8B 00 00 41 9E 00 9C
+==== BB 505 (0x25480740) approx BBs exec'd 0 ====
+
+ 0x25480740: 813F0004 lwz r9,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25480744: 38A9FFFF addi r5,r9,-1
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x25480748: 7CA328F8 nor r3,r5,r5
+ 9: GETL R5, t6
+ 10: NOTL t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0x2548074C: 800B01A4 lwz r0,420(r11)
+ 13: GETL R11, t8
+ 14: ADDL $0x1A4, t8
+ 15: LDL (t8), t10
+ 16: PUTL t10, R0
+ 17: INCEIPL $4
+
+ 0x25480750: 838B01A0 lwz r28,416(r11)
+ 18: GETL R11, t12
+ 19: ADDL $0x1A0, t12
+ 20: LDL (t12), t14
+ 21: PUTL t14, R28
+ 22: INCEIPL $4
+
+ 0x25480754: 7C082B78 or r8,r0,r5
+ 23: GETL R0, t16
+ 24: GETL R5, t18
+ 25: ORL t18, t16
+ 26: PUTL t16, R8
+ 27: INCEIPL $4
+
+ 0x25480758: 7C883840 cmpl cr1,r8,r7
+ 28: GETL R8, t20
+ 29: GETL R7, t22
+ 30: CMPUL t20, t22, t24 (-rSo)
+ 31: ICRFL t24, $0x1, CR
+ 32: INCEIPL $4
+
+ 0x2548075C: 7F8A1838 and r10,r28,r3
+ 33: GETL R28, t26
+ 34: GETL R3, t28
+ 35: ANDL t26, t28
+ 36: PUTL t28, R10
+ 37: INCEIPL $4
+
+ 0x25480760: 40840010 bc 4,4,0x25480770
+ 38: Jc04o $0x25480770
+
+
+
+. 505 25480740 36
+. 81 3F 00 04 38 A9 FF FF 7C A3 28 F8 80 0B 01 A4 83 8B 01 A0 7C 08 2B 78 7C 88 38 40 7F 8A 18 38 40 84 00 10
+==== BB 506 (0x25480764) approx BBs exec'd 0 ====
+
+ 0x25480764: 838B0180 lwz r28,384(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x25480768: 7789C000 andis. r9,r28,0xC000
+ 5: GETL R28, t4
+ 6: ANDL $0xC0000000, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x2548076C: 4082000C bc 4,2,0x25480778
+ 11: Jc02o $0x25480778
+
+
+
+. 506 25480764 12
+. 83 8B 01 80 77 89 C0 00 40 82 00 0C
+==== BB 507 (0x25480770) approx BBs exec'd 0 ====
+
+ 0x25480770: 7F075040 cmpl cr6,r7,r10
+ 0: GETL R7, t0
+ 1: GETL R10, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25480774: 40980054 bc 4,24,0x254807C8
+ 5: Jc24o $0x254807C8
+
+
+
+. 507 25480770 8
+. 7F 07 50 40 40 98 00 54
+==== BB 508 (0x254807C8) approx BBs exec'd 0 ====
+
+ 0x254807C8: 7D475378 or r7,r10,r10
+ 0: GETL R10, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x254807CC: 816B000C lwz r11,12(r11)
+ 3: GETL R11, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x254807D0: 2C8B0000 cmpi cr1,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x254807D4: 4086FF78 bc 4,6,0x2548074C
+ 12: Jc06o $0x2548074C
+
+
+
+. 508 254807C8 16
+. 7D 47 53 78 81 6B 00 0C 2C 8B 00 00 40 86 FF 78
+==== BB 509 (0x2548074C) approx BBs exec'd 0 ====
+
+ 0x2548074C: 800B01A4 lwz r0,420(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x1A4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25480750: 838B01A0 lwz r28,416(r11)
+ 5: GETL R11, t4
+ 6: ADDL $0x1A0, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25480754: 7C082B78 or r8,r0,r5
+ 10: GETL R0, t8
+ 11: GETL R5, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R8
+ 14: INCEIPL $4
+
+ 0x25480758: 7C883840 cmpl cr1,r8,r7
+ 15: GETL R8, t12
+ 16: GETL R7, t14
+ 17: CMPUL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x1, CR
+ 19: INCEIPL $4
+
+ 0x2548075C: 7F8A1838 and r10,r28,r3
+ 20: GETL R28, t18
+ 21: GETL R3, t20
+ 22: ANDL t18, t20
+ 23: PUTL t20, R10
+ 24: INCEIPL $4
+
+ 0x25480760: 40840010 bc 4,4,0x25480770
+ 25: Jc04o $0x25480770
+
+
+
+. 509 2548074C 24
+. 80 0B 01 A4 83 8B 01 A0 7C 08 2B 78 7C 88 38 40 7F 8A 18 38 40 84 00 10
+==== BB 510 (0x25480778) approx BBs exec'd 0 ====
+
+ 0x25480778: 7C064010 subfc r0,r6,r8
+ 0: GETL R6, t0
+ 1: GETL R8, t2
+ 2: SBBL t0, t2 (-wCa)
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2548077C: 38000000 li r0,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x25480780: 7C000114 adde r0,r0,r0
+ 8: GETL R0, t6
+ 9: GETL R0, t8
+ 10: ADCL t6, t8 (-rCa-wCa)
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x25480784: 7D2A3010 subfc r9,r10,r6
+ 13: GETL R10, t10
+ 14: GETL R6, t12
+ 15: SBBL t10, t12 (-wCa)
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x25480788: 39200000 li r9,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R9
+ 20: INCEIPL $4
+
+ 0x2548078C: 7D294914 adde r9,r9,r9
+ 21: GETL R9, t16
+ 22: GETL R9, t18
+ 23: ADCL t16, t18 (-rCa-wCa)
+ 24: PUTL t18, R9
+ 25: INCEIPL $4
+
+ 0x25480790: 7C1C4839 and. r28,r0,r9
+ 26: GETL R0, t20
+ 27: GETL R9, t22
+ 28: ANDL t20, t22
+ 29: PUTL t22, R28
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x0, CR
+ 32: INCEIPL $4
+
+ 0x25480794: 40820094 bc 4,2,0x25480828
+ 33: Jc02o $0x25480828
+
+
+
+. 510 25480778 32
+. 7C 06 40 10 38 00 00 00 7C 00 01 14 7D 2A 30 10 39 20 00 00 7D 29 49 14 7C 1C 48 39 40 82 00 94
+==== BB 511 (0x25480798) approx BBs exec'd 0 ====
+
+ 0x25480798: 7C083810 subfc r0,r8,r7
+ 0: GETL R8, t0
+ 1: GETL R7, t2
+ 2: SBBL t0, t2 (-wCa)
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2548079C: 38000000 li r0,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x254807A0: 7C000114 adde r0,r0,r0
+ 8: GETL R0, t6
+ 9: GETL R0, t8
+ 10: ADCL t6, t8 (-rCa-wCa)
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x254807A4: 7D265010 subfc r9,r6,r10
+ 13: GETL R6, t10
+ 14: GETL R10, t12
+ 15: SBBL t10, t12 (-wCa)
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x254807A8: 39200000 li r9,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R9
+ 20: INCEIPL $4
+
+ 0x254807AC: 7D294914 adde r9,r9,r9
+ 21: GETL R9, t16
+ 22: GETL R9, t18
+ 23: ADCL t16, t18 (-rCa-wCa)
+ 24: PUTL t18, R9
+ 25: INCEIPL $4
+
+ 0x254807B0: 7C1C4839 and. r28,r0,r9
+ 26: GETL R0, t20
+ 27: GETL R9, t22
+ 28: ANDL t20, t22
+ 29: PUTL t22, R28
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x0, CR
+ 32: INCEIPL $4
+
+ 0x254807B4: 41820018 bc 12,2,0x254807CC
+ 33: Js02o $0x254807CC
+
+
+
+. 511 25480798 32
+. 7C 08 38 10 38 00 00 00 7C 00 01 14 7D 26 50 10 39 20 00 00 7D 29 49 14 7C 1C 48 39 41 82 00 18
+==== BB 512 (0x254807CC) approx BBs exec'd 0 ====
+
+ 0x254807CC: 816B000C lwz r11,12(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254807D0: 2C8B0000 cmpi cr1,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x254807D4: 4086FF78 bc 4,6,0x2548074C
+ 9: Jc06o $0x2548074C
+
+
+
+. 512 254807CC 12
+. 81 6B 00 0C 2C 8B 00 00 40 86 FF 78
+==== BB 513 (0x254807D8) approx BBs exec'd 0 ====
+
+ 0x254807D8: 358CFFFF addic. r12,r12,-1
+ 0: GETL R12, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R12
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x254807DC: 4080FF54 bc 4,0,0x25480730
+ 6: Jc00o $0x25480730
+
+
+
+. 513 254807D8 8
+. 35 8C FF FF 40 80 FF 54
+==== BB 514 (0x25480730) approx BBs exec'd 0 ====
+
+ 0x25480730: 81640000 lwz r11,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25480734: 38840018 addi r4,r4,24
+ 4: GETL R4, t4
+ 5: ADDL $0x18, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25480738: 2F8B0000 cmpi cr7,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x2548073C: 419E009C bc 12,30,0x254807D8
+ 12: Js30o $0x254807D8
+
+
+
+. 514 25480730 16
+. 81 64 00 00 38 84 00 18 2F 8B 00 00 41 9E 00 9C
+==== BB 515 (0x254807E0) approx BBs exec'd 0 ====
+
+ 0x254807E0: 3C67FFFF addis r3,r7,-1
+ 0: GETL R7, t0
+ 1: ADDL $0xFFFF0000, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x254807E4: 80FF0004 lwz r7,4(r31)
+ 4: GETL R31, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x254807E8: 7F033040 cmpl cr6,r3,r6
+ 9: GETL R3, t6
+ 10: GETL R6, t8
+ 11: CMPUL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0x254807EC: 3887FFFF addi r4,r7,-1
+ 14: GETL R7, t12
+ 15: ADDL $0xFFFFFFFF, t12
+ 16: PUTL t12, R4
+ 17: INCEIPL $4
+
+ 0x254807F0: 7C85EB78 or r5,r4,r29
+ 18: GETL R4, t14
+ 19: GETL R29, t16
+ 20: ORL t16, t14
+ 21: PUTL t14, R5
+ 22: INCEIPL $4
+
+ 0x254807F4: 38850001 addi r4,r5,1
+ 23: GETL R5, t18
+ 24: ADDL $0x1, t18
+ 25: PUTL t18, R4
+ 26: INCEIPL $4
+
+ 0x254807F8: 40990014 bc 4,25,0x2548080C
+ 27: Jc25o $0x2548080C
+
+
+
+. 515 254807E0 28
+. 3C 67 FF FF 80 FF 00 04 7F 03 30 40 38 87 FF FF 7C 85 EB 78 38 85 00 01 40 99 00 14
+==== BB 516 (0x254807FC) approx BBs exec'd 0 ====
+
+ 0x254807FC: 7D061850 subf r8,r6,r3
+ 0: GETL R6, t0
+ 1: GETL R3, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25480800: 7C641850 subf r3,r4,r3
+ 5: GETL R4, t4
+ 6: GETL R3, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25480804: 7F882040 cmpl cr7,r8,r4
+ 10: GETL R8, t8
+ 11: GETL R4, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0x25480808: 409C0008 bc 4,28,0x25480810
+ 15: Jc28o $0x25480810
+
+
+
+. 516 254807FC 16
+. 7D 06 18 50 7C 64 18 50 7F 88 20 40 40 9C 00 08
+==== BB 517 (0x25480810) approx BBs exec'd 0 ====
+
+ 0x25480810: 83810010 lwz r28,16(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x25480814: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x25480818: 83C10018 lwz r30,24(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R30
+ 14: INCEIPL $4
+
+ 0x2548081C: 83E1001C lwz r31,28(r1)
+ 15: GETL R1, t12
+ 16: ADDL $0x1C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R31
+ 19: INCEIPL $4
+
+ 0x25480820: 38210020 addi r1,r1,32
+ 20: GETL R1, t16
+ 21: ADDL $0x20, t16
+ 22: PUTL t16, R1
+ 23: INCEIPL $4
+
+ 0x25480824: 4E800020 blr
+ 24: GETL LR, t18
+ 25: JMPo-r t18 ($4)
+
+
+
+. 517 25480810 24
+. 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 518 (0x25475904) approx BBs exec'd 0 ====
+
+ 0x25475904: 80B50014 lwz r5,20(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25475908: 81150010 lwz r8,16(r21)
+ 5: GETL R21, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x2547590C: 7DC47378 or r4,r14,r14
+ 10: GETL R14, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25475910: 38C00802 li r6,2050
+ 13: MOVL $0x802, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x25475914: 7E679B78 or r7,r19,r19
+ 16: GETL R19, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0x25475918: 4800CE81 bl 0x25482798
+ 19: MOVL $0x2547591C, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x25482798 ($4)
+
+
+
+. 518 25475904 24
+. 80 B5 00 14 81 15 00 10 7D C4 73 78 38 C0 08 02 7E 67 9B 78 48 00 CE 81
+==22130== Reading syms from /home/sewardj/valgrind-2.2.0-ppc/Inst/lib/valgrind/vg_inject.so (0xFFDD000)
+==== BB 519 (0x2547591C) approx BBs exec'd 0 ====
+
+ 0x2547591C: 2F03FFFF cmpi cr6,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25475920: 907A01A0 stw r3,416(r26)
+ 5: GETL R3, t6
+ 6: GETL R26, t8
+ 7: ADDL $0x1A0, t8
+ 8: STL t6, (t8)
+ 9: INCEIPL $4
+
+ 0x25475924: 419A013C bc 12,26,0x25475A60
+ 10: Js26o $0x25475A60
+
+
+
+. 519 2547591C 12
+. 2F 03 FF FF 90 7A 01 A0 41 9A 01 3C
+==== BB 520 (0x25475928) approx BBs exec'd 0 ====
+
+ 0x25475928: 817F00A8 lwz r11,168(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xA8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547592C: 7CA37214 add r5,r3,r14
+ 5: GETL R3, t4
+ 6: GETL R14, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0x25475930: 90BA01A4 stw r5,420(r26)
+ 10: GETL R5, t8
+ 11: GETL R26, t10
+ 12: ADDL $0x1A4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475934: 2F8B0000 cmpi cr7,r11,0
+ 15: GETL R11, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x25475938: 80F50000 lwz r7,0(r21)
+ 19: GETL R21, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R7
+ 22: INCEIPL $4
+
+ 0x2547593C: 7C071850 subf r0,r7,r3
+ 23: GETL R7, t20
+ 24: GETL R3, t22
+ 25: SUBL t20, t22
+ 26: PUTL t22, R0
+ 27: INCEIPL $4
+
+ 0x25475940: 901A0000 stw r0,0(r26)
+ 28: GETL R0, t24
+ 29: GETL R26, t26
+ 30: STL t24, (t26)
+ 31: INCEIPL $4
+
+ 0x25475944: 409E0534 bc 4,30,0x25475E78
+ 32: Jc30o $0x25475E78
+
+
+
+. 520 25475928 32
+. 81 7F 00 A8 7C A3 72 14 90 BA 01 A4 2F 8B 00 00 80 F5 00 00 7C 07 18 50 90 1A 00 00 40 9E 05 34
+==== BB 521 (0x25475E78) approx BBs exec'd 0 ====
+
+ 0x25475E78: 80750004 lwz r3,4(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25475E7C: 38A00000 li r5,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25475E80: 809CFFF4 lwz r4,-12(r28)
+ 8: GETL R28, t6
+ 9: ADDL $0xFFFFFFF4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25475E84: 7C832050 subf r4,r3,r4
+ 13: GETL R3, t10
+ 14: GETL R4, t12
+ 15: SUBL t10, t12
+ 16: PUTL t12, R4
+ 17: INCEIPL $4
+
+ 0x25475E88: 7C601A14 add r3,r0,r3
+ 18: GETL R0, t14
+ 19: GETL R3, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R3
+ 22: INCEIPL $4
+
+ 0x25475E8C: 4800C92D bl 0x254827B8
+ 23: MOVL $0x25475E90, t18
+ 24: PUTL t18, LR
+ 25: JMPo-c $0x254827B8 ($4)
+
+
+
+. 521 25475E78 24
+. 80 75 00 04 38 A0 00 00 80 9C FF F4 7C 83 20 50 7C 60 1A 14 48 00 C9 2D
+==== BB 522 mprotect(0x254827B8) approx BBs exec'd 0 ====
+
+ 0x254827B8: 3800007D li r0,125
+ 0: MOVL $0x7D, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254827BC: 44000002 sc
+ 3: JMPo-sys $0x254827C0 ($4)
+
+
+
+. 522 254827B8 8
+. 38 00 00 7D 44 00 00 02
+==== BB 523 (0x254827C0) approx BBs exec'd 0 ====
+
+ 0x254827C0: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 523 254827C0 4
+. 4C A3 00 20
+==== BB 524 (0x25475E90) approx BBs exec'd 0 ====
+
+ 0x25475E90: 4BFFFAB8 b 0x25475948
+ 0: JMPo $0x25475948 ($4)
+
+
+
+. 524 25475E90 4
+. 4B FF FA B8
+==== BB 525 (0x25475948) approx BBs exec'd 0 ====
+
+ 0x25475948: 80DD0014 lwz r6,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547594C: 70C90004 andi. r9,r6,0x4
+ 5: GETL R6, t4
+ 6: ANDL $0x4, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25475950: 41820014 bc 12,2,0x25475964
+ 11: Js02o $0x25475964
+
+
+
+. 525 25475948 12
+. 80 DD 00 14 70 C9 00 04 41 82 00 14
+==== BB 526 (0x25475954) approx BBs exec'd 0 ====
+
+ 0x25475954: 839D0004 lwz r28,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x25475958: 833A0000 lwz r25,0(r26)
+ 5: GETL R26, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R25
+ 8: INCEIPL $4
+
+ 0x2547595C: 7D19E214 add r8,r25,r28
+ 9: GETL R25, t8
+ 10: GETL R28, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R8
+ 13: INCEIPL $4
+
+ 0x25475960: 911A01A8 stw r8,424(r26)
+ 14: GETL R8, t12
+ 15: GETL R26, t14
+ 16: ADDL $0x1A8, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25475964: 819A014C lwz r12,332(r26)
+ 19: GETL R26, t16
+ 20: ADDL $0x14C, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R12
+ 23: INCEIPL $4
+
+ 0x25475968: 2F8C0000 cmpi cr7,r12,0
+ 24: GETL R12, t20
+ 25: CMP0L t20, t22 (-rSo)
+ 26: ICRFL t22, $0x7, CR
+ 27: INCEIPL $4
+
+ 0x2547596C: 409E0038 bc 4,30,0x254759A4
+ 28: Jc30o $0x254759A4
+
+
+
+. 526 25475954 28
+. 83 9D 00 04 83 3A 00 00 7D 19 E2 14 91 1A 01 A8 81 9A 01 4C 2F 8C 00 00 40 9E 00 38
+==== BB 527 (0x25475970) approx BBs exec'd 0 ====
+
+ 0x25475970: 815D0010 lwz r10,16(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25475974: 8178001C lwz r11,28(r24)
+ 5: GETL R24, t4
+ 6: ADDL $0x1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25475978: 7C8A5840 cmpl cr1,r10,r11
+ 10: GETL R10, t8
+ 11: GETL R11, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x2547597C: 41850028 bc 12,5,0x254759A4
+ 15: Js05o $0x254759A4
+
+
+
+. 527 25475970 16
+. 81 5D 00 10 81 78 00 1C 7C 8A 58 40 41 85 00 28
+==== BB 528 (0x25475980) approx BBs exec'd 0 ====
+
+ 0x25475980: 801D0004 lwz r0,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475984: 811D0000 lwz r8,0(r29)
+ 5: GETL R29, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R8
+ 8: INCEIPL $4
+
+ 0x25475988: A138002C lhz r9,44(r24)
+ 9: GETL R24, t8
+ 10: ADDL $0x2C, t8
+ 11: LDW (t8), t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0x2547598C: 7C880050 subf r4,r8,r0
+ 14: GETL R8, t12
+ 15: GETL R0, t14
+ 16: SUBL t12, t14
+ 17: PUTL t14, R4
+ 18: INCEIPL $4
+
+ 0x25475990: 55232834 rlwinm r3,r9,5,0,26
+ 19: GETL R9, t16
+ 20: SHLL $0x5, t16
+ 21: PUTL t16, R3
+ 22: INCEIPL $4
+
+ 0x25475994: 7CA45214 add r5,r4,r10
+ 23: GETL R4, t18
+ 24: GETL R10, t20
+ 25: ADDL t18, t20
+ 26: PUTL t20, R5
+ 27: INCEIPL $4
+
+ 0x25475998: 7CEB1A14 add r7,r11,r3
+ 28: GETL R11, t22
+ 29: GETL R3, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R7
+ 32: INCEIPL $4
+
+ 0x2547599C: 7F053840 cmpl cr6,r5,r7
+ 33: GETL R5, t26
+ 34: GETL R7, t28
+ 35: CMPUL t26, t28, t30 (-rSo)
+ 36: ICRFL t30, $0x6, CR
+ 37: INCEIPL $4
+
+ 0x254759A0: 4098069C bc 4,24,0x2547603C
+ 38: Jc24o $0x2547603C
+
+
+
+. 528 25475980 36
+. 80 1D 00 04 81 1D 00 00 A1 38 00 2C 7C 88 00 50 55 23 28 34 7C A4 52 14 7C EB 1A 14 7F 05 38 40 40 98 06 9C
+==== BB 529 (0x2547603C) approx BBs exec'd 0 ====
+
+ 0x2547603C: 7EE85A14 add r23,r8,r11
+ 0: GETL R8, t0
+ 1: GETL R11, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x25476040: 7D6AB850 subf r11,r10,r23
+ 5: GETL R10, t4
+ 6: GETL R23, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25476044: 917A014C stw r11,332(r26)
+ 10: GETL R11, t8
+ 11: GETL R26, t10
+ 12: ADDL $0x14C, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25476048: 4BFFF95C b 0x254759A4
+ 15: JMPo $0x254759A4 ($4)
+
+
+
+. 529 2547603C 16
+. 7E E8 5A 14 7D 6A B8 50 91 7A 01 4C 4B FF F9 5C
+==== BB 530 (0x254759A4) approx BBs exec'd 0 ====
+
+ 0x254759A4: 809D000C lwz r4,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254759A8: 807D0008 lwz r3,8(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x254759AC: 7C041840 cmpl cr0,r4,r3
+ 10: GETL R4, t8
+ 11: GETL R3, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x254759B0: 40810068 bc 4,1,0x25475A18
+ 15: Jc01o $0x25475A18
+
+
+
+. 530 254759A4 16
+. 80 9D 00 0C 80 7D 00 08 7C 04 18 40 40 81 00 68
+==== BB 531 (0x25475A18) approx BBs exec'd 0 ====
+
+ 0x25475A18: 3BBD0018 addi r29,r29,24
+ 0: GETL R29, t0
+ 1: ADDL $0x18, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x25475A1C: 7F357A14 add r25,r21,r15
+ 4: GETL R21, t2
+ 5: GETL R15, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R25
+ 8: INCEIPL $4
+
+ 0x25475A20: 7F99E840 cmpl cr7,r25,r29
+ 9: GETL R25, t6
+ 10: GETL R29, t8
+ 11: CMPUL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25475A24: 409D01F8 bc 4,29,0x25475C1C
+ 14: Jc29o $0x25475C1C
+
+
+
+. 531 25475A18 16
+. 3B BD 00 18 7F 35 7A 14 7F 99 E8 40 40 9D 01 F8
+==== BB 532 (0x25475A28) approx BBs exec'd 0 ====
+
+ 0x25475A28: 809D0004 lwz r4,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25475A2C: 801D0000 lwz r0,0(r29)
+ 5: GETL R29, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x25475A30: 7C840040 cmpl cr1,r4,r0
+ 9: GETL R4, t8
+ 10: GETL R0, t10
+ 11: CMPUL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x25475A34: 4085FF14 bc 4,5,0x25475948
+ 14: Jc05o $0x25475948
+
+
+
+. 532 25475A28 16
+. 80 9D 00 04 80 1D 00 00 7C 84 00 40 40 85 FF 14
+==== BB 533 (0x25475A38) approx BBs exec'd 0 ====
+
+ 0x25475A38: 815A0000 lwz r10,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0x25475A3C: 7C802050 subf r4,r0,r4
+ 4: GETL R0, t4
+ 5: GETL R4, t6
+ 6: SUBL t4, t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x25475A40: 80BD0014 lwz r5,20(r29)
+ 9: GETL R29, t8
+ 10: ADDL $0x14, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R5
+ 13: INCEIPL $4
+
+ 0x25475A44: 38C00812 li r6,2066
+ 14: MOVL $0x812, t12
+ 15: PUTL t12, R6
+ 16: INCEIPL $4
+
+ 0x25475A48: 811D0010 lwz r8,16(r29)
+ 17: GETL R29, t14
+ 18: ADDL $0x10, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R8
+ 21: INCEIPL $4
+
+ 0x25475A4C: 7C6A0214 add r3,r10,r0
+ 22: GETL R10, t18
+ 23: GETL R0, t20
+ 24: ADDL t18, t20
+ 25: PUTL t20, R3
+ 26: INCEIPL $4
+
+ 0x25475A50: 7E679B78 or r7,r19,r19
+ 27: GETL R19, t22
+ 28: PUTL t22, R7
+ 29: INCEIPL $4
+
+ 0x25475A54: 4800CD45 bl 0x25482798
+ 30: MOVL $0x25475A58, t24
+ 31: PUTL t24, LR
+ 32: JMPo-c $0x25482798 ($4)
+
+
+
+. 533 25475A38 32
+. 81 5A 00 00 7C 80 20 50 80 BD 00 14 38 C0 08 12 81 1D 00 10 7C 6A 02 14 7E 67 9B 78 48 00 CD 45
+==== BB 534 (0x25475A58) approx BBs exec'd 0 ====
+
+ 0x25475A58: 2F03FFFF cmpi cr6,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25475A5C: 409AFEEC bc 4,26,0x25475948
+ 5: Jc26o $0x25475948
+
+
+
+. 534 25475A58 8
+. 2F 03 FF FF 40 9A FE EC
+==== BB 535 (0x254759B4) approx BBs exec'd 0 ====
+
+ 0x254759B4: 80DA0000 lwz r6,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x254759B8: 81710004 lwz r11,4(r17)
+ 4: GETL R17, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0x254759BC: 7F261A14 add r25,r6,r3
+ 9: GETL R6, t8
+ 10: GETL R3, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R25
+ 13: INCEIPL $4
+
+ 0x254759C0: 7EE62214 add r23,r6,r4
+ 14: GETL R6, t12
+ 15: GETL R4, t14
+ 16: ADDL t12, t14
+ 17: PUTL t14, R23
+ 18: INCEIPL $4
+
+ 0x254759C4: 7D0BCA14 add r8,r11,r25
+ 19: GETL R11, t16
+ 20: GETL R25, t18
+ 21: ADDL t16, t18
+ 22: PUTL t18, R8
+ 23: INCEIPL $4
+
+ 0x254759C8: 7C6B00D0 neg r3,r11
+ 24: GETL R11, t20
+ 25: NEGL t20
+ 26: PUTL t20, R3
+ 27: INCEIPL $4
+
+ 0x254759CC: 3948FFFF addi r10,r8,-1
+ 28: GETL R8, t22
+ 29: ADDL $0xFFFFFFFF, t22
+ 30: PUTL t22, R10
+ 31: INCEIPL $4
+
+ 0x254759D0: 7D5C1838 and r28,r10,r3
+ 32: GETL R10, t24
+ 33: GETL R3, t26
+ 34: ANDL t24, t26
+ 35: PUTL t26, R28
+ 36: INCEIPL $4
+
+ 0x254759D4: 7F97E040 cmpl cr7,r23,r28
+ 37: GETL R23, t28
+ 38: GETL R28, t30
+ 39: CMPUL t28, t30, t32 (-rSo)
+ 40: ICRFL t32, $0x7, CR
+ 41: INCEIPL $4
+
+ 0x254759D8: 409C0008 bc 4,28,0x254759E0
+ 42: Jc28o $0x254759E0
+
+
+
+. 535 254759B4 40
+. 80 DA 00 00 81 71 00 04 7F 26 1A 14 7E E6 22 14 7D 0B CA 14 7C 6B 00 D0 39 48 FF FF 7D 5C 18 38 7F 97 E0 40 40 9C 00 08
+==== BB 536 (0x254759DC) approx BBs exec'd 0 ====
+
+ 0x254759DC: 7EFCBB78 or r28,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0x254759E0: 7C9CC840 cmpl cr1,r28,r25
+ 3: GETL R28, t2
+ 4: GETL R25, t4
+ 5: CMPUL t2, t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x254759E4: 4085002C bc 4,5,0x25475A10
+ 8: Jc05o $0x25475A10
+
+
+
+. 536 254759DC 12
+. 7E FC BB 78 7C 9C C8 40 40 85 00 2C
+==== BB 537 (0x254759E8) approx BBs exec'd 0 ====
+
+ 0x254759E8: 80BD0014 lwz r5,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x254759EC: 70AA0002 andi. r10,r5,0x2
+ 5: GETL R5, t4
+ 6: ANDL $0x2, t4
+ 7: PUTL t4, R10
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x254759F0: 41820838 bc 12,2,0x25476228
+ 11: Js02o $0x25476228
+
+
+
+. 537 254759E8 12
+. 80 BD 00 14 70 AA 00 02 41 82 08 38
+==== BB 538 (0x254759F4) approx BBs exec'd 0 ====
+
+ 0x254759F4: 7CB9E050 subf r5,r25,r28
+ 0: GETL R25, t0
+ 1: GETL R28, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x254759F8: 7F23CB78 or r3,r25,r25
+ 5: GETL R25, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254759FC: 38800000 li r4,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x25475A00: 4800DD45 bl 0x25483744
+ 11: MOVL $0x25475A04, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483744 ($4)
+
+
+
+. 538 254759F4 16
+. 7C B9 E0 50 7F 23 CB 78 38 80 00 00 48 00 DD 45
+==== BB 539 memset(0x25483744) approx BBs exec'd 0 ====
+
+ 0x25483744: 28850004 cmpli cr1,r5,4
+ 0: GETL R5, t0
+ 1: MOVL $0x4, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25483748: 70670003 andi. r7,r3,0x3
+ 5: GETL R3, t6
+ 6: ANDL $0x3, t6
+ 7: PUTL t6, R7
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x2548374C: 7C661B78 or r6,r3,r3
+ 11: GETL R3, t10
+ 12: PUTL t10, R6
+ 13: INCEIPL $4
+
+ 0x25483750: 40850190 bc 4,5,0x254838E0
+ 14: Jc05o $0x254838E0
+
+
+
+. 539 25483744 16
+. 28 85 00 04 70 67 00 03 7C 66 1B 78 40 85 01 90
+==== BB 540 (0x25483754) approx BBs exec'd 0 ====
+
+ 0x25483754: 2A85001F cmpli cr5,r5,31
+ 0: GETL R5, t0
+ 1: MOVL $0x1F, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x5, CR
+ 4: INCEIPL $4
+
+ 0x25483758: 5084442E rlwimi r4,r4,8,16,23
+ 5: GETL R4, t6
+ 6: GETL R4, t8
+ 7: ROLL $0x8, t8
+ 8: ANDL $0xFF00, t8
+ 9: ANDL $0xFFFF00FF, t6
+ 10: ORL t6, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x2548375C: 41A20024 bc 13,2,0x25483780
+ 13: Js02o $0x25483780
+
+
+
+. 540 25483754 12
+. 2A 85 00 1F 50 84 44 2E 41 A2 00 24
+==== BB 541 (0x25483780) approx BBs exec'd 0 ====
+
+ 0x25483780: 7CA01120 mtcrf 0x1,r5
+ 0: GETL R5, t0
+ 1: ICRFL t0, $0x7, CR
+ 2: INCEIPL $4
+
+ 0x25483784: 5084801E rlwimi r4,r4,16,0,15
+ 3: GETL R4, t2
+ 4: GETL R4, t4
+ 5: ROLL $0x10, t4
+ 6: ANDL $0xFFFF0000, t4
+ 7: ANDL $0xFFFF, t2
+ 8: ORL t2, t4
+ 9: PUTL t4, R4
+ 10: INCEIPL $4
+
+ 0x25483788: 40950198 bc 4,21,0x25483920
+ 11: Jc21o $0x25483920
+
+
+
+. 541 25483780 12
+. 7C A0 11 20 50 84 80 1E 40 95 01 98
+==== BB 542 (0x2548378C) approx BBs exec'd 0 ====
+
+ 0x2548378C: 70C7001C andi. r7,r6,0x1C
+ 0: GETL R6, t0
+ 1: ANDL $0x1C, t0
+ 2: PUTL t0, R7
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25483790: 20E70020 subfic r7,r7,32
+ 6: GETL R7, t4
+ 7: MOVL $0x20, t6
+ 8: SBBL t4, t6 (-wCa)
+ 9: PUTL t6, R7
+ 10: INCEIPL $4
+
+ 0x25483794: 41820040 bc 12,2,0x254837D4
+ 11: Js02o $0x254837D4
+
+
+
+. 542 2548378C 12
+. 70 C7 00 1C 20 E7 00 20 41 82 00 40
+==== BB 543 (0x25483798) approx BBs exec'd 0 ====
+
+ 0x25483798: 7CE01120 mtcrf 0x1,r7
+ 0: GETL R7, t0
+ 1: ICRFL t0, $0x7, CR
+ 2: INCEIPL $4
+
+ 0x2548379C: 7CC63A14 add r6,r6,r7
+ 3: GETL R6, t2
+ 4: GETL R7, t4
+ 5: ADDL t2, t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0x254837A0: 7CA72850 subf r5,r7,r5
+ 8: GETL R7, t6
+ 9: GETL R5, t8
+ 10: SUBL t6, t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0x254837A4: 28870010 cmpli cr1,r7,16
+ 13: GETL R7, t10
+ 14: MOVL $0x10, t14
+ 15: CMPUL t10, t14, t12 (-rSo)
+ 16: ICRFL t12, $0x1, CR
+ 17: INCEIPL $4
+
+ 0x254837A8: 7CC83378 or r8,r6,r6
+ 18: GETL R6, t16
+ 19: PUTL t16, R8
+ 20: INCEIPL $4
+
+ 0x254837AC: 409C000C bc 4,28,0x254837B8
+ 21: Jc28o $0x254837B8
+
+
+
+. 543 25483798 24
+. 7C E0 11 20 7C C6 3A 14 7C A7 28 50 28 87 00 10 7C C8 33 78 40 9C 00 0C
+==== BB 544 (0x254837B8) approx BBs exec'd 0 ====
+
+ 0x254837B8: 41840014 bc 12,4,0x254837CC
+ 0: Js04o $0x254837CC
+
+
+
+. 544 254837B8 4
+. 41 84 00 14
+==== BB 545 (0x254837CC) approx BBs exec'd 0 ====
+
+ 0x254837CC: 409D0008 bc 4,29,0x254837D4
+ 0: Jc29o $0x254837D4
+
+
+
+. 545 254837CC 4
+. 40 9D 00 08
+==== BB 546 (0x254837D0) approx BBs exec'd 0 ====
+
+ 0x254837D0: 9088FFFC stw r4,-4(r8)
+ 0: GETL R4, t0
+ 1: GETL R8, t2
+ 2: ADDL $0xFFFFFFFC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254837D4: 28840000 cmpli cr1,r4,0
+ 5: GETL R4, t4
+ 6: MOVL $0x0, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x254837D8: 54A70035 rlwinm. r7,r5,0,0,26
+ 10: GETL R5, t10
+ 11: ANDL $0xFFFFFFE0, t10
+ 12: PUTL t10, R7
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x254837DC: 7CA01120 mtcrf 0x1,r5
+ 16: GETL R5, t14
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x254837E0: 418601A0 bc 12,6,0x25483980
+ 19: Js06o $0x25483980
+
+
+
+. 546 254837D0 20
+. 90 88 FF FC 28 84 00 00 54 A7 00 35 7C A0 11 20 41 86 01 A0
+==== BB 547 (0x25483980) approx BBs exec'd 0 ====
+
+ 0x25483980: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25483984: 4182FF9C bc 12,2,0x25483920
+ 3: Js02o $0x25483920
+
+
+
+. 547 25483980 8
+. 7C 08 02 A6 41 82 FF 9C
+==== BB 548 (0x25483988) approx BBs exec'd 0 ====
+
+ 0x25483988: 48013679 bl 0x25497000
+ 0: MOVL $0x2548398C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25497000 ($4)
+
+
+
+. 548 25483988 4
+. 48 01 36 79
+==== BB 549 (0x2548398C) approx BBs exec'd 0 ====
+
+ 0x2548398C: 7D2802A6 mflr r9
+ 0: GETL LR, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25483990: 812904F0 lwz r9,1264(r9)
+ 3: GETL R9, t2
+ 4: ADDL $0x4F0, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x25483994: 81090000 lwz r8,0(r9)
+ 8: GETL R9, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R8
+ 11: INCEIPL $4
+
+ 0x25483998: 7C0803A6 mtlr r0
+ 12: GETL R0, t10
+ 13: PUTL t10, LR
+ 14: INCEIPL $4
+
+ 0x2548399C: 28880000 cmpli cr1,r8,0
+ 15: GETL R8, t12
+ 16: MOVL $0x0, t16
+ 17: CMPUL t12, t16, t14 (-rSo)
+ 18: ICRFL t14, $0x1, CR
+ 19: INCEIPL $4
+
+ 0x254839A0: 4186FE44 bc 12,6,0x254837E4
+ 20: Js06o $0x254837E4
+
+
+
+. 549 2548398C 24
+. 7D 28 02 A6 81 29 04 F0 81 09 00 00 7C 08 03 A6 28 88 00 00 41 86 FE 44
+==== BB 550 (0x254839A4) approx BBs exec'd 0 ====
+
+ 0x254839A4: 28880020 cmpli cr1,r8,32
+ 0: GETL R8, t0
+ 1: MOVL $0x20, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254839A8: 4186FEBC bc 12,6,0x25483864
+ 5: Js06o $0x25483864
+
+
+
+. 550 254839A4 8
+. 28 88 00 20 41 86 FE BC
+==== BB 551 (0x25483864) approx BBs exec'd 0 ====
+
+ 0x25483864: 54A506FE rlwinm r5,r5,0,27,31
+ 0: GETL R5, t0
+ 1: ANDL $0x1F, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0x25483868: 7CE02120 mtcrf 0x2,r7
+ 4: GETL R7, t2
+ 5: ICRFL t2, $0x6, CR
+ 6: INCEIPL $4
+
+ 0x2548386C: 54E0C9FF rlwinm. r0,r7,25,7,31
+ 7: GETL R7, t4
+ 8: SHRL $0x7, t4
+ 9: PUTL t4, R0
+ 10: CMP0L t4, t6 (-rSo)
+ 11: ICRFL t6, $0x0, CR
+ 12: INCEIPL $4
+
+ 0x25483870: 7C0903A6 mtctr r0
+ 13: GETL R0, t8
+ 14: PUTL t8, CTR
+ 15: INCEIPL $4
+
+ 0x25483874: 38E00020 li r7,32
+ 16: MOVL $0x20, t10
+ 17: PUTL t10, R7
+ 18: INCEIPL $4
+
+ 0x25483878: 3900FFC0 li r8,-64
+ 19: MOVL $0xFFFFFFC0, t12
+ 20: PUTL t12, R8
+ 21: INCEIPL $4
+
+ 0x2548387C: 28850010 cmpli cr1,r5,16
+ 22: GETL R5, t14
+ 23: MOVL $0x10, t18
+ 24: CMPUL t14, t18, t16 (-rSo)
+ 25: ICRFL t16, $0x1, CR
+ 26: INCEIPL $4
+
+ 0x25483880: 409A000C bc 4,26,0x2548388C
+ 27: Jc26o $0x2548388C
+
+
+
+. 551 25483864 32
+. 54 A5 06 FE 7C E0 21 20 54 E0 C9 FF 7C 09 03 A6 38 E0 00 20 39 00 FF C0 28 85 00 10 40 9A 00 0C
+==== BB 552 (0x2548388C) approx BBs exec'd 0 ====
+
+ 0x2548388C: 3920FFE0 li r9,-32
+ 0: MOVL $0xFFFFFFE0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25483890: 40990010 bc 4,25,0x254838A0
+ 3: Jc25o $0x254838A0
+
+
+
+. 552 2548388C 8
+. 39 20 FF E0 40 99 00 10
+==== BB 553 (0x254838A0) approx BBs exec'd 0 ====
+
+ 0x254838A0: 2A850000 cmpli cr5,r5,0
+ 0: GETL R5, t0
+ 1: MOVL $0x0, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x5, CR
+ 4: INCEIPL $4
+
+ 0x254838A4: 4182007C bc 12,2,0x25483920
+ 5: Js02o $0x25483920
+
+
+
+. 553 254838A0 8
+. 2A 85 00 00 41 82 00 7C
+==== BB 554 (0x254838A8) approx BBs exec'd 0 ====
+
+ 0x254838A8: 7C0037EC dcbz r0,r6
+ 0: GETL R6, t0
+ 1: ANDL $0xFFFFFFE0, t0
+ 2: MOVL $0x0, t2
+ 3: STL t2, (t0)
+ 4: ADDL $0x4, t0
+ 5: STL t2, (t0)
+ 6: ADDL $0x4, t0
+ 7: STL t2, (t0)
+ 8: ADDL $0x4, t0
+ 9: STL t2, (t0)
+ 10: ADDL $0x4, t0
+ 11: STL t2, (t0)
+ 12: ADDL $0x4, t0
+ 13: STL t2, (t0)
+ 14: ADDL $0x4, t0
+ 15: STL t2, (t0)
+ 16: ADDL $0x4, t0
+ 17: STL t2, (t0)
+ 18: INCEIPL $4
+
+ 0x254838AC: 7C0737EC dcbz r7,r6
+ 19: GETL R6, t4
+ 20: GETL R7, t6
+ 21: ADDL t6, t4
+ 22: ANDL $0xFFFFFFE0, t4
+ 23: MOVL $0x0, t8
+ 24: STL t8, (t4)
+ 25: ADDL $0x4, t4
+ 26: STL t8, (t4)
+ 27: ADDL $0x4, t4
+ 28: STL t8, (t4)
+ 29: ADDL $0x4, t4
+ 30: STL t8, (t4)
+ 31: ADDL $0x4, t4
+ 32: STL t8, (t4)
+ 33: ADDL $0x4, t4
+ 34: STL t8, (t4)
+ 35: ADDL $0x4, t4
+ 36: STL t8, (t4)
+ 37: ADDL $0x4, t4
+ 38: STL t8, (t4)
+ 39: INCEIPL $4
+
+ 0x254838B0: 38C60080 addi r6,r6,128
+ 40: GETL R6, t10
+ 41: ADDL $0x80, t10
+ 42: PUTL t10, R6
+ 43: INCEIPL $4
+
+ 0x254838B4: 7C0837EC dcbz r8,r6
+ 44: GETL R6, t12
+ 45: GETL R8, t14
+ 46: ADDL t14, t12
+ 47: ANDL $0xFFFFFFE0, t12
+ 48: MOVL $0x0, t16
+ 49: STL t16, (t12)
+ 50: ADDL $0x4, t12
+ 51: STL t16, (t12)
+ 52: ADDL $0x4, t12
+ 53: STL t16, (t12)
+ 54: ADDL $0x4, t12
+ 55: STL t16, (t12)
+ 56: ADDL $0x4, t12
+ 57: STL t16, (t12)
+ 58: ADDL $0x4, t12
+ 59: STL t16, (t12)
+ 60: ADDL $0x4, t12
+ 61: STL t16, (t12)
+ 62: ADDL $0x4, t12
+ 63: STL t16, (t12)
+ 64: INCEIPL $4
+
+ 0x254838B8: 7C0937EC dcbz r9,r6
+ 65: GETL R6, t18
+ 66: GETL R9, t20
+ 67: ADDL t20, t18
+ 68: ANDL $0xFFFFFFE0, t18
+ 69: MOVL $0x0, t22
+ 70: STL t22, (t18)
+ 71: ADDL $0x4, t18
+ 72: STL t22, (t18)
+ 73: ADDL $0x4, t18
+ 74: STL t22, (t18)
+ 75: ADDL $0x4, t18
+ 76: STL t22, (t18)
+ 77: ADDL $0x4, t18
+ 78: STL t22, (t18)
+ 79: ADDL $0x4, t18
+ 80: STL t22, (t18)
+ 81: ADDL $0x4, t18
+ 82: STL t22, (t18)
+ 83: ADDL $0x4, t18
+ 84: STL t22, (t18)
+ 85: INCEIPL $4
+
+ 0x254838BC: 4200FFEC bc 16,0,0x254838A8
+ 86: GETL CTR, t24
+ 87: ADDL $0xFFFFFFFF, t24
+ 88: PUTL t24, CTR
+ 89: JIFZL t24, $0x254838C0
+ 90: JMPo $0x254838A8 ($4)
+
+
+
+. 554 254838A8 24
+. 7C 00 37 EC 7C 07 37 EC 38 C6 00 80 7C 08 37 EC 7C 09 37 EC 42 00 FF EC
+==== BB 555 (0x254838C0) approx BBs exec'd 0 ====
+
+ 0x254838C0: 4D960020 bclr 12,22
+ 0: GETL LR, t0
+ 1: Js22o-r t0
+
+
+
+. 555 254838C0 4
+. 4D 96 00 20
+==== BB 556 (0x254838C4) approx BBs exec'd 0 ====
+
+ 0x254838C4: 48000060 b 0x25483924
+ 0: JMPo $0x25483924 ($4)
+
+
+
+. 556 254838C4 4
+. 48 00 00 60
+==== BB 557 (0x25483924) approx BBs exec'd 0 ====
+
+ 0x25483924: 7CC62A14 add r6,r6,r5
+ 0: GETL R6, t0
+ 1: GETL R5, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x25483928: 419F0020 bc 12,31,0x25483948
+ 5: Js31o $0x25483948
+
+
+
+. 557 25483924 8
+. 7C C6 2A 14 41 9F 00 20
+==== BB 558 (0x2548392C) approx BBs exec'd 0 ====
+
+ 0x2548392C: 419E0024 bc 12,30,0x25483950
+ 0: Js30o $0x25483950
+
+
+
+. 558 2548392C 4
+. 41 9E 00 24
+==== BB 559 (0x25483930) approx BBs exec'd 0 ====
+
+ 0x25483930: 419D0028 bc 12,29,0x25483958
+ 0: Js29o $0x25483958
+
+
+
+. 559 25483930 4
+. 41 9D 00 28
+==== BB 560 (0x25483958) approx BBs exec'd 0 ====
+
+ 0x25483958: 9486FFFC stwu r4,-4(r6)
+ 0: GETL R4, t0
+ 1: GETL R6, t2
+ 2: ADDL $0xFFFFFFFC, t2
+ 3: PUTL t2, R6
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2548395C: 41840014 bc 12,4,0x25483970
+ 6: Js04o $0x25483970
+
+
+
+. 560 25483958 8
+. 94 86 FF FC 41 84 00 14
+==== BB 561 (0x25483970) approx BBs exec'd 0 ====
+
+ 0x25483970: 4C9C0020 bclr 4,28
+ 0: GETL LR, t0
+ 1: Jc28o-r t0
+
+
+
+. 561 25483970 4
+. 4C 9C 00 20
+==== BB 562 (0x25475A04) approx BBs exec'd 0 ====
+
+ 0x25475A04: 80BD0014 lwz r5,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25475A08: 70A00002 andi. r0,r5,0x2
+ 5: GETL R5, t4
+ 6: ANDL $0x2, t4
+ 7: PUTL t4, R0
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25475A0C: 41820808 bc 12,2,0x25476214
+ 11: Js02o $0x25476214
+
+
+
+. 562 25475A04 12
+. 80 BD 00 14 70 A0 00 02 41 82 08 08
+==== BB 563 (0x25475A10) approx BBs exec'd 0 ====
+
+ 0x25475A10: 7F97E040 cmpl cr7,r23,r28
+ 0: GETL R23, t0
+ 1: GETL R28, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25475A14: 419D06AC bc 12,29,0x254760C0
+ 5: Js29o $0x254760C0
+
+
+
+. 563 25475A10 8
+. 7F 97 E0 40 41 9D 06 AC
+==== BB 564 (0x25475C1C) approx BBs exec'd 0 ====
+
+ 0x25475C1C: 82A10000 lwz r21,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R21
+ 3: INCEIPL $4
+
+ 0x25475C20: 7E419378 or r1,r18,r18
+ 4: GETL R18, t4
+ 5: PUTL t4, R1
+ 6: INCEIPL $4
+
+ 0x25475C24: 92A10000 stw r21,0(r1)
+ 7: GETL R21, t6
+ 8: GETL R1, t8
+ 9: STL t6, (t8)
+ 10: INCEIPL $4
+
+ 0x25475C28: 813A0008 lwz r9,8(r26)
+ 11: GETL R26, t10
+ 12: ADDL $0x8, t10
+ 13: LDL (t10), t12
+ 14: PUTL t12, R9
+ 15: INCEIPL $4
+
+ 0x25475C2C: 2F090000 cmpi cr6,r9,0
+ 16: GETL R9, t14
+ 17: CMP0L t14, t16 (-rSo)
+ 18: ICRFL t16, $0x6, CR
+ 19: INCEIPL $4
+
+ 0x25475C30: 409A0264 bc 4,26,0x25475E94
+ 20: Jc26o $0x25475E94
+
+
+
+. 564 25475C1C 24
+. 82 A1 00 00 7E 41 93 78 92 A1 00 00 81 3A 00 08 2F 09 00 00 40 9A 02 64
+==== BB 565 (0x25475E94) approx BBs exec'd 0 ====
+
+ 0x25475E94: 825A0000 lwz r18,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R18
+ 3: INCEIPL $4
+
+ 0x25475E98: 7D299214 add r9,r9,r18
+ 4: GETL R9, t4
+ 5: GETL R18, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0x25475E9C: 913A0008 stw r9,8(r26)
+ 9: GETL R9, t8
+ 10: GETL R26, t10
+ 11: ADDL $0x8, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25475EA0: 4BFFFD98 b 0x25475C38
+ 14: JMPo $0x25475C38 ($4)
+
+
+
+. 565 25475E94 16
+. 82 5A 00 00 7D 29 92 14 91 3A 00 08 4B FF FD 98
+==== BB 566 (0x25475C38) approx BBs exec'd 0 ====
+
+ 0x25475C38: 2E090000 cmpi cr4,r9,0
+ 0: GETL R9, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25475C3C: 7D2A4B78 or r10,r9,r9
+ 4: GETL R9, t4
+ 5: PUTL t4, R10
+ 6: INCEIPL $4
+
+ 0x25475C40: 41920264 bc 12,18,0x25475EA4
+ 7: Js18o $0x25475EA4
+
+
+
+. 566 25475C38 12
+. 2E 09 00 00 7D 2A 4B 78 41 92 02 64
+==== BB 567 (0x25475C44) approx BBs exec'd 0 ====
+
+ 0x25475C44: 81690000 lwz r11,0(r9)
+ 0: GETL R9, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25475C48: 391A0020 addi r8,r26,32
+ 4: GETL R26, t4
+ 5: ADDL $0x20, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0x25475C4C: 2C0B0000 cmpi cr0,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25475C50: 41820064 bc 12,2,0x25475CB4
+ 12: Js02o $0x25475CB4
+
+
+
+. 567 25475C44 16
+. 81 69 00 00 39 1A 00 20 2C 0B 00 00 41 82 00 64
+==== BB 568 (0x25475C54) approx BBs exec'd 0 ====
+
+ 0x25475C54: 3C607000 lis r3,28672
+ 0: MOVL $0x70000000, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25475C58: 3CE06FFF lis r7,28671
+ 3: MOVL $0x6FFF0000, t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x25475C5C: 3CA06FFF lis r5,28671
+ 6: MOVL $0x6FFF0000, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x25475C60: 3F806FFF lis r28,28671
+ 9: MOVL $0x6FFF0000, t6
+ 10: PUTL t6, R28
+ 11: INCEIPL $4
+
+ 0x25475C64: 3DE06FFF lis r15,28671
+ 12: MOVL $0x6FFF0000, t8
+ 13: PUTL t8, R15
+ 14: INCEIPL $4
+
+ 0x25475C68: 3FA06FFF lis r29,28671
+ 15: MOVL $0x6FFF0000, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0x25475C6C: 60660021 ori r6,r3,0x21
+ 18: MOVL $0x70000021, t12
+ 19: PUTL t12, R6
+ 20: INCEIPL $4
+
+ 0x25475C70: 60E7FFFF ori r7,r7,0xFFFF
+ 21: MOVL $0x6FFFFFFF, t14
+ 22: PUTL t14, R7
+ 23: INCEIPL $4
+
+ 0x25475C74: 60A5FDFF ori r5,r5,0xFDFF
+ 24: MOVL $0x6FFFFDFF, t16
+ 25: PUTL t16, R5
+ 26: INCEIPL $4
+
+ 0x25475C78: 6384FE34 ori r4,r28,0xFE34
+ 27: MOVL $0x6FFFFE34, t18
+ 28: PUTL t18, R4
+ 29: INCEIPL $4
+
+ 0x25475C7C: 61E3FEFF ori r3,r15,0xFEFF
+ 30: MOVL $0x6FFFFEFF, t20
+ 31: PUTL t20, R3
+ 32: INCEIPL $4
+
+ 0x25475C80: 63BDFF40 ori r29,r29,0xFF40
+ 33: MOVL $0x6FFFFF40, t22
+ 34: PUTL t22, R29
+ 35: INCEIPL $4
+
+ 0x25475C84: 2F8B0021 cmpi cr7,r11,33
+ 36: GETL R11, t24
+ 37: MOVL $0x21, t28
+ 38: CMPL t24, t28, t26 (-rSo)
+ 39: ICRFL t26, $0x7, CR
+ 40: INCEIPL $4
+
+ 0x25475C88: 5560103A rlwinm r0,r11,2,0,29
+ 41: GETL R11, t30
+ 42: SHLL $0x2, t30
+ 43: PUTL t30, R0
+ 44: INCEIPL $4
+
+ 0x25475C8C: 409D0018 bc 4,29,0x25475CA4
+ 45: Jc29o $0x25475CA4
+
+
+
+. 568 25475C54 60
+. 3C 60 70 00 3C E0 6F FF 3C A0 6F FF 3F 80 6F FF 3D E0 6F FF 3F A0 6F FF 60 66 00 21 60 E7 FF FF 60 A5 FD FF 63 84 FE 34 61 E3 FE FF 63 BD FF 40 2F 8B 00 21 55 60 10 3A 40 9D 00 18
+==== BB 569 (0x25475CA4) approx BBs exec'd 0 ====
+
+ 0x25475CA4: 7D48012E stwx r10,r8,r0
+ 0: GETL R0, t0
+ 1: GETL R8, t2
+ 2: ADDL t2, t0
+ 3: GETL R10, t4
+ 4: STL t4, (t0)
+ 5: INCEIPL $4
+
+ 0x25475CA8: 856A0008 lwzu r11,8(r10)
+ 6: GETL R10, t6
+ 7: ADDL $0x8, t6
+ 8: PUTL t6, R10
+ 9: LDL (t6), t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x25475CAC: 2F8B0000 cmpi cr7,r11,0
+ 12: GETL R11, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0x25475CB0: 409EFFD4 bc 4,30,0x25475C84
+ 16: Jc30o $0x25475C84
+
+
+
+. 569 25475CA4 16
+. 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
+==== BB 570 (0x25475C84) approx BBs exec'd 0 ====
+
+ 0x25475C84: 2F8B0021 cmpi cr7,r11,33
+ 0: GETL R11, t0
+ 1: MOVL $0x21, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25475C88: 5560103A rlwinm r0,r11,2,0,29
+ 5: GETL R11, t6
+ 6: SHLL $0x2, t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x25475C8C: 409D0018 bc 4,29,0x25475CA4
+ 9: Jc29o $0x25475CA4
+
+
+
+. 570 25475C84 12
+. 2F 8B 00 21 55 60 10 3A 40 9D 00 18
+==== BB 571 (0x25475C90) approx BBs exec'd 0 ====
+
+ 0x25475C90: 7D2B3850 subf r9,r11,r7
+ 0: GETL R11, t0
+ 1: GETL R7, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475C94: 2889000F cmpli cr1,r9,15
+ 5: GETL R9, t4
+ 6: MOVL $0xF, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x25475C98: 418503BC bc 12,5,0x25476054
+ 10: Js05o $0x25476054
+
+
+
+. 571 25475C90 12
+. 7D 2B 38 50 28 89 00 0F 41 85 03 BC
+==== BB 572 (0x25475C9C) approx BBs exec'd 0 ====
+
+ 0x25475C9C: 7C0B3050 subf r0,r11,r6
+ 0: GETL R11, t0
+ 1: GETL R6, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475CA0: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25475CA4: 7D48012E stwx r10,r8,r0
+ 9: GETL R0, t6
+ 10: GETL R8, t8
+ 11: ADDL t8, t6
+ 12: GETL R10, t10
+ 13: STL t10, (t6)
+ 14: INCEIPL $4
+
+ 0x25475CA8: 856A0008 lwzu r11,8(r10)
+ 15: GETL R10, t12
+ 16: ADDL $0x8, t12
+ 17: PUTL t12, R10
+ 18: LDL (t12), t14
+ 19: PUTL t14, R11
+ 20: INCEIPL $4
+
+ 0x25475CAC: 2F8B0000 cmpi cr7,r11,0
+ 21: GETL R11, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x25475CB0: 409EFFD4 bc 4,30,0x25475C84
+ 25: Jc30o $0x25475C84
+
+
+
+. 572 25475C9C 24
+. 7C 0B 30 50 54 00 10 3A 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
+==== BB 573 (0x25475CB4) approx BBs exec'd 0 ====
+
+ 0x25475CB4: 817A0000 lwz r11,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25475CB8: 2C8B0000 cmpi cr1,r11,0
+ 4: GETL R11, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x25475CBC: 418600AC bc 12,6,0x25475D68
+ 8: Js06o $0x25475D68
+
+
+
+. 573 25475CB4 12
+. 81 7A 00 00 2C 8B 00 00 41 86 00 AC
+==== BB 574 (0x25475CC0) approx BBs exec'd 0 ====
+
+ 0x25475CC0: 81280010 lwz r9,16(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475CC4: 2F090000 cmpi cr6,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25475CC8: 419A0010 bc 12,26,0x25475CD8
+ 9: Js26o $0x25475CD8
+
+
+
+. 574 25475CC0 12
+. 81 28 00 10 2F 09 00 00 41 9A 00 10
+==== BB 575 (0x25475CCC) approx BBs exec'd 0 ====
+
+ 0x25475CCC: 81490004 lwz r10,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25475CD0: 7C8A5A14 add r4,r10,r11
+ 5: GETL R10, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25475CD4: 90890004 stw r4,4(r9)
+ 10: GETL R4, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475CD8: 8128000C lwz r9,12(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0xC, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475CDC: 2E090000 cmpi cr4,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x4, CR
+ 23: INCEIPL $4
+
+ 0x25475CE0: 41920010 bc 12,18,0x25475CF0
+ 24: Js18o $0x25475CF0
+
+
+
+. 575 25475CCC 24
+. 81 49 00 04 7C 8A 5A 14 90 89 00 04 81 28 00 0C 2E 09 00 00 41 92 00 10
+==== BB 576 (0x25475CE4) approx BBs exec'd 0 ====
+
+ 0x25475CE4: 82490004 lwz r18,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x25475CE8: 7CD25A14 add r6,r18,r11
+ 5: GETL R18, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x25475CEC: 90C90004 stw r6,4(r9)
+ 10: GETL R6, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475CF0: 81280014 lwz r9,20(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x14, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475CF4: 2C090000 cmpi cr0,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x25475CF8: 41820010 bc 12,2,0x25475D08
+ 24: Js02o $0x25475D08
+
+
+
+. 576 25475CE4 24
+. 82 49 00 04 7C D2 5A 14 90 C9 00 04 81 28 00 14 2C 09 00 00 41 82 00 10
+==== BB 577 (0x25475CFC) approx BBs exec'd 0 ====
+
+ 0x25475CFC: 81E90004 lwz r15,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R15
+ 4: INCEIPL $4
+
+ 0x25475D00: 7FAF5A14 add r29,r15,r11
+ 5: GETL R15, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x25475D04: 93A90004 stw r29,4(r9)
+ 10: GETL R29, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475D08: 81280018 lwz r9,24(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x18, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475D0C: 2F890000 cmpi cr7,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x7, CR
+ 23: INCEIPL $4
+
+ 0x25475D10: 419E0010 bc 12,30,0x25475D20
+ 24: Js30o $0x25475D20
+
+
+
+. 577 25475CFC 24
+. 81 E9 00 04 7F AF 5A 14 93 A9 00 04 81 28 00 18 2F 89 00 00 41 9E 00 10
+==== BB 578 (0x25475D14) approx BBs exec'd 0 ====
+
+ 0x25475D14: 80A90004 lwz r5,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25475D18: 7F855A14 add r28,r5,r11
+ 5: GETL R5, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25475D1C: 93890004 stw r28,4(r9)
+ 10: GETL R28, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475D20: 8128001C lwz r9,28(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x1C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475D24: 2C890000 cmpi cr1,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x1, CR
+ 23: INCEIPL $4
+
+ 0x25475D28: 41860010 bc 12,6,0x25475D38
+ 24: Js06o $0x25475D38
+
+
+
+. 578 25475D14 24
+. 80 A9 00 04 7F 85 5A 14 93 89 00 04 81 28 00 1C 2C 89 00 00 41 86 00 10
+==== BB 579 (0x25475D2C) approx BBs exec'd 0 ====
+
+ 0x25475D2C: 80E90004 lwz r7,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25475D30: 7C675A14 add r3,r7,r11
+ 5: GETL R7, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25475D34: 90690004 stw r3,4(r9)
+ 10: GETL R3, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475D38: 8128005C lwz r9,92(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x5C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475D3C: 2F090000 cmpi cr6,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x6, CR
+ 23: INCEIPL $4
+
+ 0x25475D40: 419A0010 bc 12,26,0x25475D50
+ 24: Js26o $0x25475D50
+
+
+
+. 579 25475D2C 24
+. 80 E9 00 04 7C 67 5A 14 90 69 00 04 81 28 00 5C 2F 09 00 00 41 9A 00 10
+==== BB 580 (0x25475D44) approx BBs exec'd 0 ====
+
+ 0x25475D44: 80090004 lwz r0,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475D48: 7EE05A14 add r23,r0,r11
+ 5: GETL R0, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R23
+ 9: INCEIPL $4
+
+ 0x25475D4C: 92E90004 stw r23,4(r9)
+ 10: GETL R23, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475D50: 812800C4 lwz r9,196(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0xC4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475D54: 2E090000 cmpi cr4,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x4, CR
+ 23: INCEIPL $4
+
+ 0x25475D58: 41920010 bc 12,18,0x25475D68
+ 24: Js18o $0x25475D68
+
+
+
+. 580 25475D44 24
+. 80 09 00 04 7E E0 5A 14 92 E9 00 04 81 28 00 C4 2E 09 00 00 41 92 00 10
+==== BB 581 (0x25475D5C) approx BBs exec'd 0 ====
+
+ 0x25475D5C: 83290004 lwz r25,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x25475D60: 7D995A14 add r12,r25,r11
+ 5: GETL R25, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25475D64: 91890004 stw r12,4(r9)
+ 10: GETL R12, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475D68: 81280078 lwz r9,120(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x78, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475D6C: 2C090000 cmpi cr0,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x25475D70: 41820030 bc 12,2,0x25475DA0
+ 24: Js02o $0x25475DA0
+
+
+
+. 581 25475D5C 24
+. 83 29 00 04 7D 99 5A 14 91 89 00 04 81 28 00 78 2C 09 00 00 41 82 00 30
+==== BB 582 (0x25475DA0) approx BBs exec'd 0 ====
+
+ 0x25475DA0: 81280098 lwz r9,152(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x98, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475DA4: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25475DA8: 419E0354 bc 12,30,0x254760FC
+ 9: Js30o $0x254760FC
+
+
+
+. 582 25475DA0 12
+. 81 28 00 98 2F 89 00 00 41 9E 03 54
+==== BB 583 (0x25475DAC) approx BBs exec'd 0 ====
+
+ 0x25475DAC: 81690004 lwz r11,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25475DB0: 71600001 andi. r0,r11,0x1
+ 5: GETL R11, t4
+ 6: ANDL $0x1, t4
+ 7: PUTL t4, R0
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25475DB4: 917A01FC stw r11,508(r26)
+ 11: GETL R11, t8
+ 12: GETL R26, t10
+ 13: ADDL $0x1FC, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25475DB8: 41820008 bc 12,2,0x25475DC0
+ 16: Js02o $0x25475DC0
+
+
+
+. 583 25475DAC 16
+. 81 69 00 04 71 60 00 01 91 7A 01 FC 41 82 00 08
+==== BB 584 (0x25475DC0) approx BBs exec'd 0 ====
+
+ 0x25475DC0: 81280074 lwz r9,116(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475DC4: 2C890000 cmpi cr1,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25475DC8: 418600E0 bc 12,6,0x25475EA8
+ 9: Js06o $0x25475EA8
+
+
+
+. 584 25475DC0 12
+. 81 28 00 74 2C 89 00 00 41 86 00 E0
+==== BB 585 (0x25475EA8) approx BBs exec'd 0 ====
+
+ 0x25475EA8: 71690040 andi. r9,r11,0x40
+ 0: GETL R11, t0
+ 1: ANDL $0x40, t0
+ 2: PUTL t0, R9
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25475EAC: 408202A4 bc 4,2,0x25476150
+ 6: Jc02o $0x25476150
+
+
+
+. 585 25475EA8 8
+. 71 69 00 40 40 82 02 A4
+==== BB 586 (0x25475EB0) approx BBs exec'd 0 ====
+
+ 0x25475EB0: 813A014C lwz r9,332(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x14C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475EB4: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25475EB8: 419E01CC bc 12,30,0x25476084
+ 9: Js30o $0x25476084
+
+
+
+. 586 25475EB0 12
+. 81 3A 01 4C 2F 89 00 00 41 9E 01 CC
+==== BB 587 (0x25475EBC) approx BBs exec'd 0 ====
+
+ 0x25475EBC: 825A0000 lwz r18,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R18
+ 3: INCEIPL $4
+
+ 0x25475EC0: 7CC99214 add r6,r9,r18
+ 4: GETL R9, t4
+ 5: GETL R18, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x25475EC4: 90DA014C stw r6,332(r26)
+ 9: GETL R6, t8
+ 10: GETL R26, t10
+ 11: ADDL $0x14C, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25475EC8: 80BE04C8 lwz r5,1224(r30)
+ 14: GETL R30, t12
+ 15: ADDL $0x4C8, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R5
+ 18: INCEIPL $4
+
+ 0x25475ECC: 839F00A4 lwz r28,164(r31)
+ 19: GETL R31, t16
+ 20: ADDL $0xA4, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R28
+ 23: INCEIPL $4
+
+ 0x25475ED0: 81E50400 lwz r15,1024(r5)
+ 24: GETL R5, t20
+ 25: ADDL $0x400, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R15
+ 28: INCEIPL $4
+
+ 0x25475ED4: 7F9D7878 andc r29,r28,r15
+ 29: GETL R28, t24
+ 30: GETL R15, t26
+ 31: NOTL t26
+ 32: ANDL t24, t26
+ 33: PUTL t26, R29
+ 34: INCEIPL $4
+
+ 0x25475ED8: 73AB0001 andi. r11,r29,0x1
+ 35: GETL R29, t28
+ 36: ANDL $0x1, t28
+ 37: PUTL t28, R11
+ 38: CMP0L t28, t30 (-rSo)
+ 39: ICRFL t30, $0x0, CR
+ 40: INCEIPL $4
+
+ 0x25475EDC: 408202B0 bc 4,2,0x2547618C
+ 41: Jc02o $0x2547618C
+
+
+
+. 587 25475EBC 36
+. 82 5A 00 00 7C C9 92 14 90 DA 01 4C 80 BE 04 C8 83 9F 00 A4 81 E5 04 00 7F 9D 78 78 73 AB 00 01 40 82 02 B0
+==== BB 588 (0x25475EE0) approx BBs exec'd 0 ====
+
+ 0x25475EE0: 813A0218 lwz r9,536(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x218, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475EE4: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25475EE8: 419E0010 bc 12,30,0x25475EF8
+ 9: Js30o $0x25475EF8
+
+
+
+. 588 25475EE0 12
+. 81 3A 02 18 2F 89 00 00 41 9E 00 10
+==== BB 589 (0x25475EF8) approx BBs exec'd 0 ====
+
+ 0x25475EF8: 7E639B78 or r3,r19,r19
+ 0: GETL R19, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25475EFC: 4800C0F5 bl 0x25481FF0
+ 3: MOVL $0x25475F00, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25481FF0 ($4)
+
+
+
+. 589 25475EF8 8
+. 7E 63 9B 78 48 00 C0 F5
+==== BB 590 close(0x25481FF0) approx BBs exec'd 0 ====
+
+ 0x25481FF0: 38000006 li r0,6
+ 0: MOVL $0x6, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25481FF4: 44000002 sc
+ 3: JMPo-sys $0x25481FF8 ($4)
+
+
+
+. 590 25481FF0 8
+. 38 00 00 06 44 00 00 02
+==== BB 591 (0x25481FF8) approx BBs exec'd 0 ====
+
+ 0x25481FF8: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 591 25481FF8 4
+. 4C A3 00 20
+==== BB 592 (0x25475F00) approx BBs exec'd 0 ====
+
+ 0x25475F00: 811E01C8 lwz r8,456(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25475F04: 2C830000 cmpi cr1,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25475F08: 40A6FB68 bc 5,6,0x25475A70
+ 9: Jc06o $0x25475A70
+
+
+
+. 592 25475F00 12
+. 81 1E 01 C8 2C 83 00 00 40 A6 FB 68
+==== BB 593 (0x25475F0C) approx BBs exec'd 0 ====
+
+ 0x25475F0C: 817A0180 lwz r11,384(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25475F10: 81FF009C lwz r15,156(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x9C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R15
+ 9: INCEIPL $4
+
+ 0x25475F14: 557D0002 rlwinm r29,r11,0,0,1
+ 10: GETL R11, t8
+ 11: ANDL $0xC0000000, t8
+ 12: PUTL t8, R29
+ 13: INCEIPL $4
+
+ 0x25475F18: 69F30002 xori r19,r15,0x2
+ 14: GETL R15, t10
+ 15: XORL $0x2, t10
+ 16: PUTL t10, R19
+ 17: INCEIPL $4
+
+ 0x25475F1C: 21330000 subfic r9,r19,0
+ 18: GETL R19, t12
+ 19: MOVL $0x0, t14
+ 20: SBBL t12, t14 (-wCa)
+ 21: PUTL t14, R9
+ 22: INCEIPL $4
+
+ 0x25475F20: 7E699914 adde r19,r9,r19
+ 23: GETL R9, t16
+ 24: GETL R19, t18
+ 25: ADCL t16, t18 (-rCa-wCa)
+ 26: PUTL t18, R19
+ 27: INCEIPL $4
+
+ 0x25475F24: 6FB24000 xoris r18,r29,0x4000
+ 28: GETL R29, t20
+ 29: XORL $0x40000000, t20
+ 30: PUTL t20, R18
+ 31: INCEIPL $4
+
+ 0x25475F28: 21520000 subfic r10,r18,0
+ 32: GETL R18, t22
+ 33: MOVL $0x0, t24
+ 34: SBBL t22, t24 (-wCa)
+ 35: PUTL t24, R10
+ 36: INCEIPL $4
+
+ 0x25475F2C: 7E4A9114 adde r18,r10,r18
+ 37: GETL R10, t26
+ 38: GETL R18, t28
+ 39: ADCL t26, t28 (-rCa-wCa)
+ 40: PUTL t28, R18
+ 41: INCEIPL $4
+
+ 0x25475F30: 7E4A9839 and. r10,r18,r19
+ 42: GETL R18, t30
+ 43: GETL R19, t32
+ 44: ANDL t30, t32
+ 45: PUTL t32, R10
+ 46: CMP0L t32, t34 (-rSo)
+ 47: ICRFL t34, $0x0, CR
+ 48: INCEIPL $4
+
+ 0x25475F34: 3A60FFFF li r19,-1
+ 49: MOVL $0xFFFFFFFF, t36
+ 50: PUTL t36, R19
+ 51: INCEIPL $4
+
+ 0x25475F38: 408200BC bc 4,2,0x25475FF4
+ 52: Jc02o $0x25475FF4
+
+
+
+. 593 25475F0C 48
+. 81 7A 01 80 81 FF 00 9C 55 7D 00 02 69 F3 00 02 21 33 00 00 7E 69 99 14 6F B2 40 00 21 52 00 00 7E 4A 91 14 7E 4A 98 39 3A 60 FF FF 40 82 00 BC
+==== BB 594 (0x25475F3C) approx BBs exec'd 0 ====
+
+ 0x25475F3C: 807A0150 lwz r3,336(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x150, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25475F40: 80FA0000 lwz r7,0(r26)
+ 5: GETL R26, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R7
+ 8: INCEIPL $4
+
+ 0x25475F44: 7D633A14 add r11,r3,r7
+ 9: GETL R3, t8
+ 10: GETL R7, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0x25475F48: 917A0150 stw r11,336(r26)
+ 14: GETL R11, t12
+ 15: GETL R26, t14
+ 16: ADDL $0x150, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25475F4C: 80B10000 lwz r5,0(r17)
+ 19: GETL R17, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R5
+ 22: INCEIPL $4
+
+ 0x25475F50: 70A90040 andi. r9,r5,0x40
+ 23: GETL R5, t20
+ 24: ANDL $0x40, t20
+ 25: PUTL t20, R9
+ 26: CMP0L t20, t22 (-rSo)
+ 27: ICRFL t22, $0x0, CR
+ 28: INCEIPL $4
+
+ 0x25475F54: 40820278 bc 4,2,0x254761CC
+ 29: Jc02o $0x254761CC
+
+
+
+. 594 25475F3C 28
+. 80 7A 01 50 80 FA 00 00 7D 63 3A 14 91 7A 01 50 80 B1 00 00 70 A9 00 40 40 82 02 78
+==== BB 595 (0x25475F58) approx BBs exec'd 0 ====
+
+ 0x25475F58: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25475F5C: 48002611 bl 0x2547856C
+ 3: MOVL $0x25475F60, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x2547856C ($4)
+
+
+
+. 595 25475F58 8
+. 7F 43 D3 78 48 00 26 11
+==== BB 596 (0x25475F60) approx BBs exec'd 0 ====
+
+ 0x25475F60: 72C00008 andi. r0,r22,0x8
+ 0: GETL R22, t0
+ 1: ANDL $0x8, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25475F64: 40820010 bc 4,2,0x25475F74
+ 6: Jc02o $0x25475F74
+
+
+
+. 596 25475F60 8
+. 72 C0 00 08 40 82 00 10
+==== BB 597 (0x25475F68) approx BBs exec'd 0 ====
+
+ 0x25475F68: 81DA0060 lwz r14,96(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R14
+ 4: INCEIPL $4
+
+ 0x25475F6C: 2F0E0000 cmpi cr6,r14,0
+ 5: GETL R14, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25475F70: 409A02E0 bc 4,26,0x25476250
+ 9: Jc26o $0x25476250
+
+
+
+. 597 25475F68 12
+. 81 DA 00 60 2F 0E 00 00 40 9A 02 E0
+==== BB 598 (0x25475F74) approx BBs exec'd 0 ====
+
+ 0x25475F74: 811A01FC lwz r8,508(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x1FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25475F78: 71090020 andi. r9,r8,0x20
+ 5: GETL R8, t4
+ 6: ANDL $0x20, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25475F7C: 4182000C bc 12,2,0x25475F88
+ 11: Js02o $0x25475F88
+
+
+
+. 598 25475F74 12
+. 81 1A 01 FC 71 09 00 20 41 82 00 0C
+==== BB 599 (0x25475F80) approx BBs exec'd 0 ====
+
+ 0x25475F80: 813E04C8 lwz r9,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475F84: 934901A0 stw r26,416(r9)
+ 5: GETL R26, t4
+ 6: GETL R9, t6
+ 7: ADDL $0x1A0, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25475F88: 80910050 lwz r4,80(r17)
+ 10: GETL R17, t8
+ 11: ADDL $0x50, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0x25475F8C: C81F0028 lfd f0,40(r31)
+ 15: GETL R31, t12
+ 16: ADDL $0x28, t12
+ 17: FPU_RQ (t12), 0x0:0x0
+ 18: INCEIPL $4
+
+ 0x25475F90: 2C840000 cmpi cr1,r4,0
+ 19: GETL R4, t14
+ 20: CMP0L t14, t16 (-rSo)
+ 21: ICRFL t16, $0x1, CR
+ 22: INCEIPL $4
+
+ 0x25475F94: D81A01D0 stfd f0,464(r26)
+ 23: GETL R26, t18
+ 24: ADDL $0x1D0, t18
+ 25: FPU_WQ 0x0:0x0, (t18)
+ 26: INCEIPL $4
+
+ 0x25475F98: C9BF0030 lfd f13,48(r31)
+ 27: GETL R31, t20
+ 28: ADDL $0x30, t20
+ 29: FPU_RQ (t20), 0x0:0xD
+ 30: INCEIPL $4
+
+ 0x25475F9C: D9BA01D8 stfd f13,472(r26)
+ 31: GETL R26, t22
+ 32: ADDL $0x1D8, t22
+ 33: FPU_WQ 0x0:0xD, (t22)
+ 34: INCEIPL $4
+
+ 0x25475FA0: 4186FEB0 bc 12,6,0x25475E50
+ 35: Js06o $0x25475E50
+
+
+
+. 599 25475F80 36
+. 81 3E 04 C8 93 49 01 A0 80 91 00 50 C8 1F 00 28 2C 84 00 00 D8 1A 01 D0 C9 BF 00 30 D9 BA 01 D8 41 86 FE B0
+==== BB 600 (0x25475E50) approx BBs exec'd 0 ====
+
+ 0x25475E50: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25475E54: 4BFFF850 b 0x254756A4
+ 3: JMPo $0x254756A4 ($4)
+
+
+
+. 600 25475E50 8
+. 7F 43 D3 78 4B FF F8 50
+==== BB 601 (0x254756A4) approx BBs exec'd 0 ====
+
+ 0x254756A4: 80A10000 lwz r5,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x254756A8: 83450004 lwz r26,4(r5)
+ 4: GETL R5, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R26
+ 8: INCEIPL $4
+
+ 0x254756AC: 8185FFB4 lwz r12,-76(r5)
+ 9: GETL R5, t8
+ 10: ADDL $0xFFFFFFB4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0x254756B0: 7F4803A6 mtlr r26
+ 14: GETL R26, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x254756B4: 81C5FFB8 lwz r14,-72(r5)
+ 17: GETL R5, t14
+ 18: ADDL $0xFFFFFFB8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R14
+ 21: INCEIPL $4
+
+ 0x254756B8: 81E5FFBC lwz r15,-68(r5)
+ 22: GETL R5, t18
+ 23: ADDL $0xFFFFFFBC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R15
+ 26: INCEIPL $4
+
+ 0x254756BC: 7D808120 mtcrf 0x8,r12
+ 27: GETL R12, t22
+ 28: ICRFL t22, $0x4, CR
+ 29: INCEIPL $4
+
+ 0x254756C0: 8205FFC0 lwz r16,-64(r5)
+ 30: GETL R5, t24
+ 31: ADDL $0xFFFFFFC0, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R16
+ 34: INCEIPL $4
+
+ 0x254756C4: 8225FFC4 lwz r17,-60(r5)
+ 35: GETL R5, t28
+ 36: ADDL $0xFFFFFFC4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R17
+ 39: INCEIPL $4
+
+ 0x254756C8: 8245FFC8 lwz r18,-56(r5)
+ 40: GETL R5, t32
+ 41: ADDL $0xFFFFFFC8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R18
+ 44: INCEIPL $4
+
+ 0x254756CC: 8265FFCC lwz r19,-52(r5)
+ 45: GETL R5, t36
+ 46: ADDL $0xFFFFFFCC, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R19
+ 49: INCEIPL $4
+
+ 0x254756D0: 8285FFD0 lwz r20,-48(r5)
+ 50: GETL R5, t40
+ 51: ADDL $0xFFFFFFD0, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R20
+ 54: INCEIPL $4
+
+ 0x254756D4: 82A5FFD4 lwz r21,-44(r5)
+ 55: GETL R5, t44
+ 56: ADDL $0xFFFFFFD4, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R21
+ 59: INCEIPL $4
+
+ 0x254756D8: 82C5FFD8 lwz r22,-40(r5)
+ 60: GETL R5, t48
+ 61: ADDL $0xFFFFFFD8, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R22
+ 64: INCEIPL $4
+
+ 0x254756DC: 82E5FFDC lwz r23,-36(r5)
+ 65: GETL R5, t52
+ 66: ADDL $0xFFFFFFDC, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R23
+ 69: INCEIPL $4
+
+ 0x254756E0: 8305FFE0 lwz r24,-32(r5)
+ 70: GETL R5, t56
+ 71: ADDL $0xFFFFFFE0, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R24
+ 74: INCEIPL $4
+
+ 0x254756E4: 8325FFE4 lwz r25,-28(r5)
+ 75: GETL R5, t60
+ 76: ADDL $0xFFFFFFE4, t60
+ 77: LDL (t60), t62
+ 78: PUTL t62, R25
+ 79: INCEIPL $4
+
+ 0x254756E8: 8345FFE8 lwz r26,-24(r5)
+ 80: GETL R5, t64
+ 81: ADDL $0xFFFFFFE8, t64
+ 82: LDL (t64), t66
+ 83: PUTL t66, R26
+ 84: INCEIPL $4
+
+ 0x254756EC: 8365FFEC lwz r27,-20(r5)
+ 85: GETL R5, t68
+ 86: ADDL $0xFFFFFFEC, t68
+ 87: LDL (t68), t70
+ 88: PUTL t70, R27
+ 89: INCEIPL $4
+
+ 0x254756F0: 8385FFF0 lwz r28,-16(r5)
+ 90: GETL R5, t72
+ 91: ADDL $0xFFFFFFF0, t72
+ 92: LDL (t72), t74
+ 93: PUTL t74, R28
+ 94: INCEIPL $4
+
+ 0x254756F4: 83A5FFF4 lwz r29,-12(r5)
+ 95: GETL R5, t76
+ 96: ADDL $0xFFFFFFF4, t76
+ 97: LDL (t76), t78
+ 98: PUTL t78, R29
+ 99: INCEIPL $4
+
+ 0x254756F8: 83C5FFF8 lwz r30,-8(r5)
+ 100: GETL R5, t80
+ 101: ADDL $0xFFFFFFF8, t80
+ 102: LDL (t80), t82
+ 103: PUTL t82, R30
+ 104: INCEIPL $4
+
+ 0x254756FC: 83E5FFFC lwz r31,-4(r5)
+ 105: GETL R5, t84
+ 106: ADDL $0xFFFFFFFC, t84
+ 107: LDL (t84), t86
+ 108: PUTL t86, R31
+ 109: INCEIPL $4
+
+ 0x25475700: 7CA12B78 or r1,r5,r5
+ 110: GETL R5, t88
+ 111: PUTL t88, R1
+ 112: INCEIPL $4
+
+ 0x25475704: 4E800020 blr
+ 113: GETL LR, t90
+ 114: JMPo-r t90 ($4)
+
+
+
+. 601 254756A4 100
+. 80 A1 00 00 83 45 00 04 81 85 FF B4 7F 48 03 A6 81 C5 FF B8 81 E5 FF BC 7D 80 81 20 82 05 FF C0 82 25 FF C4 82 45 FF C8 82 65 FF CC 82 85 FF D0 82 A5 FF D4 82 C5 FF D8 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
+==== BB 602 (0x25477054) approx BBs exec'd 0 ====
+
+ 0x25477054: 4BFFFF04 b 0x25476F58
+ 0: JMPo $0x25476F58 ($4)
+
+
+
+. 602 25477054 4
+. 4B FF FF 04
+==== BB 603 (0x25476F58) approx BBs exec'd 0 ====
+
+ 0x25476F58: 83E10294 lwz r31,660(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x294, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x25476F5C: 81810244 lwz r12,580(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x244, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25476F60: 7FE803A6 mtlr r31
+ 10: GETL R31, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0x25476F64: 81C10248 lwz r14,584(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x248, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R14
+ 17: INCEIPL $4
+
+ 0x25476F68: 81E1024C lwz r15,588(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x24C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R15
+ 22: INCEIPL $4
+
+ 0x25476F6C: 7D818120 mtcrf 0x18,r12
+ 23: GETL R12, t18
+ 24: ICRFL t18, $0x3, CR
+ 25: ICRFL t18, $0x4, CR
+ 26: INCEIPL $4
+
+ 0x25476F70: 82010250 lwz r16,592(r1)
+ 27: GETL R1, t20
+ 28: ADDL $0x250, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R16
+ 31: INCEIPL $4
+
+ 0x25476F74: 82210254 lwz r17,596(r1)
+ 32: GETL R1, t24
+ 33: ADDL $0x254, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R17
+ 36: INCEIPL $4
+
+ 0x25476F78: 82410258 lwz r18,600(r1)
+ 37: GETL R1, t28
+ 38: ADDL $0x258, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R18
+ 41: INCEIPL $4
+
+ 0x25476F7C: 8261025C lwz r19,604(r1)
+ 42: GETL R1, t32
+ 43: ADDL $0x25C, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R19
+ 46: INCEIPL $4
+
+ 0x25476F80: 82810260 lwz r20,608(r1)
+ 47: GETL R1, t36
+ 48: ADDL $0x260, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R20
+ 51: INCEIPL $4
+
+ 0x25476F84: 82A10264 lwz r21,612(r1)
+ 52: GETL R1, t40
+ 53: ADDL $0x264, t40
+ 54: LDL (t40), t42
+ 55: PUTL t42, R21
+ 56: INCEIPL $4
+
+ 0x25476F88: 82C10268 lwz r22,616(r1)
+ 57: GETL R1, t44
+ 58: ADDL $0x268, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R22
+ 61: INCEIPL $4
+
+ 0x25476F8C: 82E1026C lwz r23,620(r1)
+ 62: GETL R1, t48
+ 63: ADDL $0x26C, t48
+ 64: LDL (t48), t50
+ 65: PUTL t50, R23
+ 66: INCEIPL $4
+
+ 0x25476F90: 83010270 lwz r24,624(r1)
+ 67: GETL R1, t52
+ 68: ADDL $0x270, t52
+ 69: LDL (t52), t54
+ 70: PUTL t54, R24
+ 71: INCEIPL $4
+
+ 0x25476F94: 83210274 lwz r25,628(r1)
+ 72: GETL R1, t56
+ 73: ADDL $0x274, t56
+ 74: LDL (t56), t58
+ 75: PUTL t58, R25
+ 76: INCEIPL $4
+
+ 0x25476F98: 83410278 lwz r26,632(r1)
+ 77: GETL R1, t60
+ 78: ADDL $0x278, t60
+ 79: LDL (t60), t62
+ 80: PUTL t62, R26
+ 81: INCEIPL $4
+
+ 0x25476F9C: 8361027C lwz r27,636(r1)
+ 82: GETL R1, t64
+ 83: ADDL $0x27C, t64
+ 84: LDL (t64), t66
+ 85: PUTL t66, R27
+ 86: INCEIPL $4
+
+ 0x25476FA0: 83810280 lwz r28,640(r1)
+ 87: GETL R1, t68
+ 88: ADDL $0x280, t68
+ 89: LDL (t68), t70
+ 90: PUTL t70, R28
+ 91: INCEIPL $4
+
+ 0x25476FA4: 83A10284 lwz r29,644(r1)
+ 92: GETL R1, t72
+ 93: ADDL $0x284, t72
+ 94: LDL (t72), t74
+ 95: PUTL t74, R29
+ 96: INCEIPL $4
+
+ 0x25476FA8: 83C10288 lwz r30,648(r1)
+ 97: GETL R1, t76
+ 98: ADDL $0x288, t76
+ 99: LDL (t76), t78
+ 100: PUTL t78, R30
+ 101: INCEIPL $4
+
+ 0x25476FAC: 83E1028C lwz r31,652(r1)
+ 102: GETL R1, t80
+ 103: ADDL $0x28C, t80
+ 104: LDL (t80), t82
+ 105: PUTL t82, R31
+ 106: INCEIPL $4
+
+ 0x25476FB0: 38210290 addi r1,r1,656
+ 107: GETL R1, t84
+ 108: ADDL $0x290, t84
+ 109: PUTL t84, R1
+ 110: INCEIPL $4
+
+ 0x25476FB4: 4E800020 blr
+ 111: GETL LR, t86
+ 112: JMPo-r t86 ($4)
+
+
+
+. 603 25476F58 96
+. 83 E1 02 94 81 81 02 44 7F E8 03 A6 81 C1 02 48 81 E1 02 4C 7D 81 81 20 82 01 02 50 82 21 02 54 82 41 02 58 82 61 02 5C 82 81 02 60 82 A1 02 64 82 C1 02 68 82 E1 02 6C 83 01 02 70 83 21 02 74 83 41 02 78 83 61 02 7C 83 81 02 80 83 A1 02 84 83 C1 02 88 83 E1 02 8C 38 21 02 90 4E 80 00 20
+==== BB 604 (0x254734A8) approx BBs exec'd 0 ====
+
+ 0x254734A8: 809E00D0 lwz r4,208(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xD0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254734AC: 82E30178 lwz r23,376(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x178, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R23
+ 9: INCEIPL $4
+
+ 0x254734B0: 3A770001 addi r19,r23,1
+ 10: GETL R23, t8
+ 11: ADDL $0x1, t8
+ 12: PUTL t8, R19
+ 13: INCEIPL $4
+
+ 0x254734B4: 92630178 stw r19,376(r3)
+ 14: GETL R19, t10
+ 15: GETL R3, t12
+ 16: ADDL $0x178, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x254734B8: 387F0044 addi r3,r31,68
+ 19: GETL R31, t14
+ 20: ADDL $0x44, t14
+ 21: PUTL t14, R3
+ 22: INCEIPL $4
+
+ 0x254734BC: 6A7D0001 xori r29,r19,0x1
+ 23: GETL R19, t16
+ 24: XORL $0x1, t16
+ 25: PUTL t16, R29
+ 26: INCEIPL $4
+
+ 0x254734C0: 23BD0000 subfic r29,r29,0
+ 27: GETL R29, t18
+ 28: MOVL $0x0, t20
+ 29: SBBL t18, t20 (-wCa)
+ 30: PUTL t20, R29
+ 31: INCEIPL $4
+
+ 0x254734C4: 7FB90194 addze r29,r25
+ 32: GETL R25, t22
+ 33: ADCL $0x0, t22 (-rCa-wCa)
+ 34: PUTL t22, R29
+ 35: INCEIPL $4
+
+ 0x254734C8: 4800CE75 bl 0x2548033C
+ 36: MOVL $0x254734CC, t24
+ 37: PUTL t24, LR
+ 38: JMPo-c $0x2548033C ($4)
+
+
+
+. 604 254734A8 36
+. 80 9E 00 D0 82 E3 01 78 3A 77 00 01 92 63 01 78 38 7F 00 44 6A 7D 00 01 23 BD 00 00 7F B9 01 94 48 00 CE 75
+==== BB 605 (0x254734CC) approx BBs exec'd 0 ====
+
+ 0x254734CC: 7FB9EB78 or r25,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R25
+ 2: INCEIPL $4
+
+ 0x254734D0: 7C7D1B79 or. r29,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R29
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x254734D4: 4082FF9C bc 4,2,0x25473470
+ 8: Jc02o $0x25473470
+
+
+
+. 605 254734CC 12
+. 7F B9 EB 78 7C 7D 1B 79 40 82 FF 9C
+==== BB 606 (0x254734D8) approx BBs exec'd 0 ====
+
+ 0x254734D8: 807E003C lwz r3,60(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x3C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254734DC: 38800004 li r4,4
+ 5: MOVL $0x4, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x254734E0: 4800EB51 bl 0x25482030
+ 8: MOVL $0x254734E4, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x25482030 ($4)
+
+
+
+. 606 254734D8 12
+. 80 7E 00 3C 38 80 00 04 48 00 EB 51
+==== BB 607 access(0x25482030) approx BBs exec'd 0 ====
+
+ 0x25482030: 38000021 li r0,33
+ 0: MOVL $0x21, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25482034: 44000002 sc
+ 3: JMPo-sys $0x25482038 ($4)
+
+
+
+. 607 25482030 8
+. 38 00 00 21 44 00 00 02
+==== BB 608 (0x25482038) approx BBs exec'd 0 ====
+
+ 0x25482038: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 608 25482038 4
+. 4C A3 00 20
+==== BB 609 (0x2548203C) approx BBs exec'd 0 ====
+
+ 0x2548203C: 4BFFF2F4 b 0x25481330
+ 0: JMPo $0x25481330 ($4)
+
+
+
+. 609 2548203C 4
+. 4B FF F2 F4
+==== BB 610 __syscall_error(0x25481330) approx BBs exec'd 0 ====
+
+ 0x25481330: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25481334: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x25481338: 48015CC9 bl 0x25497000
+ 9: MOVL $0x2548133C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 610 25481330 12
+. 94 21 FF F0 7D 88 02 A6 48 01 5C C9
+==== BB 611 (0x2548133C) approx BBs exec'd 0 ====
+
+ 0x2548133C: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25481340: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25481344: 7D8803A6 mtlr r12
+ 8: GETL R12, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0x25481348: 813E0514 lwz r9,1300(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x514, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0x2548134C: 83C10008 lwz r30,8(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x8, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0x25481350: 38210010 addi r1,r1,16
+ 21: GETL R1, t16
+ 22: ADDL $0x10, t16
+ 23: PUTL t16, R1
+ 24: INCEIPL $4
+
+ 0x25481354: 90690000 stw r3,0(r9)
+ 25: GETL R3, t18
+ 26: GETL R9, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x25481358: 3860FFFF li r3,-1
+ 29: MOVL $0xFFFFFFFF, t22
+ 30: PUTL t22, R3
+ 31: INCEIPL $4
+
+ 0x2548135C: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+
+. 611 2548133C 36
+. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 81 3E 05 14 83 C1 00 08 38 21 00 10 90 69 00 00 38 60 FF FF 4E 80 00 20
+==== BB 612 (0x254734E4) approx BBs exec'd 0 ====
+
+ 0x254734E4: 2E030000 cmpi cr4,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x254734E8: 4092F2D0 bc 4,18,0x254727B8
+ 4: Jc18o $0x254727B8
+
+
+
+. 612 254734E4 8
+. 2E 03 00 00 40 92 F2 D0
+==== BB 613 (0x254727B8) approx BBs exec'd 0 ====
+
+ 0x254727B8: 2C190000 cmpi cr0,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x254727BC: 408213F0 bc 4,2,0x25473BAC
+ 4: Jc02o $0x25473BAC
+
+
+
+. 613 254727B8 8
+. 2C 19 00 00 40 82 13 F0
+==== BB 614 (0x25473BAC) approx BBs exec'd 0 ====
+
+ 0x25473BAC: 5736103A rlwinm r22,r25,2,0,29
+ 0: GETL R25, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R22
+ 3: INCEIPL $4
+
+ 0x25473BB0: 83A10000 lwz r29,0(r1)
+ 4: GETL R1, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25473BB4: 38D6001E addi r6,r22,30
+ 8: GETL R22, t6
+ 9: ADDL $0x1E, t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0x25473BB8: 39600000 li r11,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0x25473BBC: 54C00036 rlwinm r0,r6,0,0,27
+ 15: GETL R6, t10
+ 16: ANDL $0xFFFFFFF0, t10
+ 17: PUTL t10, R0
+ 18: INCEIPL $4
+
+ 0x25473BC0: 7F4000D0 neg r26,r0
+ 19: GETL R0, t12
+ 20: NEGL t12
+ 21: PUTL t12, R26
+ 22: INCEIPL $4
+
+ 0x25473BC4: 7FA1D16E stwux r29,r1,r26
+ 23: GETL R26, t14
+ 24: GETL R1, t16
+ 25: ADDL t16, t14
+ 26: PUTL t14, R1
+ 27: GETL R29, t18
+ 28: STL t18, (t14)
+ 29: INCEIPL $4
+
+ 0x25473BC8: 3B610017 addi r27,r1,23
+ 30: GETL R1, t20
+ 31: ADDL $0x17, t20
+ 32: PUTL t20, R27
+ 33: INCEIPL $4
+
+ 0x25473BCC: 812E01C4 lwz r9,452(r14)
+ 34: GETL R14, t22
+ 35: ADDL $0x1C4, t22
+ 36: LDL (t22), t24
+ 37: PUTL t24, R9
+ 38: INCEIPL $4
+
+ 0x25473BD0: 577A0036 rlwinm r26,r27,0,0,27
+ 39: GETL R27, t26
+ 40: ANDL $0xFFFFFFF0, t26
+ 41: PUTL t26, R26
+ 42: INCEIPL $4
+
+ 0x25473BD4: 556C103A rlwinm r12,r11,2,0,29
+ 43: GETL R11, t28
+ 44: SHLL $0x2, t28
+ 45: PUTL t28, R12
+ 46: INCEIPL $4
+
+ 0x25473BD8: 396B0001 addi r11,r11,1
+ 47: MOVL $0x1, t30
+ 48: PUTL t30, R11
+ 49: INCEIPL $4
+
+ 0x25473BDC: 7D2CD12E stwx r9,r12,r26
+ 50: GETL R26, t32
+ 51: GETL R12, t34
+ 52: ADDL t34, t32
+ 53: GETL R9, t36
+ 54: STL t36, (t32)
+ 55: INCEIPL $4
+
+ 0x25473BE0: 8129000C lwz r9,12(r9)
+ 56: GETL R9, t38
+ 57: ADDL $0xC, t38
+ 58: LDL (t38), t40
+ 59: PUTL t40, R9
+ 60: INCEIPL $4
+
+ 0x25473BE4: 2F890000 cmpi cr7,r9,0
+ 61: GETL R9, t42
+ 62: CMP0L t42, t44 (-rSo)
+ 63: ICRFL t44, $0x7, CR
+ 64: INCEIPL $4
+
+ 0x25473BE8: 409EFFEC bc 4,30,0x25473BD4
+ 65: Jc30o $0x25473BD4
+
+
+
+. 614 25473BAC 64
+. 57 36 10 3A 83 A1 00 00 38 D6 00 1E 39 60 00 00 54 C0 00 36 7F 40 00 D0 7F A1 D1 6E 3B 61 00 17 81 2E 01 C4 57 7A 00 36 55 6C 10 3A 39 6B 00 01 7D 2C D1 2E 81 29 00 0C 2F 89 00 00 40 9E FF EC
+==== BB 615 (0x25473BEC) approx BBs exec'd 0 ====
+
+ 0x25473BEC: 4BFFEBD4 b 0x254727C0
+ 0: JMPo $0x254727C0 ($4)
+
+
+
+. 615 25473BEC 4
+. 4B FF EB D4
+==== BB 616 (0x254727C0) approx BBs exec'd 0 ====
+
+ 0x254727C0: 817F0030 lwz r11,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254727C4: 38E00000 li r7,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x254727C8: 7F44D378 or r4,r26,r26
+ 8: GETL R26, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x254727CC: 7F25CB78 or r5,r25,r25
+ 11: GETL R25, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0x254727D0: 69660003 xori r6,r11,0x3
+ 14: GETL R11, t10
+ 15: XORL $0x3, t10
+ 16: PUTL t10, R6
+ 17: INCEIPL $4
+
+ 0x254727D4: 20060000 subfic r0,r6,0
+ 18: GETL R6, t12
+ 19: MOVL $0x0, t14
+ 20: SBBL t12, t14 (-wCa)
+ 21: PUTL t14, R0
+ 22: INCEIPL $4
+
+ 0x254727D8: 7CC03114 adde r6,r0,r6
+ 23: GETL R0, t16
+ 24: GETL R6, t18
+ 25: ADCL t16, t18 (-rCa-wCa)
+ 26: PUTL t18, R6
+ 27: INCEIPL $4
+
+ 0x254727DC: 7E83A378 or r3,r20,r20
+ 28: GETL R20, t20
+ 29: PUTL t20, R3
+ 30: INCEIPL $4
+
+ 0x254727E0: 480079E5 bl 0x2547A1C4
+ 31: MOVL $0x254727E4, t22
+ 32: PUTL t22, LR
+ 33: JMPo-c $0x2547A1C4 ($4)
+
+
+
+. 616 254727C0 36
+. 81 7F 00 30 38 E0 00 00 7F 44 D3 78 7F 25 CB 78 69 66 00 03 20 06 00 00 7C C0 31 14 7E 83 A3 78 48 00 79 E5
+==== BB 617 _dl_map_object_deps(0x2547A1C4) approx BBs exec'd 0 ====
+
+ 0x2547A1C4: 9421FF60 stwu r1,-160(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF60, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547A1C8: 7D2802A6 mflr r9
+ 6: GETL LR, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x2547A1CC: 91E1005C stw r15,92(r1)
+ 9: GETL R15, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x5C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547A1D0: 1DE5000C mulli r15,r5,12
+ 14: GETL R5, t10
+ 15: MULL $0xC, t10
+ 16: PUTL t10, R15
+ 17: INCEIPL $4
+
+ 0x2547A1D4: 91C10058 stw r14,88(r1)
+ 18: GETL R14, t12
+ 19: GETL R1, t14
+ 20: ADDL $0x58, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0x2547A1D8: 4801CE29 bl 0x25497000
+ 23: MOVL $0x2547A1DC, t16
+ 24: PUTL t16, LR
+ 25: JMPo-c $0x25497000 ($4)
+
+
+
+. 617 2547A1C4 24
+. 94 21 FF 60 7D 28 02 A6 91 E1 00 5C 1D E5 00 0C 91 C1 00 58 48 01 CE 29
+==== BB 618 (0x2547A1DC) approx BBs exec'd 0 ====
+
+ 0x2547A1DC: 39CF0036 addi r14,r15,54
+ 0: GETL R15, t0
+ 1: ADDL $0x36, t0
+ 2: PUTL t0, R14
+ 3: INCEIPL $4
+
+ 0x2547A1E0: 81410000 lwz r10,0(r1)
+ 4: GETL R1, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0x2547A1E4: 55CC0036 rlwinm r12,r14,0,0,27
+ 8: GETL R14, t6
+ 9: ANDL $0xFFFFFFF0, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x2547A1E8: 93A10094 stw r29,148(r1)
+ 12: GETL R29, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x94, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x2547A1EC: 7D0C00D0 neg r8,r12
+ 17: GETL R12, t12
+ 18: NEGL t12
+ 19: PUTL t12, R8
+ 20: INCEIPL $4
+
+ 0x2547A1F0: 3BA00000 li r29,0
+ 21: MOVL $0x0, t14
+ 22: PUTL t14, R29
+ 23: INCEIPL $4
+
+ 0x2547A1F4: 912100A4 stw r9,164(r1)
+ 24: GETL R9, t16
+ 25: GETL R1, t18
+ 26: ADDL $0xA4, t18
+ 27: STL t16, (t18)
+ 28: INCEIPL $4
+
+ 0x2547A1F8: 7F9D2840 cmpl cr7,r29,r5
+ 29: GETL R29, t20
+ 30: GETL R5, t22
+ 31: CMPUL t20, t22, t24 (-rSo)
+ 32: ICRFL t24, $0x7, CR
+ 33: INCEIPL $4
+
+ 0x2547A1FC: 92E1007C stw r23,124(r1)
+ 34: GETL R23, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x7C, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x2547A200: 7C771B78 or r23,r3,r3
+ 39: GETL R3, t30
+ 40: PUTL t30, R23
+ 41: INCEIPL $4
+
+ 0x2547A204: 93C10098 stw r30,152(r1)
+ 42: GETL R30, t32
+ 43: GETL R1, t34
+ 44: ADDL $0x98, t34
+ 45: STL t32, (t34)
+ 46: INCEIPL $4
+
+ 0x2547A208: 38000000 li r0,0
+ 47: MOVL $0x0, t36
+ 48: PUTL t36, R0
+ 49: INCEIPL $4
+
+ 0x2547A20C: 93E1009C stw r31,156(r1)
+ 50: GETL R31, t38
+ 51: GETL R1, t40
+ 52: ADDL $0x9C, t40
+ 53: STL t38, (t40)
+ 54: INCEIPL $4
+
+ 0x2547A210: 7C3F0B78 or r31,r1,r1
+ 55: GETL R1, t42
+ 56: PUTL t42, R31
+ 57: INCEIPL $4
+
+ 0x2547A214: 92010060 stw r16,96(r1)
+ 58: GETL R16, t44
+ 59: GETL R1, t46
+ 60: ADDL $0x60, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x2547A218: 7FC802A6 mflr r30
+ 63: GETL LR, t48
+ 64: PUTL t48, R30
+ 65: INCEIPL $4
+
+ 0x2547A21C: 92210064 stw r17,100(r1)
+ 66: GETL R17, t50
+ 67: GETL R1, t52
+ 68: ADDL $0x64, t52
+ 69: STL t50, (t52)
+ 70: INCEIPL $4
+
+ 0x2547A220: 7CCF3378 or r15,r6,r6
+ 71: GETL R6, t54
+ 72: PUTL t54, R15
+ 73: INCEIPL $4
+
+ 0x2547A224: 92410068 stw r18,104(r1)
+ 74: GETL R18, t56
+ 75: GETL R1, t58
+ 76: ADDL $0x68, t58
+ 77: STL t56, (t58)
+ 78: INCEIPL $4
+
+ 0x2547A228: 7CEE3B78 or r14,r7,r7
+ 79: GETL R7, t60
+ 80: PUTL t60, R14
+ 81: INCEIPL $4
+
+ 0x2547A22C: 9261006C stw r19,108(r1)
+ 82: GETL R19, t62
+ 83: GETL R1, t64
+ 84: ADDL $0x6C, t64
+ 85: STL t62, (t64)
+ 86: INCEIPL $4
+
+ 0x2547A230: 92810070 stw r20,112(r1)
+ 87: GETL R20, t66
+ 88: GETL R1, t68
+ 89: ADDL $0x70, t68
+ 90: STL t66, (t68)
+ 91: INCEIPL $4
+
+ 0x2547A234: 92A10074 stw r21,116(r1)
+ 92: GETL R21, t70
+ 93: GETL R1, t72
+ 94: ADDL $0x74, t72
+ 95: STL t70, (t72)
+ 96: INCEIPL $4
+
+ 0x2547A238: 92C10078 stw r22,120(r1)
+ 97: GETL R22, t74
+ 98: GETL R1, t76
+ 99: ADDL $0x78, t76
+ 100: STL t74, (t76)
+ 101: INCEIPL $4
+
+ 0x2547A23C: 93010080 stw r24,128(r1)
+ 102: GETL R24, t78
+ 103: GETL R1, t80
+ 104: ADDL $0x80, t80
+ 105: STL t78, (t80)
+ 106: INCEIPL $4
+
+ 0x2547A240: 93210084 stw r25,132(r1)
+ 107: GETL R25, t82
+ 108: GETL R1, t84
+ 109: ADDL $0x84, t84
+ 110: STL t82, (t84)
+ 111: INCEIPL $4
+
+ 0x2547A244: 93410088 stw r26,136(r1)
+ 112: GETL R26, t86
+ 113: GETL R1, t88
+ 114: ADDL $0x88, t88
+ 115: STL t86, (t88)
+ 116: INCEIPL $4
+
+ 0x2547A248: 9361008C stw r27,140(r1)
+ 117: GETL R27, t90
+ 118: GETL R1, t92
+ 119: ADDL $0x8C, t92
+ 120: STL t90, (t92)
+ 121: INCEIPL $4
+
+ 0x2547A24C: 93810090 stw r28,144(r1)
+ 122: GETL R28, t94
+ 123: GETL R1, t96
+ 124: ADDL $0x90, t96
+ 125: STL t94, (t96)
+ 126: INCEIPL $4
+
+ 0x2547A250: 7D41416E stwux r10,r1,r8
+ 127: GETL R8, t98
+ 128: GETL R1, t100
+ 129: ADDL t100, t98
+ 130: PUTL t98, R1
+ 131: GETL R10, t102
+ 132: STL t102, (t98)
+ 133: INCEIPL $4
+
+ 0x2547A254: 39000001 li r8,1
+ 134: MOVL $0x1, t104
+ 135: PUTL t104, R8
+ 136: INCEIPL $4
+
+ 0x2547A258: 81230180 lwz r9,384(r3)
+ 137: GETL R3, t106
+ 138: ADDL $0x180, t106
+ 139: LDL (t106), t108
+ 140: PUTL t108, R9
+ 141: INCEIPL $4
+
+ 0x2547A25C: 38610017 addi r3,r1,23
+ 142: GETL R1, t110
+ 143: ADDL $0x17, t110
+ 144: PUTL t110, R3
+ 145: INCEIPL $4
+
+ 0x2547A260: 546A0036 rlwinm r10,r3,0,0,27
+ 146: GETL R3, t112
+ 147: ANDL $0xFFFFFFF0, t112
+ 148: PUTL t112, R10
+ 149: INCEIPL $4
+
+ 0x2547A264: 5109C94C rlwimi r9,r8,25,5,6
+ 150: GETL R9, t114
+ 151: GETL R8, t116
+ 152: ROLL $0x19, t116
+ 153: ANDL $0x6000000, t116
+ 154: ANDL $0xF9FFFFFF, t114
+ 155: ORL t114, t116
+ 156: PUTL t116, R9
+ 157: INCEIPL $4
+
+ 0x2547A268: 396A000C addi r11,r10,12
+ 158: GETL R10, t118
+ 159: ADDL $0xC, t118
+ 160: PUTL t118, R11
+ 161: INCEIPL $4
+
+ 0x2547A26C: 900A0000 stw r0,0(r10)
+ 162: GETL R0, t120
+ 163: GETL R10, t122
+ 164: STL t120, (t122)
+ 165: INCEIPL $4
+
+ 0x2547A270: 916A0008 stw r11,8(r10)
+ 166: GETL R11, t124
+ 167: GETL R10, t126
+ 168: ADDL $0x8, t126
+ 169: STL t124, (t126)
+ 170: INCEIPL $4
+
+ 0x2547A274: 91370180 stw r9,384(r23)
+ 171: GETL R9, t128
+ 172: GETL R23, t130
+ 173: ADDL $0x180, t130
+ 174: STL t128, (t130)
+ 175: INCEIPL $4
+
+ 0x2547A278: 915F0008 stw r10,8(r31)
+ 176: GETL R10, t132
+ 177: GETL R31, t134
+ 178: ADDL $0x8, t134
+ 179: STL t132, (t134)
+ 180: INCEIPL $4
+
+ 0x2547A27C: 92EA0004 stw r23,4(r10)
+ 181: GETL R23, t136
+ 182: GETL R10, t138
+ 183: ADDL $0x4, t138
+ 184: STL t136, (t138)
+ 185: INCEIPL $4
+
+ 0x2547A280: 911F000C stw r8,12(r31)
+ 186: GETL R8, t140
+ 187: GETL R31, t142
+ 188: ADDL $0xC, t142
+ 189: STL t140, (t142)
+ 190: INCEIPL $4
+
+ 0x2547A284: 409C005C bc 4,28,0x2547A2E0
+ 191: Jc28o $0x2547A2E0
+
+
+
+. 618 2547A1DC 172
+. 39 CF 00 36 81 41 00 00 55 CC 00 36 93 A1 00 94 7D 0C 00 D0 3B A0 00 00 91 21 00 A4 7F 9D 28 40 92 E1 00 7C 7C 77 1B 78 93 C1 00 98 38 00 00 00 93 E1 00 9C 7C 3F 0B 78 92 01 00 60 7F C8 02 A6 92 21 00 64 7C CF 33 78 92 41 00 68 7C EE 3B 78 92 61 00 6C 92 81 00 70 92 A1 00 74 92 C1 00 78 93 01 00 80 93 21 00 84 93 41 00 88 93 61 00 8C 93 81 00 90 7D 41 41 6E 39 00 00 01 81 23 01 80 38 61 00 17 54 6A 00 36 51 09 C9 4C 39 6A 00 0C 90 0A 00 00 91 6A 00 08 91 37 01 80 91 5F 00 08 92 EA 00 04 91 1F 00 0C 40 9C 00 5C
+==== BB 619 (0x2547A288) approx BBs exec'd 0 ====
+
+ 0x2547A288: 7CA903A6 mtctr r5
+ 0: GETL R5, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x2547A28C: 7D475378 or r7,r10,r10
+ 3: GETL R10, t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x2547A290: 38A00000 li r5,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547A294: 38C00001 li r6,1
+ 9: MOVL $0x1, t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0x2547A298: 48000008 b 0x2547A2A0
+ 12: JMPo $0x2547A2A0 ($4)
+
+
+
+. 619 2547A288 20
+. 7C A9 03 A6 7D 47 53 78 38 A0 00 00 38 C0 00 01 48 00 00 08
+==== BB 620 (0x2547A2A0) approx BBs exec'd 0 ====
+
+ 0x2547A2A0: 1E68000C mulli r19,r8,12
+ 0: GETL R8, t0
+ 1: MULL $0xC, t0
+ 2: PUTL t0, R19
+ 3: INCEIPL $4
+
+ 0x2547A2A4: 57B5103A rlwinm r21,r29,2,0,29
+ 4: GETL R29, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R21
+ 7: INCEIPL $4
+
+ 0x2547A2A8: 7E15202E lwzx r16,r21,r4
+ 8: GETL R4, t4
+ 9: GETL R21, t6
+ 10: ADDL t6, t4
+ 11: LDL (t4), t8
+ 12: PUTL t8, R16
+ 13: INCEIPL $4
+
+ 0x2547A2AC: 39280001 addi r9,r8,1
+ 14: GETL R8, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x2547A2B0: 7E533A14 add r18,r19,r7
+ 18: GETL R19, t12
+ 19: GETL R7, t14
+ 20: ADDL t12, t14
+ 21: PUTL t14, R18
+ 22: INCEIPL $4
+
+ 0x2547A2B4: 7CB3392E stwx r5,r19,r7
+ 23: GETL R7, t16
+ 24: GETL R19, t18
+ 25: ADDL t18, t16
+ 26: GETL R5, t20
+ 27: STL t20, (t16)
+ 28: INCEIPL $4
+
+ 0x2547A2B8: 3A92000C addi r20,r18,12
+ 29: GETL R18, t22
+ 30: ADDL $0xC, t22
+ 31: PUTL t22, R20
+ 32: INCEIPL $4
+
+ 0x2547A2BC: 92120004 stw r16,4(r18)
+ 33: GETL R16, t24
+ 34: GETL R18, t26
+ 35: ADDL $0x4, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0x2547A2C0: 92920008 stw r20,8(r18)
+ 38: GETL R20, t28
+ 39: GETL R18, t30
+ 40: ADDL $0x8, t30
+ 41: STL t28, (t30)
+ 42: INCEIPL $4
+
+ 0x2547A2C4: 3BBD0001 addi r29,r29,1
+ 43: GETL R29, t32
+ 44: ADDL $0x1, t32
+ 45: PUTL t32, R29
+ 46: INCEIPL $4
+
+ 0x2547A2C8: 82300180 lwz r17,384(r16)
+ 47: GETL R16, t34
+ 48: ADDL $0x180, t34
+ 49: LDL (t34), t36
+ 50: PUTL t36, R17
+ 51: INCEIPL $4
+
+ 0x2547A2CC: 913F000C stw r9,12(r31)
+ 52: GETL R9, t38
+ 53: GETL R31, t40
+ 54: ADDL $0xC, t40
+ 55: STL t38, (t40)
+ 56: INCEIPL $4
+
+ 0x2547A2D0: 50D1C94C rlwimi r17,r6,25,5,6
+ 57: GETL R17, t42
+ 58: GETL R6, t44
+ 59: ROLL $0x19, t44
+ 60: ANDL $0x6000000, t44
+ 61: ANDL $0xF9FFFFFF, t42
+ 62: ORL t42, t44
+ 63: PUTL t44, R17
+ 64: INCEIPL $4
+
+ 0x2547A2D4: 92300180 stw r17,384(r16)
+ 65: GETL R17, t46
+ 66: GETL R16, t48
+ 67: ADDL $0x180, t48
+ 68: STL t46, (t48)
+ 69: INCEIPL $4
+
+ 0x2547A2D8: 4200FFC4 bc 16,0,0x2547A29C
+ 70: GETL CTR, t50
+ 71: ADDL $0xFFFFFFFF, t50
+ 72: PUTL t50, CTR
+ 73: JIFZL t50, $0x2547A2DC
+ 74: JMPo $0x2547A29C ($4)
+
+
+
+. 620 2547A2A0 60
+. 1E 68 00 0C 57 B5 10 3A 7E 15 20 2E 39 28 00 01 7E 53 3A 14 7C B3 39 2E 3A 92 00 0C 92 12 00 04 92 92 00 08 3B BD 00 01 82 30 01 80 91 3F 00 0C 50 D1 C9 4C 92 30 01 80 42 00 FF C4
+==== BB 621 (0x2547A2DC) approx BBs exec'd 0 ====
+
+ 0x2547A2DC: 7D284B78 or r8,r9,r9
+ 0: GETL R9, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0x2547A2E0: 831F0008 lwz r24,8(r31)
+ 3: GETL R31, t2
+ 4: ADDL $0x8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R24
+ 7: INCEIPL $4
+
+ 0x2547A2E4: 1EC8000C mulli r22,r8,12
+ 8: GETL R8, t6
+ 9: MULL $0xC, t6
+ 10: PUTL t6, R22
+ 11: INCEIPL $4
+
+ 0x2547A2E8: 821E0514 lwz r16,1300(r30)
+ 12: GETL R30, t8
+ 13: ADDL $0x514, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R16
+ 16: INCEIPL $4
+
+ 0x2547A2EC: 3A200000 li r17,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R17
+ 19: INCEIPL $4
+
+ 0x2547A2F0: 7F1BC379 or. r27,r24,r24
+ 20: GETL R24, t14
+ 21: PUTL t14, R27
+ 22: CMP0L t14, t16 (-rSo)
+ 23: ICRFL t16, $0x0, CR
+ 24: INCEIPL $4
+
+ 0x2547A2F4: 7CF6C214 add r7,r22,r24
+ 25: GETL R22, t18
+ 26: GETL R24, t20
+ 27: ADDL t18, t20
+ 28: PUTL t20, R7
+ 29: INCEIPL $4
+
+ 0x2547A2F8: 80900000 lwz r4,0(r16)
+ 30: GETL R16, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R4
+ 33: INCEIPL $4
+
+ 0x2547A2FC: 38A7FFF4 addi r5,r7,-12
+ 34: GETL R7, t26
+ 35: ADDL $0xFFFFFFF4, t26
+ 36: PUTL t26, R5
+ 37: INCEIPL $4
+
+ 0x2547A300: 38C00000 li r6,0
+ 38: MOVL $0x0, t28
+ 39: PUTL t28, R6
+ 40: INCEIPL $4
+
+ 0x2547A304: 7CB32B78 or r19,r5,r5
+ 41: GETL R5, t30
+ 42: PUTL t30, R19
+ 43: INCEIPL $4
+
+ 0x2547A308: 90C50008 stw r6,8(r5)
+ 44: GETL R6, t32
+ 45: GETL R5, t34
+ 46: ADDL $0x8, t34
+ 47: STL t32, (t34)
+ 48: INCEIPL $4
+
+ 0x2547A30C: 923F0034 stw r17,52(r31)
+ 49: GETL R17, t36
+ 50: GETL R31, t38
+ 51: ADDL $0x34, t38
+ 52: STL t36, (t38)
+ 53: INCEIPL $4
+
+ 0x2547A310: 909F0038 stw r4,56(r31)
+ 54: GETL R4, t40
+ 55: GETL R31, t42
+ 56: ADDL $0x38, t42
+ 57: STL t40, (t42)
+ 58: INCEIPL $4
+
+ 0x2547A314: 92300000 stw r17,0(r16)
+ 59: GETL R17, t44
+ 60: GETL R16, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x2547A318: 418202AC bc 12,2,0x2547A5C4
+ 63: Js02o $0x2547A5C4
+
+
+
+. 621 2547A2DC 64
+. 7D 28 4B 78 83 1F 00 08 1E C8 00 0C 82 1E 05 14 3A 20 00 00 7F 1B C3 79 7C F6 C2 14 80 90 00 00 38 A7 FF F4 38 C0 00 00 7C B3 2B 78 90 C5 00 08 92 3F 00 34 90 9F 00 38 92 30 00 00 41 82 02 AC
+==== BB 622 (0x2547A31C) approx BBs exec'd 0 ====
+
+ 0x2547A31C: 835B0004 lwz r26,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547A320: 3B800001 li r28,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x2547A324: 939B0000 stw r28,0(r27)
+ 8: GETL R28, t6
+ 9: GETL R27, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x2547A328: 3B000000 li r24,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R24
+ 14: INCEIPL $4
+
+ 0x2547A32C: 833A0158 lwz r25,344(r26)
+ 15: GETL R26, t12
+ 16: ADDL $0x158, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R25
+ 19: INCEIPL $4
+
+ 0x2547A330: 3AC00000 li r22,0
+ 20: MOVL $0x0, t16
+ 21: PUTL t16, R22
+ 22: INCEIPL $4
+
+ 0x2547A334: 2C990000 cmpi cr1,r25,0
+ 23: GETL R25, t18
+ 24: CMP0L t18, t20 (-rSo)
+ 25: ICRFL t20, $0x1, CR
+ 26: INCEIPL $4
+
+ 0x2547A338: 40860030 bc 4,6,0x2547A368
+ 27: Jc06o $0x2547A368
+
+
+
+. 622 2547A31C 32
+. 83 5B 00 04 3B 80 00 01 93 9B 00 00 3B 00 00 00 83 3A 01 58 3A C0 00 00 2C 99 00 00 40 86 00 30
+==== BB 623 (0x2547A33C) approx BBs exec'd 0 ====
+
+ 0x2547A33C: 807A01E8 lwz r3,488(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x1E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547A340: 7F4BBA78 xor r11,r26,r23
+ 5: GETL R26, t4
+ 6: GETL R23, t6
+ 7: XORL t4, t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x2547A344: 314BFFFF addic r10,r11,-1
+ 10: GETL R11, t8
+ 11: ADCL $0xFFFFFFFF, t8 (-wCa)
+ 12: PUTL t8, R10
+ 13: INCEIPL $4
+
+ 0x2547A348: 7FAA5910 subfe r29,r10,r11
+ 14: GETL R10, t10
+ 15: GETL R11, t12
+ 16: SBBL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0x2547A34C: 21230000 subfic r9,r3,0
+ 19: GETL R3, t14
+ 20: MOVL $0x0, t16
+ 21: SBBL t14, t16 (-wCa)
+ 22: PUTL t16, R9
+ 23: INCEIPL $4
+
+ 0x2547A350: 7C091914 adde r0,r9,r3
+ 24: GETL R9, t18
+ 25: GETL R3, t20
+ 26: ADCL t18, t20 (-rCa-wCa)
+ 27: PUTL t20, R0
+ 28: INCEIPL $4
+
+ 0x2547A354: 7C0BE839 and. r11,r0,r29
+ 29: GETL R0, t22
+ 30: GETL R29, t24
+ 31: ANDL t22, t24
+ 32: PUTL t24, R11
+ 33: CMP0L t24, t26 (-rSo)
+ 34: ICRFL t26, $0x0, CR
+ 35: INCEIPL $4
+
+ 0x2547A358: 41820010 bc 12,2,0x2547A368
+ 36: Js02o $0x2547A368
+
+
+
+. 623 2547A33C 32
+. 80 7A 01 E8 7F 4B BA 78 31 4B FF FF 7F AA 59 10 21 23 00 00 7C 09 19 14 7C 0B E8 39 41 82 00 10
+==== BB 624 (0x2547A368) approx BBs exec'd 0 ====
+
+ 0x2547A368: 82BA0024 lwz r21,36(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x2547A36C: 2F950000 cmpi cr7,r21,0
+ 5: GETL R21, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547A370: 409E001C bc 4,30,0x2547A38C
+ 9: Jc30o $0x2547A38C
+
+
+
+. 624 2547A368 12
+. 82 BA 00 24 2F 95 00 00 40 9E 00 1C
+==== BB 625 (0x2547A38C) approx BBs exec'd 0 ====
+
+ 0x2547A38C: 80DA0034 lwz r6,52(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547A390: 7F72DB78 or r18,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R18
+ 7: INCEIPL $4
+
+ 0x2547A394: 839A0008 lwz r28,8(r26)
+ 8: GETL R26, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0x2547A398: 82A60004 lwz r21,4(r6)
+ 13: GETL R6, t10
+ 14: ADDL $0x4, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R21
+ 17: INCEIPL $4
+
+ 0x2547A39C: 91FF0014 stw r15,20(r31)
+ 18: GETL R15, t14
+ 19: GETL R31, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x2547A3A0: 91DF0018 stw r14,24(r31)
+ 23: GETL R14, t18
+ 24: GETL R31, t20
+ 25: ADDL $0x18, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0x2547A3A4: 813C0000 lwz r9,0(r28)
+ 28: GETL R28, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R9
+ 31: INCEIPL $4
+
+ 0x2547A3A8: 92BF001C stw r21,28(r31)
+ 32: GETL R21, t26
+ 33: GETL R31, t28
+ 34: ADDL $0x1C, t28
+ 35: STL t26, (t28)
+ 36: INCEIPL $4
+
+ 0x2547A3AC: 2F090000 cmpi cr6,r9,0
+ 37: GETL R9, t30
+ 38: CMP0L t30, t32 (-rSo)
+ 39: ICRFL t32, $0x6, CR
+ 40: INCEIPL $4
+
+ 0x2547A3B0: 935F0010 stw r26,16(r31)
+ 41: GETL R26, t34
+ 42: GETL R31, t36
+ 43: ADDL $0x10, t36
+ 44: STL t34, (t36)
+ 45: INCEIPL $4
+
+ 0x2547A3B4: 419A0504 bc 12,26,0x2547A8B8
+ 46: Js26o $0x2547A8B8
+
+
+
+. 625 2547A38C 44
+. 80 DA 00 34 7F 72 DB 78 83 9A 00 08 82 A6 00 04 91 FF 00 14 91 DF 00 18 81 3C 00 00 92 BF 00 1C 2F 09 00 00 93 5F 00 10 41 9A 05 04
+==== BB 626 (0x2547A3B8) approx BBs exec'd 0 ====
+
+ 0x2547A3B8: 3F207FFF lis r25,32767
+ 0: MOVL $0x7FFF0000, t0
+ 1: PUTL t0, R25
+ 2: INCEIPL $4
+
+ 0x2547A3BC: 6327FFFD ori r7,r25,0xFFFD
+ 3: MOVL $0x7FFFFFFD, t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x2547A3C0: 90FF0040 stw r7,64(r31)
+ 6: GETL R7, t4
+ 7: GETL R31, t6
+ 8: ADDL $0x40, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x2547A3C4: 480000BC b 0x2547A480
+ 11: JMPo $0x2547A480 ($4)
+
+
+
+. 626 2547A3B8 16
+. 3F 20 7F FF 63 27 FF FD 90 FF 00 40 48 00 00 BC
+==== BB 627 (0x2547A480) approx BBs exec'd 0 ====
+
+ 0x2547A480: 2F890001 cmpi cr7,r9,1
+ 0: GETL R9, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x2547A484: 419EFF44 bc 12,30,0x2547A3C8
+ 5: Js30o $0x2547A3C8
+
+
+
+. 627 2547A480 8
+. 2F 89 00 01 41 9E FF 44
+==== BB 628 (0x2547A3C8) approx BBs exec'd 0 ====
+
+ 0x2547A3C8: 801C0004 lwz r0,4(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547A3CC: 38800024 li r4,36
+ 5: MOVL $0x24, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x2547A3D0: 7FA0AA14 add r29,r0,r21
+ 8: GETL R0, t6
+ 9: GETL R21, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x2547A3D4: 7FA3EB78 or r3,r29,r29
+ 13: GETL R29, t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0x2547A3D8: 7FB9EB78 or r25,r29,r29
+ 16: GETL R29, t12
+ 17: PUTL t12, R25
+ 18: INCEIPL $4
+
+ 0x2547A3DC: 48008A25 bl 0x25482E00
+ 19: MOVL $0x2547A3E0, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x25482E00 ($4)
+
+
+
+. 628 2547A3C8 24
+. 80 1C 00 04 38 80 00 24 7F A0 AA 14 7F A3 EB 78 7F B9 EB 78 48 00 8A 25
+==== BB 629 (0x2547A3E0) approx BBs exec'd 0 ====
+
+ 0x2547A3E0: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547A3E4: 40860588 bc 4,6,0x2547A96C
+ 4: Jc06o $0x2547A96C
+
+
+
+. 629 2547A3E0 8
+. 2C 83 00 00 40 86 05 88
+==== BB 630 (0x2547A3E8) approx BBs exec'd 0 ====
+
+ 0x2547A3E8: 80BE02F8 lwz r5,760(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x2F8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547A3EC: 387F0030 addi r3,r31,48
+ 5: GETL R31, t4
+ 6: ADDL $0x30, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x2547A3F0: 389F0034 addi r4,r31,52
+ 9: GETL R31, t6
+ 10: ADDL $0x34, t6
+ 11: PUTL t6, R4
+ 12: INCEIPL $4
+
+ 0x2547A3F4: 38DF0010 addi r6,r31,16
+ 13: GETL R31, t8
+ 14: ADDL $0x10, t8
+ 15: PUTL t8, R6
+ 16: INCEIPL $4
+
+ 0x2547A3F8: 93BF0020 stw r29,32(r31)
+ 17: GETL R29, t10
+ 18: GETL R31, t12
+ 19: ADDL $0x20, t12
+ 20: STL t10, (t12)
+ 21: INCEIPL $4
+
+ 0x2547A3FC: 480011A5 bl 0x2547B5A0
+ 22: MOVL $0x2547A400, t14
+ 23: PUTL t14, LR
+ 24: JMPo-c $0x2547B5A0 ($4)
+
+
+
+. 630 2547A3E8 24
+. 80 BE 02 F8 38 7F 00 30 38 9F 00 34 38 DF 00 10 93 BF 00 20 48 00 11 A5
+==== BB 631 _dl_catch_error(0x2547B5A0) approx BBs exec'd 0 ====
+
+ 0x2547B5A0: 9421FD60 stwu r1,-672(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFD60, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547B5A4: 7D4802A6 mflr r10
+ 6: GETL LR, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x2547B5A8: 4801BA59 bl 0x25497000
+ 9: MOVL $0x2547B5AC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 631 2547B5A0 12
+. 94 21 FD 60 7D 48 02 A6 48 01 BA 59
+==== BB 632 (0x2547B5AC) approx BBs exec'd 0 ====
+
+ 0x2547B5AC: 93C10298 stw r30,664(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x298, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547B5B0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547B5B4: 39000000 li r8,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R8
+ 10: INCEIPL $4
+
+ 0x2547B5B8: 914102A4 stw r10,676(r1)
+ 11: GETL R10, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x2A4, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x2547B5BC: 93E1029C stw r31,668(r1)
+ 16: GETL R31, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x29C, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x2547B5C0: 80FE04C8 lwz r7,1224(r30)
+ 21: GETL R30, t16
+ 22: ADDL $0x4C8, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R7
+ 25: INCEIPL $4
+
+ 0x2547B5C4: 91010014 stw r8,20(r1)
+ 26: GETL R8, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x14, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0x2547B5C8: 812701B4 lwz r9,436(r7)
+ 31: GETL R7, t24
+ 32: ADDL $0x1B4, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R9
+ 35: INCEIPL $4
+
+ 0x2547B5CC: 90810274 stw r4,628(r1)
+ 36: GETL R4, t28
+ 37: GETL R1, t30
+ 38: ADDL $0x274, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0x2547B5D0: 7D2903A6 mtctr r9
+ 41: GETL R9, t32
+ 42: PUTL t32, CTR
+ 43: INCEIPL $4
+
+ 0x2547B5D4: 90A10278 stw r5,632(r1)
+ 44: GETL R5, t34
+ 45: GETL R1, t36
+ 46: ADDL $0x278, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0x2547B5D8: 90C1027C stw r6,636(r1)
+ 49: GETL R6, t38
+ 50: GETL R1, t40
+ 51: ADDL $0x27C, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0x2547B5DC: 90610270 stw r3,624(r1)
+ 54: GETL R3, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x270, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0x2547B5E0: 4E800421 bctrl
+ 59: MOVL $0x2547B5E4, t46
+ 60: PUTL t46, LR
+ 61: GETL CTR, t48
+ 62: JMPo-c t48 ($4)
+
+
+
+. 632 2547B5AC 56
+. 93 C1 02 98 7F C8 02 A6 39 00 00 00 91 41 02 A4 93 E1 02 9C 80 FE 04 C8 91 01 00 14 81 27 01 B4 90 81 02 74 7D 29 03 A6 90 A1 02 78 90 C1 02 7C 90 61 02 70 4E 80 04 21
+==== BB 633 _dl_initial_error_catch_tsd(0x2547185C) approx BBs exec'd 0 ====
+
+ 0x2547185C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25471860: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x25471864: 4802579D bl 0x25497000
+ 9: MOVL $0x25471868, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 633 2547185C 12
+. 94 21 FF F0 7D 88 02 A6 48 02 57 9D
+==== BB 634 (0x25471868) approx BBs exec'd 0 ====
+
+ 0x25471868: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547186C: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25471870: 7D8803A6 mtlr r12
+ 8: GETL R12, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0x25471874: 807E0018 lwz r3,24(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x18, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0x25471878: 83C10008 lwz r30,8(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x8, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0x2547187C: 38210010 addi r1,r1,16
+ 21: GETL R1, t16
+ 22: ADDL $0x10, t16
+ 23: PUTL t16, R1
+ 24: INCEIPL $4
+
+ 0x25471880: 4E800020 blr
+ 25: GETL LR, t18
+ 26: JMPo-r t18 ($4)
+
+
+
+. 634 25471868 28
+. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 80 7E 00 18 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 635 (0x2547B5E4) approx BBs exec'd 0 ====
+
+ 0x2547B5E4: 80030000 lwz r0,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547B5E8: 90610280 stw r3,640(r1)
+ 4: GETL R3, t4
+ 5: GETL R1, t6
+ 6: ADDL $0x280, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547B5EC: 38610020 addi r3,r1,32
+ 9: GETL R1, t8
+ 10: ADDL $0x20, t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0x2547B5F0: 90010008 stw r0,8(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x8, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547B5F4: 480072BD bl 0x254828B0
+ 18: MOVL $0x2547B5F8, t14
+ 19: PUTL t14, LR
+ 20: JMPo-c $0x254828B0 ($4)
+
+
+
+. 635 2547B5E4 20
+. 80 03 00 00 90 61 02 80 38 61 00 20 90 01 00 08 48 00 72 BD
+==== BB 636 _setjmp(0x254828B0) approx BBs exec'd 0 ====
+
+ 0x254828B0: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254828B4: 480001DC b 0x25482A90
+ 3: JMPo $0x25482A90 ($4)
+
+
+
+. 636 254828B0 8
+. 38 80 00 00 48 00 01 DC
+==== BB 637 __sigsetjmp(0x25482A90) approx BBs exec'd 0 ====
+
+ 0x25482A90: 90230000 stw r1,0(r3)
+ 0: GETL R1, t0
+ 1: GETL R3, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25482A94: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0x25482A98: 91C3000C stw r14,12(r3)
+ 7: GETL R14, t6
+ 8: GETL R3, t8
+ 9: ADDL $0xC, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25482A9C: D9C30058 stfd f14,88(r3)
+ 12: GETL R3, t10
+ 13: ADDL $0x58, t10
+ 14: FPU_WQ 0x0:0xE, (t10)
+ 15: INCEIPL $4
+
+ 0x25482AA0: 90030008 stw r0,8(r3)
+ 16: GETL R0, t12
+ 17: GETL R3, t14
+ 18: ADDL $0x8, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x25482AA4: 91E30010 stw r15,16(r3)
+ 21: GETL R15, t16
+ 22: GETL R3, t18
+ 23: ADDL $0x10, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25482AA8: D9E30060 stfd f15,96(r3)
+ 26: GETL R3, t20
+ 27: ADDL $0x60, t20
+ 28: FPU_WQ 0x0:0xF, (t20)
+ 29: INCEIPL $4
+
+ 0x25482AAC: 7C000026 mfcr r0
+ 30: GETL CR, t22
+ 31: PUTL t22, R0
+ 32: INCEIPL $4
+
+ 0x25482AB0: 92030014 stw r16,20(r3)
+ 33: GETL R16, t24
+ 34: GETL R3, t26
+ 35: ADDL $0x14, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0x25482AB4: DA030068 stfd f16,104(r3)
+ 38: GETL R3, t28
+ 39: ADDL $0x68, t28
+ 40: FPU_WQ 0x0:0x10, (t28)
+ 41: INCEIPL $4
+
+ 0x25482AB8: 90030054 stw r0,84(r3)
+ 42: GETL R0, t30
+ 43: GETL R3, t32
+ 44: ADDL $0x54, t32
+ 45: STL t30, (t32)
+ 46: INCEIPL $4
+
+ 0x25482ABC: 92230018 stw r17,24(r3)
+ 47: GETL R17, t34
+ 48: GETL R3, t36
+ 49: ADDL $0x18, t36
+ 50: STL t34, (t36)
+ 51: INCEIPL $4
+
+ 0x25482AC0: DA230070 stfd f17,112(r3)
+ 52: GETL R3, t38
+ 53: ADDL $0x70, t38
+ 54: FPU_WQ 0x0:0x11, (t38)
+ 55: INCEIPL $4
+
+ 0x25482AC4: 9243001C stw r18,28(r3)
+ 56: GETL R18, t40
+ 57: GETL R3, t42
+ 58: ADDL $0x1C, t42
+ 59: STL t40, (t42)
+ 60: INCEIPL $4
+
+ 0x25482AC8: DA430078 stfd f18,120(r3)
+ 61: GETL R3, t44
+ 62: ADDL $0x78, t44
+ 63: FPU_WQ 0x0:0x12, (t44)
+ 64: INCEIPL $4
+
+ 0x25482ACC: 92630020 stw r19,32(r3)
+ 65: GETL R19, t46
+ 66: GETL R3, t48
+ 67: ADDL $0x20, t48
+ 68: STL t46, (t48)
+ 69: INCEIPL $4
+
+ 0x25482AD0: DA630080 stfd f19,128(r3)
+ 70: GETL R3, t50
+ 71: ADDL $0x80, t50
+ 72: FPU_WQ 0x0:0x13, (t50)
+ 73: INCEIPL $4
+
+ 0x25482AD4: 92830024 stw r20,36(r3)
+ 74: GETL R20, t52
+ 75: GETL R3, t54
+ 76: ADDL $0x24, t54
+ 77: STL t52, (t54)
+ 78: INCEIPL $4
+
+ 0x25482AD8: DA830088 stfd f20,136(r3)
+ 79: GETL R3, t56
+ 80: ADDL $0x88, t56
+ 81: FPU_WQ 0x0:0x14, (t56)
+ 82: INCEIPL $4
+
+ 0x25482ADC: 92A30028 stw r21,40(r3)
+ 83: GETL R21, t58
+ 84: GETL R3, t60
+ 85: ADDL $0x28, t60
+ 86: STL t58, (t60)
+ 87: INCEIPL $4
+
+ 0x25482AE0: DAA30090 stfd f21,144(r3)
+ 88: GETL R3, t62
+ 89: ADDL $0x90, t62
+ 90: FPU_WQ 0x0:0x15, (t62)
+ 91: INCEIPL $4
+
+ 0x25482AE4: 92C3002C stw r22,44(r3)
+ 92: GETL R22, t64
+ 93: GETL R3, t66
+ 94: ADDL $0x2C, t66
+ 95: STL t64, (t66)
+ 96: INCEIPL $4
+
+ 0x25482AE8: DAC30098 stfd f22,152(r3)
+ 97: GETL R3, t68
+ 98: ADDL $0x98, t68
+ 99: FPU_WQ 0x0:0x16, (t68)
+ 100: INCEIPL $4
+
+ 0x25482AEC: 92E30030 stw r23,48(r3)
+ 101: GETL R23, t70
+ 102: GETL R3, t72
+ 103: ADDL $0x30, t72
+ 104: STL t70, (t72)
+ 105: INCEIPL $4
+
+ 0x25482AF0: DAE300A0 stfd f23,160(r3)
+ 106: GETL R3, t74
+ 107: ADDL $0xA0, t74
+ 108: FPU_WQ 0x0:0x17, (t74)
+ 109: INCEIPL $4
+
+ 0x25482AF4: 93030034 stw r24,52(r3)
+ 110: GETL R24, t76
+ 111: GETL R3, t78
+ 112: ADDL $0x34, t78
+ 113: STL t76, (t78)
+ 114: INCEIPL $4
+
+ 0x25482AF8: DB0300A8 stfd f24,168(r3)
+ 115: GETL R3, t80
+ 116: ADDL $0xA8, t80
+ 117: FPU_WQ 0x0:0x18, (t80)
+ 118: INCEIPL $4
+
+ 0x25482AFC: 93230038 stw r25,56(r3)
+ 119: GETL R25, t82
+ 120: GETL R3, t84
+ 121: ADDL $0x38, t84
+ 122: STL t82, (t84)
+ 123: INCEIPL $4
+
+ 0x25482B00: DB2300B0 stfd f25,176(r3)
+ 124: GETL R3, t86
+ 125: ADDL $0xB0, t86
+ 126: FPU_WQ 0x0:0x19, (t86)
+ 127: INCEIPL $4
+
+ 0x25482B04: 9343003C stw r26,60(r3)
+ 128: GETL R26, t88
+ 129: GETL R3, t90
+ 130: ADDL $0x3C, t90
+ 131: STL t88, (t90)
+ 132: INCEIPL $4
+
+ 0x25482B08: DB4300B8 stfd f26,184(r3)
+ 133: GETL R3, t92
+ 134: ADDL $0xB8, t92
+ 135: FPU_WQ 0x0:0x1A, (t92)
+ 136: INCEIPL $4
+
+ 0x25482B0C: 93630040 stw r27,64(r3)
+ 137: GETL R27, t94
+ 138: GETL R3, t96
+ 139: ADDL $0x40, t96
+ 140: STL t94, (t96)
+ 141: INCEIPL $4
+
+ 0x25482B10: DB6300C0 stfd f27,192(r3)
+ 142: GETL R3, t98
+ 143: ADDL $0xC0, t98
+ 144: FPU_WQ 0x0:0x1B, (t98)
+ 145: INCEIPL $4
+
+ 0x25482B14: 93830044 stw r28,68(r3)
+ 146: GETL R28, t100
+ 147: GETL R3, t102
+ 148: ADDL $0x44, t102
+ 149: STL t100, (t102)
+ 150: INCEIPL $4
+
+ 0x25482B18: DB8300C8 stfd f28,200(r3)
+ 151: GETL R3, t104
+ 152: ADDL $0xC8, t104
+ 153: FPU_WQ 0x0:0x1C, (t104)
+ 154: INCEIPL $4
+
+ 0x25482B1C: 93A30048 stw r29,72(r3)
+ 155: GETL R29, t106
+ 156: GETL R3, t108
+ 157: ADDL $0x48, t108
+ 158: STL t106, (t108)
+ 159: INCEIPL $4
+
+ 0x25482B20: DBA300D0 stfd f29,208(r3)
+ 160: GETL R3, t110
+ 161: ADDL $0xD0, t110
+ 162: FPU_WQ 0x0:0x1D, (t110)
+ 163: INCEIPL $4
+
+ 0x25482B24: 93C3004C stw r30,76(r3)
+ 164: GETL R30, t112
+ 165: GETL R3, t114
+ 166: ADDL $0x4C, t114
+ 167: STL t112, (t114)
+ 168: INCEIPL $4
+
+ 0x25482B28: DBC300D8 stfd f30,216(r3)
+ 169: GETL R3, t116
+ 170: ADDL $0xD8, t116
+ 171: FPU_WQ 0x0:0x1E, (t116)
+ 172: INCEIPL $4
+
+ 0x25482B2C: 93E30050 stw r31,80(r3)
+ 173: GETL R31, t118
+ 174: GETL R3, t120
+ 175: ADDL $0x50, t120
+ 176: STL t118, (t120)
+ 177: INCEIPL $4
+
+ 0x25482B30: DBE300E0 stfd f31,224(r3)
+ 178: GETL R3, t122
+ 179: ADDL $0xE0, t122
+ 180: FPU_WQ 0x0:0x1F, (t122)
+ 181: INCEIPL $4
+
+ 0x25482B34: 7CC802A6 mflr r6
+ 182: GETL LR, t124
+ 183: PUTL t124, R6
+ 184: INCEIPL $4
+
+ 0x25482B38: 480144C9 bl 0x25497000
+ 185: MOVL $0x25482B3C, t126
+ 186: PUTL t126, LR
+ 187: JMPo-c $0x25497000 ($4)
+
+
+
+. 637 25482A90 172
+. 90 23 00 00 7C 08 02 A6 91 C3 00 0C D9 C3 00 58 90 03 00 08 91 E3 00 10 D9 E3 00 60 7C 00 00 26 92 03 00 14 DA 03 00 68 90 03 00 54 92 23 00 18 DA 23 00 70 92 43 00 1C DA 43 00 78 92 63 00 20 DA 63 00 80 92 83 00 24 DA 83 00 88 92 A3 00 28 DA A3 00 90 92 C3 00 2C DA C3 00 98 92 E3 00 30 DA E3 00 A0 93 03 00 34 DB 03 00 A8 93 23 00 38 DB 23 00 B0 93 43 00 3C DB 43 00 B8 93 63 00 40 DB 63 00 C0 93 83 00 44 DB 83 00 C8 93 A3 00 48 DB A3 00 D0 93 C3 00 4C DB C3 00 D8 93 E3 00 50 DB E3 00 E0 7C C8 02 A6 48 01 44 C9
+==== BB 638 (0x25482B3C) approx BBs exec'd 0 ====
+
+ 0x25482B3C: 7CA802A6 mflr r5
+ 0: GETL LR, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x25482B40: 80A504E4 lwz r5,1252(r5)
+ 3: GETL R5, t2
+ 4: ADDL $0x4E4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25482B44: 7CC803A6 mtlr r6
+ 8: GETL R6, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0x25482B48: 80A5003C lwz r5,60(r5)
+ 11: GETL R5, t8
+ 12: ADDL $0x3C, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0x25482B4C: 74A51000 andis. r5,r5,0x1000
+ 16: GETL R5, t12
+ 17: ANDL $0x10000000, t12
+ 18: PUTL t12, R5
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x0, CR
+ 21: INCEIPL $4
+
+ 0x25482B50: 41820158 bc 12,2,0x25482CA8
+ 22: Js02o $0x25482CA8
+
+
+
+. 638 25482B3C 24
+. 7C A8 02 A6 80 A5 04 E4 7C C8 03 A6 80 A5 00 3C 74 A5 10 00 41 82 01 58
+==== BB 639 (0x25482B54) approx BBs exec'd 0 ====
+
+ 0x25482B54: 38A30100 addi r5,r3,256
+ 0: GETL R3, t0
+ 1: ADDL $0x100, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0x25482B58: 70A6000F andi. r6,r5,0xF
+ 4: GETL R5, t2
+ 5: ANDL $0xF, t2
+ 6: PUTL t2, R6
+ 7: CMP0L t2, t4 (-rSo)
+ 8: ICRFL t4, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x25482B5C: 7C0042A6 10: VEC_TRL 2:0x0, t6
+ 11: PUTL t6, R0
+ 12: INCEIPL $4
+
+ 0x25482B60: 900300F8 stw r0,248(r3)
+ 13: GETL R0, t8
+ 14: GETL R3, t10
+ 15: ADDL $0xF8, t10
+ 16: STL t8, (t10)
+ 17: INCEIPL $4
+
+ 0x25482B64: 38C50010 addi r6,r5,16
+ 18: GETL R5, t12
+ 19: ADDL $0x10, t12
+ 20: PUTL t12, R6
+ 21: INCEIPL $4
+
+ 0x25482B68: 41A200E8 bc 13,2,0x25482C50
+ 22: Js02o $0x25482C50
+
+
+
+. 639 25482B54 24
+. 38 A3 01 00 70 A6 00 0F 7C 00 42 A6 90 03 00 F8 38 C5 00 10 41 A2 00 E8
+==== BB 640 (0x25482C50) approx BBs exec'd 0 ====
+
+ 0x25482C50: 7E8029CE stvx vr20,r0,r5
+ 0: GETL R5, t0
+ 1: ANDL $0xFFFFFFF0, t0
+ 2: VEC_WQQ 0x0:0x14, (t0)
+ 3: INCEIPL $4
+
+ 0x25482C54: 38A50020 addi r5,r5,32
+ 4: GETL R5, t2
+ 5: ADDL $0x20, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0x25482C58: 7EA031CE stvx vr21,r0,r6
+ 8: GETL R6, t4
+ 9: ANDL $0xFFFFFFF0, t4
+ 10: VEC_WQQ 0x0:0x15, (t4)
+ 11: INCEIPL $4
+
+ 0x25482C5C: 38C60020 addi r6,r6,32
+ 12: GETL R6, t6
+ 13: ADDL $0x20, t6
+ 14: PUTL t6, R6
+ 15: INCEIPL $4
+
+ 0x25482C60: 7EC029CE stvx vr22,r0,r5
+ 16: GETL R5, t8
+ 17: ANDL $0xFFFFFFF0, t8
+ 18: VEC_WQQ 0x0:0x16, (t8)
+ 19: INCEIPL $4
+
+ 0x25482C64: 38A50020 addi r5,r5,32
+ 20: GETL R5, t10
+ 21: ADDL $0x20, t10
+ 22: PUTL t10, R5
+ 23: INCEIPL $4
+
+ 0x25482C68: 7EE031CE stvx vr23,r0,r6
+ 24: GETL R6, t12
+ 25: ANDL $0xFFFFFFF0, t12
+ 26: VEC_WQQ 0x0:0x17, (t12)
+ 27: INCEIPL $4
+
+ 0x25482C6C: 38C60020 addi r6,r6,32
+ 28: GETL R6, t14
+ 29: ADDL $0x20, t14
+ 30: PUTL t14, R6
+ 31: INCEIPL $4
+
+ 0x25482C70: 7F0029CE stvx vr24,r0,r5
+ 32: GETL R5, t16
+ 33: ANDL $0xFFFFFFF0, t16
+ 34: VEC_WQQ 0x0:0x18, (t16)
+ 35: INCEIPL $4
+
+ 0x25482C74: 38A50020 addi r5,r5,32
+ 36: GETL R5, t18
+ 37: ADDL $0x20, t18
+ 38: PUTL t18, R5
+ 39: INCEIPL $4
+
+ 0x25482C78: 7F2031CE stvx vr25,r0,r6
+ 40: GETL R6, t20
+ 41: ANDL $0xFFFFFFF0, t20
+ 42: VEC_WQQ 0x0:0x19, (t20)
+ 43: INCEIPL $4
+
+ 0x25482C7C: 38C60020 addi r6,r6,32
+ 44: GETL R6, t22
+ 45: ADDL $0x20, t22
+ 46: PUTL t22, R6
+ 47: INCEIPL $4
+
+ 0x25482C80: 7F4029CE stvx vr26,r0,r5
+ 48: GETL R5, t24
+ 49: ANDL $0xFFFFFFF0, t24
+ 50: VEC_WQQ 0x0:0x1A, (t24)
+ 51: INCEIPL $4
+
+ 0x25482C84: 38A50020 addi r5,r5,32
+ 52: GETL R5, t26
+ 53: ADDL $0x20, t26
+ 54: PUTL t26, R5
+ 55: INCEIPL $4
+
+ 0x25482C88: 7F6031CE stvx vr27,r0,r6
+ 56: GETL R6, t28
+ 57: ANDL $0xFFFFFFF0, t28
+ 58: VEC_WQQ 0x0:0x1B, (t28)
+ 59: INCEIPL $4
+
+ 0x25482C8C: 38C60020 addi r6,r6,32
+ 60: GETL R6, t30
+ 61: ADDL $0x20, t30
+ 62: PUTL t30, R6
+ 63: INCEIPL $4
+
+ 0x25482C90: 7F8029CE stvx vr28,r0,r5
+ 64: GETL R5, t32
+ 65: ANDL $0xFFFFFFF0, t32
+ 66: VEC_WQQ 0x0:0x1C, (t32)
+ 67: INCEIPL $4
+
+ 0x25482C94: 38A50020 addi r5,r5,32
+ 68: GETL R5, t34
+ 69: ADDL $0x20, t34
+ 70: PUTL t34, R5
+ 71: INCEIPL $4
+
+ 0x25482C98: 7FA031CE stvx vr29,r0,r6
+ 72: GETL R6, t36
+ 73: ANDL $0xFFFFFFF0, t36
+ 74: VEC_WQQ 0x0:0x1D, (t36)
+ 75: INCEIPL $4
+
+ 0x25482C9C: 38C60020 addi r6,r6,32
+ 76: GETL R6, t38
+ 77: ADDL $0x20, t38
+ 78: PUTL t38, R6
+ 79: INCEIPL $4
+
+ 0x25482CA0: 7FC029CE stvx vr30,r0,r5
+ 80: GETL R5, t40
+ 81: ANDL $0xFFFFFFF0, t40
+ 82: VEC_WQQ 0x0:0x1E, (t40)
+ 83: INCEIPL $4
+
+ 0x25482CA4: 7FE031CE stvx vr31,r0,r6
+ 84: GETL R6, t42
+ 85: ANDL $0xFFFFFFF0, t42
+ 86: VEC_WQQ 0x0:0x1F, (t42)
+ 87: INCEIPL $4
+
+ 0x25482CA8: 4BFFD2F0 b 0x2547FF98
+ 88: JMPo $0x2547FF98 ($4)
+
+
+
+. 640 25482C50 92
+. 7E 80 29 CE 38 A5 00 20 7E A0 31 CE 38 C6 00 20 7E C0 29 CE 38 A5 00 20 7E E0 31 CE 38 C6 00 20 7F 00 29 CE 38 A5 00 20 7F 20 31 CE 38 C6 00 20 7F 40 29 CE 38 A5 00 20 7F 60 31 CE 38 C6 00 20 7F 80 29 CE 38 A5 00 20 7F A0 31 CE 38 C6 00 20 7F C0 29 CE 7F E0 31 CE 4B FF D2 F0
+==== BB 641 __sigjmp_save(0x2547FF98) approx BBs exec'd 0 ====
+
+ 0x2547FF98: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547FF9C: 38000000 li r0,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547FFA0: 900301C0 stw r0,448(r3)
+ 9: GETL R0, t6
+ 10: GETL R3, t8
+ 11: ADDL $0x1C0, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547FFA4: 38210010 addi r1,r1,16
+ 14: GETL R1, t10
+ 15: ADDL $0x10, t10
+ 16: PUTL t10, R1
+ 17: INCEIPL $4
+
+ 0x2547FFA8: 38600000 li r3,0
+ 18: MOVL $0x0, t12
+ 19: PUTL t12, R3
+ 20: INCEIPL $4
+
+ 0x2547FFAC: 4E800020 blr
+ 21: GETL LR, t14
+ 22: JMPo-r t14 ($4)
+
+
+
+. 641 2547FF98 24
+. 94 21 FF F0 38 00 00 00 90 03 01 C0 38 21 00 10 38 60 00 00 4E 80 00 20
+==== BB 642 (0x2547B5F8) approx BBs exec'd 0 ====
+
+ 0x2547B5F8: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547B5FC: 8061027C lwz r3,636(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x27C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547B600: 7FEAFB78 or r10,r31,r31
+ 10: GETL R31, t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x2547B604: 2F9FFFFF cmpi cr7,r31,-1
+ 13: GETL R31, t10
+ 14: MOVL $0xFFFFFFFF, t14
+ 15: CMPL t10, t14, t12 (-rSo)
+ 16: ICRFL t12, $0x7, CR
+ 17: INCEIPL $4
+
+ 0x2547B608: 40820054 bc 4,2,0x2547B65C
+ 18: Jc02o $0x2547B65C
+
+
+
+. 642 2547B5F8 20
+. 7C 7F 1B 79 80 61 02 7C 7F EA FB 78 2F 9F FF FF 40 82 00 54
+==== BB 643 (0x2547B60C) approx BBs exec'd 0 ====
+
+ 0x2547B60C: 81210280 lwz r9,640(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x280, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547B610: 38010010 addi r0,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547B614: 81810278 lwz r12,632(r1)
+ 9: GETL R1, t6
+ 10: ADDL $0x278, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0x2547B618: 90090000 stw r0,0(r9)
+ 14: GETL R0, t10
+ 15: GETL R9, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547B61C: 7D8903A6 mtctr r12
+ 18: GETL R12, t14
+ 19: PUTL t14, CTR
+ 20: INCEIPL $4
+
+ 0x2547B620: 4E800421 bctrl
+ 21: MOVL $0x2547B624, t16
+ 22: PUTL t16, LR
+ 23: GETL CTR, t18
+ 24: JMPo-c t18 ($4)
+
+
+
+. 643 2547B60C 24
+. 81 21 02 80 38 01 00 10 81 81 02 78 90 09 00 00 7D 89 03 A6 4E 80 04 21
+==== BB 644 openaux(0x2547A0BC) approx BBs exec'd 0 ====
+
+ 0x2547A0BC: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547A0C0: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547A0C4: 93E10008 stw r31,8(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547A0C8: 7C7F1B78 or r31,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0x2547A0CC: 38A00000 li r5,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R5
+ 19: INCEIPL $4
+
+ 0x2547A0D0: 90810014 stw r4,20(r1)
+ 20: GETL R4, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x2547A0D4: 80630000 lwz r3,0(r3)
+ 25: GETL R3, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0x2547A0D8: 809F0010 lwz r4,16(r31)
+ 29: GETL R31, t22
+ 30: ADDL $0x10, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R4
+ 33: INCEIPL $4
+
+ 0x2547A0DC: 80030180 lwz r0,384(r3)
+ 34: GETL R3, t26
+ 35: ADDL $0x180, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R0
+ 38: INCEIPL $4
+
+ 0x2547A0E0: 7409C000 andis. r9,r0,0xC000
+ 39: GETL R0, t30
+ 40: ANDL $0xC0000000, t30
+ 41: PUTL t30, R9
+ 42: CMP0L t30, t32 (-rSo)
+ 43: ICRFL t32, $0x0, CR
+ 44: INCEIPL $4
+
+ 0x2547A0E4: 540617BE rlwinm r6,r0,2,30,31
+ 45: GETL R0, t34
+ 46: SHRL $0x1E, t34
+ 47: PUTL t34, R6
+ 48: INCEIPL $4
+
+ 0x2547A0E8: 40820008 bc 4,2,0x2547A0F0
+ 49: Jc02o $0x2547A0F0
+
+
+
+. 644 2547A0BC 48
+. 7C 88 02 A6 94 21 FF F0 93 E1 00 08 7C 7F 1B 78 38 A0 00 00 90 81 00 14 80 63 00 00 80 9F 00 10 80 03 01 80 74 09 C0 00 54 06 17 BE 40 82 00 08
+==== BB 645 (0x2547A0EC) approx BBs exec'd 0 ====
+
+ 0x2547A0EC: 38C00001 li r6,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x2547A0F0: 80FF0004 lwz r7,4(r31)
+ 3: GETL R31, t2
+ 4: ADDL $0x4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x2547A0F4: 811F0008 lwz r8,8(r31)
+ 8: GETL R31, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R8
+ 12: INCEIPL $4
+
+ 0x2547A0F8: 81230018 lwz r9,24(r3)
+ 13: GETL R3, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x2547A0FC: 4BFFCBED bl 0x25476CE8
+ 18: MOVL $0x2547A100, t14
+ 19: PUTL t14, LR
+ 20: JMPo-c $0x25476CE8 ($4)
+
+
+
+. 645 2547A0EC 20
+. 38 C0 00 01 80 FF 00 04 81 1F 00 08 81 23 00 18 4B FF CB ED
+==== BB 646 (0x25482FA8) approx BBs exec'd 0 ====
+
+ 0x25482FA8: 8CA30001 lbzu r5,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25482FAC: 8CC40001 lbzu r6,1(r4)
+ 6: GETL R4, t4
+ 7: ADDL $0x1, t4
+ 8: PUTL t4, R4
+ 9: LDB (t4), t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0x25482FB0: 2C850000 cmpi cr1,r5,0
+ 12: GETL R5, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x1, CR
+ 15: INCEIPL $4
+
+ 0x25482FB4: 7C053000 cmp cr0,r5,r6
+ 16: GETL R5, t12
+ 17: GETL R6, t14
+ 18: CMPL t12, t14, t16 (-rSo)
+ 19: ICRFL t16, $0x0, CR
+ 20: INCEIPL $4
+
+ 0x25482FB8: 4086FFD4 bc 4,6,0x25482F8C
+ 21: Jc06o $0x25482F8C
+
+
+
+. 646 25482FA8 20
+. 8C A3 00 01 8C C4 00 01 2C 85 00 00 7C 05 30 00 40 86 FF D4
+==== BB 647 (0x25482F8C) approx BBs exec'd 0 ====
+
+ 0x25482F8C: 8CA30001 lbzu r5,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25482F90: 40820034 bc 4,2,0x25482FC4
+ 6: Jc02o $0x25482FC4
+
+
+
+. 647 25482F8C 8
+. 8C A3 00 01 40 82 00 34
+==== BB 648 (0x25482FC4) approx BBs exec'd 0 ====
+
+ 0x25482FC4: 88A3FFFF lbz r5,-1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25482FC8: 7C662850 subf r3,r6,r5
+ 5: GETL R6, t4
+ 6: GETL R5, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25482FCC: 4E800020 blr
+ 10: GETL LR, t8
+ 11: JMPo-r t8 ($4)
+
+
+
+. 648 25482FC4 12
+. 88 A3 FF FF 7C 66 28 50 4E 80 00 20
+==== BB 649 (0x2547706C) approx BBs exec'd 0 ====
+
+ 0x2547706C: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25477070: 4800BF61 bl 0x25482FD0
+ 3: MOVL $0x25477074, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25482FD0 ($4)
+
+
+
+. 649 2547706C 8
+. 7F E3 FB 78 48 00 BF 61
+==== BB 650 (0x25477074) approx BBs exec'd 0 ====
+
+ 0x25477074: 83540000 lwz r26,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R26
+ 3: INCEIPL $4
+
+ 0x25477078: 3AC30001 addi r22,r3,1
+ 4: GETL R3, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R22
+ 7: INCEIPL $4
+
+ 0x2547707C: 73490001 andi. r9,r26,0x1
+ 8: GETL R26, t6
+ 9: ANDL $0x1, t6
+ 10: PUTL t6, R9
+ 11: CMP0L t6, t8 (-rSo)
+ 12: ICRFL t8, $0x0, CR
+ 13: INCEIPL $4
+
+ 0x25477080: 408203C4 bc 4,2,0x25477444
+ 14: Jc02o $0x25477444
+
+
+
+. 650 25477074 16
+. 83 54 00 00 3A C3 00 01 73 49 00 01 40 82 03 C4
+==== BB 651 (0x25477084) approx BBs exec'd 0 ====
+
+ 0x25477084: 3B40FFFF li r26,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R26
+ 2: INCEIPL $4
+
+ 0x25477088: 418E0020 bc 12,14,0x254770A8
+ 3: Js14o $0x254770A8
+
+
+
+. 651 25477084 8
+. 3B 40 FF FF 41 8E 00 20
+==== BB 652 (0x2547708C) approx BBs exec'd 0 ====
+
+ 0x2547708C: 839B0094 lwz r28,148(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x94, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x25477090: 7F6CFE70 srawi r12,r27,31
+ 5: GETL R27, t4
+ 6: SARL $0x1F, t4 (-wCa)
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x25477094: 7D9DDA78 xor r29,r12,r27
+ 9: GETL R12, t6
+ 10: GETL R27, t8
+ 11: XORL t6, t8
+ 12: PUTL t8, R29
+ 13: INCEIPL $4
+
+ 0x25477098: 2E1AFFFF cmpi cr4,r26,-1
+ 14: GETL R26, t10
+ 15: MOVL $0xFFFFFFFF, t14
+ 16: CMPL t10, t14, t12 (-rSo)
+ 17: ICRFL t12, $0x4, CR
+ 18: INCEIPL $4
+
+ 0x2547709C: 2F9C0000 cmpi cr7,r28,0
+ 19: GETL R28, t16
+ 20: CMP0L t16, t18 (-rSo)
+ 21: ICRFL t18, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x254770A0: 7DCCE850 subf r14,r12,r29
+ 23: GETL R12, t20
+ 24: GETL R29, t22
+ 25: SUBL t20, t22
+ 26: PUTL t22, R14
+ 27: INCEIPL $4
+
+ 0x254770A4: 409E016C bc 4,30,0x25477210
+ 28: Jc30o $0x25477210
+
+
+
+. 652 2547708C 28
+. 83 9B 00 94 7F 6C FE 70 7D 9D DA 78 2E 1A FF FF 2F 9C 00 00 7D CC E8 50 40 9E 01 6C
+==== BB 653 (0x254770A8) approx BBs exec'd 0 ====
+
+ 0x254770A8: 2C9B0000 cmpi cr1,r27,0
+ 0: GETL R27, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x254770AC: 7F65FE70 srawi r5,r27,31
+ 4: GETL R27, t4
+ 5: SARL $0x1F, t4 (-wCa)
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x254770B0: 7CA0DA78 xor r0,r5,r27
+ 8: GETL R5, t6
+ 9: GETL R27, t8
+ 10: XORL t6, t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x254770B4: 7F7DDB78 or r29,r27,r27
+ 13: GETL R27, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0x254770B8: 7DC50050 subf r14,r5,r0
+ 16: GETL R5, t12
+ 17: GETL R0, t14
+ 18: SUBL t12, t14
+ 19: PUTL t14, R14
+ 20: INCEIPL $4
+
+ 0x254770BC: 41860370 bc 12,6,0x2547742C
+ 21: Js06o $0x2547742C
+
+
+
+. 653 254770A8 24
+. 2C 9B 00 00 7F 65 FE 70 7C A0 DA 78 7F 7D DB 78 7D C5 00 50 41 86 03 70
+==== BB 654 (0x254770C0) approx BBs exec'd 0 ====
+
+ 0x254770C0: 825E019C lwz r18,412(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x19C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x254770C4: 39E0FFFF li r15,-1
+ 5: MOVL $0xFFFFFFFF, t4
+ 6: PUTL t4, R15
+ 7: INCEIPL $4
+
+ 0x254770C8: 48000024 b 0x254770EC
+ 8: JMPo $0x254770EC ($4)
+
+
+
+. 654 254770C0 12
+. 82 5E 01 9C 39 E0 FF FF 48 00 00 24
+==== BB 655 (0x254770EC) approx BBs exec'd 0 ====
+
+ 0x254770EC: 807D018C lwz r3,396(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x18C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254770F0: 3B9D018C addi r28,r29,396
+ 5: GETL R29, t4
+ 6: ADDL $0x18C, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x254770F4: 38000000 li r0,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0x254770F8: 2E03FFFF cmpi cr4,r3,-1
+ 12: GETL R3, t8
+ 13: MOVL $0xFFFFFFFF, t12
+ 14: CMPL t8, t12, t10 (-rSo)
+ 15: ICRFL t10, $0x4, CR
+ 16: INCEIPL $4
+
+ 0x254770FC: 2F030000 cmpi cr6,r3,0
+ 17: GETL R3, t14
+ 18: CMP0L t14, t16 (-rSo)
+ 19: ICRFL t16, $0x6, CR
+ 20: INCEIPL $4
+
+ 0x25477100: 4192002C bc 12,18,0x2547712C
+ 21: Js18o $0x2547712C
+
+
+
+. 655 254770EC 24
+. 80 7D 01 8C 3B 9D 01 8C 38 00 00 00 2E 03 FF FF 2F 03 00 00 41 92 00 2C
+==== BB 656 (0x2547712C) approx BBs exec'd 0 ====
+
+ 0x2547712C: 2C000000 cmpi cr0,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25477130: 7F86E378 or r6,r28,r28
+ 4: GETL R28, t4
+ 5: PUTL t4, R6
+ 6: INCEIPL $4
+
+ 0x25477134: 7FE3FB78 or r3,r31,r31
+ 7: GETL R31, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25477138: 7EC4B378 or r4,r22,r22
+ 10: GETL R22, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x2547713C: 7EE5BB78 or r5,r23,r23
+ 13: GETL R23, t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0x25477140: 38E10228 addi r7,r1,552
+ 16: GETL R1, t12
+ 17: ADDL $0x228, t12
+ 18: PUTL t12, R7
+ 19: INCEIPL $4
+
+ 0x25477144: 39010018 addi r8,r1,24
+ 20: GETL R1, t14
+ 21: ADDL $0x18, t14
+ 22: PUTL t14, R8
+ 23: INCEIPL $4
+
+ 0x25477148: 4182FF84 bc 12,2,0x254770CC
+ 24: Js02o $0x254770CC
+
+
+
+. 656 2547712C 32
+. 2C 00 00 00 7F 86 E3 78 7F E3 FB 78 7E C4 B3 78 7E E5 BB 78 38 E1 02 28 39 01 00 18 41 82 FF 84
+==== BB 657 (0x254770CC) approx BBs exec'd 0 ====
+
+ 0x254770CC: 2E1AFFFF cmpi cr4,r26,-1
+ 0: GETL R26, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x254770D0: 83BD0168 lwz r29,360(r29)
+ 5: GETL R29, t6
+ 6: ADDL $0x168, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R29
+ 9: INCEIPL $4
+
+ 0x254770D4: 313DFFFF addic r9,r29,-1
+ 10: GETL R29, t10
+ 11: ADCL $0xFFFFFFFF, t10 (-wCa)
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0x254770D8: 7CC9E910 subfe r6,r9,r29
+ 14: GETL R9, t12
+ 15: GETL R29, t14
+ 16: SBBL t12, t14 (-rCa-wCa)
+ 17: PUTL t14, R6
+ 18: INCEIPL $4
+
+ 0x254770DC: 7D200026 mfcr r9
+ 19: GETL CR, t16
+ 20: PUTL t16, R9
+ 21: INCEIPL $4
+
+ 0x254770E0: 55299FFE rlwinm r9,r9,19,31,31
+ 22: GETL R9, t18
+ 23: ROLL $0x13, t18
+ 24: ANDL $0x1, t18
+ 25: PUTL t18, R9
+ 26: INCEIPL $4
+
+ 0x254770E4: 7D2B3039 and. r11,r9,r6
+ 27: GETL R9, t20
+ 28: GETL R6, t22
+ 29: ANDL t20, t22
+ 30: PUTL t22, R11
+ 31: CMP0L t22, t24 (-rSo)
+ 32: ICRFL t24, $0x0, CR
+ 33: INCEIPL $4
+
+ 0x254770E8: 418200B0 bc 12,2,0x25477198
+ 34: Js02o $0x25477198
+
+
+
+. 657 254770CC 32
+. 2E 1A FF FF 83 BD 01 68 31 3D FF FF 7C C9 E9 10 7D 20 00 26 55 29 9F FE 7D 2B 30 39 41 82 00 B0
+==== BB 658 (0x25477198) approx BBs exec'd 0 ====
+
+ 0x25477198: 409200A8 bc 4,18,0x25477240
+ 0: Jc18o $0x25477240
+
+
+
+. 658 25477198 4
+. 40 92 00 A8
+==== BB 659 (0x2547719C) approx BBs exec'd 0 ====
+
+ 0x2547719C: 80B50000 lwz r5,0(r21)
+ 0: GETL R21, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x254771A0: 2F850000 cmpi cr7,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0x254771A4: 419E0068 bc 12,30,0x2547720C
+ 8: Js30o $0x2547720C
+
+
+
+. 659 2547719C 12
+. 80 B5 00 00 2F 85 00 00 41 9E 00 68
+==== BB 660 (0x254771A8) approx BBs exec'd 0 ====
+
+ 0x254771A8: 83A50180 lwz r29,384(r5)
+ 0: GETL R5, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254771AC: 7CAADA78 xor r10,r5,r27
+ 5: GETL R5, t4
+ 6: GETL R27, t6
+ 7: XORL t4, t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x254771B0: 300AFFFF addic r0,r10,-1
+ 10: GETL R10, t8
+ 11: ADCL $0xFFFFFFFF, t8 (-wCa)
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x254771B4: 7D005110 subfe r8,r0,r10
+ 14: GETL R0, t10
+ 15: GETL R10, t12
+ 16: SBBL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R8
+ 18: INCEIPL $4
+
+ 0x254771B8: 57BC0002 rlwinm r28,r29,0,0,1
+ 19: GETL R29, t14
+ 20: ANDL $0xC0000000, t14
+ 21: PUTL t14, R28
+ 22: INCEIPL $4
+
+ 0x254771BC: 6F928000 xoris r18,r28,0x8000
+ 23: GETL R28, t16
+ 24: XORL $0x80000000, t16
+ 25: PUTL t16, R18
+ 26: INCEIPL $4
+
+ 0x254771C0: 3132FFFF addic r9,r18,-1
+ 27: GETL R18, t18
+ 28: ADCL $0xFFFFFFFF, t18 (-wCa)
+ 29: PUTL t18, R9
+ 30: INCEIPL $4
+
+ 0x254771C4: 7DE99110 subfe r15,r9,r18
+ 31: GETL R9, t20
+ 32: GETL R18, t22
+ 33: SBBL t20, t22 (-rCa-wCa)
+ 34: PUTL t22, R15
+ 35: INCEIPL $4
+
+ 0x254771C8: 7DE04039 and. r0,r15,r8
+ 36: GETL R15, t24
+ 37: GETL R8, t26
+ 38: ANDL t24, t26
+ 39: PUTL t26, R0
+ 40: CMP0L t26, t28 (-rSo)
+ 41: ICRFL t28, $0x0, CR
+ 42: INCEIPL $4
+
+ 0x254771CC: 41820040 bc 12,2,0x2547720C
+ 43: Js02o $0x2547720C
+
+
+
+. 660 254771A8 40
+. 83 A5 01 80 7C AA DA 78 30 0A FF FF 7D 00 51 10 57 BC 00 02 6F 92 80 00 31 32 FF FF 7D E9 91 10 7D E0 40 39 41 82 00 40
+==== BB 661 (0x2547720C) approx BBs exec'd 0 ====
+
+ 0x2547720C: 40920034 bc 4,18,0x25477240
+ 0: Jc18o $0x25477240
+
+
+
+. 661 2547720C 4
+. 40 92 00 34
+==== BB 662 (0x25477210) approx BBs exec'd 0 ====
+
+ 0x25477210: 80DE0168 lwz r6,360(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x168, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x25477214: 80A60000 lwz r5,0(r6)
+ 5: GETL R6, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R5
+ 8: INCEIPL $4
+
+ 0x25477218: 2C85FFFF cmpi cr1,r5,-1
+ 9: GETL R5, t8
+ 10: MOVL $0xFFFFFFFF, t12
+ 11: CMPL t8, t12, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x2547721C: 41860024 bc 12,6,0x25477240
+ 14: Js06o $0x25477240
+
+
+
+. 662 25477210 16
+. 80 DE 01 68 80 A6 00 00 2C 85 FF FF 41 86 00 24
+==== BB 663 (0x25477220) approx BBs exec'd 0 ====
+
+ 0x25477220: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25477224: 7EC4B378 or r4,r22,r22
+ 3: GETL R22, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25477228: 7EE5BB78 or r5,r23,r23
+ 6: GETL R23, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547722C: 38E10228 addi r7,r1,552
+ 9: GETL R1, t6
+ 10: ADDL $0x228, t6
+ 11: PUTL t6, R7
+ 12: INCEIPL $4
+
+ 0x25477230: 39010018 addi r8,r1,24
+ 13: GETL R1, t8
+ 14: ADDL $0x18, t8
+ 15: PUTL t8, R8
+ 16: INCEIPL $4
+
+ 0x25477234: 4BFFF561 bl 0x25476794
+ 17: MOVL $0x25477238, t10
+ 18: PUTL t10, LR
+ 19: JMPo-c $0x25476794 ($4)
+
+
+
+. 663 25477220 24
+. 7F E3 FB 78 7E C4 B3 78 7E E5 BB 78 38 E1 02 28 39 01 00 18 4B FF F5 61
+==== BB 664 open_path(0x25476794) approx BBs exec'd 0 ====
+
+ 0x25476794: 9421FF00 stwu r1,-256(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF00, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25476798: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547679C: 48020865 bl 0x25497000
+ 9: MOVL $0x254767A0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 664 25476794 12
+. 94 21 FF 00 7C 08 02 A6 48 02 08 65
+==== BB 665 (0x254767A0) approx BBs exec'd 0 ====
+
+ 0x254767A0: 93C100F8 stw r30,248(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xF8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254767A4: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x254767A8: 924100C8 stw r18,200(r1)
+ 8: GETL R18, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC8, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x254767AC: 926100CC stw r19,204(r1)
+ 13: GETL R19, t10
+ 14: GETL R1, t12
+ 15: ADDL $0xCC, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254767B0: 7D200026 mfcr r9
+ 18: GETL CR, t14
+ 19: PUTL t14, R9
+ 20: INCEIPL $4
+
+ 0x254767B4: 90010104 stw r0,260(r1)
+ 21: GETL R0, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x104, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x254767B8: 38000000 li r0,0
+ 26: MOVL $0x0, t20
+ 27: PUTL t20, R0
+ 28: INCEIPL $4
+
+ 0x254767BC: 825E015C lwz r18,348(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x15C, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R18
+ 33: INCEIPL $4
+
+ 0x254767C0: 827E0158 lwz r19,344(r30)
+ 34: GETL R30, t26
+ 35: ADDL $0x158, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R19
+ 38: INCEIPL $4
+
+ 0x254767C4: 920100C0 stw r16,192(r1)
+ 39: GETL R16, t30
+ 40: GETL R1, t32
+ 41: ADDL $0xC0, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0x254767C8: 922100C4 stw r17,196(r1)
+ 44: GETL R17, t34
+ 45: GETL R1, t36
+ 46: ADDL $0xC4, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0x254767CC: 82130000 lwz r16,0(r19)
+ 49: GETL R19, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R16
+ 52: INCEIPL $4
+
+ 0x254767D0: 82320000 lwz r17,0(r18)
+ 53: GETL R18, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R17
+ 56: INCEIPL $4
+
+ 0x254767D4: 7D124378 or r18,r8,r8
+ 57: GETL R8, t46
+ 58: PUTL t46, R18
+ 59: INCEIPL $4
+
+ 0x254767D8: 91E100BC stw r15,188(r1)
+ 60: GETL R15, t48
+ 61: GETL R1, t50
+ 62: ADDL $0xBC, t50
+ 63: STL t48, (t50)
+ 64: INCEIPL $4
+
+ 0x254767DC: 7DF08A14 add r15,r16,r17
+ 65: GETL R16, t52
+ 66: GETL R17, t54
+ 67: ADDL t52, t54
+ 68: PUTL t54, R15
+ 69: INCEIPL $4
+
+ 0x254767E0: 91C100B8 stw r14,184(r1)
+ 70: GETL R14, t56
+ 71: GETL R1, t58
+ 72: ADDL $0xB8, t58
+ 73: STL t56, (t58)
+ 74: INCEIPL $4
+
+ 0x254767E4: 93E100FC stw r31,252(r1)
+ 75: GETL R31, t60
+ 76: GETL R1, t62
+ 77: ADDL $0xFC, t62
+ 78: STL t60, (t62)
+ 79: INCEIPL $4
+
+ 0x254767E8: 7DCF2214 add r14,r15,r4
+ 80: GETL R15, t64
+ 81: GETL R4, t66
+ 82: ADDL t64, t66
+ 83: PUTL t66, R14
+ 84: INCEIPL $4
+
+ 0x254767EC: 7C3F0B78 or r31,r1,r1
+ 85: GETL R1, t68
+ 86: PUTL t68, R31
+ 87: INCEIPL $4
+
+ 0x254767F0: 398E001E addi r12,r14,30
+ 88: GETL R14, t70
+ 89: ADDL $0x1E, t70
+ 90: PUTL t70, R12
+ 91: INCEIPL $4
+
+ 0x254767F4: 90DF0084 stw r6,132(r31)
+ 92: GETL R6, t72
+ 93: GETL R31, t74
+ 94: ADDL $0x84, t74
+ 95: STL t72, (t74)
+ 96: INCEIPL $4
+
+ 0x254767F8: 558B0036 rlwinm r11,r12,0,0,27
+ 97: GETL R12, t76
+ 98: ANDL $0xFFFFFFF0, t76
+ 99: PUTL t76, R11
+ 100: INCEIPL $4
+
+ 0x254767FC: 81410000 lwz r10,0(r1)
+ 101: GETL R1, t78
+ 102: LDL (t78), t80
+ 103: PUTL t80, R10
+ 104: INCEIPL $4
+
+ 0x25476800: 7C711B78 or r17,r3,r3
+ 105: GETL R3, t82
+ 106: PUTL t82, R17
+ 107: INCEIPL $4
+
+ 0x25476804: 92A100D4 stw r21,212(r1)
+ 108: GETL R21, t84
+ 109: GETL R1, t86
+ 110: ADDL $0xD4, t86
+ 111: STL t84, (t86)
+ 112: INCEIPL $4
+
+ 0x25476808: 39E00000 li r15,0
+ 113: MOVL $0x0, t88
+ 114: PUTL t88, R15
+ 115: INCEIPL $4
+
+ 0x2547680C: 912100B4 stw r9,180(r1)
+ 116: GETL R9, t90
+ 117: GETL R1, t92
+ 118: ADDL $0xB4, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0x25476810: 7D2B00D0 neg r9,r11
+ 121: GETL R11, t94
+ 122: NEGL t94
+ 123: PUTL t94, R9
+ 124: INCEIPL $4
+
+ 0x25476814: 82A60000 lwz r21,0(r6)
+ 125: GETL R6, t96
+ 126: LDL (t96), t98
+ 127: PUTL t98, R21
+ 128: INCEIPL $4
+
+ 0x25476818: 92C100D8 stw r22,216(r1)
+ 129: GETL R22, t100
+ 130: GETL R1, t102
+ 131: ADDL $0xD8, t102
+ 132: STL t100, (t102)
+ 133: INCEIPL $4
+
+ 0x2547681C: 7C962378 or r22,r4,r4
+ 134: GETL R4, t104
+ 135: PUTL t104, R22
+ 136: INCEIPL $4
+
+ 0x25476820: 934100E8 stw r26,232(r1)
+ 137: GETL R26, t106
+ 138: GETL R1, t108
+ 139: ADDL $0xE8, t108
+ 140: STL t106, (t108)
+ 141: INCEIPL $4
+
+ 0x25476824: 3B40FFFF li r26,-1
+ 142: MOVL $0xFFFFFFFF, t110
+ 143: PUTL t110, R26
+ 144: INCEIPL $4
+
+ 0x25476828: 936100EC stw r27,236(r1)
+ 145: GETL R27, t112
+ 146: GETL R1, t114
+ 147: ADDL $0xEC, t114
+ 148: STL t112, (t114)
+ 149: INCEIPL $4
+
+ 0x2547682C: 2E1AFFFF cmpi cr4,r26,-1
+ 150: GETL R26, t116
+ 151: MOVL $0xFFFFFFFF, t120
+ 152: CMPL t116, t120, t118 (-rSo)
+ 153: ICRFL t118, $0x4, CR
+ 154: INCEIPL $4
+
+ 0x25476830: 93A100F4 stw r29,244(r1)
+ 155: GETL R29, t122
+ 156: GETL R1, t124
+ 157: ADDL $0xF4, t124
+ 158: STL t122, (t124)
+ 159: INCEIPL $4
+
+ 0x25476834: 928100D0 stw r20,208(r1)
+ 160: GETL R20, t126
+ 161: GETL R1, t128
+ 162: ADDL $0xD0, t128
+ 163: STL t126, (t128)
+ 164: INCEIPL $4
+
+ 0x25476838: 92E100DC stw r23,220(r1)
+ 165: GETL R23, t130
+ 166: GETL R1, t132
+ 167: ADDL $0xDC, t132
+ 168: STL t130, (t132)
+ 169: INCEIPL $4
+
+ 0x2547683C: 930100E0 stw r24,224(r1)
+ 170: GETL R24, t134
+ 171: GETL R1, t136
+ 172: ADDL $0xE0, t136
+ 173: STL t134, (t136)
+ 174: INCEIPL $4
+
+ 0x25476840: 932100E4 stw r25,228(r1)
+ 175: GETL R25, t138
+ 176: GETL R1, t140
+ 177: ADDL $0xE4, t140
+ 178: STL t138, (t140)
+ 179: INCEIPL $4
+
+ 0x25476844: 938100F0 stw r28,240(r1)
+ 180: GETL R28, t142
+ 181: GETL R1, t144
+ 182: ADDL $0xF0, t144
+ 183: STL t142, (t144)
+ 184: INCEIPL $4
+
+ 0x25476848: 7D41496E stwux r10,r1,r9
+ 185: GETL R9, t146
+ 186: GETL R1, t148
+ 187: ADDL t148, t146
+ 188: PUTL t146, R1
+ 189: GETL R10, t150
+ 190: STL t150, (t146)
+ 191: INCEIPL $4
+
+ 0x2547684C: 38810017 addi r4,r1,23
+ 192: GETL R1, t152
+ 193: ADDL $0x17, t152
+ 194: PUTL t152, R4
+ 195: INCEIPL $4
+
+ 0x25476850: 83B50000 lwz r29,0(r21)
+ 196: GETL R21, t154
+ 197: LDL (t154), t156
+ 198: PUTL t156, R29
+ 199: INCEIPL $4
+
+ 0x25476854: 81DE04F4 lwz r14,1268(r30)
+ 200: GETL R30, t158
+ 201: ADDL $0x4F4, t158
+ 202: LDL (t158), t160
+ 203: PUTL t160, R14
+ 204: INCEIPL $4
+
+ 0x25476858: 549B0036 rlwinm r27,r4,0,0,27
+ 205: GETL R4, t162
+ 206: ANDL $0xFFFFFFF0, t162
+ 207: PUTL t162, R27
+ 208: INCEIPL $4
+
+ 0x2547685C: 90BF0080 stw r5,128(r31)
+ 209: GETL R5, t164
+ 210: GETL R31, t166
+ 211: ADDL $0x80, t166
+ 212: STL t164, (t166)
+ 213: INCEIPL $4
+
+ 0x25476860: 90FF0088 stw r7,136(r31)
+ 214: GETL R7, t168
+ 215: GETL R31, t170
+ 216: ADDL $0x88, t170
+ 217: STL t168, (t170)
+ 218: INCEIPL $4
+
+ 0x25476864: 901F008C stw r0,140(r31)
+ 219: GETL R0, t172
+ 220: GETL R31, t174
+ 221: ADDL $0x8C, t174
+ 222: STL t172, (t174)
+ 223: INCEIPL $4
+
+ 0x25476868: 806E0000 lwz r3,0(r14)
+ 224: GETL R14, t176
+ 225: LDL (t176), t178
+ 226: PUTL t178, R3
+ 227: INCEIPL $4
+
+ 0x2547686C: 3A600000 li r19,0
+ 228: MOVL $0x0, t180
+ 229: PUTL t180, R19
+ 230: INCEIPL $4
+
+ 0x25476870: 3AE00000 li r23,0
+ 231: MOVL $0x0, t182
+ 232: PUTL t182, R23
+ 233: INCEIPL $4
+
+ 0x25476874: 70690001 andi. r9,r3,0x1
+ 234: GETL R3, t184
+ 235: ANDL $0x1, t184
+ 236: PUTL t184, R9
+ 237: CMP0L t184, t186 (-rSo)
+ 238: ICRFL t186, $0x0, CR
+ 239: INCEIPL $4
+
+ 0x25476878: 4082025C bc 4,2,0x25476AD4
+ 240: Jc02o $0x25476AD4
+
+
+
+. 665 254767A0 220
+. 93 C1 00 F8 7F C8 02 A6 92 41 00 C8 92 61 00 CC 7D 20 00 26 90 01 01 04 38 00 00 00 82 5E 01 5C 82 7E 01 58 92 01 00 C0 92 21 00 C4 82 13 00 00 82 32 00 00 7D 12 43 78 91 E1 00 BC 7D F0 8A 14 91 C1 00 B8 93 E1 00 FC 7D CF 22 14 7C 3F 0B 78 39 8E 00 1E 90 DF 00 84 55 8B 00 36 81 41 00 00 7C 71 1B 78 92 A1 00 D4 39 E0 00 00 91 21 00 B4 7D 2B 00 D0 82 A6 00 00 92 C1 00 D8 7C 96 23 78 93 41 00 E8 3B 40 FF FF 93 61 00 EC 2E 1A FF FF 93 A1 00 F4 92 81 00 D0 92 E1 00 DC 93 01 00 E0 93 21 00 E4 93 81 00 F0 7D 41 49 6E 38 81 00 17 83 B5 00 00 81 DE 04 F4 54 9B 00 36 90 BF 00 80 90 FF 00 88 90 1F 00 8C 80 6E 00 00 3A 60 00 00 3A E0 00 00 70 69 00 01 40 82 02 5C
+==== BB 666 (0x2547687C) approx BBs exec'd 0 ====
+
+ 0x2547687C: 809D000C lwz r4,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25476880: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25476884: 80BD0010 lwz r5,16(r29)
+ 8: GETL R29, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0x25476888: 3B800000 li r28,0
+ 13: MOVL $0x0, t10
+ 14: PUTL t10, R28
+ 15: INCEIPL $4
+
+ 0x2547688C: 4800D195 bl 0x25483A20
+ 16: MOVL $0x25476890, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0x25483A20 ($4)
+
+
+
+. 666 2547687C 20
+. 80 9D 00 0C 7F 63 DB 78 80 BD 00 10 3B 80 00 00 48 00 D1 95
+==== BB 667 (0x25476890) approx BBs exec'd 0 ====
+
+ 0x25476890: 7C781B78 or r24,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R24
+ 2: INCEIPL $4
+
+ 0x25476894: 409201A0 bc 4,18,0x25476A34
+ 3: Jc18o $0x25476A34
+
+
+
+. 667 25476890 8
+. 7C 78 1B 78 40 92 01 A0
+==== BB 668 (0x25476898) approx BBs exec'd 0 ====
+
+ 0x25476898: 833E0154 lwz r25,340(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x154, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x2547689C: 81990000 lwz r12,0(r25)
+ 5: GETL R25, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R12
+ 8: INCEIPL $4
+
+ 0x254768A0: 7F9C6040 cmpl cr7,r28,r12
+ 9: GETL R28, t8
+ 10: GETL R12, t10
+ 11: CMPUL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x254768A4: 409C014C bc 4,28,0x254769F0
+ 14: Jc28o $0x254769F0
+
+
+
+. 668 25476898 16
+. 83 3E 01 54 81 99 00 00 7F 9C 60 40 40 9C 01 4C
+==== BB 669 (0x254768A8) approx BBs exec'd 0 ====
+
+ 0x254768A8: 817E0228 lwz r11,552(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x228, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254768AC: 3A800002 li r20,2
+ 5: MOVL $0x2, t4
+ 6: PUTL t4, R20
+ 7: INCEIPL $4
+
+ 0x254768B0: 820B0000 lwz r16,0(r11)
+ 8: GETL R11, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R16
+ 11: INCEIPL $4
+
+ 0x254768B4: 4800001C b 0x254768D0
+ 12: JMPo $0x254768D0 ($4)
+
+
+
+. 669 254768A8 16
+. 81 7E 02 28 3A 80 00 02 82 0B 00 00 48 00 00 1C
+==== BB 670 (0x254768D0) approx BBs exec'd 0 ====
+
+ 0x254768D0: 80DD0014 lwz r6,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254768D4: 2C860001 cmpi cr1,r6,1
+ 5: GETL R6, t4
+ 6: MOVL $0x1, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x254768D8: 41A6FFE0 bc 13,6,0x254768B8
+ 10: Js06o $0x254768B8
+
+
+
+. 670 254768D0 12
+. 80 DD 00 14 2C 86 00 01 41 A6 FF E0
+==== BB 671 (0x254768DC) approx BBs exec'd 0 ====
+
+ 0x254768DC: 813E0160 lwz r9,352(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x160, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x254768E0: 578A1838 rlwinm r10,r28,3,0,28
+ 5: GETL R28, t4
+ 6: SHLL $0x3, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x254768E4: 7F03C378 or r3,r24,r24
+ 9: GETL R24, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x254768E8: 80A90000 lwz r5,0(r9)
+ 12: GETL R9, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0x254768EC: 7E6A2A14 add r19,r10,r5
+ 16: GETL R10, t12
+ 17: GETL R5, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R19
+ 20: INCEIPL $4
+
+ 0x254768F0: 7C8A282E lwzx r4,r10,r5
+ 21: GETL R5, t16
+ 22: GETL R10, t18
+ 23: ADDL t18, t16
+ 24: LDL (t16), t20
+ 25: PUTL t20, R4
+ 26: INCEIPL $4
+
+ 0x254768F4: 80B30004 lwz r5,4(r19)
+ 27: GETL R19, t22
+ 28: ADDL $0x4, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R5
+ 31: INCEIPL $4
+
+ 0x254768F8: 4800D129 bl 0x25483A20
+ 32: MOVL $0x254768FC, t26
+ 33: PUTL t26, LR
+ 34: JMPo-c $0x25483A20 ($4)
+
+
+
+. 671 254768DC 32
+. 81 3E 01 60 57 8A 18 38 7F 03 C3 78 80 A9 00 00 7E 6A 2A 14 7C 8A 28 2E 80 B3 00 04 48 00 D1 29
+==== BB 672 (0x254768FC) approx BBs exec'd 0 ====
+
+ 0x254768FC: 7E248B78 or r4,r17,r17
+ 0: GETL R17, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x25476900: 7EC5B378 or r5,r22,r22
+ 3: GETL R22, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25476904: 4800D11D bl 0x25483A20
+ 6: MOVL $0x25476908, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25483A20 ($4)
+
+
+
+. 672 254768FC 12
+. 7E 24 8B 78 7E C5 B3 78 48 00 D1 1D
+==== BB 673 (0x25476908) approx BBs exec'd 0 ====
+
+ 0x25476908: 834E0000 lwz r26,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R26
+ 3: INCEIPL $4
+
+ 0x2547690C: 7E7B1850 subf r19,r27,r3
+ 4: GETL R27, t4
+ 5: GETL R3, t6
+ 6: SUBL t4, t6
+ 7: PUTL t6, R19
+ 8: INCEIPL $4
+
+ 0x25476910: 73490001 andi. r9,r26,0x1
+ 9: GETL R26, t8
+ 10: ANDL $0x1, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25476914: 408201AC bc 4,2,0x25476AC0
+ 15: Jc02o $0x25476AC0
+
+
+
+. 673 25476908 16
+. 83 4E 00 00 7E 7B 18 50 73 49 00 01 40 82 01 AC
+==== BB 674 (0x25476918) approx BBs exec'd 0 ====
+
+ 0x25476918: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547691C: 7E449378 or r4,r18,r18
+ 3: GETL R18, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25476920: 4BFFFB25 bl 0x25476444
+ 6: MOVL $0x25476924, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25476444 ($4)
+
+
+
+. 674 25476918 12
+. 7F 63 DB 78 7E 44 93 78 4B FF FB 25
+==== BB 675 (0x25481FEC) approx BBs exec'd 0 ====
+
+ 0x25481FEC: 4BFFF344 b 0x25481330
+ 0: JMPo $0x25481330 ($4)
+
+
+
+. 675 25481FEC 4
+. 4B FF F3 44
+==== BB 676 (0x25476924) approx BBs exec'd 0 ====
+
+ 0x25476924: 801D0014 lwz r0,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25476928: 7C7A1B78 or r26,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x2547692C: 2E03FFFF cmpi cr4,r3,-1
+ 8: GETL R3, t6
+ 9: MOVL $0xFFFFFFFF, t10
+ 10: CMPL t6, t10, t8 (-rSo)
+ 11: ICRFL t8, $0x4, CR
+ 12: INCEIPL $4
+
+ 0x25476930: 2F000000 cmpi cr6,r0,0
+ 13: GETL R0, t12
+ 14: CMP0L t12, t14 (-rSo)
+ 15: ICRFL t14, $0x6, CR
+ 16: INCEIPL $4
+
+ 0x25476934: 409A000C bc 4,26,0x25476940
+ 17: Jc26o $0x25476940
+
+
+
+. 676 25476924 20
+. 80 1D 00 14 7C 7A 1B 78 2E 03 FF FF 2F 00 00 00 40 9A 00 0C
+==== BB 677 (0x25476938) approx BBs exec'd 0 ====
+
+ 0x25476938: 41920078 bc 12,18,0x254769B0
+ 0: Js18o $0x254769B0
+
+
+
+. 677 25476938 4
+. 41 92 00 78
+==== BB 678 (0x254769B0) approx BBs exec'd 0 ====
+
+ 0x254769B0: 7C769850 subf r3,r22,r19
+ 0: GETL R22, t0
+ 1: GETL R19, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254769B4: 7F64DB78 or r4,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x254769B8: 7CFB1A14 add r7,r27,r3
+ 8: GETL R27, t6
+ 9: GETL R3, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0x254769BC: 38BF0010 addi r5,r31,16
+ 13: GETL R31, t10
+ 14: ADDL $0x10, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0x254769C0: 9807FFFF stb r0,-1(r7)
+ 17: GETL R0, t12
+ 18: GETL R7, t14
+ 19: ADDL $0xFFFFFFFF, t14
+ 20: STB t12, (t14)
+ 21: INCEIPL $4
+
+ 0x254769C4: 38600003 li r3,3
+ 22: MOVL $0x3, t16
+ 23: PUTL t16, R3
+ 24: INCEIPL $4
+
+ 0x254769C8: 4800B3A1 bl 0x25481D68
+ 25: MOVL $0x254769CC, t18
+ 26: PUTL t18, LR
+ 27: JMPo-c $0x25481D68 ($4)
+
+
+
+. 678 254769B0 28
+. 7C 76 98 50 7F 64 DB 78 7C FB 1A 14 38 BF 00 10 98 07 FF FF 38 60 00 03 48 00 B3 A1
+==== BB 679 __GI___xstat64(0x25481D68) approx BBs exec'd 0 ====
+
+ 0x25481D68: 9421FF80 stwu r1,-128(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF80, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25481D6C: 7CC802A6 mflr r6
+ 6: GETL LR, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x25481D70: 48015291 bl 0x25497000
+ 9: MOVL $0x25481D74, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 679 25481D68 12
+. 94 21 FF 80 7C C8 02 A6 48 01 52 91
+==== BB 680 (0x25481D74) approx BBs exec'd 0 ====
+
+ 0x25481D74: 93C10078 stw r30,120(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x78, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25481D78: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25481D7C: 9361006C stw r27,108(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x6C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25481D80: 90C10084 stw r6,132(r1)
+ 13: GETL R6, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x84, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25481D84: 93210064 stw r25,100(r1)
+ 18: GETL R25, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x64, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25481D88: 7C791B78 or r25,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R25
+ 25: INCEIPL $4
+
+ 0x25481D8C: 837E04EC lwz r27,1260(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4EC, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R27
+ 30: INCEIPL $4
+
+ 0x25481D90: 93810070 stw r28,112(r1)
+ 31: GETL R28, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x70, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x25481D94: 7CBC2B78 or r28,r5,r5
+ 36: GETL R5, t28
+ 37: PUTL t28, R28
+ 38: INCEIPL $4
+
+ 0x25481D98: 801B0000 lwz r0,0(r27)
+ 39: GETL R27, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R0
+ 42: INCEIPL $4
+
+ 0x25481D9C: 93E1007C stw r31,124(r1)
+ 43: GETL R31, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x7C, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x25481DA0: 7C9F2378 or r31,r4,r4
+ 48: GETL R4, t38
+ 49: PUTL t38, R31
+ 50: INCEIPL $4
+
+ 0x25481DA4: 2F800000 cmpi cr7,r0,0
+ 51: GETL R0, t40
+ 52: CMP0L t40, t42 (-rSo)
+ 53: ICRFL t42, $0x7, CR
+ 54: INCEIPL $4
+
+ 0x25481DA8: 93410068 stw r26,104(r1)
+ 55: GETL R26, t44
+ 56: GETL R1, t46
+ 57: ADDL $0x68, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0x25481DAC: 93A10074 stw r29,116(r1)
+ 60: GETL R29, t48
+ 61: GETL R1, t50
+ 62: ADDL $0x74, t50
+ 63: STL t48, (t50)
+ 64: INCEIPL $4
+
+ 0x25481DB0: 409E0048 bc 4,30,0x25481DF8
+ 65: Jc30o $0x25481DF8
+
+
+
+. 680 25481D74 64
+. 93 C1 00 78 7F C8 02 A6 93 61 00 6C 90 C1 00 84 93 21 00 64 7C 79 1B 78 83 7E 04 EC 93 81 00 70 7C BC 2B 78 80 1B 00 00 93 E1 00 7C 7C 9F 23 78 2F 80 00 00 93 41 00 68 93 A1 00 74 40 9E 00 48
+==== BB 681 (0x25481DB4) approx BBs exec'd 0 ====
+
+ 0x25481DB4: 83BE0514 lwz r29,1300(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x514, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25481DB8: 7C832378 or r3,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25481DBC: 380000C3 li r0,195
+ 8: MOVL $0xC3, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x25481DC0: 7CA42B78 or r4,r5,r5
+ 11: GETL R5, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x25481DC4: 835D0000 lwz r26,0(r29)
+ 14: GETL R29, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R26
+ 17: INCEIPL $4
+
+ 0x25481DC8: 44000002 sc
+ 18: JMPo-sys $0x25481DCC ($4)
+
+
+
+. 681 25481DB4 24
+. 83 BE 05 14 7C 83 23 78 38 00 00 C3 7C A4 2B 78 83 5D 00 00 44 00 00 02
+==== BB 682 (0x25481DCC) approx BBs exec'd 0 ====
+
+ 0x25481DCC: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25481DD0: 74091000 andis. r9,r0,0x1000
+ 3: GETL R0, t2
+ 4: ANDL $0x10000000, t2
+ 5: PUTL t2, R9
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25481DD4: 408200C4 bc 4,2,0x25481E98
+ 9: Jc02o $0x25481E98
+
+
+
+. 682 25481DCC 12
+. 7C 00 00 26 74 09 10 00 40 82 00 C4
+==== BB 683 (0x25481E98) approx BBs exec'd 0 ====
+
+ 0x25481E98: 907D0000 stw r3,0(r29)
+ 0: GETL R3, t0
+ 1: GETL R29, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25481E9C: 3860FFFF li r3,-1
+ 4: MOVL $0xFFFFFFFF, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x25481EA0: 4BFFFF38 b 0x25481DD8
+ 7: JMPo $0x25481DD8 ($4)
+
+
+
+. 683 25481E98 12
+. 90 7D 00 00 38 60 FF FF 4B FF FF 38
+==== BB 684 (0x25481DD8) approx BBs exec'd 0 ====
+
+ 0x25481DD8: 2C83FFFF cmpi cr1,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25481DDC: 40A60044 bc 5,6,0x25481E20
+ 5: Jc06o $0x25481E20
+
+
+
+. 684 25481DD8 8
+. 2C 83 FF FF 40 A6 00 44
+==== BB 685 (0x25481DE0) approx BBs exec'd 0 ====
+
+ 0x25481DE0: 809D0000 lwz r4,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25481DE4: 2F040026 cmpi cr6,r4,38
+ 4: GETL R4, t4
+ 5: MOVL $0x26, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25481DE8: 40BA0038 bc 5,26,0x25481E20
+ 9: Jc26o $0x25481E20
+
+
+
+. 685 25481DE0 12
+. 80 9D 00 00 2F 04 00 26 40 BA 00 38
+==== BB 686 (0x25481E20) approx BBs exec'd 0 ====
+
+ 0x25481E20: 80A10084 lwz r5,132(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25481E24: 83210064 lwz r25,100(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x64, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0x25481E28: 83410068 lwz r26,104(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x68, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R26
+ 14: INCEIPL $4
+
+ 0x25481E2C: 7CA803A6 mtlr r5
+ 15: GETL R5, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x25481E30: 8361006C lwz r27,108(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x6C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R27
+ 22: INCEIPL $4
+
+ 0x25481E34: 83810070 lwz r28,112(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x70, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R28
+ 27: INCEIPL $4
+
+ 0x25481E38: 83A10074 lwz r29,116(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x74, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R29
+ 32: INCEIPL $4
+
+ 0x25481E3C: 83C10078 lwz r30,120(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x78, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R30
+ 37: INCEIPL $4
+
+ 0x25481E40: 83E1007C lwz r31,124(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x7C, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R31
+ 42: INCEIPL $4
+
+ 0x25481E44: 38210080 addi r1,r1,128
+ 43: GETL R1, t34
+ 44: ADDL $0x80, t34
+ 45: PUTL t34, R1
+ 46: INCEIPL $4
+
+ 0x25481E48: 4E800020 blr
+ 47: GETL LR, t36
+ 48: JMPo-r t36 ($4)
+
+
+
+. 686 25481E20 44
+. 80 A1 00 84 83 21 00 64 83 41 00 68 7C A8 03 A6 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C 38 21 00 80 4E 80 00 20
+==== BB 687 (0x254769CC) approx BBs exec'd 0 ====
+
+ 0x254769CC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x254769D0: 409E0014 bc 4,30,0x254769E4
+ 4: Jc30o $0x254769E4
+
+
+
+. 687 254769CC 8
+. 2F 83 00 00 40 9E 00 14
+==== BB 688 (0x254769E4) approx BBs exec'd 0 ====
+
+ 0x254769E4: 38800001 li r4,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254769E8: 909D0014 stw r4,20(r29)
+ 3: GETL R4, t2
+ 4: GETL R29, t4
+ 5: ADDL $0x14, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x254769EC: 4BFFFF54 b 0x25476940
+ 8: JMPo $0x25476940 ($4)
+
+
+
+. 688 254769E4 12
+. 38 80 00 01 90 9D 00 14 4B FF FF 54
+==== BB 689 (0x25476940) approx BBs exec'd 0 ====
+
+ 0x25476940: 817D0014 lwz r11,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25476944: 696C0002 xori r12,r11,0x2
+ 5: GETL R11, t4
+ 6: XORL $0x2, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x25476948: 212C0000 subfic r9,r12,0
+ 9: GETL R12, t6
+ 10: MOVL $0x0, t8
+ 11: SBBL t6, t8 (-wCa)
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0x2547694C: 7D896114 adde r12,r9,r12
+ 14: GETL R9, t10
+ 15: GETL R12, t12
+ 16: ADCL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R12
+ 18: INCEIPL $4
+
+ 0x25476950: 7EF76378 or r23,r23,r12
+ 19: GETL R23, t14
+ 20: GETL R12, t16
+ 21: ORL t16, t14
+ 22: PUTL t14, R23
+ 23: INCEIPL $4
+
+ 0x25476954: 41B2FF64 bc 13,18,0x254768B8
+ 24: Js18o $0x254768B8
+
+
+
+. 689 25476940 24
+. 81 7D 00 14 69 6C 00 02 21 2C 00 00 7D 89 61 14 7E F7 63 78 41 B2 FF 64
+==== BB 690 (0x254768B8) approx BBs exec'd 0 ====
+
+ 0x254768B8: 3B9C0001 addi r28,r28,1
+ 0: GETL R28, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0x254768BC: 3BBD0004 addi r29,r29,4
+ 4: GETL R29, t2
+ 5: ADDL $0x4, t2
+ 6: PUTL t2, R29
+ 7: INCEIPL $4
+
+ 0x254768C0: 40920174 bc 4,18,0x25476A34
+ 8: Jc18o $0x25476A34
+
+
+
+. 690 254768B8 12
+. 3B 9C 00 01 3B BD 00 04 40 92 01 74
+==== BB 691 (0x254768C4) approx BBs exec'd 0 ====
+
+ 0x254768C4: 81390000 lwz r9,0(r25)
+ 0: GETL R25, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x254768C8: 7C9C4840 cmpl cr1,r28,r9
+ 4: GETL R28, t4
+ 5: GETL R9, t6
+ 6: CMPUL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x254768CC: 40840124 bc 4,4,0x254769F0
+ 9: Jc04o $0x254769F0
+
+
+
+. 691 254768C4 12
+. 81 39 00 00 7C 9C 48 40 40 84 01 24
+==== BB 692 (0x254769D4) approx BBs exec'd 0 ====
+
+ 0x254769D4: 811F0020 lwz r8,32(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254769D8: 55000426 rlwinm r0,r8,0,16,19
+ 5: GETL R8, t4
+ 6: ANDL $0xF000, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254769DC: 2C804000 cmpi cr1,r0,16384
+ 9: GETL R0, t6
+ 10: MOVL $0x4000, t10
+ 11: CMPL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x254769E0: 41A6FF5C bc 13,6,0x2547693C
+ 14: Js06o $0x2547693C
+
+
+
+. 692 254769D4 16
+. 81 1F 00 20 55 00 04 26 2C 80 40 00 41 A6 FF 5C
+==== BB 693 (0x2547693C) approx BBs exec'd 0 ====
+
+ 0x2547693C: 929D0014 stw r20,20(r29)
+ 0: GETL R20, t0
+ 1: GETL R29, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25476940: 817D0014 lwz r11,20(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25476944: 696C0002 xori r12,r11,0x2
+ 10: GETL R11, t8
+ 11: XORL $0x2, t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0x25476948: 212C0000 subfic r9,r12,0
+ 14: GETL R12, t10
+ 15: MOVL $0x0, t12
+ 16: SBBL t10, t12 (-wCa)
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0x2547694C: 7D896114 adde r12,r9,r12
+ 19: GETL R9, t14
+ 20: GETL R12, t16
+ 21: ADCL t14, t16 (-rCa-wCa)
+ 22: PUTL t16, R12
+ 23: INCEIPL $4
+
+ 0x25476950: 7EF76378 or r23,r23,r12
+ 24: GETL R23, t18
+ 25: GETL R12, t20
+ 26: ORL t20, t18
+ 27: PUTL t18, R23
+ 28: INCEIPL $4
+
+ 0x25476954: 41B2FF64 bc 13,18,0x254768B8
+ 29: Js18o $0x254768B8
+
+
+
+. 693 2547693C 28
+. 92 9D 00 14 81 7D 00 14 69 6C 00 02 21 2C 00 00 7D 89 61 14 7E F7 63 78 41 B2 FF 64
+==== BB 694 (0x254769F0) approx BBs exec'd 0 ====
+
+ 0x254769F0: 40920044 bc 4,18,0x25476A34
+ 0: Jc18o $0x25476A34
+
+
+
+. 694 254769F0 4
+. 40 92 00 44
+==== BB 695 (0x254769F4) approx BBs exec'd 0 ====
+
+ 0x254769F4: 2F170000 cmpi cr6,r23,0
+ 0: GETL R23, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x254769F8: 419A001C bc 12,26,0x25476A14
+ 4: Js26o $0x25476A14
+
+
+
+. 695 254769F4 8
+. 2F 17 00 00 41 9A 00 1C
+==== BB 696 (0x254769FC) approx BBs exec'd 0 ====
+
+ 0x254769FC: 83BE0514 lwz r29,1300(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x514, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25476A00: 813D0000 lwz r9,0(r29)
+ 5: GETL R29, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0x25476A04: 2F890002 cmpi cr7,r9,2
+ 9: GETL R9, t8
+ 10: MOVL $0x2, t12
+ 11: CMPL t8, t12, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25476A08: 419E000C bc 12,30,0x25476A14
+ 14: Js30o $0x25476A14
+
+
+
+. 696 254769FC 16
+. 83 BE 05 14 81 3D 00 00 2F 89 00 02 41 9E 00 0C
+==== BB 697 (0x25476A14) approx BBs exec'd 0 ====
+
+ 0x25476A14: 87B50004 lwzu r29,4(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R21
+ 3: LDL (t0), t2
+ 4: PUTL t2, R29
+ 5: INCEIPL $4
+
+ 0x25476A18: 7DEFBB78 or r15,r15,r23
+ 6: GETL R15, t4
+ 7: GETL R23, t6
+ 8: ORL t6, t4
+ 9: PUTL t4, R15
+ 10: INCEIPL $4
+
+ 0x25476A1C: 2C9D0000 cmpi cr1,r29,0
+ 11: GETL R29, t8
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x25476A20: 4086FE48 bc 4,6,0x25476868
+ 15: Jc06o $0x25476868
+
+
+
+. 697 25476A14 16
+. 87 B5 00 04 7D EF BB 78 2C 9D 00 00 40 86 FE 48
+==== BB 698 (0x25476A24) approx BBs exec'd 0 ====
+
+ 0x25476A24: 2E0F0000 cmpi cr4,r15,0
+ 0: GETL R15, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25476A28: 4192026C bc 12,18,0x25476C94
+ 4: Js18o $0x25476C94
+
+
+
+. 698 25476A24 8
+. 2E 0F 00 00 41 92 02 6C
+==== BB 699 (0x25476A2C) approx BBs exec'd 0 ====
+
+ 0x25476A2C: 3860FFFF li r3,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476A30: 4800002C b 0x25476A5C
+ 3: JMPo $0x25476A5C ($4)
+
+
+
+. 699 25476A2C 8
+. 38 60 FF FF 48 00 00 2C
+==== BB 700 (0x25476A5C) approx BBs exec'd 0 ====
+
+ 0x25476A5C: 81010000 lwz r8,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0x25476A60: 81E80004 lwz r15,4(r8)
+ 4: GETL R8, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R15
+ 8: INCEIPL $4
+
+ 0x25476A64: 8088FFB4 lwz r4,-76(r8)
+ 9: GETL R8, t8
+ 10: ADDL $0xFFFFFFB4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R4
+ 13: INCEIPL $4
+
+ 0x25476A68: 7DE803A6 mtlr r15
+ 14: GETL R15, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x25476A6C: 81C8FFB8 lwz r14,-72(r8)
+ 17: GETL R8, t14
+ 18: ADDL $0xFFFFFFB8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R14
+ 21: INCEIPL $4
+
+ 0x25476A70: 81E8FFBC lwz r15,-68(r8)
+ 22: GETL R8, t18
+ 23: ADDL $0xFFFFFFBC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R15
+ 26: INCEIPL $4
+
+ 0x25476A74: 7C808120 mtcrf 0x8,r4
+ 27: GETL R4, t22
+ 28: ICRFL t22, $0x4, CR
+ 29: INCEIPL $4
+
+ 0x25476A78: 8208FFC0 lwz r16,-64(r8)
+ 30: GETL R8, t24
+ 31: ADDL $0xFFFFFFC0, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R16
+ 34: INCEIPL $4
+
+ 0x25476A7C: 8228FFC4 lwz r17,-60(r8)
+ 35: GETL R8, t28
+ 36: ADDL $0xFFFFFFC4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R17
+ 39: INCEIPL $4
+
+ 0x25476A80: 8248FFC8 lwz r18,-56(r8)
+ 40: GETL R8, t32
+ 41: ADDL $0xFFFFFFC8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R18
+ 44: INCEIPL $4
+
+ 0x25476A84: 8268FFCC lwz r19,-52(r8)
+ 45: GETL R8, t36
+ 46: ADDL $0xFFFFFFCC, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R19
+ 49: INCEIPL $4
+
+ 0x25476A88: 8288FFD0 lwz r20,-48(r8)
+ 50: GETL R8, t40
+ 51: ADDL $0xFFFFFFD0, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R20
+ 54: INCEIPL $4
+
+ 0x25476A8C: 82A8FFD4 lwz r21,-44(r8)
+ 55: GETL R8, t44
+ 56: ADDL $0xFFFFFFD4, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R21
+ 59: INCEIPL $4
+
+ 0x25476A90: 82C8FFD8 lwz r22,-40(r8)
+ 60: GETL R8, t48
+ 61: ADDL $0xFFFFFFD8, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R22
+ 64: INCEIPL $4
+
+ 0x25476A94: 82E8FFDC lwz r23,-36(r8)
+ 65: GETL R8, t52
+ 66: ADDL $0xFFFFFFDC, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R23
+ 69: INCEIPL $4
+
+ 0x25476A98: 8308FFE0 lwz r24,-32(r8)
+ 70: GETL R8, t56
+ 71: ADDL $0xFFFFFFE0, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R24
+ 74: INCEIPL $4
+
+ 0x25476A9C: 8328FFE4 lwz r25,-28(r8)
+ 75: GETL R8, t60
+ 76: ADDL $0xFFFFFFE4, t60
+ 77: LDL (t60), t62
+ 78: PUTL t62, R25
+ 79: INCEIPL $4
+
+ 0x25476AA0: 8348FFE8 lwz r26,-24(r8)
+ 80: GETL R8, t64
+ 81: ADDL $0xFFFFFFE8, t64
+ 82: LDL (t64), t66
+ 83: PUTL t66, R26
+ 84: INCEIPL $4
+
+ 0x25476AA4: 8368FFEC lwz r27,-20(r8)
+ 85: GETL R8, t68
+ 86: ADDL $0xFFFFFFEC, t68
+ 87: LDL (t68), t70
+ 88: PUTL t70, R27
+ 89: INCEIPL $4
+
+ 0x25476AA8: 8388FFF0 lwz r28,-16(r8)
+ 90: GETL R8, t72
+ 91: ADDL $0xFFFFFFF0, t72
+ 92: LDL (t72), t74
+ 93: PUTL t74, R28
+ 94: INCEIPL $4
+
+ 0x25476AAC: 83A8FFF4 lwz r29,-12(r8)
+ 95: GETL R8, t76
+ 96: ADDL $0xFFFFFFF4, t76
+ 97: LDL (t76), t78
+ 98: PUTL t78, R29
+ 99: INCEIPL $4
+
+ 0x25476AB0: 83C8FFF8 lwz r30,-8(r8)
+ 100: GETL R8, t80
+ 101: ADDL $0xFFFFFFF8, t80
+ 102: LDL (t80), t82
+ 103: PUTL t82, R30
+ 104: INCEIPL $4
+
+ 0x25476AB4: 83E8FFFC lwz r31,-4(r8)
+ 105: GETL R8, t84
+ 106: ADDL $0xFFFFFFFC, t84
+ 107: LDL (t84), t86
+ 108: PUTL t86, R31
+ 109: INCEIPL $4
+
+ 0x25476AB8: 7D014378 or r1,r8,r8
+ 110: GETL R8, t88
+ 111: PUTL t88, R1
+ 112: INCEIPL $4
+
+ 0x25476ABC: 4E800020 blr
+ 113: GETL LR, t90
+ 114: JMPo-r t90 ($4)
+
+
+
+. 700 25476A5C 100
+. 81 01 00 00 81 E8 00 04 80 88 FF B4 7D E8 03 A6 81 C8 FF B8 81 E8 FF BC 7C 80 81 20 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
+==== BB 701 (0x25477238) approx BBs exec'd 0 ====
+
+ 0x25477238: 2E03FFFF cmpi cr4,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x2547723C: 7C7A1B78 or r26,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R26
+ 7: INCEIPL $4
+
+ 0x25477240: 7D6E00D0 neg r11,r14
+ 8: GETL R14, t8
+ 9: NEGL t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x25477244: 7CE00026 mfcr r7
+ 12: GETL CR, t10
+ 13: PUTL t10, R7
+ 14: INCEIPL $4
+
+ 0x25477248: 54E79FFE rlwinm r7,r7,19,31,31
+ 15: GETL R7, t12
+ 16: ROLL $0x13, t12
+ 17: ANDL $0x1, t12
+ 18: PUTL t12, R7
+ 19: INCEIPL $4
+
+ 0x2547724C: 556E0FFE rlwinm r14,r11,1,31,31
+ 20: GETL R11, t14
+ 21: SHRL $0x1F, t14
+ 22: PUTL t14, R14
+ 23: INCEIPL $4
+
+ 0x25477250: 7CEB7039 and. r11,r7,r14
+ 24: GETL R7, t16
+ 25: GETL R14, t18
+ 26: ANDL t16, t18
+ 27: PUTL t18, R11
+ 28: CMP0L t18, t20 (-rSo)
+ 29: ICRFL t20, $0x0, CR
+ 30: INCEIPL $4
+
+ 0x25477254: 41820044 bc 12,2,0x25477298
+ 31: Js02o $0x25477298
+
+
+
+. 701 25477238 32
+. 2E 03 FF FF 7C 7A 1B 78 7D 6E 00 D0 7C E0 00 26 54 E7 9F FE 55 6E 0F FE 7C EB 70 39 41 82 00 44
+==== BB 702 (0x25477258) approx BBs exec'd 0 ====
+
+ 0x25477258: 801B01E0 lwz r0,480(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x1E0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547725C: 3BBB01E0 addi r29,r27,480
+ 5: GETL R27, t4
+ 6: ADDL $0x1E0, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0x25477260: 39200000 li r9,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0x25477264: 2F00FFFF cmpi cr6,r0,-1
+ 12: GETL R0, t8
+ 13: MOVL $0xFFFFFFFF, t12
+ 14: CMPL t8, t12, t10 (-rSo)
+ 15: ICRFL t10, $0x6, CR
+ 16: INCEIPL $4
+
+ 0x25477268: 419A0028 bc 12,26,0x25477290
+ 17: Js26o $0x25477290
+
+
+
+. 702 25477258 20
+. 80 1B 01 E0 3B BB 01 E0 39 20 00 00 2F 00 FF FF 41 9A 00 28
+==== BB 703 (0x25477290) approx BBs exec'd 0 ====
+
+ 0x25477290: 2C090000 cmpi cr0,r9,0
+ 0: GETL R9, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25477294: 408200DC bc 4,2,0x25477370
+ 4: Jc02o $0x25477370
+
+
+
+. 703 25477290 8
+. 2C 09 00 00 40 82 00 DC
+==== BB 704 (0x25477298) approx BBs exec'd 0 ====
+
+ 0x25477298: 4092008C bc 4,18,0x25477324
+ 0: Jc18o $0x25477324
+
+
+
+. 704 25477298 4
+. 40 92 00 8C
+==== BB 705 (0x2547729C) approx BBs exec'd 0 ====
+
+ 0x2547729C: 2F170000 cmpi cr6,r23,0
+ 0: GETL R23, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x254772A0: 409A01E4 bc 4,26,0x25477484
+ 4: Jc26o $0x25477484
+
+
+
+. 705 2547729C 8
+. 2F 17 00 00 40 9A 01 E4
+==== BB 706 (0x254772A4) approx BBs exec'd 0 ====
+
+ 0x254772A4: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254772A8: 48000949 bl 0x25477BF0
+ 3: MOVL $0x254772AC, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25477BF0 ($4)
+
+
+
+. 706 254772A4 8
+. 7F E3 FB 78 48 00 09 49
+==== BB 707 _dl_load_cache_lookup(0x25477BF0) approx BBs exec'd 0 ====
+
+ 0x25477BF0: 9421FFC0 stwu r1,-64(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFC0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25477BF4: 7C8802A6 mflr r4
+ 6: GETL LR, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x25477BF8: 4801F409 bl 0x25497000
+ 9: MOVL $0x25477BFC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 707 25477BF0 12
+. 94 21 FF C0 7C 88 02 A6 48 01 F4 09
+==== BB 708 (0x25477BFC) approx BBs exec'd 0 ====
+
+ 0x25477BFC: 93C10038 stw r30,56(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x38, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25477C00: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25477C04: 9261000C stw r19,12(r1)
+ 8: GETL R19, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25477C08: 90810044 stw r4,68(r1)
+ 13: GETL R4, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x44, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25477C0C: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0x25477C10: 92E1001C stw r23,28(r1)
+ 21: GETL R23, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25477C14: 7C771B78 or r23,r3,r3
+ 26: GETL R3, t20
+ 27: PUTL t20, R23
+ 28: INCEIPL $4
+
+ 0x25477C18: 827E04F4 lwz r19,1268(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x4F4, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R19
+ 33: INCEIPL $4
+
+ 0x25477C1C: 92810010 stw r20,16(r1)
+ 34: GETL R20, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x10, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x25477C20: 80130000 lwz r0,0(r19)
+ 39: GETL R19, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R0
+ 42: INCEIPL $4
+
+ 0x25477C24: 92A10014 stw r21,20(r1)
+ 43: GETL R21, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x14, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x25477C28: 70090001 andi. r9,r0,0x1
+ 48: GETL R0, t38
+ 49: ANDL $0x1, t38
+ 50: PUTL t38, R9
+ 51: CMP0L t38, t40 (-rSo)
+ 52: ICRFL t40, $0x0, CR
+ 53: INCEIPL $4
+
+ 0x25477C2C: 92C10018 stw r22,24(r1)
+ 54: GETL R22, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x18, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0x25477C30: 93010020 stw r24,32(r1)
+ 59: GETL R24, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x20, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0x25477C34: 93210024 stw r25,36(r1)
+ 64: GETL R25, t50
+ 65: GETL R1, t52
+ 66: ADDL $0x24, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0x25477C38: 93410028 stw r26,40(r1)
+ 69: GETL R26, t54
+ 70: GETL R1, t56
+ 71: ADDL $0x28, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0x25477C3C: 9361002C stw r27,44(r1)
+ 74: GETL R27, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x2C, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0x25477C40: 93810030 stw r28,48(r1)
+ 79: GETL R28, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x30, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x25477C44: 93A10034 stw r29,52(r1)
+ 84: GETL R29, t66
+ 85: GETL R1, t68
+ 86: ADDL $0x34, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0x25477C48: 93E1003C stw r31,60(r1)
+ 89: GETL R31, t70
+ 90: GETL R1, t72
+ 91: ADDL $0x3C, t72
+ 92: STL t70, (t72)
+ 93: INCEIPL $4
+
+ 0x25477C4C: 91810008 stw r12,8(r1)
+ 94: GETL R12, t74
+ 95: GETL R1, t76
+ 96: ADDL $0x8, t76
+ 97: STL t74, (t76)
+ 98: INCEIPL $4
+
+ 0x25477C50: 4082037C bc 4,2,0x25477FCC
+ 99: Jc02o $0x25477FCC
+
+
+
+. 708 25477BFC 88
+. 93 C1 00 38 7F C8 02 A6 92 61 00 0C 90 81 00 44 7D 80 00 26 92 E1 00 1C 7C 77 1B 78 82 7E 04 F4 92 81 00 10 80 13 00 00 92 A1 00 14 70 09 00 01 92 C1 00 18 93 01 00 20 93 21 00 24 93 41 00 28 93 61 00 2C 93 81 00 30 93 A1 00 34 93 E1 00 3C 91 81 00 08 40 82 03 7C
+==== BB 709 (0x25477C54) approx BBs exec'd 0 ====
+
+ 0x25477C54: 82DE0254 lwz r22,596(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x254, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R22
+ 4: INCEIPL $4
+
+ 0x25477C58: 80760000 lwz r3,0(r22)
+ 5: GETL R22, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0x25477C5C: 2F830000 cmpi cr7,r3,0
+ 9: GETL R3, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x25477C60: 419E00FC bc 12,30,0x25477D5C
+ 13: Js30o $0x25477D5C
+
+
+
+. 709 25477C54 16
+. 82 DE 02 54 80 76 00 00 2F 83 00 00 41 9E 00 FC
+==== BB 710 (0x25477D5C) approx BBs exec'd 0 ====
+
+ 0x25477D5C: 807E0260 lwz r3,608(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x260, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25477D60: 38A00001 li r5,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25477D64: 809E025C lwz r4,604(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x25C, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25477D68: 48004245 bl 0x2547BFAC
+ 13: MOVL $0x25477D6C, t10
+ 14: PUTL t10, LR
+ 15: JMPo-c $0x2547BFAC ($4)
+
+
+
+. 710 25477D5C 16
+. 80 7E 02 60 38 A0 00 01 80 9E 02 5C 48 00 42 45
+==== BB 711 _dl_sysdep_read_whole_file(0x2547BFAC) approx BBs exec'd 0 ====
+
+ 0x2547BFAC: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x2547BFB0: 9421FF60 stwu r1,-160(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFF60, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547BFB4: 93810090 stw r28,144(r1)
+ 9: GETL R28, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x90, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547BFB8: 7C9C2378 or r28,r4,r4
+ 14: GETL R4, t10
+ 15: PUTL t10, R28
+ 16: INCEIPL $4
+
+ 0x2547BFBC: 38800000 li r4,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R4
+ 19: INCEIPL $4
+
+ 0x2547BFC0: 9361008C stw r27,140(r1)
+ 20: GETL R27, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x8C, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x2547BFC4: 93A10094 stw r29,148(r1)
+ 25: GETL R29, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x94, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0x2547BFC8: 7CBD2B78 or r29,r5,r5
+ 30: GETL R5, t22
+ 31: PUTL t22, R29
+ 32: INCEIPL $4
+
+ 0x2547BFCC: 93E1009C stw r31,156(r1)
+ 33: GETL R31, t24
+ 34: GETL R1, t26
+ 35: ADDL $0x9C, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0x2547BFD0: 3B60FFFF li r27,-1
+ 38: MOVL $0xFFFFFFFF, t28
+ 39: PUTL t28, R27
+ 40: INCEIPL $4
+
+ 0x2547BFD4: 93C10098 stw r30,152(r1)
+ 41: GETL R30, t30
+ 42: GETL R1, t32
+ 43: ADDL $0x98, t32
+ 44: STL t30, (t32)
+ 45: INCEIPL $4
+
+ 0x2547BFD8: 900100A4 stw r0,164(r1)
+ 46: GETL R0, t34
+ 47: GETL R1, t36
+ 48: ADDL $0xA4, t36
+ 49: STL t34, (t36)
+ 50: INCEIPL $4
+
+ 0x2547BFDC: 48006005 bl 0x25481FE0
+ 51: MOVL $0x2547BFE0, t38
+ 52: PUTL t38, LR
+ 53: JMPo-c $0x25481FE0 ($4)
+
+
+
+. 711 2547BFAC 52
+. 7C 08 02 A6 94 21 FF 60 93 81 00 90 7C 9C 23 78 38 80 00 00 93 61 00 8C 93 A1 00 94 7C BD 2B 78 93 E1 00 9C 3B 60 FF FF 93 C1 00 98 90 01 00 A4 48 00 60 05
+==== BB 712 (0x2547BFE0) approx BBs exec'd 0 ====
+
+ 0x2547BFE0: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547BFE4: 38A10010 addi r5,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547BFE8: 38600003 li r3,3
+ 9: MOVL $0x3, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x2547BFEC: 7FE4FB78 or r4,r31,r31
+ 12: GETL R31, t8
+ 13: PUTL t8, R4
+ 14: INCEIPL $4
+
+ 0x2547BFF0: 41800040 bc 12,0,0x2547C030
+ 15: Js00o $0x2547C030
+
+
+
+. 712 2547BFE0 20
+. 7C 7F 1B 79 38 A1 00 10 38 60 00 03 7F E4 FB 78 41 80 00 40
+==== BB 713 (0x2547BFF4) approx BBs exec'd 0 ====
+
+ 0x2547BFF4: 48005EB1 bl 0x25481EA4
+ 0: MOVL $0x2547BFF8, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25481EA4 ($4)
+
+
+
+. 713 2547BFF4 4
+. 48 00 5E B1
+==== BB 714 (0x2547BFF8) approx BBs exec'd 0 ====
+
+ 0x2547BFF8: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547BFFC: 419C002C bc 12,28,0x2547C028
+ 4: Js28o $0x2547C028
+
+
+
+. 714 2547BFF8 8
+. 2F 83 00 00 41 9C 00 2C
+==== BB 715 (0x2547C000) approx BBs exec'd 0 ====
+
+ 0x2547C000: 81210044 lwz r9,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547C004: 7FA5EB78 or r5,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547C008: 38C00002 li r6,2
+ 8: MOVL $0x2, t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0x2547C00C: 7FE7FB78 or r7,r31,r31
+ 11: GETL R31, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0x2547C010: 2C890000 cmpi cr1,r9,0
+ 14: GETL R9, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x1, CR
+ 17: INCEIPL $4
+
+ 0x2547C014: 7D244B78 or r4,r9,r9
+ 18: GETL R9, t14
+ 19: PUTL t14, R4
+ 20: INCEIPL $4
+
+ 0x2547C018: 39000000 li r8,0
+ 21: MOVL $0x0, t16
+ 22: PUTL t16, R8
+ 23: INCEIPL $4
+
+ 0x2547C01C: 38600000 li r3,0
+ 24: MOVL $0x0, t18
+ 25: PUTL t18, R3
+ 26: INCEIPL $4
+
+ 0x2547C020: 913C0000 stw r9,0(r28)
+ 27: GETL R9, t20
+ 28: GETL R28, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0x2547C024: 40860034 bc 4,6,0x2547C058
+ 31: Jc06o $0x2547C058
+
+
+
+. 715 2547C000 40
+. 81 21 00 44 7F A5 EB 78 38 C0 00 02 7F E7 FB 78 2C 89 00 00 7D 24 4B 78 39 00 00 00 38 60 00 00 91 3C 00 00 40 86 00 34
+==== BB 716 (0x2547C058) approx BBs exec'd 0 ====
+
+ 0x2547C058: 48006741 bl 0x25482798
+ 0: MOVL $0x2547C05C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25482798 ($4)
+
+
+
+. 716 2547C058 4
+. 48 00 67 41
+==== BB 717 (0x2547C05C) approx BBs exec'd 0 ====
+
+ 0x2547C05C: 7C7B1B78 or r27,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R27
+ 2: INCEIPL $4
+
+ 0x2547C060: 4BFFFFC8 b 0x2547C028
+ 3: JMPo $0x2547C028 ($4)
+
+
+
+. 717 2547C05C 8
+. 7C 7B 1B 78 4B FF FF C8
+==== BB 718 (0x2547C028) approx BBs exec'd 0 ====
+
+ 0x2547C028: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547C02C: 48005FC5 bl 0x25481FF0
+ 3: MOVL $0x2547C030, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25481FF0 ($4)
+
+
+
+. 718 2547C028 8
+. 7F E3 FB 78 48 00 5F C5
+==== BB 719 (0x2547C030) approx BBs exec'd 0 ====
+
+ 0x2547C030: 808100A4 lwz r4,164(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0xA4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547C034: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547C038: 83810090 lwz r28,144(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x90, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0x2547C03C: 8361008C lwz r27,140(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x8C, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R27
+ 17: INCEIPL $4
+
+ 0x2547C040: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547C044: 83A10094 lwz r29,148(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x94, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x2547C048: 83C10098 lwz r30,152(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x98, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0x2547C04C: 83E1009C lwz r31,156(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x9C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R31
+ 35: INCEIPL $4
+
+ 0x2547C050: 382100A0 addi r1,r1,160
+ 36: GETL R1, t28
+ 37: ADDL $0xA0, t28
+ 38: PUTL t28, R1
+ 39: INCEIPL $4
+
+ 0x2547C054: 4E800020 blr
+ 40: GETL LR, t30
+ 41: JMPo-r t30 ($4)
+
+
+
+. 719 2547C030 40
+. 80 81 00 A4 7F 63 DB 78 83 81 00 90 83 61 00 8C 7C 88 03 A6 83 A1 00 94 83 C1 00 98 83 E1 00 9C 38 21 00 A0 4E 80 00 20
+==== BB 720 (0x25477D6C) approx BBs exec'd 0 ====
+
+ 0x25477D6C: 2E03FFFF cmpi cr4,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x25477D70: 7C7F1B78 or r31,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R31
+ 7: INCEIPL $4
+
+ 0x25477D74: 41920154 bc 12,18,0x25477EC8
+ 8: Js18o $0x25477EC8
+
+
+
+. 720 25477D6C 12
+. 2E 03 FF FF 7C 7F 1B 78 41 92 01 54
+==== BB 721 (0x25477D78) approx BBs exec'd 0 ====
+
+ 0x25477D78: 813E025C lwz r9,604(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x25C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25477D7C: 83A90000 lwz r29,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R29
+ 8: INCEIPL $4
+
+ 0x25477D80: 289D0010 cmpli cr1,r29,16
+ 9: GETL R29, t8
+ 10: MOVL $0x10, t12
+ 11: CMPUL t8, t12, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x25477D84: 408500E8 bc 4,5,0x25477E6C
+ 14: Jc05o $0x25477E6C
+
+
+
+. 721 25477D78 16
+. 81 3E 02 5C 83 A9 00 00 28 9D 00 10 40 85 00 E8
+==== BB 722 (0x25477D88) approx BBs exec'd 0 ====
+
+ 0x25477D88: 809E0264 lwz r4,612(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x264, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25477D8C: 38A0000B li r5,11
+ 5: MOVL $0xB, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25477D90: 4800B509 bl 0x25483298
+ 8: MOVL $0x25477D94, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x25483298 ($4)
+
+
+
+. 722 25477D88 12
+. 80 9E 02 64 38 A0 00 0B 48 00 B5 09
+==== BB 723 (0x25477D94) approx BBs exec'd 0 ====
+
+ 0x25477D94: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25477D98: 409A00D4 bc 4,26,0x25477E6C
+ 4: Jc26o $0x25477E6C
+
+
+
+. 723 25477D94 8
+. 2F 03 00 00 40 9A 00 D4
+==== BB 724 (0x25477D9C) approx BBs exec'd 0 ====
+
+ 0x25477D9C: 815F000C lwz r10,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25477DA0: 93F60000 stw r31,0(r22)
+ 5: GETL R31, t4
+ 6: GETL R22, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x25477DA4: 1D0A000C mulli r8,r10,12
+ 9: GETL R10, t8
+ 10: MULL $0xC, t8
+ 11: PUTL t8, R8
+ 12: INCEIPL $4
+
+ 0x25477DA8: 839E0258 lwz r28,600(r30)
+ 13: GETL R30, t10
+ 14: ADDL $0x258, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0x25477DAC: 38E80017 addi r7,r8,23
+ 18: GETL R8, t14
+ 19: ADDL $0x17, t14
+ 20: PUTL t14, R7
+ 21: INCEIPL $4
+
+ 0x25477DB0: 54E50038 rlwinm r5,r7,0,0,28
+ 22: GETL R7, t16
+ 23: ANDL $0xFFFFFFF8, t16
+ 24: PUTL t16, R5
+ 25: INCEIPL $4
+
+ 0x25477DB4: 38C50030 addi r6,r5,48
+ 26: GETL R5, t18
+ 27: ADDL $0x30, t18
+ 28: PUTL t18, R6
+ 29: INCEIPL $4
+
+ 0x25477DB8: 7C7F2A14 add r3,r31,r5
+ 30: GETL R31, t20
+ 31: GETL R5, t22
+ 32: ADDL t20, t22
+ 33: PUTL t22, R3
+ 34: INCEIPL $4
+
+ 0x25477DBC: 7E06E840 cmpl cr4,r6,r29
+ 35: GETL R6, t24
+ 36: GETL R29, t26
+ 37: CMPUL t24, t26, t28 (-rSo)
+ 38: ICRFL t28, $0x4, CR
+ 39: INCEIPL $4
+
+ 0x25477DC0: 4191001C bc 12,17,0x25477DDC
+ 40: Js17o $0x25477DDC
+
+
+
+. 724 25477D9C 40
+. 81 5F 00 0C 93 F6 00 00 1D 0A 00 0C 83 9E 02 58 38 E8 00 17 54 E5 00 38 38 C5 00 30 7C 7F 2A 14 7E 06 E8 40 41 91 00 1C
+==== BB 725 (0x25477DC4) approx BBs exec'd 0 ====
+
+ 0x25477DC4: 809E0268 lwz r4,616(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x268, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25477DC8: 38A00014 li r5,20
+ 5: MOVL $0x14, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25477DCC: 907C0000 stw r3,0(r28)
+ 8: GETL R3, t6
+ 9: GETL R28, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25477DD0: 4800B4C9 bl 0x25483298
+ 12: MOVL $0x25477DD4, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0x25483298 ($4)
+
+
+
+. 725 25477DC4 16
+. 80 9E 02 68 38 A0 00 14 90 7C 00 00 48 00 B4 C9
+==== BB 726 (0x254832B8) approx BBs exec'd 0 ====
+
+ 0x254832B8: 548007BE rlwinm r0,r4,0,30,31
+ 0: GETL R4, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x254832BC: 2C000000 cmpi cr0,r0,0
+ 4: GETL R0, t2
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x254832C0: 4182002C bc 12,2,0x254832EC
+ 8: Js02o $0x254832EC
+
+
+
+. 726 254832B8 12
+. 54 80 07 BE 2C 00 00 00 41 82 00 2C
+==== BB 727 (0x254832EC) approx BBs exec'd 0 ====
+
+ 0x254832EC: 556907BE rlwinm r9,r11,0,30,31
+ 0: GETL R11, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x254832F0: 2F090000 cmpi cr6,r9,0
+ 4: GETL R9, t2
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x254832F4: 409A00C0 bc 4,26,0x254833B4
+ 8: Jc26o $0x254833B4
+
+
+
+. 727 254832EC 12
+. 55 69 07 BE 2F 09 00 00 40 9A 00 C0
+==== BB 728 (0x254832F8) approx BBs exec'd 0 ====
+
+ 0x254832F8: 54A8F0BE rlwinm r8,r5,30,2,31
+ 0: GETL R5, t0
+ 1: SHRL $0x2, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x254832FC: 7D6A5B78 or r10,r11,r11
+ 4: GETL R11, t2
+ 5: PUTL t2, R10
+ 6: INCEIPL $4
+
+ 0x25483300: 550007BE rlwinm r0,r8,0,30,31
+ 7: GETL R8, t4
+ 8: ANDL $0x3, t4
+ 9: PUTL t4, R0
+ 10: INCEIPL $4
+
+ 0x25483304: 7C892378 or r9,r4,r4
+ 11: GETL R4, t6
+ 12: PUTL t6, R9
+ 13: INCEIPL $4
+
+ 0x25483308: 2F800001 cmpi cr7,r0,1
+ 14: GETL R0, t8
+ 15: MOVL $0x1, t12
+ 16: CMPL t8, t12, t10 (-rSo)
+ 17: ICRFL t10, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2548330C: 419E0150 bc 12,30,0x2548345C
+ 19: Js30o $0x2548345C
+
+
+
+. 728 254832F8 24
+. 54 A8 F0 BE 7D 6A 5B 78 55 00 07 BE 7C 89 23 78 2F 80 00 01 41 9E 01 50
+==== BB 729 (0x2548345C) approx BBs exec'd 0 ====
+
+ 0x2548345C: 806B0000 lwz r3,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25483460: 3908FFFF addi r8,r8,-1
+ 4: GETL R8, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0x25483464: 80C40000 lwz r6,0(r4)
+ 8: GETL R4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R6
+ 11: INCEIPL $4
+
+ 0x25483468: 394B0004 addi r10,r11,4
+ 12: GETL R11, t10
+ 13: ADDL $0x4, t10
+ 14: PUTL t10, R10
+ 15: INCEIPL $4
+
+ 0x2548346C: 39240004 addi r9,r4,4
+ 16: GETL R4, t12
+ 17: ADDL $0x4, t12
+ 18: PUTL t12, R9
+ 19: INCEIPL $4
+
+ 0x25483470: 7F033000 cmp cr6,r3,r6
+ 20: GETL R3, t14
+ 21: GETL R6, t16
+ 22: CMPL t14, t16, t18 (-rSo)
+ 23: ICRFL t18, $0x6, CR
+ 24: INCEIPL $4
+
+ 0x25483474: 80EA0000 lwz r7,0(r10)
+ 25: GETL R10, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R7
+ 28: INCEIPL $4
+
+ 0x25483478: 80090000 lwz r0,0(r9)
+ 29: GETL R9, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R0
+ 32: INCEIPL $4
+
+ 0x2548347C: 419A00C8 bc 12,26,0x25483544
+ 33: Js26o $0x25483544
+
+
+
+. 729 2548345C 36
+. 80 6B 00 00 39 08 FF FF 80 C4 00 00 39 4B 00 04 39 24 00 04 7F 03 30 00 80 EA 00 00 80 09 00 00 41 9A 00 C8
+==== BB 730 (0x25483544) approx BBs exec'd 0 ====
+
+ 0x25483544: 7F870000 cmp cr7,r7,r0
+ 0: GETL R7, t0
+ 1: GETL R0, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25483548: 806A0004 lwz r3,4(r10)
+ 5: GETL R10, t6
+ 6: ADDL $0x4, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R3
+ 9: INCEIPL $4
+
+ 0x2548354C: 80C90004 lwz r6,4(r9)
+ 10: GETL R9, t10
+ 11: ADDL $0x4, t10
+ 12: LDL (t10), t12
+ 13: PUTL t12, R6
+ 14: INCEIPL $4
+
+ 0x25483550: 409EFDF4 bc 4,30,0x25483344
+ 15: Jc30o $0x25483344
+
+
+
+. 730 25483544 16
+. 7F 87 00 00 80 6A 00 04 80 C9 00 04 40 9E FD F4
+==== BB 731 (0x25483554) approx BBs exec'd 0 ====
+
+ 0x25483554: 7C033000 cmp cr0,r3,r6
+ 0: GETL R3, t0
+ 1: GETL R6, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25483558: 80EA0008 lwz r7,8(r10)
+ 5: GETL R10, t6
+ 6: ADDL $0x8, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R7
+ 9: INCEIPL $4
+
+ 0x2548355C: 80090008 lwz r0,8(r9)
+ 10: GETL R9, t10
+ 11: ADDL $0x8, t10
+ 12: LDL (t10), t12
+ 13: PUTL t12, R0
+ 14: INCEIPL $4
+
+ 0x25483560: 41A2FDD4 bc 13,2,0x25483334
+ 15: Js02o $0x25483334
+
+
+
+. 731 25483554 16
+. 7C 03 30 00 80 EA 00 08 80 09 00 08 41 A2 FD D4
+==== BB 732 (0x25483334) approx BBs exec'd 0 ====
+
+ 0x25483334: 7C870000 cmp cr1,r7,r0
+ 0: GETL R7, t0
+ 1: GETL R0, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25483338: 806A000C lwz r3,12(r10)
+ 5: GETL R10, t6
+ 6: ADDL $0xC, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R3
+ 9: INCEIPL $4
+
+ 0x2548333C: 80C9000C lwz r6,12(r9)
+ 10: GETL R9, t10
+ 11: ADDL $0xC, t10
+ 12: LDL (t10), t12
+ 13: PUTL t12, R6
+ 14: INCEIPL $4
+
+ 0x25483340: 41860148 bc 12,6,0x25483488
+ 15: Js06o $0x25483488
+
+
+
+. 732 25483334 16
+. 7C 87 00 00 80 6A 00 0C 80 C9 00 0C 41 86 01 48
+==== BB 733 (0x25483488) approx BBs exec'd 0 ====
+
+ 0x25483488: 3908FFFC addi r8,r8,-4
+ 0: GETL R8, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x2548348C: 394A0010 addi r10,r10,16
+ 4: GETL R10, t2
+ 5: ADDL $0x10, t2
+ 6: PUTL t2, R10
+ 7: INCEIPL $4
+
+ 0x25483490: 2F080000 cmpi cr6,r8,0
+ 8: GETL R8, t4
+ 9: CMP0L t4, t6 (-rSo)
+ 10: ICRFL t6, $0x6, CR
+ 11: INCEIPL $4
+
+ 0x25483494: 39290010 addi r9,r9,16
+ 12: GETL R9, t8
+ 13: ADDL $0x10, t8
+ 14: PUTL t8, R9
+ 15: INCEIPL $4
+
+ 0x25483498: 40BAFFD8 bc 5,26,0x25483470
+ 16: Jc26o $0x25483470
+
+
+
+. 733 25483488 20
+. 39 08 FF FC 39 4A 00 10 2F 08 00 00 39 29 00 10 40 BA FF D8
+==== BB 734 (0x2548349C) approx BBs exec'd 0 ====
+
+ 0x2548349C: 7F833000 cmp cr7,r3,r6
+ 0: GETL R3, t0
+ 1: GETL R6, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x254834A0: 7C033010 subfc r0,r3,r6
+ 5: GETL R3, t6
+ 6: GETL R6, t8
+ 7: SBBL t6, t8 (-wCa)
+ 8: PUTL t8, R0
+ 9: INCEIPL $4
+
+ 0x254834A4: 7C000110 subfe r0,r0,r0
+ 10: GETL R0, t10
+ 11: GETL R0, t12
+ 12: SBBL t10, t12 (-rCa-wCa)
+ 13: PUTL t12, R0
+ 14: INCEIPL $4
+
+ 0x254834A8: 7C0003B8 nand r0,r0,r0
+ 15: GETL R0, t14
+ 16: GETL R0, t16
+ 17: ANDL t14, t16
+ 18: NOTL t16
+ 19: PUTL t16, R0
+ 20: INCEIPL $4
+
+ 0x254834AC: 60000001 ori r0,r0,0x1
+ 21: GETL R0, t18
+ 22: ORL $0x1, t18
+ 23: PUTL t18, R0
+ 24: INCEIPL $4
+
+ 0x254834B0: 409EFEA4 bc 4,30,0x25483354
+ 25: Jc30o $0x25483354
+
+
+
+. 734 2548349C 24
+. 7F 83 30 00 7C 03 30 10 7C 00 01 10 7C 00 03 B8 60 00 00 01 40 9E FE A4
+==== BB 735 (0x254834B4) approx BBs exec'd 0 ====
+
+ 0x254834B4: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254834B8: 4BFFFE9C b 0x25483354
+ 3: JMPo $0x25483354 ($4)
+
+
+
+. 735 254834B4 8
+. 38 00 00 00 4B FF FE 9C
+==== BB 736 (0x25483354) approx BBs exec'd 0 ====
+
+ 0x25483354: 2F800000 cmpi cr7,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25483358: 7C030378 or r3,r0,r0
+ 4: GETL R0, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x2548335C: 409E0040 bc 4,30,0x2548339C
+ 7: Jc30o $0x2548339C
+
+
+
+. 736 25483354 12
+. 2F 80 00 00 7C 03 03 78 40 9E 00 40
+==== BB 737 (0x25483360) approx BBs exec'd 0 ====
+
+ 0x25483360: 54BC003A rlwinm r28,r5,0,0,29
+ 0: GETL R5, t0
+ 1: ANDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0x25483364: 54A507BE rlwinm r5,r5,0,30,31
+ 4: GETL R5, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0x25483368: 7C84E214 add r4,r4,r28
+ 8: GETL R4, t4
+ 9: GETL R28, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R4
+ 12: INCEIPL $4
+
+ 0x2548336C: 7D6BE214 add r11,r11,r28
+ 13: GETL R11, t8
+ 14: GETL R28, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R11
+ 17: INCEIPL $4
+
+ 0x25483370: 2C050000 cmpi cr0,r5,0
+ 18: GETL R5, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x0, CR
+ 21: INCEIPL $4
+
+ 0x25483374: 41820024 bc 12,2,0x25483398
+ 22: Js02o $0x25483398
+
+
+
+. 737 25483360 24
+. 54 BC 00 3A 54 A5 07 BE 7C 84 E2 14 7D 6B E2 14 2C 05 00 00 41 82 00 24
+==== BB 738 (0x25477DD4) approx BBs exec'd 0 ====
+
+ 0x25477DD4: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25477DD8: 41A2FE8C bc 13,2,0x25477C64
+ 4: Js02o $0x25477C64
+
+
+
+. 738 25477DD4 8
+. 2C 03 00 00 41 A2 FE 8C
+==== BB 739 (0x25477C64) approx BBs exec'd 0 ====
+
+ 0x25477C64: 81560000 lwz r10,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0x25477C68: 38600000 li r3,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x25477C6C: 2F0AFFFF cmpi cr6,r10,-1
+ 7: GETL R10, t6
+ 8: MOVL $0xFFFFFFFF, t10
+ 9: CMPL t6, t10, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0x25477C70: 419A0094 bc 12,26,0x25477D04
+ 12: Js26o $0x25477D04
+
+
+
+. 739 25477C64 16
+. 81 56 00 00 38 60 00 00 2F 0A FF FF 41 9A 00 94
+==== BB 740 (0x25477C74) approx BBs exec'd 0 ====
+
+ 0x25477C74: 831E0258 lwz r24,600(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x258, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0x25477C78: 3AA00000 li r21,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R21
+ 7: INCEIPL $4
+
+ 0x25477C7C: 83780000 lwz r27,0(r24)
+ 8: GETL R24, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R27
+ 11: INCEIPL $4
+
+ 0x25477C80: 2E1BFFFF cmpi cr4,r27,-1
+ 12: GETL R27, t10
+ 13: MOVL $0xFFFFFFFF, t14
+ 14: CMPL t10, t14, t12 (-rSo)
+ 15: ICRFL t12, $0x4, CR
+ 16: INCEIPL $4
+
+ 0x25477C84: 41920164 bc 12,18,0x25477DE8
+ 17: Js18o $0x25477DE8
+
+
+
+. 740 25477C74 20
+. 83 1E 02 58 3A A0 00 00 83 78 00 00 2E 1B FF FF 41 92 01 64
+==== BB 741 (0x25477C88) approx BBs exec'd 0 ====
+
+ 0x25477C88: 83FB0014 lwz r31,20(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x25477C8C: 839E025C lwz r28,604(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x25C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25477C90: 3B5FFFFF addi r26,r31,-1
+ 10: GETL R31, t8
+ 11: ADDL $0xFFFFFFFF, t8
+ 12: PUTL t8, R26
+ 13: INCEIPL $4
+
+ 0x25477C94: 7F95D000 cmp cr7,r21,r26
+ 14: GETL R21, t10
+ 15: GETL R26, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x25477C98: 83BC0000 lwz r29,0(r28)
+ 19: GETL R28, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R29
+ 22: INCEIPL $4
+
+ 0x25477C9C: 3B800000 li r28,0
+ 23: MOVL $0x0, t20
+ 24: PUTL t20, R28
+ 25: INCEIPL $4
+
+ 0x25477CA0: 7ECAEA14 add r22,r10,r29
+ 26: GETL R10, t22
+ 27: GETL R29, t24
+ 28: ADDL t22, t24
+ 29: PUTL t24, R22
+ 30: INCEIPL $4
+
+ 0x25477CA4: 7F3BB050 subf r25,r27,r22
+ 31: GETL R27, t26
+ 32: GETL R22, t28
+ 33: SUBL t26, t28
+ 34: PUTL t28, R25
+ 35: INCEIPL $4
+
+ 0x25477CA8: 419D004C bc 12,29,0x25477CF4
+ 36: Js29o $0x25477CF4
+
+
+
+. 741 25477C88 36
+. 83 FB 00 14 83 9E 02 5C 3B 5F FF FF 7F 95 D0 00 83 BC 00 00 3B 80 00 00 7E CA EA 14 7F 3B B0 50 41 9D 00 4C
+==== BB 742 (0x25477CAC) approx BBs exec'd 0 ====
+
+ 0x25477CAC: 7C7CD214 add r3,r28,r26
+ 0: GETL R28, t0
+ 1: GETL R26, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25477CB0: 80980000 lwz r4,0(r24)
+ 5: GETL R24, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x25477CB4: 7C7D0E70 srawi r29,r3,1
+ 9: GETL R3, t8
+ 10: SARL $0x1, t8 (-wCa)
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x25477CB8: 7FBD0194 addze r29,r29
+ 13: GETL R29, t10
+ 14: ADCL $0x0, t10 (-rCa-wCa)
+ 15: PUTL t10, R29
+ 16: INCEIPL $4
+
+ 0x25477CBC: 7EE3BB78 or r3,r23,r23
+ 17: GETL R23, t12
+ 18: PUTL t12, R3
+ 19: INCEIPL $4
+
+ 0x25477CC0: 1FFD0018 mulli r31,r29,24
+ 20: GETL R29, t14
+ 21: MULL $0x18, t14
+ 22: PUTL t14, R31
+ 23: INCEIPL $4
+
+ 0x25477CC4: 7D9F2214 add r12,r31,r4
+ 24: GETL R31, t16
+ 25: GETL R4, t18
+ 26: ADDL t16, t18
+ 27: PUTL t18, R12
+ 28: INCEIPL $4
+
+ 0x25477CC8: 800C0034 lwz r0,52(r12)
+ 29: GETL R12, t20
+ 30: ADDL $0x34, t20
+ 31: LDL (t20), t22
+ 32: PUTL t22, R0
+ 33: INCEIPL $4
+
+ 0x25477CCC: 7C00C840 cmpl cr0,r0,r25
+ 34: GETL R0, t24
+ 35: GETL R25, t26
+ 36: CMPUL t24, t26, t28 (-rSo)
+ 37: ICRFL t28, $0x0, CR
+ 38: INCEIPL $4
+
+ 0x25477CD0: 7C9B0214 add r4,r27,r0
+ 39: GETL R27, t30
+ 40: GETL R0, t32
+ 41: ADDL t30, t32
+ 42: PUTL t32, R4
+ 43: INCEIPL $4
+
+ 0x25477CD4: 40800020 bc 4,0,0x25477CF4
+ 44: Jc00o $0x25477CF4
+
+
+
+. 742 25477CAC 44
+. 7C 7C D2 14 80 98 00 00 7C 7D 0E 70 7F BD 01 94 7E E3 BB 78 1F FD 00 18 7D 9F 22 14 80 0C 00 34 7C 00 C8 40 7C 9B 02 14 40 80 00 20
+==== BB 743 (0x25477CD8) approx BBs exec'd 0 ====
+
+ 0x25477CD8: 4BFFFDFD bl 0x25477AD4
+ 0: MOVL $0x25477CDC, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25477AD4 ($4)
+
+
+
+. 743 25477CD8 4
+. 4B FF FD FD
+==== BB 744 _dl_cache_libcmp(0x25477AD4) approx BBs exec'd 0 ====
+
+ 0x25477AD4: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25477AD8: 7C671B78 or r7,r3,r3
+ 6: GETL R3, t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x25477ADC: 89430000 lbz r10,0(r3)
+ 9: GETL R3, t6
+ 10: LDB (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x25477AE0: 2F8A0000 cmpi cr7,r10,0
+ 13: GETL R10, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x7, CR
+ 16: INCEIPL $4
+
+ 0x25477AE4: 419E00DC bc 12,30,0x25477BC0
+ 17: Js30o $0x25477BC0
+
+
+
+. 744 25477AD4 20
+. 94 21 FF F0 7C 67 1B 78 89 43 00 00 2F 8A 00 00 41 9E 00 DC
+==== BB 745 (0x25477AE8) approx BBs exec'd 0 ====
+
+ 0x25477AE8: 88640000 lbz r3,0(r4)
+ 0: GETL R4, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25477AEC: 380AFFD0 addi r0,r10,-48
+ 4: GETL R10, t4
+ 5: ADDL $0xFFFFFFD0, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x25477AF0: 7D4B5378 or r11,r10,r10
+ 8: GETL R10, t6
+ 9: PUTL t6, R11
+ 10: INCEIPL $4
+
+ 0x25477AF4: 28000009 cmpli cr0,r0,9
+ 11: GETL R0, t8
+ 12: MOVL $0x9, t12
+ 13: CMPUL t8, t12, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x25477AF8: 4181008C bc 12,1,0x25477B84
+ 16: Js01o $0x25477B84
+
+
+
+. 745 25477AE8 20
+. 88 64 00 00 38 0A FF D0 7D 4B 53 78 28 00 00 09 41 81 00 8C
+==== BB 746 (0x25477B84) approx BBs exec'd 0 ====
+
+ 0x25477B84: 3903FFD0 addi r8,r3,-48
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFD0, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x25477B88: 7C601B78 or r0,r3,r3
+ 4: GETL R3, t2
+ 5: PUTL t2, R0
+ 6: INCEIPL $4
+
+ 0x25477B8C: 28080009 cmpli cr0,r8,9
+ 7: GETL R8, t4
+ 8: MOVL $0x9, t8
+ 9: CMPUL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25477B90: 40810048 bc 4,1,0x25477BD8
+ 12: Jc01o $0x25477BD8
+
+
+
+. 746 25477B84 16
+. 39 03 FF D0 7C 60 1B 78 28 08 00 09 40 81 00 48
+==== BB 747 (0x25477B94) approx BBs exec'd 0 ====
+
+ 0x25477B94: 5543063E rlwinm r3,r10,0,24,31
+ 0: GETL R10, t0
+ 1: ANDL $0xFF, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x25477B98: 5400063E rlwinm r0,r0,0,24,31
+ 4: GETL R0, t2
+ 5: ANDL $0xFF, t2
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0x25477B9C: 7C830000 cmp cr1,r3,r0
+ 8: GETL R3, t4
+ 9: GETL R0, t6
+ 10: CMPL t4, t6, t8 (-rSo)
+ 11: ICRFL t8, $0x1, CR
+ 12: INCEIPL $4
+
+ 0x25477BA0: 40860044 bc 4,6,0x25477BE4
+ 13: Jc06o $0x25477BE4
+
+
+
+. 747 25477B94 16
+. 55 43 06 3E 54 00 06 3E 7C 83 00 00 40 86 00 44
+==== BB 748 (0x25477BA4) approx BBs exec'd 0 ====
+
+ 0x25477BA4: 8D470001 lbzu r10,1(r7)
+ 0: GETL R7, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R7
+ 3: LDB (t0), t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0x25477BA8: 8C640001 lbzu r3,1(r4)
+ 6: GETL R4, t4
+ 7: ADDL $0x1, t4
+ 8: PUTL t4, R4
+ 9: LDB (t4), t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x25477BAC: 2F0A0000 cmpi cr6,r10,0
+ 12: GETL R10, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x6, CR
+ 15: INCEIPL $4
+
+ 0x25477BB0: 409AFF3C bc 4,26,0x25477AEC
+ 16: Jc26o $0x25477AEC
+
+
+
+. 748 25477BA4 16
+. 8D 47 00 01 8C 64 00 01 2F 0A 00 00 40 9A FF 3C
+==== BB 749 (0x25477AEC) approx BBs exec'd 0 ====
+
+ 0x25477AEC: 380AFFD0 addi r0,r10,-48
+ 0: GETL R10, t0
+ 1: ADDL $0xFFFFFFD0, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x25477AF0: 7D4B5378 or r11,r10,r10
+ 4: GETL R10, t2
+ 5: PUTL t2, R11
+ 6: INCEIPL $4
+
+ 0x25477AF4: 28000009 cmpli cr0,r0,9
+ 7: GETL R0, t4
+ 8: MOVL $0x9, t8
+ 9: CMPUL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25477AF8: 4181008C bc 12,1,0x25477B84
+ 12: Js01o $0x25477B84
+
+
+
+. 749 25477AEC 16
+. 38 0A FF D0 7D 4B 53 78 28 00 00 09 41 81 00 8C
+==== BB 750 (0x25477BE4) approx BBs exec'd 0 ====
+
+ 0x25477BE4: 7C601850 subf r3,r0,r3
+ 0: GETL R0, t0
+ 1: GETL R3, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25477BE8: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x25477BEC: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+
+. 750 25477BE4 12
+. 7C 60 18 50 38 21 00 10 4E 80 00 20
+==== BB 751 (0x25477CDC) approx BBs exec'd 0 ====
+
+ 0x25477CDC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25477CE0: 419E0214 bc 12,30,0x25477EF4
+ 4: Js30o $0x25477EF4
+
+
+
+. 751 25477CDC 8
+. 2F 83 00 00 41 9E 02 14
+==== BB 752 (0x25477CE4) approx BBs exec'd 0 ====
+
+ 0x25477CE4: 409C006C bc 4,28,0x25477D50
+ 0: Jc28o $0x25477D50
+
+
+
+. 752 25477CE4 4
+. 40 9C 00 6C
+==== BB 753 (0x25477D50) approx BBs exec'd 0 ====
+
+ 0x25477D50: 3B5DFFFF addi r26,r29,-1
+ 0: GETL R29, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x25477D54: 7F9CD000 cmp cr7,r28,r26
+ 4: GETL R28, t2
+ 5: GETL R26, t4
+ 6: CMPL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25477D58: 4BFFFF98 b 0x25477CF0
+ 9: JMPo $0x25477CF0 ($4)
+
+
+
+. 753 25477D50 12
+. 3B 5D FF FF 7F 9C D0 00 4B FF FF 98
+==== BB 754 (0x25477CF0) approx BBs exec'd 0 ====
+
+ 0x25477CF0: 409DFFBC bc 4,29,0x25477CAC
+ 0: Jc29o $0x25477CAC
+
+
+
+. 754 25477CF0 4
+. 40 9D FF BC
+==== BB 755 (0x25477CE8) approx BBs exec'd 0 ====
+
+ 0x25477CE8: 3B9D0001 addi r28,r29,1
+ 0: GETL R29, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0x25477CEC: 7F9CD000 cmp cr7,r28,r26
+ 4: GETL R28, t2
+ 5: GETL R26, t4
+ 6: CMPL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25477CF0: 409DFFBC bc 4,29,0x25477CAC
+ 9: Jc29o $0x25477CAC
+
+
+
+. 755 25477CE8 12
+. 3B 9D 00 01 7F 9C D0 00 40 9D FF BC
+==== BB 756 (0x25477AFC) approx BBs exec'd 0 ====
+
+ 0x25477AFC: 38A3FFD0 addi r5,r3,-48
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFD0, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0x25477B00: 7C691B78 or r9,r3,r3
+ 4: GETL R3, t2
+ 5: PUTL t2, R9
+ 6: INCEIPL $4
+
+ 0x25477B04: 28850009 cmpli cr1,r5,9
+ 7: GETL R5, t4
+ 8: MOVL $0x9, t8
+ 9: CMPUL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x25477B08: 418500C4 bc 12,5,0x25477BCC
+ 12: Js05o $0x25477BCC
+
+
+
+. 756 25477AFC 16
+. 38 A3 FF D0 7C 69 1B 78 28 85 00 09 41 85 00 C4
+==== BB 757 (0x25477B0C) approx BBs exec'd 0 ====
+
+ 0x25477B0C: 8D470001 lbzu r10,1(r7)
+ 0: GETL R7, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R7
+ 3: LDB (t0), t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0x25477B10: 556B063E rlwinm r11,r11,0,24,31
+ 6: GETL R11, t4
+ 7: ANDL $0xFF, t4
+ 8: PUTL t4, R11
+ 9: INCEIPL $4
+
+ 0x25477B14: 5529063E rlwinm r9,r9,0,24,31
+ 10: GETL R9, t6
+ 11: ANDL $0xFF, t6
+ 12: PUTL t6, R9
+ 13: INCEIPL $4
+
+ 0x25477B18: 390BFFD0 addi r8,r11,-48
+ 14: GETL R11, t8
+ 15: ADDL $0xFFFFFFD0, t8
+ 16: PUTL t8, R8
+ 17: INCEIPL $4
+
+ 0x25477B1C: 386AFFD0 addi r3,r10,-48
+ 18: GETL R10, t10
+ 19: ADDL $0xFFFFFFD0, t10
+ 20: PUTL t10, R3
+ 21: INCEIPL $4
+
+ 0x25477B20: 3969FFD0 addi r11,r9,-48
+ 22: GETL R9, t12
+ 23: ADDL $0xFFFFFFD0, t12
+ 24: PUTL t12, R11
+ 25: INCEIPL $4
+
+ 0x25477B24: 2B830009 cmpli cr7,r3,9
+ 26: GETL R3, t14
+ 27: MOVL $0x9, t18
+ 28: CMPUL t14, t18, t16 (-rSo)
+ 29: ICRFL t16, $0x7, CR
+ 30: INCEIPL $4
+
+ 0x25477B28: 38840001 addi r4,r4,1
+ 31: GETL R4, t20
+ 32: ADDL $0x1, t20
+ 33: PUTL t20, R4
+ 34: INCEIPL $4
+
+ 0x25477B2C: 419D0020 bc 12,29,0x25477B4C
+ 35: Js29o $0x25477B4C
+
+
+
+. 757 25477B0C 36
+. 8D 47 00 01 55 6B 06 3E 55 29 06 3E 39 0B FF D0 38 6A FF D0 39 69 FF D0 2B 83 00 09 38 84 00 01 41 9D 00 20
+==== BB 758 (0x25477B4C) approx BBs exec'd 0 ====
+
+ 0x25477B4C: 88640000 lbz r3,0(r4)
+ 0: GETL R4, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25477B50: 48000014 b 0x25477B64
+ 4: JMPo $0x25477B64 ($4)
+
+
+
+. 758 25477B4C 8
+. 88 64 00 00 48 00 00 14
+==== BB 759 (0x25477B64) approx BBs exec'd 0 ====
+
+ 0x25477B64: 38A3FFD0 addi r5,r3,-48
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFD0, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0x25477B68: 2B050009 cmpli cr6,r5,9
+ 4: GETL R5, t2
+ 5: MOVL $0x9, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25477B6C: 4099FFE8 bc 4,25,0x25477B54
+ 9: Jc25o $0x25477B54
+
+
+
+. 759 25477B64 12
+. 38 A3 FF D0 2B 05 00 09 40 99 FF E8
+==== BB 760 (0x25477B70) approx BBs exec'd 0 ====
+
+ 0x25477B70: 7F885800 cmp cr7,r8,r11
+ 0: GETL R8, t0
+ 1: GETL R11, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25477B74: 41BE0038 bc 13,30,0x25477BAC
+ 5: Js30o $0x25477BAC
+
+
+
+. 760 25477B70 8
+. 7F 88 58 00 41 BE 00 38
+==== BB 761 (0x25477BAC) approx BBs exec'd 0 ====
+
+ 0x25477BAC: 2F0A0000 cmpi cr6,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25477BB0: 409AFF3C bc 4,26,0x25477AEC
+ 4: Jc26o $0x25477AEC
+
+
+
+. 761 25477BAC 8
+. 2F 0A 00 00 40 9A FF 3C
+==== BB 762 (0x25477BB4) approx BBs exec'd 0 ====
+
+ 0x25477BB4: 7C635050 subf r3,r3,r10
+ 0: GETL R3, t0
+ 1: GETL R10, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25477BB8: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x25477BBC: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+
+. 762 25477BB4 12
+. 7C 63 50 50 38 21 00 10 4E 80 00 20
+==== BB 763 (0x25477EF4) approx BBs exec'd 0 ====
+
+ 0x25477EF4: 2F9D0000 cmpi cr7,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25477EF8: 7FB6EB78 or r22,r29,r29
+ 4: GETL R29, t4
+ 5: PUTL t4, R22
+ 6: INCEIPL $4
+
+ 0x25477EFC: 7FFCFB78 or r28,r31,r31
+ 7: GETL R31, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25477F00: 41BD0020 bc 13,29,0x25477F20
+ 10: Js29o $0x25477F20
+
+
+
+. 763 25477EF4 16
+. 2F 9D 00 00 7F B6 EB 78 7F FC FB 78 41 BD 00 20
+==== BB 764 (0x25477F20) approx BBs exec'd 0 ====
+
+ 0x25477F20: 80D80000 lwz r6,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x25477F24: 7EE3BB78 or r3,r23,r23
+ 4: GETL R23, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x25477F28: 3B9CFFE8 addi r28,r28,-24
+ 7: GETL R28, t6
+ 8: ADDL $0xFFFFFFE8, t6
+ 9: PUTL t6, R28
+ 10: INCEIPL $4
+
+ 0x25477F2C: 7D3F3214 add r9,r31,r6
+ 11: GETL R31, t8
+ 12: GETL R6, t10
+ 13: ADDL t8, t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0x25477F30: 80A9001C lwz r5,28(r9)
+ 16: GETL R9, t12
+ 17: ADDL $0x1C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R5
+ 20: INCEIPL $4
+
+ 0x25477F34: 7C85C840 cmpl cr1,r5,r25
+ 21: GETL R5, t16
+ 22: GETL R25, t18
+ 23: CMPUL t16, t18, t20 (-rSo)
+ 24: ICRFL t20, $0x1, CR
+ 25: INCEIPL $4
+
+ 0x25477F38: 7C9B2A14 add r4,r27,r5
+ 26: GETL R27, t22
+ 27: GETL R5, t24
+ 28: ADDL t22, t24
+ 29: PUTL t24, R4
+ 30: INCEIPL $4
+
+ 0x25477F3C: 4184FFCC bc 12,4,0x25477F08
+ 31: Js04o $0x25477F08
+
+
+
+. 764 25477F20 32
+. 80 D8 00 00 7E E3 BB 78 3B 9C FF E8 7D 3F 32 14 80 A9 00 1C 7C 85 C8 40 7C 9B 2A 14 41 84 FF CC
+==== BB 765 (0x25477F08) approx BBs exec'd 0 ====
+
+ 0x25477F08: 4BFFFBCD bl 0x25477AD4
+ 0: MOVL $0x25477F0C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25477AD4 ($4)
+
+
+
+. 765 25477F08 4
+. 4B FF FB CD
+==== BB 766 (0x25477F0C) approx BBs exec'd 0 ====
+
+ 0x25477F0C: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25477F10: 409A0030 bc 4,26,0x25477F40
+ 4: Jc26o $0x25477F40
+
+
+
+. 766 25477F0C 8
+. 2F 03 00 00 40 9A 00 30
+==== BB 767 (0x25477F14) approx BBs exec'd 0 ====
+
+ 0x25477F14: 37BDFFFF addic. r29,r29,-1
+ 0: GETL R29, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R29
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25477F18: 7F9FE378 or r31,r28,r28
+ 6: GETL R28, t4
+ 7: PUTL t4, R31
+ 8: INCEIPL $4
+
+ 0x25477F1C: 408100A8 bc 4,1,0x25477FC4
+ 9: Jc01o $0x25477FC4
+
+
+
+. 767 25477F14 12
+. 37 BD FF FF 7F 9F E3 78 40 81 00 A8
+==== BB 768 (0x25477F40) approx BBs exec'd 0 ====
+
+ 0x25477F40: 7E1DB000 cmp cr4,r29,r22
+ 0: GETL R29, t0
+ 1: GETL R22, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x25477F44: 80F80000 lwz r7,0(r24)
+ 5: GETL R24, t6
+ 6: LDL (t6), t8
+ 7: PUTL t8, R7
+ 8: INCEIPL $4
+
+ 0x25477F48: 7FFF3A14 add r31,r31,r7
+ 9: GETL R31, t10
+ 10: GETL R7, t12
+ 11: ADDL t10, t12
+ 12: PUTL t12, R31
+ 13: INCEIPL $4
+
+ 0x25477F4C: 3B9F0030 addi r28,r31,48
+ 14: GETL R31, t14
+ 15: ADDL $0x30, t14
+ 16: PUTL t14, R28
+ 17: INCEIPL $4
+
+ 0x25477F50: 40910024 bc 4,17,0x25477F74
+ 18: Jc17o $0x25477F74
+
+
+
+. 768 25477F40 20
+. 7E 1D B0 00 80 F8 00 00 7F FF 3A 14 3B 9F 00 30 40 91 00 24
+==== BB 769 (0x25477F74) approx BBs exec'd 0 ====
+
+ 0x25477F74: 811F0030 lwz r8,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25477F78: 691F0001 xori r31,r8,0x1
+ 5: GETL R8, t4
+ 6: XORL $0x1, t4
+ 7: PUTL t4, R31
+ 8: INCEIPL $4
+
+ 0x25477F7C: 213F0000 subfic r9,r31,0
+ 9: GETL R31, t6
+ 10: MOVL $0x0, t8
+ 11: SBBL t6, t8 (-wCa)
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0x25477F80: 7FE9F914 adde r31,r9,r31
+ 14: GETL R9, t10
+ 15: GETL R31, t12
+ 16: ADCL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R31
+ 18: INCEIPL $4
+
+ 0x25477F84: 69140003 xori r20,r8,0x3
+ 19: GETL R8, t14
+ 20: XORL $0x3, t14
+ 21: PUTL t14, R20
+ 22: INCEIPL $4
+
+ 0x25477F88: 21540000 subfic r10,r20,0
+ 23: GETL R20, t16
+ 24: MOVL $0x0, t18
+ 25: SBBL t16, t18 (-wCa)
+ 26: PUTL t18, R10
+ 27: INCEIPL $4
+
+ 0x25477F8C: 7E8AA114 adde r20,r10,r20
+ 28: GETL R10, t20
+ 29: GETL R20, t22
+ 30: ADCL t20, t22 (-rCa-wCa)
+ 31: PUTL t22, R20
+ 32: INCEIPL $4
+
+ 0x25477F90: 7FEBA379 or. r11,r31,r20
+ 33: GETL R31, t24
+ 34: GETL R20, t26
+ 35: ORL t26, t24
+ 36: PUTL t24, R11
+ 37: CMP0L t24, t28 (-rSo)
+ 38: ICRFL t28, $0x0, CR
+ 39: INCEIPL $4
+
+ 0x25477F94: 41820024 bc 12,2,0x25477FB8
+ 40: Js02o $0x25477FB8
+
+
+
+. 769 25477F74 36
+. 81 1F 00 30 69 1F 00 01 21 3F 00 00 7F E9 F9 14 69 14 00 03 21 54 00 00 7E 8A A1 14 7F EB A3 79 41 82 00 24
+==== BB 770 (0x25477F98) approx BBs exec'd 0 ====
+
+ 0x25477F98: 80FC0008 lwz r7,8(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25477F9C: 7F07C840 cmpl cr6,r7,r25
+ 5: GETL R7, t4
+ 6: GETL R25, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x25477FA0: 40980018 bc 4,24,0x25477FB8
+ 10: Jc24o $0x25477FB8
+
+
+
+. 770 25477F98 12
+. 80 FC 00 08 7F 07 C8 40 40 98 00 18
+==== BB 771 (0x25477FA4) approx BBs exec'd 0 ====
+
+ 0x25477FA4: 2E150000 cmpi cr4,r21,0
+ 0: GETL R21, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25477FA8: 41920128 bc 12,18,0x254780D0
+ 4: Js18o $0x254780D0
+
+
+
+. 771 25477FA4 8
+. 2E 15 00 00 41 92 01 28
+==== BB 772 (0x254780D0) approx BBs exec'd 0 ====
+
+ 0x254780D0: 81330008 lwz r9,8(r19)
+ 0: GETL R19, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x254780D4: 2C890000 cmpi cr1,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x254780D8: 41860010 bc 12,6,0x254780E8
+ 9: Js06o $0x254780E8
+
+
+
+. 772 254780D0 12
+. 81 33 00 08 2C 89 00 00 41 86 00 10
+==== BB 773 (0x254780DC) approx BBs exec'd 0 ====
+
+ 0x254780DC: 817C000C lwz r11,12(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254780E0: 7C0B4840 cmpl cr0,r11,r9
+ 5: GETL R11, t4
+ 6: GETL R9, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x254780E4: 4181FED4 bc 12,1,0x25477FB8
+ 10: Js01o $0x25477FB8
+
+
+
+. 773 254780DC 12
+. 81 7C 00 0C 7C 0B 48 40 41 81 FE D4
+==== BB 774 (0x254780E8) approx BBs exec'd 0 ====
+
+ 0x254780E8: 80D3003C lwz r6,60(r19)
+ 0: GETL R19, t0
+ 1: ADDL $0x3C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254780EC: 3A800000 li r20,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R20
+ 7: INCEIPL $4
+
+ 0x254780F0: 807C0010 lwz r3,16(r28)
+ 8: GETL R28, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0x254780F4: 66898000 oris r9,r20,0x8000
+ 13: MOVL $0x80000000, t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0x254780F8: 801C0014 lwz r0,20(r28)
+ 16: GETL R28, t12
+ 17: ADDL $0x14, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0x254780FC: 7D2548F8 nor r5,r9,r9
+ 21: GETL R9, t16
+ 22: NOTL t16
+ 23: PUTL t16, R5
+ 24: INCEIPL $4
+
+ 0x25478100: 7CCC30F8 nor r12,r6,r6
+ 25: GETL R6, t18
+ 26: NOTL t18
+ 27: PUTL t18, R12
+ 28: INCEIPL $4
+
+ 0x25478104: 7C642838 and r4,r3,r5
+ 29: GETL R3, t20
+ 30: GETL R5, t22
+ 31: ANDL t20, t22
+ 32: PUTL t22, R4
+ 33: INCEIPL $4
+
+ 0x25478108: 7C1C6038 and r28,r0,r12
+ 34: GETL R0, t24
+ 35: GETL R12, t26
+ 36: ANDL t24, t26
+ 37: PUTL t26, R28
+ 38: INCEIPL $4
+
+ 0x2547810C: 7C80E379 or. r0,r4,r28
+ 39: GETL R4, t28
+ 40: GETL R28, t30
+ 41: ORL t30, t28
+ 42: PUTL t28, R0
+ 43: CMP0L t28, t32 (-rSo)
+ 44: ICRFL t32, $0x0, CR
+ 45: INCEIPL $4
+
+ 0x25478110: 4082FEA8 bc 4,2,0x25477FB8
+ 46: Jc02o $0x25477FB8
+
+
+
+. 774 254780E8 44
+. 80 D3 00 3C 3A 80 00 00 80 7C 00 10 66 89 80 00 80 1C 00 14 7D 25 48 F8 7C CC 30 F8 7C 64 28 38 7C 1C 60 38 7C 80 E3 79 40 82 FE A8
+==== BB 775 (0x25478114) approx BBs exec'd 0 ====
+
+ 0x25478114: 83F30038 lwz r31,56(r19)
+ 0: GETL R19, t0
+ 1: ADDL $0x38, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x25478118: 7EA7DA14 add r21,r7,r27
+ 5: GETL R7, t4
+ 6: GETL R27, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R21
+ 9: INCEIPL $4
+
+ 0x2547811C: 7F1F4000 cmp cr6,r31,r8
+ 10: GETL R31, t8
+ 11: GETL R8, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x6, CR
+ 14: INCEIPL $4
+
+ 0x25478120: 409AFE98 bc 4,26,0x25477FB8
+ 15: Jc26o $0x25477FB8
+
+
+
+. 775 25478114 16
+. 83 F3 00 38 7E A7 DA 14 7F 1F 40 00 40 9A FE 98
+==== BB 776 (0x25478124) approx BBs exec'd 0 ====
+
+ 0x25478124: 4BFFFBD0 b 0x25477CF4
+ 0: JMPo $0x25477CF4 ($4)
+
+
+
+. 776 25478124 4
+. 4B FF FB D0
+==== BB 777 (0x25477CF4) approx BBs exec'd 0 ====
+
+ 0x25477CF4: 82F30000 lwz r23,0(r19)
+ 0: GETL R19, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R23
+ 3: INCEIPL $4
+
+ 0x25477CF8: 72EB0001 andi. r11,r23,0x1
+ 4: GETL R23, t4
+ 5: ANDL $0x1, t4
+ 6: PUTL t4, R11
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x25477CFC: 408201AC bc 4,2,0x25477EA8
+ 10: Jc02o $0x25477EA8
+
+
+
+. 777 25477CF4 12
+. 82 F3 00 00 72 EB 00 01 40 82 01 AC
+==== BB 778 (0x25477D00) approx BBs exec'd 0 ====
+
+ 0x25477D00: 7EA3AB78 or r3,r21,r21
+ 0: GETL R21, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25477D04: 82610044 lwz r19,68(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x44, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R19
+ 7: INCEIPL $4
+
+ 0x25477D08: 80E10008 lwz r7,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0x25477D0C: 7E6803A6 mtlr r19
+ 13: GETL R19, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x25477D10: 82810010 lwz r20,16(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x10, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R20
+ 20: INCEIPL $4
+
+ 0x25477D14: 8261000C lwz r19,12(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R19
+ 25: INCEIPL $4
+
+ 0x25477D18: 7CE08120 mtcrf 0x8,r7
+ 26: GETL R7, t20
+ 27: ICRFL t20, $0x4, CR
+ 28: INCEIPL $4
+
+ 0x25477D1C: 82A10014 lwz r21,20(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x14, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R21
+ 33: INCEIPL $4
+
+ 0x25477D20: 82C10018 lwz r22,24(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x18, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R22
+ 38: INCEIPL $4
+
+ 0x25477D24: 82E1001C lwz r23,28(r1)
+ 39: GETL R1, t30
+ 40: ADDL $0x1C, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R23
+ 43: INCEIPL $4
+
+ 0x25477D28: 83010020 lwz r24,32(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x20, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R24
+ 48: INCEIPL $4
+
+ 0x25477D2C: 83210024 lwz r25,36(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x24, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R25
+ 53: INCEIPL $4
+
+ 0x25477D30: 83410028 lwz r26,40(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x28, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R26
+ 58: INCEIPL $4
+
+ 0x25477D34: 8361002C lwz r27,44(r1)
+ 59: GETL R1, t46
+ 60: ADDL $0x2C, t46
+ 61: LDL (t46), t48
+ 62: PUTL t48, R27
+ 63: INCEIPL $4
+
+ 0x25477D38: 83810030 lwz r28,48(r1)
+ 64: GETL R1, t50
+ 65: ADDL $0x30, t50
+ 66: LDL (t50), t52
+ 67: PUTL t52, R28
+ 68: INCEIPL $4
+
+ 0x25477D3C: 83A10034 lwz r29,52(r1)
+ 69: GETL R1, t54
+ 70: ADDL $0x34, t54
+ 71: LDL (t54), t56
+ 72: PUTL t56, R29
+ 73: INCEIPL $4
+
+ 0x25477D40: 83C10038 lwz r30,56(r1)
+ 74: GETL R1, t58
+ 75: ADDL $0x38, t58
+ 76: LDL (t58), t60
+ 77: PUTL t60, R30
+ 78: INCEIPL $4
+
+ 0x25477D44: 83E1003C lwz r31,60(r1)
+ 79: GETL R1, t62
+ 80: ADDL $0x3C, t62
+ 81: LDL (t62), t64
+ 82: PUTL t64, R31
+ 83: INCEIPL $4
+
+ 0x25477D48: 38210040 addi r1,r1,64
+ 84: GETL R1, t66
+ 85: ADDL $0x40, t66
+ 86: PUTL t66, R1
+ 87: INCEIPL $4
+
+ 0x25477D4C: 4E800020 blr
+ 88: GETL LR, t68
+ 89: JMPo-r t68 ($4)
+
+
+
+. 778 25477D00 80
+. 7E A3 AB 78 82 61 00 44 80 E1 00 08 7E 68 03 A6 82 81 00 10 82 61 00 0C 7C E0 81 20 82 A1 00 14 82 C1 00 18 82 E1 00 1C 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+==== BB 779 (0x254772AC) approx BBs exec'd 0 ====
+
+ 0x254772AC: 7C721B79 or. r18,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R18
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254772B0: 7F800026 mfcr r28
+ 5: GETL CR, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x254772B4: 41820020 bc 12,2,0x254772D4
+ 8: Js02o $0x254772D4
+
+
+
+. 779 254772AC 12
+. 7C 72 1B 79 7F 80 00 26 41 82 00 20
+==== BB 780 (0x254772B8) approx BBs exec'd 0 ====
+
+ 0x254772B8: 418E017C bc 12,14,0x25477434
+ 0: Js14o $0x25477434
+
+
+
+. 780 254772B8 4
+. 41 8E 01 7C
+==== BB 781 (0x254772BC) approx BBs exec'd 0 ====
+
+ 0x254772BC: 7F69DB78 or r9,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x254772C0: 83A901FC lwz r29,508(r9)
+ 3: GETL R9, t2
+ 4: ADDL $0x1FC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x254772C4: 73A90800 andi. r9,r29,0x800
+ 8: GETL R29, t6
+ 9: ANDL $0x800, t6
+ 10: PUTL t6, R9
+ 11: CMP0L t6, t8 (-rSo)
+ 12: ICRFL t8, $0x0, CR
+ 13: INCEIPL $4
+
+ 0x254772C8: 408201D4 bc 4,2,0x2547749C
+ 14: Jc02o $0x2547749C
+
+
+
+. 781 254772BC 16
+. 7F 69 DB 78 83 A9 01 FC 73 A9 08 00 40 82 01 D4
+==== BB 782 (0x254772CC) approx BBs exec'd 0 ====
+
+ 0x254772CC: 7F880120 mtcrf 0x80,r28
+ 0: GETL R28, t0
+ 1: ICRFL t0, $0x0, CR
+ 2: INCEIPL $4
+
+ 0x254772D0: 408200C8 bc 4,2,0x25477398
+ 3: Jc02o $0x25477398
+
+
+
+. 782 254772CC 8
+. 7F 88 01 20 40 82 00 C8
+==== BB 783 (0x25477398) approx BBs exec'd 0 ====
+
+ 0x25477398: 7E439378 or r3,r18,r18
+ 0: GETL R18, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547739C: 38810018 addi r4,r1,24
+ 3: GETL R1, t2
+ 4: ADDL $0x18, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0x254773A0: 4BFFF0A5 bl 0x25476444
+ 7: MOVL $0x254773A4, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0x25476444 ($4)
+
+
+
+. 783 25477398 12
+. 7E 43 93 78 38 81 00 18 4B FF F0 A5
+==== BB 784 (0x254765B4) approx BBs exec'd 0 ====
+
+ 0x254765B4: 80FD0010 lwz r7,16(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254765B8: 2F070020 cmpi cr6,r7,32
+ 5: GETL R7, t4
+ 6: MOVL $0x20, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x254765BC: 409AFFA0 bc 4,26,0x2547655C
+ 10: Jc26o $0x2547655C
+
+
+
+. 784 254765B4 12
+. 80 FD 00 10 2F 07 00 20 40 9A FF A0
+==== BB 785 (0x254765C0) approx BBs exec'd 0 ====
+
+ 0x254765C0: 815D001C lwz r10,28(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x254765C4: 2B8A0003 cmpli cr7,r10,3
+ 5: GETL R10, t4
+ 6: MOVL $0x3, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x254765C8: 40BDFF94 bc 5,29,0x2547655C
+ 10: Jc29o $0x2547655C
+
+
+
+. 785 254765C0 12
+. 81 5D 00 1C 2B 8A 00 03 40 BD FF 94
+==== BB 786 (0x254765CC) approx BBs exec'd 0 ====
+
+ 0x254765CC: 819D0004 lwz r12,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x254765D0: 38A00000 li r5,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x254765D4: 81180000 lwz r8,0(r24)
+ 8: GETL R24, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R8
+ 11: INCEIPL $4
+
+ 0x254765D8: 3ABF0010 addi r21,r31,16
+ 12: GETL R31, t10
+ 13: ADDL $0x10, t10
+ 14: PUTL t10, R21
+ 15: INCEIPL $4
+
+ 0x254765DC: 380C0020 addi r0,r12,32
+ 16: GETL R12, t12
+ 17: ADDL $0x20, t12
+ 18: PUTL t12, R0
+ 19: INCEIPL $4
+
+ 0x254765E0: 7D6CC214 add r11,r12,r24
+ 20: GETL R12, t14
+ 21: GETL R24, t16
+ 22: ADDL t14, t16
+ 23: PUTL t16, R11
+ 24: INCEIPL $4
+
+ 0x254765E4: 7C004040 cmpl cr0,r0,r8
+ 25: GETL R0, t18
+ 26: GETL R8, t20
+ 27: CMPUL t18, t20, t22 (-rSo)
+ 28: ICRFL t22, $0x0, CR
+ 29: INCEIPL $4
+
+ 0x254765E8: 7F23CB78 or r3,r25,r25
+ 30: GETL R25, t24
+ 31: PUTL t24, R3
+ 32: INCEIPL $4
+
+ 0x254765EC: 7D846378 or r4,r12,r12
+ 33: GETL R12, t26
+ 34: PUTL t26, R4
+ 35: INCEIPL $4
+
+ 0x254765F0: 3B6B0004 addi r27,r11,4
+ 36: GETL R11, t28
+ 37: ADDL $0x4, t28
+ 38: PUTL t28, R27
+ 39: INCEIPL $4
+
+ 0x254765F4: 418100FC bc 12,1,0x254766F0
+ 40: Js01o $0x254766F0
+
+
+
+. 786 254765CC 44
+. 81 9D 00 04 38 A0 00 00 81 18 00 00 3A BF 00 10 38 0C 00 20 7D 6C C2 14 7C 00 40 40 7F 23 CB 78 7D 84 63 78 3B 6B 00 04 41 81 00 FC
+==== BB 787 (0x254765F8) approx BBs exec'd 0 ====
+
+ 0x254765F8: 809E0170 lwz r4,368(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x170, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254765FC: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25476600: 38A00010 li r5,16
+ 8: MOVL $0x10, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x25476604: 4800CC95 bl 0x25483298
+ 11: MOVL $0x25476608, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483298 ($4)
+
+
+
+. 787 254765F8 16
+. 80 9E 01 70 7F 63 DB 78 38 A0 00 10 48 00 CC 95
+==== BB 788 (0x25483310) approx BBs exec'd 0 ====
+
+ 0x25483310: 28000001 cmpli cr0,r0,1
+ 0: GETL R0, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25483314: 41800228 bc 12,0,0x2548353C
+ 5: Js00o $0x2548353C
+
+
+
+. 788 25483310 8
+. 28 00 00 01 41 80 02 28
+==== BB 789 (0x2548353C) approx BBs exec'd 0 ====
+
+ 0x2548353C: 80EB0000 lwz r7,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25483540: 80040000 lwz r0,0(r4)
+ 4: GETL R4, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0x25483544: 7F870000 cmp cr7,r7,r0
+ 8: GETL R7, t8
+ 9: GETL R0, t10
+ 10: CMPL t8, t10, t12 (-rSo)
+ 11: ICRFL t12, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x25483548: 806A0004 lwz r3,4(r10)
+ 13: GETL R10, t14
+ 14: ADDL $0x4, t14
+ 15: LDL (t14), t16
+ 16: PUTL t16, R3
+ 17: INCEIPL $4
+
+ 0x2548354C: 80C90004 lwz r6,4(r9)
+ 18: GETL R9, t18
+ 19: ADDL $0x4, t18
+ 20: LDL (t18), t20
+ 21: PUTL t20, R6
+ 22: INCEIPL $4
+
+ 0x25483550: 409EFDF4 bc 4,30,0x25483344
+ 23: Jc30o $0x25483344
+
+
+
+. 789 2548353C 24
+. 80 EB 00 00 80 04 00 00 7F 87 00 00 80 6A 00 04 80 C9 00 04 40 9E FD F4
+==== BB 790 (0x25476608) approx BBs exec'd 0 ====
+
+ 0x25476608: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547660C: 419A0084 bc 12,26,0x25476690
+ 4: Js26o $0x25476690
+
+
+
+. 790 25476608 8
+. 2F 03 00 00 41 9A 00 84
+==== BB 791 (0x25476690) approx BBs exec'd 0 ====
+
+ 0x25476690: 813B0010 lwz r9,16(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25476694: 8B5B0017 lbz r26,23(r27)
+ 5: GETL R27, t4
+ 6: ADDL $0x17, t4
+ 7: LDB (t4), t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0x25476698: 8BBB001B lbz r29,27(r27)
+ 10: GETL R27, t8
+ 11: ADDL $0x1B, t8
+ 12: LDB (t8), t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0x2547669C: 2F890000 cmpi cr7,r9,0
+ 15: GETL R9, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x254766A0: 5755402E rlwinm r21,r26,8,0,23
+ 19: GETL R26, t16
+ 20: SHLL $0x8, t16
+ 21: PUTL t16, R21
+ 22: INCEIPL $4
+
+ 0x254766A4: 8B1B001F lbz r24,31(r27)
+ 23: GETL R27, t18
+ 24: ADDL $0x1F, t18
+ 25: LDB (t18), t20
+ 26: PUTL t20, R24
+ 27: INCEIPL $4
+
+ 0x254766A8: 7F95EA14 add r28,r21,r29
+ 28: GETL R21, t22
+ 29: GETL R29, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R28
+ 32: INCEIPL $4
+
+ 0x254766AC: 5796402E rlwinm r22,r28,8,0,23
+ 33: GETL R28, t26
+ 34: SHLL $0x8, t26
+ 35: PUTL t26, R22
+ 36: INCEIPL $4
+
+ 0x254766B0: 7C16C214 add r0,r22,r24
+ 37: GETL R22, t28
+ 38: GETL R24, t30
+ 39: ADDL t28, t30
+ 40: PUTL t30, R0
+ 41: INCEIPL $4
+
+ 0x254766B4: 409E001C bc 4,30,0x254766D0
+ 42: Jc30o $0x254766D0
+
+
+
+. 791 25476690 40
+. 81 3B 00 10 8B 5B 00 17 8B BB 00 1B 2F 89 00 00 57 55 40 2E 8B 1B 00 1F 7F 95 EA 14 57 96 40 2E 7C 16 C2 14 40 9E 00 1C
+==== BB 792 (0x254766B8) approx BBs exec'd 0 ====
+
+ 0x254766B8: 807E04F4 lwz r3,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254766BC: 81230008 lwz r9,8(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x254766C0: 2C090000 cmpi cr0,r9,0
+ 10: GETL R9, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x0, CR
+ 13: INCEIPL $4
+
+ 0x254766C4: 41A2FEAC bc 13,2,0x25476570
+ 14: Js02o $0x25476570
+
+
+
+. 792 254766B8 16
+. 80 7E 04 F4 81 23 00 08 2C 09 00 00 41 A2 FE AC
+==== BB 793 (0x254766C8) approx BBs exec'd 0 ====
+
+ 0x254766C8: 7C890040 cmpl cr1,r9,r0
+ 0: GETL R9, t0
+ 1: GETL R0, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254766CC: 40A4FEA4 bc 5,4,0x25476570
+ 5: Jc04o $0x25476570
+
+
+
+. 793 254766C8 8
+. 7C 89 00 40 40 A4 FE A4
+==== BB 794 (0x254773A4) approx BBs exec'd 0 ====
+
+ 0x254773A4: 2E03FFFF cmpi cr4,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x254773A8: 7C7A1B78 or r26,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R26
+ 7: INCEIPL $4
+
+ 0x254773AC: 41B2FF2C bc 13,18,0x254772D8
+ 8: Js18o $0x254772D8
+
+
+
+. 794 254773A4 12
+. 2E 03 FF FF 7C 7A 1B 78 41 B2 FF 2C
+==== BB 795 (0x254773B0) approx BBs exec'd 0 ====
+
+ 0x254773B0: 7E439378 or r3,r18,r18
+ 0: GETL R18, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254773B4: 4800BC1D bl 0x25482FD0
+ 3: MOVL $0x254773B8, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25482FD0 ($4)
+
+
+
+. 795 254773B0 8
+. 7E 43 93 78 48 00 BC 1D
+==== BB 796 (0x254773B8) approx BBs exec'd 0 ====
+
+ 0x254773B8: 3BA30001 addi r29,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x254773BC: 7FA3EB78 or r3,r29,r29
+ 4: GETL R29, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0x254773C0: 48020665 bl 0x25497A24
+ 7: MOVL $0x254773C4, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0x25497A24 ($4)
+
+
+
+. 796 254773B8 12
+. 3B A3 00 01 7F A3 EB 78 48 02 06 65
+==== BB 797 (0x254773C4) approx BBs exec'd 0 ====
+
+ 0x254773C4: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254773C8: 2F030000 cmpi cr6,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x6, CR
+ 6: INCEIPL $4
+
+ 0x254773CC: 419A0014 bc 12,26,0x254773E0
+ 7: Js26o $0x254773E0
+
+
+
+. 797 254773C4 12
+. 38 00 00 00 2F 03 00 00 41 9A 00 14
+==== BB 798 (0x254773D0) approx BBs exec'd 0 ====
+
+ 0x254773D0: 7E449378 or r4,r18,r18
+ 0: GETL R18, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254773D4: 7FA5EB78 or r5,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x254773D8: 4800C809 bl 0x25483BE0
+ 6: MOVL $0x254773DC, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25483BE0 ($4)
+
+
+
+. 798 254773D0 12
+. 7E 44 93 78 7F A5 EB 78 48 00 C8 09
+==== BB 799 (0x25483EE8) approx BBs exec'd 0 ====
+
+ 0x25483EE8: 81640000 lwz r11,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25483EEC: 38A5FFFF addi r5,r5,-1
+ 4: GETL R5, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25483EF0: 81440004 lwz r10,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x25483EF4: 38840008 addi r4,r4,8
+ 13: GETL R4, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R4
+ 16: INCEIPL $4
+
+ 0x25483EF8: 4BFFFF54 b 0x25483E4C
+ 17: JMPo $0x25483E4C ($4)
+
+
+
+. 799 25483EE8 20
+. 81 64 00 00 38 A5 FF FF 81 44 00 04 38 84 00 08 4B FF FF 54
+==== BB 800 (0x254773DC) approx BBs exec'd 0 ====
+
+ 0x254773DC: 7C601B78 or r0,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254773E0: 2F800000 cmpi cr7,r0,0
+ 3: GETL R0, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x7, CR
+ 6: INCEIPL $4
+
+ 0x254773E4: 90010228 stw r0,552(r1)
+ 7: GETL R0, t6
+ 8: GETL R1, t8
+ 9: ADDL $0x228, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x254773E8: 409EFEEC bc 4,30,0x254772D4
+ 12: Jc30o $0x254772D4
+
+
+
+. 800 254773DC 16
+. 7C 60 1B 78 2F 80 00 00 90 01 02 28 40 9E FE EC
+==== BB 801 (0x254772D4) approx BBs exec'd 0 ====
+
+ 0x254772D4: 40920050 bc 4,18,0x25477324
+ 0: Jc18o $0x25477324
+
+
+
+. 801 254772D4 4
+. 40 92 00 50
+==== BB 802 (0x25477324) approx BBs exec'd 0 ====
+
+ 0x25477324: 82F40000 lwz r23,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R23
+ 3: INCEIPL $4
+
+ 0x25477328: 72E90001 andi. r9,r23,0x1
+ 4: GETL R23, t4
+ 5: ANDL $0x1, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547732C: 4182FAD8 bc 12,2,0x25476E04
+ 10: Js02o $0x25476E04
+
+
+
+. 802 25477324 12
+. 82 F4 00 00 72 E9 00 01 41 82 FA D8
+==== BB 803 (0x25483DC4) approx BBs exec'd 0 ====
+
+ 0x25483DC4: 81240000 lwz r9,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25483DC8: 3884FFF4 addi r4,r4,-12
+ 4: GETL R4, t4
+ 5: ADDL $0xFFFFFFF4, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25483DCC: 80040010 lwz r0,16(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x25483DD0: 3863FFF0 addi r3,r3,-16
+ 13: GETL R3, t10
+ 14: ADDL $0xFFFFFFF0, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0x25483DD4: 38A50003 addi r5,r5,3
+ 17: GETL R5, t12
+ 18: ADDL $0x3, t12
+ 19: PUTL t12, R5
+ 20: INCEIPL $4
+
+ 0x25483DD8: 91230010 stw r9,16(r3)
+ 21: GETL R9, t14
+ 22: GETL R3, t16
+ 23: ADDL $0x10, t16
+ 24: STL t14, (t16)
+ 25: INCEIPL $4
+
+ 0x25483DDC: 4BFFFF58 b 0x25483D34
+ 26: JMPo $0x25483D34 ($4)
+
+
+
+. 803 25483DC4 28
+. 81 24 00 00 38 84 FF F4 80 04 00 10 38 63 FF F0 38 A5 00 03 91 23 00 10 4B FF FF 58
+==== BB 804 (0x25483D34) approx BBs exec'd 0 ====
+
+ 0x25483D34: 81240014 lwz r9,20(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25483D38: 90030014 stw r0,20(r3)
+ 5: GETL R0, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x14, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25483D3C: 80040018 lwz r0,24(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0x25483D40: 91230018 stw r9,24(r3)
+ 15: GETL R9, t12
+ 16: GETL R3, t14
+ 17: ADDL $0x18, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25483D44: 34A5FFF8 addic. r5,r5,-8
+ 20: GETL R5, t16
+ 21: ADCL $0xFFFFFFF8, t16 (-wCa)
+ 22: PUTL t16, R5
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x0, CR
+ 25: INCEIPL $4
+
+ 0x25483D48: 8124001C lwz r9,28(r4)
+ 26: GETL R4, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R9
+ 30: INCEIPL $4
+
+ 0x25483D4C: 9003001C stw r0,28(r3)
+ 31: GETL R0, t24
+ 32: GETL R3, t26
+ 33: ADDL $0x1C, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x25483D50: 38840020 addi r4,r4,32
+ 36: GETL R4, t28
+ 37: ADDL $0x20, t28
+ 38: PUTL t28, R4
+ 39: INCEIPL $4
+
+ 0x25483D54: 38630020 addi r3,r3,32
+ 40: GETL R3, t30
+ 41: ADDL $0x20, t30
+ 42: PUTL t30, R3
+ 43: INCEIPL $4
+
+ 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
+ 44: Jc02o $0x25483D0C
+
+
+
+. 804 25483D34 40
+. 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+==== BB 805 (0x254758A8) approx BBs exec'd 0 ====
+
+ 0x254758A8: 54EF2834 rlwinm r15,r7,5,0,26
+ 0: GETL R7, t0
+ 1: SHLL $0x5, t0
+ 2: PUTL t0, R15
+ 3: INCEIPL $4
+
+ 0x254758AC: 801D0008 lwz r0,8(r29)
+ 4: GETL R29, t2
+ 5: ADDL $0x8, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254758B0: 7DCFDA14 add r14,r15,r27
+ 9: GETL R15, t6
+ 10: GETL R27, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R14
+ 13: INCEIPL $4
+
+ 0x254758B4: 3BBD0020 addi r29,r29,32
+ 14: GETL R29, t10
+ 15: ADDL $0x20, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0x254758B8: 7C8EE840 cmpl cr1,r14,r29
+ 18: GETL R14, t12
+ 19: GETL R29, t14
+ 20: CMPUL t12, t14, t16 (-rSo)
+ 21: ICRFL t16, $0x1, CR
+ 22: INCEIPL $4
+
+ 0x254758BC: 901A014C stw r0,332(r26)
+ 23: GETL R0, t18
+ 24: GETL R26, t20
+ 25: ADDL $0x14C, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0x254758C0: 4185FF4C bc 12,5,0x2547580C
+ 28: Js05o $0x2547580C
+
+
+
+. 805 254758A8 28
+. 54 EF 28 34 80 1D 00 08 7D CF DA 14 3B BD 00 20 7C 8E E8 40 90 1A 01 4C 41 85 FF 4C
+==== BB 806 (0x25475830) approx BBs exec'd 0 ====
+
+ 0x25475830: 7F090040 cmpl cr6,r9,r0
+ 0: GETL R9, t0
+ 1: GETL R0, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25475834: 4199024C bc 12,25,0x25475A80
+ 5: Js25o $0x25475A80
+
+
+
+. 806 25475830 8
+. 7F 09 00 40 41 99 02 4C
+==== BB 807 (0x25475838) approx BBs exec'd 0 ====
+
+ 0x25475838: 2C090007 cmpi cr0,r9,7
+ 0: GETL R9, t0
+ 1: MOVL $0x7, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547583C: 4082FFBC bc 4,2,0x254757F8
+ 5: Jc02o $0x254757F8
+
+
+
+. 807 25475838 8
+. 2C 09 00 07 40 82 FF BC
+==== BB 808 (0x25475A80) approx BBs exec'd 0 ====
+
+ 0x25475A80: 3D406474 lis r10,25716
+ 0: MOVL $0x64740000, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x25475A84: 614FE552 ori r15,r10,0xE552
+ 3: MOVL $0x6474E552, t2
+ 4: PUTL t2, R15
+ 5: INCEIPL $4
+
+ 0x25475A88: 7F897800 cmp cr7,r9,r15
+ 6: GETL R9, t4
+ 7: GETL R15, t6
+ 8: CMPL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x25475A8C: 409EFD6C bc 4,30,0x254757F8
+ 11: Jc30o $0x254757F8
+
+
+
+. 808 25475A80 16
+. 3D 40 64 74 61 4F E5 52 7F 89 78 00 40 9E FD 6C
+==== BB 809 (0x25475A90) approx BBs exec'd 0 ====
+
+ 0x25475A90: 811D0008 lwz r8,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25475A94: 911A0234 stw r8,564(r26)
+ 5: GETL R8, t4
+ 6: GETL R26, t6
+ 7: ADDL $0x234, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25475A98: 80DD0014 lwz r6,20(r29)
+ 10: GETL R29, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R6
+ 14: INCEIPL $4
+
+ 0x25475A9C: 90DA0238 stw r6,568(r26)
+ 15: GETL R6, t12
+ 16: GETL R26, t14
+ 17: ADDL $0x238, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25475AA0: 4BFFFD58 b 0x254757F8
+ 20: JMPo $0x254757F8 ($4)
+
+
+
+. 809 25475A90 20
+. 81 1D 00 08 91 1A 02 34 80 DD 00 14 90 DA 02 38 4B FF FD 58
+==22130== Reading syms from /lib/tls/librt-2.3.4.so (0xEE80000)
+==22130== object doesn't have any debug info
+==== BB 810 (0x254759E0) approx BBs exec'd 0 ====
+
+ 0x254759E0: 7C9CC840 cmpl cr1,r28,r25
+ 0: GETL R28, t0
+ 1: GETL R25, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254759E4: 4085002C bc 4,5,0x25475A10
+ 5: Jc05o $0x25475A10
+
+
+
+. 810 254759E0 8
+. 7C 9C C8 40 40 85 00 2C
+==== BB 811 (0x25483884) approx BBs exec'd 0 ====
+
+ 0x25483884: 7C0037EC dcbz r0,r6
+ 0: GETL R6, t0
+ 1: ANDL $0xFFFFFFE0, t0
+ 2: MOVL $0x0, t2
+ 3: STL t2, (t0)
+ 4: ADDL $0x4, t0
+ 5: STL t2, (t0)
+ 6: ADDL $0x4, t0
+ 7: STL t2, (t0)
+ 8: ADDL $0x4, t0
+ 9: STL t2, (t0)
+ 10: ADDL $0x4, t0
+ 11: STL t2, (t0)
+ 12: ADDL $0x4, t0
+ 13: STL t2, (t0)
+ 14: ADDL $0x4, t0
+ 15: STL t2, (t0)
+ 16: ADDL $0x4, t0
+ 17: STL t2, (t0)
+ 18: INCEIPL $4
+
+ 0x25483888: 38C60020 addi r6,r6,32
+ 19: GETL R6, t4
+ 20: ADDL $0x20, t4
+ 21: PUTL t4, R6
+ 22: INCEIPL $4
+
+ 0x2548388C: 3920FFE0 li r9,-32
+ 23: MOVL $0xFFFFFFE0, t6
+ 24: PUTL t6, R9
+ 25: INCEIPL $4
+
+ 0x25483890: 40990010 bc 4,25,0x254838A0
+ 26: Jc25o $0x254838A0
+
+
+
+. 811 25483884 16
+. 7C 00 37 EC 38 C6 00 20 39 20 FF E0 40 99 00 10
+==== BB 812 (0x25483894) approx BBs exec'd 0 ====
+
+ 0x25483894: 7C0037EC dcbz r0,r6
+ 0: GETL R6, t0
+ 1: ANDL $0xFFFFFFE0, t0
+ 2: MOVL $0x0, t2
+ 3: STL t2, (t0)
+ 4: ADDL $0x4, t0
+ 5: STL t2, (t0)
+ 6: ADDL $0x4, t0
+ 7: STL t2, (t0)
+ 8: ADDL $0x4, t0
+ 9: STL t2, (t0)
+ 10: ADDL $0x4, t0
+ 11: STL t2, (t0)
+ 12: ADDL $0x4, t0
+ 13: STL t2, (t0)
+ 14: ADDL $0x4, t0
+ 15: STL t2, (t0)
+ 16: ADDL $0x4, t0
+ 17: STL t2, (t0)
+ 18: INCEIPL $4
+
+ 0x25483898: 7C0737EC dcbz r7,r6
+ 19: GETL R6, t4
+ 20: GETL R7, t6
+ 21: ADDL t6, t4
+ 22: ANDL $0xFFFFFFE0, t4
+ 23: MOVL $0x0, t8
+ 24: STL t8, (t4)
+ 25: ADDL $0x4, t4
+ 26: STL t8, (t4)
+ 27: ADDL $0x4, t4
+ 28: STL t8, (t4)
+ 29: ADDL $0x4, t4
+ 30: STL t8, (t4)
+ 31: ADDL $0x4, t4
+ 32: STL t8, (t4)
+ 33: ADDL $0x4, t4
+ 34: STL t8, (t4)
+ 35: ADDL $0x4, t4
+ 36: STL t8, (t4)
+ 37: ADDL $0x4, t4
+ 38: STL t8, (t4)
+ 39: INCEIPL $4
+
+ 0x2548389C: 38C60040 addi r6,r6,64
+ 40: GETL R6, t10
+ 41: ADDL $0x40, t10
+ 42: PUTL t10, R6
+ 43: INCEIPL $4
+
+ 0x254838A0: 2A850000 cmpli cr5,r5,0
+ 44: GETL R5, t12
+ 45: MOVL $0x0, t16
+ 46: CMPUL t12, t16, t14 (-rSo)
+ 47: ICRFL t14, $0x5, CR
+ 48: INCEIPL $4
+
+ 0x254838A4: 4182007C bc 12,2,0x25483920
+ 49: Js02o $0x25483920
+
+
+
+. 812 25483894 20
+. 7C 00 37 EC 7C 07 37 EC 38 C6 00 40 2A 85 00 00 41 82 00 7C
+==== BB 813 (0x254760C0) approx BBs exec'd 0 ====
+
+ 0x254760C0: 80BD0014 lwz r5,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x254760C4: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254760C8: 7C9CB850 subf r4,r28,r23
+ 8: GETL R28, t6
+ 9: GETL R23, t8
+ 10: SUBL t6, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x254760CC: 38C00032 li r6,50
+ 13: MOVL $0x32, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x254760D0: 38E0FFFF li r7,-1
+ 16: MOVL $0xFFFFFFFF, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0x254760D4: 39000000 li r8,0
+ 19: MOVL $0x0, t14
+ 20: PUTL t14, R8
+ 21: INCEIPL $4
+
+ 0x254760D8: 4800C6C1 bl 0x25482798
+ 22: MOVL $0x254760DC, t16
+ 23: PUTL t16, LR
+ 24: JMPo-c $0x25482798 ($4)
+
+
+
+. 813 254760C0 28
+. 80 BD 00 14 7F 83 E3 78 7C 9C B8 50 38 C0 00 32 38 E0 FF FF 39 00 00 00 48 00 C6 C1
+==== BB 814 (0x254760DC) approx BBs exec'd 0 ====
+
+ 0x254760DC: 2C83FFFF cmpi cr1,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254760E0: 4086F938 bc 4,6,0x25475A18
+ 5: Jc06o $0x25475A18
+
+
+
+. 814 254760DC 8
+. 2C 83 FF FF 40 86 F9 38
+==== BB 815 (0x25476054) approx BBs exec'd 0 ====
+
+ 0x25476054: 556C083C rlwinm r12,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0x25476058: 7D800E70 srawi r0,r12,1
+ 4: GETL R12, t2
+ 5: SARL $0x1, t2 (-wCa)
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0x2547605C: 7C1700F8 nor r23,r0,r0
+ 8: GETL R0, t4
+ 9: NOTL t4
+ 10: PUTL t4, R23
+ 11: INCEIPL $4
+
+ 0x25476060: 20000031 subfic r0,r0,49
+ 12: GETL R0, t6
+ 13: MOVL $0x31, t8
+ 14: SBBL t6, t8 (-wCa)
+ 15: PUTL t8, R0
+ 16: INCEIPL $4
+
+ 0x25476064: 2B170002 cmpli cr6,r23,2
+ 17: GETL R23, t10
+ 18: MOVL $0x2, t14
+ 19: CMPUL t10, t14, t12 (-rSo)
+ 20: ICRFL t12, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x25476068: 40B9FC38 bc 5,25,0x25475CA0
+ 22: Jc25o $0x25475CA0
+
+
+
+. 815 25476054 24
+. 55 6C 08 3C 7D 80 0E 70 7C 17 00 F8 20 00 00 31 2B 17 00 02 40 B9 FC 38
+==== BB 816 (0x2547606C) approx BBs exec'd 0 ====
+
+ 0x2547606C: 7F2B2850 subf r25,r11,r5
+ 0: GETL R11, t0
+ 1: GETL R5, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x25476070: 2A19000B cmpli cr4,r25,11
+ 5: GETL R25, t4
+ 6: MOVL $0xB, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x4, CR
+ 9: INCEIPL $4
+
+ 0x25476074: 419100C4 bc 12,17,0x25476138
+ 10: Js17o $0x25476138
+
+
+
+. 816 2547606C 12
+. 7F 2B 28 50 2A 19 00 0B 41 91 00 C4
+==== BB 817 (0x25476078) approx BBs exec'd 0 ====
+
+ 0x25476078: 7C0B2050 subf r0,r11,r4
+ 0: GETL R11, t0
+ 1: GETL R4, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547607C: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25476080: 4BFFFC24 b 0x25475CA4
+ 9: JMPo $0x25475CA4 ($4)
+
+
+
+. 817 25476078 12
+. 7C 0B 20 50 54 00 10 3A 4B FF FC 24
+==== BB 818 (0x25475D68) approx BBs exec'd 0 ====
+
+ 0x25475D68: 81280078 lwz r9,120(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x78, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475D6C: 2C090000 cmpi cr0,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25475D70: 41820030 bc 12,2,0x25475DA0
+ 9: Js02o $0x25475DA0
+
+
+
+. 818 25475D68 12
+. 81 28 00 78 2C 09 00 00 41 82 00 30
+==== BB 819 (0x25475F88) approx BBs exec'd 0 ====
+
+ 0x25475F88: 80910050 lwz r4,80(r17)
+ 0: GETL R17, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25475F8C: C81F0028 lfd f0,40(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x28, t4
+ 7: FPU_RQ (t4), 0x0:0x0
+ 8: INCEIPL $4
+
+ 0x25475F90: 2C840000 cmpi cr1,r4,0
+ 9: GETL R4, t6
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x1, CR
+ 12: INCEIPL $4
+
+ 0x25475F94: D81A01D0 stfd f0,464(r26)
+ 13: GETL R26, t10
+ 14: ADDL $0x1D0, t10
+ 15: FPU_WQ 0x0:0x0, (t10)
+ 16: INCEIPL $4
+
+ 0x25475F98: C9BF0030 lfd f13,48(r31)
+ 17: GETL R31, t12
+ 18: ADDL $0x30, t12
+ 19: FPU_RQ (t12), 0x0:0xD
+ 20: INCEIPL $4
+
+ 0x25475F9C: D9BA01D8 stfd f13,472(r26)
+ 21: GETL R26, t14
+ 22: ADDL $0x1D8, t14
+ 23: FPU_WQ 0x0:0xD, (t14)
+ 24: INCEIPL $4
+
+ 0x25475FA0: 4186FEB0 bc 12,6,0x25475E50
+ 25: Js06o $0x25475E50
+
+
+
+. 819 25475F88 28
+. 80 91 00 50 C8 1F 00 28 2C 84 00 00 D8 1A 01 D0 C9 BF 00 30 D9 BA 01 D8 41 86 FE B0
+==== BB 820 (0x2547A100) approx BBs exec'd 0 ====
+
+ 0x2547A100: 907F0014 stw r3,20(r31)
+ 0: GETL R3, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547A104: 80610014 lwz r3,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547A108: 83E10008 lwz r31,8(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0x2547A10C: 38210010 addi r1,r1,16
+ 15: GETL R1, t12
+ 16: ADDL $0x10, t12
+ 17: PUTL t12, R1
+ 18: INCEIPL $4
+
+ 0x2547A110: 7C6803A6 mtlr r3
+ 19: GETL R3, t14
+ 20: PUTL t14, LR
+ 21: INCEIPL $4
+
+ 0x2547A114: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 820 2547A100 24
+. 90 7F 00 14 80 61 00 14 83 E1 00 08 38 21 00 10 7C 68 03 A6 4E 80 00 20
+==== BB 821 (0x2547B624) approx BBs exec'd 0 ====
+
+ 0x2547B624: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547B628: 81610008 lwz r11,8(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x2547B62C: 80C10280 lwz r6,640(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x280, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R6
+ 12: INCEIPL $4
+
+ 0x2547B630: 80A10270 lwz r5,624(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x270, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R5
+ 17: INCEIPL $4
+
+ 0x2547B634: 80810274 lwz r4,628(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x274, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R4
+ 22: INCEIPL $4
+
+ 0x2547B638: 93E50000 stw r31,0(r5)
+ 23: GETL R31, t18
+ 24: GETL R5, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0x2547B63C: 91660000 stw r11,0(r6)
+ 27: GETL R11, t22
+ 28: GETL R6, t24
+ 29: STL t22, (t24)
+ 30: INCEIPL $4
+
+ 0x2547B640: 93E40000 stw r31,0(r4)
+ 31: GETL R31, t26
+ 32: GETL R4, t28
+ 33: STL t26, (t28)
+ 34: INCEIPL $4
+
+ 0x2547B644: 814102A4 lwz r10,676(r1)
+ 35: GETL R1, t30
+ 36: ADDL $0x2A4, t30
+ 37: LDL (t30), t32
+ 38: PUTL t32, R10
+ 39: INCEIPL $4
+
+ 0x2547B648: 83C10298 lwz r30,664(r1)
+ 40: GETL R1, t34
+ 41: ADDL $0x298, t34
+ 42: LDL (t34), t36
+ 43: PUTL t36, R30
+ 44: INCEIPL $4
+
+ 0x2547B64C: 83E1029C lwz r31,668(r1)
+ 45: GETL R1, t38
+ 46: ADDL $0x29C, t38
+ 47: LDL (t38), t40
+ 48: PUTL t40, R31
+ 49: INCEIPL $4
+
+ 0x2547B650: 7D4803A6 mtlr r10
+ 50: GETL R10, t42
+ 51: PUTL t42, LR
+ 52: INCEIPL $4
+
+ 0x2547B654: 382102A0 addi r1,r1,672
+ 53: GETL R1, t44
+ 54: ADDL $0x2A0, t44
+ 55: PUTL t44, R1
+ 56: INCEIPL $4
+
+ 0x2547B658: 4E800020 blr
+ 57: GETL LR, t46
+ 58: JMPo-r t46 ($4)
+
+
+
+. 821 2547B624 56
+. 38 60 00 00 81 61 00 08 80 C1 02 80 80 A1 02 70 80 81 02 74 93 E5 00 00 91 66 00 00 93 E4 00 00 81 41 02 A4 83 C1 02 98 83 E1 02 9C 7D 48 03 A6 38 21 02 A0 4E 80 00 20
+==== BB 822 (0x2547A400) approx BBs exec'd 0 ====
+
+ 0x2547A400: 833F0034 lwz r25,52(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x2547A404: 2F190000 cmpi cr6,r25,0
+ 5: GETL R25, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547A408: 409A01AC bc 4,26,0x2547A5B4
+ 9: Jc26o $0x2547A5B4
+
+
+
+. 822 2547A400 12
+. 83 3F 00 34 2F 19 00 00 40 9A 01 AC
+==== BB 823 (0x2547A40C) approx BBs exec'd 0 ====
+
+ 0x2547A40C: 815F0024 lwz r10,36(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547A410: 808A0180 lwz r4,384(r10)
+ 5: GETL R10, t4
+ 6: ADDL $0x180, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x2547A414: 54893FBE rlwinm r9,r4,7,30,31
+ 10: GETL R4, t8
+ 11: ROLL $0x7, t8
+ 12: ANDL $0x3, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x2547A418: 2F890000 cmpi cr7,r9,0
+ 15: GETL R9, t10
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2547A41C: 409E0044 bc 4,30,0x2547A460
+ 19: Jc30o $0x2547A460
+
+
+
+. 823 2547A40C 20
+. 81 5F 00 24 80 8A 01 80 54 89 3F BE 2F 89 00 00 40 9E 00 44
+==== BB 824 (0x2547A420) approx BBs exec'd 0 ====
+
+ 0x2547A420: 80010000 lwz r0,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547A424: 38C00001 li r6,1
+ 4: MOVL $0x1, t4
+ 5: PUTL t4, R6
+ 6: INCEIPL $4
+
+ 0x2547A428: 80FF000C lwz r7,12(r31)
+ 7: GETL R31, t6
+ 8: ADDL $0xC, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R7
+ 11: INCEIPL $4
+
+ 0x2547A42C: 9401FFE0 stwu r0,-32(r1)
+ 12: GETL R0, t10
+ 13: GETL R1, t12
+ 14: ADDL $0xFFFFFFE0, t12
+ 15: PUTL t12, R1
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547A430: 3A810017 addi r20,r1,23
+ 18: GETL R1, t14
+ 19: ADDL $0x17, t14
+ 20: PUTL t14, R20
+ 21: INCEIPL $4
+
+ 0x2547A434: 56850036 rlwinm r5,r20,0,0,27
+ 22: GETL R20, t16
+ 23: ANDL $0xFFFFFFF0, t16
+ 24: PUTL t16, R5
+ 25: INCEIPL $4
+
+ 0x2547A438: 91250008 stw r9,8(r5)
+ 26: GETL R9, t18
+ 27: GETL R5, t20
+ 28: ADDL $0x8, t20
+ 29: STL t18, (t20)
+ 30: INCEIPL $4
+
+ 0x2547A43C: 91250000 stw r9,0(r5)
+ 31: GETL R9, t22
+ 32: GETL R5, t24
+ 33: STL t22, (t24)
+ 34: INCEIPL $4
+
+ 0x2547A440: 39270001 addi r9,r7,1
+ 35: GETL R7, t26
+ 36: ADDL $0x1, t26
+ 37: PUTL t26, R9
+ 38: INCEIPL $4
+
+ 0x2547A444: 90B30008 stw r5,8(r19)
+ 39: GETL R5, t28
+ 40: GETL R19, t30
+ 41: ADDL $0x8, t30
+ 42: STL t28, (t30)
+ 43: INCEIPL $4
+
+ 0x2547A448: 91450004 stw r10,4(r5)
+ 44: GETL R10, t32
+ 45: GETL R5, t34
+ 46: ADDL $0x4, t34
+ 47: STL t32, (t34)
+ 48: INCEIPL $4
+
+ 0x2547A44C: 826A0180 lwz r19,384(r10)
+ 49: GETL R10, t36
+ 50: ADDL $0x180, t36
+ 51: LDL (t36), t38
+ 52: PUTL t38, R19
+ 53: INCEIPL $4
+
+ 0x2547A450: 913F000C stw r9,12(r31)
+ 54: GETL R9, t40
+ 55: GETL R31, t42
+ 56: ADDL $0xC, t42
+ 57: STL t40, (t42)
+ 58: INCEIPL $4
+
+ 0x2547A454: 50D3C94C rlwimi r19,r6,25,5,6
+ 59: GETL R19, t44
+ 60: GETL R6, t46
+ 61: ROLL $0x19, t46
+ 62: ANDL $0x6000000, t46
+ 63: ANDL $0xF9FFFFFF, t44
+ 64: ORL t44, t46
+ 65: PUTL t46, R19
+ 66: INCEIPL $4
+
+ 0x2547A458: 926A0180 stw r19,384(r10)
+ 67: GETL R19, t48
+ 68: GETL R10, t50
+ 69: ADDL $0x180, t50
+ 70: STL t48, (t50)
+ 71: INCEIPL $4
+
+ 0x2547A45C: 7CB32B78 or r19,r5,r5
+ 72: GETL R5, t52
+ 73: PUTL t52, R19
+ 74: INCEIPL $4
+
+ 0x2547A460: 2C980000 cmpi cr1,r24,0
+ 75: GETL R24, t54
+ 76: CMP0L t54, t56 (-rSo)
+ 77: ICRFL t56, $0x1, CR
+ 78: INCEIPL $4
+
+ 0x2547A464: 41860010 bc 12,6,0x2547A474
+ 79: Js06o $0x2547A474
+
+
+
+. 824 2547A420 72
+. 80 01 00 00 38 C0 00 01 80 FF 00 0C 94 01 FF E0 3A 81 00 17 56 85 00 36 91 25 00 08 91 25 00 00 39 27 00 01 90 B3 00 08 91 45 00 04 82 6A 01 80 91 3F 00 0C 50 D3 C9 4C 92 6A 01 80 7C B3 2B 78 2C 98 00 00 41 86 00 10
+==== BB 825 (0x2547A474) approx BBs exec'd 0 ====
+
+ 0x2547A474: 853C0008 lwzu r9,8(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x8, t0
+ 2: PUTL t0, R28
+ 3: LDL (t0), t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x2547A478: 2C090000 cmpi cr0,r9,0
+ 6: GETL R9, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547A47C: 4182043C bc 12,2,0x2547A8B8
+ 10: Js02o $0x2547A8B8
+
+
+
+. 825 2547A474 12
+. 85 3C 00 08 2C 09 00 00 41 82 04 3C
+==== BB 826 (0x25482F94) approx BBs exec'd 0 ====
+
+ 0x25482F94: 8CC40001 lbzu r6,1(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R4
+ 3: LDB (t0), t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0x25482F98: 2C850000 cmpi cr1,r5,0
+ 6: GETL R5, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x25482F9C: 41860020 bc 12,6,0x25482FBC
+ 10: Js06o $0x25482FBC
+
+
+
+. 826 25482F94 12
+. 8C C4 00 01 2C 85 00 00 41 86 00 20
+==== BB 827 (0x25475840) approx BBs exec'd 0 ====
+
+ 0x25475840: 801D0014 lwz r0,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475844: 2F000000 cmpi cr6,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25475848: 41BAFFB0 bc 13,26,0x254757F8
+ 9: Js26o $0x254757F8
+
+
+
+. 827 25475840 12
+. 80 1D 00 14 2F 00 00 00 41 BA FF B0
+==== BB 828 (0x2547584C) approx BBs exec'd 0 ====
+
+ 0x2547584C: 901A0220 stw r0,544(r26)
+ 0: GETL R0, t0
+ 1: GETL R26, t2
+ 2: ADDL $0x220, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25475850: 817D001C lwz r11,28(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25475854: 917A0224 stw r11,548(r26)
+ 10: GETL R11, t8
+ 11: GETL R26, t10
+ 12: ADDL $0x224, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475858: 813D001C lwz r9,28(r29)
+ 15: GETL R29, t12
+ 16: ADDL $0x1C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x2547585C: 2F890000 cmpi cr7,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x7, CR
+ 23: INCEIPL $4
+
+ 0x25475860: 419E07EC bc 12,30,0x2547604C
+ 24: Js30o $0x2547604C
+
+
+
+. 828 2547584C 24
+. 90 1A 02 20 81 7D 00 1C 91 7A 02 24 81 3D 00 1C 2F 89 00 00 41 9E 07 EC
+==== BB 829 (0x25475864) approx BBs exec'd 0 ====
+
+ 0x25475864: 80BD0008 lwz r5,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25475868: 3929FFFF addi r9,r9,-1
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x2547586C: 7CA04838 and r0,r5,r9
+ 9: GETL R5, t6
+ 10: GETL R9, t8
+ 11: ANDL t6, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x25475870: 901A0228 stw r0,552(r26)
+ 14: GETL R0, t10
+ 15: GETL R26, t12
+ 16: ADDL $0x228, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x25475874: 81DA0180 lwz r14,384(r26)
+ 19: GETL R26, t14
+ 20: ADDL $0x180, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R14
+ 23: INCEIPL $4
+
+ 0x25475878: 3CC04000 lis r6,16384
+ 24: MOVL $0x40000000, t18
+ 25: PUTL t18, R6
+ 26: INCEIPL $4
+
+ 0x2547587C: 815D0010 lwz r10,16(r29)
+ 27: GETL R29, t20
+ 28: ADDL $0x10, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R10
+ 31: INCEIPL $4
+
+ 0x25475880: 55C80002 rlwinm r8,r14,0,0,1
+ 32: GETL R14, t24
+ 33: ANDL $0xC0000000, t24
+ 34: PUTL t24, R8
+ 35: INCEIPL $4
+
+ 0x25475884: 7C083000 cmp cr0,r8,r6
+ 36: GETL R8, t26
+ 37: GETL R6, t28
+ 38: CMPL t26, t28, t30 (-rSo)
+ 39: ICRFL t30, $0x0, CR
+ 40: INCEIPL $4
+
+ 0x25475888: 915A021C stw r10,540(r26)
+ 41: GETL R10, t32
+ 42: GETL R26, t34
+ 43: ADDL $0x21C, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0x2547588C: 809D0008 lwz r4,8(r29)
+ 46: GETL R29, t36
+ 47: ADDL $0x8, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R4
+ 50: INCEIPL $4
+
+ 0x25475890: 909A0218 stw r4,536(r26)
+ 51: GETL R4, t40
+ 52: GETL R26, t42
+ 53: ADDL $0x218, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0x25475894: 40820A24 bc 4,2,0x254762B8
+ 56: Jc02o $0x254762B8
+
+
+
+. 829 25475864 52
+. 80 BD 00 08 39 29 FF FF 7C A0 48 38 90 1A 02 28 81 DA 01 80 3C C0 40 00 81 5D 00 10 55 C8 00 02 7C 08 30 00 91 5A 02 1C 80 9D 00 08 90 9A 02 18 40 82 0A 24
+==== BB 830 (0x25475898) approx BBs exec'd 0 ====
+
+ 0x25475898: 4800837D bl 0x2547DC14
+ 0: MOVL $0x2547589C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547DC14 ($4)
+
+
+
+. 830 25475898 4
+. 48 00 83 7D
+==== BB 831 _dl_next_tls_modid(0x2547DC14) approx BBs exec'd 0 ====
+
+ 0x2547DC14: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547DC18: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x2547DC1C: 480193E5 bl 0x25497000
+ 9: MOVL $0x2547DC20, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 831 2547DC14 12
+. 94 21 FF F0 7D 88 02 A6 48 01 93 E5
+==== BB 832 (0x2547DC20) approx BBs exec'd 0 ====
+
+ 0x2547DC20: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547DC24: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547DC28: 7D8803A6 mtlr r12
+ 8: GETL R12, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0x2547DC2C: 80DE04C8 lwz r6,1224(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x4C8, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x2547DC30: 8806040C lbz r0,1036(r6)
+ 16: GETL R6, t12
+ 17: ADDL $0x40C, t12
+ 18: LDB (t12), t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0x2547DC34: 2F800000 cmpi cr7,r0,0
+ 21: GETL R0, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x2547DC38: 409E0020 bc 4,30,0x2547DC58
+ 25: Jc30o $0x2547DC58
+
+
+
+. 832 2547DC20 28
+. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 80 DE 04 C8 88 06 04 0C 2F 80 00 00 40 9E 00 20
+==== BB 833 (0x2547DC3C) approx BBs exec'd 0 ====
+
+ 0x2547DC3C: 81460408 lwz r10,1032(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0x408, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547DC40: 390A0001 addi r8,r10,1
+ 5: GETL R10, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x2547DC44: 91060408 stw r8,1032(r6)
+ 9: GETL R8, t6
+ 10: GETL R6, t8
+ 11: ADDL $0x408, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547DC48: 7D034378 or r3,r8,r8
+ 14: GETL R8, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0x2547DC4C: 83C10008 lwz r30,8(r1)
+ 17: GETL R1, t12
+ 18: ADDL $0x8, t12
+ 19: LDL (t12), t14
+ 20: PUTL t14, R30
+ 21: INCEIPL $4
+
+ 0x2547DC50: 38210010 addi r1,r1,16
+ 22: GETL R1, t16
+ 23: ADDL $0x10, t16
+ 24: PUTL t16, R1
+ 25: INCEIPL $4
+
+ 0x2547DC54: 4E800020 blr
+ 26: GETL LR, t18
+ 27: JMPo-r t18 ($4)
+
+
+
+. 833 2547DC3C 28
+. 81 46 04 08 39 0A 00 01 91 06 04 08 7D 03 43 78 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 834 (0x2547589C) approx BBs exec'd 0 ====
+
+ 0x2547589C: A0FA0154 lhz r7,340(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x154, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254758A0: 907A0230 stw r3,560(r26)
+ 5: GETL R3, t4
+ 6: GETL R26, t6
+ 7: ADDL $0x230, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x254758A4: 4BFFFF54 b 0x254757F8
+ 10: JMPo $0x254757F8 ($4)
+
+
+
+. 834 2547589C 12
+. A0 FA 01 54 90 7A 02 30 4B FF FF 54
+==22130== Reading syms from /lib/tls/libc-2.3.4.so (0xFE60000)
+==22130== object doesn't have any debug info
+==== BB 835 (0x254837B0) approx BBs exec'd 0 ====
+
+ 0x254837B0: 9088FFFC stw r4,-4(r8)
+ 0: GETL R4, t0
+ 1: GETL R8, t2
+ 2: ADDL $0xFFFFFFFC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254837B4: 9488FFF8 stwu r4,-8(r8)
+ 5: GETL R4, t4
+ 6: GETL R8, t6
+ 7: ADDL $0xFFFFFFF8, t6
+ 8: PUTL t6, R8
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x254837B8: 41840014 bc 12,4,0x254837CC
+ 11: Js04o $0x254837CC
+
+
+
+. 835 254837B0 12
+. 90 88 FF FC 94 88 FF F8 41 84 00 14
+==== BB 836 (0x254837D4) approx BBs exec'd 0 ====
+
+ 0x254837D4: 28840000 cmpli cr1,r4,0
+ 0: GETL R4, t0
+ 1: MOVL $0x0, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254837D8: 54A70035 rlwinm. r7,r5,0,0,26
+ 5: GETL R5, t6
+ 6: ANDL $0xFFFFFFE0, t6
+ 7: PUTL t6, R7
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x254837DC: 7CA01120 mtcrf 0x1,r5
+ 11: GETL R5, t10
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x254837E0: 418601A0 bc 12,6,0x25483980
+ 14: Js06o $0x25483980
+
+
+
+. 836 254837D4 16
+. 28 84 00 00 54 A7 00 35 7C A0 11 20 41 86 01 A0
+==== BB 837 (0x25475D74) approx BBs exec'd 0 ====
+
+ 0x25475D74: 80090004 lwz r0,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475D78: 700A0002 andi. r10,r0,0x2
+ 5: GETL R0, t4
+ 6: ANDL $0x2, t4
+ 7: PUTL t4, R10
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25475D7C: 901A0200 stw r0,512(r26)
+ 11: GETL R0, t8
+ 12: GETL R26, t10
+ 13: ADDL $0x200, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25475D80: 41820008 bc 12,2,0x25475D88
+ 16: Js02o $0x25475D88
+
+
+
+. 837 25475D74 16
+. 80 09 00 04 70 0A 00 02 90 1A 02 00 41 82 00 08
+==== BB 838 (0x25475D88) approx BBs exec'd 0 ====
+
+ 0x25475D88: 700B0004 andi. r11,r0,0x4
+ 0: GETL R0, t0
+ 1: ANDL $0x4, t0
+ 2: PUTL t0, R11
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25475D8C: 41820008 bc 12,2,0x25475D94
+ 6: Js02o $0x25475D94
+
+
+
+. 838 25475D88 8
+. 70 0B 00 04 41 82 00 08
+==== BB 839 (0x25475D94) approx BBs exec'd 0 ====
+
+ 0x25475D94: 700A0008 andi. r10,r0,0x8
+ 0: GETL R0, t0
+ 1: ANDL $0x8, t0
+ 2: PUTL t0, R10
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25475D98: 41820008 bc 12,2,0x25475DA0
+ 6: Js02o $0x25475DA0
+
+
+
+. 839 25475D94 8
+. 70 0A 00 08 41 82 00 08
+==== BB 840 (0x25475D9C) approx BBs exec'd 0 ====
+
+ 0x25475D9C: 91280060 stw r9,96(r8)
+ 0: GETL R9, t0
+ 1: GETL R8, t2
+ 2: ADDL $0x60, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25475DA0: 81280098 lwz r9,152(r8)
+ 5: GETL R8, t4
+ 6: ADDL $0x98, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25475DA4: 2F890000 cmpi cr7,r9,0
+ 10: GETL R9, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25475DA8: 419E0354 bc 12,30,0x254760FC
+ 14: Js30o $0x254760FC
+
+
+
+. 840 25475D9C 16
+. 91 28 00 60 81 28 00 98 2F 89 00 00 41 9E 03 54
+==== BB 841 (0x25475DBC) approx BBs exec'd 0 ====
+
+ 0x25475DBC: 91280060 stw r9,96(r8)
+ 0: GETL R9, t0
+ 1: GETL R8, t2
+ 2: ADDL $0x60, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25475DC0: 81280074 lwz r9,116(r8)
+ 5: GETL R8, t4
+ 6: ADDL $0x74, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25475DC4: 2C890000 cmpi cr1,r9,0
+ 10: GETL R9, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x25475DC8: 418600E0 bc 12,6,0x25475EA8
+ 14: Js06o $0x25475EA8
+
+
+
+. 841 25475DBC 16
+. 91 28 00 60 81 28 00 74 2C 89 00 00 41 86 00 E0
+==== BB 842 (0x25475EEC) approx BBs exec'd 0 ====
+
+ 0x25475EEC: 80DA0000 lwz r6,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x25475EF0: 7D493214 add r10,r9,r6
+ 4: GETL R9, t4
+ 5: GETL R6, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0x25475EF4: 915A0218 stw r10,536(r26)
+ 9: GETL R10, t8
+ 10: GETL R26, t10
+ 11: ADDL $0x218, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25475EF8: 7E639B78 or r3,r19,r19
+ 14: GETL R19, t12
+ 15: PUTL t12, R3
+ 16: INCEIPL $4
+
+ 0x25475EFC: 4800C0F5 bl 0x25481FF0
+ 17: MOVL $0x25475F00, t14
+ 18: PUTL t14, LR
+ 19: JMPo-c $0x25481FF0 ($4)
+
+
+
+. 842 25475EEC 20
+. 80 DA 00 00 7D 49 32 14 91 5A 02 18 7E 63 9B 78 48 00 C0 F5
+==== BB 843 (0x2547A488) approx BBs exec'd 0 ====
+
+ 0x2547A488: 807F0040 lwz r3,64(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x40, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547A48C: 7C091800 cmp cr0,r9,r3
+ 5: GETL R9, t4
+ 6: GETL R3, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547A490: 41820014 bc 12,2,0x2547A4A4
+ 10: Js02o $0x2547A4A4
+
+
+
+. 843 2547A488 12
+. 80 7F 00 40 7C 09 18 00 41 82 00 14
+==== BB 844 (0x2547A494) approx BBs exec'd 0 ====
+
+ 0x2547A494: 3D407FFF lis r10,32767
+ 0: MOVL $0x7FFF0000, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x2547A498: 6148FFFF ori r8,r10,0xFFFF
+ 3: MOVL $0x7FFFFFFF, t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0x2547A49C: 7F094000 cmp cr6,r9,r8
+ 6: GETL R9, t4
+ 7: GETL R8, t6
+ 8: CMPL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x6, CR
+ 10: INCEIPL $4
+
+ 0x2547A4A0: 409AFFD4 bc 4,26,0x2547A474
+ 11: Jc26o $0x2547A474
+
+
+
+. 844 2547A494 16
+. 3D 40 7F FF 61 48 FF FF 7F 09 40 00 40 9A FF D4
+==== BB 845 (0x2547A8B8) approx BBs exec'd 0 ====
+
+ 0x2547A8B8: 2F980000 cmpi cr7,r24,0
+ 0: GETL R24, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547A8BC: 419E005C bc 12,30,0x2547A918
+ 4: Js30o $0x2547A918
+
+
+
+. 845 2547A8B8 8
+. 2F 98 00 00 41 9E 00 5C
+==== BB 846 (0x2547A918) approx BBs exec'd 0 ====
+
+ 0x2547A918: 801B0000 lwz r0,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547A91C: 2F1B0000 cmpi cr6,r27,0
+ 4: GETL R27, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x2547A920: 2C000000 cmpi cr0,r0,0
+ 8: GETL R0, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x2547A924: 4182001C bc 12,2,0x2547A940
+ 12: Js02o $0x2547A940
+
+
+
+. 846 2547A918 16
+. 80 1B 00 00 2F 1B 00 00 2C 00 00 00 41 82 00 1C
+==== BB 847 (0x2547A928) approx BBs exec'd 0 ====
+
+ 0x2547A928: 837B0008 lwz r27,8(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x2547A92C: 2F1B0000 cmpi cr6,r27,0
+ 5: GETL R27, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547A930: 41BAFC94 bc 13,26,0x2547A5C4
+ 9: Js26o $0x2547A5C4
+
+
+
+. 847 2547A928 12
+. 83 7B 00 08 2F 1B 00 00 41 BA FC 94
+==== BB 848 (0x2547A934) approx BBs exec'd 0 ====
+
+ 0x2547A934: 801B0000 lwz r0,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547A938: 2C000000 cmpi cr0,r0,0
+ 4: GETL R0, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x2547A93C: 4082FFEC bc 4,2,0x2547A928
+ 8: Jc02o $0x2547A928
+
+
+
+. 848 2547A934 12
+. 80 1B 00 00 2C 00 00 00 40 82 FF EC
+==== BB 849 (0x2547A940) approx BBs exec'd 0 ====
+
+ 0x2547A940: 409AF9DC bc 4,26,0x2547A31C
+ 0: Jc26o $0x2547A31C
+
+
+
+. 849 2547A940 4
+. 40 9A F9 DC
+==== BB 850 (0x2547A35C) approx BBs exec'd 0 ====
+
+ 0x2547A35C: A13A0156 lhz r9,342(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x156, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547A360: 2F090000 cmpi cr6,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547A364: 409A05E4 bc 4,26,0x2547A948
+ 9: Jc26o $0x2547A948
+
+
+
+. 850 2547A35C 12
+. A1 3A 01 56 2F 09 00 00 40 9A 05 E4
+==== BB 851 (0x2547A948) approx BBs exec'd 0 ====
+
+ 0x2547A948: 5534103A rlwinm r20,r9,2,0,29
+ 0: GETL R9, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R20
+ 3: INCEIPL $4
+
+ 0x2547A94C: 81810000 lwz r12,0(r1)
+ 4: GETL R1, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0x2547A950: 3A54001E addi r18,r20,30
+ 8: GETL R20, t6
+ 9: ADDL $0x1E, t6
+ 10: PUTL t6, R18
+ 11: INCEIPL $4
+
+ 0x2547A954: 56490376 rlwinm r9,r18,0,13,27
+ 12: GETL R18, t8
+ 13: ANDL $0x7FFF0, t8
+ 14: PUTL t8, R9
+ 15: INCEIPL $4
+
+ 0x2547A958: 7D4900D0 neg r10,r9
+ 16: GETL R9, t10
+ 17: NEGL t10
+ 18: PUTL t10, R10
+ 19: INCEIPL $4
+
+ 0x2547A95C: 7D81516E stwux r12,r1,r10
+ 20: GETL R10, t12
+ 21: GETL R1, t14
+ 22: ADDL t14, t12
+ 23: PUTL t12, R1
+ 24: GETL R12, t16
+ 25: STL t16, (t12)
+ 26: INCEIPL $4
+
+ 0x2547A960: 39010017 addi r8,r1,23
+ 27: GETL R1, t18
+ 28: ADDL $0x17, t18
+ 29: PUTL t18, R8
+ 30: INCEIPL $4
+
+ 0x2547A964: 55180036 rlwinm r24,r8,0,0,27
+ 31: GETL R8, t20
+ 32: ANDL $0xFFFFFFF0, t20
+ 33: PUTL t20, R24
+ 34: INCEIPL $4
+
+ 0x2547A968: 4BFFFA00 b 0x2547A368
+ 35: JMPo $0x2547A368 ($4)
+
+
+
+. 851 2547A948 36
+. 55 34 10 3A 81 81 00 00 3A 54 00 1E 56 49 03 76 7D 49 00 D0 7D 81 51 6E 39 01 00 17 55 18 00 36 4B FF FA 00
+==== BB 852 (0x2547A0F0) approx BBs exec'd 0 ====
+
+ 0x2547A0F0: 80FF0004 lwz r7,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547A0F4: 811F0008 lwz r8,8(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x2547A0F8: 81230018 lwz r9,24(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x2547A0FC: 4BFFCBED bl 0x25476CE8
+ 15: MOVL $0x2547A100, t12
+ 16: PUTL t12, LR
+ 17: JMPo-c $0x25476CE8 ($4)
+
+
+
+. 852 2547A0F0 16
+. 80 FF 00 04 81 1F 00 08 81 23 00 18 4B FF CB ED
+==== BB 853 (0x25482F10) approx BBs exec'd 0 ====
+
+ 0x25482F10: 84C40004 lwzu r6,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R4
+ 3: LDL (t0), t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0x25482F14: 7C072A14 add r0,r7,r5
+ 6: GETL R7, t4
+ 7: GETL R5, t6
+ 8: ADDL t4, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x25482F18: 7D0928F8 nor r9,r8,r5
+ 11: GETL R8, t8
+ 12: GETL R5, t10
+ 13: ORL t10, t8
+ 14: NOTL t8
+ 15: PUTL t8, R9
+ 16: INCEIPL $4
+
+ 0x25482F1C: 7C004839 and. r0,r0,r9
+ 17: GETL R0, t12
+ 18: GETL R9, t14
+ 19: ANDL t12, t14
+ 20: PUTL t14, R0
+ 21: CMP0L t14, t16 (-rSo)
+ 22: ICRFL t16, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x25482F20: 7C853000 cmp cr1,r5,r6
+ 24: GETL R5, t18
+ 25: GETL R6, t20
+ 26: CMPL t18, t20, t22 (-rSo)
+ 27: ICRFL t22, $0x1, CR
+ 28: INCEIPL $4
+
+ 0x25482F24: 4182FFE4 bc 12,2,0x25482F08
+ 29: Js02o $0x25482F08
+
+
+
+. 853 25482F10 24
+. 84 C4 00 04 7C 07 2A 14 7D 09 28 F8 7C 00 48 39 7C 85 30 00 41 82 FF E4
+==== BB 854 (0x25482F28) approx BBs exec'd 0 ====
+
+ 0x25482F28: 7D002838 and r0,r8,r5
+ 0: GETL R8, t0
+ 1: GETL R5, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25482F2C: 4186002C bc 12,6,0x25482F58
+ 5: Js06o $0x25482F58
+
+
+
+. 854 25482F28 8
+. 7D 00 28 38 41 86 00 2C
+==== BB 855 (0x25482F30) approx BBs exec'd 0 ====
+
+ 0x25482F30: 7C004214 add r0,r0,r8
+ 0: GETL R0, t0
+ 1: GETL R8, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25482F34: 7CAA3279 xor. r10,r5,r6
+ 5: GETL R5, t4
+ 6: GETL R6, t6
+ 7: XORL t4, t6
+ 8: PUTL t6, R10
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25482F38: 7D290078 andc r9,r9,r0
+ 12: GETL R9, t10
+ 13: GETL R0, t12
+ 14: NOTL t12
+ 15: ANDL t10, t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x25482F3C: 41800034 bc 12,0,0x25482F70
+ 18: Js00o $0x25482F70
+
+
+
+. 855 25482F30 16
+. 7C 00 42 14 7C AA 32 79 7D 29 00 78 41 80 00 34
+==== BB 856 (0x25482F40) approx BBs exec'd 0 ====
+
+ 0x25482F40: 7D4A0034 cntlzw r10,r10
+ 0: GETL R10, t0
+ 1: CNTLZL t0
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0x25482F44: 7D290034 cntlzw r9,r9
+ 4: GETL R9, t2
+ 5: CNTLZL t2
+ 6: PUTL t2, R9
+ 7: INCEIPL $4
+
+ 0x25482F48: 39290007 addi r9,r9,7
+ 8: GETL R9, t4
+ 9: ADDL $0x7, t4
+ 10: PUTL t4, R9
+ 11: INCEIPL $4
+
+ 0x25482F4C: 7C895000 cmp cr1,r9,r10
+ 12: GETL R9, t6
+ 13: GETL R10, t8
+ 14: CMPL t6, t8, t10 (-rSo)
+ 15: ICRFL t10, $0x1, CR
+ 16: INCEIPL $4
+
+ 0x25482F50: 7C662850 subf r3,r6,r5
+ 17: GETL R6, t12
+ 18: GETL R5, t14
+ 19: SUBL t12, t14
+ 20: PUTL t14, R3
+ 21: INCEIPL $4
+
+ 0x25482F54: 4CA40020 bclr 5,4
+ 22: GETL LR, t16
+ 23: Jc04o-r t16
+
+
+
+. 856 25482F40 24
+. 7D 4A 00 34 7D 29 00 34 39 29 00 07 7C 89 50 00 7C 66 28 50 4C A4 00 20
+==== BB 857 (0x25482F58) approx BBs exec'd 0 ====
+
+ 0x25482F58: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25482F5C: 4E800020 blr
+ 3: GETL LR, t2
+ 4: JMPo-r t2 ($4)
+
+
+
+. 857 25482F58 8
+. 38 60 00 00 4E 80 00 20
+==== BB 858 (0x2547C750) approx BBs exec'd 0 ====
+
+ 0x2547C750: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547C754: 38600001 li r3,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547C758: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x2547C75C: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0x2547C760: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547C764: 83E1001C lwz r31,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0x2547C768: 38210020 addi r1,r1,32
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0x2547C76C: 4E800020 blr
+ 30: GETL LR, t22
+ 31: JMPo-r t22 ($4)
+
+
+
+. 858 2547C750 32
+. 80 81 00 24 38 60 00 01 83 A1 00 14 83 C1 00 18 7C 88 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 859 (0x25476F54) approx BBs exec'd 0 ====
+
+ 0x25476F54: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476F58: 83E10294 lwz r31,660(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x294, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0x25476F5C: 81810244 lwz r12,580(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x244, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R12
+ 12: INCEIPL $4
+
+ 0x25476F60: 7FE803A6 mtlr r31
+ 13: GETL R31, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x25476F64: 81C10248 lwz r14,584(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x248, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R14
+ 20: INCEIPL $4
+
+ 0x25476F68: 81E1024C lwz r15,588(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x24C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R15
+ 25: INCEIPL $4
+
+ 0x25476F6C: 7D818120 mtcrf 0x18,r12
+ 26: GETL R12, t20
+ 27: ICRFL t20, $0x3, CR
+ 28: ICRFL t20, $0x4, CR
+ 29: INCEIPL $4
+
+ 0x25476F70: 82010250 lwz r16,592(r1)
+ 30: GETL R1, t22
+ 31: ADDL $0x250, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R16
+ 34: INCEIPL $4
+
+ 0x25476F74: 82210254 lwz r17,596(r1)
+ 35: GETL R1, t26
+ 36: ADDL $0x254, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R17
+ 39: INCEIPL $4
+
+ 0x25476F78: 82410258 lwz r18,600(r1)
+ 40: GETL R1, t30
+ 41: ADDL $0x258, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R18
+ 44: INCEIPL $4
+
+ 0x25476F7C: 8261025C lwz r19,604(r1)
+ 45: GETL R1, t34
+ 46: ADDL $0x25C, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R19
+ 49: INCEIPL $4
+
+ 0x25476F80: 82810260 lwz r20,608(r1)
+ 50: GETL R1, t38
+ 51: ADDL $0x260, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R20
+ 54: INCEIPL $4
+
+ 0x25476F84: 82A10264 lwz r21,612(r1)
+ 55: GETL R1, t42
+ 56: ADDL $0x264, t42
+ 57: LDL (t42), t44
+ 58: PUTL t44, R21
+ 59: INCEIPL $4
+
+ 0x25476F88: 82C10268 lwz r22,616(r1)
+ 60: GETL R1, t46
+ 61: ADDL $0x268, t46
+ 62: LDL (t46), t48
+ 63: PUTL t48, R22
+ 64: INCEIPL $4
+
+ 0x25476F8C: 82E1026C lwz r23,620(r1)
+ 65: GETL R1, t50
+ 66: ADDL $0x26C, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R23
+ 69: INCEIPL $4
+
+ 0x25476F90: 83010270 lwz r24,624(r1)
+ 70: GETL R1, t54
+ 71: ADDL $0x270, t54
+ 72: LDL (t54), t56
+ 73: PUTL t56, R24
+ 74: INCEIPL $4
+
+ 0x25476F94: 83210274 lwz r25,628(r1)
+ 75: GETL R1, t58
+ 76: ADDL $0x274, t58
+ 77: LDL (t58), t60
+ 78: PUTL t60, R25
+ 79: INCEIPL $4
+
+ 0x25476F98: 83410278 lwz r26,632(r1)
+ 80: GETL R1, t62
+ 81: ADDL $0x278, t62
+ 82: LDL (t62), t64
+ 83: PUTL t64, R26
+ 84: INCEIPL $4
+
+ 0x25476F9C: 8361027C lwz r27,636(r1)
+ 85: GETL R1, t66
+ 86: ADDL $0x27C, t66
+ 87: LDL (t66), t68
+ 88: PUTL t68, R27
+ 89: INCEIPL $4
+
+ 0x25476FA0: 83810280 lwz r28,640(r1)
+ 90: GETL R1, t70
+ 91: ADDL $0x280, t70
+ 92: LDL (t70), t72
+ 93: PUTL t72, R28
+ 94: INCEIPL $4
+
+ 0x25476FA4: 83A10284 lwz r29,644(r1)
+ 95: GETL R1, t74
+ 96: ADDL $0x284, t74
+ 97: LDL (t74), t76
+ 98: PUTL t76, R29
+ 99: INCEIPL $4
+
+ 0x25476FA8: 83C10288 lwz r30,648(r1)
+ 100: GETL R1, t78
+ 101: ADDL $0x288, t78
+ 102: LDL (t78), t80
+ 103: PUTL t80, R30
+ 104: INCEIPL $4
+
+ 0x25476FAC: 83E1028C lwz r31,652(r1)
+ 105: GETL R1, t82
+ 106: ADDL $0x28C, t82
+ 107: LDL (t82), t84
+ 108: PUTL t84, R31
+ 109: INCEIPL $4
+
+ 0x25476FB0: 38210290 addi r1,r1,656
+ 110: GETL R1, t86
+ 111: ADDL $0x290, t86
+ 112: PUTL t86, R1
+ 113: INCEIPL $4
+
+ 0x25476FB4: 4E800020 blr
+ 114: GETL LR, t88
+ 115: JMPo-r t88 ($4)
+
+
+
+. 859 25476F54 100
+. 7F A3 EB 78 83 E1 02 94 81 81 02 44 7F E8 03 A6 81 C1 02 48 81 E1 02 4C 7D 81 81 20 82 01 02 50 82 21 02 54 82 41 02 58 82 61 02 5C 82 81 02 60 82 A1 02 64 82 C1 02 68 82 E1 02 6C 83 01 02 70 83 21 02 74 83 41 02 78 83 61 02 7C 83 81 02 80 83 A1 02 84 83 C1 02 88 83 E1 02 8C 38 21 02 90 4E 80 00 20
+==== BB 860 (0x2547A460) approx BBs exec'd 0 ====
+
+ 0x2547A460: 2C980000 cmpi cr1,r24,0
+ 0: GETL R24, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547A464: 41860010 bc 12,6,0x2547A474
+ 4: Js06o $0x2547A474
+
+
+
+. 860 2547A460 8
+. 2C 98 00 00 41 86 00 10
+==== BB 861 (0x2547A468) approx BBs exec'd 0 ====
+
+ 0x2547A468: 56CB103A rlwinm r11,r22,2,0,29
+ 0: GETL R22, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0x2547A46C: 3AD60001 addi r22,r22,1
+ 4: GETL R22, t2
+ 5: ADDL $0x1, t2
+ 6: PUTL t2, R22
+ 7: INCEIPL $4
+
+ 0x2547A470: 7D4BC12E stwx r10,r11,r24
+ 8: GETL R24, t4
+ 9: GETL R11, t6
+ 10: ADDL t6, t4
+ 11: GETL R10, t8
+ 12: STL t8, (t4)
+ 13: INCEIPL $4
+
+ 0x2547A474: 853C0008 lwzu r9,8(r28)
+ 14: GETL R28, t10
+ 15: ADDL $0x8, t10
+ 16: PUTL t10, R28
+ 17: LDL (t10), t12
+ 18: PUTL t12, R9
+ 19: INCEIPL $4
+
+ 0x2547A478: 2C090000 cmpi cr0,r9,0
+ 20: GETL R9, t14
+ 21: CMP0L t14, t16 (-rSo)
+ 22: ICRFL t16, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x2547A47C: 4182043C bc 12,2,0x2547A8B8
+ 24: Js02o $0x2547A8B8
+
+
+
+. 861 2547A468 24
+. 56 CB 10 3A 3A D6 00 01 7D 4B C1 2E 85 3C 00 08 2C 09 00 00 41 82 04 3C
+==== BB 862 (0x2547A8C0) approx BBs exec'd 0 ====
+
+ 0x2547A8C0: 3BB60001 addi r29,r22,1
+ 0: GETL R22, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x2547A8C4: 56DC103A rlwinm r28,r22,2,0,29
+ 4: GETL R22, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R28
+ 7: INCEIPL $4
+
+ 0x2547A8C8: 3A400000 li r18,0
+ 8: MOVL $0x0, t4
+ 9: PUTL t4, R18
+ 10: INCEIPL $4
+
+ 0x2547A8CC: 57B61838 rlwinm r22,r29,3,0,28
+ 11: GETL R29, t6
+ 12: SHLL $0x3, t6
+ 13: PUTL t6, R22
+ 14: INCEIPL $4
+
+ 0x2547A8D0: 7E5CC12E stwx r18,r28,r24
+ 15: GETL R24, t8
+ 16: GETL R28, t10
+ 17: ADDL t10, t8
+ 18: GETL R18, t12
+ 19: STL t12, (t8)
+ 20: INCEIPL $4
+
+ 0x2547A8D4: 38760004 addi r3,r22,4
+ 21: GETL R22, t14
+ 22: ADDL $0x4, t14
+ 23: PUTL t14, R3
+ 24: INCEIPL $4
+
+ 0x2547A8D8: 4801D14D bl 0x25497A24
+ 25: MOVL $0x2547A8DC, t16
+ 26: PUTL t16, LR
+ 27: JMPo-c $0x25497A24 ($4)
+
+
+
+. 862 2547A8C0 28
+. 3B B6 00 01 56 DC 10 3A 3A 40 00 00 57 B6 18 38 7E 5C C1 2E 38 76 00 04 48 01 D1 4D
+==== BB 863 (0x2547A8DC) approx BBs exec'd 0 ====
+
+ 0x2547A8DC: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547A8E0: 7C691B78 or r9,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R9
+ 6: INCEIPL $4
+
+ 0x2547A8E4: 907A01E8 stw r3,488(r26)
+ 7: GETL R3, t6
+ 8: GETL R26, t8
+ 9: ADDL $0x1E8, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x2547A8E8: 418605C4 bc 12,6,0x2547AEAC
+ 12: Js06o $0x2547AEAC
+
+
+
+. 863 2547A8DC 16
+. 2C 83 00 00 7C 69 1B 78 90 7A 01 E8 41 86 05 C4
+==== BB 864 (0x2547A8EC) approx BBs exec'd 0 ====
+
+ 0x2547A8EC: 57B5103A rlwinm r21,r29,2,0,29
+ 0: GETL R29, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R21
+ 3: INCEIPL $4
+
+ 0x2547A8F0: 7F04C378 or r4,r24,r24
+ 4: GETL R24, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0x2547A8F4: 7EA5AB78 or r5,r21,r21
+ 7: GETL R21, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0x2547A8F8: 93490000 stw r26,0(r9)
+ 10: GETL R26, t6
+ 11: GETL R9, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547A8FC: 38630004 addi r3,r3,4
+ 14: GETL R3, t10
+ 15: ADDL $0x4, t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0x2547A900: 480092E1 bl 0x25483BE0
+ 18: MOVL $0x2547A904, t12
+ 19: PUTL t12, LR
+ 20: JMPo-c $0x25483BE0 ($4)
+
+
+
+. 864 2547A8EC 24
+. 57 B5 10 3A 7F 04 C3 78 7E A5 AB 78 93 49 00 00 38 63 00 04 48 00 92 E1
+==== BB 865 (0x2547A904) approx BBs exec'd 0 ====
+
+ 0x2547A904: 809A01E8 lwz r4,488(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x1E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547A908: 7EA5AB78 or r5,r21,r21
+ 5: GETL R21, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547A90C: 7F552214 add r26,r21,r4
+ 8: GETL R21, t6
+ 9: GETL R4, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x2547A910: 387A0004 addi r3,r26,4
+ 13: GETL R26, t10
+ 14: ADDL $0x4, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0x2547A914: 480092CD bl 0x25483BE0
+ 17: MOVL $0x2547A918, t12
+ 18: PUTL t12, LR
+ 19: JMPo-c $0x25483BE0 ($4)
+
+
+
+. 865 2547A904 20
+. 80 9A 01 E8 7E A5 AB 78 7F 55 22 14 38 7A 00 04 48 00 92 CD
+==== BB 866 (0x25477104) approx BBs exec'd 0 ====
+
+ 0x25477104: 38000001 li r0,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25477108: 409A0024 bc 4,26,0x2547712C
+ 3: Jc26o $0x2547712C
+
+
+
+. 866 25477104 8
+. 38 00 00 01 40 9A 00 24
+==== BB 867 (0x2547710C) approx BBs exec'd 0 ====
+
+ 0x2547710C: 817D005C lwz r11,92(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x5C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25477110: 7FA5EB78 or r5,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25477114: 7F83E378 or r3,r28,r28
+ 8: GETL R28, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x25477118: 7E469378 or r6,r18,r18
+ 11: GETL R18, t8
+ 12: PUTL t8, R6
+ 13: INCEIPL $4
+
+ 0x2547711C: 2F0B0000 cmpi cr6,r11,0
+ 14: GETL R11, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x6, CR
+ 17: INCEIPL $4
+
+ 0x25477120: 38000000 li r0,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0x25477124: 409A0218 bc 4,26,0x2547733C
+ 21: Jc26o $0x2547733C
+
+
+
+. 867 2547710C 28
+. 81 7D 00 5C 7F A5 EB 78 7F 83 E3 78 7E 46 93 78 2F 0B 00 00 38 00 00 00 40 9A 02 18
+==== BB 868 (0x25477128) approx BBs exec'd 0 ====
+
+ 0x25477128: 91FD018C stw r15,396(r29)
+ 0: GETL R15, t0
+ 1: GETL R29, t2
+ 2: ADDL $0x18C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547712C: 2C000000 cmpi cr0,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25477130: 7F86E378 or r6,r28,r28
+ 9: GETL R28, t8
+ 10: PUTL t8, R6
+ 11: INCEIPL $4
+
+ 0x25477134: 7FE3FB78 or r3,r31,r31
+ 12: GETL R31, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x25477138: 7EC4B378 or r4,r22,r22
+ 15: GETL R22, t12
+ 16: PUTL t12, R4
+ 17: INCEIPL $4
+
+ 0x2547713C: 7EE5BB78 or r5,r23,r23
+ 18: GETL R23, t14
+ 19: PUTL t14, R5
+ 20: INCEIPL $4
+
+ 0x25477140: 38E10228 addi r7,r1,552
+ 21: GETL R1, t16
+ 22: ADDL $0x228, t16
+ 23: PUTL t16, R7
+ 24: INCEIPL $4
+
+ 0x25477144: 39010018 addi r8,r1,24
+ 25: GETL R1, t18
+ 26: ADDL $0x18, t18
+ 27: PUTL t18, R8
+ 28: INCEIPL $4
+
+ 0x25477148: 4182FF84 bc 12,2,0x254770CC
+ 29: Js02o $0x254770CC
+
+
+
+. 868 25477128 36
+. 91 FD 01 8C 2C 00 00 00 7F 86 E3 78 7F E3 FB 78 7E C4 B3 78 7E E5 BB 78 38 E1 02 28 39 01 00 18 41 82 FF 84
+==== BB 869 (0x254771D0) approx BBs exec'd 0 ====
+
+ 0x254771D0: 8005018C lwz r0,396(r5)
+ 0: GETL R5, t0
+ 1: ADDL $0x18C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x254771D4: 3BA5018C addi r29,r5,396
+ 5: GETL R5, t4
+ 6: ADDL $0x18C, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0x254771D8: 39200000 li r9,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0x254771DC: 2C80FFFF cmpi cr1,r0,-1
+ 12: GETL R0, t8
+ 13: MOVL $0xFFFFFFFF, t12
+ 14: CMPL t8, t12, t10 (-rSo)
+ 15: ICRFL t10, $0x1, CR
+ 16: INCEIPL $4
+
+ 0x254771E0: 41860024 bc 12,6,0x25477204
+ 17: Js06o $0x25477204
+
+
+
+. 869 254771D0 20
+. 80 05 01 8C 3B A5 01 8C 39 20 00 00 2C 80 FF FF 41 86 00 24
+==== BB 870 (0x25477204) approx BBs exec'd 0 ====
+
+ 0x25477204: 2C090000 cmpi cr0,r9,0
+ 0: GETL R9, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25477208: 408201F8 bc 4,2,0x25477400
+ 4: Jc02o $0x25477400
+
+
+
+. 870 25477204 8
+. 2C 09 00 00 40 82 01 F8
+==== BB 871 (0x25483A60) approx BBs exec'd 0 ====
+
+ 0x25483A60: 7D2903A6 mtctr r9
+ 0: GETL R9, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x25483A64: 88BF0000 lbz r5,0(r31)
+ 3: GETL R31, t2
+ 4: LDB (t2), t4
+ 5: PUTL t4, R5
+ 6: INCEIPL $4
+
+ 0x25483A68: 3BFF0001 addi r31,r31,1
+ 7: GETL R31, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R31
+ 10: INCEIPL $4
+
+ 0x25483A6C: 98BD0000 stb r5,0(r29)
+ 11: GETL R5, t8
+ 12: GETL R29, t10
+ 13: STB t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25483A70: 3BBD0001 addi r29,r29,1
+ 15: GETL R29, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0x25483A74: 4200FFF0 bc 16,0,0x25483A64
+ 19: GETL CTR, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, CTR
+ 22: JIFZL t14, $0x25483A78
+ 23: JMPo $0x25483A64 ($4)
+
+
+
+. 871 25483A60 24
+. 7D 29 03 A6 88 BF 00 00 3B FF 00 01 98 BD 00 00 3B BD 00 01 42 00 FF F0
+==== BB 872 (0x25476958) approx BBs exec'd 0 ====
+
+ 0x25476958: 80DF0080 lwz r6,128(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x80, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547695C: 2C060000 cmpi cr0,r6,0
+ 5: GETL R6, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25476960: 4182FF58 bc 12,2,0x254768B8
+ 9: Js02o $0x254768B8
+
+
+
+. 872 25476958 12
+. 80 DF 00 80 2C 06 00 00 41 82 FF 58
+==== BB 873 (0x25476A34) approx BBs exec'd 0 ====
+
+ 0x25476A34: 7E639B78 or r3,r19,r19
+ 0: GETL R19, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476A38: 48020FED bl 0x25497A24
+ 3: MOVL $0x25476A3C, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25497A24 ($4)
+
+
+
+. 873 25476A34 8
+. 7E 63 9B 78 48 02 0F ED
+==== BB 874 (0x25476A3C) approx BBs exec'd 0 ====
+
+ 0x25476A3C: 82BF0088 lwz r21,136(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x88, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x25476A40: 2E030000 cmpi cr4,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x25476A44: 90750000 stw r3,0(r21)
+ 9: GETL R3, t8
+ 10: GETL R21, t10
+ 11: STL t8, (t10)
+ 12: INCEIPL $4
+
+ 0x25476A48: 41920284 bc 12,18,0x25476CCC
+ 13: Js18o $0x25476CCC
+
+
+
+. 874 25476A3C 16
+. 82 BF 00 88 2E 03 00 00 90 75 00 00 41 92 02 84
+==== BB 875 (0x25476A4C) approx BBs exec'd 0 ====
+
+ 0x25476A4C: 7F64DB78 or r4,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x25476A50: 7E659B78 or r5,r19,r19
+ 3: GETL R19, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25476A54: 4800D18D bl 0x25483BE0
+ 6: MOVL $0x25476A58, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25483BE0 ($4)
+
+
+
+. 875 25476A4C 12
+. 7F 64 DB 78 7E 65 9B 78 48 00 D1 8D
+==== BB 876 (0x25476A58) approx BBs exec'd 0 ====
+
+ 0x25476A58: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476A5C: 81010000 lwz r8,0(r1)
+ 3: GETL R1, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R8
+ 6: INCEIPL $4
+
+ 0x25476A60: 81E80004 lwz r15,4(r8)
+ 7: GETL R8, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R15
+ 11: INCEIPL $4
+
+ 0x25476A64: 8088FFB4 lwz r4,-76(r8)
+ 12: GETL R8, t10
+ 13: ADDL $0xFFFFFFB4, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R4
+ 16: INCEIPL $4
+
+ 0x25476A68: 7DE803A6 mtlr r15
+ 17: GETL R15, t14
+ 18: PUTL t14, LR
+ 19: INCEIPL $4
+
+ 0x25476A6C: 81C8FFB8 lwz r14,-72(r8)
+ 20: GETL R8, t16
+ 21: ADDL $0xFFFFFFB8, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R14
+ 24: INCEIPL $4
+
+ 0x25476A70: 81E8FFBC lwz r15,-68(r8)
+ 25: GETL R8, t20
+ 26: ADDL $0xFFFFFFBC, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R15
+ 29: INCEIPL $4
+
+ 0x25476A74: 7C808120 mtcrf 0x8,r4
+ 30: GETL R4, t24
+ 31: ICRFL t24, $0x4, CR
+ 32: INCEIPL $4
+
+ 0x25476A78: 8208FFC0 lwz r16,-64(r8)
+ 33: GETL R8, t26
+ 34: ADDL $0xFFFFFFC0, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R16
+ 37: INCEIPL $4
+
+ 0x25476A7C: 8228FFC4 lwz r17,-60(r8)
+ 38: GETL R8, t30
+ 39: ADDL $0xFFFFFFC4, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R17
+ 42: INCEIPL $4
+
+ 0x25476A80: 8248FFC8 lwz r18,-56(r8)
+ 43: GETL R8, t34
+ 44: ADDL $0xFFFFFFC8, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R18
+ 47: INCEIPL $4
+
+ 0x25476A84: 8268FFCC lwz r19,-52(r8)
+ 48: GETL R8, t38
+ 49: ADDL $0xFFFFFFCC, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R19
+ 52: INCEIPL $4
+
+ 0x25476A88: 8288FFD0 lwz r20,-48(r8)
+ 53: GETL R8, t42
+ 54: ADDL $0xFFFFFFD0, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R20
+ 57: INCEIPL $4
+
+ 0x25476A8C: 82A8FFD4 lwz r21,-44(r8)
+ 58: GETL R8, t46
+ 59: ADDL $0xFFFFFFD4, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R21
+ 62: INCEIPL $4
+
+ 0x25476A90: 82C8FFD8 lwz r22,-40(r8)
+ 63: GETL R8, t50
+ 64: ADDL $0xFFFFFFD8, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R22
+ 67: INCEIPL $4
+
+ 0x25476A94: 82E8FFDC lwz r23,-36(r8)
+ 68: GETL R8, t54
+ 69: ADDL $0xFFFFFFDC, t54
+ 70: LDL (t54), t56
+ 71: PUTL t56, R23
+ 72: INCEIPL $4
+
+ 0x25476A98: 8308FFE0 lwz r24,-32(r8)
+ 73: GETL R8, t58
+ 74: ADDL $0xFFFFFFE0, t58
+ 75: LDL (t58), t60
+ 76: PUTL t60, R24
+ 77: INCEIPL $4
+
+ 0x25476A9C: 8328FFE4 lwz r25,-28(r8)
+ 78: GETL R8, t62
+ 79: ADDL $0xFFFFFFE4, t62
+ 80: LDL (t62), t64
+ 81: PUTL t64, R25
+ 82: INCEIPL $4
+
+ 0x25476AA0: 8348FFE8 lwz r26,-24(r8)
+ 83: GETL R8, t66
+ 84: ADDL $0xFFFFFFE8, t66
+ 85: LDL (t66), t68
+ 86: PUTL t68, R26
+ 87: INCEIPL $4
+
+ 0x25476AA4: 8368FFEC lwz r27,-20(r8)
+ 88: GETL R8, t70
+ 89: ADDL $0xFFFFFFEC, t70
+ 90: LDL (t70), t72
+ 91: PUTL t72, R27
+ 92: INCEIPL $4
+
+ 0x25476AA8: 8388FFF0 lwz r28,-16(r8)
+ 93: GETL R8, t74
+ 94: ADDL $0xFFFFFFF0, t74
+ 95: LDL (t74), t76
+ 96: PUTL t76, R28
+ 97: INCEIPL $4
+
+ 0x25476AAC: 83A8FFF4 lwz r29,-12(r8)
+ 98: GETL R8, t78
+ 99: ADDL $0xFFFFFFF4, t78
+ 100: LDL (t78), t80
+ 101: PUTL t80, R29
+ 102: INCEIPL $4
+
+ 0x25476AB0: 83C8FFF8 lwz r30,-8(r8)
+ 103: GETL R8, t82
+ 104: ADDL $0xFFFFFFF8, t82
+ 105: LDL (t82), t84
+ 106: PUTL t84, R30
+ 107: INCEIPL $4
+
+ 0x25476AB4: 83E8FFFC lwz r31,-4(r8)
+ 108: GETL R8, t86
+ 109: ADDL $0xFFFFFFFC, t86
+ 110: LDL (t86), t88
+ 111: PUTL t88, R31
+ 112: INCEIPL $4
+
+ 0x25476AB8: 7D014378 or r1,r8,r8
+ 113: GETL R8, t90
+ 114: PUTL t90, R1
+ 115: INCEIPL $4
+
+ 0x25476ABC: 4E800020 blr
+ 116: GETL LR, t92
+ 117: JMPo-r t92 ($4)
+
+
+
+. 876 25476A58 104
+. 7F 43 D3 78 81 01 00 00 81 E8 00 04 80 88 FF B4 7D E8 03 A6 81 C8 FF B8 81 E8 FF BC 7C 80 81 20 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
+==== BB 877 (0x25479218) approx BBs exec'd 0 ====
+
+ 0x25479218: 7C1C0378 or r28,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0x2547921C: 801C0168 lwz r0,360(r28)
+ 3: GETL R28, t2
+ 4: ADDL $0x168, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x25479220: 2C000000 cmpi cr0,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25479224: 4082FFF4 bc 4,2,0x25479218
+ 12: Jc02o $0x25479218
+
+
+
+. 877 25479218 16
+. 7C 1C 03 78 80 1C 01 68 2C 00 00 00 40 82 FF F4
+==== BB 878 (0x254807B8) approx BBs exec'd 0 ====
+
+ 0x254807B8: 7D283850 subf r9,r8,r7
+ 0: GETL R8, t0
+ 1: GETL R7, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x254807BC: 7F865050 subf r28,r6,r10
+ 5: GETL R6, t4
+ 6: GETL R10, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x254807C0: 7F89E040 cmpl cr7,r9,r28
+ 10: GETL R9, t8
+ 11: GETL R28, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0x254807C4: 409C0064 bc 4,28,0x25480828
+ 15: Jc28o $0x25480828
+
+
+
+. 878 254807B8 16
+. 7D 28 38 50 7F 86 50 50 7F 89 E0 40 40 9C 00 64
+==22130== Reading syms from /home/sewardj/valgrind-2.2.0-ppc/Inst/lib/valgrind/libpthread.so (0xEE2F000)
+==== BB 879 (0x2547618C) approx BBs exec'd 0 ====
+
+ 0x2547618C: 2F160000 cmpi cr6,r22,0
+ 0: GETL R22, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25476190: 419801EC bc 12,24,0x2547637C
+ 4: Js24o $0x2547637C
+
+
+
+. 879 2547618C 8
+. 2F 16 00 00 41 98 01 EC
+==== BB 880 (0x25476194) approx BBs exec'd 0 ====
+
+ 0x25476194: 82BE050C lwz r21,1292(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x50C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x25476198: 83750000 lwz r27,0(r21)
+ 5: GETL R21, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0x2547619C: 63780004 ori r24,r27,0x4
+ 9: GETL R27, t8
+ 10: ORL $0x4, t8
+ 11: PUTL t8, R24
+ 12: INCEIPL $4
+
+ 0x254761A0: 93150000 stw r24,0(r21)
+ 13: GETL R24, t10
+ 14: GETL R21, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0x254761A4: 809E04C8 lwz r4,1224(r30)
+ 17: GETL R30, t14
+ 18: ADDL $0x4C8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R4
+ 21: INCEIPL $4
+
+ 0x254761A8: 807F0098 lwz r3,152(r31)
+ 22: GETL R31, t18
+ 23: ADDL $0x98, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R3
+ 26: INCEIPL $4
+
+ 0x254761AC: 81040404 lwz r8,1028(r4)
+ 27: GETL R4, t22
+ 28: ADDL $0x404, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R8
+ 31: INCEIPL $4
+
+ 0x254761B0: 7D0903A6 mtctr r8
+ 32: GETL R8, t26
+ 33: PUTL t26, CTR
+ 34: INCEIPL $4
+
+ 0x254761B4: 4E800421 bctrl
+ 35: MOVL $0x254761B8, t28
+ 36: PUTL t28, LR
+ 37: GETL CTR, t30
+ 38: JMPo-c t30 ($4)
+
+
+
+. 880 25476194 36
+. 82 BE 05 0C 83 75 00 00 63 78 00 04 93 15 00 00 80 9E 04 C8 80 7F 00 98 81 04 04 04 7D 09 03 A6 4E 80 04 21
+==== BB 881 __GI__dl_make_stack_executable(0x2547E8C0) approx BBs exec'd 0 ====
+
+ 0x2547E8C0: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547E8C4: 7CE802A6 mflr r7
+ 6: GETL LR, t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x2547E8C8: 48018739 bl 0x25497000
+ 9: MOVL $0x2547E8CC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 881 2547E8C0 12
+. 94 21 FF D0 7C E8 02 A6 48 01 87 39
+==== BB 882 (0x2547E8CC) approx BBs exec'd 0 ====
+
+ 0x2547E8CC: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547E8D0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547E8D4: 93410018 stw r26,24(r1)
+ 8: GETL R26, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x18, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547E8D8: 90E10034 stw r7,52(r1)
+ 13: GETL R7, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x34, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547E8DC: 93210014 stw r25,20(r1)
+ 18: GETL R25, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x2547E8E0: 7C791B78 or r25,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R25
+ 25: INCEIPL $4
+
+ 0x2547E8E4: 835E04F4 lwz r26,1268(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4F4, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R26
+ 30: INCEIPL $4
+
+ 0x2547E8E8: 80C10000 lwz r6,0(r1)
+ 31: GETL R1, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R6
+ 34: INCEIPL $4
+
+ 0x2547E8EC: 80BA0004 lwz r5,4(r26)
+ 35: GETL R26, t28
+ 36: ADDL $0x4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R5
+ 39: INCEIPL $4
+
+ 0x2547E8F0: 809A00A4 lwz r4,164(r26)
+ 40: GETL R26, t32
+ 41: ADDL $0xA4, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R4
+ 44: INCEIPL $4
+
+ 0x2547E8F4: 81390000 lwz r9,0(r25)
+ 45: GETL R25, t36
+ 46: LDL (t36), t38
+ 47: PUTL t38, R9
+ 48: INCEIPL $4
+
+ 0x2547E8F8: 7C0500D0 neg r0,r5
+ 49: GETL R5, t40
+ 50: NEGL t40
+ 51: PUTL t40, R0
+ 52: INCEIPL $4
+
+ 0x2547E8FC: 93E1002C stw r31,44(r1)
+ 53: GETL R31, t42
+ 54: GETL R1, t44
+ 55: ADDL $0x2C, t44
+ 56: STL t42, (t44)
+ 57: INCEIPL $4
+
+ 0x2547E900: 7C8903A6 mtctr r4
+ 58: GETL R4, t46
+ 59: PUTL t46, CTR
+ 60: INCEIPL $4
+
+ 0x2547E904: 9361001C stw r27,28(r1)
+ 61: GETL R27, t48
+ 62: GETL R1, t50
+ 63: ADDL $0x1C, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0x2547E908: 3880000C li r4,12
+ 66: MOVL $0xC, t52
+ 67: PUTL t52, R4
+ 68: INCEIPL $4
+
+ 0x2547E90C: 93810020 stw r28,32(r1)
+ 69: GETL R28, t54
+ 70: GETL R1, t56
+ 71: ADDL $0x20, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0x2547E910: 7D3F0038 and r31,r9,r0
+ 74: GETL R9, t58
+ 75: GETL R0, t60
+ 76: ANDL t58, t60
+ 77: PUTL t60, R31
+ 78: INCEIPL $4
+
+ 0x2547E914: 93A10024 stw r29,36(r1)
+ 79: GETL R29, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x24, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x2547E918: 80660004 lwz r3,4(r6)
+ 84: GETL R6, t66
+ 85: ADDL $0x4, t66
+ 86: LDL (t66), t68
+ 87: PUTL t68, R3
+ 88: INCEIPL $4
+
+ 0x2547E91C: 4E800421 bctrl
+ 89: MOVL $0x2547E920, t70
+ 90: PUTL t70, LR
+ 91: GETL CTR, t72
+ 92: JMPo-c t72 ($4)
+
+
+
+. 882 2547E8CC 84
+. 93 C1 00 28 7F C8 02 A6 93 41 00 18 90 E1 00 34 93 21 00 14 7C 79 1B 78 83 5E 04 F4 80 C1 00 00 80 BA 00 04 80 9A 00 A4 81 39 00 00 7C 05 00 D0 93 E1 00 2C 7C 89 03 A6 93 61 00 1C 38 80 00 0C 93 81 00 20 7D 3F 00 38 93 A1 00 24 80 66 00 04 4E 80 04 21
+==== BB 883 _dl_check_caller(0x2547EA74) approx BBs exec'd 0 ====
+
+ 0x2547EA74: 9421FFC0 stwu r1,-64(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFC0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547EA78: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547EA7C: 48018585 bl 0x25497000
+ 9: MOVL $0x2547EA80, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 883 2547EA74 12
+. 94 21 FF C0 7C 08 02 A6 48 01 85 85
+==== BB 884 (0x2547EA80) approx BBs exec'd 0 ====
+
+ 0x2547EA80: 93C10038 stw r30,56(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x38, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547EA84: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547EA88: 93010020 stw r24,32(r1)
+ 8: GETL R24, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x20, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547EA8C: 92810010 stw r20,16(r1)
+ 13: GETL R20, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x10, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547EA90: 5494E8FE rlwinm r20,r4,29,3,31
+ 18: GETL R4, t14
+ 19: SHRL $0x3, t14
+ 20: PUTL t14, R20
+ 21: INCEIPL $4
+
+ 0x2547EA94: 92A10014 stw r21,20(r1)
+ 22: GETL R21, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x14, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0x2547EA98: 5495F0BE rlwinm r21,r4,30,2,31
+ 27: GETL R4, t20
+ 28: SHRL $0x2, t20
+ 29: PUTL t20, R21
+ 30: INCEIPL $4
+
+ 0x2547EA9C: 831E04C8 lwz r24,1224(r30)
+ 31: GETL R30, t22
+ 32: ADDL $0x4C8, t22
+ 33: LDL (t22), t24
+ 34: PUTL t24, R24
+ 35: INCEIPL $4
+
+ 0x2547EAA0: 92C10018 stw r22,24(r1)
+ 36: GETL R22, t26
+ 37: GETL R1, t28
+ 38: ADDL $0x18, t28
+ 39: STL t26, (t28)
+ 40: INCEIPL $4
+
+ 0x2547EAA4: 5496F87E rlwinm r22,r4,31,1,31
+ 41: GETL R4, t30
+ 42: SHRL $0x1, t30
+ 43: PUTL t30, R22
+ 44: INCEIPL $4
+
+ 0x2547EAA8: 92E1001C stw r23,28(r1)
+ 45: GETL R23, t32
+ 46: GETL R1, t34
+ 47: ADDL $0x1C, t34
+ 48: STL t32, (t34)
+ 49: INCEIPL $4
+
+ 0x2547EAAC: 549707FE rlwinm r23,r4,0,31,31
+ 50: GETL R4, t36
+ 51: ANDL $0x1, t36
+ 52: PUTL t36, R23
+ 53: INCEIPL $4
+
+ 0x2547EAB0: 93210024 stw r25,36(r1)
+ 54: GETL R25, t38
+ 55: GETL R1, t40
+ 56: ADDL $0x24, t40
+ 57: STL t38, (t40)
+ 58: INCEIPL $4
+
+ 0x2547EAB4: 7C992378 or r25,r4,r4
+ 59: GETL R4, t42
+ 60: PUTL t42, R25
+ 61: INCEIPL $4
+
+ 0x2547EAB8: 93410028 stw r26,40(r1)
+ 62: GETL R26, t44
+ 63: GETL R1, t46
+ 64: ADDL $0x28, t46
+ 65: STL t44, (t46)
+ 66: INCEIPL $4
+
+ 0x2547EABC: 3B400000 li r26,0
+ 67: MOVL $0x0, t48
+ 68: PUTL t48, R26
+ 69: INCEIPL $4
+
+ 0x2547EAC0: 9361002C stw r27,44(r1)
+ 70: GETL R27, t50
+ 71: GETL R1, t52
+ 72: ADDL $0x2C, t52
+ 73: STL t50, (t52)
+ 74: INCEIPL $4
+
+ 0x2547EAC4: 7F1BC378 or r27,r24,r24
+ 75: GETL R24, t54
+ 76: PUTL t54, R27
+ 77: INCEIPL $4
+
+ 0x2547EAC8: 93810030 stw r28,48(r1)
+ 78: GETL R28, t56
+ 79: GETL R1, t58
+ 80: ADDL $0x30, t58
+ 81: STL t56, (t58)
+ 82: INCEIPL $4
+
+ 0x2547EACC: 7C7C1B78 or r28,r3,r3
+ 83: GETL R3, t60
+ 84: PUTL t60, R28
+ 85: INCEIPL $4
+
+ 0x2547EAD0: 93A10034 stw r29,52(r1)
+ 86: GETL R29, t62
+ 87: GETL R1, t64
+ 88: ADDL $0x34, t64
+ 89: STL t62, (t64)
+ 90: INCEIPL $4
+
+ 0x2547EAD4: 93E1003C stw r31,60(r1)
+ 91: GETL R31, t66
+ 92: GETL R1, t68
+ 93: ADDL $0x3C, t68
+ 94: STL t66, (t68)
+ 95: INCEIPL $4
+
+ 0x2547EAD8: 90010044 stw r0,68(r1)
+ 96: GETL R0, t70
+ 97: GETL R1, t72
+ 98: ADDL $0x44, t72
+ 99: STL t70, (t72)
+ 100: INCEIPL $4
+
+ 0x2547EADC: 83BB0000 lwz r29,0(r27)
+ 101: GETL R27, t74
+ 102: LDL (t74), t76
+ 103: PUTL t76, R29
+ 104: INCEIPL $4
+
+ 0x2547EAE0: 3B7B0018 addi r27,r27,24
+ 105: GETL R27, t78
+ 106: ADDL $0x18, t78
+ 107: PUTL t78, R27
+ 108: INCEIPL $4
+
+ 0x2547EAE4: 2F9D0000 cmpi cr7,r29,0
+ 109: GETL R29, t80
+ 110: CMP0L t80, t82 (-rSo)
+ 111: ICRFL t82, $0x7, CR
+ 112: INCEIPL $4
+
+ 0x2547EAE8: 419E0028 bc 12,30,0x2547EB10
+ 113: Js30o $0x2547EB10
+
+
+
+. 884 2547EA80 108
+. 93 C1 00 38 7F C8 02 A6 93 01 00 20 92 81 00 10 54 94 E8 FE 92 A1 00 14 54 95 F0 BE 83 1E 04 C8 92 C1 00 18 54 96 F8 7E 92 E1 00 1C 54 97 07 FE 93 21 00 24 7C 99 23 78 93 41 00 28 3B 40 00 00 93 61 00 2C 7F 1B C3 78 93 81 00 30 7C 7C 1B 78 93 A1 00 34 93 E1 00 3C 90 01 00 44 83 BB 00 00 3B 7B 00 18 2F 9D 00 00 41 9E 00 28
+==== BB 885 (0x2547EAEC) approx BBs exec'd 0 ====
+
+ 0x2547EAEC: 807D01A0 lwz r3,416(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1A0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547EAF0: 7C03E040 cmpl cr0,r3,r28
+ 5: GETL R3, t4
+ 6: GETL R28, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547EAF4: 41810010 bc 12,1,0x2547EB04
+ 10: Js01o $0x2547EB04
+
+
+
+. 885 2547EAEC 12
+. 80 7D 01 A0 7C 03 E0 40 41 81 00 10
+==== BB 886 (0x2547EAF8) approx BBs exec'd 0 ====
+
+ 0x2547EAF8: 809D01A8 lwz r4,424(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1A8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547EAFC: 7C84E040 cmpl cr1,r4,r28
+ 5: GETL R4, t4
+ 6: GETL R28, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x2547EB00: 41850084 bc 12,5,0x2547EB84
+ 10: Js05o $0x2547EB84
+
+
+
+. 886 2547EAF8 12
+. 80 9D 01 A8 7C 84 E0 40 41 85 00 84
+==== BB 887 (0x2547EB04) approx BBs exec'd 0 ====
+
+ 0x2547EB04: 83BD000C lwz r29,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x2547EB08: 2F9D0000 cmpi cr7,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547EB0C: 409EFFE0 bc 4,30,0x2547EAEC
+ 9: Jc30o $0x2547EAEC
+
+
+
+. 887 2547EB04 12
+. 83 BD 00 0C 2F 9D 00 00 40 9E FF E0
+==== BB 888 (0x2547EB84) approx BBs exec'd 0 ====
+
+ 0x2547EB84: 2F170000 cmpi cr6,r23,0
+ 0: GETL R23, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547EB88: 419A0018 bc 12,26,0x2547EBA0
+ 4: Js26o $0x2547EBA0
+
+
+
+. 888 2547EB84 8
+. 2F 17 00 00 41 9A 00 18
+==== BB 889 (0x2547EBA0) approx BBs exec'd 0 ====
+
+ 0x2547EBA0: 72C00001 andi. r0,r22,0x1
+ 0: GETL R22, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x2547EBA4: 41820018 bc 12,2,0x2547EBBC
+ 6: Js02o $0x2547EBBC
+
+
+
+. 889 2547EBA0 8
+. 72 C0 00 01 41 82 00 18
+==== BB 890 (0x2547EBBC) approx BBs exec'd 0 ====
+
+ 0x2547EBBC: 72A00001 andi. r0,r21,0x1
+ 0: GETL R21, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x2547EBC0: 41820018 bc 12,2,0x2547EBD8
+ 6: Js02o $0x2547EBD8
+
+
+
+. 890 2547EBBC 8
+. 72 A0 00 01 41 82 00 18
+==== BB 891 (0x2547EBC4) approx BBs exec'd 0 ====
+
+ 0x2547EBC4: 807E03E4 lwz r3,996(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x3E4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547EBC8: 809D0004 lwz r4,4(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x2547EBCC: 48004315 bl 0x25482EE0
+ 10: MOVL $0x2547EBD0, t8
+ 11: PUTL t8, LR
+ 12: JMPo-c $0x25482EE0 ($4)
+
+
+
+. 891 2547EBC4 12
+. 80 7E 03 E4 80 9D 00 04 48 00 43 15
+==== BB 892 (0x2547EBD0) approx BBs exec'd 0 ====
+
+ 0x2547EBD0: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547EBD4: 419A042C bc 12,26,0x2547F000
+ 4: Js26o $0x2547F000
+
+
+
+. 892 2547EBD0 8
+. 2F 03 00 00 41 9A 04 2C
+==== BB 893 (0x2547EBD8) approx BBs exec'd 0 ====
+
+ 0x2547EBD8: 72800001 andi. r0,r20,0x1
+ 0: GETL R20, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x2547EBDC: 41820018 bc 12,2,0x2547EBF4
+ 6: Js02o $0x2547EBF4
+
+
+
+. 893 2547EBD8 8
+. 72 80 00 01 41 82 00 18
+==== BB 894 (0x2547EBE0) approx BBs exec'd 0 ====
+
+ 0x2547EBE0: 807E03E8 lwz r3,1000(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x3E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547EBE4: 809D0004 lwz r4,4(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x2547EBE8: 480042F9 bl 0x25482EE0
+ 10: MOVL $0x2547EBEC, t8
+ 11: PUTL t8, LR
+ 12: JMPo-c $0x25482EE0 ($4)
+
+
+
+. 894 2547EBE0 12
+. 80 7E 03 E8 80 9D 00 04 48 00 42 F9
+==== BB 895 (0x2547EBEC) approx BBs exec'd 0 ====
+
+ 0x2547EBEC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547EBF0: 419E0410 bc 12,30,0x2547F000
+ 4: Js30o $0x2547F000
+
+
+
+. 895 2547EBEC 8
+. 2F 83 00 00 41 9E 04 10
+==== BB 896 (0x2547EBF4) approx BBs exec'd 0 ====
+
+ 0x2547EBF4: 83FD001C lwz r31,28(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x2547EBF8: 2C9F0000 cmpi cr1,r31,0
+ 5: GETL R31, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547EBFC: 41A6FF14 bc 13,6,0x2547EB10
+ 9: Js06o $0x2547EB10
+
+
+
+. 896 2547EBF4 12
+. 83 FD 00 1C 2C 9F 00 00 41 A6 FF 14
+==== BB 897 (0x2547EC00) approx BBs exec'd 0 ====
+
+ 0x2547EC00: 2F970000 cmpi cr7,r23,0
+ 0: GETL R23, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547EC04: 56C807FE rlwinm r8,r22,0,31,31
+ 4: GETL R22, t4
+ 5: ANDL $0x1, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0x2547EC08: 56A707FE rlwinm r7,r21,0,31,31
+ 8: GETL R21, t6
+ 9: ANDL $0x1, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0x2547EC0C: 2C880000 cmpi cr1,r8,0
+ 12: GETL R8, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x1, CR
+ 15: INCEIPL $4
+
+ 0x2547EC10: 2F070000 cmpi cr6,r7,0
+ 16: GETL R7, t12
+ 17: CMP0L t12, t14 (-rSo)
+ 18: ICRFL t14, $0x6, CR
+ 19: INCEIPL $4
+
+ 0x2547EC14: 72800001 andi. r0,r20,0x1
+ 20: GETL R20, t16
+ 21: ANDL $0x1, t16
+ 22: PUTL t16, R0
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x0, CR
+ 25: INCEIPL $4
+
+ 0x2547EC18: 409E004C bc 4,30,0x2547EC64
+ 26: Jc30o $0x2547EC64
+
+
+
+. 897 2547EC00 28
+. 2F 97 00 00 56 C8 07 FE 56 A7 07 FE 2C 88 00 00 2F 07 00 00 72 80 00 01 40 9E 00 4C
+==== BB 898 (0x2547EC1C) approx BBs exec'd 0 ====
+
+ 0x2547EC1C: 408200B8 bc 4,2,0x2547ECD4
+ 0: Jc02o $0x2547ECD4
+
+
+
+. 898 2547EC1C 4
+. 40 82 00 B8
+==== BB 899 (0x2547ECD4) approx BBs exec'd 0 ====
+
+ 0x2547ECD4: 419A01AC bc 12,26,0x2547EE80
+ 0: Js26o $0x2547EE80
+
+
+
+. 899 2547ECD4 4
+. 41 9A 01 AC
+==== BB 900 (0x2547ECD8) approx BBs exec'd 0 ====
+
+ 0x2547ECD8: 4186020C bc 12,6,0x2547EEE4
+ 0: Js06o $0x2547EEE4
+
+
+
+. 900 2547ECD8 4
+. 41 86 02 0C
+==== BB 901 (0x2547EEE4) approx BBs exec'd 0 ====
+
+ 0x2547EEE4: 83BF0000 lwz r29,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0x2547EEE8: 807E03E4 lwz r3,996(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x3E4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0x2547EEEC: 7FA4EB78 or r4,r29,r29
+ 9: GETL R29, t8
+ 10: PUTL t8, R4
+ 11: INCEIPL $4
+
+ 0x2547EEF0: 48003FF1 bl 0x25482EE0
+ 12: MOVL $0x2547EEF4, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0x25482EE0 ($4)
+
+
+
+. 901 2547EEE4 16
+. 83 BF 00 00 80 7E 03 E4 7F A4 EB 78 48 00 3F F1
+==== BB 902 (0x2547EEF4) approx BBs exec'd 0 ====
+
+ 0x2547EEF4: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547EEF8: 2F030000 cmpi cr6,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x6, CR
+ 6: INCEIPL $4
+
+ 0x2547EEFC: 807E03E8 lwz r3,1000(r30)
+ 7: GETL R30, t6
+ 8: ADDL $0x3E8, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R3
+ 11: INCEIPL $4
+
+ 0x2547EF00: 419A0100 bc 12,26,0x2547F000
+ 12: Js26o $0x2547F000
+
+
+
+. 902 2547EEF4 16
+. 7F A4 EB 78 2F 03 00 00 80 7E 03 E8 41 9A 01 00
+==== BB 903 (0x2547EF04) approx BBs exec'd 0 ====
+
+ 0x2547EF04: 48003FDD bl 0x25482EE0
+ 0: MOVL $0x2547EF08, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25482EE0 ($4)
+
+
+
+. 903 2547EF04 4
+. 48 00 3F DD
+==== BB 904 (0x2547EF08) approx BBs exec'd 0 ====
+
+ 0x2547EF08: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547EF0C: 418600F4 bc 12,6,0x2547F000
+ 4: Js06o $0x2547F000
+
+
+
+. 904 2547EF08 8
+. 2C 83 00 00 41 86 00 F4
+==== BB 905 (0x2547EF10) approx BBs exec'd 0 ====
+
+ 0x2547EF10: 83FF0004 lwz r31,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x2547EF14: 2C1F0000 cmpi cr0,r31,0
+ 5: GETL R31, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547EF18: 4082FFCC bc 4,2,0x2547EEE4
+ 9: Jc02o $0x2547EEE4
+
+
+
+. 905 2547EF10 12
+. 83 FF 00 04 2C 1F 00 00 40 82 FF CC
+==== BB 906 (0x2547EF1C) approx BBs exec'd 0 ====
+
+ 0x2547EF1C: 4BFFFBF4 b 0x2547EB10
+ 0: JMPo $0x2547EB10 ($4)
+
+
+
+. 906 2547EF1C 4
+. 4B FF FB F4
+==== BB 907 (0x2547EB10) approx BBs exec'd 0 ====
+
+ 0x2547EB10: 3B5A0001 addi r26,r26,1
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x2547EB14: 2C1A000F cmpi cr0,r26,15
+ 4: GETL R26, t2
+ 5: MOVL $0xF, t6
+ 6: CMPL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547EB18: 4081FFC4 bc 4,1,0x2547EADC
+ 9: Jc01o $0x2547EADC
+
+
+
+. 907 2547EB10 12
+. 3B 5A 00 01 2C 1A 00 0F 40 81 FF C4
+==== BB 908 (0x2547EADC) approx BBs exec'd 0 ====
+
+ 0x2547EADC: 83BB0000 lwz r29,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0x2547EAE0: 3B7B0018 addi r27,r27,24
+ 4: GETL R27, t4
+ 5: ADDL $0x18, t4
+ 6: PUTL t4, R27
+ 7: INCEIPL $4
+
+ 0x2547EAE4: 2F9D0000 cmpi cr7,r29,0
+ 8: GETL R29, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x2547EAE8: 419E0028 bc 12,30,0x2547EB10
+ 12: Js30o $0x2547EB10
+
+
+
+. 908 2547EADC 16
+. 83 BB 00 00 3B 7B 00 18 2F 9D 00 00 41 9E 00 28
+==== BB 909 (0x2547EB1C) approx BBs exec'd 0 ====
+
+ 0x2547EB1C: 73200008 andi. r0,r25,0x8
+ 0: GETL R25, t0
+ 1: ANDL $0x8, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x2547EB20: 41820020 bc 12,2,0x2547EB40
+ 6: Js02o $0x2547EB40
+
+
+
+. 909 2547EB1C 8
+. 73 20 00 08 41 82 00 20
+==== BB 910 (0x2547EB24) approx BBs exec'd 0 ====
+
+ 0x2547EB24: 80B80358 lwz r5,856(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0x358, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547EB28: 7F85E040 cmpl cr7,r5,r28
+ 5: GETL R5, t4
+ 6: GETL R28, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x2547EB2C: 419D0014 bc 12,29,0x2547EB40
+ 10: Js29o $0x2547EB40
+
+
+
+. 910 2547EB24 12
+. 80 B8 03 58 7F 85 E0 40 41 9D 00 14
+==== BB 911 (0x2547EB30) approx BBs exec'd 0 ====
+
+ 0x2547EB30: 80D80360 lwz r6,864(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0x360, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547EB34: 38600000 li r3,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547EB38: 7C86E040 cmpl cr1,r6,r28
+ 8: GETL R6, t6
+ 9: GETL R28, t8
+ 10: CMPUL t6, t8, t10 (-rSo)
+ 11: ICRFL t10, $0x1, CR
+ 12: INCEIPL $4
+
+ 0x2547EB3C: 41850008 bc 12,5,0x2547EB44
+ 13: Js05o $0x2547EB44
+
+
+
+. 911 2547EB30 16
+. 80 D8 03 60 38 60 00 00 7C 86 E0 40 41 85 00 08
+==== BB 912 (0x2547EB44) approx BBs exec'd 0 ====
+
+ 0x2547EB44: 81210044 lwz r9,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547EB48: 82810010 lwz r20,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R20
+ 9: INCEIPL $4
+
+ 0x2547EB4C: 82A10014 lwz r21,20(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R21
+ 14: INCEIPL $4
+
+ 0x2547EB50: 7D2803A6 mtlr r9
+ 15: GETL R9, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x2547EB54: 82C10018 lwz r22,24(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x18, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R22
+ 22: INCEIPL $4
+
+ 0x2547EB58: 82E1001C lwz r23,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R23
+ 27: INCEIPL $4
+
+ 0x2547EB5C: 83010020 lwz r24,32(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R24
+ 32: INCEIPL $4
+
+ 0x2547EB60: 83210024 lwz r25,36(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x24, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R25
+ 37: INCEIPL $4
+
+ 0x2547EB64: 83410028 lwz r26,40(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x28, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R26
+ 42: INCEIPL $4
+
+ 0x2547EB68: 8361002C lwz r27,44(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x2C, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R27
+ 47: INCEIPL $4
+
+ 0x2547EB6C: 83810030 lwz r28,48(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x30, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R28
+ 52: INCEIPL $4
+
+ 0x2547EB70: 83A10034 lwz r29,52(r1)
+ 53: GETL R1, t42
+ 54: ADDL $0x34, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R29
+ 57: INCEIPL $4
+
+ 0x2547EB74: 83C10038 lwz r30,56(r1)
+ 58: GETL R1, t46
+ 59: ADDL $0x38, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R30
+ 62: INCEIPL $4
+
+ 0x2547EB78: 83E1003C lwz r31,60(r1)
+ 63: GETL R1, t50
+ 64: ADDL $0x3C, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R31
+ 67: INCEIPL $4
+
+ 0x2547EB7C: 38210040 addi r1,r1,64
+ 68: GETL R1, t54
+ 69: ADDL $0x40, t54
+ 70: PUTL t54, R1
+ 71: INCEIPL $4
+
+ 0x2547EB80: 4E800020 blr
+ 72: GETL LR, t56
+ 73: JMPo-r t56 ($4)
+
+
+
+. 912 2547EB44 64
+. 81 21 00 44 82 81 00 10 82 A1 00 14 7D 28 03 A6 82 C1 00 18 82 E1 00 1C 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+==== BB 913 (0x2547E920) approx BBs exec'd 0 ====
+
+ 0x2547E920: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547E924: 409E011C bc 4,30,0x2547EA40
+ 4: Jc30o $0x2547EA40
+
+
+
+. 913 2547E920 8
+. 2F 83 00 00 40 9E 01 1C
+==== BB 914 (0x2547E928) approx BBs exec'd 0 ====
+
+ 0x2547E928: 811E04C0 lwz r8,1216(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547E92C: 81790000 lwz r11,0(r25)
+ 5: GETL R25, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0x2547E930: 80680000 lwz r3,0(r8)
+ 9: GETL R8, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R3
+ 12: INCEIPL $4
+
+ 0x2547E934: 7C0B1800 cmp cr0,r11,r3
+ 13: GETL R11, t12
+ 14: GETL R3, t14
+ 15: CMPL t12, t14, t16 (-rSo)
+ 16: ICRFL t16, $0x0, CR
+ 17: INCEIPL $4
+
+ 0x2547E938: 40820108 bc 4,2,0x2547EA40
+ 18: Jc02o $0x2547EA40
+
+
+
+. 914 2547E928 20
+. 81 1E 04 C0 81 79 00 00 80 68 00 00 7C 0B 18 00 40 82 01 08
+==== BB 915 (0x2547E93C) approx BBs exec'd 0 ====
+
+ 0x2547E93C: 83BE03D8 lwz r29,984(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x3D8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x2547E940: 839E050C lwz r28,1292(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x50C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x2547E944: 895D0000 lbz r10,0(r29)
+ 10: GETL R29, t8
+ 11: LDB (t8), t10
+ 12: PUTL t10, R10
+ 13: INCEIPL $4
+
+ 0x2547E948: 837E0514 lwz r27,1300(r30)
+ 14: GETL R30, t12
+ 15: ADDL $0x514, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R27
+ 18: INCEIPL $4
+
+ 0x2547E94C: 2C8A0000 cmpi cr1,r10,0
+ 19: GETL R10, t16
+ 20: CMP0L t16, t18 (-rSo)
+ 21: ICRFL t18, $0x1, CR
+ 22: INCEIPL $4
+
+ 0x2547E950: 418600BC bc 12,6,0x2547EA0C
+ 23: Js06o $0x2547EA0C
+
+
+
+. 915 2547E93C 24
+. 83 BE 03 D8 83 9E 05 0C 89 5D 00 00 83 7E 05 14 2C 8A 00 00 41 86 00 BC
+==== BB 916 (0x2547EA0C) approx BBs exec'd 0 ====
+
+ 0x2547EA0C: 809A0004 lwz r4,4(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547EA10: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547EA14: 80BC0000 lwz r5,0(r28)
+ 8: GETL R28, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0x2547EA18: 48003DA1 bl 0x254827B8
+ 12: MOVL $0x2547EA1C, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0x254827B8 ($4)
+
+
+
+. 916 2547EA0C 16
+. 80 9A 00 04 7F E3 FB 78 80 BC 00 00 48 00 3D A1
+==== BB 917 (0x254827C4) approx BBs exec'd 0 ====
+
+ 0x254827C4: 4BFFEB6C b 0x25481330
+ 0: JMPo $0x25481330 ($4)
+
+
+
+. 917 254827C4 4
+. 4B FF EB 6C
+==== BB 918 (0x2547EA1C) approx BBs exec'd 0 ====
+
+ 0x2547EA1C: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547EA20: 419AFFA0 bc 12,26,0x2547E9C0
+ 4: Js26o $0x2547E9C0
+
+
+
+. 918 2547EA1C 8
+. 2F 03 00 00 41 9A FF A0
+==== BB 919 (0x2547EA24) approx BBs exec'd 0 ====
+
+ 0x2547EA24: 837E0514 lwz r27,1300(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x514, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x2547EA28: 801B0000 lwz r0,0(r27)
+ 5: GETL R27, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x2547EA2C: 2F800016 cmpi cr7,r0,22
+ 9: GETL R0, t8
+ 10: MOVL $0x16, t12
+ 11: CMPL t8, t12, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x2547EA30: 409EFFAC bc 4,30,0x2547E9DC
+ 14: Jc30o $0x2547E9DC
+
+
+
+. 919 2547EA24 16
+. 83 7E 05 14 80 1B 00 00 2F 80 00 16 40 9E FF AC
+==== BB 920 (0x2547EA34) approx BBs exec'd 0 ====
+
+ 0x2547EA34: 39800001 li r12,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0x2547EA38: 999D0000 stb r12,0(r29)
+ 3: GETL R12, t2
+ 4: GETL R29, t4
+ 5: STB t2, (t4)
+ 6: INCEIPL $4
+
+ 0x2547EA3C: 4BFFFF18 b 0x2547E954
+ 7: JMPo $0x2547E954 ($4)
+
+
+
+. 920 2547EA34 12
+. 39 80 00 01 99 9D 00 00 4B FF FF 18
+==== BB 921 (0x2547E954) approx BBs exec'd 0 ====
+
+ 0x2547E954: 83BA0004 lwz r29,4(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x2547E958: 7D3DFA14 add r9,r29,r31
+ 5: GETL R29, t4
+ 6: GETL R31, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x2547E95C: 57BF1838 rlwinm r31,r29,3,0,28
+ 10: GETL R29, t8
+ 11: SHLL $0x3, t8
+ 12: PUTL t8, R31
+ 13: INCEIPL $4
+
+ 0x2547E960: 7FBF4850 subf r29,r31,r9
+ 14: GETL R31, t10
+ 15: GETL R9, t12
+ 16: SUBL t10, t12
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0x2547E964: 801C0000 lwz r0,0(r28)
+ 19: GETL R28, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R0
+ 22: INCEIPL $4
+
+ 0x2547E968: 7FE4FB78 or r4,r31,r31
+ 23: GETL R31, t18
+ 24: PUTL t18, R4
+ 25: INCEIPL $4
+
+ 0x2547E96C: 7FA3EB78 or r3,r29,r29
+ 26: GETL R29, t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0x2547E970: 5405020C rlwinm r5,r0,0,8,6
+ 29: GETL R0, t22
+ 30: ANDL $0xFEFFFFFF, t22
+ 31: PUTL t22, R5
+ 32: INCEIPL $4
+
+ 0x2547E974: 48003E45 bl 0x254827B8
+ 33: MOVL $0x2547E978, t24
+ 34: PUTL t24, LR
+ 35: JMPo-c $0x254827B8 ($4)
+
+
+
+. 921 2547E954 36
+. 83 BA 00 04 7D 3D FA 14 57 BF 18 38 7F BF 48 50 80 1C 00 00 7F E4 FB 78 7F A3 EB 78 54 05 02 0C 48 00 3E 45
+==== BB 922 (0x2547E978) approx BBs exec'd 0 ====
+
+ 0x2547E978: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x2547E97C: 40820024 bc 4,2,0x2547E9A0
+ 4: Jc02o $0x2547E9A0
+
+
+
+. 922 2547E978 8
+. 2C 03 00 00 40 82 00 24
+==== BB 923 (0x2547E9A0) approx BBs exec'd 0 ====
+
+ 0x2547E9A0: 801B0000 lwz r0,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547E9A4: 2C80000C cmpi cr1,r0,12
+ 4: GETL R0, t4
+ 5: MOVL $0xC, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547E9A8: 40860034 bc 4,6,0x2547E9DC
+ 9: Jc06o $0x2547E9DC
+
+
+
+. 923 2547E9A0 12
+. 80 1B 00 00 2C 80 00 0C 40 86 00 34
+==== BB 924 (0x2547E9AC) approx BBs exec'd 0 ====
+
+ 0x2547E9AC: 80BA0004 lwz r5,4(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547E9B0: 7F05F800 cmp cr6,r5,r31
+ 5: GETL R5, t4
+ 6: GETL R31, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x2547E9B4: 57FFF87E rlwinm r31,r31,31,1,31
+ 10: GETL R31, t10
+ 11: SHRL $0x1, t10
+ 12: PUTL t10, R31
+ 13: INCEIPL $4
+
+ 0x2547E9B8: 7FBDFA14 add r29,r29,r31
+ 14: GETL R29, t12
+ 15: GETL R31, t14
+ 16: ADDL t12, t14
+ 17: PUTL t14, R29
+ 18: INCEIPL $4
+
+ 0x2547E9BC: 409AFFA8 bc 4,26,0x2547E964
+ 19: Jc26o $0x2547E964
+
+
+
+. 924 2547E9AC 20
+. 80 BA 00 04 7F 05 F8 00 57 FF F8 7E 7F BD FA 14 40 9A FF A8
+==== BB 925 (0x2547E964) approx BBs exec'd 0 ====
+
+ 0x2547E964: 801C0000 lwz r0,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547E968: 7FE4FB78 or r4,r31,r31
+ 4: GETL R31, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0x2547E96C: 7FA3EB78 or r3,r29,r29
+ 7: GETL R29, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547E970: 5405020C rlwinm r5,r0,0,8,6
+ 10: GETL R0, t8
+ 11: ANDL $0xFEFFFFFF, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0x2547E974: 48003E45 bl 0x254827B8
+ 14: MOVL $0x2547E978, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x254827B8 ($4)
+
+
+
+. 925 2547E964 20
+. 80 1C 00 00 7F E4 FB 78 7F A3 EB 78 54 05 02 0C 48 00 3E 45
+==== BB 926 (0x2547E980) approx BBs exec'd 0 ====
+
+ 0x2547E980: 801C0000 lwz r0,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547E984: 7FBFE850 subf r29,r31,r29
+ 4: GETL R31, t4
+ 5: GETL R29, t6
+ 6: SUBL t4, t6
+ 7: PUTL t6, R29
+ 8: INCEIPL $4
+
+ 0x2547E988: 7FE4FB78 or r4,r31,r31
+ 9: GETL R31, t8
+ 10: PUTL t8, R4
+ 11: INCEIPL $4
+
+ 0x2547E98C: 7FA3EB78 or r3,r29,r29
+ 12: GETL R29, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x2547E990: 5405020C rlwinm r5,r0,0,8,6
+ 15: GETL R0, t12
+ 16: ANDL $0xFEFFFFFF, t12
+ 17: PUTL t12, R5
+ 18: INCEIPL $4
+
+ 0x2547E994: 48003E25 bl 0x254827B8
+ 19: MOVL $0x2547E998, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x254827B8 ($4)
+
+
+
+. 926 2547E980 24
+. 80 1C 00 00 7F BF E8 50 7F E4 FB 78 7F A3 EB 78 54 05 02 0C 48 00 3E 25
+==== BB 927 (0x2547E998) approx BBs exec'd 0 ====
+
+ 0x2547E998: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x2547E99C: 41A2FFE4 bc 13,2,0x2547E980
+ 4: Js02o $0x2547E980
+
+
+
+. 927 2547E998 8
+. 2C 03 00 00 41 A2 FF E4
+==== BB 928 (0x2547E9C0) approx BBs exec'd 0 ====
+
+ 0x2547E9C0: 835E04C8 lwz r26,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547E9C4: 3B800000 li r28,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x2547E9C8: 93990000 stw r28,0(r25)
+ 8: GETL R28, t6
+ 9: GETL R25, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x2547E9CC: 38000000 li r0,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0x2547E9D0: 837A0400 lwz r27,1024(r26)
+ 15: GETL R26, t12
+ 16: ADDL $0x400, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R27
+ 19: INCEIPL $4
+
+ 0x2547E9D4: 63790001 ori r25,r27,0x1
+ 20: GETL R27, t16
+ 21: ORL $0x1, t16
+ 22: PUTL t16, R25
+ 23: INCEIPL $4
+
+ 0x2547E9D8: 933A0400 stw r25,1024(r26)
+ 24: GETL R25, t18
+ 25: GETL R26, t20
+ 26: ADDL $0x400, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x2547E9DC: 83E10034 lwz r31,52(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x34, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R31
+ 33: INCEIPL $4
+
+ 0x2547E9E0: 7C030378 or r3,r0,r0
+ 34: GETL R0, t26
+ 35: PUTL t26, R3
+ 36: INCEIPL $4
+
+ 0x2547E9E4: 83210014 lwz r25,20(r1)
+ 37: GETL R1, t28
+ 38: ADDL $0x14, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R25
+ 41: INCEIPL $4
+
+ 0x2547E9E8: 7FE803A6 mtlr r31
+ 42: GETL R31, t32
+ 43: PUTL t32, LR
+ 44: INCEIPL $4
+
+ 0x2547E9EC: 83410018 lwz r26,24(r1)
+ 45: GETL R1, t34
+ 46: ADDL $0x18, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R26
+ 49: INCEIPL $4
+
+ 0x2547E9F0: 8361001C lwz r27,28(r1)
+ 50: GETL R1, t38
+ 51: ADDL $0x1C, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R27
+ 54: INCEIPL $4
+
+ 0x2547E9F4: 83810020 lwz r28,32(r1)
+ 55: GETL R1, t42
+ 56: ADDL $0x20, t42
+ 57: LDL (t42), t44
+ 58: PUTL t44, R28
+ 59: INCEIPL $4
+
+ 0x2547E9F8: 83A10024 lwz r29,36(r1)
+ 60: GETL R1, t46
+ 61: ADDL $0x24, t46
+ 62: LDL (t46), t48
+ 63: PUTL t48, R29
+ 64: INCEIPL $4
+
+ 0x2547E9FC: 83C10028 lwz r30,40(r1)
+ 65: GETL R1, t50
+ 66: ADDL $0x28, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R30
+ 69: INCEIPL $4
+
+ 0x2547EA00: 83E1002C lwz r31,44(r1)
+ 70: GETL R1, t54
+ 71: ADDL $0x2C, t54
+ 72: LDL (t54), t56
+ 73: PUTL t56, R31
+ 74: INCEIPL $4
+
+ 0x2547EA04: 38210030 addi r1,r1,48
+ 75: GETL R1, t58
+ 76: ADDL $0x30, t58
+ 77: PUTL t58, R1
+ 78: INCEIPL $4
+
+ 0x2547EA08: 4E800020 blr
+ 79: GETL LR, t60
+ 80: JMPo-r t60 ($4)
+
+
+
+. 928 2547E9C0 76
+. 83 5E 04 C8 3B 80 00 00 93 99 00 00 38 00 00 00 83 7A 04 00 63 79 00 01 93 3A 04 00 83 E1 00 34 7C 03 03 78 83 21 00 14 7F E8 03 A6 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 929 (0x254761B8) approx BBs exec'd 0 ====
+
+ 0x254761B8: 811E01E0 lwz r8,480(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1E0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254761BC: 7C6B1B79 or. r11,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R11
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x254761C0: 917F00A0 stw r11,160(r31)
+ 10: GETL R11, t8
+ 11: GETL R31, t10
+ 12: ADDL $0xA0, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x254761C4: 4182FD1C bc 12,2,0x25475EE0
+ 15: Js02o $0x25475EE0
+
+
+
+. 929 254761B8 16
+. 81 1E 01 E0 7C 6B 1B 79 91 7F 00 A0 41 82 FD 1C
+==== BB 930 (0x25476ED0) approx BBs exec'd 0 ====
+
+ 0x25476ED0: 809D001C lwz r4,28(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25476ED4: 3B600000 li r27,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R27
+ 7: INCEIPL $4
+
+ 0x25476ED8: 48000020 b 0x25476EF8
+ 8: JMPo $0x25476EF8 ($4)
+
+
+
+. 930 25476ED0 12
+. 80 9D 00 1C 3B 60 00 00 48 00 00 20
+==== BB 931 (0x25476EF8) approx BBs exec'd 0 ====
+
+ 0x25476EF8: 2F040000 cmpi cr6,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25476EFC: 409AFFE0 bc 4,26,0x25476EDC
+ 4: Jc26o $0x25476EDC
+
+
+
+. 931 25476EF8 8
+. 2F 04 00 00 40 9A FF E0
+==== BB 932 (0x25476EDC) approx BBs exec'd 0 ====
+
+ 0x25476EDC: 7C9B2378 or r27,r4,r4
+ 0: GETL R4, t0
+ 1: PUTL t0, R27
+ 2: INCEIPL $4
+
+ 0x25476EE0: 80840000 lwz r4,0(r4)
+ 3: GETL R4, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0x25476EE4: 7F83E378 or r3,r28,r28
+ 7: GETL R28, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25476EE8: 4800BFF9 bl 0x25482EE0
+ 10: MOVL $0x25476EEC, t8
+ 11: PUTL t8, LR
+ 12: JMPo-c $0x25482EE0 ($4)
+
+
+
+. 932 25476EDC 16
+. 7C 9B 23 78 80 84 00 00 7F 83 E3 78 48 00 BF F9
+==== BB 933 (0x25476EEC) approx BBs exec'd 0 ====
+
+ 0x25476EEC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25476EF0: 419E0058 bc 12,30,0x25476F48
+ 4: Js30o $0x25476F48
+
+
+
+. 933 25476EEC 8
+. 2F 83 00 00 41 9E 00 58
+==== BB 934 (0x25476EF4) approx BBs exec'd 0 ====
+
+ 0x25476EF4: 809B0004 lwz r4,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25476EF8: 2F040000 cmpi cr6,r4,0
+ 5: GETL R4, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25476EFC: 409AFFE0 bc 4,26,0x25476EDC
+ 9: Jc26o $0x25476EDC
+
+
+
+. 934 25476EF4 12
+. 80 9B 00 04 2F 04 00 00 40 9A FF E0
+==== BB 935 (0x25476F00) approx BBs exec'd 0 ====
+
+ 0x25476F00: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476F04: 4800C0CD bl 0x25482FD0
+ 3: MOVL $0x25476F08, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25482FD0 ($4)
+
+
+
+. 935 25476F00 8
+. 7F 83 E3 78 48 00 C0 CD
+==== BB 936 (0x25476F08) approx BBs exec'd 0 ====
+
+ 0x25476F08: 7C661B78 or r6,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x25476F0C: 3863000D addi r3,r3,13
+ 3: GETL R3, t2
+ 4: ADDL $0xD, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0x25476F10: 3B460001 addi r26,r6,1
+ 7: GETL R6, t4
+ 8: ADDL $0x1, t4
+ 9: PUTL t4, R26
+ 10: INCEIPL $4
+
+ 0x25476F14: 48020B11 bl 0x25497A24
+ 11: MOVL $0x25476F18, t6
+ 12: PUTL t6, LR
+ 13: JMPo-c $0x25497A24 ($4)
+
+
+
+. 936 25476F08 16
+. 7C 66 1B 78 38 63 00 0D 3B 46 00 01 48 02 0B 11
+==== BB 937 (0x25476F18) approx BBs exec'd 0 ====
+
+ 0x25476F18: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25476F1C: 80DE01AC lwz r6,428(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1AC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x25476F20: 7F84E378 or r4,r28,r28
+ 10: GETL R28, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25476F24: 4182013C bc 12,2,0x25477060
+ 13: Js02o $0x25477060
+
+
+
+. 937 25476F18 16
+. 7C 7F 1B 79 80 DE 01 AC 7F 84 E3 78 41 82 01 3C
+==== BB 938 (0x25476F28) approx BBs exec'd 0 ====
+
+ 0x25476F28: 7F84E378 or r4,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x25476F2C: 7F45D378 or r5,r26,r26
+ 3: GETL R26, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25476F30: 387F000C addi r3,r31,12
+ 6: GETL R31, t4
+ 7: ADDL $0xC, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0x25476F34: 4800CCAD bl 0x25483BE0
+ 10: MOVL $0x25476F38, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0x25483BE0 ($4)
+
+
+
+. 938 25476F28 16
+. 7F 84 E3 78 7F 45 D3 78 38 7F 00 0C 48 00 CC AD
+==== BB 939 (0x25476F38) approx BBs exec'd 0 ====
+
+ 0x25476F38: 92DF0004 stw r22,4(r31)
+ 0: GETL R22, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x4, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25476F3C: 907F0000 stw r3,0(r31)
+ 5: GETL R3, t4
+ 6: GETL R31, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x25476F40: 92DF0008 stw r22,8(r31)
+ 9: GETL R22, t8
+ 10: GETL R31, t10
+ 11: ADDL $0x8, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25476F44: 93FB0004 stw r31,4(r27)
+ 14: GETL R31, t12
+ 15: GETL R27, t14
+ 16: ADDL $0x4, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25476F48: 811D0180 lwz r8,384(r29)
+ 19: GETL R29, t16
+ 20: ADDL $0x180, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R8
+ 23: INCEIPL $4
+
+ 0x25476F4C: 65070080 oris r7,r8,0x80
+ 24: GETL R8, t20
+ 25: ORL $0x800000, t20
+ 26: PUTL t20, R7
+ 27: INCEIPL $4
+
+ 0x25476F50: 90FD0180 stw r7,384(r29)
+ 28: GETL R7, t22
+ 29: GETL R29, t24
+ 30: ADDL $0x180, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0x25476F54: 7FA3EB78 or r3,r29,r29
+ 33: GETL R29, t26
+ 34: PUTL t26, R3
+ 35: INCEIPL $4
+
+ 0x25476F58: 83E10294 lwz r31,660(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x294, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R31
+ 40: INCEIPL $4
+
+ 0x25476F5C: 81810244 lwz r12,580(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x244, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R12
+ 45: INCEIPL $4
+
+ 0x25476F60: 7FE803A6 mtlr r31
+ 46: GETL R31, t36
+ 47: PUTL t36, LR
+ 48: INCEIPL $4
+
+ 0x25476F64: 81C10248 lwz r14,584(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x248, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R14
+ 53: INCEIPL $4
+
+ 0x25476F68: 81E1024C lwz r15,588(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x24C, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R15
+ 58: INCEIPL $4
+
+ 0x25476F6C: 7D818120 mtcrf 0x18,r12
+ 59: GETL R12, t46
+ 60: ICRFL t46, $0x3, CR
+ 61: ICRFL t46, $0x4, CR
+ 62: INCEIPL $4
+
+ 0x25476F70: 82010250 lwz r16,592(r1)
+ 63: GETL R1, t48
+ 64: ADDL $0x250, t48
+ 65: LDL (t48), t50
+ 66: PUTL t50, R16
+ 67: INCEIPL $4
+
+ 0x25476F74: 82210254 lwz r17,596(r1)
+ 68: GETL R1, t52
+ 69: ADDL $0x254, t52
+ 70: LDL (t52), t54
+ 71: PUTL t54, R17
+ 72: INCEIPL $4
+
+ 0x25476F78: 82410258 lwz r18,600(r1)
+ 73: GETL R1, t56
+ 74: ADDL $0x258, t56
+ 75: LDL (t56), t58
+ 76: PUTL t58, R18
+ 77: INCEIPL $4
+
+ 0x25476F7C: 8261025C lwz r19,604(r1)
+ 78: GETL R1, t60
+ 79: ADDL $0x25C, t60
+ 80: LDL (t60), t62
+ 81: PUTL t62, R19
+ 82: INCEIPL $4
+
+ 0x25476F80: 82810260 lwz r20,608(r1)
+ 83: GETL R1, t64
+ 84: ADDL $0x260, t64
+ 85: LDL (t64), t66
+ 86: PUTL t66, R20
+ 87: INCEIPL $4
+
+ 0x25476F84: 82A10264 lwz r21,612(r1)
+ 88: GETL R1, t68
+ 89: ADDL $0x264, t68
+ 90: LDL (t68), t70
+ 91: PUTL t70, R21
+ 92: INCEIPL $4
+
+ 0x25476F88: 82C10268 lwz r22,616(r1)
+ 93: GETL R1, t72
+ 94: ADDL $0x268, t72
+ 95: LDL (t72), t74
+ 96: PUTL t74, R22
+ 97: INCEIPL $4
+
+ 0x25476F8C: 82E1026C lwz r23,620(r1)
+ 98: GETL R1, t76
+ 99: ADDL $0x26C, t76
+ 100: LDL (t76), t78
+ 101: PUTL t78, R23
+ 102: INCEIPL $4
+
+ 0x25476F90: 83010270 lwz r24,624(r1)
+ 103: GETL R1, t80
+ 104: ADDL $0x270, t80
+ 105: LDL (t80), t82
+ 106: PUTL t82, R24
+ 107: INCEIPL $4
+
+ 0x25476F94: 83210274 lwz r25,628(r1)
+ 108: GETL R1, t84
+ 109: ADDL $0x274, t84
+ 110: LDL (t84), t86
+ 111: PUTL t86, R25
+ 112: INCEIPL $4
+
+ 0x25476F98: 83410278 lwz r26,632(r1)
+ 113: GETL R1, t88
+ 114: ADDL $0x278, t88
+ 115: LDL (t88), t90
+ 116: PUTL t90, R26
+ 117: INCEIPL $4
+
+ 0x25476F9C: 8361027C lwz r27,636(r1)
+ 118: GETL R1, t92
+ 119: ADDL $0x27C, t92
+ 120: LDL (t92), t94
+ 121: PUTL t94, R27
+ 122: INCEIPL $4
+
+ 0x25476FA0: 83810280 lwz r28,640(r1)
+ 123: GETL R1, t96
+ 124: ADDL $0x280, t96
+ 125: LDL (t96), t98
+ 126: PUTL t98, R28
+ 127: INCEIPL $4
+
+ 0x25476FA4: 83A10284 lwz r29,644(r1)
+ 128: GETL R1, t100
+ 129: ADDL $0x284, t100
+ 130: LDL (t100), t102
+ 131: PUTL t102, R29
+ 132: INCEIPL $4
+
+ 0x25476FA8: 83C10288 lwz r30,648(r1)
+ 133: GETL R1, t104
+ 134: ADDL $0x288, t104
+ 135: LDL (t104), t106
+ 136: PUTL t106, R30
+ 137: INCEIPL $4
+
+ 0x25476FAC: 83E1028C lwz r31,652(r1)
+ 138: GETL R1, t108
+ 139: ADDL $0x28C, t108
+ 140: LDL (t108), t110
+ 141: PUTL t110, R31
+ 142: INCEIPL $4
+
+ 0x25476FB0: 38210290 addi r1,r1,656
+ 143: GETL R1, t112
+ 144: ADDL $0x290, t112
+ 145: PUTL t112, R1
+ 146: INCEIPL $4
+
+ 0x25476FB4: 4E800020 blr
+ 147: GETL LR, t114
+ 148: JMPo-r t114 ($4)
+
+
+
+. 939 25476F38 128
+. 92 DF 00 04 90 7F 00 00 92 DF 00 08 93 FB 00 04 81 1D 01 80 65 07 00 80 90 FD 01 80 7F A3 EB 78 83 E1 02 94 81 81 02 44 7F E8 03 A6 81 C1 02 48 81 E1 02 4C 7D 81 81 20 82 01 02 50 82 21 02 54 82 41 02 58 82 61 02 5C 82 81 02 60 82 A1 02 64 82 C1 02 68 82 E1 02 6C 83 01 02 70 83 21 02 74 83 41 02 78 83 61 02 7C 83 81 02 80 83 A1 02 84 83 C1 02 88 83 E1 02 8C 38 21 02 90 4E 80 00 20
+==== BB 940 (0x2547726C) approx BBs exec'd 0 ====
+
+ 0x2547726C: 2F800000 cmpi cr7,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25477270: 39200001 li r9,1
+ 4: MOVL $0x1, t4
+ 5: PUTL t4, R9
+ 6: INCEIPL $4
+
+ 0x25477274: 409E001C bc 4,30,0x25477290
+ 7: Jc30o $0x25477290
+
+
+
+. 940 2547726C 12
+. 2F 80 00 00 39 20 00 01 40 9E 00 1C
+==== BB 941 (0x25477278) approx BBs exec'd 0 ====
+
+ 0x25477278: 817B0094 lwz r11,148(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x94, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547727C: 2C8B0000 cmpi cr1,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25477280: 408601DC bc 4,6,0x2547745C
+ 9: Jc06o $0x2547745C
+
+
+
+. 941 25477278 12
+. 81 7B 00 94 2C 8B 00 00 40 86 01 DC
+==== BB 942 (0x25477284) approx BBs exec'd 0 ====
+
+ 0x25477284: 3880FFFF li r4,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x25477288: 39200000 li r9,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x2547728C: 909B01E0 stw r4,480(r27)
+ 6: GETL R4, t4
+ 7: GETL R27, t6
+ 8: ADDL $0x1E0, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x25477290: 2C090000 cmpi cr0,r9,0
+ 11: GETL R9, t8
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25477294: 408200DC bc 4,2,0x25477370
+ 15: Jc02o $0x25477370
+
+
+
+. 942 25477284 20
+. 38 80 FF FF 39 20 00 00 90 9B 01 E0 2C 09 00 00 40 82 00 DC
+==22130== Reading syms from /lib/libdl-2.3.4.so (0xFFB0000)
+==22130== object doesn't have any debug info
+==== BB 943 (0x25483920) approx BBs exec'd 0 ====
+
+ 0x25483920: 28850010 cmpli cr1,r5,16
+ 0: GETL R5, t0
+ 1: MOVL $0x10, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25483924: 7CC62A14 add r6,r6,r5
+ 5: GETL R6, t6
+ 6: GETL R5, t8
+ 7: ADDL t6, t8
+ 8: PUTL t8, R6
+ 9: INCEIPL $4
+
+ 0x25483928: 419F0020 bc 12,31,0x25483948
+ 10: Js31o $0x25483948
+
+
+
+. 943 25483920 12
+. 28 85 00 10 7C C6 2A 14 41 9F 00 20
+==== BB 944 (0x25483960) approx BBs exec'd 0 ====
+
+ 0x25483960: 9086FFFC stw r4,-4(r6)
+ 0: GETL R4, t0
+ 1: GETL R6, t2
+ 2: ADDL $0xFFFFFFFC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25483964: 9086FFF8 stw r4,-8(r6)
+ 5: GETL R4, t4
+ 6: GETL R6, t6
+ 7: ADDL $0xFFFFFFF8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25483968: 9086FFF4 stw r4,-12(r6)
+ 10: GETL R4, t8
+ 11: GETL R6, t10
+ 12: ADDL $0xFFFFFFF4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x2548396C: 9486FFF0 stwu r4,-16(r6)
+ 15: GETL R4, t12
+ 16: GETL R6, t14
+ 17: ADDL $0xFFFFFFF0, t14
+ 18: PUTL t14, R6
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x25483970: 4C9C0020 bclr 4,28
+ 21: GETL LR, t16
+ 22: Jc28o-r t16
+
+
+
+. 944 25483960 20
+. 90 86 FF FC 90 86 FF F8 90 86 FF F4 94 86 FF F0 4C 9C 00 20
+==== BB 945 (0x254760FC) approx BBs exec'd 0 ====
+
+ 0x254760FC: 817A01FC lwz r11,508(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x1FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25476100: 4BFFFCC0 b 0x25475DC0
+ 5: JMPo $0x25475DC0 ($4)
+
+
+
+. 945 254760FC 8
+. 81 7A 01 FC 4B FF FC C0
+==== BB 946 (0x2547A374) approx BBs exec'd 0 ====
+
+ 0x2547A374: 809A00F0 lwz r4,240(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0xF0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547A378: 2C840000 cmpi cr1,r4,0
+ 5: GETL R4, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547A37C: 40860010 bc 4,6,0x2547A38C
+ 9: Jc06o $0x2547A38C
+
+
+
+. 946 2547A374 12
+. 80 9A 00 F0 2C 84 00 00 40 86 00 10
+==== BB 947 (0x2547A380) approx BBs exec'd 0 ====
+
+ 0x2547A380: 80BA00E8 lwz r5,232(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0xE8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547A384: 2C050000 cmpi cr0,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547A388: 41820530 bc 12,2,0x2547A8B8
+ 9: Js02o $0x2547A8B8
+
+
+
+. 947 2547A380 12
+. 80 BA 00 E8 2C 05 00 00 41 82 05 30
+==== BB 948 (0x2547A5C4) approx BBs exec'd 0 ====
+
+ 0x2547A5C4: 83100000 lwz r24,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R24
+ 3: INCEIPL $4
+
+ 0x2547A5C8: 827F0038 lwz r19,56(r31)
+ 4: GETL R31, t4
+ 5: ADDL $0x38, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R19
+ 8: INCEIPL $4
+
+ 0x2547A5CC: 21780000 subfic r11,r24,0
+ 9: GETL R24, t8
+ 10: MOVL $0x0, t10
+ 11: SBBL t8, t10 (-wCa)
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0x2547A5D0: 7DCBC114 adde r14,r11,r24
+ 14: GETL R11, t12
+ 15: GETL R24, t14
+ 16: ADCL t12, t14 (-rCa-wCa)
+ 17: PUTL t14, R14
+ 18: INCEIPL $4
+
+ 0x2547A5D4: 3153FFFF addic r10,r19,-1
+ 19: GETL R19, t16
+ 20: ADCL $0xFFFFFFFF, t16 (-wCa)
+ 21: PUTL t16, R10
+ 22: INCEIPL $4
+
+ 0x2547A5D8: 7F6A9910 subfe r27,r10,r19
+ 23: GETL R10, t18
+ 24: GETL R19, t20
+ 25: SBBL t18, t20 (-rCa-wCa)
+ 26: PUTL t20, R27
+ 27: INCEIPL $4
+
+ 0x2547A5DC: 7DC8D839 and. r8,r14,r27
+ 28: GETL R14, t22
+ 29: GETL R27, t24
+ 30: ANDL t22, t24
+ 31: PUTL t24, R8
+ 32: CMP0L t24, t26 (-rSo)
+ 33: ICRFL t26, $0x0, CR
+ 34: INCEIPL $4
+
+ 0x2547A5E0: 4182000C bc 12,2,0x2547A5EC
+ 35: Js02o $0x2547A5EC
+
+
+
+. 948 2547A5C4 32
+. 83 10 00 00 82 7F 00 38 21 78 00 00 7D CB C1 14 31 53 FF FF 7F 6A 99 10 7D C8 D8 39 41 82 00 0C
+==== BB 949 (0x2547A5E4) approx BBs exec'd 0 ====
+
+ 0x2547A5E4: 811F0038 lwz r8,56(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x38, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547A5E8: 91100000 stw r8,0(r16)
+ 5: GETL R8, t4
+ 6: GETL R16, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547A5EC: 807701E8 lwz r3,488(r23)
+ 9: GETL R23, t8
+ 10: ADDL $0x1E8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R3
+ 13: INCEIPL $4
+
+ 0x2547A5F0: 2F030000 cmpi cr6,r3,0
+ 14: GETL R3, t12
+ 15: CMP0L t12, t14 (-rSo)
+ 16: ICRFL t14, $0x6, CR
+ 17: INCEIPL $4
+
+ 0x2547A5F4: 419A0018 bc 12,26,0x2547A60C
+ 18: Js26o $0x2547A60C
+
+
+
+. 949 2547A5E4 20
+. 81 1F 00 38 91 10 00 00 80 77 01 E8 2F 03 00 00 41 9A 00 18
+==== BB 950 (0x2547A60C) approx BBs exec'd 0 ====
+
+ 0x2547A60C: 80DF000C lwz r6,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547A610: 54C51838 rlwinm r5,r6,3,0,28
+ 5: GETL R6, t4
+ 6: SHLL $0x3, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547A614: 38650004 addi r3,r5,4
+ 9: GETL R5, t6
+ 10: ADDL $0x4, t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0x2547A618: 4801D40D bl 0x25497A24
+ 13: MOVL $0x2547A61C, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0x25497A24 ($4)
+
+
+
+. 950 2547A60C 16
+. 80 DF 00 0C 54 C5 18 38 38 65 00 04 48 01 D4 0D
+==== BB 951 (0x2547A61C) approx BBs exec'd 0 ====
+
+ 0x2547A61C: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547A620: 907701E8 stw r3,488(r23)
+ 4: GETL R3, t4
+ 5: GETL R23, t6
+ 6: ADDL $0x1E8, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547A624: 4186089C bc 12,6,0x2547AEC0
+ 9: Js06o $0x2547AEC0
+
+
+
+. 951 2547A61C 12
+. 2C 83 00 00 90 77 01 E8 41 86 08 9C
+==== BB 952 (0x2547A628) approx BBs exec'd 0 ====
+
+ 0x2547A628: 80FF0008 lwz r7,8(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547A62C: 38A00000 li r5,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547A630: 829F000C lwz r20,12(r31)
+ 8: GETL R31, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R20
+ 12: INCEIPL $4
+
+ 0x2547A634: 2C070000 cmpi cr0,r7,0
+ 13: GETL R7, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x0, CR
+ 16: INCEIPL $4
+
+ 0x2547A638: 569D103A rlwinm r29,r20,2,0,29
+ 17: GETL R20, t14
+ 18: SHLL $0x2, t14
+ 19: PUTL t14, R29
+ 20: INCEIPL $4
+
+ 0x2547A63C: 9297015C stw r20,348(r23)
+ 21: GETL R20, t16
+ 22: GETL R23, t18
+ 23: ADDL $0x15C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547A640: 7D23EA14 add r9,r3,r29
+ 26: GETL R3, t20
+ 27: GETL R29, t22
+ 28: ADDL t20, t22
+ 29: PUTL t22, R9
+ 30: INCEIPL $4
+
+ 0x2547A644: 90BF000C stw r5,12(r31)
+ 31: GETL R5, t24
+ 32: GETL R31, t26
+ 33: ADDL $0xC, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547A648: 38890004 addi r4,r9,4
+ 36: GETL R9, t28
+ 37: ADDL $0x4, t28
+ 38: PUTL t28, R4
+ 39: INCEIPL $4
+
+ 0x2547A64C: 90970158 stw r4,344(r23)
+ 40: GETL R4, t30
+ 41: GETL R23, t32
+ 42: ADDL $0x158, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x2547A650: 41820050 bc 12,2,0x2547A6A0
+ 45: Js02o $0x2547A6A0
+
+
+
+. 952 2547A628 44
+. 80 FF 00 08 38 A0 00 00 82 9F 00 0C 2C 07 00 00 56 9D 10 3A 92 97 01 5C 7D 23 EA 14 90 BF 00 0C 38 89 00 04 90 97 01 58 41 82 00 50
+==== BB 953 (0x2547A654) approx BBs exec'd 0 ====
+
+ 0x2547A654: 2F0F0000 cmpi cr6,r15,0
+ 0: GETL R15, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547A658: 38C00000 li r6,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R6
+ 6: INCEIPL $4
+
+ 0x2547A65C: 409A01F8 bc 4,26,0x2547A854
+ 7: Jc26o $0x2547A854
+
+
+
+. 953 2547A654 12
+. 2F 0F 00 00 38 C0 00 00 40 9A 01 F8
+==== BB 954 (0x2547A660) approx BBs exec'd 0 ====
+
+ 0x2547A660: 817F000C lwz r11,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547A664: 80070004 lwz r0,4(r7)
+ 5: GETL R7, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x2547A668: 83370158 lwz r25,344(r23)
+ 10: GETL R23, t8
+ 11: ADDL $0x158, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R25
+ 14: INCEIPL $4
+
+ 0x2547A66C: 5576103A rlwinm r22,r11,2,0,29
+ 15: GETL R11, t12
+ 16: SHLL $0x2, t12
+ 17: PUTL t12, R22
+ 18: INCEIPL $4
+
+ 0x2547A670: 398B0001 addi r12,r11,1
+ 19: GETL R11, t14
+ 20: ADDL $0x1, t14
+ 21: PUTL t14, R12
+ 22: INCEIPL $4
+
+ 0x2547A674: 7C16C92E stwx r0,r22,r25
+ 23: GETL R25, t16
+ 24: GETL R22, t18
+ 25: ADDL t18, t16
+ 26: GETL R0, t20
+ 27: STL t20, (t16)
+ 28: INCEIPL $4
+
+ 0x2547A678: 81E70004 lwz r15,4(r7)
+ 29: GETL R7, t22
+ 30: ADDL $0x4, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R15
+ 33: INCEIPL $4
+
+ 0x2547A67C: 806F0180 lwz r3,384(r15)
+ 34: GETL R15, t26
+ 35: ADDL $0x180, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R3
+ 38: INCEIPL $4
+
+ 0x2547A680: 919F000C stw r12,12(r31)
+ 39: GETL R12, t30
+ 40: GETL R31, t32
+ 41: ADDL $0xC, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0x2547A684: 50C3C94C rlwimi r3,r6,25,5,6
+ 44: GETL R3, t34
+ 45: GETL R6, t36
+ 46: ROLL $0x19, t36
+ 47: ANDL $0x6000000, t36
+ 48: ANDL $0xF9FFFFFF, t34
+ 49: ORL t34, t36
+ 50: PUTL t36, R3
+ 51: INCEIPL $4
+
+ 0x2547A688: 906F0180 stw r3,384(r15)
+ 52: GETL R3, t38
+ 53: GETL R15, t40
+ 54: ADDL $0x180, t40
+ 55: STL t38, (t40)
+ 56: INCEIPL $4
+
+ 0x2547A68C: 80E70008 lwz r7,8(r7)
+ 57: GETL R7, t42
+ 58: ADDL $0x8, t42
+ 59: LDL (t42), t44
+ 60: PUTL t44, R7
+ 61: INCEIPL $4
+
+ 0x2547A690: 2F070000 cmpi cr6,r7,0
+ 62: GETL R7, t46
+ 63: CMP0L t46, t48 (-rSo)
+ 64: ICRFL t48, $0x6, CR
+ 65: INCEIPL $4
+
+ 0x2547A694: 409AFFCC bc 4,26,0x2547A660
+ 66: Jc26o $0x2547A660
+
+
+
+. 954 2547A660 56
+. 81 7F 00 0C 80 07 00 04 83 37 01 58 55 76 10 3A 39 8B 00 01 7C 16 C9 2E 81 E7 00 04 80 6F 01 80 91 9F 00 0C 50 C3 C9 4C 90 6F 01 80 80 E7 00 08 2F 07 00 00 40 9A FF CC
+==== BB 955 (0x2547A698) approx BBs exec'd 0 ====
+
+ 0x2547A698: 80BF000C lwz r5,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547A69C: 80970158 lwz r4,344(r23)
+ 5: GETL R23, t4
+ 6: ADDL $0x158, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x2547A6A0: 839E04F4 lwz r28,1268(r30)
+ 10: GETL R30, t8
+ 11: ADDL $0x4F4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R28
+ 14: INCEIPL $4
+
+ 0x2547A6A4: 80FC0000 lwz r7,0(r28)
+ 15: GETL R28, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R7
+ 18: INCEIPL $4
+
+ 0x2547A6A8: 70E80400 andi. r8,r7,0x400
+ 19: GETL R7, t16
+ 20: ANDL $0x400, t16
+ 21: PUTL t16, R8
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x0, CR
+ 24: INCEIPL $4
+
+ 0x2547A6AC: 408204E0 bc 4,2,0x2547AB8C
+ 25: Jc02o $0x2547AB8C
+
+
+
+. 955 2547A698 24
+. 80 BF 00 0C 80 97 01 58 83 9E 04 F4 80 FC 00 00 70 E8 04 00 40 82 04 E0
+==== BB 956 (0x2547A6B0) approx BBs exec'd 0 ====
+
+ 0x2547A6B0: 80D701F0 lwz r6,496(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x1F0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547A6B4: 38600000 li r3,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547A6B8: 2B860000 cmpli cr7,r6,0
+ 8: GETL R6, t6
+ 9: MOVL $0x0, t10
+ 10: CMPUL t6, t10, t8 (-rSo)
+ 11: ICRFL t8, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x2547A6BC: 409D0048 bc 4,29,0x2547A704
+ 13: Jc29o $0x2547A704
+
+
+
+. 956 2547A6B0 16
+. 80 D7 01 F0 38 60 00 00 2B 86 00 00 40 9D 00 48
+==== BB 957 (0x2547A704) approx BBs exec'd 0 ====
+
+ 0x2547A704: 807701E8 lwz r3,488(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x1E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547A708: 54A5103A rlwinm r5,r5,2,0,29
+ 5: GETL R5, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547A70C: 3B000001 li r24,1
+ 9: MOVL $0x1, t6
+ 10: PUTL t6, R24
+ 11: INCEIPL $4
+
+ 0x2547A710: 480094D1 bl 0x25483BE0
+ 12: MOVL $0x2547A714, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25483BE0 ($4)
+
+
+
+. 957 2547A704 16
+. 80 77 01 E8 54 A5 10 3A 3B 00 00 01 48 00 94 D1
+==== BB 958 (0x25483DFC) approx BBs exec'd 0 ====
+
+ 0x25483DFC: 81240000 lwz r9,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25483E00: 3884FFFC addi r4,r4,-4
+ 4: GETL R4, t4
+ 5: ADDL $0xFFFFFFFC, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25483E04: 80040008 lwz r0,8(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x25483E08: 3863FFF8 addi r3,r3,-8
+ 13: GETL R3, t10
+ 14: ADDL $0xFFFFFFF8, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0x25483E0C: 38A50001 addi r5,r5,1
+ 17: GETL R5, t12
+ 18: ADDL $0x1, t12
+ 19: PUTL t12, R5
+ 20: INCEIPL $4
+
+ 0x25483E10: 91230008 stw r9,8(r3)
+ 21: GETL R9, t14
+ 22: GETL R3, t16
+ 23: ADDL $0x8, t16
+ 24: STL t14, (t16)
+ 25: INCEIPL $4
+
+ 0x25483E14: 4BFFFF10 b 0x25483D24
+ 26: JMPo $0x25483D24 ($4)
+
+
+
+. 958 25483DFC 28
+. 81 24 00 00 38 84 FF FC 80 04 00 08 38 63 FF F8 38 A5 00 01 91 23 00 08 4B FF FF 10
+==== BB 959 (0x25483D24) approx BBs exec'd 0 ====
+
+ 0x25483D24: 8124000C lwz r9,12(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25483D28: 9003000C stw r0,12(r3)
+ 5: GETL R0, t4
+ 6: GETL R3, t6
+ 7: ADDL $0xC, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25483D2C: 80040010 lwz r0,16(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0x10, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0x25483D30: 91230010 stw r9,16(r3)
+ 15: GETL R9, t12
+ 16: GETL R3, t14
+ 17: ADDL $0x10, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25483D34: 81240014 lwz r9,20(r4)
+ 20: GETL R4, t16
+ 21: ADDL $0x14, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R9
+ 24: INCEIPL $4
+
+ 0x25483D38: 90030014 stw r0,20(r3)
+ 25: GETL R0, t20
+ 26: GETL R3, t22
+ 27: ADDL $0x14, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0x25483D3C: 80040018 lwz r0,24(r4)
+ 30: GETL R4, t24
+ 31: ADDL $0x18, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R0
+ 34: INCEIPL $4
+
+ 0x25483D40: 91230018 stw r9,24(r3)
+ 35: GETL R9, t28
+ 36: GETL R3, t30
+ 37: ADDL $0x18, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x25483D44: 34A5FFF8 addic. r5,r5,-8
+ 40: GETL R5, t32
+ 41: ADCL $0xFFFFFFF8, t32 (-wCa)
+ 42: PUTL t32, R5
+ 43: CMP0L t32, t34 (-rSo)
+ 44: ICRFL t34, $0x0, CR
+ 45: INCEIPL $4
+
+ 0x25483D48: 8124001C lwz r9,28(r4)
+ 46: GETL R4, t36
+ 47: ADDL $0x1C, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R9
+ 50: INCEIPL $4
+
+ 0x25483D4C: 9003001C stw r0,28(r3)
+ 51: GETL R0, t40
+ 52: GETL R3, t42
+ 53: ADDL $0x1C, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0x25483D50: 38840020 addi r4,r4,32
+ 56: GETL R4, t44
+ 57: ADDL $0x20, t44
+ 58: PUTL t44, R4
+ 59: INCEIPL $4
+
+ 0x25483D54: 38630020 addi r3,r3,32
+ 60: GETL R3, t46
+ 61: ADDL $0x20, t46
+ 62: PUTL t46, R3
+ 63: INCEIPL $4
+
+ 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
+ 64: Jc02o $0x25483D0C
+
+
+
+. 959 25483D24 56
+. 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+==== BB 960 (0x2547A714) approx BBs exec'd 0 ====
+
+ 0x2547A714: 80FF000C lwz r7,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547A718: 7C183840 cmpl cr0,r24,r7
+ 5: GETL R24, t4
+ 6: GETL R7, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547A71C: 4080032C bc 4,0,0x2547AA48
+ 10: Jc00o $0x2547AA48
+
+
+
+. 960 2547A714 12
+. 80 FF 00 0C 7C 18 38 40 40 80 03 2C
+==== BB 961 (0x2547A720) approx BBs exec'd 0 ====
+
+ 0x2547A720: 815701E8 lwz r10,488(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x1E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547A724: 82570158 lwz r18,344(r23)
+ 5: GETL R23, t4
+ 6: ADDL $0x158, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R18
+ 9: INCEIPL $4
+
+ 0x2547A728: 5715103A rlwinm r21,r24,2,0,29
+ 10: GETL R24, t8
+ 11: SHLL $0x2, t8
+ 12: PUTL t8, R21
+ 13: INCEIPL $4
+
+ 0x2547A72C: 806A0004 lwz r3,4(r10)
+ 14: GETL R10, t10
+ 15: ADDL $0x4, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R3
+ 18: INCEIPL $4
+
+ 0x2547A730: 3B200001 li r25,1
+ 19: MOVL $0x1, t14
+ 20: PUTL t14, R25
+ 21: INCEIPL $4
+
+ 0x2547A734: 7F55902E lwzx r26,r21,r18
+ 22: GETL R18, t16
+ 23: GETL R21, t18
+ 24: ADDL t18, t16
+ 25: LDL (t16), t20
+ 26: PUTL t20, R26
+ 27: INCEIPL $4
+
+ 0x2547A738: 7F83D000 cmp cr7,r3,r26
+ 28: GETL R3, t22
+ 29: GETL R26, t24
+ 30: CMPL t22, t24, t26 (-rSo)
+ 31: ICRFL t26, $0x7, CR
+ 32: INCEIPL $4
+
+ 0x2547A73C: 419E0018 bc 12,30,0x2547A754
+ 33: Js30o $0x2547A754
+
+
+
+. 961 2547A720 32
+. 81 57 01 E8 82 57 01 58 57 15 10 3A 80 6A 00 04 3B 20 00 01 7F 55 90 2E 7F 83 D0 00 41 9E 00 18
+==== BB 962 (0x2547A754) approx BBs exec'd 0 ====
+
+ 0x2547A754: 3B790001 addi r27,r25,1
+ 0: GETL R25, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x2547A758: 7C9B3840 cmpl cr1,r27,r7
+ 4: GETL R27, t2
+ 5: GETL R7, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547A75C: 4084007C bc 4,4,0x2547A7D8
+ 9: Jc04o $0x2547A7D8
+
+
+
+. 962 2547A754 12
+. 3B 79 00 01 7C 9B 38 40 40 84 00 7C
+==== BB 963 (0x2547A760) approx BBs exec'd 0 ====
+
+ 0x2547A760: 5768103A rlwinm r8,r27,2,0,29
+ 0: GETL R27, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x2547A764: 7E68502E lwzx r19,r8,r10
+ 4: GETL R10, t2
+ 5: GETL R8, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R19
+ 9: INCEIPL $4
+
+ 0x2547A768: 817301E8 lwz r11,488(r19)
+ 10: GETL R19, t8
+ 11: ADDL $0x1E8, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547A76C: 2F0B0000 cmpi cr6,r11,0
+ 15: GETL R11, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0x2547A770: 419A005C bc 12,26,0x2547A7CC
+ 19: Js26o $0x2547A7CC
+
+
+
+. 963 2547A760 20
+. 57 68 10 3A 7E 68 50 2E 81 73 01 E8 2F 0B 00 00 41 9A 00 5C
+==== BB 964 (0x2547A774) approx BBs exec'd 0 ====
+
+ 0x2547A774: 812B0000 lwz r9,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547A778: 2F890000 cmpi cr7,r9,0
+ 4: GETL R9, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0x2547A77C: 419E0050 bc 12,30,0x2547A7CC
+ 8: Js30o $0x2547A7CC
+
+
+
+. 964 2547A774 12
+. 81 2B 00 00 2F 89 00 00 41 9E 00 50
+==== BB 965 (0x2547A780) approx BBs exec'd 0 ====
+
+ 0x2547A780: 7E19D850 subf r16,r25,r27
+ 0: GETL R25, t0
+ 1: GETL R27, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R16
+ 4: INCEIPL $4
+
+ 0x2547A784: 5605103A rlwinm r5,r16,2,0,29
+ 5: GETL R16, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547A788: 48000010 b 0x2547A798
+ 9: JMPo $0x2547A798 ($4)
+
+
+
+. 965 2547A780 12
+. 7E 19 D8 50 56 05 10 3A 48 00 00 10
+==== BB 966 (0x2547A798) approx BBs exec'd 0 ====
+
+ 0x2547A798: 7C09D000 cmp cr0,r9,r26
+ 0: GETL R9, t0
+ 1: GETL R26, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547A79C: 396B0004 addi r11,r11,4
+ 5: GETL R11, t6
+ 6: ADDL $0x4, t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0x2547A7A0: 4082FFEC bc 4,2,0x2547A78C
+ 9: Jc02o $0x2547A78C
+
+
+
+. 966 2547A798 12
+. 7C 09 D0 00 39 6B 00 04 40 82 FF EC
+==== BB 967 (0x2547A78C) approx BBs exec'd 0 ====
+
+ 0x2547A78C: 812B0000 lwz r9,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547A790: 2C890000 cmpi cr1,r9,0
+ 4: GETL R9, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x2547A794: 41860038 bc 12,6,0x2547A7CC
+ 8: Js06o $0x2547A7CC
+
+
+
+. 967 2547A78C 12
+. 81 2B 00 00 2C 89 00 00 41 86 00 38
+==== BB 968 (0x2547A7CC) approx BBs exec'd 0 ====
+
+ 0x2547A7CC: 3B7B0001 addi r27,r27,1
+ 0: GETL R27, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x2547A7D0: 7C9B3840 cmpl cr1,r27,r7
+ 4: GETL R27, t2
+ 5: GETL R7, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547A7D4: 4184FF8C bc 12,4,0x2547A760
+ 9: Js04o $0x2547A760
+
+
+
+. 968 2547A7CC 12
+. 3B 7B 00 01 7C 9B 38 40 41 84 FF 8C
+==== BB 969 (0x2547A7D8) approx BBs exec'd 0 ====
+
+ 0x2547A7D8: 3B180001 addi r24,r24,1
+ 0: GETL R24, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R24
+ 3: INCEIPL $4
+
+ 0x2547A7DC: 7F183840 cmpl cr6,r24,r7
+ 4: GETL R24, t2
+ 5: GETL R7, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547A7E0: 4198FF44 bc 12,24,0x2547A724
+ 9: Js24o $0x2547A724
+
+
+
+. 969 2547A7D8 12
+. 3B 18 00 01 7F 18 38 40 41 98 FF 44
+==== BB 970 (0x2547A724) approx BBs exec'd 0 ====
+
+ 0x2547A724: 82570158 lwz r18,344(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x158, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x2547A728: 5715103A rlwinm r21,r24,2,0,29
+ 5: GETL R24, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R21
+ 8: INCEIPL $4
+
+ 0x2547A72C: 806A0004 lwz r3,4(r10)
+ 9: GETL R10, t6
+ 10: ADDL $0x4, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0x2547A730: 3B200001 li r25,1
+ 14: MOVL $0x1, t10
+ 15: PUTL t10, R25
+ 16: INCEIPL $4
+
+ 0x2547A734: 7F55902E lwzx r26,r21,r18
+ 17: GETL R18, t12
+ 18: GETL R21, t14
+ 19: ADDL t14, t12
+ 20: LDL (t12), t16
+ 21: PUTL t16, R26
+ 22: INCEIPL $4
+
+ 0x2547A738: 7F83D000 cmp cr7,r3,r26
+ 23: GETL R3, t18
+ 24: GETL R26, t20
+ 25: CMPL t18, t20, t22 (-rSo)
+ 26: ICRFL t22, $0x7, CR
+ 27: INCEIPL $4
+
+ 0x2547A73C: 419E0018 bc 12,30,0x2547A754
+ 28: Js30o $0x2547A754
+
+
+
+. 970 2547A724 28
+. 82 57 01 58 57 15 10 3A 80 6A 00 04 3B 20 00 01 7F 55 90 2E 7F 83 D0 00 41 9E 00 18
+==== BB 971 (0x2547A740) approx BBs exec'd 0 ====
+
+ 0x2547A740: 3B390001 addi r25,r25,1
+ 0: GETL R25, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0x2547A744: 572E103A rlwinm r14,r25,2,0,29
+ 4: GETL R25, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R14
+ 7: INCEIPL $4
+
+ 0x2547A748: 7F6E502E lwzx r27,r14,r10
+ 8: GETL R10, t4
+ 9: GETL R14, t6
+ 10: ADDL t6, t4
+ 11: LDL (t4), t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0x2547A74C: 7F9BD000 cmp cr7,r27,r26
+ 14: GETL R27, t10
+ 15: GETL R26, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2547A750: 409EFFF0 bc 4,30,0x2547A740
+ 19: Jc30o $0x2547A740
+
+
+
+. 971 2547A740 20
+. 3B 39 00 01 57 2E 10 3A 7F 6E 50 2E 7F 9B D0 00 40 9E FF F0
+==== BB 972 (0x2547A7A4) approx BBs exec'd 0 ====
+
+ 0x2547A7A4: 5734103A rlwinm r20,r25,2,0,29
+ 0: GETL R25, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R20
+ 3: INCEIPL $4
+
+ 0x2547A7A8: 7FA8502E lwzx r29,r8,r10
+ 4: GETL R10, t2
+ 5: GETL R8, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547A7AC: 7CCAA214 add r6,r10,r20
+ 10: GETL R10, t8
+ 11: GETL R20, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R6
+ 14: INCEIPL $4
+
+ 0x2547A7B0: 3B390001 addi r25,r25,1
+ 15: GETL R25, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R25
+ 18: INCEIPL $4
+
+ 0x2547A7B4: 7CC43378 or r4,r6,r6
+ 19: GETL R6, t14
+ 20: PUTL t14, R4
+ 21: INCEIPL $4
+
+ 0x2547A7B8: 38660004 addi r3,r6,4
+ 22: GETL R6, t16
+ 23: ADDL $0x4, t16
+ 24: PUTL t16, R3
+ 25: INCEIPL $4
+
+ 0x2547A7BC: 48008DE1 bl 0x2548359C
+ 26: MOVL $0x2547A7C0, t18
+ 27: PUTL t18, LR
+ 28: JMPo-c $0x2548359C ($4)
+
+
+
+. 972 2547A7A4 28
+. 57 34 10 3A 7F A8 50 2E 7C CA A2 14 3B 39 00 01 7C C4 33 78 38 66 00 04 48 00 8D E1
+==== BB 973 memmove(0x2548359C) approx BBs exec'd 0 ====
+
+ 0x2548359C: 7C041850 subf r0,r4,r3
+ 0: GETL R4, t0
+ 1: GETL R3, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x254835A0: 7CC802A6 mflr r6
+ 5: GETL LR, t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0x254835A4: 7F802840 cmpl cr7,r0,r5
+ 8: GETL R0, t6
+ 9: GETL R5, t8
+ 10: CMPUL t6, t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x254835A8: 9421FFE0 stwu r1,-32(r1)
+ 13: GETL R1, t12
+ 14: GETL R1, t14
+ 15: ADDL $0xFFFFFFE0, t14
+ 16: PUTL t14, R1
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x254835AC: 93810010 stw r28,16(r1)
+ 19: GETL R28, t16
+ 20: GETL R1, t18
+ 21: ADDL $0x10, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0x254835B0: 7C7C1B78 or r28,r3,r3
+ 24: GETL R3, t20
+ 25: PUTL t20, R28
+ 26: INCEIPL $4
+
+ 0x254835B4: 93A10014 stw r29,20(r1)
+ 27: GETL R29, t22
+ 28: GETL R1, t24
+ 29: ADDL $0x14, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0x254835B8: 7C7D1B78 or r29,r3,r3
+ 32: GETL R3, t26
+ 33: PUTL t26, R29
+ 34: INCEIPL $4
+
+ 0x254835BC: 93E1001C stw r31,28(r1)
+ 35: GETL R31, t28
+ 36: GETL R1, t30
+ 37: ADDL $0x1C, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x254835C0: 7C9F2378 or r31,r4,r4
+ 40: GETL R4, t32
+ 41: PUTL t32, R31
+ 42: INCEIPL $4
+
+ 0x254835C4: 9361000C stw r27,12(r1)
+ 43: GETL R27, t34
+ 44: GETL R1, t36
+ 45: ADDL $0xC, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x254835C8: 93C10018 stw r30,24(r1)
+ 48: GETL R30, t38
+ 49: GETL R1, t40
+ 50: ADDL $0x18, t40
+ 51: STL t38, (t40)
+ 52: INCEIPL $4
+
+ 0x254835CC: 90C10024 stw r6,36(r1)
+ 53: GETL R6, t42
+ 54: GETL R1, t44
+ 55: ADDL $0x24, t44
+ 56: STL t42, (t44)
+ 57: INCEIPL $4
+
+ 0x254835D0: 419C0054 bc 12,28,0x25483624
+ 58: Js28o $0x25483624
+
+
+
+. 973 2548359C 56
+. 7C 04 18 50 7C C8 02 A6 7F 80 28 40 94 21 FF E0 93 81 00 10 7C 7C 1B 78 93 A1 00 14 7C 7D 1B 78 93 E1 00 1C 7C 9F 23 78 93 61 00 0C 93 C1 00 18 90 C1 00 24 41 9C 00 54
+==== BB 974 (0x254835D4) approx BBs exec'd 0 ====
+
+ 0x254835D4: 2805000F cmpli cr0,r5,15
+ 0: GETL R5, t0
+ 1: MOVL $0xF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254835D8: 418100E8 bc 12,1,0x254836C0
+ 5: Js01o $0x254836C0
+
+
+
+. 974 254835D4 8
+. 28 05 00 0F 41 81 00 E8
+==== BB 975 (0x254835DC) approx BBs exec'd 0 ====
+
+ 0x254835DC: 2C850000 cmpi cr1,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x254835E0: 4186001C bc 12,6,0x254835FC
+ 4: Js06o $0x254835FC
+
+
+
+. 975 254835DC 8
+. 2C 85 00 00 41 86 00 1C
+==== BB 976 (0x254835E4) approx BBs exec'd 0 ====
+
+ 0x254835E4: 7CA903A6 mtctr r5
+ 0: GETL R5, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x254835E8: 891F0000 lbz r8,0(r31)
+ 3: GETL R31, t2
+ 4: LDB (t2), t4
+ 5: PUTL t4, R8
+ 6: INCEIPL $4
+
+ 0x254835EC: 3BFF0001 addi r31,r31,1
+ 7: GETL R31, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R31
+ 10: INCEIPL $4
+
+ 0x254835F0: 991D0000 stb r8,0(r29)
+ 11: GETL R8, t8
+ 12: GETL R29, t10
+ 13: STB t8, (t10)
+ 14: INCEIPL $4
+
+ 0x254835F4: 3BBD0001 addi r29,r29,1
+ 15: GETL R29, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0x254835F8: 4200FFF0 bc 16,0,0x254835E8
+ 19: GETL CTR, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, CTR
+ 22: JIFZL t14, $0x254835FC
+ 23: JMPo $0x254835E8 ($4)
+
+
+
+. 976 254835E4 24
+. 7C A9 03 A6 89 1F 00 00 3B FF 00 01 99 1D 00 00 3B BD 00 01 42 00 FF F0
+==== BB 977 (0x254835E8) approx BBs exec'd 0 ====
+
+ 0x254835E8: 891F0000 lbz r8,0(r31)
+ 0: GETL R31, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0x254835EC: 3BFF0001 addi r31,r31,1
+ 4: GETL R31, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0x254835F0: 991D0000 stb r8,0(r29)
+ 8: GETL R8, t6
+ 9: GETL R29, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0x254835F4: 3BBD0001 addi r29,r29,1
+ 12: GETL R29, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0x254835F8: 4200FFF0 bc 16,0,0x254835E8
+ 16: GETL CTR, t12
+ 17: ADDL $0xFFFFFFFF, t12
+ 18: PUTL t12, CTR
+ 19: JIFZL t12, $0x254835FC
+ 20: JMPo $0x254835E8 ($4)
+
+
+
+. 977 254835E8 20
+. 89 1F 00 00 3B FF 00 01 99 1D 00 00 3B BD 00 01 42 00 FF F0
+==== BB 978 (0x254835FC) approx BBs exec'd 0 ====
+
+ 0x254835FC: 83610024 lwz r27,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x25483600: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483604: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x25483608: 7F6803A6 mtlr r27
+ 13: GETL R27, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x2548360C: 83810010 lwz r28,16(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x10, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0x25483610: 8361000C lwz r27,12(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R27
+ 25: INCEIPL $4
+
+ 0x25483614: 83C10018 lwz r30,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0x25483618: 83E1001C lwz r31,28(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x1C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R31
+ 35: INCEIPL $4
+
+ 0x2548361C: 38210020 addi r1,r1,32
+ 36: GETL R1, t28
+ 37: ADDL $0x20, t28
+ 38: PUTL t28, R1
+ 39: INCEIPL $4
+
+ 0x25483620: 4E800020 blr
+ 40: GETL LR, t30
+ 41: JMPo-r t30 ($4)
+
+
+
+. 978 254835FC 40
+. 83 61 00 24 7F 83 E3 78 83 A1 00 14 7F 68 03 A6 83 81 00 10 83 61 00 0C 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 979 (0x2547A7C0) approx BBs exec'd 0 ====
+
+ 0x2547A7C0: 815701E8 lwz r10,488(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x1E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547A7C4: 80FF000C lwz r7,12(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0x2547A7C8: 7FB4512E stwx r29,r20,r10
+ 10: GETL R10, t8
+ 11: GETL R20, t10
+ 12: ADDL t10, t8
+ 13: GETL R29, t12
+ 14: STL t12, (t8)
+ 15: INCEIPL $4
+
+ 0x2547A7CC: 3B7B0001 addi r27,r27,1
+ 16: GETL R27, t14
+ 17: ADDL $0x1, t14
+ 18: PUTL t14, R27
+ 19: INCEIPL $4
+
+ 0x2547A7D0: 7C9B3840 cmpl cr1,r27,r7
+ 20: GETL R27, t16
+ 21: GETL R7, t18
+ 22: CMPUL t16, t18, t20 (-rSo)
+ 23: ICRFL t20, $0x1, CR
+ 24: INCEIPL $4
+
+ 0x2547A7D4: 4184FF8C bc 12,4,0x2547A760
+ 25: Js04o $0x2547A760
+
+
+
+. 979 2547A7C0 24
+. 81 57 01 E8 80 FF 00 0C 7F B4 51 2E 3B 7B 00 01 7C 9B 38 40 41 84 FF 8C
+==== BB 980 (0x25483624) approx BBs exec'd 0 ====
+
+ 0x25483624: 2B05000F cmpli cr6,r5,15
+ 0: GETL R5, t0
+ 1: MOVL $0xF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25483628: 7FA42A14 add r29,r4,r5
+ 5: GETL R4, t6
+ 6: GETL R5, t8
+ 7: ADDL t6, t8
+ 8: PUTL t8, R29
+ 9: INCEIPL $4
+
+ 0x2548362C: 7FE32A14 add r31,r3,r5
+ 10: GETL R3, t10
+ 11: GETL R5, t12
+ 12: ADDL t10, t12
+ 13: PUTL t12, R31
+ 14: INCEIPL $4
+
+ 0x25483630: 41990044 bc 12,25,0x25483674
+ 15: Js25o $0x25483674
+
+
+
+. 980 25483624 16
+. 2B 05 00 0F 7F A4 2A 14 7F E3 2A 14 41 99 00 44
+==== BB 981 (0x25483634) approx BBs exec'd 0 ====
+
+ 0x25483634: 2F850000 cmpi cr7,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25483638: 41BEFFC4 bc 13,30,0x254835FC
+ 4: Js30o $0x254835FC
+
+
+
+. 981 25483634 8
+. 2F 85 00 00 41 BE FF C4
+==== BB 982 (0x2548363C) approx BBs exec'd 0 ====
+
+ 0x2548363C: 7CA903A6 mtctr r5
+ 0: GETL R5, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x25483640: 8D9DFFFF lbzu r12,-1(r29)
+ 3: GETL R29, t2
+ 4: ADDL $0xFFFFFFFF, t2
+ 5: PUTL t2, R29
+ 6: LDB (t2), t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x25483644: 9D9FFFFF stbu r12,-1(r31)
+ 9: GETL R12, t6
+ 10: GETL R31, t8
+ 11: ADDL $0xFFFFFFFF, t8
+ 12: PUTL t8, R31
+ 13: STB t6, (t8)
+ 14: INCEIPL $4
+
+ 0x25483648: 4200FFF8 bc 16,0,0x25483640
+ 15: GETL CTR, t10
+ 16: ADDL $0xFFFFFFFF, t10
+ 17: PUTL t10, CTR
+ 18: JIFZL t10, $0x2548364C
+ 19: JMPo $0x25483640 ($4)
+
+
+
+. 982 2548363C 16
+. 7C A9 03 A6 8D 9D FF FF 9D 9F FF FF 42 00 FF F8
+==== BB 983 (0x25483640) approx BBs exec'd 0 ====
+
+ 0x25483640: 8D9DFFFF lbzu r12,-1(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R29
+ 3: LDB (t0), t2
+ 4: PUTL t2, R12
+ 5: INCEIPL $4
+
+ 0x25483644: 9D9FFFFF stbu r12,-1(r31)
+ 6: GETL R12, t4
+ 7: GETL R31, t6
+ 8: ADDL $0xFFFFFFFF, t6
+ 9: PUTL t6, R31
+ 10: STB t4, (t6)
+ 11: INCEIPL $4
+
+ 0x25483648: 4200FFF8 bc 16,0,0x25483640
+ 12: GETL CTR, t8
+ 13: ADDL $0xFFFFFFFF, t8
+ 14: PUTL t8, CTR
+ 15: JIFZL t8, $0x2548364C
+ 16: JMPo $0x25483640 ($4)
+
+
+
+. 983 25483640 12
+. 8D 9D FF FF 9D 9F FF FF 42 00 FF F8
+==== BB 984 (0x2548364C) approx BBs exec'd 0 ====
+
+ 0x2548364C: 83610024 lwz r27,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x25483650: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483654: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x25483658: 7F6803A6 mtlr r27
+ 13: GETL R27, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x2548365C: 83810010 lwz r28,16(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x10, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0x25483660: 8361000C lwz r27,12(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R27
+ 25: INCEIPL $4
+
+ 0x25483664: 83C10018 lwz r30,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0x25483668: 83E1001C lwz r31,28(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x1C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R31
+ 35: INCEIPL $4
+
+ 0x2548366C: 38210020 addi r1,r1,32
+ 36: GETL R1, t28
+ 37: ADDL $0x20, t28
+ 38: PUTL t28, R1
+ 39: INCEIPL $4
+
+ 0x25483670: 4E800020 blr
+ 40: GETL LR, t30
+ 41: JMPo-r t30 ($4)
+
+
+
+. 984 2548364C 40
+. 83 61 00 24 7F 83 E3 78 83 A1 00 14 7F 68 03 A6 83 81 00 10 83 61 00 0C 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 985 (0x2547A7E4) approx BBs exec'd 0 ====
+
+ 0x2547A7E4: 2F910000 cmpi cr7,r17,0
+ 0: GETL R17, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547A7E8: 54F7103A rlwinm r23,r7,2,0,29
+ 4: GETL R7, t4
+ 5: SHLL $0x2, t4
+ 6: PUTL t4, R23
+ 7: INCEIPL $4
+
+ 0x2547A7EC: 3B400000 li r26,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R26
+ 10: INCEIPL $4
+
+ 0x2547A7F0: 7F57512E stwx r26,r23,r10
+ 11: GETL R10, t8
+ 12: GETL R23, t10
+ 13: ADDL t10, t8
+ 14: GETL R26, t12
+ 15: STL t12, (t8)
+ 16: INCEIPL $4
+
+ 0x2547A7F4: 409E06DC bc 4,30,0x2547AED0
+ 17: Jc30o $0x2547AED0
+
+
+
+. 985 2547A7E4 20
+. 2F 91 00 00 54 F7 10 3A 3B 40 00 00 7F 57 51 2E 40 9E 06 DC
+==== BB 986 (0x2547A7F8) approx BBs exec'd 0 ====
+
+ 0x2547A7F8: 81010000 lwz r8,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0x2547A7FC: 82280004 lwz r17,4(r8)
+ 4: GETL R8, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R17
+ 8: INCEIPL $4
+
+ 0x2547A800: 81C8FFB8 lwz r14,-72(r8)
+ 9: GETL R8, t8
+ 10: ADDL $0xFFFFFFB8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R14
+ 13: INCEIPL $4
+
+ 0x2547A804: 7E2803A6 mtlr r17
+ 14: GETL R17, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x2547A808: 81E8FFBC lwz r15,-68(r8)
+ 17: GETL R8, t14
+ 18: ADDL $0xFFFFFFBC, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R15
+ 21: INCEIPL $4
+
+ 0x2547A80C: 8208FFC0 lwz r16,-64(r8)
+ 22: GETL R8, t18
+ 23: ADDL $0xFFFFFFC0, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R16
+ 26: INCEIPL $4
+
+ 0x2547A810: 8228FFC4 lwz r17,-60(r8)
+ 27: GETL R8, t22
+ 28: ADDL $0xFFFFFFC4, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R17
+ 31: INCEIPL $4
+
+ 0x2547A814: 8248FFC8 lwz r18,-56(r8)
+ 32: GETL R8, t26
+ 33: ADDL $0xFFFFFFC8, t26
+ 34: LDL (t26), t28
+ 35: PUTL t28, R18
+ 36: INCEIPL $4
+
+ 0x2547A818: 8268FFCC lwz r19,-52(r8)
+ 37: GETL R8, t30
+ 38: ADDL $0xFFFFFFCC, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R19
+ 41: INCEIPL $4
+
+ 0x2547A81C: 8288FFD0 lwz r20,-48(r8)
+ 42: GETL R8, t34
+ 43: ADDL $0xFFFFFFD0, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R20
+ 46: INCEIPL $4
+
+ 0x2547A820: 82A8FFD4 lwz r21,-44(r8)
+ 47: GETL R8, t38
+ 48: ADDL $0xFFFFFFD4, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R21
+ 51: INCEIPL $4
+
+ 0x2547A824: 82C8FFD8 lwz r22,-40(r8)
+ 52: GETL R8, t42
+ 53: ADDL $0xFFFFFFD8, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R22
+ 56: INCEIPL $4
+
+ 0x2547A828: 82E8FFDC lwz r23,-36(r8)
+ 57: GETL R8, t46
+ 58: ADDL $0xFFFFFFDC, t46
+ 59: LDL (t46), t48
+ 60: PUTL t48, R23
+ 61: INCEIPL $4
+
+ 0x2547A82C: 8308FFE0 lwz r24,-32(r8)
+ 62: GETL R8, t50
+ 63: ADDL $0xFFFFFFE0, t50
+ 64: LDL (t50), t52
+ 65: PUTL t52, R24
+ 66: INCEIPL $4
+
+ 0x2547A830: 8328FFE4 lwz r25,-28(r8)
+ 67: GETL R8, t54
+ 68: ADDL $0xFFFFFFE4, t54
+ 69: LDL (t54), t56
+ 70: PUTL t56, R25
+ 71: INCEIPL $4
+
+ 0x2547A834: 8348FFE8 lwz r26,-24(r8)
+ 72: GETL R8, t58
+ 73: ADDL $0xFFFFFFE8, t58
+ 74: LDL (t58), t60
+ 75: PUTL t60, R26
+ 76: INCEIPL $4
+
+ 0x2547A838: 8368FFEC lwz r27,-20(r8)
+ 77: GETL R8, t62
+ 78: ADDL $0xFFFFFFEC, t62
+ 79: LDL (t62), t64
+ 80: PUTL t64, R27
+ 81: INCEIPL $4
+
+ 0x2547A83C: 8388FFF0 lwz r28,-16(r8)
+ 82: GETL R8, t66
+ 83: ADDL $0xFFFFFFF0, t66
+ 84: LDL (t66), t68
+ 85: PUTL t68, R28
+ 86: INCEIPL $4
+
+ 0x2547A840: 83A8FFF4 lwz r29,-12(r8)
+ 87: GETL R8, t70
+ 88: ADDL $0xFFFFFFF4, t70
+ 89: LDL (t70), t72
+ 90: PUTL t72, R29
+ 91: INCEIPL $4
+
+ 0x2547A844: 83C8FFF8 lwz r30,-8(r8)
+ 92: GETL R8, t74
+ 93: ADDL $0xFFFFFFF8, t74
+ 94: LDL (t74), t76
+ 95: PUTL t76, R30
+ 96: INCEIPL $4
+
+ 0x2547A848: 83E8FFFC lwz r31,-4(r8)
+ 97: GETL R8, t78
+ 98: ADDL $0xFFFFFFFC, t78
+ 99: LDL (t78), t80
+ 100: PUTL t80, R31
+ 101: INCEIPL $4
+
+ 0x2547A84C: 7D014378 or r1,r8,r8
+ 102: GETL R8, t82
+ 103: PUTL t82, R1
+ 104: INCEIPL $4
+
+ 0x2547A850: 4E800020 blr
+ 105: GETL LR, t84
+ 106: JMPo-r t84 ($4)
+
+
+
+. 986 2547A7F8 92
+. 81 01 00 00 82 28 00 04 81 C8 FF B8 7E 28 03 A6 81 E8 FF BC 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
+==== BB 987 (0x254727E4) approx BBs exec'd 0 ====
+
+ 0x254727E4: 80F4015C lwz r7,348(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x15C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254727E8: 2C870000 cmpi cr1,r7,0
+ 5: GETL R7, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x254727EC: 4186003C bc 12,6,0x25472828
+ 9: Js06o $0x25472828
+
+
+
+. 987 254727E4 12
+. 80 F4 01 5C 2C 87 00 00 41 86 00 3C
+==== BB 988 (0x254727F0) approx BBs exec'd 0 ====
+
+ 0x254727F0: 81140158 lwz r8,344(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x158, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254727F4: 7CE903A6 mtctr r7
+ 5: GETL R7, t4
+ 6: PUTL t4, CTR
+ 7: INCEIPL $4
+
+ 0x254727F8: 38E7FFFF addi r7,r7,-1
+ 8: GETL R7, t6
+ 9: ADDL $0xFFFFFFFF, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0x254727FC: 54F1103A rlwinm r17,r7,2,0,29
+ 12: GETL R7, t8
+ 13: SHLL $0x2, t8
+ 14: PUTL t8, R17
+ 15: INCEIPL $4
+
+ 0x25472800: 7F11402E lwzx r24,r17,r8
+ 16: GETL R8, t10
+ 17: GETL R17, t12
+ 18: ADDL t12, t10
+ 19: LDL (t10), t14
+ 20: PUTL t14, R24
+ 21: INCEIPL $4
+
+ 0x25472804: 82B80180 lwz r21,384(r24)
+ 22: GETL R24, t16
+ 23: ADDL $0x180, t16
+ 24: LDL (t16), t18
+ 25: PUTL t18, R21
+ 26: INCEIPL $4
+
+ 0x25472808: 66A80800 oris r8,r21,0x800
+ 27: GETL R21, t20
+ 28: ORL $0x8000000, t20
+ 29: PUTL t20, R8
+ 30: INCEIPL $4
+
+ 0x2547280C: 91180180 stw r8,384(r24)
+ 31: GETL R8, t22
+ 32: GETL R24, t24
+ 33: ADDL $0x180, t24
+ 34: STL t22, (t24)
+ 35: INCEIPL $4
+
+ 0x25472810: 81140158 lwz r8,344(r20)
+ 36: GETL R20, t26
+ 37: ADDL $0x158, t26
+ 38: LDL (t26), t28
+ 39: PUTL t28, R8
+ 40: INCEIPL $4
+
+ 0x25472814: 7F31402E lwzx r25,r17,r8
+ 41: GETL R8, t30
+ 42: GETL R17, t32
+ 43: ADDL t32, t30
+ 44: LDL (t30), t34
+ 45: PUTL t34, R25
+ 46: INCEIPL $4
+
+ 0x25472818: 81390178 lwz r9,376(r25)
+ 47: GETL R25, t36
+ 48: ADDL $0x178, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R9
+ 51: INCEIPL $4
+
+ 0x2547281C: 3B890001 addi r28,r9,1
+ 52: GETL R9, t40
+ 53: ADDL $0x1, t40
+ 54: PUTL t40, R28
+ 55: INCEIPL $4
+
+ 0x25472820: 93990178 stw r28,376(r25)
+ 56: GETL R28, t42
+ 57: GETL R25, t44
+ 58: ADDL $0x178, t44
+ 59: STL t42, (t44)
+ 60: INCEIPL $4
+
+ 0x25472824: 4200FFD4 bc 16,0,0x254727F8
+ 61: GETL CTR, t46
+ 62: ADDL $0xFFFFFFFF, t46
+ 63: PUTL t46, CTR
+ 64: JIFZL t46, $0x25472828
+ 65: JMPo $0x254727F8 ($4)
+
+
+
+. 988 254727F0 56
+. 81 14 01 58 7C E9 03 A6 38 E7 FF FF 54 F1 10 3A 7F 11 40 2E 82 B8 01 80 66 A8 08 00 91 18 01 80 81 14 01 58 7F 31 40 2E 81 39 01 78 3B 89 00 01 93 99 01 78 42 00 FF D4
+==== BB 989 (0x254727F8) approx BBs exec'd 0 ====
+
+ 0x254727F8: 38E7FFFF addi r7,r7,-1
+ 0: GETL R7, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R7
+ 3: INCEIPL $4
+
+ 0x254727FC: 54F1103A rlwinm r17,r7,2,0,29
+ 4: GETL R7, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R17
+ 7: INCEIPL $4
+
+ 0x25472800: 7F11402E lwzx r24,r17,r8
+ 8: GETL R8, t4
+ 9: GETL R17, t6
+ 10: ADDL t6, t4
+ 11: LDL (t4), t8
+ 12: PUTL t8, R24
+ 13: INCEIPL $4
+
+ 0x25472804: 82B80180 lwz r21,384(r24)
+ 14: GETL R24, t10
+ 15: ADDL $0x180, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R21
+ 18: INCEIPL $4
+
+ 0x25472808: 66A80800 oris r8,r21,0x800
+ 19: GETL R21, t14
+ 20: ORL $0x8000000, t14
+ 21: PUTL t14, R8
+ 22: INCEIPL $4
+
+ 0x2547280C: 91180180 stw r8,384(r24)
+ 23: GETL R8, t16
+ 24: GETL R24, t18
+ 25: ADDL $0x180, t18
+ 26: STL t16, (t18)
+ 27: INCEIPL $4
+
+ 0x25472810: 81140158 lwz r8,344(r20)
+ 28: GETL R20, t20
+ 29: ADDL $0x158, t20
+ 30: LDL (t20), t22
+ 31: PUTL t22, R8
+ 32: INCEIPL $4
+
+ 0x25472814: 7F31402E lwzx r25,r17,r8
+ 33: GETL R8, t24
+ 34: GETL R17, t26
+ 35: ADDL t26, t24
+ 36: LDL (t24), t28
+ 37: PUTL t28, R25
+ 38: INCEIPL $4
+
+ 0x25472818: 81390178 lwz r9,376(r25)
+ 39: GETL R25, t30
+ 40: ADDL $0x178, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R9
+ 43: INCEIPL $4
+
+ 0x2547281C: 3B890001 addi r28,r9,1
+ 44: GETL R9, t34
+ 45: ADDL $0x1, t34
+ 46: PUTL t34, R28
+ 47: INCEIPL $4
+
+ 0x25472820: 93990178 stw r28,376(r25)
+ 48: GETL R28, t36
+ 49: GETL R25, t38
+ 50: ADDL $0x178, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x25472824: 4200FFD4 bc 16,0,0x254727F8
+ 53: GETL CTR, t40
+ 54: ADDL $0xFFFFFFFF, t40
+ 55: PUTL t40, CTR
+ 56: JIFZL t40, $0x25472828
+ 57: JMPo $0x254727F8 ($4)
+
+
+
+. 989 254727F8 48
+. 38 E7 FF FF 54 F1 10 3A 7F 11 40 2E 82 B8 01 80 66 A8 08 00 91 18 01 80 81 14 01 58 7F 31 40 2E 81 39 01 78 3B 89 00 01 93 99 01 78 42 00 FF D4
+==== BB 990 (0x25472828) approx BBs exec'd 0 ====
+
+ 0x25472828: 816E01C8 lwz r11,456(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547282C: 80EE01C4 lwz r7,452(r14)
+ 5: GETL R14, t4
+ 6: ADDL $0x1C4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0x25472830: 90EB000C stw r7,12(r11)
+ 10: GETL R7, t8
+ 11: GETL R11, t10
+ 12: ADDL $0xC, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25472834: 812E01C4 lwz r9,452(r14)
+ 15: GETL R14, t12
+ 16: ADDL $0x1C4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25472838: 2E090000 cmpi cr4,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x4, CR
+ 23: INCEIPL $4
+
+ 0x2547283C: 41920008 bc 12,18,0x25472844
+ 24: Js18o $0x25472844
+
+
+
+. 990 25472828 24
+. 81 6E 01 C8 80 EE 01 C4 90 EB 00 0C 81 2E 01 C4 2E 09 00 00 41 92 00 08
+==== BB 991 (0x25472840) approx BBs exec'd 0 ====
+
+ 0x25472840: 91690010 stw r11,16(r9)
+ 0: GETL R11, t0
+ 1: GETL R9, t2
+ 2: ADDL $0x10, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25472844: 814E0330 lwz r10,816(r14)
+ 5: GETL R14, t4
+ 6: ADDL $0x330, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x25472848: 2B0A0001 cmpli cr6,r10,1
+ 10: GETL R10, t8
+ 11: MOVL $0x1, t12
+ 12: CMPUL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x6, CR
+ 14: INCEIPL $4
+
+ 0x2547284C: 40991358 bc 4,25,0x25473BA4
+ 15: Jc25o $0x25473BA4
+
+
+
+. 991 25472840 16
+. 91 69 00 10 81 4E 03 30 2B 0A 00 01 40 99 13 58
+==== BB 992 (0x25472850) approx BBs exec'd 0 ====
+
+ 0x25472850: 81540158 lwz r10,344(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x158, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25472854: 390E01B8 addi r8,r14,440
+ 5: GETL R14, t4
+ 6: ADDL $0x1B8, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x25472858: 39200001 li r9,1
+ 9: MOVL $0x1, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0x2547285C: 39600004 li r11,4
+ 12: MOVL $0x4, t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0x25472860: 806A0004 lwz r3,4(r10)
+ 15: GETL R10, t10
+ 16: ADDL $0x4, t10
+ 17: LDL (t10), t12
+ 18: PUTL t12, R3
+ 19: INCEIPL $4
+
+ 0x25472864: 7F834000 cmp cr7,r3,r8
+ 20: GETL R3, t14
+ 21: GETL R8, t16
+ 22: CMPL t14, t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x25472868: 419E0018 bc 12,30,0x25472880
+ 25: Js30o $0x25472880
+
+
+
+. 992 25472850 28
+. 81 54 01 58 39 0E 01 B8 39 20 00 01 39 60 00 04 80 6A 00 04 7F 83 40 00 41 9E 00 18
+==== BB 993 (0x2547286C) approx BBs exec'd 0 ====
+
+ 0x2547286C: 39290001 addi r9,r9,1
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x25472870: 552B103A rlwinm r11,r9,2,0,29
+ 4: GETL R9, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R11
+ 7: INCEIPL $4
+
+ 0x25472874: 7C8B502E lwzx r4,r11,r10
+ 8: GETL R10, t4
+ 9: GETL R11, t6
+ 10: ADDL t6, t4
+ 11: LDL (t4), t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x25472878: 7F844000 cmp cr7,r4,r8
+ 14: GETL R4, t10
+ 15: GETL R8, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2547287C: 409EFFF0 bc 4,30,0x2547286C
+ 19: Jc30o $0x2547286C
+
+
+
+. 993 2547286C 20
+. 39 29 00 01 55 2B 10 3A 7C 8B 50 2E 7F 84 40 00 40 9E FF F0
+==== BB 994 (0x25472880) approx BBs exec'd 0 ====
+
+ 0x25472880: 811F0030 lwz r8,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25472884: 7D4B5214 add r10,r11,r10
+ 5: GETL R11, t4
+ 6: GETL R10, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x25472888: 816AFFFC lwz r11,-4(r10)
+ 10: GETL R10, t8
+ 11: ADDL $0xFFFFFFFC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547288C: 2C080000 cmpi cr0,r8,0
+ 15: GETL R8, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x25472890: 916E01C8 stw r11,456(r14)
+ 19: GETL R11, t16
+ 20: GETL R14, t18
+ 21: ADDL $0x1C8, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0x25472894: 40820F34 bc 4,2,0x254737C8
+ 24: Jc02o $0x254737C8
+
+
+
+. 994 25472880 24
+. 81 1F 00 30 7D 4B 52 14 81 6A FF FC 2C 08 00 00 91 6E 01 C8 40 82 0F 34
+==== BB 995 (0x25472898) approx BBs exec'd 0 ====
+
+ 0x25472898: 8274015C lwz r19,348(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x15C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0x2547289C: 3AE90001 addi r23,r9,1
+ 5: GETL R9, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R23
+ 8: INCEIPL $4
+
+ 0x254728A0: 38000000 li r0,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0x254728A4: 7DC97378 or r9,r14,r14
+ 12: GETL R14, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x254728A8: 7F979840 cmpl cr7,r23,r19
+ 15: GETL R23, t10
+ 16: GETL R19, t12
+ 17: CMPUL t10, t12, t14 (-rSo)
+ 18: ICRFL t14, $0x7, CR
+ 19: INCEIPL $4
+
+ 0x254728AC: 409C0008 bc 4,28,0x254728B4
+ 20: Jc28o $0x254728B4
+
+
+
+. 995 25472898 24
+. 82 74 01 5C 3A E9 00 01 38 00 00 00 7D C9 73 78 7F 97 98 40 40 9C 00 08
+==== BB 996 (0x254728B0) approx BBs exec'd 0 ====
+
+ 0x254728B0: 800A0004 lwz r0,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x254728B4: 900901C4 stw r0,452(r9)
+ 5: GETL R0, t4
+ 6: GETL R9, t6
+ 7: ADDL $0x1C4, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x254728B8: 820E01C8 lwz r16,456(r14)
+ 10: GETL R14, t8
+ 11: ADDL $0x1C8, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R16
+ 14: INCEIPL $4
+
+ 0x254728BC: 380E01B8 addi r0,r14,440
+ 15: GETL R14, t12
+ 16: ADDL $0x1B8, t12
+ 17: PUTL t12, R0
+ 18: INCEIPL $4
+
+ 0x254728C0: 9010000C stw r0,12(r16)
+ 19: GETL R0, t14
+ 20: GETL R16, t16
+ 21: ADDL $0xC, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x254728C4: 812E01C4 lwz r9,452(r14)
+ 24: GETL R14, t18
+ 25: ADDL $0x1C4, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R9
+ 28: INCEIPL $4
+
+ 0x254728C8: 2C890000 cmpi cr1,r9,0
+ 29: GETL R9, t22
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x1, CR
+ 32: INCEIPL $4
+
+ 0x254728CC: 41860008 bc 12,6,0x254728D4
+ 33: Js06o $0x254728D4
+
+
+
+. 996 254728B0 32
+. 80 0A 00 04 90 09 01 C4 82 0E 01 C8 38 0E 01 B8 90 10 00 0C 81 2E 01 C4 2C 89 00 00 41 86 00 08
+==== BB 997 (0x254728D0) approx BBs exec'd 0 ====
+
+ 0x254728D0: 90090010 stw r0,16(r9)
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ADDL $0x10, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254728D4: 807E002C lwz r3,44(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x2C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x254728D8: 691A0003 xori r26,r8,0x3
+ 10: GETL R8, t8
+ 11: XORL $0x3, t8
+ 12: PUTL t8, R26
+ 13: INCEIPL $4
+
+ 0x254728DC: 201A0000 subfic r0,r26,0
+ 14: GETL R26, t10
+ 15: MOVL $0x0, t12
+ 16: SBBL t10, t12 (-wCa)
+ 17: PUTL t12, R0
+ 18: INCEIPL $4
+
+ 0x254728E0: 7F40D114 adde r26,r0,r26
+ 19: GETL R0, t14
+ 20: GETL R26, t16
+ 21: ADCL t14, t16 (-rCa-wCa)
+ 22: PUTL t16, R26
+ 23: INCEIPL $4
+
+ 0x254728E4: 809E0014 lwz r4,20(r30)
+ 24: GETL R30, t18
+ 25: ADDL $0x14, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R4
+ 28: INCEIPL $4
+
+ 0x254728E8: 21480000 subfic r10,r8,0
+ 29: GETL R8, t22
+ 30: MOVL $0x0, t24
+ 31: SBBL t22, t24 (-wCa)
+ 32: PUTL t24, R10
+ 33: INCEIPL $4
+
+ 0x254728EC: 7FAA4114 adde r29,r10,r8
+ 34: GETL R10, t26
+ 35: GETL R8, t28
+ 36: ADCL t26, t28 (-rCa-wCa)
+ 37: PUTL t28, R29
+ 38: INCEIPL $4
+
+ 0x254728F0: 38BF0058 addi r5,r31,88
+ 39: GETL R31, t30
+ 40: ADDL $0x58, t30
+ 41: PUTL t30, R5
+ 42: INCEIPL $4
+
+ 0x254728F4: 93BF0058 stw r29,88(r31)
+ 43: GETL R29, t32
+ 44: GETL R31, t34
+ 45: ADDL $0x58, t34
+ 46: STL t32, (t34)
+ 47: INCEIPL $4
+
+ 0x254728F8: 935F005C stw r26,92(r31)
+ 48: GETL R26, t36
+ 49: GETL R31, t38
+ 50: ADDL $0x5C, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x254728FC: 48008D9D bl 0x2547B698
+ 53: MOVL $0x25472900, t40
+ 54: PUTL t40, LR
+ 55: JMPo-c $0x2547B698 ($4)
+
+
+
+. 997 254728D0 48
+. 90 09 00 10 80 7E 00 2C 69 1A 00 03 20 1A 00 00 7F 40 D1 14 80 9E 00 14 21 48 00 00 7F AA 41 14 38 BF 00 58 93 BF 00 58 93 5F 00 5C 48 00 8D 9D
+==== BB 998 _dl_receive_error(0x2547B698) approx BBs exec'd 0 ====
+
+ 0x2547B698: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547B69C: 7CC802A6 mflr r6
+ 6: GETL LR, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x2547B6A0: 4801B961 bl 0x25497000
+ 9: MOVL $0x2547B6A4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 998 2547B698 12
+. 94 21 FF D0 7C C8 02 A6 48 01 B9 61
+==== BB 999 (0x2547B6A4) approx BBs exec'd 0 ====
+
+ 0x2547B6A4: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547B6A8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547B6AC: 9361001C stw r27,28(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547B6B0: 7CBB2B78 or r27,r5,r5
+ 13: GETL R5, t10
+ 14: PUTL t10, R27
+ 15: INCEIPL $4
+
+ 0x2547B6B4: 90C10034 stw r6,52(r1)
+ 16: GETL R6, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x34, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x2547B6B8: 92E1000C stw r23,12(r1)
+ 21: GETL R23, t16
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547B6BC: 7C972378 or r23,r4,r4
+ 26: GETL R4, t20
+ 27: PUTL t20, R23
+ 28: INCEIPL $4
+
+ 0x2547B6C0: 80BE04C8 lwz r5,1224(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x4C8, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R5
+ 33: INCEIPL $4
+
+ 0x2547B6C4: 93210014 stw r25,20(r1)
+ 34: GETL R25, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x14, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x2547B6C8: 7C791B78 or r25,r3,r3
+ 39: GETL R3, t30
+ 40: PUTL t30, R25
+ 41: INCEIPL $4
+
+ 0x2547B6CC: 812501B4 lwz r9,436(r5)
+ 42: GETL R5, t32
+ 43: ADDL $0x1B4, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R9
+ 46: INCEIPL $4
+
+ 0x2547B6D0: 93410018 stw r26,24(r1)
+ 47: GETL R26, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x18, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0x2547B6D4: 93810020 stw r28,32(r1)
+ 52: GETL R28, t40
+ 53: GETL R1, t42
+ 54: ADDL $0x20, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0x2547B6D8: 7D2903A6 mtctr r9
+ 57: GETL R9, t44
+ 58: PUTL t44, CTR
+ 59: INCEIPL $4
+
+ 0x2547B6DC: 93A10024 stw r29,36(r1)
+ 60: GETL R29, t46
+ 61: GETL R1, t48
+ 62: ADDL $0x24, t48
+ 63: STL t46, (t48)
+ 64: INCEIPL $4
+
+ 0x2547B6E0: 839E031C lwz r28,796(r30)
+ 65: GETL R30, t50
+ 66: ADDL $0x31C, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R28
+ 69: INCEIPL $4
+
+ 0x2547B6E4: 4E800421 bctrl
+ 70: MOVL $0x2547B6E8, t54
+ 71: PUTL t54, LR
+ 72: GETL CTR, t56
+ 73: JMPo-c t56 ($4)
+
+
+
+. 999 2547B6A4 68
+. 93 C1 00 28 7F C8 02 A6 93 61 00 1C 7C BB 2B 78 90 C1 00 34 92 E1 00 0C 7C 97 23 78 80 BE 04 C8 93 21 00 14 7C 79 1B 78 81 25 01 B4 93 41 00 18 93 81 00 20 7D 29 03 A6 93 A1 00 24 83 9E 03 1C 4E 80 04 21
+==== BB 1000 (0x2547B6E8) approx BBs exec'd 0 ====
+
+ 0x2547B6E8: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547B6EC: 7C7D1B78 or r29,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R29
+ 5: INCEIPL $4
+
+ 0x2547B6F0: 7EE803A6 mtlr r23
+ 6: GETL R23, t4
+ 7: PUTL t4, LR
+ 8: INCEIPL $4
+
+ 0x2547B6F4: 835D0000 lwz r26,0(r29)
+ 9: GETL R29, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x2547B6F8: 7F63DB78 or r3,r27,r27
+ 13: GETL R27, t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0x2547B6FC: 909D0000 stw r4,0(r29)
+ 16: GETL R4, t12
+ 17: GETL R29, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x2547B700: 837C0000 lwz r27,0(r28)
+ 20: GETL R28, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R27
+ 23: INCEIPL $4
+
+ 0x2547B704: 933C0000 stw r25,0(r28)
+ 24: GETL R25, t20
+ 25: GETL R28, t22
+ 26: STL t20, (t22)
+ 27: INCEIPL $4
+
+ 0x2547B708: 4E800021 blrl
+ 28: GETL LR, t24
+ 29: MOVL $0x2547B70C, t26
+ 30: PUTL t26, LR
+ 31: JMPo-r t24 ($4)
+
+
+
+. 1000 2547B6E8 36
+. 38 80 00 00 7C 7D 1B 78 7E E8 03 A6 83 5D 00 00 7F 63 DB 78 90 9D 00 00 83 7C 00 00 93 3C 00 00 4E 80 00 21
+==== BB 1001 version_check_doit(0x254717D4) approx BBs exec'd 0 ====
+
+ 0x254717D4: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x254717D8: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254717DC: 48025825 bl 0x25497000
+ 9: MOVL $0x254717E0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 1001 254717D4 12
+. 94 21 FF E0 7C 08 02 A6 48 02 58 25
+==== BB 1002 (0x254717E0) approx BBs exec'd 0 ====
+
+ 0x254717E0: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254717E4: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x254717E8: 93E1001C stw r31,28(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x254717EC: 90010024 stw r0,36(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254717F0: 7C7F1B78 or r31,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0x254717F4: 80BF0004 lwz r5,4(r31)
+ 21: GETL R31, t16
+ 22: ADDL $0x4, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R5
+ 25: INCEIPL $4
+
+ 0x254717F8: 38800001 li r4,1
+ 26: MOVL $0x1, t20
+ 27: PUTL t20, R4
+ 28: INCEIPL $4
+
+ 0x254717FC: 813E04C8 lwz r9,1224(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x4C8, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R9
+ 33: INCEIPL $4
+
+ 0x25471800: 93A10014 stw r29,20(r1)
+ 34: GETL R29, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x14, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x25471804: 80690000 lwz r3,0(r9)
+ 39: GETL R9, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R3
+ 42: INCEIPL $4
+
+ 0x25471808: 4800B7C1 bl 0x2547CFC8
+ 43: MOVL $0x2547180C, t34
+ 44: PUTL t34, LR
+ 45: JMPo-c $0x2547CFC8 ($4)
+
+
+
+. 1002 254717E0 44
+. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 01 00 24 7C 7F 1B 78 80 BF 00 04 38 80 00 01 81 3E 04 C8 93 A1 00 14 80 69 00 00 48 00 B7 C1
+==== BB 1003 _dl_check_all_versions(0x2547CFC8) approx BBs exec'd 0 ====
+
+ 0x2547CFC8: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547CFCC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547CFD0: 93E1001C stw r31,28(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547CFD4: 7C7F1B79 or. r31,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R31
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x2547CFD8: 93410008 stw r26,8(r1)
+ 19: GETL R26, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x8, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x2547CFDC: 7C9A2378 or r26,r4,r4
+ 24: GETL R4, t18
+ 25: PUTL t18, R26
+ 26: INCEIPL $4
+
+ 0x2547CFE0: 9361000C stw r27,12(r1)
+ 27: GETL R27, t20
+ 28: GETL R1, t22
+ 29: ADDL $0xC, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0x2547CFE4: 7CBB2B78 or r27,r5,r5
+ 32: GETL R5, t24
+ 33: PUTL t24, R27
+ 34: INCEIPL $4
+
+ 0x2547CFE8: 93810010 stw r28,16(r1)
+ 35: GETL R28, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x10, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0x2547CFEC: 3B800000 li r28,0
+ 40: MOVL $0x0, t30
+ 41: PUTL t30, R28
+ 42: INCEIPL $4
+
+ 0x2547CFF0: 93A10014 stw r29,20(r1)
+ 43: GETL R29, t32
+ 44: GETL R1, t34
+ 45: ADDL $0x14, t34
+ 46: STL t32, (t34)
+ 47: INCEIPL $4
+
+ 0x2547CFF4: 93C10018 stw r30,24(r1)
+ 48: GETL R30, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x18, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x2547CFF8: 90010024 stw r0,36(r1)
+ 53: GETL R0, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x24, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x2547CFFC: 40A20018 bc 5,2,0x2547D014
+ 58: Jc02o $0x2547D014
+
+
+
+. 1003 2547CFC8 56
+. 94 21 FF E0 7C 08 02 A6 93 E1 00 1C 7C 7F 1B 79 93 41 00 08 7C 9A 23 78 93 61 00 0C 7C BB 2B 78 93 81 00 10 3B 80 00 00 93 A1 00 14 93 C1 00 18 90 01 00 24 40 A2 00 18
+==== BB 1004 (0x2547D014) approx BBs exec'd 0 ====
+
+ 0x2547D014: 80DF0180 lwz r6,384(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547D018: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547D01C: 7F44D378 or r4,r26,r26
+ 8: GETL R26, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x2547D020: 7F65DB78 or r5,r27,r27
+ 11: GETL R27, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0x2547D024: 74C90040 andis. r9,r6,0x40
+ 14: GETL R6, t10
+ 15: ANDL $0x400000, t10
+ 16: PUTL t10, R9
+ 17: CMP0L t10, t12 (-rSo)
+ 18: ICRFL t12, $0x0, CR
+ 19: INCEIPL $4
+
+ 0x2547D028: 3BA00000 li r29,0
+ 20: MOVL $0x0, t14
+ 21: PUTL t14, R29
+ 22: INCEIPL $4
+
+ 0x2547D02C: 4082FFD8 bc 4,2,0x2547D004
+ 23: Jc02o $0x2547D004
+
+
+
+. 1004 2547D014 28
+. 80 DF 01 80 7F E3 FB 78 7F 44 D3 78 7F 65 DB 78 74 C9 00 40 3B A0 00 00 40 82 FF D8
+==== BB 1005 (0x2547D030) approx BBs exec'd 0 ====
+
+ 0x2547D030: 4BFFFB41 bl 0x2547CB70
+ 0: MOVL $0x2547D034, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547CB70 ($4)
+
+
+
+. 1005 2547D030 4
+. 4B FF FB 41
+==== BB 1006 _dl_check_map_versions(0x2547CB70) approx BBs exec'd 0 ====
+
+ 0x2547CB70: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x2547CB74: 9421FF60 stwu r1,-160(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFF60, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547CB78: 7D800026 mfcr r12
+ 9: GETL CR, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x2547CB7C: 4801A485 bl 0x25497000
+ 12: MOVL $0x2547CB80, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25497000 ($4)
+
+
+
+. 1006 2547CB70 16
+. 7C 08 02 A6 94 21 FF 60 7D 80 00 26 48 01 A4 85
+==== BB 1007 (0x2547CB80) approx BBs exec'd 0 ====
+
+ 0x2547CB80: 92010060 stw r16,96(r1)
+ 0: GETL R16, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x60, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547CB84: 3A000000 li r16,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R16
+ 7: INCEIPL $4
+
+ 0x2547CB88: 900100A4 stw r0,164(r1)
+ 8: GETL R0, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xA4, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547CB8C: 81230034 lwz r9,52(r3)
+ 13: GETL R3, t10
+ 14: ADDL $0x34, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x2547CB90: 92A10074 stw r21,116(r1)
+ 18: GETL R21, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x74, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x2547CB94: 7C952378 or r21,r4,r4
+ 23: GETL R4, t18
+ 24: PUTL t18, R21
+ 25: INCEIPL $4
+
+ 0x2547CB98: 2F890000 cmpi cr7,r9,0
+ 26: GETL R9, t20
+ 27: CMP0L t20, t22 (-rSo)
+ 28: ICRFL t22, $0x7, CR
+ 29: INCEIPL $4
+
+ 0x2547CB9C: 92C10078 stw r22,120(r1)
+ 30: GETL R22, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x78, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x2547CBA0: 93010080 stw r24,128(r1)
+ 35: GETL R24, t28
+ 36: GETL R1, t30
+ 37: ADDL $0x80, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x2547CBA4: 3AC00000 li r22,0
+ 40: MOVL $0x0, t32
+ 41: PUTL t32, R22
+ 42: INCEIPL $4
+
+ 0x2547CBA8: 9361008C stw r27,140(r1)
+ 43: GETL R27, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x8C, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x2547CBAC: 3B000000 li r24,0
+ 48: MOVL $0x0, t38
+ 49: PUTL t38, R24
+ 50: INCEIPL $4
+
+ 0x2547CBB0: 93C10098 stw r30,152(r1)
+ 51: GETL R30, t40
+ 52: GETL R1, t42
+ 53: ADDL $0x98, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0x2547CBB4: 7C7B1B78 or r27,r3,r3
+ 56: GETL R3, t44
+ 57: PUTL t44, R27
+ 58: INCEIPL $4
+
+ 0x2547CBB8: 93E1009C stw r31,156(r1)
+ 59: GETL R31, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x9C, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0x2547CBBC: 7FC802A6 mflr r30
+ 64: GETL LR, t50
+ 65: PUTL t50, R30
+ 66: INCEIPL $4
+
+ 0x2547CBC0: 92210064 stw r17,100(r1)
+ 67: GETL R17, t52
+ 68: GETL R1, t54
+ 69: ADDL $0x64, t54
+ 70: STL t52, (t54)
+ 71: INCEIPL $4
+
+ 0x2547CBC4: 7C3F0B78 or r31,r1,r1
+ 72: GETL R1, t56
+ 73: PUTL t56, R31
+ 74: INCEIPL $4
+
+ 0x2547CBC8: 92410068 stw r18,104(r1)
+ 75: GETL R18, t58
+ 76: GETL R1, t60
+ 77: ADDL $0x68, t60
+ 78: STL t58, (t60)
+ 79: INCEIPL $4
+
+ 0x2547CBCC: 38600000 li r3,0
+ 80: MOVL $0x0, t62
+ 81: PUTL t62, R3
+ 82: INCEIPL $4
+
+ 0x2547CBD0: 9261006C stw r19,108(r1)
+ 83: GETL R19, t64
+ 84: GETL R1, t66
+ 85: ADDL $0x6C, t66
+ 86: STL t64, (t66)
+ 87: INCEIPL $4
+
+ 0x2547CBD4: 92810070 stw r20,112(r1)
+ 88: GETL R20, t68
+ 89: GETL R1, t70
+ 90: ADDL $0x70, t70
+ 91: STL t68, (t70)
+ 92: INCEIPL $4
+
+ 0x2547CBD8: 92E1007C stw r23,124(r1)
+ 93: GETL R23, t72
+ 94: GETL R1, t74
+ 95: ADDL $0x7C, t74
+ 96: STL t72, (t74)
+ 97: INCEIPL $4
+
+ 0x2547CBDC: 93210084 stw r25,132(r1)
+ 98: GETL R25, t76
+ 99: GETL R1, t78
+ 100: ADDL $0x84, t78
+ 101: STL t76, (t78)
+ 102: INCEIPL $4
+
+ 0x2547CBE0: 93410088 stw r26,136(r1)
+ 103: GETL R26, t80
+ 104: GETL R1, t82
+ 105: ADDL $0x88, t82
+ 106: STL t80, (t82)
+ 107: INCEIPL $4
+
+ 0x2547CBE4: 93810090 stw r28,144(r1)
+ 108: GETL R28, t84
+ 109: GETL R1, t86
+ 110: ADDL $0x90, t86
+ 111: STL t84, (t86)
+ 112: INCEIPL $4
+
+ 0x2547CBE8: 93A10094 stw r29,148(r1)
+ 113: GETL R29, t88
+ 114: GETL R1, t90
+ 115: ADDL $0x94, t90
+ 116: STL t88, (t90)
+ 117: INCEIPL $4
+
+ 0x2547CBEC: 9181005C stw r12,92(r1)
+ 118: GETL R12, t92
+ 119: GETL R1, t94
+ 120: ADDL $0x5C, t94
+ 121: STL t92, (t94)
+ 122: INCEIPL $4
+
+ 0x2547CBF0: 419E0180 bc 12,30,0x2547CD70
+ 123: Js30o $0x2547CD70
+
+
+
+. 1007 2547CB80 116
+. 92 01 00 60 3A 00 00 00 90 01 00 A4 81 23 00 34 92 A1 00 74 7C 95 23 78 2F 89 00 00 92 C1 00 78 93 01 00 80 3A C0 00 00 93 61 00 8C 3B 00 00 00 93 C1 00 98 7C 7B 1B 78 93 E1 00 9C 7F C8 02 A6 92 21 00 64 7C 3F 0B 78 92 41 00 68 38 60 00 00 92 61 00 6C 92 81 00 70 92 E1 00 7C 93 21 00 84 93 41 00 88 93 81 00 90 93 A1 00 94 91 81 00 5C 41 9E 01 80
+==== BB 1008 (0x2547CBF4) approx BBs exec'd 0 ====
+
+ 0x2547CBF4: 825B00AC lwz r18,172(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xAC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x2547CBF8: 83290004 lwz r25,4(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0x2547CBFC: 2D920000 cmpi cr3,r18,0
+ 10: GETL R18, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x3, CR
+ 13: INCEIPL $4
+
+ 0x2547CC00: 823B00B4 lwz r17,180(r27)
+ 14: GETL R27, t12
+ 15: ADDL $0xB4, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R17
+ 18: INCEIPL $4
+
+ 0x2547CC04: 418E0128 bc 12,14,0x2547CD2C
+ 19: Js14o $0x2547CD2C
+
+
+
+. 1008 2547CBF4 20
+. 82 5B 00 AC 83 29 00 04 2D 92 00 00 82 3B 00 B4 41 8E 01 28
+==== BB 1009 (0x2547CC08) approx BBs exec'd 0 ====
+
+ 0x2547CC08: 817B0000 lwz r11,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x2547CC0C: 2E050000 cmpi cr4,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x4, CR
+ 7: INCEIPL $4
+
+ 0x2547CC10: 81320004 lwz r9,4(r18)
+ 8: GETL R18, t8
+ 9: ADDL $0x4, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R9
+ 12: INCEIPL $4
+
+ 0x2547CC14: 829E04C8 lwz r20,1224(r30)
+ 13: GETL R30, t12
+ 14: ADDL $0x4C8, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R20
+ 17: INCEIPL $4
+
+ 0x2547CC18: 7C8B4A2E lhzx r4,r11,r9
+ 18: GETL R9, t16
+ 19: GETL R11, t18
+ 20: ADDL t18, t16
+ 21: LDW (t16), t20
+ 22: PUTL t20, R4
+ 23: INCEIPL $4
+
+ 0x2547CC1C: 7EEB4A14 add r23,r11,r9
+ 24: GETL R11, t22
+ 25: GETL R9, t24
+ 26: ADDL t22, t24
+ 27: PUTL t24, R23
+ 28: INCEIPL $4
+
+ 0x2547CC20: 827E04D4 lwz r19,1236(r30)
+ 29: GETL R30, t26
+ 30: ADDL $0x4D4, t26
+ 31: LDL (t26), t28
+ 32: PUTL t28, R19
+ 33: INCEIPL $4
+
+ 0x2547CC24: 2C040001 cmpi cr0,r4,1
+ 34: GETL R4, t30
+ 35: MOVL $0x1, t34
+ 36: CMPL t30, t34, t32 (-rSo)
+ 37: ICRFL t32, $0x0, CR
+ 38: INCEIPL $4
+
+ 0x2547CC28: 408202D0 bc 4,2,0x2547CEF8
+ 39: Jc02o $0x2547CEF8
+
+
+
+. 1009 2547CC08 36
+. 81 7B 00 00 2E 05 00 00 81 32 00 04 82 9E 04 C8 7C 8B 4A 2E 7E EB 4A 14 82 7E 04 D4 2C 04 00 01 40 82 02 D0
+==== BB 1010 (0x2547CC2C) approx BBs exec'd 0 ====
+
+ 0x2547CC2C: 835B0018 lwz r26,24(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547CC30: 83970004 lwz r28,4(r23)
+ 5: GETL R23, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x2547CC34: 1E1A0018 mulli r16,r26,24
+ 10: GETL R26, t8
+ 11: MULL $0x18, t8
+ 12: PUTL t8, R16
+ 13: INCEIPL $4
+
+ 0x2547CC38: 7F5CCA14 add r26,r28,r25
+ 14: GETL R28, t10
+ 15: GETL R25, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R26
+ 18: INCEIPL $4
+
+ 0x2547CC3C: 7FB0A02E lwzx r29,r16,r20
+ 19: GETL R20, t14
+ 20: GETL R16, t16
+ 21: ADDL t16, t14
+ 22: LDL (t14), t18
+ 23: PUTL t18, R29
+ 24: INCEIPL $4
+
+ 0x2547CC40: 4800001C b 0x2547CC5C
+ 25: JMPo $0x2547CC5C ($4)
+
+
+
+. 1010 2547CC2C 24
+. 83 5B 00 18 83 97 00 04 1E 1A 00 18 7F 5C CA 14 7F B0 A0 2E 48 00 00 1C
+==== BB 1011 (0x2547CC5C) approx BBs exec'd 0 ====
+
+ 0x2547CC5C: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547CC60: 409AFFE4 bc 4,26,0x2547CC44
+ 4: Jc26o $0x2547CC44
+
+
+
+. 1011 2547CC5C 8
+. 2F 1D 00 00 40 9A FF E4
+==== BB 1012 (0x2547CC44) approx BBs exec'd 0 ====
+
+ 0x2547CC44: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547CC48: 7F43D378 or r3,r26,r26
+ 3: GETL R26, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0x2547CC4C: 4BFFFA89 bl 0x2547C6D4
+ 6: MOVL $0x2547CC50, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x2547C6D4 ($4)
+
+
+
+. 1012 2547CC44 12
+. 7F A4 EB 78 7F 43 D3 78 4B FF FA 89
+==== BB 1013 (0x2547CC50) approx BBs exec'd 0 ====
+
+ 0x2547CC50: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547CC54: 409E0220 bc 4,30,0x2547CE74
+ 4: Jc30o $0x2547CE74
+
+
+
+. 1013 2547CC50 8
+. 2F 83 00 00 40 9E 02 20
+==== BB 1014 (0x2547CC58) approx BBs exec'd 0 ====
+
+ 0x2547CC58: 83BD000C lwz r29,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x2547CC5C: 2F1D0000 cmpi cr6,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547CC60: 409AFFE4 bc 4,26,0x2547CC44
+ 9: Jc26o $0x2547CC44
+
+
+
+. 1014 2547CC58 12
+. 83 BD 00 0C 2F 1D 00 00 40 9A FF E4
+==== BB 1015 (0x2547CE74) approx BBs exec'd 0 ====
+
+ 0x2547CE74: 7FBCEB78 or r28,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0x2547CE78: 4192FE30 bc 12,18,0x2547CCA8
+ 3: Js18o $0x2547CCA8
+
+
+
+. 1015 2547CE74 8
+. 7F BC EB 78 41 92 FE 30
+==== BB 1016 (0x2547CCA8) approx BBs exec'd 0 ====
+
+ 0x2547CCA8: 80970008 lwz r4,8(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547CCAC: 7FA4BA14 add r29,r4,r23
+ 5: GETL R4, t4
+ 6: GETL R23, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547CCB0: 7E7A9B78 or r26,r19,r19
+ 10: GETL R19, t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x2547CCB4: 811B0004 lwz r8,4(r27)
+ 13: GETL R27, t10
+ 14: ADDL $0x4, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R8
+ 17: INCEIPL $4
+
+ 0x2547CCB8: 7EA7AB78 or r7,r21,r21
+ 18: GETL R21, t14
+ 19: PUTL t14, R7
+ 20: INCEIPL $4
+
+ 0x2547CCBC: 88A80000 lbz r5,0(r8)
+ 21: GETL R8, t16
+ 22: LDB (t16), t18
+ 23: PUTL t18, R5
+ 24: INCEIPL $4
+
+ 0x2547CCC0: 7D034378 or r3,r8,r8
+ 25: GETL R8, t20
+ 26: PUTL t20, R3
+ 27: INCEIPL $4
+
+ 0x2547CCC4: 2C850000 cmpi cr1,r5,0
+ 28: GETL R5, t22
+ 29: CMP0L t22, t24 (-rSo)
+ 30: ICRFL t24, $0x1, CR
+ 31: INCEIPL $4
+
+ 0x2547CCC8: 4086000C bc 4,6,0x2547CCD4
+ 32: Jc06o $0x2547CCD4
+
+
+
+. 1016 2547CCA8 36
+. 80 97 00 08 7F A4 BA 14 7E 7A 9B 78 81 1B 00 04 7E A7 AB 78 88 A8 00 00 7D 03 43 78 2C 85 00 00 40 86 00 0C
+==== BB 1017 (0x2547CCCC) approx BBs exec'd 0 ====
+
+ 0x2547CCCC: 80DA0000 lwz r6,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x2547CCD0: 80660000 lwz r3,0(r6)
+ 4: GETL R6, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R3
+ 7: INCEIPL $4
+
+ 0x2547CCD4: 815D0008 lwz r10,8(r29)
+ 8: GETL R29, t8
+ 9: ADDL $0x8, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R10
+ 12: INCEIPL $4
+
+ 0x2547CCD8: A21D0004 lhz r16,4(r29)
+ 13: GETL R29, t12
+ 14: ADDL $0x4, t12
+ 15: LDW (t12), t14
+ 16: PUTL t14, R16
+ 17: INCEIPL $4
+
+ 0x2547CCDC: 809D0000 lwz r4,0(r29)
+ 18: GETL R29, t16
+ 19: LDL (t16), t18
+ 20: PUTL t18, R4
+ 21: INCEIPL $4
+
+ 0x2547CCE0: 7CAACA14 add r5,r10,r25
+ 22: GETL R10, t20
+ 23: GETL R25, t22
+ 24: ADDL t20, t22
+ 25: PUTL t22, R5
+ 26: INCEIPL $4
+
+ 0x2547CCE4: 80DC0014 lwz r6,20(r28)
+ 27: GETL R28, t24
+ 28: ADDL $0x14, t24
+ 29: LDL (t24), t26
+ 30: PUTL t26, R6
+ 31: INCEIPL $4
+
+ 0x2547CCE8: 560807BC rlwinm r8,r16,0,30,30
+ 32: GETL R16, t28
+ 33: ANDL $0x2, t28
+ 34: PUTL t28, R8
+ 35: INCEIPL $4
+
+ 0x2547CCEC: 4BFFFA85 bl 0x2547C770
+ 36: MOVL $0x2547CCF0, t30
+ 37: PUTL t30, LR
+ 38: JMPo-c $0x2547C770 ($4)
+
+
+
+. 1017 2547CCCC 36
+. 80 DA 00 00 80 66 00 00 81 5D 00 08 A2 1D 00 04 80 9D 00 00 7C AA CA 14 80 DC 00 14 56 08 07 BC 4B FF FA 85
+==== BB 1018 match_symbol(0x2547C770) approx BBs exec'd 0 ====
+
+ 0x2547C770: 9421FF20 stwu r1,-224(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF20, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547C774: 7D4802A6 mflr r10
+ 6: GETL LR, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x2547C778: 4801A889 bl 0x25497000
+ 9: MOVL $0x2547C77C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 1018 2547C770 12
+. 94 21 FF 20 7D 48 02 A6 48 01 A8 89
+==== BB 1019 (0x2547C77C) approx BBs exec'd 0 ====
+
+ 0x2547C77C: 93C100D8 stw r30,216(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xD8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547C780: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547C784: 926100AC stw r19,172(r1)
+ 8: GETL R19, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xAC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547C788: 914100E4 stw r10,228(r1)
+ 13: GETL R10, t10
+ 14: GETL R1, t12
+ 15: ADDL $0xE4, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547C78C: 3A600000 li r19,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R19
+ 20: INCEIPL $4
+
+ 0x2547C790: 81660034 lwz r11,52(r6)
+ 21: GETL R6, t16
+ 22: ADDL $0x34, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R11
+ 25: INCEIPL $4
+
+ 0x2547C794: 813E04F4 lwz r9,1268(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4F4, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R9
+ 30: INCEIPL $4
+
+ 0x2547C798: 92C100B8 stw r22,184(r1)
+ 31: GETL R22, t24
+ 32: GETL R1, t26
+ 33: ADDL $0xB8, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547C79C: 7CF63B78 or r22,r7,r7
+ 36: GETL R7, t28
+ 37: PUTL t28, R22
+ 38: INCEIPL $4
+
+ 0x2547C7A0: 80090000 lwz r0,0(r9)
+ 39: GETL R9, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R0
+ 42: INCEIPL $4
+
+ 0x2547C7A4: 92E100BC stw r23,188(r1)
+ 43: GETL R23, t34
+ 44: GETL R1, t36
+ 45: ADDL $0xBC, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x2547C7A8: 7D174378 or r23,r8,r8
+ 48: GETL R8, t38
+ 49: PUTL t38, R23
+ 50: INCEIPL $4
+
+ 0x2547C7AC: 70090010 andi. r9,r0,0x10
+ 51: GETL R0, t40
+ 52: ANDL $0x10, t40
+ 53: PUTL t40, R9
+ 54: CMP0L t40, t42 (-rSo)
+ 55: ICRFL t42, $0x0, CR
+ 56: INCEIPL $4
+
+ 0x2547C7B0: 930100C0 stw r24,192(r1)
+ 57: GETL R24, t44
+ 58: GETL R1, t46
+ 59: ADDL $0xC0, t46
+ 60: STL t44, (t46)
+ 61: INCEIPL $4
+
+ 0x2547C7B4: 932100C4 stw r25,196(r1)
+ 62: GETL R25, t48
+ 63: GETL R1, t50
+ 64: ADDL $0xC4, t50
+ 65: STL t48, (t50)
+ 66: INCEIPL $4
+
+ 0x2547C7B8: 7C781B78 or r24,r3,r3
+ 67: GETL R3, t52
+ 68: PUTL t52, R24
+ 69: INCEIPL $4
+
+ 0x2547C7BC: 936100CC stw r27,204(r1)
+ 70: GETL R27, t54
+ 71: GETL R1, t56
+ 72: ADDL $0xCC, t56
+ 73: STL t54, (t56)
+ 74: INCEIPL $4
+
+ 0x2547C7C0: 7CD93378 or r25,r6,r6
+ 75: GETL R6, t58
+ 76: PUTL t58, R25
+ 77: INCEIPL $4
+
+ 0x2547C7C4: 938100D0 stw r28,208(r1)
+ 78: GETL R28, t60
+ 79: GETL R1, t62
+ 80: ADDL $0xD0, t62
+ 81: STL t60, (t62)
+ 82: INCEIPL $4
+
+ 0x2547C7C8: 7C9B2378 or r27,r4,r4
+ 83: GETL R4, t64
+ 84: PUTL t64, R27
+ 85: INCEIPL $4
+
+ 0x2547C7CC: 93E100DC stw r31,220(r1)
+ 86: GETL R31, t66
+ 87: GETL R1, t68
+ 88: ADDL $0xDC, t68
+ 89: STL t66, (t68)
+ 90: INCEIPL $4
+
+ 0x2547C7D0: 7CBC2B78 or r28,r5,r5
+ 91: GETL R5, t70
+ 92: PUTL t70, R28
+ 93: INCEIPL $4
+
+ 0x2547C7D4: 928100B0 stw r20,176(r1)
+ 94: GETL R20, t72
+ 95: GETL R1, t74
+ 96: ADDL $0xB0, t74
+ 97: STL t72, (t74)
+ 98: INCEIPL $4
+
+ 0x2547C7D8: 7C3F0B78 or r31,r1,r1
+ 99: GETL R1, t76
+ 100: PUTL t76, R31
+ 101: INCEIPL $4
+
+ 0x2547C7DC: 92A100B4 stw r21,180(r1)
+ 102: GETL R21, t78
+ 103: GETL R1, t80
+ 104: ADDL $0xB4, t80
+ 105: STL t78, (t80)
+ 106: INCEIPL $4
+
+ 0x2547C7E0: 934100C8 stw r26,200(r1)
+ 107: GETL R26, t82
+ 108: GETL R1, t84
+ 109: ADDL $0xC8, t84
+ 110: STL t82, (t84)
+ 111: INCEIPL $4
+
+ 0x2547C7E4: 93A100D4 stw r29,212(r1)
+ 112: GETL R29, t86
+ 113: GETL R1, t88
+ 114: ADDL $0xD4, t88
+ 115: STL t86, (t88)
+ 116: INCEIPL $4
+
+ 0x2547C7E8: 834B0004 lwz r26,4(r11)
+ 117: GETL R11, t90
+ 118: ADDL $0x4, t90
+ 119: LDL (t90), t92
+ 120: PUTL t92, R26
+ 121: INCEIPL $4
+
+ 0x2547C7EC: 40820230 bc 4,2,0x2547CA1C
+ 122: Jc02o $0x2547CA1C
+
+
+
+. 1019 2547C77C 116
+. 93 C1 00 D8 7F C8 02 A6 92 61 00 AC 91 41 00 E4 3A 60 00 00 81 66 00 34 81 3E 04 F4 92 C1 00 B8 7C F6 3B 78 80 09 00 00 92 E1 00 BC 7D 17 43 78 70 09 00 10 93 01 00 C0 93 21 00 C4 7C 78 1B 78 93 61 00 CC 7C D9 33 78 93 81 00 D0 7C 9B 23 78 93 E1 00 DC 7C BC 2B 78 92 81 00 B0 7C 3F 0B 78 92 A1 00 B4 93 41 00 C8 93 A1 00 D4 83 4B 00 04 40 82 02 30
+==== BB 1020 (0x2547C7F0) approx BBs exec'd 0 ====
+
+ 0x2547C7F0: 813900B4 lwz r9,180(r25)
+ 0: GETL R25, t0
+ 1: ADDL $0xB4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547C7F4: 2C890000 cmpi cr1,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547C7F8: 41860264 bc 12,6,0x2547CA5C
+ 9: Js06o $0x2547CA5C
+
+
+
+. 1020 2547C7F0 12
+. 81 39 00 B4 2C 89 00 00 41 86 02 64
+==== BB 1021 (0x2547C7FC) approx BBs exec'd 0 ====
+
+ 0x2547C7FC: 81690004 lwz r11,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547C800: 3A9F0008 addi r20,r31,8
+ 5: GETL R31, t4
+ 6: ADDL $0x8, t4
+ 7: PUTL t4, R20
+ 8: INCEIPL $4
+
+ 0x2547C804: 80190000 lwz r0,0(r25)
+ 9: GETL R25, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x2547C808: 82BE0358 lwz r21,856(r30)
+ 13: GETL R30, t10
+ 14: ADDL $0x358, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R21
+ 17: INCEIPL $4
+
+ 0x2547C80C: 7FA05A14 add r29,r0,r11
+ 18: GETL R0, t14
+ 19: GETL R11, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R29
+ 22: INCEIPL $4
+
+ 0x2547C810: A13D0000 lhz r9,0(r29)
+ 23: GETL R29, t18
+ 24: LDW (t18), t20
+ 25: PUTL t20, R9
+ 26: INCEIPL $4
+
+ 0x2547C814: 7F83E378 or r3,r28,r28
+ 27: GETL R28, t22
+ 28: PUTL t22, R3
+ 29: INCEIPL $4
+
+ 0x2547C818: 2F890001 cmpi cr7,r9,1
+ 30: GETL R9, t24
+ 31: MOVL $0x1, t28
+ 32: CMPL t24, t28, t26 (-rSo)
+ 33: ICRFL t26, $0x7, CR
+ 34: INCEIPL $4
+
+ 0x2547C81C: 409E0124 bc 4,30,0x2547C940
+ 35: Jc30o $0x2547C940
+
+
+
+. 1021 2547C7FC 36
+. 81 69 00 04 3A 9F 00 08 80 19 00 00 82 BE 03 58 7F A0 5A 14 A1 3D 00 00 7F 83 E3 78 2F 89 00 01 40 9E 01 24
+==== BB 1022 (0x2547C820) approx BBs exec'd 0 ====
+
+ 0x2547C820: 809D0008 lwz r4,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547C824: 7C84D800 cmp cr1,r4,r27
+ 5: GETL R4, t4
+ 6: GETL R27, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x2547C828: 418600B4 bc 12,6,0x2547C8DC
+ 10: Js06o $0x2547C8DC
+
+
+
+. 1022 2547C820 12
+. 80 9D 00 08 7C 84 D8 00 41 86 00 B4
+==== BB 1023 (0x2547C82C) approx BBs exec'd 0 ====
+
+ 0x2547C82C: 80FD0010 lwz r7,16(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547C830: 2F870000 cmpi cr7,r7,0
+ 5: GETL R7, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547C834: 7FBD3A14 add r29,r29,r7
+ 9: GETL R29, t8
+ 10: GETL R7, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R29
+ 13: INCEIPL $4
+
+ 0x2547C838: 409EFFD8 bc 4,30,0x2547C810
+ 14: Jc30o $0x2547C810
+
+
+
+. 1023 2547C82C 16
+. 80 FD 00 10 2F 87 00 00 7F BD 3A 14 40 9E FF D8
+==== BB 1024 (0x2547C810) approx BBs exec'd 0 ====
+
+ 0x2547C810: A13D0000 lhz r9,0(r29)
+ 0: GETL R29, t0
+ 1: LDW (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547C814: 7F83E378 or r3,r28,r28
+ 4: GETL R28, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x2547C818: 2F890001 cmpi cr7,r9,1
+ 7: GETL R9, t6
+ 8: MOVL $0x1, t10
+ 9: CMPL t6, t10, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x2547C81C: 409E0124 bc 4,30,0x2547C940
+ 12: Jc30o $0x2547C940
+
+
+
+. 1024 2547C810 16
+. A1 3D 00 00 7F 83 E3 78 2F 89 00 01 40 9E 01 24
+==== BB 1025 (0x2547C8DC) approx BBs exec'd 0 ====
+
+ 0x2547C8DC: 80BD000C lwz r5,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547C8E0: 7CC5E82E lwzx r6,r5,r29
+ 5: GETL R29, t4
+ 6: GETL R5, t6
+ 7: ADDL t6, t4
+ 8: LDL (t4), t8
+ 9: PUTL t8, R6
+ 10: INCEIPL $4
+
+ 0x2547C8E4: 7C86D214 add r4,r6,r26
+ 11: GETL R6, t10
+ 12: GETL R26, t12
+ 13: ADDL t10, t12
+ 14: PUTL t12, R4
+ 15: INCEIPL $4
+
+ 0x2547C8E8: 480065F9 bl 0x25482EE0
+ 16: MOVL $0x2547C8EC, t14
+ 17: PUTL t14, LR
+ 18: JMPo-c $0x25482EE0 ($4)
+
+
+
+. 1025 2547C8DC 16
+. 80 BD 00 0C 7C C5 E8 2E 7C 86 D2 14 48 00 65 F9
+==== BB 1026 (0x2547C8EC) approx BBs exec'd 0 ====
+
+ 0x2547C8EC: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547C8F0: 40BAFF3C bc 5,26,0x2547C82C
+ 4: Jc26o $0x2547C82C
+
+
+
+. 1026 2547C8EC 8
+. 2F 03 00 00 40 BA FF 3C
+==== BB 1027 (0x2547C8F4) approx BBs exec'd 0 ====
+
+ 0x2547C8F4: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547C8F8: 80C10000 lwz r6,0(r1)
+ 3: GETL R1, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R6
+ 6: INCEIPL $4
+
+ 0x2547C8FC: 80E60004 lwz r7,4(r6)
+ 7: GETL R6, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R7
+ 11: INCEIPL $4
+
+ 0x2547C900: 8266FFCC lwz r19,-52(r6)
+ 12: GETL R6, t10
+ 13: ADDL $0xFFFFFFCC, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R19
+ 16: INCEIPL $4
+
+ 0x2547C904: 8286FFD0 lwz r20,-48(r6)
+ 17: GETL R6, t14
+ 18: ADDL $0xFFFFFFD0, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R20
+ 21: INCEIPL $4
+
+ 0x2547C908: 7CE803A6 mtlr r7
+ 22: GETL R7, t18
+ 23: PUTL t18, LR
+ 24: INCEIPL $4
+
+ 0x2547C90C: 82A6FFD4 lwz r21,-44(r6)
+ 25: GETL R6, t20
+ 26: ADDL $0xFFFFFFD4, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R21
+ 29: INCEIPL $4
+
+ 0x2547C910: 82C6FFD8 lwz r22,-40(r6)
+ 30: GETL R6, t24
+ 31: ADDL $0xFFFFFFD8, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R22
+ 34: INCEIPL $4
+
+ 0x2547C914: 82E6FFDC lwz r23,-36(r6)
+ 35: GETL R6, t28
+ 36: ADDL $0xFFFFFFDC, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R23
+ 39: INCEIPL $4
+
+ 0x2547C918: 8306FFE0 lwz r24,-32(r6)
+ 40: GETL R6, t32
+ 41: ADDL $0xFFFFFFE0, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R24
+ 44: INCEIPL $4
+
+ 0x2547C91C: 8326FFE4 lwz r25,-28(r6)
+ 45: GETL R6, t36
+ 46: ADDL $0xFFFFFFE4, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R25
+ 49: INCEIPL $4
+
+ 0x2547C920: 8346FFE8 lwz r26,-24(r6)
+ 50: GETL R6, t40
+ 51: ADDL $0xFFFFFFE8, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R26
+ 54: INCEIPL $4
+
+ 0x2547C924: 8366FFEC lwz r27,-20(r6)
+ 55: GETL R6, t44
+ 56: ADDL $0xFFFFFFEC, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R27
+ 59: INCEIPL $4
+
+ 0x2547C928: 8386FFF0 lwz r28,-16(r6)
+ 60: GETL R6, t48
+ 61: ADDL $0xFFFFFFF0, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R28
+ 64: INCEIPL $4
+
+ 0x2547C92C: 83A6FFF4 lwz r29,-12(r6)
+ 65: GETL R6, t52
+ 66: ADDL $0xFFFFFFF4, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R29
+ 69: INCEIPL $4
+
+ 0x2547C930: 83C6FFF8 lwz r30,-8(r6)
+ 70: GETL R6, t56
+ 71: ADDL $0xFFFFFFF8, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R30
+ 74: INCEIPL $4
+
+ 0x2547C934: 83E6FFFC lwz r31,-4(r6)
+ 75: GETL R6, t60
+ 76: ADDL $0xFFFFFFFC, t60
+ 77: LDL (t60), t62
+ 78: PUTL t62, R31
+ 79: INCEIPL $4
+
+ 0x2547C938: 7CC13378 or r1,r6,r6
+ 80: GETL R6, t64
+ 81: PUTL t64, R1
+ 82: INCEIPL $4
+
+ 0x2547C93C: 4E800020 blr
+ 83: GETL LR, t66
+ 84: JMPo-r t66 ($4)
+
+
+
+. 1027 2547C8F4 76
+. 38 60 00 00 80 C1 00 00 80 E6 00 04 82 66 FF CC 82 86 FF D0 7C E8 03 A6 82 A6 FF D4 82 C6 FF D8 82 E6 FF DC 83 06 FF E0 83 26 FF E4 83 46 FF E8 83 66 FF EC 83 86 FF F0 83 A6 FF F4 83 C6 FF F8 83 E6 FF FC 7C C1 33 78 4E 80 00 20
+==== BB 1028 (0x2547CCF0) approx BBs exec'd 0 ====
+
+ 0x2547CCF0: A17D0006 lhz r11,6(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x6, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547CCF4: 7ED61B78 or r22,r22,r3
+ 5: GETL R22, t4
+ 6: GETL R3, t6
+ 7: ORL t6, t4
+ 8: PUTL t4, R22
+ 9: INCEIPL $4
+
+ 0x2547CCF8: 5560047E rlwinm r0,r11,0,17,31
+ 10: GETL R11, t8
+ 11: ANDL $0x7FFF, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x2547CCFC: 7F00C040 cmpl cr6,r0,r24
+ 14: GETL R0, t10
+ 15: GETL R24, t12
+ 16: CMPUL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0x2547CD00: 40990008 bc 4,25,0x2547CD08
+ 19: Jc25o $0x2547CD08
+
+
+
+. 1028 2547CCF0 20
+. A1 7D 00 06 7E D6 1B 78 55 60 04 7E 7F 00 C0 40 40 99 00 08
+==== BB 1029 (0x2547CD04) approx BBs exec'd 0 ====
+
+ 0x2547CD04: 7C180378 or r24,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R24
+ 2: INCEIPL $4
+
+ 0x2547CD08: 807D000C lwz r3,12(r29)
+ 3: GETL R29, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547CD0C: 2F830000 cmpi cr7,r3,0
+ 8: GETL R3, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x2547CD10: 7FBD1A14 add r29,r29,r3
+ 12: GETL R29, t10
+ 13: GETL R3, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R29
+ 16: INCEIPL $4
+
+ 0x2547CD14: 409EFFA0 bc 4,30,0x2547CCB4
+ 17: Jc30o $0x2547CCB4
+
+
+
+. 1029 2547CD04 20
+. 7C 18 03 78 80 7D 00 0C 2F 83 00 00 7F BD 1A 14 40 9E FF A0
+==== BB 1030 (0x2547CD18) approx BBs exec'd 0 ====
+
+ 0x2547CD18: 8017000C lwz r0,12(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547CD1C: 2C000000 cmpi cr0,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547CD20: 4182000C bc 12,2,0x2547CD2C
+ 9: Js02o $0x2547CD2C
+
+
+
+. 1030 2547CD18 12
+. 80 17 00 0C 2C 00 00 00 41 82 00 0C
+==== BB 1031 (0x2547CD24) approx BBs exec'd 0 ====
+
+ 0x2547CD24: 7EF70214 add r23,r23,r0
+ 0: GETL R23, t0
+ 1: GETL R0, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x2547CD28: 4BFFFF04 b 0x2547CC2C
+ 5: JMPo $0x2547CC2C ($4)
+
+
+
+. 1031 2547CD24 8
+. 7E F7 02 14 4B FF FF 04
+==== BB 1032 (0x2547CD08) approx BBs exec'd 0 ====
+
+ 0x2547CD08: 807D000C lwz r3,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547CD0C: 2F830000 cmpi cr7,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547CD10: 7FBD1A14 add r29,r29,r3
+ 9: GETL R29, t8
+ 10: GETL R3, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R29
+ 13: INCEIPL $4
+
+ 0x2547CD14: 409EFFA0 bc 4,30,0x2547CCB4
+ 14: Jc30o $0x2547CCB4
+
+
+
+. 1032 2547CD08 16
+. 80 7D 00 0C 2F 83 00 00 7F BD 1A 14 40 9E FF A0
+==== BB 1033 (0x2547CCB4) approx BBs exec'd 0 ====
+
+ 0x2547CCB4: 811B0004 lwz r8,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547CCB8: 7EA7AB78 or r7,r21,r21
+ 5: GETL R21, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x2547CCBC: 88A80000 lbz r5,0(r8)
+ 8: GETL R8, t6
+ 9: LDB (t6), t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0x2547CCC0: 7D034378 or r3,r8,r8
+ 12: GETL R8, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x2547CCC4: 2C850000 cmpi cr1,r5,0
+ 15: GETL R5, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x1, CR
+ 18: INCEIPL $4
+
+ 0x2547CCC8: 4086000C bc 4,6,0x2547CCD4
+ 19: Jc06o $0x2547CCD4
+
+
+
+. 1033 2547CCB4 24
+. 81 1B 00 04 7E A7 AB 78 88 A8 00 00 7D 03 43 78 2C 85 00 00 40 86 00 0C
+==== BB 1034 (0x2547CD2C) approx BBs exec'd 0 ====
+
+ 0x2547CD2C: 2E110000 cmpi cr4,r17,0
+ 0: GETL R17, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x2547CD30: 41920034 bc 12,18,0x2547CD64
+ 4: Js18o $0x2547CD64
+
+
+
+. 1034 2547CD2C 8
+. 2E 11 00 00 41 92 00 34
+==== BB 1035 (0x2547CD64) approx BBs exec'd 0 ====
+
+ 0x2547CD64: 2F980000 cmpi cr7,r24,0
+ 0: GETL R24, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547CD68: 409E0064 bc 4,30,0x2547CDCC
+ 4: Jc30o $0x2547CDCC
+
+
+
+. 1035 2547CD64 8
+. 2F 98 00 00 40 9E 00 64
+==== BB 1036 (0x2547CDCC) approx BBs exec'd 0 ====
+
+ 0x2547CDCC: 3BB80001 addi r29,r24,1
+ 0: GETL R24, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x2547CDD0: 38800010 li r4,16
+ 4: MOVL $0x10, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0x2547CDD4: 7FA3EB78 or r3,r29,r29
+ 7: GETL R29, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0x2547CDD8: 3A00000C li r16,12
+ 10: MOVL $0xC, t6
+ 11: PUTL t6, R16
+ 12: INCEIPL $4
+
+ 0x2547CDDC: 4801AC51 bl 0x25497A2C
+ 13: MOVL $0x2547CDE0, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0x25497A2C ($4)
+
+
+
+. 1036 2547CDCC 20
+. 3B B8 00 01 38 80 00 10 7F A3 EB 78 3A 00 00 0C 48 01 AC 51
+==== BB 1037 (0x2547CDE0) approx BBs exec'd 0 ====
+
+ 0x2547CDE0: 80DE0378 lwz r6,888(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x378, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547CDE4: 2C030000 cmpi cr0,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547CDE8: 7C651B78 or r5,r3,r3
+ 9: GETL R3, t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0x2547CDEC: 907B0188 stw r3,392(r27)
+ 12: GETL R3, t10
+ 13: GETL R27, t12
+ 14: ADDL $0x188, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0x2547CDF0: 418201AC bc 12,2,0x2547CF9C
+ 17: Js02o $0x2547CF9C
+
+
+
+. 1037 2547CDE0 20
+. 80 DE 03 78 2C 03 00 00 7C 65 1B 78 90 7B 01 88 41 82 01 AC
+==== BB 1038 (0x2547CDF4) approx BBs exec'd 0 ====
+
+ 0x2547CDF4: 839B00E4 lwz r28,228(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xE4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x2547CDF8: 93BB0184 stw r29,388(r27)
+ 5: GETL R29, t4
+ 6: GETL R27, t6
+ 7: ADDL $0x184, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547CDFC: 831C0004 lwz r24,4(r28)
+ 10: GETL R28, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R24
+ 14: INCEIPL $4
+
+ 0x2547CE00: 931B0198 stw r24,408(r27)
+ 15: GETL R24, t12
+ 16: GETL R27, t14
+ 17: ADDL $0x198, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x2547CE04: 418E0088 bc 12,14,0x2547CE8C
+ 20: Js14o $0x2547CE8C
+
+
+
+. 1038 2547CDF4 20
+. 83 9B 00 E4 93 BB 01 84 83 1C 00 04 93 1B 01 98 41 8E 00 88
+==== BB 1039 (0x2547CE08) approx BBs exec'd 0 ====
+
+ 0x2547CE08: 83520004 lwz r26,4(r18)
+ 0: GETL R18, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547CE0C: 825B0000 lwz r18,0(r27)
+ 5: GETL R27, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R18
+ 8: INCEIPL $4
+
+ 0x2547CE10: 7CD2D214 add r6,r18,r26
+ 9: GETL R18, t8
+ 10: GETL R26, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R6
+ 13: INCEIPL $4
+
+ 0x2547CE14: 81860008 lwz r12,8(r6)
+ 14: GETL R6, t12
+ 15: ADDL $0x8, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R12
+ 18: INCEIPL $4
+
+ 0x2547CE18: 7CEC3214 add r7,r12,r6
+ 19: GETL R12, t16
+ 20: GETL R6, t18
+ 21: ADDL t16, t18
+ 22: PUTL t18, R7
+ 23: INCEIPL $4
+
+ 0x2547CE1C: A2A70006 lhz r21,6(r7)
+ 24: GETL R7, t20
+ 25: ADDL $0x6, t20
+ 26: LDW (t20), t22
+ 27: PUTL t22, R21
+ 28: INCEIPL $4
+
+ 0x2547CE20: 80670000 lwz r3,0(r7)
+ 29: GETL R7, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R3
+ 32: INCEIPL $4
+
+ 0x2547CE24: 56A42376 rlwinm r4,r21,4,13,27
+ 33: GETL R21, t28
+ 34: ROLL $0x4, t28
+ 35: ANDL $0x7FFF0, t28
+ 36: PUTL t28, R4
+ 37: INCEIPL $4
+
+ 0x2547CE28: 56B00420 rlwinm r16,r21,0,16,16
+ 38: GETL R21, t30
+ 39: ANDL $0x8000, t30
+ 40: PUTL t30, R16
+ 41: INCEIPL $4
+
+ 0x2547CE2C: 7FA42A14 add r29,r4,r5
+ 42: GETL R4, t32
+ 43: GETL R5, t34
+ 44: ADDL t32, t34
+ 45: PUTL t34, R29
+ 46: INCEIPL $4
+
+ 0x2547CE30: 907D0004 stw r3,4(r29)
+ 47: GETL R3, t36
+ 48: GETL R29, t38
+ 49: ADDL $0x4, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0x2547CE34: 921D0008 stw r16,8(r29)
+ 52: GETL R16, t40
+ 53: GETL R29, t42
+ 54: ADDL $0x8, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0x2547CE38: 8167000C lwz r11,12(r7)
+ 57: GETL R7, t44
+ 58: ADDL $0xC, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R11
+ 61: INCEIPL $4
+
+ 0x2547CE3C: 81470008 lwz r10,8(r7)
+ 62: GETL R7, t48
+ 63: ADDL $0x8, t48
+ 64: LDL (t48), t50
+ 65: PUTL t50, R10
+ 66: INCEIPL $4
+
+ 0x2547CE40: 2D8B0000 cmpi cr3,r11,0
+ 67: GETL R11, t52
+ 68: CMP0L t52, t54 (-rSo)
+ 69: ICRFL t54, $0x3, CR
+ 70: INCEIPL $4
+
+ 0x2547CE44: 81060004 lwz r8,4(r6)
+ 71: GETL R6, t56
+ 72: ADDL $0x4, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R8
+ 75: INCEIPL $4
+
+ 0x2547CE48: 7D2ACA14 add r9,r10,r25
+ 76: GETL R10, t60
+ 77: GETL R25, t62
+ 78: ADDL t60, t62
+ 79: PUTL t62, R9
+ 80: INCEIPL $4
+
+ 0x2547CE4C: 7CE75A14 add r7,r7,r11
+ 81: GETL R7, t64
+ 82: GETL R11, t66
+ 83: ADDL t64, t66
+ 84: PUTL t66, R7
+ 85: INCEIPL $4
+
+ 0x2547CE50: 7C08CA14 add r0,r8,r25
+ 86: GETL R8, t68
+ 87: GETL R25, t70
+ 88: ADDL t68, t70
+ 89: PUTL t70, R0
+ 90: INCEIPL $4
+
+ 0x2547CE54: 7D24292E stwx r9,r4,r5
+ 91: GETL R5, t72
+ 92: GETL R4, t74
+ 93: ADDL t74, t72
+ 94: GETL R9, t76
+ 95: STL t76, (t72)
+ 96: INCEIPL $4
+
+ 0x2547CE58: 901D000C stw r0,12(r29)
+ 97: GETL R0, t78
+ 98: GETL R29, t80
+ 99: ADDL $0xC, t80
+ 100: STL t78, (t80)
+ 101: INCEIPL $4
+
+ 0x2547CE5C: 408EFFC0 bc 4,14,0x2547CE1C
+ 102: Jc14o $0x2547CE1C
+
+
+
+. 1039 2547CE08 88
+. 83 52 00 04 82 5B 00 00 7C D2 D2 14 81 86 00 08 7C EC 32 14 A2 A7 00 06 80 67 00 00 56 A4 23 76 56 B0 04 20 7F A4 2A 14 90 7D 00 04 92 1D 00 08 81 67 00 0C 81 47 00 08 2D 8B 00 00 81 06 00 04 7D 2A CA 14 7C E7 5A 14 7C 08 CA 14 7D 24 29 2E 90 1D 00 0C 40 8E FF C0
+==== BB 1040 (0x2547CE60) approx BBs exec'd 0 ====
+
+ 0x2547CE60: 8006000C lwz r0,12(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547CE64: 2C800000 cmpi cr1,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547CE68: 41860024 bc 12,6,0x2547CE8C
+ 9: Js06o $0x2547CE8C
+
+
+
+. 1040 2547CE60 12
+. 80 06 00 0C 2C 80 00 00 41 86 00 24
+==== BB 1041 (0x2547CE6C) approx BBs exec'd 0 ====
+
+ 0x2547CE6C: 7CC60214 add r6,r6,r0
+ 0: GETL R6, t0
+ 1: GETL R0, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547CE70: 4BFFFFA4 b 0x2547CE14
+ 5: JMPo $0x2547CE14 ($4)
+
+
+
+. 1041 2547CE6C 8
+. 7C C6 02 14 4B FF FF A4
+==== BB 1042 (0x2547CE14) approx BBs exec'd 0 ====
+
+ 0x2547CE14: 81860008 lwz r12,8(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x2547CE18: 7CEC3214 add r7,r12,r6
+ 5: GETL R12, t4
+ 6: GETL R6, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0x2547CE1C: A2A70006 lhz r21,6(r7)
+ 10: GETL R7, t8
+ 11: ADDL $0x6, t8
+ 12: LDW (t8), t10
+ 13: PUTL t10, R21
+ 14: INCEIPL $4
+
+ 0x2547CE20: 80670000 lwz r3,0(r7)
+ 15: GETL R7, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R3
+ 18: INCEIPL $4
+
+ 0x2547CE24: 56A42376 rlwinm r4,r21,4,13,27
+ 19: GETL R21, t16
+ 20: ROLL $0x4, t16
+ 21: ANDL $0x7FFF0, t16
+ 22: PUTL t16, R4
+ 23: INCEIPL $4
+
+ 0x2547CE28: 56B00420 rlwinm r16,r21,0,16,16
+ 24: GETL R21, t18
+ 25: ANDL $0x8000, t18
+ 26: PUTL t18, R16
+ 27: INCEIPL $4
+
+ 0x2547CE2C: 7FA42A14 add r29,r4,r5
+ 28: GETL R4, t20
+ 29: GETL R5, t22
+ 30: ADDL t20, t22
+ 31: PUTL t22, R29
+ 32: INCEIPL $4
+
+ 0x2547CE30: 907D0004 stw r3,4(r29)
+ 33: GETL R3, t24
+ 34: GETL R29, t26
+ 35: ADDL $0x4, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0x2547CE34: 921D0008 stw r16,8(r29)
+ 38: GETL R16, t28
+ 39: GETL R29, t30
+ 40: ADDL $0x8, t30
+ 41: STL t28, (t30)
+ 42: INCEIPL $4
+
+ 0x2547CE38: 8167000C lwz r11,12(r7)
+ 43: GETL R7, t32
+ 44: ADDL $0xC, t32
+ 45: LDL (t32), t34
+ 46: PUTL t34, R11
+ 47: INCEIPL $4
+
+ 0x2547CE3C: 81470008 lwz r10,8(r7)
+ 48: GETL R7, t36
+ 49: ADDL $0x8, t36
+ 50: LDL (t36), t38
+ 51: PUTL t38, R10
+ 52: INCEIPL $4
+
+ 0x2547CE40: 2D8B0000 cmpi cr3,r11,0
+ 53: GETL R11, t40
+ 54: CMP0L t40, t42 (-rSo)
+ 55: ICRFL t42, $0x3, CR
+ 56: INCEIPL $4
+
+ 0x2547CE44: 81060004 lwz r8,4(r6)
+ 57: GETL R6, t44
+ 58: ADDL $0x4, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R8
+ 61: INCEIPL $4
+
+ 0x2547CE48: 7D2ACA14 add r9,r10,r25
+ 62: GETL R10, t48
+ 63: GETL R25, t50
+ 64: ADDL t48, t50
+ 65: PUTL t50, R9
+ 66: INCEIPL $4
+
+ 0x2547CE4C: 7CE75A14 add r7,r7,r11
+ 67: GETL R7, t52
+ 68: GETL R11, t54
+ 69: ADDL t52, t54
+ 70: PUTL t54, R7
+ 71: INCEIPL $4
+
+ 0x2547CE50: 7C08CA14 add r0,r8,r25
+ 72: GETL R8, t56
+ 73: GETL R25, t58
+ 74: ADDL t56, t58
+ 75: PUTL t58, R0
+ 76: INCEIPL $4
+
+ 0x2547CE54: 7D24292E stwx r9,r4,r5
+ 77: GETL R5, t60
+ 78: GETL R4, t62
+ 79: ADDL t62, t60
+ 80: GETL R9, t64
+ 81: STL t64, (t60)
+ 82: INCEIPL $4
+
+ 0x2547CE58: 901D000C stw r0,12(r29)
+ 83: GETL R0, t66
+ 84: GETL R29, t68
+ 85: ADDL $0xC, t68
+ 86: STL t66, (t68)
+ 87: INCEIPL $4
+
+ 0x2547CE5C: 408EFFC0 bc 4,14,0x2547CE1C
+ 88: Jc14o $0x2547CE1C
+
+
+
+. 1042 2547CE14 76
+. 81 86 00 08 7C EC 32 14 A2 A7 00 06 80 67 00 00 56 A4 23 76 56 B0 04 20 7F A4 2A 14 90 7D 00 04 92 1D 00 08 81 67 00 0C 81 47 00 08 2D 8B 00 00 81 06 00 04 7D 2A CA 14 7C E7 5A 14 7C 08 CA 14 7D 24 29 2E 90 1D 00 0C 40 8E FF C0
+==== BB 1043 (0x2547CE1C) approx BBs exec'd 0 ====
+
+ 0x2547CE1C: A2A70006 lhz r21,6(r7)
+ 0: GETL R7, t0
+ 1: ADDL $0x6, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x2547CE20: 80670000 lwz r3,0(r7)
+ 5: GETL R7, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0x2547CE24: 56A42376 rlwinm r4,r21,4,13,27
+ 9: GETL R21, t8
+ 10: ROLL $0x4, t8
+ 11: ANDL $0x7FFF0, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x2547CE28: 56B00420 rlwinm r16,r21,0,16,16
+ 14: GETL R21, t10
+ 15: ANDL $0x8000, t10
+ 16: PUTL t10, R16
+ 17: INCEIPL $4
+
+ 0x2547CE2C: 7FA42A14 add r29,r4,r5
+ 18: GETL R4, t12
+ 19: GETL R5, t14
+ 20: ADDL t12, t14
+ 21: PUTL t14, R29
+ 22: INCEIPL $4
+
+ 0x2547CE30: 907D0004 stw r3,4(r29)
+ 23: GETL R3, t16
+ 24: GETL R29, t18
+ 25: ADDL $0x4, t18
+ 26: STL t16, (t18)
+ 27: INCEIPL $4
+
+ 0x2547CE34: 921D0008 stw r16,8(r29)
+ 28: GETL R16, t20
+ 29: GETL R29, t22
+ 30: ADDL $0x8, t22
+ 31: STL t20, (t22)
+ 32: INCEIPL $4
+
+ 0x2547CE38: 8167000C lwz r11,12(r7)
+ 33: GETL R7, t24
+ 34: ADDL $0xC, t24
+ 35: LDL (t24), t26
+ 36: PUTL t26, R11
+ 37: INCEIPL $4
+
+ 0x2547CE3C: 81470008 lwz r10,8(r7)
+ 38: GETL R7, t28
+ 39: ADDL $0x8, t28
+ 40: LDL (t28), t30
+ 41: PUTL t30, R10
+ 42: INCEIPL $4
+
+ 0x2547CE40: 2D8B0000 cmpi cr3,r11,0
+ 43: GETL R11, t32
+ 44: CMP0L t32, t34 (-rSo)
+ 45: ICRFL t34, $0x3, CR
+ 46: INCEIPL $4
+
+ 0x2547CE44: 81060004 lwz r8,4(r6)
+ 47: GETL R6, t36
+ 48: ADDL $0x4, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R8
+ 51: INCEIPL $4
+
+ 0x2547CE48: 7D2ACA14 add r9,r10,r25
+ 52: GETL R10, t40
+ 53: GETL R25, t42
+ 54: ADDL t40, t42
+ 55: PUTL t42, R9
+ 56: INCEIPL $4
+
+ 0x2547CE4C: 7CE75A14 add r7,r7,r11
+ 57: GETL R7, t44
+ 58: GETL R11, t46
+ 59: ADDL t44, t46
+ 60: PUTL t46, R7
+ 61: INCEIPL $4
+
+ 0x2547CE50: 7C08CA14 add r0,r8,r25
+ 62: GETL R8, t48
+ 63: GETL R25, t50
+ 64: ADDL t48, t50
+ 65: PUTL t50, R0
+ 66: INCEIPL $4
+
+ 0x2547CE54: 7D24292E stwx r9,r4,r5
+ 67: GETL R5, t52
+ 68: GETL R4, t54
+ 69: ADDL t54, t52
+ 70: GETL R9, t56
+ 71: STL t56, (t52)
+ 72: INCEIPL $4
+
+ 0x2547CE58: 901D000C stw r0,12(r29)
+ 73: GETL R0, t58
+ 74: GETL R29, t60
+ 75: ADDL $0xC, t60
+ 76: STL t58, (t60)
+ 77: INCEIPL $4
+
+ 0x2547CE5C: 408EFFC0 bc 4,14,0x2547CE1C
+ 78: Jc14o $0x2547CE1C
+
+
+
+. 1043 2547CE1C 68
+. A2 A7 00 06 80 67 00 00 56 A4 23 76 56 B0 04 20 7F A4 2A 14 90 7D 00 04 92 1D 00 08 81 67 00 0C 81 47 00 08 2D 8B 00 00 81 06 00 04 7D 2A CA 14 7C E7 5A 14 7C 08 CA 14 7D 24 29 2E 90 1D 00 0C 40 8E FF C0
+==== BB 1044 (0x2547CE8C) approx BBs exec'd 0 ====
+
+ 0x2547CE8C: 41B2FEE0 bc 13,18,0x2547CD6C
+ 0: Js18o $0x2547CD6C
+
+
+
+. 1044 2547CE8C 4
+. 41 B2 FE E0
+==== BB 1045 (0x2547CD6C) approx BBs exec'd 0 ====
+
+ 0x2547CD6C: 7EC3B378 or r3,r22,r22
+ 0: GETL R22, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547CD70: 80A10000 lwz r5,0(r1)
+ 3: GETL R1, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R5
+ 6: INCEIPL $4
+
+ 0x2547CD74: 82C50004 lwz r22,4(r5)
+ 7: GETL R5, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R22
+ 11: INCEIPL $4
+
+ 0x2547CD78: 8185FFBC lwz r12,-68(r5)
+ 12: GETL R5, t10
+ 13: ADDL $0xFFFFFFBC, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R12
+ 16: INCEIPL $4
+
+ 0x2547CD7C: 7EC803A6 mtlr r22
+ 17: GETL R22, t14
+ 18: PUTL t14, LR
+ 19: INCEIPL $4
+
+ 0x2547CD80: 8205FFC0 lwz r16,-64(r5)
+ 20: GETL R5, t16
+ 21: ADDL $0xFFFFFFC0, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R16
+ 24: INCEIPL $4
+
+ 0x2547CD84: 8225FFC4 lwz r17,-60(r5)
+ 25: GETL R5, t20
+ 26: ADDL $0xFFFFFFC4, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R17
+ 29: INCEIPL $4
+
+ 0x2547CD88: 7D818120 mtcrf 0x18,r12
+ 30: GETL R12, t24
+ 31: ICRFL t24, $0x3, CR
+ 32: ICRFL t24, $0x4, CR
+ 33: INCEIPL $4
+
+ 0x2547CD8C: 8245FFC8 lwz r18,-56(r5)
+ 34: GETL R5, t26
+ 35: ADDL $0xFFFFFFC8, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R18
+ 38: INCEIPL $4
+
+ 0x2547CD90: 8265FFCC lwz r19,-52(r5)
+ 39: GETL R5, t30
+ 40: ADDL $0xFFFFFFCC, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R19
+ 43: INCEIPL $4
+
+ 0x2547CD94: 8285FFD0 lwz r20,-48(r5)
+ 44: GETL R5, t34
+ 45: ADDL $0xFFFFFFD0, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R20
+ 48: INCEIPL $4
+
+ 0x2547CD98: 82A5FFD4 lwz r21,-44(r5)
+ 49: GETL R5, t38
+ 50: ADDL $0xFFFFFFD4, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R21
+ 53: INCEIPL $4
+
+ 0x2547CD9C: 82C5FFD8 lwz r22,-40(r5)
+ 54: GETL R5, t42
+ 55: ADDL $0xFFFFFFD8, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R22
+ 58: INCEIPL $4
+
+ 0x2547CDA0: 82E5FFDC lwz r23,-36(r5)
+ 59: GETL R5, t46
+ 60: ADDL $0xFFFFFFDC, t46
+ 61: LDL (t46), t48
+ 62: PUTL t48, R23
+ 63: INCEIPL $4
+
+ 0x2547CDA4: 8305FFE0 lwz r24,-32(r5)
+ 64: GETL R5, t50
+ 65: ADDL $0xFFFFFFE0, t50
+ 66: LDL (t50), t52
+ 67: PUTL t52, R24
+ 68: INCEIPL $4
+
+ 0x2547CDA8: 8325FFE4 lwz r25,-28(r5)
+ 69: GETL R5, t54
+ 70: ADDL $0xFFFFFFE4, t54
+ 71: LDL (t54), t56
+ 72: PUTL t56, R25
+ 73: INCEIPL $4
+
+ 0x2547CDAC: 8345FFE8 lwz r26,-24(r5)
+ 74: GETL R5, t58
+ 75: ADDL $0xFFFFFFE8, t58
+ 76: LDL (t58), t60
+ 77: PUTL t60, R26
+ 78: INCEIPL $4
+
+ 0x2547CDB0: 8365FFEC lwz r27,-20(r5)
+ 79: GETL R5, t62
+ 80: ADDL $0xFFFFFFEC, t62
+ 81: LDL (t62), t64
+ 82: PUTL t64, R27
+ 83: INCEIPL $4
+
+ 0x2547CDB4: 8385FFF0 lwz r28,-16(r5)
+ 84: GETL R5, t66
+ 85: ADDL $0xFFFFFFF0, t66
+ 86: LDL (t66), t68
+ 87: PUTL t68, R28
+ 88: INCEIPL $4
+
+ 0x2547CDB8: 83A5FFF4 lwz r29,-12(r5)
+ 89: GETL R5, t70
+ 90: ADDL $0xFFFFFFF4, t70
+ 91: LDL (t70), t72
+ 92: PUTL t72, R29
+ 93: INCEIPL $4
+
+ 0x2547CDBC: 83C5FFF8 lwz r30,-8(r5)
+ 94: GETL R5, t74
+ 95: ADDL $0xFFFFFFF8, t74
+ 96: LDL (t74), t76
+ 97: PUTL t76, R30
+ 98: INCEIPL $4
+
+ 0x2547CDC0: 83E5FFFC lwz r31,-4(r5)
+ 99: GETL R5, t78
+ 100: ADDL $0xFFFFFFFC, t78
+ 101: LDL (t78), t80
+ 102: PUTL t80, R31
+ 103: INCEIPL $4
+
+ 0x2547CDC4: 7CA12B78 or r1,r5,r5
+ 104: GETL R5, t82
+ 105: PUTL t82, R1
+ 106: INCEIPL $4
+
+ 0x2547CDC8: 4E800020 blr
+ 107: GETL LR, t84
+ 108: JMPo-r t84 ($4)
+
+
+
+. 1045 2547CD6C 96
+. 7E C3 B3 78 80 A1 00 00 82 C5 00 04 81 85 FF BC 7E C8 03 A6 82 05 FF C0 82 25 FF C4 7D 81 81 20 82 45 FF C8 82 65 FF CC 82 85 FF D0 82 A5 FF D4 82 C5 FF D8 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
+==== BB 1046 (0x2547D034) approx BBs exec'd 0 ====
+
+ 0x2547D034: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547D038: 41BEFFCC bc 13,30,0x2547D004
+ 4: Js30o $0x2547D004
+
+
+
+. 1046 2547D034 8
+. 2F 83 00 00 41 BE FF CC
+==== BB 1047 (0x2547D004) approx BBs exec'd 0 ====
+
+ 0x2547D004: 83FF000C lwz r31,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x2547D008: 7F9CEB78 or r28,r28,r29
+ 5: GETL R28, t4
+ 6: GETL R29, t6
+ 7: ORL t6, t4
+ 8: PUTL t4, R28
+ 9: INCEIPL $4
+
+ 0x2547D00C: 2C9F0000 cmpi cr1,r31,0
+ 10: GETL R31, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x2547D010: 41860040 bc 12,6,0x2547D050
+ 14: Js06o $0x2547D050
+
+
+
+. 1047 2547D004 16
+. 83 FF 00 0C 7F 9C EB 78 2C 9F 00 00 41 86 00 40
+==== BB 1048 (0x2547CCD4) approx BBs exec'd 0 ====
+
+ 0x2547CCD4: 815D0008 lwz r10,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547CCD8: A21D0004 lhz r16,4(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x4, t4
+ 7: LDW (t4), t6
+ 8: PUTL t6, R16
+ 9: INCEIPL $4
+
+ 0x2547CCDC: 809D0000 lwz r4,0(r29)
+ 10: GETL R29, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R4
+ 13: INCEIPL $4
+
+ 0x2547CCE0: 7CAACA14 add r5,r10,r25
+ 14: GETL R10, t12
+ 15: GETL R25, t14
+ 16: ADDL t12, t14
+ 17: PUTL t14, R5
+ 18: INCEIPL $4
+
+ 0x2547CCE4: 80DC0014 lwz r6,20(r28)
+ 19: GETL R28, t16
+ 20: ADDL $0x14, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R6
+ 23: INCEIPL $4
+
+ 0x2547CCE8: 560807BC rlwinm r8,r16,0,30,30
+ 24: GETL R16, t20
+ 25: ANDL $0x2, t20
+ 26: PUTL t20, R8
+ 27: INCEIPL $4
+
+ 0x2547CCEC: 4BFFFA85 bl 0x2547C770
+ 28: MOVL $0x2547CCF0, t22
+ 29: PUTL t22, LR
+ 30: JMPo-c $0x2547C770 ($4)
+
+
+
+. 1048 2547CCD4 28
+. 81 5D 00 08 A2 1D 00 04 80 9D 00 00 7C AA CA 14 80 DC 00 14 56 08 07 BC 4B FF FA 85
+==== BB 1049 (0x2547CD34) approx BBs exec'd 0 ====
+
+ 0x2547CD34: 82BB0000 lwz r21,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R21
+ 3: INCEIPL $4
+
+ 0x2547CD38: 82F10004 lwz r23,4(r17)
+ 4: GETL R17, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R23
+ 8: INCEIPL $4
+
+ 0x2547CD3C: 7D35BA14 add r9,r21,r23
+ 9: GETL R21, t8
+ 10: GETL R23, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0x2547CD40: A2690004 lhz r19,4(r9)
+ 14: GETL R9, t12
+ 15: ADDL $0x4, t12
+ 16: LDW (t12), t14
+ 17: PUTL t14, R19
+ 18: INCEIPL $4
+
+ 0x2547CD44: 5660047E rlwinm r0,r19,0,17,31
+ 19: GETL R19, t16
+ 20: ANDL $0x7FFF, t16
+ 21: PUTL t16, R0
+ 22: INCEIPL $4
+
+ 0x2547CD48: 7C80C040 cmpl cr1,r0,r24
+ 23: GETL R0, t18
+ 24: GETL R24, t20
+ 25: CMPUL t18, t20, t22 (-rSo)
+ 26: ICRFL t22, $0x1, CR
+ 27: INCEIPL $4
+
+ 0x2547CD4C: 40850008 bc 4,5,0x2547CD54
+ 28: Jc05o $0x2547CD54
+
+
+
+. 1049 2547CD34 28
+. 82 BB 00 00 82 F1 00 04 7D 35 BA 14 A2 69 00 04 56 60 04 7E 7C 80 C0 40 40 85 00 08
+==== BB 1050 (0x2547CD54) approx BBs exec'd 0 ====
+
+ 0x2547CD54: 82890010 lwz r20,16(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R20
+ 4: INCEIPL $4
+
+ 0x2547CD58: 2F140000 cmpi cr6,r20,0
+ 5: GETL R20, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547CD5C: 7D29A214 add r9,r9,r20
+ 9: GETL R9, t8
+ 10: GETL R20, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0x2547CD60: 409AFFE0 bc 4,26,0x2547CD40
+ 14: Jc26o $0x2547CD40
+
+
+
+. 1050 2547CD54 16
+. 82 89 00 10 2F 14 00 00 7D 29 A2 14 40 9A FF E0
+==== BB 1051 (0x2547CD40) approx BBs exec'd 0 ====
+
+ 0x2547CD40: A2690004 lhz r19,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0x2547CD44: 5660047E rlwinm r0,r19,0,17,31
+ 5: GETL R19, t4
+ 6: ANDL $0x7FFF, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547CD48: 7C80C040 cmpl cr1,r0,r24
+ 9: GETL R0, t6
+ 10: GETL R24, t8
+ 11: CMPUL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x2547CD4C: 40850008 bc 4,5,0x2547CD54
+ 14: Jc05o $0x2547CD54
+
+
+
+. 1051 2547CD40 16
+. A2 69 00 04 56 60 04 7E 7C 80 C0 40 40 85 00 08
+==== BB 1052 (0x2547CE90) approx BBs exec'd 0 ====
+
+ 0x2547CE90: 80DB0000 lwz r6,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x2547CE94: 38E00000 li r7,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R7
+ 6: INCEIPL $4
+
+ 0x2547CE98: 83710004 lwz r27,4(r17)
+ 7: GETL R17, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R27
+ 11: INCEIPL $4
+
+ 0x2547CE9C: 7C66DA14 add r3,r6,r27
+ 12: GETL R6, t10
+ 13: GETL R27, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R3
+ 16: INCEIPL $4
+
+ 0x2547CEA0: A2230002 lhz r17,2(r3)
+ 17: GETL R3, t14
+ 18: ADDL $0x2, t14
+ 19: LDW (t14), t16
+ 20: PUTL t16, R17
+ 21: INCEIPL $4
+
+ 0x2547CEA4: 8103000C lwz r8,12(r3)
+ 22: GETL R3, t18
+ 23: ADDL $0xC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R8
+ 26: INCEIPL $4
+
+ 0x2547CEA8: 72290001 andi. r9,r17,0x1
+ 27: GETL R17, t22
+ 28: ANDL $0x1, t22
+ 29: PUTL t22, R9
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x0, CR
+ 32: INCEIPL $4
+
+ 0x2547CEAC: 40820028 bc 4,2,0x2547CED4
+ 33: Jc02o $0x2547CED4
+
+
+
+. 1052 2547CE90 32
+. 80 DB 00 00 38 E0 00 00 83 71 00 04 7C 66 DA 14 A2 23 00 02 81 03 00 0C 72 29 00 01 40 82 00 28
+==== BB 1053 (0x2547CED4) approx BBs exec'd 0 ====
+
+ 0x2547CED4: 82430010 lwz r18,16(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x2547CED8: 2E120000 cmpi cr4,r18,0
+ 5: GETL R18, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x2547CEDC: 7C639214 add r3,r3,r18
+ 9: GETL R3, t8
+ 10: GETL R18, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R3
+ 13: INCEIPL $4
+
+ 0x2547CEE0: 4092FFC0 bc 4,18,0x2547CEA0
+ 14: Jc18o $0x2547CEA0
+
+
+
+. 1053 2547CED4 16
+. 82 43 00 10 2E 12 00 00 7C 63 92 14 40 92 FF C0
+==== BB 1054 (0x2547CEA0) approx BBs exec'd 0 ====
+
+ 0x2547CEA0: A2230002 lhz r17,2(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x2, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R17
+ 4: INCEIPL $4
+
+ 0x2547CEA4: 8103000C lwz r8,12(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x2547CEA8: 72290001 andi. r9,r17,0x1
+ 10: GETL R17, t8
+ 11: ANDL $0x1, t8
+ 12: PUTL t8, R9
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x2547CEAC: 40820028 bc 4,2,0x2547CED4
+ 16: Jc02o $0x2547CED4
+
+
+
+. 1054 2547CEA0 16
+. A2 23 00 02 81 03 00 0C 72 29 00 01 40 82 00 28
+==== BB 1055 (0x2547CEB0) approx BBs exec'd 0 ====
+
+ 0x2547CEB0: A3430004 lhz r26,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547CEB4: 83830008 lwz r28,8(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x2547CEB8: 57572376 rlwinm r23,r26,4,13,27
+ 10: GETL R26, t8
+ 11: ROLL $0x4, t8
+ 12: ANDL $0x7FFF0, t8
+ 13: PUTL t8, R23
+ 14: INCEIPL $4
+
+ 0x2547CEBC: 7F172A14 add r24,r23,r5
+ 15: GETL R23, t10
+ 16: GETL R5, t12
+ 17: ADDL t10, t12
+ 18: PUTL t12, R24
+ 19: INCEIPL $4
+
+ 0x2547CEC0: 93980004 stw r28,4(r24)
+ 20: GETL R28, t14
+ 21: GETL R24, t16
+ 22: ADDL $0x4, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x2547CEC4: 7E88182E lwzx r20,r8,r3
+ 25: GETL R3, t18
+ 26: GETL R8, t20
+ 27: ADDL t20, t18
+ 28: LDL (t18), t22
+ 29: PUTL t22, R20
+ 30: INCEIPL $4
+
+ 0x2547CEC8: 90F8000C stw r7,12(r24)
+ 31: GETL R7, t24
+ 32: GETL R24, t26
+ 33: ADDL $0xC, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547CECC: 7E74CA14 add r19,r20,r25
+ 36: GETL R20, t28
+ 37: GETL R25, t30
+ 38: ADDL t28, t30
+ 39: PUTL t30, R19
+ 40: INCEIPL $4
+
+ 0x2547CED0: 7E77292E stwx r19,r23,r5
+ 41: GETL R5, t32
+ 42: GETL R23, t34
+ 43: ADDL t34, t32
+ 44: GETL R19, t36
+ 45: STL t36, (t32)
+ 46: INCEIPL $4
+
+ 0x2547CED4: 82430010 lwz r18,16(r3)
+ 47: GETL R3, t38
+ 48: ADDL $0x10, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R18
+ 51: INCEIPL $4
+
+ 0x2547CED8: 2E120000 cmpi cr4,r18,0
+ 52: GETL R18, t42
+ 53: CMP0L t42, t44 (-rSo)
+ 54: ICRFL t44, $0x4, CR
+ 55: INCEIPL $4
+
+ 0x2547CEDC: 7C639214 add r3,r3,r18
+ 56: GETL R3, t46
+ 57: GETL R18, t48
+ 58: ADDL t46, t48
+ 59: PUTL t48, R3
+ 60: INCEIPL $4
+
+ 0x2547CEE0: 4092FFC0 bc 4,18,0x2547CEA0
+ 61: Jc18o $0x2547CEA0
+
+
+
+. 1055 2547CEB0 52
+. A3 43 00 04 83 83 00 08 57 57 23 76 7F 17 2A 14 93 98 00 04 7E 88 18 2E 90 F8 00 0C 7E 74 CA 14 7E 77 29 2E 82 43 00 10 2E 12 00 00 7C 63 92 14 40 92 FF C0
+==== BB 1056 (0x2547CEE4) approx BBs exec'd 0 ====
+
+ 0x2547CEE4: 7EC3B378 or r3,r22,r22
+ 0: GETL R22, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547CEE8: 4BFFFE88 b 0x2547CD70
+ 3: JMPo $0x2547CD70 ($4)
+
+
+
+. 1056 2547CEE4 8
+. 7E C3 B3 78 4B FF FE 88
+==== BB 1057 (0x2547CD70) approx BBs exec'd 0 ====
+
+ 0x2547CD70: 80A10000 lwz r5,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x2547CD74: 82C50004 lwz r22,4(r5)
+ 4: GETL R5, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R22
+ 8: INCEIPL $4
+
+ 0x2547CD78: 8185FFBC lwz r12,-68(r5)
+ 9: GETL R5, t8
+ 10: ADDL $0xFFFFFFBC, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0x2547CD7C: 7EC803A6 mtlr r22
+ 14: GETL R22, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x2547CD80: 8205FFC0 lwz r16,-64(r5)
+ 17: GETL R5, t14
+ 18: ADDL $0xFFFFFFC0, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R16
+ 21: INCEIPL $4
+
+ 0x2547CD84: 8225FFC4 lwz r17,-60(r5)
+ 22: GETL R5, t18
+ 23: ADDL $0xFFFFFFC4, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R17
+ 26: INCEIPL $4
+
+ 0x2547CD88: 7D818120 mtcrf 0x18,r12
+ 27: GETL R12, t22
+ 28: ICRFL t22, $0x3, CR
+ 29: ICRFL t22, $0x4, CR
+ 30: INCEIPL $4
+
+ 0x2547CD8C: 8245FFC8 lwz r18,-56(r5)
+ 31: GETL R5, t24
+ 32: ADDL $0xFFFFFFC8, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R18
+ 35: INCEIPL $4
+
+ 0x2547CD90: 8265FFCC lwz r19,-52(r5)
+ 36: GETL R5, t28
+ 37: ADDL $0xFFFFFFCC, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R19
+ 40: INCEIPL $4
+
+ 0x2547CD94: 8285FFD0 lwz r20,-48(r5)
+ 41: GETL R5, t32
+ 42: ADDL $0xFFFFFFD0, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R20
+ 45: INCEIPL $4
+
+ 0x2547CD98: 82A5FFD4 lwz r21,-44(r5)
+ 46: GETL R5, t36
+ 47: ADDL $0xFFFFFFD4, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R21
+ 50: INCEIPL $4
+
+ 0x2547CD9C: 82C5FFD8 lwz r22,-40(r5)
+ 51: GETL R5, t40
+ 52: ADDL $0xFFFFFFD8, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R22
+ 55: INCEIPL $4
+
+ 0x2547CDA0: 82E5FFDC lwz r23,-36(r5)
+ 56: GETL R5, t44
+ 57: ADDL $0xFFFFFFDC, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R23
+ 60: INCEIPL $4
+
+ 0x2547CDA4: 8305FFE0 lwz r24,-32(r5)
+ 61: GETL R5, t48
+ 62: ADDL $0xFFFFFFE0, t48
+ 63: LDL (t48), t50
+ 64: PUTL t50, R24
+ 65: INCEIPL $4
+
+ 0x2547CDA8: 8325FFE4 lwz r25,-28(r5)
+ 66: GETL R5, t52
+ 67: ADDL $0xFFFFFFE4, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R25
+ 70: INCEIPL $4
+
+ 0x2547CDAC: 8345FFE8 lwz r26,-24(r5)
+ 71: GETL R5, t56
+ 72: ADDL $0xFFFFFFE8, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R26
+ 75: INCEIPL $4
+
+ 0x2547CDB0: 8365FFEC lwz r27,-20(r5)
+ 76: GETL R5, t60
+ 77: ADDL $0xFFFFFFEC, t60
+ 78: LDL (t60), t62
+ 79: PUTL t62, R27
+ 80: INCEIPL $4
+
+ 0x2547CDB4: 8385FFF0 lwz r28,-16(r5)
+ 81: GETL R5, t64
+ 82: ADDL $0xFFFFFFF0, t64
+ 83: LDL (t64), t66
+ 84: PUTL t66, R28
+ 85: INCEIPL $4
+
+ 0x2547CDB8: 83A5FFF4 lwz r29,-12(r5)
+ 86: GETL R5, t68
+ 87: ADDL $0xFFFFFFF4, t68
+ 88: LDL (t68), t70
+ 89: PUTL t70, R29
+ 90: INCEIPL $4
+
+ 0x2547CDBC: 83C5FFF8 lwz r30,-8(r5)
+ 91: GETL R5, t72
+ 92: ADDL $0xFFFFFFF8, t72
+ 93: LDL (t72), t74
+ 94: PUTL t74, R30
+ 95: INCEIPL $4
+
+ 0x2547CDC0: 83E5FFFC lwz r31,-4(r5)
+ 96: GETL R5, t76
+ 97: ADDL $0xFFFFFFFC, t76
+ 98: LDL (t76), t78
+ 99: PUTL t78, R31
+ 100: INCEIPL $4
+
+ 0x2547CDC4: 7CA12B78 or r1,r5,r5
+ 101: GETL R5, t80
+ 102: PUTL t80, R1
+ 103: INCEIPL $4
+
+ 0x2547CDC8: 4E800020 blr
+ 104: GETL LR, t82
+ 105: JMPo-r t82 ($4)
+
+
+
+. 1057 2547CD70 92
+. 80 A1 00 00 82 C5 00 04 81 85 FF BC 7E C8 03 A6 82 05 FF C0 82 25 FF C4 7D 81 81 20 82 45 FF C8 82 65 FF CC 82 85 FF D0 82 A5 FF D4 82 C5 FF D8 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
+==== BB 1058 (0x2547CD50) approx BBs exec'd 0 ====
+
+ 0x2547CD50: 7C180378 or r24,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R24
+ 2: INCEIPL $4
+
+ 0x2547CD54: 82890010 lwz r20,16(r9)
+ 3: GETL R9, t2
+ 4: ADDL $0x10, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R20
+ 7: INCEIPL $4
+
+ 0x2547CD58: 2F140000 cmpi cr6,r20,0
+ 8: GETL R20, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0x2547CD5C: 7D29A214 add r9,r9,r20
+ 12: GETL R9, t10
+ 13: GETL R20, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R9
+ 16: INCEIPL $4
+
+ 0x2547CD60: 409AFFE0 bc 4,26,0x2547CD40
+ 17: Jc26o $0x2547CD40
+
+
+
+. 1058 2547CD50 20
+. 7C 18 03 78 82 89 00 10 2F 14 00 00 7D 29 A2 14 40 9A FF E0
+==== BB 1059 (0x2547D050) approx BBs exec'd 0 ====
+
+ 0x2547D050: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547D054: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547D058: 83410008 lwz r26,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x2547D05C: 8361000C lwz r27,12(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0xC, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R27
+ 17: INCEIPL $4
+
+ 0x2547D060: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547D064: 83810010 lwz r28,16(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x10, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R28
+ 25: INCEIPL $4
+
+ 0x2547D068: 83A10014 lwz r29,20(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R29
+ 30: INCEIPL $4
+
+ 0x2547D06C: 83C10018 lwz r30,24(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x18, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R30
+ 35: INCEIPL $4
+
+ 0x2547D070: 83E1001C lwz r31,28(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R31
+ 40: INCEIPL $4
+
+ 0x2547D074: 38210020 addi r1,r1,32
+ 41: GETL R1, t32
+ 42: ADDL $0x20, t32
+ 43: PUTL t32, R1
+ 44: INCEIPL $4
+
+ 0x2547D078: 4E800020 blr
+ 45: GETL LR, t34
+ 46: JMPo-r t34 ($4)
+
+
+
+. 1059 2547D050 44
+. 80 81 00 24 7F 83 E3 78 83 41 00 08 83 61 00 0C 7C 88 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1060 (0x2547180C) approx BBs exec'd 0 ====
+
+ 0x2547180C: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25471810: 419E0014 bc 12,30,0x25471824
+ 4: Js30o $0x25471824
+
+
+
+. 1060 2547180C 8
+. 2F 83 00 00 41 9E 00 14
+==== BB 1061 (0x25471824) approx BBs exec'd 0 ====
+
+ 0x25471824: 80610024 lwz r3,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25471828: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547182C: 83C10018 lwz r30,24(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R30
+ 14: INCEIPL $4
+
+ 0x25471830: 7C6803A6 mtlr r3
+ 15: GETL R3, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x25471834: 83E1001C lwz r31,28(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x1C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R31
+ 22: INCEIPL $4
+
+ 0x25471838: 38210020 addi r1,r1,32
+ 23: GETL R1, t18
+ 24: ADDL $0x20, t18
+ 25: PUTL t18, R1
+ 26: INCEIPL $4
+
+ 0x2547183C: 4E800020 blr
+ 27: GETL LR, t20
+ 28: JMPo-r t20 ($4)
+
+
+
+. 1061 25471824 28
+. 80 61 00 24 83 A1 00 14 83 C1 00 18 7C 68 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1062 (0x2547B70C) approx BBs exec'd 0 ====
+
+ 0x2547B70C: 935D0000 stw r26,0(r29)
+ 0: GETL R26, t0
+ 1: GETL R29, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x2547B710: 80010034 lwz r0,52(r1)
+ 4: GETL R1, t4
+ 5: ADDL $0x34, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x2547B714: 937C0000 stw r27,0(r28)
+ 9: GETL R27, t8
+ 10: GETL R28, t10
+ 11: STL t8, (t10)
+ 12: INCEIPL $4
+
+ 0x2547B718: 82E1000C lwz r23,12(r1)
+ 13: GETL R1, t12
+ 14: ADDL $0xC, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R23
+ 17: INCEIPL $4
+
+ 0x2547B71C: 7C0803A6 mtlr r0
+ 18: GETL R0, t16
+ 19: PUTL t16, LR
+ 20: INCEIPL $4
+
+ 0x2547B720: 83210014 lwz r25,20(r1)
+ 21: GETL R1, t18
+ 22: ADDL $0x14, t18
+ 23: LDL (t18), t20
+ 24: PUTL t20, R25
+ 25: INCEIPL $4
+
+ 0x2547B724: 83410018 lwz r26,24(r1)
+ 26: GETL R1, t22
+ 27: ADDL $0x18, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R26
+ 30: INCEIPL $4
+
+ 0x2547B728: 8361001C lwz r27,28(r1)
+ 31: GETL R1, t26
+ 32: ADDL $0x1C, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R27
+ 35: INCEIPL $4
+
+ 0x2547B72C: 83810020 lwz r28,32(r1)
+ 36: GETL R1, t30
+ 37: ADDL $0x20, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R28
+ 40: INCEIPL $4
+
+ 0x2547B730: 83A10024 lwz r29,36(r1)
+ 41: GETL R1, t34
+ 42: ADDL $0x24, t34
+ 43: LDL (t34), t36
+ 44: PUTL t36, R29
+ 45: INCEIPL $4
+
+ 0x2547B734: 83C10028 lwz r30,40(r1)
+ 46: GETL R1, t38
+ 47: ADDL $0x28, t38
+ 48: LDL (t38), t40
+ 49: PUTL t40, R30
+ 50: INCEIPL $4
+
+ 0x2547B738: 38210030 addi r1,r1,48
+ 51: GETL R1, t42
+ 52: ADDL $0x30, t42
+ 53: PUTL t42, R1
+ 54: INCEIPL $4
+
+ 0x2547B73C: 4E800020 blr
+ 55: GETL LR, t44
+ 56: JMPo-r t44 ($4)
+
+
+
+. 1062 2547B70C 52
+. 93 5D 00 00 80 01 00 34 93 7C 00 00 82 E1 00 0C 7C 08 03 A6 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 38 21 00 30 4E 80 00 20
+==== BB 1063 (0x25472900) approx BBs exec'd 0 ====
+
+ 0x25472900: 836E03D8 lwz r27,984(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x3D8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x25472904: 2E1B0000 cmpi cr4,r27,0
+ 5: GETL R27, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x25472908: 40920AEC bc 4,18,0x254733F4
+ 9: Jc18o $0x254733F4
+
+
+
+. 1063 25472900 12
+. 83 6E 03 D8 2E 1B 00 00 40 92 0A EC
+==== BB 1064 (0x2547290C) approx BBs exec'd 0 ====
+
+ 0x2547290C: 816E0408 lwz r11,1032(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x408, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25472910: 3ACB003F addi r22,r11,63
+ 5: GETL R11, t4
+ 6: ADDL $0x3F, t4
+ 7: PUTL t4, R22
+ 8: INCEIPL $4
+
+ 0x25472914: 916E0414 stw r11,1044(r14)
+ 9: GETL R11, t6
+ 10: GETL R14, t8
+ 11: ADDL $0x414, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x25472918: 56D91838 rlwinm r25,r22,3,0,28
+ 14: GETL R22, t10
+ 15: SHLL $0x3, t10
+ 16: PUTL t10, R25
+ 17: INCEIPL $4
+
+ 0x2547291C: 38790008 addi r3,r25,8
+ 18: GETL R25, t12
+ 19: ADDL $0x8, t12
+ 20: PUTL t12, R3
+ 21: INCEIPL $4
+
+ 0x25472920: 48025105 bl 0x25497A24
+ 22: MOVL $0x25472924, t14
+ 23: PUTL t14, LR
+ 24: JMPo-c $0x25497A24 ($4)
+
+
+
+. 1064 2547290C 24
+. 81 6E 04 08 3A CB 00 3F 91 6E 04 14 56 D9 18 38 38 79 00 08 48 02 51 05
+==== BB 1065 (0x25472924) approx BBs exec'd 0 ====
+
+ 0x25472924: 7F25CB78 or r5,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x25472928: 7C6C1B78 or r12,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R12
+ 5: INCEIPL $4
+
+ 0x2547292C: 38800000 li r4,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x25472930: 38630008 addi r3,r3,8
+ 9: GETL R3, t6
+ 10: ADDL $0x8, t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0x25472934: 918E0410 stw r12,1040(r14)
+ 13: GETL R12, t8
+ 14: GETL R14, t10
+ 15: ADDL $0x410, t10
+ 16: STL t8, (t10)
+ 17: INCEIPL $4
+
+ 0x25472938: 48010E0D bl 0x25483744
+ 18: MOVL $0x2547293C, t12
+ 19: PUTL t12, LR
+ 20: JMPo-c $0x25483744 ($4)
+
+
+
+. 1065 25472924 24
+. 7F 25 CB 78 7C 6C 1B 78 38 80 00 00 38 63 00 08 91 8E 04 10 48 01 0E 0D
+==== BB 1066 (0x254837BC) approx BBs exec'd 0 ====
+
+ 0x254837BC: 9088FFFC stw r4,-4(r8)
+ 0: GETL R4, t0
+ 1: GETL R8, t2
+ 2: ADDL $0xFFFFFFFC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254837C0: 9088FFF8 stw r4,-8(r8)
+ 5: GETL R4, t4
+ 6: GETL R8, t6
+ 7: ADDL $0xFFFFFFF8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x254837C4: 9088FFF4 stw r4,-12(r8)
+ 10: GETL R4, t8
+ 11: GETL R8, t10
+ 12: ADDL $0xFFFFFFF4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x254837C8: 9488FFF0 stwu r4,-16(r8)
+ 15: GETL R4, t12
+ 16: GETL R8, t14
+ 17: ADDL $0xFFFFFFF0, t14
+ 18: PUTL t14, R8
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x254837CC: 409D0008 bc 4,29,0x254837D4
+ 21: Jc29o $0x254837D4
+
+
+
+. 1066 254837BC 20
+. 90 88 FF FC 90 88 FF F8 90 88 FF F4 94 88 FF F0 40 9D 00 08
+==== BB 1067 (0x25483934) approx BBs exec'd 0 ====
+
+ 0x25483934: 4084002C bc 4,4,0x25483960
+ 0: Jc04o $0x25483960
+
+
+
+. 1067 25483934 4
+. 40 84 00 2C
+==== BB 1068 (0x25483938) approx BBs exec'd 0 ====
+
+ 0x25483938: 4C9C0020 bclr 4,28
+ 0: GETL LR, t0
+ 1: Jc28o-r t0
+
+
+
+. 1068 25483938 4
+. 4C 9C 00 20
+==== BB 1069 (0x2548393C) approx BBs exec'd 0 ====
+
+ 0x2548393C: 9086FFFC stw r4,-4(r6)
+ 0: GETL R4, t0
+ 1: GETL R6, t2
+ 2: ADDL $0xFFFFFFFC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25483940: 9086FFF8 stw r4,-8(r6)
+ 5: GETL R4, t4
+ 6: GETL R6, t6
+ 7: ADDL $0xFFFFFFF8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25483944: 4E800020 blr
+ 10: GETL LR, t8
+ 11: JMPo-r t8 ($4)
+
+
+
+. 1069 2548393C 12
+. 90 86 FF FC 90 86 FF F8 4E 80 00 20
+==== BB 1070 (0x2547293C) approx BBs exec'd 0 ====
+
+ 0x2547293C: 80CE0410 lwz r6,1040(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x410, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x25472940: 38000000 li r0,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x25472944: 7E89A378 or r9,r20,r20
+ 8: GETL R20, t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0x25472948: 90060004 stw r0,4(r6)
+ 11: GETL R0, t8
+ 12: GETL R6, t10
+ 13: ADDL $0x4, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x2547294C: 92C60000 stw r22,0(r6)
+ 16: GETL R22, t12
+ 17: GETL R6, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25472950: 418E0024 bc 12,14,0x25472974
+ 20: Js14o $0x25472974
+
+
+
+. 1070 2547293C 24
+. 80 CE 04 10 38 00 00 00 7E 89 A3 78 90 06 00 04 92 C6 00 00 41 8E 00 24
+==== BB 1071 (0x25472954) approx BBs exec'd 0 ====
+
+ 0x25472954: 38630004 addi r3,r3,4
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x25472958: 83890220 lwz r28,544(r9)
+ 4: GETL R9, t2
+ 5: ADDL $0x220, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x2547295C: 2F1C0000 cmpi cr6,r28,0
+ 9: GETL R28, t6
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x6, CR
+ 12: INCEIPL $4
+
+ 0x25472960: 419A0008 bc 12,26,0x25472968
+ 13: Js26o $0x25472968
+
+
+
+. 1071 25472954 16
+. 38 63 00 04 83 89 02 20 2F 1C 00 00 41 9A 00 08
+==== BB 1072 (0x25472968) approx BBs exec'd 0 ====
+
+ 0x25472968: 8129000C lwz r9,12(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547296C: 2C090000 cmpi cr0,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25472970: 4082FFE8 bc 4,2,0x25472958
+ 9: Jc02o $0x25472958
+
+
+
+. 1072 25472968 12
+. 81 29 00 0C 2C 09 00 00 40 82 FF E8
+==== BB 1073 (0x25472958) approx BBs exec'd 0 ====
+
+ 0x25472958: 83890220 lwz r28,544(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x220, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x2547295C: 2F1C0000 cmpi cr6,r28,0
+ 5: GETL R28, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25472960: 419A0008 bc 12,26,0x25472968
+ 9: Js26o $0x25472968
+
+
+
+. 1073 25472958 12
+. 83 89 02 20 2F 1C 00 00 41 9A 00 08
+==== BB 1074 (0x25472964) approx BBs exec'd 0 ====
+
+ 0x25472964: 95230008 stwu r9,8(r3)
+ 0: GETL R9, t0
+ 1: GETL R3, t2
+ 2: ADDL $0x8, t2
+ 3: PUTL t2, R3
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25472968: 8129000C lwz r9,12(r9)
+ 6: GETL R9, t4
+ 7: ADDL $0xC, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0x2547296C: 2C090000 cmpi cr0,r9,0
+ 11: GETL R9, t8
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25472970: 4082FFE8 bc 4,2,0x25472958
+ 15: Jc02o $0x25472958
+
+
+
+. 1074 25472964 16
+. 95 23 00 08 81 29 00 0C 2C 09 00 00 40 82 FF E8
+==== BB 1075 (0x25472974) approx BBs exec'd 0 ====
+
+ 0x25472974: 4800B359 bl 0x2547DCCC
+ 0: MOVL $0x25472978, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547DCCC ($4)
+
+
+
+. 1075 25472974 4
+. 48 00 B3 59
+==== BB 1076 _dl_determine_tlsoffset(0x2547DCCC) approx BBs exec'd 0 ====
+
+ 0x2547DCCC: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547DCD0: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x2547DCD4: 4801932D bl 0x25497000
+ 9: MOVL $0x2547DCD8, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 1076 2547DCCC 12
+. 94 21 FF E0 7D 88 02 A6 48 01 93 2D
+==== BB 1077 (0x2547DCD8) approx BBs exec'd 0 ====
+
+ 0x2547DCD8: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547DCDC: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547DCE0: 9361000C stw r27,12(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547DCE4: 93810010 stw r28,16(r1)
+ 13: GETL R28, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x10, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547DCE8: 38600000 li r3,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R3
+ 20: INCEIPL $4
+
+ 0x2547DCEC: 93A10014 stw r29,20(r1)
+ 21: GETL R29, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547DCF0: 7D8803A6 mtlr r12
+ 26: GETL R12, t20
+ 27: PUTL t20, LR
+ 28: INCEIPL $4
+
+ 0x2547DCF4: 837E04C8 lwz r27,1224(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x4C8, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R27
+ 33: INCEIPL $4
+
+ 0x2547DCF8: 3B800020 li r28,32
+ 34: MOVL $0x20, t26
+ 35: PUTL t26, R28
+ 36: INCEIPL $4
+
+ 0x2547DCFC: 93E1001C stw r31,28(r1)
+ 37: GETL R31, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x1C, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0x2547DD00: 3BA00000 li r29,0
+ 42: MOVL $0x0, t32
+ 43: PUTL t32, R29
+ 44: INCEIPL $4
+
+ 0x2547DD04: 813B0410 lwz r9,1040(r27)
+ 45: GETL R27, t34
+ 46: ADDL $0x410, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R9
+ 49: INCEIPL $4
+
+ 0x2547DD08: 3BE00000 li r31,0
+ 50: MOVL $0x0, t38
+ 51: PUTL t38, R31
+ 52: INCEIPL $4
+
+ 0x2547DD0C: 39800001 li r12,1
+ 53: MOVL $0x1, t40
+ 54: PUTL t40, R12
+ 55: INCEIPL $4
+
+ 0x2547DD10: 38A90008 addi r5,r9,8
+ 56: GETL R9, t42
+ 57: ADDL $0x8, t42
+ 58: PUTL t42, R5
+ 59: INCEIPL $4
+
+ 0x2547DD14: 8005000C lwz r0,12(r5)
+ 60: GETL R5, t44
+ 61: ADDL $0xC, t44
+ 62: LDL (t44), t46
+ 63: PUTL t46, R0
+ 64: INCEIPL $4
+
+ 0x2547DD18: 2F800000 cmpi cr7,r0,0
+ 65: GETL R0, t48
+ 66: CMP0L t48, t50 (-rSo)
+ 67: ICRFL t50, $0x7, CR
+ 68: INCEIPL $4
+
+ 0x2547DD1C: 419E0104 bc 12,30,0x2547DE20
+ 69: Js30o $0x2547DE20
+
+
+
+. 1077 2547DCD8 72
+. 93 C1 00 18 7F C8 02 A6 93 61 00 0C 93 81 00 10 38 60 00 00 93 A1 00 14 7D 88 03 A6 83 7E 04 C8 3B 80 00 20 93 E1 00 1C 3B A0 00 00 81 3B 04 10 3B E0 00 00 39 80 00 01 38 A9 00 08 80 05 00 0C 2F 80 00 00 41 9E 01 04
+==== BB 1078 (0x2547DD20) approx BBs exec'd 0 ====
+
+ 0x2547DD20: 38C00008 li r6,8
+ 0: MOVL $0x8, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x2547DD24: 48000058 b 0x2547DD7C
+ 3: JMPo $0x2547DD7C ($4)
+
+
+
+. 1078 2547DD20 8
+. 38 C0 00 08 48 00 00 58
+==== BB 1079 (0x2547DD7C) approx BBs exec'd 0 ====
+
+ 0x2547DD7C: 7D662A14 add r11,r6,r5
+ 0: GETL R6, t0
+ 1: GETL R5, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547DD80: 814B0004 lwz r10,4(r11)
+ 5: GETL R11, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x2547DD84: 816A0224 lwz r11,548(r10)
+ 10: GETL R10, t8
+ 11: ADDL $0x224, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547DD88: 810A0228 lwz r8,552(r10)
+ 15: GETL R10, t12
+ 16: ADDL $0x228, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R8
+ 19: INCEIPL $4
+
+ 0x2547DD8C: 7C1C5840 cmpl cr0,r28,r11
+ 20: GETL R28, t16
+ 21: GETL R11, t18
+ 22: CMPUL t16, t18, t20 (-rSo)
+ 23: ICRFL t20, $0x0, CR
+ 24: INCEIPL $4
+
+ 0x2547DD90: 388BFFFF addi r4,r11,-1
+ 25: GETL R11, t22
+ 26: ADDL $0xFFFFFFFF, t22
+ 27: PUTL t22, R4
+ 28: INCEIPL $4
+
+ 0x2547DD94: 7CE800D0 neg r7,r8
+ 29: GETL R8, t24
+ 30: NEGL t24
+ 31: PUTL t24, R7
+ 32: INCEIPL $4
+
+ 0x2547DD98: 7CE82038 and r8,r7,r4
+ 33: GETL R7, t26
+ 34: GETL R4, t28
+ 35: ANDL t26, t28
+ 36: PUTL t28, R8
+ 37: INCEIPL $4
+
+ 0x2547DD9C: 40800008 bc 4,0,0x2547DDA4
+ 38: Jc00o $0x2547DDA4
+
+
+
+. 1079 2547DD7C 36
+. 7D 66 2A 14 81 4B 00 04 81 6A 02 24 81 0A 02 28 7C 1C 58 40 38 8B FF FF 7C E8 00 D0 7C E8 20 38 40 80 00 08
+==== BB 1080 (0x2547DDA4) approx BBs exec'd 0 ====
+
+ 0x2547DDA4: 80EA0220 lwz r7,544(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x220, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547DDA8: 7C9FE850 subf r4,r31,r29
+ 5: GETL R31, t4
+ 6: GETL R29, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x2547DDAC: 7C872040 cmpl cr1,r7,r4
+ 10: GETL R7, t8
+ 11: GETL R4, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x2547DDB0: 40A5FF78 bc 5,5,0x2547DD28
+ 15: Jc05o $0x2547DD28
+
+
+
+. 1080 2547DDA4 16
+. 80 EA 02 20 7C 9F E8 50 7C 87 20 40 40 A5 FF 78
+==== BB 1081 (0x2547DDB4) approx BBs exec'd 0 ====
+
+ 0x2547DDB4: 7D662A14 add r11,r6,r5
+ 0: GETL R6, t0
+ 1: GETL R5, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547DDB8: 814B0004 lwz r10,4(r11)
+ 5: GETL R11, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x2547DDBC: 816A0224 lwz r11,548(r10)
+ 10: GETL R10, t8
+ 11: ADDL $0x224, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547DDC0: 7CCB1A14 add r6,r11,r3
+ 15: GETL R11, t12
+ 16: GETL R3, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R6
+ 19: INCEIPL $4
+
+ 0x2547DDC4: 3806FFFF addi r0,r6,-1
+ 20: GETL R6, t16
+ 21: ADDL $0xFFFFFFFF, t16
+ 22: PUTL t16, R0
+ 23: INCEIPL $4
+
+ 0x2547DDC8: 7D205B96 divwu r9, r0, r11
+ 24: GETL R0, t20
+ 25: GETL R11, t18
+ 26: UDIVL t18, t20
+ 27: PUTL t20, R9
+ 28: INCEIPL $4
+
+ 0x2547DDCC: 7D2959D6 mullw r9,r9,r11
+ 29: GETL R9, t22
+ 30: GETL R11, t24
+ 31: MULL t22, t24
+ 32: PUTL t24, R9
+ 33: INCEIPL $4
+
+ 0x2547DDD0: 7CE34850 subf r7,r3,r9
+ 34: GETL R3, t26
+ 35: GETL R9, t28
+ 36: SUBL t26, t28
+ 37: PUTL t28, R7
+ 38: INCEIPL $4
+
+ 0x2547DDD4: 7C074040 cmpl cr0,r7,r8
+ 39: GETL R7, t30
+ 40: GETL R8, t32
+ 41: CMPUL t30, t32, t34 (-rSo)
+ 42: ICRFL t34, $0x0, CR
+ 43: INCEIPL $4
+
+ 0x2547DDD8: 40800008 bc 4,0,0x2547DDE0
+ 44: Jc00o $0x2547DDE0
+
+
+
+. 1081 2547DDB4 40
+. 7D 66 2A 14 81 4B 00 04 81 6A 02 24 7C CB 1A 14 38 06 FF FF 7D 20 5B 96 7D 29 59 D6 7C E3 48 50 7C 07 40 40 40 80 00 08
+==== BB 1082 (0x2547DDE0) approx BBs exec'd 0 ====
+
+ 0x2547DDE0: 7D684850 subf r11,r8,r9
+ 0: GETL R8, t0
+ 1: GETL R9, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547DDE4: 7CE35850 subf r7,r3,r11
+ 5: GETL R3, t4
+ 6: GETL R11, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0x2547DDE8: 916A022C stw r11,556(r10)
+ 10: GETL R11, t8
+ 11: GETL R10, t10
+ 12: ADDL $0x22C, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x2547DDEC: 7C872040 cmpl cr1,r7,r4
+ 15: GETL R7, t12
+ 16: GETL R4, t14
+ 17: CMPUL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x1, CR
+ 19: INCEIPL $4
+
+ 0x2547DDF0: 4085000C bc 4,5,0x2547DDFC
+ 20: Jc05o $0x2547DDFC
+
+
+
+. 1082 2547DDE0 20
+. 7D 68 48 50 7C E3 58 50 91 6A 02 2C 7C 87 20 40 40 85 00 0C
+==== BB 1083 (0x2547DDFC) approx BBs exec'd 0 ====
+
+ 0x2547DDFC: 806A0220 lwz r3,544(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x220, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547DE00: 398C0001 addi r12,r12,1
+ 5: GETL R12, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x2547DE04: 55861838 rlwinm r6,r12,3,0,28
+ 9: GETL R12, t6
+ 10: SHLL $0x3, t6
+ 11: PUTL t6, R6
+ 12: INCEIPL $4
+
+ 0x2547DE08: 7D434A14 add r10,r3,r9
+ 13: GETL R3, t8
+ 14: GETL R9, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R10
+ 17: INCEIPL $4
+
+ 0x2547DE0C: 7C685050 subf r3,r8,r10
+ 18: GETL R8, t12
+ 19: GETL R10, t14
+ 20: SUBL t12, t14
+ 21: PUTL t14, R3
+ 22: INCEIPL $4
+
+ 0x2547DE10: 7D062A14 add r8,r6,r5
+ 23: GETL R6, t16
+ 24: GETL R5, t18
+ 25: ADDL t16, t18
+ 26: PUTL t18, R8
+ 27: INCEIPL $4
+
+ 0x2547DE14: 80880004 lwz r4,4(r8)
+ 28: GETL R8, t20
+ 29: ADDL $0x4, t20
+ 30: LDL (t20), t22
+ 31: PUTL t22, R4
+ 32: INCEIPL $4
+
+ 0x2547DE18: 2F040000 cmpi cr6,r4,0
+ 33: GETL R4, t24
+ 34: CMP0L t24, t26 (-rSo)
+ 35: ICRFL t26, $0x6, CR
+ 36: INCEIPL $4
+
+ 0x2547DE1C: 409AFF60 bc 4,26,0x2547DD7C
+ 37: Jc26o $0x2547DD7C
+
+
+
+. 1083 2547DDFC 36
+. 80 6A 02 20 39 8C 00 01 55 86 18 38 7D 43 4A 14 7C 68 50 50 7D 06 2A 14 80 88 00 04 2F 04 00 00 40 9A FF 60
+==== BB 1084 (0x2547DE20) approx BBs exec'd 0 ====
+
+ 0x2547DE20: 3BA3069F addi r29,r3,1695
+ 0: GETL R3, t0
+ 1: ADDL $0x69F, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x2547DE24: 939B0420 stw r28,1056(r27)
+ 4: GETL R28, t2
+ 5: GETL R27, t4
+ 6: ADDL $0x420, t4
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547DE28: 57A50034 rlwinm r5,r29,0,0,26
+ 9: GETL R29, t6
+ 10: ANDL $0xFFFFFFE0, t6
+ 11: PUTL t6, R5
+ 12: INCEIPL $4
+
+ 0x2547DE2C: 907B041C stw r3,1052(r27)
+ 13: GETL R3, t8
+ 14: GETL R27, t10
+ 15: ADDL $0x41C, t10
+ 16: STL t8, (t10)
+ 17: INCEIPL $4
+
+ 0x2547DE30: 90BB0418 stw r5,1048(r27)
+ 18: GETL R5, t12
+ 19: GETL R27, t14
+ 20: ADDL $0x418, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0x2547DE34: 83810010 lwz r28,16(r1)
+ 23: GETL R1, t16
+ 24: ADDL $0x10, t16
+ 25: LDL (t16), t18
+ 26: PUTL t18, R28
+ 27: INCEIPL $4
+
+ 0x2547DE38: 8361000C lwz r27,12(r1)
+ 28: GETL R1, t20
+ 29: ADDL $0xC, t20
+ 30: LDL (t20), t22
+ 31: PUTL t22, R27
+ 32: INCEIPL $4
+
+ 0x2547DE3C: 83A10014 lwz r29,20(r1)
+ 33: GETL R1, t24
+ 34: ADDL $0x14, t24
+ 35: LDL (t24), t26
+ 36: PUTL t26, R29
+ 37: INCEIPL $4
+
+ 0x2547DE40: 83C10018 lwz r30,24(r1)
+ 38: GETL R1, t28
+ 39: ADDL $0x18, t28
+ 40: LDL (t28), t30
+ 41: PUTL t30, R30
+ 42: INCEIPL $4
+
+ 0x2547DE44: 83E1001C lwz r31,28(r1)
+ 43: GETL R1, t32
+ 44: ADDL $0x1C, t32
+ 45: LDL (t32), t34
+ 46: PUTL t34, R31
+ 47: INCEIPL $4
+
+ 0x2547DE48: 38210020 addi r1,r1,32
+ 48: GETL R1, t36
+ 49: ADDL $0x20, t36
+ 50: PUTL t36, R1
+ 51: INCEIPL $4
+
+ 0x2547DE4C: 4E800020 blr
+ 52: GETL LR, t38
+ 53: JMPo-r t38 ($4)
+
+
+
+. 1084 2547DE20 48
+. 3B A3 06 9F 93 9B 04 20 57 A5 00 34 90 7B 04 1C 90 BB 04 18 83 81 00 10 83 61 00 0C 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1085 (0x25472978) approx BBs exec'd 0 ====
+
+ 0x25472978: 4800B57D bl 0x2547DEF4
+ 0: MOVL $0x2547297C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547DEF4 ($4)
+
+
+
+. 1085 25472978 4
+. 48 00 B5 7D
+==== BB 1086 _dl_allocate_tls_storage(0x2547DEF4) approx BBs exec'd 0 ====
+
+ 0x2547DEF4: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547DEF8: 7C6802A6 mflr r3
+ 6: GETL LR, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x2547DEFC: 48019105 bl 0x25497000
+ 9: MOVL $0x2547DF00, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 1086 2547DEF4 12
+. 94 21 FF E0 7C 68 02 A6 48 01 91 05
+==== BB 1087 (0x2547DF00) approx BBs exec'd 0 ====
+
+ 0x2547DF00: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547DF04: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547DF08: 93810010 stw r28,16(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547DF0C: 90610024 stw r3,36(r1)
+ 13: GETL R3, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547DF10: 93A10014 stw r29,20(r1)
+ 18: GETL R29, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x2547DF14: 839E04C8 lwz r28,1224(r30)
+ 23: GETL R30, t18
+ 24: ADDL $0x4C8, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R28
+ 27: INCEIPL $4
+
+ 0x2547DF18: 9361000C stw r27,12(r1)
+ 28: GETL R27, t22
+ 29: GETL R1, t24
+ 30: ADDL $0xC, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0x2547DF1C: 807C0420 lwz r3,1056(r28)
+ 33: GETL R28, t26
+ 34: ADDL $0x420, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R3
+ 37: INCEIPL $4
+
+ 0x2547DF20: 809C0418 lwz r4,1048(r28)
+ 38: GETL R28, t30
+ 39: ADDL $0x418, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R4
+ 42: INCEIPL $4
+
+ 0x2547DF24: 38A3046F addi r5,r3,1135
+ 43: GETL R3, t34
+ 44: ADDL $0x46F, t34
+ 45: PUTL t34, R5
+ 46: INCEIPL $4
+
+ 0x2547DF28: 7D2300D0 neg r9,r3
+ 47: GETL R3, t36
+ 48: NEGL t36
+ 49: PUTL t36, R9
+ 50: INCEIPL $4
+
+ 0x2547DF2C: 7CA04838 and r0,r5,r9
+ 51: GETL R5, t38
+ 52: GETL R9, t40
+ 53: ANDL t38, t40
+ 54: PUTL t40, R0
+ 55: INCEIPL $4
+
+ 0x2547DF30: 93E1001C stw r31,28(r1)
+ 56: GETL R31, t42
+ 57: GETL R1, t44
+ 58: ADDL $0x1C, t44
+ 59: STL t42, (t44)
+ 60: INCEIPL $4
+
+ 0x2547DF34: 7FA40214 add r29,r4,r0
+ 61: GETL R4, t46
+ 62: GETL R0, t48
+ 63: ADDL t46, t48
+ 64: PUTL t48, R29
+ 65: INCEIPL $4
+
+ 0x2547DF38: 7FA4EB78 or r4,r29,r29
+ 66: GETL R29, t50
+ 67: PUTL t50, R4
+ 68: INCEIPL $4
+
+ 0x2547DF3C: 48019AE1 bl 0x25497A1C
+ 69: MOVL $0x2547DF40, t52
+ 70: PUTL t52, LR
+ 71: JMPo-c $0x25497A1C ($4)
+
+
+
+. 1087 2547DF00 64
+. 93 C1 00 18 7F C8 02 A6 93 81 00 10 90 61 00 24 93 A1 00 14 83 9E 04 C8 93 61 00 0C 80 7C 04 20 80 9C 04 18 38 A3 04 6F 7D 23 00 D0 7C A0 48 38 93 E1 00 1C 7F A4 02 14 7F A4 EB 78 48 01 9A E1
+==== BB 1088 (0x2547DF40) approx BBs exec'd 0 ====
+
+ 0x2547DF40: 38A00470 li r5,1136
+ 0: MOVL $0x470, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547DF44: 7C7F1B79 or. r31,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R31
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x2547DF48: 38800000 li r4,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x2547DF4C: 7FFBFB78 or r27,r31,r31
+ 11: GETL R31, t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0x2547DF50: 7C1FEA14 add r0,r31,r29
+ 14: GETL R31, t10
+ 15: GETL R29, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R0
+ 18: INCEIPL $4
+
+ 0x2547DF54: 4182004C bc 12,2,0x2547DFA0
+ 19: Js02o $0x2547DFA0
+
+
+
+. 1088 2547DF40 24
+. 38 A0 04 70 7C 7F 1B 79 38 80 00 00 7F FB FB 78 7C 1F EA 14 41 82 00 4C
+==== BB 1089 (0x2547DF58) approx BBs exec'd 0 ====
+
+ 0x2547DF58: 80FC0418 lwz r7,1048(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x418, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547DF5C: 7FA70050 subf r29,r7,r0
+ 5: GETL R7, t4
+ 6: GETL R0, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547DF60: 387DFB90 addi r3,r29,-1136
+ 10: GETL R29, t8
+ 11: ADDL $0xFFFFFB90, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0x2547DF64: 480057E1 bl 0x25483744
+ 14: MOVL $0x2547DF68, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x25483744 ($4)
+
+
+
+. 1089 2547DF58 16
+. 80 FC 04 18 7F A7 00 50 38 7D FB 90 48 00 57 E1
+==== BB 1090 (0x2547DF68) approx BBs exec'd 0 ====
+
+ 0x2547DF68: 80DC0408 lwz r6,1032(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x408, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547DF6C: 38800004 li r4,4
+ 5: MOVL $0x4, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x2547DF70: 38660010 addi r3,r6,16
+ 8: GETL R6, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x2547DF74: 3BE6000E addi r31,r6,14
+ 12: GETL R6, t8
+ 13: ADDL $0xE, t8
+ 14: PUTL t8, R31
+ 15: INCEIPL $4
+
+ 0x2547DF78: 48019AB5 bl 0x25497A2C
+ 16: MOVL $0x2547DF7C, t10
+ 17: PUTL t10, LR
+ 18: JMPo-c $0x25497A2C ($4)
+
+
+
+. 1090 2547DF68 20
+. 80 DC 04 08 38 80 00 04 38 66 00 10 3B E6 00 0E 48 01 9A B5
+==== BB 1091 (0x2547DF7C) approx BBs exec'd 0 ====
+
+ 0x2547DF7C: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547DF80: 38030004 addi r0,r3,4
+ 4: GETL R3, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x2547DF84: 41860044 bc 12,6,0x2547DFC8
+ 8: Js06o $0x2547DFC8
+
+
+
+. 1091 2547DF7C 12
+. 2C 83 00 00 38 03 00 04 41 86 00 44
+==== BB 1092 (0x2547DF88) approx BBs exec'd 0 ====
+
+ 0x2547DF88: 93E30000 stw r31,0(r3)
+ 0: GETL R31, t0
+ 1: GETL R3, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x2547DF8C: 901DFFFC stw r0,-4(r29)
+ 4: GETL R0, t4
+ 5: GETL R29, t6
+ 6: ADDL $0xFFFFFFFC, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547DF90: 2F9D0000 cmpi cr7,r29,0
+ 9: GETL R29, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x2547DF94: 7FBFEB78 or r31,r29,r29
+ 13: GETL R29, t12
+ 14: PUTL t12, R31
+ 15: INCEIPL $4
+
+ 0x2547DF98: 7F63DB78 or r3,r27,r27
+ 16: GETL R27, t14
+ 17: PUTL t14, R3
+ 18: INCEIPL $4
+
+ 0x2547DF9C: 419E0034 bc 12,30,0x2547DFD0
+ 19: Js30o $0x2547DFD0
+
+
+
+. 1092 2547DF88 24
+. 93 E3 00 00 90 1D FF FC 2F 9D 00 00 7F BF EB 78 7F 63 DB 78 41 9E 00 34
+==== BB 1093 (0x2547DFA0) approx BBs exec'd 0 ====
+
+ 0x2547DFA0: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547DFA4: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547DFA8: 8361000C lwz r27,12(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R27
+ 12: INCEIPL $4
+
+ 0x2547DFAC: 83810010 lwz r28,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0x2547DFB0: 7D0803A6 mtlr r8
+ 18: GETL R8, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547DFB4: 83A10014 lwz r29,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x2547DFB8: 83C10018 lwz r30,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0x2547DFBC: 83E1001C lwz r31,28(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x1C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R31
+ 35: INCEIPL $4
+
+ 0x2547DFC0: 38210020 addi r1,r1,32
+ 36: GETL R1, t28
+ 37: ADDL $0x20, t28
+ 38: PUTL t28, R1
+ 39: INCEIPL $4
+
+ 0x2547DFC4: 4E800020 blr
+ 40: GETL LR, t30
+ 41: JMPo-r t30 ($4)
+
+
+
+. 1093 2547DFA0 40
+. 81 01 00 24 7F E3 FB 78 83 61 00 0C 83 81 00 10 7D 08 03 A6 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1094 (0x2547297C) approx BBs exec'd 0 ====
+
+ 0x2547297C: 7C711B79 or. r17,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R17
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25472980: 41820E04 bc 12,2,0x25473784
+ 5: Js02o $0x25473784
+
+
+
+. 1094 2547297C 8
+. 7C 71 1B 79 41 82 0E 04
+==== BB 1095 (0x25472984) approx BBs exec'd 0 ====
+
+ 0x25472984: 813F0030 lwz r9,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25472988: 39540158 addi r10,r20,344
+ 5: GETL R20, t4
+ 6: ADDL $0x158, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x2547298C: 8311FFFC lwz r24,-4(r17)
+ 9: GETL R17, t6
+ 10: ADDL $0xFFFFFFFC, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R24
+ 13: INCEIPL $4
+
+ 0x25472990: 2F890000 cmpi cr7,r9,0
+ 14: GETL R9, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x7, CR
+ 17: INCEIPL $4
+
+ 0x25472994: 915F0078 stw r10,120(r31)
+ 18: GETL R10, t14
+ 19: GETL R31, t16
+ 20: ADDL $0x78, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25472998: 930E0424 stw r24,1060(r14)
+ 23: GETL R24, t18
+ 24: GETL R14, t20
+ 25: ADDL $0x424, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0x2547299C: 409E0E38 bc 4,30,0x254737D4
+ 28: Jc30o $0x254737D4
+
+
+
+. 1095 25472984 28
+. 81 3F 00 30 39 54 01 58 83 11 FF FC 2F 89 00 00 91 5F 00 78 93 0E 04 24 40 9E 0E 38
+==== BB 1096 (0x254729A0) approx BBs exec'd 0 ====
+
+ 0x254729A0: 8074013C lwz r3,316(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x13C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254729A4: 2E120000 cmpi cr4,r18,0
+ 5: GETL R18, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254729A8: 2F830000 cmpi cr7,r3,0
+ 9: GETL R3, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x254729AC: 419E0118 bc 12,30,0x25472AC4
+ 13: Js30o $0x25472AC4
+
+
+
+. 1096 254729A0 16
+. 80 74 01 3C 2E 12 00 00 2F 83 00 00 41 9E 01 18
+==== BB 1097 (0x254729B0) approx BBs exec'd 0 ====
+
+ 0x254729B0: 826F0050 lwz r19,80(r15)
+ 0: GETL R15, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0x254729B4: 2C130000 cmpi cr0,r19,0
+ 5: GETL R19, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x254729B8: 4082010C bc 4,2,0x25472AC4
+ 9: Jc02o $0x25472AC4
+
+
+
+. 1097 254729B0 12
+. 82 6F 00 50 2C 13 00 00 40 82 01 0C
+==== BB 1098 (0x254729BC) approx BBs exec'd 0 ====
+
+ 0x254729BC: 83940114 lwz r28,276(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x114, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x254729C0: 8314015C lwz r24,348(r20)
+ 5: GETL R20, t4
+ 6: ADDL $0x15C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R24
+ 9: INCEIPL $4
+
+ 0x254729C4: 83A30004 lwz r29,4(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0x254729C8: 817C0004 lwz r11,4(r28)
+ 15: GETL R28, t12
+ 16: ADDL $0x4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R11
+ 19: INCEIPL $4
+
+ 0x254729CC: 5706103A rlwinm r6,r24,2,0,29
+ 20: GETL R24, t16
+ 21: SHLL $0x2, t16
+ 22: PUTL t16, R6
+ 23: INCEIPL $4
+
+ 0x254729D0: 83940158 lwz r28,344(r20)
+ 24: GETL R20, t18
+ 25: ADDL $0x158, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R28
+ 28: INCEIPL $4
+
+ 0x254729D4: 7F4BEA14 add r26,r11,r29
+ 29: GETL R11, t22
+ 30: GETL R29, t24
+ 31: ADDL t22, t24
+ 32: PUTL t24, R26
+ 33: INCEIPL $4
+
+ 0x254729D8: 82F40034 lwz r23,52(r20)
+ 34: GETL R20, t26
+ 35: ADDL $0x34, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R23
+ 38: INCEIPL $4
+
+ 0x254729DC: 7F66E214 add r27,r6,r28
+ 39: GETL R6, t30
+ 40: GETL R28, t32
+ 41: ADDL t30, t32
+ 42: PUTL t32, R27
+ 43: INCEIPL $4
+
+ 0x254729E0: 7E1AE810 subfc r16,r26,r29
+ 44: GETL R26, t34
+ 45: GETL R29, t36
+ 46: SBBL t34, t36 (-wCa)
+ 47: PUTL t36, R16
+ 48: INCEIPL $4
+
+ 0x254729E4: 7E108110 subfe r16,r16,r16
+ 49: GETL R16, t38
+ 50: GETL R16, t40
+ 51: SBBL t38, t40 (-rCa-wCa)
+ 52: PUTL t40, R16
+ 53: INCEIPL $4
+
+ 0x254729E8: 7E1000D0 neg r16,r16
+ 54: GETL R16, t42
+ 55: NEGL t42
+ 56: PUTL t42, R16
+ 57: INCEIPL $4
+
+ 0x254729EC: 7EDBE010 subfc r22,r27,r28
+ 58: GETL R27, t44
+ 59: GETL R28, t46
+ 60: SBBL t44, t46 (-wCa)
+ 61: PUTL t46, R22
+ 62: INCEIPL $4
+
+ 0x254729F0: 7ED6B110 subfe r22,r22,r22
+ 63: GETL R22, t48
+ 64: GETL R22, t50
+ 65: SBBL t48, t50 (-rCa-wCa)
+ 66: PUTL t50, R22
+ 67: INCEIPL $4
+
+ 0x254729F4: 7ED600D0 neg r22,r22
+ 68: GETL R22, t52
+ 69: NEGL t52
+ 70: PUTL t52, R22
+ 71: INCEIPL $4
+
+ 0x254729F8: 83370004 lwz r25,4(r23)
+ 72: GETL R23, t54
+ 73: ADDL $0x4, t54
+ 74: LDL (t54), t56
+ 75: PUTL t56, R25
+ 76: INCEIPL $4
+
+ 0x254729FC: 7EC98039 and. r9,r22,r16
+ 77: GETL R22, t58
+ 78: GETL R16, t60
+ 79: ANDL t58, t60
+ 80: PUTL t60, R9
+ 81: CMP0L t60, t62 (-rSo)
+ 82: ICRFL t62, $0x0, CR
+ 83: INCEIPL $4
+
+ 0x25472A00: 41820090 bc 12,2,0x25472A90
+ 84: Js02o $0x25472A90
+
+
+
+. 1098 254729BC 72
+. 83 94 01 14 83 14 01 5C 83 A3 00 04 81 7C 00 04 57 06 10 3A 83 94 01 58 7F 4B EA 14 82 F4 00 34 7F 66 E2 14 7E 1A E8 10 7E 10 81 10 7E 10 00 D0 7E DB E0 10 7E D6 B1 10 7E D6 00 D0 83 37 00 04 7E C9 80 39 41 82 00 90
+==== BB 1099 (0x25472A04) approx BBs exec'd 0 ====
+
+ 0x25472A04: 809C0000 lwz r4,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25472A08: 7C84A000 cmp cr1,r4,r20
+ 4: GETL R4, t4
+ 5: GETL R20, t6
+ 6: CMPL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25472A0C: 41860060 bc 12,6,0x25472A6C
+ 9: Js06o $0x25472A6C
+
+
+
+. 1099 25472A04 12
+. 80 9C 00 00 7C 84 A0 00 41 86 00 60
+==== BB 1100 (0x25472A6C) approx BBs exec'd 0 ====
+
+ 0x25472A6C: 3B9C0004 addi r28,r28,4
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0x25472A70: 7C9AE810 subfc r4,r26,r29
+ 4: GETL R26, t2
+ 5: GETL R29, t4
+ 6: SBBL t2, t4 (-wCa)
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x25472A74: 7C842110 subfe r4,r4,r4
+ 9: GETL R4, t6
+ 10: GETL R4, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x25472A78: 7C8400D0 neg r4,r4
+ 14: GETL R4, t10
+ 15: NEGL t10
+ 16: PUTL t10, R4
+ 17: INCEIPL $4
+
+ 0x25472A7C: 7CBBE010 subfc r5,r27,r28
+ 18: GETL R27, t12
+ 19: GETL R28, t14
+ 20: SBBL t12, t14 (-wCa)
+ 21: PUTL t14, R5
+ 22: INCEIPL $4
+
+ 0x25472A80: 7CA52910 subfe r5,r5,r5
+ 23: GETL R5, t16
+ 24: GETL R5, t18
+ 25: SBBL t16, t18 (-rCa-wCa)
+ 26: PUTL t18, R5
+ 27: INCEIPL $4
+
+ 0x25472A84: 7CA500D0 neg r5,r5
+ 28: GETL R5, t20
+ 29: NEGL t20
+ 30: PUTL t20, R5
+ 31: INCEIPL $4
+
+ 0x25472A88: 7CAA2039 and. r10,r5,r4
+ 32: GETL R5, t22
+ 33: GETL R4, t24
+ 34: ANDL t22, t24
+ 35: PUTL t24, R10
+ 36: CMP0L t24, t26 (-rSo)
+ 37: ICRFL t26, $0x0, CR
+ 38: INCEIPL $4
+
+ 0x25472A8C: 4082FF78 bc 4,2,0x25472A04
+ 39: Jc02o $0x25472A04
+
+
+
+. 1100 25472A6C 36
+. 3B 9C 00 04 7C 9A E8 10 7C 84 21 10 7C 84 00 D0 7C BB E0 10 7C A5 29 10 7C A5 00 D0 7C AA 20 39 40 82 FF 78
+==== BB 1101 (0x25472A10) approx BBs exec'd 0 ====
+
+ 0x25472A10: 81040000 lwz r8,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0x25472A14: 2E080000 cmpi cr4,r8,0
+ 4: GETL R8, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x4, CR
+ 7: INCEIPL $4
+
+ 0x25472A18: 40920078 bc 4,18,0x25472A90
+ 8: Jc18o $0x25472A90
+
+
+
+. 1101 25472A10 12
+. 81 04 00 00 2E 08 00 00 40 92 00 78
+==== BB 1102 (0x25472A90) approx BBs exec'd 0 ====
+
+ 0x25472A90: 7F80DA78 xor r0,r28,r27
+ 0: GETL R28, t0
+ 1: GETL R27, t2
+ 2: XORL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25472A94: 21600000 subfic r11,r0,0
+ 5: GETL R0, t4
+ 6: MOVL $0x0, t6
+ 7: SBBL t4, t6 (-wCa)
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25472A98: 7C0B0114 adde r0,r11,r0
+ 10: GETL R11, t8
+ 11: GETL R0, t10
+ 12: ADCL t8, t10 (-rCa-wCa)
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0x25472A9C: 7FACD278 xor r12,r29,r26
+ 15: GETL R29, t12
+ 16: GETL R26, t14
+ 17: XORL t12, t14
+ 18: PUTL t14, R12
+ 19: INCEIPL $4
+
+ 0x25472AA0: 214C0000 subfic r10,r12,0
+ 20: GETL R12, t16
+ 21: MOVL $0x0, t18
+ 22: SBBL t16, t18 (-wCa)
+ 23: PUTL t18, R10
+ 24: INCEIPL $4
+
+ 0x25472AA4: 7D8A6114 adde r12,r10,r12
+ 25: GETL R10, t20
+ 26: GETL R12, t22
+ 27: ADCL t20, t22 (-rCa-wCa)
+ 28: PUTL t22, R12
+ 29: INCEIPL $4
+
+ 0x25472AA8: 7C0B6039 and. r11,r0,r12
+ 30: GETL R0, t24
+ 31: GETL R12, t26
+ 32: ANDL t24, t26
+ 33: PUTL t26, R11
+ 34: CMP0L t26, t28 (-rSo)
+ 35: ICRFL t28, $0x0, CR
+ 36: INCEIPL $4
+
+ 0x25472AAC: 41820008 bc 12,2,0x25472AB4
+ 37: Js02o $0x25472AB4
+
+
+
+. 1102 25472A90 32
+. 7F 80 DA 78 21 60 00 00 7C 0B 01 14 7F AC D2 78 21 4C 00 00 7D 8A 61 14 7C 0B 60 39 41 82 00 08
+==== BB 1103 (0x25472AB4) approx BBs exec'd 0 ====
+
+ 0x25472AB4: 83AF0000 lwz r29,0(r15)
+ 0: GETL R15, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0x25472AB8: 2E120000 cmpi cr4,r18,0
+ 4: GETL R18, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x4, CR
+ 7: INCEIPL $4
+
+ 0x25472ABC: 73A90001 andi. r9,r29,0x1
+ 8: GETL R29, t8
+ 9: ANDL $0x1, t8
+ 10: PUTL t8, R9
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x0, CR
+ 13: INCEIPL $4
+
+ 0x25472AC0: 40821240 bc 4,2,0x25473D00
+ 14: Jc02o $0x25473D00
+
+
+
+. 1103 25472AB4 16
+. 83 AF 00 00 2E 12 00 00 73 A9 00 01 40 82 12 40
+==== BB 1104 (0x25472AC4) approx BBs exec'd 0 ====
+
+ 0x25472AC4: 806E01B8 lwz r3,440(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1B8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25472AC8: 4800947D bl 0x2547BF44
+ 5: MOVL $0x25472ACC, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0x2547BF44 ($4)
+
+
+
+. 1104 25472AC4 8
+. 80 6E 01 B8 48 00 94 7D
+==== BB 1105 _dl_debug_initialize(0x2547BF44) approx BBs exec'd 0 ====
+
+ 0x2547BF44: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547BF48: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x2547BF4C: 4801B0B5 bl 0x25497000
+ 9: MOVL $0x2547BF50, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 1105 2547BF44 12
+. 94 21 FF F0 7D 88 02 A6 48 01 B0 B5
+==== BB 1106 (0x2547BF50) approx BBs exec'd 0 ====
+
+ 0x2547BF50: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547BF54: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547BF58: 7C681B78 or r8,r3,r3
+ 8: GETL R3, t6
+ 9: PUTL t6, R8
+ 10: INCEIPL $4
+
+ 0x2547BF5C: 7D8803A6 mtlr r12
+ 11: GETL R12, t8
+ 12: PUTL t8, LR
+ 13: INCEIPL $4
+
+ 0x2547BF60: 815E0518 lwz r10,1304(r30)
+ 14: GETL R30, t10
+ 15: ADDL $0x518, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547BF64: 800A0008 lwz r0,8(r10)
+ 19: GETL R10, t14
+ 20: ADDL $0x8, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R0
+ 23: INCEIPL $4
+
+ 0x2547BF68: 7D435378 or r3,r10,r10
+ 24: GETL R10, t18
+ 25: PUTL t18, R3
+ 26: INCEIPL $4
+
+ 0x2547BF6C: 2F800000 cmpi cr7,r0,0
+ 27: GETL R0, t20
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x7, CR
+ 30: INCEIPL $4
+
+ 0x2547BF70: 409E0024 bc 4,30,0x2547BF94
+ 31: Jc30o $0x2547BF94
+
+
+
+. 1106 2547BF50 36
+. 93 C1 00 08 7F C8 02 A6 7C 68 1B 78 7D 88 03 A6 81 5E 05 18 80 0A 00 08 7D 43 53 78 2F 80 00 00 40 9E 00 24
+==== BB 1107 (0x2547BF74) approx BBs exec'd 0 ====
+
+ 0x2547BF74: 813E04C8 lwz r9,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547BF78: 38A00001 li r5,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547BF7C: 809E0508 lwz r4,1288(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x508, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x2547BF80: 81690000 lwz r11,0(r9)
+ 13: GETL R9, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R11
+ 16: INCEIPL $4
+
+ 0x2547BF84: 90AA0000 stw r5,0(r10)
+ 17: GETL R5, t14
+ 18: GETL R10, t16
+ 19: STL t14, (t16)
+ 20: INCEIPL $4
+
+ 0x2547BF88: 910A0010 stw r8,16(r10)
+ 21: GETL R8, t18
+ 22: GETL R10, t20
+ 23: ADDL $0x10, t20
+ 24: STL t18, (t20)
+ 25: INCEIPL $4
+
+ 0x2547BF8C: 916A0004 stw r11,4(r10)
+ 26: GETL R11, t22
+ 27: GETL R10, t24
+ 28: ADDL $0x4, t24
+ 29: STL t22, (t24)
+ 30: INCEIPL $4
+
+ 0x2547BF90: 908A0008 stw r4,8(r10)
+ 31: GETL R4, t26
+ 32: GETL R10, t28
+ 33: ADDL $0x8, t28
+ 34: STL t26, (t28)
+ 35: INCEIPL $4
+
+ 0x2547BF94: 83C10008 lwz r30,8(r1)
+ 36: GETL R1, t30
+ 37: ADDL $0x8, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R30
+ 40: INCEIPL $4
+
+ 0x2547BF98: 38210010 addi r1,r1,16
+ 41: GETL R1, t34
+ 42: ADDL $0x10, t34
+ 43: PUTL t34, R1
+ 44: INCEIPL $4
+
+ 0x2547BF9C: 4E800020 blr
+ 45: GETL LR, t36
+ 46: JMPo-r t36 ($4)
+
+
+
+. 1107 2547BF74 44
+. 81 3E 04 C8 38 A0 00 01 80 9E 05 08 81 69 00 00 90 AA 00 00 91 0A 00 10 91 6A 00 04 90 8A 00 08 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 1108 (0x25472ACC) approx BBs exec'd 0 ====
+
+ 0x25472ACC: 81340074 lwz r9,116(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25472AD0: 7C7A1B78 or r26,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x25472AD4: 2F090000 cmpi cr6,r9,0
+ 8: GETL R9, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0x25472AD8: 419A0008 bc 12,26,0x25472AE0
+ 12: Js26o $0x25472AE0
+
+
+
+. 1108 25472ACC 16
+. 81 34 00 74 7C 7A 1B 78 2F 09 00 00 41 9A 00 08
+==== BB 1109 (0x25472ADC) approx BBs exec'd 0 ====
+
+ 0x25472ADC: 90690004 stw r3,4(r9)
+ 0: GETL R3, t0
+ 1: GETL R9, t2
+ 2: ADDL $0x4, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25472AE0: 812E022C lwz r9,556(r14)
+ 5: GETL R14, t4
+ 6: ADDL $0x22C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25472AE4: 2F890000 cmpi cr7,r9,0
+ 10: GETL R9, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25472AE8: 419E0008 bc 12,30,0x25472AF0
+ 14: Js30o $0x25472AF0
+
+
+
+. 1109 25472ADC 16
+. 90 69 00 04 81 2E 02 2C 2F 89 00 00 41 9E 00 08
+==== BB 1110 (0x25472AF0) approx BBs exec'd 0 ====
+
+ 0x25472AF0: 825F0078 lwz r18,120(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x78, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x25472AF4: C8140158 lfd f0,344(r20)
+ 5: GETL R20, t4
+ 6: ADDL $0x158, t4
+ 7: FPU_RQ (t4), 0x0:0x0
+ 8: INCEIPL $4
+
+ 0x25472AF8: 924E0008 stw r18,8(r14)
+ 9: GETL R18, t6
+ 10: GETL R14, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x25472AFC: D80F0014 stfd f0,20(r15)
+ 14: GETL R15, t10
+ 15: ADDL $0x14, t10
+ 16: FPU_WQ 0x0:0x0, (t10)
+ 17: INCEIPL $4
+
+ 0x25472B00: 924E0010 stw r18,16(r14)
+ 18: GETL R18, t12
+ 19: GETL R14, t14
+ 20: ADDL $0x10, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0x25472B04: 41920844 bc 12,18,0x25473348
+ 23: Js18o $0x25473348
+
+
+
+. 1110 25472AF0 24
+. 82 5F 00 78 C8 14 01 58 92 4E 00 08 D8 0F 00 14 92 4E 00 10 41 92 08 44
+==== BB 1111 (0x25473348) approx BBs exec'd 0 ====
+
+ 0x25473348: 8174000C lwz r11,12(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547334C: 7E9DA378 or r29,r20,r20
+ 5: GETL R20, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25473350: 820F0050 lwz r16,80(r15)
+ 8: GETL R15, t6
+ 9: ADDL $0x50, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R16
+ 12: INCEIPL $4
+
+ 0x25473354: 2C0B0000 cmpi cr0,r11,0
+ 13: GETL R11, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x0, CR
+ 16: INCEIPL $4
+
+ 0x25473358: 82EF0028 lwz r23,40(r15)
+ 17: GETL R15, t14
+ 18: ADDL $0x28, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R23
+ 21: INCEIPL $4
+
+ 0x2547335C: 3150FFFF addic r10,r16,-1
+ 22: GETL R16, t18
+ 23: ADCL $0xFFFFFFFF, t18 (-wCa)
+ 24: PUTL t18, R10
+ 25: INCEIPL $4
+
+ 0x25473360: 7F6A8110 subfe r27,r10,r16
+ 26: GETL R10, t20
+ 27: GETL R16, t22
+ 28: SBBL t20, t22 (-rCa-wCa)
+ 29: PUTL t22, R27
+ 30: INCEIPL $4
+
+ 0x25473364: 7EF3DB78 or r19,r23,r27
+ 31: GETL R23, t24
+ 32: GETL R27, t26
+ 33: ORL t26, t24
+ 34: PUTL t24, R19
+ 35: INCEIPL $4
+
+ 0x25473368: 926F0028 stw r19,40(r15)
+ 36: GETL R19, t28
+ 37: GETL R15, t30
+ 38: ADDL $0x28, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0x2547336C: 41820018 bc 12,2,0x25473384
+ 41: Js02o $0x25473384
+
+
+
+. 1111 25473348 40
+. 81 74 00 0C 7E 9D A3 78 82 0F 00 50 2C 0B 00 00 82 EF 00 28 31 50 FF FF 7F 6A 81 10 7E F3 DB 78 92 6F 00 28 41 82 00 18
+==== BB 1112 (0x25473370) approx BBs exec'd 0 ====
+
+ 0x25473370: 7D605B78 or r0,r11,r11
+ 0: GETL R11, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25473374: 7C1D0378 or r29,r0,r0
+ 3: GETL R0, t2
+ 4: PUTL t2, R29
+ 5: INCEIPL $4
+
+ 0x25473378: 801D000C lwz r0,12(r29)
+ 6: GETL R29, t4
+ 7: ADDL $0xC, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x2547337C: 2F000000 cmpi cr6,r0,0
+ 11: GETL R0, t8
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x6, CR
+ 14: INCEIPL $4
+
+ 0x25473380: 409AFFF4 bc 4,26,0x25473374
+ 15: Jc26o $0x25473374
+
+
+
+. 1112 25473370 20
+. 7D 60 5B 78 7C 1D 03 78 80 1D 00 0C 2F 00 00 00 40 9A FF F4
+==== BB 1113 (0x25473374) approx BBs exec'd 0 ====
+
+ 0x25473374: 7C1D0378 or r29,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0x25473378: 801D000C lwz r0,12(r29)
+ 3: GETL R29, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x2547337C: 2F000000 cmpi cr6,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0x25473380: 409AFFF4 bc 4,26,0x25473374
+ 12: Jc26o $0x25473374
+
+
+
+. 1113 25473374 16
+. 7C 1D 03 78 80 1D 00 0C 2F 00 00 00 40 9A FF F4
+==== BB 1114 (0x25473384) approx BBs exec'd 0 ====
+
+ 0x25473384: 82DD001C lwz r22,28(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R22
+ 4: INCEIPL $4
+
+ 0x25473388: 81360004 lwz r9,4(r22)
+ 5: GETL R22, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x2547338C: 2F890000 cmpi cr7,r9,0
+ 10: GETL R9, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25473390: 409E0420 bc 4,30,0x254737B0
+ 14: Jc30o $0x254737B0
+
+
+
+. 1114 25473384 16
+. 82 DD 00 1C 81 36 00 04 2F 89 00 00 40 9E 04 20
+==== BB 1115 (0x25473394) approx BBs exec'd 0 ====
+
+ 0x25473394: 3B8E01B8 addi r28,r14,440
+ 0: GETL R14, t0
+ 1: ADDL $0x1B8, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0x25473398: 7D9CE800 cmp cr3,r28,r29
+ 4: GETL R28, t2
+ 5: GETL R29, t4
+ 6: CMPL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x3, CR
+ 8: INCEIPL $4
+
+ 0x2547339C: 418E0018 bc 12,14,0x254733B4
+ 9: Js14o $0x254733B4
+
+
+
+. 1115 25473394 12
+. 3B 8E 01 B8 7D 9C E8 00 41 8E 00 18
+==== BB 1116 (0x254733A0) approx BBs exec'd 0 ====
+
+ 0x254733A0: 809D01C0 lwz r4,448(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1C0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254733A4: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254733A8: 80AF0028 lwz r5,40(r15)
+ 8: GETL R15, t6
+ 9: ADDL $0x28, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0x254733AC: 7F66DB78 or r6,r27,r27
+ 13: GETL R27, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x254733B0: 48006211 bl 0x254795C0
+ 16: MOVL $0x254733B4, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0x254795C0 ($4)
+
+
+
+. 1116 254733A0 20
+. 80 9D 01 C0 7F A3 EB 78 80 AF 00 28 7F 66 DB 78 48 00 62 11
+==== BB 1117 _dl_relocate_object(0x254795C0) approx BBs exec'd 0 ====
+
+ 0x254795C0: 7CE802A6 mflr r7
+ 0: GETL LR, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x254795C4: 9421FF50 stwu r1,-176(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFF50, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x254795C8: 7D800026 mfcr r12
+ 9: GETL CR, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x254795CC: 93E100AC stw r31,172(r1)
+ 12: GETL R31, t8
+ 13: GETL R1, t10
+ 14: ADDL $0xAC, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x254795D0: 4801DA31 bl 0x25497000
+ 17: MOVL $0x254795D4, t12
+ 18: PUTL t12, LR
+ 19: JMPo-c $0x25497000 ($4)
+
+
+
+. 1117 254795C0 20
+. 7C E8 02 A6 94 21 FF 50 7D 80 00 26 93 E1 00 AC 48 01 DA 31
+==== BB 1118 (0x254795D4) approx BBs exec'd 0 ====
+
+ 0x254795D4: 7C3F0B78 or r31,r1,r1
+ 0: GETL R1, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0x254795D8: 90E100B4 stw r7,180(r1)
+ 3: GETL R7, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xB4, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x254795DC: 80030180 lwz r0,384(r3)
+ 8: GETL R3, t6
+ 9: ADDL $0x180, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x254795E0: 92210074 stw r17,116(r1)
+ 13: GETL R17, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x74, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254795E4: 3A200000 li r17,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R17
+ 20: INCEIPL $4
+
+ 0x254795E8: 74082000 andis. r8,r0,0x2000
+ 21: GETL R0, t16
+ 22: ANDL $0x20000000, t16
+ 23: PUTL t16, R8
+ 24: CMP0L t16, t18 (-rSo)
+ 25: ICRFL t18, $0x0, CR
+ 26: INCEIPL $4
+
+ 0x254795EC: 9361009C stw r27,156(r1)
+ 27: GETL R27, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x9C, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0x254795F0: 938100A0 stw r28,160(r1)
+ 32: GETL R28, t24
+ 33: GETL R1, t26
+ 34: ADDL $0xA0, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x254795F4: 7CDB3378 or r27,r6,r6
+ 37: GETL R6, t28
+ 38: PUTL t28, R27
+ 39: INCEIPL $4
+
+ 0x254795F8: 93C100A8 stw r30,168(r1)
+ 40: GETL R30, t30
+ 41: GETL R1, t32
+ 42: ADDL $0xA8, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x254795FC: 7CBC2B78 or r28,r5,r5
+ 45: GETL R5, t34
+ 46: PUTL t34, R28
+ 47: INCEIPL $4
+
+ 0x25479600: 92010070 stw r16,112(r1)
+ 48: GETL R16, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x70, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x25479604: 7FC802A6 mflr r30
+ 53: GETL LR, t40
+ 54: PUTL t40, R30
+ 55: INCEIPL $4
+
+ 0x25479608: 92410078 stw r18,120(r1)
+ 56: GETL R18, t42
+ 57: GETL R1, t44
+ 58: ADDL $0x78, t44
+ 59: STL t42, (t44)
+ 60: INCEIPL $4
+
+ 0x2547960C: 9261007C stw r19,124(r1)
+ 61: GETL R19, t46
+ 62: GETL R1, t48
+ 63: ADDL $0x7C, t48
+ 64: STL t46, (t48)
+ 65: INCEIPL $4
+
+ 0x25479610: 92810080 stw r20,128(r1)
+ 66: GETL R20, t50
+ 67: GETL R1, t52
+ 68: ADDL $0x80, t52
+ 69: STL t50, (t52)
+ 70: INCEIPL $4
+
+ 0x25479614: 92A10084 stw r21,132(r1)
+ 71: GETL R21, t54
+ 72: GETL R1, t56
+ 73: ADDL $0x84, t56
+ 74: STL t54, (t56)
+ 75: INCEIPL $4
+
+ 0x25479618: 92C10088 stw r22,136(r1)
+ 76: GETL R22, t58
+ 77: GETL R1, t60
+ 78: ADDL $0x88, t60
+ 79: STL t58, (t60)
+ 80: INCEIPL $4
+
+ 0x2547961C: 92E1008C stw r23,140(r1)
+ 81: GETL R23, t62
+ 82: GETL R1, t64
+ 83: ADDL $0x8C, t64
+ 84: STL t62, (t64)
+ 85: INCEIPL $4
+
+ 0x25479620: 93010090 stw r24,144(r1)
+ 86: GETL R24, t66
+ 87: GETL R1, t68
+ 88: ADDL $0x90, t68
+ 89: STL t66, (t68)
+ 90: INCEIPL $4
+
+ 0x25479624: 93210094 stw r25,148(r1)
+ 91: GETL R25, t70
+ 92: GETL R1, t72
+ 93: ADDL $0x94, t72
+ 94: STL t70, (t72)
+ 95: INCEIPL $4
+
+ 0x25479628: 93410098 stw r26,152(r1)
+ 96: GETL R26, t74
+ 97: GETL R1, t76
+ 98: ADDL $0x98, t76
+ 99: STL t74, (t76)
+ 100: INCEIPL $4
+
+ 0x2547962C: 93A100A4 stw r29,164(r1)
+ 101: GETL R29, t78
+ 102: GETL R1, t80
+ 103: ADDL $0xA4, t80
+ 104: STL t78, (t80)
+ 105: INCEIPL $4
+
+ 0x25479630: 9181006C stw r12,108(r1)
+ 106: GETL R12, t82
+ 107: GETL R1, t84
+ 108: ADDL $0x6C, t84
+ 109: STL t82, (t84)
+ 110: INCEIPL $4
+
+ 0x25479634: 909F0010 stw r4,16(r31)
+ 111: GETL R4, t86
+ 112: GETL R31, t88
+ 113: ADDL $0x10, t88
+ 114: STL t86, (t88)
+ 115: INCEIPL $4
+
+ 0x25479638: 907F000C stw r3,12(r31)
+ 116: GETL R3, t90
+ 117: GETL R31, t92
+ 118: ADDL $0xC, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0x2547963C: 40820118 bc 4,2,0x25479754
+ 121: Jc02o $0x25479754
+
+
+
+. 1118 254795D4 108
+. 7C 3F 0B 78 90 E1 00 B4 80 03 01 80 92 21 00 74 3A 20 00 00 74 08 20 00 93 61 00 9C 93 81 00 A0 7C DB 33 78 93 C1 00 A8 7C BC 2B 78 92 01 00 70 7F C8 02 A6 92 41 00 78 92 61 00 7C 92 81 00 80 92 A1 00 84 92 C1 00 88 92 E1 00 8C 93 01 00 90 93 21 00 94 93 41 00 98 93 A1 00 A4 91 81 00 6C 90 9F 00 10 90 7F 00 0C 40 82 01 18
+==== BB 1119 (0x25479640) approx BBs exec'd 0 ====
+
+ 0x25479640: 2D860000 cmpi cr3,r6,0
+ 0: GETL R6, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x3, CR
+ 3: INCEIPL $4
+
+ 0x25479644: 418E016C bc 12,14,0x254797B0
+ 4: Js14o $0x254797B0
+
+
+
+. 1119 25479640 8
+. 2D 86 00 00 41 8E 01 6C
+==== BB 1120 (0x254797B0) approx BBs exec'd 0 ====
+
+ 0x254797B0: 80A30080 lwz r5,128(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x80, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x254797B4: 3085FFFF addic r4,r5,-1
+ 5: GETL R5, t4
+ 6: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x254797B8: 7C842110 subfe r4,r4,r4
+ 9: GETL R4, t6
+ 10: GETL R4, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x254797BC: 7F9C2038 and r28,r28,r4
+ 14: GETL R28, t10
+ 15: GETL R4, t12
+ 16: ANDL t10, t12
+ 17: PUTL t12, R28
+ 18: INCEIPL $4
+
+ 0x254797C0: 4BFFFE88 b 0x25479648
+ 19: JMPo $0x25479648 ($4)
+
+
+
+. 1120 254797B0 20
+. 80 A3 00 80 30 85 FF FF 7C 84 21 10 7F 9C 20 38 4B FF FE 88
+==== BB 1121 (0x25479648) approx BBs exec'd 0 ====
+
+ 0x25479648: 835E04F4 lwz r26,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547964C: 80DA0000 lwz r6,0(r26)
+ 5: GETL R26, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x25479650: 70C90020 andi. r9,r6,0x20
+ 9: GETL R6, t8
+ 10: ANDL $0x20, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25479654: 408207B4 bc 4,2,0x25479E08
+ 15: Jc02o $0x25479E08
+
+
+
+. 1121 25479648 16
+. 83 5E 04 F4 80 DA 00 00 70 C9 00 20 40 82 07 B4
+==== BB 1122 (0x25479658) approx BBs exec'd 0 ====
+
+ 0x25479658: 807F000C lwz r3,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547965C: 81430078 lwz r10,120(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x78, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x25479660: 2E0A0000 cmpi cr4,r10,0
+ 10: GETL R10, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x4, CR
+ 13: INCEIPL $4
+
+ 0x25479664: 409206C0 bc 4,18,0x25479D24
+ 14: Jc18o $0x25479D24
+
+
+
+. 1122 25479658 16
+. 80 7F 00 0C 81 43 00 78 2E 0A 00 00 40 92 06 C0
+==== BB 1123 (0x25479668) approx BBs exec'd 0 ====
+
+ 0x25479668: 80C30034 lwz r6,52(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547966C: 7F84E378 or r4,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25479670: 7F65DB78 or r5,r27,r27
+ 8: GETL R27, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x25479674: 3B800001 li r28,1
+ 11: MOVL $0x1, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0x25479678: 83A60004 lwz r29,4(r6)
+ 14: GETL R6, t10
+ 15: ADDL $0x4, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0x2547967C: 3B600000 li r27,0
+ 19: MOVL $0x0, t14
+ 20: PUTL t14, R27
+ 21: INCEIPL $4
+
+ 0x25479680: 93BF0008 stw r29,8(r31)
+ 22: GETL R29, t16
+ 23: GETL R31, t18
+ 24: ADDL $0x8, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0x25479684: 480071AD bl 0x25480830
+ 27: MOVL $0x25479688, t20
+ 28: PUTL t20, LR
+ 29: JMPo-c $0x25480830 ($4)
+
+
+
+. 1123 25479668 32
+. 80 C3 00 34 7F 84 E3 78 7F 65 DB 78 3B 80 00 01 83 A6 00 04 3B 60 00 00 93 BF 00 08 48 00 71 AD
+==== BB 1124 (0x25480904) approx BBs exec'd 0 ====
+
+ 0x25480904: 2F850000 cmpi cr7,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25480908: 3B9F0018 addi r28,r31,24
+ 4: GETL R31, t4
+ 5: ADDL $0x18, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x2548090C: 419E0264 bc 12,30,0x25480B70
+ 8: Js30o $0x25480B70
+
+
+
+. 1124 25480904 12
+. 2F 85 00 00 3B 9F 00 18 41 9E 02 64
+==== BB 1125 (0x25480B70) approx BBs exec'd 0 ====
+
+ 0x25480B70: 831E04CC lwz r24,1228(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4CC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0x25480B74: 4BFFFDA0 b 0x25480914
+ 5: JMPo $0x25480914 ($4)
+
+
+
+. 1125 25480B70 8
+. 83 1E 04 CC 4B FF FD A0
+==== BB 1126 (0x25480914) approx BBs exec'd 0 ====
+
+ 0x25480914: 409E02C0 bc 4,30,0x25480BD4
+ 0: Jc30o $0x25480BD4
+
+
+
+. 1126 25480914 4
+. 40 9E 02 C0
+==== BB 1127 (0x25480918) approx BBs exec'd 0 ====
+
+ 0x25480918: 3C98FE00 addis r4,r24,-512
+ 0: GETL R24, t0
+ 1: ADDL $0xFE000000, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x2548091C: 3C00FC00 lis r0,-1024
+ 4: MOVL $0xFC000000, t2
+ 5: PUTL t2, R0
+ 6: INCEIPL $4
+
+ 0x25480920: 38640003 addi r3,r4,3
+ 7: GETL R4, t4
+ 8: ADDL $0x3, t4
+ 9: PUTL t4, R3
+ 10: INCEIPL $4
+
+ 0x25480924: 60060002 ori r6,r0,0x2
+ 11: MOVL $0xFC000002, t6
+ 12: PUTL t6, R6
+ 13: INCEIPL $4
+
+ 0x25480928: 39800000 li r12,0
+ 14: MOVL $0x0, t8
+ 15: PUTL t8, R12
+ 16: INCEIPL $4
+
+ 0x2548092C: 7F033040 cmpl cr6,r3,r6
+ 17: GETL R3, t10
+ 18: GETL R6, t12
+ 19: CMPUL t10, t12, t14 (-rSo)
+ 20: ICRFL t14, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x25480930: 618A8000 ori r10,r12,0x8000
+ 22: MOVL $0x8000, t16
+ 23: PUTL t16, R10
+ 24: INCEIPL $4
+
+ 0x25480934: 7CBA00D0 neg r5,r26
+ 25: GETL R26, t18
+ 26: NEGL t18
+ 27: PUTL t18, R5
+ 28: INCEIPL $4
+
+ 0x25480938: 7D1A5050 subf r8,r26,r10
+ 29: GETL R26, t20
+ 30: GETL R10, t22
+ 31: SUBL t20, t22
+ 32: PUTL t22, R8
+ 33: INCEIPL $4
+
+ 0x2548093C: 54A9043E rlwinm r9,r5,0,16,31
+ 34: GETL R5, t24
+ 35: ANDL $0xFFFF, t24
+ 36: PUTL t24, R9
+ 37: INCEIPL $4
+
+ 0x25480940: 5507843E rlwinm r7,r8,16,16,31
+ 38: GETL R8, t26
+ 39: SHRL $0x10, t26
+ 40: PUTL t26, R7
+ 41: INCEIPL $4
+
+ 0x25480944: 3D60556C lis r11,21868
+ 42: MOVL $0x556C0000, t28
+ 43: PUTL t28, R11
+ 44: INCEIPL $4
+
+ 0x25480948: 3C807D6C lis r4,32108
+ 45: MOVL $0x7D6C0000, t30
+ 46: PUTL t30, R4
+ 47: INCEIPL $4
+
+ 0x2548094C: 64E03D6B oris r0,r7,0x3D6B
+ 48: GETL R7, t32
+ 49: ORL $0x3D6B0000, t32
+ 50: PUTL t32, R0
+ 51: INCEIPL $4
+
+ 0x25480950: 6523396B oris r3,r9,0x396B
+ 52: GETL R9, t34
+ 53: ORL $0x396B0000, t34
+ 54: PUTL t34, R3
+ 55: INCEIPL $4
+
+ 0x25480954: 6166083C ori r6,r11,0x83C
+ 56: MOVL $0x556C083C, t36
+ 57: PUTL t36, R6
+ 58: INCEIPL $4
+
+ 0x25480958: 608C5A14 ori r12,r4,0x5A14
+ 59: MOVL $0x7D6C5A14, t38
+ 60: PUTL t38, R12
+ 61: INCEIPL $4
+
+ 0x2548095C: 901C0000 stw r0,0(r28)
+ 62: GETL R0, t40
+ 63: GETL R28, t42
+ 64: STL t40, (t42)
+ 65: INCEIPL $4
+
+ 0x25480960: 907C0004 stw r3,4(r28)
+ 66: GETL R3, t44
+ 67: GETL R28, t46
+ 68: ADDL $0x4, t46
+ 69: STL t44, (t46)
+ 70: INCEIPL $4
+
+ 0x25480964: 90DC0008 stw r6,8(r28)
+ 71: GETL R6, t48
+ 72: GETL R28, t50
+ 73: ADDL $0x8, t50
+ 74: STL t48, (t50)
+ 75: INCEIPL $4
+
+ 0x25480968: 919C000C stw r12,12(r28)
+ 76: GETL R12, t52
+ 77: GETL R28, t54
+ 78: ADDL $0xC, t54
+ 79: STL t52, (t54)
+ 80: INCEIPL $4
+
+ 0x2548096C: 4099020C bc 4,25,0x25480B78
+ 81: Jc25o $0x25480B78
+
+
+
+. 1127 25480918 88
+. 3C 98 FE 00 3C 00 FC 00 38 64 00 03 60 06 00 02 39 80 00 00 7F 03 30 40 61 8A 80 00 7C BA 00 D0 7D 1A 50 50 54 A9 04 3E 55 07 84 3E 3D 60 55 6C 3C 80 7D 6C 64 E0 3D 6B 65 23 39 6B 61 66 08 3C 60 8C 5A 14 90 1C 00 00 90 7C 00 04 90 DC 00 08 91 9C 00 0C 40 99 02 0C
+==== BB 1128 (0x25480B78) approx BBs exec'd 0 ====
+
+ 0x25480B78: 3C980001 addis r4,r24,1
+ 0: GETL R24, t0
+ 1: ADDL $0x10000, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x25480B7C: 3C7D0001 addis r3,r29,1
+ 4: GETL R29, t2
+ 5: ADDL $0x10000, t2
+ 6: PUTL t2, R3
+ 7: INCEIPL $4
+
+ 0x25480B80: 38C48000 addi r6,r4,-32768
+ 8: GETL R4, t4
+ 9: ADDL $0xFFFF8000, t4
+ 10: PUTL t4, R6
+ 11: INCEIPL $4
+
+ 0x25480B84: 39838000 addi r12,r3,-32768
+ 12: GETL R3, t6
+ 13: ADDL $0xFFFF8000, t6
+ 14: PUTL t6, R12
+ 15: INCEIPL $4
+
+ 0x25480B88: 54C9843E rlwinm r9,r6,16,16,31
+ 16: GETL R6, t8
+ 17: SHRL $0x10, t8
+ 18: PUTL t8, R9
+ 19: INCEIPL $4
+
+ 0x25480B8C: 57A7043E rlwinm r7,r29,0,16,31
+ 20: GETL R29, t10
+ 21: ANDL $0xFFFF, t10
+ 22: PUTL t10, R7
+ 23: INCEIPL $4
+
+ 0x25480B90: 5708043E rlwinm r8,r24,0,16,31
+ 24: GETL R24, t12
+ 25: ANDL $0xFFFF, t12
+ 26: PUTL t12, R8
+ 27: INCEIPL $4
+
+ 0x25480B94: 558B843E rlwinm r11,r12,16,16,31
+ 28: GETL R12, t14
+ 29: SHRL $0x10, t14
+ 30: PUTL t14, R11
+ 31: INCEIPL $4
+
+ 0x25480B98: 3D407D89 lis r10,32137
+ 32: MOVL $0x7D890000, t16
+ 33: PUTL t16, R10
+ 34: INCEIPL $4
+
+ 0x25480B9C: 3CA04E80 lis r5,20096
+ 35: MOVL $0x4E800000, t18
+ 36: PUTL t18, R5
+ 37: INCEIPL $4
+
+ 0x25480BA0: 65183980 oris r24,r8,0x3980
+ 38: GETL R8, t20
+ 39: ORL $0x39800000, t20
+ 40: PUTL t20, R24
+ 41: INCEIPL $4
+
+ 0x25480BA4: 653D3D8C oris r29,r9,0x3D8C
+ 42: GETL R9, t22
+ 43: ORL $0x3D8C0000, t22
+ 44: PUTL t22, R29
+ 45: INCEIPL $4
+
+ 0x25480BA8: 614403A6 ori r4,r10,0x3A6
+ 46: MOVL $0x7D8903A6, t24
+ 47: PUTL t24, R4
+ 48: INCEIPL $4
+
+ 0x25480BAC: 64E33980 oris r3,r7,0x3980
+ 49: GETL R7, t26
+ 50: ORL $0x39800000, t26
+ 51: PUTL t26, R3
+ 52: INCEIPL $4
+
+ 0x25480BB0: 65663D8C oris r6,r11,0x3D8C
+ 53: GETL R11, t28
+ 54: ORL $0x3D8C0000, t28
+ 55: PUTL t28, R6
+ 56: INCEIPL $4
+
+ 0x25480BB4: 60A00420 ori r0,r5,0x420
+ 57: MOVL $0x4E800420, t30
+ 58: PUTL t30, R0
+ 59: INCEIPL $4
+
+ 0x25480BB8: 901C0024 stw r0,36(r28)
+ 60: GETL R0, t32
+ 61: GETL R28, t34
+ 62: ADDL $0x24, t34
+ 63: STL t32, (t34)
+ 64: INCEIPL $4
+
+ 0x25480BBC: 931C0010 stw r24,16(r28)
+ 65: GETL R24, t36
+ 66: GETL R28, t38
+ 67: ADDL $0x10, t38
+ 68: STL t36, (t38)
+ 69: INCEIPL $4
+
+ 0x25480BC0: 93BC0014 stw r29,20(r28)
+ 70: GETL R29, t40
+ 71: GETL R28, t42
+ 72: ADDL $0x14, t42
+ 73: STL t40, (t42)
+ 74: INCEIPL $4
+
+ 0x25480BC4: 909C0018 stw r4,24(r28)
+ 75: GETL R4, t44
+ 76: GETL R28, t46
+ 77: ADDL $0x18, t46
+ 78: STL t44, (t46)
+ 79: INCEIPL $4
+
+ 0x25480BC8: 907C001C stw r3,28(r28)
+ 80: GETL R3, t48
+ 81: GETL R28, t50
+ 82: ADDL $0x1C, t50
+ 83: STL t48, (t50)
+ 84: INCEIPL $4
+
+ 0x25480BCC: 90DC0020 stw r6,32(r28)
+ 85: GETL R6, t52
+ 86: GETL R28, t54
+ 87: ADDL $0x20, t54
+ 88: STL t52, (t54)
+ 89: INCEIPL $4
+
+ 0x25480BD0: 4BFFFDD0 b 0x254809A0
+ 90: JMPo $0x254809A0 ($4)
+
+
+
+. 1128 25480B78 92
+. 3C 98 00 01 3C 7D 00 01 38 C4 80 00 39 83 80 00 54 C9 84 3E 57 A7 04 3E 57 08 04 3E 55 8B 84 3E 3D 40 7D 89 3C A0 4E 80 65 18 39 80 65 3D 3D 8C 61 44 03 A6 64 E3 39 80 65 66 3D 8C 60 A0 04 20 90 1C 00 24 93 1C 00 10 93 BC 00 14 90 9C 00 18 90 7C 00 1C 90 DC 00 20 4B FF FD D0
+==== BB 1129 (0x254809A0) approx BBs exec'd 0 ====
+
+ 0x254809A0: 39000000 li r8,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0x254809A4: 38800012 li r4,18
+ 3: MOVL $0x12, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x254809A8: 7F88D840 cmpl cr7,r8,r27
+ 6: GETL R8, t4
+ 7: GETL R27, t6
+ 8: CMPUL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x254809AC: 409C0054 bc 4,28,0x25480A00
+ 11: Jc28o $0x25480A00
+
+
+
+. 1129 254809A0 16
+. 39 00 00 00 38 80 00 12 7F 88 D8 40 40 9C 00 54
+==== BB 1130 (0x254809B0) approx BBs exec'd 0 ====
+
+ 0x254809B0: 38E0FFD4 li r7,-44
+ 0: MOVL $0xFFFFFFD4, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x254809B4: 550A143A rlwinm r10,r8,2,16,29
+ 3: GETL R8, t2
+ 4: ROLL $0x2, t2
+ 5: ANDL $0xFFFC, t2
+ 6: PUTL t2, R10
+ 7: INCEIPL $4
+
+ 0x254809B8: 39080001 addi r8,r8,1
+ 8: GETL R8, t4
+ 9: ADDL $0x1, t4
+ 10: PUTL t4, R8
+ 11: INCEIPL $4
+
+ 0x254809BC: 7D7B4010 subfc r11,r27,r8
+ 12: GETL R27, t6
+ 13: GETL R8, t8
+ 14: SBBL t6, t8 (-wCa)
+ 15: PUTL t8, R11
+ 16: INCEIPL $4
+
+ 0x254809C0: 7D6B5910 subfe r11,r11,r11
+ 17: GETL R11, t10
+ 18: GETL R11, t12
+ 19: SBBL t10, t12 (-rCa-wCa)
+ 20: PUTL t12, R11
+ 21: INCEIPL $4
+
+ 0x254809C4: 7D6B00D0 neg r11,r11
+ 22: GETL R11, t14
+ 23: NEGL t14
+ 24: PUTL t14, R11
+ 25: INCEIPL $4
+
+ 0x254809C8: 21881FFF subfic r12,r8,8191
+ 26: GETL R8, t16
+ 27: MOVL $0x1FFF, t18
+ 28: SBBL t16, t18 (-wCa)
+ 29: PUTL t18, R12
+ 30: INCEIPL $4
+
+ 0x254809CC: 39800000 li r12,0
+ 31: MOVL $0x0, t20
+ 32: PUTL t20, R12
+ 33: INCEIPL $4
+
+ 0x254809D0: 7D8C6114 adde r12,r12,r12
+ 34: GETL R12, t22
+ 35: GETL R12, t24
+ 36: ADCL t22, t24 (-rCa-wCa)
+ 37: PUTL t24, R12
+ 38: INCEIPL $4
+
+ 0x254809D4: 7D696039 and. r9,r11,r12
+ 39: GETL R11, t26
+ 40: GETL R12, t28
+ 41: ANDL t26, t28
+ 42: PUTL t28, R9
+ 43: CMP0L t28, t30 (-rSo)
+ 44: ICRFL t30, $0x0, CR
+ 45: INCEIPL $4
+
+ 0x254809D8: 5498103A rlwinm r24,r4,2,0,29
+ 46: GETL R4, t32
+ 47: SHLL $0x2, t32
+ 48: PUTL t32, R24
+ 49: INCEIPL $4
+
+ 0x254809DC: 54E501BA rlwinm r5,r7,0,6,29
+ 50: GETL R7, t34
+ 51: ANDL $0x3FFFFFC, t34
+ 52: PUTL t34, R5
+ 53: INCEIPL $4
+
+ 0x254809E0: 65403960 oris r0,r10,0x3960
+ 54: GETL R10, t36
+ 55: ORL $0x39600000, t36
+ 56: PUTL t36, R0
+ 57: INCEIPL $4
+
+ 0x254809E4: 64BD4800 oris r29,r5,0x4800
+ 58: GETL R5, t38
+ 59: ORL $0x48000000, t38
+ 60: PUTL t38, R29
+ 61: INCEIPL $4
+
+ 0x254809E8: 7F98FA14 add r28,r24,r31
+ 62: GETL R24, t40
+ 63: GETL R31, t42
+ 64: ADDL t40, t42
+ 65: PUTL t42, R28
+ 66: INCEIPL $4
+
+ 0x254809EC: 7C18F92E stwx r0,r24,r31
+ 67: GETL R31, t44
+ 68: GETL R24, t46
+ 69: ADDL t46, t44
+ 70: GETL R0, t48
+ 71: STL t48, (t44)
+ 72: INCEIPL $4
+
+ 0x254809F0: 38840002 addi r4,r4,2
+ 73: GETL R4, t50
+ 74: ADDL $0x2, t50
+ 75: PUTL t50, R4
+ 76: INCEIPL $4
+
+ 0x254809F4: 93BC0004 stw r29,4(r28)
+ 77: GETL R29, t52
+ 78: GETL R28, t54
+ 79: ADDL $0x4, t54
+ 80: STL t52, (t54)
+ 81: INCEIPL $4
+
+ 0x254809F8: 38E7FFF8 addi r7,r7,-8
+ 82: MOVL $0xFFFFFFCC, t56
+ 83: PUTL t56, R7
+ 84: INCEIPL $4
+
+ 0x254809FC: 4082FFB8 bc 4,2,0x254809B4
+ 85: Jc02o $0x254809B4
+
+
+
+. 1130 254809B0 80
+. 38 E0 FF D4 55 0A 14 3A 39 08 00 01 7D 7B 40 10 7D 6B 59 10 7D 6B 00 D0 21 88 1F FF 39 80 00 00 7D 8C 61 14 7D 69 60 39 54 98 10 3A 54 E5 01 BA 65 40 39 60 64 BD 48 00 7F 98 FA 14 7C 18 F9 2E 38 84 00 02 93 BC 00 04 38 E7 FF F8 40 82 FF B8
+==== BB 1131 (0x254809B4) approx BBs exec'd 0 ====
+
+ 0x254809B4: 550A143A rlwinm r10,r8,2,16,29
+ 0: GETL R8, t0
+ 1: ROLL $0x2, t0
+ 2: ANDL $0xFFFC, t0
+ 3: PUTL t0, R10
+ 4: INCEIPL $4
+
+ 0x254809B8: 39080001 addi r8,r8,1
+ 5: GETL R8, t2
+ 6: ADDL $0x1, t2
+ 7: PUTL t2, R8
+ 8: INCEIPL $4
+
+ 0x254809BC: 7D7B4010 subfc r11,r27,r8
+ 9: GETL R27, t4
+ 10: GETL R8, t6
+ 11: SBBL t4, t6 (-wCa)
+ 12: PUTL t6, R11
+ 13: INCEIPL $4
+
+ 0x254809C0: 7D6B5910 subfe r11,r11,r11
+ 14: GETL R11, t8
+ 15: GETL R11, t10
+ 16: SBBL t8, t10 (-rCa-wCa)
+ 17: PUTL t10, R11
+ 18: INCEIPL $4
+
+ 0x254809C4: 7D6B00D0 neg r11,r11
+ 19: GETL R11, t12
+ 20: NEGL t12
+ 21: PUTL t12, R11
+ 22: INCEIPL $4
+
+ 0x254809C8: 21881FFF subfic r12,r8,8191
+ 23: GETL R8, t14
+ 24: MOVL $0x1FFF, t16
+ 25: SBBL t14, t16 (-wCa)
+ 26: PUTL t16, R12
+ 27: INCEIPL $4
+
+ 0x254809CC: 39800000 li r12,0
+ 28: MOVL $0x0, t18
+ 29: PUTL t18, R12
+ 30: INCEIPL $4
+
+ 0x254809D0: 7D8C6114 adde r12,r12,r12
+ 31: GETL R12, t20
+ 32: GETL R12, t22
+ 33: ADCL t20, t22 (-rCa-wCa)
+ 34: PUTL t22, R12
+ 35: INCEIPL $4
+
+ 0x254809D4: 7D696039 and. r9,r11,r12
+ 36: GETL R11, t24
+ 37: GETL R12, t26
+ 38: ANDL t24, t26
+ 39: PUTL t26, R9
+ 40: CMP0L t26, t28 (-rSo)
+ 41: ICRFL t28, $0x0, CR
+ 42: INCEIPL $4
+
+ 0x254809D8: 5498103A rlwinm r24,r4,2,0,29
+ 43: GETL R4, t30
+ 44: SHLL $0x2, t30
+ 45: PUTL t30, R24
+ 46: INCEIPL $4
+
+ 0x254809DC: 54E501BA rlwinm r5,r7,0,6,29
+ 47: GETL R7, t32
+ 48: ANDL $0x3FFFFFC, t32
+ 49: PUTL t32, R5
+ 50: INCEIPL $4
+
+ 0x254809E0: 65403960 oris r0,r10,0x3960
+ 51: GETL R10, t34
+ 52: ORL $0x39600000, t34
+ 53: PUTL t34, R0
+ 54: INCEIPL $4
+
+ 0x254809E4: 64BD4800 oris r29,r5,0x4800
+ 55: GETL R5, t36
+ 56: ORL $0x48000000, t36
+ 57: PUTL t36, R29
+ 58: INCEIPL $4
+
+ 0x254809E8: 7F98FA14 add r28,r24,r31
+ 59: GETL R24, t38
+ 60: GETL R31, t40
+ 61: ADDL t38, t40
+ 62: PUTL t40, R28
+ 63: INCEIPL $4
+
+ 0x254809EC: 7C18F92E stwx r0,r24,r31
+ 64: GETL R31, t42
+ 65: GETL R24, t44
+ 66: ADDL t44, t42
+ 67: GETL R0, t46
+ 68: STL t46, (t42)
+ 69: INCEIPL $4
+
+ 0x254809F0: 38840002 addi r4,r4,2
+ 70: GETL R4, t48
+ 71: ADDL $0x2, t48
+ 72: PUTL t48, R4
+ 73: INCEIPL $4
+
+ 0x254809F4: 93BC0004 stw r29,4(r28)
+ 74: GETL R29, t50
+ 75: GETL R28, t52
+ 76: ADDL $0x4, t52
+ 77: STL t50, (t52)
+ 78: INCEIPL $4
+
+ 0x254809F8: 38E7FFF8 addi r7,r7,-8
+ 79: GETL R7, t54
+ 80: ADDL $0xFFFFFFF8, t54
+ 81: PUTL t54, R7
+ 82: INCEIPL $4
+
+ 0x254809FC: 4082FFB8 bc 4,2,0x254809B4
+ 83: Jc02o $0x254809B4
+
+
+
+. 1131 254809B4 76
+. 55 0A 14 3A 39 08 00 01 7D 7B 40 10 7D 6B 59 10 7D 6B 00 D0 21 88 1F FF 39 80 00 00 7D 8C 61 14 7D 69 60 39 54 98 10 3A 54 E5 01 BA 65 40 39 60 64 BD 48 00 7F 98 FA 14 7C 18 F9 2E 38 84 00 02 93 BC 00 04 38 E7 FF F8 40 82 FF B8
+==== BB 1132 (0x25480A00) approx BBs exec'd 0 ====
+
+ 0x25480A00: 7C88D840 cmpl cr1,r8,r27
+ 0: GETL R8, t0
+ 1: GETL R27, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25480A04: 40840074 bc 4,4,0x25480A78
+ 5: Jc04o $0x25480A78
+
+
+
+. 1132 25480A00 8
+. 7C 88 D8 40 40 84 00 74
+==== BB 1133 (0x25480A98) approx BBs exec'd 0 ====
+
+ 0x25480A98: 800B0000 lwz r0,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25480A9C: 2F000000 cmpi cr6,r0,0
+ 4: GETL R0, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x25480AA0: 409A00C4 bc 4,26,0x25480B64
+ 8: Jc26o $0x25480B64
+
+
+
+. 1133 25480A98 12
+. 80 0B 00 00 2F 00 00 00 40 9A 00 C4
+==== BB 1134 (0x25480B64) approx BBs exec'd 0 ====
+
+ 0x25480B64: 7C0A1670 srawi r10,r0,2
+ 0: GETL R0, t0
+ 1: SARL $0x2, t0 (-wCa)
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0x25480B68: 7D4A0194 addze r10,r10
+ 4: GETL R10, t2
+ 5: ADCL $0x0, t2 (-rCa-wCa)
+ 6: PUTL t2, R10
+ 7: INCEIPL $4
+
+ 0x25480B6C: 4BFFFF38 b 0x25480AA4
+ 8: JMPo $0x25480AA4 ($4)
+
+
+
+. 1134 25480B64 12
+. 7C 0A 16 70 7D 4A 01 94 4B FF FF 38
+==== BB 1135 (0x25480AA8) approx BBs exec'd 0 ====
+
+ 0x25480AA8: 7EEBBB78 or r11,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x25480AAC: 39200000 li r9,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x25480AB0: 48000014 b 0x25480AC4
+ 6: JMPo $0x25480AC4 ($4)
+
+
+
+. 1135 25480AA8 12
+. 7E EB BB 78 39 20 00 00 48 00 00 14
+==== BB 1136 (0x25479688) approx BBs exec'd 0 ====
+
+ 0x25479688: 83BF000C lwz r29,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x2547968C: 38C00000 li r6,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0x25479690: 939F0034 stw r28,52(r31)
+ 8: GETL R28, t6
+ 9: GETL R31, t8
+ 10: ADDL $0x34, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25479694: 817D003C lwz r11,60(r29)
+ 13: GETL R29, t10
+ 14: ADDL $0x3C, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R11
+ 17: INCEIPL $4
+
+ 0x25479698: 937F0030 stw r27,48(r31)
+ 18: GETL R27, t14
+ 19: GETL R31, t16
+ 20: ADDL $0x30, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x2547969C: 2C8B0000 cmpi cr1,r11,0
+ 23: GETL R11, t18
+ 24: CMP0L t18, t20 (-rSo)
+ 25: ICRFL t20, $0x1, CR
+ 26: INCEIPL $4
+
+ 0x254796A0: 937F0040 stw r27,64(r31)
+ 27: GETL R27, t22
+ 28: GETL R31, t24
+ 29: ADDL $0x40, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0x254796A4: 937F0028 stw r27,40(r31)
+ 32: GETL R27, t26
+ 33: GETL R31, t28
+ 34: ADDL $0x28, t28
+ 35: STL t26, (t28)
+ 36: INCEIPL $4
+
+ 0x254796A8: 937F003C stw r27,60(r31)
+ 37: GETL R27, t30
+ 38: GETL R31, t32
+ 39: ADDL $0x3C, t32
+ 40: STL t30, (t32)
+ 41: INCEIPL $4
+
+ 0x254796AC: 90DF0024 stw r6,36(r31)
+ 42: GETL R6, t34
+ 43: GETL R31, t36
+ 44: ADDL $0x24, t36
+ 45: STL t34, (t36)
+ 46: INCEIPL $4
+
+ 0x254796B0: 41860018 bc 12,6,0x254796C8
+ 47: Js06o $0x254796C8
+
+
+
+. 1136 25479688 44
+. 83 BF 00 0C 38 C0 00 00 93 9F 00 34 81 7D 00 3C 93 7F 00 30 2C 8B 00 00 93 7F 00 40 93 7F 00 28 93 7F 00 3C 90 DF 00 24 41 86 00 18
+==== BB 1137 (0x254796B4) approx BBs exec'd 0 ====
+
+ 0x254796B4: 810B0004 lwz r8,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254796B8: 809D0040 lwz r4,64(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x40, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x254796BC: 911F0020 stw r8,32(r31)
+ 10: GETL R8, t8
+ 11: GETL R31, t10
+ 12: ADDL $0x20, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x254796C0: 80C40004 lwz r6,4(r4)
+ 15: GETL R4, t12
+ 16: ADDL $0x4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R6
+ 19: INCEIPL $4
+
+ 0x254796C4: 90DF0024 stw r6,36(r31)
+ 20: GETL R6, t16
+ 21: GETL R31, t18
+ 22: ADDL $0x24, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x254796C8: 2E030000 cmpi cr4,r3,0
+ 25: GETL R3, t20
+ 26: CMP0L t20, t22 (-rSo)
+ 27: ICRFL t22, $0x4, CR
+ 28: INCEIPL $4
+
+ 0x254796CC: 41920010 bc 12,18,0x254796DC
+ 29: Js18o $0x254796DC
+
+
+
+. 1137 254796B4 28
+. 81 0B 00 04 80 9D 00 40 91 1F 00 20 80 C4 00 04 90 DF 00 24 2E 03 00 00 41 92 00 10
+==== BB 1138 (0x254796D0) approx BBs exec'd 0 ====
+
+ 0x254796D0: 817D0070 lwz r11,112(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x70, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254796D4: 2F0B0000 cmpi cr6,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x254796D8: 409A033C bc 4,26,0x25479A14
+ 9: Jc26o $0x25479A14
+
+
+
+. 1138 254796D0 12
+. 81 7D 00 70 2F 0B 00 00 40 9A 03 3C
+==== BB 1139 (0x25479A14) approx BBs exec'd 0 ====
+
+ 0x25479A14: 835D007C lwz r26,124(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x7C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25479A18: 833D0028 lwz r25,40(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x28, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0x25479A1C: 829A0004 lwz r20,4(r26)
+ 10: GETL R26, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R20
+ 14: INCEIPL $4
+
+ 0x25479A20: 82BF0020 lwz r21,32(r31)
+ 15: GETL R31, t12
+ 16: ADDL $0x20, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R21
+ 19: INCEIPL $4
+
+ 0x25479A24: 929F002C stw r20,44(r31)
+ 20: GETL R20, t16
+ 21: GETL R31, t18
+ 22: ADDL $0x2C, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25479A28: 82590004 lwz r18,4(r25)
+ 25: GETL R25, t20
+ 26: ADDL $0x4, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R18
+ 29: INCEIPL $4
+
+ 0x25479A2C: 7D553214 add r10,r21,r6
+ 30: GETL R21, t24
+ 31: GETL R6, t26
+ 32: ADDL t24, t26
+ 33: PUTL t26, R10
+ 34: INCEIPL $4
+
+ 0x25479A30: 7D35A050 subf r9,r21,r20
+ 35: GETL R21, t28
+ 36: GETL R20, t30
+ 37: SUBL t28, t30
+ 38: PUTL t30, R9
+ 39: INCEIPL $4
+
+ 0x25479A34: 7E149214 add r16,r20,r18
+ 40: GETL R20, t32
+ 41: GETL R18, t34
+ 42: ADDL t32, t34
+ 43: PUTL t34, R16
+ 44: INCEIPL $4
+
+ 0x25479A38: 913F0024 stw r9,36(r31)
+ 45: GETL R9, t36
+ 46: GETL R31, t38
+ 47: ADDL $0x24, t38
+ 48: STL t36, (t38)
+ 49: INCEIPL $4
+
+ 0x25479A3C: 7E705050 subf r19,r16,r10
+ 50: GETL R16, t40
+ 51: GETL R10, t42
+ 52: SUBL t40, t42
+ 53: PUTL t42, R19
+ 54: INCEIPL $4
+
+ 0x25479A40: 925F0030 stw r18,48(r31)
+ 55: GETL R18, t44
+ 56: GETL R31, t46
+ 57: ADDL $0x30, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0x25479A44: 927F003C stw r19,60(r31)
+ 60: GETL R19, t48
+ 61: GETL R31, t50
+ 62: ADDL $0x3C, t50
+ 63: STL t48, (t50)
+ 64: INCEIPL $4
+
+ 0x25479A48: 921F0038 stw r16,56(r31)
+ 65: GETL R16, t52
+ 66: GETL R31, t54
+ 67: ADDL $0x38, t54
+ 68: STL t52, (t54)
+ 69: INCEIPL $4
+
+ 0x25479A4C: 4BFFFC90 b 0x254796DC
+ 70: JMPo $0x254796DC ($4)
+
+
+
+. 1139 25479A14 60
+. 83 5D 00 7C 83 3D 00 28 82 9A 00 04 82 BF 00 20 92 9F 00 2C 82 59 00 04 7D 55 32 14 7D 35 A0 50 7E 14 92 14 91 3F 00 24 7E 70 50 50 92 5F 00 30 92 7F 00 3C 92 1F 00 38 4B FF FC 90
+==== BB 1140 (0x254796DC) approx BBs exec'd 0 ====
+
+ 0x254796DC: 821E04C8 lwz r16,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R16
+ 4: INCEIPL $4
+
+ 0x254796E0: 3ABF0008 addi r21,r31,8
+ 5: GETL R31, t4
+ 6: ADDL $0x8, t4
+ 7: PUTL t4, R21
+ 8: INCEIPL $4
+
+ 0x254796E4: 3A400002 li r18,2
+ 9: MOVL $0x2, t6
+ 10: PUTL t6, R18
+ 11: INCEIPL $4
+
+ 0x254796E8: 80B50020 lwz r5,32(r21)
+ 12: GETL R21, t8
+ 13: ADDL $0x20, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0x254796EC: 7FB6EB78 or r22,r29,r29
+ 17: GETL R29, t12
+ 18: PUTL t12, R22
+ 19: INCEIPL $4
+
+ 0x254796F0: 81750018 lwz r11,24(r21)
+ 20: GETL R21, t14
+ 21: ADDL $0x18, t14
+ 22: LDL (t14), t16
+ 23: PUTL t16, R11
+ 24: INCEIPL $4
+
+ 0x254796F4: 2C050000 cmpi cr0,r5,0
+ 25: GETL R5, t18
+ 26: CMP0L t18, t20 (-rSo)
+ 27: ICRFL t20, $0x0, CR
+ 28: INCEIPL $4
+
+ 0x254796F8: 8115001C lwz r8,28(r21)
+ 29: GETL R21, t22
+ 30: ADDL $0x1C, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R8
+ 33: INCEIPL $4
+
+ 0x254796FC: 7D695B78 or r9,r11,r11
+ 34: GETL R11, t26
+ 35: PUTL t26, R9
+ 36: INCEIPL $4
+
+ 0x25479700: 833D0000 lwz r25,0(r29)
+ 37: GETL R29, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R25
+ 40: INCEIPL $4
+
+ 0x25479704: 7F0B4214 add r24,r11,r8
+ 41: GETL R11, t32
+ 42: GETL R8, t34
+ 43: ADDL t32, t34
+ 44: PUTL t34, R24
+ 45: INCEIPL $4
+
+ 0x25479708: 418200BC bc 12,2,0x254797C4
+ 46: Js02o $0x254797C4
+
+
+
+. 1140 254796DC 48
+. 82 1E 04 C8 3A BF 00 08 3A 40 00 02 80 B5 00 20 7F B6 EB 78 81 75 00 18 2C 05 00 00 81 15 00 1C 7D 69 5B 78 83 3D 00 00 7F 0B 42 14 41 82 00 BC
+==== BB 1141 (0x254797C4) approx BBs exec'd 0 ====
+
+ 0x254797C4: 815D00C0 lwz r10,192(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x254797C8: 38E00000 li r7,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x254797CC: 807D0038 lwz r3,56(r29)
+ 8: GETL R29, t6
+ 9: ADDL $0x38, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0x254797D0: 2F8A0000 cmpi cr7,r10,0
+ 13: GETL R10, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x7, CR
+ 16: INCEIPL $4
+
+ 0x254797D4: 82630004 lwz r19,4(r3)
+ 17: GETL R3, t14
+ 18: ADDL $0x4, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R19
+ 21: INCEIPL $4
+
+ 0x254797D8: 419E0008 bc 12,30,0x254797E0
+ 22: Js30o $0x254797E0
+
+
+
+. 1141 254797C4 24
+. 81 5D 00 C0 38 E0 00 00 80 7D 00 38 2F 8A 00 00 82 63 00 04 41 9E 00 08
+==== BB 1142 (0x254797DC) approx BBs exec'd 0 ====
+
+ 0x254797DC: 80EA0004 lwz r7,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254797E0: 3C00AAAA lis r0,-21846
+ 5: MOVL $0xAAAA0000, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x254797E4: 600CAAAB ori r12,r0,0xAAAB
+ 8: MOVL $0xAAAAAAAB, t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0x254797E8: 7EE86016 mulhwu r23,r8,r12
+ 11: GETL R8, t8
+ 12: GETL R12, t10
+ 13: UMULHL t8, t10
+ 14: PUTL t10, R23
+ 15: INCEIPL $4
+
+ 0x254797EC: 56E9E8FE rlwinm r9,r23,29,3,31
+ 16: GETL R23, t12
+ 17: SHRL $0x3, t12
+ 18: PUTL t12, R9
+ 19: INCEIPL $4
+
+ 0x254797F0: 7C893840 cmpl cr1,r9,r7
+ 20: GETL R9, t14
+ 21: GETL R7, t16
+ 22: CMPUL t14, t16, t18 (-rSo)
+ 23: ICRFL t18, $0x1, CR
+ 24: INCEIPL $4
+
+ 0x254797F4: 40850008 bc 4,5,0x254797FC
+ 25: Jc05o $0x254797FC
+
+
+
+. 1142 254797DC 28
+. 80 EA 00 04 3C 00 AA AA 60 0C AA AB 7E E8 60 16 56 E9 E8 FE 7C 89 38 40 40 85 00 08
+==== BB 1143 (0x254797F8) approx BBs exec'd 0 ====
+
+ 0x254797F8: 7CE93B78 or r9,r7,r7
+ 0: GETL R7, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x254797FC: 3B7001B8 addi r27,r16,440
+ 3: GETL R16, t2
+ 4: ADDL $0x1B8, t2
+ 5: PUTL t2, R27
+ 6: INCEIPL $4
+
+ 0x25479800: 1CE9000C mulli r7,r9,12
+ 7: GETL R9, t4
+ 8: MULL $0xC, t4
+ 9: PUTL t4, R7
+ 10: INCEIPL $4
+
+ 0x25479804: 7E1DD800 cmp cr4,r29,r27
+ 11: GETL R29, t6
+ 12: GETL R27, t8
+ 13: CMPL t6, t8, t10 (-rSo)
+ 14: ICRFL t10, $0x4, CR
+ 15: INCEIPL $4
+
+ 0x25479808: 7F8B3A14 add r28,r11,r7
+ 16: GETL R11, t12
+ 17: GETL R7, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0x2547980C: 41920018 bc 12,18,0x25479824
+ 21: Js18o $0x25479824
+
+
+
+. 1143 254797F8 24
+. 7C E9 3B 78 3B 70 01 B8 1C E9 00 0C 7E 1D D8 00 7F 8B 3A 14 41 92 00 18
+==== BB 1144 (0x25479810) approx BBs exec'd 0 ====
+
+ 0x25479810: 2F190000 cmpi cr6,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25479814: 409A01CC bc 4,26,0x254799E0
+ 4: Jc26o $0x254799E0
+
+
+
+. 1144 25479810 8
+. 2F 19 00 00 40 9A 01 CC
+==== BB 1145 (0x25479818) approx BBs exec'd 0 ====
+
+ 0x25479818: 80DD011C lwz r6,284(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x11C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547981C: 2C060000 cmpi cr0,r6,0
+ 5: GETL R6, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25479820: 418201C0 bc 12,2,0x254799E0
+ 9: Js02o $0x254799E0
+
+
+
+. 1145 25479818 12
+. 80 DD 01 1C 2C 06 00 00 41 82 01 C0
+==== BB 1146 (0x25479824) approx BBs exec'd 0 ====
+
+ 0x25479824: 813D00E4 lwz r9,228(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xE4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25479828: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547982C: 419E0280 bc 12,30,0x25479AAC
+ 9: Js30o $0x25479AAC
+
+
+
+. 1146 25479824 12
+. 81 3D 00 E4 2F 89 00 00 41 9E 02 80
+==== BB 1147 (0x25479830) approx BBs exec'd 0 ====
+
+ 0x25479830: 7C9CC040 cmpl cr1,r28,r24
+ 0: GETL R28, t0
+ 1: GETL R24, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25479834: 82890004 lwz r20,4(r9)
+ 5: GETL R9, t6
+ 6: ADDL $0x4, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R20
+ 9: INCEIPL $4
+
+ 0x25479838: 40A4FEE8 bc 5,4,0x25479720
+ 10: Jc04o $0x25479720
+
+
+
+. 1147 25479830 12
+. 7C 9C C0 40 82 89 00 04 40 A4 FE E8
+==== BB 1148 (0x2547983C) approx BBs exec'd 0 ====
+
+ 0x2547983C: 819C0004 lwz r12,4(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x25479840: 81560188 lwz r10,392(r22)
+ 5: GETL R22, t4
+ 6: ADDL $0x188, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x25479844: 5597C23E rlwinm r23,r12,24,8,31
+ 10: GETL R12, t8
+ 11: SHRL $0x8, t8
+ 12: PUTL t8, R23
+ 13: INCEIPL $4
+
+ 0x25479848: 559D063E rlwinm r29,r12,0,24,31
+ 14: GETL R12, t10
+ 15: ANDL $0xFF, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0x2547984C: 56EB083C rlwinm r11,r23,1,0,30
+ 18: GETL R23, t12
+ 19: SHLL $0x1, t12
+ 20: PUTL t12, R11
+ 21: INCEIPL $4
+
+ 0x25479850: 2E1D0016 cmpi cr4,r29,22
+ 22: GETL R29, t14
+ 23: MOVL $0x16, t18
+ 24: CMPL t14, t18, t16 (-rSo)
+ 25: ICRFL t16, $0x4, CR
+ 26: INCEIPL $4
+
+ 0x25479854: 7CABA22E lhzx r5,r11,r20
+ 27: GETL R20, t20
+ 28: GETL R11, t22
+ 29: ADDL t22, t20
+ 30: LDW (t20), t24
+ 31: PUTL t24, R5
+ 32: INCEIPL $4
+
+ 0x25479858: 56E32036 rlwinm r3,r23,4,0,27
+ 33: GETL R23, t26
+ 34: SHLL $0x4, t26
+ 35: PUTL t26, R3
+ 36: INCEIPL $4
+
+ 0x2547985C: 817C0000 lwz r11,0(r28)
+ 37: GETL R28, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R11
+ 40: INCEIPL $4
+
+ 0x25479860: 7F639A14 add r27,r3,r19
+ 41: GETL R3, t32
+ 42: GETL R19, t34
+ 43: ADDL t32, t34
+ 44: PUTL t34, R27
+ 45: INCEIPL $4
+
+ 0x25479864: 54BA2376 rlwinm r26,r5,4,13,27
+ 46: GETL R5, t36
+ 47: ROLL $0x4, t36
+ 48: ANDL $0x7FFF0, t36
+ 49: PUTL t36, R26
+ 50: INCEIPL $4
+
+ 0x25479868: 937F0050 stw r27,80(r31)
+ 51: GETL R27, t38
+ 52: GETL R31, t40
+ 53: ADDL $0x50, t40
+ 54: STL t38, (t40)
+ 55: INCEIPL $4
+
+ 0x2547986C: 7D4AD214 add r10,r10,r26
+ 56: GETL R10, t42
+ 57: GETL R26, t44
+ 58: ADDL t42, t44
+ 59: PUTL t44, R10
+ 60: INCEIPL $4
+
+ 0x25479870: 7EEBCA14 add r23,r11,r25
+ 61: GETL R11, t46
+ 62: GETL R25, t48
+ 63: ADDL t46, t48
+ 64: PUTL t48, R23
+ 65: INCEIPL $4
+
+ 0x25479874: 7F66DB78 or r6,r27,r27
+ 66: GETL R27, t50
+ 67: PUTL t50, R6
+ 68: INCEIPL $4
+
+ 0x25479878: 3B400000 li r26,0
+ 69: MOVL $0x0, t52
+ 70: PUTL t52, R26
+ 71: INCEIPL $4
+
+ 0x2547987C: 419201DC bc 12,18,0x25479A58
+ 72: Js18o $0x25479A58
+
+
+
+. 1148 2547983C 68
+. 81 9C 00 04 81 56 01 88 55 97 C2 3E 55 9D 06 3E 56 EB 08 3C 2E 1D 00 16 7C AB A2 2E 56 E3 20 36 81 7C 00 00 7F 63 9A 14 54 BA 23 76 93 7F 00 50 7D 4A D2 14 7E EB CA 14 7F 66 DB 78 3B 40 00 00 41 92 01 DC
+==== BB 1149 (0x25479880) approx BBs exec'd 0 ====
+
+ 0x25479880: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25479884: 419A0148 bc 12,26,0x254799CC
+ 4: Js26o $0x254799CC
+
+
+
+. 1149 25479880 8
+. 2F 1D 00 00 41 9A 01 48
+==== BB 1150 (0x25479888) approx BBs exec'd 0 ====
+
+ 0x25479888: 889B000C lbz r4,12(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547988C: 5488E13F rlwinm. r8,r4,28,4,31
+ 5: GETL R4, t4
+ 6: SHRL $0x4, t4
+ 7: PUTL t4, R8
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25479890: 4182062C bc 12,2,0x25479EBC
+ 11: Js02o $0x25479EBC
+
+
+
+. 1150 25479888 12
+. 88 9B 00 0C 54 88 E1 3F 41 82 06 2C
+==== BB 1151 (0x25479894) approx BBs exec'd 0 ====
+
+ 0x25479894: 8B5B000C lbz r26,12(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25479898: 5749E13F rlwinm. r9,r26,28,4,31
+ 5: GETL R26, t4
+ 6: SHRL $0x4, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x2547989C: 418201B4 bc 12,2,0x25479A50
+ 11: Js02o $0x25479A50
+
+
+
+. 1151 25479894 12
+. 8B 5B 00 0C 57 49 E1 3F 41 82 01 B4
+==== BB 1152 (0x254798A0) approx BBs exec'd 0 ====
+
+ 0x254798A0: 809F000C lwz r4,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254798A4: 2E1D0015 cmpi cr4,r29,21
+ 5: GETL R29, t4
+ 6: MOVL $0x15, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x4, CR
+ 9: INCEIPL $4
+
+ 0x254798A8: 2C9D000A cmpi cr1,r29,10
+ 10: GETL R29, t10
+ 11: MOVL $0xA, t14
+ 12: CMPL t10, t14, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x254798AC: 2F1D0013 cmpi cr6,r29,19
+ 15: GETL R29, t16
+ 16: MOVL $0x13, t20
+ 17: CMPL t16, t20, t18 (-rSo)
+ 18: ICRFL t18, $0x6, CR
+ 19: INCEIPL $4
+
+ 0x254798B0: 80C40208 lwz r6,520(r4)
+ 20: GETL R4, t22
+ 21: ADDL $0x208, t22
+ 22: LDL (t22), t24
+ 23: PUTL t24, R6
+ 24: INCEIPL $4
+
+ 0x254798B4: 7F86D800 cmp cr7,r6,r27
+ 25: GETL R6, t26
+ 26: GETL R27, t28
+ 27: CMPL t26, t28, t30 (-rSo)
+ 28: ICRFL t30, $0x7, CR
+ 29: INCEIPL $4
+
+ 0x254798B8: 419E062C bc 12,30,0x25479EE4
+ 30: Js30o $0x25479EE4
+
+
+
+. 1152 254798A0 28
+. 80 9F 00 0C 2E 1D 00 15 2C 9D 00 0A 2F 1D 00 13 80 C4 02 08 7F 86 D8 00 41 9E 06 2C
+==== BB 1153 (0x254798BC) approx BBs exec'd 0 ====
+
+ 0x254798BC: 7CC00026 mfcr r6
+ 0: GETL CR, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x254798C0: 54C69FFE rlwinm r6,r6,19,31,31
+ 3: GETL R6, t2
+ 4: ROLL $0x13, t2
+ 5: ANDL $0x1, t2
+ 6: PUTL t2, R6
+ 7: INCEIPL $4
+
+ 0x254798C4: 39000000 li r8,0
+ 8: MOVL $0x0, t4
+ 9: PUTL t4, R8
+ 10: INCEIPL $4
+
+ 0x254798C8: 7F400026 mfcr r26
+ 11: GETL CR, t6
+ 12: PUTL t6, R26
+ 13: INCEIPL $4
+
+ 0x254798CC: 575A3FFE rlwinm r26,r26,7,31,31
+ 14: GETL R26, t8
+ 15: ROLL $0x7, t8
+ 16: ANDL $0x1, t8
+ 17: PUTL t8, R26
+ 18: INCEIPL $4
+
+ 0x254798D0: 7CCBD379 or. r11,r6,r26
+ 19: GETL R6, t10
+ 20: GETL R26, t12
+ 21: ORL t12, t10
+ 22: PUTL t10, R11
+ 23: CMP0L t10, t14 (-rSo)
+ 24: ICRFL t14, $0x0, CR
+ 25: INCEIPL $4
+
+ 0x254798D4: 40820130 bc 4,2,0x25479A04
+ 26: Jc02o $0x25479A04
+
+
+
+. 1153 254798BC 28
+. 7C C0 00 26 54 C6 9F FE 39 00 00 00 7F 40 00 26 57 5A 3F FE 7C CB D3 79 40 82 01 30
+==== BB 1154 (0x254798D8) approx BBs exec'd 0 ====
+
+ 0x254798D8: 387DFFBC addi r3,r29,-68
+ 0: GETL R29, t0
+ 1: ADDL $0xFFFFFFBC, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x254798DC: 6BA50002 xori r5,r29,0x2
+ 4: GETL R29, t2
+ 5: XORL $0x2, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0x254798E0: 21650000 subfic r11,r5,0
+ 8: GETL R5, t4
+ 9: MOVL $0x0, t6
+ 10: SBBL t4, t6 (-wCa)
+ 11: PUTL t6, R11
+ 12: INCEIPL $4
+
+ 0x254798E4: 7CAB2914 adde r5,r11,r5
+ 13: GETL R11, t8
+ 14: GETL R5, t10
+ 15: ADCL t8, t10 (-rCa-wCa)
+ 16: PUTL t10, R5
+ 17: INCEIPL $4
+
+ 0x254798E8: 2123000A subfic r9,r3,10
+ 18: GETL R3, t12
+ 19: MOVL $0xA, t14
+ 20: SBBL t12, t14 (-wCa)
+ 21: PUTL t14, R9
+ 22: INCEIPL $4
+
+ 0x254798EC: 39200000 li r9,0
+ 23: MOVL $0x0, t16
+ 24: PUTL t16, R9
+ 25: INCEIPL $4
+
+ 0x254798F0: 7D294914 adde r9,r9,r9
+ 26: GETL R9, t18
+ 27: GETL R9, t20
+ 28: ADCL t18, t20 (-rCa-wCa)
+ 29: PUTL t20, R9
+ 30: INCEIPL $4
+
+ 0x254798F4: 7D2B2B79 or. r11,r9,r5
+ 31: GETL R9, t22
+ 32: GETL R5, t24
+ 33: ORL t24, t22
+ 34: PUTL t22, R11
+ 35: CMP0L t22, t26 (-rSo)
+ 36: ICRFL t26, $0x0, CR
+ 37: INCEIPL $4
+
+ 0x254798F8: 4082010C bc 4,2,0x25479A04
+ 38: Jc02o $0x25479A04
+
+
+
+. 1154 254798D8 36
+. 38 7D FF BC 6B A5 00 02 21 65 00 00 7C AB 29 14 21 23 00 0A 39 20 00 00 7D 29 49 14 7D 2B 2B 79 40 82 01 0C
+==== BB 1155 (0x254798FC) approx BBs exec'd 0 ====
+
+ 0x254798FC: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25479900: 5400DFFE rlwinm r0,r0,27,31,31
+ 3: GETL R0, t2
+ 4: ROLL $0x1B, t2
+ 5: ANDL $0x1, t2
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0x25479904: 2C8A0000 cmpi cr1,r10,0
+ 8: GETL R10, t4
+ 9: CMP0L t4, t6 (-rSo)
+ 10: ICRFL t6, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x25479908: 93640208 stw r27,520(r4)
+ 12: GETL R27, t8
+ 13: GETL R4, t10
+ 14: ADDL $0x208, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x2547990C: 38E00000 li r7,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R7
+ 19: INCEIPL $4
+
+ 0x25479910: 540C083C rlwinm r12,r0,1,0,30
+ 20: GETL R0, t14
+ 21: SHLL $0x1, t14
+ 22: PUTL t14, R12
+ 23: INCEIPL $4
+
+ 0x25479914: 39600001 li r11,1
+ 24: MOVL $0x1, t16
+ 25: PUTL t16, R11
+ 26: INCEIPL $4
+
+ 0x25479918: 7D884378 or r8,r12,r8
+ 27: GETL R12, t18
+ 28: GETL R8, t20
+ 29: ORL t20, t18
+ 30: PUTL t18, R8
+ 31: INCEIPL $4
+
+ 0x2547991C: 9104020C stw r8,524(r4)
+ 32: GETL R8, t22
+ 33: GETL R4, t24
+ 34: ADDL $0x20C, t24
+ 35: STL t22, (t24)
+ 36: INCEIPL $4
+
+ 0x25479920: 41860018 bc 12,6,0x25479938
+ 37: Js06o $0x25479938
+
+
+
+. 1155 254798FC 40
+. 7C 00 00 26 54 00 DF FE 2C 8A 00 00 93 64 02 08 38 E0 00 00 54 0C 08 3C 39 60 00 01 7D 88 43 78 91 04 02 0C 41 86 00 18
+==== BB 1156 (0x25479924) approx BBs exec'd 0 ====
+
+ 0x25479924: 834A0004 lwz r26,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25479928: 2E1A0000 cmpi cr4,r26,0
+ 5: GETL R26, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x2547992C: 4192000C bc 12,18,0x25479938
+ 9: Js18o $0x25479938
+
+
+
+. 1156 25479924 12
+. 83 4A 00 04 2E 1A 00 00 41 92 00 0C
+==== BB 1157 (0x25479930) approx BBs exec'd 0 ====
+
+ 0x25479930: 7D475378 or r7,r10,r10
+ 0: GETL R10, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x25479934: 39600000 li r11,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0x25479938: 80DF0050 lwz r6,80(r31)
+ 6: GETL R31, t4
+ 7: ADDL $0x50, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0x2547993C: 7D695B78 or r9,r11,r11
+ 11: GETL R11, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0x25479940: 815F0008 lwz r10,8(r31)
+ 14: GETL R31, t10
+ 15: ADDL $0x8, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x25479944: 80A60000 lwz r5,0(r6)
+ 19: GETL R6, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R5
+ 22: INCEIPL $4
+
+ 0x25479948: 80DF0010 lwz r6,16(r31)
+ 23: GETL R31, t18
+ 24: ADDL $0x10, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R6
+ 27: INCEIPL $4
+
+ 0x2547994C: 7C655214 add r3,r5,r10
+ 28: GETL R5, t22
+ 29: GETL R10, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R3
+ 32: INCEIPL $4
+
+ 0x25479950: 38BF0050 addi r5,r31,80
+ 33: GETL R31, t26
+ 34: ADDL $0x50, t26
+ 35: PUTL t26, R5
+ 36: INCEIPL $4
+
+ 0x25479954: 39400000 li r10,0
+ 37: MOVL $0x0, t28
+ 38: PUTL t28, R10
+ 39: INCEIPL $4
+
+ 0x25479958: 4BFFEC4D bl 0x254785A4
+ 40: MOVL $0x2547995C, t30
+ 41: PUTL t30, LR
+ 42: JMPo-c $0x254785A4 ($4)
+
+
+
+. 1157 25479930 44
+. 7D 47 53 78 39 60 00 00 80 DF 00 50 7D 69 5B 78 81 5F 00 08 80 A6 00 00 80 DF 00 10 7C 65 52 14 38 BF 00 50 39 40 00 00 4B FF EC 4D
+==== BB 1158 _dl_lookup_symbol_x(0x254785A4) approx BBs exec'd 0 ====
+
+ 0x254785A4: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254785A8: 7D800026 mfcr r12
+ 3: GETL CR, t2
+ 4: PUTL t2, R12
+ 5: INCEIPL $4
+
+ 0x254785AC: 9421FF60 stwu r1,-160(r1)
+ 6: GETL R1, t4
+ 7: GETL R1, t6
+ 8: ADDL $0xFFFFFF60, t6
+ 9: PUTL t6, R1
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x254785B0: 4801EA51 bl 0x25497000
+ 12: MOVL $0x254785B4, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25497000 ($4)
+
+
+
+. 1158 254785A4 16
+. 7C 08 02 A6 7D 80 00 26 94 21 FF 60 48 01 EA 51
+==== BB 1159 (0x254785B4) approx BBs exec'd 0 ====
+
+ 0x254785B4: 9261006C stw r19,108(r1)
+ 0: GETL R19, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x6C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254785B8: 7C932378 or r19,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R19
+ 7: INCEIPL $4
+
+ 0x254785BC: 92810070 stw r20,112(r1)
+ 8: GETL R20, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x70, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x254785C0: 7D144378 or r20,r8,r8
+ 13: GETL R8, t10
+ 14: PUTL t10, R20
+ 15: INCEIPL $4
+
+ 0x254785C4: 92A10074 stw r21,116(r1)
+ 16: GETL R21, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x74, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x254785C8: 7CD53378 or r21,r6,r6
+ 21: GETL R6, t16
+ 22: PUTL t16, R21
+ 23: INCEIPL $4
+
+ 0x254785CC: 92C10078 stw r22,120(r1)
+ 24: GETL R22, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x78, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x254785D0: 7CB62B78 or r22,r5,r5
+ 29: GETL R5, t22
+ 30: PUTL t22, R22
+ 31: INCEIPL $4
+
+ 0x254785D4: 92E1007C stw r23,124(r1)
+ 32: GETL R23, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x7C, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x254785D8: 7D374B78 or r23,r9,r9
+ 37: GETL R9, t28
+ 38: PUTL t28, R23
+ 39: INCEIPL $4
+
+ 0x254785DC: 93010080 stw r24,128(r1)
+ 40: GETL R24, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x80, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x254785E0: 7CF83B78 or r24,r7,r7
+ 45: GETL R7, t34
+ 46: PUTL t34, R24
+ 47: INCEIPL $4
+
+ 0x254785E4: 93210084 stw r25,132(r1)
+ 48: GETL R25, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x84, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x254785E8: 7C791B78 or r25,r3,r3
+ 53: GETL R3, t40
+ 54: PUTL t40, R25
+ 55: INCEIPL $4
+
+ 0x254785EC: 93410088 stw r26,136(r1)
+ 56: GETL R26, t42
+ 57: GETL R1, t44
+ 58: ADDL $0x88, t44
+ 59: STL t42, (t44)
+ 60: INCEIPL $4
+
+ 0x254785F0: 7D5A5378 or r26,r10,r10
+ 61: GETL R10, t46
+ 62: PUTL t46, R26
+ 63: INCEIPL $4
+
+ 0x254785F4: 93810090 stw r28,144(r1)
+ 64: GETL R28, t48
+ 65: GETL R1, t50
+ 66: ADDL $0x90, t50
+ 67: STL t48, (t50)
+ 68: INCEIPL $4
+
+ 0x254785F8: 3B800000 li r28,0
+ 69: MOVL $0x0, t52
+ 70: PUTL t52, R28
+ 71: INCEIPL $4
+
+ 0x254785FC: 93C10098 stw r30,152(r1)
+ 72: GETL R30, t54
+ 73: GETL R1, t56
+ 74: ADDL $0x98, t56
+ 75: STL t54, (t56)
+ 76: INCEIPL $4
+
+ 0x25478600: 7FC802A6 mflr r30
+ 77: GETL LR, t58
+ 78: PUTL t58, R30
+ 79: INCEIPL $4
+
+ 0x25478604: 93E1009C stw r31,156(r1)
+ 80: GETL R31, t60
+ 81: GETL R1, t62
+ 82: ADDL $0x9C, t62
+ 83: STL t60, (t62)
+ 84: INCEIPL $4
+
+ 0x25478608: 7C3F0B78 or r31,r1,r1
+ 85: GETL R1, t64
+ 86: PUTL t64, R31
+ 87: INCEIPL $4
+
+ 0x2547860C: 92210064 stw r17,100(r1)
+ 88: GETL R17, t66
+ 89: GETL R1, t68
+ 90: ADDL $0x64, t68
+ 91: STL t66, (t68)
+ 92: INCEIPL $4
+
+ 0x25478610: 92410068 stw r18,104(r1)
+ 93: GETL R18, t70
+ 94: GETL R1, t72
+ 95: ADDL $0x68, t72
+ 96: STL t70, (t72)
+ 97: INCEIPL $4
+
+ 0x25478614: 9361008C stw r27,140(r1)
+ 98: GETL R27, t74
+ 99: GETL R1, t76
+ 100: ADDL $0x8C, t76
+ 101: STL t74, (t76)
+ 102: INCEIPL $4
+
+ 0x25478618: 93A10094 stw r29,148(r1)
+ 103: GETL R29, t78
+ 104: GETL R1, t80
+ 105: ADDL $0x94, t80
+ 106: STL t78, (t80)
+ 107: INCEIPL $4
+
+ 0x2547861C: 900100A4 stw r0,164(r1)
+ 108: GETL R0, t82
+ 109: GETL R1, t84
+ 110: ADDL $0xA4, t84
+ 111: STL t82, (t84)
+ 112: INCEIPL $4
+
+ 0x25478620: 91810060 stw r12,96(r1)
+ 113: GETL R12, t86
+ 114: GETL R1, t88
+ 115: ADDL $0x60, t88
+ 116: STL t86, (t88)
+ 117: INCEIPL $4
+
+ 0x25478624: 88030000 lbz r0,0(r3)
+ 118: GETL R3, t90
+ 119: LDB (t90), t92
+ 120: PUTL t92, R0
+ 121: INCEIPL $4
+
+ 0x25478628: 2F800000 cmpi cr7,r0,0
+ 122: GETL R0, t94
+ 123: CMP0L t94, t96 (-rSo)
+ 124: ICRFL t96, $0x7, CR
+ 125: INCEIPL $4
+
+ 0x2547862C: 419E0018 bc 12,30,0x25478644
+ 126: Js30o $0x25478644
+
+
+
+. 1159 254785B4 124
+. 92 61 00 6C 7C 93 23 78 92 81 00 70 7D 14 43 78 92 A1 00 74 7C D5 33 78 92 C1 00 78 7C B6 2B 78 92 E1 00 7C 7D 37 4B 78 93 01 00 80 7C F8 3B 78 93 21 00 84 7C 79 1B 78 93 41 00 88 7D 5A 53 78 93 81 00 90 3B 80 00 00 93 C1 00 98 7F C8 02 A6 93 E1 00 9C 7C 3F 0B 78 92 21 00 64 92 41 00 68 93 61 00 8C 93 A1 00 94 90 01 00 A4 91 81 00 60 88 03 00 00 2F 80 00 00 41 9E 00 18
+==== BB 1160 (0x25478630) approx BBs exec'd 0 ====
+
+ 0x25478630: 89630001 lbz r11,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25478634: 7C1C0378 or r28,r0,r0
+ 5: GETL R0, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x25478638: 39230001 addi r9,r3,1
+ 8: GETL R3, t6
+ 9: ADDL $0x1, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0x2547863C: 2C0B0000 cmpi cr0,r11,0
+ 12: GETL R11, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x25478640: 4082015C bc 4,2,0x2547879C
+ 16: Jc02o $0x2547879C
+
+
+
+. 1160 25478630 20
+. 89 63 00 01 7C 1C 03 78 39 23 00 01 2C 0B 00 00 40 82 01 5C
+==== BB 1161 (0x2547879C) approx BBs exec'd 0 ====
+
+ 0x2547879C: 89490001 lbz r10,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x254787A0: 54032036 rlwinm r3,r0,4,0,27
+ 5: GETL R0, t4
+ 6: SHLL $0x4, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x254787A4: 7F835A14 add r28,r3,r11
+ 9: GETL R3, t6
+ 10: GETL R11, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0x254787A8: 39290001 addi r9,r9,1
+ 14: GETL R9, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x254787AC: 2C8A0000 cmpi cr1,r10,0
+ 18: GETL R10, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x1, CR
+ 21: INCEIPL $4
+
+ 0x254787B0: 41A6FE94 bc 13,6,0x25478644
+ 22: Js06o $0x25478644
+
+
+
+. 1161 2547879C 24
+. 89 49 00 01 54 03 20 36 7F 83 5A 14 39 29 00 01 2C 8A 00 00 41 A6 FE 94
+==== BB 1162 (0x254787B4) approx BBs exec'd 0 ====
+
+ 0x254787B4: 89690001 lbz r11,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254787B8: 57842036 rlwinm r4,r28,4,0,27
+ 5: GETL R28, t4
+ 6: SHLL $0x4, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x254787BC: 7F845214 add r28,r4,r10
+ 9: GETL R4, t6
+ 10: GETL R10, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0x254787C0: 39290001 addi r9,r9,1
+ 14: GETL R9, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x254787C4: 2E0B0000 cmpi cr4,r11,0
+ 18: GETL R11, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x4, CR
+ 21: INCEIPL $4
+
+ 0x254787C8: 41B2FE7C bc 13,18,0x25478644
+ 22: Js18o $0x25478644
+
+
+
+. 1162 254787B4 24
+. 89 69 00 01 57 84 20 36 7F 84 52 14 39 29 00 01 2E 0B 00 00 41 B2 FE 7C
+==== BB 1163 (0x254787CC) approx BBs exec'd 0 ====
+
+ 0x254787CC: 89490001 lbz r10,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x254787D0: 57852036 rlwinm r5,r28,4,0,27
+ 5: GETL R28, t4
+ 6: SHLL $0x4, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x254787D4: 7F855A14 add r28,r5,r11
+ 9: GETL R5, t6
+ 10: GETL R11, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0x254787D8: 39290001 addi r9,r9,1
+ 14: GETL R9, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x254787DC: 2F0A0000 cmpi cr6,r10,0
+ 18: GETL R10, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x254787E0: 41BAFE64 bc 13,26,0x25478644
+ 22: Js26o $0x25478644
+
+
+
+. 1163 254787CC 24
+. 89 49 00 01 57 85 20 36 7F 85 5A 14 39 29 00 01 2F 0A 00 00 41 BA FE 64
+==== BB 1164 (0x254787E4) approx BBs exec'd 0 ====
+
+ 0x254787E4: 89690001 lbz r11,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254787E8: 57862036 rlwinm r6,r28,4,0,27
+ 5: GETL R28, t4
+ 6: SHLL $0x4, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x254787EC: 7F865214 add r28,r6,r10
+ 9: GETL R6, t6
+ 10: GETL R10, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0x254787F0: 39490001 addi r10,r9,1
+ 14: GETL R9, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R10
+ 17: INCEIPL $4
+
+ 0x254787F4: 2F8B0000 cmpi cr7,r11,0
+ 18: GETL R11, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x7, CR
+ 21: INCEIPL $4
+
+ 0x254787F8: 41BEFE4C bc 13,30,0x25478644
+ 22: Js30o $0x25478644
+
+
+
+. 1164 254787E4 24
+. 89 69 00 01 57 86 20 36 7F 86 52 14 39 49 00 01 2F 8B 00 00 41 BE FE 4C
+==== BB 1165 (0x254787FC) approx BBs exec'd 0 ====
+
+ 0x254787FC: 57922036 rlwinm r18,r28,4,0,27
+ 0: GETL R28, t0
+ 1: SHLL $0x4, t0
+ 2: PUTL t0, R18
+ 3: INCEIPL $4
+
+ 0x25478800: 7E325A14 add r17,r18,r11
+ 4: GETL R18, t2
+ 5: GETL R11, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R17
+ 8: INCEIPL $4
+
+ 0x25478804: 8D6A0001 lbzu r11,1(r10)
+ 9: GETL R10, t6
+ 10: ADDL $0x1, t6
+ 11: PUTL t6, R10
+ 12: LDB (t6), t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0x25478808: 56280006 rlwinm r8,r17,0,0,3
+ 15: GETL R17, t10
+ 16: ANDL $0xF0000000, t10
+ 17: PUTL t10, R8
+ 18: INCEIPL $4
+
+ 0x2547880C: 2F8B0000 cmpi cr7,r11,0
+ 19: GETL R11, t12
+ 20: CMP0L t12, t14 (-rSo)
+ 21: ICRFL t14, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x25478810: 7E274278 xor r7,r17,r8
+ 23: GETL R17, t16
+ 24: GETL R8, t18
+ 25: XORL t16, t18
+ 26: PUTL t18, R7
+ 27: INCEIPL $4
+
+ 0x25478814: 5509463E rlwinm r9,r8,8,24,31
+ 28: GETL R8, t20
+ 29: SHRL $0x18, t20
+ 30: PUTL t20, R9
+ 31: INCEIPL $4
+
+ 0x25478818: 7CFC4A78 xor r28,r7,r9
+ 32: GETL R7, t22
+ 33: GETL R9, t24
+ 34: XORL t22, t24
+ 35: PUTL t24, R28
+ 36: INCEIPL $4
+
+ 0x2547881C: 4BFFFFDC b 0x254787F8
+ 37: JMPo $0x254787F8 ($4)
+
+
+
+. 1165 254787FC 36
+. 57 92 20 36 7E 32 5A 14 8D 6A 00 01 56 28 00 06 2F 8B 00 00 7E 27 42 78 55 09 46 3E 7C FC 4A 78 4B FF FF DC
+==== BB 1166 (0x254787F8) approx BBs exec'd 0 ====
+
+ 0x254787F8: 41BEFE4C bc 13,30,0x25478644
+ 0: Js30o $0x25478644
+
+
+
+. 1166 254787F8 4
+. 41 BE FE 4C
+==== BB 1167 (0x25478644) approx BBs exec'd 0 ====
+
+ 0x25478644: 825E04C8 lwz r18,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x25478648: 2E1A0000 cmpi cr4,r26,0
+ 5: GETL R26, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x2547864C: 3B600000 li r27,0
+ 9: MOVL $0x0, t8
+ 10: PUTL t8, R27
+ 11: INCEIPL $4
+
+ 0x25478650: 39400000 li r10,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R10
+ 14: INCEIPL $4
+
+ 0x25478654: 83B201A8 lwz r29,424(r18)
+ 15: GETL R18, t12
+ 16: ADDL $0x1A8, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R29
+ 19: INCEIPL $4
+
+ 0x25478658: 937F0048 stw r27,72(r31)
+ 20: GETL R27, t16
+ 21: GETL R31, t18
+ 22: ADDL $0x48, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x2547865C: 3B600000 li r27,0
+ 25: MOVL $0x0, t20
+ 26: PUTL t20, R27
+ 27: INCEIPL $4
+
+ 0x25478660: 397D0001 addi r11,r29,1
+ 28: GETL R29, t22
+ 29: ADDL $0x1, t22
+ 30: PUTL t22, R11
+ 31: INCEIPL $4
+
+ 0x25478664: 915F004C stw r10,76(r31)
+ 32: GETL R10, t24
+ 33: GETL R31, t26
+ 34: ADDL $0x4C, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x25478668: 917201A8 stw r11,424(r18)
+ 37: GETL R11, t28
+ 38: GETL R18, t30
+ 39: ADDL $0x1A8, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0x2547866C: 7EBDAB78 or r29,r21,r21
+ 42: GETL R21, t32
+ 43: PUTL t32, R29
+ 44: INCEIPL $4
+
+ 0x25478670: 40920538 bc 4,18,0x25478BA8
+ 45: Jc18o $0x25478BA8
+
+
+
+. 1167 25478644 48
+. 82 5E 04 C8 2E 1A 00 00 3B 60 00 00 39 40 00 00 83 B2 01 A8 93 7F 00 48 3B 60 00 00 39 7D 00 01 91 5F 00 4C 91 72 01 A8 7E BD AB 78 40 92 05 38
+==== BB 1168 (0x25478674) approx BBs exec'd 0 ====
+
+ 0x25478674: 81750000 lwz r11,0(r21)
+ 0: GETL R21, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25478678: 2C8B0000 cmpi cr1,r11,0
+ 4: GETL R11, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x2547867C: 7F68DB78 or r8,r27,r27
+ 8: GETL R27, t8
+ 9: PUTL t8, R8
+ 10: INCEIPL $4
+
+ 0x25478680: 4186004C bc 12,6,0x254786CC
+ 11: Js06o $0x254786CC
+
+
+
+. 1168 25478674 16
+. 81 75 00 00 2C 8B 00 00 7F 68 DB 78 41 86 00 4C
+==== BB 1169 (0x25478684) approx BBs exec'd 0 ====
+
+ 0x25478684: 80F50000 lwz r7,0(r21)
+ 0: GETL R21, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25478688: 3A3F0018 addi r17,r31,24
+ 4: GETL R31, t4
+ 5: ADDL $0x18, t4
+ 6: PUTL t4, R17
+ 7: INCEIPL $4
+
+ 0x2547868C: 80B60000 lwz r5,0(r22)
+ 8: GETL R22, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0x25478690: 7F23CB78 or r3,r25,r25
+ 12: GETL R25, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x25478694: 7F84E378 or r4,r28,r28
+ 15: GETL R28, t12
+ 16: PUTL t12, R4
+ 17: INCEIPL $4
+
+ 0x25478698: 38DF0048 addi r6,r31,72
+ 18: GETL R31, t14
+ 19: ADDL $0x48, t14
+ 20: PUTL t14, R6
+ 21: INCEIPL $4
+
+ 0x2547869C: 7F09C378 or r9,r24,r24
+ 22: GETL R24, t16
+ 23: PUTL t16, R9
+ 24: INCEIPL $4
+
+ 0x254786A0: 7EEABB78 or r10,r23,r23
+ 25: GETL R23, t18
+ 26: PUTL t18, R10
+ 27: INCEIPL $4
+
+ 0x254786A4: 93410008 stw r26,8(r1)
+ 28: GETL R26, t20
+ 29: GETL R1, t22
+ 30: ADDL $0x8, t22
+ 31: STL t20, (t22)
+ 32: INCEIPL $4
+
+ 0x254786A8: 9281000C stw r20,12(r1)
+ 33: GETL R20, t24
+ 34: GETL R1, t26
+ 35: ADDL $0xC, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0x254786AC: 4BFFFAFD bl 0x254781A8
+ 38: MOVL $0x254786B0, t28
+ 39: PUTL t28, LR
+ 40: JMPo-c $0x254781A8 ($4)
+
+
+
+. 1169 25478684 44
+. 80 F5 00 00 3A 3F 00 18 80 B6 00 00 7F 23 CB 78 7F 84 E3 78 38 DF 00 48 7F 09 C3 78 7E EA BB 78 93 41 00 08 92 81 00 0C 4B FF FA FD
+==== BB 1170 do_lookup_x(0x254781A8) approx BBs exec'd 0 ====
+
+ 0x254781A8: 7D6802A6 mflr r11
+ 0: GETL LR, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x254781AC: 9421FF90 stwu r1,-112(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFF90, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x254781B0: 4801EE51 bl 0x25497000
+ 9: MOVL $0x254781B4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 1170 254781A8 12
+. 7D 68 02 A6 94 21 FF 90 48 01 EE 51
+==== BB 1171 (0x254781B4) approx BBs exec'd 0 ====
+
+ 0x254781B4: 93C10068 stw r30,104(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x68, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254781B8: 80010078 lwz r0,120(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x78, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x254781BC: 7FC802A6 mflr r30
+ 10: GETL LR, t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0x254781C0: 91610074 stw r11,116(r1)
+ 13: GETL R11, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x74, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254781C4: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0x254781C8: 91E1002C stw r15,44(r1)
+ 21: GETL R15, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x2C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x254781CC: 92010030 stw r16,48(r1)
+ 26: GETL R16, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x30, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0x254781D0: 81E70004 lwz r15,4(r7)
+ 31: GETL R7, t24
+ 32: ADDL $0x4, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R15
+ 35: INCEIPL $4
+
+ 0x254781D4: 82070000 lwz r16,0(r7)
+ 36: GETL R7, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R16
+ 39: INCEIPL $4
+
+ 0x254781D8: 91C10028 stw r14,40(r1)
+ 40: GETL R14, t32
+ 41: GETL R1, t34
+ 42: ADDL $0x28, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0x254781DC: 7C8E2378 or r14,r4,r4
+ 45: GETL R4, t36
+ 46: PUTL t36, R14
+ 47: INCEIPL $4
+
+ 0x254781E0: 92210034 stw r17,52(r1)
+ 48: GETL R17, t38
+ 49: GETL R1, t40
+ 50: ADDL $0x34, t40
+ 51: STL t38, (t40)
+ 52: INCEIPL $4
+
+ 0x254781E4: 92A10044 stw r21,68(r1)
+ 53: GETL R21, t42
+ 54: GETL R1, t44
+ 55: ADDL $0x44, t44
+ 56: STL t42, (t44)
+ 57: INCEIPL $4
+
+ 0x254781E8: 7D354B78 or r21,r9,r9
+ 58: GETL R9, t46
+ 59: PUTL t46, R21
+ 60: INCEIPL $4
+
+ 0x254781EC: 93410058 stw r26,88(r1)
+ 61: GETL R26, t48
+ 62: GETL R1, t50
+ 63: ADDL $0x58, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0x254781F0: 3120FFFF addic r9,r0,-1
+ 66: GETL R0, t52
+ 67: ADCL $0xFFFFFFFF, t52 (-wCa)
+ 68: PUTL t52, R9
+ 69: INCEIPL $4
+
+ 0x254781F4: 7E290110 subfe r17,r9,r0
+ 70: GETL R9, t54
+ 71: GETL R0, t56
+ 72: SBBL t54, t56 (-rCa-wCa)
+ 73: PUTL t56, R17
+ 74: INCEIPL $4
+
+ 0x254781F8: 7D1A4378 or r26,r8,r8
+ 75: GETL R8, t58
+ 76: PUTL t58, R26
+ 77: INCEIPL $4
+
+ 0x254781FC: 92410038 stw r18,56(r1)
+ 78: GETL R18, t60
+ 79: GETL R1, t62
+ 80: ADDL $0x38, t62
+ 81: STL t60, (t62)
+ 82: INCEIPL $4
+
+ 0x25478200: 9261003C stw r19,60(r1)
+ 83: GETL R19, t64
+ 84: GETL R1, t66
+ 85: ADDL $0x3C, t66
+ 86: STL t64, (t66)
+ 87: INCEIPL $4
+
+ 0x25478204: 92810040 stw r20,64(r1)
+ 88: GETL R20, t68
+ 89: GETL R1, t70
+ 90: ADDL $0x40, t70
+ 91: STL t68, (t70)
+ 92: INCEIPL $4
+
+ 0x25478208: 92C10048 stw r22,72(r1)
+ 93: GETL R22, t72
+ 94: GETL R1, t74
+ 95: ADDL $0x48, t74
+ 96: STL t72, (t74)
+ 97: INCEIPL $4
+
+ 0x2547820C: 92E1004C stw r23,76(r1)
+ 98: GETL R23, t76
+ 99: GETL R1, t78
+ 100: ADDL $0x4C, t78
+ 101: STL t76, (t78)
+ 102: INCEIPL $4
+
+ 0x25478210: 93010050 stw r24,80(r1)
+ 103: GETL R24, t80
+ 104: GETL R1, t82
+ 105: ADDL $0x50, t82
+ 106: STL t80, (t82)
+ 107: INCEIPL $4
+
+ 0x25478214: 93210054 stw r25,84(r1)
+ 108: GETL R25, t84
+ 109: GETL R1, t86
+ 110: ADDL $0x54, t86
+ 111: STL t84, (t86)
+ 112: INCEIPL $4
+
+ 0x25478218: 9361005C stw r27,92(r1)
+ 113: GETL R27, t88
+ 114: GETL R1, t90
+ 115: ADDL $0x5C, t90
+ 116: STL t88, (t90)
+ 117: INCEIPL $4
+
+ 0x2547821C: 93810060 stw r28,96(r1)
+ 118: GETL R28, t92
+ 119: GETL R1, t94
+ 120: ADDL $0x60, t94
+ 121: STL t92, (t94)
+ 122: INCEIPL $4
+
+ 0x25478220: 93A10064 stw r29,100(r1)
+ 123: GETL R29, t96
+ 124: GETL R1, t98
+ 125: ADDL $0x64, t98
+ 126: STL t96, (t98)
+ 127: INCEIPL $4
+
+ 0x25478224: 93E1006C stw r31,108(r1)
+ 128: GETL R31, t100
+ 129: GETL R1, t102
+ 130: ADDL $0x6C, t102
+ 131: STL t100, (t102)
+ 132: INCEIPL $4
+
+ 0x25478228: 91810024 stw r12,36(r1)
+ 133: GETL R12, t104
+ 134: GETL R1, t106
+ 135: ADDL $0x24, t106
+ 136: STL t104, (t106)
+ 137: INCEIPL $4
+
+ 0x2547822C: 90610008 stw r3,8(r1)
+ 138: GETL R3, t108
+ 139: GETL R1, t110
+ 140: ADDL $0x8, t110
+ 141: STL t108, (t110)
+ 142: INCEIPL $4
+
+ 0x25478230: 90A1000C stw r5,12(r1)
+ 143: GETL R5, t112
+ 144: GETL R1, t114
+ 145: ADDL $0xC, t114
+ 146: STL t112, (t114)
+ 147: INCEIPL $4
+
+ 0x25478234: 90C10010 stw r6,16(r1)
+ 148: GETL R6, t116
+ 149: GETL R1, t118
+ 150: ADDL $0x10, t118
+ 151: STL t116, (t118)
+ 152: INCEIPL $4
+
+ 0x25478238: 91410014 stw r10,20(r1)
+ 153: GETL R10, t120
+ 154: GETL R1, t122
+ 155: ADDL $0x14, t122
+ 156: STL t120, (t122)
+ 157: INCEIPL $4
+
+ 0x2547823C: 48000010 b 0x2547824C
+ 158: JMPo $0x2547824C ($4)
+
+
+
+. 1171 254781B4 140
+. 93 C1 00 68 80 01 00 78 7F C8 02 A6 91 61 00 74 7D 80 00 26 91 E1 00 2C 92 01 00 30 81 E7 00 04 82 07 00 00 91 C1 00 28 7C 8E 23 78 92 21 00 34 92 A1 00 44 7D 35 4B 78 93 41 00 58 31 20 FF FF 7E 29 01 10 7D 1A 43 78 92 41 00 38 92 61 00 3C 92 81 00 40 92 C1 00 48 92 E1 00 4C 93 01 00 50 93 21 00 54 93 61 00 5C 93 81 00 60 93 A1 00 64 93 E1 00 6C 91 81 00 24 90 61 00 08 90 A1 00 0C 90 C1 00 10 91 41 00 14 48 00 00 10
+==== BB 1172 (0x2547824C) approx BBs exec'd 0 ====
+
+ 0x2547824C: 5745103A rlwinm r5,r26,2,0,29
+ 0: GETL R26, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0x25478250: 80810078 lwz r4,120(r1)
+ 4: GETL R1, t2
+ 5: ADDL $0x78, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x25478254: 7D25802E lwzx r9,r5,r16
+ 9: GETL R16, t6
+ 10: GETL R5, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x25478258: 3A800000 li r20,0
+ 15: MOVL $0x0, t12
+ 16: PUTL t12, R20
+ 17: INCEIPL $4
+
+ 0x2547825C: 3A600000 li r19,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R19
+ 20: INCEIPL $4
+
+ 0x25478260: 83890014 lwz r28,20(r9)
+ 21: GETL R9, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R28
+ 25: INCEIPL $4
+
+ 0x25478264: 7F832278 xor r3,r28,r4
+ 26: GETL R28, t20
+ 27: GETL R4, t22
+ 28: XORL t20, t22
+ 29: PUTL t22, R3
+ 30: INCEIPL $4
+
+ 0x25478268: 21630000 subfic r11,r3,0
+ 31: GETL R3, t24
+ 32: MOVL $0x0, t26
+ 33: SBBL t24, t26 (-wCa)
+ 34: PUTL t26, R11
+ 35: INCEIPL $4
+
+ 0x2547826C: 7C6B1914 adde r3,r11,r3
+ 36: GETL R11, t28
+ 37: GETL R3, t30
+ 38: ADCL t28, t30 (-rCa-wCa)
+ 39: PUTL t30, R3
+ 40: INCEIPL $4
+
+ 0x25478270: 7E291839 and. r9,r17,r3
+ 41: GETL R17, t32
+ 42: GETL R3, t34
+ 43: ANDL t32, t34
+ 44: PUTL t34, R9
+ 45: CMP0L t34, t36 (-rSo)
+ 46: ICRFL t36, $0x0, CR
+ 47: INCEIPL $4
+
+ 0x25478274: 4082FFCC bc 4,2,0x25478240
+ 48: Jc02o $0x25478240
+
+
+
+. 1172 2547824C 44
+. 57 45 10 3A 80 81 00 78 7D 25 80 2E 3A 80 00 00 3A 60 00 00 83 89 00 14 7F 83 22 78 21 63 00 00 7C 6B 19 14 7E 29 18 39 40 82 FF CC
+==== BB 1173 (0x25478278) approx BBs exec'd 0 ====
+
+ 0x25478278: 80C1007C lwz r6,124(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x7C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547827C: 54CBFFFF rlwinm. r11,r6,31,31,31
+ 5: GETL R6, t4
+ 6: ROLL $0x1F, t4
+ 7: ANDL $0x1, t4
+ 8: PUTL t4, R11
+ 9: CMP0L t4, t6 (-rSo)
+ 10: ICRFL t6, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25478280: 41820010 bc 12,2,0x25478290
+ 12: Js02o $0x25478290
+
+
+
+. 1173 25478278 12
+. 80 C1 00 7C 54 CB FF FF 41 82 00 10
+==== BB 1174 (0x25478290) approx BBs exec'd 0 ====
+
+ 0x25478290: 815E04F4 lwz r10,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25478294: 810A0000 lwz r8,0(r10)
+ 5: GETL R10, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R8
+ 8: INCEIPL $4
+
+ 0x25478298: 71090008 andi. r9,r8,0x8
+ 9: GETL R8, t8
+ 10: ANDL $0x8, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x2547829C: 40820248 bc 4,2,0x254784E4
+ 15: Jc02o $0x254784E4
+
+
+
+. 1174 25478290 16
+. 81 5E 04 F4 81 0A 00 00 71 09 00 08 40 82 02 48
+==== BB 1175 (0x254782A0) approx BBs exec'd 0 ====
+
+ 0x254782A0: 801C016C lwz r0,364(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x16C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x254782A4: 833C0170 lwz r25,368(r28)
+ 5: GETL R28, t4
+ 6: ADDL $0x170, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0x254782A8: 7D8E0396 divwu r12, r14, r0
+ 10: GETL R14, t10
+ 11: GETL R0, t8
+ 12: UDIVL t8, t10
+ 13: PUTL t10, R12
+ 14: INCEIPL $4
+
+ 0x254782AC: 817C0038 lwz r11,56(r28)
+ 15: GETL R28, t12
+ 16: ADDL $0x38, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R11
+ 19: INCEIPL $4
+
+ 0x254782B0: 807C0034 lwz r3,52(r28)
+ 20: GETL R28, t16
+ 21: ADDL $0x34, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R3
+ 24: INCEIPL $4
+
+ 0x254782B4: 830B0004 lwz r24,4(r11)
+ 25: GETL R11, t20
+ 26: ADDL $0x4, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R24
+ 29: INCEIPL $4
+
+ 0x254782B8: 82430004 lwz r18,4(r3)
+ 30: GETL R3, t24
+ 31: ADDL $0x4, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R18
+ 34: INCEIPL $4
+
+ 0x254782BC: 82DC0198 lwz r22,408(r28)
+ 35: GETL R28, t28
+ 36: ADDL $0x198, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R22
+ 39: INCEIPL $4
+
+ 0x254782C0: 7FEC01D6 mullw r31,r12,r0
+ 40: GETL R12, t32
+ 41: GETL R0, t34
+ 42: MULL t32, t34
+ 43: PUTL t34, R31
+ 44: INCEIPL $4
+
+ 0x254782C4: 7FBF7050 subf r29,r31,r14
+ 45: GETL R31, t36
+ 46: GETL R14, t38
+ 47: SUBL t36, t38
+ 48: PUTL t38, R29
+ 49: INCEIPL $4
+
+ 0x254782C8: 57BB103A rlwinm r27,r29,2,0,29
+ 50: GETL R29, t40
+ 51: SHLL $0x2, t40
+ 52: PUTL t40, R27
+ 53: INCEIPL $4
+
+ 0x254782CC: 7FFBC82E lwzx r31,r27,r25
+ 54: GETL R25, t42
+ 55: GETL R27, t44
+ 56: ADDL t44, t42
+ 57: LDL (t42), t46
+ 58: PUTL t46, R31
+ 59: INCEIPL $4
+
+ 0x254782D0: 2E1F0000 cmpi cr4,r31,0
+ 60: GETL R31, t48
+ 61: CMP0L t48, t50 (-rSo)
+ 62: ICRFL t50, $0x4, CR
+ 63: INCEIPL $4
+
+ 0x254782D4: 419200F8 bc 12,18,0x254783CC
+ 64: Js18o $0x254783CC
+
+
+
+. 1175 254782A0 56
+. 80 1C 01 6C 83 3C 01 70 7D 8E 03 96 81 7C 00 38 80 7C 00 34 83 0B 00 04 82 43 00 04 82 DC 01 98 7F EC 01 D6 7F BF 70 50 57 BB 10 3A 7F FB C8 2E 2E 1F 00 00 41 92 00 F8
+==== BB 1176 (0x254783CC) approx BBs exec'd 0 ====
+
+ 0x254783CC: 7F000026 mfcr r24
+ 0: GETL CR, t0
+ 1: PUTL t0, R24
+ 2: INCEIPL $4
+
+ 0x254783D0: 57189FFE rlwinm r24,r24,19,31,31
+ 3: GETL R24, t2
+ 4: ROLL $0x13, t2
+ 5: ANDL $0x1, t2
+ 6: PUTL t2, R24
+ 7: INCEIPL $4
+
+ 0x254783D4: 3175FFFF addic r11,r21,-1
+ 8: GETL R21, t4
+ 9: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 10: PUTL t4, R11
+ 11: INCEIPL $4
+
+ 0x254783D8: 7ECBA910 subfe r22,r11,r21
+ 12: GETL R11, t6
+ 13: GETL R21, t8
+ 14: SBBL t6, t8 (-rCa-wCa)
+ 15: PUTL t8, R22
+ 16: INCEIPL $4
+
+ 0x254783DC: 7F0BB039 and. r11,r24,r22
+ 17: GETL R24, t10
+ 18: GETL R22, t12
+ 19: ANDL t10, t12
+ 20: PUTL t12, R11
+ 21: CMP0L t12, t14 (-rSo)
+ 22: ICRFL t14, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x254783E0: 41A2FE60 bc 13,2,0x25478240
+ 24: Js02o $0x25478240
+
+
+
+. 1176 254783CC 24
+. 7F 00 00 26 57 18 9F FE 31 75 FF FF 7E CB A9 10 7F 0B B0 39 41 A2 FE 60
+==== BB 1177 (0x254783E4) approx BBs exec'd 0 ====
+
+ 0x254783E4: 8075000C lwz r3,12(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254783E8: 2E030000 cmpi cr4,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254783EC: 4192FE54 bc 12,18,0x25478240
+ 9: Js18o $0x25478240
+
+
+
+. 1177 254783E4 12
+. 80 75 00 0C 2E 03 00 00 41 92 FE 54
+==== BB 1178 (0x254783F0) approx BBs exec'd 0 ====
+
+ 0x254783F0: 7F84E378 or r4,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254783F4: 480042E1 bl 0x2547C6D4
+ 3: MOVL $0x254783F8, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x2547C6D4 ($4)
+
+
+
+. 1178 254783F0 8
+. 7F 84 E3 78 48 00 42 E1
+==== BB 1179 (0x254783F8) approx BBs exec'd 0 ====
+
+ 0x254783F8: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x254783FC: 419AFE44 bc 12,26,0x25478240
+ 4: Js26o $0x25478240
+
+
+
+. 1179 254783F8 8
+. 2F 03 00 00 41 9A FE 44
+==== BB 1180 (0x25478240) approx BBs exec'd 0 ====
+
+ 0x25478240: 3B5A0001 addi r26,r26,1
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x25478244: 7F9A7840 cmpl cr7,r26,r15
+ 4: GETL R26, t2
+ 5: GETL R15, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25478248: 409C01DC bc 4,28,0x25478424
+ 9: Jc28o $0x25478424
+
+
+
+. 1180 25478240 12
+. 3B 5A 00 01 7F 9A 78 40 40 9C 01 DC
+==== BB 1181 (0x254782D8) approx BBs exec'd 0 ====
+
+ 0x254782D8: 2D960000 cmpi cr3,r22,0
+ 0: GETL R22, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x3, CR
+ 3: INCEIPL $4
+
+ 0x254782DC: 48000028 b 0x25478304
+ 4: JMPo $0x25478304 ($4)
+
+
+
+. 1181 254782D8 8
+. 2D 96 00 00 48 00 00 28
+==== BB 1182 (0x25478304) approx BBs exec'd 0 ====
+
+ 0x25478304: 57E92036 rlwinm r9,r31,4,0,27
+ 0: GETL R31, t0
+ 1: SHLL $0x4, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x25478308: 7FA9C214 add r29,r9,r24
+ 4: GETL R9, t2
+ 5: GETL R24, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0x2547830C: 809D0004 lwz r4,4(r29)
+ 9: GETL R29, t6
+ 10: ADDL $0x4, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x25478310: 2C840000 cmpi cr1,r4,0
+ 14: GETL R4, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x1, CR
+ 17: INCEIPL $4
+
+ 0x25478314: 41A6FFCC bc 13,6,0x254782E0
+ 18: Js06o $0x254782E0
+
+
+
+. 1182 25478304 20
+. 57 E9 20 36 7F A9 C2 14 80 9D 00 04 2C 84 00 00 41 A6 FF CC
+==== BB 1183 (0x254782E0) approx BBs exec'd 0 ====
+
+ 0x254782E0: 88DD000C lbz r6,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254782E4: 54C5073E rlwinm r5,r6,0,28,31
+ 5: GETL R6, t4
+ 6: ANDL $0xF, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x254782E8: 2F050006 cmpi cr6,r5,6
+ 9: GETL R5, t6
+ 10: MOVL $0x6, t10
+ 11: CMPL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x6, CR
+ 13: INCEIPL $4
+
+ 0x254782EC: 419A002C bc 12,26,0x25478318
+ 14: Js26o $0x25478318
+
+
+
+. 1183 254782E0 16
+. 88 DD 00 0C 54 C5 07 3E 2F 05 00 06 41 9A 00 2C
+==== BB 1184 (0x254782F0) approx BBs exec'd 0 ====
+
+ 0x254782F0: 83BC0174 lwz r29,372(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x174, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254782F4: 57E7103A rlwinm r7,r31,2,0,29
+ 5: GETL R31, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x254782F8: 7FE7E82E lwzx r31,r7,r29
+ 9: GETL R29, t6
+ 10: GETL R7, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0x254782FC: 2E1F0000 cmpi cr4,r31,0
+ 15: GETL R31, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x4, CR
+ 18: INCEIPL $4
+
+ 0x25478300: 41920108 bc 12,18,0x25478408
+ 19: Js18o $0x25478408
+
+
+
+. 1184 254782F0 20
+. 83 BC 01 74 57 E7 10 3A 7F E7 E8 2E 2E 1F 00 00 41 92 01 08
+==== BB 1185 (0x25478408) approx BBs exec'd 0 ====
+
+ 0x25478408: 2D940001 cmpi cr3,r20,1
+ 0: GETL R20, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x3, CR
+ 4: INCEIPL $4
+
+ 0x2547840C: 408EFFC0 bc 4,14,0x254783CC
+ 5: Jc14o $0x254783CC
+
+
+
+. 1185 25478408 8
+. 2D 94 00 01 40 8E FF C0
+==== BB 1186 (0x25478318) approx BBs exec'd 0 ====
+
+ 0x25478318: A0FD000E lhz r7,14(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xE, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547831C: 2C070000 cmpi cr0,r7,0
+ 5: GETL R7, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25478320: 40820010 bc 4,2,0x25478330
+ 9: Jc02o $0x25478330
+
+
+
+. 1186 25478318 12
+. A0 FD 00 0E 2C 07 00 00 40 82 00 10
+==== BB 1187 (0x25478330) approx BBs exec'd 0 ====
+
+ 0x25478330: 8B7D000C lbz r27,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x25478334: 5760073E rlwinm r0,r27,0,28,31
+ 5: GETL R27, t4
+ 6: ANDL $0xF, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25478338: 2F800002 cmpi cr7,r0,2
+ 9: GETL R0, t6
+ 10: MOVL $0x2, t10
+ 11: CMPL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x2547833C: 409D000C bc 4,29,0x25478348
+ 14: Jc29o $0x25478348
+
+
+
+. 1187 25478330 16
+. 8B 7D 00 0C 57 60 07 3E 2F 80 00 02 40 9D 00 0C
+==== BB 1188 (0x25478348) approx BBs exec'd 0 ====
+
+ 0x25478348: 8141000C lwz r10,12(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547834C: 7F1D5000 cmp cr6,r29,r10
+ 5: GETL R29, t4
+ 6: GETL R10, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x25478350: 419A001C bc 12,26,0x2547836C
+ 10: Js26o $0x2547836C
+
+
+
+. 1188 25478348 12
+. 81 41 00 0C 7F 1D 50 00 41 9A 00 1C
+==== BB 1189 (0x25478354) approx BBs exec'd 0 ====
+
+ 0x25478354: 7EE9C02E lwzx r23,r9,r24
+ 0: GETL R24, t0
+ 1: GETL R9, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R23
+ 5: INCEIPL $4
+
+ 0x25478358: 80810008 lwz r4,8(r1)
+ 6: GETL R1, t6
+ 7: ADDL $0x8, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R4
+ 10: INCEIPL $4
+
+ 0x2547835C: 7C779214 add r3,r23,r18
+ 11: GETL R23, t10
+ 12: GETL R18, t12
+ 13: ADDL t10, t12
+ 14: PUTL t12, R3
+ 15: INCEIPL $4
+
+ 0x25478360: 4800AB81 bl 0x25482EE0
+ 16: MOVL $0x25478364, t14
+ 17: PUTL t14, LR
+ 18: JMPo-c $0x25482EE0 ($4)
+
+
+
+. 1189 25478354 16
+. 7E E9 C0 2E 80 81 00 08 7C 77 92 14 48 00 AB 81
+==== BB 1190 (0x25478364) approx BBs exec'd 0 ====
+
+ 0x25478364: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25478368: 4082FF88 bc 4,2,0x254782F0
+ 4: Jc02o $0x254782F0
+
+
+
+. 1190 25478364 8
+. 2C 03 00 00 40 82 FF 88
+==== BB 1191 (0x2547836C) approx BBs exec'd 0 ====
+
+ 0x2547836C: 2F950000 cmpi cr7,r21,0
+ 0: GETL R21, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25478370: 419E0130 bc 12,30,0x254784A0
+ 4: Js30o $0x254784A0
+
+
+
+. 1191 2547836C 8
+. 2F 95 00 00 41 9E 01 30
+==== BB 1192 (0x25478374) approx BBs exec'd 0 ====
+
+ 0x25478374: 418E0044 bc 12,14,0x254783B8
+ 0: Js14o $0x254783B8
+
+
+
+. 1192 25478374 4
+. 41 8E 00 44
+==== BB 1193 (0x25478378) approx BBs exec'd 0 ====
+
+ 0x25478378: 57F9083C rlwinm r25,r31,1,0,30
+ 0: GETL R31, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0x2547837C: 815C0188 lwz r10,392(r28)
+ 4: GETL R28, t2
+ 5: ADDL $0x188, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x25478380: 7EF9B22E lhzx r23,r25,r22
+ 9: GETL R22, t6
+ 10: GETL R25, t8
+ 11: ADDL t8, t6
+ 12: LDW (t6), t10
+ 13: PUTL t10, R23
+ 14: INCEIPL $4
+
+ 0x25478384: 81350004 lwz r9,4(r21)
+ 15: GETL R21, t12
+ 16: ADDL $0x4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25478388: 56EB2376 rlwinm r11,r23,4,13,27
+ 20: GETL R23, t16
+ 21: ROLL $0x4, t16
+ 22: ANDL $0x7FFF0, t16
+ 23: PUTL t16, R11
+ 24: INCEIPL $4
+
+ 0x2547838C: 7D8B5214 add r12,r11,r10
+ 25: GETL R11, t18
+ 26: GETL R10, t20
+ 27: ADDL t18, t20
+ 28: PUTL t20, R12
+ 29: INCEIPL $4
+
+ 0x25478390: 832C0004 lwz r25,4(r12)
+ 30: GETL R12, t22
+ 31: ADDL $0x4, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R25
+ 34: INCEIPL $4
+
+ 0x25478394: 7C994800 cmp cr1,r25,r9
+ 35: GETL R25, t26
+ 36: GETL R9, t28
+ 37: CMPL t26, t28, t30 (-rSo)
+ 38: ICRFL t30, $0x1, CR
+ 39: INCEIPL $4
+
+ 0x25478398: 418600F0 bc 12,6,0x25478488
+ 40: Js06o $0x25478488
+
+
+
+. 1193 25478378 36
+. 57 F9 08 3C 81 5C 01 88 7E F9 B2 2E 81 35 00 04 56 EB 23 76 7D 8B 52 14 83 2C 00 04 7C 99 48 00 41 86 00 F0
+==== BB 1194 (0x25478488) approx BBs exec'd 0 ====
+
+ 0x25478488: 7C6B502E lwzx r3,r11,r10
+ 0: GETL R10, t0
+ 1: GETL R11, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R3
+ 5: INCEIPL $4
+
+ 0x2547848C: 80950000 lwz r4,0(r21)
+ 6: GETL R21, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R4
+ 9: INCEIPL $4
+
+ 0x25478490: 4800AA51 bl 0x25482EE0
+ 10: MOVL $0x25478494, t10
+ 11: PUTL t10, LR
+ 12: JMPo-c $0x25482EE0 ($4)
+
+
+
+. 1194 25478488 12
+. 7C 6B 50 2E 80 95 00 00 48 00 AA 51
+==== BB 1195 (0x25478494) approx BBs exec'd 0 ====
+
+ 0x25478494: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25478498: 409AFF04 bc 4,26,0x2547839C
+ 4: Jc26o $0x2547839C
+
+
+
+. 1195 25478494 8
+. 2F 03 00 00 40 9A FF 04
+==== BB 1196 (0x2547849C) approx BBs exec'd 0 ====
+
+ 0x2547849C: 4BFFFF1C b 0x254783B8
+ 0: JMPo $0x254783B8 ($4)
+
+
+
+. 1196 2547849C 4
+. 4B FF FF 1C
+==== BB 1197 (0x254783B8) approx BBs exec'd 0 ====
+
+ 0x254783B8: 5760E13E rlwinm r0,r27,28,4,31
+ 0: GETL R27, t0
+ 1: SHRL $0x4, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x254783BC: 2F800001 cmpi cr7,r0,1
+ 4: GETL R0, t2
+ 5: MOVL $0x1, t6
+ 6: CMPL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x254783C0: 419E017C bc 12,30,0x2547853C
+ 9: Js30o $0x2547853C
+
+
+
+. 1197 254783B8 12
+. 57 60 E1 3E 2F 80 00 01 41 9E 01 7C
+==== BB 1198 (0x2547853C) approx BBs exec'd 0 ====
+
+ 0x2547853C: 81C10010 lwz r14,16(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R14
+ 4: INCEIPL $4
+
+ 0x25478540: 38600001 li r3,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25478544: 938E0004 stw r28,4(r14)
+ 8: GETL R28, t6
+ 9: GETL R14, t8
+ 10: ADDL $0x4, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25478548: 93AE0000 stw r29,0(r14)
+ 13: GETL R29, t10
+ 14: GETL R14, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0x2547854C: 4BFFFEDC b 0x25478428
+ 17: JMPo $0x25478428 ($4)
+
+
+
+. 1198 2547853C 20
+. 81 C1 00 10 38 60 00 01 93 8E 00 04 93 AE 00 00 4B FF FE DC
+==== BB 1199 (0x25478428) approx BBs exec'd 0 ====
+
+ 0x25478428: 81E10074 lwz r15,116(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R15
+ 4: INCEIPL $4
+
+ 0x2547842C: 81810024 lwz r12,36(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x24, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25478430: 7DE803A6 mtlr r15
+ 10: GETL R15, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0x25478434: 81C10028 lwz r14,40(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x28, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R14
+ 17: INCEIPL $4
+
+ 0x25478438: 81E1002C lwz r15,44(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x2C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R15
+ 22: INCEIPL $4
+
+ 0x2547843C: 7D818120 mtcrf 0x18,r12
+ 23: GETL R12, t18
+ 24: ICRFL t18, $0x3, CR
+ 25: ICRFL t18, $0x4, CR
+ 26: INCEIPL $4
+
+ 0x25478440: 82010030 lwz r16,48(r1)
+ 27: GETL R1, t20
+ 28: ADDL $0x30, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R16
+ 31: INCEIPL $4
+
+ 0x25478444: 82210034 lwz r17,52(r1)
+ 32: GETL R1, t24
+ 33: ADDL $0x34, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R17
+ 36: INCEIPL $4
+
+ 0x25478448: 82410038 lwz r18,56(r1)
+ 37: GETL R1, t28
+ 38: ADDL $0x38, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R18
+ 41: INCEIPL $4
+
+ 0x2547844C: 8261003C lwz r19,60(r1)
+ 42: GETL R1, t32
+ 43: ADDL $0x3C, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R19
+ 46: INCEIPL $4
+
+ 0x25478450: 82810040 lwz r20,64(r1)
+ 47: GETL R1, t36
+ 48: ADDL $0x40, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R20
+ 51: INCEIPL $4
+
+ 0x25478454: 82A10044 lwz r21,68(r1)
+ 52: GETL R1, t40
+ 53: ADDL $0x44, t40
+ 54: LDL (t40), t42
+ 55: PUTL t42, R21
+ 56: INCEIPL $4
+
+ 0x25478458: 82C10048 lwz r22,72(r1)
+ 57: GETL R1, t44
+ 58: ADDL $0x48, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R22
+ 61: INCEIPL $4
+
+ 0x2547845C: 82E1004C lwz r23,76(r1)
+ 62: GETL R1, t48
+ 63: ADDL $0x4C, t48
+ 64: LDL (t48), t50
+ 65: PUTL t50, R23
+ 66: INCEIPL $4
+
+ 0x25478460: 83010050 lwz r24,80(r1)
+ 67: GETL R1, t52
+ 68: ADDL $0x50, t52
+ 69: LDL (t52), t54
+ 70: PUTL t54, R24
+ 71: INCEIPL $4
+
+ 0x25478464: 83210054 lwz r25,84(r1)
+ 72: GETL R1, t56
+ 73: ADDL $0x54, t56
+ 74: LDL (t56), t58
+ 75: PUTL t58, R25
+ 76: INCEIPL $4
+
+ 0x25478468: 83410058 lwz r26,88(r1)
+ 77: GETL R1, t60
+ 78: ADDL $0x58, t60
+ 79: LDL (t60), t62
+ 80: PUTL t62, R26
+ 81: INCEIPL $4
+
+ 0x2547846C: 8361005C lwz r27,92(r1)
+ 82: GETL R1, t64
+ 83: ADDL $0x5C, t64
+ 84: LDL (t64), t66
+ 85: PUTL t66, R27
+ 86: INCEIPL $4
+
+ 0x25478470: 83810060 lwz r28,96(r1)
+ 87: GETL R1, t68
+ 88: ADDL $0x60, t68
+ 89: LDL (t68), t70
+ 90: PUTL t70, R28
+ 91: INCEIPL $4
+
+ 0x25478474: 83A10064 lwz r29,100(r1)
+ 92: GETL R1, t72
+ 93: ADDL $0x64, t72
+ 94: LDL (t72), t74
+ 95: PUTL t74, R29
+ 96: INCEIPL $4
+
+ 0x25478478: 83C10068 lwz r30,104(r1)
+ 97: GETL R1, t76
+ 98: ADDL $0x68, t76
+ 99: LDL (t76), t78
+ 100: PUTL t78, R30
+ 101: INCEIPL $4
+
+ 0x2547847C: 83E1006C lwz r31,108(r1)
+ 102: GETL R1, t80
+ 103: ADDL $0x6C, t80
+ 104: LDL (t80), t82
+ 105: PUTL t82, R31
+ 106: INCEIPL $4
+
+ 0x25478480: 38210070 addi r1,r1,112
+ 107: GETL R1, t84
+ 108: ADDL $0x70, t84
+ 109: PUTL t84, R1
+ 110: INCEIPL $4
+
+ 0x25478484: 4E800020 blr
+ 111: GETL LR, t86
+ 112: JMPo-r t86 ($4)
+
+
+
+. 1199 25478428 96
+. 81 E1 00 74 81 81 00 24 7D E8 03 A6 81 C1 00 28 81 E1 00 2C 7D 81 81 20 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
+==== BB 1200 (0x254786B0) approx BBs exec'd 0 ====
+
+ 0x254786B0: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x254786B4: 39000000 li r8,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R8
+ 6: INCEIPL $4
+
+ 0x254786B8: 41810014 bc 12,1,0x254786CC
+ 7: Js01o $0x254786CC
+
+
+
+. 1200 254786B0 12
+. 2C 03 00 00 39 00 00 00 41 81 00 14
+==== BB 1201 (0x254786CC) approx BBs exec'd 0 ====
+
+ 0x254786CC: 815F0048 lwz r10,72(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x254786D0: 2F8A0000 cmpi cr7,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x254786D4: 419E0504 bc 12,30,0x25478BD8
+ 9: Js30o $0x25478BD8
+
+
+
+. 1201 254786CC 12
+. 81 5F 00 48 2F 8A 00 00 41 9E 05 04
+==== BB 1202 (0x254786D8) approx BBs exec'd 0 ====
+
+ 0x254786D8: 80B60000 lwz r5,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x254786DC: 2F850000 cmpi cr7,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0x254786E0: 419E0140 bc 12,30,0x25478820
+ 8: Js30o $0x25478820
+
+
+
+. 1202 254786D8 12
+. 80 B6 00 00 2F 85 00 00 41 9E 01 40
+==== BB 1203 (0x254786E4) approx BBs exec'd 0 ====
+
+ 0x254786E4: 88E5000D lbz r7,13(r5)
+ 0: GETL R5, t0
+ 1: ADDL $0xD, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254786E8: 39200000 li r9,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x254786EC: 2E090000 cmpi cr4,r9,0
+ 8: GETL R9, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x4, CR
+ 11: INCEIPL $4
+
+ 0x254786F0: 54E607BE rlwinm r6,r7,0,30,31
+ 12: GETL R7, t10
+ 13: ANDL $0x3, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x254786F4: 2F060003 cmpi cr6,r6,3
+ 16: GETL R6, t12
+ 17: MOVL $0x3, t16
+ 18: CMPL t12, t16, t14 (-rSo)
+ 19: ICRFL t14, $0x6, CR
+ 20: INCEIPL $4
+
+ 0x254786F8: 419A0234 bc 12,26,0x2547892C
+ 21: Js26o $0x2547892C
+
+
+
+. 1203 254786E4 24
+. 88 E5 00 0D 39 20 00 00 2E 09 00 00 54 E6 07 BE 2F 06 00 03 41 9A 02 34
+==== BB 1204 (0x254786FC) approx BBs exec'd 0 ====
+
+ 0x254786FC: 3B7F0048 addi r27,r31,72
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25478700: 839B0004 lwz r28,4(r27)
+ 4: GETL R27, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x25478704: 3D808000 lis r12,-32768
+ 9: MOVL $0x80000000, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x25478708: 801C0180 lwz r0,384(r28)
+ 12: GETL R28, t8
+ 13: ADDL $0x180, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0x2547870C: 541D0002 rlwinm r29,r0,0,0,1
+ 17: GETL R0, t12
+ 18: ANDL $0xC0000000, t12
+ 19: PUTL t12, R29
+ 20: INCEIPL $4
+
+ 0x25478710: 7F1D6000 cmp cr6,r29,r12
+ 21: GETL R29, t14
+ 22: GETL R12, t16
+ 23: CMPL t14, t16, t18 (-rSo)
+ 24: ICRFL t18, $0x6, CR
+ 25: INCEIPL $4
+
+ 0x25478714: 419A05BC bc 12,26,0x25478CD0
+ 26: Js26o $0x25478CD0
+
+
+
+. 1204 254786FC 28
+. 3B 7F 00 48 83 9B 00 04 3D 80 80 00 80 1C 01 80 54 1D 00 02 7F 1D 60 00 41 9A 05 BC
+==== BB 1205 (0x25478718) approx BBs exec'd 0 ====
+
+ 0x25478718: 82BB0004 lwz r21,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x2547871C: 83BE04F4 lwz r29,1268(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x4F4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x25478720: 83550180 lwz r26,384(r21)
+ 10: GETL R21, t8
+ 11: ADDL $0x180, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R26
+ 14: INCEIPL $4
+
+ 0x25478724: 67570010 oris r23,r26,0x10
+ 15: GETL R26, t12
+ 16: ORL $0x100000, t12
+ 17: PUTL t12, R23
+ 18: INCEIPL $4
+
+ 0x25478728: 92F50180 stw r23,384(r21)
+ 19: GETL R23, t14
+ 20: GETL R21, t16
+ 21: ADDL $0x180, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x2547872C: 801D0000 lwz r0,0(r29)
+ 24: GETL R29, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R0
+ 27: INCEIPL $4
+
+ 0x25478730: 70090404 andi. r9,r0,0x404
+ 28: GETL R0, t22
+ 29: ANDL $0x404, t22
+ 30: PUTL t22, R9
+ 31: CMP0L t22, t24 (-rSo)
+ 32: ICRFL t24, $0x0, CR
+ 33: INCEIPL $4
+
+ 0x25478734: 408202A0 bc 4,2,0x254789D4
+ 34: Jc02o $0x254789D4
+
+
+
+. 1205 25478718 32
+. 82 BB 00 04 83 BE 04 F4 83 55 01 80 67 57 00 10 92 F5 01 80 80 1D 00 00 70 09 04 04 40 82 02 A0
+==== BB 1206 (0x25478738) approx BBs exec'd 0 ====
+
+ 0x25478738: 807B0004 lwz r3,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547873C: 801F0048 lwz r0,72(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x48, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x25478740: 90160000 stw r0,0(r22)
+ 10: GETL R0, t8
+ 11: GETL R22, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25478744: 80E10000 lwz r7,0(r1)
+ 14: GETL R1, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R7
+ 17: INCEIPL $4
+
+ 0x25478748: 82C70004 lwz r22,4(r7)
+ 18: GETL R7, t16
+ 19: ADDL $0x4, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R22
+ 22: INCEIPL $4
+
+ 0x2547874C: 8107FFC0 lwz r8,-64(r7)
+ 23: GETL R7, t20
+ 24: ADDL $0xFFFFFFC0, t20
+ 25: LDL (t20), t22
+ 26: PUTL t22, R8
+ 27: INCEIPL $4
+
+ 0x25478750: 7EC803A6 mtlr r22
+ 28: GETL R22, t24
+ 29: PUTL t24, LR
+ 30: INCEIPL $4
+
+ 0x25478754: 8227FFC4 lwz r17,-60(r7)
+ 31: GETL R7, t26
+ 32: ADDL $0xFFFFFFC4, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R17
+ 35: INCEIPL $4
+
+ 0x25478758: 8247FFC8 lwz r18,-56(r7)
+ 36: GETL R7, t30
+ 37: ADDL $0xFFFFFFC8, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R18
+ 40: INCEIPL $4
+
+ 0x2547875C: 7D008120 mtcrf 0x8,r8
+ 41: GETL R8, t34
+ 42: ICRFL t34, $0x4, CR
+ 43: INCEIPL $4
+
+ 0x25478760: 8267FFCC lwz r19,-52(r7)
+ 44: GETL R7, t36
+ 45: ADDL $0xFFFFFFCC, t36
+ 46: LDL (t36), t38
+ 47: PUTL t38, R19
+ 48: INCEIPL $4
+
+ 0x25478764: 8287FFD0 lwz r20,-48(r7)
+ 49: GETL R7, t40
+ 50: ADDL $0xFFFFFFD0, t40
+ 51: LDL (t40), t42
+ 52: PUTL t42, R20
+ 53: INCEIPL $4
+
+ 0x25478768: 82A7FFD4 lwz r21,-44(r7)
+ 54: GETL R7, t44
+ 55: ADDL $0xFFFFFFD4, t44
+ 56: LDL (t44), t46
+ 57: PUTL t46, R21
+ 58: INCEIPL $4
+
+ 0x2547876C: 82C7FFD8 lwz r22,-40(r7)
+ 59: GETL R7, t48
+ 60: ADDL $0xFFFFFFD8, t48
+ 61: LDL (t48), t50
+ 62: PUTL t50, R22
+ 63: INCEIPL $4
+
+ 0x25478770: 82E7FFDC lwz r23,-36(r7)
+ 64: GETL R7, t52
+ 65: ADDL $0xFFFFFFDC, t52
+ 66: LDL (t52), t54
+ 67: PUTL t54, R23
+ 68: INCEIPL $4
+
+ 0x25478774: 8307FFE0 lwz r24,-32(r7)
+ 69: GETL R7, t56
+ 70: ADDL $0xFFFFFFE0, t56
+ 71: LDL (t56), t58
+ 72: PUTL t58, R24
+ 73: INCEIPL $4
+
+ 0x25478778: 8327FFE4 lwz r25,-28(r7)
+ 74: GETL R7, t60
+ 75: ADDL $0xFFFFFFE4, t60
+ 76: LDL (t60), t62
+ 77: PUTL t62, R25
+ 78: INCEIPL $4
+
+ 0x2547877C: 8347FFE8 lwz r26,-24(r7)
+ 79: GETL R7, t64
+ 80: ADDL $0xFFFFFFE8, t64
+ 81: LDL (t64), t66
+ 82: PUTL t66, R26
+ 83: INCEIPL $4
+
+ 0x25478780: 8367FFEC lwz r27,-20(r7)
+ 84: GETL R7, t68
+ 85: ADDL $0xFFFFFFEC, t68
+ 86: LDL (t68), t70
+ 87: PUTL t70, R27
+ 88: INCEIPL $4
+
+ 0x25478784: 8387FFF0 lwz r28,-16(r7)
+ 89: GETL R7, t72
+ 90: ADDL $0xFFFFFFF0, t72
+ 91: LDL (t72), t74
+ 92: PUTL t74, R28
+ 93: INCEIPL $4
+
+ 0x25478788: 83A7FFF4 lwz r29,-12(r7)
+ 94: GETL R7, t76
+ 95: ADDL $0xFFFFFFF4, t76
+ 96: LDL (t76), t78
+ 97: PUTL t78, R29
+ 98: INCEIPL $4
+
+ 0x2547878C: 83C7FFF8 lwz r30,-8(r7)
+ 99: GETL R7, t80
+ 100: ADDL $0xFFFFFFF8, t80
+ 101: LDL (t80), t82
+ 102: PUTL t82, R30
+ 103: INCEIPL $4
+
+ 0x25478790: 83E7FFFC lwz r31,-4(r7)
+ 104: GETL R7, t84
+ 105: ADDL $0xFFFFFFFC, t84
+ 106: LDL (t84), t86
+ 107: PUTL t86, R31
+ 108: INCEIPL $4
+
+ 0x25478794: 7CE13B78 or r1,r7,r7
+ 109: GETL R7, t88
+ 110: PUTL t88, R1
+ 111: INCEIPL $4
+
+ 0x25478798: 4E800020 blr
+ 112: GETL LR, t90
+ 113: JMPo-r t90 ($4)
+
+
+
+. 1206 25478738 100
+. 80 7B 00 04 80 1F 00 48 90 16 00 00 80 E1 00 00 82 C7 00 04 81 07 FF C0 7E C8 03 A6 82 27 FF C4 82 47 FF C8 7D 00 81 20 82 67 FF CC 82 87 FF D0 82 A7 FF D4 82 C7 FF D8 82 E7 FF DC 83 07 FF E0 83 27 FF E4 83 47 FF E8 83 67 FF EC 83 87 FF F0 83 A7 FF F4 83 C7 FF F8 83 E7 FF FC 7C E1 3B 78 4E 80 00 20
+==== BB 1207 (0x2547995C) approx BBs exec'd 0 ====
+
+ 0x2547995C: 811F0050 lwz r8,80(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25479960: 809F000C lwz r4,12(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25479964: 7C7A1B78 or r26,r3,r3
+ 10: GETL R3, t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x25479968: 7D064378 or r6,r8,r8
+ 13: GETL R8, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x2547996C: 90640210 stw r3,528(r4)
+ 16: GETL R3, t12
+ 17: GETL R4, t14
+ 18: ADDL $0x210, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x25479970: 91040214 stw r8,532(r4)
+ 21: GETL R8, t16
+ 22: GETL R4, t18
+ 23: ADDL $0x214, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25479974: 2F060000 cmpi cr6,r6,0
+ 26: GETL R6, t20
+ 27: CMP0L t20, t22 (-rSo)
+ 28: ICRFL t22, $0x6, CR
+ 29: INCEIPL $4
+
+ 0x25479978: 39200000 li r9,0
+ 30: MOVL $0x0, t24
+ 31: PUTL t24, R9
+ 32: INCEIPL $4
+
+ 0x2547997C: 419A0010 bc 12,26,0x2547998C
+ 33: Js26o $0x2547998C
+
+
+
+. 1207 2547995C 36
+. 81 1F 00 50 80 9F 00 0C 7C 7A 1B 78 7D 06 43 78 90 64 02 10 91 04 02 14 2F 06 00 00 39 20 00 00 41 9A 00 10
+==== BB 1208 (0x25479980) approx BBs exec'd 0 ====
+
+ 0x25479980: 80FA0000 lwz r7,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25479984: 81660004 lwz r11,4(r6)
+ 4: GETL R6, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0x25479988: 7D275A14 add r9,r7,r11
+ 9: GETL R7, t8
+ 10: GETL R11, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0x2547998C: 2F9D0044 cmpi cr7,r29,68
+ 14: GETL R29, t12
+ 15: MOVL $0x44, t16
+ 16: CMPL t12, t16, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x25479990: 801C0008 lwz r0,8(r28)
+ 19: GETL R28, t18
+ 20: ADDL $0x8, t18
+ 21: LDL (t18), t20
+ 22: PUTL t20, R0
+ 23: INCEIPL $4
+
+ 0x25479994: 7D290214 add r9,r9,r0
+ 24: GETL R9, t22
+ 25: GETL R0, t24
+ 26: ADDL t22, t24
+ 27: PUTL t24, R9
+ 28: INCEIPL $4
+
+ 0x25479998: 419E0100 bc 12,30,0x25479A98
+ 29: Js30o $0x25479A98
+
+
+
+. 1208 25479980 28
+. 80 FA 00 00 81 66 00 04 7D 27 5A 14 2F 9D 00 44 80 1C 00 08 7D 29 02 14 41 9E 01 00
+==== BB 1209 (0x2547999C) approx BBs exec'd 0 ====
+
+ 0x2547999C: 419D00D0 bc 12,29,0x25479A6C
+ 0: Js29o $0x25479A6C
+
+
+
+. 1209 2547999C 4
+. 41 9D 00 D0
+==== BB 1210 (0x254799A0) approx BBs exec'd 0 ====
+
+ 0x254799A0: 2F9D0001 cmpi cr7,r29,1
+ 0: GETL R29, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x254799A4: 419E00EC bc 12,30,0x25479A90
+ 5: Js30o $0x25479A90
+
+
+
+. 1210 254799A0 8
+. 2F 9D 00 01 41 9E 00 EC
+==== BB 1211 (0x25479A90) approx BBs exec'd 0 ====
+
+ 0x25479A90: 91370000 stw r9,0(r23)
+ 0: GETL R9, t0
+ 1: GETL R23, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25479A94: 4BFFFF38 b 0x254799CC
+ 4: JMPo $0x254799CC ($4)
+
+
+
+. 1211 25479A90 8
+. 91 37 00 00 4B FF FF 38
+==== BB 1212 (0x254799CC) approx BBs exec'd 0 ====
+
+ 0x254799CC: 3B9C000C addi r28,r28,12
+ 0: GETL R28, t0
+ 1: ADDL $0xC, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0x254799D0: 7E1CC040 cmpl cr4,r28,r24
+ 4: GETL R28, t2
+ 5: GETL R24, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254799D4: 4190FE68 bc 12,16,0x2547983C
+ 9: Js16o $0x2547983C
+
+
+
+. 1212 254799CC 12
+. 3B 9C 00 0C 7E 1C C0 40 41 90 FE 68
+==== BB 1213 (0x25479938) approx BBs exec'd 0 ====
+
+ 0x25479938: 80DF0050 lwz r6,80(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547993C: 7D695B78 or r9,r11,r11
+ 5: GETL R11, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x25479940: 815F0008 lwz r10,8(r31)
+ 8: GETL R31, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x25479944: 80A60000 lwz r5,0(r6)
+ 13: GETL R6, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R5
+ 16: INCEIPL $4
+
+ 0x25479948: 80DF0010 lwz r6,16(r31)
+ 17: GETL R31, t14
+ 18: ADDL $0x10, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R6
+ 21: INCEIPL $4
+
+ 0x2547994C: 7C655214 add r3,r5,r10
+ 22: GETL R5, t18
+ 23: GETL R10, t20
+ 24: ADDL t18, t20
+ 25: PUTL t20, R3
+ 26: INCEIPL $4
+
+ 0x25479950: 38BF0050 addi r5,r31,80
+ 27: GETL R31, t22
+ 28: ADDL $0x50, t22
+ 29: PUTL t22, R5
+ 30: INCEIPL $4
+
+ 0x25479954: 39400000 li r10,0
+ 31: MOVL $0x0, t24
+ 32: PUTL t24, R10
+ 33: INCEIPL $4
+
+ 0x25479958: 4BFFEC4D bl 0x254785A4
+ 34: MOVL $0x2547995C, t26
+ 35: PUTL t26, LR
+ 36: JMPo-c $0x254785A4 ($4)
+
+
+
+. 1213 25479938 36
+. 80 DF 00 50 7D 69 5B 78 81 5F 00 08 80 A6 00 00 80 DF 00 10 7C 65 52 14 38 BF 00 50 39 40 00 00 4B FF EC 4D
+==== BB 1214 (0x25478324) approx BBs exec'd 0 ====
+
+ 0x25478324: 8101007C lwz r8,124(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x7C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25478328: 71000001 andi. r0,r8,0x1
+ 5: GETL R8, t4
+ 6: ANDL $0x1, t4
+ 7: PUTL t4, R0
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x2547832C: 40A2FFC4 bc 5,2,0x254782F0
+ 11: Jc02o $0x254782F0
+
+
+
+. 1214 25478324 12
+. 81 01 00 7C 71 00 00 01 40 A2 FF C4
+==== BB 1215 (0x25478424) approx BBs exec'd 0 ====
+
+ 0x25478424: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25478428: 81E10074 lwz r15,116(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x74, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R15
+ 7: INCEIPL $4
+
+ 0x2547842C: 81810024 lwz r12,36(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x24, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R12
+ 12: INCEIPL $4
+
+ 0x25478430: 7DE803A6 mtlr r15
+ 13: GETL R15, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x25478434: 81C10028 lwz r14,40(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x28, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R14
+ 20: INCEIPL $4
+
+ 0x25478438: 81E1002C lwz r15,44(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x2C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R15
+ 25: INCEIPL $4
+
+ 0x2547843C: 7D818120 mtcrf 0x18,r12
+ 26: GETL R12, t20
+ 27: ICRFL t20, $0x3, CR
+ 28: ICRFL t20, $0x4, CR
+ 29: INCEIPL $4
+
+ 0x25478440: 82010030 lwz r16,48(r1)
+ 30: GETL R1, t22
+ 31: ADDL $0x30, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R16
+ 34: INCEIPL $4
+
+ 0x25478444: 82210034 lwz r17,52(r1)
+ 35: GETL R1, t26
+ 36: ADDL $0x34, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R17
+ 39: INCEIPL $4
+
+ 0x25478448: 82410038 lwz r18,56(r1)
+ 40: GETL R1, t30
+ 41: ADDL $0x38, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R18
+ 44: INCEIPL $4
+
+ 0x2547844C: 8261003C lwz r19,60(r1)
+ 45: GETL R1, t34
+ 46: ADDL $0x3C, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R19
+ 49: INCEIPL $4
+
+ 0x25478450: 82810040 lwz r20,64(r1)
+ 50: GETL R1, t38
+ 51: ADDL $0x40, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R20
+ 54: INCEIPL $4
+
+ 0x25478454: 82A10044 lwz r21,68(r1)
+ 55: GETL R1, t42
+ 56: ADDL $0x44, t42
+ 57: LDL (t42), t44
+ 58: PUTL t44, R21
+ 59: INCEIPL $4
+
+ 0x25478458: 82C10048 lwz r22,72(r1)
+ 60: GETL R1, t46
+ 61: ADDL $0x48, t46
+ 62: LDL (t46), t48
+ 63: PUTL t48, R22
+ 64: INCEIPL $4
+
+ 0x2547845C: 82E1004C lwz r23,76(r1)
+ 65: GETL R1, t50
+ 66: ADDL $0x4C, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R23
+ 69: INCEIPL $4
+
+ 0x25478460: 83010050 lwz r24,80(r1)
+ 70: GETL R1, t54
+ 71: ADDL $0x50, t54
+ 72: LDL (t54), t56
+ 73: PUTL t56, R24
+ 74: INCEIPL $4
+
+ 0x25478464: 83210054 lwz r25,84(r1)
+ 75: GETL R1, t58
+ 76: ADDL $0x54, t58
+ 77: LDL (t58), t60
+ 78: PUTL t60, R25
+ 79: INCEIPL $4
+
+ 0x25478468: 83410058 lwz r26,88(r1)
+ 80: GETL R1, t62
+ 81: ADDL $0x58, t62
+ 82: LDL (t62), t64
+ 83: PUTL t64, R26
+ 84: INCEIPL $4
+
+ 0x2547846C: 8361005C lwz r27,92(r1)
+ 85: GETL R1, t66
+ 86: ADDL $0x5C, t66
+ 87: LDL (t66), t68
+ 88: PUTL t68, R27
+ 89: INCEIPL $4
+
+ 0x25478470: 83810060 lwz r28,96(r1)
+ 90: GETL R1, t70
+ 91: ADDL $0x60, t70
+ 92: LDL (t70), t72
+ 93: PUTL t72, R28
+ 94: INCEIPL $4
+
+ 0x25478474: 83A10064 lwz r29,100(r1)
+ 95: GETL R1, t74
+ 96: ADDL $0x64, t74
+ 97: LDL (t74), t76
+ 98: PUTL t76, R29
+ 99: INCEIPL $4
+
+ 0x25478478: 83C10068 lwz r30,104(r1)
+ 100: GETL R1, t78
+ 101: ADDL $0x68, t78
+ 102: LDL (t78), t80
+ 103: PUTL t80, R30
+ 104: INCEIPL $4
+
+ 0x2547847C: 83E1006C lwz r31,108(r1)
+ 105: GETL R1, t82
+ 106: ADDL $0x6C, t82
+ 107: LDL (t82), t84
+ 108: PUTL t84, R31
+ 109: INCEIPL $4
+
+ 0x25478480: 38210070 addi r1,r1,112
+ 110: GETL R1, t86
+ 111: ADDL $0x70, t86
+ 112: PUTL t86, R1
+ 113: INCEIPL $4
+
+ 0x25478484: 4E800020 blr
+ 114: GETL LR, t88
+ 115: JMPo-r t88 ($4)
+
+
+
+. 1215 25478424 100
+. 38 60 00 00 81 E1 00 74 81 81 00 24 7D E8 03 A6 81 C1 00 28 81 E1 00 2C 7D 81 81 20 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
+==== BB 1216 (0x254786BC) approx BBs exec'd 0 ====
+
+ 0x254786BC: 4180016C bc 12,0,0x25478828
+ 0: Js00o $0x25478828
+
+
+
+. 1216 254786BC 4
+. 41 80 01 6C
+==== BB 1217 (0x254786C0) approx BBs exec'd 0 ====
+
+ 0x254786C0: 84FD0004 lwzu r7,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R29
+ 3: LDL (t0), t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x254786C4: 2F070000 cmpi cr6,r7,0
+ 6: GETL R7, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x254786C8: 409AFFC4 bc 4,26,0x2547868C
+ 10: Jc26o $0x2547868C
+
+
+
+. 1217 254786C0 12
+. 84 FD 00 04 2F 07 00 00 40 9A FF C4
+==== BB 1218 (0x25478BD8) approx BBs exec'd 0 ====
+
+ 0x25478BD8: 81360000 lwz r9,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25478BDC: 2C090000 cmpi cr0,r9,0
+ 4: GETL R9, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x25478BE0: 408201B8 bc 4,2,0x25478D98
+ 8: Jc02o $0x25478D98
+
+
+
+. 1218 25478BD8 12
+. 81 36 00 00 2C 09 00 00 40 82 01 B8
+==== BB 1219 (0x25478D98) approx BBs exec'd 0 ====
+
+ 0x25478D98: 8BA9000C lbz r29,12(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25478D9C: 57BBE13E rlwinm r27,r29,28,4,31
+ 5: GETL R29, t4
+ 6: SHRL $0x4, t4
+ 7: PUTL t4, R27
+ 8: INCEIPL $4
+
+ 0x25478DA0: 2C9B0002 cmpi cr1,r27,2
+ 9: GETL R27, t6
+ 10: MOVL $0x2, t10
+ 11: CMPL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x25478DA4: 4086FE40 bc 4,6,0x25478BE4
+ 14: Jc06o $0x25478BE4
+
+
+
+. 1219 25478D98 16
+. 8B A9 00 0C 57 BB E1 3E 2C 9B 00 02 40 86 FE 40
+==== BB 1220 (0x25478DA8) approx BBs exec'd 0 ====
+
+ 0x25478DA8: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25478DAC: 38000000 li r0,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x25478DB0: 4BFFF990 b 0x25478740
+ 6: JMPo $0x25478740 ($4)
+
+
+
+. 1220 25478DA8 12
+. 38 60 00 00 38 00 00 00 4B FF F9 90
+==== BB 1221 (0x25478740) approx BBs exec'd 0 ====
+
+ 0x25478740: 90160000 stw r0,0(r22)
+ 0: GETL R0, t0
+ 1: GETL R22, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25478744: 80E10000 lwz r7,0(r1)
+ 4: GETL R1, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R7
+ 7: INCEIPL $4
+
+ 0x25478748: 82C70004 lwz r22,4(r7)
+ 8: GETL R7, t8
+ 9: ADDL $0x4, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R22
+ 12: INCEIPL $4
+
+ 0x2547874C: 8107FFC0 lwz r8,-64(r7)
+ 13: GETL R7, t12
+ 14: ADDL $0xFFFFFFC0, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R8
+ 17: INCEIPL $4
+
+ 0x25478750: 7EC803A6 mtlr r22
+ 18: GETL R22, t16
+ 19: PUTL t16, LR
+ 20: INCEIPL $4
+
+ 0x25478754: 8227FFC4 lwz r17,-60(r7)
+ 21: GETL R7, t18
+ 22: ADDL $0xFFFFFFC4, t18
+ 23: LDL (t18), t20
+ 24: PUTL t20, R17
+ 25: INCEIPL $4
+
+ 0x25478758: 8247FFC8 lwz r18,-56(r7)
+ 26: GETL R7, t22
+ 27: ADDL $0xFFFFFFC8, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R18
+ 30: INCEIPL $4
+
+ 0x2547875C: 7D008120 mtcrf 0x8,r8
+ 31: GETL R8, t26
+ 32: ICRFL t26, $0x4, CR
+ 33: INCEIPL $4
+
+ 0x25478760: 8267FFCC lwz r19,-52(r7)
+ 34: GETL R7, t28
+ 35: ADDL $0xFFFFFFCC, t28
+ 36: LDL (t28), t30
+ 37: PUTL t30, R19
+ 38: INCEIPL $4
+
+ 0x25478764: 8287FFD0 lwz r20,-48(r7)
+ 39: GETL R7, t32
+ 40: ADDL $0xFFFFFFD0, t32
+ 41: LDL (t32), t34
+ 42: PUTL t34, R20
+ 43: INCEIPL $4
+
+ 0x25478768: 82A7FFD4 lwz r21,-44(r7)
+ 44: GETL R7, t36
+ 45: ADDL $0xFFFFFFD4, t36
+ 46: LDL (t36), t38
+ 47: PUTL t38, R21
+ 48: INCEIPL $4
+
+ 0x2547876C: 82C7FFD8 lwz r22,-40(r7)
+ 49: GETL R7, t40
+ 50: ADDL $0xFFFFFFD8, t40
+ 51: LDL (t40), t42
+ 52: PUTL t42, R22
+ 53: INCEIPL $4
+
+ 0x25478770: 82E7FFDC lwz r23,-36(r7)
+ 54: GETL R7, t44
+ 55: ADDL $0xFFFFFFDC, t44
+ 56: LDL (t44), t46
+ 57: PUTL t46, R23
+ 58: INCEIPL $4
+
+ 0x25478774: 8307FFE0 lwz r24,-32(r7)
+ 59: GETL R7, t48
+ 60: ADDL $0xFFFFFFE0, t48
+ 61: LDL (t48), t50
+ 62: PUTL t50, R24
+ 63: INCEIPL $4
+
+ 0x25478778: 8327FFE4 lwz r25,-28(r7)
+ 64: GETL R7, t52
+ 65: ADDL $0xFFFFFFE4, t52
+ 66: LDL (t52), t54
+ 67: PUTL t54, R25
+ 68: INCEIPL $4
+
+ 0x2547877C: 8347FFE8 lwz r26,-24(r7)
+ 69: GETL R7, t56
+ 70: ADDL $0xFFFFFFE8, t56
+ 71: LDL (t56), t58
+ 72: PUTL t58, R26
+ 73: INCEIPL $4
+
+ 0x25478780: 8367FFEC lwz r27,-20(r7)
+ 74: GETL R7, t60
+ 75: ADDL $0xFFFFFFEC, t60
+ 76: LDL (t60), t62
+ 77: PUTL t62, R27
+ 78: INCEIPL $4
+
+ 0x25478784: 8387FFF0 lwz r28,-16(r7)
+ 79: GETL R7, t64
+ 80: ADDL $0xFFFFFFF0, t64
+ 81: LDL (t64), t66
+ 82: PUTL t66, R28
+ 83: INCEIPL $4
+
+ 0x25478788: 83A7FFF4 lwz r29,-12(r7)
+ 84: GETL R7, t68
+ 85: ADDL $0xFFFFFFF4, t68
+ 86: LDL (t68), t70
+ 87: PUTL t70, R29
+ 88: INCEIPL $4
+
+ 0x2547878C: 83C7FFF8 lwz r30,-8(r7)
+ 89: GETL R7, t72
+ 90: ADDL $0xFFFFFFF8, t72
+ 91: LDL (t72), t74
+ 92: PUTL t74, R30
+ 93: INCEIPL $4
+
+ 0x25478790: 83E7FFFC lwz r31,-4(r7)
+ 94: GETL R7, t76
+ 95: ADDL $0xFFFFFFFC, t76
+ 96: LDL (t76), t78
+ 97: PUTL t78, R31
+ 98: INCEIPL $4
+
+ 0x25478794: 7CE13B78 or r1,r7,r7
+ 99: GETL R7, t80
+ 100: PUTL t80, R1
+ 101: INCEIPL $4
+
+ 0x25478798: 4E800020 blr
+ 102: GETL LR, t82
+ 103: JMPo-r t82 ($4)
+
+
+
+. 1221 25478740 92
+. 90 16 00 00 80 E1 00 00 82 C7 00 04 81 07 FF C0 7E C8 03 A6 82 27 FF C4 82 47 FF C8 7D 00 81 20 82 67 FF CC 82 87 FF D0 82 A7 FF D4 82 C7 FF D8 82 E7 FF DC 83 07 FF E0 83 27 FF E4 83 47 FF E8 83 67 FF EC 83 87 FF F0 83 A7 FF F4 83 C7 FF F8 83 E7 FF FC 7C E1 3B 78 4E 80 00 20
+==== BB 1222 (0x2547998C) approx BBs exec'd 0 ====
+
+ 0x2547998C: 2F9D0044 cmpi cr7,r29,68
+ 0: GETL R29, t0
+ 1: MOVL $0x44, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25479990: 801C0008 lwz r0,8(r28)
+ 5: GETL R28, t6
+ 6: ADDL $0x8, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R0
+ 9: INCEIPL $4
+
+ 0x25479994: 7D290214 add r9,r9,r0
+ 10: GETL R9, t10
+ 11: GETL R0, t12
+ 12: ADDL t10, t12
+ 13: PUTL t12, R9
+ 14: INCEIPL $4
+
+ 0x25479998: 419E0100 bc 12,30,0x25479A98
+ 15: Js30o $0x25479A98
+
+
+
+. 1222 2547998C 16
+. 2F 9D 00 44 80 1C 00 08 7D 29 02 14 41 9E 01 00
+==== BB 1223 (0x254784A0) approx BBs exec'd 0 ====
+
+ 0x254784A0: 41AEFF18 bc 13,14,0x254783B8
+ 0: Js14o $0x254783B8
+
+
+
+. 1223 254784A0 4
+. 41 AE FF 18
+==== BB 1224 (0x254784A4) approx BBs exec'd 0 ====
+
+ 0x254784A4: 80610014 lwz r3,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254784A8: 5469FFFF rlwinm. r9,r3,31,31,31
+ 5: GETL R3, t4
+ 6: ROLL $0x1F, t4
+ 7: ANDL $0x1, t4
+ 8: PUTL t4, R9
+ 9: CMP0L t4, t6 (-rSo)
+ 10: ICRFL t6, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x254784AC: 4182006C bc 12,2,0x25478518
+ 12: Js02o $0x25478518
+
+
+
+. 1224 254784A4 12
+. 80 61 00 14 54 69 FF FF 41 82 00 6C
+==== BB 1225 (0x25478518) approx BBs exec'd 0 ====
+
+ 0x25478518: 57E9083C rlwinm r9,r31,1,0,30
+ 0: GETL R31, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x2547851C: 7CC9B22E lhzx r6,r9,r22
+ 4: GETL R22, t2
+ 5: GETL R9, t4
+ 6: ADDL t4, t2
+ 7: LDW (t2), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x25478520: 54C5047E rlwinm r5,r6,0,17,31
+ 10: GETL R6, t8
+ 11: ANDL $0x7FFF, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0x25478524: 2F850002 cmpi cr7,r5,2
+ 14: GETL R5, t10
+ 15: MOVL $0x2, t14
+ 16: CMPL t10, t14, t12 (-rSo)
+ 17: ICRFL t12, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x25478528: 4BFFFF98 b 0x254784C0
+ 19: JMPo $0x254784C0 ($4)
+
+
+
+. 1225 25478518 20
+. 57 E9 08 3C 7C C9 B2 2E 54 C5 04 7E 2F 85 00 02 4B FF FF 98
+==== BB 1226 (0x254784C0) approx BBs exec'd 0 ====
+
+ 0x254784C0: 40BDFEF8 bc 5,29,0x254783B8
+ 0: Jc29o $0x254783B8
+
+
+
+. 1226 254784C0 4
+. 40 BD FE F8
+==== BB 1227 (0x254799A8) approx BBs exec'd 0 ====
+
+ 0x254799A8: 2C1D0014 cmpi cr0,r29,20
+ 0: GETL R29, t0
+ 1: MOVL $0x14, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254799AC: 418200E4 bc 12,2,0x25479A90
+ 5: Js02o $0x25479A90
+
+
+
+. 1227 254799A8 8
+. 2C 1D 00 14 41 82 00 E4
+==== BB 1228 (0x254799D8) approx BBs exec'd 0 ====
+
+ 0x254799D8: 83BF000C lwz r29,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254799DC: 4BFFFD44 b 0x25479720
+ 5: JMPo $0x25479720 ($4)
+
+
+
+. 1228 254799D8 8
+. 83 BF 00 0C 4B FF FD 44
+==== BB 1229 (0x25479720) approx BBs exec'd 0 ====
+
+ 0x25479720: 3652FFFF addic. r18,r18,-1
+ 0: GETL R18, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R18
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25479724: 3AB5000C addi r21,r21,12
+ 6: GETL R21, t4
+ 7: ADDL $0xC, t4
+ 8: PUTL t4, R21
+ 9: INCEIPL $4
+
+ 0x25479728: 4080FFC0 bc 4,0,0x254796E8
+ 10: Jc00o $0x254796E8
+
+
+
+. 1229 25479720 12
+. 36 52 FF FF 3A B5 00 0C 40 80 FF C0
+==== BB 1230 (0x254796E8) approx BBs exec'd 0 ====
+
+ 0x254796E8: 80B50020 lwz r5,32(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x254796EC: 7FB6EB78 or r22,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R22
+ 7: INCEIPL $4
+
+ 0x254796F0: 81750018 lwz r11,24(r21)
+ 8: GETL R21, t6
+ 9: ADDL $0x18, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x254796F4: 2C050000 cmpi cr0,r5,0
+ 13: GETL R5, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x0, CR
+ 16: INCEIPL $4
+
+ 0x254796F8: 8115001C lwz r8,28(r21)
+ 17: GETL R21, t14
+ 18: ADDL $0x1C, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R8
+ 21: INCEIPL $4
+
+ 0x254796FC: 7D695B78 or r9,r11,r11
+ 22: GETL R11, t18
+ 23: PUTL t18, R9
+ 24: INCEIPL $4
+
+ 0x25479700: 833D0000 lwz r25,0(r29)
+ 25: GETL R29, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R25
+ 28: INCEIPL $4
+
+ 0x25479704: 7F0B4214 add r24,r11,r8
+ 29: GETL R11, t24
+ 30: GETL R8, t26
+ 31: ADDL t24, t26
+ 32: PUTL t26, R24
+ 33: INCEIPL $4
+
+ 0x25479708: 418200BC bc 12,2,0x254797C4
+ 34: Js02o $0x254797C4
+
+
+
+. 1230 254796E8 36
+. 80 B5 00 20 7F B6 EB 78 81 75 00 18 2C 05 00 00 81 15 00 1C 7D 69 5B 78 83 3D 00 00 7F 0B 42 14 41 82 00 BC
+==== BB 1231 (0x2547970C) approx BBs exec'd 0 ====
+
+ 0x2547970C: 7F8BC040 cmpl cr7,r11,r24
+ 0: GETL R11, t0
+ 1: GETL R24, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25479710: 409C0010 bc 4,28,0x25479720
+ 5: Jc28o $0x25479720
+
+
+
+. 1231 2547970C 8
+. 7F 8B C0 40 40 9C 00 10
+==== BB 1232 (0x25479714) approx BBs exec'd 0 ====
+
+ 0x25479714: 3929000C addi r9,r9,12
+ 0: GETL R9, t0
+ 1: ADDL $0xC, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x25479718: 7F89C040 cmpl cr7,r9,r24
+ 4: GETL R9, t2
+ 5: GETL R24, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547971C: 419CFFF8 bc 12,28,0x25479714
+ 9: Js28o $0x25479714
+
+
+
+. 1232 25479714 12
+. 39 29 00 0C 7F 89 C0 40 41 9C FF F8
+==== BB 1233 (0x254797FC) approx BBs exec'd 0 ====
+
+ 0x254797FC: 3B7001B8 addi r27,r16,440
+ 0: GETL R16, t0
+ 1: ADDL $0x1B8, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25479800: 1CE9000C mulli r7,r9,12
+ 4: GETL R9, t2
+ 5: MULL $0xC, t2
+ 6: PUTL t2, R7
+ 7: INCEIPL $4
+
+ 0x25479804: 7E1DD800 cmp cr4,r29,r27
+ 8: GETL R29, t4
+ 9: GETL R27, t6
+ 10: CMPL t4, t6, t8 (-rSo)
+ 11: ICRFL t8, $0x4, CR
+ 12: INCEIPL $4
+
+ 0x25479808: 7F8B3A14 add r28,r11,r7
+ 13: GETL R11, t10
+ 14: GETL R7, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0x2547980C: 41920018 bc 12,18,0x25479824
+ 18: Js18o $0x25479824
+
+
+
+. 1233 254797FC 20
+. 3B 70 01 B8 1C E9 00 0C 7E 1D D8 00 7F 8B 3A 14 41 92 00 18
+==== BB 1234 (0x2547972C) approx BBs exec'd 0 ====
+
+ 0x2547972C: 408E0710 bc 4,14,0x25479E3C
+ 0: Jc14o $0x25479E3C
+
+
+
+. 1234 2547972C 4
+. 40 8E 07 10
+==== BB 1235 (0x25479730) approx BBs exec'd 0 ====
+
+ 0x25479730: 827D0180 lwz r19,384(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0x25479734: 2F910000 cmpi cr7,r17,0
+ 5: GETL R17, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25479738: 66722000 oris r18,r19,0x2000
+ 9: GETL R19, t8
+ 10: ORL $0x20000000, t8
+ 11: PUTL t8, R18
+ 12: INCEIPL $4
+
+ 0x2547973C: 925D0180 stw r18,384(r29)
+ 13: GETL R18, t10
+ 14: GETL R29, t12
+ 15: ADDL $0x180, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25479740: 409E05C0 bc 4,30,0x25479D00
+ 18: Jc30o $0x25479D00
+
+
+
+. 1235 25479730 20
+. 82 7D 01 80 2F 91 00 00 66 72 20 00 92 5D 01 80 40 9E 05 C0
+==== BB 1236 (0x25479744) approx BBs exec'd 0 ====
+
+ 0x25479744: 807F000C lwz r3,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25479748: 82A30238 lwz r21,568(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x238, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R21
+ 9: INCEIPL $4
+
+ 0x2547974C: 2F950000 cmpi cr7,r21,0
+ 10: GETL R21, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25479750: 409E02BC bc 4,30,0x25479A0C
+ 14: Jc30o $0x25479A0C
+
+
+
+. 1236 25479744 16
+. 80 7F 00 0C 82 A3 02 38 2F 95 00 00 40 9E 02 BC
+==== BB 1237 (0x25479A0C) approx BBs exec'd 0 ====
+
+ 0x25479A0C: 4BFFFB1D bl 0x25479528
+ 0: MOVL $0x25479A10, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25479528 ($4)
+
+
+
+. 1237 25479A0C 4
+. 4B FF FB 1D
+==== BB 1238 _dl_protect_relro(0x25479528) approx BBs exec'd 0 ====
+
+ 0x25479528: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547952C: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x25479530: 4801DAD1 bl 0x25497000
+ 9: MOVL $0x25479534, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 1238 25479528 12
+. 94 21 FF F0 7D 88 02 A6 48 01 DA D1
+==== BB 1239 (0x25479534) approx BBs exec'd 0 ====
+
+ 0x25479534: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25479538: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547953C: 93E1000C stw r31,12(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25479540: 91810014 stw r12,20(r1)
+ 13: GETL R12, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25479544: 7C7F1B78 or r31,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0x25479548: 80A30000 lwz r5,0(r3)
+ 21: GETL R3, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R5
+ 24: INCEIPL $4
+
+ 0x2547954C: 813E04F4 lwz r9,1268(r30)
+ 25: GETL R30, t20
+ 26: ADDL $0x4F4, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R9
+ 29: INCEIPL $4
+
+ 0x25479550: 81030234 lwz r8,564(r3)
+ 30: GETL R3, t24
+ 31: ADDL $0x234, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R8
+ 34: INCEIPL $4
+
+ 0x25479554: 80E30238 lwz r7,568(r3)
+ 35: GETL R3, t28
+ 36: ADDL $0x238, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R7
+ 39: INCEIPL $4
+
+ 0x25479558: 80C90004 lwz r6,4(r9)
+ 40: GETL R9, t32
+ 41: ADDL $0x4, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R6
+ 44: INCEIPL $4
+
+ 0x2547955C: 7C654214 add r3,r5,r8
+ 45: GETL R5, t36
+ 46: GETL R8, t38
+ 47: ADDL t36, t38
+ 48: PUTL t38, R3
+ 49: INCEIPL $4
+
+ 0x25479560: 7C833A14 add r4,r3,r7
+ 50: GETL R3, t40
+ 51: GETL R7, t42
+ 52: ADDL t40, t42
+ 53: PUTL t42, R4
+ 54: INCEIPL $4
+
+ 0x25479564: 38A00001 li r5,1
+ 55: MOVL $0x1, t44
+ 56: PUTL t44, R5
+ 57: INCEIPL $4
+
+ 0x25479568: 7D4600D0 neg r10,r6
+ 58: GETL R6, t46
+ 59: NEGL t46
+ 60: PUTL t46, R10
+ 61: INCEIPL $4
+
+ 0x2547956C: 7C605038 and r0,r3,r10
+ 62: GETL R3, t48
+ 63: GETL R10, t50
+ 64: ANDL t48, t50
+ 65: PUTL t50, R0
+ 66: INCEIPL $4
+
+ 0x25479570: 7C8B5038 and r11,r4,r10
+ 67: GETL R4, t52
+ 68: GETL R10, t54
+ 69: ANDL t52, t54
+ 70: PUTL t54, R11
+ 71: INCEIPL $4
+
+ 0x25479574: 7F805800 cmp cr7,r0,r11
+ 72: GETL R0, t56
+ 73: GETL R11, t58
+ 74: CMPL t56, t58, t60 (-rSo)
+ 75: ICRFL t60, $0x7, CR
+ 76: INCEIPL $4
+
+ 0x25479578: 7C030378 or r3,r0,r0
+ 77: GETL R0, t62
+ 78: PUTL t62, R3
+ 79: INCEIPL $4
+
+ 0x2547957C: 7C805850 subf r4,r0,r11
+ 80: GETL R0, t64
+ 81: GETL R11, t66
+ 82: SUBL t64, t66
+ 83: PUTL t66, R4
+ 84: INCEIPL $4
+
+ 0x25479580: 419E0010 bc 12,30,0x25479590
+ 85: Js30o $0x25479590
+
+
+
+. 1239 25479534 80
+. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 91 81 00 14 7C 7F 1B 78 80 A3 00 00 81 3E 04 F4 81 03 02 34 80 E3 02 38 80 C9 00 04 7C 65 42 14 7C 83 3A 14 38 A0 00 01 7D 46 00 D0 7C 60 50 38 7C 8B 50 38 7F 80 58 00 7C 03 03 78 7C 80 58 50 41 9E 00 10
+==== BB 1240 (0x25479584) approx BBs exec'd 0 ====
+
+ 0x25479584: 48009235 bl 0x254827B8
+ 0: MOVL $0x25479588, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x254827B8 ($4)
+
+
+
+. 1240 25479584 4
+. 48 00 92 35
+==== BB 1241 (0x25479588) approx BBs exec'd 0 ====
+
+ 0x25479588: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x2547958C: 4180001C bc 12,0,0x254795A8
+ 4: Js00o $0x254795A8
+
+
+
+. 1241 25479588 8
+. 2C 03 00 00 41 80 00 1C
+==== BB 1242 (0x25479590) approx BBs exec'd 0 ====
+
+ 0x25479590: 81610014 lwz r11,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25479594: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0x25479598: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0x2547959C: 7D6803A6 mtlr r11
+ 15: GETL R11, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x254795A0: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0x254795A4: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 1242 25479590 24
+. 81 61 00 14 83 C1 00 08 83 E1 00 0C 7D 68 03 A6 38 21 00 10 4E 80 00 20
+==== BB 1243 (0x25479A10) approx BBs exec'd 0 ====
+
+ 0x25479A10: 4BFFFD44 b 0x25479754
+ 0: JMPo $0x25479754 ($4)
+
+
+
+. 1243 25479A10 4
+. 4B FF FD 44
+==== BB 1244 (0x25479754) approx BBs exec'd 0 ====
+
+ 0x25479754: 80810000 lwz r4,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25479758: 83240004 lwz r25,4(r4)
+ 4: GETL R4, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R25
+ 8: INCEIPL $4
+
+ 0x2547975C: 8184FFBC lwz r12,-68(r4)
+ 9: GETL R4, t8
+ 10: ADDL $0xFFFFFFBC, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0x25479760: 7F2803A6 mtlr r25
+ 14: GETL R25, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x25479764: 8204FFC0 lwz r16,-64(r4)
+ 17: GETL R4, t14
+ 18: ADDL $0xFFFFFFC0, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R16
+ 21: INCEIPL $4
+
+ 0x25479768: 8224FFC4 lwz r17,-60(r4)
+ 22: GETL R4, t18
+ 23: ADDL $0xFFFFFFC4, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R17
+ 26: INCEIPL $4
+
+ 0x2547976C: 7D818120 mtcrf 0x18,r12
+ 27: GETL R12, t22
+ 28: ICRFL t22, $0x3, CR
+ 29: ICRFL t22, $0x4, CR
+ 30: INCEIPL $4
+
+ 0x25479770: 8244FFC8 lwz r18,-56(r4)
+ 31: GETL R4, t24
+ 32: ADDL $0xFFFFFFC8, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R18
+ 35: INCEIPL $4
+
+ 0x25479774: 8264FFCC lwz r19,-52(r4)
+ 36: GETL R4, t28
+ 37: ADDL $0xFFFFFFCC, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R19
+ 40: INCEIPL $4
+
+ 0x25479778: 8284FFD0 lwz r20,-48(r4)
+ 41: GETL R4, t32
+ 42: ADDL $0xFFFFFFD0, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R20
+ 45: INCEIPL $4
+
+ 0x2547977C: 82A4FFD4 lwz r21,-44(r4)
+ 46: GETL R4, t36
+ 47: ADDL $0xFFFFFFD4, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R21
+ 50: INCEIPL $4
+
+ 0x25479780: 82C4FFD8 lwz r22,-40(r4)
+ 51: GETL R4, t40
+ 52: ADDL $0xFFFFFFD8, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R22
+ 55: INCEIPL $4
+
+ 0x25479784: 82E4FFDC lwz r23,-36(r4)
+ 56: GETL R4, t44
+ 57: ADDL $0xFFFFFFDC, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R23
+ 60: INCEIPL $4
+
+ 0x25479788: 8304FFE0 lwz r24,-32(r4)
+ 61: GETL R4, t48
+ 62: ADDL $0xFFFFFFE0, t48
+ 63: LDL (t48), t50
+ 64: PUTL t50, R24
+ 65: INCEIPL $4
+
+ 0x2547978C: 8324FFE4 lwz r25,-28(r4)
+ 66: GETL R4, t52
+ 67: ADDL $0xFFFFFFE4, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R25
+ 70: INCEIPL $4
+
+ 0x25479790: 8344FFE8 lwz r26,-24(r4)
+ 71: GETL R4, t56
+ 72: ADDL $0xFFFFFFE8, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R26
+ 75: INCEIPL $4
+
+ 0x25479794: 8364FFEC lwz r27,-20(r4)
+ 76: GETL R4, t60
+ 77: ADDL $0xFFFFFFEC, t60
+ 78: LDL (t60), t62
+ 79: PUTL t62, R27
+ 80: INCEIPL $4
+
+ 0x25479798: 8384FFF0 lwz r28,-16(r4)
+ 81: GETL R4, t64
+ 82: ADDL $0xFFFFFFF0, t64
+ 83: LDL (t64), t66
+ 84: PUTL t66, R28
+ 85: INCEIPL $4
+
+ 0x2547979C: 83A4FFF4 lwz r29,-12(r4)
+ 86: GETL R4, t68
+ 87: ADDL $0xFFFFFFF4, t68
+ 88: LDL (t68), t70
+ 89: PUTL t70, R29
+ 90: INCEIPL $4
+
+ 0x254797A0: 83C4FFF8 lwz r30,-8(r4)
+ 91: GETL R4, t72
+ 92: ADDL $0xFFFFFFF8, t72
+ 93: LDL (t72), t74
+ 94: PUTL t74, R30
+ 95: INCEIPL $4
+
+ 0x254797A4: 83E4FFFC lwz r31,-4(r4)
+ 96: GETL R4, t76
+ 97: ADDL $0xFFFFFFFC, t76
+ 98: LDL (t76), t78
+ 99: PUTL t78, R31
+ 100: INCEIPL $4
+
+ 0x254797A8: 7C812378 or r1,r4,r4
+ 101: GETL R4, t80
+ 102: PUTL t80, R1
+ 103: INCEIPL $4
+
+ 0x254797AC: 4E800020 blr
+ 104: GETL LR, t82
+ 105: JMPo-r t82 ($4)
+
+
+
+. 1244 25479754 92
+. 80 81 00 00 83 24 00 04 81 84 FF BC 7F 28 03 A6 82 04 FF C0 82 24 FF C4 7D 81 81 20 82 44 FF C8 82 64 FF CC 82 84 FF D0 82 A4 FF D4 82 C4 FF D8 82 E4 FF DC 83 04 FF E0 83 24 FF E4 83 44 FF E8 83 64 FF EC 83 84 FF F0 83 A4 FF F4 83 C4 FF F8 83 E4 FF FC 7C 81 23 78 4E 80 00 20
+==== BB 1245 (0x254733B4) approx BBs exec'd 0 ====
+
+ 0x254733B4: 83BD0010 lwz r29,16(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254733B8: 2E1D0000 cmpi cr4,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254733BC: 4092FFC8 bc 4,18,0x25473384
+ 9: Jc18o $0x25473384
+
+
+
+. 1245 254733B4 12
+. 83 BD 00 10 2E 1D 00 00 40 92 FF C8
+==== BB 1246 (0x254737B0) approx BBs exec'd 0 ====
+
+ 0x254737B0: 38000001 li r0,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254737B4: 90090008 stw r0,8(r9)
+ 3: GETL R0, t2
+ 4: GETL R9, t4
+ 5: ADDL $0x8, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x254737B8: 81290004 lwz r9,4(r9)
+ 8: GETL R9, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0x254737BC: 2C890000 cmpi cr1,r9,0
+ 13: GETL R9, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x1, CR
+ 16: INCEIPL $4
+
+ 0x254737C0: 4186FBD4 bc 12,6,0x25473394
+ 17: Js06o $0x25473394
+
+
+
+. 1246 254737B0 20
+. 38 00 00 01 90 09 00 08 81 29 00 04 2C 89 00 00 41 86 FB D4
+==== BB 1247 (0x254799E0) approx BBs exec'd 0 ====
+
+ 0x254799E0: 7F8BE040 cmpl cr7,r11,r28
+ 0: GETL R11, t0
+ 1: GETL R28, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x254799E4: 40BCFE40 bc 5,28,0x25479824
+ 5: Jc28o $0x25479824
+
+
+
+. 1247 254799E0 8
+. 7F 8B E0 40 40 BC FE 40
+==== BB 1248 (0x254799E8) approx BBs exec'd 0 ====
+
+ 0x254799E8: 812B0008 lwz r9,8(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x254799EC: 808B0000 lwz r4,0(r11)
+ 5: GETL R11, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x254799F0: 396B000C addi r11,r11,12
+ 9: GETL R11, t8
+ 10: ADDL $0xC, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x254799F4: 7F8BE040 cmpl cr7,r11,r28
+ 13: GETL R11, t10
+ 14: GETL R28, t12
+ 15: CMPUL t10, t12, t14 (-rSo)
+ 16: ICRFL t14, $0x7, CR
+ 17: INCEIPL $4
+
+ 0x254799F8: 7D09CA14 add r8,r9,r25
+ 18: GETL R9, t16
+ 19: GETL R25, t18
+ 20: ADDL t16, t18
+ 21: PUTL t18, R8
+ 22: INCEIPL $4
+
+ 0x254799FC: 7D04C92E stwx r8,r4,r25
+ 23: GETL R25, t20
+ 24: GETL R4, t22
+ 25: ADDL t22, t20
+ 26: GETL R8, t24
+ 27: STL t24, (t20)
+ 28: INCEIPL $4
+
+ 0x25479A00: 4BFFFFE4 b 0x254799E4
+ 29: JMPo $0x254799E4 ($4)
+
+
+
+. 1248 254799E8 28
+. 81 2B 00 08 80 8B 00 00 39 6B 00 0C 7F 8B E0 40 7D 09 CA 14 7D 04 C9 2E 4B FF FF E4
+==== BB 1249 (0x254799E4) approx BBs exec'd 0 ====
+
+ 0x254799E4: 40BCFE40 bc 5,28,0x25479824
+ 0: Jc28o $0x25479824
+
+
+
+. 1249 254799E4 4
+. 40 BC FE 40
+==== BB 1250 (0x254783C4) approx BBs exec'd 0 ====
+
+ 0x254783C4: 2C000002 cmpi cr0,r0,2
+ 0: GETL R0, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254783C8: 41820164 bc 12,2,0x2547852C
+ 5: Js02o $0x2547852C
+
+
+
+. 1250 254783C4 8
+. 2C 00 00 02 41 82 01 64
+==== BB 1251 (0x2547852C) approx BBs exec'd 0 ====
+
+ 0x2547852C: 829E04F4 lwz r20,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R20
+ 4: INCEIPL $4
+
+ 0x25478530: 82740030 lwz r19,48(r20)
+ 5: GETL R20, t4
+ 6: ADDL $0x30, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R19
+ 9: INCEIPL $4
+
+ 0x25478534: 2C930000 cmpi cr1,r19,0
+ 10: GETL R19, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x25478538: 40860018 bc 4,6,0x25478550
+ 14: Jc06o $0x25478550
+
+
+
+. 1251 2547852C 16
+. 82 9E 04 F4 82 74 00 30 2C 93 00 00 40 86 00 18
+==== BB 1252 (0x2547839C) approx BBs exec'd 0 ====
+
+ 0x2547839C: 80150008 lwz r0,8(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x254783A0: 2C000000 cmpi cr0,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x254783A4: 4082FF4C bc 4,2,0x254782F0
+ 9: Jc02o $0x254782F0
+
+
+
+. 1252 2547839C 12
+. 80 15 00 08 2C 00 00 00 40 82 FF 4C
+==== BB 1253 (0x254783A8) approx BBs exec'd 0 ====
+
+ 0x254783A8: 2F990000 cmpi cr7,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x254783AC: 40BEFF44 bc 5,30,0x254782F0
+ 4: Jc30o $0x254782F0
+
+
+
+. 1253 254783A8 8
+. 2F 99 00 00 40 BE FF 44
+==== BB 1254 (0x25479EE4) approx BBs exec'd 0 ====
+
+ 0x25479EE4: 7D200026 mfcr r9
+ 0: GETL CR, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25479EE8: 55299FFE rlwinm r9,r9,19,31,31
+ 3: GETL R9, t2
+ 4: ROLL $0x13, t2
+ 5: ANDL $0x1, t2
+ 6: PUTL t2, R9
+ 7: INCEIPL $4
+
+ 0x25479EEC: 39600000 li r11,0
+ 8: MOVL $0x0, t4
+ 9: PUTL t4, R11
+ 10: INCEIPL $4
+
+ 0x25479EF0: 7CA00026 mfcr r5
+ 11: GETL CR, t6
+ 12: PUTL t6, R5
+ 13: INCEIPL $4
+
+ 0x25479EF4: 54A53FFE rlwinm r5,r5,7,31,31
+ 14: GETL R5, t8
+ 15: ROLL $0x7, t8
+ 16: ANDL $0x1, t8
+ 17: PUTL t8, R5
+ 18: INCEIPL $4
+
+ 0x25479EF8: 7D282B79 or. r8,r9,r5
+ 19: GETL R9, t10
+ 20: GETL R5, t12
+ 21: ORL t12, t10
+ 22: PUTL t10, R8
+ 23: CMP0L t10, t14 (-rSo)
+ 24: ICRFL t14, $0x0, CR
+ 25: INCEIPL $4
+
+ 0x25479EFC: 40820058 bc 4,2,0x25479F54
+ 26: Jc02o $0x25479F54
+
+
+
+. 1254 25479EE4 28
+. 7D 20 00 26 55 29 9F FE 39 60 00 00 7C A0 00 26 54 A5 3F FE 7D 28 2B 79 40 82 00 58
+==== BB 1255 (0x25479F00) approx BBs exec'd 0 ====
+
+ 0x25479F00: 381DFFBC addi r0,r29,-68
+ 0: GETL R29, t0
+ 1: ADDL $0xFFFFFFBC, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x25479F04: 6BA30002 xori r3,r29,0x2
+ 4: GETL R29, t2
+ 5: XORL $0x2, t2
+ 6: PUTL t2, R3
+ 7: INCEIPL $4
+
+ 0x25479F08: 21030000 subfic r8,r3,0
+ 8: GETL R3, t4
+ 9: MOVL $0x0, t6
+ 10: SBBL t4, t6 (-wCa)
+ 11: PUTL t6, R8
+ 12: INCEIPL $4
+
+ 0x25479F0C: 7C681914 adde r3,r8,r3
+ 13: GETL R8, t8
+ 14: GETL R3, t10
+ 15: ADCL t8, t10 (-rCa-wCa)
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0x25479F10: 2180000A subfic r12,r0,10
+ 18: GETL R0, t12
+ 19: MOVL $0xA, t14
+ 20: SBBL t12, t14 (-wCa)
+ 21: PUTL t14, R12
+ 22: INCEIPL $4
+
+ 0x25479F14: 39800000 li r12,0
+ 23: MOVL $0x0, t16
+ 24: PUTL t16, R12
+ 25: INCEIPL $4
+
+ 0x25479F18: 7D8C6114 adde r12,r12,r12
+ 26: GETL R12, t18
+ 27: GETL R12, t20
+ 28: ADCL t18, t20 (-rCa-wCa)
+ 29: PUTL t20, R12
+ 30: INCEIPL $4
+
+ 0x25479F1C: 7D881B79 or. r8,r12,r3
+ 31: GETL R12, t22
+ 32: GETL R3, t24
+ 33: ORL t24, t22
+ 34: PUTL t22, R8
+ 35: CMP0L t22, t26 (-rSo)
+ 36: ICRFL t26, $0x0, CR
+ 37: INCEIPL $4
+
+ 0x25479F20: 40820034 bc 4,2,0x25479F54
+ 38: Jc02o $0x25479F54
+
+
+
+. 1255 25479F00 36
+. 38 1D FF BC 6B A3 00 02 21 03 00 00 7C 68 19 14 21 80 00 0A 39 80 00 00 7D 8C 61 14 7D 88 1B 79 40 82 00 34
+==== BB 1256 (0x25479F24) approx BBs exec'd 0 ====
+
+ 0x25479F24: 2F1D0013 cmpi cr6,r29,19
+ 0: GETL R29, t0
+ 1: MOVL $0x13, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25479F28: 8124020C lwz r9,524(r4)
+ 5: GETL R4, t6
+ 6: ADDL $0x20C, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R9
+ 9: INCEIPL $4
+
+ 0x25479F2C: 419A00B4 bc 12,26,0x25479FE0
+ 10: Js26o $0x25479FE0
+
+
+
+. 1256 25479F24 12
+. 2F 1D 00 13 81 24 02 0C 41 9A 00 B4
+==== BB 1257 (0x25479F30) approx BBs exec'd 0 ====
+
+ 0x25479F30: 7F8B4800 cmp cr7,r11,r9
+ 0: GETL R11, t0
+ 1: GETL R9, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25479F34: 409EF988 bc 4,30,0x254798BC
+ 5: Jc30o $0x254798BC
+
+
+
+. 1257 25479F30 8
+. 7F 8B 48 00 40 9E F9 88
+==== BB 1258 (0x25479F38) approx BBs exec'd 0 ====
+
+ 0x25479F38: 817001AC lwz r11,428(r16)
+ 0: GETL R16, t0
+ 1: ADDL $0x1AC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25479F3C: 80C40214 lwz r6,532(r4)
+ 5: GETL R4, t4
+ 6: ADDL $0x214, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x25479F40: 83440210 lwz r26,528(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0x210, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R26
+ 14: INCEIPL $4
+
+ 0x25479F44: 394B0001 addi r10,r11,1
+ 15: GETL R11, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x25479F48: 915001AC stw r10,428(r16)
+ 19: GETL R10, t14
+ 20: GETL R16, t16
+ 21: ADDL $0x1AC, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x25479F4C: 90DF0050 stw r6,80(r31)
+ 24: GETL R6, t18
+ 25: GETL R31, t20
+ 26: ADDL $0x50, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x25479F50: 4BFFFA24 b 0x25479974
+ 29: JMPo $0x25479974 ($4)
+
+
+
+. 1258 25479F38 28
+. 81 70 01 AC 80 C4 02 14 83 44 02 10 39 4B 00 01 91 50 01 AC 90 DF 00 50 4B FF FA 24
+==== BB 1259 (0x25479974) approx BBs exec'd 0 ====
+
+ 0x25479974: 2F060000 cmpi cr6,r6,0
+ 0: GETL R6, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25479978: 39200000 li r9,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R9
+ 6: INCEIPL $4
+
+ 0x2547997C: 419A0010 bc 12,26,0x2547998C
+ 7: Js26o $0x2547998C
+
+
+
+. 1259 25479974 12
+. 2F 06 00 00 39 20 00 00 41 9A 00 10
+==== BB 1260 (0x25479EBC) approx BBs exec'd 0 ====
+
+ 0x25479EBC: A11B000E lhz r8,14(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xE, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25479EC0: 2F880000 cmpi cr7,r8,0
+ 5: GETL R8, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25479EC4: 41BEF9D0 bc 13,30,0x25479894
+ 9: Js30o $0x25479894
+
+
+
+. 1260 25479EBC 12
+. A1 1B 00 0E 2F 88 00 00 41 BE F9 D0
+==== BB 1261 (0x25479A50) approx BBs exec'd 0 ====
+
+ 0x25479A50: 835F000C lwz r26,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25479A54: 4BFFFF20 b 0x25479974
+ 5: JMPo $0x25479974 ($4)
+
+
+
+. 1261 25479A50 8
+. 83 5F 00 0C 4B FF FF 20
+==== BB 1262 (0x25479A98) approx BBs exec'd 0 ====
+
+ 0x25479A98: 2F1A0000 cmpi cr6,r26,0
+ 0: GETL R26, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25479A9C: 41BAFF30 bc 13,26,0x254799CC
+ 4: Js26o $0x254799CC
+
+
+
+. 1262 25479A98 8
+. 2F 1A 00 00 41 BA FF 30
+==== BB 1263 (0x25479AA0) approx BBs exec'd 0 ====
+
+ 0x25479AA0: 837A0230 lwz r27,560(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x230, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x25479AA4: 93770000 stw r27,0(r23)
+ 5: GETL R27, t4
+ 6: GETL R23, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x25479AA8: 4BFFFF24 b 0x254799CC
+ 9: JMPo $0x254799CC ($4)
+
+
+
+. 1263 25479AA0 12
+. 83 7A 02 30 93 77 00 00 4B FF FF 24
+==== BB 1264 (0x25479A6C) approx BBs exec'd 0 ====
+
+ 0x25479A6C: 2C9D0049 cmpi cr1,r29,73
+ 0: GETL R29, t0
+ 1: MOVL $0x49, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25479A70: 41860238 bc 12,6,0x25479CA8
+ 5: Js06o $0x25479CA8
+
+
+
+. 1264 25479A6C 8
+. 2C 9D 00 49 41 86 02 38
+==== BB 1265 (0x25479CA8) approx BBs exec'd 0 ====
+
+ 0x25479CA8: 2C1A0000 cmpi cr0,r26,0
+ 0: GETL R26, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25479CAC: 41A2FD20 bc 13,2,0x254799CC
+ 4: Js02o $0x254799CC
+
+
+
+. 1265 25479CA8 8
+. 2C 1A 00 00 41 A2 FD 20
+==== BB 1266 (0x25479CB0) approx BBs exec'd 0 ====
+
+ 0x25479CB0: 817A022C lwz r11,556(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x22C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25479CB4: 2C8BFFFF cmpi cr1,r11,-1
+ 5: GETL R11, t4
+ 6: MOVL $0xFFFFFFFF, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x25479CB8: 4186034C bc 12,6,0x2547A004
+ 10: Js06o $0x2547A004
+
+
+
+. 1266 25479CB0 12
+. 81 7A 02 2C 2C 8B FF FF 41 86 03 4C
+==== BB 1267 (0x25479CBC) approx BBs exec'd 0 ====
+
+ 0x25479CBC: 83460004 lwz r26,4(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25479CC0: 7D8BD214 add r12,r11,r26
+ 5: GETL R11, t4
+ 6: GETL R26, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25479CC4: 7C6C0214 add r3,r12,r0
+ 10: GETL R12, t8
+ 11: GETL R0, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x25479CC8: 39239000 addi r9,r3,-28672
+ 15: GETL R3, t12
+ 16: ADDL $0xFFFF9000, t12
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0x25479CCC: 91370000 stw r9,0(r23)
+ 19: GETL R9, t14
+ 20: GETL R23, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25479CD0: 4BFFFCFC b 0x254799CC
+ 23: JMPo $0x254799CC ($4)
+
+
+
+. 1267 25479CBC 24
+. 83 46 00 04 7D 8B D2 14 7C 6C 02 14 39 23 90 00 91 37 00 00 4B FF FC FC
+==== BB 1268 (0x25479A04) approx BBs exec'd 0 ====
+
+ 0x25479A04: 39000001 li r8,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0x25479A08: 4BFFFEF4 b 0x254798FC
+ 3: JMPo $0x254798FC ($4)
+
+
+
+. 1268 25479A04 8
+. 39 00 00 01 4B FF FE F4
+==== BB 1269 (0x254799B0) approx BBs exec'd 0 ====
+
+ 0x254799B0: 7F45D378 or r5,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x254799B4: 7F67DB78 or r7,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x254799B8: 7EE8BB78 or r8,r23,r23
+ 6: GETL R23, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x254799BC: 7FAAEB78 or r10,r29,r29
+ 9: GETL R29, t6
+ 10: PUTL t6, R10
+ 11: INCEIPL $4
+
+ 0x254799C0: 7EC3B378 or r3,r22,r22
+ 12: GETL R22, t8
+ 13: PUTL t8, R3
+ 14: INCEIPL $4
+
+ 0x254799C4: 7F84E378 or r4,r28,r28
+ 15: GETL R28, t10
+ 16: PUTL t10, R4
+ 17: INCEIPL $4
+
+ 0x254799C8: 480072E1 bl 0x25480CA8
+ 18: MOVL $0x254799CC, t12
+ 19: PUTL t12, LR
+ 20: JMPo-c $0x25480CA8 ($4)
+
+
+
+. 1269 254799B0 28
+. 7F 45 D3 78 7F 67 DB 78 7E E8 BB 78 7F AA EB 78 7E C3 B3 78 7F 84 E3 78 48 00 72 E1
+==== BB 1270 (0x25480FF0) approx BBs exec'd 0 ====
+
+ 0x25480FF0: 3D3AFE00 addis r9,r26,-512
+ 0: GETL R26, t0
+ 1: ADDL $0xFE000000, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x25480FF4: 3D60FC00 lis r11,-1024
+ 4: MOVL $0xFC000000, t2
+ 5: PUTL t2, R11
+ 6: INCEIPL $4
+
+ 0x25480FF8: 38690003 addi r3,r9,3
+ 7: GETL R9, t4
+ 8: ADDL $0x3, t4
+ 9: PUTL t4, R3
+ 10: INCEIPL $4
+
+ 0x25480FFC: 61600002 ori r0,r11,0x2
+ 11: MOVL $0xFC000002, t6
+ 12: PUTL t6, R0
+ 13: INCEIPL $4
+
+ 0x25481000: 7C030040 cmpl cr0,r3,r0
+ 14: GETL R3, t8
+ 15: GETL R0, t10
+ 16: CMPUL t8, t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x25481004: 40810194 bc 4,1,0x25481198
+ 19: Jc01o $0x25481198
+
+
+
+. 1270 25480FF0 24
+. 3D 3A FE 00 3D 60 FC 00 38 69 00 03 61 60 00 02 7C 03 00 40 40 81 01 94
+==== BB 1271 (0x25481198) approx BBs exec'd 0 ====
+
+ 0x25481198: 81610008 lwz r11,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2548119C: 814B002C lwz r10,44(r11)
+ 5: GETL R11, t4
+ 6: ADDL $0x2C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x254811A0: 810A0004 lwz r8,4(r10)
+ 10: GETL R10, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R8
+ 14: INCEIPL $4
+
+ 0x254811A4: 7CE82850 subf r7,r8,r5
+ 15: GETL R8, t12
+ 16: GETL R5, t14
+ 17: SUBL t12, t14
+ 18: PUTL t14, R7
+ 19: INCEIPL $4
+
+ 0x254811A8: 7CEA1670 srawi r10,r7,2
+ 20: GETL R7, t16
+ 21: SARL $0x2, t16 (-wCa)
+ 22: PUTL t16, R10
+ 23: INCEIPL $4
+
+ 0x254811AC: 288A4011 cmpli cr1,r10,16401
+ 24: GETL R10, t18
+ 25: MOVL $0x4011, t22
+ 26: CMPUL t18, t22, t20 (-rSo)
+ 27: ICRFL t20, $0x1, CR
+ 28: INCEIPL $4
+
+ 0x254811B0: 418500A0 bc 12,5,0x25481250
+ 29: Js05o $0x25481250
+
+
+
+. 1271 25481198 28
+. 81 61 00 08 81 4B 00 2C 81 0A 00 04 7C E8 28 50 7C EA 16 70 28 8A 40 11 41 85 00 A0
+==== BB 1272 (0x254811B4) approx BBs exec'd 0 ====
+
+ 0x254811B4: 816B0028 lwz r11,40(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x28, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254811B8: 3C60AAAA lis r3,-21846
+ 5: MOVL $0xAAAA0000, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254811BC: 6060AAAB ori r0,r3,0xAAAB
+ 8: MOVL $0xAAAAAAAB, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x254811C0: 3BAAFFEE addi r29,r10,-18
+ 11: GETL R10, t8
+ 12: ADDL $0xFFFFFFEE, t8
+ 13: PUTL t8, R29
+ 14: INCEIPL $4
+
+ 0x254811C4: 83EB0004 lwz r31,4(r11)
+ 15: GETL R11, t10
+ 16: ADDL $0x4, t10
+ 17: LDL (t10), t12
+ 18: PUTL t12, R31
+ 19: INCEIPL $4
+
+ 0x254811C8: 57ABF87E rlwinm r11,r29,31,1,31
+ 20: GETL R29, t14
+ 21: SHRL $0x1, t14
+ 22: PUTL t14, R11
+ 23: INCEIPL $4
+
+ 0x254811CC: 7F7F0016 mulhwu r27,r31,r0
+ 24: GETL R31, t16
+ 25: GETL R0, t18
+ 26: UMULHL t16, t18
+ 27: PUTL t18, R27
+ 28: INCEIPL $4
+
+ 0x254811D0: 577CE8FE rlwinm r28,r27,29,3,31
+ 29: GETL R27, t20
+ 30: SHRL $0x3, t20
+ 31: PUTL t20, R28
+ 32: INCEIPL $4
+
+ 0x254811D4: 2B1C2000 cmpli cr6,r28,8192
+ 33: GETL R28, t22
+ 34: MOVL $0x2000, t26
+ 35: CMPUL t22, t26, t24 (-rSo)
+ 36: ICRFL t24, $0x6, CR
+ 37: INCEIPL $4
+
+ 0x254811D8: 5787083C rlwinm r7,r28,1,0,30
+ 38: GETL R28, t28
+ 39: SHLL $0x1, t28
+ 40: PUTL t28, R7
+ 41: INCEIPL $4
+
+ 0x254811DC: 39270012 addi r9,r7,18
+ 42: GETL R7, t30
+ 43: ADDL $0x12, t30
+ 44: PUTL t30, R9
+ 45: INCEIPL $4
+
+ 0x254811E0: 552C103A rlwinm r12,r9,2,0,29
+ 46: GETL R9, t32
+ 47: SHLL $0x2, t32
+ 48: PUTL t32, R12
+ 49: INCEIPL $4
+
+ 0x254811E4: 7CCC4214 add r6,r12,r8
+ 50: GETL R12, t34
+ 51: GETL R8, t36
+ 52: ADDL t34, t36
+ 53: PUTL t36, R6
+ 54: INCEIPL $4
+
+ 0x254811E8: 40990014 bc 4,25,0x254811FC
+ 55: Jc25o $0x254811FC
+
+
+
+. 1272 254811B4 56
+. 81 6B 00 28 3C 60 AA AA 60 60 AA AB 3B AA FF EE 83 EB 00 04 57 AB F8 7E 7F 7F 00 16 57 7C E8 FE 2B 1C 20 00 57 87 08 3C 39 27 00 12 55 2C 10 3A 7C CC 42 14 40 99 00 14
+==== BB 1273 (0x254811FC) approx BBs exec'd 0 ====
+
+ 0x254811FC: 1FEAFFFC mulli r31,r10,-4
+ 0: GETL R10, t0
+ 1: MULL $0xFFFFFFFC, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0x25481200: 556C103A rlwinm r12,r11,2,0,29
+ 4: GETL R11, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R12
+ 7: INCEIPL $4
+
+ 0x25481204: 559B043E rlwinm r27,r12,0,16,31
+ 8: GETL R12, t4
+ 9: ANDL $0xFFFF, t4
+ 10: PUTL t4, R27
+ 11: INCEIPL $4
+
+ 0x25481208: 7F4C312E stwx r26,r12,r6
+ 12: GETL R6, t6
+ 13: GETL R12, t8
+ 14: ADDL t8, t6
+ 15: GETL R26, t10
+ 16: STL t10, (t6)
+ 17: INCEIPL $4
+
+ 0x2548120C: 3BBFFFFC addi r29,r31,-4
+ 18: GETL R31, t12
+ 19: ADDL $0xFFFFFFFC, t12
+ 20: PUTL t12, R29
+ 21: INCEIPL $4
+
+ 0x25481210: 676A3960 oris r10,r27,0x3960
+ 22: GETL R27, t14
+ 23: ORL $0x39600000, t14
+ 24: PUTL t14, R10
+ 25: INCEIPL $4
+
+ 0x25481214: 57BC01BA rlwinm r28,r29,0,6,29
+ 26: GETL R29, t16
+ 27: ANDL $0x3FFFFFC, t16
+ 28: PUTL t16, R28
+ 29: INCEIPL $4
+
+ 0x25481218: 91450000 stw r10,0(r5)
+ 30: GETL R10, t18
+ 31: GETL R5, t20
+ 32: STL t18, (t20)
+ 33: INCEIPL $4
+
+ 0x2548121C: 67874800 oris r7,r28,0x4800
+ 34: GETL R28, t22
+ 35: ORL $0x48000000, t22
+ 36: PUTL t22, R7
+ 37: INCEIPL $4
+
+ 0x25481220: 94E50004 stwu r7,4(r5)
+ 38: GETL R7, t24
+ 39: GETL R5, t26
+ 40: ADDL $0x4, t26
+ 41: PUTL t26, R5
+ 42: STL t24, (t26)
+ 43: INCEIPL $4
+
+ 0x25481224: 7C00286C dcbst r0,r5
+ 44: INCEIPL $4
+
+ 0x25481228: 7C0004AC sync
+ 45: INCEIPL $4
+
+ 0x2548122C: 80A1000C lwz r5,12(r1)
+ 46: GETL R1, t28
+ 47: ADDL $0xC, t28
+ 48: LDL (t28), t30
+ 49: PUTL t30, R5
+ 50: INCEIPL $4
+
+ 0x25481230: 39050004 addi r8,r5,4
+ 51: GETL R5, t32
+ 52: ADDL $0x4, t32
+ 53: PUTL t32, R8
+ 54: INCEIPL $4
+
+ 0x25481234: 7C0047AC icbi r0,r8
+ 55: GETL R8, t34
+ 56: CALLM_So
+ 57: PUSHL t34
+ 58: CALLMo $0x68
+ 59: CALLM_Eo
+ 60: INCEIPL $4
+
+ 0x25481238: 80A1000C lwz r5,12(r1)
+ 61: GETL R1, t36
+ 62: ADDL $0xC, t36
+ 63: LDL (t36), t38
+ 64: PUTL t38, R5
+ 65: INCEIPL $4
+
+ 0x2548123C: 4BFFFBC4 b 0x25480E00
+ 66: JMPo $0x25480E00 ($4)
+
+
+
+. 1273 254811FC 68
+. 1F EA FF FC 55 6C 10 3A 55 9B 04 3E 7F 4C 31 2E 3B BF FF FC 67 6A 39 60 57 BC 01 BA 91 45 00 00 67 87 48 00 94 E5 00 04 7C 00 28 6C 7C 00 04 AC 80 A1 00 0C 39 05 00 04 7C 00 47 AC 80 A1 00 0C 4B FF FB C4
+==== BB 1274 (0x254797E0) approx BBs exec'd 0 ====
+
+ 0x254797E0: 3C00AAAA lis r0,-21846
+ 0: MOVL $0xAAAA0000, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254797E4: 600CAAAB ori r12,r0,0xAAAB
+ 3: MOVL $0xAAAAAAAB, t2
+ 4: PUTL t2, R12
+ 5: INCEIPL $4
+
+ 0x254797E8: 7EE86016 mulhwu r23,r8,r12
+ 6: GETL R8, t4
+ 7: GETL R12, t6
+ 8: UMULHL t4, t6
+ 9: PUTL t6, R23
+ 10: INCEIPL $4
+
+ 0x254797EC: 56E9E8FE rlwinm r9,r23,29,3,31
+ 11: GETL R23, t8
+ 12: SHRL $0x3, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x254797F0: 7C893840 cmpl cr1,r9,r7
+ 15: GETL R9, t10
+ 16: GETL R7, t12
+ 17: CMPUL t10, t12, t14 (-rSo)
+ 18: ICRFL t14, $0x1, CR
+ 19: INCEIPL $4
+
+ 0x254797F4: 40850008 bc 4,5,0x254797FC
+ 20: Jc05o $0x254797FC
+
+
+
+. 1274 254797E0 24
+. 3C 00 AA AA 60 0C AA AB 7E E8 60 16 56 E9 E8 FE 7C 89 38 40 40 85 00 08
+==== BB 1275 (0x254733C0) approx BBs exec'd 0 ====
+
+ 0x254733C0: 4800C225 bl 0x2547F5E4
+ 0: MOVL $0x254733C4, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547F5E4 ($4)
+
+
+
+. 1275 254733C0 4
+. 48 00 C2 25
+==== BB 1276 _dl_sysdep_start_cleanup(0x2547F5E4) approx BBs exec'd 0 ====
+
+ 0x2547F5E4: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547F5E8: 38210010 addi r1,r1,16
+ 6: GETL R1, t4
+ 7: ADDL $0x10, t4
+ 8: PUTL t4, R1
+ 9: INCEIPL $4
+
+ 0x2547F5EC: 4E800020 blr
+ 10: GETL LR, t6
+ 11: JMPo-r t6 ($4)
+
+
+
+. 1276 2547F5E4 12
+. 94 21 FF F0 38 21 00 10 4E 80 00 20
+==== BB 1277 (0x254733C4) approx BBs exec'd 0 ====
+
+ 0x254733C4: 80CE01A4 lwz r6,420(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1A4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254733C8: 2C060000 cmpi cr0,r6,0
+ 5: GETL R6, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x254733CC: 4082094C bc 4,2,0x25473D18
+ 9: Jc02o $0x25473D18
+
+
+
+. 1277 254733C4 12
+. 80 CE 01 A4 2C 06 00 00 40 82 09 4C
+==== BB 1278 (0x254733D0) approx BBs exec'd 0 ====
+
+ 0x254733D0: 816E0330 lwz r11,816(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x330, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254733D4: 2B0B0001 cmpli cr6,r11,1
+ 5: GETL R11, t4
+ 6: MOVL $0x1, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x254733D8: 4099F784 bc 4,25,0x25472B5C
+ 10: Jc25o $0x25472B5C
+
+
+
+. 1278 254733D0 12
+. 81 6E 03 30 2B 0B 00 01 40 99 F7 84
+==== BB 1279 (0x254733DC) approx BBs exec'd 0 ====
+
+ 0x254733DC: 809401C0 lwz r4,448(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x1C0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254733E0: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254733E4: 38A00000 li r5,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x254733E8: 38C00000 li r6,0
+ 11: MOVL $0x0, t8
+ 12: PUTL t8, R6
+ 13: INCEIPL $4
+
+ 0x254733EC: 480061D5 bl 0x254795C0
+ 14: MOVL $0x254733F0, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x254795C0 ($4)
+
+
+
+. 1279 254733DC 20
+. 80 94 01 C0 7F 83 E3 78 38 A0 00 00 38 C0 00 00 48 00 61 D5
+==== BB 1280 (0x254733F0) approx BBs exec'd 0 ====
+
+ 0x254733F0: 4BFFF76C b 0x25472B5C
+ 0: JMPo $0x25472B5C ($4)
+
+
+
+. 1280 254733F0 4
+. 4B FF F7 6C
+==== BB 1281 (0x25472B5C) approx BBs exec'd 0 ====
+
+ 0x25472B5C: 7E238B78 or r3,r17,r17
+ 0: GETL R17, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25472B60: 4800B479 bl 0x2547DFD8
+ 3: MOVL $0x25472B64, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x2547DFD8 ($4)
+
+
+
+. 1281 25472B5C 8
+. 7E 23 8B 78 48 00 B4 79
+==== BB 1282 __GI__dl_allocate_tls_init(0x2547DFD8) approx BBs exec'd 0 ====
+
+ 0x2547DFD8: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547DFDC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547DFE0: 93210014 stw r25,20(r1)
+ 9: GETL R25, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547DFE4: 7C791B79 or. r25,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R25
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x2547DFE8: 48019019 bl 0x25497000
+ 19: MOVL $0x2547DFEC, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x25497000 ($4)
+
+
+
+. 1282 2547DFD8 20
+. 94 21 FF D0 7C 08 02 A6 93 21 00 14 7C 79 1B 79 48 01 90 19
+==== BB 1283 (0x2547DFEC) approx BBs exec'd 0 ====
+
+ 0x2547DFEC: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547DFF0: 92E1000C stw r23,12(r1)
+ 5: GETL R23, t4
+ 6: GETL R1, t6
+ 7: ADDL $0xC, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547DFF4: 7FC802A6 mflr r30
+ 10: GETL LR, t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0x2547DFF8: 93010010 stw r24,16(r1)
+ 13: GETL R24, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x10, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547DFFC: 38600000 li r3,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R3
+ 20: INCEIPL $4
+
+ 0x2547E000: 93410018 stw r26,24(r1)
+ 21: GETL R26, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x18, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547E004: 9361001C stw r27,28(r1)
+ 26: GETL R27, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x1C, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0x2547E008: 93810020 stw r28,32(r1)
+ 31: GETL R28, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x20, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547E00C: 93A10024 stw r29,36(r1)
+ 36: GETL R29, t28
+ 37: GETL R1, t30
+ 38: ADDL $0x24, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0x2547E010: 93E1002C stw r31,44(r1)
+ 41: GETL R31, t32
+ 42: GETL R1, t34
+ 43: ADDL $0x2C, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0x2547E014: 90010034 stw r0,52(r1)
+ 46: GETL R0, t36
+ 47: GETL R1, t38
+ 48: ADDL $0x34, t38
+ 49: STL t36, (t38)
+ 50: INCEIPL $4
+
+ 0x2547E018: 418200D8 bc 12,2,0x2547E0F0
+ 51: Js02o $0x2547E0F0
+
+
+
+. 1283 2547DFEC 48
+. 93 C1 00 28 92 E1 00 0C 7F C8 02 A6 93 01 00 10 38 60 00 00 93 41 00 18 93 61 00 1C 93 81 00 20 93 A1 00 24 93 E1 00 2C 90 01 00 34 41 82 00 D8
+==== BB 1284 (0x2547E01C) approx BBs exec'd 0 ====
+
+ 0x2547E01C: 831E04C8 lwz r24,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0x2547E020: 3B400000 li r26,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x2547E024: 82F9FFFC lwz r23,-4(r25)
+ 8: GETL R25, t6
+ 9: ADDL $0xFFFFFFFC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0x2547E028: 83780410 lwz r27,1040(r24)
+ 13: GETL R24, t10
+ 14: ADDL $0x410, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R27
+ 17: INCEIPL $4
+
+ 0x2547E02C: 817B0000 lwz r11,0(r27)
+ 18: GETL R27, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R11
+ 21: INCEIPL $4
+
+ 0x2547E030: 201A0000 subfic r0,r26,0
+ 22: GETL R26, t18
+ 23: MOVL $0x0, t20
+ 24: SBBL t18, t20 (-wCa)
+ 25: PUTL t20, R0
+ 26: INCEIPL $4
+
+ 0x2547E034: 7FE0D114 adde r31,r0,r26
+ 27: GETL R0, t22
+ 28: GETL R26, t24
+ 29: ADCL t22, t24 (-rCa-wCa)
+ 30: PUTL t24, R31
+ 31: INCEIPL $4
+
+ 0x2547E038: 7D3AFA14 add r9,r26,r31
+ 32: GETL R26, t26
+ 33: GETL R31, t28
+ 34: ADDL t26, t28
+ 35: PUTL t28, R9
+ 36: INCEIPL $4
+
+ 0x2547E03C: 7F8BF840 cmpl cr7,r11,r31
+ 37: GETL R11, t30
+ 38: GETL R31, t32
+ 39: CMPUL t30, t32, t34 (-rSo)
+ 40: ICRFL t34, $0x7, CR
+ 41: INCEIPL $4
+
+ 0x2547E040: 409D0064 bc 4,29,0x2547E0A4
+ 42: Jc29o $0x2547E0A4
+
+
+
+. 1284 2547E01C 40
+. 83 1E 04 C8 3B 40 00 00 82 F9 FF FC 83 78 04 10 81 7B 00 00 20 1A 00 00 7F E0 D1 14 7D 3A FA 14 7F 8B F8 40 40 9D 00 64
+==== BB 1285 (0x2547E044) approx BBs exec'd 0 ====
+
+ 0x2547E044: 57E31838 rlwinm r3,r31,3,0,28
+ 0: GETL R31, t0
+ 1: SHLL $0x3, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x2547E048: 7D23DA14 add r9,r3,r27
+ 4: GETL R3, t2
+ 5: GETL R27, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x2547E04C: 3B89000C addi r28,r9,12
+ 9: GETL R9, t6
+ 10: ADDL $0xC, t6
+ 11: PUTL t6, R28
+ 12: INCEIPL $4
+
+ 0x2547E050: 80980408 lwz r4,1032(r24)
+ 13: GETL R24, t8
+ 14: ADDL $0x408, t8
+ 15: LDL (t8), t10
+ 16: PUTL t10, R4
+ 17: INCEIPL $4
+
+ 0x2547E054: 7D3AFA14 add r9,r26,r31
+ 18: GETL R26, t12
+ 19: GETL R31, t14
+ 20: ADDL t12, t14
+ 21: PUTL t14, R9
+ 22: INCEIPL $4
+
+ 0x2547E058: 7C892040 cmpl cr1,r9,r4
+ 23: GETL R9, t16
+ 24: GETL R4, t18
+ 25: CMPUL t16, t18, t20 (-rSo)
+ 26: ICRFL t20, $0x1, CR
+ 27: INCEIPL $4
+
+ 0x2547E05C: 41850048 bc 12,5,0x2547E0A4
+ 28: Js05o $0x2547E0A4
+
+
+
+. 1285 2547E044 28
+. 57 E3 18 38 7D 23 DA 14 3B 89 00 0C 80 98 04 08 7D 3A FA 14 7C 89 20 40 41 85 00 48
+==== BB 1286 (0x2547E060) approx BBs exec'd 0 ====
+
+ 0x2547E060: 813C0000 lwz r9,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547E064: 2F090000 cmpi cr6,r9,0
+ 4: GETL R9, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x2547E068: 419A0028 bc 12,26,0x2547E090
+ 8: Js26o $0x2547E090
+
+
+
+. 1286 2547E060 12
+. 81 3C 00 00 2F 09 00 00 41 9A 00 28
+==== BB 1287 (0x2547E06C) approx BBs exec'd 0 ====
+
+ 0x2547E06C: 8169022C lwz r11,556(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x22C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547E070: 2C0BFFFF cmpi cr0,r11,-1
+ 5: GETL R11, t4
+ 6: MOVL $0xFFFFFFFF, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547E074: 7D4BCA14 add r10,r11,r25
+ 10: GETL R11, t10
+ 11: GETL R25, t12
+ 12: ADDL t10, t12
+ 13: PUTL t12, R10
+ 14: INCEIPL $4
+
+ 0x2547E078: 7D435378 or r3,r10,r10
+ 15: GETL R10, t14
+ 16: PUTL t14, R3
+ 17: INCEIPL $4
+
+ 0x2547E07C: 40820040 bc 4,2,0x2547E0BC
+ 18: Jc02o $0x2547E0BC
+
+
+
+. 1287 2547E06C 20
+. 81 69 02 2C 2C 0B FF FF 7D 4B CA 14 7D 43 53 78 40 82 00 40
+==== BB 1288 (0x2547E0BC) approx BBs exec'd 0 ====
+
+ 0x2547E0BC: 81690230 lwz r11,560(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x230, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547E0C0: 5568103A rlwinm r8,r11,2,0,29
+ 5: GETL R11, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x2547E0C4: 7D48B92E stwx r10,r8,r23
+ 9: GETL R23, t6
+ 10: GETL R8, t8
+ 11: ADDL t8, t6
+ 12: GETL R10, t10
+ 13: STL t10, (t6)
+ 14: INCEIPL $4
+
+ 0x2547E0C8: 80A9021C lwz r5,540(r9)
+ 15: GETL R9, t12
+ 16: ADDL $0x21C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R5
+ 19: INCEIPL $4
+
+ 0x2547E0CC: 80E90220 lwz r7,544(r9)
+ 20: GETL R9, t16
+ 21: ADDL $0x220, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R7
+ 24: INCEIPL $4
+
+ 0x2547E0D0: 80890218 lwz r4,536(r9)
+ 25: GETL R9, t20
+ 26: ADDL $0x218, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R4
+ 29: INCEIPL $4
+
+ 0x2547E0D4: 7FA53850 subf r29,r5,r7
+ 30: GETL R5, t24
+ 31: GETL R7, t26
+ 32: SUBL t24, t26
+ 33: PUTL t26, R29
+ 34: INCEIPL $4
+
+ 0x2547E0D8: 48005949 bl 0x25483A20
+ 35: MOVL $0x2547E0DC, t28
+ 36: PUTL t28, LR
+ 37: JMPo-c $0x25483A20 ($4)
+
+
+
+. 1288 2547E0BC 32
+. 81 69 02 30 55 68 10 3A 7D 48 B9 2E 80 A9 02 1C 80 E9 02 20 80 89 02 18 7F A5 38 50 48 00 59 49
+==== BB 1289 (0x2547E0DC) approx BBs exec'd 0 ====
+
+ 0x2547E0DC: 7FA5EB78 or r5,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547E0E0: 38800000 li r4,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x2547E0E4: 48005661 bl 0x25483744
+ 6: MOVL $0x2547E0E8, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25483744 ($4)
+
+
+
+. 1289 2547E0DC 12
+. 7F A5 EB 78 38 80 00 00 48 00 56 61
+==== BB 1290 (0x2547E0E8) approx BBs exec'd 0 ====
+
+ 0x2547E0E8: 4BFFFFA4 b 0x2547E08C
+ 0: JMPo $0x2547E08C ($4)
+
+
+
+. 1290 2547E0E8 4
+. 4B FF FF A4
+==== BB 1291 (0x2547E08C) approx BBs exec'd 0 ====
+
+ 0x2547E08C: 817B0000 lwz r11,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x2547E090: 3BFF0001 addi r31,r31,1
+ 4: GETL R31, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0x2547E094: 3B9C0008 addi r28,r28,8
+ 8: GETL R28, t6
+ 9: ADDL $0x8, t6
+ 10: PUTL t6, R28
+ 11: INCEIPL $4
+
+ 0x2547E098: 7F8BF840 cmpl cr7,r11,r31
+ 12: GETL R11, t8
+ 13: GETL R31, t10
+ 14: CMPUL t8, t10, t12 (-rSo)
+ 15: ICRFL t12, $0x7, CR
+ 16: INCEIPL $4
+
+ 0x2547E09C: 419DFFB4 bc 12,29,0x2547E050
+ 17: Js29o $0x2547E050
+
+
+
+. 1291 2547E08C 20
+. 81 7B 00 00 3B FF 00 01 3B 9C 00 08 7F 8B F8 40 41 9D FF B4
+==== BB 1292 (0x2547E050) approx BBs exec'd 0 ====
+
+ 0x2547E050: 80980408 lwz r4,1032(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0x408, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547E054: 7D3AFA14 add r9,r26,r31
+ 5: GETL R26, t4
+ 6: GETL R31, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x2547E058: 7C892040 cmpl cr1,r9,r4
+ 10: GETL R9, t8
+ 11: GETL R4, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x2547E05C: 41850048 bc 12,5,0x2547E0A4
+ 15: Js05o $0x2547E0A4
+
+
+
+. 1292 2547E050 16
+. 80 98 04 08 7D 3A FA 14 7C 89 20 40 41 85 00 48
+==== BB 1293 (0x2547E0A4) approx BBs exec'd 0 ====
+
+ 0x2547E0A4: 81580408 lwz r10,1032(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0x408, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547E0A8: 7D3A4B78 or r26,r9,r9
+ 5: GETL R9, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x2547E0AC: 7C8A4840 cmpl cr1,r10,r9
+ 8: GETL R10, t6
+ 9: GETL R9, t8
+ 10: CMPUL t6, t8, t10 (-rSo)
+ 11: ICRFL t10, $0x1, CR
+ 12: INCEIPL $4
+
+ 0x2547E0B0: 4085003C bc 4,5,0x2547E0EC
+ 13: Jc05o $0x2547E0EC
+
+
+
+. 1293 2547E0A4 16
+. 81 58 04 08 7D 3A 4B 78 7C 8A 48 40 40 85 00 3C
+==== BB 1294 (0x2547E0EC) approx BBs exec'd 0 ====
+
+ 0x2547E0EC: 7F23CB78 or r3,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547E0F0: 81810034 lwz r12,52(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x34, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0x2547E0F4: 82E1000C lwz r23,12(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0x2547E0F8: 83010010 lwz r24,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R24
+ 17: INCEIPL $4
+
+ 0x2547E0FC: 7D8803A6 mtlr r12
+ 18: GETL R12, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547E100: 83210014 lwz r25,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R25
+ 25: INCEIPL $4
+
+ 0x2547E104: 83410018 lwz r26,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R26
+ 30: INCEIPL $4
+
+ 0x2547E108: 8361001C lwz r27,28(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x1C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R27
+ 35: INCEIPL $4
+
+ 0x2547E10C: 83810020 lwz r28,32(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x20, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R28
+ 40: INCEIPL $4
+
+ 0x2547E110: 83A10024 lwz r29,36(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x24, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R29
+ 45: INCEIPL $4
+
+ 0x2547E114: 83C10028 lwz r30,40(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x28, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R30
+ 50: INCEIPL $4
+
+ 0x2547E118: 83E1002C lwz r31,44(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x2C, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R31
+ 55: INCEIPL $4
+
+ 0x2547E11C: 38210030 addi r1,r1,48
+ 56: GETL R1, t44
+ 57: ADDL $0x30, t44
+ 58: PUTL t44, R1
+ 59: INCEIPL $4
+
+ 0x2547E120: 4E800020 blr
+ 60: GETL LR, t46
+ 61: JMPo-r t46 ($4)
+
+
+
+. 1294 2547E0EC 56
+. 7F 23 CB 78 81 81 00 34 82 E1 00 0C 83 01 00 10 7D 88 03 A6 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 1295 (0x25472B64) approx BBs exec'd 0 ====
+
+ 0x25472B64: 38517000 addi r2,r17,28672
+ 0: GETL R17, t0
+ 1: ADDL $0x7000, t0
+ 2: PUTL t0, R2
+ 3: INCEIPL $4
+
+ 0x25472B68: 3B000001 li r24,1
+ 4: MOVL $0x1, t2
+ 5: PUTL t2, R24
+ 6: INCEIPL $4
+
+ 0x25472B6C: 931A000C stw r24,12(r26)
+ 7: GETL R24, t4
+ 8: GETL R26, t6
+ 9: ADDL $0xC, t6
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x25472B70: 48009431 bl 0x2547BFA0
+ 12: MOVL $0x25472B74, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x2547BFA0 ($4)
+
+
+
+. 1295 25472B64 16
+. 38 51 70 00 3B 00 00 01 93 1A 00 0C 48 00 94 31
+==== BB 1296 __GI__dl_debug_state(0x2547BFA0) approx BBs exec'd 0 ====
+
+ 0x2547BFA0: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547BFA4: 38210010 addi r1,r1,16
+ 6: GETL R1, t4
+ 7: ADDL $0x10, t4
+ 8: PUTL t4, R1
+ 9: INCEIPL $4
+
+ 0x2547BFA8: 4E800020 blr
+ 10: GETL LR, t6
+ 11: JMPo-r t6 ($4)
+
+
+
+. 1296 2547BFA0 12
+. 94 21 FF F0 38 21 00 10 4E 80 00 20
+==== BB 1297 (0x25472B74) approx BBs exec'd 0 ====
+
+ 0x25472B74: 480055BD bl 0x25478130
+ 0: MOVL $0x25472B78, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25478130 ($4)
+
+
+
+. 1297 25472B74 4
+. 48 00 55 BD
+==== BB 1298 _dl_unload_cache(0x25478130) approx BBs exec'd 0 ====
+
+ 0x25478130: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25478134: 7C6802A6 mflr r3
+ 6: GETL LR, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x25478138: 4801EEC9 bl 0x25497000
+ 9: MOVL $0x2547813C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 1298 25478130 12
+. 94 21 FF F0 7C 68 02 A6 48 01 EE C9
+==== BB 1299 (0x2547813C) approx BBs exec'd 0 ====
+
+ 0x2547813C: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25478140: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25478144: 93E1000C stw r31,12(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25478148: 90610014 stw r3,20(r1)
+ 13: GETL R3, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547814C: 3800FFFD li r0,-3
+ 18: MOVL $0xFFFFFFFD, t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0x25478150: 83FE0254 lwz r31,596(r30)
+ 21: GETL R30, t16
+ 22: ADDL $0x254, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0x25478154: 807F0000 lwz r3,0(r31)
+ 26: GETL R31, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R3
+ 29: INCEIPL $4
+
+ 0x25478158: 3923FFFF addi r9,r3,-1
+ 30: GETL R3, t24
+ 31: ADDL $0xFFFFFFFF, t24
+ 32: PUTL t24, R9
+ 33: INCEIPL $4
+
+ 0x2547815C: 7F890040 cmpl cr7,r9,r0
+ 34: GETL R9, t26
+ 35: GETL R0, t28
+ 36: CMPUL t26, t28, t30 (-rSo)
+ 37: ICRFL t30, $0x7, CR
+ 38: INCEIPL $4
+
+ 0x25478160: 409D001C bc 4,29,0x2547817C
+ 39: Jc29o $0x2547817C
+
+
+
+. 1299 2547813C 40
+. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 61 00 14 38 00 FF FD 83 FE 02 54 80 7F 00 00 39 23 FF FF 7F 89 00 40 40 9D 00 1C
+==== BB 1300 (0x2547817C) approx BBs exec'd 0 ====
+
+ 0x2547817C: 80BE025C lwz r5,604(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x25C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25478180: 80850000 lwz r4,0(r5)
+ 5: GETL R5, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x25478184: 4800A625 bl 0x254827A8
+ 9: MOVL $0x25478188, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0x254827A8 ($4)
+
+
+
+. 1300 2547817C 12
+. 80 BE 02 5C 80 85 00 00 48 00 A6 25
+==== BB 1301 munmap(0x254827A8) approx BBs exec'd 0 ====
+
+ 0x254827A8: 3800005B li r0,91
+ 0: MOVL $0x5B, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254827AC: 44000002 sc
+ 3: JMPo-sys $0x254827B0 ($4)
+
+
+
+. 1301 254827A8 8
+. 38 00 00 5B 44 00 00 02
+==== BB 1302 (0x254827B0) approx BBs exec'd 0 ====
+
+ 0x254827B0: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 1302 254827B0 4
+. 4C A3 00 20
+==== BB 1303 (0x25478188) approx BBs exec'd 0 ====
+
+ 0x25478188: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547818C: 80C10014 lwz r6,20(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x14, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0x25478190: 909F0000 stw r4,0(r31)
+ 8: GETL R4, t6
+ 9: GETL R31, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25478194: 83C10008 lwz r30,8(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x8, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R30
+ 16: INCEIPL $4
+
+ 0x25478198: 7CC803A6 mtlr r6
+ 17: GETL R6, t14
+ 18: PUTL t14, LR
+ 19: INCEIPL $4
+
+ 0x2547819C: 83E1000C lwz r31,12(r1)
+ 20: GETL R1, t16
+ 21: ADDL $0xC, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R31
+ 24: INCEIPL $4
+
+ 0x254781A0: 38210010 addi r1,r1,16
+ 25: GETL R1, t20
+ 26: ADDL $0x10, t20
+ 27: PUTL t20, R1
+ 28: INCEIPL $4
+
+ 0x254781A4: 4E800020 blr
+ 29: GETL LR, t22
+ 30: JMPo-r t22 ($4)
+
+
+
+. 1303 25478188 32
+. 38 80 00 00 80 C1 00 14 90 9F 00 00 83 C1 00 08 7C C8 03 A6 83 E1 00 0C 38 21 00 10 4E 80 00 20
+==== BB 1304 (0x25472B78) approx BBs exec'd 0 ====
+
+ 0x25472B78: 81010000 lwz r8,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0x25472B7C: 82280004 lwz r17,4(r8)
+ 4: GETL R8, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R17
+ 8: INCEIPL $4
+
+ 0x25472B80: 8188FFB4 lwz r12,-76(r8)
+ 9: GETL R8, t8
+ 10: ADDL $0xFFFFFFB4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0x25472B84: 7E2803A6 mtlr r17
+ 14: GETL R17, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x25472B88: 81C8FFB8 lwz r14,-72(r8)
+ 17: GETL R8, t14
+ 18: ADDL $0xFFFFFFB8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R14
+ 21: INCEIPL $4
+
+ 0x25472B8C: 81E8FFBC lwz r15,-68(r8)
+ 22: GETL R8, t18
+ 23: ADDL $0xFFFFFFBC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R15
+ 26: INCEIPL $4
+
+ 0x25472B90: 7D818120 mtcrf 0x18,r12
+ 27: GETL R12, t22
+ 28: ICRFL t22, $0x3, CR
+ 29: ICRFL t22, $0x4, CR
+ 30: INCEIPL $4
+
+ 0x25472B94: 8208FFC0 lwz r16,-64(r8)
+ 31: GETL R8, t24
+ 32: ADDL $0xFFFFFFC0, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R16
+ 35: INCEIPL $4
+
+ 0x25472B98: 8228FFC4 lwz r17,-60(r8)
+ 36: GETL R8, t28
+ 37: ADDL $0xFFFFFFC4, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R17
+ 40: INCEIPL $4
+
+ 0x25472B9C: 8248FFC8 lwz r18,-56(r8)
+ 41: GETL R8, t32
+ 42: ADDL $0xFFFFFFC8, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R18
+ 45: INCEIPL $4
+
+ 0x25472BA0: 8268FFCC lwz r19,-52(r8)
+ 46: GETL R8, t36
+ 47: ADDL $0xFFFFFFCC, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R19
+ 50: INCEIPL $4
+
+ 0x25472BA4: 8288FFD0 lwz r20,-48(r8)
+ 51: GETL R8, t40
+ 52: ADDL $0xFFFFFFD0, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R20
+ 55: INCEIPL $4
+
+ 0x25472BA8: 82A8FFD4 lwz r21,-44(r8)
+ 56: GETL R8, t44
+ 57: ADDL $0xFFFFFFD4, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R21
+ 60: INCEIPL $4
+
+ 0x25472BAC: 82C8FFD8 lwz r22,-40(r8)
+ 61: GETL R8, t48
+ 62: ADDL $0xFFFFFFD8, t48
+ 63: LDL (t48), t50
+ 64: PUTL t50, R22
+ 65: INCEIPL $4
+
+ 0x25472BB0: 82E8FFDC lwz r23,-36(r8)
+ 66: GETL R8, t52
+ 67: ADDL $0xFFFFFFDC, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R23
+ 70: INCEIPL $4
+
+ 0x25472BB4: 8308FFE0 lwz r24,-32(r8)
+ 71: GETL R8, t56
+ 72: ADDL $0xFFFFFFE0, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R24
+ 75: INCEIPL $4
+
+ 0x25472BB8: 8328FFE4 lwz r25,-28(r8)
+ 76: GETL R8, t60
+ 77: ADDL $0xFFFFFFE4, t60
+ 78: LDL (t60), t62
+ 79: PUTL t62, R25
+ 80: INCEIPL $4
+
+ 0x25472BBC: 8348FFE8 lwz r26,-24(r8)
+ 81: GETL R8, t64
+ 82: ADDL $0xFFFFFFE8, t64
+ 83: LDL (t64), t66
+ 84: PUTL t66, R26
+ 85: INCEIPL $4
+
+ 0x25472BC0: 8368FFEC lwz r27,-20(r8)
+ 86: GETL R8, t68
+ 87: ADDL $0xFFFFFFEC, t68
+ 88: LDL (t68), t70
+ 89: PUTL t70, R27
+ 90: INCEIPL $4
+
+ 0x25472BC4: 8388FFF0 lwz r28,-16(r8)
+ 91: GETL R8, t72
+ 92: ADDL $0xFFFFFFF0, t72
+ 93: LDL (t72), t74
+ 94: PUTL t74, R28
+ 95: INCEIPL $4
+
+ 0x25472BC8: 83A8FFF4 lwz r29,-12(r8)
+ 96: GETL R8, t76
+ 97: ADDL $0xFFFFFFF4, t76
+ 98: LDL (t76), t78
+ 99: PUTL t78, R29
+ 100: INCEIPL $4
+
+ 0x25472BCC: 83C8FFF8 lwz r30,-8(r8)
+ 101: GETL R8, t80
+ 102: ADDL $0xFFFFFFF8, t80
+ 103: LDL (t80), t82
+ 104: PUTL t82, R30
+ 105: INCEIPL $4
+
+ 0x25472BD0: 83E8FFFC lwz r31,-4(r8)
+ 106: GETL R8, t84
+ 107: ADDL $0xFFFFFFFC, t84
+ 108: LDL (t84), t86
+ 109: PUTL t86, R31
+ 110: INCEIPL $4
+
+ 0x25472BD4: 7D014378 or r1,r8,r8
+ 111: GETL R8, t88
+ 112: PUTL t88, R1
+ 113: INCEIPL $4
+
+ 0x25472BD8: 4E800020 blr
+ 114: GETL LR, t90
+ 115: JMPo-r t90 ($4)
+
+
+
+. 1304 25472B78 100
+. 81 01 00 00 82 28 00 04 81 88 FF B4 7E 28 03 A6 81 C8 FF B8 81 E8 FF BC 7D 81 81 20 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
+==== BB 1305 (0x2547F324) approx BBs exec'd 0 ====
+
+ 0x2547F324: 82A10224 lwz r21,548(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x224, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x2547F328: 806101E0 lwz r3,480(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x1E0, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547F32C: 7EA803A6 mtlr r21
+ 10: GETL R21, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0x2547F330: 82C101F8 lwz r22,504(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x1F8, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R22
+ 17: INCEIPL $4
+
+ 0x2547F334: 82A101F4 lwz r21,500(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x1F4, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R21
+ 22: INCEIPL $4
+
+ 0x2547F338: 82E101FC lwz r23,508(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1FC, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R23
+ 27: INCEIPL $4
+
+ 0x2547F33C: 83010200 lwz r24,512(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x200, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R24
+ 32: INCEIPL $4
+
+ 0x2547F340: 83210204 lwz r25,516(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x204, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R25
+ 37: INCEIPL $4
+
+ 0x2547F344: 83410208 lwz r26,520(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x208, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R26
+ 42: INCEIPL $4
+
+ 0x2547F348: 8361020C lwz r27,524(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x20C, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R27
+ 47: INCEIPL $4
+
+ 0x2547F34C: 83810210 lwz r28,528(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x210, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R28
+ 52: INCEIPL $4
+
+ 0x2547F350: 83A10214 lwz r29,532(r1)
+ 53: GETL R1, t42
+ 54: ADDL $0x214, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R29
+ 57: INCEIPL $4
+
+ 0x2547F354: 83C10218 lwz r30,536(r1)
+ 58: GETL R1, t46
+ 59: ADDL $0x218, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R30
+ 62: INCEIPL $4
+
+ 0x2547F358: 83E1021C lwz r31,540(r1)
+ 63: GETL R1, t50
+ 64: ADDL $0x21C, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R31
+ 67: INCEIPL $4
+
+ 0x2547F35C: 38210220 addi r1,r1,544
+ 68: GETL R1, t54
+ 69: ADDL $0x220, t54
+ 70: PUTL t54, R1
+ 71: INCEIPL $4
+
+ 0x2547F360: 4E800020 blr
+ 72: GETL LR, t56
+ 73: JMPo-r t56 ($4)
+
+
+
+. 1305 2547F324 64
+. 82 A1 02 24 80 61 01 E0 7E A8 03 A6 82 C1 01 F8 82 A1 01 F4 82 E1 01 FC 83 01 02 00 83 21 02 04 83 41 02 08 83 61 02 0C 83 81 02 10 83 A1 02 14 83 C1 02 18 83 E1 02 1C 38 21 02 20 4E 80 00 20
+==== BB 1306 (0x25471A20) approx BBs exec'd 0 ====
+
+ 0x25471A20: 813E04F4 lwz r9,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25471A24: 7C7D1B78 or r29,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25471A28: 38600000 li r3,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x25471A2C: 80090000 lwz r0,0(r9)
+ 11: GETL R9, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0x25471A30: 70090080 andi. r9,r0,0x80
+ 15: GETL R0, t12
+ 16: ANDL $0x80, t12
+ 17: PUTL t12, R9
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x0, CR
+ 20: INCEIPL $4
+
+ 0x25471A34: 40820028 bc 4,2,0x25471A5C
+ 21: Jc02o $0x25471A5C
+
+
+
+. 1306 25471A20 24
+. 81 3E 04 F4 7C 7D 1B 78 38 60 00 00 80 09 00 00 70 09 00 80 40 82 00 28
+==== BB 1307 (0x25471A38) approx BBs exec'd 0 ====
+
+ 0x25471A38: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25471A3C: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25471A40: 8361000C lwz r27,12(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R27
+ 12: INCEIPL $4
+
+ 0x25471A44: 83810010 lwz r28,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0x25471A48: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x25471A4C: 83A10014 lwz r29,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x25471A50: 83C10018 lwz r30,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0x25471A54: 38210020 addi r1,r1,32
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0x25471A58: 4E800020 blr
+ 35: GETL LR, t26
+ 36: JMPo-r t26 ($4)
+
+
+
+. 1307 25471A38 36
+. 80 81 00 24 7F A3 EB 78 83 61 00 0C 83 81 00 10 7C 88 03 A6 83 A1 00 14 83 C1 00 18 38 21 00 20 4E 80 00 20
+==== BB 1308 (0x25471DD0) approx BBs exec'd 0 ====
+
+ 0x25471DD0: 82E102B4 lwz r23,692(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x2B4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x25471DD4: 83010290 lwz r24,656(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x290, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R24
+ 9: INCEIPL $4
+
+ 0x25471DD8: 7EE803A6 mtlr r23
+ 10: GETL R23, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0x25471DDC: 83210294 lwz r25,660(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x294, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R25
+ 17: INCEIPL $4
+
+ 0x25471DE0: 82E1028C lwz r23,652(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x28C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R23
+ 22: INCEIPL $4
+
+ 0x25471DE4: 83410298 lwz r26,664(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x298, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R26
+ 27: INCEIPL $4
+
+ 0x25471DE8: 8361029C lwz r27,668(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x29C, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R27
+ 32: INCEIPL $4
+
+ 0x25471DEC: 838102A0 lwz r28,672(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x2A0, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R28
+ 37: INCEIPL $4
+
+ 0x25471DF0: 83A102A4 lwz r29,676(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x2A4, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R29
+ 42: INCEIPL $4
+
+ 0x25471DF4: 83C102A8 lwz r30,680(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x2A8, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R30
+ 47: INCEIPL $4
+
+ 0x25471DF8: 83E102AC lwz r31,684(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x2AC, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R31
+ 52: INCEIPL $4
+
+ 0x25471DFC: 382102B0 addi r1,r1,688
+ 53: GETL R1, t42
+ 54: ADDL $0x2B0, t42
+ 55: PUTL t42, R1
+ 56: INCEIPL $4
+
+ 0x25471E00: 4E800020 blr
+ 57: GETL LR, t44
+ 58: JMPo-r t44 ($4)
+
+
+
+. 1308 25471DD0 52
+. 82 E1 02 B4 83 01 02 90 7E E8 03 A6 83 21 02 94 82 E1 02 8C 83 41 02 98 83 61 02 9C 83 81 02 A0 83 A1 02 A4 83 C1 02 A8 83 E1 02 AC 38 21 02 B0 4E 80 00 20
+==== BB 1309 (0x254804E8) approx BBs exec'd 0 ====
+
+ 0x254804E8: 48016B19 bl 0x25497000
+ 0: MOVL $0x254804EC, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25497000 ($4)
+
+
+
+. 1309 254804E8 4
+. 48 01 6B 19
+==== BB 1310 (0x254804EC) approx BBs exec'd 0 ====
+
+ 0x254804EC: 7FE802A6 mflr r31
+ 0: GETL LR, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0x254804F0: 7C7E1B78 or r30,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R30
+ 5: INCEIPL $4
+
+ 0x254804F4: 839F0498 lwz r28,1176(r31)
+ 6: GETL R31, t4
+ 7: ADDL $0x498, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R28
+ 10: INCEIPL $4
+
+ 0x254804F8: 83BF04D0 lwz r29,1232(r31)
+ 11: GETL R31, t8
+ 12: ADDL $0x4D0, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0x254804FC: 837F04DC lwz r27,1244(r31)
+ 16: GETL R31, t12
+ 17: ADDL $0x4DC, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R27
+ 20: INCEIPL $4
+
+ 0x25480500: 807C0000 lwz r3,0(r28)
+ 21: GETL R28, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R3
+ 24: INCEIPL $4
+
+ 0x25480504: 809D0000 lwz r4,0(r29)
+ 25: GETL R29, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R4
+ 28: INCEIPL $4
+
+ 0x25480508: 80BB0000 lwz r5,0(r27)
+ 29: GETL R27, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R5
+ 32: INCEIPL $4
+
+ 0x2548050C: 5486103A rlwinm r6,r4,2,0,29
+ 33: GETL R4, t28
+ 34: SHLL $0x2, t28
+ 35: PUTL t28, R6
+ 36: INCEIPL $4
+
+ 0x25480510: 7CC53214 add r6,r5,r6
+ 37: GETL R5, t30
+ 38: GETL R6, t32
+ 39: ADDL t30, t32
+ 40: PUTL t32, R6
+ 41: INCEIPL $4
+
+ 0x25480514: 38C60004 addi r6,r6,4
+ 42: GETL R6, t34
+ 43: ADDL $0x4, t34
+ 44: PUTL t34, R6
+ 45: INCEIPL $4
+
+ 0x25480518: 4BFFB229 bl 0x2547B740
+ 46: MOVL $0x2548051C, t36
+ 47: PUTL t36, LR
+ 48: JMPo-c $0x2547B740 ($4)
+
+
+
+. 1310 254804EC 48
+. 7F E8 02 A6 7C 7E 1B 78 83 9F 04 98 83 BF 04 D0 83 7F 04 DC 80 7C 00 00 80 9D 00 00 80 BB 00 00 54 86 10 3A 7C C5 32 14 38 C6 00 04 4B FF B2 29
+==== BB 1311 _dl_init_internal(0x2547B740) approx BBs exec'd 0 ====
+
+ 0x2547B740: 9421FFC0 stwu r1,-64(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFC0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547B744: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547B748: 4801B8B9 bl 0x25497000
+ 9: MOVL $0x2547B74C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 1311 2547B740 12
+. 94 21 FF C0 7C 08 02 A6 48 01 B8 B9
+==== BB 1312 (0x2547B74C) approx BBs exec'd 0 ====
+
+ 0x2547B74C: 93C10038 stw r30,56(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x38, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547B750: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547B754: 92C10018 stw r22,24(r1)
+ 8: GETL R22, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x18, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547B758: 90010044 stw r0,68(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x44, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547B75C: 93E1003C stw r31,60(r1)
+ 18: GETL R31, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x3C, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x2547B760: 82DE04C8 lwz r22,1224(r30)
+ 23: GETL R30, t18
+ 24: ADDL $0x4C8, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R22
+ 27: INCEIPL $4
+
+ 0x2547B764: 92E1001C stw r23,28(r1)
+ 28: GETL R23, t22
+ 29: GETL R1, t24
+ 30: ADDL $0x1C, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0x2547B768: 7C972378 or r23,r4,r4
+ 33: GETL R4, t26
+ 34: PUTL t26, R23
+ 35: INCEIPL $4
+
+ 0x2547B76C: 83F601A0 lwz r31,416(r22)
+ 36: GETL R22, t28
+ 37: ADDL $0x1A0, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R31
+ 40: INCEIPL $4
+
+ 0x2547B770: 93010020 stw r24,32(r1)
+ 41: GETL R24, t32
+ 42: GETL R1, t34
+ 43: ADDL $0x20, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0x2547B774: 7CB82B78 or r24,r5,r5
+ 46: GETL R5, t36
+ 47: PUTL t36, R24
+ 48: INCEIPL $4
+
+ 0x2547B778: 2F9F0000 cmpi cr7,r31,0
+ 49: GETL R31, t38
+ 50: CMP0L t38, t40 (-rSo)
+ 51: ICRFL t40, $0x7, CR
+ 52: INCEIPL $4
+
+ 0x2547B77C: 93210024 stw r25,36(r1)
+ 53: GETL R25, t42
+ 54: GETL R1, t44
+ 55: ADDL $0x24, t44
+ 56: STL t42, (t44)
+ 57: INCEIPL $4
+
+ 0x2547B780: 93410028 stw r26,40(r1)
+ 58: GETL R26, t46
+ 59: GETL R1, t48
+ 60: ADDL $0x28, t48
+ 61: STL t46, (t48)
+ 62: INCEIPL $4
+
+ 0x2547B784: 7CD93378 or r25,r6,r6
+ 63: GETL R6, t50
+ 64: PUTL t50, R25
+ 65: INCEIPL $4
+
+ 0x2547B788: 9361002C stw r27,44(r1)
+ 66: GETL R27, t52
+ 67: GETL R1, t54
+ 68: ADDL $0x2C, t54
+ 69: STL t52, (t54)
+ 70: INCEIPL $4
+
+ 0x2547B78C: 7C7A1B78 or r26,r3,r3
+ 71: GETL R3, t56
+ 72: PUTL t56, R26
+ 73: INCEIPL $4
+
+ 0x2547B790: 93A10034 stw r29,52(r1)
+ 74: GETL R29, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x34, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0x2547B794: 92810010 stw r20,16(r1)
+ 79: GETL R20, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x10, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x2547B798: 92A10014 stw r21,20(r1)
+ 84: GETL R21, t66
+ 85: GETL R1, t68
+ 86: ADDL $0x14, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0x2547B79C: 93810030 stw r28,48(r1)
+ 89: GETL R28, t70
+ 90: GETL R1, t72
+ 91: ADDL $0x30, t72
+ 92: STL t70, (t72)
+ 93: INCEIPL $4
+
+ 0x2547B7A0: 83A300A0 lwz r29,160(r3)
+ 94: GETL R3, t74
+ 95: ADDL $0xA0, t74
+ 96: LDL (t74), t76
+ 97: PUTL t76, R29
+ 98: INCEIPL $4
+
+ 0x2547B7A4: 836300A4 lwz r27,164(r3)
+ 99: GETL R3, t78
+ 100: ADDL $0xA4, t78
+ 101: LDL (t78), t80
+ 102: PUTL t80, R27
+ 103: INCEIPL $4
+
+ 0x2547B7A8: 409E019C bc 4,30,0x2547B944
+ 104: Jc30o $0x2547B944
+
+
+
+. 1312 2547B74C 96
+. 93 C1 00 38 7F C8 02 A6 92 C1 00 18 90 01 00 44 93 E1 00 3C 82 DE 04 C8 92 E1 00 1C 7C 97 23 78 83 F6 01 A0 93 01 00 20 7C B8 2B 78 2F 9F 00 00 93 21 00 24 93 41 00 28 7C D9 33 78 93 61 00 2C 7C 7A 1B 78 93 A1 00 34 92 81 00 10 92 A1 00 14 93 81 00 30 83 A3 00 A0 83 63 00 A4 40 9E 01 9C
+==== BB 1313 (0x2547B944) approx BBs exec'd 0 ====
+
+ 0x2547B944: 801F0180 lwz r0,384(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547B948: 74091000 andis. r9,r0,0x1000
+ 5: GETL R0, t4
+ 6: ANDL $0x10000000, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x2547B94C: 40820110 bc 4,2,0x2547BA5C
+ 11: Jc02o $0x2547BA5C
+
+
+
+. 1313 2547B944 12
+. 80 1F 01 80 74 09 10 00 40 82 01 10
+==== BB 1314 (0x2547B950) approx BBs exec'd 0 ====
+
+ 0x2547B950: 64091000 oris r9,r0,0x1000
+ 0: GETL R0, t0
+ 1: ORL $0x10000000, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x2547B954: 809F0004 lwz r4,4(r31)
+ 4: GETL R31, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2547B958: 913F0180 stw r9,384(r31)
+ 9: GETL R9, t6
+ 10: GETL R31, t8
+ 11: ADDL $0x180, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547B95C: 88640000 lbz r3,0(r4)
+ 14: GETL R4, t10
+ 15: LDB (t10), t12
+ 16: PUTL t12, R3
+ 17: INCEIPL $4
+
+ 0x2547B960: 2F030000 cmpi cr6,r3,0
+ 18: GETL R3, t14
+ 19: CMP0L t14, t16 (-rSo)
+ 20: ICRFL t16, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x2547B964: 419A00F0 bc 12,26,0x2547BA54
+ 22: Js26o $0x2547BA54
+
+
+
+. 1314 2547B950 24
+. 64 09 10 00 80 9F 00 04 91 3F 01 80 88 64 00 00 2F 03 00 00 41 9A 00 F0
+==== BB 1315 (0x2547B968) approx BBs exec'd 0 ====
+
+ 0x2547B968: 815F0050 lwz r10,80(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547B96C: 2C8A0000 cmpi cr1,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547B970: 40860010 bc 4,6,0x2547B980
+ 9: Jc06o $0x2547B980
+
+
+
+. 1315 2547B968 12
+. 81 5F 00 50 2C 8A 00 00 40 86 00 10
+==== BB 1316 (0x2547B980) approx BBs exec'd 0 ====
+
+ 0x2547B980: 813E04F4 lwz r9,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547B984: 80C90000 lwz r6,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x2547B988: 70C90002 andi. r9,r6,0x2
+ 9: GETL R6, t8
+ 10: ANDL $0x2, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x2547B98C: 40820130 bc 4,2,0x2547BABC
+ 15: Jc02o $0x2547BABC
+
+
+
+. 1316 2547B980 16
+. 81 3E 04 F4 80 C9 00 00 70 C9 00 02 40 82 01 30
+==== BB 1317 (0x2547B990) approx BBs exec'd 0 ====
+
+ 0x2547B990: 2F0A0000 cmpi cr6,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547B994: 409A00D4 bc 4,26,0x2547BA68
+ 4: Jc26o $0x2547BA68
+
+
+
+. 1317 2547B990 8
+. 2F 0A 00 00 40 9A 00 D4
+==== BB 1318 (0x2547BA68) approx BBs exec'd 0 ====
+
+ 0x2547BA68: 818A0004 lwz r12,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x2547BA6C: 7EE3BB78 or r3,r23,r23
+ 5: GETL R23, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547BA70: 811F0000 lwz r8,0(r31)
+ 8: GETL R31, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R8
+ 11: INCEIPL $4
+
+ 0x2547BA74: 7F04C378 or r4,r24,r24
+ 12: GETL R24, t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0x2547BA78: 7F25CB78 or r5,r25,r25
+ 15: GETL R25, t12
+ 16: PUTL t12, R5
+ 17: INCEIPL $4
+
+ 0x2547BA7C: 7CE86214 add r7,r8,r12
+ 18: GETL R8, t14
+ 19: GETL R12, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R7
+ 22: INCEIPL $4
+
+ 0x2547BA80: 7CE903A6 mtctr r7
+ 23: GETL R7, t18
+ 24: PUTL t18, CTR
+ 25: INCEIPL $4
+
+ 0x2547BA84: 4E800421 bctrl
+ 26: MOVL $0x2547BA88, t20
+ 27: PUTL t20, LR
+ 28: GETL CTR, t22
+ 29: JMPo-c t22 ($4)
+
+
+
+. 1318 2547BA68 32
+. 81 8A 00 04 7E E3 BB 78 81 1F 00 00 7F 04 C3 78 7F 25 CB 78 7C E8 62 14 7C E9 03 A6 4E 80 04 21
+==== BB 1319 (0xFFDE898) approx BBs exec'd 0 ====
+
+ 0xFFDE898: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDE89C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDE8A0: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFFDE8A4: 4800001D bl 0xFFDE8C0
+ 14: MOVL $0xFFDE8A8, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFFDE8C0 ($4)
+
+
+
+. 1319 FFDE898 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 48 00 00 1D
+==== BB 1320 (0xFFDE8C0) approx BBs exec'd 0 ====
+
+ 0xFFDE8C0: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDE8C4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDE8C8: 93C10008 stw r30,8(r1)
+ 9: GETL R30, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFFDE8CC: 90010014 stw r0,20(r1)
+ 14: GETL R0, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x14, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xFFDE8D0: 48010839 bl 0xFFEF108
+ 19: MOVL $0xFFDE8D4, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0xFFEF108 ($4)
+
+
+
+. 1320 FFDE8C0 20
+. 94 21 FF F0 7C 08 02 A6 93 C1 00 08 90 01 00 14 48 01 08 39
+==== BB 1321 (0xFFEF108) approx BBs exec'd 0 ====
+
+ 0xFFEF108: 4E800021 blrl
+ 0: GETL LR, t0
+ 1: MOVL $0xFFEF10C, t2
+ 2: PUTL t2, LR
+ 3: JMPo-r t0 ($4)
+
+
+
+. 1321 FFEF108 4
+. 4E 80 00 21
+==== BB 1322 (0xFFDE8D4) approx BBs exec'd 0 ====
+
+ 0xFFDE8D4: 7FC802A6 mflr r30
+ 0: GETL LR, t0
+ 1: PUTL t0, R30
+ 2: INCEIPL $4
+
+ 0xFFDE8D8: 801E000C lwz r0,12(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFFDE8DC: 2F800000 cmpi cr7,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFFDE8E0: 419E000C bc 12,30,0xFFDE8EC
+ 12: Js30o $0xFFDE8EC
+
+
+
+. 1322 FFDE8D4 16
+. 7F C8 02 A6 80 1E 00 0C 2F 80 00 00 41 9E 00 0C
+==== BB 1323 (0xFFDE8EC) approx BBs exec'd 0 ====
+
+ 0xFFDE8EC: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDE8F0: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xFFDE8F4: 83C10008 lwz r30,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0xFFDE8F8: 38210010 addi r1,r1,16
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: PUTL t10, R1
+ 16: INCEIPL $4
+
+ 0xFFDE8FC: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 1323 FFDE8EC 20
+. 80 01 00 14 7C 08 03 A6 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 1324 (0xFFDE8A8) approx BBs exec'd 0 ====
+
+ 0xFFDE8A8: 48000115 bl 0xFFDE9BC
+ 0: MOVL $0xFFDE8AC, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFFDE9BC ($4)
+
+
+
+. 1324 FFDE8A8 4
+. 48 00 01 15
+==== BB 1325 (0xFFDE9BC) approx BBs exec'd 0 ====
+
+ 0xFFDE9BC: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDE9C0: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDE9C4: 429F0005 bcl 20,31,0xFFDE9C8
+ 9: MOVL $0xFFDE9C8, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFFDE9C8: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFFDE9CC: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xFFDE9D0: 90010014 stw r0,20(r1)
+ 20: GETL R0, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xFFDE9D4: 801EFFF0 lwz r0,-16(r30)
+ 25: GETL R30, t18
+ 26: ADDL $0xFFFFFFF0, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R0
+ 29: INCEIPL $4
+
+ 0xFFDE9D8: 7FC0F214 add r30,r0,r30
+ 30: GETL R0, t22
+ 31: GETL R30, t24
+ 32: ADDL t22, t24
+ 33: PUTL t24, R30
+ 34: INCEIPL $4
+
+ 0xFFDE9DC: 807E8010 lwz r3,-32752(r30)
+ 35: GETL R30, t26
+ 36: ADDL $0xFFFF8010, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R3
+ 39: INCEIPL $4
+
+ 0xFFDE9E0: 80030000 lwz r0,0(r3)
+ 40: GETL R3, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R0
+ 43: INCEIPL $4
+
+ 0xFFDE9E4: 2F800000 cmpi cr7,r0,0
+ 44: GETL R0, t34
+ 45: CMP0L t34, t36 (-rSo)
+ 46: ICRFL t36, $0x7, CR
+ 47: INCEIPL $4
+
+ 0xFFDE9E8: 419E0018 bc 12,30,0xFFDEA00
+ 48: Js30o $0xFFDEA00
+
+
+
+. 1325 FFDE9BC 48
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 90 01 00 14 80 1E FF F0 7F C0 F2 14 80 7E 80 10 80 03 00 00 2F 80 00 00 41 9E 00 18
+==== BB 1326 (0xFFDEA00) approx BBs exec'd 0 ====
+
+ 0xFFDEA00: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDEA04: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFFDEA08: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xFFDEA0C: 7C0803A6 mtlr r0
+ 14: GETL R0, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xFFDEA10: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 1326 FFDEA00 20
+. 80 01 00 14 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 1327 (0xFFDE8AC) approx BBs exec'd 0 ====
+
+ 0xFFDE8AC: 48000659 bl 0xFFDEF04
+ 0: MOVL $0xFFDE8B0, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFFDEF04 ($4)
+
+
+
+. 1327 FFDE8AC 4
+. 48 00 06 59
+==== BB 1328 (0xFFDEF04) approx BBs exec'd 0 ====
+
+ 0xFFDEF04: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDEF08: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDEF0C: 429F0005 bcl 20,31,0xFFDEF10
+ 9: MOVL $0xFFDEF10, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFFDEF10: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFFDEF14: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xFFDEF18: 93E1000C stw r31,12(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xFFDEF1C: 90010014 stw r0,20(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFFDEF20: 801EFFF0 lwz r0,-16(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0xFFFFFFF0, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFFDEF24: 7FC0F214 add r30,r0,r30
+ 35: GETL R0, t26
+ 36: GETL R30, t28
+ 37: ADDL t26, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0xFFDEF28: 813E8000 lwz r9,-32768(r30)
+ 40: GETL R30, t30
+ 41: ADDL $0xFFFF8000, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xFFDEF2C: 8009FFFC lwz r0,-4(r9)
+ 45: GETL R9, t34
+ 46: ADDL $0xFFFFFFFC, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R0
+ 49: INCEIPL $4
+
+ 0xFFDEF30: 3BE9FFFC addi r31,r9,-4
+ 50: GETL R9, t38
+ 51: ADDL $0xFFFFFFFC, t38
+ 52: PUTL t38, R31
+ 53: INCEIPL $4
+
+ 0xFFDEF34: 48000010 b 0xFFDEF44
+ 54: JMPo $0xFFDEF44 ($4)
+
+
+
+. 1328 FFDEF04 52
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 80 09 FF FC 3B E9 FF FC 48 00 00 10
+==== BB 1329 (0xFFDEF44) approx BBs exec'd 0 ====
+
+ 0xFFDEF44: 2F80FFFF cmpi cr7,r0,-1
+ 0: GETL R0, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFFDEF48: 409EFFF0 bc 4,30,0xFFDEF38
+ 5: Jc30o $0xFFDEF38
+
+
+
+. 1329 FFDEF44 8
+. 2F 80 FF FF 40 9E FF F0
+==== BB 1330 (0xFFDEF4C) approx BBs exec'd 0 ====
+
+ 0xFFDEF4C: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDEF50: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFFDEF54: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xFFDEF58: 7C0803A6 mtlr r0
+ 15: GETL R0, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFFDEF5C: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xFFDEF60: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 1330 FFDEF4C 24
+. 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 1331 (0xFFDE8B0) approx BBs exec'd 0 ====
+
+ 0xFFDE8B0: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDE8B4: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xFFDE8B8: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xFFDE8BC: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 1331 FFDE8B0 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 1332 (0x2547BA88) approx BBs exec'd 0 ====
+
+ 0x2547BA88: 4BFFFF10 b 0x2547B998
+ 0: JMPo $0x2547B998 ($4)
+
+
+
+. 1332 2547BA88 4
+. 4B FF FF 10
+==== BB 1333 (0x2547B998) approx BBs exec'd 0 ====
+
+ 0x2547B998: 817F0084 lwz r11,132(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547B99C: 2C8B0000 cmpi cr1,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547B9A0: 418600BC bc 12,6,0x2547BA5C
+ 9: Js06o $0x2547BA5C
+
+
+
+. 1333 2547B998 12
+. 81 7F 00 84 2C 8B 00 00 41 86 00 BC
+==== BB 1334 (0x2547BA5C) approx BBs exec'd 0 ====
+
+ 0x2547BA5C: 3B800000 li r28,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0x2547BA60: 939601A0 stw r28,416(r22)
+ 3: GETL R28, t2
+ 4: GETL R22, t4
+ 5: ADDL $0x1A0, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x2547BA64: 4BFFFD48 b 0x2547B7AC
+ 8: JMPo $0x2547B7AC ($4)
+
+
+
+. 1334 2547BA5C 12
+. 3B 80 00 00 93 96 01 A0 4B FF FD 48
+==== BB 1335 (0x2547B7AC) approx BBs exec'd 0 ====
+
+ 0x2547B7AC: 2F9D0000 cmpi cr7,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547B7B0: 409E0240 bc 4,30,0x2547B9F0
+ 4: Jc30o $0x2547B9F0
+
+
+
+. 1335 2547B7AC 8
+. 2F 9D 00 00 40 9E 02 40
+==== BB 1336 (0x2547B7B4) approx BBs exec'd 0 ====
+
+ 0x2547B7B4: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547B7B8: 3A800001 li r20,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R20
+ 5: INCEIPL $4
+
+ 0x2547B7BC: 48000789 bl 0x2547BF44
+ 6: MOVL $0x2547B7C0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x2547BF44 ($4)
+
+
+
+. 1336 2547B7B4 12
+. 38 60 00 00 3A 80 00 01 48 00 07 89
+==== BB 1337 (0x2547BF94) approx BBs exec'd 0 ====
+
+ 0x2547BF94: 83C10008 lwz r30,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R30
+ 4: INCEIPL $4
+
+ 0x2547BF98: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x2547BF9C: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+
+. 1337 2547BF94 12
+. 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 1338 (0x2547B7C0) approx BBs exec'd 0 ====
+
+ 0x2547B7C0: 9283000C stw r20,12(r3)
+ 0: GETL R20, t0
+ 1: GETL R3, t2
+ 2: ADDL $0xC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547B7C4: 7C761B78 or r22,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R22
+ 7: INCEIPL $4
+
+ 0x2547B7C8: 480007D9 bl 0x2547BFA0
+ 8: MOVL $0x2547B7CC, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x2547BFA0 ($4)
+
+
+
+. 1338 2547B7C0 12
+. 92 83 00 0C 7C 76 1B 78 48 00 07 D9
+==== BB 1339 (0x2547B7CC) approx BBs exec'd 0 ====
+
+ 0x2547B7CC: 83BA015C lwz r29,348(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x15C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x2547B7D0: 2F9D0000 cmpi cr7,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547B7D4: 3B9DFFFF addi r28,r29,-1
+ 9: GETL R29, t8
+ 10: ADDL $0xFFFFFFFF, t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0x2547B7D8: 419E0058 bc 12,30,0x2547B830
+ 13: Js30o $0x2547B830
+
+
+
+. 1339 2547B7CC 16
+. 83 BA 01 5C 2F 9D 00 00 3B 9D FF FF 41 9E 00 58
+==== BB 1340 (0x2547B7DC) approx BBs exec'd 0 ====
+
+ 0x2547B7DC: 82BA01E8 lwz r21,488(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x1E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x2547B7E0: 5780103A rlwinm r0,r28,2,0,29
+ 5: GETL R28, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547B7E4: 7FF5002E lwzx r31,r21,r0
+ 9: GETL R0, t6
+ 10: GETL R21, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0x2547B7E8: 801F0180 lwz r0,384(r31)
+ 15: GETL R31, t12
+ 16: ADDL $0x180, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R0
+ 19: INCEIPL $4
+
+ 0x2547B7EC: 74091000 andis. r9,r0,0x1000
+ 20: GETL R0, t16
+ 21: ANDL $0x10000000, t16
+ 22: PUTL t16, R9
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x0, CR
+ 25: INCEIPL $4
+
+ 0x2547B7F0: 40820034 bc 4,2,0x2547B824
+ 26: Jc02o $0x2547B824
+
+
+
+. 1340 2547B7DC 24
+. 82 BA 01 E8 57 80 10 3A 7F F5 00 2E 80 1F 01 80 74 09 10 00 40 82 00 34
+==== BB 1341 (0x2547B7F4) approx BBs exec'd 0 ====
+
+ 0x2547B7F4: 64091000 oris r9,r0,0x1000
+ 0: GETL R0, t0
+ 1: ORL $0x10000000, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x2547B7F8: 809F0004 lwz r4,4(r31)
+ 4: GETL R31, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2547B7FC: 913F0180 stw r9,384(r31)
+ 9: GETL R9, t6
+ 10: GETL R31, t8
+ 11: ADDL $0x180, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547B800: 88640000 lbz r3,0(r4)
+ 14: GETL R4, t10
+ 15: LDB (t10), t12
+ 16: PUTL t12, R3
+ 17: INCEIPL $4
+
+ 0x2547B804: 2F030000 cmpi cr6,r3,0
+ 18: GETL R3, t14
+ 19: CMP0L t14, t16 (-rSo)
+ 20: ICRFL t16, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x2547B808: 419A0104 bc 12,26,0x2547B90C
+ 22: Js26o $0x2547B90C
+
+
+
+. 1341 2547B7F4 24
+. 64 09 10 00 80 9F 00 04 91 3F 01 80 88 64 00 00 2F 03 00 00 41 9A 01 04
+==== BB 1342 (0x2547B80C) approx BBs exec'd 0 ====
+
+ 0x2547B80C: 815F0050 lwz r10,80(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547B810: 2C8A0000 cmpi cr1,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547B814: 40860064 bc 4,6,0x2547B878
+ 9: Jc06o $0x2547B878
+
+
+
+. 1342 2547B80C 12
+. 81 5F 00 50 2C 8A 00 00 40 86 00 64
+==== BB 1343 (0x2547B818) approx BBs exec'd 0 ====
+
+ 0x2547B818: 80BF0084 lwz r5,132(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547B81C: 2F850000 cmpi cr7,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547B820: 409E0058 bc 4,30,0x2547B878
+ 9: Jc30o $0x2547B878
+
+
+
+. 1343 2547B818 12
+. 80 BF 00 84 2F 85 00 00 40 9E 00 58
+==== BB 1344 (0x2547B824) approx BBs exec'd 0 ====
+
+ 0x2547B824: 2F9C0000 cmpi cr7,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547B828: 3B9CFFFF addi r28,r28,-1
+ 4: GETL R28, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x2547B82C: 409EFFB0 bc 4,30,0x2547B7DC
+ 8: Jc30o $0x2547B7DC
+
+
+
+. 1344 2547B824 12
+. 2F 9C 00 00 3B 9C FF FF 40 9E FF B0
+==== BB 1345 (0x2547B878) approx BBs exec'd 0 ====
+
+ 0x2547B878: 80DE04F4 lwz r6,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547B87C: 83660000 lwz r27,0(r6)
+ 5: GETL R6, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0x2547B880: 73690002 andi. r9,r27,0x2
+ 9: GETL R27, t8
+ 10: ANDL $0x2, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x2547B884: 4082009C bc 4,2,0x2547B920
+ 15: Jc02o $0x2547B920
+
+
+
+. 1345 2547B878 16
+. 80 DE 04 F4 83 66 00 00 73 69 00 02 40 82 00 9C
+==== BB 1346 (0x2547B888) approx BBs exec'd 0 ====
+
+ 0x2547B888: 2F0A0000 cmpi cr6,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547B88C: 409A005C bc 4,26,0x2547B8E8
+ 4: Jc26o $0x2547B8E8
+
+
+
+. 1346 2547B888 8
+. 2F 0A 00 00 40 9A 00 5C
+==== BB 1347 (0x2547B8E8) approx BBs exec'd 0 ====
+
+ 0x2547B8E8: 810A0004 lwz r8,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547B8EC: 7EE3BB78 or r3,r23,r23
+ 5: GETL R23, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547B8F0: 80FF0000 lwz r7,0(r31)
+ 8: GETL R31, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R7
+ 11: INCEIPL $4
+
+ 0x2547B8F4: 7F25CB78 or r5,r25,r25
+ 12: GETL R25, t10
+ 13: PUTL t10, R5
+ 14: INCEIPL $4
+
+ 0x2547B8F8: 7C874214 add r4,r7,r8
+ 15: GETL R7, t12
+ 16: GETL R8, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R4
+ 19: INCEIPL $4
+
+ 0x2547B8FC: 7C8903A6 mtctr r4
+ 20: GETL R4, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0x2547B900: 7F04C378 or r4,r24,r24
+ 23: GETL R24, t18
+ 24: PUTL t18, R4
+ 25: INCEIPL $4
+
+ 0x2547B904: 4E800421 bctrl
+ 26: MOVL $0x2547B908, t20
+ 27: PUTL t20, LR
+ 28: GETL CTR, t22
+ 29: JMPo-c t22 ($4)
+
+
+
+. 1347 2547B8E8 32
+. 81 0A 00 04 7E E3 BB 78 80 FF 00 00 7F 25 CB 78 7C 87 42 14 7C 89 03 A6 7F 04 C3 78 4E 80 04 21
+==== BB 1348 _init(0xFE7B620) approx BBs exec'd 0 ====
+
+ 0xFE7B620: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE7B624: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE7B628: 4812C829 bl 0xFFA7E50
+ 9: MOVL $0xFE7B62C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1348 FE7B620 12
+. 94 21 FF E0 7C 08 02 A6 48 12 C8 29
+==== BB 1349 (0xFFA7E50) approx BBs exec'd 0 ====
+
+ 0xFFA7E50: 4E800021 blrl
+ 0: GETL LR, t0
+ 1: MOVL $0xFFA7E54, t2
+ 2: PUTL t2, LR
+ 3: JMPo-r t0 ($4)
+
+
+
+. 1349 FFA7E50 4
+. 4E 80 00 21
+==== BB 1350 (0xFE7B62C) approx BBs exec'd 0 ====
+
+ 0xFE7B62C: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE7B630: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE7B634: 93810010 stw r28,16(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE7B638: 93A10014 stw r29,20(r1)
+ 13: GETL R29, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE7B63C: 7CBC2B78 or r28,r5,r5
+ 18: GETL R5, t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0xFE7B640: 93E1001C stw r31,28(r1)
+ 21: GETL R31, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE7B644: 7C9D2378 or r29,r4,r4
+ 26: GETL R4, t20
+ 27: PUTL t20, R29
+ 28: INCEIPL $4
+
+ 0xFE7B648: 817E1CE4 lwz r11,7396(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x1CE4, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R11
+ 33: INCEIPL $4
+
+ 0xFE7B64C: 7C7F1B78 or r31,r3,r3
+ 34: GETL R3, t26
+ 35: PUTL t26, R31
+ 36: INCEIPL $4
+
+ 0xFE7B650: 811E1AA4 lwz r8,6820(r30)
+ 37: GETL R30, t28
+ 38: ADDL $0x1AA4, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R8
+ 41: INCEIPL $4
+
+ 0xFE7B654: 39200000 li r9,0
+ 42: MOVL $0x0, t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xFE7B658: 2F8B0000 cmpi cr7,r11,0
+ 45: GETL R11, t34
+ 46: CMP0L t34, t36 (-rSo)
+ 47: ICRFL t36, $0x7, CR
+ 48: INCEIPL $4
+
+ 0xFE7B65C: 90010024 stw r0,36(r1)
+ 49: GETL R0, t38
+ 50: GETL R1, t40
+ 51: ADDL $0x24, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0xFE7B660: 7D0A4378 or r10,r8,r8
+ 54: GETL R8, t42
+ 55: PUTL t42, R10
+ 56: INCEIPL $4
+
+ 0xFE7B664: 419E0010 bc 12,30,0xFE7B674
+ 57: Js30o $0xFE7B674
+
+
+
+. 1350 FE7B62C 60
+. 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 A1 00 14 7C BC 2B 78 93 E1 00 1C 7C 9D 23 78 81 7E 1C E4 7C 7F 1B 78 81 1E 1A A4 39 20 00 00 2F 8B 00 00 90 01 00 24 7D 0A 43 78 41 9E 00 10
+==== BB 1351 (0xFE7B674) approx BBs exec'd 0 ====
+
+ 0xFE7B674: 912A0000 stw r9,0(r10)
+ 0: GETL R9, t0
+ 1: GETL R10, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE7B678: 80880000 lwz r4,0(r8)
+ 4: GETL R8, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R4
+ 7: INCEIPL $4
+
+ 0xFE7B67C: 2C840000 cmpi cr1,r4,0
+ 8: GETL R4, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x1, CR
+ 11: INCEIPL $4
+
+ 0xFE7B680: 40860024 bc 4,6,0xFE7B6A4
+ 12: Jc06o $0xFE7B6A4
+
+
+
+. 1351 FE7B674 16
+. 91 2A 00 00 80 88 00 00 2C 84 00 00 40 86 00 24
+==== BB 1352 (0xFE7B684) approx BBs exec'd 0 ====
+
+ 0xFE7B684: 813E1BF4 lwz r9,7156(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BF4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE7B688: 817E1BC8 lwz r11,7112(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1BC8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0xFE7B68C: 81490000 lwz r10,0(r9)
+ 10: GETL R9, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R10
+ 13: INCEIPL $4
+
+ 0xFE7B690: 80AB0034 lwz r5,52(r11)
+ 14: GETL R11, t12
+ 15: ADDL $0x34, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R5
+ 18: INCEIPL $4
+
+ 0xFE7B694: 7D435378 or r3,r10,r10
+ 19: GETL R10, t16
+ 20: PUTL t16, R3
+ 21: INCEIPL $4
+
+ 0xFE7B698: 7F055000 cmp cr6,r5,r10
+ 22: GETL R5, t18
+ 23: GETL R10, t20
+ 24: CMPL t18, t20, t22 (-rSo)
+ 25: ICRFL t22, $0x6, CR
+ 26: INCEIPL $4
+
+ 0xFE7B69C: 419A0008 bc 12,26,0xFE7B6A4
+ 27: Js26o $0xFE7B6A4
+
+
+
+. 1352 FE7B684 28
+. 81 3E 1B F4 81 7E 1B C8 81 49 00 00 80 AB 00 34 7D 43 53 78 7F 05 50 00 41 9A 00 08
+==== BB 1353 (0xFE7B6A4) approx BBs exec'd 0 ====
+
+ 0xFE7B6A4: 819E1A8C lwz r12,6796(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1A8C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFE7B6A8: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE7B6AC: 811E1DD4 lwz r8,7636(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x1DD4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R8
+ 12: INCEIPL $4
+
+ 0xFE7B6B0: 7FA4EB78 or r4,r29,r29
+ 13: GETL R29, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0xFE7B6B4: 80FE1B84 lwz r7,7044(r30)
+ 16: GETL R30, t12
+ 17: ADDL $0x1B84, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R7
+ 20: INCEIPL $4
+
+ 0xFE7B6B8: 7F85E378 or r5,r28,r28
+ 21: GETL R28, t16
+ 22: PUTL t16, R5
+ 23: INCEIPL $4
+
+ 0xFE7B6BC: 93EC0000 stw r31,0(r12)
+ 24: GETL R31, t18
+ 25: GETL R12, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0xFE7B6C0: 93A80000 stw r29,0(r8)
+ 28: GETL R29, t22
+ 29: GETL R8, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0xFE7B6C4: 93870000 stw r28,0(r7)
+ 32: GETL R28, t26
+ 33: GETL R7, t28
+ 34: STL t26, (t28)
+ 35: INCEIPL $4
+
+ 0xFE7B6C8: 480B6421 bl 0xFF31AE8
+ 36: MOVL $0xFE7B6CC, t30
+ 37: PUTL t30, LR
+ 38: JMPo-c $0xFF31AE8 ($4)
+
+
+
+. 1353 FE7B6A4 40
+. 81 9E 1A 8C 7F E3 FB 78 81 1E 1D D4 7F A4 EB 78 80 FE 1B 84 7F 85 E3 78 93 EC 00 00 93 A8 00 00 93 87 00 00 48 0B 64 21
+==== BB 1354 __init_misc(0xFF31AE8) approx BBs exec'd 0 ====
+
+ 0xFF31AE8: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFF31AEC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFF31AF0: 93A10014 stw r29,20(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFF31AF4: 7C9D2379 or. r29,r4,r4
+ 14: GETL R4, t10
+ 15: PUTL t10, R29
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFF31AF8: 48076359 bl 0xFFA7E50
+ 19: MOVL $0xFF31AFC, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1354 FF31AE8 20
+. 94 21 FF E0 7C 08 02 A6 93 A1 00 14 7C 9D 23 79 48 07 63 59
+==== BB 1355 (0xFF31AFC) approx BBs exec'd 0 ====
+
+ 0xFF31AFC: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF31B00: 93E1001C stw r31,28(r1)
+ 5: GETL R31, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x1C, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFF31B04: 7FC802A6 mflr r30
+ 10: GETL LR, t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0xFF31B08: 90010024 stw r0,36(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFF31B0C: 4182003C bc 12,2,0xFF31B48
+ 18: Js02o $0xFF31B48
+
+
+
+. 1355 FF31AFC 20
+. 93 C1 00 18 93 E1 00 1C 7F C8 02 A6 90 01 00 24 41 82 00 3C
+==== BB 1356 (0xFF31B10) approx BBs exec'd 0 ====
+
+ 0xFF31B10: 83FD0000 lwz r31,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R31
+ 3: INCEIPL $4
+
+ 0xFF31B14: 3880002F li r4,47
+ 4: MOVL $0x2F, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0xFF31B18: 2F9F0000 cmpi cr7,r31,0
+ 7: GETL R31, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0xFF31B1C: 7FE3FB78 or r3,r31,r31
+ 11: GETL R31, t10
+ 12: PUTL t10, R3
+ 13: INCEIPL $4
+
+ 0xFF31B20: 419E0028 bc 12,30,0xFF31B48
+ 14: Js30o $0xFF31B48
+
+
+
+. 1356 FF31B10 20
+. 83 FD 00 00 38 80 00 2F 2F 9F 00 00 7F E3 FB 78 41 9E 00 28
+==== BB 1357 (0xFF31B24) approx BBs exec'd 0 ====
+
+ 0xFF31B24: 4BFA5459 bl 0xFED6F7C
+ 0: MOVL $0xFF31B28, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFED6F7C ($4)
+
+
+
+. 1357 FF31B24 4
+. 4B FA 54 59
+==== BB 1358 strrchr(0xFED6F7C) approx BBs exec'd 0 ====
+
+ 0xFED6F7C: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED6F80: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFED6F84: 93A10014 stw r29,20(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFED6F88: 549D063E rlwinm r29,r4,0,24,31
+ 14: GETL R4, t10
+ 15: ANDL $0xFF, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0xFED6F8C: 2F9D0000 cmpi cr7,r29,0
+ 18: GETL R29, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x7, CR
+ 21: INCEIPL $4
+
+ 0xFED6F90: 93C10018 stw r30,24(r1)
+ 22: GETL R30, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x18, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0xFED6F94: 90010024 stw r0,36(r1)
+ 27: GETL R0, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x24, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFED6F98: 7C601B78 or r0,r3,r3
+ 32: GETL R3, t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFED6F9C: 93E1001C stw r31,28(r1)
+ 35: GETL R31, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFED6FA0: 409E0024 bc 4,30,0xFED6FC4
+ 40: Jc30o $0xFED6FC4
+
+
+
+. 1358 FED6F7C 40
+. 94 21 FF E0 7C 08 02 A6 93 A1 00 14 54 9D 06 3E 2F 9D 00 00 93 C1 00 18 90 01 00 24 7C 60 1B 78 93 E1 00 1C 40 9E 00 24
+==== BB 1359 (0xFED6FC4) approx BBs exec'd 0 ====
+
+ 0xFED6FC4: 3BE00000 li r31,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0xFED6FC8: 4800000C b 0xFED6FD4
+ 3: JMPo $0xFED6FD4 ($4)
+
+
+
+. 1359 FED6FC4 8
+. 3B E0 00 00 48 00 00 0C
+==== BB 1360 (0xFED6FD4) approx BBs exec'd 0 ====
+
+ 0xFED6FD4: 7C030378 or r3,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED6FD8: 7FA4EB78 or r4,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFED6FDC: 4BFFF2F1 bl 0xFED62CC
+ 6: MOVL $0xFED6FE0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED62CC ($4)
+
+
+
+. 1360 FED6FD4 12
+. 7C 03 03 78 7F A4 EB 78 4B FF F2 F1
+==== BB 1361 strchr(0xFED62CC) approx BBs exec'd 0 ====
+
+ 0xFED62CC: 5084442E rlwimi r4,r4,8,16,23
+ 0: GETL R4, t0
+ 1: GETL R4, t2
+ 2: ROLL $0x8, t2
+ 3: ANDL $0xFF00, t2
+ 4: ANDL $0xFFFF00FF, t0
+ 5: ORL t0, t2
+ 6: PUTL t2, R4
+ 7: INCEIPL $4
+
+ 0xFED62D0: 3960FFFF li r11,-1
+ 8: MOVL $0xFFFFFFFF, t4
+ 9: PUTL t4, R11
+ 10: INCEIPL $4
+
+ 0xFED62D4: 5084801E rlwimi r4,r4,16,0,15
+ 11: GETL R4, t6
+ 12: GETL R4, t8
+ 13: ROLL $0x10, t8
+ 14: ANDL $0xFFFF0000, t8
+ 15: ANDL $0xFFFF, t6
+ 16: ORL t6, t8
+ 17: PUTL t8, R4
+ 18: INCEIPL $4
+
+ 0xFED62D8: 546A1EF8 rlwinm r10,r3,3,27,28
+ 19: GETL R3, t10
+ 20: ROLL $0x3, t10
+ 21: ANDL $0x18, t10
+ 22: PUTL t10, R10
+ 23: INCEIPL $4
+
+ 0xFED62DC: 3CC0FEFF lis r6,-257
+ 24: MOVL $0xFEFF0000, t12
+ 25: PUTL t12, R6
+ 26: INCEIPL $4
+
+ 0xFED62E0: 3CE07F7F lis r7,32639
+ 27: MOVL $0x7F7F0000, t14
+ 28: PUTL t14, R7
+ 29: INCEIPL $4
+
+ 0xFED62E4: 5468003A rlwinm r8,r3,0,0,29
+ 30: GETL R3, t16
+ 31: ANDL $0xFFFFFFFC, t16
+ 32: PUTL t16, R8
+ 33: INCEIPL $4
+
+ 0xFED62E8: 38C6FEFF addi r6,r6,-257
+ 34: MOVL $0xFEFEFEFF, t18
+ 35: PUTL t18, R6
+ 36: INCEIPL $4
+
+ 0xFED62EC: 38E77F7F addi r7,r7,32639
+ 37: MOVL $0x7F7F7F7F, t20
+ 38: PUTL t20, R7
+ 39: INCEIPL $4
+
+ 0xFED62F0: 80A80000 lwz r5,0(r8)
+ 40: GETL R8, t22
+ 41: LDL (t22), t24
+ 42: PUTL t24, R5
+ 43: INCEIPL $4
+
+ 0xFED62F4: 7D6B5430 srw r11,r11,r10
+ 44: GETL R11, t28
+ 45: GETL R10, t26
+ 46: SHRL t26, t28
+ 47: PUTL t28, R11
+ 48: INCEIPL $4
+
+ 0xFED62F8: 7CA55B38 orc r5,r5,r11
+ 49: GETL R5, t30
+ 50: GETL R11, t32
+ 51: NOTL t32
+ 52: ORL t30, t32
+ 53: PUTL t32, R5
+ 54: INCEIPL $4
+
+ 0xFED62FC: 7C062A14 add r0,r6,r5
+ 55: GETL R6, t34
+ 56: GETL R5, t36
+ 57: ADDL t34, t36
+ 58: PUTL t36, R0
+ 59: INCEIPL $4
+
+ 0xFED6300: 7CE928F8 nor r9,r7,r5
+ 60: GETL R7, t38
+ 61: GETL R5, t40
+ 62: ORL t40, t38
+ 63: NOTL t38
+ 64: PUTL t38, R9
+ 65: INCEIPL $4
+
+ 0xFED6304: 7C004839 and. r0,r0,r9
+ 66: GETL R0, t42
+ 67: GETL R9, t44
+ 68: ANDL t42, t44
+ 69: PUTL t44, R0
+ 70: CMP0L t44, t46 (-rSo)
+ 71: ICRFL t46, $0x0, CR
+ 72: INCEIPL $4
+
+ 0xFED6308: 7C8C2A78 xor r12,r4,r5
+ 73: GETL R4, t48
+ 74: GETL R5, t50
+ 75: XORL t48, t50
+ 76: PUTL t50, R12
+ 77: INCEIPL $4
+
+ 0xFED630C: 7D8C5B38 orc r12,r12,r11
+ 78: GETL R12, t52
+ 79: GETL R11, t54
+ 80: NOTL t54
+ 81: ORL t52, t54
+ 82: PUTL t54, R12
+ 83: INCEIPL $4
+
+ 0xFED6310: 48000020 b 0xFED6330
+ 84: JMPo $0xFED6330 ($4)
+
+
+
+. 1361 FED62CC 72
+. 50 84 44 2E 39 60 FF FF 50 84 80 1E 54 6A 1E F8 3C C0 FE FF 3C E0 7F 7F 54 68 00 3A 38 C6 FE FF 38 E7 7F 7F 80 A8 00 00 7D 6B 54 30 7C A5 5B 38 7C 06 2A 14 7C E9 28 F8 7C 00 48 39 7C 8C 2A 78 7D 8C 5B 38 48 00 00 20
+==== BB 1362 (0xFED6330) approx BBs exec'd 0 ====
+
+ 0xFED6330: 7C066214 add r0,r6,r12
+ 0: GETL R6, t0
+ 1: GETL R12, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED6334: 7CE960F8 nor r9,r7,r12
+ 5: GETL R7, t4
+ 6: GETL R12, t6
+ 7: ORL t6, t4
+ 8: NOTL t4
+ 9: PUTL t4, R9
+ 10: INCEIPL $4
+
+ 0xFED6338: 4182FFDC bc 12,2,0xFED6314
+ 11: Js02o $0xFED6314
+
+
+
+. 1362 FED6330 12
+. 7C 06 62 14 7C E9 60 F8 41 82 FF DC
+==== BB 1363 (0xFED6314) approx BBs exec'd 0 ====
+
+ 0xFED6314: 84A80004 lwzu r5,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R8
+ 3: LDL (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFED6318: 7C004839 and. r0,r0,r9
+ 6: GETL R0, t4
+ 7: GETL R9, t6
+ 8: ANDL t4, t6
+ 9: PUTL t6, R0
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFED631C: 7C062A14 add r0,r6,r5
+ 13: GETL R6, t10
+ 14: GETL R5, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R0
+ 17: INCEIPL $4
+
+ 0xFED6320: 7CE928F8 nor r9,r7,r5
+ 18: GETL R7, t14
+ 19: GETL R5, t16
+ 20: ORL t16, t14
+ 21: NOTL t14
+ 22: PUTL t14, R9
+ 23: INCEIPL $4
+
+ 0xFED6324: 4082005C bc 4,2,0xFED6380
+ 24: Jc02o $0xFED6380
+
+
+
+. 1363 FED6314 20
+. 84 A8 00 04 7C 00 48 39 7C 06 2A 14 7C E9 28 F8 40 82 00 5C
+==== BB 1364 (0xFED6328) approx BBs exec'd 0 ====
+
+ 0xFED6328: 7C004839 and. r0,r0,r9
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFED632C: 7C8C2A78 xor r12,r4,r5
+ 7: GETL R4, t6
+ 8: GETL R5, t8
+ 9: XORL t6, t8
+ 10: PUTL t8, R12
+ 11: INCEIPL $4
+
+ 0xFED6330: 7C066214 add r0,r6,r12
+ 12: GETL R6, t10
+ 13: GETL R12, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R0
+ 16: INCEIPL $4
+
+ 0xFED6334: 7CE960F8 nor r9,r7,r12
+ 17: GETL R7, t14
+ 18: GETL R12, t16
+ 19: ORL t16, t14
+ 20: NOTL t14
+ 21: PUTL t14, R9
+ 22: INCEIPL $4
+
+ 0xFED6338: 4182FFDC bc 12,2,0xFED6314
+ 23: Js02o $0xFED6314
+
+
+
+. 1364 FED6328 20
+. 7C 00 48 39 7C 8C 2A 78 7C 06 62 14 7C E9 60 F8 41 82 FF DC
+==== BB 1365 (0xFED633C) approx BBs exec'd 0 ====
+
+ 0xFED633C: 7C004839 and. r0,r0,r9
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFED6340: 38600000 li r3,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFED6344: 4D820020 bclr 12,2
+ 10: GETL LR, t8
+ 11: Js02o-r t8
+
+
+
+. 1365 FED633C 12
+. 7C 00 48 39 38 60 00 00 4D 82 00 20
+==== BB 1366 (0xFED6FE0) approx BBs exec'd 0 ====
+
+ 0xFED6FE0: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFED6FE4: 4082FFE8 bc 4,2,0xFED6FCC
+ 4: Jc02o $0xFED6FCC
+
+
+
+. 1366 FED6FE0 8
+. 2C 03 00 00 40 82 FF E8
+==== BB 1367 (0xFED6FE8) approx BBs exec'd 0 ====
+
+ 0xFED6FE8: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFED6FEC: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED6FF0: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0xFED6FF4: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0xFED6FF8: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFED6FFC: 83E1001C lwz r31,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0xFED7000: 38210020 addi r1,r1,32
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0xFED7004: 4E800020 blr
+ 30: GETL LR, t22
+ 31: JMPo-r t22 ($4)
+
+
+
+. 1367 FED6FE8 32
+. 80 81 00 24 7F E3 FB 78 83 A1 00 14 83 C1 00 18 7C 88 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1368 (0xFF31B28) approx BBs exec'd 0 ====
+
+ 0xFF31B28: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFF31B2C: 38630001 addi r3,r3,1
+ 4: GETL R3, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFF31B30: 41860034 bc 12,6,0xFF31B64
+ 8: Js06o $0xFF31B64
+
+
+
+. 1368 FF31B28 12
+. 2C 83 00 00 38 63 00 01 41 86 00 34
+==== BB 1369 (0xFF31B64) approx BBs exec'd 0 ====
+
+ 0xFF31B64: 813E1C34 lwz r9,7220(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1C34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFF31B68: 93E90000 stw r31,0(r9)
+ 5: GETL R31, t4
+ 6: GETL R9, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFF31B6C: 4BFFFFD0 b 0xFF31B3C
+ 9: JMPo $0xFF31B3C ($4)
+
+
+
+. 1369 FF31B64 12
+. 81 3E 1C 34 93 E9 00 00 4B FF FF D0
+==== BB 1370 (0xFF31B3C) approx BBs exec'd 0 ====
+
+ 0xFF31B3C: 80BD0000 lwz r5,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFF31B40: 807E1E24 lwz r3,7716(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1E24, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFF31B44: 90A30000 stw r5,0(r3)
+ 9: GETL R5, t8
+ 10: GETL R3, t10
+ 11: STL t8, (t10)
+ 12: INCEIPL $4
+
+ 0xFF31B48: 80C10024 lwz r6,36(r1)
+ 13: GETL R1, t12
+ 14: ADDL $0x24, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R6
+ 17: INCEIPL $4
+
+ 0xFF31B4C: 83A10014 lwz r29,20(r1)
+ 18: GETL R1, t16
+ 19: ADDL $0x14, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R29
+ 22: INCEIPL $4
+
+ 0xFF31B50: 83C10018 lwz r30,24(r1)
+ 23: GETL R1, t20
+ 24: ADDL $0x18, t20
+ 25: LDL (t20), t22
+ 26: PUTL t22, R30
+ 27: INCEIPL $4
+
+ 0xFF31B54: 7CC803A6 mtlr r6
+ 28: GETL R6, t24
+ 29: PUTL t24, LR
+ 30: INCEIPL $4
+
+ 0xFF31B58: 83E1001C lwz r31,28(r1)
+ 31: GETL R1, t26
+ 32: ADDL $0x1C, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R31
+ 35: INCEIPL $4
+
+ 0xFF31B5C: 38210020 addi r1,r1,32
+ 36: GETL R1, t30
+ 37: ADDL $0x20, t30
+ 38: PUTL t30, R1
+ 39: INCEIPL $4
+
+ 0xFF31B60: 4E800020 blr
+ 40: GETL LR, t32
+ 41: JMPo-r t32 ($4)
+
+
+
+. 1370 FF31B3C 40
+. 80 BD 00 00 80 7E 1E 24 90 A3 00 00 80 C1 00 24 83 A1 00 14 83 C1 00 18 7C C8 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1371 (0xFE7B6CC) approx BBs exec'd 0 ====
+
+ 0xFE7B6CC: 4BFFFE95 bl 0xFE7B560
+ 0: MOVL $0xFE7B6D0, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFE7B560 ($4)
+
+
+
+. 1371 FE7B6CC 4
+. 4B FF FE 95
+==== BB 1372 __libc_global_ctors(0xFE7B560) approx BBs exec'd 0 ====
+
+ 0xFE7B560: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE7B564: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE7B568: 4812C8E9 bl 0xFFA7E50
+ 9: MOVL $0xFE7B56C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1372 FE7B560 12
+. 94 21 FF F0 7C 08 02 A6 48 12 C8 E9
+==== BB 1373 (0xFE7B56C) approx BBs exec'd 0 ====
+
+ 0xFE7B56C: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE7B570: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE7B574: 93E1000C stw r31,12(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE7B578: 90010014 stw r0,20(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE7B57C: 813E0018 lwz r9,24(r30)
+ 18: GETL R30, t14
+ 19: ADDL $0x18, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R9
+ 22: INCEIPL $4
+
+ 0xFE7B580: 80090004 lwz r0,4(r9)
+ 23: GETL R9, t18
+ 24: ADDL $0x4, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R0
+ 27: INCEIPL $4
+
+ 0xFE7B584: 3BE90004 addi r31,r9,4
+ 28: GETL R9, t22
+ 29: ADDL $0x4, t22
+ 30: PUTL t22, R31
+ 31: INCEIPL $4
+
+ 0xFE7B588: 2F800000 cmpi cr7,r0,0
+ 32: GETL R0, t24
+ 33: CMP0L t24, t26 (-rSo)
+ 34: ICRFL t26, $0x7, CR
+ 35: INCEIPL $4
+
+ 0xFE7B58C: 419E0018 bc 12,30,0xFE7B5A4
+ 36: Js30o $0xFE7B5A4
+
+
+
+. 1373 FE7B56C 36
+. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 81 3E 00 18 80 09 00 04 3B E9 00 04 2F 80 00 00 41 9E 00 18
+==== BB 1374 (0xFE7B590) approx BBs exec'd 0 ====
+
+ 0xFE7B590: 7C0903A6 mtctr r0
+ 0: GETL R0, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0xFE7B594: 4E800421 bctrl
+ 3: MOVL $0xFE7B598, t2
+ 4: PUTL t2, LR
+ 5: GETL CTR, t4
+ 6: JMPo-c t4 ($4)
+
+
+
+. 1374 FE7B590 8
+. 7C 09 03 A6 4E 80 04 21
+==== BB 1375 _IO_check_libio(0xFECD850) approx BBs exec'd 0 ====
+
+ 0xFECD850: 7D8802A6 mflr r12
+ 0: GETL LR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0xFECD854: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECD858: 480DA5F9 bl 0xFFA7E50
+ 9: MOVL $0xFECD85C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1375 FECD850 12
+. 7D 88 02 A6 94 21 FF F0 48 0D A5 F9
+==== BB 1376 (0xFECD85C) approx BBs exec'd 0 ====
+
+ 0xFECD85C: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECD860: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFECD864: 7D8803A6 mtlr r12
+ 8: GETL R12, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0xFECD868: 801E1DC8 lwz r0,7624(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x1DC8, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R0
+ 15: INCEIPL $4
+
+ 0xFECD86C: 811E1B00 lwz r8,6912(r30)
+ 16: GETL R30, t12
+ 17: ADDL $0x1B00, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R8
+ 20: INCEIPL $4
+
+ 0xFECD870: 2F800000 cmpi cr7,r0,0
+ 21: GETL R0, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0xFECD874: 815E1BCC lwz r10,7116(r30)
+ 25: GETL R30, t20
+ 26: ADDL $0x1BCC, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R10
+ 29: INCEIPL $4
+
+ 0xFECD878: 80FE1AE8 lwz r7,6888(r30)
+ 30: GETL R30, t24
+ 31: ADDL $0x1AE8, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R7
+ 34: INCEIPL $4
+
+ 0xFECD87C: 3800FFB4 li r0,-76
+ 35: MOVL $0xFFFFFFB4, t28
+ 36: PUTL t28, R0
+ 37: INCEIPL $4
+
+ 0xFECD880: 419E0010 bc 12,30,0xFECD890
+ 38: Js30o $0xFECD890
+
+
+
+. 1376 FECD85C 40
+. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 80 1E 1D C8 81 1E 1B 00 2F 80 00 00 81 5E 1B CC 80 FE 1A E8 38 00 FF B4 41 9E 00 10
+==== BB 1377 (0xFECD884) approx BBs exec'd 0 ====
+
+ 0xFECD884: 83C10008 lwz r30,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R30
+ 4: INCEIPL $4
+
+ 0xFECD888: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFECD88C: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+
+. 1377 FECD884 12
+. 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 1378 (0xFE7B598) approx BBs exec'd 0 ====
+
+ 0xFE7B598: 841F0004 lwzu r0,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R31
+ 3: LDL (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xFE7B59C: 2F800000 cmpi cr7,r0,0
+ 6: GETL R0, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFE7B5A0: 409EFFF0 bc 4,30,0xFE7B590
+ 10: Jc30o $0xFE7B590
+
+
+
+. 1378 FE7B598 12
+. 84 1F 00 04 2F 80 00 00 40 9E FF F0
+==== BB 1379 (0xFE7B5A4) approx BBs exec'd 0 ====
+
+ 0xFE7B5A4: 80610014 lwz r3,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE7B5A8: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFE7B5AC: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xFE7B5B0: 7C6803A6 mtlr r3
+ 15: GETL R3, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFE7B5B4: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xFE7B5B8: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 1379 FE7B5A4 24
+. 80 61 00 14 83 C1 00 08 83 E1 00 0C 7C 68 03 A6 38 21 00 10 4E 80 00 20
+==== BB 1380 (0xFE7B6D0) approx BBs exec'd 0 ====
+
+ 0xFE7B6D0: 80C10024 lwz r6,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFE7B6D4: 83810010 lwz r28,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0xFE7B6D8: 83A10014 lwz r29,20(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0xFE7B6DC: 7CC803A6 mtlr r6
+ 15: GETL R6, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFE7B6E0: 83C10018 lwz r30,24(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x18, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R30
+ 22: INCEIPL $4
+
+ 0xFE7B6E4: 83E1001C lwz r31,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R31
+ 27: INCEIPL $4
+
+ 0xFE7B6E8: 38210020 addi r1,r1,32
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: PUTL t22, R1
+ 31: INCEIPL $4
+
+ 0xFE7B6EC: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+
+. 1380 FE7B6D0 32
+. 80 C1 00 24 83 81 00 10 83 A1 00 14 7C C8 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1381 (0x2547B908) approx BBs exec'd 0 ====
+
+ 0x2547B908: 4BFFFF88 b 0x2547B890
+ 0: JMPo $0x2547B890 ($4)
+
+
+
+. 1381 2547B908 4
+. 4B FF FF 88
+==== BB 1382 (0x2547B890) approx BBs exec'd 0 ====
+
+ 0x2547B890: 817F0084 lwz r11,132(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547B894: 2C8B0000 cmpi cr1,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547B898: 41A6FF8C bc 13,6,0x2547B824
+ 9: Js06o $0x2547B824
+
+
+
+. 1382 2547B890 12
+. 81 7F 00 84 2C 8B 00 00 41 A6 FF 8C
+==== BB 1383 (0xFFB0D34) approx BBs exec'd 0 ====
+
+ 0xFFB0D34: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFB0D38: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFB0D3C: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFFB0D40: 4800001D bl 0xFFB0D5C
+ 14: MOVL $0xFFB0D44, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFFB0D5C ($4)
+
+
+
+. 1383 FFB0D34 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 48 00 00 1D
+==== BB 1384 (0xFFB0D5C) approx BBs exec'd 0 ====
+
+ 0xFFB0D5C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFB0D60: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFB0D64: 93C10008 stw r30,8(r1)
+ 9: GETL R30, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFFB0D68: 90010014 stw r0,20(r1)
+ 14: GETL R0, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x14, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xFFB0D6C: 4801229D bl 0xFFC3008
+ 19: MOVL $0xFFB0D70, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0xFFC3008 ($4)
+
+
+
+. 1384 FFB0D5C 20
+. 94 21 FF F0 7C 08 02 A6 93 C1 00 08 90 01 00 14 48 01 22 9D
+==== BB 1385 (0xFFC3008) approx BBs exec'd 0 ====
+
+ 0xFFC3008: 4E800021 blrl
+ 0: GETL LR, t0
+ 1: MOVL $0xFFC300C, t2
+ 2: PUTL t2, LR
+ 3: JMPo-r t0 ($4)
+
+
+
+. 1385 FFC3008 4
+. 4E 80 00 21
+==== BB 1386 (0xFFB0D70) approx BBs exec'd 0 ====
+
+ 0xFFB0D70: 7FC802A6 mflr r30
+ 0: GETL LR, t0
+ 1: PUTL t0, R30
+ 2: INCEIPL $4
+
+ 0xFFB0D74: 801E008C lwz r0,140(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x8C, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFFB0D78: 2F800000 cmpi cr7,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFFB0D7C: 419E000C bc 12,30,0xFFB0D88
+ 12: Js30o $0xFFB0D88
+
+
+
+. 1386 FFB0D70 16
+. 7F C8 02 A6 80 1E 00 8C 2F 80 00 00 41 9E 00 0C
+==== BB 1387 (0xFFB0D88) approx BBs exec'd 0 ====
+
+ 0xFFB0D88: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFB0D8C: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xFFB0D90: 83C10008 lwz r30,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0xFFB0D94: 38210010 addi r1,r1,16
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: PUTL t10, R1
+ 16: INCEIPL $4
+
+ 0xFFB0D98: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 1387 FFB0D88 20
+. 80 01 00 14 7C 08 03 A6 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 1388 (0xFFB0D44) approx BBs exec'd 0 ====
+
+ 0xFFB0D44: 48000115 bl 0xFFB0E58
+ 0: MOVL $0xFFB0D48, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFFB0E58 ($4)
+
+
+
+. 1388 FFB0D44 4
+. 48 00 01 15
+==== BB 1389 (0xFFB0E58) approx BBs exec'd 0 ====
+
+ 0xFFB0E58: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFB0E5C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFB0E60: 429F0005 bcl 20,31,0xFFB0E64
+ 9: MOVL $0xFFB0E64, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFFB0E64: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFFB0E68: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xFFB0E6C: 90010014 stw r0,20(r1)
+ 20: GETL R0, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xFFB0E70: 801EFFF0 lwz r0,-16(r30)
+ 25: GETL R30, t18
+ 26: ADDL $0xFFFFFFF0, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R0
+ 29: INCEIPL $4
+
+ 0xFFB0E74: 7FC0F214 add r30,r0,r30
+ 30: GETL R0, t22
+ 31: GETL R30, t24
+ 32: ADDL t22, t24
+ 33: PUTL t24, R30
+ 34: INCEIPL $4
+
+ 0xFFB0E78: 807E8010 lwz r3,-32752(r30)
+ 35: GETL R30, t26
+ 36: ADDL $0xFFFF8010, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R3
+ 39: INCEIPL $4
+
+ 0xFFB0E7C: 80030000 lwz r0,0(r3)
+ 40: GETL R3, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R0
+ 43: INCEIPL $4
+
+ 0xFFB0E80: 2F800000 cmpi cr7,r0,0
+ 44: GETL R0, t34
+ 45: CMP0L t34, t36 (-rSo)
+ 46: ICRFL t36, $0x7, CR
+ 47: INCEIPL $4
+
+ 0xFFB0E84: 419E0018 bc 12,30,0xFFB0E9C
+ 48: Js30o $0xFFB0E9C
+
+
+
+. 1389 FFB0E58 48
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 90 01 00 14 80 1E FF F0 7F C0 F2 14 80 7E 80 10 80 03 00 00 2F 80 00 00 41 9E 00 18
+==== BB 1390 (0xFFB0E9C) approx BBs exec'd 0 ====
+
+ 0xFFB0E9C: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFB0EA0: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFFB0EA4: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xFFB0EA8: 7C0803A6 mtlr r0
+ 14: GETL R0, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xFFB0EAC: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 1390 FFB0E9C 20
+. 80 01 00 14 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 1391 (0xFFB0D48) approx BBs exec'd 0 ====
+
+ 0xFFB0D48: 480010FD bl 0xFFB1E44
+ 0: MOVL $0xFFB0D4C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFFB1E44 ($4)
+
+
+
+. 1391 FFB0D48 4
+. 48 00 10 FD
+==== BB 1392 (0xFFB1E44) approx BBs exec'd 0 ====
+
+ 0xFFB1E44: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFB1E48: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFB1E4C: 429F0005 bcl 20,31,0xFFB1E50
+ 9: MOVL $0xFFB1E50, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFFB1E50: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFFB1E54: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xFFB1E58: 93E1000C stw r31,12(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xFFB1E5C: 90010014 stw r0,20(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFFB1E60: 801EFFF0 lwz r0,-16(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0xFFFFFFF0, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFFB1E64: 7FC0F214 add r30,r0,r30
+ 35: GETL R0, t26
+ 36: GETL R30, t28
+ 37: ADDL t26, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0xFFB1E68: 813E8000 lwz r9,-32768(r30)
+ 40: GETL R30, t30
+ 41: ADDL $0xFFFF8000, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xFFB1E6C: 8009FFFC lwz r0,-4(r9)
+ 45: GETL R9, t34
+ 46: ADDL $0xFFFFFFFC, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R0
+ 49: INCEIPL $4
+
+ 0xFFB1E70: 3BE9FFFC addi r31,r9,-4
+ 50: GETL R9, t38
+ 51: ADDL $0xFFFFFFFC, t38
+ 52: PUTL t38, R31
+ 53: INCEIPL $4
+
+ 0xFFB1E74: 48000010 b 0xFFB1E84
+ 54: JMPo $0xFFB1E84 ($4)
+
+
+
+. 1392 FFB1E44 52
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 80 09 FF FC 3B E9 FF FC 48 00 00 10
+==== BB 1393 (0xFFB1E84) approx BBs exec'd 0 ====
+
+ 0xFFB1E84: 2F80FFFF cmpi cr7,r0,-1
+ 0: GETL R0, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFFB1E88: 409EFFF0 bc 4,30,0xFFB1E78
+ 5: Jc30o $0xFFB1E78
+
+
+
+. 1393 FFB1E84 8
+. 2F 80 FF FF 40 9E FF F0
+==== BB 1394 (0xFFB1E8C) approx BBs exec'd 0 ====
+
+ 0xFFB1E8C: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFB1E90: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFFB1E94: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xFFB1E98: 7C0803A6 mtlr r0
+ 15: GETL R0, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFFB1E9C: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xFFB1EA0: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 1394 FFB1E8C 24
+. 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 1395 (0xFFB0D4C) approx BBs exec'd 0 ====
+
+ 0xFFB0D4C: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFB0D50: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xFFB0D54: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xFFB0D58: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 1395 FFB0D4C 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 1396 (0xEE34224) approx BBs exec'd 0 ====
+
+ 0xEE34224: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE34228: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE3422C: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xEE34230: 4800001D bl 0xEE3424C
+ 14: MOVL $0xEE34234, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xEE3424C ($4)
+
+
+
+. 1396 EE34224 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 48 00 00 1D
+==== BB 1397 (0xEE3424C) approx BBs exec'd 0 ====
+
+ 0xEE3424C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE34250: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE34254: 93C10008 stw r30,8(r1)
+ 9: GETL R30, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xEE34258: 90010014 stw r0,20(r1)
+ 14: GETL R0, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x14, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xEE3425C: 4801B075 bl 0xEE4F2D0
+ 19: MOVL $0xEE34260, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0xEE4F2D0 ($4)
+
+
+
+. 1397 EE3424C 20
+. 94 21 FF F0 7C 08 02 A6 93 C1 00 08 90 01 00 14 48 01 B0 75
+==== BB 1398 (0xEE4F2D0) approx BBs exec'd 0 ====
+
+ 0xEE4F2D0: 4E800021 blrl
+ 0: GETL LR, t0
+ 1: MOVL $0xEE4F2D4, t2
+ 2: PUTL t2, LR
+ 3: JMPo-r t0 ($4)
+
+
+
+. 1398 EE4F2D0 4
+. 4E 80 00 21
+==== BB 1399 (0xEE34260) approx BBs exec'd 0 ====
+
+ 0xEE34260: 7FC802A6 mflr r30
+ 0: GETL LR, t0
+ 1: PUTL t0, R30
+ 2: INCEIPL $4
+
+ 0xEE34264: 801E0638 lwz r0,1592(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x638, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xEE34268: 2F800000 cmpi cr7,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xEE3426C: 419E000C bc 12,30,0xEE34278
+ 12: Js30o $0xEE34278
+
+
+
+. 1399 EE34260 16
+. 7F C8 02 A6 80 1E 06 38 2F 80 00 00 41 9E 00 0C
+==== BB 1400 (0xEE34278) approx BBs exec'd 0 ====
+
+ 0xEE34278: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE3427C: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xEE34280: 83C10008 lwz r30,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0xEE34284: 38210010 addi r1,r1,16
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: PUTL t10, R1
+ 16: INCEIPL $4
+
+ 0xEE34288: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 1400 EE34278 20
+. 80 01 00 14 7C 08 03 A6 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 1401 (0xEE34234) approx BBs exec'd 0 ====
+
+ 0xEE34234: 48000115 bl 0xEE34348
+ 0: MOVL $0xEE34238, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xEE34348 ($4)
+
+
+
+. 1401 EE34234 4
+. 48 00 01 15
+==== BB 1402 (0xEE34348) approx BBs exec'd 0 ====
+
+ 0xEE34348: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE3434C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE34350: 429F0005 bcl 20,31,0xEE34354
+ 9: MOVL $0xEE34354, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xEE34354: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xEE34358: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xEE3435C: 90010014 stw r0,20(r1)
+ 20: GETL R0, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xEE34360: 801EFFF0 lwz r0,-16(r30)
+ 25: GETL R30, t18
+ 26: ADDL $0xFFFFFFF0, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R0
+ 29: INCEIPL $4
+
+ 0xEE34364: 7FC0F214 add r30,r0,r30
+ 30: GETL R0, t22
+ 31: GETL R30, t24
+ 32: ADDL t22, t24
+ 33: PUTL t24, R30
+ 34: INCEIPL $4
+
+ 0xEE34368: 807E8010 lwz r3,-32752(r30)
+ 35: GETL R30, t26
+ 36: ADDL $0xFFFF8010, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R3
+ 39: INCEIPL $4
+
+ 0xEE3436C: 80030000 lwz r0,0(r3)
+ 40: GETL R3, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R0
+ 43: INCEIPL $4
+
+ 0xEE34370: 2F800000 cmpi cr7,r0,0
+ 44: GETL R0, t34
+ 45: CMP0L t34, t36 (-rSo)
+ 46: ICRFL t36, $0x7, CR
+ 47: INCEIPL $4
+
+ 0xEE34374: 419E0018 bc 12,30,0xEE3438C
+ 48: Js30o $0xEE3438C
+
+
+
+. 1402 EE34348 48
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 90 01 00 14 80 1E FF F0 7F C0 F2 14 80 7E 80 10 80 03 00 00 2F 80 00 00 41 9E 00 18
+==== BB 1403 (0xEE3438C) approx BBs exec'd 0 ====
+
+ 0xEE3438C: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE34390: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xEE34394: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xEE34398: 7C0803A6 mtlr r0
+ 14: GETL R0, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xEE3439C: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 1403 EE3438C 20
+. 80 01 00 14 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 1404 (0xEE34238) approx BBs exec'd 0 ====
+
+ 0xEE34238: 48008E71 bl 0xEE3D0A8
+ 0: MOVL $0xEE3423C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xEE3D0A8 ($4)
+
+
+
+. 1404 EE34238 4
+. 48 00 8E 71
+==== BB 1405 (0xEE3D0A8) approx BBs exec'd 0 ====
+
+ 0xEE3D0A8: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE3D0AC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE3D0B0: 429F0005 bcl 20,31,0xEE3D0B4
+ 9: MOVL $0xEE3D0B4, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xEE3D0B4: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xEE3D0B8: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xEE3D0BC: 93E1000C stw r31,12(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xEE3D0C0: 90010014 stw r0,20(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xEE3D0C4: 801EFFF0 lwz r0,-16(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0xFFFFFFF0, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xEE3D0C8: 7FC0F214 add r30,r0,r30
+ 35: GETL R0, t26
+ 36: GETL R30, t28
+ 37: ADDL t26, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0xEE3D0CC: 813E8000 lwz r9,-32768(r30)
+ 40: GETL R30, t30
+ 41: ADDL $0xFFFF8000, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xEE3D0D0: 8009FFFC lwz r0,-4(r9)
+ 45: GETL R9, t34
+ 46: ADDL $0xFFFFFFFC, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R0
+ 49: INCEIPL $4
+
+ 0xEE3D0D4: 3BE9FFFC addi r31,r9,-4
+ 50: GETL R9, t38
+ 51: ADDL $0xFFFFFFFC, t38
+ 52: PUTL t38, R31
+ 53: INCEIPL $4
+
+ 0xEE3D0D8: 48000010 b 0xEE3D0E8
+ 54: JMPo $0xEE3D0E8 ($4)
+
+
+
+. 1405 EE3D0A8 52
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 80 09 FF FC 3B E9 FF FC 48 00 00 10
+==== BB 1406 (0xEE3D0E8) approx BBs exec'd 0 ====
+
+ 0xEE3D0E8: 2F80FFFF cmpi cr7,r0,-1
+ 0: GETL R0, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xEE3D0EC: 409EFFF0 bc 4,30,0xEE3D0DC
+ 5: Jc30o $0xEE3D0DC
+
+
+
+. 1406 EE3D0E8 8
+. 2F 80 FF FF 40 9E FF F0
+==== BB 1407 (0xEE3D0DC) approx BBs exec'd 0 ====
+
+ 0xEE3D0DC: 7C0803A6 mtlr r0
+ 0: GETL R0, t0
+ 1: PUTL t0, LR
+ 2: INCEIPL $4
+
+ 0xEE3D0E0: 4E800021 blrl
+ 3: GETL LR, t2
+ 4: MOVL $0xEE3D0E4, t4
+ 5: PUTL t4, LR
+ 6: JMPo-r t2 ($4)
+
+
+
+. 1407 EE3D0DC 8
+. 7C 08 03 A6 4E 80 00 21
+==== BB 1408 init_global_thread_specific_state(0xEE383D0) approx BBs exec'd 0 ====
+
+ 0xEE383D0: 9421FF80 stwu r1,-128(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF80, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE383D4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE383D8: 93A10074 stw r29,116(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x74, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xEE383DC: 93C10078 stw r30,120(r1)
+ 14: GETL R30, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x78, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xEE383E0: 90010084 stw r0,132(r1)
+ 19: GETL R0, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x84, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xEE383E4: 48016EED bl 0xEE4F2D0
+ 24: MOVL $0xEE383E8, t18
+ 25: PUTL t18, LR
+ 26: JMPo-c $0xEE4F2D0 ($4)
+
+
+
+. 1408 EE383D0 24
+. 94 21 FF 80 7C 08 02 A6 93 A1 00 74 93 C1 00 78 90 01 00 84 48 01 6E ED
+==== BB 1409 (0xEE383E8) approx BBs exec'd 0 ====
+
+ 0xEE383E8: 7FC802A6 mflr r30
+ 0: GETL LR, t0
+ 1: PUTL t0, R30
+ 2: INCEIPL $4
+
+ 0xEE383EC: 813E00A8 lwz r9,168(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0xA8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xEE383F0: 80090000 lwz r0,0(r9)
+ 8: GETL R9, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R0
+ 11: INCEIPL $4
+
+ 0xEE383F4: 2F800000 cmpi cr7,r0,0
+ 12: GETL R0, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0xEE383F8: 40BE0138 bc 5,30,0xEE38530
+ 16: Jc30o $0xEE38530
+
+
+
+. 1409 EE383E8 20
+. 7F C8 02 A6 81 3E 00 A8 80 09 00 00 2F 80 00 00 40 BE 01 38
+==== BB 1410 (0xEE383FC) approx BBs exec'd 0 ====
+
+ 0xEE383FC: 807E00AC lwz r3,172(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xAC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xEE38400: 4801760D bl 0xEE4FA0C
+ 5: MOVL $0xEE38404, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0xEE4FA0C ($4)
+
+
+
+. 1410 EE383FC 8
+. 80 7E 00 AC 48 01 76 0D
+==== BB 1411 (0xEE4FA0C) approx BBs exec'd 0 ====
+
+ 0xEE4FA0C: 39600008 li r11,8
+ 0: MOVL $0x8, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xEE4FA10: 4BFFFFC4 b 0xEE4F9D4
+ 3: JMPo $0xEE4F9D4 ($4)
+
+
+
+. 1411 EE4FA0C 8
+. 39 60 00 08 4B FF FF C4
+==== BB 1412 (0xEE4F9D4) approx BBs exec'd 0 ====
+
+ 0xEE4F9D4: 556C083C rlwinm r12,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0xEE4F9D8: 7D6C5A14 add r11,r12,r11
+ 4: GETL R12, t2
+ 5: GETL R11, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0xEE4F9DC: 3980AF5C li r12,-20644
+ 9: MOVL $0xFFFFAF5C, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0xEE4F9E0: 3D8C2548 addis r12,r12,9544
+ 12: MOVL $0x2547AF5C, t8
+ 13: PUTL t8, R12
+ 14: INCEIPL $4
+
+ 0xEE4F9E4: 7D8903A6 mtctr r12
+ 15: GETL R12, t10
+ 16: PUTL t10, CTR
+ 17: INCEIPL $4
+
+ 0xEE4F9E8: 39808880 li r12,-30592
+ 18: MOVL $0xFFFF8880, t12
+ 19: PUTL t12, R12
+ 20: INCEIPL $4
+
+ 0xEE4F9EC: 3D8C2547 addis r12,r12,9543
+ 21: MOVL $0x25468880, t14
+ 22: PUTL t14, R12
+ 23: INCEIPL $4
+
+ 0xEE4F9F0: 4E800420 bctr
+ 24: GETL CTR, t16
+ 25: JMPo t16 ($4)
+
+
+
+. 1412 EE4F9D4 32
+. 55 6C 08 3C 7D 6C 5A 14 39 80 AF 5C 3D 8C 25 48 7D 89 03 A6 39 80 88 80 3D 8C 25 47 4E 80 04 20
+==== BB 1413 _dl_runtime_resolve(0x2547AF5C) approx BBs exec'd 0 ====
+
+ 0x2547AF5C: 9421FFC0 stwu r1,-64(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFC0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547AF60: 9001000C stw r0,12(r1)
+ 6: GETL R0, t4
+ 7: GETL R1, t6
+ 8: ADDL $0xC, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x2547AF64: 90610010 stw r3,16(r1)
+ 11: GETL R3, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x10, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x2547AF68: 90810014 stw r4,20(r1)
+ 16: GETL R4, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x14, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x2547AF6C: 7D836378 or r3,r12,r12
+ 21: GETL R12, t16
+ 22: PUTL t16, R3
+ 23: INCEIPL $4
+
+ 0x2547AF70: 90A10018 stw r5,24(r1)
+ 24: GETL R5, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x18, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x2547AF74: 7D645B78 or r4,r11,r11
+ 29: GETL R11, t22
+ 30: PUTL t22, R4
+ 31: INCEIPL $4
+
+ 0x2547AF78: 90C1001C stw r6,28(r1)
+ 32: GETL R6, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x1C, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x2547AF7C: 7C0802A6 mflr r0
+ 37: GETL LR, t28
+ 38: PUTL t28, R0
+ 39: INCEIPL $4
+
+ 0x2547AF80: 90E10020 stw r7,32(r1)
+ 40: GETL R7, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x20, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x2547AF84: 90010030 stw r0,48(r1)
+ 45: GETL R0, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x30, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0x2547AF88: 91010024 stw r8,36(r1)
+ 50: GETL R8, t38
+ 51: GETL R1, t40
+ 52: ADDL $0x24, t40
+ 53: STL t38, (t40)
+ 54: INCEIPL $4
+
+ 0x2547AF8C: 7C000026 mfcr r0
+ 55: GETL CR, t42
+ 56: PUTL t42, R0
+ 57: INCEIPL $4
+
+ 0x2547AF90: 91210028 stw r9,40(r1)
+ 58: GETL R9, t44
+ 59: GETL R1, t46
+ 60: ADDL $0x28, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x2547AF94: 9141002C stw r10,44(r1)
+ 63: GETL R10, t48
+ 64: GETL R1, t50
+ 65: ADDL $0x2C, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x2547AF98: 90010008 stw r0,8(r1)
+ 68: GETL R0, t52
+ 69: GETL R1, t54
+ 70: ADDL $0x8, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0x2547AF9C: 480000C9 bl 0x2547B064
+ 73: MOVL $0x2547AFA0, t56
+ 74: PUTL t56, LR
+ 75: JMPo-c $0x2547B064 ($4)
+
+
+
+. 1413 2547AF5C 68
+. 94 21 FF C0 90 01 00 0C 90 61 00 10 90 81 00 14 7D 83 63 78 90 A1 00 18 7D 64 5B 78 90 C1 00 1C 7C 08 02 A6 90 E1 00 20 90 01 00 30 91 01 00 24 7C 00 00 26 91 21 00 28 91 41 00 2C 90 01 00 08 48 00 00 C9
+==== BB 1414 fixup(0x2547B064) approx BBs exec'd 0 ====
+
+ 0x2547B064: 7CE802A6 mflr r7
+ 0: GETL LR, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x2547B068: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547B06C: 93810010 stw r28,16(r1)
+ 9: GETL R28, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547B070: 4801BF91 bl 0x25497000
+ 14: MOVL $0x2547B074, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x25497000 ($4)
+
+
+
+. 1414 2547B064 16
+. 7C E8 02 A6 94 21 FF E0 93 81 00 10 48 01 BF 91
+==== BB 1415 (0x2547B074) approx BBs exec'd 0 ====
+
+ 0x2547B074: 93A10014 stw r29,20(r1)
+ 0: GETL R29, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547B078: 90E10024 stw r7,36(r1)
+ 5: GETL R7, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x24, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547B07C: 80C3007C lwz r6,124(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x7C, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R6
+ 14: INCEIPL $4
+
+ 0x2547B080: 93C10018 stw r30,24(r1)
+ 15: GETL R30, t12
+ 16: GETL R1, t14
+ 17: ADDL $0x18, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x2547B084: 7FC802A6 mflr r30
+ 20: GETL LR, t16
+ 21: PUTL t16, R30
+ 22: INCEIPL $4
+
+ 0x2547B088: 93E1001C stw r31,28(r1)
+ 23: GETL R31, t18
+ 24: GETL R1, t20
+ 25: ADDL $0x1C, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0x2547B08C: 7C7F1B78 or r31,r3,r3
+ 28: GETL R3, t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0x2547B090: 81460004 lwz r10,4(r6)
+ 31: GETL R6, t24
+ 32: ADDL $0x4, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R10
+ 35: INCEIPL $4
+
+ 0x2547B094: 80A30038 lwz r5,56(r3)
+ 36: GETL R3, t28
+ 37: ADDL $0x38, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R5
+ 40: INCEIPL $4
+
+ 0x2547B098: 7FAA2214 add r29,r10,r4
+ 41: GETL R10, t32
+ 42: GETL R4, t34
+ 43: ADDL t32, t34
+ 44: PUTL t34, R29
+ 45: INCEIPL $4
+
+ 0x2547B09C: 7D6A202E lwzx r11,r10,r4
+ 46: GETL R4, t36
+ 47: GETL R10, t38
+ 48: ADDL t38, t36
+ 49: LDL (t36), t40
+ 50: PUTL t40, R11
+ 51: INCEIPL $4
+
+ 0x2547B0A0: 807D0004 lwz r3,4(r29)
+ 52: GETL R29, t42
+ 53: ADDL $0x4, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R3
+ 56: INCEIPL $4
+
+ 0x2547B0A4: 81850004 lwz r12,4(r5)
+ 57: GETL R5, t46
+ 58: ADDL $0x4, t46
+ 59: LDL (t46), t48
+ 60: PUTL t48, R12
+ 61: INCEIPL $4
+
+ 0x2547B0A8: 5466C23E rlwinm r6,r3,24,8,31
+ 62: GETL R3, t50
+ 63: SHRL $0x8, t50
+ 64: PUTL t50, R6
+ 65: INCEIPL $4
+
+ 0x2547B0AC: 807F0000 lwz r3,0(r31)
+ 66: GETL R31, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R3
+ 69: INCEIPL $4
+
+ 0x2547B0B0: 54C52036 rlwinm r5,r6,4,0,27
+ 70: GETL R6, t56
+ 71: SHLL $0x4, t56
+ 72: PUTL t56, R5
+ 73: INCEIPL $4
+
+ 0x2547B0B4: 7D056214 add r8,r5,r12
+ 74: GETL R5, t58
+ 75: GETL R12, t60
+ 76: ADDL t58, t60
+ 77: PUTL t60, R8
+ 78: INCEIPL $4
+
+ 0x2547B0B8: 7F835A14 add r28,r3,r11
+ 79: GETL R3, t62
+ 80: GETL R11, t64
+ 81: ADDL t62, t64
+ 82: PUTL t64, R28
+ 83: INCEIPL $4
+
+ 0x2547B0BC: 8808000D lbz r0,13(r8)
+ 84: GETL R8, t66
+ 85: ADDL $0xD, t66
+ 86: LDB (t66), t68
+ 87: PUTL t68, R0
+ 88: INCEIPL $4
+
+ 0x2547B0C0: 70090003 andi. r9,r0,0x3
+ 89: GETL R0, t70
+ 90: ANDL $0x3, t70
+ 91: PUTL t70, R9
+ 92: CMP0L t70, t72 (-rSo)
+ 93: ICRFL t72, $0x0, CR
+ 94: INCEIPL $4
+
+ 0x2547B0C4: 813F0034 lwz r9,52(r31)
+ 95: GETL R31, t74
+ 96: ADDL $0x34, t74
+ 97: LDL (t74), t76
+ 98: PUTL t76, R9
+ 99: INCEIPL $4
+
+ 0x2547B0C8: 80890004 lwz r4,4(r9)
+ 100: GETL R9, t78
+ 101: ADDL $0x4, t78
+ 102: LDL (t78), t80
+ 103: PUTL t80, R4
+ 104: INCEIPL $4
+
+ 0x2547B0CC: 91010008 stw r8,8(r1)
+ 105: GETL R8, t82
+ 106: GETL R1, t84
+ 107: ADDL $0x8, t84
+ 108: STL t82, (t84)
+ 109: INCEIPL $4
+
+ 0x2547B0D0: 408200E0 bc 4,2,0x2547B1B0
+ 110: Jc02o $0x2547B1B0
+
+
+
+. 1415 2547B074 96
+. 93 A1 00 14 90 E1 00 24 80 C3 00 7C 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 7C 7F 1B 78 81 46 00 04 80 A3 00 38 7F AA 22 14 7D 6A 20 2E 80 7D 00 04 81 85 00 04 54 66 C2 3E 80 7F 00 00 54 C5 20 36 7D 05 62 14 7F 83 5A 14 88 08 00 0D 70 09 00 03 81 3F 00 34 80 89 00 04 91 01 00 08 40 82 00 E0
+==== BB 1416 (0x2547B0D4) approx BBs exec'd 0 ====
+
+ 0x2547B0D4: 815F00E4 lwz r10,228(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xE4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547B0D8: 38E00000 li r7,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x2547B0DC: 2F8A0000 cmpi cr7,r10,0
+ 8: GETL R10, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x2547B0E0: 409E009C bc 4,30,0x2547B17C
+ 12: Jc30o $0x2547B17C
+
+
+
+. 1416 2547B0D4 16
+. 81 5F 00 E4 38 E0 00 00 2F 8A 00 00 40 9E 00 9C
+==== BB 1417 (0x2547B17C) approx BBs exec'd 0 ====
+
+ 0x2547B17C: 816A0004 lwz r11,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547B180: 54C9083C rlwinm r9,r6,1,0,30
+ 5: GETL R6, t4
+ 6: SHLL $0x1, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x2547B184: 80DF0188 lwz r6,392(r31)
+ 9: GETL R31, t6
+ 10: ADDL $0x188, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R6
+ 13: INCEIPL $4
+
+ 0x2547B188: 7D095A2E lhzx r8,r9,r11
+ 14: GETL R11, t10
+ 15: GETL R9, t12
+ 16: ADDL t12, t10
+ 17: LDW (t10), t14
+ 18: PUTL t14, R8
+ 19: INCEIPL $4
+
+ 0x2547B18C: 55072376 rlwinm r7,r8,4,13,27
+ 20: GETL R8, t16
+ 21: ROLL $0x4, t16
+ 22: ANDL $0x7FFF0, t16
+ 23: PUTL t16, R7
+ 24: INCEIPL $4
+
+ 0x2547B190: 7D663A14 add r11,r6,r7
+ 25: GETL R6, t18
+ 26: GETL R7, t20
+ 27: ADDL t18, t20
+ 28: PUTL t20, R11
+ 29: INCEIPL $4
+
+ 0x2547B194: 806B0004 lwz r3,4(r11)
+ 30: GETL R11, t22
+ 31: ADDL $0x4, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R3
+ 34: INCEIPL $4
+
+ 0x2547B198: 7C6AFE70 srawi r10,r3,31
+ 35: GETL R3, t26
+ 36: SARL $0x1F, t26 (-wCa)
+ 37: PUTL t26, R10
+ 38: INCEIPL $4
+
+ 0x2547B19C: 7D401A78 xor r0,r10,r3
+ 39: GETL R10, t28
+ 40: GETL R3, t30
+ 41: XORL t28, t30
+ 42: PUTL t30, R0
+ 43: INCEIPL $4
+
+ 0x2547B1A0: 7D205050 subf r9,r0,r10
+ 44: GETL R0, t32
+ 45: GETL R10, t34
+ 46: SUBL t32, t34
+ 47: PUTL t34, R9
+ 48: INCEIPL $4
+
+ 0x2547B1A4: 7D28FE70 srawi r8,r9,31
+ 49: GETL R9, t36
+ 50: SARL $0x1F, t36 (-wCa)
+ 51: PUTL t36, R8
+ 52: INCEIPL $4
+
+ 0x2547B1A8: 7D674038 and r7,r11,r8
+ 53: GETL R11, t38
+ 54: GETL R8, t40
+ 55: ANDL t38, t40
+ 56: PUTL t40, R7
+ 57: INCEIPL $4
+
+ 0x2547B1AC: 4BFFFF38 b 0x2547B0E4
+ 58: JMPo $0x2547B0E4 ($4)
+
+
+
+. 1417 2547B17C 52
+. 81 6A 00 04 54 C9 08 3C 80 DF 01 88 7D 09 5A 2E 55 07 23 76 7D 66 3A 14 80 6B 00 04 7C 6A FE 70 7D 40 1A 78 7D 20 50 50 7D 28 FE 70 7D 67 40 38 4B FF FF 38
+==== BB 1418 (0x2547B0E4) approx BBs exec'd 0 ====
+
+ 0x2547B0E4: 7C05602E lwzx r0,r5,r12
+ 0: GETL R12, t0
+ 1: GETL R5, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R0
+ 5: INCEIPL $4
+
+ 0x2547B0E8: 39400000 li r10,0
+ 6: MOVL $0x0, t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0x2547B0EC: 80DF01C0 lwz r6,448(r31)
+ 9: GETL R31, t8
+ 10: ADDL $0x1C0, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R6
+ 13: INCEIPL $4
+
+ 0x2547B0F0: 38A10008 addi r5,r1,8
+ 14: GETL R1, t12
+ 15: ADDL $0x8, t12
+ 16: PUTL t12, R5
+ 17: INCEIPL $4
+
+ 0x2547B0F4: 7C602214 add r3,r0,r4
+ 18: GETL R0, t14
+ 19: GETL R4, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R3
+ 22: INCEIPL $4
+
+ 0x2547B0F8: 39000001 li r8,1
+ 23: MOVL $0x1, t18
+ 24: PUTL t18, R8
+ 25: INCEIPL $4
+
+ 0x2547B0FC: 7FE4FB78 or r4,r31,r31
+ 26: GETL R31, t20
+ 27: PUTL t20, R4
+ 28: INCEIPL $4
+
+ 0x2547B100: 39200001 li r9,1
+ 29: MOVL $0x1, t22
+ 30: PUTL t22, R9
+ 31: INCEIPL $4
+
+ 0x2547B104: 4BFFD4A1 bl 0x254785A4
+ 32: MOVL $0x2547B108, t24
+ 33: PUTL t24, LR
+ 34: JMPo-c $0x254785A4 ($4)
+
+
+
+. 1418 2547B0E4 36
+. 7C 05 60 2E 39 40 00 00 80 DF 01 C0 38 A1 00 08 7C 60 22 14 39 00 00 01 7F E4 FB 78 39 20 00 01 4B FF D4 A1
+==== BB 1419 (0x2547B108) approx BBs exec'd 0 ====
+
+ 0x2547B108: 39400000 li r10,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x2547B10C: 81610008 lwz r11,8(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x2547B110: 2C8B0000 cmpi cr1,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x2547B114: 41860018 bc 12,6,0x2547B12C
+ 12: Js06o $0x2547B12C
+
+
+
+. 1419 2547B108 16
+. 39 40 00 00 81 61 00 08 2C 8B 00 00 41 86 00 18
+==== BB 1420 (0x2547B118) approx BBs exec'd 0 ====
+
+ 0x2547B118: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547B11C: 419A00A0 bc 12,26,0x2547B1BC
+ 4: Js26o $0x2547B1BC
+
+
+
+. 1420 2547B118 8
+. 2F 03 00 00 41 9A 00 A0
+==== BB 1421 (0x2547B120) approx BBs exec'd 0 ====
+
+ 0x2547B120: 81830000 lwz r12,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R12
+ 3: INCEIPL $4
+
+ 0x2547B124: 808B0004 lwz r4,4(r11)
+ 4: GETL R11, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x2547B128: 7D4C2214 add r10,r12,r4
+ 9: GETL R12, t8
+ 10: GETL R4, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R10
+ 13: INCEIPL $4
+
+ 0x2547B12C: 80FE04F4 lwz r7,1268(r30)
+ 14: GETL R30, t12
+ 15: ADDL $0x4F4, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R7
+ 18: INCEIPL $4
+
+ 0x2547B130: 80DD0008 lwz r6,8(r29)
+ 19: GETL R29, t16
+ 20: ADDL $0x8, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R6
+ 23: INCEIPL $4
+
+ 0x2547B134: 8067002C lwz r3,44(r7)
+ 24: GETL R7, t20
+ 25: ADDL $0x2C, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R3
+ 28: INCEIPL $4
+
+ 0x2547B138: 7D665214 add r11,r6,r10
+ 29: GETL R6, t24
+ 30: GETL R10, t26
+ 31: ADDL t24, t26
+ 32: PUTL t26, R11
+ 33: INCEIPL $4
+
+ 0x2547B13C: 2C030000 cmpi cr0,r3,0
+ 34: GETL R3, t28
+ 35: CMP0L t28, t30 (-rSo)
+ 36: ICRFL t30, $0x0, CR
+ 37: INCEIPL $4
+
+ 0x2547B140: 7D635B78 or r3,r11,r11
+ 38: GETL R11, t32
+ 39: PUTL t32, R3
+ 40: INCEIPL $4
+
+ 0x2547B144: 40820018 bc 4,2,0x2547B15C
+ 41: Jc02o $0x2547B15C
+
+
+
+. 1421 2547B120 40
+. 81 83 00 00 80 8B 00 04 7D 4C 22 14 80 FE 04 F4 80 DD 00 08 80 67 00 2C 7D 66 52 14 2C 03 00 00 7D 63 5B 78 40 82 00 18
+==== BB 1422 (0x2547B148) approx BBs exec'd 0 ====
+
+ 0x2547B148: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547B14C: 7FA4EB78 or r4,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x2547B150: 7F85E378 or r5,r28,r28
+ 6: GETL R28, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547B154: 7D665B78 or r6,r11,r11
+ 9: GETL R11, t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0x2547B158: 4800540D bl 0x25480564
+ 12: MOVL $0x2547B15C, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25480564 ($4)
+
+
+
+. 1422 2547B148 20
+. 7F E3 FB 78 7F A4 EB 78 7F 85 E3 78 7D 66 5B 78 48 00 54 0D
+==== BB 1423 __elf_machine_fixup_plt(0x25480564) approx BBs exec'd 0 ====
+
+ 0x25480564: 7D453050 subf r10,r5,r6
+ 0: GETL R5, t0
+ 1: GETL R6, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25480568: 3D06FE00 addis r8,r6,-512
+ 5: GETL R6, t4
+ 6: ADDL $0xFE000000, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x2548056C: 554C3032 rlwinm r12,r10,6,0,25
+ 9: GETL R10, t6
+ 10: SHLL $0x6, t6
+ 11: PUTL t6, R12
+ 12: INCEIPL $4
+
+ 0x25480570: 3CE0FC00 lis r7,-1024
+ 13: MOVL $0xFC000000, t8
+ 14: PUTL t8, R7
+ 15: INCEIPL $4
+
+ 0x25480574: 7D843670 srawi r4,r12,6
+ 16: GETL R12, t10
+ 17: SARL $0x6, t10 (-wCa)
+ 18: PUTL t10, R4
+ 19: INCEIPL $4
+
+ 0x25480578: 39280003 addi r9,r8,3
+ 20: GETL R8, t12
+ 21: ADDL $0x3, t12
+ 22: PUTL t12, R9
+ 23: INCEIPL $4
+
+ 0x2548057C: 7F845000 cmp cr7,r4,r10
+ 24: GETL R4, t14
+ 25: GETL R10, t16
+ 26: CMPL t14, t16, t18 (-rSo)
+ 27: ICRFL t18, $0x7, CR
+ 28: INCEIPL $4
+
+ 0x25480580: 60E00002 ori r0,r7,0x2
+ 29: MOVL $0xFC000002, t20
+ 30: PUTL t20, R0
+ 31: INCEIPL $4
+
+ 0x25480584: 548B01BA rlwinm r11,r4,0,6,29
+ 32: GETL R4, t22
+ 33: ANDL $0x3FFFFFC, t22
+ 34: PUTL t22, R11
+ 35: INCEIPL $4
+
+ 0x25480588: 9421FFF0 stwu r1,-16(r1)
+ 36: GETL R1, t24
+ 37: GETL R1, t26
+ 38: ADDL $0xFFFFFFF0, t26
+ 39: PUTL t26, R1
+ 40: STL t24, (t26)
+ 41: INCEIPL $4
+
+ 0x2548058C: 7F090040 cmpl cr6,r9,r0
+ 42: GETL R9, t28
+ 43: GETL R0, t30
+ 44: CMPUL t28, t30, t32 (-rSo)
+ 45: ICRFL t32, $0x6, CR
+ 46: INCEIPL $4
+
+ 0x25480590: 656B4800 oris r11,r11,0x4800
+ 47: GETL R11, t34
+ 48: ORL $0x48000000, t34
+ 49: PUTL t34, R11
+ 50: INCEIPL $4
+
+ 0x25480594: 419E00EC bc 12,30,0x25480680
+ 51: Js30o $0x25480680
+
+
+
+. 1423 25480564 52
+. 7D 45 30 50 3D 06 FE 00 55 4C 30 32 3C E0 FC 00 7D 84 36 70 39 28 00 03 7F 84 50 00 60 E0 00 02 54 8B 01 BA 94 21 FF F0 7F 09 00 40 65 6B 48 00 41 9E 00 EC
+==== BB 1424 (0x25480680) approx BBs exec'd 0 ====
+
+ 0x25480680: 91650000 stw r11,0(r5)
+ 0: GETL R11, t0
+ 1: GETL R5, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25480684: 7C00286C dcbst r0,r5
+ 4: INCEIPL $4
+
+ 0x25480688: 7C0004AC sync
+ 5: INCEIPL $4
+
+ 0x2548068C: 7C002FAC icbi r0,r5
+ 6: GETL R5, t4
+ 7: CALLM_So
+ 8: PUSHL t4
+ 9: CALLMo $0x68
+ 10: CALLM_Eo
+ 11: INCEIPL $4
+
+ 0x25480690: 7C0004AC sync
+ 12: INCEIPL $4
+
+ 0x25480694: 4C00012C 13: INCEIPL $4
+
+ 0x25480698: 7CC33378 or r3,r6,r6
+ 14: GETL R6, t6
+ 15: PUTL t6, R3
+ 16: INCEIPL $4
+
+ 0x2548069C: 38210010 addi r1,r1,16
+ 17: GETL R1, t8
+ 18: ADDL $0x10, t8
+ 19: PUTL t8, R1
+ 20: INCEIPL $4
+
+ 0x254806A0: 4E800020 blr
+ 21: GETL LR, t10
+ 22: JMPo-r t10 ($4)
+
+
+
+. 1424 25480680 36
+. 91 65 00 00 7C 00 28 6C 7C 00 04 AC 7C 00 2F AC 7C 00 04 AC 4C 00 01 2C 7C C3 33 78 38 21 00 10 4E 80 00 20
+==== BB 1425 (0x2547B15C) approx BBs exec'd 0 ====
+
+ 0x2547B15C: 83810024 lwz r28,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x2547B160: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547B164: 7F8803A6 mtlr r28
+ 10: GETL R28, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0x2547B168: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0x2547B16C: 83810010 lwz r28,16(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R28
+ 22: INCEIPL $4
+
+ 0x2547B170: 83E1001C lwz r31,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R31
+ 27: INCEIPL $4
+
+ 0x2547B174: 38210020 addi r1,r1,32
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: PUTL t22, R1
+ 31: INCEIPL $4
+
+ 0x2547B178: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+
+. 1425 2547B15C 32
+. 83 81 00 24 83 A1 00 14 7F 88 03 A6 83 C1 00 18 83 81 00 10 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1426 (0x2547AFA0) approx BBs exec'd 0 ====
+
+ 0x2547AFA0: 7C6903A6 mtctr r3
+ 0: GETL R3, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x2547AFA4: 80010030 lwz r0,48(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x30, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x2547AFA8: 8141002C lwz r10,44(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x2C, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x2547AFAC: 81210028 lwz r9,40(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x28, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x2547AFB0: 7C0803A6 mtlr r0
+ 18: GETL R0, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547AFB4: 81010024 lwz r8,36(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x24, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R8
+ 25: INCEIPL $4
+
+ 0x2547AFB8: 80010008 lwz r0,8(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x8, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R0
+ 30: INCEIPL $4
+
+ 0x2547AFBC: 80E10020 lwz r7,32(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R7
+ 35: INCEIPL $4
+
+ 0x2547AFC0: 80C1001C lwz r6,28(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R6
+ 40: INCEIPL $4
+
+ 0x2547AFC4: 7C0FF120 mtcr r0
+ 41: GETL R0, t32
+ 42: PUTL t32, CR
+ 43: INCEIPL $4
+
+ 0x2547AFC8: 80A10018 lwz r5,24(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x18, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R5
+ 48: INCEIPL $4
+
+ 0x2547AFCC: 80810014 lwz r4,20(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x14, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R4
+ 53: INCEIPL $4
+
+ 0x2547AFD0: 80610010 lwz r3,16(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x10, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R3
+ 58: INCEIPL $4
+
+ 0x2547AFD4: 8001000C lwz r0,12(r1)
+ 59: GETL R1, t46
+ 60: ADDL $0xC, t46
+ 61: LDL (t46), t48
+ 62: PUTL t48, R0
+ 63: INCEIPL $4
+
+ 0x2547AFD8: 38210040 addi r1,r1,64
+ 64: GETL R1, t50
+ 65: ADDL $0x40, t50
+ 66: PUTL t50, R1
+ 67: INCEIPL $4
+
+ 0x2547AFDC: 4E800420 bctr
+ 68: GETL CTR, t52
+ 69: JMPo t52 ($4)
+
+
+
+. 1426 2547AFA0 64
+. 7C 69 03 A6 80 01 00 30 81 41 00 2C 81 21 00 28 7C 08 03 A6 81 01 00 24 80 01 00 08 80 E1 00 20 80 C1 00 1C 7C 0F F1 20 80 A1 00 18 80 81 00 14 80 61 00 10 80 01 00 0C 38 21 00 40 4E 80 04 20
+==== BB 1427 pthread_mutex_lock(0xEE367D4) approx BBs exec'd 0 ====
+
+ 0xEE367D4: 9421FFC0 stwu r1,-64(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFC0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE367D8: 39200000 li r9,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0xEE367DC: 3800300C li r0,12300
+ 9: MOVL $0x300C, t6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0xEE367E0: 90010010 stw r0,16(r1)
+ 12: GETL R0, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xEE367E4: 90610014 stw r3,20(r1)
+ 17: GETL R3, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xEE367E8: 91210018 stw r9,24(r1)
+ 22: GETL R9, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x18, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0xEE367EC: 9121001C stw r9,28(r1)
+ 27: GETL R9, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x1C, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xEE367F0: 91210020 stw r9,32(r1)
+ 32: GETL R9, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x20, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xEE367F4: 38610010 addi r3,r1,16
+ 37: GETL R1, t28
+ 38: ADDL $0x10, t28
+ 39: PUTL t28, R3
+ 40: INCEIPL $4
+
+ 0xEE367F8: 7C03D808 client_request
+ 41: JMPo-cli $0xEE367FC ($4)
+
+
+
+. 1427 EE367D4 40
+. 94 21 FF C0 39 20 00 00 38 00 30 0C 90 01 00 10 90 61 00 14 91 21 00 18 91 21 00 1C 91 21 00 20 38 61 00 10 7C 03 D8 08
+==== BB 1428 (0xEE367FC) approx BBs exec'd 0 ====
+
+ 0xEE367FC: 38210040 addi r1,r1,64
+ 0: GETL R1, t0
+ 1: ADDL $0x40, t0
+ 2: PUTL t0, R1
+ 3: INCEIPL $4
+
+ 0xEE36800: 4E800020 blr
+ 4: GETL LR, t2
+ 5: JMPo-r t2 ($4)
+
+
+
+. 1428 EE367FC 8
+. 38 21 00 40 4E 80 00 20
+==== BB 1429 (0xEE38404) approx BBs exec'd 0 ====
+
+ 0xEE38404: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xEE38408: 41BE000C bc 13,30,0xEE38414
+ 4: Js30o $0xEE38414
+
+
+
+. 1429 EE38404 8
+. 2F 83 00 00 41 BE 00 0C
+==== BB 1430 (0xEE38414) approx BBs exec'd 0 ====
+
+ 0xEE38414: 813E00A8 lwz r9,168(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xA8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xEE38418: 80090000 lwz r0,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0xEE3841C: 2F800000 cmpi cr7,r0,0
+ 9: GETL R0, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xEE38420: 41BE001C bc 13,30,0xEE3843C
+ 13: Js30o $0xEE3843C
+
+
+
+. 1430 EE38414 16
+. 81 3E 00 A8 80 09 00 00 2F 80 00 00 41 BE 00 1C
+==== BB 1431 (0xEE3843C) approx BBs exec'd 0 ====
+
+ 0xEE3843C: 38001001 li r0,4097
+ 0: MOVL $0x1001, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xEE38440: 90010010 stw r0,16(r1)
+ 3: GETL R0, t2
+ 4: GETL R1, t4
+ 5: ADDL $0x10, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xEE38444: 38000000 li r0,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0xEE38448: 90010014 stw r0,20(r1)
+ 11: GETL R0, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x14, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xEE3844C: 90010018 stw r0,24(r1)
+ 16: GETL R0, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x18, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xEE38450: 9001001C stw r0,28(r1)
+ 21: GETL R0, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xEE38454: 90010020 stw r0,32(r1)
+ 26: GETL R0, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x20, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xEE38458: 38610010 addi r3,r1,16
+ 31: GETL R1, t24
+ 32: ADDL $0x10, t24
+ 33: PUTL t24, R3
+ 34: INCEIPL $4
+
+ 0xEE3845C: 7C03D808 client_request
+ 35: JMPo-cli $0xEE38460 ($4)
+
+
+
+. 1431 EE3843C 36
+. 38 00 10 01 90 01 00 10 38 00 00 00 90 01 00 14 90 01 00 18 90 01 00 1C 90 01 00 20 38 61 00 10 7C 03 D8 08
+==== BB 1432 (0xEE38460) approx BBs exec'd 0 ====
+
+ 0xEE38460: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xEE38464: 40BE0040 bc 5,30,0xEE384A4
+ 4: Jc30o $0xEE384A4
+
+
+
+. 1432 EE38460 8
+. 2F 83 00 00 40 BE 00 40
+==== BB 1433 (0xEE384A4) approx BBs exec'd 0 ====
+
+ 0xEE384A4: 3800300B li r0,12299
+ 0: MOVL $0x300B, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xEE384A8: 90010010 stw r0,16(r1)
+ 3: GETL R0, t2
+ 4: GETL R1, t4
+ 5: ADDL $0x10, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xEE384AC: 38000000 li r0,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0xEE384B0: 90010014 stw r0,20(r1)
+ 11: GETL R0, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x14, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xEE384B4: 90010018 stw r0,24(r1)
+ 16: GETL R0, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x18, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xEE384B8: 9001001C stw r0,28(r1)
+ 21: GETL R0, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xEE384BC: 90010020 stw r0,32(r1)
+ 26: GETL R0, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x20, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xEE384C0: 38610010 addi r3,r1,16
+ 31: GETL R1, t24
+ 32: ADDL $0x10, t24
+ 33: PUTL t24, R3
+ 34: INCEIPL $4
+
+ 0xEE384C4: 7C03D808 client_request
+ 35: JMPo-cli $0xEE384C8 ($4)
+
+
+
+. 1433 EE384A4 36
+. 38 00 30 0B 90 01 00 10 38 00 00 00 90 01 00 14 90 01 00 18 90 01 00 1C 90 01 00 20 38 61 00 10 7C 03 D8 08
+==== BB 1434 (0xEE384C8) approx BBs exec'd 0 ====
+
+ 0xEE384C8: 3803FFFF addi r0,r3,-1
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0xEE384CC: 2B800062 cmpli cr7,r0,98
+ 4: GETL R0, t2
+ 5: MOVL $0x62, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xEE384D0: 40BD000C bc 5,29,0xEE384DC
+ 9: Jc29o $0xEE384DC
+
+
+
+. 1434 EE384C8 12
+. 38 03 FF FF 2B 80 00 62 40 BD 00 0C
+==== BB 1435 (0xEE384DC) approx BBs exec'd 0 ====
+
+ 0xEE384DC: 2F830001 cmpi cr7,r3,1
+ 0: GETL R3, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xEE384E0: 419E0018 bc 12,30,0xEE384F8
+ 5: Js30o $0xEE384F8
+
+
+
+. 1435 EE384DC 8
+. 2F 83 00 01 41 9E 00 18
+==== BB 1436 (0xEE384F8) approx BBs exec'd 0 ====
+
+ 0xEE384F8: 38000001 li r0,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xEE384FC: 813E00A8 lwz r9,168(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0xA8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xEE38500: 90090000 stw r0,0(r9)
+ 8: GETL R0, t6
+ 9: GETL R9, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xEE38504: 48000045 bl 0xEE38548
+ 12: MOVL $0xEE38508, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0xEE38548 ($4)
+
+
+
+. 1436 EE384F8 16
+. 38 00 00 01 81 3E 00 A8 90 09 00 00 48 00 00 45
+==== BB 1437 init_thread_specific_state(0xEE38548) approx BBs exec'd 0 ====
+
+ 0xEE38548: 9421FF80 stwu r1,-128(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF80, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE3854C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE38550: 93A10074 stw r29,116(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x74, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xEE38554: 93C10078 stw r30,120(r1)
+ 14: GETL R30, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x78, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xEE38558: 90010084 stw r0,132(r1)
+ 19: GETL R0, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x84, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xEE3855C: 48016D75 bl 0xEE4F2D0
+ 24: MOVL $0xEE38560, t18
+ 25: PUTL t18, LR
+ 26: JMPo-c $0xEE4F2D0 ($4)
+
+
+
+. 1437 EE38548 24
+. 94 21 FF 80 7C 08 02 A6 93 A1 00 74 93 C1 00 78 90 01 00 84 48 01 6D 75
+==== BB 1438 (0xEE38560) approx BBs exec'd 0 ====
+
+ 0xEE38560: 7FC802A6 mflr r30
+ 0: GETL LR, t0
+ 1: PUTL t0, R30
+ 2: INCEIPL $4
+
+ 0xEE38564: 38001001 li r0,4097
+ 3: MOVL $0x1001, t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xEE38568: 90010010 stw r0,16(r1)
+ 6: GETL R0, t4
+ 7: GETL R1, t6
+ 8: ADDL $0x10, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0xEE3856C: 38000000 li r0,0
+ 11: MOVL $0x0, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0xEE38570: 90010014 stw r0,20(r1)
+ 14: GETL R0, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x14, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xEE38574: 90010018 stw r0,24(r1)
+ 19: GETL R0, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x18, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xEE38578: 9001001C stw r0,28(r1)
+ 24: GETL R0, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x1C, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xEE3857C: 90010020 stw r0,32(r1)
+ 29: GETL R0, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x20, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xEE38580: 38610010 addi r3,r1,16
+ 34: GETL R1, t26
+ 35: ADDL $0x10, t26
+ 36: PUTL t26, R3
+ 37: INCEIPL $4
+
+ 0xEE38584: 7C03D808 client_request
+ 38: JMPo-cli $0xEE38588 ($4)
+
+
+
+. 1438 EE38560 40
+. 7F C8 02 A6 38 00 10 01 90 01 00 10 38 00 00 00 90 01 00 14 90 01 00 18 90 01 00 1C 90 01 00 20 38 61 00 10 7C 03 D8 08
+==== BB 1439 (0xEE38588) approx BBs exec'd 0 ====
+
+ 0xEE38588: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xEE3858C: 40BE0040 bc 5,30,0xEE385CC
+ 4: Jc30o $0xEE385CC
+
+
+
+. 1439 EE38588 8
+. 2F 83 00 00 40 BE 00 40
+==== BB 1440 (0xEE385CC) approx BBs exec'd 0 ====
+
+ 0xEE385CC: 3800300B li r0,12299
+ 0: MOVL $0x300B, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xEE385D0: 90010010 stw r0,16(r1)
+ 3: GETL R0, t2
+ 4: GETL R1, t4
+ 5: ADDL $0x10, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xEE385D4: 38000000 li r0,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0xEE385D8: 90010014 stw r0,20(r1)
+ 11: GETL R0, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x14, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xEE385DC: 90010018 stw r0,24(r1)
+ 16: GETL R0, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x18, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xEE385E0: 9001001C stw r0,28(r1)
+ 21: GETL R0, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xEE385E4: 90010020 stw r0,32(r1)
+ 26: GETL R0, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x20, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xEE385E8: 38610010 addi r3,r1,16
+ 31: GETL R1, t24
+ 32: ADDL $0x10, t24
+ 33: PUTL t24, R3
+ 34: INCEIPL $4
+
+ 0xEE385EC: 7C03D808 client_request
+ 35: JMPo-cli $0xEE385F0 ($4)
+
+
+
+. 1440 EE385CC 36
+. 38 00 30 0B 90 01 00 10 38 00 00 00 90 01 00 14 90 01 00 18 90 01 00 1C 90 01 00 20 38 61 00 10 7C 03 D8 08
+==== BB 1441 (0xEE385F0) approx BBs exec'd 0 ====
+
+ 0xEE385F0: 3803FFFF addi r0,r3,-1
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0xEE385F4: 2B800062 cmpli cr7,r0,98
+ 4: GETL R0, t2
+ 5: MOVL $0x62, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xEE385F8: 40BD000C bc 5,29,0xEE38604
+ 9: Jc29o $0xEE38604
+
+
+
+. 1441 EE385F0 12
+. 38 03 FF FF 2B 80 00 62 40 BD 00 0C
+==== BB 1442 (0xEE38604) approx BBs exec'd 0 ====
+
+ 0xEE38604: 815E00B8 lwz r10,184(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xB8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xEE38608: 1D630234 mulli r11,r3,564
+ 5: GETL R3, t4
+ 6: MULL $0x234, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0xEE3860C: 7D2B5214 add r9,r11,r10
+ 9: GETL R11, t6
+ 10: GETL R10, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xEE38610: 38000000 li r0,0
+ 14: MOVL $0x0, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xEE38614: 7C0B512E stwx r0,r11,r10
+ 17: GETL R10, t12
+ 18: GETL R11, t14
+ 19: ADDL t14, t12
+ 20: GETL R0, t16
+ 21: STL t16, (t12)
+ 22: INCEIPL $4
+
+ 0xEE38618: 90090004 stw r0,4(r9)
+ 23: GETL R0, t18
+ 24: GETL R9, t20
+ 25: ADDL $0x4, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0xEE3861C: 90090008 stw r0,8(r9)
+ 28: GETL R0, t22
+ 29: GETL R9, t24
+ 30: ADDL $0x8, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0xEE38620: 9009000C stw r0,12(r9)
+ 33: GETL R0, t26
+ 34: GETL R9, t28
+ 35: ADDL $0xC, t28
+ 36: STL t26, (t28)
+ 37: INCEIPL $4
+
+ 0xEE38624: 39600000 li r11,0
+ 38: MOVL $0x0, t30
+ 39: PUTL t30, R11
+ 40: INCEIPL $4
+
+ 0xEE38628: 7D475378 or r7,r10,r10
+ 41: GETL R10, t32
+ 42: PUTL t32, R7
+ 43: INCEIPL $4
+
+ 0xEE3862C: 1C03008D mulli r0,r3,141
+ 44: GETL R3, t34
+ 45: MULL $0x8D, t34
+ 46: PUTL t34, R0
+ 47: INCEIPL $4
+
+ 0xEE38630: 39400000 li r10,0
+ 48: MOVL $0x0, t36
+ 49: PUTL t36, R10
+ 50: INCEIPL $4
+
+ 0xEE38634: 7D205A14 add r9,r0,r11
+ 51: GETL R0, t38
+ 52: GETL R11, t40
+ 53: ADDL t38, t40
+ 54: PUTL t40, R9
+ 55: INCEIPL $4
+
+ 0xEE38638: 5529103A rlwinm r9,r9,2,0,29
+ 56: GETL R9, t42
+ 57: SHLL $0x2, t42
+ 58: PUTL t42, R9
+ 59: INCEIPL $4
+
+ 0xEE3863C: 7D293A14 add r9,r9,r7
+ 60: GETL R9, t44
+ 61: GETL R7, t46
+ 62: ADDL t44, t46
+ 63: PUTL t46, R9
+ 64: INCEIPL $4
+
+ 0xEE38640: 91490218 stw r10,536(r9)
+ 65: GETL R10, t48
+ 66: GETL R9, t50
+ 67: ADDL $0x218, t50
+ 68: STL t48, (t50)
+ 69: INCEIPL $4
+
+ 0xEE38644: 396B0001 addi r11,r11,1
+ 70: MOVL $0x1, t52
+ 71: PUTL t52, R11
+ 72: INCEIPL $4
+
+ 0xEE38648: 2F8B0006 cmpi cr7,r11,6
+ 73: GETL R11, t54
+ 74: MOVL $0x6, t58
+ 75: CMPL t54, t58, t56 (-rSo)
+ 76: ICRFL t56, $0x7, CR
+ 77: INCEIPL $4
+
+ 0xEE3864C: 409DFFE8 bc 4,29,0xEE38634
+ 78: Jc29o $0xEE38634
+
+
+
+. 1442 EE38604 76
+. 81 5E 00 B8 1D 63 02 34 7D 2B 52 14 38 00 00 00 7C 0B 51 2E 90 09 00 04 90 09 00 08 90 09 00 0C 39 60 00 00 7D 47 53 78 1C 03 00 8D 39 40 00 00 7D 20 5A 14 55 29 10 3A 7D 29 3A 14 91 49 02 18 39 6B 00 01 2F 8B 00 06 40 9D FF E8
+==== BB 1443 (0xEE38634) approx BBs exec'd 0 ====
+
+ 0xEE38634: 7D205A14 add r9,r0,r11
+ 0: GETL R0, t0
+ 1: GETL R11, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xEE38638: 5529103A rlwinm r9,r9,2,0,29
+ 5: GETL R9, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0xEE3863C: 7D293A14 add r9,r9,r7
+ 9: GETL R9, t6
+ 10: GETL R7, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xEE38640: 91490218 stw r10,536(r9)
+ 14: GETL R10, t10
+ 15: GETL R9, t12
+ 16: ADDL $0x218, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xEE38644: 396B0001 addi r11,r11,1
+ 19: GETL R11, t14
+ 20: ADDL $0x1, t14
+ 21: PUTL t14, R11
+ 22: INCEIPL $4
+
+ 0xEE38648: 2F8B0006 cmpi cr7,r11,6
+ 23: GETL R11, t16
+ 24: MOVL $0x6, t20
+ 25: CMPL t16, t20, t18 (-rSo)
+ 26: ICRFL t18, $0x7, CR
+ 27: INCEIPL $4
+
+ 0xEE3864C: 409DFFE8 bc 4,29,0xEE38634
+ 28: Jc29o $0xEE38634
+
+
+
+. 1443 EE38634 28
+. 7D 20 5A 14 55 29 10 3A 7D 29 3A 14 91 49 02 18 39 6B 00 01 2F 8B 00 06 40 9D FF E8
+==== BB 1444 (0xEE38650) approx BBs exec'd 0 ====
+
+ 0xEE38650: 3860FFFF li r3,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xEE38654: 48017459 bl 0xEE4FAAC
+ 3: MOVL $0xEE38658, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xEE4FAAC ($4)
+
+
+
+. 1444 EE38650 8
+. 38 60 FF FF 48 01 74 59
+==== BB 1445 (0xEE4FAAC) approx BBs exec'd 0 ====
+
+ 0xEE4FAAC: 39600058 li r11,88
+ 0: MOVL $0x58, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xEE4FAB0: 4BFFFF24 b 0xEE4F9D4
+ 3: JMPo $0xEE4F9D4 ($4)
+
+
+
+. 1445 EE4FAAC 8
+. 39 60 00 58 4B FF FF 24
+==== BB 1446 uselocale(0xFE8919C) approx BBs exec'd 0 ====
+
+ 0xFE8919C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE891A0: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFE891A4: 4811ECAD bl 0xFFA7E50
+ 9: MOVL $0xFE891A8, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1446 FE8919C 12
+. 94 21 FF F0 7D 88 02 A6 48 11 EC AD
+==== BB 1447 (0xFE891A8) approx BBs exec'd 0 ====
+
+ 0xFE891A8: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE891AC: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE891B0: 2C030000 cmpi cr0,r3,0
+ 8: GETL R3, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFE891B4: 7D8803A6 mtlr r12
+ 12: GETL R12, t10
+ 13: PUTL t10, LR
+ 14: INCEIPL $4
+
+ 0xFE891B8: 2F83FFFF cmpi cr7,r3,-1
+ 15: GETL R3, t12
+ 16: MOVL $0xFFFFFFFF, t16
+ 17: CMPL t12, t16, t14 (-rSo)
+ 18: ICRFL t14, $0x7, CR
+ 19: INCEIPL $4
+
+ 0xFE891BC: 80BE1D50 lwz r5,7504(r30)
+ 20: GETL R30, t18
+ 21: ADDL $0x1D50, t18
+ 22: LDL (t18), t20
+ 23: PUTL t20, R5
+ 24: INCEIPL $4
+
+ 0xFE891C0: 809E1CF8 lwz r4,7416(r30)
+ 25: GETL R30, t22
+ 26: ADDL $0x1CF8, t22
+ 27: LDL (t22), t24
+ 28: PUTL t24, R4
+ 29: INCEIPL $4
+
+ 0xFE891C4: 7D051214 add r8,r5,r2
+ 30: GETL R5, t26
+ 31: GETL R2, t28
+ 32: ADDL t26, t28
+ 33: PUTL t28, R8
+ 34: INCEIPL $4
+
+ 0xFE891C8: 817E1B80 lwz r11,7040(r30)
+ 35: GETL R30, t30
+ 36: ADDL $0x1B80, t30
+ 37: LDL (t30), t32
+ 38: PUTL t32, R11
+ 39: INCEIPL $4
+
+ 0xFE891CC: 80080000 lwz r0,0(r8)
+ 40: GETL R8, t34
+ 41: LDL (t34), t36
+ 42: PUTL t36, R0
+ 43: INCEIPL $4
+
+ 0xFE891D0: 813E1D8C lwz r9,7564(r30)
+ 44: GETL R30, t38
+ 45: ADDL $0x1D8C, t38
+ 46: LDL (t38), t40
+ 47: PUTL t40, R9
+ 48: INCEIPL $4
+
+ 0xFE891D4: 7CE41214 add r7,r4,r2
+ 49: GETL R4, t42
+ 50: GETL R2, t44
+ 51: ADDL t42, t44
+ 52: PUTL t44, R7
+ 53: INCEIPL $4
+
+ 0xFE891D8: 7CCB1214 add r6,r11,r2
+ 54: GETL R11, t46
+ 55: GETL R2, t48
+ 56: ADDL t46, t48
+ 57: PUTL t48, R6
+ 58: INCEIPL $4
+
+ 0xFE891DC: 7CA91214 add r5,r9,r2
+ 59: GETL R9, t50
+ 60: GETL R2, t52
+ 61: ADDL t50, t52
+ 62: PUTL t52, R5
+ 63: INCEIPL $4
+
+ 0xFE891E0: 809E1D78 lwz r4,7544(r30)
+ 64: GETL R30, t54
+ 65: ADDL $0x1D78, t54
+ 66: LDL (t54), t56
+ 67: PUTL t56, R4
+ 68: INCEIPL $4
+
+ 0xFE891E4: 7C0A0378 or r10,r0,r0
+ 69: GETL R0, t58
+ 70: PUTL t58, R10
+ 71: INCEIPL $4
+
+ 0xFE891E8: 41820024 bc 12,2,0xFE8920C
+ 72: Js02o $0xFE8920C
+
+
+
+. 1447 FE891A8 68
+. 93 C1 00 08 7F C8 02 A6 2C 03 00 00 7D 88 03 A6 2F 83 FF FF 80 BE 1D 50 80 9E 1C F8 7D 05 12 14 81 7E 1B 80 80 08 00 00 81 3E 1D 8C 7C E4 12 14 7C CB 12 14 7C A9 12 14 80 9E 1D 78 7C 0A 03 78 41 82 00 24
+==== BB 1448 (0xFE891EC) approx BBs exec'd 0 ====
+
+ 0xFE891EC: 419E004C bc 12,30,0xFE89238
+ 0: Js30o $0xFE89238
+
+
+
+. 1448 FE891EC 4
+. 41 9E 00 4C
+==== BB 1449 (0xFE89238) approx BBs exec'd 0 ====
+
+ 0xFE89238: 7C832378 or r3,r4,r4
+ 0: GETL R4, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8923C: 4BFFFFB4 b 0xFE891F0
+ 3: JMPo $0xFE891F0 ($4)
+
+
+
+. 1449 FE89238 8
+. 7C 83 23 78 4B FF FF B4
+==== BB 1450 (0xFE891F0) approx BBs exec'd 0 ====
+
+ 0xFE891F0: 8003003C lwz r0,60(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x3C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE891F4: 81230034 lwz r9,52(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x34, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFE891F8: 81630038 lwz r11,56(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x38, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0xFE891FC: 90680000 stw r3,0(r8)
+ 15: GETL R3, t12
+ 16: GETL R8, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0xFE89200: 91270000 stw r9,0(r7)
+ 19: GETL R9, t16
+ 20: GETL R7, t18
+ 21: STL t16, (t18)
+ 22: INCEIPL $4
+
+ 0xFE89204: 91660000 stw r11,0(r6)
+ 23: GETL R11, t20
+ 24: GETL R6, t22
+ 25: STL t20, (t22)
+ 26: INCEIPL $4
+
+ 0xFE89208: 90050000 stw r0,0(r5)
+ 27: GETL R0, t24
+ 28: GETL R5, t26
+ 29: STL t24, (t26)
+ 30: INCEIPL $4
+
+ 0xFE8920C: 7F8A2000 cmp cr7,r10,r4
+ 31: GETL R10, t28
+ 32: GETL R4, t30
+ 33: CMPL t28, t30, t32 (-rSo)
+ 34: ICRFL t32, $0x7, CR
+ 35: INCEIPL $4
+
+ 0xFE89210: 419E0014 bc 12,30,0xFE89224
+ 36: Js30o $0xFE89224
+
+
+
+. 1450 FE891F0 36
+. 80 03 00 3C 81 23 00 34 81 63 00 38 90 68 00 00 91 27 00 00 91 66 00 00 90 05 00 00 7F 8A 20 00 41 9E 00 14
+==== BB 1451 (0xFE89224) approx BBs exec'd 0 ====
+
+ 0xFE89224: 3940FFFF li r10,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFE89228: 83C10008 lwz r30,8(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE8922C: 7D435378 or r3,r10,r10
+ 8: GETL R10, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFE89230: 38210010 addi r1,r1,16
+ 11: GETL R1, t8
+ 12: ADDL $0x10, t8
+ 13: PUTL t8, R1
+ 14: INCEIPL $4
+
+ 0xFE89234: 4E800020 blr
+ 15: GETL LR, t10
+ 16: JMPo-r t10 ($4)
+
+
+
+. 1451 FE89224 20
+. 39 40 FF FF 83 C1 00 08 7D 43 53 78 38 21 00 10 4E 80 00 20
+==== BB 1452 (0xEE38658) approx BBs exec'd 0 ====
+
+ 0xEE38658: 80010084 lwz r0,132(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE3865C: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xEE38660: 83A10074 lwz r29,116(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x74, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0xEE38664: 83C10078 lwz r30,120(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x78, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0xEE38668: 38210080 addi r1,r1,128
+ 18: GETL R1, t14
+ 19: ADDL $0x80, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xEE3866C: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 1452 EE38658 24
+. 80 01 00 84 7C 08 03 A6 83 A1 00 74 83 C1 00 78 38 21 00 80 4E 80 00 20
+==== BB 1453 (0xEE38508) approx BBs exec'd 0 ====
+
+ 0xEE38508: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xEE3850C: 809E00B0 lwz r4,176(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0xB0, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xEE38510: 38A00000 li r5,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0xEE38514: 480175D9 bl 0xEE4FAEC
+ 11: MOVL $0xEE38518, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0xEE4FAEC ($4)
+
+
+
+. 1453 EE38508 16
+. 38 60 00 00 80 9E 00 B0 38 A0 00 00 48 01 75 D9
+==== BB 1454 (0xEE4FAEC) approx BBs exec'd 0 ====
+
+ 0xEE4FAEC: 39600078 li r11,120
+ 0: MOVL $0x78, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xEE4FAF0: 4BFFFEE4 b 0xEE4F9D4
+ 3: JMPo $0xEE4F9D4 ($4)
+
+
+
+. 1454 EE4FAEC 8
+. 39 60 00 78 4B FF FE E4
+==== BB 1455 _pthread_cleanup_push(0xEE357AC) approx BBs exec'd 0 ====
+
+ 0xEE357AC: 9421FF70 stwu r1,-144(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF70, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE357B0: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE357B4: 93810080 stw r28,128(r1)
+ 9: GETL R28, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x80, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xEE357B8: 93A10084 stw r29,132(r1)
+ 14: GETL R29, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x84, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xEE357BC: 93C10088 stw r30,136(r1)
+ 19: GETL R30, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x88, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xEE357C0: 93E1008C stw r31,140(r1)
+ 24: GETL R31, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x8C, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xEE357C4: 90010094 stw r0,148(r1)
+ 29: GETL R0, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x94, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xEE357C8: 48019B09 bl 0xEE4F2D0
+ 34: MOVL $0xEE357CC, t26
+ 35: PUTL t26, LR
+ 36: JMPo-c $0xEE4F2D0 ($4)
+
+
+
+. 1455 EE357AC 32
+. 94 21 FF 70 7C 08 02 A6 93 81 00 80 93 A1 00 84 93 C1 00 88 93 E1 00 8C 90 01 00 94 48 01 9B 09
+==== BB 1456 (0xEE357CC) approx BBs exec'd 0 ====
+
+ 0xEE357CC: 7FC802A6 mflr r30
+ 0: GETL LR, t0
+ 1: PUTL t0, R30
+ 2: INCEIPL $4
+
+ 0xEE357D0: 7C9F2378 or r31,r4,r4
+ 3: GETL R4, t2
+ 4: PUTL t2, R31
+ 5: INCEIPL $4
+
+ 0xEE357D4: 7CBC2B78 or r28,r5,r5
+ 6: GETL R5, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0xEE357D8: 38001001 li r0,4097
+ 9: MOVL $0x1001, t6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0xEE357DC: 90010020 stw r0,32(r1)
+ 12: GETL R0, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x20, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xEE357E0: 38000000 li r0,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R0
+ 19: INCEIPL $4
+
+ 0xEE357E4: 90010024 stw r0,36(r1)
+ 20: GETL R0, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x24, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xEE357E8: 90010028 stw r0,40(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x28, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xEE357EC: 9001002C stw r0,44(r1)
+ 30: GETL R0, t22
+ 31: GETL R1, t24
+ 32: ADDL $0x2C, t24
+ 33: STL t22, (t24)
+ 34: INCEIPL $4
+
+ 0xEE357F0: 90010030 stw r0,48(r1)
+ 35: GETL R0, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x30, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xEE357F4: 38610020 addi r3,r1,32
+ 40: GETL R1, t30
+ 41: ADDL $0x20, t30
+ 42: PUTL t30, R3
+ 43: INCEIPL $4
+
+ 0xEE357F8: 7C03D808 client_request
+ 44: JMPo-cli $0xEE357FC ($4)
+
+
+
+. 1456 EE357CC 48
+. 7F C8 02 A6 7C 9F 23 78 7C BC 2B 78 38 00 10 01 90 01 00 20 38 00 00 00 90 01 00 24 90 01 00 28 90 01 00 2C 90 01 00 30 38 61 00 20 7C 03 D8 08
+==== BB 1457 (0xEE357FC) approx BBs exec'd 0 ====
+
+ 0xEE357FC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xEE35800: 40BE0040 bc 5,30,0xEE35840
+ 4: Jc30o $0xEE35840
+
+
+
+. 1457 EE357FC 8
+. 2F 83 00 00 40 BE 00 40
+==== BB 1458 (0xEE35840) approx BBs exec'd 0 ====
+
+ 0xEE35840: 38000001 li r0,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xEE35844: 90010010 stw r0,16(r1)
+ 3: GETL R0, t2
+ 4: GETL R1, t4
+ 5: ADDL $0x10, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xEE35848: 93E10014 stw r31,20(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xEE3584C: 93810018 stw r28,24(r1)
+ 13: GETL R28, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x18, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xEE35850: 38003020 li r0,12320
+ 18: MOVL $0x3020, t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0xEE35854: 90010020 stw r0,32(r1)
+ 21: GETL R0, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x20, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xEE35858: 38010010 addi r0,r1,16
+ 26: GETL R1, t20
+ 27: ADDL $0x10, t20
+ 28: PUTL t20, R0
+ 29: INCEIPL $4
+
+ 0xEE3585C: 90010024 stw r0,36(r1)
+ 30: GETL R0, t22
+ 31: GETL R1, t24
+ 32: ADDL $0x24, t24
+ 33: STL t22, (t24)
+ 34: INCEIPL $4
+
+ 0xEE35860: 38000000 li r0,0
+ 35: MOVL $0x0, t26
+ 36: PUTL t26, R0
+ 37: INCEIPL $4
+
+ 0xEE35864: 90010028 stw r0,40(r1)
+ 38: GETL R0, t28
+ 39: GETL R1, t30
+ 40: ADDL $0x28, t30
+ 41: STL t28, (t30)
+ 42: INCEIPL $4
+
+ 0xEE35868: 9001002C stw r0,44(r1)
+ 43: GETL R0, t32
+ 44: GETL R1, t34
+ 45: ADDL $0x2C, t34
+ 46: STL t32, (t34)
+ 47: INCEIPL $4
+
+ 0xEE3586C: 90010030 stw r0,48(r1)
+ 48: GETL R0, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x30, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0xEE35870: 38610020 addi r3,r1,32
+ 53: GETL R1, t40
+ 54: ADDL $0x20, t40
+ 55: PUTL t40, R3
+ 56: INCEIPL $4
+
+ 0xEE35874: 7C03D808 client_request
+ 57: JMPo-cli $0xEE35878 ($4)
+
+
+
+. 1458 EE35840 56
+. 38 00 00 01 90 01 00 10 93 E1 00 14 93 81 00 18 38 00 30 20 90 01 00 20 38 01 00 10 90 01 00 24 38 00 00 00 90 01 00 28 90 01 00 2C 90 01 00 30 38 61 00 20 7C 03 D8 08
+==== BB 1459 (0xEE35878) approx BBs exec'd 0 ====
+
+ 0xEE35878: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xEE3587C: 41BE0018 bc 13,30,0xEE35894
+ 4: Js30o $0xEE35894
+
+
+
+. 1459 EE35878 8
+. 2F 83 00 00 41 BE 00 18
+==== BB 1460 (0xEE35894) approx BBs exec'd 0 ====
+
+ 0xEE35894: 80010094 lwz r0,148(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x94, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE35898: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xEE3589C: 83810080 lwz r28,128(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x80, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0xEE358A0: 83A10084 lwz r29,132(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x84, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0xEE358A4: 83C10088 lwz r30,136(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x88, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R30
+ 22: INCEIPL $4
+
+ 0xEE358A8: 83E1008C lwz r31,140(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x8C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R31
+ 27: INCEIPL $4
+
+ 0xEE358AC: 38210090 addi r1,r1,144
+ 28: GETL R1, t22
+ 29: ADDL $0x90, t22
+ 30: PUTL t22, R1
+ 31: INCEIPL $4
+
+ 0xEE358B0: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+
+. 1460 EE35894 32
+. 80 01 00 94 7C 08 03 A6 83 81 00 80 83 A1 00 84 83 C1 00 88 83 E1 00 8C 38 21 00 90 4E 80 00 20
+==== BB 1461 (0xEE38518) approx BBs exec'd 0 ====
+
+ 0xEE38518: 807E00AC lwz r3,172(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xAC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xEE3851C: 48017559 bl 0xEE4FA74
+ 5: MOVL $0xEE38520, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0xEE4FA74 ($4)
+
+
+
+. 1461 EE38518 8
+. 80 7E 00 AC 48 01 75 59
+==== BB 1462 (0xEE4FA74) approx BBs exec'd 0 ====
+
+ 0xEE4FA74: 3960003C li r11,60
+ 0: MOVL $0x3C, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xEE4FA78: 4BFFFF5C b 0xEE4F9D4
+ 3: JMPo $0xEE4F9D4 ($4)
+
+
+
+. 1462 EE4FA74 8
+. 39 60 00 3C 4B FF FF 5C
+==== BB 1463 pthread_mutex_unlock(0xEE36834) approx BBs exec'd 0 ====
+
+ 0xEE36834: 9421FFC0 stwu r1,-64(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFC0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE36838: 39200000 li r9,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0xEE3683C: 3800300E li r0,12302
+ 9: MOVL $0x300E, t6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0xEE36840: 90010010 stw r0,16(r1)
+ 12: GETL R0, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xEE36844: 90610014 stw r3,20(r1)
+ 17: GETL R3, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xEE36848: 91210018 stw r9,24(r1)
+ 22: GETL R9, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x18, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0xEE3684C: 9121001C stw r9,28(r1)
+ 27: GETL R9, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x1C, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xEE36850: 91210020 stw r9,32(r1)
+ 32: GETL R9, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x20, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xEE36854: 38610010 addi r3,r1,16
+ 37: GETL R1, t28
+ 38: ADDL $0x10, t28
+ 39: PUTL t28, R3
+ 40: INCEIPL $4
+
+ 0xEE36858: 7C03D808 client_request
+ 41: JMPo-cli $0xEE3685C ($4)
+
+
+
+. 1463 EE36834 40
+. 94 21 FF C0 39 20 00 00 38 00 30 0E 90 01 00 10 90 61 00 14 91 21 00 18 91 21 00 1C 91 21 00 20 38 61 00 10 7C 03 D8 08
+==== BB 1464 (0xEE3685C) approx BBs exec'd 0 ====
+
+ 0xEE3685C: 38210040 addi r1,r1,64
+ 0: GETL R1, t0
+ 1: ADDL $0x40, t0
+ 2: PUTL t0, R1
+ 3: INCEIPL $4
+
+ 0xEE36860: 4E800020 blr
+ 4: GETL LR, t2
+ 5: JMPo-r t2 ($4)
+
+
+
+. 1464 EE3685C 8
+. 38 21 00 40 4E 80 00 20
+==== BB 1465 (0xEE38520) approx BBs exec'd 0 ====
+
+ 0xEE38520: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xEE38524: 41BE000C bc 13,30,0xEE38530
+ 4: Js30o $0xEE38530
+
+
+
+. 1465 EE38520 8
+. 2F 83 00 00 41 BE 00 0C
+==== BB 1466 (0xEE38530) approx BBs exec'd 0 ====
+
+ 0xEE38530: 80010084 lwz r0,132(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE38534: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xEE38538: 83A10074 lwz r29,116(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x74, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0xEE3853C: 83C10078 lwz r30,120(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x78, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0xEE38540: 38210080 addi r1,r1,128
+ 18: GETL R1, t14
+ 19: ADDL $0x80, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xEE38544: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 1466 EE38530 24
+. 80 01 00 84 7C 08 03 A6 83 A1 00 74 83 C1 00 78 38 21 00 80 4E 80 00 20
+==== BB 1467 (0xEE3D0E4) approx BBs exec'd 0 ====
+
+ 0xEE3D0E4: 841FFFFC lwzu r0,-4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R31
+ 3: LDL (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xEE3D0E8: 2F80FFFF cmpi cr7,r0,-1
+ 6: GETL R0, t4
+ 7: MOVL $0xFFFFFFFF, t8
+ 8: CMPL t4, t8, t6 (-rSo)
+ 9: ICRFL t6, $0x7, CR
+ 10: INCEIPL $4
+
+ 0xEE3D0EC: 409EFFF0 bc 4,30,0xEE3D0DC
+ 11: Jc30o $0xEE3D0DC
+
+
+
+. 1467 EE3D0E4 12
+. 84 1F FF FC 2F 80 FF FF 40 9E FF F0
+==== BB 1468 (0xEE3D0F0) approx BBs exec'd 0 ====
+
+ 0xEE3D0F0: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE3D0F4: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xEE3D0F8: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xEE3D0FC: 7C0803A6 mtlr r0
+ 15: GETL R0, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xEE3D100: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xEE3D104: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 1468 EE3D0F0 24
+. 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 1469 (0xEE3423C) approx BBs exec'd 0 ====
+
+ 0xEE3423C: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE34240: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xEE34244: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xEE34248: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 1469 EE3423C 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 1470 (0xEE81FCC) approx BBs exec'd 0 ====
+
+ 0xEE81FCC: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE81FD0: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE81FD4: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xEE81FD8: 4800001D bl 0xEE81FF4
+ 14: MOVL $0xEE81FDC, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xEE81FF4 ($4)
+
+
+
+. 1470 EE81FCC 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 48 00 00 1D
+==== BB 1471 (0xEE81FF4) approx BBs exec'd 0 ====
+
+ 0xEE81FF4: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE81FF8: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE81FFC: 93C10008 stw r30,8(r1)
+ 9: GETL R30, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xEE82000: 90010014 stw r0,20(r1)
+ 14: GETL R0, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x14, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xEE82004: 48016041 bl 0xEE98044
+ 19: MOVL $0xEE82008, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0xEE98044 ($4)
+
+
+
+. 1471 EE81FF4 20
+. 94 21 FF F0 7C 08 02 A6 93 C1 00 08 90 01 00 14 48 01 60 41
+==== BB 1472 (0xEE98044) approx BBs exec'd 0 ====
+
+ 0xEE98044: 4E800021 blrl
+ 0: GETL LR, t0
+ 1: MOVL $0xEE98048, t2
+ 2: PUTL t2, LR
+ 3: JMPo-r t0 ($4)
+
+
+
+. 1472 EE98044 4
+. 4E 80 00 21
+==== BB 1473 (0xEE82008) approx BBs exec'd 0 ====
+
+ 0xEE82008: 7FC802A6 mflr r30
+ 0: GETL LR, t0
+ 1: PUTL t0, R30
+ 2: INCEIPL $4
+
+ 0xEE8200C: 801E00FC lwz r0,252(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0xFC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xEE82010: 2F800000 cmpi cr7,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xEE82014: 419E000C bc 12,30,0xEE82020
+ 12: Js30o $0xEE82020
+
+
+
+. 1473 EE82008 16
+. 7F C8 02 A6 80 1E 00 FC 2F 80 00 00 41 9E 00 0C
+==== BB 1474 (0xEE82020) approx BBs exec'd 0 ====
+
+ 0xEE82020: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE82024: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xEE82028: 83C10008 lwz r30,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0xEE8202C: 38210010 addi r1,r1,16
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: PUTL t10, R1
+ 16: INCEIPL $4
+
+ 0xEE82030: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 1474 EE82020 20
+. 80 01 00 14 7C 08 03 A6 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 1475 (0xEE81FDC) approx BBs exec'd 0 ====
+
+ 0xEE81FDC: 48000115 bl 0xEE820F0
+ 0: MOVL $0xEE81FE0, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xEE820F0 ($4)
+
+
+
+. 1475 EE81FDC 4
+. 48 00 01 15
+==== BB 1476 (0xEE820F0) approx BBs exec'd 0 ====
+
+ 0xEE820F0: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE820F4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE820F8: 429F0005 bcl 20,31,0xEE820FC
+ 9: MOVL $0xEE820FC, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xEE820FC: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xEE82100: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xEE82104: 90010014 stw r0,20(r1)
+ 20: GETL R0, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xEE82108: 801EFFF0 lwz r0,-16(r30)
+ 25: GETL R30, t18
+ 26: ADDL $0xFFFFFFF0, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R0
+ 29: INCEIPL $4
+
+ 0xEE8210C: 7FC0F214 add r30,r0,r30
+ 30: GETL R0, t22
+ 31: GETL R30, t24
+ 32: ADDL t22, t24
+ 33: PUTL t24, R30
+ 34: INCEIPL $4
+
+ 0xEE82110: 807E8010 lwz r3,-32752(r30)
+ 35: GETL R30, t26
+ 36: ADDL $0xFFFF8010, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R3
+ 39: INCEIPL $4
+
+ 0xEE82114: 80030000 lwz r0,0(r3)
+ 40: GETL R3, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R0
+ 43: INCEIPL $4
+
+ 0xEE82118: 2F800000 cmpi cr7,r0,0
+ 44: GETL R0, t34
+ 45: CMP0L t34, t36 (-rSo)
+ 46: ICRFL t36, $0x7, CR
+ 47: INCEIPL $4
+
+ 0xEE8211C: 419E0018 bc 12,30,0xEE82134
+ 48: Js30o $0xEE82134
+
+
+
+. 1476 EE820F0 48
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 90 01 00 14 80 1E FF F0 7F C0 F2 14 80 7E 80 10 80 03 00 00 2F 80 00 00 41 9E 00 18
+==== BB 1477 (0xEE82134) approx BBs exec'd 0 ====
+
+ 0xEE82134: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE82138: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xEE8213C: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xEE82140: 7C0803A6 mtlr r0
+ 14: GETL R0, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xEE82144: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 1477 EE82134 20
+. 80 01 00 14 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 1478 (0xEE81FE0) approx BBs exec'd 0 ====
+
+ 0xEE81FE0: 48005759 bl 0xEE87738
+ 0: MOVL $0xEE81FE4, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xEE87738 ($4)
+
+
+
+. 1478 EE81FE0 4
+. 48 00 57 59
+==== BB 1479 (0xEE87738) approx BBs exec'd 0 ====
+
+ 0xEE87738: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE8773C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE87740: 429F0005 bcl 20,31,0xEE87744
+ 9: MOVL $0xEE87744, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xEE87744: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xEE87748: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xEE8774C: 93E1000C stw r31,12(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xEE87750: 90010014 stw r0,20(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xEE87754: 801EFFF0 lwz r0,-16(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0xFFFFFFF0, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xEE87758: 7FC0F214 add r30,r0,r30
+ 35: GETL R0, t26
+ 36: GETL R30, t28
+ 37: ADDL t26, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0xEE8775C: 813E8000 lwz r9,-32768(r30)
+ 40: GETL R30, t30
+ 41: ADDL $0xFFFF8000, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xEE87760: 8009FFFC lwz r0,-4(r9)
+ 45: GETL R9, t34
+ 46: ADDL $0xFFFFFFFC, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R0
+ 49: INCEIPL $4
+
+ 0xEE87764: 3BE9FFFC addi r31,r9,-4
+ 50: GETL R9, t38
+ 51: ADDL $0xFFFFFFFC, t38
+ 52: PUTL t38, R31
+ 53: INCEIPL $4
+
+ 0xEE87768: 48000010 b 0xEE87778
+ 54: JMPo $0xEE87778 ($4)
+
+
+
+. 1479 EE87738 52
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 80 09 FF FC 3B E9 FF FC 48 00 00 10
+==== BB 1480 (0xEE87778) approx BBs exec'd 0 ====
+
+ 0xEE87778: 2F80FFFF cmpi cr7,r0,-1
+ 0: GETL R0, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xEE8777C: 409EFFF0 bc 4,30,0xEE8776C
+ 5: Jc30o $0xEE8776C
+
+
+
+. 1480 EE87778 8
+. 2F 80 FF FF 40 9E FF F0
+==== BB 1481 (0xEE87780) approx BBs exec'd 0 ====
+
+ 0xEE87780: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE87784: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xEE87788: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xEE8778C: 7C0803A6 mtlr r0
+ 15: GETL R0, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xEE87790: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xEE87794: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 1481 EE87780 24
+. 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 1482 (0xEE81FE4) approx BBs exec'd 0 ====
+
+ 0xEE81FE4: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE81FE8: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xEE81FEC: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xEE81FF0: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 1482 EE81FE4 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 1483 (0x2547B90C) approx BBs exec'd 0 ====
+
+ 0x2547B90C: 7520C000 andis. r0,r9,0xC000
+ 0: GETL R9, t0
+ 1: ANDL $0xC0000000, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x2547B910: 40A2FEFC bc 5,2,0x2547B80C
+ 6: Jc02o $0x2547B80C
+
+
+
+. 1483 2547B90C 8
+. 75 20 C0 00 40 A2 FE FC
+==== BB 1484 (0x2547B914) approx BBs exec'd 0 ====
+
+ 0x2547B914: 2F9C0000 cmpi cr7,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547B918: 3B9CFFFF addi r28,r28,-1
+ 4: GETL R28, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x2547B91C: 4BFFFF10 b 0x2547B82C
+ 8: JMPo $0x2547B82C ($4)
+
+
+
+. 1484 2547B914 12
+. 2F 9C 00 00 3B 9C FF FF 4B FF FF 10
+==== BB 1485 (0x2547B82C) approx BBs exec'd 0 ====
+
+ 0x2547B82C: 409EFFB0 bc 4,30,0x2547B7DC
+ 0: Jc30o $0x2547B7DC
+
+
+
+. 1485 2547B82C 4
+. 40 9E FF B0
+==== BB 1486 (0x2547B830) approx BBs exec'd 0 ====
+
+ 0x2547B830: 82E10044 lwz r23,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x2547B834: 3B000000 li r24,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R24
+ 7: INCEIPL $4
+
+ 0x2547B838: 83C10038 lwz r30,56(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x38, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0x2547B83C: 7EE803A6 mtlr r23
+ 13: GETL R23, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x2547B840: 83E1003C lwz r31,60(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x3C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0x2547B844: 9316000C stw r24,12(r22)
+ 21: GETL R24, t16
+ 22: GETL R22, t18
+ 23: ADDL $0xC, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547B848: 82810010 lwz r20,16(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x10, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R20
+ 30: INCEIPL $4
+
+ 0x2547B84C: 82A10014 lwz r21,20(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x14, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R21
+ 35: INCEIPL $4
+
+ 0x2547B850: 82C10018 lwz r22,24(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x18, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R22
+ 40: INCEIPL $4
+
+ 0x2547B854: 82E1001C lwz r23,28(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x1C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R23
+ 45: INCEIPL $4
+
+ 0x2547B858: 83010020 lwz r24,32(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x20, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R24
+ 50: INCEIPL $4
+
+ 0x2547B85C: 83210024 lwz r25,36(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x24, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R25
+ 55: INCEIPL $4
+
+ 0x2547B860: 83410028 lwz r26,40(r1)
+ 56: GETL R1, t44
+ 57: ADDL $0x28, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R26
+ 60: INCEIPL $4
+
+ 0x2547B864: 8361002C lwz r27,44(r1)
+ 61: GETL R1, t48
+ 62: ADDL $0x2C, t48
+ 63: LDL (t48), t50
+ 64: PUTL t50, R27
+ 65: INCEIPL $4
+
+ 0x2547B868: 83810030 lwz r28,48(r1)
+ 66: GETL R1, t52
+ 67: ADDL $0x30, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R28
+ 70: INCEIPL $4
+
+ 0x2547B86C: 83A10034 lwz r29,52(r1)
+ 71: GETL R1, t56
+ 72: ADDL $0x34, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R29
+ 75: INCEIPL $4
+
+ 0x2547B870: 38210040 addi r1,r1,64
+ 76: GETL R1, t60
+ 77: ADDL $0x40, t60
+ 78: PUTL t60, R1
+ 79: INCEIPL $4
+
+ 0x2547B874: 4800072C b 0x2547BFA0
+ 80: JMPo $0x2547BFA0 ($4)
+
+
+
+. 1486 2547B830 72
+. 82 E1 00 44 3B 00 00 00 83 C1 00 38 7E E8 03 A6 83 E1 00 3C 93 16 00 0C 82 81 00 10 82 A1 00 14 82 C1 00 18 82 E1 00 1C 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 38 21 00 40 48 00 07 2C
+==== BB 1487 (0x2548051C) approx BBs exec'd 0 ====
+
+ 0x2548051C: 807D0000 lwz r3,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25480520: 809B0000 lwz r4,0(r27)
+ 4: GETL R27, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R4
+ 7: INCEIPL $4
+
+ 0x25480524: 5465103A rlwinm r5,r3,2,0,29
+ 8: GETL R3, t8
+ 9: SHLL $0x2, t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0x25480528: 7CC42A14 add r6,r4,r5
+ 12: GETL R4, t10
+ 13: GETL R5, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R6
+ 16: INCEIPL $4
+
+ 0x2548052C: 38A60004 addi r5,r6,4
+ 17: GETL R6, t14
+ 18: ADDL $0x4, t14
+ 19: PUTL t14, R5
+ 20: INCEIPL $4
+
+ 0x25480530: 84060004 lwzu r0,4(r6)
+ 21: GETL R6, t16
+ 22: ADDL $0x4, t16
+ 23: PUTL t16, R6
+ 24: LDL (t16), t18
+ 25: PUTL t18, R0
+ 26: INCEIPL $4
+
+ 0x25480534: 2C000000 cmpi cr0,r0,0
+ 27: GETL R0, t20
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x0, CR
+ 30: INCEIPL $4
+
+ 0x25480538: 4082FFF8 bc 4,2,0x25480530
+ 31: Jc02o $0x25480530
+
+
+
+. 1487 2548051C 32
+. 80 7D 00 00 80 9B 00 00 54 65 10 3A 7C C4 2A 14 38 A6 00 04 84 06 00 04 2C 00 00 00 40 82 FF F8
+==== BB 1488 (0x25480530) approx BBs exec'd 0 ====
+
+ 0x25480530: 84060004 lwzu r0,4(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R6
+ 3: LDL (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x25480534: 2C000000 cmpi cr0,r0,0
+ 6: GETL R0, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x25480538: 4082FFF8 bc 4,2,0x25480530
+ 10: Jc02o $0x25480530
+
+
+
+. 1488 25480530 12
+. 84 06 00 04 2C 00 00 00 40 82 FF F8
+==== BB 1489 (0x2548053C) approx BBs exec'd 0 ====
+
+ 0x2548053C: 38C60004 addi r6,r6,4
+ 0: GETL R6, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x25480540: 80FF04AC lwz r7,1196(r31)
+ 4: GETL R31, t2
+ 5: ADDL $0x4AC, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x25480544: 7FC903A6 mtctr r30
+ 9: GETL R30, t6
+ 10: PUTL t6, CTR
+ 11: INCEIPL $4
+
+ 0x25480548: 3BE00000 li r31,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R31
+ 14: INCEIPL $4
+
+ 0x2548054C: 93E10000 stw r31,0(r1)
+ 15: GETL R31, t10
+ 16: GETL R1, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x25480550: 7FE803A6 mtlr r31
+ 19: GETL R31, t14
+ 20: PUTL t14, LR
+ 21: INCEIPL $4
+
+ 0x25480554: 93E10004 stw r31,4(r1)
+ 22: GETL R31, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x4, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0x25480558: 93E10008 stw r31,8(r1)
+ 27: GETL R31, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x8, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0x2548055C: 93E1000C stw r31,12(r1)
+ 32: GETL R31, t24
+ 33: GETL R1, t26
+ 34: ADDL $0xC, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x25480560: 4E800420 bctr
+ 37: GETL CTR, t28
+ 38: JMPo t28 ($4)
+
+
+
+. 1489 2548053C 40
+. 38 C6 00 04 80 FF 04 AC 7F C9 03 A6 3B E0 00 00 93 E1 00 00 7F E8 03 A6 93 E1 00 04 93 E1 00 08 93 E1 00 0C 4E 80 04 20
+==== BB 1490 (0x10000FF4) approx BBs exec'd 0 ====
+
+ 0x10000FF4: 7C290B78 or r9,r1,r1
+ 0: GETL R1, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x10000FF8: 54210036 rlwinm r1,r1,0,0,27
+ 3: GETL R1, t2
+ 4: ANDL $0xFFFFFFF0, t2
+ 5: PUTL t2, R1
+ 6: INCEIPL $4
+
+ 0x10000FFC: 38000000 li r0,0
+ 7: MOVL $0x0, t4
+ 8: PUTL t4, R0
+ 9: INCEIPL $4
+
+ 0x10001000: 9421FFF0 stwu r1,-16(r1)
+ 10: GETL R1, t6
+ 11: GETL R1, t8
+ 12: ADDL $0xFFFFFFF0, t8
+ 13: PUTL t8, R1
+ 14: STL t6, (t8)
+ 15: INCEIPL $4
+
+ 0x10001004: 7C0803A6 mtlr r0
+ 16: GETL R0, t10
+ 17: PUTL t10, LR
+ 18: INCEIPL $4
+
+ 0x10001008: 90010000 stw r0,0(r1)
+ 19: GETL R0, t12
+ 20: GETL R1, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0x1000100C: 3D001000 lis r8,4096
+ 23: MOVL $0x10000000, t16
+ 24: PUTL t16, R8
+ 25: INCEIPL $4
+
+ 0x10001010: 85A87DF8 lwzu r13,32248(r8)
+ 26: MOVL $0x10007DF8, t18
+ 27: PUTL t18, R8
+ 28: LDL (t18), t20
+ 29: PUTL t20, R13
+ 30: INCEIPL $4
+
+ 0x10001014: 48019C20 b 0x1001AC34
+ 31: JMPo $0x1001AC34 ($4)
+
+
+
+. 1490 10000FF4 36
+. 7C 29 0B 78 54 21 00 36 38 00 00 00 94 21 FF F0 7C 08 03 A6 90 01 00 00 3D 00 10 00 85 A8 7D F8 48 01 9C 20
+==== BB 1491 (0x1001AC34) approx BBs exec'd 0 ====
+
+ 0x1001AC34: 39600080 li r11,128
+ 0: MOVL $0x80, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AC38: 4BFFFED4 b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 1491 1001AC34 8
+. 39 60 00 80 4B FF FE D4
+==== BB 1492 (0x1001AB0C) approx BBs exec'd 0 ====
+
+ 0x1001AB0C: 556C083C rlwinm r12,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0x1001AB10: 7D6C5A14 add r11,r12,r11
+ 4: GETL R12, t2
+ 5: GETL R11, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0x1001AB14: 3980AF5C li r12,-20644
+ 9: MOVL $0xFFFFAF5C, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x1001AB18: 3D8C2548 addis r12,r12,9544
+ 12: MOVL $0x2547AF5C, t8
+ 13: PUTL t8, R12
+ 14: INCEIPL $4
+
+ 0x1001AB1C: 7D8903A6 mtctr r12
+ 15: GETL R12, t10
+ 16: PUTL t10, CTR
+ 17: INCEIPL $4
+
+ 0x1001AB20: 39807A88 li r12,31368
+ 18: MOVL $0x7A88, t12
+ 19: PUTL t12, R12
+ 20: INCEIPL $4
+
+ 0x1001AB24: 3D8C2549 addis r12,r12,9545
+ 21: MOVL $0x25497A88, t14
+ 22: PUTL t14, R12
+ 23: INCEIPL $4
+
+ 0x1001AB28: 4E800420 bctr
+ 24: GETL CTR, t16
+ 25: JMPo t16 ($4)
+
+
+
+. 1492 1001AB0C 32
+. 55 6C 08 3C 7D 6C 5A 14 39 80 AF 5C 3D 8C 25 48 7D 89 03 A6 39 80 7A 88 3D 8C 25 49 4E 80 04 20
+==== BB 1493 __libc_start_main(0xFE7B8C4) approx BBs exec'd 0 ====
+
+ 0xFE7B8C4: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE7B8C8: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFE7B8CC: 4812C585 bl 0xFFA7E50
+ 9: MOVL $0xFE7B8D0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1493 FE7B8C4 12
+. 7C 08 02 A6 94 21 FF F0 48 12 C5 85
+==== BB 1494 (0xFE7B8D0) approx BBs exec'd 0 ====
+
+ 0xFE7B8D0: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE7B8D4: 7D2A4B78 or r10,r9,r9
+ 5: GETL R9, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0xFE7B8D8: 7FC802A6 mflr r30
+ 8: GETL LR, t6
+ 9: PUTL t6, R30
+ 10: INCEIPL $4
+
+ 0xFE7B8DC: 90010014 stw r0,20(r1)
+ 11: GETL R0, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x14, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFE7B8E0: 7C6C1B78 or r12,r3,r3
+ 16: GETL R3, t12
+ 17: PUTL t12, R12
+ 18: INCEIPL $4
+
+ 0xFE7B8E4: 80090000 lwz r0,0(r9)
+ 19: GETL R9, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R0
+ 22: INCEIPL $4
+
+ 0xFE7B8E8: 7C852378 or r5,r4,r4
+ 23: GETL R4, t18
+ 24: PUTL t18, R5
+ 25: INCEIPL $4
+
+ 0xFE7B8EC: 7CE93B78 or r9,r7,r7
+ 26: GETL R7, t20
+ 27: PUTL t20, R9
+ 28: INCEIPL $4
+
+ 0xFE7B8F0: 7D074378 or r7,r8,r8
+ 29: GETL R8, t22
+ 30: PUTL t22, R7
+ 31: INCEIPL $4
+
+ 0xFE7B8F4: 2F800000 cmpi cr7,r0,0
+ 32: GETL R0, t24
+ 33: CMP0L t24, t26 (-rSo)
+ 34: ICRFL t26, $0x7, CR
+ 35: INCEIPL $4
+
+ 0xFE7B8F8: 419E0034 bc 12,30,0xFE7B92C
+ 36: Js30o $0xFE7B92C
+
+
+
+. 1494 FE7B8D0 44
+. 93 C1 00 08 7D 2A 4B 78 7F C8 02 A6 90 01 00 14 7C 6C 1B 78 80 09 00 00 7C 85 23 78 7C E9 3B 78 7D 07 43 78 2F 80 00 00 41 9E 00 34
+==== BB 1495 (0xFE7B92C) approx BBs exec'd 0 ====
+
+ 0xFE7B92C: 80060000 lwz r0,0(r6)
+ 0: GETL R6, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFE7B930: 7CCB3378 or r11,r6,r6
+ 4: GETL R6, t4
+ 5: PUTL t4, R11
+ 6: INCEIPL $4
+
+ 0xFE7B934: 2C800000 cmpi cr1,r0,0
+ 7: GETL R0, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x1, CR
+ 10: INCEIPL $4
+
+ 0xFE7B938: 4186003C bc 12,6,0xFE7B974
+ 11: Js06o $0xFE7B974
+
+
+
+. 1495 FE7B92C 16
+. 80 06 00 00 7C CB 33 78 2C 80 00 00 41 86 00 3C
+==== BB 1496 (0xFE7B93C) approx BBs exec'd 0 ====
+
+ 0xFE7B93C: 811E1CB0 lwz r8,7344(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1CB0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFE7B940: 48000010 b 0xFE7B950
+ 5: JMPo $0xFE7B950 ($4)
+
+
+
+. 1496 FE7B93C 8
+. 81 1E 1C B0 48 00 00 10
+==== BB 1497 (0xFE7B950) approx BBs exec'd 0 ====
+
+ 0xFE7B950: 2F800013 cmpi cr7,r0,19
+ 0: GETL R0, t0
+ 1: MOVL $0x13, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE7B954: 2F080000 cmpi cr6,r8,0
+ 5: GETL R8, t6
+ 6: CMP0L t6, t8 (-rSo)
+ 7: ICRFL t8, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFE7B958: 409EFFEC bc 4,30,0xFE7B944
+ 9: Jc30o $0xFE7B944
+
+
+
+. 1497 FE7B950 12
+. 2F 80 00 13 2F 08 00 00 40 9E FF EC
+==== BB 1498 (0xFE7B944) approx BBs exec'd 0 ====
+
+ 0xFE7B944: 840B0008 lwzu r0,8(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x8, t0
+ 2: PUTL t0, R11
+ 3: LDL (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xFE7B948: 2F000000 cmpi cr6,r0,0
+ 6: GETL R0, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFE7B94C: 419A0028 bc 12,26,0xFE7B974
+ 10: Js26o $0xFE7B974
+
+
+
+. 1498 FE7B944 12
+. 84 0B 00 08 2F 00 00 00 41 9A 00 28
+==== BB 1499 (0xFE7B95C) approx BBs exec'd 0 ====
+
+ 0xFE7B95C: 41BAFFE8 bc 13,26,0xFE7B944
+ 0: Js26o $0xFE7B944
+
+
+
+. 1499 FE7B95C 4
+. 41 BA FF E8
+==== BB 1500 (0xFE7B960) approx BBs exec'd 0 ====
+
+ 0xFE7B960: 808B0004 lwz r4,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE7B964: 90880000 stw r4,0(r8)
+ 5: GETL R4, t4
+ 6: GETL R8, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFE7B968: 840B0008 lwzu r0,8(r11)
+ 9: GETL R11, t8
+ 10: ADDL $0x8, t8
+ 11: PUTL t8, R11
+ 12: LDL (t8), t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0xFE7B96C: 2F000000 cmpi cr6,r0,0
+ 15: GETL R0, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0xFE7B970: 409AFFE0 bc 4,26,0xFE7B950
+ 19: Jc26o $0xFE7B950
+
+
+
+. 1500 FE7B960 20
+. 80 8B 00 04 90 88 00 00 84 0B 00 08 2F 00 00 00 40 9A FF E0
+==== BB 1501 (0xFE7B974) approx BBs exec'd 0 ====
+
+ 0xFE7B974: 8107000C lwz r8,12(r7)
+ 0: GETL R7, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFE7B978: 7D846378 or r4,r12,r12
+ 5: GETL R12, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFE7B97C: 80670004 lwz r3,4(r7)
+ 8: GETL R7, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFE7B980: 80E70008 lwz r7,8(r7)
+ 13: GETL R7, t10
+ 14: ADDL $0x8, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R7
+ 17: INCEIPL $4
+
+ 0xFE7B984: 4BFFFD91 bl 0xFE7B714
+ 18: MOVL $0xFE7B988, t14
+ 19: PUTL t14, LR
+ 20: JMPo-c $0xFE7B714 ($4)
+
+
+
+. 1501 FE7B974 20
+. 81 07 00 0C 7D 84 63 78 80 67 00 04 80 E7 00 08 4B FF FD 91
+==== BB 1502 generic_start_main(0xFE7B714) approx BBs exec'd 0 ====
+
+ 0xFE7B714: 9421FDE0 stwu r1,-544(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFDE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE7B718: 7D4802A6 mflr r10
+ 6: GETL LR, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0xFE7B71C: 4812C735 bl 0xFFA7E50
+ 9: MOVL $0xFE7B720, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1502 FE7B714 12
+. 94 21 FD E0 7D 48 02 A6 48 12 C7 35
+==== BB 1503 (0xFE7B720) approx BBs exec'd 0 ====
+
+ 0xFE7B720: 93C10218 stw r30,536(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x218, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE7B724: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE7B728: 93A10214 stw r29,532(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x214, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE7B72C: 5480103A rlwinm r0,r4,2,0,29
+ 13: GETL R4, t10
+ 14: SHLL $0x2, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xFE7B730: 93810210 stw r28,528(r1)
+ 17: GETL R28, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x210, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFE7B734: 7D602A14 add r11,r0,r5
+ 22: GETL R0, t16
+ 23: GETL R5, t18
+ 24: ADDL t16, t18
+ 25: PUTL t18, R11
+ 26: INCEIPL $4
+
+ 0xFE7B738: 93E1021C stw r31,540(r1)
+ 27: GETL R31, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x21C, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFE7B73C: 83BE1CE4 lwz r29,7396(r30)
+ 32: GETL R30, t24
+ 33: ADDL $0x1CE4, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R29
+ 36: INCEIPL $4
+
+ 0xFE7B740: 7CFC3B78 or r28,r7,r7
+ 37: GETL R7, t28
+ 38: PUTL t28, R28
+ 39: INCEIPL $4
+
+ 0xFE7B744: 91410224 stw r10,548(r1)
+ 40: GETL R10, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x224, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0xFE7B748: 7D1F4378 or r31,r8,r8
+ 45: GETL R8, t34
+ 46: PUTL t34, R31
+ 47: INCEIPL $4
+
+ 0xFE7B74C: 2F9D0000 cmpi cr7,r29,0
+ 48: GETL R29, t36
+ 49: CMP0L t36, t38 (-rSo)
+ 50: ICRFL t38, $0x7, CR
+ 51: INCEIPL $4
+
+ 0xFE7B750: 906101F0 stw r3,496(r1)
+ 52: GETL R3, t40
+ 53: GETL R1, t42
+ 54: ADDL $0x1F0, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0xFE7B754: 9361020C stw r27,524(r1)
+ 57: GETL R27, t44
+ 58: GETL R1, t46
+ 59: ADDL $0x20C, t46
+ 60: STL t44, (t46)
+ 61: INCEIPL $4
+
+ 0xFE7B758: 7D234B78 or r3,r9,r9
+ 62: GETL R9, t48
+ 63: PUTL t48, R3
+ 64: INCEIPL $4
+
+ 0xFE7B75C: 908101F4 stw r4,500(r1)
+ 65: GETL R4, t50
+ 66: GETL R1, t52
+ 67: ADDL $0x1F4, t52
+ 68: STL t50, (t52)
+ 69: INCEIPL $4
+
+ 0xFE7B760: 396B0004 addi r11,r11,4
+ 70: GETL R11, t54
+ 71: ADDL $0x4, t54
+ 72: PUTL t54, R11
+ 73: INCEIPL $4
+
+ 0xFE7B764: 90A101F8 stw r5,504(r1)
+ 74: GETL R5, t56
+ 75: GETL R1, t58
+ 76: ADDL $0x1F8, t58
+ 77: STL t56, (t58)
+ 78: INCEIPL $4
+
+ 0xFE7B768: 39400000 li r10,0
+ 79: MOVL $0x0, t60
+ 80: PUTL t60, R10
+ 81: INCEIPL $4
+
+ 0xFE7B76C: 90C101FC stw r6,508(r1)
+ 82: GETL R6, t62
+ 83: GETL R1, t64
+ 84: ADDL $0x1FC, t64
+ 85: STL t62, (t64)
+ 86: INCEIPL $4
+
+ 0xFE7B770: 419E0010 bc 12,30,0xFE7B780
+ 87: Js30o $0xFE7B780
+
+
+
+. 1503 FE7B720 84
+. 93 C1 02 18 7F C8 02 A6 93 A1 02 14 54 80 10 3A 93 81 02 10 7D 60 2A 14 93 E1 02 1C 83 BE 1C E4 7C FC 3B 78 91 41 02 24 7D 1F 43 78 2F 9D 00 00 90 61 01 F0 93 61 02 0C 7D 23 4B 78 90 81 01 F4 39 6B 00 04 90 A1 01 F8 39 40 00 00 90 C1 01 FC 41 9E 00 10
+==== BB 1504 (0xFE7B780) approx BBs exec'd 0 ====
+
+ 0xFE7B780: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE7B784: 837E1B84 lwz r27,7044(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1B84, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0xFE7B788: 813E1AA4 lwz r9,6820(r30)
+ 9: GETL R30, t8
+ 10: ADDL $0x1AA4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0xFE7B78C: 917B0000 stw r11,0(r27)
+ 14: GETL R11, t12
+ 15: GETL R27, t14
+ 16: STL t12, (t14)
+ 17: INCEIPL $4
+
+ 0xFE7B790: 91490000 stw r10,0(r9)
+ 18: GETL R10, t16
+ 19: GETL R9, t18
+ 20: STL t16, (t18)
+ 21: INCEIPL $4
+
+ 0xFE7B794: 41860010 bc 12,6,0xFE7B7A4
+ 22: Js06o $0xFE7B7A4
+
+
+
+. 1504 FE7B780 24
+. 2C 83 00 00 83 7E 1B 84 81 3E 1A A4 91 7B 00 00 91 49 00 00 41 86 00 10
+==== BB 1505 (0xFE7B798) approx BBs exec'd 0 ====
+
+ 0xFE7B798: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE7B79C: 38A00000 li r5,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFE7B7A0: 48018731 bl 0xFE93ED0
+ 6: MOVL $0xFE7B7A4, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFE93ED0 ($4)
+
+
+
+. 1505 FE7B798 12
+. 38 80 00 00 38 A0 00 00 48 01 87 31
+==== BB 1506 __cxa_atexit_internal(0xFE93ED0) approx BBs exec'd 0 ====
+
+ 0xFE93ED0: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE93ED4: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFE93ED8: 93E1001C stw r31,28(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFE93EDC: 7CBF2B78 or r31,r5,r5
+ 14: GETL R5, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0xFE93EE0: 93810010 stw r28,16(r1)
+ 17: GETL R28, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFE93EE4: 7C9C2378 or r28,r4,r4
+ 22: GETL R4, t16
+ 23: PUTL t16, R28
+ 24: INCEIPL $4
+
+ 0xFE93EE8: 93A10014 stw r29,20(r1)
+ 25: GETL R29, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFE93EEC: 7C7D1B78 or r29,r3,r3
+ 30: GETL R3, t22
+ 31: PUTL t22, R29
+ 32: INCEIPL $4
+
+ 0xFE93EF0: 90010024 stw r0,36(r1)
+ 33: GETL R0, t24
+ 34: GETL R1, t26
+ 35: ADDL $0x24, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0xFE93EF4: 93C10018 stw r30,24(r1)
+ 38: GETL R30, t28
+ 39: GETL R1, t30
+ 40: ADDL $0x18, t30
+ 41: STL t28, (t30)
+ 42: INCEIPL $4
+
+ 0xFE93EF8: 4BFFFE35 bl 0xFE93D2C
+ 43: MOVL $0xFE93EFC, t32
+ 44: PUTL t32, LR
+ 45: JMPo-c $0xFE93D2C ($4)
+
+
+
+. 1506 FE93ED0 44
+. 7C 08 02 A6 94 21 FF E0 93 E1 00 1C 7C BF 2B 78 93 81 00 10 7C 9C 23 78 93 A1 00 14 7C 7D 1B 78 90 01 00 24 93 C1 00 18 4B FF FE 35
+==== BB 1507 __new_exitfn(0xFE93D2C) approx BBs exec'd 0 ====
+
+ 0xFE93D2C: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE93D30: 7C6802A6 mflr r3
+ 6: GETL LR, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFE93D34: 4811411D bl 0xFFA7E50
+ 9: MOVL $0xFE93D38, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1507 FE93D2C 12
+. 94 21 FF E0 7C 68 02 A6 48 11 41 1D
+==== BB 1508 (0xFE93D38) approx BBs exec'd 0 ====
+
+ 0xFE93D38: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE93D3C: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE93D40: 93810010 stw r28,16(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE93D44: 93A10014 stw r29,20(r1)
+ 13: GETL R29, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE93D48: 38000001 li r0,1
+ 18: MOVL $0x1, t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0xFE93D4C: 9361000C stw r27,12(r1)
+ 21: GETL R27, t16
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE93D50: 3BA00000 li r29,0
+ 26: MOVL $0x0, t20
+ 27: PUTL t20, R29
+ 28: INCEIPL $4
+
+ 0xFE93D54: 93E1001C stw r31,28(r1)
+ 29: GETL R31, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x1C, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFE93D58: 90610024 stw r3,36(r1)
+ 34: GETL R3, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x24, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFE93D5C: 839E02B4 lwz r28,692(r30)
+ 39: GETL R30, t30
+ 40: ADDL $0x2B4, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R28
+ 43: INCEIPL $4
+
+ 0xFE93D60: 7D20E028 lwarx r9,r0,r28
+ 44: GETL R28, t34
+ 45: LOCKo
+ 46: LDL (t34), t36
+ 47: PUTL t36, R9
+ 48: INCEIPL $4
+
+ 0xFE93D64: 7C09E800 cmp cr0,r9,r29
+ 49: GETL R9, t38
+ 50: GETL R29, t40
+ 51: CMPL t38, t40, t42 (-rSo)
+ 52: ICRFL t42, $0x0, CR
+ 53: INCEIPL $4
+
+ 0xFE93D68: 4082000C bc 4,2,0xFE93D74
+ 54: Jc02o $0xFE93D74
+
+
+
+. 1508 FE93D38 52
+. 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 A1 00 14 38 00 00 01 93 61 00 0C 3B A0 00 00 93 E1 00 1C 90 61 00 24 83 9E 02 B4 7D 20 E0 28 7C 09 E8 00 40 82 00 0C
+==== BB 1509 (0xFE93D6C) approx BBs exec'd 0 ====
+
+ 0xFE93D6C: 7C00E12D stwcx. r0,r0,r28
+ 0: GETL R28, t0
+ 1: GETL R0, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE93D70: 40A2FFF0 bc 5,2,0xFE93D60
+ 6: Jc02o $0xFE93D60
+
+
+
+. 1509 FE93D6C 8
+. 7C 00 E1 2D 40 A2 FF F0
+==== BB 1510 (0xFE93D60) approx BBs exec'd 0 ====
+
+ 0xFE93D60: 7D20E028 lwarx r9,r0,r28
+ 0: GETL R28, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE93D64: 7C09E800 cmp cr0,r9,r29
+ 5: GETL R9, t4
+ 6: GETL R29, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFE93D68: 4082000C bc 4,2,0xFE93D74
+ 10: Jc02o $0xFE93D74
+
+
+
+. 1510 FE93D60 12
+. 7D 20 E0 28 7C 09 E8 00 40 82 00 0C
+==== BB 1511 (0xFE93D74) approx BBs exec'd 0 ====
+
+ 0xFE93D74: 4C00012C 0: INCEIPL $4
+
+ 0xFE93D78: 2F890000 cmpi cr7,r9,0
+ 1: GETL R9, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE93D7C: 409E0134 bc 4,30,0xFE93EB0
+ 5: Jc30o $0xFE93EB0
+
+
+
+. 1511 FE93D74 12
+. 4C 00 01 2C 2F 89 00 00 40 9E 01 34
+==== BB 1512 (0xFE93D80) approx BBs exec'd 0 ====
+
+ 0xFE93D80: 837E1AFC lwz r27,6908(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1AFC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xFE93D84: 83FB0000 lwz r31,0(r27)
+ 5: GETL R27, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R31
+ 8: INCEIPL $4
+
+ 0xFE93D88: 2F1F0000 cmpi cr6,r31,0
+ 9: GETL R31, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x6, CR
+ 12: INCEIPL $4
+
+ 0xFE93D8C: 419A0050 bc 12,26,0xFE93DDC
+ 13: Js26o $0xFE93DDC
+
+
+
+. 1512 FE93D80 16
+. 83 7E 1A FC 83 FB 00 00 2F 1F 00 00 41 9A 00 50
+==== BB 1513 (0xFE93D90) approx BBs exec'd 0 ====
+
+ 0xFE93D90: 817F0004 lwz r11,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFE93D94: 3BA00000 li r29,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFE93D98: 280B0000 cmpli cr0,r11,0
+ 8: GETL R11, t6
+ 9: MOVL $0x0, t10
+ 10: CMPUL t6, t10, t8 (-rSo)
+ 11: ICRFL t8, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFE93D9C: 40810024 bc 4,1,0xFE93DC0
+ 13: Jc01o $0xFE93DC0
+
+
+
+. 1513 FE93D90 16
+. 81 7F 00 04 3B A0 00 00 28 0B 00 00 40 81 00 24
+==== BB 1514 (0xFE93DC0) approx BBs exec'd 0 ====
+
+ 0xFE93DC0: 7C0BE840 cmpl cr0,r11,r29
+ 0: GETL R11, t0
+ 1: GETL R29, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE93DC4: 41810104 bc 12,1,0xFE93EC8
+ 5: Js01o $0xFE93EC8
+
+
+
+. 1514 FE93DC0 8
+. 7C 0B E8 40 41 81 01 04
+==== BB 1515 (0xFE93DC8) approx BBs exec'd 0 ====
+
+ 0xFE93DC8: 288B001F cmpli cr1,r11,31
+ 0: GETL R11, t0
+ 1: MOVL $0x1F, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFE93DCC: 408500F0 bc 4,5,0xFE93EBC
+ 5: Jc05o $0xFE93EBC
+
+
+
+. 1515 FE93DC8 8
+. 28 8B 00 1F 40 85 00 F0
+==== BB 1516 (0xFE93EBC) approx BBs exec'd 0 ====
+
+ 0xFE93EBC: 392B0001 addi r9,r11,1
+ 0: GETL R11, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFE93EC0: 7D7D5B78 or r29,r11,r11
+ 4: GETL R11, t2
+ 5: PUTL t2, R29
+ 6: INCEIPL $4
+
+ 0xFE93EC4: 913F0004 stw r9,4(r31)
+ 7: GETL R9, t4
+ 8: GETL R31, t6
+ 9: ADDL $0x4, t6
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFE93EC8: 40BAFF40 bc 5,26,0xFE93E08
+ 12: Jc26o $0xFE93E08
+
+
+
+. 1516 FE93EBC 16
+. 39 2B 00 01 7D 7D 5B 78 91 3F 00 04 40 BA FF 40
+==== BB 1517 (0xFE93E08) approx BBs exec'd 0 ====
+
+ 0xFE93E08: 57AA2036 rlwinm r10,r29,4,0,27
+ 0: GETL R29, t0
+ 1: SHLL $0x4, t0
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0xFE93E0C: 39000001 li r8,1
+ 4: MOVL $0x1, t2
+ 5: PUTL t2, R8
+ 6: INCEIPL $4
+
+ 0xFE93E10: 7CEAFA14 add r7,r10,r31
+ 7: GETL R10, t4
+ 8: GETL R31, t6
+ 9: ADDL t4, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0xFE93E14: 91070008 stw r8,8(r7)
+ 12: GETL R8, t8
+ 13: GETL R7, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFE93E18: 39800000 li r12,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R12
+ 19: INCEIPL $4
+
+ 0xFE93E1C: 7C0004AC sync
+ 20: INCEIPL $4
+
+ 0xFE93E20: 7D60E028 lwarx r11,r0,r28
+ 21: GETL R28, t14
+ 22: LOCKo
+ 23: LDL (t14), t16
+ 24: PUTL t16, R11
+ 25: INCEIPL $4
+
+ 0xFE93E24: 7D80E12D stwcx. r12,r0,r28
+ 26: GETL R28, t18
+ 27: GETL R12, t20
+ 28: LOCKo
+ 29: STL t20, (t18) (-rSo)
+ 30: ICRFL cr, $0x0, CR
+ 31: INCEIPL $4
+
+ 0xFE93E28: 40A2FFF8 bc 5,2,0xFE93E20
+ 32: Jc02o $0xFE93E20
+
+
+
+. 1517 FE93E08 36
+. 57 AA 20 36 39 00 00 01 7C EA FA 14 91 07 00 08 39 80 00 00 7C 00 04 AC 7D 60 E0 28 7D 80 E1 2D 40 A2 FF F8
+==== BB 1518 (0xFE93E2C) approx BBs exec'd 0 ====
+
+ 0xFE93E2C: 2F8B0001 cmpi cr7,r11,1
+ 0: GETL R11, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE93E30: 419D0060 bc 12,29,0xFE93E90
+ 5: Js29o $0xFE93E90
+
+
+
+. 1518 FE93E2C 8
+. 2F 8B 00 01 41 9D 00 60
+==== BB 1519 (0xFE93E34) approx BBs exec'd 0 ====
+
+ 0xFE93E34: 419A0034 bc 12,26,0xFE93E68
+ 0: Js26o $0xFE93E68
+
+
+
+. 1519 FE93E34 4
+. 41 9A 00 34
+==== BB 1520 (0xFE93E38) approx BBs exec'd 0 ====
+
+ 0xFE93E38: 57BC2036 rlwinm r28,r29,4,0,27
+ 0: GETL R29, t0
+ 1: SHLL $0x4, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0xFE93E3C: 83A10024 lwz r29,36(r1)
+ 4: GETL R1, t2
+ 5: ADDL $0x24, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0xFE93E40: 7F7CFA14 add r27,r28,r31
+ 9: GETL R28, t6
+ 10: GETL R31, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0xFE93E44: 83C10018 lwz r30,24(r1)
+ 14: GETL R1, t10
+ 15: ADDL $0x18, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R30
+ 18: INCEIPL $4
+
+ 0xFE93E48: 387B0008 addi r3,r27,8
+ 19: GETL R27, t14
+ 20: ADDL $0x8, t14
+ 21: PUTL t14, R3
+ 22: INCEIPL $4
+
+ 0xFE93E4C: 7FA803A6 mtlr r29
+ 23: GETL R29, t16
+ 24: PUTL t16, LR
+ 25: INCEIPL $4
+
+ 0xFE93E50: 8361000C lwz r27,12(r1)
+ 26: GETL R1, t18
+ 27: ADDL $0xC, t18
+ 28: LDL (t18), t20
+ 29: PUTL t20, R27
+ 30: INCEIPL $4
+
+ 0xFE93E54: 83810010 lwz r28,16(r1)
+ 31: GETL R1, t22
+ 32: ADDL $0x10, t22
+ 33: LDL (t22), t24
+ 34: PUTL t24, R28
+ 35: INCEIPL $4
+
+ 0xFE93E58: 83A10014 lwz r29,20(r1)
+ 36: GETL R1, t26
+ 37: ADDL $0x14, t26
+ 38: LDL (t26), t28
+ 39: PUTL t28, R29
+ 40: INCEIPL $4
+
+ 0xFE93E5C: 83E1001C lwz r31,28(r1)
+ 41: GETL R1, t30
+ 42: ADDL $0x1C, t30
+ 43: LDL (t30), t32
+ 44: PUTL t32, R31
+ 45: INCEIPL $4
+
+ 0xFE93E60: 38210020 addi r1,r1,32
+ 46: GETL R1, t34
+ 47: ADDL $0x20, t34
+ 48: PUTL t34, R1
+ 49: INCEIPL $4
+
+ 0xFE93E64: 4E800020 blr
+ 50: GETL LR, t36
+ 51: JMPo-r t36 ($4)
+
+
+
+. 1520 FE93E38 48
+. 57 BC 20 36 83 A1 00 24 7F 7C FA 14 83 C1 00 18 38 7B 00 08 7F A8 03 A6 83 61 00 0C 83 81 00 10 83 A1 00 14 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1521 (0xFE93EFC) approx BBs exec'd 0 ====
+
+ 0xFE93EFC: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFE93F00: 3800FFFF li r0,-1
+ 4: MOVL $0xFFFFFFFF, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFE93F04: 4182001C bc 12,2,0xFE93F20
+ 7: Js02o $0xFE93F20
+
+
+
+. 1521 FE93EFC 12
+. 2C 03 00 00 38 00 FF FF 41 82 00 1C
+==== BB 1522 (0xFE93F08) approx BBs exec'd 0 ====
+
+ 0xFE93F08: 38800004 li r4,4
+ 0: MOVL $0x4, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE93F0C: 93E3000C stw r31,12(r3)
+ 3: GETL R31, t2
+ 4: GETL R3, t4
+ 5: ADDL $0xC, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFE93F10: 90830000 stw r4,0(r3)
+ 8: GETL R4, t6
+ 9: GETL R3, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFE93F14: 38000000 li r0,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0xFE93F18: 93A30004 stw r29,4(r3)
+ 15: GETL R29, t12
+ 16: GETL R3, t14
+ 17: ADDL $0x4, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFE93F1C: 93830008 stw r28,8(r3)
+ 20: GETL R28, t16
+ 21: GETL R3, t18
+ 22: ADDL $0x8, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0xFE93F20: 80A10024 lwz r5,36(r1)
+ 25: GETL R1, t20
+ 26: ADDL $0x24, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R5
+ 29: INCEIPL $4
+
+ 0xFE93F24: 7C030378 or r3,r0,r0
+ 30: GETL R0, t24
+ 31: PUTL t24, R3
+ 32: INCEIPL $4
+
+ 0xFE93F28: 83810010 lwz r28,16(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x10, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R28
+ 37: INCEIPL $4
+
+ 0xFE93F2C: 83A10014 lwz r29,20(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x14, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R29
+ 42: INCEIPL $4
+
+ 0xFE93F30: 7CA803A6 mtlr r5
+ 43: GETL R5, t34
+ 44: PUTL t34, LR
+ 45: INCEIPL $4
+
+ 0xFE93F34: 83C10018 lwz r30,24(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x18, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R30
+ 50: INCEIPL $4
+
+ 0xFE93F38: 83E1001C lwz r31,28(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x1C, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R31
+ 55: INCEIPL $4
+
+ 0xFE93F3C: 38210020 addi r1,r1,32
+ 56: GETL R1, t44
+ 57: ADDL $0x20, t44
+ 58: PUTL t44, R1
+ 59: INCEIPL $4
+
+ 0xFE93F40: 4E800020 blr
+ 60: GETL LR, t46
+ 61: JMPo-r t46 ($4)
+
+
+
+. 1522 FE93F08 60
+. 38 80 00 04 93 E3 00 0C 90 83 00 00 38 00 00 00 93 A3 00 04 93 83 00 08 80 A1 00 24 7C 03 03 78 83 81 00 10 83 A1 00 14 7C A8 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1523 (0xFE7B7A4) approx BBs exec'd 0 ====
+
+ 0xFE7B7A4: 2F1F0000 cmpi cr6,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE7B7A8: 419A0014 bc 12,26,0xFE7B7BC
+ 4: Js26o $0xFE7B7BC
+
+
+
+. 1523 FE7B7A4 8
+. 2F 1F 00 00 41 9A 00 14
+==== BB 1524 (0xFE7B7AC) approx BBs exec'd 0 ====
+
+ 0xFE7B7AC: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE7B7B0: 38800000 li r4,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE7B7B4: 38A00000 li r5,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFE7B7B8: 48018719 bl 0xFE93ED0
+ 9: MOVL $0xFE7B7BC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFE93ED0 ($4)
+
+
+
+. 1524 FE7B7AC 16
+. 7F E3 FB 78 38 80 00 00 38 A0 00 00 48 01 87 19
+==== BB 1525 (0xFE93DA0) approx BBs exec'd 0 ====
+
+ 0xFE93DA0: 393F0008 addi r9,r31,8
+ 0: GETL R31, t0
+ 1: ADDL $0x8, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFE93DA4: 80890000 lwz r4,0(r9)
+ 4: GETL R9, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFE93DA8: 39290010 addi r9,r9,16
+ 8: GETL R9, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0xFE93DAC: 2C840000 cmpi cr1,r4,0
+ 12: GETL R4, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x1, CR
+ 15: INCEIPL $4
+
+ 0xFE93DB0: 41860010 bc 12,6,0xFE93DC0
+ 16: Js06o $0xFE93DC0
+
+
+
+. 1525 FE93DA0 20
+. 39 3F 00 08 80 89 00 00 39 29 00 10 2C 84 00 00 41 86 00 10
+==== BB 1526 (0xFE93DB4) approx BBs exec'd 0 ====
+
+ 0xFE93DB4: 3BBD0001 addi r29,r29,1
+ 0: GETL R29, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0xFE93DB8: 7F8BE840 cmpl cr7,r11,r29
+ 4: GETL R11, t2
+ 5: GETL R29, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFE93DBC: 419DFFE8 bc 12,29,0xFE93DA4
+ 9: Js29o $0xFE93DA4
+
+
+
+. 1526 FE93DB4 12
+. 3B BD 00 01 7F 8B E8 40 41 9D FF E8
+==== BB 1527 (0xFE7B7BC) approx BBs exec'd 0 ====
+
+ 0xFE7B7BC: 83FE1BC8 lwz r31,7112(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BC8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFE7B7C0: 807F0000 lwz r3,0(r31)
+ 5: GETL R31, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFE7B7C4: 70690002 andi. r9,r3,0x2
+ 9: GETL R3, t8
+ 10: ANDL $0x2, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFE7B7C8: 7FA00026 mfcr r29
+ 15: GETL CR, t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0xFE7B7CC: 40820080 bc 4,2,0xFE7B84C
+ 18: Jc02o $0xFE7B84C
+
+
+
+. 1527 FE7B7BC 20
+. 83 FE 1B C8 80 7F 00 00 70 69 00 02 7F A0 00 26 40 82 00 80
+==== BB 1528 (0xFE7B7D0) approx BBs exec'd 0 ====
+
+ 0xFE7B7D0: 2F9C0000 cmpi cr7,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE7B7D4: 419E001C bc 12,30,0xFE7B7F0
+ 4: Js30o $0xFE7B7F0
+
+
+
+. 1528 FE7B7D0 8
+. 2F 9C 00 00 41 9E 00 1C
+==== BB 1529 (0xFE7B7D8) approx BBs exec'd 0 ====
+
+ 0xFE7B7D8: 80BB0000 lwz r5,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFE7B7DC: 7F8803A6 mtlr r28
+ 4: GETL R28, t4
+ 5: PUTL t4, LR
+ 6: INCEIPL $4
+
+ 0xFE7B7E0: 806101F4 lwz r3,500(r1)
+ 7: GETL R1, t6
+ 8: ADDL $0x1F4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R3
+ 11: INCEIPL $4
+
+ 0xFE7B7E4: 808101F8 lwz r4,504(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x1F8, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R4
+ 16: INCEIPL $4
+
+ 0xFE7B7E8: 80C101FC lwz r6,508(r1)
+ 17: GETL R1, t14
+ 18: ADDL $0x1FC, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R6
+ 21: INCEIPL $4
+
+ 0xFE7B7EC: 4E800021 blrl
+ 22: GETL LR, t18
+ 23: MOVL $0xFE7B7F0, t20
+ 24: PUTL t20, LR
+ 25: JMPo-r t18 ($4)
+
+
+
+. 1529 FE7B7D8 24
+. 80 BB 00 00 7F 88 03 A6 80 61 01 F4 80 81 01 F8 80 C1 01 FC 4E 80 00 21
+==== BB 1530 (0x10007A24) approx BBs exec'd 0 ====
+
+ 0x10007A24: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x10007A28: 7CA802A6 mflr r5
+ 6: GETL LR, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x10007A2C: 429F0005 bcl 20,31,0x10007A30
+ 9: MOVL $0x10007A30, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x10007A30: 93C10018 stw r30,24(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x10007A34: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0x10007A38: 93810010 stw r28,16(r1)
+ 20: GETL R28, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x10, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x10007A3C: 93E1001C stw r31,28(r1)
+ 25: GETL R31, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0x10007A40: 93A10014 stw r29,20(r1)
+ 30: GETL R29, t22
+ 31: GETL R1, t24
+ 32: ADDL $0x14, t24
+ 33: STL t22, (t24)
+ 34: INCEIPL $4
+
+ 0x10007A44: 809EFFF0 lwz r4,-16(r30)
+ 35: GETL R30, t26
+ 36: ADDL $0xFFFFFFF0, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R4
+ 39: INCEIPL $4
+
+ 0x10007A48: 90A10024 stw r5,36(r1)
+ 40: GETL R5, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x24, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x10007A4C: 7FC4F214 add r30,r4,r30
+ 45: GETL R4, t34
+ 46: GETL R30, t36
+ 47: ADDL t34, t36
+ 48: PUTL t36, R30
+ 49: INCEIPL $4
+
+ 0x10007A50: 4BFF957D bl 0x10000FCC
+ 50: MOVL $0x10007A54, t38
+ 51: PUTL t38, LR
+ 52: JMPo-c $0x10000FCC ($4)
+
+
+
+. 1530 10007A24 48
+. 94 21 FF E0 7C A8 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 E1 00 1C 93 A1 00 14 80 9E FF F0 90 A1 00 24 7F C4 F2 14 4B FF 95 7D
+==== BB 1531 (0x10000FCC) approx BBs exec'd 0 ====
+
+ 0x10000FCC: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x10000FD0: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x10000FD4: 90010024 stw r0,36(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x24, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x10000FD8: 48000041 bl 0x10001018
+ 14: MOVL $0x10000FDC, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x10001018 ($4)
+
+
+
+. 1531 10000FCC 16
+. 94 21 FF E0 7C 08 02 A6 90 01 00 24 48 00 00 41
+==== BB 1532 (0x10001018) approx BBs exec'd 0 ====
+
+ 0x10001018: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x1000101C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x10001020: 93C10018 stw r30,24(r1)
+ 9: GETL R30, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x10001024: 90010024 stw r0,36(r1)
+ 14: GETL R0, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x24, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x10001028: 48019885 bl 0x1001A8AC
+ 19: MOVL $0x1000102C, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x1001A8AC ($4)
+
+
+
+. 1532 10001018 20
+. 94 21 FF E0 7C 08 02 A6 93 C1 00 18 90 01 00 24 48 01 98 85
+==== BB 1533 (0x1001A8AC) approx BBs exec'd 0 ====
+
+ 0x1001A8AC: 4E800021 blrl
+ 0: GETL LR, t0
+ 1: MOVL $0x1001A8B0, t2
+ 2: PUTL t2, LR
+ 3: JMPo-r t0 ($4)
+
+
+
+. 1533 1001A8AC 4
+. 4E 80 00 21
+==== BB 1534 (0x1000102C) approx BBs exec'd 0 ====
+
+ 0x1000102C: 7FC802A6 mflr r30
+ 0: GETL LR, t0
+ 1: PUTL t0, R30
+ 2: INCEIPL $4
+
+ 0x10001030: 801E020C lwz r0,524(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x20C, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x10001034: 2F800000 cmpi cr7,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x10001038: 419E000C bc 12,30,0x10001044
+ 12: Js30o $0x10001044
+
+
+
+. 1534 1000102C 16
+. 7F C8 02 A6 80 1E 02 0C 2F 80 00 00 41 9E 00 0C
+==== BB 1535 (0x10001044) approx BBs exec'd 0 ====
+
+ 0x10001044: 80010024 lwz r0,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10001048: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0x1000104C: 83C10018 lwz r30,24(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x18, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0x10001050: 38210020 addi r1,r1,32
+ 13: GETL R1, t10
+ 14: ADDL $0x20, t10
+ 15: PUTL t10, R1
+ 16: INCEIPL $4
+
+ 0x10001054: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 1535 10001044 20
+. 80 01 00 24 7C 08 03 A6 83 C1 00 18 38 21 00 20 4E 80 00 20
+==== BB 1536 (0x10000FDC) approx BBs exec'd 0 ====
+
+ 0x10000FDC: 48000105 bl 0x100010E0
+ 0: MOVL $0x10000FE0, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x100010E0 ($4)
+
+
+
+. 1536 10000FDC 4
+. 48 00 01 05
+==== BB 1537 (0x100010E0) approx BBs exec'd 0 ====
+
+ 0x100010E0: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x100010E4: 3D601002 lis r11,4098
+ 3: MOVL $0x10020000, t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0x100010E8: 9421FFF0 stwu r1,-16(r1)
+ 6: GETL R1, t4
+ 7: GETL R1, t6
+ 8: ADDL $0xFFFFFFF0, t6
+ 9: PUTL t6, R1
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x100010EC: 3D200000 lis r9,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x100010F0: 39290000 addi r9,r9,0
+ 15: MOVL $0x0, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x100010F4: 386BA010 addi r3,r11,-24560
+ 18: MOVL $0x1001A010, t12
+ 19: PUTL t12, R3
+ 20: INCEIPL $4
+
+ 0x100010F8: 90010014 stw r0,20(r1)
+ 21: GETL R0, t14
+ 22: GETL R1, t16
+ 23: ADDL $0x14, t16
+ 24: STL t14, (t16)
+ 25: INCEIPL $4
+
+ 0x100010FC: 800BA010 lwz r0,-24560(r11)
+ 26: MOVL $0x1001A010, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R0
+ 29: INCEIPL $4
+
+ 0x10001100: 2F800000 cmpi cr7,r0,0
+ 30: GETL R0, t22
+ 31: CMP0L t22, t24 (-rSo)
+ 32: ICRFL t24, $0x7, CR
+ 33: INCEIPL $4
+
+ 0x10001104: 419E0014 bc 12,30,0x10001118
+ 34: Js30o $0x10001118
+
+
+
+. 1537 100010E0 40
+. 7C 08 02 A6 3D 60 10 02 94 21 FF F0 3D 20 00 00 39 29 00 00 38 6B A0 10 90 01 00 14 80 0B A0 10 2F 80 00 00 41 9E 00 14
+==== BB 1538 (0x10001118) approx BBs exec'd 0 ====
+
+ 0x10001118: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x1000111C: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x10001120: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x10001124: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 1538 10001118 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 1539 (0x10000FE0) approx BBs exec'd 0 ====
+
+ 0x10000FE0: 48006D91 bl 0x10007D70
+ 0: MOVL $0x10000FE4, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x10007D70 ($4)
+
+
+
+. 1539 10000FE0 4
+. 48 00 6D 91
+==== BB 1540 (0x10007D70) approx BBs exec'd 0 ====
+
+ 0x10007D70: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x10007D74: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x10007D78: 3D201002 lis r9,4098
+ 9: MOVL $0x10020000, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0x10007D7C: 93E1000C stw r31,12(r1)
+ 12: GETL R31, t8
+ 13: GETL R1, t10
+ 14: ADDL $0xC, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x10007D80: 3929A004 addi r9,r9,-24572
+ 17: MOVL $0x1001A004, t12
+ 18: PUTL t12, R9
+ 19: INCEIPL $4
+
+ 0x10007D84: 90010014 stw r0,20(r1)
+ 20: GETL R0, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x10007D88: 3BE9FFFC addi r31,r9,-4
+ 25: MOVL $0x1001A000, t18
+ 26: PUTL t18, R31
+ 27: INCEIPL $4
+
+ 0x10007D8C: 8009FFFC lwz r0,-4(r9)
+ 28: MOVL $0x1001A000, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R0
+ 31: INCEIPL $4
+
+ 0x10007D90: 48000010 b 0x10007DA0
+ 32: JMPo $0x10007DA0 ($4)
+
+
+
+. 1540 10007D70 36
+. 7C 08 02 A6 94 21 FF F0 3D 20 10 02 93 E1 00 0C 39 29 A0 04 90 01 00 14 3B E9 FF FC 80 09 FF FC 48 00 00 10
+==== BB 1541 (0x10007DA0) approx BBs exec'd 0 ====
+
+ 0x10007DA0: 2F80FFFF cmpi cr7,r0,-1
+ 0: GETL R0, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x10007DA4: 409EFFF0 bc 4,30,0x10007D94
+ 5: Jc30o $0x10007D94
+
+
+
+. 1541 10007DA0 8
+. 2F 80 FF FF 40 9E FF F0
+==== BB 1542 (0x10007DA8) approx BBs exec'd 0 ====
+
+ 0x10007DA8: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10007DAC: 83E1000C lwz r31,12(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0x10007DB0: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0x10007DB4: 7C0803A6 mtlr r0
+ 14: GETL R0, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0x10007DB8: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 1542 10007DA8 20
+. 80 01 00 14 83 E1 00 0C 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 1543 (0x10000FE4) approx BBs exec'd 0 ====
+
+ 0x10000FE4: 80010024 lwz r0,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10000FE8: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0x10000FEC: 38210020 addi r1,r1,32
+ 8: GETL R1, t6
+ 9: ADDL $0x20, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0x10000FF0: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 1543 10000FE4 16
+. 80 01 00 24 7C 08 03 A6 38 21 00 20 4E 80 00 20
+==== BB 1544 (0x10007A54) approx BBs exec'd 0 ====
+
+ 0x10007A54: 839E8004 lwz r28,-32764(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8004, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x10007A58: 807E8000 lwz r3,-32768(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0xFFFF8000, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x10007A5C: 3BE00000 li r31,0
+ 10: MOVL $0x0, t8
+ 11: PUTL t8, R31
+ 12: INCEIPL $4
+
+ 0x10007A60: 7C1C1850 subf r0,r28,r3
+ 13: GETL R28, t10
+ 14: GETL R3, t12
+ 15: SUBL t10, t12
+ 16: PUTL t12, R0
+ 17: INCEIPL $4
+
+ 0x10007A64: 7C001670 srawi r0,r0,2
+ 18: GETL R0, t14
+ 19: SARL $0x2, t14 (-wCa)
+ 20: PUTL t14, R0
+ 21: INCEIPL $4
+
+ 0x10007A68: 7F9F0040 cmpl cr7,r31,r0
+ 22: GETL R31, t16
+ 23: GETL R0, t18
+ 24: CMPUL t16, t18, t20 (-rSo)
+ 25: ICRFL t20, $0x7, CR
+ 26: INCEIPL $4
+
+ 0x10007A6C: 409C0024 bc 4,28,0x10007A90
+ 27: Jc28o $0x10007A90
+
+
+
+. 1544 10007A54 28
+. 83 9E 80 04 80 7E 80 00 3B E0 00 00 7C 1C 18 50 7C 00 16 70 7F 9F 00 40 40 9C 00 24
+==== BB 1545 (0x10007A90) approx BBs exec'd 0 ====
+
+ 0x10007A90: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x10007A94: 83810010 lwz r28,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x10007A98: 83A10014 lwz r29,20(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0x10007A9C: 7D0803A6 mtlr r8
+ 15: GETL R8, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x10007AA0: 83C10018 lwz r30,24(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x18, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R30
+ 22: INCEIPL $4
+
+ 0x10007AA4: 83E1001C lwz r31,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R31
+ 27: INCEIPL $4
+
+ 0x10007AA8: 38210020 addi r1,r1,32
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: PUTL t22, R1
+ 31: INCEIPL $4
+
+ 0x10007AAC: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+
+. 1545 10007A90 32
+. 81 01 00 24 83 81 00 10 83 A1 00 14 7D 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1546 (0xFE7B7F0) approx BBs exec'd 0 ====
+
+ 0xFE7B7F0: 7FA80120 mtcrf 0x80,r29
+ 0: GETL R29, t0
+ 1: ICRFL t0, $0x0, CR
+ 2: INCEIPL $4
+
+ 0xFE7B7F4: 408200B0 bc 4,2,0xFE7B8A4
+ 3: Jc02o $0xFE7B8A4
+
+
+
+. 1546 FE7B7F0 8
+. 7F A8 01 20 40 82 00 B0
+==== BB 1547 (0xFE7B7F8) approx BBs exec'd 0 ====
+
+ 0xFE7B7F8: 38610010 addi r3,r1,16
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFE7B7FC: 48014F9D bl 0xFE90798
+ 4: MOVL $0xFE7B800, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0xFE90798 ($4)
+
+
+
+. 1547 FE7B7F8 8
+. 38 61 00 10 48 01 4F 9D
+==== BB 1548 __GI__setjmp(0xFE90798) approx BBs exec'd 0 ====
+
+ 0xFE90798: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE9079C: 4BFFFC94 b 0xFE90430
+ 3: JMPo $0xFE90430 ($4)
+
+
+
+. 1548 FE90798 8
+. 38 80 00 00 4B FF FC 94
+==== BB 1549 __sigsetjmp@@GLIBC_2.3.4(0xFE90430) approx BBs exec'd 0 ====
+
+ 0xFE90430: 90230000 stw r1,0(r3)
+ 0: GETL R1, t0
+ 1: GETL R3, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE90434: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFE90438: 91C3000C stw r14,12(r3)
+ 7: GETL R14, t6
+ 8: GETL R3, t8
+ 9: ADDL $0xC, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFE9043C: D9C30058 stfd f14,88(r3)
+ 12: GETL R3, t10
+ 13: ADDL $0x58, t10
+ 14: FPU_WQ 0x0:0xE, (t10)
+ 15: INCEIPL $4
+
+ 0xFE90440: 90030008 stw r0,8(r3)
+ 16: GETL R0, t12
+ 17: GETL R3, t14
+ 18: ADDL $0x8, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFE90444: 91E30010 stw r15,16(r3)
+ 21: GETL R15, t16
+ 22: GETL R3, t18
+ 23: ADDL $0x10, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE90448: D9E30060 stfd f15,96(r3)
+ 26: GETL R3, t20
+ 27: ADDL $0x60, t20
+ 28: FPU_WQ 0x0:0xF, (t20)
+ 29: INCEIPL $4
+
+ 0xFE9044C: 7C000026 mfcr r0
+ 30: GETL CR, t22
+ 31: PUTL t22, R0
+ 32: INCEIPL $4
+
+ 0xFE90450: 92030014 stw r16,20(r3)
+ 33: GETL R16, t24
+ 34: GETL R3, t26
+ 35: ADDL $0x14, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0xFE90454: DA030068 stfd f16,104(r3)
+ 38: GETL R3, t28
+ 39: ADDL $0x68, t28
+ 40: FPU_WQ 0x0:0x10, (t28)
+ 41: INCEIPL $4
+
+ 0xFE90458: 90030054 stw r0,84(r3)
+ 42: GETL R0, t30
+ 43: GETL R3, t32
+ 44: ADDL $0x54, t32
+ 45: STL t30, (t32)
+ 46: INCEIPL $4
+
+ 0xFE9045C: 92230018 stw r17,24(r3)
+ 47: GETL R17, t34
+ 48: GETL R3, t36
+ 49: ADDL $0x18, t36
+ 50: STL t34, (t36)
+ 51: INCEIPL $4
+
+ 0xFE90460: DA230070 stfd f17,112(r3)
+ 52: GETL R3, t38
+ 53: ADDL $0x70, t38
+ 54: FPU_WQ 0x0:0x11, (t38)
+ 55: INCEIPL $4
+
+ 0xFE90464: 9243001C stw r18,28(r3)
+ 56: GETL R18, t40
+ 57: GETL R3, t42
+ 58: ADDL $0x1C, t42
+ 59: STL t40, (t42)
+ 60: INCEIPL $4
+
+ 0xFE90468: DA430078 stfd f18,120(r3)
+ 61: GETL R3, t44
+ 62: ADDL $0x78, t44
+ 63: FPU_WQ 0x0:0x12, (t44)
+ 64: INCEIPL $4
+
+ 0xFE9046C: 92630020 stw r19,32(r3)
+ 65: GETL R19, t46
+ 66: GETL R3, t48
+ 67: ADDL $0x20, t48
+ 68: STL t46, (t48)
+ 69: INCEIPL $4
+
+ 0xFE90470: DA630080 stfd f19,128(r3)
+ 70: GETL R3, t50
+ 71: ADDL $0x80, t50
+ 72: FPU_WQ 0x0:0x13, (t50)
+ 73: INCEIPL $4
+
+ 0xFE90474: 92830024 stw r20,36(r3)
+ 74: GETL R20, t52
+ 75: GETL R3, t54
+ 76: ADDL $0x24, t54
+ 77: STL t52, (t54)
+ 78: INCEIPL $4
+
+ 0xFE90478: DA830088 stfd f20,136(r3)
+ 79: GETL R3, t56
+ 80: ADDL $0x88, t56
+ 81: FPU_WQ 0x0:0x14, (t56)
+ 82: INCEIPL $4
+
+ 0xFE9047C: 92A30028 stw r21,40(r3)
+ 83: GETL R21, t58
+ 84: GETL R3, t60
+ 85: ADDL $0x28, t60
+ 86: STL t58, (t60)
+ 87: INCEIPL $4
+
+ 0xFE90480: DAA30090 stfd f21,144(r3)
+ 88: GETL R3, t62
+ 89: ADDL $0x90, t62
+ 90: FPU_WQ 0x0:0x15, (t62)
+ 91: INCEIPL $4
+
+ 0xFE90484: 92C3002C stw r22,44(r3)
+ 92: GETL R22, t64
+ 93: GETL R3, t66
+ 94: ADDL $0x2C, t66
+ 95: STL t64, (t66)
+ 96: INCEIPL $4
+
+ 0xFE90488: DAC30098 stfd f22,152(r3)
+ 97: GETL R3, t68
+ 98: ADDL $0x98, t68
+ 99: FPU_WQ 0x0:0x16, (t68)
+ 100: INCEIPL $4
+
+ 0xFE9048C: 92E30030 stw r23,48(r3)
+ 101: GETL R23, t70
+ 102: GETL R3, t72
+ 103: ADDL $0x30, t72
+ 104: STL t70, (t72)
+ 105: INCEIPL $4
+
+ 0xFE90490: DAE300A0 stfd f23,160(r3)
+ 106: GETL R3, t74
+ 107: ADDL $0xA0, t74
+ 108: FPU_WQ 0x0:0x17, (t74)
+ 109: INCEIPL $4
+
+ 0xFE90494: 93030034 stw r24,52(r3)
+ 110: GETL R24, t76
+ 111: GETL R3, t78
+ 112: ADDL $0x34, t78
+ 113: STL t76, (t78)
+ 114: INCEIPL $4
+
+ 0xFE90498: DB0300A8 stfd f24,168(r3)
+ 115: GETL R3, t80
+ 116: ADDL $0xA8, t80
+ 117: FPU_WQ 0x0:0x18, (t80)
+ 118: INCEIPL $4
+
+ 0xFE9049C: 93230038 stw r25,56(r3)
+ 119: GETL R25, t82
+ 120: GETL R3, t84
+ 121: ADDL $0x38, t84
+ 122: STL t82, (t84)
+ 123: INCEIPL $4
+
+ 0xFE904A0: DB2300B0 stfd f25,176(r3)
+ 124: GETL R3, t86
+ 125: ADDL $0xB0, t86
+ 126: FPU_WQ 0x0:0x19, (t86)
+ 127: INCEIPL $4
+
+ 0xFE904A4: 9343003C stw r26,60(r3)
+ 128: GETL R26, t88
+ 129: GETL R3, t90
+ 130: ADDL $0x3C, t90
+ 131: STL t88, (t90)
+ 132: INCEIPL $4
+
+ 0xFE904A8: DB4300B8 stfd f26,184(r3)
+ 133: GETL R3, t92
+ 134: ADDL $0xB8, t92
+ 135: FPU_WQ 0x0:0x1A, (t92)
+ 136: INCEIPL $4
+
+ 0xFE904AC: 93630040 stw r27,64(r3)
+ 137: GETL R27, t94
+ 138: GETL R3, t96
+ 139: ADDL $0x40, t96
+ 140: STL t94, (t96)
+ 141: INCEIPL $4
+
+ 0xFE904B0: DB6300C0 stfd f27,192(r3)
+ 142: GETL R3, t98
+ 143: ADDL $0xC0, t98
+ 144: FPU_WQ 0x0:0x1B, (t98)
+ 145: INCEIPL $4
+
+ 0xFE904B4: 93830044 stw r28,68(r3)
+ 146: GETL R28, t100
+ 147: GETL R3, t102
+ 148: ADDL $0x44, t102
+ 149: STL t100, (t102)
+ 150: INCEIPL $4
+
+ 0xFE904B8: DB8300C8 stfd f28,200(r3)
+ 151: GETL R3, t104
+ 152: ADDL $0xC8, t104
+ 153: FPU_WQ 0x0:0x1C, (t104)
+ 154: INCEIPL $4
+
+ 0xFE904BC: 93A30048 stw r29,72(r3)
+ 155: GETL R29, t106
+ 156: GETL R3, t108
+ 157: ADDL $0x48, t108
+ 158: STL t106, (t108)
+ 159: INCEIPL $4
+
+ 0xFE904C0: DBA300D0 stfd f29,208(r3)
+ 160: GETL R3, t110
+ 161: ADDL $0xD0, t110
+ 162: FPU_WQ 0x0:0x1D, (t110)
+ 163: INCEIPL $4
+
+ 0xFE904C4: 93C3004C stw r30,76(r3)
+ 164: GETL R30, t112
+ 165: GETL R3, t114
+ 166: ADDL $0x4C, t114
+ 167: STL t112, (t114)
+ 168: INCEIPL $4
+
+ 0xFE904C8: DBC300D8 stfd f30,216(r3)
+ 169: GETL R3, t116
+ 170: ADDL $0xD8, t116
+ 171: FPU_WQ 0x0:0x1E, (t116)
+ 172: INCEIPL $4
+
+ 0xFE904CC: 93E30050 stw r31,80(r3)
+ 173: GETL R31, t118
+ 174: GETL R3, t120
+ 175: ADDL $0x50, t120
+ 176: STL t118, (t120)
+ 177: INCEIPL $4
+
+ 0xFE904D0: DBE300E0 stfd f31,224(r3)
+ 178: GETL R3, t122
+ 179: ADDL $0xE0, t122
+ 180: FPU_WQ 0x0:0x1F, (t122)
+ 181: INCEIPL $4
+
+ 0xFE904D4: 7CC802A6 mflr r6
+ 182: GETL LR, t124
+ 183: PUTL t124, R6
+ 184: INCEIPL $4
+
+ 0xFE904D8: 48117979 bl 0xFFA7E50
+ 185: MOVL $0xFE904DC, t126
+ 186: PUTL t126, LR
+ 187: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1549 FE90430 172
+. 90 23 00 00 7C 08 02 A6 91 C3 00 0C D9 C3 00 58 90 03 00 08 91 E3 00 10 D9 E3 00 60 7C 00 00 26 92 03 00 14 DA 03 00 68 90 03 00 54 92 23 00 18 DA 23 00 70 92 43 00 1C DA 43 00 78 92 63 00 20 DA 63 00 80 92 83 00 24 DA 83 00 88 92 A3 00 28 DA A3 00 90 92 C3 00 2C DA C3 00 98 92 E3 00 30 DA E3 00 A0 93 03 00 34 DB 03 00 A8 93 23 00 38 DB 23 00 B0 93 43 00 3C DB 43 00 B8 93 63 00 40 DB 63 00 C0 93 83 00 44 DB 83 00 C8 93 A3 00 48 DB A3 00 D0 93 C3 00 4C DB C3 00 D8 93 E3 00 50 DB E3 00 E0 7C C8 02 A6 48 11 79 79
+==== BB 1550 (0xFE904DC) approx BBs exec'd 0 ====
+
+ 0xFE904DC: 7CA802A6 mflr r5
+ 0: GETL LR, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFE904E0: 80A51BC8 lwz r5,7112(r5)
+ 3: GETL R5, t2
+ 4: ADDL $0x1BC8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFE904E4: 7CC803A6 mtlr r6
+ 8: GETL R6, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0xFE904E8: 80A5003C lwz r5,60(r5)
+ 11: GETL R5, t8
+ 12: ADDL $0x3C, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0xFE904EC: 74A51000 andis. r5,r5,0x1000
+ 16: GETL R5, t12
+ 17: ANDL $0x10000000, t12
+ 18: PUTL t12, R5
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x0, CR
+ 21: INCEIPL $4
+
+ 0xFE904F0: 41820158 bc 12,2,0xFE90648
+ 22: Js02o $0xFE90648
+
+
+
+. 1550 FE904DC 24
+. 7C A8 02 A6 80 A5 1B C8 7C C8 03 A6 80 A5 00 3C 74 A5 10 00 41 82 01 58
+==== BB 1551 (0xFE904F4) approx BBs exec'd 0 ====
+
+ 0xFE904F4: 38A30100 addi r5,r3,256
+ 0: GETL R3, t0
+ 1: ADDL $0x100, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0xFE904F8: 70A6000F andi. r6,r5,0xF
+ 4: GETL R5, t2
+ 5: ANDL $0xF, t2
+ 6: PUTL t2, R6
+ 7: CMP0L t2, t4 (-rSo)
+ 8: ICRFL t4, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFE904FC: 7C0042A6 10: VEC_TRL 2:0x0, t6
+ 11: PUTL t6, R0
+ 12: INCEIPL $4
+
+ 0xFE90500: 900300F8 stw r0,248(r3)
+ 13: GETL R0, t8
+ 14: GETL R3, t10
+ 15: ADDL $0xF8, t10
+ 16: STL t8, (t10)
+ 17: INCEIPL $4
+
+ 0xFE90504: 38C50010 addi r6,r5,16
+ 18: GETL R5, t12
+ 19: ADDL $0x10, t12
+ 20: PUTL t12, R6
+ 21: INCEIPL $4
+
+ 0xFE90508: 41A200E8 bc 13,2,0xFE905F0
+ 22: Js02o $0xFE905F0
+
+
+
+. 1551 FE904F4 24
+. 38 A3 01 00 70 A6 00 0F 7C 00 42 A6 90 03 00 F8 38 C5 00 10 41 A2 00 E8
+==== BB 1552 (0xFE905F0) approx BBs exec'd 0 ====
+
+ 0xFE905F0: 7E8029CE stvx vr20,r0,r5
+ 0: GETL R5, t0
+ 1: ANDL $0xFFFFFFF0, t0
+ 2: VEC_WQQ 0x0:0x14, (t0)
+ 3: INCEIPL $4
+
+ 0xFE905F4: 38A50020 addi r5,r5,32
+ 4: GETL R5, t2
+ 5: ADDL $0x20, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0xFE905F8: 7EA031CE stvx vr21,r0,r6
+ 8: GETL R6, t4
+ 9: ANDL $0xFFFFFFF0, t4
+ 10: VEC_WQQ 0x0:0x15, (t4)
+ 11: INCEIPL $4
+
+ 0xFE905FC: 38C60020 addi r6,r6,32
+ 12: GETL R6, t6
+ 13: ADDL $0x20, t6
+ 14: PUTL t6, R6
+ 15: INCEIPL $4
+
+ 0xFE90600: 7EC029CE stvx vr22,r0,r5
+ 16: GETL R5, t8
+ 17: ANDL $0xFFFFFFF0, t8
+ 18: VEC_WQQ 0x0:0x16, (t8)
+ 19: INCEIPL $4
+
+ 0xFE90604: 38A50020 addi r5,r5,32
+ 20: GETL R5, t10
+ 21: ADDL $0x20, t10
+ 22: PUTL t10, R5
+ 23: INCEIPL $4
+
+ 0xFE90608: 7EE031CE stvx vr23,r0,r6
+ 24: GETL R6, t12
+ 25: ANDL $0xFFFFFFF0, t12
+ 26: VEC_WQQ 0x0:0x17, (t12)
+ 27: INCEIPL $4
+
+ 0xFE9060C: 38C60020 addi r6,r6,32
+ 28: GETL R6, t14
+ 29: ADDL $0x20, t14
+ 30: PUTL t14, R6
+ 31: INCEIPL $4
+
+ 0xFE90610: 7F0029CE stvx vr24,r0,r5
+ 32: GETL R5, t16
+ 33: ANDL $0xFFFFFFF0, t16
+ 34: VEC_WQQ 0x0:0x18, (t16)
+ 35: INCEIPL $4
+
+ 0xFE90614: 38A50020 addi r5,r5,32
+ 36: GETL R5, t18
+ 37: ADDL $0x20, t18
+ 38: PUTL t18, R5
+ 39: INCEIPL $4
+
+ 0xFE90618: 7F2031CE stvx vr25,r0,r6
+ 40: GETL R6, t20
+ 41: ANDL $0xFFFFFFF0, t20
+ 42: VEC_WQQ 0x0:0x19, (t20)
+ 43: INCEIPL $4
+
+ 0xFE9061C: 38C60020 addi r6,r6,32
+ 44: GETL R6, t22
+ 45: ADDL $0x20, t22
+ 46: PUTL t22, R6
+ 47: INCEIPL $4
+
+ 0xFE90620: 7F4029CE stvx vr26,r0,r5
+ 48: GETL R5, t24
+ 49: ANDL $0xFFFFFFF0, t24
+ 50: VEC_WQQ 0x0:0x1A, (t24)
+ 51: INCEIPL $4
+
+ 0xFE90624: 38A50020 addi r5,r5,32
+ 52: GETL R5, t26
+ 53: ADDL $0x20, t26
+ 54: PUTL t26, R5
+ 55: INCEIPL $4
+
+ 0xFE90628: 7F6031CE stvx vr27,r0,r6
+ 56: GETL R6, t28
+ 57: ANDL $0xFFFFFFF0, t28
+ 58: VEC_WQQ 0x0:0x1B, (t28)
+ 59: INCEIPL $4
+
+ 0xFE9062C: 38C60020 addi r6,r6,32
+ 60: GETL R6, t30
+ 61: ADDL $0x20, t30
+ 62: PUTL t30, R6
+ 63: INCEIPL $4
+
+ 0xFE90630: 7F8029CE stvx vr28,r0,r5
+ 64: GETL R5, t32
+ 65: ANDL $0xFFFFFFF0, t32
+ 66: VEC_WQQ 0x0:0x1C, (t32)
+ 67: INCEIPL $4
+
+ 0xFE90634: 38A50020 addi r5,r5,32
+ 68: GETL R5, t34
+ 69: ADDL $0x20, t34
+ 70: PUTL t34, R5
+ 71: INCEIPL $4
+
+ 0xFE90638: 7FA031CE stvx vr29,r0,r6
+ 72: GETL R6, t36
+ 73: ANDL $0xFFFFFFF0, t36
+ 74: VEC_WQQ 0x0:0x1D, (t36)
+ 75: INCEIPL $4
+
+ 0xFE9063C: 38C60020 addi r6,r6,32
+ 76: GETL R6, t38
+ 77: ADDL $0x20, t38
+ 78: PUTL t38, R6
+ 79: INCEIPL $4
+
+ 0xFE90640: 7FC029CE stvx vr30,r0,r5
+ 80: GETL R5, t40
+ 81: ANDL $0xFFFFFFF0, t40
+ 82: VEC_WQQ 0x0:0x1E, (t40)
+ 83: INCEIPL $4
+
+ 0xFE90644: 7FE031CE stvx vr31,r0,r6
+ 84: GETL R6, t42
+ 85: ANDL $0xFFFFFFF0, t42
+ 86: VEC_WQQ 0x0:0x1F, (t42)
+ 87: INCEIPL $4
+
+ 0xFE90648: 480000AC b 0xFE906F4
+ 88: JMPo $0xFE906F4 ($4)
+
+
+
+. 1552 FE905F0 92
+. 7E 80 29 CE 38 A5 00 20 7E A0 31 CE 38 C6 00 20 7E C0 29 CE 38 A5 00 20 7E E0 31 CE 38 C6 00 20 7F 00 29 CE 38 A5 00 20 7F 20 31 CE 38 C6 00 20 7F 40 29 CE 38 A5 00 20 7F 60 31 CE 38 C6 00 20 7F 80 29 CE 38 A5 00 20 7F A0 31 CE 38 C6 00 20 7F C0 29 CE 7F E0 31 CE 48 00 00 AC
+==== BB 1553 __vmx__sigjmp_save(0xFE906F4) approx BBs exec'd 0 ====
+
+ 0xFE906F4: 2F840000 cmpi cr7,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE906F8: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFE906FC: 9421FFE0 stwu r1,-32(r1)
+ 7: GETL R1, t6
+ 8: GETL R1, t8
+ 9: ADDL $0xFFFFFFE0, t8
+ 10: PUTL t8, R1
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE90700: 38A301C4 addi r5,r3,452
+ 13: GETL R3, t10
+ 14: ADDL $0x1C4, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0xFE90704: 93A10014 stw r29,20(r1)
+ 17: GETL R29, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFE90708: 38800000 li r4,0
+ 22: MOVL $0x0, t16
+ 23: PUTL t16, R4
+ 24: INCEIPL $4
+
+ 0xFE9070C: 93E1001C stw r31,28(r1)
+ 25: GETL R31, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFE90710: 3BA00000 li r29,0
+ 30: MOVL $0x0, t22
+ 31: PUTL t22, R29
+ 32: INCEIPL $4
+
+ 0xFE90714: 7C7F1B78 or r31,r3,r3
+ 33: GETL R3, t24
+ 34: PUTL t24, R31
+ 35: INCEIPL $4
+
+ 0xFE90718: 93C10018 stw r30,24(r1)
+ 36: GETL R30, t26
+ 37: GETL R1, t28
+ 38: ADDL $0x18, t28
+ 39: STL t26, (t28)
+ 40: INCEIPL $4
+
+ 0xFE9071C: 90010024 stw r0,36(r1)
+ 41: GETL R0, t30
+ 42: GETL R1, t32
+ 43: ADDL $0x24, t32
+ 44: STL t30, (t32)
+ 45: INCEIPL $4
+
+ 0xFE90720: 38600000 li r3,0
+ 46: MOVL $0x0, t34
+ 47: PUTL t34, R3
+ 48: INCEIPL $4
+
+ 0xFE90724: 409E0028 bc 4,30,0xFE9074C
+ 49: Jc30o $0xFE9074C
+
+
+
+. 1553 FE906F4 52
+. 2F 84 00 00 7C 08 02 A6 94 21 FF E0 38 A3 01 C4 93 A1 00 14 38 80 00 00 93 E1 00 1C 3B A0 00 00 7C 7F 1B 78 93 C1 00 18 90 01 00 24 38 60 00 00 40 9E 00 28
+==== BB 1554 (0xFE90728) approx BBs exec'd 0 ====
+
+ 0xFE90728: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE9072C: 38600000 li r3,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE90730: 93BF01C0 stw r29,448(r31)
+ 8: GETL R29, t6
+ 9: GETL R31, t8
+ 10: ADDL $0x1C0, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE90734: 83A10014 lwz r29,20(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x14, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0xFE90738: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFE9073C: 83C10018 lwz r30,24(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x18, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R30
+ 25: INCEIPL $4
+
+ 0xFE90740: 83E1001C lwz r31,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0xFE90744: 38210020 addi r1,r1,32
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0xFE90748: 4E800020 blr
+ 35: GETL LR, t26
+ 36: JMPo-r t26 ($4)
+
+
+
+. 1554 FE90728 36
+. 80 81 00 24 38 60 00 00 93 BF 01 C0 83 A1 00 14 7C 88 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1555 (0xFE7B800) approx BBs exec'd 0 ====
+
+ 0xFE7B800: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE7B804: 40860068 bc 4,6,0xFE7B86C
+ 4: Jc06o $0xFE7B86C
+
+
+
+. 1555 FE7B800 8
+. 2C 83 00 00 40 86 00 68
+==== BB 1556 (0xFE7B808) approx BBs exec'd 0 ====
+
+ 0xFE7B808: 83A28BF4 lwz r29,-29708(r2)
+ 0: GETL R2, t0
+ 1: ADDL $0xFFFF8BF4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFE7B80C: 3B610010 addi r27,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R27
+ 8: INCEIPL $4
+
+ 0xFE7B810: 819E1B84 lwz r12,7044(r30)
+ 9: GETL R30, t6
+ 10: ADDL $0x1B84, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0xFE7B814: 93A101E0 stw r29,480(r1)
+ 14: GETL R29, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x1E0, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xFE7B818: 83828BF0 lwz r28,-29712(r2)
+ 19: GETL R2, t14
+ 20: ADDL $0xFFFF8BF0, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R28
+ 23: INCEIPL $4
+
+ 0xFE7B81C: 810101F0 lwz r8,496(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x1F0, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R8
+ 28: INCEIPL $4
+
+ 0xFE7B820: 938101E4 stw r28,484(r1)
+ 29: GETL R28, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x1E4, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFE7B824: 806101F4 lwz r3,500(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x1F4, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R3
+ 38: INCEIPL $4
+
+ 0xFE7B828: 7D0803A6 mtlr r8
+ 39: GETL R8, t30
+ 40: PUTL t30, LR
+ 41: INCEIPL $4
+
+ 0xFE7B82C: 93628BF4 stw r27,-29708(r2)
+ 42: GETL R27, t32
+ 43: GETL R2, t34
+ 44: ADDL $0xFFFF8BF4, t34
+ 45: STL t32, (t34)
+ 46: INCEIPL $4
+
+ 0xFE7B830: 808101F8 lwz r4,504(r1)
+ 47: GETL R1, t36
+ 48: ADDL $0x1F8, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R4
+ 51: INCEIPL $4
+
+ 0xFE7B834: 80AC0000 lwz r5,0(r12)
+ 52: GETL R12, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R5
+ 55: INCEIPL $4
+
+ 0xFE7B838: 80C101FC lwz r6,508(r1)
+ 56: GETL R1, t44
+ 57: ADDL $0x1FC, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R6
+ 60: INCEIPL $4
+
+ 0xFE7B83C: 4E800021 blrl
+ 61: GETL LR, t48
+ 62: MOVL $0xFE7B840, t50
+ 63: PUTL t50, LR
+ 64: JMPo-r t48 ($4)
+
+
+
+. 1556 FE7B808 56
+. 83 A2 8B F4 3B 61 00 10 81 9E 1B 84 93 A1 01 E0 83 82 8B F0 81 01 01 F0 93 81 01 E4 80 61 01 F4 7D 08 03 A6 93 62 8B F4 80 81 01 F8 80 AC 00 00 80 C1 01 FC 4E 80 00 21
+==== BB 1557 (0x1000156C) approx BBs exec'd 0 ====
+
+ 0x1000156C: 9421FF10 stwu r1,-240(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF10, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x10001570: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x10001574: 48019339 bl 0x1001A8AC
+ 9: MOVL $0x10001578, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x1001A8AC ($4)
+
+
+
+. 1557 1000156C 12
+. 94 21 FF 10 7C 08 02 A6 48 01 93 39
+==== BB 1558 (0x10001578) approx BBs exec'd 0 ====
+
+ 0x10001578: 93C100E8 stw r30,232(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xE8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x1000157C: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x10001580: 7D800026 mfcr r12
+ 8: GETL CR, t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0x10001584: 93E100EC stw r31,236(r1)
+ 11: GETL R31, t8
+ 12: GETL R1, t10
+ 13: ADDL $0xEC, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x10001588: 7C9F2378 or r31,r4,r4
+ 16: GETL R4, t12
+ 17: PUTL t12, R31
+ 18: INCEIPL $4
+
+ 0x1000158C: 924100B8 stw r18,184(r1)
+ 19: GETL R18, t14
+ 20: GETL R1, t16
+ 21: ADDL $0xB8, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x10001590: 3A400000 li r18,0
+ 24: MOVL $0x0, t18
+ 25: PUTL t18, R18
+ 26: INCEIPL $4
+
+ 0x10001594: 926100BC stw r19,188(r1)
+ 27: GETL R19, t20
+ 28: GETL R1, t22
+ 29: ADDL $0xBC, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0x10001598: 3A600000 li r19,0
+ 32: MOVL $0x0, t24
+ 33: PUTL t24, R19
+ 34: INCEIPL $4
+
+ 0x1000159C: 928100C0 stw r20,192(r1)
+ 35: GETL R20, t26
+ 36: GETL R1, t28
+ 37: ADDL $0xC0, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0x100015A0: 3A800000 li r20,0
+ 40: MOVL $0x0, t30
+ 41: PUTL t30, R20
+ 42: INCEIPL $4
+
+ 0x100015A4: 92A100C4 stw r21,196(r1)
+ 43: GETL R21, t32
+ 44: GETL R1, t34
+ 45: ADDL $0xC4, t34
+ 46: STL t32, (t34)
+ 47: INCEIPL $4
+
+ 0x100015A8: 3AA00000 li r21,0
+ 48: MOVL $0x0, t36
+ 49: PUTL t36, R21
+ 50: INCEIPL $4
+
+ 0x100015AC: 92C100C8 stw r22,200(r1)
+ 51: GETL R22, t38
+ 52: GETL R1, t40
+ 53: ADDL $0xC8, t40
+ 54: STL t38, (t40)
+ 55: INCEIPL $4
+
+ 0x100015B0: 3AC00000 li r22,0
+ 56: MOVL $0x0, t42
+ 57: PUTL t42, R22
+ 58: INCEIPL $4
+
+ 0x100015B4: 93A100E4 stw r29,228(r1)
+ 59: GETL R29, t44
+ 60: GETL R1, t46
+ 61: ADDL $0xE4, t46
+ 62: STL t44, (t46)
+ 63: INCEIPL $4
+
+ 0x100015B8: 7C7D1B78 or r29,r3,r3
+ 64: GETL R3, t48
+ 65: PUTL t48, R29
+ 66: INCEIPL $4
+
+ 0x100015BC: 900100F4 stw r0,244(r1)
+ 67: GETL R0, t50
+ 68: GETL R1, t52
+ 69: ADDL $0xF4, t52
+ 70: STL t50, (t52)
+ 71: INCEIPL $4
+
+ 0x100015C0: 920100B0 stw r16,176(r1)
+ 72: GETL R16, t54
+ 73: GETL R1, t56
+ 74: ADDL $0xB0, t56
+ 75: STL t54, (t56)
+ 76: INCEIPL $4
+
+ 0x100015C4: 922100B4 stw r17,180(r1)
+ 77: GETL R17, t58
+ 78: GETL R1, t60
+ 79: ADDL $0xB4, t60
+ 80: STL t58, (t60)
+ 81: INCEIPL $4
+
+ 0x100015C8: 92E100CC stw r23,204(r1)
+ 82: GETL R23, t62
+ 83: GETL R1, t64
+ 84: ADDL $0xCC, t64
+ 85: STL t62, (t64)
+ 86: INCEIPL $4
+
+ 0x100015CC: 930100D0 stw r24,208(r1)
+ 87: GETL R24, t66
+ 88: GETL R1, t68
+ 89: ADDL $0xD0, t68
+ 90: STL t66, (t68)
+ 91: INCEIPL $4
+
+ 0x100015D0: 932100D4 stw r25,212(r1)
+ 92: GETL R25, t70
+ 93: GETL R1, t72
+ 94: ADDL $0xD4, t72
+ 95: STL t70, (t72)
+ 96: INCEIPL $4
+
+ 0x100015D4: 934100D8 stw r26,216(r1)
+ 97: GETL R26, t74
+ 98: GETL R1, t76
+ 99: ADDL $0xD8, t76
+ 100: STL t74, (t76)
+ 101: INCEIPL $4
+
+ 0x100015D8: 936100DC stw r27,220(r1)
+ 102: GETL R27, t78
+ 103: GETL R1, t80
+ 104: ADDL $0xDC, t80
+ 105: STL t78, (t80)
+ 106: INCEIPL $4
+
+ 0x100015DC: 938100E0 stw r28,224(r1)
+ 107: GETL R28, t82
+ 108: GETL R1, t84
+ 109: ADDL $0xE0, t84
+ 110: STL t82, (t84)
+ 111: INCEIPL $4
+
+ 0x100015E0: 918100AC stw r12,172(r1)
+ 112: GETL R12, t86
+ 113: GETL R1, t88
+ 114: ADDL $0xAC, t88
+ 115: STL t86, (t88)
+ 116: INCEIPL $4
+
+ 0x100015E4: 48001FF5 bl 0x100035D8
+ 117: MOVL $0x100015E8, t90
+ 118: PUTL t90, LR
+ 119: JMPo-c $0x100035D8 ($4)
+
+
+
+. 1558 10001578 112
+. 93 C1 00 E8 7F C8 02 A6 7D 80 00 26 93 E1 00 EC 7C 9F 23 78 92 41 00 B8 3A 40 00 00 92 61 00 BC 3A 60 00 00 92 81 00 C0 3A 80 00 00 92 A1 00 C4 3A A0 00 00 92 C1 00 C8 3A C0 00 00 93 A1 00 E4 7C 7D 1B 78 90 01 00 F4 92 01 00 B0 92 21 00 B4 92 E1 00 CC 93 01 00 D0 93 21 00 D4 93 41 00 D8 93 61 00 DC 93 81 00 E0 91 81 00 AC 48 00 1F F5
+==== BB 1559 (0x100035D8) approx BBs exec'd 0 ====
+
+ 0x100035D8: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x100035DC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x100035E0: 480172CD bl 0x1001A8AC
+ 9: MOVL $0x100035E4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x1001A8AC ($4)
+
+
+
+. 1559 100035D8 12
+. 94 21 FF E0 7C 08 02 A6 48 01 72 CD
+==== BB 1560 (0x100035E4) approx BBs exec'd 0 ====
+
+ 0x100035E4: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x100035E8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x100035EC: 93E1001C stw r31,28(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x100035F0: 3FE00003 lis r31,3
+ 13: MOVL $0x30000, t10
+ 14: PUTL t10, R31
+ 15: INCEIPL $4
+
+ 0x100035F4: 90010024 stw r0,36(r1)
+ 16: GETL R0, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x24, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x100035F8: 807E0128 lwz r3,296(r30)
+ 21: GETL R30, t16
+ 22: ADDL $0x128, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R3
+ 25: INCEIPL $4
+
+ 0x100035FC: 48017591 bl 0x1001AB8C
+ 26: MOVL $0x10003600, t20
+ 27: PUTL t20, LR
+ 28: JMPo-c $0x1001AB8C ($4)
+
+
+
+. 1560 100035E4 28
+. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 3F E0 00 03 90 01 00 24 80 7E 01 28 48 01 75 91
+==== BB 1561 (0x1001AB8C) approx BBs exec'd 0 ====
+
+ 0x1001AB8C: 3960002C li r11,44
+ 0: MOVL $0x2C, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AB90: 4BFFFF7C b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 1561 1001AB8C 8
+. 39 60 00 2C 4B FF FF 7C
+==== BB 1562 getenv(0xFE93198) approx BBs exec'd 0 ====
+
+ 0xFE93198: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE9319C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE931A0: 48114CB1 bl 0xFFA7E50
+ 9: MOVL $0xFE931A4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1562 FE93198 12
+. 94 21 FF E0 7C 08 02 A6 48 11 4C B1
+==== BB 1563 (0xFE931A4) approx BBs exec'd 0 ====
+
+ 0xFE931A4: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE931A8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE931AC: 93E1001C stw r31,28(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE931B0: 93410008 stw r26,8(r1)
+ 13: GETL R26, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x8, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE931B4: 7C7F1B78 or r31,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0xFE931B8: 9361000C stw r27,12(r1)
+ 21: GETL R27, t16
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE931BC: 93810010 stw r28,16(r1)
+ 26: GETL R28, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x10, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xFE931C0: 93A10014 stw r29,20(r1)
+ 31: GETL R29, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x14, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFE931C4: 90010024 stw r0,36(r1)
+ 36: GETL R0, t28
+ 37: GETL R1, t30
+ 38: ADDL $0x24, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0xFE931C8: 48043911 bl 0xFED6AD8
+ 41: MOVL $0xFE931CC, t32
+ 42: PUTL t32, LR
+ 43: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 1563 FE931A4 40
+. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 93 41 00 08 7C 7F 1B 78 93 61 00 0C 93 81 00 10 93 A1 00 14 90 01 00 24 48 04 39 11
+==== BB 1564 strlen(0xFED6AD8) approx BBs exec'd 0 ====
+
+ 0xFED6AD8: 5464003A rlwinm r4,r3,0,0,29
+ 0: GETL R3, t0
+ 1: ANDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0xFED6ADC: 3CE07F7F lis r7,32639
+ 4: MOVL $0x7F7F0000, t2
+ 5: PUTL t2, R7
+ 6: INCEIPL $4
+
+ 0xFED6AE0: 54651EF8 rlwinm r5,r3,3,27,28
+ 7: GETL R3, t4
+ 8: ROLL $0x3, t4
+ 9: ANDL $0x18, t4
+ 10: PUTL t4, R5
+ 11: INCEIPL $4
+
+ 0xFED6AE4: 81040000 lwz r8,0(r4)
+ 12: GETL R4, t6
+ 13: LDL (t6), t8
+ 14: PUTL t8, R8
+ 15: INCEIPL $4
+
+ 0xFED6AE8: 3920FFFF li r9,-1
+ 16: MOVL $0xFFFFFFFF, t10
+ 17: PUTL t10, R9
+ 18: INCEIPL $4
+
+ 0xFED6AEC: 38E77F7F addi r7,r7,32639
+ 19: MOVL $0x7F7F7F7F, t12
+ 20: PUTL t12, R7
+ 21: INCEIPL $4
+
+ 0xFED6AF0: 7D292C30 srw r9,r9,r5
+ 22: GETL R9, t16
+ 23: GETL R5, t14
+ 24: SHRL t14, t16
+ 25: PUTL t16, R9
+ 26: INCEIPL $4
+
+ 0xFED6AF4: 7CE04038 and r0,r7,r8
+ 27: GETL R7, t18
+ 28: GETL R8, t20
+ 29: ANDL t18, t20
+ 30: PUTL t20, R0
+ 31: INCEIPL $4
+
+ 0xFED6AF8: 7CEA4378 or r10,r7,r8
+ 32: GETL R7, t22
+ 33: GETL R8, t24
+ 34: ORL t24, t22
+ 35: PUTL t22, R10
+ 36: INCEIPL $4
+
+ 0xFED6AFC: 7C003A14 add r0,r0,r7
+ 37: GETL R0, t26
+ 38: GETL R7, t28
+ 39: ADDL t26, t28
+ 40: PUTL t28, R0
+ 41: INCEIPL $4
+
+ 0xFED6B00: 7D4000F8 nor r0,r10,r0
+ 42: GETL R10, t30
+ 43: GETL R0, t32
+ 44: ORL t32, t30
+ 45: NOTL t30
+ 46: PUTL t30, R0
+ 47: INCEIPL $4
+
+ 0xFED6B04: 7C084839 and. r8,r0,r9
+ 48: GETL R0, t34
+ 49: GETL R9, t36
+ 50: ANDL t34, t36
+ 51: PUTL t36, R8
+ 52: CMP0L t36, t38 (-rSo)
+ 53: ICRFL t38, $0x0, CR
+ 54: INCEIPL $4
+
+ 0xFED6B08: 7C601120 mtcrf 0x1,r3
+ 55: GETL R3, t40
+ 56: ICRFL t40, $0x7, CR
+ 57: INCEIPL $4
+
+ 0xFED6B0C: 40820070 bc 4,2,0xFED6B7C
+ 58: Jc02o $0xFED6B7C
+
+
+
+. 1564 FED6AD8 56
+. 54 64 00 3A 3C E0 7F 7F 54 65 1E F8 81 04 00 00 39 20 FF FF 38 E7 7F 7F 7D 29 2C 30 7C E0 40 38 7C EA 43 78 7C 00 3A 14 7D 40 00 F8 7C 08 48 39 7C 60 11 20 40 82 00 70
+==== BB 1565 (0xFED6B10) approx BBs exec'd 0 ====
+
+ 0xFED6B10: 3CC0FEFF lis r6,-257
+ 0: MOVL $0xFEFF0000, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0xFED6B14: 38C6FEFF addi r6,r6,-257
+ 3: MOVL $0xFEFEFEFF, t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFED6B18: 419D001C bc 12,29,0xFED6B34
+ 6: Js29o $0xFED6B34
+
+
+
+. 1565 FED6B10 12
+. 3C C0 FE FF 38 C6 FE FF 41 9D 00 1C
+==== BB 1566 (0xFED6B34) approx BBs exec'd 0 ====
+
+ 0xFED6B34: 81040004 lwz r8,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFED6B38: 85240008 lwzu r9,8(r4)
+ 5: GETL R4, t4
+ 6: ADDL $0x8, t4
+ 7: PUTL t4, R4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0xFED6B3C: 7C064214 add r0,r6,r8
+ 11: GETL R6, t8
+ 12: GETL R8, t10
+ 13: ADDL t8, t10
+ 14: PUTL t10, R0
+ 15: INCEIPL $4
+
+ 0xFED6B40: 7CEA40F8 nor r10,r7,r8
+ 16: GETL R7, t12
+ 17: GETL R8, t14
+ 18: ORL t14, t12
+ 19: NOTL t12
+ 20: PUTL t12, R10
+ 21: INCEIPL $4
+
+ 0xFED6B44: 7C005039 and. r0,r0,r10
+ 22: GETL R0, t16
+ 23: GETL R10, t18
+ 24: ANDL t16, t18
+ 25: PUTL t18, R0
+ 26: CMP0L t18, t20 (-rSo)
+ 27: ICRFL t20, $0x0, CR
+ 28: INCEIPL $4
+
+ 0xFED6B48: 7D664A14 add r11,r6,r9
+ 29: GETL R6, t22
+ 30: GETL R9, t24
+ 31: ADDL t22, t24
+ 32: PUTL t24, R11
+ 33: INCEIPL $4
+
+ 0xFED6B4C: 7CEC48F8 nor r12,r7,r9
+ 34: GETL R7, t26
+ 35: GETL R9, t28
+ 36: ORL t28, t26
+ 37: NOTL t26
+ 38: PUTL t26, R12
+ 39: INCEIPL $4
+
+ 0xFED6B50: 4082001C bc 4,2,0xFED6B6C
+ 40: Jc02o $0xFED6B6C
+
+
+
+. 1566 FED6B34 32
+. 81 04 00 04 85 24 00 08 7C 06 42 14 7C EA 40 F8 7C 00 50 39 7D 66 4A 14 7C EC 48 F8 40 82 00 1C
+==== BB 1567 (0xFED6B54) approx BBs exec'd 0 ====
+
+ 0xFED6B54: 7D606039 and. r0,r11,r12
+ 0: GETL R11, t0
+ 1: GETL R12, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFED6B58: 4182FFDC bc 12,2,0xFED6B34
+ 7: Js02o $0xFED6B34
+
+
+
+. 1567 FED6B54 8
+. 7D 60 60 39 41 82 FF DC
+==== BB 1568 (0xFED6B6C) approx BBs exec'd 0 ====
+
+ 0xFED6B6C: 7CE04038 and r0,r7,r8
+ 0: GETL R7, t0
+ 1: GETL R8, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED6B70: 3884FFFC addi r4,r4,-4
+ 5: GETL R4, t4
+ 6: ADDL $0xFFFFFFFC, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFED6B74: 7C003A14 add r0,r0,r7
+ 9: GETL R0, t6
+ 10: GETL R7, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0xFED6B78: 7D480078 andc r8,r10,r0
+ 14: GETL R10, t10
+ 15: GETL R0, t12
+ 16: NOTL t12
+ 17: ANDL t10, t12
+ 18: PUTL t12, R8
+ 19: INCEIPL $4
+
+ 0xFED6B7C: 7D0B0034 cntlzw r11,r8
+ 20: GETL R8, t14
+ 21: CNTLZL t14
+ 22: PUTL t14, R11
+ 23: INCEIPL $4
+
+ 0xFED6B80: 7C032050 subf r0,r3,r4
+ 24: GETL R3, t16
+ 25: GETL R4, t18
+ 26: SUBL t16, t18
+ 27: PUTL t18, R0
+ 28: INCEIPL $4
+
+ 0xFED6B84: 556BE8FE rlwinm r11,r11,29,3,31
+ 29: GETL R11, t20
+ 30: SHRL $0x3, t20
+ 31: PUTL t20, R11
+ 32: INCEIPL $4
+
+ 0xFED6B88: 7C605A14 add r3,r0,r11
+ 33: GETL R0, t22
+ 34: GETL R11, t24
+ 35: ADDL t22, t24
+ 36: PUTL t24, R3
+ 37: INCEIPL $4
+
+ 0xFED6B8C: 4E800020 blr
+ 38: GETL LR, t26
+ 39: JMPo-r t26 ($4)
+
+
+
+. 1568 FED6B6C 36
+. 7C E0 40 38 38 84 FF FC 7C 00 3A 14 7D 48 00 78 7D 0B 00 34 7C 03 20 50 55 6B E8 FE 7C 60 5A 14 4E 80 00 20
+==== BB 1569 (0xFE931CC) approx BBs exec'd 0 ====
+
+ 0xFE931CC: 813E1B84 lwz r9,7044(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1B84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE931D0: 81290000 lwz r9,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0xFE931D4: 2F890000 cmpi cr7,r9,0
+ 9: GETL R9, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFE931D8: 419E0010 bc 12,30,0xFE931E8
+ 13: Js30o $0xFE931E8
+
+
+
+. 1569 FE931CC 16
+. 81 3E 1B 84 81 29 00 00 2F 89 00 00 41 9E 00 10
+==== BB 1570 (0xFE931DC) approx BBs exec'd 0 ====
+
+ 0xFE931DC: 897F0000 lbz r11,0(r31)
+ 0: GETL R31, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFE931E0: 2C0B0000 cmpi cr0,r11,0
+ 4: GETL R11, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFE931E4: 40820030 bc 4,2,0xFE93214
+ 8: Jc02o $0xFE93214
+
+
+
+. 1570 FE931DC 12
+. 89 7F 00 00 2C 0B 00 00 40 82 00 30
+==== BB 1571 (0xFE93214) approx BBs exec'd 0 ====
+
+ 0xFE93214: 881F0001 lbz r0,1(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE93218: 2C800000 cmpi cr1,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFE9321C: 40860048 bc 4,6,0xFE93264
+ 9: Jc06o $0xFE93264
+
+
+
+. 1571 FE93214 12
+. 88 1F 00 01 2C 80 00 00 40 86 00 48
+==== BB 1572 (0xFE93264) approx BBs exec'd 0 ====
+
+ 0xFE93264: 81490000 lwz r10,0(r9)
+ 0: GETL R9, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFE93268: 5408402E rlwinm r8,r0,8,0,23
+ 4: GETL R0, t4
+ 5: SHLL $0x8, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0xFE9326C: 556C063E rlwinm r12,r11,0,24,31
+ 8: GETL R11, t6
+ 9: ANDL $0xFF, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0xFE93270: 7D3D4B78 or r29,r9,r9
+ 12: GETL R9, t8
+ 13: PUTL t8, R29
+ 14: INCEIPL $4
+
+ 0xFE93274: 2C8A0000 cmpi cr1,r10,0
+ 15: GETL R10, t10
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x1, CR
+ 18: INCEIPL $4
+
+ 0xFE93278: 7D9A4378 or r26,r12,r8
+ 19: GETL R12, t14
+ 20: GETL R8, t16
+ 21: ORL t16, t14
+ 22: PUTL t14, R26
+ 23: INCEIPL $4
+
+ 0xFE9327C: 3B83FFFE addi r28,r3,-2
+ 24: GETL R3, t18
+ 25: ADDL $0xFFFFFFFE, t18
+ 26: PUTL t18, R28
+ 27: INCEIPL $4
+
+ 0xFE93280: 3B7F0002 addi r27,r31,2
+ 28: GETL R31, t20
+ 29: ADDL $0x2, t20
+ 30: PUTL t20, R27
+ 31: INCEIPL $4
+
+ 0xFE93284: 41A6FF64 bc 13,6,0xFE931E8
+ 32: Js06o $0xFE931E8
+
+
+
+. 1572 FE93264 36
+. 81 49 00 00 54 08 40 2E 55 6C 06 3E 7D 3D 4B 78 2C 8A 00 00 7D 9A 43 78 3B 83 FF FE 3B 7F 00 02 41 A6 FF 64
+==== BB 1573 (0xFE93288) approx BBs exec'd 0 ====
+
+ 0xFE93288: 7D5F5378 or r31,r10,r10
+ 0: GETL R10, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0xFE9328C: 48000010 b 0xFE9329C
+ 3: JMPo $0xFE9329C ($4)
+
+
+
+. 1573 FE93288 8
+. 7D 5F 53 78 48 00 00 10
+==== BB 1574 (0xFE9329C) approx BBs exec'd 0 ====
+
+ 0xFE9329C: 881F0001 lbz r0,1(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE932A0: 387F0002 addi r3,r31,2
+ 5: GETL R31, t4
+ 6: ADDL $0x2, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFE932A4: 893F0000 lbz r9,0(r31)
+ 9: GETL R31, t6
+ 10: LDB (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0xFE932A8: 7F64DB78 or r4,r27,r27
+ 13: GETL R27, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0xFE932AC: 540B402E rlwinm r11,r0,8,0,23
+ 16: GETL R0, t12
+ 17: SHLL $0x8, t12
+ 18: PUTL t12, R11
+ 19: INCEIPL $4
+
+ 0xFE932B0: 7F85E378 or r5,r28,r28
+ 20: GETL R28, t14
+ 21: PUTL t14, R5
+ 22: INCEIPL $4
+
+ 0xFE932B4: 7D6A4B78 or r10,r11,r9
+ 23: GETL R11, t16
+ 24: GETL R9, t18
+ 25: ORL t18, t16
+ 26: PUTL t16, R10
+ 27: INCEIPL $4
+
+ 0xFE932B8: 7F1A5000 cmp cr6,r26,r10
+ 28: GETL R26, t20
+ 29: GETL R10, t22
+ 30: CMPL t20, t22, t24 (-rSo)
+ 31: ICRFL t24, $0x6, CR
+ 32: INCEIPL $4
+
+ 0xFE932BC: 409AFFD4 bc 4,26,0xFE93290
+ 33: Jc26o $0xFE93290
+
+
+
+. 1574 FE9329C 36
+. 88 1F 00 01 38 7F 00 02 89 3F 00 00 7F 64 DB 78 54 0B 40 2E 7F 85 E3 78 7D 6A 4B 78 7F 1A 50 00 40 9A FF D4
+==== BB 1575 (0xFE93290) approx BBs exec'd 0 ====
+
+ 0xFE93290: 87FD0004 lwzu r31,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R29
+ 3: LDL (t0), t2
+ 4: PUTL t2, R31
+ 5: INCEIPL $4
+
+ 0xFE93294: 2C9F0000 cmpi cr1,r31,0
+ 6: GETL R31, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFE93298: 41A6FF50 bc 13,6,0xFE931E8
+ 10: Js06o $0xFE931E8
+
+
+
+. 1575 FE93290 12
+. 87 FD 00 04 2C 9F 00 00 41 A6 FF 50
+==== BB 1576 (0xFE931E8) approx BBs exec'd 0 ====
+
+ 0xFE931E8: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE931EC: 83410024 lwz r26,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0xFE931F0: 8361000C lwz r27,12(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R27
+ 12: INCEIPL $4
+
+ 0xFE931F4: 7F4803A6 mtlr r26
+ 13: GETL R26, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFE931F8: 83810010 lwz r28,16(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x10, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0xFE931FC: 83410008 lwz r26,8(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x8, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R26
+ 25: INCEIPL $4
+
+ 0xFE93200: 83A10014 lwz r29,20(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R29
+ 30: INCEIPL $4
+
+ 0xFE93204: 83C10018 lwz r30,24(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x18, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R30
+ 35: INCEIPL $4
+
+ 0xFE93208: 83E1001C lwz r31,28(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R31
+ 40: INCEIPL $4
+
+ 0xFE9320C: 38210020 addi r1,r1,32
+ 41: GETL R1, t32
+ 42: ADDL $0x20, t32
+ 43: PUTL t32, R1
+ 44: INCEIPL $4
+
+ 0xFE93210: 4E800020 blr
+ 45: GETL LR, t34
+ 46: JMPo-r t34 ($4)
+
+
+
+. 1576 FE931E8 44
+. 38 60 00 00 83 41 00 24 83 61 00 0C 7F 48 03 A6 83 81 00 10 83 41 00 08 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1577 (0x10003600) approx BBs exec'd 0 ====
+
+ 0x10003600: 63FF0DB0 ori r31,r31,0xDB0
+ 0: GETL R31, t0
+ 1: ORL $0xDB0, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0x10003604: 7C691B79 or. r9,r3,r3
+ 4: GETL R3, t2
+ 5: PUTL t2, R9
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x10003608: 4182001C bc 12,2,0x10003624
+ 9: Js02o $0x10003624
+
+
+
+. 1577 10003600 12
+. 63 FF 0D B0 7C 69 1B 79 41 82 00 1C
+==== BB 1578 (0x10003624) approx BBs exec'd 0 ====
+
+ 0x10003624: 80010024 lwz r0,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10003628: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x1000362C: 83C10018 lwz r30,24(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x18, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0x10003630: 83E1001C lwz r31,28(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x1C, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R31
+ 17: INCEIPL $4
+
+ 0x10003634: 7C0803A6 mtlr r0
+ 18: GETL R0, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x10003638: 38210020 addi r1,r1,32
+ 21: GETL R1, t16
+ 22: ADDL $0x20, t16
+ 23: PUTL t16, R1
+ 24: INCEIPL $4
+
+ 0x1000363C: 4E800020 blr
+ 25: GETL LR, t18
+ 26: JMPo-r t18 ($4)
+
+
+
+. 1578 10003624 28
+. 80 01 00 24 7F E3 FB 78 83 C1 00 18 83 E1 00 1C 7C 08 03 A6 38 21 00 20 4E 80 00 20
+==== BB 1579 (0x100015E8) approx BBs exec'd 0 ====
+
+ 0x100015E8: 3C000003 lis r0,3
+ 0: MOVL $0x30000, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x100015EC: 60000DAF ori r0,r0,0xDAF
+ 3: MOVL $0x30DAF, t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x100015F0: 7F830000 cmp cr7,r3,r0
+ 6: GETL R3, t4
+ 7: GETL R0, t6
+ 8: CMPL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x100015F4: 419D038C bc 12,29,0x10001980
+ 11: Js29o $0x10001980
+
+
+
+. 1579 100015E8 16
+. 3C 00 00 03 60 00 0D AF 7F 83 00 00 41 9D 03 8C
+==== BB 1580 (0x10001980) approx BBs exec'd 0 ====
+
+ 0x10001980: 807E00A8 lwz r3,168(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xA8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x10001984: 839E00AC lwz r28,172(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0xAC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x10001988: 48019205 bl 0x1001AB8C
+ 10: MOVL $0x1000198C, t8
+ 11: PUTL t8, LR
+ 12: JMPo-c $0x1001AB8C ($4)
+
+
+
+. 1580 10001980 12
+. 80 7E 00 A8 83 9E 00 AC 48 01 92 05
+==== BB 1581 (0x1001AB8C) approx BBs exec'd 0 ====
+
+ 0x1001AB8C: 4BE7860C b 0xFE93198
+ 0: JMPo $0xFE93198 ($4)
+
+
+
+. 1581 1001AB8C 4
+. 4B E7 86 0C
+==== BB 1582 (0xFED6B1C) approx BBs exec'd 0 ====
+
+ 0xFED6B1C: 85040004 lwzu r8,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R4
+ 3: LDL (t0), t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0xFED6B20: 7CE04038 and r0,r7,r8
+ 6: GETL R7, t4
+ 7: GETL R8, t6
+ 8: ANDL t4, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0xFED6B24: 7CEA4378 or r10,r7,r8
+ 11: GETL R7, t8
+ 12: GETL R8, t10
+ 13: ORL t10, t8
+ 14: PUTL t8, R10
+ 15: INCEIPL $4
+
+ 0xFED6B28: 7C003A14 add r0,r0,r7
+ 16: GETL R0, t12
+ 17: GETL R7, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0xFED6B2C: 7D4800F9 nor. r8,r10,r0
+ 21: GETL R10, t16
+ 22: GETL R0, t18
+ 23: ORL t18, t16
+ 24: NOTL t16
+ 25: PUTL t16, R8
+ 26: CMP0L t16, t20 (-rSo)
+ 27: ICRFL t20, $0x0, CR
+ 28: INCEIPL $4
+
+ 0xFED6B30: 4082004C bc 4,2,0xFED6B7C
+ 29: Jc02o $0xFED6B7C
+
+
+
+. 1582 FED6B1C 24
+. 85 04 00 04 7C E0 40 38 7C EA 43 78 7C 00 3A 14 7D 48 00 F9 40 82 00 4C
+==== BB 1583 (0xFED6B5C) approx BBs exec'd 0 ====
+
+ 0xFED6B5C: 7CE04838 and r0,r7,r9
+ 0: GETL R7, t0
+ 1: GETL R9, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED6B60: 7C003A14 add r0,r0,r7
+ 5: GETL R0, t4
+ 6: GETL R7, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFED6B64: 7D880078 andc r8,r12,r0
+ 10: GETL R12, t8
+ 11: GETL R0, t10
+ 12: NOTL t10
+ 13: ANDL t8, t10
+ 14: PUTL t10, R8
+ 15: INCEIPL $4
+
+ 0xFED6B68: 48000014 b 0xFED6B7C
+ 16: JMPo $0xFED6B7C ($4)
+
+
+
+. 1583 FED6B5C 16
+. 7C E0 48 38 7C 00 3A 14 7D 88 00 78 48 00 00 14
+==== BB 1584 (0xFED6B7C) approx BBs exec'd 0 ====
+
+ 0xFED6B7C: 7D0B0034 cntlzw r11,r8
+ 0: GETL R8, t0
+ 1: CNTLZL t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFED6B80: 7C032050 subf r0,r3,r4
+ 4: GETL R3, t2
+ 5: GETL R4, t4
+ 6: SUBL t2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFED6B84: 556BE8FE rlwinm r11,r11,29,3,31
+ 9: GETL R11, t6
+ 10: SHRL $0x3, t6
+ 11: PUTL t6, R11
+ 12: INCEIPL $4
+
+ 0xFED6B88: 7C605A14 add r3,r0,r11
+ 13: GETL R0, t8
+ 14: GETL R11, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0xFED6B8C: 4E800020 blr
+ 18: GETL LR, t12
+ 19: JMPo-r t12 ($4)
+
+
+
+. 1584 FED6B7C 20
+. 7D 0B 00 34 7C 03 20 50 55 6B E8 FE 7C 60 5A 14 4E 80 00 20
+==== BB 1585 (0x1000198C) approx BBs exec'd 0 ====
+
+ 0x1000198C: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10001990: 40BEFC6C bc 5,30,0x100015FC
+ 4: Jc30o $0x100015FC
+
+
+
+. 1585 1000198C 8
+. 2F 83 00 00 40 BE FC 6C
+==== BB 1586 (0x10001994) approx BBs exec'd 0 ====
+
+ 0x10001994: 4BFFFC64 b 0x100015F8
+ 0: JMPo $0x100015F8 ($4)
+
+
+
+. 1586 10001994 4
+. 4B FF FC 64
+==== BB 1587 (0x100015F8) approx BBs exec'd 0 ====
+
+ 0x100015F8: 839E0084 lwz r28,132(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x100015FC: 801F0000 lwz r0,0(r31)
+ 5: GETL R31, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x10001600: 38600006 li r3,6
+ 9: MOVL $0x6, t8
+ 10: PUTL t8, R3
+ 11: INCEIPL $4
+
+ 0x10001604: 813E01E4 lwz r9,484(r30)
+ 12: GETL R30, t10
+ 13: ADDL $0x1E4, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R9
+ 16: INCEIPL $4
+
+ 0x10001608: 809E0074 lwz r4,116(r30)
+ 17: GETL R30, t14
+ 18: ADDL $0x74, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R4
+ 21: INCEIPL $4
+
+ 0x1000160C: 90090000 stw r0,0(r9)
+ 22: GETL R0, t18
+ 23: GETL R9, t20
+ 24: STL t18, (t20)
+ 25: INCEIPL $4
+
+ 0x10001610: 48019595 bl 0x1001ABA4
+ 26: MOVL $0x10001614, t22
+ 27: PUTL t22, LR
+ 28: JMPo-c $0x1001ABA4 ($4)
+
+
+
+. 1587 100015F8 28
+. 83 9E 00 84 80 1F 00 00 38 60 00 06 81 3E 01 E4 80 9E 00 74 90 09 00 00 48 01 95 95
+==== BB 1588 (0x1001ABA4) approx BBs exec'd 0 ====
+
+ 0x1001ABA4: 39600038 li r11,56
+ 0: MOVL $0x38, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001ABA8: 4BFFFF64 b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 1588 1001ABA4 8
+. 39 60 00 38 4B FF FF 64
+==== BB 1589 setlocale(0xFE86870) approx BBs exec'd 0 ====
+
+ 0xFE86870: 9421FF20 stwu r1,-224(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF20, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE86874: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE86878: 938100D0 stw r28,208(r1)
+ 9: GETL R28, t6
+ 10: GETL R1, t8
+ 11: ADDL $0xD0, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFE8687C: 7C7C1B79 or. r28,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R28
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFE86880: 481215D1 bl 0xFFA7E50
+ 19: MOVL $0xFE86884, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1589 FE86870 20
+. 94 21 FF 20 7C 08 02 A6 93 81 00 D0 7C 7C 1B 79 48 12 15 D1
+==== BB 1590 (0xFE86884) approx BBs exec'd 0 ====
+
+ 0xFE86884: 936100CC stw r27,204(r1)
+ 0: GETL R27, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xCC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE86888: 93C100D8 stw r30,216(r1)
+ 5: GETL R30, t4
+ 6: GETL R1, t6
+ 7: ADDL $0xD8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFE8688C: 7C9B2378 or r27,r4,r4
+ 10: GETL R4, t8
+ 11: PUTL t8, R27
+ 12: INCEIPL $4
+
+ 0xFE86890: 93E100DC stw r31,220(r1)
+ 13: GETL R31, t10
+ 14: GETL R1, t12
+ 15: ADDL $0xDC, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE86894: 7FC802A6 mflr r30
+ 18: GETL LR, t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0xFE86898: 924100A8 stw r18,168(r1)
+ 21: GETL R18, t16
+ 22: GETL R1, t18
+ 23: ADDL $0xA8, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE8689C: 7C3F0B78 or r31,r1,r1
+ 26: GETL R1, t20
+ 27: PUTL t20, R31
+ 28: INCEIPL $4
+
+ 0xFE868A0: 926100AC stw r19,172(r1)
+ 29: GETL R19, t22
+ 30: GETL R1, t24
+ 31: ADDL $0xAC, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFE868A4: 928100B0 stw r20,176(r1)
+ 34: GETL R20, t26
+ 35: GETL R1, t28
+ 36: ADDL $0xB0, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFE868A8: 92A100B4 stw r21,180(r1)
+ 39: GETL R21, t30
+ 40: GETL R1, t32
+ 41: ADDL $0xB4, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFE868AC: 92C100B8 stw r22,184(r1)
+ 44: GETL R22, t34
+ 45: GETL R1, t36
+ 46: ADDL $0xB8, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0xFE868B0: 92E100BC stw r23,188(r1)
+ 49: GETL R23, t38
+ 50: GETL R1, t40
+ 51: ADDL $0xBC, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0xFE868B4: 930100C0 stw r24,192(r1)
+ 54: GETL R24, t42
+ 55: GETL R1, t44
+ 56: ADDL $0xC0, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0xFE868B8: 932100C4 stw r25,196(r1)
+ 59: GETL R25, t46
+ 60: GETL R1, t48
+ 61: ADDL $0xC4, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0xFE868BC: 934100C8 stw r26,200(r1)
+ 64: GETL R26, t50
+ 65: GETL R1, t52
+ 66: ADDL $0xC8, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0xFE868C0: 93A100D4 stw r29,212(r1)
+ 69: GETL R29, t54
+ 70: GETL R1, t56
+ 71: ADDL $0xD4, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0xFE868C4: 900100E4 stw r0,228(r1)
+ 74: GETL R0, t58
+ 75: GETL R1, t60
+ 76: ADDL $0xE4, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0xFE868C8: 4180020C bc 12,0,0xFE86AD4
+ 79: Js00o $0xFE86AD4
+
+
+
+. 1590 FE86884 72
+. 93 61 00 CC 93 C1 00 D8 7C 9B 23 78 93 E1 00 DC 7F C8 02 A6 92 41 00 A8 7C 3F 0B 78 92 61 00 AC 92 81 00 B0 92 A1 00 B4 92 C1 00 B8 92 E1 00 BC 93 01 00 C0 93 21 00 C4 93 41 00 C8 93 A1 00 D4 90 01 00 E4 41 80 02 0C
+==== BB 1591 (0xFE868CC) approx BBs exec'd 0 ====
+
+ 0xFE868CC: 2F9C000C cmpi cr7,r28,12
+ 0: GETL R28, t0
+ 1: MOVL $0xC, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE868D0: 419D0204 bc 12,29,0xFE86AD4
+ 5: Js29o $0xFE86AD4
+
+
+
+. 1591 FE868CC 8
+. 2F 9C 00 0C 41 9D 02 04
+==== BB 1592 (0xFE868D4) approx BBs exec'd 0 ====
+
+ 0xFE868D4: 2C840000 cmpi cr1,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE868D8: 41860214 bc 12,6,0xFE86AEC
+ 4: Js06o $0xFE86AEC
+
+
+
+. 1592 FE868D4 8
+. 2C 84 00 00 41 86 02 14
+==== BB 1593 (0xFE868DC) approx BBs exec'd 0 ====
+
+ 0xFE868DC: 831E1D78 lwz r24,7544(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1D78, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0xFE868E0: 579A103A rlwinm r26,r28,2,0,29
+ 5: GETL R28, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R26
+ 8: INCEIPL $4
+
+ 0xFE868E4: 7C832378 or r3,r4,r4
+ 9: GETL R4, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0xFE868E8: 7CBAC214 add r5,r26,r24
+ 12: GETL R26, t8
+ 13: GETL R24, t10
+ 14: ADDL t8, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0xFE868EC: 83A50040 lwz r29,64(r5)
+ 17: GETL R5, t12
+ 18: ADDL $0x40, t12
+ 19: LDL (t12), t14
+ 20: PUTL t14, R29
+ 21: INCEIPL $4
+
+ 0xFE868F0: 7FA4EB78 or r4,r29,r29
+ 22: GETL R29, t16
+ 23: PUTL t16, R4
+ 24: INCEIPL $4
+
+ 0xFE868F4: 4804FABD bl 0xFED63B0
+ 25: MOVL $0xFE868F8, t18
+ 26: PUTL t18, LR
+ 27: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 1593 FE868DC 28
+. 83 1E 1D 78 57 9A 10 3A 7C 83 23 78 7C BA C2 14 83 A5 00 40 7F A4 EB 78 48 04 FA BD
+==== BB 1594 strcmp(0xFED63B0) approx BBs exec'd 0 ====
+
+ 0xFED63B0: 7C801B78 or r0,r4,r3
+ 0: GETL R4, t0
+ 1: GETL R3, t2
+ 2: ORL t2, t0
+ 3: PUTL t0, R0
+ 4: INCEIPL $4
+
+ 0xFED63B4: 540007BF rlwinm. r0,r0,0,30,31
+ 5: GETL R0, t4
+ 6: ANDL $0x3, t4
+ 7: PUTL t4, R0
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0xFED63B8: 3CE0FEFF lis r7,-257
+ 11: MOVL $0xFEFF0000, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0xFED63BC: 40820094 bc 4,2,0xFED6450
+ 14: Jc02o $0xFED6450
+
+
+
+. 1594 FED63B0 16
+. 7C 80 1B 78 54 00 07 BF 3C E0 FE FF 40 82 00 94
+==== BB 1595 (0xFED63C0) approx BBs exec'd 0 ====
+
+ 0xFED63C0: 80A30000 lwz r5,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFED63C4: 80C40000 lwz r6,0(r4)
+ 4: GETL R4, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R6
+ 7: INCEIPL $4
+
+ 0xFED63C8: 3D007F7F lis r8,32639
+ 8: MOVL $0x7F7F0000, t8
+ 9: PUTL t8, R8
+ 10: INCEIPL $4
+
+ 0xFED63CC: 38E7FEFF addi r7,r7,-257
+ 11: GETL R7, t10
+ 12: ADDL $0xFFFFFEFF, t10
+ 13: PUTL t10, R7
+ 14: INCEIPL $4
+
+ 0xFED63D0: 39087F7F addi r8,r8,32639
+ 15: MOVL $0x7F7F7F7F, t12
+ 16: PUTL t12, R8
+ 17: INCEIPL $4
+
+ 0xFED63D4: 48000010 b 0xFED63E4
+ 18: JMPo $0xFED63E4 ($4)
+
+
+
+. 1595 FED63C0 24
+. 80 A3 00 00 80 C4 00 00 3D 00 7F 7F 38 E7 FE FF 39 08 7F 7F 48 00 00 10
+==== BB 1596 (0xFED63E4) approx BBs exec'd 0 ====
+
+ 0xFED63E4: 7C072A14 add r0,r7,r5
+ 0: GETL R7, t0
+ 1: GETL R5, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED63E8: 7D0928F8 nor r9,r8,r5
+ 5: GETL R8, t4
+ 6: GETL R5, t6
+ 7: ORL t6, t4
+ 8: NOTL t4
+ 9: PUTL t4, R9
+ 10: INCEIPL $4
+
+ 0xFED63EC: 7C004839 and. r0,r0,r9
+ 11: GETL R0, t8
+ 12: GETL R9, t10
+ 13: ANDL t8, t10
+ 14: PUTL t10, R0
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x0, CR
+ 17: INCEIPL $4
+
+ 0xFED63F0: 7C853000 cmp cr1,r5,r6
+ 18: GETL R5, t14
+ 19: GETL R6, t16
+ 20: CMPL t14, t16, t18 (-rSo)
+ 21: ICRFL t18, $0x1, CR
+ 22: INCEIPL $4
+
+ 0xFED63F4: 4182FFE4 bc 12,2,0xFED63D8
+ 23: Js02o $0xFED63D8
+
+
+
+. 1596 FED63E4 20
+. 7C 07 2A 14 7D 09 28 F8 7C 00 48 39 7C 85 30 00 41 82 FF E4
+==== BB 1597 (0xFED63F8) approx BBs exec'd 0 ====
+
+ 0xFED63F8: 7D002838 and r0,r8,r5
+ 0: GETL R8, t0
+ 1: GETL R5, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED63FC: 4186002C bc 12,6,0xFED6428
+ 5: Js06o $0xFED6428
+
+
+
+. 1597 FED63F8 8
+. 7D 00 28 38 41 86 00 2C
+==== BB 1598 (0xFED6400) approx BBs exec'd 0 ====
+
+ 0xFED6400: 7C004214 add r0,r0,r8
+ 0: GETL R0, t0
+ 1: GETL R8, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED6404: 7CAA3279 xor. r10,r5,r6
+ 5: GETL R5, t4
+ 6: GETL R6, t6
+ 7: XORL t4, t6
+ 8: PUTL t6, R10
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFED6408: 7D290078 andc r9,r9,r0
+ 12: GETL R9, t10
+ 13: GETL R0, t12
+ 14: NOTL t12
+ 15: ANDL t10, t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0xFED640C: 41800034 bc 12,0,0xFED6440
+ 18: Js00o $0xFED6440
+
+
+
+. 1598 FED6400 16
+. 7C 00 42 14 7C AA 32 79 7D 29 00 78 41 80 00 34
+==== BB 1599 (0xFED6410) approx BBs exec'd 0 ====
+
+ 0xFED6410: 7D4A0034 cntlzw r10,r10
+ 0: GETL R10, t0
+ 1: CNTLZL t0
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0xFED6414: 7D290034 cntlzw r9,r9
+ 4: GETL R9, t2
+ 5: CNTLZL t2
+ 6: PUTL t2, R9
+ 7: INCEIPL $4
+
+ 0xFED6418: 39290007 addi r9,r9,7
+ 8: GETL R9, t4
+ 9: ADDL $0x7, t4
+ 10: PUTL t4, R9
+ 11: INCEIPL $4
+
+ 0xFED641C: 7C895000 cmp cr1,r9,r10
+ 12: GETL R9, t6
+ 13: GETL R10, t8
+ 14: CMPL t6, t8, t10 (-rSo)
+ 15: ICRFL t10, $0x1, CR
+ 16: INCEIPL $4
+
+ 0xFED6420: 7C662850 subf r3,r6,r5
+ 17: GETL R6, t12
+ 18: GETL R5, t14
+ 19: SUBL t12, t14
+ 20: PUTL t14, R3
+ 21: INCEIPL $4
+
+ 0xFED6424: 4CA40020 bclr 5,4
+ 22: GETL LR, t16
+ 23: Jc04o-r t16
+
+
+
+. 1599 FED6410 24
+. 7D 4A 00 34 7D 29 00 34 39 29 00 07 7C 89 50 00 7C 66 28 50 4C A4 00 20
+==== BB 1600 (0xFE868F8) approx BBs exec'd 0 ====
+
+ 0xFE868F8: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE868FC: 7FA3EB78 or r3,r29,r29
+ 4: GETL R29, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFE86900: 409A0050 bc 4,26,0xFE86950
+ 7: Jc26o $0xFE86950
+
+
+
+. 1600 FE868F8 12
+. 2F 03 00 00 7F A3 EB 78 40 9A 00 50
+==== BB 1601 (0xFE86950) approx BBs exec'd 0 ====
+
+ 0xFE86950: 807E0100 lwz r3,256(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x100, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE86954: 38C00000 li r6,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0xFE86958: 90DF0094 stw r6,148(r31)
+ 8: GETL R6, t6
+ 9: GETL R31, t8
+ 10: ADDL $0x94, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE8695C: 90DF0090 stw r6,144(r31)
+ 13: GETL R6, t10
+ 14: GETL R31, t12
+ 15: ADDL $0x90, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE86960: 4800C839 bl 0xFE93198
+ 18: MOVL $0xFE86964, t14
+ 19: PUTL t14, LR
+ 20: JMPo-c $0xFE93198 ($4)
+
+
+
+. 1601 FE86950 20
+. 80 7E 01 00 38 C0 00 00 90 DF 00 94 90 DF 00 90 48 00 C8 39
+==== BB 1602 (0xFE932C0) approx BBs exec'd 0 ====
+
+ 0xFE932C0: 48043AA1 bl 0xFED6D60
+ 0: MOVL $0xFE932C4, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFED6D60 ($4)
+
+
+
+. 1602 FE932C0 4
+. 48 04 3A A1
+==== BB 1603 strncmp(0xFED6D60) approx BBs exec'd 0 ====
+
+ 0xFED6D60: 7C001A2C dcbt r0,r3
+ 0: INCEIPL $4
+
+ 0xFED6D64: 7C801B78 or r0,r4,r3
+ 1: GETL R4, t0
+ 2: GETL R3, t2
+ 3: ORL t2, t0
+ 4: PUTL t0, R0
+ 5: INCEIPL $4
+
+ 0xFED6D68: 3D207F7F lis r9,32639
+ 6: MOVL $0x7F7F0000, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0xFED6D6C: 7C00222C dcbt r0,r4
+ 9: INCEIPL $4
+
+ 0xFED6D70: 540007BF rlwinm. r0,r0,0,30,31
+ 10: GETL R0, t6
+ 11: ANDL $0x3, t6
+ 12: PUTL t6, R0
+ 13: CMP0L t6, t8 (-rSo)
+ 14: ICRFL t8, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFED6D74: 3D00FEFF lis r8,-257
+ 16: MOVL $0xFEFF0000, t10
+ 17: PUTL t10, R8
+ 18: INCEIPL $4
+
+ 0xFED6D78: 408200E0 bc 4,2,0xFED6E58
+ 19: Jc02o $0xFED6E58
+
+
+
+. 1603 FED6D60 28
+. 7C 00 1A 2C 7C 80 1B 78 3D 20 7F 7F 7C 00 22 2C 54 00 07 BF 3D 00 FE FF 40 82 00 E0
+==== BB 1604 (0xFED6E58) approx BBs exec'd 0 ====
+
+ 0xFED6E58: 7CA903A6 mtctr r5
+ 0: GETL R5, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0xFED6E5C: 2C050000 cmpi cr0,r5,0
+ 3: GETL R5, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFED6E60: 88C30000 lbz r6,0(r3)
+ 7: GETL R3, t6
+ 8: LDB (t6), t8
+ 9: PUTL t8, R6
+ 10: INCEIPL $4
+
+ 0xFED6E64: 88E40000 lbz r7,0(r4)
+ 11: GETL R4, t10
+ 12: LDB (t10), t12
+ 13: PUTL t12, R7
+ 14: INCEIPL $4
+
+ 0xFED6E68: 41810010 bc 12,1,0xFED6E78
+ 15: Js01o $0xFED6E78
+
+
+
+. 1604 FED6E58 20
+. 7C A9 03 A6 2C 05 00 00 88 C3 00 00 88 E4 00 00 41 81 00 10
+==== BB 1605 (0xFED6E78) approx BBs exec'd 0 ====
+
+ 0xFED6E78: 42400038 bc 18,0,0xFED6EB0
+ 0: GETL CTR, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, CTR
+ 3: SETZL t0, NoValue
+ 4: JIFZL t0, $0xFED6E7C
+ 5: JMPo $0xFED6EB0 ($4)
+
+
+
+. 1605 FED6E78 4
+. 42 40 00 38
+==== BB 1606 (0xFED6E7C) approx BBs exec'd 0 ====
+
+ 0xFED6E7C: 2C860000 cmpi cr1,r6,0
+ 0: GETL R6, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFED6E80: 7C063800 cmp cr0,r6,r7
+ 4: GETL R6, t4
+ 5: GETL R7, t6
+ 6: CMPL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFED6E84: 4186002C bc 12,6,0xFED6EB0
+ 9: Js06o $0xFED6EB0
+
+
+
+. 1606 FED6E7C 12
+. 2C 86 00 00 7C 06 38 00 41 86 00 2C
+==== BB 1607 (0xFED6E88) approx BBs exec'd 0 ====
+
+ 0xFED6E88: 8CC30001 lbzu r6,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFED6E8C: 40820020 bc 4,2,0xFED6EAC
+ 6: Jc02o $0xFED6EAC
+
+
+
+. 1607 FED6E88 8
+. 8C C3 00 01 40 82 00 20
+==== BB 1608 (0xFED6EAC) approx BBs exec'd 0 ====
+
+ 0xFED6EAC: 8CC3FFFF lbzu r6,-1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFED6EB0: 7C673050 subf r3,r7,r6
+ 6: GETL R7, t4
+ 7: GETL R6, t6
+ 8: SUBL t4, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFED6EB4: 4E800020 blr
+ 11: GETL LR, t8
+ 12: JMPo-r t8 ($4)
+
+
+
+. 1608 FED6EAC 12
+. 8C C3 FF FF 7C 67 30 50 4E 80 00 20
+==== BB 1609 (0xFE932C4) approx BBs exec'd 0 ====
+
+ 0xFE932C4: 7D3FE214 add r9,r31,r28
+ 0: GETL R31, t0
+ 1: GETL R28, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE932C8: 2F830000 cmpi cr7,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFE932CC: 40BEFFC4 bc 5,30,0xFE93290
+ 9: Jc30o $0xFE93290
+
+
+
+. 1609 FE932C4 12
+. 7D 3F E2 14 2F 83 00 00 40 BE FF C4
+==== BB 1610 (0xFE86964) approx BBs exec'd 0 ====
+
+ 0xFE86964: 7C691B79 or. r9,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R9
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE86968: 41820010 bc 12,2,0xFE86978
+ 5: Js02o $0xFE86978
+
+
+
+. 1610 FE86964 8
+. 7C 69 1B 79 41 82 00 10
+==== BB 1611 (0xFE86978) approx BBs exec'd 0 ====
+
+ 0xFE86978: 2C1C0006 cmpi cr0,r28,6
+ 0: GETL R28, t0
+ 1: MOVL $0x6, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8697C: 41820184 bc 12,2,0xFE86B00
+ 5: Js02o $0xFE86B00
+
+
+
+. 1611 FE86978 8
+. 2C 1C 00 06 41 82 01 84
+==== BB 1612 (0xFE86B00) approx BBs exec'd 0 ====
+
+ 0xFE86B00: 3900000D li r8,13
+ 0: MOVL $0xD, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0xFE86B04: 39600000 li r11,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0xFE86B08: 7D0903A6 mtctr r8
+ 6: GETL R8, t4
+ 7: PUTL t4, CTR
+ 8: INCEIPL $4
+
+ 0xFE86B0C: 393F0010 addi r9,r31,16
+ 9: GETL R31, t6
+ 10: ADDL $0x10, t6
+ 11: PUTL t6, R9
+ 12: INCEIPL $4
+
+ 0xFE86B10: 2F8B0006 cmpi cr7,r11,6
+ 13: GETL R11, t8
+ 14: MOVL $0x6, t12
+ 15: CMPL t8, t12, t10 (-rSo)
+ 16: ICRFL t10, $0x7, CR
+ 17: INCEIPL $4
+
+ 0xFE86B14: 396B0001 addi r11,r11,1
+ 18: MOVL $0x1, t14
+ 19: PUTL t14, R11
+ 20: INCEIPL $4
+
+ 0xFE86B18: 419E0008 bc 12,30,0xFE86B20
+ 21: Js30o $0xFE86B20
+
+
+
+. 1612 FE86B00 28
+. 39 00 00 0D 39 60 00 00 7D 09 03 A6 39 3F 00 10 2F 8B 00 06 39 6B 00 01 41 9E 00 08
+==== BB 1613 (0xFE86B1C) approx BBs exec'd 0 ====
+
+ 0xFE86B1C: 93690000 stw r27,0(r9)
+ 0: GETL R27, t0
+ 1: GETL R9, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE86B20: 39290004 addi r9,r9,4
+ 4: GETL R9, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xFE86B24: 4200FFEC bc 16,0,0xFE86B10
+ 8: GETL CTR, t6
+ 9: ADDL $0xFFFFFFFF, t6
+ 10: PUTL t6, CTR
+ 11: JIFZL t6, $0xFE86B28
+ 12: JMPo $0xFE86B10 ($4)
+
+
+
+. 1613 FE86B1C 12
+. 93 69 00 00 39 29 00 04 42 00 FF EC
+==== BB 1614 (0xFE86B10) approx BBs exec'd 0 ====
+
+ 0xFE86B10: 2F8B0006 cmpi cr7,r11,6
+ 0: GETL R11, t0
+ 1: MOVL $0x6, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE86B14: 396B0001 addi r11,r11,1
+ 5: GETL R11, t6
+ 6: ADDL $0x1, t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0xFE86B18: 419E0008 bc 12,30,0xFE86B20
+ 9: Js30o $0xFE86B20
+
+
+
+. 1614 FE86B10 12
+. 2F 8B 00 06 39 6B 00 01 41 9E 00 08
+==== BB 1615 (0xFE86B20) approx BBs exec'd 0 ====
+
+ 0xFE86B20: 39290004 addi r9,r9,4
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFE86B24: 4200FFEC bc 16,0,0xFE86B10
+ 4: GETL CTR, t2
+ 5: ADDL $0xFFFFFFFF, t2
+ 6: PUTL t2, CTR
+ 7: JIFZL t2, $0xFE86B28
+ 8: JMPo $0xFE86B10 ($4)
+
+
+
+. 1615 FE86B20 8
+. 39 29 00 04 42 00 FF EC
+==== BB 1616 (0xFE86B28) approx BBs exec'd 0 ====
+
+ 0xFE86B28: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE86B2C: 3880003B li r4,59
+ 3: MOVL $0x3B, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE86B30: 4804F79D bl 0xFED62CC
+ 6: MOVL $0xFE86B34, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED62CC ($4)
+
+
+
+. 1616 FE86B28 12
+. 7F 63 DB 78 38 80 00 3B 48 04 F7 9D
+==== BB 1617 (0xFE86B34) approx BBs exec'd 0 ====
+
+ 0xFE86B34: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE86B38: 408601F8 bc 4,6,0xFE86D30
+ 4: Jc06o $0xFE86D30
+
+
+
+. 1617 FE86B34 8
+. 2C 83 00 00 40 86 01 F8
+==== BB 1618 (0xFE86B3C) approx BBs exec'd 0 ====
+
+ 0xFE86B3C: 833E1B94 lwz r25,7060(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1B94, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0xFE86B40: 3B400000 li r26,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0xFE86B44: 3B600001 li r27,1
+ 8: MOVL $0x1, t6
+ 9: PUTL t6, R27
+ 10: INCEIPL $4
+
+ 0xFE86B48: 7EE0C828 lwarx r23,r0,r25
+ 11: GETL R25, t8
+ 12: LOCKo
+ 13: LDL (t8), t10
+ 14: PUTL t10, R23
+ 15: INCEIPL $4
+
+ 0xFE86B4C: 7C17D000 cmp cr0,r23,r26
+ 16: GETL R23, t12
+ 17: GETL R26, t14
+ 18: CMPL t12, t14, t16 (-rSo)
+ 19: ICRFL t16, $0x0, CR
+ 20: INCEIPL $4
+
+ 0xFE86B50: 4082000C bc 4,2,0xFE86B5C
+ 21: Jc02o $0xFE86B5C
+
+
+
+. 1618 FE86B3C 24
+. 83 3E 1B 94 3B 40 00 00 3B 60 00 01 7E E0 C8 28 7C 17 D0 00 40 82 00 0C
+==== BB 1619 (0xFE86B54) approx BBs exec'd 0 ====
+
+ 0xFE86B54: 7F60C92D stwcx. r27,r0,r25
+ 0: GETL R25, t0
+ 1: GETL R27, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE86B58: 40A2FFF0 bc 5,2,0xFE86B48
+ 6: Jc02o $0xFE86B48
+
+
+
+. 1619 FE86B54 8
+. 7F 60 C9 2D 40 A2 FF F0
+==== BB 1620 (0xFE86B48) approx BBs exec'd 0 ====
+
+ 0xFE86B48: 7EE0C828 lwarx r23,r0,r25
+ 0: GETL R25, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0xFE86B4C: 7C17D000 cmp cr0,r23,r26
+ 5: GETL R23, t4
+ 6: GETL R26, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFE86B50: 4082000C bc 4,2,0xFE86B5C
+ 10: Jc02o $0xFE86B5C
+
+
+
+. 1620 FE86B48 12
+. 7E E0 C8 28 7C 17 D0 00 40 82 00 0C
+==== BB 1621 (0xFE86B5C) approx BBs exec'd 0 ====
+
+ 0xFE86B5C: 4C00012C 0: INCEIPL $4
+
+ 0xFE86B60: 2F170000 cmpi cr6,r23,0
+ 1: GETL R23, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFE86B64: 409A0384 bc 4,26,0xFE86EE8
+ 5: Jc26o $0xFE86EE8
+
+
+
+. 1621 FE86B5C 12
+. 4C 00 01 2C 2F 17 00 00 40 9A 03 84
+==== BB 1622 (0xFE86B68) approx BBs exec'd 0 ====
+
+ 0xFE86B68: 82BE1CB8 lwz r21,7352(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1CB8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0xFE86B6C: 3B80000C li r28,12
+ 5: MOVL $0xC, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFE86B70: 3ADF0008 addi r22,r31,8
+ 8: GETL R31, t6
+ 9: ADDL $0x8, t6
+ 10: PUTL t6, R22
+ 11: INCEIPL $4
+
+ 0xFE86B74: 3AFF0010 addi r23,r31,16
+ 12: GETL R31, t8
+ 13: ADDL $0x10, t8
+ 14: PUTL t8, R23
+ 15: INCEIPL $4
+
+ 0xFE86B78: 48000018 b 0xFE86B90
+ 16: JMPo $0xFE86B90 ($4)
+
+
+
+. 1622 FE86B68 20
+. 82 BE 1C B8 3B 80 00 0C 3A DF 00 08 3A FF 00 10 48 00 00 18
+==== BB 1623 (0xFE86B90) approx BBs exec'd 0 ====
+
+ 0xFE86B90: 2C1C0006 cmpi cr0,r28,6
+ 0: GETL R28, t0
+ 1: MOVL $0x6, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE86B94: 579D103A rlwinm r29,r28,2,0,29
+ 5: GETL R28, t6
+ 6: SHLL $0x2, t6
+ 7: PUTL t6, R29
+ 8: INCEIPL $4
+
+ 0xFE86B98: 7F85E378 or r5,r28,r28
+ 9: GETL R28, t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0xFE86B9C: 7CD7EA14 add r6,r23,r29
+ 12: GETL R23, t10
+ 13: GETL R29, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R6
+ 16: INCEIPL $4
+
+ 0xFE86BA0: 7F7DB214 add r27,r29,r22
+ 17: GETL R29, t14
+ 18: GETL R22, t16
+ 19: ADDL t14, t16
+ 20: PUTL t16, R27
+ 21: INCEIPL $4
+
+ 0xFE86BA4: 41A2FFDC bc 13,2,0xFE86B80
+ 22: Js02o $0xFE86B80
+
+
+
+. 1623 FE86B90 24
+. 2C 1C 00 06 57 9D 10 3A 7F 85 E3 78 7C D7 EA 14 7F 7D B2 14 41 A2 FF DC
+==== BB 1624 (0xFE86BA8) approx BBs exec'd 0 ====
+
+ 0xFE86BA8: 809F0094 lwz r4,148(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x94, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE86BAC: 807F0090 lwz r3,144(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x90, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFE86BB0: 48000345 bl 0xFE86EF4
+ 10: MOVL $0xFE86BB4, t8
+ 11: PUTL t8, LR
+ 12: JMPo-c $0xFE86EF4 ($4)
+
+
+
+. 1624 FE86BA8 12
+. 80 9F 00 94 80 7F 00 90 48 00 03 45
+==== BB 1625 _nl_find_locale(0xFE86EF4) approx BBs exec'd 0 ====
+
+ 0xFE86EF4: 7CE802A6 mflr r7
+ 0: GETL LR, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0xFE86EF8: 9421FFA0 stwu r1,-96(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFA0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFE86EFC: 93A10054 stw r29,84(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x54, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFE86F00: 48120F51 bl 0xFFA7E50
+ 14: MOVL $0xFE86F04, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1625 FE86EF4 16
+. 7C E8 02 A6 94 21 FF A0 93 A1 00 54 48 12 0F 51
+==== BB 1626 (0xFE86F04) approx BBs exec'd 0 ====
+
+ 0xFE86F04: 93010040 stw r24,64(r1)
+ 0: GETL R24, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x40, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE86F08: 7C982378 or r24,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R24
+ 7: INCEIPL $4
+
+ 0xFE86F0C: 90E10064 stw r7,100(r1)
+ 8: GETL R7, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x64, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE86F10: 83A60000 lwz r29,0(r6)
+ 13: GETL R6, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R29
+ 16: INCEIPL $4
+
+ 0xFE86F14: 93210044 stw r25,68(r1)
+ 17: GETL R25, t14
+ 18: GETL R1, t16
+ 19: ADDL $0x44, t16
+ 20: STL t14, (t16)
+ 21: INCEIPL $4
+
+ 0xFE86F18: 7CB92B78 or r25,r5,r5
+ 22: GETL R5, t18
+ 23: PUTL t18, R25
+ 24: INCEIPL $4
+
+ 0xFE86F1C: 9361004C stw r27,76(r1)
+ 25: GETL R27, t20
+ 26: GETL R1, t22
+ 27: ADDL $0x4C, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0xFE86F20: 7C7B1B78 or r27,r3,r3
+ 30: GETL R3, t24
+ 31: PUTL t24, R27
+ 32: INCEIPL $4
+
+ 0xFE86F24: 93810050 stw r28,80(r1)
+ 33: GETL R28, t26
+ 34: GETL R1, t28
+ 35: ADDL $0x50, t28
+ 36: STL t26, (t28)
+ 37: INCEIPL $4
+
+ 0xFE86F28: 7CDC3378 or r28,r6,r6
+ 38: GETL R6, t30
+ 39: PUTL t30, R28
+ 40: INCEIPL $4
+
+ 0xFE86F2C: 93C10058 stw r30,88(r1)
+ 41: GETL R30, t32
+ 42: GETL R1, t34
+ 43: ADDL $0x58, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0xFE86F30: 7FC802A6 mflr r30
+ 46: GETL LR, t36
+ 47: PUTL t36, R30
+ 48: INCEIPL $4
+
+ 0xFE86F34: 93E1005C stw r31,92(r1)
+ 49: GETL R31, t38
+ 50: GETL R1, t40
+ 51: ADDL $0x5C, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0xFE86F38: 7C3F0B78 or r31,r1,r1
+ 54: GETL R1, t42
+ 55: PUTL t42, R31
+ 56: INCEIPL $4
+
+ 0xFE86F3C: 92C10038 stw r22,56(r1)
+ 57: GETL R22, t44
+ 58: GETL R1, t46
+ 59: ADDL $0x38, t46
+ 60: STL t44, (t46)
+ 61: INCEIPL $4
+
+ 0xFE86F40: 92E1003C stw r23,60(r1)
+ 62: GETL R23, t48
+ 63: GETL R1, t50
+ 64: ADDL $0x3C, t50
+ 65: STL t48, (t50)
+ 66: INCEIPL $4
+
+ 0xFE86F44: 93410048 stw r26,72(r1)
+ 67: GETL R26, t52
+ 68: GETL R1, t54
+ 69: ADDL $0x48, t54
+ 70: STL t52, (t54)
+ 71: INCEIPL $4
+
+ 0xFE86F48: 881D0000 lbz r0,0(r29)
+ 72: GETL R29, t56
+ 73: LDB (t56), t58
+ 74: PUTL t58, R0
+ 75: INCEIPL $4
+
+ 0xFE86F4C: 2F800000 cmpi cr7,r0,0
+ 76: GETL R0, t60
+ 77: CMP0L t60, t62 (-rSo)
+ 78: ICRFL t62, $0x7, CR
+ 79: INCEIPL $4
+
+ 0xFE86F50: 419E00C8 bc 12,30,0xFE87018
+ 80: Js30o $0xFE87018
+
+
+
+. 1626 FE86F04 80
+. 93 01 00 40 7C 98 23 78 90 E1 00 64 83 A6 00 00 93 21 00 44 7C B9 2B 78 93 61 00 4C 7C 7B 1B 78 93 81 00 50 7C DC 33 78 93 C1 00 58 7F C8 02 A6 93 E1 00 5C 7C 3F 0B 78 92 C1 00 38 92 E1 00 3C 93 41 00 48 88 1D 00 00 2F 80 00 00 41 9E 00 C8
+==== BB 1627 (0xFE87018) approx BBs exec'd 0 ====
+
+ 0xFE87018: 807E0108 lwz r3,264(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x108, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE8701C: 4800C17D bl 0xFE93198
+ 5: MOVL $0xFE87020, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0xFE93198 ($4)
+
+
+
+. 1627 FE87018 8
+. 80 7E 01 08 48 00 C1 7D
+==== BB 1628 (0xFE87020) approx BBs exec'd 0 ====
+
+ 0xFE87020: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFE87024: 7C7D1B78 or r29,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R29
+ 6: INCEIPL $4
+
+ 0xFE87028: 907C0000 stw r3,0(r28)
+ 7: GETL R3, t6
+ 8: GETL R28, t8
+ 9: STL t6, (t8)
+ 10: INCEIPL $4
+
+ 0xFE8702C: 41820038 bc 12,2,0xFE87064
+ 11: Js02o $0xFE87064
+
+
+
+. 1628 FE87020 16
+. 2C 03 00 00 7C 7D 1B 78 90 7C 00 00 41 82 00 38
+==== BB 1629 (0xFE87064) approx BBs exec'd 0 ====
+
+ 0xFE87064: 813E1DC4 lwz r9,7620(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1DC4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE87068: 5724103A rlwinm r4,r25,2,0,29
+ 5: GETL R25, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFE8706C: 7C64482E lwzx r3,r4,r9
+ 9: GETL R9, t6
+ 10: GETL R4, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0xFE87070: 4800C129 bl 0xFE93198
+ 15: MOVL $0xFE87074, t12
+ 16: PUTL t12, LR
+ 17: JMPo-c $0xFE93198 ($4)
+
+
+
+. 1629 FE87064 16
+. 81 3E 1D C4 57 24 10 3A 7C 64 48 2E 48 00 C1 29
+==== BB 1630 (0xFE87074) approx BBs exec'd 0 ====
+
+ 0xFE87074: 7C7D1B78 or r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFE87078: 907C0000 stw r3,0(r28)
+ 3: GETL R3, t2
+ 4: GETL R28, t4
+ 5: STL t2, (t4)
+ 6: INCEIPL $4
+
+ 0xFE8707C: 4BFFFFC0 b 0xFE8703C
+ 7: JMPo $0xFE8703C ($4)
+
+
+
+. 1630 FE87074 12
+. 7C 7D 1B 78 90 7C 00 00 4B FF FF C0
+==== BB 1631 (0xFE8703C) approx BBs exec'd 0 ====
+
+ 0xFE8703C: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE87040: 419A0010 bc 12,26,0xFE87050
+ 4: Js26o $0xFE87050
+
+
+
+. 1631 FE8703C 8
+. 2F 1D 00 00 41 9A 00 10
+==== BB 1632 (0xFE87050) approx BBs exec'd 0 ====
+
+ 0xFE87050: 807E010C lwz r3,268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x10C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE87054: 4800C145 bl 0xFE93198
+ 5: MOVL $0xFE87058, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0xFE93198 ($4)
+
+
+
+. 1632 FE87050 8
+. 80 7E 01 0C 48 00 C1 45
+==== BB 1633 (0xFED6E90) approx BBs exec'd 0 ====
+
+ 0xFED6E90: 8CE40001 lbzu r7,1(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R4
+ 3: LDB (t0), t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0xFED6E94: 4240001C bc 18,0,0xFED6EB0
+ 6: GETL CTR, t4
+ 7: ADDL $0xFFFFFFFF, t4
+ 8: PUTL t4, CTR
+ 9: SETZL t4, NoValue
+ 10: JIFZL t4, $0xFED6E98
+ 11: JMPo $0xFED6EB0 ($4)
+
+
+
+. 1633 FED6E90 8
+. 8C E4 00 01 42 40 00 1C
+==== BB 1634 (0xFED6EB0) approx BBs exec'd 0 ====
+
+ 0xFED6EB0: 7C673050 subf r3,r7,r6
+ 0: GETL R7, t0
+ 1: GETL R6, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFED6EB4: 4E800020 blr
+ 5: GETL LR, t4
+ 6: JMPo-r t4 ($4)
+
+
+
+. 1634 FED6EB0 8
+. 7C 67 30 50 4E 80 00 20
+==== BB 1635 (0xFE932D0) approx BBs exec'd 0 ====
+
+ 0xFE932D0: 8BE90002 lbz r31,2(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x2, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFE932D4: 2C1F003D cmpi cr0,r31,61
+ 5: GETL R31, t4
+ 6: MOVL $0x3D, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFE932D8: 4082FFB8 bc 4,2,0xFE93290
+ 10: Jc02o $0xFE93290
+
+
+
+. 1635 FE932D0 12
+. 8B E9 00 02 2C 1F 00 3D 40 82 FF B8
+==== BB 1636 (0xFE932DC) approx BBs exec'd 0 ====
+
+ 0xFE932DC: 38690003 addi r3,r9,3
+ 0: GETL R9, t0
+ 1: ADDL $0x3, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFE932E0: 4BFFFF0C b 0xFE931EC
+ 4: JMPo $0xFE931EC ($4)
+
+
+
+. 1636 FE932DC 8
+. 38 69 00 03 4B FF FF 0C
+==== BB 1637 (0xFE931EC) approx BBs exec'd 0 ====
+
+ 0xFE931EC: 83410024 lwz r26,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFE931F0: 8361000C lwz r27,12(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R27
+ 9: INCEIPL $4
+
+ 0xFE931F4: 7F4803A6 mtlr r26
+ 10: GETL R26, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFE931F8: 83810010 lwz r28,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0xFE931FC: 83410008 lwz r26,8(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x8, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R26
+ 22: INCEIPL $4
+
+ 0xFE93200: 83A10014 lwz r29,20(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x14, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R29
+ 27: INCEIPL $4
+
+ 0xFE93204: 83C10018 lwz r30,24(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x18, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R30
+ 32: INCEIPL $4
+
+ 0xFE93208: 83E1001C lwz r31,28(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x1C, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R31
+ 37: INCEIPL $4
+
+ 0xFE9320C: 38210020 addi r1,r1,32
+ 38: GETL R1, t30
+ 39: ADDL $0x20, t30
+ 40: PUTL t30, R1
+ 41: INCEIPL $4
+
+ 0xFE93210: 4E800020 blr
+ 42: GETL LR, t32
+ 43: JMPo-r t32 ($4)
+
+
+
+. 1637 FE931EC 40
+. 83 41 00 24 83 61 00 0C 7F 48 03 A6 83 81 00 10 83 41 00 08 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1638 (0xFE87058) approx BBs exec'd 0 ====
+
+ 0xFE87058: 7C7D1B78 or r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFE8705C: 907C0000 stw r3,0(r28)
+ 3: GETL R3, t2
+ 4: GETL R28, t4
+ 5: STL t2, (t4)
+ 6: INCEIPL $4
+
+ 0xFE87060: 4BFFFEF4 b 0xFE86F54
+ 7: JMPo $0xFE86F54 ($4)
+
+
+
+. 1638 FE87058 12
+. 7C 7D 1B 78 90 7C 00 00 4B FF FE F4
+==== BB 1639 (0xFE86F54) approx BBs exec'd 0 ====
+
+ 0xFE86F54: 2C1D0000 cmpi cr0,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFE86F58: 41820010 bc 12,2,0xFE86F68
+ 4: Js02o $0xFE86F68
+
+
+
+. 1639 FE86F54 8
+. 2C 1D 00 00 41 82 00 10
+==== BB 1640 (0xFE86F5C) approx BBs exec'd 0 ====
+
+ 0xFE86F5C: 88DD0000 lbz r6,0(r29)
+ 0: GETL R29, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFE86F60: 2C860000 cmpi cr1,r6,0
+ 4: GETL R6, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFE86F64: 4086008C bc 4,6,0xFE86FF0
+ 8: Jc06o $0xFE86FF0
+
+
+
+. 1640 FE86F5C 12
+. 88 DD 00 00 2C 86 00 00 40 86 00 8C
+==== BB 1641 (0xFE86FF0) approx BBs exec'd 0 ====
+
+ 0xFE86FF0: 815E1D70 lwz r10,7536(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1D70, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFE86FF4: 810A0000 lwz r8,0(r10)
+ 5: GETL R10, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R8
+ 8: INCEIPL $4
+
+ 0xFE86FF8: 2F080000 cmpi cr6,r8,0
+ 9: GETL R8, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x6, CR
+ 12: INCEIPL $4
+
+ 0xFE86FFC: 419AFF74 bc 12,26,0xFE86F70
+ 13: Js26o $0xFE86F70
+
+
+
+. 1641 FE86FF0 16
+. 81 5E 1D 70 81 0A 00 00 2F 08 00 00 41 9A FF 74
+==== BB 1642 (0xFE86F70) approx BBs exec'd 0 ====
+
+ 0xFE86F70: 809E1CB8 lwz r4,7352(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1CB8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE86F74: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE86F78: 4804F439 bl 0xFED63B0
+ 8: MOVL $0xFE86F7C, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 1642 FE86F70 12
+. 80 9E 1C B8 7F A3 EB 78 48 04 F4 39
+==== BB 1643 (0xFED6450) approx BBs exec'd 0 ====
+
+ 0xFED6450: 88A30000 lbz r5,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFED6454: 88C40000 lbz r6,0(r4)
+ 4: GETL R4, t4
+ 5: LDB (t4), t6
+ 6: PUTL t6, R6
+ 7: INCEIPL $4
+
+ 0xFED6458: 48000010 b 0xFED6468
+ 8: JMPo $0xFED6468 ($4)
+
+
+
+. 1643 FED6450 12
+. 88 A3 00 00 88 C4 00 00 48 00 00 10
+==== BB 1644 (0xFED6468) approx BBs exec'd 0 ====
+
+ 0xFED6468: 2C850000 cmpi cr1,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFED646C: 41860020 bc 12,6,0xFED648C
+ 4: Js06o $0xFED648C
+
+
+
+. 1644 FED6468 8
+. 2C 85 00 00 41 86 00 20
+==== BB 1645 (0xFED6470) approx BBs exec'd 0 ====
+
+ 0xFED6470: 7C053000 cmp cr0,r5,r6
+ 0: GETL R5, t0
+ 1: GETL R6, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFED6474: 40820018 bc 4,2,0xFED648C
+ 5: Jc02o $0xFED648C
+
+
+
+. 1645 FED6470 8
+. 7C 05 30 00 40 82 00 18
+==== BB 1646 (0xFED648C) approx BBs exec'd 0 ====
+
+ 0xFED648C: 7C662850 subf r3,r6,r5
+ 0: GETL R6, t0
+ 1: GETL R5, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFED6490: 4E800020 blr
+ 5: GETL LR, t4
+ 6: JMPo-r t4 ($4)
+
+
+
+. 1646 FED648C 8
+. 7C 66 28 50 4E 80 00 20
+==== BB 1647 (0xFE86F7C) approx BBs exec'd 0 ====
+
+ 0xFE86F7C: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFE86F80: 41820100 bc 12,2,0xFE87080
+ 4: Js02o $0xFE87080
+
+
+
+. 1647 FE86F7C 8
+. 2C 03 00 00 41 82 01 00
+==== BB 1648 (0xFE86F84) approx BBs exec'd 0 ====
+
+ 0xFE86F84: 809E1CC8 lwz r4,7368(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1CC8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE86F88: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE86F8C: 4804F425 bl 0xFED63B0
+ 8: MOVL $0xFE86F90, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 1648 FE86F84 12
+. 80 9E 1C C8 7F A3 EB 78 48 04 F4 25
+==== BB 1649 (0xFE86F90) approx BBs exec'd 0 ====
+
+ 0xFE86F90: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE86F94: 418600EC bc 12,6,0xFE87080
+ 4: Js06o $0xFE87080
+
+
+
+. 1649 FE86F90 8
+. 2C 83 00 00 41 86 00 EC
+==== BB 1650 (0xFE86F98) approx BBs exec'd 0 ====
+
+ 0xFE86F98: 2F1B0000 cmpi cr6,r27,0
+ 0: GETL R27, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE86F9C: 409A0140 bc 4,26,0xFE870DC
+ 4: Jc26o $0xFE870DC
+
+
+
+. 1650 FE86F98 8
+. 2F 1B 00 00 40 9A 01 40
+==== BB 1651 (0xFE86FA0) approx BBs exec'd 0 ====
+
+ 0xFE86FA0: 7F23CB78 or r3,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE86FA4: 7F84E378 or r4,r28,r28
+ 3: GETL R28, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE86FA8: 48000C49 bl 0xFE87BF0
+ 6: MOVL $0xFE86FAC, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFE87BF0 ($4)
+
+
+
+. 1651 FE86FA0 12
+. 7F 23 CB 78 7F 84 E3 78 48 00 0C 49
+==== BB 1652 _nl_load_locale_from_archive(0xFE87BF0) approx BBs exec'd 0 ====
+
+ 0xFE87BF0: 9421FDF0 stwu r1,-528(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFDF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE87BF4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE87BF8: 48120259 bl 0xFFA7E50
+ 9: MOVL $0xFE87BFC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1652 FE87BF0 12
+. 94 21 FD F0 7C 08 02 A6 48 12 02 59
+==== BB 1653 (0xFE87BFC) approx BBs exec'd 0 ====
+
+ 0xFE87BFC: 93C10208 stw r30,520(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x208, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE87C00: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE87C04: 7D800026 mfcr r12
+ 8: GETL CR, t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0xFE87C08: 91E101CC stw r15,460(r1)
+ 11: GETL R15, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x1CC, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFE87C0C: 91C101C8 stw r14,456(r1)
+ 16: GETL R14, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x1C8, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFE87C10: 7C6E1B78 or r14,r3,r3
+ 21: GETL R3, t16
+ 22: PUTL t16, R14
+ 23: INCEIPL $4
+
+ 0xFE87C14: 81FE0128 lwz r15,296(r30)
+ 24: GETL R30, t18
+ 25: ADDL $0x128, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R15
+ 28: INCEIPL $4
+
+ 0xFE87C18: 3860001E li r3,30
+ 29: MOVL $0x1E, t22
+ 30: PUTL t22, R3
+ 31: INCEIPL $4
+
+ 0xFE87C1C: 93E1020C stw r31,524(r1)
+ 32: GETL R31, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x20C, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xFE87C20: 7C3F0B78 or r31,r1,r1
+ 37: GETL R1, t28
+ 38: PUTL t28, R31
+ 39: INCEIPL $4
+
+ 0xFE87C24: 90010214 stw r0,532(r1)
+ 40: GETL R0, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x214, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0xFE87C28: 924101D8 stw r18,472(r1)
+ 45: GETL R18, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x1D8, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0xFE87C2C: 7C922378 or r18,r4,r4
+ 50: GETL R4, t38
+ 51: PUTL t38, R18
+ 52: INCEIPL $4
+
+ 0xFE87C30: 926101DC stw r19,476(r1)
+ 53: GETL R19, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x1DC, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0xFE87C34: 3A60FFFF li r19,-1
+ 58: MOVL $0xFFFFFFFF, t44
+ 59: PUTL t44, R19
+ 60: INCEIPL $4
+
+ 0xFE87C38: 928101E0 stw r20,480(r1)
+ 61: GETL R20, t46
+ 62: GETL R1, t48
+ 63: ADDL $0x1E0, t48
+ 64: STL t46, (t48)
+ 65: INCEIPL $4
+
+ 0xFE87C3C: 92E101EC stw r23,492(r1)
+ 66: GETL R23, t50
+ 67: GETL R1, t52
+ 68: ADDL $0x1EC, t52
+ 69: STL t50, (t52)
+ 70: INCEIPL $4
+
+ 0xFE87C40: 93810200 stw r28,512(r1)
+ 71: GETL R28, t54
+ 72: GETL R1, t56
+ 73: ADDL $0x200, t56
+ 74: STL t54, (t56)
+ 75: INCEIPL $4
+
+ 0xFE87C44: 920101D0 stw r16,464(r1)
+ 76: GETL R16, t58
+ 77: GETL R1, t60
+ 78: ADDL $0x1D0, t60
+ 79: STL t58, (t60)
+ 80: INCEIPL $4
+
+ 0xFE87C48: 922101D4 stw r17,468(r1)
+ 81: GETL R17, t62
+ 82: GETL R1, t64
+ 83: ADDL $0x1D4, t64
+ 84: STL t62, (t64)
+ 85: INCEIPL $4
+
+ 0xFE87C4C: 92A101E4 stw r21,484(r1)
+ 86: GETL R21, t66
+ 87: GETL R1, t68
+ 88: ADDL $0x1E4, t68
+ 89: STL t66, (t68)
+ 90: INCEIPL $4
+
+ 0xFE87C50: 92C101E8 stw r22,488(r1)
+ 91: GETL R22, t70
+ 92: GETL R1, t72
+ 93: ADDL $0x1E8, t72
+ 94: STL t70, (t72)
+ 95: INCEIPL $4
+
+ 0xFE87C54: 930101F0 stw r24,496(r1)
+ 96: GETL R24, t74
+ 97: GETL R1, t76
+ 98: ADDL $0x1F0, t76
+ 99: STL t74, (t76)
+ 100: INCEIPL $4
+
+ 0xFE87C58: 932101F4 stw r25,500(r1)
+ 101: GETL R25, t78
+ 102: GETL R1, t80
+ 103: ADDL $0x1F4, t80
+ 104: STL t78, (t80)
+ 105: INCEIPL $4
+
+ 0xFE87C5C: 934101F8 stw r26,504(r1)
+ 106: GETL R26, t82
+ 107: GETL R1, t84
+ 108: ADDL $0x1F8, t84
+ 109: STL t82, (t84)
+ 110: INCEIPL $4
+
+ 0xFE87C60: 936101FC stw r27,508(r1)
+ 111: GETL R27, t86
+ 112: GETL R1, t88
+ 113: ADDL $0x1FC, t88
+ 114: STL t86, (t88)
+ 115: INCEIPL $4
+
+ 0xFE87C64: 93A10204 stw r29,516(r1)
+ 116: GETL R29, t90
+ 117: GETL R1, t92
+ 118: ADDL $0x204, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0xFE87C68: 918101C4 stw r12,452(r1)
+ 121: GETL R12, t94
+ 122: GETL R1, t96
+ 123: ADDL $0x1C4, t96
+ 124: STL t94, (t96)
+ 125: INCEIPL $4
+
+ 0xFE87C6C: 82E40000 lwz r23,0(r4)
+ 126: GETL R4, t98
+ 127: LDL (t98), t100
+ 128: PUTL t100, R23
+ 129: INCEIPL $4
+
+ 0xFE87C70: 4806F9B1 bl 0xFEF7620
+ 130: MOVL $0xFE87C74, t102
+ 131: PUTL t102, LR
+ 132: JMPo-c $0xFEF7620 ($4)
+
+
+
+. 1653 FE87BFC 120
+. 93 C1 02 08 7F C8 02 A6 7D 80 00 26 91 E1 01 CC 91 C1 01 C8 7C 6E 1B 78 81 FE 01 28 38 60 00 1E 93 E1 02 0C 7C 3F 0B 78 90 01 02 14 92 41 01 D8 7C 92 23 78 92 61 01 DC 3A 60 FF FF 92 81 01 E0 92 E1 01 EC 93 81 02 00 92 01 01 D0 92 21 01 D4 92 A1 01 E4 92 C1 01 E8 93 01 01 F0 93 21 01 F4 93 41 01 F8 93 61 01 FC 93 A1 02 04 91 81 01 C4 82 E4 00 00 48 06 F9 B1
+==== BB 1654 sysconf(0xFEF7620) approx BBs exec'd 0 ====
+
+ 0xFEF7620: 2F830022 cmpi cr7,r3,34
+ 0: GETL R3, t0
+ 1: MOVL $0x22, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFEF7624: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xFEF7628: 9421FDD0 stwu r1,-560(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFDD0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFEF762C: 480B0825 bl 0xFFA7E50
+ 14: MOVL $0xFEF7630, t12
+ 15: PUTL t12, LR
+ 16: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1654 FEF7620 16
+. 2F 83 00 22 7C 08 02 A6 94 21 FD D0 48 0B 08 25
+==== BB 1655 (0xFEF7630) approx BBs exec'd 0 ====
+
+ 0xFEF7630: 93410218 stw r26,536(r1)
+ 0: GETL R26, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x218, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEF7634: 7C7A1B78 or r26,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0xFEF7638: 93C10228 stw r30,552(r1)
+ 8: GETL R30, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x228, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEF763C: 7FC802A6 mflr r30
+ 13: GETL LR, t10
+ 14: PUTL t10, R30
+ 15: INCEIPL $4
+
+ 0xFEF7640: 93E1022C stw r31,556(r1)
+ 16: GETL R31, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x22C, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFEF7644: 7C3F0B78 or r31,r1,r1
+ 21: GETL R1, t16
+ 22: PUTL t16, R31
+ 23: INCEIPL $4
+
+ 0xFEF7648: 92C10208 stw r22,520(r1)
+ 24: GETL R22, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x208, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xFEF764C: 92E1020C stw r23,524(r1)
+ 29: GETL R23, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x20C, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFEF7650: 93010210 stw r24,528(r1)
+ 34: GETL R24, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x210, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFEF7654: 93210214 stw r25,532(r1)
+ 39: GETL R25, t30
+ 40: GETL R1, t32
+ 41: ADDL $0x214, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFEF7658: 9361021C stw r27,540(r1)
+ 44: GETL R27, t34
+ 45: GETL R1, t36
+ 46: ADDL $0x21C, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0xFEF765C: 93810220 stw r28,544(r1)
+ 49: GETL R28, t38
+ 50: GETL R1, t40
+ 51: ADDL $0x220, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0xFEF7660: 93A10224 stw r29,548(r1)
+ 54: GETL R29, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x224, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0xFEF7664: 90010234 stw r0,564(r1)
+ 59: GETL R0, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x234, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0xFEF7668: 419E0090 bc 12,30,0xFEF76F8
+ 64: Js30o $0xFEF76F8
+
+
+
+. 1655 FEF7630 60
+. 93 41 02 18 7C 7A 1B 78 93 C1 02 28 7F C8 02 A6 93 E1 02 2C 7C 3F 0B 78 92 C1 02 08 92 E1 02 0C 93 01 02 10 93 21 02 14 93 61 02 1C 93 81 02 20 93 A1 02 24 90 01 02 34 41 9E 00 90
+==== BB 1656 (0xFEF766C) approx BBs exec'd 0 ====
+
+ 0xFEF766C: 409D002C bc 4,29,0xFEF7698
+ 0: Jc29o $0xFEF7698
+
+
+
+. 1656 FEF766C 4
+. 40 9D 00 2C
+==== BB 1657 (0xFEF7698) approx BBs exec'd 0 ====
+
+ 0xFEF7698: 2F830003 cmpi cr7,r3,3
+ 0: GETL R3, t0
+ 1: MOVL $0x3, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFEF769C: 409EFFDC bc 4,30,0xFEF7678
+ 5: Jc30o $0xFEF7678
+
+
+
+. 1657 FEF7698 8
+. 2F 83 00 03 40 9E FF DC
+==== BB 1658 (0xFEF7678) approx BBs exec'd 0 ====
+
+ 0xFEF7678: 281A00EC cmpli cr0,r26,236
+ 0: GETL R26, t0
+ 1: MOVL $0xEC, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFEF767C: 4181002C bc 12,1,0xFEF76A8
+ 5: Js01o $0xFEF76A8
+
+
+
+. 1658 FEF7678 8
+. 28 1A 00 EC 41 81 00 2C
+==== BB 1659 (0xFEF7680) approx BBs exec'd 0 ====
+
+ 0xFEF7680: 817E0AB0 lwz r11,2736(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xAB0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFEF7684: 5757103A rlwinm r23,r26,2,0,29
+ 5: GETL R26, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R23
+ 8: INCEIPL $4
+
+ 0xFEF7688: 7ED7582E lwzx r22,r23,r11
+ 9: GETL R11, t6
+ 10: GETL R23, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R22
+ 14: INCEIPL $4
+
+ 0xFEF768C: 7D965A14 add r12,r22,r11
+ 15: GETL R22, t12
+ 16: GETL R11, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R12
+ 19: INCEIPL $4
+
+ 0xFEF7690: 7D8903A6 mtctr r12
+ 20: GETL R12, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0xFEF7694: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+
+. 1659 FEF7680 24
+. 81 7E 0A B0 57 57 10 3A 7E D7 58 2E 7D 96 5A 14 7D 89 03 A6 4E 80 04 20
+==== BB 1660 (0xFEF7954) approx BBs exec'd 0 ====
+
+ 0xFEF7954: 48031FA9 bl 0xFF298FC
+ 0: MOVL $0xFEF7958, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFF298FC ($4)
+
+
+
+. 1660 FEF7954 4
+. 48 03 1F A9
+==== BB 1661 getpagesize(0xFF298FC) approx BBs exec'd 0 ====
+
+ 0xFF298FC: 7D8802A6 mflr r12
+ 0: GETL LR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0xFF29900: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFF29904: 4807E54D bl 0xFFA7E50
+ 9: MOVL $0xFF29908, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1661 FF298FC 12
+. 7D 88 02 A6 94 21 FF F0 48 07 E5 4D
+==== BB 1662 (0xFF29908) approx BBs exec'd 0 ====
+
+ 0xFF29908: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF2990C: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFF29910: 7D8803A6 mtlr r12
+ 8: GETL R12, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0xFF29914: 813E1BC8 lwz r9,7112(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x1BC8, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0xFF29918: 80090004 lwz r0,4(r9)
+ 16: GETL R9, t12
+ 17: ADDL $0x4, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0xFF2991C: 2F800000 cmpi cr7,r0,0
+ 21: GETL R0, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0xFF29920: 419E0014 bc 12,30,0xFF29934
+ 25: Js30o $0xFF29934
+
+
+
+. 1662 FF29908 28
+. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 81 3E 1B C8 80 09 00 04 2F 80 00 00 41 9E 00 14
+==== BB 1663 (0xFF29924) approx BBs exec'd 0 ====
+
+ 0xFF29924: 7C030378 or r3,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFF29928: 83C10008 lwz r30,8(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFF2992C: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xFF29930: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 1663 FF29924 16
+. 7C 03 03 78 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 1664 (0xFEF7958) approx BBs exec'd 0 ====
+
+ 0xFEF7958: 4BFFFD64 b 0xFEF76BC
+ 0: JMPo $0xFEF76BC ($4)
+
+
+
+. 1664 FEF7958 4
+. 4B FF FD 64
+==== BB 1665 (0xFEF76BC) approx BBs exec'd 0 ====
+
+ 0xFEF76BC: 80A10000 lwz r5,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFEF76C0: 83A50004 lwz r29,4(r5)
+ 4: GETL R5, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R29
+ 8: INCEIPL $4
+
+ 0xFEF76C4: 82C5FFD8 lwz r22,-40(r5)
+ 9: GETL R5, t8
+ 10: ADDL $0xFFFFFFD8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R22
+ 13: INCEIPL $4
+
+ 0xFEF76C8: 7FA803A6 mtlr r29
+ 14: GETL R29, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0xFEF76CC: 82E5FFDC lwz r23,-36(r5)
+ 17: GETL R5, t14
+ 18: ADDL $0xFFFFFFDC, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R23
+ 21: INCEIPL $4
+
+ 0xFEF76D0: 8305FFE0 lwz r24,-32(r5)
+ 22: GETL R5, t18
+ 23: ADDL $0xFFFFFFE0, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R24
+ 26: INCEIPL $4
+
+ 0xFEF76D4: 8325FFE4 lwz r25,-28(r5)
+ 27: GETL R5, t22
+ 28: ADDL $0xFFFFFFE4, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R25
+ 31: INCEIPL $4
+
+ 0xFEF76D8: 8345FFE8 lwz r26,-24(r5)
+ 32: GETL R5, t26
+ 33: ADDL $0xFFFFFFE8, t26
+ 34: LDL (t26), t28
+ 35: PUTL t28, R26
+ 36: INCEIPL $4
+
+ 0xFEF76DC: 8365FFEC lwz r27,-20(r5)
+ 37: GETL R5, t30
+ 38: ADDL $0xFFFFFFEC, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R27
+ 41: INCEIPL $4
+
+ 0xFEF76E0: 8385FFF0 lwz r28,-16(r5)
+ 42: GETL R5, t34
+ 43: ADDL $0xFFFFFFF0, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R28
+ 46: INCEIPL $4
+
+ 0xFEF76E4: 83A5FFF4 lwz r29,-12(r5)
+ 47: GETL R5, t38
+ 48: ADDL $0xFFFFFFF4, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R29
+ 51: INCEIPL $4
+
+ 0xFEF76E8: 83C5FFF8 lwz r30,-8(r5)
+ 52: GETL R5, t42
+ 53: ADDL $0xFFFFFFF8, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R30
+ 56: INCEIPL $4
+
+ 0xFEF76EC: 83E5FFFC lwz r31,-4(r5)
+ 57: GETL R5, t46
+ 58: ADDL $0xFFFFFFFC, t46
+ 59: LDL (t46), t48
+ 60: PUTL t48, R31
+ 61: INCEIPL $4
+
+ 0xFEF76F0: 7CA12B78 or r1,r5,r5
+ 62: GETL R5, t50
+ 63: PUTL t50, R1
+ 64: INCEIPL $4
+
+ 0xFEF76F4: 4E800020 blr
+ 65: GETL LR, t52
+ 66: JMPo-r t52 ($4)
+
+
+
+. 1665 FEF76BC 60
+. 80 A1 00 00 83 A5 00 04 82 C5 FF D8 7F A8 03 A6 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
+==== BB 1666 (0xFE87C74) approx BBs exec'd 0 ====
+
+ 0xFE87C74: 838F0000 lwz r28,0(r15)
+ 0: GETL R15, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R28
+ 3: INCEIPL $4
+
+ 0xFE87C78: 7C741B78 or r20,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R20
+ 6: INCEIPL $4
+
+ 0xFE87C7C: 2F9C0000 cmpi cr7,r28,0
+ 7: GETL R28, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0xFE87C80: 419E0034 bc 12,30,0xFE87CB4
+ 11: Js30o $0xFE87CB4
+
+
+
+. 1666 FE87C74 16
+. 83 8F 00 00 7C 74 1B 78 2F 9C 00 00 41 9E 00 34
+==== BB 1667 (0xFE87CB4) approx BBs exec'd 0 ====
+
+ 0xFE87CB4: 7EE3BB78 or r3,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE87CB8: 3880002E li r4,46
+ 3: MOVL $0x2E, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE87CBC: 4804E611 bl 0xFED62CC
+ 6: MOVL $0xFE87CC0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED62CC ($4)
+
+
+
+. 1667 FE87CB4 12
+. 7E E3 BB 78 38 80 00 2E 48 04 E6 11
+==== BB 1668 (0xFED6380) approx BBs exec'd 0 ====
+
+ 0xFED6380: 7CE06038 and r0,r7,r12
+ 0: GETL R7, t0
+ 1: GETL R12, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED6384: 7CEA6378 or r10,r7,r12
+ 5: GETL R7, t4
+ 6: GETL R12, t6
+ 7: ORL t6, t4
+ 8: PUTL t4, R10
+ 9: INCEIPL $4
+
+ 0xFED6388: 7C003A14 add r0,r0,r7
+ 10: GETL R0, t8
+ 11: GETL R7, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0xFED638C: 7D4900F8 nor r9,r10,r0
+ 15: GETL R10, t12
+ 16: GETL R0, t14
+ 17: ORL t14, t12
+ 18: NOTL t12
+ 19: PUTL t12, R9
+ 20: INCEIPL $4
+
+ 0xFED6390: 7D240034 cntlzw r4,r9
+ 21: GETL R9, t16
+ 22: CNTLZL t16
+ 23: PUTL t16, R4
+ 24: INCEIPL $4
+
+ 0xFED6394: 3908FFFC addi r8,r8,-4
+ 25: GETL R8, t18
+ 26: ADDL $0xFFFFFFFC, t18
+ 27: PUTL t18, R8
+ 28: INCEIPL $4
+
+ 0xFED6398: 5484E8FE rlwinm r4,r4,29,3,31
+ 29: GETL R4, t20
+ 30: SHRL $0x3, t20
+ 31: PUTL t20, R4
+ 32: INCEIPL $4
+
+ 0xFED639C: 7C682214 add r3,r8,r4
+ 33: GETL R8, t22
+ 34: GETL R4, t24
+ 35: ADDL t22, t24
+ 36: PUTL t24, R3
+ 37: INCEIPL $4
+
+ 0xFED63A0: 4E800020 blr
+ 38: GETL LR, t26
+ 39: JMPo-r t26 ($4)
+
+
+
+. 1668 FED6380 36
+. 7C E0 60 38 7C EA 63 78 7C 00 3A 14 7D 49 00 F8 7D 24 00 34 39 08 FF FC 54 84 E8 FE 7C 68 22 14 4E 80 00 20
+==== BB 1669 (0xFE87CC0) approx BBs exec'd 0 ====
+
+ 0xFE87CC0: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE87CC4: 419A0018 bc 12,26,0xFE87CDC
+ 4: Js26o $0xFE87CDC
+
+
+
+. 1669 FE87CC0 8
+. 2F 03 00 00 41 9A 00 18
+==== BB 1670 (0xFE87CC8) approx BBs exec'd 0 ====
+
+ 0xFE87CC8: 88030001 lbz r0,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE87CCC: 2F800040 cmpi cr7,r0,64
+ 5: GETL R0, t4
+ 6: MOVL $0x40, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFE87CD0: 419E000C bc 12,30,0xFE87CDC
+ 10: Js30o $0xFE87CDC
+
+
+
+. 1670 FE87CC8 12
+. 88 03 00 01 2F 80 00 40 41 9E 00 0C
+==== BB 1671 (0xFE87CD4) approx BBs exec'd 0 ====
+
+ 0xFE87CD4: 2C000000 cmpi cr0,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFE87CD8: 40820584 bc 4,2,0xFE8825C
+ 4: Jc02o $0xFE8825C
+
+
+
+. 1671 FE87CD4 8
+. 2C 00 00 00 40 82 05 84
+==== BB 1672 (0xFE8825C) approx BBs exec'd 0 ====
+
+ 0xFE8825C: 3B630001 addi r27,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0xFE88260: 38800040 li r4,64
+ 4: MOVL $0x40, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0xFE88264: 7F63DB78 or r3,r27,r27
+ 7: GETL R27, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0xFE88268: 48050F81 bl 0xFED91E8
+ 10: MOVL $0xFE8826C, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0xFED91E8 ($4)
+
+
+
+. 1672 FE8825C 16
+. 3B 63 00 01 38 80 00 40 7F 63 DB 78 48 05 0F 81
+==== BB 1673 strchrnul(0xFED91E8) approx BBs exec'd 0 ====
+
+ 0xFED91E8: 546007BE rlwinm r0,r3,0,30,31
+ 0: GETL R3, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0xFED91EC: 9421FFE0 stwu r1,-32(r1)
+ 4: GETL R1, t2
+ 5: GETL R1, t4
+ 6: ADDL $0xFFFFFFE0, t4
+ 7: PUTL t4, R1
+ 8: STL t2, (t4)
+ 9: INCEIPL $4
+
+ 0xFED91F0: 2F800000 cmpi cr7,r0,0
+ 10: GETL R0, t6
+ 11: CMP0L t6, t8 (-rSo)
+ 12: ICRFL t8, $0x7, CR
+ 13: INCEIPL $4
+
+ 0xFED91F4: 5484063E rlwinm r4,r4,0,24,31
+ 14: GETL R4, t10
+ 15: ANDL $0xFF, t10
+ 16: PUTL t10, R4
+ 17: INCEIPL $4
+
+ 0xFED91F8: 419E0024 bc 12,30,0xFED921C
+ 18: Js30o $0xFED921C
+
+
+
+. 1673 FED91E8 20
+. 54 60 07 BE 94 21 FF E0 2F 80 00 00 54 84 06 3E 41 9E 00 24
+==== BB 1674 (0xFED91FC) approx BBs exec'd 0 ====
+
+ 0xFED91FC: 88A30000 lbz r5,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFED9200: 7C052000 cmp cr0,r5,r4
+ 4: GETL R5, t4
+ 5: GETL R4, t6
+ 6: CMPL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFED9204: 2F050000 cmpi cr6,r5,0
+ 9: GETL R5, t10
+ 10: CMP0L t10, t12 (-rSo)
+ 11: ICRFL t12, $0x6, CR
+ 12: INCEIPL $4
+
+ 0xFED9208: 418200DC bc 12,2,0xFED92E4
+ 13: Js02o $0xFED92E4
+
+
+
+. 1674 FED91FC 16
+. 88 A3 00 00 7C 05 20 00 2F 05 00 00 41 82 00 DC
+==== BB 1675 (0xFED920C) approx BBs exec'd 0 ====
+
+ 0xFED920C: 419A00D8 bc 12,26,0xFED92E4
+ 0: Js26o $0xFED92E4
+
+
+
+. 1675 FED920C 4
+. 41 9A 00 D8
+==== BB 1676 (0xFED9210) approx BBs exec'd 0 ====
+
+ 0xFED9210: 38630001 addi r3,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFED9214: 70600003 andi. r0,r3,0x3
+ 4: GETL R3, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R0
+ 7: CMP0L t2, t4 (-rSo)
+ 8: ICRFL t4, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFED9218: 4082FFE4 bc 4,2,0xFED91FC
+ 10: Jc02o $0xFED91FC
+
+
+
+. 1676 FED9210 12
+. 38 63 00 01 70 60 00 03 40 82 FF E4
+==== BB 1677 (0xFED921C) approx BBs exec'd 0 ====
+
+ 0xFED921C: 548A402E rlwinm r10,r4,8,0,23
+ 0: GETL R4, t0
+ 1: SHLL $0x8, t0
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0xFED9220: 3CE07EFE lis r7,32510
+ 4: MOVL $0x7EFE0000, t2
+ 5: PUTL t2, R7
+ 6: INCEIPL $4
+
+ 0xFED9224: 7C865378 or r6,r4,r10
+ 7: GETL R4, t4
+ 8: GETL R10, t6
+ 9: ORL t6, t4
+ 10: PUTL t4, R6
+ 11: INCEIPL $4
+
+ 0xFED9228: 3D008101 lis r8,-32511
+ 12: MOVL $0x81010000, t8
+ 13: PUTL t8, R8
+ 14: INCEIPL $4
+
+ 0xFED922C: 54C9801E rlwinm r9,r6,16,0,15
+ 15: GETL R6, t10
+ 16: SHLL $0x10, t10
+ 17: PUTL t10, R9
+ 18: INCEIPL $4
+
+ 0xFED9230: 60E7FEFF ori r7,r7,0xFEFF
+ 19: MOVL $0x7EFEFEFF, t12
+ 20: PUTL t12, R7
+ 21: INCEIPL $4
+
+ 0xFED9234: 7CC54B78 or r5,r6,r9
+ 22: GETL R6, t14
+ 23: GETL R9, t16
+ 24: ORL t16, t14
+ 25: PUTL t14, R5
+ 26: INCEIPL $4
+
+ 0xFED9238: 61080100 ori r8,r8,0x100
+ 27: MOVL $0x81010100, t18
+ 28: PUTL t18, R8
+ 29: INCEIPL $4
+
+ 0xFED923C: 80C30000 lwz r6,0(r3)
+ 30: GETL R3, t20
+ 31: LDL (t20), t22
+ 32: PUTL t22, R6
+ 33: INCEIPL $4
+
+ 0xFED9240: 38630004 addi r3,r3,4
+ 34: GETL R3, t24
+ 35: ADDL $0x4, t24
+ 36: PUTL t24, R3
+ 37: INCEIPL $4
+
+ 0xFED9244: 7CCC2A78 xor r12,r6,r5
+ 38: GETL R6, t26
+ 39: GETL R5, t28
+ 40: XORL t26, t28
+ 41: PUTL t28, R12
+ 42: INCEIPL $4
+
+ 0xFED9248: 7D463A14 add r10,r6,r7
+ 43: GETL R6, t30
+ 44: GETL R7, t32
+ 45: ADDL t30, t32
+ 46: PUTL t32, R10
+ 47: INCEIPL $4
+
+ 0xFED924C: 7C0C3A14 add r0,r12,r7
+ 48: GETL R12, t34
+ 49: GETL R7, t36
+ 50: ADDL t34, t36
+ 51: PUTL t36, R0
+ 52: INCEIPL $4
+
+ 0xFED9250: 7CC95278 xor r9,r6,r10
+ 53: GETL R6, t38
+ 54: GETL R10, t40
+ 55: XORL t38, t40
+ 56: PUTL t40, R9
+ 57: INCEIPL $4
+
+ 0xFED9254: 7D8B0278 xor r11,r12,r0
+ 58: GETL R12, t42
+ 59: GETL R0, t44
+ 60: XORL t42, t44
+ 61: PUTL t44, R11
+ 62: INCEIPL $4
+
+ 0xFED9258: 7D004879 andc. r0,r8,r9
+ 63: GETL R8, t46
+ 64: GETL R9, t48
+ 65: NOTL t48
+ 66: ANDL t46, t48
+ 67: PUTL t48, R0
+ 68: CMP0L t48, t50 (-rSo)
+ 69: ICRFL t50, $0x0, CR
+ 70: INCEIPL $4
+
+ 0xFED925C: 3923FFFC addi r9,r3,-4
+ 71: GETL R3, t52
+ 72: ADDL $0xFFFFFFFC, t52
+ 73: PUTL t52, R9
+ 74: INCEIPL $4
+
+ 0xFED9260: 7C000026 mfcr r0
+ 75: GETL CR, t54
+ 76: PUTL t54, R0
+ 77: INCEIPL $4
+
+ 0xFED9264: 9001000C stw r0,12(r1)
+ 78: GETL R0, t56
+ 79: GETL R1, t58
+ 80: ADDL $0xC, t58
+ 81: STL t56, (t58)
+ 82: INCEIPL $4
+
+ 0xFED9268: 7D005879 andc. r0,r8,r11
+ 83: GETL R8, t60
+ 84: GETL R11, t62
+ 85: NOTL t62
+ 86: ANDL t60, t62
+ 87: PUTL t62, R0
+ 88: CMP0L t62, t64 (-rSo)
+ 89: ICRFL t64, $0x0, CR
+ 90: INCEIPL $4
+
+ 0xFED926C: 8181000C lwz r12,12(r1)
+ 91: GETL R1, t66
+ 92: ADDL $0xC, t66
+ 93: LDL (t66), t68
+ 94: PUTL t68, R12
+ 95: INCEIPL $4
+
+ 0xFED9270: 3963FFFD addi r11,r3,-3
+ 96: GETL R3, t70
+ 97: ADDL $0xFFFFFFFD, t70
+ 98: PUTL t70, R11
+ 99: INCEIPL $4
+
+ 0xFED9274: 558CE03E rlwinm r12,r12,28,0,31
+ 100: GETL R12, t72
+ 101: ROLL $0x1C, t72
+ 102: PUTL t72, R12
+ 103: INCEIPL $4
+
+ 0xFED9278: 7D840120 mtcrf 0x40,r12
+ 104: GETL R12, t74
+ 105: ICRFL t74, $0x1, CR
+ 106: INCEIPL $4
+
+ 0xFED927C: 558C203E rlwinm r12,r12,4,0,31
+ 107: GETL R12, t76
+ 108: ROLL $0x4, t76
+ 109: PUTL t76, R12
+ 110: INCEIPL $4
+
+ 0xFED9280: 40860008 bc 4,6,0xFED9288
+ 111: Jc06o $0xFED9288
+
+
+
+. 1677 FED921C 104
+. 54 8A 40 2E 3C E0 7E FE 7C 86 53 78 3D 00 81 01 54 C9 80 1E 60 E7 FE FF 7C C5 4B 78 61 08 01 00 80 C3 00 00 38 63 00 04 7C CC 2A 78 7D 46 3A 14 7C 0C 3A 14 7C C9 52 78 7D 8B 02 78 7D 00 48 79 39 23 FF FC 7C 00 00 26 90 01 00 0C 7D 00 58 79 81 81 00 0C 39 63 FF FD 55 8C E0 3E 7D 84 01 20 55 8C 20 3E 40 86 00 08
+==== BB 1678 (0xFED9288) approx BBs exec'd 0 ====
+
+ 0xFED9288: 88C3FFFC lbz r6,-4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFED928C: 3943FFFE addi r10,r3,-2
+ 5: GETL R3, t4
+ 6: ADDL $0xFFFFFFFE, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0xFED9290: 7F862000 cmp cr7,r6,r4
+ 9: GETL R6, t6
+ 10: GETL R4, t8
+ 11: CMPL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0xFED9294: 2F060000 cmpi cr6,r6,0
+ 14: GETL R6, t12
+ 15: CMP0L t12, t14 (-rSo)
+ 16: ICRFL t14, $0x6, CR
+ 17: INCEIPL $4
+
+ 0xFED9298: 38C3FFFF addi r6,r3,-1
+ 18: GETL R3, t16
+ 19: ADDL $0xFFFFFFFF, t16
+ 20: PUTL t16, R6
+ 21: INCEIPL $4
+
+ 0xFED929C: 419E0050 bc 12,30,0xFED92EC
+ 22: Js30o $0xFED92EC
+
+
+
+. 1678 FED9288 24
+. 88 C3 FF FC 39 43 FF FE 7F 86 20 00 2F 06 00 00 38 C3 FF FF 41 9E 00 50
+==== BB 1679 (0xFED92A0) approx BBs exec'd 0 ====
+
+ 0xFED92A0: 419A004C bc 12,26,0xFED92EC
+ 0: Js26o $0xFED92EC
+
+
+
+. 1679 FED92A0 4
+. 41 9A 00 4C
+==== BB 1680 (0xFED92A4) approx BBs exec'd 0 ====
+
+ 0xFED92A4: 8923FFFD lbz r9,-3(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFD, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFED92A8: 7C892000 cmp cr1,r9,r4
+ 5: GETL R9, t4
+ 6: GETL R4, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFED92AC: 2F090000 cmpi cr6,r9,0
+ 10: GETL R9, t10
+ 11: CMP0L t10, t12 (-rSo)
+ 12: ICRFL t12, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFED92B0: 41860048 bc 12,6,0xFED92F8
+ 14: Js06o $0xFED92F8
+
+
+
+. 1680 FED92A4 16
+. 89 23 FF FD 7C 89 20 00 2F 09 00 00 41 86 00 48
+==== BB 1681 (0xFED92B4) approx BBs exec'd 0 ====
+
+ 0xFED92B4: 419A0044 bc 12,26,0xFED92F8
+ 0: Js26o $0xFED92F8
+
+
+
+. 1681 FED92B4 4
+. 41 9A 00 44
+==== BB 1682 (0xFED92B8) approx BBs exec'd 0 ====
+
+ 0xFED92B8: 8963FFFE lbz r11,-2(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFE, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFED92BC: 7C0B2000 cmp cr0,r11,r4
+ 5: GETL R11, t4
+ 6: GETL R4, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFED92C0: 2F0B0000 cmpi cr6,r11,0
+ 10: GETL R11, t10
+ 11: CMP0L t10, t12 (-rSo)
+ 12: ICRFL t12, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFED92C4: 41820040 bc 12,2,0xFED9304
+ 14: Js02o $0xFED9304
+
+
+
+. 1682 FED92B8 16
+. 89 63 FF FE 7C 0B 20 00 2F 0B 00 00 41 82 00 40
+==== BB 1683 (0xFED92C8) approx BBs exec'd 0 ====
+
+ 0xFED92C8: 419A003C bc 12,26,0xFED9304
+ 0: Js26o $0xFED9304
+
+
+
+. 1683 FED92C8 4
+. 41 9A 00 3C
+==== BB 1684 (0xFED9304) approx BBs exec'd 0 ====
+
+ 0xFED9304: 7D435378 or r3,r10,r10
+ 0: GETL R10, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED9308: 38210020 addi r1,r1,32
+ 3: GETL R1, t2
+ 4: ADDL $0x20, t2
+ 5: PUTL t2, R1
+ 6: INCEIPL $4
+
+ 0xFED930C: 4E800020 blr
+ 7: GETL LR, t4
+ 8: JMPo-r t4 ($4)
+
+
+
+. 1684 FED9304 12
+. 7D 43 53 78 38 21 00 20 4E 80 00 20
+==== BB 1685 (0xFE8826C) approx BBs exec'd 0 ====
+
+ 0xFE8826C: 7FBB1850 subf r29,r27,r3
+ 0: GETL R27, t0
+ 1: GETL R3, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFE88270: 7C791B78 or r25,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R25
+ 7: INCEIPL $4
+
+ 0xFE88274: 7FA4EB78 or r4,r29,r29
+ 8: GETL R29, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0xFE88278: 7F63DB78 or r3,r27,r27
+ 11: GETL R27, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0xFE8827C: 48005B29 bl 0xFE8DDA4
+ 14: MOVL $0xFE88280, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFE8DDA4 ($4)
+
+
+
+. 1685 FE8826C 20
+. 7F BB 18 50 7C 79 1B 78 7F A4 EB 78 7F 63 DB 78 48 00 5B 29
+==== BB 1686 _nl_normalize_codeset(0xFE8DDA4) approx BBs exec'd 0 ====
+
+ 0xFE8DDA4: 38A00000 li r5,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFE8DDA8: 7D800026 mfcr r12
+ 3: GETL CR, t2
+ 4: PUTL t2, R12
+ 5: INCEIPL $4
+
+ 0xFE8DDAC: 7F852040 cmpl cr7,r5,r4
+ 6: GETL R5, t4
+ 7: GETL R4, t6
+ 8: CMPUL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0xFE8DDB0: 7C0802A6 mflr r0
+ 11: GETL LR, t10
+ 12: PUTL t10, R0
+ 13: INCEIPL $4
+
+ 0xFE8DDB4: 9421FFE0 stwu r1,-32(r1)
+ 14: GETL R1, t12
+ 15: GETL R1, t14
+ 16: ADDL $0xFFFFFFE0, t14
+ 17: PUTL t14, R1
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFE8DDB8: 4811A099 bl 0xFFA7E50
+ 20: MOVL $0xFE8DDBC, t16
+ 21: PUTL t16, LR
+ 22: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1686 FE8DDA4 24
+. 38 A0 00 00 7D 80 00 26 7F 85 20 40 7C 08 02 A6 94 21 FF E0 48 11 A0 99
+==== BB 1687 (0xFE8DDBC) approx BBs exec'd 0 ====
+
+ 0xFE8DDBC: 93A10014 stw r29,20(r1)
+ 0: GETL R29, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE8DDC0: 38C00001 li r6,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0xFE8DDC4: 93C10018 stw r30,24(r1)
+ 8: GETL R30, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x18, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE8DDC8: 7C9D2378 or r29,r4,r4
+ 13: GETL R4, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0xFE8DDCC: 93E1001C stw r31,28(r1)
+ 16: GETL R31, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x1C, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFE8DDD0: 7FC802A6 mflr r30
+ 21: GETL LR, t16
+ 22: PUTL t16, R30
+ 23: INCEIPL $4
+
+ 0xFE8DDD4: 93810010 stw r28,16(r1)
+ 24: GETL R28, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x10, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xFE8DDD8: 7C7F1B78 or r31,r3,r3
+ 29: GETL R3, t22
+ 30: PUTL t22, R31
+ 31: INCEIPL $4
+
+ 0xFE8DDDC: 90010024 stw r0,36(r1)
+ 32: GETL R0, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x24, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xFE8DDE0: 38E00000 li r7,0
+ 37: MOVL $0x0, t28
+ 38: PUTL t28, R7
+ 39: INCEIPL $4
+
+ 0xFE8DDE4: 9181000C stw r12,12(r1)
+ 40: GETL R12, t30
+ 41: GETL R1, t32
+ 42: ADDL $0xC, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0xFE8DDE8: 409C0180 bc 4,28,0xFE8DF68
+ 45: Jc28o $0xFE8DF68
+
+
+
+. 1687 FE8DDBC 48
+. 93 A1 00 14 38 C0 00 01 93 C1 00 18 7C 9D 23 78 93 E1 00 1C 7F C8 02 A6 93 81 00 10 7C 7F 1B 78 90 01 00 24 38 E0 00 00 91 81 00 0C 40 9C 01 80
+==== BB 1688 (0xFE8DDEC) approx BBs exec'd 0 ====
+
+ 0xFE8DDEC: 813E1CF8 lwz r9,7416(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1CF8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE8DDF0: 817E1D50 lwz r11,7504(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1D50, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0xFE8DDF4: 7FA903A6 mtctr r29
+ 10: GETL R29, t8
+ 11: PUTL t8, CTR
+ 12: INCEIPL $4
+
+ 0xFE8DDF8: 7D091214 add r8,r9,r2
+ 13: GETL R9, t10
+ 14: GETL R2, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R8
+ 17: INCEIPL $4
+
+ 0xFE8DDFC: 7C8B1214 add r4,r11,r2
+ 18: GETL R11, t14
+ 19: GETL R2, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R4
+ 22: INCEIPL $4
+
+ 0xFE8DE00: 80680000 lwz r3,0(r8)
+ 23: GETL R8, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R3
+ 26: INCEIPL $4
+
+ 0xFE8DE04: 2C030000 cmpi cr0,r3,0
+ 27: GETL R3, t22
+ 28: CMP0L t22, t24 (-rSo)
+ 29: ICRFL t24, $0x0, CR
+ 30: INCEIPL $4
+
+ 0xFE8DE08: 41820140 bc 12,2,0xFE8DF48
+ 31: Js02o $0xFE8DF48
+
+
+
+. 1688 FE8DDEC 32
+. 81 3E 1C F8 81 7E 1D 50 7F A9 03 A6 7D 09 12 14 7C 8B 12 14 80 68 00 00 2C 03 00 00 41 82 01 40
+==== BB 1689 (0xFE8DE0C) approx BBs exec'd 0 ====
+
+ 0xFE8DE0C: 7D7F38AE lbzx r11,r31,r7
+ 0: GETL R7, t0
+ 1: GETL R31, t2
+ 2: ADDL t2, t0
+ 3: LDB (t0), t4
+ 4: PUTL t4, R11
+ 5: INCEIPL $4
+
+ 0xFE8DE10: 81480000 lwz r10,0(r8)
+ 6: GETL R8, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R10
+ 9: INCEIPL $4
+
+ 0xFE8DE14: 5569083C rlwinm r9,r11,1,0,30
+ 10: GETL R11, t10
+ 11: SHLL $0x1, t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0xFE8DE18: 7C09522E lhzx r0,r9,r10
+ 14: GETL R10, t12
+ 15: GETL R9, t14
+ 16: ADDL t14, t12
+ 17: LDW (t12), t16
+ 18: PUTL t16, R0
+ 19: INCEIPL $4
+
+ 0xFE8DE1C: 2F8A0000 cmpi cr7,r10,0
+ 20: GETL R10, t18
+ 21: CMP0L t18, t20 (-rSo)
+ 22: ICRFL t20, $0x7, CR
+ 23: INCEIPL $4
+
+ 0xFE8DE20: 70090800 andi. r9,r0,0x800
+ 24: GETL R0, t22
+ 25: ANDL $0x800, t22
+ 26: PUTL t22, R9
+ 27: CMP0L t22, t24 (-rSo)
+ 28: ICRFL t24, $0x0, CR
+ 29: INCEIPL $4
+
+ 0xFE8DE24: 41820024 bc 12,2,0xFE8DE48
+ 30: Js02o $0xFE8DE48
+
+
+
+. 1689 FE8DE0C 28
+. 7D 7F 38 AE 81 48 00 00 55 69 08 3C 7C 09 52 2E 2F 8A 00 00 70 09 08 00 41 82 00 24
+==== BB 1690 (0xFE8DE28) approx BBs exec'd 0 ====
+
+ 0xFE8DE28: 38A50001 addi r5,r5,1
+ 0: GETL R5, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0xFE8DE2C: 419E0144 bc 12,30,0xFE8DF70
+ 4: Js30o $0xFE8DF70
+
+
+
+. 1690 FE8DE28 8
+. 38 A5 00 01 41 9E 01 44
+==== BB 1691 (0xFE8DE30) approx BBs exec'd 0 ====
+
+ 0xFE8DE30: 5569083C rlwinm r9,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFE8DE34: 7C09522E lhzx r0,r9,r10
+ 4: GETL R10, t2
+ 5: GETL R9, t4
+ 6: ADDL t4, t2
+ 7: LDW (t2), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFE8DE38: 540BF7FE rlwinm r11,r0,30,31,31
+ 10: GETL R0, t8
+ 11: ROLL $0x1E, t8
+ 12: ANDL $0x1, t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0xFE8DE3C: 318BFFFF addic r12,r11,-1
+ 15: GETL R11, t10
+ 16: ADCL $0xFFFFFFFF, t10 (-wCa)
+ 17: PUTL t10, R12
+ 18: INCEIPL $4
+
+ 0xFE8DE40: 7D8C6110 subfe r12,r12,r12
+ 19: GETL R12, t12
+ 20: GETL R12, t14
+ 21: SBBL t12, t14 (-rCa-wCa)
+ 22: PUTL t14, R12
+ 23: INCEIPL $4
+
+ 0xFE8DE44: 7CC66038 and r6,r6,r12
+ 24: GETL R6, t16
+ 25: GETL R12, t18
+ 26: ANDL t16, t18
+ 27: PUTL t18, R6
+ 28: INCEIPL $4
+
+ 0xFE8DE48: 38E70001 addi r7,r7,1
+ 29: GETL R7, t20
+ 30: ADDL $0x1, t20
+ 31: PUTL t20, R7
+ 32: INCEIPL $4
+
+ 0xFE8DE4C: 4200FFB4 bc 16,0,0xFE8DE00
+ 33: GETL CTR, t22
+ 34: ADDL $0xFFFFFFFF, t22
+ 35: PUTL t22, CTR
+ 36: JIFZL t22, $0xFE8DE50
+ 37: JMPo $0xFE8DE00 ($4)
+
+
+
+. 1691 FE8DE30 32
+. 55 69 08 3C 7C 09 52 2E 54 0B F7 FE 31 8B FF FF 7D 8C 61 10 7C C6 60 38 38 E7 00 01 42 00 FF B4
+==== BB 1692 (0xFE8DE00) approx BBs exec'd 0 ====
+
+ 0xFE8DE00: 80680000 lwz r3,0(r8)
+ 0: GETL R8, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE8DE04: 2C030000 cmpi cr0,r3,0
+ 4: GETL R3, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFE8DE08: 41820140 bc 12,2,0xFE8DF48
+ 8: Js02o $0xFE8DF48
+
+
+
+. 1692 FE8DE00 12
+. 80 68 00 00 2C 03 00 00 41 82 01 40
+==== BB 1693 (0xFE8DE48) approx BBs exec'd 0 ====
+
+ 0xFE8DE48: 38E70001 addi r7,r7,1
+ 0: GETL R7, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R7
+ 3: INCEIPL $4
+
+ 0xFE8DE4C: 4200FFB4 bc 16,0,0xFE8DE00
+ 4: GETL CTR, t2
+ 5: ADDL $0xFFFFFFFF, t2
+ 6: PUTL t2, CTR
+ 7: JIFZL t2, $0xFE8DE50
+ 8: JMPo $0xFE8DE00 ($4)
+
+
+
+. 1693 FE8DE48 8
+. 38 E7 00 01 42 00 FF B4
+==== BB 1694 (0xFE8DE50) approx BBs exec'd 0 ====
+
+ 0xFE8DE50: 2E060000 cmpi cr4,r6,0
+ 0: GETL R6, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFE8DE54: 419200EC bc 12,18,0xFE8DF40
+ 4: Js18o $0xFE8DF40
+
+
+
+. 1694 FE8DE50 8
+. 2E 06 00 00 41 92 00 EC
+==== BB 1695 (0xFE8DF40) approx BBs exec'd 0 ====
+
+ 0xFE8DF40: 38650001 addi r3,r5,1
+ 0: GETL R5, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFE8DF44: 4BFFFF18 b 0xFE8DE5C
+ 4: JMPo $0xFE8DE5C ($4)
+
+
+
+. 1695 FE8DF40 8
+. 38 65 00 01 4B FF FF 18
+==== BB 1696 (0xFE8DE5C) approx BBs exec'd 0 ====
+
+ 0xFE8DE5C: 4811C4AD bl 0xFFAA308
+ 0: MOVL $0xFE8DE60, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFFAA308 ($4)
+
+
+
+. 1696 FE8DE5C 4
+. 48 11 C4 AD
+==== BB 1697 (0xFFAA308) approx BBs exec'd 0 ====
+
+ 0xFFAA308: 4BF275D8 b 0xFED18E0
+ 0: JMPo $0xFED18E0 ($4)
+
+
+
+. 1697 FFAA308 4
+. 4B F2 75 D8
+==== BB 1698 malloc(0xFED18E0) approx BBs exec'd 0 ====
+
+ 0xFED18E0: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED18E4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFED18E8: 480D6569 bl 0xFFA7E50
+ 9: MOVL $0xFED18EC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1698 FED18E0 12
+. 94 21 FF E0 7C 08 02 A6 48 0D 65 69
+==== BB 1699 (0xFED18EC) approx BBs exec'd 0 ====
+
+ 0xFED18EC: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFED18F0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFED18F4: 93A10014 stw r29,20(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFED18F8: 90010024 stw r0,36(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFED18FC: 7C7D1B78 or r29,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R29
+ 20: INCEIPL $4
+
+ 0xFED1900: 93410008 stw r26,8(r1)
+ 21: GETL R26, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x8, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFED1904: 813E1A7C lwz r9,6780(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x1A7C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R9
+ 30: INCEIPL $4
+
+ 0xFED1908: 9361000C stw r27,12(r1)
+ 31: GETL R27, t24
+ 32: GETL R1, t26
+ 33: ADDL $0xC, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFED190C: 80090000 lwz r0,0(r9)
+ 36: GETL R9, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R0
+ 39: INCEIPL $4
+
+ 0xFED1910: 93810010 stw r28,16(r1)
+ 40: GETL R28, t32
+ 41: GETL R1, t34
+ 42: ADDL $0x10, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0xFED1914: 2F800000 cmpi cr7,r0,0
+ 45: GETL R0, t36
+ 46: CMP0L t36, t38 (-rSo)
+ 47: ICRFL t38, $0x7, CR
+ 48: INCEIPL $4
+
+ 0xFED1918: 93E1001C stw r31,28(r1)
+ 49: GETL R31, t40
+ 50: GETL R1, t42
+ 51: ADDL $0x1C, t42
+ 52: STL t40, (t42)
+ 53: INCEIPL $4
+
+ 0xFED191C: 419E003C bc 12,30,0xFED1958
+ 54: Js30o $0xFED1958
+
+
+
+. 1699 FED18EC 52
+. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 90 01 00 24 7C 7D 1B 78 93 41 00 08 81 3E 1A 7C 93 61 00 0C 80 09 00 00 93 81 00 10 2F 80 00 00 93 E1 00 1C 41 9E 00 3C
+==== BB 1700 (0xFED1920) approx BBs exec'd 0 ====
+
+ 0xFED1920: 80A10000 lwz r5,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFED1924: 7C0903A6 mtctr r0
+ 4: GETL R0, t4
+ 5: PUTL t4, CTR
+ 6: INCEIPL $4
+
+ 0xFED1928: 80850004 lwz r4,4(r5)
+ 7: GETL R5, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R4
+ 11: INCEIPL $4
+
+ 0xFED192C: 4E800421 bctrl
+ 12: MOVL $0xFED1930, t10
+ 13: PUTL t10, LR
+ 14: GETL CTR, t12
+ 15: JMPo-c t12 ($4)
+
+
+
+. 1700 FED1920 16
+. 80 A1 00 00 7C 09 03 A6 80 85 00 04 4E 80 04 21
+==== BB 1701 malloc_hook_ini(0xFED2A68) approx BBs exec'd 0 ====
+
+ 0xFED2A68: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED2A6C: 7C8802A6 mflr r4
+ 6: GETL LR, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFED2A70: 480D53E1 bl 0xFFA7E50
+ 9: MOVL $0xFED2A74, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1701 FED2A68 12
+. 94 21 FF E0 7C 88 02 A6 48 0D 53 E1
+==== BB 1702 (0xFED2A74) approx BBs exec'd 0 ====
+
+ 0xFED2A74: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFED2A78: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFED2A7C: 93A10014 stw r29,20(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFED2A80: 7C7D1B78 or r29,r3,r3
+ 13: GETL R3, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0xFED2A84: 38600000 li r3,0
+ 16: MOVL $0x0, t12
+ 17: PUTL t12, R3
+ 18: INCEIPL $4
+
+ 0xFED2A88: 90810024 stw r4,36(r1)
+ 19: GETL R4, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x24, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFED2A8C: 813E1A7C lwz r9,6780(r30)
+ 24: GETL R30, t18
+ 25: ADDL $0x1A7C, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R9
+ 28: INCEIPL $4
+
+ 0xFED2A90: 93E1001C stw r31,28(r1)
+ 29: GETL R31, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x1C, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFED2A94: 90690000 stw r3,0(r9)
+ 34: GETL R3, t26
+ 35: GETL R9, t28
+ 36: STL t26, (t28)
+ 37: INCEIPL $4
+
+ 0xFED2A98: 4BFFFBDD bl 0xFED2674
+ 38: MOVL $0xFED2A9C, t30
+ 39: PUTL t30, LR
+ 40: JMPo-c $0xFED2674 ($4)
+
+
+
+. 1702 FED2A74 40
+. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 7C 7D 1B 78 38 60 00 00 90 81 00 24 81 3E 1A 7C 93 E1 00 1C 90 69 00 00 4B FF FB DD
+==== BB 1703 ptmalloc_init(0xFED2674) approx BBs exec'd 0 ====
+
+ 0xFED2674: 9421FFB0 stwu r1,-80(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFB0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED2678: 7C6802A6 mflr r3
+ 6: GETL LR, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFED267C: 480D57D5 bl 0xFFA7E50
+ 9: MOVL $0xFED2680, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1703 FED2674 12
+. 94 21 FF B0 7C 68 02 A6 48 0D 57 D5
+==== BB 1704 (0xFED2680) approx BBs exec'd 0 ====
+
+ 0xFED2680: 93C10048 stw r30,72(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x48, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFED2684: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFED2688: 9361003C stw r27,60(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x3C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFED268C: 90610054 stw r3,84(r1)
+ 13: GETL R3, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x54, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFED2690: 93E1004C stw r31,76(r1)
+ 18: GETL R31, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x4C, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFED2694: 3BE00000 li r31,0
+ 23: MOVL $0x0, t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0xFED2698: 837E1C84 lwz r27,7300(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x1C84, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R27
+ 30: INCEIPL $4
+
+ 0xFED269C: 93410038 stw r26,56(r1)
+ 31: GETL R26, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x38, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFED26A0: 801B0000 lwz r0,0(r27)
+ 36: GETL R27, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R0
+ 39: INCEIPL $4
+
+ 0xFED26A4: 93810040 stw r28,64(r1)
+ 40: GETL R28, t32
+ 41: GETL R1, t34
+ 42: ADDL $0x40, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0xFED26A8: 2F800000 cmpi cr7,r0,0
+ 45: GETL R0, t36
+ 46: CMP0L t36, t38 (-rSo)
+ 47: ICRFL t38, $0x7, CR
+ 48: INCEIPL $4
+
+ 0xFED26AC: 93A10044 stw r29,68(r1)
+ 49: GETL R29, t40
+ 50: GETL R1, t42
+ 51: ADDL $0x44, t42
+ 52: STL t40, (t42)
+ 53: INCEIPL $4
+
+ 0xFED26B0: 419C002C bc 12,28,0xFED26DC
+ 54: Js28o $0xFED26DC
+
+
+
+. 1704 FED2680 52
+. 93 C1 00 48 7F C8 02 A6 93 61 00 3C 90 61 00 54 93 E1 00 4C 3B E0 00 00 83 7E 1C 84 93 41 00 38 80 1B 00 00 93 81 00 40 2F 80 00 00 93 A1 00 44 41 9C 00 2C
+==== BB 1705 (0xFED26DC) approx BBs exec'd 0 ====
+
+ 0xFED26DC: 83BE0628 lwz r29,1576(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x628, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFED26E0: 3CA00002 lis r5,2
+ 5: MOVL $0x20000, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFED26E4: 3CC00001 lis r6,1
+ 8: MOVL $0x10000, t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0xFED26E8: 93FB0000 stw r31,0(r27)
+ 11: GETL R31, t8
+ 12: GETL R27, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFED26EC: 90DD0010 stw r6,16(r29)
+ 15: GETL R6, t12
+ 16: GETL R29, t14
+ 17: ADDL $0x10, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFED26F0: 90BD0000 stw r5,0(r29)
+ 20: GETL R5, t16
+ 21: GETL R29, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0xFED26F4: 90BD0004 stw r5,4(r29)
+ 24: GETL R5, t20
+ 25: GETL R29, t22
+ 26: ADDL $0x4, t22
+ 27: STL t20, (t22)
+ 28: INCEIPL $4
+
+ 0xFED26F8: 90BD0008 stw r5,8(r29)
+ 29: GETL R5, t24
+ 30: GETL R29, t26
+ 31: ADDL $0x8, t26
+ 32: STL t24, (t26)
+ 33: INCEIPL $4
+
+ 0xFED26FC: 48057201 bl 0xFF298FC
+ 34: MOVL $0xFED2700, t28
+ 35: PUTL t28, LR
+ 36: JMPo-c $0xFF298FC ($4)
+
+
+
+. 1705 FED26DC 36
+. 83 BE 06 28 3C A0 00 02 3C C0 00 01 93 FB 00 00 90 DD 00 10 90 BD 00 00 90 BD 00 04 90 BD 00 08 48 05 72 01
+==== BB 1706 (0xFED2700) approx BBs exec'd 0 ====
+
+ 0xFED2700: 813E1BF8 lwz r9,7160(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BF8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFED2704: 839E05FC lwz r28,1532(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x5FC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0xFED2708: 80890000 lwz r4,0(r9)
+ 10: GETL R9, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R4
+ 13: INCEIPL $4
+
+ 0xFED270C: 907D0018 stw r3,24(r29)
+ 14: GETL R3, t12
+ 15: GETL R29, t14
+ 16: ADDL $0x18, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0xFED2710: 2C040000 cmpi cr0,r4,0
+ 19: GETL R4, t16
+ 20: CMP0L t16, t18 (-rSo)
+ 21: ICRFL t18, $0x0, CR
+ 22: INCEIPL $4
+
+ 0xFED2714: 93FC0000 stw r31,0(r28)
+ 23: GETL R31, t20
+ 24: GETL R28, t22
+ 25: STL t20, (t22)
+ 26: INCEIPL $4
+
+ 0xFED2718: 939C0448 stw r28,1096(r28)
+ 27: GETL R28, t24
+ 28: GETL R28, t26
+ 29: ADDL $0x448, t26
+ 30: STL t24, (t26)
+ 31: INCEIPL $4
+
+ 0xFED271C: 41820100 bc 12,2,0xFED281C
+ 32: Js02o $0xFED281C
+
+
+
+. 1706 FED2700 32
+. 81 3E 1B F8 83 9E 05 FC 80 89 00 00 90 7D 00 18 2C 04 00 00 93 FC 00 00 93 9C 04 48 41 82 01 00
+==== BB 1707 (0xFED281C) approx BBs exec'd 0 ====
+
+ 0xFED281C: 807E0648 lwz r3,1608(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x648, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFED2820: 38810010 addi r4,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFED2824: 38A10020 addi r5,r1,32
+ 9: GETL R1, t6
+ 10: ADDL $0x20, t6
+ 11: PUTL t6, R5
+ 12: INCEIPL $4
+
+ 0xFED2828: 38C00000 li r6,0
+ 13: MOVL $0x0, t8
+ 14: PUTL t8, R6
+ 15: INCEIPL $4
+
+ 0xFED282C: 4809A5E1 bl 0xFF6CE0C
+ 16: MOVL $0xFED2830, t10
+ 17: PUTL t10, LR
+ 18: JMPo-c $0xFF6CE0C ($4)
+
+
+
+. 1707 FED281C 20
+. 80 7E 06 48 38 81 00 10 38 A1 00 20 38 C0 00 00 48 09 A5 E1
+==== BB 1708 __GI__dl_addr(0xFF6CE0C) approx BBs exec'd 0 ====
+
+ 0xFF6CE0C: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFF6CE10: 7CE802A6 mflr r7
+ 6: GETL LR, t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0xFF6CE14: 4803B03D bl 0xFFA7E50
+ 9: MOVL $0xFF6CE18, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1708 FF6CE0C 12
+. 94 21 FF D0 7C E8 02 A6 48 03 B0 3D
+==== BB 1709 (0xFF6CE18) approx BBs exec'd 0 ====
+
+ 0xFF6CE18: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF6CE1C: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFF6CE20: 9361001C stw r27,28(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFF6CE24: 90E10034 stw r7,52(r1)
+ 13: GETL R7, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x34, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFF6CE28: 93210014 stw r25,20(r1)
+ 18: GETL R25, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFF6CE2C: 7CD93378 or r25,r6,r6
+ 23: GETL R6, t18
+ 24: PUTL t18, R25
+ 25: INCEIPL $4
+
+ 0xFF6CE30: 837E1B98 lwz r27,7064(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x1B98, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R27
+ 30: INCEIPL $4
+
+ 0xFF6CE34: 93410018 stw r26,24(r1)
+ 31: GETL R26, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x18, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFF6CE38: 7CBA2B78 or r26,r5,r5
+ 36: GETL R5, t28
+ 37: PUTL t28, R26
+ 38: INCEIPL $4
+
+ 0xFF6CE3C: 801B03F8 lwz r0,1016(r27)
+ 39: GETL R27, t30
+ 40: ADDL $0x3F8, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R0
+ 43: INCEIPL $4
+
+ 0xFF6CE40: 93810020 stw r28,32(r1)
+ 44: GETL R28, t34
+ 45: GETL R1, t36
+ 46: ADDL $0x20, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0xFF6CE44: 7C9C2378 or r28,r4,r4
+ 49: GETL R4, t38
+ 50: PUTL t38, R28
+ 51: INCEIPL $4
+
+ 0xFF6CE48: 93E1002C stw r31,44(r1)
+ 52: GETL R31, t40
+ 53: GETL R1, t42
+ 54: ADDL $0x2C, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0xFF6CE4C: 7C0903A6 mtctr r0
+ 57: GETL R0, t44
+ 58: PUTL t44, CTR
+ 59: INCEIPL $4
+
+ 0xFF6CE50: 7C7F1B78 or r31,r3,r3
+ 60: GETL R3, t46
+ 61: PUTL t46, R31
+ 62: INCEIPL $4
+
+ 0xFF6CE54: 93A10024 stw r29,36(r1)
+ 63: GETL R29, t48
+ 64: GETL R1, t50
+ 65: ADDL $0x24, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0xFF6CE58: 387B0180 addi r3,r27,384
+ 68: GETL R27, t52
+ 69: ADDL $0x180, t52
+ 70: PUTL t52, R3
+ 71: INCEIPL $4
+
+ 0xFF6CE5C: 4E800421 bctrl
+ 72: MOVL $0xFF6CE60, t54
+ 73: PUTL t54, LR
+ 74: GETL CTR, t56
+ 75: JMPo-c t56 ($4)
+
+
+
+. 1709 FF6CE18 72
+. 93 C1 00 28 7F C8 02 A6 93 61 00 1C 90 E1 00 34 93 21 00 14 7C D9 33 78 83 7E 1B 98 93 41 00 18 7C BA 2B 78 80 1B 03 F8 93 81 00 20 7C 9C 23 78 93 E1 00 2C 7C 09 03 A6 7C 7F 1B 78 93 A1 00 24 38 7B 01 80 4E 80 04 21
+==== BB 1710 rtld_lock_default_lock_recursive(0x25471884) approx BBs exec'd 0 ====
+
+ 0x25471884: 80830004 lwz r4,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25471888: 9421FFF0 stwu r1,-16(r1)
+ 5: GETL R1, t4
+ 6: GETL R1, t6
+ 7: ADDL $0xFFFFFFF0, t6
+ 8: PUTL t6, R1
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x2547188C: 39240001 addi r9,r4,1
+ 11: GETL R4, t8
+ 12: ADDL $0x1, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x25471890: 38210010 addi r1,r1,16
+ 15: GETL R1, t10
+ 16: ADDL $0x10, t10
+ 17: PUTL t10, R1
+ 18: INCEIPL $4
+
+ 0x25471894: 91230004 stw r9,4(r3)
+ 19: GETL R9, t12
+ 20: GETL R3, t14
+ 21: ADDL $0x4, t14
+ 22: STL t12, (t14)
+ 23: INCEIPL $4
+
+ 0x25471898: 4E800020 blr
+ 24: GETL LR, t16
+ 25: JMPo-r t16 ($4)
+
+
+
+. 1710 25471884 24
+. 80 83 00 04 94 21 FF F0 39 24 00 01 38 21 00 10 91 23 00 04 4E 80 00 20
+==== BB 1711 (0xFF6CE60) approx BBs exec'd 0 ====
+
+ 0xFF6CE60: 38A00000 li r5,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFF6CE64: 7F67DB78 or r7,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0xFF6CE68: 38DB0168 addi r6,r27,360
+ 6: GETL R27, t4
+ 7: ADDL $0x168, t4
+ 8: PUTL t4, R6
+ 9: INCEIPL $4
+
+ 0xFF6CE6C: 81070000 lwz r8,0(r7)
+ 10: GETL R7, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R8
+ 13: INCEIPL $4
+
+ 0xFF6CE70: 38E70018 addi r7,r7,24
+ 14: GETL R7, t10
+ 15: ADDL $0x18, t10
+ 16: PUTL t10, R7
+ 17: INCEIPL $4
+
+ 0xFF6CE74: 2F880000 cmpi cr7,r8,0
+ 18: GETL R8, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x7, CR
+ 21: INCEIPL $4
+
+ 0xFF6CE78: 419E006C bc 12,30,0xFF6CEE4
+ 22: Js30o $0xFF6CEE4
+
+
+
+. 1711 FF6CE60 28
+. 38 A0 00 00 7F 67 DB 78 38 DB 01 68 81 07 00 00 38 E7 00 18 2F 88 00 00 41 9E 00 6C
+==== BB 1712 (0xFF6CE7C) approx BBs exec'd 0 ====
+
+ 0xFF6CE7C: 806801A0 lwz r3,416(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x1A0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFF6CE80: 7C03F840 cmpl cr0,r3,r31
+ 5: GETL R3, t4
+ 6: GETL R31, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFF6CE84: 41810054 bc 12,1,0xFF6CED8
+ 10: Js01o $0xFF6CED8
+
+
+
+. 1712 FF6CE7C 12
+. 80 68 01 A0 7C 03 F8 40 41 81 00 54
+==== BB 1713 (0xFF6CED8) approx BBs exec'd 0 ====
+
+ 0xFF6CED8: 8108000C lwz r8,12(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFF6CEDC: 4BFFFF98 b 0xFF6CE74
+ 5: JMPo $0xFF6CE74 ($4)
+
+
+
+. 1713 FF6CED8 8
+. 81 08 00 0C 4B FF FF 98
+==== BB 1714 (0xFF6CE74) approx BBs exec'd 0 ====
+
+ 0xFF6CE74: 2F880000 cmpi cr7,r8,0
+ 0: GETL R8, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFF6CE78: 419E006C bc 12,30,0xFF6CEE4
+ 4: Js30o $0xFF6CEE4
+
+
+
+. 1714 FF6CE74 8
+. 2F 88 00 00 41 9E 00 6C
+==== BB 1715 (0xFF6CE88) approx BBs exec'd 0 ====
+
+ 0xFF6CE88: 808801A4 lwz r4,420(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x1A4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFF6CE8C: 7C84F840 cmpl cr1,r4,r31
+ 5: GETL R4, t4
+ 6: GETL R31, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFF6CE90: 40850048 bc 4,5,0xFF6CED8
+ 10: Jc05o $0xFF6CED8
+
+
+
+. 1715 FF6CE88 12
+. 80 88 01 A4 7C 84 F8 40 40 85 00 48
+==== BB 1716 (0xFF6CE94) approx BBs exec'd 0 ====
+
+ 0xFF6CE94: A1680154 lhz r11,340(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x154, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFF6CE98: 2F0B0000 cmpi cr6,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFF6CE9C: 419A0044 bc 12,26,0xFF6CEE0
+ 9: Js26o $0xFF6CEE0
+
+
+
+. 1716 FF6CE94 12
+. A1 68 01 54 2F 0B 00 00 41 9A 00 44
+==== BB 1717 (0xFF6CEA0) approx BBs exec'd 0 ====
+
+ 0xFF6CEA0: 8148014C lwz r10,332(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x14C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFF6CEA4: 396BFFFF addi r11,r11,-1
+ 5: GETL R11, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0xFF6CEA8: 55692834 rlwinm r9,r11,5,0,26
+ 9: GETL R11, t6
+ 10: SHLL $0x5, t6
+ 11: PUTL t6, R9
+ 12: INCEIPL $4
+
+ 0xFF6CEAC: 7D89502E lwzx r12,r9,r10
+ 13: GETL R10, t8
+ 14: GETL R9, t10
+ 15: ADDL t10, t8
+ 16: LDL (t8), t12
+ 17: PUTL t12, R12
+ 18: INCEIPL $4
+
+ 0xFF6CEB0: 2F8C0001 cmpi cr7,r12,1
+ 19: GETL R12, t14
+ 20: MOVL $0x1, t18
+ 21: CMPL t14, t18, t16 (-rSo)
+ 22: ICRFL t16, $0x7, CR
+ 23: INCEIPL $4
+
+ 0xFF6CEB4: 409EFFF0 bc 4,30,0xFF6CEA4
+ 24: Jc30o $0xFF6CEA4
+
+
+
+. 1717 FF6CEA0 24
+. 81 48 01 4C 39 6B FF FF 55 69 28 34 7D 89 50 2E 2F 8C 00 01 40 9E FF F0
+==== BB 1718 (0xFF6CEA4) approx BBs exec'd 0 ====
+
+ 0xFF6CEA4: 396BFFFF addi r11,r11,-1
+ 0: GETL R11, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFF6CEA8: 55692834 rlwinm r9,r11,5,0,26
+ 4: GETL R11, t2
+ 5: SHLL $0x5, t2
+ 6: PUTL t2, R9
+ 7: INCEIPL $4
+
+ 0xFF6CEAC: 7D89502E lwzx r12,r9,r10
+ 8: GETL R10, t4
+ 9: GETL R9, t6
+ 10: ADDL t6, t4
+ 11: LDL (t4), t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0xFF6CEB0: 2F8C0001 cmpi cr7,r12,1
+ 14: GETL R12, t10
+ 15: MOVL $0x1, t14
+ 16: CMPL t10, t14, t12 (-rSo)
+ 17: ICRFL t12, $0x7, CR
+ 18: INCEIPL $4
+
+ 0xFF6CEB4: 409EFFF0 bc 4,30,0xFF6CEA4
+ 19: Jc30o $0xFF6CEA4
+
+
+
+. 1718 FF6CEA4 20
+. 39 6B FF FF 55 69 28 34 7D 89 50 2E 2F 8C 00 01 40 9E FF F0
+==== BB 1719 (0xFF6CEB8) approx BBs exec'd 0 ====
+
+ 0xFF6CEB8: 7C695214 add r3,r9,r10
+ 0: GETL R9, t0
+ 1: GETL R10, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFF6CEBC: 80080000 lwz r0,0(r8)
+ 5: GETL R8, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0xFF6CEC0: 81630008 lwz r11,8(r3)
+ 9: GETL R3, t8
+ 10: ADDL $0x8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0xFF6CEC4: 81430014 lwz r10,20(r3)
+ 14: GETL R3, t12
+ 15: ADDL $0x14, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R10
+ 18: INCEIPL $4
+
+ 0xFF6CEC8: 7FA05A14 add r29,r0,r11
+ 19: GETL R0, t16
+ 20: GETL R11, t18
+ 21: ADDL t16, t18
+ 22: PUTL t18, R29
+ 23: INCEIPL $4
+
+ 0xFF6CECC: 7D3D5214 add r9,r29,r10
+ 24: GETL R29, t20
+ 25: GETL R10, t22
+ 26: ADDL t20, t22
+ 27: PUTL t22, R9
+ 28: INCEIPL $4
+
+ 0xFF6CED0: 7C09F840 cmpl cr0,r9,r31
+ 29: GETL R9, t24
+ 30: GETL R31, t26
+ 31: CMPUL t24, t26, t28 (-rSo)
+ 32: ICRFL t28, $0x0, CR
+ 33: INCEIPL $4
+
+ 0xFF6CED4: 4181000C bc 12,1,0xFF6CEE0
+ 34: Js01o $0xFF6CEE0
+
+
+
+. 1719 FF6CEB8 32
+. 7C 69 52 14 80 08 00 00 81 63 00 08 81 43 00 14 7F A0 5A 14 7D 3D 52 14 7C 09 F8 40 41 81 00 0C
+==== BB 1720 (0xFF6CEE0) approx BBs exec'd 0 ====
+
+ 0xFF6CEE0: 7D054378 or r5,r8,r8
+ 0: GETL R8, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFF6CEE4: 7C873000 cmp cr1,r7,r6
+ 3: GETL R7, t2
+ 4: GETL R6, t4
+ 5: CMPL t2, t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFF6CEE8: 4085FF84 bc 4,5,0xFF6CE6C
+ 8: Jc05o $0xFF6CE6C
+
+
+
+. 1720 FF6CEE0 12
+. 7D 05 43 78 7C 87 30 00 40 85 FF 84
+==== BB 1721 (0xFF6CE6C) approx BBs exec'd 0 ====
+
+ 0xFF6CE6C: 81070000 lwz r8,0(r7)
+ 0: GETL R7, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0xFF6CE70: 38E70018 addi r7,r7,24
+ 4: GETL R7, t4
+ 5: ADDL $0x18, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0xFF6CE74: 2F880000 cmpi cr7,r8,0
+ 8: GETL R8, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFF6CE78: 419E006C bc 12,30,0xFF6CEE4
+ 12: Js30o $0xFF6CEE4
+
+
+
+. 1721 FF6CE6C 16
+. 81 07 00 00 38 E7 00 18 2F 88 00 00 41 9E 00 6C
+==== BB 1722 (0xFF6CEE4) approx BBs exec'd 0 ====
+
+ 0xFF6CEE4: 7C873000 cmp cr1,r7,r6
+ 0: GETL R7, t0
+ 1: GETL R6, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFF6CEE8: 4085FF84 bc 4,5,0xFF6CE6C
+ 5: Jc05o $0xFF6CE6C
+
+
+
+. 1722 FF6CEE4 8
+. 7C 87 30 00 40 85 FF 84
+==== BB 1723 (0xFF6CEEC) approx BBs exec'd 0 ====
+
+ 0xFF6CEEC: 2F050000 cmpi cr6,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFF6CEF0: 3BA00000 li r29,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R29
+ 6: INCEIPL $4
+
+ 0xFF6CEF4: 419A012C bc 12,26,0xFF6D020
+ 7: Js26o $0xFF6D020
+
+
+
+. 1723 FF6CEEC 12
+. 2F 05 00 00 3B A0 00 00 41 9A 01 2C
+==== BB 1724 (0xFF6CEF8) approx BBs exec'd 0 ====
+
+ 0xFF6CEF8: 80850004 lwz r4,4(r5)
+ 0: GETL R5, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFF6CEFC: 80E501A0 lwz r7,416(r5)
+ 5: GETL R5, t4
+ 6: ADDL $0x1A0, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0xFF6CF00: 909C0000 stw r4,0(r28)
+ 10: GETL R4, t8
+ 11: GETL R28, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFF6CF04: 81050004 lwz r8,4(r5)
+ 14: GETL R5, t12
+ 15: ADDL $0x4, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R8
+ 18: INCEIPL $4
+
+ 0xFF6CF08: 90FC0004 stw r7,4(r28)
+ 19: GETL R7, t16
+ 20: GETL R28, t18
+ 21: ADDL $0x4, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0xFF6CF0C: 88C80000 lbz r6,0(r8)
+ 24: GETL R8, t20
+ 25: LDB (t20), t22
+ 26: PUTL t22, R6
+ 27: INCEIPL $4
+
+ 0xFF6CF10: 2F860000 cmpi cr7,r6,0
+ 28: GETL R6, t24
+ 29: CMP0L t24, t26 (-rSo)
+ 30: ICRFL t26, $0x7, CR
+ 31: INCEIPL $4
+
+ 0xFF6CF14: 419E0164 bc 12,30,0xFF6D078
+ 32: Js30o $0xFF6D078
+
+
+
+. 1724 FF6CEF8 32
+. 80 85 00 04 80 E5 01 A0 90 9C 00 00 81 05 00 04 90 FC 00 04 88 C8 00 00 2F 86 00 00 41 9E 01 64
+==== BB 1725 (0xFF6CF18) approx BBs exec'd 0 ====
+
+ 0xFF6CF18: 81050030 lwz r8,48(r5)
+ 0: GETL R5, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFF6CF1C: 80E50034 lwz r7,52(r5)
+ 5: GETL R5, t4
+ 6: ADDL $0x34, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0xFF6CF20: 2C880000 cmpi cr1,r8,0
+ 10: GETL R8, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0xFF6CF24: 81650038 lwz r11,56(r5)
+ 14: GETL R5, t12
+ 15: ADDL $0x38, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R11
+ 18: INCEIPL $4
+
+ 0xFF6CF28: 80670004 lwz r3,4(r7)
+ 19: GETL R7, t16
+ 20: ADDL $0x4, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R3
+ 23: INCEIPL $4
+
+ 0xFF6CF2C: 80C50048 lwz r6,72(r5)
+ 24: GETL R5, t20
+ 25: ADDL $0x48, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R6
+ 28: INCEIPL $4
+
+ 0xFF6CF30: 814B0004 lwz r10,4(r11)
+ 29: GETL R11, t24
+ 30: ADDL $0x4, t24
+ 31: LDL (t24), t26
+ 32: PUTL t26, R10
+ 33: INCEIPL $4
+
+ 0xFF6CF34: 7C671B78 or r7,r3,r3
+ 34: GETL R3, t28
+ 35: PUTL t28, R7
+ 36: INCEIPL $4
+
+ 0xFF6CF38: 83A60004 lwz r29,4(r6)
+ 37: GETL R6, t30
+ 38: ADDL $0x4, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R29
+ 41: INCEIPL $4
+
+ 0xFF6CF3C: 41860014 bc 12,6,0xFF6CF50
+ 42: Js06o $0xFF6CF50
+
+
+
+. 1725 FF6CF18 40
+. 81 05 00 30 80 E5 00 34 2C 88 00 00 81 65 00 38 80 67 00 04 80 C5 00 48 81 4B 00 04 7C 67 1B 78 83 A6 00 04 41 86 00 14
+==== BB 1726 (0xFF6CF40) approx BBs exec'd 0 ====
+
+ 0xFF6CF40: 80880004 lwz r4,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFF6CF44: 81040004 lwz r8,4(r4)
+ 5: GETL R4, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0xFF6CF48: 55002036 rlwinm r0,r8,4,0,27
+ 10: GETL R8, t8
+ 11: SHLL $0x4, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0xFF6CF4C: 7CE05214 add r7,r0,r10
+ 14: GETL R0, t10
+ 15: GETL R10, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0xFF6CF50: 7F8A3840 cmpl cr7,r10,r7
+ 19: GETL R10, t14
+ 20: GETL R7, t16
+ 21: CMPUL t14, t16, t18 (-rSo)
+ 22: ICRFL t18, $0x7, CR
+ 23: INCEIPL $4
+
+ 0xFF6CF54: 38800000 li r4,0
+ 24: MOVL $0x0, t20
+ 25: PUTL t20, R4
+ 26: INCEIPL $4
+
+ 0xFF6CF58: 2C040000 cmpi cr0,r4,0
+ 27: GETL R4, t22
+ 28: CMP0L t22, t24 (-rSo)
+ 29: ICRFL t24, $0x0, CR
+ 30: INCEIPL $4
+
+ 0xFF6CF5C: 409C0084 bc 4,28,0xFF6CFE0
+ 31: Jc28o $0xFF6CFE0
+
+
+
+. 1726 FF6CF40 32
+. 80 88 00 04 81 04 00 04 55 00 20 36 7C E0 52 14 7F 8A 38 40 38 80 00 00 2C 04 00 00 40 9C 00 84
+==== BB 1727 (0xFF6CF60) approx BBs exec'd 0 ====
+
+ 0xFF6CF60: 80C50000 lwz r6,0(r5)
+ 0: GETL R5, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFF6CF64: 810A0004 lwz r8,4(r10)
+ 4: GETL R10, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R8
+ 8: INCEIPL $4
+
+ 0xFF6CF68: 7D664214 add r11,r6,r8
+ 9: GETL R6, t8
+ 10: GETL R8, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0xFF6CF6C: 7C8BF840 cmpl cr1,r11,r31
+ 14: GETL R11, t12
+ 15: GETL R31, t14
+ 16: CMPUL t12, t14, t16 (-rSo)
+ 17: ICRFL t16, $0x1, CR
+ 18: INCEIPL $4
+
+ 0xFF6CF70: 41850064 bc 12,5,0xFF6CFD4
+ 19: Js05o $0xFF6CFD4
+
+
+
+. 1727 FF6CF60 20
+. 80 C5 00 00 81 0A 00 04 7D 66 42 14 7C 8B F8 40 41 85 00 64
+==== BB 1728 (0xFF6CF74) approx BBs exec'd 0 ====
+
+ 0xFF6CF74: 892A000C lbz r9,12(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFF6CF78: 552C073E rlwinm r12,r9,0,28,31
+ 5: GETL R9, t4
+ 6: ANDL $0xF, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFF6CF7C: 2F8C0006 cmpi cr7,r12,6
+ 9: GETL R12, t6
+ 10: MOVL $0x6, t10
+ 11: CMPL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x7, CR
+ 13: INCEIPL $4
+
+ 0xFF6CF80: 419E0054 bc 12,30,0xFF6CFD4
+ 14: Js30o $0xFF6CFD4
+
+
+
+. 1728 FF6CF74 16
+. 89 2A 00 0C 55 2C 07 3E 2F 8C 00 06 41 9E 00 54
+==== BB 1729 (0xFF6CF84) approx BBs exec'd 0 ====
+
+ 0xFF6CF84: 800A0008 lwz r0,8(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFF6CF88: 2C800000 cmpi cr1,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFF6CF8C: 4086000C bc 4,6,0xFF6CF98
+ 9: Jc06o $0xFF6CF98
+
+
+
+. 1729 FF6CF84 12
+. 80 0A 00 08 2C 80 00 00 40 86 00 0C
+==== BB 1730 (0xFF6CF90) approx BBs exec'd 0 ====
+
+ 0xFF6CF90: 7F8BF800 cmp cr7,r11,r31
+ 0: GETL R11, t0
+ 1: GETL R31, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFF6CF94: 419E0010 bc 12,30,0xFF6CFA4
+ 5: Js30o $0xFF6CFA4
+
+
+
+. 1730 FF6CF90 8
+. 7F 8B F8 00 41 9E 00 10
+==== BB 1731 (0xFF6CF98) approx BBs exec'd 0 ====
+
+ 0xFF6CF98: 7C0B0214 add r0,r11,r0
+ 0: GETL R11, t0
+ 1: GETL R0, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFF6CF9C: 7C80F840 cmpl cr1,r0,r31
+ 5: GETL R0, t4
+ 6: GETL R31, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFF6CFA0: 40850034 bc 4,5,0xFF6CFD4
+ 10: Jc05o $0xFF6CFD4
+
+
+
+. 1731 FF6CF98 12
+. 7C 0B 02 14 7C 80 F8 40 40 85 00 34
+==== BB 1732 (0xFF6CFD4) approx BBs exec'd 0 ====
+
+ 0xFF6CFD4: 394A0010 addi r10,r10,16
+ 0: GETL R10, t0
+ 1: ADDL $0x10, t0
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0xFF6CFD8: 7C8A3840 cmpl cr1,r10,r7
+ 4: GETL R10, t2
+ 5: GETL R7, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFF6CFDC: 4184FF88 bc 12,4,0xFF6CF64
+ 9: Js04o $0xFF6CF64
+
+
+
+. 1732 FF6CFD4 12
+. 39 4A 00 10 7C 8A 38 40 41 84 FF 88
+==== BB 1733 (0xFF6CF64) approx BBs exec'd 0 ====
+
+ 0xFF6CF64: 810A0004 lwz r8,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFF6CF68: 7D664214 add r11,r6,r8
+ 5: GETL R6, t4
+ 6: GETL R8, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0xFF6CF6C: 7C8BF840 cmpl cr1,r11,r31
+ 10: GETL R11, t8
+ 11: GETL R31, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0xFF6CF70: 41850064 bc 12,5,0xFF6CFD4
+ 15: Js05o $0xFF6CFD4
+
+
+
+. 1733 FF6CF64 16
+. 81 0A 00 04 7D 66 42 14 7C 8B F8 40 41 85 00 64
+==== BB 1734 (0xFF6CFE0) approx BBs exec'd 0 ====
+
+ 0xFF6CFE0: 2F9A0000 cmpi cr7,r26,0
+ 0: GETL R26, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFF6CFE4: 419E0008 bc 12,30,0xFF6CFEC
+ 4: Js30o $0xFF6CFEC
+
+
+
+. 1734 FF6CFE0 8
+. 2F 9A 00 00 41 9E 00 08
+==== BB 1735 (0xFF6CFE8) approx BBs exec'd 0 ====
+
+ 0xFF6CFE8: 90BA0000 stw r5,0(r26)
+ 0: GETL R5, t0
+ 1: GETL R26, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFF6CFEC: 2C990000 cmpi cr1,r25,0
+ 4: GETL R25, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFF6CFF0: 41860008 bc 12,6,0xFF6CFF8
+ 8: Js06o $0xFF6CFF8
+
+
+
+. 1735 FF6CFE8 12
+. 90 BA 00 00 2C 99 00 00 41 86 00 08
+==== BB 1736 (0xFF6CFF8) approx BBs exec'd 0 ====
+
+ 0xFF6CFF8: 41820068 bc 12,2,0xFF6D060
+ 0: Js02o $0xFF6D060
+
+
+
+. 1736 FF6CFF8 4
+. 41 82 00 68
+==== BB 1737 (0xFF6D060) approx BBs exec'd 0 ====
+
+ 0xFF6D060: 909C000C stw r4,12(r28)
+ 0: GETL R4, t0
+ 1: GETL R28, t2
+ 2: ADDL $0xC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF6D064: 909C0008 stw r4,8(r28)
+ 5: GETL R4, t4
+ 6: GETL R28, t6
+ 7: ADDL $0x8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFF6D068: 4BFFFFB4 b 0xFF6D01C
+ 10: JMPo $0xFF6D01C ($4)
+
+
+
+. 1737 FF6D060 12
+. 90 9C 00 0C 90 9C 00 08 4B FF FF B4
+==== BB 1738 (0xFF6D01C) approx BBs exec'd 0 ====
+
+ 0xFF6D01C: 3BA00001 li r29,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFF6D020: 839B03FC lwz r28,1020(r27)
+ 3: GETL R27, t2
+ 4: ADDL $0x3FC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFF6D024: 387B0180 addi r3,r27,384
+ 8: GETL R27, t6
+ 9: ADDL $0x180, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0xFF6D028: 7F8903A6 mtctr r28
+ 12: GETL R28, t8
+ 13: PUTL t8, CTR
+ 14: INCEIPL $4
+
+ 0xFF6D02C: 4E800421 bctrl
+ 15: MOVL $0xFF6D030, t10
+ 16: PUTL t10, LR
+ 17: GETL CTR, t12
+ 18: JMPo-c t12 ($4)
+
+
+
+. 1738 FF6D01C 20
+. 3B A0 00 01 83 9B 03 FC 38 7B 01 80 7F 89 03 A6 4E 80 04 21
+==== BB 1739 rtld_lock_default_unlock_recursive(0x2547189C) approx BBs exec'd 0 ====
+
+ 0x2547189C: 80830004 lwz r4,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254718A0: 9421FFF0 stwu r1,-16(r1)
+ 5: GETL R1, t4
+ 6: GETL R1, t6
+ 7: ADDL $0xFFFFFFF0, t6
+ 8: PUTL t6, R1
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x254718A4: 3924FFFF addi r9,r4,-1
+ 11: GETL R4, t8
+ 12: ADDL $0xFFFFFFFF, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x254718A8: 38210010 addi r1,r1,16
+ 15: GETL R1, t10
+ 16: ADDL $0x10, t10
+ 17: PUTL t10, R1
+ 18: INCEIPL $4
+
+ 0x254718AC: 91230004 stw r9,4(r3)
+ 19: GETL R9, t12
+ 20: GETL R3, t14
+ 21: ADDL $0x4, t14
+ 22: STL t12, (t14)
+ 23: INCEIPL $4
+
+ 0x254718B0: 4E800020 blr
+ 24: GETL LR, t16
+ 25: JMPo-r t16 ($4)
+
+
+
+. 1739 2547189C 24
+. 80 83 00 04 94 21 FF F0 39 24 FF FF 38 21 00 10 91 23 00 04 4E 80 00 20
+==== BB 1740 (0xFF6D030) approx BBs exec'd 0 ====
+
+ 0xFF6D030: 83610034 lwz r27,52(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xFF6D034: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFF6D038: 83210014 lwz r25,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R25
+ 12: INCEIPL $4
+
+ 0xFF6D03C: 7F6803A6 mtlr r27
+ 13: GETL R27, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFF6D040: 83410018 lwz r26,24(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x18, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R26
+ 20: INCEIPL $4
+
+ 0xFF6D044: 8361001C lwz r27,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R27
+ 25: INCEIPL $4
+
+ 0xFF6D048: 83810020 lwz r28,32(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R28
+ 30: INCEIPL $4
+
+ 0xFF6D04C: 83A10024 lwz r29,36(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x24, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R29
+ 35: INCEIPL $4
+
+ 0xFF6D050: 83C10028 lwz r30,40(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x28, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R30
+ 40: INCEIPL $4
+
+ 0xFF6D054: 83E1002C lwz r31,44(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x2C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R31
+ 45: INCEIPL $4
+
+ 0xFF6D058: 38210030 addi r1,r1,48
+ 46: GETL R1, t36
+ 47: ADDL $0x30, t36
+ 48: PUTL t36, R1
+ 49: INCEIPL $4
+
+ 0xFF6D05C: 4E800020 blr
+ 50: GETL LR, t38
+ 51: JMPo-r t38 ($4)
+
+
+
+. 1740 FF6D030 48
+. 83 61 00 34 7F A3 EB 78 83 21 00 14 7F 68 03 A6 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 1741 (0xFED2830) approx BBs exec'd 0 ====
+
+ 0xFED2830: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFED2834: 41A6FEF8 bc 13,6,0xFED272C
+ 4: Js06o $0xFED272C
+
+
+
+. 1741 FED2830 8
+. 2C 83 00 00 41 A6 FE F8
+==== BB 1742 (0xFED2838) approx BBs exec'd 0 ====
+
+ 0xFED2838: 81010020 lwz r8,32(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFED283C: 80E80018 lwz r7,24(r8)
+ 5: GETL R8, t4
+ 6: ADDL $0x18, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0xFED2840: 2F070000 cmpi cr6,r7,0
+ 10: GETL R7, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFED2844: 41BAFEE8 bc 13,26,0xFED272C
+ 14: Js26o $0xFED272C
+
+
+
+. 1742 FED2838 16
+. 81 01 00 20 80 E8 00 18 2F 07 00 00 41 BA FE E8
+==== BB 1743 (0xFED272C) approx BBs exec'd 0 ====
+
+ 0xFED272C: 809E0600 lwz r4,1536(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x600, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFED2730: 807E1B4C lwz r3,6988(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1B4C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFED2734: 7FA41214 add r29,r4,r2
+ 10: GETL R4, t8
+ 11: GETL R2, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0xFED2738: 3BE00000 li r31,0
+ 15: MOVL $0x0, t12
+ 16: PUTL t12, R31
+ 17: INCEIPL $4
+
+ 0xFED273C: 939D0000 stw r28,0(r29)
+ 18: GETL R28, t14
+ 19: GETL R29, t16
+ 20: STL t14, (t16)
+ 21: INCEIPL $4
+
+ 0xFED2740: 839E05F8 lwz r28,1528(r30)
+ 22: GETL R30, t18
+ 23: ADDL $0x5F8, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R28
+ 26: INCEIPL $4
+
+ 0xFED2744: 80C30000 lwz r6,0(r3)
+ 27: GETL R3, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R6
+ 30: INCEIPL $4
+
+ 0xFED2748: 809E0618 lwz r4,1560(r30)
+ 31: GETL R30, t26
+ 32: ADDL $0x618, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R4
+ 35: INCEIPL $4
+
+ 0xFED274C: 807E05F4 lwz r3,1524(r30)
+ 36: GETL R30, t30
+ 37: ADDL $0x5F4, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R3
+ 40: INCEIPL $4
+
+ 0xFED2750: 80BE061C lwz r5,1564(r30)
+ 41: GETL R30, t34
+ 42: ADDL $0x61C, t34
+ 43: LDL (t34), t36
+ 44: PUTL t36, R5
+ 45: INCEIPL $4
+
+ 0xFED2754: 835E1B6C lwz r26,7020(r30)
+ 46: GETL R30, t38
+ 47: ADDL $0x1B6C, t38
+ 48: LDL (t38), t40
+ 49: PUTL t40, R26
+ 50: INCEIPL $4
+
+ 0xFED2758: 93FC0000 stw r31,0(r28)
+ 51: GETL R31, t42
+ 52: GETL R28, t44
+ 53: STL t42, (t44)
+ 54: INCEIPL $4
+
+ 0xFED275C: 3B800000 li r28,0
+ 55: MOVL $0x0, t46
+ 56: PUTL t46, R28
+ 57: INCEIPL $4
+
+ 0xFED2760: 4806D4E1 bl 0xFF3FC40
+ 58: MOVL $0xFED2764, t48
+ 59: PUTL t48, LR
+ 60: JMPo-c $0xFF3FC40 ($4)
+
+
+
+. 1743 FED272C 56
+. 80 9E 06 00 80 7E 1B 4C 7F A4 12 14 3B E0 00 00 93 9D 00 00 83 9E 05 F8 80 C3 00 00 80 9E 06 18 80 7E 05 F4 80 BE 06 1C 83 5E 1B 6C 93 FC 00 00 3B 80 00 00 48 06 D4 E1
+==== BB 1744 __GI___register_atfork(0xFF3FC40) approx BBs exec'd 0 ====
+
+ 0xFF3FC40: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFF3FC44: 7CE802A6 mflr r7
+ 6: GETL LR, t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0xFF3FC48: 48068209 bl 0xFFA7E50
+ 9: MOVL $0xFF3FC4C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1744 FF3FC40 12
+. 94 21 FF D0 7C E8 02 A6 48 06 82 09
+==== BB 1745 (0xFF3FC4C) approx BBs exec'd 0 ====
+
+ 0xFF3FC4C: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF3FC50: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFF3FC54: 93410018 stw r26,24(r1)
+ 8: GETL R26, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x18, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFF3FC58: 9361001C stw r27,28(r1)
+ 13: GETL R27, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x1C, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFF3FC5C: 7CDA3378 or r26,r6,r6
+ 18: GETL R6, t14
+ 19: PUTL t14, R26
+ 20: INCEIPL $4
+
+ 0xFF3FC60: 93810020 stw r28,32(r1)
+ 21: GETL R28, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x20, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFF3FC64: 7CBB2B78 or r27,r5,r5
+ 26: GETL R5, t20
+ 27: PUTL t20, R27
+ 28: INCEIPL $4
+
+ 0xFF3FC68: 93A10024 stw r29,36(r1)
+ 29: GETL R29, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x24, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFF3FC6C: 7C9C2378 or r28,r4,r4
+ 34: GETL R4, t26
+ 35: PUTL t26, R28
+ 36: INCEIPL $4
+
+ 0xFF3FC70: 93E1002C stw r31,44(r1)
+ 37: GETL R31, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x2C, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFF3FC74: 7C7D1B78 or r29,r3,r3
+ 42: GETL R3, t32
+ 43: PUTL t32, R29
+ 44: INCEIPL $4
+
+ 0xFF3FC78: 93210014 stw r25,20(r1)
+ 45: GETL R25, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x14, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0xFF3FC7C: 39600000 li r11,0
+ 50: MOVL $0x0, t38
+ 51: PUTL t38, R11
+ 52: INCEIPL $4
+
+ 0xFF3FC80: 90E10034 stw r7,52(r1)
+ 53: GETL R7, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x34, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0xFF3FC84: 38000001 li r0,1
+ 58: MOVL $0x1, t44
+ 59: PUTL t44, R0
+ 60: INCEIPL $4
+
+ 0xFF3FC88: 83FE1D14 lwz r31,7444(r30)
+ 61: GETL R30, t46
+ 62: ADDL $0x1D14, t46
+ 63: LDL (t46), t48
+ 64: PUTL t48, R31
+ 65: INCEIPL $4
+
+ 0xFF3FC8C: 7D20F828 lwarx r9,r0,r31
+ 66: GETL R31, t50
+ 67: LOCKo
+ 68: LDL (t50), t52
+ 69: PUTL t52, R9
+ 70: INCEIPL $4
+
+ 0xFF3FC90: 7C095800 cmp cr0,r9,r11
+ 71: GETL R9, t54
+ 72: GETL R11, t56
+ 73: CMPL t54, t56, t58 (-rSo)
+ 74: ICRFL t58, $0x0, CR
+ 75: INCEIPL $4
+
+ 0xFF3FC94: 4082000C bc 4,2,0xFF3FCA0
+ 76: Jc02o $0xFF3FCA0
+
+
+
+. 1745 FF3FC4C 76
+. 93 C1 00 28 7F C8 02 A6 93 41 00 18 93 61 00 1C 7C DA 33 78 93 81 00 20 7C BB 2B 78 93 A1 00 24 7C 9C 23 78 93 E1 00 2C 7C 7D 1B 78 93 21 00 14 39 60 00 00 90 E1 00 34 38 00 00 01 83 FE 1D 14 7D 20 F8 28 7C 09 58 00 40 82 00 0C
+==== BB 1746 (0xFF3FC98) approx BBs exec'd 0 ====
+
+ 0xFF3FC98: 7C00F92D stwcx. r0,r0,r31
+ 0: GETL R31, t0
+ 1: GETL R0, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFF3FC9C: 40A2FFF0 bc 5,2,0xFF3FC8C
+ 6: Jc02o $0xFF3FC8C
+
+
+
+. 1746 FF3FC98 8
+. 7C 00 F9 2D 40 A2 FF F0
+==== BB 1747 (0xFF3FC8C) approx BBs exec'd 0 ====
+
+ 0xFF3FC8C: 7D20F828 lwarx r9,r0,r31
+ 0: GETL R31, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFF3FC90: 7C095800 cmp cr0,r9,r11
+ 5: GETL R9, t4
+ 6: GETL R11, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFF3FC94: 4082000C bc 4,2,0xFF3FCA0
+ 10: Jc02o $0xFF3FCA0
+
+
+
+. 1747 FF3FC8C 12
+. 7D 20 F8 28 7C 09 58 00 40 82 00 0C
+==== BB 1748 (0xFF3FCA0) approx BBs exec'd 0 ====
+
+ 0xFF3FCA0: 4C00012C 0: INCEIPL $4
+
+ 0xFF3FCA4: 2F890000 cmpi cr7,r9,0
+ 1: GETL R9, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFF3FCA8: 409E015C bc 4,30,0xFF3FE04
+ 5: Jc30o $0xFF3FE04
+
+
+
+. 1748 FF3FCA0 12
+. 4C 00 01 2C 2F 89 00 00 40 9E 01 5C
+==== BB 1749 (0xFF3FCAC) approx BBs exec'd 0 ====
+
+ 0xFF3FCAC: 807E10F8 lwz r3,4344(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x10F8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFF3FCB0: 7C791B78 or r25,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R25
+ 7: INCEIPL $4
+
+ 0xFF3FCB4: 39400000 li r10,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R10
+ 10: INCEIPL $4
+
+ 0xFF3FCB8: 39630018 addi r11,r3,24
+ 11: GETL R3, t8
+ 12: ADDL $0x18, t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0xFF3FCBC: 39000000 li r8,0
+ 15: MOVL $0x0, t10
+ 16: PUTL t10, R8
+ 17: INCEIPL $4
+
+ 0xFF3FCC0: 48000008 b 0xFF3FCC8
+ 18: JMPo $0xFF3FCC8 ($4)
+
+
+
+. 1749 FF3FCAC 24
+. 80 7E 10 F8 7C 79 1B 78 39 40 00 00 39 63 00 18 39 00 00 00 48 00 00 08
+==== BB 1750 (0xFF3FCC8) approx BBs exec'd 0 ====
+
+ 0xFF3FCC8: 808B0000 lwz r4,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFF3FCCC: 394A0001 addi r10,r10,1
+ 4: GETL R10, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0xFF3FCD0: 7D094378 or r9,r8,r8
+ 8: GETL R8, t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0xFF3FCD4: 2B0A002F cmpli cr6,r10,47
+ 11: GETL R10, t8
+ 12: MOVL $0x2F, t12
+ 13: CMPUL t8, t12, t10 (-rSo)
+ 14: ICRFL t10, $0x6, CR
+ 15: INCEIPL $4
+
+ 0xFF3FCD8: 2C040000 cmpi cr0,r4,0
+ 16: GETL R4, t14
+ 17: CMP0L t14, t16 (-rSo)
+ 18: ICRFL t16, $0x0, CR
+ 19: INCEIPL $4
+
+ 0xFF3FCDC: 3908001C addi r8,r8,28
+ 20: GETL R8, t18
+ 21: ADDL $0x1C, t18
+ 22: PUTL t18, R8
+ 23: INCEIPL $4
+
+ 0xFF3FCE0: 396B001C addi r11,r11,28
+ 24: GETL R11, t20
+ 25: ADDL $0x1C, t20
+ 26: PUTL t20, R11
+ 27: INCEIPL $4
+
+ 0xFF3FCE4: 4082FFE0 bc 4,2,0xFF3FCC4
+ 28: Jc02o $0xFF3FCC4
+
+
+
+. 1750 FF3FCC8 32
+. 80 8B 00 00 39 4A 00 01 7D 09 43 78 2B 0A 00 2F 2C 04 00 00 39 08 00 1C 39 6B 00 1C 40 82 FF E0
+==== BB 1751 (0xFF3FCE8) approx BBs exec'd 0 ====
+
+ 0xFF3FCE8: 7C691A14 add r3,r9,r3
+ 0: GETL R9, t0
+ 1: GETL R3, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFF3FCEC: 39400001 li r10,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0xFF3FCF0: 39630004 addi r11,r3,4
+ 8: GETL R3, t6
+ 9: ADDL $0x4, t6
+ 10: PUTL t6, R11
+ 11: INCEIPL $4
+
+ 0xFF3FCF4: 39000000 li r8,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R8
+ 14: INCEIPL $4
+
+ 0xFF3FCF8: 2F0B0000 cmpi cr6,r11,0
+ 15: GETL R11, t10
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x6, CR
+ 18: INCEIPL $4
+
+ 0xFF3FCFC: 914B0014 stw r10,20(r11)
+ 19: GETL R10, t14
+ 20: GETL R11, t16
+ 21: ADDL $0x14, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFF3FD00: 910B0018 stw r8,24(r11)
+ 24: GETL R8, t18
+ 25: GETL R11, t20
+ 26: ADDL $0x18, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xFF3FD04: 419A0024 bc 12,26,0xFF3FD28
+ 29: Js26o $0xFF3FD28
+
+
+
+. 1751 FF3FCE8 32
+. 7C 69 1A 14 39 40 00 01 39 63 00 04 39 00 00 00 2F 0B 00 00 91 4B 00 14 91 0B 00 18 41 9A 00 24
+==== BB 1752 (0xFF3FD08) approx BBs exec'd 0 ====
+
+ 0xFF3FD08: 819E1CD4 lwz r12,7380(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1CD4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFF3FD0C: 93AB0004 stw r29,4(r11)
+ 5: GETL R29, t4
+ 6: GETL R11, t6
+ 7: ADDL $0x4, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFF3FD10: 832C0000 lwz r25,0(r12)
+ 10: GETL R12, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R25
+ 13: INCEIPL $4
+
+ 0xFF3FD14: 938B0008 stw r28,8(r11)
+ 14: GETL R28, t12
+ 15: GETL R11, t14
+ 16: ADDL $0x8, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0xFF3FD18: 93230004 stw r25,4(r3)
+ 19: GETL R25, t16
+ 20: GETL R3, t18
+ 21: ADDL $0x4, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0xFF3FD1C: 936B000C stw r27,12(r11)
+ 24: GETL R27, t20
+ 25: GETL R11, t22
+ 26: ADDL $0xC, t22
+ 27: STL t20, (t22)
+ 28: INCEIPL $4
+
+ 0xFF3FD20: 916C0000 stw r11,0(r12)
+ 29: GETL R11, t24
+ 30: GETL R12, t26
+ 31: STL t24, (t26)
+ 32: INCEIPL $4
+
+ 0xFF3FD24: 934B0010 stw r26,16(r11)
+ 33: GETL R26, t28
+ 34: GETL R11, t30
+ 35: ADDL $0x10, t30
+ 36: STL t28, (t30)
+ 37: INCEIPL $4
+
+ 0xFF3FD28: 3B400000 li r26,0
+ 38: MOVL $0x0, t32
+ 39: PUTL t32, R26
+ 40: INCEIPL $4
+
+ 0xFF3FD2C: 7C0004AC sync
+ 41: INCEIPL $4
+
+ 0xFF3FD30: 7C60F828 lwarx r3,r0,r31
+ 42: GETL R31, t34
+ 43: LOCKo
+ 44: LDL (t34), t36
+ 45: PUTL t36, R3
+ 46: INCEIPL $4
+
+ 0xFF3FD34: 7F40F92D stwcx. r26,r0,r31
+ 47: GETL R31, t38
+ 48: GETL R26, t40
+ 49: LOCKo
+ 50: STL t40, (t38) (-rSo)
+ 51: ICRFL cr, $0x0, CR
+ 52: INCEIPL $4
+
+ 0xFF3FD38: 40A2FFF8 bc 5,2,0xFF3FD30
+ 53: Jc02o $0xFF3FD30
+
+
+
+. 1752 FF3FD08 52
+. 81 9E 1C D4 93 AB 00 04 83 2C 00 00 93 8B 00 08 93 23 00 04 93 6B 00 0C 91 6C 00 00 93 4B 00 10 3B 40 00 00 7C 00 04 AC 7C 60 F8 28 7F 40 F9 2D 40 A2 FF F8
+==== BB 1753 (0xFF3FD3C) approx BBs exec'd 0 ====
+
+ 0xFF3FD3C: 2C030001 cmpi cr0,r3,1
+ 0: GETL R3, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFF3FD40: 418100A4 bc 12,1,0xFF3FDE4
+ 5: Js01o $0xFF3FDE4
+
+
+
+. 1753 FF3FD3C 8
+. 2C 03 00 01 41 81 00 A4
+==== BB 1754 (0xFF3FD44) approx BBs exec'd 0 ====
+
+ 0xFF3FD44: 409A0034 bc 4,26,0xFF3FD78
+ 0: Jc26o $0xFF3FD78
+
+
+
+. 1754 FF3FD44 4
+. 40 9A 00 34
+==== BB 1755 (0xFF3FD78) approx BBs exec'd 0 ====
+
+ 0xFF3FD78: 83610034 lwz r27,52(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xFF3FD7C: 38600000 li r3,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFF3FD80: 83210014 lwz r25,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R25
+ 12: INCEIPL $4
+
+ 0xFF3FD84: 7F6803A6 mtlr r27
+ 13: GETL R27, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFF3FD88: 83410018 lwz r26,24(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x18, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R26
+ 20: INCEIPL $4
+
+ 0xFF3FD8C: 8361001C lwz r27,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R27
+ 25: INCEIPL $4
+
+ 0xFF3FD90: 83810020 lwz r28,32(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R28
+ 30: INCEIPL $4
+
+ 0xFF3FD94: 83A10024 lwz r29,36(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x24, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R29
+ 35: INCEIPL $4
+
+ 0xFF3FD98: 83C10028 lwz r30,40(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x28, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R30
+ 40: INCEIPL $4
+
+ 0xFF3FD9C: 83E1002C lwz r31,44(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x2C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R31
+ 45: INCEIPL $4
+
+ 0xFF3FDA0: 38210030 addi r1,r1,48
+ 46: GETL R1, t36
+ 47: ADDL $0x30, t36
+ 48: PUTL t36, R1
+ 49: INCEIPL $4
+
+ 0xFF3FDA4: 4E800020 blr
+ 50: GETL LR, t38
+ 51: JMPo-r t38 ($4)
+
+
+
+. 1755 FF3FD78 48
+. 83 61 00 34 38 60 00 00 83 21 00 14 7F 68 03 A6 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 1756 (0xFED2764) approx BBs exec'd 0 ====
+
+ 0xFED2764: 813A0000 lwz r9,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFED2768: 819E1D70 lwz r12,7536(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1D70, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R12
+ 8: INCEIPL $4
+
+ 0xFED276C: 2F890000 cmpi cr7,r9,0
+ 9: GETL R9, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFED2770: 83EC0000 lwz r31,0(r12)
+ 13: GETL R12, t12
+ 14: LDL (t12), t14
+ 15: PUTL t14, R31
+ 16: INCEIPL $4
+
+ 0xFED2774: 419E0068 bc 12,30,0xFED27DC
+ 17: Js30o $0xFED27DC
+
+
+
+. 1756 FED2764 20
+. 81 3A 00 00 81 9E 1D 70 2F 89 00 00 83 EC 00 00 41 9E 00 68
+==== BB 1757 (0xFED2778) approx BBs exec'd 0 ====
+
+ 0xFED2778: 7D204B78 or r0,r9,r9
+ 0: GETL R9, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFED277C: 3B410024 addi r26,r1,36
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: PUTL t2, R26
+ 6: INCEIPL $4
+
+ 0xFED2780: 91210024 stw r9,36(r1)
+ 7: GETL R9, t4
+ 8: GETL R1, t6
+ 9: ADDL $0x24, t6
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFED2784: 7C090378 or r9,r0,r0
+ 12: GETL R0, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0xFED2788: 3BA00000 li r29,0
+ 15: MOVL $0x0, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0xFED278C: 81690000 lwz r11,0(r9)
+ 18: GETL R9, t12
+ 19: LDL (t12), t14
+ 20: PUTL t14, R11
+ 21: INCEIPL $4
+
+ 0xFED2790: 2C0B0000 cmpi cr0,r11,0
+ 22: GETL R11, t16
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x0, CR
+ 25: INCEIPL $4
+
+ 0xFED2794: 4182001C bc 12,2,0xFED27B0
+ 26: Js02o $0xFED27B0
+
+
+
+. 1757 FED2778 32
+. 7D 20 4B 78 3B 41 00 24 91 21 00 24 7C 09 03 78 3B A0 00 00 81 69 00 00 2C 0B 00 00 41 82 00 1C
+==== BB 1758 (0xFED2798) approx BBs exec'd 0 ====
+
+ 0xFED2798: 88AB0000 lbz r5,0(r11)
+ 0: GETL R11, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFED279C: 2C85004D cmpi cr1,r5,77
+ 4: GETL R5, t4
+ 5: MOVL $0x4D, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFED27A0: 418600C0 bc 12,6,0xFED2860
+ 9: Js06o $0xFED2860
+
+
+
+. 1758 FED2798 12
+. 88 AB 00 00 2C 85 00 4D 41 86 00 C0
+==== BB 1759 (0xFED27A4) approx BBs exec'd 0 ====
+
+ 0xFED27A4: 85690004 lwzu r11,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R9
+ 3: LDL (t0), t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0xFED27A8: 2C0B0000 cmpi cr0,r11,0
+ 6: GETL R11, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFED27AC: 4082FFEC bc 4,2,0xFED2798
+ 10: Jc02o $0xFED2798
+
+
+
+. 1759 FED27A4 12
+. 85 69 00 04 2C 0B 00 00 40 82 FF EC
+==== BB 1760 (0xFED2860) approx BBs exec'd 0 ====
+
+ 0xFED2860: 88CB0001 lbz r6,1(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFED2864: 2F060041 cmpi cr6,r6,65
+ 5: GETL R6, t4
+ 6: MOVL $0x41, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFED2868: 409AFF3C bc 4,26,0xFED27A4
+ 10: Jc26o $0xFED27A4
+
+
+
+. 1760 FED2860 12
+. 88 CB 00 01 2F 06 00 41 40 9A FF 3C
+==== BB 1761 (0xFED286C) approx BBs exec'd 0 ====
+
+ 0xFED286C: 88EB0002 lbz r7,2(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x2, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFED2870: 2F87004C cmpi cr7,r7,76
+ 5: GETL R7, t4
+ 6: MOVL $0x4C, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFED2874: 409EFF30 bc 4,30,0xFED27A4
+ 10: Jc30o $0xFED27A4
+
+
+
+. 1761 FED286C 12
+. 88 EB 00 02 2F 87 00 4C 40 9E FF 30
+==== BB 1762 (0xFED27B0) approx BBs exec'd 0 ====
+
+ 0xFED27B0: 2C1D0000 cmpi cr0,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFED27B4: 4082011C bc 4,2,0xFED28D0
+ 4: Jc02o $0xFED28D0
+
+
+
+. 1762 FED27B0 8
+. 2C 1D 00 00 40 82 01 1C
+==== BB 1763 (0xFED27B8) approx BBs exec'd 0 ====
+
+ 0xFED27B8: 2F9C0000 cmpi cr7,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFED27BC: 419E0020 bc 12,30,0xFED27DC
+ 4: Js30o $0xFED27DC
+
+
+
+. 1763 FED27B8 8
+. 2F 9C 00 00 41 9E 00 20
+==== BB 1764 (0xFED27DC) approx BBs exec'd 0 ====
+
+ 0xFED27DC: 835E1A88 lwz r26,6792(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1A88, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFED27E0: 813A0000 lwz r9,0(r26)
+ 5: GETL R26, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0xFED27E4: 2F090000 cmpi cr6,r9,0
+ 9: GETL R9, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x6, CR
+ 12: INCEIPL $4
+
+ 0xFED27E8: 409A0064 bc 4,26,0xFED284C
+ 13: Jc26o $0xFED284C
+
+
+
+. 1764 FED27DC 16
+. 83 5E 1A 88 81 3A 00 00 2F 09 00 00 40 9A 00 64
+==== BB 1765 (0xFED27EC) approx BBs exec'd 0 ====
+
+ 0xFED27EC: 3B800001 li r28,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0xFED27F0: 939B0000 stw r28,0(r27)
+ 3: GETL R28, t2
+ 4: GETL R27, t4
+ 5: STL t2, (t4)
+ 6: INCEIPL $4
+
+ 0xFED27F4: 83610054 lwz r27,84(r1)
+ 7: GETL R1, t6
+ 8: ADDL $0x54, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R27
+ 11: INCEIPL $4
+
+ 0xFED27F8: 83410038 lwz r26,56(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x38, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R26
+ 16: INCEIPL $4
+
+ 0xFED27FC: 7F6803A6 mtlr r27
+ 17: GETL R27, t14
+ 18: PUTL t14, LR
+ 19: INCEIPL $4
+
+ 0xFED2800: 83810040 lwz r28,64(r1)
+ 20: GETL R1, t16
+ 21: ADDL $0x40, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R28
+ 24: INCEIPL $4
+
+ 0xFED2804: 8361003C lwz r27,60(r1)
+ 25: GETL R1, t20
+ 26: ADDL $0x3C, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R27
+ 29: INCEIPL $4
+
+ 0xFED2808: 83A10044 lwz r29,68(r1)
+ 30: GETL R1, t24
+ 31: ADDL $0x44, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R29
+ 34: INCEIPL $4
+
+ 0xFED280C: 83C10048 lwz r30,72(r1)
+ 35: GETL R1, t28
+ 36: ADDL $0x48, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R30
+ 39: INCEIPL $4
+
+ 0xFED2810: 83E1004C lwz r31,76(r1)
+ 40: GETL R1, t32
+ 41: ADDL $0x4C, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R31
+ 44: INCEIPL $4
+
+ 0xFED2814: 38210050 addi r1,r1,80
+ 45: GETL R1, t36
+ 46: ADDL $0x50, t36
+ 47: PUTL t36, R1
+ 48: INCEIPL $4
+
+ 0xFED2818: 4E800020 blr
+ 49: GETL LR, t38
+ 50: JMPo-r t38 ($4)
+
+
+
+. 1765 FED27EC 48
+. 3B 80 00 01 93 9B 00 00 83 61 00 54 83 41 00 38 7F 68 03 A6 83 81 00 40 83 61 00 3C 83 A1 00 44 83 C1 00 48 83 E1 00 4C 38 21 00 50 4E 80 00 20
+==== BB 1766 (0xFED2A9C) approx BBs exec'd 0 ====
+
+ 0xFED2A9C: 80010024 lwz r0,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED2AA0: 83C10018 lwz r30,24(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x18, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFED2AA4: 7FA3EB78 or r3,r29,r29
+ 10: GETL R29, t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFED2AA8: 83E1001C lwz r31,28(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x1C, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R31
+ 17: INCEIPL $4
+
+ 0xFED2AAC: 7C0803A6 mtlr r0
+ 18: GETL R0, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFED2AB0: 83A10014 lwz r29,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0xFED2AB4: 38210020 addi r1,r1,32
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0xFED2AB8: 4BFFEE28 b 0xFED18E0
+ 30: JMPo $0xFED18E0 ($4)
+
+
+
+. 1766 FED2A9C 32
+. 80 01 00 24 83 C1 00 18 7F A3 EB 78 83 E1 00 1C 7C 08 03 A6 83 A1 00 14 38 21 00 20 4B FF EE 28
+==== BB 1767 (0xFED1958) approx BBs exec'd 0 ====
+
+ 0xFED1958: 809E0600 lwz r4,1536(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x600, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFED195C: 7C641214 add r3,r4,r2
+ 5: GETL R4, t4
+ 6: GETL R2, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFED1960: 83E30000 lwz r31,0(r3)
+ 10: GETL R3, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R31
+ 13: INCEIPL $4
+
+ 0xFED1964: 2C1F0000 cmpi cr0,r31,0
+ 14: GETL R31, t12
+ 15: CMP0L t12, t14 (-rSo)
+ 16: ICRFL t14, $0x0, CR
+ 17: INCEIPL $4
+
+ 0xFED1968: 41820090 bc 12,2,0xFED19F8
+ 18: Js02o $0xFED19F8
+
+
+
+. 1767 FED1958 20
+. 80 9E 06 00 7C 64 12 14 83 E3 00 00 2C 1F 00 00 41 82 00 90
+==== BB 1768 (0xFED196C) approx BBs exec'd 0 ====
+
+ 0xFED196C: 38E00001 li r7,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0xFED1970: 7CC0F828 lwarx r6,r0,r31
+ 3: GETL R31, t2
+ 4: LOCKo
+ 5: LDL (t2), t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0xFED1974: 2C060000 cmpi cr0,r6,0
+ 8: GETL R6, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFED1978: 4082000C bc 4,2,0xFED1984
+ 12: Jc02o $0xFED1984
+
+
+
+. 1768 FED196C 16
+. 38 E0 00 01 7C C0 F8 28 2C 06 00 00 40 82 00 0C
+==== BB 1769 (0xFED197C) approx BBs exec'd 0 ====
+
+ 0xFED197C: 7CE0F92D stwcx. r7,r0,r31
+ 0: GETL R31, t0
+ 1: GETL R7, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED1980: 40A2FFF0 bc 5,2,0xFED1970
+ 6: Jc02o $0xFED1970
+
+
+
+. 1769 FED197C 8
+. 7C E0 F9 2D 40 A2 FF F0
+==== BB 1770 (0xFED1970) approx BBs exec'd 0 ====
+
+ 0xFED1970: 7CC0F828 lwarx r6,r0,r31
+ 0: GETL R31, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFED1974: 2C060000 cmpi cr0,r6,0
+ 5: GETL R6, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFED1978: 4082000C bc 4,2,0xFED1984
+ 9: Jc02o $0xFED1984
+
+
+
+. 1770 FED1970 12
+. 7C C0 F8 28 2C 06 00 00 40 82 00 0C
+==== BB 1771 (0xFED1984) approx BBs exec'd 0 ====
+
+ 0xFED1984: 4C00012C 0: INCEIPL $4
+
+ 0xFED1988: 2C860000 cmpi cr1,r6,0
+ 1: GETL R6, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFED198C: 4086006C bc 4,6,0xFED19F8
+ 5: Jc06o $0xFED19F8
+
+
+
+. 1771 FED1984 12
+. 4C 00 01 2C 2C 86 00 00 40 86 00 6C
+==== BB 1772 (0xFED1990) approx BBs exec'd 0 ====
+
+ 0xFED1990: 2F1F0000 cmpi cr6,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFED1994: 38600000 li r3,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFED1998: 41BAFF98 bc 13,26,0xFED1930
+ 7: Js26o $0xFED1930
+
+
+
+. 1772 FED1990 12
+. 2F 1F 00 00 38 60 00 00 41 BA FF 98
+==== BB 1773 (0xFED199C) approx BBs exec'd 0 ====
+
+ 0xFED199C: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED19A0: 7FA4EB78 or r4,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFED19A4: 4BFFDC39 bl 0xFECF5DC
+ 6: MOVL $0xFED19A8, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFECF5DC ($4)
+
+
+
+. 1773 FED199C 12
+. 7F E3 FB 78 7F A4 EB 78 4B FF DC 39
+==== BB 1774 _int_malloc(0xFECF5DC) approx BBs exec'd 0 ====
+
+ 0xFECF5DC: 3800FFDF li r0,-33
+ 0: MOVL $0xFFFFFFDF, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFECF5E0: 7D800026 mfcr r12
+ 3: GETL CR, t2
+ 4: PUTL t2, R12
+ 5: INCEIPL $4
+
+ 0xFECF5E4: 7F840040 cmpl cr7,r4,r0
+ 6: GETL R4, t4
+ 7: GETL R0, t6
+ 8: CMPUL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0xFECF5E8: 7CA802A6 mflr r5
+ 11: GETL LR, t10
+ 12: PUTL t10, R5
+ 13: INCEIPL $4
+
+ 0xFECF5EC: 9421FF90 stwu r1,-112(r1)
+ 14: GETL R1, t12
+ 15: GETL R1, t14
+ 16: ADDL $0xFFFFFF90, t14
+ 17: PUTL t14, R1
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFECF5F0: 480D8861 bl 0xFFA7E50
+ 20: MOVL $0xFECF5F4, t16
+ 21: PUTL t16, LR
+ 22: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1774 FECF5DC 24
+. 38 00 FF DF 7D 80 00 26 7F 84 00 40 7C A8 02 A6 94 21 FF 90 48 0D 88 61
+==== BB 1775 (0xFECF5F4) approx BBs exec'd 0 ====
+
+ 0xFECF5F4: 93810060 stw r28,96(r1)
+ 0: GETL R28, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x60, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECF5F8: 7C7C1B78 or r28,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFECF5FC: 93C10068 stw r30,104(r1)
+ 8: GETL R30, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x68, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFECF600: 7FC802A6 mflr r30
+ 13: GETL LR, t10
+ 14: PUTL t10, R30
+ 15: INCEIPL $4
+
+ 0xFECF604: 91C10028 stw r14,40(r1)
+ 16: GETL R14, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x28, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFECF608: 91E1002C stw r15,44(r1)
+ 21: GETL R15, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x2C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFECF60C: 92010030 stw r16,48(r1)
+ 26: GETL R16, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x30, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xFECF610: 92210034 stw r17,52(r1)
+ 31: GETL R17, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x34, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFECF614: 92410038 stw r18,56(r1)
+ 36: GETL R18, t28
+ 37: GETL R1, t30
+ 38: ADDL $0x38, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0xFECF618: 9261003C stw r19,60(r1)
+ 41: GETL R19, t32
+ 42: GETL R1, t34
+ 43: ADDL $0x3C, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0xFECF61C: 92810040 stw r20,64(r1)
+ 46: GETL R20, t36
+ 47: GETL R1, t38
+ 48: ADDL $0x40, t38
+ 49: STL t36, (t38)
+ 50: INCEIPL $4
+
+ 0xFECF620: 92A10044 stw r21,68(r1)
+ 51: GETL R21, t40
+ 52: GETL R1, t42
+ 53: ADDL $0x44, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0xFECF624: 92C10048 stw r22,72(r1)
+ 56: GETL R22, t44
+ 57: GETL R1, t46
+ 58: ADDL $0x48, t46
+ 59: STL t44, (t46)
+ 60: INCEIPL $4
+
+ 0xFECF628: 92E1004C stw r23,76(r1)
+ 61: GETL R23, t48
+ 62: GETL R1, t50
+ 63: ADDL $0x4C, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0xFECF62C: 93010050 stw r24,80(r1)
+ 66: GETL R24, t52
+ 67: GETL R1, t54
+ 68: ADDL $0x50, t54
+ 69: STL t52, (t54)
+ 70: INCEIPL $4
+
+ 0xFECF630: 93210054 stw r25,84(r1)
+ 71: GETL R25, t56
+ 72: GETL R1, t58
+ 73: ADDL $0x54, t58
+ 74: STL t56, (t58)
+ 75: INCEIPL $4
+
+ 0xFECF634: 93410058 stw r26,88(r1)
+ 76: GETL R26, t60
+ 77: GETL R1, t62
+ 78: ADDL $0x58, t62
+ 79: STL t60, (t62)
+ 80: INCEIPL $4
+
+ 0xFECF638: 9361005C stw r27,92(r1)
+ 81: GETL R27, t64
+ 82: GETL R1, t66
+ 83: ADDL $0x5C, t66
+ 84: STL t64, (t66)
+ 85: INCEIPL $4
+
+ 0xFECF63C: 93A10064 stw r29,100(r1)
+ 86: GETL R29, t68
+ 87: GETL R1, t70
+ 88: ADDL $0x64, t70
+ 89: STL t68, (t70)
+ 90: INCEIPL $4
+
+ 0xFECF640: 93E1006C stw r31,108(r1)
+ 91: GETL R31, t72
+ 92: GETL R1, t74
+ 93: ADDL $0x6C, t74
+ 94: STL t72, (t74)
+ 95: INCEIPL $4
+
+ 0xFECF644: 90A10074 stw r5,116(r1)
+ 96: GETL R5, t76
+ 97: GETL R1, t78
+ 98: ADDL $0x74, t78
+ 99: STL t76, (t78)
+ 100: INCEIPL $4
+
+ 0xFECF648: 91810024 stw r12,36(r1)
+ 101: GETL R12, t80
+ 102: GETL R1, t82
+ 103: ADDL $0x24, t82
+ 104: STL t80, (t82)
+ 105: INCEIPL $4
+
+ 0xFECF64C: 419D0490 bc 12,29,0xFECFADC
+ 106: Js29o $0xFECFADC
+
+
+
+. 1775 FECF5F4 92
+. 93 81 00 60 7C 7C 1B 78 93 C1 00 68 7F C8 02 A6 91 C1 00 28 91 E1 00 2C 92 01 00 30 92 21 00 34 92 41 00 38 92 61 00 3C 92 81 00 40 92 A1 00 44 92 C1 00 48 92 E1 00 4C 93 01 00 50 93 21 00 54 93 41 00 58 93 61 00 5C 93 A1 00 64 93 E1 00 6C 90 A1 00 74 91 81 00 24 41 9D 04 90
+==== BB 1776 (0xFECF650) approx BBs exec'd 0 ====
+
+ 0xFECF650: 3864000B addi r3,r4,11
+ 0: GETL R4, t0
+ 1: ADDL $0xB, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFECF654: 2803000F cmpli cr0,r3,15
+ 4: GETL R3, t2
+ 5: MOVL $0xF, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFECF658: 54790038 rlwinm r25,r3,0,0,28
+ 9: GETL R3, t8
+ 10: ANDL $0xFFFFFFF8, t8
+ 11: PUTL t8, R25
+ 12: INCEIPL $4
+
+ 0xFECF65C: 408100B8 bc 4,1,0xFECF714
+ 13: Jc01o $0xFECF714
+
+
+
+. 1776 FECF650 16
+. 38 64 00 0B 28 03 00 0F 54 79 00 38 40 81 00 B8
+==== BB 1777 (0xFECF660) approx BBs exec'd 0 ====
+
+ 0xFECF660: 815C0004 lwz r10,4(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFECF664: 7C8AC840 cmpl cr1,r10,r25
+ 5: GETL R10, t4
+ 6: GETL R25, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFECF668: 418400BC bc 12,4,0xFECF724
+ 10: Js04o $0xFECF724
+
+
+
+. 1777 FECF660 12
+. 81 5C 00 04 7C 8A C8 40 41 84 00 BC
+==== BB 1778 (0xFECF724) approx BBs exec'd 0 ====
+
+ 0xFECF724: 2B9901FF cmpli cr7,r25,511
+ 0: GETL R25, t0
+ 1: MOVL $0x1FF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFECF728: 419D0060 bc 12,29,0xFECF788
+ 5: Js29o $0xFECF788
+
+
+
+. 1778 FECF724 8
+. 2B 99 01 FF 41 9D 00 60
+==== BB 1779 (0xFECF72C) approx BBs exec'd 0 ====
+
+ 0xFECF72C: 7E59E214 add r18,r25,r28
+ 0: GETL R25, t0
+ 1: GETL R28, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0xFECF730: 5738E8FE rlwinm r24,r25,29,3,31
+ 5: GETL R25, t4
+ 6: SHRL $0x3, t4
+ 7: PUTL t4, R24
+ 8: INCEIPL $4
+
+ 0xFECF734: 39520030 addi r10,r18,48
+ 9: GETL R18, t6
+ 10: ADDL $0x30, t6
+ 11: PUTL t6, R10
+ 12: INCEIPL $4
+
+ 0xFECF738: 806A000C lwz r3,12(r10)
+ 13: GETL R10, t8
+ 14: ADDL $0xC, t8
+ 15: LDL (t8), t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0xFECF73C: 7C835000 cmp cr1,r3,r10
+ 18: GETL R3, t12
+ 19: GETL R10, t14
+ 20: CMPL t12, t14, t16 (-rSo)
+ 21: ICRFL t16, $0x1, CR
+ 22: INCEIPL $4
+
+ 0xFECF740: 41860060 bc 12,6,0xFECF7A0
+ 23: Js06o $0xFECF7A0
+
+
+
+. 1779 FECF72C 24
+. 7E 59 E2 14 57 38 E8 FE 39 52 00 30 80 6A 00 0C 7C 83 50 00 41 86 00 60
+==== BB 1780 (0xFECF744) approx BBs exec'd 0 ====
+
+ 0xFECF744: 2D830000 cmpi cr3,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x3, CR
+ 3: INCEIPL $4
+
+ 0xFECF748: 418E0220 bc 12,14,0xFECF968
+ 4: Js14o $0xFECF968
+
+
+
+. 1780 FECF744 8
+. 2D 83 00 00 41 8E 02 20
+==== BB 1781 (0xFECF968) approx BBs exec'd 0 ====
+
+ 0xFECF968: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFECF96C: 4BFFEB59 bl 0xFECE4C4
+ 3: MOVL $0xFECF970, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFECE4C4 ($4)
+
+
+
+. 1781 FECF968 8
+. 7F 83 E3 78 4B FF EB 59
+==== BB 1782 malloc_consolidate(0xFECE4C4) approx BBs exec'd 0 ====
+
+ 0xFECE4C4: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFECE4C8: 9421FF90 stwu r1,-112(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFF90, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECE4CC: 480D9985 bl 0xFFA7E50
+ 9: MOVL $0xFECE4D0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1782 FECE4C4 12
+. 7C 88 02 A6 94 21 FF 90 48 0D 99 85
+==== BB 1783 (0xFECE4D0) approx BBs exec'd 0 ====
+
+ 0xFECE4D0: 3800007F li r0,127
+ 0: MOVL $0x7F, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFECE4D4: 93010050 stw r24,80(r1)
+ 3: GETL R24, t2
+ 4: GETL R1, t4
+ 5: ADDL $0x50, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFECE4D8: 39230038 addi r9,r3,56
+ 8: GETL R3, t6
+ 9: ADDL $0x38, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0xFECE4DC: 90810074 stw r4,116(r1)
+ 12: GETL R4, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x74, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFECE4E0: 7C781B78 or r24,r3,r3
+ 17: GETL R3, t12
+ 18: PUTL t12, R24
+ 19: INCEIPL $4
+
+ 0xFECE4E4: 81630004 lwz r11,4(r3)
+ 20: GETL R3, t14
+ 21: ADDL $0x4, t14
+ 22: LDL (t14), t16
+ 23: PUTL t16, R11
+ 24: INCEIPL $4
+
+ 0xFECE4E8: 7C0903A6 mtctr r0
+ 25: GETL R0, t18
+ 26: PUTL t18, CTR
+ 27: INCEIPL $4
+
+ 0xFECE4EC: 93C10068 stw r30,104(r1)
+ 28: GETL R30, t20
+ 29: GETL R1, t22
+ 30: ADDL $0x68, t22
+ 31: STL t20, (t22)
+ 32: INCEIPL $4
+
+ 0xFECE4F0: 2F8B0000 cmpi cr7,r11,0
+ 33: GETL R11, t24
+ 34: CMP0L t24, t26 (-rSo)
+ 35: ICRFL t26, $0x7, CR
+ 36: INCEIPL $4
+
+ 0xFECE4F4: 91C10028 stw r14,40(r1)
+ 37: GETL R14, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x28, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFECE4F8: 91E1002C stw r15,44(r1)
+ 42: GETL R15, t32
+ 43: GETL R1, t34
+ 44: ADDL $0x2C, t34
+ 45: STL t32, (t34)
+ 46: INCEIPL $4
+
+ 0xFECE4FC: 7FC802A6 mflr r30
+ 47: GETL LR, t36
+ 48: PUTL t36, R30
+ 49: INCEIPL $4
+
+ 0xFECE500: 92010030 stw r16,48(r1)
+ 50: GETL R16, t38
+ 51: GETL R1, t40
+ 52: ADDL $0x30, t40
+ 53: STL t38, (t40)
+ 54: INCEIPL $4
+
+ 0xFECE504: 92210034 stw r17,52(r1)
+ 55: GETL R17, t42
+ 56: GETL R1, t44
+ 57: ADDL $0x34, t44
+ 58: STL t42, (t44)
+ 59: INCEIPL $4
+
+ 0xFECE508: 92410038 stw r18,56(r1)
+ 60: GETL R18, t46
+ 61: GETL R1, t48
+ 62: ADDL $0x38, t48
+ 63: STL t46, (t48)
+ 64: INCEIPL $4
+
+ 0xFECE50C: 9261003C stw r19,60(r1)
+ 65: GETL R19, t50
+ 66: GETL R1, t52
+ 67: ADDL $0x3C, t52
+ 68: STL t50, (t52)
+ 69: INCEIPL $4
+
+ 0xFECE510: 92810040 stw r20,64(r1)
+ 70: GETL R20, t54
+ 71: GETL R1, t56
+ 72: ADDL $0x40, t56
+ 73: STL t54, (t56)
+ 74: INCEIPL $4
+
+ 0xFECE514: 92A10044 stw r21,68(r1)
+ 75: GETL R21, t58
+ 76: GETL R1, t60
+ 77: ADDL $0x44, t60
+ 78: STL t58, (t60)
+ 79: INCEIPL $4
+
+ 0xFECE518: 92C10048 stw r22,72(r1)
+ 80: GETL R22, t62
+ 81: GETL R1, t64
+ 82: ADDL $0x48, t64
+ 83: STL t62, (t64)
+ 84: INCEIPL $4
+
+ 0xFECE51C: 92E1004C stw r23,76(r1)
+ 85: GETL R23, t66
+ 86: GETL R1, t68
+ 87: ADDL $0x4C, t68
+ 88: STL t66, (t68)
+ 89: INCEIPL $4
+
+ 0xFECE520: 93210054 stw r25,84(r1)
+ 90: GETL R25, t70
+ 91: GETL R1, t72
+ 92: ADDL $0x54, t72
+ 93: STL t70, (t72)
+ 94: INCEIPL $4
+
+ 0xFECE524: 93410058 stw r26,88(r1)
+ 95: GETL R26, t74
+ 96: GETL R1, t76
+ 97: ADDL $0x58, t76
+ 98: STL t74, (t76)
+ 99: INCEIPL $4
+
+ 0xFECE528: 9361005C stw r27,92(r1)
+ 100: GETL R27, t78
+ 101: GETL R1, t80
+ 102: ADDL $0x5C, t80
+ 103: STL t78, (t80)
+ 104: INCEIPL $4
+
+ 0xFECE52C: 93810060 stw r28,96(r1)
+ 105: GETL R28, t82
+ 106: GETL R1, t84
+ 107: ADDL $0x60, t84
+ 108: STL t82, (t84)
+ 109: INCEIPL $4
+
+ 0xFECE530: 93A10064 stw r29,100(r1)
+ 110: GETL R29, t86
+ 111: GETL R1, t88
+ 112: ADDL $0x64, t88
+ 113: STL t86, (t88)
+ 114: INCEIPL $4
+
+ 0xFECE534: 93E1006C stw r31,108(r1)
+ 115: GETL R31, t90
+ 116: GETL R1, t92
+ 117: ADDL $0x6C, t92
+ 118: STL t90, (t92)
+ 119: INCEIPL $4
+
+ 0xFECE538: 419E0128 bc 12,30,0xFECE660
+ 120: Js30o $0xFECE660
+
+
+
+. 1783 FECE4D0 108
+. 38 00 00 7F 93 01 00 50 39 23 00 38 90 81 00 74 7C 78 1B 78 81 63 00 04 7C 09 03 A6 93 C1 00 68 2F 8B 00 00 91 C1 00 28 91 E1 00 2C 7F C8 02 A6 92 01 00 30 92 21 00 34 92 41 00 38 92 61 00 3C 92 81 00 40 92 A1 00 44 92 C1 00 48 92 E1 00 4C 93 21 00 54 93 41 00 58 93 61 00 5C 93 81 00 60 93 A1 00 64 93 E1 00 6C 41 9E 01 28
+==== BB 1784 (0xFECE660) approx BBs exec'd 0 ====
+
+ 0xFECE660: 9129000C stw r9,12(r9)
+ 0: GETL R9, t0
+ 1: GETL R9, t2
+ 2: ADDL $0xC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECE664: 91290008 stw r9,8(r9)
+ 5: GETL R9, t4
+ 6: GETL R9, t6
+ 7: ADDL $0x8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECE668: 39290008 addi r9,r9,8
+ 10: GETL R9, t8
+ 11: ADDL $0x8, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFECE66C: 4200FFF4 bc 16,0,0xFECE660
+ 14: GETL CTR, t10
+ 15: ADDL $0xFFFFFFFF, t10
+ 16: PUTL t10, CTR
+ 17: JIFZL t10, $0xFECE670
+ 18: JMPo $0xFECE660 ($4)
+
+
+
+. 1784 FECE660 16
+. 91 29 00 0C 91 29 00 08 39 29 00 08 42 00 FF F4
+==== BB 1785 (0xFECE670) approx BBs exec'd 0 ====
+
+ 0xFECE670: 81DE05FC lwz r14,1532(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R14
+ 4: INCEIPL $4
+
+ 0xFECE674: 7C987000 cmp cr1,r24,r14
+ 5: GETL R24, t4
+ 6: GETL R14, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFECE678: 41860008 bc 12,6,0xFECE680
+ 10: Js06o $0xFECE680
+
+
+
+. 1785 FECE670 12
+. 81 DE 05 FC 7C 98 70 00 41 86 00 08
+==== BB 1786 (0xFECE680) approx BBs exec'd 0 ====
+
+ 0xFECE680: 557207BC rlwinm r18,r11,0,30,30
+ 0: GETL R11, t0
+ 1: ANDL $0x2, t0
+ 2: PUTL t0, R18
+ 3: INCEIPL $4
+
+ 0xFECE684: 3A180038 addi r16,r24,56
+ 4: GETL R24, t2
+ 5: ADDL $0x38, t2
+ 6: PUTL t2, R16
+ 7: INCEIPL $4
+
+ 0xFECE688: 624F0049 ori r15,r18,0x49
+ 8: GETL R18, t4
+ 9: ORL $0x49, t4
+ 10: PUTL t4, R15
+ 11: INCEIPL $4
+
+ 0xFECE68C: 92180030 stw r16,48(r24)
+ 12: GETL R16, t6
+ 13: GETL R24, t8
+ 14: ADDL $0x30, t8
+ 15: STL t6, (t8)
+ 16: INCEIPL $4
+
+ 0xFECE690: 91F80004 stw r15,4(r24)
+ 17: GETL R15, t10
+ 18: GETL R24, t12
+ 19: ADDL $0x4, t12
+ 20: STL t10, (t12)
+ 21: INCEIPL $4
+
+ 0xFECE694: 82610074 lwz r19,116(r1)
+ 22: GETL R1, t14
+ 23: ADDL $0x74, t14
+ 24: LDL (t14), t16
+ 25: PUTL t16, R19
+ 26: INCEIPL $4
+
+ 0xFECE698: 81C10028 lwz r14,40(r1)
+ 27: GETL R1, t18
+ 28: ADDL $0x28, t18
+ 29: LDL (t18), t20
+ 30: PUTL t20, R14
+ 31: INCEIPL $4
+
+ 0xFECE69C: 7E6803A6 mtlr r19
+ 32: GETL R19, t22
+ 33: PUTL t22, LR
+ 34: INCEIPL $4
+
+ 0xFECE6A0: 81E1002C lwz r15,44(r1)
+ 35: GETL R1, t24
+ 36: ADDL $0x2C, t24
+ 37: LDL (t24), t26
+ 38: PUTL t26, R15
+ 39: INCEIPL $4
+
+ 0xFECE6A4: 82010030 lwz r16,48(r1)
+ 40: GETL R1, t28
+ 41: ADDL $0x30, t28
+ 42: LDL (t28), t30
+ 43: PUTL t30, R16
+ 44: INCEIPL $4
+
+ 0xFECE6A8: 82210034 lwz r17,52(r1)
+ 45: GETL R1, t32
+ 46: ADDL $0x34, t32
+ 47: LDL (t32), t34
+ 48: PUTL t34, R17
+ 49: INCEIPL $4
+
+ 0xFECE6AC: 82410038 lwz r18,56(r1)
+ 50: GETL R1, t36
+ 51: ADDL $0x38, t36
+ 52: LDL (t36), t38
+ 53: PUTL t38, R18
+ 54: INCEIPL $4
+
+ 0xFECE6B0: 8261003C lwz r19,60(r1)
+ 55: GETL R1, t40
+ 56: ADDL $0x3C, t40
+ 57: LDL (t40), t42
+ 58: PUTL t42, R19
+ 59: INCEIPL $4
+
+ 0xFECE6B4: 82810040 lwz r20,64(r1)
+ 60: GETL R1, t44
+ 61: ADDL $0x40, t44
+ 62: LDL (t44), t46
+ 63: PUTL t46, R20
+ 64: INCEIPL $4
+
+ 0xFECE6B8: 82A10044 lwz r21,68(r1)
+ 65: GETL R1, t48
+ 66: ADDL $0x44, t48
+ 67: LDL (t48), t50
+ 68: PUTL t50, R21
+ 69: INCEIPL $4
+
+ 0xFECE6BC: 82C10048 lwz r22,72(r1)
+ 70: GETL R1, t52
+ 71: ADDL $0x48, t52
+ 72: LDL (t52), t54
+ 73: PUTL t54, R22
+ 74: INCEIPL $4
+
+ 0xFECE6C0: 82E1004C lwz r23,76(r1)
+ 75: GETL R1, t56
+ 76: ADDL $0x4C, t56
+ 77: LDL (t56), t58
+ 78: PUTL t58, R23
+ 79: INCEIPL $4
+
+ 0xFECE6C4: 83010050 lwz r24,80(r1)
+ 80: GETL R1, t60
+ 81: ADDL $0x50, t60
+ 82: LDL (t60), t62
+ 83: PUTL t62, R24
+ 84: INCEIPL $4
+
+ 0xFECE6C8: 83210054 lwz r25,84(r1)
+ 85: GETL R1, t64
+ 86: ADDL $0x54, t64
+ 87: LDL (t64), t66
+ 88: PUTL t66, R25
+ 89: INCEIPL $4
+
+ 0xFECE6CC: 83410058 lwz r26,88(r1)
+ 90: GETL R1, t68
+ 91: ADDL $0x58, t68
+ 92: LDL (t68), t70
+ 93: PUTL t70, R26
+ 94: INCEIPL $4
+
+ 0xFECE6D0: 8361005C lwz r27,92(r1)
+ 95: GETL R1, t72
+ 96: ADDL $0x5C, t72
+ 97: LDL (t72), t74
+ 98: PUTL t74, R27
+ 99: INCEIPL $4
+
+ 0xFECE6D4: 83810060 lwz r28,96(r1)
+ 100: GETL R1, t76
+ 101: ADDL $0x60, t76
+ 102: LDL (t76), t78
+ 103: PUTL t78, R28
+ 104: INCEIPL $4
+
+ 0xFECE6D8: 83A10064 lwz r29,100(r1)
+ 105: GETL R1, t80
+ 106: ADDL $0x64, t80
+ 107: LDL (t80), t82
+ 108: PUTL t82, R29
+ 109: INCEIPL $4
+
+ 0xFECE6DC: 83C10068 lwz r30,104(r1)
+ 110: GETL R1, t84
+ 111: ADDL $0x68, t84
+ 112: LDL (t84), t86
+ 113: PUTL t86, R30
+ 114: INCEIPL $4
+
+ 0xFECE6E0: 83E1006C lwz r31,108(r1)
+ 115: GETL R1, t88
+ 116: ADDL $0x6C, t88
+ 117: LDL (t88), t90
+ 118: PUTL t90, R31
+ 119: INCEIPL $4
+
+ 0xFECE6E4: 38210070 addi r1,r1,112
+ 120: GETL R1, t92
+ 121: ADDL $0x70, t92
+ 122: PUTL t92, R1
+ 123: INCEIPL $4
+
+ 0xFECE6E8: 4E800020 blr
+ 124: GETL LR, t94
+ 125: JMPo-r t94 ($4)
+
+
+
+. 1786 FECE680 108
+. 55 72 07 BC 3A 18 00 38 62 4F 00 49 92 18 00 30 91 F8 00 04 82 61 00 74 81 C1 00 28 7E 68 03 A6 81 E1 00 2C 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
+==== BB 1787 (0xFECF970) approx BBs exec'd 0 ====
+
+ 0xFECF970: 4BFFFE30 b 0xFECF7A0
+ 0: JMPo $0xFECF7A0 ($4)
+
+
+
+. 1787 FECF970 4
+. 4B FF FE 30
+==== BB 1788 (0xFECF7A0) approx BBs exec'd 0 ====
+
+ 0xFECF7A0: 82BE05FC lwz r21,1532(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0xFECF7A4: 63340001 ori r20,r25,0x1
+ 5: GETL R25, t4
+ 6: ORL $0x1, t4
+ 7: PUTL t4, R20
+ 8: INCEIPL $4
+
+ 0xFECF7A8: 825E0678 lwz r18,1656(r30)
+ 9: GETL R30, t6
+ 10: ADDL $0x678, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R18
+ 13: INCEIPL $4
+
+ 0xFECF7AC: 3B5C0038 addi r26,r28,56
+ 14: GETL R28, t10
+ 15: ADDL $0x38, t10
+ 16: PUTL t10, R26
+ 17: INCEIPL $4
+
+ 0xFECF7B0: 7E1CA800 cmp cr4,r28,r21
+ 18: GETL R28, t12
+ 19: GETL R21, t14
+ 20: CMPL t12, t14, t16 (-rSo)
+ 21: ICRFL t16, $0x4, CR
+ 22: INCEIPL $4
+
+ 0xFECF7B4: 81DE062C lwz r14,1580(r30)
+ 23: GETL R30, t18
+ 24: ADDL $0x62C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R14
+ 27: INCEIPL $4
+
+ 0xFECF7B8: 7EB6AB78 or r22,r21,r21
+ 28: GETL R21, t22
+ 29: PUTL t22, R22
+ 30: INCEIPL $4
+
+ 0xFECF7BC: 7F8FAA78 xor r15,r28,r21
+ 31: GETL R28, t24
+ 32: GETL R21, t26
+ 33: XORL t24, t26
+ 34: PUTL t26, R15
+ 35: INCEIPL $4
+
+ 0xFECF7C0: 4D900000 mcrf cr3,cr4
+ 36: ICRFL CR, $0x3, CR
+ 37: INCEIPL $4
+
+ 0xFECF7C4: 7E93A378 or r19,r20,r20
+ 38: GETL R20, t28
+ 39: PUTL t28, R19
+ 40: INCEIPL $4
+
+ 0xFECF7C8: 3A390010 addi r17,r25,16
+ 41: GETL R25, t30
+ 42: ADDL $0x10, t30
+ 43: PUTL t30, R17
+ 44: INCEIPL $4
+
+ 0xFECF7CC: 3A010010 addi r16,r1,16
+ 45: GETL R1, t32
+ 46: ADDL $0x10, t32
+ 47: PUTL t32, R16
+ 48: INCEIPL $4
+
+ 0xFECF7D0: 83FC0044 lwz r31,68(r28)
+ 49: GETL R28, t34
+ 50: ADDL $0x44, t34
+ 51: LDL (t34), t36
+ 52: PUTL t36, R31
+ 53: INCEIPL $4
+
+ 0xFECF7D4: 7F1FD000 cmp cr6,r31,r26
+ 54: GETL R31, t38
+ 55: GETL R26, t40
+ 56: CMPL t38, t40, t42 (-rSo)
+ 57: ICRFL t42, $0x6, CR
+ 58: INCEIPL $4
+
+ 0xFECF7D8: 419A019C bc 12,26,0xFECF974
+ 59: Js26o $0xFECF974
+
+
+
+. 1788 FECF7A0 60
+. 82 BE 05 FC 63 34 00 01 82 5E 06 78 3B 5C 00 38 7E 1C A8 00 81 DE 06 2C 7E B6 AB 78 7F 8F AA 78 4D 90 00 00 7E 93 A3 78 3A 39 00 10 3A 01 00 10 83 FC 00 44 7F 1F D0 00 41 9A 01 9C
+==== BB 1789 (0xFECF974) approx BBs exec'd 0 ====
+
+ 0xFECF974: 281901FF cmpli cr0,r25,511
+ 0: GETL R25, t0
+ 1: MOVL $0x1FF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFECF978: 4081002C bc 4,1,0xFECF9A4
+ 5: Jc01o $0xFECF9A4
+
+
+
+. 1789 FECF974 8
+. 28 19 01 FF 40 81 00 2C
+==== BB 1790 (0xFECF9A4) approx BBs exec'd 0 ====
+
+ 0xFECF9A4: 39780001 addi r11,r24,1
+ 0: GETL R24, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFECF9A8: 7F8AB278 xor r10,r28,r22
+ 4: GETL R28, t2
+ 5: GETL R22, t4
+ 6: XORL t2, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0xFECF9AC: 5564D97E rlwinm r4,r11,27,5,31
+ 9: GETL R11, t6
+ 10: SHRL $0x5, t6
+ 11: PUTL t6, R4
+ 12: INCEIPL $4
+
+ 0xFECF9B0: 55661838 rlwinm r6,r11,3,0,28
+ 13: GETL R11, t8
+ 14: SHLL $0x3, t8
+ 15: PUTL t8, R6
+ 16: INCEIPL $4
+
+ 0xFECF9B4: 5483103A rlwinm r3,r4,2,0,29
+ 17: GETL R4, t10
+ 18: SHLL $0x2, t10
+ 19: PUTL t10, R3
+ 20: INCEIPL $4
+
+ 0xFECF9B8: 557D06FE rlwinm r29,r11,0,27,31
+ 21: GETL R11, t12
+ 22: ANDL $0x1F, t12
+ 23: PUTL t12, R29
+ 24: INCEIPL $4
+
+ 0xFECF9BC: 7CE3E214 add r7,r3,r28
+ 25: GETL R3, t14
+ 26: GETL R28, t16
+ 27: ADDL t14, t16
+ 28: PUTL t16, R7
+ 29: INCEIPL $4
+
+ 0xFECF9C0: 7D06E214 add r8,r6,r28
+ 30: GETL R6, t18
+ 31: GETL R28, t20
+ 32: ADDL t18, t20
+ 33: PUTL t20, R8
+ 34: INCEIPL $4
+
+ 0xFECF9C4: 549B402E rlwinm r27,r4,8,0,23
+ 35: GETL R4, t22
+ 36: SHLL $0x8, t22
+ 37: PUTL t22, R27
+ 38: INCEIPL $4
+
+ 0xFECF9C8: 3BE00001 li r31,1
+ 39: MOVL $0x1, t24
+ 40: PUTL t24, R31
+ 41: INCEIPL $4
+
+ 0xFECF9CC: 80A70438 lwz r5,1080(r7)
+ 42: GETL R7, t26
+ 43: ADDL $0x438, t26
+ 44: LDL (t26), t28
+ 45: PUTL t28, R5
+ 46: INCEIPL $4
+
+ 0xFECF9D0: 7F1CB000 cmp cr6,r28,r22
+ 47: GETL R28, t30
+ 48: GETL R22, t32
+ 49: CMPL t30, t32, t34 (-rSo)
+ 50: ICRFL t34, $0x6, CR
+ 51: INCEIPL $4
+
+ 0xFECF9D4: 289901FF cmpli cr1,r25,511
+ 52: GETL R25, t36
+ 53: MOVL $0x1FF, t40
+ 54: CMPUL t36, t40, t38 (-rSo)
+ 55: ICRFL t38, $0x1, CR
+ 56: INCEIPL $4
+
+ 0xFECF9D8: 7FE6E830 slw r6,r31,r29
+ 57: GETL R31, t44
+ 58: GETL R29, t42
+ 59: SHLL t42, t44
+ 60: PUTL t44, R6
+ 61: INCEIPL $4
+
+ 0xFECF9DC: 39680030 addi r11,r8,48
+ 62: GETL R8, t46
+ 63: ADDL $0x30, t46
+ 64: PUTL t46, R11
+ 65: INCEIPL $4
+
+ 0xFECF9E0: 300AFFFF addic r0,r10,-1
+ 66: GETL R10, t48
+ 67: ADCL $0xFFFFFFFF, t48 (-wCa)
+ 68: PUTL t48, R0
+ 69: INCEIPL $4
+
+ 0xFECF9E4: 7FA05110 subfe r29,r0,r10
+ 70: GETL R0, t50
+ 71: GETL R10, t52
+ 72: SBBL t50, t52 (-rCa-wCa)
+ 73: PUTL t52, R29
+ 74: INCEIPL $4
+
+ 0xFECF9E8: 7D1BE214 add r8,r27,r28
+ 75: GETL R27, t54
+ 76: GETL R28, t56
+ 77: ADDL t54, t56
+ 78: PUTL t56, R8
+ 79: INCEIPL $4
+
+ 0xFECF9EC: 21260000 subfic r9,r6,0
+ 80: GETL R6, t58
+ 81: MOVL $0x0, t60
+ 82: SBBL t58, t60 (-wCa)
+ 83: PUTL t60, R9
+ 84: INCEIPL $4
+
+ 0xFECF9F0: 7EA93114 adde r21,r9,r6
+ 85: GETL R9, t62
+ 86: GETL R6, t64
+ 87: ADCL t62, t64 (-rCa-wCa)
+ 88: PUTL t64, R21
+ 89: INCEIPL $4
+
+ 0xFECF9F4: 7D262810 subfc r9,r6,r5
+ 90: GETL R6, t66
+ 91: GETL R5, t68
+ 92: SBBL t66, t68 (-wCa)
+ 93: PUTL t68, R9
+ 94: INCEIPL $4
+
+ 0xFECF9F8: 7D294910 subfe r9,r9,r9
+ 95: GETL R9, t70
+ 96: GETL R9, t72
+ 97: SBBL t70, t72 (-rCa-wCa)
+ 98: PUTL t72, R9
+ 99: INCEIPL $4
+
+ 0xFECF9FC: 7D2900D0 neg r9,r9
+ 100: GETL R9, t74
+ 101: NEGL t74
+ 102: PUTL t74, R9
+ 103: INCEIPL $4
+
+ 0xFECFA00: 7D2AAB79 or. r10,r9,r21
+ 104: GETL R9, t76
+ 105: GETL R21, t78
+ 106: ORL t78, t76
+ 107: PUTL t76, R10
+ 108: CMP0L t76, t80 (-rSo)
+ 109: ICRFL t80, $0x0, CR
+ 110: INCEIPL $4
+
+ 0xFECFA04: 41820034 bc 12,2,0xFECFA38
+ 111: Js02o $0xFECFA38
+
+
+
+. 1790 FECF9A4 100
+. 39 78 00 01 7F 8A B2 78 55 64 D9 7E 55 66 18 38 54 83 10 3A 55 7D 06 FE 7C E3 E2 14 7D 06 E2 14 54 9B 40 2E 3B E0 00 01 80 A7 04 38 7F 1C B0 00 28 99 01 FF 7F E6 E8 30 39 68 00 30 30 0A FF FF 7F A0 51 10 7D 1B E2 14 21 26 00 00 7E A9 31 14 7D 26 28 10 7D 29 49 10 7D 29 00 D0 7D 2A AB 79 41 82 00 34
+==== BB 1791 (0xFECFA08) approx BBs exec'd 0 ====
+
+ 0xFECFA08: 39270438 addi r9,r7,1080
+ 0: GETL R7, t0
+ 1: ADDL $0x438, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFECFA0C: 38840001 addi r4,r4,1
+ 4: GETL R4, t2
+ 5: ADDL $0x1, t2
+ 6: PUTL t2, R4
+ 7: INCEIPL $4
+
+ 0xFECFA10: 38E70004 addi r7,r7,4
+ 8: GETL R7, t4
+ 9: ADDL $0x4, t4
+ 10: PUTL t4, R7
+ 11: INCEIPL $4
+
+ 0xFECFA14: 2B840003 cmpli cr7,r4,3
+ 12: GETL R4, t6
+ 13: MOVL $0x3, t10
+ 14: CMPUL t6, t10, t8 (-rSo)
+ 15: ICRFL t8, $0x7, CR
+ 16: INCEIPL $4
+
+ 0xFECFA18: 5483103A rlwinm r3,r4,2,0,29
+ 17: GETL R4, t12
+ 18: SHLL $0x2, t12
+ 19: PUTL t12, R3
+ 20: INCEIPL $4
+
+ 0xFECFA1C: 39080100 addi r8,r8,256
+ 21: GETL R8, t14
+ 22: ADDL $0x100, t14
+ 23: PUTL t14, R8
+ 24: INCEIPL $4
+
+ 0xFECFA20: 419D0164 bc 12,29,0xFECFB84
+ 25: Js29o $0xFECFB84
+
+
+
+. 1791 FECFA08 28
+. 39 27 04 38 38 84 00 01 38 E7 00 04 2B 84 00 03 54 83 10 3A 39 08 01 00 41 9D 01 64
+==== BB 1792 (0xFECFA24) approx BBs exec'd 0 ====
+
+ 0xFECFA24: 84A90004 lwzu r5,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R9
+ 3: LDL (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFECFA28: 2C050000 cmpi cr0,r5,0
+ 6: GETL R5, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECFA2C: 4182FFE0 bc 12,2,0xFECFA0C
+ 10: Js02o $0xFECFA0C
+
+
+
+. 1792 FECFA24 12
+. 84 A9 00 04 2C 05 00 00 41 82 FF E0
+==== BB 1793 (0xFECFA0C) approx BBs exec'd 0 ====
+
+ 0xFECFA0C: 38840001 addi r4,r4,1
+ 0: GETL R4, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0xFECFA10: 38E70004 addi r7,r7,4
+ 4: GETL R7, t2
+ 5: ADDL $0x4, t2
+ 6: PUTL t2, R7
+ 7: INCEIPL $4
+
+ 0xFECFA14: 2B840003 cmpli cr7,r4,3
+ 8: GETL R4, t4
+ 9: MOVL $0x3, t8
+ 10: CMPUL t4, t8, t6 (-rSo)
+ 11: ICRFL t6, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFECFA18: 5483103A rlwinm r3,r4,2,0,29
+ 13: GETL R4, t10
+ 14: SHLL $0x2, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0xFECFA1C: 39080100 addi r8,r8,256
+ 17: GETL R8, t12
+ 18: ADDL $0x100, t12
+ 19: PUTL t12, R8
+ 20: INCEIPL $4
+
+ 0xFECFA20: 419D0164 bc 12,29,0xFECFB84
+ 21: Js29o $0xFECFB84
+
+
+
+. 1793 FECFA0C 24
+. 38 84 00 01 38 E7 00 04 2B 84 00 03 54 83 10 3A 39 08 01 00 41 9D 01 64
+==== BB 1794 (0xFECFB84) approx BBs exec'd 0 ====
+
+ 0xFECFB84: 83BC0030 lwz r29,48(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFECFB88: 82FD0004 lwz r23,4(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R23
+ 9: INCEIPL $4
+
+ 0xFECFB8C: 56E00038 rlwinm r0,r23,0,0,28
+ 10: GETL R23, t8
+ 11: ANDL $0xFFFFFFF8, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0xFECFB90: 7F110040 cmpl cr6,r17,r0
+ 14: GETL R17, t10
+ 15: GETL R0, t12
+ 16: CMPUL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0xFECFB94: 4099031C bc 4,25,0xFECFEB0
+ 19: Jc25o $0xFECFEB0
+
+
+
+. 1794 FECFB84 20
+. 83 BC 00 30 82 FD 00 04 56 E0 00 38 7F 11 00 40 40 99 03 1C
+==== BB 1795 (0xFECFB98) approx BBs exec'd 0 ====
+
+ 0xFECFB98: 819C0004 lwz r12,4(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFECFB9C: 718A0001 andi. r10,r12,0x1
+ 5: GETL R12, t4
+ 6: ANDL $0x1, t4
+ 7: PUTL t4, R10
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0xFECFBA0: 408201A0 bc 4,2,0xFECFD40
+ 11: Jc02o $0xFECFD40
+
+
+
+. 1795 FECFB98 12
+. 81 9C 00 04 71 8A 00 01 40 82 01 A0
+==== BB 1796 (0xFECFD40) approx BBs exec'd 0 ====
+
+ 0xFECFD40: 82FE0628 lwz r23,1576(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x628, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0xFECFD44: 82770008 lwz r19,8(r23)
+ 5: GETL R23, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R19
+ 9: INCEIPL $4
+
+ 0xFECFD48: 80B70018 lwz r5,24(r23)
+ 10: GETL R23, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R5
+ 14: INCEIPL $4
+
+ 0xFECFD4C: 7D93C840 cmpl cr3,r19,r25
+ 15: GETL R19, t12
+ 16: GETL R25, t14
+ 17: CMPUL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x3, CR
+ 19: INCEIPL $4
+
+ 0xFECFD50: 3A65FFFF addi r19,r5,-1
+ 20: GETL R5, t18
+ 21: ADDL $0xFFFFFFFF, t18
+ 22: PUTL t18, R19
+ 23: INCEIPL $4
+
+ 0xFECFD54: 418D0028 bc 12,13,0xFECFD7C
+ 24: Js13o $0xFECFD7C
+
+
+
+. 1796 FECFD40 24
+. 82 FE 06 28 82 77 00 08 80 B7 00 18 7D 93 C8 40 3A 65 FF FF 41 8D 00 28
+==== BB 1797 (0xFECFD7C) approx BBs exec'd 0 ====
+
+ 0xFECFD7C: 817E0680 lwz r11,1664(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x680, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFECFD80: 7FB6EB78 or r22,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R22
+ 7: INCEIPL $4
+
+ 0xFECFD84: 83FD0004 lwz r31,4(r29)
+ 8: GETL R29, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R31
+ 12: INCEIPL $4
+
+ 0xFECFD88: 3B000000 li r24,0
+ 13: MOVL $0x0, t10
+ 14: PUTL t10, R24
+ 15: INCEIPL $4
+
+ 0xFECFD8C: 81EB0000 lwz r15,0(r11)
+ 16: GETL R11, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R15
+ 19: INCEIPL $4
+
+ 0xFECFD90: 3B600000 li r27,0
+ 20: MOVL $0x0, t16
+ 21: PUTL t16, R27
+ 22: INCEIPL $4
+
+ 0xFECFD94: 57F50038 rlwinm r21,r31,0,0,28
+ 23: GETL R31, t18
+ 24: ANDL $0xFFFFFFF8, t18
+ 25: PUTL t18, R21
+ 26: INCEIPL $4
+
+ 0xFECFD98: 7C9C7800 cmp cr1,r28,r15
+ 27: GETL R28, t20
+ 28: GETL R15, t22
+ 29: CMPL t20, t22, t24 (-rSo)
+ 30: ICRFL t24, $0x1, CR
+ 31: INCEIPL $4
+
+ 0xFECFD9C: 7E1DAA14 add r16,r29,r21
+ 32: GETL R29, t26
+ 33: GETL R21, t28
+ 34: ADDL t26, t28
+ 35: PUTL t28, R16
+ 36: INCEIPL $4
+
+ 0xFECFDA0: 41860164 bc 12,6,0xFECFF04
+ 37: Js06o $0xFECFF04
+
+
+
+. 1797 FECFD7C 40
+. 81 7E 06 80 7F B6 EB 78 83 FD 00 04 3B 00 00 00 81 EB 00 00 3B 60 00 00 57 F5 00 38 7C 9C 78 00 7E 1D AA 14 41 86 01 64
+==== BB 1798 (0xFECFF04) approx BBs exec'd 0 ====
+
+ 0xFECFF04: 80BC0004 lwz r5,4(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFECFF08: 81970004 lwz r12,4(r23)
+ 5: GETL R23, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0xFECFF0C: 70AA0002 andi. r10,r5,0x2
+ 10: GETL R5, t8
+ 11: ANDL $0x2, t8
+ 12: PUTL t8, R10
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFECFF10: 7E4CCA14 add r18,r12,r25
+ 16: GETL R12, t12
+ 17: GETL R25, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R18
+ 20: INCEIPL $4
+
+ 0xFECFF14: 38120010 addi r0,r18,16
+ 21: GETL R18, t16
+ 22: ADDL $0x10, t16
+ 23: PUTL t16, R0
+ 24: INCEIPL $4
+
+ 0xFECFF18: 40820008 bc 4,2,0xFECFF20
+ 25: Jc02o $0xFECFF20
+
+
+
+. 1798 FECFF04 24
+. 80 BC 00 04 81 97 00 04 70 AA 00 02 7E 4C CA 14 38 12 00 10 40 82 00 08
+==== BB 1799 (0xFECFF1C) approx BBs exec'd 0 ====
+
+ 0xFECFF1C: 7C150050 subf r0,r21,r0
+ 0: GETL R21, t0
+ 1: GETL R0, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFECFF20: 7C009A14 add r0,r0,r19
+ 5: GETL R0, t4
+ 6: GETL R19, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFECFF24: 7E7298F8 nor r18,r19,r19
+ 10: GETL R19, t8
+ 11: NOTL t8
+ 12: PUTL t8, R18
+ 13: INCEIPL $4
+
+ 0xFECFF28: 7C1F9039 and. r31,r0,r18
+ 14: GETL R0, t10
+ 15: GETL R18, t12
+ 16: ANDL t10, t12
+ 17: PUTL t12, R31
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x0, CR
+ 20: INCEIPL $4
+
+ 0xFECFF2C: 408101B4 bc 4,1,0xFED00E0
+ 21: Jc01o $0xFED00E0
+
+
+
+. 1799 FECFF1C 20
+. 7C 15 00 50 7C 00 9A 14 7E 72 98 F8 7C 1F 90 39 40 81 01 B4
+==== BB 1800 (0xFECFF30) approx BBs exec'd 0 ====
+
+ 0xFECFF30: 81DE1A70 lwz r14,6768(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1A70, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R14
+ 4: INCEIPL $4
+
+ 0xFECFF34: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFECFF38: 810E0000 lwz r8,0(r14)
+ 8: GETL R14, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R8
+ 11: INCEIPL $4
+
+ 0xFECFF3C: 7D0903A6 mtctr r8
+ 12: GETL R8, t10
+ 13: PUTL t10, CTR
+ 14: INCEIPL $4
+
+ 0xFECFF40: 4E800421 bctrl
+ 15: MOVL $0xFECFF44, t12
+ 16: PUTL t12, LR
+ 17: GETL CTR, t14
+ 18: JMPo-c t14 ($4)
+
+
+
+. 1800 FECFF30 20
+. 81 DE 1A 70 7F E3 FB 78 81 0E 00 00 7D 09 03 A6 4E 80 04 21
+==== BB 1801 __GI___default_morecore(0xFED4188) approx BBs exec'd 0 ====
+
+ 0xFED4188: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFED418C: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFED4190: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFED4194: 48054BDD bl 0xFF28D70
+ 14: MOVL $0xFED4198, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFF28D70 ($4)
+
+
+
+. 1801 FED4188 16
+. 7C 08 02 A6 94 21 FF F0 90 01 00 14 48 05 4B DD
+==== BB 1802 sbrk(0xFF28D70) approx BBs exec'd 0 ====
+
+ 0xFF28D70: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFF28D74: 7C8802A6 mflr r4
+ 6: GETL LR, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFF28D78: 4807F0D9 bl 0xFFA7E50
+ 9: MOVL $0xFF28D7C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1802 FF28D70 12
+. 94 21 FF E0 7C 88 02 A6 48 07 F0 D9
+==== BB 1803 (0xFF28D7C) approx BBs exec'd 0 ====
+
+ 0xFF28D7C: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF28D80: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFF28D84: 93E1001C stw r31,28(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFF28D88: 90810024 stw r4,36(r1)
+ 13: GETL R4, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFF28D8C: 93A10014 stw r29,20(r1)
+ 18: GETL R29, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFF28D90: 7C7D1B78 or r29,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0xFF28D94: 83FE1D6C lwz r31,7532(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x1D6C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0xFF28D98: 38600000 li r3,0
+ 31: MOVL $0x0, t24
+ 32: PUTL t24, R3
+ 33: INCEIPL $4
+
+ 0xFF28D9C: 801F0000 lwz r0,0(r31)
+ 34: GETL R31, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R0
+ 37: INCEIPL $4
+
+ 0xFF28DA0: 2F800000 cmpi cr7,r0,0
+ 38: GETL R0, t30
+ 39: CMP0L t30, t32 (-rSo)
+ 40: ICRFL t32, $0x7, CR
+ 41: INCEIPL $4
+
+ 0xFF28DA4: 419E003C bc 12,30,0xFF28DE0
+ 42: Js30o $0xFF28DE0
+
+
+
+. 1803 FF28D7C 44
+. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 81 00 24 93 A1 00 14 7C 7D 1B 78 83 FE 1D 6C 38 60 00 00 80 1F 00 00 2F 80 00 00 41 9E 00 3C
+==== BB 1804 (0xFF28DE0) approx BBs exec'd 0 ====
+
+ 0xFF28DE0: 4BFFFF4D bl 0xFF28D2C
+ 0: MOVL $0xFF28DE4, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFF28D2C ($4)
+
+
+
+. 1804 FF28DE0 4
+. 4B FF FF 4D
+==== BB 1805 brk(0xFF28D2C) approx BBs exec'd 0 ====
+
+ 0xFF28D2C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFF28D30: 90610008 stw r3,8(r1)
+ 6: GETL R3, t4
+ 7: GETL R1, t6
+ 8: ADDL $0x8, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0xFF28D34: 3800002D li r0,45
+ 11: MOVL $0x2D, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0xFF28D38: 44000002 sc
+ 14: JMPo-sys $0xFF28D3C ($4)
+
+
+
+. 1805 FF28D2C 16
+. 94 21 FF F0 90 61 00 08 38 00 00 2D 44 00 00 02
+==== BB 1806 (0xFF28D3C) approx BBs exec'd 0 ====
+
+ 0xFF28D3C: 80C10008 lwz r6,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFF28D40: 7C8802A6 mflr r4
+ 5: GETL LR, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFF28D44: 4807F10D bl 0xFFA7E50
+ 8: MOVL $0xFF28D48, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1806 FF28D3C 12
+. 80 C1 00 08 7C 88 02 A6 48 07 F1 0D
+==== BB 1807 (0xFF28D48) approx BBs exec'd 0 ====
+
+ 0xFF28D48: 7CA802A6 mflr r5
+ 0: GETL LR, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFF28D4C: 80A51D6C lwz r5,7532(r5)
+ 3: GETL R5, t2
+ 4: ADDL $0x1D6C, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFF28D50: 7C8803A6 mtlr r4
+ 8: GETL R4, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0xFF28D54: 90650000 stw r3,0(r5)
+ 11: GETL R3, t8
+ 12: GETL R5, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFF28D58: 7C061840 cmpl cr0,r6,r3
+ 15: GETL R6, t12
+ 16: GETL R3, t14
+ 17: CMPUL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x0, CR
+ 19: INCEIPL $4
+
+ 0xFF28D5C: 38210010 addi r1,r1,16
+ 20: GETL R1, t18
+ 21: ADDL $0x10, t18
+ 22: PUTL t18, R1
+ 23: INCEIPL $4
+
+ 0xFF28D60: 38600000 li r3,0
+ 24: MOVL $0x0, t20
+ 25: PUTL t20, R3
+ 26: INCEIPL $4
+
+ 0xFF28D64: 4CA10020 bclr 5,1
+ 27: GETL LR, t22
+ 28: Jc01o-r t22
+
+
+
+. 1807 FF28D48 32
+. 7C A8 02 A6 80 A5 1D 6C 7C 88 03 A6 90 65 00 00 7C 06 18 40 38 21 00 10 38 60 00 00 4C A1 00 20
+==== BB 1808 (0xFF28DE4) approx BBs exec'd 0 ====
+
+ 0xFF28DE4: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFF28DE8: 3860FFFF li r3,-1
+ 4: MOVL $0xFFFFFFFF, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFF28DEC: 41A4FFD8 bc 13,4,0xFF28DC4
+ 7: Js04o $0xFF28DC4
+
+
+
+. 1808 FF28DE4 12
+. 2C 83 00 00 38 60 FF FF 41 A4 FF D8
+==== BB 1809 (0xFF28DF0) approx BBs exec'd 0 ====
+
+ 0xFF28DF0: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFF28DF4: 419AFFCC bc 12,26,0xFF28DC0
+ 4: Js26o $0xFF28DC0
+
+
+
+. 1809 FF28DF0 8
+. 2F 1D 00 00 41 9A FF CC
+==== BB 1810 (0xFF28DF8) approx BBs exec'd 0 ====
+
+ 0xFF28DF8: 83FF0000 lwz r31,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R31
+ 3: INCEIPL $4
+
+ 0xFF28DFC: 7C7FEA14 add r3,r31,r29
+ 4: GETL R31, t4
+ 5: GETL R29, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFF28E00: 4BFFFF2D bl 0xFF28D2C
+ 9: MOVL $0xFF28E04, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0xFF28D2C ($4)
+
+
+
+. 1810 FF28DF8 12
+. 83 FF 00 00 7C 7F EA 14 4B FF FF 2D
+==== BB 1811 (0xFF28E04) approx BBs exec'd 0 ====
+
+ 0xFF28E04: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFF28E08: 3860FFFF li r3,-1
+ 4: MOVL $0xFFFFFFFF, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFF28E0C: 41BCFFB8 bc 13,28,0xFF28DC4
+ 7: Js28o $0xFF28DC4
+
+
+
+. 1811 FF28E04 12
+. 2F 83 00 00 38 60 FF FF 41 BC FF B8
+==== BB 1812 (0xFF28E10) approx BBs exec'd 0 ====
+
+ 0xFF28E10: 80C10024 lwz r6,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFF28E14: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFF28E18: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0xFF28E1C: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0xFF28E20: 7CC803A6 mtlr r6
+ 18: GETL R6, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFF28E24: 83E1001C lwz r31,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0xFF28E28: 38210020 addi r1,r1,32
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0xFF28E2C: 4E800020 blr
+ 30: GETL LR, t22
+ 31: JMPo-r t22 ($4)
+
+
+
+. 1812 FF28E10 32
+. 80 C1 00 24 7F E3 FB 78 83 A1 00 14 83 C1 00 18 7C C8 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1813 (0xFED4198) approx BBs exec'd 0 ====
+
+ 0xFED4198: 2F83FFFF cmpi cr7,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFED419C: 38000000 li r0,0
+ 5: MOVL $0x0, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xFED41A0: 419E0008 bc 12,30,0xFED41A8
+ 8: Js30o $0xFED41A8
+
+
+
+. 1813 FED4198 12
+. 2F 83 FF FF 38 00 00 00 41 9E 00 08
+==== BB 1814 (0xFED41A4) approx BBs exec'd 0 ====
+
+ 0xFED41A4: 7C601B78 or r0,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFED41A8: 80810014 lwz r4,20(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x14, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFED41AC: 7C030378 or r3,r0,r0
+ 8: GETL R0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFED41B0: 38210010 addi r1,r1,16
+ 11: GETL R1, t8
+ 12: ADDL $0x10, t8
+ 13: PUTL t8, R1
+ 14: INCEIPL $4
+
+ 0xFED41B4: 7C8803A6 mtlr r4
+ 15: GETL R4, t10
+ 16: PUTL t10, LR
+ 17: INCEIPL $4
+
+ 0xFED41B8: 4E800020 blr
+ 18: GETL LR, t12
+ 19: JMPo-r t12 ($4)
+
+
+
+. 1814 FED41A4 24
+. 7C 60 1B 78 80 81 00 14 7C 03 03 78 38 21 00 10 7C 88 03 A6 4E 80 00 20
+==== BB 1815 (0xFECFF44) approx BBs exec'd 0 ====
+
+ 0xFECFF44: 7C7B1B79 or. r27,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R27
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFECFF48: 7F400026 mfcr r26
+ 5: GETL CR, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0xFECFF4C: 4182019C bc 12,2,0xFED00E8
+ 8: Js02o $0xFED00E8
+
+
+
+. 1815 FECFF44 12
+. 7C 7B 1B 79 7F 40 00 26 41 82 01 9C
+==== BB 1816 (0xFECFF50) approx BBs exec'd 0 ====
+
+ 0xFECFF50: 815E1BB8 lwz r10,7096(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BB8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFECFF54: 812A0000 lwz r9,0(r10)
+ 5: GETL R10, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0xFECFF58: 2E090000 cmpi cr4,r9,0
+ 9: GETL R9, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x4, CR
+ 12: INCEIPL $4
+
+ 0xFECFF5C: 41B2000C bc 13,18,0xFECFF68
+ 13: Js18o $0xFECFF68
+
+
+
+. 1816 FECFF50 16
+. 81 5E 1B B8 81 2A 00 00 2E 09 00 00 41 B2 00 0C
+==== BB 1817 (0xFECFF68) approx BBs exec'd 0 ====
+
+ 0xFECFF68: 575A203E rlwinm r26,r26,4,0,31
+ 0: GETL R26, t0
+ 1: ROLL $0x4, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0xFECFF6C: 7F401120 mtcrf 0x1,r26
+ 4: GETL R26, t2
+ 5: ICRFL t2, $0x7, CR
+ 6: INCEIPL $4
+
+ 0xFECFF70: 575AE03E rlwinm r26,r26,28,0,31
+ 7: GETL R26, t4
+ 8: ROLL $0x1C, t4
+ 9: PUTL t4, R26
+ 10: INCEIPL $4
+
+ 0xFECFF74: 419E004C bc 12,30,0xFECFFC0
+ 11: Js30o $0xFECFFC0
+
+
+
+. 1817 FECFF68 16
+. 57 5A 20 3E 7F 40 11 20 57 5A E0 3E 41 9E 00 4C
+==== BB 1818 (0xFECFF78) approx BBs exec'd 0 ====
+
+ 0xFECFF78: 83570028 lwz r26,40(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x28, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFECFF7C: 2E1A0000 cmpi cr4,r26,0
+ 5: GETL R26, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0xFECFF80: 40920008 bc 4,18,0xFECFF88
+ 9: Jc18o $0xFECFF88
+
+
+
+. 1818 FECFF78 12
+. 83 57 00 28 2E 1A 00 00 40 92 00 08
+==== BB 1819 (0xFECFF84) approx BBs exec'd 0 ====
+
+ 0xFECFF84: 93770028 stw r27,40(r23)
+ 0: GETL R27, t0
+ 1: GETL R23, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECFF88: 2F180000 cmpi cr6,r24,0
+ 5: GETL R24, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFECFF8C: 7F658278 xor r5,r27,r16
+ 9: GETL R27, t8
+ 10: GETL R16, t10
+ 11: XORL t8, t10
+ 12: PUTL t10, R5
+ 13: INCEIPL $4
+
+ 0xFECFF90: 20050000 subfic r0,r5,0
+ 14: GETL R5, t12
+ 15: MOVL $0x0, t14
+ 16: SBBL t12, t14 (-wCa)
+ 17: PUTL t14, R0
+ 18: INCEIPL $4
+
+ 0xFECFF94: 7CA02914 adde r5,r0,r5
+ 19: GETL R0, t16
+ 20: GETL R5, t18
+ 21: ADCL t16, t18 (-rCa-wCa)
+ 22: PUTL t18, R5
+ 23: INCEIPL $4
+
+ 0xFECFF98: 82FC044C lwz r23,1100(r28)
+ 24: GETL R28, t20
+ 25: ADDL $0x44C, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R23
+ 28: INCEIPL $4
+
+ 0xFECFF9C: 7D800026 mfcr r12
+ 29: GETL CR, t24
+ 30: PUTL t24, R12
+ 31: INCEIPL $4
+
+ 0xFECFFA0: 558CDFFE rlwinm r12,r12,27,31,31
+ 32: GETL R12, t26
+ 33: ROLL $0x1B, t26
+ 34: ANDL $0x1, t26
+ 35: PUTL t26, R12
+ 36: INCEIPL $4
+
+ 0xFECFFA4: 7CAA6039 and. r10,r5,r12
+ 37: GETL R5, t28
+ 38: GETL R12, t30
+ 39: ANDL t28, t30
+ 40: PUTL t30, R10
+ 41: CMP0L t30, t32 (-rSo)
+ 42: ICRFL t32, $0x0, CR
+ 43: INCEIPL $4
+
+ 0xFECFFA8: 7D57FA14 add r10,r23,r31
+ 44: GETL R23, t34
+ 45: GETL R31, t36
+ 46: ADDL t34, t36
+ 47: PUTL t36, R10
+ 48: INCEIPL $4
+
+ 0xFECFFAC: 41820254 bc 12,2,0xFED0200
+ 49: Js02o $0xFED0200
+
+
+
+. 1819 FECFF84 44
+. 93 77 00 28 2F 18 00 00 7F 65 82 78 20 05 00 00 7C A0 29 14 82 FC 04 4C 7D 80 00 26 55 8C DF FE 7C AA 60 39 7D 57 FA 14 41 82 02 54
+==== BB 1820 (0xFED0200) approx BBs exec'd 0 ====
+
+ 0xFED0200: 811C0004 lwz r8,4(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFED0204: 3175FFFF addic r11,r21,-1
+ 5: GETL R21, t4
+ 6: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0xFED0208: 7FABA910 subfe r29,r11,r21
+ 9: GETL R11, t6
+ 10: GETL R21, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R29
+ 13: INCEIPL $4
+
+ 0xFED020C: 69000002 xori r0,r8,0x2
+ 14: GETL R8, t10
+ 15: XORL $0x2, t10
+ 16: PUTL t10, R0
+ 17: INCEIPL $4
+
+ 0xFED0210: 5400FFFE rlwinm r0,r0,31,31,31
+ 18: GETL R0, t12
+ 19: ROLL $0x1F, t12
+ 20: ANDL $0x1, t12
+ 21: PUTL t12, R0
+ 22: INCEIPL $4
+
+ 0xFED0214: 7C0BE839 and. r11,r0,r29
+ 23: GETL R0, t14
+ 24: GETL R29, t16
+ 25: ANDL t14, t16
+ 26: PUTL t16, R11
+ 27: CMP0L t16, t18 (-rSo)
+ 28: ICRFL t18, $0x0, CR
+ 29: INCEIPL $4
+
+ 0xFED0218: 4182000C bc 12,2,0xFED0224
+ 30: Js02o $0xFED0224
+
+
+
+. 1820 FED0200 28
+. 81 1C 00 04 31 75 FF FF 7F AB A9 10 69 00 00 02 54 00 FF FE 7C 0B E8 39 41 82 00 0C
+==== BB 1821 (0xFED0224) approx BBs exec'd 0 ====
+
+ 0xFED0224: 2C800000 cmpi cr1,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFED0228: 3BA00000 li r29,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R29
+ 6: INCEIPL $4
+
+ 0xFED022C: 7F7ADB78 or r26,r27,r27
+ 7: GETL R27, t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0xFED0230: 41860104 bc 12,6,0xFED0334
+ 10: Js06o $0xFED0334
+
+
+
+. 1821 FED0224 16
+. 2C 80 00 00 3B A0 00 00 7F 7A DB 78 41 86 01 04
+==== BB 1822 (0xFED0234) approx BBs exec'd 0 ====
+
+ 0xFED0234: 2F150000 cmpi cr6,r21,0
+ 0: GETL R21, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFED0238: 419A00F4 bc 12,26,0xFED032C
+ 4: Js26o $0xFED032C
+
+
+
+. 1822 FED0234 8
+. 2F 15 00 00 41 9A 00 F4
+==== BB 1823 (0xFED032C) approx BBs exec'd 0 ====
+
+ 0xFED032C: 915C044C stw r10,1100(r28)
+ 0: GETL R10, t0
+ 1: GETL R28, t2
+ 2: ADDL $0x44C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFED0330: 4BFFFF18 b 0xFED0248
+ 5: JMPo $0xFED0248 ($4)
+
+
+
+. 1823 FED032C 8
+. 91 5C 04 4C 4B FF FF 18
+==== BB 1824 (0xFED0248) approx BBs exec'd 0 ====
+
+ 0xFED0248: 73600007 andi. r0,r27,0x7
+ 0: GETL R27, t0
+ 1: ANDL $0x7, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED024C: 4182000C bc 12,2,0xFED0258
+ 6: Js02o $0xFED0258
+
+
+
+. 1824 FED0248 8
+. 73 60 00 07 41 82 00 0C
+==== BB 1825 (0xFED0250) approx BBs exec'd 0 ====
+
+ 0xFED0250: 23A00008 subfic r29,r0,8
+ 0: GETL R0, t0
+ 1: MOVL $0x8, t2
+ 2: SBBL t0, t2 (-wCa)
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFED0254: 7F5BEA14 add r26,r27,r29
+ 5: GETL R27, t4
+ 6: GETL R29, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0xFED0258: 7C9BFA14 add r4,r27,r31
+ 10: GETL R27, t8
+ 11: GETL R31, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0xFED025C: 7D5DAA14 add r10,r29,r21
+ 15: GETL R29, t12
+ 16: GETL R21, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R10
+ 19: INCEIPL $4
+
+ 0xFED0260: 7D245214 add r9,r4,r10
+ 20: GETL R4, t16
+ 21: GETL R10, t18
+ 22: ADDL t16, t18
+ 23: PUTL t18, R9
+ 24: INCEIPL $4
+
+ 0xFED0264: 7D699A14 add r11,r9,r19
+ 25: GETL R9, t20
+ 26: GETL R19, t22
+ 27: ADDL t20, t22
+ 28: PUTL t22, R11
+ 29: INCEIPL $4
+
+ 0xFED0268: 7D7B9038 and r27,r11,r18
+ 30: GETL R11, t24
+ 31: GETL R18, t26
+ 32: ANDL t24, t26
+ 33: PUTL t26, R27
+ 34: INCEIPL $4
+
+ 0xFED026C: 7FE9D850 subf r31,r9,r27
+ 35: GETL R9, t28
+ 36: GETL R27, t30
+ 37: SUBL t28, t30
+ 38: PUTL t30, R31
+ 39: INCEIPL $4
+
+ 0xFED0270: 837E1A70 lwz r27,6768(r30)
+ 40: GETL R30, t32
+ 41: ADDL $0x1A70, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R27
+ 44: INCEIPL $4
+
+ 0xFED0274: 7FAAFA14 add r29,r10,r31
+ 45: GETL R10, t36
+ 46: GETL R31, t38
+ 47: ADDL t36, t38
+ 48: PUTL t38, R29
+ 49: INCEIPL $4
+
+ 0xFED0278: 827B0000 lwz r19,0(r27)
+ 50: GETL R27, t40
+ 51: LDL (t40), t42
+ 52: PUTL t42, R19
+ 53: INCEIPL $4
+
+ 0xFED027C: 7FA3EB78 or r3,r29,r29
+ 54: GETL R29, t44
+ 55: PUTL t44, R3
+ 56: INCEIPL $4
+
+ 0xFED0280: 7E6903A6 mtctr r19
+ 57: GETL R19, t46
+ 58: PUTL t46, CTR
+ 59: INCEIPL $4
+
+ 0xFED0284: 4E800421 bctrl
+ 60: MOVL $0xFED0288, t48
+ 61: PUTL t48, LR
+ 62: GETL CTR, t50
+ 63: JMPo-c t50 ($4)
+
+
+
+. 1825 FED0250 56
+. 23 A0 00 08 7F 5B EA 14 7C 9B FA 14 7D 5D AA 14 7D 24 52 14 7D 69 9A 14 7D 7B 90 38 7F E9 D8 50 83 7E 1A 70 7F AA FA 14 82 7B 00 00 7F A3 EB 78 7E 69 03 A6 4E 80 04 21
+==== BB 1826 (0xFF28DA8) approx BBs exec'd 0 ====
+
+ 0xFF28DA8: 813E1AA4 lwz r9,6820(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1AA4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFF28DAC: 80A90000 lwz r5,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R5
+ 8: INCEIPL $4
+
+ 0xFF28DB0: 2C050000 cmpi cr0,r5,0
+ 9: GETL R5, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFF28DB4: 4082002C bc 4,2,0xFF28DE0
+ 13: Jc02o $0xFF28DE0
+
+
+
+. 1826 FF28DA8 16
+. 81 3E 1A A4 80 A9 00 00 2C 05 00 00 40 82 00 2C
+==== BB 1827 (0xFF28DB8) approx BBs exec'd 0 ====
+
+ 0xFF28DB8: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFF28DBC: 409A003C bc 4,26,0xFF28DF8
+ 4: Jc26o $0xFF28DF8
+
+
+
+. 1827 FF28DB8 8
+. 2F 1D 00 00 40 9A 00 3C
+==== BB 1828 (0xFED0288) approx BBs exec'd 0 ====
+
+ 0xFED0288: 7C781B79 or. r24,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R24
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFED028C: 7FE00026 mfcr r31
+ 5: GETL CR, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0xFED0290: 41820080 bc 12,2,0xFED0310
+ 8: Js02o $0xFED0310
+
+
+
+. 1828 FED0288 12
+. 7C 78 1B 79 7F E0 00 26 41 82 00 80
+==== BB 1829 (0xFED0294) approx BBs exec'd 0 ====
+
+ 0xFED0294: 807E1BB8 lwz r3,7096(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BB8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFED0298: 81230000 lwz r9,0(r3)
+ 5: GETL R3, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0xFED029C: 2F890000 cmpi cr7,r9,0
+ 9: GETL R9, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFED02A0: 41BE000C bc 13,30,0xFED02AC
+ 13: Js30o $0xFED02AC
+
+
+
+. 1829 FED0294 16
+. 80 7E 1B B8 81 23 00 00 2F 89 00 00 41 BE 00 0C
+==== BB 1830 (0xFED02AC) approx BBs exec'd 0 ====
+
+ 0xFED02AC: 57FF803E rlwinm r31,r31,16,0,31
+ 0: GETL R31, t0
+ 1: ROLL $0x10, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0xFED02B0: 7FE08120 mtcrf 0x8,r31
+ 4: GETL R31, t2
+ 5: ICRFL t2, $0x4, CR
+ 6: INCEIPL $4
+
+ 0xFED02B4: 57FF803E rlwinm r31,r31,16,0,31
+ 7: GETL R31, t4
+ 8: ROLL $0x10, t4
+ 9: PUTL t4, R31
+ 10: INCEIPL $4
+
+ 0xFED02B8: 41B2FD08 bc 13,18,0xFECFFC0
+ 11: Js18o $0xFECFFC0
+
+
+
+. 1830 FED02AC 16
+. 57 FF 80 3E 7F E0 81 20 57 FF 80 3E 41 B2 FD 08
+==== BB 1831 (0xFED02BC) approx BBs exec'd 0 ====
+
+ 0xFED02BC: 7CBAC050 subf r5,r26,r24
+ 0: GETL R26, t0
+ 1: GETL R24, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFED02C0: 2D950000 cmpi cr3,r21,0
+ 5: GETL R21, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x3, CR
+ 8: INCEIPL $4
+
+ 0xFED02C4: 7D85EA14 add r12,r5,r29
+ 9: GETL R5, t8
+ 10: GETL R29, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0xFED02C8: 7F48D378 or r8,r26,r26
+ 14: GETL R26, t12
+ 15: PUTL t12, R8
+ 16: INCEIPL $4
+
+ 0xFED02CC: 61970001 ori r23,r12,0x1
+ 17: GETL R12, t14
+ 18: ORL $0x1, t14
+ 19: PUTL t14, R23
+ 20: INCEIPL $4
+
+ 0xFED02D0: 911C0030 stw r8,48(r28)
+ 21: GETL R8, t16
+ 22: GETL R28, t18
+ 23: ADDL $0x30, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFED02D4: 92FA0004 stw r23,4(r26)
+ 26: GETL R23, t20
+ 27: GETL R26, t22
+ 28: ADDL $0x4, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xFED02D8: 835C044C lwz r26,1100(r28)
+ 31: GETL R28, t24
+ 32: ADDL $0x44C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R26
+ 35: INCEIPL $4
+
+ 0xFED02DC: 7D5AEA14 add r10,r26,r29
+ 36: GETL R26, t28
+ 37: GETL R29, t30
+ 38: ADDL t28, t30
+ 39: PUTL t30, R10
+ 40: INCEIPL $4
+
+ 0xFED02E0: 915C044C stw r10,1100(r28)
+ 41: GETL R10, t32
+ 42: GETL R28, t34
+ 43: ADDL $0x44C, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0xFED02E4: 41AEFB74 bc 13,14,0xFECFE58
+ 46: Js14o $0xFECFE58
+
+
+
+. 1831 FED02BC 44
+. 7C BA C0 50 2D 95 00 00 7D 85 EA 14 7F 48 D3 78 61 97 00 01 91 1C 00 30 92 FA 00 04 83 5C 04 4C 7D 5A EA 14 91 5C 04 4C 41 AE FB 74
+==== BB 1832 (0xFECFE58) approx BBs exec'd 0 ====
+
+ 0xFECFE58: 82DC0450 lwz r22,1104(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x450, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R22
+ 4: INCEIPL $4
+
+ 0xFECFE5C: 7F0AB040 cmpl cr6,r10,r22
+ 5: GETL R10, t4
+ 6: GETL R22, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFECFE60: 40990008 bc 4,25,0xFECFE68
+ 10: Jc25o $0xFECFE68
+
+
+
+. 1832 FECFE58 12
+. 82 DC 04 50 7F 0A B0 40 40 99 00 08
+==== BB 1833 (0xFECFE64) approx BBs exec'd 0 ====
+
+ 0xFECFE64: 915C0450 stw r10,1104(r28)
+ 0: GETL R10, t0
+ 1: GETL R28, t2
+ 2: ADDL $0x450, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECFE68: 81C80004 lwz r14,4(r8)
+ 5: GETL R8, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R14
+ 9: INCEIPL $4
+
+ 0xFECFE6C: 55CB0038 rlwinm r11,r14,0,0,28
+ 10: GETL R14, t8
+ 11: ANDL $0xFFFFFFF8, t8
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0xFECFE70: 7F8B8840 cmpl cr7,r11,r17
+ 14: GETL R11, t10
+ 15: GETL R17, t12
+ 16: CMPUL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0xFECFE74: 419C0078 bc 12,28,0xFECFEEC
+ 19: Js28o $0xFECFEEC
+
+
+
+. 1833 FECFE64 20
+. 91 5C 04 50 81 C8 00 04 55 CB 00 38 7F 8B 88 40 41 9C 00 78
+==== BB 1834 (0xFECFE78) approx BBs exec'd 0 ====
+
+ 0xFECFE78: 7F897A78 xor r9,r28,r15
+ 0: GETL R28, t0
+ 1: GETL R15, t2
+ 2: XORL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFECFE7C: 7E795850 subf r19,r25,r11
+ 5: GETL R25, t4
+ 6: GETL R11, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R19
+ 9: INCEIPL $4
+
+ 0xFECFE80: 3149FFFF addic r10,r9,-1
+ 10: GETL R9, t8
+ 11: ADCL $0xFFFFFFFF, t8 (-wCa)
+ 12: PUTL t8, R10
+ 13: INCEIPL $4
+
+ 0xFECFE84: 7F6A4910 subfe r27,r10,r9
+ 14: GETL R10, t10
+ 15: GETL R9, t12
+ 16: SBBL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R27
+ 18: INCEIPL $4
+
+ 0xFECFE88: 38680008 addi r3,r8,8
+ 19: GETL R8, t14
+ 20: ADDL $0x8, t14
+ 21: PUTL t14, R3
+ 22: INCEIPL $4
+
+ 0xFECFE8C: 577F103A rlwinm r31,r27,2,0,29
+ 23: GETL R27, t16
+ 24: SHLL $0x2, t16
+ 25: PUTL t16, R31
+ 26: INCEIPL $4
+
+ 0xFECFE90: 7E28CA14 add r17,r8,r25
+ 27: GETL R8, t18
+ 28: GETL R25, t20
+ 29: ADDL t18, t20
+ 30: PUTL t20, R17
+ 31: INCEIPL $4
+
+ 0xFECFE94: 7FE6A378 or r6,r31,r20
+ 32: GETL R31, t22
+ 33: GETL R20, t24
+ 34: ORL t24, t22
+ 35: PUTL t22, R6
+ 36: INCEIPL $4
+
+ 0xFECFE98: 626F0001 ori r15,r19,0x1
+ 37: GETL R19, t26
+ 38: ORL $0x1, t26
+ 39: PUTL t26, R15
+ 40: INCEIPL $4
+
+ 0xFECFE9C: 90C80004 stw r6,4(r8)
+ 41: GETL R6, t28
+ 42: GETL R8, t30
+ 43: ADDL $0x4, t30
+ 44: STL t28, (t30)
+ 45: INCEIPL $4
+
+ 0xFECFEA0: 7C681B78 or r8,r3,r3
+ 46: GETL R3, t32
+ 47: PUTL t32, R8
+ 48: INCEIPL $4
+
+ 0xFECFEA4: 91F10004 stw r15,4(r17)
+ 49: GETL R15, t34
+ 50: GETL R17, t36
+ 51: ADDL $0x4, t36
+ 52: STL t34, (t36)
+ 53: INCEIPL $4
+
+ 0xFECFEA8: 923C0030 stw r17,48(r28)
+ 54: GETL R17, t38
+ 55: GETL R28, t40
+ 56: ADDL $0x30, t40
+ 57: STL t38, (t40)
+ 58: INCEIPL $4
+
+ 0xFECFEAC: 4BFFF804 b 0xFECF6B0
+ 59: JMPo $0xFECF6B0 ($4)
+
+
+
+. 1834 FECFE78 56
+. 7F 89 7A 78 7E 79 58 50 31 49 FF FF 7F 6A 49 10 38 68 00 08 57 7F 10 3A 7E 28 CA 14 7F E6 A3 78 62 6F 00 01 90 C8 00 04 7C 68 1B 78 91 F1 00 04 92 3C 00 30 4B FF F8 04
+==== BB 1835 (0xFECF6B0) approx BBs exec'd 0 ====
+
+ 0xFECF6B0: 83810074 lwz r28,116(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFECF6B4: 7D034378 or r3,r8,r8
+ 5: GETL R8, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFECF6B8: 81810024 lwz r12,36(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x24, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R12
+ 12: INCEIPL $4
+
+ 0xFECF6BC: 7F8803A6 mtlr r28
+ 13: GETL R28, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFECF6C0: 81C10028 lwz r14,40(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x28, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R14
+ 20: INCEIPL $4
+
+ 0xFECF6C4: 81E1002C lwz r15,44(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x2C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R15
+ 25: INCEIPL $4
+
+ 0xFECF6C8: 7D818120 mtcrf 0x18,r12
+ 26: GETL R12, t20
+ 27: ICRFL t20, $0x3, CR
+ 28: ICRFL t20, $0x4, CR
+ 29: INCEIPL $4
+
+ 0xFECF6CC: 82010030 lwz r16,48(r1)
+ 30: GETL R1, t22
+ 31: ADDL $0x30, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R16
+ 34: INCEIPL $4
+
+ 0xFECF6D0: 82210034 lwz r17,52(r1)
+ 35: GETL R1, t26
+ 36: ADDL $0x34, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R17
+ 39: INCEIPL $4
+
+ 0xFECF6D4: 82410038 lwz r18,56(r1)
+ 40: GETL R1, t30
+ 41: ADDL $0x38, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R18
+ 44: INCEIPL $4
+
+ 0xFECF6D8: 8261003C lwz r19,60(r1)
+ 45: GETL R1, t34
+ 46: ADDL $0x3C, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R19
+ 49: INCEIPL $4
+
+ 0xFECF6DC: 82810040 lwz r20,64(r1)
+ 50: GETL R1, t38
+ 51: ADDL $0x40, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R20
+ 54: INCEIPL $4
+
+ 0xFECF6E0: 82A10044 lwz r21,68(r1)
+ 55: GETL R1, t42
+ 56: ADDL $0x44, t42
+ 57: LDL (t42), t44
+ 58: PUTL t44, R21
+ 59: INCEIPL $4
+
+ 0xFECF6E4: 82C10048 lwz r22,72(r1)
+ 60: GETL R1, t46
+ 61: ADDL $0x48, t46
+ 62: LDL (t46), t48
+ 63: PUTL t48, R22
+ 64: INCEIPL $4
+
+ 0xFECF6E8: 82E1004C lwz r23,76(r1)
+ 65: GETL R1, t50
+ 66: ADDL $0x4C, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R23
+ 69: INCEIPL $4
+
+ 0xFECF6EC: 83010050 lwz r24,80(r1)
+ 70: GETL R1, t54
+ 71: ADDL $0x50, t54
+ 72: LDL (t54), t56
+ 73: PUTL t56, R24
+ 74: INCEIPL $4
+
+ 0xFECF6F0: 83210054 lwz r25,84(r1)
+ 75: GETL R1, t58
+ 76: ADDL $0x54, t58
+ 77: LDL (t58), t60
+ 78: PUTL t60, R25
+ 79: INCEIPL $4
+
+ 0xFECF6F4: 83410058 lwz r26,88(r1)
+ 80: GETL R1, t62
+ 81: ADDL $0x58, t62
+ 82: LDL (t62), t64
+ 83: PUTL t64, R26
+ 84: INCEIPL $4
+
+ 0xFECF6F8: 8361005C lwz r27,92(r1)
+ 85: GETL R1, t66
+ 86: ADDL $0x5C, t66
+ 87: LDL (t66), t68
+ 88: PUTL t68, R27
+ 89: INCEIPL $4
+
+ 0xFECF6FC: 83810060 lwz r28,96(r1)
+ 90: GETL R1, t70
+ 91: ADDL $0x60, t70
+ 92: LDL (t70), t72
+ 93: PUTL t72, R28
+ 94: INCEIPL $4
+
+ 0xFECF700: 83A10064 lwz r29,100(r1)
+ 95: GETL R1, t74
+ 96: ADDL $0x64, t74
+ 97: LDL (t74), t76
+ 98: PUTL t76, R29
+ 99: INCEIPL $4
+
+ 0xFECF704: 83C10068 lwz r30,104(r1)
+ 100: GETL R1, t78
+ 101: ADDL $0x68, t78
+ 102: LDL (t78), t80
+ 103: PUTL t80, R30
+ 104: INCEIPL $4
+
+ 0xFECF708: 83E1006C lwz r31,108(r1)
+ 105: GETL R1, t82
+ 106: ADDL $0x6C, t82
+ 107: LDL (t82), t84
+ 108: PUTL t84, R31
+ 109: INCEIPL $4
+
+ 0xFECF70C: 38210070 addi r1,r1,112
+ 110: GETL R1, t86
+ 111: ADDL $0x70, t86
+ 112: PUTL t86, R1
+ 113: INCEIPL $4
+
+ 0xFECF710: 4E800020 blr
+ 114: GETL LR, t88
+ 115: JMPo-r t88 ($4)
+
+
+
+. 1835 FECF6B0 100
+. 83 81 00 74 7D 03 43 78 81 81 00 24 7F 88 03 A6 81 C1 00 28 81 E1 00 2C 7D 81 81 20 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
+==== BB 1836 (0xFED19A8) approx BBs exec'd 0 ====
+
+ 0xFED19A8: 7C7C1B79 or. r28,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R28
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFED19AC: 41820060 bc 12,2,0xFED1A0C
+ 5: Js02o $0xFED1A0C
+
+
+
+. 1836 FED19A8 8
+. 7C 7C 1B 79 41 82 00 60
+==== BB 1837 (0xFED19B0) approx BBs exec'd 0 ====
+
+ 0xFED19B0: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFED19B4: 7C0004AC sync
+ 3: INCEIPL $4
+
+ 0xFED19B8: 7FA0F828 lwarx r29,r0,r31
+ 4: GETL R31, t2
+ 5: LOCKo
+ 6: LDL (t2), t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0xFED19BC: 7C00F92D stwcx. r0,r0,r31
+ 9: GETL R31, t6
+ 10: GETL R0, t8
+ 11: LOCKo
+ 12: STL t8, (t6) (-rSo)
+ 13: ICRFL cr, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFED19C0: 40A2FFF8 bc 5,2,0xFED19B8
+ 15: Jc02o $0xFED19B8
+
+
+
+. 1837 FED19B0 20
+. 38 00 00 00 7C 00 04 AC 7F A0 F8 28 7C 00 F9 2D 40 A2 FF F8
+==== BB 1838 (0xFED19C4) approx BBs exec'd 0 ====
+
+ 0xFED19C4: 2F9D0001 cmpi cr7,r29,1
+ 0: GETL R29, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFED19C8: 419D00DC bc 12,29,0xFED1AA4
+ 5: Js29o $0xFED1AA4
+
+
+
+. 1838 FED19C4 8
+. 2F 9D 00 01 41 9D 00 DC
+==== BB 1839 (0xFED19CC) approx BBs exec'd 0 ====
+
+ 0xFED19CC: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED19D0: 83810024 lwz r28,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFED19D4: 83410008 lwz r26,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0xFED19D8: 7F8803A6 mtlr r28
+ 13: GETL R28, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFED19DC: 8361000C lwz r27,12(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0xC, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R27
+ 20: INCEIPL $4
+
+ 0xFED19E0: 83810010 lwz r28,16(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x10, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R28
+ 25: INCEIPL $4
+
+ 0xFED19E4: 83A10014 lwz r29,20(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R29
+ 30: INCEIPL $4
+
+ 0xFED19E8: 83C10018 lwz r30,24(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x18, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R30
+ 35: INCEIPL $4
+
+ 0xFED19EC: 83E1001C lwz r31,28(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R31
+ 40: INCEIPL $4
+
+ 0xFED19F0: 38210020 addi r1,r1,32
+ 41: GETL R1, t32
+ 42: ADDL $0x20, t32
+ 43: PUTL t32, R1
+ 44: INCEIPL $4
+
+ 0xFED19F4: 4E800020 blr
+ 45: GETL LR, t34
+ 46: JMPo-r t34 ($4)
+
+
+
+. 1839 FED19CC 44
+. 7F 83 E3 78 83 81 00 24 83 41 00 08 7F 88 03 A6 83 61 00 0C 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1840 (0xFED1930) approx BBs exec'd 0 ====
+
+ 0xFED1930: 83810024 lwz r28,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFED1934: 83410008 lwz r26,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0xFED1938: 7F8803A6 mtlr r28
+ 10: GETL R28, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFED193C: 8361000C lwz r27,12(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0xC, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R27
+ 17: INCEIPL $4
+
+ 0xFED1940: 83810010 lwz r28,16(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R28
+ 22: INCEIPL $4
+
+ 0xFED1944: 83A10014 lwz r29,20(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x14, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R29
+ 27: INCEIPL $4
+
+ 0xFED1948: 83C10018 lwz r30,24(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x18, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R30
+ 32: INCEIPL $4
+
+ 0xFED194C: 83E1001C lwz r31,28(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x1C, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R31
+ 37: INCEIPL $4
+
+ 0xFED1950: 38210020 addi r1,r1,32
+ 38: GETL R1, t30
+ 39: ADDL $0x20, t30
+ 40: PUTL t30, R1
+ 41: INCEIPL $4
+
+ 0xFED1954: 4E800020 blr
+ 42: GETL LR, t32
+ 43: JMPo-r t32 ($4)
+
+
+
+. 1840 FED1930 40
+. 83 81 00 24 83 41 00 08 7F 88 03 A6 83 61 00 0C 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1841 (0xFE8DE60) approx BBs exec'd 0 ====
+
+ 0xFE8DE60: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE8DE64: 418600B4 bc 12,6,0xFE8DF18
+ 4: Js06o $0xFE8DF18
+
+
+
+. 1841 FE8DE60 8
+. 2C 83 00 00 41 86 00 B4
+==== BB 1842 (0xFE8DE68) approx BBs exec'd 0 ====
+
+ 0xFE8DE68: 419200F8 bc 12,18,0xFE8DF60
+ 0: Js18o $0xFE8DF60
+
+
+
+. 1842 FE8DE68 4
+. 41 92 00 F8
+==== BB 1843 (0xFE8DF60) approx BBs exec'd 0 ====
+
+ 0xFE8DF60: 7C671B78 or r7,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0xFE8DF64: 4BFFFF18 b 0xFE8DE7C
+ 3: JMPo $0xFE8DE7C ($4)
+
+
+
+. 1843 FE8DF60 8
+. 7C 67 1B 78 4B FF FF 18
+==== BB 1844 (0xFE8DE7C) approx BBs exec'd 0 ====
+
+ 0xFE8DE7C: 38A00000 li r5,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFE8DE80: 7E05E840 cmpl cr4,r5,r29
+ 3: GETL R5, t2
+ 4: GETL R29, t4
+ 5: CMPUL t2, t4, t6 (-rSo)
+ 6: ICRFL t6, $0x4, CR
+ 7: INCEIPL $4
+
+ 0xFE8DE84: 4090008C bc 4,16,0xFE8DF10
+ 8: Jc16o $0xFE8DF10
+
+
+
+. 1844 FE8DE7C 12
+. 38 A0 00 00 7E 05 E8 40 40 90 00 8C
+==== BB 1845 (0xFE8DE88) approx BBs exec'd 0 ====
+
+ 0xFE8DE88: 839E1CF8 lwz r28,7416(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1CF8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFE8DE8C: 815E1D50 lwz r10,7504(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1D50, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0xFE8DE90: 811E1B80 lwz r8,7040(r30)
+ 10: GETL R30, t8
+ 11: ADDL $0x1B80, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R8
+ 14: INCEIPL $4
+
+ 0xFE8DE94: 7FA903A6 mtctr r29
+ 15: GETL R29, t12
+ 16: PUTL t12, CTR
+ 17: INCEIPL $4
+
+ 0xFE8DE98: 7CDC1214 add r6,r28,r2
+ 18: GETL R28, t14
+ 19: GETL R2, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R6
+ 22: INCEIPL $4
+
+ 0xFE8DE9C: 7D881214 add r12,r8,r2
+ 23: GETL R8, t18
+ 24: GETL R2, t20
+ 25: ADDL t18, t20
+ 26: PUTL t20, R12
+ 27: INCEIPL $4
+
+ 0xFE8DEA0: 7F8A1214 add r28,r10,r2
+ 28: GETL R10, t22
+ 29: GETL R2, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R28
+ 32: INCEIPL $4
+
+ 0xFE8DEA4: 48000028 b 0xFE8DECC
+ 33: JMPo $0xFE8DECC ($4)
+
+
+
+. 1845 FE8DE88 32
+. 83 9E 1C F8 81 5E 1D 50 81 1E 1B 80 7F A9 03 A6 7C DC 12 14 7D 88 12 14 7F 8A 12 14 48 00 00 28
+==== BB 1846 (0xFE8DECC) approx BBs exec'd 0 ====
+
+ 0xFE8DECC: 83A60000 lwz r29,0(r6)
+ 0: GETL R6, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0xFE8DED0: 7CE43B78 or r4,r7,r7
+ 4: GETL R7, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0xFE8DED4: 2F1D0000 cmpi cr6,r29,0
+ 7: GETL R29, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x6, CR
+ 10: INCEIPL $4
+
+ 0xFE8DED8: 419A00B4 bc 12,26,0xFE8DF8C
+ 11: Js26o $0xFE8DF8C
+
+
+
+. 1846 FE8DECC 16
+. 83 A6 00 00 7C E4 3B 78 2F 1D 00 00 41 9A 00 B4
+==== BB 1847 (0xFE8DEDC) approx BBs exec'd 0 ====
+
+ 0xFE8DEDC: 7D1F28AE lbzx r8,r31,r5
+ 0: GETL R5, t0
+ 1: GETL R31, t2
+ 2: ADDL t2, t0
+ 3: LDB (t0), t4
+ 4: PUTL t4, R8
+ 5: INCEIPL $4
+
+ 0xFE8DEE0: 81460000 lwz r10,0(r6)
+ 6: GETL R6, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R10
+ 9: INCEIPL $4
+
+ 0xFE8DEE4: 550B083C rlwinm r11,r8,1,0,30
+ 10: GETL R8, t10
+ 11: SHLL $0x1, t10
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0xFE8DEE8: 3BA8FFD0 addi r29,r8,-48
+ 14: GETL R8, t12
+ 15: ADDL $0xFFFFFFD0, t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0xFE8DEEC: 7C0B522E lhzx r0,r11,r10
+ 18: GETL R10, t14
+ 19: GETL R11, t16
+ 20: ADDL t16, t14
+ 21: LDW (t14), t18
+ 22: PUTL t18, R0
+ 23: INCEIPL $4
+
+ 0xFE8DEF0: 2B9D0009 cmpli cr7,r29,9
+ 24: GETL R29, t20
+ 25: MOVL $0x9, t24
+ 26: CMPUL t20, t24, t22 (-rSo)
+ 27: ICRFL t22, $0x7, CR
+ 28: INCEIPL $4
+
+ 0xFE8DEF4: 700B0004 andi. r11,r0,0x4
+ 29: GETL R0, t26
+ 30: ANDL $0x4, t26
+ 31: PUTL t26, R11
+ 32: CMP0L t26, t28 (-rSo)
+ 33: ICRFL t28, $0x0, CR
+ 34: INCEIPL $4
+
+ 0xFE8DEF8: 40A2FFB0 bc 5,2,0xFE8DEA8
+ 35: Jc02o $0xFE8DEA8
+
+
+
+. 1847 FE8DEDC 32
+. 7D 1F 28 AE 81 46 00 00 55 0B 08 3C 3B A8 FF D0 7C 0B 52 2E 2B 9D 00 09 70 0B 00 04 40 A2 FF B0
+==== BB 1848 (0xFE8DEA8) approx BBs exec'd 0 ====
+
+ 0xFE8DEA8: 814C0000 lwz r10,0(r12)
+ 0: GETL R12, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFE8DEAC: 38E70001 addi r7,r7,1
+ 4: GETL R7, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0xFE8DEB0: 2F8A0000 cmpi cr7,r10,0
+ 8: GETL R10, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFE8DEB4: 419E00F0 bc 12,30,0xFE8DFA4
+ 12: Js30o $0xFE8DFA4
+
+
+
+. 1848 FE8DEA8 16
+. 81 4C 00 00 38 E7 00 01 2F 8A 00 00 41 9E 00 F0
+==== BB 1849 (0xFE8DEB8) approx BBs exec'd 0 ====
+
+ 0xFE8DEB8: 550B103A rlwinm r11,r8,2,0,29
+ 0: GETL R8, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFE8DEBC: 7C0B502E lwzx r0,r11,r10
+ 4: GETL R10, t2
+ 5: GETL R11, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFE8DEC0: 98040000 stb r0,0(r4)
+ 10: GETL R0, t8
+ 11: GETL R4, t10
+ 12: STB t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFE8DEC4: 38A50001 addi r5,r5,1
+ 14: GETL R5, t12
+ 15: ADDL $0x1, t12
+ 16: PUTL t12, R5
+ 17: INCEIPL $4
+
+ 0xFE8DEC8: 42400048 bc 18,0,0xFE8DF10
+ 18: GETL CTR, t14
+ 19: ADDL $0xFFFFFFFF, t14
+ 20: PUTL t14, CTR
+ 21: SETZL t14, NoValue
+ 22: JIFZL t14, $0xFE8DECC
+ 23: JMPo $0xFE8DF10 ($4)
+
+
+
+. 1849 FE8DEB8 20
+. 55 0B 10 3A 7C 0B 50 2E 98 04 00 00 38 A5 00 01 42 40 00 48
+==== BB 1850 (0xFE8DEFC) approx BBs exec'd 0 ====
+
+ 0xFE8DEFC: 41BDFFC8 bc 13,29,0xFE8DEC4
+ 0: Js29o $0xFE8DEC4
+
+
+
+. 1850 FE8DEFC 4
+. 41 BD FF C8
+==== BB 1851 (0xFE8DEC4) approx BBs exec'd 0 ====
+
+ 0xFE8DEC4: 38A50001 addi r5,r5,1
+ 0: GETL R5, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0xFE8DEC8: 42400048 bc 18,0,0xFE8DF10
+ 4: GETL CTR, t2
+ 5: ADDL $0xFFFFFFFF, t2
+ 6: PUTL t2, CTR
+ 7: SETZL t2, NoValue
+ 8: JIFZL t2, $0xFE8DECC
+ 9: JMPo $0xFE8DF10 ($4)
+
+
+
+. 1851 FE8DEC4 8
+. 38 A5 00 01 42 40 00 48
+==== BB 1852 (0xFE8DF00) approx BBs exec'd 0 ====
+
+ 0xFE8DF00: 99070000 stb r8,0(r7)
+ 0: GETL R8, t0
+ 1: GETL R7, t2
+ 2: STB t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE8DF04: 38A50001 addi r5,r5,1
+ 4: GETL R5, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFE8DF08: 38E70001 addi r7,r7,1
+ 8: GETL R7, t6
+ 9: ADDL $0x1, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0xFE8DF0C: 4200FFC0 bc 16,0,0xFE8DECC
+ 12: GETL CTR, t8
+ 13: ADDL $0xFFFFFFFF, t8
+ 14: PUTL t8, CTR
+ 15: JIFZL t8, $0xFE8DF10
+ 16: JMPo $0xFE8DECC ($4)
+
+
+
+. 1852 FE8DF00 16
+. 99 07 00 00 38 A5 00 01 38 E7 00 01 42 00 FF C0
+==== BB 1853 (0xFE8DF10) approx BBs exec'd 0 ====
+
+ 0xFE8DF10: 38C00000 li r6,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0xFE8DF14: 98C70000 stb r6,0(r7)
+ 3: GETL R6, t2
+ 4: GETL R7, t4
+ 5: STB t2, (t4)
+ 6: INCEIPL $4
+
+ 0xFE8DF18: 83E10024 lwz r31,36(r1)
+ 7: GETL R1, t6
+ 8: ADDL $0x24, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R31
+ 11: INCEIPL $4
+
+ 0xFE8DF1C: 80E1000C lwz r7,12(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0xC, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R7
+ 16: INCEIPL $4
+
+ 0xFE8DF20: 7FE803A6 mtlr r31
+ 17: GETL R31, t14
+ 18: PUTL t14, LR
+ 19: INCEIPL $4
+
+ 0xFE8DF24: 83810010 lwz r28,16(r1)
+ 20: GETL R1, t16
+ 21: ADDL $0x10, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R28
+ 24: INCEIPL $4
+
+ 0xFE8DF28: 83A10014 lwz r29,20(r1)
+ 25: GETL R1, t20
+ 26: ADDL $0x14, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R29
+ 29: INCEIPL $4
+
+ 0xFE8DF2C: 7CE08120 mtcrf 0x8,r7
+ 30: GETL R7, t24
+ 31: ICRFL t24, $0x4, CR
+ 32: INCEIPL $4
+
+ 0xFE8DF30: 83C10018 lwz r30,24(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x18, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R30
+ 37: INCEIPL $4
+
+ 0xFE8DF34: 83E1001C lwz r31,28(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x1C, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R31
+ 42: INCEIPL $4
+
+ 0xFE8DF38: 38210020 addi r1,r1,32
+ 43: GETL R1, t34
+ 44: ADDL $0x20, t34
+ 45: PUTL t34, R1
+ 46: INCEIPL $4
+
+ 0xFE8DF3C: 4E800020 blr
+ 47: GETL LR, t36
+ 48: JMPo-r t36 ($4)
+
+
+
+. 1853 FE8DF10 48
+. 38 C0 00 00 98 C7 00 00 83 E1 00 24 80 E1 00 0C 7F E8 03 A6 83 81 00 10 83 A1 00 14 7C E0 81 20 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1854 (0xFE88280) approx BBs exec'd 0 ====
+
+ 0xFE88280: 39200000 li r9,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0xFE88284: 7C7A1B79 or. r26,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R26
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFE88288: 41A2FB70 bc 13,2,0xFE87DF8
+ 8: Js02o $0xFE87DF8
+
+
+
+. 1854 FE88280 12
+. 39 20 00 00 7C 7A 1B 79 41 A2 FB 70
+==== BB 1855 (0xFE8828C) approx BBs exec'd 0 ====
+
+ 0xFE8828C: 7F64DB78 or r4,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE88290: 7FA5EB78 or r5,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFE88294: 4804EACD bl 0xFED6D60
+ 6: MOVL $0xFE88298, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED6D60 ($4)
+
+
+
+. 1855 FE8828C 12
+. 7F 64 DB 78 7F A5 EB 78 48 04 EA CD
+==== BB 1856 (0xFE88298) approx BBs exec'd 0 ====
+
+ 0xFE88298: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE8829C: 40860010 bc 4,6,0xFE882AC
+ 4: Jc06o $0xFE882AC
+
+
+
+. 1856 FE88298 8
+. 2C 83 00 00 40 86 00 10
+==== BB 1857 (0xFE882AC) approx BBs exec'd 0 ====
+
+ 0xFE882AC: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE882B0: 4804E829 bl 0xFED6AD8
+ 3: MOVL $0xFE882B4, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 1857 FE882AC 8
+. 7F 43 D3 78 48 04 E8 29
+==== BB 1858 (0xFE882B4) approx BBs exec'd 0 ====
+
+ 0xFE882B4: 7C7C1B78 or r28,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0xFE882B8: 7F23CB78 or r3,r25,r25
+ 3: GETL R25, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFE882BC: 4804E81D bl 0xFED6AD8
+ 6: MOVL $0xFE882C0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 1858 FE882B4 12
+. 7C 7C 1B 78 7F 23 CB 78 48 04 E8 1D
+==== BB 1859 (0xFE882C0) approx BBs exec'd 0 ====
+
+ 0xFE882C0: 7CB7D850 subf r5,r23,r27
+ 0: GETL R23, t0
+ 1: GETL R27, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFE882C4: 7E05E214 add r16,r5,r28
+ 5: GETL R5, t4
+ 6: GETL R28, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R16
+ 9: INCEIPL $4
+
+ 0xFE882C8: 3B630001 addi r27,r3,1
+ 10: GETL R3, t8
+ 11: ADDL $0x1, t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0xFE882CC: 7D70DA14 add r11,r16,r27
+ 14: GETL R16, t10
+ 15: GETL R27, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R11
+ 18: INCEIPL $4
+
+ 0xFE882D0: 80E10000 lwz r7,0(r1)
+ 19: GETL R1, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R7
+ 22: INCEIPL $4
+
+ 0xFE882D4: 394B001E addi r10,r11,30
+ 23: GETL R11, t18
+ 24: ADDL $0x1E, t18
+ 25: PUTL t18, R10
+ 26: INCEIPL $4
+
+ 0xFE882D8: 55480036 rlwinm r8,r10,0,0,27
+ 27: GETL R10, t20
+ 28: ANDL $0xFFFFFFF0, t20
+ 29: PUTL t20, R8
+ 30: INCEIPL $4
+
+ 0xFE882DC: 7CC800D0 neg r6,r8
+ 31: GETL R8, t22
+ 32: NEGL t22
+ 33: PUTL t22, R6
+ 34: INCEIPL $4
+
+ 0xFE882E0: 7CE1316E stwux r7,r1,r6
+ 35: GETL R6, t24
+ 36: GETL R1, t26
+ 37: ADDL t26, t24
+ 38: PUTL t24, R1
+ 39: GETL R7, t28
+ 40: STL t28, (t24)
+ 41: INCEIPL $4
+
+ 0xFE882E4: 38810017 addi r4,r1,23
+ 42: GETL R1, t30
+ 43: ADDL $0x17, t30
+ 44: PUTL t30, R4
+ 45: INCEIPL $4
+
+ 0xFE882E8: 549D0036 rlwinm r29,r4,0,0,27
+ 46: GETL R4, t32
+ 47: ANDL $0xFFFFFFF0, t32
+ 48: PUTL t32, R29
+ 49: INCEIPL $4
+
+ 0xFE882EC: 7EE4BB78 or r4,r23,r23
+ 50: GETL R23, t34
+ 51: PUTL t34, R4
+ 52: INCEIPL $4
+
+ 0xFE882F0: 7FA3EB78 or r3,r29,r29
+ 53: GETL R29, t36
+ 54: PUTL t36, R3
+ 55: INCEIPL $4
+
+ 0xFE882F4: 7FB7EB78 or r23,r29,r29
+ 56: GETL R29, t38
+ 57: PUTL t38, R23
+ 58: INCEIPL $4
+
+ 0xFE882F8: 4804FD09 bl 0xFED8000
+ 59: MOVL $0xFE882FC, t40
+ 60: PUTL t40, LR
+ 61: JMPo-c $0xFED8000 ($4)
+
+
+
+. 1859 FE882C0 60
+. 7C B7 D8 50 7E 05 E2 14 3B 63 00 01 7D 70 DA 14 80 E1 00 00 39 4B 00 1E 55 48 00 36 7C C8 00 D0 7C E1 31 6E 38 81 00 17 54 9D 00 36 7E E4 BB 78 7F A3 EB 78 7F B7 EB 78 48 04 FD 09
+==== BB 1860 mempcpy(0xFED8000) approx BBs exec'd 0 ====
+
+ 0xFED8000: 2B85000F cmpli cr7,r5,15
+ 0: GETL R5, t0
+ 1: MOVL $0xF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFED8004: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xFED8008: 9421FFE0 stwu r1,-32(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFFE0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFED800C: 93A10014 stw r29,20(r1)
+ 14: GETL R29, t12
+ 15: GETL R1, t14
+ 16: ADDL $0x14, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0xFED8010: 7C7D1B78 or r29,r3,r3
+ 19: GETL R3, t16
+ 20: PUTL t16, R29
+ 21: INCEIPL $4
+
+ 0xFED8014: 93E1001C stw r31,28(r1)
+ 22: GETL R31, t18
+ 23: GETL R1, t20
+ 24: ADDL $0x1C, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0xFED8018: 7C9F2378 or r31,r4,r4
+ 27: GETL R4, t22
+ 28: PUTL t22, R31
+ 29: INCEIPL $4
+
+ 0xFED801C: 93810010 stw r28,16(r1)
+ 30: GETL R28, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x10, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0xFED8020: 93C10018 stw r30,24(r1)
+ 35: GETL R30, t28
+ 36: GETL R1, t30
+ 37: ADDL $0x18, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0xFED8024: 90010024 stw r0,36(r1)
+ 40: GETL R0, t32
+ 41: GETL R1, t34
+ 42: ADDL $0x24, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0xFED8028: 409D0058 bc 4,29,0xFED8080
+ 45: Jc29o $0xFED8080
+
+
+
+. 1860 FED8000 44
+. 2B 85 00 0F 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 E1 00 1C 7C 9F 23 78 93 81 00 10 93 C1 00 18 90 01 00 24 40 9D 00 58
+==== BB 1861 (0xFED8080) approx BBs exec'd 0 ====
+
+ 0xFED8080: 2C850000 cmpi cr1,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFED8084: 4186001C bc 12,6,0xFED80A0
+ 4: Js06o $0xFED80A0
+
+
+
+. 1861 FED8080 8
+. 2C 85 00 00 41 86 00 1C
+==== BB 1862 (0xFED8088) approx BBs exec'd 0 ====
+
+ 0xFED8088: 7CA903A6 mtctr r5
+ 0: GETL R5, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0xFED808C: 88FF0000 lbz r7,0(r31)
+ 3: GETL R31, t2
+ 4: LDB (t2), t4
+ 5: PUTL t4, R7
+ 6: INCEIPL $4
+
+ 0xFED8090: 3BFF0001 addi r31,r31,1
+ 7: GETL R31, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R31
+ 10: INCEIPL $4
+
+ 0xFED8094: 98FD0000 stb r7,0(r29)
+ 11: GETL R7, t8
+ 12: GETL R29, t10
+ 13: STB t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFED8098: 3BBD0001 addi r29,r29,1
+ 15: GETL R29, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0xFED809C: 4200FFF0 bc 16,0,0xFED808C
+ 19: GETL CTR, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, CTR
+ 22: JIFZL t14, $0xFED80A0
+ 23: JMPo $0xFED808C ($4)
+
+
+
+. 1862 FED8088 24
+. 7C A9 03 A6 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
+==== BB 1863 (0xFED808C) approx BBs exec'd 0 ====
+
+ 0xFED808C: 88FF0000 lbz r7,0(r31)
+ 0: GETL R31, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0xFED8090: 3BFF0001 addi r31,r31,1
+ 4: GETL R31, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0xFED8094: 98FD0000 stb r7,0(r29)
+ 8: GETL R7, t6
+ 9: GETL R29, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFED8098: 3BBD0001 addi r29,r29,1
+ 12: GETL R29, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0xFED809C: 4200FFF0 bc 16,0,0xFED808C
+ 16: GETL CTR, t12
+ 17: ADDL $0xFFFFFFFF, t12
+ 18: PUTL t12, CTR
+ 19: JIFZL t12, $0xFED80A0
+ 20: JMPo $0xFED808C ($4)
+
+
+
+. 1863 FED808C 20
+. 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
+==== BB 1864 (0xFED80A0) approx BBs exec'd 0 ====
+
+ 0xFED80A0: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFED80A4: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED80A8: 83810010 lwz r28,16(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0xFED80AC: 83A10014 lwz r29,20(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x14, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0xFED80B0: 7D0803A6 mtlr r8
+ 18: GETL R8, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFED80B4: 83C10018 lwz r30,24(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x18, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R30
+ 25: INCEIPL $4
+
+ 0xFED80B8: 83E1001C lwz r31,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0xFED80BC: 38210020 addi r1,r1,32
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0xFED80C0: 4E800020 blr
+ 35: GETL LR, t26
+ 36: JMPo-r t26 ($4)
+
+
+
+. 1864 FED80A0 36
+. 81 01 00 24 7F A3 EB 78 83 81 00 10 83 A1 00 14 7D 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1865 (0xFE882FC) approx BBs exec'd 0 ====
+
+ 0xFE882FC: 7F44D378 or r4,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE88300: 7F85E378 or r5,r28,r28
+ 3: GETL R28, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFE88304: 4804FCFD bl 0xFED8000
+ 6: MOVL $0xFE88308, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED8000 ($4)
+
+
+
+. 1865 FE882FC 12
+. 7F 44 D3 78 7F 85 E3 78 48 04 FC FD
+==== BB 1866 (0xFE88308) approx BBs exec'd 0 ====
+
+ 0xFE88308: 7F24CB78 or r4,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE8830C: 7F65DB78 or r5,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFE88310: 480503C9 bl 0xFED86D8
+ 6: MOVL $0xFE88314, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 1866 FE88308 12
+. 7F 24 CB 78 7F 65 DB 78 48 05 03 C9
+==== BB 1867 memcpy(0xFED86D8) approx BBs exec'd 0 ====
+
+ 0xFED86D8: 2B85000F cmpli cr7,r5,15
+ 0: GETL R5, t0
+ 1: MOVL $0xF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFED86DC: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xFED86E0: 9421FFE0 stwu r1,-32(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFFE0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFED86E4: 9361000C stw r27,12(r1)
+ 14: GETL R27, t12
+ 15: GETL R1, t14
+ 16: ADDL $0xC, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0xFED86E8: 7C7B1B78 or r27,r3,r3
+ 19: GETL R3, t16
+ 20: PUTL t16, R27
+ 21: INCEIPL $4
+
+ 0xFED86EC: 93A10014 stw r29,20(r1)
+ 22: GETL R29, t18
+ 23: GETL R1, t20
+ 24: ADDL $0x14, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0xFED86F0: 7C9D2378 or r29,r4,r4
+ 27: GETL R4, t22
+ 28: PUTL t22, R29
+ 29: INCEIPL $4
+
+ 0xFED86F4: 93E1001C stw r31,28(r1)
+ 30: GETL R31, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x1C, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0xFED86F8: 7C7F1B78 or r31,r3,r3
+ 35: GETL R3, t28
+ 36: PUTL t28, R31
+ 37: INCEIPL $4
+
+ 0xFED86FC: 93810010 stw r28,16(r1)
+ 38: GETL R28, t30
+ 39: GETL R1, t32
+ 40: ADDL $0x10, t32
+ 41: STL t30, (t32)
+ 42: INCEIPL $4
+
+ 0xFED8700: 93C10018 stw r30,24(r1)
+ 43: GETL R30, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x18, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0xFED8704: 90010024 stw r0,36(r1)
+ 48: GETL R0, t38
+ 49: GETL R1, t40
+ 50: ADDL $0x24, t40
+ 51: STL t38, (t40)
+ 52: INCEIPL $4
+
+ 0xFED8708: 409D0058 bc 4,29,0xFED8760
+ 53: Jc29o $0xFED8760
+
+
+
+. 1867 FED86D8 52
+. 2B 85 00 0F 7C 08 02 A6 94 21 FF E0 93 61 00 0C 7C 7B 1B 78 93 A1 00 14 7C 9D 23 78 93 E1 00 1C 7C 7F 1B 78 93 81 00 10 93 C1 00 18 90 01 00 24 40 9D 00 58
+==== BB 1868 (0xFED8760) approx BBs exec'd 0 ====
+
+ 0xFED8760: 2C850000 cmpi cr1,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFED8764: 4186001C bc 12,6,0xFED8780
+ 4: Js06o $0xFED8780
+
+
+
+. 1868 FED8760 8
+. 2C 85 00 00 41 86 00 1C
+==== BB 1869 (0xFED8768) approx BBs exec'd 0 ====
+
+ 0xFED8768: 7CA903A6 mtctr r5
+ 0: GETL R5, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0xFED876C: 88FD0000 lbz r7,0(r29)
+ 3: GETL R29, t2
+ 4: LDB (t2), t4
+ 5: PUTL t4, R7
+ 6: INCEIPL $4
+
+ 0xFED8770: 3BBD0001 addi r29,r29,1
+ 7: GETL R29, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R29
+ 10: INCEIPL $4
+
+ 0xFED8774: 98FF0000 stb r7,0(r31)
+ 11: GETL R7, t8
+ 12: GETL R31, t10
+ 13: STB t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFED8778: 3BFF0001 addi r31,r31,1
+ 15: GETL R31, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R31
+ 18: INCEIPL $4
+
+ 0xFED877C: 4200FFF0 bc 16,0,0xFED876C
+ 19: GETL CTR, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, CTR
+ 22: JIFZL t14, $0xFED8780
+ 23: JMPo $0xFED876C ($4)
+
+
+
+. 1869 FED8768 24
+. 7C A9 03 A6 88 FD 00 00 3B BD 00 01 98 FF 00 00 3B FF 00 01 42 00 FF F0
+==== BB 1870 (0xFED8780) approx BBs exec'd 0 ====
+
+ 0xFED8780: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFED8784: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED8788: 83810010 lwz r28,16(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0xFED878C: 8361000C lwz r27,12(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0xC, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R27
+ 17: INCEIPL $4
+
+ 0xFED8790: 7D0803A6 mtlr r8
+ 18: GETL R8, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFED8794: 83A10014 lwz r29,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0xFED8798: 83C10018 lwz r30,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0xFED879C: 83E1001C lwz r31,28(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x1C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R31
+ 35: INCEIPL $4
+
+ 0xFED87A0: 38210020 addi r1,r1,32
+ 36: GETL R1, t28
+ 37: ADDL $0x20, t28
+ 38: PUTL t28, R1
+ 39: INCEIPL $4
+
+ 0xFED87A4: 4E800020 blr
+ 40: GETL LR, t30
+ 41: JMPo-r t30 ($4)
+
+
+
+. 1870 FED8780 40
+. 81 01 00 24 7F 63 DB 78 83 81 00 10 83 61 00 0C 7D 08 03 A6 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1871 (0xFE88314) approx BBs exec'd 0 ====
+
+ 0xFE88314: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE88318: 48122019 bl 0xFFAA330
+ 3: MOVL $0xFE8831C, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFFAA330 ($4)
+
+
+
+. 1871 FE88314 8
+. 7F 43 D3 78 48 12 20 19
+==== BB 1872 (0xFFAA330) approx BBs exec'd 0 ====
+
+ 0xFFAA330: 4BF25160 b 0xFECF490
+ 0: JMPo $0xFECF490 ($4)
+
+
+
+. 1872 FFAA330 4
+. 4B F2 51 60
+==== BB 1873 free(0xFECF490) approx BBs exec'd 0 ====
+
+ 0xFECF490: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFECF494: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFECF498: 480D89B9 bl 0xFFA7E50
+ 9: MOVL $0xFECF49C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1873 FECF490 12
+. 94 21 FF E0 7C 08 02 A6 48 0D 89 B9
+==== BB 1874 (0xFECF49C) approx BBs exec'd 0 ====
+
+ 0xFECF49C: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECF4A0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFECF4A4: 93810010 stw r28,16(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFECF4A8: 90010024 stw r0,36(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFECF4AC: 7C7C1B78 or r28,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0xFECF4B0: 93A10014 stw r29,20(r1)
+ 21: GETL R29, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFECF4B4: 813E1D88 lwz r9,7560(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x1D88, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R9
+ 30: INCEIPL $4
+
+ 0xFECF4B8: 93E1001C stw r31,28(r1)
+ 31: GETL R31, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x1C, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFECF4BC: 80090000 lwz r0,0(r9)
+ 36: GETL R9, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R0
+ 39: INCEIPL $4
+
+ 0xFECF4C0: 2F800000 cmpi cr7,r0,0
+ 40: GETL R0, t32
+ 41: CMP0L t32, t34 (-rSo)
+ 42: ICRFL t34, $0x7, CR
+ 43: INCEIPL $4
+
+ 0xFECF4C4: 419E0034 bc 12,30,0xFECF4F8
+ 44: Js30o $0xFECF4F8
+
+
+
+. 1874 FECF49C 44
+. 93 C1 00 18 7F C8 02 A6 93 81 00 10 90 01 00 24 7C 7C 1B 78 93 A1 00 14 81 3E 1D 88 93 E1 00 1C 80 09 00 00 2F 80 00 00 41 9E 00 34
+==== BB 1875 (0xFECF4F8) approx BBs exec'd 0 ====
+
+ 0xFECF4F8: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFECF4FC: 41A2FFDC bc 13,2,0xFECF4D8
+ 4: Js02o $0xFECF4D8
+
+
+
+. 1875 FECF4F8 8
+. 2C 03 00 00 41 A2 FF DC
+==== BB 1876 (0xFECF500) approx BBs exec'd 0 ====
+
+ 0xFECF500: 3903FFF8 addi r8,r3,-8
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFF8, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0xFECF504: 80880004 lwz r4,4(r8)
+ 4: GETL R8, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFECF508: 70800002 andi. r0,r4,0x2
+ 9: GETL R4, t6
+ 10: ANDL $0x2, t6
+ 11: PUTL t6, R0
+ 12: CMP0L t6, t8 (-rSo)
+ 13: ICRFL t8, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFECF50C: 40820088 bc 4,2,0xFECF594
+ 15: Jc02o $0xFECF594
+
+
+
+. 1876 FECF500 16
+. 39 03 FF F8 80 88 00 04 70 80 00 02 40 82 00 88
+==== BB 1877 (0xFECF510) approx BBs exec'd 0 ====
+
+ 0xFECF510: 70800004 andi. r0,r4,0x4
+ 0: GETL R4, t0
+ 1: ANDL $0x4, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECF514: 83FE05FC lwz r31,1532(r30)
+ 6: GETL R30, t4
+ 7: ADDL $0x5FC, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R31
+ 10: INCEIPL $4
+
+ 0xFECF518: 40820070 bc 4,2,0xFECF588
+ 11: Jc02o $0xFECF588
+
+
+
+. 1877 FECF510 12
+. 70 80 00 04 83 FE 05 FC 40 82 00 70
+==== BB 1878 (0xFECF51C) approx BBs exec'd 0 ====
+
+ 0xFECF51C: 3BA00000 li r29,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFECF520: 38000001 li r0,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xFECF524: 7D00F828 lwarx r8,r0,r31
+ 6: GETL R31, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R8
+ 10: INCEIPL $4
+
+ 0xFECF528: 7C08E800 cmp cr0,r8,r29
+ 11: GETL R8, t8
+ 12: GETL R29, t10
+ 13: CMPL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFECF52C: 4082000C bc 4,2,0xFECF538
+ 16: Jc02o $0xFECF538
+
+
+
+. 1878 FECF51C 20
+. 3B A0 00 00 38 00 00 01 7D 00 F8 28 7C 08 E8 00 40 82 00 0C
+==== BB 1879 (0xFECF530) approx BBs exec'd 0 ====
+
+ 0xFECF530: 7C00F92D stwcx. r0,r0,r31
+ 0: GETL R31, t0
+ 1: GETL R0, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECF534: 40A2FFF0 bc 5,2,0xFECF524
+ 6: Jc02o $0xFECF524
+
+
+
+. 1879 FECF530 8
+. 7C 00 F9 2D 40 A2 FF F0
+==== BB 1880 (0xFECF524) approx BBs exec'd 0 ====
+
+ 0xFECF524: 7D00F828 lwarx r8,r0,r31
+ 0: GETL R31, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFECF528: 7C08E800 cmp cr0,r8,r29
+ 5: GETL R8, t4
+ 6: GETL R29, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECF52C: 4082000C bc 4,2,0xFECF538
+ 10: Jc02o $0xFECF538
+
+
+
+. 1880 FECF524 12
+. 7D 00 F8 28 7C 08 E8 00 40 82 00 0C
+==== BB 1881 (0xFECF538) approx BBs exec'd 0 ====
+
+ 0xFECF538: 4C00012C 0: INCEIPL $4
+
+ 0xFECF53C: 2C880000 cmpi cr1,r8,0
+ 1: GETL R8, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFECF540: 40860090 bc 4,6,0xFECF5D0
+ 5: Jc06o $0xFECF5D0
+
+
+
+. 1881 FECF538 12
+. 4C 00 01 2C 2C 88 00 00 40 86 00 90
+==== BB 1882 (0xFECF544) approx BBs exec'd 0 ====
+
+ 0xFECF544: 7F84E378 or r4,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFECF548: 7FE3FB78 or r3,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFECF54C: 4BFFF64D bl 0xFECEB98
+ 6: MOVL $0xFECF550, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFECEB98 ($4)
+
+
+
+. 1882 FECF544 12
+. 7F 84 E3 78 7F E3 FB 78 4B FF F6 4D
+==== BB 1883 _int_free(0xFECEB98) approx BBs exec'd 0 ====
+
+ 0xFECEB98: 7CA802A6 mflr r5
+ 0: GETL LR, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFECEB9C: 9421FFA0 stwu r1,-96(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFA0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECEBA0: 93E1005C stw r31,92(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x5C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECEBA4: 3BE4FFF8 addi r31,r4,-8
+ 14: GETL R4, t10
+ 15: ADDL $0xFFFFFFF8, t10
+ 16: PUTL t10, R31
+ 17: INCEIPL $4
+
+ 0xFECEBA8: 93A10054 stw r29,84(r1)
+ 18: GETL R29, t12
+ 19: GETL R1, t14
+ 20: ADDL $0x54, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0xFECEBAC: 480D92A5 bl 0xFFA7E50
+ 23: MOVL $0xFECEBB0, t16
+ 24: PUTL t16, LR
+ 25: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1883 FECEB98 24
+. 7C A8 02 A6 94 21 FF A0 93 E1 00 5C 3B E4 FF F8 93 A1 00 54 48 0D 92 A5
+==== BB 1884 (0xFECEBB0) approx BBs exec'd 0 ====
+
+ 0xFECEBB0: 90A10064 stw r5,100(r1)
+ 0: GETL R5, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x64, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECEBB4: 813F0004 lwz r9,4(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFECEBB8: 93810050 stw r28,80(r1)
+ 10: GETL R28, t8
+ 11: GETL R1, t10
+ 12: ADDL $0x50, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFECEBBC: 7C7C1B78 or r28,r3,r3
+ 15: GETL R3, t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0xFECEBC0: 553D0038 rlwinm r29,r9,0,0,28
+ 18: GETL R9, t14
+ 19: ANDL $0xFFFFFFF8, t14
+ 20: PUTL t14, R29
+ 21: INCEIPL $4
+
+ 0xFECEBC4: 93C10058 stw r30,88(r1)
+ 22: GETL R30, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x58, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0xFECEBC8: 7C1D00D0 neg r0,r29
+ 27: GETL R29, t20
+ 28: NEGL t20
+ 29: PUTL t20, R0
+ 30: INCEIPL $4
+
+ 0xFECEBCC: 92210024 stw r17,36(r1)
+ 31: GETL R17, t22
+ 32: GETL R1, t24
+ 33: ADDL $0x24, t24
+ 34: STL t22, (t24)
+ 35: INCEIPL $4
+
+ 0xFECEBD0: 7F9F0040 cmpl cr7,r31,r0
+ 36: GETL R31, t26
+ 37: GETL R0, t28
+ 38: CMPUL t26, t28, t30 (-rSo)
+ 39: ICRFL t30, $0x7, CR
+ 40: INCEIPL $4
+
+ 0xFECEBD4: 92410028 stw r18,40(r1)
+ 41: GETL R18, t32
+ 42: GETL R1, t34
+ 43: ADDL $0x28, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0xFECEBD8: 9261002C stw r19,44(r1)
+ 46: GETL R19, t36
+ 47: GETL R1, t38
+ 48: ADDL $0x2C, t38
+ 49: STL t36, (t38)
+ 50: INCEIPL $4
+
+ 0xFECEBDC: 7FC802A6 mflr r30
+ 51: GETL LR, t40
+ 52: PUTL t40, R30
+ 53: INCEIPL $4
+
+ 0xFECEBE0: 92810030 stw r20,48(r1)
+ 54: GETL R20, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x30, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0xFECEBE4: 92A10034 stw r21,52(r1)
+ 59: GETL R21, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x34, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0xFECEBE8: 92C10038 stw r22,56(r1)
+ 64: GETL R22, t50
+ 65: GETL R1, t52
+ 66: ADDL $0x38, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0xFECEBEC: 92E1003C stw r23,60(r1)
+ 69: GETL R23, t54
+ 70: GETL R1, t56
+ 71: ADDL $0x3C, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0xFECEBF0: 93010040 stw r24,64(r1)
+ 74: GETL R24, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x40, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0xFECEBF4: 93210044 stw r25,68(r1)
+ 79: GETL R25, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x44, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0xFECEBF8: 93410048 stw r26,72(r1)
+ 84: GETL R26, t66
+ 85: GETL R1, t68
+ 86: ADDL $0x48, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0xFECEBFC: 9361004C stw r27,76(r1)
+ 89: GETL R27, t70
+ 90: GETL R1, t72
+ 91: ADDL $0x4C, t72
+ 92: STL t70, (t72)
+ 93: INCEIPL $4
+
+ 0xFECEC00: 419D02A0 bc 12,29,0xFECEEA0
+ 94: Js29o $0xFECEEA0
+
+
+
+. 1884 FECEBB0 84
+. 90 A1 00 64 81 3F 00 04 93 81 00 50 7C 7C 1B 78 55 3D 00 38 93 C1 00 58 7C 1D 00 D0 92 21 00 24 7F 9F 00 40 92 41 00 28 92 61 00 2C 7F C8 02 A6 92 81 00 30 92 A1 00 34 92 C1 00 38 92 E1 00 3C 93 01 00 40 93 21 00 44 93 41 00 48 93 61 00 4C 41 9D 02 A0
+==== BB 1885 (0xFECEC04) approx BBs exec'd 0 ====
+
+ 0xFECEC04: 73E00007 andi. r0,r31,0x7
+ 0: GETL R31, t0
+ 1: ANDL $0x7, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECEC08: 40820298 bc 4,2,0xFECEEA0
+ 6: Jc02o $0xFECEEA0
+
+
+
+. 1885 FECEC04 8
+. 73 E0 00 07 40 82 02 98
+==== BB 1886 (0xFECEC0C) approx BBs exec'd 0 ====
+
+ 0xFECEC0C: 81630004 lwz r11,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFECEC10: 7F0BE840 cmpl cr6,r11,r29
+ 5: GETL R11, t4
+ 6: GETL R29, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFECEC14: 409801DC bc 4,24,0xFECEDF0
+ 10: Jc24o $0xFECEDF0
+
+
+
+. 1886 FECEC0C 12
+. 81 63 00 04 7F 0B E8 40 40 98 01 DC
+==== BB 1887 (0xFECEDF0) approx BBs exec'd 0 ====
+
+ 0xFECEDF0: 7CDFEA14 add r6,r31,r29
+ 0: GETL R31, t0
+ 1: GETL R29, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFECEDF4: 81260004 lwz r9,4(r6)
+ 5: GETL R6, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFECEDF8: 2B890008 cmpli cr7,r9,8
+ 10: GETL R9, t8
+ 11: MOVL $0x8, t12
+ 12: CMPUL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFECEDFC: 409D0154 bc 4,29,0xFECEF50
+ 15: Jc29o $0xFECEF50
+
+
+
+. 1887 FECEDF0 16
+. 7C DF EA 14 81 26 00 04 2B 89 00 08 40 9D 01 54
+==== BB 1888 (0xFECEE00) approx BBs exec'd 0 ====
+
+ 0xFECEE00: 8103044C lwz r8,1100(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x44C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFECEE04: 552A0038 rlwinm r10,r9,0,0,28
+ 5: GETL R9, t4
+ 6: ANDL $0xFFFFFFF8, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0xFECEE08: 7C8A4040 cmpl cr1,r10,r8
+ 9: GETL R10, t6
+ 10: GETL R8, t8
+ 11: CMPUL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0xFECEE0C: 40840144 bc 4,4,0xFECEF50
+ 14: Jc04o $0xFECEF50
+
+
+
+. 1888 FECEE00 16
+. 81 03 04 4C 55 2A 00 38 7C 8A 40 40 40 84 01 44
+==== BB 1889 (0xFECEE10) approx BBs exec'd 0 ====
+
+ 0xFECEE10: 57AAF87A rlwinm r10,r29,31,1,29
+ 0: GETL R29, t0
+ 1: ROLL $0x1F, t0
+ 2: ANDL $0x7FFFFFFC, t0
+ 3: PUTL t0, R10
+ 4: INCEIPL $4
+
+ 0xFECEE14: 556C003C rlwinm r12,r11,0,0,30
+ 5: GETL R11, t2
+ 6: ANDL $0xFFFFFFFE, t2
+ 7: PUTL t2, R12
+ 8: INCEIPL $4
+
+ 0xFECEE18: 7D2A182E lwzx r9,r10,r3
+ 9: GETL R3, t4
+ 10: GETL R10, t6
+ 11: ADDL t6, t4
+ 12: LDL (t4), t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0xFECEE1C: 91830004 stw r12,4(r3)
+ 15: GETL R12, t10
+ 16: GETL R3, t12
+ 17: ADDL $0x4, t12
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0xFECEE20: 7C09F800 cmp cr0,r9,r31
+ 20: GETL R9, t14
+ 21: GETL R31, t16
+ 22: CMPL t14, t16, t18 (-rSo)
+ 23: ICRFL t18, $0x0, CR
+ 24: INCEIPL $4
+
+ 0xFECEE24: 837E0664 lwz r27,1636(r30)
+ 25: GETL R30, t20
+ 26: ADDL $0x664, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R27
+ 29: INCEIPL $4
+
+ 0xFECEE28: 4182005C bc 12,2,0xFECEE84
+ 30: Js02o $0xFECEE84
+
+
+
+. 1889 FECEE10 28
+. 57 AA F8 7A 55 6C 00 3C 7D 2A 18 2E 91 83 00 04 7C 09 F8 00 83 7E 06 64 41 82 00 5C
+==== BB 1890 (0xFECEE2C) approx BBs exec'd 0 ====
+
+ 0xFECEE2C: 913F0008 stw r9,8(r31)
+ 0: GETL R9, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECEE30: 7FEA192E stwx r31,r10,r3
+ 5: GETL R3, t4
+ 6: GETL R10, t6
+ 7: ADDL t6, t4
+ 8: GETL R31, t8
+ 9: STL t8, (t4)
+ 10: INCEIPL $4
+
+ 0xFECEE34: 83A10064 lwz r29,100(r1)
+ 11: GETL R1, t10
+ 12: ADDL $0x64, t10
+ 13: LDL (t10), t12
+ 14: PUTL t12, R29
+ 15: INCEIPL $4
+
+ 0xFECEE38: 82210024 lwz r17,36(r1)
+ 16: GETL R1, t14
+ 17: ADDL $0x24, t14
+ 18: LDL (t14), t16
+ 19: PUTL t16, R17
+ 20: INCEIPL $4
+
+ 0xFECEE3C: 7FA803A6 mtlr r29
+ 21: GETL R29, t18
+ 22: PUTL t18, LR
+ 23: INCEIPL $4
+
+ 0xFECEE40: 82410028 lwz r18,40(r1)
+ 24: GETL R1, t20
+ 25: ADDL $0x28, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R18
+ 28: INCEIPL $4
+
+ 0xFECEE44: 8261002C lwz r19,44(r1)
+ 29: GETL R1, t24
+ 30: ADDL $0x2C, t24
+ 31: LDL (t24), t26
+ 32: PUTL t26, R19
+ 33: INCEIPL $4
+
+ 0xFECEE48: 82810030 lwz r20,48(r1)
+ 34: GETL R1, t28
+ 35: ADDL $0x30, t28
+ 36: LDL (t28), t30
+ 37: PUTL t30, R20
+ 38: INCEIPL $4
+
+ 0xFECEE4C: 82A10034 lwz r21,52(r1)
+ 39: GETL R1, t32
+ 40: ADDL $0x34, t32
+ 41: LDL (t32), t34
+ 42: PUTL t34, R21
+ 43: INCEIPL $4
+
+ 0xFECEE50: 82C10038 lwz r22,56(r1)
+ 44: GETL R1, t36
+ 45: ADDL $0x38, t36
+ 46: LDL (t36), t38
+ 47: PUTL t38, R22
+ 48: INCEIPL $4
+
+ 0xFECEE54: 82E1003C lwz r23,60(r1)
+ 49: GETL R1, t40
+ 50: ADDL $0x3C, t40
+ 51: LDL (t40), t42
+ 52: PUTL t42, R23
+ 53: INCEIPL $4
+
+ 0xFECEE58: 83010040 lwz r24,64(r1)
+ 54: GETL R1, t44
+ 55: ADDL $0x40, t44
+ 56: LDL (t44), t46
+ 57: PUTL t46, R24
+ 58: INCEIPL $4
+
+ 0xFECEE5C: 83210044 lwz r25,68(r1)
+ 59: GETL R1, t48
+ 60: ADDL $0x44, t48
+ 61: LDL (t48), t50
+ 62: PUTL t50, R25
+ 63: INCEIPL $4
+
+ 0xFECEE60: 83410048 lwz r26,72(r1)
+ 64: GETL R1, t52
+ 65: ADDL $0x48, t52
+ 66: LDL (t52), t54
+ 67: PUTL t54, R26
+ 68: INCEIPL $4
+
+ 0xFECEE64: 8361004C lwz r27,76(r1)
+ 69: GETL R1, t56
+ 70: ADDL $0x4C, t56
+ 71: LDL (t56), t58
+ 72: PUTL t58, R27
+ 73: INCEIPL $4
+
+ 0xFECEE68: 83810050 lwz r28,80(r1)
+ 74: GETL R1, t60
+ 75: ADDL $0x50, t60
+ 76: LDL (t60), t62
+ 77: PUTL t62, R28
+ 78: INCEIPL $4
+
+ 0xFECEE6C: 83A10054 lwz r29,84(r1)
+ 79: GETL R1, t64
+ 80: ADDL $0x54, t64
+ 81: LDL (t64), t66
+ 82: PUTL t66, R29
+ 83: INCEIPL $4
+
+ 0xFECEE70: 83C10058 lwz r30,88(r1)
+ 84: GETL R1, t68
+ 85: ADDL $0x58, t68
+ 86: LDL (t68), t70
+ 87: PUTL t70, R30
+ 88: INCEIPL $4
+
+ 0xFECEE74: 83E1005C lwz r31,92(r1)
+ 89: GETL R1, t72
+ 90: ADDL $0x5C, t72
+ 91: LDL (t72), t74
+ 92: PUTL t74, R31
+ 93: INCEIPL $4
+
+ 0xFECEE78: 38210060 addi r1,r1,96
+ 94: GETL R1, t76
+ 95: ADDL $0x60, t76
+ 96: PUTL t76, R1
+ 97: INCEIPL $4
+
+ 0xFECEE7C: 4E800020 blr
+ 98: GETL LR, t78
+ 99: JMPo-r t78 ($4)
+
+
+
+. 1890 FECEE2C 84
+. 91 3F 00 08 7F EA 19 2E 83 A1 00 64 82 21 00 24 7F A8 03 A6 82 41 00 28 82 61 00 2C 82 81 00 30 82 A1 00 34 82 C1 00 38 82 E1 00 3C 83 01 00 40 83 21 00 44 83 41 00 48 83 61 00 4C 83 81 00 50 83 A1 00 54 83 C1 00 58 83 E1 00 5C 38 21 00 60 4E 80 00 20
+==== BB 1891 (0xFECF550) approx BBs exec'd 0 ====
+
+ 0xFECF550: 7C0004AC sync
+ 0: INCEIPL $4
+
+ 0xFECF554: 7F80F828 lwarx r28,r0,r31
+ 1: GETL R31, t0
+ 2: LOCKo
+ 3: LDL (t0), t2
+ 4: PUTL t2, R28
+ 5: INCEIPL $4
+
+ 0xFECF558: 7FA0F92D stwcx. r29,r0,r31
+ 6: GETL R31, t4
+ 7: GETL R29, t6
+ 8: LOCKo
+ 9: STL t6, (t4) (-rSo)
+ 10: ICRFL cr, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFECF55C: 40A2FFF8 bc 5,2,0xFECF554
+ 12: Jc02o $0xFECF554
+
+
+
+. 1891 FECF550 16
+. 7C 00 04 AC 7F 80 F8 28 7F A0 F9 2D 40 A2 FF F8
+==== BB 1892 (0xFECF560) approx BBs exec'd 0 ====
+
+ 0xFECF560: 2F1C0001 cmpi cr6,r28,1
+ 0: GETL R28, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFECF564: 4099FF74 bc 4,25,0xFECF4D8
+ 5: Jc25o $0xFECF4D8
+
+
+
+. 1892 FECF560 8
+. 2F 1C 00 01 40 99 FF 74
+==== BB 1893 (0xFECF4D8) approx BBs exec'd 0 ====
+
+ 0xFECF4D8: 80A10024 lwz r5,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFECF4DC: 83810010 lwz r28,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0xFECF4E0: 83A10014 lwz r29,20(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0xFECF4E4: 7CA803A6 mtlr r5
+ 15: GETL R5, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFECF4E8: 83C10018 lwz r30,24(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x18, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R30
+ 22: INCEIPL $4
+
+ 0xFECF4EC: 83E1001C lwz r31,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R31
+ 27: INCEIPL $4
+
+ 0xFECF4F0: 38210020 addi r1,r1,32
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: PUTL t22, R1
+ 31: INCEIPL $4
+
+ 0xFECF4F4: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+
+. 1893 FECF4D8 32
+. 80 A1 00 24 83 81 00 10 83 A1 00 14 7C A8 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 1894 (0xFE8831C) approx BBs exec'd 0 ====
+
+ 0xFE8831C: 4BFFF9C0 b 0xFE87CDC
+ 0: JMPo $0xFE87CDC ($4)
+
+
+
+. 1894 FE8831C 4
+. 4B FF F9 C0
+==== BB 1895 (0xFE87CDC) approx BBs exec'd 0 ====
+
+ 0xFE87CDC: 823E012C lwz r17,300(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x12C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R17
+ 4: INCEIPL $4
+
+ 0xFE87CE0: 82DE0130 lwz r22,304(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x130, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R22
+ 9: INCEIPL $4
+
+ 0xFE87CE4: 80B10000 lwz r5,0(r17)
+ 10: GETL R17, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R5
+ 13: INCEIPL $4
+
+ 0xFE87CE8: 2F050000 cmpi cr6,r5,0
+ 14: GETL R5, t12
+ 15: CMP0L t12, t14 (-rSo)
+ 16: ICRFL t14, $0x6, CR
+ 17: INCEIPL $4
+
+ 0xFE87CEC: 419A0454 bc 12,26,0xFE88140
+ 18: Js26o $0xFE88140
+
+
+
+. 1895 FE87CDC 20
+. 82 3E 01 2C 82 DE 01 30 80 B1 00 00 2F 05 00 00 41 9A 04 54
+==== BB 1896 (0xFE88140) approx BBs exec'd 0 ====
+
+ 0xFE88140: 807E0120 lwz r3,288(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x120, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE88144: 3C800001 lis r4,1
+ 5: MOVL $0x10000, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFE88148: 92D10000 stw r22,0(r17)
+ 8: GETL R22, t6
+ 9: GETL R17, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFE8814C: 48099BD5 bl 0xFF21D20
+ 12: MOVL $0xFE88150, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0xFF21D20 ($4)
+
+
+
+. 1896 FE88140 16
+. 80 7E 01 20 3C 80 00 01 92 D1 00 00 48 09 9B D5
+==== BB 1897 __open_nocancel(0xFF21D20) approx BBs exec'd 0 ====
+
+ 0xFF21D20: 38000005 li r0,5
+ 0: MOVL $0x5, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFF21D24: 44000002 sc
+ 3: JMPo-sys $0xFF21D28 ($4)
+
+
+
+. 1897 FF21D20 8
+. 38 00 00 05 44 00 00 02
+==== BB 1898 (0xFF21D28) approx BBs exec'd 0 ====
+
+ 0xFF21D28: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 1898 FF21D28 4
+. 4C A3 00 20
+==== BB 1899 (0xFE88150) approx BBs exec'd 0 ====
+
+ 0xFE88150: 39200000 li r9,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0xFE88154: 7C731B79 or. r19,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R19
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFE88158: 7F200026 mfcr r25
+ 8: GETL CR, t6
+ 9: PUTL t6, R25
+ 10: INCEIPL $4
+
+ 0xFE8815C: 41A0FC9C bc 13,0,0xFE87DF8
+ 11: Js00o $0xFE87DF8
+
+
+
+. 1899 FE88150 16
+. 39 20 00 00 7C 73 1B 79 7F 20 00 26 41 A0 FC 9C
+==== BB 1900 (0xFE88160) approx BBs exec'd 0 ====
+
+ 0xFE88160: 80BE0134 lwz r5,308(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x134, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFE88164: 38600003 li r3,3
+ 5: MOVL $0x3, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE88168: 7E649B78 or r4,r19,r19
+ 8: GETL R19, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0xFE8816C: 48099155 bl 0xFF212C0
+ 11: MOVL $0xFE88170, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0xFF212C0 ($4)
+
+
+
+. 1900 FE88160 16
+. 80 BE 01 34 38 60 00 03 7E 64 9B 78 48 09 91 55
+==== BB 1901 __fxstat64@@GLIBC_2.2(0xFF212C0) approx BBs exec'd 0 ====
+
+ 0xFF212C0: 7D8802A6 mflr r12
+ 0: GETL LR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0xFF212C4: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFF212C8: 48086B89 bl 0xFFA7E50
+ 9: MOVL $0xFF212CC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1901 FF212C0 12
+. 7D 88 02 A6 94 21 FF F0 48 08 6B 89
+==== BB 1902 (0xFF212CC) approx BBs exec'd 0 ====
+
+ 0xFF212CC: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF212D0: 7C832378 or r3,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFF212D4: 7FC802A6 mflr r30
+ 8: GETL LR, t6
+ 9: PUTL t6, R30
+ 10: INCEIPL $4
+
+ 0xFF212D8: 7CA42B78 or r4,r5,r5
+ 11: GETL R5, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0xFF212DC: 380000C5 li r0,197
+ 14: MOVL $0xC5, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xFF212E0: 7D8803A6 mtlr r12
+ 17: GETL R12, t12
+ 18: PUTL t12, LR
+ 19: INCEIPL $4
+
+ 0xFF212E4: 44000002 sc
+ 20: JMPo-sys $0xFF212E8 ($4)
+
+
+
+. 1902 FF212CC 28
+. 93 C1 00 08 7C 83 23 78 7F C8 02 A6 7C A4 2B 78 38 00 00 C5 7D 88 03 A6 44 00 00 02
+==== BB 1903 (0xFF212E8) approx BBs exec'd 0 ====
+
+ 0xFF212E8: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFF212EC: 74091000 andis. r9,r0,0x1000
+ 3: GETL R0, t2
+ 4: ANDL $0x10000000, t2
+ 5: PUTL t2, R9
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFF212F0: 813E1C4C lwz r9,7244(r30)
+ 9: GETL R30, t6
+ 10: ADDL $0x1C4C, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFF212F4: 7D291214 add r9,r9,r2
+ 14: GETL R9, t10
+ 15: GETL R2, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0xFF212F8: 40820010 bc 4,2,0xFF21308
+ 19: Jc02o $0xFF21308
+
+
+
+. 1903 FF212E8 20
+. 7C 00 00 26 74 09 10 00 81 3E 1C 4C 7D 29 12 14 40 82 00 10
+==== BB 1904 (0xFF212FC) approx BBs exec'd 0 ====
+
+ 0xFF212FC: 83C10008 lwz r30,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R30
+ 4: INCEIPL $4
+
+ 0xFF21300: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFF21304: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+
+. 1904 FF212FC 12
+. 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 1905 (0xFE88170) approx BBs exec'd 0 ====
+
+ 0xFE88170: 2F83FFFF cmpi cr7,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE88174: 41BEFC50 bc 13,30,0xFE87DC4
+ 5: Js30o $0xFE87DC4
+
+
+
+. 1905 FE88170 8
+. 2F 83 FF FF 41 BE FC 50
+==== BB 1906 (0xFE88178) approx BBs exec'd 0 ====
+
+ 0xFE88178: 82BE0134 lwz r21,308(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x134, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0xFE8817C: 83550030 lwz r26,48(r21)
+ 5: GETL R21, t4
+ 6: ADDL $0x30, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0xFE88180: 83750034 lwz r27,52(r21)
+ 10: GETL R21, t8
+ 11: ADDL $0x34, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R27
+ 14: INCEIPL $4
+
+ 0xFE88184: 2F9A0000 cmpi cr7,r26,0
+ 15: GETL R26, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0xFE88188: 419C0018 bc 12,28,0xFE881A0
+ 19: Js28o $0xFE881A0
+
+
+
+. 1906 FE88178 20
+. 82 BE 01 34 83 55 00 30 83 75 00 34 2F 9A 00 00 41 9C 00 18
+==== BB 1907 (0xFE8818C) approx BBs exec'd 0 ====
+
+ 0xFE8818C: 409E0010 bc 4,30,0xFE8819C
+ 0: Jc30o $0xFE8819C
+
+
+
+. 1907 FE8818C 4
+. 40 9E 00 10
+==== BB 1908 (0xFE88190) approx BBs exec'd 0 ====
+
+ 0xFE88190: 3F000020 lis r24,32
+ 0: MOVL $0x200000, t0
+ 1: PUTL t0, R24
+ 2: INCEIPL $4
+
+ 0xFE88194: 7F1BC040 cmpl cr6,r27,r24
+ 3: GETL R27, t2
+ 4: GETL R24, t4
+ 5: CMPUL t2, t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0xFE88198: 41980008 bc 12,24,0xFE881A0
+ 8: Js24o $0xFE881A0
+
+
+
+. 1908 FE88190 12
+. 3F 00 00 20 7F 1B C0 40 41 98 00 08
+==== BB 1909 (0xFE8819C) approx BBs exec'd 0 ====
+
+ 0xFE8819C: 3F600020 lis r27,32
+ 0: MOVL $0x200000, t0
+ 1: PUTL t0, R27
+ 2: INCEIPL $4
+
+ 0xFE881A0: 38600000 li r3,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFE881A4: 7F64DB78 or r4,r27,r27
+ 6: GETL R27, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFE881A8: 38A00001 li r5,1
+ 9: MOVL $0x1, t6
+ 10: PUTL t6, R5
+ 11: INCEIPL $4
+
+ 0xFE881AC: 38C00002 li r6,2
+ 12: MOVL $0x2, t8
+ 13: PUTL t8, R6
+ 14: INCEIPL $4
+
+ 0xFE881B0: 7E679B78 or r7,r19,r19
+ 15: GETL R19, t10
+ 16: PUTL t10, R7
+ 17: INCEIPL $4
+
+ 0xFE881B4: 39200000 li r9,0
+ 18: MOVL $0x0, t12
+ 19: PUTL t12, R9
+ 20: INCEIPL $4
+
+ 0xFE881B8: 39400000 li r10,0
+ 21: MOVL $0x0, t14
+ 22: PUTL t14, R10
+ 23: INCEIPL $4
+
+ 0xFE881BC: 7F78DB78 or r24,r27,r27
+ 24: GETL R27, t16
+ 25: PUTL t16, R24
+ 26: INCEIPL $4
+
+ 0xFE881C0: 480A6009 bl 0xFF2E1C8
+ 27: MOVL $0xFE881C4, t18
+ 28: PUTL t18, LR
+ 29: JMPo-c $0xFF2E1C8 ($4)
+
+
+
+. 1909 FE8819C 40
+. 3F 60 00 20 38 60 00 00 7F 64 DB 78 38 A0 00 01 38 C0 00 02 7E 67 9B 78 39 20 00 00 39 40 00 00 7F 78 DB 78 48 0A 60 09
+==== BB 1910 mmap64(0xFF2E1C8) approx BBs exec'd 0 ====
+
+ 0xFF2E1C8: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFF2E1CC: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFF2E1D0: 48079C81 bl 0xFFA7E50
+ 9: MOVL $0xFF2E1D4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1910 FF2E1C8 12
+. 7C 08 02 A6 94 21 FF E0 48 07 9C 81
+==== BB 1911 (0xFF2E1D4) approx BBs exec'd 0 ====
+
+ 0xFF2E1D4: 39600000 li r11,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFF2E1D8: 554C053E rlwinm r12,r10,0,20,31
+ 3: GETL R10, t2
+ 4: ANDL $0xFFF, t2
+ 5: PUTL t2, R12
+ 6: INCEIPL $4
+
+ 0xFF2E1DC: 93C10018 stw r30,24(r1)
+ 7: GETL R30, t4
+ 8: GETL R1, t6
+ 9: ADDL $0x18, t6
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFF2E1E0: 7FC802A6 mflr r30
+ 12: GETL LR, t8
+ 13: PUTL t8, R30
+ 14: INCEIPL $4
+
+ 0xFF2E1E4: 93810010 stw r28,16(r1)
+ 15: GETL R28, t10
+ 16: GETL R1, t12
+ 17: ADDL $0x10, t12
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0xFF2E1E8: 93A10014 stw r29,20(r1)
+ 20: GETL R29, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xFF2E1EC: 555DA33E rlwinm r29,r10,20,12,31
+ 25: GETL R10, t18
+ 26: SHRL $0xC, t18
+ 27: PUTL t18, R29
+ 28: INCEIPL $4
+
+ 0xFF2E1F0: 513DA016 rlwimi r29,r9,20,0,11
+ 29: GETL R29, t20
+ 30: GETL R9, t22
+ 31: ROLL $0x14, t22
+ 32: ANDL $0xFFF00000, t22
+ 33: ANDL $0xFFFFF, t20
+ 34: ORL t20, t22
+ 35: PUTL t22, R29
+ 36: INCEIPL $4
+
+ 0xFF2E1F4: 7D3C6670 srawi r28,r9,12
+ 37: GETL R9, t24
+ 38: SARL $0xC, t24 (-wCa)
+ 39: PUTL t24, R28
+ 40: INCEIPL $4
+
+ 0xFF2E1F8: 7C0803A6 mtlr r0
+ 41: GETL R0, t26
+ 42: PUTL t26, LR
+ 43: INCEIPL $4
+
+ 0xFF2E1FC: 7D606379 or. r0,r11,r12
+ 44: GETL R11, t28
+ 45: GETL R12, t30
+ 46: ORL t30, t28
+ 47: PUTL t28, R0
+ 48: CMP0L t28, t32 (-rSo)
+ 49: ICRFL t32, $0x0, CR
+ 50: INCEIPL $4
+
+ 0xFF2E200: 813E1C4C lwz r9,7244(r30)
+ 51: GETL R30, t34
+ 52: ADDL $0x1C4C, t34
+ 53: LDL (t34), t36
+ 54: PUTL t36, R9
+ 55: INCEIPL $4
+
+ 0xFF2E204: 7FA8EB78 or r8,r29,r29
+ 56: GETL R29, t38
+ 57: PUTL t38, R8
+ 58: INCEIPL $4
+
+ 0xFF2E208: 380000C0 li r0,192
+ 59: MOVL $0xC0, t40
+ 60: PUTL t40, R0
+ 61: INCEIPL $4
+
+ 0xFF2E20C: 7D291214 add r9,r9,r2
+ 62: GETL R9, t42
+ 63: GETL R2, t44
+ 64: ADDL t42, t44
+ 65: PUTL t44, R9
+ 66: INCEIPL $4
+
+ 0xFF2E210: 3960FFFF li r11,-1
+ 67: MOVL $0xFFFFFFFF, t46
+ 68: PUTL t46, R11
+ 69: INCEIPL $4
+
+ 0xFF2E214: 41820024 bc 12,2,0xFF2E238
+ 70: Js02o $0xFF2E238
+
+
+
+. 1911 FF2E1D4 68
+. 39 60 00 00 55 4C 05 3E 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 A1 00 14 55 5D A3 3E 51 3D A0 16 7D 3C 66 70 7C 08 03 A6 7D 60 63 79 81 3E 1C 4C 7F A8 EB 78 38 00 00 C0 7D 29 12 14 39 60 FF FF 41 82 00 24
+==== BB 1912 (0xFF2E238) approx BBs exec'd 0 ====
+
+ 0xFF2E238: 44000002 sc
+ 0: JMPo-sys $0xFF2E23C ($4)
+
+
+
+. 1912 FF2E238 4
+. 44 00 00 02
+==== BB 1913 (0xFF2E23C) approx BBs exec'd 0 ====
+
+ 0xFF2E23C: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFF2E240: 74091000 andis. r9,r0,0x1000
+ 3: GETL R0, t2
+ 4: ANDL $0x10000000, t2
+ 5: PUTL t2, R9
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFF2E244: 809E1C4C lwz r4,7244(r30)
+ 9: GETL R30, t6
+ 10: ADDL $0x1C4C, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0xFF2E248: 7D241214 add r9,r4,r2
+ 14: GETL R4, t10
+ 15: GETL R2, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0xFF2E24C: 40820020 bc 4,2,0xFF2E26C
+ 19: Jc02o $0xFF2E26C
+
+
+
+. 1913 FF2E23C 20
+. 7C 00 00 26 74 09 10 00 80 9E 1C 4C 7D 24 12 14 40 82 00 20
+==== BB 1914 (0xFF2E250) approx BBs exec'd 0 ====
+
+ 0xFF2E250: 7C6B1B78 or r11,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFF2E254: 7D635B78 or r3,r11,r11
+ 3: GETL R11, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFF2E258: 83810010 lwz r28,16(r1)
+ 6: GETL R1, t4
+ 7: ADDL $0x10, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R28
+ 10: INCEIPL $4
+
+ 0xFF2E25C: 83A10014 lwz r29,20(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x14, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0xFF2E260: 83C10018 lwz r30,24(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x18, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0xFF2E264: 38210020 addi r1,r1,32
+ 21: GETL R1, t16
+ 22: ADDL $0x20, t16
+ 23: PUTL t16, R1
+ 24: INCEIPL $4
+
+ 0xFF2E268: 4E800020 blr
+ 25: GETL LR, t18
+ 26: JMPo-r t18 ($4)
+
+
+
+. 1914 FF2E250 28
+. 7C 6B 1B 78 7D 63 5B 78 83 81 00 10 83 A1 00 14 83 C1 00 18 38 21 00 20 4E 80 00 20
+==== BB 1915 (0xFE881C4) approx BBs exec'd 0 ====
+
+ 0xFE881C4: 2F83FFFF cmpi cr7,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE881C8: 7C7D1B78 or r29,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R29
+ 7: INCEIPL $4
+
+ 0xFE881CC: 41BEFBF8 bc 13,30,0xFE87DC4
+ 8: Js30o $0xFE87DC4
+
+
+
+. 1915 FE881C4 12
+. 2F 83 FF FF 7C 7D 1B 78 41 BE FB F8
+==== BB 1916 (0xFE881D0) approx BBs exec'd 0 ====
+
+ 0xFE881D0: 81030024 lwz r8,36(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFE881D4: 83830014 lwz r28,20(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0xFE881D8: 1C88006C mulli r4,r8,108
+ 10: GETL R8, t8
+ 11: MULL $0x6C, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0xFE881DC: 80E30018 lwz r7,24(r3)
+ 14: GETL R3, t10
+ 15: ADDL $0x18, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0xFE881E0: 80C30020 lwz r6,32(r3)
+ 19: GETL R3, t14
+ 20: ADDL $0x20, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R6
+ 23: INCEIPL $4
+
+ 0xFE881E4: 7D5C3A14 add r10,r28,r7
+ 24: GETL R28, t18
+ 25: GETL R7, t20
+ 26: ADDL t18, t20
+ 27: PUTL t20, R10
+ 28: INCEIPL $4
+
+ 0xFE881E8: 81230010 lwz r9,16(r3)
+ 29: GETL R3, t22
+ 30: ADDL $0x10, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R9
+ 33: INCEIPL $4
+
+ 0xFE881EC: 7F862214 add r28,r6,r4
+ 34: GETL R6, t26
+ 35: GETL R4, t28
+ 36: ADDL t26, t28
+ 37: PUTL t28, R28
+ 38: INCEIPL $4
+
+ 0xFE881F0: 81830008 lwz r12,8(r3)
+ 39: GETL R3, t30
+ 40: ADDL $0x8, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R12
+ 43: INCEIPL $4
+
+ 0xFE881F4: 7C9C5000 cmp cr1,r28,r10
+ 44: GETL R28, t34
+ 45: GETL R10, t36
+ 46: CMPL t34, t36, t38 (-rSo)
+ 47: ICRFL t38, $0x1, CR
+ 48: INCEIPL $4
+
+ 0xFE881F8: 1C09000C mulli r0,r9,12
+ 49: GETL R9, t40
+ 50: MULL $0xC, t40
+ 51: PUTL t40, R0
+ 52: INCEIPL $4
+
+ 0xFE881FC: 7D2C0214 add r9,r12,r0
+ 53: GETL R12, t42
+ 54: GETL R0, t44
+ 55: ADDL t42, t44
+ 56: PUTL t44, R9
+ 57: INCEIPL $4
+
+ 0xFE88200: 40840008 bc 4,4,0xFE88208
+ 58: Jc04o $0xFE88208
+
+
+
+. 1916 FE881D0 52
+. 81 03 00 24 83 83 00 14 1C 88 00 6C 80 E3 00 18 80 C3 00 20 7D 5C 3A 14 81 23 00 10 7F 86 22 14 81 83 00 08 7C 9C 50 00 1C 09 00 0C 7D 2C 02 14 40 84 00 08
+==== BB 1917 (0xFE88208) approx BBs exec'd 0 ====
+
+ 0xFE88208: 7C1C4800 cmp cr0,r28,r9
+ 0: GETL R28, t0
+ 1: GETL R9, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8820C: 40800008 bc 4,0,0xFE88214
+ 5: Jc00o $0xFE88214
+
+
+
+. 1917 FE88208 8
+. 7C 1C 48 00 40 80 00 08
+==== BB 1918 (0xFE88214) approx BBs exec'd 0 ====
+
+ 0xFE88214: 7E1CC040 cmpl cr4,r28,r24
+ 0: GETL R28, t0
+ 1: GETL R24, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x4, CR
+ 4: INCEIPL $4
+
+ 0xFE88218: 41910288 bc 12,17,0xFE884A0
+ 5: Js17o $0xFE884A0
+
+
+
+. 1918 FE88214 8
+. 7E 1C C0 40 41 91 02 88
+==== BB 1919 (0xFE8821C) approx BBs exec'd 0 ====
+
+ 0xFE8821C: 80B50030 lwz r5,48(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFE88220: 3B200000 li r25,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R25
+ 7: INCEIPL $4
+
+ 0xFE88224: 7F85C800 cmp cr7,r5,r25
+ 8: GETL R5, t6
+ 9: GETL R25, t8
+ 10: CMPL t6, t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFE88228: 419D0028 bc 12,29,0xFE88250
+ 13: Js29o $0xFE88250
+
+
+
+. 1919 FE8821C 16
+. 80 B5 00 30 3B 20 00 00 7F 85 C8 00 41 9D 00 28
+==== BB 1920 (0xFE8822C) approx BBs exec'd 0 ====
+
+ 0xFE8822C: 409E0010 bc 4,30,0xFE8823C
+ 0: Jc30o $0xFE8823C
+
+
+
+. 1920 FE8822C 4
+. 40 9E 00 10
+==== BB 1921 (0xFE88230) approx BBs exec'd 0 ====
+
+ 0xFE88230: 83550034 lwz r26,52(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFE88234: 7C9AC040 cmpl cr1,r26,r24
+ 5: GETL R26, t4
+ 6: GETL R24, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFE88238: 41850018 bc 12,5,0xFE88250
+ 10: Js05o $0xFE88250
+
+
+
+. 1921 FE88230 12
+. 83 55 00 34 7C 9A C0 40 41 85 00 18
+==== BB 1922 (0xFE88250) approx BBs exec'd 0 ====
+
+ 0xFE88250: 93B60000 stw r29,0(r22)
+ 0: GETL R29, t0
+ 1: GETL R22, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE88254: 93160008 stw r24,8(r22)
+ 4: GETL R24, t4
+ 5: GETL R22, t6
+ 6: ADDL $0x8, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFE88258: 4BFFFA98 b 0xFE87CF0
+ 9: JMPo $0xFE87CF0 ($4)
+
+
+
+. 1922 FE88250 12
+. 93 B6 00 00 93 16 00 08 4B FF FA 98
+==== BB 1923 (0xFE87CF0) approx BBs exec'd 0 ====
+
+ 0xFE87CF0: 82B60000 lwz r21,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R21
+ 3: INCEIPL $4
+
+ 0xFE87CF4: 2C150000 cmpi cr0,r21,0
+ 4: GETL R21, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFE87CF8: 41820628 bc 12,2,0xFE88320
+ 8: Js02o $0xFE88320
+
+
+
+. 1923 FE87CF0 12
+. 82 B6 00 00 2C 15 00 00 41 82 06 28
+==== BB 1924 (0xFE87CFC) approx BBs exec'd 0 ====
+
+ 0xFE87CFC: 7EE3BB78 or r3,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE87D00: 4804EDD9 bl 0xFED6AD8
+ 3: MOVL $0xFE87D04, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 1924 FE87CFC 8
+. 7E E3 BB 78 48 04 ED D9
+==== BB 1925 (0xFE87D04) approx BBs exec'd 0 ====
+
+ 0xFE87D04: 39600000 li r11,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFE87D08: 7E0B1840 cmpl cr4,r11,r3
+ 3: GETL R11, t2
+ 4: GETL R3, t4
+ 5: CMPUL t2, t4, t6 (-rSo)
+ 6: ICRFL t6, $0x4, CR
+ 7: INCEIPL $4
+
+ 0xFE87D0C: 4090001C bc 4,16,0xFE87D28
+ 8: Jc16o $0xFE87D28
+
+
+
+. 1925 FE87D04 12
+. 39 60 00 00 7E 0B 18 40 40 90 00 1C
+==== BB 1926 (0xFE87D10) approx BBs exec'd 0 ====
+
+ 0xFE87D10: 7C6903A6 mtctr r3
+ 0: GETL R3, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0xFE87D14: 7F0BB8AE lbzx r24,r11,r23
+ 3: GETL R23, t2
+ 4: GETL R11, t4
+ 5: ADDL t4, t2
+ 6: LDB (t2), t6
+ 7: PUTL t6, R24
+ 8: INCEIPL $4
+
+ 0xFE87D18: 546C483E rlwinm r12,r3,9,0,31
+ 9: GETL R3, t8
+ 10: ROLL $0x9, t8
+ 11: PUTL t8, R12
+ 12: INCEIPL $4
+
+ 0xFE87D1C: 396B0001 addi r11,r11,1
+ 13: GETL R11, t10
+ 14: ADDL $0x1, t10
+ 15: PUTL t10, R11
+ 16: INCEIPL $4
+
+ 0xFE87D20: 7C6CC214 add r3,r12,r24
+ 17: GETL R12, t12
+ 18: GETL R24, t14
+ 19: ADDL t12, t14
+ 20: PUTL t14, R3
+ 21: INCEIPL $4
+
+ 0xFE87D24: 4200FFF0 bc 16,0,0xFE87D14
+ 22: GETL CTR, t16
+ 23: ADDL $0xFFFFFFFF, t16
+ 24: PUTL t16, CTR
+ 25: JIFZL t16, $0xFE87D28
+ 26: JMPo $0xFE87D14 ($4)
+
+
+
+. 1926 FE87D10 24
+. 7C 69 03 A6 7F 0B B8 AE 54 6C 48 3E 39 6B 00 01 7C 6C C2 14 42 00 FF F0
+==== BB 1927 (0xFE87D14) approx BBs exec'd 0 ====
+
+ 0xFE87D14: 7F0BB8AE lbzx r24,r11,r23
+ 0: GETL R23, t0
+ 1: GETL R11, t2
+ 2: ADDL t2, t0
+ 3: LDB (t0), t4
+ 4: PUTL t4, R24
+ 5: INCEIPL $4
+
+ 0xFE87D18: 546C483E rlwinm r12,r3,9,0,31
+ 6: GETL R3, t6
+ 7: ROLL $0x9, t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0xFE87D1C: 396B0001 addi r11,r11,1
+ 10: GETL R11, t8
+ 11: ADDL $0x1, t8
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0xFE87D20: 7C6CC214 add r3,r12,r24
+ 14: GETL R12, t10
+ 15: GETL R24, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R3
+ 18: INCEIPL $4
+
+ 0xFE87D24: 4200FFF0 bc 16,0,0xFE87D14
+ 19: GETL CTR, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, CTR
+ 22: JIFZL t14, $0xFE87D28
+ 23: JMPo $0xFE87D14 ($4)
+
+
+
+. 1927 FE87D14 20
+. 7F 0B B8 AE 54 6C 48 3E 39 6B 00 01 7C 6C C2 14 42 00 FF F0
+==== BB 1928 (0xFE87D28) approx BBs exec'd 0 ====
+
+ 0xFE87D28: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE87D2C: 7C791B78 or r25,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R25
+ 6: INCEIPL $4
+
+ 0xFE87D30: 409A0008 bc 4,26,0xFE87D38
+ 7: Jc26o $0xFE87D38
+
+
+
+. 1928 FE87D28 12
+. 2F 03 00 00 7C 79 1B 78 40 9A 00 08
+==== BB 1929 (0xFE87D38) approx BBs exec'd 0 ====
+
+ 0xFE87D38: 80760000 lwz r3,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE87D3C: 83430010 lwz r26,16(r3)
+ 4: GETL R3, t4
+ 5: ADDL $0x10, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R26
+ 8: INCEIPL $4
+
+ 0xFE87D40: 81030008 lwz r8,8(r3)
+ 9: GETL R3, t8
+ 10: ADDL $0x8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R8
+ 13: INCEIPL $4
+
+ 0xFE87D44: 38FAFFFE addi r7,r26,-2
+ 14: GETL R26, t12
+ 15: ADDL $0xFFFFFFFE, t12
+ 16: PUTL t12, R7
+ 17: INCEIPL $4
+
+ 0xFE87D48: 7CD9D396 divwu r6, r25, r26
+ 18: GETL R25, t16
+ 19: GETL R26, t14
+ 20: UDIVL t14, t16
+ 21: PUTL t16, R6
+ 22: INCEIPL $4
+
+ 0xFE87D4C: 7F681A14 add r27,r8,r3
+ 23: GETL R8, t18
+ 24: GETL R3, t20
+ 25: ADDL t18, t20
+ 26: PUTL t20, R27
+ 27: INCEIPL $4
+
+ 0xFE87D50: 7F993B96 divwu r28, r25, r7
+ 28: GETL R25, t24
+ 29: GETL R7, t22
+ 30: UDIVL t22, t24
+ 31: PUTL t24, R28
+ 32: INCEIPL $4
+
+ 0xFE87D54: 7C9C39D6 mullw r4,r28,r7
+ 33: GETL R28, t26
+ 34: GETL R7, t28
+ 35: MULL t26, t28
+ 36: PUTL t28, R4
+ 37: INCEIPL $4
+
+ 0xFE87D58: 7C06D1D6 mullw r0,r6,r26
+ 38: GETL R6, t30
+ 39: GETL R26, t32
+ 40: MULL t30, t32
+ 41: PUTL t32, R0
+ 42: INCEIPL $4
+
+ 0xFE87D5C: 7D24C850 subf r9,r4,r25
+ 43: GETL R4, t34
+ 44: GETL R25, t36
+ 45: SUBL t34, t36
+ 46: PUTL t36, R9
+ 47: INCEIPL $4
+
+ 0xFE87D60: 3B090001 addi r24,r9,1
+ 48: GETL R9, t38
+ 49: ADDL $0x1, t38
+ 50: PUTL t38, R24
+ 51: INCEIPL $4
+
+ 0xFE87D64: 7FA0C850 subf r29,r0,r25
+ 52: GETL R0, t40
+ 53: GETL R25, t42
+ 54: SUBL t40, t42
+ 55: PUTL t42, R29
+ 56: INCEIPL $4
+
+ 0xFE87D68: 1F9D000C mulli r28,r29,12
+ 57: GETL R29, t44
+ 58: MULL $0xC, t44
+ 59: PUTL t44, R28
+ 60: INCEIPL $4
+
+ 0xFE87D6C: 7EE3BB78 or r3,r23,r23
+ 61: GETL R23, t46
+ 62: PUTL t46, R3
+ 63: INCEIPL $4
+
+ 0xFE87D70: 7FBDC214 add r29,r29,r24
+ 64: GETL R29, t48
+ 65: GETL R24, t50
+ 66: ADDL t48, t50
+ 67: PUTL t50, R29
+ 68: INCEIPL $4
+
+ 0xFE87D74: 7D5CDA14 add r10,r28,r27
+ 69: GETL R28, t52
+ 70: GETL R27, t54
+ 71: ADDL t52, t54
+ 72: PUTL t54, R10
+ 73: INCEIPL $4
+
+ 0xFE87D78: 812A0004 lwz r9,4(r10)
+ 74: GETL R10, t56
+ 75: ADDL $0x4, t56
+ 76: LDL (t56), t58
+ 77: PUTL t58, R9
+ 78: INCEIPL $4
+
+ 0xFE87D7C: 2F890000 cmpi cr7,r9,0
+ 79: GETL R9, t60
+ 80: CMP0L t60, t62 (-rSo)
+ 81: ICRFL t62, $0x7, CR
+ 82: INCEIPL $4
+
+ 0xFE87D80: 419E0038 bc 12,30,0xFE87DB8
+ 83: Js30o $0xFE87DB8
+
+
+
+. 1929 FE87D38 76
+. 80 76 00 00 83 43 00 10 81 03 00 08 38 FA FF FE 7C D9 D3 96 7F 68 1A 14 7F 99 3B 96 7C 9C 39 D6 7C 06 D1 D6 7D 24 C8 50 3B 09 00 01 7F A0 C8 50 1F 9D 00 0C 7E E3 BB 78 7F BD C2 14 7D 5C DA 14 81 2A 00 04 2F 89 00 00 41 9E 00 38
+==== BB 1930 (0xFE87D84) approx BBs exec'd 0 ====
+
+ 0xFE87D84: 7D7CD82E lwzx r11,r28,r27
+ 0: GETL R27, t0
+ 1: GETL R28, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R11
+ 5: INCEIPL $4
+
+ 0xFE87D88: 7C8BC800 cmp cr1,r11,r25
+ 6: GETL R11, t6
+ 7: GETL R25, t8
+ 8: CMPL t6, t8, t10 (-rSo)
+ 9: ICRFL t10, $0x1, CR
+ 10: INCEIPL $4
+
+ 0xFE87D8C: 418600D4 bc 12,6,0xFE87E60
+ 11: Js06o $0xFE87E60
+
+
+
+. 1930 FE87D84 12
+. 7D 7C D8 2E 7C 8B C8 00 41 86 00 D4
+==== BB 1931 (0xFE87E60) approx BBs exec'd 0 ====
+
+ 0xFE87E60: 82160000 lwz r16,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R16
+ 3: INCEIPL $4
+
+ 0xFE87E64: 7C904A14 add r4,r16,r9
+ 4: GETL R16, t4
+ 5: GETL R9, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0xFE87E68: 4804E549 bl 0xFED63B0
+ 9: MOVL $0xFE87E6C, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 1931 FE87E60 12
+. 82 16 00 00 7C 90 4A 14 48 04 E5 49
+==== BB 1932 (0xFED63D8) approx BBs exec'd 0 ====
+
+ 0xFED63D8: 84A30004 lwzu r5,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R3
+ 3: LDL (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFED63DC: 40860054 bc 4,6,0xFED6430
+ 6: Jc06o $0xFED6430
+
+
+
+. 1932 FED63D8 8
+. 84 A3 00 04 40 86 00 54
+==== BB 1933 (0xFED63E0) approx BBs exec'd 0 ====
+
+ 0xFED63E0: 84C40004 lwzu r6,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R4
+ 3: LDL (t0), t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFED63E4: 7C072A14 add r0,r7,r5
+ 6: GETL R7, t4
+ 7: GETL R5, t6
+ 8: ADDL t4, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0xFED63E8: 7D0928F8 nor r9,r8,r5
+ 11: GETL R8, t8
+ 12: GETL R5, t10
+ 13: ORL t10, t8
+ 14: NOTL t8
+ 15: PUTL t8, R9
+ 16: INCEIPL $4
+
+ 0xFED63EC: 7C004839 and. r0,r0,r9
+ 17: GETL R0, t12
+ 18: GETL R9, t14
+ 19: ANDL t12, t14
+ 20: PUTL t14, R0
+ 21: CMP0L t14, t16 (-rSo)
+ 22: ICRFL t16, $0x0, CR
+ 23: INCEIPL $4
+
+ 0xFED63F0: 7C853000 cmp cr1,r5,r6
+ 24: GETL R5, t18
+ 25: GETL R6, t20
+ 26: CMPL t18, t20, t22 (-rSo)
+ 27: ICRFL t22, $0x1, CR
+ 28: INCEIPL $4
+
+ 0xFED63F4: 4182FFE4 bc 12,2,0xFED63D8
+ 29: Js02o $0xFED63D8
+
+
+
+. 1933 FED63E0 24
+. 84 C4 00 04 7C 07 2A 14 7D 09 28 F8 7C 00 48 39 7C 85 30 00 41 82 FF E4
+==== BB 1934 (0xFED6428) approx BBs exec'd 0 ====
+
+ 0xFED6428: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED642C: 4E800020 blr
+ 3: GETL LR, t2
+ 4: JMPo-r t2 ($4)
+
+
+
+. 1934 FED6428 8
+. 38 60 00 00 4E 80 00 20
+==== BB 1935 (0xFE87E6C) approx BBs exec'd 0 ====
+
+ 0xFE87E6C: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFE87E70: 4082FF20 bc 4,2,0xFE87D90
+ 4: Jc02o $0xFE87D90
+
+
+
+. 1935 FE87E6C 8
+. 2C 03 00 00 40 82 FF 20
+==== BB 1936 (0xFE87E74) approx BBs exec'd 0 ====
+
+ 0xFE87E74: 7EFCDA14 add r23,r28,r27
+ 0: GETL R28, t0
+ 1: GETL R27, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0xFE87E78: 80970008 lwz r4,8(r23)
+ 5: GETL R23, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFE87E7C: 2F040000 cmpi cr6,r4,0
+ 10: GETL R4, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFE87E80: 419A04A0 bc 12,26,0xFE88320
+ 14: Js26o $0xFE88320
+
+
+
+. 1936 FE87E74 16
+. 7E FC DA 14 80 97 00 08 2F 04 00 00 41 9A 04 A0
+==== BB 1937 (0xFE87E84) approx BBs exec'd 0 ====
+
+ 0xFE87E84: 83B60000 lwz r29,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0xFE87E88: 3AA00000 li r21,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R21
+ 6: INCEIPL $4
+
+ 0xFE87E8C: 3AC0000D li r22,13
+ 7: MOVL $0xD, t6
+ 8: PUTL t6, R22
+ 9: INCEIPL $4
+
+ 0xFE87E90: 7C9D2214 add r4,r29,r4
+ 10: GETL R29, t8
+ 11: GETL R4, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0xFE87E94: 7EC903A6 mtctr r22
+ 15: GETL R22, t12
+ 16: PUTL t12, CTR
+ 17: INCEIPL $4
+
+ 0xFE87E98: 39600000 li r11,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R11
+ 20: INCEIPL $4
+
+ 0xFE87E9C: 391F0008 addi r8,r31,8
+ 21: GETL R31, t16
+ 22: ADDL $0x8, t16
+ 23: PUTL t16, R8
+ 24: INCEIPL $4
+
+ 0xFE87EA0: 38C00000 li r6,0
+ 25: MOVL $0x0, t18
+ 26: PUTL t18, R6
+ 27: INCEIPL $4
+
+ 0xFE87EA4: 2F8B0006 cmpi cr7,r11,6
+ 28: GETL R11, t20
+ 29: MOVL $0x6, t24
+ 30: CMPL t20, t24, t22 (-rSo)
+ 31: ICRFL t22, $0x7, CR
+ 32: INCEIPL $4
+
+ 0xFE87EA8: 56BB2036 rlwinm r27,r21,4,0,27
+ 33: GETL R21, t26
+ 34: SHLL $0x4, t26
+ 35: PUTL t26, R27
+ 36: INCEIPL $4
+
+ 0xFE87EAC: 7CFB4214 add r7,r27,r8
+ 37: GETL R27, t28
+ 38: GETL R8, t30
+ 39: ADDL t28, t30
+ 40: PUTL t30, R7
+ 41: INCEIPL $4
+
+ 0xFE87EB0: 39470078 addi r10,r7,120
+ 42: GETL R7, t32
+ 43: ADDL $0x78, t32
+ 44: PUTL t32, R10
+ 45: INCEIPL $4
+
+ 0xFE87EB4: 419E0020 bc 12,30,0xFE87ED4
+ 46: Js30o $0xFE87ED4
+
+
+
+. 1937 FE87E84 52
+. 83 B6 00 00 3A A0 00 00 3A C0 00 0D 7C 9D 22 14 7E C9 03 A6 39 60 00 00 39 1F 00 08 38 C0 00 00 2F 8B 00 06 56 BB 20 36 7C FB 42 14 39 47 00 78 41 9E 00 20
+==== BB 1938 (0xFE87EB8) approx BBs exec'd 0 ====
+
+ 0xFE87EB8: 80A40004 lwz r5,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFE87EBC: 3AB50001 addi r21,r21,1
+ 5: GETL R21, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R21
+ 8: INCEIPL $4
+
+ 0xFE87EC0: 90CA000C stw r6,12(r10)
+ 9: GETL R6, t6
+ 10: GETL R10, t8
+ 11: ADDL $0xC, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFE87EC4: 90A70078 stw r5,120(r7)
+ 14: GETL R5, t10
+ 15: GETL R7, t12
+ 16: ADDL $0x78, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xFE87EC8: 83240008 lwz r25,8(r4)
+ 19: GETL R4, t14
+ 20: ADDL $0x8, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R25
+ 23: INCEIPL $4
+
+ 0xFE87ECC: 916A0008 stw r11,8(r10)
+ 24: GETL R11, t18
+ 25: GETL R10, t20
+ 26: ADDL $0x8, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xFE87ED0: 932A0004 stw r25,4(r10)
+ 29: GETL R25, t22
+ 30: GETL R10, t24
+ 31: ADDL $0x4, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFE87ED4: 396B0001 addi r11,r11,1
+ 34: GETL R11, t26
+ 35: ADDL $0x1, t26
+ 36: PUTL t26, R11
+ 37: INCEIPL $4
+
+ 0xFE87ED8: 38840008 addi r4,r4,8
+ 38: GETL R4, t28
+ 39: ADDL $0x8, t28
+ 40: PUTL t28, R4
+ 41: INCEIPL $4
+
+ 0xFE87EDC: 4200FFC8 bc 16,0,0xFE87EA4
+ 42: GETL CTR, t30
+ 43: ADDL $0xFFFFFFFF, t30
+ 44: PUTL t30, CTR
+ 45: JIFZL t30, $0xFE87EE0
+ 46: JMPo $0xFE87EA4 ($4)
+
+
+
+. 1938 FE87EB8 40
+. 80 A4 00 04 3A B5 00 01 90 CA 00 0C 90 A7 00 78 83 24 00 08 91 6A 00 08 93 2A 00 04 39 6B 00 01 38 84 00 08 42 00 FF C8
+==== BB 1939 (0xFE87EA4) approx BBs exec'd 0 ====
+
+ 0xFE87EA4: 2F8B0006 cmpi cr7,r11,6
+ 0: GETL R11, t0
+ 1: MOVL $0x6, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE87EA8: 56BB2036 rlwinm r27,r21,4,0,27
+ 5: GETL R21, t6
+ 6: SHLL $0x4, t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0xFE87EAC: 7CFB4214 add r7,r27,r8
+ 9: GETL R27, t8
+ 10: GETL R8, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R7
+ 13: INCEIPL $4
+
+ 0xFE87EB0: 39470078 addi r10,r7,120
+ 14: GETL R7, t12
+ 15: ADDL $0x78, t12
+ 16: PUTL t12, R10
+ 17: INCEIPL $4
+
+ 0xFE87EB4: 419E0020 bc 12,30,0xFE87ED4
+ 18: Js30o $0xFE87ED4
+
+
+
+. 1939 FE87EA4 20
+. 2F 8B 00 06 56 BB 20 36 7C FB 42 14 39 47 00 78 41 9E 00 20
+==== BB 1940 (0xFE87ED4) approx BBs exec'd 0 ====
+
+ 0xFE87ED4: 396B0001 addi r11,r11,1
+ 0: GETL R11, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFE87ED8: 38840008 addi r4,r4,8
+ 4: GETL R4, t2
+ 5: ADDL $0x8, t2
+ 6: PUTL t2, R4
+ 7: INCEIPL $4
+
+ 0xFE87EDC: 4200FFC8 bc 16,0,0xFE87EA4
+ 8: GETL CTR, t4
+ 9: ADDL $0xFFFFFFFF, t4
+ 10: PUTL t4, CTR
+ 11: JIFZL t4, $0xFE87EE0
+ 12: JMPo $0xFE87EA4 ($4)
+
+
+
+. 1940 FE87ED4 12
+. 39 6B 00 01 38 84 00 08 42 00 FF C8
+==== BB 1941 (0xFE87EE0) approx BBs exec'd 0 ====
+
+ 0xFE87EE0: 80DE0124 lwz r6,292(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x124, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFE87EE4: 387F0080 addi r3,r31,128
+ 5: GETL R31, t4
+ 6: ADDL $0x80, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFE87EE8: 7EA4AB78 or r4,r21,r21
+ 9: GETL R21, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0xFE87EEC: 38A00010 li r5,16
+ 12: MOVL $0x10, t8
+ 13: PUTL t8, R5
+ 14: INCEIPL $4
+
+ 0xFE87EF0: 3B400000 li r26,0
+ 15: MOVL $0x0, t10
+ 16: PUTL t10, R26
+ 17: INCEIPL $4
+
+ 0xFE87EF4: 4800B09D bl 0xFE92F90
+ 18: MOVL $0xFE87EF8, t12
+ 19: PUTL t12, LR
+ 20: JMPo-c $0xFE92F90 ($4)
+
+
+
+. 1941 FE87EE0 24
+. 80 DE 01 24 38 7F 00 80 7E A4 AB 78 38 A0 00 10 3B 40 00 00 48 00 B0 9D
+==== BB 1942 qsort(0xFE92F90) approx BBs exec'd 0 ====
+
+ 0xFE92F90: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE92F94: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE92F98: 93810020 stw r28,32(r1)
+ 9: GETL R28, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x20, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFE92F9C: 7F8429D6 mullw r28,r4,r5
+ 14: GETL R4, t10
+ 15: GETL R5, t12
+ 16: MULL t10, t12
+ 17: PUTL t12, R28
+ 18: INCEIPL $4
+
+ 0xFE92FA0: 48114EB1 bl 0xFFA7E50
+ 19: MOVL $0xFE92FA4, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1942 FE92F90 20
+. 94 21 FF D0 7C 08 02 A6 93 81 00 20 7F 84 29 D6 48 11 4E B1
+==== BB 1943 (0xFE92FA4) approx BBs exec'd 0 ====
+
+ 0xFE92FA4: 92E1000C stw r23,12(r1)
+ 0: GETL R23, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE92FA8: 93010010 stw r24,16(r1)
+ 5: GETL R24, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x10, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFE92FAC: 7CD73378 or r23,r6,r6
+ 10: GETL R6, t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0xFE92FB0: 93210014 stw r25,20(r1)
+ 13: GETL R25, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE92FB4: 7C781B78 or r24,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R24
+ 20: INCEIPL $4
+
+ 0xFE92FB8: 2B9C03FF cmpli cr7,r28,1023
+ 21: GETL R28, t16
+ 22: MOVL $0x3FF, t20
+ 23: CMPUL t16, t20, t18 (-rSo)
+ 24: ICRFL t18, $0x7, CR
+ 25: INCEIPL $4
+
+ 0xFE92FBC: 93410018 stw r26,24(r1)
+ 26: GETL R26, t22
+ 27: GETL R1, t24
+ 28: ADDL $0x18, t24
+ 29: STL t22, (t24)
+ 30: INCEIPL $4
+
+ 0xFE92FC0: 93C10028 stw r30,40(r1)
+ 31: GETL R30, t26
+ 32: GETL R1, t28
+ 33: ADDL $0x28, t28
+ 34: STL t26, (t28)
+ 35: INCEIPL $4
+
+ 0xFE92FC4: 7C9A2378 or r26,r4,r4
+ 36: GETL R4, t30
+ 37: PUTL t30, R26
+ 38: INCEIPL $4
+
+ 0xFE92FC8: 93E1002C stw r31,44(r1)
+ 39: GETL R31, t32
+ 40: GETL R1, t34
+ 41: ADDL $0x2C, t34
+ 42: STL t32, (t34)
+ 43: INCEIPL $4
+
+ 0xFE92FCC: 7FC802A6 mflr r30
+ 44: GETL LR, t36
+ 45: PUTL t36, R30
+ 46: INCEIPL $4
+
+ 0xFE92FD0: 92C10008 stw r22,8(r1)
+ 47: GETL R22, t38
+ 48: GETL R1, t40
+ 49: ADDL $0x8, t40
+ 50: STL t38, (t40)
+ 51: INCEIPL $4
+
+ 0xFE92FD4: 7C3F0B78 or r31,r1,r1
+ 52: GETL R1, t42
+ 53: PUTL t42, R31
+ 54: INCEIPL $4
+
+ 0xFE92FD8: 9361001C stw r27,28(r1)
+ 55: GETL R27, t44
+ 56: GETL R1, t46
+ 57: ADDL $0x1C, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0xFE92FDC: 7CB92B78 or r25,r5,r5
+ 60: GETL R5, t48
+ 61: PUTL t48, R25
+ 62: INCEIPL $4
+
+ 0xFE92FE0: 93A10024 stw r29,36(r1)
+ 63: GETL R29, t50
+ 64: GETL R1, t52
+ 65: ADDL $0x24, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0xFE92FE4: 90010034 stw r0,52(r1)
+ 68: GETL R0, t54
+ 69: GETL R1, t56
+ 70: ADDL $0x34, t56
+ 71: STL t54, (t56)
+ 72: INCEIPL $4
+
+ 0xFE92FE8: 409D0140 bc 4,29,0xFE93128
+ 73: Jc29o $0xFE93128
+
+
+
+. 1943 FE92FA4 72
+. 92 E1 00 0C 93 01 00 10 7C D7 33 78 93 21 00 14 7C 78 1B 78 2B 9C 03 FF 93 41 00 18 93 C1 00 28 7C 9A 23 78 93 E1 00 2C 7F C8 02 A6 92 C1 00 08 7C 3F 0B 78 93 61 00 1C 7C B9 2B 78 93 A1 00 24 90 01 00 34 40 9D 01 40
+==== BB 1944 (0xFE93128) approx BBs exec'd 0 ====
+
+ 0xFE93128: 397C001E addi r11,r28,30
+ 0: GETL R28, t0
+ 1: ADDL $0x1E, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFE9312C: 81210000 lwz r9,0(r1)
+ 4: GETL R1, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xFE93130: 556A0036 rlwinm r10,r11,0,0,27
+ 8: GETL R11, t6
+ 9: ANDL $0xFFFFFFF0, t6
+ 10: PUTL t6, R10
+ 11: INCEIPL $4
+
+ 0xFE93134: 7D0A00D0 neg r8,r10
+ 12: GETL R10, t8
+ 13: NEGL t8
+ 14: PUTL t8, R8
+ 15: INCEIPL $4
+
+ 0xFE93138: 7D21416E stwux r9,r1,r8
+ 16: GETL R8, t10
+ 17: GETL R1, t12
+ 18: ADDL t12, t10
+ 19: PUTL t10, R1
+ 20: GETL R9, t14
+ 21: STL t14, (t10)
+ 22: INCEIPL $4
+
+ 0xFE9313C: 38E10017 addi r7,r1,23
+ 23: GETL R1, t16
+ 24: ADDL $0x17, t16
+ 25: PUTL t16, R7
+ 26: INCEIPL $4
+
+ 0xFE93140: 54E70036 rlwinm r7,r7,0,0,27
+ 27: GETL R7, t18
+ 28: ANDL $0xFFFFFFF0, t18
+ 29: PUTL t18, R7
+ 30: INCEIPL $4
+
+ 0xFE93144: 4BFFFBE5 bl 0xFE92D28
+ 31: MOVL $0xFE93148, t20
+ 32: PUTL t20, LR
+ 33: JMPo-c $0xFE92D28 ($4)
+
+
+
+. 1944 FE93128 32
+. 39 7C 00 1E 81 21 00 00 55 6A 00 36 7D 0A 00 D0 7D 21 41 6E 38 E1 00 17 54 E7 00 36 4B FF FB E5
+==== BB 1945 msort_with_tmp(0xFE92D28) approx BBs exec'd 0 ====
+
+ 0xFE92D28: 2B840001 cmpli cr7,r4,1
+ 0: GETL R4, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE92D2C: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xFE92D30: 9421FFC0 stwu r1,-64(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFFC0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFE92D34: 9261000C stw r19,12(r1)
+ 14: GETL R19, t12
+ 15: GETL R1, t14
+ 16: ADDL $0xC, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0xFE92D38: 7CF33B78 or r19,r7,r7
+ 19: GETL R7, t16
+ 20: PUTL t16, R19
+ 21: INCEIPL $4
+
+ 0xFE92D3C: 92810010 stw r20,16(r1)
+ 22: GETL R20, t18
+ 23: GETL R1, t20
+ 24: ADDL $0x10, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0xFE92D40: 7C741B78 or r20,r3,r3
+ 27: GETL R3, t22
+ 28: PUTL t22, R20
+ 29: INCEIPL $4
+
+ 0xFE92D44: 92C10018 stw r22,24(r1)
+ 30: GETL R22, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x18, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0xFE92D48: 7CD63378 or r22,r6,r6
+ 35: GETL R6, t28
+ 36: PUTL t28, R22
+ 37: INCEIPL $4
+
+ 0xFE92D4C: 92E1001C stw r23,28(r1)
+ 38: GETL R23, t30
+ 39: GETL R1, t32
+ 40: ADDL $0x1C, t32
+ 41: STL t30, (t32)
+ 42: INCEIPL $4
+
+ 0xFE92D50: 7C972378 or r23,r4,r4
+ 43: GETL R4, t34
+ 44: PUTL t34, R23
+ 45: INCEIPL $4
+
+ 0xFE92D54: 93A10034 stw r29,52(r1)
+ 46: GETL R29, t36
+ 47: GETL R1, t38
+ 48: ADDL $0x34, t38
+ 49: STL t36, (t38)
+ 50: INCEIPL $4
+
+ 0xFE92D58: 7CBD2B78 or r29,r5,r5
+ 51: GETL R5, t40
+ 52: PUTL t40, R29
+ 53: INCEIPL $4
+
+ 0xFE92D5C: 92A10014 stw r21,20(r1)
+ 54: GETL R21, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x14, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0xFE92D60: 93010020 stw r24,32(r1)
+ 59: GETL R24, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x20, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0xFE92D64: 93210024 stw r25,36(r1)
+ 64: GETL R25, t50
+ 65: GETL R1, t52
+ 66: ADDL $0x24, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0xFE92D68: 93410028 stw r26,40(r1)
+ 69: GETL R26, t54
+ 70: GETL R1, t56
+ 71: ADDL $0x28, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0xFE92D6C: 9361002C stw r27,44(r1)
+ 74: GETL R27, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x2C, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0xFE92D70: 93810030 stw r28,48(r1)
+ 79: GETL R28, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x30, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0xFE92D74: 93C10038 stw r30,56(r1)
+ 84: GETL R30, t66
+ 85: GETL R1, t68
+ 86: ADDL $0x38, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0xFE92D78: 93E1003C stw r31,60(r1)
+ 89: GETL R31, t70
+ 90: GETL R1, t72
+ 91: ADDL $0x3C, t72
+ 92: STL t70, (t72)
+ 93: INCEIPL $4
+
+ 0xFE92D7C: 90010044 stw r0,68(r1)
+ 94: GETL R0, t74
+ 95: GETL R1, t76
+ 96: ADDL $0x44, t76
+ 97: STL t74, (t76)
+ 98: INCEIPL $4
+
+ 0xFE92D80: 419D0048 bc 12,29,0xFE92DC8
+ 99: Js29o $0xFE92DC8
+
+
+
+. 1945 FE92D28 92
+. 2B 84 00 01 7C 08 02 A6 94 21 FF C0 92 61 00 0C 7C F3 3B 78 92 81 00 10 7C 74 1B 78 92 C1 00 18 7C D6 33 78 92 E1 00 1C 7C 97 23 78 93 A1 00 34 7C BD 2B 78 92 A1 00 14 93 01 00 20 93 21 00 24 93 41 00 28 93 61 00 2C 93 81 00 30 93 C1 00 38 93 E1 00 3C 90 01 00 44 41 9D 00 48
+==== BB 1946 (0xFE92DC8) approx BBs exec'd 0 ====
+
+ 0xFE92DC8: 5499F87E rlwinm r25,r4,31,1,31
+ 0: GETL R4, t0
+ 1: SHRL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0xFE92DCC: 7C7A1B78 or r26,r3,r3
+ 4: GETL R3, t2
+ 5: PUTL t2, R26
+ 6: INCEIPL $4
+
+ 0xFE92DD0: 7D1929D6 mullw r8,r25,r5
+ 7: GETL R25, t4
+ 8: GETL R5, t6
+ 9: MULL t4, t6
+ 10: PUTL t6, R8
+ 11: INCEIPL $4
+
+ 0xFE92DD4: 7F24CB78 or r4,r25,r25
+ 12: GETL R25, t8
+ 13: PUTL t8, R4
+ 14: INCEIPL $4
+
+ 0xFE92DD8: 7F79B850 subf r27,r25,r23
+ 15: GETL R25, t10
+ 16: GETL R23, t12
+ 17: SUBL t10, t12
+ 18: PUTL t12, R27
+ 19: INCEIPL $4
+
+ 0xFE92DDC: 7E7C9B78 or r28,r19,r19
+ 20: GETL R19, t14
+ 21: PUTL t14, R28
+ 22: INCEIPL $4
+
+ 0xFE92DE0: 7FE81A14 add r31,r8,r3
+ 23: GETL R8, t16
+ 24: GETL R3, t18
+ 25: ADDL t16, t18
+ 26: PUTL t18, R31
+ 27: INCEIPL $4
+
+ 0xFE92DE4: 4BFFFF45 bl 0xFE92D28
+ 28: MOVL $0xFE92DE8, t20
+ 29: PUTL t20, LR
+ 30: JMPo-c $0xFE92D28 ($4)
+
+
+
+. 1946 FE92DC8 32
+. 54 99 F8 7E 7C 7A 1B 78 7D 19 29 D6 7F 24 CB 78 7F 79 B8 50 7E 7C 9B 78 7F E8 1A 14 4B FF FF 45
+==== BB 1947 (0xFE92D84) approx BBs exec'd 0 ====
+
+ 0xFE92D84: 82610044 lwz r19,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0xFE92D88: 82810010 lwz r20,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R20
+ 9: INCEIPL $4
+
+ 0xFE92D8C: 7E6803A6 mtlr r19
+ 10: GETL R19, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFE92D90: 82A10014 lwz r21,20(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x14, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R21
+ 17: INCEIPL $4
+
+ 0xFE92D94: 8261000C lwz r19,12(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0xC, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R19
+ 22: INCEIPL $4
+
+ 0xFE92D98: 82C10018 lwz r22,24(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x18, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R22
+ 27: INCEIPL $4
+
+ 0xFE92D9C: 82E1001C lwz r23,28(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x1C, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R23
+ 32: INCEIPL $4
+
+ 0xFE92DA0: 83010020 lwz r24,32(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x20, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R24
+ 37: INCEIPL $4
+
+ 0xFE92DA4: 83210024 lwz r25,36(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x24, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R25
+ 42: INCEIPL $4
+
+ 0xFE92DA8: 83410028 lwz r26,40(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x28, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R26
+ 47: INCEIPL $4
+
+ 0xFE92DAC: 8361002C lwz r27,44(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x2C, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R27
+ 52: INCEIPL $4
+
+ 0xFE92DB0: 83810030 lwz r28,48(r1)
+ 53: GETL R1, t42
+ 54: ADDL $0x30, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R28
+ 57: INCEIPL $4
+
+ 0xFE92DB4: 83A10034 lwz r29,52(r1)
+ 58: GETL R1, t46
+ 59: ADDL $0x34, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R29
+ 62: INCEIPL $4
+
+ 0xFE92DB8: 83C10038 lwz r30,56(r1)
+ 63: GETL R1, t50
+ 64: ADDL $0x38, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R30
+ 67: INCEIPL $4
+
+ 0xFE92DBC: 83E1003C lwz r31,60(r1)
+ 68: GETL R1, t54
+ 69: ADDL $0x3C, t54
+ 70: LDL (t54), t56
+ 71: PUTL t56, R31
+ 72: INCEIPL $4
+
+ 0xFE92DC0: 38210040 addi r1,r1,64
+ 73: GETL R1, t58
+ 74: ADDL $0x40, t58
+ 75: PUTL t58, R1
+ 76: INCEIPL $4
+
+ 0xFE92DC4: 4E800020 blr
+ 77: GETL LR, t60
+ 78: JMPo-r t60 ($4)
+
+
+
+. 1947 FE92D84 68
+. 82 61 00 44 82 81 00 10 7E 68 03 A6 82 A1 00 14 82 61 00 0C 82 C1 00 18 82 E1 00 1C 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+==== BB 1948 (0xFE92DE8) approx BBs exec'd 0 ====
+
+ 0xFE92DE8: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE92DEC: 7F64DB78 or r4,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE92DF0: 7FA5EB78 or r5,r29,r29
+ 6: GETL R29, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFE92DF4: 7EC6B378 or r6,r22,r22
+ 9: GETL R22, t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0xFE92DF8: 7E679B78 or r7,r19,r19
+ 12: GETL R19, t8
+ 13: PUTL t8, R7
+ 14: INCEIPL $4
+
+ 0xFE92DFC: 4BFFFF2D bl 0xFE92D28
+ 15: MOVL $0xFE92E00, t10
+ 16: PUTL t10, LR
+ 17: JMPo-c $0xFE92D28 ($4)
+
+
+
+. 1948 FE92DE8 24
+. 7F E3 FB 78 7F 64 DB 78 7F A5 EB 78 7E C6 B3 78 7E 67 9B 78 4B FF FF 2D
+==== BB 1949 (0xFE92E00) approx BBs exec'd 0 ====
+
+ 0xFE92E00: 2C1D0004 cmpi cr0,r29,4
+ 0: GETL R29, t0
+ 1: MOVL $0x4, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE92E04: 418200E4 bc 12,2,0xFE92EE8
+ 5: Js02o $0xFE92EE8
+
+
+
+. 1949 FE92E00 8
+. 2C 1D 00 04 41 82 00 E4
+==== BB 1950 (0xFE92E08) approx BBs exec'd 0 ====
+
+ 0xFE92E08: 3139FFFF addic r9,r25,-1
+ 0: GETL R25, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFE92E0C: 7CE9C910 subfe r7,r9,r25
+ 4: GETL R9, t2
+ 5: GETL R25, t4
+ 6: SBBL t2, t4 (-rCa-wCa)
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0xFE92E10: 317BFFFF addic r11,r27,-1
+ 9: GETL R27, t6
+ 10: ADCL $0xFFFFFFFF, t6 (-wCa)
+ 11: PUTL t6, R11
+ 12: INCEIPL $4
+
+ 0xFE92E14: 7CCBD910 subfe r6,r11,r27
+ 13: GETL R11, t8
+ 14: GETL R27, t10
+ 15: SBBL t8, t10 (-rCa-wCa)
+ 16: PUTL t10, R6
+ 17: INCEIPL $4
+
+ 0xFE92E18: 7CEB3039 and. r11,r7,r6
+ 18: GETL R7, t12
+ 19: GETL R6, t14
+ 20: ANDL t12, t14
+ 21: PUTL t14, R11
+ 22: CMP0L t14, t16 (-rSo)
+ 23: ICRFL t16, $0x0, CR
+ 24: INCEIPL $4
+
+ 0xFE92E1C: 7F38FE70 srawi r24,r25,31
+ 25: GETL R25, t18
+ 26: SARL $0x1F, t18 (-wCa)
+ 27: PUTL t18, R24
+ 28: INCEIPL $4
+
+ 0xFE92E20: 7F65FE70 srawi r5,r27,31
+ 29: GETL R27, t20
+ 30: SARL $0x1F, t20 (-wCa)
+ 31: PUTL t20, R5
+ 32: INCEIPL $4
+
+ 0xFE92E24: 7F15CA78 xor r21,r24,r25
+ 33: GETL R24, t22
+ 34: GETL R25, t24
+ 35: XORL t22, t24
+ 36: PUTL t24, R21
+ 37: INCEIPL $4
+
+ 0xFE92E28: 7CA4DA78 xor r4,r5,r27
+ 38: GETL R5, t26
+ 39: GETL R27, t28
+ 40: XORL t26, t28
+ 41: PUTL t28, R4
+ 42: INCEIPL $4
+
+ 0xFE92E2C: 7EB8A850 subf r21,r24,r21
+ 43: GETL R24, t30
+ 44: GETL R21, t32
+ 45: SUBL t30, t32
+ 46: PUTL t32, R21
+ 47: INCEIPL $4
+
+ 0xFE92E30: 7F052050 subf r24,r5,r4
+ 48: GETL R5, t34
+ 49: GETL R4, t36
+ 50: SUBL t34, t36
+ 51: PUTL t36, R24
+ 52: INCEIPL $4
+
+ 0xFE92E34: 4082005C bc 4,2,0xFE92E90
+ 53: Jc02o $0xFE92E90
+
+
+
+. 1950 FE92E08 48
+. 31 39 FF FF 7C E9 C9 10 31 7B FF FF 7C CB D9 10 7C EB 30 39 7F 38 FE 70 7F 65 FE 70 7F 15 CA 78 7C A4 DA 78 7E B8 A8 50 7F 05 20 50 40 82 00 5C
+==== BB 1951 (0xFE92E90) approx BBs exec'd 0 ====
+
+ 0xFE92E90: 7FE4FB78 or r4,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE92E94: 7F43D378 or r3,r26,r26
+ 3: GETL R26, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFE92E98: 7EC903A6 mtctr r22
+ 6: GETL R22, t4
+ 7: PUTL t4, CTR
+ 8: INCEIPL $4
+
+ 0xFE92E9C: 4E800421 bctrl
+ 9: MOVL $0xFE92EA0, t6
+ 10: PUTL t6, LR
+ 11: GETL CTR, t8
+ 12: JMPo-c t8 ($4)
+
+
+
+. 1951 FE92E90 16
+. 7F E4 FB 78 7F 43 D3 78 7E C9 03 A6 4E 80 04 21
+==== BB 1952 rangecmp(0xFE87BD8) approx BBs exec'd 0 ====
+
+ 0xFE87BD8: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE87BDC: 80030000 lwz r0,0(r3)
+ 6: GETL R3, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFE87BE0: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xFE87BE4: 80640000 lwz r3,0(r4)
+ 14: GETL R4, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R3
+ 17: INCEIPL $4
+
+ 0xFE87BE8: 7C630050 subf r3,r3,r0
+ 18: GETL R3, t14
+ 19: GETL R0, t16
+ 20: SUBL t14, t16
+ 21: PUTL t16, R3
+ 22: INCEIPL $4
+
+ 0xFE87BEC: 4E800020 blr
+ 23: GETL LR, t18
+ 24: JMPo-r t18 ($4)
+
+
+
+. 1952 FE87BD8 24
+. 94 21 FF F0 80 03 00 00 38 21 00 10 80 64 00 00 7C 63 00 50 4E 80 00 20
+==== BB 1953 (0xFE92EA0) approx BBs exec'd 0 ====
+
+ 0xFE92EA0: 7F44D378 or r4,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE92EA4: 2F030000 cmpi cr6,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x6, CR
+ 6: INCEIPL $4
+
+ 0xFE92EA8: 7FA5EB78 or r5,r29,r29
+ 7: GETL R29, t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFE92EAC: 7F83E378 or r3,r28,r28
+ 10: GETL R28, t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFE92EB0: 4199FFA8 bc 12,25,0xFE92E58
+ 13: Js25o $0xFE92E58
+
+
+
+. 1953 FE92EA0 20
+. 7F 44 D3 78 2F 03 00 00 7F A5 EB 78 7F 83 E3 78 41 99 FF A8
+==== BB 1954 (0xFE92EB4) approx BBs exec'd 0 ====
+
+ 0xFE92EB4: 3B39FFFF addi r25,r25,-1
+ 0: GETL R25, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0xFE92EB8: 48045149 bl 0xFED8000
+ 4: MOVL $0xFE92EBC, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0xFED8000 ($4)
+
+
+
+. 1954 FE92EB4 8
+. 3B 39 FF FF 48 04 51 49
+==== BB 1955 (0xFED802C) approx BBs exec'd 0 ====
+
+ 0xFED802C: 7C8300D0 neg r4,r3
+ 0: GETL R3, t0
+ 1: NEGL t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0xFED8030: 548307BE rlwinm r3,r4,0,30,31
+ 4: GETL R4, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R3
+ 7: INCEIPL $4
+
+ 0xFED8034: 7C691B79 or. r9,r3,r3
+ 8: GETL R3, t4
+ 9: PUTL t4, R9
+ 10: CMP0L t4, t6 (-rSo)
+ 11: ICRFL t6, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFED8038: 7F832850 subf r28,r3,r5
+ 13: GETL R3, t8
+ 14: GETL R5, t10
+ 15: SUBL t8, t10
+ 16: PUTL t10, R28
+ 17: INCEIPL $4
+
+ 0xFED803C: 4182001C bc 12,2,0xFED8058
+ 18: Js02o $0xFED8058
+
+
+
+. 1955 FED802C 20
+. 7C 83 00 D0 54 83 07 BE 7C 69 1B 79 7F 83 28 50 41 82 00 1C
+==== BB 1956 (0xFED8058) approx BBs exec'd 0 ====
+
+ 0xFED8058: 73E00003 andi. r0,r31,0x3
+ 0: GETL R31, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED805C: 40820068 bc 4,2,0xFED80C4
+ 6: Jc02o $0xFED80C4
+
+
+
+. 1956 FED8058 8
+. 73 E0 00 03 40 82 00 68
+==== BB 1957 (0xFED8060) approx BBs exec'd 0 ====
+
+ 0xFED8060: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED8064: 7FE4FB78 or r4,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFED8068: 5785F0BE rlwinm r5,r28,30,2,31
+ 6: GETL R28, t4
+ 7: SHRL $0x2, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0xFED806C: 48000751 bl 0xFED87BC
+ 10: MOVL $0xFED8070, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0xFED87BC ($4)
+
+
+
+. 1957 FED8060 16
+. 7F A3 EB 78 7F E4 FB 78 57 85 F0 BE 48 00 07 51
+==== BB 1958 _wordcopy_fwd_aligned(0xFED87BC) approx BBs exec'd 0 ====
+
+ 0xFED87BC: 54A0077E rlwinm r0,r5,0,29,31
+ 0: GETL R5, t0
+ 1: ANDL $0x7, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0xFED87C0: 7D8802A6 mflr r12
+ 4: GETL LR, t2
+ 5: PUTL t2, R12
+ 6: INCEIPL $4
+
+ 0xFED87C4: 2B800007 cmpli cr7,r0,7
+ 7: GETL R0, t4
+ 8: MOVL $0x7, t8
+ 9: CMPUL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFED87C8: 480CF689 bl 0xFFA7E50
+ 12: MOVL $0xFED87CC, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 1958 FED87BC 16
+. 54 A0 07 7E 7D 88 02 A6 2B 80 00 07 48 0C F6 89
+==== BB 1959 (0xFED87CC) approx BBs exec'd 0 ====
+
+ 0xFED87CC: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED87D0: 93C10008 stw r30,8(r1)
+ 6: GETL R30, t4
+ 7: GETL R1, t6
+ 8: ADDL $0x8, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0xFED87D4: 7FC802A6 mflr r30
+ 11: GETL LR, t8
+ 12: PUTL t8, R30
+ 13: INCEIPL $4
+
+ 0xFED87D8: 7D8803A6 mtlr r12
+ 14: GETL R12, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xFED87DC: 419D0028 bc 12,29,0xFED8804
+ 17: Js29o $0xFED8804
+
+
+
+. 1959 FED87CC 20
+. 94 21 FF F0 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 41 9D 00 28
+==== BB 1960 (0xFED87E0) approx BBs exec'd 0 ====
+
+ 0xFED87E0: 817E07C8 lwz r11,1992(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x7C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFED87E4: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFED87E8: 7CCB002E lwzx r6,r11,r0
+ 9: GETL R0, t6
+ 10: GETL R11, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R6
+ 14: INCEIPL $4
+
+ 0xFED87EC: 7D265A14 add r9,r6,r11
+ 15: GETL R6, t12
+ 16: GETL R11, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0xFED87F0: 7D2903A6 mtctr r9
+ 20: GETL R9, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0xFED87F4: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+
+. 1960 FED87E0 24
+. 81 7E 07 C8 54 00 10 3A 7C CB 00 2E 7D 26 5A 14 7D 29 03 A6 4E 80 04 20
+==== BB 1961 (0xFED88A0) approx BBs exec'd 0 ====
+
+ 0xFED88A0: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFED88A4: 3884FFF0 addi r4,r4,-16
+ 4: GETL R4, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFED88A8: 81240014 lwz r9,20(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0xFED88AC: 3863FFEC addi r3,r3,-20
+ 13: GETL R3, t10
+ 14: ADDL $0xFFFFFFEC, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0xFED88B0: 38A50004 addi r5,r5,4
+ 17: GETL R5, t12
+ 18: ADDL $0x4, t12
+ 19: PUTL t12, R5
+ 20: INCEIPL $4
+
+ 0xFED88B4: 90030014 stw r0,20(r3)
+ 21: GETL R0, t14
+ 22: GETL R3, t16
+ 23: ADDL $0x14, t16
+ 24: STL t14, (t16)
+ 25: INCEIPL $4
+
+ 0xFED88B8: 4BFFFF7C b 0xFED8834
+ 26: JMPo $0xFED8834 ($4)
+
+
+
+. 1961 FED88A0 28
+. 80 04 00 00 38 84 FF F0 81 24 00 14 38 63 FF EC 38 A5 00 04 90 03 00 14 4B FF FF 7C
+==== BB 1962 (0xFED8834) approx BBs exec'd 0 ====
+
+ 0xFED8834: 80040018 lwz r0,24(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED8838: 91230018 stw r9,24(r3)
+ 5: GETL R9, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x18, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFED883C: 34A5FFF8 addic. r5,r5,-8
+ 10: GETL R5, t8
+ 11: ADCL $0xFFFFFFF8, t8 (-wCa)
+ 12: PUTL t8, R5
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFED8840: 8124001C lwz r9,28(r4)
+ 16: GETL R4, t12
+ 17: ADDL $0x1C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R9
+ 20: INCEIPL $4
+
+ 0xFED8844: 9003001C stw r0,28(r3)
+ 21: GETL R0, t16
+ 22: GETL R3, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFED8848: 38840020 addi r4,r4,32
+ 26: GETL R4, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R4
+ 29: INCEIPL $4
+
+ 0xFED884C: 38630020 addi r3,r3,32
+ 30: GETL R3, t22
+ 31: ADDL $0x20, t22
+ 32: PUTL t22, R3
+ 33: INCEIPL $4
+
+ 0xFED8850: 40A2FFB4 bc 5,2,0xFED8804
+ 34: Jc02o $0xFED8804
+
+
+
+. 1962 FED8834 32
+. 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+==== BB 1963 (0xFED8854) approx BBs exec'd 0 ====
+
+ 0xFED8854: 83C10008 lwz r30,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R30
+ 4: INCEIPL $4
+
+ 0xFED8858: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFED885C: 91230000 stw r9,0(r3)
+ 9: GETL R9, t6
+ 10: GETL R3, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFED8860: 4E800020 blr
+ 13: GETL LR, t10
+ 14: JMPo-r t10 ($4)
+
+
+
+. 1963 FED8854 16
+. 83 C1 00 08 38 21 00 10 91 23 00 00 4E 80 00 20
+==== BB 1964 (0xFED8070) approx BBs exec'd 0 ====
+
+ 0xFED8070: 5786003A rlwinm r6,r28,0,0,29
+ 0: GETL R28, t0
+ 1: ANDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0xFED8074: 578507BE rlwinm r5,r28,0,30,31
+ 4: GETL R28, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0xFED8078: 7FBD3214 add r29,r29,r6
+ 8: GETL R29, t4
+ 9: GETL R6, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R29
+ 12: INCEIPL $4
+
+ 0xFED807C: 7FFF3214 add r31,r31,r6
+ 13: GETL R31, t8
+ 14: GETL R6, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R31
+ 17: INCEIPL $4
+
+ 0xFED8080: 2C850000 cmpi cr1,r5,0
+ 18: GETL R5, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x1, CR
+ 21: INCEIPL $4
+
+ 0xFED8084: 4186001C bc 12,6,0xFED80A0
+ 22: Js06o $0xFED80A0
+
+
+
+. 1964 FED8070 24
+. 57 86 00 3A 57 85 07 BE 7F BD 32 14 7F FF 32 14 2C 85 00 00 41 86 00 1C
+==== BB 1965 (0xFE92EBC) approx BBs exec'd 0 ====
+
+ 0xFE92EBC: 7F2BFE70 srawi r11,r25,31
+ 0: GETL R25, t0
+ 1: SARL $0x1F, t0 (-wCa)
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFE92EC0: 7C7C1B78 or r28,r3,r3
+ 4: GETL R3, t2
+ 5: PUTL t2, R28
+ 6: INCEIPL $4
+
+ 0xFE92EC4: 7D6ACA78 xor r10,r11,r25
+ 7: GETL R11, t4
+ 8: GETL R25, t6
+ 9: XORL t4, t6
+ 10: PUTL t6, R10
+ 11: INCEIPL $4
+
+ 0xFE92EC8: 7F5AEA14 add r26,r26,r29
+ 12: GETL R26, t8
+ 13: GETL R29, t10
+ 14: ADDL t8, t10
+ 15: PUTL t10, R26
+ 16: INCEIPL $4
+
+ 0xFE92ECC: 7EAB5050 subf r21,r11,r10
+ 17: GETL R11, t12
+ 18: GETL R10, t14
+ 19: SUBL t12, t14
+ 20: PUTL t14, R21
+ 21: INCEIPL $4
+
+ 0xFE92ED0: 4BFFFFB0 b 0xFE92E80
+ 22: JMPo $0xFE92E80 ($4)
+
+
+
+. 1965 FE92EBC 24
+. 7F 2B FE 70 7C 7C 1B 78 7D 6A CA 78 7F 5A EA 14 7E AB 50 50 4B FF FF B0
+==== BB 1966 (0xFE92E80) approx BBs exec'd 0 ====
+
+ 0xFE92E80: 7D1500D0 neg r8,r21
+ 0: GETL R21, t0
+ 1: NEGL t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0xFE92E84: 7C7800D0 neg r3,r24
+ 4: GETL R24, t2
+ 5: NEGL t2
+ 6: PUTL t2, R3
+ 7: INCEIPL $4
+
+ 0xFE92E88: 7C6B4039 and. r11,r3,r8
+ 8: GETL R3, t4
+ 9: GETL R8, t6
+ 10: ANDL t4, t6
+ 11: PUTL t6, R11
+ 12: CMP0L t6, t8 (-rSo)
+ 13: ICRFL t8, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFE92E8C: 40A0FFAC bc 5,0,0xFE92E38
+ 15: Jc00o $0xFE92E38
+
+
+
+. 1966 FE92E80 16
+. 7D 15 00 D0 7C 78 00 D0 7C 6B 40 39 40 A0 FF AC
+==== BB 1967 (0xFE92E38) approx BBs exec'd 0 ====
+
+ 0xFE92E38: 2F990000 cmpi cr7,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE92E3C: 409E0098 bc 4,30,0xFE92ED4
+ 4: Jc30o $0xFE92ED4
+
+
+
+. 1967 FE92E38 8
+. 2F 99 00 00 40 9E 00 98
+==== BB 1968 (0xFE92E40) approx BBs exec'd 0 ====
+
+ 0xFE92E40: 7EDBB850 subf r22,r27,r23
+ 0: GETL R27, t0
+ 1: GETL R23, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R22
+ 4: INCEIPL $4
+
+ 0xFE92E44: 7E83A378 or r3,r20,r20
+ 5: GETL R20, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE92E48: 7CB6E9D6 mullw r5,r22,r29
+ 8: GETL R22, t6
+ 9: GETL R29, t8
+ 10: MULL t6, t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0xFE92E4C: 7E649B78 or r4,r19,r19
+ 13: GETL R19, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0xFE92E50: 48045889 bl 0xFED86D8
+ 16: MOVL $0xFE92E54, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 1968 FE92E40 20
+. 7E DB B8 50 7E 83 A3 78 7C B6 E9 D6 7E 64 9B 78 48 04 58 89
+==== BB 1969 (0xFED870C) approx BBs exec'd 0 ====
+
+ 0xFED870C: 7C8300D0 neg r4,r3
+ 0: GETL R3, t0
+ 1: NEGL t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0xFED8710: 548307BE rlwinm r3,r4,0,30,31
+ 4: GETL R4, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R3
+ 7: INCEIPL $4
+
+ 0xFED8714: 7C691B79 or. r9,r3,r3
+ 8: GETL R3, t4
+ 9: PUTL t4, R9
+ 10: CMP0L t4, t6 (-rSo)
+ 11: ICRFL t6, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFED8718: 7F832850 subf r28,r3,r5
+ 13: GETL R3, t8
+ 14: GETL R5, t10
+ 15: SUBL t8, t10
+ 16: PUTL t10, R28
+ 17: INCEIPL $4
+
+ 0xFED871C: 4182001C bc 12,2,0xFED8738
+ 18: Js02o $0xFED8738
+
+
+
+. 1969 FED870C 20
+. 7C 83 00 D0 54 83 07 BE 7C 69 1B 79 7F 83 28 50 41 82 00 1C
+==== BB 1970 (0xFED8738) approx BBs exec'd 0 ====
+
+ 0xFED8738: 73A00003 andi. r0,r29,0x3
+ 0: GETL R29, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED873C: 4082006C bc 4,2,0xFED87A8
+ 6: Jc02o $0xFED87A8
+
+
+
+. 1970 FED8738 8
+. 73 A0 00 03 40 82 00 6C
+==== BB 1971 (0xFED8740) approx BBs exec'd 0 ====
+
+ 0xFED8740: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED8744: 7FA4EB78 or r4,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFED8748: 5785F0BE rlwinm r5,r28,30,2,31
+ 6: GETL R28, t4
+ 7: SHRL $0x2, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0xFED874C: 48000071 bl 0xFED87BC
+ 10: MOVL $0xFED8750, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0xFED87BC ($4)
+
+
+
+. 1971 FED8740 16
+. 7F E3 FB 78 7F A4 EB 78 57 85 F0 BE 48 00 00 71
+==== BB 1972 (0xFED8750) approx BBs exec'd 0 ====
+
+ 0xFED8750: 5786003A rlwinm r6,r28,0,0,29
+ 0: GETL R28, t0
+ 1: ANDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0xFED8754: 578507BE rlwinm r5,r28,0,30,31
+ 4: GETL R28, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0xFED8758: 7FFF3214 add r31,r31,r6
+ 8: GETL R31, t4
+ 9: GETL R6, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R31
+ 12: INCEIPL $4
+
+ 0xFED875C: 7FBD3214 add r29,r29,r6
+ 13: GETL R29, t8
+ 14: GETL R6, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0xFED8760: 2C850000 cmpi cr1,r5,0
+ 18: GETL R5, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x1, CR
+ 21: INCEIPL $4
+
+ 0xFED8764: 4186001C bc 12,6,0xFED8780
+ 22: Js06o $0xFED8780
+
+
+
+. 1972 FED8750 24
+. 57 86 00 3A 57 85 07 BE 7F FF 32 14 7F BD 32 14 2C 85 00 00 41 86 00 1C
+==== BB 1973 (0xFE92E54) approx BBs exec'd 0 ====
+
+ 0xFE92E54: 4BFFFF30 b 0xFE92D84
+ 0: JMPo $0xFE92D84 ($4)
+
+
+
+. 1973 FE92E54 4
+. 4B FF FF 30
+==== BB 1974 (0xFE92E58) approx BBs exec'd 0 ====
+
+ 0xFE92E58: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE92E5C: 7FE4FB78 or r4,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE92E60: 3B7BFFFF addi r27,r27,-1
+ 6: GETL R27, t4
+ 7: ADDL $0xFFFFFFFF, t4
+ 8: PUTL t4, R27
+ 9: INCEIPL $4
+
+ 0xFE92E64: 7FA5EB78 or r5,r29,r29
+ 10: GETL R29, t6
+ 11: PUTL t6, R5
+ 12: INCEIPL $4
+
+ 0xFE92E68: 48045199 bl 0xFED8000
+ 13: MOVL $0xFE92E6C, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0xFED8000 ($4)
+
+
+
+. 1974 FE92E58 20
+. 7F 83 E3 78 7F E4 FB 78 3B 7B FF FF 7F A5 EB 78 48 04 51 99
+==== BB 1975 (0xFE92E6C) approx BBs exec'd 0 ====
+
+ 0xFE92E6C: 7F60FE70 srawi r0,r27,31
+ 0: GETL R27, t0
+ 1: SARL $0x1F, t0 (-wCa)
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0xFE92E70: 7C0CDA78 xor r12,r0,r27
+ 4: GETL R0, t2
+ 5: GETL R27, t4
+ 6: XORL t2, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFE92E74: 7C7C1B78 or r28,r3,r3
+ 9: GETL R3, t6
+ 10: PUTL t6, R28
+ 11: INCEIPL $4
+
+ 0xFE92E78: 7FFFEA14 add r31,r31,r29
+ 12: GETL R31, t8
+ 13: GETL R29, t10
+ 14: ADDL t8, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0xFE92E7C: 7F006050 subf r24,r0,r12
+ 17: GETL R0, t12
+ 18: GETL R12, t14
+ 19: SUBL t12, t14
+ 20: PUTL t14, R24
+ 21: INCEIPL $4
+
+ 0xFE92E80: 7D1500D0 neg r8,r21
+ 22: GETL R21, t16
+ 23: NEGL t16
+ 24: PUTL t16, R8
+ 25: INCEIPL $4
+
+ 0xFE92E84: 7C7800D0 neg r3,r24
+ 26: GETL R24, t18
+ 27: NEGL t18
+ 28: PUTL t18, R3
+ 29: INCEIPL $4
+
+ 0xFE92E88: 7C6B4039 and. r11,r3,r8
+ 30: GETL R3, t20
+ 31: GETL R8, t22
+ 32: ANDL t20, t22
+ 33: PUTL t22, R11
+ 34: CMP0L t22, t24 (-rSo)
+ 35: ICRFL t24, $0x0, CR
+ 36: INCEIPL $4
+
+ 0xFE92E8C: 40A0FFAC bc 5,0,0xFE92E38
+ 37: Jc00o $0xFE92E38
+
+
+
+. 1975 FE92E6C 36
+. 7F 60 FE 70 7C 0C DA 78 7C 7C 1B 78 7F FF EA 14 7F 00 60 50 7D 15 00 D0 7C 78 00 D0 7C 6B 40 39 40 A0 FF AC
+==== BB 1976 (0xFED8864) approx BBs exec'd 0 ====
+
+ 0xFED8864: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFED8868: 3863FFFC addi r3,r3,-4
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFFC, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED886C: 81240004 lwz r9,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0xFED8870: 90030004 stw r0,4(r3)
+ 13: GETL R0, t10
+ 14: GETL R3, t12
+ 15: ADDL $0x4, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFED8874: 4BFFFFA0 b 0xFED8814
+ 18: JMPo $0xFED8814 ($4)
+
+
+
+. 1976 FED8864 20
+. 80 04 00 00 38 63 FF FC 81 24 00 04 90 03 00 04 4B FF FF A0
+==== BB 1977 (0xFED8814) approx BBs exec'd 0 ====
+
+ 0xFED8814: 80040008 lwz r0,8(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED8818: 91230008 stw r9,8(r3)
+ 5: GETL R9, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFED881C: 8124000C lwz r9,12(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0xFED8820: 9003000C stw r0,12(r3)
+ 15: GETL R0, t12
+ 16: GETL R3, t14
+ 17: ADDL $0xC, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFED8824: 80040010 lwz r0,16(r4)
+ 20: GETL R4, t16
+ 21: ADDL $0x10, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R0
+ 24: INCEIPL $4
+
+ 0xFED8828: 91230010 stw r9,16(r3)
+ 25: GETL R9, t20
+ 26: GETL R3, t22
+ 27: ADDL $0x10, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0xFED882C: 81240014 lwz r9,20(r4)
+ 30: GETL R4, t24
+ 31: ADDL $0x14, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R9
+ 34: INCEIPL $4
+
+ 0xFED8830: 90030014 stw r0,20(r3)
+ 35: GETL R0, t28
+ 36: GETL R3, t30
+ 37: ADDL $0x14, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0xFED8834: 80040018 lwz r0,24(r4)
+ 40: GETL R4, t32
+ 41: ADDL $0x18, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R0
+ 44: INCEIPL $4
+
+ 0xFED8838: 91230018 stw r9,24(r3)
+ 45: GETL R9, t36
+ 46: GETL R3, t38
+ 47: ADDL $0x18, t38
+ 48: STL t36, (t38)
+ 49: INCEIPL $4
+
+ 0xFED883C: 34A5FFF8 addic. r5,r5,-8
+ 50: GETL R5, t40
+ 51: ADCL $0xFFFFFFF8, t40 (-wCa)
+ 52: PUTL t40, R5
+ 53: CMP0L t40, t42 (-rSo)
+ 54: ICRFL t42, $0x0, CR
+ 55: INCEIPL $4
+
+ 0xFED8840: 8124001C lwz r9,28(r4)
+ 56: GETL R4, t44
+ 57: ADDL $0x1C, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R9
+ 60: INCEIPL $4
+
+ 0xFED8844: 9003001C stw r0,28(r3)
+ 61: GETL R0, t48
+ 62: GETL R3, t50
+ 63: ADDL $0x1C, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0xFED8848: 38840020 addi r4,r4,32
+ 66: GETL R4, t52
+ 67: ADDL $0x20, t52
+ 68: PUTL t52, R4
+ 69: INCEIPL $4
+
+ 0xFED884C: 38630020 addi r3,r3,32
+ 70: GETL R3, t54
+ 71: ADDL $0x20, t54
+ 72: PUTL t54, R3
+ 73: INCEIPL $4
+
+ 0xFED8850: 40A2FFB4 bc 5,2,0xFED8804
+ 74: Jc02o $0xFED8804
+
+
+
+. 1977 FED8814 64
+. 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+==== BB 1978 (0xFED8804) approx BBs exec'd 0 ====
+
+ 0xFED8804: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFED8808: 91230000 stw r9,0(r3)
+ 4: GETL R9, t4
+ 5: GETL R3, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0xFED880C: 81240004 lwz r9,4(r4)
+ 8: GETL R4, t8
+ 9: ADDL $0x4, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R9
+ 12: INCEIPL $4
+
+ 0xFED8810: 90030004 stw r0,4(r3)
+ 13: GETL R0, t12
+ 14: GETL R3, t14
+ 15: ADDL $0x4, t14
+ 16: STL t12, (t14)
+ 17: INCEIPL $4
+
+ 0xFED8814: 80040008 lwz r0,8(r4)
+ 18: GETL R4, t16
+ 19: ADDL $0x8, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R0
+ 22: INCEIPL $4
+
+ 0xFED8818: 91230008 stw r9,8(r3)
+ 23: GETL R9, t20
+ 24: GETL R3, t22
+ 25: ADDL $0x8, t22
+ 26: STL t20, (t22)
+ 27: INCEIPL $4
+
+ 0xFED881C: 8124000C lwz r9,12(r4)
+ 28: GETL R4, t24
+ 29: ADDL $0xC, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R9
+ 32: INCEIPL $4
+
+ 0xFED8820: 9003000C stw r0,12(r3)
+ 33: GETL R0, t28
+ 34: GETL R3, t30
+ 35: ADDL $0xC, t30
+ 36: STL t28, (t30)
+ 37: INCEIPL $4
+
+ 0xFED8824: 80040010 lwz r0,16(r4)
+ 38: GETL R4, t32
+ 39: ADDL $0x10, t32
+ 40: LDL (t32), t34
+ 41: PUTL t34, R0
+ 42: INCEIPL $4
+
+ 0xFED8828: 91230010 stw r9,16(r3)
+ 43: GETL R9, t36
+ 44: GETL R3, t38
+ 45: ADDL $0x10, t38
+ 46: STL t36, (t38)
+ 47: INCEIPL $4
+
+ 0xFED882C: 81240014 lwz r9,20(r4)
+ 48: GETL R4, t40
+ 49: ADDL $0x14, t40
+ 50: LDL (t40), t42
+ 51: PUTL t42, R9
+ 52: INCEIPL $4
+
+ 0xFED8830: 90030014 stw r0,20(r3)
+ 53: GETL R0, t44
+ 54: GETL R3, t46
+ 55: ADDL $0x14, t46
+ 56: STL t44, (t46)
+ 57: INCEIPL $4
+
+ 0xFED8834: 80040018 lwz r0,24(r4)
+ 58: GETL R4, t48
+ 59: ADDL $0x18, t48
+ 60: LDL (t48), t50
+ 61: PUTL t50, R0
+ 62: INCEIPL $4
+
+ 0xFED8838: 91230018 stw r9,24(r3)
+ 63: GETL R9, t52
+ 64: GETL R3, t54
+ 65: ADDL $0x18, t54
+ 66: STL t52, (t54)
+ 67: INCEIPL $4
+
+ 0xFED883C: 34A5FFF8 addic. r5,r5,-8
+ 68: GETL R5, t56
+ 69: ADCL $0xFFFFFFF8, t56 (-wCa)
+ 70: PUTL t56, R5
+ 71: CMP0L t56, t58 (-rSo)
+ 72: ICRFL t58, $0x0, CR
+ 73: INCEIPL $4
+
+ 0xFED8840: 8124001C lwz r9,28(r4)
+ 74: GETL R4, t60
+ 75: ADDL $0x1C, t60
+ 76: LDL (t60), t62
+ 77: PUTL t62, R9
+ 78: INCEIPL $4
+
+ 0xFED8844: 9003001C stw r0,28(r3)
+ 79: GETL R0, t64
+ 80: GETL R3, t66
+ 81: ADDL $0x1C, t66
+ 82: STL t64, (t66)
+ 83: INCEIPL $4
+
+ 0xFED8848: 38840020 addi r4,r4,32
+ 84: GETL R4, t68
+ 85: ADDL $0x20, t68
+ 86: PUTL t68, R4
+ 87: INCEIPL $4
+
+ 0xFED884C: 38630020 addi r3,r3,32
+ 88: GETL R3, t70
+ 89: ADDL $0x20, t70
+ 90: PUTL t70, R3
+ 91: INCEIPL $4
+
+ 0xFED8850: 40A2FFB4 bc 5,2,0xFED8804
+ 92: Jc02o $0xFED8804
+
+
+
+. 1978 FED8804 80
+. 80 04 00 00 91 23 00 00 81 24 00 04 90 03 00 04 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+==== BB 1979 (0xFE93148) approx BBs exec'd 0 ====
+
+ 0xFE93148: 80E10000 lwz r7,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0xFE9314C: 82E70004 lwz r23,4(r7)
+ 4: GETL R7, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R23
+ 8: INCEIPL $4
+
+ 0xFE93150: 82C7FFD8 lwz r22,-40(r7)
+ 9: GETL R7, t8
+ 10: ADDL $0xFFFFFFD8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R22
+ 13: INCEIPL $4
+
+ 0xFE93154: 7EE803A6 mtlr r23
+ 14: GETL R23, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0xFE93158: 8307FFE0 lwz r24,-32(r7)
+ 17: GETL R7, t14
+ 18: ADDL $0xFFFFFFE0, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R24
+ 21: INCEIPL $4
+
+ 0xFE9315C: 82E7FFDC lwz r23,-36(r7)
+ 22: GETL R7, t18
+ 23: ADDL $0xFFFFFFDC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R23
+ 26: INCEIPL $4
+
+ 0xFE93160: 8327FFE4 lwz r25,-28(r7)
+ 27: GETL R7, t22
+ 28: ADDL $0xFFFFFFE4, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R25
+ 31: INCEIPL $4
+
+ 0xFE93164: 8347FFE8 lwz r26,-24(r7)
+ 32: GETL R7, t26
+ 33: ADDL $0xFFFFFFE8, t26
+ 34: LDL (t26), t28
+ 35: PUTL t28, R26
+ 36: INCEIPL $4
+
+ 0xFE93168: 8367FFEC lwz r27,-20(r7)
+ 37: GETL R7, t30
+ 38: ADDL $0xFFFFFFEC, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R27
+ 41: INCEIPL $4
+
+ 0xFE9316C: 8387FFF0 lwz r28,-16(r7)
+ 42: GETL R7, t34
+ 43: ADDL $0xFFFFFFF0, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R28
+ 46: INCEIPL $4
+
+ 0xFE93170: 83A7FFF4 lwz r29,-12(r7)
+ 47: GETL R7, t38
+ 48: ADDL $0xFFFFFFF4, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R29
+ 51: INCEIPL $4
+
+ 0xFE93174: 83C7FFF8 lwz r30,-8(r7)
+ 52: GETL R7, t42
+ 53: ADDL $0xFFFFFFF8, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R30
+ 56: INCEIPL $4
+
+ 0xFE93178: 83E7FFFC lwz r31,-4(r7)
+ 57: GETL R7, t46
+ 58: ADDL $0xFFFFFFFC, t46
+ 59: LDL (t46), t48
+ 60: PUTL t48, R31
+ 61: INCEIPL $4
+
+ 0xFE9317C: 7CE13B78 or r1,r7,r7
+ 62: GETL R7, t50
+ 63: PUTL t50, R1
+ 64: INCEIPL $4
+
+ 0xFE93180: 4E800020 blr
+ 65: GETL LR, t52
+ 66: JMPo-r t52 ($4)
+
+
+
+. 1979 FE93148 60
+. 80 E1 00 00 82 E7 00 04 82 C7 FF D8 7E E8 03 A6 83 07 FF E0 82 E7 FF DC 83 27 FF E4 83 47 FF E8 83 67 FF EC 83 87 FF F0 83 A7 FF F4 83 C7 FF F8 83 E7 FF FC 7C E1 3B 78 4E 80 00 20
+==== BB 1980 (0xFE87EF8) approx BBs exec'd 0 ====
+
+ 0xFE87EF8: 7C9AA800 cmp cr1,r26,r21
+ 0: GETL R26, t0
+ 1: GETL R21, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFE87EFC: 83710000 lwz r27,0(r17)
+ 5: GETL R17, t6
+ 6: LDL (t6), t8
+ 7: PUTL t8, R27
+ 8: INCEIPL $4
+
+ 0xFE87F00: 7F71DB78 or r17,r27,r27
+ 9: GETL R27, t10
+ 10: PUTL t10, R17
+ 11: INCEIPL $4
+
+ 0xFE87F04: 4084017C bc 4,4,0xFE88080
+ 12: Jc04o $0xFE88080
+
+
+
+. 1980 FE87EF8 16
+. 7C 9A A8 00 83 71 00 00 7F 71 DB 78 40 84 01 7C
+==== BB 1981 (0xFE87F08) approx BBs exec'd 0 ====
+
+ 0xFE87F08: 819E0134 lwz r12,308(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x134, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFE87F0C: 3B14FFFF addi r24,r20,-1
+ 5: GETL R20, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R24
+ 8: INCEIPL $4
+
+ 0xFE87F10: 2E1B0000 cmpi cr4,r27,0
+ 9: GETL R27, t6
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x4, CR
+ 12: INCEIPL $4
+
+ 0xFE87F14: 931F01B0 stw r24,432(r31)
+ 13: GETL R24, t10
+ 14: GETL R31, t12
+ 15: ADDL $0x1B0, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE87F18: 919F01B4 stw r12,436(r31)
+ 18: GETL R12, t14
+ 19: GETL R31, t16
+ 20: ADDL $0x1B4, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFE87F1C: 3B3F0008 addi r25,r31,8
+ 23: GETL R31, t18
+ 24: ADDL $0x8, t18
+ 25: PUTL t18, R25
+ 26: INCEIPL $4
+
+ 0xFE87F20: 7F10C0F8 nor r16,r24,r24
+ 27: GETL R24, t20
+ 28: NOTL t20
+ 29: PUTL t20, R16
+ 30: INCEIPL $4
+
+ 0xFE87F24: 41920460 bc 12,18,0xFE88384
+ 31: Js18o $0xFE88384
+
+
+
+. 1981 FE87F08 32
+. 81 9E 01 34 3B 14 FF FF 2E 1B 00 00 93 1F 01 B0 91 9F 01 B4 3B 3F 00 08 7F 10 C0 F8 41 92 04 60
+==== BB 1982 (0xFE87F28) approx BBs exec'd 0 ====
+
+ 0xFE87F28: 57582036 rlwinm r24,r26,4,0,27
+ 0: GETL R26, t0
+ 1: SHLL $0x4, t0
+ 2: PUTL t0, R24
+ 3: INCEIPL $4
+
+ 0xFE87F2C: 7D18CA14 add r8,r24,r25
+ 4: GETL R24, t2
+ 5: GETL R25, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0xFE87F30: 38E80078 addi r7,r8,120
+ 9: GETL R8, t6
+ 10: ADDL $0x78, t6
+ 11: PUTL t6, R7
+ 12: INCEIPL $4
+
+ 0xFE87F34: 839B0004 lwz r28,4(r27)
+ 13: GETL R27, t8
+ 14: ADDL $0x4, t8
+ 15: LDL (t8), t10
+ 16: PUTL t10, R28
+ 17: INCEIPL $4
+
+ 0xFE87F38: 807B0008 lwz r3,8(r27)
+ 18: GETL R27, t12
+ 19: ADDL $0x8, t12
+ 20: LDL (t12), t14
+ 21: PUTL t14, R3
+ 22: INCEIPL $4
+
+ 0xFE87F3C: 80880078 lwz r4,120(r8)
+ 23: GETL R8, t16
+ 24: ADDL $0x78, t16
+ 25: LDL (t16), t18
+ 26: PUTL t18, R4
+ 27: INCEIPL $4
+
+ 0xFE87F40: 80C70004 lwz r6,4(r7)
+ 28: GETL R7, t20
+ 29: ADDL $0x4, t20
+ 30: LDL (t20), t22
+ 31: PUTL t22, R6
+ 32: INCEIPL $4
+
+ 0xFE87F44: 7D3C1A14 add r9,r28,r3
+ 33: GETL R28, t24
+ 34: GETL R3, t26
+ 35: ADDL t24, t26
+ 36: PUTL t26, R9
+ 37: INCEIPL $4
+
+ 0xFE87F48: 7C043214 add r0,r4,r6
+ 38: GETL R4, t28
+ 39: GETL R6, t30
+ 40: ADDL t28, t30
+ 41: PUTL t30, R0
+ 42: INCEIPL $4
+
+ 0xFE87F4C: 7C090040 cmpl cr0,r9,r0
+ 43: GETL R9, t32
+ 44: GETL R0, t34
+ 45: CMPUL t32, t34, t36 (-rSo)
+ 46: ICRFL t36, $0x0, CR
+ 47: INCEIPL $4
+
+ 0xFE87F50: 41810438 bc 12,1,0xFE88388
+ 48: Js01o $0xFE88388
+
+
+
+. 1982 FE87F28 44
+. 57 58 20 36 7D 18 CA 14 38 E8 00 78 83 9B 00 04 80 7B 00 08 80 88 00 78 80 C7 00 04 7D 3C 1A 14 7C 04 32 14 7C 09 00 40 41 81 04 38
+==== BB 1983 (0xFE88388) approx BBs exec'd 0 ====
+
+ 0xFE88388: 41B2FBDC bc 13,18,0xFE87F64
+ 0: Js18o $0xFE87F64
+
+
+
+. 1983 FE88388 4
+. 41 B2 FB DC
+==== BB 1984 (0xFE8838C) approx BBs exec'd 0 ====
+
+ 0xFE8838C: 7CF8CA14 add r7,r24,r25
+ 0: GETL R24, t0
+ 1: GETL R25, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFE88390: 817B0004 lwz r11,4(r27)
+ 5: GETL R27, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0xFE88394: 81470078 lwz r10,120(r7)
+ 10: GETL R7, t8
+ 11: ADDL $0x78, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R10
+ 14: INCEIPL $4
+
+ 0xFE88398: 39070078 addi r8,r7,120
+ 15: GETL R7, t12
+ 16: ADDL $0x78, t12
+ 17: PUTL t12, R8
+ 18: INCEIPL $4
+
+ 0xFE8839C: 7F0B5040 cmpl cr6,r11,r10
+ 19: GETL R11, t14
+ 20: GETL R10, t16
+ 21: CMPUL t14, t16, t18 (-rSo)
+ 22: ICRFL t18, $0x6, CR
+ 23: INCEIPL $4
+
+ 0xFE883A0: 41B9FBC4 bc 13,25,0xFE87F64
+ 24: Js25o $0xFE87F64
+
+
+
+. 1984 FE8838C 24
+. 7C F8 CA 14 81 7B 00 04 81 47 00 78 39 07 00 78 7F 0B 50 40 41 B9 FB C4
+==== BB 1985 (0xFE883A4) approx BBs exec'd 0 ====
+
+ 0xFE883A4: 80E80004 lwz r7,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFE883A8: 83BB0008 lwz r29,8(r27)
+ 5: GETL R27, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0xFE883AC: 7ECA3A14 add r22,r10,r7
+ 10: GETL R10, t8
+ 11: GETL R7, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R22
+ 14: INCEIPL $4
+
+ 0xFE883B0: 7EEBEA14 add r23,r11,r29
+ 15: GETL R11, t12
+ 16: GETL R29, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R23
+ 19: INCEIPL $4
+
+ 0xFE883B4: 7F96B840 cmpl cr7,r22,r23
+ 20: GETL R22, t16
+ 21: GETL R23, t18
+ 22: CMPUL t16, t18, t20 (-rSo)
+ 23: ICRFL t20, $0x7, CR
+ 24: INCEIPL $4
+
+ 0xFE883B8: 41BDFBAC bc 13,29,0xFE87F64
+ 25: Js29o $0xFE87F64
+
+
+
+. 1985 FE883A4 24
+. 80 E8 00 04 83 BB 00 08 7E CA 3A 14 7E EB EA 14 7F 96 B8 40 41 BD FB AC
+==== BB 1986 (0xFE883BC) approx BBs exec'd 0 ====
+
+ 0xFE883BC: 80080008 lwz r0,8(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE883C0: 819B0000 lwz r12,0(r27)
+ 5: GETL R27, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R12
+ 8: INCEIPL $4
+
+ 0xFE883C4: 54051838 rlwinm r5,r0,3,0,28
+ 9: GETL R0, t8
+ 10: SHLL $0x3, t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0xFE883C8: 7F0C5214 add r24,r12,r10
+ 13: GETL R12, t10
+ 14: GETL R10, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R24
+ 17: INCEIPL $4
+
+ 0xFE883CC: 7D05CA14 add r8,r5,r25
+ 18: GETL R5, t14
+ 19: GETL R25, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R8
+ 22: INCEIPL $4
+
+ 0xFE883D0: 7D4BC050 subf r10,r11,r24
+ 23: GETL R11, t18
+ 24: GETL R24, t20
+ 25: SUBL t18, t20
+ 26: PUTL t20, R10
+ 27: INCEIPL $4
+
+ 0xFE883D4: 90E8000C stw r7,12(r8)
+ 28: GETL R7, t22
+ 29: GETL R8, t24
+ 30: ADDL $0xC, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0xFE883D8: 91480008 stw r10,8(r8)
+ 33: GETL R10, t26
+ 34: GETL R8, t28
+ 35: ADDL $0x8, t28
+ 36: STL t26, (t28)
+ 37: INCEIPL $4
+
+ 0xFE883DC: 4BFFFC98 b 0xFE88074
+ 38: JMPo $0xFE88074 ($4)
+
+
+
+. 1986 FE883BC 36
+. 80 08 00 08 81 9B 00 00 54 05 18 38 7F 0C 52 14 7D 05 CA 14 7D 4B C0 50 90 E8 00 0C 91 48 00 08 4B FF FC 98
+==== BB 1987 (0xFE88074) approx BBs exec'd 0 ====
+
+ 0xFE88074: 3B5A0001 addi r26,r26,1
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0xFE88078: 7F9AA800 cmp cr7,r26,r21
+ 4: GETL R26, t2
+ 5: GETL R21, t4
+ 6: CMPL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFE8807C: 419CFEA8 bc 12,28,0xFE87F24
+ 9: Js28o $0xFE87F24
+
+
+
+. 1987 FE88074 12
+. 3B 5A 00 01 7F 9A A8 00 41 9C FE A8
+==== BB 1988 (0xFE87F24) approx BBs exec'd 0 ====
+
+ 0xFE87F24: 41920460 bc 12,18,0xFE88384
+ 0: Js18o $0xFE88384
+
+
+
+. 1988 FE87F24 4
+. 41 92 04 60
+==== BB 1989 (0xFE88080) approx BBs exec'd 0 ====
+
+ 0xFE88080: 2E130000 cmpi cr4,r19,0
+ 0: GETL R19, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFE88084: 41900014 bc 12,16,0xFE88098
+ 4: Js16o $0xFE88098
+
+
+
+. 1989 FE88080 8
+. 2E 13 00 00 41 90 00 14
+==== BB 1990 (0xFE88088) approx BBs exec'd 0 ====
+
+ 0xFE88088: 7E639B78 or r3,r19,r19
+ 0: GETL R19, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8808C: 38000006 li r0,6
+ 3: MOVL $0x6, t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xFE88090: 44000002 sc
+ 6: JMPo-sys $0xFE88094 ($4)
+
+
+
+. 1990 FE88088 12
+. 7E 63 9B 78 38 00 00 06 44 00 00 02
+==== BB 1991 (0xFE88094) approx BBs exec'd 0 ====
+
+ 0xFE88094: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE88098: 3860003C li r3,60
+ 3: MOVL $0x3C, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFE8809C: 4812226D bl 0xFFAA308
+ 6: MOVL $0xFE880A0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFFAA308 ($4)
+
+
+
+. 1991 FE88094 12
+. 7C 00 00 26 38 60 00 3C 48 12 22 6D
+==== BB 1992 (0xFECF66C) approx BBs exec'd 0 ====
+
+ 0xFECF66C: 5729E8FE rlwinm r9,r25,29,3,31
+ 0: GETL R25, t0
+ 1: SHRL $0x3, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFECF670: 3809FFFE addi r0,r9,-2
+ 4: GETL R9, t2
+ 5: ADDL $0xFFFFFFFE, t2
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0xFECF674: 5406103A rlwinm r6,r0,2,0,29
+ 8: GETL R0, t4
+ 9: SHLL $0x2, t4
+ 10: PUTL t4, R6
+ 11: INCEIPL $4
+
+ 0xFECF678: 7D66E214 add r11,r6,r28
+ 12: GETL R6, t6
+ 13: GETL R28, t8
+ 14: ADDL t6, t8
+ 15: PUTL t8, R11
+ 16: INCEIPL $4
+
+ 0xFECF67C: 83AB0008 lwz r29,8(r11)
+ 17: GETL R11, t10
+ 18: ADDL $0x8, t10
+ 19: LDL (t10), t12
+ 20: PUTL t12, R29
+ 21: INCEIPL $4
+
+ 0xFECF680: 3B6B0008 addi r27,r11,8
+ 22: GETL R11, t14
+ 23: ADDL $0x8, t14
+ 24: PUTL t14, R27
+ 25: INCEIPL $4
+
+ 0xFECF684: 2D9D0000 cmpi cr3,r29,0
+ 26: GETL R29, t16
+ 27: CMP0L t16, t18 (-rSo)
+ 28: ICRFL t18, $0x3, CR
+ 29: INCEIPL $4
+
+ 0xFECF688: 418E009C bc 12,14,0xFECF724
+ 30: Js14o $0xFECF724
+
+
+
+. 1992 FECF66C 32
+. 57 29 E8 FE 38 09 FF FE 54 06 10 3A 7D 66 E2 14 83 AB 00 08 3B 6B 00 08 2D 9D 00 00 41 8E 00 9C
+==== BB 1993 (0xFECFEB0) approx BBs exec'd 0 ====
+
+ 0xFECFEB0: 829E05FC lwz r20,1532(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R20
+ 4: INCEIPL $4
+
+ 0xFECFEB4: 7D190050 subf r8,r25,r0
+ 5: GETL R25, t4
+ 6: GETL R0, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0xFECFEB8: 63310001 ori r17,r25,0x1
+ 10: GETL R25, t8
+ 11: ORL $0x1, t8
+ 12: PUTL t8, R17
+ 13: INCEIPL $4
+
+ 0xFECFEBC: 610A0001 ori r10,r8,0x1
+ 14: GETL R8, t10
+ 15: ORL $0x1, t10
+ 16: PUTL t10, R10
+ 17: INCEIPL $4
+
+ 0xFECFEC0: 7F93A278 xor r19,r28,r20
+ 18: GETL R28, t12
+ 19: GETL R20, t14
+ 20: XORL t12, t14
+ 21: PUTL t14, R19
+ 22: INCEIPL $4
+
+ 0xFECFEC4: 7DDDCA14 add r14,r29,r25
+ 23: GETL R29, t16
+ 24: GETL R25, t18
+ 25: ADDL t16, t18
+ 26: PUTL t18, R14
+ 27: INCEIPL $4
+
+ 0xFECFEC8: 3173FFFF addic r11,r19,-1
+ 28: GETL R19, t20
+ 29: ADCL $0xFFFFFFFF, t20 (-wCa)
+ 30: PUTL t20, R11
+ 31: INCEIPL $4
+
+ 0xFECFECC: 7E4B9910 subfe r18,r11,r19
+ 32: GETL R11, t22
+ 33: GETL R19, t24
+ 34: SBBL t22, t24 (-rCa-wCa)
+ 35: PUTL t24, R18
+ 36: INCEIPL $4
+
+ 0xFECFED0: 391D0008 addi r8,r29,8
+ 37: GETL R29, t26
+ 38: ADDL $0x8, t26
+ 39: PUTL t26, R8
+ 40: INCEIPL $4
+
+ 0xFECFED4: 5650103A rlwinm r16,r18,2,0,29
+ 41: GETL R18, t28
+ 42: SHLL $0x2, t28
+ 43: PUTL t28, R16
+ 44: INCEIPL $4
+
+ 0xFECFED8: 91DC0030 stw r14,48(r28)
+ 45: GETL R14, t30
+ 46: GETL R28, t32
+ 47: ADDL $0x30, t32
+ 48: STL t30, (t32)
+ 49: INCEIPL $4
+
+ 0xFECFEDC: 7E0F8B78 or r15,r16,r17
+ 50: GETL R16, t34
+ 51: GETL R17, t36
+ 52: ORL t36, t34
+ 53: PUTL t34, R15
+ 54: INCEIPL $4
+
+ 0xFECFEE0: 91FD0004 stw r15,4(r29)
+ 55: GETL R15, t38
+ 56: GETL R29, t40
+ 57: ADDL $0x4, t40
+ 58: STL t38, (t40)
+ 59: INCEIPL $4
+
+ 0xFECFEE4: 914E0004 stw r10,4(r14)
+ 60: GETL R10, t42
+ 61: GETL R14, t44
+ 62: ADDL $0x4, t44
+ 63: STL t42, (t44)
+ 64: INCEIPL $4
+
+ 0xFECFEE8: 4BFFF7C8 b 0xFECF6B0
+ 65: JMPo $0xFECF6B0 ($4)
+
+
+
+. 1993 FECFEB0 60
+. 82 9E 05 FC 7D 19 00 50 63 31 00 01 61 0A 00 01 7F 93 A2 78 7D DD CA 14 31 73 FF FF 7E 4B 99 10 39 1D 00 08 56 50 10 3A 91 DC 00 30 7E 0F 8B 78 91 FD 00 04 91 4E 00 04 4B FF F7 C8
+==== BB 1994 (0xFE880A0) approx BBs exec'd 0 ====
+
+ 0xFE880A0: 39200000 li r9,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0xFE880A4: 7C7A1B79 or. r26,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R26
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFE880A8: 41A2FD50 bc 13,2,0xFE87DF8
+ 8: Js02o $0xFE87DF8
+
+
+
+. 1994 FE880A0 12
+. 39 20 00 00 7C 7A 1B 79 41 A2 FD 50
+==== BB 1995 (0xFE880AC) approx BBs exec'd 0 ====
+
+ 0xFE880AC: 80720000 lwz r3,0(r18)
+ 0: GETL R18, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE880B0: 4804E6ED bl 0xFED679C
+ 4: MOVL $0xFE880B4, t4
+ 5: PUTL t4, LR
+ 6: JMPo-c $0xFED679C ($4)
+
+
+
+. 1995 FE880AC 8
+. 80 72 00 00 48 04 E6 ED
+==== BB 1996 strdup(0xFED679C) approx BBs exec'd 0 ====
+
+ 0xFED679C: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFED67A0: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFED67A4: 93810010 stw r28,16(r1)
+ 9: GETL R28, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFED67A8: 93A10014 stw r29,20(r1)
+ 14: GETL R29, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x14, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xFED67AC: 7C7D1B78 or r29,r3,r3
+ 19: GETL R3, t14
+ 20: PUTL t14, R29
+ 21: INCEIPL $4
+
+ 0xFED67B0: 90010024 stw r0,36(r1)
+ 22: GETL R0, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x24, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0xFED67B4: 93C10018 stw r30,24(r1)
+ 27: GETL R30, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x18, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFED67B8: 48000321 bl 0xFED6AD8
+ 32: MOVL $0xFED67BC, t24
+ 33: PUTL t24, LR
+ 34: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 1996 FED679C 32
+. 7C 08 02 A6 94 21 FF E0 93 81 00 10 93 A1 00 14 7C 7D 1B 78 90 01 00 24 93 C1 00 18 48 00 03 21
+==== BB 1997 (0xFED67BC) approx BBs exec'd 0 ====
+
+ 0xFED67BC: 3B830001 addi r28,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0xFED67C0: 7F83E378 or r3,r28,r28
+ 4: GETL R28, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0xFED67C4: 480D3B45 bl 0xFFAA308
+ 7: MOVL $0xFED67C8, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0xFFAA308 ($4)
+
+
+
+. 1997 FED67BC 12
+. 3B 83 00 01 7F 83 E3 78 48 0D 3B 45
+==== BB 1998 (0xFECF68C) approx BBs exec'd 0 ====
+
+ 0xFECF68C: 815D0004 lwz r10,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFECF690: 3B9D0008 addi r28,r29,8
+ 5: GETL R29, t4
+ 6: ADDL $0x8, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0xFECF694: 5548E8FE rlwinm r8,r10,29,3,31
+ 9: GETL R10, t6
+ 10: SHRL $0x3, t6
+ 11: PUTL t6, R8
+ 12: INCEIPL $4
+
+ 0xFECF698: 38E8FFFE addi r7,r8,-2
+ 13: GETL R8, t8
+ 14: ADDL $0xFFFFFFFE, t8
+ 15: PUTL t8, R7
+ 16: INCEIPL $4
+
+ 0xFECF69C: 7E070000 cmp cr4,r7,r0
+ 17: GETL R7, t10
+ 18: GETL R0, t12
+ 19: CMPL t10, t12, t14 (-rSo)
+ 20: ICRFL t14, $0x4, CR
+ 21: INCEIPL $4
+
+ 0xFECF6A0: 40920620 bc 4,18,0xFECFCC0
+ 22: Jc18o $0xFECFCC0
+
+
+
+. 1998 FECF68C 24
+. 81 5D 00 04 3B 9D 00 08 55 48 E8 FE 38 E8 FF FE 7E 07 00 00 40 92 06 20
+==== BB 1999 (0xFECF6A4) approx BBs exec'd 0 ====
+
+ 0xFECF6A4: 823D0008 lwz r17,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R17
+ 4: INCEIPL $4
+
+ 0xFECF6A8: 7F88E378 or r8,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0xFECF6AC: 923B0000 stw r17,0(r27)
+ 8: GETL R17, t6
+ 9: GETL R27, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFECF6B0: 83810074 lwz r28,116(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x74, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R28
+ 16: INCEIPL $4
+
+ 0xFECF6B4: 7D034378 or r3,r8,r8
+ 17: GETL R8, t14
+ 18: PUTL t14, R3
+ 19: INCEIPL $4
+
+ 0xFECF6B8: 81810024 lwz r12,36(r1)
+ 20: GETL R1, t16
+ 21: ADDL $0x24, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R12
+ 24: INCEIPL $4
+
+ 0xFECF6BC: 7F8803A6 mtlr r28
+ 25: GETL R28, t20
+ 26: PUTL t20, LR
+ 27: INCEIPL $4
+
+ 0xFECF6C0: 81C10028 lwz r14,40(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x28, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R14
+ 32: INCEIPL $4
+
+ 0xFECF6C4: 81E1002C lwz r15,44(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x2C, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R15
+ 37: INCEIPL $4
+
+ 0xFECF6C8: 7D818120 mtcrf 0x18,r12
+ 38: GETL R12, t30
+ 39: ICRFL t30, $0x3, CR
+ 40: ICRFL t30, $0x4, CR
+ 41: INCEIPL $4
+
+ 0xFECF6CC: 82010030 lwz r16,48(r1)
+ 42: GETL R1, t32
+ 43: ADDL $0x30, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R16
+ 46: INCEIPL $4
+
+ 0xFECF6D0: 82210034 lwz r17,52(r1)
+ 47: GETL R1, t36
+ 48: ADDL $0x34, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R17
+ 51: INCEIPL $4
+
+ 0xFECF6D4: 82410038 lwz r18,56(r1)
+ 52: GETL R1, t40
+ 53: ADDL $0x38, t40
+ 54: LDL (t40), t42
+ 55: PUTL t42, R18
+ 56: INCEIPL $4
+
+ 0xFECF6D8: 8261003C lwz r19,60(r1)
+ 57: GETL R1, t44
+ 58: ADDL $0x3C, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R19
+ 61: INCEIPL $4
+
+ 0xFECF6DC: 82810040 lwz r20,64(r1)
+ 62: GETL R1, t48
+ 63: ADDL $0x40, t48
+ 64: LDL (t48), t50
+ 65: PUTL t50, R20
+ 66: INCEIPL $4
+
+ 0xFECF6E0: 82A10044 lwz r21,68(r1)
+ 67: GETL R1, t52
+ 68: ADDL $0x44, t52
+ 69: LDL (t52), t54
+ 70: PUTL t54, R21
+ 71: INCEIPL $4
+
+ 0xFECF6E4: 82C10048 lwz r22,72(r1)
+ 72: GETL R1, t56
+ 73: ADDL $0x48, t56
+ 74: LDL (t56), t58
+ 75: PUTL t58, R22
+ 76: INCEIPL $4
+
+ 0xFECF6E8: 82E1004C lwz r23,76(r1)
+ 77: GETL R1, t60
+ 78: ADDL $0x4C, t60
+ 79: LDL (t60), t62
+ 80: PUTL t62, R23
+ 81: INCEIPL $4
+
+ 0xFECF6EC: 83010050 lwz r24,80(r1)
+ 82: GETL R1, t64
+ 83: ADDL $0x50, t64
+ 84: LDL (t64), t66
+ 85: PUTL t66, R24
+ 86: INCEIPL $4
+
+ 0xFECF6F0: 83210054 lwz r25,84(r1)
+ 87: GETL R1, t68
+ 88: ADDL $0x54, t68
+ 89: LDL (t68), t70
+ 90: PUTL t70, R25
+ 91: INCEIPL $4
+
+ 0xFECF6F4: 83410058 lwz r26,88(r1)
+ 92: GETL R1, t72
+ 93: ADDL $0x58, t72
+ 94: LDL (t72), t74
+ 95: PUTL t74, R26
+ 96: INCEIPL $4
+
+ 0xFECF6F8: 8361005C lwz r27,92(r1)
+ 97: GETL R1, t76
+ 98: ADDL $0x5C, t76
+ 99: LDL (t76), t78
+ 100: PUTL t78, R27
+ 101: INCEIPL $4
+
+ 0xFECF6FC: 83810060 lwz r28,96(r1)
+ 102: GETL R1, t80
+ 103: ADDL $0x60, t80
+ 104: LDL (t80), t82
+ 105: PUTL t82, R28
+ 106: INCEIPL $4
+
+ 0xFECF700: 83A10064 lwz r29,100(r1)
+ 107: GETL R1, t84
+ 108: ADDL $0x64, t84
+ 109: LDL (t84), t86
+ 110: PUTL t86, R29
+ 111: INCEIPL $4
+
+ 0xFECF704: 83C10068 lwz r30,104(r1)
+ 112: GETL R1, t88
+ 113: ADDL $0x68, t88
+ 114: LDL (t88), t90
+ 115: PUTL t90, R30
+ 116: INCEIPL $4
+
+ 0xFECF708: 83E1006C lwz r31,108(r1)
+ 117: GETL R1, t92
+ 118: ADDL $0x6C, t92
+ 119: LDL (t92), t94
+ 120: PUTL t94, R31
+ 121: INCEIPL $4
+
+ 0xFECF70C: 38210070 addi r1,r1,112
+ 122: GETL R1, t96
+ 123: ADDL $0x70, t96
+ 124: PUTL t96, R1
+ 125: INCEIPL $4
+
+ 0xFECF710: 4E800020 blr
+ 126: GETL LR, t98
+ 127: JMPo-r t98 ($4)
+
+
+
+. 1999 FECF6A4 112
+. 82 3D 00 08 7F 88 E3 78 92 3B 00 00 83 81 00 74 7D 03 43 78 81 81 00 24 7F 88 03 A6 81 C1 00 28 81 E1 00 2C 7D 81 81 20 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
+==== BB 2000 (0xFED67C8) approx BBs exec'd 0 ====
+
+ 0xFED67C8: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFED67CC: 2F830000 cmpi cr7,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x7, CR
+ 6: INCEIPL $4
+
+ 0xFED67D0: 7F85E378 or r5,r28,r28
+ 7: GETL R28, t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFED67D4: 38000000 li r0,0
+ 10: MOVL $0x0, t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0xFED67D8: 419E000C bc 12,30,0xFED67E4
+ 13: Js30o $0xFED67E4
+
+
+
+. 2000 FED67C8 20
+. 7F A4 EB 78 2F 83 00 00 7F 85 E3 78 38 00 00 00 41 9E 00 0C
+==== BB 2001 (0xFED67DC) approx BBs exec'd 0 ====
+
+ 0xFED67DC: 48001EFD bl 0xFED86D8
+ 0: MOVL $0xFED67E0, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 2001 FED67DC 4
+. 48 00 1E FD
+==== BB 2002 (0xFED876C) approx BBs exec'd 0 ====
+
+ 0xFED876C: 88FD0000 lbz r7,0(r29)
+ 0: GETL R29, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0xFED8770: 3BBD0001 addi r29,r29,1
+ 4: GETL R29, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFED8774: 98FF0000 stb r7,0(r31)
+ 8: GETL R7, t6
+ 9: GETL R31, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFED8778: 3BFF0001 addi r31,r31,1
+ 12: GETL R31, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R31
+ 15: INCEIPL $4
+
+ 0xFED877C: 4200FFF0 bc 16,0,0xFED876C
+ 16: GETL CTR, t12
+ 17: ADDL $0xFFFFFFFF, t12
+ 18: PUTL t12, CTR
+ 19: JIFZL t12, $0xFED8780
+ 20: JMPo $0xFED876C ($4)
+
+
+
+. 2002 FED876C 20
+. 88 FD 00 00 3B BD 00 01 98 FF 00 00 3B FF 00 01 42 00 FF F0
+==== BB 2003 (0xFED67E0) approx BBs exec'd 0 ====
+
+ 0xFED67E0: 7C601B78 or r0,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFED67E4: 80810024 lwz r4,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFED67E8: 7C030378 or r3,r0,r0
+ 8: GETL R0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFED67EC: 83810010 lwz r28,16(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x10, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R28
+ 15: INCEIPL $4
+
+ 0xFED67F0: 83A10014 lwz r29,20(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x14, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R29
+ 20: INCEIPL $4
+
+ 0xFED67F4: 7C8803A6 mtlr r4
+ 21: GETL R4, t16
+ 22: PUTL t16, LR
+ 23: INCEIPL $4
+
+ 0xFED67F8: 83C10018 lwz r30,24(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x18, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R30
+ 28: INCEIPL $4
+
+ 0xFED67FC: 38210020 addi r1,r1,32
+ 29: GETL R1, t22
+ 30: ADDL $0x20, t22
+ 31: PUTL t22, R1
+ 32: INCEIPL $4
+
+ 0xFED6800: 4E800020 blr
+ 33: GETL LR, t24
+ 34: JMPo-r t24 ($4)
+
+
+
+. 2003 FED67E0 36
+. 7C 60 1B 78 80 81 00 24 7C 03 03 78 83 81 00 10 83 A1 00 14 7C 88 03 A6 83 C1 00 18 38 21 00 20 4E 80 00 20
+==== BB 2004 (0xFE880B4) approx BBs exec'd 0 ====
+
+ 0xFE880B4: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE880B8: 907A0004 stw r3,4(r26)
+ 4: GETL R3, t4
+ 5: GETL R26, t6
+ 6: ADDL $0x4, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFE880BC: 4186044C bc 12,6,0xFE88508
+ 9: Js06o $0xFE88508
+
+
+
+. 2004 FE880B4 12
+. 2C 83 00 00 90 7A 00 04 41 86 04 4C
+==== BB 2005 (0xFE880C0) approx BBs exec'd 0 ====
+
+ 0xFE880C0: 822F0000 lwz r17,0(r15)
+ 0: GETL R15, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R17
+ 3: INCEIPL $4
+
+ 0xFE880C4: 3B800000 li r28,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R28
+ 6: INCEIPL $4
+
+ 0xFE880C8: 3B000002 li r24,2
+ 7: MOVL $0x2, t6
+ 8: PUTL t6, R24
+ 9: INCEIPL $4
+
+ 0xFE880CC: 3B20FFFF li r25,-1
+ 10: MOVL $0xFFFFFFFF, t8
+ 11: PUTL t8, R25
+ 12: INCEIPL $4
+
+ 0xFE880D0: 923A0000 stw r17,0(r26)
+ 13: GETL R17, t10
+ 14: GETL R26, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0xFE880D4: 3BBA0008 addi r29,r26,8
+ 17: GETL R26, t14
+ 18: ADDL $0x8, t14
+ 19: PUTL t14, R29
+ 20: INCEIPL $4
+
+ 0xFE880D8: 934F0000 stw r26,0(r15)
+ 21: GETL R26, t16
+ 22: GETL R15, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0xFE880DC: 3B7F0008 addi r27,r31,8
+ 25: GETL R31, t20
+ 26: ADDL $0x8, t20
+ 27: PUTL t20, R27
+ 28: INCEIPL $4
+
+ 0xFE880E0: 2F1C0006 cmpi cr6,r28,6
+ 29: GETL R28, t22
+ 30: MOVL $0x6, t26
+ 31: CMPL t22, t26, t24 (-rSo)
+ 32: ICRFL t24, $0x6, CR
+ 33: INCEIPL $4
+
+ 0xFE880E4: 7F83E378 or r3,r28,r28
+ 34: GETL R28, t28
+ 35: PUTL t28, R3
+ 36: INCEIPL $4
+
+ 0xFE880E8: 3B9C0001 addi r28,r28,1
+ 37: MOVL $0x1, t30
+ 38: PUTL t30, R28
+ 39: INCEIPL $4
+
+ 0xFE880EC: 419A002C bc 12,26,0xFE88118
+ 40: Js26o $0xFE88118
+
+
+
+. 2005 FE880C0 48
+. 82 2F 00 00 3B 80 00 00 3B 00 00 02 3B 20 FF FF 92 3A 00 00 3B BA 00 08 93 4F 00 00 3B 7F 00 08 2F 1C 00 06 7F 83 E3 78 3B 9C 00 01 41 9A 00 2C
+==== BB 2006 (0xFE880F0) approx BBs exec'd 0 ====
+
+ 0xFE880F0: 809B0008 lwz r4,8(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE880F4: 80BB000C lwz r5,12(r27)
+ 5: GETL R27, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFE880F8: 4BFFF579 bl 0xFE87670
+ 10: MOVL $0xFE880FC, t8
+ 11: PUTL t8, LR
+ 12: JMPo-c $0xFE87670 ($4)
+
+
+
+. 2006 FE880F0 12
+. 80 9B 00 08 80 BB 00 0C 4B FF F5 79
+==== BB 2007 _nl_intern_locale_data(0xFE87670) approx BBs exec'd 0 ====
+
+ 0xFE87670: 2B850007 cmpli cr7,r5,7
+ 0: GETL R5, t0
+ 1: MOVL $0x7, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE87674: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xFE87678: 9421FFE0 stwu r1,-32(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFFE0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFE8767C: 481207D5 bl 0xFFA7E50
+ 14: MOVL $0xFE87680, t12
+ 15: PUTL t12, LR
+ 16: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2007 FE87670 16
+. 2B 85 00 07 7C 08 02 A6 94 21 FF E0 48 12 07 D5
+==== BB 2008 (0xFE87680) approx BBs exec'd 0 ====
+
+ 0xFE87680: 93810010 stw r28,16(r1)
+ 0: GETL R28, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x10, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE87684: 7C7C1B78 or r28,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFE87688: 93A10014 stw r29,20(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE8768C: 7C9D2378 or r29,r4,r4
+ 13: GETL R4, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0xFE87690: 93C10018 stw r30,24(r1)
+ 16: GETL R30, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x18, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFE87694: 7FC802A6 mflr r30
+ 21: GETL LR, t16
+ 22: PUTL t16, R30
+ 23: INCEIPL $4
+
+ 0xFE87698: 93E1001C stw r31,28(r1)
+ 24: GETL R31, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x1C, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xFE8769C: 7CBF2B78 or r31,r5,r5
+ 29: GETL R5, t22
+ 30: PUTL t22, R31
+ 31: INCEIPL $4
+
+ 0xFE876A0: 9361000C stw r27,12(r1)
+ 32: GETL R27, t24
+ 33: GETL R1, t26
+ 34: ADDL $0xC, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xFE876A4: 90010024 stw r0,36(r1)
+ 37: GETL R0, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x24, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFE876A8: 409D0188 bc 4,29,0xFE87830
+ 42: Jc29o $0xFE87830
+
+
+
+. 2008 FE87680 44
+. 93 81 00 10 7C 7C 1B 78 93 A1 00 14 7C 9D 23 78 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 7C BF 2B 78 93 61 00 0C 90 01 00 24 40 9D 01 88
+==== BB 2009 (0xFE876AC) approx BBs exec'd 0 ====
+
+ 0xFE876AC: 6C642003 xoris r4,r3,0x2003
+ 0: GETL R3, t0
+ 1: XORL $0x20030000, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0xFE876B0: 813D0000 lwz r9,0(r29)
+ 4: GETL R29, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xFE876B4: 68831115 xori r3,r4,0x1115
+ 8: GETL R4, t6
+ 9: XORL $0x1115, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0xFE876B8: 7C091800 cmp cr0,r9,r3
+ 12: GETL R9, t8
+ 13: GETL R3, t10
+ 14: CMPL t8, t10, t12 (-rSo)
+ 15: ICRFL t12, $0x0, CR
+ 16: INCEIPL $4
+
+ 0xFE876BC: 40820174 bc 4,2,0xFE87830
+ 17: Jc02o $0xFE87830
+
+
+
+. 2009 FE876AC 20
+. 6C 64 20 03 81 3D 00 00 68 83 11 15 7C 09 18 00 40 82 01 74
+==== BB 2010 (0xFE876C0) approx BBs exec'd 0 ====
+
+ 0xFE876C0: 80DE0114 lwz r6,276(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x114, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFE876C4: 579B103A rlwinm r27,r28,2,0,29
+ 5: GETL R28, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R27
+ 8: INCEIPL $4
+
+ 0xFE876C8: 807D0004 lwz r3,4(r29)
+ 9: GETL R29, t6
+ 10: ADDL $0x4, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0xFE876CC: 7CBB302E lwzx r5,r27,r6
+ 14: GETL R6, t10
+ 15: GETL R27, t12
+ 16: ADDL t12, t10
+ 17: LDL (t10), t14
+ 18: PUTL t14, R5
+ 19: INCEIPL $4
+
+ 0xFE876D0: 7C832840 cmpl cr1,r3,r5
+ 20: GETL R3, t16
+ 21: GETL R5, t18
+ 22: CMPUL t16, t18, t20 (-rSo)
+ 23: ICRFL t20, $0x1, CR
+ 24: INCEIPL $4
+
+ 0xFE876D4: 4184015C bc 12,4,0xFE87830
+ 25: Js04o $0xFE87830
+
+
+
+. 2010 FE876C0 24
+. 80 DE 01 14 57 9B 10 3A 80 7D 00 04 7C BB 30 2E 7C 83 28 40 41 84 01 5C
+==== BB 2011 (0xFE876D8) approx BBs exec'd 0 ====
+
+ 0xFE876D8: 5463103A rlwinm r3,r3,2,0,29
+ 0: GETL R3, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFE876DC: 38E30008 addi r7,r3,8
+ 4: GETL R3, t2
+ 5: ADDL $0x8, t2
+ 6: PUTL t2, R7
+ 7: INCEIPL $4
+
+ 0xFE876E0: 7F07F840 cmpl cr6,r7,r31
+ 8: GETL R7, t4
+ 9: GETL R31, t6
+ 10: CMPUL t4, t6, t8 (-rSo)
+ 11: ICRFL t8, $0x6, CR
+ 12: INCEIPL $4
+
+ 0xFE876E4: 4098014C bc 4,24,0xFE87830
+ 13: Jc24o $0xFE87830
+
+
+
+. 2011 FE876D8 16
+. 54 63 10 3A 38 E3 00 08 7F 07 F8 40 40 98 01 4C
+==== BB 2012 (0xFE876E8) approx BBs exec'd 0 ====
+
+ 0xFE876E8: 38630024 addi r3,r3,36
+ 0: GETL R3, t0
+ 1: ADDL $0x24, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFE876EC: 48122C1D bl 0xFFAA308
+ 4: MOVL $0xFE876F0, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0xFFAA308 ($4)
+
+
+
+. 2012 FE876E8 8
+. 38 63 00 24 48 12 2C 1D
+==== BB 2013 (0xFE876F0) approx BBs exec'd 0 ====
+
+ 0xFE876F0: 39600000 li r11,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFE876F4: 2F830000 cmpi cr7,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x7, CR
+ 6: INCEIPL $4
+
+ 0xFE876F8: 419E0110 bc 12,30,0xFE87808
+ 7: Js30o $0xFE87808
+
+
+
+. 2013 FE876F0 12
+. 39 60 00 00 2F 83 00 00 41 9E 01 10
+==== BB 2014 (0xFE876FC) approx BBs exec'd 0 ====
+
+ 0xFE876FC: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE87700: 7FE5FB78 or r5,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFE87704: 9003001C stw r0,28(r3)
+ 6: GETL R0, t4
+ 7: GETL R3, t6
+ 8: ADDL $0x1C, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0xFE87708: 38E00000 li r7,0
+ 11: MOVL $0x0, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0xFE8770C: 90030014 stw r0,20(r3)
+ 14: GETL R0, t10
+ 15: GETL R3, t12
+ 16: ADDL $0x14, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xFE87710: 90030018 stw r0,24(r3)
+ 19: GETL R0, t14
+ 20: GETL R3, t16
+ 21: ADDL $0x18, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFE87714: 819D0004 lwz r12,4(r29)
+ 24: GETL R29, t18
+ 25: ADDL $0x4, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R12
+ 28: INCEIPL $4
+
+ 0xFE87718: 93A30004 stw r29,4(r3)
+ 29: GETL R29, t22
+ 30: GETL R3, t24
+ 31: ADDL $0x4, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFE8771C: 280C0000 cmpli cr0,r12,0
+ 34: GETL R12, t26
+ 35: MOVL $0x0, t30
+ 36: CMPUL t26, t30, t28 (-rSo)
+ 37: ICRFL t28, $0x0, CR
+ 38: INCEIPL $4
+
+ 0xFE87720: 93E30008 stw r31,8(r3)
+ 39: GETL R31, t32
+ 40: GETL R3, t34
+ 41: ADDL $0x8, t34
+ 42: STL t32, (t34)
+ 43: INCEIPL $4
+
+ 0xFE87724: 90030010 stw r0,16(r3)
+ 44: GETL R0, t36
+ 45: GETL R3, t38
+ 46: ADDL $0x10, t38
+ 47: STL t36, (t38)
+ 48: INCEIPL $4
+
+ 0xFE87728: 91830020 stw r12,32(r3)
+ 49: GETL R12, t40
+ 50: GETL R3, t42
+ 51: ADDL $0x20, t42
+ 52: STL t40, (t42)
+ 53: INCEIPL $4
+
+ 0xFE8772C: 408100D8 bc 4,1,0xFE87804
+ 54: Jc01o $0xFE87804
+
+
+
+. 2014 FE876FC 52
+. 38 00 00 00 7F E5 FB 78 90 03 00 1C 38 E0 00 00 90 03 00 14 90 03 00 18 81 9D 00 04 93 A3 00 04 28 0C 00 00 93 E3 00 08 90 03 00 10 91 83 00 20 40 81 00 D8
+==== BB 2015 (0xFE87730) approx BBs exec'd 0 ====
+
+ 0xFE87730: 201C0000 subfic r0,r28,0
+ 0: GETL R28, t0
+ 1: MOVL $0x0, t2
+ 2: SBBL t0, t2 (-wCa)
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE87734: 7CC0E114 adde r6,r0,r28
+ 5: GETL R0, t4
+ 6: GETL R28, t6
+ 7: ADCL t4, t6 (-rCa-wCa)
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0xFE87738: 839E1C4C lwz r28,7244(r30)
+ 10: GETL R30, t8
+ 11: ADDL $0x1C4C, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R28
+ 14: INCEIPL $4
+
+ 0xFE8773C: 7FFC1214 add r31,r28,r2
+ 15: GETL R28, t12
+ 16: GETL R2, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R31
+ 19: INCEIPL $4
+
+ 0xFE87740: 809E0118 lwz r4,280(r30)
+ 20: GETL R30, t16
+ 21: ADDL $0x118, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R4
+ 24: INCEIPL $4
+
+ 0xFE87744: 39030024 addi r8,r3,36
+ 25: GETL R3, t20
+ 26: ADDL $0x24, t20
+ 27: PUTL t20, R8
+ 28: INCEIPL $4
+
+ 0xFE87748: 54EA103A rlwinm r10,r7,2,0,29
+ 29: GETL R7, t22
+ 30: SHLL $0x2, t22
+ 31: PUTL t22, R10
+ 32: INCEIPL $4
+
+ 0xFE8774C: 7D2AEA14 add r9,r10,r29
+ 33: GETL R10, t24
+ 34: GETL R29, t26
+ 35: ADDL t24, t26
+ 36: PUTL t26, R9
+ 37: INCEIPL $4
+
+ 0xFE87750: 21870046 subfic r12,r7,70
+ 38: GETL R7, t28
+ 39: MOVL $0x46, t30
+ 40: SBBL t28, t30 (-wCa)
+ 41: PUTL t30, R12
+ 42: INCEIPL $4
+
+ 0xFE87754: 7D8C6110 subfe r12,r12,r12
+ 43: GETL R12, t32
+ 44: GETL R12, t34
+ 45: SBBL t32, t34 (-rCa-wCa)
+ 46: PUTL t34, R12
+ 47: INCEIPL $4
+
+ 0xFE87758: 7D8C00D0 neg r12,r12
+ 48: GETL R12, t36
+ 49: NEGL t36
+ 50: PUTL t36, R12
+ 51: INCEIPL $4
+
+ 0xFE8775C: 81690008 lwz r11,8(r9)
+ 52: GETL R9, t38
+ 53: ADDL $0x8, t38
+ 54: LDL (t38), t40
+ 55: PUTL t40, R11
+ 56: INCEIPL $4
+
+ 0xFE87760: 7CC96039 and. r9,r6,r12
+ 57: GETL R6, t42
+ 58: GETL R12, t44
+ 59: ANDL t42, t44
+ 60: PUTL t44, R9
+ 61: CMP0L t44, t46 (-rSo)
+ 62: ICRFL t46, $0x0, CR
+ 63: INCEIPL $4
+
+ 0xFE87764: 7C855840 cmpl cr1,r5,r11
+ 64: GETL R5, t48
+ 65: GETL R11, t50
+ 66: CMPUL t48, t50, t52 (-rSo)
+ 67: ICRFL t52, $0x1, CR
+ 68: INCEIPL $4
+
+ 0xFE87768: 41840064 bc 12,4,0xFE877CC
+ 69: Js04o $0xFE877CC
+
+
+
+. 2015 FE87730 60
+. 20 1C 00 00 7C C0 E1 14 83 9E 1C 4C 7F FC 12 14 80 9E 01 18 39 03 00 24 54 EA 10 3A 7D 2A EA 14 21 87 00 46 7D 8C 61 10 7D 8C 00 D0 81 69 00 08 7C C9 60 39 7C 85 58 40 41 84 00 64
+==== BB 2016 (0xFE8776C) approx BBs exec'd 0 ====
+
+ 0xFE8776C: 40820018 bc 4,2,0xFE87784
+ 0: Jc02o $0xFE87784
+
+
+
+. 2016 FE8776C 4
+. 40 82 00 18
+==== BB 2017 (0xFE87770) approx BBs exec'd 0 ====
+
+ 0xFE87770: 7F9B202E lwzx r28,r27,r4
+ 0: GETL R4, t0
+ 1: GETL R27, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R28
+ 5: INCEIPL $4
+
+ 0xFE87774: 71600003 andi. r0,r11,0x3
+ 6: GETL R11, t6
+ 7: ANDL $0x3, t6
+ 8: PUTL t6, R0
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFE87778: 7CAAE02E lwzx r5,r10,r28
+ 12: GETL R28, t10
+ 13: GETL R10, t12
+ 14: ADDL t12, t10
+ 15: LDL (t10), t14
+ 16: PUTL t14, R5
+ 17: INCEIPL $4
+
+ 0xFE8777C: 2F050005 cmpi cr6,r5,5
+ 18: GETL R5, t16
+ 19: MOVL $0x5, t20
+ 20: CMPL t16, t20, t18 (-rSo)
+ 21: ICRFL t18, $0x6, CR
+ 22: INCEIPL $4
+
+ 0xFE87780: 419A00EC bc 12,26,0xFE8786C
+ 23: Js26o $0xFE8786C
+
+
+
+. 2017 FE87770 20
+. 7F 9B 20 2E 71 60 00 03 7C AA E0 2E 2F 05 00 05 41 9A 00 EC
+==== BB 2018 (0xFE87784) approx BBs exec'd 0 ====
+
+ 0xFE87784: 81430004 lwz r10,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFE87788: 7C0A5A14 add r0,r10,r11
+ 5: GETL R10, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFE8778C: 90080000 stw r0,0(r8)
+ 10: GETL R0, t8
+ 11: GETL R8, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFE87790: 38E70001 addi r7,r7,1
+ 14: GETL R7, t12
+ 15: ADDL $0x1, t12
+ 16: PUTL t12, R7
+ 17: INCEIPL $4
+
+ 0xFE87794: 81630020 lwz r11,32(r3)
+ 18: GETL R3, t14
+ 19: ADDL $0x20, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R11
+ 22: INCEIPL $4
+
+ 0xFE87798: 39080004 addi r8,r8,4
+ 23: GETL R8, t18
+ 24: ADDL $0x4, t18
+ 25: PUTL t18, R8
+ 26: INCEIPL $4
+
+ 0xFE8779C: 7F8B3840 cmpl cr7,r11,r7
+ 27: GETL R11, t20
+ 28: GETL R7, t22
+ 29: CMPUL t20, t22, t24 (-rSo)
+ 30: ICRFL t24, $0x7, CR
+ 31: INCEIPL $4
+
+ 0xFE877A0: 409D0064 bc 4,29,0xFE87804
+ 32: Jc29o $0xFE87804
+
+
+
+. 2018 FE87784 32
+. 81 43 00 04 7C 0A 5A 14 90 08 00 00 38 E7 00 01 81 63 00 20 39 08 00 04 7F 8B 38 40 40 9D 00 64
+==== BB 2019 (0xFE877A4) approx BBs exec'd 0 ====
+
+ 0xFE877A4: 54EA103A rlwinm r10,r7,2,0,29
+ 0: GETL R7, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0xFE877A8: 80A30008 lwz r5,8(r3)
+ 4: GETL R3, t2
+ 5: ADDL $0x8, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFE877AC: 7D2AEA14 add r9,r10,r29
+ 9: GETL R10, t6
+ 10: GETL R29, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFE877B0: 21870046 subfic r12,r7,70
+ 14: GETL R7, t10
+ 15: MOVL $0x46, t12
+ 16: SBBL t10, t12 (-wCa)
+ 17: PUTL t12, R12
+ 18: INCEIPL $4
+
+ 0xFE877B4: 7D8C6110 subfe r12,r12,r12
+ 19: GETL R12, t14
+ 20: GETL R12, t16
+ 21: SBBL t14, t16 (-rCa-wCa)
+ 22: PUTL t16, R12
+ 23: INCEIPL $4
+
+ 0xFE877B8: 7D8C00D0 neg r12,r12
+ 24: GETL R12, t18
+ 25: NEGL t18
+ 26: PUTL t18, R12
+ 27: INCEIPL $4
+
+ 0xFE877BC: 81690008 lwz r11,8(r9)
+ 28: GETL R9, t20
+ 29: ADDL $0x8, t20
+ 30: LDL (t20), t22
+ 31: PUTL t22, R11
+ 32: INCEIPL $4
+
+ 0xFE877C0: 7CC96039 and. r9,r6,r12
+ 33: GETL R6, t24
+ 34: GETL R12, t26
+ 35: ANDL t24, t26
+ 36: PUTL t26, R9
+ 37: CMP0L t26, t28 (-rSo)
+ 38: ICRFL t28, $0x0, CR
+ 39: INCEIPL $4
+
+ 0xFE877C4: 7C855840 cmpl cr1,r5,r11
+ 40: GETL R5, t30
+ 41: GETL R11, t32
+ 42: CMPUL t30, t32, t34 (-rSo)
+ 43: ICRFL t34, $0x1, CR
+ 44: INCEIPL $4
+
+ 0xFE877C8: 4084FFA4 bc 4,4,0xFE8776C
+ 45: Jc04o $0xFE8776C
+
+
+
+. 2019 FE877A4 40
+. 54 EA 10 3A 80 A3 00 08 7D 2A EA 14 21 87 00 46 7D 8C 61 10 7D 8C 00 D0 81 69 00 08 7C C9 60 39 7C 85 58 40 40 84 FF A4
+==== BB 2020 (0xFE8786C) approx BBs exec'd 0 ====
+
+ 0xFE8786C: 40A2FF60 bc 5,2,0xFE877CC
+ 0: Jc02o $0xFE877CC
+
+
+
+. 2020 FE8786C 4
+. 40 A2 FF 60
+==== BB 2021 (0xFE87870) approx BBs exec'd 0 ====
+
+ 0xFE87870: 81830004 lwz r12,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFE87874: 7C0C582E lwzx r0,r12,r11
+ 5: GETL R11, t4
+ 6: GETL R12, t6
+ 7: ADDL t6, t4
+ 8: LDL (t4), t8
+ 9: PUTL t8, R0
+ 10: INCEIPL $4
+
+ 0xFE87878: 4BFFFF14 b 0xFE8778C
+ 11: JMPo $0xFE8778C ($4)
+
+
+
+. 2021 FE87870 12
+. 81 83 00 04 7C 0C 58 2E 4B FF FF 14
+==== BB 2022 (0xFE8778C) approx BBs exec'd 0 ====
+
+ 0xFE8778C: 90080000 stw r0,0(r8)
+ 0: GETL R0, t0
+ 1: GETL R8, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE87790: 38E70001 addi r7,r7,1
+ 4: GETL R7, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0xFE87794: 81630020 lwz r11,32(r3)
+ 8: GETL R3, t6
+ 9: ADDL $0x20, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0xFE87798: 39080004 addi r8,r8,4
+ 13: GETL R8, t10
+ 14: ADDL $0x4, t10
+ 15: PUTL t10, R8
+ 16: INCEIPL $4
+
+ 0xFE8779C: 7F8B3840 cmpl cr7,r11,r7
+ 17: GETL R11, t12
+ 18: GETL R7, t14
+ 19: CMPUL t12, t14, t16 (-rSo)
+ 20: ICRFL t16, $0x7, CR
+ 21: INCEIPL $4
+
+ 0xFE877A0: 409D0064 bc 4,29,0xFE87804
+ 22: Jc29o $0xFE87804
+
+
+
+. 2022 FE8778C 24
+. 90 08 00 00 38 E7 00 01 81 63 00 20 39 08 00 04 7F 8B 38 40 40 9D 00 64
+==== BB 2023 (0xFE87804) approx BBs exec'd 0 ====
+
+ 0xFE87804: 7C6B1B78 or r11,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFE87808: 83A10024 lwz r29,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFE8780C: 7D635B78 or r3,r11,r11
+ 8: GETL R11, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFE87810: 8361000C lwz r27,12(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0xC, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R27
+ 15: INCEIPL $4
+
+ 0xFE87814: 7FA803A6 mtlr r29
+ 16: GETL R29, t12
+ 17: PUTL t12, LR
+ 18: INCEIPL $4
+
+ 0xFE87818: 83810010 lwz r28,16(r1)
+ 19: GETL R1, t14
+ 20: ADDL $0x10, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R28
+ 23: INCEIPL $4
+
+ 0xFE8781C: 83A10014 lwz r29,20(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x14, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R29
+ 28: INCEIPL $4
+
+ 0xFE87820: 83C10018 lwz r30,24(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x18, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R30
+ 33: INCEIPL $4
+
+ 0xFE87824: 83E1001C lwz r31,28(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x1C, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R31
+ 38: INCEIPL $4
+
+ 0xFE87828: 38210020 addi r1,r1,32
+ 39: GETL R1, t30
+ 40: ADDL $0x20, t30
+ 41: PUTL t30, R1
+ 42: INCEIPL $4
+
+ 0xFE8782C: 4E800020 blr
+ 43: GETL LR, t32
+ 44: JMPo-r t32 ($4)
+
+
+
+. 2023 FE87804 44
+. 7C 6B 1B 78 83 A1 00 24 7D 63 5B 78 83 61 00 0C 7F A8 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2024 (0xFE880FC) approx BBs exec'd 0 ====
+
+ 0xFE880FC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE88100: 907D0000 stw r3,0(r29)
+ 4: GETL R3, t4
+ 5: GETL R29, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0xFE88104: 419E0014 bc 12,30,0xFE88118
+ 8: Js30o $0xFE88118
+
+
+
+. 2024 FE880FC 12
+. 2F 83 00 00 90 7D 00 00 41 9E 00 14
+==== BB 2025 (0xFE88108) approx BBs exec'd 0 ====
+
+ 0xFE88108: 81FA0004 lwz r15,4(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R15
+ 4: INCEIPL $4
+
+ 0xFE8810C: 93230018 stw r25,24(r3)
+ 5: GETL R25, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x18, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFE88110: 91E30000 stw r15,0(r3)
+ 10: GETL R15, t8
+ 11: GETL R3, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFE88114: 9303000C stw r24,12(r3)
+ 14: GETL R24, t12
+ 15: GETL R3, t14
+ 16: ADDL $0xC, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0xFE88118: 2E1C000C cmpi cr4,r28,12
+ 19: GETL R28, t16
+ 20: MOVL $0xC, t20
+ 21: CMPL t16, t20, t18 (-rSo)
+ 22: ICRFL t18, $0x4, CR
+ 23: INCEIPL $4
+
+ 0xFE8811C: 3B7B0008 addi r27,r27,8
+ 24: GETL R27, t22
+ 25: ADDL $0x8, t22
+ 26: PUTL t22, R27
+ 27: INCEIPL $4
+
+ 0xFE88120: 3BBD0004 addi r29,r29,4
+ 28: GETL R29, t24
+ 29: ADDL $0x4, t24
+ 30: PUTL t24, R29
+ 31: INCEIPL $4
+
+ 0xFE88124: 4091FFBC bc 4,17,0xFE880E0
+ 32: Jc17o $0xFE880E0
+
+
+
+. 2025 FE88108 32
+. 81 FA 00 04 93 23 00 18 91 E3 00 00 93 03 00 0C 2E 1C 00 0C 3B 7B 00 08 3B BD 00 04 40 91 FF BC
+==== BB 2026 (0xFE880E0) approx BBs exec'd 0 ====
+
+ 0xFE880E0: 2F1C0006 cmpi cr6,r28,6
+ 0: GETL R28, t0
+ 1: MOVL $0x6, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFE880E4: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t6
+ 6: PUTL t6, R3
+ 7: INCEIPL $4
+
+ 0xFE880E8: 3B9C0001 addi r28,r28,1
+ 8: GETL R28, t8
+ 9: ADDL $0x1, t8
+ 10: PUTL t8, R28
+ 11: INCEIPL $4
+
+ 0xFE880EC: 419A002C bc 12,26,0xFE88118
+ 12: Js26o $0xFE88118
+
+
+
+. 2026 FE880E0 16
+. 2F 1C 00 06 7F 83 E3 78 3B 9C 00 01 41 9A 00 2C
+==== BB 2027 (0xFE88118) approx BBs exec'd 0 ====
+
+ 0xFE88118: 2E1C000C cmpi cr4,r28,12
+ 0: GETL R28, t0
+ 1: MOVL $0xC, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0xFE8811C: 3B7B0008 addi r27,r27,8
+ 5: GETL R27, t6
+ 6: ADDL $0x8, t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0xFE88120: 3BBD0004 addi r29,r29,4
+ 9: GETL R29, t8
+ 10: ADDL $0x4, t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0xFE88124: 4091FFBC bc 4,17,0xFE880E0
+ 13: Jc17o $0xFE880E0
+
+
+
+. 2027 FE88118 16
+. 2E 1C 00 0C 3B 7B 00 08 3B BD 00 04 40 91 FF BC
+==== BB 2028 (0xFE88128) approx BBs exec'd 0 ====
+
+ 0xFE88128: 55D4103A rlwinm r20,r14,2,0,29
+ 0: GETL R14, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R20
+ 3: INCEIPL $4
+
+ 0xFE8812C: 81DA0004 lwz r14,4(r26)
+ 4: GETL R26, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R14
+ 8: INCEIPL $4
+
+ 0xFE88130: 7E74D214 add r19,r20,r26
+ 9: GETL R20, t6
+ 10: GETL R26, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R19
+ 13: INCEIPL $4
+
+ 0xFE88134: 81330008 lwz r9,8(r19)
+ 14: GETL R19, t10
+ 15: ADDL $0x8, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0xFE88138: 91D20000 stw r14,0(r18)
+ 19: GETL R14, t14
+ 20: GETL R18, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFE8813C: 4BFFFCBC b 0xFE87DF8
+ 23: JMPo $0xFE87DF8 ($4)
+
+
+
+. 2028 FE88128 24
+. 55 D4 10 3A 81 DA 00 04 7E 74 D2 14 81 33 00 08 91 D2 00 00 4B FF FC BC
+==== BB 2029 (0xFE87DF8) approx BBs exec'd 0 ====
+
+ 0xFE87DF8: 81010000 lwz r8,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0xFE87DFC: 7D234B78 or r3,r9,r9
+ 4: GETL R9, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFE87E00: 82480004 lwz r18,4(r8)
+ 7: GETL R8, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R18
+ 11: INCEIPL $4
+
+ 0xFE87E04: 8148FFB4 lwz r10,-76(r8)
+ 12: GETL R8, t10
+ 13: ADDL $0xFFFFFFB4, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R10
+ 16: INCEIPL $4
+
+ 0xFE87E08: 7E4803A6 mtlr r18
+ 17: GETL R18, t14
+ 18: PUTL t14, LR
+ 19: INCEIPL $4
+
+ 0xFE87E0C: 81C8FFB8 lwz r14,-72(r8)
+ 20: GETL R8, t16
+ 21: ADDL $0xFFFFFFB8, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R14
+ 24: INCEIPL $4
+
+ 0xFE87E10: 81E8FFBC lwz r15,-68(r8)
+ 25: GETL R8, t20
+ 26: ADDL $0xFFFFFFBC, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R15
+ 29: INCEIPL $4
+
+ 0xFE87E14: 7D408120 mtcrf 0x8,r10
+ 30: GETL R10, t24
+ 31: ICRFL t24, $0x4, CR
+ 32: INCEIPL $4
+
+ 0xFE87E18: 8208FFC0 lwz r16,-64(r8)
+ 33: GETL R8, t26
+ 34: ADDL $0xFFFFFFC0, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R16
+ 37: INCEIPL $4
+
+ 0xFE87E1C: 8228FFC4 lwz r17,-60(r8)
+ 38: GETL R8, t30
+ 39: ADDL $0xFFFFFFC4, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R17
+ 42: INCEIPL $4
+
+ 0xFE87E20: 8248FFC8 lwz r18,-56(r8)
+ 43: GETL R8, t34
+ 44: ADDL $0xFFFFFFC8, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R18
+ 47: INCEIPL $4
+
+ 0xFE87E24: 8268FFCC lwz r19,-52(r8)
+ 48: GETL R8, t38
+ 49: ADDL $0xFFFFFFCC, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R19
+ 52: INCEIPL $4
+
+ 0xFE87E28: 8288FFD0 lwz r20,-48(r8)
+ 53: GETL R8, t42
+ 54: ADDL $0xFFFFFFD0, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R20
+ 57: INCEIPL $4
+
+ 0xFE87E2C: 82A8FFD4 lwz r21,-44(r8)
+ 58: GETL R8, t46
+ 59: ADDL $0xFFFFFFD4, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R21
+ 62: INCEIPL $4
+
+ 0xFE87E30: 82C8FFD8 lwz r22,-40(r8)
+ 63: GETL R8, t50
+ 64: ADDL $0xFFFFFFD8, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R22
+ 67: INCEIPL $4
+
+ 0xFE87E34: 82E8FFDC lwz r23,-36(r8)
+ 68: GETL R8, t54
+ 69: ADDL $0xFFFFFFDC, t54
+ 70: LDL (t54), t56
+ 71: PUTL t56, R23
+ 72: INCEIPL $4
+
+ 0xFE87E38: 8308FFE0 lwz r24,-32(r8)
+ 73: GETL R8, t58
+ 74: ADDL $0xFFFFFFE0, t58
+ 75: LDL (t58), t60
+ 76: PUTL t60, R24
+ 77: INCEIPL $4
+
+ 0xFE87E3C: 8328FFE4 lwz r25,-28(r8)
+ 78: GETL R8, t62
+ 79: ADDL $0xFFFFFFE4, t62
+ 80: LDL (t62), t64
+ 81: PUTL t64, R25
+ 82: INCEIPL $4
+
+ 0xFE87E40: 8348FFE8 lwz r26,-24(r8)
+ 83: GETL R8, t66
+ 84: ADDL $0xFFFFFFE8, t66
+ 85: LDL (t66), t68
+ 86: PUTL t68, R26
+ 87: INCEIPL $4
+
+ 0xFE87E44: 8368FFEC lwz r27,-20(r8)
+ 88: GETL R8, t70
+ 89: ADDL $0xFFFFFFEC, t70
+ 90: LDL (t70), t72
+ 91: PUTL t72, R27
+ 92: INCEIPL $4
+
+ 0xFE87E48: 8388FFF0 lwz r28,-16(r8)
+ 93: GETL R8, t74
+ 94: ADDL $0xFFFFFFF0, t74
+ 95: LDL (t74), t76
+ 96: PUTL t76, R28
+ 97: INCEIPL $4
+
+ 0xFE87E4C: 83A8FFF4 lwz r29,-12(r8)
+ 98: GETL R8, t78
+ 99: ADDL $0xFFFFFFF4, t78
+ 100: LDL (t78), t80
+ 101: PUTL t80, R29
+ 102: INCEIPL $4
+
+ 0xFE87E50: 83C8FFF8 lwz r30,-8(r8)
+ 103: GETL R8, t82
+ 104: ADDL $0xFFFFFFF8, t82
+ 105: LDL (t82), t84
+ 106: PUTL t84, R30
+ 107: INCEIPL $4
+
+ 0xFE87E54: 83E8FFFC lwz r31,-4(r8)
+ 108: GETL R8, t86
+ 109: ADDL $0xFFFFFFFC, t86
+ 110: LDL (t86), t88
+ 111: PUTL t88, R31
+ 112: INCEIPL $4
+
+ 0xFE87E58: 7D014378 or r1,r8,r8
+ 113: GETL R8, t90
+ 114: PUTL t90, R1
+ 115: INCEIPL $4
+
+ 0xFE87E5C: 4E800020 blr
+ 116: GETL LR, t92
+ 117: JMPo-r t92 ($4)
+
+
+
+. 2029 FE87DF8 104
+. 81 01 00 00 7D 23 4B 78 82 48 00 04 81 48 FF B4 7E 48 03 A6 81 C8 FF B8 81 E8 FF BC 7D 40 81 20 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
+==== BB 2030 (0xFE86FAC) approx BBs exec'd 0 ====
+
+ 0xFE86FAC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE86FB0: 419E0120 bc 12,30,0xFE870D0
+ 4: Js30o $0xFE870D0
+
+
+
+. 2030 FE86FAC 8
+. 2F 83 00 00 41 9E 01 20
+==== BB 2031 (0xFE86FB4) approx BBs exec'd 0 ====
+
+ 0xFE86FB4: 80E10000 lwz r7,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0xFE86FB8: 83A70004 lwz r29,4(r7)
+ 4: GETL R7, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R29
+ 8: INCEIPL $4
+
+ 0xFE86FBC: 82C7FFD8 lwz r22,-40(r7)
+ 9: GETL R7, t8
+ 10: ADDL $0xFFFFFFD8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R22
+ 13: INCEIPL $4
+
+ 0xFE86FC0: 7FA803A6 mtlr r29
+ 14: GETL R29, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0xFE86FC4: 82E7FFDC lwz r23,-36(r7)
+ 17: GETL R7, t14
+ 18: ADDL $0xFFFFFFDC, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R23
+ 21: INCEIPL $4
+
+ 0xFE86FC8: 8307FFE0 lwz r24,-32(r7)
+ 22: GETL R7, t18
+ 23: ADDL $0xFFFFFFE0, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R24
+ 26: INCEIPL $4
+
+ 0xFE86FCC: 8327FFE4 lwz r25,-28(r7)
+ 27: GETL R7, t22
+ 28: ADDL $0xFFFFFFE4, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R25
+ 31: INCEIPL $4
+
+ 0xFE86FD0: 8347FFE8 lwz r26,-24(r7)
+ 32: GETL R7, t26
+ 33: ADDL $0xFFFFFFE8, t26
+ 34: LDL (t26), t28
+ 35: PUTL t28, R26
+ 36: INCEIPL $4
+
+ 0xFE86FD4: 8367FFEC lwz r27,-20(r7)
+ 37: GETL R7, t30
+ 38: ADDL $0xFFFFFFEC, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R27
+ 41: INCEIPL $4
+
+ 0xFE86FD8: 8387FFF0 lwz r28,-16(r7)
+ 42: GETL R7, t34
+ 43: ADDL $0xFFFFFFF0, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R28
+ 46: INCEIPL $4
+
+ 0xFE86FDC: 83A7FFF4 lwz r29,-12(r7)
+ 47: GETL R7, t38
+ 48: ADDL $0xFFFFFFF4, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R29
+ 51: INCEIPL $4
+
+ 0xFE86FE0: 83C7FFF8 lwz r30,-8(r7)
+ 52: GETL R7, t42
+ 53: ADDL $0xFFFFFFF8, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R30
+ 56: INCEIPL $4
+
+ 0xFE86FE4: 83E7FFFC lwz r31,-4(r7)
+ 57: GETL R7, t46
+ 58: ADDL $0xFFFFFFFC, t46
+ 59: LDL (t46), t48
+ 60: PUTL t48, R31
+ 61: INCEIPL $4
+
+ 0xFE86FE8: 7CE13B78 or r1,r7,r7
+ 62: GETL R7, t50
+ 63: PUTL t50, R1
+ 64: INCEIPL $4
+
+ 0xFE86FEC: 4E800020 blr
+ 65: GETL LR, t52
+ 66: JMPo-r t52 ($4)
+
+
+
+. 2031 FE86FB4 60
+. 80 E1 00 00 83 A7 00 04 82 C7 FF D8 7F A8 03 A6 82 E7 FF DC 83 07 FF E0 83 27 FF E4 83 47 FF E8 83 67 FF EC 83 87 FF F0 83 A7 FF F4 83 C7 FF F8 83 E7 FF FC 7C E1 3B 78 4E 80 00 20
+==== BB 2032 (0xFE86BB4) approx BBs exec'd 0 ====
+
+ 0xFE86BB4: 7C9DC214 add r4,r29,r24
+ 0: GETL R29, t0
+ 1: GETL R24, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE86BB8: 2F830000 cmpi cr7,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFE86BBC: 907B0048 stw r3,72(r27)
+ 9: GETL R3, t8
+ 10: GETL R27, t10
+ 11: ADDL $0x48, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFE86BC0: 419E0050 bc 12,30,0xFE86C10
+ 14: Js30o $0xFE86C10
+
+
+
+. 2032 FE86BB4 16
+. 7C 9D C2 14 2F 83 00 00 90 7B 00 48 41 9E 00 50
+==== BB 2033 (0xFE86BC4) approx BBs exec'd 0 ====
+
+ 0xFE86BC4: 81230018 lwz r9,24(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE86BC8: 2C89FFFF cmpi cr1,r9,-1
+ 5: GETL R9, t4
+ 6: MOVL $0xFFFFFFFF, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFE86BCC: 4186000C bc 12,6,0xFE86BD8
+ 10: Js06o $0xFE86BD8
+
+
+
+. 2033 FE86BC4 12
+. 81 23 00 18 2C 89 FF FF 41 86 00 0C
+==== BB 2034 (0xFE86BD8) approx BBs exec'd 0 ====
+
+ 0xFE86BD8: 83BB0008 lwz r29,8(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFE86BDC: 7F1DA800 cmp cr6,r29,r21
+ 5: GETL R29, t4
+ 6: GETL R21, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFE86BE0: 7FA3EB78 or r3,r29,r29
+ 10: GETL R29, t10
+ 11: PUTL t10, R3
+ 12: INCEIPL $4
+
+ 0xFE86BE4: 41BAFF9C bc 13,26,0xFE86B80
+ 13: Js26o $0xFE86B80
+
+
+
+. 2034 FE86BD8 16
+. 83 BB 00 08 7F 1D A8 00 7F A3 EB 78 41 BA FF 9C
+==== BB 2035 (0xFE86BE8) approx BBs exec'd 0 ====
+
+ 0xFE86BE8: 83440040 lwz r26,64(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x40, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFE86BEC: 7F44D378 or r4,r26,r26
+ 5: GETL R26, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFE86BF0: 4804F7C1 bl 0xFED63B0
+ 8: MOVL $0xFE86BF4, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2035 FE86BE8 12
+. 83 44 00 40 7F 44 D3 78 48 04 F7 C1
+==== BB 2036 (0xFED6430) approx BBs exec'd 0 ====
+
+ 0xFED6430: 80A3FFFC lwz r5,-4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFED6434: 7CAA3279 xor. r10,r5,r6
+ 5: GETL R5, t4
+ 6: GETL R6, t6
+ 7: XORL t4, t6
+ 8: PUTL t6, R10
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFED6438: 7C662850 subf r3,r6,r5
+ 12: GETL R6, t10
+ 13: GETL R5, t12
+ 14: SUBL t10, t12
+ 15: PUTL t12, R3
+ 16: INCEIPL $4
+
+ 0xFED643C: 4CA00020 bclr 5,0
+ 17: GETL LR, t14
+ 18: Jc00o-r t14
+
+
+
+. 2036 FED6430 16
+. 80 A3 FF FC 7C AA 32 79 7C 66 28 50 4C A0 00 20
+==== BB 2037 (0xFE86BF4) approx BBs exec'd 0 ====
+
+ 0xFE86BF4: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFE86BF8: 7FA3EB78 or r3,r29,r29
+ 4: GETL R29, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFE86BFC: 4182FF80 bc 12,2,0xFE86B7C
+ 7: Js02o $0xFE86B7C
+
+
+
+. 2037 FE86BF4 12
+. 2C 03 00 00 7F A3 EB 78 41 82 FF 80
+==== BB 2038 (0xFE86C00) approx BBs exec'd 0 ====
+
+ 0xFE86C00: 4804FB9D bl 0xFED679C
+ 0: MOVL $0xFE86C04, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFED679C ($4)
+
+
+
+. 2038 FE86C00 4
+. 48 04 FB 9D
+==== BB 2039 (0xFE86C04) approx BBs exec'd 0 ====
+
+ 0xFE86C04: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE86C08: 907B0008 stw r3,8(r27)
+ 4: GETL R3, t4
+ 5: GETL R27, t6
+ 6: ADDL $0x8, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFE86C0C: 409EFF74 bc 4,30,0xFE86B80
+ 9: Jc30o $0xFE86B80
+
+
+
+. 2039 FE86C04 12
+. 2F 83 00 00 90 7B 00 08 40 9E FF 74
+==== BB 2040 (0xFE86B80) approx BBs exec'd 0 ====
+
+ 0xFE86B80: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE86B84: 3B9CFFFF addi r28,r28,-1
+ 3: GETL R28, t2
+ 4: ADDL $0xFFFFFFFF, t2
+ 5: PUTL t2, R28
+ 6: INCEIPL $4
+
+ 0xFE86B88: 2C830000 cmpi cr1,r3,0
+ 7: GETL R3, t4
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x1, CR
+ 10: INCEIPL $4
+
+ 0xFE86B8C: 40850084 bc 4,5,0xFE86C10
+ 11: Jc05o $0xFE86C10
+
+
+
+. 2040 FE86B80 16
+. 7F 83 E3 78 3B 9C FF FF 2C 83 00 00 40 85 00 84
+==== BB 2041 (0xFE87C84) approx BBs exec'd 0 ====
+
+ 0xFE87C84: 55DB103A rlwinm r27,r14,2,0,29
+ 0: GETL R14, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0xFE87C88: 83BC0004 lwz r29,4(r28)
+ 4: GETL R28, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0xFE87C8C: 7EE3BB78 or r3,r23,r23
+ 9: GETL R23, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0xFE87C90: 7C1DB800 cmp cr0,r29,r23
+ 12: GETL R29, t8
+ 13: GETL R23, t10
+ 14: CMPL t8, t10, t12 (-rSo)
+ 15: ICRFL t12, $0x0, CR
+ 16: INCEIPL $4
+
+ 0xFE87C94: 7FA4EB78 or r4,r29,r29
+ 17: GETL R29, t14
+ 18: PUTL t14, R4
+ 19: INCEIPL $4
+
+ 0xFE87C98: 41820154 bc 12,2,0xFE87DEC
+ 20: Js02o $0xFE87DEC
+
+
+
+. 2041 FE87C84 24
+. 55 DB 10 3A 83 BC 00 04 7E E3 BB 78 7C 1D B8 00 7F A4 EB 78 41 82 01 54
+==== BB 2042 (0xFE87C9C) approx BBs exec'd 0 ====
+
+ 0xFE87C9C: 4804E715 bl 0xFED63B0
+ 0: MOVL $0xFE87CA0, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2042 FE87C9C 4
+. 48 04 E7 15
+==== BB 2043 (0xFED6478) approx BBs exec'd 0 ====
+
+ 0xFED6478: 8CA30001 lbzu r5,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFED647C: 8CC40001 lbzu r6,1(r4)
+ 6: GETL R4, t4
+ 7: ADDL $0x1, t4
+ 8: PUTL t4, R4
+ 9: LDB (t4), t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0xFED6480: 2C850000 cmpi cr1,r5,0
+ 12: GETL R5, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x1, CR
+ 15: INCEIPL $4
+
+ 0xFED6484: 7C053000 cmp cr0,r5,r6
+ 16: GETL R5, t12
+ 17: GETL R6, t14
+ 18: CMPL t12, t14, t16 (-rSo)
+ 19: ICRFL t16, $0x0, CR
+ 20: INCEIPL $4
+
+ 0xFED6488: 4086FFD4 bc 4,6,0xFED645C
+ 21: Jc06o $0xFED645C
+
+
+
+. 2043 FED6478 20
+. 8C A3 00 01 8C C4 00 01 2C 85 00 00 7C 05 30 00 40 86 FF D4
+==== BB 2044 (0xFED645C) approx BBs exec'd 0 ====
+
+ 0xFED645C: 8CA30001 lbzu r5,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFED6460: 40820034 bc 4,2,0xFED6494
+ 6: Jc02o $0xFED6494
+
+
+
+. 2044 FED645C 8
+. 8C A3 00 01 40 82 00 34
+==== BB 2045 (0xFED6464) approx BBs exec'd 0 ====
+
+ 0xFED6464: 8CC40001 lbzu r6,1(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R4
+ 3: LDB (t0), t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFED6468: 2C850000 cmpi cr1,r5,0
+ 6: GETL R5, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFED646C: 41860020 bc 12,6,0xFED648C
+ 10: Js06o $0xFED648C
+
+
+
+. 2045 FED6464 12
+. 8C C4 00 01 2C 85 00 00 41 86 00 20
+==== BB 2046 (0xFE87CA0) approx BBs exec'd 0 ====
+
+ 0xFE87CA0: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE87CA4: 41860148 bc 12,6,0xFE87DEC
+ 4: Js06o $0xFE87DEC
+
+
+
+. 2046 FE87CA0 8
+. 2C 83 00 00 41 86 01 48
+==== BB 2047 (0xFE87DEC) approx BBs exec'd 0 ====
+
+ 0xFE87DEC: 7D3BE214 add r9,r27,r28
+ 0: GETL R27, t0
+ 1: GETL R28, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE87DF0: 93B20000 stw r29,0(r18)
+ 5: GETL R29, t4
+ 6: GETL R18, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFE87DF4: 81290008 lwz r9,8(r9)
+ 9: GETL R9, t8
+ 10: ADDL $0x8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0xFE87DF8: 81010000 lwz r8,0(r1)
+ 14: GETL R1, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R8
+ 17: INCEIPL $4
+
+ 0xFE87DFC: 7D234B78 or r3,r9,r9
+ 18: GETL R9, t16
+ 19: PUTL t16, R3
+ 20: INCEIPL $4
+
+ 0xFE87E00: 82480004 lwz r18,4(r8)
+ 21: GETL R8, t18
+ 22: ADDL $0x4, t18
+ 23: LDL (t18), t20
+ 24: PUTL t20, R18
+ 25: INCEIPL $4
+
+ 0xFE87E04: 8148FFB4 lwz r10,-76(r8)
+ 26: GETL R8, t22
+ 27: ADDL $0xFFFFFFB4, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R10
+ 30: INCEIPL $4
+
+ 0xFE87E08: 7E4803A6 mtlr r18
+ 31: GETL R18, t26
+ 32: PUTL t26, LR
+ 33: INCEIPL $4
+
+ 0xFE87E0C: 81C8FFB8 lwz r14,-72(r8)
+ 34: GETL R8, t28
+ 35: ADDL $0xFFFFFFB8, t28
+ 36: LDL (t28), t30
+ 37: PUTL t30, R14
+ 38: INCEIPL $4
+
+ 0xFE87E10: 81E8FFBC lwz r15,-68(r8)
+ 39: GETL R8, t32
+ 40: ADDL $0xFFFFFFBC, t32
+ 41: LDL (t32), t34
+ 42: PUTL t34, R15
+ 43: INCEIPL $4
+
+ 0xFE87E14: 7D408120 mtcrf 0x8,r10
+ 44: GETL R10, t36
+ 45: ICRFL t36, $0x4, CR
+ 46: INCEIPL $4
+
+ 0xFE87E18: 8208FFC0 lwz r16,-64(r8)
+ 47: GETL R8, t38
+ 48: ADDL $0xFFFFFFC0, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R16
+ 51: INCEIPL $4
+
+ 0xFE87E1C: 8228FFC4 lwz r17,-60(r8)
+ 52: GETL R8, t42
+ 53: ADDL $0xFFFFFFC4, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R17
+ 56: INCEIPL $4
+
+ 0xFE87E20: 8248FFC8 lwz r18,-56(r8)
+ 57: GETL R8, t46
+ 58: ADDL $0xFFFFFFC8, t46
+ 59: LDL (t46), t48
+ 60: PUTL t48, R18
+ 61: INCEIPL $4
+
+ 0xFE87E24: 8268FFCC lwz r19,-52(r8)
+ 62: GETL R8, t50
+ 63: ADDL $0xFFFFFFCC, t50
+ 64: LDL (t50), t52
+ 65: PUTL t52, R19
+ 66: INCEIPL $4
+
+ 0xFE87E28: 8288FFD0 lwz r20,-48(r8)
+ 67: GETL R8, t54
+ 68: ADDL $0xFFFFFFD0, t54
+ 69: LDL (t54), t56
+ 70: PUTL t56, R20
+ 71: INCEIPL $4
+
+ 0xFE87E2C: 82A8FFD4 lwz r21,-44(r8)
+ 72: GETL R8, t58
+ 73: ADDL $0xFFFFFFD4, t58
+ 74: LDL (t58), t60
+ 75: PUTL t60, R21
+ 76: INCEIPL $4
+
+ 0xFE87E30: 82C8FFD8 lwz r22,-40(r8)
+ 77: GETL R8, t62
+ 78: ADDL $0xFFFFFFD8, t62
+ 79: LDL (t62), t64
+ 80: PUTL t64, R22
+ 81: INCEIPL $4
+
+ 0xFE87E34: 82E8FFDC lwz r23,-36(r8)
+ 82: GETL R8, t66
+ 83: ADDL $0xFFFFFFDC, t66
+ 84: LDL (t66), t68
+ 85: PUTL t68, R23
+ 86: INCEIPL $4
+
+ 0xFE87E38: 8308FFE0 lwz r24,-32(r8)
+ 87: GETL R8, t70
+ 88: ADDL $0xFFFFFFE0, t70
+ 89: LDL (t70), t72
+ 90: PUTL t72, R24
+ 91: INCEIPL $4
+
+ 0xFE87E3C: 8328FFE4 lwz r25,-28(r8)
+ 92: GETL R8, t74
+ 93: ADDL $0xFFFFFFE4, t74
+ 94: LDL (t74), t76
+ 95: PUTL t76, R25
+ 96: INCEIPL $4
+
+ 0xFE87E40: 8348FFE8 lwz r26,-24(r8)
+ 97: GETL R8, t78
+ 98: ADDL $0xFFFFFFE8, t78
+ 99: LDL (t78), t80
+ 100: PUTL t80, R26
+ 101: INCEIPL $4
+
+ 0xFE87E44: 8368FFEC lwz r27,-20(r8)
+ 102: GETL R8, t82
+ 103: ADDL $0xFFFFFFEC, t82
+ 104: LDL (t82), t84
+ 105: PUTL t84, R27
+ 106: INCEIPL $4
+
+ 0xFE87E48: 8388FFF0 lwz r28,-16(r8)
+ 107: GETL R8, t86
+ 108: ADDL $0xFFFFFFF0, t86
+ 109: LDL (t86), t88
+ 110: PUTL t88, R28
+ 111: INCEIPL $4
+
+ 0xFE87E4C: 83A8FFF4 lwz r29,-12(r8)
+ 112: GETL R8, t90
+ 113: ADDL $0xFFFFFFF4, t90
+ 114: LDL (t90), t92
+ 115: PUTL t92, R29
+ 116: INCEIPL $4
+
+ 0xFE87E50: 83C8FFF8 lwz r30,-8(r8)
+ 117: GETL R8, t94
+ 118: ADDL $0xFFFFFFF8, t94
+ 119: LDL (t94), t96
+ 120: PUTL t96, R30
+ 121: INCEIPL $4
+
+ 0xFE87E54: 83E8FFFC lwz r31,-4(r8)
+ 122: GETL R8, t98
+ 123: ADDL $0xFFFFFFFC, t98
+ 124: LDL (t98), t100
+ 125: PUTL t100, R31
+ 126: INCEIPL $4
+
+ 0xFE87E58: 7D014378 or r1,r8,r8
+ 127: GETL R8, t102
+ 128: PUTL t102, R1
+ 129: INCEIPL $4
+
+ 0xFE87E5C: 4E800020 blr
+ 130: GETL LR, t104
+ 131: JMPo-r t104 ($4)
+
+
+
+. 2047 FE87DEC 116
+. 7D 3B E2 14 93 B2 00 00 81 29 00 08 81 01 00 00 7D 23 4B 78 82 48 00 04 81 48 FF B4 7E 48 03 A6 81 C8 FF B8 81 E8 FF BC 7D 40 81 20 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
+==== BB 2048 (0xFE86C10) approx BBs exec'd 0 ====
+
+ 0xFE86C10: 2F1C0000 cmpi cr6,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE86C14: 3AE00000 li r23,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R23
+ 6: INCEIPL $4
+
+ 0xFE86C18: 419801F8 bc 12,24,0xFE86E10
+ 7: Js24o $0xFE86E10
+
+
+
+. 2048 FE86C10 12
+. 2F 1C 00 00 3A E0 00 00 41 98 01 F8
+==== BB 2049 (0xFE86E10) approx BBs exec'd 0 ====
+
+ 0xFE86E10: 38600006 li r3,6
+ 0: MOVL $0x6, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE86E14: 389F0010 addi r4,r31,16
+ 3: GETL R31, t2
+ 4: ADDL $0x10, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0xFE86E18: 4BFFF801 bl 0xFE86618
+ 7: MOVL $0xFE86E1C, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0xFE86618 ($4)
+
+
+
+. 2049 FE86E10 12
+. 38 60 00 06 38 9F 00 10 4B FF F8 01
+==== BB 2050 new_composite_name(0xFE86618) approx BBs exec'd 0 ====
+
+ 0xFE86618: 9421FFC0 stwu r1,-64(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFC0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE8661C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE86620: 48121831 bl 0xFFA7E50
+ 9: MOVL $0xFE86624, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2050 FE86618 12
+. 94 21 FF C0 7C 08 02 A6 48 12 18 31
+==== BB 2051 (0xFE86624) approx BBs exec'd 0 ====
+
+ 0xFE86624: 93C10038 stw r30,56(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x38, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE86628: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE8662C: 7D800026 mfcr r12
+ 8: GETL CR, t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0xFE86630: 2E030006 cmpi cr4,r3,6
+ 11: GETL R3, t8
+ 12: MOVL $0x6, t12
+ 13: CMPL t8, t12, t10 (-rSo)
+ 14: ICRFL t10, $0x4, CR
+ 15: INCEIPL $4
+
+ 0xFE86634: 92A10014 stw r21,20(r1)
+ 16: GETL R21, t14
+ 17: GETL R1, t16
+ 18: ADDL $0x14, t16
+ 19: STL t14, (t16)
+ 20: INCEIPL $4
+
+ 0xFE86638: 92C10018 stw r22,24(r1)
+ 21: GETL R22, t18
+ 22: GETL R1, t20
+ 23: ADDL $0x18, t20
+ 24: STL t18, (t20)
+ 25: INCEIPL $4
+
+ 0xFE8663C: 82BE1D78 lwz r21,7544(r30)
+ 26: GETL R30, t22
+ 27: ADDL $0x1D78, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R21
+ 30: INCEIPL $4
+
+ 0xFE86640: 82DE1D1C lwz r22,7452(r30)
+ 31: GETL R30, t26
+ 32: ADDL $0x1D1C, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R22
+ 35: INCEIPL $4
+
+ 0xFE86644: 92E1001C stw r23,28(r1)
+ 36: GETL R23, t30
+ 37: GETL R1, t32
+ 38: ADDL $0x1C, t32
+ 39: STL t30, (t32)
+ 40: INCEIPL $4
+
+ 0xFE86648: 7C771B78 or r23,r3,r3
+ 41: GETL R3, t34
+ 42: PUTL t34, R23
+ 43: INCEIPL $4
+
+ 0xFE8664C: 93010020 stw r24,32(r1)
+ 44: GETL R24, t36
+ 45: GETL R1, t38
+ 46: ADDL $0x20, t38
+ 47: STL t36, (t38)
+ 48: INCEIPL $4
+
+ 0xFE86650: 7C982378 or r24,r4,r4
+ 49: GETL R4, t40
+ 50: PUTL t40, R24
+ 51: INCEIPL $4
+
+ 0xFE86654: 93210024 stw r25,36(r1)
+ 52: GETL R25, t42
+ 53: GETL R1, t44
+ 54: ADDL $0x24, t44
+ 55: STL t42, (t44)
+ 56: INCEIPL $4
+
+ 0xFE86658: 3B200000 li r25,0
+ 57: MOVL $0x0, t46
+ 58: PUTL t46, R25
+ 59: INCEIPL $4
+
+ 0xFE8665C: 93410028 stw r26,40(r1)
+ 60: GETL R26, t48
+ 61: GETL R1, t50
+ 62: ADDL $0x28, t50
+ 63: STL t48, (t50)
+ 64: INCEIPL $4
+
+ 0xFE86660: 3B400000 li r26,0
+ 65: MOVL $0x0, t52
+ 66: PUTL t52, R26
+ 67: INCEIPL $4
+
+ 0xFE86664: 9361002C stw r27,44(r1)
+ 68: GETL R27, t54
+ 69: GETL R1, t56
+ 70: ADDL $0x2C, t56
+ 71: STL t54, (t56)
+ 72: INCEIPL $4
+
+ 0xFE86668: 3B600001 li r27,1
+ 73: MOVL $0x1, t58
+ 74: PUTL t58, R27
+ 75: INCEIPL $4
+
+ 0xFE8666C: 93810030 stw r28,48(r1)
+ 76: GETL R28, t60
+ 77: GETL R1, t62
+ 78: ADDL $0x30, t62
+ 79: STL t60, (t62)
+ 80: INCEIPL $4
+
+ 0xFE86670: 3B800000 li r28,0
+ 81: MOVL $0x0, t64
+ 82: PUTL t64, R28
+ 83: INCEIPL $4
+
+ 0xFE86674: 93A10034 stw r29,52(r1)
+ 84: GETL R29, t66
+ 85: GETL R1, t68
+ 86: ADDL $0x34, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0xFE86678: 93E1003C stw r31,60(r1)
+ 89: GETL R31, t70
+ 90: GETL R1, t72
+ 91: ADDL $0x3C, t72
+ 92: STL t70, (t72)
+ 93: INCEIPL $4
+
+ 0xFE8667C: 90010044 stw r0,68(r1)
+ 94: GETL R0, t74
+ 95: GETL R1, t76
+ 96: ADDL $0x44, t76
+ 97: STL t74, (t76)
+ 98: INCEIPL $4
+
+ 0xFE86680: 91810010 stw r12,16(r1)
+ 99: GETL R12, t78
+ 100: GETL R1, t80
+ 101: ADDL $0x10, t80
+ 102: STL t78, (t80)
+ 103: INCEIPL $4
+
+ 0xFE86684: 48000064 b 0xFE866E8
+ 104: JMPo $0xFE866E8 ($4)
+
+
+
+. 2051 FE86624 100
+. 93 C1 00 38 7F C8 02 A6 7D 80 00 26 2E 03 00 06 92 A1 00 14 92 C1 00 18 82 BE 1D 78 82 DE 1D 1C 92 E1 00 1C 7C 77 1B 78 93 01 00 20 7C 98 23 78 93 21 00 24 3B 20 00 00 93 41 00 28 3B 40 00 00 93 61 00 2C 3B 60 00 01 93 81 00 30 3B 80 00 00 93 A1 00 34 93 E1 00 3C 90 01 00 44 91 81 00 10 48 00 00 64
+==== BB 2052 (0xFE866E8) approx BBs exec'd 0 ====
+
+ 0xFE866E8: 2F9C0006 cmpi cr7,r28,6
+ 0: GETL R28, t0
+ 1: MOVL $0x6, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE866EC: 41BEFFF0 bc 13,30,0xFE866DC
+ 5: Js30o $0xFE866DC
+
+
+
+. 2052 FE866E8 8
+. 2F 9C 00 06 41 BE FF F0
+==== BB 2053 (0xFE866F0) approx BBs exec'd 0 ====
+
+ 0xFE866F0: 7F97E000 cmp cr7,r23,r28
+ 0: GETL R23, t0
+ 1: GETL R28, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE866F4: 579F103A rlwinm r31,r28,2,0,29
+ 5: GETL R28, t6
+ 6: SHLL $0x2, t6
+ 7: PUTL t6, R31
+ 8: INCEIPL $4
+
+ 0xFE866F8: 41B2FF90 bc 13,18,0xFE86688
+ 9: Js18o $0xFE86688
+
+
+
+. 2053 FE866F0 12
+. 7F 97 E0 00 57 9F 10 3A 41 B2 FF 90
+==== BB 2054 (0xFE86688) approx BBs exec'd 0 ====
+
+ 0xFE86688: 7FBFC02E lwzx r29,r31,r24
+ 0: GETL R24, t0
+ 1: GETL R31, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R29
+ 5: INCEIPL $4
+
+ 0xFE8668C: 7FA3EB78 or r3,r29,r29
+ 6: GETL R29, t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFE86690: 48050449 bl 0xFED6AD8
+ 9: MOVL $0xFE86694, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2054 FE86688 12
+. 7F BF C0 2E 7F A3 EB 78 48 05 04 49
+==== BB 2055 (0xFE86694) approx BBs exec'd 0 ====
+
+ 0xFE86694: 301BFFFF addic r0,r27,-1
+ 0: GETL R27, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0xFE86698: 7D60D910 subfe r11,r0,r27
+ 4: GETL R0, t2
+ 5: GETL R27, t4
+ 6: SBBL t2, t4 (-rCa-wCa)
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0xFE8669C: 7C7A1B78 or r26,r3,r3
+ 9: GETL R3, t6
+ 10: PUTL t6, R26
+ 11: INCEIPL $4
+
+ 0xFE866A0: 207C0000 subfic r3,r28,0
+ 12: GETL R28, t8
+ 13: MOVL $0x0, t10
+ 14: SBBL t8, t10 (-wCa)
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0xFE866A4: 7C6301D4 addme r3,r3
+ 17: GETL R3, t12
+ 18: ADCL $0xFFFFFFFF, t12 (-rCa-wCa)
+ 19: PUTL t12, R3
+ 20: INCEIPL $4
+
+ 0xFE866A8: 54630FFE rlwinm r3,r3,1,31,31
+ 21: GETL R3, t14
+ 22: SHRL $0x1F, t14
+ 23: PUTL t14, R3
+ 24: INCEIPL $4
+
+ 0xFE866AC: 7C695839 and. r9,r3,r11
+ 25: GETL R3, t16
+ 26: GETL R11, t18
+ 27: ANDL t16, t18
+ 28: PUTL t18, R9
+ 29: CMP0L t18, t20 (-rSo)
+ 30: ICRFL t20, $0x0, CR
+ 31: INCEIPL $4
+
+ 0xFE866B0: 7CBFB02E lwzx r5,r31,r22
+ 32: GETL R22, t22
+ 33: GETL R31, t24
+ 34: ADDL t24, t22
+ 35: LDL (t22), t26
+ 36: PUTL t26, R5
+ 37: INCEIPL $4
+
+ 0xFE866B4: 7FA3EB78 or r3,r29,r29
+ 38: GETL R29, t28
+ 39: PUTL t28, R3
+ 40: INCEIPL $4
+
+ 0xFE866B8: 7C85D214 add r4,r5,r26
+ 41: GETL R5, t30
+ 42: GETL R26, t32
+ 43: ADDL t30, t32
+ 44: PUTL t32, R4
+ 45: INCEIPL $4
+
+ 0xFE866BC: 7D24CA14 add r9,r4,r25
+ 46: GETL R4, t34
+ 47: GETL R25, t36
+ 48: ADDL t34, t36
+ 49: PUTL t36, R9
+ 50: INCEIPL $4
+
+ 0xFE866C0: 3B290002 addi r25,r9,2
+ 51: GETL R9, t38
+ 52: ADDL $0x2, t38
+ 53: PUTL t38, R25
+ 54: INCEIPL $4
+
+ 0xFE866C4: 41820018 bc 12,2,0xFE866DC
+ 55: Js02o $0xFE866DC
+
+
+
+. 2055 FE86694 52
+. 30 1B FF FF 7D 60 D9 10 7C 7A 1B 78 20 7C 00 00 7C 63 01 D4 54 63 0F FE 7C 69 58 39 7C BF B0 2E 7F A3 EB 78 7C 85 D2 14 7D 24 CA 14 3B 29 00 02 41 82 00 18
+==== BB 2056 (0xFE866DC) approx BBs exec'd 0 ====
+
+ 0xFE866DC: 3B9C0001 addi r28,r28,1
+ 0: GETL R28, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0xFE866E0: 2C9C000C cmpi cr1,r28,12
+ 4: GETL R28, t2
+ 5: MOVL $0xC, t6
+ 6: CMPL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFE866E4: 41850038 bc 12,5,0xFE8671C
+ 9: Js05o $0xFE8671C
+
+
+
+. 2056 FE866DC 12
+. 3B 9C 00 01 2C 9C 00 0C 41 85 00 38
+==== BB 2057 (0xFE866C8) approx BBs exec'd 0 ====
+
+ 0xFE866C8: 80980000 lwz r4,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFE866CC: 4804FCE5 bl 0xFED63B0
+ 4: MOVL $0xFE866D0, t4
+ 5: PUTL t4, LR
+ 6: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2057 FE866C8 8
+. 80 98 00 00 48 04 FC E5
+==== BB 2058 (0xFE866D0) approx BBs exec'd 0 ====
+
+ 0xFE866D0: 30C3FFFF addic r6,r3,-1
+ 0: GETL R3, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0xFE866D4: 7CC63110 subfe r6,r6,r6
+ 4: GETL R6, t2
+ 5: GETL R6, t4
+ 6: SBBL t2, t4 (-rCa-wCa)
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0xFE866D8: 7F7B3038 and r27,r27,r6
+ 9: GETL R27, t6
+ 10: GETL R6, t8
+ 11: ANDL t6, t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0xFE866DC: 3B9C0001 addi r28,r28,1
+ 14: GETL R28, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R28
+ 17: INCEIPL $4
+
+ 0xFE866E0: 2C9C000C cmpi cr1,r28,12
+ 18: GETL R28, t12
+ 19: MOVL $0xC, t16
+ 20: CMPL t12, t16, t14 (-rSo)
+ 21: ICRFL t14, $0x1, CR
+ 22: INCEIPL $4
+
+ 0xFE866E4: 41850038 bc 12,5,0xFE8671C
+ 23: Js05o $0xFE8671C
+
+
+
+. 2058 FE866D0 24
+. 30 C3 FF FF 7C C6 31 10 7F 7B 30 38 3B 9C 00 01 2C 9C 00 0C 41 85 00 38
+==== BB 2059 (0xFE8671C) approx BBs exec'd 0 ====
+
+ 0xFE8671C: 2E1B0000 cmpi cr4,r27,0
+ 0: GETL R27, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFE86720: 41920078 bc 12,18,0xFE86798
+ 4: Js18o $0xFE86798
+
+
+
+. 2059 FE8671C 8
+. 2E 1B 00 00 41 92 00 78
+==== BB 2060 (0xFE86724) approx BBs exec'd 0 ====
+
+ 0xFE86724: 83F80000 lwz r31,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R31
+ 3: INCEIPL $4
+
+ 0xFE86728: 809E1CB8 lwz r4,7352(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1CB8, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0xFE8672C: 7FE3FB78 or r3,r31,r31
+ 9: GETL R31, t8
+ 10: PUTL t8, R3
+ 11: INCEIPL $4
+
+ 0xFE86730: 4804FC81 bl 0xFED63B0
+ 12: MOVL $0xFE86734, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2060 FE86724 16
+. 83 F8 00 00 80 9E 1C B8 7F E3 FB 78 48 04 FC 81
+==== BB 2061 (0xFE86734) approx BBs exec'd 0 ====
+
+ 0xFE86734: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE86738: 419A0018 bc 12,26,0xFE86750
+ 4: Js26o $0xFE86750
+
+
+
+. 2061 FE86734 8
+. 2F 03 00 00 41 9A 00 18
+==== BB 2062 (0xFE8673C) approx BBs exec'd 0 ====
+
+ 0xFE8673C: 809E1CC8 lwz r4,7368(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1CC8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE86740: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE86744: 4804FC6D bl 0xFED63B0
+ 8: MOVL $0xFE86748, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2062 FE8673C 12
+. 80 9E 1C C8 7F E3 FB 78 48 04 FC 6D
+==== BB 2063 (0xFE86748) approx BBs exec'd 0 ====
+
+ 0xFE86748: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE8674C: 409E00E4 bc 4,30,0xFE86830
+ 4: Jc30o $0xFE86830
+
+
+
+. 2063 FE86748 8
+. 2F 83 00 00 40 9E 00 E4
+==== BB 2064 (0xFE86830) approx BBs exec'd 0 ====
+
+ 0xFE86830: 3BFA0001 addi r31,r26,1
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0xFE86834: 7FE3FB78 or r3,r31,r31
+ 4: GETL R31, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0xFE86838: 48123AD1 bl 0xFFAA308
+ 7: MOVL $0xFE8683C, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0xFFAA308 ($4)
+
+
+
+. 2064 FE86830 12
+. 3B FA 00 01 7F E3 FB 78 48 12 3A D1
+==== BB 2065 (0xFE8683C) approx BBs exec'd 0 ====
+
+ 0xFE8683C: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE86840: 2C030000 cmpi cr0,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFE86844: 41820014 bc 12,2,0xFE86858
+ 7: Js02o $0xFE86858
+
+
+
+. 2065 FE8683C 12
+. 38 00 00 00 2C 03 00 00 41 82 00 14
+==== BB 2066 (0xFE86848) approx BBs exec'd 0 ====
+
+ 0xFE86848: 80980000 lwz r4,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFE8684C: 7FE5FB78 or r5,r31,r31
+ 4: GETL R31, t4
+ 5: PUTL t4, R5
+ 6: INCEIPL $4
+
+ 0xFE86850: 48051E89 bl 0xFED86D8
+ 7: MOVL $0xFE86854, t6
+ 8: PUTL t6, LR
+ 9: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 2066 FE86848 12
+. 80 98 00 00 7F E5 FB 78 48 05 1E 89
+==== BB 2067 (0xFE86854) approx BBs exec'd 0 ====
+
+ 0xFE86854: 7C601B78 or r0,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE86858: 7C030378 or r3,r0,r0
+ 3: GETL R0, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFE8685C: 4BFFFEF8 b 0xFE86754
+ 6: JMPo $0xFE86754 ($4)
+
+
+
+. 2067 FE86854 12
+. 7C 60 1B 78 7C 03 03 78 4B FF FE F8
+==== BB 2068 (0xFE86754) approx BBs exec'd 0 ====
+
+ 0xFE86754: 81410044 lwz r10,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFE86758: 81010010 lwz r8,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0xFE8675C: 82A10014 lwz r21,20(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R21
+ 14: INCEIPL $4
+
+ 0xFE86760: 7D4803A6 mtlr r10
+ 15: GETL R10, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFE86764: 82C10018 lwz r22,24(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x18, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R22
+ 22: INCEIPL $4
+
+ 0xFE86768: 7D008120 mtcrf 0x8,r8
+ 23: GETL R8, t18
+ 24: ICRFL t18, $0x4, CR
+ 25: INCEIPL $4
+
+ 0xFE8676C: 82E1001C lwz r23,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R23
+ 30: INCEIPL $4
+
+ 0xFE86770: 83010020 lwz r24,32(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R24
+ 35: INCEIPL $4
+
+ 0xFE86774: 83210024 lwz r25,36(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x24, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R25
+ 40: INCEIPL $4
+
+ 0xFE86778: 83410028 lwz r26,40(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x28, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R26
+ 45: INCEIPL $4
+
+ 0xFE8677C: 8361002C lwz r27,44(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x2C, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R27
+ 50: INCEIPL $4
+
+ 0xFE86780: 83810030 lwz r28,48(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x30, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R28
+ 55: INCEIPL $4
+
+ 0xFE86784: 83A10034 lwz r29,52(r1)
+ 56: GETL R1, t44
+ 57: ADDL $0x34, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R29
+ 60: INCEIPL $4
+
+ 0xFE86788: 83C10038 lwz r30,56(r1)
+ 61: GETL R1, t48
+ 62: ADDL $0x38, t48
+ 63: LDL (t48), t50
+ 64: PUTL t50, R30
+ 65: INCEIPL $4
+
+ 0xFE8678C: 83E1003C lwz r31,60(r1)
+ 66: GETL R1, t52
+ 67: ADDL $0x3C, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R31
+ 70: INCEIPL $4
+
+ 0xFE86790: 38210040 addi r1,r1,64
+ 71: GETL R1, t56
+ 72: ADDL $0x40, t56
+ 73: PUTL t56, R1
+ 74: INCEIPL $4
+
+ 0xFE86794: 4E800020 blr
+ 75: GETL LR, t58
+ 76: JMPo-r t58 ($4)
+
+
+
+. 2068 FE86754 68
+. 81 41 00 44 81 01 00 10 82 A1 00 14 7D 48 03 A6 82 C1 00 18 7D 00 81 20 82 E1 00 1C 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+==== BB 2069 (0xFE86E1C) approx BBs exec'd 0 ====
+
+ 0xFE86E1C: 7C771B79 or. r23,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R23
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE86E20: 41A2FDFC bc 13,2,0xFE86C1C
+ 5: Js02o $0xFE86C1C
+
+
+
+. 2069 FE86E1C 8
+. 7C 77 1B 79 41 A2 FD FC
+==== BB 2070 (0xFE86E24) approx BBs exec'd 0 ====
+
+ 0xFE86E24: 82BE00FC lwz r21,252(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0xFE86E28: 3B600000 li r27,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R27
+ 7: INCEIPL $4
+
+ 0xFE86E2C: 82DE1CB8 lwz r22,7352(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x1CB8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R22
+ 12: INCEIPL $4
+
+ 0xFE86E30: 3BBF0008 addi r29,r31,8
+ 13: GETL R31, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R29
+ 16: INCEIPL $4
+
+ 0xFE86E34: 2F9B0006 cmpi cr7,r27,6
+ 17: GETL R27, t12
+ 18: MOVL $0x6, t16
+ 19: CMPL t12, t16, t14 (-rSo)
+ 20: ICRFL t14, $0x7, CR
+ 21: INCEIPL $4
+
+ 0xFE86E38: 5769103A rlwinm r9,r27,2,0,29
+ 22: GETL R27, t18
+ 23: SHLL $0x2, t18
+ 24: PUTL t18, R9
+ 25: INCEIPL $4
+
+ 0xFE86E3C: 7F89EA14 add r28,r9,r29
+ 26: GETL R9, t20
+ 27: GETL R29, t22
+ 28: ADDL t20, t22
+ 29: PUTL t22, R28
+ 30: INCEIPL $4
+
+ 0xFE86E40: 3B7B0001 addi r27,r27,1
+ 31: MOVL $0x1, t24
+ 32: PUTL t24, R27
+ 33: INCEIPL $4
+
+ 0xFE86E44: 7F49C214 add r26,r9,r24
+ 34: GETL R9, t26
+ 35: GETL R24, t28
+ 36: ADDL t26, t28
+ 37: PUTL t28, R26
+ 38: INCEIPL $4
+
+ 0xFE86E48: 419E0038 bc 12,30,0xFE86E80
+ 39: Js30o $0xFE86E80
+
+
+
+. 2070 FE86E24 40
+. 82 BE 00 FC 3B 60 00 00 82 DE 1C B8 3B BF 00 08 2F 9B 00 06 57 69 10 3A 7F 89 EA 14 3B 7B 00 01 7F 49 C2 14 41 9E 00 38
+==== BB 2071 (0xFE86E4C) approx BBs exec'd 0 ====
+
+ 0xFE86E4C: 7D69A82E lwzx r11,r9,r21
+ 0: GETL R21, t0
+ 1: GETL R9, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R11
+ 5: INCEIPL $4
+
+ 0xFE86E50: 809C0048 lwz r4,72(r28)
+ 6: GETL R28, t6
+ 7: ADDL $0x48, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R4
+ 10: INCEIPL $4
+
+ 0xFE86E54: 2C8B0000 cmpi cr1,r11,0
+ 11: GETL R11, t10
+ 12: CMP0L t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0xFE86E58: 7C89C12E stwx r4,r9,r24
+ 15: GETL R24, t14
+ 16: GETL R9, t16
+ 17: ADDL t16, t14
+ 18: GETL R4, t18
+ 19: STL t18, (t14)
+ 20: INCEIPL $4
+
+ 0xFE86E5C: 40860060 bc 4,6,0xFE86EBC
+ 21: Jc06o $0xFE86EBC
+
+
+
+. 2071 FE86E4C 20
+. 7D 69 A8 2E 80 9C 00 48 2C 8B 00 00 7C 89 C1 2E 40 86 00 60
+==== BB 2072 (0xFE86EBC) approx BBs exec'd 0 ====
+
+ 0xFE86EBC: 7D6903A6 mtctr r11
+ 0: GETL R11, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0xFE86EC0: 4E800421 bctrl
+ 3: MOVL $0xFE86EC4, t2
+ 4: PUTL t2, LR
+ 5: GETL CTR, t4
+ 6: JMPo-c t4 ($4)
+
+
+
+. 2072 FE86EBC 8
+. 7D 69 03 A6 4E 80 04 21
+==== BB 2073 _nl_postload_ctype(0xFE89240) approx BBs exec'd 0 ====
+
+ 0xFE89240: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE89244: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE89248: 4811EC09 bl 0xFFA7E50
+ 9: MOVL $0xFE8924C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2073 FE89240 12
+. 94 21 FF F0 7C 08 02 A6 48 11 EC 09
+==== BB 2074 (0xFE8924C) approx BBs exec'd 0 ====
+
+ 0xFE8924C: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE89250: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE89254: 7C0803A6 mtlr r0
+ 8: GETL R0, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0xFE89258: 811E1D78 lwz r8,7544(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x1D78, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R8
+ 15: INCEIPL $4
+
+ 0xFE8925C: 817E1D50 lwz r11,7504(r30)
+ 16: GETL R30, t12
+ 17: ADDL $0x1D50, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R11
+ 20: INCEIPL $4
+
+ 0xFE89260: 7D8B1214 add r12,r11,r2
+ 21: GETL R11, t16
+ 22: GETL R2, t18
+ 23: ADDL t16, t18
+ 24: PUTL t18, R12
+ 25: INCEIPL $4
+
+ 0xFE89264: 807E1CF8 lwz r3,7416(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x1CF8, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R3
+ 30: INCEIPL $4
+
+ 0xFE89268: 80A80000 lwz r5,0(r8)
+ 31: GETL R8, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R5
+ 34: INCEIPL $4
+
+ 0xFE8926C: 813E1D8C lwz r9,7564(r30)
+ 35: GETL R30, t28
+ 36: ADDL $0x1D8C, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R9
+ 39: INCEIPL $4
+
+ 0xFE89270: 817E1B80 lwz r11,7040(r30)
+ 40: GETL R30, t32
+ 41: ADDL $0x1B80, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R11
+ 44: INCEIPL $4
+
+ 0xFE89274: 7D291214 add r9,r9,r2
+ 45: GETL R9, t36
+ 46: GETL R2, t38
+ 47: ADDL t36, t38
+ 48: PUTL t38, R9
+ 49: INCEIPL $4
+
+ 0xFE89278: 80C50024 lwz r6,36(r5)
+ 50: GETL R5, t40
+ 51: ADDL $0x24, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R6
+ 54: INCEIPL $4
+
+ 0xFE8927C: 38E50024 addi r7,r5,36
+ 55: GETL R5, t44
+ 56: ADDL $0x24, t44
+ 57: PUTL t44, R7
+ 58: INCEIPL $4
+
+ 0xFE89280: 7D6B1214 add r11,r11,r2
+ 59: GETL R11, t46
+ 60: GETL R2, t48
+ 61: ADDL t46, t48
+ 62: PUTL t48, R11
+ 63: INCEIPL $4
+
+ 0xFE89284: 38A60100 addi r5,r6,256
+ 64: GETL R6, t50
+ 65: ADDL $0x100, t50
+ 66: PUTL t50, R5
+ 67: INCEIPL $4
+
+ 0xFE89288: 80CC0000 lwz r6,0(r12)
+ 68: GETL R12, t52
+ 69: LDL (t52), t54
+ 70: PUTL t54, R6
+ 71: INCEIPL $4
+
+ 0xFE8928C: 90A80034 stw r5,52(r8)
+ 72: GETL R5, t56
+ 73: GETL R8, t58
+ 74: ADDL $0x34, t58
+ 75: STL t56, (t58)
+ 76: INCEIPL $4
+
+ 0xFE89290: 8147000C lwz r10,12(r7)
+ 77: GETL R7, t60
+ 78: ADDL $0xC, t60
+ 79: LDL (t60), t62
+ 80: PUTL t62, R10
+ 81: INCEIPL $4
+
+ 0xFE89294: 7F864000 cmp cr7,r6,r8
+ 82: GETL R6, t64
+ 83: GETL R8, t66
+ 84: CMPL t64, t66, t68 (-rSo)
+ 85: ICRFL t68, $0x7, CR
+ 86: INCEIPL $4
+
+ 0xFE89298: 394A0200 addi r10,r10,512
+ 87: GETL R10, t70
+ 88: ADDL $0x200, t70
+ 89: PUTL t70, R10
+ 90: INCEIPL $4
+
+ 0xFE8929C: 91480038 stw r10,56(r8)
+ 91: GETL R10, t72
+ 92: GETL R8, t74
+ 93: ADDL $0x38, t74
+ 94: STL t72, (t74)
+ 95: INCEIPL $4
+
+ 0xFE892A0: 80870004 lwz r4,4(r7)
+ 96: GETL R7, t76
+ 97: ADDL $0x4, t76
+ 98: LDL (t76), t78
+ 99: PUTL t78, R4
+ 100: INCEIPL $4
+
+ 0xFE892A4: 7CE31214 add r7,r3,r2
+ 101: GETL R3, t80
+ 102: GETL R2, t82
+ 103: ADDL t80, t82
+ 104: PUTL t82, R7
+ 105: INCEIPL $4
+
+ 0xFE892A8: 38040200 addi r0,r4,512
+ 106: GETL R4, t84
+ 107: ADDL $0x200, t84
+ 108: PUTL t84, R0
+ 109: INCEIPL $4
+
+ 0xFE892AC: 9008003C stw r0,60(r8)
+ 110: GETL R0, t86
+ 111: GETL R8, t88
+ 112: ADDL $0x3C, t88
+ 113: STL t86, (t88)
+ 114: INCEIPL $4
+
+ 0xFE892B0: 419E0068 bc 12,30,0xFE89318
+ 115: Js30o $0xFE89318
+
+
+
+. 2074 FE8924C 104
+. 93 C1 00 08 7F C8 02 A6 7C 08 03 A6 81 1E 1D 78 81 7E 1D 50 7D 8B 12 14 80 7E 1C F8 80 A8 00 00 81 3E 1D 8C 81 7E 1B 80 7D 29 12 14 80 C5 00 24 38 E5 00 24 7D 6B 12 14 38 A6 01 00 80 CC 00 00 90 A8 00 34 81 47 00 0C 7F 86 40 00 39 4A 02 00 91 48 00 38 80 87 00 04 7C E3 12 14 38 04 02 00 90 08 00 3C 41 9E 00 68
+==== BB 2075 (0xFE89318) approx BBs exec'd 0 ====
+
+ 0xFE89318: 90A70000 stw r5,0(r7)
+ 0: GETL R5, t0
+ 1: GETL R7, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE8931C: 90090000 stw r0,0(r9)
+ 4: GETL R0, t4
+ 5: GETL R9, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0xFE89320: 914B0000 stw r10,0(r11)
+ 8: GETL R10, t8
+ 9: GETL R11, t10
+ 10: STL t8, (t10)
+ 11: INCEIPL $4
+
+ 0xFE89324: 4BFFFF90 b 0xFE892B4
+ 12: JMPo $0xFE892B4 ($4)
+
+
+
+. 2075 FE89318 16
+. 90 A7 00 00 90 09 00 00 91 4B 00 00 4B FF FF 90
+==== BB 2076 (0xFE892B4) approx BBs exec'd 0 ====
+
+ 0xFE892B4: 80A60000 lwz r5,0(r6)
+ 0: GETL R6, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFE892B8: 813E1DE0 lwz r9,7648(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1DE0, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0xFE892BC: 81450024 lwz r10,36(r5)
+ 9: GETL R5, t8
+ 10: ADDL $0x24, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R10
+ 13: INCEIPL $4
+
+ 0xFE892C0: 81050028 lwz r8,40(r5)
+ 14: GETL R5, t12
+ 15: ADDL $0x28, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R8
+ 18: INCEIPL $4
+
+ 0xFE892C4: 80E50030 lwz r7,48(r5)
+ 19: GETL R5, t16
+ 20: ADDL $0x30, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R7
+ 23: INCEIPL $4
+
+ 0xFE892C8: 380A0100 addi r0,r10,256
+ 24: GETL R10, t20
+ 25: ADDL $0x100, t20
+ 26: PUTL t20, R0
+ 27: INCEIPL $4
+
+ 0xFE892CC: 80650064 lwz r3,100(r5)
+ 28: GETL R5, t22
+ 29: ADDL $0x64, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R3
+ 32: INCEIPL $4
+
+ 0xFE892D0: 39680200 addi r11,r8,512
+ 33: GETL R8, t26
+ 34: ADDL $0x200, t26
+ 35: PUTL t26, R11
+ 36: INCEIPL $4
+
+ 0xFE892D4: 81850038 lwz r12,56(r5)
+ 37: GETL R5, t28
+ 38: ADDL $0x38, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R12
+ 41: INCEIPL $4
+
+ 0xFE892D8: 38C70200 addi r6,r7,512
+ 42: GETL R7, t32
+ 43: ADDL $0x200, t32
+ 44: PUTL t32, R6
+ 45: INCEIPL $4
+
+ 0xFE892DC: 80850060 lwz r4,96(r5)
+ 46: GETL R5, t34
+ 47: ADDL $0x60, t34
+ 48: LDL (t34), t36
+ 49: PUTL t36, R4
+ 50: INCEIPL $4
+
+ 0xFE892E0: 815E1C7C lwz r10,7292(r30)
+ 51: GETL R30, t38
+ 52: ADDL $0x1C7C, t38
+ 53: LDL (t38), t40
+ 54: PUTL t40, R10
+ 55: INCEIPL $4
+
+ 0xFE892E4: 80BE1BDC lwz r5,7132(r30)
+ 56: GETL R30, t42
+ 57: ADDL $0x1BDC, t42
+ 58: LDL (t42), t44
+ 59: PUTL t44, R5
+ 60: INCEIPL $4
+
+ 0xFE892E8: 80FE1E18 lwz r7,7704(r30)
+ 61: GETL R30, t46
+ 62: ADDL $0x1E18, t46
+ 63: LDL (t46), t48
+ 64: PUTL t48, R7
+ 65: INCEIPL $4
+
+ 0xFE892EC: 811E1D84 lwz r8,7556(r30)
+ 66: GETL R30, t50
+ 67: ADDL $0x1D84, t50
+ 68: LDL (t50), t52
+ 69: PUTL t52, R8
+ 70: INCEIPL $4
+
+ 0xFE892F0: 90090000 stw r0,0(r9)
+ 71: GETL R0, t54
+ 72: GETL R9, t56
+ 73: STL t54, (t56)
+ 74: INCEIPL $4
+
+ 0xFE892F4: 813E1BC0 lwz r9,7104(r30)
+ 75: GETL R30, t58
+ 76: ADDL $0x1BC0, t58
+ 77: LDL (t58), t60
+ 78: PUTL t60, R9
+ 79: INCEIPL $4
+
+ 0xFE892F8: 83C10008 lwz r30,8(r1)
+ 80: GETL R1, t62
+ 81: ADDL $0x8, t62
+ 82: LDL (t62), t64
+ 83: PUTL t64, R30
+ 84: INCEIPL $4
+
+ 0xFE892FC: 38210010 addi r1,r1,16
+ 85: GETL R1, t66
+ 86: ADDL $0x10, t66
+ 87: PUTL t66, R1
+ 88: INCEIPL $4
+
+ 0xFE89300: 91650000 stw r11,0(r5)
+ 89: GETL R11, t68
+ 90: GETL R5, t70
+ 91: STL t68, (t70)
+ 92: INCEIPL $4
+
+ 0xFE89304: 90CA0000 stw r6,0(r10)
+ 93: GETL R6, t72
+ 94: GETL R10, t74
+ 95: STL t72, (t74)
+ 96: INCEIPL $4
+
+ 0xFE89308: 91870000 stw r12,0(r7)
+ 97: GETL R12, t76
+ 98: GETL R7, t78
+ 99: STL t76, (t78)
+ 100: INCEIPL $4
+
+ 0xFE8930C: 90890000 stw r4,0(r9)
+ 101: GETL R4, t80
+ 102: GETL R9, t82
+ 103: STL t80, (t82)
+ 104: INCEIPL $4
+
+ 0xFE89310: 90680000 stw r3,0(r8)
+ 105: GETL R3, t84
+ 106: GETL R8, t86
+ 107: STL t84, (t86)
+ 108: INCEIPL $4
+
+ 0xFE89314: 4E800020 blr
+ 109: GETL LR, t88
+ 110: JMPo-r t88 ($4)
+
+
+
+. 2076 FE892B4 100
+. 80 A6 00 00 81 3E 1D E0 81 45 00 24 81 05 00 28 80 E5 00 30 38 0A 01 00 80 65 00 64 39 68 02 00 81 85 00 38 38 C7 02 00 80 85 00 60 81 5E 1C 7C 80 BE 1B DC 80 FE 1E 18 81 1E 1D 84 90 09 00 00 81 3E 1B C0 83 C1 00 08 38 21 00 10 91 65 00 00 90 CA 00 00 91 87 00 00 90 89 00 00 90 68 00 00 4E 80 00 20
+==== BB 2077 (0xFE86EC4) approx BBs exec'd 0 ====
+
+ 0xFE86EC4: 4BFFFF9C b 0xFE86E60
+ 0: JMPo $0xFE86E60 ($4)
+
+
+
+. 2077 FE86EC4 4
+. 4B FF FF 9C
+==== BB 2078 (0xFE86E60) approx BBs exec'd 0 ====
+
+ 0xFE86E60: 807A0040 lwz r3,64(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x40, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE86E64: 839C0008 lwz r28,8(r28)
+ 5: GETL R28, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0xFE86E68: 7F03B000 cmp cr6,r3,r22
+ 10: GETL R3, t8
+ 11: GETL R22, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x6, CR
+ 14: INCEIPL $4
+
+ 0xFE86E6C: 7C03E000 cmp cr0,r3,r28
+ 15: GETL R3, t14
+ 16: GETL R28, t16
+ 17: CMPL t14, t16, t18 (-rSo)
+ 18: ICRFL t18, $0x0, CR
+ 19: INCEIPL $4
+
+ 0xFE86E70: 41820010 bc 12,2,0xFE86E80
+ 20: Js02o $0xFE86E80
+
+
+
+. 2078 FE86E60 20
+. 80 7A 00 40 83 9C 00 08 7F 03 B0 00 7C 03 E0 00 41 82 00 10
+==== BB 2079 (0xFE86E74) approx BBs exec'd 0 ====
+
+ 0xFE86E74: 419A0008 bc 12,26,0xFE86E7C
+ 0: Js26o $0xFE86E7C
+
+
+
+. 2079 FE86E74 4
+. 41 9A 00 08
+==== BB 2080 (0xFE86E7C) approx BBs exec'd 0 ====
+
+ 0xFE86E7C: 939A0040 stw r28,64(r26)
+ 0: GETL R28, t0
+ 1: GETL R26, t2
+ 2: ADDL $0x40, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE86E80: 2F1B000C cmpi cr6,r27,12
+ 5: GETL R27, t4
+ 6: MOVL $0xC, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFE86E84: 4099FFB0 bc 4,25,0xFE86E34
+ 10: Jc25o $0xFE86E34
+
+
+
+. 2080 FE86E7C 12
+. 93 9A 00 40 2F 1B 00 0C 40 99 FF B0
+==== BB 2081 (0xFE86E34) approx BBs exec'd 0 ====
+
+ 0xFE86E34: 2F9B0006 cmpi cr7,r27,6
+ 0: GETL R27, t0
+ 1: MOVL $0x6, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE86E38: 5769103A rlwinm r9,r27,2,0,29
+ 5: GETL R27, t6
+ 6: SHLL $0x2, t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0xFE86E3C: 7F89EA14 add r28,r9,r29
+ 9: GETL R9, t8
+ 10: GETL R29, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R28
+ 13: INCEIPL $4
+
+ 0xFE86E40: 3B7B0001 addi r27,r27,1
+ 14: GETL R27, t12
+ 15: ADDL $0x1, t12
+ 16: PUTL t12, R27
+ 17: INCEIPL $4
+
+ 0xFE86E44: 7F49C214 add r26,r9,r24
+ 18: GETL R9, t14
+ 19: GETL R24, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R26
+ 22: INCEIPL $4
+
+ 0xFE86E48: 419E0038 bc 12,30,0xFE86E80
+ 23: Js30o $0xFE86E80
+
+
+
+. 2081 FE86E34 24
+. 2F 9B 00 06 57 69 10 3A 7F 89 EA 14 3B 7B 00 01 7F 49 C2 14 41 9E 00 38
+==== BB 2082 (0xFE86E80) approx BBs exec'd 0 ====
+
+ 0xFE86E80: 2F1B000C cmpi cr6,r27,12
+ 0: GETL R27, t0
+ 1: MOVL $0xC, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFE86E84: 4099FFB0 bc 4,25,0xFE86E34
+ 5: Jc25o $0xFE86E34
+
+
+
+. 2082 FE86E80 8
+. 2F 1B 00 0C 40 99 FF B0
+==== BB 2083 (0xFE86E88) approx BBs exec'd 0 ====
+
+ 0xFE86E88: 80780058 lwz r3,88(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0x58, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE86E8C: 7F83B800 cmp cr7,r3,r23
+ 5: GETL R3, t4
+ 6: GETL R23, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFE86E90: 419E0018 bc 12,30,0xFE86EA8
+ 10: Js30o $0xFE86EA8
+
+
+
+. 2083 FE86E88 12
+. 80 78 00 58 7F 83 B8 00 41 9E 00 18
+==== BB 2084 (0xFE86E94) approx BBs exec'd 0 ====
+
+ 0xFE86E94: 839E1CB8 lwz r28,7352(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1CB8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFE86E98: 7C83E000 cmp cr1,r3,r28
+ 5: GETL R3, t4
+ 6: GETL R28, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFE86E9C: 41860008 bc 12,6,0xFE86EA4
+ 10: Js06o $0xFE86EA4
+
+
+
+. 2084 FE86E94 12
+. 83 9E 1C B8 7C 83 E0 00 41 86 00 08
+==== BB 2085 (0xFE86EA4) approx BBs exec'd 0 ====
+
+ 0xFE86EA4: 92F80058 stw r23,88(r24)
+ 0: GETL R23, t0
+ 1: GETL R24, t2
+ 2: ADDL $0x58, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE86EA8: 831E1B1C lwz r24,6940(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1B1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R24
+ 9: INCEIPL $4
+
+ 0xFE86EAC: 80D80000 lwz r6,0(r24)
+ 10: GETL R24, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R6
+ 13: INCEIPL $4
+
+ 0xFE86EB0: 38A60001 addi r5,r6,1
+ 14: GETL R6, t12
+ 15: ADDL $0x1, t12
+ 16: PUTL t12, R5
+ 17: INCEIPL $4
+
+ 0xFE86EB4: 90B80000 stw r5,0(r24)
+ 18: GETL R5, t14
+ 19: GETL R24, t16
+ 20: STL t14, (t16)
+ 21: INCEIPL $4
+
+ 0xFE86EB8: 4BFFFDB8 b 0xFE86C70
+ 22: JMPo $0xFE86C70 ($4)
+
+
+
+. 2085 FE86EA4 24
+. 92 F8 00 58 83 1E 1B 1C 80 D8 00 00 38 A6 00 01 90 B8 00 00 4B FF FD B8
+==== BB 2086 (0xFE86C70) approx BBs exec'd 0 ====
+
+ 0xFE86C70: 39400000 li r10,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFE86C74: 7C0004AC sync
+ 3: INCEIPL $4
+
+ 0xFE86C78: 7D00C828 lwarx r8,r0,r25
+ 4: GETL R25, t2
+ 5: LOCKo
+ 6: LDL (t2), t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0xFE86C7C: 7D40C92D stwcx. r10,r0,r25
+ 9: GETL R25, t6
+ 10: GETL R10, t8
+ 11: LOCKo
+ 12: STL t8, (t6) (-rSo)
+ 13: ICRFL cr, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFE86C80: 40A2FFF8 bc 5,2,0xFE86C78
+ 15: Jc02o $0xFE86C78
+
+
+
+. 2086 FE86C70 20
+. 39 40 00 00 7C 00 04 AC 7D 00 C8 28 7D 40 C9 2D 40 A2 FF F8
+==== BB 2087 (0xFE86C84) approx BBs exec'd 0 ====
+
+ 0xFE86C84: 2F080001 cmpi cr6,r8,1
+ 0: GETL R8, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFE86C88: 41990240 bc 12,25,0xFE86EC8
+ 5: Js25o $0xFE86EC8
+
+
+
+. 2087 FE86C84 8
+. 2F 08 00 01 41 99 02 40
+==== BB 2088 (0xFE86C8C) approx BBs exec'd 0 ====
+
+ 0xFE86C8C: 807F0090 lwz r3,144(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x90, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE86C90: 481236A1 bl 0xFFAA330
+ 5: MOVL $0xFE86C94, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0xFFAA330 ($4)
+
+
+
+. 2088 FE86C8C 8
+. 80 7F 00 90 48 12 36 A1
+==== BB 2089 (0xFE86C94) approx BBs exec'd 0 ====
+
+ 0xFE86C94: 7EE3BB78 or r3,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE86C98: 4BFFFC6C b 0xFE86904
+ 3: JMPo $0xFE86904 ($4)
+
+
+
+. 2089 FE86C94 8
+. 7E E3 BB 78 4B FF FC 6C
+==== BB 2090 (0xFE86904) approx BBs exec'd 0 ====
+
+ 0xFE86904: 80A10000 lwz r5,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFE86908: 83650004 lwz r27,4(r5)
+ 4: GETL R5, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0xFE8690C: 8245FFC8 lwz r18,-56(r5)
+ 9: GETL R5, t8
+ 10: ADDL $0xFFFFFFC8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R18
+ 13: INCEIPL $4
+
+ 0xFE86910: 7F6803A6 mtlr r27
+ 14: GETL R27, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0xFE86914: 8265FFCC lwz r19,-52(r5)
+ 17: GETL R5, t14
+ 18: ADDL $0xFFFFFFCC, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R19
+ 21: INCEIPL $4
+
+ 0xFE86918: 8285FFD0 lwz r20,-48(r5)
+ 22: GETL R5, t18
+ 23: ADDL $0xFFFFFFD0, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R20
+ 26: INCEIPL $4
+
+ 0xFE8691C: 82A5FFD4 lwz r21,-44(r5)
+ 27: GETL R5, t22
+ 28: ADDL $0xFFFFFFD4, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R21
+ 31: INCEIPL $4
+
+ 0xFE86920: 82C5FFD8 lwz r22,-40(r5)
+ 32: GETL R5, t26
+ 33: ADDL $0xFFFFFFD8, t26
+ 34: LDL (t26), t28
+ 35: PUTL t28, R22
+ 36: INCEIPL $4
+
+ 0xFE86924: 82E5FFDC lwz r23,-36(r5)
+ 37: GETL R5, t30
+ 38: ADDL $0xFFFFFFDC, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R23
+ 41: INCEIPL $4
+
+ 0xFE86928: 8305FFE0 lwz r24,-32(r5)
+ 42: GETL R5, t34
+ 43: ADDL $0xFFFFFFE0, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R24
+ 46: INCEIPL $4
+
+ 0xFE8692C: 8325FFE4 lwz r25,-28(r5)
+ 47: GETL R5, t38
+ 48: ADDL $0xFFFFFFE4, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R25
+ 51: INCEIPL $4
+
+ 0xFE86930: 8345FFE8 lwz r26,-24(r5)
+ 52: GETL R5, t42
+ 53: ADDL $0xFFFFFFE8, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R26
+ 56: INCEIPL $4
+
+ 0xFE86934: 8365FFEC lwz r27,-20(r5)
+ 57: GETL R5, t46
+ 58: ADDL $0xFFFFFFEC, t46
+ 59: LDL (t46), t48
+ 60: PUTL t48, R27
+ 61: INCEIPL $4
+
+ 0xFE86938: 8385FFF0 lwz r28,-16(r5)
+ 62: GETL R5, t50
+ 63: ADDL $0xFFFFFFF0, t50
+ 64: LDL (t50), t52
+ 65: PUTL t52, R28
+ 66: INCEIPL $4
+
+ 0xFE8693C: 83A5FFF4 lwz r29,-12(r5)
+ 67: GETL R5, t54
+ 68: ADDL $0xFFFFFFF4, t54
+ 69: LDL (t54), t56
+ 70: PUTL t56, R29
+ 71: INCEIPL $4
+
+ 0xFE86940: 83C5FFF8 lwz r30,-8(r5)
+ 72: GETL R5, t58
+ 73: ADDL $0xFFFFFFF8, t58
+ 74: LDL (t58), t60
+ 75: PUTL t60, R30
+ 76: INCEIPL $4
+
+ 0xFE86944: 83E5FFFC lwz r31,-4(r5)
+ 77: GETL R5, t62
+ 78: ADDL $0xFFFFFFFC, t62
+ 79: LDL (t62), t64
+ 80: PUTL t64, R31
+ 81: INCEIPL $4
+
+ 0xFE86948: 7CA12B78 or r1,r5,r5
+ 82: GETL R5, t66
+ 83: PUTL t66, R1
+ 84: INCEIPL $4
+
+ 0xFE8694C: 4E800020 blr
+ 85: GETL LR, t68
+ 86: JMPo-r t68 ($4)
+
+
+
+. 2090 FE86904 76
+. 80 A1 00 00 83 65 00 04 82 45 FF C8 7F 68 03 A6 82 65 FF CC 82 85 FF D0 82 A5 FF D4 82 C5 FF D8 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
+==== BB 2091 (0x10001614) approx BBs exec'd 0 ====
+
+ 0x10001614: 809E0088 lwz r4,136(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x88, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x10001618: 807E008C lwz r3,140(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x8C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x1000161C: 837E0204 lwz r27,516(r30)
+ 10: GETL R30, t8
+ 11: ADDL $0x204, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R27
+ 14: INCEIPL $4
+
+ 0x10001620: 480195CD bl 0x1001ABEC
+ 15: MOVL $0x10001624, t12
+ 16: PUTL t12, LR
+ 17: JMPo-c $0x1001ABEC ($4)
+
+
+
+. 2091 10001614 16
+. 80 9E 00 88 80 7E 00 8C 83 7E 02 04 48 01 95 CD
+==== BB 2092 (0x1001ABEC) approx BBs exec'd 0 ====
+
+ 0x1001ABEC: 3960005C li r11,92
+ 0: MOVL $0x5C, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001ABF0: 4BFFFF1C b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 2092 1001ABEC 8
+. 39 60 00 5C 4B FF FF 1C
+==== BB 2093 bindtextdomain(0xFE8A420) approx BBs exec'd 0 ====
+
+ 0xFE8A420: 7CA802A6 mflr r5
+ 0: GETL LR, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFE8A424: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFE8A428: 90810008 stw r4,8(r1)
+ 9: GETL R4, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFE8A42C: 38810008 addi r4,r1,8
+ 14: GETL R1, t10
+ 15: ADDL $0x8, t10
+ 16: PUTL t10, R4
+ 17: INCEIPL $4
+
+ 0xFE8A430: 90A10024 stw r5,36(r1)
+ 18: GETL R5, t12
+ 19: GETL R1, t14
+ 20: ADDL $0x24, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0xFE8A434: 38A00000 li r5,0
+ 23: MOVL $0x0, t16
+ 24: PUTL t16, R5
+ 25: INCEIPL $4
+
+ 0xFE8A438: 4BFFFBB1 bl 0xFE89FE8
+ 26: MOVL $0xFE8A43C, t18
+ 27: PUTL t18, LR
+ 28: JMPo-c $0xFE89FE8 ($4)
+
+
+
+. 2093 FE8A420 28
+. 7C A8 02 A6 94 21 FF E0 90 81 00 08 38 81 00 08 90 A1 00 24 38 A0 00 00 4B FF FB B1
+==== BB 2094 set_binding_values(0xFE89FE8) approx BBs exec'd 0 ====
+
+ 0xFE89FE8: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE89FEC: 7D800026 mfcr r12
+ 6: GETL CR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFE89FF0: 93810020 stw r28,32(r1)
+ 9: GETL R28, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x20, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFE89FF4: 7C7C1B79 or. r28,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R28
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFE89FF8: 7C0802A6 mflr r0
+ 19: GETL LR, t14
+ 20: PUTL t14, R0
+ 21: INCEIPL $4
+
+ 0xFE89FFC: 4811DE55 bl 0xFFA7E50
+ 22: MOVL $0xFE8A000, t16
+ 23: PUTL t16, LR
+ 24: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2094 FE89FE8 24
+. 94 21 FF D0 7D 80 00 26 93 81 00 20 7C 7C 1B 79 7C 08 02 A6 48 11 DE 55
+==== BB 2095 (0xFE8A000) approx BBs exec'd 0 ====
+
+ 0xFE8A000: 93410018 stw r26,24(r1)
+ 0: GETL R26, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE8A004: 7CBA2B78 or r26,r5,r5
+ 5: GETL R5, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0xFE8A008: 93A10024 stw r29,36(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x24, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE8A00C: 7C9D2378 or r29,r4,r4
+ 13: GETL R4, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0xFE8A010: 93C10028 stw r30,40(r1)
+ 16: GETL R30, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x28, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFE8A014: 7FC802A6 mflr r30
+ 21: GETL LR, t16
+ 22: PUTL t16, R30
+ 23: INCEIPL $4
+
+ 0xFE8A018: 92E1000C stw r23,12(r1)
+ 24: GETL R23, t18
+ 25: GETL R1, t20
+ 26: ADDL $0xC, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xFE8A01C: 93010010 stw r24,16(r1)
+ 29: GETL R24, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x10, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFE8A020: 93210014 stw r25,20(r1)
+ 34: GETL R25, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x14, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFE8A024: 9361001C stw r27,28(r1)
+ 39: GETL R27, t30
+ 40: GETL R1, t32
+ 41: ADDL $0x1C, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFE8A028: 93E1002C stw r31,44(r1)
+ 44: GETL R31, t34
+ 45: GETL R1, t36
+ 46: ADDL $0x2C, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0xFE8A02C: 90010034 stw r0,52(r1)
+ 49: GETL R0, t38
+ 50: GETL R1, t40
+ 51: ADDL $0x34, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0xFE8A030: 91810008 stw r12,8(r1)
+ 54: GETL R12, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x8, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0xFE8A034: 4182014C bc 12,2,0xFE8A180
+ 59: Js02o $0xFE8A180
+
+
+
+. 2095 FE8A000 56
+. 93 41 00 18 7C BA 2B 78 93 A1 00 24 7C 9D 23 78 93 C1 00 28 7F C8 02 A6 92 E1 00 0C 93 01 00 10 93 21 00 14 93 61 00 1C 93 E1 00 2C 90 01 00 34 91 81 00 08 41 82 01 4C
+==== BB 2096 (0xFE8A038) approx BBs exec'd 0 ====
+
+ 0xFE8A038: 887C0000 lbz r3,0(r28)
+ 0: GETL R28, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE8A03C: 2F830000 cmpi cr7,r3,0
+ 4: GETL R3, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFE8A040: 419E0140 bc 12,30,0xFE8A180
+ 8: Js30o $0xFE8A180
+
+
+
+. 2096 FE8A038 12
+. 88 7C 00 00 2F 83 00 00 41 9E 01 40
+==== BB 2097 (0xFE8A044) approx BBs exec'd 0 ====
+
+ 0xFE8A044: 82FE1B48 lwz r23,6984(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1B48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0xFE8A048: 801700A4 lwz r0,164(r23)
+ 5: GETL R23, t4
+ 6: ADDL $0xA4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFE8A04C: 2E000000 cmpi cr4,r0,0
+ 10: GETL R0, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x4, CR
+ 13: INCEIPL $4
+
+ 0xFE8A050: 4092018C bc 4,18,0xFE8A1DC
+ 14: Jc18o $0xFE8A1DC
+
+
+
+. 2097 FE8A044 16
+. 82 FE 1B 48 80 17 00 A4 2E 00 00 00 40 92 01 8C
+==== BB 2098 (0xFE8A054) approx BBs exec'd 0 ====
+
+ 0xFE8A054: 833E1AC8 lwz r25,6856(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1AC8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0xFE8A058: 3B000000 li r24,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R24
+ 7: INCEIPL $4
+
+ 0xFE8A05C: 83F90000 lwz r31,0(r25)
+ 8: GETL R25, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R31
+ 11: INCEIPL $4
+
+ 0xFE8A060: 48000020 b 0xFE8A080
+ 12: JMPo $0xFE8A080 ($4)
+
+
+
+. 2098 FE8A054 16
+. 83 3E 1A C8 3B 00 00 00 83 F9 00 00 48 00 00 20
+==== BB 2099 (0xFE8A080) approx BBs exec'd 0 ====
+
+ 0xFE8A080: 2E1F0000 cmpi cr4,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFE8A084: 4092FFE0 bc 4,18,0xFE8A064
+ 4: Jc18o $0xFE8A064
+
+
+
+. 2099 FE8A080 8
+. 2E 1F 00 00 40 92 FF E0
+==== BB 2100 (0xFE8A088) approx BBs exec'd 0 ====
+
+ 0xFE8A088: 2E1D0000 cmpi cr4,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFE8A08C: 41920014 bc 12,18,0xFE8A0A0
+ 4: Js18o $0xFE8A0A0
+
+
+
+. 2100 FE8A088 8
+. 2E 1D 00 00 41 92 00 14
+==== BB 2101 (0xFE8A090) approx BBs exec'd 0 ====
+
+ 0xFE8A090: 817D0000 lwz r11,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFE8A094: 2D9A0000 cmpi cr3,r26,0
+ 4: GETL R26, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x3, CR
+ 7: INCEIPL $4
+
+ 0xFE8A098: 2F0B0000 cmpi cr6,r11,0
+ 8: GETL R11, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFE8A09C: 409A0018 bc 4,26,0xFE8A0B4
+ 12: Jc26o $0xFE8A0B4
+
+
+
+. 2101 FE8A090 16
+. 81 7D 00 00 2D 9A 00 00 2F 0B 00 00 40 9A 00 18
+==== BB 2102 (0xFE8A0B4) approx BBs exec'd 0 ====
+
+ 0xFE8A0B4: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8A0B8: 4804CA21 bl 0xFED6AD8
+ 3: MOVL $0xFE8A0BC, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2102 FE8A0B4 8
+. 7F 83 E3 78 48 04 CA 21
+==== BB 2103 (0xFE8A0BC) approx BBs exec'd 0 ====
+
+ 0xFE8A0BC: 7C7B1B78 or r27,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R27
+ 2: INCEIPL $4
+
+ 0xFE8A0C0: 38630011 addi r3,r3,17
+ 3: GETL R3, t2
+ 4: ADDL $0x11, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0xFE8A0C4: 3BFB0001 addi r31,r27,1
+ 7: GETL R27, t4
+ 8: ADDL $0x1, t4
+ 9: PUTL t4, R31
+ 10: INCEIPL $4
+
+ 0xFE8A0C8: 48120241 bl 0xFFAA308
+ 11: MOVL $0xFE8A0CC, t6
+ 12: PUTL t6, LR
+ 13: JMPo-c $0xFFAA308 ($4)
+
+
+
+. 2103 FE8A0BC 16
+. 7C 7B 1B 78 38 63 00 11 3B FB 00 01 48 12 02 41
+==== BB 2104 (0xFE8A0CC) approx BBs exec'd 0 ====
+
+ 0xFE8A0CC: 7C7B1B79 or. r27,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R27
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8A0D0: 418202E0 bc 12,2,0xFE8A3B0
+ 5: Js02o $0xFE8A3B0
+
+
+
+. 2104 FE8A0CC 8
+. 7C 7B 1B 79 41 82 02 E0
+==== BB 2105 (0xFE8A0D4) approx BBs exec'd 0 ====
+
+ 0xFE8A0D4: 7FE5FB78 or r5,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFE8A0D8: 387B0010 addi r3,r27,16
+ 3: GETL R27, t2
+ 4: ADDL $0x10, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0xFE8A0DC: 7F84E378 or r4,r28,r28
+ 7: GETL R28, t4
+ 8: PUTL t4, R4
+ 9: INCEIPL $4
+
+ 0xFE8A0E0: 4804E5F9 bl 0xFED86D8
+ 10: MOVL $0xFE8A0E4, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 2105 FE8A0D4 16
+. 7F E5 FB 78 38 7B 00 10 7F 84 E3 78 48 04 E5 F9
+==== BB 2106 (0xFE8A0E4) approx BBs exec'd 0 ====
+
+ 0xFE8A0E4: 41920108 bc 12,18,0xFE8A1EC
+ 0: Js18o $0xFE8A1EC
+
+
+
+. 2106 FE8A0E4 4
+. 41 92 01 08
+==== BB 2107 (0xFE8A0E8) approx BBs exec'd 0 ====
+
+ 0xFE8A0E8: 83FD0000 lwz r31,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R31
+ 3: INCEIPL $4
+
+ 0xFE8A0EC: 807E1C48 lwz r3,7240(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1C48, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFE8A0F0: 2C9F0000 cmpi cr1,r31,0
+ 9: GETL R31, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x1, CR
+ 12: INCEIPL $4
+
+ 0xFE8A0F4: 4186001C bc 12,6,0xFE8A110
+ 13: Js06o $0xFE8A110
+
+
+
+. 2107 FE8A0E8 16
+. 83 FD 00 00 80 7E 1C 48 2C 9F 00 00 41 86 00 1C
+==== BB 2108 (0xFE8A0F8) approx BBs exec'd 0 ====
+
+ 0xFE8A0F8: 7C641B78 or r4,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE8A0FC: 7FE3FB78 or r3,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFE8A100: 4804C2B1 bl 0xFED63B0
+ 6: MOVL $0xFE8A104, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2108 FE8A0F8 12
+. 7C 64 1B 78 7F E3 FB 78 48 04 C2 B1
+==== BB 2109 (0xFE8A104) approx BBs exec'd 0 ====
+
+ 0xFE8A104: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE8A108: 807E1C48 lwz r3,7240(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1C48, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFE8A10C: 409A028C bc 4,26,0xFE8A398
+ 9: Jc26o $0xFE8A398
+
+
+
+. 2109 FE8A104 12
+. 2F 03 00 00 80 7E 1C 48 40 9A 02 8C
+==== BB 2110 (0xFE8A110) approx BBs exec'd 0 ====
+
+ 0xFE8A110: 39800000 li r12,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0xFE8A114: 907D0000 stw r3,0(r29)
+ 3: GETL R3, t2
+ 4: GETL R29, t4
+ 5: STL t2, (t4)
+ 6: INCEIPL $4
+
+ 0xFE8A118: 919B0008 stw r12,8(r27)
+ 7: GETL R12, t6
+ 8: GETL R27, t8
+ 9: ADDL $0x8, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFE8A11C: 907B0004 stw r3,4(r27)
+ 12: GETL R3, t10
+ 13: GETL R27, t12
+ 14: ADDL $0x4, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0xFE8A120: 408E00E0 bc 4,14,0xFE8A200
+ 17: Jc14o $0xFE8A200
+
+
+
+. 2110 FE8A110 20
+. 39 80 00 00 90 7D 00 00 91 9B 00 08 90 7B 00 04 40 8E 00 E0
+==== BB 2111 (0xFE8A124) approx BBs exec'd 0 ====
+
+ 0xFE8A124: 935B000C stw r26,12(r27)
+ 0: GETL R26, t0
+ 1: GETL R27, t2
+ 2: ADDL $0xC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE8A128: 83F90000 lwz r31,0(r25)
+ 5: GETL R25, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R31
+ 8: INCEIPL $4
+
+ 0xFE8A12C: 2E1F0000 cmpi cr4,r31,0
+ 9: GETL R31, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x4, CR
+ 12: INCEIPL $4
+
+ 0xFE8A130: 41920100 bc 12,18,0xFE8A230
+ 13: Js18o $0xFE8A230
+
+
+
+. 2111 FE8A124 16
+. 93 5B 00 0C 83 F9 00 00 2E 1F 00 00 41 92 01 00
+==== BB 2112 (0xFE8A230) approx BBs exec'd 0 ====
+
+ 0xFE8A230: 93FB0000 stw r31,0(r27)
+ 0: GETL R31, t0
+ 1: GETL R27, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE8A234: 93790000 stw r27,0(r25)
+ 4: GETL R27, t4
+ 5: GETL R25, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0xFE8A238: 835E1B1C lwz r26,6940(r30)
+ 8: GETL R30, t8
+ 9: ADDL $0x1B1C, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R26
+ 12: INCEIPL $4
+
+ 0xFE8A23C: 80DA0000 lwz r6,0(r26)
+ 13: GETL R26, t12
+ 14: LDL (t12), t14
+ 15: PUTL t14, R6
+ 16: INCEIPL $4
+
+ 0xFE8A240: 38A60001 addi r5,r6,1
+ 17: GETL R6, t16
+ 18: ADDL $0x1, t16
+ 19: PUTL t16, R5
+ 20: INCEIPL $4
+
+ 0xFE8A244: 90BA0000 stw r5,0(r26)
+ 21: GETL R5, t18
+ 22: GETL R26, t20
+ 23: STL t18, (t20)
+ 24: INCEIPL $4
+
+ 0xFE8A248: 801700A8 lwz r0,168(r23)
+ 25: GETL R23, t22
+ 26: ADDL $0xA8, t22
+ 27: LDL (t22), t24
+ 28: PUTL t24, R0
+ 29: INCEIPL $4
+
+ 0xFE8A24C: 2E000000 cmpi cr4,r0,0
+ 30: GETL R0, t26
+ 31: CMP0L t26, t28 (-rSo)
+ 32: ICRFL t28, $0x4, CR
+ 33: INCEIPL $4
+
+ 0xFE8A250: 4192FF50 bc 12,18,0xFE8A1A0
+ 34: Js18o $0xFE8A1A0
+
+
+
+. 2112 FE8A230 36
+. 93 FB 00 00 93 79 00 00 83 5E 1B 1C 80 DA 00 00 38 A6 00 01 90 BA 00 00 80 17 00 A8 2E 00 00 00 41 92 FF 50
+==== BB 2113 (0xFE8A1A0) approx BBs exec'd 0 ====
+
+ 0xFE8A1A0: 82E10034 lwz r23,52(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0xFE8A1A4: 81810008 lwz r12,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0xFE8A1A8: 7EE803A6 mtlr r23
+ 10: GETL R23, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFE8A1AC: 83010010 lwz r24,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R24
+ 17: INCEIPL $4
+
+ 0xFE8A1B0: 82E1000C lwz r23,12(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0xC, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R23
+ 22: INCEIPL $4
+
+ 0xFE8A1B4: 7D818120 mtcrf 0x18,r12
+ 23: GETL R12, t18
+ 24: ICRFL t18, $0x3, CR
+ 25: ICRFL t18, $0x4, CR
+ 26: INCEIPL $4
+
+ 0xFE8A1B8: 83210014 lwz r25,20(r1)
+ 27: GETL R1, t20
+ 28: ADDL $0x14, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R25
+ 31: INCEIPL $4
+
+ 0xFE8A1BC: 83410018 lwz r26,24(r1)
+ 32: GETL R1, t24
+ 33: ADDL $0x18, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R26
+ 36: INCEIPL $4
+
+ 0xFE8A1C0: 8361001C lwz r27,28(r1)
+ 37: GETL R1, t28
+ 38: ADDL $0x1C, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R27
+ 41: INCEIPL $4
+
+ 0xFE8A1C4: 83810020 lwz r28,32(r1)
+ 42: GETL R1, t32
+ 43: ADDL $0x20, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R28
+ 46: INCEIPL $4
+
+ 0xFE8A1C8: 83A10024 lwz r29,36(r1)
+ 47: GETL R1, t36
+ 48: ADDL $0x24, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R29
+ 51: INCEIPL $4
+
+ 0xFE8A1CC: 83C10028 lwz r30,40(r1)
+ 52: GETL R1, t40
+ 53: ADDL $0x28, t40
+ 54: LDL (t40), t42
+ 55: PUTL t42, R30
+ 56: INCEIPL $4
+
+ 0xFE8A1D0: 83E1002C lwz r31,44(r1)
+ 57: GETL R1, t44
+ 58: ADDL $0x2C, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R31
+ 61: INCEIPL $4
+
+ 0xFE8A1D4: 38210030 addi r1,r1,48
+ 62: GETL R1, t48
+ 63: ADDL $0x30, t48
+ 64: PUTL t48, R1
+ 65: INCEIPL $4
+
+ 0xFE8A1D8: 4E800020 blr
+ 66: GETL LR, t50
+ 67: JMPo-r t50 ($4)
+
+
+
+. 2113 FE8A1A0 60
+. 82 E1 00 34 81 81 00 08 7E E8 03 A6 83 01 00 10 82 E1 00 0C 7D 81 81 20 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 2114 (0xFE8A43C) approx BBs exec'd 0 ====
+
+ 0xFE8A43C: 80010024 lwz r0,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE8A440: 80610008 lwz r3,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFE8A444: 38210020 addi r1,r1,32
+ 10: GETL R1, t8
+ 11: ADDL $0x20, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xFE8A448: 7C0803A6 mtlr r0
+ 14: GETL R0, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xFE8A44C: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 2114 FE8A43C 20
+. 80 01 00 24 80 61 00 08 38 21 00 20 7C 08 03 A6 4E 80 00 20
+==== BB 2115 (0x10001624) approx BBs exec'd 0 ====
+
+ 0x10001624: 807E008C lwz r3,140(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x10001628: 821E0018 lwz r16,24(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x18, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R16
+ 9: INCEIPL $4
+
+ 0x1000162C: 48019621 bl 0x1001AC4C
+ 10: MOVL $0x10001630, t8
+ 11: PUTL t8, LR
+ 12: JMPo-c $0x1001AC4C ($4)
+
+
+
+. 2115 10001624 12
+. 80 7E 00 8C 82 1E 00 18 48 01 96 21
+==== BB 2116 (0x1001AC4C) approx BBs exec'd 0 ====
+
+ 0x1001AC4C: 3960008C li r11,140
+ 0: MOVL $0x8C, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AC50: 4BFFFEBC b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 2116 1001AC4C 8
+. 39 60 00 8C 4B FF FE BC
+==== BB 2117 textdomain(0xFE8D790) approx BBs exec'd 0 ====
+
+ 0xFE8D790: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE8D794: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE8D798: 93E1001C stw r31,28(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFE8D79C: 7C7F1B79 or. r31,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R31
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFE8D7A0: 4811A6B1 bl 0xFFA7E50
+ 19: MOVL $0xFE8D7A4, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2117 FE8D790 20
+. 94 21 FF E0 7C 08 02 A6 93 E1 00 1C 7C 7F 1B 79 48 11 A6 B1
+==== BB 2118 (0xFE8D7A4) approx BBs exec'd 0 ====
+
+ 0xFE8D7A4: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE8D7A8: 93410008 stw r26,8(r1)
+ 5: GETL R26, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFE8D7AC: 7FC802A6 mflr r30
+ 10: GETL LR, t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0xFE8D7B0: 9361000C stw r27,12(r1)
+ 13: GETL R27, t10
+ 14: GETL R1, t12
+ 15: ADDL $0xC, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE8D7B4: 93810010 stw r28,16(r1)
+ 18: GETL R28, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x10, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFE8D7B8: 93A10014 stw r29,20(r1)
+ 23: GETL R29, t18
+ 24: GETL R1, t20
+ 25: ADDL $0x14, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0xFE8D7BC: 90010024 stw r0,36(r1)
+ 28: GETL R0, t22
+ 29: GETL R1, t24
+ 30: ADDL $0x24, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0xFE8D7C0: 41820108 bc 12,2,0xFE8D8C8
+ 33: Js02o $0xFE8D8C8
+
+
+
+. 2118 FE8D7A4 32
+. 93 C1 00 18 93 41 00 08 7F C8 02 A6 93 61 00 0C 93 81 00 10 93 A1 00 14 90 01 00 24 41 82 01 08
+==== BB 2119 (0xFE8D7C4) approx BBs exec'd 0 ====
+
+ 0xFE8D7C4: 835E1B48 lwz r26,6984(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1B48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFE8D7C8: 801A00A4 lwz r0,164(r26)
+ 5: GETL R26, t4
+ 6: ADDL $0xA4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFE8D7CC: 2F800000 cmpi cr7,r0,0
+ 10: GETL R0, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0xFE8D7D0: 409E00D0 bc 4,30,0xFE8D8A0
+ 14: Jc30o $0xFE8D8A0
+
+
+
+. 2119 FE8D7C4 16
+. 83 5E 1B 48 80 1A 00 A4 2F 80 00 00 40 9E 00 D0
+==== BB 2120 (0xFE8D7D4) approx BBs exec'd 0 ====
+
+ 0xFE8D7D4: 887F0000 lbz r3,0(r31)
+ 0: GETL R31, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE8D7D8: 837E1B14 lwz r27,6932(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1B14, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0xFE8D7DC: 2C830000 cmpi cr1,r3,0
+ 9: GETL R3, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x1, CR
+ 12: INCEIPL $4
+
+ 0xFE8D7E0: 839B0000 lwz r28,0(r27)
+ 13: GETL R27, t12
+ 14: LDL (t12), t14
+ 15: PUTL t14, R28
+ 16: INCEIPL $4
+
+ 0xFE8D7E4: 4186009C bc 12,6,0xFE8D880
+ 17: Js06o $0xFE8D880
+
+
+
+. 2120 FE8D7D4 20
+. 88 7F 00 00 83 7E 1B 14 2C 83 00 00 83 9B 00 00 41 86 00 9C
+==== BB 2121 (0xFE8D7E8) approx BBs exec'd 0 ====
+
+ 0xFE8D7E8: 809E1DD0 lwz r4,7632(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1DD0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE8D7EC: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE8D7F0: 48048BC1 bl 0xFED63B0
+ 8: MOVL $0xFE8D7F4, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2121 FE8D7E8 12
+. 80 9E 1D D0 7F E3 FB 78 48 04 8B C1
+==== BB 2122 (0xFE8D7F4) approx BBs exec'd 0 ====
+
+ 0xFE8D7F4: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE8D7F8: 419A0088 bc 12,26,0xFE8D880
+ 4: Js26o $0xFE8D880
+
+
+
+. 2122 FE8D7F4 8
+. 2F 03 00 00 41 9A 00 88
+==== BB 2123 (0xFE8D7FC) approx BBs exec'd 0 ====
+
+ 0xFE8D7FC: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8D800: 7F84E378 or r4,r28,r28
+ 3: GETL R28, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE8D804: 48048BAD bl 0xFED63B0
+ 6: MOVL $0xFE8D808, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2123 FE8D7FC 12
+. 7F E3 FB 78 7F 84 E3 78 48 04 8B AD
+==== BB 2124 (0xFE8D808) approx BBs exec'd 0 ====
+
+ 0xFE8D808: 7F9DE379 or. r29,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R29
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8D80C: 2F830000 cmpi cr7,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFE8D810: 409E00A0 bc 4,30,0xFE8D8B0
+ 9: Jc30o $0xFE8D8B0
+
+
+
+. 2124 FE8D808 12
+. 7F 9D E3 79 2F 83 00 00 40 9E 00 A0
+==== BB 2125 (0xFE8D8B0) approx BBs exec'd 0 ====
+
+ 0xFE8D8B0: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8D8B4: 48048EE9 bl 0xFED679C
+ 3: MOVL $0xFE8D8B8, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED679C ($4)
+
+
+
+. 2125 FE8D8B0 8
+. 7F E3 FB 78 48 04 8E E9
+==== BB 2126 (0xFE8D8B8) approx BBs exec'd 0 ====
+
+ 0xFE8D8B8: 7C7D1B79 or. r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8D8BC: 41A2FF88 bc 13,2,0xFE8D844
+ 5: Js02o $0xFE8D844
+
+
+
+. 2126 FE8D8B8 8
+. 7C 7D 1B 79 41 A2 FF 88
+==== BB 2127 (0xFE8D8C0) approx BBs exec'd 0 ====
+
+ 0xFE8D8C0: 93BB0000 stw r29,0(r27)
+ 0: GETL R29, t0
+ 1: GETL R27, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE8D8C4: 4BFFFF50 b 0xFE8D814
+ 4: JMPo $0xFE8D814 ($4)
+
+
+
+. 2127 FE8D8C0 8
+. 93 BB 00 00 4B FF FF 50
+==== BB 2128 (0xFE8D814) approx BBs exec'd 0 ====
+
+ 0xFE8D814: 41820030 bc 12,2,0xFE8D844
+ 0: Js02o $0xFE8D844
+
+
+
+. 2128 FE8D814 4
+. 41 82 00 30
+==== BB 2129 (0xFE8D818) approx BBs exec'd 0 ====
+
+ 0xFE8D818: 80BE1B1C lwz r5,6940(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1B1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFE8D81C: 7C1CE800 cmp cr0,r28,r29
+ 5: GETL R28, t4
+ 6: GETL R29, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFE8D820: 80C50000 lwz r6,0(r5)
+ 10: GETL R5, t10
+ 11: LDL (t10), t12
+ 12: PUTL t12, R6
+ 13: INCEIPL $4
+
+ 0xFE8D824: 39660001 addi r11,r6,1
+ 14: GETL R6, t14
+ 15: ADDL $0x1, t14
+ 16: PUTL t14, R11
+ 17: INCEIPL $4
+
+ 0xFE8D828: 91650000 stw r11,0(r5)
+ 18: GETL R11, t16
+ 19: GETL R5, t18
+ 20: STL t16, (t18)
+ 21: INCEIPL $4
+
+ 0xFE8D82C: 41820018 bc 12,2,0xFE8D844
+ 22: Js02o $0xFE8D844
+
+
+
+. 2129 FE8D818 24
+. 80 BE 1B 1C 7C 1C E8 00 80 C5 00 00 39 66 00 01 91 65 00 00 41 82 00 18
+==== BB 2130 (0xFE8D830) approx BBs exec'd 0 ====
+
+ 0xFE8D830: 80FE1DD0 lwz r7,7632(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1DD0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFE8D834: 7C9C3800 cmp cr1,r28,r7
+ 5: GETL R28, t4
+ 6: GETL R7, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFE8D838: 4186000C bc 12,6,0xFE8D844
+ 10: Js06o $0xFE8D844
+
+
+
+. 2130 FE8D830 12
+. 80 FE 1D D0 7C 9C 38 00 41 86 00 0C
+==== BB 2131 (0xFE8D844) approx BBs exec'd 0 ====
+
+ 0xFE8D844: 801A00A8 lwz r0,168(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0xA8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE8D848: 2F000000 cmpi cr6,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFE8D84C: 409A0044 bc 4,26,0xFE8D890
+ 9: Jc26o $0xFE8D890
+
+
+
+. 2131 FE8D844 12
+. 80 1A 00 A8 2F 00 00 00 40 9A 00 44
+==== BB 2132 (0xFE8D850) approx BBs exec'd 0 ====
+
+ 0xFE8D850: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFE8D854: 7FA0EB78 or r0,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFE8D858: 7C030378 or r3,r0,r0
+ 8: GETL R0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFE8D85C: 83410008 lwz r26,8(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x8, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R26
+ 15: INCEIPL $4
+
+ 0xFE8D860: 8361000C lwz r27,12(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0xC, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R27
+ 20: INCEIPL $4
+
+ 0xFE8D864: 7D0803A6 mtlr r8
+ 21: GETL R8, t16
+ 22: PUTL t16, LR
+ 23: INCEIPL $4
+
+ 0xFE8D868: 83810010 lwz r28,16(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x10, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R28
+ 28: INCEIPL $4
+
+ 0xFE8D86C: 83A10014 lwz r29,20(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x14, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R29
+ 33: INCEIPL $4
+
+ 0xFE8D870: 83C10018 lwz r30,24(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x18, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R30
+ 38: INCEIPL $4
+
+ 0xFE8D874: 83E1001C lwz r31,28(r1)
+ 39: GETL R1, t30
+ 40: ADDL $0x1C, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R31
+ 43: INCEIPL $4
+
+ 0xFE8D878: 38210020 addi r1,r1,32
+ 44: GETL R1, t34
+ 45: ADDL $0x20, t34
+ 46: PUTL t34, R1
+ 47: INCEIPL $4
+
+ 0xFE8D87C: 4E800020 blr
+ 48: GETL LR, t36
+ 49: JMPo-r t36 ($4)
+
+
+
+. 2132 FE8D850 48
+. 81 01 00 24 7F A0 EB 78 7C 03 03 78 83 41 00 08 83 61 00 0C 7D 08 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2133 (0x10001630) approx BBs exec'd 0 ====
+
+ 0x10001630: 807E01DC lwz r3,476(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1DC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x10001634: 823E0014 lwz r17,20(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R17
+ 9: INCEIPL $4
+
+ 0x10001638: 831E000C lwz r24,12(r30)
+ 10: GETL R30, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R24
+ 14: INCEIPL $4
+
+ 0x1000163C: 48006505 bl 0x10007B40
+ 15: MOVL $0x10001640, t12
+ 16: PUTL t12, LR
+ 17: JMPo-c $0x10007B40 ($4)
+
+
+
+. 2133 10001630 16
+. 80 7E 01 DC 82 3E 00 14 83 1E 00 0C 48 00 65 05
+==== BB 2134 (0x10007B40) approx BBs exec'd 0 ====
+
+ 0x10007B40: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x10007B44: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x10007B48: 429F0005 bcl 20,31,0x10007B4C
+ 9: MOVL $0x10007B4C, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x10007B4C: 93C10018 stw r30,24(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x10007B50: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0x10007B54: 38A00000 li r5,0
+ 20: MOVL $0x0, t14
+ 21: PUTL t14, R5
+ 22: INCEIPL $4
+
+ 0x10007B58: 90810024 stw r4,36(r1)
+ 23: GETL R4, t16
+ 24: GETL R1, t18
+ 25: ADDL $0x24, t18
+ 26: STL t16, (t18)
+ 27: INCEIPL $4
+
+ 0x10007B5C: 38800000 li r4,0
+ 28: MOVL $0x0, t20
+ 29: PUTL t20, R4
+ 30: INCEIPL $4
+
+ 0x10007B60: 801EFFF0 lwz r0,-16(r30)
+ 31: GETL R30, t22
+ 32: ADDL $0xFFFFFFF0, t22
+ 33: LDL (t22), t24
+ 34: PUTL t24, R0
+ 35: INCEIPL $4
+
+ 0x10007B64: 7FC0F214 add r30,r0,r30
+ 36: GETL R0, t26
+ 37: GETL R30, t28
+ 38: ADDL t26, t28
+ 39: PUTL t28, R30
+ 40: INCEIPL $4
+
+ 0x10007B68: 813E8000 lwz r9,-32768(r30)
+ 41: GETL R30, t30
+ 42: ADDL $0xFFFF8000, t30
+ 43: LDL (t30), t32
+ 44: PUTL t32, R9
+ 45: INCEIPL $4
+
+ 0x10007B6C: 2F890000 cmpi cr7,r9,0
+ 46: GETL R9, t34
+ 47: CMP0L t34, t36 (-rSo)
+ 48: ICRFL t36, $0x7, CR
+ 49: INCEIPL $4
+
+ 0x10007B70: 419E0008 bc 12,30,0x10007B78
+ 50: Js30o $0x10007B78
+
+
+
+. 2134 10007B40 52
+. 7C 88 02 A6 94 21 FF E0 42 9F 00 05 93 C1 00 18 7F C8 02 A6 38 A0 00 00 90 81 00 24 38 80 00 00 80 1E FF F0 7F C0 F2 14 81 3E 80 00 2F 89 00 00 41 9E 00 08
+==== BB 2135 (0x10007B74) approx BBs exec'd 0 ====
+
+ 0x10007B74: 80A90000 lwz r5,0(r9)
+ 0: GETL R9, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x10007B78: 48013035 bl 0x1001ABAC
+ 4: MOVL $0x10007B7C, t4
+ 5: PUTL t4, LR
+ 6: JMPo-c $0x1001ABAC ($4)
+
+
+
+. 2135 10007B74 8
+. 80 A9 00 00 48 01 30 35
+==== BB 2136 (0x1001ABAC) approx BBs exec'd 0 ====
+
+ 0x1001ABAC: 3960003C li r11,60
+ 0: MOVL $0x3C, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001ABB0: 4BFFFF5C b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 2136 1001ABAC 8
+. 39 60 00 3C 4B FF FF 5C
+==== BB 2137 (0xFE93DA4) approx BBs exec'd 0 ====
+
+ 0xFE93DA4: 80890000 lwz r4,0(r9)
+ 0: GETL R9, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFE93DA8: 39290010 addi r9,r9,16
+ 4: GETL R9, t4
+ 5: ADDL $0x10, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xFE93DAC: 2C840000 cmpi cr1,r4,0
+ 8: GETL R4, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0xFE93DB0: 41860010 bc 12,6,0xFE93DC0
+ 12: Js06o $0xFE93DC0
+
+
+
+. 2137 FE93DA4 16
+. 80 89 00 00 39 29 00 10 2C 84 00 00 41 86 00 10
+==== BB 2138 (0x10007B7C) approx BBs exec'd 0 ====
+
+ 0x10007B7C: 80A10024 lwz r5,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x10007B80: 83C10018 lwz r30,24(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x18, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0x10007B84: 38210020 addi r1,r1,32
+ 10: GETL R1, t8
+ 11: ADDL $0x20, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0x10007B88: 7CA803A6 mtlr r5
+ 14: GETL R5, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0x10007B8C: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 2138 10007B7C 20
+. 80 A1 00 24 83 C1 00 18 38 21 00 20 7C A8 03 A6 4E 80 00 20
+==== BB 2139 (0x10001640) approx BBs exec'd 0 ====
+
+ 0x10001640: 80DE001C lwz r6,28(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x10001644: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x10001648: 7FE4FB78 or r4,r31,r31
+ 8: GETL R31, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x1000164C: 7F85E378 or r5,r28,r28
+ 11: GETL R28, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0x10001650: 38E00000 li r7,0
+ 14: MOVL $0x0, t10
+ 15: PUTL t10, R7
+ 16: INCEIPL $4
+
+ 0x10001654: 48019629 bl 0x1001AC7C
+ 17: MOVL $0x10001658, t12
+ 18: PUTL t12, LR
+ 19: JMPo-c $0x1001AC7C ($4)
+
+
+
+. 2139 10001640 24
+. 80 DE 00 1C 7F A3 EB 78 7F E4 FB 78 7F 85 E3 78 38 E0 00 00 48 01 96 29
+==== BB 2140 (0x1001AC7C) approx BBs exec'd 0 ====
+
+ 0x1001AC7C: 396000A4 li r11,164
+ 0: MOVL $0xA4, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AC80: 4BFFFE8C b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 2140 1001AC7C 8
+. 39 60 00 A4 4B FF FE 8C
+==== BB 2141 getopt_long(0xFF17FB4) approx BBs exec'd 0 ====
+
+ 0xFF17FB4: 7D0802A6 mflr r8
+ 0: GETL LR, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0xFF17FB8: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFF17FBC: 91010014 stw r8,20(r1)
+ 9: GETL R8, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFF17FC0: 39000000 li r8,0
+ 14: MOVL $0x0, t10
+ 15: PUTL t10, R8
+ 16: INCEIPL $4
+
+ 0xFF17FC4: 4BFFFF45 bl 0xFF17F08
+ 17: MOVL $0xFF17FC8, t12
+ 18: PUTL t12, LR
+ 19: JMPo-c $0xFF17F08 ($4)
+
+
+
+. 2141 FF17FB4 20
+. 7D 08 02 A6 94 21 FF F0 91 01 00 14 39 00 00 00 4B FF FF 45
+==== BB 2142 _getopt_internal(0xFF17F08) approx BBs exec'd 0 ====
+
+ 0xFF17F08: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFF17F0C: 7D2802A6 mflr r9
+ 6: GETL LR, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0xFF17F10: 4808FF41 bl 0xFFA7E50
+ 9: MOVL $0xFF17F14, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2142 FF17F08 12
+. 94 21 FF E0 7D 28 02 A6 48 08 FF 41
+==== BB 2143 (0xFF17F14) approx BBs exec'd 0 ====
+
+ 0xFF17F14: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF17F18: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFF17F1C: 93810010 stw r28,16(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFF17F20: 91210024 stw r9,36(r1)
+ 13: GETL R9, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFF17F24: 93A10014 stw r29,20(r1)
+ 18: GETL R29, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFF17F28: 839E1C14 lwz r28,7188(r30)
+ 23: GETL R30, t18
+ 24: ADDL $0x1C14, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R28
+ 27: INCEIPL $4
+
+ 0xFF17F2C: 817E1B58 lwz r11,7000(r30)
+ 28: GETL R30, t22
+ 29: ADDL $0x1B58, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R11
+ 32: INCEIPL $4
+
+ 0xFF17F30: 83BE0BAC lwz r29,2988(r30)
+ 33: GETL R30, t26
+ 34: ADDL $0xBAC, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R29
+ 37: INCEIPL $4
+
+ 0xFF17F34: 801C0000 lwz r0,0(r28)
+ 38: GETL R28, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R0
+ 41: INCEIPL $4
+
+ 0xFF17F38: 818B0000 lwz r12,0(r11)
+ 42: GETL R11, t34
+ 43: LDL (t34), t36
+ 44: PUTL t36, R12
+ 45: INCEIPL $4
+
+ 0xFF17F3C: 7FA9EB78 or r9,r29,r29
+ 46: GETL R29, t38
+ 47: PUTL t38, R9
+ 48: INCEIPL $4
+
+ 0xFF17F40: 901D0000 stw r0,0(r29)
+ 49: GETL R0, t40
+ 50: GETL R29, t42
+ 51: STL t40, (t42)
+ 52: INCEIPL $4
+
+ 0xFF17F44: 919D0004 stw r12,4(r29)
+ 53: GETL R12, t44
+ 54: GETL R29, t46
+ 55: ADDL $0x4, t46
+ 56: STL t44, (t46)
+ 57: INCEIPL $4
+
+ 0xFF17F48: 4BFFEDE1 bl 0xFF16D28
+ 58: MOVL $0xFF17F4C, t48
+ 59: PUTL t48, LR
+ 60: JMPo-c $0xFF16D28 ($4)
+
+
+
+. 2143 FF17F14 56
+. 93 C1 00 18 7F C8 02 A6 93 81 00 10 91 21 00 24 93 A1 00 14 83 9E 1C 14 81 7E 1B 58 83 BE 0B AC 80 1C 00 00 81 8B 00 00 7F A9 EB 78 90 1D 00 00 91 9D 00 04 4B FF ED E1
+==== BB 2144 _getopt_internal_r(0xFF16D28) approx BBs exec'd 0 ====
+
+ 0xFF16D28: 7D6802A6 mflr r11
+ 0: GETL LR, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFF16D2C: 7D800026 mfcr r12
+ 3: GETL CR, t2
+ 4: PUTL t2, R12
+ 5: INCEIPL $4
+
+ 0xFF16D30: 9421FF60 stwu r1,-160(r1)
+ 6: GETL R1, t4
+ 7: GETL R1, t6
+ 8: ADDL $0xFFFFFF60, t6
+ 9: PUTL t6, R1
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFF16D34: 4809111D bl 0xFFA7E50
+ 12: MOVL $0xFF16D38, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2144 FF16D28 16
+. 7D 68 02 A6 7D 80 00 26 94 21 FF 60 48 09 11 1D
+==== BB 2145 (0xFF16D38) approx BBs exec'd 0 ====
+
+ 0xFF16D38: 91E1005C stw r15,92(r1)
+ 0: GETL R15, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x5C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF16D3C: 7CEF3B78 or r15,r7,r7
+ 5: GETL R7, t4
+ 6: PUTL t4, R15
+ 7: INCEIPL $4
+
+ 0xFF16D40: 92010060 stw r16,96(r1)
+ 8: GETL R16, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x60, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFF16D44: 92210064 stw r17,100(r1)
+ 13: GETL R17, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x64, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFF16D48: 7D114378 or r17,r8,r8
+ 18: GETL R8, t14
+ 19: PUTL t14, R17
+ 20: INCEIPL $4
+
+ 0xFF16D4C: 92410068 stw r18,104(r1)
+ 21: GETL R18, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x68, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFF16D50: 7CD23378 or r18,r6,r6
+ 26: GETL R6, t20
+ 27: PUTL t20, R18
+ 28: INCEIPL $4
+
+ 0xFF16D54: 92C10078 stw r22,120(r1)
+ 29: GETL R22, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x78, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFF16D58: 7CB62B78 or r22,r5,r5
+ 34: GETL R5, t26
+ 35: PUTL t26, R22
+ 36: INCEIPL $4
+
+ 0xFF16D5C: 93210084 stw r25,132(r1)
+ 37: GETL R25, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x84, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFF16D60: 7C791B79 or. r25,r3,r3
+ 42: GETL R3, t32
+ 43: PUTL t32, R25
+ 44: CMP0L t32, t34 (-rSo)
+ 45: ICRFL t34, $0x0, CR
+ 46: INCEIPL $4
+
+ 0xFF16D64: 93810090 stw r28,144(r1)
+ 47: GETL R28, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x90, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0xFF16D68: 7D3C4B78 or r28,r9,r9
+ 52: GETL R9, t40
+ 53: PUTL t40, R28
+ 54: INCEIPL $4
+
+ 0xFF16D6C: 93C10098 stw r30,152(r1)
+ 55: GETL R30, t42
+ 56: GETL R1, t44
+ 57: ADDL $0x98, t44
+ 58: STL t42, (t44)
+ 59: INCEIPL $4
+
+ 0xFF16D70: 7FC802A6 mflr r30
+ 60: GETL LR, t46
+ 61: PUTL t46, R30
+ 62: INCEIPL $4
+
+ 0xFF16D74: 93E1009C stw r31,156(r1)
+ 63: GETL R31, t48
+ 64: GETL R1, t50
+ 65: ADDL $0x9C, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0xFF16D78: 7C9F2378 or r31,r4,r4
+ 68: GETL R4, t52
+ 69: PUTL t52, R31
+ 70: INCEIPL $4
+
+ 0xFF16D7C: 916100A4 stw r11,164(r1)
+ 71: GETL R11, t54
+ 72: GETL R1, t56
+ 73: ADDL $0xA4, t56
+ 74: STL t54, (t56)
+ 75: INCEIPL $4
+
+ 0xFF16D80: 91C10058 stw r14,88(r1)
+ 76: GETL R14, t58
+ 77: GETL R1, t60
+ 78: ADDL $0x58, t60
+ 79: STL t58, (t60)
+ 80: INCEIPL $4
+
+ 0xFF16D84: 9261006C stw r19,108(r1)
+ 81: GETL R19, t62
+ 82: GETL R1, t64
+ 83: ADDL $0x6C, t64
+ 84: STL t62, (t64)
+ 85: INCEIPL $4
+
+ 0xFF16D88: 92810070 stw r20,112(r1)
+ 86: GETL R20, t66
+ 87: GETL R1, t68
+ 88: ADDL $0x70, t68
+ 89: STL t66, (t68)
+ 90: INCEIPL $4
+
+ 0xFF16D8C: 92A10074 stw r21,116(r1)
+ 91: GETL R21, t70
+ 92: GETL R1, t72
+ 93: ADDL $0x74, t72
+ 94: STL t70, (t72)
+ 95: INCEIPL $4
+
+ 0xFF16D90: 92E1007C stw r23,124(r1)
+ 96: GETL R23, t74
+ 97: GETL R1, t76
+ 98: ADDL $0x7C, t76
+ 99: STL t74, (t76)
+ 100: INCEIPL $4
+
+ 0xFF16D94: 93010080 stw r24,128(r1)
+ 101: GETL R24, t78
+ 102: GETL R1, t80
+ 103: ADDL $0x80, t80
+ 104: STL t78, (t80)
+ 105: INCEIPL $4
+
+ 0xFF16D98: 93410088 stw r26,136(r1)
+ 106: GETL R26, t82
+ 107: GETL R1, t84
+ 108: ADDL $0x88, t84
+ 109: STL t82, (t84)
+ 110: INCEIPL $4
+
+ 0xFF16D9C: 9361008C stw r27,140(r1)
+ 111: GETL R27, t86
+ 112: GETL R1, t88
+ 113: ADDL $0x8C, t88
+ 114: STL t86, (t88)
+ 115: INCEIPL $4
+
+ 0xFF16DA0: 93A10094 stw r29,148(r1)
+ 116: GETL R29, t90
+ 117: GETL R1, t92
+ 118: ADDL $0x94, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0xFF16DA4: 91810054 stw r12,84(r1)
+ 121: GETL R12, t94
+ 122: GETL R1, t96
+ 123: ADDL $0x54, t96
+ 124: STL t94, (t96)
+ 125: INCEIPL $4
+
+ 0xFF16DA8: 89450000 lbz r10,0(r5)
+ 126: GETL R5, t98
+ 127: LDB (t98), t100
+ 128: PUTL t100, R10
+ 129: INCEIPL $4
+
+ 0xFF16DAC: 81290004 lwz r9,4(r9)
+ 130: GETL R9, t102
+ 131: ADDL $0x4, t102
+ 132: LDL (t102), t104
+ 133: PUTL t104, R9
+ 134: INCEIPL $4
+
+ 0xFF16DB0: 6945003A xori r5,r10,0x3A
+ 135: GETL R10, t106
+ 136: XORL $0x3A, t106
+ 137: PUTL t106, R5
+ 138: INCEIPL $4
+
+ 0xFF16DB4: 7C6500D0 neg r3,r5
+ 139: GETL R5, t108
+ 140: NEGL t108
+ 141: PUTL t108, R3
+ 142: INCEIPL $4
+
+ 0xFF16DB8: 38A0FFFF li r5,-1
+ 143: MOVL $0xFFFFFFFF, t110
+ 144: PUTL t110, R5
+ 145: INCEIPL $4
+
+ 0xFF16DBC: 7C60FE70 srawi r0,r3,31
+ 146: GETL R3, t112
+ 147: SARL $0x1F, t112 (-wCa)
+ 148: PUTL t112, R0
+ 149: INCEIPL $4
+
+ 0xFF16DC0: 7D300038 and r16,r9,r0
+ 150: GETL R9, t114
+ 151: GETL R0, t116
+ 152: ANDL t114, t116
+ 153: PUTL t116, R16
+ 154: INCEIPL $4
+
+ 0xFF16DC4: 408101DC bc 4,1,0xFF16FA0
+ 155: Jc01o $0xFF16FA0
+
+
+
+. 2145 FF16D38 144
+. 91 E1 00 5C 7C EF 3B 78 92 01 00 60 92 21 00 64 7D 11 43 78 92 41 00 68 7C D2 33 78 92 C1 00 78 7C B6 2B 78 93 21 00 84 7C 79 1B 79 93 81 00 90 7D 3C 4B 78 93 C1 00 98 7F C8 02 A6 93 E1 00 9C 7C 9F 23 78 91 61 00 A4 91 C1 00 58 92 61 00 6C 92 81 00 70 92 A1 00 74 92 E1 00 7C 93 01 00 80 93 41 00 88 93 61 00 8C 93 A1 00 94 91 81 00 54 89 45 00 00 81 29 00 04 69 45 00 3A 7C 65 00 D0 38 A0 FF FF 7C 60 FE 70 7D 30 00 38 40 81 01 DC
+==== BB 2146 (0xFF16DC8) approx BBs exec'd 0 ====
+
+ 0xFF16DC8: 813C0000 lwz r9,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFF16DCC: 3BA00000 li r29,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R29
+ 6: INCEIPL $4
+
+ 0xFF16DD0: 93BC000C stw r29,12(r28)
+ 7: GETL R29, t6
+ 8: GETL R28, t8
+ 9: ADDL $0xC, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFF16DD4: 2F890000 cmpi cr7,r9,0
+ 12: GETL R9, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0xFF16DD8: 419E0130 bc 12,30,0xFF16F08
+ 16: Js30o $0xFF16F08
+
+
+
+. 2146 FF16DC8 20
+. 81 3C 00 00 3B A0 00 00 93 BC 00 0C 2F 89 00 00 41 9E 01 30
+==== BB 2147 (0xFF16DDC) approx BBs exec'd 0 ====
+
+ 0xFF16DDC: 809C0010 lwz r4,16(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFF16DE0: 2C840000 cmpi cr1,r4,0
+ 5: GETL R4, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFF16DE4: 4186012C bc 12,6,0xFF16F10
+ 9: Js06o $0xFF16F10
+
+
+
+. 2147 FF16DDC 12
+. 80 9C 00 10 2C 84 00 00 41 86 01 2C
+==== BB 2148 (0xFF16F10) approx BBs exec'd 0 ====
+
+ 0xFF16F10: 807E0BB0 lwz r3,2992(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xBB0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFF16F14: 913C0020 stw r9,32(r28)
+ 5: GETL R9, t4
+ 6: GETL R28, t6
+ 7: ADDL $0x20, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFF16F18: 913C0024 stw r9,36(r28)
+ 10: GETL R9, t8
+ 11: GETL R28, t10
+ 12: ADDL $0x24, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFF16F1C: 93BC0014 stw r29,20(r28)
+ 15: GETL R29, t12
+ 16: GETL R28, t14
+ 17: ADDL $0x14, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFF16F20: 4BF7C279 bl 0xFE93198
+ 20: MOVL $0xFF16F24, t16
+ 21: PUTL t16, LR
+ 22: JMPo-c $0xFE93198 ($4)
+
+
+
+. 2148 FF16F10 20
+. 80 7E 0B B0 91 3C 00 20 91 3C 00 24 93 BC 00 14 4B F7 C2 79
+==== BB 2149 (0xFF16F24) approx BBs exec'd 0 ====
+
+ 0xFF16F24: 7ECBB378 or r11,r22,r22
+ 0: GETL R22, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFF16F28: 3003FFFF addic r0,r3,-1
+ 3: GETL R3, t2
+ 4: ADCL $0xFFFFFFFF, t2 (-wCa)
+ 5: PUTL t2, R0
+ 6: INCEIPL $4
+
+ 0xFF16F2C: 7D201910 subfe r9,r0,r3
+ 7: GETL R0, t4
+ 8: GETL R3, t6
+ 9: SBBL t4, t6 (-rCa-wCa)
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0xFF16F30: 913C001C stw r9,28(r28)
+ 12: GETL R9, t8
+ 13: GETL R28, t10
+ 14: ADDL $0x1C, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFF16F34: 88160000 lbz r0,0(r22)
+ 17: GETL R22, t12
+ 18: LDB (t12), t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0xFF16F38: 2E00002D cmpi cr4,r0,45
+ 21: GETL R0, t16
+ 22: MOVL $0x2D, t20
+ 23: CMPL t16, t20, t18 (-rSo)
+ 24: ICRFL t18, $0x4, CR
+ 25: INCEIPL $4
+
+ 0xFF16F3C: 41920254 bc 12,18,0xFF17190
+ 26: Js18o $0xFF17190
+
+
+
+. 2149 FF16F24 28
+. 7E CB B3 78 30 03 FF FF 7D 20 19 10 91 3C 00 1C 88 16 00 00 2E 00 00 2D 41 92 02 54
+==== BB 2150 (0xFF16F40) approx BBs exec'd 0 ====
+
+ 0xFF16F40: 2F00002B cmpi cr6,r0,43
+ 0: GETL R0, t0
+ 1: MOVL $0x2B, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFF16F44: 419A0258 bc 12,26,0xFF1719C
+ 5: Js26o $0xFF1719C
+
+
+
+. 2150 FF16F40 8
+. 2F 00 00 2B 41 9A 02 58
+==== BB 2151 (0xFF16F48) approx BBs exec'd 0 ====
+
+ 0xFF16F48: 2C090000 cmpi cr0,r9,0
+ 0: GETL R9, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFF16F4C: 38000001 li r0,1
+ 4: MOVL $0x1, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFF16F50: 40820250 bc 4,2,0xFF171A0
+ 7: Jc02o $0xFF171A0
+
+
+
+. 2151 FF16F48 12
+. 2C 09 00 00 38 00 00 01 40 82 02 50
+==== BB 2152 (0xFF16F54) approx BBs exec'd 0 ====
+
+ 0xFF16F54: 901C0018 stw r0,24(r28)
+ 0: GETL R0, t0
+ 1: GETL R28, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF16F58: 38C00001 li r6,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0xFF16F5C: 7D765B78 or r22,r11,r11
+ 8: GETL R11, t6
+ 9: PUTL t6, R22
+ 10: INCEIPL $4
+
+ 0xFF16F60: 90DC0010 stw r6,16(r28)
+ 11: GETL R6, t8
+ 12: GETL R28, t10
+ 13: ADDL $0x10, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFF16F64: 4BFFFE84 b 0xFF16DE8
+ 16: JMPo $0xFF16DE8 ($4)
+
+
+
+. 2152 FF16F54 20
+. 90 1C 00 18 38 C0 00 01 7D 76 5B 78 90 DC 00 10 4B FF FE 84
+==== BB 2153 (0xFF16DE8) approx BBs exec'd 0 ====
+
+ 0xFF16DE8: 835C0014 lwz r26,20(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFF16DEC: 2F9A0000 cmpi cr7,r26,0
+ 5: GETL R26, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFF16DF0: 419E0014 bc 12,30,0xFF16E04
+ 9: Js30o $0xFF16E04
+
+
+
+. 2153 FF16DE8 12
+. 83 5C 00 14 2F 9A 00 00 41 9E 00 14
+==== BB 2154 (0xFF16E04) approx BBs exec'd 0 ====
+
+ 0xFF16E04: 80BC0024 lwz r5,36(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFF16E08: 811C0000 lwz r8,0(r28)
+ 5: GETL R28, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R8
+ 8: INCEIPL $4
+
+ 0xFF16E0C: 7E054000 cmp cr4,r5,r8
+ 9: GETL R5, t8
+ 10: GETL R8, t10
+ 11: CMPL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x4, CR
+ 13: INCEIPL $4
+
+ 0xFF16E10: 4091000C bc 4,17,0xFF16E1C
+ 14: Jc17o $0xFF16E1C
+
+
+
+. 2154 FF16E04 16
+. 80 BC 00 24 81 1C 00 00 7E 05 40 00 40 91 00 0C
+==== BB 2155 (0xFF16E1C) approx BBs exec'd 0 ====
+
+ 0xFF16E1C: 83BC0020 lwz r29,32(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFF16E20: 7F1D4000 cmp cr6,r29,r8
+ 5: GETL R29, t4
+ 6: GETL R8, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFF16E24: 4099000C bc 4,25,0xFF16E30
+ 10: Jc25o $0xFF16E30
+
+
+
+. 2155 FF16E1C 12
+. 83 BC 00 20 7F 1D 40 00 40 99 00 0C
+==== BB 2156 (0xFF16E30) approx BBs exec'd 0 ====
+
+ 0xFF16E30: 837C0018 lwz r27,24(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xFF16E34: 2C1B0001 cmpi cr0,r27,1
+ 5: GETL R27, t4
+ 6: MOVL $0x1, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFF16E38: 418202C4 bc 12,2,0xFF170FC
+ 10: Js02o $0xFF170FC
+
+
+
+. 2156 FF16E30 12
+. 83 7C 00 18 2C 1B 00 01 41 82 02 C4
+==== BB 2157 (0xFF170FC) approx BBs exec'd 0 ====
+
+ 0xFF170FC: 7F9D2800 cmp cr7,r29,r5
+ 0: GETL R29, t0
+ 1: GETL R5, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFF17100: 419E0248 bc 12,30,0xFF17348
+ 5: Js30o $0xFF17348
+
+
+
+. 2157 FF170FC 8
+. 7F 9D 28 00 41 9E 02 48
+==== BB 2158 (0xFF17348) approx BBs exec'd 0 ====
+
+ 0xFF17348: 7F854000 cmp cr7,r5,r8
+ 0: GETL R5, t0
+ 1: GETL R8, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFF1734C: 419E000C bc 12,30,0xFF17358
+ 5: Js30o $0xFF17358
+
+
+
+. 2158 FF17348 8
+. 7F 85 40 00 41 9E 00 0C
+==== BB 2159 (0xFF17358) approx BBs exec'd 0 ====
+
+ 0xFF17358: 7C88C800 cmp cr1,r8,r25
+ 0: GETL R8, t0
+ 1: GETL R25, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFF1735C: 5500103A rlwinm r0,r8,2,0,29
+ 5: GETL R8, t6
+ 6: SHLL $0x2, t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0xFF17360: 40840028 bc 4,4,0xFF17388
+ 9: Jc04o $0xFF17388
+
+
+
+. 2159 FF17358 12
+. 7C 88 C8 00 55 00 10 3A 40 84 00 28
+==== BB 2160 (0xFF17388) approx BBs exec'd 0 ====
+
+ 0xFF17388: 7D054378 or r5,r8,r8
+ 0: GETL R8, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFF1738C: 911C0024 stw r8,36(r28)
+ 3: GETL R8, t2
+ 4: GETL R28, t4
+ 5: ADDL $0x24, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFF17390: 4BFFFAAC b 0xFF16E3C
+ 8: JMPo $0xFF16E3C ($4)
+
+
+
+. 2160 FF17388 12
+. 7D 05 43 78 91 1C 00 24 4B FF FA AC
+==== BB 2161 (0xFF16E3C) approx BBs exec'd 0 ====
+
+ 0xFF16E3C: 7C08C800 cmp cr0,r8,r25
+ 0: GETL R8, t0
+ 1: GETL R25, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFF16E40: 418201DC bc 12,2,0xFF1701C
+ 5: Js02o $0xFF1701C
+
+
+
+. 2161 FF16E3C 8
+. 7C 08 C8 00 41 82 01 DC
+==== BB 2162 (0xFF1701C) approx BBs exec'd 0 ====
+
+ 0xFF1701C: 7F08C800 cmp cr6,r8,r25
+ 0: GETL R8, t0
+ 1: GETL R25, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFF17020: 419A07D8 bc 12,26,0xFF177F8
+ 5: Js26o $0xFF177F8
+
+
+
+. 2162 FF1701C 8
+. 7F 08 C8 00 41 9A 07 D8
+==== BB 2163 (0xFF177F8) approx BBs exec'd 0 ====
+
+ 0xFF177F8: 7F9D2800 cmp cr7,r29,r5
+ 0: GETL R29, t0
+ 1: GETL R5, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFF177FC: 419E0008 bc 12,30,0xFF17804
+ 5: Js30o $0xFF17804
+
+
+
+. 2163 FF177F8 8
+. 7F 9D 28 00 41 9E 00 08
+==== BB 2164 (0xFF17804) approx BBs exec'd 0 ====
+
+ 0xFF17804: 38A0FFFF li r5,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFF17808: 4BFFF798 b 0xFF16FA0
+ 3: JMPo $0xFF16FA0 ($4)
+
+
+
+. 2164 FF17804 8
+. 38 A0 FF FF 4B FF F7 98
+==== BB 2165 (0xFF16FA0) approx BBs exec'd 0 ====
+
+ 0xFF16FA0: 800100A4 lwz r0,164(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0xA4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFF16FA4: 7CA32B78 or r3,r5,r5
+ 5: GETL R5, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFF16FA8: 81410054 lwz r10,84(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x54, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0xFF16FAC: 81C10058 lwz r14,88(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x58, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R14
+ 17: INCEIPL $4
+
+ 0xFF16FB0: 7C0803A6 mtlr r0
+ 18: GETL R0, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFF16FB4: 81E1005C lwz r15,92(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x5C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R15
+ 25: INCEIPL $4
+
+ 0xFF16FB8: 7D408120 mtcrf 0x8,r10
+ 26: GETL R10, t20
+ 27: ICRFL t20, $0x4, CR
+ 28: INCEIPL $4
+
+ 0xFF16FBC: 82010060 lwz r16,96(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x60, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R16
+ 33: INCEIPL $4
+
+ 0xFF16FC0: 82210064 lwz r17,100(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x64, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R17
+ 38: INCEIPL $4
+
+ 0xFF16FC4: 82410068 lwz r18,104(r1)
+ 39: GETL R1, t30
+ 40: ADDL $0x68, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R18
+ 43: INCEIPL $4
+
+ 0xFF16FC8: 8261006C lwz r19,108(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x6C, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R19
+ 48: INCEIPL $4
+
+ 0xFF16FCC: 82810070 lwz r20,112(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x70, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R20
+ 53: INCEIPL $4
+
+ 0xFF16FD0: 82A10074 lwz r21,116(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x74, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R21
+ 58: INCEIPL $4
+
+ 0xFF16FD4: 82C10078 lwz r22,120(r1)
+ 59: GETL R1, t46
+ 60: ADDL $0x78, t46
+ 61: LDL (t46), t48
+ 62: PUTL t48, R22
+ 63: INCEIPL $4
+
+ 0xFF16FD8: 82E1007C lwz r23,124(r1)
+ 64: GETL R1, t50
+ 65: ADDL $0x7C, t50
+ 66: LDL (t50), t52
+ 67: PUTL t52, R23
+ 68: INCEIPL $4
+
+ 0xFF16FDC: 83010080 lwz r24,128(r1)
+ 69: GETL R1, t54
+ 70: ADDL $0x80, t54
+ 71: LDL (t54), t56
+ 72: PUTL t56, R24
+ 73: INCEIPL $4
+
+ 0xFF16FE0: 83210084 lwz r25,132(r1)
+ 74: GETL R1, t58
+ 75: ADDL $0x84, t58
+ 76: LDL (t58), t60
+ 77: PUTL t60, R25
+ 78: INCEIPL $4
+
+ 0xFF16FE4: 83410088 lwz r26,136(r1)
+ 79: GETL R1, t62
+ 80: ADDL $0x88, t62
+ 81: LDL (t62), t64
+ 82: PUTL t64, R26
+ 83: INCEIPL $4
+
+ 0xFF16FE8: 8361008C lwz r27,140(r1)
+ 84: GETL R1, t66
+ 85: ADDL $0x8C, t66
+ 86: LDL (t66), t68
+ 87: PUTL t68, R27
+ 88: INCEIPL $4
+
+ 0xFF16FEC: 83810090 lwz r28,144(r1)
+ 89: GETL R1, t70
+ 90: ADDL $0x90, t70
+ 91: LDL (t70), t72
+ 92: PUTL t72, R28
+ 93: INCEIPL $4
+
+ 0xFF16FF0: 83A10094 lwz r29,148(r1)
+ 94: GETL R1, t74
+ 95: ADDL $0x94, t74
+ 96: LDL (t74), t76
+ 97: PUTL t76, R29
+ 98: INCEIPL $4
+
+ 0xFF16FF4: 83C10098 lwz r30,152(r1)
+ 99: GETL R1, t78
+ 100: ADDL $0x98, t78
+ 101: LDL (t78), t80
+ 102: PUTL t80, R30
+ 103: INCEIPL $4
+
+ 0xFF16FF8: 83E1009C lwz r31,156(r1)
+ 104: GETL R1, t82
+ 105: ADDL $0x9C, t82
+ 106: LDL (t82), t84
+ 107: PUTL t84, R31
+ 108: INCEIPL $4
+
+ 0xFF16FFC: 382100A0 addi r1,r1,160
+ 109: GETL R1, t86
+ 110: ADDL $0xA0, t86
+ 111: PUTL t86, R1
+ 112: INCEIPL $4
+
+ 0xFF17000: 4E800020 blr
+ 113: GETL LR, t88
+ 114: JMPo-r t88 ($4)
+
+
+
+. 2165 FF16FA0 100
+. 80 01 00 A4 7C A3 2B 78 81 41 00 54 81 C1 00 58 7C 08 03 A6 81 E1 00 5C 7D 40 81 20 82 01 00 60 82 21 00 64 82 41 00 68 82 61 00 6C 82 81 00 70 82 A1 00 74 82 C1 00 78 82 E1 00 7C 83 01 00 80 83 21 00 84 83 41 00 88 83 61 00 8C 83 81 00 90 83 A1 00 94 83 C1 00 98 83 E1 00 9C 38 21 00 A0 4E 80 00 20
+==== BB 2166 (0xFF17F4C) approx BBs exec'd 0 ====
+
+ 0xFF17F4C: 809D0000 lwz r4,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFF17F50: 80010024 lwz r0,36(r1)
+ 4: GETL R1, t4
+ 5: ADDL $0x24, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0xFF17F54: 811D0008 lwz r8,8(r29)
+ 9: GETL R29, t8
+ 10: ADDL $0x8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R8
+ 13: INCEIPL $4
+
+ 0xFF17F58: 815D000C lwz r10,12(r29)
+ 14: GETL R29, t12
+ 15: ADDL $0xC, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R10
+ 18: INCEIPL $4
+
+ 0xFF17F5C: 7C0803A6 mtlr r0
+ 19: GETL R0, t16
+ 20: PUTL t16, LR
+ 21: INCEIPL $4
+
+ 0xFF17F60: 813E1B34 lwz r9,6964(r30)
+ 22: GETL R30, t18
+ 23: ADDL $0x1B34, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R9
+ 26: INCEIPL $4
+
+ 0xFF17F64: 817E1D28 lwz r11,7464(r30)
+ 27: GETL R30, t22
+ 28: ADDL $0x1D28, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R11
+ 31: INCEIPL $4
+
+ 0xFF17F68: 909C0000 stw r4,0(r28)
+ 32: GETL R4, t26
+ 33: GETL R28, t28
+ 34: STL t26, (t28)
+ 35: INCEIPL $4
+
+ 0xFF17F6C: 83A10014 lwz r29,20(r1)
+ 36: GETL R1, t30
+ 37: ADDL $0x14, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R29
+ 40: INCEIPL $4
+
+ 0xFF17F70: 83810010 lwz r28,16(r1)
+ 41: GETL R1, t34
+ 42: ADDL $0x10, t34
+ 43: LDL (t34), t36
+ 44: PUTL t36, R28
+ 45: INCEIPL $4
+
+ 0xFF17F74: 83C10018 lwz r30,24(r1)
+ 46: GETL R1, t38
+ 47: ADDL $0x18, t38
+ 48: LDL (t38), t40
+ 49: PUTL t40, R30
+ 50: INCEIPL $4
+
+ 0xFF17F78: 38210020 addi r1,r1,32
+ 51: GETL R1, t42
+ 52: ADDL $0x20, t42
+ 53: PUTL t42, R1
+ 54: INCEIPL $4
+
+ 0xFF17F7C: 91490000 stw r10,0(r9)
+ 55: GETL R10, t44
+ 56: GETL R9, t46
+ 57: STL t44, (t46)
+ 58: INCEIPL $4
+
+ 0xFF17F80: 910B0000 stw r8,0(r11)
+ 59: GETL R8, t48
+ 60: GETL R11, t50
+ 61: STL t48, (t50)
+ 62: INCEIPL $4
+
+ 0xFF17F84: 4E800020 blr
+ 63: GETL LR, t52
+ 64: JMPo-r t52 ($4)
+
+
+
+. 2166 FF17F4C 60
+. 80 9D 00 00 80 01 00 24 81 1D 00 08 81 5D 00 0C 7C 08 03 A6 81 3E 1B 34 81 7E 1D 28 90 9C 00 00 83 A1 00 14 83 81 00 10 83 C1 00 18 38 21 00 20 91 49 00 00 91 0B 00 00 4E 80 00 20
+==== BB 2167 (0xFF17FC8) approx BBs exec'd 0 ====
+
+ 0xFF17FC8: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFF17FCC: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFF17FD0: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFF17FD4: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 2167 FF17FC8 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 2168 (0x10001658) approx BBs exec'd 0 ====
+
+ 0x10001658: 2F83FFFF cmpi cr7,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x1000165C: 419E004C bc 12,30,0x100016A8
+ 5: Js30o $0x100016A8
+
+
+
+. 2168 10001658 8
+. 2F 83 FF FF 41 9E 00 4C
+==== BB 2169 (0x100016A8) approx BBs exec'd 0 ====
+
+ 0x100016A8: 3135FFFF addic r9,r21,-1
+ 0: GETL R21, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x100016AC: 7C09A910 subfe r0,r9,r21
+ 4: GETL R9, t2
+ 5: GETL R21, t4
+ 6: SBBL t2, t4 (-rCa-wCa)
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x100016B0: 837E0208 lwz r27,520(r30)
+ 9: GETL R30, t6
+ 10: ADDL $0x208, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0x100016B4: 3173FFFF addic r11,r19,-1
+ 14: GETL R19, t10
+ 15: ADCL $0xFFFFFFFF, t10 (-wCa)
+ 16: PUTL t10, R11
+ 17: INCEIPL $4
+
+ 0x100016B8: 7C000194 addze r0,r0
+ 18: GETL R0, t12
+ 19: ADCL $0x0, t12 (-rCa-wCa)
+ 20: PUTL t12, R0
+ 21: INCEIPL $4
+
+ 0x100016BC: 3134FFFF addic r9,r20,-1
+ 22: GETL R20, t14
+ 23: ADCL $0xFFFFFFFF, t14 (-wCa)
+ 24: PUTL t14, R9
+ 25: INCEIPL $4
+
+ 0x100016C0: 7F800194 addze r28,r0
+ 26: GETL R0, t16
+ 27: ADCL $0x0, t16 (-rCa-wCa)
+ 28: PUTL t16, R28
+ 29: INCEIPL $4
+
+ 0x100016C4: 801B0000 lwz r0,0(r27)
+ 30: GETL R27, t18
+ 31: LDL (t18), t20
+ 32: PUTL t20, R0
+ 33: INCEIPL $4
+
+ 0x100016C8: 2F9C0001 cmpi cr7,r28,1
+ 34: GETL R28, t22
+ 35: MOVL $0x1, t26
+ 36: CMPL t22, t26, t24 (-rSo)
+ 37: ICRFL t24, $0x7, CR
+ 38: INCEIPL $4
+
+ 0x100016CC: 7FA0E850 subf r29,r0,r29
+ 39: GETL R0, t28
+ 40: GETL R29, t30
+ 41: SUBL t28, t30
+ 42: PUTL t30, R29
+ 43: INCEIPL $4
+
+ 0x100016D0: 419D03E8 bc 12,29,0x10001AB8
+ 44: Js29o $0x10001AB8
+
+
+
+. 2169 100016A8 44
+. 31 35 FF FF 7C 09 A9 10 83 7E 02 08 31 73 FF FF 7C 00 01 94 31 34 FF FF 7F 80 01 94 80 1B 00 00 2F 9C 00 01 7F A0 E8 50 41 9D 03 E8
+==== BB 2170 (0x100016D4) approx BBs exec'd 0 ====
+
+ 0x100016D4: 313CFFFF addic r9,r28,-1
+ 0: GETL R28, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x100016D8: 7C09E110 subfe r0,r9,r28
+ 4: GETL R9, t2
+ 5: GETL R28, t4
+ 6: SBBL t2, t4 (-rCa-wCa)
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x100016DC: 7ECB0039 and. r11,r22,r0
+ 9: GETL R22, t6
+ 10: GETL R0, t8
+ 11: ANDL t6, t8
+ 12: PUTL t8, R11
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x100016E0: 408203AC bc 4,2,0x10001A8C
+ 16: Jc02o $0x10001A8C
+
+
+
+. 2170 100016D4 16
+. 31 3C FF FF 7C 09 E1 10 7E CB 00 39 40 82 03 AC
+==== BB 2171 (0x100016E4) approx BBs exec'd 0 ====
+
+ 0x100016E4: 2E1D0001 cmpi cr4,r29,1
+ 0: GETL R29, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x100016E8: 41910354 bc 12,17,0x10001A3C
+ 5: Js17o $0x10001A3C
+
+
+
+. 2171 100016E4 8
+. 2E 1D 00 01 41 91 03 54
+==== BB 2172 (0x100016EC) approx BBs exec'd 0 ====
+
+ 0x100016EC: 7EDCE378 or r28,r22,r28
+ 0: GETL R22, t0
+ 1: GETL R28, t2
+ 2: ORL t2, t0
+ 3: PUTL t0, R28
+ 4: INCEIPL $4
+
+ 0x100016F0: 7C000026 mfcr r0
+ 5: GETL CR, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x100016F4: 54009FFE rlwinm r0,r0,19,31,31
+ 8: GETL R0, t6
+ 9: ROLL $0x13, t6
+ 10: ANDL $0x1, t6
+ 11: PUTL t6, R0
+ 12: INCEIPL $4
+
+ 0x100016F8: 317CFFFF addic r11,r28,-1
+ 13: GETL R28, t8
+ 14: ADCL $0xFFFFFFFF, t8 (-wCa)
+ 15: PUTL t8, R11
+ 16: INCEIPL $4
+
+ 0x100016FC: 7D2BE110 subfe r9,r11,r28
+ 17: GETL R11, t10
+ 18: GETL R28, t12
+ 19: SBBL t10, t12 (-rCa-wCa)
+ 20: PUTL t12, R9
+ 21: INCEIPL $4
+
+ 0x10001700: 7D2B0039 and. r11,r9,r0
+ 22: GETL R9, t14
+ 23: GETL R0, t16
+ 24: ANDL t14, t16
+ 25: PUTL t16, R11
+ 26: CMP0L t16, t18 (-rSo)
+ 27: ICRFL t18, $0x0, CR
+ 28: INCEIPL $4
+
+ 0x10001704: 41820054 bc 12,2,0x10001758
+ 29: Js02o $0x10001758
+
+
+
+. 2172 100016EC 28
+. 7E DC E3 78 7C 00 00 26 54 00 9F FE 31 7C FF FF 7D 2B E1 10 7D 2B 00 39 41 82 00 54
+==== BB 2173 (0x10001758) approx BBs exec'd 0 ====
+
+ 0x10001758: 813E000C lwz r9,12(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x1000175C: 2D960000 cmpi cr3,r22,0
+ 5: GETL R22, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x3, CR
+ 8: INCEIPL $4
+
+ 0x10001760: 80090000 lwz r0,0(r9)
+ 9: GETL R9, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R0
+ 12: INCEIPL $4
+
+ 0x10001764: 3120FFFF addic r9,r0,-1
+ 13: GETL R0, t12
+ 14: ADCL $0xFFFFFFFF, t12 (-wCa)
+ 15: PUTL t12, R9
+ 16: INCEIPL $4
+
+ 0x10001768: 7D690110 subfe r11,r9,r0
+ 17: GETL R9, t14
+ 18: GETL R0, t16
+ 19: SBBL t14, t16 (-rCa-wCa)
+ 20: PUTL t16, R11
+ 21: INCEIPL $4
+
+ 0x1000176C: 7D60B079 andc. r0,r11,r22
+ 22: GETL R11, t18
+ 23: GETL R22, t20
+ 24: NOTL t20
+ 25: ANDL t18, t20
+ 26: PUTL t20, R0
+ 27: CMP0L t20, t22 (-rSo)
+ 28: ICRFL t22, $0x0, CR
+ 29: INCEIPL $4
+
+ 0x10001770: 41820034 bc 12,2,0x100017A4
+ 30: Js02o $0x100017A4
+
+
+
+. 2173 10001758 28
+. 81 3E 00 0C 2D 96 00 00 80 09 00 00 31 20 FF FF 7D 69 01 10 7D 60 B0 79 41 82 00 34
+==== BB 2174 (0x100017A4) approx BBs exec'd 0 ====
+
+ 0x100017A4: 418E0008 bc 12,14,0x100017AC
+ 0: Js14o $0x100017AC
+
+
+
+. 2174 100017A4 4
+. 41 8E 00 08
+==== BB 2175 (0x100017AC) approx BBs exec'd 0 ====
+
+ 0x100017AC: 2F950000 cmpi cr7,r21,0
+ 0: GETL R21, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x100017B0: 419E036C bc 12,30,0x10001B1C
+ 4: Js30o $0x10001B1C
+
+
+
+. 2175 100017AC 8
+. 2F 95 00 00 41 9E 03 6C
+==== BB 2176 (0x10001B1C) approx BBs exec'd 0 ====
+
+ 0x10001B1C: 2F9C0000 cmpi cr7,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10001B20: 3BA00001 li r29,1
+ 4: MOVL $0x1, t4
+ 5: PUTL t4, R29
+ 6: INCEIPL $4
+
+ 0x10001B24: 3B800000 li r28,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x10001B28: 409E0078 bc 4,30,0x10001BA0
+ 10: Jc30o $0x10001BA0
+
+
+
+. 2176 10001B1C 16
+. 2F 9C 00 00 3B A0 00 01 3B 80 00 00 40 9E 00 78
+==== BB 2177 (0x10001B2C) approx BBs exec'd 0 ====
+
+ 0x10001B2C: 4092015C bc 4,18,0x10001C88
+ 0: Jc18o $0x10001C88
+
+
+
+. 2177 10001B2C 4
+. 40 92 01 5C
+==== BB 2178 (0x10001C88) approx BBs exec'd 0 ====
+
+ 0x10001C88: 809E00D8 lwz r4,216(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xD8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x10001C8C: 38A00005 li r5,5
+ 5: MOVL $0x5, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x10001C90: 38600000 li r3,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x10001C94: 48018F01 bl 0x1001AB94
+ 11: MOVL $0x10001C98, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x1001AB94 ($4)
+
+
+
+. 2178 10001C88 16
+. 80 9E 00 D8 38 A0 00 05 38 60 00 00 48 01 8F 01
+==== BB 2179 (0x1001AB94) approx BBs exec'd 0 ====
+
+ 0x1001AB94: 39600030 li r11,48
+ 0: MOVL $0x30, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AB98: 4BFFFF74 b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 2179 1001AB94 8
+. 39 60 00 30 4B FF FF 74
+==== BB 2180 __dcgettext_internal(0xFE8A480) approx BBs exec'd 0 ====
+
+ 0xFE8A480: 7CC802A6 mflr r6
+ 0: GETL LR, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0xFE8A484: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFE8A488: 7CA82B78 or r8,r5,r5
+ 9: GETL R5, t6
+ 10: PUTL t6, R8
+ 11: INCEIPL $4
+
+ 0xFE8A48C: 38E00000 li r7,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R7
+ 14: INCEIPL $4
+
+ 0xFE8A490: 38A00000 li r5,0
+ 15: MOVL $0x0, t10
+ 16: PUTL t10, R5
+ 17: INCEIPL $4
+
+ 0xFE8A494: 90C10014 stw r6,20(r1)
+ 18: GETL R6, t12
+ 19: GETL R1, t14
+ 20: ADDL $0x14, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0xFE8A498: 38C00000 li r6,0
+ 23: MOVL $0x0, t16
+ 24: PUTL t16, R6
+ 25: INCEIPL $4
+
+ 0xFE8A49C: 480009E1 bl 0xFE8AE7C
+ 26: MOVL $0xFE8A4A0, t18
+ 27: PUTL t18, LR
+ 28: JMPo-c $0xFE8AE7C ($4)
+
+
+
+. 2180 FE8A480 32
+. 7C C8 02 A6 94 21 FF F0 7C A8 2B 78 38 E0 00 00 38 A0 00 00 90 C1 00 14 38 C0 00 00 48 00 09 E1
+==== BB 2181 __dcigettext(0xFE8AE7C) approx BBs exec'd 0 ====
+
+ 0xFE8AE7C: 9421FF90 stwu r1,-112(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF90, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE8AE80: 7D800026 mfcr r12
+ 6: GETL CR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFE8AE84: 92C10048 stw r22,72(r1)
+ 9: GETL R22, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x48, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFE8AE88: 7C962379 or. r22,r4,r4
+ 14: GETL R4, t10
+ 15: PUTL t10, R22
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFE8AE8C: 7C0802A6 mflr r0
+ 19: GETL LR, t14
+ 20: PUTL t14, R0
+ 21: INCEIPL $4
+
+ 0xFE8AE90: 93E1006C stw r31,108(r1)
+ 22: GETL R31, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x6C, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0xFE8AE94: 4811CFBD bl 0xFFA7E50
+ 27: MOVL $0xFE8AE98, t20
+ 28: PUTL t20, LR
+ 29: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2181 FE8AE7C 28
+. 94 21 FF 90 7D 80 00 26 92 C1 00 48 7C 96 23 79 7C 08 02 A6 93 E1 00 6C 48 11 CF BD
+==== BB 2182 (0xFE8AE98) approx BBs exec'd 0 ====
+
+ 0xFE8AE98: 7C3F0B78 or r31,r1,r1
+ 0: GETL R1, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0xFE8AE9C: 91C10028 stw r14,40(r1)
+ 3: GETL R14, t2
+ 4: GETL R1, t4
+ 5: ADDL $0x28, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFE8AEA0: 7CAE2B78 or r14,r5,r5
+ 8: GETL R5, t6
+ 9: PUTL t6, R14
+ 10: INCEIPL $4
+
+ 0xFE8AEA4: 92410038 stw r18,56(r1)
+ 11: GETL R18, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x38, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFE8AEA8: 7D124378 or r18,r8,r8
+ 16: GETL R8, t12
+ 17: PUTL t12, R18
+ 18: INCEIPL $4
+
+ 0xFE8AEAC: 92A10044 stw r21,68(r1)
+ 19: GETL R21, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x44, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFE8AEB0: 7C751B78 or r21,r3,r3
+ 24: GETL R3, t18
+ 25: PUTL t18, R21
+ 26: INCEIPL $4
+
+ 0xFE8AEB4: 93410058 stw r26,88(r1)
+ 27: GETL R26, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x58, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFE8AEB8: 38600000 li r3,0
+ 32: MOVL $0x0, t24
+ 33: PUTL t24, R3
+ 34: INCEIPL $4
+
+ 0xFE8AEBC: 93C10068 stw r30,104(r1)
+ 35: GETL R30, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x68, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFE8AEC0: 7CDA3378 or r26,r6,r6
+ 40: GETL R6, t30
+ 41: PUTL t30, R26
+ 42: INCEIPL $4
+
+ 0xFE8AEC4: 91E1002C stw r15,44(r1)
+ 43: GETL R15, t32
+ 44: GETL R1, t34
+ 45: ADDL $0x2C, t34
+ 46: STL t32, (t34)
+ 47: INCEIPL $4
+
+ 0xFE8AEC8: 7FC802A6 mflr r30
+ 48: GETL LR, t36
+ 49: PUTL t36, R30
+ 50: INCEIPL $4
+
+ 0xFE8AECC: 92010030 stw r16,48(r1)
+ 51: GETL R16, t38
+ 52: GETL R1, t40
+ 53: ADDL $0x30, t40
+ 54: STL t38, (t40)
+ 55: INCEIPL $4
+
+ 0xFE8AED0: 92210034 stw r17,52(r1)
+ 56: GETL R17, t42
+ 57: GETL R1, t44
+ 58: ADDL $0x34, t44
+ 59: STL t42, (t44)
+ 60: INCEIPL $4
+
+ 0xFE8AED4: 9261003C stw r19,60(r1)
+ 61: GETL R19, t46
+ 62: GETL R1, t48
+ 63: ADDL $0x3C, t48
+ 64: STL t46, (t48)
+ 65: INCEIPL $4
+
+ 0xFE8AED8: 92810040 stw r20,64(r1)
+ 66: GETL R20, t50
+ 67: GETL R1, t52
+ 68: ADDL $0x40, t52
+ 69: STL t50, (t52)
+ 70: INCEIPL $4
+
+ 0xFE8AEDC: 92E1004C stw r23,76(r1)
+ 71: GETL R23, t54
+ 72: GETL R1, t56
+ 73: ADDL $0x4C, t56
+ 74: STL t54, (t56)
+ 75: INCEIPL $4
+
+ 0xFE8AEE0: 93010050 stw r24,80(r1)
+ 76: GETL R24, t58
+ 77: GETL R1, t60
+ 78: ADDL $0x50, t60
+ 79: STL t58, (t60)
+ 80: INCEIPL $4
+
+ 0xFE8AEE4: 93210054 stw r25,84(r1)
+ 81: GETL R25, t62
+ 82: GETL R1, t64
+ 83: ADDL $0x54, t64
+ 84: STL t62, (t64)
+ 85: INCEIPL $4
+
+ 0xFE8AEE8: 9361005C stw r27,92(r1)
+ 86: GETL R27, t66
+ 87: GETL R1, t68
+ 88: ADDL $0x5C, t68
+ 89: STL t66, (t68)
+ 90: INCEIPL $4
+
+ 0xFE8AEEC: 93810060 stw r28,96(r1)
+ 91: GETL R28, t70
+ 92: GETL R1, t72
+ 93: ADDL $0x60, t72
+ 94: STL t70, (t72)
+ 95: INCEIPL $4
+
+ 0xFE8AEF0: 93A10064 stw r29,100(r1)
+ 96: GETL R29, t74
+ 97: GETL R1, t76
+ 98: ADDL $0x64, t76
+ 99: STL t74, (t76)
+ 100: INCEIPL $4
+
+ 0xFE8AEF4: 90010074 stw r0,116(r1)
+ 101: GETL R0, t78
+ 102: GETL R1, t80
+ 103: ADDL $0x74, t80
+ 104: STL t78, (t80)
+ 105: INCEIPL $4
+
+ 0xFE8AEF8: 91810024 stw r12,36(r1)
+ 106: GETL R12, t82
+ 107: GETL R1, t84
+ 108: ADDL $0x24, t84
+ 109: STL t82, (t84)
+ 110: INCEIPL $4
+
+ 0xFE8AEFC: 90FF000C stw r7,12(r31)
+ 111: GETL R7, t86
+ 112: GETL R31, t88
+ 113: ADDL $0xC, t88
+ 114: STL t86, (t88)
+ 115: INCEIPL $4
+
+ 0xFE8AF00: 4182034C bc 12,2,0xFE8B24C
+ 116: Js02o $0xFE8B24C
+
+
+
+. 2182 FE8AE98 108
+. 7C 3F 0B 78 91 C1 00 28 7C AE 2B 78 92 41 00 38 7D 12 43 78 92 A1 00 44 7C 75 1B 78 93 41 00 58 38 60 00 00 93 C1 00 68 7C DA 33 78 91 E1 00 2C 7F C8 02 A6 92 01 00 30 92 21 00 34 92 61 00 3C 92 81 00 40 92 E1 00 4C 93 01 00 50 93 21 00 54 93 61 00 5C 93 81 00 60 93 A1 00 64 90 01 00 74 91 81 00 24 90 FF 00 0C 41 82 03 4C
+==== BB 2183 (0xFE8AF04) approx BBs exec'd 0 ====
+
+ 0xFE8AF04: 69030006 xori r3,r8,0x6
+ 0: GETL R8, t0
+ 1: XORL $0x6, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFE8AF08: 21230000 subfic r9,r3,0
+ 4: GETL R3, t2
+ 5: MOVL $0x0, t4
+ 6: SBBL t2, t4 (-wCa)
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0xFE8AF0C: 7C691914 adde r3,r9,r3
+ 9: GETL R9, t6
+ 10: GETL R3, t8
+ 11: ADCL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0xFE8AF10: 2128000C subfic r9,r8,12
+ 14: GETL R8, t10
+ 15: MOVL $0xC, t12
+ 16: SBBL t10, t12 (-wCa)
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0xFE8AF14: 7D294910 subfe r9,r9,r9
+ 19: GETL R9, t14
+ 20: GETL R9, t16
+ 21: SBBL t14, t16 (-rCa-wCa)
+ 22: PUTL t16, R9
+ 23: INCEIPL $4
+
+ 0xFE8AF18: 7D2900D0 neg r9,r9
+ 24: GETL R9, t18
+ 25: NEGL t18
+ 26: PUTL t18, R9
+ 27: INCEIPL $4
+
+ 0xFE8AF1C: 7D2B1B79 or. r11,r9,r3
+ 28: GETL R9, t20
+ 29: GETL R3, t22
+ 30: ORL t22, t20
+ 31: PUTL t20, R11
+ 32: CMP0L t20, t24 (-rSo)
+ 33: ICRFL t24, $0x0, CR
+ 34: INCEIPL $4
+
+ 0xFE8AF20: 40820314 bc 4,2,0xFE8B234
+ 35: Jc02o $0xFE8B234
+
+
+
+. 2183 FE8AF04 32
+. 69 03 00 06 21 23 00 00 7C 69 19 14 21 28 00 0C 7D 29 49 10 7D 29 00 D0 7D 2B 1B 79 40 82 03 14
+==== BB 2184 (0xFE8AF24) approx BBs exec'd 0 ====
+
+ 0xFE8AF24: 81FE1B48 lwz r15,6984(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1B48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R15
+ 4: INCEIPL $4
+
+ 0xFE8AF28: 800F00A0 lwz r0,160(r15)
+ 5: GETL R15, t4
+ 6: ADDL $0xA0, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFE8AF2C: 2C800000 cmpi cr1,r0,0
+ 10: GETL R0, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0xFE8AF30: 408603FC bc 4,6,0xFE8B32C
+ 14: Jc06o $0xFE8B32C
+
+
+
+. 2184 FE8AF24 16
+. 81 FE 1B 48 80 0F 00 A0 2C 80 00 00 40 86 03 FC
+==== BB 2185 (0xFE8AF34) approx BBs exec'd 0 ====
+
+ 0xFE8AF34: 2D950000 cmpi cr3,r21,0
+ 0: GETL R21, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x3, CR
+ 3: INCEIPL $4
+
+ 0xFE8AF38: 418E0424 bc 12,14,0xFE8B35C
+ 4: Js14o $0xFE8B35C
+
+
+
+. 2185 FE8AF34 8
+. 2D 95 00 00 41 8E 04 24
+==== BB 2186 (0xFE8B35C) approx BBs exec'd 0 ====
+
+ 0xFE8B35C: 809E1B14 lwz r4,6932(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1B14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE8B360: 82A40000 lwz r21,0(r4)
+ 5: GETL R4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R21
+ 8: INCEIPL $4
+
+ 0xFE8B364: 4BFFFBD8 b 0xFE8AF3C
+ 9: JMPo $0xFE8AF3C ($4)
+
+
+
+. 2186 FE8B35C 12
+. 80 9E 1B 14 82 A4 00 00 4B FF FB D8
+==== BB 2187 (0xFE8AF3C) approx BBs exec'd 0 ====
+
+ 0xFE8AF3C: 7EC3B378 or r3,r22,r22
+ 0: GETL R22, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8AF40: 4804BB99 bl 0xFED6AD8
+ 3: MOVL $0xFE8AF44, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2187 FE8AF3C 8
+. 7E C3 B3 78 48 04 BB 99
+==== BB 2188 (0xFE8AF44) approx BBs exec'd 0 ====
+
+ 0xFE8AF44: 81610000 lwz r11,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFE8AF48: 39430037 addi r10,r3,55
+ 4: GETL R3, t4
+ 5: ADDL $0x37, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0xFE8AF4C: 38A30001 addi r5,r3,1
+ 8: GETL R3, t6
+ 9: ADDL $0x1, t6
+ 10: PUTL t6, R5
+ 11: INCEIPL $4
+
+ 0xFE8AF50: 55480036 rlwinm r8,r10,0,0,27
+ 12: GETL R10, t8
+ 13: ANDL $0xFFFFFFF0, t8
+ 14: PUTL t8, R8
+ 15: INCEIPL $4
+
+ 0xFE8AF54: 90BF0014 stw r5,20(r31)
+ 16: GETL R5, t10
+ 17: GETL R31, t12
+ 18: ADDL $0x14, t12
+ 19: STL t10, (t12)
+ 20: INCEIPL $4
+
+ 0xFE8AF58: 7CE800D0 neg r7,r8
+ 21: GETL R8, t14
+ 22: NEGL t14
+ 23: PUTL t14, R7
+ 24: INCEIPL $4
+
+ 0xFE8AF5C: 80BF0014 lwz r5,20(r31)
+ 25: GETL R31, t16
+ 26: ADDL $0x14, t16
+ 27: LDL (t16), t18
+ 28: PUTL t18, R5
+ 29: INCEIPL $4
+
+ 0xFE8AF60: 7D61396E stwux r11,r1,r7
+ 30: GETL R7, t20
+ 31: GETL R1, t22
+ 32: ADDL t22, t20
+ 33: PUTL t20, R1
+ 34: GETL R11, t24
+ 35: STL t24, (t20)
+ 36: INCEIPL $4
+
+ 0xFE8AF64: 7EC4B378 or r4,r22,r22
+ 37: GETL R22, t26
+ 38: PUTL t26, R4
+ 39: INCEIPL $4
+
+ 0xFE8AF68: 38C10017 addi r6,r1,23
+ 40: GETL R1, t28
+ 41: ADDL $0x17, t28
+ 42: PUTL t28, R6
+ 43: INCEIPL $4
+
+ 0xFE8AF6C: 54DD0036 rlwinm r29,r6,0,0,27
+ 44: GETL R6, t30
+ 45: ANDL $0xFFFFFFF0, t30
+ 46: PUTL t30, R29
+ 47: INCEIPL $4
+
+ 0xFE8AF70: 387D0018 addi r3,r29,24
+ 48: GETL R29, t32
+ 49: ADDL $0x18, t32
+ 50: PUTL t32, R3
+ 51: INCEIPL $4
+
+ 0xFE8AF74: 4804D765 bl 0xFED86D8
+ 52: MOVL $0xFE8AF78, t34
+ 53: PUTL t34, LR
+ 54: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 2188 FE8AF44 52
+. 81 61 00 00 39 43 00 37 38 A3 00 01 55 48 00 36 90 BF 00 14 7C E8 00 D0 80 BF 00 14 7D 61 39 6E 7E C4 B3 78 38 C1 00 17 54 DD 00 36 38 7D 00 18 48 04 D7 65
+==== BB 2189 (0xFE8AF78) approx BBs exec'd 0 ====
+
+ 0xFE8AF78: 800F00A0 lwz r0,160(r15)
+ 0: GETL R15, t0
+ 1: ADDL $0xA0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE8AF7C: 92BD0000 stw r21,0(r29)
+ 5: GETL R21, t4
+ 6: GETL R29, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFE8AF80: 2E000000 cmpi cr4,r0,0
+ 9: GETL R0, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x4, CR
+ 12: INCEIPL $4
+
+ 0xFE8AF84: 925D0004 stw r18,4(r29)
+ 13: GETL R18, t12
+ 14: GETL R29, t14
+ 15: ADDL $0x4, t14
+ 16: STL t12, (t14)
+ 17: INCEIPL $4
+
+ 0xFE8AF88: 40920394 bc 4,18,0xFE8B31C
+ 18: Jc18o $0xFE8B31C
+
+
+
+. 2189 FE8AF78 20
+. 80 0F 00 A0 92 BD 00 00 2E 00 00 00 92 5D 00 04 40 92 03 94
+==== BB 2190 (0xFE8AF8C) approx BBs exec'd 0 ====
+
+ 0xFE8AF8C: 809E018C lwz r4,396(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x18C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE8AF90: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE8AF94: 80BE0174 lwz r5,372(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x174, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0xFE8AF98: 480A4831 bl 0xFF2F7C8
+ 13: MOVL $0xFE8AF9C, t10
+ 14: PUTL t10, LR
+ 15: JMPo-c $0xFF2F7C8 ($4)
+
+
+
+. 2190 FE8AF8C 16
+. 80 9E 01 8C 7F A3 EB 78 80 BE 01 74 48 0A 48 31
+==== BB 2191 tfind(0xFF2F7C8) approx BBs exec'd 0 ====
+
+ 0xFF2F7C8: 2C040000 cmpi cr0,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFF2F7CC: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFF2F7D0: 9421FFE0 stwu r1,-32(r1)
+ 7: GETL R1, t6
+ 8: GETL R1, t8
+ 9: ADDL $0xFFFFFFE0, t8
+ 10: PUTL t8, R1
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFF2F7D4: 93810010 stw r28,16(r1)
+ 13: GETL R28, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x10, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFF2F7D8: 7C7C1B78 or r28,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0xFF2F7DC: 93A10014 stw r29,20(r1)
+ 21: GETL R29, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFF2F7E0: 38600000 li r3,0
+ 26: MOVL $0x0, t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0xFF2F7E4: 93C10018 stw r30,24(r1)
+ 29: GETL R30, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x18, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFF2F7E8: 7CBD2B78 or r29,r5,r5
+ 34: GETL R5, t26
+ 35: PUTL t26, R29
+ 36: INCEIPL $4
+
+ 0xFF2F7EC: 93E1001C stw r31,28(r1)
+ 37: GETL R31, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x1C, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFF2F7F0: 90010024 stw r0,36(r1)
+ 42: GETL R0, t32
+ 43: GETL R1, t34
+ 44: ADDL $0x24, t34
+ 45: STL t32, (t34)
+ 46: INCEIPL $4
+
+ 0xFF2F7F4: 41820048 bc 12,2,0xFF2F83C
+ 47: Js02o $0xFF2F83C
+
+
+
+. 2191 FF2F7C8 48
+. 2C 04 00 00 7C 08 02 A6 94 21 FF E0 93 81 00 10 7C 7C 1B 78 93 A1 00 14 38 60 00 00 93 C1 00 18 7C BD 2B 78 93 E1 00 1C 90 01 00 24 41 82 00 48
+==== BB 2192 (0xFF2F7F8) approx BBs exec'd 0 ====
+
+ 0xFF2F7F8: 80640000 lwz r3,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFF2F7FC: 2F830000 cmpi cr7,r3,0
+ 4: GETL R3, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFF2F800: 419E0038 bc 12,30,0xFF2F838
+ 8: Js30o $0xFF2F838
+
+
+
+. 2192 FF2F7F8 12
+. 80 64 00 00 2F 83 00 00 41 9E 00 38
+==== BB 2193 (0xFF2F838) approx BBs exec'd 0 ====
+
+ 0xFF2F838: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFF2F83C: 80810024 lwz r4,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFF2F840: 83810010 lwz r28,16(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0xFF2F844: 83A10014 lwz r29,20(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x14, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0xFF2F848: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFF2F84C: 83C10018 lwz r30,24(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x18, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R30
+ 25: INCEIPL $4
+
+ 0xFF2F850: 83E1001C lwz r31,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0xFF2F854: 38210020 addi r1,r1,32
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0xFF2F858: 4E800020 blr
+ 35: GETL LR, t26
+ 36: JMPo-r t26 ($4)
+
+
+
+. 2193 FF2F838 36
+. 38 60 00 00 80 81 00 24 83 81 00 10 83 A1 00 14 7C 88 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2194 (0xFE8AF9C) approx BBs exec'd 0 ====
+
+ 0xFE8AF9C: 800F00A8 lwz r0,168(r15)
+ 0: GETL R15, t0
+ 1: ADDL $0xA8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE8AFA0: 7C701B78 or r16,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R16
+ 7: INCEIPL $4
+
+ 0xFE8AFA4: 2F000000 cmpi cr6,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFE8AFA8: 409A0364 bc 4,26,0xFE8B30C
+ 12: Jc26o $0xFE8B30C
+
+
+
+. 2194 FE8AF9C 16
+. 80 0F 00 A8 7C 70 1B 78 2F 00 00 00 40 9A 03 64
+==== BB 2195 (0xFE8AFAC) approx BBs exec'd 0 ====
+
+ 0xFE8AFAC: 2D900000 cmpi cr3,r16,0
+ 0: GETL R16, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x3, CR
+ 3: INCEIPL $4
+
+ 0xFE8AFB0: 418E001C bc 12,14,0xFE8AFCC
+ 4: Js14o $0xFE8AFCC
+
+
+
+. 2195 FE8AFAC 8
+. 2D 90 00 00 41 8E 00 1C
+==== BB 2196 (0xFE8AFCC) approx BBs exec'd 0 ====
+
+ 0xFE8AFCC: 839E1AC8 lwz r28,6856(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1AC8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFE8AFD0: 831E1C4C lwz r24,7244(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1C4C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R24
+ 9: INCEIPL $4
+
+ 0xFE8AFD4: 7F781214 add r27,r24,r2
+ 10: GETL R24, t8
+ 11: GETL R2, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R27
+ 14: INCEIPL $4
+
+ 0xFE8AFD8: 82FC0000 lwz r23,0(r28)
+ 15: GETL R28, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R23
+ 18: INCEIPL $4
+
+ 0xFE8AFDC: 833B0000 lwz r25,0(r27)
+ 19: GETL R27, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R25
+ 22: INCEIPL $4
+
+ 0xFE8AFE0: 2E170000 cmpi cr4,r23,0
+ 23: GETL R23, t20
+ 24: CMP0L t20, t22 (-rSo)
+ 25: ICRFL t22, $0x4, CR
+ 26: INCEIPL $4
+
+ 0xFE8AFE4: 933F0010 stw r25,16(r31)
+ 27: GETL R25, t24
+ 28: GETL R31, t26
+ 29: ADDL $0x10, t26
+ 30: STL t24, (t26)
+ 31: INCEIPL $4
+
+ 0xFE8AFE8: 41920028 bc 12,18,0xFE8B010
+ 32: Js18o $0xFE8B010
+
+
+
+. 2196 FE8AFCC 32
+. 83 9E 1A C8 83 1E 1C 4C 7F 78 12 14 82 FC 00 00 83 3B 00 00 2E 17 00 00 93 3F 00 10 41 92 00 28
+==== BB 2197 (0xFE8AFEC) approx BBs exec'd 0 ====
+
+ 0xFE8AFEC: 38970010 addi r4,r23,16
+ 0: GETL R23, t0
+ 1: ADDL $0x10, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0xFE8AFF0: 7EA3AB78 or r3,r21,r21
+ 4: GETL R21, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0xFE8AFF4: 4804B3BD bl 0xFED63B0
+ 7: MOVL $0xFE8AFF8, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2197 FE8AFEC 12
+. 38 97 00 10 7E A3 AB 78 48 04 B3 BD
+==== BB 2198 (0xFE8AFF8) approx BBs exec'd 0 ====
+
+ 0xFE8AFF8: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE8AFFC: 419E036C bc 12,30,0xFE8B368
+ 4: Js30o $0xFE8B368
+
+
+
+. 2198 FE8AFF8 8
+. 2F 83 00 00 41 9E 03 6C
+==== BB 2199 (0xFE8B368) approx BBs exec'd 0 ====
+
+ 0xFE8B368: 41B2FCA8 bc 13,18,0xFE8B010
+ 0: Js18o $0xFE8B010
+
+
+
+. 2199 FE8B368 4
+. 41 B2 FC A8
+==== BB 2200 (0xFE8B36C) approx BBs exec'd 0 ====
+
+ 0xFE8B36C: 80770004 lwz r3,4(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE8B370: 89830000 lbz r12,0(r3)
+ 5: GETL R3, t4
+ 6: LDB (t4), t6
+ 7: PUTL t6, R12
+ 8: INCEIPL $4
+
+ 0xFE8B374: 7C731B78 or r19,r3,r3
+ 9: GETL R3, t8
+ 10: PUTL t8, R19
+ 11: INCEIPL $4
+
+ 0xFE8B378: 2F0C002F cmpi cr6,r12,47
+ 12: GETL R12, t10
+ 13: MOVL $0x2F, t14
+ 14: CMPL t10, t14, t12 (-rSo)
+ 15: ICRFL t12, $0x6, CR
+ 16: INCEIPL $4
+
+ 0xFE8B37C: 41BAFC98 bc 13,26,0xFE8B014
+ 17: Js26o $0xFE8B014
+
+
+
+. 2200 FE8B36C 20
+. 80 77 00 04 89 83 00 00 7C 73 1B 78 2F 0C 00 2F 41 BA FC 98
+==== BB 2201 (0xFE8B014) approx BBs exec'd 0 ====
+
+ 0xFE8B014: 807E0194 lwz r3,404(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x194, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE8B018: 5654103A rlwinm r20,r18,2,0,29
+ 5: GETL R18, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R20
+ 8: INCEIPL $4
+
+ 0xFE8B01C: 823E1DC4 lwz r17,7620(r30)
+ 9: GETL R30, t6
+ 10: ADDL $0x1DC4, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R17
+ 13: INCEIPL $4
+
+ 0xFE8B020: 7F94882E lwzx r28,r20,r17
+ 14: GETL R17, t10
+ 15: GETL R20, t12
+ 16: ADDL t12, t10
+ 17: LDL (t10), t14
+ 18: PUTL t14, R28
+ 19: INCEIPL $4
+
+ 0xFE8B024: 48008175 bl 0xFE93198
+ 20: MOVL $0xFE8B028, t16
+ 21: PUTL t16, LR
+ 22: JMPo-c $0xFE93198 ($4)
+
+
+
+. 2201 FE8B014 20
+. 80 7E 01 94 56 54 10 3A 82 3E 1D C4 7F 94 88 2E 48 00 81 75
+==== BB 2202 (0xFED6E98) approx BBs exec'd 0 ====
+
+ 0xFED6E98: 2C860000 cmpi cr1,r6,0
+ 0: GETL R6, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFED6E9C: 7C063800 cmp cr0,r6,r7
+ 4: GETL R6, t4
+ 5: GETL R7, t6
+ 6: CMPL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFED6EA0: 40820010 bc 4,2,0xFED6EB0
+ 9: Jc02o $0xFED6EB0
+
+
+
+. 2202 FED6E98 12
+. 2C 86 00 00 7C 06 38 00 40 82 00 10
+==== BB 2203 (0xFED6EA4) approx BBs exec'd 0 ====
+
+ 0xFED6EA4: 8CC30001 lbzu r6,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFED6EA8: 4086FFCC bc 4,6,0xFED6E74
+ 6: Jc06o $0xFED6E74
+
+
+
+. 2203 FED6EA4 8
+. 8C C3 00 01 40 86 FF CC
+==== BB 2204 (0xFED6E74) approx BBs exec'd 0 ====
+
+ 0xFED6E74: 8CE40001 lbzu r7,1(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R4
+ 3: LDB (t0), t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0xFED6E78: 42400038 bc 18,0,0xFED6EB0
+ 6: GETL CTR, t4
+ 7: ADDL $0xFFFFFFFF, t4
+ 8: PUTL t4, CTR
+ 9: SETZL t4, NoValue
+ 10: JIFZL t4, $0xFED6E7C
+ 11: JMPo $0xFED6EB0 ($4)
+
+
+
+. 2204 FED6E74 8
+. 8C E4 00 01 42 40 00 38
+==== BB 2205 (0xFE8B028) approx BBs exec'd 0 ====
+
+ 0xFE8B028: 2E030000 cmpi cr4,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFE8B02C: 7C7D1B78 or r29,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R29
+ 6: INCEIPL $4
+
+ 0xFE8B030: 41920018 bc 12,18,0xFE8B048
+ 7: Js18o $0xFE8B048
+
+
+
+. 2205 FE8B028 12
+. 2E 03 00 00 7C 7D 1B 78 41 92 00 18
+==== BB 2206 (0xFE8B048) approx BBs exec'd 0 ====
+
+ 0xFE8B048: 7E439378 or r3,r18,r18
+ 0: GETL R18, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8B04C: 4BFFE2DD bl 0xFE89328
+ 3: MOVL $0xFE8B050, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFE89328 ($4)
+
+
+
+. 2206 FE8B048 8
+. 7E 43 93 78 4B FF E2 DD
+==== BB 2207 __current_locale_name(0xFE89328) approx BBs exec'd 0 ====
+
+ 0xFE89328: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE8932C: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFE89330: 4811EB21 bl 0xFFA7E50
+ 9: MOVL $0xFE89334, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2207 FE89328 12
+. 94 21 FF F0 7D 88 02 A6 48 11 EB 21
+==== BB 2208 (0xFE89334) approx BBs exec'd 0 ====
+
+ 0xFE89334: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE89338: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE8933C: 5464103A rlwinm r4,r3,2,0,29
+ 8: GETL R3, t6
+ 9: SHLL $0x2, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0xFE89340: 7D8803A6 mtlr r12
+ 12: GETL R12, t8
+ 13: PUTL t8, LR
+ 14: INCEIPL $4
+
+ 0xFE89344: 80BE1D50 lwz r5,7504(r30)
+ 15: GETL R30, t10
+ 16: ADDL $0x1D50, t10
+ 17: LDL (t10), t12
+ 18: PUTL t12, R5
+ 19: INCEIPL $4
+
+ 0xFE89348: 83C10008 lwz r30,8(r1)
+ 20: GETL R1, t14
+ 21: ADDL $0x8, t14
+ 22: LDL (t14), t16
+ 23: PUTL t16, R30
+ 24: INCEIPL $4
+
+ 0xFE8934C: 7D251214 add r9,r5,r2
+ 25: GETL R5, t18
+ 26: GETL R2, t20
+ 27: ADDL t18, t20
+ 28: PUTL t20, R9
+ 29: INCEIPL $4
+
+ 0xFE89350: 38210010 addi r1,r1,16
+ 30: GETL R1, t22
+ 31: ADDL $0x10, t22
+ 32: PUTL t22, R1
+ 33: INCEIPL $4
+
+ 0xFE89354: 80090000 lwz r0,0(r9)
+ 34: GETL R9, t24
+ 35: LDL (t24), t26
+ 36: PUTL t26, R0
+ 37: INCEIPL $4
+
+ 0xFE89358: 7C640214 add r3,r4,r0
+ 38: GETL R4, t28
+ 39: GETL R0, t30
+ 40: ADDL t28, t30
+ 41: PUTL t30, R3
+ 42: INCEIPL $4
+
+ 0xFE8935C: 80630040 lwz r3,64(r3)
+ 43: GETL R3, t32
+ 44: ADDL $0x40, t32
+ 45: LDL (t32), t34
+ 46: PUTL t34, R3
+ 47: INCEIPL $4
+
+ 0xFE89360: 4E800020 blr
+ 48: GETL LR, t36
+ 49: JMPo-r t36 ($4)
+
+
+
+. 2208 FE89334 48
+. 93 C1 00 08 7F C8 02 A6 54 64 10 3A 7D 88 03 A6 80 BE 1D 50 83 C1 00 08 7D 25 12 14 38 21 00 10 80 09 00 00 7C 64 02 14 80 63 00 40 4E 80 00 20
+==== BB 2209 (0xFE8B050) approx BBs exec'd 0 ====
+
+ 0xFE8B050: 419202B4 bc 12,18,0xFE8B304
+ 0: Js18o $0xFE8B304
+
+
+
+. 2209 FE8B050 4
+. 41 92 02 B4
+==== BB 2210 (0xFE8B304) approx BBs exec'd 0 ====
+
+ 0xFE8B304: 7C601B78 or r0,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE8B308: 4BFFFD6C b 0xFE8B074
+ 3: JMPo $0xFE8B074 ($4)
+
+
+
+. 2210 FE8B304 8
+. 7C 60 1B 78 4B FF FD 6C
+==== BB 2211 (0xFE8B074) approx BBs exec'd 0 ====
+
+ 0xFE8B074: 7EA3AB78 or r3,r21,r21
+ 0: GETL R21, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8B078: 7C1B0378 or r27,r0,r0
+ 3: GETL R0, t2
+ 4: PUTL t2, R27
+ 5: INCEIPL $4
+
+ 0xFE8B07C: 4804BA5D bl 0xFED6AD8
+ 6: MOVL $0xFE8B080, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2211 FE8B074 12
+. 7E A3 AB 78 7C 1B 03 78 48 04 BA 5D
+==== BB 2212 (0xFE8B080) approx BBs exec'd 0 ====
+
+ 0xFE8B080: 2E1A0000 cmpi cr4,r26,0
+ 0: GETL R26, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFE8B084: 7C711B78 or r17,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R17
+ 6: INCEIPL $4
+
+ 0xFE8B088: 7F83E378 or r3,r28,r28
+ 7: GETL R28, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFE8B08C: 4804BA4D bl 0xFED6AD8
+ 10: MOVL $0xFE8B090, t8
+ 11: PUTL t8, LR
+ 12: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2212 FE8B080 16
+. 2E 1A 00 00 7C 71 1B 78 7F 83 E3 78 48 04 BA 4D
+==== BB 2213 (0xFE8B090) approx BBs exec'd 0 ====
+
+ 0xFE8B090: 81610000 lwz r11,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFE8B094: 7E838A14 add r20,r3,r17
+ 4: GETL R3, t4
+ 5: GETL R17, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R20
+ 8: INCEIPL $4
+
+ 0xFE8B098: 7F84E378 or r4,r28,r28
+ 9: GETL R28, t8
+ 10: PUTL t8, R4
+ 11: INCEIPL $4
+
+ 0xFE8B09C: 39540023 addi r10,r20,35
+ 12: GETL R20, t10
+ 13: ADDL $0x23, t10
+ 14: PUTL t10, R10
+ 15: INCEIPL $4
+
+ 0xFE8B0A0: 7F181214 add r24,r24,r2
+ 16: GETL R24, t12
+ 17: GETL R2, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R24
+ 20: INCEIPL $4
+
+ 0xFE8B0A4: 55480036 rlwinm r8,r10,0,0,27
+ 21: GETL R10, t16
+ 22: ANDL $0xFFFFFFF0, t16
+ 23: PUTL t16, R8
+ 24: INCEIPL $4
+
+ 0xFE8B0A8: 7CE800D0 neg r7,r8
+ 25: GETL R8, t18
+ 26: NEGL t18
+ 27: PUTL t18, R7
+ 28: INCEIPL $4
+
+ 0xFE8B0AC: 7D61396E stwux r11,r1,r7
+ 29: GETL R7, t20
+ 30: GETL R1, t22
+ 31: ADDL t22, t20
+ 32: PUTL t20, R1
+ 33: GETL R11, t24
+ 34: STL t24, (t20)
+ 35: INCEIPL $4
+
+ 0xFE8B0B0: 38C10017 addi r6,r1,23
+ 36: GETL R1, t26
+ 37: ADDL $0x17, t26
+ 38: PUTL t26, R6
+ 39: INCEIPL $4
+
+ 0xFE8B0B4: 54D40036 rlwinm r20,r6,0,0,27
+ 40: GETL R6, t28
+ 41: ANDL $0xFFFFFFF0, t28
+ 42: PUTL t28, R20
+ 43: INCEIPL $4
+
+ 0xFE8B0B8: 7E83A378 or r3,r20,r20
+ 44: GETL R20, t30
+ 45: PUTL t30, R3
+ 46: INCEIPL $4
+
+ 0xFE8B0BC: 4804D245 bl 0xFED8300
+ 47: MOVL $0xFE8B0C0, t32
+ 48: PUTL t32, LR
+ 49: JMPo-c $0xFED8300 ($4)
+
+
+
+. 2213 FE8B090 48
+. 81 61 00 00 7E 83 8A 14 7F 84 E3 78 39 54 00 23 7F 18 12 14 55 48 00 36 7C E8 00 D0 7D 61 39 6E 38 C1 00 17 54 D4 00 36 7E 83 A3 78 48 04 D2 45
+==== BB 2214 stpcpy(0xFED8300) approx BBs exec'd 0 ====
+
+ 0xFED8300: 7C801B78 or r0,r4,r3
+ 0: GETL R4, t0
+ 1: GETL R3, t2
+ 2: ORL t2, t0
+ 3: PUTL t0, R0
+ 4: INCEIPL $4
+
+ 0xFED8304: 540007BF rlwinm. r0,r0,0,30,31
+ 5: GETL R0, t4
+ 6: ANDL $0x3, t4
+ 7: PUTL t4, R0
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0xFED8308: 3863FFFC addi r3,r3,-4
+ 11: GETL R3, t8
+ 12: ADDL $0xFFFFFFFC, t8
+ 13: PUTL t8, R3
+ 14: INCEIPL $4
+
+ 0xFED830C: 40820088 bc 4,2,0xFED8394
+ 15: Jc02o $0xFED8394
+
+
+
+. 2214 FED8300 16
+. 7C 80 1B 78 54 00 07 BF 38 63 FF FC 40 82 00 88
+==== BB 2215 (0xFED8310) approx BBs exec'd 0 ====
+
+ 0xFED8310: 3CE0FEFF lis r7,-257
+ 0: MOVL $0xFEFF0000, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0xFED8314: 3D007F7F lis r8,32639
+ 3: MOVL $0x7F7F0000, t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0xFED8318: 80C40000 lwz r6,0(r4)
+ 6: GETL R4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0xFED831C: 38E7FEFF addi r7,r7,-257
+ 10: MOVL $0xFEFEFEFF, t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0xFED8320: 39087F7F addi r8,r8,32639
+ 13: MOVL $0x7F7F7F7F, t10
+ 14: PUTL t10, R8
+ 15: INCEIPL $4
+
+ 0xFED8324: 48000024 b 0xFED8348
+ 16: JMPo $0xFED8348 ($4)
+
+
+
+. 2215 FED8310 24
+. 3C E0 FE FF 3D 00 7F 7F 80 C4 00 00 38 E7 FE FF 39 08 7F 7F 48 00 00 24
+==== BB 2216 (0xFED8348) approx BBs exec'd 0 ====
+
+ 0xFED8348: 7C073214 add r0,r7,r6
+ 0: GETL R7, t0
+ 1: GETL R6, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED834C: 7D0930F8 nor r9,r8,r6
+ 5: GETL R8, t4
+ 6: GETL R6, t6
+ 7: ORL t6, t4
+ 8: NOTL t4
+ 9: PUTL t4, R9
+ 10: INCEIPL $4
+
+ 0xFED8350: 7C004839 and. r0,r0,r9
+ 11: GETL R0, t8
+ 12: GETL R9, t10
+ 13: ANDL t8, t10
+ 14: PUTL t10, R0
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x0, CR
+ 17: INCEIPL $4
+
+ 0xFED8354: 4182FFD4 bc 12,2,0xFED8328
+ 18: Js02o $0xFED8328
+
+
+
+. 2216 FED8348 16
+. 7C 07 32 14 7D 09 30 F8 7C 00 48 39 41 82 FF D4
+==== BB 2217 (0xFED8328) approx BBs exec'd 0 ====
+
+ 0xFED8328: 85440004 lwzu r10,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R4
+ 3: LDL (t0), t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0xFED832C: 94C30004 stwu r6,4(r3)
+ 6: GETL R6, t4
+ 7: GETL R3, t6
+ 8: ADDL $0x4, t6
+ 9: PUTL t6, R3
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFED8330: 7C075214 add r0,r7,r10
+ 12: GETL R7, t8
+ 13: GETL R10, t10
+ 14: ADDL t8, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xFED8334: 7D0950F8 nor r9,r8,r10
+ 17: GETL R8, t12
+ 18: GETL R10, t14
+ 19: ORL t14, t12
+ 20: NOTL t12
+ 21: PUTL t12, R9
+ 22: INCEIPL $4
+
+ 0xFED8338: 7C004839 and. r0,r0,r9
+ 23: GETL R0, t16
+ 24: GETL R9, t18
+ 25: ANDL t16, t18
+ 26: PUTL t18, R0
+ 27: CMP0L t18, t20 (-rSo)
+ 28: ICRFL t20, $0x0, CR
+ 29: INCEIPL $4
+
+ 0xFED833C: 40820020 bc 4,2,0xFED835C
+ 30: Jc02o $0xFED835C
+
+
+
+. 2217 FED8328 24
+. 85 44 00 04 94 C3 00 04 7C 07 52 14 7D 09 50 F8 7C 00 48 39 40 82 00 20
+==== BB 2218 (0xFED8340) approx BBs exec'd 0 ====
+
+ 0xFED8340: 84C40004 lwzu r6,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R4
+ 3: LDL (t0), t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFED8344: 95430004 stwu r10,4(r3)
+ 6: GETL R10, t4
+ 7: GETL R3, t6
+ 8: ADDL $0x4, t6
+ 9: PUTL t6, R3
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFED8348: 7C073214 add r0,r7,r6
+ 12: GETL R7, t8
+ 13: GETL R6, t10
+ 14: ADDL t8, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xFED834C: 7D0930F8 nor r9,r8,r6
+ 17: GETL R8, t12
+ 18: GETL R6, t14
+ 19: ORL t14, t12
+ 20: NOTL t12
+ 21: PUTL t12, R9
+ 22: INCEIPL $4
+
+ 0xFED8350: 7C004839 and. r0,r0,r9
+ 23: GETL R0, t16
+ 24: GETL R9, t18
+ 25: ANDL t16, t18
+ 26: PUTL t18, R0
+ 27: CMP0L t18, t20 (-rSo)
+ 28: ICRFL t20, $0x0, CR
+ 29: INCEIPL $4
+
+ 0xFED8354: 4182FFD4 bc 12,2,0xFED8328
+ 30: Js02o $0xFED8328
+
+
+
+. 2218 FED8340 24
+. 84 C4 00 04 95 43 00 04 7C 07 32 14 7D 09 30 F8 7C 00 48 39 41 82 FF D4
+==== BB 2219 (0xFED8358) approx BBs exec'd 0 ====
+
+ 0xFED8358: 7CCA3378 or r10,r6,r6
+ 0: GETL R6, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFED835C: 5540463F rlwinm. r0,r10,8,24,31
+ 3: GETL R10, t2
+ 4: SHRL $0x18, t2
+ 5: PUTL t2, R0
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFED8360: 9C030004 stbu r0,4(r3)
+ 9: GETL R0, t6
+ 10: GETL R3, t8
+ 11: ADDL $0x4, t8
+ 12: PUTL t8, R3
+ 13: STB t6, (t8)
+ 14: INCEIPL $4
+
+ 0xFED8364: 4D820020 bclr 12,2
+ 15: GETL LR, t10
+ 16: Js02o-r t10
+
+
+
+. 2219 FED8358 16
+. 7C CA 33 78 55 40 46 3F 9C 03 00 04 4D 82 00 20
+==== BB 2220 (0xFED8368) approx BBs exec'd 0 ====
+
+ 0xFED8368: 5540863F rlwinm. r0,r10,16,24,31
+ 0: GETL R10, t0
+ 1: ROLL $0x10, t0
+ 2: ANDL $0xFF, t0
+ 3: PUTL t0, R0
+ 4: CMP0L t0, t2 (-rSo)
+ 5: ICRFL t2, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFED836C: 9C030001 stbu r0,1(r3)
+ 7: GETL R0, t4
+ 8: GETL R3, t6
+ 9: ADDL $0x1, t6
+ 10: PUTL t6, R3
+ 11: STB t4, (t6)
+ 12: INCEIPL $4
+
+ 0xFED8370: 4D820020 bclr 12,2
+ 13: GETL LR, t8
+ 14: Js02o-r t8
+
+
+
+. 2220 FED8368 12
+. 55 40 86 3F 9C 03 00 01 4D 82 00 20
+==== BB 2221 (0xFED8374) approx BBs exec'd 0 ====
+
+ 0xFED8374: 5540C63F rlwinm. r0,r10,24,24,31
+ 0: GETL R10, t0
+ 1: ROLL $0x18, t0
+ 2: ANDL $0xFF, t0
+ 3: PUTL t0, R0
+ 4: CMP0L t0, t2 (-rSo)
+ 5: ICRFL t2, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFED8378: 9C030001 stbu r0,1(r3)
+ 7: GETL R0, t4
+ 8: GETL R3, t6
+ 9: ADDL $0x1, t6
+ 10: PUTL t6, R3
+ 11: STB t4, (t6)
+ 12: INCEIPL $4
+
+ 0xFED837C: 4D820020 bclr 12,2
+ 13: GETL LR, t8
+ 14: Js02o-r t8
+
+
+
+. 2221 FED8374 12
+. 55 40 C6 3F 9C 03 00 01 4D 82 00 20
+==== BB 2222 (0xFED8380) approx BBs exec'd 0 ====
+
+ 0xFED8380: 9D430001 stbu r10,1(r3)
+ 0: GETL R10, t0
+ 1: GETL R3, t2
+ 2: ADDL $0x1, t2
+ 3: PUTL t2, R3
+ 4: STB t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED8384: 4E800020 blr
+ 6: GETL LR, t4
+ 7: JMPo-r t4 ($4)
+
+
+
+. 2222 FED8380 8
+. 9D 43 00 01 4E 80 00 20
+==== BB 2223 (0xFE8B0C0) approx BBs exec'd 0 ====
+
+ 0xFE8B0C0: 38A02F00 li r5,12032
+ 0: MOVL $0x2F00, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFE8B0C4: B0A30000 sth r5,0(r3)
+ 3: GETL R5, t2
+ 4: GETL R3, t4
+ 5: STW t2, (t4)
+ 6: INCEIPL $4
+
+ 0xFE8B0C8: 7EA4AB78 or r4,r21,r21
+ 7: GETL R21, t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFE8B0CC: 7E258B78 or r5,r17,r17
+ 10: GETL R17, t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0xFE8B0D0: 38630001 addi r3,r3,1
+ 13: GETL R3, t10
+ 14: ADDL $0x1, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0xFE8B0D4: 4804CF2D bl 0xFED8000
+ 17: MOVL $0xFE8B0D8, t12
+ 18: PUTL t12, LR
+ 19: JMPo-c $0xFED8000 ($4)
+
+
+
+. 2223 FE8B0C0 24
+. 38 A0 2F 00 B0 A3 00 00 7E A4 AB 78 7E 25 8B 78 38 63 00 01 48 04 CF 2D
+==== BB 2224 (0xFE8B0D8) approx BBs exec'd 0 ====
+
+ 0xFE8B0D8: 3C802E6D lis r4,11885
+ 0: MOVL $0x2E6D0000, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE8B0DC: 60896F00 ori r9,r4,0x6F00
+ 3: MOVL $0x2E6D6F00, t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0xFE8B0E0: 91230000 stw r9,0(r3)
+ 6: GETL R9, t4
+ 7: GETL R3, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFE8B0E4: 7F63DB78 or r3,r27,r27
+ 10: GETL R27, t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFE8B0E8: 4804B9F1 bl 0xFED6AD8
+ 13: MOVL $0xFE8B0EC, t10
+ 14: PUTL t10, LR
+ 15: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2224 FE8B0D8 20
+. 3C 80 2E 6D 60 89 6F 00 91 23 00 00 7F 63 DB 78 48 04 B9 F1
+==== BB 2225 (0xFE8B0EC) approx BBs exec'd 0 ====
+
+ 0xFE8B0EC: 83810000 lwz r28,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R28
+ 3: INCEIPL $4
+
+ 0xFE8B0F0: 3803001F addi r0,r3,31
+ 4: GETL R3, t4
+ 5: ADDL $0x1F, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFE8B0F4: 931F0018 stw r24,24(r31)
+ 8: GETL R24, t6
+ 9: GETL R31, t8
+ 10: ADDL $0x18, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE8B0F8: 54030036 rlwinm r3,r0,0,0,27
+ 13: GETL R0, t10
+ 14: ANDL $0xFFFFFFF0, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0xFE8B0FC: 7FA300D0 neg r29,r3
+ 17: GETL R3, t12
+ 18: NEGL t12
+ 19: PUTL t12, R29
+ 20: INCEIPL $4
+
+ 0xFE8B100: 7F81E96E stwux r28,r1,r29
+ 21: GETL R29, t14
+ 22: GETL R1, t16
+ 23: ADDL t16, t14
+ 24: PUTL t14, R1
+ 25: GETL R28, t18
+ 26: STL t18, (t14)
+ 27: INCEIPL $4
+
+ 0xFE8B104: 3B410017 addi r26,r1,23
+ 28: GETL R1, t20
+ 29: ADDL $0x17, t20
+ 30: PUTL t20, R26
+ 31: INCEIPL $4
+
+ 0xFE8B108: 57590036 rlwinm r25,r26,0,0,27
+ 32: GETL R26, t22
+ 33: ANDL $0xFFFFFFF0, t22
+ 34: PUTL t22, R25
+ 35: INCEIPL $4
+
+ 0xFE8B10C: 893B0000 lbz r9,0(r27)
+ 36: GETL R27, t24
+ 37: LDB (t24), t26
+ 38: PUTL t26, R9
+ 39: INCEIPL $4
+
+ 0xFE8B110: 2F09003A cmpi cr6,r9,58
+ 40: GETL R9, t28
+ 41: MOVL $0x3A, t32
+ 42: CMPL t28, t32, t30 (-rSo)
+ 43: ICRFL t30, $0x6, CR
+ 44: INCEIPL $4
+
+ 0xFE8B114: 409A0010 bc 4,26,0xFE8B124
+ 45: Jc26o $0xFE8B124
+
+
+
+. 2225 FE8B0EC 44
+. 83 81 00 00 38 03 00 1F 93 1F 00 18 54 03 00 36 7F A3 00 D0 7F 81 E9 6E 3B 41 00 17 57 59 00 36 89 3B 00 00 2F 09 00 3A 40 9A 00 10
+==== BB 2226 (0xFE8B124) approx BBs exec'd 0 ====
+
+ 0xFE8B124: 7D2B4B79 or. r11,r9,r9
+ 0: GETL R9, t0
+ 1: PUTL t0, R11
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8B128: 40820188 bc 4,2,0xFE8B2B0
+ 5: Jc02o $0xFE8B2B0
+
+
+
+. 2226 FE8B124 8
+. 7D 2B 4B 79 40 82 01 88
+==== BB 2227 (0xFE8B2B0) approx BBs exec'd 0 ====
+
+ 0xFE8B2B0: 2F8B003A cmpi cr7,r11,58
+ 0: GETL R11, t0
+ 1: MOVL $0x3A, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE8B2B4: 7F2ACB78 or r10,r25,r25
+ 5: GETL R25, t6
+ 6: PUTL t6, R10
+ 7: INCEIPL $4
+
+ 0xFE8B2B8: 419E001C bc 12,30,0xFE8B2D4
+ 8: Js30o $0xFE8B2D4
+
+
+
+. 2227 FE8B2B0 12
+. 2F 8B 00 3A 7F 2A CB 78 41 9E 00 1C
+==== BB 2228 (0xFE8B2BC) approx BBs exec'd 0 ====
+
+ 0xFE8B2BC: 992A0000 stb r9,0(r10)
+ 0: GETL R9, t0
+ 1: GETL R10, t2
+ 2: STB t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE8B2C0: 394A0001 addi r10,r10,1
+ 4: GETL R10, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0xFE8B2C4: 8D3B0001 lbzu r9,1(r27)
+ 8: GETL R27, t6
+ 9: ADDL $0x1, t6
+ 10: PUTL t6, R27
+ 11: LDB (t6), t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFE8B2C8: 7D384B79 or. r24,r9,r9
+ 14: GETL R9, t10
+ 15: PUTL t10, R24
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFE8B2CC: 2F98003A cmpi cr7,r24,58
+ 19: GETL R24, t14
+ 20: MOVL $0x3A, t18
+ 21: CMPL t14, t18, t16 (-rSo)
+ 22: ICRFL t16, $0x7, CR
+ 23: INCEIPL $4
+
+ 0xFE8B2D0: 4082FFE8 bc 4,2,0xFE8B2B8
+ 24: Jc02o $0xFE8B2B8
+
+
+
+. 2228 FE8B2BC 24
+. 99 2A 00 00 39 4A 00 01 8D 3B 00 01 7D 38 4B 79 2F 98 00 3A 40 82 FF E8
+==== BB 2229 (0xFE8B2B8) approx BBs exec'd 0 ====
+
+ 0xFE8B2B8: 419E001C bc 12,30,0xFE8B2D4
+ 0: Js30o $0xFE8B2D4
+
+
+
+. 2229 FE8B2B8 4
+. 41 9E 00 1C
+==== BB 2230 (0xFE8B2D4) approx BBs exec'd 0 ====
+
+ 0xFE8B2D4: 839E1D70 lwz r28,7536(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1D70, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFE8B2D8: 3BA00000 li r29,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFE8B2DC: 835C0000 lwz r26,0(r28)
+ 8: GETL R28, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R26
+ 11: INCEIPL $4
+
+ 0xFE8B2E0: 9BAA0000 stb r29,0(r10)
+ 12: GETL R29, t10
+ 13: GETL R10, t12
+ 14: STB t10, (t12)
+ 15: INCEIPL $4
+
+ 0xFE8B2E4: 2F9A0000 cmpi cr7,r26,0
+ 16: GETL R26, t14
+ 17: CMP0L t14, t16 (-rSo)
+ 18: ICRFL t16, $0x7, CR
+ 19: INCEIPL $4
+
+ 0xFE8B2E8: 41BEFE50 bc 13,30,0xFE8B138
+ 20: Js30o $0xFE8B138
+
+
+
+. 2230 FE8B2D4 24
+. 83 9E 1D 70 3B A0 00 00 83 5C 00 00 9B AA 00 00 2F 9A 00 00 41 BE FE 50
+==== BB 2231 (0xFE8B138) approx BBs exec'd 0 ====
+
+ 0xFE8B138: 88790000 lbz r3,0(r25)
+ 0: GETL R25, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE8B13C: 3523FFBD addic. r9,r3,-67
+ 4: GETL R3, t4
+ 5: ADCL $0xFFFFFFBD, t4 (-wCa)
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFE8B140: 4F421042 crnor 26,2,2
+ 10: GETL CR, t8
+ 11: XBITB t8, $0x2, t10
+ 12: XBITB t8, $0x2, t12
+ 13: NOTB t10
+ 14: NOTB t12
+ 15: ANDB t12, t10
+ 16: IBITL t10, $0x1A, t8
+ 17: PUTL t8, CR
+ 18: INCEIPL $4
+
+ 0xFE8B144: 419A000C bc 12,26,0xFE8B150
+ 19: Js26o $0xFE8B150
+
+
+
+. 2231 FE8B138 16
+. 88 79 00 00 35 23 FF BD 4F 42 10 42 41 9A 00 0C
+==== BB 2232 (0xFE8B150) approx BBs exec'd 0 ====
+
+ 0xFE8B150: 418202F8 bc 12,2,0xFE8B448
+ 0: Js02o $0xFE8B448
+
+
+
+. 2232 FE8B150 4
+. 41 82 02 F8
+==== BB 2233 (0xFE8B154) approx BBs exec'd 0 ====
+
+ 0xFE8B154: 809E0198 lwz r4,408(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x198, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE8B158: 7F23CB78 or r3,r25,r25
+ 5: GETL R25, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE8B15C: 4804B255 bl 0xFED63B0
+ 8: MOVL $0xFE8B160, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2233 FE8B154 12
+. 80 9E 01 98 7F 23 CB 78 48 04 B2 55
+==== BB 2234 (0xFE8B160) approx BBs exec'd 0 ====
+
+ 0xFE8B160: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFE8B164: 418202E4 bc 12,2,0xFE8B448
+ 4: Js02o $0xFE8B448
+
+
+
+. 2234 FE8B160 8
+. 2C 03 00 00 41 82 02 E4
+==== BB 2235 (0xFE8B168) approx BBs exec'd 0 ====
+
+ 0xFE8B168: 7E639B78 or r3,r19,r19
+ 0: GETL R19, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8B16C: 7F24CB78 or r4,r25,r25
+ 3: GETL R25, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE8B170: 7E85A378 or r5,r20,r20
+ 6: GETL R20, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFE8B174: 7EE6BB78 or r6,r23,r23
+ 9: GETL R23, t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0xFE8B178: 48000585 bl 0xFE8B6FC
+ 12: MOVL $0xFE8B17C, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0xFE8B6FC ($4)
+
+
+
+. 2235 FE8B168 20
+. 7E 63 9B 78 7F 24 CB 78 7E 85 A3 78 7E E6 BB 78 48 00 05 85
+==== BB 2236 _nl_find_domain(0xFE8B6FC) approx BBs exec'd 0 ====
+
+ 0xFE8B6FC: 9421FFA0 stwu r1,-96(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFA0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE8B700: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE8B704: 4811C74D bl 0xFFA7E50
+ 9: MOVL $0xFE8B708, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2236 FE8B6FC 12
+. 94 21 FF A0 7C 08 02 A6 48 11 C7 4D
+==== BB 2237 (0xFE8B708) approx BBs exec'd 0 ====
+
+ 0xFE8B708: 93C10058 stw r30,88(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x58, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE8B70C: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE8B710: 93810050 stw r28,80(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x50, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE8B714: 90010064 stw r0,100(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x64, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE8B718: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0xFE8B71C: 93210044 stw r25,68(r1)
+ 21: GETL R25, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x44, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE8B720: 7CB92B78 or r25,r5,r5
+ 26: GETL R5, t20
+ 27: PUTL t20, R25
+ 28: INCEIPL $4
+
+ 0xFE8B724: 839E1B48 lwz r28,6984(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x1B48, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R28
+ 33: INCEIPL $4
+
+ 0xFE8B728: 93410048 stw r26,72(r1)
+ 34: GETL R26, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x48, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFE8B72C: 7C9A2378 or r26,r4,r4
+ 39: GETL R4, t30
+ 40: PUTL t30, R26
+ 41: INCEIPL $4
+
+ 0xFE8B730: 801C00A0 lwz r0,160(r28)
+ 42: GETL R28, t32
+ 43: ADDL $0xA0, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R0
+ 46: INCEIPL $4
+
+ 0xFE8B734: 9361004C stw r27,76(r1)
+ 47: GETL R27, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x4C, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0xFE8B738: 7CDB3378 or r27,r6,r6
+ 52: GETL R6, t40
+ 53: PUTL t40, R27
+ 54: INCEIPL $4
+
+ 0xFE8B73C: 2F800000 cmpi cr7,r0,0
+ 55: GETL R0, t42
+ 56: CMP0L t42, t44 (-rSo)
+ 57: ICRFL t44, $0x7, CR
+ 58: INCEIPL $4
+
+ 0xFE8B740: 93A10054 stw r29,84(r1)
+ 59: GETL R29, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x54, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0xFE8B744: 93010040 stw r24,64(r1)
+ 64: GETL R24, t50
+ 65: GETL R1, t52
+ 66: ADDL $0x40, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0xFE8B748: 7C7D1B78 or r29,r3,r3
+ 69: GETL R3, t54
+ 70: PUTL t54, R29
+ 71: INCEIPL $4
+
+ 0xFE8B74C: 93E1005C stw r31,92(r1)
+ 72: GETL R31, t56
+ 73: GETL R1, t58
+ 74: ADDL $0x5C, t58
+ 75: STL t56, (t58)
+ 76: INCEIPL $4
+
+ 0xFE8B750: 9181003C stw r12,60(r1)
+ 77: GETL R12, t60
+ 78: GETL R1, t62
+ 79: ADDL $0x3C, t62
+ 80: STL t60, (t62)
+ 81: INCEIPL $4
+
+ 0xFE8B754: 409E0120 bc 4,30,0xFE8B874
+ 82: Jc30o $0xFE8B874
+
+
+
+. 2237 FE8B708 80
+. 93 C1 00 58 7F C8 02 A6 93 81 00 50 90 01 00 64 7D 80 00 26 93 21 00 44 7C B9 2B 78 83 9E 1B 48 93 41 00 48 7C 9A 23 78 80 1C 00 A0 93 61 00 4C 7C DB 33 78 2F 80 00 00 93 A1 00 54 93 01 00 40 7C 7D 1B 78 93 E1 00 5C 91 81 00 3C 40 9E 01 20
+==== BB 2238 (0xFE8B758) approx BBs exec'd 0 ====
+
+ 0xFE8B758: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8B75C: 4804B37D bl 0xFED6AD8
+ 3: MOVL $0xFE8B760, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2238 FE8B758 8
+. 7F A3 EB 78 48 04 B3 7D
+==== BB 2239 (0xFE8B760) approx BBs exec'd 0 ====
+
+ 0xFE8B760: 39600000 li r11,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFE8B764: 38A30001 addi r5,r3,1
+ 3: GETL R3, t2
+ 4: ADDL $0x1, t2
+ 5: PUTL t2, R5
+ 6: INCEIPL $4
+
+ 0xFE8B768: 807E01A0 lwz r3,416(r30)
+ 7: GETL R30, t4
+ 8: ADDL $0x1A0, t4
+ 9: LDL (t4), t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0xFE8B76C: 7FA4EB78 or r4,r29,r29
+ 12: GETL R29, t8
+ 13: PUTL t8, R4
+ 14: INCEIPL $4
+
+ 0xFE8B770: 38C00000 li r6,0
+ 15: MOVL $0x0, t10
+ 16: PUTL t10, R6
+ 17: INCEIPL $4
+
+ 0xFE8B774: 7F47D378 or r7,r26,r26
+ 18: GETL R26, t12
+ 19: PUTL t12, R7
+ 20: INCEIPL $4
+
+ 0xFE8B778: 39000000 li r8,0
+ 21: MOVL $0x0, t14
+ 22: PUTL t14, R8
+ 23: INCEIPL $4
+
+ 0xFE8B77C: 39200000 li r9,0
+ 24: MOVL $0x0, t16
+ 25: PUTL t16, R9
+ 26: INCEIPL $4
+
+ 0xFE8B780: 39400000 li r10,0
+ 27: MOVL $0x0, t18
+ 28: PUTL t18, R10
+ 29: INCEIPL $4
+
+ 0xFE8B784: 91610010 stw r11,16(r1)
+ 30: GETL R11, t20
+ 31: GETL R1, t22
+ 32: ADDL $0x10, t22
+ 33: STL t20, (t22)
+ 34: INCEIPL $4
+
+ 0xFE8B788: 91610008 stw r11,8(r1)
+ 35: GETL R11, t24
+ 36: GETL R1, t26
+ 37: ADDL $0x8, t26
+ 38: STL t24, (t26)
+ 39: INCEIPL $4
+
+ 0xFE8B78C: 9321000C stw r25,12(r1)
+ 40: GETL R25, t28
+ 41: GETL R1, t30
+ 42: ADDL $0xC, t30
+ 43: STL t28, (t30)
+ 44: INCEIPL $4
+
+ 0xFE8B790: 4800216D bl 0xFE8D8FC
+ 45: MOVL $0xFE8B794, t32
+ 46: PUTL t32, LR
+ 47: JMPo-c $0xFE8D8FC ($4)
+
+
+
+. 2239 FE8B760 52
+. 39 60 00 00 38 A3 00 01 80 7E 01 A0 7F A4 EB 78 38 C0 00 00 7F 47 D3 78 39 00 00 00 39 20 00 00 39 40 00 00 91 61 00 10 91 61 00 08 93 21 00 0C 48 00 21 6D
+==== BB 2240 _nl_make_l10nflist(0xFE8D8FC) approx BBs exec'd 0 ====
+
+ 0xFE8D8FC: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE8D900: 7D800026 mfcr r12
+ 3: GETL CR, t2
+ 4: PUTL t2, R12
+ 5: INCEIPL $4
+
+ 0xFE8D904: 9421FF90 stwu r1,-112(r1)
+ 6: GETL R1, t4
+ 7: GETL R1, t6
+ 8: ADDL $0xFFFFFF90, t6
+ 9: PUTL t6, R1
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFE8D908: 91E1002C stw r15,44(r1)
+ 12: GETL R15, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x2C, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFE8D90C: 92010030 stw r16,48(r1)
+ 17: GETL R16, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x30, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFE8D910: 92410038 stw r18,56(r1)
+ 22: GETL R18, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x38, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0xFE8D914: 7C721B78 or r18,r3,r3
+ 27: GETL R3, t20
+ 28: PUTL t20, R18
+ 29: INCEIPL $4
+
+ 0xFE8D918: 9261003C stw r19,60(r1)
+ 30: GETL R19, t22
+ 31: GETL R1, t24
+ 32: ADDL $0x3C, t24
+ 33: STL t22, (t24)
+ 34: INCEIPL $4
+
+ 0xFE8D91C: 7CE33B78 or r3,r7,r7
+ 35: GETL R7, t26
+ 36: PUTL t26, R3
+ 37: INCEIPL $4
+
+ 0xFE8D920: 92810040 stw r20,64(r1)
+ 38: GETL R20, t28
+ 39: GETL R1, t30
+ 40: ADDL $0x40, t30
+ 41: STL t28, (t30)
+ 42: INCEIPL $4
+
+ 0xFE8D924: 7D334B78 or r19,r9,r9
+ 43: GETL R9, t32
+ 44: PUTL t32, R19
+ 45: INCEIPL $4
+
+ 0xFE8D928: 92A10044 stw r21,68(r1)
+ 46: GETL R21, t34
+ 47: GETL R1, t36
+ 48: ADDL $0x44, t36
+ 49: STL t34, (t36)
+ 50: INCEIPL $4
+
+ 0xFE8D92C: 7D144378 or r20,r8,r8
+ 51: GETL R8, t38
+ 52: PUTL t38, R20
+ 53: INCEIPL $4
+
+ 0xFE8D930: 92C10048 stw r22,72(r1)
+ 54: GETL R22, t40
+ 55: GETL R1, t42
+ 56: ADDL $0x48, t42
+ 57: STL t40, (t42)
+ 58: INCEIPL $4
+
+ 0xFE8D934: 7D555378 or r21,r10,r10
+ 59: GETL R10, t44
+ 60: PUTL t44, R21
+ 61: INCEIPL $4
+
+ 0xFE8D938: 93010050 stw r24,80(r1)
+ 62: GETL R24, t46
+ 63: GETL R1, t48
+ 64: ADDL $0x50, t48
+ 65: STL t46, (t48)
+ 66: INCEIPL $4
+
+ 0xFE8D93C: 54D8F0BE rlwinm r24,r6,30,2,31
+ 67: GETL R6, t50
+ 68: SHRL $0x2, t50
+ 69: PUTL t50, R24
+ 70: INCEIPL $4
+
+ 0xFE8D940: 93410058 stw r26,88(r1)
+ 71: GETL R26, t52
+ 72: GETL R1, t54
+ 73: ADDL $0x58, t54
+ 74: STL t52, (t54)
+ 75: INCEIPL $4
+
+ 0xFE8D944: 7CF63B78 or r22,r7,r7
+ 76: GETL R7, t56
+ 77: PUTL t56, R22
+ 78: INCEIPL $4
+
+ 0xFE8D948: 93810060 stw r28,96(r1)
+ 79: GETL R28, t58
+ 80: GETL R1, t60
+ 81: ADDL $0x60, t60
+ 82: STL t58, (t60)
+ 83: INCEIPL $4
+
+ 0xFE8D94C: 7CBA2B78 or r26,r5,r5
+ 84: GETL R5, t62
+ 85: PUTL t62, R26
+ 86: INCEIPL $4
+
+ 0xFE8D950: 93A10064 stw r29,100(r1)
+ 87: GETL R29, t64
+ 88: GETL R1, t66
+ 89: ADDL $0x64, t66
+ 90: STL t64, (t66)
+ 91: INCEIPL $4
+
+ 0xFE8D954: 7CDC3378 or r28,r6,r6
+ 92: GETL R6, t68
+ 93: PUTL t68, R28
+ 94: INCEIPL $4
+
+ 0xFE8D958: 93E1006C stw r31,108(r1)
+ 95: GETL R31, t70
+ 96: GETL R1, t72
+ 97: ADDL $0x6C, t72
+ 98: STL t70, (t72)
+ 99: INCEIPL $4
+
+ 0xFE8D95C: 90010074 stw r0,116(r1)
+ 100: GETL R0, t74
+ 101: GETL R1, t76
+ 102: ADDL $0x74, t76
+ 103: STL t74, (t76)
+ 104: INCEIPL $4
+
+ 0xFE8D960: 91C10028 stw r14,40(r1)
+ 105: GETL R14, t78
+ 106: GETL R1, t80
+ 107: ADDL $0x28, t80
+ 108: STL t78, (t80)
+ 109: INCEIPL $4
+
+ 0xFE8D964: 92210034 stw r17,52(r1)
+ 110: GETL R17, t82
+ 111: GETL R1, t84
+ 112: ADDL $0x34, t84
+ 113: STL t82, (t84)
+ 114: INCEIPL $4
+
+ 0xFE8D968: 92E1004C stw r23,76(r1)
+ 115: GETL R23, t86
+ 116: GETL R1, t88
+ 117: ADDL $0x4C, t88
+ 118: STL t86, (t88)
+ 119: INCEIPL $4
+
+ 0xFE8D96C: 93210054 stw r25,84(r1)
+ 120: GETL R25, t90
+ 121: GETL R1, t92
+ 122: ADDL $0x54, t92
+ 123: STL t90, (t92)
+ 124: INCEIPL $4
+
+ 0xFE8D970: 9361005C stw r27,92(r1)
+ 125: GETL R27, t94
+ 126: GETL R1, t96
+ 127: ADDL $0x5C, t96
+ 128: STL t94, (t96)
+ 129: INCEIPL $4
+
+ 0xFE8D974: 93C10068 stw r30,104(r1)
+ 130: GETL R30, t98
+ 131: GETL R1, t100
+ 132: ADDL $0x68, t100
+ 133: STL t98, (t100)
+ 134: INCEIPL $4
+
+ 0xFE8D978: 91810024 stw r12,36(r1)
+ 135: GETL R12, t102
+ 136: GETL R1, t104
+ 137: ADDL $0x24, t104
+ 138: STL t102, (t104)
+ 139: INCEIPL $4
+
+ 0xFE8D97C: 90810018 stw r4,24(r1)
+ 140: GETL R4, t106
+ 141: GETL R1, t108
+ 142: ADDL $0x18, t108
+ 143: STL t106, (t108)
+ 144: INCEIPL $4
+
+ 0xFE8D980: 48049159 bl 0xFED6AD8
+ 145: MOVL $0xFE8D984, t110
+ 146: PUTL t110, LR
+ 147: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2240 FE8D8FC 136
+. 7C 08 02 A6 7D 80 00 26 94 21 FF 90 91 E1 00 2C 92 01 00 30 92 41 00 38 7C 72 1B 78 92 61 00 3C 7C E3 3B 78 92 81 00 40 7D 33 4B 78 92 A1 00 44 7D 14 43 78 92 C1 00 48 7D 55 53 78 93 01 00 50 54 D8 F0 BE 93 41 00 58 7C F6 3B 78 93 81 00 60 7C BA 2B 78 93 A1 00 64 7C DC 33 78 93 E1 00 6C 90 01 00 74 91 C1 00 28 92 21 00 34 92 E1 00 4C 93 21 00 54 93 61 00 5C 93 C1 00 68 91 81 00 24 90 81 00 18 48 04 91 59
+==== BB 2241 (0xFE8D984) approx BBs exec'd 0 ====
+
+ 0xFE8D984: 73000001 andi. r0,r24,0x1
+ 0: GETL R24, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE8D988: 7FA3D214 add r29,r3,r26
+ 6: GETL R3, t4
+ 7: GETL R26, t6
+ 8: ADDL t4, t6
+ 9: PUTL t6, R29
+ 10: INCEIPL $4
+
+ 0xFE8D98C: 81E10078 lwz r15,120(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x78, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R15
+ 15: INCEIPL $4
+
+ 0xFE8D990: 8201007C lwz r16,124(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x7C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R16
+ 20: INCEIPL $4
+
+ 0xFE8D994: 7FBFEB78 or r31,r29,r29
+ 21: GETL R29, t16
+ 22: PUTL t16, R31
+ 23: INCEIPL $4
+
+ 0xFE8D998: 41820014 bc 12,2,0xFE8D9AC
+ 24: Js02o $0xFE8D9AC
+
+
+
+. 2241 FE8D984 24
+. 73 00 00 01 7F A3 D2 14 81 E1 00 78 82 01 00 7C 7F BF EB 78 41 82 00 14
+==== BB 2242 (0xFE8D9AC) approx BBs exec'd 0 ====
+
+ 0xFE8D9AC: 5799F87E rlwinm r25,r28,31,1,31
+ 0: GETL R28, t0
+ 1: SHRL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0xFE8D9B0: 7FFDFB78 or r29,r31,r31
+ 4: GETL R31, t2
+ 5: PUTL t2, R29
+ 6: INCEIPL $4
+
+ 0xFE8D9B4: 73200001 andi. r0,r25,0x1
+ 7: GETL R25, t4
+ 8: ANDL $0x1, t4
+ 9: PUTL t4, R0
+ 10: CMP0L t4, t6 (-rSo)
+ 11: ICRFL t6, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFE8D9B8: 41820014 bc 12,2,0xFE8D9CC
+ 13: Js02o $0xFE8D9CC
+
+
+
+. 2242 FE8D9AC 16
+. 57 99 F8 7E 7F FD FB 78 73 20 00 01 41 82 00 14
+==== BB 2243 (0xFE8D9CC) approx BBs exec'd 0 ====
+
+ 0xFE8D9CC: 73970001 andi. r23,r28,0x1
+ 0: GETL R28, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R23
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE8D9D0: 41820188 bc 12,2,0xFE8DB58
+ 6: Js02o $0xFE8DB58
+
+
+
+. 2243 FE8D9CC 8
+. 73 97 00 01 41 82 01 88
+==== BB 2244 (0xFE8DB58) approx BBs exec'd 0 ====
+
+ 0xFE8DB58: 7FBFEB78 or r31,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0xFE8DB5C: 4BFFFE88 b 0xFE8D9E4
+ 3: JMPo $0xFE8D9E4 ($4)
+
+
+
+. 2244 FE8DB58 8
+. 7F BF EB 78 4B FF FE 88
+==== BB 2245 (0xFE8D9E4) approx BBs exec'd 0 ====
+
+ 0xFE8D9E4: 7E038378 or r3,r16,r16
+ 0: GETL R16, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8D9E8: 579BE8FE rlwinm r27,r28,29,3,31
+ 3: GETL R28, t2
+ 4: SHRL $0x3, t2
+ 5: PUTL t2, R27
+ 6: INCEIPL $4
+
+ 0xFE8D9EC: 480490ED bl 0xFED6AD8
+ 7: MOVL $0xFE8D9F0, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2245 FE8D9E4 12
+. 7E 03 83 78 57 9B E8 FE 48 04 90 ED
+==== BB 2246 (0xFE8D9F0) approx BBs exec'd 0 ====
+
+ 0xFE8D9F0: 73600001 andi. r0,r27,0x1
+ 0: GETL R27, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE8D9F4: 7D3F1A14 add r9,r31,r3
+ 6: GETL R31, t4
+ 7: GETL R3, t6
+ 8: ADDL t4, t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0xFE8D9F8: 7C7D1B78 or r29,r3,r3
+ 11: GETL R3, t8
+ 12: PUTL t8, R29
+ 13: INCEIPL $4
+
+ 0xFE8D9FC: 38690002 addi r3,r9,2
+ 14: GETL R9, t10
+ 15: ADDL $0x2, t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0xFE8DA00: 41820018 bc 12,2,0xFE8DA18
+ 18: Js02o $0xFE8DA18
+
+
+
+. 2246 FE8D9F0 20
+. 73 60 00 01 7D 3F 1A 14 7C 7D 1B 78 38 69 00 02 41 82 00 18
+==== BB 2247 (0xFE8DA18) approx BBs exec'd 0 ====
+
+ 0xFE8DA18: 4811C8F1 bl 0xFFAA308
+ 0: MOVL $0xFE8DA1C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFFAA308 ($4)
+
+
+
+. 2247 FE8DA18 4
+. 48 11 C8 F1
+==== BB 2248 (0xFE8DA1C) approx BBs exec'd 0 ====
+
+ 0xFE8DA1C: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE8DA20: 7C7D1B79 or. r29,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R29
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFE8DA24: 418200D0 bc 12,2,0xFE8DAF4
+ 8: Js02o $0xFE8DAF4
+
+
+
+. 2248 FE8DA1C 12
+. 38 00 00 00 7C 7D 1B 79 41 82 00 D0
+==== BB 2249 (0xFE8DA28) approx BBs exec'd 0 ====
+
+ 0xFE8DA28: 80810018 lwz r4,24(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE8DA2C: 7F45D378 or r5,r26,r26
+ 5: GETL R26, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFE8DA30: 4804ACA9 bl 0xFED86D8
+ 8: MOVL $0xFE8DA34, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 2249 FE8DA28 12
+. 80 81 00 18 7F 45 D3 78 48 04 AC A9
+==== BB 2250 (0xFE8DA34) approx BBs exec'd 0 ====
+
+ 0xFE8DA34: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8DA38: 7F44D378 or r4,r26,r26
+ 3: GETL R26, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE8DA3C: 38A0003A li r5,58
+ 6: MOVL $0x3A, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFE8DA40: 4804BF49 bl 0xFED9988
+ 9: MOVL $0xFE8DA44, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFED9988 ($4)
+
+
+
+. 2250 FE8DA34 16
+. 7F A3 EB 78 7F 44 D3 78 38 A0 00 3A 48 04 BF 49
+==== BB 2251 __argz_stringify_internal(0xFED9988) approx BBs exec'd 0 ====
+
+ 0xFED9988: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED998C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFED9990: 93A10014 stw r29,20(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFED9994: 7C9D2379 or. r29,r4,r4
+ 14: GETL R4, t10
+ 15: PUTL t10, R29
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFED9998: 93810010 stw r28,16(r1)
+ 19: GETL R28, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x10, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFED999C: 7CBC2B78 or r28,r5,r5
+ 24: GETL R5, t18
+ 25: PUTL t18, R28
+ 26: INCEIPL $4
+
+ 0xFED99A0: 93E1001C stw r31,28(r1)
+ 27: GETL R31, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x1C, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFED99A4: 7C7F1B78 or r31,r3,r3
+ 32: GETL R3, t24
+ 33: PUTL t24, R31
+ 34: INCEIPL $4
+
+ 0xFED99A8: 93C10018 stw r30,24(r1)
+ 35: GETL R30, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x18, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFED99AC: 90010024 stw r0,36(r1)
+ 40: GETL R0, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x24, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0xFED99B0: 41820030 bc 12,2,0xFED99E0
+ 45: Js02o $0xFED99E0
+
+
+
+. 2251 FED9988 44
+. 94 21 FF E0 7C 08 02 A6 93 A1 00 14 7C 9D 23 79 93 81 00 10 7C BC 2B 78 93 E1 00 1C 7C 7F 1B 78 93 C1 00 18 90 01 00 24 41 82 00 30
+==== BB 2252 (0xFED99B4) approx BBs exec'd 0 ====
+
+ 0xFED99B4: 4800000C b 0xFED99C0
+ 0: JMPo $0xFED99C0 ($4)
+
+
+
+. 2252 FED99B4 4
+. 48 00 00 0C
+==== BB 2253 (0xFED99C0) approx BBs exec'd 0 ====
+
+ 0xFED99C0: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFED99C4: 7FE3FB78 or r3,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFED99C8: 4BFFD1C9 bl 0xFED6B90
+ 6: MOVL $0xFED99CC, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED6B90 ($4)
+
+
+
+. 2253 FED99C0 12
+. 7F A4 EB 78 7F E3 FB 78 4B FF D1 C9
+==== BB 2254 strnlen(0xFED6B90) approx BBs exec'd 0 ====
+
+ 0xFED6B90: 2F840000 cmpi cr7,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFED6B94: 7C681B78 or r8,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R8
+ 6: INCEIPL $4
+
+ 0xFED6B98: 7D432214 add r10,r3,r4
+ 7: GETL R3, t6
+ 8: GETL R4, t8
+ 9: ADDL t6, t8
+ 10: PUTL t8, R10
+ 11: INCEIPL $4
+
+ 0xFED6B9C: 9421FFF0 stwu r1,-16(r1)
+ 12: GETL R1, t10
+ 13: GETL R1, t12
+ 14: ADDL $0xFFFFFFF0, t12
+ 15: PUTL t12, R1
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFED6BA0: 38600000 li r3,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R3
+ 20: INCEIPL $4
+
+ 0xFED6BA4: 419E00C0 bc 12,30,0xFED6C64
+ 21: Js30o $0xFED6C64
+
+
+
+. 2254 FED6B90 24
+. 2F 84 00 00 7C 68 1B 78 7D 43 22 14 94 21 FF F0 38 60 00 00 41 9E 00 C0
+==== BB 2255 (0xFED6BA8) approx BBs exec'd 0 ====
+
+ 0xFED6BA8: 7C0A4040 cmpl cr0,r10,r8
+ 0: GETL R10, t0
+ 1: GETL R8, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFED6BAC: 418000C0 bc 12,0,0xFED6C6C
+ 5: Js00o $0xFED6C6C
+
+
+
+. 2255 FED6BA8 8
+. 7C 0A 40 40 41 80 00 C0
+==== BB 2256 (0xFED6BB0) approx BBs exec'd 0 ====
+
+ 0xFED6BB0: 71000003 andi. r0,r8,0x3
+ 0: GETL R8, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED6BB4: 7D034378 or r3,r8,r8
+ 6: GETL R8, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFED6BB8: 4182001C bc 12,2,0xFED6BD4
+ 9: Js02o $0xFED6BD4
+
+
+
+. 2256 FED6BB0 12
+. 71 00 00 03 7D 03 43 78 41 82 00 1C
+==== BB 2257 (0xFED6BD4) approx BBs exec'd 0 ====
+
+ 0xFED6BD4: 7F835040 cmpl cr7,r3,r10
+ 0: GETL R3, t0
+ 1: GETL R10, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFED6BD8: 3CC08080 lis r6,-32640
+ 5: MOVL $0x80800000, t6
+ 6: PUTL t6, R6
+ 7: INCEIPL $4
+
+ 0xFED6BDC: 3CE00101 lis r7,257
+ 8: MOVL $0x1010000, t8
+ 9: PUTL t8, R7
+ 10: INCEIPL $4
+
+ 0xFED6BE0: 60C68080 ori r6,r6,0x8080
+ 11: MOVL $0x80808080, t10
+ 12: PUTL t10, R6
+ 13: INCEIPL $4
+
+ 0xFED6BE4: 60E70101 ori r7,r7,0x101
+ 14: MOVL $0x1010101, t12
+ 15: PUTL t12, R7
+ 16: INCEIPL $4
+
+ 0xFED6BE8: 7C691B78 or r9,r3,r3
+ 17: GETL R3, t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0xFED6BEC: 409C0068 bc 4,28,0xFED6C54
+ 20: Jc28o $0xFED6C54
+
+
+
+. 2257 FED6BD4 28
+. 7F 83 50 40 3C C0 80 80 3C E0 01 01 60 C6 80 80 60 E7 01 01 7C 69 1B 78 40 9C 00 68
+==== BB 2258 (0xFED6BF0) approx BBs exec'd 0 ====
+
+ 0xFED6BF0: 80890000 lwz r4,0(r9)
+ 0: GETL R9, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFED6BF4: 39290004 addi r9,r9,4
+ 4: GETL R9, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xFED6BF8: 7C672050 subf r3,r7,r4
+ 8: GETL R7, t6
+ 9: GETL R4, t8
+ 10: SUBL t6, t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFED6BFC: 7C6B3039 and. r11,r3,r6
+ 13: GETL R3, t10
+ 14: GETL R6, t12
+ 15: ANDL t10, t12
+ 16: PUTL t12, R11
+ 17: CMP0L t12, t14 (-rSo)
+ 18: ICRFL t14, $0x0, CR
+ 19: INCEIPL $4
+
+ 0xFED6C00: 3869FFFC addi r3,r9,-4
+ 20: GETL R9, t16
+ 21: ADDL $0xFFFFFFFC, t16
+ 22: PUTL t16, R3
+ 23: INCEIPL $4
+
+ 0xFED6C04: 7C6B1B78 or r11,r3,r3
+ 24: GETL R3, t18
+ 25: PUTL t18, R11
+ 26: INCEIPL $4
+
+ 0xFED6C08: 41820040 bc 12,2,0xFED6C48
+ 27: Js02o $0xFED6C48
+
+
+
+. 2258 FED6BF0 28
+. 80 89 00 00 39 29 00 04 7C 67 20 50 7C 6B 30 39 38 69 FF FC 7C 6B 1B 78 41 82 00 40
+==== BB 2259 (0xFED6C48) approx BBs exec'd 0 ====
+
+ 0xFED6C48: 7D435378 or r3,r10,r10
+ 0: GETL R10, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED6C4C: 7F895040 cmpl cr7,r9,r10
+ 3: GETL R9, t2
+ 4: GETL R10, t4
+ 5: CMPUL t2, t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFED6C50: 419CFFA0 bc 12,28,0xFED6BF0
+ 8: Js28o $0xFED6BF0
+
+
+
+. 2259 FED6C48 12
+. 7D 43 53 78 7F 89 50 40 41 9C FF A0
+==== BB 2260 (0xFED6C0C) approx BBs exec'd 0 ====
+
+ 0xFED6C0C: 88A9FFFC lbz r5,-4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFED6C10: 2F050000 cmpi cr6,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFED6C14: 419A0040 bc 12,26,0xFED6C54
+ 9: Js26o $0xFED6C54
+
+
+
+. 2260 FED6C0C 12
+. 88 A9 FF FC 2F 05 00 00 41 9A 00 40
+==== BB 2261 (0xFED6C18) approx BBs exec'd 0 ====
+
+ 0xFED6C18: 89830001 lbz r12,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFED6C1C: 3869FFFD addi r3,r9,-3
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFFD, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFED6C20: 2F8C0000 cmpi cr7,r12,0
+ 9: GETL R12, t6
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFED6C24: 419E0030 bc 12,30,0xFED6C54
+ 13: Js30o $0xFED6C54
+
+
+
+. 2261 FED6C18 16
+. 89 83 00 01 38 69 FF FD 2F 8C 00 00 41 9E 00 30
+==== BB 2262 (0xFED6C54) approx BBs exec'd 0 ====
+
+ 0xFED6C54: 7F035040 cmpl cr6,r3,r10
+ 0: GETL R3, t0
+ 1: GETL R10, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFED6C58: 40990008 bc 4,25,0xFED6C60
+ 5: Jc25o $0xFED6C60
+
+
+
+. 2262 FED6C54 8
+. 7F 03 50 40 40 99 00 08
+==== BB 2263 (0xFED6C60) approx BBs exec'd 0 ====
+
+ 0xFED6C60: 7C681850 subf r3,r8,r3
+ 0: GETL R8, t0
+ 1: GETL R3, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFED6C64: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFED6C68: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+
+. 2263 FED6C60 12
+. 7C 68 18 50 38 21 00 10 4E 80 00 20
+==== BB 2264 (0xFED99CC) approx BBs exec'd 0 ====
+
+ 0xFED99CC: 7D23E850 subf r9,r3,r29
+ 0: GETL R3, t0
+ 1: GETL R29, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFED99D0: 7D7F1A14 add r11,r31,r3
+ 5: GETL R31, t4
+ 6: GETL R3, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0xFED99D4: 2B890001 cmpli cr7,r9,1
+ 10: GETL R9, t8
+ 11: MOVL $0x1, t12
+ 12: CMPUL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFED99D8: 3BA9FFFF addi r29,r9,-1
+ 15: GETL R9, t14
+ 16: ADDL $0xFFFFFFFF, t14
+ 17: PUTL t14, R29
+ 18: INCEIPL $4
+
+ 0xFED99DC: 419DFFDC bc 12,29,0xFED99B8
+ 19: Js29o $0xFED99B8
+
+
+
+. 2264 FED99CC 20
+. 7D 23 E8 50 7D 7F 1A 14 2B 89 00 01 3B A9 FF FF 41 9D FF DC
+==== BB 2265 (0xFED99E0) approx BBs exec'd 0 ====
+
+ 0xFED99E0: 80610024 lwz r3,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFED99E4: 83810010 lwz r28,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0xFED99E8: 83A10014 lwz r29,20(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0xFED99EC: 7C6803A6 mtlr r3
+ 15: GETL R3, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFED99F0: 83C10018 lwz r30,24(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x18, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R30
+ 22: INCEIPL $4
+
+ 0xFED99F4: 83E1001C lwz r31,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R31
+ 27: INCEIPL $4
+
+ 0xFED99F8: 38210020 addi r1,r1,32
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: PUTL t22, R1
+ 31: INCEIPL $4
+
+ 0xFED99FC: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+
+. 2265 FED99E0 32
+. 80 61 00 24 83 81 00 10 83 A1 00 14 7C 68 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2266 (0xFE8DA44) approx BBs exec'd 0 ====
+
+ 0xFE8DA44: 3BE0002F li r31,47
+ 0: MOVL $0x2F, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0xFE8DA48: 7C7DD214 add r3,r29,r26
+ 3: GETL R29, t2
+ 4: GETL R26, t4
+ 5: ADDL t2, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE8DA4C: 7EC4B378 or r4,r22,r22
+ 8: GETL R22, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0xFE8DA50: 9BE3FFFF stb r31,-1(r3)
+ 11: GETL R31, t8
+ 12: GETL R3, t10
+ 13: ADDL $0xFFFFFFFF, t10
+ 14: STB t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFE8DA54: 4804A8AD bl 0xFED8300
+ 16: MOVL $0xFE8DA58, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0xFED8300 ($4)
+
+
+
+. 2266 FE8DA44 20
+. 3B E0 00 2F 7C 7D D2 14 7E C4 B3 78 9B E3 FF FF 48 04 A8 AD
+==== BB 2267 (0xFED8394) approx BBs exec'd 0 ====
+
+ 0xFED8394: 88C40000 lbz r6,0(r4)
+ 0: GETL R4, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFED8398: 38630003 addi r3,r3,3
+ 4: GETL R3, t4
+ 5: ADDL $0x3, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED839C: 2C060000 cmpi cr0,r6,0
+ 8: GETL R6, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFED83A0: 41820028 bc 12,2,0xFED83C8
+ 12: Js02o $0xFED83C8
+
+
+
+. 2267 FED8394 16
+. 88 C4 00 00 38 63 00 03 2C 06 00 00 41 82 00 28
+==== BB 2268 (0xFED83A4) approx BBs exec'd 0 ====
+
+ 0xFED83A4: 8D440001 lbzu r10,1(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R4
+ 3: LDB (t0), t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0xFED83A8: 9CC30001 stbu r6,1(r3)
+ 6: GETL R6, t4
+ 7: GETL R3, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R3
+ 10: STB t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFED83AC: 2C0A0000 cmpi cr0,r10,0
+ 12: GETL R10, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFED83B0: 41820020 bc 12,2,0xFED83D0
+ 16: Js02o $0xFED83D0
+
+
+
+. 2268 FED83A4 16
+. 8D 44 00 01 9C C3 00 01 2C 0A 00 00 41 82 00 20
+==== BB 2269 (0xFED83B4) approx BBs exec'd 0 ====
+
+ 0xFED83B4: 60000000 nop
+ 0: NOPo
+ 1: INCEIPL $4
+
+ 0xFED83B8: 8CC40001 lbzu r6,1(r4)
+ 2: GETL R4, t0
+ 3: ADDL $0x1, t0
+ 4: PUTL t0, R4
+ 5: LDB (t0), t2
+ 6: PUTL t2, R6
+ 7: INCEIPL $4
+
+ 0xFED83BC: 9D430001 stbu r10,1(r3)
+ 8: GETL R10, t4
+ 9: GETL R3, t6
+ 10: ADDL $0x1, t6
+ 11: PUTL t6, R3
+ 12: STB t4, (t6)
+ 13: INCEIPL $4
+
+ 0xFED83C0: 2C060000 cmpi cr0,r6,0
+ 14: GETL R6, t8
+ 15: CMP0L t8, t10 (-rSo)
+ 16: ICRFL t10, $0x0, CR
+ 17: INCEIPL $4
+
+ 0xFED83C4: 4082FFE0 bc 4,2,0xFED83A4
+ 18: Jc02o $0xFED83A4
+
+
+
+. 2269 FED83B4 20
+. 60 00 00 00 8C C4 00 01 9D 43 00 01 2C 06 00 00 40 82 FF E0
+==== BB 2270 (0xFED83D0) approx BBs exec'd 0 ====
+
+ 0xFED83D0: 9D430001 stbu r10,1(r3)
+ 0: GETL R10, t0
+ 1: GETL R3, t2
+ 2: ADDL $0x1, t2
+ 3: PUTL t2, R3
+ 4: STB t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED83D4: 4E800020 blr
+ 6: GETL LR, t4
+ 7: JMPo-r t4 ($4)
+
+
+
+. 2270 FED83D0 8
+. 9D 43 00 01 4E 80 00 20
+==== BB 2271 (0xFE8DA58) approx BBs exec'd 0 ====
+
+ 0xFE8DA58: 73000001 andi. r0,r24,0x1
+ 0: GETL R24, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE8DA5C: 408202EC bc 4,2,0xFE8DD48
+ 6: Jc02o $0xFE8DD48
+
+
+
+. 2271 FE8DA58 8
+. 73 00 00 01 40 82 02 EC
+==== BB 2272 (0xFE8DA60) approx BBs exec'd 0 ====
+
+ 0xFE8DA60: 73200001 andi. r0,r25,0x1
+ 0: GETL R25, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE8DA64: 408202CC bc 4,2,0xFE8DD30
+ 6: Jc02o $0xFE8DD30
+
+
+
+. 2272 FE8DA60 8
+. 73 20 00 01 40 82 02 CC
+==== BB 2273 (0xFE8DA68) approx BBs exec'd 0 ====
+
+ 0xFE8DA68: 2F970000 cmpi cr7,r23,0
+ 0: GETL R23, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE8DA6C: 409E02AC bc 4,30,0xFE8DD18
+ 4: Jc30o $0xFE8DD18
+
+
+
+. 2273 FE8DA68 8
+. 2F 97 00 00 40 9E 02 AC
+==== BB 2274 (0xFE8DA70) approx BBs exec'd 0 ====
+
+ 0xFE8DA70: 73600001 andi. r0,r27,0x1
+ 0: GETL R27, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE8DA74: 4082028C bc 4,2,0xFE8DD00
+ 6: Jc02o $0xFE8DD00
+
+
+
+. 2274 FE8DA70 8
+. 73 60 00 01 40 82 02 8C
+==== BB 2275 (0xFE8DA78) approx BBs exec'd 0 ====
+
+ 0xFE8DA78: 9BE30000 stb r31,0(r3)
+ 0: GETL R31, t0
+ 1: GETL R3, t2
+ 2: STB t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE8DA7C: 7E048378 or r4,r16,r16
+ 4: GETL R16, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0xFE8DA80: 38630001 addi r3,r3,1
+ 7: GETL R3, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFE8DA84: 3B600000 li r27,0
+ 11: MOVL $0x0, t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0xFE8DA88: 48048A49 bl 0xFED64D0
+ 14: MOVL $0xFE8DA8C, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFED64D0 ($4)
+
+
+
+. 2275 FE8DA78 20
+. 9B E3 00 00 7E 04 83 78 38 63 00 01 3B 60 00 00 48 04 8A 49
+==== BB 2276 strcpy(0xFED64D0) approx BBs exec'd 0 ====
+
+ 0xFED64D0: 7C801B78 or r0,r4,r3
+ 0: GETL R4, t0
+ 1: GETL R3, t2
+ 2: ORL t2, t0
+ 3: PUTL t0, R0
+ 4: INCEIPL $4
+
+ 0xFED64D4: 540007BF rlwinm. r0,r0,0,30,31
+ 5: GETL R0, t4
+ 6: ANDL $0x3, t4
+ 7: PUTL t4, R0
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0xFED64D8: 38A3FFFC addi r5,r3,-4
+ 11: GETL R3, t8
+ 12: ADDL $0xFFFFFFFC, t8
+ 13: PUTL t8, R5
+ 14: INCEIPL $4
+
+ 0xFED64DC: 40820088 bc 4,2,0xFED6564
+ 15: Jc02o $0xFED6564
+
+
+
+. 2276 FED64D0 16
+. 7C 80 1B 78 54 00 07 BF 38 A3 FF FC 40 82 00 88
+==== BB 2277 (0xFED6564) approx BBs exec'd 0 ====
+
+ 0xFED6564: 88C40000 lbz r6,0(r4)
+ 0: GETL R4, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFED6568: 38A3FFFF addi r5,r3,-1
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFED656C: 2C060000 cmpi cr0,r6,0
+ 8: GETL R6, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFED6570: 41820028 bc 12,2,0xFED6598
+ 12: Js02o $0xFED6598
+
+
+
+. 2277 FED6564 16
+. 88 C4 00 00 38 A3 FF FF 2C 06 00 00 41 82 00 28
+==== BB 2278 (0xFED6574) approx BBs exec'd 0 ====
+
+ 0xFED6574: 8D440001 lbzu r10,1(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R4
+ 3: LDB (t0), t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0xFED6578: 9CC50001 stbu r6,1(r5)
+ 6: GETL R6, t4
+ 7: GETL R5, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R5
+ 10: STB t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFED657C: 2C0A0000 cmpi cr0,r10,0
+ 12: GETL R10, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFED6580: 41820020 bc 12,2,0xFED65A0
+ 16: Js02o $0xFED65A0
+
+
+
+. 2278 FED6574 16
+. 8D 44 00 01 9C C5 00 01 2C 0A 00 00 41 82 00 20
+==== BB 2279 (0xFED6584) approx BBs exec'd 0 ====
+
+ 0xFED6584: 60000000 nop
+ 0: NOPo
+ 1: INCEIPL $4
+
+ 0xFED6588: 8CC40001 lbzu r6,1(r4)
+ 2: GETL R4, t0
+ 3: ADDL $0x1, t0
+ 4: PUTL t0, R4
+ 5: LDB (t0), t2
+ 6: PUTL t2, R6
+ 7: INCEIPL $4
+
+ 0xFED658C: 9D450001 stbu r10,1(r5)
+ 8: GETL R10, t4
+ 9: GETL R5, t6
+ 10: ADDL $0x1, t6
+ 11: PUTL t6, R5
+ 12: STB t4, (t6)
+ 13: INCEIPL $4
+
+ 0xFED6590: 2C060000 cmpi cr0,r6,0
+ 14: GETL R6, t8
+ 15: CMP0L t8, t10 (-rSo)
+ 16: ICRFL t10, $0x0, CR
+ 17: INCEIPL $4
+
+ 0xFED6594: 4082FFE0 bc 4,2,0xFED6574
+ 18: Jc02o $0xFED6574
+
+
+
+. 2279 FED6584 20
+. 60 00 00 00 8C C4 00 01 9D 45 00 01 2C 06 00 00 40 82 FF E0
+==== BB 2280 (0xFED6598) approx BBs exec'd 0 ====
+
+ 0xFED6598: 98C50001 stb r6,1(r5)
+ 0: GETL R6, t0
+ 1: GETL R5, t2
+ 2: ADDL $0x1, t2
+ 3: STB t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFED659C: 4E800020 blr
+ 5: GETL LR, t4
+ 6: JMPo-r t4 ($4)
+
+
+
+. 2280 FED6598 8
+. 98 C5 00 01 4E 80 00 20
+==== BB 2281 (0xFE8DA8C) approx BBs exec'd 0 ====
+
+ 0xFE8DA8C: 83F20000 lwz r31,0(r18)
+ 0: GETL R18, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R31
+ 3: INCEIPL $4
+
+ 0xFE8DA90: 2C9F0000 cmpi cr1,r31,0
+ 4: GETL R31, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFE8DA94: 41860038 bc 12,6,0xFE8DACC
+ 8: Js06o $0xFE8DACC
+
+
+
+. 2281 FE8DA8C 12
+. 83 F2 00 00 2C 9F 00 00 41 86 00 38
+==== BB 2282 (0xFE8DACC) approx BBs exec'd 0 ====
+
+ 0xFE8DACC: 80010080 lwz r0,128(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x80, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE8DAD0: 317FFFFF addic r11,r31,-1
+ 5: GETL R31, t4
+ 6: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0xFE8DAD4: 7D8BF910 subfe r12,r11,r31
+ 9: GETL R11, t6
+ 10: GETL R31, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0xFE8DAD8: 21200000 subfic r9,r0,0
+ 14: GETL R0, t10
+ 15: MOVL $0x0, t12
+ 16: SBBL t10, t12 (-wCa)
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0xFE8DADC: 7F090114 adde r24,r9,r0
+ 19: GETL R9, t14
+ 20: GETL R0, t16
+ 21: ADCL t14, t16 (-rCa-wCa)
+ 22: PUTL t16, R24
+ 23: INCEIPL $4
+
+ 0xFE8DAE0: 7D8BC379 or. r11,r12,r24
+ 24: GETL R12, t18
+ 25: GETL R24, t20
+ 26: ORL t20, t18
+ 27: PUTL t18, R11
+ 28: CMP0L t18, t22 (-rSo)
+ 29: ICRFL t22, $0x0, CR
+ 30: INCEIPL $4
+
+ 0xFE8DAE4: 4182007C bc 12,2,0xFE8DB60
+ 31: Js02o $0xFE8DB60
+
+
+
+. 2282 FE8DACC 28
+. 80 01 00 80 31 7F FF FF 7D 8B F9 10 21 20 00 00 7F 09 01 14 7D 8B C3 79 41 82 00 7C
+==== BB 2283 (0xFE8DAE8) approx BBs exec'd 0 ====
+
+ 0xFE8DAE8: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8DAEC: 4811C845 bl 0xFFAA330
+ 3: MOVL $0xFE8DAF0, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFFAA330 ($4)
+
+
+
+. 2283 FE8DAE8 8
+. 7F A3 EB 78 48 11 C8 45
+==== BB 2284 (0xFE8DAF0) approx BBs exec'd 0 ====
+
+ 0xFE8DAF0: 7FE0FB78 or r0,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE8DAF4: 82610074 lwz r19,116(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x74, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R19
+ 7: INCEIPL $4
+
+ 0xFE8DAF8: 7C030378 or r3,r0,r0
+ 8: GETL R0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFE8DAFC: 81210024 lwz r9,36(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x24, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0xFE8DB00: 7E6803A6 mtlr r19
+ 16: GETL R19, t12
+ 17: PUTL t12, LR
+ 18: INCEIPL $4
+
+ 0xFE8DB04: 81C10028 lwz r14,40(r1)
+ 19: GETL R1, t14
+ 20: ADDL $0x28, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R14
+ 23: INCEIPL $4
+
+ 0xFE8DB08: 81E1002C lwz r15,44(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x2C, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R15
+ 28: INCEIPL $4
+
+ 0xFE8DB0C: 7D208120 mtcrf 0x8,r9
+ 29: GETL R9, t22
+ 30: ICRFL t22, $0x4, CR
+ 31: INCEIPL $4
+
+ 0xFE8DB10: 82010030 lwz r16,48(r1)
+ 32: GETL R1, t24
+ 33: ADDL $0x30, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R16
+ 36: INCEIPL $4
+
+ 0xFE8DB14: 82210034 lwz r17,52(r1)
+ 37: GETL R1, t28
+ 38: ADDL $0x34, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R17
+ 41: INCEIPL $4
+
+ 0xFE8DB18: 82410038 lwz r18,56(r1)
+ 42: GETL R1, t32
+ 43: ADDL $0x38, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R18
+ 46: INCEIPL $4
+
+ 0xFE8DB1C: 8261003C lwz r19,60(r1)
+ 47: GETL R1, t36
+ 48: ADDL $0x3C, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R19
+ 51: INCEIPL $4
+
+ 0xFE8DB20: 82810040 lwz r20,64(r1)
+ 52: GETL R1, t40
+ 53: ADDL $0x40, t40
+ 54: LDL (t40), t42
+ 55: PUTL t42, R20
+ 56: INCEIPL $4
+
+ 0xFE8DB24: 82A10044 lwz r21,68(r1)
+ 57: GETL R1, t44
+ 58: ADDL $0x44, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R21
+ 61: INCEIPL $4
+
+ 0xFE8DB28: 82C10048 lwz r22,72(r1)
+ 62: GETL R1, t48
+ 63: ADDL $0x48, t48
+ 64: LDL (t48), t50
+ 65: PUTL t50, R22
+ 66: INCEIPL $4
+
+ 0xFE8DB2C: 82E1004C lwz r23,76(r1)
+ 67: GETL R1, t52
+ 68: ADDL $0x4C, t52
+ 69: LDL (t52), t54
+ 70: PUTL t54, R23
+ 71: INCEIPL $4
+
+ 0xFE8DB30: 83010050 lwz r24,80(r1)
+ 72: GETL R1, t56
+ 73: ADDL $0x50, t56
+ 74: LDL (t56), t58
+ 75: PUTL t58, R24
+ 76: INCEIPL $4
+
+ 0xFE8DB34: 83210054 lwz r25,84(r1)
+ 77: GETL R1, t60
+ 78: ADDL $0x54, t60
+ 79: LDL (t60), t62
+ 80: PUTL t62, R25
+ 81: INCEIPL $4
+
+ 0xFE8DB38: 83410058 lwz r26,88(r1)
+ 82: GETL R1, t64
+ 83: ADDL $0x58, t64
+ 84: LDL (t64), t66
+ 85: PUTL t66, R26
+ 86: INCEIPL $4
+
+ 0xFE8DB3C: 8361005C lwz r27,92(r1)
+ 87: GETL R1, t68
+ 88: ADDL $0x5C, t68
+ 89: LDL (t68), t70
+ 90: PUTL t70, R27
+ 91: INCEIPL $4
+
+ 0xFE8DB40: 83810060 lwz r28,96(r1)
+ 92: GETL R1, t72
+ 93: ADDL $0x60, t72
+ 94: LDL (t72), t74
+ 95: PUTL t74, R28
+ 96: INCEIPL $4
+
+ 0xFE8DB44: 83A10064 lwz r29,100(r1)
+ 97: GETL R1, t76
+ 98: ADDL $0x64, t76
+ 99: LDL (t76), t78
+ 100: PUTL t78, R29
+ 101: INCEIPL $4
+
+ 0xFE8DB48: 83C10068 lwz r30,104(r1)
+ 102: GETL R1, t80
+ 103: ADDL $0x68, t80
+ 104: LDL (t80), t82
+ 105: PUTL t82, R30
+ 106: INCEIPL $4
+
+ 0xFE8DB4C: 83E1006C lwz r31,108(r1)
+ 107: GETL R1, t84
+ 108: ADDL $0x6C, t84
+ 109: LDL (t84), t86
+ 110: PUTL t86, R31
+ 111: INCEIPL $4
+
+ 0xFE8DB50: 38210070 addi r1,r1,112
+ 112: GETL R1, t88
+ 113: ADDL $0x70, t88
+ 114: PUTL t88, R1
+ 115: INCEIPL $4
+
+ 0xFE8DB54: 4E800020 blr
+ 116: GETL LR, t90
+ 117: JMPo-r t90 ($4)
+
+
+
+. 2284 FE8DAF0 104
+. 7F E0 FB 78 82 61 00 74 7C 03 03 78 81 21 00 24 7E 68 03 A6 81 C1 00 28 81 E1 00 2C 7D 20 81 20 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
+==== BB 2285 (0xFE8B794) approx BBs exec'd 0 ====
+
+ 0xFE8B794: 801C00A8 lwz r0,168(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0xA8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE8B798: 7C7F1B78 or r31,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0xFE8B79C: 2C000000 cmpi cr0,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFE8B7A0: 408200C4 bc 4,2,0xFE8B864
+ 12: Jc02o $0xFE8B864
+
+
+
+. 2285 FE8B794 16
+. 80 1C 00 A8 7C 7F 1B 78 2C 00 00 00 40 82 00 C4
+==== BB 2286 (0xFE8B7A4) approx BBs exec'd 0 ====
+
+ 0xFE8B7A4: 2C9F0000 cmpi cr1,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE8B7A8: 418600F8 bc 12,6,0xFE8B8A0
+ 4: Js06o $0xFE8B8A0
+
+
+
+. 2286 FE8B7A4 8
+. 2C 9F 00 00 41 86 00 F8
+==== BB 2287 (0xFE8B8A0) approx BBs exec'd 0 ====
+
+ 0xFE8B8A0: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8B8A4: 48001C8D bl 0xFE8D530
+ 3: MOVL $0xFE8B8A8, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFE8D530 ($4)
+
+
+
+. 2287 FE8B8A0 8
+. 7F 43 D3 78 48 00 1C 8D
+==== BB 2288 _nl_expand_alias(0xFE8D530) approx BBs exec'd 0 ====
+
+ 0xFE8D530: 9421FFC0 stwu r1,-64(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFC0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE8D534: 7C8802A6 mflr r4
+ 6: GETL LR, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFE8D538: 4811A919 bl 0xFFA7E50
+ 9: MOVL $0xFE8D53C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2288 FE8D530 12
+. 94 21 FF C0 7C 88 02 A6 48 11 A9 19
+==== BB 2289 (0xFE8D53C) approx BBs exec'd 0 ====
+
+ 0xFE8D53C: 93C10038 stw r30,56(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x38, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE8D540: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE8D544: 92C10018 stw r22,24(r1)
+ 8: GETL R22, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x18, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE8D548: 93410028 stw r26,40(r1)
+ 13: GETL R26, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x28, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE8D54C: 3AC00000 li r22,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R22
+ 20: INCEIPL $4
+
+ 0xFE8D550: 9361002C stw r27,44(r1)
+ 21: GETL R27, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x2C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE8D554: 7C7A1B78 or r26,r3,r3
+ 26: GETL R3, t20
+ 27: PUTL t20, R26
+ 28: INCEIPL $4
+
+ 0xFE8D558: 92E1001C stw r23,28(r1)
+ 29: GETL R23, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x1C, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFE8D55C: 38000001 li r0,1
+ 34: MOVL $0x1, t26
+ 35: PUTL t26, R0
+ 36: INCEIPL $4
+
+ 0xFE8D560: 93010020 stw r24,32(r1)
+ 37: GETL R24, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x20, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFE8D564: 93210024 stw r25,36(r1)
+ 42: GETL R25, t32
+ 43: GETL R1, t34
+ 44: ADDL $0x24, t34
+ 45: STL t32, (t34)
+ 46: INCEIPL $4
+
+ 0xFE8D568: 93810030 stw r28,48(r1)
+ 47: GETL R28, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x30, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0xFE8D56C: 93A10034 stw r29,52(r1)
+ 52: GETL R29, t40
+ 53: GETL R1, t42
+ 54: ADDL $0x34, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0xFE8D570: 93E1003C stw r31,60(r1)
+ 57: GETL R31, t44
+ 58: GETL R1, t46
+ 59: ADDL $0x3C, t46
+ 60: STL t44, (t46)
+ 61: INCEIPL $4
+
+ 0xFE8D574: 90810044 stw r4,68(r1)
+ 62: GETL R4, t48
+ 63: GETL R1, t50
+ 64: ADDL $0x44, t50
+ 65: STL t48, (t50)
+ 66: INCEIPL $4
+
+ 0xFE8D578: 837E0204 lwz r27,516(r30)
+ 67: GETL R30, t52
+ 68: ADDL $0x204, t52
+ 69: LDL (t52), t54
+ 70: PUTL t54, R27
+ 71: INCEIPL $4
+
+ 0xFE8D57C: 7D20D828 lwarx r9,r0,r27
+ 72: GETL R27, t56
+ 73: LOCKo
+ 74: LDL (t56), t58
+ 75: PUTL t58, R9
+ 76: INCEIPL $4
+
+ 0xFE8D580: 7C09B000 cmp cr0,r9,r22
+ 77: GETL R9, t60
+ 78: GETL R22, t62
+ 79: CMPL t60, t62, t64 (-rSo)
+ 80: ICRFL t64, $0x0, CR
+ 81: INCEIPL $4
+
+ 0xFE8D584: 4082000C bc 4,2,0xFE8D590
+ 82: Jc02o $0xFE8D590
+
+
+
+. 2289 FE8D53C 76
+. 93 C1 00 38 7F C8 02 A6 92 C1 00 18 93 41 00 28 3A C0 00 00 93 61 00 2C 7C 7A 1B 78 92 E1 00 1C 38 00 00 01 93 01 00 20 93 21 00 24 93 81 00 30 93 A1 00 34 93 E1 00 3C 90 81 00 44 83 7E 02 04 7D 20 D8 28 7C 09 B0 00 40 82 00 0C
+==== BB 2290 (0xFE8D588) approx BBs exec'd 0 ====
+
+ 0xFE8D588: 7C00D92D stwcx. r0,r0,r27
+ 0: GETL R27, t0
+ 1: GETL R0, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE8D58C: 40A2FFF0 bc 5,2,0xFE8D57C
+ 6: Jc02o $0xFE8D57C
+
+
+
+. 2290 FE8D588 8
+. 7C 00 D9 2D 40 A2 FF F0
+==== BB 2291 (0xFE8D57C) approx BBs exec'd 0 ====
+
+ 0xFE8D57C: 7D20D828 lwarx r9,r0,r27
+ 0: GETL R27, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE8D580: 7C09B000 cmp cr0,r9,r22
+ 5: GETL R9, t4
+ 6: GETL R22, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFE8D584: 4082000C bc 4,2,0xFE8D590
+ 10: Jc02o $0xFE8D590
+
+
+
+. 2291 FE8D57C 12
+. 7D 20 D8 28 7C 09 B0 00 40 82 00 0C
+==== BB 2292 (0xFE8D590) approx BBs exec'd 0 ====
+
+ 0xFE8D590: 4C00012C 0: INCEIPL $4
+
+ 0xFE8D594: 2F890000 cmpi cr7,r9,0
+ 1: GETL R9, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE8D598: 409E01D8 bc 4,30,0xFE8D770
+ 5: Jc30o $0xFE8D770
+
+
+
+. 2292 FE8D590 12
+. 4C 00 01 2C 2F 89 00 00 40 9E 01 D8
+==== BB 2293 (0xFE8D59C) approx BBs exec'd 0 ====
+
+ 0xFE8D59C: 82FE0200 lwz r23,512(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x200, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0xFE8D5A0: 833E01F0 lwz r25,496(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1F0, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0xFE8D5A4: 7EF8BB78 or r24,r23,r23
+ 10: GETL R23, t8
+ 11: PUTL t8, R24
+ 12: INCEIPL $4
+
+ 0xFE8D5A8: 80B90000 lwz r5,0(r25)
+ 13: GETL R25, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R5
+ 16: INCEIPL $4
+
+ 0xFE8D5AC: 93410008 stw r26,8(r1)
+ 17: GETL R26, t14
+ 18: GETL R1, t16
+ 19: ADDL $0x8, t16
+ 20: STL t14, (t16)
+ 21: INCEIPL $4
+
+ 0xFE8D5B0: 2C050000 cmpi cr0,r5,0
+ 22: GETL R5, t18
+ 23: CMP0L t18, t20 (-rSo)
+ 24: ICRFL t20, $0x0, CR
+ 25: INCEIPL $4
+
+ 0xFE8D5B4: 40820124 bc 4,2,0xFE8D6D8
+ 26: Jc02o $0xFE8D6D8
+
+
+
+. 2293 FE8D59C 28
+. 82 FE 02 00 83 3E 01 F0 7E F8 BB 78 80 B9 00 00 93 41 00 08 2C 05 00 00 40 82 01 24
+==== BB 2294 (0xFE8D5B8) approx BBs exec'd 0 ====
+
+ 0xFE8D5B8: 80D80000 lwz r6,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFE8D5BC: 7F1CC378 or r28,r24,r24
+ 4: GETL R24, t4
+ 5: PUTL t4, R28
+ 6: INCEIPL $4
+
+ 0xFE8D5C0: 39000000 li r8,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0xFE8D5C4: 88A60000 lbz r5,0(r6)
+ 10: GETL R6, t8
+ 11: LDB (t8), t10
+ 12: PUTL t10, R5
+ 13: INCEIPL $4
+
+ 0xFE8D5C8: 2F050000 cmpi cr6,r5,0
+ 14: GETL R5, t12
+ 15: CMP0L t12, t14 (-rSo)
+ 16: ICRFL t14, $0x6, CR
+ 17: INCEIPL $4
+
+ 0xFE8D5CC: 419A0094 bc 12,26,0xFE8D660
+ 18: Js26o $0xFE8D660
+
+
+
+. 2294 FE8D5B8 24
+. 80 D8 00 00 7F 1C C3 78 39 00 00 00 88 A6 00 00 2F 05 00 00 41 9A 00 94
+==== BB 2295 (0xFE8D5D0) approx BBs exec'd 0 ====
+
+ 0xFE8D5D0: 7EFDBB78 or r29,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFE8D5D4: 815C0000 lwz r10,0(r28)
+ 3: GETL R28, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R10
+ 6: INCEIPL $4
+
+ 0xFE8D5D8: 88EA0000 lbz r7,0(r10)
+ 7: GETL R10, t6
+ 8: LDB (t6), t8
+ 9: PUTL t8, R7
+ 10: INCEIPL $4
+
+ 0xFE8D5DC: 2F87003A cmpi cr7,r7,58
+ 11: GETL R7, t10
+ 12: MOVL $0x3A, t14
+ 13: CMPL t10, t14, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0xFE8D5E0: 409E001C bc 4,30,0xFE8D5FC
+ 16: Jc30o $0xFE8D5FC
+
+
+
+. 2295 FE8D5D0 20
+. 7E FD BB 78 81 5C 00 00 88 EA 00 00 2F 87 00 3A 40 9E 00 1C
+==== BB 2296 (0xFE8D5FC) approx BBs exec'd 0 ====
+
+ 0xFE8D5FC: 807C0000 lwz r3,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE8D600: 7F8AE378 or r10,r28,r28
+ 4: GETL R28, t4
+ 5: PUTL t4, R10
+ 6: INCEIPL $4
+
+ 0xFE8D604: 88030000 lbz r0,0(r3)
+ 7: GETL R3, t6
+ 8: LDB (t6), t8
+ 9: PUTL t8, R0
+ 10: INCEIPL $4
+
+ 0xFE8D608: 2F800000 cmpi cr7,r0,0
+ 11: GETL R0, t10
+ 12: CMP0L t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFE8D60C: 419E002C bc 12,30,0xFE8D638
+ 15: Js30o $0xFE8D638
+
+
+
+. 2296 FE8D5FC 20
+. 80 7C 00 00 7F 8A E3 78 88 03 00 00 2F 80 00 00 41 9E 00 2C
+==== BB 2297 (0xFE8D610) approx BBs exec'd 0 ====
+
+ 0xFE8D610: 2C00003A cmpi cr0,r0,58
+ 0: GETL R0, t0
+ 1: MOVL $0x3A, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8D614: 41820024 bc 12,2,0xFE8D638
+ 5: Js02o $0xFE8D638
+
+
+
+. 2297 FE8D610 8
+. 2C 00 00 3A 41 82 00 24
+==== BB 2298 (0xFE8D618) approx BBs exec'd 0 ====
+
+ 0xFE8D618: 808A0000 lwz r4,0(r10)
+ 0: GETL R10, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFE8D61C: 38040001 addi r0,r4,1
+ 4: GETL R4, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFE8D620: 900A0000 stw r0,0(r10)
+ 8: GETL R0, t6
+ 9: GETL R10, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFE8D624: 89240001 lbz r9,1(r4)
+ 12: GETL R4, t10
+ 13: ADDL $0x1, t10
+ 14: LDB (t10), t12
+ 15: PUTL t12, R9
+ 16: INCEIPL $4
+
+ 0xFE8D628: 2C890000 cmpi cr1,r9,0
+ 17: GETL R9, t14
+ 18: CMP0L t14, t16 (-rSo)
+ 19: ICRFL t16, $0x1, CR
+ 20: INCEIPL $4
+
+ 0xFE8D62C: 2F09003A cmpi cr6,r9,58
+ 21: GETL R9, t18
+ 22: MOVL $0x3A, t22
+ 23: CMPL t18, t22, t20 (-rSo)
+ 24: ICRFL t20, $0x6, CR
+ 25: INCEIPL $4
+
+ 0xFE8D630: 41860008 bc 12,6,0xFE8D638
+ 26: Js06o $0xFE8D638
+
+
+
+. 2298 FE8D618 28
+. 80 8A 00 00 38 04 00 01 90 0A 00 00 89 24 00 01 2C 89 00 00 2F 09 00 3A 41 86 00 08
+==== BB 2299 (0xFE8D634) approx BBs exec'd 0 ====
+
+ 0xFE8D634: 409AFFE4 bc 4,26,0xFE8D618
+ 0: Jc26o $0xFE8D618
+
+
+
+. 2299 FE8D634 4
+. 40 9A FF E4
+==== BB 2300 (0xFE8D638) approx BBs exec'd 0 ====
+
+ 0xFE8D638: 809C0000 lwz r4,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFE8D63C: 7F9FE378 or r31,r28,r28
+ 4: GETL R28, t4
+ 5: PUTL t4, R31
+ 6: INCEIPL $4
+
+ 0xFE8D640: 2C080000 cmpi cr0,r8,0
+ 7: GETL R8, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x0, CR
+ 10: INCEIPL $4
+
+ 0xFE8D644: 7F032040 cmpl cr6,r3,r4
+ 11: GETL R3, t10
+ 12: GETL R4, t12
+ 13: CMPUL t10, t12, t14 (-rSo)
+ 14: ICRFL t14, $0x6, CR
+ 15: INCEIPL $4
+
+ 0xFE8D648: 41980070 bc 12,24,0xFE8D6B8
+ 16: Js24o $0xFE8D6B8
+
+
+
+. 2300 FE8D638 20
+. 80 9C 00 00 7F 9F E3 78 2C 08 00 00 7F 03 20 40 41 98 00 70
+==== BB 2301 (0xFE8D6B8) approx BBs exec'd 0 ====
+
+ 0xFE8D6B8: 7C832050 subf r4,r3,r4
+ 0: GETL R3, t0
+ 1: GETL R4, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE8D6BC: 4BFFF8F1 bl 0xFE8CFAC
+ 5: MOVL $0xFE8D6C0, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0xFE8CFAC ($4)
+
+
+
+. 2301 FE8D6B8 8
+. 7C 83 20 50 4B FF F8 F1
+==== BB 2302 read_alias_file(0xFE8CFAC) approx BBs exec'd 0 ====
+
+ 0xFE8CFAC: 9421FDF0 stwu r1,-528(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFDF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE8CFB0: 7CA802A6 mflr r5
+ 6: GETL LR, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFE8CFB4: 91C101C8 stw r14,456(r1)
+ 9: GETL R14, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFE8CFB8: 39C4002C addi r14,r4,44
+ 14: GETL R4, t10
+ 15: ADDL $0x2C, t10
+ 16: PUTL t10, R14
+ 17: INCEIPL $4
+
+ 0xFE8CFBC: 55CC0036 rlwinm r12,r14,0,0,27
+ 18: GETL R14, t12
+ 19: ANDL $0xFFFFFFF0, t12
+ 20: PUTL t12, R12
+ 21: INCEIPL $4
+
+ 0xFE8CFC0: 80E10000 lwz r7,0(r1)
+ 22: GETL R1, t14
+ 23: LDL (t14), t16
+ 24: PUTL t16, R7
+ 25: INCEIPL $4
+
+ 0xFE8CFC4: 7CCC00D0 neg r6,r12
+ 26: GETL R12, t18
+ 27: NEGL t18
+ 28: PUTL t18, R6
+ 29: INCEIPL $4
+
+ 0xFE8CFC8: 936101FC stw r27,508(r1)
+ 30: GETL R27, t20
+ 31: GETL R1, t22
+ 32: ADDL $0x1FC, t22
+ 33: STL t20, (t22)
+ 34: INCEIPL $4
+
+ 0xFE8CFCC: 93A10204 stw r29,516(r1)
+ 35: GETL R29, t24
+ 36: GETL R1, t26
+ 37: ADDL $0x204, t26
+ 38: STL t24, (t26)
+ 39: INCEIPL $4
+
+ 0xFE8CFD0: 4811AE81 bl 0xFFA7E50
+ 40: MOVL $0xFE8CFD4, t28
+ 41: PUTL t28, LR
+ 42: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2302 FE8CFAC 40
+. 94 21 FD F0 7C A8 02 A6 91 C1 01 C8 39 C4 00 2C 55 CC 00 36 80 E1 00 00 7C CC 00 D0 93 61 01 FC 93 A1 02 04 48 11 AE 81
+==== BB 2303 (0xFE8CFD4) approx BBs exec'd 0 ====
+
+ 0xFE8CFD4: 93C10208 stw r30,520(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x208, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE8CFD8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE8CFDC: 93E1020C stw r31,524(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x20C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE8CFE0: 7C3F0B78 or r31,r1,r1
+ 13: GETL R1, t10
+ 14: PUTL t10, R31
+ 15: INCEIPL $4
+
+ 0xFE8CFE4: 90A10214 stw r5,532(r1)
+ 16: GETL R5, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x214, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFE8CFE8: 7C852378 or r5,r4,r4
+ 21: GETL R4, t16
+ 22: PUTL t16, R5
+ 23: INCEIPL $4
+
+ 0xFE8CFEC: 91E101CC stw r15,460(r1)
+ 24: GETL R15, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x1CC, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xFE8CFF0: 920101D0 stw r16,464(r1)
+ 29: GETL R16, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x1D0, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFE8CFF4: 922101D4 stw r17,468(r1)
+ 34: GETL R17, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x1D4, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFE8CFF8: 924101D8 stw r18,472(r1)
+ 39: GETL R18, t30
+ 40: GETL R1, t32
+ 41: ADDL $0x1D8, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFE8CFFC: 926101DC stw r19,476(r1)
+ 44: GETL R19, t34
+ 45: GETL R1, t36
+ 46: ADDL $0x1DC, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0xFE8D000: 928101E0 stw r20,480(r1)
+ 49: GETL R20, t38
+ 50: GETL R1, t40
+ 51: ADDL $0x1E0, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0xFE8D004: 92A101E4 stw r21,484(r1)
+ 54: GETL R21, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x1E4, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0xFE8D008: 92C101E8 stw r22,488(r1)
+ 59: GETL R22, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x1E8, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0xFE8D00C: 92E101EC stw r23,492(r1)
+ 64: GETL R23, t50
+ 65: GETL R1, t52
+ 66: ADDL $0x1EC, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0xFE8D010: 930101F0 stw r24,496(r1)
+ 69: GETL R24, t54
+ 70: GETL R1, t56
+ 71: ADDL $0x1F0, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0xFE8D014: 932101F4 stw r25,500(r1)
+ 74: GETL R25, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x1F4, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0xFE8D018: 934101F8 stw r26,504(r1)
+ 79: GETL R26, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x1F8, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0xFE8D01C: 93810200 stw r28,512(r1)
+ 84: GETL R28, t66
+ 85: GETL R1, t68
+ 86: ADDL $0x200, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0xFE8D020: 7CE1316E stwux r7,r1,r6
+ 89: GETL R6, t70
+ 90: GETL R1, t72
+ 91: ADDL t72, t70
+ 92: PUTL t70, R1
+ 93: GETL R7, t74
+ 94: STL t74, (t70)
+ 95: INCEIPL $4
+
+ 0xFE8D024: 38810017 addi r4,r1,23
+ 96: GETL R1, t76
+ 97: ADDL $0x17, t76
+ 98: PUTL t76, R4
+ 99: INCEIPL $4
+
+ 0xFE8D028: 549D0036 rlwinm r29,r4,0,0,27
+ 100: GETL R4, t78
+ 101: ANDL $0xFFFFFFF0, t78
+ 102: PUTL t78, R29
+ 103: INCEIPL $4
+
+ 0xFE8D02C: 7C641B78 or r4,r3,r3
+ 104: GETL R3, t80
+ 105: PUTL t80, R4
+ 106: INCEIPL $4
+
+ 0xFE8D030: 7FA3EB78 or r3,r29,r29
+ 107: GETL R29, t82
+ 108: PUTL t82, R3
+ 109: INCEIPL $4
+
+ 0xFE8D034: 4804AFCD bl 0xFED8000
+ 110: MOVL $0xFE8D038, t84
+ 111: PUTL t84, LR
+ 112: JMPo-c $0xFED8000 ($4)
+
+
+
+. 2303 FE8CFD4 100
+. 93 C1 02 08 7F C8 02 A6 93 E1 02 0C 7C 3F 0B 78 90 A1 02 14 7C 85 23 78 91 E1 01 CC 92 01 01 D0 92 21 01 D4 92 41 01 D8 92 61 01 DC 92 81 01 E0 92 A1 01 E4 92 C1 01 E8 92 E1 01 EC 93 01 01 F0 93 21 01 F4 93 41 01 F8 93 81 02 00 7C E1 31 6E 38 81 00 17 54 9D 00 36 7C 64 1B 78 7F A3 EB 78 48 04 AF CD
+==== BB 2304 (0xFE8D038) approx BBs exec'd 0 ====
+
+ 0xFE8D038: 813E01EC lwz r9,492(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1EC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE8D03C: 809E0208 lwz r4,520(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x208, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFE8D040: A009000C lhz r0,12(r9)
+ 10: GETL R9, t8
+ 11: ADDL $0xC, t8
+ 12: LDW (t8), t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0xFE8D044: 81690000 lwz r11,0(r9)
+ 15: GETL R9, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R11
+ 18: INCEIPL $4
+
+ 0xFE8D048: 81490004 lwz r10,4(r9)
+ 19: GETL R9, t16
+ 20: ADDL $0x4, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R10
+ 23: INCEIPL $4
+
+ 0xFE8D04C: 81090008 lwz r8,8(r9)
+ 24: GETL R9, t20
+ 25: ADDL $0x8, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R8
+ 28: INCEIPL $4
+
+ 0xFE8D050: B003000C sth r0,12(r3)
+ 29: GETL R0, t24
+ 30: GETL R3, t26
+ 31: ADDL $0xC, t26
+ 32: STW t24, (t26)
+ 33: INCEIPL $4
+
+ 0xFE8D054: 91630000 stw r11,0(r3)
+ 34: GETL R11, t28
+ 35: GETL R3, t30
+ 36: STL t28, (t30)
+ 37: INCEIPL $4
+
+ 0xFE8D058: 91430004 stw r10,4(r3)
+ 38: GETL R10, t32
+ 39: GETL R3, t34
+ 40: ADDL $0x4, t34
+ 41: STL t32, (t34)
+ 42: INCEIPL $4
+
+ 0xFE8D05C: 91030008 stw r8,8(r3)
+ 43: GETL R8, t36
+ 44: GETL R3, t38
+ 45: ADDL $0x8, t38
+ 46: STL t36, (t38)
+ 47: INCEIPL $4
+
+ 0xFE8D060: 7FA3EB78 or r3,r29,r29
+ 48: GETL R29, t40
+ 49: PUTL t40, R3
+ 50: INCEIPL $4
+
+ 0xFE8D064: 4802F531 bl 0xFEBC594
+ 51: MOVL $0xFE8D068, t42
+ 52: PUTL t42, LR
+ 53: JMPo-c $0xFEBC594 ($4)
+
+
+
+. 2304 FE8D038 48
+. 81 3E 01 EC 80 9E 02 08 A0 09 00 0C 81 69 00 00 81 49 00 04 81 09 00 08 B0 03 00 0C 91 63 00 00 91 43 00 04 91 03 00 08 7F A3 EB 78 48 02 F5 31
+==== BB 2305 _IO_fopen@@GLIBC_2.1(0xFEBC594) approx BBs exec'd 0 ====
+
+ 0xFEBC594: 7CA802A6 mflr r5
+ 0: GETL LR, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFEBC598: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEBC59C: 90A10014 stw r5,20(r1)
+ 9: GETL R5, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEBC5A0: 38A00001 li r5,1
+ 14: MOVL $0x1, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0xFEBC5A4: 4BFFFF15 bl 0xFEBC4B8
+ 17: MOVL $0xFEBC5A8, t12
+ 18: PUTL t12, LR
+ 19: JMPo-c $0xFEBC4B8 ($4)
+
+
+
+. 2305 FEBC594 20
+. 7C A8 02 A6 94 21 FF F0 90 A1 00 14 38 A0 00 01 4B FF FF 15
+==== BB 2306 __fopen_internal(0xFEBC4B8) approx BBs exec'd 0 ====
+
+ 0xFEBC4B8: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEBC4BC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFEBC4C0: 480EB991 bl 0xFFA7E50
+ 9: MOVL $0xFEBC4C4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2306 FEBC4B8 12
+. 94 21 FF E0 7C 08 02 A6 48 0E B9 91
+==== BB 2307 (0xFEBC4C4) approx BBs exec'd 0 ====
+
+ 0xFEBC4C4: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEBC4C8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEBC4CC: 9361000C stw r27,12(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEBC4D0: 7C7B1B78 or r27,r3,r3
+ 13: GETL R3, t10
+ 14: PUTL t10, R27
+ 15: INCEIPL $4
+
+ 0xFEBC4D4: 38600168 li r3,360
+ 16: MOVL $0x168, t12
+ 17: PUTL t12, R3
+ 18: INCEIPL $4
+
+ 0xFEBC4D8: 93810010 stw r28,16(r1)
+ 19: GETL R28, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x10, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFEBC4DC: 7CBC2B78 or r28,r5,r5
+ 24: GETL R5, t18
+ 25: PUTL t18, R28
+ 26: INCEIPL $4
+
+ 0xFEBC4E0: 93A10014 stw r29,20(r1)
+ 27: GETL R29, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x14, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFEBC4E4: 7C9D2378 or r29,r4,r4
+ 32: GETL R4, t24
+ 33: PUTL t24, R29
+ 34: INCEIPL $4
+
+ 0xFEBC4E8: 93E1001C stw r31,28(r1)
+ 35: GETL R31, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFEBC4EC: 90010024 stw r0,36(r1)
+ 40: GETL R0, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x24, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0xFEBC4F0: 480EDE19 bl 0xFFAA308
+ 45: MOVL $0xFEBC4F4, t34
+ 46: PUTL t34, LR
+ 47: JMPo-c $0xFFAA308 ($4)
+
+
+
+. 2307 FEBC4C4 48
+. 93 C1 00 18 7F C8 02 A6 93 61 00 0C 7C 7B 1B 78 38 60 01 68 93 81 00 10 7C BC 2B 78 93 A1 00 14 7C 9D 23 78 93 E1 00 1C 90 01 00 24 48 0E DE 19
+==== BB 2308 (0xFEBC4F4) approx BBs exec'd 0 ====
+
+ 0xFEBC4F4: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFEBC4F8: 80FE1B78 lwz r7,7032(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1B78, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0xFEBC4FC: 38800000 li r4,0
+ 10: MOVL $0x0, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0xFEBC500: 38A00000 li r5,0
+ 13: MOVL $0x0, t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0xFEBC504: 39200000 li r9,0
+ 16: MOVL $0x0, t12
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0xFEBC508: 381F00A0 addi r0,r31,160
+ 19: GETL R31, t14
+ 20: ADDL $0xA0, t14
+ 21: PUTL t14, R0
+ 22: INCEIPL $4
+
+ 0xFEBC50C: 38DF00AC addi r6,r31,172
+ 23: GETL R31, t16
+ 24: ADDL $0xAC, t16
+ 25: PUTL t16, R6
+ 26: INCEIPL $4
+
+ 0xFEBC510: 41820044 bc 12,2,0xFEBC554
+ 27: Js02o $0xFEBC554
+
+
+
+. 2308 FEBC4F4 32
+. 7C 7F 1B 79 80 FE 1B 78 38 80 00 00 38 A0 00 00 39 20 00 00 38 1F 00 A0 38 DF 00 AC 41 82 00 44
+==== BB 2309 (0xFEBC514) approx BBs exec'd 0 ====
+
+ 0xFEBC514: 901F0048 stw r0,72(r31)
+ 0: GETL R0, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x48, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEBC518: 4800FC9D bl 0xFECC1B4
+ 5: MOVL $0xFEBC51C, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0xFECC1B4 ($4)
+
+
+
+. 2309 FEBC514 8
+. 90 1F 00 48 48 00 FC 9D
+==== BB 2310 _IO_no_init(0xFECC1B4) approx BBs exec'd 0 ====
+
+ 0xFECC1B4: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFECC1B8: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECC1BC: 93A10014 stw r29,20(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECC1C0: 7CBD2B78 or r29,r5,r5
+ 14: GETL R5, t10
+ 15: PUTL t10, R29
+ 16: INCEIPL $4
+
+ 0xFECC1C4: 93E1001C stw r31,28(r1)
+ 17: GETL R31, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x1C, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFECC1C8: 7CDF3378 or r31,r6,r6
+ 22: GETL R6, t16
+ 23: PUTL t16, R31
+ 24: INCEIPL $4
+
+ 0xFECC1CC: 9361000C stw r27,12(r1)
+ 25: GETL R27, t18
+ 26: GETL R1, t20
+ 27: ADDL $0xC, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFECC1D0: 7CFB3B78 or r27,r7,r7
+ 30: GETL R7, t22
+ 31: PUTL t22, R27
+ 32: INCEIPL $4
+
+ 0xFECC1D4: 93810010 stw r28,16(r1)
+ 33: GETL R28, t24
+ 34: GETL R1, t26
+ 35: ADDL $0x10, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0xFECC1D8: 7C7C1B78 or r28,r3,r3
+ 38: GETL R3, t28
+ 39: PUTL t28, R28
+ 40: INCEIPL $4
+
+ 0xFECC1DC: 90010024 stw r0,36(r1)
+ 41: GETL R0, t30
+ 42: GETL R1, t32
+ 43: ADDL $0x24, t32
+ 44: STL t30, (t32)
+ 45: INCEIPL $4
+
+ 0xFECC1E0: 93C10018 stw r30,24(r1)
+ 46: GETL R30, t34
+ 47: GETL R1, t36
+ 48: ADDL $0x18, t36
+ 49: STL t34, (t36)
+ 50: INCEIPL $4
+
+ 0xFECC1E4: 4BFFFF51 bl 0xFECC134
+ 51: MOVL $0xFECC1E8, t38
+ 52: PUTL t38, LR
+ 53: JMPo-c $0xFECC134 ($4)
+
+
+
+. 2310 FECC1B4 52
+. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C BD 2B 78 93 E1 00 1C 7C DF 33 78 93 61 00 0C 7C FB 3B 78 93 81 00 10 7C 7C 1B 78 90 01 00 24 93 C1 00 18 4B FF FF 51
+==== BB 2311 _IO_old_init(0xFECC134) approx BBs exec'd 0 ====
+
+ 0xFECC134: 81630048 lwz r11,72(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFECC138: 39200000 li r9,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xFECC13C: 6484FBAD oris r4,r4,0xFBAD
+ 8: GETL R4, t6
+ 9: ORL $0xFBAD0000, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0xFECC140: 38000000 li r0,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R0
+ 14: INCEIPL $4
+
+ 0xFECC144: 2F8B0000 cmpi cr7,r11,0
+ 15: GETL R11, t10
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x7, CR
+ 18: INCEIPL $4
+
+ 0xFECC148: 9421FFD0 stwu r1,-48(r1)
+ 19: GETL R1, t14
+ 20: GETL R1, t16
+ 21: ADDL $0xFFFFFFD0, t16
+ 22: PUTL t16, R1
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xFECC14C: 90830000 stw r4,0(r3)
+ 25: GETL R4, t18
+ 26: GETL R3, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xFECC150: 98030046 stb r0,70(r3)
+ 29: GETL R0, t22
+ 30: GETL R3, t24
+ 31: ADDL $0x46, t24
+ 32: STB t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFECC154: 9123003C stw r9,60(r3)
+ 34: GETL R9, t26
+ 35: GETL R3, t28
+ 36: ADDL $0x3C, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFECC158: 9123001C stw r9,28(r3)
+ 39: GETL R9, t30
+ 40: GETL R3, t32
+ 41: ADDL $0x1C, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFECC15C: 91230020 stw r9,32(r3)
+ 44: GETL R9, t34
+ 45: GETL R3, t36
+ 46: ADDL $0x20, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0xFECC160: 9123000C stw r9,12(r3)
+ 49: GETL R9, t38
+ 50: GETL R3, t40
+ 51: ADDL $0xC, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0xFECC164: 91230004 stw r9,4(r3)
+ 54: GETL R9, t42
+ 55: GETL R3, t44
+ 56: ADDL $0x4, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0xFECC168: 91230008 stw r9,8(r3)
+ 59: GETL R9, t46
+ 60: GETL R3, t48
+ 61: ADDL $0x8, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0xFECC16C: 91230010 stw r9,16(r3)
+ 64: GETL R9, t50
+ 65: GETL R3, t52
+ 66: ADDL $0x10, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0xFECC170: 91230014 stw r9,20(r3)
+ 69: GETL R9, t54
+ 70: GETL R3, t56
+ 71: ADDL $0x14, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0xFECC174: 91230018 stw r9,24(r3)
+ 74: GETL R9, t58
+ 75: GETL R3, t60
+ 76: ADDL $0x18, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0xFECC178: 91230034 stw r9,52(r3)
+ 79: GETL R9, t62
+ 80: GETL R3, t64
+ 81: ADDL $0x34, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0xFECC17C: 91230024 stw r9,36(r3)
+ 84: GETL R9, t66
+ 85: GETL R3, t68
+ 86: ADDL $0x24, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0xFECC180: 91230028 stw r9,40(r3)
+ 89: GETL R9, t70
+ 90: GETL R3, t72
+ 91: ADDL $0x28, t72
+ 92: STL t70, (t72)
+ 93: INCEIPL $4
+
+ 0xFECC184: 9123002C stw r9,44(r3)
+ 94: GETL R9, t74
+ 95: GETL R3, t76
+ 96: ADDL $0x2C, t76
+ 97: STL t74, (t76)
+ 98: INCEIPL $4
+
+ 0xFECC188: 91230030 stw r9,48(r3)
+ 99: GETL R9, t78
+ 100: GETL R3, t80
+ 101: ADDL $0x30, t80
+ 102: STL t78, (t80)
+ 103: INCEIPL $4
+
+ 0xFECC18C: B1230044 sth r9,68(r3)
+ 104: GETL R9, t82
+ 105: GETL R3, t84
+ 106: ADDL $0x44, t84
+ 107: STW t82, (t84)
+ 108: INCEIPL $4
+
+ 0xFECC190: 419E001C bc 12,30,0xFECC1AC
+ 109: Js30o $0xFECC1AC
+
+
+
+. 2311 FECC134 96
+. 81 63 00 48 39 20 00 00 64 84 FB AD 38 00 00 00 2F 8B 00 00 94 21 FF D0 90 83 00 00 98 03 00 46 91 23 00 3C 91 23 00 1C 91 23 00 20 91 23 00 0C 91 23 00 04 91 23 00 08 91 23 00 10 91 23 00 14 91 23 00 18 91 23 00 34 91 23 00 24 91 23 00 28 91 23 00 2C 91 23 00 30 B1 23 00 44 41 9E 00 1C
+==== BB 2312 (0xFECC194) approx BBs exec'd 0 ====
+
+ 0xFECC194: 91210010 stw r9,16(r1)
+ 0: GETL R9, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x10, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECC198: 91210014 stw r9,20(r1)
+ 5: GETL R9, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x14, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECC19C: 91210018 stw r9,24(r1)
+ 10: GETL R9, t8
+ 11: GETL R1, t10
+ 12: ADDL $0x18, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFECC1A0: 912B0008 stw r9,8(r11)
+ 15: GETL R9, t12
+ 16: GETL R11, t14
+ 17: ADDL $0x8, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFECC1A4: 912B0000 stw r9,0(r11)
+ 20: GETL R9, t16
+ 21: GETL R11, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0xFECC1A8: 912B0004 stw r9,4(r11)
+ 24: GETL R9, t20
+ 25: GETL R11, t22
+ 26: ADDL $0x4, t22
+ 27: STL t20, (t22)
+ 28: INCEIPL $4
+
+ 0xFECC1AC: 38210030 addi r1,r1,48
+ 29: GETL R1, t24
+ 30: ADDL $0x30, t24
+ 31: PUTL t24, R1
+ 32: INCEIPL $4
+
+ 0xFECC1B0: 4E800020 blr
+ 33: GETL LR, t26
+ 34: JMPo-r t26 ($4)
+
+
+
+. 2312 FECC194 32
+. 91 21 00 10 91 21 00 14 91 21 00 18 91 2B 00 08 91 2B 00 00 91 2B 00 04 38 21 00 30 4E 80 00 20
+==== BB 2313 (0xFECC1E8) approx BBs exec'd 0 ====
+
+ 0xFECC1E8: 2F9D0000 cmpi cr7,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFECC1EC: 38000000 li r0,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFECC1F0: 93BC0060 stw r29,96(r28)
+ 7: GETL R29, t6
+ 8: GETL R28, t8
+ 9: ADDL $0x60, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFECC1F4: 419C0038 bc 12,28,0xFECC22C
+ 12: Js28o $0xFECC22C
+
+
+
+. 2313 FECC1E8 16
+. 2F 9D 00 00 38 00 00 00 93 BC 00 60 41 9C 00 38
+==== BB 2314 (0xFECC1F8) approx BBs exec'd 0 ====
+
+ 0xFECC1F8: 937F00B8 stw r27,184(r31)
+ 0: GETL R27, t0
+ 1: GETL R31, t2
+ 2: ADDL $0xB8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECC1FC: 93FC005C stw r31,92(r28)
+ 5: GETL R31, t4
+ 6: GETL R28, t6
+ 7: ADDL $0x5C, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECC200: 901F0028 stw r0,40(r31)
+ 10: GETL R0, t8
+ 11: GETL R31, t10
+ 12: ADDL $0x28, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFECC204: 901F0018 stw r0,24(r31)
+ 15: GETL R0, t12
+ 16: GETL R31, t14
+ 17: ADDL $0x18, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFECC208: 901F001C stw r0,28(r31)
+ 20: GETL R0, t16
+ 21: GETL R31, t18
+ 22: ADDL $0x1C, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0xFECC20C: 901F0008 stw r0,8(r31)
+ 25: GETL R0, t20
+ 26: GETL R31, t22
+ 27: ADDL $0x8, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0xFECC210: 901F0000 stw r0,0(r31)
+ 30: GETL R0, t24
+ 31: GETL R31, t26
+ 32: STL t24, (t26)
+ 33: INCEIPL $4
+
+ 0xFECC214: 901F0004 stw r0,4(r31)
+ 34: GETL R0, t28
+ 35: GETL R31, t30
+ 36: ADDL $0x4, t30
+ 37: STL t28, (t30)
+ 38: INCEIPL $4
+
+ 0xFECC218: 901F000C stw r0,12(r31)
+ 39: GETL R0, t32
+ 40: GETL R31, t34
+ 41: ADDL $0xC, t34
+ 42: STL t32, (t34)
+ 43: INCEIPL $4
+
+ 0xFECC21C: 901F0010 stw r0,16(r31)
+ 44: GETL R0, t36
+ 45: GETL R31, t38
+ 46: ADDL $0x10, t38
+ 47: STL t36, (t38)
+ 48: INCEIPL $4
+
+ 0xFECC220: 901F0014 stw r0,20(r31)
+ 49: GETL R0, t40
+ 50: GETL R31, t42
+ 51: ADDL $0x14, t42
+ 52: STL t40, (t42)
+ 53: INCEIPL $4
+
+ 0xFECC224: 901F0020 stw r0,32(r31)
+ 54: GETL R0, t44
+ 55: GETL R31, t46
+ 56: ADDL $0x20, t46
+ 57: STL t44, (t46)
+ 58: INCEIPL $4
+
+ 0xFECC228: 901F0024 stw r0,36(r31)
+ 59: GETL R0, t48
+ 60: GETL R31, t50
+ 61: ADDL $0x24, t50
+ 62: STL t48, (t50)
+ 63: INCEIPL $4
+
+ 0xFECC22C: 80610024 lwz r3,36(r1)
+ 64: GETL R1, t52
+ 65: ADDL $0x24, t52
+ 66: LDL (t52), t54
+ 67: PUTL t54, R3
+ 68: INCEIPL $4
+
+ 0xFECC230: 8361000C lwz r27,12(r1)
+ 69: GETL R1, t56
+ 70: ADDL $0xC, t56
+ 71: LDL (t56), t58
+ 72: PUTL t58, R27
+ 73: INCEIPL $4
+
+ 0xFECC234: 83810010 lwz r28,16(r1)
+ 74: GETL R1, t60
+ 75: ADDL $0x10, t60
+ 76: LDL (t60), t62
+ 77: PUTL t62, R28
+ 78: INCEIPL $4
+
+ 0xFECC238: 7C6803A6 mtlr r3
+ 79: GETL R3, t64
+ 80: PUTL t64, LR
+ 81: INCEIPL $4
+
+ 0xFECC23C: 83A10014 lwz r29,20(r1)
+ 82: GETL R1, t66
+ 83: ADDL $0x14, t66
+ 84: LDL (t66), t68
+ 85: PUTL t68, R29
+ 86: INCEIPL $4
+
+ 0xFECC240: 83C10018 lwz r30,24(r1)
+ 87: GETL R1, t70
+ 88: ADDL $0x18, t70
+ 89: LDL (t70), t72
+ 90: PUTL t72, R30
+ 91: INCEIPL $4
+
+ 0xFECC244: 83E1001C lwz r31,28(r1)
+ 92: GETL R1, t74
+ 93: ADDL $0x1C, t74
+ 94: LDL (t74), t76
+ 95: PUTL t76, R31
+ 96: INCEIPL $4
+
+ 0xFECC248: 38210020 addi r1,r1,32
+ 97: GETL R1, t78
+ 98: ADDL $0x20, t78
+ 99: PUTL t78, R1
+ 100: INCEIPL $4
+
+ 0xFECC24C: 4E800020 blr
+ 101: GETL LR, t80
+ 102: JMPo-r t80 ($4)
+
+
+
+. 2314 FECC1F8 88
+. 93 7F 00 B8 93 FC 00 5C 90 1F 00 28 90 1F 00 18 90 1F 00 1C 90 1F 00 08 90 1F 00 00 90 1F 00 04 90 1F 00 0C 90 1F 00 10 90 1F 00 14 90 1F 00 20 90 1F 00 24 80 61 00 24 83 61 00 0C 83 81 00 10 7C 68 03 A6 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2315 (0xFEBC51C) approx BBs exec'd 0 ====
+
+ 0xFEBC51C: 809E1B50 lwz r4,6992(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1B50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFEBC520: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEBC524: 909F0098 stw r4,152(r31)
+ 8: GETL R4, t6
+ 9: GETL R31, t8
+ 10: ADDL $0x98, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEBC528: 4800BD11 bl 0xFEC8238
+ 13: MOVL $0xFEBC52C, t10
+ 14: PUTL t10, LR
+ 15: JMPo-c $0xFEC8238 ($4)
+
+
+
+. 2315 FEBC51C 16
+. 80 9E 1B 50 7F E3 FB 78 90 9F 00 98 48 00 BD 11
+==== BB 2316 _IO_file_init@@GLIBC_2.1(0xFEC8238) approx BBs exec'd 0 ====
+
+ 0xFEC8238: 7CC802A6 mflr r6
+ 0: GETL LR, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0xFEC823C: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEC8240: 3920FFFF li r9,-1
+ 9: MOVL $0xFFFFFFFF, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0xFEC8244: 3940FFFF li r10,-1
+ 12: MOVL $0xFFFFFFFF, t8
+ 13: PUTL t8, R10
+ 14: INCEIPL $4
+
+ 0xFEC8248: 93A10014 stw r29,20(r1)
+ 15: GETL R29, t10
+ 16: GETL R1, t12
+ 17: ADDL $0x14, t12
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0xFEC824C: 7C7D1B78 or r29,r3,r3
+ 20: GETL R3, t14
+ 21: PUTL t14, R29
+ 22: INCEIPL $4
+
+ 0xFEC8250: 90C10024 stw r6,36(r1)
+ 23: GETL R6, t16
+ 24: GETL R1, t18
+ 25: ADDL $0x24, t18
+ 26: STL t16, (t18)
+ 27: INCEIPL $4
+
+ 0xFEC8254: 80A30000 lwz r5,0(r3)
+ 28: GETL R3, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R5
+ 31: INCEIPL $4
+
+ 0xFEC8258: 91230050 stw r9,80(r3)
+ 32: GETL R9, t24
+ 33: GETL R3, t26
+ 34: ADDL $0x50, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xFEC825C: 60A4240C ori r4,r5,0x240C
+ 37: GETL R5, t28
+ 38: ORL $0x240C, t28
+ 39: PUTL t28, R4
+ 40: INCEIPL $4
+
+ 0xFEC8260: 91430054 stw r10,84(r3)
+ 41: GETL R10, t30
+ 42: GETL R3, t32
+ 43: ADDL $0x54, t32
+ 44: STL t30, (t32)
+ 45: INCEIPL $4
+
+ 0xFEC8264: 90830000 stw r4,0(r3)
+ 46: GETL R4, t34
+ 47: GETL R3, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0xFEC8268: 93C10018 stw r30,24(r1)
+ 50: GETL R30, t38
+ 51: GETL R1, t40
+ 52: ADDL $0x18, t40
+ 53: STL t38, (t40)
+ 54: INCEIPL $4
+
+ 0xFEC826C: 48002EA9 bl 0xFECB114
+ 55: MOVL $0xFEC8270, t42
+ 56: PUTL t42, LR
+ 57: JMPo-c $0xFECB114 ($4)
+
+
+
+. 2316 FEC8238 56
+. 7C C8 02 A6 94 21 FF E0 39 20 FF FF 39 40 FF FF 93 A1 00 14 7C 7D 1B 78 90 C1 00 24 80 A3 00 00 91 23 00 50 60 A4 24 0C 91 43 00 54 90 83 00 00 93 C1 00 18 48 00 2E A9
+==== BB 2317 _IO_link_in_internal(0xFECB114) approx BBs exec'd 0 ====
+
+ 0xFECB114: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFECB118: 9421FFC0 stwu r1,-64(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFC0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECB11C: 7D800026 mfcr r12
+ 9: GETL CR, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0xFECB120: 480DCD31 bl 0xFFA7E50
+ 12: MOVL $0xFECB124, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2317 FECB114 16
+. 7C 08 02 A6 94 21 FF C0 7D 80 00 26 48 0D CD 31
+==== BB 2318 (0xFECB124) approx BBs exec'd 0 ====
+
+ 0xFECB124: 93C10038 stw r30,56(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x38, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECB128: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFECB12C: 90010044 stw r0,68(r1)
+ 8: GETL R0, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x44, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFECB130: 80030000 lwz r0,0(r3)
+ 13: GETL R3, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R0
+ 16: INCEIPL $4
+
+ 0xFECB134: 93E1003C stw r31,60(r1)
+ 17: GETL R31, t14
+ 18: GETL R1, t16
+ 19: ADDL $0x3C, t16
+ 20: STL t14, (t16)
+ 21: INCEIPL $4
+
+ 0xFECB138: 7C7F1B78 or r31,r3,r3
+ 22: GETL R3, t18
+ 23: PUTL t18, R31
+ 24: INCEIPL $4
+
+ 0xFECB13C: 70090080 andi. r9,r0,0x80
+ 25: GETL R0, t20
+ 26: ANDL $0x80, t20
+ 27: PUTL t20, R9
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x0, CR
+ 30: INCEIPL $4
+
+ 0xFECB140: 93410028 stw r26,40(r1)
+ 31: GETL R26, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x28, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFECB144: 9361002C stw r27,44(r1)
+ 36: GETL R27, t28
+ 37: GETL R1, t30
+ 38: ADDL $0x2C, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0xFECB148: 93810030 stw r28,48(r1)
+ 41: GETL R28, t32
+ 42: GETL R1, t34
+ 43: ADDL $0x30, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0xFECB14C: 93A10034 stw r29,52(r1)
+ 46: GETL R29, t36
+ 47: GETL R1, t38
+ 48: ADDL $0x34, t38
+ 49: STL t36, (t38)
+ 50: INCEIPL $4
+
+ 0xFECB150: 91810024 stw r12,36(r1)
+ 51: GETL R12, t40
+ 52: GETL R1, t42
+ 53: ADDL $0x24, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0xFECB154: 40820160 bc 4,2,0xFECB2B4
+ 56: Jc02o $0xFECB2B4
+
+
+
+. 2318 FECB124 52
+. 93 C1 00 38 7F C8 02 A6 90 01 00 44 80 03 00 00 93 E1 00 3C 7C 7F 1B 78 70 09 00 80 93 41 00 28 93 61 00 2C 93 81 00 30 93 A1 00 34 91 81 00 24 40 82 01 60
+==== BB 2319 (0xFECB158) approx BBs exec'd 0 ====
+
+ 0xFECB158: 835E1B48 lwz r26,6984(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1B48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFECB15C: 60030080 ori r3,r0,0x80
+ 5: GETL R0, t4
+ 6: ORL $0x80, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFECB160: 907F0000 stw r3,0(r31)
+ 9: GETL R3, t6
+ 10: GETL R31, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFECB164: 813A00B8 lwz r9,184(r26)
+ 13: GETL R26, t10
+ 14: ADDL $0xB8, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0xFECB168: 3169FFFF addic r11,r9,-1
+ 18: GETL R9, t14
+ 19: ADCL $0xFFFFFFFF, t14 (-wCa)
+ 20: PUTL t14, R11
+ 21: INCEIPL $4
+
+ 0xFECB16C: 7C0B4910 subfe r0,r11,r9
+ 22: GETL R11, t16
+ 23: GETL R9, t18
+ 24: SBBL t16, t18 (-rCa-wCa)
+ 25: PUTL t18, R0
+ 26: INCEIPL $4
+
+ 0xFECB170: 2E000000 cmpi cr4,r0,0
+ 27: GETL R0, t20
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x4, CR
+ 30: INCEIPL $4
+
+ 0xFECB174: 409201B4 bc 4,18,0xFECB328
+ 31: Jc18o $0xFECB328
+
+
+
+. 2319 FECB158 32
+. 83 5E 1B 48 60 03 00 80 90 7F 00 00 81 3A 00 B8 31 69 FF FF 7C 0B 49 10 2E 00 00 00 40 92 01 B4
+==== BB 2320 (0xFECB178) approx BBs exec'd 0 ====
+
+ 0xFECB178: 809E05E4 lwz r4,1508(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5E4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFECB17C: 90010014 stw r0,20(r1)
+ 5: GETL R0, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x14, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECB180: 90810010 stw r4,16(r1)
+ 10: GETL R4, t8
+ 11: GETL R1, t10
+ 12: ADDL $0x10, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFECB184: 83BE05E0 lwz r29,1504(r30)
+ 15: GETL R30, t12
+ 16: ADDL $0x5E0, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R29
+ 19: INCEIPL $4
+
+ 0xFECB188: 3B828BA0 addi r28,r2,-29792
+ 20: GETL R2, t16
+ 21: ADDL $0xFFFF8BA0, t16
+ 22: PUTL t16, R28
+ 23: INCEIPL $4
+
+ 0xFECB18C: 80BD0008 lwz r5,8(r29)
+ 24: GETL R29, t18
+ 25: ADDL $0x8, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R5
+ 28: INCEIPL $4
+
+ 0xFECB190: 7F85E000 cmp cr7,r5,r28
+ 29: GETL R5, t22
+ 30: GETL R28, t24
+ 31: CMPL t22, t24, t26 (-rSo)
+ 32: ICRFL t26, $0x7, CR
+ 33: INCEIPL $4
+
+ 0xFECB194: 419E0030 bc 12,30,0xFECB1C4
+ 34: Js30o $0xFECB1C4
+
+
+
+. 2320 FECB178 32
+. 80 9E 05 E4 90 01 00 14 90 81 00 10 83 BE 05 E0 3B 82 8B A0 80 BD 00 08 7F 85 E0 00 41 9E 00 30
+==== BB 2321 (0xFECB198) approx BBs exec'd 0 ====
+
+ 0xFECB198: 39600000 li r11,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFECB19C: 38C00001 li r6,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFECB1A0: 7D20E828 lwarx r9,r0,r29
+ 6: GETL R29, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0xFECB1A4: 7C095800 cmp cr0,r9,r11
+ 11: GETL R9, t8
+ 12: GETL R11, t10
+ 13: CMPL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFECB1A8: 4082000C bc 4,2,0xFECB1B4
+ 16: Jc02o $0xFECB1B4
+
+
+
+. 2321 FECB198 20
+. 39 60 00 00 38 C0 00 01 7D 20 E8 28 7C 09 58 00 40 82 00 0C
+==== BB 2322 (0xFECB1AC) approx BBs exec'd 0 ====
+
+ 0xFECB1AC: 7CC0E92D stwcx. r6,r0,r29
+ 0: GETL R29, t0
+ 1: GETL R6, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECB1B0: 40A2FFF0 bc 5,2,0xFECB1A0
+ 6: Jc02o $0xFECB1A0
+
+
+
+. 2322 FECB1AC 8
+. 7C C0 E9 2D 40 A2 FF F0
+==== BB 2323 (0xFECB1A0) approx BBs exec'd 0 ====
+
+ 0xFECB1A0: 7D20E828 lwarx r9,r0,r29
+ 0: GETL R29, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFECB1A4: 7C095800 cmp cr0,r9,r11
+ 5: GETL R9, t4
+ 6: GETL R11, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECB1A8: 4082000C bc 4,2,0xFECB1B4
+ 10: Jc02o $0xFECB1B4
+
+
+
+. 2323 FECB1A0 12
+. 7D 20 E8 28 7C 09 58 00 40 82 00 0C
+==== BB 2324 (0xFECB1B4) approx BBs exec'd 0 ====
+
+ 0xFECB1B4: 4C00012C 0: INCEIPL $4
+
+ 0xFECB1B8: 2C890000 cmpi cr1,r9,0
+ 1: GETL R9, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFECB1BC: 408601BC bc 4,6,0xFECB378
+ 5: Jc06o $0xFECB378
+
+
+
+. 2324 FECB1B4 12
+. 4C 00 01 2C 2C 89 00 00 40 86 01 BC
+==== BB 2325 (0xFECB1C0) approx BBs exec'd 0 ====
+
+ 0xFECB1C0: 939D0008 stw r28,8(r29)
+ 0: GETL R28, t0
+ 1: GETL R29, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECB1C4: 815D0004 lwz r10,4(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0xFECB1C8: 837E05E8 lwz r27,1512(r30)
+ 10: GETL R30, t8
+ 11: ADDL $0x5E8, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R27
+ 14: INCEIPL $4
+
+ 0xFECB1CC: 390A0001 addi r8,r10,1
+ 15: GETL R10, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R8
+ 18: INCEIPL $4
+
+ 0xFECB1D0: 911D0004 stw r8,4(r29)
+ 19: GETL R8, t14
+ 20: GETL R29, t16
+ 21: ADDL $0x4, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFECB1D4: 80FF0000 lwz r7,0(r31)
+ 24: GETL R31, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R7
+ 27: INCEIPL $4
+
+ 0xFECB1D8: 93FB0000 stw r31,0(r27)
+ 28: GETL R31, t22
+ 29: GETL R27, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0xFECB1DC: 70E98000 andi. r9,r7,0x8000
+ 32: GETL R7, t26
+ 33: ANDL $0x8000, t26
+ 34: PUTL t26, R9
+ 35: CMP0L t26, t28 (-rSo)
+ 36: ICRFL t28, $0x0, CR
+ 37: INCEIPL $4
+
+ 0xFECB1E0: 40820054 bc 4,2,0xFECB234
+ 38: Jc02o $0xFECB234
+
+
+
+. 2325 FECB1C0 36
+. 93 9D 00 08 81 5D 00 04 83 7E 05 E8 39 0A 00 01 91 1D 00 04 80 FF 00 00 93 FB 00 00 70 E9 80 00 40 82 00 54
+==== BB 2326 (0xFECB1E4) approx BBs exec'd 0 ====
+
+ 0xFECB1E4: 807F0048 lwz r3,72(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECB1E8: 3B828BA0 addi r28,r2,-29792
+ 5: GETL R2, t4
+ 6: ADDL $0xFFFF8BA0, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0xFECB1EC: 81830008 lwz r12,8(r3)
+ 9: GETL R3, t6
+ 10: ADDL $0x8, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0xFECB1F0: 7F0CE000 cmp cr6,r12,r28
+ 14: GETL R12, t10
+ 15: GETL R28, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0xFECB1F4: 419A0034 bc 12,26,0xFECB228
+ 19: Js26o $0xFECB228
+
+
+
+. 2326 FECB1E4 20
+. 80 7F 00 48 3B 82 8B A0 81 83 00 08 7F 0C E0 00 41 9A 00 34
+==== BB 2327 (0xFECB1F8) approx BBs exec'd 0 ====
+
+ 0xFECB1F8: 38A00000 li r5,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFECB1FC: 38000001 li r0,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xFECB200: 7C801828 lwarx r4,r0,r3
+ 6: GETL R3, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0xFECB204: 7C042800 cmp cr0,r4,r5
+ 11: GETL R4, t8
+ 12: GETL R5, t10
+ 13: CMPL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFECB208: 4082000C bc 4,2,0xFECB214
+ 16: Jc02o $0xFECB214
+
+
+
+. 2327 FECB1F8 20
+. 38 A0 00 00 38 00 00 01 7C 80 18 28 7C 04 28 00 40 82 00 0C
+==== BB 2328 (0xFECB20C) approx BBs exec'd 0 ====
+
+ 0xFECB20C: 7C00192D stwcx. r0,r0,r3
+ 0: GETL R3, t0
+ 1: GETL R0, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECB210: 40A2FFF0 bc 5,2,0xFECB200
+ 6: Jc02o $0xFECB200
+
+
+
+. 2328 FECB20C 8
+. 7C 00 19 2D 40 A2 FF F0
+==== BB 2329 (0xFECB200) approx BBs exec'd 0 ====
+
+ 0xFECB200: 7C801828 lwarx r4,r0,r3
+ 0: GETL R3, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFECB204: 7C042800 cmp cr0,r4,r5
+ 5: GETL R4, t4
+ 6: GETL R5, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECB208: 4082000C bc 4,2,0xFECB214
+ 10: Jc02o $0xFECB214
+
+
+
+. 2329 FECB200 12
+. 7C 80 18 28 7C 04 28 00 40 82 00 0C
+==== BB 2330 (0xFECB214) approx BBs exec'd 0 ====
+
+ 0xFECB214: 4C00012C 0: INCEIPL $4
+
+ 0xFECB218: 2F840000 cmpi cr7,r4,0
+ 1: GETL R4, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFECB21C: 409E018C bc 4,30,0xFECB3A8
+ 5: Jc30o $0xFECB3A8
+
+
+
+. 2330 FECB214 12
+. 4C 00 01 2C 2F 84 00 00 40 9E 01 8C
+==== BB 2331 (0xFECB220) approx BBs exec'd 0 ====
+
+ 0xFECB220: 807F0048 lwz r3,72(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECB224: 93830008 stw r28,8(r3)
+ 5: GETL R28, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECB228: 81230004 lwz r9,4(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0xFECB22C: 3B890001 addi r28,r9,1
+ 15: GETL R9, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R28
+ 18: INCEIPL $4
+
+ 0xFECB230: 93830004 stw r28,4(r3)
+ 19: GETL R28, t14
+ 20: GETL R3, t16
+ 21: ADDL $0x4, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFECB234: 815F0000 lwz r10,0(r31)
+ 24: GETL R31, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R10
+ 27: INCEIPL $4
+
+ 0xFECB238: 817E05EC lwz r11,1516(r30)
+ 28: GETL R30, t22
+ 29: ADDL $0x5EC, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R11
+ 32: INCEIPL $4
+
+ 0xFECB23C: 807E1BEC lwz r3,7148(r30)
+ 33: GETL R30, t26
+ 34: ADDL $0x1BEC, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R3
+ 37: INCEIPL $4
+
+ 0xFECB240: 71498000 andi. r9,r10,0x8000
+ 38: GETL R10, t30
+ 39: ANDL $0x8000, t30
+ 40: PUTL t30, R9
+ 41: CMP0L t30, t32 (-rSo)
+ 42: ICRFL t32, $0x0, CR
+ 43: INCEIPL $4
+
+ 0xFECB244: 810B0000 lwz r8,0(r11)
+ 44: GETL R11, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R8
+ 47: INCEIPL $4
+
+ 0xFECB248: 80C30000 lwz r6,0(r3)
+ 48: GETL R3, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R6
+ 51: INCEIPL $4
+
+ 0xFECB24C: 38E80001 addi r7,r8,1
+ 52: GETL R8, t42
+ 53: ADDL $0x1, t42
+ 54: PUTL t42, R7
+ 55: INCEIPL $4
+
+ 0xFECB250: 93E30000 stw r31,0(r3)
+ 56: GETL R31, t44
+ 57: GETL R3, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0xFECB254: 90EB0000 stw r7,0(r11)
+ 60: GETL R7, t48
+ 61: GETL R11, t50
+ 62: STL t48, (t50)
+ 63: INCEIPL $4
+
+ 0xFECB258: 90DF0034 stw r6,52(r31)
+ 64: GETL R6, t52
+ 65: GETL R31, t54
+ 66: ADDL $0x34, t54
+ 67: STL t52, (t54)
+ 68: INCEIPL $4
+
+ 0xFECB25C: 4082001C bc 4,2,0xFECB278
+ 69: Jc02o $0xFECB278
+
+
+
+. 2331 FECB220 64
+. 80 7F 00 48 93 83 00 08 81 23 00 04 3B 89 00 01 93 83 00 04 81 5F 00 00 81 7E 05 EC 80 7E 1B EC 71 49 80 00 81 0B 00 00 80 C3 00 00 38 E8 00 01 93 E3 00 00 90 EB 00 00 90 DF 00 34 40 82 00 1C
+==== BB 2332 (0xFECB260) approx BBs exec'd 0 ====
+
+ 0xFECB260: 807F0048 lwz r3,72(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECB264: 83E30004 lwz r31,4(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0xFECB268: 393FFFFF addi r9,r31,-1
+ 10: GETL R31, t8
+ 11: ADDL $0xFFFFFFFF, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFECB26C: 2C890000 cmpi cr1,r9,0
+ 14: GETL R9, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x1, CR
+ 17: INCEIPL $4
+
+ 0xFECB270: 91230004 stw r9,4(r3)
+ 18: GETL R9, t14
+ 19: GETL R3, t16
+ 20: ADDL $0x4, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFECB274: 418600CC bc 12,6,0xFECB340
+ 23: Js06o $0xFECB340
+
+
+
+. 2332 FECB260 24
+. 80 7F 00 48 83 E3 00 04 39 3F FF FF 2C 89 00 00 91 23 00 04 41 86 00 CC
+==== BB 2333 (0xFECB340) approx BBs exec'd 0 ====
+
+ 0xFECB340: 91230008 stw r9,8(r3)
+ 0: GETL R9, t0
+ 1: GETL R3, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECB344: 7C0004AC sync
+ 5: INCEIPL $4
+
+ 0xFECB348: 7D801828 lwarx r12,r0,r3
+ 6: GETL R3, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0xFECB34C: 7D20192D stwcx. r9,r0,r3
+ 11: GETL R3, t8
+ 12: GETL R9, t10
+ 13: LOCKo
+ 14: STL t10, (t8) (-rSo)
+ 15: ICRFL cr, $0x0, CR
+ 16: INCEIPL $4
+
+ 0xFECB350: 40A2FFF8 bc 5,2,0xFECB348
+ 17: Jc02o $0xFECB348
+
+
+
+. 2333 FECB340 20
+. 91 23 00 08 7C 00 04 AC 7D 80 18 28 7D 20 19 2D 40 A2 FF F8
+==== BB 2334 (0xFECB354) approx BBs exec'd 0 ====
+
+ 0xFECB354: 2F0C0001 cmpi cr6,r12,1
+ 0: GETL R12, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFECB358: 4099FF20 bc 4,25,0xFECB278
+ 5: Jc25o $0xFECB278
+
+
+
+. 2334 FECB354 8
+. 2F 0C 00 01 40 99 FF 20
+==== BB 2335 (0xFECB278) approx BBs exec'd 0 ====
+
+ 0xFECB278: 80BD0004 lwz r5,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFECB27C: 38800000 li r4,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFECB280: 909B0000 stw r4,0(r27)
+ 8: GETL R4, t6
+ 9: GETL R27, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFECB284: 3925FFFF addi r9,r5,-1
+ 12: GETL R5, t10
+ 13: ADDL $0xFFFFFFFF, t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0xFECB288: 2F890000 cmpi cr7,r9,0
+ 16: GETL R9, t12
+ 17: CMP0L t12, t14 (-rSo)
+ 18: ICRFL t14, $0x7, CR
+ 19: INCEIPL $4
+
+ 0xFECB28C: 913D0004 stw r9,4(r29)
+ 20: GETL R9, t16
+ 21: GETL R29, t18
+ 22: ADDL $0x4, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0xFECB290: 409E0020 bc 4,30,0xFECB2B0
+ 25: Jc30o $0xFECB2B0
+
+
+
+. 2335 FECB278 28
+. 80 BD 00 04 38 80 00 00 90 9B 00 00 39 25 FF FF 2F 89 00 00 91 3D 00 04 40 9E 00 20
+==== BB 2336 (0xFECB294) approx BBs exec'd 0 ====
+
+ 0xFECB294: 913D0008 stw r9,8(r29)
+ 0: GETL R9, t0
+ 1: GETL R29, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECB298: 7C0004AC sync
+ 5: INCEIPL $4
+
+ 0xFECB29C: 7F60E828 lwarx r27,r0,r29
+ 6: GETL R29, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R27
+ 10: INCEIPL $4
+
+ 0xFECB2A0: 7D20E92D stwcx. r9,r0,r29
+ 11: GETL R29, t8
+ 12: GETL R9, t10
+ 13: LOCKo
+ 14: STL t10, (t8) (-rSo)
+ 15: ICRFL cr, $0x0, CR
+ 16: INCEIPL $4
+
+ 0xFECB2A4: 40A2FFF8 bc 5,2,0xFECB29C
+ 17: Jc02o $0xFECB29C
+
+
+
+. 2336 FECB294 20
+. 91 3D 00 08 7C 00 04 AC 7F 60 E8 28 7D 20 E9 2D 40 A2 FF F8
+==== BB 2337 (0xFECB2A8) approx BBs exec'd 0 ====
+
+ 0xFECB2A8: 2C1B0001 cmpi cr0,r27,1
+ 0: GETL R27, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFECB2AC: 418100D8 bc 12,1,0xFECB384
+ 5: Js01o $0xFECB384
+
+
+
+. 2337 FECB2A8 8
+. 2C 1B 00 01 41 81 00 D8
+==== BB 2338 (0xFECB2B0) approx BBs exec'd 0 ====
+
+ 0xFECB2B0: 40920034 bc 4,18,0xFECB2E4
+ 0: Jc18o $0xFECB2E4
+
+
+
+. 2338 FECB2B0 4
+. 40 92 00 34
+==== BB 2339 (0xFECB2B4) approx BBs exec'd 0 ====
+
+ 0xFECB2B4: 83A10044 lwz r29,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFECB2B8: 81210024 lwz r9,36(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x24, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFECB2BC: 7FA803A6 mtlr r29
+ 10: GETL R29, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFECB2C0: 83410028 lwz r26,40(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x28, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R26
+ 17: INCEIPL $4
+
+ 0xFECB2C4: 8361002C lwz r27,44(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x2C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R27
+ 22: INCEIPL $4
+
+ 0xFECB2C8: 7D208120 mtcrf 0x8,r9
+ 23: GETL R9, t18
+ 24: ICRFL t18, $0x4, CR
+ 25: INCEIPL $4
+
+ 0xFECB2CC: 83810030 lwz r28,48(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x30, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R28
+ 30: INCEIPL $4
+
+ 0xFECB2D0: 83A10034 lwz r29,52(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x34, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R29
+ 35: INCEIPL $4
+
+ 0xFECB2D4: 83C10038 lwz r30,56(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x38, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R30
+ 40: INCEIPL $4
+
+ 0xFECB2D8: 83E1003C lwz r31,60(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x3C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R31
+ 45: INCEIPL $4
+
+ 0xFECB2DC: 38210040 addi r1,r1,64
+ 46: GETL R1, t36
+ 47: ADDL $0x40, t36
+ 48: PUTL t36, R1
+ 49: INCEIPL $4
+
+ 0xFECB2E0: 4E800020 blr
+ 50: GETL LR, t38
+ 51: JMPo-r t38 ($4)
+
+
+
+. 2339 FECB2B4 48
+. 83 A1 00 44 81 21 00 24 7F A8 03 A6 83 41 00 28 83 61 00 2C 7D 20 81 20 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+==== BB 2340 (0xFEC8270) approx BBs exec'd 0 ====
+
+ 0xFEC8270: 80010024 lwz r0,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEC8274: 3860FFFF li r3,-1
+ 5: MOVL $0xFFFFFFFF, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEC8278: 907D0038 stw r3,56(r29)
+ 8: GETL R3, t6
+ 9: GETL R29, t8
+ 10: ADDL $0x38, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEC827C: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0xFEC8280: 7C0803A6 mtlr r0
+ 18: GETL R0, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFEC8284: 83A10014 lwz r29,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0xFEC8288: 38210020 addi r1,r1,32
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0xFEC828C: 4E800020 blr
+ 30: GETL LR, t22
+ 31: JMPo-r t22 ($4)
+
+
+
+. 2340 FEC8270 32
+. 80 01 00 24 38 60 FF FF 90 7D 00 38 83 C1 00 18 7C 08 03 A6 83 A1 00 14 38 21 00 20 4E 80 00 20
+==== BB 2341 (0xFEBC52C) approx BBs exec'd 0 ====
+
+ 0xFEBC52C: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEBC530: 7F64DB78 or r4,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFEBC534: 7FA5EB78 or r5,r29,r29
+ 6: GETL R29, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFEBC538: 7F86E378 or r6,r28,r28
+ 9: GETL R28, t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0xFEBC53C: 4800C141 bl 0xFEC867C
+ 12: MOVL $0xFEBC540, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0xFEC867C ($4)
+
+
+
+. 2341 FEBC52C 20
+. 7F E3 FB 78 7F 64 DB 78 7F A5 EB 78 7F 86 E3 78 48 00 C1 41
+==== BB 2342 _IO_file_fopen@@GLIBC_2.1(0xFEC867C) approx BBs exec'd 0 ====
+
+ 0xFEC867C: 7CE802A6 mflr r7
+ 0: GETL LR, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0xFEC8680: 9421FFC0 stwu r1,-64(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFC0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEC8684: 480DF7CD bl 0xFFA7E50
+ 9: MOVL $0xFEC8688, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2342 FEC867C 12
+. 7C E8 02 A6 94 21 FF C0 48 0D F7 CD
+==== BB 2343 (0xFEC8688) approx BBs exec'd 0 ====
+
+ 0xFEC8688: 9361002C stw r27,44(r1)
+ 0: GETL R27, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x2C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEC868C: 93C10038 stw r30,56(r1)
+ 5: GETL R30, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x38, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFEC8690: 7C7B1B78 or r27,r3,r3
+ 10: GETL R3, t8
+ 11: PUTL t8, R27
+ 12: INCEIPL $4
+
+ 0xFEC8694: 90E10044 stw r7,68(r1)
+ 13: GETL R7, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x44, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEC8698: 7FC802A6 mflr r30
+ 18: GETL LR, t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0xFEC869C: 80030038 lwz r0,56(r3)
+ 21: GETL R3, t16
+ 22: ADDL $0x38, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R0
+ 25: INCEIPL $4
+
+ 0xFEC86A0: 7C872378 or r7,r4,r4
+ 26: GETL R4, t20
+ 27: PUTL t20, R7
+ 28: INCEIPL $4
+
+ 0xFEC86A4: 93E1003C stw r31,60(r1)
+ 29: GETL R31, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x3C, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFEC86A8: 39400000 li r10,0
+ 34: MOVL $0x0, t26
+ 35: PUTL t26, R10
+ 36: INCEIPL $4
+
+ 0xFEC86AC: 2F80FFFF cmpi cr7,r0,-1
+ 37: GETL R0, t28
+ 38: MOVL $0xFFFFFFFF, t32
+ 39: CMPL t28, t32, t30 (-rSo)
+ 40: ICRFL t30, $0x7, CR
+ 41: INCEIPL $4
+
+ 0xFEC86B0: 93210024 stw r25,36(r1)
+ 42: GETL R25, t34
+ 43: GETL R1, t36
+ 44: ADDL $0x24, t36
+ 45: STL t34, (t36)
+ 46: INCEIPL $4
+
+ 0xFEC86B4: 93410028 stw r26,40(r1)
+ 47: GETL R26, t38
+ 48: GETL R1, t40
+ 49: ADDL $0x28, t40
+ 50: STL t38, (t40)
+ 51: INCEIPL $4
+
+ 0xFEC86B8: 7C3F0B78 or r31,r1,r1
+ 52: GETL R1, t42
+ 53: PUTL t42, R31
+ 54: INCEIPL $4
+
+ 0xFEC86BC: 93810030 stw r28,48(r1)
+ 55: GETL R28, t44
+ 56: GETL R1, t46
+ 57: ADDL $0x30, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0xFEC86C0: 38600000 li r3,0
+ 60: MOVL $0x0, t48
+ 61: PUTL t48, R3
+ 62: INCEIPL $4
+
+ 0xFEC86C4: 93A10034 stw r29,52(r1)
+ 63: GETL R29, t50
+ 64: GETL R1, t52
+ 65: ADDL $0x34, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0xFEC86C8: 409E0030 bc 4,30,0xFEC86F8
+ 68: Jc30o $0xFEC86F8
+
+
+
+. 2343 FEC8688 68
+. 93 61 00 2C 93 C1 00 38 7C 7B 1B 78 90 E1 00 44 7F C8 02 A6 80 03 00 38 7C 87 23 78 93 E1 00 3C 39 40 00 00 2F 80 FF FF 93 21 00 24 93 41 00 28 7C 3F 0B 78 93 81 00 30 38 60 00 00 93 A1 00 34 40 9E 00 30
+==== BB 2344 (0xFEC86CC) approx BBs exec'd 0 ====
+
+ 0xFEC86CC: 88050000 lbz r0,0(r5)
+ 0: GETL R5, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEC86D0: 2F800072 cmpi cr7,r0,114
+ 4: GETL R0, t4
+ 5: MOVL $0x72, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFEC86D4: 419E006C bc 12,30,0xFEC8740
+ 9: Js30o $0xFEC8740
+
+
+
+. 2344 FEC86CC 12
+. 88 05 00 00 2F 80 00 72 41 9E 00 6C
+==== BB 2345 (0xFEC8740) approx BBs exec'd 0 ====
+
+ 0xFEC8740: 39000000 li r8,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0xFEC8744: 3B800008 li r28,8
+ 3: MOVL $0x8, t2
+ 4: PUTL t2, R28
+ 5: INCEIPL $4
+
+ 0xFEC8748: 817B003C lwz r11,60(r27)
+ 6: GETL R27, t4
+ 7: ADDL $0x3C, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R11
+ 10: INCEIPL $4
+
+ 0xFEC874C: 7CBA2B78 or r26,r5,r5
+ 11: GETL R5, t8
+ 12: PUTL t8, R26
+ 13: INCEIPL $4
+
+ 0xFEC8750: 39200001 li r9,1
+ 14: MOVL $0x1, t10
+ 15: PUTL t10, R9
+ 16: INCEIPL $4
+
+ 0xFEC8754: 8C050001 lbzu r0,1(r5)
+ 17: GETL R5, t12
+ 18: ADDL $0x1, t12
+ 19: PUTL t12, R5
+ 20: LDB (t12), t14
+ 21: PUTL t14, R0
+ 22: INCEIPL $4
+
+ 0xFEC8758: 2F800063 cmpi cr7,r0,99
+ 23: GETL R0, t16
+ 24: MOVL $0x63, t20
+ 25: CMPL t16, t20, t18 (-rSo)
+ 26: ICRFL t18, $0x7, CR
+ 27: INCEIPL $4
+
+ 0xFEC875C: 419E0394 bc 12,30,0xFEC8AF0
+ 28: Js30o $0xFEC8AF0
+
+
+
+. 2345 FEC8740 32
+. 39 00 00 00 3B 80 00 08 81 7B 00 3C 7C BA 2B 78 39 20 00 01 8C 05 00 01 2F 80 00 63 41 9E 03 94
+==== BB 2346 (0xFEC8AF0) approx BBs exec'd 0 ====
+
+ 0xFEC8AF0: 616B0002 ori r11,r11,0x2
+ 0: GETL R11, t0
+ 1: ORL $0x2, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFEC8AF4: 917B003C stw r11,60(r27)
+ 4: GETL R11, t2
+ 5: GETL R27, t4
+ 6: ADDL $0x3C, t4
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEC8AF8: 4BFFFC90 b 0xFEC8788
+ 9: JMPo $0xFEC8788 ($4)
+
+
+
+. 2346 FEC8AF0 12
+. 61 6B 00 02 91 7B 00 3C 4B FF FC 90
+==== BB 2347 (0xFEC8788) approx BBs exec'd 0 ====
+
+ 0xFEC8788: 71600002 andi. r0,r11,0x2
+ 0: GETL R11, t0
+ 1: ANDL $0x2, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEC878C: 7D005378 or r0,r8,r10
+ 6: GETL R8, t4
+ 7: GETL R10, t6
+ 8: ORL t6, t4
+ 9: PUTL t4, R0
+ 10: INCEIPL $4
+
+ 0xFEC8790: 40820388 bc 4,2,0xFEC8B18
+ 11: Jc02o $0xFEC8B18
+
+
+
+. 2347 FEC8788 12
+. 71 60 00 02 7D 00 53 78 40 82 03 88
+==== BB 2348 (0xFEC8B18) approx BBs exec'd 0 ====
+
+ 0xFEC8B18: 21260000 subfic r9,r6,0
+ 0: GETL R6, t0
+ 1: MOVL $0x0, t2
+ 2: SBBL t0, t2 (-wCa)
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEC8B1C: 7D093114 adde r8,r9,r6
+ 5: GETL R9, t4
+ 6: GETL R6, t6
+ 7: ADCL t4, t6 (-rCa-wCa)
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0xFEC8B20: 7CE33B78 or r3,r7,r7
+ 10: GETL R7, t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFEC8B24: 5505801E rlwinm r5,r8,16,0,15
+ 13: GETL R8, t10
+ 14: SHLL $0x10, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0xFEC8B28: 7CA40378 or r4,r5,r0
+ 17: GETL R5, t12
+ 18: GETL R0, t14
+ 19: ORL t14, t12
+ 20: PUTL t12, R4
+ 21: INCEIPL $4
+
+ 0xFEC8B2C: 38A001B6 li r5,438
+ 22: MOVL $0x1B6, t16
+ 23: PUTL t16, R5
+ 24: INCEIPL $4
+
+ 0xFEC8B30: 4CC63182 crxor 6,6,6
+ 25: GETL CR, t18
+ 26: XBITB t18, $0x6, t20
+ 27: XBITB t18, $0x6, t22
+ 28: XORB t22, t20
+ 29: IBITL t20, $0x6, t18
+ 30: PUTL t18, CR
+ 31: INCEIPL $4
+
+ 0xFEC8B34: 480591ED bl 0xFF21D20
+ 32: MOVL $0xFEC8B38, t24
+ 33: PUTL t24, LR
+ 34: JMPo-c $0xFF21D20 ($4)
+
+
+
+. 2348 FEC8B18 32
+. 21 26 00 00 7D 09 31 14 7C E3 3B 78 55 05 80 1E 7C A4 03 78 38 A0 01 B6 4C C6 31 82 48 05 91 ED
+==== BB 2349 (0xFEC8B38) approx BBs exec'd 0 ====
+
+ 0xFEC8B38: 4BFFFC7C b 0xFEC87B4
+ 0: JMPo $0xFEC87B4 ($4)
+
+
+
+. 2349 FEC8B38 4
+. 4B FF FC 7C
+==== BB 2350 (0xFEC87B4) approx BBs exec'd 0 ====
+
+ 0xFEC87B4: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFEC87B8: 7C7D1B78 or r29,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R29
+ 6: INCEIPL $4
+
+ 0xFEC87BC: 3B200000 li r25,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0xFEC87C0: 41840250 bc 12,4,0xFEC8A10
+ 10: Js04o $0xFEC8A10
+
+
+
+. 2350 FEC87B4 16
+. 2C 83 00 00 7C 7D 1B 78 3B 20 00 00 41 84 02 50
+==== BB 2351 (0xFEC87C4) approx BBs exec'd 0 ====
+
+ 0xFEC87C4: 5780A33F rlwinm. r0,r28,20,12,31
+ 0: GETL R28, t0
+ 1: SHRL $0xC, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEC87C8: 801B0000 lwz r0,0(r27)
+ 6: GETL R27, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFEC87CC: 38E0EFF3 li r7,-4109
+ 10: MOVL $0xFFFFEFF3, t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0xFEC87D0: 907B0038 stw r3,56(r27)
+ 13: GETL R3, t10
+ 14: GETL R27, t12
+ 15: ADDL $0x38, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEC87D4: 7C0C3838 and r12,r0,r7
+ 18: GETL R0, t14
+ 19: GETL R7, t16
+ 20: ANDL t14, t16
+ 21: PUTL t16, R12
+ 22: INCEIPL $4
+
+ 0xFEC87D8: 7D8BE378 or r11,r12,r28
+ 23: GETL R12, t18
+ 24: GETL R28, t20
+ 25: ORL t20, t18
+ 26: PUTL t18, R11
+ 27: INCEIPL $4
+
+ 0xFEC87DC: 917B0000 stw r11,0(r27)
+ 28: GETL R11, t22
+ 29: GETL R27, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0xFEC87E0: 4182000C bc 12,2,0xFEC87EC
+ 32: Js02o $0xFEC87EC
+
+
+
+. 2351 FEC87C4 32
+. 57 80 A3 3F 80 1B 00 00 38 E0 EF F3 90 7B 00 38 7C 0C 38 38 7D 8B E3 78 91 7B 00 00 41 82 00 0C
+==== BB 2352 (0xFEC87EC) approx BBs exec'd 0 ====
+
+ 0xFEC87EC: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC87F0: 48002925 bl 0xFECB114
+ 3: MOVL $0xFEC87F4, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFECB114 ($4)
+
+
+
+. 2352 FEC87EC 8
+. 7F 63 DB 78 48 00 29 25
+==== BB 2353 (0xFEC87F4) approx BBs exec'd 0 ====
+
+ 0xFEC87F4: 7F79DB79 or. r25,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R25
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFEC87F8: 41820218 bc 12,2,0xFEC8A10
+ 5: Js02o $0xFEC8A10
+
+
+
+. 2353 FEC87F4 8
+. 7F 79 DB 79 41 82 02 18
+==== BB 2354 (0xFEC87FC) approx BBs exec'd 0 ====
+
+ 0xFEC87FC: 809E05DC lwz r4,1500(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5DC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFEC8800: 387A0001 addi r3,r26,1
+ 5: GETL R26, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFEC8804: 4800EC0D bl 0xFED7410
+ 9: MOVL $0xFEC8808, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFED7410 ($4)
+
+
+
+. 2354 FEC87FC 12
+. 80 9E 05 DC 38 7A 00 01 48 00 EC 0D
+==== BB 2355 strstr(0xFED7410) approx BBs exec'd 0 ====
+
+ 0xFED7410: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED7414: 89640000 lbz r11,0(r4)
+ 6: GETL R4, t4
+ 7: LDB (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0xFED7418: 2F8B0000 cmpi cr7,r11,0
+ 10: GETL R11, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0xFED741C: 419E0078 bc 12,30,0xFED7494
+ 14: Js30o $0xFED7494
+
+
+
+. 2355 FED7410 16
+. 94 21 FF F0 89 64 00 00 2F 8B 00 00 41 9E 00 78
+==== BB 2356 (0xFED7420) approx BBs exec'd 0 ====
+
+ 0xFED7420: 3863FFFF addi r3,r3,-1
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFED7424: 8C030001 lbzu r0,1(r3)
+ 4: GETL R3, t2
+ 5: ADDL $0x1, t2
+ 6: PUTL t2, R3
+ 7: LDB (t2), t4
+ 8: PUTL t4, R0
+ 9: INCEIPL $4
+
+ 0xFED7428: 2C000000 cmpi cr0,r0,0
+ 10: GETL R0, t6
+ 11: CMP0L t6, t8 (-rSo)
+ 12: ICRFL t8, $0x0, CR
+ 13: INCEIPL $4
+
+ 0xFED742C: 7F005800 cmp cr6,r0,r11
+ 14: GETL R0, t10
+ 15: GETL R11, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0xFED7430: 41820060 bc 12,2,0xFED7490
+ 19: Js02o $0xFED7490
+
+
+
+. 2356 FED7420 20
+. 38 63 FF FF 8C 03 00 01 2C 00 00 00 7F 00 58 00 41 82 00 60
+==== BB 2357 (0xFED7434) approx BBs exec'd 0 ====
+
+ 0xFED7434: 409AFFF0 bc 4,26,0xFED7424
+ 0: Jc26o $0xFED7424
+
+
+
+. 2357 FED7434 4
+. 40 9A FF F0
+==== BB 2358 (0xFED7424) approx BBs exec'd 0 ====
+
+ 0xFED7424: 8C030001 lbzu r0,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xFED7428: 2C000000 cmpi cr0,r0,0
+ 6: GETL R0, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFED742C: 7F005800 cmp cr6,r0,r11
+ 10: GETL R0, t8
+ 11: GETL R11, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x6, CR
+ 14: INCEIPL $4
+
+ 0xFED7430: 41820060 bc 12,2,0xFED7490
+ 15: Js02o $0xFED7490
+
+
+
+. 2358 FED7424 16
+. 8C 03 00 01 2C 00 00 00 7F 00 58 00 41 82 00 60
+==== BB 2359 (0xFED7490) approx BBs exec'd 0 ====
+
+ 0xFED7490: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED7494: 38210010 addi r1,r1,16
+ 3: GETL R1, t2
+ 4: ADDL $0x10, t2
+ 5: PUTL t2, R1
+ 6: INCEIPL $4
+
+ 0xFED7498: 4E800020 blr
+ 7: GETL LR, t4
+ 8: JMPo-r t4 ($4)
+
+
+
+. 2359 FED7490 12
+. 38 60 00 00 38 21 00 10 4E 80 00 20
+==== BB 2360 (0xFEC8808) approx BBs exec'd 0 ====
+
+ 0xFEC8808: 7C7D1B79 or. r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFEC880C: 41820204 bc 12,2,0xFEC8A10
+ 5: Js02o $0xFEC8A10
+
+
+
+. 2360 FEC8808 8
+. 7C 7D 1B 79 41 82 02 04
+==== BB 2361 (0xFEC8A10) approx BBs exec'd 0 ====
+
+ 0xFEC8A10: 7F23CB78 or r3,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC8A14: 80C10000 lwz r6,0(r1)
+ 3: GETL R1, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R6
+ 6: INCEIPL $4
+
+ 0xFEC8A18: 83460004 lwz r26,4(r6)
+ 7: GETL R6, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R26
+ 11: INCEIPL $4
+
+ 0xFEC8A1C: 8326FFE4 lwz r25,-28(r6)
+ 12: GETL R6, t10
+ 13: ADDL $0xFFFFFFE4, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R25
+ 16: INCEIPL $4
+
+ 0xFEC8A20: 7F4803A6 mtlr r26
+ 17: GETL R26, t14
+ 18: PUTL t14, LR
+ 19: INCEIPL $4
+
+ 0xFEC8A24: 8366FFEC lwz r27,-20(r6)
+ 20: GETL R6, t16
+ 21: ADDL $0xFFFFFFEC, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R27
+ 24: INCEIPL $4
+
+ 0xFEC8A28: 8346FFE8 lwz r26,-24(r6)
+ 25: GETL R6, t20
+ 26: ADDL $0xFFFFFFE8, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R26
+ 29: INCEIPL $4
+
+ 0xFEC8A2C: 8386FFF0 lwz r28,-16(r6)
+ 30: GETL R6, t24
+ 31: ADDL $0xFFFFFFF0, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R28
+ 34: INCEIPL $4
+
+ 0xFEC8A30: 83A6FFF4 lwz r29,-12(r6)
+ 35: GETL R6, t28
+ 36: ADDL $0xFFFFFFF4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R29
+ 39: INCEIPL $4
+
+ 0xFEC8A34: 83C6FFF8 lwz r30,-8(r6)
+ 40: GETL R6, t32
+ 41: ADDL $0xFFFFFFF8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R30
+ 44: INCEIPL $4
+
+ 0xFEC8A38: 83E6FFFC lwz r31,-4(r6)
+ 45: GETL R6, t36
+ 46: ADDL $0xFFFFFFFC, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R31
+ 49: INCEIPL $4
+
+ 0xFEC8A3C: 7CC13378 or r1,r6,r6
+ 50: GETL R6, t40
+ 51: PUTL t40, R1
+ 52: INCEIPL $4
+
+ 0xFEC8A40: 4E800020 blr
+ 53: GETL LR, t42
+ 54: JMPo-r t42 ($4)
+
+
+
+. 2361 FEC8A10 52
+. 7F 23 CB 78 80 C1 00 00 83 46 00 04 83 26 FF E4 7F 48 03 A6 83 66 FF EC 83 46 FF E8 83 86 FF F0 83 A6 FF F4 83 C6 FF F8 83 E6 FF FC 7C C1 33 78 4E 80 00 20
+==== BB 2362 (0xFEBC540) approx BBs exec'd 0 ====
+
+ 0xFEBC540: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFEBC544: 7FE3FB78 or r3,r31,r31
+ 4: GETL R31, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFEBC548: 419E0034 bc 12,30,0xFEBC57C
+ 7: Js30o $0xFEBC57C
+
+
+
+. 2362 FEBC540 12
+. 2F 83 00 00 7F E3 FB 78 41 9E 00 34
+==== BB 2363 (0xFEBC54C) approx BBs exec'd 0 ====
+
+ 0xFEBC54C: 4BFFFF01 bl 0xFEBC44C
+ 0: MOVL $0xFEBC550, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFEBC44C ($4)
+
+
+
+. 2363 FEBC54C 4
+. 4B FF FF 01
+==== BB 2364 __fopen_maybe_mmap(0xFEBC44C) approx BBs exec'd 0 ====
+
+ 0xFEBC44C: 8003003C lwz r0,60(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x3C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEBC450: 7D8802A6 mflr r12
+ 5: GETL LR, t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0xFEBC454: 9421FFF0 stwu r1,-16(r1)
+ 8: GETL R1, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xFFFFFFF0, t8
+ 11: PUTL t8, R1
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEBC458: 480EB9F9 bl 0xFFA7E50
+ 14: MOVL $0xFEBC45C, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2364 FEBC44C 16
+. 80 03 00 3C 7D 88 02 A6 94 21 FF F0 48 0E B9 F9
+==== BB 2365 (0xFEBC45C) approx BBs exec'd 0 ====
+
+ 0xFEBC45C: 70090001 andi. r9,r0,0x1
+ 0: GETL R0, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R9
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEBC460: 93C10008 stw r30,8(r1)
+ 6: GETL R30, t4
+ 7: GETL R1, t6
+ 8: ADDL $0x8, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0xFEBC464: 7FC802A6 mflr r30
+ 11: GETL LR, t8
+ 12: PUTL t8, R30
+ 13: INCEIPL $4
+
+ 0xFEBC468: 7D8803A6 mtlr r12
+ 14: GETL R12, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xFEBC46C: 4182002C bc 12,2,0xFEBC498
+ 17: Js02o $0xFEBC498
+
+
+
+. 2365 FEBC45C 20
+. 70 09 00 01 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 41 82 00 2C
+==== BB 2366 (0xFEBC498) approx BBs exec'd 0 ====
+
+ 0xFEBC498: 83C10008 lwz r30,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R30
+ 4: INCEIPL $4
+
+ 0xFEBC49C: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFEBC4A0: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+
+. 2366 FEBC498 12
+. 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 2367 (0xFEBC550) approx BBs exec'd 0 ====
+
+ 0xFEBC550: 7C691B78 or r9,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0xFEBC554: 80A10024 lwz r5,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFEBC558: 7D234B78 or r3,r9,r9
+ 8: GETL R9, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFEBC55C: 8361000C lwz r27,12(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0xC, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R27
+ 15: INCEIPL $4
+
+ 0xFEBC560: 83810010 lwz r28,16(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x10, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0xFEBC564: 7CA803A6 mtlr r5
+ 21: GETL R5, t16
+ 22: PUTL t16, LR
+ 23: INCEIPL $4
+
+ 0xFEBC568: 83A10014 lwz r29,20(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x14, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R29
+ 28: INCEIPL $4
+
+ 0xFEBC56C: 83C10018 lwz r30,24(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x18, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R30
+ 33: INCEIPL $4
+
+ 0xFEBC570: 83E1001C lwz r31,28(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x1C, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R31
+ 38: INCEIPL $4
+
+ 0xFEBC574: 38210020 addi r1,r1,32
+ 39: GETL R1, t30
+ 40: ADDL $0x20, t30
+ 41: PUTL t30, R1
+ 42: INCEIPL $4
+
+ 0xFEBC578: 4E800020 blr
+ 43: GETL LR, t32
+ 44: JMPo-r t32 ($4)
+
+
+
+. 2367 FEBC550 44
+. 7C 69 1B 78 80 A1 00 24 7D 23 4B 78 83 61 00 0C 83 81 00 10 7C A8 03 A6 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2368 (0xFEBC5A8) approx BBs exec'd 0 ====
+
+ 0xFEBC5A8: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEBC5AC: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFEBC5B0: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFEBC5B4: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 2368 FEBC5A8 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 2369 (0xFE8D068) approx BBs exec'd 0 ====
+
+ 0xFE8D068: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE8D06C: 7C7B1B79 or. r27,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R27
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFE8D070: 4182039C bc 12,2,0xFE8D40C
+ 8: Js02o $0xFE8D40C
+
+
+
+. 2369 FE8D068 12
+. 38 00 00 00 7C 7B 1B 79 41 82 03 9C
+==== BB 2370 (0xFE8D074) approx BBs exec'd 0 ====
+
+ 0xFE8D074: 38800002 li r4,2
+ 0: MOVL $0x2, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE8D078: 39C00000 li r14,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R14
+ 5: INCEIPL $4
+
+ 0xFE8D07C: 4803A2E1 bl 0xFEC735C
+ 6: MOVL $0xFE8D080, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFEC735C ($4)
+
+
+
+. 2370 FE8D074 12
+. 38 80 00 02 39 C0 00 00 48 03 A2 E1
+==== BB 2371 __fsetlocking_internal(0xFEC735C) approx BBs exec'd 0 ====
+
+ 0xFEC735C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEC7360: 2F040000 cmpi cr6,r4,0
+ 6: GETL R4, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFEC7364: 81230000 lwz r9,0(r3)
+ 10: GETL R3, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0xFEC7368: 2F840002 cmpi cr7,r4,2
+ 14: GETL R4, t12
+ 15: MOVL $0x2, t16
+ 16: CMPL t12, t16, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0xFEC736C: 71208000 andi. r0,r9,0x8000
+ 19: GETL R9, t18
+ 20: ANDL $0x8000, t18
+ 21: PUTL t18, R0
+ 22: CMP0L t18, t20 (-rSo)
+ 23: ICRFL t20, $0x0, CR
+ 24: INCEIPL $4
+
+ 0xFEC7370: 5529045E rlwinm r9,r9,0,17,15
+ 25: GETL R9, t22
+ 26: ANDL $0xFFFF7FFF, t22
+ 27: PUTL t22, R9
+ 28: INCEIPL $4
+
+ 0xFEC7374: 7C000026 mfcr r0
+ 29: GETL CR, t24
+ 30: PUTL t24, R0
+ 31: INCEIPL $4
+
+ 0xFEC7378: 54001FFE rlwinm r0,r0,3,31,31
+ 32: GETL R0, t26
+ 33: ROLL $0x3, t26
+ 34: ANDL $0x1, t26
+ 35: PUTL t26, R0
+ 36: INCEIPL $4
+
+ 0xFEC737C: 20000002 subfic r0,r0,2
+ 37: GETL R0, t28
+ 38: MOVL $0x2, t30
+ 39: SBBL t28, t30 (-wCa)
+ 40: PUTL t30, R0
+ 41: INCEIPL $4
+
+ 0xFEC7380: 419A0010 bc 12,26,0xFEC7390
+ 42: Js26o $0xFEC7390
+
+
+
+. 2371 FEC735C 40
+. 94 21 FF F0 2F 04 00 00 81 23 00 00 2F 84 00 02 71 20 80 00 55 29 04 5E 7C 00 00 26 54 00 1F FE 20 00 00 02 41 9A 00 10
+==== BB 2372 (0xFEC7384) approx BBs exec'd 0 ====
+
+ 0xFEC7384: 612B8000 ori r11,r9,0x8000
+ 0: GETL R9, t0
+ 1: ORL $0x8000, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFEC7388: 419E0014 bc 12,30,0xFEC739C
+ 4: Js30o $0xFEC739C
+
+
+
+. 2372 FEC7384 8
+. 61 2B 80 00 41 9E 00 14
+==== BB 2373 (0xFEC739C) approx BBs exec'd 0 ====
+
+ 0xFEC739C: 91630000 stw r11,0(r3)
+ 0: GETL R11, t0
+ 1: GETL R3, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFEC73A0: 38210010 addi r1,r1,16
+ 4: GETL R1, t4
+ 5: ADDL $0x10, t4
+ 6: PUTL t4, R1
+ 7: INCEIPL $4
+
+ 0xFEC73A4: 7C030378 or r3,r0,r0
+ 8: GETL R0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFEC73A8: 4E800020 blr
+ 11: GETL LR, t8
+ 12: JMPo-r t8 ($4)
+
+
+
+. 2373 FEC739C 16
+. 91 63 00 00 38 21 00 10 7C 03 03 78 4E 80 00 20
+==== BB 2374 (0xFE8D080) approx BBs exec'd 0 ====
+
+ 0xFE8D080: 807B0000 lwz r3,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE8D084: 70690010 andi. r9,r3,0x10
+ 4: GETL R3, t4
+ 5: ANDL $0x10, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFE8D088: 40820370 bc 4,2,0xFE8D3F8
+ 10: Jc02o $0xFE8D3F8
+
+
+
+. 2374 FE8D080 12
+. 80 7B 00 00 70 69 00 10 40 82 03 70
+==== BB 2375 (0xFE8D08C) approx BBs exec'd 0 ====
+
+ 0xFE8D08C: 81FE1D50 lwz r15,7504(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1D50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R15
+ 4: INCEIPL $4
+
+ 0xFE8D090: 3B5F0010 addi r26,r31,16
+ 5: GETL R31, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R26
+ 8: INCEIPL $4
+
+ 0xFE8D094: 7E0F1214 add r16,r15,r2
+ 9: GETL R15, t6
+ 10: GETL R2, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R16
+ 13: INCEIPL $4
+
+ 0xFE8D098: 825E1CF8 lwz r18,7416(r30)
+ 14: GETL R30, t10
+ 15: ADDL $0x1CF8, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R18
+ 18: INCEIPL $4
+
+ 0xFE8D09C: 921F01A4 stw r16,420(r31)
+ 19: GETL R16, t14
+ 20: GETL R31, t16
+ 21: ADDL $0x1A4, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFE8D0A0: 7E0F8378 or r15,r16,r16
+ 24: GETL R16, t18
+ 25: PUTL t18, R15
+ 26: INCEIPL $4
+
+ 0xFE8D0A4: 921F01A0 stw r16,416(r31)
+ 27: GETL R16, t20
+ 28: GETL R31, t22
+ 29: ADDL $0x1A0, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFE8D0A8: 7F43D378 or r3,r26,r26
+ 32: GETL R26, t24
+ 33: PUTL t24, R3
+ 34: INCEIPL $4
+
+ 0xFE8D0AC: 38800190 li r4,400
+ 35: MOVL $0x190, t26
+ 36: PUTL t26, R4
+ 37: INCEIPL $4
+
+ 0xFE8D0B0: 7F65DB78 or r5,r27,r27
+ 38: GETL R27, t28
+ 39: PUTL t28, R5
+ 40: INCEIPL $4
+
+ 0xFE8D0B4: 4803AFC5 bl 0xFEC8078
+ 41: MOVL $0xFE8D0B8, t30
+ 42: PUTL t30, LR
+ 43: JMPo-c $0xFEC8078 ($4)
+
+
+
+. 2375 FE8D08C 44
+. 81 FE 1D 50 3B 5F 00 10 7E 0F 12 14 82 5E 1C F8 92 1F 01 A4 7E 0F 83 78 92 1F 01 A0 7F 43 D3 78 38 80 01 90 7F 65 DB 78 48 03 AF C5
+==== BB 2376 fgets_unlocked(0xFEC8078) approx BBs exec'd 0 ====
+
+ 0xFEC8078: 2C040000 cmpi cr0,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEC807C: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFEC8080: 9421FFE0 stwu r1,-32(r1)
+ 7: GETL R1, t6
+ 8: GETL R1, t8
+ 9: ADDL $0xFFFFFFE0, t8
+ 10: PUTL t8, R1
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEC8084: 480DFDCD bl 0xFFA7E50
+ 13: MOVL $0xFEC8088, t10
+ 14: PUTL t10, LR
+ 15: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2376 FEC8078 16
+. 2C 04 00 00 7C 08 02 A6 94 21 FF E0 48 0D FD CD
+==== BB 2377 (0xFEC8088) approx BBs exec'd 0 ====
+
+ 0xFEC8088: 93E1001C stw r31,28(r1)
+ 0: GETL R31, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x1C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEC808C: 7CBF2B78 or r31,r5,r5
+ 5: GETL R5, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0xFEC8090: 93A10014 stw r29,20(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEC8094: 38A4FFFF addi r5,r4,-1
+ 13: GETL R4, t10
+ 14: ADDL $0xFFFFFFFF, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0xFEC8098: 93C10018 stw r30,24(r1)
+ 17: GETL R30, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x18, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFEC809C: 7C7D1B78 or r29,r3,r3
+ 22: GETL R3, t16
+ 23: PUTL t16, R29
+ 24: INCEIPL $4
+
+ 0xFEC80A0: 7C641B78 or r4,r3,r3
+ 25: GETL R3, t18
+ 26: PUTL t18, R4
+ 27: INCEIPL $4
+
+ 0xFEC80A4: 93810010 stw r28,16(r1)
+ 28: GETL R28, t20
+ 29: GETL R1, t22
+ 30: ADDL $0x10, t22
+ 31: STL t20, (t22)
+ 32: INCEIPL $4
+
+ 0xFEC80A8: 90010024 stw r0,36(r1)
+ 33: GETL R0, t24
+ 34: GETL R1, t26
+ 35: ADDL $0x24, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0xFEC80AC: 7FC802A6 mflr r30
+ 38: GETL LR, t28
+ 39: PUTL t28, R30
+ 40: INCEIPL $4
+
+ 0xFEC80B0: 38C0000A li r6,10
+ 41: MOVL $0xA, t30
+ 42: PUTL t30, R6
+ 43: INCEIPL $4
+
+ 0xFEC80B4: 38E00001 li r7,1
+ 44: MOVL $0x1, t32
+ 45: PUTL t32, R7
+ 46: INCEIPL $4
+
+ 0xFEC80B8: 7FE3FB78 or r3,r31,r31
+ 47: GETL R31, t34
+ 48: PUTL t34, R3
+ 49: INCEIPL $4
+
+ 0xFEC80BC: 39200000 li r9,0
+ 50: MOVL $0x0, t36
+ 51: PUTL t36, R9
+ 52: INCEIPL $4
+
+ 0xFEC80C0: 40810034 bc 4,1,0xFEC80F4
+ 53: Jc01o $0xFEC80F4
+
+
+
+. 2377 FEC8088 60
+. 93 E1 00 1C 7C BF 2B 78 93 A1 00 14 38 A4 FF FF 93 C1 00 18 7C 7D 1B 78 7C 64 1B 78 93 81 00 10 90 01 00 24 7F C8 02 A6 38 C0 00 0A 38 E0 00 01 7F E3 FB 78 39 20 00 00 40 81 00 34
+==== BB 2378 (0xFEC80C4) approx BBs exec'd 0 ====
+
+ 0xFEC80C4: 811F0000 lwz r8,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0xFEC80C8: 550906F2 rlwinm r9,r8,0,27,25
+ 4: GETL R8, t4
+ 5: ANDL $0xFFFFFFDF, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xFEC80CC: 551C06B4 rlwinm r28,r8,0,26,26
+ 8: GETL R8, t6
+ 9: ANDL $0x20, t6
+ 10: PUTL t6, R28
+ 11: INCEIPL $4
+
+ 0xFEC80D0: 913F0000 stw r9,0(r31)
+ 12: GETL R9, t8
+ 13: GETL R31, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFEC80D4: 4BFF56F9 bl 0xFEBD7CC
+ 16: MOVL $0xFEC80D8, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0xFEBD7CC ($4)
+
+
+
+. 2378 FEC80C4 20
+. 81 1F 00 00 55 09 06 F2 55 1C 06 B4 91 3F 00 00 4B FF 56 F9
+==== BB 2379 _IO_getline_internal(0xFEBD7CC) approx BBs exec'd 0 ====
+
+ 0xFEBD7CC: 7D0802A6 mflr r8
+ 0: GETL LR, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0xFEBD7D0: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEBD7D4: 91010014 stw r8,20(r1)
+ 9: GETL R8, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEBD7D8: 39000000 li r8,0
+ 14: MOVL $0x0, t10
+ 15: PUTL t10, R8
+ 16: INCEIPL $4
+
+ 0xFEBD7DC: 48000015 bl 0xFEBD7F0
+ 17: MOVL $0xFEBD7E0, t12
+ 18: PUTL t12, LR
+ 19: JMPo-c $0xFEBD7F0 ($4)
+
+
+
+. 2379 FEBD7CC 20
+. 7D 08 02 A6 94 21 FF F0 91 01 00 14 39 00 00 00 48 00 00 15
+==== BB 2380 _IO_getline_info_internal(0xFEBD7F0) approx BBs exec'd 0 ====
+
+ 0xFEBD7F0: 7D800026 mfcr r12
+ 0: GETL CR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0xFEBD7F4: 2D880000 cmpi cr3,r8,0
+ 3: GETL R8, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x3, CR
+ 6: INCEIPL $4
+
+ 0xFEBD7F8: 7C0802A6 mflr r0
+ 7: GETL LR, t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFEBD7FC: 9421FFC0 stwu r1,-64(r1)
+ 10: GETL R1, t8
+ 11: GETL R1, t10
+ 12: ADDL $0xFFFFFFC0, t10
+ 13: PUTL t10, R1
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFEBD800: 480EA651 bl 0xFFA7E50
+ 16: MOVL $0xFEBD804, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2380 FEBD7F0 20
+. 7D 80 00 26 2D 88 00 00 7C 08 02 A6 94 21 FF C0 48 0E A6 51
+==== BB 2381 (0xFEBD804) approx BBs exec'd 0 ====
+
+ 0xFEBD804: 92C10018 stw r22,24(r1)
+ 0: GETL R22, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEBD808: 92E1001C stw r23,28(r1)
+ 5: GETL R23, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x1C, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFEBD80C: 7D164378 or r22,r8,r8
+ 10: GETL R8, t8
+ 11: PUTL t8, R22
+ 12: INCEIPL $4
+
+ 0xFEBD810: 93010020 stw r24,32(r1)
+ 13: GETL R24, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x20, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEBD814: 7C972378 or r23,r4,r4
+ 18: GETL R4, t14
+ 19: PUTL t14, R23
+ 20: INCEIPL $4
+
+ 0xFEBD818: 93410028 stw r26,40(r1)
+ 21: GETL R26, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x28, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEBD81C: 7CD83378 or r24,r6,r6
+ 26: GETL R6, t20
+ 27: PUTL t20, R24
+ 28: INCEIPL $4
+
+ 0xFEBD820: 9361002C stw r27,44(r1)
+ 29: GETL R27, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x2C, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFEBD824: 7C9A2378 or r26,r4,r4
+ 34: GETL R4, t26
+ 35: PUTL t26, R26
+ 36: INCEIPL $4
+
+ 0xFEBD828: 93810030 stw r28,48(r1)
+ 37: GETL R28, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x30, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFEBD82C: 7C7B1B78 or r27,r3,r3
+ 42: GETL R3, t32
+ 43: PUTL t32, R27
+ 44: INCEIPL $4
+
+ 0xFEBD830: 93C10038 stw r30,56(r1)
+ 45: GETL R30, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x38, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0xFEBD834: 7CBC2B78 or r28,r5,r5
+ 50: GETL R5, t38
+ 51: PUTL t38, R28
+ 52: INCEIPL $4
+
+ 0xFEBD838: 93E1003C stw r31,60(r1)
+ 53: GETL R31, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x3C, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0xFEBD83C: 7FC802A6 mflr r30
+ 58: GETL LR, t44
+ 59: PUTL t44, R30
+ 60: INCEIPL $4
+
+ 0xFEBD840: 93210024 stw r25,36(r1)
+ 61: GETL R25, t46
+ 62: GETL R1, t48
+ 63: ADDL $0x24, t48
+ 64: STL t46, (t48)
+ 65: INCEIPL $4
+
+ 0xFEBD844: 7CFF3B78 or r31,r7,r7
+ 66: GETL R7, t50
+ 67: PUTL t50, R31
+ 68: INCEIPL $4
+
+ 0xFEBD848: 93A10034 stw r29,52(r1)
+ 69: GETL R29, t52
+ 70: GETL R1, t54
+ 71: ADDL $0x34, t54
+ 72: STL t52, (t54)
+ 73: INCEIPL $4
+
+ 0xFEBD84C: 90010044 stw r0,68(r1)
+ 74: GETL R0, t56
+ 75: GETL R1, t58
+ 76: ADDL $0x44, t58
+ 77: STL t56, (t58)
+ 78: INCEIPL $4
+
+ 0xFEBD850: 91810014 stw r12,20(r1)
+ 79: GETL R12, t60
+ 80: GETL R1, t62
+ 81: ADDL $0x14, t62
+ 82: STL t60, (t62)
+ 83: INCEIPL $4
+
+ 0xFEBD854: 418E000C bc 12,14,0xFEBD860
+ 84: Js14o $0xFEBD860
+
+
+
+. 2381 FEBD804 84
+. 92 C1 00 18 92 E1 00 1C 7D 16 43 78 93 01 00 20 7C 97 23 78 93 41 00 28 7C D8 33 78 93 61 00 2C 7C 9A 23 78 93 81 00 30 7C 7B 1B 78 93 C1 00 38 7C BC 2B 78 93 E1 00 3C 7F C8 02 A6 93 21 00 24 7C FF 3B 78 93 A1 00 34 90 01 00 44 91 81 00 14 41 8E 00 0C
+==== BB 2382 (0xFEBD860) approx BBs exec'd 0 ====
+
+ 0xFEBD860: 80BB0060 lwz r5,96(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFEBD864: 2F850000 cmpi cr7,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFEBD868: 419E0150 bc 12,30,0xFEBD9B8
+ 9: Js30o $0xFEBD9B8
+
+
+
+. 2382 FEBD860 12
+. 80 BB 00 60 2F 85 00 00 41 9E 01 50
+==== BB 2383 (0xFEBD9B8) approx BBs exec'd 0 ====
+
+ 0xFEBD9B8: 80DE1DC8 lwz r6,7624(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1DC8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFEBD9BC: 2C060000 cmpi cr0,r6,0
+ 5: GETL R6, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFEBD9C0: 4182002C bc 12,2,0xFEBD9EC
+ 9: Js02o $0xFEBD9EC
+
+
+
+. 2383 FEBD9B8 12
+. 80 DE 1D C8 2C 06 00 00 41 82 00 2C
+==== BB 2384 (0xFEBD9C4) approx BBs exec'd 0 ====
+
+ 0xFEBD9C4: 3860FFFF li r3,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEBD9C8: 907B0060 stw r3,96(r27)
+ 3: GETL R3, t2
+ 4: GETL R27, t4
+ 5: ADDL $0x60, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFEBD9CC: 4BFFFEA0 b 0xFEBD86C
+ 8: JMPo $0xFEBD86C ($4)
+
+
+
+. 2384 FEBD9C4 12
+. 38 60 FF FF 90 7B 00 60 4B FF FE A0
+==== BB 2385 (0xFEBD86C) approx BBs exec'd 0 ====
+
+ 0xFEBD86C: 2C9C0000 cmpi cr1,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFEBD870: 41860070 bc 12,6,0xFEBD8E0
+ 4: Js06o $0xFEBD8E0
+
+
+
+. 2385 FEBD86C 8
+. 2C 9C 00 00 41 86 00 70
+==== BB 2386 (0xFEBD874) approx BBs exec'd 0 ====
+
+ 0xFEBD874: 2E1F0000 cmpi cr4,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFEBD878: 4D100000 mcrf cr2,cr4
+ 4: ICRFL CR, $0x2, CR
+ 5: INCEIPL $4
+
+ 0xFEBD87C: 83BB0004 lwz r29,4(r27)
+ 6: GETL R27, t4
+ 7: ADDL $0x4, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R29
+ 10: INCEIPL $4
+
+ 0xFEBD880: 7F63DB78 or r3,r27,r27
+ 11: GETL R27, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0xFEBD884: 80FB0008 lwz r7,8(r27)
+ 14: GETL R27, t10
+ 15: ADDL $0x8, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0xFEBD888: 7F04C378 or r4,r24,r24
+ 19: GETL R24, t14
+ 20: PUTL t14, R4
+ 21: INCEIPL $4
+
+ 0xFEBD88C: 7FFD3851 subf. r31,r29,r7
+ 22: GETL R29, t16
+ 23: GETL R7, t18
+ 24: SUBL t16, t18
+ 25: PUTL t18, R31
+ 26: CMP0L t18, t20 (-rSo)
+ 27: ICRFL t20, $0x0, CR
+ 28: INCEIPL $4
+
+ 0xFEBD890: 7F9FE040 cmpl cr7,r31,r28
+ 29: GETL R31, t22
+ 30: GETL R28, t24
+ 31: CMPUL t22, t24, t26 (-rSo)
+ 32: ICRFL t26, $0x7, CR
+ 33: INCEIPL $4
+
+ 0xFEBD894: 40810090 bc 4,1,0xFEBD924
+ 34: Jc01o $0xFEBD924
+
+
+
+. 2386 FEBD874 36
+. 2E 1F 00 00 4D 10 00 00 83 BB 00 04 7F 63 DB 78 80 FB 00 08 7F 04 C3 78 7F FD 38 51 7F 9F E0 40 40 81 00 90
+==== BB 2387 (0xFEBD924) approx BBs exec'd 0 ====
+
+ 0xFEBD924: 4800E089 bl 0xFECB9AC
+ 0: MOVL $0xFEBD928, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFECB9AC ($4)
+
+
+
+. 2387 FEBD924 4
+. 48 00 E0 89
+==== BB 2388 __GI___uflow(0xFECB9AC) approx BBs exec'd 0 ====
+
+ 0xFECB9AC: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFECB9B0: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECB9B4: 93C10008 stw r30,8(r1)
+ 9: GETL R30, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECB9B8: 480DC499 bl 0xFFA7E50
+ 14: MOVL $0xFECB9BC, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2388 FECB9AC 16
+. 7C 88 02 A6 94 21 FF F0 93 C1 00 08 48 0D C4 99
+==== BB 2389 (0xFECB9BC) approx BBs exec'd 0 ====
+
+ 0xFECB9BC: 93E1000C stw r31,12(r1)
+ 0: GETL R31, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECB9C0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFECB9C4: 90810014 stw r4,20(r1)
+ 8: GETL R4, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFECB9C8: 7C7F1B78 or r31,r3,r3
+ 13: GETL R3, t10
+ 14: PUTL t10, R31
+ 15: INCEIPL $4
+
+ 0xFECB9CC: 88030046 lbz r0,70(r3)
+ 16: GETL R3, t12
+ 17: ADDL $0x46, t12
+ 18: LDB (t12), t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0xFECB9D0: 2F800000 cmpi cr7,r0,0
+ 21: GETL R0, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0xFECB9D4: 409E0030 bc 4,30,0xFECBA04
+ 25: Jc30o $0xFECBA04
+
+
+
+. 2389 FECB9BC 28
+. 93 E1 00 0C 7F C8 02 A6 90 81 00 14 7C 7F 1B 78 88 03 00 46 2F 80 00 00 40 9E 00 30
+==== BB 2390 (0xFECB9D8) approx BBs exec'd 0 ====
+
+ 0xFECB9D8: 80BE1DC8 lwz r5,7624(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1DC8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFECB9DC: 2C050000 cmpi cr0,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFECB9E0: 41820180 bc 12,2,0xFECBB60
+ 9: Js02o $0xFECBB60
+
+
+
+. 2390 FECB9D8 12
+. 80 BE 1D C8 2C 05 00 00 41 82 01 80
+==== BB 2391 (0xFECB9E4) approx BBs exec'd 0 ====
+
+ 0xFECB9E4: 80630060 lwz r3,96(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECB9E8: 2C830000 cmpi cr1,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFECB9EC: 4086000C bc 4,6,0xFECB9F8
+ 9: Jc06o $0xFECB9F8
+
+
+
+. 2391 FECB9E4 12
+. 80 63 00 60 2C 83 00 00 40 86 00 0C
+==== BB 2392 (0xFECB9F8) approx BBs exec'd 0 ====
+
+ 0xFECB9F8: 2F03FFFF cmpi cr6,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFECB9FC: 3800FFFF li r0,-1
+ 5: MOVL $0xFFFFFFFF, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xFECBA00: 409A00E0 bc 4,26,0xFECBAE0
+ 8: Jc26o $0xFECBAE0
+
+
+
+. 2392 FECB9F8 12
+. 2F 03 FF FF 38 00 FF FF 40 9A 00 E0
+==== BB 2393 (0xFECBA04) approx BBs exec'd 0 ====
+
+ 0xFECBA04: 807F0060 lwz r3,96(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECBA08: 2F830000 cmpi cr7,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFECBA0C: 419E0084 bc 12,30,0xFECBA90
+ 9: Js30o $0xFECBA90
+
+
+
+. 2393 FECBA04 12
+. 80 7F 00 60 2F 83 00 00 41 9E 00 84
+==== BB 2394 (0xFECBA10) approx BBs exec'd 0 ====
+
+ 0xFECBA10: 811F0000 lwz r8,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0xFECBA14: 71090800 andi. r9,r8,0x800
+ 4: GETL R8, t4
+ 5: ANDL $0x800, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECBA18: 40820098 bc 4,2,0xFECBAB0
+ 10: Jc02o $0xFECBAB0
+
+
+
+. 2394 FECBA10 12
+. 81 1F 00 00 71 09 08 00 40 82 00 98
+==== BB 2395 (0xFECBA1C) approx BBs exec'd 0 ====
+
+ 0xFECBA1C: 813F0004 lwz r9,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFECBA20: 809F0008 lwz r4,8(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFECBA24: 7F092040 cmpl cr6,r9,r4
+ 10: GETL R9, t8
+ 11: GETL R4, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x6, CR
+ 14: INCEIPL $4
+
+ 0xFECBA28: 419800AC bc 12,24,0xFECBAD4
+ 15: Js24o $0xFECBAD4
+
+
+
+. 2395 FECBA1C 16
+. 81 3F 00 04 80 9F 00 08 7F 09 20 40 41 98 00 AC
+==== BB 2396 (0xFECBA2C) approx BBs exec'd 0 ====
+
+ 0xFECBA2C: 815F0000 lwz r10,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFECBA30: 71490100 andi. r9,r10,0x100
+ 4: GETL R10, t4
+ 5: ANDL $0x100, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECBA34: 408200D4 bc 4,2,0xFECBB08
+ 10: Jc02o $0xFECBB08
+
+
+
+. 2396 FECBA2C 12
+. 81 5F 00 00 71 49 01 00 40 82 00 D4
+==== BB 2397 (0xFECBA38) approx BBs exec'd 0 ====
+
+ 0xFECBA38: 817F0030 lwz r11,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFECBA3C: 2C8B0000 cmpi cr1,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFECBA40: 408600E4 bc 4,6,0xFECBB24
+ 9: Jc06o $0xFECBB24
+
+
+
+. 2397 FECBA38 12
+. 81 7F 00 30 2C 8B 00 00 40 86 00 E4
+==== BB 2398 (0xFECBA44) approx BBs exec'd 0 ====
+
+ 0xFECBA44: 819F0024 lwz r12,36(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFECBA48: 2C0C0000 cmpi cr0,r12,0
+ 5: GETL R12, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFECBA4C: 408200B0 bc 4,2,0xFECBAFC
+ 9: Jc02o $0xFECBAFC
+
+
+
+. 2398 FECBA44 12
+. 81 9F 00 24 2C 0C 00 00 40 82 00 B0
+==== BB 2399 (0xFECBA50) approx BBs exec'd 0 ====
+
+ 0xFECBA50: 88DF0046 lbz r6,70(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFECBA54: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFECBA58: 7CC00774 extsb r0,r6
+ 8: GETB R6, t6
+ 9: WIDENL_Bs _st6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0xFECBA5C: 7CA0FA14 add r5,r0,r31
+ 12: GETL R0, t8
+ 13: GETL R31, t10
+ 14: ADDL t8, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0xFECBA60: 80850098 lwz r4,152(r5)
+ 17: GETL R5, t12
+ 18: ADDL $0x98, t12
+ 19: LDL (t12), t14
+ 20: PUTL t14, R4
+ 21: INCEIPL $4
+
+ 0xFECBA64: 83E40014 lwz r31,20(r4)
+ 22: GETL R4, t16
+ 23: ADDL $0x14, t16
+ 24: LDL (t16), t18
+ 25: PUTL t18, R31
+ 26: INCEIPL $4
+
+ 0xFECBA68: 7FE903A6 mtctr r31
+ 27: GETL R31, t20
+ 28: PUTL t20, CTR
+ 29: INCEIPL $4
+
+ 0xFECBA6C: 4E800421 bctrl
+ 30: MOVL $0xFECBA70, t22
+ 31: PUTL t22, LR
+ 32: GETL CTR, t24
+ 33: JMPo-c t24 ($4)
+
+
+
+. 2399 FECBA50 32
+. 88 DF 00 46 7F E3 FB 78 7C C0 07 74 7C A0 FA 14 80 85 00 98 83 E4 00 14 7F E9 03 A6 4E 80 04 21
+==== BB 2400 _IO_default_uflow_internal(0xFECBCF0) approx BBs exec'd 0 ====
+
+ 0xFECBCF0: 7CC802A6 mflr r6
+ 0: GETL LR, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0xFECBCF4: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECBCF8: 93E10008 stw r31,8(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECBCFC: 7C7F1B78 or r31,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0xFECBD00: 90C10014 stw r6,20(r1)
+ 17: GETL R6, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFECBD04: 88A30046 lbz r5,70(r3)
+ 22: GETL R3, t16
+ 23: ADDL $0x46, t16
+ 24: LDB (t16), t18
+ 25: PUTL t18, R5
+ 26: INCEIPL $4
+
+ 0xFECBD08: 7CA00774 extsb r0,r5
+ 27: GETB R5, t20
+ 28: WIDENL_Bs _st20
+ 29: PUTL t20, R0
+ 30: INCEIPL $4
+
+ 0xFECBD0C: 7D201A14 add r9,r0,r3
+ 31: GETL R0, t22
+ 32: GETL R3, t24
+ 33: ADDL t22, t24
+ 34: PUTL t24, R9
+ 35: INCEIPL $4
+
+ 0xFECBD10: 80890098 lwz r4,152(r9)
+ 36: GETL R9, t26
+ 37: ADDL $0x98, t26
+ 38: LDL (t26), t28
+ 39: PUTL t28, R4
+ 40: INCEIPL $4
+
+ 0xFECBD14: 81640010 lwz r11,16(r4)
+ 41: GETL R4, t30
+ 42: ADDL $0x10, t30
+ 43: LDL (t30), t32
+ 44: PUTL t32, R11
+ 45: INCEIPL $4
+
+ 0xFECBD18: 7D6903A6 mtctr r11
+ 46: GETL R11, t34
+ 47: PUTL t34, CTR
+ 48: INCEIPL $4
+
+ 0xFECBD1C: 4E800421 bctrl
+ 49: MOVL $0xFECBD20, t36
+ 50: PUTL t36, LR
+ 51: GETL CTR, t38
+ 52: JMPo-c t38 ($4)
+
+
+
+. 2400 FECBCF0 48
+. 7C C8 02 A6 94 21 FF F0 93 E1 00 08 7C 7F 1B 78 90 C1 00 14 88 A3 00 46 7C A0 07 74 7D 20 1A 14 80 89 00 98 81 64 00 10 7D 69 03 A6 4E 80 04 21
+==== BB 2401 _IO_file_underflow@@GLIBC_2.1(0xFEC8EB8) approx BBs exec'd 0 ====
+
+ 0xFEC8EB8: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFEC8EBC: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEC8EC0: 480DEF91 bl 0xFFA7E50
+ 9: MOVL $0xFEC8EC4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2401 FEC8EB8 12
+. 7C 08 02 A6 94 21 FF E0 48 0D EF 91
+==== BB 2402 (0xFEC8EC4) approx BBs exec'd 0 ====
+
+ 0xFEC8EC4: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEC8EC8: 93E1001C stw r31,28(r1)
+ 5: GETL R31, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x1C, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFEC8ECC: 7FC802A6 mflr r30
+ 10: GETL LR, t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0xFEC8ED0: 90010024 stw r0,36(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEC8ED4: 7C7F1B78 or r31,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0xFEC8ED8: 81630000 lwz r11,0(r3)
+ 21: GETL R3, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R11
+ 24: INCEIPL $4
+
+ 0xFEC8EDC: 9361000C stw r27,12(r1)
+ 25: GETL R27, t20
+ 26: GETL R1, t22
+ 27: ADDL $0xC, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0xFEC8EE0: 71600004 andi. r0,r11,0x4
+ 30: GETL R11, t24
+ 31: ANDL $0x4, t24
+ 32: PUTL t24, R0
+ 33: CMP0L t24, t26 (-rSo)
+ 34: ICRFL t26, $0x0, CR
+ 35: INCEIPL $4
+
+ 0xFEC8EE4: 93810010 stw r28,16(r1)
+ 36: GETL R28, t28
+ 37: GETL R1, t30
+ 38: ADDL $0x10, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0xFEC8EE8: 93A10014 stw r29,20(r1)
+ 41: GETL R29, t32
+ 42: GETL R1, t34
+ 43: ADDL $0x14, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0xFEC8EEC: 40820284 bc 4,2,0xFEC9170
+ 46: Jc02o $0xFEC9170
+
+
+
+. 2402 FEC8EC4 44
+. 93 C1 00 18 93 E1 00 1C 7F C8 02 A6 90 01 00 24 7C 7F 1B 78 81 63 00 00 93 61 00 0C 71 60 00 04 93 81 00 10 93 A1 00 14 40 82 02 84
+==== BB 2403 (0xFEC8EF0) approx BBs exec'd 0 ====
+
+ 0xFEC8EF0: 80630004 lwz r3,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEC8EF4: 80BF0008 lwz r5,8(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFEC8EF8: 7F832840 cmpl cr7,r3,r5
+ 10: GETL R3, t8
+ 11: GETL R5, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFEC8EFC: 409C002C bc 4,28,0xFEC8F28
+ 15: Jc28o $0xFEC8F28
+
+
+
+. 2403 FEC8EF0 16
+. 80 63 00 04 80 BF 00 08 7F 83 28 40 40 9C 00 2C
+==== BB 2404 (0xFEC8F28) approx BBs exec'd 0 ====
+
+ 0xFEC8F28: 80DF001C lwz r6,28(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFEC8F2C: 2C860000 cmpi cr1,r6,0
+ 5: GETL R6, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFEC8F30: 4086001C bc 4,6,0xFEC8F4C
+ 9: Jc06o $0xFEC8F4C
+
+
+
+. 2404 FEC8F28 12
+. 80 DF 00 1C 2C 86 00 00 40 86 00 1C
+==== BB 2405 (0xFEC8F34) approx BBs exec'd 0 ====
+
+ 0xFEC8F34: 807F0024 lwz r3,36(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEC8F38: 2F030000 cmpi cr6,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFEC8F3C: 409A0194 bc 4,26,0xFEC90D0
+ 9: Jc26o $0xFEC90D0
+
+
+
+. 2405 FEC8F34 12
+. 80 7F 00 24 2F 03 00 00 40 9A 01 94
+==== BB 2406 (0xFEC8F40) approx BBs exec'd 0 ====
+
+ 0xFEC8F40: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC8F44: 48002D05 bl 0xFECBC48
+ 3: MOVL $0xFEC8F48, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFECBC48 ($4)
+
+
+
+. 2406 FEC8F40 8
+. 7F E3 FB 78 48 00 2D 05
+==== BB 2407 _IO_doallocbuf_internal(0xFECBC48) approx BBs exec'd 0 ====
+
+ 0xFECBC48: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFECBC4C: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECBC50: 93E10008 stw r31,8(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECBC54: 7C7F1B78 or r31,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0xFECBC58: 90810014 stw r4,20(r1)
+ 17: GETL R4, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFECBC5C: 8003001C lwz r0,28(r3)
+ 22: GETL R3, t16
+ 23: ADDL $0x1C, t16
+ 24: LDL (t16), t18
+ 25: PUTL t18, R0
+ 26: INCEIPL $4
+
+ 0xFECBC60: 2F800000 cmpi cr7,r0,0
+ 27: GETL R0, t20
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x7, CR
+ 30: INCEIPL $4
+
+ 0xFECBC64: 409E0040 bc 4,30,0xFECBCA4
+ 31: Jc30o $0xFECBCA4
+
+
+
+. 2407 FECBC48 32
+. 7C 88 02 A6 94 21 FF F0 93 E1 00 08 7C 7F 1B 78 90 81 00 14 80 03 00 1C 2F 80 00 00 40 9E 00 40
+==== BB 2408 (0xFECBC68) approx BBs exec'd 0 ====
+
+ 0xFECBC68: 80A30000 lwz r5,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFECBC6C: 70A90002 andi. r9,r5,0x2
+ 4: GETL R5, t4
+ 5: ANDL $0x2, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECBC70: 41820010 bc 12,2,0xFECBC80
+ 10: Js02o $0xFECBC80
+
+
+
+. 2408 FECBC68 12
+. 80 A3 00 00 70 A9 00 02 41 82 00 10
+==== BB 2409 (0xFECBC80) approx BBs exec'd 0 ====
+
+ 0xFECBC80: 895F0046 lbz r10,70(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFECBC84: 7D480774 extsb r8,r10
+ 5: GETB R10, t4
+ 6: WIDENL_Bs _st4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0xFECBC88: 7D28FA14 add r9,r8,r31
+ 9: GETL R8, t6
+ 10: GETL R31, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFECBC8C: 80E90098 lwz r7,152(r9)
+ 14: GETL R9, t10
+ 15: ADDL $0x98, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0xFECBC90: 81670034 lwz r11,52(r7)
+ 19: GETL R7, t14
+ 20: ADDL $0x34, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R11
+ 23: INCEIPL $4
+
+ 0xFECBC94: 7D6903A6 mtctr r11
+ 24: GETL R11, t18
+ 25: PUTL t18, CTR
+ 26: INCEIPL $4
+
+ 0xFECBC98: 4E800421 bctrl
+ 27: MOVL $0xFECBC9C, t20
+ 28: PUTL t20, LR
+ 29: GETL CTR, t22
+ 30: JMPo-c t22 ($4)
+
+
+
+. 2409 FECBC80 28
+. 89 5F 00 46 7D 48 07 74 7D 28 FA 14 80 E9 00 98 81 67 00 34 7D 69 03 A6 4E 80 04 21
+==== BB 2410 _IO_file_doallocate_internal(0xFEBB788) approx BBs exec'd 0 ====
+
+ 0xFEBB788: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFEBB78C: 9421FF70 stwu r1,-144(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFF70, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEBB790: 93A10084 stw r29,132(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x84, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEBB794: 3BA02000 li r29,8192
+ 14: MOVL $0x2000, t10
+ 15: PUTL t10, R29
+ 16: INCEIPL $4
+
+ 0xFEBB798: 93E1008C stw r31,140(r1)
+ 17: GETL R31, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x8C, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFEBB79C: 7C7F1B78 or r31,r3,r3
+ 22: GETL R3, t16
+ 23: PUTL t16, R31
+ 24: INCEIPL $4
+
+ 0xFEBB7A0: 90810094 stw r4,148(r1)
+ 25: GETL R4, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x94, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFEBB7A4: 80030038 lwz r0,56(r3)
+ 30: GETL R3, t22
+ 31: ADDL $0x38, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFEBB7A8: 93C10088 stw r30,136(r1)
+ 35: GETL R30, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x88, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFEBB7AC: 2F800000 cmpi cr7,r0,0
+ 40: GETL R0, t30
+ 41: CMP0L t30, t32 (-rSo)
+ 42: ICRFL t32, $0x7, CR
+ 43: INCEIPL $4
+
+ 0xFEBB7B0: 419C004C bc 12,28,0xFEBB7FC
+ 44: Js28o $0xFEBB7FC
+
+
+
+. 2410 FEBB788 44
+. 7C 88 02 A6 94 21 FF 70 93 A1 00 84 3B A0 20 00 93 E1 00 8C 7C 7F 1B 78 90 81 00 94 80 03 00 38 93 C1 00 88 2F 80 00 00 41 9C 00 4C
+==== BB 2411 (0xFEBB7B4) approx BBs exec'd 0 ====
+
+ 0xFEBB7B4: 88E30046 lbz r7,70(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFEBB7B8: 38810010 addi r4,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFEBB7BC: 7CE60774 extsb r6,r7
+ 9: GETB R7, t6
+ 10: WIDENL_Bs _st6
+ 11: PUTL t6, R6
+ 12: INCEIPL $4
+
+ 0xFEBB7C0: 7D261A14 add r9,r6,r3
+ 13: GETL R6, t8
+ 14: GETL R3, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0xFEBB7C4: 80A90098 lwz r5,152(r9)
+ 18: GETL R9, t12
+ 19: ADDL $0x98, t12
+ 20: LDL (t12), t14
+ 21: PUTL t14, R5
+ 22: INCEIPL $4
+
+ 0xFEBB7C8: 81650048 lwz r11,72(r5)
+ 23: GETL R5, t16
+ 24: ADDL $0x48, t16
+ 25: LDL (t16), t18
+ 26: PUTL t18, R11
+ 27: INCEIPL $4
+
+ 0xFEBB7CC: 7D6903A6 mtctr r11
+ 28: GETL R11, t20
+ 29: PUTL t20, CTR
+ 30: INCEIPL $4
+
+ 0xFEBB7D0: 4E800421 bctrl
+ 31: MOVL $0xFEBB7D4, t22
+ 32: PUTL t22, LR
+ 33: GETL CTR, t24
+ 34: JMPo-c t24 ($4)
+
+
+
+. 2411 FEBB7B4 32
+. 88 E3 00 46 38 81 00 10 7C E6 07 74 7D 26 1A 14 80 A9 00 98 81 65 00 48 7D 69 03 A6 4E 80 04 21
+==== BB 2412 _IO_file_stat_internal(0xFECA4EC) approx BBs exec'd 0 ====
+
+ 0xFECA4EC: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFECA4F0: 7C852378 or r5,r4,r4
+ 6: GETL R4, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFECA4F4: 80030038 lwz r0,56(r3)
+ 9: GETL R3, t6
+ 10: ADDL $0x38, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0xFECA4F8: 38210010 addi r1,r1,16
+ 14: GETL R1, t10
+ 15: ADDL $0x10, t10
+ 16: PUTL t10, R1
+ 17: INCEIPL $4
+
+ 0xFECA4FC: 38600003 li r3,3
+ 18: MOVL $0x3, t12
+ 19: PUTL t12, R3
+ 20: INCEIPL $4
+
+ 0xFECA500: 7C040378 or r4,r0,r0
+ 21: GETL R0, t14
+ 22: PUTL t14, R4
+ 23: INCEIPL $4
+
+ 0xFECA504: 48056DBC b 0xFF212C0
+ 24: JMPo $0xFF212C0 ($4)
+
+
+
+. 2412 FECA4EC 28
+. 94 21 FF F0 7C 85 23 78 80 03 00 38 38 21 00 10 38 60 00 03 7C 04 03 78 48 05 6D BC
+==== BB 2413 (0xFEBB7D4) approx BBs exec'd 0 ====
+
+ 0xFEBB7D4: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEBB7D8: 41800024 bc 12,0,0xFEBB7FC
+ 4: Js00o $0xFEBB7FC
+
+
+
+. 2413 FEBB7D4 8
+. 2C 03 00 00 41 80 00 24
+==== BB 2414 (0xFEBB7DC) approx BBs exec'd 0 ====
+
+ 0xFEBB7DC: 81010020 lwz r8,32(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFEBB7E0: 55030426 rlwinm r3,r8,0,16,19
+ 5: GETL R8, t4
+ 6: ANDL $0xF000, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFEBB7E4: 2C832000 cmpi cr1,r3,8192
+ 9: GETL R3, t6
+ 10: MOVL $0x2000, t10
+ 11: CMPL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x1, CR
+ 13: INCEIPL $4
+
+ 0xFEBB7E8: 41860078 bc 12,6,0xFEBB860
+ 14: Js06o $0xFEBB860
+
+
+
+. 2414 FEBB7DC 16
+. 81 01 00 20 55 03 04 26 2C 83 20 00 41 86 00 78
+==== BB 2415 (0xFEBB7EC) approx BBs exec'd 0 ====
+
+ 0xFEBB7EC: 80010048 lwz r0,72(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEBB7F0: 2C000000 cmpi cr0,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFEBB7F4: 40810008 bc 4,1,0xFEBB7FC
+ 9: Jc01o $0xFEBB7FC
+
+
+
+. 2415 FEBB7EC 12
+. 80 01 00 48 2C 00 00 00 40 81 00 08
+==== BB 2416 (0xFEBB7F8) approx BBs exec'd 0 ====
+
+ 0xFEBB7F8: 7C1D0378 or r29,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFEBB7FC: 399D0FFF addi r12,r29,4095
+ 3: GETL R29, t2
+ 4: ADDL $0xFFF, t2
+ 5: PUTL t2, R12
+ 6: INCEIPL $4
+
+ 0xFEBB800: 38600000 li r3,0
+ 7: MOVL $0x0, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0xFEBB804: 55840026 rlwinm r4,r12,0,0,19
+ 10: GETL R12, t6
+ 11: ANDL $0xFFFFF000, t6
+ 12: PUTL t6, R4
+ 13: INCEIPL $4
+
+ 0xFEBB808: 38A00003 li r5,3
+ 14: MOVL $0x3, t8
+ 15: PUTL t8, R5
+ 16: INCEIPL $4
+
+ 0xFEBB80C: 38C00022 li r6,34
+ 17: MOVL $0x22, t10
+ 18: PUTL t10, R6
+ 19: INCEIPL $4
+
+ 0xFEBB810: 38E0FFFF li r7,-1
+ 20: MOVL $0xFFFFFFFF, t12
+ 21: PUTL t12, R7
+ 22: INCEIPL $4
+
+ 0xFEBB814: 39000000 li r8,0
+ 23: MOVL $0x0, t14
+ 24: PUTL t14, R8
+ 25: INCEIPL $4
+
+ 0xFEBB818: 480729A1 bl 0xFF2E1B8
+ 26: MOVL $0xFEBB81C, t16
+ 27: PUTL t16, LR
+ 28: JMPo-c $0xFF2E1B8 ($4)
+
+
+
+. 2416 FEBB7F8 36
+. 7C 1D 03 78 39 9D 0F FF 38 60 00 00 55 84 00 26 38 A0 00 03 38 C0 00 22 38 E0 FF FF 39 00 00 00 48 07 29 A1
+==== BB 2417 mmap(0xFF2E1B8) approx BBs exec'd 0 ====
+
+ 0xFF2E1B8: 3800005A li r0,90
+ 0: MOVL $0x5A, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFF2E1BC: 44000002 sc
+ 3: JMPo-sys $0xFF2E1C0 ($4)
+
+
+
+. 2417 FF2E1B8 8
+. 38 00 00 5A 44 00 00 02
+==== BB 2418 (0xFF2E1C0) approx BBs exec'd 0 ====
+
+ 0xFF2E1C0: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 2418 FF2E1C0 4
+. 4C A3 00 20
+==== BB 2419 (0xFEBB81C) approx BBs exec'd 0 ====
+
+ 0xFEBB81C: 3800FFFF li r0,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFEBB820: 2C83FFFF cmpi cr1,r3,-1
+ 3: GETL R3, t2
+ 4: MOVL $0xFFFFFFFF, t6
+ 5: CMPL t2, t6, t4 (-rSo)
+ 6: ICRFL t4, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFEBB824: 4186001C bc 12,6,0xFEBB840
+ 8: Js06o $0xFEBB840
+
+
+
+. 2419 FEBB81C 12
+. 38 00 FF FF 2C 83 FF FF 41 86 00 1C
+==== BB 2420 (0xFEBB828) approx BBs exec'd 0 ====
+
+ 0xFEBB828: 7C641B78 or r4,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFEBB82C: 38C00001 li r6,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFEBB830: 7FE3FB78 or r3,r31,r31
+ 6: GETL R31, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFEBB834: 7CA4EA14 add r5,r4,r29
+ 9: GETL R4, t6
+ 10: GETL R29, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0xFEBB838: 48010345 bl 0xFECBB7C
+ 14: MOVL $0xFEBB83C, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFECBB7C ($4)
+
+
+
+. 2420 FEBB828 20
+. 7C 64 1B 78 38 C0 00 01 7F E3 FB 78 7C A4 EA 14 48 01 03 45
+==== BB 2421 _IO_setb_internal(0xFECBB7C) approx BBs exec'd 0 ====
+
+ 0xFECBB7C: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFECBB80: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECBB84: 9361000C stw r27,12(r1)
+ 9: GETL R27, t6
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECBB88: 7C9B2378 or r27,r4,r4
+ 14: GETL R4, t10
+ 15: PUTL t10, R27
+ 16: INCEIPL $4
+
+ 0xFECBB8C: 93810010 stw r28,16(r1)
+ 17: GETL R28, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFECBB90: 7CBC2B78 or r28,r5,r5
+ 22: GETL R5, t16
+ 23: PUTL t16, R28
+ 24: INCEIPL $4
+
+ 0xFECBB94: 90010024 stw r0,36(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x24, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFECBB98: 8123001C lwz r9,28(r3)
+ 30: GETL R3, t22
+ 31: ADDL $0x1C, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R9
+ 34: INCEIPL $4
+
+ 0xFECBB9C: 93A10014 stw r29,20(r1)
+ 35: GETL R29, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x14, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFECBBA0: 7CDD3378 or r29,r6,r6
+ 40: GETL R6, t30
+ 41: PUTL t30, R29
+ 42: INCEIPL $4
+
+ 0xFECBBA4: 2F890000 cmpi cr7,r9,0
+ 43: GETL R9, t32
+ 44: CMP0L t32, t34 (-rSo)
+ 45: ICRFL t34, $0x7, CR
+ 46: INCEIPL $4
+
+ 0xFECBBA8: 93E1001C stw r31,28(r1)
+ 47: GETL R31, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x1C, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0xFECBBAC: 93C10018 stw r30,24(r1)
+ 52: GETL R30, t40
+ 53: GETL R1, t42
+ 54: ADDL $0x18, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0xFECBBB0: 7C7F1B78 or r31,r3,r3
+ 57: GETL R3, t44
+ 58: PUTL t44, R31
+ 59: INCEIPL $4
+
+ 0xFECBBB4: 419E0028 bc 12,30,0xFECBBDC
+ 60: Js30o $0xFECBBDC
+
+
+
+. 2421 FECBB7C 60
+. 7C 08 02 A6 94 21 FF E0 93 61 00 0C 7C 9B 23 78 93 81 00 10 7C BC 2B 78 90 01 00 24 81 23 00 1C 93 A1 00 14 7C DD 33 78 2F 89 00 00 93 E1 00 1C 93 C1 00 18 7C 7F 1B 78 41 9E 00 28
+==== BB 2422 (0xFECBBDC) approx BBs exec'd 0 ====
+
+ 0xFECBBDC: 801F0000 lwz r0,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFECBBE0: 2C9D0000 cmpi cr1,r29,0
+ 4: GETL R29, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFECBBE4: 5409003C rlwinm r9,r0,0,0,30
+ 8: GETL R0, t8
+ 9: ANDL $0xFFFFFFFE, t8
+ 10: PUTL t8, R9
+ 11: INCEIPL $4
+
+ 0xFECBBE8: 937F001C stw r27,28(r31)
+ 12: GETL R27, t10
+ 13: GETL R31, t12
+ 14: ADDL $0x1C, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0xFECBBEC: 60000001 ori r0,r0,0x1
+ 17: GETL R0, t14
+ 18: ORL $0x1, t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0xFECBBF0: 939F0020 stw r28,32(r31)
+ 21: GETL R28, t16
+ 22: GETL R31, t18
+ 23: ADDL $0x20, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFECBBF4: 4186002C bc 12,6,0xFECBC20
+ 26: Js06o $0xFECBC20
+
+
+
+. 2422 FECBBDC 28
+. 80 1F 00 00 2C 9D 00 00 54 09 00 3C 93 7F 00 1C 60 00 00 01 93 9F 00 20 41 86 00 2C
+==== BB 2423 (0xFECBBF8) approx BBs exec'd 0 ====
+
+ 0xFECBBF8: 80610024 lwz r3,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECBBFC: 913F0000 stw r9,0(r31)
+ 5: GETL R9, t4
+ 6: GETL R31, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFECBC00: 8361000C lwz r27,12(r1)
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R27
+ 13: INCEIPL $4
+
+ 0xFECBC04: 7C6803A6 mtlr r3
+ 14: GETL R3, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0xFECBC08: 83810010 lwz r28,16(r1)
+ 17: GETL R1, t14
+ 18: ADDL $0x10, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R28
+ 21: INCEIPL $4
+
+ 0xFECBC0C: 83A10014 lwz r29,20(r1)
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R29
+ 26: INCEIPL $4
+
+ 0xFECBC10: 83C10018 lwz r30,24(r1)
+ 27: GETL R1, t22
+ 28: ADDL $0x18, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R30
+ 31: INCEIPL $4
+
+ 0xFECBC14: 83E1001C lwz r31,28(r1)
+ 32: GETL R1, t26
+ 33: ADDL $0x1C, t26
+ 34: LDL (t26), t28
+ 35: PUTL t28, R31
+ 36: INCEIPL $4
+
+ 0xFECBC18: 38210020 addi r1,r1,32
+ 37: GETL R1, t30
+ 38: ADDL $0x20, t30
+ 39: PUTL t30, R1
+ 40: INCEIPL $4
+
+ 0xFECBC1C: 4E800020 blr
+ 41: GETL LR, t32
+ 42: JMPo-r t32 ($4)
+
+
+
+. 2423 FECBBF8 40
+. 80 61 00 24 91 3F 00 00 83 61 00 0C 7C 68 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2424 (0xFEBB83C) approx BBs exec'd 0 ====
+
+ 0xFEBB83C: 38000001 li r0,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFEBB840: 83A10094 lwz r29,148(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x94, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFEBB844: 7C030378 or r3,r0,r0
+ 8: GETL R0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFEBB848: 83C10088 lwz r30,136(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x88, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R30
+ 15: INCEIPL $4
+
+ 0xFEBB84C: 7FA803A6 mtlr r29
+ 16: GETL R29, t12
+ 17: PUTL t12, LR
+ 18: INCEIPL $4
+
+ 0xFEBB850: 83E1008C lwz r31,140(r1)
+ 19: GETL R1, t14
+ 20: ADDL $0x8C, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R31
+ 23: INCEIPL $4
+
+ 0xFEBB854: 83A10084 lwz r29,132(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x84, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R29
+ 28: INCEIPL $4
+
+ 0xFEBB858: 38210090 addi r1,r1,144
+ 29: GETL R1, t22
+ 30: ADDL $0x90, t22
+ 31: PUTL t22, R1
+ 32: INCEIPL $4
+
+ 0xFEBB85C: 4E800020 blr
+ 33: GETL LR, t24
+ 34: JMPo-r t24 ($4)
+
+
+
+. 2424 FEBB83C 36
+. 38 00 00 01 83 A1 00 94 7C 03 03 78 83 C1 00 88 7F A8 03 A6 83 E1 00 8C 83 A1 00 84 38 21 00 90 4E 80 00 20
+==== BB 2425 (0xFECBC9C) approx BBs exec'd 0 ====
+
+ 0xFECBC9C: 2F03FFFF cmpi cr6,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFECBCA0: 419A0018 bc 12,26,0xFECBCB8
+ 5: Js26o $0xFECBCB8
+
+
+
+. 2425 FECBC9C 8
+. 2F 03 FF FF 41 9A 00 18
+==== BB 2426 (0xFECBCA4) approx BBs exec'd 0 ====
+
+ 0xFECBCA4: 80610014 lwz r3,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECBCA8: 83E10008 lwz r31,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0xFECBCAC: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xFECBCB0: 7C6803A6 mtlr r3
+ 14: GETL R3, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xFECBCB4: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 2426 FECBCA4 20
+. 80 61 00 14 83 E1 00 08 38 21 00 10 7C 68 03 A6 4E 80 00 20
+==== BB 2427 (0xFEC8F48) approx BBs exec'd 0 ====
+
+ 0xFEC8F48: 817F0000 lwz r11,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFEC8F4C: 71600202 andi. r0,r11,0x202
+ 4: GETL R11, t4
+ 5: ANDL $0x202, t4
+ 6: PUTL t4, R0
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEC8F50: 4182006C bc 12,2,0xFEC8FBC
+ 10: Js02o $0xFEC8FBC
+
+
+
+. 2427 FEC8F48 12
+. 81 7F 00 00 71 60 02 02 41 82 00 6C
+==== BB 2428 (0xFEC8FBC) approx BBs exec'd 0 ====
+
+ 0xFEC8FBC: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC8FC0: 480024A5 bl 0xFECB464
+ 3: MOVL $0xFEC8FC4, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFECB464 ($4)
+
+
+
+. 2428 FEC8FBC 8
+. 7F E3 FB 78 48 00 24 A5
+==== BB 2429 _IO_switch_to_get_mode_internal(0xFECB464) approx BBs exec'd 0 ====
+
+ 0xFECB464: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFECB468: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECB46C: 93E10008 stw r31,8(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECB470: 7C7F1B78 or r31,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0xFECB474: 90810014 stw r4,20(r1)
+ 17: GETL R4, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFECB478: 3880FFFF li r4,-1
+ 22: MOVL $0xFFFFFFFF, t16
+ 23: PUTL t16, R4
+ 24: INCEIPL $4
+
+ 0xFECB47C: 81630014 lwz r11,20(r3)
+ 25: GETL R3, t18
+ 26: ADDL $0x14, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R11
+ 29: INCEIPL $4
+
+ 0xFECB480: 80030010 lwz r0,16(r3)
+ 30: GETL R3, t22
+ 31: ADDL $0x10, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFECB484: 7F8B0040 cmpl cr7,r11,r0
+ 35: GETL R11, t26
+ 36: GETL R0, t28
+ 37: CMPUL t26, t28, t30 (-rSo)
+ 38: ICRFL t30, $0x7, CR
+ 39: INCEIPL $4
+
+ 0xFECB488: 419D0064 bc 12,29,0xFECB4EC
+ 40: Js29o $0xFECB4EC
+
+
+
+. 2429 FECB464 40
+. 7C 88 02 A6 94 21 FF F0 93 E1 00 08 7C 7F 1B 78 90 81 00 14 38 80 FF FF 81 63 00 14 80 03 00 10 7F 8B 00 40 41 9D 00 64
+==== BB 2430 (0xFECB48C) approx BBs exec'd 0 ====
+
+ 0xFECB48C: 815F0000 lwz r10,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFECB490: 71400100 andi. r0,r10,0x100
+ 4: GETL R10, t4
+ 5: ANDL $0x100, t4
+ 6: PUTL t4, R0
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECB494: 4082004C bc 4,2,0xFECB4E0
+ 10: Jc02o $0xFECB4E0
+
+
+
+. 2430 FECB48C 12
+. 81 5F 00 00 71 40 01 00 40 82 00 4C
+==== BB 2431 (0xFECB498) approx BBs exec'd 0 ====
+
+ 0xFECB498: 819F0008 lwz r12,8(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFECB49C: 811F001C lwz r8,28(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0xFECB4A0: 7C8B6040 cmpl cr1,r11,r12
+ 10: GETL R11, t8
+ 11: GETL R12, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0xFECB4A4: 911F000C stw r8,12(r31)
+ 15: GETL R8, t14
+ 16: GETL R31, t16
+ 17: ADDL $0xC, t16
+ 18: STL t14, (t16)
+ 19: INCEIPL $4
+
+ 0xFECB4A8: 40850008 bc 4,5,0xFECB4B0
+ 20: Jc05o $0xFECB4B0
+
+
+
+. 2431 FECB498 20
+. 81 9F 00 08 81 1F 00 1C 7C 8B 60 40 91 1F 00 0C 40 85 00 08
+==== BB 2432 (0xFECB4B0) approx BBs exec'd 0 ====
+
+ 0xFECB4B0: 55400566 rlwinm r0,r10,0,21,19
+ 0: GETL R10, t0
+ 1: ANDL $0xFFFFF7FF, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0xFECB4B4: 917F0010 stw r11,16(r31)
+ 4: GETL R11, t2
+ 5: GETL R31, t4
+ 6: ADDL $0x10, t4
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECB4B8: 917F0004 stw r11,4(r31)
+ 9: GETL R11, t6
+ 10: GETL R31, t8
+ 11: ADDL $0x4, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECB4BC: 38600000 li r3,0
+ 14: MOVL $0x0, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0xFECB4C0: 917F0018 stw r11,24(r31)
+ 17: GETL R11, t12
+ 18: GETL R31, t14
+ 19: ADDL $0x18, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFECB4C4: 917F0014 stw r11,20(r31)
+ 22: GETL R11, t16
+ 23: GETL R31, t18
+ 24: ADDL $0x14, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0xFECB4C8: 901F0000 stw r0,0(r31)
+ 27: GETL R0, t20
+ 28: GETL R31, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xFECB4CC: 81410014 lwz r10,20(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x14, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R10
+ 35: INCEIPL $4
+
+ 0xFECB4D0: 83E10008 lwz r31,8(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x8, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R31
+ 40: INCEIPL $4
+
+ 0xFECB4D4: 38210010 addi r1,r1,16
+ 41: GETL R1, t32
+ 42: ADDL $0x10, t32
+ 43: PUTL t32, R1
+ 44: INCEIPL $4
+
+ 0xFECB4D8: 7D4803A6 mtlr r10
+ 45: GETL R10, t34
+ 46: PUTL t34, LR
+ 47: INCEIPL $4
+
+ 0xFECB4DC: 4E800020 blr
+ 48: GETL LR, t36
+ 49: JMPo-r t36 ($4)
+
+
+
+. 2432 FECB4B0 48
+. 55 40 05 66 91 7F 00 10 91 7F 00 04 38 60 00 00 91 7F 00 18 91 7F 00 14 90 1F 00 00 81 41 00 14 83 E1 00 08 38 21 00 10 7D 48 03 A6 4E 80 00 20
+==== BB 2433 (0xFEC8FC4) approx BBs exec'd 0 ====
+
+ 0xFEC8FC4: 891F0046 lbz r8,70(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFEC8FC8: 80BF001C lwz r5,28(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFEC8FCC: 7D070774 extsb r7,r8
+ 10: GETB R8, t8
+ 11: WIDENL_Bs _st8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0xFEC8FD0: 837F0020 lwz r27,32(r31)
+ 14: GETL R31, t10
+ 15: ADDL $0x20, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R27
+ 18: INCEIPL $4
+
+ 0xFEC8FD4: 7CC7FA14 add r6,r7,r31
+ 19: GETL R7, t14
+ 20: GETL R31, t16
+ 21: ADDL t14, t16
+ 22: PUTL t16, R6
+ 23: INCEIPL $4
+
+ 0xFEC8FD8: 7CA42B78 or r4,r5,r5
+ 24: GETL R5, t18
+ 25: PUTL t18, R4
+ 26: INCEIPL $4
+
+ 0xFEC8FDC: 80660098 lwz r3,152(r6)
+ 27: GETL R6, t20
+ 28: ADDL $0x98, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R3
+ 31: INCEIPL $4
+
+ 0xFEC8FE0: 90BF0004 stw r5,4(r31)
+ 32: GETL R5, t24
+ 33: GETL R31, t26
+ 34: ADDL $0x4, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xFEC8FE4: 81630038 lwz r11,56(r3)
+ 37: GETL R3, t28
+ 38: ADDL $0x38, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R11
+ 41: INCEIPL $4
+
+ 0xFEC8FE8: 7FE3FB78 or r3,r31,r31
+ 42: GETL R31, t32
+ 43: PUTL t32, R3
+ 44: INCEIPL $4
+
+ 0xFEC8FEC: 90BF000C stw r5,12(r31)
+ 45: GETL R5, t34
+ 46: GETL R31, t36
+ 47: ADDL $0xC, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0xFEC8FF0: 90BF0008 stw r5,8(r31)
+ 50: GETL R5, t38
+ 51: GETL R31, t40
+ 52: ADDL $0x8, t40
+ 53: STL t38, (t40)
+ 54: INCEIPL $4
+
+ 0xFEC8FF4: 7D6903A6 mtctr r11
+ 55: GETL R11, t42
+ 56: PUTL t42, CTR
+ 57: INCEIPL $4
+
+ 0xFEC8FF8: 90BF0018 stw r5,24(r31)
+ 58: GETL R5, t44
+ 59: GETL R31, t46
+ 60: ADDL $0x18, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0xFEC8FFC: 90BF0014 stw r5,20(r31)
+ 63: GETL R5, t48
+ 64: GETL R31, t50
+ 65: ADDL $0x14, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0xFEC9000: 90BF0010 stw r5,16(r31)
+ 68: GETL R5, t52
+ 69: GETL R31, t54
+ 70: ADDL $0x10, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0xFEC9004: 7CA5D850 subf r5,r5,r27
+ 73: GETL R5, t56
+ 74: GETL R27, t58
+ 75: SUBL t56, t58
+ 76: PUTL t58, R5
+ 77: INCEIPL $4
+
+ 0xFEC9008: 4E800421 bctrl
+ 78: MOVL $0xFEC900C, t60
+ 79: PUTL t60, LR
+ 80: GETL CTR, t62
+ 81: JMPo-c t62 ($4)
+
+
+
+. 2433 FEC8FC4 72
+. 89 1F 00 46 80 BF 00 1C 7D 07 07 74 83 7F 00 20 7C C7 FA 14 7C A4 2B 78 80 66 00 98 90 BF 00 04 81 63 00 38 7F E3 FB 78 90 BF 00 0C 90 BF 00 08 7D 69 03 A6 90 BF 00 18 90 BF 00 14 90 BF 00 10 7C A5 D8 50 4E 80 04 21
+==== BB 2434 _IO_file_read_internal(0xFECA48C) approx BBs exec'd 0 ====
+
+ 0xFECA48C: 7CC802A6 mflr r6
+ 0: GETL LR, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0xFECA490: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECA494: 90C10014 stw r6,20(r1)
+ 9: GETL R6, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECA498: 8003003C lwz r0,60(r3)
+ 14: GETL R3, t10
+ 15: ADDL $0x3C, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R0
+ 18: INCEIPL $4
+
+ 0xFECA49C: 70090002 andi. r9,r0,0x2
+ 19: GETL R0, t14
+ 20: ANDL $0x2, t14
+ 21: PUTL t14, R9
+ 22: CMP0L t14, t16 (-rSo)
+ 23: ICRFL t16, $0x0, CR
+ 24: INCEIPL $4
+
+ 0xFECA4A0: 4082001C bc 4,2,0xFECA4BC
+ 25: Jc02o $0xFECA4BC
+
+
+
+. 2434 FECA48C 24
+. 7C C8 02 A6 94 21 FF F0 90 C1 00 14 80 03 00 3C 70 09 00 02 40 82 00 1C
+==== BB 2435 (0xFECA4BC) approx BBs exec'd 0 ====
+
+ 0xFECA4BC: 80630038 lwz r3,56(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x38, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECA4C0: 48057AA1 bl 0xFF21F60
+ 5: MOVL $0xFECA4C4, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0xFF21F60 ($4)
+
+
+
+. 2435 FECA4BC 8
+. 80 63 00 38 48 05 7A A1
+==== BB 2436 __read_nocancel(0xFF21F60) approx BBs exec'd 0 ====
+
+ 0xFF21F60: 38000003 li r0,3
+ 0: MOVL $0x3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFF21F64: 44000002 sc
+ 3: JMPo-sys $0xFF21F68 ($4)
+
+
+
+. 2436 FF21F60 8
+. 38 00 00 03 44 00 00 02
+==== BB 2437 (0xFF21F68) approx BBs exec'd 0 ====
+
+ 0xFF21F68: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 2437 FF21F68 4
+. 4C A3 00 20
+==== BB 2438 (0xFECA4C4) approx BBs exec'd 0 ====
+
+ 0xFECA4C4: 4BFFFFE8 b 0xFECA4AC
+ 0: JMPo $0xFECA4AC ($4)
+
+
+
+. 2438 FECA4C4 4
+. 4B FF FF E8
+==== BB 2439 (0xFECA4AC) approx BBs exec'd 0 ====
+
+ 0xFECA4AC: 80810014 lwz r4,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFECA4B0: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFECA4B4: 7C8803A6 mtlr r4
+ 9: GETL R4, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFECA4B8: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 2439 FECA4AC 16
+. 80 81 00 14 38 21 00 10 7C 88 03 A6 4E 80 00 20
+==== BB 2440 (0xFEC900C) approx BBs exec'd 0 ====
+
+ 0xFEC900C: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEC9010: 408100EC bc 4,1,0xFEC90FC
+ 4: Jc01o $0xFEC90FC
+
+
+
+. 2440 FEC900C 8
+. 2C 03 00 00 40 81 00 EC
+==== BB 2441 (0xFEC9014) approx BBs exec'd 0 ====
+
+ 0xFEC9014: 809F0008 lwz r4,8(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFEC9018: 7FA41A14 add r29,r4,r3
+ 5: GETL R4, t4
+ 6: GETL R3, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0xFEC901C: 93BF0008 stw r29,8(r31)
+ 10: GETL R29, t8
+ 11: GETL R31, t10
+ 12: ADDL $0x8, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFEC9020: 41820170 bc 12,2,0xFEC9190
+ 15: Js02o $0xFEC9190
+
+
+
+. 2441 FEC9014 16
+. 80 9F 00 08 7F A4 1A 14 93 BF 00 08 41 82 01 70
+==== BB 2442 (0xFEC9024) approx BBs exec'd 0 ====
+
+ 0xFEC9024: 801F0050 lwz r0,80(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEC9028: 2C80FFFF cmpi cr1,r0,-1
+ 5: GETL R0, t4
+ 6: MOVL $0xFFFFFFFF, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFEC902C: 418600B8 bc 12,6,0xFEC90E4
+ 10: Js06o $0xFEC90E4
+
+
+
+. 2442 FEC9024 12
+. 80 1F 00 50 2C 80 FF FF 41 86 00 B8
+==== BB 2443 (0xFEC90E4) approx BBs exec'd 0 ====
+
+ 0xFEC90E4: 813F0054 lwz r9,84(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x54, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEC90E8: 2C09FFFF cmpi cr0,r9,-1
+ 5: GETL R9, t4
+ 6: MOVL $0xFFFFFFFF, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEC90EC: 4082FF44 bc 4,2,0xFEC9030
+ 10: Jc02o $0xFEC9030
+
+
+
+. 2443 FEC90E4 12
+. 81 3F 00 54 2C 09 FF FF 40 82 FF 44
+==== BB 2444 (0xFEC90F0) approx BBs exec'd 0 ====
+
+ 0xFEC90F0: 839F0004 lwz r28,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFEC90F4: 887C0000 lbz r3,0(r28)
+ 5: GETL R28, t4
+ 6: LDB (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFEC90F8: 4BFFFF60 b 0xFEC9058
+ 9: JMPo $0xFEC9058 ($4)
+
+
+
+. 2444 FEC90F0 12
+. 83 9F 00 04 88 7C 00 00 4B FF FF 60
+==== BB 2445 (0xFEC9058) approx BBs exec'd 0 ====
+
+ 0xFEC9058: 83E10024 lwz r31,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFEC905C: 8361000C lwz r27,12(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R27
+ 9: INCEIPL $4
+
+ 0xFEC9060: 7FE803A6 mtlr r31
+ 10: GETL R31, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFEC9064: 83810010 lwz r28,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0xFEC9068: 83A10014 lwz r29,20(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R29
+ 22: INCEIPL $4
+
+ 0xFEC906C: 83C10018 lwz r30,24(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x18, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R30
+ 27: INCEIPL $4
+
+ 0xFEC9070: 83E1001C lwz r31,28(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x1C, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R31
+ 32: INCEIPL $4
+
+ 0xFEC9074: 38210020 addi r1,r1,32
+ 33: GETL R1, t26
+ 34: ADDL $0x20, t26
+ 35: PUTL t26, R1
+ 36: INCEIPL $4
+
+ 0xFEC9078: 4E800020 blr
+ 37: GETL LR, t28
+ 38: JMPo-r t28 ($4)
+
+
+
+. 2445 FEC9058 36
+. 83 E1 00 24 83 61 00 0C 7F E8 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2446 (0xFECBD20) approx BBs exec'd 0 ====
+
+ 0xFECBD20: 2F83FFFF cmpi cr7,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFECBD24: 3860FFFF li r3,-1
+ 5: MOVL $0xFFFFFFFF, t6
+ 6: PUTL t6, R3
+ 7: INCEIPL $4
+
+ 0xFECBD28: 419E0018 bc 12,30,0xFECBD40
+ 8: Js30o $0xFECBD40
+
+
+
+. 2446 FECBD20 12
+. 2F 83 FF FF 38 60 FF FF 41 9E 00 18
+==== BB 2447 (0xFECBD2C) approx BBs exec'd 0 ====
+
+ 0xFECBD2C: 811F0004 lwz r8,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFECBD30: 88E80000 lbz r7,0(r8)
+ 5: GETL R8, t4
+ 6: LDB (t4), t6
+ 7: PUTL t6, R7
+ 8: INCEIPL $4
+
+ 0xFECBD34: 38680001 addi r3,r8,1
+ 9: GETL R8, t8
+ 10: ADDL $0x1, t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFECBD38: 907F0004 stw r3,4(r31)
+ 13: GETL R3, t10
+ 14: GETL R31, t12
+ 15: ADDL $0x4, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFECBD3C: 7CE33B78 or r3,r7,r7
+ 18: GETL R7, t14
+ 19: PUTL t14, R3
+ 20: INCEIPL $4
+
+ 0xFECBD40: 81410014 lwz r10,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R10
+ 25: INCEIPL $4
+
+ 0xFECBD44: 83E10008 lwz r31,8(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x8, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0xFECBD48: 38210010 addi r1,r1,16
+ 31: GETL R1, t24
+ 32: ADDL $0x10, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0xFECBD4C: 7D4803A6 mtlr r10
+ 35: GETL R10, t26
+ 36: PUTL t26, LR
+ 37: INCEIPL $4
+
+ 0xFECBD50: 4E800020 blr
+ 38: GETL LR, t28
+ 39: JMPo-r t28 ($4)
+
+
+
+. 2447 FECBD2C 40
+. 81 1F 00 04 88 E8 00 00 38 68 00 01 90 7F 00 04 7C E3 3B 78 81 41 00 14 83 E1 00 08 38 21 00 10 7D 48 03 A6 4E 80 00 20
+==== BB 2448 (0xFECBA70) approx BBs exec'd 0 ====
+
+ 0xFECBA70: 7C601B78 or r0,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFECBA74: 80E10014 lwz r7,20(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x14, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0xFECBA78: 7C030378 or r3,r0,r0
+ 8: GETL R0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFECBA7C: 83C10008 lwz r30,8(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x8, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R30
+ 15: INCEIPL $4
+
+ 0xFECBA80: 83E1000C lwz r31,12(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0xC, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0xFECBA84: 7CE803A6 mtlr r7
+ 21: GETL R7, t16
+ 22: PUTL t16, LR
+ 23: INCEIPL $4
+
+ 0xFECBA88: 38210010 addi r1,r1,16
+ 24: GETL R1, t18
+ 25: ADDL $0x10, t18
+ 26: PUTL t18, R1
+ 27: INCEIPL $4
+
+ 0xFECBA8C: 4E800020 blr
+ 28: GETL LR, t20
+ 29: JMPo-r t20 ($4)
+
+
+
+. 2448 FECBA70 32
+. 7C 60 1B 78 80 E1 00 14 7C 03 03 78 83 C1 00 08 83 E1 00 0C 7C E8 03 A6 38 21 00 10 4E 80 00 20
+==== BB 2449 (0xFEBD928) approx BBs exec'd 0 ====
+
+ 0xFEBD928: 3B9CFFFF addi r28,r28,-1
+ 0: GETL R28, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0xFEBD92C: 2F83FFFF cmpi cr7,r3,-1
+ 4: GETL R3, t2
+ 5: MOVL $0xFFFFFFFF, t6
+ 6: CMPL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFEBD930: 7F03C000 cmp cr6,r3,r24
+ 9: GETL R3, t8
+ 10: GETL R24, t10
+ 11: CMPL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFEBD934: 419E009C bc 12,30,0xFEBD9D0
+ 14: Js30o $0xFEBD9D0
+
+
+
+. 2449 FEBD928 16
+. 3B 9C FF FF 2F 83 FF FF 7F 03 C0 00 41 9E 00 9C
+==== BB 2450 (0xFEBD938) approx BBs exec'd 0 ====
+
+ 0xFEBD938: 419A00A4 bc 12,26,0xFEBD9DC
+ 0: Js26o $0xFEBD9DC
+
+
+
+. 2450 FEBD938 4
+. 41 9A 00 A4
+==== BB 2451 (0xFEBD93C) approx BBs exec'd 0 ====
+
+ 0xFEBD93C: 987A0000 stb r3,0(r26)
+ 0: GETL R3, t0
+ 1: GETL R26, t2
+ 2: STB t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFEBD940: 3B5A0001 addi r26,r26,1
+ 4: GETL R26, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0xFEBD944: 4BFFFF94 b 0xFEBD8D8
+ 8: JMPo $0xFEBD8D8 ($4)
+
+
+
+. 2451 FEBD93C 12
+. 98 7A 00 00 3B 5A 00 01 4B FF FF 94
+==== BB 2452 (0xFEBD8D8) approx BBs exec'd 0 ====
+
+ 0xFEBD8D8: 2F1C0000 cmpi cr6,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFEBD8DC: 409AFFA0 bc 4,26,0xFEBD87C
+ 4: Jc26o $0xFEBD87C
+
+
+
+. 2452 FEBD8D8 8
+. 2F 1C 00 00 40 9A FF A0
+==== BB 2453 (0xFEBD87C) approx BBs exec'd 0 ====
+
+ 0xFEBD87C: 83BB0004 lwz r29,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFEBD880: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEBD884: 80FB0008 lwz r7,8(r27)
+ 8: GETL R27, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0xFEBD888: 7F04C378 or r4,r24,r24
+ 13: GETL R24, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0xFEBD88C: 7FFD3851 subf. r31,r29,r7
+ 16: GETL R29, t12
+ 17: GETL R7, t14
+ 18: SUBL t12, t14
+ 19: PUTL t14, R31
+ 20: CMP0L t14, t16 (-rSo)
+ 21: ICRFL t16, $0x0, CR
+ 22: INCEIPL $4
+
+ 0xFEBD890: 7F9FE040 cmpl cr7,r31,r28
+ 23: GETL R31, t18
+ 24: GETL R28, t20
+ 25: CMPUL t18, t20, t22 (-rSo)
+ 26: ICRFL t22, $0x7, CR
+ 27: INCEIPL $4
+
+ 0xFEBD894: 40810090 bc 4,1,0xFEBD924
+ 28: Jc01o $0xFEBD924
+
+
+
+. 2453 FEBD87C 28
+. 83 BB 00 04 7F 63 DB 78 80 FB 00 08 7F 04 C3 78 7F FD 38 51 7F 9F E0 40 40 81 00 90
+==== BB 2454 (0xFEBD898) approx BBs exec'd 0 ====
+
+ 0xFEBD898: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEBD89C: 419C0008 bc 12,28,0xFEBD8A4
+ 3: Js28o $0xFEBD8A4
+
+
+
+. 2454 FEBD898 8
+. 7F A3 EB 78 41 9C 00 08
+==== BB 2455 (0xFEBD8A0) approx BBs exec'd 0 ====
+
+ 0xFEBD8A0: 7F9FE378 or r31,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0xFEBD8A4: 7FE5FB78 or r5,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFEBD8A8: 7F9FE050 subf r28,r31,r28
+ 6: GETL R31, t4
+ 7: GETL R28, t6
+ 8: SUBL t4, t6
+ 9: PUTL t6, R28
+ 10: INCEIPL $4
+
+ 0xFEBD8AC: 48019EA9 bl 0xFED7754
+ 11: MOVL $0xFEBD8B0, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0xFED7754 ($4)
+
+
+
+. 2455 FEBD8A0 16
+. 7F 9F E3 78 7F E5 FB 78 7F 9F E0 50 48 01 9E A9
+==== BB 2456 memchr(0xFED7754) approx BBs exec'd 0 ====
+
+ 0xFED7754: 2C050000 cmpi cr0,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFED7758: 9421FFF0 stwu r1,-16(r1)
+ 4: GETL R1, t4
+ 5: GETL R1, t6
+ 6: ADDL $0xFFFFFFF0, t6
+ 7: PUTL t6, R1
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFED775C: 5484063E rlwinm r4,r4,0,24,31
+ 10: GETL R4, t8
+ 11: ANDL $0xFF, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0xFED7760: 41820030 bc 12,2,0xFED7790
+ 14: Js02o $0xFED7790
+
+
+
+. 2456 FED7754 16
+. 2C 05 00 00 94 21 FF F0 54 84 06 3E 41 82 00 30
+==== BB 2457 (0xFED7764) approx BBs exec'd 0 ====
+
+ 0xFED7764: 70600003 andi. r0,r3,0x3
+ 0: GETL R3, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED7768: 41820028 bc 12,2,0xFED7790
+ 6: Js02o $0xFED7790
+
+
+
+. 2457 FED7764 8
+. 70 60 00 03 41 82 00 28
+==== BB 2458 (0xFED776C) approx BBs exec'd 0 ====
+
+ 0xFED776C: 88030000 lbz r0,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFED7770: 7F802000 cmp cr7,r0,r4
+ 4: GETL R0, t4
+ 5: GETL R4, t6
+ 6: CMPL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFED7774: 419E00CC bc 12,30,0xFED7840
+ 9: Js30o $0xFED7840
+
+
+
+. 2458 FED776C 12
+. 88 03 00 00 7F 80 20 00 41 9E 00 CC
+==== BB 2459 (0xFED7778) approx BBs exec'd 0 ====
+
+ 0xFED7778: 34A5FFFF addic. r5,r5,-1
+ 0: GETL R5, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R5
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED777C: 38630001 addi r3,r3,1
+ 6: GETL R3, t4
+ 7: ADDL $0x1, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0xFED7780: 546907BE rlwinm r9,r3,0,30,31
+ 10: GETL R3, t6
+ 11: ANDL $0x3, t6
+ 12: PUTL t6, R9
+ 13: INCEIPL $4
+
+ 0xFED7784: 2F890000 cmpi cr7,r9,0
+ 14: GETL R9, t8
+ 15: CMP0L t8, t10 (-rSo)
+ 16: ICRFL t10, $0x7, CR
+ 17: INCEIPL $4
+
+ 0xFED7788: 41820008 bc 12,2,0xFED7790
+ 18: Js02o $0xFED7790
+
+
+
+. 2459 FED7778 20
+. 34 A5 FF FF 38 63 00 01 54 69 07 BE 2F 89 00 00 41 82 00 08
+==== BB 2460 (0xFED778C) approx BBs exec'd 0 ====
+
+ 0xFED778C: 409EFFE0 bc 4,30,0xFED776C
+ 0: Jc30o $0xFED776C
+
+
+
+. 2460 FED778C 4
+. 40 9E FF E0
+==== BB 2461 (0xFED7790) approx BBs exec'd 0 ====
+
+ 0xFED7790: 28850003 cmpli cr1,r5,3
+ 0: GETL R5, t0
+ 1: MOVL $0x3, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFED7794: 5488402E rlwinm r8,r4,8,0,23
+ 5: GETL R4, t6
+ 6: SHLL $0x8, t6
+ 7: PUTL t6, R8
+ 8: INCEIPL $4
+
+ 0xFED7798: 7C874378 or r7,r4,r8
+ 9: GETL R4, t8
+ 10: GETL R8, t10
+ 11: ORL t10, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0xFED779C: 3D407EFE lis r10,32510
+ 14: MOVL $0x7EFE0000, t12
+ 15: PUTL t12, R10
+ 16: INCEIPL $4
+
+ 0xFED77A0: 54E6801E rlwinm r6,r7,16,0,15
+ 17: GETL R7, t14
+ 18: SHLL $0x10, t14
+ 19: PUTL t14, R6
+ 20: INCEIPL $4
+
+ 0xFED77A4: 614AFEFF ori r10,r10,0xFEFF
+ 21: MOVL $0x7EFEFEFF, t16
+ 22: PUTL t16, R10
+ 23: INCEIPL $4
+
+ 0xFED77A8: 7CE83378 or r8,r7,r6
+ 24: GETL R7, t18
+ 25: GETL R6, t20
+ 26: ORL t20, t18
+ 27: PUTL t18, R8
+ 28: INCEIPL $4
+
+ 0xFED77AC: 40850068 bc 4,5,0xFED7814
+ 29: Jc05o $0xFED7814
+
+
+
+. 2461 FED7790 32
+. 28 85 00 03 54 88 40 2E 7C 87 43 78 3D 40 7E FE 54 E6 80 1E 61 4A FE FF 7C E8 33 78 40 85 00 68
+==== BB 2462 (0xFED77B0) approx BBs exec'd 0 ====
+
+ 0xFED77B0: 3D608101 lis r11,-32511
+ 0: MOVL $0x81010000, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFED77B4: 616B0100 ori r11,r11,0x100
+ 3: MOVL $0x81010100, t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0xFED77B8: 80C30000 lwz r6,0(r3)
+ 6: GETL R3, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0xFED77BC: 38A5FFFC addi r5,r5,-4
+ 10: GETL R5, t8
+ 11: ADDL $0xFFFFFFFC, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0xFED77C0: 38630004 addi r3,r3,4
+ 14: GETL R3, t10
+ 15: ADDL $0x4, t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0xFED77C4: 2B050003 cmpli cr6,r5,3
+ 18: GETL R5, t12
+ 19: MOVL $0x3, t16
+ 20: CMPUL t12, t16, t14 (-rSo)
+ 21: ICRFL t14, $0x6, CR
+ 22: INCEIPL $4
+
+ 0xFED77C8: 7CC04278 xor r0,r6,r8
+ 23: GETL R6, t18
+ 24: GETL R8, t20
+ 25: XORL t18, t20
+ 26: PUTL t20, R0
+ 27: INCEIPL $4
+
+ 0xFED77CC: 7D205214 add r9,r0,r10
+ 28: GETL R0, t22
+ 29: GETL R10, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R9
+ 32: INCEIPL $4
+
+ 0xFED77D0: 7C0C4A78 xor r12,r0,r9
+ 33: GETL R0, t26
+ 34: GETL R9, t28
+ 35: XORL t26, t28
+ 36: PUTL t28, R12
+ 37: INCEIPL $4
+
+ 0xFED77D4: 7D696079 andc. r9,r11,r12
+ 38: GETL R11, t30
+ 39: GETL R12, t32
+ 40: NOTL t32
+ 41: ANDL t30, t32
+ 42: PUTL t32, R9
+ 43: CMP0L t32, t34 (-rSo)
+ 44: ICRFL t34, $0x0, CR
+ 45: INCEIPL $4
+
+ 0xFED77D8: 3923FFFC addi r9,r3,-4
+ 46: GETL R3, t36
+ 47: ADDL $0xFFFFFFFC, t36
+ 48: PUTL t36, R9
+ 49: INCEIPL $4
+
+ 0xFED77DC: 41820034 bc 12,2,0xFED7810
+ 50: Js02o $0xFED7810
+
+
+
+. 2462 FED77B0 48
+. 3D 60 81 01 61 6B 01 00 80 C3 00 00 38 A5 FF FC 38 63 00 04 2B 05 00 03 7C C0 42 78 7D 20 52 14 7C 0C 4A 78 7D 69 60 79 39 23 FF FC 41 82 00 34
+==== BB 2463 (0xFED7810) approx BBs exec'd 0 ====
+
+ 0xFED7810: 4199FFA8 bc 12,25,0xFED77B8
+ 0: Js25o $0xFED77B8
+
+
+
+. 2463 FED7810 4
+. 41 99 FF A8
+==== BB 2464 (0xFED77B8) approx BBs exec'd 0 ====
+
+ 0xFED77B8: 80C30000 lwz r6,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFED77BC: 38A5FFFC addi r5,r5,-4
+ 4: GETL R5, t4
+ 5: ADDL $0xFFFFFFFC, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFED77C0: 38630004 addi r3,r3,4
+ 8: GETL R3, t6
+ 9: ADDL $0x4, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0xFED77C4: 2B050003 cmpli cr6,r5,3
+ 12: GETL R5, t8
+ 13: MOVL $0x3, t12
+ 14: CMPUL t8, t12, t10 (-rSo)
+ 15: ICRFL t10, $0x6, CR
+ 16: INCEIPL $4
+
+ 0xFED77C8: 7CC04278 xor r0,r6,r8
+ 17: GETL R6, t14
+ 18: GETL R8, t16
+ 19: XORL t14, t16
+ 20: PUTL t16, R0
+ 21: INCEIPL $4
+
+ 0xFED77CC: 7D205214 add r9,r0,r10
+ 22: GETL R0, t18
+ 23: GETL R10, t20
+ 24: ADDL t18, t20
+ 25: PUTL t20, R9
+ 26: INCEIPL $4
+
+ 0xFED77D0: 7C0C4A78 xor r12,r0,r9
+ 27: GETL R0, t22
+ 28: GETL R9, t24
+ 29: XORL t22, t24
+ 30: PUTL t24, R12
+ 31: INCEIPL $4
+
+ 0xFED77D4: 7D696079 andc. r9,r11,r12
+ 32: GETL R11, t26
+ 33: GETL R12, t28
+ 34: NOTL t28
+ 35: ANDL t26, t28
+ 36: PUTL t28, R9
+ 37: CMP0L t28, t30 (-rSo)
+ 38: ICRFL t30, $0x0, CR
+ 39: INCEIPL $4
+
+ 0xFED77D8: 3923FFFC addi r9,r3,-4
+ 40: GETL R3, t32
+ 41: ADDL $0xFFFFFFFC, t32
+ 42: PUTL t32, R9
+ 43: INCEIPL $4
+
+ 0xFED77DC: 41820034 bc 12,2,0xFED7810
+ 44: Js02o $0xFED7810
+
+
+
+. 2464 FED77B8 40
+. 80 C3 00 00 38 A5 FF FC 38 63 00 04 2B 05 00 03 7C C0 42 78 7D 20 52 14 7C 0C 4A 78 7D 69 60 79 39 23 FF FC 41 82 00 34
+==== BB 2465 (0xFED77E0) approx BBs exec'd 0 ====
+
+ 0xFED77E0: 88E3FFFC lbz r7,-4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFED77E4: 7F872000 cmp cr7,r7,r4
+ 5: GETL R7, t4
+ 6: GETL R4, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFED77E8: 419E006C bc 12,30,0xFED7854
+ 10: Js30o $0xFED7854
+
+
+
+. 2465 FED77E0 12
+. 88 E3 FF FC 7F 87 20 00 41 9E 00 6C
+==== BB 2466 (0xFED77EC) approx BBs exec'd 0 ====
+
+ 0xFED77EC: 89890001 lbz r12,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFED77F0: 7C8C2000 cmp cr1,r12,r4
+ 5: GETL R12, t4
+ 6: GETL R4, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFED77F4: 4186006C bc 12,6,0xFED7860
+ 10: Js06o $0xFED7860
+
+
+
+. 2466 FED77EC 12
+. 89 89 00 01 7C 8C 20 00 41 86 00 6C
+==== BB 2467 (0xFED77F8) approx BBs exec'd 0 ====
+
+ 0xFED77F8: 88090002 lbz r0,2(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x2, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED77FC: 7C002000 cmp cr0,r0,r4
+ 5: GETL R0, t4
+ 6: GETL R4, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFED7800: 4182006C bc 12,2,0xFED786C
+ 10: Js02o $0xFED786C
+
+
+
+. 2467 FED77F8 12
+. 88 09 00 02 7C 00 20 00 41 82 00 6C
+==== BB 2468 (0xFED786C) approx BBs exec'd 0 ====
+
+ 0xFED786C: 3863FFFE addi r3,r3,-2
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFE, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFED7870: 38210010 addi r1,r1,16
+ 4: GETL R1, t2
+ 5: ADDL $0x10, t2
+ 6: PUTL t2, R1
+ 7: INCEIPL $4
+
+ 0xFED7874: 4E800020 blr
+ 8: GETL LR, t4
+ 9: JMPo-r t4 ($4)
+
+
+
+. 2468 FED786C 12
+. 38 63 FF FE 38 21 00 10 4E 80 00 20
+==== BB 2469 (0xFEBD8B0) approx BBs exec'd 0 ====
+
+ 0xFEBD8B0: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFEBD8B4: 7C791B79 or. r25,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R25
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFEBD8B8: 7FE5FB78 or r5,r31,r31
+ 8: GETL R31, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0xFEBD8BC: 7F43D378 or r3,r26,r26
+ 11: GETL R26, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0xFEBD8C0: 40820088 bc 4,2,0xFEBD948
+ 14: Jc02o $0xFEBD948
+
+
+
+. 2469 FEBD8B0 20
+. 7F A4 EB 78 7C 79 1B 79 7F E5 FB 78 7F 43 D3 78 40 82 00 88
+==== BB 2470 (0xFEBD948) approx BBs exec'd 0 ====
+
+ 0xFEBD948: 7F97D050 subf r28,r23,r26
+ 0: GETL R23, t0
+ 1: GETL R26, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFEBD94C: 7FFDC850 subf r31,r29,r25
+ 5: GETL R29, t4
+ 6: GETL R25, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0xFEBD950: 41900010 bc 12,16,0xFEBD960
+ 10: Js16o $0xFEBD960
+
+
+
+. 2470 FEBD948 12
+. 7F 97 D0 50 7F FD C8 50 41 90 00 10
+==== BB 2471 (0xFEBD954) approx BBs exec'd 0 ====
+
+ 0xFEBD954: 3B390001 addi r25,r25,1
+ 0: GETL R25, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0xFEBD958: 40910008 bc 4,17,0xFEBD960
+ 4: Jc17o $0xFEBD960
+
+
+
+. 2471 FEBD954 8
+. 3B 39 00 01 40 91 00 08
+==== BB 2472 (0xFEBD95C) approx BBs exec'd 0 ====
+
+ 0xFEBD95C: 3BFF0001 addi r31,r31,1
+ 0: GETL R31, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0xFEBD960: 7F43D378 or r3,r26,r26
+ 4: GETL R26, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0xFEBD964: 7FA4EB78 or r4,r29,r29
+ 7: GETL R29, t4
+ 8: PUTL t4, R4
+ 9: INCEIPL $4
+
+ 0xFEBD968: 7FE5FB78 or r5,r31,r31
+ 10: GETL R31, t6
+ 11: PUTL t6, R5
+ 12: INCEIPL $4
+
+ 0xFEBD96C: 4801AD6D bl 0xFED86D8
+ 13: MOVL $0xFEBD970, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 2472 FEBD95C 20
+. 3B FF 00 01 7F 43 D3 78 7F A4 EB 78 7F E5 FB 78 48 01 AD 6D
+==== BB 2473 (0xFED8720) approx BBs exec'd 0 ====
+
+ 0xFED8720: 7D2903A6 mtctr r9
+ 0: GETL R9, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0xFED8724: 88BD0000 lbz r5,0(r29)
+ 3: GETL R29, t2
+ 4: LDB (t2), t4
+ 5: PUTL t4, R5
+ 6: INCEIPL $4
+
+ 0xFED8728: 3BBD0001 addi r29,r29,1
+ 7: GETL R29, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R29
+ 10: INCEIPL $4
+
+ 0xFED872C: 98BF0000 stb r5,0(r31)
+ 11: GETL R5, t8
+ 12: GETL R31, t10
+ 13: STB t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFED8730: 3BFF0001 addi r31,r31,1
+ 15: GETL R31, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R31
+ 18: INCEIPL $4
+
+ 0xFED8734: 4200FFF0 bc 16,0,0xFED8724
+ 19: GETL CTR, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, CTR
+ 22: JIFZL t14, $0xFED8738
+ 23: JMPo $0xFED8724 ($4)
+
+
+
+. 2473 FED8720 24
+. 7D 29 03 A6 88 BD 00 00 3B BD 00 01 98 BF 00 00 3B FF 00 01 42 00 FF F0
+==== BB 2474 (0xFED8724) approx BBs exec'd 0 ====
+
+ 0xFED8724: 88BD0000 lbz r5,0(r29)
+ 0: GETL R29, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFED8728: 3BBD0001 addi r29,r29,1
+ 4: GETL R29, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFED872C: 98BF0000 stb r5,0(r31)
+ 8: GETL R5, t6
+ 9: GETL R31, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFED8730: 3BFF0001 addi r31,r31,1
+ 12: GETL R31, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R31
+ 15: INCEIPL $4
+
+ 0xFED8734: 4200FFF0 bc 16,0,0xFED8724
+ 16: GETL CTR, t12
+ 17: ADDL $0xFFFFFFFF, t12
+ 18: PUTL t12, CTR
+ 19: JIFZL t12, $0xFED8738
+ 20: JMPo $0xFED8724 ($4)
+
+
+
+. 2474 FED8724 20
+. 88 BD 00 00 3B BD 00 01 98 BF 00 00 3B FF 00 01 42 00 FF F0
+==== BB 2475 (0xFED88D8) approx BBs exec'd 0 ====
+
+ 0xFED88D8: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFED88DC: 3884FFF8 addi r4,r4,-8
+ 4: GETL R4, t4
+ 5: ADDL $0xFFFFFFF8, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFED88E0: 8124000C lwz r9,12(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0xFED88E4: 3863FFF4 addi r3,r3,-12
+ 13: GETL R3, t10
+ 14: ADDL $0xFFFFFFF4, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0xFED88E8: 38A50002 addi r5,r5,2
+ 17: GETL R5, t12
+ 18: ADDL $0x2, t12
+ 19: PUTL t12, R5
+ 20: INCEIPL $4
+
+ 0xFED88EC: 9003000C stw r0,12(r3)
+ 21: GETL R0, t14
+ 22: GETL R3, t16
+ 23: ADDL $0xC, t16
+ 24: STL t14, (t16)
+ 25: INCEIPL $4
+
+ 0xFED88F0: 4BFFFF34 b 0xFED8824
+ 26: JMPo $0xFED8824 ($4)
+
+
+
+. 2475 FED88D8 28
+. 80 04 00 00 38 84 FF F8 81 24 00 0C 38 63 FF F4 38 A5 00 02 90 03 00 0C 4B FF FF 34
+==== BB 2476 (0xFED8824) approx BBs exec'd 0 ====
+
+ 0xFED8824: 80040010 lwz r0,16(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED8828: 91230010 stw r9,16(r3)
+ 5: GETL R9, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x10, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFED882C: 81240014 lwz r9,20(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0xFED8830: 90030014 stw r0,20(r3)
+ 15: GETL R0, t12
+ 16: GETL R3, t14
+ 17: ADDL $0x14, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFED8834: 80040018 lwz r0,24(r4)
+ 20: GETL R4, t16
+ 21: ADDL $0x18, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R0
+ 24: INCEIPL $4
+
+ 0xFED8838: 91230018 stw r9,24(r3)
+ 25: GETL R9, t20
+ 26: GETL R3, t22
+ 27: ADDL $0x18, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0xFED883C: 34A5FFF8 addic. r5,r5,-8
+ 30: GETL R5, t24
+ 31: ADCL $0xFFFFFFF8, t24 (-wCa)
+ 32: PUTL t24, R5
+ 33: CMP0L t24, t26 (-rSo)
+ 34: ICRFL t26, $0x0, CR
+ 35: INCEIPL $4
+
+ 0xFED8840: 8124001C lwz r9,28(r4)
+ 36: GETL R4, t28
+ 37: ADDL $0x1C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R9
+ 40: INCEIPL $4
+
+ 0xFED8844: 9003001C stw r0,28(r3)
+ 41: GETL R0, t32
+ 42: GETL R3, t34
+ 43: ADDL $0x1C, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0xFED8848: 38840020 addi r4,r4,32
+ 46: GETL R4, t36
+ 47: ADDL $0x20, t36
+ 48: PUTL t36, R4
+ 49: INCEIPL $4
+
+ 0xFED884C: 38630020 addi r3,r3,32
+ 50: GETL R3, t38
+ 51: ADDL $0x20, t38
+ 52: PUTL t38, R3
+ 53: INCEIPL $4
+
+ 0xFED8850: 40A2FFB4 bc 5,2,0xFED8804
+ 54: Jc02o $0xFED8804
+
+
+
+. 2476 FED8824 48
+. 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+==== BB 2477 (0xFEBD970) approx BBs exec'd 0 ====
+
+ 0xFEBD970: 81410044 lwz r10,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFEBD974: 81810014 lwz r12,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0xFEBD978: 7C7CFA14 add r3,r28,r31
+ 10: GETL R28, t8
+ 11: GETL R31, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0xFEBD97C: 933B0004 stw r25,4(r27)
+ 15: GETL R25, t12
+ 16: GETL R27, t14
+ 17: ADDL $0x4, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFEBD980: 7D4803A6 mtlr r10
+ 20: GETL R10, t16
+ 21: PUTL t16, LR
+ 22: INCEIPL $4
+
+ 0xFEBD984: 82C10018 lwz r22,24(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x18, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R22
+ 27: INCEIPL $4
+
+ 0xFEBD988: 7D838120 mtcrf 0x38,r12
+ 28: GETL R12, t22
+ 29: ICRFL t22, $0x2, CR
+ 30: ICRFL t22, $0x3, CR
+ 31: ICRFL t22, $0x4, CR
+ 32: INCEIPL $4
+
+ 0xFEBD98C: 82E1001C lwz r23,28(r1)
+ 33: GETL R1, t24
+ 34: ADDL $0x1C, t24
+ 35: LDL (t24), t26
+ 36: PUTL t26, R23
+ 37: INCEIPL $4
+
+ 0xFEBD990: 83010020 lwz r24,32(r1)
+ 38: GETL R1, t28
+ 39: ADDL $0x20, t28
+ 40: LDL (t28), t30
+ 41: PUTL t30, R24
+ 42: INCEIPL $4
+
+ 0xFEBD994: 83210024 lwz r25,36(r1)
+ 43: GETL R1, t32
+ 44: ADDL $0x24, t32
+ 45: LDL (t32), t34
+ 46: PUTL t34, R25
+ 47: INCEIPL $4
+
+ 0xFEBD998: 83410028 lwz r26,40(r1)
+ 48: GETL R1, t36
+ 49: ADDL $0x28, t36
+ 50: LDL (t36), t38
+ 51: PUTL t38, R26
+ 52: INCEIPL $4
+
+ 0xFEBD99C: 8361002C lwz r27,44(r1)
+ 53: GETL R1, t40
+ 54: ADDL $0x2C, t40
+ 55: LDL (t40), t42
+ 56: PUTL t42, R27
+ 57: INCEIPL $4
+
+ 0xFEBD9A0: 83810030 lwz r28,48(r1)
+ 58: GETL R1, t44
+ 59: ADDL $0x30, t44
+ 60: LDL (t44), t46
+ 61: PUTL t46, R28
+ 62: INCEIPL $4
+
+ 0xFEBD9A4: 83A10034 lwz r29,52(r1)
+ 63: GETL R1, t48
+ 64: ADDL $0x34, t48
+ 65: LDL (t48), t50
+ 66: PUTL t50, R29
+ 67: INCEIPL $4
+
+ 0xFEBD9A8: 83C10038 lwz r30,56(r1)
+ 68: GETL R1, t52
+ 69: ADDL $0x38, t52
+ 70: LDL (t52), t54
+ 71: PUTL t54, R30
+ 72: INCEIPL $4
+
+ 0xFEBD9AC: 83E1003C lwz r31,60(r1)
+ 73: GETL R1, t56
+ 74: ADDL $0x3C, t56
+ 75: LDL (t56), t58
+ 76: PUTL t58, R31
+ 77: INCEIPL $4
+
+ 0xFEBD9B0: 38210040 addi r1,r1,64
+ 78: GETL R1, t60
+ 79: ADDL $0x40, t60
+ 80: PUTL t60, R1
+ 81: INCEIPL $4
+
+ 0xFEBD9B4: 4E800020 blr
+ 82: GETL LR, t62
+ 83: JMPo-r t62 ($4)
+
+
+
+. 2477 FEBD970 72
+. 81 41 00 44 81 81 00 14 7C 7C FA 14 93 3B 00 04 7D 48 03 A6 82 C1 00 18 7D 83 81 20 82 E1 00 1C 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+==== BB 2478 (0xFEBD7E0) approx BBs exec'd 0 ====
+
+ 0xFEBD7E0: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEBD7E4: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFEBD7E8: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFEBD7EC: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 2478 FEBD7E0 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 2479 (0xFEC80D8) approx BBs exec'd 0 ====
+
+ 0xFEC80D8: 39400000 li r10,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFEC80DC: 2C830000 cmpi cr1,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x1, CR
+ 6: INCEIPL $4
+
+ 0xFEC80E0: 40860038 bc 4,6,0xFEC8118
+ 7: Jc06o $0xFEC8118
+
+
+
+. 2479 FEC80D8 12
+. 39 40 00 00 2C 83 00 00 40 86 00 38
+==== BB 2480 (0xFEC8118) approx BBs exec'd 0 ====
+
+ 0xFEC8118: 813F0000 lwz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFEC811C: 809E1C4C lwz r4,7244(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1C4C, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0xFEC8120: 7D641214 add r11,r4,r2
+ 9: GETL R4, t8
+ 10: GETL R2, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0xFEC8124: 71200020 andi. r0,r9,0x20
+ 14: GETL R9, t12
+ 15: ANDL $0x20, t12
+ 16: PUTL t12, R0
+ 17: CMP0L t12, t14 (-rSo)
+ 18: ICRFL t14, $0x0, CR
+ 19: INCEIPL $4
+
+ 0xFEC8128: 41820010 bc 12,2,0xFEC8138
+ 20: Js02o $0xFEC8138
+
+
+
+. 2480 FEC8118 20
+. 81 3F 00 00 80 9E 1C 4C 7D 64 12 14 71 20 00 20 41 82 00 10
+==== BB 2481 (0xFEC8138) approx BBs exec'd 0 ====
+
+ 0xFEC8138: 38C00000 li r6,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0xFEC813C: 7FAAEB78 or r10,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0xFEC8140: 7CDD19AE stbx r6,r29,r3
+ 6: GETL R3, t4
+ 7: GETL R29, t6
+ 8: ADDL t6, t4
+ 9: GETL R6, t8
+ 10: STB t8, (t4)
+ 11: INCEIPL $4
+
+ 0xFEC8144: 4BFFFFA0 b 0xFEC80E4
+ 12: JMPo $0xFEC80E4 ($4)
+
+
+
+. 2481 FEC8138 16
+. 38 C0 00 00 7F AA EB 78 7C DD 19 AE 4B FF FF A0
+==== BB 2482 (0xFEC80E4) approx BBs exec'd 0 ====
+
+ 0xFEC80E4: 813F0000 lwz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFEC80E8: 7D23E378 or r3,r9,r28
+ 4: GETL R9, t4
+ 5: GETL R28, t6
+ 6: ORL t6, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFEC80EC: 7D495378 or r9,r10,r10
+ 9: GETL R10, t8
+ 10: PUTL t8, R9
+ 11: INCEIPL $4
+
+ 0xFEC80F0: 907F0000 stw r3,0(r31)
+ 12: GETL R3, t10
+ 13: GETL R31, t12
+ 14: STL t10, (t12)
+ 15: INCEIPL $4
+
+ 0xFEC80F4: 80E10024 lwz r7,36(r1)
+ 16: GETL R1, t14
+ 17: ADDL $0x24, t14
+ 18: LDL (t14), t16
+ 19: PUTL t16, R7
+ 20: INCEIPL $4
+
+ 0xFEC80F8: 7D234B78 or r3,r9,r9
+ 21: GETL R9, t18
+ 22: PUTL t18, R3
+ 23: INCEIPL $4
+
+ 0xFEC80FC: 83810010 lwz r28,16(r1)
+ 24: GETL R1, t20
+ 25: ADDL $0x10, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R28
+ 28: INCEIPL $4
+
+ 0xFEC8100: 83A10014 lwz r29,20(r1)
+ 29: GETL R1, t24
+ 30: ADDL $0x14, t24
+ 31: LDL (t24), t26
+ 32: PUTL t26, R29
+ 33: INCEIPL $4
+
+ 0xFEC8104: 7CE803A6 mtlr r7
+ 34: GETL R7, t28
+ 35: PUTL t28, LR
+ 36: INCEIPL $4
+
+ 0xFEC8108: 83C10018 lwz r30,24(r1)
+ 37: GETL R1, t30
+ 38: ADDL $0x18, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R30
+ 41: INCEIPL $4
+
+ 0xFEC810C: 83E1001C lwz r31,28(r1)
+ 42: GETL R1, t34
+ 43: ADDL $0x1C, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R31
+ 46: INCEIPL $4
+
+ 0xFEC8110: 38210020 addi r1,r1,32
+ 47: GETL R1, t38
+ 48: ADDL $0x20, t38
+ 49: PUTL t38, R1
+ 50: INCEIPL $4
+
+ 0xFEC8114: 4E800020 blr
+ 51: GETL LR, t40
+ 52: JMPo-r t40 ($4)
+
+
+
+. 2482 FEC80E4 52
+. 81 3F 00 00 7D 23 E3 78 7D 49 53 78 90 7F 00 00 80 E1 00 24 7D 23 4B 78 83 81 00 10 83 A1 00 14 7C E8 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2483 (0xFE8D0B8) approx BBs exec'd 0 ====
+
+ 0xFE8D0B8: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE8D0BC: 419E033C bc 12,30,0xFE8D3F8
+ 4: Js30o $0xFE8D3F8
+
+
+
+. 2483 FE8D0B8 8
+. 2F 83 00 00 41 9E 03 3C
+==== BB 2484 (0xFE8D0C0) approx BBs exec'd 0 ====
+
+ 0xFE8D0C0: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8D0C4: 3880000A li r4,10
+ 3: MOVL $0xA, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE8D0C8: 48049205 bl 0xFED62CC
+ 6: MOVL $0xFE8D0CC, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED62CC ($4)
+
+
+
+. 2484 FE8D0C0 12
+. 7F 43 D3 78 38 80 00 0A 48 04 92 05
+==== BB 2485 (0xFED6348) approx BBs exec'd 0 ====
+
+ 0xFED6348: 7CE62838 and r6,r7,r5
+ 0: GETL R7, t0
+ 1: GETL R5, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFED634C: 7CEB2B78 or r11,r7,r5
+ 5: GETL R7, t4
+ 6: GETL R5, t6
+ 7: ORL t6, t4
+ 8: PUTL t4, R11
+ 9: INCEIPL $4
+
+ 0xFED6350: 7CE06038 and r0,r7,r12
+ 10: GETL R7, t8
+ 11: GETL R12, t10
+ 12: ANDL t8, t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0xFED6354: 7CEA6378 or r10,r7,r12
+ 15: GETL R7, t12
+ 16: GETL R12, t14
+ 17: ORL t14, t12
+ 18: PUTL t12, R10
+ 19: INCEIPL $4
+
+ 0xFED6358: 7CC63A14 add r6,r6,r7
+ 20: GETL R6, t16
+ 21: GETL R7, t18
+ 22: ADDL t16, t18
+ 23: PUTL t18, R6
+ 24: INCEIPL $4
+
+ 0xFED635C: 7C003A14 add r0,r0,r7
+ 25: GETL R0, t20
+ 26: GETL R7, t22
+ 27: ADDL t20, t22
+ 28: PUTL t22, R0
+ 29: INCEIPL $4
+
+ 0xFED6360: 7D6530F8 nor r5,r11,r6
+ 30: GETL R11, t24
+ 31: GETL R6, t26
+ 32: ORL t26, t24
+ 33: NOTL t24
+ 34: PUTL t24, R5
+ 35: INCEIPL $4
+
+ 0xFED6364: 7D4900F8 nor r9,r10,r0
+ 36: GETL R10, t28
+ 37: GETL R0, t30
+ 38: ORL t30, t28
+ 39: NOTL t28
+ 40: PUTL t28, R9
+ 41: INCEIPL $4
+
+ 0xFED6368: 7C054840 cmpl cr0,r5,r9
+ 42: GETL R5, t32
+ 43: GETL R9, t34
+ 44: CMPUL t32, t34, t36 (-rSo)
+ 45: ICRFL t36, $0x0, CR
+ 46: INCEIPL $4
+
+ 0xFED636C: 4D810020 bclr 12,1
+ 47: GETL LR, t38
+ 48: Js01o-r t38
+
+
+
+. 2485 FED6348 40
+. 7C E6 28 38 7C EB 2B 78 7C E0 60 38 7C EA 63 78 7C C6 3A 14 7C 00 3A 14 7D 65 30 F8 7D 49 00 F8 7C 05 48 40 4D 81 00 20
+==== BB 2486 (0xFED6370) approx BBs exec'd 0 ====
+
+ 0xFED6370: 7D240034 cntlzw r4,r9
+ 0: GETL R9, t0
+ 1: CNTLZL t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0xFED6374: 5484E8FE rlwinm r4,r4,29,3,31
+ 4: GETL R4, t2
+ 5: SHRL $0x3, t2
+ 6: PUTL t2, R4
+ 7: INCEIPL $4
+
+ 0xFED6378: 7C682214 add r3,r8,r4
+ 8: GETL R8, t4
+ 9: GETL R4, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0xFED637C: 4E800020 blr
+ 13: GETL LR, t8
+ 14: JMPo-r t8 ($4)
+
+
+
+. 2486 FED6370 16
+. 7D 24 00 34 54 84 E8 FE 7C 68 22 14 4E 80 00 20
+==== BB 2487 (0xFE8D0CC) approx BBs exec'd 0 ====
+
+ 0xFE8D0CC: 7D121214 add r8,r18,r2
+ 0: GETL R18, t0
+ 1: GETL R2, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFE8D0D0: 3003FFFF addic r0,r3,-1
+ 5: GETL R3, t4
+ 6: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE8D0D4: 7E201910 subfe r17,r0,r3
+ 9: GETL R0, t6
+ 10: GETL R3, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R17
+ 13: INCEIPL $4
+
+ 0xFE8D0D8: 7F43D378 or r3,r26,r26
+ 14: GETL R26, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0xFE8D0DC: 48000008 b 0xFE8D0E4
+ 17: JMPo $0xFE8D0E4 ($4)
+
+
+
+. 2487 FE8D0CC 20
+. 7D 12 12 14 30 03 FF FF 7E 20 19 10 7F 43 D3 78 48 00 00 08
+==== BB 2488 (0xFE8D0E4) approx BBs exec'd 0 ====
+
+ 0xFE8D0E4: 82680000 lwz r19,0(r8)
+ 0: GETL R8, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R19
+ 3: INCEIPL $4
+
+ 0xFE8D0E8: 2C930000 cmpi cr1,r19,0
+ 4: GETL R19, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFE8D0EC: 41860380 bc 12,6,0xFE8D46C
+ 8: Js06o $0xFE8D46C
+
+
+
+. 2488 FE8D0E4 12
+. 82 68 00 00 2C 93 00 00 41 86 03 80
+==== BB 2489 (0xFE8D0F0) approx BBs exec'd 0 ====
+
+ 0xFE8D0F0: 89430000 lbz r10,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFE8D0F4: 83280000 lwz r25,0(r8)
+ 4: GETL R8, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R25
+ 7: INCEIPL $4
+
+ 0xFE8D0F8: 555C083C rlwinm r28,r10,1,0,30
+ 8: GETL R10, t8
+ 9: SHLL $0x1, t8
+ 10: PUTL t8, R28
+ 11: INCEIPL $4
+
+ 0xFE8D0FC: 7F1CCA2E lhzx r24,r28,r25
+ 12: GETL R25, t10
+ 13: GETL R28, t12
+ 14: ADDL t12, t10
+ 15: LDW (t10), t14
+ 16: PUTL t14, R24
+ 17: INCEIPL $4
+
+ 0xFE8D100: 73090020 andi. r9,r24,0x20
+ 18: GETL R24, t16
+ 19: ANDL $0x20, t16
+ 20: PUTL t16, R9
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0xFE8D104: 4082FFDC bc 4,2,0xFE8D0E0
+ 24: Jc02o $0xFE8D0E0
+
+
+
+. 2489 FE8D0F0 24
+. 89 43 00 00 83 28 00 00 55 5C 08 3C 7F 1C CA 2E 73 09 00 20 40 82 FF DC
+==== BB 2490 (0xFE8D108) approx BBs exec'd 0 ====
+
+ 0xFE8D108: 2F0A0000 cmpi cr6,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE8D10C: 419A02D8 bc 12,26,0xFE8D3E4
+ 4: Js26o $0xFE8D3E4
+
+
+
+. 2490 FE8D108 8
+. 2F 0A 00 00 41 9A 02 D8
+==== BB 2491 (0xFE8D110) approx BBs exec'd 0 ====
+
+ 0xFE8D110: 2F8A0023 cmpi cr7,r10,35
+ 0: GETL R10, t0
+ 1: MOVL $0x23, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE8D114: 7C761B78 or r22,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R22
+ 7: INCEIPL $4
+
+ 0xFE8D118: 7D121214 add r8,r18,r2
+ 8: GETL R18, t8
+ 9: GETL R2, t10
+ 10: ADDL t8, t10
+ 11: PUTL t10, R8
+ 12: INCEIPL $4
+
+ 0xFE8D11C: 38630001 addi r3,r3,1
+ 13: GETL R3, t12
+ 14: ADDL $0x1, t12
+ 15: PUTL t12, R3
+ 16: INCEIPL $4
+
+ 0xFE8D120: 40BE0020 bc 5,30,0xFE8D140
+ 17: Jc30o $0xFE8D140
+
+
+
+. 2491 FE8D110 20
+. 2F 8A 00 23 7C 76 1B 78 7D 12 12 14 38 63 00 01 40 BE 00 20
+==== BB 2492 (0xFE8D124) approx BBs exec'd 0 ====
+
+ 0xFE8D124: 480002C0 b 0xFE8D3E4
+ 0: JMPo $0xFE8D3E4 ($4)
+
+
+
+. 2492 FE8D124 4
+. 48 00 02 C0
+==== BB 2493 (0xFE8D3E4) approx BBs exec'd 0 ====
+
+ 0xFE8D3E4: 2C110000 cmpi cr0,r17,0
+ 0: GETL R17, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFE8D3E8: 4182009C bc 12,2,0xFE8D484
+ 4: Js02o $0xFE8D484
+
+
+
+. 2493 FE8D3E4 8
+. 2C 11 00 00 41 82 00 9C
+==== BB 2494 (0xFE8D3EC) approx BBs exec'd 0 ====
+
+ 0xFE8D3EC: 823B0000 lwz r17,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R17
+ 3: INCEIPL $4
+
+ 0xFE8D3F0: 72290010 andi. r9,r17,0x10
+ 4: GETL R17, t4
+ 5: ANDL $0x10, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFE8D3F4: 4182FCB4 bc 12,2,0xFE8D0A8
+ 10: Js02o $0xFE8D0A8
+
+
+
+. 2494 FE8D3EC 12
+. 82 3B 00 00 72 29 00 10 41 82 FC B4
+==== BB 2495 (0xFE8D0A8) approx BBs exec'd 0 ====
+
+ 0xFE8D0A8: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8D0AC: 38800190 li r4,400
+ 3: MOVL $0x190, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE8D0B0: 7F65DB78 or r5,r27,r27
+ 6: GETL R27, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFE8D0B4: 4803AFC5 bl 0xFEC8078
+ 9: MOVL $0xFE8D0B8, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFEC8078 ($4)
+
+
+
+. 2495 FE8D0A8 16
+. 7F 43 D3 78 38 80 01 90 7F 65 DB 78 48 03 AF C5
+==== BB 2496 (0xFED7854) approx BBs exec'd 0 ====
+
+ 0xFED7854: 7D234B78 or r3,r9,r9
+ 0: GETL R9, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED7858: 38210010 addi r1,r1,16
+ 3: GETL R1, t2
+ 4: ADDL $0x10, t2
+ 5: PUTL t2, R1
+ 6: INCEIPL $4
+
+ 0xFED785C: 4E800020 blr
+ 7: GETL LR, t4
+ 8: JMPo-r t4 ($4)
+
+
+
+. 2496 FED7854 12
+. 7D 23 4B 78 38 21 00 10 4E 80 00 20
+==== BB 2497 (0xFED87A8) approx BBs exec'd 0 ====
+
+ 0xFED87A8: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED87AC: 7FA4EB78 or r4,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFED87B0: 5785F0BE rlwinm r5,r28,30,2,31
+ 6: GETL R28, t4
+ 7: SHRL $0x2, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0xFED87B4: 4800015D bl 0xFED8910
+ 10: MOVL $0xFED87B8, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0xFED8910 ($4)
+
+
+
+. 2497 FED87A8 16
+. 7F E3 FB 78 7F A4 EB 78 57 85 F0 BE 48 00 01 5D
+==== BB 2498 _wordcopy_fwd_dest_aligned(0xFED8910) approx BBs exec'd 0 ====
+
+ 0xFED8910: 54A007BE rlwinm r0,r5,0,30,31
+ 0: GETL R5, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0xFED8914: 54881EF8 rlwinm r8,r4,3,27,28
+ 4: GETL R4, t2
+ 5: ROLL $0x3, t2
+ 6: ANDL $0x18, t2
+ 7: PUTL t2, R8
+ 8: INCEIPL $4
+
+ 0xFED8918: 2F800001 cmpi cr7,r0,1
+ 9: GETL R0, t4
+ 10: MOVL $0x1, t8
+ 11: CMPL t4, t8, t6 (-rSo)
+ 12: ICRFL t6, $0x7, CR
+ 13: INCEIPL $4
+
+ 0xFED891C: 9421FFF0 stwu r1,-16(r1)
+ 14: GETL R1, t10
+ 15: GETL R1, t12
+ 16: ADDL $0xFFFFFFF0, t12
+ 17: PUTL t12, R1
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0xFED8920: 5484003A rlwinm r4,r4,0,0,29
+ 20: GETL R4, t14
+ 21: ANDL $0xFFFFFFFC, t14
+ 22: PUTL t14, R4
+ 23: INCEIPL $4
+
+ 0xFED8924: 20E80020 subfic r7,r8,32
+ 24: GETL R8, t16
+ 25: MOVL $0x20, t18
+ 26: SBBL t16, t18 (-wCa)
+ 27: PUTL t18, R7
+ 28: INCEIPL $4
+
+ 0xFED8928: 419E00B8 bc 12,30,0xFED89E0
+ 29: Js30o $0xFED89E0
+
+
+
+. 2498 FED8910 28
+. 54 A0 07 BE 54 88 1E F8 2F 80 00 01 94 21 FF F0 54 84 00 3A 20 E8 00 20 41 9E 00 B8
+==== BB 2499 (0xFED892C) approx BBs exec'd 0 ====
+
+ 0xFED892C: 28000001 cmpli cr0,r0,1
+ 0: GETL R0, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFED8930: 4180008C bc 12,0,0xFED89BC
+ 5: Js00o $0xFED89BC
+
+
+
+. 2499 FED892C 8
+. 28 00 00 01 41 80 00 8C
+==== BB 2500 (0xFED8934) approx BBs exec'd 0 ====
+
+ 0xFED8934: 2C800002 cmpi cr1,r0,2
+ 0: GETL R0, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFED8938: 418600BC bc 12,6,0xFED89F4
+ 5: Js06o $0xFED89F4
+
+
+
+. 2500 FED8934 8
+. 2C 80 00 02 41 86 00 BC
+==== BB 2501 (0xFED893C) approx BBs exec'd 0 ====
+
+ 0xFED893C: 2F000003 cmpi cr6,r0,3
+ 0: GETL R0, t0
+ 1: MOVL $0x3, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFED8940: 419A008C bc 12,26,0xFED89CC
+ 5: Js26o $0xFED89CC
+
+
+
+. 2501 FED893C 8
+. 2F 00 00 03 41 9A 00 8C
+==== BB 2502 (0xFED89CC) approx BBs exec'd 0 ====
+
+ 0xFED89CC: 81640000 lwz r11,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFED89D0: 3863FFF8 addi r3,r3,-8
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFF8, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED89D4: 81440004 lwz r10,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0xFED89D8: 38A50001 addi r5,r5,1
+ 13: GETL R5, t10
+ 14: ADDL $0x1, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0xFED89DC: 4BFFFF90 b 0xFED896C
+ 17: JMPo $0xFED896C ($4)
+
+
+
+. 2502 FED89CC 20
+. 81 64 00 00 38 63 FF F8 81 44 00 04 38 A5 00 01 4B FF FF 90
+==== BB 2503 (0xFED896C) approx BBs exec'd 0 ====
+
+ 0xFED896C: 7D6C4030 slw r12,r11,r8
+ 0: GETL R11, t2
+ 1: GETL R8, t0
+ 2: SHLL t0, t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFED8970: 7D4B3C30 srw r11,r10,r7
+ 5: GETL R10, t6
+ 6: GETL R7, t4
+ 7: SHRL t4, t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0xFED8974: 7D865B78 or r6,r12,r11
+ 10: GETL R12, t8
+ 11: GETL R11, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R6
+ 14: INCEIPL $4
+
+ 0xFED8978: 81640008 lwz r11,8(r4)
+ 15: GETL R4, t12
+ 16: ADDL $0x8, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R11
+ 19: INCEIPL $4
+
+ 0xFED897C: 90C30008 stw r6,8(r3)
+ 20: GETL R6, t16
+ 21: GETL R3, t18
+ 22: ADDL $0x8, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0xFED8980: 34A5FFFC addic. r5,r5,-4
+ 25: GETL R5, t20
+ 26: ADCL $0xFFFFFFFC, t20 (-wCa)
+ 27: PUTL t20, R5
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x0, CR
+ 30: INCEIPL $4
+
+ 0xFED8984: 7D464030 slw r6,r10,r8
+ 31: GETL R10, t26
+ 32: GETL R8, t24
+ 33: SHLL t24, t26
+ 34: PUTL t26, R6
+ 35: INCEIPL $4
+
+ 0xFED8988: 7D693C30 srw r9,r11,r7
+ 36: GETL R11, t30
+ 37: GETL R7, t28
+ 38: SHRL t28, t30
+ 39: PUTL t30, R9
+ 40: INCEIPL $4
+
+ 0xFED898C: 8144000C lwz r10,12(r4)
+ 41: GETL R4, t32
+ 42: ADDL $0xC, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R10
+ 45: INCEIPL $4
+
+ 0xFED8990: 7CC04B78 or r0,r6,r9
+ 46: GETL R6, t36
+ 47: GETL R9, t38
+ 48: ORL t38, t36
+ 49: PUTL t36, R0
+ 50: INCEIPL $4
+
+ 0xFED8994: 38840010 addi r4,r4,16
+ 51: GETL R4, t40
+ 52: ADDL $0x10, t40
+ 53: PUTL t40, R4
+ 54: INCEIPL $4
+
+ 0xFED8998: 9003000C stw r0,12(r3)
+ 55: GETL R0, t42
+ 56: GETL R3, t44
+ 57: ADDL $0xC, t44
+ 58: STL t42, (t44)
+ 59: INCEIPL $4
+
+ 0xFED899C: 38630010 addi r3,r3,16
+ 60: GETL R3, t46
+ 61: ADDL $0x10, t46
+ 62: PUTL t46, R3
+ 63: INCEIPL $4
+
+ 0xFED89A0: 40A2FFA4 bc 5,2,0xFED8944
+ 64: Jc02o $0xFED8944
+
+
+
+. 2503 FED896C 56
+. 7D 6C 40 30 7D 4B 3C 30 7D 86 5B 78 81 64 00 08 90 C3 00 08 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
+==== BB 2504 (0xFED8944) approx BBs exec'd 0 ====
+
+ 0xFED8944: 7D664030 slw r6,r11,r8
+ 0: GETL R11, t2
+ 1: GETL R8, t0
+ 2: SHLL t0, t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFED8948: 7D493C30 srw r9,r10,r7
+ 5: GETL R10, t6
+ 6: GETL R7, t4
+ 7: SHRL t4, t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFED894C: 7CC04B78 or r0,r6,r9
+ 10: GETL R6, t8
+ 11: GETL R9, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R0
+ 14: INCEIPL $4
+
+ 0xFED8950: 81640000 lwz r11,0(r4)
+ 15: GETL R4, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R11
+ 18: INCEIPL $4
+
+ 0xFED8954: 90030000 stw r0,0(r3)
+ 19: GETL R0, t16
+ 20: GETL R3, t18
+ 21: STL t16, (t18)
+ 22: INCEIPL $4
+
+ 0xFED8958: 7D404030 slw r0,r10,r8
+ 23: GETL R10, t22
+ 24: GETL R8, t20
+ 25: SHLL t20, t22
+ 26: PUTL t22, R0
+ 27: INCEIPL $4
+
+ 0xFED895C: 7D6A3C30 srw r10,r11,r7
+ 28: GETL R11, t26
+ 29: GETL R7, t24
+ 30: SHRL t24, t26
+ 31: PUTL t26, R10
+ 32: INCEIPL $4
+
+ 0xFED8960: 7C0C5378 or r12,r0,r10
+ 33: GETL R0, t28
+ 34: GETL R10, t30
+ 35: ORL t30, t28
+ 36: PUTL t28, R12
+ 37: INCEIPL $4
+
+ 0xFED8964: 81440004 lwz r10,4(r4)
+ 38: GETL R4, t32
+ 39: ADDL $0x4, t32
+ 40: LDL (t32), t34
+ 41: PUTL t34, R10
+ 42: INCEIPL $4
+
+ 0xFED8968: 91830004 stw r12,4(r3)
+ 43: GETL R12, t36
+ 44: GETL R3, t38
+ 45: ADDL $0x4, t38
+ 46: STL t36, (t38)
+ 47: INCEIPL $4
+
+ 0xFED896C: 7D6C4030 slw r12,r11,r8
+ 48: GETL R11, t42
+ 49: GETL R8, t40
+ 50: SHLL t40, t42
+ 51: PUTL t42, R12
+ 52: INCEIPL $4
+
+ 0xFED8970: 7D4B3C30 srw r11,r10,r7
+ 53: GETL R10, t46
+ 54: GETL R7, t44
+ 55: SHRL t44, t46
+ 56: PUTL t46, R11
+ 57: INCEIPL $4
+
+ 0xFED8974: 7D865B78 or r6,r12,r11
+ 58: GETL R12, t48
+ 59: GETL R11, t50
+ 60: ORL t50, t48
+ 61: PUTL t48, R6
+ 62: INCEIPL $4
+
+ 0xFED8978: 81640008 lwz r11,8(r4)
+ 63: GETL R4, t52
+ 64: ADDL $0x8, t52
+ 65: LDL (t52), t54
+ 66: PUTL t54, R11
+ 67: INCEIPL $4
+
+ 0xFED897C: 90C30008 stw r6,8(r3)
+ 68: GETL R6, t56
+ 69: GETL R3, t58
+ 70: ADDL $0x8, t58
+ 71: STL t56, (t58)
+ 72: INCEIPL $4
+
+ 0xFED8980: 34A5FFFC addic. r5,r5,-4
+ 73: GETL R5, t60
+ 74: ADCL $0xFFFFFFFC, t60 (-wCa)
+ 75: PUTL t60, R5
+ 76: CMP0L t60, t62 (-rSo)
+ 77: ICRFL t62, $0x0, CR
+ 78: INCEIPL $4
+
+ 0xFED8984: 7D464030 slw r6,r10,r8
+ 79: GETL R10, t66
+ 80: GETL R8, t64
+ 81: SHLL t64, t66
+ 82: PUTL t66, R6
+ 83: INCEIPL $4
+
+ 0xFED8988: 7D693C30 srw r9,r11,r7
+ 84: GETL R11, t70
+ 85: GETL R7, t68
+ 86: SHRL t68, t70
+ 87: PUTL t70, R9
+ 88: INCEIPL $4
+
+ 0xFED898C: 8144000C lwz r10,12(r4)
+ 89: GETL R4, t72
+ 90: ADDL $0xC, t72
+ 91: LDL (t72), t74
+ 92: PUTL t74, R10
+ 93: INCEIPL $4
+
+ 0xFED8990: 7CC04B78 or r0,r6,r9
+ 94: GETL R6, t76
+ 95: GETL R9, t78
+ 96: ORL t78, t76
+ 97: PUTL t76, R0
+ 98: INCEIPL $4
+
+ 0xFED8994: 38840010 addi r4,r4,16
+ 99: GETL R4, t80
+ 100: ADDL $0x10, t80
+ 101: PUTL t80, R4
+ 102: INCEIPL $4
+
+ 0xFED8998: 9003000C stw r0,12(r3)
+ 103: GETL R0, t82
+ 104: GETL R3, t84
+ 105: ADDL $0xC, t84
+ 106: STL t82, (t84)
+ 107: INCEIPL $4
+
+ 0xFED899C: 38630010 addi r3,r3,16
+ 108: GETL R3, t86
+ 109: ADDL $0x10, t86
+ 110: PUTL t86, R3
+ 111: INCEIPL $4
+
+ 0xFED89A0: 40A2FFA4 bc 5,2,0xFED8944
+ 112: Jc02o $0xFED8944
+
+
+
+. 2504 FED8944 96
+. 7D 66 40 30 7D 49 3C 30 7C C0 4B 78 81 64 00 00 90 03 00 00 7D 40 40 30 7D 6A 3C 30 7C 0C 53 78 81 44 00 04 91 83 00 04 7D 6C 40 30 7D 4B 3C 30 7D 86 5B 78 81 64 00 08 90 C3 00 08 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
+==== BB 2505 (0xFED89A4) approx BBs exec'd 0 ====
+
+ 0xFED89A4: 7D654030 slw r5,r11,r8
+ 0: GETL R11, t2
+ 1: GETL R8, t0
+ 2: SHLL t0, t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFED89A8: 7D483C30 srw r8,r10,r7
+ 5: GETL R10, t6
+ 6: GETL R7, t4
+ 7: SHRL t4, t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0xFED89AC: 7CA44378 or r4,r5,r8
+ 10: GETL R5, t8
+ 11: GETL R8, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R4
+ 14: INCEIPL $4
+
+ 0xFED89B0: 38210010 addi r1,r1,16
+ 15: GETL R1, t12
+ 16: ADDL $0x10, t12
+ 17: PUTL t12, R1
+ 18: INCEIPL $4
+
+ 0xFED89B4: 90830000 stw r4,0(r3)
+ 19: GETL R4, t14
+ 20: GETL R3, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFED89B8: 4E800020 blr
+ 23: GETL LR, t18
+ 24: JMPo-r t18 ($4)
+
+
+
+. 2505 FED89A4 24
+. 7D 65 40 30 7D 48 3C 30 7C A4 43 78 38 21 00 10 90 83 00 00 4E 80 00 20
+==== BB 2506 (0xFED87B8) approx BBs exec'd 0 ====
+
+ 0xFED87B8: 4BFFFF98 b 0xFED8750
+ 0: JMPo $0xFED8750 ($4)
+
+
+
+. 2506 FED87B8 4
+. 4B FF FF 98
+==== BB 2507 (0xFED7840) approx BBs exec'd 0 ====
+
+ 0xFED7840: 38210010 addi r1,r1,16
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: PUTL t0, R1
+ 3: INCEIPL $4
+
+ 0xFED7844: 4E800020 blr
+ 4: GETL LR, t2
+ 5: JMPo-r t2 ($4)
+
+
+
+. 2507 FED7840 8
+. 38 21 00 10 4E 80 00 20
+==== BB 2508 (0xFED7860) approx BBs exec'd 0 ====
+
+ 0xFED7860: 3863FFFD addi r3,r3,-3
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFD, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFED7864: 38210010 addi r1,r1,16
+ 4: GETL R1, t2
+ 5: ADDL $0x10, t2
+ 6: PUTL t2, R1
+ 7: INCEIPL $4
+
+ 0xFED7868: 4E800020 blr
+ 8: GETL LR, t4
+ 9: JMPo-r t4 ($4)
+
+
+
+. 2508 FED7860 12
+. 38 63 FF FD 38 21 00 10 4E 80 00 20
+==== BB 2509 (0xFED89E0) approx BBs exec'd 0 ====
+
+ 0xFED89E0: 81640000 lwz r11,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFED89E4: 38A5FFFF addi r5,r5,-1
+ 4: GETL R5, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFED89E8: 81440004 lwz r10,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0xFED89EC: 38840008 addi r4,r4,8
+ 13: GETL R4, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R4
+ 16: INCEIPL $4
+
+ 0xFED89F0: 4BFFFF54 b 0xFED8944
+ 17: JMPo $0xFED8944 ($4)
+
+
+
+. 2509 FED89E0 20
+. 81 64 00 00 38 A5 FF FF 81 44 00 04 38 84 00 08 4B FF FF 54
+==== BB 2510 (0xFED7804) approx BBs exec'd 0 ====
+
+ 0xFED7804: 88C90003 lbz r6,3(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x3, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFED7808: 7F862000 cmp cr7,r6,r4
+ 5: GETL R6, t4
+ 6: GETL R4, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFED780C: 419E003C bc 12,30,0xFED7848
+ 10: Js30o $0xFED7848
+
+
+
+. 2510 FED7804 12
+. 88 C9 00 03 7F 86 20 00 41 9E 00 3C
+==== BB 2511 (0xFED7848) approx BBs exec'd 0 ====
+
+ 0xFED7848: 3863FFFF addi r3,r3,-1
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFED784C: 38210010 addi r1,r1,16
+ 4: GETL R1, t2
+ 5: ADDL $0x10, t2
+ 6: PUTL t2, R1
+ 7: INCEIPL $4
+
+ 0xFED7850: 4E800020 blr
+ 8: GETL LR, t4
+ 9: JMPo-r t4 ($4)
+
+
+
+. 2511 FED7848 12
+. 38 63 FF FF 38 21 00 10 4E 80 00 20
+==== BB 2512 (0xFED89BC) approx BBs exec'd 0 ====
+
+ 0xFED89BC: 81440000 lwz r10,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFED89C0: 3863FFFC addi r3,r3,-4
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFFC, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED89C4: 85640004 lwzu r11,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: PUTL t6, R4
+ 11: LDL (t6), t8
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0xFED89C8: 4BFFFF90 b 0xFED8958
+ 14: JMPo $0xFED8958 ($4)
+
+
+
+. 2512 FED89BC 16
+. 81 44 00 00 38 63 FF FC 85 64 00 04 4B FF FF 90
+==== BB 2513 (0xFED8958) approx BBs exec'd 0 ====
+
+ 0xFED8958: 7D404030 slw r0,r10,r8
+ 0: GETL R10, t2
+ 1: GETL R8, t0
+ 2: SHLL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED895C: 7D6A3C30 srw r10,r11,r7
+ 5: GETL R11, t6
+ 6: GETL R7, t4
+ 7: SHRL t4, t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0xFED8960: 7C0C5378 or r12,r0,r10
+ 10: GETL R0, t8
+ 11: GETL R10, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R12
+ 14: INCEIPL $4
+
+ 0xFED8964: 81440004 lwz r10,4(r4)
+ 15: GETL R4, t12
+ 16: ADDL $0x4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R10
+ 19: INCEIPL $4
+
+ 0xFED8968: 91830004 stw r12,4(r3)
+ 20: GETL R12, t16
+ 21: GETL R3, t18
+ 22: ADDL $0x4, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0xFED896C: 7D6C4030 slw r12,r11,r8
+ 25: GETL R11, t22
+ 26: GETL R8, t20
+ 27: SHLL t20, t22
+ 28: PUTL t22, R12
+ 29: INCEIPL $4
+
+ 0xFED8970: 7D4B3C30 srw r11,r10,r7
+ 30: GETL R10, t26
+ 31: GETL R7, t24
+ 32: SHRL t24, t26
+ 33: PUTL t26, R11
+ 34: INCEIPL $4
+
+ 0xFED8974: 7D865B78 or r6,r12,r11
+ 35: GETL R12, t28
+ 36: GETL R11, t30
+ 37: ORL t30, t28
+ 38: PUTL t28, R6
+ 39: INCEIPL $4
+
+ 0xFED8978: 81640008 lwz r11,8(r4)
+ 40: GETL R4, t32
+ 41: ADDL $0x8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R11
+ 44: INCEIPL $4
+
+ 0xFED897C: 90C30008 stw r6,8(r3)
+ 45: GETL R6, t36
+ 46: GETL R3, t38
+ 47: ADDL $0x8, t38
+ 48: STL t36, (t38)
+ 49: INCEIPL $4
+
+ 0xFED8980: 34A5FFFC addic. r5,r5,-4
+ 50: GETL R5, t40
+ 51: ADCL $0xFFFFFFFC, t40 (-wCa)
+ 52: PUTL t40, R5
+ 53: CMP0L t40, t42 (-rSo)
+ 54: ICRFL t42, $0x0, CR
+ 55: INCEIPL $4
+
+ 0xFED8984: 7D464030 slw r6,r10,r8
+ 56: GETL R10, t46
+ 57: GETL R8, t44
+ 58: SHLL t44, t46
+ 59: PUTL t46, R6
+ 60: INCEIPL $4
+
+ 0xFED8988: 7D693C30 srw r9,r11,r7
+ 61: GETL R11, t50
+ 62: GETL R7, t48
+ 63: SHRL t48, t50
+ 64: PUTL t50, R9
+ 65: INCEIPL $4
+
+ 0xFED898C: 8144000C lwz r10,12(r4)
+ 66: GETL R4, t52
+ 67: ADDL $0xC, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R10
+ 70: INCEIPL $4
+
+ 0xFED8990: 7CC04B78 or r0,r6,r9
+ 71: GETL R6, t56
+ 72: GETL R9, t58
+ 73: ORL t58, t56
+ 74: PUTL t56, R0
+ 75: INCEIPL $4
+
+ 0xFED8994: 38840010 addi r4,r4,16
+ 76: GETL R4, t60
+ 77: ADDL $0x10, t60
+ 78: PUTL t60, R4
+ 79: INCEIPL $4
+
+ 0xFED8998: 9003000C stw r0,12(r3)
+ 80: GETL R0, t62
+ 81: GETL R3, t64
+ 82: ADDL $0xC, t64
+ 83: STL t62, (t64)
+ 84: INCEIPL $4
+
+ 0xFED899C: 38630010 addi r3,r3,16
+ 85: GETL R3, t66
+ 86: ADDL $0x10, t66
+ 87: PUTL t66, R3
+ 88: INCEIPL $4
+
+ 0xFED89A0: 40A2FFA4 bc 5,2,0xFED8944
+ 89: Jc02o $0xFED8944
+
+
+
+. 2513 FED8958 76
+. 7D 40 40 30 7D 6A 3C 30 7C 0C 53 78 81 44 00 04 91 83 00 04 7D 6C 40 30 7D 4B 3C 30 7D 86 5B 78 81 64 00 08 90 C3 00 08 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
+==== BB 2514 (0xFED888C) approx BBs exec'd 0 ====
+
+ 0xFED888C: 81240000 lwz r9,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFED8890: 3863FFE8 addi r3,r3,-24
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFE8, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED8894: 3884FFEC addi r4,r4,-20
+ 8: GETL R4, t6
+ 9: ADDL $0xFFFFFFEC, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0xFED8898: 38A50005 addi r5,r5,5
+ 12: GETL R5, t8
+ 13: ADDL $0x5, t8
+ 14: PUTL t8, R5
+ 15: INCEIPL $4
+
+ 0xFED889C: 4BFFFF98 b 0xFED8834
+ 16: JMPo $0xFED8834 ($4)
+
+
+
+. 2514 FED888C 20
+. 81 24 00 00 38 63 FF E8 38 84 FF EC 38 A5 00 05 4B FF FF 98
+==== BB 2515 (0xFE8D0E0) approx BBs exec'd 0 ====
+
+ 0xFE8D0E0: 38630001 addi r3,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFE8D0E4: 82680000 lwz r19,0(r8)
+ 4: GETL R8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R19
+ 7: INCEIPL $4
+
+ 0xFE8D0E8: 2C930000 cmpi cr1,r19,0
+ 8: GETL R19, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0xFE8D0EC: 41860380 bc 12,6,0xFE8D46C
+ 12: Js06o $0xFE8D46C
+
+
+
+. 2515 FE8D0E0 16
+. 38 63 00 01 82 68 00 00 2C 93 00 00 41 86 03 80
+==== BB 2516 (0xFED89F4) approx BBs exec'd 0 ====
+
+ 0xFED89F4: 81440000 lwz r10,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFED89F8: 3863FFF4 addi r3,r3,-12
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFF4, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED89FC: 81640004 lwz r11,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0xFED8A00: 38A50002 addi r5,r5,2
+ 13: GETL R5, t10
+ 14: ADDL $0x2, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0xFED8A04: 3884FFFC addi r4,r4,-4
+ 17: GETL R4, t12
+ 18: ADDL $0xFFFFFFFC, t12
+ 19: PUTL t12, R4
+ 20: INCEIPL $4
+
+ 0xFED8A08: 4BFFFF78 b 0xFED8980
+ 21: JMPo $0xFED8980 ($4)
+
+
+
+. 2516 FED89F4 24
+. 81 44 00 00 38 63 FF F4 81 64 00 04 38 A5 00 02 38 84 FF FC 4B FF FF 78
+==== BB 2517 (0xFED8980) approx BBs exec'd 0 ====
+
+ 0xFED8980: 34A5FFFC addic. r5,r5,-4
+ 0: GETL R5, t0
+ 1: ADCL $0xFFFFFFFC, t0 (-wCa)
+ 2: PUTL t0, R5
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED8984: 7D464030 slw r6,r10,r8
+ 6: GETL R10, t6
+ 7: GETL R8, t4
+ 8: SHLL t4, t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0xFED8988: 7D693C30 srw r9,r11,r7
+ 11: GETL R11, t10
+ 12: GETL R7, t8
+ 13: SHRL t8, t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0xFED898C: 8144000C lwz r10,12(r4)
+ 16: GETL R4, t12
+ 17: ADDL $0xC, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R10
+ 20: INCEIPL $4
+
+ 0xFED8990: 7CC04B78 or r0,r6,r9
+ 21: GETL R6, t16
+ 22: GETL R9, t18
+ 23: ORL t18, t16
+ 24: PUTL t16, R0
+ 25: INCEIPL $4
+
+ 0xFED8994: 38840010 addi r4,r4,16
+ 26: GETL R4, t20
+ 27: ADDL $0x10, t20
+ 28: PUTL t20, R4
+ 29: INCEIPL $4
+
+ 0xFED8998: 9003000C stw r0,12(r3)
+ 30: GETL R0, t22
+ 31: GETL R3, t24
+ 32: ADDL $0xC, t24
+ 33: STL t22, (t24)
+ 34: INCEIPL $4
+
+ 0xFED899C: 38630010 addi r3,r3,16
+ 35: GETL R3, t26
+ 36: ADDL $0x10, t26
+ 37: PUTL t26, R3
+ 38: INCEIPL $4
+
+ 0xFED89A0: 40A2FFA4 bc 5,2,0xFED8944
+ 39: Jc02o $0xFED8944
+
+
+
+. 2517 FED8980 36
+. 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
+==== BB 2518 (0xFE8D140) approx BBs exec'd 0 ====
+
+ 0xFE8D140: 89430000 lbz r10,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFE8D144: 2C8A0000 cmpi cr1,r10,0
+ 4: GETL R10, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFE8D148: 4186003C bc 12,6,0xFE8D184
+ 8: Js06o $0xFE8D184
+
+
+
+. 2518 FE8D140 12
+. 89 43 00 00 2C 8A 00 00 41 86 00 3C
+==== BB 2519 (0xFE8D14C) approx BBs exec'd 0 ====
+
+ 0xFE8D14C: 83A80000 lwz r29,0(r8)
+ 0: GETL R8, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0xFE8D150: 2C1D0000 cmpi cr0,r29,0
+ 4: GETL R29, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFE8D154: 4082FFD4 bc 4,2,0xFE8D128
+ 8: Jc02o $0xFE8D128
+
+
+
+. 2519 FE8D14C 12
+. 83 A8 00 00 2C 1D 00 00 40 82 FF D4
+==== BB 2520 (0xFE8D128) approx BBs exec'd 0 ====
+
+ 0xFE8D128: 80C80000 lwz r6,0(r8)
+ 0: GETL R8, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFE8D12C: 5547083C rlwinm r7,r10,1,0,30
+ 4: GETL R10, t4
+ 5: SHLL $0x1, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0xFE8D130: 7C07322E lhzx r0,r7,r6
+ 8: GETL R6, t6
+ 9: GETL R7, t8
+ 10: ADDL t8, t6
+ 11: LDW (t6), t10
+ 12: PUTL t10, R0
+ 13: INCEIPL $4
+
+ 0xFE8D134: 700B0020 andi. r11,r0,0x20
+ 14: GETL R0, t12
+ 15: ANDL $0x20, t12
+ 16: PUTL t12, R11
+ 17: CMP0L t12, t14 (-rSo)
+ 18: ICRFL t14, $0x0, CR
+ 19: INCEIPL $4
+
+ 0xFE8D138: 4082004C bc 4,2,0xFE8D184
+ 20: Jc02o $0xFE8D184
+
+
+
+. 2520 FE8D128 20
+. 80 C8 00 00 55 47 08 3C 7C 07 32 2E 70 0B 00 20 40 82 00 4C
+==== BB 2521 (0xFE8D13C) approx BBs exec'd 0 ====
+
+ 0xFE8D13C: 38630001 addi r3,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFE8D140: 89430000 lbz r10,0(r3)
+ 4: GETL R3, t2
+ 5: LDB (t2), t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0xFE8D144: 2C8A0000 cmpi cr1,r10,0
+ 8: GETL R10, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0xFE8D148: 4186003C bc 12,6,0xFE8D184
+ 12: Js06o $0xFE8D184
+
+
+
+. 2521 FE8D13C 16
+. 38 63 00 01 89 43 00 00 2C 8A 00 00 41 86 00 3C
+==== BB 2522 (0xFE8D184) approx BBs exec'd 0 ====
+
+ 0xFE8D184: 2F0A0000 cmpi cr6,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE8D188: 419A0010 bc 12,26,0xFE8D198
+ 4: Js26o $0xFE8D198
+
+
+
+. 2522 FE8D184 8
+. 2F 0A 00 00 41 9A 00 10
+==== BB 2523 (0xFE8D18C) approx BBs exec'd 0 ====
+
+ 0xFE8D18C: 39000000 li r8,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0xFE8D190: 99030000 stb r8,0(r3)
+ 3: GETL R8, t2
+ 4: GETL R3, t4
+ 5: STB t2, (t4)
+ 6: INCEIPL $4
+
+ 0xFE8D194: 38630001 addi r3,r3,1
+ 7: GETL R3, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFE8D198: 7D121214 add r8,r18,r2
+ 11: GETL R18, t8
+ 12: GETL R2, t10
+ 13: ADDL t8, t10
+ 14: PUTL t10, R8
+ 15: INCEIPL $4
+
+ 0xFE8D19C: 48000020 b 0xFE8D1BC
+ 16: JMPo $0xFE8D1BC ($4)
+
+
+
+. 2523 FE8D18C 20
+. 39 00 00 00 99 03 00 00 38 63 00 01 7D 12 12 14 48 00 00 20
+==== BB 2524 (0xFE8D1BC) approx BBs exec'd 0 ====
+
+ 0xFE8D1BC: 81880000 lwz r12,0(r8)
+ 0: GETL R8, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R12
+ 3: INCEIPL $4
+
+ 0xFE8D1C0: 2F8C0000 cmpi cr7,r12,0
+ 4: GETL R12, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFE8D1C4: 409EFFDC bc 4,30,0xFE8D1A0
+ 8: Jc30o $0xFE8D1A0
+
+
+
+. 2524 FE8D1BC 12
+. 81 88 00 00 2F 8C 00 00 40 9E FF DC
+==== BB 2525 (0xFE8D1A0) approx BBs exec'd 0 ====
+
+ 0xFE8D1A0: 89430000 lbz r10,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFE8D1A4: 83280000 lwz r25,0(r8)
+ 4: GETL R8, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R25
+ 7: INCEIPL $4
+
+ 0xFE8D1A8: 555C083C rlwinm r28,r10,1,0,30
+ 8: GETL R10, t8
+ 9: SHLL $0x1, t8
+ 10: PUTL t8, R28
+ 11: INCEIPL $4
+
+ 0xFE8D1AC: 7F1CCA2E lhzx r24,r28,r25
+ 12: GETL R25, t10
+ 13: GETL R28, t12
+ 14: ADDL t12, t10
+ 15: LDW (t10), t14
+ 16: PUTL t14, R24
+ 17: INCEIPL $4
+
+ 0xFE8D1B0: 73090020 andi. r9,r24,0x20
+ 18: GETL R24, t16
+ 19: ANDL $0x20, t16
+ 20: PUTL t16, R9
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0xFE8D1B4: 41820044 bc 12,2,0xFE8D1F8
+ 24: Js02o $0xFE8D1F8
+
+
+
+. 2525 FE8D1A0 24
+. 89 43 00 00 83 28 00 00 55 5C 08 3C 7F 1C CA 2E 73 09 00 20 41 82 00 44
+==== BB 2526 (0xFE8D1B8) approx BBs exec'd 0 ====
+
+ 0xFE8D1B8: 38630001 addi r3,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFE8D1BC: 81880000 lwz r12,0(r8)
+ 4: GETL R8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0xFE8D1C0: 2F8C0000 cmpi cr7,r12,0
+ 8: GETL R12, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFE8D1C4: 409EFFDC bc 4,30,0xFE8D1A0
+ 12: Jc30o $0xFE8D1A0
+
+
+
+. 2526 FE8D1B8 16
+. 38 63 00 01 81 88 00 00 2F 8C 00 00 40 9E FF DC
+==== BB 2527 (0xFE8D1F8) approx BBs exec'd 0 ====
+
+ 0xFE8D1F8: 2C8A0000 cmpi cr1,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE8D1FC: 7C751B78 or r21,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R21
+ 6: INCEIPL $4
+
+ 0xFE8D200: 39030001 addi r8,r3,1
+ 7: GETL R3, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R8
+ 10: INCEIPL $4
+
+ 0xFE8D204: 7CF21214 add r7,r18,r2
+ 11: GETL R18, t8
+ 12: GETL R2, t10
+ 13: ADDL t8, t10
+ 14: PUTL t10, R7
+ 15: INCEIPL $4
+
+ 0xFE8D208: 40860020 bc 4,6,0xFE8D228
+ 16: Jc06o $0xFE8D228
+
+
+
+. 2527 FE8D1F8 20
+. 2C 8A 00 00 7C 75 1B 78 39 03 00 01 7C F2 12 14 40 86 00 20
+==== BB 2528 (0xFE8D228) approx BBs exec'd 0 ====
+
+ 0xFE8D228: 89480000 lbz r10,0(r8)
+ 0: GETL R8, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFE8D22C: 2F0A0000 cmpi cr6,r10,0
+ 4: GETL R10, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0xFE8D230: 419A0040 bc 12,26,0xFE8D270
+ 8: Js26o $0xFE8D270
+
+
+
+. 2528 FE8D228 12
+. 89 48 00 00 2F 0A 00 00 41 9A 00 40
+==== BB 2529 (0xFE8D234) approx BBs exec'd 0 ====
+
+ 0xFE8D234: 80670000 lwz r3,0(r7)
+ 0: GETL R7, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE8D238: 2F830000 cmpi cr7,r3,0
+ 4: GETL R3, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFE8D23C: 409EFFD4 bc 4,30,0xFE8D210
+ 8: Jc30o $0xFE8D210
+
+
+
+. 2529 FE8D234 12
+. 80 67 00 00 2F 83 00 00 40 9E FF D4
+==== BB 2530 (0xFE8D210) approx BBs exec'd 0 ====
+
+ 0xFE8D210: 80C70000 lwz r6,0(r7)
+ 0: GETL R7, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFE8D214: 554C083C rlwinm r12,r10,1,0,30
+ 4: GETL R10, t4
+ 5: SHLL $0x1, t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0xFE8D218: 7C0C322E lhzx r0,r12,r6
+ 8: GETL R6, t6
+ 9: GETL R12, t8
+ 10: ADDL t8, t6
+ 11: LDW (t6), t10
+ 12: PUTL t10, R0
+ 13: INCEIPL $4
+
+ 0xFE8D21C: 70090020 andi. r9,r0,0x20
+ 14: GETL R0, t12
+ 15: ANDL $0x20, t12
+ 16: PUTL t12, R9
+ 17: CMP0L t12, t14 (-rSo)
+ 18: ICRFL t14, $0x0, CR
+ 19: INCEIPL $4
+
+ 0xFE8D220: 40820050 bc 4,2,0xFE8D270
+ 20: Jc02o $0xFE8D270
+
+
+
+. 2530 FE8D210 20
+. 80 C7 00 00 55 4C 08 3C 7C 0C 32 2E 70 09 00 20 40 82 00 50
+==== BB 2531 (0xFE8D224) approx BBs exec'd 0 ====
+
+ 0xFE8D224: 39080001 addi r8,r8,1
+ 0: GETL R8, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0xFE8D228: 89480000 lbz r10,0(r8)
+ 4: GETL R8, t2
+ 5: LDB (t2), t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0xFE8D22C: 2F0A0000 cmpi cr6,r10,0
+ 8: GETL R10, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFE8D230: 419A0040 bc 12,26,0xFE8D270
+ 12: Js26o $0xFE8D270
+
+
+
+. 2531 FE8D224 16
+. 39 08 00 01 89 48 00 00 2F 0A 00 00 41 9A 00 40
+==== BB 2532 (0xFE8D270) approx BBs exec'd 0 ====
+
+ 0xFE8D270: 2C8A000A cmpi cr1,r10,10
+ 0: GETL R10, t0
+ 1: MOVL $0xA, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFE8D274: 418602AC bc 12,6,0xFE8D520
+ 5: Js06o $0xFE8D520
+
+
+
+. 2532 FE8D270 8
+. 2C 8A 00 0A 41 86 02 AC
+==== BB 2533 (0xFE8D520) approx BBs exec'd 0 ====
+
+ 0xFE8D520: 38E00000 li r7,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0xFE8D524: 99480001 stb r10,1(r8)
+ 3: GETL R10, t2
+ 4: GETL R8, t4
+ 5: ADDL $0x1, t4
+ 6: STB t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFE8D528: 98E80000 stb r7,0(r8)
+ 8: GETL R7, t6
+ 9: GETL R8, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFE8D52C: 4BFFFD5C b 0xFE8D288
+ 12: JMPo $0xFE8D288 ($4)
+
+
+
+. 2533 FE8D520 16
+. 38 E0 00 00 99 48 00 01 98 E8 00 00 4B FF FD 5C
+==== BB 2534 (0xFE8D288) approx BBs exec'd 0 ====
+
+ 0xFE8D288: 82FE020C lwz r23,524(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x20C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0xFE8D28C: 829E0210 lwz r20,528(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x210, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R20
+ 9: INCEIPL $4
+
+ 0xFE8D290: 82770000 lwz r19,0(r23)
+ 10: GETL R23, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R19
+ 13: INCEIPL $4
+
+ 0xFE8D294: 83340000 lwz r25,0(r20)
+ 14: GETL R20, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R25
+ 17: INCEIPL $4
+
+ 0xFE8D298: 81130000 lwz r8,0(r19)
+ 18: GETL R19, t16
+ 19: LDL (t16), t18
+ 20: PUTL t18, R8
+ 21: INCEIPL $4
+
+ 0xFE8D29C: 80990000 lwz r4,0(r25)
+ 22: GETL R25, t20
+ 23: LDL (t20), t22
+ 24: PUTL t22, R4
+ 25: INCEIPL $4
+
+ 0xFE8D2A0: 7F882040 cmpl cr7,r8,r4
+ 26: GETL R8, t24
+ 27: GETL R4, t26
+ 28: CMPUL t24, t26, t28 (-rSo)
+ 29: ICRFL t28, $0x7, CR
+ 30: INCEIPL $4
+
+ 0xFE8D2A4: 419C0034 bc 12,28,0xFE8D2D8
+ 31: Js28o $0xFE8D2D8
+
+
+
+. 2534 FE8D288 32
+. 82 FE 02 0C 82 9E 02 10 82 77 00 00 83 34 00 00 81 13 00 00 80 99 00 00 7F 88 20 40 41 9C 00 34
+==== BB 2535 (0xFE8D2A8) approx BBs exec'd 0 ====
+
+ 0xFE8D2A8: 2C040000 cmpi cr0,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFE8D2AC: 549D083C rlwinm r29,r4,1,0,30
+ 4: GETL R4, t4
+ 5: SHLL $0x1, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFE8D2B0: 40820008 bc 4,2,0xFE8D2B8
+ 8: Jc02o $0xFE8D2B8
+
+
+
+. 2535 FE8D2A8 12
+. 2C 04 00 00 54 9D 08 3C 40 82 00 08
+==== BB 2536 (0xFE8D2B4) approx BBs exec'd 0 ====
+
+ 0xFE8D2B4: 3BA00064 li r29,100
+ 0: MOVL $0x64, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFE8D2B8: 839E01F4 lwz r28,500(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x1F4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFE8D2BC: 57A41838 rlwinm r4,r29,3,0,28
+ 8: GETL R29, t6
+ 9: SHLL $0x3, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0xFE8D2C0: 807C0000 lwz r3,0(r28)
+ 12: GETL R28, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0xFE8D2C4: 4811D055 bl 0xFFAA318
+ 16: MOVL $0xFE8D2C8, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0xFFAA318 ($4)
+
+
+
+. 2536 FE8D2B4 20
+. 3B A0 00 64 83 9E 01 F4 57 A4 18 38 80 7C 00 00 48 11 D0 55
+==== BB 2537 (0xFFAA318) approx BBs exec'd 0 ====
+
+ 0xFFAA318: 4BF27EC8 b 0xFED21E0
+ 0: JMPo $0xFED21E0 ($4)
+
+
+
+. 2537 FFAA318 4
+. 4B F2 7E C8
+==== BB 2538 realloc(0xFED21E0) approx BBs exec'd 0 ====
+
+ 0xFED21E0: 9421FFB0 stwu r1,-80(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFB0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED21E4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFED21E8: 480D5C69 bl 0xFFA7E50
+ 9: MOVL $0xFED21EC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2538 FED21E0 12
+. 94 21 FF B0 7C 08 02 A6 48 0D 5C 69
+==== BB 2539 (0xFED21EC) approx BBs exec'd 0 ====
+
+ 0xFED21EC: 93C10048 stw r30,72(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x48, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFED21F0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFED21F4: 9361003C stw r27,60(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x3C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFED21F8: 90010054 stw r0,84(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x54, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFED21FC: 7C9B2378 or r27,r4,r4
+ 18: GETL R4, t14
+ 19: PUTL t14, R27
+ 20: INCEIPL $4
+
+ 0xFED2200: 93810040 stw r28,64(r1)
+ 21: GETL R28, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x40, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFED2204: 7C7C1B78 or r28,r3,r3
+ 26: GETL R3, t20
+ 27: PUTL t20, R28
+ 28: INCEIPL $4
+
+ 0xFED2208: 813E1AF8 lwz r9,6904(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x1AF8, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R9
+ 33: INCEIPL $4
+
+ 0xFED220C: 92C10028 stw r22,40(r1)
+ 34: GETL R22, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x28, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFED2210: 80090000 lwz r0,0(r9)
+ 39: GETL R9, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R0
+ 42: INCEIPL $4
+
+ 0xFED2214: 92E1002C stw r23,44(r1)
+ 43: GETL R23, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x2C, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0xFED2218: 2F800000 cmpi cr7,r0,0
+ 48: GETL R0, t38
+ 49: CMP0L t38, t40 (-rSo)
+ 50: ICRFL t40, $0x7, CR
+ 51: INCEIPL $4
+
+ 0xFED221C: 93010030 stw r24,48(r1)
+ 52: GETL R24, t42
+ 53: GETL R1, t44
+ 54: ADDL $0x30, t44
+ 55: STL t42, (t44)
+ 56: INCEIPL $4
+
+ 0xFED2220: 93210034 stw r25,52(r1)
+ 57: GETL R25, t46
+ 58: GETL R1, t48
+ 59: ADDL $0x34, t48
+ 60: STL t46, (t48)
+ 61: INCEIPL $4
+
+ 0xFED2224: 93410038 stw r26,56(r1)
+ 62: GETL R26, t50
+ 63: GETL R1, t52
+ 64: ADDL $0x38, t52
+ 65: STL t50, (t52)
+ 66: INCEIPL $4
+
+ 0xFED2228: 93A10044 stw r29,68(r1)
+ 67: GETL R29, t54
+ 68: GETL R1, t56
+ 69: ADDL $0x44, t56
+ 70: STL t54, (t56)
+ 71: INCEIPL $4
+
+ 0xFED222C: 93E1004C stw r31,76(r1)
+ 72: GETL R31, t58
+ 73: GETL R1, t60
+ 74: ADDL $0x4C, t60
+ 75: STL t58, (t60)
+ 76: INCEIPL $4
+
+ 0xFED2230: 419E0054 bc 12,30,0xFED2284
+ 77: Js30o $0xFED2284
+
+
+
+. 2539 FED21EC 72
+. 93 C1 00 48 7F C8 02 A6 93 61 00 3C 90 01 00 54 7C 9B 23 78 93 81 00 40 7C 7C 1B 78 81 3E 1A F8 92 C1 00 28 80 09 00 00 92 E1 00 2C 2F 80 00 00 93 01 00 30 93 21 00 34 93 41 00 38 93 A1 00 44 93 E1 00 4C 41 9E 00 54
+==== BB 2540 (0xFED2234) approx BBs exec'd 0 ====
+
+ 0xFED2234: 80C10000 lwz r6,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFED2238: 7C0903A6 mtctr r0
+ 4: GETL R0, t4
+ 5: PUTL t4, CTR
+ 6: INCEIPL $4
+
+ 0xFED223C: 80A60004 lwz r5,4(r6)
+ 7: GETL R6, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0xFED2240: 4E800421 bctrl
+ 12: MOVL $0xFED2244, t10
+ 13: PUTL t10, LR
+ 14: GETL CTR, t12
+ 15: JMPo-c t12 ($4)
+
+
+
+. 2540 FED2234 16
+. 80 C1 00 00 7C 09 03 A6 80 A6 00 04 4E 80 04 21
+==== BB 2541 realloc_hook_ini(0xFED2CC0) approx BBs exec'd 0 ====
+
+ 0xFED2CC0: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED2CC4: 7CA802A6 mflr r5
+ 6: GETL LR, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFED2CC8: 480D5189 bl 0xFFA7E50
+ 9: MOVL $0xFED2CCC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2541 FED2CC0 12
+. 94 21 FF E0 7C A8 02 A6 48 0D 51 89
+==== BB 2542 (0xFED2CCC) approx BBs exec'd 0 ====
+
+ 0xFED2CCC: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFED2CD0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFED2CD4: 93A10014 stw r29,20(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFED2CD8: 7C7D1B78 or r29,r3,r3
+ 13: GETL R3, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0xFED2CDC: 38600000 li r3,0
+ 16: MOVL $0x0, t12
+ 17: PUTL t12, R3
+ 18: INCEIPL $4
+
+ 0xFED2CE0: 90A10024 stw r5,36(r1)
+ 19: GETL R5, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x24, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFED2CE4: 813E1AF8 lwz r9,6904(r30)
+ 24: GETL R30, t18
+ 25: ADDL $0x1AF8, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R9
+ 28: INCEIPL $4
+
+ 0xFED2CE8: 817E1A7C lwz r11,6780(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x1A7C, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R11
+ 33: INCEIPL $4
+
+ 0xFED2CEC: 90690000 stw r3,0(r9)
+ 34: GETL R3, t26
+ 35: GETL R9, t28
+ 36: STL t26, (t28)
+ 37: INCEIPL $4
+
+ 0xFED2CF0: 906B0000 stw r3,0(r11)
+ 38: GETL R3, t30
+ 39: GETL R11, t32
+ 40: STL t30, (t32)
+ 41: INCEIPL $4
+
+ 0xFED2CF4: 93810010 stw r28,16(r1)
+ 42: GETL R28, t34
+ 43: GETL R1, t36
+ 44: ADDL $0x10, t36
+ 45: STL t34, (t36)
+ 46: INCEIPL $4
+
+ 0xFED2CF8: 7C9C2378 or r28,r4,r4
+ 47: GETL R4, t38
+ 48: PUTL t38, R28
+ 49: INCEIPL $4
+
+ 0xFED2CFC: 93E1001C stw r31,28(r1)
+ 50: GETL R31, t40
+ 51: GETL R1, t42
+ 52: ADDL $0x1C, t42
+ 53: STL t40, (t42)
+ 54: INCEIPL $4
+
+ 0xFED2D00: 4BFFF975 bl 0xFED2674
+ 55: MOVL $0xFED2D04, t44
+ 56: PUTL t44, LR
+ 57: JMPo-c $0xFED2674 ($4)
+
+
+
+. 2542 FED2CCC 56
+. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 7C 7D 1B 78 38 60 00 00 90 A1 00 24 81 3E 1A F8 81 7E 1A 7C 90 69 00 00 90 6B 00 00 93 81 00 10 7C 9C 23 78 93 E1 00 1C 4B FF F9 75
+==== BB 2543 (0xFED26B4) approx BBs exec'd 0 ====
+
+ 0xFED26B4: 83610054 lwz r27,84(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x54, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xFED26B8: 83410038 lwz r26,56(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x38, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0xFED26BC: 7F6803A6 mtlr r27
+ 10: GETL R27, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFED26C0: 83810040 lwz r28,64(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x40, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0xFED26C4: 8361003C lwz r27,60(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x3C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R27
+ 22: INCEIPL $4
+
+ 0xFED26C8: 83A10044 lwz r29,68(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x44, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R29
+ 27: INCEIPL $4
+
+ 0xFED26CC: 83C10048 lwz r30,72(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x48, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R30
+ 32: INCEIPL $4
+
+ 0xFED26D0: 83E1004C lwz r31,76(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x4C, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R31
+ 37: INCEIPL $4
+
+ 0xFED26D4: 38210050 addi r1,r1,80
+ 38: GETL R1, t30
+ 39: ADDL $0x50, t30
+ 40: PUTL t30, R1
+ 41: INCEIPL $4
+
+ 0xFED26D8: 4E800020 blr
+ 42: GETL LR, t32
+ 43: JMPo-r t32 ($4)
+
+
+
+. 2543 FED26B4 40
+. 83 61 00 54 83 41 00 38 7F 68 03 A6 83 81 00 40 83 61 00 3C 83 A1 00 44 83 C1 00 48 83 E1 00 4C 38 21 00 50 4E 80 00 20
+==== BB 2544 (0xFED2D04) approx BBs exec'd 0 ====
+
+ 0xFED2D04: 80010024 lwz r0,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED2D08: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED2D0C: 83C10018 lwz r30,24(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x18, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0xFED2D10: 7F84E378 or r4,r28,r28
+ 13: GETL R28, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0xFED2D14: 83E1001C lwz r31,28(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x1C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0xFED2D18: 7C0803A6 mtlr r0
+ 21: GETL R0, t16
+ 22: PUTL t16, LR
+ 23: INCEIPL $4
+
+ 0xFED2D1C: 83810010 lwz r28,16(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x10, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R28
+ 28: INCEIPL $4
+
+ 0xFED2D20: 83A10014 lwz r29,20(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x14, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R29
+ 33: INCEIPL $4
+
+ 0xFED2D24: 38210020 addi r1,r1,32
+ 34: GETL R1, t26
+ 35: ADDL $0x20, t26
+ 36: PUTL t26, R1
+ 37: INCEIPL $4
+
+ 0xFED2D28: 4BFFF4B8 b 0xFED21E0
+ 38: JMPo $0xFED21E0 ($4)
+
+
+
+. 2544 FED2D04 40
+. 80 01 00 24 7F A3 EB 78 83 C1 00 18 7F 84 E3 78 83 E1 00 1C 7C 08 03 A6 83 81 00 10 83 A1 00 14 38 21 00 20 4B FF F4 B8
+==== BB 2545 (0xFED2284) approx BBs exec'd 0 ====
+
+ 0xFED2284: 21240000 subfic r9,r4,0
+ 0: GETL R4, t0
+ 1: MOVL $0x0, t2
+ 2: SBBL t0, t2 (-wCa)
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFED2288: 7CA92114 adde r5,r9,r4
+ 5: GETL R9, t4
+ 6: GETL R4, t6
+ 7: ADCL t4, t6 (-rCa-wCa)
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFED228C: 3163FFFF addic r11,r3,-1
+ 10: GETL R3, t8
+ 11: ADCL $0xFFFFFFFF, t8 (-wCa)
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0xFED2290: 7C8B1910 subfe r4,r11,r3
+ 14: GETL R11, t10
+ 15: GETL R3, t12
+ 16: SBBL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R4
+ 18: INCEIPL $4
+
+ 0xFED2294: 7CAB2039 and. r11,r5,r4
+ 19: GETL R5, t14
+ 20: GETL R4, t16
+ 21: ANDL t14, t16
+ 22: PUTL t16, R11
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x0, CR
+ 25: INCEIPL $4
+
+ 0xFED2298: 40820270 bc 4,2,0xFED2508
+ 26: Jc02o $0xFED2508
+
+
+
+. 2545 FED2284 24
+. 21 24 00 00 7C A9 21 14 31 63 FF FF 7C 8B 19 10 7C AB 20 39 40 82 02 70
+==== BB 2546 (0xFED229C) approx BBs exec'd 0 ====
+
+ 0xFED229C: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFED22A0: 41860248 bc 12,6,0xFED24E8
+ 4: Js06o $0xFED24E8
+
+
+
+. 2546 FED229C 8
+. 2C 83 00 00 41 86 02 48
+==== BB 2547 (0xFED24E8) approx BBs exec'd 0 ====
+
+ 0xFED24E8: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED24EC: 4BFFF3F5 bl 0xFED18E0
+ 3: MOVL $0xFED24F0, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED18E0 ($4)
+
+
+
+. 2547 FED24E8 8
+. 7F 63 DB 78 4B FF F3 F5
+==== BB 2548 (0xFECF788) approx BBs exec'd 0 ====
+
+ 0xFECF788: 573AD1BE rlwinm r26,r25,26,6,31
+ 0: GETL R25, t0
+ 1: SHRL $0x6, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0xFECF78C: 2B1A0020 cmpli cr6,r26,32
+ 4: GETL R26, t2
+ 5: MOVL $0x20, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFECF790: 3B1A0038 addi r24,r26,56
+ 9: GETL R26, t8
+ 10: ADDL $0x38, t8
+ 11: PUTL t8, R24
+ 12: INCEIPL $4
+
+ 0xFECF794: 4199018C bc 12,25,0xFECF920
+ 13: Js25o $0xFECF920
+
+
+
+. 2548 FECF788 16
+. 57 3A D1 BE 2B 1A 00 20 3B 1A 00 38 41 99 01 8C
+==== BB 2549 (0xFECF798) approx BBs exec'd 0 ====
+
+ 0xFECF798: 71400001 andi. r0,r10,0x1
+ 0: GETL R10, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECF79C: 418201CC bc 12,2,0xFECF968
+ 6: Js02o $0xFECF968
+
+
+
+. 2549 FECF798 8
+. 71 40 00 01 41 82 01 CC
+==== BB 2550 (0xFECE53C) approx BBs exec'd 0 ====
+
+ 0xFECE53C: 61630001 ori r3,r11,0x1
+ 0: GETL R11, t0
+ 1: ORL $0x1, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFECE540: 81DE064C lwz r14,1612(r30)
+ 4: GETL R30, t2
+ 5: ADDL $0x64C, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R14
+ 8: INCEIPL $4
+
+ 0xFECE544: 5469F87A rlwinm r9,r3,31,1,29
+ 9: GETL R3, t6
+ 10: ROLL $0x1F, t6
+ 11: ANDL $0x7FFFFFFC, t6
+ 12: PUTL t6, R9
+ 13: INCEIPL $4
+
+ 0xFECE548: 821E05F0 lwz r16,1520(r30)
+ 14: GETL R30, t8
+ 15: ADDL $0x5F0, t8
+ 16: LDL (t8), t10
+ 17: PUTL t10, R16
+ 18: INCEIPL $4
+
+ 0xFECE54C: 90780004 stw r3,4(r24)
+ 19: GETL R3, t12
+ 20: GETL R24, t14
+ 21: ADDL $0x4, t14
+ 22: STL t12, (t14)
+ 23: INCEIPL $4
+
+ 0xFECE550: 7E89C214 add r20,r9,r24
+ 24: GETL R9, t16
+ 25: GETL R24, t18
+ 26: ADDL t16, t18
+ 27: PUTL t18, R20
+ 28: INCEIPL $4
+
+ 0xFECE554: 3B580038 addi r26,r24,56
+ 29: GETL R24, t20
+ 30: ADDL $0x38, t20
+ 31: PUTL t20, R26
+ 32: INCEIPL $4
+
+ 0xFECE558: 3AD80008 addi r22,r24,8
+ 33: GETL R24, t22
+ 34: ADDL $0x8, t22
+ 35: PUTL t22, R22
+ 36: INCEIPL $4
+
+ 0xFECE55C: 7DCF7378 or r15,r14,r14
+ 37: GETL R14, t24
+ 38: PUTL t24, R15
+ 39: INCEIPL $4
+
+ 0xFECE560: 83F60000 lwz r31,0(r22)
+ 40: GETL R22, t26
+ 41: LDL (t26), t28
+ 42: PUTL t28, R31
+ 43: INCEIPL $4
+
+ 0xFECE564: 2C1F0000 cmpi cr0,r31,0
+ 44: GETL R31, t30
+ 45: CMP0L t30, t32 (-rSo)
+ 46: ICRFL t32, $0x0, CR
+ 47: INCEIPL $4
+
+ 0xFECE568: 418201A0 bc 12,2,0xFECE708
+ 48: Js02o $0xFECE708
+
+
+
+. 2550 FECE53C 48
+. 61 63 00 01 81 DE 06 4C 54 69 F8 7A 82 1E 05 F0 90 78 00 04 7E 89 C2 14 3B 58 00 38 3A D8 00 08 7D CF 73 78 83 F6 00 00 2C 1F 00 00 41 82 01 A0
+==== BB 2551 (0xFECE708) approx BBs exec'd 0 ====
+
+ 0xFECE708: 7F96A000 cmp cr7,r22,r20
+ 0: GETL R22, t0
+ 1: GETL R20, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFECE70C: 3AD60004 addi r22,r22,4
+ 5: GETL R22, t6
+ 6: ADDL $0x4, t6
+ 7: PUTL t6, R22
+ 8: INCEIPL $4
+
+ 0xFECE710: 409EFE50 bc 4,30,0xFECE560
+ 9: Jc30o $0xFECE560
+
+
+
+. 2551 FECE708 12
+. 7F 96 A0 00 3A D6 00 04 40 9E FE 50
+==== BB 2552 (0xFECE560) approx BBs exec'd 0 ====
+
+ 0xFECE560: 83F60000 lwz r31,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R31
+ 3: INCEIPL $4
+
+ 0xFECE564: 2C1F0000 cmpi cr0,r31,0
+ 4: GETL R31, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFECE568: 418201A0 bc 12,2,0xFECE708
+ 8: Js02o $0xFECE708
+
+
+
+. 2552 FECE560 12
+. 83 F6 00 00 2C 1F 00 00 41 82 01 A0
+==== BB 2553 (0xFECE56C) approx BBs exec'd 0 ====
+
+ 0xFECE56C: 38A00000 li r5,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFECE570: 7E138378 or r19,r16,r16
+ 3: GETL R16, t2
+ 4: PUTL t2, R19
+ 5: INCEIPL $4
+
+ 0xFECE574: 90B60000 stw r5,0(r22)
+ 6: GETL R5, t4
+ 7: GETL R22, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECE578: 7DF27B78 or r18,r15,r15
+ 10: GETL R15, t8
+ 11: PUTL t8, R18
+ 12: INCEIPL $4
+
+ 0xFECE57C: 7DD17378 or r17,r14,r14
+ 13: GETL R14, t10
+ 14: PUTL t10, R17
+ 15: INCEIPL $4
+
+ 0xFECE580: 4800005C b 0xFECE5DC
+ 16: JMPo $0xFECE5DC ($4)
+
+
+
+. 2553 FECE56C 24
+. 38 A0 00 00 7E 13 83 78 90 B6 00 00 7D F2 7B 78 7D D1 73 78 48 00 00 5C
+==== BB 2554 (0xFECE5DC) approx BBs exec'd 0 ====
+
+ 0xFECE5DC: 80FF0004 lwz r7,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFECE5E0: 3900FFFA li r8,-6
+ 5: MOVL $0xFFFFFFFA, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0xFECE5E4: 82FF0008 lwz r23,8(r31)
+ 8: GETL R31, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0xFECE5E8: 7CFC4038 and r28,r7,r8
+ 13: GETL R7, t10
+ 14: GETL R8, t12
+ 15: ANDL t10, t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0xFECE5EC: 70E80001 andi. r8,r7,0x1
+ 18: GETL R7, t14
+ 19: ANDL $0x1, t14
+ 20: PUTL t14, R8
+ 21: CMP0L t14, t16 (-rSo)
+ 22: ICRFL t16, $0x0, CR
+ 23: INCEIPL $4
+
+ 0xFECE5F0: 7FBFE214 add r29,r31,r28
+ 24: GETL R31, t18
+ 25: GETL R28, t20
+ 26: ADDL t18, t20
+ 27: PUTL t20, R29
+ 28: INCEIPL $4
+
+ 0xFECE5F4: 80DD0004 lwz r6,4(r29)
+ 29: GETL R29, t22
+ 30: ADDL $0x4, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R6
+ 33: INCEIPL $4
+
+ 0xFECE5F8: 54DB0038 rlwinm r27,r6,0,0,28
+ 34: GETL R6, t26
+ 35: ANDL $0xFFFFFFF8, t26
+ 36: PUTL t26, R27
+ 37: INCEIPL $4
+
+ 0xFECE5FC: 40820038 bc 4,2,0xFECE634
+ 38: Jc02o $0xFECE634
+
+
+
+. 2554 FECE5DC 36
+. 80 FF 00 04 39 00 FF FA 82 FF 00 08 7C FC 40 38 70 E8 00 01 7F BF E2 14 80 DD 00 04 54 DB 00 38 40 82 00 38
+==== BB 2555 (0xFECE634) approx BBs exec'd 0 ====
+
+ 0xFECE634: 83380030 lwz r25,48(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0xFECE638: 7C99E800 cmp cr1,r25,r29
+ 5: GETL R25, t4
+ 6: GETL R29, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFECE63C: 418600B0 bc 12,6,0xFECE6EC
+ 10: Js06o $0xFECE6EC
+
+
+
+. 2555 FECE634 12
+. 83 38 00 30 7C 99 E8 00 41 86 00 B0
+==== BB 2556 (0xFECE640) approx BBs exec'd 0 ====
+
+ 0xFECE640: 7C9DDA14 add r4,r29,r27
+ 0: GETL R29, t0
+ 1: GETL R27, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFECE644: 80040004 lwz r0,4(r4)
+ 5: GETL R4, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFECE648: 700A0001 andi. r10,r0,0x1
+ 10: GETL R0, t8
+ 11: ANDL $0x1, t8
+ 12: PUTL t8, R10
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFECE64C: 41A2FF38 bc 13,2,0xFECE584
+ 16: Js02o $0xFECE584
+
+
+
+. 2556 FECE640 16
+. 7C 9D DA 14 80 04 00 04 70 0A 00 01 41 A2 FF 38
+==== BB 2557 (0xFECE650) approx BBs exec'd 0 ====
+
+ 0xFECE650: 80BD0004 lwz r5,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFECE654: 54A9003C rlwinm r9,r5,0,0,30
+ 5: GETL R5, t4
+ 6: ANDL $0xFFFFFFFE, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0xFECE658: 913D0004 stw r9,4(r29)
+ 9: GETL R9, t6
+ 10: GETL R29, t8
+ 11: ADDL $0x4, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECE65C: 4BFFFF54 b 0xFECE5B0
+ 14: JMPo $0xFECE5B0 ($4)
+
+
+
+. 2557 FECE650 16
+. 80 BD 00 04 54 A9 00 3C 91 3D 00 04 4B FF FF 54
+==== BB 2558 (0xFECE5B0) approx BBs exec'd 0 ====
+
+ 0xFECE5B0: 2F170000 cmpi cr6,r23,0
+ 0: GETL R23, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFECE5B4: 80DA0008 lwz r6,8(r26)
+ 4: GETL R26, t4
+ 5: ADDL $0x8, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0xFECE5B8: 63870001 ori r7,r28,0x1
+ 9: GETL R28, t8
+ 10: ORL $0x1, t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0xFECE5BC: 93FA0008 stw r31,8(r26)
+ 13: GETL R31, t10
+ 14: GETL R26, t12
+ 15: ADDL $0x8, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFECE5C0: 93E6000C stw r31,12(r6)
+ 18: GETL R31, t14
+ 19: GETL R6, t16
+ 20: ADDL $0xC, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFECE5C4: 7F9FE12E stwx r28,r31,r28
+ 23: GETL R28, t18
+ 24: GETL R31, t20
+ 25: ADDL t20, t18
+ 26: GETL R28, t22
+ 27: STL t22, (t18)
+ 28: INCEIPL $4
+
+ 0xFECE5C8: 90FF0004 stw r7,4(r31)
+ 29: GETL R7, t24
+ 30: GETL R31, t26
+ 31: ADDL $0x4, t26
+ 32: STL t24, (t26)
+ 33: INCEIPL $4
+
+ 0xFECE5CC: 90DF0008 stw r6,8(r31)
+ 34: GETL R6, t28
+ 35: GETL R31, t30
+ 36: ADDL $0x8, t30
+ 37: STL t28, (t30)
+ 38: INCEIPL $4
+
+ 0xFECE5D0: 935F000C stw r26,12(r31)
+ 39: GETL R26, t32
+ 40: GETL R31, t34
+ 41: ADDL $0xC, t34
+ 42: STL t32, (t34)
+ 43: INCEIPL $4
+
+ 0xFECE5D4: 7EFFBB78 or r31,r23,r23
+ 44: GETL R23, t36
+ 45: PUTL t36, R31
+ 46: INCEIPL $4
+
+ 0xFECE5D8: 419A0130 bc 12,26,0xFECE708
+ 47: Js26o $0xFECE708
+
+
+
+. 2558 FECE5B0 44
+. 2F 17 00 00 80 DA 00 08 63 87 00 01 93 FA 00 08 93 E6 00 0C 7F 9F E1 2E 90 FF 00 04 90 DF 00 08 93 5F 00 0C 7E FF BB 78 41 9A 01 30
+==== BB 2559 (0xFECE714) approx BBs exec'd 0 ====
+
+ 0xFECE714: 4BFFFF80 b 0xFECE694
+ 0: JMPo $0xFECE694 ($4)
+
+
+
+. 2559 FECE714 4
+. 4B FF FF 80
+==== BB 2560 (0xFECE694) approx BBs exec'd 0 ====
+
+ 0xFECE694: 82610074 lwz r19,116(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0xFECE698: 81C10028 lwz r14,40(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x28, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R14
+ 9: INCEIPL $4
+
+ 0xFECE69C: 7E6803A6 mtlr r19
+ 10: GETL R19, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFECE6A0: 81E1002C lwz r15,44(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x2C, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R15
+ 17: INCEIPL $4
+
+ 0xFECE6A4: 82010030 lwz r16,48(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x30, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R16
+ 22: INCEIPL $4
+
+ 0xFECE6A8: 82210034 lwz r17,52(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x34, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R17
+ 27: INCEIPL $4
+
+ 0xFECE6AC: 82410038 lwz r18,56(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x38, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R18
+ 32: INCEIPL $4
+
+ 0xFECE6B0: 8261003C lwz r19,60(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x3C, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R19
+ 37: INCEIPL $4
+
+ 0xFECE6B4: 82810040 lwz r20,64(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x40, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R20
+ 42: INCEIPL $4
+
+ 0xFECE6B8: 82A10044 lwz r21,68(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x44, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R21
+ 47: INCEIPL $4
+
+ 0xFECE6BC: 82C10048 lwz r22,72(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x48, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R22
+ 52: INCEIPL $4
+
+ 0xFECE6C0: 82E1004C lwz r23,76(r1)
+ 53: GETL R1, t42
+ 54: ADDL $0x4C, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R23
+ 57: INCEIPL $4
+
+ 0xFECE6C4: 83010050 lwz r24,80(r1)
+ 58: GETL R1, t46
+ 59: ADDL $0x50, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R24
+ 62: INCEIPL $4
+
+ 0xFECE6C8: 83210054 lwz r25,84(r1)
+ 63: GETL R1, t50
+ 64: ADDL $0x54, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R25
+ 67: INCEIPL $4
+
+ 0xFECE6CC: 83410058 lwz r26,88(r1)
+ 68: GETL R1, t54
+ 69: ADDL $0x58, t54
+ 70: LDL (t54), t56
+ 71: PUTL t56, R26
+ 72: INCEIPL $4
+
+ 0xFECE6D0: 8361005C lwz r27,92(r1)
+ 73: GETL R1, t58
+ 74: ADDL $0x5C, t58
+ 75: LDL (t58), t60
+ 76: PUTL t60, R27
+ 77: INCEIPL $4
+
+ 0xFECE6D4: 83810060 lwz r28,96(r1)
+ 78: GETL R1, t62
+ 79: ADDL $0x60, t62
+ 80: LDL (t62), t64
+ 81: PUTL t64, R28
+ 82: INCEIPL $4
+
+ 0xFECE6D8: 83A10064 lwz r29,100(r1)
+ 83: GETL R1, t66
+ 84: ADDL $0x64, t66
+ 85: LDL (t66), t68
+ 86: PUTL t68, R29
+ 87: INCEIPL $4
+
+ 0xFECE6DC: 83C10068 lwz r30,104(r1)
+ 88: GETL R1, t70
+ 89: ADDL $0x68, t70
+ 90: LDL (t70), t72
+ 91: PUTL t72, R30
+ 92: INCEIPL $4
+
+ 0xFECE6E0: 83E1006C lwz r31,108(r1)
+ 93: GETL R1, t74
+ 94: ADDL $0x6C, t74
+ 95: LDL (t74), t76
+ 96: PUTL t76, R31
+ 97: INCEIPL $4
+
+ 0xFECE6E4: 38210070 addi r1,r1,112
+ 98: GETL R1, t78
+ 99: ADDL $0x70, t78
+ 100: PUTL t78, R1
+ 101: INCEIPL $4
+
+ 0xFECE6E8: 4E800020 blr
+ 102: GETL LR, t80
+ 103: JMPo-r t80 ($4)
+
+
+
+. 2560 FECE694 88
+. 82 61 00 74 81 C1 00 28 7E 68 03 A6 81 E1 00 2C 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
+==== BB 2561 (0xFECF7DC) approx BBs exec'd 0 ====
+
+ 0xFECF7DC: 7E559378 or r21,r18,r18
+ 0: GETL R18, t0
+ 1: PUTL t0, R21
+ 2: INCEIPL $4
+
+ 0xFECF7E0: 48000054 b 0xFECF834
+ 3: JMPo $0xFECF834 ($4)
+
+
+
+. 2561 FECF7DC 8
+. 7E 55 93 78 48 00 00 54
+==== BB 2562 (0xFECF834) approx BBs exec'd 0 ====
+
+ 0xFECF834: 815F0004 lwz r10,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFECF838: 83BF000C lwz r29,12(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0xFECF83C: 2B8A0008 cmpli cr7,r10,8
+ 10: GETL R10, t8
+ 11: MOVL $0x8, t12
+ 12: CMPUL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFECF840: 409D0320 bc 4,29,0xFECFB60
+ 15: Jc29o $0xFECFB60
+
+
+
+. 2562 FECF834 16
+. 81 5F 00 04 83 BF 00 0C 2B 8A 00 08 40 9D 03 20
+==== BB 2563 (0xFECF844) approx BBs exec'd 0 ====
+
+ 0xFECF844: 82FC044C lwz r23,1100(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x44C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0xFECF848: 7C8AB840 cmpl cr1,r10,r23
+ 5: GETL R10, t4
+ 6: GETL R23, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFECF84C: 41850314 bc 12,5,0xFECFB60
+ 10: Js05o $0xFECFB60
+
+
+
+. 2563 FECF844 12
+. 82 FC 04 4C 7C 8A B8 40 41 85 03 14
+==== BB 2564 (0xFECF850) approx BBs exec'd 0 ====
+
+ 0xFECF850: 2B9901FF cmpli cr7,r25,511
+ 0: GETL R25, t0
+ 1: MOVL $0x1FF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFECF854: 554A0038 rlwinm r10,r10,0,0,28
+ 5: GETL R10, t6
+ 6: ANDL $0xFFFFFFF8, t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0xFECF858: 419D000C bc 12,29,0xFECF864
+ 9: Js29o $0xFECF864
+
+
+
+. 2564 FECF850 12
+. 2B 99 01 FF 55 4A 00 38 41 9D 00 0C
+==== BB 2565 (0xFECF864) approx BBs exec'd 0 ====
+
+ 0xFECF864: 7F8AC800 cmp cr7,r10,r25
+ 0: GETL R10, t0
+ 1: GETL R25, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFECF868: 935D0008 stw r26,8(r29)
+ 5: GETL R26, t6
+ 6: GETL R29, t8
+ 7: ADDL $0x8, t8
+ 8: STL t6, (t8)
+ 9: INCEIPL $4
+
+ 0xFECF86C: 93BC0044 stw r29,68(r28)
+ 10: GETL R29, t10
+ 11: GETL R28, t12
+ 12: ADDL $0x44, t12
+ 13: STL t10, (t12)
+ 14: INCEIPL $4
+
+ 0xFECF870: 419E03EC bc 12,30,0xFECFC5C
+ 15: Js30o $0xFECFC5C
+
+
+
+. 2565 FECF864 16
+. 7F 8A C8 00 93 5D 00 08 93 BC 00 44 41 9E 03 EC
+==== BB 2566 (0xFECF874) approx BBs exec'd 0 ====
+
+ 0xFECF874: 288A01FF cmpli cr1,r10,511
+ 0: GETL R10, t0
+ 1: MOVL $0x1FF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFECF878: 40A5FF6C bc 5,5,0xFECF7E4
+ 5: Jc05o $0xFECF7E4
+
+
+
+. 2566 FECF874 8
+. 28 8A 01 FF 40 A5 FF 6C
+==== BB 2567 (0xFECF7E4) approx BBs exec'd 0 ====
+
+ 0xFECF7E4: 7FAAE214 add r29,r10,r28
+ 0: GETL R10, t0
+ 1: GETL R28, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFECF7E8: 5548E8FE rlwinm r8,r10,29,3,31
+ 5: GETL R10, t4
+ 6: SHRL $0x3, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0xFECF7EC: 393D0030 addi r9,r29,48
+ 9: GETL R29, t6
+ 10: ADDL $0x30, t6
+ 11: PUTL t6, R9
+ 12: INCEIPL $4
+
+ 0xFECF7F0: 81690008 lwz r11,8(r9)
+ 13: GETL R9, t8
+ 14: ADDL $0x8, t8
+ 15: LDL (t8), t10
+ 16: PUTL t10, R11
+ 17: INCEIPL $4
+
+ 0xFECF7F4: 913F000C stw r9,12(r31)
+ 18: GETL R9, t12
+ 19: GETL R31, t14
+ 20: ADDL $0xC, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0xFECF7F8: 550306FE rlwinm r3,r8,0,27,31
+ 23: GETL R8, t16
+ 24: ANDL $0x1F, t16
+ 25: PUTL t16, R3
+ 26: INCEIPL $4
+
+ 0xFECF7FC: 93EB000C stw r31,12(r11)
+ 27: GETL R31, t18
+ 28: GETL R11, t20
+ 29: ADDL $0xC, t20
+ 30: STL t18, (t20)
+ 31: INCEIPL $4
+
+ 0xFECF800: 3BA00001 li r29,1
+ 32: MOVL $0x1, t22
+ 33: PUTL t22, R29
+ 34: INCEIPL $4
+
+ 0xFECF804: 917F0008 stw r11,8(r31)
+ 35: GETL R11, t24
+ 36: GETL R31, t26
+ 37: ADDL $0x8, t26
+ 38: STL t24, (t26)
+ 39: INCEIPL $4
+
+ 0xFECF808: 7D0B2E70 srawi r11,r8,5
+ 40: GETL R8, t28
+ 41: SARL $0x5, t28 (-wCa)
+ 42: PUTL t28, R11
+ 43: INCEIPL $4
+
+ 0xFECF80C: 93E90008 stw r31,8(r9)
+ 44: GETL R31, t30
+ 45: GETL R9, t32
+ 46: ADDL $0x8, t32
+ 47: STL t30, (t32)
+ 48: INCEIPL $4
+
+ 0xFECF810: 5566103A rlwinm r6,r11,2,0,29
+ 49: GETL R11, t34
+ 50: SHLL $0x2, t34
+ 51: PUTL t34, R6
+ 52: INCEIPL $4
+
+ 0xFECF814: 83FC0044 lwz r31,68(r28)
+ 53: GETL R28, t36
+ 54: ADDL $0x44, t36
+ 55: LDL (t36), t38
+ 56: PUTL t38, R31
+ 57: INCEIPL $4
+
+ 0xFECF818: 7F66E214 add r27,r6,r28
+ 58: GETL R6, t40
+ 59: GETL R28, t42
+ 60: ADDL t40, t42
+ 61: PUTL t42, R27
+ 62: INCEIPL $4
+
+ 0xFECF81C: 811B0438 lwz r8,1080(r27)
+ 63: GETL R27, t44
+ 64: ADDL $0x438, t44
+ 65: LDL (t44), t46
+ 66: PUTL t46, R8
+ 67: INCEIPL $4
+
+ 0xFECF820: 7FA41830 slw r4,r29,r3
+ 68: GETL R29, t50
+ 69: GETL R3, t48
+ 70: SHLL t48, t50
+ 71: PUTL t50, R4
+ 72: INCEIPL $4
+
+ 0xFECF824: 7F1FD000 cmp cr6,r31,r26
+ 73: GETL R31, t52
+ 74: GETL R26, t54
+ 75: CMPL t52, t54, t56 (-rSo)
+ 76: ICRFL t56, $0x6, CR
+ 77: INCEIPL $4
+
+ 0xFECF828: 7D0A2378 or r10,r8,r4
+ 78: GETL R8, t58
+ 79: GETL R4, t60
+ 80: ORL t60, t58
+ 81: PUTL t58, R10
+ 82: INCEIPL $4
+
+ 0xFECF82C: 915B0438 stw r10,1080(r27)
+ 83: GETL R10, t62
+ 84: GETL R27, t64
+ 85: ADDL $0x438, t64
+ 86: STL t62, (t64)
+ 87: INCEIPL $4
+
+ 0xFECF830: 419A0144 bc 12,26,0xFECF974
+ 88: Js26o $0xFECF974
+
+
+
+. 2567 FECF7E4 80
+. 7F AA E2 14 55 48 E8 FE 39 3D 00 30 81 69 00 08 91 3F 00 0C 55 03 06 FE 93 EB 00 0C 3B A0 00 01 91 7F 00 08 7D 0B 2E 70 93 E9 00 08 55 66 10 3A 83 FC 00 44 7F 66 E2 14 81 1B 04 38 7F A4 18 30 7F 1F D0 00 7D 0A 23 78 91 5B 04 38 41 9A 01 44
+==== BB 2568 (0xFECF97C) approx BBs exec'd 0 ====
+
+ 0xFECF97C: 57151838 rlwinm r21,r24,3,0,28
+ 0: GETL R24, t0
+ 1: SHLL $0x3, t0
+ 2: PUTL t0, R21
+ 3: INCEIPL $4
+
+ 0xFECF980: 7FF5E214 add r31,r21,r28
+ 4: GETL R21, t2
+ 5: GETL R28, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R31
+ 8: INCEIPL $4
+
+ 0xFECF984: 393F0030 addi r9,r31,48
+ 9: GETL R31, t6
+ 10: ADDL $0x30, t6
+ 11: PUTL t6, R9
+ 12: INCEIPL $4
+
+ 0xFECF988: 83A9000C lwz r29,12(r9)
+ 13: GETL R9, t8
+ 14: ADDL $0xC, t8
+ 15: LDL (t8), t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0xFECF98C: 7F9D4800 cmp cr7,r29,r9
+ 18: GETL R29, t12
+ 19: GETL R9, t14
+ 20: CMPL t12, t14, t16 (-rSo)
+ 21: ICRFL t16, $0x7, CR
+ 22: INCEIPL $4
+
+ 0xFECF990: 419E0014 bc 12,30,0xFECF9A4
+ 23: Js30o $0xFECF9A4
+
+
+
+. 2568 FECF97C 24
+. 57 15 18 38 7F F5 E2 14 39 3F 00 30 83 A9 00 0C 7F 9D 48 00 41 9E 00 14
+==== BB 2569 (0xFED24F0) approx BBs exec'd 0 ====
+
+ 0xFED24F0: 4BFFFD54 b 0xFED2244
+ 0: JMPo $0xFED2244 ($4)
+
+
+
+. 2569 FED24F0 4
+. 4B FF FD 54
+==== BB 2570 (0xFED2244) approx BBs exec'd 0 ====
+
+ 0xFED2244: 7C691B78 or r9,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0xFED2248: 83A10054 lwz r29,84(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x54, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFED224C: 7D234B78 or r3,r9,r9
+ 8: GETL R9, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFED2250: 82C10028 lwz r22,40(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x28, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R22
+ 15: INCEIPL $4
+
+ 0xFED2254: 7FA803A6 mtlr r29
+ 16: GETL R29, t12
+ 17: PUTL t12, LR
+ 18: INCEIPL $4
+
+ 0xFED2258: 82E1002C lwz r23,44(r1)
+ 19: GETL R1, t14
+ 20: ADDL $0x2C, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R23
+ 23: INCEIPL $4
+
+ 0xFED225C: 83010030 lwz r24,48(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x30, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R24
+ 28: INCEIPL $4
+
+ 0xFED2260: 83210034 lwz r25,52(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x34, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R25
+ 33: INCEIPL $4
+
+ 0xFED2264: 83410038 lwz r26,56(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x38, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R26
+ 38: INCEIPL $4
+
+ 0xFED2268: 8361003C lwz r27,60(r1)
+ 39: GETL R1, t30
+ 40: ADDL $0x3C, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R27
+ 43: INCEIPL $4
+
+ 0xFED226C: 83810040 lwz r28,64(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x40, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R28
+ 48: INCEIPL $4
+
+ 0xFED2270: 83A10044 lwz r29,68(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x44, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R29
+ 53: INCEIPL $4
+
+ 0xFED2274: 83C10048 lwz r30,72(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x48, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R30
+ 58: INCEIPL $4
+
+ 0xFED2278: 83E1004C lwz r31,76(r1)
+ 59: GETL R1, t46
+ 60: ADDL $0x4C, t46
+ 61: LDL (t46), t48
+ 62: PUTL t48, R31
+ 63: INCEIPL $4
+
+ 0xFED227C: 38210050 addi r1,r1,80
+ 64: GETL R1, t50
+ 65: ADDL $0x50, t50
+ 66: PUTL t50, R1
+ 67: INCEIPL $4
+
+ 0xFED2280: 4E800020 blr
+ 68: GETL LR, t52
+ 69: JMPo-r t52 ($4)
+
+
+
+. 2570 FED2244 64
+. 7C 69 1B 78 83 A1 00 54 7D 23 4B 78 82 C1 00 28 7F A8 03 A6 82 E1 00 2C 83 01 00 30 83 21 00 34 83 41 00 38 83 61 00 3C 83 81 00 40 83 A1 00 44 83 C1 00 48 83 E1 00 4C 38 21 00 50 4E 80 00 20
+==== BB 2571 (0xFE8D2C8) approx BBs exec'd 0 ====
+
+ 0xFE8D2C8: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE8D2CC: 4186013C bc 12,6,0xFE8D408
+ 4: Js06o $0xFE8D408
+
+
+
+. 2571 FE8D2C8 8
+. 2C 83 00 00 41 86 01 3C
+==== BB 2572 (0xFE8D2D0) approx BBs exec'd 0 ====
+
+ 0xFE8D2D0: 907C0000 stw r3,0(r28)
+ 0: GETL R3, t0
+ 1: GETL R28, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE8D2D4: 93B90000 stw r29,0(r25)
+ 4: GETL R29, t4
+ 5: GETL R25, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0xFE8D2D8: 7EC3B378 or r3,r22,r22
+ 8: GETL R22, t8
+ 9: PUTL t8, R3
+ 10: INCEIPL $4
+
+ 0xFE8D2DC: 839E0214 lwz r28,532(r30)
+ 11: GETL R30, t10
+ 12: ADDL $0x214, t10
+ 13: LDL (t10), t12
+ 14: PUTL t12, R28
+ 15: INCEIPL $4
+
+ 0xFE8D2E0: 480497F9 bl 0xFED6AD8
+ 16: MOVL $0xFE8D2E4, t14
+ 17: PUTL t14, LR
+ 18: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2572 FE8D2D0 20
+. 90 7C 00 00 93 B9 00 00 7E C3 B3 78 83 9E 02 14 48 04 97 F9
+==== BB 2573 (0xFE8D2E4) approx BBs exec'd 0 ====
+
+ 0xFE8D2E4: 3B030001 addi r24,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R24
+ 3: INCEIPL $4
+
+ 0xFE8D2E8: 7EA3AB78 or r3,r21,r21
+ 4: GETL R21, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0xFE8D2EC: 480497ED bl 0xFED6AD8
+ 7: MOVL $0xFE8D2F0, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2573 FE8D2E4 12
+. 3B 03 00 01 7E A3 AB 78 48 04 97 ED
+==== BB 2574 (0xFE8D2F0) approx BBs exec'd 0 ====
+
+ 0xFE8D2F0: 829C0000 lwz r20,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R20
+ 3: INCEIPL $4
+
+ 0xFE8D2F4: 817E0218 lwz r11,536(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x218, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0xFE8D2F8: 3AE30001 addi r23,r3,1
+ 9: GETL R3, t8
+ 10: ADDL $0x1, t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0xFE8D2FC: 83B40000 lwz r29,0(r20)
+ 13: GETL R20, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R29
+ 16: INCEIPL $4
+
+ 0xFE8D300: 838B0000 lwz r28,0(r11)
+ 17: GETL R11, t14
+ 18: LDL (t14), t16
+ 19: PUTL t16, R28
+ 20: INCEIPL $4
+
+ 0xFE8D304: 7C7DC214 add r3,r29,r24
+ 21: GETL R29, t18
+ 22: GETL R24, t20
+ 23: ADDL t18, t20
+ 24: PUTL t20, R3
+ 25: INCEIPL $4
+
+ 0xFE8D308: 819E01F4 lwz r12,500(r30)
+ 26: GETL R30, t22
+ 27: ADDL $0x1F4, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R12
+ 30: INCEIPL $4
+
+ 0xFE8D30C: 813C0000 lwz r9,0(r28)
+ 31: GETL R28, t26
+ 32: LDL (t26), t28
+ 33: PUTL t28, R9
+ 34: INCEIPL $4
+
+ 0xFE8D310: 7F23BA14 add r25,r3,r23
+ 35: GETL R3, t30
+ 36: GETL R23, t32
+ 37: ADDL t30, t32
+ 38: PUTL t32, R25
+ 39: INCEIPL $4
+
+ 0xFE8D314: 7F194840 cmpl cr6,r25,r9
+ 40: GETL R25, t34
+ 41: GETL R9, t36
+ 42: CMPUL t34, t36, t38 (-rSo)
+ 43: ICRFL t38, $0x6, CR
+ 44: INCEIPL $4
+
+ 0xFE8D318: 833E01F8 lwz r25,504(r30)
+ 45: GETL R30, t40
+ 46: ADDL $0x1F8, t40
+ 47: LDL (t40), t42
+ 48: PUTL t42, R25
+ 49: INCEIPL $4
+
+ 0xFE8D31C: 40990048 bc 4,25,0xFE8D364
+ 50: Jc25o $0xFE8D364
+
+
+
+. 2574 FE8D2F0 48
+. 82 9C 00 00 81 7E 02 18 3A E3 00 01 83 B4 00 00 83 8B 00 00 7C 7D C2 14 81 9E 01 F4 81 3C 00 00 7F 23 BA 14 7F 19 48 40 83 3E 01 F8 40 99 00 48
+==== BB 2575 (0xFE8D320) approx BBs exec'd 0 ====
+
+ 0xFE8D320: 7C98BA14 add r4,r24,r23
+ 0: GETL R24, t0
+ 1: GETL R23, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE8D324: 2B840400 cmpli cr7,r4,1024
+ 5: GETL R4, t4
+ 6: MOVL $0x400, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFE8D328: 409C0008 bc 4,28,0xFE8D330
+ 10: Jc28o $0xFE8D330
+
+
+
+. 2575 FE8D320 12
+. 7C 98 BA 14 2B 84 04 00 40 9C 00 08
+==== BB 2576 (0xFE8D32C) approx BBs exec'd 0 ====
+
+ 0xFE8D32C: 38800400 li r4,1024
+ 0: MOVL $0x400, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE8D330: 833E01F8 lwz r25,504(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x1F8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R25
+ 7: INCEIPL $4
+
+ 0xFE8D334: 7FA44A14 add r29,r4,r9
+ 8: GETL R4, t6
+ 9: GETL R9, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0xFE8D338: 7FA4EB78 or r4,r29,r29
+ 13: GETL R29, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0xFE8D33C: 80790000 lwz r3,0(r25)
+ 16: GETL R25, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R3
+ 19: INCEIPL $4
+
+ 0xFE8D340: 4811CFD9 bl 0xFFAA318
+ 20: MOVL $0xFE8D344, t16
+ 21: PUTL t16, LR
+ 22: JMPo-c $0xFFAA318 ($4)
+
+
+
+. 2576 FE8D32C 24
+. 38 80 04 00 83 3E 01 F8 7F A4 4A 14 7F A4 EB 78 80 79 00 00 48 11 CF D9
+==== BB 2577 (0xFE8D344) approx BBs exec'd 0 ====
+
+ 0xFE8D344: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFE8D348: 418200C0 bc 12,2,0xFE8D408
+ 4: Js02o $0xFE8D408
+
+
+
+. 2577 FE8D344 8
+. 2C 03 00 00 41 82 00 C0
+==== BB 2578 (0xFE8D34C) approx BBs exec'd 0 ====
+
+ 0xFE8D34C: 81590000 lwz r10,0(r25)
+ 0: GETL R25, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFE8D350: 819E01F4 lwz r12,500(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1F4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R12
+ 8: INCEIPL $4
+
+ 0xFE8D354: 7C8A1800 cmp cr1,r10,r3
+ 9: GETL R10, t8
+ 10: GETL R3, t10
+ 11: CMPL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x1, CR
+ 13: INCEIPL $4
+
+ 0xFE8D358: 4086017C bc 4,6,0xFE8D4D4
+ 14: Jc06o $0xFE8D4D4
+
+
+
+. 2578 FE8D34C 16
+. 81 59 00 00 81 9E 01 F4 7C 8A 18 00 40 86 01 7C
+==== BB 2579 (0xFE8D4D4) approx BBs exec'd 0 ====
+
+ 0xFE8D4D4: 80B30000 lwz r5,0(r19)
+ 0: GETL R19, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFE8D4D8: 38C00000 li r6,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R6
+ 6: INCEIPL $4
+
+ 0xFE8D4DC: 7F062840 cmpl cr6,r6,r5
+ 7: GETL R6, t6
+ 8: GETL R5, t8
+ 9: CMPUL t6, t8, t10 (-rSo)
+ 10: ICRFL t10, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFE8D4E0: 40B8FE7C bc 5,24,0xFE8D35C
+ 12: Jc24o $0xFE8D35C
+
+
+
+. 2579 FE8D4D4 16
+. 80 B3 00 00 38 C0 00 00 7F 06 28 40 40 B8 FE 7C
+==== BB 2580 (0xFE8D35C) approx BBs exec'd 0 ====
+
+ 0xFE8D35C: 93BC0000 stw r29,0(r28)
+ 0: GETL R29, t0
+ 1: GETL R28, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE8D360: 90790000 stw r3,0(r25)
+ 4: GETL R3, t4
+ 5: GETL R25, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0xFE8D364: 81790000 lwz r11,0(r25)
+ 8: GETL R25, t8
+ 9: LDL (t8), t10
+ 10: PUTL t10, R11
+ 11: INCEIPL $4
+
+ 0xFE8D368: 7EC4B378 or r4,r22,r22
+ 12: GETL R22, t12
+ 13: PUTL t12, R4
+ 14: INCEIPL $4
+
+ 0xFE8D36C: 81540000 lwz r10,0(r20)
+ 15: GETL R20, t14
+ 16: LDL (t14), t16
+ 17: PUTL t16, R10
+ 18: INCEIPL $4
+
+ 0xFE8D370: 7F05C378 or r5,r24,r24
+ 19: GETL R24, t18
+ 20: PUTL t18, R5
+ 21: INCEIPL $4
+
+ 0xFE8D374: 81130000 lwz r8,0(r19)
+ 22: GETL R19, t20
+ 23: LDL (t20), t22
+ 24: PUTL t22, R8
+ 25: INCEIPL $4
+
+ 0xFE8D378: 39CE0001 addi r14,r14,1
+ 26: GETL R14, t24
+ 27: ADDL $0x1, t24
+ 28: PUTL t24, R14
+ 29: INCEIPL $4
+
+ 0xFE8D37C: 82CC0000 lwz r22,0(r12)
+ 30: GETL R12, t26
+ 31: LDL (t26), t28
+ 32: PUTL t28, R22
+ 33: INCEIPL $4
+
+ 0xFE8D380: 7C6B5214 add r3,r11,r10
+ 34: GETL R11, t30
+ 35: GETL R10, t32
+ 36: ADDL t30, t32
+ 37: PUTL t32, R3
+ 38: INCEIPL $4
+
+ 0xFE8D384: 551C1838 rlwinm r28,r8,3,0,28
+ 39: GETL R8, t34
+ 40: SHLL $0x3, t34
+ 41: PUTL t34, R28
+ 42: INCEIPL $4
+
+ 0xFE8D388: 919F01B0 stw r12,432(r31)
+ 43: GETL R12, t36
+ 44: GETL R31, t38
+ 45: ADDL $0x1B0, t38
+ 46: STL t36, (t38)
+ 47: INCEIPL $4
+
+ 0xFE8D38C: 4804B34D bl 0xFED86D8
+ 48: MOVL $0xFE8D390, t40
+ 49: PUTL t40, LR
+ 50: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 2580 FE8D35C 52
+. 93 BC 00 00 90 79 00 00 81 79 00 00 7E C4 B3 78 81 54 00 00 7F 05 C3 78 81 13 00 00 39 CE 00 01 82 CC 00 00 7C 6B 52 14 55 1C 18 38 91 9F 01 B0 48 04 B3 4D
+==== BB 2581 (0xFE8D390) approx BBs exec'd 0 ====
+
+ 0xFE8D390: 80940000 lwz r4,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFE8D394: 7C7CB12E stwx r3,r28,r22
+ 4: GETL R22, t4
+ 5: GETL R28, t6
+ 6: ADDL t6, t4
+ 7: GETL R3, t8
+ 8: STL t8, (t4)
+ 9: INCEIPL $4
+
+ 0xFE8D398: 80790000 lwz r3,0(r25)
+ 10: GETL R25, t10
+ 11: LDL (t10), t12
+ 12: PUTL t12, R3
+ 13: INCEIPL $4
+
+ 0xFE8D39C: 7CE4C214 add r7,r4,r24
+ 14: GETL R4, t14
+ 15: GETL R24, t16
+ 16: ADDL t14, t16
+ 17: PUTL t16, R7
+ 18: INCEIPL $4
+
+ 0xFE8D3A0: 80B30000 lwz r5,0(r19)
+ 19: GETL R19, t18
+ 20: LDL (t18), t20
+ 21: PUTL t20, R5
+ 22: INCEIPL $4
+
+ 0xFE8D3A4: 7EA4AB78 or r4,r21,r21
+ 23: GETL R21, t22
+ 24: PUTL t22, R4
+ 25: INCEIPL $4
+
+ 0xFE8D3A8: 83BF01B0 lwz r29,432(r31)
+ 26: GETL R31, t24
+ 27: ADDL $0x1B0, t24
+ 28: LDL (t24), t26
+ 29: PUTL t26, R29
+ 30: INCEIPL $4
+
+ 0xFE8D3AC: 7C633A14 add r3,r3,r7
+ 31: GETL R3, t28
+ 32: GETL R7, t30
+ 33: ADDL t28, t30
+ 34: PUTL t30, R3
+ 35: INCEIPL $4
+
+ 0xFE8D3B0: 54B91838 rlwinm r25,r5,3,0,28
+ 36: GETL R5, t32
+ 37: SHLL $0x3, t32
+ 38: PUTL t32, R25
+ 39: INCEIPL $4
+
+ 0xFE8D3B4: 90F40000 stw r7,0(r20)
+ 40: GETL R7, t34
+ 41: GETL R20, t36
+ 42: STL t34, (t36)
+ 43: INCEIPL $4
+
+ 0xFE8D3B8: 7EE5BB78 or r5,r23,r23
+ 44: GETL R23, t38
+ 45: PUTL t38, R5
+ 46: INCEIPL $4
+
+ 0xFE8D3BC: 839D0000 lwz r28,0(r29)
+ 47: GETL R29, t40
+ 48: LDL (t40), t42
+ 49: PUTL t42, R28
+ 50: INCEIPL $4
+
+ 0xFE8D3C0: 4804B319 bl 0xFED86D8
+ 51: MOVL $0xFE8D3C4, t44
+ 52: PUTL t44, LR
+ 53: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 2581 FE8D390 52
+. 80 94 00 00 7C 7C B1 2E 80 79 00 00 7C E4 C2 14 80 B3 00 00 7E A4 AB 78 83 BF 01 B0 7C 63 3A 14 54 B9 18 38 90 F4 00 00 7E E5 BB 78 83 9D 00 00 48 04 B3 19
+==== BB 2582 (0xFE8D3C4) approx BBs exec'd 0 ====
+
+ 0xFE8D3C4: 81940000 lwz r12,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R12
+ 3: INCEIPL $4
+
+ 0xFE8D3C8: 80D30000 lwz r6,0(r19)
+ 4: GETL R19, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R6
+ 7: INCEIPL $4
+
+ 0xFE8D3CC: 7F19E214 add r24,r25,r28
+ 8: GETL R25, t8
+ 9: GETL R28, t10
+ 10: ADDL t8, t10
+ 11: PUTL t10, R24
+ 12: INCEIPL $4
+
+ 0xFE8D3D0: 7EACBA14 add r21,r12,r23
+ 13: GETL R12, t12
+ 14: GETL R23, t14
+ 15: ADDL t12, t14
+ 16: PUTL t14, R21
+ 17: INCEIPL $4
+
+ 0xFE8D3D4: 90780004 stw r3,4(r24)
+ 18: GETL R3, t16
+ 19: GETL R24, t18
+ 20: ADDL $0x4, t18
+ 21: STL t16, (t18)
+ 22: INCEIPL $4
+
+ 0xFE8D3D8: 3AC60001 addi r22,r6,1
+ 23: GETL R6, t20
+ 24: ADDL $0x1, t20
+ 25: PUTL t20, R22
+ 26: INCEIPL $4
+
+ 0xFE8D3DC: 92B40000 stw r21,0(r20)
+ 27: GETL R21, t22
+ 28: GETL R20, t24
+ 29: STL t22, (t24)
+ 30: INCEIPL $4
+
+ 0xFE8D3E0: 92D30000 stw r22,0(r19)
+ 31: GETL R22, t26
+ 32: GETL R19, t28
+ 33: STL t26, (t28)
+ 34: INCEIPL $4
+
+ 0xFE8D3E4: 2C110000 cmpi cr0,r17,0
+ 35: GETL R17, t30
+ 36: CMP0L t30, t32 (-rSo)
+ 37: ICRFL t32, $0x0, CR
+ 38: INCEIPL $4
+
+ 0xFE8D3E8: 4182009C bc 12,2,0xFE8D484
+ 39: Js02o $0xFE8D484
+
+
+
+. 2582 FE8D3C4 40
+. 81 94 00 00 80 D3 00 00 7F 19 E2 14 7E AC BA 14 90 78 00 04 3A C6 00 01 92 B4 00 00 92 D3 00 00 2C 11 00 00 41 82 00 9C
+==== BB 2583 (0xFE8D2D8) approx BBs exec'd 0 ====
+
+ 0xFE8D2D8: 7EC3B378 or r3,r22,r22
+ 0: GETL R22, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8D2DC: 839E0214 lwz r28,532(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x214, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFE8D2E0: 480497F9 bl 0xFED6AD8
+ 8: MOVL $0xFE8D2E4, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2583 FE8D2D8 12
+. 7E C3 B3 78 83 9E 02 14 48 04 97 F9
+==== BB 2584 (0xFE8D364) approx BBs exec'd 0 ====
+
+ 0xFE8D364: 81790000 lwz r11,0(r25)
+ 0: GETL R25, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFE8D368: 7EC4B378 or r4,r22,r22
+ 4: GETL R22, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0xFE8D36C: 81540000 lwz r10,0(r20)
+ 7: GETL R20, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R10
+ 10: INCEIPL $4
+
+ 0xFE8D370: 7F05C378 or r5,r24,r24
+ 11: GETL R24, t10
+ 12: PUTL t10, R5
+ 13: INCEIPL $4
+
+ 0xFE8D374: 81130000 lwz r8,0(r19)
+ 14: GETL R19, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R8
+ 17: INCEIPL $4
+
+ 0xFE8D378: 39CE0001 addi r14,r14,1
+ 18: GETL R14, t16
+ 19: ADDL $0x1, t16
+ 20: PUTL t16, R14
+ 21: INCEIPL $4
+
+ 0xFE8D37C: 82CC0000 lwz r22,0(r12)
+ 22: GETL R12, t18
+ 23: LDL (t18), t20
+ 24: PUTL t20, R22
+ 25: INCEIPL $4
+
+ 0xFE8D380: 7C6B5214 add r3,r11,r10
+ 26: GETL R11, t22
+ 27: GETL R10, t24
+ 28: ADDL t22, t24
+ 29: PUTL t24, R3
+ 30: INCEIPL $4
+
+ 0xFE8D384: 551C1838 rlwinm r28,r8,3,0,28
+ 31: GETL R8, t26
+ 32: SHLL $0x3, t26
+ 33: PUTL t26, R28
+ 34: INCEIPL $4
+
+ 0xFE8D388: 919F01B0 stw r12,432(r31)
+ 35: GETL R12, t28
+ 36: GETL R31, t30
+ 37: ADDL $0x1B0, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0xFE8D38C: 4804B34D bl 0xFED86D8
+ 40: MOVL $0xFE8D390, t32
+ 41: PUTL t32, LR
+ 42: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 2584 FE8D364 44
+. 81 79 00 00 7E C4 B3 78 81 54 00 00 7F 05 C3 78 81 13 00 00 39 CE 00 01 82 CC 00 00 7C 6B 52 14 55 1C 18 38 91 9F 01 B0 48 04 B3 4D
+==== BB 2585 (0xFEBD8A4) approx BBs exec'd 0 ====
+
+ 0xFEBD8A4: 7FE5FB78 or r5,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFEBD8A8: 7F9FE050 subf r28,r31,r28
+ 3: GETL R31, t2
+ 4: GETL R28, t4
+ 5: SUBL t2, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFEBD8AC: 48019EA9 bl 0xFED7754
+ 8: MOVL $0xFEBD8B0, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFED7754 ($4)
+
+
+
+. 2585 FEBD8A4 12
+. 7F E5 FB 78 7F 9F E0 50 48 01 9E A9
+==== BB 2586 (0xFED22A4) approx BBs exec'd 0 ====
+
+ 0xFED22A4: 3BA3FFF8 addi r29,r3,-8
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFF8, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0xFED22A8: 815D0004 lwz r10,4(r29)
+ 4: GETL R29, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0xFED22AC: 55590038 rlwinm r25,r10,0,0,28
+ 9: GETL R10, t6
+ 10: ANDL $0xFFFFFFF8, t6
+ 11: PUTL t6, R25
+ 12: INCEIPL $4
+
+ 0xFED22B0: 7CF900D0 neg r7,r25
+ 13: GETL R25, t8
+ 14: NEGL t8
+ 15: PUTL t8, R7
+ 16: INCEIPL $4
+
+ 0xFED22B4: 7F1D3840 cmpl cr6,r29,r7
+ 17: GETL R29, t10
+ 18: GETL R7, t12
+ 19: CMPUL t10, t12, t14 (-rSo)
+ 20: ICRFL t14, $0x6, CR
+ 21: INCEIPL $4
+
+ 0xFED22B8: 419901E0 bc 12,25,0xFED2498
+ 22: Js25o $0xFED2498
+
+
+
+. 2586 FED22A4 24
+. 3B A3 FF F8 81 5D 00 04 55 59 00 38 7C F9 00 D0 7F 1D 38 40 41 99 01 E0
+==== BB 2587 (0xFED22BC) approx BBs exec'd 0 ====
+
+ 0xFED22BC: 73A00007 andi. r0,r29,0x7
+ 0: GETL R29, t0
+ 1: ANDL $0x7, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED22C0: 408201D8 bc 4,2,0xFED2498
+ 6: Jc02o $0xFED2498
+
+
+
+. 2587 FED22BC 8
+. 73 A0 00 07 40 82 01 D8
+==== BB 2588 (0xFED22C4) approx BBs exec'd 0 ====
+
+ 0xFED22C4: 3960FFDF li r11,-33
+ 0: MOVL $0xFFFFFFDF, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFED22C8: 7C9B5840 cmpl cr1,r27,r11
+ 3: GETL R27, t2
+ 4: GETL R11, t4
+ 5: CMPUL t2, t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFED22CC: 41850228 bc 12,5,0xFED24F4
+ 8: Js05o $0xFED24F4
+
+
+
+. 2588 FED22C4 12
+. 39 60 FF DF 7C 9B 58 40 41 85 02 28
+==== BB 2589 (0xFED22D0) approx BBs exec'd 0 ====
+
+ 0xFED22D0: 399B000B addi r12,r27,11
+ 0: GETL R27, t0
+ 1: ADDL $0xB, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0xFED22D4: 2B0C000F cmpli cr6,r12,15
+ 4: GETL R12, t2
+ 5: MOVL $0xF, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFED22D8: 55980038 rlwinm r24,r12,0,0,28
+ 9: GETL R12, t8
+ 10: ANDL $0xFFFFFFF8, t8
+ 11: PUTL t8, R24
+ 12: INCEIPL $4
+
+ 0xFED22DC: 409900C0 bc 4,25,0xFED239C
+ 13: Jc25o $0xFED239C
+
+
+
+. 2589 FED22D0 16
+. 39 9B 00 0B 2B 0C 00 0F 55 98 00 38 40 99 00 C0
+==== BB 2590 (0xFED22E0) approx BBs exec'd 0 ====
+
+ 0xFED22E0: 71400002 andi. r0,r10,0x2
+ 0: GETL R10, t0
+ 1: ANDL $0x2, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED22E4: 408200C0 bc 4,2,0xFED23A4
+ 6: Jc02o $0xFED23A4
+
+
+
+. 2590 FED22E0 8
+. 71 40 00 02 40 82 00 C0
+==== BB 2591 (0xFED22E8) approx BBs exec'd 0 ====
+
+ 0xFED22E8: 71400004 andi. r0,r10,0x4
+ 0: GETL R10, t0
+ 1: ANDL $0x4, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED22EC: 83FE05FC lwz r31,1532(r30)
+ 6: GETL R30, t4
+ 7: ADDL $0x5FC, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R31
+ 10: INCEIPL $4
+
+ 0xFED22F0: 4182000C bc 12,2,0xFED22FC
+ 11: Js02o $0xFED22FC
+
+
+
+. 2591 FED22E8 12
+. 71 40 00 04 83 FE 05 FC 41 82 00 0C
+==== BB 2592 (0xFED22FC) approx BBs exec'd 0 ====
+
+ 0xFED22FC: 3BA00000 li r29,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFED2300: 39200001 li r9,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0xFED2304: 7F40F828 lwarx r26,r0,r31
+ 6: GETL R31, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R26
+ 10: INCEIPL $4
+
+ 0xFED2308: 7C1AE800 cmp cr0,r26,r29
+ 11: GETL R26, t8
+ 12: GETL R29, t10
+ 13: CMPL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFED230C: 4082000C bc 4,2,0xFED2318
+ 16: Jc02o $0xFED2318
+
+
+
+. 2592 FED22FC 20
+. 3B A0 00 00 39 20 00 01 7F 40 F8 28 7C 1A E8 00 40 82 00 0C
+==== BB 2593 (0xFED2310) approx BBs exec'd 0 ====
+
+ 0xFED2310: 7D20F92D stwcx. r9,r0,r31
+ 0: GETL R31, t0
+ 1: GETL R9, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED2314: 40A2FFF0 bc 5,2,0xFED2304
+ 6: Jc02o $0xFED2304
+
+
+
+. 2593 FED2310 8
+. 7D 20 F9 2D 40 A2 FF F0
+==== BB 2594 (0xFED2304) approx BBs exec'd 0 ====
+
+ 0xFED2304: 7F40F828 lwarx r26,r0,r31
+ 0: GETL R31, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFED2308: 7C1AE800 cmp cr0,r26,r29
+ 5: GETL R26, t4
+ 6: GETL R29, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFED230C: 4082000C bc 4,2,0xFED2318
+ 10: Jc02o $0xFED2318
+
+
+
+. 2594 FED2304 12
+. 7F 40 F8 28 7C 1A E8 00 40 82 00 0C
+==== BB 2595 (0xFED2318) approx BBs exec'd 0 ====
+
+ 0xFED2318: 4C00012C 0: INCEIPL $4
+
+ 0xFED231C: 2F9A0000 cmpi cr7,r26,0
+ 1: GETL R26, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFED2320: 409E01F4 bc 4,30,0xFED2514
+ 5: Jc30o $0xFED2514
+
+
+
+. 2595 FED2318 12
+. 4C 00 01 2C 2F 9A 00 00 40 9E 01 F4
+==== BB 2596 (0xFED2324) approx BBs exec'd 0 ====
+
+ 0xFED2324: 80FE0600 lwz r7,1536(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x600, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFED2328: 7F84E378 or r4,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFED232C: 7CA71214 add r5,r7,r2
+ 8: GETL R7, t6
+ 9: GETL R2, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0xFED2330: 7FE3FB78 or r3,r31,r31
+ 13: GETL R31, t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0xFED2334: 93E50000 stw r31,0(r5)
+ 16: GETL R31, t12
+ 17: GETL R5, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFED2338: 7F65DB78 or r5,r27,r27
+ 20: GETL R27, t16
+ 21: PUTL t16, R5
+ 22: INCEIPL $4
+
+ 0xFED233C: 4BFFE6B1 bl 0xFED09EC
+ 23: MOVL $0xFED2340, t18
+ 24: PUTL t18, LR
+ 25: JMPo-c $0xFED09EC ($4)
+
+
+
+. 2596 FED2324 28
+. 80 FE 06 00 7F 84 E3 78 7C A7 12 14 7F E3 FB 78 93 E5 00 00 7F 65 DB 78 4B FF E6 B1
+==== BB 2597 _int_realloc(0xFED09EC) approx BBs exec'd 0 ====
+
+ 0xFED09EC: 3800FFDF li r0,-33
+ 0: MOVL $0xFFFFFFDF, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFED09F0: 7CC802A6 mflr r6
+ 3: GETL LR, t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFED09F4: 7F850040 cmpl cr7,r5,r0
+ 6: GETL R5, t4
+ 7: GETL R0, t6
+ 8: CMPUL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0xFED09F8: 9421FFB0 stwu r1,-80(r1)
+ 11: GETL R1, t10
+ 12: GETL R1, t12
+ 13: ADDL $0xFFFFFFB0, t12
+ 14: PUTL t12, R1
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0xFED09FC: 480D7455 bl 0xFFA7E50
+ 17: MOVL $0xFED0A00, t14
+ 18: PUTL t14, LR
+ 19: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2597 FED09EC 20
+. 38 00 FF DF 7C C8 02 A6 7F 85 00 40 94 21 FF B0 48 0D 74 55
+==== BB 2598 (0xFED0A00) approx BBs exec'd 0 ====
+
+ 0xFED0A00: 92C10028 stw r22,40(r1)
+ 0: GETL R22, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFED0A04: 9361003C stw r27,60(r1)
+ 5: GETL R27, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x3C, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFED0A08: 7C761B78 or r22,r3,r3
+ 10: GETL R3, t8
+ 11: PUTL t8, R22
+ 12: INCEIPL $4
+
+ 0xFED0A0C: 93C10048 stw r30,72(r1)
+ 13: GETL R30, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x48, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFED0A10: 7C9B2378 or r27,r4,r4
+ 18: GETL R4, t14
+ 19: PUTL t14, R27
+ 20: INCEIPL $4
+
+ 0xFED0A14: 92E1002C stw r23,44(r1)
+ 21: GETL R23, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x2C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFED0A18: 7FC802A6 mflr r30
+ 26: GETL LR, t20
+ 27: PUTL t20, R30
+ 28: INCEIPL $4
+
+ 0xFED0A1C: 93010030 stw r24,48(r1)
+ 29: GETL R24, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x30, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFED0A20: 93210034 stw r25,52(r1)
+ 34: GETL R25, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x34, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFED0A24: 93410038 stw r26,56(r1)
+ 39: GETL R26, t30
+ 40: GETL R1, t32
+ 41: ADDL $0x38, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFED0A28: 93810040 stw r28,64(r1)
+ 44: GETL R28, t34
+ 45: GETL R1, t36
+ 46: ADDL $0x40, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0xFED0A2C: 93A10044 stw r29,68(r1)
+ 49: GETL R29, t38
+ 50: GETL R1, t40
+ 51: ADDL $0x44, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0xFED0A30: 93E1004C stw r31,76(r1)
+ 54: GETL R31, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x4C, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0xFED0A34: 90C10054 stw r6,84(r1)
+ 59: GETL R6, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x54, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0xFED0A38: 419D034C bc 12,29,0xFED0D84
+ 64: Js29o $0xFED0D84
+
+
+
+. 2598 FED0A00 60
+. 92 C1 00 28 93 61 00 3C 7C 76 1B 78 93 C1 00 48 7C 9B 23 78 92 E1 00 2C 7F C8 02 A6 93 01 00 30 93 21 00 34 93 41 00 38 93 81 00 40 93 A1 00 44 93 E1 00 4C 90 C1 00 54 41 9D 03 4C
+==== BB 2599 (0xFED0A3C) approx BBs exec'd 0 ====
+
+ 0xFED0A3C: 3865000B addi r3,r5,11
+ 0: GETL R5, t0
+ 1: ADDL $0xB, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFED0A40: 2803000F cmpli cr0,r3,15
+ 4: GETL R3, t2
+ 5: MOVL $0xF, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFED0A44: 54780038 rlwinm r24,r3,0,0,28
+ 9: GETL R3, t8
+ 10: ANDL $0xFFFFFFF8, t8
+ 11: PUTL t8, R24
+ 12: INCEIPL $4
+
+ 0xFED0A48: 40810178 bc 4,1,0xFED0BC0
+ 13: Jc01o $0xFED0BC0
+
+
+
+. 2599 FED0A3C 16
+. 38 65 00 0B 28 03 00 0F 54 78 00 38 40 81 01 78
+==== BB 2600 (0xFED0A4C) approx BBs exec'd 0 ====
+
+ 0xFED0A4C: 3B5BFFF8 addi r26,r27,-8
+ 0: GETL R27, t0
+ 1: ADDL $0xFFFFFFF8, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0xFED0A50: 73400007 andi. r0,r26,0x7
+ 4: GETL R26, t2
+ 5: ANDL $0x7, t2
+ 6: PUTL t2, R0
+ 7: CMP0L t2, t4 (-rSo)
+ 8: ICRFL t4, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFED0A54: 817A0004 lwz r11,4(r26)
+ 10: GETL R26, t6
+ 11: ADDL $0x4, t6
+ 12: LDL (t6), t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0xFED0A58: 557D0038 rlwinm r29,r11,0,0,28
+ 15: GETL R11, t10
+ 16: ANDL $0xFFFFFFF8, t10
+ 17: PUTL t10, R29
+ 18: INCEIPL $4
+
+ 0xFED0A5C: 40820374 bc 4,2,0xFED0DD0
+ 19: Jc02o $0xFED0DD0
+
+
+
+. 2600 FED0A4C 20
+. 3B 5B FF F8 73 40 00 07 81 7A 00 04 55 7D 00 38 40 82 03 74
+==== BB 2601 (0xFED0A60) approx BBs exec'd 0 ====
+
+ 0xFED0A60: 2B0B0008 cmpli cr6,r11,8
+ 0: GETL R11, t0
+ 1: MOVL $0x8, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFED0A64: 409902C4 bc 4,25,0xFED0D28
+ 5: Jc25o $0xFED0D28
+
+
+
+. 2601 FED0A60 8
+. 2B 0B 00 08 40 99 02 C4
+==== BB 2602 (0xFED0A68) approx BBs exec'd 0 ====
+
+ 0xFED0A68: 8016044C lwz r0,1100(r22)
+ 0: GETL R22, t0
+ 1: ADDL $0x44C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED0A6C: 7F80E840 cmpl cr7,r0,r29
+ 5: GETL R0, t4
+ 6: GETL R29, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFED0A70: 409D02B8 bc 4,29,0xFED0D28
+ 10: Jc29o $0xFED0D28
+
+
+
+. 2602 FED0A68 12
+. 80 16 04 4C 7F 80 E8 40 40 9D 02 B8
+==== BB 2603 (0xFED0A74) approx BBs exec'd 0 ====
+
+ 0xFED0A74: 71680002 andi. r8,r11,0x2
+ 0: GETL R11, t0
+ 1: ANDL $0x2, t0
+ 2: PUTL t0, R8
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED0A78: 40820150 bc 4,2,0xFED0BC8
+ 6: Jc02o $0xFED0BC8
+
+
+
+. 2603 FED0A74 8
+. 71 68 00 02 40 82 01 50
+==== BB 2604 (0xFED0A7C) approx BBs exec'd 0 ====
+
+ 0xFED0A7C: 7FFAEA14 add r31,r26,r29
+ 0: GETL R26, t0
+ 1: GETL R29, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFED0A80: 813F0004 lwz r9,4(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFED0A84: 28890008 cmpli cr1,r9,8
+ 10: GETL R9, t8
+ 11: MOVL $0x8, t12
+ 12: CMPUL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x1, CR
+ 14: INCEIPL $4
+
+ 0xFED0A88: 55280038 rlwinm r8,r9,0,0,28
+ 15: GETL R9, t14
+ 16: ANDL $0xFFFFFFF8, t14
+ 17: PUTL t14, R8
+ 18: INCEIPL $4
+
+ 0xFED0A8C: 4085034C bc 4,5,0xFED0DD8
+ 19: Jc05o $0xFED0DD8
+
+
+
+. 2604 FED0A7C 20
+. 7F FA EA 14 81 3F 00 04 28 89 00 08 55 28 00 38 40 85 03 4C
+==== BB 2605 (0xFED0A90) approx BBs exec'd 0 ====
+
+ 0xFED0A90: 7F004040 cmpl cr6,r0,r8
+ 0: GETL R0, t0
+ 1: GETL R8, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFED0A94: 40990344 bc 4,25,0xFED0DD8
+ 5: Jc25o $0xFED0DD8
+
+
+
+. 2605 FED0A90 8
+. 7F 00 40 40 40 99 03 44
+==== BB 2606 (0xFED0A98) approx BBs exec'd 0 ====
+
+ 0xFED0A98: 7F9DC040 cmpl cr7,r29,r24
+ 0: GETL R29, t0
+ 1: GETL R24, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFED0A9C: 7FBCEB78 or r28,r29,r29
+ 5: GETL R29, t6
+ 6: PUTL t6, R28
+ 7: INCEIPL $4
+
+ 0xFED0AA0: 409C0208 bc 4,28,0xFED0CA8
+ 8: Jc28o $0xFED0CA8
+
+
+
+. 2606 FED0A98 12
+. 7F 9D C0 40 7F BC EB 78 40 9C 02 08
+==== BB 2607 (0xFED0AA4) approx BBs exec'd 0 ====
+
+ 0xFED0AA4: 80F60030 lwz r7,48(r22)
+ 0: GETL R22, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFED0AA8: 7C07F800 cmp cr0,r7,r31
+ 5: GETL R7, t4
+ 6: GETL R31, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFED0AAC: 418203F4 bc 12,2,0xFED0EA0
+ 10: Js02o $0xFED0EA0
+
+
+
+. 2607 FED0AA4 12
+. 80 F6 00 30 7C 07 F8 00 41 82 03 F4
+==== BB 2608 (0xFED0EA0) approx BBs exec'd 0 ====
+
+ 0xFED0EA0: 7D5D4214 add r10,r29,r8
+ 0: GETL R29, t0
+ 1: GETL R8, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFED0EA4: 39980010 addi r12,r24,16
+ 5: GETL R24, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFED0EA8: 7C8A6040 cmpl cr1,r10,r12
+ 9: GETL R10, t6
+ 10: GETL R12, t8
+ 11: CMPUL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0xFED0EAC: 41A4FC04 bc 13,4,0xFED0AB0
+ 14: Js04o $0xFED0AB0
+
+
+
+. 2608 FED0EA0 16
+. 7D 5D 42 14 39 98 00 10 7C 8A 60 40 41 A4 FC 04
+==== BB 2609 (0xFED0EB0) approx BBs exec'd 0 ====
+
+ 0xFED0EB0: 80DE05FC lwz r6,1532(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFED0EB4: 557D077E rlwinm r29,r11,0,29,31
+ 5: GETL R11, t4
+ 6: ANDL $0x7, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0xFED0EB8: 7F385050 subf r25,r24,r10
+ 9: GETL R24, t6
+ 10: GETL R10, t8
+ 11: SUBL t6, t8
+ 12: PUTL t8, R25
+ 13: INCEIPL $4
+
+ 0xFED0EBC: 7FABC378 or r11,r29,r24
+ 14: GETL R29, t10
+ 15: GETL R24, t12
+ 16: ORL t12, t10
+ 17: PUTL t10, R11
+ 18: INCEIPL $4
+
+ 0xFED0EC0: 7EC03278 xor r0,r22,r6
+ 19: GETL R22, t14
+ 20: GETL R6, t16
+ 21: XORL t14, t16
+ 22: PUTL t16, R0
+ 23: INCEIPL $4
+
+ 0xFED0EC4: 632A0001 ori r10,r25,0x1
+ 24: GETL R25, t18
+ 25: ORL $0x1, t18
+ 26: PUTL t18, R10
+ 27: INCEIPL $4
+
+ 0xFED0EC8: 3100FFFF addic r8,r0,-1
+ 28: GETL R0, t20
+ 29: ADCL $0xFFFFFFFF, t20 (-wCa)
+ 30: PUTL t20, R8
+ 31: INCEIPL $4
+
+ 0xFED0ECC: 7FE80110 subfe r31,r8,r0
+ 32: GETL R8, t22
+ 33: GETL R0, t24
+ 34: SBBL t22, t24 (-rCa-wCa)
+ 35: PUTL t24, R31
+ 36: INCEIPL $4
+
+ 0xFED0ED0: 7F67DB78 or r7,r27,r27
+ 37: GETL R27, t26
+ 38: PUTL t26, R7
+ 39: INCEIPL $4
+
+ 0xFED0ED4: 57FC103A rlwinm r28,r31,2,0,29
+ 40: GETL R31, t28
+ 41: SHLL $0x2, t28
+ 42: PUTL t28, R28
+ 43: INCEIPL $4
+
+ 0xFED0ED8: 7D1AC214 add r8,r26,r24
+ 44: GETL R26, t30
+ 45: GETL R24, t32
+ 46: ADDL t30, t32
+ 47: PUTL t32, R8
+ 48: INCEIPL $4
+
+ 0xFED0EDC: 7F975B78 or r23,r28,r11
+ 49: GETL R28, t34
+ 50: GETL R11, t36
+ 51: ORL t36, t34
+ 52: PUTL t34, R23
+ 53: INCEIPL $4
+
+ 0xFED0EE0: 91160030 stw r8,48(r22)
+ 54: GETL R8, t38
+ 55: GETL R22, t40
+ 56: ADDL $0x30, t40
+ 57: STL t38, (t40)
+ 58: INCEIPL $4
+
+ 0xFED0EE4: 92FA0004 stw r23,4(r26)
+ 59: GETL R23, t42
+ 60: GETL R26, t44
+ 61: ADDL $0x4, t44
+ 62: STL t42, (t44)
+ 63: INCEIPL $4
+
+ 0xFED0EE8: 91480004 stw r10,4(r8)
+ 64: GETL R10, t46
+ 65: GETL R8, t48
+ 66: ADDL $0x4, t48
+ 67: STL t46, (t48)
+ 68: INCEIPL $4
+
+ 0xFED0EEC: 4BFFFC98 b 0xFED0B84
+ 69: JMPo $0xFED0B84 ($4)
+
+
+
+. 2609 FED0EB0 64
+. 80 DE 05 FC 55 7D 07 7E 7F 38 50 50 7F AB C3 78 7E C0 32 78 63 2A 00 01 31 00 FF FF 7F E8 01 10 7F 67 DB 78 57 FC 10 3A 7D 1A C2 14 7F 97 5B 78 91 16 00 30 92 FA 00 04 91 48 00 04 4B FF FC 98
+==== BB 2610 (0xFED0B84) approx BBs exec'd 0 ====
+
+ 0xFED0B84: 83210054 lwz r25,84(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x54, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0xFED0B88: 7CE33B78 or r3,r7,r7
+ 5: GETL R7, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED0B8C: 82C10028 lwz r22,40(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x28, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R22
+ 12: INCEIPL $4
+
+ 0xFED0B90: 7F2803A6 mtlr r25
+ 13: GETL R25, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFED0B94: 82E1002C lwz r23,44(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x2C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R23
+ 20: INCEIPL $4
+
+ 0xFED0B98: 83010030 lwz r24,48(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x30, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R24
+ 25: INCEIPL $4
+
+ 0xFED0B9C: 83210034 lwz r25,52(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x34, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R25
+ 30: INCEIPL $4
+
+ 0xFED0BA0: 83410038 lwz r26,56(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x38, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R26
+ 35: INCEIPL $4
+
+ 0xFED0BA4: 8361003C lwz r27,60(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x3C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R27
+ 40: INCEIPL $4
+
+ 0xFED0BA8: 83810040 lwz r28,64(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x40, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R28
+ 45: INCEIPL $4
+
+ 0xFED0BAC: 83A10044 lwz r29,68(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x44, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R29
+ 50: INCEIPL $4
+
+ 0xFED0BB0: 83C10048 lwz r30,72(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x48, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R30
+ 55: INCEIPL $4
+
+ 0xFED0BB4: 83E1004C lwz r31,76(r1)
+ 56: GETL R1, t44
+ 57: ADDL $0x4C, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R31
+ 60: INCEIPL $4
+
+ 0xFED0BB8: 38210050 addi r1,r1,80
+ 61: GETL R1, t48
+ 62: ADDL $0x50, t48
+ 63: PUTL t48, R1
+ 64: INCEIPL $4
+
+ 0xFED0BBC: 4E800020 blr
+ 65: GETL LR, t50
+ 66: JMPo-r t50 ($4)
+
+
+
+. 2610 FED0B84 60
+. 83 21 00 54 7C E3 3B 78 82 C1 00 28 7F 28 03 A6 82 E1 00 2C 83 01 00 30 83 21 00 34 83 41 00 38 83 61 00 3C 83 81 00 40 83 A1 00 44 83 C1 00 48 83 E1 00 4C 38 21 00 50 4E 80 00 20
+==== BB 2611 (0xFED2340) approx BBs exec'd 0 ====
+
+ 0xFED2340: 7C7C1B78 or r28,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0xFED2344: 7C0004AC sync
+ 3: INCEIPL $4
+
+ 0xFED2348: 7C80F828 lwarx r4,r0,r31
+ 4: GETL R31, t2
+ 5: LOCKo
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFED234C: 7FA0F92D stwcx. r29,r0,r31
+ 9: GETL R31, t6
+ 10: GETL R29, t8
+ 11: LOCKo
+ 12: STL t8, (t6) (-rSo)
+ 13: ICRFL cr, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFED2350: 40A2FFF8 bc 5,2,0xFED2348
+ 15: Jc02o $0xFED2348
+
+
+
+. 2611 FED2340 20
+. 7C 7C 1B 78 7C 00 04 AC 7C 80 F8 28 7F A0 F9 2D 40 A2 FF F8
+==== BB 2612 (0xFED2354) approx BBs exec'd 0 ====
+
+ 0xFED2354: 2C840001 cmpi cr1,r4,1
+ 0: GETL R4, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFED2358: 41850168 bc 12,5,0xFED24C0
+ 5: Js05o $0xFED24C0
+
+
+
+. 2612 FED2354 8
+. 2C 84 00 01 41 85 01 68
+==== BB 2613 (0xFED235C) approx BBs exec'd 0 ====
+
+ 0xFED235C: 7F89E378 or r9,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0xFED2360: 83A10054 lwz r29,84(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x54, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFED2364: 7D234B78 or r3,r9,r9
+ 8: GETL R9, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFED2368: 82C10028 lwz r22,40(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x28, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R22
+ 15: INCEIPL $4
+
+ 0xFED236C: 7FA803A6 mtlr r29
+ 16: GETL R29, t12
+ 17: PUTL t12, LR
+ 18: INCEIPL $4
+
+ 0xFED2370: 82E1002C lwz r23,44(r1)
+ 19: GETL R1, t14
+ 20: ADDL $0x2C, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R23
+ 23: INCEIPL $4
+
+ 0xFED2374: 83010030 lwz r24,48(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x30, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R24
+ 28: INCEIPL $4
+
+ 0xFED2378: 83210034 lwz r25,52(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x34, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R25
+ 33: INCEIPL $4
+
+ 0xFED237C: 83410038 lwz r26,56(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x38, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R26
+ 38: INCEIPL $4
+
+ 0xFED2380: 8361003C lwz r27,60(r1)
+ 39: GETL R1, t30
+ 40: ADDL $0x3C, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R27
+ 43: INCEIPL $4
+
+ 0xFED2384: 83810040 lwz r28,64(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x40, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R28
+ 48: INCEIPL $4
+
+ 0xFED2388: 83A10044 lwz r29,68(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x44, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R29
+ 53: INCEIPL $4
+
+ 0xFED238C: 83C10048 lwz r30,72(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x48, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R30
+ 58: INCEIPL $4
+
+ 0xFED2390: 83E1004C lwz r31,76(r1)
+ 59: GETL R1, t46
+ 60: ADDL $0x4C, t46
+ 61: LDL (t46), t48
+ 62: PUTL t48, R31
+ 63: INCEIPL $4
+
+ 0xFED2394: 38210050 addi r1,r1,80
+ 64: GETL R1, t50
+ 65: ADDL $0x50, t50
+ 66: PUTL t50, R1
+ 67: INCEIPL $4
+
+ 0xFED2398: 4E800020 blr
+ 68: GETL LR, t52
+ 69: JMPo-r t52 ($4)
+
+
+
+. 2613 FED235C 64
+. 7F 89 E3 78 83 A1 00 54 7D 23 4B 78 82 C1 00 28 7F A8 03 A6 82 E1 00 2C 83 01 00 30 83 21 00 34 83 41 00 38 83 61 00 3C 83 81 00 40 83 A1 00 44 83 C1 00 48 83 E1 00 4C 38 21 00 50 4E 80 00 20
+==== BB 2614 (0xFEC8F4C) approx BBs exec'd 0 ====
+
+ 0xFEC8F4C: 71600202 andi. r0,r11,0x202
+ 0: GETL R11, t0
+ 1: ANDL $0x202, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEC8F50: 4182006C bc 12,2,0xFEC8FBC
+ 6: Js02o $0xFEC8FBC
+
+
+
+. 2614 FEC8F4C 8
+. 71 60 02 02 41 82 00 6C
+==== BB 2615 (0xFEC90FC) approx BBs exec'd 0 ====
+
+ 0xFEC90FC: 40820014 bc 4,2,0xFEC9110
+ 0: Jc02o $0xFEC9110
+
+
+
+. 2615 FEC90FC 4
+. 40 82 00 14
+==== BB 2616 (0xFEC9100) approx BBs exec'd 0 ====
+
+ 0xFEC9100: 815F0000 lwz r10,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFEC9104: 61400010 ori r0,r10,0x10
+ 4: GETL R10, t4
+ 5: ORL $0x10, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFEC9108: 901F0000 stw r0,0(r31)
+ 8: GETL R0, t6
+ 9: GETL R31, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFEC910C: 4BFFFF08 b 0xFEC9014
+ 12: JMPo $0xFEC9014 ($4)
+
+
+
+. 2616 FEC9100 16
+. 81 5F 00 00 61 40 00 10 90 1F 00 00 4B FF FF 08
+==== BB 2617 (0xFEC9190) approx BBs exec'd 0 ====
+
+ 0xFEC9190: 3860FFFF li r3,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC9194: 4BFFFD70 b 0xFEC8F04
+ 3: JMPo $0xFEC8F04 ($4)
+
+
+
+. 2617 FEC9190 8
+. 38 60 FF FF 4B FF FD 70
+==== BB 2618 (0xFEC8F04) approx BBs exec'd 0 ====
+
+ 0xFEC8F04: 83E10024 lwz r31,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFEC8F08: 8361000C lwz r27,12(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R27
+ 9: INCEIPL $4
+
+ 0xFEC8F0C: 7FE803A6 mtlr r31
+ 10: GETL R31, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFEC8F10: 83810010 lwz r28,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0xFEC8F14: 83A10014 lwz r29,20(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R29
+ 22: INCEIPL $4
+
+ 0xFEC8F18: 83C10018 lwz r30,24(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x18, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R30
+ 27: INCEIPL $4
+
+ 0xFEC8F1C: 83E1001C lwz r31,28(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x1C, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R31
+ 32: INCEIPL $4
+
+ 0xFEC8F20: 38210020 addi r1,r1,32
+ 33: GETL R1, t26
+ 34: ADDL $0x20, t26
+ 35: PUTL t26, R1
+ 36: INCEIPL $4
+
+ 0xFEC8F24: 4E800020 blr
+ 37: GETL LR, t28
+ 38: JMPo-r t28 ($4)
+
+
+
+. 2618 FEC8F04 36
+. 83 E1 00 24 83 61 00 0C 7F E8 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2619 (0xFECBD40) approx BBs exec'd 0 ====
+
+ 0xFECBD40: 81410014 lwz r10,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFECBD44: 83E10008 lwz r31,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0xFECBD48: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xFECBD4C: 7D4803A6 mtlr r10
+ 14: GETL R10, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xFECBD50: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 2619 FECBD40 20
+. 81 41 00 14 83 E1 00 08 38 21 00 10 7D 48 03 A6 4E 80 00 20
+==== BB 2620 (0xFEBD9D0) approx BBs exec'd 0 ====
+
+ 0xFEBD9D0: 41AEFF10 bc 13,14,0xFEBD8E0
+ 0: Js14o $0xFEBD8E0
+
+
+
+. 2620 FEBD9D0 4
+. 41 AE FF 10
+==== BB 2621 (0xFEBD8E0) approx BBs exec'd 0 ====
+
+ 0xFEBD8E0: 81410044 lwz r10,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFEBD8E4: 7C77D050 subf r3,r23,r26
+ 5: GETL R23, t4
+ 6: GETL R26, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFEBD8E8: 81810014 lwz r12,20(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R12
+ 14: INCEIPL $4
+
+ 0xFEBD8EC: 82C10018 lwz r22,24(r1)
+ 15: GETL R1, t12
+ 16: ADDL $0x18, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R22
+ 19: INCEIPL $4
+
+ 0xFEBD8F0: 7D4803A6 mtlr r10
+ 20: GETL R10, t16
+ 21: PUTL t16, LR
+ 22: INCEIPL $4
+
+ 0xFEBD8F4: 82E1001C lwz r23,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R23
+ 27: INCEIPL $4
+
+ 0xFEBD8F8: 7D838120 mtcrf 0x38,r12
+ 28: GETL R12, t22
+ 29: ICRFL t22, $0x2, CR
+ 30: ICRFL t22, $0x3, CR
+ 31: ICRFL t22, $0x4, CR
+ 32: INCEIPL $4
+
+ 0xFEBD8FC: 83010020 lwz r24,32(r1)
+ 33: GETL R1, t24
+ 34: ADDL $0x20, t24
+ 35: LDL (t24), t26
+ 36: PUTL t26, R24
+ 37: INCEIPL $4
+
+ 0xFEBD900: 83210024 lwz r25,36(r1)
+ 38: GETL R1, t28
+ 39: ADDL $0x24, t28
+ 40: LDL (t28), t30
+ 41: PUTL t30, R25
+ 42: INCEIPL $4
+
+ 0xFEBD904: 83410028 lwz r26,40(r1)
+ 43: GETL R1, t32
+ 44: ADDL $0x28, t32
+ 45: LDL (t32), t34
+ 46: PUTL t34, R26
+ 47: INCEIPL $4
+
+ 0xFEBD908: 8361002C lwz r27,44(r1)
+ 48: GETL R1, t36
+ 49: ADDL $0x2C, t36
+ 50: LDL (t36), t38
+ 51: PUTL t38, R27
+ 52: INCEIPL $4
+
+ 0xFEBD90C: 83810030 lwz r28,48(r1)
+ 53: GETL R1, t40
+ 54: ADDL $0x30, t40
+ 55: LDL (t40), t42
+ 56: PUTL t42, R28
+ 57: INCEIPL $4
+
+ 0xFEBD910: 83A10034 lwz r29,52(r1)
+ 58: GETL R1, t44
+ 59: ADDL $0x34, t44
+ 60: LDL (t44), t46
+ 61: PUTL t46, R29
+ 62: INCEIPL $4
+
+ 0xFEBD914: 83C10038 lwz r30,56(r1)
+ 63: GETL R1, t48
+ 64: ADDL $0x38, t48
+ 65: LDL (t48), t50
+ 66: PUTL t50, R30
+ 67: INCEIPL $4
+
+ 0xFEBD918: 83E1003C lwz r31,60(r1)
+ 68: GETL R1, t52
+ 69: ADDL $0x3C, t52
+ 70: LDL (t52), t54
+ 71: PUTL t54, R31
+ 72: INCEIPL $4
+
+ 0xFEBD91C: 38210040 addi r1,r1,64
+ 73: GETL R1, t56
+ 74: ADDL $0x40, t56
+ 75: PUTL t56, R1
+ 76: INCEIPL $4
+
+ 0xFEBD920: 4E800020 blr
+ 77: GETL LR, t58
+ 78: JMPo-r t58 ($4)
+
+
+
+. 2621 FEBD8E0 68
+. 81 41 00 44 7C 77 D0 50 81 81 00 14 82 C1 00 18 7D 48 03 A6 82 E1 00 1C 7D 83 81 20 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+==== BB 2622 (0xFE8D3F8) approx BBs exec'd 0 ====
+
+ 0xFE8D3F8: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8D3FC: 4802E4B5 bl 0xFEBB8B0
+ 3: MOVL $0xFE8D400, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFEBB8B0 ($4)
+
+
+
+. 2622 FE8D3F8 8
+. 7F 63 DB 78 48 02 E4 B5
+==== BB 2623 _IO_fclose@@GLIBC_2.1(0xFEBB8B0) approx BBs exec'd 0 ====
+
+ 0xFEBB8B0: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFEBB8B4: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEBB8B8: 93A10014 stw r29,20(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEBB8BC: 480EC595 bl 0xFFA7E50
+ 14: MOVL $0xFEBB8C0, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2623 FEBB8B0 16
+. 7C 88 02 A6 94 21 FF E0 93 A1 00 14 48 0E C5 95
+==== BB 2624 (0xFEBB8C0) approx BBs exec'd 0 ====
+
+ 0xFEBB8C0: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEBB8C4: 7C7D1B78 or r29,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFEBB8C8: 93E1001C stw r31,28(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEBB8CC: 7FC802A6 mflr r30
+ 13: GETL LR, t10
+ 14: PUTL t10, R30
+ 15: INCEIPL $4
+
+ 0xFEBB8D0: 93410008 stw r26,8(r1)
+ 16: GETL R26, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x8, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFEBB8D4: 9361000C stw r27,12(r1)
+ 21: GETL R27, t16
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEBB8D8: 93810010 stw r28,16(r1)
+ 26: GETL R28, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x10, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xFEBB8DC: 90810024 stw r4,36(r1)
+ 31: GETL R4, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x24, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFEBB8E0: 88030046 lbz r0,70(r3)
+ 36: GETL R3, t28
+ 37: ADDL $0x46, t28
+ 38: LDB (t28), t30
+ 39: PUTL t30, R0
+ 40: INCEIPL $4
+
+ 0xFEBB8E4: 7C1F0774 extsb r31,r0
+ 41: GETB R0, t32
+ 42: WIDENL_Bs _st32
+ 43: PUTL t32, R31
+ 44: INCEIPL $4
+
+ 0xFEBB8E8: 2F9F0000 cmpi cr7,r31,0
+ 45: GETL R31, t34
+ 46: CMP0L t34, t36 (-rSo)
+ 47: ICRFL t36, $0x7, CR
+ 48: INCEIPL $4
+
+ 0xFEBB8EC: 409E0190 bc 4,30,0xFEBBA7C
+ 49: Jc30o $0xFEBBA7C
+
+
+
+. 2624 FEBB8C0 48
+. 93 C1 00 18 7C 7D 1B 78 93 E1 00 1C 7F C8 02 A6 93 41 00 08 93 61 00 0C 93 81 00 10 90 81 00 24 88 03 00 46 7C 1F 07 74 2F 9F 00 00 40 9E 01 90
+==== BB 2625 (0xFEBB8F0) approx BBs exec'd 0 ====
+
+ 0xFEBB8F0: 80030000 lwz r0,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEBB8F4: 70092000 andi. r9,r0,0x2000
+ 4: GETL R0, t4
+ 5: ANDL $0x2000, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEBB8F8: 40820178 bc 4,2,0xFEBBA70
+ 10: Jc02o $0xFEBBA70
+
+
+
+. 2625 FEBB8F0 12
+. 80 03 00 00 70 09 20 00 40 82 01 78
+==== BB 2626 (0xFEBBA70) approx BBs exec'd 0 ====
+
+ 0xFEBBA70: 4800F3E1 bl 0xFECAE50
+ 0: MOVL $0xFEBBA74, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFECAE50 ($4)
+
+
+
+. 2626 FEBBA70 4
+. 48 00 F3 E1
+==== BB 2627 _IO_un_link_internal(0xFECAE50) approx BBs exec'd 0 ====
+
+ 0xFECAE50: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFECAE54: 9421FFC0 stwu r1,-64(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFC0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECAE58: 7D800026 mfcr r12
+ 9: GETL CR, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0xFECAE5C: 480DCFF5 bl 0xFFA7E50
+ 12: MOVL $0xFECAE60, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2627 FECAE50 16
+. 7C 88 02 A6 94 21 FF C0 7D 80 00 26 48 0D CF F5
+==== BB 2628 (0xFECAE60) approx BBs exec'd 0 ====
+
+ 0xFECAE60: 93C10038 stw r30,56(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x38, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECAE64: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFECAE68: 90810044 stw r4,68(r1)
+ 8: GETL R4, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x44, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFECAE6C: 80030000 lwz r0,0(r3)
+ 13: GETL R3, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R0
+ 16: INCEIPL $4
+
+ 0xFECAE70: 93E1003C stw r31,60(r1)
+ 17: GETL R31, t14
+ 18: GETL R1, t16
+ 19: ADDL $0x3C, t16
+ 20: STL t14, (t16)
+ 21: INCEIPL $4
+
+ 0xFECAE74: 7C7F1B78 or r31,r3,r3
+ 22: GETL R3, t18
+ 23: PUTL t18, R31
+ 24: INCEIPL $4
+
+ 0xFECAE78: 70090080 andi. r9,r0,0x80
+ 25: GETL R0, t20
+ 26: ANDL $0x80, t20
+ 27: PUTL t20, R9
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x0, CR
+ 30: INCEIPL $4
+
+ 0xFECAE7C: 93410028 stw r26,40(r1)
+ 31: GETL R26, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x28, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFECAE80: 9361002C stw r27,44(r1)
+ 36: GETL R27, t28
+ 37: GETL R1, t30
+ 38: ADDL $0x2C, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0xFECAE84: 93810030 stw r28,48(r1)
+ 41: GETL R28, t32
+ 42: GETL R1, t34
+ 43: ADDL $0x30, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0xFECAE88: 93A10034 stw r29,52(r1)
+ 46: GETL R29, t36
+ 47: GETL R1, t38
+ 48: ADDL $0x34, t38
+ 49: STL t36, (t38)
+ 50: INCEIPL $4
+
+ 0xFECAE8C: 91810024 stw r12,36(r1)
+ 51: GETL R12, t40
+ 52: GETL R1, t42
+ 53: ADDL $0x24, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0xFECAE90: 4182016C bc 12,2,0xFECAFFC
+ 56: Js02o $0xFECAFFC
+
+
+
+. 2628 FECAE60 52
+. 93 C1 00 38 7F C8 02 A6 90 81 00 44 80 03 00 00 93 E1 00 3C 7C 7F 1B 78 70 09 00 80 93 41 00 28 93 61 00 2C 93 81 00 30 93 A1 00 34 91 81 00 24 41 82 01 6C
+==== BB 2629 (0xFECAE94) approx BBs exec'd 0 ====
+
+ 0xFECAE94: 835E1B48 lwz r26,6984(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1B48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFECAE98: 813A00B8 lwz r9,184(r26)
+ 5: GETL R26, t4
+ 6: ADDL $0xB8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFECAE9C: 3169FFFF addic r11,r9,-1
+ 10: GETL R9, t8
+ 11: ADCL $0xFFFFFFFF, t8 (-wCa)
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0xFECAEA0: 7C0B4910 subfe r0,r11,r9
+ 14: GETL R11, t10
+ 15: GETL R9, t12
+ 16: SBBL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R0
+ 18: INCEIPL $4
+
+ 0xFECAEA4: 2E000000 cmpi cr4,r0,0
+ 19: GETL R0, t14
+ 20: CMP0L t14, t16 (-rSo)
+ 21: ICRFL t16, $0x4, CR
+ 22: INCEIPL $4
+
+ 0xFECAEA8: 409201C8 bc 4,18,0xFECB070
+ 23: Jc18o $0xFECB070
+
+
+
+. 2629 FECAE94 24
+. 83 5E 1B 48 81 3A 00 B8 31 69 FF FF 7C 0B 49 10 2E 00 00 00 40 92 01 C8
+==== BB 2630 (0xFECAEAC) approx BBs exec'd 0 ====
+
+ 0xFECAEAC: 80DE05E4 lwz r6,1508(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5E4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFECAEB0: 90010014 stw r0,20(r1)
+ 5: GETL R0, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x14, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECAEB4: 90C10010 stw r6,16(r1)
+ 10: GETL R6, t8
+ 11: GETL R1, t10
+ 12: ADDL $0x10, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFECAEB8: 83BE05E0 lwz r29,1504(r30)
+ 15: GETL R30, t12
+ 16: ADDL $0x5E0, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R29
+ 19: INCEIPL $4
+
+ 0xFECAEBC: 3B828BA0 addi r28,r2,-29792
+ 20: GETL R2, t16
+ 21: ADDL $0xFFFF8BA0, t16
+ 22: PUTL t16, R28
+ 23: INCEIPL $4
+
+ 0xFECAEC0: 80FD0008 lwz r7,8(r29)
+ 24: GETL R29, t18
+ 25: ADDL $0x8, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R7
+ 28: INCEIPL $4
+
+ 0xFECAEC4: 7F87E000 cmp cr7,r7,r28
+ 29: GETL R7, t22
+ 30: GETL R28, t24
+ 31: CMPL t22, t24, t26 (-rSo)
+ 32: ICRFL t26, $0x7, CR
+ 33: INCEIPL $4
+
+ 0xFECAEC8: 419E0030 bc 12,30,0xFECAEF8
+ 34: Js30o $0xFECAEF8
+
+
+
+. 2630 FECAEAC 32
+. 80 DE 05 E4 90 01 00 14 90 C1 00 10 83 BE 05 E0 3B 82 8B A0 80 FD 00 08 7F 87 E0 00 41 9E 00 30
+==== BB 2631 (0xFECAECC) approx BBs exec'd 0 ====
+
+ 0xFECAECC: 39400000 li r10,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFECAED0: 3B600001 li r27,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R27
+ 5: INCEIPL $4
+
+ 0xFECAED4: 7D00E828 lwarx r8,r0,r29
+ 6: GETL R29, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R8
+ 10: INCEIPL $4
+
+ 0xFECAED8: 7C085000 cmp cr0,r8,r10
+ 11: GETL R8, t8
+ 12: GETL R10, t10
+ 13: CMPL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFECAEDC: 4082000C bc 4,2,0xFECAEE8
+ 16: Jc02o $0xFECAEE8
+
+
+
+. 2631 FECAECC 20
+. 39 40 00 00 3B 60 00 01 7D 00 E8 28 7C 08 50 00 40 82 00 0C
+==== BB 2632 (0xFECAEE0) approx BBs exec'd 0 ====
+
+ 0xFECAEE0: 7F60E92D stwcx. r27,r0,r29
+ 0: GETL R29, t0
+ 1: GETL R27, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECAEE4: 40A2FFF0 bc 5,2,0xFECAED4
+ 6: Jc02o $0xFECAED4
+
+
+
+. 2632 FECAEE0 8
+. 7F 60 E9 2D 40 A2 FF F0
+==== BB 2633 (0xFECAED4) approx BBs exec'd 0 ====
+
+ 0xFECAED4: 7D00E828 lwarx r8,r0,r29
+ 0: GETL R29, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFECAED8: 7C085000 cmp cr0,r8,r10
+ 5: GETL R8, t4
+ 6: GETL R10, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECAEDC: 4082000C bc 4,2,0xFECAEE8
+ 10: Jc02o $0xFECAEE8
+
+
+
+. 2633 FECAED4 12
+. 7D 00 E8 28 7C 08 50 00 40 82 00 0C
+==== BB 2634 (0xFECAEE8) approx BBs exec'd 0 ====
+
+ 0xFECAEE8: 4C00012C 0: INCEIPL $4
+
+ 0xFECAEEC: 2C880000 cmpi cr1,r8,0
+ 1: GETL R8, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFECAEF0: 408601EC bc 4,6,0xFECB0DC
+ 5: Jc06o $0xFECB0DC
+
+
+
+. 2634 FECAEE8 12
+. 4C 00 01 2C 2C 88 00 00 40 86 01 EC
+==== BB 2635 (0xFECAEF4) approx BBs exec'd 0 ====
+
+ 0xFECAEF4: 939D0008 stw r28,8(r29)
+ 0: GETL R28, t0
+ 1: GETL R29, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECAEF8: 819D0004 lwz r12,4(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0xFECAEFC: 837E05E8 lwz r27,1512(r30)
+ 10: GETL R30, t8
+ 11: ADDL $0x5E8, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R27
+ 14: INCEIPL $4
+
+ 0xFECAF00: 380C0001 addi r0,r12,1
+ 15: GETL R12, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R0
+ 18: INCEIPL $4
+
+ 0xFECAF04: 901D0004 stw r0,4(r29)
+ 19: GETL R0, t14
+ 20: GETL R29, t16
+ 21: ADDL $0x4, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFECAF08: 839F0000 lwz r28,0(r31)
+ 24: GETL R31, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R28
+ 27: INCEIPL $4
+
+ 0xFECAF0C: 93FB0000 stw r31,0(r27)
+ 28: GETL R31, t22
+ 29: GETL R27, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0xFECAF10: 73898000 andi. r9,r28,0x8000
+ 32: GETL R28, t26
+ 33: ANDL $0x8000, t26
+ 34: PUTL t26, R9
+ 35: CMP0L t26, t28 (-rSo)
+ 36: ICRFL t28, $0x0, CR
+ 37: INCEIPL $4
+
+ 0xFECAF14: 40820054 bc 4,2,0xFECAF68
+ 38: Jc02o $0xFECAF68
+
+
+
+. 2635 FECAEF4 36
+. 93 9D 00 08 81 9D 00 04 83 7E 05 E8 38 0C 00 01 90 1D 00 04 83 9F 00 00 93 FB 00 00 73 89 80 00 40 82 00 54
+==== BB 2636 (0xFECAF68) approx BBs exec'd 0 ====
+
+ 0xFECAF68: 815E1BEC lwz r10,7148(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BEC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFECAF6C: 812A0000 lwz r9,0(r10)
+ 5: GETL R10, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0xFECAF70: 2F890000 cmpi cr7,r9,0
+ 9: GETL R9, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFECAF74: 419E0020 bc 12,30,0xFECAF94
+ 13: Js30o $0xFECAF94
+
+
+
+. 2636 FECAF68 16
+. 81 5E 1B EC 81 2A 00 00 2F 89 00 00 41 9E 00 20
+==== BB 2637 (0xFECAF78) approx BBs exec'd 0 ====
+
+ 0xFECAF78: 7C89F800 cmp cr1,r9,r31
+ 0: GETL R9, t0
+ 1: GETL R31, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFECAF7C: 41860144 bc 12,6,0xFECB0C0
+ 5: Js06o $0xFECB0C0
+
+
+
+. 2637 FECAF78 8
+. 7C 89 F8 00 41 86 01 44
+==== BB 2638 (0xFECB0C0) approx BBs exec'd 0 ====
+
+ 0xFECB0C0: 817E05EC lwz r11,1516(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5EC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFECB0C4: 80BF0034 lwz r5,52(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x34, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFECB0C8: 806B0000 lwz r3,0(r11)
+ 10: GETL R11, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R3
+ 13: INCEIPL $4
+
+ 0xFECB0CC: 90AA0000 stw r5,0(r10)
+ 14: GETL R5, t12
+ 15: GETL R10, t14
+ 16: STL t12, (t14)
+ 17: INCEIPL $4
+
+ 0xFECB0D0: 39230001 addi r9,r3,1
+ 18: GETL R3, t16
+ 19: ADDL $0x1, t16
+ 20: PUTL t16, R9
+ 21: INCEIPL $4
+
+ 0xFECB0D4: 912B0000 stw r9,0(r11)
+ 22: GETL R9, t18
+ 23: GETL R11, t20
+ 24: STL t18, (t20)
+ 25: INCEIPL $4
+
+ 0xFECB0D8: 4BFFFEBC b 0xFECAF94
+ 26: JMPo $0xFECAF94 ($4)
+
+
+
+. 2638 FECB0C0 28
+. 81 7E 05 EC 80 BF 00 34 80 6B 00 00 90 AA 00 00 39 23 00 01 91 2B 00 00 4B FF FE BC
+==== BB 2639 (0xFECAF94) approx BBs exec'd 0 ====
+
+ 0xFECAF94: 815F0000 lwz r10,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFECAF98: 5548066E rlwinm r8,r10,0,25,23
+ 4: GETL R10, t4
+ 5: ANDL $0xFFFFFF7F, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0xFECAF9C: 71098000 andi. r9,r8,0x8000
+ 8: GETL R8, t6
+ 9: ANDL $0x8000, t6
+ 10: PUTL t6, R9
+ 11: CMP0L t6, t8 (-rSo)
+ 12: ICRFL t8, $0x0, CR
+ 13: INCEIPL $4
+
+ 0xFECAFA0: 911F0000 stw r8,0(r31)
+ 14: GETL R8, t10
+ 15: GETL R31, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFECAFA4: 4082001C bc 4,2,0xFECAFC0
+ 18: Jc02o $0xFECAFC0
+
+
+
+. 2639 FECAF94 20
+. 81 5F 00 00 55 48 06 6E 71 09 80 00 91 1F 00 00 40 82 00 1C
+==== BB 2640 (0xFECAFC0) approx BBs exec'd 0 ====
+
+ 0xFECAFC0: 819D0004 lwz r12,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFECAFC4: 38000000 li r0,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFECAFC8: 901B0000 stw r0,0(r27)
+ 8: GETL R0, t6
+ 9: GETL R27, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFECAFCC: 392CFFFF addi r9,r12,-1
+ 12: GETL R12, t10
+ 13: ADDL $0xFFFFFFFF, t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0xFECAFD0: 2C890000 cmpi cr1,r9,0
+ 16: GETL R9, t12
+ 17: CMP0L t12, t14 (-rSo)
+ 18: ICRFL t14, $0x1, CR
+ 19: INCEIPL $4
+
+ 0xFECAFD4: 913D0004 stw r9,4(r29)
+ 20: GETL R9, t16
+ 21: GETL R29, t18
+ 22: ADDL $0x4, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0xFECAFD8: 40860020 bc 4,6,0xFECAFF8
+ 25: Jc06o $0xFECAFF8
+
+
+
+. 2640 FECAFC0 28
+. 81 9D 00 04 38 00 00 00 90 1B 00 00 39 2C FF FF 2C 89 00 00 91 3D 00 04 40 86 00 20
+==== BB 2641 (0xFECAFDC) approx BBs exec'd 0 ====
+
+ 0xFECAFDC: 913D0008 stw r9,8(r29)
+ 0: GETL R9, t0
+ 1: GETL R29, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECAFE0: 7C0004AC sync
+ 5: INCEIPL $4
+
+ 0xFECAFE4: 7F60E828 lwarx r27,r0,r29
+ 6: GETL R29, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R27
+ 10: INCEIPL $4
+
+ 0xFECAFE8: 7D20E92D stwcx. r9,r0,r29
+ 11: GETL R29, t8
+ 12: GETL R9, t10
+ 13: LOCKo
+ 14: STL t10, (t8) (-rSo)
+ 15: ICRFL cr, $0x0, CR
+ 16: INCEIPL $4
+
+ 0xFECAFEC: 40A2FFF8 bc 5,2,0xFECAFE4
+ 17: Jc02o $0xFECAFE4
+
+
+
+. 2641 FECAFDC 20
+. 91 3D 00 08 7C 00 04 AC 7F 60 E8 28 7D 20 E9 2D 40 A2 FF F8
+==== BB 2642 (0xFECAFF0) approx BBs exec'd 0 ====
+
+ 0xFECAFF0: 2C1B0001 cmpi cr0,r27,1
+ 0: GETL R27, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFECAFF4: 418100F4 bc 12,1,0xFECB0E8
+ 5: Js01o $0xFECB0E8
+
+
+
+. 2642 FECAFF0 8
+. 2C 1B 00 01 41 81 00 F4
+==== BB 2643 (0xFECAFF8) approx BBs exec'd 0 ====
+
+ 0xFECAFF8: 40920034 bc 4,18,0xFECB02C
+ 0: Jc18o $0xFECB02C
+
+
+
+. 2643 FECAFF8 4
+. 40 92 00 34
+==== BB 2644 (0xFECAFFC) approx BBs exec'd 0 ====
+
+ 0xFECAFFC: 83A10044 lwz r29,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFECB000: 80810024 lwz r4,36(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x24, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFECB004: 7FA803A6 mtlr r29
+ 10: GETL R29, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFECB008: 83410028 lwz r26,40(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x28, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R26
+ 17: INCEIPL $4
+
+ 0xFECB00C: 8361002C lwz r27,44(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x2C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R27
+ 22: INCEIPL $4
+
+ 0xFECB010: 7C808120 mtcrf 0x8,r4
+ 23: GETL R4, t18
+ 24: ICRFL t18, $0x4, CR
+ 25: INCEIPL $4
+
+ 0xFECB014: 83810030 lwz r28,48(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x30, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R28
+ 30: INCEIPL $4
+
+ 0xFECB018: 83A10034 lwz r29,52(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x34, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R29
+ 35: INCEIPL $4
+
+ 0xFECB01C: 83C10038 lwz r30,56(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x38, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R30
+ 40: INCEIPL $4
+
+ 0xFECB020: 83E1003C lwz r31,60(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x3C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R31
+ 45: INCEIPL $4
+
+ 0xFECB024: 38210040 addi r1,r1,64
+ 46: GETL R1, t36
+ 47: ADDL $0x40, t36
+ 48: PUTL t36, R1
+ 49: INCEIPL $4
+
+ 0xFECB028: 4E800020 blr
+ 50: GETL LR, t38
+ 51: JMPo-r t38 ($4)
+
+
+
+. 2644 FECAFFC 48
+. 83 A1 00 44 80 81 00 24 7F A8 03 A6 83 41 00 28 83 61 00 2C 7C 80 81 20 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+==== BB 2645 (0xFEBBA74) approx BBs exec'd 0 ====
+
+ 0xFEBBA74: 801D0000 lwz r0,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEBBA78: 4BFFFE84 b 0xFEBB8FC
+ 4: JMPo $0xFEBB8FC ($4)
+
+
+
+. 2645 FEBBA74 8
+. 80 1D 00 00 4B FF FE 84
+==== BB 2646 (0xFEBB8FC) approx BBs exec'd 0 ====
+
+ 0xFEBB8FC: 70098000 andi. r9,r0,0x8000
+ 0: GETL R0, t0
+ 1: ANDL $0x8000, t0
+ 2: PUTL t0, R9
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEBB900: 40820054 bc 4,2,0xFEBB954
+ 6: Jc02o $0xFEBB954
+
+
+
+. 2646 FEBB8FC 8
+. 70 09 80 00 40 82 00 54
+==== BB 2647 (0xFEBB954) approx BBs exec'd 0 ====
+
+ 0xFEBB954: 540ADFFE rlwinm r10,r0,27,31,31
+ 0: GETL R0, t0
+ 1: ROLL $0x1B, t0
+ 2: ANDL $0x1, t0
+ 3: PUTL t0, R10
+ 4: INCEIPL $4
+
+ 0xFEBB958: 70092000 andi. r9,r0,0x2000
+ 5: GETL R0, t2
+ 6: ANDL $0x2000, t2
+ 7: PUTL t2, R9
+ 8: CMP0L t2, t4 (-rSo)
+ 9: ICRFL t4, $0x0, CR
+ 10: INCEIPL $4
+
+ 0xFEBB95C: 2F8A0000 cmpi cr7,r10,0
+ 11: GETL R10, t6
+ 12: CMP0L t6, t8 (-rSo)
+ 13: ICRFL t8, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFEBB960: 7C600026 mfcr r3
+ 15: GETL CR, t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0xFEBB964: 5463FFFE rlwinm r3,r3,31,31,31
+ 18: GETL R3, t12
+ 19: ROLL $0x1F, t12
+ 20: ANDL $0x1, t12
+ 21: PUTL t12, R3
+ 22: INCEIPL $4
+
+ 0xFEBB968: 3B43FFFF addi r26,r3,-1
+ 23: GETL R3, t14
+ 24: ADDL $0xFFFFFFFF, t14
+ 25: PUTL t14, R26
+ 26: INCEIPL $4
+
+ 0xFEBB96C: 4082013C bc 4,2,0xFEBBAA8
+ 27: Jc02o $0xFEBBAA8
+
+
+
+. 2647 FEBB954 28
+. 54 0A DF FE 70 09 20 00 2F 8A 00 00 7C 60 00 26 54 63 FF FE 3B 43 FF FF 40 82 01 3C
+==== BB 2648 (0xFEBBAA8) approx BBs exec'd 0 ====
+
+ 0xFEBBAA8: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEBBAAC: 4800C7E5 bl 0xFEC8290
+ 3: MOVL $0xFEBBAB0, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFEC8290 ($4)
+
+
+
+. 2648 FEBBAA8 8
+. 7F A3 EB 78 48 00 C7 E5
+==== BB 2649 _IO_file_close_it@@GLIBC_2.1(0xFEC8290) approx BBs exec'd 0 ====
+
+ 0xFEC8290: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFEC8294: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEC8298: 93E1001C stw r31,28(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEC829C: 3920FFFF li r9,-1
+ 14: MOVL $0xFFFFFFFF, t10
+ 15: PUTL t10, R9
+ 16: INCEIPL $4
+
+ 0xFEC82A0: 93810010 stw r28,16(r1)
+ 17: GETL R28, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFEC82A4: 7C7F1B78 or r31,r3,r3
+ 22: GETL R3, t16
+ 23: PUTL t16, R31
+ 24: INCEIPL $4
+
+ 0xFEC82A8: 90810024 stw r4,36(r1)
+ 25: GETL R4, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x24, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFEC82AC: 80030038 lwz r0,56(r3)
+ 30: GETL R3, t22
+ 31: ADDL $0x38, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFEC82B0: 93A10014 stw r29,20(r1)
+ 35: GETL R29, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x14, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFEC82B4: 2F80FFFF cmpi cr7,r0,-1
+ 40: GETL R0, t30
+ 41: MOVL $0xFFFFFFFF, t34
+ 42: CMPL t30, t34, t32 (-rSo)
+ 43: ICRFL t32, $0x7, CR
+ 44: INCEIPL $4
+
+ 0xFEC82B8: 93C10018 stw r30,24(r1)
+ 45: GETL R30, t36
+ 46: GETL R1, t38
+ 47: ADDL $0x18, t38
+ 48: STL t36, (t38)
+ 49: INCEIPL $4
+
+ 0xFEC82BC: 419E00D0 bc 12,30,0xFEC838C
+ 50: Js30o $0xFEC838C
+
+
+
+. 2649 FEC8290 48
+. 7C 88 02 A6 94 21 FF E0 93 E1 00 1C 39 20 FF FF 93 81 00 10 7C 7F 1B 78 90 81 00 24 80 03 00 38 93 A1 00 14 2F 80 FF FF 93 C1 00 18 41 9E 00 D0
+==== BB 2650 (0xFEC82C0) approx BBs exec'd 0 ====
+
+ 0xFEC82C0: 80030000 lwz r0,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEC82C4: 70090008 andi. r9,r0,0x8
+ 4: GETL R0, t4
+ 5: ANDL $0x8, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEC82C8: 418200E8 bc 12,2,0xFEC83B0
+ 10: Js02o $0xFEC83B0
+
+
+
+. 2650 FEC82C0 12
+. 80 03 00 00 70 09 00 08 41 82 00 E8
+==== BB 2651 (0xFEC82CC) approx BBs exec'd 0 ====
+
+ 0xFEC82CC: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC82D0: 3B800000 li r28,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R28
+ 5: INCEIPL $4
+
+ 0xFEC82D4: 48004B15 bl 0xFECCDE8
+ 6: MOVL $0xFEC82D8, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFECCDE8 ($4)
+
+
+
+. 2651 FEC82CC 12
+. 7F E3 FB 78 3B 80 00 00 48 00 4B 15
+==== BB 2652 _IO_unsave_markers_internal(0xFECCDE8) approx BBs exec'd 0 ====
+
+ 0xFECCDE8: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFECCDEC: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECCDF0: 7C691B78 or r9,r3,r3
+ 9: GETL R3, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0xFECCDF4: 90810014 stw r4,20(r1)
+ 12: GETL R4, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x14, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFECCDF8: 80030030 lwz r0,48(r3)
+ 17: GETL R3, t12
+ 18: ADDL $0x30, t12
+ 19: LDL (t12), t14
+ 20: PUTL t14, R0
+ 21: INCEIPL $4
+
+ 0xFECCDFC: 2F800000 cmpi cr7,r0,0
+ 22: GETL R0, t16
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x7, CR
+ 25: INCEIPL $4
+
+ 0xFECCE00: 419E000C bc 12,30,0xFECCE0C
+ 26: Js30o $0xFECCE0C
+
+
+
+. 2652 FECCDE8 28
+. 7C 88 02 A6 94 21 FF F0 7C 69 1B 78 90 81 00 14 80 03 00 30 2F 80 00 00 41 9E 00 0C
+==== BB 2653 (0xFECCE0C) approx BBs exec'd 0 ====
+
+ 0xFECCE0C: 80C90024 lwz r6,36(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFECCE10: 2C060000 cmpi cr0,r6,0
+ 5: GETL R6, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFECCE14: 40820014 bc 4,2,0xFECCE28
+ 9: Jc02o $0xFECCE28
+
+
+
+. 2653 FECCE0C 12
+. 80 C9 00 24 2C 06 00 00 40 82 00 14
+==== BB 2654 (0xFECCE18) approx BBs exec'd 0 ====
+
+ 0xFECCE18: 80610014 lwz r3,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECCE1C: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFECCE20: 7C6803A6 mtlr r3
+ 9: GETL R3, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFECCE24: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 2654 FECCE18 16
+. 80 61 00 14 38 21 00 10 7C 68 03 A6 4E 80 00 20
+==== BB 2655 (0xFEC82D8) approx BBs exec'd 0 ====
+
+ 0xFEC82D8: 881F0046 lbz r0,70(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEC82DC: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEC82E0: 7C1D0774 extsb r29,r0
+ 8: GETB R0, t6
+ 9: WIDENL_Bs _st6
+ 10: PUTL t6, R29
+ 11: INCEIPL $4
+
+ 0xFEC82E4: 7D9DFA14 add r12,r29,r31
+ 12: GETL R29, t8
+ 13: GETL R31, t10
+ 14: ADDL t8, t10
+ 15: PUTL t10, R12
+ 16: INCEIPL $4
+
+ 0xFEC82E8: 814C0098 lwz r10,152(r12)
+ 17: GETL R12, t12
+ 18: ADDL $0x98, t12
+ 19: LDL (t12), t14
+ 20: PUTL t14, R10
+ 21: INCEIPL $4
+
+ 0xFEC82EC: 816A0044 lwz r11,68(r10)
+ 22: GETL R10, t16
+ 23: ADDL $0x44, t16
+ 24: LDL (t16), t18
+ 25: PUTL t18, R11
+ 26: INCEIPL $4
+
+ 0xFEC82F0: 7D6903A6 mtctr r11
+ 27: GETL R11, t20
+ 28: PUTL t20, CTR
+ 29: INCEIPL $4
+
+ 0xFEC82F4: 4E800421 bctrl
+ 30: MOVL $0xFEC82F8, t22
+ 31: PUTL t22, LR
+ 32: GETL CTR, t24
+ 33: JMPo-c t24 ($4)
+
+
+
+. 2655 FEC82D8 32
+. 88 1F 00 46 7F E3 FB 78 7C 1D 07 74 7D 9D FA 14 81 4C 00 98 81 6A 00 44 7D 69 03 A6 4E 80 04 21
+==== BB 2656 _IO_file_close_internal(0xFECA560) approx BBs exec'd 0 ====
+
+ 0xFECA560: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFECA564: 80630038 lwz r3,56(r3)
+ 6: GETL R3, t4
+ 7: ADDL $0x38, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFECA568: 38210010 addi r1,r1,16
+ 11: GETL R1, t8
+ 12: ADDL $0x10, t8
+ 13: PUTL t8, R1
+ 14: INCEIPL $4
+
+ 0xFECA56C: 48057980 b 0xFF21EEC
+ 15: JMPo $0xFF21EEC ($4)
+
+
+
+. 2656 FECA560 16
+. 94 21 FF F0 80 63 00 38 38 21 00 10 48 05 79 80
+==== BB 2657 __close_nocancel(0xFF21EEC) approx BBs exec'd 0 ====
+
+ 0xFF21EEC: 38000006 li r0,6
+ 0: MOVL $0x6, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFF21EF0: 44000002 sc
+ 3: JMPo-sys $0xFF21EF4 ($4)
+
+
+
+. 2657 FF21EEC 8
+. 38 00 00 06 44 00 00 02
+==== BB 2658 (0xFF21EF4) approx BBs exec'd 0 ====
+
+ 0xFF21EF4: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 2658 FF21EF4 4
+. 4C A3 00 20
+==== BB 2659 (0xFEC82F8) approx BBs exec'd 0 ====
+
+ 0xFEC82F8: 7C7D1B78 or r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFEC82FC: 807F0060 lwz r3,96(r31)
+ 3: GETL R31, t2
+ 4: ADDL $0x60, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEC8300: 2F030000 cmpi cr6,r3,0
+ 8: GETL R3, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFEC8304: 40990114 bc 4,25,0xFEC8418
+ 12: Jc25o $0xFEC8418
+
+
+
+. 2659 FEC82F8 16
+. 7C 7D 1B 78 80 7F 00 60 2F 03 00 00 40 99 01 14
+==== BB 2660 (0xFEC8418) approx BBs exec'd 0 ====
+
+ 0xFEC8418: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFEC841C: 7FE3FB78 or r3,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFEC8420: 38A00000 li r5,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFEC8424: 38C00000 li r6,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0xFEC8428: 48003755 bl 0xFECBB7C
+ 12: MOVL $0xFEC842C, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0xFECBB7C ($4)
+
+
+
+. 2660 FEC8418 20
+. 38 80 00 00 7F E3 FB 78 38 A0 00 00 38 C0 00 00 48 00 37 55
+==== BB 2661 (0xFECBBB8) approx BBs exec'd 0 ====
+
+ 0xFECBBB8: 80030000 lwz r0,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFECBBBC: 7D234B78 or r3,r9,r9
+ 4: GETL R9, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFECBBC0: 700B0001 andi. r11,r0,0x1
+ 7: GETL R0, t6
+ 8: ANDL $0x1, t6
+ 9: PUTL t6, R11
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFECBBC4: 40A2001C bc 5,2,0xFECBBE0
+ 13: Jc02o $0xFECBBE0
+
+
+
+. 2661 FECBBB8 16
+. 80 03 00 00 7D 23 4B 78 70 0B 00 01 40 A2 00 1C
+==== BB 2662 (0xFECBBC8) approx BBs exec'd 0 ====
+
+ 0xFECBBC8: 80DF0020 lwz r6,32(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFECBBCC: 7CA93050 subf r5,r9,r6
+ 5: GETL R9, t4
+ 6: GETL R6, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFECBBD0: 38850FFF addi r4,r5,4095
+ 10: GETL R5, t8
+ 11: ADDL $0xFFF, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0xFECBBD4: 54840026 rlwinm r4,r4,0,0,19
+ 14: GETL R4, t10
+ 15: ANDL $0xFFFFF000, t10
+ 16: PUTL t10, R4
+ 17: INCEIPL $4
+
+ 0xFECBBD8: 480626A5 bl 0xFF2E27C
+ 18: MOVL $0xFECBBDC, t12
+ 19: PUTL t12, LR
+ 20: JMPo-c $0xFF2E27C ($4)
+
+
+
+. 2662 FECBBC8 20
+. 80 DF 00 20 7C A9 30 50 38 85 0F FF 54 84 00 26 48 06 26 A5
+==== BB 2663 munmap(0xFF2E27C) approx BBs exec'd 0 ====
+
+ 0xFF2E27C: 3800005B li r0,91
+ 0: MOVL $0x5B, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFF2E280: 44000002 sc
+ 3: JMPo-sys $0xFF2E284 ($4)
+
+
+
+. 2663 FF2E27C 8
+. 38 00 00 5B 44 00 00 02
+==== BB 2664 (0xFF2E284) approx BBs exec'd 0 ====
+
+ 0xFF2E284: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 2664 FF2E284 4
+. 4C A3 00 20
+==== BB 2665 (0xFECBC20) approx BBs exec'd 0 ====
+
+ 0xFECBC20: 80610024 lwz r3,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECBC24: 901F0000 stw r0,0(r31)
+ 5: GETL R0, t4
+ 6: GETL R31, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFECBC28: 8361000C lwz r27,12(r1)
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R27
+ 13: INCEIPL $4
+
+ 0xFECBC2C: 7C6803A6 mtlr r3
+ 14: GETL R3, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0xFECBC30: 83810010 lwz r28,16(r1)
+ 17: GETL R1, t14
+ 18: ADDL $0x10, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R28
+ 21: INCEIPL $4
+
+ 0xFECBC34: 83A10014 lwz r29,20(r1)
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R29
+ 26: INCEIPL $4
+
+ 0xFECBC38: 83C10018 lwz r30,24(r1)
+ 27: GETL R1, t22
+ 28: ADDL $0x18, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R30
+ 31: INCEIPL $4
+
+ 0xFECBC3C: 83E1001C lwz r31,28(r1)
+ 32: GETL R1, t26
+ 33: ADDL $0x1C, t26
+ 34: LDL (t26), t28
+ 35: PUTL t28, R31
+ 36: INCEIPL $4
+
+ 0xFECBC40: 38210020 addi r1,r1,32
+ 37: GETL R1, t30
+ 38: ADDL $0x20, t30
+ 39: PUTL t30, R1
+ 40: INCEIPL $4
+
+ 0xFECBC44: 4E800020 blr
+ 41: GETL LR, t32
+ 42: JMPo-r t32 ($4)
+
+
+
+. 2665 FECBC20 40
+. 80 61 00 24 90 1F 00 00 83 61 00 0C 7C 68 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2666 (0xFEC842C) approx BBs exec'd 0 ====
+
+ 0xFEC842C: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFEC8430: 909F0018 stw r4,24(r31)
+ 3: GETL R4, t2
+ 4: GETL R31, t4
+ 5: ADDL $0x18, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFEC8434: 909F000C stw r4,12(r31)
+ 8: GETL R4, t6
+ 9: GETL R31, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEC8438: 909F0004 stw r4,4(r31)
+ 13: GETL R4, t10
+ 14: GETL R31, t12
+ 15: ADDL $0x4, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEC843C: 909F0008 stw r4,8(r31)
+ 18: GETL R4, t14
+ 19: GETL R31, t16
+ 20: ADDL $0x8, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFEC8440: 909F0014 stw r4,20(r31)
+ 23: GETL R4, t18
+ 24: GETL R31, t20
+ 25: ADDL $0x14, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0xFEC8444: 909F0010 stw r4,16(r31)
+ 28: GETL R4, t22
+ 29: GETL R31, t24
+ 30: ADDL $0x10, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0xFEC8448: 4BFFFF04 b 0xFEC834C
+ 33: JMPo $0xFEC834C ($4)
+
+
+
+. 2666 FEC842C 32
+. 38 80 00 00 90 9F 00 18 90 9F 00 0C 90 9F 00 04 90 9F 00 08 90 9F 00 14 90 9F 00 10 4B FF FF 04
+==== BB 2667 (0xFEC834C) approx BBs exec'd 0 ====
+
+ 0xFEC834C: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC8350: 48002B01 bl 0xFECAE50
+ 3: MOVL $0xFEC8354, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFECAE50 ($4)
+
+
+
+. 2667 FEC834C 8
+. 7F E3 FB 78 48 00 2B 01
+==== BB 2668 (0xFEC8354) approx BBs exec'd 0 ====
+
+ 0xFEC8354: 2C1D0000 cmpi cr0,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEC8358: 7FA3EB78 or r3,r29,r29
+ 4: GETL R29, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFEC835C: 3FA0FBAD lis r29,-1107
+ 7: MOVL $0xFBAD0000, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0xFEC8360: 63AB240C ori r11,r29,0x240C
+ 10: MOVL $0xFBAD240C, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0xFEC8364: 3980FFFF li r12,-1
+ 13: MOVL $0xFFFFFFFF, t10
+ 14: PUTL t10, R12
+ 15: INCEIPL $4
+
+ 0xFEC8368: 3940FFFF li r10,-1
+ 16: MOVL $0xFFFFFFFF, t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0xFEC836C: 3920FFFF li r9,-1
+ 19: MOVL $0xFFFFFFFF, t14
+ 20: PUTL t14, R9
+ 21: INCEIPL $4
+
+ 0xFEC8370: 919F0050 stw r12,80(r31)
+ 22: GETL R12, t16
+ 23: GETL R31, t18
+ 24: ADDL $0x50, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0xFEC8374: 915F0054 stw r10,84(r31)
+ 27: GETL R10, t20
+ 28: GETL R31, t22
+ 29: ADDL $0x54, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFEC8378: 917F0000 stw r11,0(r31)
+ 32: GETL R11, t24
+ 33: GETL R31, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFEC837C: 913F0038 stw r9,56(r31)
+ 36: GETL R9, t28
+ 37: GETL R31, t30
+ 38: ADDL $0x38, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0xFEC8380: 40820008 bc 4,2,0xFEC8388
+ 41: Jc02o $0xFEC8388
+
+
+
+. 2668 FEC8354 48
+. 2C 1D 00 00 7F A3 EB 78 3F A0 FB AD 63 AB 24 0C 39 80 FF FF 39 40 FF FF 39 20 FF FF 91 9F 00 50 91 5F 00 54 91 7F 00 00 91 3F 00 38 40 82 00 08
+==== BB 2669 (0xFEC8384) approx BBs exec'd 0 ====
+
+ 0xFEC8384: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC8388: 7C691B78 or r9,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0xFEC838C: 83810024 lwz r28,36(r1)
+ 6: GETL R1, t4
+ 7: ADDL $0x24, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R28
+ 10: INCEIPL $4
+
+ 0xFEC8390: 7D234B78 or r3,r9,r9
+ 11: GETL R9, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0xFEC8394: 83A10014 lwz r29,20(r1)
+ 14: GETL R1, t10
+ 15: ADDL $0x14, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0xFEC8398: 7F8803A6 mtlr r28
+ 19: GETL R28, t14
+ 20: PUTL t14, LR
+ 21: INCEIPL $4
+
+ 0xFEC839C: 83C10018 lwz r30,24(r1)
+ 22: GETL R1, t16
+ 23: ADDL $0x18, t16
+ 24: LDL (t16), t18
+ 25: PUTL t18, R30
+ 26: INCEIPL $4
+
+ 0xFEC83A0: 83810010 lwz r28,16(r1)
+ 27: GETL R1, t20
+ 28: ADDL $0x10, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R28
+ 31: INCEIPL $4
+
+ 0xFEC83A4: 83E1001C lwz r31,28(r1)
+ 32: GETL R1, t24
+ 33: ADDL $0x1C, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R31
+ 36: INCEIPL $4
+
+ 0xFEC83A8: 38210020 addi r1,r1,32
+ 37: GETL R1, t28
+ 38: ADDL $0x20, t28
+ 39: PUTL t28, R1
+ 40: INCEIPL $4
+
+ 0xFEC83AC: 4E800020 blr
+ 41: GETL LR, t30
+ 42: JMPo-r t30 ($4)
+
+
+
+. 2669 FEC8384 44
+. 7F 83 E3 78 7C 69 1B 78 83 81 00 24 7D 23 4B 78 83 A1 00 14 7F 88 03 A6 83 C1 00 18 83 81 00 10 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2670 (0xFEBBAB0) approx BBs exec'd 0 ====
+
+ 0xFEBBAB0: 7C7A1B78 or r26,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R26
+ 2: INCEIPL $4
+
+ 0xFEBBAB4: 4BFFFEBC b 0xFEBB970
+ 3: JMPo $0xFEBB970 ($4)
+
+
+
+. 2670 FEBBAB0 8
+. 7C 7A 1B 78 4B FF FE BC
+==== BB 2671 (0xFEBB970) approx BBs exec'd 0 ====
+
+ 0xFEBB970: 8BFD0046 lbz r31,70(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFEBB974: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEBB978: 38800000 li r4,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0xFEBB97C: 7FFC0774 extsb r28,r31
+ 11: GETB R31, t8
+ 12: WIDENL_Bs _st8
+ 13: PUTL t8, R28
+ 14: INCEIPL $4
+
+ 0xFEBB980: 7F7CEA14 add r27,r28,r29
+ 15: GETL R28, t10
+ 16: GETL R29, t12
+ 17: ADDL t10, t12
+ 18: PUTL t12, R27
+ 19: INCEIPL $4
+
+ 0xFEBB984: 819B0098 lwz r12,152(r27)
+ 20: GETL R27, t14
+ 21: ADDL $0x98, t14
+ 22: LDL (t14), t16
+ 23: PUTL t16, R12
+ 24: INCEIPL $4
+
+ 0xFEBB988: 816C0008 lwz r11,8(r12)
+ 25: GETL R12, t18
+ 26: ADDL $0x8, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R11
+ 29: INCEIPL $4
+
+ 0xFEBB98C: 7D6903A6 mtctr r11
+ 30: GETL R11, t22
+ 31: PUTL t22, CTR
+ 32: INCEIPL $4
+
+ 0xFEBB990: 4E800421 bctrl
+ 33: MOVL $0xFEBB994, t24
+ 34: PUTL t24, LR
+ 35: GETL CTR, t26
+ 36: JMPo-c t26 ($4)
+
+
+
+. 2671 FEBB970 36
+. 8B FD 00 46 7F A3 EB 78 38 80 00 00 7F FC 07 74 7F 7C EA 14 81 9B 00 98 81 6C 00 08 7D 69 03 A6 4E 80 04 21
+==== BB 2672 _IO_file_finish@@GLIBC_2.1(0xFEC8470) approx BBs exec'd 0 ====
+
+ 0xFEC8470: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFEC8474: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEC8478: 93E10008 stw r31,8(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEC847C: 7C7F1B78 or r31,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0xFEC8480: 90810014 stw r4,20(r1)
+ 17: GETL R4, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFEC8484: 80030038 lwz r0,56(r3)
+ 22: GETL R3, t16
+ 23: ADDL $0x38, t16
+ 24: LDL (t16), t18
+ 25: PUTL t18, R0
+ 26: INCEIPL $4
+
+ 0xFEC8488: 2F80FFFF cmpi cr7,r0,-1
+ 27: GETL R0, t20
+ 28: MOVL $0xFFFFFFFF, t24
+ 29: CMPL t20, t24, t22 (-rSo)
+ 30: ICRFL t22, $0x7, CR
+ 31: INCEIPL $4
+
+ 0xFEC848C: 419E0038 bc 12,30,0xFEC84C4
+ 32: Js30o $0xFEC84C4
+
+
+
+. 2672 FEC8470 32
+. 7C 88 02 A6 94 21 FF F0 93 E1 00 08 7C 7F 1B 78 90 81 00 14 80 03 00 38 2F 80 FF FF 41 9E 00 38
+==== BB 2673 (0xFEC84C4) approx BBs exec'd 0 ====
+
+ 0xFEC84C4: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC84C8: 38800000 li r4,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFEC84CC: 48003DC1 bl 0xFECC28C
+ 6: MOVL $0xFEC84D0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFECC28C ($4)
+
+
+
+. 2673 FEC84C4 12
+. 7F E3 FB 78 38 80 00 00 48 00 3D C1
+==== BB 2674 _IO_default_finish_internal(0xFECC28C) approx BBs exec'd 0 ====
+
+ 0xFECC28C: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFECC290: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECC294: 93E1001C stw r31,28(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECC298: 7C7F1B78 or r31,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0xFECC29C: 93A10014 stw r29,20(r1)
+ 17: GETL R29, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFECC2A0: 90010024 stw r0,36(r1)
+ 22: GETL R0, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x24, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0xFECC2A4: 8123001C lwz r9,28(r3)
+ 27: GETL R3, t20
+ 28: ADDL $0x1C, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R9
+ 31: INCEIPL $4
+
+ 0xFECC2A8: 93C10018 stw r30,24(r1)
+ 32: GETL R30, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x18, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xFECC2AC: 2F890000 cmpi cr7,r9,0
+ 37: GETL R9, t28
+ 38: CMP0L t28, t30 (-rSo)
+ 39: ICRFL t30, $0x7, CR
+ 40: INCEIPL $4
+
+ 0xFECC2B0: 419E0010 bc 12,30,0xFECC2C0
+ 41: Js30o $0xFECC2C0
+
+
+
+. 2674 FECC28C 40
+. 7C 08 02 A6 94 21 FF E0 93 E1 00 1C 7C 7F 1B 78 93 A1 00 14 90 01 00 24 81 23 00 1C 93 C1 00 18 2F 89 00 00 41 9E 00 10
+==== BB 2675 (0xFECC2C0) approx BBs exec'd 0 ====
+
+ 0xFECC2C0: 813F0030 lwz r9,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFECC2C4: 2C890000 cmpi cr1,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFECC2C8: 41860018 bc 12,6,0xFECC2E0
+ 9: Js06o $0xFECC2E0
+
+
+
+. 2675 FECC2C0 12
+. 81 3F 00 30 2C 89 00 00 41 86 00 18
+==== BB 2676 (0xFECC2E0) approx BBs exec'd 0 ====
+
+ 0xFECC2E0: 807F0024 lwz r3,36(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECC2E4: 2F830000 cmpi cr7,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFECC2E8: 409E0028 bc 4,30,0xFECC310
+ 9: Jc30o $0xFECC310
+
+
+
+. 2676 FECC2E0 12
+. 80 7F 00 24 2F 83 00 00 40 9E 00 28
+==== BB 2677 (0xFECC2EC) approx BBs exec'd 0 ====
+
+ 0xFECC2EC: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFECC2F0: 4BFFEB61 bl 0xFECAE50
+ 3: MOVL $0xFECC2F4, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFECAE50 ($4)
+
+
+
+. 2677 FECC2EC 8
+. 7F E3 FB 78 4B FF EB 61
+==== BB 2678 (0xFECC2F4) approx BBs exec'd 0 ====
+
+ 0xFECC2F4: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFECC2F8: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0xFECC2FC: 83C10018 lwz r30,24(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R30
+ 14: INCEIPL $4
+
+ 0xFECC300: 7D0803A6 mtlr r8
+ 15: GETL R8, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFECC304: 83E1001C lwz r31,28(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x1C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R31
+ 22: INCEIPL $4
+
+ 0xFECC308: 38210020 addi r1,r1,32
+ 23: GETL R1, t18
+ 24: ADDL $0x20, t18
+ 25: PUTL t18, R1
+ 26: INCEIPL $4
+
+ 0xFECC30C: 4E800020 blr
+ 27: GETL LR, t20
+ 28: JMPo-r t20 ($4)
+
+
+
+. 2678 FECC2F4 28
+. 81 01 00 24 83 A1 00 14 83 C1 00 18 7D 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2679 (0xFEC84D0) approx BBs exec'd 0 ====
+
+ 0xFEC84D0: 80610014 lwz r3,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEC84D4: 83E10008 lwz r31,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0xFEC84D8: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xFEC84DC: 7C6803A6 mtlr r3
+ 14: GETL R3, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xFEC84E0: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 2679 FEC84D0 20
+. 80 61 00 14 83 E1 00 08 38 21 00 10 7C 68 03 A6 4E 80 00 20
+==== BB 2680 (0xFEBB994) approx BBs exec'd 0 ====
+
+ 0xFEBB994: 809D0000 lwz r4,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFEBB998: 70898000 andi. r9,r4,0x8000
+ 4: GETL R4, t4
+ 5: ANDL $0x8000, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEBB99C: 4182011C bc 12,2,0xFEBBAB8
+ 10: Js02o $0xFEBBAB8
+
+
+
+. 2680 FEBB994 12
+. 80 9D 00 00 70 89 80 00 41 82 01 1C
+==== BB 2681 (0xFEBBAB8) approx BBs exec'd 0 ====
+
+ 0xFEBBAB8: 807D0048 lwz r3,72(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEBBABC: 80A30004 lwz r5,4(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFEBBAC0: 3925FFFF addi r9,r5,-1
+ 10: GETL R5, t8
+ 11: ADDL $0xFFFFFFFF, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFEBBAC4: 2F890000 cmpi cr7,r9,0
+ 14: GETL R9, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x7, CR
+ 17: INCEIPL $4
+
+ 0xFEBBAC8: 91230004 stw r9,4(r3)
+ 18: GETL R9, t14
+ 19: GETL R3, t16
+ 20: ADDL $0x4, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFEBBACC: 40BEFED4 bc 5,30,0xFEBB9A0
+ 23: Jc30o $0xFEBB9A0
+
+
+
+. 2681 FEBBAB8 24
+. 80 7D 00 48 80 A3 00 04 39 25 FF FF 2F 89 00 00 91 23 00 04 40 BE FE D4
+==== BB 2682 (0xFEBB9A0) approx BBs exec'd 0 ====
+
+ 0xFEBB9A0: 813D0060 lwz r9,96(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEBB9A4: 2F090000 cmpi cr6,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFEBB9A8: 409901C8 bc 4,25,0xFEBBB70
+ 9: Jc25o $0xFEBBB70
+
+
+
+. 2682 FEBB9A0 12
+. 81 3D 00 60 2F 09 00 00 40 99 01 C8
+==== BB 2683 (0xFEBBB70) approx BBs exec'd 0 ====
+
+ 0xFEBBB70: 815D0024 lwz r10,36(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFEBBB74: 2C8A0000 cmpi cr1,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFEBBB78: 4186FE8C bc 12,6,0xFEBBA04
+ 9: Js06o $0xFEBBA04
+
+
+
+. 2683 FEBBB70 12
+. 81 5D 00 24 2C 8A 00 00 41 86 FE 8C
+==== BB 2684 (0xFEBBA04) approx BBs exec'd 0 ====
+
+ 0xFEBBA04: 819E1D98 lwz r12,7576(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1D98, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFEBBA08: 816C0000 lwz r11,0(r12)
+ 5: GETL R12, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0xFEBBA0C: 7F1D5800 cmp cr6,r29,r11
+ 9: GETL R29, t8
+ 10: GETL R11, t10
+ 11: CMPL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFEBBA10: 419A0034 bc 12,26,0xFEBBA44
+ 14: Js26o $0xFEBBA44
+
+
+
+. 2684 FEBBA04 16
+. 81 9E 1D 98 81 6C 00 00 7F 1D 58 00 41 9A 00 34
+==== BB 2685 (0xFEBBA14) approx BBs exec'd 0 ====
+
+ 0xFEBBA14: 839E1C24 lwz r28,7204(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1C24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFEBBA18: 837C0000 lwz r27,0(r28)
+ 5: GETL R28, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0xFEBBA1C: 7C1DD800 cmp cr0,r29,r27
+ 9: GETL R29, t8
+ 10: GETL R27, t10
+ 11: CMPL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x0, CR
+ 13: INCEIPL $4
+
+ 0xFEBBA20: 41820024 bc 12,2,0xFEBBA44
+ 14: Js02o $0xFEBBA44
+
+
+
+. 2685 FEBBA14 16
+. 83 9E 1C 24 83 7C 00 00 7C 1D D8 00 41 82 00 24
+==== BB 2686 (0xFEBBA24) approx BBs exec'd 0 ====
+
+ 0xFEBBA24: 809E1D24 lwz r4,7460(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1D24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFEBBA28: 83E40000 lwz r31,0(r4)
+ 5: GETL R4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R31
+ 8: INCEIPL $4
+
+ 0xFEBBA2C: 7F9DF800 cmp cr7,r29,r31
+ 9: GETL R29, t8
+ 10: GETL R31, t10
+ 11: CMPL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x7, CR
+ 13: INCEIPL $4
+
+ 0xFEBBA30: 419E0014 bc 12,30,0xFEBBA44
+ 14: Js30o $0xFEBBA44
+
+
+
+. 2686 FEBBA24 16
+. 80 9E 1D 24 83 E4 00 00 7F 9D F8 00 41 9E 00 14
+==== BB 2687 (0xFEBBA34) approx BBs exec'd 0 ====
+
+ 0xFEBBA34: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFEBBA38: 7FA3EB78 or r3,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFEBBA3C: 901D0000 stw r0,0(r29)
+ 6: GETL R0, t4
+ 7: GETL R29, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFEBBA40: 480EE8F1 bl 0xFFAA330
+ 10: MOVL $0xFEBBA44, t8
+ 11: PUTL t8, LR
+ 12: JMPo-c $0xFFAA330 ($4)
+
+
+
+. 2687 FEBBA34 16
+. 38 00 00 00 7F A3 EB 78 90 1D 00 00 48 0E E8 F1
+==== BB 2688 (0xFECEC18) approx BBs exec'd 0 ====
+
+ 0xFECEC18: 71200002 andi. r0,r9,0x2
+ 0: GETL R9, t0
+ 1: ANDL $0x2, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECEC1C: 408202FC bc 4,2,0xFECEF18
+ 6: Jc02o $0xFECEF18
+
+
+
+. 2688 FECEC18 8
+. 71 20 00 02 40 82 02 FC
+==== BB 2689 (0xFECEC20) approx BBs exec'd 0 ====
+
+ 0xFECEC20: 81030030 lwz r8,48(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFECEC24: 7F5FEA14 add r26,r31,r29
+ 5: GETL R31, t4
+ 6: GETL R29, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0xFECEC28: 837E065C lwz r27,1628(r30)
+ 10: GETL R30, t8
+ 11: ADDL $0x65C, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R27
+ 14: INCEIPL $4
+
+ 0xFECEC2C: 7F08F800 cmp cr6,r8,r31
+ 15: GETL R8, t12
+ 16: GETL R31, t14
+ 17: CMPL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x6, CR
+ 19: INCEIPL $4
+
+ 0xFECEC30: 419A0254 bc 12,26,0xFECEE84
+ 20: Js26o $0xFECEE84
+
+
+
+. 2689 FECEC20 20
+. 81 03 00 30 7F 5F EA 14 83 7E 06 5C 7F 08 F8 00 41 9A 02 54
+==== BB 2690 (0xFECEC34) approx BBs exec'd 0 ====
+
+ 0xFECEC34: 71600002 andi. r0,r11,0x2
+ 0: GETL R11, t0
+ 1: ANDL $0x2, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECEC38: 41820350 bc 12,2,0xFECEF88
+ 6: Js02o $0xFECEF88
+
+
+
+. 2690 FECEC34 8
+. 71 60 00 02 41 82 03 50
+==== BB 2691 (0xFECEF88) approx BBs exec'd 0 ====
+
+ 0xFECEF88: 82480004 lwz r18,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0xFECEF8C: 837E0674 lwz r27,1652(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x674, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R27
+ 9: INCEIPL $4
+
+ 0xFECEF90: 56510038 rlwinm r17,r18,0,0,28
+ 10: GETL R18, t8
+ 11: ANDL $0xFFFFFFF8, t8
+ 12: PUTL t8, R17
+ 13: INCEIPL $4
+
+ 0xFECEF94: 7D688A14 add r11,r8,r17
+ 14: GETL R8, t10
+ 15: GETL R17, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R11
+ 18: INCEIPL $4
+
+ 0xFECEF98: 7F8BD040 cmpl cr7,r11,r26
+ 19: GETL R11, t14
+ 20: GETL R26, t16
+ 21: CMPUL t14, t16, t18 (-rSo)
+ 22: ICRFL t18, $0x7, CR
+ 23: INCEIPL $4
+
+ 0xFECEF9C: 419DFCA0 bc 12,29,0xFECEC3C
+ 24: Js29o $0xFECEC3C
+
+
+
+. 2691 FECEF88 24
+. 82 48 00 04 83 7E 06 74 56 51 00 38 7D 68 8A 14 7F 8B D0 40 41 9D FC A0
+==== BB 2692 (0xFECEC3C) approx BBs exec'd 0 ====
+
+ 0xFECEC3C: 801A0004 lwz r0,4(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFECEC40: 837E0660 lwz r27,1632(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x660, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R27
+ 9: INCEIPL $4
+
+ 0xFECEC44: 700B0001 andi. r11,r0,0x1
+ 10: GETL R0, t8
+ 11: ANDL $0x1, t8
+ 12: PUTL t8, R11
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFECEC48: 4182023C bc 12,2,0xFECEE84
+ 16: Js02o $0xFECEE84
+
+
+
+. 2692 FECEC3C 16
+. 80 1A 00 04 83 7E 06 60 70 0B 00 01 41 82 02 3C
+==== BB 2693 (0xFECEC4C) approx BBs exec'd 0 ====
+
+ 0xFECEC4C: 28800008 cmpli cr1,r0,8
+ 0: GETL R0, t0
+ 1: MOVL $0x8, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFECEC50: 541B0038 rlwinm r27,r0,0,0,28
+ 5: GETL R0, t6
+ 6: ANDL $0xFFFFFFF8, t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0xFECEC54: 4085022C bc 4,5,0xFECEE80
+ 9: Jc05o $0xFECEE80
+
+
+
+. 2693 FECEC4C 12
+. 28 80 00 08 54 1B 00 38 40 85 02 2C
+==== BB 2694 (0xFECEC58) approx BBs exec'd 0 ====
+
+ 0xFECEC58: 827C044C lwz r19,1100(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x44C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0xFECEC5C: 7F13D840 cmpl cr6,r19,r27
+ 5: GETL R19, t4
+ 6: GETL R27, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFECEC60: 40990220 bc 4,25,0xFECEE80
+ 10: Jc25o $0xFECEE80
+
+
+
+. 2694 FECEC58 12
+. 82 7C 04 4C 7F 13 D8 40 40 99 02 20
+==== BB 2695 (0xFECEC64) approx BBs exec'd 0 ====
+
+ 0xFECEC64: 71270001 andi. r7,r9,0x1
+ 0: GETL R9, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R7
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECEC68: 4082003C bc 4,2,0xFECECA4
+ 6: Jc02o $0xFECECA4
+
+
+
+. 2695 FECEC64 8
+. 71 27 00 01 40 82 00 3C
+==== BB 2696 (0xFECEC6C) approx BBs exec'd 0 ====
+
+ 0xFECEC6C: 829F0000 lwz r20,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R20
+ 3: INCEIPL $4
+
+ 0xFECEC70: 7FF4F850 subf r31,r20,r31
+ 4: GETL R20, t4
+ 5: GETL R31, t6
+ 6: SUBL t4, t6
+ 7: PUTL t6, R31
+ 8: INCEIPL $4
+
+ 0xFECEC74: 7FBDA214 add r29,r29,r20
+ 9: GETL R29, t8
+ 10: GETL R20, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R29
+ 13: INCEIPL $4
+
+ 0xFECEC78: 815F0008 lwz r10,8(r31)
+ 14: GETL R31, t12
+ 15: ADDL $0x8, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R10
+ 18: INCEIPL $4
+
+ 0xFECEC7C: 817F000C lwz r11,12(r31)
+ 19: GETL R31, t16
+ 20: ADDL $0xC, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R11
+ 23: INCEIPL $4
+
+ 0xFECEC80: 808A000C lwz r4,12(r10)
+ 24: GETL R10, t20
+ 25: ADDL $0xC, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R4
+ 28: INCEIPL $4
+
+ 0xFECEC84: 7F84F800 cmp cr7,r4,r31
+ 29: GETL R4, t24
+ 30: GETL R31, t26
+ 31: CMPL t24, t26, t28 (-rSo)
+ 32: ICRFL t28, $0x7, CR
+ 33: INCEIPL $4
+
+ 0xFECEC88: 409E0420 bc 4,30,0xFECF0A8
+ 34: Jc30o $0xFECF0A8
+
+
+
+. 2696 FECEC6C 32
+. 82 9F 00 00 7F F4 F8 50 7F BD A2 14 81 5F 00 08 81 7F 00 0C 80 8A 00 0C 7F 84 F8 00 40 9E 04 20
+==== BB 2697 (0xFECEC8C) approx BBs exec'd 0 ====
+
+ 0xFECEC8C: 82AB0008 lwz r21,8(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0xFECEC90: 7C95F800 cmp cr1,r21,r31
+ 5: GETL R21, t4
+ 6: GETL R31, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFECEC94: 40860414 bc 4,6,0xFECF0A8
+ 10: Jc06o $0xFECF0A8
+
+
+
+. 2697 FECEC8C 12
+. 82 AB 00 08 7C 95 F8 00 40 86 04 14
+==== BB 2698 (0xFECEC98) approx BBs exec'd 0 ====
+
+ 0xFECEC98: 914B0008 stw r10,8(r11)
+ 0: GETL R10, t0
+ 1: GETL R11, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECEC9C: 916A000C stw r11,12(r10)
+ 5: GETL R11, t4
+ 6: GETL R10, t6
+ 7: ADDL $0xC, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECECA0: 811C0030 lwz r8,48(r28)
+ 10: GETL R28, t8
+ 11: ADDL $0x30, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R8
+ 14: INCEIPL $4
+
+ 0xFECECA4: 7F88D000 cmp cr7,r8,r26
+ 15: GETL R8, t12
+ 16: GETL R26, t14
+ 17: CMPL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x7, CR
+ 19: INCEIPL $4
+
+ 0xFECECA8: 419E02C0 bc 12,30,0xFECEF68
+ 20: Js30o $0xFECEF68
+
+
+
+. 2698 FECEC98 20
+. 91 4B 00 08 91 6A 00 0C 81 1C 00 30 7F 88 D0 00 41 9E 02 C0
+==== BB 2699 (0xFECECAC) approx BBs exec'd 0 ====
+
+ 0xFECECAC: 7F3ADA14 add r25,r26,r27
+ 0: GETL R26, t0
+ 1: GETL R27, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0xFECECB0: 83190004 lwz r24,4(r25)
+ 5: GETL R25, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R24
+ 9: INCEIPL $4
+
+ 0xFECECB4: 730A0001 andi. r10,r24,0x1
+ 10: GETL R24, t8
+ 11: ANDL $0x1, t8
+ 12: PUTL t8, R10
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFECECB8: 408202A0 bc 4,2,0xFECEF58
+ 16: Jc02o $0xFECEF58
+
+
+
+. 2699 FECECAC 16
+. 7F 3A DA 14 83 19 00 04 73 0A 00 01 40 82 02 A0
+==== BB 2700 (0xFECEF58) approx BBs exec'd 0 ====
+
+ 0xFECEF58: 80FA0004 lwz r7,4(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFECEF5C: 54FB003C rlwinm r27,r7,0,0,30
+ 5: GETL R7, t4
+ 6: ANDL $0xFFFFFFFE, t4
+ 7: PUTL t4, R27
+ 8: INCEIPL $4
+
+ 0xFECEF60: 937A0004 stw r27,4(r26)
+ 9: GETL R27, t6
+ 10: GETL R26, t8
+ 11: ADDL $0x4, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECEF64: 4BFFFD84 b 0xFECECE8
+ 14: JMPo $0xFECECE8 ($4)
+
+
+
+. 2700 FECEF58 16
+. 80 FA 00 04 54 FB 00 3C 93 7A 00 04 4B FF FD 84
+==== BB 2701 (0xFECECE8) approx BBs exec'd 0 ====
+
+ 0xFECECE8: 387C0038 addi r3,r28,56
+ 0: GETL R28, t0
+ 1: ADDL $0x38, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFECECEC: 63A80001 ori r8,r29,0x1
+ 4: GETL R29, t2
+ 5: ORL $0x1, t2
+ 6: PUTL t2, R8
+ 7: INCEIPL $4
+
+ 0xFECECF0: 80C30008 lwz r6,8(r3)
+ 8: GETL R3, t4
+ 9: ADDL $0x8, t4
+ 10: LDL (t4), t6
+ 11: PUTL t6, R6
+ 12: INCEIPL $4
+
+ 0xFECECF4: 907F000C stw r3,12(r31)
+ 13: GETL R3, t8
+ 14: GETL R31, t10
+ 15: ADDL $0xC, t10
+ 16: STL t8, (t10)
+ 17: INCEIPL $4
+
+ 0xFECECF8: 90DF0008 stw r6,8(r31)
+ 18: GETL R6, t12
+ 19: GETL R31, t14
+ 20: ADDL $0x8, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0xFECECFC: 911F0004 stw r8,4(r31)
+ 23: GETL R8, t16
+ 24: GETL R31, t18
+ 25: ADDL $0x4, t18
+ 26: STL t16, (t18)
+ 27: INCEIPL $4
+
+ 0xFECED00: 7FBFE92E stwx r29,r31,r29
+ 28: GETL R29, t20
+ 29: GETL R31, t22
+ 30: ADDL t22, t20
+ 31: GETL R29, t24
+ 32: STL t24, (t20)
+ 33: INCEIPL $4
+
+ 0xFECED04: 93E6000C stw r31,12(r6)
+ 34: GETL R31, t26
+ 35: GETL R6, t28
+ 36: ADDL $0xC, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFECED08: 93E30008 stw r31,8(r3)
+ 39: GETL R31, t30
+ 40: GETL R3, t32
+ 41: ADDL $0x8, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFECED0C: 289DFFFF cmpli cr1,r29,65535
+ 44: GETL R29, t34
+ 45: MOVL $0xFFFF, t38
+ 46: CMPUL t34, t38, t36 (-rSo)
+ 47: ICRFL t36, $0x1, CR
+ 48: INCEIPL $4
+
+ 0xFECED10: 40850124 bc 4,5,0xFECEE34
+ 49: Jc05o $0xFECEE34
+
+
+
+. 2701 FECECE8 44
+. 38 7C 00 38 63 A8 00 01 80 C3 00 08 90 7F 00 0C 90 DF 00 08 91 1F 00 04 7F BF E9 2E 93 E6 00 0C 93 E3 00 08 28 9D FF FF 40 85 01 24
+==== BB 2702 (0xFECEE34) approx BBs exec'd 0 ====
+
+ 0xFECEE34: 83A10064 lwz r29,100(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x64, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFECEE38: 82210024 lwz r17,36(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x24, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R17
+ 9: INCEIPL $4
+
+ 0xFECEE3C: 7FA803A6 mtlr r29
+ 10: GETL R29, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFECEE40: 82410028 lwz r18,40(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x28, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R18
+ 17: INCEIPL $4
+
+ 0xFECEE44: 8261002C lwz r19,44(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x2C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R19
+ 22: INCEIPL $4
+
+ 0xFECEE48: 82810030 lwz r20,48(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x30, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R20
+ 27: INCEIPL $4
+
+ 0xFECEE4C: 82A10034 lwz r21,52(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x34, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R21
+ 32: INCEIPL $4
+
+ 0xFECEE50: 82C10038 lwz r22,56(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x38, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R22
+ 37: INCEIPL $4
+
+ 0xFECEE54: 82E1003C lwz r23,60(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x3C, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R23
+ 42: INCEIPL $4
+
+ 0xFECEE58: 83010040 lwz r24,64(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x40, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R24
+ 47: INCEIPL $4
+
+ 0xFECEE5C: 83210044 lwz r25,68(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x44, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R25
+ 52: INCEIPL $4
+
+ 0xFECEE60: 83410048 lwz r26,72(r1)
+ 53: GETL R1, t42
+ 54: ADDL $0x48, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R26
+ 57: INCEIPL $4
+
+ 0xFECEE64: 8361004C lwz r27,76(r1)
+ 58: GETL R1, t46
+ 59: ADDL $0x4C, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R27
+ 62: INCEIPL $4
+
+ 0xFECEE68: 83810050 lwz r28,80(r1)
+ 63: GETL R1, t50
+ 64: ADDL $0x50, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R28
+ 67: INCEIPL $4
+
+ 0xFECEE6C: 83A10054 lwz r29,84(r1)
+ 68: GETL R1, t54
+ 69: ADDL $0x54, t54
+ 70: LDL (t54), t56
+ 71: PUTL t56, R29
+ 72: INCEIPL $4
+
+ 0xFECEE70: 83C10058 lwz r30,88(r1)
+ 73: GETL R1, t58
+ 74: ADDL $0x58, t58
+ 75: LDL (t58), t60
+ 76: PUTL t60, R30
+ 77: INCEIPL $4
+
+ 0xFECEE74: 83E1005C lwz r31,92(r1)
+ 78: GETL R1, t62
+ 79: ADDL $0x5C, t62
+ 80: LDL (t62), t64
+ 81: PUTL t64, R31
+ 82: INCEIPL $4
+
+ 0xFECEE78: 38210060 addi r1,r1,96
+ 83: GETL R1, t66
+ 84: ADDL $0x60, t66
+ 85: PUTL t66, R1
+ 86: INCEIPL $4
+
+ 0xFECEE7C: 4E800020 blr
+ 87: GETL LR, t68
+ 88: JMPo-r t68 ($4)
+
+
+
+. 2702 FECEE34 76
+. 83 A1 00 64 82 21 00 24 7F A8 03 A6 82 41 00 28 82 61 00 2C 82 81 00 30 82 A1 00 34 82 C1 00 38 82 E1 00 3C 83 01 00 40 83 21 00 44 83 41 00 48 83 61 00 4C 83 81 00 50 83 A1 00 54 83 C1 00 58 83 E1 00 5C 38 21 00 60 4E 80 00 20
+==== BB 2703 (0xFEBBA44) approx BBs exec'd 0 ====
+
+ 0xFEBBA44: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEBBA48: 83410024 lwz r26,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0xFEBBA4C: 8361000C lwz r27,12(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R27
+ 12: INCEIPL $4
+
+ 0xFEBBA50: 7F4803A6 mtlr r26
+ 13: GETL R26, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFEBBA54: 83810010 lwz r28,16(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x10, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0xFEBBA58: 83410008 lwz r26,8(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x8, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R26
+ 25: INCEIPL $4
+
+ 0xFEBBA5C: 83A10014 lwz r29,20(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R29
+ 30: INCEIPL $4
+
+ 0xFEBBA60: 83C10018 lwz r30,24(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x18, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R30
+ 35: INCEIPL $4
+
+ 0xFEBBA64: 83E1001C lwz r31,28(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R31
+ 40: INCEIPL $4
+
+ 0xFEBBA68: 38210020 addi r1,r1,32
+ 41: GETL R1, t32
+ 42: ADDL $0x20, t32
+ 43: PUTL t32, R1
+ 44: INCEIPL $4
+
+ 0xFEBBA6C: 4E800020 blr
+ 45: GETL LR, t34
+ 46: JMPo-r t34 ($4)
+
+
+
+. 2703 FEBBA44 44
+. 7F 43 D3 78 83 41 00 24 83 61 00 0C 7F 48 03 A6 83 81 00 10 83 41 00 08 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2704 (0xFE8D400) approx BBs exec'd 0 ====
+
+ 0xFE8D400: 2F8E0000 cmpi cr7,r14,0
+ 0: GETL R14, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE8D404: 409E00B0 bc 4,30,0xFE8D4B4
+ 4: Jc30o $0xFE8D4B4
+
+
+
+. 2704 FE8D400 8
+. 2F 8E 00 00 40 9E 00 B0
+==== BB 2705 (0xFE8D4B4) approx BBs exec'd 0 ====
+
+ 0xFE8D4B4: 825E01F4 lwz r18,500(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0xFE8D4B8: 38A00008 li r5,8
+ 5: MOVL $0x8, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFE8D4BC: 821E01F0 lwz r16,496(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x1F0, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R16
+ 12: INCEIPL $4
+
+ 0xFE8D4C0: 80720000 lwz r3,0(r18)
+ 13: GETL R18, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R3
+ 16: INCEIPL $4
+
+ 0xFE8D4C4: 80900000 lwz r4,0(r16)
+ 17: GETL R16, t14
+ 18: LDL (t14), t16
+ 19: PUTL t16, R4
+ 20: INCEIPL $4
+
+ 0xFE8D4C8: 80DE01FC lwz r6,508(r30)
+ 21: GETL R30, t18
+ 22: ADDL $0x1FC, t18
+ 23: LDL (t18), t20
+ 24: PUTL t20, R6
+ 25: INCEIPL $4
+
+ 0xFE8D4CC: 48005AC5 bl 0xFE92F90
+ 26: MOVL $0xFE8D4D0, t22
+ 27: PUTL t22, LR
+ 28: JMPo-c $0xFE92F90 ($4)
+
+
+
+. 2705 FE8D4B4 28
+. 82 5E 01 F4 38 A0 00 08 82 1E 01 F0 80 72 00 00 80 90 00 00 80 DE 01 FC 48 00 5A C5
+==== BB 2706 alias_compare(0xFE8D77C) approx BBs exec'd 0 ====
+
+ 0xFE8D77C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE8D780: 80630000 lwz r3,0(r3)
+ 6: GETL R3, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFE8D784: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xFE8D788: 80840000 lwz r4,0(r4)
+ 14: GETL R4, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R4
+ 17: INCEIPL $4
+
+ 0xFE8D78C: 4804AD48 b 0xFED84D4
+ 18: JMPo $0xFED84D4 ($4)
+
+
+
+. 2706 FE8D77C 20
+. 94 21 FF F0 80 63 00 00 38 21 00 10 80 84 00 00 48 04 AD 48
+==== BB 2707 strcasecmp(0xFED84D4) approx BBs exec'd 0 ====
+
+ 0xFED84D4: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED84D8: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFED84DC: 480CF975 bl 0xFFA7E50
+ 9: MOVL $0xFED84E0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2707 FED84D4 12
+. 94 21 FF F0 7D 88 02 A6 48 0C F9 75
+==== BB 2708 (0xFED84E0) approx BBs exec'd 0 ====
+
+ 0xFED84E0: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFED84E4: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFED84E8: 7F832000 cmp cr7,r3,r4
+ 8: GETL R3, t6
+ 9: GETL R4, t8
+ 10: CMPL t6, t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFED84EC: 39400000 li r10,0
+ 13: MOVL $0x0, t12
+ 14: PUTL t12, R10
+ 15: INCEIPL $4
+
+ 0xFED84F0: 7D8803A6 mtlr r12
+ 16: GETL R12, t14
+ 17: PUTL t14, LR
+ 18: INCEIPL $4
+
+ 0xFED84F4: 80BE1D50 lwz r5,7504(r30)
+ 19: GETL R30, t16
+ 20: ADDL $0x1D50, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R5
+ 23: INCEIPL $4
+
+ 0xFED84F8: 7D251214 add r9,r5,r2
+ 24: GETL R5, t20
+ 25: GETL R2, t22
+ 26: ADDL t20, t22
+ 27: PUTL t22, R9
+ 28: INCEIPL $4
+
+ 0xFED84FC: 81290000 lwz r9,0(r9)
+ 29: GETL R9, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R9
+ 32: INCEIPL $4
+
+ 0xFED8500: 419E0038 bc 12,30,0xFED8538
+ 33: Js30o $0xFED8538
+
+
+
+. 2708 FED84E0 36
+. 93 C1 00 08 7F C8 02 A6 7F 83 20 00 39 40 00 00 7D 88 03 A6 80 BE 1D 50 7D 25 12 14 81 29 00 00 41 9E 00 38
+==== BB 2709 (0xFED8504) approx BBs exec'd 0 ====
+
+ 0xFED8504: 81090038 lwz r8,56(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x38, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFED8508: 88E30000 lbz r7,0(r3)
+ 5: GETL R3, t4
+ 6: LDB (t4), t6
+ 7: PUTL t6, R7
+ 8: INCEIPL $4
+
+ 0xFED850C: 38630001 addi r3,r3,1
+ 9: GETL R3, t8
+ 10: ADDL $0x1, t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFED8510: 89240000 lbz r9,0(r4)
+ 13: GETL R4, t10
+ 14: LDB (t10), t12
+ 15: PUTL t12, R9
+ 16: INCEIPL $4
+
+ 0xFED8514: 38840001 addi r4,r4,1
+ 17: GETL R4, t14
+ 18: ADDL $0x1, t14
+ 19: PUTL t14, R4
+ 20: INCEIPL $4
+
+ 0xFED8518: 54E6103A rlwinm r6,r7,2,0,29
+ 21: GETL R7, t16
+ 22: SHLL $0x2, t16
+ 23: PUTL t16, R6
+ 24: INCEIPL $4
+
+ 0xFED851C: 2F870000 cmpi cr7,r7,0
+ 25: GETL R7, t18
+ 26: CMP0L t18, t20 (-rSo)
+ 27: ICRFL t20, $0x7, CR
+ 28: INCEIPL $4
+
+ 0xFED8520: 552B103A rlwinm r11,r9,2,0,29
+ 29: GETL R9, t22
+ 30: SHLL $0x2, t22
+ 31: PUTL t22, R11
+ 32: INCEIPL $4
+
+ 0xFED8524: 7D46402E lwzx r10,r6,r8
+ 33: GETL R8, t24
+ 34: GETL R6, t26
+ 35: ADDL t26, t24
+ 36: LDL (t24), t28
+ 37: PUTL t28, R10
+ 38: INCEIPL $4
+
+ 0xFED8528: 7C0B402E lwzx r0,r11,r8
+ 39: GETL R8, t30
+ 40: GETL R11, t32
+ 41: ADDL t32, t30
+ 42: LDL (t30), t34
+ 43: PUTL t34, R0
+ 44: INCEIPL $4
+
+ 0xFED852C: 7D405051 subf. r10,r0,r10
+ 45: GETL R0, t36
+ 46: GETL R10, t38
+ 47: SUBL t36, t38
+ 48: PUTL t38, R10
+ 49: CMP0L t38, t40 (-rSo)
+ 50: ICRFL t40, $0x0, CR
+ 51: INCEIPL $4
+
+ 0xFED8530: 40820008 bc 4,2,0xFED8538
+ 52: Jc02o $0xFED8538
+
+
+
+. 2709 FED8504 48
+. 81 09 00 38 88 E3 00 00 38 63 00 01 89 24 00 00 38 84 00 01 54 E6 10 3A 2F 87 00 00 55 2B 10 3A 7D 46 40 2E 7C 0B 40 2E 7D 40 50 51 40 82 00 08
+==== BB 2710 (0xFED8534) approx BBs exec'd 0 ====
+
+ 0xFED8534: 409EFFD4 bc 4,30,0xFED8508
+ 0: Jc30o $0xFED8508
+
+
+
+. 2710 FED8534 4
+. 40 9E FF D4
+==== BB 2711 (0xFED8508) approx BBs exec'd 0 ====
+
+ 0xFED8508: 88E30000 lbz r7,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0xFED850C: 38630001 addi r3,r3,1
+ 4: GETL R3, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED8510: 89240000 lbz r9,0(r4)
+ 8: GETL R4, t6
+ 9: LDB (t6), t8
+ 10: PUTL t8, R9
+ 11: INCEIPL $4
+
+ 0xFED8514: 38840001 addi r4,r4,1
+ 12: GETL R4, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0xFED8518: 54E6103A rlwinm r6,r7,2,0,29
+ 16: GETL R7, t12
+ 17: SHLL $0x2, t12
+ 18: PUTL t12, R6
+ 19: INCEIPL $4
+
+ 0xFED851C: 2F870000 cmpi cr7,r7,0
+ 20: GETL R7, t14
+ 21: CMP0L t14, t16 (-rSo)
+ 22: ICRFL t16, $0x7, CR
+ 23: INCEIPL $4
+
+ 0xFED8520: 552B103A rlwinm r11,r9,2,0,29
+ 24: GETL R9, t18
+ 25: SHLL $0x2, t18
+ 26: PUTL t18, R11
+ 27: INCEIPL $4
+
+ 0xFED8524: 7D46402E lwzx r10,r6,r8
+ 28: GETL R8, t20
+ 29: GETL R6, t22
+ 30: ADDL t22, t20
+ 31: LDL (t20), t24
+ 32: PUTL t24, R10
+ 33: INCEIPL $4
+
+ 0xFED8528: 7C0B402E lwzx r0,r11,r8
+ 34: GETL R8, t26
+ 35: GETL R11, t28
+ 36: ADDL t28, t26
+ 37: LDL (t26), t30
+ 38: PUTL t30, R0
+ 39: INCEIPL $4
+
+ 0xFED852C: 7D405051 subf. r10,r0,r10
+ 40: GETL R0, t32
+ 41: GETL R10, t34
+ 42: SUBL t32, t34
+ 43: PUTL t34, R10
+ 44: CMP0L t34, t36 (-rSo)
+ 45: ICRFL t36, $0x0, CR
+ 46: INCEIPL $4
+
+ 0xFED8530: 40820008 bc 4,2,0xFED8538
+ 47: Jc02o $0xFED8538
+
+
+
+. 2711 FED8508 44
+. 88 E3 00 00 38 63 00 01 89 24 00 00 38 84 00 01 54 E6 10 3A 2F 87 00 00 55 2B 10 3A 7D 46 40 2E 7C 0B 40 2E 7D 40 50 51 40 82 00 08
+==== BB 2712 (0xFED8538) approx BBs exec'd 0 ====
+
+ 0xFED8538: 7D435378 or r3,r10,r10
+ 0: GETL R10, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED853C: 83C10008 lwz r30,8(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFED8540: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xFED8544: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 2712 FED8538 16
+. 7D 43 53 78 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 2713 (0xFED8878) approx BBs exec'd 0 ====
+
+ 0xFED8878: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFED887C: 3863FFE4 addi r3,r3,-28
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFE4, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED8880: 3884FFE8 addi r4,r4,-24
+ 8: GETL R4, t6
+ 9: ADDL $0xFFFFFFE8, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0xFED8884: 38A50006 addi r5,r5,6
+ 12: GETL R5, t8
+ 13: ADDL $0x6, t8
+ 14: PUTL t8, R5
+ 15: INCEIPL $4
+
+ 0xFED8888: 4BFFFFB4 b 0xFED883C
+ 16: JMPo $0xFED883C ($4)
+
+
+
+. 2713 FED8878 20
+. 80 04 00 00 38 63 FF E4 38 84 FF E8 38 A5 00 06 4B FF FF B4
+==== BB 2714 (0xFED883C) approx BBs exec'd 0 ====
+
+ 0xFED883C: 34A5FFF8 addic. r5,r5,-8
+ 0: GETL R5, t0
+ 1: ADCL $0xFFFFFFF8, t0 (-wCa)
+ 2: PUTL t0, R5
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED8840: 8124001C lwz r9,28(r4)
+ 6: GETL R4, t4
+ 7: ADDL $0x1C, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0xFED8844: 9003001C stw r0,28(r3)
+ 11: GETL R0, t8
+ 12: GETL R3, t10
+ 13: ADDL $0x1C, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFED8848: 38840020 addi r4,r4,32
+ 16: GETL R4, t12
+ 17: ADDL $0x20, t12
+ 18: PUTL t12, R4
+ 19: INCEIPL $4
+
+ 0xFED884C: 38630020 addi r3,r3,32
+ 20: GETL R3, t14
+ 21: ADDL $0x20, t14
+ 22: PUTL t14, R3
+ 23: INCEIPL $4
+
+ 0xFED8850: 40A2FFB4 bc 5,2,0xFED8804
+ 24: Jc02o $0xFED8804
+
+
+
+. 2714 FED883C 24
+. 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+==== BB 2715 (0xFE92ED4) approx BBs exec'd 0 ====
+
+ 0xFE92ED4: 7CB9E9D6 mullw r5,r25,r29
+ 0: GETL R25, t0
+ 1: GETL R29, t2
+ 2: MULL t0, t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFE92ED8: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE92EDC: 7F44D378 or r4,r26,r26
+ 8: GETL R26, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0xFE92EE0: 480457F9 bl 0xFED86D8
+ 11: MOVL $0xFE92EE4, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 2715 FE92ED4 16
+. 7C B9 E9 D6 7F 83 E3 78 7F 44 D3 78 48 04 57 F9
+==== BB 2716 (0xFE92EE4) approx BBs exec'd 0 ====
+
+ 0xFE92EE4: 4BFFFF5C b 0xFE92E40
+ 0: JMPo $0xFE92E40 ($4)
+
+
+
+. 2716 FE92EE4 4
+. 4B FF FF 5C
+==== BB 2717 (0xFE8D4D0) approx BBs exec'd 0 ====
+
+ 0xFE8D4D0: 4BFFFF38 b 0xFE8D408
+ 0: JMPo $0xFE8D408 ($4)
+
+
+
+. 2717 FE8D4D0 4
+. 4B FF FF 38
+==== BB 2718 (0xFE8D408) approx BBs exec'd 0 ====
+
+ 0xFE8D408: 7DC07378 or r0,r14,r14
+ 0: GETL R14, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE8D40C: 81210000 lwz r9,0(r1)
+ 3: GETL R1, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R9
+ 6: INCEIPL $4
+
+ 0xFE8D410: 7C030378 or r3,r0,r0
+ 7: GETL R0, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFE8D414: 83490004 lwz r26,4(r9)
+ 10: GETL R9, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R26
+ 14: INCEIPL $4
+
+ 0xFE8D418: 81C9FFB8 lwz r14,-72(r9)
+ 15: GETL R9, t12
+ 16: ADDL $0xFFFFFFB8, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R14
+ 19: INCEIPL $4
+
+ 0xFE8D41C: 7F4803A6 mtlr r26
+ 20: GETL R26, t16
+ 21: PUTL t16, LR
+ 22: INCEIPL $4
+
+ 0xFE8D420: 81E9FFBC lwz r15,-68(r9)
+ 23: GETL R9, t18
+ 24: ADDL $0xFFFFFFBC, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R15
+ 27: INCEIPL $4
+
+ 0xFE8D424: 8209FFC0 lwz r16,-64(r9)
+ 28: GETL R9, t22
+ 29: ADDL $0xFFFFFFC0, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R16
+ 32: INCEIPL $4
+
+ 0xFE8D428: 8229FFC4 lwz r17,-60(r9)
+ 33: GETL R9, t26
+ 34: ADDL $0xFFFFFFC4, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R17
+ 37: INCEIPL $4
+
+ 0xFE8D42C: 8249FFC8 lwz r18,-56(r9)
+ 38: GETL R9, t30
+ 39: ADDL $0xFFFFFFC8, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R18
+ 42: INCEIPL $4
+
+ 0xFE8D430: 8269FFCC lwz r19,-52(r9)
+ 43: GETL R9, t34
+ 44: ADDL $0xFFFFFFCC, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R19
+ 47: INCEIPL $4
+
+ 0xFE8D434: 8289FFD0 lwz r20,-48(r9)
+ 48: GETL R9, t38
+ 49: ADDL $0xFFFFFFD0, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R20
+ 52: INCEIPL $4
+
+ 0xFE8D438: 82A9FFD4 lwz r21,-44(r9)
+ 53: GETL R9, t42
+ 54: ADDL $0xFFFFFFD4, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R21
+ 57: INCEIPL $4
+
+ 0xFE8D43C: 82C9FFD8 lwz r22,-40(r9)
+ 58: GETL R9, t46
+ 59: ADDL $0xFFFFFFD8, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R22
+ 62: INCEIPL $4
+
+ 0xFE8D440: 82E9FFDC lwz r23,-36(r9)
+ 63: GETL R9, t50
+ 64: ADDL $0xFFFFFFDC, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R23
+ 67: INCEIPL $4
+
+ 0xFE8D444: 8309FFE0 lwz r24,-32(r9)
+ 68: GETL R9, t54
+ 69: ADDL $0xFFFFFFE0, t54
+ 70: LDL (t54), t56
+ 71: PUTL t56, R24
+ 72: INCEIPL $4
+
+ 0xFE8D448: 8329FFE4 lwz r25,-28(r9)
+ 73: GETL R9, t58
+ 74: ADDL $0xFFFFFFE4, t58
+ 75: LDL (t58), t60
+ 76: PUTL t60, R25
+ 77: INCEIPL $4
+
+ 0xFE8D44C: 8349FFE8 lwz r26,-24(r9)
+ 78: GETL R9, t62
+ 79: ADDL $0xFFFFFFE8, t62
+ 80: LDL (t62), t64
+ 81: PUTL t64, R26
+ 82: INCEIPL $4
+
+ 0xFE8D450: 8369FFEC lwz r27,-20(r9)
+ 83: GETL R9, t66
+ 84: ADDL $0xFFFFFFEC, t66
+ 85: LDL (t66), t68
+ 86: PUTL t68, R27
+ 87: INCEIPL $4
+
+ 0xFE8D454: 8389FFF0 lwz r28,-16(r9)
+ 88: GETL R9, t70
+ 89: ADDL $0xFFFFFFF0, t70
+ 90: LDL (t70), t72
+ 91: PUTL t72, R28
+ 92: INCEIPL $4
+
+ 0xFE8D458: 83A9FFF4 lwz r29,-12(r9)
+ 93: GETL R9, t74
+ 94: ADDL $0xFFFFFFF4, t74
+ 95: LDL (t74), t76
+ 96: PUTL t76, R29
+ 97: INCEIPL $4
+
+ 0xFE8D45C: 83C9FFF8 lwz r30,-8(r9)
+ 98: GETL R9, t78
+ 99: ADDL $0xFFFFFFF8, t78
+ 100: LDL (t78), t80
+ 101: PUTL t80, R30
+ 102: INCEIPL $4
+
+ 0xFE8D460: 83E9FFFC lwz r31,-4(r9)
+ 103: GETL R9, t82
+ 104: ADDL $0xFFFFFFFC, t82
+ 105: LDL (t82), t84
+ 106: PUTL t84, R31
+ 107: INCEIPL $4
+
+ 0xFE8D464: 7D214B78 or r1,r9,r9
+ 108: GETL R9, t86
+ 109: PUTL t86, R1
+ 110: INCEIPL $4
+
+ 0xFE8D468: 4E800020 blr
+ 111: GETL LR, t88
+ 112: JMPo-r t88 ($4)
+
+
+
+. 2718 FE8D408 100
+. 7D C0 73 78 81 21 00 00 7C 03 03 78 83 49 00 04 81 C9 FF B8 7F 48 03 A6 81 E9 FF BC 82 09 FF C0 82 29 FF C4 82 49 FF C8 82 69 FF CC 82 89 FF D0 82 A9 FF D4 82 C9 FF D8 82 E9 FF DC 83 09 FF E0 83 29 FF E4 83 49 FF E8 83 69 FF EC 83 89 FF F0 83 A9 FF F4 83 C9 FF F8 83 E9 FF FC 7D 21 4B 78 4E 80 00 20
+==== BB 2719 (0xFE8D6C0) approx BBs exec'd 0 ====
+
+ 0xFE8D6C0: 7C681B79 or. r8,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R8
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8D6C4: 4182FF88 bc 12,2,0xFE8D64C
+ 5: Js02o $0xFE8D64C
+
+
+
+. 2719 FE8D6C0 8
+. 7C 68 1B 79 41 82 FF 88
+==== BB 2720 (0xFE8D6C8) approx BBs exec'd 0 ====
+
+ 0xFE8D6C8: 80B90000 lwz r5,0(r25)
+ 0: GETL R25, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFE8D6CC: 93410008 stw r26,8(r1)
+ 4: GETL R26, t4
+ 5: GETL R1, t6
+ 6: ADDL $0x8, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFE8D6D0: 2C050000 cmpi cr0,r5,0
+ 9: GETL R5, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFE8D6D4: 4182FEE4 bc 12,2,0xFE8D5B8
+ 13: Js02o $0xFE8D5B8
+
+
+
+. 2720 FE8D6C8 16
+. 80 B9 00 00 93 41 00 08 2C 05 00 00 41 82 FE E4
+==== BB 2721 (0xFE8D6D8) approx BBs exec'd 0 ====
+
+ 0xFE8D6D8: 807E01F4 lwz r3,500(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE8D6DC: 38C00008 li r6,8
+ 5: MOVL $0x8, t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0xFE8D6E0: 80FE01FC lwz r7,508(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x1FC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0xFE8D6E4: 80830000 lwz r4,0(r3)
+ 13: GETL R3, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R4
+ 16: INCEIPL $4
+
+ 0xFE8D6E8: 38610008 addi r3,r1,8
+ 17: GETL R1, t14
+ 18: ADDL $0x8, t14
+ 19: PUTL t14, R3
+ 20: INCEIPL $4
+
+ 0xFE8D6EC: 4800512D bl 0xFE92818
+ 21: MOVL $0xFE8D6F0, t16
+ 22: PUTL t16, LR
+ 23: JMPo-c $0xFE92818 ($4)
+
+
+
+. 2721 FE8D6D8 24
+. 80 7E 01 F4 38 C0 00 08 80 FE 01 FC 80 83 00 00 38 61 00 08 48 00 51 2D
+==== BB 2722 bsearch(0xFE92818) approx BBs exec'd 0 ====
+
+ 0xFE92818: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE9281C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE92820: 9361001C stw r27,28(r1)
+ 9: GETL R27, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFE92824: 3B600000 li r27,0
+ 14: MOVL $0x0, t10
+ 15: PUTL t10, R27
+ 16: INCEIPL $4
+
+ 0xFE92828: 7F9B2840 cmpl cr7,r27,r5
+ 17: GETL R27, t12
+ 18: GETL R5, t14
+ 19: CMPUL t12, t14, t16 (-rSo)
+ 20: ICRFL t16, $0x7, CR
+ 21: INCEIPL $4
+
+ 0xFE9282C: 92E1000C stw r23,12(r1)
+ 22: GETL R23, t18
+ 23: GETL R1, t20
+ 24: ADDL $0xC, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0xFE92830: 93010010 stw r24,16(r1)
+ 27: GETL R24, t22
+ 28: GETL R1, t24
+ 29: ADDL $0x10, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0xFE92834: 7C771B78 or r23,r3,r3
+ 32: GETL R3, t26
+ 33: PUTL t26, R23
+ 34: INCEIPL $4
+
+ 0xFE92838: 93210014 stw r25,20(r1)
+ 35: GETL R25, t28
+ 36: GETL R1, t30
+ 37: ADDL $0x14, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0xFE9283C: 7C982378 or r24,r4,r4
+ 40: GETL R4, t32
+ 41: PUTL t32, R24
+ 42: INCEIPL $4
+
+ 0xFE92840: 93410018 stw r26,24(r1)
+ 43: GETL R26, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x18, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0xFE92844: 7CD93378 or r25,r6,r6
+ 48: GETL R6, t38
+ 49: PUTL t38, R25
+ 50: INCEIPL $4
+
+ 0xFE92848: 93810020 stw r28,32(r1)
+ 51: GETL R28, t40
+ 52: GETL R1, t42
+ 53: ADDL $0x20, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0xFE9284C: 7CFA3B78 or r26,r7,r7
+ 56: GETL R7, t44
+ 57: PUTL t44, R26
+ 58: INCEIPL $4
+
+ 0xFE92850: 93A10024 stw r29,36(r1)
+ 59: GETL R29, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x24, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0xFE92854: 7CBC2B78 or r28,r5,r5
+ 64: GETL R5, t50
+ 65: PUTL t50, R28
+ 66: INCEIPL $4
+
+ 0xFE92858: 93C10028 stw r30,40(r1)
+ 67: GETL R30, t52
+ 68: GETL R1, t54
+ 69: ADDL $0x28, t54
+ 70: STL t52, (t54)
+ 71: INCEIPL $4
+
+ 0xFE9285C: 93E1002C stw r31,44(r1)
+ 72: GETL R31, t56
+ 73: GETL R1, t58
+ 74: ADDL $0x2C, t58
+ 75: STL t56, (t58)
+ 76: INCEIPL $4
+
+ 0xFE92860: 90010034 stw r0,52(r1)
+ 77: GETL R0, t60
+ 78: GETL R1, t62
+ 79: ADDL $0x34, t62
+ 80: STL t60, (t62)
+ 81: INCEIPL $4
+
+ 0xFE92864: 409C003C bc 4,28,0xFE928A0
+ 82: Jc28o $0xFE928A0
+
+
+
+. 2722 FE92818 80
+. 94 21 FF D0 7C 08 02 A6 93 61 00 1C 3B 60 00 00 7F 9B 28 40 92 E1 00 0C 93 01 00 10 7C 77 1B 78 93 21 00 14 7C 98 23 78 93 41 00 18 7C D9 33 78 93 81 00 20 7C FA 3B 78 93 A1 00 24 7C BC 2B 78 93 C1 00 28 93 E1 00 2C 90 01 00 34 40 9C 00 3C
+==== BB 2723 (0xFE92868) approx BBs exec'd 0 ====
+
+ 0xFE92868: 7C7BE214 add r3,r27,r28
+ 0: GETL R27, t0
+ 1: GETL R28, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE9286C: 7F4803A6 mtlr r26
+ 5: GETL R26, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xFE92870: 547FF87E rlwinm r31,r3,31,1,31
+ 8: GETL R3, t6
+ 9: SHRL $0x1, t6
+ 10: PUTL t6, R31
+ 11: INCEIPL $4
+
+ 0xFE92874: 7EE3BB78 or r3,r23,r23
+ 12: GETL R23, t8
+ 13: PUTL t8, R3
+ 14: INCEIPL $4
+
+ 0xFE92878: 7D3FC9D6 mullw r9,r31,r25
+ 15: GETL R31, t10
+ 16: GETL R25, t12
+ 17: MULL t10, t12
+ 18: PUTL t12, R9
+ 19: INCEIPL $4
+
+ 0xFE9287C: 7FA9C214 add r29,r9,r24
+ 20: GETL R9, t14
+ 21: GETL R24, t16
+ 22: ADDL t14, t16
+ 23: PUTL t16, R29
+ 24: INCEIPL $4
+
+ 0xFE92880: 7FA4EB78 or r4,r29,r29
+ 25: GETL R29, t18
+ 26: PUTL t18, R4
+ 27: INCEIPL $4
+
+ 0xFE92884: 4E800021 blrl
+ 28: GETL LR, t20
+ 29: MOVL $0xFE92888, t22
+ 30: PUTL t22, LR
+ 31: JMPo-r t20 ($4)
+
+
+
+. 2723 FE92868 32
+. 7C 7B E2 14 7F 48 03 A6 54 7F F8 7E 7E E3 BB 78 7D 3F C9 D6 7F A9 C2 14 7F A4 EB 78 4E 80 00 21
+==== BB 2724 (0xFE92888) approx BBs exec'd 0 ====
+
+ 0xFE92888: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE9288C: 419C0084 bc 12,28,0xFE92910
+ 4: Js28o $0xFE92910
+
+
+
+. 2724 FE92888 8
+. 2F 83 00 00 41 9C 00 84
+==== BB 2725 (0xFE92910) approx BBs exec'd 0 ====
+
+ 0xFE92910: 7FFCFB78 or r28,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0xFE92914: 7F9BE040 cmpl cr7,r27,r28
+ 3: GETL R27, t2
+ 4: GETL R28, t4
+ 5: CMPUL t2, t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFE92918: 4BFFFF84 b 0xFE9289C
+ 8: JMPo $0xFE9289C ($4)
+
+
+
+. 2725 FE92910 12
+. 7F FC FB 78 7F 9B E0 40 4B FF FF 84
+==== BB 2726 (0xFE9289C) approx BBs exec'd 0 ====
+
+ 0xFE9289C: 419CFFCC bc 12,28,0xFE92868
+ 0: Js28o $0xFE92868
+
+
+
+. 2726 FE9289C 4
+. 41 9C FF CC
+==== BB 2727 (0xFE92890) approx BBs exec'd 0 ====
+
+ 0xFE92890: 3B7F0001 addi r27,r31,1
+ 0: GETL R31, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0xFE92894: 409D0044 bc 4,29,0xFE928D8
+ 4: Jc29o $0xFE928D8
+
+
+
+. 2727 FE92890 8
+. 3B 7F 00 01 40 9D 00 44
+==== BB 2728 (0xFE92898) approx BBs exec'd 0 ====
+
+ 0xFE92898: 7F9BE040 cmpl cr7,r27,r28
+ 0: GETL R27, t0
+ 1: GETL R28, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE9289C: 419CFFCC bc 12,28,0xFE92868
+ 5: Js28o $0xFE92868
+
+
+
+. 2728 FE92898 8
+. 7F 9B E0 40 41 9C FF CC
+==== BB 2729 (0xFE928A0) approx BBs exec'd 0 ====
+
+ 0xFE928A0: 80810034 lwz r4,52(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE928A4: 38600000 li r3,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE928A8: 82E1000C lwz r23,12(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0xFE928AC: 83010010 lwz r24,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R24
+ 17: INCEIPL $4
+
+ 0xFE928B0: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFE928B4: 83210014 lwz r25,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R25
+ 25: INCEIPL $4
+
+ 0xFE928B8: 83410018 lwz r26,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R26
+ 30: INCEIPL $4
+
+ 0xFE928BC: 8361001C lwz r27,28(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x1C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R27
+ 35: INCEIPL $4
+
+ 0xFE928C0: 83810020 lwz r28,32(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x20, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R28
+ 40: INCEIPL $4
+
+ 0xFE928C4: 83A10024 lwz r29,36(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x24, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R29
+ 45: INCEIPL $4
+
+ 0xFE928C8: 83C10028 lwz r30,40(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x28, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R30
+ 50: INCEIPL $4
+
+ 0xFE928CC: 83E1002C lwz r31,44(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x2C, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R31
+ 55: INCEIPL $4
+
+ 0xFE928D0: 38210030 addi r1,r1,48
+ 56: GETL R1, t44
+ 57: ADDL $0x30, t44
+ 58: PUTL t44, R1
+ 59: INCEIPL $4
+
+ 0xFE928D4: 4E800020 blr
+ 60: GETL LR, t46
+ 61: JMPo-r t46 ($4)
+
+
+
+. 2729 FE928A0 56
+. 80 81 00 34 38 60 00 00 82 E1 00 0C 83 01 00 10 7C 88 03 A6 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 2730 (0xFE8D6F0) approx BBs exec'd 0 ====
+
+ 0xFE8D6F0: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE8D6F4: 4186FEC4 bc 12,6,0xFE8D5B8
+ 4: Js06o $0xFE8D5B8
+
+
+
+. 2730 FE8D6F0 8
+. 2C 83 00 00 41 86 FE C4
+==== BB 2731 (0xFE8D660) approx BBs exec'd 0 ====
+
+ 0xFE8D660: 3AE00000 li r23,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R23
+ 2: INCEIPL $4
+
+ 0xFE8D664: 7C0004AC sync
+ 3: INCEIPL $4
+
+ 0xFE8D668: 7D00D828 lwarx r8,r0,r27
+ 4: GETL R27, t2
+ 5: LOCKo
+ 6: LDL (t2), t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0xFE8D66C: 7EE0D92D stwcx. r23,r0,r27
+ 9: GETL R27, t6
+ 10: GETL R23, t8
+ 11: LOCKo
+ 12: STL t8, (t6) (-rSo)
+ 13: ICRFL cr, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFE8D670: 40A2FFF8 bc 5,2,0xFE8D668
+ 15: Jc02o $0xFE8D668
+
+
+
+. 2731 FE8D660 20
+. 3A E0 00 00 7C 00 04 AC 7D 00 D8 28 7E E0 D9 2D 40 A2 FF F8
+==== BB 2732 (0xFE8D674) approx BBs exec'd 0 ====
+
+ 0xFE8D674: 2C080001 cmpi cr0,r8,1
+ 0: GETL R8, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8D678: 418100A0 bc 12,1,0xFE8D718
+ 5: Js01o $0xFE8D718
+
+
+
+. 2732 FE8D674 8
+. 2C 08 00 01 41 81 00 A0
+==== BB 2733 (0xFE8D67C) approx BBs exec'd 0 ====
+
+ 0xFE8D67C: 7EC3B378 or r3,r22,r22
+ 0: GETL R22, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8D680: 82C10044 lwz r22,68(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x44, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R22
+ 7: INCEIPL $4
+
+ 0xFE8D684: 82E1001C lwz r23,28(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x1C, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0xFE8D688: 7EC803A6 mtlr r22
+ 13: GETL R22, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFE8D68C: 83010020 lwz r24,32(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x20, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R24
+ 20: INCEIPL $4
+
+ 0xFE8D690: 82C10018 lwz r22,24(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x18, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R22
+ 25: INCEIPL $4
+
+ 0xFE8D694: 83210024 lwz r25,36(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x24, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R25
+ 30: INCEIPL $4
+
+ 0xFE8D698: 83410028 lwz r26,40(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x28, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R26
+ 35: INCEIPL $4
+
+ 0xFE8D69C: 8361002C lwz r27,44(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x2C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R27
+ 40: INCEIPL $4
+
+ 0xFE8D6A0: 83810030 lwz r28,48(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x30, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R28
+ 45: INCEIPL $4
+
+ 0xFE8D6A4: 83A10034 lwz r29,52(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x34, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R29
+ 50: INCEIPL $4
+
+ 0xFE8D6A8: 83C10038 lwz r30,56(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x38, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R30
+ 55: INCEIPL $4
+
+ 0xFE8D6AC: 83E1003C lwz r31,60(r1)
+ 56: GETL R1, t44
+ 57: ADDL $0x3C, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R31
+ 60: INCEIPL $4
+
+ 0xFE8D6B0: 38210040 addi r1,r1,64
+ 61: GETL R1, t48
+ 62: ADDL $0x40, t48
+ 63: PUTL t48, R1
+ 64: INCEIPL $4
+
+ 0xFE8D6B4: 4E800020 blr
+ 65: GETL LR, t50
+ 66: JMPo-r t50 ($4)
+
+
+
+. 2733 FE8D67C 60
+. 7E C3 B3 78 82 C1 00 44 82 E1 00 1C 7E C8 03 A6 83 01 00 20 82 C1 00 18 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+==== BB 2734 (0xFE8B8A8) approx BBs exec'd 0 ====
+
+ 0xFE8B8A8: 2E030000 cmpi cr4,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFE8B8AC: 41920014 bc 12,18,0xFE8B8C0
+ 4: Js18o $0xFE8B8C0
+
+
+
+. 2734 FE8B8A8 8
+. 2E 03 00 00 41 92 00 14
+==== BB 2735 (0xFE8B8C0) approx BBs exec'd 0 ====
+
+ 0xFE8B8C0: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8B8C4: 38810018 addi r4,r1,24
+ 3: GETL R1, t2
+ 4: ADDL $0x18, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0xFE8B8C8: 38A1001C addi r5,r1,28
+ 7: GETL R1, t4
+ 8: ADDL $0x1C, t4
+ 9: PUTL t4, R5
+ 10: INCEIPL $4
+
+ 0xFE8B8CC: 38C10020 addi r6,r1,32
+ 11: GETL R1, t6
+ 12: ADDL $0x20, t6
+ 13: PUTL t6, R6
+ 14: INCEIPL $4
+
+ 0xFE8B8D0: 38E10024 addi r7,r1,36
+ 15: GETL R1, t8
+ 16: ADDL $0x24, t8
+ 17: PUTL t8, R7
+ 18: INCEIPL $4
+
+ 0xFE8B8D4: 39010028 addi r8,r1,40
+ 19: GETL R1, t10
+ 20: ADDL $0x28, t10
+ 21: PUTL t10, R8
+ 22: INCEIPL $4
+
+ 0xFE8B8D8: 480026E9 bl 0xFE8DFC0
+ 23: MOVL $0xFE8B8DC, t12
+ 24: PUTL t12, LR
+ 25: JMPo-c $0xFE8DFC0 ($4)
+
+
+
+. 2735 FE8B8C0 28
+. 7F 43 D3 78 38 81 00 18 38 A1 00 1C 38 C1 00 20 38 E1 00 24 39 01 00 28 48 00 26 E9
+==== BB 2736 _nl_explode_name(0xFE8DFC0) approx BBs exec'd 0 ====
+
+ 0xFE8DFC0: 7D2802A6 mflr r9
+ 0: GETL LR, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0xFE8DFC4: 9421FFD0 stwu r1,-48(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFD0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFE8DFC8: 38000000 li r0,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0xFE8DFCC: 93010010 stw r24,16(r1)
+ 12: GETL R24, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFE8DFD0: 93210014 stw r25,20(r1)
+ 17: GETL R25, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFE8DFD4: 7CB82B78 or r24,r5,r5
+ 22: GETL R5, t16
+ 23: PUTL t16, R24
+ 24: INCEIPL $4
+
+ 0xFE8DFD8: 91210034 stw r9,52(r1)
+ 25: GETL R9, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x34, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFE8DFDC: 7D194378 or r25,r8,r8
+ 30: GETL R8, t22
+ 31: PUTL t22, R25
+ 32: INCEIPL $4
+
+ 0xFE8DFE0: 90050000 stw r0,0(r5)
+ 33: GETL R0, t24
+ 34: GETL R5, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xFE8DFE4: 7C6A1B78 or r10,r3,r3
+ 37: GETL R3, t28
+ 38: PUTL t28, R10
+ 39: INCEIPL $4
+
+ 0xFE8DFE8: 90060000 stw r0,0(r6)
+ 40: GETL R0, t30
+ 41: GETL R6, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFE8DFEC: 9361001C stw r27,28(r1)
+ 44: GETL R27, t34
+ 45: GETL R1, t36
+ 46: ADDL $0x1C, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0xFE8DFF0: 7CFB3B78 or r27,r7,r7
+ 49: GETL R7, t38
+ 50: PUTL t38, R27
+ 51: INCEIPL $4
+
+ 0xFE8DFF4: 90070000 stw r0,0(r7)
+ 52: GETL R0, t40
+ 53: GETL R7, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0xFE8DFF8: 93810020 stw r28,32(r1)
+ 56: GETL R28, t44
+ 57: GETL R1, t46
+ 58: ADDL $0x20, t46
+ 59: STL t44, (t46)
+ 60: INCEIPL $4
+
+ 0xFE8DFFC: 3B800000 li r28,0
+ 61: MOVL $0x0, t48
+ 62: PUTL t48, R28
+ 63: INCEIPL $4
+
+ 0xFE8E000: 93A10024 stw r29,36(r1)
+ 64: GETL R29, t50
+ 65: GETL R1, t52
+ 66: ADDL $0x24, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0xFE8E004: 7CDD3378 or r29,r6,r6
+ 69: GETL R6, t54
+ 70: PUTL t54, R29
+ 71: INCEIPL $4
+
+ 0xFE8E008: 90080000 stw r0,0(r8)
+ 72: GETL R0, t56
+ 73: GETL R8, t58
+ 74: STL t56, (t58)
+ 75: INCEIPL $4
+
+ 0xFE8E00C: 93410018 stw r26,24(r1)
+ 76: GETL R26, t60
+ 77: GETL R1, t62
+ 78: ADDL $0x18, t62
+ 79: STL t60, (t62)
+ 80: INCEIPL $4
+
+ 0xFE8E010: 93C10028 stw r30,40(r1)
+ 81: GETL R30, t64
+ 82: GETL R1, t66
+ 83: ADDL $0x28, t66
+ 84: STL t64, (t66)
+ 85: INCEIPL $4
+
+ 0xFE8E014: 93E1002C stw r31,44(r1)
+ 86: GETL R31, t68
+ 87: GETL R1, t70
+ 88: ADDL $0x2C, t70
+ 89: STL t68, (t70)
+ 90: INCEIPL $4
+
+ 0xFE8E018: 90640000 stw r3,0(r4)
+ 91: GETL R3, t72
+ 92: GETL R4, t74
+ 93: STL t72, (t74)
+ 94: INCEIPL $4
+
+ 0xFE8E01C: 88030000 lbz r0,0(r3)
+ 95: GETL R3, t76
+ 96: LDB (t76), t78
+ 97: PUTL t78, R0
+ 98: INCEIPL $4
+
+ 0xFE8E020: 2F800000 cmpi cr7,r0,0
+ 99: GETL R0, t80
+ 100: CMP0L t80, t82 (-rSo)
+ 101: ICRFL t82, $0x7, CR
+ 102: INCEIPL $4
+
+ 0xFE8E024: 419E0040 bc 12,30,0xFE8E064
+ 103: Js30o $0xFE8E064
+
+
+
+. 2736 FE8DFC0 104
+. 7D 28 02 A6 94 21 FF D0 38 00 00 00 93 01 00 10 93 21 00 14 7C B8 2B 78 91 21 00 34 7D 19 43 78 90 05 00 00 7C 6A 1B 78 90 06 00 00 93 61 00 1C 7C FB 3B 78 90 07 00 00 93 81 00 20 3B 80 00 00 93 A1 00 24 7C DD 33 78 90 08 00 00 93 41 00 18 93 C1 00 28 93 E1 00 2C 90 64 00 00 88 03 00 00 2F 80 00 00 41 9E 00 40
+==== BB 2737 (0xFE8E028) approx BBs exec'd 0 ====
+
+ 0xFE8E028: 2C00005F cmpi cr0,r0,95
+ 0: GETL R0, t0
+ 1: MOVL $0x5F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8E02C: 41820038 bc 12,2,0xFE8E064
+ 5: Js02o $0xFE8E064
+
+
+
+. 2737 FE8E028 8
+. 2C 00 00 5F 41 82 00 38
+==== BB 2738 (0xFE8E030) approx BBs exec'd 0 ====
+
+ 0xFE8E030: 2C800040 cmpi cr1,r0,64
+ 0: GETL R0, t0
+ 1: MOVL $0x40, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFE8E034: 41860030 bc 12,6,0xFE8E064
+ 5: Js06o $0xFE8E064
+
+
+
+. 2738 FE8E030 8
+. 2C 80 00 40 41 86 00 30
+==== BB 2739 (0xFE8E038) approx BBs exec'd 0 ====
+
+ 0xFE8E038: 2F00002E cmpi cr6,r0,46
+ 0: GETL R0, t0
+ 1: MOVL $0x2E, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFE8E03C: 419A0028 bc 12,26,0xFE8E064
+ 5: Js26o $0xFE8E064
+
+
+
+. 2739 FE8E038 8
+. 2F 00 00 2E 41 9A 00 28
+==== BB 2740 (0xFE8E040) approx BBs exec'd 0 ====
+
+ 0xFE8E040: 8C8A0001 lbzu r4,1(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R10
+ 3: LDB (t0), t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE8E044: 2F840000 cmpi cr7,r4,0
+ 6: GETL R4, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFE8E048: 2C04002E cmpi cr0,r4,46
+ 10: GETL R4, t8
+ 11: MOVL $0x2E, t12
+ 12: CMPL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFE8E04C: 2F04005F cmpi cr6,r4,95
+ 15: GETL R4, t14
+ 16: MOVL $0x5F, t18
+ 17: CMPL t14, t18, t16 (-rSo)
+ 18: ICRFL t16, $0x6, CR
+ 19: INCEIPL $4
+
+ 0xFE8E050: 2C840040 cmpi cr1,r4,64
+ 20: GETL R4, t20
+ 21: MOVL $0x40, t24
+ 22: CMPL t20, t24, t22 (-rSo)
+ 23: ICRFL t22, $0x1, CR
+ 24: INCEIPL $4
+
+ 0xFE8E054: 419E0010 bc 12,30,0xFE8E064
+ 25: Js30o $0xFE8E064
+
+
+
+. 2740 FE8E040 24
+. 8C 8A 00 01 2F 84 00 00 2C 04 00 2E 2F 04 00 5F 2C 84 00 40 41 9E 00 10
+==== BB 2741 (0xFE8E058) approx BBs exec'd 0 ====
+
+ 0xFE8E058: 419A000C bc 12,26,0xFE8E064
+ 0: Js26o $0xFE8E064
+
+
+
+. 2741 FE8E058 4
+. 41 9A 00 0C
+==== BB 2742 (0xFE8E05C) approx BBs exec'd 0 ====
+
+ 0xFE8E05C: 41860008 bc 12,6,0xFE8E064
+ 0: Js06o $0xFE8E064
+
+
+
+. 2742 FE8E05C 4
+. 41 86 00 08
+==== BB 2743 (0xFE8E060) approx BBs exec'd 0 ====
+
+ 0xFE8E060: 4082FFE0 bc 4,2,0xFE8E040
+ 0: Jc02o $0xFE8E040
+
+
+
+. 2743 FE8E060 4
+. 40 82 FF E0
+==== BB 2744 (0xFE8E064) approx BBs exec'd 0 ====
+
+ 0xFE8E064: 7C035000 cmp cr0,r3,r10
+ 0: GETL R3, t0
+ 1: GETL R10, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8E068: 7D5F5378 or r31,r10,r10
+ 5: GETL R10, t6
+ 6: PUTL t6, R31
+ 7: INCEIPL $4
+
+ 0xFE8E06C: 418200BC bc 12,2,0xFE8E128
+ 8: Js02o $0xFE8E128
+
+
+
+. 2744 FE8E064 12
+. 7C 03 50 00 7D 5F 53 78 41 82 00 BC
+==== BB 2745 (0xFE8E070) approx BBs exec'd 0 ====
+
+ 0xFE8E070: 886A0000 lbz r3,0(r10)
+ 0: GETL R10, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE8E074: 2C830040 cmpi cr1,r3,64
+ 4: GETL R3, t4
+ 5: MOVL $0x40, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFE8E078: 7C691B78 or r9,r3,r3
+ 9: GETL R3, t10
+ 10: PUTL t10, R9
+ 11: INCEIPL $4
+
+ 0xFE8E07C: 41860014 bc 12,6,0xFE8E090
+ 12: Js06o $0xFE8E090
+
+
+
+. 2745 FE8E070 16
+. 88 6A 00 00 2C 83 00 40 7C 69 1B 78 41 86 00 14
+==== BB 2746 (0xFE8E080) approx BBs exec'd 0 ====
+
+ 0xFE8E080: 2F03005F cmpi cr6,r3,95
+ 0: GETL R3, t0
+ 1: MOVL $0x5F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFE8E084: 419A013C bc 12,26,0xFE8E1C0
+ 5: Js26o $0xFE8E1C0
+
+
+
+. 2746 FE8E080 8
+. 2F 03 00 5F 41 9A 01 3C
+==== BB 2747 (0xFE8E1C0) approx BBs exec'd 0 ====
+
+ 0xFE8E1C0: 38A00000 li r5,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFE8E1C4: 3BEA0001 addi r31,r10,1
+ 3: GETL R10, t2
+ 4: ADDL $0x1, t2
+ 5: PUTL t2, R31
+ 6: INCEIPL $4
+
+ 0xFE8E1C8: 98AA0000 stb r5,0(r10)
+ 7: GETL R5, t4
+ 8: GETL R10, t6
+ 9: STB t4, (t6)
+ 10: INCEIPL $4
+
+ 0xFE8E1CC: 93FD0000 stw r31,0(r29)
+ 11: GETL R31, t8
+ 12: GETL R29, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFE8E1D0: 892A0001 lbz r9,1(r10)
+ 15: GETL R10, t12
+ 16: ADDL $0x1, t12
+ 17: LDB (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0xFE8E1D4: 7D204B79 or. r0,r9,r9
+ 20: GETL R9, t16
+ 21: PUTL t16, R0
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x0, CR
+ 24: INCEIPL $4
+
+ 0xFE8E1D8: 41820030 bc 12,2,0xFE8E208
+ 25: Js02o $0xFE8E208
+
+
+
+. 2747 FE8E1C0 28
+. 38 A0 00 00 3B EA 00 01 98 AA 00 00 93 FD 00 00 89 2A 00 01 7D 20 4B 79 41 82 00 30
+==== BB 2748 (0xFE8E1DC) approx BBs exec'd 0 ====
+
+ 0xFE8E1DC: 2F80002E cmpi cr7,r0,46
+ 0: GETL R0, t0
+ 1: MOVL $0x2E, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE8E1E0: 419E0028 bc 12,30,0xFE8E208
+ 5: Js30o $0xFE8E208
+
+
+
+. 2748 FE8E1DC 8
+. 2F 80 00 2E 41 9E 00 28
+==== BB 2749 (0xFE8E1E4) approx BBs exec'd 0 ====
+
+ 0xFE8E1E4: 2C800040 cmpi cr1,r0,64
+ 0: GETL R0, t0
+ 1: MOVL $0x40, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFE8E1E8: 41860020 bc 12,6,0xFE8E208
+ 5: Js06o $0xFE8E208
+
+
+
+. 2749 FE8E1E4 8
+. 2C 80 00 40 41 86 00 20
+==== BB 2750 (0xFE8E1EC) approx BBs exec'd 0 ====
+
+ 0xFE8E1EC: 8D3F0001 lbzu r9,1(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R31
+ 3: LDB (t0), t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0xFE8E1F0: 7D264B79 or. r6,r9,r9
+ 6: GETL R9, t4
+ 7: PUTL t4, R6
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0xFE8E1F4: 2F060040 cmpi cr6,r6,64
+ 11: GETL R6, t8
+ 12: MOVL $0x40, t12
+ 13: CMPL t8, t12, t10 (-rSo)
+ 14: ICRFL t10, $0x6, CR
+ 15: INCEIPL $4
+
+ 0xFE8E1F8: 2F86002E cmpi cr7,r6,46
+ 16: GETL R6, t14
+ 17: MOVL $0x2E, t18
+ 18: CMPL t14, t18, t16 (-rSo)
+ 19: ICRFL t16, $0x7, CR
+ 20: INCEIPL $4
+
+ 0xFE8E1FC: 4182000C bc 12,2,0xFE8E208
+ 21: Js02o $0xFE8E208
+
+
+
+. 2750 FE8E1EC 20
+. 8D 3F 00 01 7D 26 4B 79 2F 06 00 40 2F 86 00 2E 41 82 00 0C
+==== BB 2751 (0xFE8E200) approx BBs exec'd 0 ====
+
+ 0xFE8E200: 419E0008 bc 12,30,0xFE8E208
+ 0: Js30o $0xFE8E208
+
+
+
+. 2751 FE8E200 4
+. 41 9E 00 08
+==== BB 2752 (0xFE8E204) approx BBs exec'd 0 ====
+
+ 0xFE8E204: 409AFFE8 bc 4,26,0xFE8E1EC
+ 0: Jc26o $0xFE8E1EC
+
+
+
+. 2752 FE8E204 4
+. 40 9A FF E8
+==== BB 2753 (0xFE8E208) approx BBs exec'd 0 ====
+
+ 0xFE8E208: 3B800004 li r28,4
+ 0: MOVL $0x4, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0xFE8E20C: 4BFFFE7C b 0xFE8E088
+ 3: JMPo $0xFE8E088 ($4)
+
+
+
+. 2753 FE8E208 8
+. 3B 80 00 04 4B FF FE 7C
+==== BB 2754 (0xFE8E088) approx BBs exec'd 0 ====
+
+ 0xFE8E088: 2F09002E cmpi cr6,r9,46
+ 0: GETL R9, t0
+ 1: MOVL $0x2E, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFE8E08C: 419A00B4 bc 12,26,0xFE8E140
+ 5: Js26o $0xFE8E140
+
+
+
+. 2754 FE8E088 8
+. 2F 09 00 2E 41 9A 00 B4
+==== BB 2755 (0xFE8E140) approx BBs exec'd 0 ====
+
+ 0xFE8E140: 38E00000 li r7,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0xFE8E144: 98FF0000 stb r7,0(r31)
+ 3: GETL R7, t2
+ 4: GETL R31, t4
+ 5: STB t2, (t4)
+ 6: INCEIPL $4
+
+ 0xFE8E148: 3BFF0001 addi r31,r31,1
+ 7: GETL R31, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R31
+ 10: INCEIPL $4
+
+ 0xFE8E14C: 93FB0000 stw r31,0(r27)
+ 11: GETL R31, t8
+ 12: GETL R27, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFE8E150: 7FE3FB78 or r3,r31,r31
+ 15: GETL R31, t12
+ 16: PUTL t12, R3
+ 17: INCEIPL $4
+
+ 0xFE8E154: 893F0000 lbz r9,0(r31)
+ 18: GETL R31, t14
+ 19: LDB (t14), t16
+ 20: PUTL t16, R9
+ 21: INCEIPL $4
+
+ 0xFE8E158: 7D204B79 or. r0,r9,r9
+ 22: GETL R9, t18
+ 23: PUTL t18, R0
+ 24: CMP0L t18, t20 (-rSo)
+ 25: ICRFL t20, $0x0, CR
+ 26: INCEIPL $4
+
+ 0xFE8E15C: 4182001C bc 12,2,0xFE8E178
+ 27: Js02o $0xFE8E178
+
+
+
+. 2755 FE8E140 32
+. 38 E0 00 00 98 FF 00 00 3B FF 00 01 93 FB 00 00 7F E3 FB 78 89 3F 00 00 7D 20 4B 79 41 82 00 1C
+==== BB 2756 (0xFE8E160) approx BBs exec'd 0 ====
+
+ 0xFE8E160: 2F800040 cmpi cr7,r0,64
+ 0: GETL R0, t0
+ 1: MOVL $0x40, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE8E164: 419E0014 bc 12,30,0xFE8E178
+ 5: Js30o $0xFE8E178
+
+
+
+. 2756 FE8E160 8
+. 2F 80 00 40 41 9E 00 14
+==== BB 2757 (0xFE8E168) approx BBs exec'd 0 ====
+
+ 0xFE8E168: 8D3F0001 lbzu r9,1(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R31
+ 3: LDB (t0), t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0xFE8E16C: 7D284B79 or. r8,r9,r9
+ 6: GETL R9, t4
+ 7: PUTL t4, R8
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0xFE8E170: 2F880040 cmpi cr7,r8,64
+ 11: GETL R8, t8
+ 12: MOVL $0x40, t12
+ 13: CMPL t8, t12, t10 (-rSo)
+ 14: ICRFL t10, $0x7, CR
+ 15: INCEIPL $4
+
+ 0xFE8E174: 4082FFF0 bc 4,2,0xFE8E164
+ 16: Jc02o $0xFE8E164
+
+
+
+. 2757 FE8E168 16
+. 8D 3F 00 01 7D 28 4B 79 2F 88 00 40 40 82 FF F0
+==== BB 2758 (0xFE8E164) approx BBs exec'd 0 ====
+
+ 0xFE8E164: 419E0014 bc 12,30,0xFE8E178
+ 0: Js30o $0xFE8E178
+
+
+
+. 2758 FE8E164 4
+. 41 9E 00 14
+==== BB 2759 (0xFE8E178) approx BBs exec'd 0 ====
+
+ 0xFE8E178: 7F83F800 cmp cr7,r3,r31
+ 0: GETL R3, t0
+ 1: GETL R31, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE8E17C: 639C0002 ori r28,r28,0x2
+ 5: GETL R28, t6
+ 6: ORL $0x2, t6
+ 7: PUTL t6, R28
+ 8: INCEIPL $4
+
+ 0xFE8E180: 41BEFF10 bc 13,30,0xFE8E090
+ 9: Js30o $0xFE8E090
+
+
+
+. 2759 FE8E178 12
+. 7F 83 F8 00 63 9C 00 02 41 BE FF 10
+==== BB 2760 (0xFE8E184) approx BBs exec'd 0 ====
+
+ 0xFE8E184: 89430000 lbz r10,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFE8E188: 2C8A0000 cmpi cr1,r10,0
+ 4: GETL R10, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFE8E18C: 4186FF04 bc 12,6,0xFE8E090
+ 8: Js06o $0xFE8E090
+
+
+
+. 2760 FE8E184 12
+. 89 43 00 00 2C 8A 00 00 41 86 FF 04
+==== BB 2761 (0xFE8E190) approx BBs exec'd 0 ====
+
+ 0xFE8E190: 7C83F850 subf r4,r3,r31
+ 0: GETL R3, t0
+ 1: GETL R31, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE8E194: 4BFFFC11 bl 0xFE8DDA4
+ 5: MOVL $0xFE8E198, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0xFE8DDA4 ($4)
+
+
+
+. 2761 FE8E190 8
+. 7C 83 F8 50 4B FF FC 11
+==== BB 2762 (0xFECF85C) approx BBs exec'd 0 ====
+
+ 0xFECF85C: 7C9AE800 cmp cr1,r26,r29
+ 0: GETL R26, t0
+ 1: GETL R29, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFECF860: 41860214 bc 12,6,0xFECFA74
+ 5: Js06o $0xFECFA74
+
+
+
+. 2762 FECF85C 8
+. 7C 9A E8 00 41 86 02 14
+==== BB 2763 (0xFECFA74) approx BBs exec'd 0 ====
+
+ 0xFECFA74: 837C0034 lwz r27,52(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xFECFA78: 7F1BF800 cmp cr6,r27,r31
+ 5: GETL R27, t4
+ 6: GETL R31, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFECFA7C: 409AFDE8 bc 4,26,0xFECF864
+ 10: Jc26o $0xFECF864
+
+
+
+. 2763 FECFA74 12
+. 83 7C 00 34 7F 1B F8 00 40 9A FD E8
+==== BB 2764 (0xFECFA38) approx BBs exec'd 0 ====
+
+ 0xFECFA38: 7CC02839 and. r0,r6,r5
+ 0: GETL R6, t0
+ 1: GETL R5, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFECFA3C: 40820014 bc 4,2,0xFECFA50
+ 7: Jc02o $0xFECFA50
+
+
+
+. 2764 FECFA38 8
+. 7C C0 28 39 40 82 00 14
+==== BB 2765 (0xFECFA40) approx BBs exec'd 0 ====
+
+ 0xFECFA40: 54C6083C rlwinm r6,r6,1,0,30
+ 0: GETL R6, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0xFECFA44: 396B0008 addi r11,r11,8
+ 4: GETL R11, t2
+ 5: ADDL $0x8, t2
+ 6: PUTL t2, R11
+ 7: INCEIPL $4
+
+ 0xFECFA48: 7CC92839 and. r9,r6,r5
+ 8: GETL R6, t4
+ 9: GETL R5, t6
+ 10: ANDL t4, t6
+ 11: PUTL t6, R9
+ 12: CMP0L t6, t8 (-rSo)
+ 13: ICRFL t8, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFECFA4C: 4182FFF4 bc 12,2,0xFECFA40
+ 15: Js02o $0xFECFA40
+
+
+
+. 2765 FECFA40 16
+. 54 C6 08 3C 39 6B 00 08 7C C9 28 39 41 82 FF F4
+==== BB 2766 (0xFECFA50) approx BBs exec'd 0 ====
+
+ 0xFECFA50: 814B000C lwz r10,12(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFECFA54: 7F8A5800 cmp cr7,r10,r11
+ 5: GETL R10, t4
+ 6: GETL R11, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFECFA58: 409E01BC bc 4,30,0xFECFC14
+ 10: Jc30o $0xFECFC14
+
+
+
+. 2766 FECFA50 12
+. 81 4B 00 0C 7F 8A 58 00 40 9E 01 BC
+==== BB 2767 (0xFECFA5C) approx BBs exec'd 0 ====
+
+ 0xFECFA5C: 7CA53078 andc r5,r5,r6
+ 0: GETL R5, t0
+ 1: GETL R6, t2
+ 2: NOTL t2
+ 3: ANDL t0, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFECFA60: 7F03E214 add r24,r3,r28
+ 6: GETL R3, t4
+ 7: GETL R28, t6
+ 8: ADDL t4, t6
+ 9: PUTL t6, R24
+ 10: INCEIPL $4
+
+ 0xFECFA64: 396A0008 addi r11,r10,8
+ 11: GETL R10, t8
+ 12: ADDL $0x8, t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0xFECFA68: 54C6083C rlwinm r6,r6,1,0,30
+ 15: GETL R6, t10
+ 16: SHLL $0x1, t10
+ 17: PUTL t10, R6
+ 18: INCEIPL $4
+
+ 0xFECFA6C: 90B80438 stw r5,1080(r24)
+ 19: GETL R5, t12
+ 20: GETL R24, t14
+ 21: ADDL $0x438, t14
+ 22: STL t12, (t14)
+ 23: INCEIPL $4
+
+ 0xFECFA70: 4BFFFF7C b 0xFECF9EC
+ 24: JMPo $0xFECF9EC ($4)
+
+
+
+. 2767 FECFA5C 24
+. 7C A5 30 78 7F 03 E2 14 39 6A 00 08 54 C6 08 3C 90 B8 04 38 4B FF FF 7C
+==== BB 2768 (0xFECF9EC) approx BBs exec'd 0 ====
+
+ 0xFECF9EC: 21260000 subfic r9,r6,0
+ 0: GETL R6, t0
+ 1: MOVL $0x0, t2
+ 2: SBBL t0, t2 (-wCa)
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFECF9F0: 7EA93114 adde r21,r9,r6
+ 5: GETL R9, t4
+ 6: GETL R6, t6
+ 7: ADCL t4, t6 (-rCa-wCa)
+ 8: PUTL t6, R21
+ 9: INCEIPL $4
+
+ 0xFECF9F4: 7D262810 subfc r9,r6,r5
+ 10: GETL R6, t8
+ 11: GETL R5, t10
+ 12: SBBL t8, t10 (-wCa)
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0xFECF9F8: 7D294910 subfe r9,r9,r9
+ 15: GETL R9, t12
+ 16: GETL R9, t14
+ 17: SBBL t12, t14 (-rCa-wCa)
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0xFECF9FC: 7D2900D0 neg r9,r9
+ 20: GETL R9, t16
+ 21: NEGL t16
+ 22: PUTL t16, R9
+ 23: INCEIPL $4
+
+ 0xFECFA00: 7D2AAB79 or. r10,r9,r21
+ 24: GETL R9, t18
+ 25: GETL R21, t20
+ 26: ORL t20, t18
+ 27: PUTL t18, R10
+ 28: CMP0L t18, t22 (-rSo)
+ 29: ICRFL t22, $0x0, CR
+ 30: INCEIPL $4
+
+ 0xFECFA04: 41820034 bc 12,2,0xFECFA38
+ 31: Js02o $0xFECFA38
+
+
+
+. 2768 FECF9EC 28
+. 21 26 00 00 7E A9 31 14 7D 26 28 10 7D 29 49 10 7D 29 00 D0 7D 2A AB 79 41 82 00 34
+==== BB 2769 (0xFECFA30) approx BBs exec'd 0 ====
+
+ 0xFECFA30: 39680030 addi r11,r8,48
+ 0: GETL R8, t0
+ 1: ADDL $0x30, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFECFA34: 38C00001 li r6,1
+ 4: MOVL $0x1, t2
+ 5: PUTL t2, R6
+ 6: INCEIPL $4
+
+ 0xFECFA38: 7CC02839 and. r0,r6,r5
+ 7: GETL R6, t4
+ 8: GETL R5, t6
+ 9: ANDL t4, t6
+ 10: PUTL t6, R0
+ 11: CMP0L t6, t8 (-rSo)
+ 12: ICRFL t8, $0x0, CR
+ 13: INCEIPL $4
+
+ 0xFECFA3C: 40820014 bc 4,2,0xFECFA50
+ 14: Jc02o $0xFECFA50
+
+
+
+. 2769 FECFA30 16
+. 39 68 00 30 38 C0 00 01 7C C0 28 39 40 82 00 14
+==== BB 2770 (0xFECFC14) approx BBs exec'd 0 ====
+
+ 0xFECFC14: 806A0004 lwz r3,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECFC18: 808A000C lwz r4,12(r10)
+ 5: GETL R10, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFECFC1C: 54600038 rlwinm r0,r3,0,0,28
+ 10: GETL R3, t8
+ 11: ANDL $0xFFFFFFF8, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0xFECFC20: 7CF90050 subf r7,r25,r0
+ 14: GETL R25, t10
+ 15: GETL R0, t12
+ 16: SUBL t10, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0xFECFC24: 91640008 stw r11,8(r4)
+ 19: GETL R11, t14
+ 20: GETL R4, t16
+ 21: ADDL $0x8, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFECFC28: 2A07000F cmpli cr4,r7,15
+ 24: GETL R7, t18
+ 25: MOVL $0xF, t22
+ 26: CMPUL t18, t22, t20 (-rSo)
+ 27: ICRFL t20, $0x4, CR
+ 28: INCEIPL $4
+
+ 0xFECFC2C: 908B000C stw r4,12(r11)
+ 29: GETL R4, t24
+ 30: GETL R11, t26
+ 31: ADDL $0xC, t26
+ 32: STL t24, (t26)
+ 33: INCEIPL $4
+
+ 0xFECFC30: 41910054 bc 12,17,0xFECFC84
+ 34: Js17o $0xFECFC84
+
+
+
+. 2770 FECFC14 32
+. 80 6A 00 04 80 8A 00 0C 54 60 00 38 7C F9 00 50 91 64 00 08 2A 07 00 0F 90 8B 00 0C 41 91 00 54
+==== BB 2771 (0xFECFC84) approx BBs exec'd 0 ====
+
+ 0xFECFC84: 7C6ACA14 add r3,r10,r25
+ 0: GETL R10, t0
+ 1: GETL R25, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECFC88: 907C0040 stw r3,64(r28)
+ 5: GETL R3, t4
+ 6: GETL R28, t6
+ 7: ADDL $0x40, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECFC8C: 907C0044 stw r3,68(r28)
+ 10: GETL R3, t8
+ 11: GETL R28, t10
+ 12: ADDL $0x44, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFECFC90: 93430008 stw r26,8(r3)
+ 15: GETL R26, t12
+ 16: GETL R3, t14
+ 17: ADDL $0x8, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFECFC94: 9343000C stw r26,12(r3)
+ 20: GETL R26, t16
+ 21: GETL R3, t18
+ 22: ADDL $0xC, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0xFECFC98: 41850008 bc 12,5,0xFECFCA0
+ 25: Js05o $0xFECFCA0
+
+
+
+. 2771 FECFC84 24
+. 7C 6A CA 14 90 7C 00 40 90 7C 00 44 93 43 00 08 93 43 00 0C 41 85 00 08
+==== BB 2772 (0xFECFC9C) approx BBs exec'd 0 ====
+
+ 0xFECFC9C: 907C0034 stw r3,52(r28)
+ 0: GETL R3, t0
+ 1: GETL R28, t2
+ 2: ADDL $0x34, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECFCA0: 57AF103A rlwinm r15,r29,2,0,29
+ 5: GETL R29, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R15
+ 8: INCEIPL $4
+
+ 0xFECFCA4: 60F20001 ori r18,r7,0x1
+ 9: GETL R7, t6
+ 10: ORL $0x1, t6
+ 11: PUTL t6, R18
+ 12: INCEIPL $4
+
+ 0xFECFCA8: 7DF69B78 or r22,r15,r19
+ 13: GETL R15, t8
+ 14: GETL R19, t10
+ 15: ORL t10, t8
+ 16: PUTL t8, R22
+ 17: INCEIPL $4
+
+ 0xFECFCAC: 390A0008 addi r8,r10,8
+ 18: GETL R10, t12
+ 19: ADDL $0x8, t12
+ 20: PUTL t12, R8
+ 21: INCEIPL $4
+
+ 0xFECFCB0: 92CA0004 stw r22,4(r10)
+ 22: GETL R22, t14
+ 23: GETL R10, t16
+ 24: ADDL $0x4, t16
+ 25: STL t14, (t16)
+ 26: INCEIPL $4
+
+ 0xFECFCB4: 7CE3392E stwx r7,r3,r7
+ 27: GETL R7, t18
+ 28: GETL R3, t20
+ 29: ADDL t20, t18
+ 30: GETL R7, t22
+ 31: STL t22, (t18)
+ 32: INCEIPL $4
+
+ 0xFECFCB8: 92430004 stw r18,4(r3)
+ 33: GETL R18, t24
+ 34: GETL R3, t26
+ 35: ADDL $0x4, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0xFECFCBC: 4BFFF9F4 b 0xFECF6B0
+ 38: JMPo $0xFECF6B0 ($4)
+
+
+
+. 2772 FECFC9C 36
+. 90 7C 00 34 57 AF 10 3A 60 F2 00 01 7D F6 9B 78 39 0A 00 08 92 CA 00 04 7C E3 39 2E 92 43 00 04 4B FF F9 F4
+==== BB 2773 (0xFE8E198) approx BBs exec'd 0 ====
+
+ 0xFE8E198: 90790000 stw r3,0(r25)
+ 0: GETL R3, t0
+ 1: GETL R25, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE8E19C: 7C7A1B78 or r26,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R26
+ 6: INCEIPL $4
+
+ 0xFE8E1A0: 807B0000 lwz r3,0(r27)
+ 7: GETL R27, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R3
+ 10: INCEIPL $4
+
+ 0xFE8E1A4: 7F44D378 or r4,r26,r26
+ 11: GETL R26, t10
+ 12: PUTL t10, R4
+ 13: INCEIPL $4
+
+ 0xFE8E1A8: 48048209 bl 0xFED63B0
+ 14: MOVL $0xFE8E1AC, t12
+ 15: PUTL t12, LR
+ 16: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2773 FE8E198 20
+. 90 79 00 00 7C 7A 1B 78 80 7B 00 00 7F 44 D3 78 48 04 82 09
+==== BB 2774 (0xFE8E1AC) approx BBs exec'd 0 ====
+
+ 0xFE8E1AC: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE8E1B0: 419A0060 bc 12,26,0xFE8E210
+ 4: Js26o $0xFE8E210
+
+
+
+. 2774 FE8E1AC 8
+. 2F 03 00 00 41 9A 00 60
+==== BB 2775 (0xFE8E1B4) approx BBs exec'd 0 ====
+
+ 0xFE8E1B4: 893F0000 lbz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFE8E1B8: 639C0001 ori r28,r28,0x1
+ 4: GETL R28, t4
+ 5: ORL $0x1, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFE8E1BC: 4BFFFED4 b 0xFE8E090
+ 8: JMPo $0xFE8E090 ($4)
+
+
+
+. 2775 FE8E1B4 12
+. 89 3F 00 00 63 9C 00 01 4B FF FE D4
+==== BB 2776 (0xFE8E090) approx BBs exec'd 0 ====
+
+ 0xFE8E090: 2C090040 cmpi cr0,r9,64
+ 0: GETL R9, t0
+ 1: MOVL $0x40, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8E094: 41820070 bc 12,2,0xFE8E104
+ 5: Js02o $0xFE8E104
+
+
+
+. 2776 FE8E090 8
+. 2C 09 00 40 41 82 00 70
+==== BB 2777 (0xFE8E098) approx BBs exec'd 0 ====
+
+ 0xFE8E098: 80DD0000 lwz r6,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFE8E09C: 2C860000 cmpi cr1,r6,0
+ 4: GETL R6, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFE8E0A0: 41860014 bc 12,6,0xFE8E0B4
+ 8: Js06o $0xFE8E0B4
+
+
+
+. 2777 FE8E098 12
+. 80 DD 00 00 2C 86 00 00 41 86 00 14
+==== BB 2778 (0xFE8E0A4) approx BBs exec'd 0 ====
+
+ 0xFE8E0A4: 8B060000 lbz r24,0(r6)
+ 0: GETL R6, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R24
+ 3: INCEIPL $4
+
+ 0xFE8E0A8: 2F180000 cmpi cr6,r24,0
+ 4: GETL R24, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0xFE8E0AC: 409A0008 bc 4,26,0xFE8E0B4
+ 8: Jc26o $0xFE8E0B4
+
+
+
+. 2778 FE8E0A4 12
+. 8B 06 00 00 2F 18 00 00 40 9A 00 08
+==== BB 2779 (0xFE8E0B4) approx BBs exec'd 0 ====
+
+ 0xFE8E0B4: 807B0000 lwz r3,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE8E0B8: 2C030000 cmpi cr0,r3,0
+ 4: GETL R3, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFE8E0BC: 41820014 bc 12,2,0xFE8E0D0
+ 8: Js02o $0xFE8E0D0
+
+
+
+. 2779 FE8E0B4 12
+. 80 7B 00 00 2C 03 00 00 41 82 00 14
+==== BB 2780 (0xFE8E0C0) approx BBs exec'd 0 ====
+
+ 0xFE8E0C0: 8B430000 lbz r26,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R26
+ 3: INCEIPL $4
+
+ 0xFE8E0C4: 2F9A0000 cmpi cr7,r26,0
+ 4: GETL R26, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFE8E0C8: 409E0008 bc 4,30,0xFE8E0D0
+ 8: Jc30o $0xFE8E0D0
+
+
+
+. 2780 FE8E0C0 12
+. 8B 43 00 00 2F 9A 00 00 40 9E 00 08
+==== BB 2781 (0xFE8E0D0) approx BBs exec'd 0 ====
+
+ 0xFE8E0D0: 83610034 lwz r27,52(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xFE8E0D4: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE8E0D8: 83010010 lwz r24,16(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R24
+ 12: INCEIPL $4
+
+ 0xFE8E0DC: 7F6803A6 mtlr r27
+ 13: GETL R27, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFE8E0E0: 83210014 lwz r25,20(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x14, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R25
+ 20: INCEIPL $4
+
+ 0xFE8E0E4: 83410018 lwz r26,24(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x18, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R26
+ 25: INCEIPL $4
+
+ 0xFE8E0E8: 8361001C lwz r27,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R27
+ 30: INCEIPL $4
+
+ 0xFE8E0EC: 83810020 lwz r28,32(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R28
+ 35: INCEIPL $4
+
+ 0xFE8E0F0: 83A10024 lwz r29,36(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x24, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R29
+ 40: INCEIPL $4
+
+ 0xFE8E0F4: 83C10028 lwz r30,40(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x28, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R30
+ 45: INCEIPL $4
+
+ 0xFE8E0F8: 83E1002C lwz r31,44(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x2C, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R31
+ 50: INCEIPL $4
+
+ 0xFE8E0FC: 38210030 addi r1,r1,48
+ 51: GETL R1, t40
+ 52: ADDL $0x30, t40
+ 53: PUTL t40, R1
+ 54: INCEIPL $4
+
+ 0xFE8E100: 4E800020 blr
+ 55: GETL LR, t42
+ 56: JMPo-r t42 ($4)
+
+
+
+. 2781 FE8E0D0 52
+. 83 61 00 34 7F 83 E3 78 83 01 00 10 7F 68 03 A6 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 2782 (0xFE8B8DC) approx BBs exec'd 0 ====
+
+ 0xFE8B8DC: 801C00A4 lwz r0,164(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0xA4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE8B8E0: 7C781B78 or r24,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R24
+ 7: INCEIPL $4
+
+ 0xFE8B8E4: 2F800000 cmpi cr7,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFE8B8E8: 409E00F8 bc 4,30,0xFE8B9E0
+ 12: Jc30o $0xFE8B9E0
+
+
+
+. 2782 FE8B8DC 16
+. 80 1C 00 A4 7C 78 1B 78 2F 80 00 00 40 9E 00 F8
+==== BB 2783 (0xFE8B8EC) approx BBs exec'd 0 ====
+
+ 0xFE8B8EC: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8B8F0: 4804B1E9 bl 0xFED6AD8
+ 3: MOVL $0xFE8B8F4, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2783 FE8B8EC 8
+. 7F A3 EB 78 48 04 B1 E9
+==== BB 2784 (0xFE8B8F4) approx BBs exec'd 0 ====
+
+ 0xFE8B8F4: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE8B8F8: 38A30001 addi r5,r3,1
+ 3: GETL R3, t2
+ 4: ADDL $0x1, t2
+ 5: PUTL t2, R5
+ 6: INCEIPL $4
+
+ 0xFE8B8FC: 83A1001C lwz r29,28(r1)
+ 7: GETL R1, t4
+ 8: ADDL $0x1C, t4
+ 9: LDL (t4), t6
+ 10: PUTL t6, R29
+ 11: INCEIPL $4
+
+ 0xFE8B900: 807E01A0 lwz r3,416(r30)
+ 12: GETL R30, t8
+ 13: ADDL $0x1A0, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0xFE8B904: 7F06C378 or r6,r24,r24
+ 17: GETL R24, t12
+ 18: PUTL t12, R6
+ 19: INCEIPL $4
+
+ 0xFE8B908: 80E10018 lwz r7,24(r1)
+ 20: GETL R1, t14
+ 21: ADDL $0x18, t14
+ 22: LDL (t14), t16
+ 23: PUTL t16, R7
+ 24: INCEIPL $4
+
+ 0xFE8B90C: 81010020 lwz r8,32(r1)
+ 25: GETL R1, t18
+ 26: ADDL $0x20, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R8
+ 29: INCEIPL $4
+
+ 0xFE8B910: 81210024 lwz r9,36(r1)
+ 30: GETL R1, t22
+ 31: ADDL $0x24, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R9
+ 34: INCEIPL $4
+
+ 0xFE8B914: 81410028 lwz r10,40(r1)
+ 35: GETL R1, t26
+ 36: ADDL $0x28, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R10
+ 39: INCEIPL $4
+
+ 0xFE8B918: 9321000C stw r25,12(r1)
+ 40: GETL R25, t30
+ 41: GETL R1, t32
+ 42: ADDL $0xC, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0xFE8B91C: 3B200001 li r25,1
+ 45: MOVL $0x1, t34
+ 46: PUTL t34, R25
+ 47: INCEIPL $4
+
+ 0xFE8B920: 93A10008 stw r29,8(r1)
+ 48: GETL R29, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x8, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0xFE8B924: 93210010 stw r25,16(r1)
+ 53: GETL R25, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x10, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0xFE8B928: 48001FD5 bl 0xFE8D8FC
+ 58: MOVL $0xFE8B92C, t44
+ 59: PUTL t44, LR
+ 60: JMPo-c $0xFE8D8FC ($4)
+
+
+
+. 2784 FE8B8F4 56
+. 7F A4 EB 78 38 A3 00 01 83 A1 00 1C 80 7E 01 A0 7F 06 C3 78 80 E1 00 18 81 01 00 20 81 21 00 24 81 41 00 28 93 21 00 0C 3B 20 00 01 93 A1 00 08 93 21 00 10 48 00 1F D5
+==== BB 2785 (0xFE8D99C) approx BBs exec'd 0 ====
+
+ 0xFE8D99C: 7E83A378 or r3,r20,r20
+ 0: GETL R20, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8D9A0: 48049139 bl 0xFED6AD8
+ 3: MOVL $0xFE8D9A4, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2785 FE8D99C 8
+. 7E 83 A3 78 48 04 91 39
+==== BB 2786 (0xFE8D9A4) approx BBs exec'd 0 ====
+
+ 0xFE8D9A4: 7C7D1A14 add r3,r29,r3
+ 0: GETL R29, t0
+ 1: GETL R3, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE8D9A8: 3BE30001 addi r31,r3,1
+ 5: GETL R3, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R31
+ 8: INCEIPL $4
+
+ 0xFE8D9AC: 5799F87E rlwinm r25,r28,31,1,31
+ 9: GETL R28, t6
+ 10: SHRL $0x1, t6
+ 11: PUTL t6, R25
+ 12: INCEIPL $4
+
+ 0xFE8D9B0: 7FFDFB78 or r29,r31,r31
+ 13: GETL R31, t8
+ 14: PUTL t8, R29
+ 15: INCEIPL $4
+
+ 0xFE8D9B4: 73200001 andi. r0,r25,0x1
+ 16: GETL R25, t10
+ 17: ANDL $0x1, t10
+ 18: PUTL t10, R0
+ 19: CMP0L t10, t12 (-rSo)
+ 20: ICRFL t12, $0x0, CR
+ 21: INCEIPL $4
+
+ 0xFE8D9B8: 41820014 bc 12,2,0xFE8D9CC
+ 22: Js02o $0xFE8D9CC
+
+
+
+. 2786 FE8D9A4 24
+. 7C 7D 1A 14 3B E3 00 01 57 99 F8 7E 7F FD FB 78 73 20 00 01 41 82 00 14
+==== BB 2787 (0xFE8D9BC) approx BBs exec'd 0 ====
+
+ 0xFE8D9BC: 7E639B78 or r3,r19,r19
+ 0: GETL R19, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8D9C0: 48049119 bl 0xFED6AD8
+ 3: MOVL $0xFE8D9C4, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2787 FE8D9BC 8
+. 7E 63 9B 78 48 04 91 19
+==== BB 2788 (0xFE8D9C4) approx BBs exec'd 0 ====
+
+ 0xFE8D9C4: 7C9F1A14 add r4,r31,r3
+ 0: GETL R31, t0
+ 1: GETL R3, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE8D9C8: 3BA40001 addi r29,r4,1
+ 5: GETL R4, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0xFE8D9CC: 73970001 andi. r23,r28,0x1
+ 9: GETL R28, t6
+ 10: ANDL $0x1, t6
+ 11: PUTL t6, R23
+ 12: CMP0L t6, t8 (-rSo)
+ 13: ICRFL t8, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFE8D9D0: 41820188 bc 12,2,0xFE8DB58
+ 15: Js02o $0xFE8DB58
+
+
+
+. 2788 FE8D9C4 16
+. 7C 9F 1A 14 3B A4 00 01 73 97 00 01 41 82 01 88
+==== BB 2789 (0xFE8D9D4) approx BBs exec'd 0 ====
+
+ 0xFE8D9D4: 7EA3AB78 or r3,r21,r21
+ 0: GETL R21, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8D9D8: 48049101 bl 0xFED6AD8
+ 3: MOVL $0xFE8D9DC, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2789 FE8D9D4 8
+. 7E A3 AB 78 48 04 91 01
+==== BB 2790 (0xFE8D9DC) approx BBs exec'd 0 ====
+
+ 0xFE8D9DC: 7CBD1A14 add r5,r29,r3
+ 0: GETL R29, t0
+ 1: GETL R3, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFE8D9E0: 3BE50001 addi r31,r5,1
+ 5: GETL R5, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R31
+ 8: INCEIPL $4
+
+ 0xFE8D9E4: 7E038378 or r3,r16,r16
+ 9: GETL R16, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0xFE8D9E8: 579BE8FE rlwinm r27,r28,29,3,31
+ 12: GETL R28, t8
+ 13: SHRL $0x3, t8
+ 14: PUTL t8, R27
+ 15: INCEIPL $4
+
+ 0xFE8D9EC: 480490ED bl 0xFED6AD8
+ 16: MOVL $0xFE8D9F0, t10
+ 17: PUTL t10, LR
+ 18: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2790 FE8D9DC 20
+. 7C BD 1A 14 3B E5 00 01 7E 03 83 78 57 9B E8 FE 48 04 90 ED
+==== BB 2791 (0xFECFA80) approx BBs exec'd 0 ====
+
+ 0xFECFA80: 38990010 addi r4,r25,16
+ 0: GETL R25, t0
+ 1: ADDL $0x10, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0xFECFA84: 7C045040 cmpl cr0,r4,r10
+ 4: GETL R4, t2
+ 5: GETL R10, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFECFA88: 4080FDDC bc 4,0,0xFECF864
+ 9: Jc00o $0xFECF864
+
+
+
+. 2791 FECFA80 12
+. 38 99 00 10 7C 04 50 40 40 80 FD DC
+==== BB 2792 (0xFECFA8C) approx BBs exec'd 0 ====
+
+ 0xFECFA8C: 813E05FC lwz r9,1532(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFECFA90: 7C995050 subf r4,r25,r10
+ 5: GETL R25, t4
+ 6: GETL R10, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFECFA94: 63260001 ori r6,r25,0x1
+ 10: GETL R25, t8
+ 11: ORL $0x1, t8
+ 12: PUTL t8, R6
+ 13: INCEIPL $4
+
+ 0xFECFA98: 60800001 ori r0,r4,0x1
+ 14: GETL R4, t10
+ 15: ORL $0x1, t10
+ 16: PUTL t10, R0
+ 17: INCEIPL $4
+
+ 0xFECFA9C: 7F874A78 xor r7,r28,r9
+ 18: GETL R28, t12
+ 19: GETL R9, t14
+ 20: XORL t12, t14
+ 21: PUTL t14, R7
+ 22: INCEIPL $4
+
+ 0xFECFAA0: 391F0008 addi r8,r31,8
+ 23: GETL R31, t16
+ 24: ADDL $0x8, t16
+ 25: PUTL t16, R8
+ 26: INCEIPL $4
+
+ 0xFECFAA4: 3127FFFF addic r9,r7,-1
+ 27: GETL R7, t18
+ 28: ADCL $0xFFFFFFFF, t18 (-wCa)
+ 29: PUTL t18, R9
+ 30: INCEIPL $4
+
+ 0xFECFAA8: 7D693910 subfe r11,r9,r7
+ 31: GETL R9, t20
+ 32: GETL R7, t22
+ 33: SBBL t20, t22 (-rCa-wCa)
+ 34: PUTL t22, R11
+ 35: INCEIPL $4
+
+ 0xFECFAAC: 7D3FCA14 add r9,r31,r25
+ 36: GETL R31, t24
+ 37: GETL R25, t26
+ 38: ADDL t24, t26
+ 39: PUTL t26, R9
+ 40: INCEIPL $4
+
+ 0xFECFAB0: 5563103A rlwinm r3,r11,2,0,29
+ 41: GETL R11, t28
+ 42: SHLL $0x2, t28
+ 43: PUTL t28, R3
+ 44: INCEIPL $4
+
+ 0xFECFAB4: 913C0034 stw r9,52(r28)
+ 45: GETL R9, t30
+ 46: GETL R28, t32
+ 47: ADDL $0x34, t32
+ 48: STL t30, (t32)
+ 49: INCEIPL $4
+
+ 0xFECFAB8: 7C653378 or r5,r3,r6
+ 50: GETL R3, t34
+ 51: GETL R6, t36
+ 52: ORL t36, t34
+ 53: PUTL t34, R5
+ 54: INCEIPL $4
+
+ 0xFECFABC: 913C0040 stw r9,64(r28)
+ 55: GETL R9, t38
+ 56: GETL R28, t40
+ 57: ADDL $0x40, t40
+ 58: STL t38, (t40)
+ 59: INCEIPL $4
+
+ 0xFECFAC0: 90BF0004 stw r5,4(r31)
+ 60: GETL R5, t42
+ 61: GETL R31, t44
+ 62: ADDL $0x4, t44
+ 63: STL t42, (t44)
+ 64: INCEIPL $4
+
+ 0xFECFAC4: 913C0044 stw r9,68(r28)
+ 65: GETL R9, t46
+ 66: GETL R28, t48
+ 67: ADDL $0x44, t48
+ 68: STL t46, (t48)
+ 69: INCEIPL $4
+
+ 0xFECFAC8: 7C89212E stwx r4,r9,r4
+ 70: GETL R4, t50
+ 71: GETL R9, t52
+ 72: ADDL t52, t50
+ 73: GETL R4, t54
+ 74: STL t54, (t50)
+ 75: INCEIPL $4
+
+ 0xFECFACC: 90090004 stw r0,4(r9)
+ 76: GETL R0, t56
+ 77: GETL R9, t58
+ 78: ADDL $0x4, t58
+ 79: STL t56, (t58)
+ 80: INCEIPL $4
+
+ 0xFECFAD0: 9349000C stw r26,12(r9)
+ 81: GETL R26, t60
+ 82: GETL R9, t62
+ 83: ADDL $0xC, t62
+ 84: STL t60, (t62)
+ 85: INCEIPL $4
+
+ 0xFECFAD4: 93490008 stw r26,8(r9)
+ 86: GETL R26, t64
+ 87: GETL R9, t66
+ 88: ADDL $0x8, t66
+ 89: STL t64, (t66)
+ 90: INCEIPL $4
+
+ 0xFECFAD8: 4BFFFBD8 b 0xFECF6B0
+ 91: JMPo $0xFECF6B0 ($4)
+
+
+
+. 2792 FECFA8C 80
+. 81 3E 05 FC 7C 99 50 50 63 26 00 01 60 80 00 01 7F 87 4A 78 39 1F 00 08 31 27 FF FF 7D 69 39 10 7D 3F CA 14 55 63 10 3A 91 3C 00 34 7C 65 33 78 91 3C 00 40 90 BF 00 04 91 3C 00 44 7C 89 21 2E 90 09 00 04 93 49 00 0C 93 49 00 08 4B FF FB D8
+==== BB 2793 (0xFED83C8) approx BBs exec'd 0 ====
+
+ 0xFED83C8: 9CC30001 stbu r6,1(r3)
+ 0: GETL R6, t0
+ 1: GETL R3, t2
+ 2: ADDL $0x1, t2
+ 3: PUTL t2, R3
+ 4: STB t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED83CC: 4E800020 blr
+ 6: GETL LR, t4
+ 7: JMPo-r t4 ($4)
+
+
+
+. 2793 FED83C8 8
+. 9C C3 00 01 4E 80 00 20
+==== BB 2794 (0xFE8DD48) approx BBs exec'd 0 ====
+
+ 0xFE8DD48: 3900005F li r8,95
+ 0: MOVL $0x5F, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0xFE8DD4C: 7E84A378 or r4,r20,r20
+ 3: GETL R20, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE8DD50: 99030000 stb r8,0(r3)
+ 6: GETL R8, t4
+ 7: GETL R3, t6
+ 8: STB t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFE8DD54: 38630001 addi r3,r3,1
+ 10: GETL R3, t8
+ 11: ADDL $0x1, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0xFE8DD58: 4804A5A9 bl 0xFED8300
+ 14: MOVL $0xFE8DD5C, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFED8300 ($4)
+
+
+
+. 2794 FE8DD48 20
+. 39 00 00 5F 7E 84 A3 78 99 03 00 00 38 63 00 01 48 04 A5 A9
+==== BB 2795 (0xFE8DD5C) approx BBs exec'd 0 ====
+
+ 0xFE8DD5C: 4BFFFD04 b 0xFE8DA60
+ 0: JMPo $0xFE8DA60 ($4)
+
+
+
+. 2795 FE8DD5C 4
+. 4B FF FD 04
+==== BB 2796 (0xFE8DD30) approx BBs exec'd 0 ====
+
+ 0xFE8DD30: 3940002E li r10,46
+ 0: MOVL $0x2E, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFE8DD34: 7E649B78 or r4,r19,r19
+ 3: GETL R19, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE8DD38: 99430000 stb r10,0(r3)
+ 6: GETL R10, t4
+ 7: GETL R3, t6
+ 8: STB t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFE8DD3C: 38630001 addi r3,r3,1
+ 10: GETL R3, t8
+ 11: ADDL $0x1, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0xFE8DD40: 4804A5C1 bl 0xFED8300
+ 14: MOVL $0xFE8DD44, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFED8300 ($4)
+
+
+
+. 2796 FE8DD30 20
+. 39 40 00 2E 7E 64 9B 78 99 43 00 00 38 63 00 01 48 04 A5 C1
+==== BB 2797 (0xFE8DD44) approx BBs exec'd 0 ====
+
+ 0xFE8DD44: 4BFFFD24 b 0xFE8DA68
+ 0: JMPo $0xFE8DA68 ($4)
+
+
+
+. 2797 FE8DD44 4
+. 4B FF FD 24
+==== BB 2798 (0xFE8DD18) approx BBs exec'd 0 ====
+
+ 0xFE8DD18: 3960002E li r11,46
+ 0: MOVL $0x2E, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFE8DD1C: 7EA4AB78 or r4,r21,r21
+ 3: GETL R21, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE8DD20: 99630000 stb r11,0(r3)
+ 6: GETL R11, t4
+ 7: GETL R3, t6
+ 8: STB t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFE8DD24: 38630001 addi r3,r3,1
+ 10: GETL R3, t8
+ 11: ADDL $0x1, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0xFE8DD28: 4804A5D9 bl 0xFED8300
+ 14: MOVL $0xFE8DD2C, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFED8300 ($4)
+
+
+
+. 2798 FE8DD18 20
+. 39 60 00 2E 7E A4 AB 78 99 63 00 00 38 63 00 01 48 04 A5 D9
+==== BB 2799 (0xFE8DD2C) approx BBs exec'd 0 ====
+
+ 0xFE8DD2C: 4BFFFD44 b 0xFE8DA70
+ 0: JMPo $0xFE8DA70 ($4)
+
+
+
+. 2799 FE8DD2C 4
+. 4B FF FD 44
+==== BB 2800 (0xFE8DB60) approx BBs exec'd 0 ====
+
+ 0xFE8DB60: 80610018 lwz r3,24(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE8DB64: 7F44D378 or r4,r26,r26
+ 5: GETL R26, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFE8DB68: 4804B8B1 bl 0xFED9418
+ 8: MOVL $0xFE8DB6C, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFED9418 ($4)
+
+
+
+. 2800 FE8DB60 12
+. 80 61 00 18 7F 44 D3 78 48 04 B8 B1
+==== BB 2801 __argz_count_internal(0xFED9418) approx BBs exec'd 0 ====
+
+ 0xFED9418: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFED941C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFED9420: 93A10014 stw r29,20(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFED9424: 7C9D2379 or. r29,r4,r4
+ 14: GETL R4, t10
+ 15: PUTL t10, R29
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFED9428: 93810010 stw r28,16(r1)
+ 19: GETL R28, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x10, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFED942C: 3B800000 li r28,0
+ 24: MOVL $0x0, t18
+ 25: PUTL t18, R28
+ 26: INCEIPL $4
+
+ 0xFED9430: 93E1001C stw r31,28(r1)
+ 27: GETL R31, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x1C, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFED9434: 7C7F1B78 or r31,r3,r3
+ 32: GETL R3, t24
+ 33: PUTL t24, R31
+ 34: INCEIPL $4
+
+ 0xFED9438: 93C10018 stw r30,24(r1)
+ 35: GETL R30, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x18, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFED943C: 90010024 stw r0,36(r1)
+ 40: GETL R0, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x24, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0xFED9440: 41820024 bc 12,2,0xFED9464
+ 45: Js02o $0xFED9464
+
+
+
+. 2801 FED9418 44
+. 94 21 FF E0 7C 08 02 A6 93 A1 00 14 7C 9D 23 79 93 81 00 10 3B 80 00 00 93 E1 00 1C 7C 7F 1B 78 93 C1 00 18 90 01 00 24 41 82 00 24
+==== BB 2802 (0xFED9444) approx BBs exec'd 0 ====
+
+ 0xFED9444: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFED9448: 3B9C0001 addi r28,r28,1
+ 3: GETL R28, t2
+ 4: ADDL $0x1, t2
+ 5: PUTL t2, R28
+ 6: INCEIPL $4
+
+ 0xFED944C: 4BFFD68D bl 0xFED6AD8
+ 7: MOVL $0xFED9450, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2802 FED9444 12
+. 7F E3 FB 78 3B 9C 00 01 4B FF D6 8D
+==== BB 2803 (0xFED9450) approx BBs exec'd 0 ====
+
+ 0xFED9450: 7FA3E850 subf r29,r3,r29
+ 0: GETL R3, t0
+ 1: GETL R29, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFED9454: 7C7F1A14 add r3,r31,r3
+ 5: GETL R31, t4
+ 6: GETL R3, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFED9458: 3BE30001 addi r31,r3,1
+ 10: GETL R3, t8
+ 11: ADDL $0x1, t8
+ 12: PUTL t8, R31
+ 13: INCEIPL $4
+
+ 0xFED945C: 37BDFFFF addic. r29,r29,-1
+ 14: GETL R29, t10
+ 15: ADCL $0xFFFFFFFF, t10 (-wCa)
+ 16: PUTL t10, R29
+ 17: CMP0L t10, t12 (-rSo)
+ 18: ICRFL t12, $0x0, CR
+ 19: INCEIPL $4
+
+ 0xFED9460: 4082FFE4 bc 4,2,0xFED9444
+ 20: Jc02o $0xFED9444
+
+
+
+. 2803 FED9450 20
+. 7F A3 E8 50 7C 7F 1A 14 3B E3 00 01 37 BD FF FF 40 82 FF E4
+==== BB 2804 (0xFED9464) approx BBs exec'd 0 ====
+
+ 0xFED9464: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFED9468: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED946C: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0xFED9470: 83810010 lwz r28,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0xFED9474: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFED9478: 83C10018 lwz r30,24(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x18, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R30
+ 25: INCEIPL $4
+
+ 0xFED947C: 83E1001C lwz r31,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0xFED9480: 38210020 addi r1,r1,32
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0xFED9484: 4E800020 blr
+ 35: GETL LR, t26
+ 36: JMPo-r t26 ($4)
+
+
+
+. 2804 FED9464 36
+. 80 81 00 24 7F 83 E3 78 83 A1 00 14 83 81 00 10 7C 88 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 2805 (0xFE8DB6C) approx BBs exec'd 0 ====
+
+ 0xFE8DB6C: 38A0AAAA li r5,-21846
+ 0: MOVL $0xFFFFAAAA, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFE8DB70: 7F842838 and r4,r28,r5
+ 3: GETL R28, t2
+ 4: GETL R5, t4
+ 5: ANDL t2, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFE8DB74: 739F5555 andi. r31,r28,0x5555
+ 8: GETL R28, t6
+ 9: ANDL $0x5555, t6
+ 10: PUTL t6, R31
+ 11: CMP0L t6, t8 (-rSo)
+ 12: ICRFL t8, $0x0, CR
+ 13: INCEIPL $4
+
+ 0xFE8DB78: 7C800E70 srawi r0,r4,1
+ 14: GETL R4, t10
+ 15: SARL $0x1, t10 (-wCa)
+ 16: PUTL t10, R0
+ 17: INCEIPL $4
+
+ 0xFE8DB7C: 3980CCCC li r12,-13108
+ 18: MOVL $0xFFFFCCCC, t12
+ 19: PUTL t12, R12
+ 20: INCEIPL $4
+
+ 0xFE8DB80: 7F00FA14 add r24,r0,r31
+ 21: GETL R0, t14
+ 22: GETL R31, t16
+ 23: ADDL t14, t16
+ 24: PUTL t16, R24
+ 25: INCEIPL $4
+
+ 0xFE8DB84: 7F116038 and r17,r24,r12
+ 26: GETL R24, t18
+ 27: GETL R12, t20
+ 28: ANDL t18, t20
+ 29: PUTL t20, R17
+ 30: INCEIPL $4
+
+ 0xFE8DB88: 730E3333 andi. r14,r24,0x3333
+ 31: GETL R24, t22
+ 32: ANDL $0x3333, t22
+ 33: PUTL t22, R14
+ 34: CMP0L t22, t24 (-rSo)
+ 35: ICRFL t24, $0x0, CR
+ 36: INCEIPL $4
+
+ 0xFE8DB8C: 7E2B1670 srawi r11,r17,2
+ 37: GETL R17, t26
+ 38: SARL $0x2, t26 (-wCa)
+ 39: PUTL t26, R11
+ 40: INCEIPL $4
+
+ 0xFE8DB90: 7D4B7214 add r10,r11,r14
+ 41: GETL R11, t28
+ 42: GETL R14, t30
+ 43: ADDL t28, t30
+ 44: PUTL t30, R10
+ 45: INCEIPL $4
+
+ 0xFE8DB94: 7D482670 srawi r8,r10,4
+ 46: GETL R10, t32
+ 47: SARL $0x4, t32 (-wCa)
+ 48: PUTL t32, R8
+ 49: INCEIPL $4
+
+ 0xFE8DB98: 7CE85214 add r7,r8,r10
+ 50: GETL R8, t34
+ 51: GETL R10, t36
+ 52: ADDL t34, t36
+ 53: PUTL t36, R7
+ 54: INCEIPL $4
+
+ 0xFE8DB9C: 70E60F0F andi. r6,r7,0xF0F
+ 55: GETL R7, t38
+ 56: ANDL $0xF0F, t38
+ 57: PUTL t38, R6
+ 58: CMP0L t38, t40 (-rSo)
+ 59: ICRFL t40, $0x0, CR
+ 60: INCEIPL $4
+
+ 0xFE8DBA0: 7CC94670 srawi r9,r6,8
+ 61: GETL R6, t42
+ 62: SARL $0x8, t42 (-wCa)
+ 63: PUTL t42, R9
+ 64: INCEIPL $4
+
+ 0xFE8DBA4: 7CA93214 add r5,r9,r6
+ 65: GETL R9, t44
+ 66: GETL R6, t46
+ 67: ADDL t44, t46
+ 68: PUTL t46, R5
+ 69: INCEIPL $4
+
+ 0xFE8DBA8: 54A4063E rlwinm r4,r5,0,24,31
+ 70: GETL R5, t48
+ 71: ANDL $0xFF, t48
+ 72: PUTL t48, R4
+ 73: INCEIPL $4
+
+ 0xFE8DBAC: 7C632030 slw r3,r3,r4
+ 74: GETL R3, t52
+ 75: GETL R4, t50
+ 76: SHLL t50, t52
+ 77: PUTL t52, R3
+ 78: INCEIPL $4
+
+ 0xFE8DBB0: 547F103A rlwinm r31,r3,2,0,29
+ 79: GETL R3, t54
+ 80: SHLL $0x2, t54
+ 81: PUTL t54, R31
+ 82: INCEIPL $4
+
+ 0xFE8DBB4: 387F0014 addi r3,r31,20
+ 83: GETL R31, t56
+ 84: ADDL $0x14, t56
+ 85: PUTL t56, R3
+ 86: INCEIPL $4
+
+ 0xFE8DBB8: 4811C751 bl 0xFFAA308
+ 87: MOVL $0xFE8DBBC, t58
+ 88: PUTL t58, LR
+ 89: JMPo-c $0xFFAA308 ($4)
+
+
+
+. 2805 FE8DB6C 80
+. 38 A0 AA AA 7F 84 28 38 73 9F 55 55 7C 80 0E 70 39 80 CC CC 7F 00 FA 14 7F 11 60 38 73 0E 33 33 7E 2B 16 70 7D 4B 72 14 7D 48 26 70 7C E8 52 14 70 E6 0F 0F 7C C9 46 70 7C A9 32 14 54 A4 06 3E 7C 63 20 30 54 7F 10 3A 38 7F 00 14 48 11 C7 51
+==== BB 2806 (0xFE8DBBC) approx BBs exec'd 0 ====
+
+ 0xFE8DBBC: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE8DBC0: 7C711B79 or. r17,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R17
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFE8DBC4: 41A2FF30 bc 13,2,0xFE8DAF4
+ 8: Js02o $0xFE8DAF4
+
+
+
+. 2806 FE8DBBC 12
+. 38 00 00 00 7C 71 1B 79 41 A2 FF 30
+==== BB 2807 (0xFE8DBC8) approx BBs exec'd 0 ====
+
+ 0xFE8DBC8: 80610018 lwz r3,24(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE8DBCC: 7F44D378 or r4,r26,r26
+ 5: GETL R26, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFE8DBD0: 93B10000 stw r29,0(r17)
+ 8: GETL R29, t6
+ 9: GETL R17, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFE8DBD4: 4804B845 bl 0xFED9418
+ 12: MOVL $0xFE8DBD8, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0xFED9418 ($4)
+
+
+
+. 2807 FE8DBC8 16
+. 80 61 00 18 7F 44 D3 78 93 B1 00 00 48 04 B8 45
+==== BB 2808 (0xFE8DBD8) approx BBs exec'd 0 ====
+
+ 0xFE8DBD8: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE8DBDC: 2F030001 cmpi cr6,r3,1
+ 3: GETL R3, t2
+ 4: MOVL $0x1, t6
+ 5: CMPL t2, t6, t4 (-rSo)
+ 6: ICRFL t4, $0x6, CR
+ 7: INCEIPL $4
+
+ 0xFE8DBE0: 419A0180 bc 12,26,0xFE8DD60
+ 8: Js26o $0xFE8DD60
+
+
+
+. 2808 FE8DBD8 12
+. 38 00 00 00 2F 03 00 01 41 9A 01 80
+==== BB 2809 (0xFE8DD60) approx BBs exec'd 0 ====
+
+ 0xFE8DD60: 73290001 andi. r9,r25,0x1
+ 0: GETL R25, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R9
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE8DD64: 41A2FE84 bc 13,2,0xFE8DBE8
+ 6: Js02o $0xFE8DBE8
+
+
+
+. 2809 FE8DD60 8
+. 73 29 00 01 41 A2 FE 84
+==== BB 2810 (0xFE8DD68) approx BBs exec'd 0 ====
+
+ 0xFE8DD68: 2F970000 cmpi cr7,r23,0
+ 0: GETL R23, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE8DD6C: 41BEFE7C bc 13,30,0xFE8DBE8
+ 4: Js30o $0xFE8DBE8
+
+
+
+. 2810 FE8DD68 8
+. 2F 97 00 00 41 BE FE 7C
+==== BB 2811 (0xFE8DD70) approx BBs exec'd 0 ====
+
+ 0xFE8DD70: 4BFFFE74 b 0xFE8DBE4
+ 0: JMPo $0xFE8DBE4 ($4)
+
+
+
+. 2811 FE8DD70 4
+. 4B FF FE 74
+==== BB 2812 (0xFE8DBE4) approx BBs exec'd 0 ====
+
+ 0xFE8DBE4: 38000001 li r0,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE8DBE8: 2C9B0000 cmpi cr1,r27,0
+ 3: GETL R27, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x1, CR
+ 6: INCEIPL $4
+
+ 0xFE8DBEC: 3AE00000 li r23,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R23
+ 9: INCEIPL $4
+
+ 0xFE8DBF0: 90110004 stw r0,4(r17)
+ 10: GETL R0, t8
+ 11: GETL R17, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFE8DBF4: 92F10008 stw r23,8(r17)
+ 15: GETL R23, t12
+ 16: GETL R17, t14
+ 17: ADDL $0x8, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFE8DBF8: 4186019C bc 12,6,0xFE8DD94
+ 20: Js06o $0xFE8DD94
+
+
+
+. 2812 FE8DBE4 24
+. 38 00 00 01 2C 9B 00 00 3A E0 00 00 90 11 00 04 92 F1 00 08 41 86 01 9C
+==== BB 2813 (0xFE8DD94) approx BBs exec'd 0 ====
+
+ 0xFE8DD94: 83320000 lwz r25,0(r18)
+ 0: GETL R18, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R25
+ 3: INCEIPL $4
+
+ 0xFE8DD98: 9331000C stw r25,12(r17)
+ 4: GETL R25, t4
+ 5: GETL R17, t6
+ 6: ADDL $0xC, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFE8DD9C: 92320000 stw r17,0(r18)
+ 9: GETL R17, t8
+ 10: GETL R18, t10
+ 11: STL t8, (t10)
+ 12: INCEIPL $4
+
+ 0xFE8DDA0: 4BFFFE68 b 0xFE8DC08
+ 13: JMPo $0xFE8DC08 ($4)
+
+
+
+. 2813 FE8DD94 16
+. 83 32 00 00 93 31 00 0C 92 32 00 00 4B FF FE 68
+==== BB 2814 (0xFE8DC08) approx BBs exec'd 0 ====
+
+ 0xFE8DC08: 80610018 lwz r3,24(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE8DC0C: 7F44D378 or r4,r26,r26
+ 5: GETL R26, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFE8DC10: 3B000000 li r24,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R24
+ 10: INCEIPL $4
+
+ 0xFE8DC14: 4804B805 bl 0xFED9418
+ 11: MOVL $0xFE8DC18, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0xFED9418 ($4)
+
+
+
+. 2814 FE8DC08 16
+. 80 61 00 18 7F 44 D3 78 3B 00 00 00 48 04 B8 05
+==== BB 2815 (0xFE8DC18) approx BBs exec'd 0 ====
+
+ 0xFE8DC18: 68630001 xori r3,r3,0x1
+ 0: GETL R3, t0
+ 1: XORL $0x1, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFE8DC1C: 20030000 subfic r0,r3,0
+ 4: GETL R3, t2
+ 5: MOVL $0x0, t4
+ 6: SBBL t2, t4 (-wCa)
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE8DC20: 7C601914 adde r3,r0,r3
+ 9: GETL R0, t6
+ 10: GETL R3, t8
+ 11: ADCL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0xFE8DC24: 7F63E051 subf. r27,r3,r28
+ 14: GETL R3, t10
+ 15: GETL R28, t12
+ 16: SUBL t10, t12
+ 17: PUTL t12, R27
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x0, CR
+ 20: INCEIPL $4
+
+ 0xFE8DC28: 4180014C bc 12,0,0xFE8DD74
+ 21: Js00o $0xFE8DD74
+
+
+
+. 2815 FE8DC18 20
+. 68 63 00 01 20 03 00 00 7C 60 19 14 7F 63 E0 51 41 80 01 4C
+==== BB 2816 (0xFE8DC2C) approx BBs exec'd 0 ====
+
+ 0xFE8DC2C: 2E1A0000 cmpi cr4,r26,0
+ 0: GETL R26, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFE8DC30: 7F8EE0F8 nor r14,r28,r28
+ 4: GETL R28, t4
+ 5: NOTL t4
+ 6: PUTL t4, R14
+ 7: INCEIPL $4
+
+ 0xFE8DC34: 83810018 lwz r28,24(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x18, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0xFE8DC38: 7F3CD214 add r25,r28,r26
+ 13: GETL R28, t10
+ 14: GETL R26, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R25
+ 17: INCEIPL $4
+
+ 0xFE8DC3C: 7E3C8B78 or r28,r17,r17
+ 18: GETL R17, t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0xFE8DC40: 4800000C b 0xFE8DC4C
+ 21: JMPo $0xFE8DC4C ($4)
+
+
+
+. 2816 FE8DC2C 24
+. 2E 1A 00 00 7F 8E E0 F8 83 81 00 18 7F 3C D2 14 7E 3C 8B 78 48 00 00 0C
+==== BB 2817 (0xFE8DC4C) approx BBs exec'd 0 ====
+
+ 0xFE8DC4C: 7DCBD839 and. r11,r14,r27
+ 0: GETL R14, t0
+ 1: GETL R27, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R11
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFE8DC50: 3BA00000 li r29,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0xFE8DC54: 3AE00001 li r23,1
+ 10: MOVL $0x1, t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0xFE8DC58: 3B5C000C addi r26,r28,12
+ 13: GETL R28, t10
+ 14: ADDL $0xC, t10
+ 15: PUTL t10, R26
+ 16: INCEIPL $4
+
+ 0xFE8DC5C: 40A2FFE8 bc 5,2,0xFE8DC44
+ 17: Jc02o $0xFE8DC44
+
+
+
+. 2817 FE8DC4C 20
+. 7D CB D8 39 3B A0 00 00 3A E0 00 01 3B 5C 00 0C 40 A2 FF E8
+==== BB 2818 (0xFE8DC60) approx BBs exec'd 0 ====
+
+ 0xFE8DC60: 2F9D0000 cmpi cr7,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE8DC64: 7F19E840 cmpl cr6,r25,r29
+ 4: GETL R25, t4
+ 5: GETL R29, t6
+ 6: CMPUL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFE8DC68: 7FA0EB78 or r0,r29,r29
+ 9: GETL R29, t10
+ 10: PUTL t10, R0
+ 11: INCEIPL $4
+
+ 0xFE8DC6C: 419E0084 bc 12,30,0xFE8DCF0
+ 12: Js30o $0xFE8DCF0
+
+
+
+. 2818 FE8DC60 16
+. 2F 9D 00 00 7F 19 E8 40 7F A0 EB 78 41 9E 00 84
+==== BB 2819 (0xFE8DCF0) approx BBs exec'd 0 ====
+
+ 0xFE8DCF0: 83E10018 lwz r31,24(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFE8DCF4: 40B2FF9C bc 5,18,0xFE8DC90
+ 5: Jc18o $0xFE8DC90
+
+
+
+. 2819 FE8DCF0 8
+. 83 E1 00 18 40 B2 FF 9C
+==== BB 2820 (0xFE8DC90) approx BBs exec'd 0 ====
+
+ 0xFE8DC90: 2C9F0000 cmpi cr1,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE8DC94: 7FE3FB78 or r3,r31,r31
+ 4: GETL R31, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFE8DC98: 7FFDFB78 or r29,r31,r31
+ 7: GETL R31, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0xFE8DC9C: 41A6FFA8 bc 13,6,0xFE8DC44
+ 10: Js06o $0xFE8DC44
+
+
+
+. 2820 FE8DC90 16
+. 2C 9F 00 00 7F E3 FB 78 7F FD FB 78 41 A6 FF A8
+==== BB 2821 (0xFE8DCA0) approx BBs exec'd 0 ====
+
+ 0xFE8DCA0: 48048E39 bl 0xFED6AD8
+ 0: MOVL $0xFE8DCA4, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 2821 FE8DCA0 4
+. 48 04 8E 39
+==== BB 2822 (0xFE8DCA4) approx BBs exec'd 0 ====
+
+ 0xFE8DCA4: 7FE4FB78 or r4,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE8DCA8: 38A30001 addi r5,r3,1
+ 3: GETL R3, t2
+ 4: ADDL $0x1, t2
+ 5: PUTL t2, R5
+ 6: INCEIPL $4
+
+ 0xFE8DCAC: 7F66DB78 or r6,r27,r27
+ 7: GETL R27, t4
+ 8: PUTL t4, R6
+ 9: INCEIPL $4
+
+ 0xFE8DCB0: 7E439378 or r3,r18,r18
+ 10: GETL R18, t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0xFE8DCB4: 7EC7B378 or r7,r22,r22
+ 13: GETL R22, t8
+ 14: PUTL t8, R7
+ 15: INCEIPL $4
+
+ 0xFE8DCB8: 7E88A378 or r8,r20,r20
+ 16: GETL R20, t10
+ 17: PUTL t10, R8
+ 18: INCEIPL $4
+
+ 0xFE8DCBC: 7E699B78 or r9,r19,r19
+ 19: GETL R19, t12
+ 20: PUTL t12, R9
+ 21: INCEIPL $4
+
+ 0xFE8DCC0: 7EAAAB78 or r10,r21,r21
+ 22: GETL R21, t14
+ 23: PUTL t14, R10
+ 24: INCEIPL $4
+
+ 0xFE8DCC4: 91E10008 stw r15,8(r1)
+ 25: GETL R15, t16
+ 26: GETL R1, t18
+ 27: ADDL $0x8, t18
+ 28: STL t16, (t18)
+ 29: INCEIPL $4
+
+ 0xFE8DCC8: 9201000C stw r16,12(r1)
+ 30: GETL R16, t20
+ 31: GETL R1, t22
+ 32: ADDL $0xC, t22
+ 33: STL t20, (t22)
+ 34: INCEIPL $4
+
+ 0xFE8DCCC: 3B180001 addi r24,r24,1
+ 35: GETL R24, t24
+ 36: ADDL $0x1, t24
+ 37: PUTL t24, R24
+ 38: INCEIPL $4
+
+ 0xFE8DCD0: 92E10010 stw r23,16(r1)
+ 39: GETL R23, t26
+ 40: GETL R1, t28
+ 41: ADDL $0x10, t28
+ 42: STL t26, (t28)
+ 43: INCEIPL $4
+
+ 0xFE8DCD4: 4BFFFC29 bl 0xFE8D8FC
+ 44: MOVL $0xFE8DCD8, t30
+ 45: PUTL t30, LR
+ 46: JMPo-c $0xFE8D8FC ($4)
+
+
+
+. 2822 FE8DCA4 52
+. 7F E4 FB 78 38 A3 00 01 7F 66 DB 78 7E 43 93 78 7E C7 B3 78 7E 88 A3 78 7E 69 9B 78 7E AA AB 78 91 E1 00 08 92 01 00 0C 3B 18 00 01 92 E1 00 10 4B FF FC 29
+==== BB 2823 (0xFE8DA98) approx BBs exec'd 0 ====
+
+ 0xFE8DA98: 823F0000 lwz r17,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R17
+ 3: INCEIPL $4
+
+ 0xFE8DA9C: 7FA4EB78 or r4,r29,r29
+ 4: GETL R29, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0xFE8DAA0: 2E110000 cmpi cr4,r17,0
+ 7: GETL R17, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x4, CR
+ 10: INCEIPL $4
+
+ 0xFE8DAA4: 7E238B78 or r3,r17,r17
+ 11: GETL R17, t10
+ 12: PUTL t10, R3
+ 13: INCEIPL $4
+
+ 0xFE8DAA8: 41920018 bc 12,18,0xFE8DAC0
+ 14: Js18o $0xFE8DAC0
+
+
+
+. 2823 FE8DA98 20
+. 82 3F 00 00 7F A4 EB 78 2E 11 00 00 7E 23 8B 78 41 92 00 18
+==== BB 2824 (0xFE8DAAC) approx BBs exec'd 0 ====
+
+ 0xFE8DAAC: 48048905 bl 0xFED63B0
+ 0: MOVL $0xFE8DAB0, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 2824 FE8DAAC 4
+. 48 04 89 05
+==== BB 2825 (0xFE8DAB0) approx BBs exec'd 0 ====
+
+ 0xFE8DAB0: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE8DAB4: 419E0018 bc 12,30,0xFE8DACC
+ 4: Js30o $0xFE8DACC
+
+
+
+. 2825 FE8DAB0 8
+. 2F 83 00 00 41 9E 00 18
+==== BB 2826 (0xFE8DAB8) approx BBs exec'd 0 ====
+
+ 0xFE8DAB8: 419C02D4 bc 12,28,0xFE8DD8C
+ 0: Js28o $0xFE8DD8C
+
+
+
+. 2826 FE8DAB8 4
+. 41 9C 02 D4
+==== BB 2827 (0xFE8DD8C) approx BBs exec'd 0 ====
+
+ 0xFE8DD8C: 3BE00000 li r31,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0xFE8DD90: 4BFFFD3C b 0xFE8DACC
+ 3: JMPo $0xFE8DACC ($4)
+
+
+
+. 2827 FE8DD8C 8
+. 3B E0 00 00 4B FF FD 3C
+==== BB 2828 (0xFE8DBE8) approx BBs exec'd 0 ====
+
+ 0xFE8DBE8: 2C9B0000 cmpi cr1,r27,0
+ 0: GETL R27, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE8DBEC: 3AE00000 li r23,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R23
+ 6: INCEIPL $4
+
+ 0xFE8DBF0: 90110004 stw r0,4(r17)
+ 7: GETL R0, t6
+ 8: GETL R17, t8
+ 9: ADDL $0x4, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFE8DBF4: 92F10008 stw r23,8(r17)
+ 12: GETL R23, t10
+ 13: GETL R17, t12
+ 14: ADDL $0x8, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0xFE8DBF8: 4186019C bc 12,6,0xFE8DD94
+ 17: Js06o $0xFE8DD94
+
+
+
+. 2828 FE8DBE8 20
+. 2C 9B 00 00 3A E0 00 00 90 11 00 04 92 F1 00 08 41 86 01 9C
+==== BB 2829 (0xFE8DC44) approx BBs exec'd 0 ====
+
+ 0xFE8DC44: 377BFFFF addic. r27,r27,-1
+ 0: GETL R27, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R27
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE8DC48: 4180012C bc 12,0,0xFE8DD74
+ 6: Js00o $0xFE8DD74
+
+
+
+. 2829 FE8DC44 8
+. 37 7B FF FF 41 80 01 2C
+==== BB 2830 (0xFED64E0) approx BBs exec'd 0 ====
+
+ 0xFED64E0: 3CE0FEFF lis r7,-257
+ 0: MOVL $0xFEFF0000, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0xFED64E4: 3D007F7F lis r8,32639
+ 3: MOVL $0x7F7F0000, t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0xFED64E8: 80C40000 lwz r6,0(r4)
+ 6: GETL R4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0xFED64EC: 38E7FEFF addi r7,r7,-257
+ 10: MOVL $0xFEFEFEFF, t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0xFED64F0: 39087F7F addi r8,r8,32639
+ 13: MOVL $0x7F7F7F7F, t10
+ 14: PUTL t10, R8
+ 15: INCEIPL $4
+
+ 0xFED64F4: 48000024 b 0xFED6518
+ 16: JMPo $0xFED6518 ($4)
+
+
+
+. 2830 FED64E0 24
+. 3C E0 FE FF 3D 00 7F 7F 80 C4 00 00 38 E7 FE FF 39 08 7F 7F 48 00 00 24
+==== BB 2831 (0xFED6518) approx BBs exec'd 0 ====
+
+ 0xFED6518: 7C073214 add r0,r7,r6
+ 0: GETL R7, t0
+ 1: GETL R6, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFED651C: 7D0930F8 nor r9,r8,r6
+ 5: GETL R8, t4
+ 6: GETL R6, t6
+ 7: ORL t6, t4
+ 8: NOTL t4
+ 9: PUTL t4, R9
+ 10: INCEIPL $4
+
+ 0xFED6520: 7C004839 and. r0,r0,r9
+ 11: GETL R0, t8
+ 12: GETL R9, t10
+ 13: ANDL t8, t10
+ 14: PUTL t10, R0
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x0, CR
+ 17: INCEIPL $4
+
+ 0xFED6524: 4182FFD4 bc 12,2,0xFED64F8
+ 18: Js02o $0xFED64F8
+
+
+
+. 2831 FED6518 16
+. 7C 07 32 14 7D 09 30 F8 7C 00 48 39 41 82 FF D4
+==== BB 2832 (0xFED64F8) approx BBs exec'd 0 ====
+
+ 0xFED64F8: 85440004 lwzu r10,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R4
+ 3: LDL (t0), t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0xFED64FC: 94C50004 stwu r6,4(r5)
+ 6: GETL R6, t4
+ 7: GETL R5, t6
+ 8: ADDL $0x4, t6
+ 9: PUTL t6, R5
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFED6500: 7C075214 add r0,r7,r10
+ 12: GETL R7, t8
+ 13: GETL R10, t10
+ 14: ADDL t8, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xFED6504: 7D0950F8 nor r9,r8,r10
+ 17: GETL R8, t12
+ 18: GETL R10, t14
+ 19: ORL t14, t12
+ 20: NOTL t12
+ 21: PUTL t12, R9
+ 22: INCEIPL $4
+
+ 0xFED6508: 7C004839 and. r0,r0,r9
+ 23: GETL R0, t16
+ 24: GETL R9, t18
+ 25: ANDL t16, t18
+ 26: PUTL t18, R0
+ 27: CMP0L t18, t20 (-rSo)
+ 28: ICRFL t20, $0x0, CR
+ 29: INCEIPL $4
+
+ 0xFED650C: 40820020 bc 4,2,0xFED652C
+ 30: Jc02o $0xFED652C
+
+
+
+. 2832 FED64F8 24
+. 85 44 00 04 94 C5 00 04 7C 07 52 14 7D 09 50 F8 7C 00 48 39 40 82 00 20
+==== BB 2833 (0xFED6510) approx BBs exec'd 0 ====
+
+ 0xFED6510: 84C40004 lwzu r6,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R4
+ 3: LDL (t0), t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFED6514: 95450004 stwu r10,4(r5)
+ 6: GETL R10, t4
+ 7: GETL R5, t6
+ 8: ADDL $0x4, t6
+ 9: PUTL t6, R5
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFED6518: 7C073214 add r0,r7,r6
+ 12: GETL R7, t8
+ 13: GETL R6, t10
+ 14: ADDL t8, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xFED651C: 7D0930F8 nor r9,r8,r6
+ 17: GETL R8, t12
+ 18: GETL R6, t14
+ 19: ORL t14, t12
+ 20: NOTL t12
+ 21: PUTL t12, R9
+ 22: INCEIPL $4
+
+ 0xFED6520: 7C004839 and. r0,r0,r9
+ 23: GETL R0, t16
+ 24: GETL R9, t18
+ 25: ANDL t16, t18
+ 26: PUTL t18, R0
+ 27: CMP0L t18, t20 (-rSo)
+ 28: ICRFL t20, $0x0, CR
+ 29: INCEIPL $4
+
+ 0xFED6524: 4182FFD4 bc 12,2,0xFED64F8
+ 30: Js02o $0xFED64F8
+
+
+
+. 2833 FED6510 24
+. 84 C4 00 04 95 45 00 04 7C 07 32 14 7D 09 30 F8 7C 00 48 39 41 82 FF D4
+==== BB 2834 (0xFED6528) approx BBs exec'd 0 ====
+
+ 0xFED6528: 7CCA3378 or r10,r6,r6
+ 0: GETL R6, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFED652C: 5540463F rlwinm. r0,r10,8,24,31
+ 3: GETL R10, t2
+ 4: SHRL $0x18, t2
+ 5: PUTL t2, R0
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFED6530: 98050004 stb r0,4(r5)
+ 9: GETL R0, t6
+ 10: GETL R5, t8
+ 11: ADDL $0x4, t8
+ 12: STB t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFED6534: 4D820020 bclr 12,2
+ 14: GETL LR, t10
+ 15: Js02o-r t10
+
+
+
+. 2834 FED6528 16
+. 7C CA 33 78 55 40 46 3F 98 05 00 04 4D 82 00 20
+==== BB 2835 (0xFE8DABC) approx BBs exec'd 0 ====
+
+ 0xFE8DABC: 7FFBFB78 or r27,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R27
+ 2: INCEIPL $4
+
+ 0xFE8DAC0: 83FF000C lwz r31,12(r31)
+ 3: GETL R31, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0xFE8DAC4: 2C9F0000 cmpi cr1,r31,0
+ 8: GETL R31, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0xFE8DAC8: 4086FFD0 bc 4,6,0xFE8DA98
+ 12: Jc06o $0xFE8DA98
+
+
+
+. 2835 FE8DABC 16
+. 7F FB FB 78 83 FF 00 0C 2C 9F 00 00 40 86 FF D0
+==== BB 2836 (0xFE8DBFC) approx BBs exec'd 0 ====
+
+ 0xFE8DBFC: 83BB000C lwz r29,12(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFE8DC00: 93B1000C stw r29,12(r17)
+ 5: GETL R29, t4
+ 6: GETL R17, t6
+ 7: ADDL $0xC, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFE8DC04: 923B000C stw r17,12(r27)
+ 10: GETL R17, t8
+ 11: GETL R27, t10
+ 12: ADDL $0xC, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFE8DC08: 80610018 lwz r3,24(r1)
+ 15: GETL R1, t12
+ 16: ADDL $0x18, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R3
+ 19: INCEIPL $4
+
+ 0xFE8DC0C: 7F44D378 or r4,r26,r26
+ 20: GETL R26, t16
+ 21: PUTL t16, R4
+ 22: INCEIPL $4
+
+ 0xFE8DC10: 3B000000 li r24,0
+ 23: MOVL $0x0, t18
+ 24: PUTL t18, R24
+ 25: INCEIPL $4
+
+ 0xFE8DC14: 4804B805 bl 0xFED9418
+ 26: MOVL $0xFE8DC18, t20
+ 27: PUTL t20, LR
+ 28: JMPo-c $0xFED9418 ($4)
+
+
+
+. 2836 FE8DBFC 28
+. 83 BB 00 0C 93 B1 00 0C 92 3B 00 0C 80 61 00 18 7F 44 D3 78 3B 00 00 00 48 04 B8 05
+==== BB 2837 (0xFE8DD74) approx BBs exec'd 0 ====
+
+ 0xFE8DD74: 5712103A rlwinm r18,r24,2,0,29
+ 0: GETL R24, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R18
+ 3: INCEIPL $4
+
+ 0xFE8DD78: 3A000000 li r16,0
+ 4: MOVL $0x0, t2
+ 5: PUTL t2, R16
+ 6: INCEIPL $4
+
+ 0xFE8DD7C: 7DF28A14 add r15,r18,r17
+ 7: GETL R18, t4
+ 8: GETL R17, t6
+ 9: ADDL t4, t6
+ 10: PUTL t6, R15
+ 11: INCEIPL $4
+
+ 0xFE8DD80: 7E208B78 or r0,r17,r17
+ 12: GETL R17, t8
+ 13: PUTL t8, R0
+ 14: INCEIPL $4
+
+ 0xFE8DD84: 920F0010 stw r16,16(r15)
+ 15: GETL R16, t10
+ 16: GETL R15, t12
+ 17: ADDL $0x10, t12
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0xFE8DD88: 4BFFFD6C b 0xFE8DAF4
+ 20: JMPo $0xFE8DAF4 ($4)
+
+
+
+. 2837 FE8DD74 24
+. 57 12 10 3A 3A 00 00 00 7D F2 8A 14 7E 20 8B 78 92 0F 00 10 4B FF FD 6C
+==== BB 2838 (0xFE8DAF4) approx BBs exec'd 0 ====
+
+ 0xFE8DAF4: 82610074 lwz r19,116(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0xFE8DAF8: 7C030378 or r3,r0,r0
+ 5: GETL R0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE8DAFC: 81210024 lwz r9,36(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x24, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0xFE8DB00: 7E6803A6 mtlr r19
+ 13: GETL R19, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFE8DB04: 81C10028 lwz r14,40(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x28, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R14
+ 20: INCEIPL $4
+
+ 0xFE8DB08: 81E1002C lwz r15,44(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x2C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R15
+ 25: INCEIPL $4
+
+ 0xFE8DB0C: 7D208120 mtcrf 0x8,r9
+ 26: GETL R9, t20
+ 27: ICRFL t20, $0x4, CR
+ 28: INCEIPL $4
+
+ 0xFE8DB10: 82010030 lwz r16,48(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x30, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R16
+ 33: INCEIPL $4
+
+ 0xFE8DB14: 82210034 lwz r17,52(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x34, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R17
+ 38: INCEIPL $4
+
+ 0xFE8DB18: 82410038 lwz r18,56(r1)
+ 39: GETL R1, t30
+ 40: ADDL $0x38, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R18
+ 43: INCEIPL $4
+
+ 0xFE8DB1C: 8261003C lwz r19,60(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x3C, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R19
+ 48: INCEIPL $4
+
+ 0xFE8DB20: 82810040 lwz r20,64(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x40, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R20
+ 53: INCEIPL $4
+
+ 0xFE8DB24: 82A10044 lwz r21,68(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x44, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R21
+ 58: INCEIPL $4
+
+ 0xFE8DB28: 82C10048 lwz r22,72(r1)
+ 59: GETL R1, t46
+ 60: ADDL $0x48, t46
+ 61: LDL (t46), t48
+ 62: PUTL t48, R22
+ 63: INCEIPL $4
+
+ 0xFE8DB2C: 82E1004C lwz r23,76(r1)
+ 64: GETL R1, t50
+ 65: ADDL $0x4C, t50
+ 66: LDL (t50), t52
+ 67: PUTL t52, R23
+ 68: INCEIPL $4
+
+ 0xFE8DB30: 83010050 lwz r24,80(r1)
+ 69: GETL R1, t54
+ 70: ADDL $0x50, t54
+ 71: LDL (t54), t56
+ 72: PUTL t56, R24
+ 73: INCEIPL $4
+
+ 0xFE8DB34: 83210054 lwz r25,84(r1)
+ 74: GETL R1, t58
+ 75: ADDL $0x54, t58
+ 76: LDL (t58), t60
+ 77: PUTL t60, R25
+ 78: INCEIPL $4
+
+ 0xFE8DB38: 83410058 lwz r26,88(r1)
+ 79: GETL R1, t62
+ 80: ADDL $0x58, t62
+ 81: LDL (t62), t64
+ 82: PUTL t64, R26
+ 83: INCEIPL $4
+
+ 0xFE8DB3C: 8361005C lwz r27,92(r1)
+ 84: GETL R1, t66
+ 85: ADDL $0x5C, t66
+ 86: LDL (t66), t68
+ 87: PUTL t68, R27
+ 88: INCEIPL $4
+
+ 0xFE8DB40: 83810060 lwz r28,96(r1)
+ 89: GETL R1, t70
+ 90: ADDL $0x60, t70
+ 91: LDL (t70), t72
+ 92: PUTL t72, R28
+ 93: INCEIPL $4
+
+ 0xFE8DB44: 83A10064 lwz r29,100(r1)
+ 94: GETL R1, t74
+ 95: ADDL $0x64, t74
+ 96: LDL (t74), t76
+ 97: PUTL t76, R29
+ 98: INCEIPL $4
+
+ 0xFE8DB48: 83C10068 lwz r30,104(r1)
+ 99: GETL R1, t78
+ 100: ADDL $0x68, t78
+ 101: LDL (t78), t80
+ 102: PUTL t80, R30
+ 103: INCEIPL $4
+
+ 0xFE8DB4C: 83E1006C lwz r31,108(r1)
+ 104: GETL R1, t82
+ 105: ADDL $0x6C, t82
+ 106: LDL (t82), t84
+ 107: PUTL t84, R31
+ 108: INCEIPL $4
+
+ 0xFE8DB50: 38210070 addi r1,r1,112
+ 109: GETL R1, t86
+ 110: ADDL $0x70, t86
+ 111: PUTL t86, R1
+ 112: INCEIPL $4
+
+ 0xFE8DB54: 4E800020 blr
+ 113: GETL LR, t88
+ 114: JMPo-r t88 ($4)
+
+
+
+. 2838 FE8DAF4 100
+. 82 61 00 74 7C 03 03 78 81 21 00 24 7E 68 03 A6 81 C1 00 28 81 E1 00 2C 7D 20 81 20 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
+==== BB 2839 (0xFE8DCD8) approx BBs exec'd 0 ====
+
+ 0xFE8DCD8: 2F9D0000 cmpi cr7,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE8DCDC: 947A0004 stwu r3,4(r26)
+ 4: GETL R3, t4
+ 5: GETL R26, t6
+ 6: ADDL $0x4, t6
+ 7: PUTL t6, R26
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFE8DCE0: 3B9C0004 addi r28,r28,4
+ 10: GETL R28, t8
+ 11: ADDL $0x4, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0xFE8DCE4: 7F19E840 cmpl cr6,r25,r29
+ 14: GETL R25, t10
+ 15: GETL R29, t12
+ 16: CMPUL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0xFE8DCE8: 7FA0EB78 or r0,r29,r29
+ 19: GETL R29, t16
+ 20: PUTL t16, R0
+ 21: INCEIPL $4
+
+ 0xFE8DCEC: 409EFF84 bc 4,30,0xFE8DC70
+ 22: Jc30o $0xFE8DC70
+
+
+
+. 2839 FE8DCD8 24
+. 2F 9D 00 00 94 7A 00 04 3B 9C 00 04 7F 19 E8 40 7F A0 EB 78 40 9E FF 84
+==== BB 2840 (0xFE8DC70) approx BBs exec'd 0 ====
+
+ 0xFE8DC70: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8DC74: 38800000 li r4,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE8DC78: 4099000C bc 4,25,0xFE8DC84
+ 6: Jc25o $0xFE8DC84
+
+
+
+. 2840 FE8DC70 12
+. 7F A3 EB 78 38 80 00 00 40 99 00 0C
+==== BB 2841 (0xFE8DC7C) approx BBs exec'd 0 ====
+
+ 0xFE8DC7C: 4804B4A5 bl 0xFED9120
+ 0: MOVL $0xFE8DC80, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFED9120 ($4)
+
+
+
+. 2841 FE8DC7C 4
+. 48 04 B4 A5
+==== BB 2842 rawmemchr(0xFED9120) approx BBs exec'd 0 ====
+
+ 0xFED9120: 70600003 andi. r0,r3,0x3
+ 0: GETL R3, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED9124: 9421FFF0 stwu r1,-16(r1)
+ 6: GETL R1, t4
+ 7: GETL R1, t6
+ 8: ADDL $0xFFFFFFF0, t6
+ 9: PUTL t6, R1
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFED9128: 5484063E rlwinm r4,r4,0,24,31
+ 12: GETL R4, t8
+ 13: ANDL $0xFF, t8
+ 14: PUTL t8, R4
+ 15: INCEIPL $4
+
+ 0xFED912C: 4182001C bc 12,2,0xFED9148
+ 16: Js02o $0xFED9148
+
+
+
+. 2842 FED9120 16
+. 70 60 00 03 94 21 FF F0 54 84 06 3E 41 82 00 1C
+==== BB 2843 (0xFED9148) approx BBs exec'd 0 ====
+
+ 0xFED9148: 5486402E rlwinm r6,r4,8,0,23
+ 0: GETL R4, t0
+ 1: SHLL $0x8, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0xFED914C: 3D007EFE lis r8,32510
+ 4: MOVL $0x7EFE0000, t2
+ 5: PUTL t2, R8
+ 6: INCEIPL $4
+
+ 0xFED9150: 7C853378 or r5,r4,r6
+ 7: GETL R4, t4
+ 8: GETL R6, t6
+ 9: ORL t6, t4
+ 10: PUTL t4, R5
+ 11: INCEIPL $4
+
+ 0xFED9154: 3D608101 lis r11,-32511
+ 12: MOVL $0x81010000, t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0xFED9158: 54A9801E rlwinm r9,r5,16,0,15
+ 15: GETL R5, t10
+ 16: SHLL $0x10, t10
+ 17: PUTL t10, R9
+ 18: INCEIPL $4
+
+ 0xFED915C: 6108FEFF ori r8,r8,0xFEFF
+ 19: MOVL $0x7EFEFEFF, t12
+ 20: PUTL t12, R8
+ 21: INCEIPL $4
+
+ 0xFED9160: 7CAA4B78 or r10,r5,r9
+ 22: GETL R5, t14
+ 23: GETL R9, t16
+ 24: ORL t16, t14
+ 25: PUTL t14, R10
+ 26: INCEIPL $4
+
+ 0xFED9164: 616B0100 ori r11,r11,0x100
+ 27: MOVL $0x81010100, t18
+ 28: PUTL t18, R11
+ 29: INCEIPL $4
+
+ 0xFED9168: 80030000 lwz r0,0(r3)
+ 30: GETL R3, t20
+ 31: LDL (t20), t22
+ 32: PUTL t22, R0
+ 33: INCEIPL $4
+
+ 0xFED916C: 38630004 addi r3,r3,4
+ 34: GETL R3, t24
+ 35: ADDL $0x4, t24
+ 36: PUTL t24, R3
+ 37: INCEIPL $4
+
+ 0xFED9170: 7C0C5278 xor r12,r0,r10
+ 38: GETL R0, t26
+ 39: GETL R10, t28
+ 40: XORL t26, t28
+ 41: PUTL t28, R12
+ 42: INCEIPL $4
+
+ 0xFED9174: 7D2C4214 add r9,r12,r8
+ 43: GETL R12, t30
+ 44: GETL R8, t32
+ 45: ADDL t30, t32
+ 46: PUTL t32, R9
+ 47: INCEIPL $4
+
+ 0xFED9178: 7D874A78 xor r7,r12,r9
+ 48: GETL R12, t34
+ 49: GETL R9, t36
+ 50: XORL t34, t36
+ 51: PUTL t36, R7
+ 52: INCEIPL $4
+
+ 0xFED917C: 7D693879 andc. r9,r11,r7
+ 53: GETL R11, t38
+ 54: GETL R7, t40
+ 55: NOTL t40
+ 56: ANDL t38, t40
+ 57: PUTL t40, R9
+ 58: CMP0L t40, t42 (-rSo)
+ 59: ICRFL t42, $0x0, CR
+ 60: INCEIPL $4
+
+ 0xFED9180: 3923FFFC addi r9,r3,-4
+ 61: GETL R3, t44
+ 62: ADDL $0xFFFFFFFC, t44
+ 63: PUTL t44, R9
+ 64: INCEIPL $4
+
+ 0xFED9184: 41A2FFE4 bc 13,2,0xFED9168
+ 65: Js02o $0xFED9168
+
+
+
+. 2843 FED9148 64
+. 54 86 40 2E 3D 00 7E FE 7C 85 33 78 3D 60 81 01 54 A9 80 1E 61 08 FE FF 7C AA 4B 78 61 6B 01 00 80 03 00 00 38 63 00 04 7C 0C 52 78 7D 2C 42 14 7D 87 4A 78 7D 69 38 79 39 23 FF FC 41 A2 FF E4
+==== BB 2844 (0xFED9168) approx BBs exec'd 0 ====
+
+ 0xFED9168: 80030000 lwz r0,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFED916C: 38630004 addi r3,r3,4
+ 4: GETL R3, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFED9170: 7C0C5278 xor r12,r0,r10
+ 8: GETL R0, t6
+ 9: GETL R10, t8
+ 10: XORL t6, t8
+ 11: PUTL t8, R12
+ 12: INCEIPL $4
+
+ 0xFED9174: 7D2C4214 add r9,r12,r8
+ 13: GETL R12, t10
+ 14: GETL R8, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0xFED9178: 7D874A78 xor r7,r12,r9
+ 18: GETL R12, t14
+ 19: GETL R9, t16
+ 20: XORL t14, t16
+ 21: PUTL t16, R7
+ 22: INCEIPL $4
+
+ 0xFED917C: 7D693879 andc. r9,r11,r7
+ 23: GETL R11, t18
+ 24: GETL R7, t20
+ 25: NOTL t20
+ 26: ANDL t18, t20
+ 27: PUTL t20, R9
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x0, CR
+ 30: INCEIPL $4
+
+ 0xFED9180: 3923FFFC addi r9,r3,-4
+ 31: GETL R3, t24
+ 32: ADDL $0xFFFFFFFC, t24
+ 33: PUTL t24, R9
+ 34: INCEIPL $4
+
+ 0xFED9184: 41A2FFE4 bc 13,2,0xFED9168
+ 35: Js02o $0xFED9168
+
+
+
+. 2844 FED9168 32
+. 80 03 00 00 38 63 00 04 7C 0C 52 78 7D 2C 42 14 7D 87 4A 78 7D 69 38 79 39 23 FF FC 41 A2 FF E4
+==== BB 2845 (0xFED9188) approx BBs exec'd 0 ====
+
+ 0xFED9188: 88A3FFFC lbz r5,-4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFED918C: 7C852000 cmp cr1,r5,r4
+ 5: GETL R5, t4
+ 6: GETL R4, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFED9190: 41860034 bc 12,6,0xFED91C4
+ 10: Js06o $0xFED91C4
+
+
+
+. 2845 FED9188 12
+. 88 A3 FF FC 7C 85 20 00 41 86 00 34
+==== BB 2846 (0xFED9194) approx BBs exec'd 0 ====
+
+ 0xFED9194: 88C90001 lbz r6,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFED9198: 7F062000 cmp cr6,r6,r4
+ 5: GETL R6, t4
+ 6: GETL R4, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFED919C: 419A0034 bc 12,26,0xFED91D0
+ 10: Js26o $0xFED91D0
+
+
+
+. 2846 FED9194 12
+. 88 C9 00 01 7F 06 20 00 41 9A 00 34
+==== BB 2847 (0xFED91D0) approx BBs exec'd 0 ====
+
+ 0xFED91D0: 3863FFFD addi r3,r3,-3
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFD, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFED91D4: 38210010 addi r1,r1,16
+ 4: GETL R1, t2
+ 5: ADDL $0x10, t2
+ 6: PUTL t2, R1
+ 7: INCEIPL $4
+
+ 0xFED91D8: 4E800020 blr
+ 8: GETL LR, t4
+ 9: JMPo-r t4 ($4)
+
+
+
+. 2847 FED91D0 12
+. 38 63 FF FD 38 21 00 10 4E 80 00 20
+==== BB 2848 (0xFE8DC80) approx BBs exec'd 0 ====
+
+ 0xFE8DC80: 38030001 addi r0,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0xFE8DC84: 7F190040 cmpl cr6,r25,r0
+ 4: GETL R25, t2
+ 5: GETL R0, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFE8DC88: 7C1F0378 or r31,r0,r0
+ 9: GETL R0, t8
+ 10: PUTL t8, R31
+ 11: INCEIPL $4
+
+ 0xFE8DC8C: 4099006C bc 4,25,0xFE8DCF8
+ 12: Jc25o $0xFE8DCF8
+
+
+
+. 2848 FE8DC80 16
+. 38 03 00 01 7F 19 00 40 7C 1F 03 78 40 99 00 6C
+==== BB 2849 (0xFE8DCF8) approx BBs exec'd 0 ====
+
+ 0xFE8DCF8: 3BE00000 li r31,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0xFE8DCFC: 4BFFFF94 b 0xFE8DC90
+ 3: JMPo $0xFE8DC90 ($4)
+
+
+
+. 2849 FE8DCF8 8
+. 3B E0 00 00 4B FF FF 94
+==== BB 2850 (0xFED835C) approx BBs exec'd 0 ====
+
+ 0xFED835C: 5540463F rlwinm. r0,r10,8,24,31
+ 0: GETL R10, t0
+ 1: SHRL $0x18, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED8360: 9C030004 stbu r0,4(r3)
+ 6: GETL R0, t4
+ 7: GETL R3, t6
+ 8: ADDL $0x4, t6
+ 9: PUTL t6, R3
+ 10: STB t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFED8364: 4D820020 bclr 12,2
+ 12: GETL LR, t8
+ 13: Js02o-r t8
+
+
+
+. 2850 FED835C 12
+. 55 40 46 3F 9C 03 00 04 4D 82 00 20
+==== BB 2851 (0xFE8B92C) approx BBs exec'd 0 ====
+
+ 0xFE8B92C: 801C00A8 lwz r0,168(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0xA8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE8B930: 7C7F1B78 or r31,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0xFE8B934: 2C800000 cmpi cr1,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0xFE8B938: 40860098 bc 4,6,0xFE8B9D0
+ 12: Jc06o $0xFE8B9D0
+
+
+
+. 2851 FE8B92C 16
+. 80 1C 00 A8 7C 7F 1B 78 2C 80 00 00 40 86 00 98
+==== BB 2852 (0xFE8B93C) approx BBs exec'd 0 ====
+
+ 0xFE8B93C: 2F1F0000 cmpi cr6,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE8B940: 38600000 li r3,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFE8B944: 41BAFEE8 bc 13,26,0xFE8B82C
+ 7: Js26o $0xFE8B82C
+
+
+
+. 2852 FE8B93C 12
+. 2F 1F 00 00 38 60 00 00 41 BA FE E8
+==== BB 2853 (0xFE8B948) approx BBs exec'd 0 ====
+
+ 0xFE8B948: 815F0004 lwz r10,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFE8B94C: 2C0A0000 cmpi cr0,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFE8B950: 408100B8 bc 4,1,0xFE8BA08
+ 9: Jc01o $0xFE8BA08
+
+
+
+. 2853 FE8B948 12
+. 81 5F 00 04 2C 0A 00 00 40 81 00 B8
+==== BB 2854 (0xFE8B954) approx BBs exec'd 0 ====
+
+ 0xFE8B954: 839F0008 lwz r28,8(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFE8B958: 2F9C0000 cmpi cr7,r28,0
+ 5: GETL R28, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFE8B95C: 409E0058 bc 4,30,0xFE8B9B4
+ 9: Jc30o $0xFE8B9B4
+
+
+
+. 2854 FE8B954 12
+. 83 9F 00 08 2F 9C 00 00 40 9E 00 58
+==== BB 2855 (0xFE8B960) approx BBs exec'd 0 ====
+
+ 0xFE8B960: 819F0010 lwz r12,16(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFE8B964: 3B800000 li r28,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFE8B968: 2C8C0000 cmpi cr1,r12,0
+ 8: GETL R12, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0xFE8B96C: 41860048 bc 12,6,0xFE8B9B4
+ 12: Js06o $0xFE8B9B4
+
+
+
+. 2855 FE8B960 16
+. 81 9F 00 10 3B 80 00 00 2C 8C 00 00 41 86 00 48
+==== BB 2856 (0xFE8B970) approx BBs exec'd 0 ====
+
+ 0xFE8B970: 39400000 li r10,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFE8B974: 7FAAFA14 add r29,r10,r31
+ 3: GETL R10, t2
+ 4: GETL R31, t4
+ 5: ADDL t2, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFE8B978: 3B9C0001 addi r28,r28,1
+ 8: GETL R28, t6
+ 9: ADDL $0x1, t6
+ 10: PUTL t6, R28
+ 11: INCEIPL $4
+
+ 0xFE8B97C: 813D0010 lwz r9,16(r29)
+ 12: GETL R29, t8
+ 13: ADDL $0x10, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R9
+ 16: INCEIPL $4
+
+ 0xFE8B980: 7F64DB78 or r4,r27,r27
+ 17: GETL R27, t12
+ 18: PUTL t12, R4
+ 19: INCEIPL $4
+
+ 0xFE8B984: 80090004 lwz r0,4(r9)
+ 20: GETL R9, t14
+ 21: ADDL $0x4, t14
+ 22: LDL (t14), t16
+ 23: PUTL t16, R0
+ 24: INCEIPL $4
+
+ 0xFE8B988: 7D234B78 or r3,r9,r9
+ 25: GETL R9, t18
+ 26: PUTL t18, R3
+ 27: INCEIPL $4
+
+ 0xFE8B98C: 2F000000 cmpi cr6,r0,0
+ 28: GETL R0, t20
+ 29: CMP0L t20, t22 (-rSo)
+ 30: ICRFL t22, $0x6, CR
+ 31: INCEIPL $4
+
+ 0xFE8B990: 4099006C bc 4,25,0xFE8B9FC
+ 32: Jc25o $0xFE8B9FC
+
+
+
+. 2856 FE8B970 36
+. 39 40 00 00 7F AA FA 14 3B 9C 00 01 81 3D 00 10 7F 64 DB 78 80 09 00 04 7D 23 4B 78 2F 00 00 00 40 99 00 6C
+==== BB 2857 (0xFE8B9FC) approx BBs exec'd 0 ====
+
+ 0xFE8B9FC: 48000399 bl 0xFE8BD94
+ 0: MOVL $0xFE8BA00, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFE8BD94 ($4)
+
+
+
+. 2857 FE8B9FC 4
+. 48 00 03 99
+==== BB 2858 _nl_load_domain(0xFE8BD94) approx BBs exec'd 0 ====
+
+ 0xFE8BD94: 9421FEF0 stwu r1,-272(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFEF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE8BD98: 7CA802A6 mflr r5
+ 6: GETL LR, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFE8BD9C: 4811C0B5 bl 0xFFA7E50
+ 9: MOVL $0xFE8BDA0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2858 FE8BD94 12
+. 94 21 FE F0 7C A8 02 A6 48 11 C0 B5
+==== BB 2859 (0xFE8BDA0) approx BBs exec'd 0 ====
+
+ 0xFE8BDA0: 93C10108 stw r30,264(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x108, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE8BDA4: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE8BDA8: 936100FC stw r27,252(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xFC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE8BDAC: 90A10114 stw r5,276(r1)
+ 13: GETL R5, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x114, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE8BDB0: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0xFE8BDB4: 93A10104 stw r29,260(r1)
+ 21: GETL R29, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x104, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE8BDB8: 3BA28BA0 addi r29,r2,-29792
+ 26: GETL R2, t20
+ 27: ADDL $0xFFFF8BA0, t20
+ 28: PUTL t20, R29
+ 29: INCEIPL $4
+
+ 0xFE8BDBC: 837E01A4 lwz r27,420(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0x1A4, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R27
+ 34: INCEIPL $4
+
+ 0xFE8BDC0: 926100DC stw r19,220(r1)
+ 35: GETL R19, t26
+ 36: GETL R1, t28
+ 37: ADDL $0xDC, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFE8BDC4: 7C932378 or r19,r4,r4
+ 40: GETL R4, t30
+ 41: PUTL t30, R19
+ 42: INCEIPL $4
+
+ 0xFE8BDC8: 801B0008 lwz r0,8(r27)
+ 43: GETL R27, t32
+ 44: ADDL $0x8, t32
+ 45: LDL (t32), t34
+ 46: PUTL t34, R0
+ 47: INCEIPL $4
+
+ 0xFE8BDCC: 930100F0 stw r24,240(r1)
+ 48: GETL R24, t36
+ 49: GETL R1, t38
+ 50: ADDL $0xF0, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0xFE8BDD0: 3B000000 li r24,0
+ 53: MOVL $0x0, t40
+ 54: PUTL t40, R24
+ 55: INCEIPL $4
+
+ 0xFE8BDD4: 7F80E800 cmp cr7,r0,r29
+ 56: GETL R0, t42
+ 57: GETL R29, t44
+ 58: CMPL t42, t44, t46 (-rSo)
+ 59: ICRFL t46, $0x7, CR
+ 60: INCEIPL $4
+
+ 0xFE8BDD8: 934100F8 stw r26,248(r1)
+ 61: GETL R26, t48
+ 62: GETL R1, t50
+ 63: ADDL $0xF8, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0xFE8BDDC: 93E1010C stw r31,268(r1)
+ 66: GETL R31, t52
+ 67: GETL R1, t54
+ 68: ADDL $0x10C, t54
+ 69: STL t52, (t54)
+ 70: INCEIPL $4
+
+ 0xFE8BDE0: 7C7A1B78 or r26,r3,r3
+ 71: GETL R3, t56
+ 72: PUTL t56, R26
+ 73: INCEIPL $4
+
+ 0xFE8BDE4: 91C100C8 stw r14,200(r1)
+ 74: GETL R14, t58
+ 75: GETL R1, t60
+ 76: ADDL $0xC8, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0xFE8BDE8: 7C3F0B78 or r31,r1,r1
+ 79: GETL R1, t62
+ 80: PUTL t62, R31
+ 81: INCEIPL $4
+
+ 0xFE8BDEC: 91E100CC stw r15,204(r1)
+ 82: GETL R15, t64
+ 83: GETL R1, t66
+ 84: ADDL $0xCC, t66
+ 85: STL t64, (t66)
+ 86: INCEIPL $4
+
+ 0xFE8BDF0: 920100D0 stw r16,208(r1)
+ 87: GETL R16, t68
+ 88: GETL R1, t70
+ 89: ADDL $0xD0, t70
+ 90: STL t68, (t70)
+ 91: INCEIPL $4
+
+ 0xFE8BDF4: 922100D4 stw r17,212(r1)
+ 92: GETL R17, t72
+ 93: GETL R1, t74
+ 94: ADDL $0xD4, t74
+ 95: STL t72, (t74)
+ 96: INCEIPL $4
+
+ 0xFE8BDF8: 924100D8 stw r18,216(r1)
+ 97: GETL R18, t76
+ 98: GETL R1, t78
+ 99: ADDL $0xD8, t78
+ 100: STL t76, (t78)
+ 101: INCEIPL $4
+
+ 0xFE8BDFC: 928100E0 stw r20,224(r1)
+ 102: GETL R20, t80
+ 103: GETL R1, t82
+ 104: ADDL $0xE0, t82
+ 105: STL t80, (t82)
+ 106: INCEIPL $4
+
+ 0xFE8BE00: 92A100E4 stw r21,228(r1)
+ 107: GETL R21, t84
+ 108: GETL R1, t86
+ 109: ADDL $0xE4, t86
+ 110: STL t84, (t86)
+ 111: INCEIPL $4
+
+ 0xFE8BE04: 92C100E8 stw r22,232(r1)
+ 112: GETL R22, t88
+ 113: GETL R1, t90
+ 114: ADDL $0xE8, t90
+ 115: STL t88, (t90)
+ 116: INCEIPL $4
+
+ 0xFE8BE08: 92E100EC stw r23,236(r1)
+ 117: GETL R23, t92
+ 118: GETL R1, t94
+ 119: ADDL $0xEC, t94
+ 120: STL t92, (t94)
+ 121: INCEIPL $4
+
+ 0xFE8BE0C: 932100F4 stw r25,244(r1)
+ 122: GETL R25, t96
+ 123: GETL R1, t98
+ 124: ADDL $0xF4, t98
+ 125: STL t96, (t98)
+ 126: INCEIPL $4
+
+ 0xFE8BE10: 93810100 stw r28,256(r1)
+ 127: GETL R28, t100
+ 128: GETL R1, t102
+ 129: ADDL $0x100, t102
+ 130: STL t100, (t102)
+ 131: INCEIPL $4
+
+ 0xFE8BE14: 918100C4 stw r12,196(r1)
+ 132: GETL R12, t104
+ 133: GETL R1, t106
+ 134: ADDL $0xC4, t106
+ 135: STL t104, (t106)
+ 136: INCEIPL $4
+
+ 0xFE8BE18: 419E002C bc 12,30,0xFE8BE44
+ 137: Js30o $0xFE8BE44
+
+
+
+. 2859 FE8BDA0 124
+. 93 C1 01 08 7F C8 02 A6 93 61 00 FC 90 A1 01 14 7D 80 00 26 93 A1 01 04 3B A2 8B A0 83 7E 01 A4 92 61 00 DC 7C 93 23 78 80 1B 00 08 93 01 00 F0 3B 00 00 00 7F 80 E8 00 93 41 00 F8 93 E1 01 0C 7C 7A 1B 78 91 C1 00 C8 7C 3F 0B 78 91 E1 00 CC 92 01 00 D0 92 21 00 D4 92 41 00 D8 92 81 00 E0 92 A1 00 E4 92 C1 00 E8 92 E1 00 EC 93 21 00 F4 93 81 01 00 91 81 00 C4 41 9E 00 2C
+==== BB 2860 (0xFE8BE1C) approx BBs exec'd 0 ====
+
+ 0xFE8BE1C: 38600001 li r3,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8BE20: 7D20D828 lwarx r9,r0,r27
+ 3: GETL R27, t2
+ 4: LOCKo
+ 5: LDL (t2), t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xFE8BE24: 7C09C000 cmp cr0,r9,r24
+ 8: GETL R9, t6
+ 9: GETL R24, t8
+ 10: CMPL t6, t8, t10 (-rSo)
+ 11: ICRFL t10, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFE8BE28: 4082000C bc 4,2,0xFE8BE34
+ 13: Jc02o $0xFE8BE34
+
+
+
+. 2860 FE8BE1C 16
+. 38 60 00 01 7D 20 D8 28 7C 09 C0 00 40 82 00 0C
+==== BB 2861 (0xFE8BE2C) approx BBs exec'd 0 ====
+
+ 0xFE8BE2C: 7C60D92D stwcx. r3,r0,r27
+ 0: GETL R27, t0
+ 1: GETL R3, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE8BE30: 40A2FFF0 bc 5,2,0xFE8BE20
+ 6: Jc02o $0xFE8BE20
+
+
+
+. 2861 FE8BE2C 8
+. 7C 60 D9 2D 40 A2 FF F0
+==== BB 2862 (0xFE8BE20) approx BBs exec'd 0 ====
+
+ 0xFE8BE20: 7D20D828 lwarx r9,r0,r27
+ 0: GETL R27, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE8BE24: 7C09C000 cmp cr0,r9,r24
+ 5: GETL R9, t4
+ 6: GETL R24, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFE8BE28: 4082000C bc 4,2,0xFE8BE34
+ 10: Jc02o $0xFE8BE34
+
+
+
+. 2862 FE8BE20 12
+. 7D 20 D8 28 7C 09 C0 00 40 82 00 0C
+==== BB 2863 (0xFE8BE34) approx BBs exec'd 0 ====
+
+ 0xFE8BE34: 4C00012C 0: INCEIPL $4
+
+ 0xFE8BE38: 2C090000 cmpi cr0,r9,0
+ 1: GETL R9, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8BE3C: 40820614 bc 4,2,0xFE8C450
+ 5: Jc02o $0xFE8C450
+
+
+
+. 2863 FE8BE34 12
+. 4C 00 01 2C 2C 09 00 00 40 82 06 14
+==== BB 2864 (0xFE8BE40) approx BBs exec'd 0 ====
+
+ 0xFE8BE40: 93BB0008 stw r29,8(r27)
+ 0: GETL R29, t0
+ 1: GETL R27, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE8BE44: 813B0004 lwz r9,4(r27)
+ 5: GETL R27, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFE8BE48: 38890001 addi r4,r9,1
+ 10: GETL R9, t8
+ 11: ADDL $0x1, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0xFE8BE4C: 909B0004 stw r4,4(r27)
+ 14: GETL R4, t10
+ 15: GETL R27, t12
+ 16: ADDL $0x4, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xFE8BE50: 817A0004 lwz r11,4(r26)
+ 19: GETL R26, t14
+ 20: ADDL $0x4, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R11
+ 23: INCEIPL $4
+
+ 0xFE8BE54: 2C8B0000 cmpi cr1,r11,0
+ 24: GETL R11, t18
+ 25: CMP0L t18, t20 (-rSo)
+ 26: ICRFL t20, $0x1, CR
+ 27: INCEIPL $4
+
+ 0xFE8BE58: 41860090 bc 12,6,0xFE8BEE8
+ 28: Js06o $0xFE8BEE8
+
+
+
+. 2864 FE8BE40 28
+. 93 BB 00 08 81 3B 00 04 38 89 00 01 90 9B 00 04 81 7A 00 04 2C 8B 00 00 41 86 00 90
+==== BB 2865 (0xFE8BEE8) approx BBs exec'd 0 ====
+
+ 0xFE8BEE8: 807A0000 lwz r3,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE8BEEC: 38E0FFFF li r7,-1
+ 4: MOVL $0xFFFFFFFF, t4
+ 5: PUTL t4, R7
+ 6: INCEIPL $4
+
+ 0xFE8BEF0: 90FA0004 stw r7,4(r26)
+ 7: GETL R7, t6
+ 8: GETL R26, t8
+ 9: ADDL $0x4, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFE8BEF4: 2F830000 cmpi cr7,r3,0
+ 12: GETL R3, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0xFE8BEF8: 917A0008 stw r11,8(r26)
+ 16: GETL R11, t14
+ 17: GETL R26, t16
+ 18: ADDL $0x8, t16
+ 19: STL t14, (t16)
+ 20: INCEIPL $4
+
+ 0xFE8BEFC: 409E005C bc 4,30,0xFE8BF58
+ 21: Jc30o $0xFE8BF58
+
+
+
+. 2865 FE8BEE8 24
+. 80 7A 00 00 38 E0 FF FF 90 FA 00 04 2F 83 00 00 91 7A 00 08 40 9E 00 5C
+==== BB 2866 (0xFE8BF58) approx BBs exec'd 0 ====
+
+ 0xFE8BF58: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE8BF5C: 48095DC5 bl 0xFF21D20
+ 3: MOVL $0xFE8BF60, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFF21D20 ($4)
+
+
+
+. 2866 FE8BF58 8
+. 38 80 00 00 48 09 5D C5
+==== BB 2867 (0xFF21D2C) approx BBs exec'd 0 ====
+
+ 0xFF21D2C: 4BF59C5C b 0xFE7B988
+ 0: JMPo $0xFE7B988 ($4)
+
+
+
+. 2867 FF21D2C 4
+. 4B F5 9C 5C
+==== BB 2868 __syscall_error(0xFE7B988) approx BBs exec'd 0 ====
+
+ 0xFE7B988: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE7B98C: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFE7B990: 4812C4C1 bl 0xFFA7E50
+ 9: MOVL $0xFE7B994, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2868 FE7B988 12
+. 94 21 FF F0 7D 88 02 A6 48 12 C4 C1
+==== BB 2869 (0xFE7B994) approx BBs exec'd 0 ====
+
+ 0xFE7B994: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE7B998: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE7B99C: 7D8803A6 mtlr r12
+ 8: GETL R12, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0xFE7B9A0: 809E1C4C lwz r4,7244(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x1C4C, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0xFE7B9A4: 83C10008 lwz r30,8(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x8, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0xFE7B9A8: 7D241214 add r9,r4,r2
+ 21: GETL R4, t16
+ 22: GETL R2, t18
+ 23: ADDL t16, t18
+ 24: PUTL t18, R9
+ 25: INCEIPL $4
+
+ 0xFE7B9AC: 38210010 addi r1,r1,16
+ 26: GETL R1, t20
+ 27: ADDL $0x10, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0xFE7B9B0: 90690000 stw r3,0(r9)
+ 30: GETL R3, t22
+ 31: GETL R9, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFE7B9B4: 3860FFFF li r3,-1
+ 34: MOVL $0xFFFFFFFF, t26
+ 35: PUTL t26, R3
+ 36: INCEIPL $4
+
+ 0xFE7B9B8: 4E800020 blr
+ 37: GETL LR, t28
+ 38: JMPo-r t28 ($4)
+
+
+
+. 2869 FE7B994 40
+. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 80 9E 1C 4C 83 C1 00 08 7D 24 12 14 38 21 00 10 90 69 00 00 38 60 FF FF 4E 80 00 20
+==== BB 2870 (0xFE8BF60) approx BBs exec'd 0 ====
+
+ 0xFE8BF60: 2E03FFFF cmpi cr4,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0xFE8BF64: 7C791B78 or r25,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R25
+ 7: INCEIPL $4
+
+ 0xFE8BF68: 41B2FF98 bc 13,18,0xFE8BF00
+ 8: Js18o $0xFE8BF00
+
+
+
+. 2870 FE8BF60 12
+. 2E 03 FF FF 7C 79 1B 78 41 B2 FF 98
+==== BB 2871 (0xFE8BF00) approx BBs exec'd 0 ====
+
+ 0xFE8BF00: 3B200001 li r25,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R25
+ 2: INCEIPL $4
+
+ 0xFE8BF04: 933A0004 stw r25,4(r26)
+ 3: GETL R25, t2
+ 4: GETL R26, t4
+ 5: ADDL $0x4, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFE8BF08: 82DB0004 lwz r22,4(r27)
+ 8: GETL R27, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R22
+ 12: INCEIPL $4
+
+ 0xFE8BF0C: 3936FFFF addi r9,r22,-1
+ 13: GETL R22, t10
+ 14: ADDL $0xFFFFFFFF, t10
+ 15: PUTL t10, R9
+ 16: INCEIPL $4
+
+ 0xFE8BF10: 2F890000 cmpi cr7,r9,0
+ 17: GETL R9, t12
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x7, CR
+ 20: INCEIPL $4
+
+ 0xFE8BF14: 913B0004 stw r9,4(r27)
+ 21: GETL R9, t16
+ 22: GETL R27, t18
+ 23: ADDL $0x4, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE8BF18: 40BEFF6C bc 5,30,0xFE8BE84
+ 26: Jc30o $0xFE8BE84
+
+
+
+. 2871 FE8BF00 28
+. 3B 20 00 01 93 3A 00 04 82 DB 00 04 39 36 FF FF 2F 89 00 00 91 3B 00 04 40 BE FF 6C
+==== BB 2872 (0xFE8BF1C) approx BBs exec'd 0 ====
+
+ 0xFE8BF1C: 913B0008 stw r9,8(r27)
+ 0: GETL R9, t0
+ 1: GETL R27, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE8BF20: 7C0004AC sync
+ 5: INCEIPL $4
+
+ 0xFE8BF24: 7F40D828 lwarx r26,r0,r27
+ 6: GETL R27, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R26
+ 10: INCEIPL $4
+
+ 0xFE8BF28: 7D20D92D stwcx. r9,r0,r27
+ 11: GETL R27, t8
+ 12: GETL R9, t10
+ 13: LOCKo
+ 14: STL t10, (t8) (-rSo)
+ 15: ICRFL cr, $0x0, CR
+ 16: INCEIPL $4
+
+ 0xFE8BF2C: 40A2FFF8 bc 5,2,0xFE8BF24
+ 17: Jc02o $0xFE8BF24
+
+
+
+. 2872 FE8BF1C 20
+. 91 3B 00 08 7C 00 04 AC 7F 40 D8 28 7D 20 D9 2D 40 A2 FF F8
+==== BB 2873 (0xFE8BF30) approx BBs exec'd 0 ====
+
+ 0xFE8BF30: 2C1A0001 cmpi cr0,r26,1
+ 0: GETL R26, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8BF34: 4081FF50 bc 4,1,0xFE8BE84
+ 5: Jc01o $0xFE8BE84
+
+
+
+. 2873 FE8BF30 8
+. 2C 1A 00 01 40 81 FF 50
+==== BB 2874 (0xFE8BE84) approx BBs exec'd 0 ====
+
+ 0xFE8BE84: 80A10000 lwz r5,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFE8BE88: 83650004 lwz r27,4(r5)
+ 4: GETL R5, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0xFE8BE8C: 8145FFB4 lwz r10,-76(r5)
+ 9: GETL R5, t8
+ 10: ADDL $0xFFFFFFB4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R10
+ 13: INCEIPL $4
+
+ 0xFE8BE90: 7F6803A6 mtlr r27
+ 14: GETL R27, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0xFE8BE94: 81C5FFB8 lwz r14,-72(r5)
+ 17: GETL R5, t14
+ 18: ADDL $0xFFFFFFB8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R14
+ 21: INCEIPL $4
+
+ 0xFE8BE98: 81E5FFBC lwz r15,-68(r5)
+ 22: GETL R5, t18
+ 23: ADDL $0xFFFFFFBC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R15
+ 26: INCEIPL $4
+
+ 0xFE8BE9C: 7D408120 mtcrf 0x8,r10
+ 27: GETL R10, t22
+ 28: ICRFL t22, $0x4, CR
+ 29: INCEIPL $4
+
+ 0xFE8BEA0: 8205FFC0 lwz r16,-64(r5)
+ 30: GETL R5, t24
+ 31: ADDL $0xFFFFFFC0, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R16
+ 34: INCEIPL $4
+
+ 0xFE8BEA4: 8225FFC4 lwz r17,-60(r5)
+ 35: GETL R5, t28
+ 36: ADDL $0xFFFFFFC4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R17
+ 39: INCEIPL $4
+
+ 0xFE8BEA8: 8245FFC8 lwz r18,-56(r5)
+ 40: GETL R5, t32
+ 41: ADDL $0xFFFFFFC8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R18
+ 44: INCEIPL $4
+
+ 0xFE8BEAC: 8265FFCC lwz r19,-52(r5)
+ 45: GETL R5, t36
+ 46: ADDL $0xFFFFFFCC, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R19
+ 49: INCEIPL $4
+
+ 0xFE8BEB0: 8285FFD0 lwz r20,-48(r5)
+ 50: GETL R5, t40
+ 51: ADDL $0xFFFFFFD0, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R20
+ 54: INCEIPL $4
+
+ 0xFE8BEB4: 82A5FFD4 lwz r21,-44(r5)
+ 55: GETL R5, t44
+ 56: ADDL $0xFFFFFFD4, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R21
+ 59: INCEIPL $4
+
+ 0xFE8BEB8: 82C5FFD8 lwz r22,-40(r5)
+ 60: GETL R5, t48
+ 61: ADDL $0xFFFFFFD8, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R22
+ 64: INCEIPL $4
+
+ 0xFE8BEBC: 82E5FFDC lwz r23,-36(r5)
+ 65: GETL R5, t52
+ 66: ADDL $0xFFFFFFDC, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R23
+ 69: INCEIPL $4
+
+ 0xFE8BEC0: 8305FFE0 lwz r24,-32(r5)
+ 70: GETL R5, t56
+ 71: ADDL $0xFFFFFFE0, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R24
+ 74: INCEIPL $4
+
+ 0xFE8BEC4: 8325FFE4 lwz r25,-28(r5)
+ 75: GETL R5, t60
+ 76: ADDL $0xFFFFFFE4, t60
+ 77: LDL (t60), t62
+ 78: PUTL t62, R25
+ 79: INCEIPL $4
+
+ 0xFE8BEC8: 8345FFE8 lwz r26,-24(r5)
+ 80: GETL R5, t64
+ 81: ADDL $0xFFFFFFE8, t64
+ 82: LDL (t64), t66
+ 83: PUTL t66, R26
+ 84: INCEIPL $4
+
+ 0xFE8BECC: 8365FFEC lwz r27,-20(r5)
+ 85: GETL R5, t68
+ 86: ADDL $0xFFFFFFEC, t68
+ 87: LDL (t68), t70
+ 88: PUTL t70, R27
+ 89: INCEIPL $4
+
+ 0xFE8BED0: 8385FFF0 lwz r28,-16(r5)
+ 90: GETL R5, t72
+ 91: ADDL $0xFFFFFFF0, t72
+ 92: LDL (t72), t74
+ 93: PUTL t74, R28
+ 94: INCEIPL $4
+
+ 0xFE8BED4: 83A5FFF4 lwz r29,-12(r5)
+ 95: GETL R5, t76
+ 96: ADDL $0xFFFFFFF4, t76
+ 97: LDL (t76), t78
+ 98: PUTL t78, R29
+ 99: INCEIPL $4
+
+ 0xFE8BED8: 83C5FFF8 lwz r30,-8(r5)
+ 100: GETL R5, t80
+ 101: ADDL $0xFFFFFFF8, t80
+ 102: LDL (t80), t82
+ 103: PUTL t82, R30
+ 104: INCEIPL $4
+
+ 0xFE8BEDC: 83E5FFFC lwz r31,-4(r5)
+ 105: GETL R5, t84
+ 106: ADDL $0xFFFFFFFC, t84
+ 107: LDL (t84), t86
+ 108: PUTL t86, R31
+ 109: INCEIPL $4
+
+ 0xFE8BEE0: 7CA12B78 or r1,r5,r5
+ 110: GETL R5, t88
+ 111: PUTL t88, R1
+ 112: INCEIPL $4
+
+ 0xFE8BEE4: 4E800020 blr
+ 113: GETL LR, t90
+ 114: JMPo-r t90 ($4)
+
+
+
+. 2874 FE8BE84 100
+. 80 A1 00 00 83 65 00 04 81 45 FF B4 7F 68 03 A6 81 C5 FF B8 81 E5 FF BC 7D 40 81 20 82 05 FF C0 82 25 FF C4 82 45 FF C8 82 65 FF CC 82 85 FF D0 82 A5 FF D4 82 C5 FF D8 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
+==== BB 2875 (0xFE8BA00) approx BBs exec'd 0 ====
+
+ 0xFE8BA00: 813D0010 lwz r9,16(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE8BA04: 4BFFFF90 b 0xFE8B994
+ 5: JMPo $0xFE8B994 ($4)
+
+
+
+. 2875 FE8BA00 8
+. 81 3D 00 10 4B FF FF 90
+==== BB 2876 (0xFE8B994) approx BBs exec'd 0 ====
+
+ 0xFE8B994: 80690008 lwz r3,8(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE8B998: 578A103A rlwinm r10,r28,2,0,29
+ 5: GETL R28, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0xFE8B99C: 7D6AFA14 add r11,r10,r31
+ 9: GETL R10, t6
+ 10: GETL R31, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0xFE8B9A0: 2C030000 cmpi cr0,r3,0
+ 14: GETL R3, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x0, CR
+ 17: INCEIPL $4
+
+ 0xFE8B9A4: 40820010 bc 4,2,0xFE8B9B4
+ 18: Jc02o $0xFE8B9B4
+
+
+
+. 2876 FE8B994 20
+. 80 69 00 08 57 8A 10 3A 7D 6A FA 14 2C 03 00 00 40 82 00 10
+==== BB 2877 (0xFE8B9A8) approx BBs exec'd 0 ====
+
+ 0xFE8B9A8: 808B0010 lwz r4,16(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE8B9AC: 2F840000 cmpi cr7,r4,0
+ 5: GETL R4, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFE8B9B0: 409EFFC4 bc 4,30,0xFE8B974
+ 9: Jc30o $0xFE8B974
+
+
+
+. 2877 FE8B9A8 12
+. 80 8B 00 10 2F 84 00 00 40 9E FF C4
+==== BB 2878 (0xFE8B974) approx BBs exec'd 0 ====
+
+ 0xFE8B974: 7FAAFA14 add r29,r10,r31
+ 0: GETL R10, t0
+ 1: GETL R31, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFE8B978: 3B9C0001 addi r28,r28,1
+ 5: GETL R28, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0xFE8B97C: 813D0010 lwz r9,16(r29)
+ 9: GETL R29, t6
+ 10: ADDL $0x10, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFE8B980: 7F64DB78 or r4,r27,r27
+ 14: GETL R27, t10
+ 15: PUTL t10, R4
+ 16: INCEIPL $4
+
+ 0xFE8B984: 80090004 lwz r0,4(r9)
+ 17: GETL R9, t12
+ 18: ADDL $0x4, t12
+ 19: LDL (t12), t14
+ 20: PUTL t14, R0
+ 21: INCEIPL $4
+
+ 0xFE8B988: 7D234B78 or r3,r9,r9
+ 22: GETL R9, t16
+ 23: PUTL t16, R3
+ 24: INCEIPL $4
+
+ 0xFE8B98C: 2F000000 cmpi cr6,r0,0
+ 25: GETL R0, t18
+ 26: CMP0L t18, t20 (-rSo)
+ 27: ICRFL t20, $0x6, CR
+ 28: INCEIPL $4
+
+ 0xFE8B990: 4099006C bc 4,25,0xFE8B9FC
+ 29: Jc25o $0xFE8B9FC
+
+
+
+. 2878 FE8B974 32
+. 7F AA FA 14 3B 9C 00 01 81 3D 00 10 7F 64 DB 78 80 09 00 04 7D 23 4B 78 2F 00 00 00 40 99 00 6C
+==== BB 2879 (0xFE8B9B4) approx BBs exec'd 0 ====
+
+ 0xFE8B9B4: 4092003C bc 4,18,0xFE8B9F0
+ 0: Jc18o $0xFE8B9F0
+
+
+
+. 2879 FE8B9B4 4
+. 40 92 00 3C
+==== BB 2880 (0xFE8B9B8) approx BBs exec'd 0 ====
+
+ 0xFE8B9B8: 73000001 andi. r0,r24,0x1
+ 0: GETL R24, t0
+ 1: ANDL $0x1, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFE8B9BC: 4182FE6C bc 12,2,0xFE8B828
+ 6: Js02o $0xFE8B828
+
+
+
+. 2880 FE8B9B8 8
+. 73 00 00 01 41 82 FE 6C
+==== BB 2881 (0xFE8B9C0) approx BBs exec'd 0 ====
+
+ 0xFE8B9C0: 80610028 lwz r3,40(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x28, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE8B9C4: 4811E96D bl 0xFFAA330
+ 5: MOVL $0xFE8B9C8, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0xFFAA330 ($4)
+
+
+
+. 2881 FE8B9C0 8
+. 80 61 00 28 48 11 E9 6D
+==== BB 2882 (0xFE8B9C8) approx BBs exec'd 0 ====
+
+ 0xFE8B9C8: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8B9CC: 4BFFFE60 b 0xFE8B82C
+ 3: JMPo $0xFE8B82C ($4)
+
+
+
+. 2882 FE8B9C8 8
+. 7F E3 FB 78 4B FF FE 60
+==== BB 2883 (0xFE8B82C) approx BBs exec'd 0 ====
+
+ 0xFE8B82C: 83010064 lwz r24,100(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x64, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0xFE8B830: 8161003C lwz r11,60(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x3C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0xFE8B834: 7F0803A6 mtlr r24
+ 10: GETL R24, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFE8B838: 83210044 lwz r25,68(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x44, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R25
+ 17: INCEIPL $4
+
+ 0xFE8B83C: 83010040 lwz r24,64(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x40, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R24
+ 22: INCEIPL $4
+
+ 0xFE8B840: 7D608120 mtcrf 0x8,r11
+ 23: GETL R11, t18
+ 24: ICRFL t18, $0x4, CR
+ 25: INCEIPL $4
+
+ 0xFE8B844: 83410048 lwz r26,72(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x48, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R26
+ 30: INCEIPL $4
+
+ 0xFE8B848: 8361004C lwz r27,76(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x4C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R27
+ 35: INCEIPL $4
+
+ 0xFE8B84C: 83810050 lwz r28,80(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x50, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R28
+ 40: INCEIPL $4
+
+ 0xFE8B850: 83A10054 lwz r29,84(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x54, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R29
+ 45: INCEIPL $4
+
+ 0xFE8B854: 83C10058 lwz r30,88(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x58, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R30
+ 50: INCEIPL $4
+
+ 0xFE8B858: 83E1005C lwz r31,92(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x5C, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R31
+ 55: INCEIPL $4
+
+ 0xFE8B85C: 38210060 addi r1,r1,96
+ 56: GETL R1, t44
+ 57: ADDL $0x60, t44
+ 58: PUTL t44, R1
+ 59: INCEIPL $4
+
+ 0xFE8B860: 4E800020 blr
+ 60: GETL LR, t46
+ 61: JMPo-r t46 ($4)
+
+
+
+. 2883 FE8B82C 56
+. 83 01 00 64 81 61 00 3C 7F 08 03 A6 83 21 00 44 83 01 00 40 7D 60 81 20 83 41 00 48 83 61 00 4C 83 81 00 50 83 A1 00 54 83 C1 00 58 83 E1 00 5C 38 21 00 60 4E 80 00 20
+==== BB 2884 (0xFE8B17C) approx BBs exec'd 0 ====
+
+ 0xFE8B17C: 7C7A1B79 or. r26,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R26
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8B180: 41A2FF8C bc 13,2,0xFE8B10C
+ 5: Js02o $0xFE8B10C
+
+
+
+. 2884 FE8B17C 8
+. 7C 7A 1B 79 41 A2 FF 8C
+==== BB 2885 (0xFE8B184) approx BBs exec'd 0 ====
+
+ 0xFE8B184: 7EE4BB78 or r4,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE8B188: 7EC5B378 or r5,r22,r22
+ 3: GETL R22, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFE8B18C: 38DF0008 addi r6,r31,8
+ 6: GETL R31, t4
+ 7: ADDL $0x8, t4
+ 8: PUTL t4, R6
+ 9: INCEIPL $4
+
+ 0xFE8B190: 4BFFF5F5 bl 0xFE8A784
+ 10: MOVL $0xFE8B194, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0xFE8A784 ($4)
+
+
+
+. 2885 FE8B184 16
+. 7E E4 BB 78 7E C5 B3 78 38 DF 00 08 4B FF F5 F5
+==== BB 2886 _nl_find_msg(0xFE8A784) approx BBs exec'd 0 ====
+
+ 0xFE8A784: 7CE802A6 mflr r7
+ 0: GETL LR, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0xFE8A788: 9421FFA0 stwu r1,-96(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFA0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFE8A78C: 4811D6C5 bl 0xFFA7E50
+ 9: MOVL $0xFE8A790, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2886 FE8A784 12
+. 7C E8 02 A6 94 21 FF A0 48 11 D6 C5
+==== BB 2887 (0xFE8A790) approx BBs exec'd 0 ====
+
+ 0xFE8A790: 92210024 stw r17,36(r1)
+ 0: GETL R17, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x24, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE8A794: 9261002C stw r19,44(r1)
+ 5: GETL R19, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x2C, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFE8A798: 7CD13378 or r17,r6,r6
+ 10: GETL R6, t8
+ 11: PUTL t8, R17
+ 12: INCEIPL $4
+
+ 0xFE8A79C: 90E10064 stw r7,100(r1)
+ 13: GETL R7, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x64, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE8A7A0: 7C932378 or r19,r4,r4
+ 18: GETL R4, t14
+ 19: PUTL t14, R19
+ 20: INCEIPL $4
+
+ 0xFE8A7A4: 80030004 lwz r0,4(r3)
+ 21: GETL R3, t16
+ 22: ADDL $0x4, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R0
+ 25: INCEIPL $4
+
+ 0xFE8A7A8: 92810030 stw r20,48(r1)
+ 26: GETL R20, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x30, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xFE8A7AC: 7C741B78 or r20,r3,r3
+ 31: GETL R3, t24
+ 32: PUTL t24, R20
+ 33: INCEIPL $4
+
+ 0xFE8A7B0: 2F800000 cmpi cr7,r0,0
+ 34: GETL R0, t26
+ 35: CMP0L t26, t28 (-rSo)
+ 36: ICRFL t28, $0x7, CR
+ 37: INCEIPL $4
+
+ 0xFE8A7B4: 93010040 stw r24,64(r1)
+ 38: GETL R24, t30
+ 39: GETL R1, t32
+ 40: ADDL $0x40, t32
+ 41: STL t30, (t32)
+ 42: INCEIPL $4
+
+ 0xFE8A7B8: 93C10058 stw r30,88(r1)
+ 43: GETL R30, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x58, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0xFE8A7BC: 7CB82B78 or r24,r5,r5
+ 48: GETL R5, t38
+ 49: PUTL t38, R24
+ 50: INCEIPL $4
+
+ 0xFE8A7C0: 92410028 stw r18,40(r1)
+ 51: GETL R18, t40
+ 52: GETL R1, t42
+ 53: ADDL $0x28, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0xFE8A7C4: 7FC802A6 mflr r30
+ 56: GETL LR, t44
+ 57: PUTL t44, R30
+ 58: INCEIPL $4
+
+ 0xFE8A7C8: 92A10034 stw r21,52(r1)
+ 59: GETL R21, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x34, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0xFE8A7CC: 92C10038 stw r22,56(r1)
+ 64: GETL R22, t50
+ 65: GETL R1, t52
+ 66: ADDL $0x38, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0xFE8A7D0: 92E1003C stw r23,60(r1)
+ 69: GETL R23, t54
+ 70: GETL R1, t56
+ 71: ADDL $0x3C, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0xFE8A7D4: 93210044 stw r25,68(r1)
+ 74: GETL R25, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x44, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0xFE8A7D8: 93410048 stw r26,72(r1)
+ 79: GETL R26, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x48, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0xFE8A7DC: 9361004C stw r27,76(r1)
+ 84: GETL R27, t66
+ 85: GETL R1, t68
+ 86: ADDL $0x4C, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0xFE8A7E0: 93810050 stw r28,80(r1)
+ 89: GETL R28, t70
+ 90: GETL R1, t72
+ 91: ADDL $0x50, t72
+ 92: STL t70, (t72)
+ 93: INCEIPL $4
+
+ 0xFE8A7E4: 93A10054 stw r29,84(r1)
+ 94: GETL R29, t74
+ 95: GETL R1, t76
+ 96: ADDL $0x54, t76
+ 97: STL t74, (t76)
+ 98: INCEIPL $4
+
+ 0xFE8A7E8: 93E1005C stw r31,92(r1)
+ 99: GETL R31, t78
+ 100: GETL R1, t80
+ 101: ADDL $0x5C, t80
+ 102: STL t78, (t80)
+ 103: INCEIPL $4
+
+ 0xFE8A7EC: 409D0508 bc 4,29,0xFE8ACF4
+ 104: Jc29o $0xFE8ACF4
+
+
+
+. 2887 FE8A790 96
+. 92 21 00 24 92 61 00 2C 7C D1 33 78 90 E1 00 64 7C 93 23 78 80 03 00 04 92 81 00 30 7C 74 1B 78 2F 80 00 00 93 01 00 40 93 C1 00 58 7C B8 2B 78 92 41 00 28 7F C8 02 A6 92 A1 00 34 92 C1 00 38 92 E1 00 3C 93 21 00 44 93 41 00 48 93 61 00 4C 93 81 00 50 93 A1 00 54 93 E1 00 5C 40 9D 05 08
+==== BB 2888 (0xFE8A7F0) approx BBs exec'd 0 ====
+
+ 0xFE8A7F0: 83740008 lwz r27,8(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xFE8A7F4: 38600000 li r3,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE8A7F8: 2C1B0000 cmpi cr0,r27,0
+ 8: GETL R27, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFE8A7FC: 418200A8 bc 12,2,0xFE8A8A4
+ 12: Js02o $0xFE8A8A4
+
+
+
+. 2888 FE8A7F0 16
+. 83 74 00 08 38 60 00 00 2C 1B 00 00 41 82 00 A8
+==== BB 2889 (0xFE8A8A4) approx BBs exec'd 0 ====
+
+ 0xFE8A8A4: 82210064 lwz r17,100(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x64, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R17
+ 4: INCEIPL $4
+
+ 0xFE8A8A8: 82410028 lwz r18,40(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x28, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R18
+ 9: INCEIPL $4
+
+ 0xFE8A8AC: 7E2803A6 mtlr r17
+ 10: GETL R17, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFE8A8B0: 8261002C lwz r19,44(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x2C, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R19
+ 17: INCEIPL $4
+
+ 0xFE8A8B4: 82210024 lwz r17,36(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x24, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R17
+ 22: INCEIPL $4
+
+ 0xFE8A8B8: 82810030 lwz r20,48(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x30, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R20
+ 27: INCEIPL $4
+
+ 0xFE8A8BC: 82A10034 lwz r21,52(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x34, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R21
+ 32: INCEIPL $4
+
+ 0xFE8A8C0: 82C10038 lwz r22,56(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x38, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R22
+ 37: INCEIPL $4
+
+ 0xFE8A8C4: 82E1003C lwz r23,60(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x3C, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R23
+ 42: INCEIPL $4
+
+ 0xFE8A8C8: 83010040 lwz r24,64(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x40, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R24
+ 47: INCEIPL $4
+
+ 0xFE8A8CC: 83210044 lwz r25,68(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x44, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R25
+ 52: INCEIPL $4
+
+ 0xFE8A8D0: 83410048 lwz r26,72(r1)
+ 53: GETL R1, t42
+ 54: ADDL $0x48, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R26
+ 57: INCEIPL $4
+
+ 0xFE8A8D4: 8361004C lwz r27,76(r1)
+ 58: GETL R1, t46
+ 59: ADDL $0x4C, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R27
+ 62: INCEIPL $4
+
+ 0xFE8A8D8: 83810050 lwz r28,80(r1)
+ 63: GETL R1, t50
+ 64: ADDL $0x50, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R28
+ 67: INCEIPL $4
+
+ 0xFE8A8DC: 83A10054 lwz r29,84(r1)
+ 68: GETL R1, t54
+ 69: ADDL $0x54, t54
+ 70: LDL (t54), t56
+ 71: PUTL t56, R29
+ 72: INCEIPL $4
+
+ 0xFE8A8E0: 83C10058 lwz r30,88(r1)
+ 73: GETL R1, t58
+ 74: ADDL $0x58, t58
+ 75: LDL (t58), t60
+ 76: PUTL t60, R30
+ 77: INCEIPL $4
+
+ 0xFE8A8E4: 83E1005C lwz r31,92(r1)
+ 78: GETL R1, t62
+ 79: ADDL $0x5C, t62
+ 80: LDL (t62), t64
+ 81: PUTL t64, R31
+ 82: INCEIPL $4
+
+ 0xFE8A8E8: 38210060 addi r1,r1,96
+ 83: GETL R1, t66
+ 84: ADDL $0x60, t66
+ 85: PUTL t66, R1
+ 86: INCEIPL $4
+
+ 0xFE8A8EC: 4E800020 blr
+ 87: GETL LR, t68
+ 88: JMPo-r t68 ($4)
+
+
+
+. 2889 FE8A8A4 76
+. 82 21 00 64 82 41 00 28 7E 28 03 A6 82 61 00 2C 82 21 00 24 82 81 00 30 82 A1 00 34 82 C1 00 38 82 E1 00 3C 83 01 00 40 83 21 00 44 83 41 00 48 83 61 00 4C 83 81 00 50 83 A1 00 54 83 C1 00 58 83 E1 00 5C 38 21 00 60 4E 80 00 20
+==== BB 2890 (0xFE8B194) approx BBs exec'd 0 ====
+
+ 0xFE8B194: 7C781B79 or. r24,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R24
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFE8B198: 40820054 bc 4,2,0xFE8B1EC
+ 5: Jc02o $0xFE8B1EC
+
+
+
+. 2890 FE8B194 8
+. 7C 78 1B 79 40 82 00 54
+==== BB 2891 (0xFE8B19C) approx BBs exec'd 0 ====
+
+ 0xFE8B19C: 813A0010 lwz r9,16(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE8B1A0: 3B800000 li r28,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFE8B1A4: 2F890000 cmpi cr7,r9,0
+ 8: GETL R9, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFE8B1A8: 419E0040 bc 12,30,0xFE8B1E8
+ 12: Js30o $0xFE8B1E8
+
+
+
+. 2891 FE8B19C 16
+. 81 3A 00 10 3B 80 00 00 2F 89 00 00 41 9E 00 40
+==== BB 2892 (0xFE8B1AC) approx BBs exec'd 0 ====
+
+ 0xFE8B1AC: 39600000 li r11,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFE8B1B0: 7FABD214 add r29,r11,r26
+ 3: GETL R11, t2
+ 4: GETL R26, t4
+ 5: ADDL t2, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFE8B1B4: 7EE4BB78 or r4,r23,r23
+ 8: GETL R23, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0xFE8B1B8: 807D0010 lwz r3,16(r29)
+ 11: GETL R29, t8
+ 12: ADDL $0x10, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0xFE8B1BC: 7EC5B378 or r5,r22,r22
+ 16: GETL R22, t12
+ 17: PUTL t12, R5
+ 18: INCEIPL $4
+
+ 0xFE8B1C0: 38DF0008 addi r6,r31,8
+ 19: GETL R31, t14
+ 20: ADDL $0x8, t14
+ 21: PUTL t14, R6
+ 22: INCEIPL $4
+
+ 0xFE8B1C4: 3B9C0001 addi r28,r28,1
+ 23: GETL R28, t16
+ 24: ADDL $0x1, t16
+ 25: PUTL t16, R28
+ 26: INCEIPL $4
+
+ 0xFE8B1C8: 4BFFF5BD bl 0xFE8A784
+ 27: MOVL $0xFE8B1CC, t18
+ 28: PUTL t18, LR
+ 29: JMPo-c $0xFE8A784 ($4)
+
+
+
+. 2892 FE8B1AC 32
+. 39 60 00 00 7F AB D2 14 7E E4 BB 78 80 7D 00 10 7E C5 B3 78 38 DF 00 08 3B 9C 00 01 4B FF F5 BD
+==== BB 2893 (0xFE8B1CC) approx BBs exec'd 0 ====
+
+ 0xFE8B1CC: 578B103A rlwinm r11,r28,2,0,29
+ 0: GETL R28, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFE8B1D0: 7C781B79 or. r24,r3,r3
+ 4: GETL R3, t2
+ 5: PUTL t2, R24
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFE8B1D4: 7D2BD214 add r9,r11,r26
+ 9: GETL R11, t6
+ 10: GETL R26, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFE8B1D8: 40820264 bc 4,2,0xFE8B43C
+ 14: Jc02o $0xFE8B43C
+
+
+
+. 2893 FE8B1CC 16
+. 57 8B 10 3A 7C 78 1B 79 7D 2B D2 14 40 82 02 64
+==== BB 2894 (0xFE8B1DC) approx BBs exec'd 0 ====
+
+ 0xFE8B1DC: 80890010 lwz r4,16(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE8B1E0: 2C840000 cmpi cr1,r4,0
+ 5: GETL R4, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFE8B1E4: 4086FFCC bc 4,6,0xFE8B1B0
+ 9: Jc06o $0xFE8B1B0
+
+
+
+. 2894 FE8B1DC 12
+. 80 89 00 10 2C 84 00 00 40 86 FF CC
+==== BB 2895 (0xFE8B1B0) approx BBs exec'd 0 ====
+
+ 0xFE8B1B0: 7FABD214 add r29,r11,r26
+ 0: GETL R11, t0
+ 1: GETL R26, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFE8B1B4: 7EE4BB78 or r4,r23,r23
+ 5: GETL R23, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFE8B1B8: 807D0010 lwz r3,16(r29)
+ 8: GETL R29, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFE8B1BC: 7EC5B378 or r5,r22,r22
+ 13: GETL R22, t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0xFE8B1C0: 38DF0008 addi r6,r31,8
+ 16: GETL R31, t12
+ 17: ADDL $0x8, t12
+ 18: PUTL t12, R6
+ 19: INCEIPL $4
+
+ 0xFE8B1C4: 3B9C0001 addi r28,r28,1
+ 20: GETL R28, t14
+ 21: ADDL $0x1, t14
+ 22: PUTL t14, R28
+ 23: INCEIPL $4
+
+ 0xFE8B1C8: 4BFFF5BD bl 0xFE8A784
+ 24: MOVL $0xFE8B1CC, t16
+ 25: PUTL t16, LR
+ 26: JMPo-c $0xFE8A784 ($4)
+
+
+
+. 2895 FE8B1B0 28
+. 7F AB D2 14 7E E4 BB 78 80 7D 00 10 7E C5 B3 78 38 DF 00 08 3B 9C 00 01 4B FF F5 BD
+==== BB 2896 (0xFE8B1E8) approx BBs exec'd 0 ====
+
+ 0xFE8B1E8: 4182FF24 bc 12,2,0xFE8B10C
+ 0: Js02o $0xFE8B10C
+
+
+
+. 2896 FE8B1E8 4
+. 41 82 FF 24
+==== BB 2897 (0xFE8B10C) approx BBs exec'd 0 ====
+
+ 0xFE8B10C: 893B0000 lbz r9,0(r27)
+ 0: GETL R27, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFE8B110: 2F09003A cmpi cr6,r9,58
+ 4: GETL R9, t4
+ 5: MOVL $0x3A, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFE8B114: 409A0010 bc 4,26,0xFE8B124
+ 9: Jc26o $0xFE8B124
+
+
+
+. 2897 FE8B10C 12
+. 89 3B 00 00 2F 09 00 3A 40 9A 00 10
+==== BB 2898 (0xFE8B12C) approx BBs exec'd 0 ====
+
+ 0xFE8B12C: 39800043 li r12,67
+ 0: MOVL $0x43, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0xFE8B130: 99790001 stb r11,1(r25)
+ 3: GETL R11, t2
+ 4: GETL R25, t4
+ 5: ADDL $0x1, t4
+ 6: STB t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFE8B134: 99990000 stb r12,0(r25)
+ 8: GETL R12, t6
+ 9: GETL R25, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFE8B138: 88790000 lbz r3,0(r25)
+ 12: GETL R25, t10
+ 13: LDB (t10), t12
+ 14: PUTL t12, R3
+ 15: INCEIPL $4
+
+ 0xFE8B13C: 3523FFBD addic. r9,r3,-67
+ 16: GETL R3, t14
+ 17: ADCL $0xFFFFFFBD, t14 (-wCa)
+ 18: PUTL t14, R9
+ 19: CMP0L t14, t16 (-rSo)
+ 20: ICRFL t16, $0x0, CR
+ 21: INCEIPL $4
+
+ 0xFE8B140: 4F421042 crnor 26,2,2
+ 22: GETL CR, t18
+ 23: XBITB t18, $0x2, t20
+ 24: XBITB t18, $0x2, t22
+ 25: NOTB t20
+ 26: NOTB t22
+ 27: ANDB t22, t20
+ 28: IBITL t20, $0x1A, t18
+ 29: PUTL t18, CR
+ 30: INCEIPL $4
+
+ 0xFE8B144: 419A000C bc 12,26,0xFE8B150
+ 31: Js26o $0xFE8B150
+
+
+
+. 2898 FE8B12C 28
+. 39 80 00 43 99 79 00 01 99 99 00 00 88 79 00 00 35 23 FF BD 4F 42 10 42 41 9A 00 0C
+==== BB 2899 (0xFE8B148) approx BBs exec'd 0 ====
+
+ 0xFE8B148: 88190001 lbz r0,1(r25)
+ 0: GETL R25, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE8B14C: 2C000000 cmpi cr0,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFE8B150: 418202F8 bc 12,2,0xFE8B448
+ 9: Js02o $0xFE8B448
+
+
+
+. 2899 FE8B148 12
+. 88 19 00 01 2C 00 00 00 41 82 02 F8
+==== BB 2900 (0xFE8B448) approx BBs exec'd 0 ====
+
+ 0xFE8B448: 800F00A8 lwz r0,168(r15)
+ 0: GETL R15, t0
+ 1: ADDL $0xA8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE8B44C: 2D800000 cmpi cr3,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x3, CR
+ 8: INCEIPL $4
+
+ 0xFE8B450: 408E002C bc 4,14,0xFE8B47C
+ 9: Jc14o $0xFE8B47C
+
+
+
+. 2900 FE8B448 12
+. 80 0F 00 A8 2D 80 00 00 40 8E 00 2C
+==== BB 2901 (0xFE8B454) approx BBs exec'd 0 ====
+
+ 0xFE8B454: 821F0010 lwz r16,16(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R16
+ 4: INCEIPL $4
+
+ 0xFE8B458: 827F0018 lwz r19,24(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x18, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R19
+ 9: INCEIPL $4
+
+ 0xFE8B45C: 92130000 stw r16,0(r19)
+ 10: GETL R16, t8
+ 11: GETL R19, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFE8B460: 41920014 bc 12,18,0xFE8B474
+ 14: Js18o $0xFE8B474
+
+
+
+. 2901 FE8B454 16
+. 82 1F 00 10 82 7F 00 18 92 13 00 00 41 92 00 14
+==== BB 2902 (0xFE8B474) approx BBs exec'd 0 ====
+
+ 0xFE8B474: 7EC3B378 or r3,r22,r22
+ 0: GETL R22, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE8B478: 4BFFFDD4 b 0xFE8B24C
+ 3: JMPo $0xFE8B24C ($4)
+
+
+
+. 2902 FE8B474 8
+. 7E C3 B3 78 4B FF FD D4
+==== BB 2903 (0xFE8B24C) approx BBs exec'd 0 ====
+
+ 0xFE8B24C: 81210000 lwz r9,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFE8B250: 81E90004 lwz r15,4(r9)
+ 4: GETL R9, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R15
+ 8: INCEIPL $4
+
+ 0xFE8B254: 8189FFB4 lwz r12,-76(r9)
+ 9: GETL R9, t8
+ 10: ADDL $0xFFFFFFB4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0xFE8B258: 7DE803A6 mtlr r15
+ 14: GETL R15, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0xFE8B25C: 81C9FFB8 lwz r14,-72(r9)
+ 17: GETL R9, t14
+ 18: ADDL $0xFFFFFFB8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R14
+ 21: INCEIPL $4
+
+ 0xFE8B260: 81E9FFBC lwz r15,-68(r9)
+ 22: GETL R9, t18
+ 23: ADDL $0xFFFFFFBC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R15
+ 26: INCEIPL $4
+
+ 0xFE8B264: 7D818120 mtcrf 0x18,r12
+ 27: GETL R12, t22
+ 28: ICRFL t22, $0x3, CR
+ 29: ICRFL t22, $0x4, CR
+ 30: INCEIPL $4
+
+ 0xFE8B268: 8209FFC0 lwz r16,-64(r9)
+ 31: GETL R9, t24
+ 32: ADDL $0xFFFFFFC0, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R16
+ 35: INCEIPL $4
+
+ 0xFE8B26C: 8229FFC4 lwz r17,-60(r9)
+ 36: GETL R9, t28
+ 37: ADDL $0xFFFFFFC4, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R17
+ 40: INCEIPL $4
+
+ 0xFE8B270: 8249FFC8 lwz r18,-56(r9)
+ 41: GETL R9, t32
+ 42: ADDL $0xFFFFFFC8, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R18
+ 45: INCEIPL $4
+
+ 0xFE8B274: 8269FFCC lwz r19,-52(r9)
+ 46: GETL R9, t36
+ 47: ADDL $0xFFFFFFCC, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R19
+ 50: INCEIPL $4
+
+ 0xFE8B278: 8289FFD0 lwz r20,-48(r9)
+ 51: GETL R9, t40
+ 52: ADDL $0xFFFFFFD0, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R20
+ 55: INCEIPL $4
+
+ 0xFE8B27C: 82A9FFD4 lwz r21,-44(r9)
+ 56: GETL R9, t44
+ 57: ADDL $0xFFFFFFD4, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R21
+ 60: INCEIPL $4
+
+ 0xFE8B280: 82C9FFD8 lwz r22,-40(r9)
+ 61: GETL R9, t48
+ 62: ADDL $0xFFFFFFD8, t48
+ 63: LDL (t48), t50
+ 64: PUTL t50, R22
+ 65: INCEIPL $4
+
+ 0xFE8B284: 82E9FFDC lwz r23,-36(r9)
+ 66: GETL R9, t52
+ 67: ADDL $0xFFFFFFDC, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R23
+ 70: INCEIPL $4
+
+ 0xFE8B288: 8309FFE0 lwz r24,-32(r9)
+ 71: GETL R9, t56
+ 72: ADDL $0xFFFFFFE0, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R24
+ 75: INCEIPL $4
+
+ 0xFE8B28C: 8329FFE4 lwz r25,-28(r9)
+ 76: GETL R9, t60
+ 77: ADDL $0xFFFFFFE4, t60
+ 78: LDL (t60), t62
+ 79: PUTL t62, R25
+ 80: INCEIPL $4
+
+ 0xFE8B290: 8349FFE8 lwz r26,-24(r9)
+ 81: GETL R9, t64
+ 82: ADDL $0xFFFFFFE8, t64
+ 83: LDL (t64), t66
+ 84: PUTL t66, R26
+ 85: INCEIPL $4
+
+ 0xFE8B294: 8369FFEC lwz r27,-20(r9)
+ 86: GETL R9, t68
+ 87: ADDL $0xFFFFFFEC, t68
+ 88: LDL (t68), t70
+ 89: PUTL t70, R27
+ 90: INCEIPL $4
+
+ 0xFE8B298: 8389FFF0 lwz r28,-16(r9)
+ 91: GETL R9, t72
+ 92: ADDL $0xFFFFFFF0, t72
+ 93: LDL (t72), t74
+ 94: PUTL t74, R28
+ 95: INCEIPL $4
+
+ 0xFE8B29C: 83A9FFF4 lwz r29,-12(r9)
+ 96: GETL R9, t76
+ 97: ADDL $0xFFFFFFF4, t76
+ 98: LDL (t76), t78
+ 99: PUTL t78, R29
+ 100: INCEIPL $4
+
+ 0xFE8B2A0: 83C9FFF8 lwz r30,-8(r9)
+ 101: GETL R9, t80
+ 102: ADDL $0xFFFFFFF8, t80
+ 103: LDL (t80), t82
+ 104: PUTL t82, R30
+ 105: INCEIPL $4
+
+ 0xFE8B2A4: 83E9FFFC lwz r31,-4(r9)
+ 106: GETL R9, t84
+ 107: ADDL $0xFFFFFFFC, t84
+ 108: LDL (t84), t86
+ 109: PUTL t86, R31
+ 110: INCEIPL $4
+
+ 0xFE8B2A8: 7D214B78 or r1,r9,r9
+ 111: GETL R9, t88
+ 112: PUTL t88, R1
+ 113: INCEIPL $4
+
+ 0xFE8B2AC: 4E800020 blr
+ 114: GETL LR, t90
+ 115: JMPo-r t90 ($4)
+
+
+
+. 2903 FE8B24C 100
+. 81 21 00 00 81 E9 00 04 81 89 FF B4 7D E8 03 A6 81 C9 FF B8 81 E9 FF BC 7D 81 81 20 82 09 FF C0 82 29 FF C4 82 49 FF C8 82 69 FF CC 82 89 FF D0 82 A9 FF D4 82 C9 FF D8 82 E9 FF DC 83 09 FF E0 83 29 FF E4 83 49 FF E8 83 69 FF EC 83 89 FF F0 83 A9 FF F4 83 C9 FF F8 83 E9 FF FC 7D 21 4B 78 4E 80 00 20
+==== BB 2904 (0xFE8A4A0) approx BBs exec'd 0 ====
+
+ 0xFE8A4A0: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFE8A4A4: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFE8A4A8: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFE8A4AC: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 2904 FE8A4A0 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 2905 (0x10001C98) approx BBs exec'd 0 ====
+
+ 0x10001C98: 38610090 addi r3,r1,144
+ 0: GETL R1, t0
+ 1: ADDL $0x90, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x10001C9C: 48003541 bl 0x100051DC
+ 4: MOVL $0x10001CA0, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0x100051DC ($4)
+
+
+
+. 2905 10001C98 8
+. 38 61 00 90 48 00 35 41
+==== BB 2906 (0x100051DC) approx BBs exec'd 0 ====
+
+ 0x100051DC: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x100051E0: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x100051E4: 7C641B78 or r4,r3,r3
+ 9: GETL R3, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0x100051E8: 93E10018 stw r31,24(r1)
+ 12: GETL R31, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x100051EC: 7C7F1B78 or r31,r3,r3
+ 17: GETL R3, t12
+ 18: PUTL t12, R31
+ 19: INCEIPL $4
+
+ 0x100051F0: 38600000 li r3,0
+ 20: MOVL $0x0, t14
+ 21: PUTL t14, R3
+ 22: INCEIPL $4
+
+ 0x100051F4: 90010024 stw r0,36(r1)
+ 23: GETL R0, t16
+ 24: GETL R1, t18
+ 25: ADDL $0x24, t18
+ 26: STL t16, (t18)
+ 27: INCEIPL $4
+
+ 0x100051F8: 48015ADD bl 0x1001ACD4
+ 28: MOVL $0x100051FC, t20
+ 29: PUTL t20, LR
+ 30: JMPo-c $0x1001ACD4 ($4)
+
+
+
+. 2906 100051DC 32
+. 7C 08 02 A6 94 21 FF E0 7C 64 1B 78 93 E1 00 18 7C 7F 1B 78 38 60 00 00 90 01 00 24 48 01 5A DD
+==== BB 2907 (0x1001ACD4) approx BBs exec'd 0 ====
+
+ 0x1001ACD4: 396000D0 li r11,208
+ 0: MOVL $0xD0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001ACD8: 4BFFFE34 b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 2907 1001ACD4 8
+. 39 60 00 D0 4B FF FE 34
+==== BB 2908 clock_gettime(0xEE84410) approx BBs exec'd 0 ====
+
+ 0xEE84410: 2B830001 cmpli cr7,r3,1
+ 0: GETL R3, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xEE84414: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xEE84418: 9421FFD0 stwu r1,-48(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFFD0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xEE8441C: 48013C29 bl 0xEE98044
+ 14: MOVL $0xEE84420, t12
+ 15: PUTL t12, LR
+ 16: JMPo-c $0xEE98044 ($4)
+
+
+
+. 2908 EE84410 16
+. 2B 83 00 01 7C 08 02 A6 94 21 FF D0 48 01 3C 29
+==== BB 2909 (0xEE84420) approx BBs exec'd 0 ====
+
+ 0xEE84420: 93410018 stw r26,24(r1)
+ 0: GETL R26, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xEE84424: 7C9A2378 or r26,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0xEE84428: 93810020 stw r28,32(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x20, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xEE8442C: 3B80FFFF li r28,-1
+ 13: MOVL $0xFFFFFFFF, t10
+ 14: PUTL t10, R28
+ 15: INCEIPL $4
+
+ 0xEE84430: 93C10028 stw r30,40(r1)
+ 16: GETL R30, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x28, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xEE84434: 7FC802A6 mflr r30
+ 21: GETL LR, t16
+ 22: PUTL t16, R30
+ 23: INCEIPL $4
+
+ 0xEE84438: 93E1002C stw r31,44(r1)
+ 24: GETL R31, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x2C, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xEE8443C: 7C7F1B78 or r31,r3,r3
+ 29: GETL R3, t22
+ 30: PUTL t22, R31
+ 31: INCEIPL $4
+
+ 0xEE84440: 9361001C stw r27,28(r1)
+ 32: GETL R27, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x1C, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xEE84444: 93A10024 stw r29,36(r1)
+ 37: GETL R29, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x24, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xEE84448: 90010034 stw r0,52(r1)
+ 42: GETL R0, t32
+ 43: GETL R1, t34
+ 44: ADDL $0x34, t34
+ 45: STL t32, (t34)
+ 46: INCEIPL $4
+
+ 0xEE8444C: 419D005C bc 12,29,0xEE844A8
+ 47: Js29o $0xEE844A8
+
+
+
+. 2909 EE84420 48
+. 93 41 00 18 7C 9A 23 78 93 81 00 20 3B 80 FF FF 93 C1 00 28 7F C8 02 A6 93 E1 00 2C 7C 7F 1B 78 93 61 00 1C 93 A1 00 24 90 01 00 34 41 9D 00 5C
+==== BB 2910 (0xEE84450) approx BBs exec'd 0 ====
+
+ 0xEE84450: 837E00DC lwz r27,220(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xDC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xEE84454: 3BA00016 li r29,22
+ 5: MOVL $0x16, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xEE84458: 80BB0000 lwz r5,0(r27)
+ 8: GETL R27, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0xEE8445C: 2C050000 cmpi cr0,r5,0
+ 12: GETL R5, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xEE84460: 40820098 bc 4,2,0xEE844F8
+ 16: Jc02o $0xEE844F8
+
+
+
+. 2910 EE84450 20
+. 83 7E 00 DC 3B A0 00 16 80 BB 00 00 2C 05 00 00 40 82 00 98
+==== BB 2911 (0xEE84464) approx BBs exec'd 0 ====
+
+ 0xEE84464: 380000F6 li r0,246
+ 0: MOVL $0xF6, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xEE84468: 44000002 sc
+ 3: JMPo-sys $0xEE8446C ($4)
+
+
+
+. 2911 EE84464 8
+. 38 00 00 F6 44 00 00 02
+==== BB 2912 (0xEE8446C) approx BBs exec'd 0 ====
+
+ 0xEE8446C: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xEE84470: 74091000 andis. r9,r0,0x1000
+ 3: GETL R0, t2
+ 4: ANDL $0x10000000, t2
+ 5: PUTL t2, R9
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xEE84474: 4082006C bc 4,2,0xEE844E0
+ 9: Jc02o $0xEE844E0
+
+
+
+. 2912 EE8446C 12
+. 7C 00 00 26 74 09 10 00 40 82 00 6C
+==== BB 2913 (0xEE84478) approx BBs exec'd 0 ====
+
+ 0xEE84478: 81610034 lwz r11,52(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xEE8447C: 3B800000 li r28,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xEE84480: 7F83E378 or r3,r28,r28
+ 8: GETL R28, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xEE84484: 83410018 lwz r26,24(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x18, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R26
+ 15: INCEIPL $4
+
+ 0xEE84488: 8361001C lwz r27,28(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x1C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R27
+ 20: INCEIPL $4
+
+ 0xEE8448C: 7D6803A6 mtlr r11
+ 21: GETL R11, t16
+ 22: PUTL t16, LR
+ 23: INCEIPL $4
+
+ 0xEE84490: 83810020 lwz r28,32(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x20, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R28
+ 28: INCEIPL $4
+
+ 0xEE84494: 83A10024 lwz r29,36(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x24, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R29
+ 33: INCEIPL $4
+
+ 0xEE84498: 83C10028 lwz r30,40(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x28, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R30
+ 38: INCEIPL $4
+
+ 0xEE8449C: 83E1002C lwz r31,44(r1)
+ 39: GETL R1, t30
+ 40: ADDL $0x2C, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R31
+ 43: INCEIPL $4
+
+ 0xEE844A0: 38210030 addi r1,r1,48
+ 44: GETL R1, t34
+ 45: ADDL $0x30, t34
+ 46: PUTL t34, R1
+ 47: INCEIPL $4
+
+ 0xEE844A4: 4E800020 blr
+ 48: GETL LR, t36
+ 49: JMPo-r t36 ($4)
+
+
+
+. 2913 EE84478 48
+. 81 61 00 34 3B 80 00 00 7F 83 E3 78 83 41 00 18 83 61 00 1C 7D 68 03 A6 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 2914 (0x100051FC) approx BBs exec'd 0 ====
+
+ 0x100051FC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10005200: 38800000 li r4,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0x10005204: 38610008 addi r3,r1,8
+ 7: GETL R1, t6
+ 8: ADDL $0x8, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x10005208: 39600000 li r11,0
+ 11: MOVL $0x0, t8
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0x1000520C: 409E001C bc 4,30,0x10005228
+ 14: Jc30o $0x10005228
+
+
+
+. 2914 100051FC 20
+. 2F 83 00 00 38 80 00 00 38 61 00 08 39 60 00 00 40 9E 00 1C
+==== BB 2915 (0x10005210) approx BBs exec'd 0 ====
+
+ 0x10005210: 80010024 lwz r0,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10005214: 7D635B78 or r3,r11,r11
+ 5: GETL R11, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x10005218: 83E10018 lwz r31,24(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x18, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R31
+ 12: INCEIPL $4
+
+ 0x1000521C: 38210020 addi r1,r1,32
+ 13: GETL R1, t10
+ 14: ADDL $0x20, t10
+ 15: PUTL t10, R1
+ 16: INCEIPL $4
+
+ 0x10005220: 7C0803A6 mtlr r0
+ 17: GETL R0, t12
+ 18: PUTL t12, LR
+ 19: INCEIPL $4
+
+ 0x10005224: 4E800020 blr
+ 20: GETL LR, t14
+ 21: JMPo-r t14 ($4)
+
+
+
+. 2915 10005210 24
+. 80 01 00 24 7D 63 5B 78 83 E1 00 18 38 21 00 20 7C 08 03 A6 4E 80 00 20
+==== BB 2916 (0x10001CA0) approx BBs exec'd 0 ====
+
+ 0x10001CA0: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10001CA4: 409E001C bc 4,30,0x10001CC0
+ 4: Jc30o $0x10001CC0
+
+
+
+. 2916 10001CA0 8
+. 2F 83 00 00 40 9E 00 1C
+==== BB 2917 (0x10001CA8) approx BBs exec'd 0 ====
+
+ 0x10001CA8: 40920044 bc 4,18,0x10001CEC
+ 0: Jc18o $0x10001CEC
+
+
+
+. 2917 10001CA8 4
+. 40 92 00 44
+==== BB 2918 (0x10001CEC) approx BBs exec'd 0 ====
+
+ 0x10001CEC: 3BE00000 li r31,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0x10001CF0: 4BFFFEFC b 0x10001BEC
+ 3: JMPo $0x10001BEC ($4)
+
+
+
+. 2918 10001CEC 8
+. 3B E0 00 00 4B FF FE FC
+==== BB 2919 (0x10001BEC) approx BBs exec'd 0 ====
+
+ 0x10001BEC: 408E0028 bc 4,14,0x10001C14
+ 0: Jc14o $0x10001C14
+
+
+
+. 2919 10001BEC 4
+. 40 8E 00 28
+==== BB 2920 (0x10001BF0) approx BBs exec'd 0 ====
+
+ 0x10001BF0: C8010090 lfd f0,144(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x90, t0
+ 2: FPU_RQ (t0), 0x0:0x0
+ 3: INCEIPL $4
+
+ 0x10001BF4: 7FE3FB78 or r3,r31,r31
+ 4: GETL R31, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0x10001BF8: 38810080 addi r4,r1,128
+ 7: GETL R1, t4
+ 8: ADDL $0x80, t4
+ 9: PUTL t4, R4
+ 10: INCEIPL $4
+
+ 0x10001BFC: D8010080 stfd f0,128(r1)
+ 11: GETL R1, t6
+ 12: ADDL $0x80, t6
+ 13: FPU_WQ 0x0:0x0, (t6)
+ 14: INCEIPL $4
+
+ 0x10001C00: 4BFFF751 bl 0x10001350
+ 15: MOVL $0x10001C04, t8
+ 16: PUTL t8, LR
+ 17: JMPo-c $0x10001350 ($4)
+
+
+
+. 2920 10001BF0 20
+. C8 01 00 90 7F E3 FB 78 38 81 00 80 D8 01 00 80 4B FF F7 51
+==== BB 2921 (0x10001350) approx BBs exec'd 0 ====
+
+ 0x10001350: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x10001354: 9421FFA0 stwu r1,-96(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFA0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x10001358: 9361004C stw r27,76(r1)
+ 9: GETL R27, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x4C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x1000135C: 7C7B1B79 or. r27,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R27
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x10001360: 93A10054 stw r29,84(r1)
+ 19: GETL R29, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x54, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x10001364: 48019549 bl 0x1001A8AC
+ 24: MOVL $0x10001368, t18
+ 25: PUTL t18, LR
+ 26: JMPo-c $0x1001A8AC ($4)
+
+
+
+. 2921 10001350 24
+. 7C 08 02 A6 94 21 FF A0 93 61 00 4C 7C 7B 1B 79 93 A1 00 54 48 01 95 49
+==== BB 2922 (0x10001368) approx BBs exec'd 0 ====
+
+ 0x10001368: 90010064 stw r0,100(r1)
+ 0: GETL R0, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x64, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x1000136C: 3BA00000 li r29,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x10001370: C8040000 lfd f0,0(r4)
+ 8: GETL R4, t6
+ 9: FPU_RQ (t6), 0x0:0x0
+ 10: INCEIPL $4
+
+ 0x10001374: 93C10058 stw r30,88(r1)
+ 11: GETL R30, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x58, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x10001378: 7FC802A6 mflr r30
+ 16: GETL LR, t12
+ 17: PUTL t12, R30
+ 18: INCEIPL $4
+
+ 0x1000137C: 93010040 stw r24,64(r1)
+ 19: GETL R24, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x40, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x10001380: 93210044 stw r25,68(r1)
+ 24: GETL R25, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x44, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x10001384: 93410048 stw r26,72(r1)
+ 29: GETL R26, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x48, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0x10001388: 93810050 stw r28,80(r1)
+ 34: GETL R28, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x50, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x1000138C: 93E1005C stw r31,92(r1)
+ 39: GETL R31, t30
+ 40: GETL R1, t32
+ 41: ADDL $0x5C, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0x10001390: D8010030 stfd f0,48(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x30, t34
+ 46: FPU_WQ 0x0:0x0, (t34)
+ 47: INCEIPL $4
+
+ 0x10001394: 93A10038 stw r29,56(r1)
+ 48: GETL R29, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x38, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x10001398: 41820118 bc 12,2,0x100014B0
+ 53: Js02o $0x100014B0
+
+
+
+. 2922 10001368 52
+. 90 01 00 64 3B A0 00 00 C8 04 00 00 93 C1 00 58 7F C8 02 A6 93 01 00 40 93 21 00 44 93 41 00 48 93 81 00 50 93 E1 00 5C D8 01 00 30 93 A1 00 38 41 82 01 18
+==== BB 2923 (0x100014B0) approx BBs exec'd 0 ====
+
+ 0x100014B0: 83FE000C lwz r31,12(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x100014B4: 837E0078 lwz r27,120(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x78, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R27
+ 9: INCEIPL $4
+
+ 0x100014B8: 801F0000 lwz r0,0(r31)
+ 10: GETL R31, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R0
+ 13: INCEIPL $4
+
+ 0x100014BC: 2F800000 cmpi cr7,r0,0
+ 14: GETL R0, t12
+ 15: CMP0L t12, t14 (-rSo)
+ 16: ICRFL t14, $0x7, CR
+ 17: INCEIPL $4
+
+ 0x100014C0: 40BEFEE8 bc 5,30,0x100013A8
+ 18: Jc30o $0x100013A8
+
+
+
+. 2923 100014B0 20
+. 83 FE 00 0C 83 7E 00 78 80 1F 00 00 2F 80 00 00 40 BE FE E8
+==== BB 2924 (0x100014C4) approx BBs exec'd 0 ====
+
+ 0x100014C4: 813E0018 lwz r9,24(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x100014C8: 81290000 lwz r9,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0x100014CC: 2F890000 cmpi cr7,r9,0
+ 9: GETL R9, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x100014D0: 419E0068 bc 12,30,0x10001538
+ 13: Js30o $0x10001538
+
+
+
+. 2924 100014C4 16
+. 81 3E 00 18 81 29 00 00 2F 89 00 00 41 9E 00 68
+==== BB 2925 (0x10001538) approx BBs exec'd 0 ====
+
+ 0x10001538: 3C600002 lis r3,2
+ 0: MOVL $0x20000, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x1000153C: 6063006C ori r3,r3,0x6C
+ 3: MOVL $0x2006C, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0x10001540: 480195F5 bl 0x1001AB34
+ 6: MOVL $0x10001544, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x1001AB34 ($4)
+
+
+
+. 2925 10001538 12
+. 3C 60 00 02 60 63 00 6C 48 01 95 F5
+==== BB 2926 (0x1001AB34) approx BBs exec'd 0 ====
+
+ 0x1001AB34: 39600000 li r11,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AB38: 4BFFFFD4 b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 2926 1001AB34 8
+. 39 60 00 00 4B FF FF D4
+==== BB 2927 nl_langinfo(0xFE88704) approx BBs exec'd 0 ====
+
+ 0xFE88704: 7C688670 srawi r8,r3,16
+ 0: GETL R3, t0
+ 1: SARL $0x10, t0 (-wCa)
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0xFE88708: 7D8802A6 mflr r12
+ 4: GETL LR, t2
+ 5: PUTL t2, R12
+ 6: INCEIPL $4
+
+ 0xFE8870C: 69090006 xori r9,r8,0x6
+ 7: GETL R8, t4
+ 8: XORL $0x6, t4
+ 9: PUTL t4, R9
+ 10: INCEIPL $4
+
+ 0xFE88710: 20090000 subfic r0,r9,0
+ 11: GETL R9, t6
+ 12: MOVL $0x0, t8
+ 13: SBBL t6, t8 (-wCa)
+ 14: PUTL t8, R0
+ 15: INCEIPL $4
+
+ 0xFE88714: 7D204914 adde r9,r0,r9
+ 16: GETL R0, t10
+ 17: GETL R9, t12
+ 18: ADCL t10, t12 (-rCa-wCa)
+ 19: PUTL t12, R9
+ 20: INCEIPL $4
+
+ 0xFE88718: 55000FFE rlwinm r0,r8,1,31,31
+ 21: GETL R8, t14
+ 22: SHRL $0x1F, t14
+ 23: PUTL t14, R0
+ 24: INCEIPL $4
+
+ 0xFE8871C: 4811F735 bl 0xFFA7E50
+ 25: MOVL $0xFE88720, t16
+ 26: PUTL t16, LR
+ 27: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2927 FE88704 28
+. 7C 68 86 70 7D 88 02 A6 69 09 00 06 20 09 00 00 7D 20 49 14 55 00 0F FE 48 11 F7 35
+==== BB 2928 (0xFE88720) approx BBs exec'd 0 ====
+
+ 0xFE88720: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE88724: 7C0B4B79 or. r11,r0,r9
+ 6: GETL R0, t4
+ 7: GETL R9, t6
+ 8: ORL t6, t4
+ 9: PUTL t4, R11
+ 10: CMP0L t4, t8 (-rSo)
+ 11: ICRFL t8, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFE88728: 93C10008 stw r30,8(r1)
+ 13: GETL R30, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x8, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE8872C: 7FC802A6 mflr r30
+ 18: GETL LR, t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0xFE88730: 2F88000C cmpi cr7,r8,12
+ 21: GETL R8, t16
+ 22: MOVL $0xC, t20
+ 23: CMPL t16, t20, t18 (-rSo)
+ 24: ICRFL t18, $0x7, CR
+ 25: INCEIPL $4
+
+ 0xFE88734: 5463043E rlwinm r3,r3,0,16,31
+ 26: GETL R3, t22
+ 27: ANDL $0xFFFF, t22
+ 28: PUTL t22, R3
+ 29: INCEIPL $4
+
+ 0xFE88738: 7D8803A6 mtlr r12
+ 30: GETL R12, t24
+ 31: PUTL t24, LR
+ 32: INCEIPL $4
+
+ 0xFE8873C: 80FE0140 lwz r7,320(r30)
+ 33: GETL R30, t26
+ 34: ADDL $0x140, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R7
+ 37: INCEIPL $4
+
+ 0xFE88740: 40820014 bc 4,2,0xFE88754
+ 38: Jc02o $0xFE88754
+
+
+
+. 2928 FE88720 36
+. 94 21 FF F0 7C 0B 4B 79 93 C1 00 08 7F C8 02 A6 2F 88 00 0C 54 63 04 3E 7D 88 03 A6 80 FE 01 40 40 82 00 14
+==== BB 2929 (0xFE88744) approx BBs exec'd 0 ====
+
+ 0xFE88744: 809E1D50 lwz r4,7504(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1D50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE88748: 5500103A rlwinm r0,r8,2,0,29
+ 5: GETL R8, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE8874C: 7D641214 add r11,r4,r2
+ 9: GETL R4, t6
+ 10: GETL R2, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0xFE88750: 409D0014 bc 4,29,0xFE88764
+ 14: Jc29o $0xFE88764
+
+
+
+. 2929 FE88744 16
+. 80 9E 1D 50 55 00 10 3A 7D 64 12 14 40 9D 00 14
+==== BB 2930 (0xFE88764) approx BBs exec'd 0 ====
+
+ 0xFE88764: 816B0000 lwz r11,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFE88768: 546A103A rlwinm r10,r3,2,0,29
+ 4: GETL R3, t4
+ 5: SHLL $0x2, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0xFE8876C: 80FE0140 lwz r7,320(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x140, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0xFE88770: 7CCB002E lwzx r6,r11,r0
+ 13: GETL R0, t10
+ 14: GETL R11, t12
+ 15: ADDL t12, t10
+ 16: LDL (t10), t14
+ 17: PUTL t14, R6
+ 18: INCEIPL $4
+
+ 0xFE88774: 80A60020 lwz r5,32(r6)
+ 19: GETL R6, t16
+ 20: ADDL $0x20, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R5
+ 23: INCEIPL $4
+
+ 0xFE88778: 7D2A3214 add r9,r10,r6
+ 24: GETL R10, t20
+ 25: GETL R6, t22
+ 26: ADDL t20, t22
+ 27: PUTL t22, R9
+ 28: INCEIPL $4
+
+ 0xFE8877C: 7F851840 cmpl cr7,r5,r3
+ 29: GETL R5, t24
+ 30: GETL R3, t26
+ 31: CMPUL t24, t26, t28 (-rSo)
+ 32: ICRFL t28, $0x7, CR
+ 33: INCEIPL $4
+
+ 0xFE88780: 40BDFFD4 bc 5,29,0xFE88754
+ 34: Jc29o $0xFE88754
+
+
+
+. 2930 FE88764 32
+. 81 6B 00 00 54 6A 10 3A 80 FE 01 40 7C CB 00 2E 80 A6 00 20 7D 2A 32 14 7F 85 18 40 40 BD FF D4
+==== BB 2931 (0xFE88784) approx BBs exec'd 0 ====
+
+ 0xFE88784: 80E90024 lwz r7,36(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFE88788: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFE8878C: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xFE88790: 7CE33B78 or r3,r7,r7
+ 14: GETL R7, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0xFE88794: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 2931 FE88784 20
+. 80 E9 00 24 83 C1 00 08 38 21 00 10 7C E3 3B 78 4E 80 00 20
+==== BB 2932 (0x10001544) approx BBs exec'd 0 ====
+
+ 0x10001544: 88030000 lbz r0,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x10001548: 7C7B1B78 or r27,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R27
+ 6: INCEIPL $4
+
+ 0x1000154C: 2F800000 cmpi cr7,r0,0
+ 7: GETL R0, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x10001550: 409EFE58 bc 4,30,0x100013A8
+ 11: Jc30o $0x100013A8
+
+
+
+. 2932 10001544 16
+. 88 03 00 00 7C 7B 1B 78 2F 80 00 00 40 9E FE 58
+==== BB 2933 (0x100013A8) approx BBs exec'd 0 ====
+
+ 0x100013A8: 38610030 addi r3,r1,48
+ 0: GETL R1, t0
+ 1: ADDL $0x30, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x100013AC: 480197B9 bl 0x1001AB64
+ 4: MOVL $0x100013B0, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0x1001AB64 ($4)
+
+
+
+. 2933 100013A8 8
+. 38 61 00 30 48 01 97 B9
+==== BB 2934 (0x1001AB64) approx BBs exec'd 0 ====
+
+ 0x1001AB64: 39600018 li r11,24
+ 0: MOVL $0x18, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AB68: 4BFFFFA4 b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 2934 1001AB64 8
+. 39 60 00 18 4B FF FF A4
+==== BB 2935 localtime(0xFEE5FB8) approx BBs exec'd 0 ====
+
+ 0xFEE5FB8: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEE5FBC: 7C8802A6 mflr r4
+ 6: GETL LR, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFEE5FC0: 480C1E91 bl 0xFFA7E50
+ 9: MOVL $0xFEE5FC4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2935 FEE5FB8 12
+. 94 21 FF F0 7C 88 02 A6 48 0C 1E 91
+==== BB 2936 (0xFEE5FC4) approx BBs exec'd 0 ====
+
+ 0xFEE5FC4: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEE5FC8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEE5FCC: 90810014 stw r4,20(r1)
+ 8: GETL R4, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEE5FD0: 38800001 li r4,1
+ 13: MOVL $0x1, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0xFEE5FD4: 80BE1CC0 lwz r5,7360(r30)
+ 16: GETL R30, t12
+ 17: ADDL $0x1CC0, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R5
+ 20: INCEIPL $4
+
+ 0xFEE5FD8: 48001BA9 bl 0xFEE7B80
+ 21: MOVL $0xFEE5FDC, t16
+ 22: PUTL t16, LR
+ 23: JMPo-c $0xFEE7B80 ($4)
+
+
+
+. 2936 FEE5FC4 24
+. 93 C1 00 08 7F C8 02 A6 90 81 00 14 38 80 00 01 80 BE 1C C0 48 00 1B A9
+==== BB 2937 __tz_convert(0xFEE7B80) approx BBs exec'd 0 ====
+
+ 0xFEE7B80: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEE7B84: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFEE7B88: 9361001C stw r27,28(r1)
+ 9: GETL R27, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEE7B8C: 7C7B1B79 or. r27,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R27
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFEE7B90: 480C02C1 bl 0xFFA7E50
+ 19: MOVL $0xFEE7B94, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2937 FEE7B80 20
+. 94 21 FF D0 7C 08 02 A6 93 61 00 1C 7C 7B 1B 79 48 0C 02 C1
+==== BB 2938 (0xFEE7B94) approx BBs exec'd 0 ====
+
+ 0xFEE7B94: 93810020 stw r28,32(r1)
+ 0: GETL R28, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x20, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEE7B98: 93C10028 stw r30,40(r1)
+ 5: GETL R30, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x28, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFEE7B9C: 7C9C2378 or r28,r4,r4
+ 10: GETL R4, t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0xFEE7BA0: 93E1002C stw r31,44(r1)
+ 13: GETL R31, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x2C, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEE7BA4: 7FC802A6 mflr r30
+ 18: GETL LR, t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0xFEE7BA8: 93410018 stw r26,24(r1)
+ 21: GETL R26, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x18, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEE7BAC: 7CBF2B78 or r31,r5,r5
+ 26: GETL R5, t20
+ 27: PUTL t20, R31
+ 28: INCEIPL $4
+
+ 0xFEE7BB0: 93A10024 stw r29,36(r1)
+ 29: GETL R29, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x24, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFEE7BB4: 90010034 stw r0,52(r1)
+ 34: GETL R0, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x34, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFEE7BB8: 418201FC bc 12,2,0xFEE7DB4
+ 39: Js02o $0xFEE7DB4
+
+
+
+. 2938 FEE7B94 40
+. 93 81 00 20 93 C1 00 28 7C 9C 23 78 93 E1 00 2C 7F C8 02 A6 93 41 00 18 7C BF 2B 78 93 A1 00 24 90 01 00 34 41 82 01 FC
+==== BB 2939 (0xFEE7BBC) approx BBs exec'd 0 ====
+
+ 0xFEE7BBC: 83BE08A0 lwz r29,2208(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8A0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFEE7BC0: 39600000 li r11,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0xFEE7BC4: 38600001 li r3,1
+ 8: MOVL $0x1, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFEE7BC8: 7D20E828 lwarx r9,r0,r29
+ 11: GETL R29, t8
+ 12: LOCKo
+ 13: LDL (t8), t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0xFEE7BCC: 7C095800 cmp cr0,r9,r11
+ 16: GETL R9, t12
+ 17: GETL R11, t14
+ 18: CMPL t12, t14, t16 (-rSo)
+ 19: ICRFL t16, $0x0, CR
+ 20: INCEIPL $4
+
+ 0xFEE7BD0: 4082000C bc 4,2,0xFEE7BDC
+ 21: Jc02o $0xFEE7BDC
+
+
+
+. 2939 FEE7BBC 24
+. 83 BE 08 A0 39 60 00 00 38 60 00 01 7D 20 E8 28 7C 09 58 00 40 82 00 0C
+==== BB 2940 (0xFEE7BD4) approx BBs exec'd 0 ====
+
+ 0xFEE7BD4: 7C60E92D stwcx. r3,r0,r29
+ 0: GETL R29, t0
+ 1: GETL R3, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEE7BD8: 40A2FFF0 bc 5,2,0xFEE7BC8
+ 6: Jc02o $0xFEE7BC8
+
+
+
+. 2940 FEE7BD4 8
+. 7C 60 E9 2D 40 A2 FF F0
+==== BB 2941 (0xFEE7BC8) approx BBs exec'd 0 ====
+
+ 0xFEE7BC8: 7D20E828 lwarx r9,r0,r29
+ 0: GETL R29, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEE7BCC: 7C095800 cmp cr0,r9,r11
+ 5: GETL R9, t4
+ 6: GETL R11, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEE7BD0: 4082000C bc 4,2,0xFEE7BDC
+ 10: Jc02o $0xFEE7BDC
+
+
+
+. 2941 FEE7BC8 12
+. 7D 20 E8 28 7C 09 58 00 40 82 00 0C
+==== BB 2942 (0xFEE7BDC) approx BBs exec'd 0 ====
+
+ 0xFEE7BDC: 4C00012C 0: INCEIPL $4
+
+ 0xFEE7BE0: 2F890000 cmpi cr7,r9,0
+ 1: GETL R9, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFEE7BE4: 409E01C4 bc 4,30,0xFEE7DA8
+ 5: Jc30o $0xFEE7DA8
+
+
+
+. 2942 FEE7BDC 12
+. 4C 00 01 2C 2F 89 00 00 40 9E 01 C4
+==== BB 2943 (0xFEE7BE8) approx BBs exec'd 0 ====
+
+ 0xFEE7BE8: 80DE1CC0 lwz r6,7360(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1CC0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFEE7BEC: 38800000 li r4,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFEE7BF0: 835E1DC0 lwz r26,7616(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x1DC0, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0xFEE7BF4: 7FE33278 xor r3,r31,r6
+ 13: GETL R31, t10
+ 14: GETL R6, t12
+ 15: XORL t10, t12
+ 16: PUTL t12, R3
+ 17: INCEIPL $4
+
+ 0xFEE7BF8: 20030000 subfic r0,r3,0
+ 18: GETL R3, t14
+ 19: MOVL $0x0, t16
+ 20: SBBL t14, t16 (-wCa)
+ 21: PUTL t16, R0
+ 22: INCEIPL $4
+
+ 0xFEE7BFC: 7C601914 adde r3,r0,r3
+ 23: GETL R0, t18
+ 24: GETL R3, t20
+ 25: ADCL t18, t20 (-rCa-wCa)
+ 26: PUTL t20, R3
+ 27: INCEIPL $4
+
+ 0xFEE7C00: 4BFFF1D9 bl 0xFEE6DD8
+ 28: MOVL $0xFEE7C04, t22
+ 29: PUTL t22, LR
+ 30: JMPo-c $0xFEE6DD8 ($4)
+
+
+
+. 2943 FEE7BE8 28
+. 80 DE 1C C0 38 80 00 00 83 5E 1D C0 7F E3 32 78 20 03 00 00 7C 60 19 14 4B FF F1 D9
+==== BB 2944 tzset_internal(0xFEE6DD8) approx BBs exec'd 0 ====
+
+ 0xFEE6DD8: 9421FFB0 stwu r1,-80(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFB0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEE6DDC: 7CA802A6 mflr r5
+ 6: GETL LR, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFEE6DE0: 480C1071 bl 0xFFA7E50
+ 9: MOVL $0xFEE6DE4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2944 FEE6DD8 12
+. 94 21 FF B0 7C A8 02 A6 48 0C 10 71
+==== BB 2945 (0xFEE6DE4) approx BBs exec'd 0 ====
+
+ 0xFEE6DE4: 93C10048 stw r30,72(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x48, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEE6DE8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEE6DEC: 20030000 subfic r0,r3,0
+ 8: GETL R3, t6
+ 9: MOVL $0x0, t8
+ 10: SBBL t6, t8 (-wCa)
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0xFEE6DF0: 7C601914 adde r3,r0,r3
+ 13: GETL R0, t10
+ 14: GETL R3, t12
+ 15: ADCL t10, t12 (-rCa-wCa)
+ 16: PUTL t12, R3
+ 17: INCEIPL $4
+
+ 0xFEE6DF4: 90A10054 stw r5,84(r1)
+ 18: GETL R5, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x54, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFEE6DF8: 7D800026 mfcr r12
+ 23: GETL CR, t18
+ 24: PUTL t18, R12
+ 25: INCEIPL $4
+
+ 0xFEE6DFC: 93A10044 stw r29,68(r1)
+ 26: GETL R29, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x44, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xFEE6E00: 7C9D2378 or r29,r4,r4
+ 31: GETL R4, t24
+ 32: PUTL t24, R29
+ 33: INCEIPL $4
+
+ 0xFEE6E04: 817E0894 lwz r11,2196(r30)
+ 34: GETL R30, t26
+ 35: ADDL $0x894, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R11
+ 38: INCEIPL $4
+
+ 0xFEE6E08: 93E1004C stw r31,76(r1)
+ 39: GETL R31, t30
+ 40: GETL R1, t32
+ 41: ADDL $0x4C, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFEE6E0C: 7C3F0B78 or r31,r1,r1
+ 44: GETL R1, t34
+ 45: PUTL t34, R31
+ 46: INCEIPL $4
+
+ 0xFEE6E10: 812B0000 lwz r9,0(r11)
+ 47: GETL R11, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R9
+ 50: INCEIPL $4
+
+ 0xFEE6E14: 92C10028 stw r22,40(r1)
+ 51: GETL R22, t40
+ 52: GETL R1, t42
+ 53: ADDL $0x28, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0xFEE6E18: 3149FFFF addic r10,r9,-1
+ 56: GETL R9, t44
+ 57: ADCL $0xFFFFFFFF, t44 (-wCa)
+ 58: PUTL t44, R10
+ 59: INCEIPL $4
+
+ 0xFEE6E1C: 7C0A4910 subfe r0,r10,r9
+ 60: GETL R10, t46
+ 61: GETL R9, t48
+ 62: SBBL t46, t48 (-rCa-wCa)
+ 63: PUTL t48, R0
+ 64: INCEIPL $4
+
+ 0xFEE6E20: 92E1002C stw r23,44(r1)
+ 65: GETL R23, t50
+ 66: GETL R1, t52
+ 67: ADDL $0x2C, t52
+ 68: STL t50, (t52)
+ 69: INCEIPL $4
+
+ 0xFEE6E24: 7C091839 and. r9,r0,r3
+ 70: GETL R0, t54
+ 71: GETL R3, t56
+ 72: ANDL t54, t56
+ 73: PUTL t56, R9
+ 74: CMP0L t56, t58 (-rSo)
+ 75: ICRFL t58, $0x0, CR
+ 76: INCEIPL $4
+
+ 0xFEE6E28: 93010030 stw r24,48(r1)
+ 77: GETL R24, t60
+ 78: GETL R1, t62
+ 79: ADDL $0x30, t62
+ 80: STL t60, (t62)
+ 81: INCEIPL $4
+
+ 0xFEE6E2C: 93210034 stw r25,52(r1)
+ 82: GETL R25, t64
+ 83: GETL R1, t66
+ 84: ADDL $0x34, t66
+ 85: STL t64, (t66)
+ 86: INCEIPL $4
+
+ 0xFEE6E30: 93410038 stw r26,56(r1)
+ 87: GETL R26, t68
+ 88: GETL R1, t70
+ 89: ADDL $0x38, t70
+ 90: STL t68, (t70)
+ 91: INCEIPL $4
+
+ 0xFEE6E34: 9361003C stw r27,60(r1)
+ 92: GETL R27, t72
+ 93: GETL R1, t74
+ 94: ADDL $0x3C, t74
+ 95: STL t72, (t74)
+ 96: INCEIPL $4
+
+ 0xFEE6E38: 93810040 stw r28,64(r1)
+ 97: GETL R28, t76
+ 98: GETL R1, t78
+ 99: ADDL $0x40, t78
+ 100: STL t76, (t78)
+ 101: INCEIPL $4
+
+ 0xFEE6E3C: 91810024 stw r12,36(r1)
+ 102: GETL R12, t80
+ 103: GETL R1, t82
+ 104: ADDL $0x24, t82
+ 105: STL t80, (t82)
+ 106: INCEIPL $4
+
+ 0xFEE6E40: 41820048 bc 12,2,0xFEE6E88
+ 107: Js02o $0xFEE6E88
+
+
+
+. 2945 FEE6DE4 96
+. 93 C1 00 48 7F C8 02 A6 20 03 00 00 7C 60 19 14 90 A1 00 54 7D 80 00 26 93 A1 00 44 7C 9D 23 78 81 7E 08 94 93 E1 00 4C 7C 3F 0B 78 81 2B 00 00 92 C1 00 28 31 49 FF FF 7C 0A 49 10 92 E1 00 2C 7C 09 18 39 93 01 00 30 93 21 00 34 93 41 00 38 93 61 00 3C 93 81 00 40 91 81 00 24 41 82 00 48
+==== BB 2946 (0xFEE6E88) approx BBs exec'd 0 ====
+
+ 0xFEE6E88: 38E00001 li r7,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0xFEE6E8C: 807E08A4 lwz r3,2212(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x8A4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE6E90: 90EB0000 stw r7,0(r11)
+ 8: GETL R7, t6
+ 9: GETL R11, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFEE6E94: 4BFAC305 bl 0xFE93198
+ 12: MOVL $0xFEE6E98, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0xFE93198 ($4)
+
+
+
+. 2946 FEE6E88 16
+. 38 E0 00 01 80 7E 08 A4 90 EB 00 00 4B FA C3 05
+==== BB 2947 (0xFEE6E98) approx BBs exec'd 0 ====
+
+ 0xFEE6E98: 201D0000 subfic r0,r29,0
+ 0: GETL R29, t0
+ 1: MOVL $0x0, t2
+ 2: SBBL t0, t2 (-wCa)
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEE6E9C: 7C80E914 adde r4,r0,r29
+ 5: GETL R0, t4
+ 6: GETL R29, t6
+ 7: ADCL t4, t6 (-rCa-wCa)
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFEE6EA0: 2F030000 cmpi cr6,r3,0
+ 10: GETL R3, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFEE6EA4: 7C7C1B78 or r28,r3,r3
+ 14: GETL R3, t12
+ 15: PUTL t12, R28
+ 16: INCEIPL $4
+
+ 0xFEE6EA8: 7CC00026 mfcr r6
+ 17: GETL CR, t14
+ 18: PUTL t14, R6
+ 19: INCEIPL $4
+
+ 0xFEE6EAC: 54C6DFFE rlwinm r6,r6,27,31,31
+ 20: GETL R6, t16
+ 21: ROLL $0x1B, t16
+ 22: ANDL $0x1, t16
+ 23: PUTL t16, R6
+ 24: INCEIPL $4
+
+ 0xFEE6EB0: 7CCA2039 and. r10,r6,r4
+ 25: GETL R6, t18
+ 26: GETL R4, t20
+ 27: ANDL t18, t20
+ 28: PUTL t20, R10
+ 29: CMP0L t20, t22 (-rSo)
+ 30: ICRFL t22, $0x0, CR
+ 31: INCEIPL $4
+
+ 0xFEE6EB4: 408201F4 bc 4,2,0xFEE70A8
+ 32: Jc02o $0xFEE70A8
+
+
+
+. 2947 FEE6E98 32
+. 20 1D 00 00 7C 80 E9 14 2F 03 00 00 7C 7C 1B 78 7C C0 00 26 54 C6 DF FE 7C CA 20 39 40 82 01 F4
+==== BB 2948 (0xFEE70A8) approx BBs exec'd 0 ====
+
+ 0xFEE70A8: 839E08AC lwz r28,2220(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8AC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFEE70AC: 2F1C0000 cmpi cr6,r28,0
+ 5: GETL R28, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFEE70B0: 4BFFFE08 b 0xFEE6EB8
+ 9: JMPo $0xFEE6EB8 ($4)
+
+
+
+. 2948 FEE70A8 12
+. 83 9E 08 AC 2F 1C 00 00 4B FF FE 08
+==== BB 2949 (0xFEE6EB8) approx BBs exec'd 0 ====
+
+ 0xFEE6EB8: 419A0030 bc 12,26,0xFEE6EE8
+ 0: Js26o $0xFEE6EE8
+
+
+
+. 2949 FEE6EB8 4
+. 41 9A 00 30
+==== BB 2950 (0xFEE6EBC) approx BBs exec'd 0 ====
+
+ 0xFEE6EBC: 891C0000 lbz r8,0(r28)
+ 0: GETL R28, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0xFEE6EC0: 2F880000 cmpi cr7,r8,0
+ 4: GETL R8, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFEE6EC4: 409E000C bc 4,30,0xFEE6ED0
+ 8: Jc30o $0xFEE6ED0
+
+
+
+. 2950 FEE6EBC 12
+. 89 1C 00 00 2F 88 00 00 40 9E 00 0C
+==== BB 2951 (0xFEE6ED0) approx BBs exec'd 0 ====
+
+ 0xFEE6ED0: 419A0018 bc 12,26,0xFEE6EE8
+ 0: Js26o $0xFEE6EE8
+
+
+
+. 2951 FEE6ED0 4
+. 41 9A 00 18
+==== BB 2952 (0xFEE6ED4) approx BBs exec'd 0 ====
+
+ 0xFEE6ED4: 895C0000 lbz r10,0(r28)
+ 0: GETL R28, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFEE6ED8: 694B003A xori r11,r10,0x3A
+ 4: GETL R10, t4
+ 5: XORL $0x3A, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0xFEE6EDC: 216B0000 subfic r11,r11,0
+ 8: GETL R11, t6
+ 9: MOVL $0x0, t8
+ 10: SBBL t6, t8 (-wCa)
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0xFEE6EE0: 7D7C0194 addze r11,r28
+ 13: GETL R28, t10
+ 14: ADCL $0x0, t10 (-rCa-wCa)
+ 15: PUTL t10, R11
+ 16: INCEIPL $4
+
+ 0xFEE6EE4: 7D7C5B78 or r28,r11,r11
+ 17: GETL R11, t12
+ 18: PUTL t12, R28
+ 19: INCEIPL $4
+
+ 0xFEE6EE8: 835E0898 lwz r26,2200(r30)
+ 20: GETL R30, t14
+ 21: ADDL $0x898, t14
+ 22: LDL (t14), t16
+ 23: PUTL t16, R26
+ 24: INCEIPL $4
+
+ 0xFEE6EEC: 313CFFFF addic r9,r28,-1
+ 25: GETL R28, t18
+ 26: ADCL $0xFFFFFFFF, t18 (-wCa)
+ 27: PUTL t18, R9
+ 28: INCEIPL $4
+
+ 0xFEE6EF0: 7EC9E110 subfe r22,r9,r28
+ 29: GETL R9, t20
+ 30: GETL R28, t22
+ 31: SBBL t20, t22 (-rCa-wCa)
+ 32: PUTL t22, R22
+ 33: INCEIPL $4
+
+ 0xFEE6EF4: 83BA0000 lwz r29,0(r26)
+ 34: GETL R26, t24
+ 35: LDL (t24), t26
+ 36: PUTL t26, R29
+ 37: INCEIPL $4
+
+ 0xFEE6EF8: 315DFFFF addic r10,r29,-1
+ 38: GETL R29, t28
+ 39: ADCL $0xFFFFFFFF, t28 (-wCa)
+ 40: PUTL t28, R10
+ 41: INCEIPL $4
+
+ 0xFEE6EFC: 7EEAE910 subfe r23,r10,r29
+ 42: GETL R10, t30
+ 43: GETL R29, t32
+ 44: SBBL t30, t32 (-rCa-wCa)
+ 45: PUTL t32, R23
+ 46: INCEIPL $4
+
+ 0xFEE6F00: 7EEBB039 and. r11,r23,r22
+ 47: GETL R23, t34
+ 48: GETL R22, t36
+ 49: ANDL t34, t36
+ 50: PUTL t36, R11
+ 51: CMP0L t36, t38 (-rSo)
+ 52: ICRFL t38, $0x0, CR
+ 53: INCEIPL $4
+
+ 0xFEE6F04: 41820018 bc 12,2,0xFEE6F1C
+ 54: Js02o $0xFEE6F1C
+
+
+
+. 2952 FEE6ED4 52
+. 89 5C 00 00 69 4B 00 3A 21 6B 00 00 7D 7C 01 94 7D 7C 5B 78 83 5E 08 98 31 3C FF FF 7E C9 E1 10 83 BA 00 00 31 5D FF FF 7E EA E9 10 7E EB B0 39 41 82 00 18
+==== BB 2953 (0xFEE6F1C) approx BBs exec'd 0 ====
+
+ 0xFEE6F1C: 2E1C0000 cmpi cr4,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFEE6F20: 41920458 bc 12,18,0xFEE7378
+ 4: Js18o $0xFEE7378
+
+
+
+. 2953 FEE6F1C 8
+. 2E 1C 00 00 41 92 04 58
+==== BB 2954 (0xFEE6F24) approx BBs exec'd 0 ====
+
+ 0xFEE6F24: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFEE6F28: 837E089C lwz r27,2204(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x89C, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0xFEE6F2C: 3B000000 li r24,0
+ 9: MOVL $0x0, t8
+ 10: PUTL t8, R24
+ 11: INCEIPL $4
+
+ 0xFEE6F30: 931B0020 stw r24,32(r27)
+ 12: GETL R24, t10
+ 13: GETL R27, t12
+ 14: ADDL $0x20, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0xFEE6F34: 931B0000 stw r24,0(r27)
+ 17: GETL R24, t14
+ 18: GETL R27, t16
+ 19: STL t14, (t16)
+ 20: INCEIPL $4
+
+ 0xFEE6F38: 409A017C bc 4,26,0xFEE70B4
+ 21: Jc26o $0xFEE70B4
+
+
+
+. 2954 FEE6F24 24
+. 2F 1D 00 00 83 7E 08 9C 3B 00 00 00 93 1B 00 20 93 1B 00 00 40 9A 01 7C
+==== BB 2955 (0xFEE6F3C) approx BBs exec'd 0 ====
+
+ 0xFEE6F3C: 7F5DD378 or r29,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFEE6F40: 40920180 bc 4,18,0xFEE70C0
+ 3: Jc18o $0xFEE70C0
+
+
+
+. 2955 FEE6F3C 8
+. 7F 5D D3 78 40 92 01 80
+==== BB 2956 (0xFEE70C0) approx BBs exec'd 0 ====
+
+ 0xFEE70C0: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEE70C4: 4BFEF6D9 bl 0xFED679C
+ 3: MOVL $0xFEE70C8, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFED679C ($4)
+
+
+
+. 2956 FEE70C0 8
+. 7F 83 E3 78 4B FE F6 D9
+==== BB 2957 (0xFEE70C8) approx BBs exec'd 0 ====
+
+ 0xFEE70C8: 7C601B78 or r0,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFEE70CC: 4BFFFE7C b 0xFEE6F48
+ 3: JMPo $0xFEE6F48 ($4)
+
+
+
+. 2957 FEE70C8 8
+. 7C 60 1B 78 4B FF FE 7C
+==== BB 2958 (0xFEE6F48) approx BBs exec'd 0 ====
+
+ 0xFEE6F48: 833E1DC0 lwz r25,7616(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1DC0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0xFEE6F4C: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE6F50: 901D0000 stw r0,0(r29)
+ 8: GETL R0, t6
+ 9: GETL R29, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFEE6F54: 38800000 li r4,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0xFEE6F58: 38A00000 li r5,0
+ 15: MOVL $0x0, t12
+ 16: PUTL t12, R5
+ 17: INCEIPL $4
+
+ 0xFEE6F5C: 48000E8D bl 0xFEE7DE8
+ 18: MOVL $0xFEE6F60, t14
+ 19: PUTL t14, LR
+ 20: JMPo-c $0xFEE7DE8 ($4)
+
+
+
+. 2958 FEE6F48 24
+. 83 3E 1D C0 7F 83 E3 78 90 1D 00 00 38 80 00 00 38 A0 00 00 48 00 0E 8D
+==== BB 2959 __tzfile_read(0xFEE7DE8) approx BBs exec'd 0 ====
+
+ 0xFEE7DE8: 9421FEF0 stwu r1,-272(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFEF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEE7DEC: 7CC802A6 mflr r6
+ 6: GETL LR, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0xFEE7DF0: 480C0061 bl 0xFFA7E50
+ 9: MOVL $0xFEE7DF4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2959 FEE7DE8 12
+. 94 21 FE F0 7C C8 02 A6 48 0C 00 61
+==== BB 2960 (0xFEE7DF4) approx BBs exec'd 0 ====
+
+ 0xFEE7DF4: 93C10108 stw r30,264(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x108, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEE7DF8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEE7DFC: 936100FC stw r27,252(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xFC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEE7E00: 7C7B1B79 or. r27,r3,r3
+ 13: GETL R3, t10
+ 14: PUTL t10, R27
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x0, CR
+ 17: INCEIPL $4
+
+ 0xFEE7E04: 928100E0 stw r20,224(r1)
+ 18: GETL R20, t14
+ 19: GETL R1, t16
+ 20: ADDL $0xE0, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFEE7E08: 90C10114 stw r6,276(r1)
+ 23: GETL R6, t18
+ 24: GETL R1, t20
+ 25: ADDL $0x114, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0xFEE7E0C: 38000000 li r0,0
+ 28: MOVL $0x0, t22
+ 29: PUTL t22, R0
+ 30: INCEIPL $4
+
+ 0xFEE7E10: 829E1DC0 lwz r20,7616(r30)
+ 31: GETL R30, t24
+ 32: ADDL $0x1DC0, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R20
+ 35: INCEIPL $4
+
+ 0xFEE7E14: 92C100E8 stw r22,232(r1)
+ 36: GETL R22, t28
+ 37: GETL R1, t30
+ 38: ADDL $0xE8, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0xFEE7E18: 7CB62B78 or r22,r5,r5
+ 41: GETL R5, t32
+ 42: PUTL t32, R22
+ 43: INCEIPL $4
+
+ 0xFEE7E1C: 92E100EC stw r23,236(r1)
+ 44: GETL R23, t34
+ 45: GETL R1, t36
+ 46: ADDL $0xEC, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0xFEE7E20: 7C972378 or r23,r4,r4
+ 49: GETL R4, t38
+ 50: PUTL t38, R23
+ 51: INCEIPL $4
+
+ 0xFEE7E24: 930100F0 stw r24,240(r1)
+ 52: GETL R24, t40
+ 53: GETL R1, t42
+ 54: ADDL $0xF0, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0xFEE7E28: 93E1010C stw r31,268(r1)
+ 57: GETL R31, t44
+ 58: GETL R1, t46
+ 59: ADDL $0x10C, t46
+ 60: STL t44, (t46)
+ 61: INCEIPL $4
+
+ 0xFEE7E2C: 7C3F0B78 or r31,r1,r1
+ 62: GETL R1, t48
+ 63: PUTL t48, R31
+ 64: INCEIPL $4
+
+ 0xFEE7E30: 83140000 lwz r24,0(r20)
+ 65: GETL R20, t50
+ 66: LDL (t50), t52
+ 67: PUTL t52, R24
+ 68: INCEIPL $4
+
+ 0xFEE7E34: 91C100C8 stw r14,200(r1)
+ 69: GETL R14, t54
+ 70: GETL R1, t56
+ 71: ADDL $0xC8, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0xFEE7E38: 91E100CC stw r15,204(r1)
+ 74: GETL R15, t58
+ 75: GETL R1, t60
+ 76: ADDL $0xCC, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0xFEE7E3C: 920100D0 stw r16,208(r1)
+ 79: GETL R16, t62
+ 80: GETL R1, t64
+ 81: ADDL $0xD0, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0xFEE7E40: 922100D4 stw r17,212(r1)
+ 84: GETL R17, t66
+ 85: GETL R1, t68
+ 86: ADDL $0xD4, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0xFEE7E44: 924100D8 stw r18,216(r1)
+ 89: GETL R18, t70
+ 90: GETL R1, t72
+ 91: ADDL $0xD8, t72
+ 92: STL t70, (t72)
+ 93: INCEIPL $4
+
+ 0xFEE7E48: 926100DC stw r19,220(r1)
+ 94: GETL R19, t74
+ 95: GETL R1, t76
+ 96: ADDL $0xDC, t76
+ 97: STL t74, (t76)
+ 98: INCEIPL $4
+
+ 0xFEE7E4C: 92A100E4 stw r21,228(r1)
+ 99: GETL R21, t78
+ 100: GETL R1, t80
+ 101: ADDL $0xE4, t80
+ 102: STL t78, (t80)
+ 103: INCEIPL $4
+
+ 0xFEE7E50: 932100F4 stw r25,244(r1)
+ 104: GETL R25, t82
+ 105: GETL R1, t84
+ 106: ADDL $0xF4, t84
+ 107: STL t82, (t84)
+ 108: INCEIPL $4
+
+ 0xFEE7E54: 934100F8 stw r26,248(r1)
+ 109: GETL R26, t86
+ 110: GETL R1, t88
+ 111: ADDL $0xF8, t88
+ 112: STL t86, (t88)
+ 113: INCEIPL $4
+
+ 0xFEE7E58: 93810100 stw r28,256(r1)
+ 114: GETL R28, t90
+ 115: GETL R1, t92
+ 116: ADDL $0x100, t92
+ 117: STL t90, (t92)
+ 118: INCEIPL $4
+
+ 0xFEE7E5C: 93A10104 stw r29,260(r1)
+ 119: GETL R29, t94
+ 120: GETL R1, t96
+ 121: ADDL $0x104, t96
+ 122: STL t94, (t96)
+ 123: INCEIPL $4
+
+ 0xFEE7E60: 90140000 stw r0,0(r20)
+ 124: GETL R0, t98
+ 125: GETL R20, t100
+ 126: STL t98, (t100)
+ 127: INCEIPL $4
+
+ 0xFEE7E64: 418200AC bc 12,2,0xFEE7F10
+ 128: Js02o $0xFEE7F10
+
+
+
+. 2960 FEE7DF4 116
+. 93 C1 01 08 7F C8 02 A6 93 61 00 FC 7C 7B 1B 79 92 81 00 E0 90 C1 01 14 38 00 00 00 82 9E 1D C0 92 C1 00 E8 7C B6 2B 78 92 E1 00 EC 7C 97 23 78 93 01 00 F0 93 E1 01 0C 7C 3F 0B 78 83 14 00 00 91 C1 00 C8 91 E1 00 CC 92 01 00 D0 92 21 00 D4 92 41 00 D8 92 61 00 DC 92 A1 00 E4 93 21 00 F4 93 41 00 F8 93 81 01 00 93 A1 01 04 90 14 00 00 41 82 00 AC
+==== BB 2961 (0xFEE7E68) approx BBs exec'd 0 ====
+
+ 0xFEE7E68: 8BBB0000 lbz r29,0(r27)
+ 0: GETL R27, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0xFEE7E6C: 7FABEB79 or. r11,r29,r29
+ 4: GETL R29, t4
+ 5: PUTL t4, R11
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFEE7E70: 418202FC bc 12,2,0xFEE816C
+ 9: Js02o $0xFEE816C
+
+
+
+. 2961 FEE7E68 12
+. 8B BB 00 00 7F AB EB 79 41 82 02 FC
+==== BB 2962 (0xFEE7E74) approx BBs exec'd 0 ====
+
+ 0xFEE7E74: 813E1D70 lwz r9,7536(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1D70, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEE7E78: 80890000 lwz r4,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0xFEE7E7C: 2F840000 cmpi cr7,r4,0
+ 9: GETL R4, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFEE7E80: 419E0098 bc 12,30,0xFEE7F18
+ 13: Js30o $0xFEE7F18
+
+
+
+. 2962 FEE7E74 16
+. 81 3E 1D 70 80 89 00 00 2F 84 00 00 41 9E 00 98
+==== BB 2963 (0xFEE7F18) approx BBs exec'd 0 ====
+
+ 0xFEE7F18: 2C9D002F cmpi cr1,r29,47
+ 0: GETL R29, t0
+ 1: MOVL $0x2F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFEE7F1C: 41860080 bc 12,6,0xFEE7F9C
+ 5: Js06o $0xFEE7F9C
+
+
+
+. 2963 FEE7F18 8
+. 2C 9D 00 2F 41 86 00 80
+==== BB 2964 (0xFEE7F9C) approx BBs exec'd 0 ====
+
+ 0xFEE7F9C: 2F980000 cmpi cr7,r24,0
+ 0: GETL R24, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFEE7FA0: 419E001C bc 12,30,0xFEE7FBC
+ 4: Js30o $0xFEE7FBC
+
+
+
+. 2964 FEE7F9C 8
+. 2F 98 00 00 41 9E 00 1C
+==== BB 2965 (0xFEE7FBC) approx BBs exec'd 0 ====
+
+ 0xFEE7FBC: 809E090C lwz r4,2316(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x90C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFEE7FC0: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE7FC4: 4BFD45D1 bl 0xFEBC594
+ 8: MOVL $0xFEE7FC8, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFEBC594 ($4)
+
+
+
+. 2965 FEE7FBC 12
+. 80 9E 09 0C 7F 63 DB 78 4B FD 45 D1
+==== BB 2966 (0xFEE7FC8) approx BBs exec'd 0 ====
+
+ 0xFEE7FC8: 7C7B1B79 or. r27,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R27
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFEE7FCC: 418201A0 bc 12,2,0xFEE816C
+ 5: Js02o $0xFEE816C
+
+
+
+. 2966 FEE7FC8 8
+. 7C 7B 1B 79 41 82 01 A0
+==== BB 2967 (0xFEE7FD0) approx BBs exec'd 0 ====
+
+ 0xFEE7FD0: 4BFDD015 bl 0xFEC4FE4
+ 0: MOVL $0xFEE7FD4, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFEC4FE4 ($4)
+
+
+
+. 2967 FEE7FD0 4
+. 4B FD D0 15
+==== BB 2968 fileno_unlocked(0xFEC4FE4) approx BBs exec'd 0 ====
+
+ 0xFEC4FE4: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEC4FE8: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFEC4FEC: 80030000 lwz r0,0(r3)
+ 9: GETL R3, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0xFEC4FF0: 480E2E61 bl 0xFFA7E50
+ 13: MOVL $0xFEC4FF4, t10
+ 14: PUTL t10, LR
+ 15: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2968 FEC4FE4 16
+. 94 21 FF F0 7D 88 02 A6 80 03 00 00 48 0E 2E 61
+==== BB 2969 (0xFEC4FF4) approx BBs exec'd 0 ====
+
+ 0xFEC4FF4: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEC4FF8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEC4FFC: 70092000 andi. r9,r0,0x2000
+ 8: GETL R0, t6
+ 9: ANDL $0x2000, t6
+ 10: PUTL t6, R9
+ 11: CMP0L t6, t8 (-rSo)
+ 12: ICRFL t8, $0x0, CR
+ 13: INCEIPL $4
+
+ 0xFEC5000: 7D8803A6 mtlr r12
+ 14: GETL R12, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xFEC5004: 813E1C4C lwz r9,7244(r30)
+ 17: GETL R30, t12
+ 18: ADDL $0x1C4C, t12
+ 19: LDL (t12), t14
+ 20: PUTL t14, R9
+ 21: INCEIPL $4
+
+ 0xFEC5008: 7D291214 add r9,r9,r2
+ 22: GETL R9, t16
+ 23: GETL R2, t18
+ 24: ADDL t16, t18
+ 25: PUTL t18, R9
+ 26: INCEIPL $4
+
+ 0xFEC500C: 41820020 bc 12,2,0xFEC502C
+ 27: Js02o $0xFEC502C
+
+
+
+. 2969 FEC4FF4 28
+. 93 C1 00 08 7F C8 02 A6 70 09 20 00 7D 88 03 A6 81 3E 1C 4C 7D 29 12 14 41 82 00 20
+==== BB 2970 (0xFEC5010) approx BBs exec'd 0 ====
+
+ 0xFEC5010: 80030038 lwz r0,56(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x38, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEC5014: 2F800000 cmpi cr7,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFEC5018: 419C0014 bc 12,28,0xFEC502C
+ 9: Js28o $0xFEC502C
+
+
+
+. 2970 FEC5010 12
+. 80 03 00 38 2F 80 00 00 41 9C 00 14
+==== BB 2971 (0xFEC501C) approx BBs exec'd 0 ====
+
+ 0xFEC501C: 7C030378 or r3,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC5020: 83C10008 lwz r30,8(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEC5024: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xFEC5028: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 2971 FEC501C 16
+. 7C 03 03 78 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 2972 (0xFEE7FD4) approx BBs exec'd 0 ====
+
+ 0xFEE7FD4: 38BF0040 addi r5,r31,64
+ 0: GETL R31, t0
+ 1: ADDL $0x40, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0xFEE7FD8: 7C641B78 or r4,r3,r3
+ 4: GETL R3, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0xFEE7FDC: 38600003 li r3,3
+ 7: MOVL $0x3, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0xFEE7FE0: 480392E1 bl 0xFF212C0
+ 10: MOVL $0xFEE7FE4, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0xFF212C0 ($4)
+
+
+
+. 2972 FEE7FD4 16
+. 38 BF 00 40 7C 64 1B 78 38 60 00 03 48 03 92 E1
+==== BB 2973 (0xFEE7FE4) approx BBs exec'd 0 ====
+
+ 0xFEE7FE4: 7C7D1B79 or. r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFEE7FE8: 408204E0 bc 4,2,0xFEE84C8
+ 5: Jc02o $0xFEE84C8
+
+
+
+. 2973 FEE7FE4 8
+. 7C 7D 1B 79 40 82 04 E0
+==== BB 2974 (0xFEE7FEC) approx BBs exec'd 0 ====
+
+ 0xFEE7FEC: 827E08CC lwz r19,2252(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8CC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0xFEE7FF0: 839E08D0 lwz r28,2256(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x8D0, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0xFEE7FF4: 80730000 lwz r3,0(r19)
+ 10: GETL R19, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R3
+ 13: INCEIPL $4
+
+ 0xFEE7FF8: 480C2339 bl 0xFFAA330
+ 14: MOVL $0xFEE7FFC, t12
+ 15: PUTL t12, LR
+ 16: JMPo-c $0xFFAA330 ($4)
+
+
+
+. 2974 FEE7FEC 16
+. 82 7E 08 CC 83 9E 08 D0 80 73 00 00 48 0C 23 39
+==== BB 2975 (0xFEE7FFC) approx BBs exec'd 0 ====
+
+ 0xFEE7FFC: C81F0040 lfd f0,64(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x40, t0
+ 2: FPU_RQ (t0), 0x0:0x0
+ 3: INCEIPL $4
+
+ 0xFEE8000: C9BF0048 lfd f13,72(r31)
+ 4: GETL R31, t2
+ 5: ADDL $0x48, t2
+ 6: FPU_RQ (t2), 0x0:0xD
+ 7: INCEIPL $4
+
+ 0xFEE8004: 38800002 li r4,2
+ 8: MOVL $0x2, t4
+ 9: PUTL t4, R4
+ 10: INCEIPL $4
+
+ 0xFEE8008: 80BF0090 lwz r5,144(r31)
+ 11: GETL R31, t6
+ 12: ADDL $0x90, t6
+ 13: LDL (t6), t8
+ 14: PUTL t8, R5
+ 15: INCEIPL $4
+
+ 0xFEE800C: 7F63DB78 or r3,r27,r27
+ 16: GETL R27, t10
+ 17: PUTL t10, R3
+ 18: INCEIPL $4
+
+ 0xFEE8010: 813E08D4 lwz r9,2260(r30)
+ 19: GETL R30, t12
+ 20: ADDL $0x8D4, t12
+ 21: LDL (t12), t14
+ 22: PUTL t14, R9
+ 23: INCEIPL $4
+
+ 0xFEE8014: 93B30000 stw r29,0(r19)
+ 24: GETL R29, t16
+ 25: GETL R19, t18
+ 26: STL t16, (t18)
+ 27: INCEIPL $4
+
+ 0xFEE8018: 83BE08D8 lwz r29,2264(r30)
+ 28: GETL R30, t20
+ 29: ADDL $0x8D8, t20
+ 30: LDL (t20), t22
+ 31: PUTL t22, R29
+ 32: INCEIPL $4
+
+ 0xFEE801C: 90A90000 stw r5,0(r9)
+ 33: GETL R5, t24
+ 34: GETL R9, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xFEE8020: D81C0000 stfd f0,0(r28)
+ 37: GETL R28, t28
+ 38: FPU_WQ 0x0:0x0, (t28)
+ 39: INCEIPL $4
+
+ 0xFEE8024: D9BD0000 stfd f13,0(r29)
+ 40: GETL R29, t30
+ 41: FPU_WQ 0x0:0xD, (t30)
+ 42: INCEIPL $4
+
+ 0xFEE8028: 4BFDF335 bl 0xFEC735C
+ 43: MOVL $0xFEE802C, t32
+ 44: PUTL t32, LR
+ 45: JMPo-c $0xFEC735C ($4)
+
+
+
+. 2975 FEE7FFC 48
+. C8 1F 00 40 C9 BF 00 48 38 80 00 02 80 BF 00 90 7F 63 DB 78 81 3E 08 D4 93 B3 00 00 83 BE 08 D8 90 A9 00 00 D8 1C 00 00 D9 BD 00 00 4B FD F3 35
+==== BB 2976 (0xFEE802C) approx BBs exec'd 0 ====
+
+ 0xFEE802C: 387F0010 addi r3,r31,16
+ 0: GETL R31, t0
+ 1: ADDL $0x10, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFEE8030: 3880002C li r4,44
+ 4: MOVL $0x2C, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0xFEE8034: 38A00001 li r5,1
+ 7: MOVL $0x1, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0xFEE8038: 7F66DB78 or r6,r27,r27
+ 10: GETL R27, t6
+ 11: PUTL t6, R6
+ 12: INCEIPL $4
+
+ 0xFEE803C: 4BFDFEA1 bl 0xFEC7EDC
+ 13: MOVL $0xFEE8040, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0xFEC7EDC ($4)
+
+
+
+. 2976 FEE802C 20
+. 38 7F 00 10 38 80 00 2C 38 A0 00 01 7F 66 DB 78 4B FD FE A1
+==== BB 2977 fread_unlocked(0xFEC7EDC) approx BBs exec'd 0 ====
+
+ 0xFEC7EDC: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEC7EE0: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFEC7EE4: 93810010 stw r28,16(r1)
+ 9: GETL R28, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEC7EE8: 7F8429D7 mullw. r28,r4,r5
+ 14: GETL R4, t10
+ 15: GETL R5, t12
+ 16: MULL t10, t12
+ 17: PUTL t12, R28
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x0, CR
+ 20: INCEIPL $4
+
+ 0xFEC7EEC: 93A10014 stw r29,20(r1)
+ 21: GETL R29, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEC7EF0: 7C9D2378 or r29,r4,r4
+ 26: GETL R4, t20
+ 27: PUTL t20, R29
+ 28: INCEIPL $4
+
+ 0xFEC7EF4: 93E1001C stw r31,28(r1)
+ 29: GETL R31, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x1C, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFEC7EF8: 7C641B78 or r4,r3,r3
+ 34: GETL R3, t26
+ 35: PUTL t26, R4
+ 36: INCEIPL $4
+
+ 0xFEC7EFC: 90010024 stw r0,36(r1)
+ 37: GETL R0, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x24, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFEC7F00: 7CBF2B78 or r31,r5,r5
+ 42: GETL R5, t32
+ 43: PUTL t32, R31
+ 44: INCEIPL $4
+
+ 0xFEC7F04: 93C10018 stw r30,24(r1)
+ 45: GETL R30, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x18, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0xFEC7F08: 7CC33378 or r3,r6,r6
+ 50: GETL R6, t38
+ 51: PUTL t38, R3
+ 52: INCEIPL $4
+
+ 0xFEC7F0C: 7F85E378 or r5,r28,r28
+ 53: GETL R28, t40
+ 54: PUTL t40, R5
+ 55: INCEIPL $4
+
+ 0xFEC7F10: 38000000 li r0,0
+ 56: MOVL $0x0, t42
+ 57: PUTL t42, R0
+ 58: INCEIPL $4
+
+ 0xFEC7F14: 40820028 bc 4,2,0xFEC7F3C
+ 59: Jc02o $0xFEC7F3C
+
+
+
+. 2977 FEC7EDC 60
+. 94 21 FF E0 7C 08 02 A6 93 81 00 10 7F 84 29 D7 93 A1 00 14 7C 9D 23 78 93 E1 00 1C 7C 64 1B 78 90 01 00 24 7C BF 2B 78 93 C1 00 18 7C C3 33 78 7F 85 E3 78 38 00 00 00 40 82 00 28
+==== BB 2978 (0xFEC7F3C) approx BBs exec'd 0 ====
+
+ 0xFEC7F3C: 48003F35 bl 0xFECBE70
+ 0: MOVL $0xFEC7F40, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFECBE70 ($4)
+
+
+
+. 2978 FEC7F3C 4
+. 48 00 3F 35
+==== BB 2979 _IO_sgetn_internal(0xFECBE70) approx BBs exec'd 0 ====
+
+ 0xFECBE70: 7D8802A6 mflr r12
+ 0: GETL LR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0xFECBE74: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECBE78: 91810014 stw r12,20(r1)
+ 9: GETL R12, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECBE7C: 89030046 lbz r8,70(r3)
+ 14: GETL R3, t10
+ 15: ADDL $0x46, t10
+ 16: LDB (t10), t12
+ 17: PUTL t12, R8
+ 18: INCEIPL $4
+
+ 0xFECBE80: 7D070774 extsb r7,r8
+ 19: GETB R8, t14
+ 20: WIDENL_Bs _st14
+ 21: PUTL t14, R7
+ 22: INCEIPL $4
+
+ 0xFECBE84: 7D271A14 add r9,r7,r3
+ 23: GETL R7, t16
+ 24: GETL R3, t18
+ 25: ADDL t16, t18
+ 26: PUTL t18, R9
+ 27: INCEIPL $4
+
+ 0xFECBE88: 80C90098 lwz r6,152(r9)
+ 28: GETL R9, t20
+ 29: ADDL $0x98, t20
+ 30: LDL (t20), t22
+ 31: PUTL t22, R6
+ 32: INCEIPL $4
+
+ 0xFECBE8C: 81660020 lwz r11,32(r6)
+ 33: GETL R6, t24
+ 34: ADDL $0x20, t24
+ 35: LDL (t24), t26
+ 36: PUTL t26, R11
+ 37: INCEIPL $4
+
+ 0xFECBE90: 7D6903A6 mtctr r11
+ 38: GETL R11, t28
+ 39: PUTL t28, CTR
+ 40: INCEIPL $4
+
+ 0xFECBE94: 4E800421 bctrl
+ 41: MOVL $0xFECBE98, t30
+ 42: PUTL t30, LR
+ 43: GETL CTR, t32
+ 44: JMPo-c t32 ($4)
+
+
+
+. 2979 FECBE70 40
+. 7D 88 02 A6 94 21 FF F0 91 81 00 14 89 03 00 46 7D 07 07 74 7D 27 1A 14 80 C9 00 98 81 66 00 20 7D 69 03 A6 4E 80 04 21
+==== BB 2980 _IO_file_xsgetn_internal(0xFECA96C) approx BBs exec'd 0 ====
+
+ 0xFECA96C: 7CC802A6 mflr r6
+ 0: GETL LR, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0xFECA970: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECA974: 93410008 stw r26,8(r1)
+ 9: GETL R26, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECA978: 7CBA2B78 or r26,r5,r5
+ 14: GETL R5, t10
+ 15: PUTL t10, R26
+ 16: INCEIPL $4
+
+ 0xFECA97C: 9361000C stw r27,12(r1)
+ 17: GETL R27, t12
+ 18: GETL R1, t14
+ 19: ADDL $0xC, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFECA980: 7C9B2378 or r27,r4,r4
+ 22: GETL R4, t16
+ 23: PUTL t16, R27
+ 24: INCEIPL $4
+
+ 0xFECA984: 90C10024 stw r6,36(r1)
+ 25: GETL R6, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x24, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFECA988: 8003001C lwz r0,28(r3)
+ 30: GETL R3, t22
+ 31: ADDL $0x1C, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFECA98C: 93810010 stw r28,16(r1)
+ 35: GETL R28, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x10, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFECA990: 7CBC2B78 or r28,r5,r5
+ 40: GETL R5, t30
+ 41: PUTL t30, R28
+ 42: INCEIPL $4
+
+ 0xFECA994: 2F800000 cmpi cr7,r0,0
+ 43: GETL R0, t32
+ 44: CMP0L t32, t34 (-rSo)
+ 45: ICRFL t34, $0x7, CR
+ 46: INCEIPL $4
+
+ 0xFECA998: 93A10014 stw r29,20(r1)
+ 47: GETL R29, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x14, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0xFECA99C: 93C10018 stw r30,24(r1)
+ 52: GETL R30, t40
+ 53: GETL R1, t42
+ 54: ADDL $0x18, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0xFECA9A0: 7C7D1B78 or r29,r3,r3
+ 57: GETL R3, t44
+ 58: PUTL t44, R29
+ 59: INCEIPL $4
+
+ 0xFECA9A4: 93E1001C stw r31,28(r1)
+ 60: GETL R31, t46
+ 61: GETL R1, t48
+ 62: ADDL $0x1C, t48
+ 63: STL t46, (t48)
+ 64: INCEIPL $4
+
+ 0xFECA9A8: 409E0018 bc 4,30,0xFECA9C0
+ 65: Jc30o $0xFECA9C0
+
+
+
+. 2980 FECA96C 64
+. 7C C8 02 A6 94 21 FF E0 93 41 00 08 7C BA 2B 78 93 61 00 0C 7C 9B 23 78 90 C1 00 24 80 03 00 1C 93 81 00 10 7C BC 2B 78 2F 80 00 00 93 A1 00 14 93 C1 00 18 7C 7D 1B 78 93 E1 00 1C 40 9E 00 18
+==== BB 2981 (0xFECA9AC) approx BBs exec'd 0 ====
+
+ 0xFECA9AC: 80630024 lwz r3,36(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECA9B0: 2C030000 cmpi cr0,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFECA9B4: 40820188 bc 4,2,0xFECAB3C
+ 9: Jc02o $0xFECAB3C
+
+
+
+. 2981 FECA9AC 12
+. 80 63 00 24 2C 03 00 00 40 82 01 88
+==== BB 2982 (0xFECA9B8) approx BBs exec'd 0 ====
+
+ 0xFECA9B8: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFECA9BC: 4800128D bl 0xFECBC48
+ 3: MOVL $0xFECA9C0, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFECBC48 ($4)
+
+
+
+. 2982 FECA9B8 8
+. 7F A3 EB 78 48 00 12 8D
+==== BB 2983 (0xFECA9C0) approx BBs exec'd 0 ====
+
+ 0xFECA9C0: 2F9A0000 cmpi cr7,r26,0
+ 0: GETL R26, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFECA9C4: 419E00EC bc 12,30,0xFECAAB0
+ 4: Js30o $0xFECAAB0
+
+
+
+. 2983 FECA9C0 8
+. 2F 9A 00 00 41 9E 00 EC
+==== BB 2984 (0xFECA9C8) approx BBs exec'd 0 ====
+
+ 0xFECA9C8: 80BD0008 lwz r5,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFECA9CC: 809D0004 lwz r4,4(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFECA9D0: 7FE42850 subf r31,r4,r5
+ 10: GETL R4, t8
+ 11: GETL R5, t10
+ 12: SUBL t8, t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xFECA9D4: 7C9CF840 cmpl cr1,r28,r31
+ 15: GETL R28, t12
+ 16: GETL R31, t14
+ 17: CMPUL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x1, CR
+ 19: INCEIPL $4
+
+ 0xFECA9D8: 40850180 bc 4,5,0xFECAB58
+ 20: Jc05o $0xFECAB58
+
+
+
+. 2984 FECA9C8 20
+. 80 BD 00 08 80 9D 00 04 7F E4 28 50 7C 9C F8 40 40 85 01 80
+==== BB 2985 (0xFECA9DC) approx BBs exec'd 0 ====
+
+ 0xFECA9DC: 2F1F0000 cmpi cr6,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFECA9E0: 409A010C bc 4,26,0xFECAAEC
+ 4: Jc26o $0xFECAAEC
+
+
+
+. 2985 FECA9DC 8
+. 2F 1F 00 00 40 9A 01 0C
+==== BB 2986 (0xFECA9E4) approx BBs exec'd 0 ====
+
+ 0xFECA9E4: 817D0000 lwz r11,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFECA9E8: 71690100 andi. r9,r11,0x100
+ 4: GETL R11, t4
+ 5: ANDL $0x100, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECA9EC: 408200F0 bc 4,2,0xFECAADC
+ 10: Jc02o $0xFECAADC
+
+
+
+. 2986 FECA9E4 12
+. 81 7D 00 00 71 69 01 00 40 82 00 F0
+==== BB 2987 (0xFECA9F0) approx BBs exec'd 0 ====
+
+ 0xFECA9F0: 813D001C lwz r9,28(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFECA9F4: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFECA9F8: 419E0014 bc 12,30,0xFECAA0C
+ 9: Js30o $0xFECAA0C
+
+
+
+. 2987 FECA9F0 12
+. 81 3D 00 1C 2F 89 00 00 41 9E 00 14
+==== BB 2988 (0xFECA9FC) approx BBs exec'd 0 ====
+
+ 0xFECA9FC: 83FD0020 lwz r31,32(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFECAA00: 7D89F850 subf r12,r9,r31
+ 5: GETL R9, t4
+ 6: GETL R31, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0xFECAA04: 7C8CE040 cmpl cr1,r12,r28
+ 10: GETL R12, t8
+ 11: GETL R28, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0xFECAA08: 4185011C bc 12,5,0xFECAB24
+ 15: Js05o $0xFECAB24
+
+
+
+. 2988 FECA9FC 16
+. 83 FD 00 20 7D 89 F8 50 7C 8C E0 40 41 85 01 1C
+==== BB 2989 (0xFECAB24) approx BBs exec'd 0 ====
+
+ 0xFECAB24: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFECAB28: 48000CCD bl 0xFECB7F4
+ 3: MOVL $0xFECAB2C, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFECB7F4 ($4)
+
+
+
+. 2989 FECAB24 8
+. 7F A3 EB 78 48 00 0C CD
+==== BB 2990 __GI___underflow(0xFECB7F4) approx BBs exec'd 0 ====
+
+ 0xFECB7F4: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFECB7F8: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFECB7FC: 93C10008 stw r30,8(r1)
+ 9: GETL R30, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFECB800: 480DC651 bl 0xFFA7E50
+ 14: MOVL $0xFECB804, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 2990 FECB7F4 16
+. 7C 88 02 A6 94 21 FF F0 93 C1 00 08 48 0D C6 51
+==== BB 2991 (0xFECB804) approx BBs exec'd 0 ====
+
+ 0xFECB804: 93E1000C stw r31,12(r1)
+ 0: GETL R31, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECB808: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFECB80C: 90810014 stw r4,20(r1)
+ 8: GETL R4, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFECB810: 7C7F1B78 or r31,r3,r3
+ 13: GETL R3, t10
+ 14: PUTL t10, R31
+ 15: INCEIPL $4
+
+ 0xFECB814: 88030046 lbz r0,70(r3)
+ 16: GETL R3, t12
+ 17: ADDL $0x46, t12
+ 18: LDB (t12), t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0xFECB818: 2F800000 cmpi cr7,r0,0
+ 21: GETL R0, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0xFECB81C: 409E0030 bc 4,30,0xFECB84C
+ 25: Jc30o $0xFECB84C
+
+
+
+. 2991 FECB804 28
+. 93 E1 00 0C 7F C8 02 A6 90 81 00 14 7C 7F 1B 78 88 03 00 46 2F 80 00 00 40 9E 00 30
+==== BB 2992 (0xFECB820) approx BBs exec'd 0 ====
+
+ 0xFECB820: 80BE1DC8 lwz r5,7624(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1DC8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFECB824: 2C050000 cmpi cr0,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFECB828: 41820168 bc 12,2,0xFECB990
+ 9: Js02o $0xFECB990
+
+
+
+. 2992 FECB820 12
+. 80 BE 1D C8 2C 05 00 00 41 82 01 68
+==== BB 2993 (0xFECB82C) approx BBs exec'd 0 ====
+
+ 0xFECB82C: 80630060 lwz r3,96(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECB830: 2C830000 cmpi cr1,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFECB834: 4086000C bc 4,6,0xFECB840
+ 9: Jc06o $0xFECB840
+
+
+
+. 2993 FECB82C 12
+. 80 63 00 60 2C 83 00 00 40 86 00 0C
+==== BB 2994 (0xFECB838) approx BBs exec'd 0 ====
+
+ 0xFECB838: 3860FFFF li r3,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFECB83C: 907F0060 stw r3,96(r31)
+ 3: GETL R3, t2
+ 4: GETL R31, t4
+ 5: ADDL $0x60, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFECB840: 2F03FFFF cmpi cr6,r3,-1
+ 8: GETL R3, t6
+ 9: MOVL $0xFFFFFFFF, t10
+ 10: CMPL t6, t10, t8 (-rSo)
+ 11: ICRFL t8, $0x6, CR
+ 12: INCEIPL $4
+
+ 0xFECB844: 3860FFFF li r3,-1
+ 13: MOVL $0xFFFFFFFF, t12
+ 14: PUTL t12, R3
+ 15: INCEIPL $4
+
+ 0xFECB848: 409A00D0 bc 4,26,0xFECB918
+ 16: Jc26o $0xFECB918
+
+
+
+. 2994 FECB838 20
+. 38 60 FF FF 90 7F 00 60 2F 03 FF FF 38 60 FF FF 40 9A 00 D0
+==== BB 2995 (0xFECB84C) approx BBs exec'd 0 ====
+
+ 0xFECB84C: 807F0060 lwz r3,96(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECB850: 2F830000 cmpi cr7,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFECB854: 419E007C bc 12,30,0xFECB8D0
+ 9: Js30o $0xFECB8D0
+
+
+
+. 2995 FECB84C 12
+. 80 7F 00 60 2F 83 00 00 41 9E 00 7C
+==== BB 2996 (0xFECB858) approx BBs exec'd 0 ====
+
+ 0xFECB858: 811F0000 lwz r8,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0xFECB85C: 71090800 andi. r9,r8,0x800
+ 4: GETL R8, t4
+ 5: ANDL $0x800, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECB860: 40820090 bc 4,2,0xFECB8F0
+ 10: Jc02o $0xFECB8F0
+
+
+
+. 2996 FECB858 12
+. 81 1F 00 00 71 09 08 00 40 82 00 90
+==== BB 2997 (0xFECB864) approx BBs exec'd 0 ====
+
+ 0xFECB864: 807F0004 lwz r3,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECB868: 809F0008 lwz r4,8(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFECB86C: 7F032040 cmpl cr6,r3,r4
+ 10: GETL R3, t8
+ 11: GETL R4, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x6, CR
+ 14: INCEIPL $4
+
+ 0xFECB870: 419800A4 bc 12,24,0xFECB914
+ 15: Js24o $0xFECB914
+
+
+
+. 2997 FECB864 16
+. 80 7F 00 04 80 9F 00 08 7F 03 20 40 41 98 00 A4
+==== BB 2998 (0xFECB874) approx BBs exec'd 0 ====
+
+ 0xFECB874: 815F0000 lwz r10,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFECB878: 71490100 andi. r9,r10,0x100
+ 4: GETL R10, t4
+ 5: ANDL $0x100, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECB87C: 408200C0 bc 4,2,0xFECB93C
+ 10: Jc02o $0xFECB93C
+
+
+
+. 2998 FECB874 12
+. 81 5F 00 00 71 49 01 00 40 82 00 C0
+==== BB 2999 (0xFECB880) approx BBs exec'd 0 ====
+
+ 0xFECB880: 813F0030 lwz r9,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFECB884: 2C890000 cmpi cr1,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFECB888: 408600D0 bc 4,6,0xFECB958
+ 9: Jc06o $0xFECB958
+
+
+
+. 2999 FECB880 12
+. 81 3F 00 30 2C 89 00 00 40 86 00 D0
+==== BB 3000 (0xFECB88C) approx BBs exec'd 0 ====
+
+ 0xFECB88C: 817F0024 lwz r11,36(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFECB890: 2C0B0000 cmpi cr0,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFECB894: 4082009C bc 4,2,0xFECB930
+ 9: Jc02o $0xFECB930
+
+
+
+. 3000 FECB88C 12
+. 81 7F 00 24 2C 0B 00 00 40 82 00 9C
+==== BB 3001 (0xFECB898) approx BBs exec'd 0 ====
+
+ 0xFECB898: 88BF0046 lbz r5,70(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFECB89C: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFECB8A0: 7CA00774 extsb r0,r5
+ 8: GETB R5, t6
+ 9: WIDENL_Bs _st6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0xFECB8A4: 7C80FA14 add r4,r0,r31
+ 12: GETL R0, t8
+ 13: GETL R31, t10
+ 14: ADDL t8, t10
+ 15: PUTL t10, R4
+ 16: INCEIPL $4
+
+ 0xFECB8A8: 83E40098 lwz r31,152(r4)
+ 17: GETL R4, t12
+ 18: ADDL $0x98, t12
+ 19: LDL (t12), t14
+ 20: PUTL t14, R31
+ 21: INCEIPL $4
+
+ 0xFECB8AC: 819F0010 lwz r12,16(r31)
+ 22: GETL R31, t16
+ 23: ADDL $0x10, t16
+ 24: LDL (t16), t18
+ 25: PUTL t18, R12
+ 26: INCEIPL $4
+
+ 0xFECB8B0: 7D8903A6 mtctr r12
+ 27: GETL R12, t20
+ 28: PUTL t20, CTR
+ 29: INCEIPL $4
+
+ 0xFECB8B4: 4E800421 bctrl
+ 30: MOVL $0xFECB8B8, t22
+ 31: PUTL t22, LR
+ 32: GETL CTR, t24
+ 33: JMPo-c t24 ($4)
+
+
+
+. 3001 FECB898 32
+. 88 BF 00 46 7F E3 FB 78 7C A0 07 74 7C 80 FA 14 83 E4 00 98 81 9F 00 10 7D 89 03 A6 4E 80 04 21
+==== BB 3002 (0xFECB8B8) approx BBs exec'd 0 ====
+
+ 0xFECB8B8: 80C10014 lwz r6,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFECB8BC: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFECB8C0: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xFECB8C4: 7CC803A6 mtlr r6
+ 15: GETL R6, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFECB8C8: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xFECB8CC: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 3002 FECB8B8 24
+. 80 C1 00 14 83 C1 00 08 83 E1 00 0C 7C C8 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3003 (0xFECAB2C) approx BBs exec'd 0 ====
+
+ 0xFECAB2C: 2F03FFFF cmpi cr6,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFECAB30: 41BAFF80 bc 13,26,0xFECAAB0
+ 5: Js26o $0xFECAAB0
+
+
+
+. 3003 FECAB2C 8
+. 2F 03 FF FF 41 BA FF 80
+==== BB 3004 (0xFECAB34) approx BBs exec'd 0 ====
+
+ 0xFECAB34: 2F9C0000 cmpi cr7,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFECAB38: 4BFFFF74 b 0xFECAAAC
+ 4: JMPo $0xFECAAAC ($4)
+
+
+
+. 3004 FECAB34 8
+. 2F 9C 00 00 4B FF FF 74
+==== BB 3005 (0xFECAAAC) approx BBs exec'd 0 ====
+
+ 0xFECAAAC: 409EFF1C bc 4,30,0xFECA9C8
+ 0: Jc30o $0xFECA9C8
+
+
+
+. 3005 FECAAAC 4
+. 40 9E FF 1C
+==== BB 3006 (0xFECAB58) approx BBs exec'd 0 ====
+
+ 0xFECAB58: 7F85E378 or r5,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFECAB5C: 7F63DB78 or r3,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFECAB60: 4800DB79 bl 0xFED86D8
+ 6: MOVL $0xFECAB64, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 3006 FECAB58 12
+. 7F 85 E3 78 7F 63 DB 78 48 00 DB 79
+==== BB 3007 (0xFECAB64) approx BBs exec'd 0 ====
+
+ 0xFECAB64: 811D0004 lwz r8,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFECAB68: 7CE8E214 add r7,r8,r28
+ 5: GETL R8, t4
+ 6: GETL R28, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0xFECAB6C: 3B800000 li r28,0
+ 10: MOVL $0x0, t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0xFECAB70: 90FD0004 stw r7,4(r29)
+ 13: GETL R7, t10
+ 14: GETL R29, t12
+ 15: ADDL $0x4, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFECAB74: 4BFFFF3C b 0xFECAAB0
+ 18: JMPo $0xFECAAB0 ($4)
+
+
+
+. 3007 FECAB64 20
+. 81 1D 00 04 7C E8 E2 14 3B 80 00 00 90 FD 00 04 4B FF FF 3C
+==== BB 3008 (0xFECAAB0) approx BBs exec'd 0 ====
+
+ 0xFECAAB0: 7C7CD050 subf r3,r28,r26
+ 0: GETL R28, t0
+ 1: GETL R26, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECAAB4: 83410024 lwz r26,36(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x24, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0xFECAAB8: 8361000C lwz r27,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R27
+ 14: INCEIPL $4
+
+ 0xFECAABC: 7F4803A6 mtlr r26
+ 15: GETL R26, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFECAAC0: 83810010 lwz r28,16(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R28
+ 22: INCEIPL $4
+
+ 0xFECAAC4: 83410008 lwz r26,8(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x8, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R26
+ 27: INCEIPL $4
+
+ 0xFECAAC8: 83A10014 lwz r29,20(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x14, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R29
+ 32: INCEIPL $4
+
+ 0xFECAACC: 83C10018 lwz r30,24(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x18, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R30
+ 37: INCEIPL $4
+
+ 0xFECAAD0: 83E1001C lwz r31,28(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x1C, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R31
+ 42: INCEIPL $4
+
+ 0xFECAAD4: 38210020 addi r1,r1,32
+ 43: GETL R1, t34
+ 44: ADDL $0x20, t34
+ 45: PUTL t34, R1
+ 46: INCEIPL $4
+
+ 0xFECAAD8: 4E800020 blr
+ 47: GETL LR, t36
+ 48: JMPo-r t36 ($4)
+
+
+
+. 3008 FECAAB0 44
+. 7C 7C D0 50 83 41 00 24 83 61 00 0C 7F 48 03 A6 83 81 00 10 83 41 00 08 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 3009 (0xFECBE98) approx BBs exec'd 0 ====
+
+ 0xFECBE98: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFECBE9C: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFECBEA0: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFECBEA4: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 3009 FECBE98 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 3010 (0xFEC7F40) approx BBs exec'd 0 ====
+
+ 0xFEC7F40: 7F9C1800 cmp cr7,r28,r3
+ 0: GETL R28, t0
+ 1: GETL R3, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFEC7F44: 7C601B78 or r0,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xFEC7F48: 7FE3FB78 or r3,r31,r31
+ 8: GETL R31, t8
+ 9: PUTL t8, R3
+ 10: INCEIPL $4
+
+ 0xFEC7F4C: 419E0008 bc 12,30,0xFEC7F54
+ 11: Js30o $0xFEC7F54
+
+
+
+. 3010 FEC7F40 16
+. 7F 9C 18 00 7C 60 1B 78 7F E3 FB 78 41 9E 00 08
+==== BB 3011 (0xFEC7F54) approx BBs exec'd 0 ====
+
+ 0xFEC7F54: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFEC7F58: 7C601B78 or r0,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFEC7F5C: 7C030378 or r3,r0,r0
+ 8: GETL R0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFEC7F60: 83810010 lwz r28,16(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x10, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R28
+ 15: INCEIPL $4
+
+ 0xFEC7F64: 83A10014 lwz r29,20(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x14, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R29
+ 20: INCEIPL $4
+
+ 0xFEC7F68: 7C8803A6 mtlr r4
+ 21: GETL R4, t16
+ 22: PUTL t16, LR
+ 23: INCEIPL $4
+
+ 0xFEC7F6C: 83C10018 lwz r30,24(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x18, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R30
+ 28: INCEIPL $4
+
+ 0xFEC7F70: 83E1001C lwz r31,28(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x1C, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R31
+ 33: INCEIPL $4
+
+ 0xFEC7F74: 38210020 addi r1,r1,32
+ 34: GETL R1, t26
+ 35: ADDL $0x20, t26
+ 36: PUTL t26, R1
+ 37: INCEIPL $4
+
+ 0xFEC7F78: 4E800020 blr
+ 38: GETL LR, t28
+ 39: JMPo-r t28 ($4)
+
+
+
+. 3011 FEC7F54 40
+. 80 81 00 24 7C 60 1B 78 7C 03 03 78 83 81 00 10 83 A1 00 14 7C 88 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 3012 (0xFEE8040) approx BBs exec'd 0 ====
+
+ 0xFEE8040: 2F030001 cmpi cr6,r3,1
+ 0: GETL R3, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFEE8044: 409A011C bc 4,26,0xFEE8160
+ 5: Jc26o $0xFEE8160
+
+
+
+. 3012 FEE8040 8
+. 2F 03 00 01 40 9A 01 1C
+==== BB 3013 (0xFEE8048) approx BBs exec'd 0 ====
+
+ 0xFEE8048: 815F0030 lwz r10,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFEE804C: 811F0034 lwz r8,52(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x34, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0xFEE8050: 1F0A0005 mulli r24,r10,5
+ 10: GETL R10, t8
+ 11: MULL $0x5, t8
+ 12: PUTL t8, R24
+ 13: INCEIPL $4
+
+ 0xFEE8054: 82BF0038 lwz r21,56(r31)
+ 14: GETL R31, t10
+ 15: ADDL $0x38, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R21
+ 18: INCEIPL $4
+
+ 0xFEE8058: 55111838 rlwinm r17,r8,3,0,28
+ 19: GETL R8, t14
+ 20: SHLL $0x3, t14
+ 21: PUTL t14, R17
+ 22: INCEIPL $4
+
+ 0xFEE805C: 817F002C lwz r11,44(r31)
+ 23: GETL R31, t16
+ 24: ADDL $0x2C, t16
+ 25: LDL (t16), t18
+ 26: PUTL t18, R11
+ 27: INCEIPL $4
+
+ 0xFEE8060: 3A580003 addi r18,r24,3
+ 28: GETL R24, t20
+ 29: ADDL $0x3, t20
+ 30: PUTL t20, R18
+ 31: INCEIPL $4
+
+ 0xFEE8064: 7E11AA14 add r16,r17,r21
+ 32: GETL R17, t22
+ 33: GETL R21, t24
+ 34: ADDL t22, t24
+ 35: PUTL t24, R16
+ 36: INCEIPL $4
+
+ 0xFEE8068: 565C003A rlwinm r28,r18,0,0,29
+ 37: GETL R18, t26
+ 38: ANDL $0xFFFFFFFC, t26
+ 39: PUTL t26, R28
+ 40: INCEIPL $4
+
+ 0xFEE806C: 831E08DC lwz r24,2268(r30)
+ 41: GETL R30, t28
+ 42: ADDL $0x8DC, t28
+ 43: LDL (t28), t30
+ 44: PUTL t30, R24
+ 45: INCEIPL $4
+
+ 0xFEE8070: 7DFC8214 add r15,r28,r16
+ 46: GETL R28, t32
+ 47: GETL R16, t34
+ 48: ADDL t32, t34
+ 49: PUTL t34, R15
+ 50: INCEIPL $4
+
+ 0xFEE8074: 825E08E0 lwz r18,2272(r30)
+ 51: GETL R30, t36
+ 52: ADDL $0x8E0, t36
+ 53: LDL (t36), t38
+ 54: PUTL t38, R18
+ 55: INCEIPL $4
+
+ 0xFEE8078: 821E08E4 lwz r16,2276(r30)
+ 56: GETL R30, t40
+ 57: ADDL $0x8E4, t40
+ 58: LDL (t40), t42
+ 59: PUTL t42, R16
+ 60: INCEIPL $4
+
+ 0xFEE807C: 39CF0003 addi r14,r15,3
+ 61: GETL R15, t44
+ 62: ADDL $0x3, t44
+ 63: PUTL t44, R14
+ 64: INCEIPL $4
+
+ 0xFEE8080: 91180000 stw r8,0(r24)
+ 65: GETL R8, t46
+ 66: GETL R24, t48
+ 67: STL t46, (t48)
+ 68: INCEIPL $4
+
+ 0xFEE8084: 556C1838 rlwinm r12,r11,3,0,28
+ 69: GETL R11, t50
+ 70: SHLL $0x3, t50
+ 71: PUTL t50, R12
+ 72: INCEIPL $4
+
+ 0xFEE8088: 91500000 stw r10,0(r16)
+ 73: GETL R10, t52
+ 74: GETL R16, t54
+ 75: STL t52, (t54)
+ 76: INCEIPL $4
+
+ 0xFEE808C: 55DA003A rlwinm r26,r14,0,0,29
+ 77: GETL R14, t56
+ 78: ANDL $0xFFFFFFFC, t56
+ 79: PUTL t56, R26
+ 80: INCEIPL $4
+
+ 0xFEE8090: 91720000 stw r11,0(r18)
+ 81: GETL R11, t58
+ 82: GETL R18, t60
+ 83: STL t58, (t60)
+ 84: INCEIPL $4
+
+ 0xFEE8094: 7C7A6214 add r3,r26,r12
+ 85: GETL R26, t62
+ 86: GETL R12, t64
+ 87: ADDL t62, t64
+ 88: PUTL t64, R3
+ 89: INCEIPL $4
+
+ 0xFEE8098: 80FF0028 lwz r7,40(r31)
+ 90: GETL R31, t66
+ 91: ADDL $0x28, t66
+ 92: LDL (t66), t68
+ 93: PUTL t68, R7
+ 94: INCEIPL $4
+
+ 0xFEE809C: 7C63BA14 add r3,r3,r23
+ 95: GETL R3, t70
+ 96: GETL R23, t72
+ 97: ADDL t70, t72
+ 98: PUTL t72, R3
+ 99: INCEIPL $4
+
+ 0xFEE80A0: 809F0024 lwz r4,36(r31)
+ 100: GETL R31, t74
+ 101: ADDL $0x24, t74
+ 102: LDL (t74), t76
+ 103: PUTL t76, R4
+ 104: INCEIPL $4
+
+ 0xFEE80A4: 90FF00B8 stw r7,184(r31)
+ 105: GETL R7, t78
+ 106: GETL R31, t80
+ 107: ADDL $0xB8, t80
+ 108: STL t78, (t80)
+ 109: INCEIPL $4
+
+ 0xFEE80A8: 909F00BC stw r4,188(r31)
+ 110: GETL R4, t82
+ 111: GETL R31, t84
+ 112: ADDL $0xBC, t84
+ 113: STL t82, (t84)
+ 114: INCEIPL $4
+
+ 0xFEE80AC: 480C225D bl 0xFFAA308
+ 115: MOVL $0xFEE80B0, t86
+ 116: PUTL t86, LR
+ 117: JMPo-c $0xFFAA308 ($4)
+
+
+
+. 3013 FEE8048 104
+. 81 5F 00 30 81 1F 00 34 1F 0A 00 05 82 BF 00 38 55 11 18 38 81 7F 00 2C 3A 58 00 03 7E 11 AA 14 56 5C 00 3A 83 1E 08 DC 7D FC 82 14 82 5E 08 E0 82 1E 08 E4 39 CF 00 03 91 18 00 00 55 6C 18 38 91 50 00 00 55 DA 00 3A 91 72 00 00 7C 7A 62 14 80 FF 00 28 7C 63 BA 14 80 9F 00 24 90 FF 00 B8 90 9F 00 BC 48 0C 22 5D
+==== BB 3014 (0xFEE80B0) approx BBs exec'd 0 ====
+
+ 0xFEE80B0: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFEE80B4: 90730000 stw r3,0(r19)
+ 4: GETL R3, t4
+ 5: GETL R19, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0xFEE80B8: 419E00A8 bc 12,30,0xFEE8160
+ 8: Js30o $0xFEE8160
+
+
+
+. 3014 FEE80B0 12
+. 2F 83 00 00 90 73 00 00 41 9E 00 A8
+==== BB 3015 (0xFEE80BC) approx BBs exec'd 0 ====
+
+ 0xFEE80BC: 2C970000 cmpi cr1,r23,0
+ 0: GETL R23, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFEE80C0: 83B00000 lwz r29,0(r16)
+ 4: GETL R16, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R29
+ 7: INCEIPL $4
+
+ 0xFEE80C4: 82F80000 lwz r23,0(r24)
+ 8: GETL R24, t8
+ 9: LDL (t8), t10
+ 10: PUTL t10, R23
+ 11: INCEIPL $4
+
+ 0xFEE80C8: 7F23E214 add r25,r3,r28
+ 12: GETL R3, t12
+ 13: GETL R28, t14
+ 14: ADDL t12, t14
+ 15: PUTL t14, R25
+ 16: INCEIPL $4
+
+ 0xFEE80CC: 81DE08E8 lwz r14,2280(r30)
+ 17: GETL R30, t16
+ 18: ADDL $0x8E8, t16
+ 19: LDL (t16), t18
+ 20: PUTL t18, R14
+ 21: INCEIPL $4
+
+ 0xFEE80D0: 57A0103A rlwinm r0,r29,2,0,29
+ 22: GETL R29, t20
+ 23: SHLL $0x2, t20
+ 24: PUTL t20, R0
+ 25: INCEIPL $4
+
+ 0xFEE80D4: 56E91838 rlwinm r9,r23,3,0,28
+ 26: GETL R23, t22
+ 27: SHLL $0x3, t22
+ 28: PUTL t22, R9
+ 29: INCEIPL $4
+
+ 0xFEE80D8: 81FE08EC lwz r15,2284(r30)
+ 30: GETL R30, t24
+ 31: ADDL $0x8EC, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R15
+ 34: INCEIPL $4
+
+ 0xFEE80DC: 82FE08F0 lwz r23,2288(r30)
+ 35: GETL R30, t28
+ 36: ADDL $0x8F0, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R23
+ 39: INCEIPL $4
+
+ 0xFEE80E0: 7D43D214 add r10,r3,r26
+ 40: GETL R3, t32
+ 41: GETL R26, t34
+ 42: ADDL t32, t34
+ 43: PUTL t34, R10
+ 44: INCEIPL $4
+
+ 0xFEE80E4: 823E08F4 lwz r17,2292(r30)
+ 45: GETL R30, t36
+ 46: ADDL $0x8F4, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R17
+ 49: INCEIPL $4
+
+ 0xFEE80E8: 7CC9CA14 add r6,r9,r25
+ 50: GETL R9, t40
+ 51: GETL R25, t42
+ 52: ADDL t40, t42
+ 53: PUTL t42, R6
+ 54: INCEIPL $4
+
+ 0xFEE80EC: 7F401A14 add r26,r0,r3
+ 55: GETL R0, t44
+ 56: GETL R3, t46
+ 57: ADDL t44, t46
+ 58: PUTL t46, R26
+ 59: INCEIPL $4
+
+ 0xFEE80F0: 90CF0000 stw r6,0(r15)
+ 60: GETL R6, t48
+ 61: GETL R15, t50
+ 62: STL t48, (t50)
+ 63: INCEIPL $4
+
+ 0xFEE80F4: 934E0000 stw r26,0(r14)
+ 64: GETL R26, t52
+ 65: GETL R14, t54
+ 66: STL t52, (t54)
+ 67: INCEIPL $4
+
+ 0xFEE80F8: 93370000 stw r25,0(r23)
+ 68: GETL R25, t56
+ 69: GETL R23, t58
+ 70: STL t56, (t58)
+ 71: INCEIPL $4
+
+ 0xFEE80FC: 91510000 stw r10,0(r17)
+ 72: GETL R10, t60
+ 73: GETL R17, t62
+ 74: STL t60, (t62)
+ 75: INCEIPL $4
+
+ 0xFEE8100: 408600DC bc 4,6,0xFEE81DC
+ 76: Jc06o $0xFEE81DC
+
+
+
+. 3015 FEE80BC 72
+. 2C 97 00 00 83 B0 00 00 82 F8 00 00 7F 23 E2 14 81 DE 08 E8 57 A0 10 3A 56 E9 18 38 81 FE 08 EC 82 FE 08 F0 7D 43 D2 14 82 3E 08 F4 7C C9 CA 14 7F 40 1A 14 90 CF 00 00 93 4E 00 00 93 37 00 00 91 51 00 00 40 86 00 DC
+==== BB 3016 (0xFEE8104) approx BBs exec'd 0 ====
+
+ 0xFEE8104: 1EDD0005 mulli r22,r29,5
+ 0: GETL R29, t0
+ 1: MULL $0x5, t0
+ 2: PUTL t0, R22
+ 3: INCEIPL $4
+
+ 0xFEE8108: 80F00000 lwz r7,0(r16)
+ 4: GETL R16, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0xFEE810C: 38800001 li r4,1
+ 8: MOVL $0x1, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0xFEE8110: 1CA70005 mulli r5,r7,5
+ 11: GETL R7, t8
+ 12: MULL $0x5, t8
+ 13: PUTL t8, R5
+ 14: INCEIPL $4
+
+ 0xFEE8114: 80730000 lwz r3,0(r19)
+ 15: GETL R19, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R3
+ 18: INCEIPL $4
+
+ 0xFEE8118: 7F66DB78 or r6,r27,r27
+ 19: GETL R27, t14
+ 20: PUTL t14, R6
+ 21: INCEIPL $4
+
+ 0xFEE811C: 4BFDFDC1 bl 0xFEC7EDC
+ 22: MOVL $0xFEE8120, t16
+ 23: PUTL t16, LR
+ 24: JMPo-c $0xFEC7EDC ($4)
+
+
+
+. 3016 FEE8104 28
+. 1E DD 00 05 80 F0 00 00 38 80 00 01 1C A7 00 05 80 73 00 00 7F 66 DB 78 4B FD FD C1
+==== BB 3017 (0xFEE8120) approx BBs exec'd 0 ====
+
+ 0xFEE8120: 7C03B000 cmp cr0,r3,r22
+ 0: GETL R3, t0
+ 1: GETL R22, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFEE8124: 4082003C bc 4,2,0xFEE8160
+ 5: Jc02o $0xFEE8160
+
+
+
+. 3017 FEE8120 8
+. 7C 03 B0 00 40 82 00 3C
+==== BB 3018 (0xFEE8128) approx BBs exec'd 0 ====
+
+ 0xFEE8128: 80100000 lwz r0,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEE812C: 39200000 li r9,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R9
+ 6: INCEIPL $4
+
+ 0xFEE8130: 7F090040 cmpl cr6,r9,r0
+ 7: GETL R9, t6
+ 8: GETL R0, t8
+ 9: CMPUL t6, t8, t10 (-rSo)
+ 10: ICRFL t10, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFEE8134: 409800C8 bc 4,24,0xFEE81FC
+ 12: Jc24o $0xFEE81FC
+
+
+
+. 3018 FEE8128 16
+. 80 10 00 00 39 20 00 00 7F 09 00 40 40 98 00 C8
+==== BB 3019 (0xFEE8138) approx BBs exec'd 0 ====
+
+ 0xFEE8138: 810E0000 lwz r8,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0xFEE813C: 7C0B0378 or r11,r0,r0
+ 4: GETL R0, t4
+ 5: PUTL t4, R11
+ 6: INCEIPL $4
+
+ 0xFEE8140: 81580000 lwz r10,0(r24)
+ 7: GETL R24, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R10
+ 10: INCEIPL $4
+
+ 0xFEE8144: 48000008 b 0xFEE814C
+ 11: JMPo $0xFEE814C ($4)
+
+
+
+. 3019 FEE8138 16
+. 81 0E 00 00 7C 0B 03 78 81 58 00 00 48 00 00 08
+==== BB 3020 (0xFEE814C) approx BBs exec'd 0 ====
+
+ 0xFEE814C: 7FA848AE lbzx r29,r8,r9
+ 0: GETL R9, t0
+ 1: GETL R8, t2
+ 2: ADDL t2, t0
+ 3: LDB (t0), t4
+ 4: PUTL t4, R29
+ 5: INCEIPL $4
+
+ 0xFEE8150: 39290001 addi r9,r9,1
+ 6: GETL R9, t6
+ 7: ADDL $0x1, t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFEE8154: 7F095840 cmpl cr6,r9,r11
+ 10: GETL R9, t8
+ 11: GETL R11, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x6, CR
+ 14: INCEIPL $4
+
+ 0xFEE8158: 7F9D5040 cmpl cr7,r29,r10
+ 15: GETL R29, t14
+ 16: GETL R10, t16
+ 17: CMPUL t14, t16, t18 (-rSo)
+ 18: ICRFL t18, $0x7, CR
+ 19: INCEIPL $4
+
+ 0xFEE815C: 419CFFEC bc 12,28,0xFEE8148
+ 20: Js28o $0xFEE8148
+
+
+
+. 3020 FEE814C 20
+. 7F A8 48 AE 39 29 00 01 7F 09 58 40 7F 9D 50 40 41 9C FF EC
+==== BB 3021 (0xFEE8148) approx BBs exec'd 0 ====
+
+ 0xFEE8148: 409800B4 bc 4,24,0xFEE81FC
+ 0: Jc24o $0xFEE81FC
+
+
+
+. 3021 FEE8148 4
+. 40 98 00 B4
+==== BB 3022 (0xFEE81FC) approx BBs exec'd 0 ====
+
+ 0xFEE81FC: 81780000 lwz r11,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFEE8200: 3B400000 li r26,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R26
+ 6: INCEIPL $4
+
+ 0xFEE8204: 7C9A5840 cmpl cr1,r26,r11
+ 7: GETL R26, t6
+ 8: GETL R11, t8
+ 9: CMPUL t6, t8, t10 (-rSo)
+ 10: ICRFL t10, $0x1, CR
+ 11: INCEIPL $4
+
+ 0xFEE8208: 408400D0 bc 4,4,0xFEE82D8
+ 12: Jc04o $0xFEE82D8
+
+
+
+. 3022 FEE81FC 16
+. 81 78 00 00 3B 40 00 00 7C 9A 58 40 40 84 00 D0
+==== BB 3023 (0xFEE820C) approx BBs exec'd 0 ====
+
+ 0xFEE820C: 3B3F00B0 addi r25,r31,176
+ 0: GETL R31, t0
+ 1: ADDL $0xB0, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0xFEE8210: 7F3CCB78 or r28,r25,r25
+ 4: GETL R25, t2
+ 5: PUTL t2, R28
+ 6: INCEIPL $4
+
+ 0xFEE8214: 3BA00004 li r29,4
+ 7: MOVL $0x4, t4
+ 8: PUTL t4, R29
+ 9: INCEIPL $4
+
+ 0xFEE8218: 813B0004 lwz r9,4(r27)
+ 10: GETL R27, t6
+ 11: ADDL $0x4, t6
+ 12: LDL (t6), t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0xFEE821C: 7F63DB78 or r3,r27,r27
+ 15: GETL R27, t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0xFEE8220: 811B0008 lwz r8,8(r27)
+ 18: GETL R27, t12
+ 19: ADDL $0x8, t12
+ 20: LDL (t12), t14
+ 21: PUTL t14, R8
+ 22: INCEIPL $4
+
+ 0xFEE8224: 38090001 addi r0,r9,1
+ 23: GETL R9, t16
+ 24: ADDL $0x1, t16
+ 25: PUTL t16, R0
+ 26: INCEIPL $4
+
+ 0xFEE8228: 7C094040 cmpl cr0,r9,r8
+ 27: GETL R9, t18
+ 28: GETL R8, t20
+ 29: CMPUL t18, t20, t22 (-rSo)
+ 30: ICRFL t22, $0x0, CR
+ 31: INCEIPL $4
+
+ 0xFEE822C: 408002E0 bc 4,0,0xFEE850C
+ 32: Jc00o $0xFEE850C
+
+
+
+. 3023 FEE820C 36
+. 3B 3F 00 B0 7F 3C CB 78 3B A0 00 04 81 3B 00 04 7F 63 DB 78 81 1B 00 08 38 09 00 01 7C 09 40 40 40 80 02 E0
+==== BB 3024 (0xFEE8230) approx BBs exec'd 0 ====
+
+ 0xFEE8230: 88690000 lbz r3,0(r9)
+ 0: GETL R9, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEE8234: 901B0004 stw r0,4(r27)
+ 4: GETL R0, t4
+ 5: GETL R27, t6
+ 6: ADDL $0x4, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFEE8238: 2F03FFFF cmpi cr6,r3,-1
+ 9: GETL R3, t8
+ 10: MOVL $0xFFFFFFFF, t12
+ 11: CMPL t8, t12, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFEE823C: 419A0014 bc 12,26,0xFEE8250
+ 14: Js26o $0xFEE8250
+
+
+
+. 3024 FEE8230 16
+. 88 69 00 00 90 1B 00 04 2F 03 FF FF 41 9A 00 14
+==== BB 3025 (0xFEE8240) approx BBs exec'd 0 ====
+
+ 0xFEE8240: 37BDFFFF addic. r29,r29,-1
+ 0: GETL R29, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R29
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEE8244: 987C0000 stb r3,0(r28)
+ 6: GETL R3, t4
+ 7: GETL R28, t6
+ 8: STB t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFEE8248: 3B9C0001 addi r28,r28,1
+ 10: GETL R28, t8
+ 11: ADDL $0x1, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0xFEE824C: 4082FFCC bc 4,2,0xFEE8218
+ 14: Jc02o $0xFEE8218
+
+
+
+. 3025 FEE8240 16
+. 37 BD FF FF 98 7C 00 00 3B 9C 00 01 40 82 FF CC
+==== BB 3026 (0xFEE8218) approx BBs exec'd 0 ====
+
+ 0xFEE8218: 813B0004 lwz r9,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEE821C: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE8220: 811B0008 lwz r8,8(r27)
+ 8: GETL R27, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R8
+ 12: INCEIPL $4
+
+ 0xFEE8224: 38090001 addi r0,r9,1
+ 13: GETL R9, t10
+ 14: ADDL $0x1, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xFEE8228: 7C094040 cmpl cr0,r9,r8
+ 17: GETL R9, t12
+ 18: GETL R8, t14
+ 19: CMPUL t12, t14, t16 (-rSo)
+ 20: ICRFL t16, $0x0, CR
+ 21: INCEIPL $4
+
+ 0xFEE822C: 408002E0 bc 4,0,0xFEE850C
+ 22: Jc00o $0xFEE850C
+
+
+
+. 3026 FEE8218 24
+. 81 3B 00 04 7F 63 DB 78 81 1B 00 08 38 09 00 01 7C 09 40 40 40 80 02 E0
+==== BB 3027 (0xFEE8250) approx BBs exec'd 0 ====
+
+ 0xFEE8250: 2F9D0000 cmpi cr7,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFEE8254: 40BEFF0C bc 5,30,0xFEE8160
+ 4: Jc30o $0xFEE8160
+
+
+
+. 3027 FEE8250 8
+. 2F 9D 00 00 40 BE FF 0C
+==== BB 3028 (0xFEE8258) approx BBs exec'd 0 ====
+
+ 0xFEE8258: 807B0004 lwz r3,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEE825C: 815B0008 lwz r10,8(r27)
+ 5: GETL R27, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0xFEE8260: 7C835040 cmpl cr1,r3,r10
+ 10: GETL R3, t8
+ 11: GETL R10, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0xFEE8264: 408402C0 bc 4,4,0xFEE8524
+ 15: Jc04o $0xFEE8524
+
+
+
+. 3028 FEE8258 16
+. 80 7B 00 04 81 5B 00 08 7C 83 50 40 40 84 02 C0
+==== BB 3029 (0xFEE8268) approx BBs exec'd 0 ====
+
+ 0xFEE8268: 39830001 addi r12,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0xFEE826C: 88630000 lbz r3,0(r3)
+ 4: GETL R3, t2
+ 5: LDB (t2), t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE8270: 919B0004 stw r12,4(r27)
+ 8: GETL R12, t6
+ 9: GETL R27, t8
+ 10: ADDL $0x4, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEE8274: 2B030001 cmpli cr6,r3,1
+ 13: GETL R3, t10
+ 14: MOVL $0x1, t14
+ 15: CMPUL t10, t14, t12 (-rSo)
+ 16: ICRFL t12, $0x6, CR
+ 17: INCEIPL $4
+
+ 0xFEE8278: 41B9FEE8 bc 13,25,0xFEE8160
+ 18: Js25o $0xFEE8160
+
+
+
+. 3029 FEE8268 20
+. 39 83 00 01 88 63 00 00 91 9B 00 04 2B 03 00 01 41 B9 FE E8
+==== BB 3030 (0xFEE827C) approx BBs exec'd 0 ====
+
+ 0xFEE827C: 80170000 lwz r0,0(r23)
+ 0: GETL R23, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEE8280: 575D1838 rlwinm r29,r26,3,0,28
+ 4: GETL R26, t4
+ 5: SHLL $0x3, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFEE8284: 7D3D0214 add r9,r29,r0
+ 8: GETL R29, t6
+ 9: GETL R0, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0xFEE8288: 98690004 stb r3,4(r9)
+ 13: GETL R3, t10
+ 14: GETL R9, t12
+ 15: ADDL $0x4, t12
+ 16: STB t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEE828C: 807B0004 lwz r3,4(r27)
+ 18: GETL R27, t14
+ 19: ADDL $0x4, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R3
+ 22: INCEIPL $4
+
+ 0xFEE8290: 80DB0008 lwz r6,8(r27)
+ 23: GETL R27, t18
+ 24: ADDL $0x8, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R6
+ 27: INCEIPL $4
+
+ 0xFEE8294: 7C033040 cmpl cr0,r3,r6
+ 28: GETL R3, t22
+ 29: GETL R6, t24
+ 30: CMPUL t22, t24, t26 (-rSo)
+ 31: ICRFL t26, $0x0, CR
+ 32: INCEIPL $4
+
+ 0xFEE8298: 40800298 bc 4,0,0xFEE8530
+ 33: Jc00o $0xFEE8530
+
+
+
+. 3030 FEE827C 32
+. 80 17 00 00 57 5D 18 38 7D 3D 02 14 98 69 00 04 80 7B 00 04 80 DB 00 08 7C 03 30 40 40 80 02 98
+==== BB 3031 (0xFEE829C) approx BBs exec'd 0 ====
+
+ 0xFEE829C: 38A30001 addi r5,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0xFEE82A0: 88630000 lbz r3,0(r3)
+ 4: GETL R3, t2
+ 5: LDB (t2), t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE82A4: 90BB0004 stw r5,4(r27)
+ 8: GETL R5, t6
+ 9: GETL R27, t8
+ 10: ADDL $0x4, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEE82A8: 7F83A840 cmpl cr7,r3,r21
+ 13: GETL R3, t10
+ 14: GETL R21, t12
+ 15: CMPUL t10, t12, t14 (-rSo)
+ 16: ICRFL t14, $0x7, CR
+ 17: INCEIPL $4
+
+ 0xFEE82AC: 41BDFEB4 bc 13,29,0xFEE8160
+ 18: Js29o $0xFEE8160
+
+
+
+. 3031 FEE829C 20
+. 38 A3 00 01 88 63 00 00 90 BB 00 04 7F 83 A8 40 41 BD FE B4
+==== BB 3032 (0xFEE82B0) approx BBs exec'd 0 ====
+
+ 0xFEE82B0: 80F70000 lwz r7,0(r23)
+ 0: GETL R23, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0xFEE82B4: 3B5A0001 addi r26,r26,1
+ 4: GETL R26, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0xFEE82B8: 7EDD3A14 add r22,r29,r7
+ 8: GETL R29, t6
+ 9: GETL R7, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R22
+ 12: INCEIPL $4
+
+ 0xFEE82BC: 98760005 stb r3,5(r22)
+ 13: GETL R3, t10
+ 14: GETL R22, t12
+ 15: ADDL $0x5, t12
+ 16: STB t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEE82C0: 80980000 lwz r4,0(r24)
+ 18: GETL R24, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R4
+ 21: INCEIPL $4
+
+ 0xFEE82C4: 80770000 lwz r3,0(r23)
+ 22: GETL R23, t18
+ 23: LDL (t18), t20
+ 24: PUTL t20, R3
+ 25: INCEIPL $4
+
+ 0xFEE82C8: 7C9A2040 cmpl cr1,r26,r4
+ 26: GETL R26, t22
+ 27: GETL R4, t24
+ 28: CMPUL t22, t24, t26 (-rSo)
+ 29: ICRFL t26, $0x1, CR
+ 30: INCEIPL $4
+
+ 0xFEE82CC: 839F00B0 lwz r28,176(r31)
+ 31: GETL R31, t28
+ 32: ADDL $0xB0, t28
+ 33: LDL (t28), t30
+ 34: PUTL t30, R28
+ 35: INCEIPL $4
+
+ 0xFEE82D0: 7F9D192E stwx r28,r29,r3
+ 36: GETL R3, t32
+ 37: GETL R29, t34
+ 38: ADDL t34, t32
+ 39: GETL R28, t36
+ 40: STL t36, (t32)
+ 41: INCEIPL $4
+
+ 0xFEE82D4: 4184FF3C bc 12,4,0xFEE8210
+ 42: Js04o $0xFEE8210
+
+
+
+. 3032 FEE82B0 40
+. 80 F7 00 00 3B 5A 00 01 7E DD 3A 14 98 76 00 05 80 98 00 00 80 77 00 00 7C 9A 20 40 83 9F 00 B0 7F 9D 19 2E 41 84 FF 3C
+==== BB 3033 (0xFEE8210) approx BBs exec'd 0 ====
+
+ 0xFEE8210: 7F3CCB78 or r28,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0xFEE8214: 3BA00004 li r29,4
+ 3: MOVL $0x4, t2
+ 4: PUTL t2, R29
+ 5: INCEIPL $4
+
+ 0xFEE8218: 813B0004 lwz r9,4(r27)
+ 6: GETL R27, t4
+ 7: ADDL $0x4, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0xFEE821C: 7F63DB78 or r3,r27,r27
+ 11: GETL R27, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0xFEE8220: 811B0008 lwz r8,8(r27)
+ 14: GETL R27, t10
+ 15: ADDL $0x8, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R8
+ 18: INCEIPL $4
+
+ 0xFEE8224: 38090001 addi r0,r9,1
+ 19: GETL R9, t14
+ 20: ADDL $0x1, t14
+ 21: PUTL t14, R0
+ 22: INCEIPL $4
+
+ 0xFEE8228: 7C094040 cmpl cr0,r9,r8
+ 23: GETL R9, t16
+ 24: GETL R8, t18
+ 25: CMPUL t16, t18, t20 (-rSo)
+ 26: ICRFL t20, $0x0, CR
+ 27: INCEIPL $4
+
+ 0xFEE822C: 408002E0 bc 4,0,0xFEE850C
+ 28: Jc00o $0xFEE850C
+
+
+
+. 3033 FEE8210 32
+. 7F 3C CB 78 3B A0 00 04 81 3B 00 04 7F 63 DB 78 81 1B 00 08 38 09 00 01 7C 09 40 40 40 80 02 E0
+==== BB 3034 (0xFEE82D8) approx BBs exec'd 0 ====
+
+ 0xFEE82D8: 806F0000 lwz r3,0(r15)
+ 0: GETL R15, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEE82DC: 38800001 li r4,1
+ 4: MOVL $0x1, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0xFEE82E0: 7EA5AB78 or r5,r21,r21
+ 7: GETL R21, t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFEE82E4: 7F66DB78 or r6,r27,r27
+ 10: GETL R27, t8
+ 11: PUTL t8, R6
+ 12: INCEIPL $4
+
+ 0xFEE82E8: 4BFDFBF5 bl 0xFEC7EDC
+ 13: MOVL $0xFEE82EC, t10
+ 14: PUTL t10, LR
+ 15: JMPo-c $0xFEC7EDC ($4)
+
+
+
+. 3034 FEE82D8 20
+. 80 6F 00 00 38 80 00 01 7E A5 AB 78 7F 66 DB 78 4B FD FB F5
+==== BB 3035 (0xFEE82EC) approx BBs exec'd 0 ====
+
+ 0xFEE82EC: 7F03A800 cmp cr6,r3,r21
+ 0: GETL R3, t0
+ 1: GETL R21, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFEE82F0: 40BAFE70 bc 5,26,0xFEE8160
+ 5: Jc26o $0xFEE8160
+
+
+
+. 3035 FEE82EC 8
+. 7F 03 A8 00 40 BA FE 70
+==== BB 3036 (0xFEE82F4) approx BBs exec'd 0 ====
+
+ 0xFEE82F4: 83520000 lwz r26,0(r18)
+ 0: GETL R18, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R26
+ 3: INCEIPL $4
+
+ 0xFEE82F8: 3B200000 li r25,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R25
+ 6: INCEIPL $4
+
+ 0xFEE82FC: 7C19D040 cmpl cr0,r25,r26
+ 7: GETL R25, t6
+ 8: GETL R26, t8
+ 9: CMPUL t6, t8, t10 (-rSo)
+ 10: ICRFL t10, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFEE8300: 408000C8 bc 4,0,0xFEE83C8
+ 12: Jc00o $0xFEE83C8
+
+
+
+. 3036 FEE82F4 16
+. 83 52 00 00 3B 20 00 00 7C 19 D0 40 40 80 00 C8
+==== BB 3037 (0xFEE83C8) approx BBs exec'd 0 ====
+
+ 0xFEE83C8: 823F00B8 lwz r17,184(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xB8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R17
+ 4: INCEIPL $4
+
+ 0xFEE83CC: 3BA00000 li r29,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFEE83D0: 7C9D8840 cmpl cr1,r29,r17
+ 8: GETL R29, t6
+ 9: GETL R17, t8
+ 10: CMPUL t6, t8, t10 (-rSo)
+ 11: ICRFL t10, $0x1, CR
+ 12: INCEIPL $4
+
+ 0xFEE83D4: 40840054 bc 4,4,0xFEE8428
+ 13: Jc04o $0xFEE8428
+
+
+
+. 3037 FEE83C8 16
+. 82 3F 00 B8 3B A0 00 00 7C 9D 88 40 40 84 00 54
+==== BB 3038 (0xFEE83D8) approx BBs exec'd 0 ====
+
+ 0xFEE83D8: 813B0004 lwz r9,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEE83DC: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE83E0: 825B0008 lwz r18,8(r27)
+ 8: GETL R27, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R18
+ 12: INCEIPL $4
+
+ 0xFEE83E4: 38090001 addi r0,r9,1
+ 13: GETL R9, t10
+ 14: ADDL $0x1, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xFEE83E8: 7C099040 cmpl cr0,r9,r18
+ 17: GETL R9, t12
+ 18: GETL R18, t14
+ 19: CMPUL t12, t14, t16 (-rSo)
+ 20: ICRFL t16, $0x0, CR
+ 21: INCEIPL $4
+
+ 0xFEE83EC: 408002FC bc 4,0,0xFEE86E8
+ 22: Jc00o $0xFEE86E8
+
+
+
+. 3038 FEE83D8 24
+. 81 3B 00 04 7F 63 DB 78 82 5B 00 08 38 09 00 01 7C 09 90 40 40 80 02 FC
+==== BB 3039 (0xFEE83F0) approx BBs exec'd 0 ====
+
+ 0xFEE83F0: 88690000 lbz r3,0(r9)
+ 0: GETL R9, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEE83F4: 901B0004 stw r0,4(r27)
+ 4: GETL R0, t4
+ 5: GETL R27, t6
+ 6: ADDL $0x4, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFEE83F8: 2F83FFFF cmpi cr7,r3,-1
+ 9: GETL R3, t8
+ 10: MOVL $0xFFFFFFFF, t12
+ 11: CMPL t8, t12, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0xFEE83FC: 833F00B8 lwz r25,184(r31)
+ 14: GETL R31, t14
+ 15: ADDL $0xB8, t14
+ 16: LDL (t14), t16
+ 17: PUTL t16, R25
+ 18: INCEIPL $4
+
+ 0xFEE8400: 57A01838 rlwinm r0,r29,3,0,28
+ 19: GETL R29, t18
+ 20: SHLL $0x3, t18
+ 21: PUTL t18, R0
+ 22: INCEIPL $4
+
+ 0xFEE8404: 3BBD0001 addi r29,r29,1
+ 23: GETL R29, t20
+ 24: ADDL $0x1, t20
+ 25: PUTL t20, R29
+ 26: INCEIPL $4
+
+ 0xFEE8408: 3163FFFF addic r11,r3,-1
+ 27: GETL R3, t22
+ 28: ADCL $0xFFFFFFFF, t22 (-wCa)
+ 29: PUTL t22, R11
+ 30: INCEIPL $4
+
+ 0xFEE840C: 7CAB1910 subfe r5,r11,r3
+ 31: GETL R11, t24
+ 32: GETL R3, t26
+ 33: SBBL t24, t26 (-rCa-wCa)
+ 34: PUTL t26, R5
+ 35: INCEIPL $4
+
+ 0xFEE8410: 7F1DC840 cmpl cr6,r29,r25
+ 36: GETL R29, t28
+ 37: GETL R25, t30
+ 38: CMPUL t28, t30, t32 (-rSo)
+ 39: ICRFL t32, $0x6, CR
+ 40: INCEIPL $4
+
+ 0xFEE8414: 41BEFD4C bc 13,30,0xFEE8160
+ 41: Js30o $0xFEE8160
+
+
+
+. 3039 FEE83F0 40
+. 88 69 00 00 90 1B 00 04 2F 83 FF FF 83 3F 00 B8 57 A0 18 38 3B BD 00 01 31 63 FF FF 7C AB 19 10 7F 1D C8 40 41 BE FD 4C
+==== BB 3040 (0xFEE8418) approx BBs exec'd 0 ====
+
+ 0xFEE8418: 80970000 lwz r4,0(r23)
+ 0: GETL R23, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFEE841C: 7F802214 add r28,r0,r4
+ 4: GETL R0, t4
+ 5: GETL R4, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R28
+ 8: INCEIPL $4
+
+ 0xFEE8420: 98BC0006 stb r5,6(r28)
+ 9: GETL R5, t8
+ 10: GETL R28, t10
+ 11: ADDL $0x6, t10
+ 12: STB t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFEE8424: 4198FFB4 bc 12,24,0xFEE83D8
+ 14: Js24o $0xFEE83D8
+
+
+
+. 3040 FEE8418 16
+. 80 97 00 00 7F 80 22 14 98 BC 00 06 41 98 FF B4
+==== BB 3041 (0xFEE8428) approx BBs exec'd 0 ====
+
+ 0xFEE8428: 80780000 lwz r3,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEE842C: 7F0AC378 or r10,r24,r24
+ 4: GETL R24, t4
+ 5: PUTL t4, R10
+ 6: INCEIPL $4
+
+ 0xFEE8430: 7F1D1840 cmpl cr6,r29,r3
+ 7: GETL R29, t6
+ 8: GETL R3, t8
+ 9: CMPUL t6, t8, t10 (-rSo)
+ 10: ICRFL t10, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFEE8434: 40980028 bc 4,24,0xFEE845C
+ 12: Jc24o $0xFEE845C
+
+
+
+. 3041 FEE8428 16
+. 80 78 00 00 7F 0A C3 78 7F 1D 18 40 40 98 00 28
+==== BB 3042 (0xFEE845C) approx BBs exec'd 0 ====
+
+ 0xFEE845C: 817F00BC lwz r11,188(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xBC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFEE8460: 3BA00000 li r29,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFEE8464: 7C1D5840 cmpl cr0,r29,r11
+ 8: GETL R29, t6
+ 9: GETL R11, t8
+ 10: CMPUL t6, t8, t10 (-rSo)
+ 11: ICRFL t10, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFEE8468: 41A00040 bc 13,0,0xFEE84A8
+ 13: Js00o $0xFEE84A8
+
+
+
+. 3042 FEE845C 16
+. 81 7F 00 BC 3B A0 00 00 7C 1D 58 40 41 A0 00 40
+==== BB 3043 (0xFEE84A8) approx BBs exec'd 0 ====
+
+ 0xFEE84A8: 813B0004 lwz r9,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEE84AC: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE84B0: 815B0008 lwz r10,8(r27)
+ 8: GETL R27, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0xFEE84B4: 38090001 addi r0,r9,1
+ 13: GETL R9, t10
+ 14: ADDL $0x1, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xFEE84B8: 7F895040 cmpl cr7,r9,r10
+ 17: GETL R9, t12
+ 18: GETL R10, t14
+ 19: CMPUL t12, t14, t16 (-rSo)
+ 20: ICRFL t16, $0x7, CR
+ 21: INCEIPL $4
+
+ 0xFEE84BC: 419CFFB4 bc 12,28,0xFEE8470
+ 22: Js28o $0xFEE8470
+
+
+
+. 3043 FEE84A8 24
+. 81 3B 00 04 7F 63 DB 78 81 5B 00 08 38 09 00 01 7F 89 50 40 41 9C FF B4
+==== BB 3044 (0xFEE8470) approx BBs exec'd 0 ====
+
+ 0xFEE8470: 88690000 lbz r3,0(r9)
+ 0: GETL R9, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEE8474: 901B0004 stw r0,4(r27)
+ 4: GETL R0, t4
+ 5: GETL R27, t6
+ 6: ADDL $0x4, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFEE8478: 2C83FFFF cmpi cr1,r3,-1
+ 9: GETL R3, t8
+ 10: MOVL $0xFFFFFFFF, t12
+ 11: CMPL t8, t12, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0xFEE847C: 819F00BC lwz r12,188(r31)
+ 14: GETL R31, t14
+ 15: ADDL $0xBC, t14
+ 16: LDL (t14), t16
+ 17: PUTL t16, R12
+ 18: INCEIPL $4
+
+ 0xFEE8480: 57A01838 rlwinm r0,r29,3,0,28
+ 19: GETL R29, t18
+ 20: SHLL $0x3, t18
+ 21: PUTL t18, R0
+ 22: INCEIPL $4
+
+ 0xFEE8484: 3BBD0001 addi r29,r29,1
+ 23: GETL R29, t20
+ 24: ADDL $0x1, t20
+ 25: PUTL t20, R29
+ 26: INCEIPL $4
+
+ 0xFEE8488: 3163FFFF addic r11,r3,-1
+ 27: GETL R3, t22
+ 28: ADCL $0xFFFFFFFF, t22 (-wCa)
+ 29: PUTL t22, R11
+ 30: INCEIPL $4
+
+ 0xFEE848C: 7CCB1910 subfe r6,r11,r3
+ 31: GETL R11, t24
+ 32: GETL R3, t26
+ 33: SBBL t24, t26 (-rCa-wCa)
+ 34: PUTL t26, R6
+ 35: INCEIPL $4
+
+ 0xFEE8490: 7F1D6040 cmpl cr6,r29,r12
+ 36: GETL R29, t28
+ 37: GETL R12, t30
+ 38: CMPUL t28, t30, t32 (-rSo)
+ 39: ICRFL t32, $0x6, CR
+ 40: INCEIPL $4
+
+ 0xFEE8494: 41A6FCCC bc 13,6,0xFEE8160
+ 41: Js06o $0xFEE8160
+
+
+
+. 3044 FEE8470 40
+. 88 69 00 00 90 1B 00 04 2C 83 FF FF 81 9F 00 BC 57 A0 18 38 3B BD 00 01 31 63 FF FF 7C CB 19 10 7F 1D 60 40 41 A6 FC CC
+==== BB 3045 (0xFEE8498) approx BBs exec'd 0 ====
+
+ 0xFEE8498: 82370000 lwz r17,0(r23)
+ 0: GETL R23, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R17
+ 3: INCEIPL $4
+
+ 0xFEE849C: 7D208A14 add r9,r0,r17
+ 4: GETL R0, t4
+ 5: GETL R17, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0xFEE84A0: 98C90007 stb r6,7(r9)
+ 9: GETL R6, t8
+ 10: GETL R9, t10
+ 11: ADDL $0x7, t10
+ 12: STB t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFEE84A4: 40980098 bc 4,24,0xFEE853C
+ 14: Jc24o $0xFEE853C
+
+
+
+. 3045 FEE8498 16
+. 82 37 00 00 7D 20 8A 14 98 C9 00 07 40 98 00 98
+==== BB 3046 (0xFEE853C) approx BBs exec'd 0 ====
+
+ 0xFEE853C: 82780000 lwz r19,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R19
+ 3: INCEIPL $4
+
+ 0xFEE8540: 7F0AC378 or r10,r24,r24
+ 4: GETL R24, t4
+ 5: PUTL t4, R10
+ 6: INCEIPL $4
+
+ 0xFEE8544: 7F1D9840 cmpl cr6,r29,r19
+ 7: GETL R29, t6
+ 8: GETL R19, t8
+ 9: CMPUL t6, t8, t10 (-rSo)
+ 10: ICRFL t10, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFEE8548: 40980028 bc 4,24,0xFEE8570
+ 12: Jc24o $0xFEE8570
+
+
+
+. 3046 FEE853C 16
+. 82 78 00 00 7F 0A C3 78 7F 1D 98 40 40 98 00 28
+==== BB 3047 (0xFEE8570) approx BBs exec'd 0 ====
+
+ 0xFEE8570: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEE8574: 3BA00000 li r29,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R29
+ 5: INCEIPL $4
+
+ 0xFEE8578: 4BFD3339 bl 0xFEBB8B0
+ 6: MOVL $0xFEE857C, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFEBB8B0 ($4)
+
+
+
+. 3047 FEE8570 12
+. 7F 63 DB 78 3B A0 00 00 4B FD 33 39
+==== BB 3048 (0xFECECA4) approx BBs exec'd 0 ====
+
+ 0xFECECA4: 7F88D000 cmp cr7,r8,r26
+ 0: GETL R8, t0
+ 1: GETL R26, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFECECA8: 419E02C0 bc 12,30,0xFECEF68
+ 5: Js30o $0xFECEF68
+
+
+
+. 3048 FECECA4 8
+. 7F 88 D0 00 41 9E 02 C0
+==== BB 3049 (0xFEE857C) approx BBs exec'd 0 ====
+
+ 0xFEE857C: 80180000 lwz r0,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEE8580: 7F9D0040 cmpl cr7,r29,r0
+ 4: GETL R29, t4
+ 5: GETL R0, t6
+ 6: CMPUL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFEE8584: 409C0030 bc 4,28,0xFEE85B4
+ 9: Jc28o $0xFEE85B4
+
+
+
+. 3049 FEE857C 12
+. 80 18 00 00 7F 9D 00 40 40 9C 00 30
+==== BB 3050 (0xFEE8588) approx BBs exec'd 0 ====
+
+ 0xFEE8588: 82D70000 lwz r22,0(r23)
+ 0: GETL R23, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R22
+ 3: INCEIPL $4
+
+ 0xFEE858C: 57A31838 rlwinm r3,r29,3,0,28
+ 4: GETL R29, t4
+ 5: SHLL $0x3, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE8590: 836F0000 lwz r27,0(r15)
+ 8: GETL R15, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R27
+ 11: INCEIPL $4
+
+ 0xFEE8594: 3BBD0001 addi r29,r29,1
+ 12: GETL R29, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0xFEE8598: 7C83B214 add r4,r3,r22
+ 16: GETL R3, t12
+ 17: GETL R22, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R4
+ 20: INCEIPL $4
+
+ 0xFEE859C: 8B840005 lbz r28,5(r4)
+ 21: GETL R4, t16
+ 22: ADDL $0x5, t16
+ 23: LDB (t16), t18
+ 24: PUTL t18, R28
+ 25: INCEIPL $4
+
+ 0xFEE85A0: 7C7CDA14 add r3,r28,r27
+ 26: GETL R28, t20
+ 27: GETL R27, t22
+ 28: ADDL t20, t22
+ 29: PUTL t22, R3
+ 30: INCEIPL $4
+
+ 0xFEE85A4: 4BFFE705 bl 0xFEE6CA8
+ 31: MOVL $0xFEE85A8, t24
+ 32: PUTL t24, LR
+ 33: JMPo-c $0xFEE6CA8 ($4)
+
+
+
+. 3050 FEE8588 32
+. 82 D7 00 00 57 A3 18 38 83 6F 00 00 3B BD 00 01 7C 83 B2 14 8B 84 00 05 7C 7C DA 14 4B FF E7 05
+==== BB 3051 __tzstring(0xFEE6CA8) approx BBs exec'd 0 ====
+
+ 0xFEE6CA8: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEE6CAC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFEE6CB0: 480C11A1 bl 0xFFA7E50
+ 9: MOVL $0xFEE6CB4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3051 FEE6CA8 12
+. 94 21 FF D0 7C 08 02 A6 48 0C 11 A1
+==== BB 3052 (0xFEE6CB4) approx BBs exec'd 0 ====
+
+ 0xFEE6CB4: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEE6CB8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEE6CBC: 93210014 stw r25,20(r1)
+ 8: GETL R25, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEE6CC0: 9361001C stw r27,28(r1)
+ 13: GETL R27, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x1C, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEE6CC4: 7C7B1B78 or r27,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R27
+ 20: INCEIPL $4
+
+ 0xFEE6CC8: 93810020 stw r28,32(r1)
+ 21: GETL R28, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x20, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEE6CCC: 833E0890 lwz r25,2192(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x890, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R25
+ 30: INCEIPL $4
+
+ 0xFEE6CD0: 93A10024 stw r29,36(r1)
+ 31: GETL R29, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x24, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFEE6CD4: 93410018 stw r26,24(r1)
+ 36: GETL R26, t28
+ 37: GETL R1, t30
+ 38: ADDL $0x18, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0xFEE6CD8: 93E1002C stw r31,44(r1)
+ 41: GETL R31, t32
+ 42: GETL R1, t34
+ 43: ADDL $0x2C, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0xFEE6CDC: 90010034 stw r0,52(r1)
+ 46: GETL R0, t36
+ 47: GETL R1, t38
+ 48: ADDL $0x34, t38
+ 49: STL t36, (t38)
+ 50: INCEIPL $4
+
+ 0xFEE6CE0: 4BFEFDF9 bl 0xFED6AD8
+ 51: MOVL $0xFEE6CE4, t40
+ 52: PUTL t40, LR
+ 53: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 3052 FEE6CB4 48
+. 93 C1 00 28 7F C8 02 A6 93 21 00 14 93 61 00 1C 7C 7B 1B 78 93 81 00 20 83 3E 08 90 93 A1 00 24 93 41 00 18 93 E1 00 2C 90 01 00 34 4B FE FD F9
+==== BB 3053 (0xFEE6CE4) approx BBs exec'd 0 ====
+
+ 0xFEE6CE4: 83990000 lwz r28,0(r25)
+ 0: GETL R25, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R28
+ 3: INCEIPL $4
+
+ 0xFEE6CE8: 7C7D1B78 or r29,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R29
+ 6: INCEIPL $4
+
+ 0xFEE6CEC: 2F9C0000 cmpi cr7,r28,0
+ 7: GETL R28, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0xFEE6CF0: 7F8BE378 or r11,r28,r28
+ 11: GETL R28, t10
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0xFEE6CF4: 419E0040 bc 12,30,0xFEE6D34
+ 14: Js30o $0xFEE6D34
+
+
+
+. 3053 FEE6CE4 20
+. 83 99 00 00 7C 7D 1B 78 2F 9C 00 00 7F 8B E3 78 41 9E 00 40
+==== BB 3054 (0xFEE6D34) approx BBs exec'd 0 ====
+
+ 0xFEE6D34: 387D0009 addi r3,r29,9
+ 0: GETL R29, t0
+ 1: ADDL $0x9, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFEE6D38: 480C35D1 bl 0xFFAA308
+ 4: MOVL $0xFEE6D3C, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0xFFAA308 ($4)
+
+
+
+. 3054 FEE6D34 8
+. 38 7D 00 09 48 0C 35 D1
+==== BB 3055 (0xFECF74C) approx BBs exec'd 0 ====
+
+ 0xFECF74C: 82FE05FC lwz r23,1532(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0xFECF750: 7E83CA14 add r20,r3,r25
+ 5: GETL R3, t4
+ 6: GETL R25, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R20
+ 9: INCEIPL $4
+
+ 0xFECF754: 82D40004 lwz r22,4(r20)
+ 10: GETL R20, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R22
+ 14: INCEIPL $4
+
+ 0xFECF758: 7E1CB800 cmp cr4,r28,r23
+ 15: GETL R28, t12
+ 16: GETL R23, t14
+ 17: CMPL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x4, CR
+ 19: INCEIPL $4
+
+ 0xFECF75C: 8263000C lwz r19,12(r3)
+ 20: GETL R3, t18
+ 21: ADDL $0xC, t18
+ 22: LDL (t18), t20
+ 23: PUTL t20, R19
+ 24: INCEIPL $4
+
+ 0xFECF760: 62D50001 ori r21,r22,0x1
+ 25: GETL R22, t22
+ 26: ORL $0x1, t22
+ 27: PUTL t22, R21
+ 28: INCEIPL $4
+
+ 0xFECF764: 92B40004 stw r21,4(r20)
+ 29: GETL R21, t24
+ 30: GETL R20, t26
+ 31: ADDL $0x4, t26
+ 32: STL t24, (t26)
+ 33: INCEIPL $4
+
+ 0xFECF768: 91530008 stw r10,8(r19)
+ 34: GETL R10, t28
+ 35: GETL R19, t30
+ 36: ADDL $0x8, t30
+ 37: STL t28, (t30)
+ 38: INCEIPL $4
+
+ 0xFECF76C: 926A000C stw r19,12(r10)
+ 39: GETL R19, t32
+ 40: GETL R10, t34
+ 41: ADDL $0xC, t34
+ 42: STL t32, (t34)
+ 43: INCEIPL $4
+
+ 0xFECF770: 41920010 bc 12,18,0xFECF780
+ 44: Js18o $0xFECF780
+
+
+
+. 3055 FECF74C 40
+. 82 FE 05 FC 7E 83 CA 14 82 D4 00 04 7E 1C B8 00 82 63 00 0C 62 D5 00 01 92 B4 00 04 91 53 00 08 92 6A 00 0C 41 92 00 10
+==== BB 3056 (0xFECF780) approx BBs exec'd 0 ====
+
+ 0xFECF780: 39030008 addi r8,r3,8
+ 0: GETL R3, t0
+ 1: ADDL $0x8, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0xFECF784: 4BFFFF2C b 0xFECF6B0
+ 4: JMPo $0xFECF6B0 ($4)
+
+
+
+. 3056 FECF780 8
+. 39 03 00 08 4B FF FF 2C
+==== BB 3057 (0xFEE6D3C) approx BBs exec'd 0 ====
+
+ 0xFEE6D3C: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFEE6D40: 38600000 li r3,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE6D44: 41820030 bc 12,2,0xFEE6D74
+ 8: Js02o $0xFEE6D74
+
+
+
+. 3057 FEE6D3C 12
+. 7C 7F 1B 79 38 60 00 00 41 82 00 30
+==== BB 3058 (0xFEE6D48) approx BBs exec'd 0 ====
+
+ 0xFEE6D48: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEE6D4C: 3B5F0008 addi r26,r31,8
+ 3: GETL R31, t2
+ 4: ADDL $0x8, t2
+ 5: PUTL t2, R26
+ 6: INCEIPL $4
+
+ 0xFEE6D50: 907F0000 stw r3,0(r31)
+ 7: GETL R3, t4
+ 8: GETL R31, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0xFEE6D54: 7F64DB78 or r4,r27,r27
+ 11: GETL R27, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0xFEE6D58: 93BF0004 stw r29,4(r31)
+ 14: GETL R29, t10
+ 15: GETL R31, t12
+ 16: ADDL $0x4, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xFEE6D5C: 7F43D378 or r3,r26,r26
+ 19: GETL R26, t14
+ 20: PUTL t14, R3
+ 21: INCEIPL $4
+
+ 0xFEE6D60: 4BFEF771 bl 0xFED64D0
+ 22: MOVL $0xFEE6D64, t16
+ 23: PUTL t16, LR
+ 24: JMPo-c $0xFED64D0 ($4)
+
+
+
+. 3058 FEE6D48 28
+. 38 60 00 00 3B 5F 00 08 90 7F 00 00 7F 64 DB 78 93 BF 00 04 7F 43 D3 78 4B FE F7 71
+==== BB 3059 (0xFED6538) approx BBs exec'd 0 ====
+
+ 0xFED6538: 5540863F rlwinm. r0,r10,16,24,31
+ 0: GETL R10, t0
+ 1: ROLL $0x10, t0
+ 2: ANDL $0xFF, t0
+ 3: PUTL t0, R0
+ 4: CMP0L t0, t2 (-rSo)
+ 5: ICRFL t2, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFED653C: 98050005 stb r0,5(r5)
+ 7: GETL R0, t4
+ 8: GETL R5, t6
+ 9: ADDL $0x5, t6
+ 10: STB t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFED6540: 4D820020 bclr 12,2
+ 12: GETL LR, t8
+ 13: Js02o-r t8
+
+
+
+. 3059 FED6538 12
+. 55 40 86 3F 98 05 00 05 4D 82 00 20
+==== BB 3060 (0xFED6544) approx BBs exec'd 0 ====
+
+ 0xFED6544: 5540C63F rlwinm. r0,r10,24,24,31
+ 0: GETL R10, t0
+ 1: ROLL $0x18, t0
+ 2: ANDL $0xFF, t0
+ 3: PUTL t0, R0
+ 4: CMP0L t0, t2 (-rSo)
+ 5: ICRFL t2, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFED6548: 98050006 stb r0,6(r5)
+ 7: GETL R0, t4
+ 8: GETL R5, t6
+ 9: ADDL $0x6, t6
+ 10: STB t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFED654C: 4D820020 bclr 12,2
+ 12: GETL LR, t8
+ 13: Js02o-r t8
+
+
+
+. 3060 FED6544 12
+. 55 40 C6 3F 98 05 00 06 4D 82 00 20
+==== BB 3061 (0xFED6550) approx BBs exec'd 0 ====
+
+ 0xFED6550: 99450007 stb r10,7(r5)
+ 0: GETL R10, t0
+ 1: GETL R5, t2
+ 2: ADDL $0x7, t2
+ 3: STB t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFED6554: 4E800020 blr
+ 5: GETL LR, t4
+ 6: JMPo-r t4 ($4)
+
+
+
+. 3061 FED6550 8
+. 99 45 00 07 4E 80 00 20
+==== BB 3062 (0xFEE6D64) approx BBs exec'd 0 ====
+
+ 0xFEE6D64: 2C9C0000 cmpi cr1,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFEE6D68: 41860068 bc 12,6,0xFEE6DD0
+ 4: Js06o $0xFEE6DD0
+
+
+
+. 3062 FEE6D64 8
+. 2C 9C 00 00 41 86 00 68
+==== BB 3063 (0xFEE6DD0) approx BBs exec'd 0 ====
+
+ 0xFEE6DD0: 93F90000 stw r31,0(r25)
+ 0: GETL R31, t0
+ 1: GETL R25, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFEE6DD4: 4BFFFF9C b 0xFEE6D70
+ 4: JMPo $0xFEE6D70 ($4)
+
+
+
+. 3063 FEE6DD0 8
+. 93 F9 00 00 4B FF FF 9C
+==== BB 3064 (0xFEE6D70) approx BBs exec'd 0 ====
+
+ 0xFEE6D70: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEE6D74: 80C10034 lwz r6,52(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x34, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0xFEE6D78: 83210014 lwz r25,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R25
+ 12: INCEIPL $4
+
+ 0xFEE6D7C: 83410018 lwz r26,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R26
+ 17: INCEIPL $4
+
+ 0xFEE6D80: 7CC803A6 mtlr r6
+ 18: GETL R6, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFEE6D84: 8361001C lwz r27,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R27
+ 25: INCEIPL $4
+
+ 0xFEE6D88: 83810020 lwz r28,32(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R28
+ 30: INCEIPL $4
+
+ 0xFEE6D8C: 83A10024 lwz r29,36(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x24, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R29
+ 35: INCEIPL $4
+
+ 0xFEE6D90: 83C10028 lwz r30,40(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x28, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R30
+ 40: INCEIPL $4
+
+ 0xFEE6D94: 83E1002C lwz r31,44(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x2C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R31
+ 45: INCEIPL $4
+
+ 0xFEE6D98: 38210030 addi r1,r1,48
+ 46: GETL R1, t36
+ 47: ADDL $0x30, t36
+ 48: PUTL t36, R1
+ 49: INCEIPL $4
+
+ 0xFEE6D9C: 4E800020 blr
+ 50: GETL LR, t38
+ 51: JMPo-r t38 ($4)
+
+
+
+. 3064 FEE6D70 48
+. 7F 43 D3 78 80 C1 00 34 83 21 00 14 83 41 00 18 7C C8 03 A6 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 3065 (0xFEE85A8) approx BBs exec'd 0 ====
+
+ 0xFEE85A8: 80180000 lwz r0,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEE85AC: 7F9D0040 cmpl cr7,r29,r0
+ 4: GETL R29, t4
+ 5: GETL R0, t6
+ 6: CMPUL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFEE85B0: 419CFFD8 bc 12,28,0xFEE8588
+ 9: Js28o $0xFEE8588
+
+
+
+. 3065 FEE85A8 12
+. 80 18 00 00 7F 9D 00 40 41 9C FF D8
+==== BB 3066 (0xFEE6CF8) approx BBs exec'd 0 ====
+
+ 0xFEE6CF8: 80AB0004 lwz r5,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFEE6CFC: 7D7C5B78 or r28,r11,r11
+ 5: GETL R11, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFEE6D00: 7F63DB78 or r3,r27,r27
+ 8: GETL R27, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFEE6D04: 7F85E840 cmpl cr7,r5,r29
+ 11: GETL R5, t8
+ 12: GETL R29, t10
+ 13: CMPUL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0xFEE6D08: 7C9D2850 subf r4,r29,r5
+ 16: GETL R29, t14
+ 17: GETL R5, t16
+ 18: SUBL t14, t16
+ 19: PUTL t16, R4
+ 20: INCEIPL $4
+
+ 0xFEE6D0C: 7D2B2214 add r9,r11,r4
+ 21: GETL R11, t18
+ 22: GETL R4, t20
+ 23: ADDL t18, t20
+ 24: PUTL t20, R9
+ 25: INCEIPL $4
+
+ 0xFEE6D10: 3BE90008 addi r31,r9,8
+ 26: GETL R9, t22
+ 27: ADDL $0x8, t22
+ 28: PUTL t22, R31
+ 29: INCEIPL $4
+
+ 0xFEE6D14: 7FE4FB78 or r4,r31,r31
+ 30: GETL R31, t24
+ 31: PUTL t24, R4
+ 32: INCEIPL $4
+
+ 0xFEE6D18: 419C0010 bc 12,28,0xFEE6D28
+ 33: Js28o $0xFEE6D28
+
+
+
+. 3066 FEE6CF8 36
+. 80 AB 00 04 7D 7C 5B 78 7F 63 DB 78 7F 85 E8 40 7C 9D 28 50 7D 2B 22 14 3B E9 00 08 7F E4 FB 78 41 9C 00 10
+==== BB 3067 (0xFEE6D1C) approx BBs exec'd 0 ====
+
+ 0xFEE6D1C: 4BFEF695 bl 0xFED63B0
+ 0: MOVL $0xFEE6D20, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFED63B0 ($4)
+
+
+
+. 3067 FEE6D1C 4
+. 4B FE F6 95
+==== BB 3068 (0xFEE6D20) approx BBs exec'd 0 ====
+
+ 0xFEE6D20: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEE6D24: 4182007C bc 12,2,0xFEE6DA0
+ 4: Js02o $0xFEE6DA0
+
+
+
+. 3068 FEE6D20 8
+. 2C 03 00 00 41 82 00 7C
+==== BB 3069 (0xFEE6D28) approx BBs exec'd 0 ====
+
+ 0xFEE6D28: 817C0000 lwz r11,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFEE6D2C: 2F8B0000 cmpi cr7,r11,0
+ 4: GETL R11, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFEE6D30: 409EFFC8 bc 4,30,0xFEE6CF8
+ 8: Jc30o $0xFEE6CF8
+
+
+
+. 3069 FEE6D28 12
+. 81 7C 00 00 2F 8B 00 00 40 9E FF C8
+==== BB 3070 (0xFEE6D6C) approx BBs exec'd 0 ====
+
+ 0xFEE6D6C: 93FC0000 stw r31,0(r28)
+ 0: GETL R31, t0
+ 1: GETL R28, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFEE6D70: 7F43D378 or r3,r26,r26
+ 4: GETL R26, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0xFEE6D74: 80C10034 lwz r6,52(r1)
+ 7: GETL R1, t6
+ 8: ADDL $0x34, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R6
+ 11: INCEIPL $4
+
+ 0xFEE6D78: 83210014 lwz r25,20(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x14, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R25
+ 16: INCEIPL $4
+
+ 0xFEE6D7C: 83410018 lwz r26,24(r1)
+ 17: GETL R1, t14
+ 18: ADDL $0x18, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R26
+ 21: INCEIPL $4
+
+ 0xFEE6D80: 7CC803A6 mtlr r6
+ 22: GETL R6, t18
+ 23: PUTL t18, LR
+ 24: INCEIPL $4
+
+ 0xFEE6D84: 8361001C lwz r27,28(r1)
+ 25: GETL R1, t20
+ 26: ADDL $0x1C, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R27
+ 29: INCEIPL $4
+
+ 0xFEE6D88: 83810020 lwz r28,32(r1)
+ 30: GETL R1, t24
+ 31: ADDL $0x20, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R28
+ 34: INCEIPL $4
+
+ 0xFEE6D8C: 83A10024 lwz r29,36(r1)
+ 35: GETL R1, t28
+ 36: ADDL $0x24, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R29
+ 39: INCEIPL $4
+
+ 0xFEE6D90: 83C10028 lwz r30,40(r1)
+ 40: GETL R1, t32
+ 41: ADDL $0x28, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R30
+ 44: INCEIPL $4
+
+ 0xFEE6D94: 83E1002C lwz r31,44(r1)
+ 45: GETL R1, t36
+ 46: ADDL $0x2C, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R31
+ 49: INCEIPL $4
+
+ 0xFEE6D98: 38210030 addi r1,r1,48
+ 50: GETL R1, t40
+ 51: ADDL $0x30, t40
+ 52: PUTL t40, R1
+ 53: INCEIPL $4
+
+ 0xFEE6D9C: 4E800020 blr
+ 54: GETL LR, t42
+ 55: JMPo-r t42 ($4)
+
+
+
+. 3070 FEE6D6C 52
+. 93 FC 00 00 7F 43 D3 78 80 C1 00 34 83 21 00 14 83 41 00 18 7C C8 03 A6 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 3071 (0xFED652C) approx BBs exec'd 0 ====
+
+ 0xFED652C: 5540463F rlwinm. r0,r10,8,24,31
+ 0: GETL R10, t0
+ 1: SHRL $0x18, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFED6530: 98050004 stb r0,4(r5)
+ 6: GETL R0, t4
+ 7: GETL R5, t6
+ 8: ADDL $0x4, t6
+ 9: STB t4, (t6)
+ 10: INCEIPL $4
+
+ 0xFED6534: 4D820020 bclr 12,2
+ 11: GETL LR, t8
+ 12: Js02o-r t8
+
+
+
+. 3071 FED652C 12
+. 55 40 46 3F 98 05 00 04 4D 82 00 20
+==== BB 3072 (0xFEE6DA0) approx BBs exec'd 0 ====
+
+ 0xFEE6DA0: 80C10034 lwz r6,52(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFEE6DA4: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE6DA8: 83210014 lwz r25,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R25
+ 12: INCEIPL $4
+
+ 0xFEE6DAC: 83410018 lwz r26,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R26
+ 17: INCEIPL $4
+
+ 0xFEE6DB0: 7CC803A6 mtlr r6
+ 18: GETL R6, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFEE6DB4: 8361001C lwz r27,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R27
+ 25: INCEIPL $4
+
+ 0xFEE6DB8: 83810020 lwz r28,32(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R28
+ 30: INCEIPL $4
+
+ 0xFEE6DBC: 83A10024 lwz r29,36(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x24, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R29
+ 35: INCEIPL $4
+
+ 0xFEE6DC0: 83C10028 lwz r30,40(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x28, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R30
+ 40: INCEIPL $4
+
+ 0xFEE6DC4: 83E1002C lwz r31,44(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x2C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R31
+ 45: INCEIPL $4
+
+ 0xFEE6DC8: 38210030 addi r1,r1,48
+ 46: GETL R1, t36
+ 47: ADDL $0x30, t36
+ 48: PUTL t36, R1
+ 49: INCEIPL $4
+
+ 0xFEE6DCC: 4E800020 blr
+ 50: GETL LR, t38
+ 51: JMPo-r t38 ($4)
+
+
+
+. 3072 FEE6DA0 48
+. 80 C1 00 34 7F E3 FB 78 83 21 00 14 83 41 00 18 7C C8 03 A6 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 3073 (0xFEE85B4) approx BBs exec'd 0 ====
+
+ 0xFEE85B4: 83B00000 lwz r29,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0xFEE85B8: 3B000000 li r24,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R24
+ 6: INCEIPL $4
+
+ 0xFEE85BC: 835E1AE4 lwz r26,6884(r30)
+ 7: GETL R30, t6
+ 8: ADDL $0x1AE4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R26
+ 11: INCEIPL $4
+
+ 0xFEE85C0: 2F9D0000 cmpi cr7,r29,0
+ 12: GETL R29, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0xFEE85C4: 931A0004 stw r24,4(r26)
+ 16: GETL R24, t14
+ 17: GETL R26, t16
+ 18: ADDL $0x4, t16
+ 19: STL t14, (t16)
+ 20: INCEIPL $4
+
+ 0xFEE85C8: 931A0000 stw r24,0(r26)
+ 21: GETL R24, t18
+ 22: GETL R26, t20
+ 23: STL t18, (t20)
+ 24: INCEIPL $4
+
+ 0xFEE85CC: 419E0060 bc 12,30,0xFEE862C
+ 25: Js30o $0xFEE862C
+
+
+
+. 3073 FEE85B4 28
+. 83 B0 00 00 3B 00 00 00 83 5E 1A E4 2F 9D 00 00 93 1A 00 04 93 1A 00 00 41 9E 00 60
+==== BB 3074 (0xFEE85D0) approx BBs exec'd 0 ====
+
+ 0xFEE85D0: 818E0000 lwz r12,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R12
+ 3: INCEIPL $4
+
+ 0xFEE85D4: 3BBDFFFF addi r29,r29,-1
+ 4: GETL R29, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFEE85D8: 81170000 lwz r8,0(r23)
+ 8: GETL R23, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R8
+ 11: INCEIPL $4
+
+ 0xFEE85DC: 7D5D60AE lbzx r10,r29,r12
+ 12: GETL R12, t10
+ 13: GETL R29, t12
+ 14: ADDL t12, t10
+ 15: LDB (t10), t14
+ 16: PUTL t14, R10
+ 17: INCEIPL $4
+
+ 0xFEE85E0: 554B1838 rlwinm r11,r10,3,0,28
+ 18: GETL R10, t16
+ 19: SHLL $0x3, t16
+ 20: PUTL t16, R11
+ 21: INCEIPL $4
+
+ 0xFEE85E4: 7D2B4214 add r9,r11,r8
+ 22: GETL R11, t18
+ 23: GETL R8, t20
+ 24: ADDL t18, t20
+ 25: PUTL t20, R9
+ 26: INCEIPL $4
+
+ 0xFEE85E8: 8B890004 lbz r28,4(r9)
+ 27: GETL R9, t22
+ 28: ADDL $0x4, t22
+ 29: LDB (t22), t24
+ 30: PUTL t24, R28
+ 31: INCEIPL $4
+
+ 0xFEE85EC: 579B103A rlwinm r27,r28,2,0,29
+ 32: GETL R28, t26
+ 33: SHLL $0x2, t26
+ 34: PUTL t26, R27
+ 35: INCEIPL $4
+
+ 0xFEE85F0: 7CFBD02E lwzx r7,r27,r26
+ 36: GETL R26, t28
+ 37: GETL R27, t30
+ 38: ADDL t30, t28
+ 39: LDL (t28), t32
+ 40: PUTL t32, R7
+ 41: INCEIPL $4
+
+ 0xFEE85F4: 2C870000 cmpi cr1,r7,0
+ 42: GETL R7, t34
+ 43: CMP0L t34, t36 (-rSo)
+ 44: ICRFL t36, $0x1, CR
+ 45: INCEIPL $4
+
+ 0xFEE85F8: 4186000C bc 12,6,0xFEE8604
+ 46: Js06o $0xFEE8604
+
+
+
+. 3074 FEE85D0 44
+. 81 8E 00 00 3B BD FF FF 81 17 00 00 7D 5D 60 AE 55 4B 18 38 7D 2B 42 14 8B 89 00 04 57 9B 10 3A 7C FB D0 2E 2C 87 00 00 41 86 00 0C
+==== BB 3075 (0xFEE8604) approx BBs exec'd 0 ====
+
+ 0xFEE8604: 88090005 lbz r0,5(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x5, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEE8608: 223C0001 subfic r17,r28,1
+ 5: GETL R28, t4
+ 6: MOVL $0x1, t6
+ 7: SBBL t4, t6 (-wCa)
+ 8: PUTL t6, R17
+ 9: INCEIPL $4
+
+ 0xFEE860C: 826F0000 lwz r19,0(r15)
+ 10: GETL R15, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R19
+ 13: INCEIPL $4
+
+ 0xFEE8610: 7C730214 add r3,r19,r0
+ 14: GETL R19, t12
+ 15: GETL R0, t14
+ 16: ADDL t12, t14
+ 17: PUTL t14, R3
+ 18: INCEIPL $4
+
+ 0xFEE8614: 4BFFE695 bl 0xFEE6CA8
+ 19: MOVL $0xFEE8618, t16
+ 20: PUTL t16, LR
+ 21: JMPo-c $0xFEE6CA8 ($4)
+
+
+
+. 3075 FEE8604 20
+. 88 09 00 05 22 3C 00 01 82 6F 00 00 7C 73 02 14 4B FF E6 95
+==== BB 3076 (0xFEE8618) approx BBs exec'd 0 ====
+
+ 0xFEE8618: 5629103A rlwinm r9,r17,2,0,29
+ 0: GETL R17, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFEE861C: 7C7BD12E stwx r3,r27,r26
+ 4: GETL R26, t2
+ 5: GETL R27, t4
+ 6: ADDL t4, t2
+ 7: GETL R3, t6
+ 8: STL t6, (t2)
+ 9: INCEIPL $4
+
+ 0xFEE8620: 7CC9D02E lwzx r6,r9,r26
+ 10: GETL R26, t8
+ 11: GETL R9, t10
+ 12: ADDL t10, t8
+ 13: LDL (t8), t12
+ 14: PUTL t12, R6
+ 15: INCEIPL $4
+
+ 0xFEE8624: 2F060000 cmpi cr6,r6,0
+ 16: GETL R6, t14
+ 17: CMP0L t14, t16 (-rSo)
+ 18: ICRFL t16, $0x6, CR
+ 19: INCEIPL $4
+
+ 0xFEE8628: 419AFFD4 bc 12,26,0xFEE85FC
+ 20: Js26o $0xFEE85FC
+
+
+
+. 3076 FEE8618 20
+. 56 29 10 3A 7C 7B D1 2E 7C C9 D0 2E 2F 06 00 00 41 9A FF D4
+==== BB 3077 (0xFEE85FC) approx BBs exec'd 0 ====
+
+ 0xFEE85FC: 2F9D0000 cmpi cr7,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFEE8600: 4BFFFFCC b 0xFEE85CC
+ 4: JMPo $0xFEE85CC ($4)
+
+
+
+. 3077 FEE85FC 8
+. 2F 9D 00 00 4B FF FF CC
+==== BB 3078 (0xFEE85CC) approx BBs exec'd 0 ====
+
+ 0xFEE85CC: 419E0060 bc 12,30,0xFEE862C
+ 0: Js30o $0xFEE862C
+
+
+
+. 3078 FEE85CC 4
+. 41 9E 00 60
+==== BB 3079 (0xFEE862C) approx BBs exec'd 0 ====
+
+ 0xFEE862C: 807A0000 lwz r3,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEE8630: 2C030000 cmpi cr0,r3,0
+ 4: GETL R3, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0xFEE8634: 4182016C bc 12,2,0xFEE87A0
+ 8: Js02o $0xFEE87A0
+
+
+
+. 3079 FEE862C 12
+. 80 7A 00 00 2C 03 00 00 41 82 01 6C
+==== BB 3080 (0xFEE8638) approx BBs exec'd 0 ====
+
+ 0xFEE8638: 83BA0004 lwz r29,4(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFEE863C: 2F9D0000 cmpi cr7,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFEE8640: 409E0008 bc 4,30,0xFEE8648
+ 9: Jc30o $0xFEE8648
+
+
+
+. 3080 FEE8638 12
+. 83 BA 00 04 2F 9D 00 00 40 9E 00 08
+==== BB 3081 (0xFEE8648) approx BBs exec'd 0 ====
+
+ 0xFEE8648: 812F0000 lwz r9,0(r15)
+ 0: GETL R15, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFEE864C: 815E1C2C lwz r10,7212(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1C2C, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0xFEE8650: 88090000 lbz r0,0(r9)
+ 9: GETL R9, t8
+ 10: LDB (t8), t10
+ 11: PUTL t10, R0
+ 12: INCEIPL $4
+
+ 0xFEE8654: 7D2B4B78 or r11,r9,r9
+ 13: GETL R9, t12
+ 14: PUTL t12, R11
+ 15: INCEIPL $4
+
+ 0xFEE8658: 48000008 b 0xFEE8660
+ 16: JMPo $0xFEE8660 ($4)
+
+
+
+. 3081 FEE8648 20
+. 81 2F 00 00 81 5E 1C 2C 88 09 00 00 7D 2B 4B 78 48 00 00 08
+==== BB 3082 (0xFEE8660) approx BBs exec'd 0 ====
+
+ 0xFEE8660: 2C800000 cmpi cr1,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFEE8664: 4086FFF8 bc 4,6,0xFEE865C
+ 4: Jc06o $0xFEE865C
+
+
+
+. 3082 FEE8660 8
+. 2C 80 00 00 40 86 FF F8
+==== BB 3083 (0xFEE865C) approx BBs exec'd 0 ====
+
+ 0xFEE865C: 8C090001 lbzu r0,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R9
+ 3: LDB (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xFEE8660: 2C800000 cmpi cr1,r0,0
+ 6: GETL R0, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFEE8664: 4086FFF8 bc 4,6,0xFEE865C
+ 10: Jc06o $0xFEE865C
+
+
+
+. 3083 FEE865C 12
+. 8C 09 00 01 2C 80 00 00 40 86 FF F8
+==== BB 3084 (0xFEE8668) approx BBs exec'd 0 ====
+
+ 0xFEE8668: 834A0000 lwz r26,0(r10)
+ 0: GETL R10, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R26
+ 3: INCEIPL $4
+
+ 0xFEE866C: 7D6B4850 subf r11,r11,r9
+ 4: GETL R11, t4
+ 5: GETL R9, t6
+ 6: SUBL t4, t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0xFEE8670: 7F0BD040 cmpl cr6,r11,r26
+ 9: GETL R11, t8
+ 10: GETL R26, t10
+ 11: CMPUL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFEE8674: 40990008 bc 4,25,0xFEE867C
+ 14: Jc25o $0xFEE867C
+
+
+
+. 3084 FEE8668 16
+. 83 4A 00 00 7D 6B 48 50 7F 0B D0 40 40 99 00 08
+==== BB 3085 (0xFEE8678) approx BBs exec'd 0 ====
+
+ 0xFEE8678: 916A0000 stw r11,0(r10)
+ 0: GETL R11, t0
+ 1: GETL R10, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFEE867C: 832F0000 lwz r25,0(r15)
+ 4: GETL R15, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R25
+ 7: INCEIPL $4
+
+ 0xFEE8680: 39290001 addi r9,r9,1
+ 8: GETL R9, t8
+ 9: ADDL $0x1, t8
+ 10: PUTL t8, R9
+ 11: INCEIPL $4
+
+ 0xFEE8684: 7E59AA14 add r18,r25,r21
+ 12: GETL R25, t10
+ 13: GETL R21, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R18
+ 16: INCEIPL $4
+
+ 0xFEE8688: 7C099040 cmpl cr0,r9,r18
+ 17: GETL R9, t14
+ 18: GETL R18, t16
+ 19: CMPUL t14, t16, t18 (-rSo)
+ 20: ICRFL t18, $0x0, CR
+ 21: INCEIPL $4
+
+ 0xFEE868C: 4180FFC4 bc 12,0,0xFEE8650
+ 22: Js00o $0xFEE8650
+
+
+
+. 3085 FEE8678 24
+. 91 6A 00 00 83 2F 00 00 39 29 00 01 7E 59 AA 14 7C 09 90 40 41 80 FF C4
+==== BB 3086 (0xFEE8650) approx BBs exec'd 0 ====
+
+ 0xFEE8650: 88090000 lbz r0,0(r9)
+ 0: GETL R9, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEE8654: 7D2B4B78 or r11,r9,r9
+ 4: GETL R9, t4
+ 5: PUTL t4, R11
+ 6: INCEIPL $4
+
+ 0xFEE8658: 48000008 b 0xFEE8660
+ 7: JMPo $0xFEE8660 ($4)
+
+
+
+. 3086 FEE8650 12
+. 88 09 00 00 7D 2B 4B 78 48 00 00 08
+==== BB 3087 (0xFEE867C) approx BBs exec'd 0 ====
+
+ 0xFEE867C: 832F0000 lwz r25,0(r15)
+ 0: GETL R15, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R25
+ 3: INCEIPL $4
+
+ 0xFEE8680: 39290001 addi r9,r9,1
+ 4: GETL R9, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xFEE8684: 7E59AA14 add r18,r25,r21
+ 8: GETL R25, t6
+ 9: GETL R21, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R18
+ 12: INCEIPL $4
+
+ 0xFEE8688: 7C099040 cmpl cr0,r9,r18
+ 13: GETL R9, t10
+ 14: GETL R18, t12
+ 15: CMPUL t10, t12, t14 (-rSo)
+ 16: ICRFL t14, $0x0, CR
+ 17: INCEIPL $4
+
+ 0xFEE868C: 4180FFC4 bc 12,0,0xFEE8650
+ 18: Js00o $0xFEE8650
+
+
+
+. 3087 FEE867C 20
+. 83 2F 00 00 39 29 00 01 7E 59 AA 14 7C 09 90 40 41 80 FF C4
+==== BB 3088 (0xFEE8690) approx BBs exec'd 0 ====
+
+ 0xFEE8690: 80B00000 lwz r5,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFEE8694: 2F850000 cmpi cr7,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFEE8698: 409E0058 bc 4,30,0xFEE86F0
+ 8: Jc30o $0xFEE86F0
+
+
+
+. 3088 FEE8690 12
+. 80 B0 00 00 2F 85 00 00 40 9E 00 58
+==== BB 3089 (0xFEE86F0) approx BBs exec'd 0 ====
+
+ 0xFEE86F0: 38C00000 li r6,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0xFEE86F4: 815E08F8 lwz r10,2296(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x8F8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0xFEE86F8: 2F060000 cmpi cr6,r6,0
+ 8: GETL R6, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFEE86FC: 809E08FC lwz r4,2300(r30)
+ 12: GETL R30, t10
+ 13: ADDL $0x8FC, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R4
+ 16: INCEIPL $4
+
+ 0xFEE8700: 38A5FFFF addi r5,r5,-1
+ 17: GETL R5, t14
+ 18: ADDL $0xFFFFFFFF, t14
+ 19: PUTL t14, R5
+ 20: INCEIPL $4
+
+ 0xFEE8704: 38E00000 li r7,0
+ 21: MOVL $0x0, t16
+ 22: PUTL t16, R7
+ 23: INCEIPL $4
+
+ 0xFEE8708: 90C40000 stw r6,0(r4)
+ 24: GETL R6, t18
+ 25: GETL R4, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0xFEE870C: 90CA0000 stw r6,0(r10)
+ 28: GETL R6, t22
+ 29: GETL R10, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0xFEE8710: 48000044 b 0xFEE8754
+ 32: JMPo $0xFEE8754 ($4)
+
+
+
+. 3089 FEE86F0 36
+. 38 C0 00 00 81 5E 08 F8 2F 06 00 00 80 9E 08 FC 38 A5 FF FF 38 E0 00 00 90 C4 00 00 90 CA 00 00 48 00 00 44
+==== BB 3090 (0xFEE8754) approx BBs exec'd 0 ====
+
+ 0xFEE8754: 2C870000 cmpi cr1,r7,0
+ 0: GETL R7, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFEE8758: 41A6FFBC bc 13,6,0xFEE8714
+ 4: Js06o $0xFEE8714
+
+
+
+. 3090 FEE8754 8
+. 2C 87 00 00 41 A6 FF BC
+==== BB 3091 (0xFEE8714) approx BBs exec'd 0 ====
+
+ 0xFEE8714: 838E0000 lwz r28,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R28
+ 3: INCEIPL $4
+
+ 0xFEE8718: 81170000 lwz r8,0(r23)
+ 4: GETL R23, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R8
+ 7: INCEIPL $4
+
+ 0xFEE871C: 7F7C28AE lbzx r27,r28,r5
+ 8: GETL R5, t8
+ 9: GETL R28, t10
+ 10: ADDL t10, t8
+ 11: LDB (t8), t12
+ 12: PUTL t12, R27
+ 13: INCEIPL $4
+
+ 0xFEE8720: 576B1838 rlwinm r11,r27,3,0,28
+ 14: GETL R27, t14
+ 15: SHLL $0x3, t14
+ 16: PUTL t14, R11
+ 17: INCEIPL $4
+
+ 0xFEE8724: 7E0B4214 add r16,r11,r8
+ 18: GETL R11, t16
+ 19: GETL R8, t18
+ 20: ADDL t16, t18
+ 21: PUTL t18, R16
+ 22: INCEIPL $4
+
+ 0xFEE8728: 89F00004 lbz r15,4(r16)
+ 23: GETL R16, t20
+ 24: ADDL $0x4, t20
+ 25: LDB (t20), t22
+ 26: PUTL t22, R15
+ 27: INCEIPL $4
+
+ 0xFEE872C: 2C0F0000 cmpi cr0,r15,0
+ 28: GETL R15, t24
+ 29: CMP0L t24, t26 (-rSo)
+ 30: ICRFL t26, $0x0, CR
+ 31: INCEIPL $4
+
+ 0xFEE8730: 4082002C bc 4,2,0xFEE875C
+ 32: Jc02o $0xFEE875C
+
+
+
+. 3091 FEE8714 32
+. 83 8E 00 00 81 17 00 00 7F 7C 28 AE 57 6B 18 38 7E 0B 42 14 89 F0 00 04 2C 0F 00 00 40 82 00 2C
+==== BB 3092 (0xFEE8734) approx BBs exec'd 0 ====
+
+ 0xFEE8734: 7C6B402E lwzx r3,r11,r8
+ 0: GETL R8, t0
+ 1: GETL R11, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R3
+ 5: INCEIPL $4
+
+ 0xFEE8738: 38E00001 li r7,1
+ 6: MOVL $0x1, t6
+ 7: PUTL t6, R7
+ 8: INCEIPL $4
+
+ 0xFEE873C: 906A0000 stw r3,0(r10)
+ 9: GETL R3, t8
+ 10: GETL R10, t10
+ 11: STL t8, (t10)
+ 12: INCEIPL $4
+
+ 0xFEE8740: 7CE03039 and. r0,r7,r6
+ 13: GETL R7, t12
+ 14: GETL R6, t14
+ 15: ANDL t12, t14
+ 16: PUTL t14, R0
+ 17: CMP0L t14, t16 (-rSo)
+ 18: ICRFL t16, $0x0, CR
+ 19: INCEIPL $4
+
+ 0xFEE8744: 2F850000 cmpi cr7,r5,0
+ 20: GETL R5, t18
+ 21: CMP0L t18, t20 (-rSo)
+ 22: ICRFL t20, $0x7, CR
+ 23: INCEIPL $4
+
+ 0xFEE8748: 38A5FFFF addi r5,r5,-1
+ 24: GETL R5, t22
+ 25: ADDL $0xFFFFFFFF, t22
+ 26: PUTL t22, R5
+ 27: INCEIPL $4
+
+ 0xFEE874C: 40820048 bc 4,2,0xFEE8794
+ 28: Jc02o $0xFEE8794
+
+
+
+. 3092 FEE8734 28
+. 7C 6B 40 2E 38 E0 00 01 90 6A 00 00 7C E0 30 39 2F 85 00 00 38 A5 FF FF 40 82 00 48
+==== BB 3093 (0xFEE8750) approx BBs exec'd 0 ====
+
+ 0xFEE8750: 419E0044 bc 12,30,0xFEE8794
+ 0: Js30o $0xFEE8794
+
+
+
+. 3093 FEE8750 4
+. 41 9E 00 44
+==== BB 3094 (0xFEE875C) approx BBs exec'd 0 ====
+
+ 0xFEE875C: 40BAFFE4 bc 5,26,0xFEE8740
+ 0: Jc26o $0xFEE8740
+
+
+
+. 3094 FEE875C 4
+. 40 BA FF E4
+==== BB 3095 (0xFEE8760) approx BBs exec'd 0 ====
+
+ 0xFEE8760: 816E0000 lwz r11,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFEE8764: 81170000 lwz r8,0(r23)
+ 4: GETL R23, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R8
+ 7: INCEIPL $4
+
+ 0xFEE8768: 7D8B28AE lbzx r12,r11,r5
+ 8: GETL R5, t8
+ 9: GETL R11, t10
+ 10: ADDL t10, t8
+ 11: LDB (t8), t12
+ 12: PUTL t12, R12
+ 13: INCEIPL $4
+
+ 0xFEE876C: 558B1838 rlwinm r11,r12,3,0,28
+ 14: GETL R12, t14
+ 15: SHLL $0x3, t14
+ 16: PUTL t14, R11
+ 17: INCEIPL $4
+
+ 0xFEE8770: 7F0B4214 add r24,r11,r8
+ 18: GETL R11, t16
+ 19: GETL R8, t18
+ 20: ADDL t16, t18
+ 21: PUTL t18, R24
+ 22: INCEIPL $4
+
+ 0xFEE8774: 8AD80004 lbz r22,4(r24)
+ 23: GETL R24, t20
+ 24: ADDL $0x4, t20
+ 25: LDB (t20), t22
+ 26: PUTL t22, R22
+ 27: INCEIPL $4
+
+ 0xFEE8778: 2F960000 cmpi cr7,r22,0
+ 28: GETL R22, t24
+ 29: CMP0L t24, t26 (-rSo)
+ 30: ICRFL t26, $0x7, CR
+ 31: INCEIPL $4
+
+ 0xFEE877C: 41BEFFC4 bc 13,30,0xFEE8740
+ 32: Js30o $0xFEE8740
+
+
+
+. 3095 FEE8760 32
+. 81 6E 00 00 81 17 00 00 7D 8B 28 AE 55 8B 18 38 7F 0B 42 14 8A D8 00 04 2F 96 00 00 41 BE FF C4
+==== BB 3096 (0xFEE8780) approx BBs exec'd 0 ====
+
+ 0xFEE8780: 38C00001 li r6,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0xFEE8784: 7D2B402E lwzx r9,r11,r8
+ 3: GETL R8, t2
+ 4: GETL R11, t4
+ 5: ADDL t4, t2
+ 6: LDL (t2), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0xFEE8788: 2F060000 cmpi cr6,r6,0
+ 9: GETL R6, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x6, CR
+ 12: INCEIPL $4
+
+ 0xFEE878C: 91240000 stw r9,0(r4)
+ 13: GETL R9, t12
+ 14: GETL R4, t14
+ 15: STL t12, (t14)
+ 16: INCEIPL $4
+
+ 0xFEE8790: 4BFFFFB0 b 0xFEE8740
+ 17: JMPo $0xFEE8740 ($4)
+
+
+
+. 3096 FEE8780 20
+. 38 C0 00 01 7D 2B 40 2E 2F 06 00 00 91 24 00 00 4B FF FF B0
+==== BB 3097 (0xFEE8740) approx BBs exec'd 0 ====
+
+ 0xFEE8740: 7CE03039 and. r0,r7,r6
+ 0: GETL R7, t0
+ 1: GETL R6, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFEE8744: 2F850000 cmpi cr7,r5,0
+ 7: GETL R5, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0xFEE8748: 38A5FFFF addi r5,r5,-1
+ 11: GETL R5, t10
+ 12: ADDL $0xFFFFFFFF, t10
+ 13: PUTL t10, R5
+ 14: INCEIPL $4
+
+ 0xFEE874C: 40820048 bc 4,2,0xFEE8794
+ 15: Jc02o $0xFEE8794
+
+
+
+. 3097 FEE8740 16
+. 7C E0 30 39 2F 85 00 00 38 A5 FF FF 40 82 00 48
+==== BB 3098 (0xFEE8794) approx BBs exec'd 0 ====
+
+ 0xFEE8794: 40BAFF20 bc 5,26,0xFEE86B4
+ 0: Jc26o $0xFEE86B4
+
+
+
+. 3098 FEE8794 4
+. 40 BA FF 20
+==== BB 3099 (0xFEE86B4) approx BBs exec'd 0 ====
+
+ 0xFEE86B4: 80EA0000 lwz r7,0(r10)
+ 0: GETL R10, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0xFEE86B8: 39400001 li r10,1
+ 4: MOVL $0x1, t4
+ 5: PUTL t4, R10
+ 6: INCEIPL $4
+
+ 0xFEE86BC: 80C40000 lwz r6,0(r4)
+ 7: GETL R4, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R6
+ 10: INCEIPL $4
+
+ 0xFEE86C0: 80BE1A78 lwz r5,6776(r30)
+ 11: GETL R30, t10
+ 12: ADDL $0x1A78, t10
+ 13: LDL (t10), t12
+ 14: PUTL t12, R5
+ 15: INCEIPL $4
+
+ 0xFEE86C4: 7EE700D0 neg r23,r7
+ 16: GETL R7, t14
+ 17: NEGL t14
+ 18: PUTL t14, R23
+ 19: INCEIPL $4
+
+ 0xFEE86C8: 7CE83278 xor r8,r7,r6
+ 20: GETL R7, t16
+ 21: GETL R6, t18
+ 22: XORL t16, t18
+ 23: PUTL t18, R8
+ 24: INCEIPL $4
+
+ 0xFEE86CC: 81DE1D40 lwz r14,7488(r30)
+ 25: GETL R30, t20
+ 26: ADDL $0x1D40, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R14
+ 29: INCEIPL $4
+
+ 0xFEE86D0: 3128FFFF addic r9,r8,-1
+ 30: GETL R8, t24
+ 31: ADCL $0xFFFFFFFF, t24 (-wCa)
+ 32: PUTL t24, R9
+ 33: INCEIPL $4
+
+ 0xFEE86D4: 7C894110 subfe r4,r9,r8
+ 34: GETL R9, t26
+ 35: GETL R8, t28
+ 36: SBBL t26, t28 (-rCa-wCa)
+ 37: PUTL t28, R4
+ 38: INCEIPL $4
+
+ 0xFEE86D8: 91540000 stw r10,0(r20)
+ 39: GETL R10, t30
+ 40: GETL R20, t32
+ 41: STL t30, (t32)
+ 42: INCEIPL $4
+
+ 0xFEE86DC: 90850000 stw r4,0(r5)
+ 43: GETL R4, t34
+ 44: GETL R5, t36
+ 45: STL t34, (t36)
+ 46: INCEIPL $4
+
+ 0xFEE86E0: 92EE0000 stw r23,0(r14)
+ 47: GETL R23, t38
+ 48: GETL R14, t40
+ 49: STL t38, (t40)
+ 50: INCEIPL $4
+
+ 0xFEE86E4: 4BFFF7D0 b 0xFEE7EB4
+ 51: JMPo $0xFEE7EB4 ($4)
+
+
+
+. 3099 FEE86B4 52
+. 80 EA 00 00 39 40 00 01 80 C4 00 00 80 BE 1A 78 7E E7 00 D0 7C E8 32 78 81 DE 1D 40 31 28 FF FF 7C 89 41 10 91 54 00 00 90 85 00 00 92 EE 00 00 4B FF F7 D0
+==== BB 3100 (0xFEE7EB4) approx BBs exec'd 0 ====
+
+ 0xFEE7EB4: 80610000 lwz r3,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEE7EB8: 82230004 lwz r17,4(r3)
+ 4: GETL R3, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R17
+ 8: INCEIPL $4
+
+ 0xFEE7EBC: 81C3FFB8 lwz r14,-72(r3)
+ 9: GETL R3, t8
+ 10: ADDL $0xFFFFFFB8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R14
+ 13: INCEIPL $4
+
+ 0xFEE7EC0: 7E2803A6 mtlr r17
+ 14: GETL R17, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0xFEE7EC4: 81E3FFBC lwz r15,-68(r3)
+ 17: GETL R3, t14
+ 18: ADDL $0xFFFFFFBC, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R15
+ 21: INCEIPL $4
+
+ 0xFEE7EC8: 8203FFC0 lwz r16,-64(r3)
+ 22: GETL R3, t18
+ 23: ADDL $0xFFFFFFC0, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R16
+ 26: INCEIPL $4
+
+ 0xFEE7ECC: 8223FFC4 lwz r17,-60(r3)
+ 27: GETL R3, t22
+ 28: ADDL $0xFFFFFFC4, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R17
+ 31: INCEIPL $4
+
+ 0xFEE7ED0: 8243FFC8 lwz r18,-56(r3)
+ 32: GETL R3, t26
+ 33: ADDL $0xFFFFFFC8, t26
+ 34: LDL (t26), t28
+ 35: PUTL t28, R18
+ 36: INCEIPL $4
+
+ 0xFEE7ED4: 8263FFCC lwz r19,-52(r3)
+ 37: GETL R3, t30
+ 38: ADDL $0xFFFFFFCC, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R19
+ 41: INCEIPL $4
+
+ 0xFEE7ED8: 8283FFD0 lwz r20,-48(r3)
+ 42: GETL R3, t34
+ 43: ADDL $0xFFFFFFD0, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R20
+ 46: INCEIPL $4
+
+ 0xFEE7EDC: 82A3FFD4 lwz r21,-44(r3)
+ 47: GETL R3, t38
+ 48: ADDL $0xFFFFFFD4, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R21
+ 51: INCEIPL $4
+
+ 0xFEE7EE0: 82C3FFD8 lwz r22,-40(r3)
+ 52: GETL R3, t42
+ 53: ADDL $0xFFFFFFD8, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R22
+ 56: INCEIPL $4
+
+ 0xFEE7EE4: 82E3FFDC lwz r23,-36(r3)
+ 57: GETL R3, t46
+ 58: ADDL $0xFFFFFFDC, t46
+ 59: LDL (t46), t48
+ 60: PUTL t48, R23
+ 61: INCEIPL $4
+
+ 0xFEE7EE8: 8303FFE0 lwz r24,-32(r3)
+ 62: GETL R3, t50
+ 63: ADDL $0xFFFFFFE0, t50
+ 64: LDL (t50), t52
+ 65: PUTL t52, R24
+ 66: INCEIPL $4
+
+ 0xFEE7EEC: 8323FFE4 lwz r25,-28(r3)
+ 67: GETL R3, t54
+ 68: ADDL $0xFFFFFFE4, t54
+ 69: LDL (t54), t56
+ 70: PUTL t56, R25
+ 71: INCEIPL $4
+
+ 0xFEE7EF0: 8343FFE8 lwz r26,-24(r3)
+ 72: GETL R3, t58
+ 73: ADDL $0xFFFFFFE8, t58
+ 74: LDL (t58), t60
+ 75: PUTL t60, R26
+ 76: INCEIPL $4
+
+ 0xFEE7EF4: 8363FFEC lwz r27,-20(r3)
+ 77: GETL R3, t62
+ 78: ADDL $0xFFFFFFEC, t62
+ 79: LDL (t62), t64
+ 80: PUTL t64, R27
+ 81: INCEIPL $4
+
+ 0xFEE7EF8: 8383FFF0 lwz r28,-16(r3)
+ 82: GETL R3, t66
+ 83: ADDL $0xFFFFFFF0, t66
+ 84: LDL (t66), t68
+ 85: PUTL t68, R28
+ 86: INCEIPL $4
+
+ 0xFEE7EFC: 83A3FFF4 lwz r29,-12(r3)
+ 87: GETL R3, t70
+ 88: ADDL $0xFFFFFFF4, t70
+ 89: LDL (t70), t72
+ 90: PUTL t72, R29
+ 91: INCEIPL $4
+
+ 0xFEE7F00: 83C3FFF8 lwz r30,-8(r3)
+ 92: GETL R3, t74
+ 93: ADDL $0xFFFFFFF8, t74
+ 94: LDL (t74), t76
+ 95: PUTL t76, R30
+ 96: INCEIPL $4
+
+ 0xFEE7F04: 83E3FFFC lwz r31,-4(r3)
+ 97: GETL R3, t78
+ 98: ADDL $0xFFFFFFFC, t78
+ 99: LDL (t78), t80
+ 100: PUTL t80, R31
+ 101: INCEIPL $4
+
+ 0xFEE7F08: 7C611B78 or r1,r3,r3
+ 102: GETL R3, t82
+ 103: PUTL t82, R1
+ 104: INCEIPL $4
+
+ 0xFEE7F0C: 4E800020 blr
+ 105: GETL LR, t84
+ 106: JMPo-r t84 ($4)
+
+
+
+. 3100 FEE7EB4 92
+. 80 61 00 00 82 23 00 04 81 C3 FF B8 7E 28 03 A6 81 E3 FF BC 82 03 FF C0 82 23 FF C4 82 43 FF C8 82 63 FF CC 82 83 FF D0 82 A3 FF D4 82 C3 FF D8 82 E3 FF DC 83 03 FF E0 83 23 FF E4 83 43 FF E8 83 63 FF EC 83 83 FF F0 83 A3 FF F4 83 C3 FF F8 83 E3 FF FC 7C 61 1B 78 4E 80 00 20
+==== BB 3101 (0xFEE6F60) approx BBs exec'd 0 ====
+
+ 0xFEE6F60: 83B90000 lwz r29,0(r25)
+ 0: GETL R25, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0xFEE6F64: 2F9D0000 cmpi cr7,r29,0
+ 4: GETL R29, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFEE6F68: 40BEFEDC bc 5,30,0xFEE6E44
+ 8: Jc30o $0xFEE6E44
+
+
+
+. 3101 FEE6F60 12
+. 83 B9 00 00 2F 9D 00 00 40 BE FE DC
+==== BB 3102 (0xFEE6E44) approx BBs exec'd 0 ====
+
+ 0xFEE6E44: 80C10000 lwz r6,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFEE6E48: 80660004 lwz r3,4(r6)
+ 4: GETL R6, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFEE6E4C: 80E6FFD4 lwz r7,-44(r6)
+ 9: GETL R6, t8
+ 10: ADDL $0xFFFFFFD4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R7
+ 13: INCEIPL $4
+
+ 0xFEE6E50: 82C6FFD8 lwz r22,-40(r6)
+ 14: GETL R6, t12
+ 15: ADDL $0xFFFFFFD8, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R22
+ 18: INCEIPL $4
+
+ 0xFEE6E54: 7C6803A6 mtlr r3
+ 19: GETL R3, t16
+ 20: PUTL t16, LR
+ 21: INCEIPL $4
+
+ 0xFEE6E58: 82E6FFDC lwz r23,-36(r6)
+ 22: GETL R6, t18
+ 23: ADDL $0xFFFFFFDC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R23
+ 26: INCEIPL $4
+
+ 0xFEE6E5C: 7CE08120 mtcrf 0x8,r7
+ 27: GETL R7, t22
+ 28: ICRFL t22, $0x4, CR
+ 29: INCEIPL $4
+
+ 0xFEE6E60: 8306FFE0 lwz r24,-32(r6)
+ 30: GETL R6, t24
+ 31: ADDL $0xFFFFFFE0, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R24
+ 34: INCEIPL $4
+
+ 0xFEE6E64: 8326FFE4 lwz r25,-28(r6)
+ 35: GETL R6, t28
+ 36: ADDL $0xFFFFFFE4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R25
+ 39: INCEIPL $4
+
+ 0xFEE6E68: 8346FFE8 lwz r26,-24(r6)
+ 40: GETL R6, t32
+ 41: ADDL $0xFFFFFFE8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R26
+ 44: INCEIPL $4
+
+ 0xFEE6E6C: 8366FFEC lwz r27,-20(r6)
+ 45: GETL R6, t36
+ 46: ADDL $0xFFFFFFEC, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R27
+ 49: INCEIPL $4
+
+ 0xFEE6E70: 8386FFF0 lwz r28,-16(r6)
+ 50: GETL R6, t40
+ 51: ADDL $0xFFFFFFF0, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R28
+ 54: INCEIPL $4
+
+ 0xFEE6E74: 83A6FFF4 lwz r29,-12(r6)
+ 55: GETL R6, t44
+ 56: ADDL $0xFFFFFFF4, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R29
+ 59: INCEIPL $4
+
+ 0xFEE6E78: 83C6FFF8 lwz r30,-8(r6)
+ 60: GETL R6, t48
+ 61: ADDL $0xFFFFFFF8, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R30
+ 64: INCEIPL $4
+
+ 0xFEE6E7C: 83E6FFFC lwz r31,-4(r6)
+ 65: GETL R6, t52
+ 66: ADDL $0xFFFFFFFC, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R31
+ 69: INCEIPL $4
+
+ 0xFEE6E80: 7CC13378 or r1,r6,r6
+ 70: GETL R6, t56
+ 71: PUTL t56, R1
+ 72: INCEIPL $4
+
+ 0xFEE6E84: 4E800020 blr
+ 73: GETL LR, t58
+ 74: JMPo-r t58 ($4)
+
+
+
+. 3102 FEE6E44 68
+. 80 C1 00 00 80 66 00 04 80 E6 FF D4 82 C6 FF D8 7C 68 03 A6 82 E6 FF DC 7C E0 81 20 83 06 FF E0 83 26 FF E4 83 46 FF E8 83 66 FF EC 83 86 FF F0 83 A6 FF F4 83 C6 FF F8 83 E6 FF FC 7C C1 33 78 4E 80 00 20
+==== BB 3103 (0xFEE7C04) approx BBs exec'd 0 ====
+
+ 0xFEE7C04: 80BA0000 lwz r5,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFEE7C08: 2C850000 cmpi cr1,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFEE7C0C: 40860114 bc 4,6,0xFEE7D20
+ 8: Jc06o $0xFEE7D20
+
+
+
+. 3103 FEE7C04 12
+. 80 BA 00 00 2C 85 00 00 40 86 01 14
+==== BB 3104 (0xFEE7D20) approx BBs exec'd 0 ====
+
+ 0xFEE7D20: 807B0000 lwz r3,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEE7D24: 7F84E378 or r4,r28,r28
+ 4: GETL R28, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0xFEE7D28: 38A10008 addi r5,r1,8
+ 7: GETL R1, t6
+ 8: ADDL $0x8, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0xFEE7D2C: 38C1000C addi r6,r1,12
+ 11: GETL R1, t8
+ 12: ADDL $0xC, t8
+ 13: PUTL t8, R6
+ 14: INCEIPL $4
+
+ 0xFEE7D30: 7FE7FB78 or r7,r31,r31
+ 15: GETL R31, t10
+ 16: PUTL t10, R7
+ 17: INCEIPL $4
+
+ 0xFEE7D34: 48000D09 bl 0xFEE8A3C
+ 18: MOVL $0xFEE7D38, t12
+ 19: PUTL t12, LR
+ 20: JMPo-c $0xFEE8A3C ($4)
+
+
+
+. 3104 FEE7D20 24
+. 80 7B 00 00 7F 84 E3 78 38 A1 00 08 38 C1 00 0C 7F E7 FB 78 48 00 0D 09
+==== BB 3105 __tzfile_compute(0xFEE8A3C) approx BBs exec'd 0 ====
+
+ 0xFEE8A3C: 2F840000 cmpi cr7,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFEE8A40: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFEE8A44: 9421FFC0 stwu r1,-64(r1)
+ 7: GETL R1, t6
+ 8: GETL R1, t8
+ 9: ADDL $0xFFFFFFC0, t8
+ 10: PUTL t8, R1
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEE8A48: 480BF409 bl 0xFFA7E50
+ 13: MOVL $0xFEE8A4C, t10
+ 14: PUTL t10, LR
+ 15: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3105 FEE8A3C 16
+. 2F 84 00 00 7C 08 02 A6 94 21 FF C0 48 0B F4 09
+==== BB 3106 (0xFEE8A4C) approx BBs exec'd 0 ====
+
+ 0xFEE8A4C: 9261000C stw r19,12(r1)
+ 0: GETL R19, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEE8A50: 7CD33378 or r19,r6,r6
+ 5: GETL R6, t4
+ 6: PUTL t4, R19
+ 7: INCEIPL $4
+
+ 0xFEE8A54: 92810010 stw r20,16(r1)
+ 8: GETL R20, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEE8A58: 7CB42B78 or r20,r5,r5
+ 13: GETL R5, t10
+ 14: PUTL t10, R20
+ 15: INCEIPL $4
+
+ 0xFEE8A5C: 92C10018 stw r22,24(r1)
+ 16: GETL R22, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x18, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFEE8A60: 7CF63B78 or r22,r7,r7
+ 21: GETL R7, t16
+ 22: PUTL t16, R22
+ 23: INCEIPL $4
+
+ 0xFEE8A64: 93410028 stw r26,40(r1)
+ 24: GETL R26, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x28, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xFEE8A68: 7C7A1B78 or r26,r3,r3
+ 29: GETL R3, t22
+ 30: PUTL t22, R26
+ 31: INCEIPL $4
+
+ 0xFEE8A6C: 93C10038 stw r30,56(r1)
+ 32: GETL R30, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x38, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0xFEE8A70: 7FC802A6 mflr r30
+ 37: GETL LR, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0xFEE8A74: 92A10014 stw r21,20(r1)
+ 40: GETL R21, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x14, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0xFEE8A78: 92E1001C stw r23,28(r1)
+ 45: GETL R23, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x1C, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0xFEE8A7C: 93010020 stw r24,32(r1)
+ 50: GETL R24, t38
+ 51: GETL R1, t40
+ 52: ADDL $0x20, t40
+ 53: STL t38, (t40)
+ 54: INCEIPL $4
+
+ 0xFEE8A80: 93210024 stw r25,36(r1)
+ 55: GETL R25, t42
+ 56: GETL R1, t44
+ 57: ADDL $0x24, t44
+ 58: STL t42, (t44)
+ 59: INCEIPL $4
+
+ 0xFEE8A84: 9361002C stw r27,44(r1)
+ 60: GETL R27, t46
+ 61: GETL R1, t48
+ 62: ADDL $0x2C, t48
+ 63: STL t46, (t48)
+ 64: INCEIPL $4
+
+ 0xFEE8A88: 93810030 stw r28,48(r1)
+ 65: GETL R28, t50
+ 66: GETL R1, t52
+ 67: ADDL $0x30, t52
+ 68: STL t50, (t52)
+ 69: INCEIPL $4
+
+ 0xFEE8A8C: 93A10034 stw r29,52(r1)
+ 70: GETL R29, t54
+ 71: GETL R1, t56
+ 72: ADDL $0x34, t56
+ 73: STL t54, (t56)
+ 74: INCEIPL $4
+
+ 0xFEE8A90: 93E1003C stw r31,60(r1)
+ 75: GETL R31, t58
+ 76: GETL R1, t60
+ 77: ADDL $0x3C, t60
+ 78: STL t58, (t60)
+ 79: INCEIPL $4
+
+ 0xFEE8A94: 90010044 stw r0,68(r1)
+ 80: GETL R0, t62
+ 81: GETL R1, t64
+ 82: ADDL $0x44, t64
+ 83: STL t62, (t64)
+ 84: INCEIPL $4
+
+ 0xFEE8A98: 419E0170 bc 12,30,0xFEE8C08
+ 85: Js30o $0xFEE8C08
+
+
+
+. 3106 FEE8A4C 80
+. 92 61 00 0C 7C D3 33 78 92 81 00 10 7C B4 2B 78 92 C1 00 18 7C F6 3B 78 93 41 00 28 7C 7A 1B 78 93 C1 00 38 7F C8 02 A6 92 A1 00 14 92 E1 00 1C 93 01 00 20 93 21 00 24 93 61 00 2C 93 81 00 30 93 A1 00 34 93 E1 00 3C 90 01 00 44 41 9E 01 70
+==== BB 3107 (0xFEE8A9C) approx BBs exec'd 0 ====
+
+ 0xFEE8A9C: 80DE08E4 lwz r6,2276(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8E4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFEE8AA0: 81660000 lwz r11,0(r6)
+ 5: GETL R6, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0xFEE8AA4: 2C0B0000 cmpi cr0,r11,0
+ 9: GETL R11, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFEE8AA8: 408201F8 bc 4,2,0xFEE8CA0
+ 13: Jc02o $0xFEE8CA0
+
+
+
+. 3107 FEE8A9C 16
+. 80 DE 08 E4 81 66 00 00 2C 0B 00 00 40 82 01 F8
+==== BB 3108 (0xFEE8CA0) approx BBs exec'd 0 ====
+
+ 0xFEE8CA0: 813E08CC lwz r9,2252(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8CC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEE8CA4: 81290000 lwz r9,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0xFEE8CA8: 80690000 lwz r3,0(r9)
+ 9: GETL R9, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R3
+ 12: INCEIPL $4
+
+ 0xFEE8CAC: 7C83D000 cmp cr1,r3,r26
+ 13: GETL R3, t12
+ 14: GETL R26, t14
+ 15: CMPL t12, t14, t16 (-rSo)
+ 16: ICRFL t16, $0x1, CR
+ 17: INCEIPL $4
+
+ 0xFEE8CB0: 41A5FDFC bc 13,5,0xFEE8AAC
+ 18: Js05o $0xFEE8AAC
+
+
+
+. 3108 FEE8CA0 20
+. 81 3E 08 CC 81 29 00 00 80 69 00 00 7C 83 D0 00 41 A5 FD FC
+==== BB 3109 (0xFEE8CB4) approx BBs exec'd 0 ====
+
+ 0xFEE8CB4: 39400001 li r10,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFEE8CB8: 7F0A5840 cmpl cr6,r10,r11
+ 3: GETL R10, t2
+ 4: GETL R11, t4
+ 5: CMPUL t2, t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0xFEE8CBC: 40980024 bc 4,24,0xFEE8CE0
+ 8: Jc24o $0xFEE8CE0
+
+
+
+. 3109 FEE8CB4 12
+. 39 40 00 01 7F 0A 58 40 40 98 00 24
+==== BB 3110 (0xFEE8CC0) approx BBs exec'd 0 ====
+
+ 0xFEE8CC0: 7D284B78 or r8,r9,r9
+ 0: GETL R9, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0xFEE8CC4: 554C103A rlwinm r12,r10,2,0,29
+ 3: GETL R10, t2
+ 4: SHLL $0x2, t2
+ 5: PUTL t2, R12
+ 6: INCEIPL $4
+
+ 0xFEE8CC8: 7CEC402E lwzx r7,r12,r8
+ 7: GETL R8, t4
+ 8: GETL R12, t6
+ 9: ADDL t6, t4
+ 10: LDL (t4), t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0xFEE8CCC: 7F87D000 cmp cr7,r7,r26
+ 13: GETL R7, t10
+ 14: GETL R26, t12
+ 15: CMPL t10, t12, t14 (-rSo)
+ 16: ICRFL t14, $0x7, CR
+ 17: INCEIPL $4
+
+ 0xFEE8CD0: 419D0010 bc 12,29,0xFEE8CE0
+ 18: Js29o $0xFEE8CE0
+
+
+
+. 3110 FEE8CC0 20
+. 7D 28 4B 78 55 4C 10 3A 7C EC 40 2E 7F 87 D0 00 41 9D 00 10
+==== BB 3111 (0xFEE8CD4) approx BBs exec'd 0 ====
+
+ 0xFEE8CD4: 394A0001 addi r10,r10,1
+ 0: GETL R10, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0xFEE8CD8: 7C0A5840 cmpl cr0,r10,r11
+ 4: GETL R10, t2
+ 5: GETL R11, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFEE8CDC: 4180FFE8 bc 12,0,0xFEE8CC4
+ 9: Js00o $0xFEE8CC4
+
+
+
+. 3111 FEE8CD4 12
+. 39 4A 00 01 7C 0A 58 40 41 80 FF E8
+==== BB 3112 (0xFEE8CC4) approx BBs exec'd 0 ====
+
+ 0xFEE8CC4: 554C103A rlwinm r12,r10,2,0,29
+ 0: GETL R10, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0xFEE8CC8: 7CEC402E lwzx r7,r12,r8
+ 4: GETL R8, t2
+ 5: GETL R12, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0xFEE8CCC: 7F87D000 cmp cr7,r7,r26
+ 10: GETL R7, t8
+ 11: GETL R26, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFEE8CD0: 419D0010 bc 12,29,0xFEE8CE0
+ 15: Js29o $0xFEE8CE0
+
+
+
+. 3112 FEE8CC4 16
+. 55 4C 10 3A 7C EC 40 2E 7F 87 D0 00 41 9D 00 10
+==== BB 3113 (0xFEE8CE0) approx BBs exec'd 0 ====
+
+ 0xFEE8CE0: 817E08E8 lwz r11,2280(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFEE8CE4: 831E08F0 lwz r24,2288(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x8F0, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R24
+ 9: INCEIPL $4
+
+ 0xFEE8CE8: 82AB0000 lwz r21,0(r11)
+ 10: GETL R11, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R21
+ 13: INCEIPL $4
+
+ 0xFEE8CEC: 7D155214 add r8,r21,r10
+ 14: GETL R21, t12
+ 15: GETL R10, t14
+ 16: ADDL t12, t14
+ 17: PUTL t14, R8
+ 18: INCEIPL $4
+
+ 0xFEE8CF0: 88E8FFFF lbz r7,-1(r8)
+ 19: GETL R8, t16
+ 20: ADDL $0xFFFFFFFF, t16
+ 21: LDB (t16), t18
+ 22: PUTL t18, R7
+ 23: INCEIPL $4
+
+ 0xFEE8CF4: 4BFFFE14 b 0xFEE8B08
+ 24: JMPo $0xFEE8B08 ($4)
+
+
+
+. 3113 FEE8CE0 24
+. 81 7E 08 E8 83 1E 08 F0 82 AB 00 00 7D 15 52 14 88 E8 FF FF 4B FF FE 14
+==== BB 3114 (0xFEE8B08) approx BBs exec'd 0 ====
+
+ 0xFEE8B08: 83860000 lwz r28,0(r6)
+ 0: GETL R6, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R28
+ 3: INCEIPL $4
+
+ 0xFEE8B0C: 3AE00000 li r23,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R23
+ 6: INCEIPL $4
+
+ 0xFEE8B10: 813E08FC lwz r9,2300(r30)
+ 7: GETL R30, t6
+ 8: ADDL $0x8FC, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R9
+ 11: INCEIPL $4
+
+ 0xFEE8B14: 54FD1838 rlwinm r29,r7,3,0,28
+ 12: GETL R7, t10
+ 13: SHLL $0x3, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0xFEE8B18: 815E08F8 lwz r10,2296(r30)
+ 16: GETL R30, t12
+ 17: ADDL $0x8F8, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R10
+ 20: INCEIPL $4
+
+ 0xFEE8B1C: 2C9C0000 cmpi cr1,r28,0
+ 21: GETL R28, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x1, CR
+ 24: INCEIPL $4
+
+ 0xFEE8B20: 83690000 lwz r27,0(r9)
+ 25: GETL R9, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R27
+ 28: INCEIPL $4
+
+ 0xFEE8B24: 80AA0000 lwz r5,0(r10)
+ 29: GETL R10, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R5
+ 32: INCEIPL $4
+
+ 0xFEE8B28: 833E1D40 lwz r25,7488(r30)
+ 33: GETL R30, t28
+ 34: ADDL $0x1D40, t28
+ 35: LDL (t28), t30
+ 36: PUTL t30, R25
+ 37: INCEIPL $4
+
+ 0xFEE8B2C: 7CA0DA78 xor r0,r5,r27
+ 38: GETL R5, t32
+ 39: GETL R27, t34
+ 40: XORL t32, t34
+ 41: PUTL t34, R0
+ 42: INCEIPL $4
+
+ 0xFEE8B30: 80D80000 lwz r6,0(r24)
+ 43: GETL R24, t36
+ 44: LDL (t36), t38
+ 45: PUTL t38, R6
+ 46: INCEIPL $4
+
+ 0xFEE8B34: 837E1AE4 lwz r27,6884(r30)
+ 47: GETL R30, t40
+ 48: ADDL $0x1AE4, t40
+ 49: LDL (t40), t42
+ 50: PUTL t42, R27
+ 51: INCEIPL $4
+
+ 0xFEE8B38: 3120FFFF addic r9,r0,-1
+ 52: GETL R0, t44
+ 53: ADCL $0xFFFFFFFF, t44 (-wCa)
+ 54: PUTL t44, R9
+ 55: INCEIPL $4
+
+ 0xFEE8B3C: 7C890110 subfe r4,r9,r0
+ 56: GETL R9, t46
+ 57: GETL R0, t48
+ 58: SBBL t46, t48 (-rCa-wCa)
+ 59: PUTL t48, R4
+ 60: INCEIPL $4
+
+ 0xFEE8B40: 807E1A78 lwz r3,6776(r30)
+ 61: GETL R30, t50
+ 62: ADDL $0x1A78, t50
+ 63: LDL (t50), t52
+ 64: PUTL t52, R3
+ 65: INCEIPL $4
+
+ 0xFEE8B44: 7FE500D0 neg r31,r5
+ 66: GETL R5, t54
+ 67: NEGL t54
+ 68: PUTL t54, R31
+ 69: INCEIPL $4
+
+ 0xFEE8B48: 93F90000 stw r31,0(r25)
+ 70: GETL R31, t56
+ 71: GETL R25, t58
+ 72: STL t56, (t58)
+ 73: INCEIPL $4
+
+ 0xFEE8B4C: 7F3D3214 add r25,r29,r6
+ 74: GETL R29, t60
+ 75: GETL R6, t62
+ 76: ADDL t60, t62
+ 77: PUTL t62, R25
+ 78: INCEIPL $4
+
+ 0xFEE8B50: 90830000 stw r4,0(r3)
+ 79: GETL R4, t64
+ 80: GETL R3, t66
+ 81: STL t64, (t66)
+ 82: INCEIPL $4
+
+ 0xFEE8B54: 92FB0004 stw r23,4(r27)
+ 83: GETL R23, t68
+ 84: GETL R27, t70
+ 85: ADDL $0x4, t70
+ 86: STL t68, (t70)
+ 87: INCEIPL $4
+
+ 0xFEE8B58: 92FB0000 stw r23,0(r27)
+ 88: GETL R23, t72
+ 89: GETL R27, t74
+ 90: STL t72, (t74)
+ 91: INCEIPL $4
+
+ 0xFEE8B5C: 82BE08EC lwz r21,2284(r30)
+ 92: GETL R30, t76
+ 93: ADDL $0x8EC, t76
+ 94: LDL (t76), t78
+ 95: PUTL t78, R21
+ 96: INCEIPL $4
+
+ 0xFEE8B60: 41860068 bc 12,6,0xFEE8BC8
+ 97: Js06o $0xFEE8BC8
+
+
+
+. 3114 FEE8B08 92
+. 83 86 00 00 3A E0 00 00 81 3E 08 FC 54 FD 18 38 81 5E 08 F8 2C 9C 00 00 83 69 00 00 80 AA 00 00 83 3E 1D 40 7C A0 DA 78 80 D8 00 00 83 7E 1A E4 31 20 FF FF 7C 89 01 10 80 7E 1A 78 7F E5 00 D0 93 F9 00 00 7F 3D 32 14 90 83 00 00 92 FB 00 04 92 FB 00 00 82 BE 08 EC 41 86 00 68
+==== BB 3115 (0xFEE8B64) approx BBs exec'd 0 ====
+
+ 0xFEE8B64: 82FE08E8 lwz r23,2280(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0xFEE8B68: 4800000C b 0xFEE8B74
+ 5: JMPo $0xFEE8B74 ($4)
+
+
+
+. 3115 FEE8B64 8
+. 82 FE 08 E8 48 00 00 0C
+==== BB 3116 (0xFEE8B74) approx BBs exec'd 0 ====
+
+ 0xFEE8B74: 83B70000 lwz r29,0(r23)
+ 0: GETL R23, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0xFEE8B78: 3B9CFFFF addi r28,r28,-1
+ 4: GETL R28, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFEE8B7C: 81780000 lwz r11,0(r24)
+ 8: GETL R24, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0xFEE8B80: 7CDCE8AE lbzx r6,r28,r29
+ 12: GETL R29, t10
+ 13: GETL R28, t12
+ 14: ADDL t12, t10
+ 15: LDB (t10), t14
+ 16: PUTL t14, R6
+ 17: INCEIPL $4
+
+ 0xFEE8B84: 54C81838 rlwinm r8,r6,3,0,28
+ 18: GETL R6, t16
+ 19: SHLL $0x3, t16
+ 20: PUTL t16, R8
+ 21: INCEIPL $4
+
+ 0xFEE8B88: 7D885A14 add r12,r8,r11
+ 22: GETL R8, t18
+ 23: GETL R11, t20
+ 24: ADDL t18, t20
+ 25: PUTL t20, R12
+ 26: INCEIPL $4
+
+ 0xFEE8B8C: 8BAC0004 lbz r29,4(r12)
+ 27: GETL R12, t22
+ 28: ADDL $0x4, t22
+ 29: LDB (t22), t24
+ 30: PUTL t24, R29
+ 31: INCEIPL $4
+
+ 0xFEE8B90: 892C0005 lbz r9,5(r12)
+ 32: GETL R12, t26
+ 33: ADDL $0x5, t26
+ 34: LDB (t26), t28
+ 35: PUTL t28, R9
+ 36: INCEIPL $4
+
+ 0xFEE8B94: 57BF103A rlwinm r31,r29,2,0,29
+ 37: GETL R29, t30
+ 38: SHLL $0x2, t30
+ 39: PUTL t30, R31
+ 40: INCEIPL $4
+
+ 0xFEE8B98: 7CFFD82E lwzx r7,r31,r27
+ 41: GETL R27, t32
+ 42: GETL R31, t34
+ 43: ADDL t34, t32
+ 44: LDL (t32), t36
+ 45: PUTL t36, R7
+ 46: INCEIPL $4
+
+ 0xFEE8B9C: 2F070000 cmpi cr6,r7,0
+ 47: GETL R7, t38
+ 48: CMP0L t38, t40 (-rSo)
+ 49: ICRFL t40, $0x6, CR
+ 50: INCEIPL $4
+
+ 0xFEE8BA0: 409AFFCC bc 4,26,0xFEE8B6C
+ 51: Jc26o $0xFEE8B6C
+
+
+
+. 3116 FEE8B74 48
+. 83 B7 00 00 3B 9C FF FF 81 78 00 00 7C DC E8 AE 54 C8 18 38 7D 88 5A 14 8B AC 00 04 89 2C 00 05 57 BF 10 3A 7C FF D8 2E 2F 07 00 00 40 9A FF CC
+==== BB 3117 (0xFEE8BA4) approx BBs exec'd 0 ====
+
+ 0xFEE8BA4: 80B50000 lwz r5,0(r21)
+ 0: GETL R21, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFEE8BA8: 7C654A14 add r3,r5,r9
+ 4: GETL R5, t4
+ 5: GETL R9, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFEE8BAC: 4BFFE0FD bl 0xFEE6CA8
+ 9: MOVL $0xFEE8BB0, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0xFEE6CA8 ($4)
+
+
+
+. 3117 FEE8BA4 12
+. 80 B5 00 00 7C 65 4A 14 4B FF E0 FD
+==== BB 3118 (0xFEE8BB0) approx BBs exec'd 0 ====
+
+ 0xFEE8BB0: 209D0001 subfic r4,r29,1
+ 0: GETL R29, t0
+ 1: MOVL $0x1, t2
+ 2: SBBL t0, t2 (-wCa)
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFEE8BB4: 7C7FD92E stwx r3,r31,r27
+ 5: GETL R27, t4
+ 6: GETL R31, t6
+ 7: ADDL t6, t4
+ 8: GETL R3, t8
+ 9: STL t8, (t4)
+ 10: INCEIPL $4
+
+ 0xFEE8BB8: 5483103A rlwinm r3,r4,2,0,29
+ 11: GETL R4, t10
+ 12: SHLL $0x2, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0xFEE8BBC: 7FE3D82E lwzx r31,r3,r27
+ 15: GETL R27, t12
+ 16: GETL R3, t14
+ 17: ADDL t14, t12
+ 18: LDL (t12), t16
+ 19: PUTL t16, R31
+ 20: INCEIPL $4
+
+ 0xFEE8BC0: 2F9F0000 cmpi cr7,r31,0
+ 21: GETL R31, t18
+ 22: CMP0L t18, t20 (-rSo)
+ 23: ICRFL t20, $0x7, CR
+ 24: INCEIPL $4
+
+ 0xFEE8BC4: 419EFFA8 bc 12,30,0xFEE8B6C
+ 25: Js30o $0xFEE8B6C
+
+
+
+. 3118 FEE8BB0 24
+. 20 9D 00 01 7C 7F D9 2E 54 83 10 3A 7F E3 D8 2E 2F 9F 00 00 41 9E FF A8
+==== BB 3119 (0xFEE8B6C) approx BBs exec'd 0 ====
+
+ 0xFEE8B6C: 2C1C0000 cmpi cr0,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEE8B70: 41820058 bc 12,2,0xFEE8BC8
+ 4: Js02o $0xFEE8BC8
+
+
+
+. 3119 FEE8B6C 8
+. 2C 1C 00 00 41 82 00 58
+==== BB 3120 (0xFEE8BC8) approx BBs exec'd 0 ====
+
+ 0xFEE8BC8: 807B0000 lwz r3,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEE8BCC: 2C830000 cmpi cr1,r3,0
+ 4: GETL R3, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFEE8BD0: 418601B0 bc 12,6,0xFEE8D80
+ 8: Js06o $0xFEE8D80
+
+
+
+. 3120 FEE8BC8 12
+. 80 7B 00 00 2C 83 00 00 41 86 01 B0
+==== BB 3121 (0xFEE8BD4) approx BBs exec'd 0 ====
+
+ 0xFEE8BD4: 831B0004 lwz r24,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0xFEE8BD8: 2F180000 cmpi cr6,r24,0
+ 5: GETL R24, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFEE8BDC: 409A0008 bc 4,26,0xFEE8BE4
+ 9: Jc26o $0xFEE8BE4
+
+
+
+. 3121 FEE8BD4 12
+. 83 1B 00 04 2F 18 00 00 40 9A 00 08
+==== BB 3122 (0xFEE8BE4) approx BBs exec'd 0 ====
+
+ 0xFEE8BE4: 88190004 lbz r0,4(r25)
+ 0: GETL R25, t0
+ 1: ADDL $0x4, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEE8BE8: 82F50000 lwz r23,0(r21)
+ 5: GETL R21, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R23
+ 8: INCEIPL $4
+
+ 0xFEE8BEC: 90160020 stw r0,32(r22)
+ 9: GETL R0, t8
+ 10: GETL R22, t10
+ 11: ADDL $0x20, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFEE8BF0: 8AB90005 lbz r21,5(r25)
+ 14: GETL R25, t12
+ 15: ADDL $0x5, t12
+ 16: LDB (t12), t14
+ 17: PUTL t14, R21
+ 18: INCEIPL $4
+
+ 0xFEE8BF4: 7C75BA14 add r3,r21,r23
+ 19: GETL R21, t16
+ 20: GETL R23, t18
+ 21: ADDL t16, t18
+ 22: PUTL t18, R3
+ 23: INCEIPL $4
+
+ 0xFEE8BF8: 4BFFE0B1 bl 0xFEE6CA8
+ 24: MOVL $0xFEE8BFC, t20
+ 25: PUTL t20, LR
+ 26: JMPo-c $0xFEE6CA8 ($4)
+
+
+
+. 3122 FEE8BE4 24
+. 88 19 00 04 82 F5 00 00 90 16 00 20 8A B9 00 05 7C 75 BA 14 4B FF E0 B1
+==== BB 3123 (0xFEE8BFC) approx BBs exec'd 0 ====
+
+ 0xFEE8BFC: 83990000 lwz r28,0(r25)
+ 0: GETL R25, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R28
+ 3: INCEIPL $4
+
+ 0xFEE8C00: 90760028 stw r3,40(r22)
+ 4: GETL R3, t4
+ 5: GETL R22, t6
+ 6: ADDL $0x28, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFEE8C04: 93960024 stw r28,36(r22)
+ 9: GETL R28, t8
+ 10: GETL R22, t10
+ 11: ADDL $0x24, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFEE8C08: 3AC00000 li r22,0
+ 14: MOVL $0x0, t12
+ 15: PUTL t12, R22
+ 16: INCEIPL $4
+
+ 0xFEE8C0C: 833E08E0 lwz r25,2272(r30)
+ 17: GETL R30, t14
+ 18: ADDL $0x8E0, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R25
+ 21: INCEIPL $4
+
+ 0xFEE8C10: 92D30000 stw r22,0(r19)
+ 22: GETL R22, t18
+ 23: GETL R19, t20
+ 24: STL t18, (t20)
+ 25: INCEIPL $4
+
+ 0xFEE8C14: 81590000 lwz r10,0(r25)
+ 26: GETL R25, t22
+ 27: LDL (t22), t24
+ 28: PUTL t24, R10
+ 29: INCEIPL $4
+
+ 0xFEE8C18: 811E08F4 lwz r8,2292(r30)
+ 30: GETL R30, t26
+ 31: ADDL $0x8F4, t26
+ 32: LDL (t26), t28
+ 33: PUTL t28, R8
+ 34: INCEIPL $4
+
+ 0xFEE8C1C: 92D40000 stw r22,0(r20)
+ 35: GETL R22, t30
+ 36: GETL R20, t32
+ 37: STL t30, (t32)
+ 38: INCEIPL $4
+
+ 0xFEE8C20: 2F8A0000 cmpi cr7,r10,0
+ 39: GETL R10, t34
+ 40: CMP0L t34, t36 (-rSo)
+ 41: ICRFL t36, $0x7, CR
+ 42: INCEIPL $4
+
+ 0xFEE8C24: 394AFFFF addi r10,r10,-1
+ 43: GETL R10, t38
+ 44: ADDL $0xFFFFFFFF, t38
+ 45: PUTL t38, R10
+ 46: INCEIPL $4
+
+ 0xFEE8C28: 7D054378 or r5,r8,r8
+ 47: GETL R8, t40
+ 48: PUTL t40, R5
+ 49: INCEIPL $4
+
+ 0xFEE8C2C: 55491838 rlwinm r9,r10,3,0,28
+ 50: GETL R10, t42
+ 51: SHLL $0x3, t42
+ 52: PUTL t42, R9
+ 53: INCEIPL $4
+
+ 0xFEE8C30: 419E002C bc 12,30,0xFEE8C5C
+ 54: Js30o $0xFEE8C5C
+
+
+
+. 3123 FEE8BFC 56
+. 83 99 00 00 90 76 00 28 93 96 00 24 3A C0 00 00 83 3E 08 E0 92 D3 00 00 81 59 00 00 81 1E 08 F4 92 D4 00 00 2F 8A 00 00 39 4A FF FF 7D 05 43 78 55 49 18 38 41 9E 00 2C
+==== BB 3124 (0xFEE8C5C) approx BBs exec'd 0 ====
+
+ 0xFEE8C5C: 82610044 lwz r19,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0xFEE8C60: 82810010 lwz r20,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R20
+ 9: INCEIPL $4
+
+ 0xFEE8C64: 7E6803A6 mtlr r19
+ 10: GETL R19, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFEE8C68: 82A10014 lwz r21,20(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x14, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R21
+ 17: INCEIPL $4
+
+ 0xFEE8C6C: 8261000C lwz r19,12(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0xC, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R19
+ 22: INCEIPL $4
+
+ 0xFEE8C70: 82C10018 lwz r22,24(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x18, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R22
+ 27: INCEIPL $4
+
+ 0xFEE8C74: 82E1001C lwz r23,28(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x1C, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R23
+ 32: INCEIPL $4
+
+ 0xFEE8C78: 83010020 lwz r24,32(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x20, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R24
+ 37: INCEIPL $4
+
+ 0xFEE8C7C: 83210024 lwz r25,36(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x24, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R25
+ 42: INCEIPL $4
+
+ 0xFEE8C80: 83410028 lwz r26,40(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x28, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R26
+ 47: INCEIPL $4
+
+ 0xFEE8C84: 8361002C lwz r27,44(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x2C, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R27
+ 52: INCEIPL $4
+
+ 0xFEE8C88: 83810030 lwz r28,48(r1)
+ 53: GETL R1, t42
+ 54: ADDL $0x30, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R28
+ 57: INCEIPL $4
+
+ 0xFEE8C8C: 83A10034 lwz r29,52(r1)
+ 58: GETL R1, t46
+ 59: ADDL $0x34, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R29
+ 62: INCEIPL $4
+
+ 0xFEE8C90: 83C10038 lwz r30,56(r1)
+ 63: GETL R1, t50
+ 64: ADDL $0x38, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R30
+ 67: INCEIPL $4
+
+ 0xFEE8C94: 83E1003C lwz r31,60(r1)
+ 68: GETL R1, t54
+ 69: ADDL $0x3C, t54
+ 70: LDL (t54), t56
+ 71: PUTL t56, R31
+ 72: INCEIPL $4
+
+ 0xFEE8C98: 38210040 addi r1,r1,64
+ 73: GETL R1, t58
+ 74: ADDL $0x40, t58
+ 75: PUTL t58, R1
+ 76: INCEIPL $4
+
+ 0xFEE8C9C: 4E800020 blr
+ 77: GETL LR, t60
+ 78: JMPo-r t60 ($4)
+
+
+
+. 3124 FEE8C5C 68
+. 82 61 00 44 82 81 00 10 7E 68 03 A6 82 A1 00 14 82 61 00 0C 82 C1 00 18 82 E1 00 1C 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+==== BB 3125 (0xFEE7D38) approx BBs exec'd 0 ====
+
+ 0xFEE7D38: 4BFFFF00 b 0xFEE7C38
+ 0: JMPo $0xFEE7C38 ($4)
+
+
+
+. 3125 FEE7D38 4
+. 4B FF FF 00
+==== BB 3126 (0xFEE7C38) approx BBs exec'd 0 ====
+
+ 0xFEE7C38: 2C1F0000 cmpi cr0,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEE7C3C: 41820098 bc 12,2,0xFEE7CD4
+ 4: Js02o $0xFEE7CD4
+
+
+
+. 3126 FEE7C38 8
+. 2C 1F 00 00 41 82 00 98
+==== BB 3127 (0xFEE7C40) approx BBs exec'd 0 ====
+
+ 0xFEE7C40: 2F9C0000 cmpi cr7,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFEE7C44: 419E00F8 bc 12,30,0xFEE7D3C
+ 4: Js30o $0xFEE7D3C
+
+
+
+. 3127 FEE7C40 8
+. 2F 9C 00 00 41 9E 00 F8
+==== BB 3128 (0xFEE7C48) approx BBs exec'd 0 ====
+
+ 0xFEE7C48: 839A0000 lwz r28,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R28
+ 3: INCEIPL $4
+
+ 0xFEE7C4C: 2C9C0000 cmpi cr1,r28,0
+ 4: GETL R28, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFEE7C50: 40860108 bc 4,6,0xFEE7D58
+ 8: Jc06o $0xFEE7D58
+
+
+
+. 3128 FEE7C48 12
+. 83 9A 00 00 2C 9C 00 00 40 86 01 08
+==== BB 3129 (0xFEE7D58) approx BBs exec'd 0 ====
+
+ 0xFEE7D58: 813F0024 lwz r9,36(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEE7D5C: 4BFFFF4C b 0xFEE7CA8
+ 5: JMPo $0xFEE7CA8 ($4)
+
+
+
+. 3129 FEE7D58 8
+. 81 3F 00 24 4B FF FF 4C
+==== BB 3130 (0xFEE7CA8) approx BBs exec'd 0 ====
+
+ 0xFEE7CA8: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEE7CAC: 83610008 lwz r27,8(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R27
+ 7: INCEIPL $4
+
+ 0xFEE7CB0: 7FE5FB78 or r5,r31,r31
+ 8: GETL R31, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0xFEE7CB4: 7C9B4850 subf r4,r27,r9
+ 11: GETL R27, t8
+ 12: GETL R9, t10
+ 13: SUBL t8, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0xFEE7CB8: 4BFFDC91 bl 0xFEE5948
+ 16: MOVL $0xFEE7CBC, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0xFEE5948 ($4)
+
+
+
+. 3130 FEE7CA8 20
+. 7F 63 DB 78 83 61 00 08 7F E5 FB 78 7C 9B 48 50 4B FF DC 91
+==== BB 3131 __offtime(0xFEE5948) approx BBs exec'd 0 ====
+
+ 0xFEE5948: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEE594C: 3D800001 lis r12,1
+ 6: MOVL $0x10000, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFEE5950: 80C30000 lwz r6,0(r3)
+ 9: GETL R3, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R6
+ 12: INCEIPL $4
+
+ 0xFEE5954: 61835180 ori r3,r12,0x5180
+ 13: MOVL $0x15180, t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0xFEE5958: 93010010 stw r24,16(r1)
+ 16: GETL R24, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x10, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFEE595C: 3F00C22E lis r24,-15826
+ 21: MOVL $0xC22E0000, t16
+ 22: PUTL t16, R24
+ 23: INCEIPL $4
+
+ 0xFEE5960: 92E1000C stw r23,12(r1)
+ 24: GETL R23, t18
+ 25: GETL R1, t20
+ 26: ADDL $0xC, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0xFEE5964: 63174507 ori r23,r24,0x4507
+ 29: MOVL $0xC22E4507, t22
+ 30: PUTL t22, R23
+ 31: INCEIPL $4
+
+ 0xFEE5968: 7D06B896 mulhw r8,r6,r23
+ 32: GETL R6, t24
+ 33: GETL R23, t26
+ 34: MULHL t24, t26
+ 35: PUTL t26, R8
+ 36: INCEIPL $4
+
+ 0xFEE596C: 7CCAFE70 srawi r10,r6,31
+ 37: GETL R6, t28
+ 38: SARL $0x1F, t28 (-wCa)
+ 39: PUTL t28, R10
+ 40: INCEIPL $4
+
+ 0xFEE5970: 93210014 stw r25,20(r1)
+ 41: GETL R25, t30
+ 42: GETL R1, t32
+ 43: ADDL $0x14, t32
+ 44: STL t30, (t32)
+ 45: INCEIPL $4
+
+ 0xFEE5974: 7F2802A6 mflr r25
+ 46: GETL LR, t34
+ 47: PUTL t34, R25
+ 48: INCEIPL $4
+
+ 0xFEE5978: 480C24D9 bl 0xFFA7E50
+ 49: MOVL $0xFEE597C, t36
+ 50: PUTL t36, LR
+ 51: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3131 FEE5948 52
+. 94 21 FF D0 3D 80 00 01 80 C3 00 00 61 83 51 80 93 01 00 10 3F 00 C2 2E 92 E1 00 0C 63 17 45 07 7D 06 B8 96 7C CA FE 70 93 21 00 14 7F 28 02 A6 48 0C 24 D9
+==== BB 3132 (0xFEE597C) approx BBs exec'd 0 ====
+
+ 0xFEE597C: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEE5980: 93410018 stw r26,24(r1)
+ 5: GETL R26, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x18, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFEE5984: 7FC802A6 mflr r30
+ 10: GETL LR, t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0xFEE5988: 7CE83214 add r7,r8,r6
+ 13: GETL R8, t10
+ 14: GETL R6, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R7
+ 17: INCEIPL $4
+
+ 0xFEE598C: 9361001C stw r27,28(r1)
+ 18: GETL R27, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x1C, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFEE5990: 7CE08670 srawi r0,r7,16
+ 23: GETL R7, t18
+ 24: SARL $0x10, t18 (-wCa)
+ 25: PUTL t18, R0
+ 26: INCEIPL $4
+
+ 0xFEE5994: 93810020 stw r28,32(r1)
+ 27: GETL R28, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFEE5998: 7D8A0050 subf r12,r10,r0
+ 32: GETL R10, t24
+ 33: GETL R0, t26
+ 34: SUBL t24, t26
+ 35: PUTL t26, R12
+ 36: INCEIPL $4
+
+ 0xFEE599C: 93A10024 stw r29,36(r1)
+ 37: GETL R29, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x24, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFEE59A0: 7D6C19D6 mullw r11,r12,r3
+ 42: GETL R12, t32
+ 43: GETL R3, t34
+ 44: MULL t32, t34
+ 45: PUTL t34, R11
+ 46: INCEIPL $4
+
+ 0xFEE59A4: 93E1002C stw r31,44(r1)
+ 47: GETL R31, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x2C, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0xFEE59A8: 7F2803A6 mtlr r25
+ 52: GETL R25, t40
+ 53: PUTL t40, LR
+ 54: INCEIPL $4
+
+ 0xFEE59AC: 7CB72B78 or r23,r5,r5
+ 55: GETL R5, t42
+ 56: PUTL t42, R23
+ 57: INCEIPL $4
+
+ 0xFEE59B0: 7D2B3050 subf r9,r11,r6
+ 58: GETL R11, t44
+ 59: GETL R6, t46
+ 60: SUBL t44, t46
+ 61: PUTL t46, R9
+ 62: INCEIPL $4
+
+ 0xFEE59B4: 7CE92215 add. r7,r9,r4
+ 63: GETL R9, t48
+ 64: GETL R4, t50
+ 65: ADDL t48, t50
+ 66: PUTL t50, R7
+ 67: CMP0L t50, t52 (-rSo)
+ 68: ICRFL t52, $0x0, CR
+ 69: INCEIPL $4
+
+ 0xFEE59B8: 41800210 bc 12,0,0xFEE5BC8
+ 70: Js00o $0xFEE5BC8
+
+
+
+. 3132 FEE597C 64
+. 93 C1 00 28 93 41 00 18 7F C8 02 A6 7C E8 32 14 93 61 00 1C 7C E0 86 70 93 81 00 20 7D 8A 00 50 93 A1 00 24 7D 6C 19 D6 93 E1 00 2C 7F 28 03 A6 7C B7 2B 78 7D 2B 30 50 7C E9 22 15 41 80 02 10
+==== BB 3133 (0xFEE59BC) approx BBs exec'd 0 ====
+
+ 0xFEE59BC: 3F400001 lis r26,1
+ 0: MOVL $0x10000, t0
+ 1: PUTL t0, R26
+ 2: INCEIPL $4
+
+ 0xFEE59C0: 6345517F ori r5,r26,0x517F
+ 3: MOVL $0x1517F, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFEE59C4: 7F872800 cmp cr7,r7,r5
+ 6: GETL R7, t4
+ 7: GETL R5, t6
+ 8: CMPL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0xFEE59C8: 409D0020 bc 4,29,0xFEE59E8
+ 11: Jc29o $0xFEE59E8
+
+
+
+. 3133 FEE59BC 16
+. 3F 40 00 01 63 45 51 7F 7F 87 28 00 40 9D 00 20
+==== BB 3134 (0xFEE59E8) approx BBs exec'd 0 ====
+
+ 0xFEE59E8: 3F2091A2 lis r25,-28254
+ 0: MOVL $0x91A20000, t0
+ 1: PUTL t0, R25
+ 2: INCEIPL $4
+
+ 0xFEE59EC: 7CE8FE70 srawi r8,r7,31
+ 3: GETL R7, t2
+ 4: SARL $0x1F, t2 (-wCa)
+ 5: PUTL t2, R8
+ 6: INCEIPL $4
+
+ 0xFEE59F0: 6338B3C5 ori r24,r25,0xB3C5
+ 7: MOVL $0x91A2B3C5, t4
+ 8: PUTL t4, R24
+ 9: INCEIPL $4
+
+ 0xFEE59F4: 3D609249 lis r11,-28087
+ 10: MOVL $0x92490000, t6
+ 11: PUTL t6, R11
+ 12: INCEIPL $4
+
+ 0xFEE59F8: 7D27C096 mulhw r9,r7,r24
+ 13: GETL R7, t8
+ 14: GETL R24, t10
+ 15: MULHL t8, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0xFEE59FC: 617F2493 ori r31,r11,0x2493
+ 18: MOVL $0x92492493, t12
+ 19: PUTL t12, R31
+ 20: INCEIPL $4
+
+ 0xFEE5A00: 3CC08888 lis r6,-30584
+ 21: MOVL $0x88880000, t14
+ 22: PUTL t14, R6
+ 23: INCEIPL $4
+
+ 0xFEE5A04: 60DC8889 ori r28,r6,0x8889
+ 24: MOVL $0x88888889, t16
+ 25: PUTL t16, R28
+ 26: INCEIPL $4
+
+ 0xFEE5A08: 7C093A14 add r0,r9,r7
+ 27: GETL R9, t18
+ 28: GETL R7, t20
+ 29: ADDL t18, t20
+ 30: PUTL t20, R0
+ 31: INCEIPL $4
+
+ 0xFEE5A0C: 7C035E70 srawi r3,r0,11
+ 32: GETL R0, t22
+ 33: SARL $0xB, t22 (-wCa)
+ 34: PUTL t22, R3
+ 35: INCEIPL $4
+
+ 0xFEE5A10: 7FA81850 subf r29,r8,r3
+ 36: GETL R8, t24
+ 37: GETL R3, t26
+ 38: SUBL t24, t26
+ 39: PUTL t26, R29
+ 40: INCEIPL $4
+
+ 0xFEE5A14: 390C0004 addi r8,r12,4
+ 41: GETL R12, t28
+ 42: ADDL $0x4, t28
+ 43: PUTL t28, R8
+ 44: INCEIPL $4
+
+ 0xFEE5A18: 1D5D0E10 mulli r10,r29,3600
+ 45: GETL R29, t30
+ 46: MULL $0xE10, t30
+ 47: PUTL t30, R10
+ 48: INCEIPL $4
+
+ 0xFEE5A1C: 7D05FE70 srawi r5,r8,31
+ 49: GETL R8, t32
+ 50: SARL $0x1F, t32 (-wCa)
+ 51: PUTL t32, R5
+ 52: INCEIPL $4
+
+ 0xFEE5A20: 93B70008 stw r29,8(r23)
+ 53: GETL R29, t34
+ 54: GETL R23, t36
+ 55: ADDL $0x8, t36
+ 56: STL t34, (t36)
+ 57: INCEIPL $4
+
+ 0xFEE5A24: 7F68F896 mulhw r27,r8,r31
+ 58: GETL R8, t38
+ 59: GETL R31, t40
+ 60: MULHL t38, t40
+ 61: PUTL t40, R27
+ 62: INCEIPL $4
+
+ 0xFEE5A28: 7C6A3850 subf r3,r10,r7
+ 63: GETL R10, t42
+ 64: GETL R7, t44
+ 65: SUBL t42, t44
+ 66: PUTL t44, R3
+ 67: INCEIPL $4
+
+ 0xFEE5A2C: 7C78FE70 srawi r24,r3,31
+ 68: GETL R3, t46
+ 69: SARL $0x1F, t46 (-wCa)
+ 70: PUTL t46, R24
+ 71: INCEIPL $4
+
+ 0xFEE5A30: 7F23E096 mulhw r25,r3,r28
+ 72: GETL R3, t48
+ 73: GETL R28, t50
+ 74: MULHL t48, t50
+ 75: PUTL t50, R25
+ 76: INCEIPL $4
+
+ 0xFEE5A34: 7F5B4214 add r26,r27,r8
+ 77: GETL R27, t52
+ 78: GETL R8, t54
+ 79: ADDL t52, t54
+ 80: PUTL t54, R26
+ 81: INCEIPL $4
+
+ 0xFEE5A38: 7F441670 srawi r4,r26,2
+ 82: GETL R26, t56
+ 83: SARL $0x2, t56 (-wCa)
+ 84: PUTL t56, R4
+ 85: INCEIPL $4
+
+ 0xFEE5A3C: 7C052050 subf r0,r5,r4
+ 86: GETL R5, t58
+ 87: GETL R4, t60
+ 88: SUBL t58, t60
+ 89: PUTL t60, R0
+ 90: INCEIPL $4
+
+ 0xFEE5A40: 7CF91A14 add r7,r25,r3
+ 91: GETL R25, t62
+ 92: GETL R3, t64
+ 93: ADDL t62, t64
+ 94: PUTL t64, R7
+ 95: INCEIPL $4
+
+ 0xFEE5A44: 1D600007 mulli r11,r0,7
+ 96: GETL R0, t66
+ 97: MULL $0x7, t66
+ 98: PUTL t66, R11
+ 99: INCEIPL $4
+
+ 0xFEE5A48: 7CE92E70 srawi r9,r7,5
+ 100: GETL R7, t68
+ 101: SARL $0x5, t68 (-wCa)
+ 102: PUTL t68, R9
+ 103: INCEIPL $4
+
+ 0xFEE5A4C: 7FB84850 subf r29,r24,r9
+ 104: GETL R24, t70
+ 105: GETL R9, t72
+ 106: SUBL t70, t72
+ 107: PUTL t72, R29
+ 108: INCEIPL $4
+
+ 0xFEE5A50: 7D0B4051 subf. r8,r11,r8
+ 109: GETL R11, t74
+ 110: GETL R8, t76
+ 111: SUBL t74, t76
+ 112: PUTL t76, R8
+ 113: CMP0L t76, t78 (-rSo)
+ 114: ICRFL t78, $0x0, CR
+ 115: INCEIPL $4
+
+ 0xFEE5A54: 1CDD003C mulli r6,r29,60
+ 116: GETL R29, t80
+ 117: MULL $0x3C, t80
+ 118: PUTL t80, R6
+ 119: INCEIPL $4
+
+ 0xFEE5A58: 93B70004 stw r29,4(r23)
+ 120: GETL R29, t82
+ 121: GETL R23, t84
+ 122: ADDL $0x4, t84
+ 123: STL t82, (t84)
+ 124: INCEIPL $4
+
+ 0xFEE5A5C: 7FE61850 subf r31,r6,r3
+ 125: GETL R6, t86
+ 126: GETL R3, t88
+ 127: SUBL t86, t88
+ 128: PUTL t88, R31
+ 129: INCEIPL $4
+
+ 0xFEE5A60: 93F70000 stw r31,0(r23)
+ 130: GETL R31, t90
+ 131: GETL R23, t92
+ 132: STL t90, (t92)
+ 133: INCEIPL $4
+
+ 0xFEE5A64: 41800258 bc 12,0,0xFEE5CBC
+ 134: Js00o $0xFEE5CBC
+
+
+
+. 3134 FEE59E8 128
+. 3F 20 91 A2 7C E8 FE 70 63 38 B3 C5 3D 60 92 49 7D 27 C0 96 61 7F 24 93 3C C0 88 88 60 DC 88 89 7C 09 3A 14 7C 03 5E 70 7F A8 18 50 39 0C 00 04 1D 5D 0E 10 7D 05 FE 70 93 B7 00 08 7F 68 F8 96 7C 6A 38 50 7C 78 FE 70 7F 23 E0 96 7F 5B 42 14 7F 44 16 70 7C 05 20 50 7C F9 1A 14 1D 60 00 07 7C E9 2E 70 7F B8 48 50 7D 0B 40 51 1C DD 00 3C 93 B7 00 04 7F E6 18 50 93 F7 00 00 41 80 02 58
+==== BB 3135 (0xFEE5A68) approx BBs exec'd 0 ====
+
+ 0xFEE5A68: 91170018 stw r8,24(r23)
+ 0: GETL R8, t0
+ 1: GETL R23, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEE5A6C: 3CA051EB lis r5,20971
+ 5: MOVL $0x51EB0000, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFEE5A70: 3C80B38C lis r4,-19572
+ 8: MOVL $0xB38C0000, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0xFEE5A74: 60BA851F ori r26,r5,0x851F
+ 11: MOVL $0x51EB851F, t8
+ 12: PUTL t8, R26
+ 13: INCEIPL $4
+
+ 0xFEE5A78: 6098F9B1 ori r24,r4,0xF9B1
+ 14: MOVL $0xB38CF9B1, t10
+ 15: PUTL t10, R24
+ 16: INCEIPL $4
+
+ 0xFEE5A7C: 3BE007B2 li r31,1970
+ 17: MOVL $0x7B2, t12
+ 18: PUTL t12, R31
+ 19: INCEIPL $4
+
+ 0xFEE5A80: 391FFFFF addi r8,r31,-1
+ 20: MOVL $0x7B1, t14
+ 21: PUTL t14, R8
+ 22: INCEIPL $4
+
+ 0xFEE5A84: 2F0C0000 cmpi cr6,r12,0
+ 23: GETL R12, t16
+ 24: CMP0L t16, t18 (-rSo)
+ 25: ICRFL t18, $0x6, CR
+ 26: INCEIPL $4
+
+ 0xFEE5A88: 7D1B1670 srawi r27,r8,2
+ 27: GETL R8, t20
+ 28: SARL $0x2, t20 (-wCa)
+ 29: PUTL t20, R27
+ 30: INCEIPL $4
+
+ 0xFEE5A8C: 7F7B0194 addze r27,r27
+ 31: GETL R27, t22
+ 32: ADCL $0x0, t22 (-rCa-wCa)
+ 33: PUTL t22, R27
+ 34: INCEIPL $4
+
+ 0xFEE5A90: 7D8AFE70 srawi r10,r12,31
+ 35: GETL R12, t24
+ 36: SARL $0x1F, t24 (-wCa)
+ 37: PUTL t24, R10
+ 38: INCEIPL $4
+
+ 0xFEE5A94: 5779103A rlwinm r25,r27,2,0,29
+ 39: GETL R27, t26
+ 40: SHLL $0x2, t26
+ 41: PUTL t26, R25
+ 42: INCEIPL $4
+
+ 0xFEE5A98: 7D05FE70 srawi r5,r8,31
+ 43: GETL R8, t28
+ 44: SARL $0x1F, t28 (-wCa)
+ 45: PUTL t28, R5
+ 46: INCEIPL $4
+
+ 0xFEE5A9C: 7C994050 subf r4,r25,r8
+ 47: GETL R25, t30
+ 48: GETL R8, t32
+ 49: SUBL t30, t32
+ 50: PUTL t32, R4
+ 51: INCEIPL $4
+
+ 0xFEE5AA0: 73E70003 andi. r7,r31,0x3
+ 52: GETL R31, t34
+ 53: ANDL $0x3, t34
+ 54: PUTL t34, R7
+ 55: CMP0L t34, t36 (-rSo)
+ 56: ICRFL t36, $0x0, CR
+ 57: INCEIPL $4
+
+ 0xFEE5AA4: 54990FFE rlwinm r25,r4,1,31,31
+ 58: GETL R4, t38
+ 59: SHRL $0x1F, t38
+ 60: PUTL t38, R25
+ 61: INCEIPL $4
+
+ 0xFEE5AA8: 41980044 bc 12,24,0xFEE5AEC
+ 62: Js24o $0xFEE5AEC
+
+
+
+. 3135 FEE5A68 68
+. 91 17 00 18 3C A0 51 EB 3C 80 B3 8C 60 BA 85 1F 60 98 F9 B1 3B E0 07 B2 39 1F FF FF 2F 0C 00 00 7D 1B 16 70 7F 7B 01 94 7D 8A FE 70 57 79 10 3A 7D 05 FE 70 7C 99 40 50 73 E7 00 03 54 99 0F FE 41 98 00 44
+==== BB 3136 (0xFEE5AAC) approx BBs exec'd 0 ====
+
+ 0xFEE5AAC: 7FEBFE70 srawi r11,r31,31
+ 0: GETL R31, t0
+ 1: SARL $0x1F, t0 (-wCa)
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFEE5AB0: 2C8C016C cmpi cr1,r12,364
+ 4: GETL R12, t2
+ 5: MOVL $0x16C, t6
+ 6: CMPL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFEE5AB4: 40820034 bc 4,2,0xFEE5AE8
+ 9: Jc02o $0xFEE5AE8
+
+
+
+. 3136 FEE5AAC 12
+. 7F EB FE 70 2C 8C 01 6C 40 82 00 34
+==== BB 3137 (0xFEE5AE8) approx BBs exec'd 0 ====
+
+ 0xFEE5AE8: 40850108 bc 4,5,0xFEE5BF0
+ 0: Jc05o $0xFEE5BF0
+
+
+
+. 3137 FEE5AE8 4
+. 40 85 01 08
+==== BB 3138 (0xFEE5AEC) approx BBs exec'd 0 ====
+
+ 0xFEE5AEC: 7C0CC096 mulhw r0,r12,r24
+ 0: GETL R12, t0
+ 1: GETL R24, t2
+ 2: MULHL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEE5AF0: 7FA06214 add r29,r0,r12
+ 5: GETL R0, t4
+ 6: GETL R12, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0xFEE5AF4: 7C88D096 mulhw r4,r8,r26
+ 10: GETL R8, t8
+ 11: GETL R26, t10
+ 12: MULHL t8, t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0xFEE5AF8: 7FAB4670 srawi r11,r29,8
+ 15: GETL R29, t12
+ 16: SARL $0x8, t12 (-wCa)
+ 17: PUTL t12, R11
+ 18: INCEIPL $4
+
+ 0xFEE5AFC: 7F8A5850 subf r28,r10,r11
+ 19: GETL R10, t14
+ 20: GETL R11, t16
+ 21: SUBL t14, t16
+ 22: PUTL t16, R28
+ 23: INCEIPL $4
+
+ 0xFEE5B00: 7CDCFA14 add r6,r28,r31
+ 24: GETL R28, t18
+ 25: GETL R31, t20
+ 26: ADDL t18, t20
+ 27: PUTL t20, R6
+ 28: INCEIPL $4
+
+ 0xFEE5B04: 1D3C016D mulli r9,r28,365
+ 29: GETL R28, t22
+ 30: MULL $0x16D, t22
+ 31: PUTL t22, R9
+ 32: INCEIPL $4
+
+ 0xFEE5B08: 7C9C3E70 srawi r28,r4,7
+ 33: GETL R4, t24
+ 34: SARL $0x7, t24 (-wCa)
+ 35: PUTL t24, R28
+ 36: INCEIPL $4
+
+ 0xFEE5B0C: 7F85E050 subf r28,r5,r28
+ 37: GETL R5, t26
+ 38: GETL R28, t28
+ 39: SUBL t26, t28
+ 40: PUTL t28, R28
+ 41: INCEIPL $4
+
+ 0xFEE5B10: 7C696050 subf r3,r9,r12
+ 42: GETL R9, t30
+ 43: GETL R12, t32
+ 44: SUBL t30, t32
+ 45: PUTL t32, R3
+ 46: INCEIPL $4
+
+ 0xFEE5B14: 7C892E70 srawi r9,r4,5
+ 47: GETL R4, t34
+ 48: SARL $0x5, t34 (-wCa)
+ 49: PUTL t34, R9
+ 50: INCEIPL $4
+
+ 0xFEE5B18: 54670FFE rlwinm r7,r3,1,31,31
+ 51: GETL R3, t36
+ 52: SHRL $0x1F, t36
+ 53: PUTL t36, R7
+ 54: INCEIPL $4
+
+ 0xFEE5B1C: 7D254850 subf r9,r5,r9
+ 55: GETL R5, t38
+ 56: GETL R9, t40
+ 57: SUBL t38, t40
+ 58: PUTL t40, R9
+ 59: INCEIPL $4
+
+ 0xFEE5B20: 7CC73050 subf r6,r7,r6
+ 60: GETL R7, t42
+ 61: GETL R6, t44
+ 62: SUBL t42, t44
+ 63: PUTL t44, R6
+ 64: INCEIPL $4
+
+ 0xFEE5B24: 38E6FFFF addi r7,r6,-1
+ 65: GETL R6, t46
+ 66: ADDL $0xFFFFFFFF, t46
+ 67: PUTL t46, R7
+ 68: INCEIPL $4
+
+ 0xFEE5B28: 7C07D096 mulhw r0,r7,r26
+ 69: GETL R7, t48
+ 70: GETL R26, t50
+ 71: MULHL t48, t50
+ 72: PUTL t50, R0
+ 73: INCEIPL $4
+
+ 0xFEE5B2C: 7CEBFE70 srawi r11,r7,31
+ 74: GETL R7, t52
+ 75: SARL $0x1F, t52 (-wCa)
+ 76: PUTL t52, R11
+ 77: INCEIPL $4
+
+ 0xFEE5B30: 7C0A2E70 srawi r10,r0,5
+ 78: GETL R0, t54
+ 79: SARL $0x5, t54 (-wCa)
+ 80: PUTL t54, R10
+ 81: INCEIPL $4
+
+ 0xFEE5B34: 7C1D3E70 srawi r29,r0,7
+ 82: GETL R0, t56
+ 83: SARL $0x7, t56 (-wCa)
+ 84: PUTL t56, R29
+ 85: INCEIPL $4
+
+ 0xFEE5B38: 7D4B5050 subf r10,r11,r10
+ 86: GETL R11, t58
+ 87: GETL R10, t60
+ 88: SUBL t58, t60
+ 89: PUTL t60, R10
+ 90: INCEIPL $4
+
+ 0xFEE5B3C: 7FABE850 subf r29,r11,r29
+ 91: GETL R11, t62
+ 92: GETL R29, t64
+ 93: SUBL t62, t64
+ 94: PUTL t64, R29
+ 95: INCEIPL $4
+
+ 0xFEE5B40: 1C6A0064 mulli r3,r10,100
+ 96: GETL R10, t66
+ 97: MULL $0x64, t66
+ 98: PUTL t66, R3
+ 99: INCEIPL $4
+
+ 0xFEE5B44: 1C9D0190 mulli r4,r29,400
+ 100: GETL R29, t68
+ 101: MULL $0x190, t68
+ 102: PUTL t68, R4
+ 103: INCEIPL $4
+
+ 0xFEE5B48: 7CA33850 subf r5,r3,r7
+ 104: GETL R3, t70
+ 105: GETL R7, t72
+ 106: SUBL t70, t72
+ 107: PUTL t72, R5
+ 108: INCEIPL $4
+
+ 0xFEE5B4C: 1C090064 mulli r0,r9,100
+ 109: GETL R9, t74
+ 110: MULL $0x64, t74
+ 111: PUTL t74, R0
+ 112: INCEIPL $4
+
+ 0xFEE5B50: 54AB0FFE rlwinm r11,r5,1,31,31
+ 113: GETL R5, t76
+ 114: SHRL $0x1F, t76
+ 115: PUTL t76, R11
+ 116: INCEIPL $4
+
+ 0xFEE5B54: 1C7C0190 mulli r3,r28,400
+ 117: GETL R28, t78
+ 118: MULL $0x190, t78
+ 119: PUTL t78, R3
+ 120: INCEIPL $4
+
+ 0xFEE5B58: 7CA43850 subf r5,r4,r7
+ 121: GETL R4, t80
+ 122: GETL R7, t82
+ 123: SUBL t80, t82
+ 124: PUTL t82, R5
+ 125: INCEIPL $4
+
+ 0xFEE5B5C: 7C804050 subf r4,r0,r8
+ 126: GETL R0, t84
+ 127: GETL R8, t86
+ 128: SUBL t84, t86
+ 129: PUTL t86, R4
+ 130: INCEIPL $4
+
+ 0xFEE5B60: 7CE01670 srawi r0,r7,2
+ 131: GETL R7, t88
+ 132: SARL $0x2, t88 (-wCa)
+ 133: PUTL t88, R0
+ 134: INCEIPL $4
+
+ 0xFEE5B64: 7C000194 addze r0,r0
+ 135: GETL R0, t90
+ 136: ADCL $0x0, t90 (-rCa-wCa)
+ 137: PUTL t90, R0
+ 138: INCEIPL $4
+
+ 0xFEE5B68: 7D4B5050 subf r10,r11,r10
+ 139: GETL R11, t92
+ 140: GETL R10, t94
+ 141: SUBL t92, t94
+ 142: PUTL t94, R10
+ 143: INCEIPL $4
+
+ 0xFEE5B6C: 7C634050 subf r3,r3,r8
+ 144: GETL R3, t96
+ 145: GETL R8, t98
+ 146: SUBL t96, t98
+ 147: PUTL t98, R3
+ 148: INCEIPL $4
+
+ 0xFEE5B70: 54A50FFE rlwinm r5,r5,1,31,31
+ 149: GETL R5, t100
+ 150: SHRL $0x1F, t100
+ 151: PUTL t100, R5
+ 152: INCEIPL $4
+
+ 0xFEE5B74: 54840FFE rlwinm r4,r4,1,31,31
+ 153: GETL R4, t102
+ 154: SHRL $0x1F, t102
+ 155: PUTL t102, R4
+ 156: INCEIPL $4
+
+ 0xFEE5B78: 7D7F3050 subf r11,r31,r6
+ 157: GETL R31, t104
+ 158: GETL R6, t106
+ 159: SUBL t104, t106
+ 160: PUTL t106, R11
+ 161: INCEIPL $4
+
+ 0xFEE5B7C: 541F103A rlwinm r31,r0,2,0,29
+ 162: GETL R0, t108
+ 163: SHLL $0x2, t108
+ 164: PUTL t108, R31
+ 165: INCEIPL $4
+
+ 0xFEE5B80: 7FA5E850 subf r29,r5,r29
+ 166: GETL R5, t110
+ 167: GETL R29, t112
+ 168: SUBL t110, t112
+ 169: PUTL t112, R29
+ 170: INCEIPL $4
+
+ 0xFEE5B84: 7D0A0050 subf r8,r10,r0
+ 171: GETL R10, t114
+ 172: GETL R0, t116
+ 173: SUBL t114, t116
+ 174: PUTL t116, R8
+ 175: INCEIPL $4
+
+ 0xFEE5B88: 7CBF3850 subf r5,r31,r7
+ 176: GETL R31, t118
+ 177: GETL R7, t120
+ 178: SUBL t118, t120
+ 179: PUTL t120, R5
+ 180: INCEIPL $4
+
+ 0xFEE5B8C: 7D244850 subf r9,r4,r9
+ 181: GETL R4, t122
+ 182: GETL R9, t124
+ 183: SUBL t122, t124
+ 184: PUTL t124, R9
+ 185: INCEIPL $4
+
+ 0xFEE5B90: 547F0FFE rlwinm r31,r3,1,31,31
+ 186: GETL R3, t126
+ 187: SHRL $0x1F, t126
+ 188: PUTL t126, R31
+ 189: INCEIPL $4
+
+ 0xFEE5B94: 1D4B016D mulli r10,r11,365
+ 190: GETL R11, t128
+ 191: MULL $0x16D, t128
+ 192: PUTL t128, R10
+ 193: INCEIPL $4
+
+ 0xFEE5B98: 7C08EA14 add r0,r8,r29
+ 194: GETL R8, t130
+ 195: GETL R29, t132
+ 196: ADDL t130, t132
+ 197: PUTL t132, R0
+ 198: INCEIPL $4
+
+ 0xFEE5B9C: 7C9FE050 subf r4,r31,r28
+ 199: GETL R31, t134
+ 200: GETL R28, t136
+ 201: SUBL t134, t136
+ 202: PUTL t136, R4
+ 203: INCEIPL $4
+
+ 0xFEE5BA0: 7D09D850 subf r8,r9,r27
+ 204: GETL R9, t138
+ 205: GETL R27, t140
+ 206: SUBL t138, t140
+ 207: PUTL t140, R8
+ 208: INCEIPL $4
+
+ 0xFEE5BA4: 54A70FFE rlwinm r7,r5,1,31,31
+ 209: GETL R5, t142
+ 210: SHRL $0x1F, t142
+ 211: PUTL t142, R7
+ 212: INCEIPL $4
+
+ 0xFEE5BA8: 7FE82214 add r31,r8,r4
+ 213: GETL R8, t144
+ 214: GETL R4, t146
+ 215: ADDL t144, t146
+ 216: PUTL t146, R31
+ 217: INCEIPL $4
+
+ 0xFEE5BAC: 7C670050 subf r3,r7,r0
+ 218: GETL R7, t148
+ 219: GETL R0, t150
+ 220: SUBL t148, t150
+ 221: PUTL t150, R3
+ 222: INCEIPL $4
+
+ 0xFEE5BB0: 7FB9F850 subf r29,r25,r31
+ 223: GETL R25, t152
+ 224: GETL R31, t154
+ 225: SUBL t152, t154
+ 226: PUTL t154, R29
+ 227: INCEIPL $4
+
+ 0xFEE5BB4: 7F8A1A14 add r28,r10,r3
+ 228: GETL R10, t156
+ 229: GETL R3, t158
+ 230: ADDL t156, t158
+ 231: PUTL t158, R28
+ 232: INCEIPL $4
+
+ 0xFEE5BB8: 7F7DE050 subf r27,r29,r28
+ 233: GETL R29, t160
+ 234: GETL R28, t162
+ 235: SUBL t160, t162
+ 236: PUTL t162, R27
+ 237: INCEIPL $4
+
+ 0xFEE5BBC: 7CDF3378 or r31,r6,r6
+ 238: GETL R6, t164
+ 239: PUTL t164, R31
+ 240: INCEIPL $4
+
+ 0xFEE5BC0: 7D9B6050 subf r12,r27,r12
+ 241: GETL R27, t166
+ 242: GETL R12, t168
+ 243: SUBL t166, t168
+ 244: PUTL t168, R12
+ 245: INCEIPL $4
+
+ 0xFEE5BC4: 4BFFFEBC b 0xFEE5A80
+ 246: JMPo $0xFEE5A80 ($4)
+
+
+
+. 3138 FEE5AEC 220
+. 7C 0C C0 96 7F A0 62 14 7C 88 D0 96 7F AB 46 70 7F 8A 58 50 7C DC FA 14 1D 3C 01 6D 7C 9C 3E 70 7F 85 E0 50 7C 69 60 50 7C 89 2E 70 54 67 0F FE 7D 25 48 50 7C C7 30 50 38 E6 FF FF 7C 07 D0 96 7C EB FE 70 7C 0A 2E 70 7C 1D 3E 70 7D 4B 50 50 7F AB E8 50 1C 6A 00 64 1C 9D 01 90 7C A3 38 50 1C 09 00 64 54 AB 0F FE 1C 7C 01 90 7C A4 38 50 7C 80 40 50 7C E0 16 70 7C 00 01 94 7D 4B 50 50 7C 63 40 50 54 A5 0F FE 54 84 0F FE 7D 7F 30 50 54 1F 10 3A 7F A5 E8 50 7D 0A 00 50 7C BF 38 50 7D 24 48 50 54 7F 0F FE 1D 4B 01 6D 7C 08 EA 14 7C 9F E0 50 7D 09 D8 50 54 A7 0F FE 7F E8 22 14 7C 67 00 50 7F B9 F8 50 7F 8A 1A 14 7F 7D E0 50 7C DF 33 78 7D 9B 60 50 4B FF FE BC
+==== BB 3139 (0xFEE5A80) approx BBs exec'd 0 ====
+
+ 0xFEE5A80: 391FFFFF addi r8,r31,-1
+ 0: GETL R31, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0xFEE5A84: 2F0C0000 cmpi cr6,r12,0
+ 4: GETL R12, t2
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x6, CR
+ 7: INCEIPL $4
+
+ 0xFEE5A88: 7D1B1670 srawi r27,r8,2
+ 8: GETL R8, t6
+ 9: SARL $0x2, t6 (-wCa)
+ 10: PUTL t6, R27
+ 11: INCEIPL $4
+
+ 0xFEE5A8C: 7F7B0194 addze r27,r27
+ 12: GETL R27, t8
+ 13: ADCL $0x0, t8 (-rCa-wCa)
+ 14: PUTL t8, R27
+ 15: INCEIPL $4
+
+ 0xFEE5A90: 7D8AFE70 srawi r10,r12,31
+ 16: GETL R12, t10
+ 17: SARL $0x1F, t10 (-wCa)
+ 18: PUTL t10, R10
+ 19: INCEIPL $4
+
+ 0xFEE5A94: 5779103A rlwinm r25,r27,2,0,29
+ 20: GETL R27, t12
+ 21: SHLL $0x2, t12
+ 22: PUTL t12, R25
+ 23: INCEIPL $4
+
+ 0xFEE5A98: 7D05FE70 srawi r5,r8,31
+ 24: GETL R8, t14
+ 25: SARL $0x1F, t14 (-wCa)
+ 26: PUTL t14, R5
+ 27: INCEIPL $4
+
+ 0xFEE5A9C: 7C994050 subf r4,r25,r8
+ 28: GETL R25, t16
+ 29: GETL R8, t18
+ 30: SUBL t16, t18
+ 31: PUTL t18, R4
+ 32: INCEIPL $4
+
+ 0xFEE5AA0: 73E70003 andi. r7,r31,0x3
+ 33: GETL R31, t20
+ 34: ANDL $0x3, t20
+ 35: PUTL t20, R7
+ 36: CMP0L t20, t22 (-rSo)
+ 37: ICRFL t22, $0x0, CR
+ 38: INCEIPL $4
+
+ 0xFEE5AA4: 54990FFE rlwinm r25,r4,1,31,31
+ 39: GETL R4, t24
+ 40: SHRL $0x1F, t24
+ 41: PUTL t24, R25
+ 42: INCEIPL $4
+
+ 0xFEE5AA8: 41980044 bc 12,24,0xFEE5AEC
+ 43: Js24o $0xFEE5AEC
+
+
+
+. 3139 FEE5A80 44
+. 39 1F FF FF 2F 0C 00 00 7D 1B 16 70 7F 7B 01 94 7D 8A FE 70 57 79 10 3A 7D 05 FE 70 7C 99 40 50 73 E7 00 03 54 99 0F FE 41 98 00 44
+==== BB 3140 (0xFEE5BF0) approx BBs exec'd 0 ====
+
+ 0xFEE5BF0: 2C870000 cmpi cr1,r7,0
+ 0: GETL R7, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFEE5BF4: 3B5FF894 addi r26,r31,-1900
+ 4: GETL R31, t4
+ 5: ADDL $0xFFFFF894, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0xFEE5BF8: 93570014 stw r26,20(r23)
+ 8: GETL R26, t6
+ 9: GETL R23, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEE5BFC: 39600000 li r11,0
+ 13: MOVL $0x0, t10
+ 14: PUTL t10, R11
+ 15: INCEIPL $4
+
+ 0xFEE5C00: 9197001C stw r12,28(r23)
+ 16: GETL R12, t12
+ 17: GETL R23, t14
+ 18: ADDL $0x1C, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFEE5C04: 40860040 bc 4,6,0xFEE5C44
+ 21: Jc06o $0xFEE5C44
+
+
+
+. 3140 FEE5BF0 24
+. 2C 87 00 00 3B 5F F8 94 93 57 00 14 39 60 00 00 91 97 00 1C 40 86 00 40
+==== BB 3141 (0xFEE5C44) approx BBs exec'd 0 ====
+
+ 0xFEE5C44: 1D6B001A mulli r11,r11,26
+ 0: GETL R11, t0
+ 1: MULL $0x1A, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0xFEE5C48: 807E1CAC lwz r3,7340(r30)
+ 4: GETL R30, t2
+ 5: ADDL $0x1CAC, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFEE5C4C: 3900000B li r8,11
+ 9: MOVL $0xB, t6
+ 10: PUTL t6, R8
+ 11: INCEIPL $4
+
+ 0xFEE5C50: 39400016 li r10,22
+ 12: MOVL $0x16, t8
+ 13: PUTL t8, R10
+ 14: INCEIPL $4
+
+ 0xFEE5C54: 7D6B1A14 add r11,r11,r3
+ 15: GETL R11, t10
+ 16: GETL R3, t12
+ 17: ADDL t10, t12
+ 18: PUTL t12, R11
+ 19: INCEIPL $4
+
+ 0xFEE5C58: A3EB0016 lhz r31,22(r11)
+ 20: GETL R11, t14
+ 21: ADDL $0x16, t14
+ 22: LDW (t14), t16
+ 23: PUTL t16, R31
+ 24: INCEIPL $4
+
+ 0xFEE5C5C: 7F9F6000 cmp cr7,r31,r12
+ 25: GETL R31, t18
+ 26: GETL R12, t20
+ 27: CMPL t18, t20, t22 (-rSo)
+ 28: ICRFL t22, $0x7, CR
+ 29: INCEIPL $4
+
+ 0xFEE5C60: 409D0018 bc 4,29,0xFEE5C78
+ 30: Jc29o $0xFEE5C78
+
+
+
+. 3141 FEE5C44 32
+. 1D 6B 00 1A 80 7E 1C AC 39 00 00 0B 39 40 00 16 7D 6B 1A 14 A3 EB 00 16 7F 9F 60 00 40 9D 00 18
+==== BB 3142 (0xFEE5C64) approx BBs exec'd 0 ====
+
+ 0xFEE5C64: 3908FFFF addi r8,r8,-1
+ 0: GETL R8, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0xFEE5C68: 550A083C rlwinm r10,r8,1,0,30
+ 4: GETL R8, t2
+ 5: SHLL $0x1, t2
+ 6: PUTL t2, R10
+ 7: INCEIPL $4
+
+ 0xFEE5C6C: 7F8A5A2E lhzx r28,r10,r11
+ 8: GETL R11, t4
+ 9: GETL R10, t6
+ 10: ADDL t6, t4
+ 11: LDW (t4), t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0xFEE5C70: 7F9C6000 cmp cr7,r28,r12
+ 14: GETL R28, t10
+ 15: GETL R12, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0xFEE5C74: 419DFFF0 bc 12,29,0xFEE5C64
+ 19: Js29o $0xFEE5C64
+
+
+
+. 3142 FEE5C64 20
+. 39 08 FF FF 55 0A 08 3C 7F 8A 5A 2E 7F 9C 60 00 41 9D FF F0
+==== BB 3143 (0xFEE5C78) approx BBs exec'd 0 ====
+
+ 0xFEE5C78: 7FAA5A2E lhzx r29,r10,r11
+ 0: GETL R11, t0
+ 1: GETL R10, t2
+ 2: ADDL t2, t0
+ 3: LDW (t0), t4
+ 4: PUTL t4, R29
+ 5: INCEIPL $4
+
+ 0xFEE5C7C: 38600001 li r3,1
+ 6: MOVL $0x1, t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFEE5C80: 91170010 stw r8,16(r23)
+ 9: GETL R8, t8
+ 10: GETL R23, t10
+ 11: ADDL $0x10, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0xFEE5C84: 7D3D6050 subf r9,r29,r12
+ 14: GETL R29, t12
+ 15: GETL R12, t14
+ 16: SUBL t12, t14
+ 17: PUTL t14, R9
+ 18: INCEIPL $4
+
+ 0xFEE5C88: 83010010 lwz r24,16(r1)
+ 19: GETL R1, t16
+ 20: ADDL $0x10, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R24
+ 23: INCEIPL $4
+
+ 0xFEE5C8C: 39890001 addi r12,r9,1
+ 24: GETL R9, t20
+ 25: ADDL $0x1, t20
+ 26: PUTL t20, R12
+ 27: INCEIPL $4
+
+ 0xFEE5C90: 83210014 lwz r25,20(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x14, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R25
+ 32: INCEIPL $4
+
+ 0xFEE5C94: 9197000C stw r12,12(r23)
+ 33: GETL R12, t26
+ 34: GETL R23, t28
+ 35: ADDL $0xC, t28
+ 36: STL t26, (t28)
+ 37: INCEIPL $4
+
+ 0xFEE5C98: 83410018 lwz r26,24(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x18, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R26
+ 42: INCEIPL $4
+
+ 0xFEE5C9C: 82E1000C lwz r23,12(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0xC, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R23
+ 47: INCEIPL $4
+
+ 0xFEE5CA0: 8361001C lwz r27,28(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x1C, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R27
+ 52: INCEIPL $4
+
+ 0xFEE5CA4: 83810020 lwz r28,32(r1)
+ 53: GETL R1, t42
+ 54: ADDL $0x20, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R28
+ 57: INCEIPL $4
+
+ 0xFEE5CA8: 83A10024 lwz r29,36(r1)
+ 58: GETL R1, t46
+ 59: ADDL $0x24, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R29
+ 62: INCEIPL $4
+
+ 0xFEE5CAC: 83C10028 lwz r30,40(r1)
+ 63: GETL R1, t50
+ 64: ADDL $0x28, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R30
+ 67: INCEIPL $4
+
+ 0xFEE5CB0: 83E1002C lwz r31,44(r1)
+ 68: GETL R1, t54
+ 69: ADDL $0x2C, t54
+ 70: LDL (t54), t56
+ 71: PUTL t56, R31
+ 72: INCEIPL $4
+
+ 0xFEE5CB4: 38210030 addi r1,r1,48
+ 73: GETL R1, t58
+ 74: ADDL $0x30, t58
+ 75: PUTL t58, R1
+ 76: INCEIPL $4
+
+ 0xFEE5CB8: 4E800020 blr
+ 77: GETL LR, t60
+ 78: JMPo-r t60 ($4)
+
+
+
+. 3143 FEE5C78 68
+. 7F AA 5A 2E 38 60 00 01 91 17 00 10 7D 3D 60 50 83 01 00 10 39 89 00 01 83 21 00 14 91 97 00 0C 83 41 00 18 82 E1 00 0C 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 3144 (0xFEE7CBC) approx BBs exec'd 0 ====
+
+ 0xFEE7CBC: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEE7CC0: 41820090 bc 12,2,0xFEE7D50
+ 4: Js02o $0xFEE7D50
+
+
+
+. 3144 FEE7CBC 8
+. 2C 03 00 00 41 82 00 90
+==== BB 3145 (0xFEE7CC4) approx BBs exec'd 0 ====
+
+ 0xFEE7CC4: 80DF0000 lwz r6,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFEE7CC8: 80E1000C lwz r7,12(r1)
+ 4: GETL R1, t4
+ 5: ADDL $0xC, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R7
+ 8: INCEIPL $4
+
+ 0xFEE7CCC: 7CA63A14 add r5,r6,r7
+ 9: GETL R6, t8
+ 10: GETL R7, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R5
+ 13: INCEIPL $4
+
+ 0xFEE7CD0: 90BF0000 stw r5,0(r31)
+ 14: GETL R5, t12
+ 15: GETL R31, t14
+ 16: STL t12, (t14)
+ 17: INCEIPL $4
+
+ 0xFEE7CD4: 39400000 li r10,0
+ 18: MOVL $0x0, t16
+ 19: PUTL t16, R10
+ 20: INCEIPL $4
+
+ 0xFEE7CD8: 7C0004AC sync
+ 21: INCEIPL $4
+
+ 0xFEE7CDC: 7D00E828 lwarx r8,r0,r29
+ 22: GETL R29, t18
+ 23: LOCKo
+ 24: LDL (t18), t20
+ 25: PUTL t20, R8
+ 26: INCEIPL $4
+
+ 0xFEE7CE0: 7D40E92D stwcx. r10,r0,r29
+ 27: GETL R29, t22
+ 28: GETL R10, t24
+ 29: LOCKo
+ 30: STL t24, (t22) (-rSo)
+ 31: ICRFL cr, $0x0, CR
+ 32: INCEIPL $4
+
+ 0xFEE7CE4: 40A2FFF8 bc 5,2,0xFEE7CDC
+ 33: Jc02o $0xFEE7CDC
+
+
+
+. 3145 FEE7CC4 36
+. 80 DF 00 00 80 E1 00 0C 7C A6 3A 14 90 BF 00 00 39 40 00 00 7C 00 04 AC 7D 00 E8 28 7D 40 E9 2D 40 A2 FF F8
+==== BB 3146 (0xFEE7CE8) approx BBs exec'd 0 ====
+
+ 0xFEE7CE8: 2F880001 cmpi cr7,r8,1
+ 0: GETL R8, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFEE7CEC: 419D0074 bc 12,29,0xFEE7D60
+ 5: Js29o $0xFEE7D60
+
+
+
+. 3146 FEE7CE8 8
+. 2F 88 00 01 41 9D 00 74
+==== BB 3147 (0xFEE7CF0) approx BBs exec'd 0 ====
+
+ 0xFEE7CF0: 7FE5FB78 or r5,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFEE7CF4: 83A10034 lwz r29,52(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x34, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFEE7CF8: 7CA32B78 or r3,r5,r5
+ 8: GETL R5, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFEE7CFC: 83410018 lwz r26,24(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x18, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R26
+ 15: INCEIPL $4
+
+ 0xFEE7D00: 7FA803A6 mtlr r29
+ 16: GETL R29, t12
+ 17: PUTL t12, LR
+ 18: INCEIPL $4
+
+ 0xFEE7D04: 8361001C lwz r27,28(r1)
+ 19: GETL R1, t14
+ 20: ADDL $0x1C, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R27
+ 23: INCEIPL $4
+
+ 0xFEE7D08: 83810020 lwz r28,32(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x20, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R28
+ 28: INCEIPL $4
+
+ 0xFEE7D0C: 83A10024 lwz r29,36(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x24, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R29
+ 33: INCEIPL $4
+
+ 0xFEE7D10: 83C10028 lwz r30,40(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x28, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R30
+ 38: INCEIPL $4
+
+ 0xFEE7D14: 83E1002C lwz r31,44(r1)
+ 39: GETL R1, t30
+ 40: ADDL $0x2C, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R31
+ 43: INCEIPL $4
+
+ 0xFEE7D18: 38210030 addi r1,r1,48
+ 44: GETL R1, t34
+ 45: ADDL $0x30, t34
+ 46: PUTL t34, R1
+ 47: INCEIPL $4
+
+ 0xFEE7D1C: 4E800020 blr
+ 48: GETL LR, t36
+ 49: JMPo-r t36 ($4)
+
+
+
+. 3147 FEE7CF0 48
+. 7F E5 FB 78 83 A1 00 34 7C A3 2B 78 83 41 00 18 7F A8 03 A6 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 3148 (0xFEE5FDC) approx BBs exec'd 0 ====
+
+ 0xFEE5FDC: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEE5FE0: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFEE5FE4: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xFEE5FE8: 7C0803A6 mtlr r0
+ 14: GETL R0, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xFEE5FEC: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+
+. 3148 FEE5FDC 20
+. 80 01 00 14 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 3149 (0x100013B0) approx BBs exec'd 0 ====
+
+ 0x100013B0: 7C7A1B79 or. r26,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R26
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x100013B4: 41820134 bc 12,2,0x100014E8
+ 5: Js02o $0x100014E8
+
+
+
+. 3149 100013B0 8
+. 7C 7A 1B 79 41 82 01 34
+==== BB 3150 (0x100013B8) approx BBs exec'd 0 ====
+
+ 0x100013B8: 83FE000C lwz r31,12(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x100013BC: 3B010030 addi r24,r1,48
+ 5: GETL R1, t4
+ 6: ADDL $0x30, t4
+ 7: PUTL t4, R24
+ 8: INCEIPL $4
+
+ 0x100013C0: 3B200001 li r25,1
+ 9: MOVL $0x1, t6
+ 10: PUTL t6, R25
+ 11: INCEIPL $4
+
+ 0x100013C4: 7FA3EB78 or r3,r29,r29
+ 12: GETL R29, t8
+ 13: PUTL t8, R3
+ 14: INCEIPL $4
+
+ 0x100013C8: 38810038 addi r4,r1,56
+ 15: GETL R1, t10
+ 16: ADDL $0x38, t10
+ 17: PUTL t10, R4
+ 18: INCEIPL $4
+
+ 0x100013CC: 38A00001 li r5,1
+ 19: MOVL $0x1, t12
+ 20: PUTL t12, R5
+ 21: INCEIPL $4
+
+ 0x100013D0: 3B800000 li r28,0
+ 22: MOVL $0x0, t14
+ 23: PUTL t14, R28
+ 24: INCEIPL $4
+
+ 0x100013D4: 48005185 bl 0x10006558
+ 25: MOVL $0x100013D8, t16
+ 26: PUTL t16, LR
+ 27: JMPo-c $0x10006558 ($4)
+
+
+
+. 3150 100013B8 32
+. 83 FE 00 0C 3B 01 00 30 3B 20 00 01 7F A3 EB 78 38 81 00 38 38 A0 00 01 3B 80 00 00 48 00 51 85
+==== BB 3151 (0x10006558) approx BBs exec'd 0 ====
+
+ 0x10006558: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x1000655C: 2C030000 cmpi cr0,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0x10006560: 9421FFF0 stwu r1,-16(r1)
+ 7: GETL R1, t6
+ 8: GETL R1, t8
+ 9: ADDL $0xFFFFFFF0, t8
+ 10: PUTL t8, R1
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x10006564: 7C8B2378 or r11,r4,r4
+ 13: GETL R4, t10
+ 14: PUTL t10, R11
+ 15: INCEIPL $4
+
+ 0x10006568: 90010014 stw r0,20(r1)
+ 16: GETL R0, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x14, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x1000656C: 3C007FFF lis r0,32767
+ 21: MOVL $0x7FFF0000, t16
+ 22: PUTL t16, R0
+ 23: INCEIPL $4
+
+ 0x10006570: 6000FFFF ori r0,r0,0xFFFF
+ 24: MOVL $0x7FFFFFFF, t18
+ 25: PUTL t18, R0
+ 26: INCEIPL $4
+
+ 0x10006574: 81240000 lwz r9,0(r4)
+ 27: GETL R4, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R9
+ 30: INCEIPL $4
+
+ 0x10006578: 41820030 bc 12,2,0x100065A8
+ 31: Js02o $0x100065A8
+
+
+
+. 3151 10006558 36
+. 7C 08 02 A6 2C 03 00 00 94 21 FF F0 7C 8B 23 78 90 01 00 14 3C 00 7F FF 60 00 FF FF 81 24 00 00 41 82 00 30
+==== BB 3152 (0x100065A8) approx BBs exec'd 0 ====
+
+ 0x100065A8: 2F890000 cmpi cr7,r9,0
+ 0: GETL R9, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x100065AC: 40BEFFE0 bc 5,30,0x1000658C
+ 4: Jc30o $0x1000658C
+
+
+
+. 3152 100065A8 8
+. 2F 89 00 00 40 BE FF E0
+==== BB 3153 (0x100065B0) approx BBs exec'd 0 ====
+
+ 0x100065B0: 38000040 li r0,64
+ 0: MOVL $0x40, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x100065B4: 7D202B96 divwu r9, r0, r5
+ 3: GETL R0, t4
+ 4: GETL R5, t2
+ 5: UDIVL t2, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x100065B8: 20090000 subfic r0,r9,0
+ 8: GETL R9, t6
+ 9: MOVL $0x0, t8
+ 10: SBBL t6, t8 (-wCa)
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x100065BC: 7C090194 addze r0,r9
+ 13: GETL R9, t10
+ 14: ADCL $0x0, t10 (-rCa-wCa)
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0x100065C0: 7C090378 or r9,r0,r0
+ 17: GETL R0, t12
+ 18: PUTL t12, R9
+ 19: INCEIPL $4
+
+ 0x100065C4: 4BFFFFC8 b 0x1000658C
+ 20: JMPo $0x1000658C ($4)
+
+
+
+. 3153 100065B0 24
+. 38 00 00 40 7D 20 2B 96 20 09 00 00 7C 09 01 94 7C 09 03 78 4B FF FF C8
+==== BB 3154 (0x1000658C) approx BBs exec'd 0 ====
+
+ 0x1000658C: 7C8929D6 mullw r4,r9,r5
+ 0: GETL R9, t0
+ 1: GETL R5, t2
+ 2: MULL t0, t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x10006590: 912B0000 stw r9,0(r11)
+ 5: GETL R9, t4
+ 6: GETL R11, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x10006594: 4BFFFF8D bl 0x10006520
+ 9: MOVL $0x10006598, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0x10006520 ($4)
+
+
+
+. 3154 1000658C 12
+. 7C 89 29 D6 91 2B 00 00 4B FF FF 8D
+==== BB 3155 (0x10006520) approx BBs exec'd 0 ====
+
+ 0x10006520: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x10006524: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x10006528: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x1000652C: 3800FFFF li r0,-1
+ 14: MOVL $0xFFFFFFFF, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0x10006530: 7F802040 cmpl cr7,r0,r4
+ 17: GETL R0, t12
+ 18: GETL R4, t14
+ 19: CMPUL t12, t14, t16 (-rSo)
+ 20: ICRFL t16, $0x7, CR
+ 21: INCEIPL $4
+
+ 0x10006534: 419C0020 bc 12,28,0x10006554
+ 22: Js28o $0x10006554
+
+
+
+. 3155 10006520 24
+. 7C 08 02 A6 94 21 FF F0 90 01 00 14 38 00 FF FF 7F 80 20 40 41 9C 00 20
+==== BB 3156 (0x10006538) approx BBs exec'd 0 ====
+
+ 0x10006538: 48014705 bl 0x1001AC3C
+ 0: MOVL $0x1000653C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x1001AC3C ($4)
+
+
+
+. 3156 10006538 4
+. 48 01 47 05
+==== BB 3157 (0x1001AC3C) approx BBs exec'd 0 ====
+
+ 0x1001AC3C: 39600084 li r11,132
+ 0: MOVL $0x84, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AC40: 4BFFFECC b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 3157 1001AC3C 8
+. 39 60 00 84 4B FF FE CC
+==== BB 3158 (0x1000653C) approx BBs exec'd 0 ====
+
+ 0x1000653C: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10006540: 419E0014 bc 12,30,0x10006554
+ 4: Js30o $0x10006554
+
+
+
+. 3158 1000653C 8
+. 2F 83 00 00 41 9E 00 14
+==== BB 3159 (0x10006544) approx BBs exec'd 0 ====
+
+ 0x10006544: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10006548: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x1000654C: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x10006550: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 3159 10006544 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 3160 (0x10006598) approx BBs exec'd 0 ====
+
+ 0x10006598: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x1000659C: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x100065A0: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x100065A4: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 3160 10006598 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 3161 (0x100013D8) approx BBs exec'd 0 ====
+
+ 0x100013D8: 809E0070 lwz r4,112(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x70, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x100013DC: 9B230000 stb r25,0(r3)
+ 5: GETL R25, t4
+ 6: GETL R3, t6
+ 7: STB t4, (t6)
+ 8: INCEIPL $4
+
+ 0x100013E0: 7C7D1B78 or r29,r3,r3
+ 9: GETL R3, t8
+ 10: PUTL t8, R29
+ 11: INCEIPL $4
+
+ 0x100013E4: 801F0000 lwz r0,0(r31)
+ 12: GETL R31, t10
+ 13: LDL (t10), t12
+ 14: PUTL t12, R0
+ 15: INCEIPL $4
+
+ 0x100013E8: 38600006 li r3,6
+ 16: MOVL $0x6, t14
+ 17: PUTL t14, R3
+ 18: INCEIPL $4
+
+ 0x100013EC: 2F800000 cmpi cr7,r0,0
+ 19: GETL R0, t16
+ 20: CMP0L t16, t18 (-rSo)
+ 21: ICRFL t18, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x100013F0: 409E00AC bc 4,30,0x1000149C
+ 23: Jc30o $0x1000149C
+
+
+
+. 3161 100013D8 28
+. 80 9E 00 70 9B 23 00 00 7C 7D 1B 78 80 1F 00 00 38 60 00 06 2F 80 00 00 40 9E 00 AC
+==== BB 3162 (0x100013F4) approx BBs exec'd 0 ====
+
+ 0x100013F4: 80810038 lwz r4,56(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x38, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x100013F8: 7F65DB78 or r5,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x100013FC: 81180004 lwz r8,4(r24)
+ 8: GETL R24, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R8
+ 12: INCEIPL $4
+
+ 0x10001400: 7F46D378 or r6,r26,r26
+ 13: GETL R26, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x10001404: 38E00000 li r7,0
+ 16: MOVL $0x0, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0x10001408: 7FA3EB78 or r3,r29,r29
+ 19: GETL R29, t14
+ 20: PUTL t14, R3
+ 21: INCEIPL $4
+
+ 0x1000140C: 480023C9 bl 0x100037D4
+ 22: MOVL $0x10001410, t16
+ 23: PUTL t16, LR
+ 24: JMPo-c $0x100037D4 ($4)
+
+
+
+. 3162 100013F4 28
+. 80 81 00 38 7F 65 DB 78 81 18 00 04 7F 46 D3 78 38 E0 00 00 7F A3 EB 78 48 00 23 C9
+==== BB 3163 (0x100037D4) approx BBs exec'd 0 ====
+
+ 0x100037D4: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x100037D8: 9421FB40 stwu r1,-1216(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFB40, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x100037DC: 92C10498 stw r22,1176(r1)
+ 9: GETL R22, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x498, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x100037E0: 480170CD bl 0x1001A8AC
+ 14: MOVL $0x100037E4, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x1001A8AC ($4)
+
+
+
+. 3163 100037D4 16
+. 7C 08 02 A6 94 21 FB 40 92 C1 04 98 48 01 70 CD
+==== BB 3164 (0x100037E4) approx BBs exec'd 0 ====
+
+ 0x100037E4: 91E1047C stw r15,1148(r1)
+ 0: GETL R15, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x47C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x100037E8: 7CEF3B78 or r15,r7,r7
+ 5: GETL R7, t4
+ 6: PUTL t4, R15
+ 7: INCEIPL $4
+
+ 0x100037EC: 900104C4 stw r0,1220(r1)
+ 8: GETL R0, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x4C4, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x100037F0: 82C60008 lwz r22,8(r6)
+ 13: GETL R6, t10
+ 14: ADDL $0x8, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R22
+ 17: INCEIPL $4
+
+ 0x100037F4: 92210484 stw r17,1156(r1)
+ 18: GETL R17, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x484, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x100037F8: 3A200000 li r17,0
+ 23: MOVL $0x0, t18
+ 24: PUTL t18, R17
+ 25: INCEIPL $4
+
+ 0x100037FC: 2F96000C cmpi cr7,r22,12
+ 26: GETL R22, t20
+ 27: MOVL $0xC, t24
+ 28: CMPL t20, t24, t22 (-rSo)
+ 29: ICRFL t22, $0x7, CR
+ 30: INCEIPL $4
+
+ 0x10003800: 92410488 stw r18,1160(r1)
+ 31: GETL R18, t26
+ 32: GETL R1, t28
+ 33: ADDL $0x488, t28
+ 34: STL t26, (t28)
+ 35: INCEIPL $4
+
+ 0x10003804: 9261048C stw r19,1164(r1)
+ 36: GETL R19, t30
+ 37: GETL R1, t32
+ 38: ADDL $0x48C, t32
+ 39: STL t30, (t32)
+ 40: INCEIPL $4
+
+ 0x10003808: 7D134378 or r19,r8,r8
+ 41: GETL R8, t34
+ 42: PUTL t34, R19
+ 43: INCEIPL $4
+
+ 0x1000380C: 92A10494 stw r21,1172(r1)
+ 44: GETL R21, t36
+ 45: GETL R1, t38
+ 46: ADDL $0x494, t38
+ 47: STL t36, (t38)
+ 48: INCEIPL $4
+
+ 0x10003810: 3AA00000 li r21,0
+ 49: MOVL $0x0, t40
+ 50: PUTL t40, R21
+ 51: INCEIPL $4
+
+ 0x10003814: 92E1049C stw r23,1180(r1)
+ 52: GETL R23, t42
+ 53: GETL R1, t44
+ 54: ADDL $0x49C, t44
+ 55: STL t42, (t44)
+ 56: INCEIPL $4
+
+ 0x10003818: 7C972378 or r23,r4,r4
+ 57: GETL R4, t46
+ 58: PUTL t46, R23
+ 59: INCEIPL $4
+
+ 0x1000381C: 930104A0 stw r24,1184(r1)
+ 60: GETL R24, t48
+ 61: GETL R1, t50
+ 62: ADDL $0x4A0, t50
+ 63: STL t48, (t50)
+ 64: INCEIPL $4
+
+ 0x10003820: 7CA42B78 or r4,r5,r5
+ 65: GETL R5, t52
+ 66: PUTL t52, R4
+ 67: INCEIPL $4
+
+ 0x10003824: 932104A4 stw r25,1188(r1)
+ 68: GETL R25, t54
+ 69: GETL R1, t56
+ 70: ADDL $0x4A4, t56
+ 71: STL t54, (t56)
+ 72: INCEIPL $4
+
+ 0x10003828: 7CD83378 or r24,r6,r6
+ 73: GETL R6, t58
+ 74: PUTL t58, R24
+ 75: INCEIPL $4
+
+ 0x1000382C: 93C104B8 stw r30,1208(r1)
+ 76: GETL R30, t60
+ 77: GETL R1, t62
+ 78: ADDL $0x4B8, t62
+ 79: STL t60, (t62)
+ 80: INCEIPL $4
+
+ 0x10003830: 7C791B78 or r25,r3,r3
+ 81: GETL R3, t64
+ 82: PUTL t64, R25
+ 83: INCEIPL $4
+
+ 0x10003834: 91C10478 stw r14,1144(r1)
+ 84: GETL R14, t66
+ 85: GETL R1, t68
+ 86: ADDL $0x478, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0x10003838: 7FC802A6 mflr r30
+ 89: GETL LR, t70
+ 90: PUTL t70, R30
+ 91: INCEIPL $4
+
+ 0x1000383C: 92010480 stw r16,1152(r1)
+ 92: GETL R16, t72
+ 93: GETL R1, t74
+ 94: ADDL $0x480, t74
+ 95: STL t72, (t74)
+ 96: INCEIPL $4
+
+ 0x10003840: 92810490 stw r20,1168(r1)
+ 97: GETL R20, t76
+ 98: GETL R1, t78
+ 99: ADDL $0x490, t78
+ 100: STL t76, (t78)
+ 101: INCEIPL $4
+
+ 0x10003844: 934104A8 stw r26,1192(r1)
+ 102: GETL R26, t80
+ 103: GETL R1, t82
+ 104: ADDL $0x4A8, t82
+ 105: STL t80, (t82)
+ 106: INCEIPL $4
+
+ 0x10003848: 936104AC stw r27,1196(r1)
+ 107: GETL R27, t84
+ 108: GETL R1, t86
+ 109: ADDL $0x4AC, t86
+ 110: STL t84, (t86)
+ 111: INCEIPL $4
+
+ 0x1000384C: 938104B0 stw r28,1200(r1)
+ 112: GETL R28, t88
+ 113: GETL R1, t90
+ 114: ADDL $0x4B0, t90
+ 115: STL t88, (t90)
+ 116: INCEIPL $4
+
+ 0x10003850: 93A104B4 stw r29,1204(r1)
+ 117: GETL R29, t92
+ 118: GETL R1, t94
+ 119: ADDL $0x4B4, t94
+ 120: STL t92, (t94)
+ 121: INCEIPL $4
+
+ 0x10003854: 93E104BC stw r31,1212(r1)
+ 122: GETL R31, t96
+ 123: GETL R1, t98
+ 124: ADDL $0x4BC, t98
+ 125: STL t96, (t98)
+ 126: INCEIPL $4
+
+ 0x10003858: 82460028 lwz r18,40(r6)
+ 127: GETL R6, t100
+ 128: ADDL $0x28, t100
+ 129: LDL (t100), t102
+ 130: PUTL t102, R18
+ 131: INCEIPL $4
+
+ 0x1000385C: 409D016C bc 4,29,0x100039C8
+ 132: Jc29o $0x100039C8
+
+
+
+. 3164 100037E4 124
+. 91 E1 04 7C 7C EF 3B 78 90 01 04 C4 82 C6 00 08 92 21 04 84 3A 20 00 00 2F 96 00 0C 92 41 04 88 92 61 04 8C 7D 13 43 78 92 A1 04 94 3A A0 00 00 92 E1 04 9C 7C 97 23 78 93 01 04 A0 7C A4 2B 78 93 21 04 A4 7C D8 33 78 93 C1 04 B8 7C 79 1B 78 91 C1 04 78 7F C8 02 A6 92 01 04 80 92 81 04 90 93 41 04 A8 93 61 04 AC 93 81 04 B0 93 A1 04 B4 93 E1 04 BC 82 46 00 28 40 9D 01 6C
+==== BB 3165 (0x100039C8) approx BBs exec'd 0 ====
+
+ 0x100039C8: 2F960000 cmpi cr7,r22,0
+ 0: GETL R22, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x100039CC: 40BEFE98 bc 5,30,0x10003864
+ 4: Jc30o $0x10003864
+
+
+
+. 3165 100039C8 8
+. 2F 96 00 00 40 BE FE 98
+==== BB 3166 (0x10003864) approx BBs exec'd 0 ====
+
+ 0x10003864: 88040000 lbz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x10003868: 7C9A2378 or r26,r4,r4
+ 4: GETL R4, t4
+ 5: PUTL t4, R26
+ 6: INCEIPL $4
+
+ 0x1000386C: 2F800000 cmpi cr7,r0,0
+ 7: GETL R0, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x10003870: 419E005C bc 12,30,0x100038CC
+ 11: Js30o $0x100038CC
+
+
+
+. 3166 10003864 16
+. 88 04 00 00 7C 9A 23 78 2F 80 00 00 41 9E 00 5C
+==== BB 3167 (0x10003874) approx BBs exec'd 0 ====
+
+ 0x10003874: 7C090774 extsb r9,r0
+ 0: GETB R0, t0
+ 1: WIDENL_Bs _st0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x10003878: 3B600000 li r27,0
+ 4: MOVL $0x0, t2
+ 5: PUTL t2, R27
+ 6: INCEIPL $4
+
+ 0x1000387C: 2F89003F cmpi cr7,r9,63
+ 7: GETL R9, t4
+ 8: MOVL $0x3F, t8
+ 9: CMPL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x10003880: 3B80FFFF li r28,-1
+ 12: MOVL $0xFFFFFFFF, t10
+ 13: PUTL t10, R28
+ 14: INCEIPL $4
+
+ 0x10003884: 9361045C stw r27,1116(r1)
+ 15: GETL R27, t12
+ 16: GETL R1, t14
+ 17: ADDL $0x45C, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x10003888: 3A800000 li r20,0
+ 20: MOVL $0x0, t16
+ 21: PUTL t16, R20
+ 22: INCEIPL $4
+
+ 0x1000388C: 39400000 li r10,0
+ 23: MOVL $0x0, t18
+ 24: PUTL t18, R10
+ 25: INCEIPL $4
+
+ 0x10003890: 419D0064 bc 12,29,0x100038F4
+ 26: Js29o $0x100038F4
+
+
+
+. 3167 10003874 32
+. 7C 09 07 74 3B 60 00 00 2F 89 00 3F 3B 80 FF FF 93 61 04 5C 3A 80 00 00 39 40 00 00 41 9D 00 64
+==== BB 3168 (0x10003894) approx BBs exec'd 0 ====
+
+ 0x10003894: 2F890026 cmpi cr7,r9,38
+ 0: GETL R9, t0
+ 1: MOVL $0x26, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x10003898: 419C0140 bc 12,28,0x100039D8
+ 5: Js28o $0x100039D8
+
+
+
+. 3168 10003894 8
+. 2F 89 00 26 41 9C 01 40
+==== BB 3169 (0x100039D8) approx BBs exec'd 0 ====
+
+ 0x100039D8: 2F890023 cmpi cr7,r9,35
+ 0: GETL R9, t0
+ 1: MOVL $0x23, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x100039DC: 419D0078 bc 12,29,0x10003A54
+ 5: Js29o $0x10003A54
+
+
+
+. 3169 100039D8 8
+. 2F 89 00 23 41 9D 00 78
+==== BB 3170 (0x10003A54) approx BBs exec'd 0 ====
+
+ 0x10003A54: 2F890025 cmpi cr7,r9,37
+ 0: GETL R9, t0
+ 1: MOVL $0x25, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x10003A58: 409EFEB8 bc 4,30,0x10003910
+ 5: Jc30o $0x10003910
+
+
+
+. 3170 10003A54 8
+. 2F 89 00 25 40 9E FE B8
+==== BB 3171 (0x10003A5C) approx BBs exec'd 0 ====
+
+ 0x10003A5C: 8D1A0001 lbzu r8,1(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: LDB (t0), t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0x10003A60: 7D000774 extsb r0,r8
+ 6: GETB R8, t4
+ 7: WIDENL_Bs _st4
+ 8: PUTL t4, R0
+ 9: INCEIPL $4
+
+ 0x10003A64: 2F800030 cmpi cr7,r0,48
+ 10: GETL R0, t6
+ 11: MOVL $0x30, t10
+ 12: CMPL t6, t10, t8 (-rSo)
+ 13: ICRFL t8, $0x7, CR
+ 14: INCEIPL $4
+
+ 0x10003A68: 419E0018 bc 12,30,0x10003A80
+ 15: Js30o $0x10003A80
+
+
+
+. 3171 10003A5C 16
+. 8D 1A 00 01 7D 00 07 74 2F 80 00 30 41 9E 00 18
+==== BB 3172 (0x10003A6C) approx BBs exec'd 0 ====
+
+ 0x10003A6C: 419D0D7C bc 12,29,0x100047E8
+ 0: Js29o $0x100047E8
+
+
+
+. 3172 10003A6C 4
+. 41 9D 0D 7C
+==== BB 3173 (0x100047E8) approx BBs exec'd 0 ====
+
+ 0x100047E8: 2F80005E cmpi cr7,r0,94
+ 0: GETL R0, t0
+ 1: MOVL $0x5E, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x100047EC: 419E0018 bc 12,30,0x10004804
+ 5: Js30o $0x10004804
+
+
+
+. 3173 100047E8 8
+. 2F 80 00 5E 41 9E 00 18
+==== BB 3174 (0x100047F0) approx BBs exec'd 0 ====
+
+ 0x100047F0: 2F80005F cmpi cr7,r0,95
+ 0: GETL R0, t0
+ 1: MOVL $0x5F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x100047F4: 419EF28C bc 12,30,0x10003A80
+ 5: Js30o $0x10003A80
+
+
+
+. 3174 100047F0 8
+. 2F 80 00 5F 41 9E F2 8C
+==== BB 3175 (0x100047F8) approx BBs exec'd 0 ====
+
+ 0x100047F8: 4BFFF2DC b 0x10003AD4
+ 0: JMPo $0x10003AD4 ($4)
+
+
+
+. 3175 100047F8 4
+. 4B FF F2 DC
+==== BB 3176 (0x10003AD4) approx BBs exec'd 0 ====
+
+ 0x10003AD4: 7D090774 extsb r9,r8
+ 0: GETB R8, t0
+ 1: WIDENL_Bs _st0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x10003AD8: 3929FFD0 addi r9,r9,-48
+ 4: GETL R9, t2
+ 5: ADDL $0xFFFFFFD0, t2
+ 6: PUTL t2, R9
+ 7: INCEIPL $4
+
+ 0x10003ADC: 2B890009 cmpli cr7,r9,9
+ 8: GETL R9, t4
+ 9: MOVL $0x9, t8
+ 10: CMPUL t4, t8, t6 (-rSo)
+ 11: ICRFL t6, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x10003AE0: 419D0048 bc 12,29,0x10003B28
+ 13: Js29o $0x10003B28
+
+
+
+. 3176 10003AD4 16
+. 7D 09 07 74 39 29 FF D0 2B 89 00 09 41 9D 00 48
+==== BB 3177 (0x10003B28) approx BBs exec'd 0 ====
+
+ 0x10003B28: 7D000774 extsb r0,r8
+ 0: GETB R8, t0
+ 1: WIDENL_Bs _st0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x10003B2C: 2F800045 cmpi cr7,r0,69
+ 4: GETL R0, t2
+ 5: MOVL $0x45, t6
+ 6: CMPL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x10003B30: 419E0CDC bc 12,30,0x1000480C
+ 9: Js30o $0x1000480C
+
+
+
+. 3177 10003B28 12
+. 7D 00 07 74 2F 80 00 45 41 9E 0C DC
+==== BB 3178 (0x10003B34) approx BBs exec'd 0 ====
+
+ 0x10003B34: 2F80004F cmpi cr7,r0,79
+ 0: GETL R0, t0
+ 1: MOVL $0x4F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x10003B38: 3A000000 li r16,0
+ 5: MOVL $0x0, t6
+ 6: PUTL t6, R16
+ 7: INCEIPL $4
+
+ 0x10003B3C: 419E0CD0 bc 12,30,0x1000480C
+ 8: Js30o $0x1000480C
+
+
+
+. 3178 10003B34 12
+. 2F 80 00 4F 3A 00 00 00 41 9E 0C D0
+==== BB 3179 (0x10003B40) approx BBs exec'd 0 ====
+
+ 0x10003B40: 7D0E0774 extsb r14,r8
+ 0: GETB R8, t0
+ 1: WIDENL_Bs _st0
+ 2: PUTL t0, R14
+ 3: INCEIPL $4
+
+ 0x10003B44: 2B8E007A cmpli cr7,r14,122
+ 4: GETL R14, t2
+ 5: MOVL $0x7A, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x10003B48: 419D0138 bc 12,29,0x10003C80
+ 9: Js29o $0x10003C80
+
+
+
+. 3179 10003B40 12
+. 7D 0E 07 74 2B 8E 00 7A 41 9D 01 38
+==== BB 3180 (0x10003B4C) approx BBs exec'd 0 ====
+
+ 0x10003B4C: 817E0130 lwz r11,304(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x130, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x10003B50: 55C0103A rlwinm r0,r14,2,0,29
+ 5: GETL R14, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x10003B54: 7D2B002E lwzx r9,r11,r0
+ 9: GETL R0, t6
+ 10: GETL R11, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x10003B58: 7D295A14 add r9,r9,r11
+ 15: GETL R9, t12
+ 16: GETL R11, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x10003B5C: 7D2903A6 mtctr r9
+ 20: GETL R9, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0x10003B60: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+
+. 3180 10003B4C 24
+. 81 7E 01 30 55 C0 10 3A 7D 2B 00 2E 7D 29 5A 14 7D 29 03 A6 4E 80 04 20
+==== BB 3181 (0x10003C5C) approx BBs exec'd 0 ====
+
+ 0x10003C5C: 2F100000 cmpi cr6,r16,0
+ 0: GETL R16, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x10003C60: 409A0020 bc 4,26,0x10003C80
+ 4: Jc26o $0x10003C80
+
+
+
+. 3181 10003C5C 8
+. 2F 10 00 00 40 9A 00 20
+==== BB 3182 (0x10003C64) approx BBs exec'd 0 ====
+
+ 0x10003C64: 2F8A0000 cmpi cr7,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10003C68: 41BEFF1C bc 13,30,0x10003B84
+ 4: Js30o $0x10003B84
+
+
+
+. 3182 10003C64 8
+. 2F 8A 00 00 41 BE FF 1C
+==== BB 3183 (0x10003B84) approx BBs exec'd 0 ====
+
+ 0x10003B84: 38000025 li r0,37
+ 0: MOVL $0x25, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x10003B88: 39210459 addi r9,r1,1113
+ 3: GETL R1, t2
+ 4: ADDL $0x459, t2
+ 5: PUTL t2, R9
+ 6: INCEIPL $4
+
+ 0x10003B8C: 98010458 stb r0,1112(r1)
+ 7: GETL R0, t4
+ 8: GETL R1, t6
+ 9: ADDL $0x458, t6
+ 10: STB t4, (t6)
+ 11: INCEIPL $4
+
+ 0x10003B90: 419A000C bc 12,26,0x10003B9C
+ 12: Js26o $0x10003B9C
+
+
+
+. 3183 10003B84 16
+. 38 00 00 25 39 21 04 59 98 01 04 58 41 9A 00 0C
+==== BB 3184 (0x10003B9C) approx BBs exec'd 0 ====
+
+ 0x10003B9C: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x10003BA0: 3A010020 addi r16,r1,32
+ 3: GETL R1, t2
+ 4: ADDL $0x20, t2
+ 5: PUTL t2, R16
+ 6: INCEIPL $4
+
+ 0x10003BA4: 98090001 stb r0,1(r9)
+ 7: GETL R0, t4
+ 8: GETL R9, t6
+ 9: ADDL $0x1, t6
+ 10: STB t4, (t6)
+ 11: INCEIPL $4
+
+ 0x10003BA8: 38A10458 addi r5,r1,1112
+ 12: GETL R1, t8
+ 13: ADDL $0x458, t8
+ 14: PUTL t8, R5
+ 15: INCEIPL $4
+
+ 0x10003BAC: 99C90000 stb r14,0(r9)
+ 16: GETL R14, t10
+ 17: GETL R9, t12
+ 18: STB t10, (t12)
+ 19: INCEIPL $4
+
+ 0x10003BB0: 7E038378 or r3,r16,r16
+ 20: GETL R16, t14
+ 21: PUTL t14, R3
+ 22: INCEIPL $4
+
+ 0x10003BB4: 38800400 li r4,1024
+ 23: MOVL $0x400, t16
+ 24: PUTL t16, R4
+ 25: INCEIPL $4
+
+ 0x10003BB8: 7F06C378 or r6,r24,r24
+ 26: GETL R24, t18
+ 27: PUTL t18, R6
+ 28: INCEIPL $4
+
+ 0x10003BBC: 48017019 bl 0x1001ABD4
+ 29: MOVL $0x10003BC0, t20
+ 30: PUTL t20, LR
+ 31: JMPo-c $0x1001ABD4 ($4)
+
+
+
+. 3184 10003B9C 36
+. 38 00 00 00 3A 01 00 20 98 09 00 01 38 A1 04 58 99 C9 00 00 7E 03 83 78 38 80 04 00 7F 06 C3 78 48 01 70 19
+==== BB 3185 (0x1001ABD4) approx BBs exec'd 0 ====
+
+ 0x1001ABD4: 39600050 li r11,80
+ 0: MOVL $0x50, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001ABD8: 4BFFFF34 b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 3185 1001ABD4 8
+. 39 60 00 50 4B FF FF 34
+==== BB 3186 strftime(0xFEEC444) approx BBs exec'd 0 ====
+
+ 0xFEEC444: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEEC448: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0xFEEC44C: 480BBA05 bl 0xFFA7E50
+ 9: MOVL $0xFEEC450, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3186 FEEC444 12
+. 94 21 FF F0 7D 88 02 A6 48 0B BA 05
+==== BB 3187 (0xFEEC450) approx BBs exec'd 0 ====
+
+ 0xFEEC450: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEEC454: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEEC458: 7D8803A6 mtlr r12
+ 8: GETL R12, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0xFEEC45C: 80FE1D50 lwz r7,7504(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x1D50, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R7
+ 15: INCEIPL $4
+
+ 0xFEEC460: 83C10008 lwz r30,8(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x8, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0xFEEC464: 7D271214 add r9,r7,r2
+ 21: GETL R7, t16
+ 22: GETL R2, t18
+ 23: ADDL t16, t18
+ 24: PUTL t18, R9
+ 25: INCEIPL $4
+
+ 0xFEEC468: 38210010 addi r1,r1,16
+ 26: GETL R1, t20
+ 27: ADDL $0x10, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0xFEEC46C: 80E90000 lwz r7,0(r9)
+ 30: GETL R9, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R7
+ 33: INCEIPL $4
+
+ 0xFEEC470: 48000034 b 0xFEEC4A4
+ 34: JMPo $0xFEEC4A4 ($4)
+
+
+
+. 3187 FEEC450 36
+. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 80 FE 1D 50 83 C1 00 08 7D 27 12 14 38 21 00 10 80 E9 00 00 48 00 00 34
+==== BB 3188 strftime_l(0xFEEC4A4) approx BBs exec'd 0 ====
+
+ 0xFEEC4A4: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFEEC4A8: 9421FF60 stwu r1,-160(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFF60, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEEC4AC: 480BB9A5 bl 0xFFA7E50
+ 9: MOVL $0xFEEC4B0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3188 FEEC4A4 12
+. 7C 08 02 A6 94 21 FF 60 48 0B B9 A5
+==== BB 3189 (0xFEEC4B0) approx BBs exec'd 0 ====
+
+ 0xFEEC4B0: 93C10098 stw r30,152(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x98, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEEC4B4: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEEC4B8: 7D800026 mfcr r12
+ 8: GETL CR, t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0xFEEC4BC: 900100A4 stw r0,164(r1)
+ 11: GETL R0, t8
+ 12: GETL R1, t10
+ 13: ADDL $0xA4, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFEEC4C0: 9261006C stw r19,108(r1)
+ 16: GETL R19, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x6C, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFEEC4C4: 82660008 lwz r19,8(r6)
+ 21: GETL R6, t16
+ 22: ADDL $0x8, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R19
+ 25: INCEIPL $4
+
+ 0xFEEC4C8: 93E1009C stw r31,156(r1)
+ 26: GETL R31, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x9C, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xFEEC4CC: 7CBF2B78 or r31,r5,r5
+ 31: GETL R5, t24
+ 32: PUTL t24, R31
+ 33: INCEIPL $4
+
+ 0xFEEC4D0: 92010060 stw r16,96(r1)
+ 34: GETL R16, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x60, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFEEC4D4: 92210064 stw r17,100(r1)
+ 39: GETL R17, t30
+ 40: GETL R1, t32
+ 41: ADDL $0x64, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFEEC4D8: 92810070 stw r20,112(r1)
+ 44: GETL R20, t34
+ 45: GETL R1, t36
+ 46: ADDL $0x70, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0xFEEC4DC: 7C942378 or r20,r4,r4
+ 49: GETL R4, t38
+ 50: PUTL t38, R20
+ 51: INCEIPL $4
+
+ 0xFEEC4E0: 92A10074 stw r21,116(r1)
+ 52: GETL R21, t40
+ 53: GETL R1, t42
+ 54: ADDL $0x74, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0xFEEC4E4: 3AA00000 li r21,0
+ 57: MOVL $0x0, t44
+ 58: PUTL t44, R21
+ 59: INCEIPL $4
+
+ 0xFEEC4E8: 92C10078 stw r22,120(r1)
+ 60: GETL R22, t46
+ 61: GETL R1, t48
+ 62: ADDL $0x78, t48
+ 63: STL t46, (t48)
+ 64: INCEIPL $4
+
+ 0xFEEC4EC: 7CF63B78 or r22,r7,r7
+ 65: GETL R7, t50
+ 66: PUTL t50, R22
+ 67: INCEIPL $4
+
+ 0xFEEC4F0: 92E1007C stw r23,124(r1)
+ 68: GETL R23, t52
+ 69: GETL R1, t54
+ 70: ADDL $0x7C, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0xFEEC4F4: 7CD73378 or r23,r6,r6
+ 73: GETL R6, t56
+ 74: PUTL t56, R23
+ 75: INCEIPL $4
+
+ 0xFEEC4F8: 9361008C stw r27,140(r1)
+ 76: GETL R27, t58
+ 77: GETL R1, t60
+ 78: ADDL $0x8C, t60
+ 79: STL t58, (t60)
+ 80: INCEIPL $4
+
+ 0xFEEC4FC: 7C7B1B78 or r27,r3,r3
+ 81: GETL R3, t62
+ 82: PUTL t62, R27
+ 83: INCEIPL $4
+
+ 0xFEEC500: 91C10058 stw r14,88(r1)
+ 84: GETL R14, t64
+ 85: GETL R1, t66
+ 86: ADDL $0x58, t66
+ 87: STL t64, (t66)
+ 88: INCEIPL $4
+
+ 0xFEEC504: 91E1005C stw r15,92(r1)
+ 89: GETL R15, t68
+ 90: GETL R1, t70
+ 91: ADDL $0x5C, t70
+ 92: STL t68, (t70)
+ 93: INCEIPL $4
+
+ 0xFEEC508: 92410068 stw r18,104(r1)
+ 94: GETL R18, t72
+ 95: GETL R1, t74
+ 96: ADDL $0x68, t74
+ 97: STL t72, (t74)
+ 98: INCEIPL $4
+
+ 0xFEEC50C: 93010080 stw r24,128(r1)
+ 99: GETL R24, t76
+ 100: GETL R1, t78
+ 101: ADDL $0x80, t78
+ 102: STL t76, (t78)
+ 103: INCEIPL $4
+
+ 0xFEEC510: 93210084 stw r25,132(r1)
+ 104: GETL R25, t80
+ 105: GETL R1, t82
+ 106: ADDL $0x84, t82
+ 107: STL t80, (t82)
+ 108: INCEIPL $4
+
+ 0xFEEC514: 93410088 stw r26,136(r1)
+ 109: GETL R26, t84
+ 110: GETL R1, t86
+ 111: ADDL $0x88, t86
+ 112: STL t84, (t86)
+ 113: INCEIPL $4
+
+ 0xFEEC518: 93810090 stw r28,144(r1)
+ 114: GETL R28, t88
+ 115: GETL R1, t90
+ 116: ADDL $0x90, t90
+ 117: STL t88, (t90)
+ 118: INCEIPL $4
+
+ 0xFEEC51C: 93A10094 stw r29,148(r1)
+ 119: GETL R29, t92
+ 120: GETL R1, t94
+ 121: ADDL $0x94, t94
+ 122: STL t92, (t94)
+ 123: INCEIPL $4
+
+ 0xFEEC520: 91810054 stw r12,84(r1)
+ 124: GETL R12, t96
+ 125: GETL R1, t98
+ 126: ADDL $0x54, t98
+ 127: STL t96, (t98)
+ 128: INCEIPL $4
+
+ 0xFEEC524: 82270008 lwz r17,8(r7)
+ 129: GETL R7, t100
+ 130: ADDL $0x8, t100
+ 131: LDL (t100), t102
+ 132: PUTL t102, R17
+ 133: INCEIPL $4
+
+ 0xFEEC528: 82060028 lwz r16,40(r6)
+ 134: GETL R6, t104
+ 135: ADDL $0x28, t104
+ 136: LDL (t104), t106
+ 137: PUTL t106, R16
+ 138: INCEIPL $4
+
+ 0xFEEC52C: 4BFFB575 bl 0xFEE7AA0
+ 139: MOVL $0xFEEC530, t108
+ 140: PUTL t108, LR
+ 141: JMPo-c $0xFEE7AA0 ($4)
+
+
+
+. 3189 FEEC4B0 128
+. 93 C1 00 98 7F C8 02 A6 7D 80 00 26 90 01 00 A4 92 61 00 6C 82 66 00 08 93 E1 00 9C 7C BF 2B 78 92 01 00 60 92 21 00 64 92 81 00 70 7C 94 23 78 92 A1 00 74 3A A0 00 00 92 C1 00 78 7C F6 3B 78 92 E1 00 7C 7C D7 33 78 93 61 00 8C 7C 7B 1B 78 91 C1 00 58 91 E1 00 5C 92 41 00 68 93 01 00 80 93 21 00 84 93 41 00 88 93 81 00 90 93 A1 00 94 91 81 00 54 82 27 00 08 82 06 00 28 4B FF B5 75
+==== BB 3190 tzset(0xFEE7AA0) approx BBs exec'd 0 ====
+
+ 0xFEE7AA0: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEE7AA4: 7C6802A6 mflr r3
+ 6: GETL LR, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFEE7AA8: 480C03A9 bl 0xFFA7E50
+ 9: MOVL $0xFEE7AAC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3190 FEE7AA0 12
+. 94 21 FF E0 7C 68 02 A6 48 0C 03 A9
+==== BB 3191 (0xFEE7AAC) approx BBs exec'd 0 ====
+
+ 0xFEE7AAC: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEE7AB0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEE7AB4: 93A10014 stw r29,20(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEE7AB8: 93E1001C stw r31,28(r1)
+ 13: GETL R31, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x1C, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEE7ABC: 3BA00000 li r29,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R29
+ 20: INCEIPL $4
+
+ 0xFEE7AC0: 90610024 stw r3,36(r1)
+ 21: GETL R3, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x24, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEE7AC4: 38000001 li r0,1
+ 26: MOVL $0x1, t20
+ 27: PUTL t20, R0
+ 28: INCEIPL $4
+
+ 0xFEE7AC8: 83FE08A0 lwz r31,2208(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x8A0, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R31
+ 33: INCEIPL $4
+
+ 0xFEE7ACC: 7D20F828 lwarx r9,r0,r31
+ 34: GETL R31, t26
+ 35: LOCKo
+ 36: LDL (t26), t28
+ 37: PUTL t28, R9
+ 38: INCEIPL $4
+
+ 0xFEE7AD0: 7C09E800 cmp cr0,r9,r29
+ 39: GETL R9, t30
+ 40: GETL R29, t32
+ 41: CMPL t30, t32, t34 (-rSo)
+ 42: ICRFL t34, $0x0, CR
+ 43: INCEIPL $4
+
+ 0xFEE7AD4: 4082000C bc 4,2,0xFEE7AE0
+ 44: Jc02o $0xFEE7AE0
+
+
+
+. 3191 FEE7AAC 44
+. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 93 E1 00 1C 3B A0 00 00 90 61 00 24 38 00 00 01 83 FE 08 A0 7D 20 F8 28 7C 09 E8 00 40 82 00 0C
+==== BB 3192 (0xFEE7AD8) approx BBs exec'd 0 ====
+
+ 0xFEE7AD8: 7C00F92D stwcx. r0,r0,r31
+ 0: GETL R31, t0
+ 1: GETL R0, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEE7ADC: 40A2FFF0 bc 5,2,0xFEE7ACC
+ 6: Jc02o $0xFEE7ACC
+
+
+
+. 3192 FEE7AD8 8
+. 7C 00 F9 2D 40 A2 FF F0
+==== BB 3193 (0xFEE7ACC) approx BBs exec'd 0 ====
+
+ 0xFEE7ACC: 7D20F828 lwarx r9,r0,r31
+ 0: GETL R31, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEE7AD0: 7C09E800 cmp cr0,r9,r29
+ 5: GETL R9, t4
+ 6: GETL R29, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEE7AD4: 4082000C bc 4,2,0xFEE7AE0
+ 10: Jc02o $0xFEE7AE0
+
+
+
+. 3193 FEE7ACC 12
+. 7D 20 F8 28 7C 09 E8 00 40 82 00 0C
+==== BB 3194 (0xFEE7AE0) approx BBs exec'd 0 ====
+
+ 0xFEE7AE0: 4C00012C 0: INCEIPL $4
+
+ 0xFEE7AE4: 2F890000 cmpi cr7,r9,0
+ 1: GETL R9, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFEE7AE8: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEE7AEC: 409E0078 bc 4,30,0xFEE7B64
+ 8: Jc30o $0xFEE7B64
+
+
+
+. 3194 FEE7AE0 16
+. 4C 00 01 2C 2F 89 00 00 7F E3 FB 78 40 9E 00 78
+==== BB 3195 (0xFEE7AF0) approx BBs exec'd 0 ====
+
+ 0xFEE7AF0: 38800001 li r4,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFEE7AF4: 38600001 li r3,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0xFEE7AF8: 4BFFF2E1 bl 0xFEE6DD8
+ 6: MOVL $0xFEE7AFC, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFEE6DD8 ($4)
+
+
+
+. 3195 FEE7AF0 12
+. 38 80 00 01 38 60 00 01 4B FF F2 E1
+==== BB 3196 (0xFEE6EE8) approx BBs exec'd 0 ====
+
+ 0xFEE6EE8: 835E0898 lwz r26,2200(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x898, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFEE6EEC: 313CFFFF addic r9,r28,-1
+ 5: GETL R28, t4
+ 6: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0xFEE6EF0: 7EC9E110 subfe r22,r9,r28
+ 9: GETL R9, t6
+ 10: GETL R28, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R22
+ 13: INCEIPL $4
+
+ 0xFEE6EF4: 83BA0000 lwz r29,0(r26)
+ 14: GETL R26, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0xFEE6EF8: 315DFFFF addic r10,r29,-1
+ 18: GETL R29, t14
+ 19: ADCL $0xFFFFFFFF, t14 (-wCa)
+ 20: PUTL t14, R10
+ 21: INCEIPL $4
+
+ 0xFEE6EFC: 7EEAE910 subfe r23,r10,r29
+ 22: GETL R10, t16
+ 23: GETL R29, t18
+ 24: SBBL t16, t18 (-rCa-wCa)
+ 25: PUTL t18, R23
+ 26: INCEIPL $4
+
+ 0xFEE6F00: 7EEBB039 and. r11,r23,r22
+ 27: GETL R23, t20
+ 28: GETL R22, t22
+ 29: ANDL t20, t22
+ 30: PUTL t22, R11
+ 31: CMP0L t22, t24 (-rSo)
+ 32: ICRFL t24, $0x0, CR
+ 33: INCEIPL $4
+
+ 0xFEE6F04: 41820018 bc 12,2,0xFEE6F1C
+ 34: Js02o $0xFEE6F1C
+
+
+
+. 3196 FEE6EE8 32
+. 83 5E 08 98 31 3C FF FF 7E C9 E1 10 83 BA 00 00 31 5D FF FF 7E EA E9 10 7E EB B0 39 41 82 00 18
+==== BB 3197 (0xFEE7378) approx BBs exec'd 0 ====
+
+ 0xFEE7378: 839E08AC lwz r28,2220(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8AC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFEE737C: 2E1C0000 cmpi cr4,r28,0
+ 5: GETL R28, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0xFEE7380: 4BFFFBA4 b 0xFEE6F24
+ 9: JMPo $0xFEE6F24 ($4)
+
+
+
+. 3197 FEE7378 12
+. 83 9E 08 AC 2E 1C 00 00 4B FF FB A4
+==== BB 3198 (0xFEE70B4) approx BBs exec'd 0 ====
+
+ 0xFEE70B4: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEE70B8: 480C3279 bl 0xFFAA330
+ 3: MOVL $0xFEE70BC, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFFAA330 ($4)
+
+
+
+. 3198 FEE70B4 8
+. 7F A3 EB 78 48 0C 32 79
+==== BB 3199 (0xFEE70BC) approx BBs exec'd 0 ====
+
+ 0xFEE70BC: 4BFFFE80 b 0xFEE6F3C
+ 0: JMPo $0xFEE6F3C ($4)
+
+
+
+. 3199 FEE70BC 4
+. 4B FF FE 80
+==== BB 3200 (0xFEE7FA4) approx BBs exec'd 0 ====
+
+ 0xFEE7FA4: 38600003 li r3,3
+ 0: MOVL $0x3, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEE7FA8: 7F64DB78 or r4,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFEE7FAC: 38BF0040 addi r5,r31,64
+ 6: GETL R31, t4
+ 7: ADDL $0x40, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0xFEE7FB0: 480392BD bl 0xFF2126C
+ 10: MOVL $0xFEE7FB4, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0xFF2126C ($4)
+
+
+
+. 3200 FEE7FA4 16
+. 38 60 00 03 7F 64 DB 78 38 BF 00 40 48 03 92 BD
+==== BB 3201 __xstat64@@GLIBC_2.2(0xFF2126C) approx BBs exec'd 0 ====
+
+ 0xFF2126C: 7D8802A6 mflr r12
+ 0: GETL LR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0xFF21270: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFF21274: 48086BDD bl 0xFFA7E50
+ 9: MOVL $0xFF21278, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3201 FF2126C 12
+. 7D 88 02 A6 94 21 FF F0 48 08 6B DD
+==== BB 3202 (0xFF21278) approx BBs exec'd 0 ====
+
+ 0xFF21278: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF2127C: 7C832378 or r3,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFF21280: 7FC802A6 mflr r30
+ 8: GETL LR, t6
+ 9: PUTL t6, R30
+ 10: INCEIPL $4
+
+ 0xFF21284: 7CA42B78 or r4,r5,r5
+ 11: GETL R5, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0xFF21288: 380000C3 li r0,195
+ 14: MOVL $0xC3, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xFF2128C: 7D8803A6 mtlr r12
+ 17: GETL R12, t12
+ 18: PUTL t12, LR
+ 19: INCEIPL $4
+
+ 0xFF21290: 44000002 sc
+ 20: JMPo-sys $0xFF21294 ($4)
+
+
+
+. 3202 FF21278 28
+. 93 C1 00 08 7C 83 23 78 7F C8 02 A6 7C A4 2B 78 38 00 00 C3 7D 88 03 A6 44 00 00 02
+==== BB 3203 (0xFF21294) approx BBs exec'd 0 ====
+
+ 0xFF21294: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFF21298: 74091000 andis. r9,r0,0x1000
+ 3: GETL R0, t2
+ 4: ANDL $0x10000000, t2
+ 5: PUTL t2, R9
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFF2129C: 813E1C4C lwz r9,7244(r30)
+ 9: GETL R30, t6
+ 10: ADDL $0x1C4C, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFF212A0: 7D291214 add r9,r9,r2
+ 14: GETL R9, t10
+ 15: GETL R2, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0xFF212A4: 40820010 bc 4,2,0xFF212B4
+ 19: Jc02o $0xFF212B4
+
+
+
+. 3203 FF21294 20
+. 7C 00 00 26 74 09 10 00 81 3E 1C 4C 7D 29 12 14 40 82 00 10
+==== BB 3204 (0xFF212A8) approx BBs exec'd 0 ====
+
+ 0xFF212A8: 83C10008 lwz r30,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R30
+ 4: INCEIPL $4
+
+ 0xFF212AC: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFF212B0: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+
+. 3204 FF212A8 12
+. 83 C1 00 08 38 21 00 10 4E 80 00 20
+==== BB 3205 (0xFEE7FB4) approx BBs exec'd 0 ====
+
+ 0xFEE7FB4: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFEE7FB8: 418601BC bc 12,6,0xFEE8174
+ 4: Js06o $0xFEE8174
+
+
+
+. 3205 FEE7FB4 8
+. 2C 83 00 00 41 86 01 BC
+==== BB 3206 (0xFEE8174) approx BBs exec'd 0 ====
+
+ 0xFEE8174: 817E08D8 lwz r11,2264(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8D8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFEE8178: 821F0048 lwz r16,72(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x48, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R16
+ 9: INCEIPL $4
+
+ 0xFEE817C: 81EB0000 lwz r15,0(r11)
+ 10: GETL R11, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R15
+ 13: INCEIPL $4
+
+ 0xFEE8180: 7C107800 cmp cr0,r16,r15
+ 14: GETL R16, t12
+ 15: GETL R15, t14
+ 16: CMPL t12, t14, t16 (-rSo)
+ 17: ICRFL t16, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFEE8184: 4082FE38 bc 4,2,0xFEE7FBC
+ 19: Jc02o $0xFEE7FBC
+
+
+
+. 3206 FEE8174 20
+. 81 7E 08 D8 82 1F 00 48 81 EB 00 00 7C 10 78 00 40 82 FE 38
+==== BB 3207 (0xFEE8188) approx BBs exec'd 0 ====
+
+ 0xFEE8188: 822B0004 lwz r17,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R17
+ 4: INCEIPL $4
+
+ 0xFEE818C: 825F004C lwz r18,76(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x4C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R18
+ 9: INCEIPL $4
+
+ 0xFEE8190: 7F128800 cmp cr6,r18,r17
+ 10: GETL R18, t8
+ 11: GETL R17, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x6, CR
+ 14: INCEIPL $4
+
+ 0xFEE8194: 409AFE28 bc 4,26,0xFEE7FBC
+ 15: Jc26o $0xFEE7FBC
+
+
+
+. 3207 FEE8188 16
+. 82 2B 00 04 82 5F 00 4C 7F 12 88 00 40 9A FE 28
+==== BB 3208 (0xFEE8198) approx BBs exec'd 0 ====
+
+ 0xFEE8198: 817E08D0 lwz r11,2256(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8D0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFEE819C: 82BF0040 lwz r21,64(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x40, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R21
+ 9: INCEIPL $4
+
+ 0xFEE81A0: 826B0000 lwz r19,0(r11)
+ 10: GETL R11, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R19
+ 13: INCEIPL $4
+
+ 0xFEE81A4: 7F959800 cmp cr7,r21,r19
+ 14: GETL R21, t12
+ 15: GETL R19, t14
+ 16: CMPL t12, t14, t16 (-rSo)
+ 17: ICRFL t16, $0x7, CR
+ 18: INCEIPL $4
+
+ 0xFEE81A8: 409EFE14 bc 4,30,0xFEE7FBC
+ 19: Jc30o $0xFEE7FBC
+
+
+
+. 3208 FEE8198 20
+. 81 7E 08 D0 82 BF 00 40 82 6B 00 00 7F 95 98 00 40 9E FE 14
+==== BB 3209 (0xFEE81AC) approx BBs exec'd 0 ====
+
+ 0xFEE81AC: 830B0004 lwz r24,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0xFEE81B0: 833F0044 lwz r25,68(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x44, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0xFEE81B4: 7C99C000 cmp cr1,r25,r24
+ 10: GETL R25, t8
+ 11: GETL R24, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0xFEE81B8: 4086FE04 bc 4,6,0xFEE7FBC
+ 15: Jc06o $0xFEE7FBC
+
+
+
+. 3209 FEE81AC 16
+. 83 0B 00 04 83 3F 00 44 7C 99 C0 00 40 86 FE 04
+==== BB 3210 (0xFEE81BC) approx BBs exec'd 0 ====
+
+ 0xFEE81BC: 80DE08D4 lwz r6,2260(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x8D4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFEE81C0: 801F0090 lwz r0,144(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x90, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0xFEE81C4: 83460000 lwz r26,0(r6)
+ 10: GETL R6, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R26
+ 13: INCEIPL $4
+
+ 0xFEE81C8: 7C00D000 cmp cr0,r0,r26
+ 14: GETL R0, t12
+ 15: GETL R26, t14
+ 16: CMPL t12, t14, t16 (-rSo)
+ 17: ICRFL t16, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFEE81CC: 4082FDF0 bc 4,2,0xFEE7FBC
+ 19: Jc02o $0xFEE7FBC
+
+
+
+. 3210 FEE81BC 20
+. 80 DE 08 D4 80 1F 00 90 83 46 00 00 7C 00 D0 00 40 82 FD F0
+==== BB 3211 (0xFEE81D0) approx BBs exec'd 0 ====
+
+ 0xFEE81D0: 39400001 li r10,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFEE81D4: 91540000 stw r10,0(r20)
+ 3: GETL R10, t2
+ 4: GETL R20, t4
+ 5: STL t2, (t4)
+ 6: INCEIPL $4
+
+ 0xFEE81D8: 4BFFFCDC b 0xFEE7EB4
+ 7: JMPo $0xFEE7EB4 ($4)
+
+
+
+. 3211 FEE81D0 12
+. 39 40 00 01 91 54 00 00 4B FF FC DC
+==== BB 3212 (0xFEE7AFC) approx BBs exec'd 0 ====
+
+ 0xFEE7AFC: 80BE1DC0 lwz r5,7616(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1DC0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFEE7B00: 815E089C lwz r10,2204(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x89C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0xFEE7B04: 80850000 lwz r4,0(r5)
+ 10: GETL R5, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R4
+ 13: INCEIPL $4
+
+ 0xFEE7B08: 817E1AE4 lwz r11,6884(r30)
+ 14: GETL R30, t12
+ 15: ADDL $0x1AE4, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R11
+ 18: INCEIPL $4
+
+ 0xFEE7B0C: 2C040000 cmpi cr0,r4,0
+ 19: GETL R4, t16
+ 20: CMP0L t16, t18 (-rSo)
+ 21: ICRFL t18, $0x0, CR
+ 22: INCEIPL $4
+
+ 0xFEE7B10: 40820014 bc 4,2,0xFEE7B24
+ 23: Jc02o $0xFEE7B24
+
+
+
+. 3212 FEE7AFC 24
+. 80 BE 1D C0 81 5E 08 9C 80 85 00 00 81 7E 1A E4 2C 04 00 00 40 82 00 14
+==== BB 3213 (0xFEE7B24) approx BBs exec'd 0 ====
+
+ 0xFEE7B24: 7C0004AC sync
+ 0: INCEIPL $4
+
+ 0xFEE7B28: 7D00F828 lwarx r8,r0,r31
+ 1: GETL R31, t0
+ 2: LOCKo
+ 3: LDL (t0), t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0xFEE7B2C: 7FA0F92D stwcx. r29,r0,r31
+ 6: GETL R31, t4
+ 7: GETL R29, t6
+ 8: LOCKo
+ 9: STL t6, (t4) (-rSo)
+ 10: ICRFL cr, $0x0, CR
+ 11: INCEIPL $4
+
+ 0xFEE7B30: 40A2FFF8 bc 5,2,0xFEE7B28
+ 12: Jc02o $0xFEE7B28
+
+
+
+. 3213 FEE7B24 16
+. 7C 00 04 AC 7D 00 F8 28 7F A0 F9 2D 40 A2 FF F8
+==== BB 3214 (0xFEE7B34) approx BBs exec'd 0 ====
+
+ 0xFEE7B34: 2C880001 cmpi cr1,r8,1
+ 0: GETL R8, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFEE7B38: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t6
+ 6: PUTL t6, R3
+ 7: INCEIPL $4
+
+ 0xFEE7B3C: 380000DD li r0,221
+ 8: MOVL $0xDD, t8
+ 9: PUTL t8, R0
+ 10: INCEIPL $4
+
+ 0xFEE7B40: 38800001 li r4,1
+ 11: MOVL $0x1, t10
+ 12: PUTL t10, R4
+ 13: INCEIPL $4
+
+ 0xFEE7B44: 41850028 bc 12,5,0xFEE7B6C
+ 14: Js05o $0xFEE7B6C
+
+
+
+. 3214 FEE7B34 20
+. 2C 88 00 01 7F E3 FB 78 38 00 00 DD 38 80 00 01 41 85 00 28
+==== BB 3215 (0xFEE7B48) approx BBs exec'd 0 ====
+
+ 0xFEE7B48: 81410024 lwz r10,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFEE7B4C: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0xFEE7B50: 83C10018 lwz r30,24(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R30
+ 14: INCEIPL $4
+
+ 0xFEE7B54: 7D4803A6 mtlr r10
+ 15: GETL R10, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFEE7B58: 83E1001C lwz r31,28(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x1C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R31
+ 22: INCEIPL $4
+
+ 0xFEE7B5C: 38210020 addi r1,r1,32
+ 23: GETL R1, t18
+ 24: ADDL $0x20, t18
+ 25: PUTL t18, R1
+ 26: INCEIPL $4
+
+ 0xFEE7B60: 4E800020 blr
+ 27: GETL LR, t20
+ 28: JMPo-r t20 ($4)
+
+
+
+. 3215 FEE7B48 28
+. 81 41 00 24 83 A1 00 14 83 C1 00 18 7D 48 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 3216 (0xFEEC530) approx BBs exec'd 0 ====
+
+ 0xFEEC530: 2F93000C cmpi cr7,r19,12
+ 0: GETL R19, t0
+ 1: MOVL $0xC, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFEEC534: 409D00EC bc 4,29,0xFEEC620
+ 5: Jc29o $0xFEEC620
+
+
+
+. 3216 FEEC530 8
+. 2F 93 00 0C 40 9D 00 EC
+==== BB 3217 (0xFEEC620) approx BBs exec'd 0 ====
+
+ 0xFEEC620: 2C130000 cmpi cr0,r19,0
+ 0: GETL R19, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEEC624: 40A2FF18 bc 5,2,0xFEEC53C
+ 4: Jc02o $0xFEEC53C
+
+
+
+. 3217 FEEC620 8
+. 2C 13 00 00 40 A2 FF 18
+==== BB 3218 (0xFEEC53C) approx BBs exec'd 0 ====
+
+ 0xFEEC53C: 881F0000 lbz r0,0(r31)
+ 0: GETL R31, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEEC540: 2C800000 cmpi cr1,r0,0
+ 4: GETL R0, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0xFEEC544: 41860050 bc 12,6,0xFEEC594
+ 8: Js06o $0xFEEC594
+
+
+
+. 3218 FEEC53C 12
+. 88 1F 00 00 2C 80 00 00 41 86 00 50
+==== BB 3219 (0xFEEC548) approx BBs exec'd 0 ====
+
+ 0xFEEC548: 2E000025 cmpi cr4,r0,37
+ 0: GETL R0, t0
+ 1: MOVL $0x25, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0xFEEC54C: 3B400000 li r26,0
+ 5: MOVL $0x0, t6
+ 6: PUTL t6, R26
+ 7: INCEIPL $4
+
+ 0xFEEC550: 3B80FFFF li r28,-1
+ 8: MOVL $0xFFFFFFFF, t8
+ 9: PUTL t8, R28
+ 10: INCEIPL $4
+
+ 0xFEEC554: 3BA00000 li r29,0
+ 11: MOVL $0x0, t10
+ 12: PUTL t10, R29
+ 13: INCEIPL $4
+
+ 0xFEEC558: 3A400000 li r18,0
+ 14: MOVL $0x0, t12
+ 15: PUTL t12, R18
+ 16: INCEIPL $4
+
+ 0xFEEC55C: 39400000 li r10,0
+ 17: MOVL $0x0, t14
+ 18: PUTL t14, R10
+ 19: INCEIPL $4
+
+ 0xFEEC560: 419200D4 bc 12,18,0xFEEC634
+ 20: Js18o $0xFEEC634
+
+
+
+. 3219 FEEC548 28
+. 2E 00 00 25 3B 40 00 00 3B 80 FF FF 3B A0 00 00 3A 40 00 00 39 40 00 00 41 92 00 D4
+==== BB 3220 (0xFEEC634) approx BBs exec'd 0 ====
+
+ 0xFEEC634: 8D1F0001 lbzu r8,1(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R31
+ 3: LDB (t0), t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0xFEEC638: 2F880030 cmpi cr7,r8,48
+ 6: GETL R8, t4
+ 7: MOVL $0x30, t8
+ 8: CMPL t4, t8, t6 (-rSo)
+ 9: ICRFL t6, $0x7, CR
+ 10: INCEIPL $4
+
+ 0xFEEC63C: 419E0018 bc 12,30,0xFEEC654
+ 11: Js30o $0xFEEC654
+
+
+
+. 3220 FEEC634 12
+. 8D 1F 00 01 2F 88 00 30 41 9E 00 18
+==== BB 3221 (0xFEEC640) approx BBs exec'd 0 ====
+
+ 0xFEEC640: 419D001C bc 12,29,0xFEEC65C
+ 0: Js29o $0xFEEC65C
+
+
+
+. 3221 FEEC640 4
+. 41 9D 00 1C
+==== BB 3222 (0xFEEC65C) approx BBs exec'd 0 ====
+
+ 0xFEEC65C: 2C88005E cmpi cr1,r8,94
+ 0: GETL R8, t0
+ 1: MOVL $0x5E, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFEEC660: 41860010 bc 12,6,0xFEEC670
+ 5: Js06o $0xFEEC670
+
+
+
+. 3222 FEEC65C 8
+. 2C 88 00 5E 41 86 00 10
+==== BB 3223 (0xFEEC664) approx BBs exec'd 0 ====
+
+ 0xFEEC664: 2F88005F cmpi cr7,r8,95
+ 0: GETL R8, t0
+ 1: MOVL $0x5F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFEEC668: 419EFFEC bc 12,30,0xFEEC654
+ 5: Js30o $0xFEEC654
+
+
+
+. 3223 FEEC664 8
+. 2F 88 00 5F 41 9E FF EC
+==== BB 3224 (0xFEEC66C) approx BBs exec'd 0 ====
+
+ 0xFEEC66C: 4800000C b 0xFEEC678
+ 0: JMPo $0xFEEC678 ($4)
+
+
+
+. 3224 FEEC66C 4
+. 48 00 00 0C
+==== BB 3225 (0xFEEC678) approx BBs exec'd 0 ====
+
+ 0xFEEC678: 38A8FFD0 addi r5,r8,-48
+ 0: GETL R8, t0
+ 1: ADDL $0xFFFFFFD0, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0xFEEC67C: 2A050009 cmpli cr4,r5,9
+ 4: GETL R5, t2
+ 5: MOVL $0x9, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x4, CR
+ 8: INCEIPL $4
+
+ 0xFEEC680: 41910040 bc 12,17,0xFEEC6C0
+ 9: Js17o $0xFEEC6C0
+
+
+
+. 3225 FEEC678 12
+. 38 A8 FF D0 2A 05 00 09 41 91 00 40
+==== BB 3226 (0xFEEC6C0) approx BBs exec'd 0 ====
+
+ 0xFEEC6C0: 2C080045 cmpi cr0,r8,69
+ 0: GETL R8, t0
+ 1: MOVL $0x45, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFEEC6C4: 7D004378 or r0,r8,r8
+ 5: GETL R8, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xFEEC6C8: 41820104 bc 12,2,0xFEEC7CC
+ 8: Js02o $0xFEEC7CC
+
+
+
+. 3226 FEEC6C0 12
+. 2C 08 00 45 7D 00 43 78 41 82 01 04
+==== BB 3227 (0xFEEC6CC) approx BBs exec'd 0 ====
+
+ 0xFEEC6CC: 2C88004F cmpi cr1,r8,79
+ 0: GETL R8, t0
+ 1: MOVL $0x4F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFEEC6D0: 3B200000 li r25,0
+ 5: MOVL $0x0, t6
+ 6: PUTL t6, R25
+ 7: INCEIPL $4
+
+ 0xFEEC6D4: 418600F8 bc 12,6,0xFEEC7CC
+ 8: Js06o $0xFEEC7CC
+
+
+
+. 3227 FEEC6CC 12
+. 2C 88 00 4F 3B 20 00 00 41 86 00 F8
+==== BB 3228 (0xFEEC6D8) approx BBs exec'd 0 ====
+
+ 0xFEEC6D8: 2A08007A cmpli cr4,r8,122
+ 0: GETL R8, t0
+ 1: MOVL $0x7A, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0xFEEC6DC: 41910030 bc 12,17,0xFEEC70C
+ 5: Js17o $0xFEEC70C
+
+
+
+. 3228 FEEC6D8 8
+. 2A 08 00 7A 41 91 00 30
+==== BB 3229 (0xFEEC6E0) approx BBs exec'd 0 ====
+
+ 0xFEEC6E0: 819E0938 lwz r12,2360(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x938, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFEEC6E4: 5500103A rlwinm r0,r8,2,0,29
+ 5: GETL R8, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFEEC6E8: 7F0C002E lwzx r24,r12,r0
+ 9: GETL R0, t6
+ 10: GETL R12, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R24
+ 14: INCEIPL $4
+
+ 0xFEEC6EC: 7DF86214 add r15,r24,r12
+ 15: GETL R24, t12
+ 16: GETL R12, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R15
+ 19: INCEIPL $4
+
+ 0xFEEC6F0: 7DE903A6 mtctr r15
+ 20: GETL R15, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0xFEEC6F4: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+
+. 3229 FEEC6E0 24
+. 81 9E 09 38 55 00 10 3A 7F 0C 00 2E 7D F8 62 14 7D E9 03 A6 4E 80 04 20
+==== BB 3230 (0xFEED214) approx BBs exec'd 0 ====
+
+ 0xFEED214: 2E190000 cmpi cr4,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFEED218: 40B2F4F4 bc 5,18,0xFEEC70C
+ 4: Jc18o $0xFEEC70C
+
+
+
+. 3230 FEED214 8
+. 2E 19 00 00 40 B2 F4 F4
+==== BB 3231 (0xFEED21C) approx BBs exec'd 0 ====
+
+ 0xFEED21C: 2F0A0000 cmpi cr6,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFEED220: 419A0008 bc 12,26,0xFEED228
+ 4: Js26o $0xFEED228
+
+
+
+. 3231 FEED21C 8
+. 2F 0A 00 00 41 9A 00 08
+==== BB 3232 (0xFEED228) approx BBs exec'd 0 ====
+
+ 0xFEED228: 83170018 lwz r24,24(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0xFEED22C: 571913BA rlwinm r25,r24,2,14,29
+ 5: GETL R24, t4
+ 6: ROLL $0x2, t4
+ 7: ANDL $0x3FFFC, t4
+ 8: PUTL t4, R25
+ 9: INCEIPL $4
+
+ 0xFEED230: 7D198A14 add r8,r25,r17
+ 10: GETL R25, t6
+ 11: GETL R17, t8
+ 12: ADDL t6, t8
+ 13: PUTL t8, R8
+ 14: INCEIPL $4
+
+ 0xFEED234: 80680024 lwz r3,36(r8)
+ 15: GETL R8, t10
+ 16: ADDL $0x24, t10
+ 17: LDL (t10), t12
+ 18: PUTL t12, R3
+ 19: INCEIPL $4
+
+ 0xFEED238: 4BFE98A1 bl 0xFED6AD8
+ 20: MOVL $0xFEED23C, t14
+ 21: PUTL t14, LR
+ 22: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 3232 FEED228 20
+. 83 17 00 18 57 19 13 BA 7D 19 8A 14 80 68 00 24 4B FE 98 A1
+==== BB 3233 (0xFEED23C) approx BBs exec'd 0 ====
+
+ 0xFEED23C: 7FA3E050 subf r29,r3,r28
+ 0: GETL R3, t0
+ 1: GETL R28, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFEED240: 7C791B78 or r25,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R25
+ 7: INCEIPL $4
+
+ 0xFEED244: 2F1D0000 cmpi cr6,r29,0
+ 8: GETL R29, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFEED248: 7FA0EB78 or r0,r29,r29
+ 12: GETL R29, t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0xFEED24C: 41980A08 bc 12,24,0xFEEDC54
+ 15: Js24o $0xFEEDC54
+
+
+
+. 3233 FEED23C 20
+. 7F A3 E0 50 7C 79 1B 78 2F 1D 00 00 7F A0 EB 78 41 98 0A 08
+==== BB 3234 (0xFEEDC54) approx BBs exec'd 0 ====
+
+ 0xFEEDC54: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFEEDC58: 4BFFF5F8 b 0xFEED250
+ 3: JMPo $0xFEED250 ($4)
+
+
+
+. 3234 FEEDC54 8
+. 38 00 00 00 4B FF F5 F8
+==== BB 3235 (0xFEED250) approx BBs exec'd 0 ====
+
+ 0xFEED250: 7F80CA14 add r28,r0,r25
+ 0: GETL R0, t0
+ 1: GETL R25, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFEED254: 7C75A050 subf r3,r21,r20
+ 5: GETL R21, t4
+ 6: GETL R20, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFEED258: 7F9C1840 cmpl cr7,r28,r3
+ 10: GETL R28, t8
+ 11: GETL R3, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFEED25C: 40BCF360 bc 5,28,0xFEEC5BC
+ 15: Jc28o $0xFEEC5BC
+
+
+
+. 3235 FEED250 16
+. 7F 80 CA 14 7C 75 A0 50 7F 9C 18 40 40 BC F3 60
+==== BB 3236 (0xFEED260) approx BBs exec'd 0 ====
+
+ 0xFEED260: 2C1B0000 cmpi cr0,r27,0
+ 0: GETL R27, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEED264: 41A2F930 bc 13,2,0xFEECB94
+ 4: Js02o $0xFEECB94
+
+
+
+. 3236 FEED260 8
+. 2C 1B 00 00 41 A2 F9 30
+==== BB 3237 (0xFEED268) approx BBs exec'd 0 ====
+
+ 0xFEED268: 4099002C bc 4,25,0xFEED294
+ 0: Jc25o $0xFEED294
+
+
+
+. 3237 FEED268 4
+. 40 99 00 2C
+==== BB 3238 (0xFEED294) approx BBs exec'd 0 ====
+
+ 0xFEED294: 2E120000 cmpi cr4,r18,0
+ 0: GETL R18, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFEED298: 41920948 bc 12,18,0xFEEDBE0
+ 4: Js18o $0xFEEDBE0
+
+
+
+. 3238 FEED294 8
+. 2E 12 00 00 41 92 09 48
+==== BB 3239 (0xFEEDBE0) approx BBs exec'd 0 ====
+
+ 0xFEEDBE0: 570913BA rlwinm r9,r24,2,14,29
+ 0: GETL R24, t0
+ 1: ROLL $0x2, t0
+ 2: ANDL $0x3FFFC, t0
+ 3: PUTL t0, R9
+ 4: INCEIPL $4
+
+ 0xFEEDBE4: 4BFFFEC8 b 0xFEEDAAC
+ 5: JMPo $0xFEEDAAC ($4)
+
+
+
+. 3239 FEEDBE0 8
+. 57 09 13 BA 4B FF FE C8
+==== BB 3240 (0xFEEDAAC) approx BBs exec'd 0 ====
+
+ 0xFEEDAAC: 7D498A14 add r10,r9,r17
+ 0: GETL R9, t0
+ 1: GETL R17, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFEEDAB0: 808A0024 lwz r4,36(r10)
+ 5: GETL R10, t4
+ 6: ADDL $0x24, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFEEDAB4: 4BFFFFBC b 0xFEEDA70
+ 10: JMPo $0xFEEDA70 ($4)
+
+
+
+. 3240 FEEDAAC 12
+. 7D 49 8A 14 80 8A 00 24 4B FF FF BC
+==== BB 3241 (0xFEEDA70) approx BBs exec'd 0 ====
+
+ 0xFEEDA70: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEEDA74: 7F25CB78 or r5,r25,r25
+ 3: GETL R25, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFEEDA78: 4BFEAC61 bl 0xFED86D8
+ 6: MOVL $0xFEEDA7C, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED86D8 ($4)
+
+
+
+. 3241 FEEDA70 12
+. 7F 63 DB 78 7F 25 CB 78 4B FE AC 61
+==== BB 3242 (0xFEEDA7C) approx BBs exec'd 0 ====
+
+ 0xFEEDA7C: 7F7BCA14 add r27,r27,r25
+ 0: GETL R27, t0
+ 1: GETL R25, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xFEEDA80: 4BFFF784 b 0xFEED204
+ 5: JMPo $0xFEED204 ($4)
+
+
+
+. 3242 FEEDA7C 8
+. 7F 7B CA 14 4B FF F7 84
+==== BB 3243 (0xFEED204) approx BBs exec'd 0 ====
+
+ 0xFEED204: 7EB5E214 add r21,r21,r28
+ 0: GETL R21, t0
+ 1: GETL R28, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0xFEED208: 4BFFF990 b 0xFEECB98
+ 5: JMPo $0xFEECB98 ($4)
+
+
+
+. 3243 FEED204 8
+. 7E B5 E2 14 4B FF F9 90
+==== BB 3244 (0xFEECB98) approx BBs exec'd 0 ====
+
+ 0xFEECB98: 8C1F0001 lbzu r0,1(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R31
+ 3: LDB (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xFEECB9C: 4BFFF9F0 b 0xFEEC58C
+ 6: JMPo $0xFEEC58C ($4)
+
+
+
+. 3244 FEECB98 8
+. 8C 1F 00 01 4B FF F9 F0
+==== BB 3245 (0xFEEC58C) approx BBs exec'd 0 ====
+
+ 0xFEEC58C: 2C800000 cmpi cr1,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFEEC590: 4086FFB8 bc 4,6,0xFEEC548
+ 4: Jc06o $0xFEEC548
+
+
+
+. 3245 FEEC58C 8
+. 2C 80 00 00 40 86 FF B8
+==== BB 3246 (0xFEEC594) approx BBs exec'd 0 ====
+
+ 0xFEEC594: 3134FFFF addic r9,r20,-1
+ 0: GETL R20, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFEEC598: 7E09A110 subfe r16,r9,r20
+ 4: GETL R9, t2
+ 5: GETL R20, t4
+ 6: SBBL t2, t4 (-rCa-wCa)
+ 7: PUTL t4, R16
+ 8: INCEIPL $4
+
+ 0xFEEC59C: 317BFFFF addic r11,r27,-1
+ 9: GETL R27, t6
+ 10: ADCL $0xFFFFFFFF, t6 (-wCa)
+ 11: PUTL t6, R11
+ 12: INCEIPL $4
+
+ 0xFEEC5A0: 7E2BD910 subfe r17,r11,r27
+ 13: GETL R11, t8
+ 14: GETL R27, t10
+ 15: SBBL t8, t10 (-rCa-wCa)
+ 16: PUTL t10, R17
+ 17: INCEIPL $4
+
+ 0xFEEC5A4: 7E2B8039 and. r11,r17,r16
+ 18: GETL R17, t12
+ 19: GETL R16, t14
+ 20: ANDL t12, t14
+ 21: PUTL t14, R11
+ 22: CMP0L t14, t16 (-rSo)
+ 23: ICRFL t16, $0x0, CR
+ 24: INCEIPL $4
+
+ 0xFEEC5A8: 4182000C bc 12,2,0xFEEC5B4
+ 25: Js02o $0xFEEC5B4
+
+
+
+. 3246 FEEC594 24
+. 31 34 FF FF 7E 09 A1 10 31 7B FF FF 7E 2B D9 10 7E 2B 80 39 41 82 00 0C
+==== BB 3247 (0xFEEC5AC) approx BBs exec'd 0 ====
+
+ 0xFEEC5AC: 3A600000 li r19,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R19
+ 2: INCEIPL $4
+
+ 0xFEEC5B0: 9A7B0000 stb r19,0(r27)
+ 3: GETL R19, t2
+ 4: GETL R27, t4
+ 5: STB t2, (t4)
+ 6: INCEIPL $4
+
+ 0xFEEC5B4: 7EA3AB78 or r3,r21,r21
+ 7: GETL R21, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFEEC5B8: 48000008 b 0xFEEC5C0
+ 10: JMPo $0xFEEC5C0 ($4)
+
+
+
+. 3247 FEEC5AC 16
+. 3A 60 00 00 9A 7B 00 00 7E A3 AB 78 48 00 00 08
+==== BB 3248 (0xFEEC5C0) approx BBs exec'd 0 ====
+
+ 0xFEEC5C0: 828100A4 lwz r20,164(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0xA4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R20
+ 4: INCEIPL $4
+
+ 0xFEEC5C4: 81010054 lwz r8,84(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x54, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0xFEEC5C8: 7E8803A6 mtlr r20
+ 10: GETL R20, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFEEC5CC: 81C10058 lwz r14,88(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x58, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R14
+ 17: INCEIPL $4
+
+ 0xFEEC5D0: 81E1005C lwz r15,92(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x5C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R15
+ 22: INCEIPL $4
+
+ 0xFEEC5D4: 7D008120 mtcrf 0x8,r8
+ 23: GETL R8, t18
+ 24: ICRFL t18, $0x4, CR
+ 25: INCEIPL $4
+
+ 0xFEEC5D8: 82010060 lwz r16,96(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x60, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R16
+ 30: INCEIPL $4
+
+ 0xFEEC5DC: 82210064 lwz r17,100(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x64, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R17
+ 35: INCEIPL $4
+
+ 0xFEEC5E0: 82410068 lwz r18,104(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x68, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R18
+ 40: INCEIPL $4
+
+ 0xFEEC5E4: 8261006C lwz r19,108(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x6C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R19
+ 45: INCEIPL $4
+
+ 0xFEEC5E8: 82810070 lwz r20,112(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x70, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R20
+ 50: INCEIPL $4
+
+ 0xFEEC5EC: 82A10074 lwz r21,116(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x74, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R21
+ 55: INCEIPL $4
+
+ 0xFEEC5F0: 82C10078 lwz r22,120(r1)
+ 56: GETL R1, t44
+ 57: ADDL $0x78, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R22
+ 60: INCEIPL $4
+
+ 0xFEEC5F4: 82E1007C lwz r23,124(r1)
+ 61: GETL R1, t48
+ 62: ADDL $0x7C, t48
+ 63: LDL (t48), t50
+ 64: PUTL t50, R23
+ 65: INCEIPL $4
+
+ 0xFEEC5F8: 83010080 lwz r24,128(r1)
+ 66: GETL R1, t52
+ 67: ADDL $0x80, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R24
+ 70: INCEIPL $4
+
+ 0xFEEC5FC: 83210084 lwz r25,132(r1)
+ 71: GETL R1, t56
+ 72: ADDL $0x84, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R25
+ 75: INCEIPL $4
+
+ 0xFEEC600: 83410088 lwz r26,136(r1)
+ 76: GETL R1, t60
+ 77: ADDL $0x88, t60
+ 78: LDL (t60), t62
+ 79: PUTL t62, R26
+ 80: INCEIPL $4
+
+ 0xFEEC604: 8361008C lwz r27,140(r1)
+ 81: GETL R1, t64
+ 82: ADDL $0x8C, t64
+ 83: LDL (t64), t66
+ 84: PUTL t66, R27
+ 85: INCEIPL $4
+
+ 0xFEEC608: 83810090 lwz r28,144(r1)
+ 86: GETL R1, t68
+ 87: ADDL $0x90, t68
+ 88: LDL (t68), t70
+ 89: PUTL t70, R28
+ 90: INCEIPL $4
+
+ 0xFEEC60C: 83A10094 lwz r29,148(r1)
+ 91: GETL R1, t72
+ 92: ADDL $0x94, t72
+ 93: LDL (t72), t74
+ 94: PUTL t74, R29
+ 95: INCEIPL $4
+
+ 0xFEEC610: 83C10098 lwz r30,152(r1)
+ 96: GETL R1, t76
+ 97: ADDL $0x98, t76
+ 98: LDL (t76), t78
+ 99: PUTL t78, R30
+ 100: INCEIPL $4
+
+ 0xFEEC614: 83E1009C lwz r31,156(r1)
+ 101: GETL R1, t80
+ 102: ADDL $0x9C, t80
+ 103: LDL (t80), t82
+ 104: PUTL t82, R31
+ 105: INCEIPL $4
+
+ 0xFEEC618: 382100A0 addi r1,r1,160
+ 106: GETL R1, t84
+ 107: ADDL $0xA0, t84
+ 108: PUTL t84, R1
+ 109: INCEIPL $4
+
+ 0xFEEC61C: 4E800020 blr
+ 110: GETL LR, t86
+ 111: JMPo-r t86 ($4)
+
+
+
+. 3248 FEEC5C0 96
+. 82 81 00 A4 81 01 00 54 7E 88 03 A6 81 C1 00 58 81 E1 00 5C 7D 00 81 20 82 01 00 60 82 21 00 64 82 41 00 68 82 61 00 6C 82 81 00 70 82 A1 00 74 82 C1 00 78 82 E1 00 7C 83 01 00 80 83 21 00 84 83 41 00 88 83 61 00 8C 83 81 00 90 83 A1 00 94 83 C1 00 98 83 E1 00 9C 38 21 00 A0 4E 80 00 20
+==== BB 3249 (0x10003BC0) approx BBs exec'd 0 ====
+
+ 0x10003BC0: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x10003BC4: 40820010 bc 4,2,0x10003BD4
+ 5: Jc02o $0x10003BD4
+
+
+
+. 3249 10003BC0 8
+. 7C 7F 1B 79 40 82 00 10
+==== BB 3250 (0x10003BD4) approx BBs exec'd 0 ====
+
+ 0x10003BD4: 7FBFE050 subf r29,r31,r28
+ 0: GETL R31, t0
+ 1: GETL R28, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x10003BD8: 2F1D0000 cmpi cr6,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x10003BDC: 7FA0EB78 or r0,r29,r29
+ 9: GETL R29, t8
+ 10: PUTL t8, R0
+ 11: INCEIPL $4
+
+ 0x10003BE0: 41980C78 bc 12,24,0x10004858
+ 12: Js24o $0x10004858
+
+
+
+. 3250 10003BD4 16
+. 7F BF E0 50 2F 1D 00 00 7F A0 EB 78 41 98 0C 78
+==== BB 3251 (0x10004858) approx BBs exec'd 0 ====
+
+ 0x10004858: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x1000485C: 4BFFF388 b 0x10003BE4
+ 3: JMPo $0x10003BE4 ($4)
+
+
+
+. 3251 10004858 8
+. 38 00 00 00 4B FF F3 88
+==== BB 3252 (0x10003BE4) approx BBs exec'd 0 ====
+
+ 0x10003BE4: 7F80FA14 add r28,r0,r31
+ 0: GETL R0, t0
+ 1: GETL R31, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x10003BE8: 7C15B850 subf r0,r21,r23
+ 5: GETL R21, t4
+ 6: GETL R23, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x10003BEC: 7F9C0040 cmpl cr7,r28,r0
+ 10: GETL R28, t8
+ 11: GETL R0, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0x10003BF0: 40BCFE08 bc 5,28,0x100039F8
+ 15: Jc28o $0x100039F8
+
+
+
+. 3252 10003BE4 16
+. 7F 80 FA 14 7C 15 B8 50 7F 9C 00 40 40 BC FE 08
+==== BB 3253 (0x10003BF4) approx BBs exec'd 0 ====
+
+ 0x10003BF4: 2C190000 cmpi cr0,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x10003BF8: 41820058 bc 12,2,0x10003C50
+ 4: Js02o $0x10003C50
+
+
+
+. 3253 10003BF4 8
+. 2C 19 00 00 41 82 00 58
+==== BB 3254 (0x10003BFC) approx BBs exec'd 0 ====
+
+ 0x10003BFC: 40990028 bc 4,25,0x10003C24
+ 0: Jc25o $0x10003C24
+
+
+
+. 3254 10003BFC 4
+. 40 99 00 28
+==== BB 3255 (0x10003C24) approx BBs exec'd 0 ====
+
+ 0x10003C24: 8001045C lwz r0,1116(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x45C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10003C28: 2F800000 cmpi cr7,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x10003C2C: 409E0C14 bc 4,30,0x10004840
+ 9: Jc30o $0x10004840
+
+
+
+. 3255 10003C24 12
+. 80 01 04 5C 2F 80 00 00 40 9E 0C 14
+==== BB 3256 (0x10003C30) approx BBs exec'd 0 ====
+
+ 0x10003C30: 2F940000 cmpi cr7,r20,0
+ 0: GETL R20, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10003C34: 7E048378 or r4,r16,r16
+ 4: GETL R16, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0x10003C38: 409E00D4 bc 4,30,0x10003D0C
+ 7: Jc30o $0x10003D0C
+
+
+
+. 3256 10003C30 12
+. 2F 94 00 00 7E 04 83 78 40 9E 00 D4
+==== BB 3257 (0x10003C3C) approx BBs exec'd 0 ====
+
+ 0x10003C3C: 7E048378 or r4,r16,r16
+ 0: GETL R16, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x10003C40: 7F23CB78 or r3,r25,r25
+ 3: GETL R25, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0x10003C44: 7FE5FB78 or r5,r31,r31
+ 6: GETL R31, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x10003C48: 48017015 bl 0x1001AC5C
+ 9: MOVL $0x10003C4C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x1001AC5C ($4)
+
+
+
+. 3257 10003C3C 16
+. 7E 04 83 78 7F 23 CB 78 7F E5 FB 78 48 01 70 15
+==== BB 3258 (0x1001AC5C) approx BBs exec'd 0 ====
+
+ 0x1001AC5C: 39600094 li r11,148
+ 0: MOVL $0x94, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AC60: 4BFFFEAC b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 3258 1001AC5C 8
+. 39 60 00 94 4B FF FE AC
+==== BB 3259 (0x10003C4C) approx BBs exec'd 0 ====
+
+ 0x10003C4C: 7F39FA14 add r25,r25,r31
+ 0: GETL R25, t0
+ 1: GETL R31, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x10003C50: 7EB5E214 add r21,r21,r28
+ 5: GETL R21, t4
+ 6: GETL R28, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R21
+ 9: INCEIPL $4
+
+ 0x10003C54: 8C1A0001 lbzu r0,1(r26)
+ 10: GETL R26, t8
+ 11: ADDL $0x1, t8
+ 12: PUTL t8, R26
+ 13: LDB (t8), t10
+ 14: PUTL t10, R0
+ 15: INCEIPL $4
+
+ 0x10003C58: 4BFFFC6C b 0x100038C4
+ 16: JMPo $0x100038C4 ($4)
+
+
+
+. 3259 10003C4C 16
+. 7F 39 FA 14 7E B5 E2 14 8C 1A 00 01 4B FF FC 6C
+==== BB 3260 (0x100038C4) approx BBs exec'd 0 ====
+
+ 0x100038C4: 2F800000 cmpi cr7,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x100038C8: 409EFFAC bc 4,30,0x10003874
+ 4: Jc30o $0x10003874
+
+
+
+. 3260 100038C4 8
+. 2F 80 00 00 40 9E FF AC
+==== BB 3261 (0x100039E0) approx BBs exec'd 0 ====
+
+ 0x100039E0: 2F890020 cmpi cr7,r9,32
+ 0: GETL R9, t0
+ 1: MOVL $0x20, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x100039E4: 40BCFEB8 bc 5,28,0x1000389C
+ 5: Jc28o $0x1000389C
+
+
+
+. 3261 100039E0 8
+. 2F 89 00 20 40 BC FE B8
+==== BB 3262 (0x1000389C) approx BBs exec'd 0 ====
+
+ 0x1000389C: 7C15B850 subf r0,r21,r23
+ 0: GETL R21, t0
+ 1: GETL R23, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x100038A0: 2B800001 cmpli cr7,r0,1
+ 5: GETL R0, t4
+ 6: MOVL $0x1, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x100038A4: 409D0154 bc 4,29,0x100039F8
+ 10: Jc29o $0x100039F8
+
+
+
+. 3262 1000389C 12
+. 7C 15 B8 50 2B 80 00 01 40 9D 01 54
+==== BB 3263 (0x100038A8) approx BBs exec'd 0 ====
+
+ 0x100038A8: 2C190000 cmpi cr0,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x100038AC: 41820010 bc 12,2,0x100038BC
+ 4: Js02o $0x100038BC
+
+
+
+. 3263 100038A8 8
+. 2C 19 00 00 41 82 00 10
+==== BB 3264 (0x100038B0) approx BBs exec'd 0 ====
+
+ 0x100038B0: 881A0000 lbz r0,0(r26)
+ 0: GETL R26, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x100038B4: 98190000 stb r0,0(r25)
+ 4: GETL R0, t4
+ 5: GETL R25, t6
+ 6: STB t4, (t6)
+ 7: INCEIPL $4
+
+ 0x100038B8: 3B390001 addi r25,r25,1
+ 8: GETL R25, t8
+ 9: ADDL $0x1, t8
+ 10: PUTL t8, R25
+ 11: INCEIPL $4
+
+ 0x100038BC: 3AB50001 addi r21,r21,1
+ 12: GETL R21, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R21
+ 15: INCEIPL $4
+
+ 0x100038C0: 8C1A0001 lbzu r0,1(r26)
+ 16: GETL R26, t12
+ 17: ADDL $0x1, t12
+ 18: PUTL t12, R26
+ 19: LDB (t12), t14
+ 20: PUTL t14, R0
+ 21: INCEIPL $4
+
+ 0x100038C4: 2F800000 cmpi cr7,r0,0
+ 22: GETL R0, t16
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x7, CR
+ 25: INCEIPL $4
+
+ 0x100038C8: 409EFFAC bc 4,30,0x10003874
+ 26: Jc30o $0x10003874
+
+
+
+. 3264 100038B0 28
+. 88 1A 00 00 98 19 00 00 3B 39 00 01 3A B5 00 01 8C 1A 00 01 2F 80 00 00 40 9E FF AC
+==== BB 3265 (0x10004460) approx BBs exec'd 0 ====
+
+ 0x10004460: 2F8A0000 cmpi cr7,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10004464: 419E0010 bc 12,30,0x10004474
+ 4: Js30o $0x10004474
+
+
+
+. 3265 10004460 8
+. 2F 8A 00 00 41 9E 00 10
+==== BB 3266 (0x10004474) approx BBs exec'd 0 ====
+
+ 0x10004474: 2F100000 cmpi cr6,r16,0
+ 0: GETL R16, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x10004478: 41BAF70C bc 13,26,0x10003B84
+ 4: Js26o $0x10003B84
+
+
+
+. 3266 10004474 8
+. 2F 10 00 00 41 BA F7 0C
+==== BB 3267 (0x1001ABD4) approx BBs exec'd 0 ====
+
+ 0x1001ABD4: 4BED1870 b 0xFEEC444
+ 0: JMPo $0xFEEC444 ($4)
+
+
+
+. 3267 1001ABD4 4
+. 4B ED 18 70
+==== BB 3268 (0xFEED138) approx BBs exec'd 0 ====
+
+ 0xFEED138: 2C8A0000 cmpi cr1,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFEED13C: 41860008 bc 12,6,0xFEED144
+ 4: Js06o $0xFEED144
+
+
+
+. 3268 FEED138 8
+. 2C 8A 00 00 41 86 00 08
+==== BB 3269 (0xFEED144) approx BBs exec'd 0 ====
+
+ 0xFEED144: 2E190000 cmpi cr4,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0xFEED148: 40B2F5C4 bc 5,18,0xFEEC70C
+ 4: Jc18o $0xFEEC70C
+
+
+
+. 3269 FEED144 8
+. 2E 19 00 00 40 B2 F5 C4
+==== BB 3270 (0xFEED14C) approx BBs exec'd 0 ====
+
+ 0xFEED14C: 83170010 lwz r24,16(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0xFEED150: 3B38000E addi r25,r24,14
+ 5: GETL R24, t4
+ 6: ADDL $0xE, t4
+ 7: PUTL t4, R25
+ 8: INCEIPL $4
+
+ 0xFEED154: 572813BA rlwinm r8,r25,2,14,29
+ 9: GETL R25, t6
+ 10: ROLL $0x2, t6
+ 11: ANDL $0x3FFFC, t6
+ 12: PUTL t6, R8
+ 13: INCEIPL $4
+
+ 0xFEED158: 7D488A14 add r10,r8,r17
+ 14: GETL R8, t8
+ 15: GETL R17, t10
+ 16: ADDL t8, t10
+ 17: PUTL t10, R10
+ 18: INCEIPL $4
+
+ 0xFEED15C: 806A0024 lwz r3,36(r10)
+ 19: GETL R10, t12
+ 20: ADDL $0x24, t12
+ 21: LDL (t12), t14
+ 22: PUTL t14, R3
+ 23: INCEIPL $4
+
+ 0xFEED160: 4BFE9979 bl 0xFED6AD8
+ 24: MOVL $0xFEED164, t16
+ 25: PUTL t16, LR
+ 26: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 3270 FEED14C 24
+. 83 17 00 10 3B 38 00 0E 57 28 13 BA 7D 48 8A 14 80 6A 00 24 4B FE 99 79
+==== BB 3271 (0xFEED164) approx BBs exec'd 0 ====
+
+ 0xFEED164: 7FA3E050 subf r29,r3,r28
+ 0: GETL R3, t0
+ 1: GETL R28, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFEED168: 7C791B78 or r25,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R25
+ 7: INCEIPL $4
+
+ 0xFEED16C: 2F1D0000 cmpi cr6,r29,0
+ 8: GETL R29, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFEED170: 7FA0EB78 or r0,r29,r29
+ 12: GETL R29, t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0xFEED174: 41980A64 bc 12,24,0xFEEDBD8
+ 15: Js24o $0xFEEDBD8
+
+
+
+. 3271 FEED164 20
+. 7F A3 E0 50 7C 79 1B 78 2F 1D 00 00 7F A0 EB 78 41 98 0A 64
+==== BB 3272 (0xFEEDBD8) approx BBs exec'd 0 ====
+
+ 0xFEEDBD8: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFEEDBDC: 4BFFF59C b 0xFEED178
+ 3: JMPo $0xFEED178 ($4)
+
+
+
+. 3272 FEEDBD8 8
+. 38 00 00 00 4B FF F5 9C
+==== BB 3273 (0xFEED178) approx BBs exec'd 0 ====
+
+ 0xFEED178: 7F80CA14 add r28,r0,r25
+ 0: GETL R0, t0
+ 1: GETL R25, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFEED17C: 7C95A050 subf r4,r21,r20
+ 5: GETL R21, t4
+ 6: GETL R20, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0xFEED180: 7F9C2040 cmpl cr7,r28,r4
+ 10: GETL R28, t8
+ 11: GETL R4, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFEED184: 40BCF438 bc 5,28,0xFEEC5BC
+ 15: Jc28o $0xFEEC5BC
+
+
+
+. 3273 FEED178 16
+. 7F 80 CA 14 7C 95 A0 50 7F 9C 20 40 40 BC F4 38
+==== BB 3274 (0xFEED188) approx BBs exec'd 0 ====
+
+ 0xFEED188: 2C1B0000 cmpi cr0,r27,0
+ 0: GETL R27, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEED18C: 41A2FA08 bc 13,2,0xFEECB94
+ 4: Js02o $0xFEECB94
+
+
+
+. 3274 FEED188 8
+. 2C 1B 00 00 41 A2 FA 08
+==== BB 3275 (0xFEED190) approx BBs exec'd 0 ====
+
+ 0xFEED190: 4099002C bc 4,25,0xFEED1BC
+ 0: Jc25o $0xFEED1BC
+
+
+
+. 3275 FEED190 4
+. 40 99 00 2C
+==== BB 3276 (0xFEED1BC) approx BBs exec'd 0 ====
+
+ 0xFEED1BC: 2C920000 cmpi cr1,r18,0
+ 0: GETL R18, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFEED1C0: 41860A6C bc 12,6,0xFEEDC2C
+ 4: Js06o $0xFEEDC2C
+
+
+
+. 3276 FEED1BC 8
+. 2C 92 00 00 41 86 0A 6C
+==== BB 3277 (0xFEEDC2C) approx BBs exec'd 0 ====
+
+ 0xFEEDC2C: 3938000E addi r9,r24,14
+ 0: GETL R24, t0
+ 1: ADDL $0xE, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFEEDC30: 4BFFFE78 b 0xFEEDAA8
+ 4: JMPo $0xFEEDAA8 ($4)
+
+
+
+. 3277 FEEDC2C 8
+. 39 38 00 0E 4B FF FE 78
+==== BB 3278 (0xFEEDAA8) approx BBs exec'd 0 ====
+
+ 0xFEEDAA8: 552913BA rlwinm r9,r9,2,14,29
+ 0: GETL R9, t0
+ 1: ROLL $0x2, t0
+ 2: ANDL $0x3FFFC, t0
+ 3: PUTL t0, R9
+ 4: INCEIPL $4
+
+ 0xFEEDAAC: 7D498A14 add r10,r9,r17
+ 5: GETL R9, t2
+ 6: GETL R17, t4
+ 7: ADDL t2, t4
+ 8: PUTL t4, R10
+ 9: INCEIPL $4
+
+ 0xFEEDAB0: 808A0024 lwz r4,36(r10)
+ 10: GETL R10, t6
+ 11: ADDL $0x24, t6
+ 12: LDL (t6), t8
+ 13: PUTL t8, R4
+ 14: INCEIPL $4
+
+ 0xFEEDAB4: 4BFFFFBC b 0xFEEDA70
+ 15: JMPo $0xFEEDA70 ($4)
+
+
+
+. 3278 FEEDAA8 16
+. 55 29 13 BA 7D 49 8A 14 80 8A 00 24 4B FF FF BC
+==== BB 3279 (0x1001AC5C) approx BBs exec'd 0 ====
+
+ 0x1001AC5C: 4BEBDA7C b 0xFED86D8
+ 0: JMPo $0xFED86D8 ($4)
+
+
+
+. 3279 1001AC5C 4
+. 4B EB DA 7C
+==== BB 3280 (0x100045A4) approx BBs exec'd 0 ====
+
+ 0x100045A4: 2F900045 cmpi cr7,r16,69
+ 0: GETL R16, t0
+ 1: MOVL $0x45, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x100045A8: 41BEF6D8 bc 13,30,0x10003C80
+ 5: Js30o $0x10003C80
+
+
+
+. 3280 100045A4 8
+. 2F 90 00 45 41 BE F6 D8
+==== BB 3281 (0x100045AC) approx BBs exec'd 0 ====
+
+ 0x100045AC: 2F9C0002 cmpi cr7,r28,2
+ 0: GETL R28, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x100045B0: 7F87E378 or r7,r28,r28
+ 5: GETL R28, t6
+ 6: PUTL t6, R7
+ 7: INCEIPL $4
+
+ 0x100045B4: 419C04BC bc 12,28,0x10004A70
+ 8: Js28o $0x10004A70
+
+
+
+. 3281 100045AC 12
+. 2F 9C 00 02 7F 87 E3 78 41 9C 04 BC
+==== BB 3282 (0x10004A70) approx BBs exec'd 0 ====
+
+ 0x10004A70: 8118000C lwz r8,12(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x10004A74: 38E00002 li r7,2
+ 5: MOVL $0x2, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x10004A78: 4BFFF978 b 0x100043F0
+ 8: JMPo $0x100043F0 ($4)
+
+
+
+. 3282 10004A70 12
+. 81 18 00 0C 38 E0 00 02 4B FF F9 78
+==== BB 3283 (0x100043F0) approx BBs exec'd 0 ====
+
+ 0x100043F0: 6B690030 xori r9,r27,0x30
+ 0: GETL R27, t0
+ 1: XORL $0x30, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x100043F4: 6B6B002D xori r11,r27,0x2D
+ 4: GETL R27, t2
+ 5: XORL $0x2D, t2
+ 6: PUTL t2, R11
+ 7: INCEIPL $4
+
+ 0x100043F8: 3009FFFF addic r0,r9,-1
+ 8: GETL R9, t4
+ 9: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 10: PUTL t4, R0
+ 11: INCEIPL $4
+
+ 0x100043FC: 7D404910 subfe r10,r0,r9
+ 12: GETL R0, t6
+ 13: GETL R9, t8
+ 14: SBBL t6, t8 (-rCa-wCa)
+ 15: PUTL t8, R10
+ 16: INCEIPL $4
+
+ 0x10004400: 312BFFFF addic r9,r11,-1
+ 17: GETL R11, t10
+ 18: ADCL $0xFFFFFFFF, t10 (-wCa)
+ 19: PUTL t10, R9
+ 20: INCEIPL $4
+
+ 0x10004404: 7C095910 subfe r0,r9,r11
+ 21: GETL R9, t12
+ 22: GETL R11, t14
+ 23: SBBL t12, t14 (-rCa-wCa)
+ 24: PUTL t14, R0
+ 25: INCEIPL $4
+
+ 0x10004408: 7D4B0039 and. r11,r10,r0
+ 26: GETL R10, t16
+ 27: GETL R0, t18
+ 28: ANDL t16, t18
+ 29: PUTL t18, R11
+ 30: CMP0L t18, t20 (-rSo)
+ 31: ICRFL t20, $0x0, CR
+ 32: INCEIPL $4
+
+ 0x1000440C: 2F10004F cmpi cr6,r16,79
+ 33: GETL R16, t22
+ 34: MOVL $0x4F, t26
+ 35: CMPL t22, t26, t24 (-rSo)
+ 36: ICRFL t24, $0x6, CR
+ 37: INCEIPL $4
+
+ 0x10004410: 41A2FB4C bc 13,2,0x10003F5C
+ 38: Js02o $0x10003F5C
+
+
+
+. 3283 100043F0 36
+. 6B 69 00 30 6B 6B 00 2D 30 09 FF FF 7D 40 49 10 31 2B FF FF 7C 09 59 10 7D 4B 00 39 2F 10 00 4F 41 A2 FB 4C
+==== BB 3284 (0x10004414) approx BBs exec'd 0 ====
+
+ 0x10004414: 3B60005F li r27,95
+ 0: MOVL $0x5F, t0
+ 1: PUTL t0, R27
+ 2: INCEIPL $4
+
+ 0x10004418: 4BFFFB44 b 0x10003F5C
+ 3: JMPo $0x10003F5C ($4)
+
+
+
+. 3284 10004414 8
+. 3B 60 00 5F 4B FF FB 44
+==== BB 3285 (0x10003F5C) approx BBs exec'd 0 ====
+
+ 0x10003F5C: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x10003F60: 5400DFFE rlwinm r0,r0,27,31,31
+ 3: GETL R0, t2
+ 4: ROLL $0x1B, t2
+ 5: ANDL $0x1, t2
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0x10003F64: 7D0940F8 nor r9,r8,r8
+ 8: GETL R8, t4
+ 9: NOTL t4
+ 10: PUTL t4, R9
+ 11: INCEIPL $4
+
+ 0x10003F68: 55290FFE rlwinm r9,r9,1,31,31
+ 12: GETL R9, t6
+ 13: SHRL $0x1F, t6
+ 14: PUTL t6, R9
+ 15: INCEIPL $4
+
+ 0x10003F6C: 7C0B4839 and. r11,r0,r9
+ 16: GETL R0, t8
+ 17: GETL R9, t10
+ 18: ANDL t8, t10
+ 19: PUTL t10, R11
+ 20: CMP0L t10, t12 (-rSo)
+ 21: ICRFL t12, $0x0, CR
+ 22: INCEIPL $4
+
+ 0x10003F70: 40A2FDB0 bc 5,2,0x10003D20
+ 23: Jc02o $0x10003D20
+
+
+
+. 3285 10003F5C 24
+. 7C 00 00 26 54 00 DF FE 7D 09 40 F8 55 29 0F FE 7C 0B 48 39 40 A2 FD B0
+==== BB 3286 (0x10003F74) approx BBs exec'd 0 ====
+
+ 0x10003F74: 55000FFE rlwinm r0,r8,1,31,31
+ 0: GETL R8, t0
+ 1: SHRL $0x1F, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x10003F78: 7D0B4378 or r11,r8,r8
+ 4: GETL R8, t2
+ 5: PUTL t2, R11
+ 6: INCEIPL $4
+
+ 0x10003F7C: 2F000000 cmpi cr6,r0,0
+ 7: GETL R0, t4
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x6, CR
+ 10: INCEIPL $4
+
+ 0x10003F80: 3BE1001C addi r31,r1,28
+ 11: GETL R1, t8
+ 12: ADDL $0x1C, t8
+ 13: PUTL t8, R31
+ 14: INCEIPL $4
+
+ 0x10003F84: 419A0008 bc 12,26,0x10003F8C
+ 15: Js26o $0x10003F8C
+
+
+
+. 3286 10003F74 20
+. 55 00 0F FE 7D 0B 43 78 2F 00 00 00 3B E1 00 1C 41 9A 00 08
+==== BB 3287 (0x10003F8C) approx BBs exec'd 0 ====
+
+ 0x10003F8C: 3D40CCCC lis r10,-13108
+ 0: MOVL $0xCCCC0000, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x10003F90: 614ACCCD ori r10,r10,0xCCCD
+ 3: MOVL $0xCCCCCCCD, t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0x10003F94: 7C0B5016 mulhwu r0,r11,r10
+ 6: GETL R11, t4
+ 7: GETL R10, t6
+ 8: UMULHL t4, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x10003F98: 5400E8FE rlwinm r0,r0,29,3,31
+ 11: GETL R0, t8
+ 12: SHRL $0x3, t8
+ 13: PUTL t8, R0
+ 14: INCEIPL $4
+
+ 0x10003F9C: 1D20000A mulli r9,r0,10
+ 15: GETL R0, t10
+ 16: MULL $0xA, t10
+ 17: PUTL t10, R9
+ 18: INCEIPL $4
+
+ 0x10003FA0: 2F800000 cmpi cr7,r0,0
+ 19: GETL R0, t12
+ 20: CMP0L t12, t14 (-rSo)
+ 21: ICRFL t14, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x10003FA4: 7D295850 subf r9,r9,r11
+ 23: GETL R9, t16
+ 24: GETL R11, t18
+ 25: SUBL t16, t18
+ 26: PUTL t18, R9
+ 27: INCEIPL $4
+
+ 0x10003FA8: 7C0B0378 or r11,r0,r0
+ 28: GETL R0, t20
+ 29: PUTL t20, R11
+ 30: INCEIPL $4
+
+ 0x10003FAC: 39290030 addi r9,r9,48
+ 31: GETL R9, t22
+ 32: ADDL $0x30, t22
+ 33: PUTL t22, R9
+ 34: INCEIPL $4
+
+ 0x10003FB0: 9D3FFFFF stbu r9,-1(r31)
+ 35: GETL R9, t24
+ 36: GETL R31, t26
+ 37: ADDL $0xFFFFFFFF, t26
+ 38: PUTL t26, R31
+ 39: STB t24, (t26)
+ 40: INCEIPL $4
+
+ 0x10003FB4: 409EFFE0 bc 4,30,0x10003F94
+ 41: Jc30o $0x10003F94
+
+
+
+. 3287 10003F8C 44
+. 3D 40 CC CC 61 4A CC CD 7C 0B 50 16 54 00 E8 FE 1D 20 00 0A 2F 80 00 00 7D 29 58 50 7C 0B 03 78 39 29 00 30 9D 3F FF FF 40 9E FF E0
+==== BB 3288 (0x10003F94) approx BBs exec'd 0 ====
+
+ 0x10003F94: 7C0B5016 mulhwu r0,r11,r10
+ 0: GETL R11, t0
+ 1: GETL R10, t2
+ 2: UMULHL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10003F98: 5400E8FE rlwinm r0,r0,29,3,31
+ 5: GETL R0, t4
+ 6: SHRL $0x3, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x10003F9C: 1D20000A mulli r9,r0,10
+ 9: GETL R0, t6
+ 10: MULL $0xA, t6
+ 11: PUTL t6, R9
+ 12: INCEIPL $4
+
+ 0x10003FA0: 2F800000 cmpi cr7,r0,0
+ 13: GETL R0, t8
+ 14: CMP0L t8, t10 (-rSo)
+ 15: ICRFL t10, $0x7, CR
+ 16: INCEIPL $4
+
+ 0x10003FA4: 7D295850 subf r9,r9,r11
+ 17: GETL R9, t12
+ 18: GETL R11, t14
+ 19: SUBL t12, t14
+ 20: PUTL t14, R9
+ 21: INCEIPL $4
+
+ 0x10003FA8: 7C0B0378 or r11,r0,r0
+ 22: GETL R0, t16
+ 23: PUTL t16, R11
+ 24: INCEIPL $4
+
+ 0x10003FAC: 39290030 addi r9,r9,48
+ 25: GETL R9, t18
+ 26: ADDL $0x30, t18
+ 27: PUTL t18, R9
+ 28: INCEIPL $4
+
+ 0x10003FB0: 9D3FFFFF stbu r9,-1(r31)
+ 29: GETL R9, t20
+ 30: GETL R31, t22
+ 31: ADDL $0xFFFFFFFF, t22
+ 32: PUTL t22, R31
+ 33: STB t20, (t22)
+ 34: INCEIPL $4
+
+ 0x10003FB4: 409EFFE0 bc 4,30,0x10003F94
+ 35: Jc30o $0x10003F94
+
+
+
+. 3288 10003F94 36
+. 7C 0B 50 16 54 00 E8 FE 1D 20 00 0A 2F 80 00 00 7D 29 58 50 7C 0B 03 78 39 29 00 30 9D 3F FF FF 40 9E FF E0
+==== BB 3289 (0x10003FB8) approx BBs exec'd 0 ====
+
+ 0x10003FB8: 4BFFFE68 b 0x10003E20
+ 0: JMPo $0x10003E20 ($4)
+
+
+
+. 3289 10003FB8 4
+. 4B FF FE 68
+==== BB 3290 (0x10003E20) approx BBs exec'd 0 ====
+
+ 0x10003E20: 419A000C bc 12,26,0x10003E2C
+ 0: Js26o $0x10003E2C
+
+
+
+. 3290 10003E20 4
+. 41 9A 00 0C
+==== BB 3291 (0x10003E2C) approx BBs exec'd 0 ====
+
+ 0x10003E2C: 2F9B002D cmpi cr7,r27,45
+ 0: GETL R27, t0
+ 1: MOVL $0x2D, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x10003E30: 419E0A08 bc 12,30,0x10004838
+ 5: Js30o $0x10004838
+
+
+
+. 3291 10003E2C 8
+. 2F 9B 00 2D 41 9E 0A 08
+==== BB 3292 (0x10003E34) approx BBs exec'd 0 ====
+
+ 0x10003E34: 3A010010 addi r16,r1,16
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: PUTL t0, R16
+ 3: INCEIPL $4
+
+ 0x10003E38: 7C10F850 subf r0,r16,r31
+ 4: GETL R16, t2
+ 5: GETL R31, t4
+ 6: SUBL t2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x10003E3C: 7C070214 add r0,r7,r0
+ 9: GETL R7, t6
+ 10: GETL R0, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x10003E40: 37A0FFF4 addic. r29,r0,-12
+ 14: GETL R0, t10
+ 15: ADCL $0xFFFFFFF4, t10 (-wCa)
+ 16: PUTL t10, R29
+ 17: CMP0L t10, t12 (-rSo)
+ 18: ICRFL t12, $0x0, CR
+ 19: INCEIPL $4
+
+ 0x10003E44: 40810044 bc 4,1,0x10003E88
+ 20: Jc01o $0x10003E88
+
+
+
+. 3292 10003E34 20
+. 3A 01 00 10 7C 10 F8 50 7C 07 02 14 37 A0 FF F4 40 81 00 44
+==== BB 3293 (0x10003E88) approx BBs exec'd 0 ====
+
+ 0x10003E88: 7D3F8050 subf r9,r31,r16
+ 0: GETL R31, t0
+ 1: GETL R16, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x10003E8C: 3A09000C addi r16,r9,12
+ 5: GETL R9, t4
+ 6: ADDL $0xC, t4
+ 7: PUTL t4, R16
+ 8: INCEIPL $4
+
+ 0x10003E90: 7FB0E050 subf r29,r16,r28
+ 9: GETL R16, t6
+ 10: GETL R28, t8
+ 11: SUBL t6, t8
+ 12: PUTL t8, R29
+ 13: INCEIPL $4
+
+ 0x10003E94: 2F1D0000 cmpi cr6,r29,0
+ 14: GETL R29, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x6, CR
+ 17: INCEIPL $4
+
+ 0x10003E98: 7FA0EB78 or r0,r29,r29
+ 18: GETL R29, t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0x10003E9C: 419809C4 bc 12,24,0x10004860
+ 21: Js24o $0x10004860
+
+
+
+. 3293 10003E88 24
+. 7D 3F 80 50 3A 09 00 0C 7F B0 E0 50 2F 1D 00 00 7F A0 EB 78 41 98 09 C4
+==== BB 3294 (0x10004860) approx BBs exec'd 0 ====
+
+ 0x10004860: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x10004864: 4BFFF63C b 0x10003EA0
+ 3: JMPo $0x10003EA0 ($4)
+
+
+
+. 3294 10004860 8
+. 38 00 00 00 4B FF F6 3C
+==== BB 3295 (0x10003EA0) approx BBs exec'd 0 ====
+
+ 0x10003EA0: 7F808214 add r28,r0,r16
+ 0: GETL R0, t0
+ 1: GETL R16, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x10003EA4: 7C15B850 subf r0,r21,r23
+ 5: GETL R21, t4
+ 6: GETL R23, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x10003EA8: 7F9C0040 cmpl cr7,r28,r0
+ 10: GETL R28, t8
+ 11: GETL R0, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0x10003EAC: 40BCFB4C bc 5,28,0x100039F8
+ 15: Jc28o $0x100039F8
+
+
+
+. 3295 10003EA0 16
+. 7F 80 82 14 7C 15 B8 50 7F 9C 00 40 40 BC FB 4C
+==== BB 3296 (0x10003EB0) approx BBs exec'd 0 ====
+
+ 0x10003EB0: 2C190000 cmpi cr0,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x10003EB4: 41A2FD9C bc 13,2,0x10003C50
+ 4: Js02o $0x10003C50
+
+
+
+. 3296 10003EB0 8
+. 2C 19 00 00 41 A2 FD 9C
+==== BB 3297 (0x10003EB8) approx BBs exec'd 0 ====
+
+ 0x10003EB8: 40990028 bc 4,25,0x10003EE0
+ 0: Jc25o $0x10003EE0
+
+
+
+. 3297 10003EB8 4
+. 40 99 00 28
+==== BB 3298 (0x10003EE0) approx BBs exec'd 0 ====
+
+ 0x10003EE0: 2F940000 cmpi cr7,r20,0
+ 0: GETL R20, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10003EE4: 419E093C bc 12,30,0x10004820
+ 4: Js30o $0x10004820
+
+
+
+. 3298 10003EE0 8
+. 2F 94 00 00 41 9E 09 3C
+==== BB 3299 (0x10004820) approx BBs exec'd 0 ====
+
+ 0x10004820: 7F23CB78 or r3,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x10004824: 7FE4FB78 or r4,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x10004828: 7E058378 or r5,r16,r16
+ 6: GETL R16, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x1000482C: 7F398214 add r25,r25,r16
+ 9: GETL R25, t6
+ 10: GETL R16, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R25
+ 13: INCEIPL $4
+
+ 0x10004830: 4801642D bl 0x1001AC5C
+ 14: MOVL $0x10004834, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x1001AC5C ($4)
+
+
+
+. 3299 10004820 20
+. 7F 23 CB 78 7F E4 FB 78 7E 05 83 78 7F 39 82 14 48 01 64 2D
+==== BB 3300 (0x10004834) approx BBs exec'd 0 ====
+
+ 0x10004834: 4BFFF6C8 b 0x10003EFC
+ 0: JMPo $0x10003EFC ($4)
+
+
+
+. 3300 10004834 4
+. 4B FF F6 C8
+==== BB 3301 (0x10003EFC) approx BBs exec'd 0 ====
+
+ 0x10003EFC: 7EB5E214 add r21,r21,r28
+ 0: GETL R21, t0
+ 1: GETL R28, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x10003F00: 4BFFFD54 b 0x10003C54
+ 5: JMPo $0x10003C54 ($4)
+
+
+
+. 3301 10003EFC 8
+. 7E B5 E2 14 4B FF FD 54
+==== BB 3302 (0x10003C54) approx BBs exec'd 0 ====
+
+ 0x10003C54: 8C1A0001 lbzu r0,1(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: LDB (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x10003C58: 4BFFFC6C b 0x100038C4
+ 6: JMPo $0x100038C4 ($4)
+
+
+
+. 3302 10003C54 8
+. 8C 1A 00 01 4B FF FC 6C
+==== BB 3303 (0x1000477C) approx BBs exec'd 0 ====
+
+ 0x1000477C: 2F900045 cmpi cr7,r16,69
+ 0: GETL R16, t0
+ 1: MOVL $0x45, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x10004780: 41BEF500 bc 13,30,0x10003C80
+ 5: Js30o $0x10003C80
+
+
+
+. 3303 1000477C 8
+. 2F 90 00 45 41 BE F5 00
+==== BB 3304 (0x10004784) approx BBs exec'd 0 ====
+
+ 0x10004784: 2F9C0002 cmpi cr7,r28,2
+ 0: GETL R28, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x10004788: 7F87E378 or r7,r28,r28
+ 5: GETL R28, t6
+ 6: PUTL t6, R7
+ 7: INCEIPL $4
+
+ 0x1000478C: 419C02D4 bc 12,28,0x10004A60
+ 8: Js28o $0x10004A60
+
+
+
+. 3304 10004784 12
+. 2F 9C 00 02 7F 87 E3 78 41 9C 02 D4
+==== BB 3305 (0x10004A60) approx BBs exec'd 0 ====
+
+ 0x10004A60: 2F10004F cmpi cr6,r16,79
+ 0: GETL R16, t0
+ 1: MOVL $0x4F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x10004A64: 81180008 lwz r8,8(r24)
+ 5: GETL R24, t6
+ 6: ADDL $0x8, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R8
+ 9: INCEIPL $4
+
+ 0x10004A68: 38E00002 li r7,2
+ 10: MOVL $0x2, t10
+ 11: PUTL t10, R7
+ 12: INCEIPL $4
+
+ 0x10004A6C: 4BFFF4F0 b 0x10003F5C
+ 13: JMPo $0x10003F5C ($4)
+
+
+
+. 3305 10004A60 16
+. 2F 10 00 4F 81 18 00 08 38 E0 00 02 4B FF F4 F0
+==== BB 3306 (0x100046B4) approx BBs exec'd 0 ====
+
+ 0x100046B4: 2F900045 cmpi cr7,r16,69
+ 0: GETL R16, t0
+ 1: MOVL $0x45, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x100046B8: 41BEF5C8 bc 13,30,0x10003C80
+ 5: Js30o $0x10003C80
+
+
+
+. 3306 100046B4 8
+. 2F 90 00 45 41 BE F5 C8
+==== BB 3307 (0x100046BC) approx BBs exec'd 0 ====
+
+ 0x100046BC: 2F9C0002 cmpi cr7,r28,2
+ 0: GETL R28, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x100046C0: 7F87E378 or r7,r28,r28
+ 5: GETL R28, t6
+ 6: PUTL t6, R7
+ 7: INCEIPL $4
+
+ 0x100046C4: 419C0224 bc 12,28,0x100048E8
+ 8: Js28o $0x100048E8
+
+
+
+. 3307 100046BC 12
+. 2F 9C 00 02 7F 87 E3 78 41 9C 02 24
+==== BB 3308 (0x100048E8) approx BBs exec'd 0 ====
+
+ 0x100048E8: 2F10004F cmpi cr6,r16,79
+ 0: GETL R16, t0
+ 1: MOVL $0x4F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x100048EC: 81180004 lwz r8,4(r24)
+ 5: GETL R24, t6
+ 6: ADDL $0x4, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R8
+ 9: INCEIPL $4
+
+ 0x100048F0: 38E00002 li r7,2
+ 10: MOVL $0x2, t10
+ 11: PUTL t10, R7
+ 12: INCEIPL $4
+
+ 0x100048F4: 4BFFF668 b 0x10003F5C
+ 13: JMPo $0x10003F5C ($4)
+
+
+
+. 3308 100048E8 16
+. 2F 10 00 4F 81 18 00 04 38 E0 00 02 4B FF F6 68
+==== BB 3309 (0x10003E48) approx BBs exec'd 0 ====
+
+ 0x10003E48: 2F9B005F cmpi cr7,r27,95
+ 0: GETL R27, t0
+ 1: MOVL $0x5F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x10003E4C: 419E0A28 bc 12,30,0x10004874
+ 5: Js30o $0x10004874
+
+
+
+. 3309 10003E48 8
+. 2F 9B 00 5F 41 9E 0A 28
+==== BB 3310 (0x10003E50) approx BBs exec'd 0 ====
+
+ 0x10003E50: 7C15B850 subf r0,r21,r23
+ 0: GETL R21, t0
+ 1: GETL R23, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10003E54: 7F870040 cmpl cr7,r7,r0
+ 5: GETL R7, t4
+ 6: GETL R0, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x10003E58: 40BCFBA0 bc 5,28,0x100039F8
+ 10: Jc28o $0x100039F8
+
+
+
+. 3310 10003E50 12
+. 7C 15 B8 50 7F 87 00 40 40 BC FB A0
+==== BB 3311 (0x10003E5C) approx BBs exec'd 0 ====
+
+ 0x10003E5C: 419A0A0C bc 12,26,0x10004868
+ 0: Js26o $0x10004868
+
+
+
+. 3311 10003E5C 4
+. 41 9A 0A 0C
+==== BB 3312 (0x10004868) approx BBs exec'd 0 ====
+
+ 0x10004868: 2C190000 cmpi cr0,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x1000486C: 4182F614 bc 12,2,0x10003E80
+ 4: Js02o $0x10003E80
+
+
+
+. 3312 10004868 8
+. 2C 19 00 00 41 82 F6 14
+==== BB 3313 (0x10004870) approx BBs exec'd 0 ====
+
+ 0x10004870: 4BFFF694 b 0x10003F04
+ 0: JMPo $0x10003F04 ($4)
+
+
+
+. 3313 10004870 4
+. 4B FF F6 94
+==== BB 3314 (0x10003F04) approx BBs exec'd 0 ====
+
+ 0x10003F04: 7F23CB78 or r3,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x10003F08: 38800030 li r4,48
+ 3: MOVL $0x30, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x10003F0C: 7FA5EB78 or r5,r29,r29
+ 6: GETL R29, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x10003F10: 7F39EA14 add r25,r25,r29
+ 9: GETL R25, t6
+ 10: GETL R29, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R25
+ 13: INCEIPL $4
+
+ 0x10003F14: 48016DB1 bl 0x1001ACC4
+ 14: MOVL $0x10003F18, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x1001ACC4 ($4)
+
+
+
+. 3314 10003F04 20
+. 7F 23 CB 78 38 80 00 30 7F A5 EB 78 7F 39 EA 14 48 01 6D B1
+==== BB 3315 (0x1001ACC4) approx BBs exec'd 0 ====
+
+ 0x1001ACC4: 396000C8 li r11,200
+ 0: MOVL $0xC8, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001ACC8: 4BFFFE44 b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 3315 1001ACC4 8
+. 39 60 00 C8 4B FF FE 44
+==== BB 3316 memset(0xFED7D24) approx BBs exec'd 0 ====
+
+ 0xFED7D24: 28850004 cmpli cr1,r5,4
+ 0: GETL R5, t0
+ 1: MOVL $0x4, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFED7D28: 70670003 andi. r7,r3,0x3
+ 5: GETL R3, t6
+ 6: ANDL $0x3, t6
+ 7: PUTL t6, R7
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x0, CR
+ 10: INCEIPL $4
+
+ 0xFED7D2C: 7C661B78 or r6,r3,r3
+ 11: GETL R3, t10
+ 12: PUTL t10, R6
+ 13: INCEIPL $4
+
+ 0xFED7D30: 40850190 bc 4,5,0xFED7EC0
+ 14: Jc05o $0xFED7EC0
+
+
+
+. 3316 FED7D24 16
+. 28 85 00 04 70 67 00 03 7C 66 1B 78 40 85 01 90
+==== BB 3317 (0xFED7EC0) approx BBs exec'd 0 ====
+
+ 0xFED7EC0: 2A850001 cmpli cr5,r5,1
+ 0: GETL R5, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x5, CR
+ 4: INCEIPL $4
+
+ 0xFED7EC4: 28850003 cmpli cr1,r5,3
+ 5: GETL R5, t6
+ 6: MOVL $0x3, t10
+ 7: CMPUL t6, t10, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFED7EC8: 4D940020 bclr 12,20
+ 10: GETL LR, t12
+ 11: Js20o-r t12
+
+
+
+. 3317 FED7EC0 12
+. 2A 85 00 01 28 85 00 03 4D 94 00 20
+==== BB 3318 (0xFED7ECC) approx BBs exec'd 0 ====
+
+ 0xFED7ECC: 98860000 stb r4,0(r6)
+ 0: GETL R4, t0
+ 1: GETL R6, t2
+ 2: STB t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFED7ED0: 4D960020 bclr 12,22
+ 4: GETL LR, t4
+ 5: Js22o-r t4
+
+
+
+. 3318 FED7ECC 8
+. 98 86 00 00 4D 96 00 20
+==== BB 3319 (0x10003F18) approx BBs exec'd 0 ====
+
+ 0x10003F18: 4BFFFF68 b 0x10003E80
+ 0: JMPo $0x10003E80 ($4)
+
+
+
+. 3319 10003F18 4
+. 4B FF FF 68
+==== BB 3320 (0x10003E80) approx BBs exec'd 0 ====
+
+ 0x10003E80: 7EB5EA14 add r21,r21,r29
+ 0: GETL R21, t0
+ 1: GETL R29, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x10003E84: 3B800000 li r28,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x10003E88: 7D3F8050 subf r9,r31,r16
+ 8: GETL R31, t6
+ 9: GETL R16, t8
+ 10: SUBL t6, t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0x10003E8C: 3A09000C addi r16,r9,12
+ 13: GETL R9, t10
+ 14: ADDL $0xC, t10
+ 15: PUTL t10, R16
+ 16: INCEIPL $4
+
+ 0x10003E90: 7FB0E050 subf r29,r16,r28
+ 17: GETL R16, t12
+ 18: GETL R28, t14
+ 19: SUBL t12, t14
+ 20: PUTL t14, R29
+ 21: INCEIPL $4
+
+ 0x10003E94: 2F1D0000 cmpi cr6,r29,0
+ 22: GETL R29, t16
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x6, CR
+ 25: INCEIPL $4
+
+ 0x10003E98: 7FA0EB78 or r0,r29,r29
+ 26: GETL R29, t20
+ 27: PUTL t20, R0
+ 28: INCEIPL $4
+
+ 0x10003E9C: 419809C4 bc 12,24,0x10004860
+ 29: Js24o $0x10004860
+
+
+
+. 3320 10003E80 32
+. 7E B5 EA 14 3B 80 00 00 7D 3F 80 50 3A 09 00 0C 7F B0 E0 50 2F 1D 00 00 7F A0 EB 78 41 98 09 C4
+==== BB 3321 (0x1000441C) approx BBs exec'd 0 ====
+
+ 0x1000441C: 2F900045 cmpi cr7,r16,69
+ 0: GETL R16, t0
+ 1: MOVL $0x45, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x10004420: 41BEF860 bc 13,30,0x10003C80
+ 5: Js30o $0x10003C80
+
+
+
+. 3321 1000441C 8
+. 2F 90 00 45 41 BE F8 60
+==== BB 3322 (0x10004424) approx BBs exec'd 0 ====
+
+ 0x10004424: 2F9C0002 cmpi cr7,r28,2
+ 0: GETL R28, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x10004428: 7F87E378 or r7,r28,r28
+ 5: GETL R28, t6
+ 6: PUTL t6, R7
+ 7: INCEIPL $4
+
+ 0x1000442C: 419C06A4 bc 12,28,0x10004AD0
+ 8: Js28o $0x10004AD0
+
+
+
+. 3322 10004424 12
+. 2F 9C 00 02 7F 87 E3 78 41 9C 06 A4
+==== BB 3323 (0x10004AD0) approx BBs exec'd 0 ====
+
+ 0x10004AD0: 2F10004F cmpi cr6,r16,79
+ 0: GETL R16, t0
+ 1: MOVL $0x4F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x10004AD4: 81180000 lwz r8,0(r24)
+ 5: GETL R24, t6
+ 6: LDL (t6), t8
+ 7: PUTL t8, R8
+ 8: INCEIPL $4
+
+ 0x10004AD8: 38E00002 li r7,2
+ 9: MOVL $0x2, t10
+ 10: PUTL t10, R7
+ 11: INCEIPL $4
+
+ 0x10004ADC: 4BFFF480 b 0x10003F5C
+ 12: JMPo $0x10003F5C ($4)
+
+
+
+. 3323 10004AD0 16
+. 2F 10 00 4F 81 18 00 00 38 E0 00 02 4B FF F4 80
+==== BB 3324 (0x1001ACC4) approx BBs exec'd 0 ====
+
+ 0x1001ACC4: 4BEBD060 b 0xFED7D24
+ 0: JMPo $0xFED7D24 ($4)
+
+
+
+. 3324 1001ACC4 4
+. 4B EB D0 60
+==== BB 3325 (0x100045C0) approx BBs exec'd 0 ====
+
+ 0x100045C0: 2F8A0000 cmpi cr7,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x100045C4: 419E0010 bc 12,30,0x100045D4
+ 4: Js30o $0x100045D4
+
+
+
+. 3325 100045C0 8
+. 2F 8A 00 00 41 9E 00 10
+==== BB 3326 (0x100045D4) approx BBs exec'd 0 ====
+
+ 0x100045D4: 2F920000 cmpi cr7,r18,0
+ 0: GETL R18, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x100045D8: 419E0480 bc 12,30,0x10004A58
+ 4: Js30o $0x10004A58
+
+
+
+. 3326 100045D4 8
+. 2F 92 00 00 41 9E 04 80
+==== BB 3327 (0x100045DC) approx BBs exec'd 0 ====
+
+ 0x100045DC: 7E439378 or r3,r18,r18
+ 0: GETL R18, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x100045E0: 4801661D bl 0x1001ABFC
+ 3: MOVL $0x100045E4, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x1001ABFC ($4)
+
+
+
+. 3327 100045DC 8
+. 7E 43 93 78 48 01 66 1D
+==== BB 3328 (0x1001ABFC) approx BBs exec'd 0 ====
+
+ 0x1001ABFC: 39600064 li r11,100
+ 0: MOVL $0x64, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AC00: 4BFFFF0C b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 3328 1001ABFC 8
+. 39 60 00 64 4B FF FF 0C
+==== BB 3329 (0x100045E4) approx BBs exec'd 0 ====
+
+ 0x100045E4: 7FE3E050 subf r31,r3,r28
+ 0: GETL R3, t0
+ 1: GETL R28, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x100045E8: 7C7D1B78 or r29,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x100045EC: 2F1F0000 cmpi cr6,r31,0
+ 8: GETL R31, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0x100045F0: 7FE0FB78 or r0,r31,r31
+ 12: GETL R31, t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0x100045F4: 41980488 bc 12,24,0x10004A7C
+ 15: Js24o $0x10004A7C
+
+
+
+. 3329 100045E4 20
+. 7F E3 E0 50 7C 7D 1B 78 2F 1F 00 00 7F E0 FB 78 41 98 04 88
+==== BB 3330 (0x10004A7C) approx BBs exec'd 0 ====
+
+ 0x10004A7C: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x10004A80: 4BFFFB78 b 0x100045F8
+ 3: JMPo $0x100045F8 ($4)
+
+
+
+. 3330 10004A7C 8
+. 38 00 00 00 4B FF FB 78
+==== BB 3331 (0x100045F8) approx BBs exec'd 0 ====
+
+ 0x100045F8: 7F80EA14 add r28,r0,r29
+ 0: GETL R0, t0
+ 1: GETL R29, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x100045FC: 7C15B850 subf r0,r21,r23
+ 5: GETL R21, t4
+ 6: GETL R23, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x10004600: 7F9C0040 cmpl cr7,r28,r0
+ 10: GETL R28, t8
+ 11: GETL R0, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0x10004604: 40BCF3F4 bc 5,28,0x100039F8
+ 15: Jc28o $0x100039F8
+
+
+
+. 3331 100045F8 16
+. 7F 80 EA 14 7C 15 B8 50 7F 9C 00 40 40 BC F3 F4
+==== BB 3332 (0x10004608) approx BBs exec'd 0 ====
+
+ 0x10004608: 2C190000 cmpi cr0,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x1000460C: 41A2F644 bc 13,2,0x10003C50
+ 4: Js02o $0x10003C50
+
+
+
+. 3332 10004608 8
+. 2C 19 00 00 41 A2 F6 44
+==== BB 3333 (0x10004610) approx BBs exec'd 0 ====
+
+ 0x10004610: 40990028 bc 4,25,0x10004638
+ 0: Jc25o $0x10004638
+
+
+
+. 3333 10004610 4
+. 40 99 00 28
+==== BB 3334 (0x10004638) approx BBs exec'd 0 ====
+
+ 0x10004638: 8001045C lwz r0,1116(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x45C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x1000463C: 2F800000 cmpi cr7,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x10004640: 409E03FC bc 4,30,0x10004A3C
+ 9: Jc30o $0x10004A3C
+
+
+
+. 3334 10004638 12
+. 80 01 04 5C 2F 80 00 00 40 9E 03 FC
+==== BB 3335 (0x10004644) approx BBs exec'd 0 ====
+
+ 0x10004644: 2F940000 cmpi cr7,r20,0
+ 0: GETL R20, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10004648: 419E0278 bc 12,30,0x100048C0
+ 4: Js30o $0x100048C0
+
+
+
+. 3335 10004644 8
+. 2F 94 00 00 41 9E 02 78
+==== BB 3336 (0x100048C0) approx BBs exec'd 0 ====
+
+ 0x100048C0: 7F23CB78 or r3,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x100048C4: 7E449378 or r4,r18,r18
+ 3: GETL R18, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x100048C8: 7FA5EB78 or r5,r29,r29
+ 6: GETL R29, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x100048CC: 7F39EA14 add r25,r25,r29
+ 9: GETL R25, t6
+ 10: GETL R29, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R25
+ 13: INCEIPL $4
+
+ 0x100048D0: 4801638D bl 0x1001AC5C
+ 14: MOVL $0x100048D4, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x1001AC5C ($4)
+
+
+
+. 3336 100048C0 20
+. 7F 23 CB 78 7E 44 93 78 7F A5 EB 78 7F 39 EA 14 48 01 63 8D
+==== BB 3337 (0x100048D4) approx BBs exec'd 0 ====
+
+ 0x100048D4: 4BFFFD8C b 0x10004660
+ 0: JMPo $0x10004660 ($4)
+
+
+
+. 3337 100048D4 4
+. 4B FF FD 8C
+==== BB 3338 (0x10004660) approx BBs exec'd 0 ====
+
+ 0x10004660: 7EB5E214 add r21,r21,r28
+ 0: GETL R21, t0
+ 1: GETL R28, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x10004664: 4BFFF5F0 b 0x10003C54
+ 5: JMPo $0x10003C54 ($4)
+
+
+
+. 3338 10004660 8
+. 7E B5 E2 14 4B FF F5 F0
+==== BB 3339 (0x10004668) approx BBs exec'd 0 ====
+
+ 0x10004668: 2F900045 cmpi cr7,r16,69
+ 0: GETL R16, t0
+ 1: MOVL $0x45, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x1000466C: 41BEF6B4 bc 13,30,0x10003D20
+ 5: Js30o $0x10003D20
+
+
+
+. 3339 10004668 8
+. 2F 90 00 45 41 BE F6 B4
+==== BB 3340 (0x10004670) approx BBs exec'd 0 ====
+
+ 0x10004670: 2F10004F cmpi cr6,r16,79
+ 0: GETL R16, t0
+ 1: MOVL $0x4F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x10004674: 41BAF60C bc 13,26,0x10003C80
+ 5: Js26o $0x10003C80
+
+
+
+. 3340 10004670 8
+. 2F 10 00 4F 41 BA F6 0C
+==== BB 3341 (0x10004678) approx BBs exec'd 0 ====
+
+ 0x10004678: 2F9C0001 cmpi cr7,r28,1
+ 0: GETL R28, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x1000467C: 7F87E378 or r7,r28,r28
+ 5: GETL R28, t6
+ 6: PUTL t6, R7
+ 7: INCEIPL $4
+
+ 0x10004680: 419C0438 bc 12,28,0x10004AB8
+ 8: Js28o $0x10004AB8
+
+
+
+. 3341 10004678 12
+. 2F 9C 00 01 7F 87 E3 78 41 9C 04 38
+==== BB 3342 (0x10004AB8) approx BBs exec'd 0 ====
+
+ 0x10004AB8: 81380014 lwz r9,20(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x10004ABC: 38E00001 li r7,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x10004AC0: 3909076C addi r8,r9,1900
+ 8: GETL R9, t6
+ 9: ADDL $0x76C, t6
+ 10: PUTL t6, R8
+ 11: INCEIPL $4
+
+ 0x10004AC4: 4BFFF498 b 0x10003F5C
+ 12: JMPo $0x10003F5C ($4)
+
+
+
+. 3342 10004AB8 16
+. 81 38 00 14 38 E0 00 01 39 09 07 6C 4B FF F4 98
+==== BB 3343 (0x100038CC) approx BBs exec'd 0 ====
+
+ 0x100038CC: 3137FFFF addic r9,r23,-1
+ 0: GETL R23, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x100038D0: 7C09B910 subfe r0,r9,r23
+ 4: GETL R9, t2
+ 5: GETL R23, t4
+ 6: SBBL t2, t4 (-rCa-wCa)
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x100038D4: 3179FFFF addic r11,r25,-1
+ 9: GETL R25, t6
+ 10: ADCL $0xFFFFFFFF, t6 (-wCa)
+ 11: PUTL t6, R11
+ 12: INCEIPL $4
+
+ 0x100038D8: 7D2BC910 subfe r9,r11,r25
+ 13: GETL R11, t8
+ 14: GETL R25, t10
+ 15: SBBL t8, t10 (-rCa-wCa)
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x100038DC: 7D2B0039 and. r11,r9,r0
+ 18: GETL R9, t12
+ 19: GETL R0, t14
+ 20: ANDL t12, t14
+ 21: PUTL t14, R11
+ 22: CMP0L t14, t16 (-rSo)
+ 23: ICRFL t16, $0x0, CR
+ 24: INCEIPL $4
+
+ 0x100038E0: 4182000C bc 12,2,0x100038EC
+ 25: Js02o $0x100038EC
+
+
+
+. 3343 100038CC 24
+. 31 37 FF FF 7C 09 B9 10 31 79 FF FF 7D 2B C9 10 7D 2B 00 39 41 82 00 0C
+==== BB 3344 (0x100038E4) approx BBs exec'd 0 ====
+
+ 0x100038E4: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x100038E8: 98190000 stb r0,0(r25)
+ 3: GETL R0, t2
+ 4: GETL R25, t4
+ 5: STB t2, (t4)
+ 6: INCEIPL $4
+
+ 0x100038EC: 7EA3AB78 or r3,r21,r21
+ 7: GETL R21, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x100038F0: 4800010C b 0x100039FC
+ 10: JMPo $0x100039FC ($4)
+
+
+
+. 3344 100038E4 16
+. 38 00 00 00 98 19 00 00 7E A3 AB 78 48 00 01 0C
+==== BB 3345 (0x100039FC) approx BBs exec'd 0 ====
+
+ 0x100039FC: 800104C4 lwz r0,1220(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x4C4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10003A00: 81C10478 lwz r14,1144(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x478, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R14
+ 9: INCEIPL $4
+
+ 0x10003A04: 81E1047C lwz r15,1148(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x47C, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R15
+ 14: INCEIPL $4
+
+ 0x10003A08: 7C0803A6 mtlr r0
+ 15: GETL R0, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x10003A0C: 82010480 lwz r16,1152(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x480, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R16
+ 22: INCEIPL $4
+
+ 0x10003A10: 82210484 lwz r17,1156(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x484, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R17
+ 27: INCEIPL $4
+
+ 0x10003A14: 82410488 lwz r18,1160(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x488, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R18
+ 32: INCEIPL $4
+
+ 0x10003A18: 8261048C lwz r19,1164(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x48C, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R19
+ 37: INCEIPL $4
+
+ 0x10003A1C: 82810490 lwz r20,1168(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x490, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R20
+ 42: INCEIPL $4
+
+ 0x10003A20: 82A10494 lwz r21,1172(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x494, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R21
+ 47: INCEIPL $4
+
+ 0x10003A24: 82C10498 lwz r22,1176(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x498, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R22
+ 52: INCEIPL $4
+
+ 0x10003A28: 82E1049C lwz r23,1180(r1)
+ 53: GETL R1, t42
+ 54: ADDL $0x49C, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R23
+ 57: INCEIPL $4
+
+ 0x10003A2C: 830104A0 lwz r24,1184(r1)
+ 58: GETL R1, t46
+ 59: ADDL $0x4A0, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R24
+ 62: INCEIPL $4
+
+ 0x10003A30: 832104A4 lwz r25,1188(r1)
+ 63: GETL R1, t50
+ 64: ADDL $0x4A4, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R25
+ 67: INCEIPL $4
+
+ 0x10003A34: 834104A8 lwz r26,1192(r1)
+ 68: GETL R1, t54
+ 69: ADDL $0x4A8, t54
+ 70: LDL (t54), t56
+ 71: PUTL t56, R26
+ 72: INCEIPL $4
+
+ 0x10003A38: 836104AC lwz r27,1196(r1)
+ 73: GETL R1, t58
+ 74: ADDL $0x4AC, t58
+ 75: LDL (t58), t60
+ 76: PUTL t60, R27
+ 77: INCEIPL $4
+
+ 0x10003A3C: 838104B0 lwz r28,1200(r1)
+ 78: GETL R1, t62
+ 79: ADDL $0x4B0, t62
+ 80: LDL (t62), t64
+ 81: PUTL t64, R28
+ 82: INCEIPL $4
+
+ 0x10003A40: 83A104B4 lwz r29,1204(r1)
+ 83: GETL R1, t66
+ 84: ADDL $0x4B4, t66
+ 85: LDL (t66), t68
+ 86: PUTL t68, R29
+ 87: INCEIPL $4
+
+ 0x10003A44: 83C104B8 lwz r30,1208(r1)
+ 88: GETL R1, t70
+ 89: ADDL $0x4B8, t70
+ 90: LDL (t70), t72
+ 91: PUTL t72, R30
+ 92: INCEIPL $4
+
+ 0x10003A48: 83E104BC lwz r31,1212(r1)
+ 93: GETL R1, t74
+ 94: ADDL $0x4BC, t74
+ 95: LDL (t74), t76
+ 96: PUTL t76, R31
+ 97: INCEIPL $4
+
+ 0x10003A4C: 382104C0 addi r1,r1,1216
+ 98: GETL R1, t78
+ 99: ADDL $0x4C0, t78
+ 100: PUTL t78, R1
+ 101: INCEIPL $4
+
+ 0x10003A50: 4E800020 blr
+ 102: GETL LR, t80
+ 103: JMPo-r t80 ($4)
+
+
+
+. 3345 100039FC 88
+. 80 01 04 C4 81 C1 04 78 81 E1 04 7C 7C 08 03 A6 82 01 04 80 82 21 04 84 82 41 04 88 82 61 04 8C 82 81 04 90 82 A1 04 94 82 C1 04 98 82 E1 04 9C 83 01 04 A0 83 21 04 A4 83 41 04 A8 83 61 04 AC 83 81 04 B0 83 A1 04 B4 83 C1 04 B8 83 E1 04 BC 38 21 04 C0 4E 80 00 20
+==== BB 3346 (0x10001410) approx BBs exec'd 0 ====
+
+ 0x10001410: 809E0074 lwz r4,116(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x10001414: 2F830000 cmpi cr7,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x10001418: 38600006 li r3,6
+ 9: MOVL $0x6, t8
+ 10: PUTL t8, R3
+ 11: INCEIPL $4
+
+ 0x1000141C: 409E0068 bc 4,30,0x10001484
+ 12: Jc30o $0x10001484
+
+
+
+. 3346 10001410 16
+. 80 9E 00 74 2F 83 00 00 38 60 00 06 40 9E 00 68
+==== BB 3347 (0x10001484) approx BBs exec'd 0 ====
+
+ 0x10001484: 801F0000 lwz r0,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x10001488: 3B800001 li r28,1
+ 4: MOVL $0x1, t4
+ 5: PUTL t4, R28
+ 6: INCEIPL $4
+
+ 0x1000148C: 2F800000 cmpi cr7,r0,0
+ 7: GETL R0, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x10001490: 419EFFA8 bc 12,30,0x10001438
+ 11: Js30o $0x10001438
+
+
+
+. 3347 10001484 16
+. 80 1F 00 00 3B 80 00 01 2F 80 00 00 41 9E FF A8
+==== BB 3348 (0x10001438) approx BBs exec'd 0 ====
+
+ 0x10001438: 2F9C0000 cmpi cr7,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x1000143C: 419EFF88 bc 12,30,0x100013C4
+ 4: Js30o $0x100013C4
+
+
+
+. 3348 10001438 8
+. 2F 9C 00 00 41 9E FF 88
+==== BB 3349 (0x10001440) approx BBs exec'd 0 ====
+
+ 0x10001440: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x10001444: 48019781 bl 0x1001ABC4
+ 3: MOVL $0x10001448, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x1001ABC4 ($4)
+
+
+
+. 3349 10001440 8
+. 7F A3 EB 78 48 01 97 81
+==== BB 3350 (0x1001ABC4) approx BBs exec'd 0 ====
+
+ 0x1001ABC4: 39600048 li r11,72
+ 0: MOVL $0x48, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001ABC8: 4BFFFF44 b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 3350 1001ABC4 8
+. 39 60 00 48 4B FF FF 44
+==== BB 3351 _IO_puts(0xFEBE3E0) approx BBs exec'd 0 ====
+
+ 0xFEBE3E0: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEBE3E4: 7C8802A6 mflr r4
+ 6: GETL LR, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFEBE3E8: 480E9A69 bl 0xFFA7E50
+ 9: MOVL $0xFEBE3EC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3351 FEBE3E0 12
+. 94 21 FF D0 7C 88 02 A6 48 0E 9A 69
+==== BB 3352 (0xFEBE3EC) approx BBs exec'd 0 ====
+
+ 0xFEBE3EC: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEBE3F0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEBE3F4: 93810020 stw r28,32(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x20, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEBE3F8: 93210014 stw r25,20(r1)
+ 13: GETL R25, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEBE3FC: 3B20FFFF li r25,-1
+ 18: MOVL $0xFFFFFFFF, t14
+ 19: PUTL t14, R25
+ 20: INCEIPL $4
+
+ 0xFEBE400: 93410018 stw r26,24(r1)
+ 21: GETL R26, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x18, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEBE404: 7C7A1B78 or r26,r3,r3
+ 26: GETL R3, t20
+ 27: PUTL t20, R26
+ 28: INCEIPL $4
+
+ 0xFEBE408: 839E1C24 lwz r28,7204(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x1C24, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R28
+ 33: INCEIPL $4
+
+ 0xFEBE40C: 9361001C stw r27,28(r1)
+ 34: GETL R27, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x1C, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFEBE410: 93E1002C stw r31,44(r1)
+ 39: GETL R31, t30
+ 40: GETL R1, t32
+ 41: ADDL $0x2C, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFEBE414: 93A10024 stw r29,36(r1)
+ 44: GETL R29, t34
+ 45: GETL R1, t36
+ 46: ADDL $0x24, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0xFEBE418: 90810034 stw r4,52(r1)
+ 49: GETL R4, t38
+ 50: GETL R1, t40
+ 51: ADDL $0x34, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0xFEBE41C: 480186BD bl 0xFED6AD8
+ 54: MOVL $0xFEBE420, t42
+ 55: PUTL t42, LR
+ 56: JMPo-c $0xFED6AD8 ($4)
+
+
+
+. 3352 FEBE3EC 52
+. 93 C1 00 28 7F C8 02 A6 93 81 00 20 93 21 00 14 3B 20 FF FF 93 41 00 18 7C 7A 1B 78 83 9E 1C 24 93 61 00 1C 93 E1 00 2C 93 A1 00 24 90 81 00 34 48 01 86 BD
+==== BB 3353 (0xFEBE420) approx BBs exec'd 0 ====
+
+ 0xFEBE420: 83FC0000 lwz r31,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R31
+ 3: INCEIPL $4
+
+ 0xFEBE424: 7C7B1B78 or r27,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R27
+ 6: INCEIPL $4
+
+ 0xFEBE428: 801F0000 lwz r0,0(r31)
+ 7: GETL R31, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R0
+ 10: INCEIPL $4
+
+ 0xFEBE42C: 70098000 andi. r9,r0,0x8000
+ 11: GETL R0, t10
+ 12: ANDL $0x8000, t10
+ 13: PUTL t10, R9
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x0, CR
+ 16: INCEIPL $4
+
+ 0xFEBE430: 40820054 bc 4,2,0xFEBE484
+ 17: Jc02o $0xFEBE484
+
+
+
+. 3353 FEBE420 20
+. 83 FC 00 00 7C 7B 1B 78 80 1F 00 00 70 09 80 00 40 82 00 54
+==== BB 3354 (0xFEBE434) approx BBs exec'd 0 ====
+
+ 0xFEBE434: 807F0048 lwz r3,72(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEBE438: 3BA28BA0 addi r29,r2,-29792
+ 5: GETL R2, t4
+ 6: ADDL $0xFFFF8BA0, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0xFEBE43C: 80A30008 lwz r5,8(r3)
+ 9: GETL R3, t6
+ 10: ADDL $0x8, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0xFEBE440: 7F85E800 cmp cr7,r5,r29
+ 14: GETL R5, t10
+ 15: GETL R29, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0xFEBE444: 419E0034 bc 12,30,0xFEBE478
+ 19: Js30o $0xFEBE478
+
+
+
+. 3354 FEBE434 20
+. 80 7F 00 48 3B A2 8B A0 80 A3 00 08 7F 85 E8 00 41 9E 00 34
+==== BB 3355 (0xFEBE448) approx BBs exec'd 0 ====
+
+ 0xFEBE448: 39600000 li r11,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFEBE44C: 38C00001 li r6,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0xFEBE450: 7D201828 lwarx r9,r0,r3
+ 6: GETL R3, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0xFEBE454: 7C095800 cmp cr0,r9,r11
+ 11: GETL R9, t8
+ 12: GETL R11, t10
+ 13: CMPL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFEBE458: 4082000C bc 4,2,0xFEBE464
+ 16: Jc02o $0xFEBE464
+
+
+
+. 3355 FEBE448 20
+. 39 60 00 00 38 C0 00 01 7D 20 18 28 7C 09 58 00 40 82 00 0C
+==== BB 3356 (0xFEBE45C) approx BBs exec'd 0 ====
+
+ 0xFEBE45C: 7CC0192D stwcx. r6,r0,r3
+ 0: GETL R3, t0
+ 1: GETL R6, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEBE460: 40A2FFF0 bc 5,2,0xFEBE450
+ 6: Jc02o $0xFEBE450
+
+
+
+. 3356 FEBE45C 8
+. 7C C0 19 2D 40 A2 FF F0
+==== BB 3357 (0xFEBE450) approx BBs exec'd 0 ====
+
+ 0xFEBE450: 7D201828 lwarx r9,r0,r3
+ 0: GETL R3, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEBE454: 7C095800 cmp cr0,r9,r11
+ 5: GETL R9, t4
+ 6: GETL R11, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEBE458: 4082000C bc 4,2,0xFEBE464
+ 10: Jc02o $0xFEBE464
+
+
+
+. 3357 FEBE450 12
+. 7D 20 18 28 7C 09 58 00 40 82 00 0C
+==== BB 3358 (0xFEBE464) approx BBs exec'd 0 ====
+
+ 0xFEBE464: 4C00012C 0: INCEIPL $4
+
+ 0xFEBE468: 2C890000 cmpi cr1,r9,0
+ 1: GETL R9, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFEBE46C: 4086019C bc 4,6,0xFEBE608
+ 5: Jc06o $0xFEBE608
+
+
+
+. 3358 FEBE464 12
+. 4C 00 01 2C 2C 89 00 00 40 86 01 9C
+==== BB 3359 (0xFEBE470) approx BBs exec'd 0 ====
+
+ 0xFEBE470: 807F0048 lwz r3,72(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEBE474: 93A30008 stw r29,8(r3)
+ 5: GETL R29, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFEBE478: 81030004 lwz r8,4(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R8
+ 14: INCEIPL $4
+
+ 0xFEBE47C: 38E80001 addi r7,r8,1
+ 15: GETL R8, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0xFEBE480: 90E30004 stw r7,4(r3)
+ 19: GETL R7, t14
+ 20: GETL R3, t16
+ 21: ADDL $0x4, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFEBE484: 807C0000 lwz r3,0(r28)
+ 24: GETL R28, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R3
+ 27: INCEIPL $4
+
+ 0xFEBE488: 89430046 lbz r10,70(r3)
+ 28: GETL R3, t22
+ 29: ADDL $0x46, t22
+ 30: LDB (t22), t24
+ 31: PUTL t24, R10
+ 32: INCEIPL $4
+
+ 0xFEBE48C: 2F0A0000 cmpi cr6,r10,0
+ 33: GETL R10, t26
+ 34: CMP0L t26, t28 (-rSo)
+ 35: ICRFL t28, $0x6, CR
+ 36: INCEIPL $4
+
+ 0xFEBE490: 409A00A4 bc 4,26,0xFEBE534
+ 37: Jc26o $0xFEBE534
+
+
+
+. 3359 FEBE470 36
+. 80 7F 00 48 93 A3 00 08 81 03 00 04 38 E8 00 01 90 E3 00 04 80 7C 00 00 89 43 00 46 2F 0A 00 00 40 9A 00 A4
+==== BB 3360 (0xFEBE494) approx BBs exec'd 0 ====
+
+ 0xFEBE494: 819E1DC8 lwz r12,7624(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1DC8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFEBE498: 2C0C0000 cmpi cr0,r12,0
+ 5: GETL R12, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFEBE49C: 41820160 bc 12,2,0xFEBE5FC
+ 9: Js02o $0xFEBE5FC
+
+
+
+. 3360 FEBE494 12
+. 81 9E 1D C8 2C 0C 00 00 41 82 01 60
+==== BB 3361 (0xFEBE4A0) approx BBs exec'd 0 ====
+
+ 0xFEBE4A0: 83A30060 lwz r29,96(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFEBE4A4: 2F9D0000 cmpi cr7,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFEBE4A8: 419E0080 bc 12,30,0xFEBE528
+ 9: Js30o $0xFEBE528
+
+
+
+. 3361 FEBE4A0 12
+. 83 A3 00 60 2F 9D 00 00 41 9E 00 80
+==== BB 3362 (0xFEBE528) approx BBs exec'd 0 ====
+
+ 0xFEBE528: 3800FFFF li r0,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFEBE52C: 90030060 stw r0,96(r3)
+ 3: GETL R0, t2
+ 4: GETL R3, t4
+ 5: ADDL $0x60, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFEBE530: 4BFFFF7C b 0xFEBE4AC
+ 8: JMPo $0xFEBE4AC ($4)
+
+
+
+. 3362 FEBE528 12
+. 38 00 FF FF 90 03 00 60 4B FF FF 7C
+==== BB 3363 (0xFEBE4AC) approx BBs exec'd 0 ====
+
+ 0xFEBE4AC: 80630060 lwz r3,96(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEBE4B0: 2C83FFFF cmpi cr1,r3,-1
+ 5: GETL R3, t4
+ 6: MOVL $0xFFFFFFFF, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFEBE4B4: 41860080 bc 12,6,0xFEBE534
+ 10: Js06o $0xFEBE534
+
+
+
+. 3363 FEBE4AC 12
+. 80 63 00 60 2C 83 FF FF 41 86 00 80
+==== BB 3364 (0xFEBE534) approx BBs exec'd 0 ====
+
+ 0xFEBE534: 80DC0000 lwz r6,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0xFEBE538: 7F44D378 or r4,r26,r26
+ 4: GETL R26, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0xFEBE53C: 88E60046 lbz r7,70(r6)
+ 7: GETL R6, t6
+ 8: ADDL $0x46, t6
+ 9: LDB (t6), t8
+ 10: PUTL t8, R7
+ 11: INCEIPL $4
+
+ 0xFEBE540: 7CC33378 or r3,r6,r6
+ 12: GETL R6, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0xFEBE544: 7CE90774 extsb r9,r7
+ 15: GETB R7, t12
+ 16: WIDENL_Bs _st12
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0xFEBE548: 7CA93214 add r5,r9,r6
+ 19: GETL R9, t14
+ 20: GETL R6, t16
+ 21: ADDL t14, t16
+ 22: PUTL t16, R5
+ 23: INCEIPL $4
+
+ 0xFEBE54C: 81650098 lwz r11,152(r5)
+ 24: GETL R5, t18
+ 25: ADDL $0x98, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R11
+ 28: INCEIPL $4
+
+ 0xFEBE550: 7F65DB78 or r5,r27,r27
+ 29: GETL R27, t22
+ 30: PUTL t22, R5
+ 31: INCEIPL $4
+
+ 0xFEBE554: 834B001C lwz r26,28(r11)
+ 32: GETL R11, t24
+ 33: ADDL $0x1C, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R26
+ 36: INCEIPL $4
+
+ 0xFEBE558: 7F4903A6 mtctr r26
+ 37: GETL R26, t28
+ 38: PUTL t28, CTR
+ 39: INCEIPL $4
+
+ 0xFEBE55C: 4E800421 bctrl
+ 40: MOVL $0xFEBE560, t30
+ 41: PUTL t30, LR
+ 42: GETL CTR, t32
+ 43: JMPo-c t32 ($4)
+
+
+
+. 3364 FEBE534 44
+. 80 DC 00 00 7F 44 D3 78 88 E6 00 46 7C C3 33 78 7C E9 07 74 7C A9 32 14 81 65 00 98 7F 65 DB 78 83 4B 00 1C 7F 49 03 A6 4E 80 04 21
+==== BB 3365 _IO_file_xsputn@@GLIBC_2.1(0xFECA658) approx BBs exec'd 0 ====
+
+ 0xFECA658: 2F850000 cmpi cr7,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFECA65C: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFECA660: 9421FFD0 stwu r1,-48(r1)
+ 7: GETL R1, t6
+ 8: GETL R1, t8
+ 9: ADDL $0xFFFFFFD0, t8
+ 10: PUTL t8, R1
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFECA664: 93010010 stw r24,16(r1)
+ 13: GETL R24, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x10, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFECA668: 3B000000 li r24,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R24
+ 20: INCEIPL $4
+
+ 0xFECA66C: 93210014 stw r25,20(r1)
+ 21: GETL R25, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFECA670: 7CB92B78 or r25,r5,r5
+ 26: GETL R5, t20
+ 27: PUTL t20, R25
+ 28: INCEIPL $4
+
+ 0xFECA674: 93410018 stw r26,24(r1)
+ 29: GETL R26, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x18, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFECA678: 7CBA2B78 or r26,r5,r5
+ 34: GETL R5, t26
+ 35: PUTL t26, R26
+ 36: INCEIPL $4
+
+ 0xFECA67C: 9361001C stw r27,28(r1)
+ 37: GETL R27, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x1C, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFECA680: 7C9B2378 or r27,r4,r4
+ 42: GETL R4, t32
+ 43: PUTL t32, R27
+ 44: INCEIPL $4
+
+ 0xFECA684: 93810020 stw r28,32(r1)
+ 45: GETL R28, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x20, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0xFECA688: 7C9C2378 or r28,r4,r4
+ 50: GETL R4, t38
+ 51: PUTL t38, R28
+ 52: INCEIPL $4
+
+ 0xFECA68C: 93A10024 stw r29,36(r1)
+ 53: GETL R29, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x24, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0xFECA690: 7C7D1B78 or r29,r3,r3
+ 58: GETL R3, t44
+ 59: PUTL t44, R29
+ 60: INCEIPL $4
+
+ 0xFECA694: 93C10028 stw r30,40(r1)
+ 61: GETL R30, t46
+ 62: GETL R1, t48
+ 63: ADDL $0x28, t48
+ 64: STL t46, (t48)
+ 65: INCEIPL $4
+
+ 0xFECA698: 38600000 li r3,0
+ 66: MOVL $0x0, t50
+ 67: PUTL t50, R3
+ 68: INCEIPL $4
+
+ 0xFECA69C: 93E1002C stw r31,44(r1)
+ 69: GETL R31, t52
+ 70: GETL R1, t54
+ 71: ADDL $0x2C, t54
+ 72: STL t52, (t54)
+ 73: INCEIPL $4
+
+ 0xFECA6A0: 90010034 stw r0,52(r1)
+ 74: GETL R0, t56
+ 75: GETL R1, t58
+ 76: ADDL $0x34, t58
+ 77: STL t56, (t58)
+ 78: INCEIPL $4
+
+ 0xFECA6A4: 419E006C bc 12,30,0xFECA710
+ 79: Js30o $0xFECA710
+
+
+
+. 3365 FECA658 80
+. 2F 85 00 00 7C 08 02 A6 94 21 FF D0 93 01 00 10 3B 00 00 00 93 21 00 14 7C B9 2B 78 93 41 00 18 7C BA 2B 78 93 61 00 1C 7C 9B 23 78 93 81 00 20 7C 9C 23 78 93 A1 00 24 7C 7D 1B 78 93 C1 00 28 38 60 00 00 93 E1 00 2C 90 01 00 34 41 9E 00 6C
+==== BB 3366 (0xFECA6A8) approx BBs exec'd 0 ====
+
+ 0xFECA6A8: 817D0000 lwz r11,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0xFECA6AC: 809D0018 lwz r4,24(r29)
+ 4: GETL R29, t4
+ 5: ADDL $0x18, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0xFECA6B0: 71690200 andi. r9,r11,0x200
+ 9: GETL R11, t8
+ 10: ANDL $0x200, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFECA6B4: 807D0014 lwz r3,20(r29)
+ 15: GETL R29, t12
+ 16: ADDL $0x14, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R3
+ 19: INCEIPL $4
+
+ 0xFECA6B8: 7FE32050 subf r31,r3,r4
+ 20: GETL R3, t16
+ 21: GETL R4, t18
+ 22: SUBL t16, t18
+ 23: PUTL t18, R31
+ 24: INCEIPL $4
+
+ 0xFECA6BC: 40820084 bc 4,2,0xFECA740
+ 25: Jc02o $0xFECA740
+
+
+
+. 3366 FECA6A8 24
+. 81 7D 00 00 80 9D 00 18 71 69 02 00 80 7D 00 14 7F E3 20 50 40 82 00 84
+==== BB 3367 (0xFECA6C0) approx BBs exec'd 0 ====
+
+ 0xFECA6C0: 2C1F0000 cmpi cr0,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFECA6C4: 4182003C bc 12,2,0xFECA700
+ 4: Js02o $0xFECA700
+
+
+
+. 3367 FECA6C0 8
+. 2C 1F 00 00 41 82 00 3C
+==== BB 3368 (0xFECA700) approx BBs exec'd 0 ====
+
+ 0xFECA700: 7C79C214 add r3,r25,r24
+ 0: GETL R25, t0
+ 1: GETL R24, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECA704: 2F830000 cmpi cr7,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFECA708: 409E0074 bc 4,30,0xFECA77C
+ 9: Jc30o $0xFECA77C
+
+
+
+. 3368 FECA700 12
+. 7C 79 C2 14 2F 83 00 00 40 9E 00 74
+==== BB 3369 (0xFECA77C) approx BBs exec'd 0 ====
+
+ 0xFECA77C: 8B1D0046 lbz r24,70(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0xFECA780: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFECA784: 3880FFFF li r4,-1
+ 8: MOVL $0xFFFFFFFF, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0xFECA788: 7F0C0774 extsb r12,r24
+ 11: GETB R24, t8
+ 12: WIDENL_Bs _st8
+ 13: PUTL t8, R12
+ 14: INCEIPL $4
+
+ 0xFECA78C: 7D4CEA14 add r10,r12,r29
+ 15: GETL R12, t10
+ 16: GETL R29, t12
+ 17: ADDL t10, t12
+ 18: PUTL t12, R10
+ 19: INCEIPL $4
+
+ 0xFECA790: 810A0098 lwz r8,152(r10)
+ 20: GETL R10, t14
+ 21: ADDL $0x98, t14
+ 22: LDL (t14), t16
+ 23: PUTL t16, R8
+ 24: INCEIPL $4
+
+ 0xFECA794: 8168000C lwz r11,12(r8)
+ 25: GETL R8, t18
+ 26: ADDL $0xC, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R11
+ 29: INCEIPL $4
+
+ 0xFECA798: 7D6903A6 mtctr r11
+ 30: GETL R11, t22
+ 31: PUTL t22, CTR
+ 32: INCEIPL $4
+
+ 0xFECA79C: 4E800421 bctrl
+ 33: MOVL $0xFECA7A0, t24
+ 34: PUTL t24, LR
+ 35: GETL CTR, t26
+ 36: JMPo-c t26 ($4)
+
+
+
+. 3369 FECA77C 36
+. 8B 1D 00 46 7F A3 EB 78 38 80 FF FF 7F 0C 07 74 7D 4C EA 14 81 0A 00 98 81 68 00 0C 7D 69 03 A6 4E 80 04 21
+==== BB 3370 _IO_file_overflow@@GLIBC_2.1(0xFEC984C) approx BBs exec'd 0 ====
+
+ 0xFEC984C: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFEC9850: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEC9854: 480DE5FD bl 0xFFA7E50
+ 9: MOVL $0xFEC9858, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3370 FEC984C 12
+. 7C 08 02 A6 94 21 FF E0 48 0D E5 FD
+==== BB 3371 (0xFEC9858) approx BBs exec'd 0 ====
+
+ 0xFEC9858: 93A10014 stw r29,20(r1)
+ 0: GETL R29, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEC985C: 93C10018 stw r30,24(r1)
+ 5: GETL R30, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x18, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFEC9860: 7C9D2378 or r29,r4,r4
+ 10: GETL R4, t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0xFEC9864: 90010024 stw r0,36(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEC9868: 7FC802A6 mflr r30
+ 18: GETL LR, t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0xFEC986C: 81630000 lwz r11,0(r3)
+ 21: GETL R3, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R11
+ 24: INCEIPL $4
+
+ 0xFEC9870: 93E1001C stw r31,28(r1)
+ 25: GETL R31, t20
+ 26: GETL R1, t22
+ 27: ADDL $0x1C, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0xFEC9874: 7C7F1B78 or r31,r3,r3
+ 30: GETL R3, t24
+ 31: PUTL t24, R31
+ 32: INCEIPL $4
+
+ 0xFEC9878: 71600008 andi. r0,r11,0x8
+ 33: GETL R11, t26
+ 34: ANDL $0x8, t26
+ 35: PUTL t26, R0
+ 36: CMP0L t26, t28 (-rSo)
+ 37: ICRFL t28, $0x0, CR
+ 38: INCEIPL $4
+
+ 0xFEC987C: 93810010 stw r28,16(r1)
+ 39: GETL R28, t30
+ 40: GETL R1, t32
+ 41: ADDL $0x10, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0xFEC9880: 40820210 bc 4,2,0xFEC9A90
+ 44: Jc02o $0xFEC9A90
+
+
+
+. 3371 FEC9858 44
+. 93 A1 00 14 93 C1 00 18 7C 9D 23 78 90 01 00 24 7F C8 02 A6 81 63 00 00 93 E1 00 1C 7C 7F 1B 78 71 60 00 08 93 81 00 10 40 82 02 10
+==== BB 3372 (0xFEC9884) approx BBs exec'd 0 ====
+
+ 0xFEC9884: 71690800 andi. r9,r11,0x800
+ 0: GETL R11, t0
+ 1: ANDL $0x800, t0
+ 2: PUTL t0, R9
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEC9888: 408200F4 bc 4,2,0xFEC997C
+ 6: Jc02o $0xFEC997C
+
+
+
+. 3372 FEC9884 8
+. 71 69 08 00 40 82 00 F4
+==== BB 3373 (0xFEC988C) approx BBs exec'd 0 ====
+
+ 0xFEC988C: 80A30010 lwz r5,16(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFEC9890: 2C850000 cmpi cr1,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFEC9894: 4086012C bc 4,6,0xFEC99C0
+ 9: Jc06o $0xFEC99C0
+
+
+
+. 3373 FEC988C 12
+. 80 A3 00 10 2C 85 00 00 40 86 01 2C
+==== BB 3374 (0xFEC9898) approx BBs exec'd 0 ====
+
+ 0xFEC9898: 480023B1 bl 0xFECBC48
+ 0: MOVL $0xFEC989C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFECBC48 ($4)
+
+
+
+. 3374 FEC9898 4
+. 48 00 23 B1
+==== BB 3375 (0xFEC989C) approx BBs exec'd 0 ====
+
+ 0xFEC989C: 80DF001C lwz r6,28(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFEC98A0: 817F0000 lwz r11,0(r31)
+ 5: GETL R31, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0xFEC98A4: 7CC53378 or r5,r6,r6
+ 9: GETL R6, t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0xFEC98A8: 90DF000C stw r6,12(r31)
+ 12: GETL R6, t10
+ 13: GETL R31, t12
+ 14: ADDL $0xC, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0xFEC98AC: 90DF0004 stw r6,4(r31)
+ 17: GETL R6, t14
+ 18: GETL R31, t16
+ 19: ADDL $0x4, t16
+ 20: STL t14, (t16)
+ 21: INCEIPL $4
+
+ 0xFEC98B0: 90DF0008 stw r6,8(r31)
+ 22: GETL R6, t18
+ 23: GETL R31, t20
+ 24: ADDL $0x8, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0xFEC98B4: 71600100 andi. r0,r11,0x100
+ 27: GETL R11, t22
+ 28: ANDL $0x100, t22
+ 29: PUTL t22, R0
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x0, CR
+ 32: INCEIPL $4
+
+ 0xFEC98B8: 4082018C bc 4,2,0xFEC9A44
+ 33: Jc02o $0xFEC9A44
+
+
+
+. 3375 FEC989C 32
+. 80 DF 00 1C 81 7F 00 00 7C C5 33 78 90 DF 00 0C 90 DF 00 04 90 DF 00 08 71 60 01 00 40 82 01 8C
+==== BB 3376 (0xFEC98BC) approx BBs exec'd 0 ====
+
+ 0xFEC98BC: 815F0020 lwz r10,32(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFEC98C0: 7F855000 cmp cr7,r5,r10
+ 5: GETL R5, t4
+ 6: GETL R10, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFEC98C4: 419E013C bc 12,30,0xFEC9A00
+ 10: Js30o $0xFEC9A00
+
+
+
+. 3376 FEC98BC 12
+. 81 5F 00 20 7F 85 50 00 41 9E 01 3C
+==== BB 3377 (0xFEC98C8) approx BBs exec'd 0 ====
+
+ 0xFEC98C8: 819F0060 lwz r12,96(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFEC98CC: 616B0800 ori r11,r11,0x800
+ 5: GETL R11, t4
+ 6: ORL $0x800, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0xFEC98D0: 813F0008 lwz r9,8(r31)
+ 9: GETL R31, t6
+ 10: ADDL $0x8, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFEC98D4: 7CA42B78 or r4,r5,r5
+ 14: GETL R5, t10
+ 15: PUTL t10, R4
+ 16: INCEIPL $4
+
+ 0xFEC98D8: 2C8C0000 cmpi cr1,r12,0
+ 17: GETL R12, t12
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x1, CR
+ 20: INCEIPL $4
+
+ 0xFEC98DC: 90BF0014 stw r5,20(r31)
+ 21: GETL R5, t16
+ 22: GETL R31, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEC98E0: 913F000C stw r9,12(r31)
+ 26: GETL R9, t20
+ 27: GETL R31, t22
+ 28: ADDL $0xC, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xFEC98E4: 90BF0010 stw r5,16(r31)
+ 31: GETL R5, t24
+ 32: GETL R31, t26
+ 33: ADDL $0x10, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFEC98E8: 913F0004 stw r9,4(r31)
+ 36: GETL R9, t28
+ 37: GETL R31, t30
+ 38: ADDL $0x4, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0xFEC98EC: 917F0000 stw r11,0(r31)
+ 41: GETL R11, t32
+ 42: GETL R31, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0xFEC98F0: 40850144 bc 4,5,0xFEC9A34
+ 45: Jc05o $0xFEC9A34
+
+
+
+. 3377 FEC98C8 44
+. 81 9F 00 60 61 6B 08 00 81 3F 00 08 7C A4 2B 78 2C 8C 00 00 90 BF 00 14 91 3F 00 0C 90 BF 00 10 91 3F 00 04 91 7F 00 00 40 85 01 44
+==== BB 3378 (0xFEC9A34) approx BBs exec'd 0 ====
+
+ 0xFEC9A34: 71600202 andi. r0,r11,0x202
+ 0: GETL R11, t0
+ 1: ANDL $0x202, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEC9A38: 41A2FEBC bc 13,2,0xFEC98F4
+ 6: Js02o $0xFEC98F4
+
+
+
+. 3378 FEC9A34 8
+. 71 60 02 02 41 A2 FE BC
+==== BB 3379 (0xFEC98F4) approx BBs exec'd 0 ====
+
+ 0xFEC98F4: 915F0018 stw r10,24(r31)
+ 0: GETL R10, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEC98F8: 2F1DFFFF cmpi cr6,r29,-1
+ 5: GETL R29, t4
+ 6: MOVL $0xFFFFFFFF, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFEC98FC: 419A0098 bc 12,26,0xFEC9994
+ 10: Js26o $0xFEC9994
+
+
+
+. 3379 FEC98F4 12
+. 91 5F 00 18 2F 1D FF FF 41 9A 00 98
+==== BB 3380 (0xFEC9994) approx BBs exec'd 0 ====
+
+ 0xFEC9994: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC9998: 7CA42850 subf r5,r4,r5
+ 3: GETL R4, t2
+ 4: GETL R5, t4
+ 5: SUBL t2, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFEC999C: 4BFFF38D bl 0xFEC8D28
+ 8: MOVL $0xFEC99A0, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0xFEC8D28 ($4)
+
+
+
+. 3380 FEC9994 12
+. 7F E3 FB 78 7C A4 28 50 4B FF F3 8D
+==== BB 3381 _IO_do_write@@GLIBC_2.1(0xFEC8D28) approx BBs exec'd 0 ====
+
+ 0xFEC8D28: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEC8D2C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFEC8D30: 9361000C stw r27,12(r1)
+ 9: GETL R27, t6
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEC8D34: 7CBB2B79 or. r27,r5,r5
+ 14: GETL R5, t10
+ 15: PUTL t10, R27
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFEC8D38: 93810010 stw r28,16(r1)
+ 19: GETL R28, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x10, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFEC8D3C: 7C9C2378 or r28,r4,r4
+ 24: GETL R4, t18
+ 25: PUTL t18, R28
+ 26: INCEIPL $4
+
+ 0xFEC8D40: 93E1001C stw r31,28(r1)
+ 27: GETL R31, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x1C, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFEC8D44: 7C7F1B78 or r31,r3,r3
+ 32: GETL R3, t24
+ 33: PUTL t24, R31
+ 34: INCEIPL $4
+
+ 0xFEC8D48: 93A10014 stw r29,20(r1)
+ 35: GETL R29, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x14, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFEC8D4C: 93C10018 stw r30,24(r1)
+ 40: GETL R30, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x18, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0xFEC8D50: 90010024 stw r0,36(r1)
+ 45: GETL R0, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x24, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0xFEC8D54: 418200A4 bc 12,2,0xFEC8DF8
+ 50: Js02o $0xFEC8DF8
+
+
+
+. 3381 FEC8D28 48
+. 94 21 FF E0 7C 08 02 A6 93 61 00 0C 7C BB 2B 79 93 81 00 10 7C 9C 23 78 93 E1 00 1C 7C 7F 1B 78 93 A1 00 14 93 C1 00 18 90 01 00 24 41 82 00 A4
+==== BB 3382 (0xFEC8DF8) approx BBs exec'd 0 ====
+
+ 0xFEC8DF8: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC8DFC: 83610024 lwz r27,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R27
+ 7: INCEIPL $4
+
+ 0xFEC8E00: 83810010 lwz r28,16(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0xFEC8E04: 7F6803A6 mtlr r27
+ 13: GETL R27, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFEC8E08: 83A10014 lwz r29,20(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x14, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R29
+ 20: INCEIPL $4
+
+ 0xFEC8E0C: 8361000C lwz r27,12(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R27
+ 25: INCEIPL $4
+
+ 0xFEC8E10: 83C10018 lwz r30,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0xFEC8E14: 83E1001C lwz r31,28(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x1C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R31
+ 35: INCEIPL $4
+
+ 0xFEC8E18: 38210020 addi r1,r1,32
+ 36: GETL R1, t28
+ 37: ADDL $0x20, t28
+ 38: PUTL t28, R1
+ 39: INCEIPL $4
+
+ 0xFEC8E1C: 4E800020 blr
+ 40: GETL LR, t30
+ 41: JMPo-r t30 ($4)
+
+
+
+. 3382 FEC8DF8 40
+. 38 60 00 00 83 61 00 24 83 81 00 10 7F 68 03 A6 83 A1 00 14 83 61 00 0C 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 3383 (0xFEC99A0) approx BBs exec'd 0 ====
+
+ 0xFEC99A0: 83A10024 lwz r29,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFEC99A4: 83810010 lwz r28,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0xFEC99A8: 7FA803A6 mtlr r29
+ 10: GETL R29, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFEC99AC: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0xFEC99B0: 83A10014 lwz r29,20(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R29
+ 22: INCEIPL $4
+
+ 0xFEC99B4: 83E1001C lwz r31,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R31
+ 27: INCEIPL $4
+
+ 0xFEC99B8: 38210020 addi r1,r1,32
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: PUTL t22, R1
+ 31: INCEIPL $4
+
+ 0xFEC99BC: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+
+. 3383 FEC99A0 32
+. 83 A1 00 24 83 81 00 10 7F A8 03 A6 83 C1 00 18 83 A1 00 14 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 3384 (0xFECA7A0) approx BBs exec'd 0 ====
+
+ 0xFECA7A0: 2C83FFFF cmpi cr1,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFECA7A4: 7C79D050 subf r3,r25,r26
+ 5: GETL R25, t6
+ 6: GETL R26, t8
+ 7: SUBL t6, t8
+ 8: PUTL t8, R3
+ 9: INCEIPL $4
+
+ 0xFECA7A8: 41A6FF68 bc 13,6,0xFECA710
+ 10: Js06o $0xFECA710
+
+
+
+. 3384 FECA7A0 12
+. 2C 83 FF FF 7C 79 D0 50 41 A6 FF 68
+==== BB 3385 (0xFECA7AC) approx BBs exec'd 0 ====
+
+ 0xFECA7AC: 83FD0020 lwz r31,32(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFECA7B0: 7F3CCB78 or r28,r25,r25
+ 5: GETL R25, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFECA7B4: 801D001C lwz r0,28(r29)
+ 8: GETL R29, t6
+ 9: ADDL $0x1C, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0xFECA7B8: 7D20F850 subf r9,r0,r31
+ 13: GETL R0, t10
+ 14: GETL R31, t12
+ 15: SUBL t10, t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0xFECA7BC: 2B09007F cmpli cr6,r9,127
+ 18: GETL R9, t14
+ 19: MOVL $0x7F, t18
+ 20: CMPUL t14, t18, t16 (-rSo)
+ 21: ICRFL t16, $0x6, CR
+ 22: INCEIPL $4
+
+ 0xFECA7C0: 4099000C bc 4,25,0xFECA7CC
+ 23: Jc25o $0xFECA7CC
+
+
+
+. 3385 FECA7AC 24
+. 83 FD 00 20 7F 3C CB 78 80 1D 00 1C 7D 20 F8 50 2B 09 00 7F 40 99 00 0C
+==== BB 3386 (0xFECA7C4) approx BBs exec'd 0 ====
+
+ 0xFECA7C4: 7C994B96 divwu r4, r25, r9
+ 0: GETL R25, t2
+ 1: GETL R9, t0
+ 2: UDIVL t0, t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFECA7C8: 7F8449D6 mullw r28,r4,r9
+ 5: GETL R4, t4
+ 6: GETL R9, t6
+ 7: MULL t4, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0xFECA7CC: 2C1C0000 cmpi cr0,r28,0
+ 10: GETL R28, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x0, CR
+ 13: INCEIPL $4
+
+ 0xFECA7D0: 418200A8 bc 12,2,0xFECA878
+ 14: Js02o $0xFECA878
+
+
+
+. 3386 FECA7C4 16
+. 7C 99 4B 96 7F 84 49 D6 2C 1C 00 00 41 82 00 A8
+==== BB 3387 (0xFECA878) approx BBs exec'd 0 ====
+
+ 0xFECA878: 2F190000 cmpi cr6,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFECA87C: 419AFE90 bc 12,26,0xFECA70C
+ 4: Js26o $0xFECA70C
+
+
+
+. 3387 FECA878 8
+. 2F 19 00 00 41 9A FE 90
+==== BB 3388 (0xFECA880) approx BBs exec'd 0 ====
+
+ 0xFECA880: 7F25CB78 or r5,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFECA884: 7C9BE214 add r4,r27,r28
+ 3: GETL R27, t2
+ 4: GETL R28, t4
+ 5: ADDL t2, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFECA888: 7FA3EB78 or r3,r29,r29
+ 8: GETL R29, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFECA88C: 480014C9 bl 0xFECBD54
+ 11: MOVL $0xFECA890, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0xFECBD54 ($4)
+
+
+
+. 3388 FECA880 16
+. 7F 25 CB 78 7C 9B E2 14 7F A3 EB 78 48 00 14 C9
+==== BB 3389 _IO_default_xsputn_internal(0xFECBD54) approx BBs exec'd 0 ====
+
+ 0xFECBD54: 2F850000 cmpi cr7,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFECBD58: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFECBD5C: 9421FFE0 stwu r1,-32(r1)
+ 7: GETL R1, t6
+ 8: GETL R1, t8
+ 9: ADDL $0xFFFFFFE0, t8
+ 10: PUTL t8, R1
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFECBD60: 93410008 stw r26,8(r1)
+ 13: GETL R26, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x8, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFECBD64: 7CBA2B78 or r26,r5,r5
+ 18: GETL R5, t14
+ 19: PUTL t14, R26
+ 20: INCEIPL $4
+
+ 0xFECBD68: 9361000C stw r27,12(r1)
+ 21: GETL R27, t16
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFECBD6C: 7CBB2B78 or r27,r5,r5
+ 26: GETL R5, t20
+ 27: PUTL t20, R27
+ 28: INCEIPL $4
+
+ 0xFECBD70: 93810010 stw r28,16(r1)
+ 29: GETL R28, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x10, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFECBD74: 7C7C1B78 or r28,r3,r3
+ 34: GETL R3, t26
+ 35: PUTL t26, R28
+ 36: INCEIPL $4
+
+ 0xFECBD78: 93E1001C stw r31,28(r1)
+ 37: GETL R31, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x1C, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFECBD7C: 38600000 li r3,0
+ 42: MOVL $0x0, t32
+ 43: PUTL t32, R3
+ 44: INCEIPL $4
+
+ 0xFECBD80: 93A10014 stw r29,20(r1)
+ 45: GETL R29, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x14, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0xFECBD84: 7C9F2378 or r31,r4,r4
+ 50: GETL R4, t38
+ 51: PUTL t38, R31
+ 52: INCEIPL $4
+
+ 0xFECBD88: 93C10018 stw r30,24(r1)
+ 53: GETL R30, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x18, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0xFECBD8C: 90010024 stw r0,36(r1)
+ 58: GETL R0, t44
+ 59: GETL R1, t46
+ 60: ADDL $0x24, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0xFECBD90: 419E00A0 bc 12,30,0xFECBE30
+ 63: Js30o $0xFECBE30
+
+
+
+. 3389 FECBD54 64
+. 2F 85 00 00 7C 08 02 A6 94 21 FF E0 93 41 00 08 7C BA 2B 78 93 61 00 0C 7C BB 2B 78 93 81 00 10 7C 7C 1B 78 93 E1 00 1C 38 60 00 00 93 A1 00 14 7C 9F 23 78 93 C1 00 18 90 01 00 24 41 9E 00 A0
+==== BB 3390 (0xFECBD94) approx BBs exec'd 0 ====
+
+ 0xFECBD94: 807C0014 lwz r3,20(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECBD98: 80BC0018 lwz r5,24(r28)
+ 5: GETL R28, t4
+ 6: ADDL $0x18, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFECBD9C: 7C032840 cmpl cr0,r3,r5
+ 10: GETL R3, t8
+ 11: GETL R5, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFECBDA0: 4080004C bc 4,0,0xFECBDEC
+ 15: Jc00o $0xFECBDEC
+
+
+
+. 3390 FECBD94 16
+. 80 7C 00 14 80 BC 00 18 7C 03 28 40 40 80 00 4C
+==== BB 3391 (0xFECBDA4) approx BBs exec'd 0 ====
+
+ 0xFECBDA4: 7FA32850 subf r29,r3,r5
+ 0: GETL R3, t0
+ 1: GETL R5, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFECBDA8: 7C9DD840 cmpl cr1,r29,r27
+ 5: GETL R29, t4
+ 6: GETL R27, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0xFECBDAC: 40850008 bc 4,5,0xFECBDB4
+ 10: Jc05o $0xFECBDB4
+
+
+
+. 3391 FECBDA4 12
+. 7F A3 28 50 7C 9D D8 40 40 85 00 08
+==== BB 3392 (0xFECBDB0) approx BBs exec'd 0 ====
+
+ 0xFECBDB0: 7F7DDB78 or r29,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFECBDB4: 2B1D0014 cmpli cr6,r29,20
+ 3: GETL R29, t2
+ 4: MOVL $0x14, t6
+ 5: CMPUL t2, t6, t4 (-rSo)
+ 6: ICRFL t4, $0x6, CR
+ 7: INCEIPL $4
+
+ 0xFECBDB8: 419900A0 bc 12,25,0xFECBE58
+ 8: Js25o $0xFECBE58
+
+
+
+. 3392 FECBDB0 12
+. 7F 7D DB 78 2B 1D 00 14 41 99 00 A0
+==== BB 3393 (0xFECBE58) approx BBs exec'd 0 ====
+
+ 0xFECBE58: 7FE4FB78 or r4,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFECBE5C: 7FA5EB78 or r5,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFECBE60: 4800C1A1 bl 0xFED8000
+ 6: MOVL $0xFECBE64, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFED8000 ($4)
+
+
+
+. 3393 FECBE58 12
+. 7F E4 FB 78 7F A5 EB 78 48 00 C1 A1
+==== BB 3394 (0xFED88F4) approx BBs exec'd 0 ====
+
+ 0xFED88F4: 81240000 lwz r9,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFED88F8: 3884FFFC addi r4,r4,-4
+ 4: GETL R4, t4
+ 5: ADDL $0xFFFFFFFC, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFED88FC: 80040008 lwz r0,8(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0xFED8900: 3863FFF8 addi r3,r3,-8
+ 13: GETL R3, t10
+ 14: ADDL $0xFFFFFFF8, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0xFED8904: 38A50001 addi r5,r5,1
+ 17: GETL R5, t12
+ 18: ADDL $0x1, t12
+ 19: PUTL t12, R5
+ 20: INCEIPL $4
+
+ 0xFED8908: 91230008 stw r9,8(r3)
+ 21: GETL R9, t14
+ 22: GETL R3, t16
+ 23: ADDL $0x8, t16
+ 24: STL t14, (t16)
+ 25: INCEIPL $4
+
+ 0xFED890C: 4BFFFF10 b 0xFED881C
+ 26: JMPo $0xFED881C ($4)
+
+
+
+. 3394 FED88F4 28
+. 81 24 00 00 38 84 FF FC 80 04 00 08 38 63 FF F8 38 A5 00 01 91 23 00 08 4B FF FF 10
+==== BB 3395 (0xFED881C) approx BBs exec'd 0 ====
+
+ 0xFED881C: 8124000C lwz r9,12(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFED8820: 9003000C stw r0,12(r3)
+ 5: GETL R0, t4
+ 6: GETL R3, t6
+ 7: ADDL $0xC, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFED8824: 80040010 lwz r0,16(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0x10, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0xFED8828: 91230010 stw r9,16(r3)
+ 15: GETL R9, t12
+ 16: GETL R3, t14
+ 17: ADDL $0x10, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFED882C: 81240014 lwz r9,20(r4)
+ 20: GETL R4, t16
+ 21: ADDL $0x14, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R9
+ 24: INCEIPL $4
+
+ 0xFED8830: 90030014 stw r0,20(r3)
+ 25: GETL R0, t20
+ 26: GETL R3, t22
+ 27: ADDL $0x14, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0xFED8834: 80040018 lwz r0,24(r4)
+ 30: GETL R4, t24
+ 31: ADDL $0x18, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R0
+ 34: INCEIPL $4
+
+ 0xFED8838: 91230018 stw r9,24(r3)
+ 35: GETL R9, t28
+ 36: GETL R3, t30
+ 37: ADDL $0x18, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0xFED883C: 34A5FFF8 addic. r5,r5,-8
+ 40: GETL R5, t32
+ 41: ADCL $0xFFFFFFF8, t32 (-wCa)
+ 42: PUTL t32, R5
+ 43: CMP0L t32, t34 (-rSo)
+ 44: ICRFL t34, $0x0, CR
+ 45: INCEIPL $4
+
+ 0xFED8840: 8124001C lwz r9,28(r4)
+ 46: GETL R4, t36
+ 47: ADDL $0x1C, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R9
+ 50: INCEIPL $4
+
+ 0xFED8844: 9003001C stw r0,28(r3)
+ 51: GETL R0, t40
+ 52: GETL R3, t42
+ 53: ADDL $0x1C, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0xFED8848: 38840020 addi r4,r4,32
+ 56: GETL R4, t44
+ 57: ADDL $0x20, t44
+ 58: PUTL t44, R4
+ 59: INCEIPL $4
+
+ 0xFED884C: 38630020 addi r3,r3,32
+ 60: GETL R3, t46
+ 61: ADDL $0x20, t46
+ 62: PUTL t46, R3
+ 63: INCEIPL $4
+
+ 0xFED8850: 40A2FFB4 bc 5,2,0xFED8804
+ 64: Jc02o $0xFED8804
+
+
+
+. 3395 FED881C 56
+. 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+==== BB 3396 (0xFECBE64) approx BBs exec'd 0 ====
+
+ 0xFECBE64: 7FFFEA14 add r31,r31,r29
+ 0: GETL R31, t0
+ 1: GETL R29, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFECBE68: 907C0014 stw r3,20(r28)
+ 5: GETL R3, t4
+ 6: GETL R28, t6
+ 7: ADDL $0x14, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECBE6C: 4BFFFF7C b 0xFECBDE8
+ 10: JMPo $0xFECBDE8 ($4)
+
+
+
+. 3396 FECBE64 12
+. 7F FF EA 14 90 7C 00 14 4B FF FF 7C
+==== BB 3397 (0xFECBDE8) approx BBs exec'd 0 ====
+
+ 0xFECBDE8: 7F7DD850 subf r27,r29,r27
+ 0: GETL R29, t0
+ 1: GETL R27, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xFECBDEC: 2C9B0000 cmpi cr1,r27,0
+ 5: GETL R27, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFECBDF0: 4186003C bc 12,6,0xFECBE2C
+ 9: Js06o $0xFECBE2C
+
+
+
+. 3397 FECBDE8 12
+. 7F 7D D8 50 2C 9B 00 00 41 86 00 3C
+==== BB 3398 (0xFECBE2C) approx BBs exec'd 0 ====
+
+ 0xFECBE2C: 7C7BD050 subf r3,r27,r26
+ 0: GETL R27, t0
+ 1: GETL R26, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECBE30: 80E10024 lwz r7,36(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x24, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0xFECBE34: 83410008 lwz r26,8(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R26
+ 14: INCEIPL $4
+
+ 0xFECBE38: 8361000C lwz r27,12(r1)
+ 15: GETL R1, t12
+ 16: ADDL $0xC, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R27
+ 19: INCEIPL $4
+
+ 0xFECBE3C: 7CE803A6 mtlr r7
+ 20: GETL R7, t16
+ 21: PUTL t16, LR
+ 22: INCEIPL $4
+
+ 0xFECBE40: 83810010 lwz r28,16(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x10, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R28
+ 27: INCEIPL $4
+
+ 0xFECBE44: 83A10014 lwz r29,20(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x14, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R29
+ 32: INCEIPL $4
+
+ 0xFECBE48: 83C10018 lwz r30,24(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x18, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R30
+ 37: INCEIPL $4
+
+ 0xFECBE4C: 83E1001C lwz r31,28(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x1C, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R31
+ 42: INCEIPL $4
+
+ 0xFECBE50: 38210020 addi r1,r1,32
+ 43: GETL R1, t34
+ 44: ADDL $0x20, t34
+ 45: PUTL t34, R1
+ 46: INCEIPL $4
+
+ 0xFECBE54: 4E800020 blr
+ 47: GETL LR, t36
+ 48: JMPo-r t36 ($4)
+
+
+
+. 3398 FECBE2C 44
+. 7C 7B D0 50 80 E1 00 24 83 41 00 08 83 61 00 0C 7C E8 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 3399 (0xFECA890) approx BBs exec'd 0 ====
+
+ 0xFECA890: 7F23C850 subf r25,r3,r25
+ 0: GETL R3, t0
+ 1: GETL R25, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0xFECA894: 7C79D050 subf r3,r25,r26
+ 5: GETL R25, t4
+ 6: GETL R26, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFECA898: 4BFFFE78 b 0xFECA710
+ 10: JMPo $0xFECA710 ($4)
+
+
+
+. 3399 FECA890 12
+. 7F 23 C8 50 7C 79 D0 50 4B FF FE 78
+==== BB 3400 (0xFECA710) approx BBs exec'd 0 ====
+
+ 0xFECA710: 83210034 lwz r25,52(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0xFECA714: 83010010 lwz r24,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R24
+ 9: INCEIPL $4
+
+ 0xFECA718: 7F2803A6 mtlr r25
+ 10: GETL R25, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0xFECA71C: 83410018 lwz r26,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R26
+ 17: INCEIPL $4
+
+ 0xFECA720: 83210014 lwz r25,20(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R25
+ 22: INCEIPL $4
+
+ 0xFECA724: 8361001C lwz r27,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R27
+ 27: INCEIPL $4
+
+ 0xFECA728: 83810020 lwz r28,32(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R28
+ 32: INCEIPL $4
+
+ 0xFECA72C: 83A10024 lwz r29,36(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x24, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R29
+ 37: INCEIPL $4
+
+ 0xFECA730: 83C10028 lwz r30,40(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x28, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R30
+ 42: INCEIPL $4
+
+ 0xFECA734: 83E1002C lwz r31,44(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x2C, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R31
+ 47: INCEIPL $4
+
+ 0xFECA738: 38210030 addi r1,r1,48
+ 48: GETL R1, t38
+ 49: ADDL $0x30, t38
+ 50: PUTL t38, R1
+ 51: INCEIPL $4
+
+ 0xFECA73C: 4E800020 blr
+ 52: GETL LR, t40
+ 53: JMPo-r t40 ($4)
+
+
+
+. 3400 FECA710 48
+. 83 21 00 34 83 01 00 10 7F 28 03 A6 83 41 00 18 83 21 00 14 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 3401 (0xFEBE560) approx BBs exec'd 0 ====
+
+ 0xFEBE560: 7F03D800 cmp cr6,r3,r27
+ 0: GETL R3, t0
+ 1: GETL R27, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFEBE564: 409AFF54 bc 4,26,0xFEBE4B8
+ 5: Jc26o $0xFEBE4B8
+
+
+
+. 3401 FEBE560 8
+. 7F 03 D8 00 40 9A FF 54
+==== BB 3402 (0xFEBE568) approx BBs exec'd 0 ====
+
+ 0xFEBE568: 807C0000 lwz r3,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEBE56C: 81430014 lwz r10,20(r3)
+ 4: GETL R3, t4
+ 5: ADDL $0x14, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0xFEBE570: 83830018 lwz r28,24(r3)
+ 9: GETL R3, t8
+ 10: ADDL $0x18, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R28
+ 13: INCEIPL $4
+
+ 0xFEBE574: 7C0AE040 cmpl cr0,r10,r28
+ 14: GETL R10, t12
+ 15: GETL R28, t14
+ 16: CMPUL t12, t14, t16 (-rSo)
+ 17: ICRFL t16, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFEBE578: 408000B4 bc 4,0,0xFEBE62C
+ 19: Jc00o $0xFEBE62C
+
+
+
+. 3402 FEBE568 20
+. 80 7C 00 00 81 43 00 14 83 83 00 18 7C 0A E0 40 40 80 00 B4
+==== BB 3403 (0xFEBE57C) approx BBs exec'd 0 ====
+
+ 0xFEBE57C: 3B2A0001 addi r25,r10,1
+ 0: GETL R10, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0xFEBE580: 3880000A li r4,10
+ 4: MOVL $0xA, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0xFEBE584: 988A0000 stb r4,0(r10)
+ 7: GETL R4, t4
+ 8: GETL R10, t6
+ 9: STB t4, (t6)
+ 10: INCEIPL $4
+
+ 0xFEBE588: 93230014 stw r25,20(r3)
+ 11: GETL R25, t8
+ 12: GETL R3, t10
+ 13: ADDL $0x14, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFEBE58C: 3B3B0001 addi r25,r27,1
+ 16: GETL R27, t12
+ 17: ADDL $0x1, t12
+ 18: PUTL t12, R25
+ 19: INCEIPL $4
+
+ 0xFEBE590: 4BFFFF28 b 0xFEBE4B8
+ 20: JMPo $0xFEBE4B8 ($4)
+
+
+
+. 3403 FEBE57C 24
+. 3B 2A 00 01 38 80 00 0A 98 8A 00 00 93 23 00 14 3B 3B 00 01 4B FF FF 28
+==== BB 3404 (0xFEBE4B8) approx BBs exec'd 0 ====
+
+ 0xFEBE4B8: 807F0000 lwz r3,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEBE4BC: 70698000 andi. r9,r3,0x8000
+ 4: GETL R3, t4
+ 5: ANDL $0x8000, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEBE4C0: 40820038 bc 4,2,0xFEBE4F8
+ 10: Jc02o $0xFEBE4F8
+
+
+
+. 3404 FEBE4B8 12
+. 80 7F 00 00 70 69 80 00 40 82 00 38
+==== BB 3405 (0xFEBE4C4) approx BBs exec'd 0 ====
+
+ 0xFEBE4C4: 807F0048 lwz r3,72(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEBE4C8: 81430004 lwz r10,4(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0xFEBE4CC: 392AFFFF addi r9,r10,-1
+ 10: GETL R10, t8
+ 11: ADDL $0xFFFFFFFF, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFEBE4D0: 2F890000 cmpi cr7,r9,0
+ 14: GETL R9, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x7, CR
+ 17: INCEIPL $4
+
+ 0xFEBE4D4: 91230004 stw r9,4(r3)
+ 18: GETL R9, t14
+ 19: GETL R3, t16
+ 20: ADDL $0x4, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFEBE4D8: 409E0020 bc 4,30,0xFEBE4F8
+ 23: Jc30o $0xFEBE4F8
+
+
+
+. 3405 FEBE4C4 24
+. 80 7F 00 48 81 43 00 04 39 2A FF FF 2F 89 00 00 91 23 00 04 40 9E 00 20
+==== BB 3406 (0xFEBE4DC) approx BBs exec'd 0 ====
+
+ 0xFEBE4DC: 91230008 stw r9,8(r3)
+ 0: GETL R9, t0
+ 1: GETL R3, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEBE4E0: 7C0004AC sync
+ 5: INCEIPL $4
+
+ 0xFEBE4E4: 7D801828 lwarx r12,r0,r3
+ 6: GETL R3, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0xFEBE4E8: 7D20192D stwcx. r9,r0,r3
+ 11: GETL R3, t8
+ 12: GETL R9, t10
+ 13: LOCKo
+ 14: STL t10, (t8) (-rSo)
+ 15: ICRFL cr, $0x0, CR
+ 16: INCEIPL $4
+
+ 0xFEBE4EC: 40A2FFF8 bc 5,2,0xFEBE4E4
+ 17: Jc02o $0xFEBE4E4
+
+
+
+. 3406 FEBE4DC 20
+. 91 23 00 08 7C 00 04 AC 7D 80 18 28 7D 20 19 2D 40 A2 FF F8
+==== BB 3407 (0xFEBE4F0) approx BBs exec'd 0 ====
+
+ 0xFEBE4F0: 2C8C0001 cmpi cr1,r12,1
+ 0: GETL R12, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFEBE4F4: 4185011C bc 12,5,0xFEBE610
+ 5: Js05o $0xFEBE610
+
+
+
+. 3407 FEBE4F0 8
+. 2C 8C 00 01 41 85 01 1C
+==== BB 3408 (0xFEBE4F8) approx BBs exec'd 0 ====
+
+ 0xFEBE4F8: 83A10034 lwz r29,52(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFEBE4FC: 7F23CB78 or r3,r25,r25
+ 5: GETL R25, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEBE500: 83410018 lwz r26,24(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x18, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0xFEBE504: 7FA803A6 mtlr r29
+ 13: GETL R29, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0xFEBE508: 83210014 lwz r25,20(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x14, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R25
+ 20: INCEIPL $4
+
+ 0xFEBE50C: 8361001C lwz r27,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R27
+ 25: INCEIPL $4
+
+ 0xFEBE510: 83810020 lwz r28,32(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R28
+ 30: INCEIPL $4
+
+ 0xFEBE514: 83A10024 lwz r29,36(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x24, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R29
+ 35: INCEIPL $4
+
+ 0xFEBE518: 83C10028 lwz r30,40(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x28, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R30
+ 40: INCEIPL $4
+
+ 0xFEBE51C: 83E1002C lwz r31,44(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x2C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R31
+ 45: INCEIPL $4
+
+ 0xFEBE520: 38210030 addi r1,r1,48
+ 46: GETL R1, t36
+ 47: ADDL $0x30, t36
+ 48: PUTL t36, R1
+ 49: INCEIPL $4
+
+ 0xFEBE524: 4E800020 blr
+ 50: GETL LR, t38
+ 51: JMPo-r t38 ($4)
+
+
+
+. 3408 FEBE4F8 48
+. 83 A1 00 34 7F 23 CB 78 83 41 00 18 7F A8 03 A6 83 21 00 14 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+==== BB 3409 (0x10001448) approx BBs exec'd 0 ====
+
+ 0x10001448: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x1000144C: 48005B5D bl 0x10006FA8
+ 3: MOVL $0x10001450, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x10006FA8 ($4)
+
+
+
+. 3409 10001448 8
+. 7F A3 EB 78 48 00 5B 5D
+==== BB 3410 (0x10006FA8) approx BBs exec'd 0 ====
+
+ 0x10006FA8: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10006FAC: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0x10006FB0: 9421FFF0 stwu r1,-16(r1)
+ 7: GETL R1, t6
+ 8: GETL R1, t8
+ 9: ADDL $0xFFFFFFF0, t8
+ 10: PUTL t8, R1
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x10006FB4: 90010014 stw r0,20(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x10006FB8: 419E0008 bc 12,30,0x10006FC0
+ 18: Js30o $0x10006FC0
+
+
+
+. 3410 10006FA8 20
+. 2F 83 00 00 7C 08 02 A6 94 21 FF F0 90 01 00 14 41 9E 00 08
+==== BB 3411 (0x10006FBC) approx BBs exec'd 0 ====
+
+ 0x10006FBC: 48013D01 bl 0x1001ACBC
+ 0: MOVL $0x10006FC0, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x1001ACBC ($4)
+
+
+
+. 3411 10006FBC 4
+. 48 01 3D 01
+==== BB 3412 (0x1001ACBC) approx BBs exec'd 0 ====
+
+ 0x1001ACBC: 396000C4 li r11,196
+ 0: MOVL $0xC4, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001ACC0: 4BFFFE4C b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 3412 1001ACBC 8
+. 39 60 00 C4 4B FF FE 4C
+==== BB 3413 (0x10006FC0) approx BBs exec'd 0 ====
+
+ 0x10006FC0: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10006FC4: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x10006FC8: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x10006FCC: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 3413 10006FC0 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+==== BB 3414 (0x10001450) approx BBs exec'd 0 ====
+
+ 0x10001450: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x10001454: 80010064 lwz r0,100(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x64, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x10001458: 83010040 lwz r24,64(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x40, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R24
+ 12: INCEIPL $4
+
+ 0x1000145C: 83210044 lwz r25,68(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x44, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R25
+ 17: INCEIPL $4
+
+ 0x10001460: 7C0803A6 mtlr r0
+ 18: GETL R0, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x10001464: 83410048 lwz r26,72(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x48, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R26
+ 25: INCEIPL $4
+
+ 0x10001468: 8361004C lwz r27,76(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x4C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R27
+ 30: INCEIPL $4
+
+ 0x1000146C: 83810050 lwz r28,80(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x50, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R28
+ 35: INCEIPL $4
+
+ 0x10001470: 83A10054 lwz r29,84(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x54, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R29
+ 40: INCEIPL $4
+
+ 0x10001474: 83C10058 lwz r30,88(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x58, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R30
+ 45: INCEIPL $4
+
+ 0x10001478: 83E1005C lwz r31,92(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x5C, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R31
+ 50: INCEIPL $4
+
+ 0x1000147C: 38210060 addi r1,r1,96
+ 51: GETL R1, t40
+ 52: ADDL $0x60, t40
+ 53: PUTL t40, R1
+ 54: INCEIPL $4
+
+ 0x10001480: 4E800020 blr
+ 55: GETL LR, t42
+ 56: JMPo-r t42 ($4)
+
+
+
+. 3414 10001450 52
+. 38 60 00 00 80 01 00 64 83 01 00 40 83 21 00 44 7C 08 03 A6 83 41 00 48 83 61 00 4C 83 81 00 50 83 A1 00 54 83 C1 00 58 83 E1 00 5C 38 21 00 60 4E 80 00 20
+==== BB 3415 (0x10001C04) approx BBs exec'd 0 ====
+
+ 0x10001C04: 7F9C1B78 or r28,r28,r3
+ 0: GETL R28, t0
+ 1: GETL R3, t2
+ 2: ORL t2, t0
+ 3: PUTL t0, R28
+ 4: INCEIPL $4
+
+ 0x10001C08: 301CFFFF addic r0,r28,-1
+ 5: GETL R28, t4
+ 6: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x10001C0C: 7C60E110 subfe r3,r0,r28
+ 9: GETL R0, t6
+ 10: GETL R28, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0x10001C10: 4BFFFCCC b 0x100018DC
+ 14: JMPo $0x100018DC ($4)
+
+
+
+. 3415 10001C04 16
+. 7F 9C 1B 78 30 1C FF FF 7C 60 E1 10 4B FF FC CC
+==== BB 3416 (0x100018DC) approx BBs exec'd 0 ====
+
+ 0x100018DC: 480193C1 bl 0x1001AC9C
+ 0: MOVL $0x100018E0, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x1001AC9C ($4)
+
+
+
+. 3416 100018DC 4
+. 48 01 93 C1
+==== BB 3417 (0x1001AC9C) approx BBs exec'd 0 ====
+
+ 0x1001AC9C: 396000B4 li r11,180
+ 0: MOVL $0xB4, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001ACA0: 4BFFFE6C b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 3417 1001AC9C 8
+. 39 60 00 B4 4B FF FE 6C
+==== BB 3418 exit(0xFE93B98) approx BBs exec'd 0 ====
+
+ 0xFE93B98: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE93B9C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE93BA0: 481142B1 bl 0xFFA7E50
+ 9: MOVL $0xFE93BA4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3418 FE93B98 12
+. 94 21 FF E0 7C 08 02 A6 48 11 42 B1
+==== BB 3419 (0xFE93BA4) approx BBs exec'd 0 ====
+
+ 0xFE93BA4: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE93BA8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE93BAC: 93E1001C stw r31,28(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE93BB0: 93810010 stw r28,16(r1)
+ 13: GETL R28, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x10, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE93BB4: 7C7C1B78 or r28,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0xFE93BB8: 93A10014 stw r29,20(r1)
+ 21: GETL R29, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE93BBC: 83FE1AFC lwz r31,6908(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x1AFC, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0xFE93BC0: 90010024 stw r0,36(r1)
+ 31: GETL R0, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x24, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFE93BC4: 801F0000 lwz r0,0(r31)
+ 36: GETL R31, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R0
+ 39: INCEIPL $4
+
+ 0xFE93BC8: 2F800000 cmpi cr7,r0,0
+ 40: GETL R0, t32
+ 41: CMP0L t32, t34 (-rSo)
+ 42: ICRFL t34, $0x7, CR
+ 43: INCEIPL $4
+
+ 0xFE93BCC: 419E00CC bc 12,30,0xFE93C98
+ 44: Js30o $0xFE93C98
+
+
+
+. 3419 FE93BA4 44
+. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 93 81 00 10 7C 7C 1B 78 93 A1 00 14 83 FE 1A FC 90 01 00 24 80 1F 00 00 2F 80 00 00 41 9E 00 CC
+==== BB 3420 (0xFE93BD0) approx BBs exec'd 0 ====
+
+ 0xFE93BD0: 813F0000 lwz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFE93BD4: 80690004 lwz r3,4(r9)
+ 4: GETL R9, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFE93BD8: 2C030000 cmpi cr0,r3,0
+ 9: GETL R3, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFE93BDC: 41820078 bc 12,2,0xFE93C54
+ 13: Js02o $0xFE93C54
+
+
+
+. 3420 FE93BD0 16
+. 81 3F 00 00 80 69 00 04 2C 03 00 00 41 82 00 78
+==== BB 3421 (0xFE93BE0) approx BBs exec'd 0 ====
+
+ 0xFE93BE0: 7D2A4B78 or r10,r9,r9
+ 0: GETL R9, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFE93BE4: 48000018 b 0xFE93BFC
+ 3: JMPo $0xFE93BFC ($4)
+
+
+
+. 3421 FE93BE0 8
+. 7D 2A 4B 78 48 00 00 18
+==== BB 3422 (0xFE93BFC) approx BBs exec'd 0 ====
+
+ 0xFE93BFC: 80AA0004 lwz r5,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFE93C00: 3925FFFF addi r9,r5,-1
+ 5: GETL R5, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0xFE93C04: 55242036 rlwinm r4,r9,4,0,27
+ 9: GETL R9, t6
+ 10: SHLL $0x4, t6
+ 11: PUTL t6, R4
+ 12: INCEIPL $4
+
+ 0xFE93C08: 912A0004 stw r9,4(r10)
+ 13: GETL R9, t8
+ 14: GETL R10, t10
+ 15: ADDL $0x4, t10
+ 16: STL t8, (t10)
+ 17: INCEIPL $4
+
+ 0xFE93C0C: 7D645214 add r11,r4,r10
+ 18: GETL R4, t12
+ 19: GETL R10, t14
+ 20: ADDL t12, t14
+ 21: PUTL t14, R11
+ 22: INCEIPL $4
+
+ 0xFE93C10: 800B0008 lwz r0,8(r11)
+ 23: GETL R11, t16
+ 24: ADDL $0x8, t16
+ 25: LDL (t16), t18
+ 26: PUTL t18, R0
+ 27: INCEIPL $4
+
+ 0xFE93C14: 396B0008 addi r11,r11,8
+ 28: GETL R11, t20
+ 29: ADDL $0x8, t20
+ 30: PUTL t20, R11
+ 31: INCEIPL $4
+
+ 0xFE93C18: 2F800003 cmpi cr7,r0,3
+ 32: GETL R0, t22
+ 33: MOVL $0x3, t26
+ 34: CMPL t22, t26, t24 (-rSo)
+ 35: ICRFL t24, $0x7, CR
+ 36: INCEIPL $4
+
+ 0xFE93C1C: 419E0054 bc 12,30,0xFE93C70
+ 37: Js30o $0xFE93C70
+
+
+
+. 3422 FE93BFC 36
+. 80 AA 00 04 39 25 FF FF 55 24 20 36 91 2A 00 04 7D 64 52 14 80 0B 00 08 39 6B 00 08 2F 80 00 03 41 9E 00 54
+==== BB 3423 (0xFE93C20) approx BBs exec'd 0 ====
+
+ 0xFE93C20: 2C800002 cmpi cr1,r0,2
+ 0: GETL R0, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFE93C24: 2F000004 cmpi cr6,r0,4
+ 5: GETL R0, t6
+ 6: MOVL $0x4, t10
+ 7: CMPL t6, t10, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFE93C28: 40BDFFC0 bc 5,29,0xFE93BE8
+ 10: Jc29o $0xFE93BE8
+
+
+
+. 3423 FE93C20 12
+. 2C 80 00 02 2F 00 00 04 40 BD FF C0
+==== BB 3424 (0xFE93C2C) approx BBs exec'd 0 ====
+
+ 0xFE93C2C: 409AFFC0 bc 4,26,0xFE93BEC
+ 0: Jc26o $0xFE93BEC
+
+
+
+. 3424 FE93C2C 4
+. 40 9A FF C0
+==== BB 3425 (0xFE93C30) approx BBs exec'd 0 ====
+
+ 0xFE93C30: 810B0004 lwz r8,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFE93C34: 7F84E378 or r4,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFE93C38: 806B0008 lwz r3,8(r11)
+ 8: GETL R11, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFE93C3C: 7D0903A6 mtctr r8
+ 13: GETL R8, t10
+ 14: PUTL t10, CTR
+ 15: INCEIPL $4
+
+ 0xFE93C40: 4E800421 bctrl
+ 16: MOVL $0xFE93C44, t12
+ 17: PUTL t12, LR
+ 18: GETL CTR, t14
+ 19: JMPo-c t14 ($4)
+
+
+
+. 3425 FE93C30 20
+. 81 0B 00 04 7F 84 E3 78 80 6B 00 08 7D 09 03 A6 4E 80 04 21
+==== BB 3426 close_stdout(0x100050CC) approx BBs exec'd 0 ====
+
+ 0x100050CC: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x100050D0: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x100050D4: 480157D9 bl 0x1001A8AC
+ 9: MOVL $0x100050D8, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x1001A8AC ($4)
+
+
+
+. 3426 100050CC 12
+. 94 21 FF E0 7C 08 02 A6 48 01 57 D9
+==== BB 3427 (0x100050D8) approx BBs exec'd 0 ====
+
+ 0x100050D8: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x100050DC: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x100050E0: 93A10014 stw r29,20(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x100050E4: 90010024 stw r0,36(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x100050E8: 93E1001C stw r31,28(r1)
+ 18: GETL R31, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x1C, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x100050EC: 83BE01EC lwz r29,492(r30)
+ 23: GETL R30, t18
+ 24: ADDL $0x1EC, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R29
+ 27: INCEIPL $4
+
+ 0x100050F0: 807D0000 lwz r3,0(r29)
+ 28: GETL R29, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R3
+ 31: INCEIPL $4
+
+ 0x100050F4: 80030000 lwz r0,0(r3)
+ 32: GETL R3, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R0
+ 35: INCEIPL $4
+
+ 0x100050F8: 5400DFFE rlwinm r0,r0,27,31,31
+ 36: GETL R0, t30
+ 37: ROLL $0x1B, t30
+ 38: ANDL $0x1, t30
+ 39: PUTL t30, R0
+ 40: INCEIPL $4
+
+ 0x100050FC: 33E0FFFF addic r31,r0,-1
+ 41: GETL R0, t32
+ 42: ADCL $0xFFFFFFFF, t32 (-wCa)
+ 43: PUTL t32, R31
+ 44: INCEIPL $4
+
+ 0x10005100: 7FFFF910 subfe r31,r31,r31
+ 45: GETL R31, t34
+ 46: GETL R31, t36
+ 47: SBBL t34, t36 (-rCa-wCa)
+ 48: PUTL t36, R31
+ 49: INCEIPL $4
+
+ 0x10005104: 2F9F0000 cmpi cr7,r31,0
+ 50: GETL R31, t38
+ 51: CMP0L t38, t40 (-rSo)
+ 52: ICRFL t40, $0x7, CR
+ 53: INCEIPL $4
+
+ 0x10005108: 419E0010 bc 12,30,0x10005118
+ 54: Js30o $0x10005118
+
+
+
+. 3427 100050D8 52
+. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 90 01 00 24 93 E1 00 1C 83 BE 01 EC 80 7D 00 00 80 03 00 00 54 00 DF FE 33 E0 FF FF 7F FF F9 10 2F 9F 00 00 41 9E 00 10
+==== BB 3428 (0x1000510C) approx BBs exec'd 0 ====
+
+ 0x1000510C: 48015A31 bl 0x1001AB3C
+ 0: MOVL $0x10005110, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x1001AB3C ($4)
+
+
+
+. 3428 1000510C 4
+. 48 01 5A 31
+==== BB 3429 (0x1001AB3C) approx BBs exec'd 0 ====
+
+ 0x1001AB3C: 39600004 li r11,4
+ 0: MOVL $0x4, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AB40: 4BFFFFCC b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 3429 1001AB3C 8
+. 39 60 00 04 4B FF FF CC
+==== BB 3430 __fpending(0xFEC731C) approx BBs exec'd 0 ====
+
+ 0xFEC731C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEC7320: 80030060 lwz r0,96(r3)
+ 6: GETL R3, t4
+ 7: ADDL $0x60, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0xFEC7324: 2F800000 cmpi cr7,r0,0
+ 11: GETL R0, t8
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFEC7328: 409D0020 bc 4,29,0xFEC7348
+ 15: Jc29o $0xFEC7348
+
+
+
+. 3430 FEC731C 16
+. 94 21 FF F0 80 03 00 60 2F 80 00 00 40 9D 00 20
+==== BB 3431 (0xFEC7348) approx BBs exec'd 0 ====
+
+ 0xFEC7348: 80A30010 lwz r5,16(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFEC734C: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFEC7350: 80C30014 lwz r6,20(r3)
+ 9: GETL R3, t6
+ 10: ADDL $0x14, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R6
+ 13: INCEIPL $4
+
+ 0xFEC7354: 7C653050 subf r3,r5,r6
+ 14: GETL R5, t10
+ 15: GETL R6, t12
+ 16: SUBL t10, t12
+ 17: PUTL t12, R3
+ 18: INCEIPL $4
+
+ 0xFEC7358: 4E800020 blr
+ 19: GETL LR, t14
+ 20: JMPo-r t14 ($4)
+
+
+
+. 3431 FEC7348 20
+. 80 A3 00 10 38 21 00 10 80 C3 00 14 7C 65 30 50 4E 80 00 20
+==== BB 3432 (0x10005110) approx BBs exec'd 0 ====
+
+ 0x10005110: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10005114: 419E0074 bc 12,30,0x10005188
+ 4: Js30o $0x10005188
+
+
+
+. 3432 10005110 8
+. 2F 83 00 00 41 9E 00 74
+==== BB 3433 (0x10005118) approx BBs exec'd 0 ====
+
+ 0x10005118: 807D0000 lwz r3,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x1000511C: 48015B49 bl 0x1001AC64
+ 4: MOVL $0x10005120, t4
+ 5: PUTL t4, LR
+ 6: JMPo-c $0x1001AC64 ($4)
+
+
+
+. 3433 10005118 8
+. 80 7D 00 00 48 01 5B 49
+==== BB 3434 (0x1001AC64) approx BBs exec'd 0 ====
+
+ 0x1001AC64: 39600098 li r11,152
+ 0: MOVL $0x98, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x1001AC68: 4BFFFEA4 b 0x1001AB0C
+ 3: JMPo $0x1001AB0C ($4)
+
+
+
+. 3434 1001AC64 8
+. 39 60 00 98 4B FF FE A4
+==== BB 3435 (0xFECAF18) approx BBs exec'd 0 ====
+
+ 0xFECAF18: 807F0048 lwz r3,72(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECAF1C: 3B828BA0 addi r28,r2,-29792
+ 5: GETL R2, t4
+ 6: ADDL $0xFFFF8BA0, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0xFECAF20: 80830008 lwz r4,8(r3)
+ 9: GETL R3, t6
+ 10: ADDL $0x8, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0xFECAF24: 7F04E000 cmp cr6,r4,r28
+ 14: GETL R4, t10
+ 15: GETL R28, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0xFECAF28: 419A0034 bc 12,26,0xFECAF5C
+ 19: Js26o $0xFECAF5C
+
+
+
+. 3435 FECAF18 20
+. 80 7F 00 48 3B 82 8B A0 80 83 00 08 7F 04 E0 00 41 9A 00 34
+==== BB 3436 (0xFECAF2C) approx BBs exec'd 0 ====
+
+ 0xFECAF2C: 39600000 li r11,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFECAF30: 38A00001 li r5,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFECAF34: 7D201828 lwarx r9,r0,r3
+ 6: GETL R3, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0xFECAF38: 7C095800 cmp cr0,r9,r11
+ 11: GETL R9, t8
+ 12: GETL R11, t10
+ 13: CMPL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x0, CR
+ 15: INCEIPL $4
+
+ 0xFECAF3C: 4082000C bc 4,2,0xFECAF48
+ 16: Jc02o $0xFECAF48
+
+
+
+. 3436 FECAF2C 20
+. 39 60 00 00 38 A0 00 01 7D 20 18 28 7C 09 58 00 40 82 00 0C
+==== BB 3437 (0xFECAF40) approx BBs exec'd 0 ====
+
+ 0xFECAF40: 7CA0192D stwcx. r5,r0,r3
+ 0: GETL R3, t0
+ 1: GETL R5, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECAF44: 40A2FFF0 bc 5,2,0xFECAF34
+ 6: Jc02o $0xFECAF34
+
+
+
+. 3437 FECAF40 8
+. 7C A0 19 2D 40 A2 FF F0
+==== BB 3438 (0xFECAF34) approx BBs exec'd 0 ====
+
+ 0xFECAF34: 7D201828 lwarx r9,r0,r3
+ 0: GETL R3, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFECAF38: 7C095800 cmp cr0,r9,r11
+ 5: GETL R9, t4
+ 6: GETL R11, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECAF3C: 4082000C bc 4,2,0xFECAF48
+ 10: Jc02o $0xFECAF48
+
+
+
+. 3438 FECAF34 12
+. 7D 20 18 28 7C 09 58 00 40 82 00 0C
+==== BB 3439 (0xFECAF48) approx BBs exec'd 0 ====
+
+ 0xFECAF48: 4C00012C 0: INCEIPL $4
+
+ 0xFECAF4C: 2F890000 cmpi cr7,r9,0
+ 1: GETL R9, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFECAF50: 409E01BC bc 4,30,0xFECB10C
+ 5: Jc30o $0xFECB10C
+
+
+
+. 3439 FECAF48 12
+. 4C 00 01 2C 2F 89 00 00 40 9E 01 BC
+==== BB 3440 (0xFECAF54) approx BBs exec'd 0 ====
+
+ 0xFECAF54: 807F0048 lwz r3,72(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECAF58: 93830008 stw r28,8(r3)
+ 5: GETL R28, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECAF5C: 80E30004 lwz r7,4(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R7
+ 14: INCEIPL $4
+
+ 0xFECAF60: 38C70001 addi r6,r7,1
+ 15: GETL R7, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R6
+ 18: INCEIPL $4
+
+ 0xFECAF64: 90C30004 stw r6,4(r3)
+ 19: GETL R6, t14
+ 20: GETL R3, t16
+ 21: ADDL $0x4, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFECAF68: 815E1BEC lwz r10,7148(r30)
+ 24: GETL R30, t18
+ 25: ADDL $0x1BEC, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R10
+ 28: INCEIPL $4
+
+ 0xFECAF6C: 812A0000 lwz r9,0(r10)
+ 29: GETL R10, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R9
+ 32: INCEIPL $4
+
+ 0xFECAF70: 2F890000 cmpi cr7,r9,0
+ 33: GETL R9, t26
+ 34: CMP0L t26, t28 (-rSo)
+ 35: ICRFL t28, $0x7, CR
+ 36: INCEIPL $4
+
+ 0xFECAF74: 419E0020 bc 12,30,0xFECAF94
+ 37: Js30o $0xFECAF94
+
+
+
+. 3440 FECAF54 36
+. 80 7F 00 48 93 83 00 08 80 E3 00 04 38 C7 00 01 90 C3 00 04 81 5E 1B EC 81 2A 00 00 2F 89 00 00 41 9E 00 20
+==== BB 3441 (0xFECAF80) approx BBs exec'd 0 ====
+
+ 0xFECAF80: 80690034 lwz r3,52(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECAF84: 39490034 addi r10,r9,52
+ 5: GETL R9, t4
+ 6: ADDL $0x34, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0xFECAF88: 2F830000 cmpi cr7,r3,0
+ 9: GETL R3, t6
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFECAF8C: 7C691B78 or r9,r3,r3
+ 13: GETL R3, t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0xFECAF90: 409EFFE8 bc 4,30,0xFECAF78
+ 16: Jc30o $0xFECAF78
+
+
+
+. 3441 FECAF80 20
+. 80 69 00 34 39 49 00 34 2F 83 00 00 7C 69 1B 78 40 9E FF E8
+==== BB 3442 (0xFECAFA8) approx BBs exec'd 0 ====
+
+ 0xFECAFA8: 807F0048 lwz r3,72(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECAFAC: 83E30004 lwz r31,4(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0xFECAFB0: 393FFFFF addi r9,r31,-1
+ 10: GETL R31, t8
+ 11: ADDL $0xFFFFFFFF, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0xFECAFB4: 2F090000 cmpi cr6,r9,0
+ 14: GETL R9, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x6, CR
+ 17: INCEIPL $4
+
+ 0xFECAFB8: 91230004 stw r9,4(r3)
+ 18: GETL R9, t14
+ 19: GETL R3, t16
+ 20: ADDL $0x4, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFECAFBC: 419A00CC bc 12,26,0xFECB088
+ 23: Js26o $0xFECB088
+
+
+
+. 3442 FECAFA8 24
+. 80 7F 00 48 83 E3 00 04 39 3F FF FF 2F 09 00 00 91 23 00 04 41 9A 00 CC
+==== BB 3443 (0xFECB088) approx BBs exec'd 0 ====
+
+ 0xFECB088: 91230008 stw r9,8(r3)
+ 0: GETL R9, t0
+ 1: GETL R3, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECB08C: 7C0004AC sync
+ 5: INCEIPL $4
+
+ 0xFECB090: 7F801828 lwarx r28,r0,r3
+ 6: GETL R3, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R28
+ 10: INCEIPL $4
+
+ 0xFECB094: 7D20192D stwcx. r9,r0,r3
+ 11: GETL R3, t8
+ 12: GETL R9, t10
+ 13: LOCKo
+ 14: STL t10, (t8) (-rSo)
+ 15: ICRFL cr, $0x0, CR
+ 16: INCEIPL $4
+
+ 0xFECB098: 40A2FFF8 bc 5,2,0xFECB090
+ 17: Jc02o $0xFECB090
+
+
+
+. 3443 FECB088 20
+. 91 23 00 08 7C 00 04 AC 7F 80 18 28 7D 20 19 2D 40 A2 FF F8
+==== BB 3444 (0xFECB09C) approx BBs exec'd 0 ====
+
+ 0xFECB09C: 2F9C0001 cmpi cr7,r28,1
+ 0: GETL R28, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFECB0A0: 409DFF20 bc 4,29,0xFECAFC0
+ 5: Jc29o $0xFECAFC0
+
+
+
+. 3444 FECB09C 8
+. 2F 9C 00 01 40 9D FF 20
+==== BB 3445 (0xFEBB904) approx BBs exec'd 0 ====
+
+ 0xFEBB904: 807D0048 lwz r3,72(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEBB908: 3B828BA0 addi r28,r2,-29792
+ 5: GETL R2, t4
+ 6: ADDL $0xFFFF8BA0, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0xFEBB90C: 80A30008 lwz r5,8(r3)
+ 9: GETL R3, t6
+ 10: ADDL $0x8, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0xFEBB910: 7C85E000 cmp cr1,r5,r28
+ 14: GETL R5, t10
+ 15: GETL R28, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x1, CR
+ 18: INCEIPL $4
+
+ 0xFEBB914: 41860030 bc 12,6,0xFEBB944
+ 19: Js06o $0xFEBB944
+
+
+
+. 3445 FEBB904 20
+. 80 7D 00 48 3B 82 8B A0 80 A3 00 08 7C 85 E0 00 41 86 00 30
+==== BB 3446 (0xFEBB918) approx BBs exec'd 0 ====
+
+ 0xFEBB918: 38C00001 li r6,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0xFEBB91C: 7D201828 lwarx r9,r0,r3
+ 3: GETL R3, t2
+ 4: LOCKo
+ 5: LDL (t2), t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0xFEBB920: 7C09F800 cmp cr0,r9,r31
+ 8: GETL R9, t6
+ 9: GETL R31, t8
+ 10: CMPL t6, t8, t10 (-rSo)
+ 11: ICRFL t10, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFEBB924: 4082000C bc 4,2,0xFEBB930
+ 13: Jc02o $0xFEBB930
+
+
+
+. 3446 FEBB918 16
+. 38 C0 00 01 7D 20 18 28 7C 09 F8 00 40 82 00 0C
+==== BB 3447 (0xFEBB928) approx BBs exec'd 0 ====
+
+ 0xFEBB928: 7CC0192D stwcx. r6,r0,r3
+ 0: GETL R3, t0
+ 1: GETL R6, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEBB92C: 40A2FFF0 bc 5,2,0xFEBB91C
+ 6: Jc02o $0xFEBB91C
+
+
+
+. 3447 FEBB928 8
+. 7C C0 19 2D 40 A2 FF F0
+==== BB 3448 (0xFEBB91C) approx BBs exec'd 0 ====
+
+ 0xFEBB91C: 7D201828 lwarx r9,r0,r3
+ 0: GETL R3, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEBB920: 7C09F800 cmp cr0,r9,r31
+ 5: GETL R9, t4
+ 6: GETL R31, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEBB924: 4082000C bc 4,2,0xFEBB930
+ 10: Jc02o $0xFEBB930
+
+
+
+. 3448 FEBB91C 12
+. 7D 20 18 28 7C 09 F8 00 40 82 00 0C
+==== BB 3449 (0xFEBB930) approx BBs exec'd 0 ====
+
+ 0xFEBB930: 4C00012C 0: INCEIPL $4
+
+ 0xFEBB934: 2F090000 cmpi cr6,r9,0
+ 1: GETL R9, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0xFEBB938: 409A0250 bc 4,26,0xFEBBB88
+ 5: Jc26o $0xFEBBB88
+
+
+
+. 3449 FEBB930 12
+. 4C 00 01 2C 2F 09 00 00 40 9A 02 50
+==== BB 3450 (0xFEBB93C) approx BBs exec'd 0 ====
+
+ 0xFEBB93C: 807D0048 lwz r3,72(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEBB940: 93830008 stw r28,8(r3)
+ 5: GETL R28, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFEBB944: 81030004 lwz r8,4(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R8
+ 14: INCEIPL $4
+
+ 0xFEBB948: 38E80001 addi r7,r8,1
+ 15: GETL R8, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0xFEBB94C: 90E30004 stw r7,4(r3)
+ 19: GETL R7, t14
+ 20: GETL R3, t16
+ 21: ADDL $0x4, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0xFEBB950: 801D0000 lwz r0,0(r29)
+ 24: GETL R29, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R0
+ 27: INCEIPL $4
+
+ 0xFEBB954: 540ADFFE rlwinm r10,r0,27,31,31
+ 28: GETL R0, t22
+ 29: ROLL $0x1B, t22
+ 30: ANDL $0x1, t22
+ 31: PUTL t22, R10
+ 32: INCEIPL $4
+
+ 0xFEBB958: 70092000 andi. r9,r0,0x2000
+ 33: GETL R0, t24
+ 34: ANDL $0x2000, t24
+ 35: PUTL t24, R9
+ 36: CMP0L t24, t26 (-rSo)
+ 37: ICRFL t26, $0x0, CR
+ 38: INCEIPL $4
+
+ 0xFEBB95C: 2F8A0000 cmpi cr7,r10,0
+ 39: GETL R10, t28
+ 40: CMP0L t28, t30 (-rSo)
+ 41: ICRFL t30, $0x7, CR
+ 42: INCEIPL $4
+
+ 0xFEBB960: 7C600026 mfcr r3
+ 43: GETL CR, t32
+ 44: PUTL t32, R3
+ 45: INCEIPL $4
+
+ 0xFEBB964: 5463FFFE rlwinm r3,r3,31,31,31
+ 46: GETL R3, t34
+ 47: ROLL $0x1F, t34
+ 48: ANDL $0x1, t34
+ 49: PUTL t34, R3
+ 50: INCEIPL $4
+
+ 0xFEBB968: 3B43FFFF addi r26,r3,-1
+ 51: GETL R3, t36
+ 52: ADDL $0xFFFFFFFF, t36
+ 53: PUTL t36, R26
+ 54: INCEIPL $4
+
+ 0xFEBB96C: 4082013C bc 4,2,0xFEBBAA8
+ 55: Jc02o $0xFEBBAA8
+
+
+
+. 3450 FEBB93C 52
+. 80 7D 00 48 93 83 00 08 81 03 00 04 38 E8 00 01 90 E3 00 04 80 1D 00 00 54 0A DF FE 70 09 20 00 2F 8A 00 00 7C 60 00 26 54 63 FF FE 3B 43 FF FF 40 82 01 3C
+==== BB 3451 (0xFEC83B0) approx BBs exec'd 0 ====
+
+ 0xFEC83B0: 70090800 andi. r9,r0,0x800
+ 0: GETL R0, t0
+ 1: ANDL $0x800, t0
+ 2: PUTL t0, R9
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEC83B4: 41A2FF18 bc 13,2,0xFEC82CC
+ 6: Js02o $0xFEC82CC
+
+
+
+. 3451 FEC83B0 8
+. 70 09 08 00 41 A2 FF 18
+==== BB 3452 (0xFEC83B8) approx BBs exec'd 0 ====
+
+ 0xFEC83B8: 80A30060 lwz r5,96(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFEC83BC: 2C850000 cmpi cr1,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0xFEC83C0: 40850098 bc 4,5,0xFEC8458
+ 9: Jc05o $0xFEC8458
+
+
+
+. 3452 FEC83B8 12
+. 80 A3 00 60 2C 85 00 00 40 85 00 98
+==== BB 3453 (0xFEC8458) approx BBs exec'd 0 ====
+
+ 0xFEC8458: 80830010 lwz r4,16(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFEC845C: 80C30014 lwz r6,20(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0xFEC8460: 7CA43050 subf r5,r4,r6
+ 10: GETL R4, t8
+ 11: GETL R6, t10
+ 12: SUBL t8, t10
+ 13: PUTL t10, R5
+ 14: INCEIPL $4
+
+ 0xFEC8464: 480008C5 bl 0xFEC8D28
+ 15: MOVL $0xFEC8468, t12
+ 16: PUTL t12, LR
+ 17: JMPo-c $0xFEC8D28 ($4)
+
+
+
+. 3453 FEC8458 16
+. 80 83 00 10 80 C3 00 14 7C A4 30 50 48 00 08 C5
+==== BB 3454 (0xFEC8D58) approx BBs exec'd 0 ====
+
+ 0xFEC8D58: 80830000 lwz r4,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0xFEC8D5C: 70891000 andi. r9,r4,0x1000
+ 4: GETL R4, t4
+ 5: ANDL $0x1000, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEC8D60: 418200C0 bc 12,2,0xFEC8E20
+ 10: Js02o $0xFEC8E20
+
+
+
+. 3454 FEC8D58 12
+. 80 83 00 00 70 89 10 00 41 82 00 C0
+==== BB 3455 (0xFEC8E20) approx BBs exec'd 0 ====
+
+ 0xFEC8E20: 80030008 lwz r0,8(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEC8E24: 80A30010 lwz r5,16(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0xFEC8E28: 7F802800 cmp cr7,r0,r5
+ 10: GETL R0, t8
+ 11: GETL R5, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFEC8E2C: 41BEFF48 bc 13,30,0xFEC8D74
+ 15: Js30o $0xFEC8D74
+
+
+
+. 3455 FEC8E20 16
+. 80 03 00 08 80 A3 00 10 7F 80 28 00 41 BE FF 48
+==== BB 3456 (0xFEC8D74) approx BBs exec'd 0 ====
+
+ 0xFEC8D74: 891F0046 lbz r8,70(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFEC8D78: 7F84E378 or r4,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFEC8D7C: 7FE3FB78 or r3,r31,r31
+ 8: GETL R31, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFEC8D80: 7F65DB78 or r5,r27,r27
+ 11: GETL R27, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0xFEC8D84: 7D070774 extsb r7,r8
+ 14: GETB R8, t10
+ 15: WIDENL_Bs _st10
+ 16: PUTL t10, R7
+ 17: INCEIPL $4
+
+ 0xFEC8D88: 7D27FA14 add r9,r7,r31
+ 18: GETL R7, t12
+ 19: GETL R31, t14
+ 20: ADDL t12, t14
+ 21: PUTL t14, R9
+ 22: INCEIPL $4
+
+ 0xFEC8D8C: 81690098 lwz r11,152(r9)
+ 23: GETL R9, t16
+ 24: ADDL $0x98, t16
+ 25: LDL (t16), t18
+ 26: PUTL t18, R11
+ 27: INCEIPL $4
+
+ 0xFEC8D90: 83AB003C lwz r29,60(r11)
+ 28: GETL R11, t20
+ 29: ADDL $0x3C, t20
+ 30: LDL (t20), t22
+ 31: PUTL t22, R29
+ 32: INCEIPL $4
+
+ 0xFEC8D94: 7FA903A6 mtctr r29
+ 33: GETL R29, t24
+ 34: PUTL t24, CTR
+ 35: INCEIPL $4
+
+ 0xFEC8D98: 4E800421 bctrl
+ 36: MOVL $0xFEC8D9C, t26
+ 37: PUTL t26, LR
+ 38: GETL CTR, t28
+ 39: JMPo-c t28 ($4)
+
+
+
+. 3456 FEC8D74 40
+. 89 1F 00 46 7F 84 E3 78 7F E3 FB 78 7F 65 DB 78 7D 07 07 74 7D 27 FA 14 81 69 00 98 83 AB 00 3C 7F A9 03 A6 4E 80 04 21
+==== BB 3457 _IO_file_write@@GLIBC_2.1(0xFECA570) approx BBs exec'd 0 ====
+
+ 0xFECA570: 2F850000 cmpi cr7,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFECA574: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFECA578: 9421FFE0 stwu r1,-32(r1)
+ 7: GETL R1, t6
+ 8: GETL R1, t8
+ 9: ADDL $0xFFFFFFE0, t8
+ 10: PUTL t8, R1
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFECA57C: 9361000C stw r27,12(r1)
+ 13: GETL R27, t10
+ 14: GETL R1, t12
+ 15: ADDL $0xC, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFECA580: 7CBB2B78 or r27,r5,r5
+ 18: GETL R5, t14
+ 19: PUTL t14, R27
+ 20: INCEIPL $4
+
+ 0xFECA584: 93810010 stw r28,16(r1)
+ 21: GETL R28, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x10, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFECA588: 7C7C1B78 or r28,r3,r3
+ 26: GETL R3, t20
+ 27: PUTL t20, R28
+ 28: INCEIPL $4
+
+ 0xFECA58C: 93A10014 stw r29,20(r1)
+ 29: GETL R29, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x14, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFECA590: 7C9D2378 or r29,r4,r4
+ 34: GETL R4, t26
+ 35: PUTL t26, R29
+ 36: INCEIPL $4
+
+ 0xFECA594: 93E1001C stw r31,28(r1)
+ 37: GETL R31, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x1C, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0xFECA598: 7CBF2B78 or r31,r5,r5
+ 42: GETL R5, t32
+ 43: PUTL t32, R31
+ 44: INCEIPL $4
+
+ 0xFECA59C: 93C10018 stw r30,24(r1)
+ 45: GETL R30, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x18, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0xFECA5A0: 90010024 stw r0,36(r1)
+ 50: GETL R0, t38
+ 51: GETL R1, t40
+ 52: ADDL $0x24, t40
+ 53: STL t38, (t40)
+ 54: INCEIPL $4
+
+ 0xFECA5A4: 409D003C bc 4,29,0xFECA5E0
+ 55: Jc29o $0xFECA5E0
+
+
+
+. 3457 FECA570 56
+. 2F 85 00 00 7C 08 02 A6 94 21 FF E0 93 61 00 0C 7C BB 2B 78 93 81 00 10 7C 7C 1B 78 93 A1 00 14 7C 9D 23 78 93 E1 00 1C 7C BF 2B 78 93 C1 00 18 90 01 00 24 40 9D 00 3C
+==== BB 3458 (0xFECA5A8) approx BBs exec'd 0 ====
+
+ 0xFECA5A8: 807C003C lwz r3,60(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x3C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECA5AC: 7FA4EB78 or r4,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFECA5B0: 7FE5FB78 or r5,r31,r31
+ 8: GETL R31, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0xFECA5B4: 70690002 andi. r9,r3,0x2
+ 11: GETL R3, t8
+ 12: ANDL $0x2, t8
+ 13: PUTL t8, R9
+ 14: CMP0L t8, t10 (-rSo)
+ 15: ICRFL t10, $0x0, CR
+ 16: INCEIPL $4
+
+ 0xFECA5B8: 4082007C bc 4,2,0xFECA634
+ 17: Jc02o $0xFECA634
+
+
+
+. 3458 FECA5A8 20
+. 80 7C 00 3C 7F A4 EB 78 7F E5 FB 78 70 69 00 02 40 82 00 7C
+==== BB 3459 (0xFECA5BC) approx BBs exec'd 0 ====
+
+ 0xFECA5BC: 807C0038 lwz r3,56(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x38, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECA5C0: 7FA4EB78 or r4,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFECA5C4: 7FE5FB78 or r5,r31,r31
+ 8: GETL R31, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0xFECA5C8: 48057A11 bl 0xFF21FD8
+ 11: MOVL $0xFECA5CC, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0xFF21FD8 ($4)
+
+
+
+. 3459 FECA5BC 16
+. 80 7C 00 38 7F A4 EB 78 7F E5 FB 78 48 05 7A 11
+==== BB 3460 write(0xFF21FD8) approx BBs exec'd 0 ====
+
+ 0xFF21FD8: 81428BA0 lwz r10,-29792(r2)
+ 0: GETL R2, t0
+ 1: ADDL $0xFFFF8BA0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFF21FDC: 2C0A0000 cmpi cr0,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFF21FE0: 40820014 bc 4,2,0xFF21FF4
+ 9: Jc02o $0xFF21FF4
+
+
+
+. 3460 FF21FD8 12
+. 81 42 8B A0 2C 0A 00 00 40 82 00 14
+==== BB 3461 __write_nocancel(0xFF21FE4) approx BBs exec'd 0 ====
+
+ 0xFF21FE4: 38000004 li r0,4
+ 0: MOVL $0x4, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFF21FE8: 44000002 sc
+ 3: JMPo-sys $0xFF21FEC ($4)
+
+
+
+. 3461 FF21FE4 8
+. 38 00 00 04 44 00 00 02
+Wed Jan 12 11:03:06 GMT 2005
+==== BB 3462 (0xFF21FEC) approx BBs exec'd 0 ====
+
+ 0xFF21FEC: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+
+. 3462 FF21FEC 4
+. 4C A3 00 20
+==== BB 3463 (0xFECA5CC) approx BBs exec'd 0 ====
+
+ 0xFECA5CC: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFECA5D0: 7FBD1A14 add r29,r29,r3
+ 4: GETL R29, t4
+ 5: GETL R3, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R29
+ 8: INCEIPL $4
+
+ 0xFECA5D4: 41840074 bc 12,4,0xFECA648
+ 9: Js04o $0xFECA648
+
+
+
+. 3463 FECA5CC 12
+. 2C 83 00 00 7F BD 1A 14 41 84 00 74
+==== BB 3464 (0xFECA5D8) approx BBs exec'd 0 ====
+
+ 0xFECA5D8: 7FE3F851 subf. r31,r3,r31
+ 0: GETL R3, t0
+ 1: GETL R31, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R31
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFECA5DC: 4181FFCC bc 12,1,0xFECA5A8
+ 7: Js01o $0xFECA5A8
+
+
+
+. 3464 FECA5D8 8
+. 7F E3 F8 51 41 81 FF CC
+==== BB 3465 (0xFECA5E0) approx BBs exec'd 0 ====
+
+ 0xFECA5E0: 80DC0050 lwz r6,80(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFECA5E4: 7C7FD850 subf r3,r31,r27
+ 5: GETL R31, t4
+ 6: GETL R27, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFECA5E8: 2F060000 cmpi cr6,r6,0
+ 10: GETL R6, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFECA5EC: 41980024 bc 12,24,0xFECA610
+ 14: Js24o $0xFECA610
+
+
+
+. 3465 FECA5E0 16
+. 80 DC 00 50 7C 7F D8 50 2F 06 00 00 41 98 00 24
+==== BB 3466 (0xFECA610) approx BBs exec'd 0 ====
+
+ 0xFECA610: 80E10024 lwz r7,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0xFECA614: 8361000C lwz r27,12(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R27
+ 9: INCEIPL $4
+
+ 0xFECA618: 83810010 lwz r28,16(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R28
+ 14: INCEIPL $4
+
+ 0xFECA61C: 7CE803A6 mtlr r7
+ 15: GETL R7, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFECA620: 83A10014 lwz r29,20(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R29
+ 22: INCEIPL $4
+
+ 0xFECA624: 83C10018 lwz r30,24(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x18, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R30
+ 27: INCEIPL $4
+
+ 0xFECA628: 83E1001C lwz r31,28(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x1C, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R31
+ 32: INCEIPL $4
+
+ 0xFECA62C: 38210020 addi r1,r1,32
+ 33: GETL R1, t26
+ 34: ADDL $0x20, t26
+ 35: PUTL t26, R1
+ 36: INCEIPL $4
+
+ 0xFECA630: 4E800020 blr
+ 37: GETL LR, t28
+ 38: JMPo-r t28 ($4)
+
+
+
+. 3466 FECA610 36
+. 80 E1 00 24 83 61 00 0C 83 81 00 10 7C E8 03 A6 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 3467 (0xFEC8D9C) approx BBs exec'd 0 ====
+
+ 0xFEC8D9C: 7C7D1B78 or r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFEC8DA0: A07F0044 lhz r3,68(r31)
+ 3: GETL R31, t2
+ 4: ADDL $0x44, t2
+ 5: LDW (t2), t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEC8DA4: 301DFFFF addic r0,r29,-1
+ 8: GETL R29, t6
+ 9: ADCL $0xFFFFFFFF, t6 (-wCa)
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0xFEC8DA8: 7C80E910 subfe r4,r0,r29
+ 12: GETL R0, t8
+ 13: GETL R29, t10
+ 14: SBBL t8, t10 (-rCa-wCa)
+ 15: PUTL t10, R4
+ 16: INCEIPL $4
+
+ 0xFEC8DAC: 7D4300D0 neg r10,r3
+ 17: GETL R3, t12
+ 18: NEGL t12
+ 19: PUTL t12, R10
+ 20: INCEIPL $4
+
+ 0xFEC8DB0: 55400FFE rlwinm r0,r10,1,31,31
+ 21: GETL R10, t14
+ 22: SHRL $0x1F, t14
+ 23: PUTL t14, R0
+ 24: INCEIPL $4
+
+ 0xFEC8DB4: 7C0B2039 and. r11,r0,r4
+ 25: GETL R0, t16
+ 26: GETL R4, t18
+ 27: ANDL t16, t18
+ 28: PUTL t18, R11
+ 29: CMP0L t18, t20 (-rSo)
+ 30: ICRFL t20, $0x0, CR
+ 31: INCEIPL $4
+
+ 0xFEC8DB8: 408200CC bc 4,2,0xFEC8E84
+ 32: Jc02o $0xFEC8E84
+
+
+
+. 3467 FEC8D9C 32
+. 7C 7D 1B 78 A0 7F 00 44 30 1D FF FF 7C 80 E9 10 7D 43 00 D0 55 40 0F FE 7C 0B 20 39 40 82 00 CC
+==== BB 3468 (0xFEC8DBC) approx BBs exec'd 0 ====
+
+ 0xFEC8DBC: 839F0060 lwz r28,96(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0xFEC8DC0: 813F001C lwz r9,28(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFEC8DC4: 2F9C0000 cmpi cr7,r28,0
+ 10: GETL R28, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0xFEC8DC8: 913F000C stw r9,12(r31)
+ 14: GETL R9, t12
+ 15: GETL R31, t14
+ 16: ADDL $0xC, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0xFEC8DCC: 913F0004 stw r9,4(r31)
+ 19: GETL R9, t16
+ 20: GETL R31, t18
+ 21: ADDL $0x4, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0xFEC8DD0: 913F0008 stw r9,8(r31)
+ 24: GETL R9, t20
+ 25: GETL R31, t22
+ 26: ADDL $0x8, t22
+ 27: STL t20, (t22)
+ 28: INCEIPL $4
+
+ 0xFEC8DD4: 913F0014 stw r9,20(r31)
+ 29: GETL R9, t24
+ 30: GETL R31, t26
+ 31: ADDL $0x14, t26
+ 32: STL t24, (t26)
+ 33: INCEIPL $4
+
+ 0xFEC8DD8: 913F0010 stw r9,16(r31)
+ 34: GETL R9, t28
+ 35: GETL R31, t30
+ 36: ADDL $0x10, t30
+ 37: STL t28, (t30)
+ 38: INCEIPL $4
+
+ 0xFEC8DDC: 409D0094 bc 4,29,0xFEC8E70
+ 39: Jc29o $0xFEC8E70
+
+
+
+. 3468 FEC8DBC 36
+. 83 9F 00 60 81 3F 00 1C 2F 9C 00 00 91 3F 00 0C 91 3F 00 04 91 3F 00 08 91 3F 00 14 91 3F 00 10 40 9D 00 94
+==== BB 3469 (0xFEC8E70) approx BBs exec'd 0 ====
+
+ 0xFEC8E70: 80BF0000 lwz r5,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFEC8E74: 70AB0202 andi. r11,r5,0x202
+ 4: GETL R5, t4
+ 5: ANDL $0x202, t4
+ 6: PUTL t4, R11
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEC8E78: 40A2FF6C bc 5,2,0xFEC8DE4
+ 10: Jc02o $0xFEC8DE4
+
+
+
+. 3469 FEC8E70 12
+. 80 BF 00 00 70 AB 02 02 40 A2 FF 6C
+==== BB 3470 (0xFEC8E7C) approx BBs exec'd 0 ====
+
+ 0xFEC8E7C: 813F0020 lwz r9,32(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEC8E80: 4BFFFF64 b 0xFEC8DE4
+ 5: JMPo $0xFEC8DE4 ($4)
+
+
+
+. 3470 FEC8E7C 8
+. 81 3F 00 20 4B FF FF 64
+==== BB 3471 (0xFEC8DE4) approx BBs exec'd 0 ====
+
+ 0xFEC8DE4: 913F0018 stw r9,24(r31)
+ 0: GETL R9, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEC8DE8: 7FA5EB78 or r5,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFEC8DEC: 7C85D800 cmp cr1,r5,r27
+ 8: GETL R5, t6
+ 9: GETL R27, t8
+ 10: CMPL t6, t8, t10 (-rSo)
+ 11: ICRFL t10, $0x1, CR
+ 12: INCEIPL $4
+
+ 0xFEC8DF0: 3860FFFF li r3,-1
+ 13: MOVL $0xFFFFFFFF, t12
+ 14: PUTL t12, R3
+ 15: INCEIPL $4
+
+ 0xFEC8DF4: 40A60008 bc 5,6,0xFEC8DFC
+ 16: Jc06o $0xFEC8DFC
+
+
+
+. 3471 FEC8DE4 20
+. 91 3F 00 18 7F A5 EB 78 7C 85 D8 00 38 60 FF FF 40 A6 00 08
+==== BB 3472 (0xFEC8468) approx BBs exec'd 0 ====
+
+ 0xFEC8468: 7C7C1B78 or r28,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0xFEC846C: 4BFFFF74 b 0xFEC83E0
+ 3: JMPo $0xFEC83E0 ($4)
+
+
+
+. 3472 FEC8468 8
+. 7C 7C 1B 78 4B FF FF 74
+==== BB 3473 (0xFEC83E0) approx BBs exec'd 0 ====
+
+ 0xFEC83E0: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEC83E4: 48004A05 bl 0xFECCDE8
+ 3: MOVL $0xFEC83E8, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFECCDE8 ($4)
+
+
+
+. 3473 FEC83E0 8
+. 7F E3 FB 78 48 00 4A 05
+==== BB 3474 (0xFEC83E8) approx BBs exec'd 0 ====
+
+ 0xFEC83E8: 881F0046 lbz r0,70(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEC83EC: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEC83F0: 7C1D0774 extsb r29,r0
+ 8: GETB R0, t6
+ 9: WIDENL_Bs _st6
+ 10: PUTL t6, R29
+ 11: INCEIPL $4
+
+ 0xFEC83F4: 7D9DFA14 add r12,r29,r31
+ 12: GETL R29, t8
+ 13: GETL R31, t10
+ 14: ADDL t8, t10
+ 15: PUTL t10, R12
+ 16: INCEIPL $4
+
+ 0xFEC83F8: 814C0098 lwz r10,152(r12)
+ 17: GETL R12, t12
+ 18: ADDL $0x98, t12
+ 19: LDL (t12), t14
+ 20: PUTL t14, R10
+ 21: INCEIPL $4
+
+ 0xFEC83FC: 816A0044 lwz r11,68(r10)
+ 22: GETL R10, t16
+ 23: ADDL $0x44, t16
+ 24: LDL (t16), t18
+ 25: PUTL t18, R11
+ 26: INCEIPL $4
+
+ 0xFEC8400: 7D6903A6 mtctr r11
+ 27: GETL R11, t20
+ 28: PUTL t20, CTR
+ 29: INCEIPL $4
+
+ 0xFEC8404: 4E800421 bctrl
+ 30: MOVL $0xFEC8408, t22
+ 31: PUTL t22, LR
+ 32: GETL CTR, t24
+ 33: JMPo-c t24 ($4)
+
+
+
+. 3474 FEC83E8 32
+. 88 1F 00 46 7F E3 FB 78 7C 1D 07 74 7D 9D FA 14 81 4C 00 98 81 6A 00 44 7D 69 03 A6 4E 80 04 21
+==== BB 3475 (0xFEC8408) approx BBs exec'd 0 ====
+
+ 0xFEC8408: 7C7D1B78 or r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFEC840C: 807F0060 lwz r3,96(r31)
+ 3: GETL R31, t2
+ 4: ADDL $0x60, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEC8410: 2F030000 cmpi cr6,r3,0
+ 8: GETL R3, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFEC8414: 4199FEF4 bc 12,25,0xFEC8308
+ 12: Js25o $0xFEC8308
+
+
+
+. 3475 FEC8408 16
+. 7C 7D 1B 78 80 7F 00 60 2F 03 00 00 41 99 FE F4
+==== BB 3476 (0xFEBBAD0) approx BBs exec'd 0 ====
+
+ 0xFEBBAD0: 91230008 stw r9,8(r3)
+ 0: GETL R9, t0
+ 1: GETL R3, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEBBAD4: 7C0004AC sync
+ 5: INCEIPL $4
+
+ 0xFEBBAD8: 7CC01828 lwarx r6,r0,r3
+ 6: GETL R3, t4
+ 7: LOCKo
+ 8: LDL (t4), t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0xFEBBADC: 7D20192D stwcx. r9,r0,r3
+ 11: GETL R3, t8
+ 12: GETL R9, t10
+ 13: LOCKo
+ 14: STL t10, (t8) (-rSo)
+ 15: ICRFL cr, $0x0, CR
+ 16: INCEIPL $4
+
+ 0xFEBBAE0: 40A2FFF8 bc 5,2,0xFEBBAD8
+ 17: Jc02o $0xFEBBAD8
+
+
+
+. 3476 FEBBAD0 20
+. 91 23 00 08 7C 00 04 AC 7C C0 18 28 7D 20 19 2D 40 A2 FF F8
+==== BB 3477 (0xFEBBAE4) approx BBs exec'd 0 ====
+
+ 0xFEBBAE4: 2C860001 cmpi cr1,r6,1
+ 0: GETL R6, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFEBBAE8: 4085FEB8 bc 4,5,0xFEBB9A0
+ 5: Jc05o $0xFEBB9A0
+
+
+
+. 3477 FEBBAE4 8
+. 2C 86 00 01 40 85 FE B8
+==== BB 3478 (0x10005120) approx BBs exec'd 0 ====
+
+ 0x10005120: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x10005124: 409E0080 bc 4,30,0x100051A4
+ 4: Jc30o $0x100051A4
+
+
+
+. 3478 10005120 8
+. 2F 83 00 00 40 9E 00 80
+==== BB 3479 (0x10005128) approx BBs exec'd 0 ====
+
+ 0x10005128: 2F9F0000 cmpi cr7,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x1000512C: 809E0160 lwz r4,352(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x160, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x10005130: 38A00005 li r5,5
+ 9: MOVL $0x5, t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0x10005134: 38600000 li r3,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x10005138: 419C0050 bc 12,28,0x10005188
+ 15: Js28o $0x10005188
+
+
+
+. 3479 10005128 20
+. 2F 9F 00 00 80 9E 01 60 38 A0 00 05 38 60 00 00 41 9C 00 50
+==== BB 3480 (0x10005188) approx BBs exec'd 0 ====
+
+ 0x10005188: 80010024 lwz r0,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x1000518C: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x10005190: 83C10018 lwz r30,24(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R30
+ 14: INCEIPL $4
+
+ 0x10005194: 7C0803A6 mtlr r0
+ 15: GETL R0, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x10005198: 83E1001C lwz r31,28(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x1C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R31
+ 22: INCEIPL $4
+
+ 0x1000519C: 38210020 addi r1,r1,32
+ 23: GETL R1, t18
+ 24: ADDL $0x20, t18
+ 25: PUTL t18, R1
+ 26: INCEIPL $4
+
+ 0x100051A0: 4E800020 blr
+ 27: GETL LR, t20
+ 28: JMPo-r t20 ($4)
+
+
+
+. 3480 10005188 28
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 3481 (0xFE93C44) approx BBs exec'd 0 ====
+
+ 0xFE93C44: 815F0000 lwz r10,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFE93C48: 818A0004 lwz r12,4(r10)
+ 4: GETL R10, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R12
+ 8: INCEIPL $4
+
+ 0xFE93C4C: 2C8C0000 cmpi cr1,r12,0
+ 9: GETL R12, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x1, CR
+ 12: INCEIPL $4
+
+ 0xFE93C50: 4086FFAC bc 4,6,0xFE93BFC
+ 13: Jc06o $0xFE93BFC
+
+
+
+. 3481 FE93C44 16
+. 81 5F 00 00 81 8A 00 04 2C 8C 00 00 40 86 FF AC
+==== BB 3482 (0x10007AB4) approx BBs exec'd 0 ====
+
+ 0x10007AB4: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x10007AB8: 7CA802A6 mflr r5
+ 6: GETL LR, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x10007ABC: 429F0005 bcl 20,31,0x10007AC0
+ 9: MOVL $0x10007AC0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x10007AC0: 93C10018 stw r30,24(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x10007AC4: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0x10007AC8: 93E1001C stw r31,28(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x10007ACC: 93A10014 stw r29,20(r1)
+ 25: GETL R29, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0x10007AD0: 90A10024 stw r5,36(r1)
+ 30: GETL R5, t22
+ 31: GETL R1, t24
+ 32: ADDL $0x24, t24
+ 33: STL t22, (t24)
+ 34: INCEIPL $4
+
+ 0x10007AD4: 809EFFF0 lwz r4,-16(r30)
+ 35: GETL R30, t26
+ 36: ADDL $0xFFFFFFF0, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R4
+ 39: INCEIPL $4
+
+ 0x10007AD8: 7FC4F214 add r30,r4,r30
+ 40: GETL R4, t30
+ 41: GETL R30, t32
+ 42: ADDL t30, t32
+ 43: PUTL t32, R30
+ 44: INCEIPL $4
+
+ 0x10007ADC: 817E800C lwz r11,-32756(r30)
+ 45: GETL R30, t34
+ 46: ADDL $0xFFFF800C, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R11
+ 49: INCEIPL $4
+
+ 0x10007AE0: 807E8008 lwz r3,-32760(r30)
+ 50: GETL R30, t38
+ 51: ADDL $0xFFFF8008, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R3
+ 54: INCEIPL $4
+
+ 0x10007AE4: 7C0B1850 subf r0,r11,r3
+ 55: GETL R11, t42
+ 56: GETL R3, t44
+ 57: SUBL t42, t44
+ 58: PUTL t44, R0
+ 59: INCEIPL $4
+
+ 0x10007AE8: 7C091670 srawi r9,r0,2
+ 60: GETL R0, t46
+ 61: SARL $0x2, t46 (-wCa)
+ 62: PUTL t46, R9
+ 63: INCEIPL $4
+
+ 0x10007AEC: 2F890000 cmpi cr7,r9,0
+ 64: GETL R9, t48
+ 65: CMP0L t48, t50 (-rSo)
+ 66: ICRFL t50, $0x7, CR
+ 67: INCEIPL $4
+
+ 0x10007AF0: 3BE9FFFF addi r31,r9,-1
+ 68: GETL R9, t52
+ 69: ADDL $0xFFFFFFFF, t52
+ 70: PUTL t52, R31
+ 71: INCEIPL $4
+
+ 0x10007AF4: 419E0028 bc 12,30,0x10007B1C
+ 72: Js30o $0x10007B1C
+
+
+
+. 3482 10007AB4 68
+. 94 21 FF E0 7C A8 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 93 A1 00 14 90 A1 00 24 80 9E FF F0 7F C4 F2 14 81 7E 80 0C 80 7E 80 08 7C 0B 18 50 7C 09 16 70 2F 89 00 00 3B E9 FF FF 41 9E 00 28
+==== BB 3483 (0x10007B1C) approx BBs exec'd 0 ====
+
+ 0x10007B1C: 480002BD bl 0x10007DD8
+ 0: MOVL $0x10007B20, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x10007DD8 ($4)
+
+
+
+. 3483 10007B1C 4
+. 48 00 02 BD
+==== BB 3484 (0x10007DD8) approx BBs exec'd 0 ====
+
+ 0x10007DD8: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x10007DDC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x10007DE0: 90010024 stw r0,36(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x24, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x10007DE4: 4BFF9275 bl 0x10001058
+ 14: MOVL $0x10007DE8, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x10001058 ($4)
+
+
+
+. 3484 10007DD8 16
+. 94 21 FF E0 7C 08 02 A6 90 01 00 24 4B FF 92 75
+==== BB 3485 (0x10001058) approx BBs exec'd 0 ====
+
+ 0x10001058: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x1000105C: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x10001060: 93C10008 stw r30,8(r1)
+ 9: GETL R30, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x10001064: 3FC01002 lis r30,4098
+ 14: MOVL $0x10020000, t10
+ 15: PUTL t10, R30
+ 16: INCEIPL $4
+
+ 0x10001068: 93E1000C stw r31,12(r1)
+ 17: GETL R31, t12
+ 18: GETL R1, t14
+ 19: ADDL $0xC, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0x1000106C: 90010014 stw r0,20(r1)
+ 22: GETL R0, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x14, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0x10001070: 881EADD4 lbz r0,-21036(r30)
+ 27: MOVL $0x1001ADD4, t20
+ 28: LDB (t20), t22
+ 29: PUTL t22, R0
+ 30: INCEIPL $4
+
+ 0x10001074: 2F800000 cmpi cr7,r0,0
+ 31: GETL R0, t24
+ 32: CMP0L t24, t26 (-rSo)
+ 33: ICRFL t26, $0x7, CR
+ 34: INCEIPL $4
+
+ 0x10001078: 409E0034 bc 4,30,0x100010AC
+ 35: Jc30o $0x100010AC
+
+
+
+. 3485 10001058 36
+. 7C 08 02 A6 94 21 FF F0 93 C1 00 08 3F C0 10 02 93 E1 00 0C 90 01 00 14 88 1E AD D4 2F 80 00 00 40 9E 00 34
+==== BB 3486 (0x1000107C) approx BBs exec'd 0 ====
+
+ 0x1000107C: 3FE01002 lis r31,4098
+ 0: MOVL $0x10020000, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0x10001080: 48000014 b 0x10001094
+ 3: JMPo $0x10001094 ($4)
+
+
+
+. 3486 1000107C 8
+. 3F E0 10 02 48 00 00 14
+==== BB 3487 (0x10001094) approx BBs exec'd 0 ====
+
+ 0x10001094: 817FA898 lwz r11,-22376(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xFFFFA898, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x10001098: 812B0000 lwz r9,0(r11)
+ 5: GETL R11, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0x1000109C: 2F890000 cmpi cr7,r9,0
+ 9: GETL R9, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x100010A0: 409EFFE4 bc 4,30,0x10001084
+ 13: Jc30o $0x10001084
+
+
+
+. 3487 10001094 16
+. 81 7F A8 98 81 2B 00 00 2F 89 00 00 40 9E FF E4
+==== BB 3488 (0x100010A4) approx BBs exec'd 0 ====
+
+ 0x100010A4: 38000001 li r0,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x100010A8: 981EADD4 stb r0,-21036(r30)
+ 3: GETL R0, t2
+ 4: GETL R30, t4
+ 5: ADDL $0xFFFFADD4, t4
+ 6: STB t2, (t4)
+ 7: INCEIPL $4
+
+ 0x100010AC: 80010014 lwz r0,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x100010B0: 83C10008 lwz r30,8(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0x100010B4: 83E1000C lwz r31,12(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0xC, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R31
+ 22: INCEIPL $4
+
+ 0x100010B8: 7C0803A6 mtlr r0
+ 23: GETL R0, t18
+ 24: PUTL t18, LR
+ 25: INCEIPL $4
+
+ 0x100010BC: 38210010 addi r1,r1,16
+ 26: GETL R1, t20
+ 27: ADDL $0x10, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0x100010C0: 4E800020 blr
+ 30: GETL LR, t22
+ 31: JMPo-r t22 ($4)
+
+
+
+. 3488 100010A4 32
+. 38 00 00 01 98 1E AD D4 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3489 (0x10007DE8) approx BBs exec'd 0 ====
+
+ 0x10007DE8: 80010024 lwz r0,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10007DEC: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0x10007DF0: 38210020 addi r1,r1,32
+ 8: GETL R1, t6
+ 9: ADDL $0x20, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0x10007DF4: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 3489 10007DE8 16
+. 80 01 00 24 7C 08 03 A6 38 21 00 20 4E 80 00 20
+==== BB 3490 (0x10007B20) approx BBs exec'd 0 ====
+
+ 0x10007B20: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x10007B24: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x10007B28: 83C10018 lwz r30,24(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R30
+ 14: INCEIPL $4
+
+ 0x10007B2C: 7D0803A6 mtlr r8
+ 15: GETL R8, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x10007B30: 83E1001C lwz r31,28(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x1C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R31
+ 22: INCEIPL $4
+
+ 0x10007B34: 38210020 addi r1,r1,32
+ 23: GETL R1, t18
+ 24: ADDL $0x20, t18
+ 25: PUTL t18, R1
+ 26: INCEIPL $4
+
+ 0x10007B38: 4E800020 blr
+ 27: GETL LR, t20
+ 28: JMPo-r t20 ($4)
+
+
+
+. 3490 10007B20 28
+. 81 01 00 24 83 A1 00 14 83 C1 00 18 7D 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 3491 _dl_fini(0x2547BAE0) approx BBs exec'd 0 ====
+
+ 0x2547BAE0: 9421FFA0 stwu r1,-96(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFA0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547BAE4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547BAE8: 4801B519 bl 0x25497000
+ 9: MOVL $0x2547BAEC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+
+. 3491 2547BAE0 12
+. 94 21 FF A0 7C 08 02 A6 48 01 B5 19
+==== BB 3492 (0x2547BAEC) approx BBs exec'd 0 ====
+
+ 0x2547BAEC: 93C10058 stw r30,88(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x58, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547BAF0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547BAF4: 7D800026 mfcr r12
+ 8: GETL CR, t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0x2547BAF8: 91C10018 stw r14,24(r1)
+ 11: GETL R14, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x18, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x2547BAFC: 92410028 stw r18,40(r1)
+ 16: GETL R18, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x28, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x2547BB00: 81DE04F4 lwz r14,1268(r30)
+ 21: GETL R30, t16
+ 22: ADDL $0x4F4, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R14
+ 25: INCEIPL $4
+
+ 0x2547BB04: 825E04C8 lwz r18,1224(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4C8, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R18
+ 30: INCEIPL $4
+
+ 0x2547BB08: 91E1001C stw r15,28(r1)
+ 31: GETL R15, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x1C, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547BB0C: 39E0000F li r15,15
+ 36: MOVL $0xF, t28
+ 37: PUTL t28, R15
+ 38: INCEIPL $4
+
+ 0x2547BB10: 92010020 stw r16,32(r1)
+ 39: GETL R16, t30
+ 40: GETL R1, t32
+ 41: ADDL $0x20, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0x2547BB14: 3A000000 li r16,0
+ 44: MOVL $0x0, t34
+ 45: PUTL t34, R16
+ 46: INCEIPL $4
+
+ 0x2547BB18: 92210024 stw r17,36(r1)
+ 47: GETL R17, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x24, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0x2547BB1C: 3A200168 li r17,360
+ 52: MOVL $0x168, t40
+ 53: PUTL t40, R17
+ 54: INCEIPL $4
+
+ 0x2547BB20: 92C10038 stw r22,56(r1)
+ 55: GETL R22, t42
+ 56: GETL R1, t44
+ 57: ADDL $0x38, t44
+ 58: STL t42, (t44)
+ 59: INCEIPL $4
+
+ 0x2547BB24: 3AC00000 li r22,0
+ 60: MOVL $0x0, t46
+ 61: PUTL t46, R22
+ 62: INCEIPL $4
+
+ 0x2547BB28: 93E1005C stw r31,92(r1)
+ 63: GETL R31, t48
+ 64: GETL R1, t50
+ 65: ADDL $0x5C, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x2547BB2C: 7C3F0B78 or r31,r1,r1
+ 68: GETL R1, t52
+ 69: PUTL t52, R31
+ 70: INCEIPL $4
+
+ 0x2547BB30: 9261002C stw r19,44(r1)
+ 71: GETL R19, t54
+ 72: GETL R1, t56
+ 73: ADDL $0x2C, t56
+ 74: STL t54, (t56)
+ 75: INCEIPL $4
+
+ 0x2547BB34: 92810030 stw r20,48(r1)
+ 76: GETL R20, t58
+ 77: GETL R1, t60
+ 78: ADDL $0x30, t60
+ 79: STL t58, (t60)
+ 80: INCEIPL $4
+
+ 0x2547BB38: 92A10034 stw r21,52(r1)
+ 81: GETL R21, t62
+ 82: GETL R1, t64
+ 83: ADDL $0x34, t64
+ 84: STL t62, (t64)
+ 85: INCEIPL $4
+
+ 0x2547BB3C: 92E1003C stw r23,60(r1)
+ 86: GETL R23, t66
+ 87: GETL R1, t68
+ 88: ADDL $0x3C, t68
+ 89: STL t66, (t68)
+ 90: INCEIPL $4
+
+ 0x2547BB40: 93010040 stw r24,64(r1)
+ 91: GETL R24, t70
+ 92: GETL R1, t72
+ 93: ADDL $0x40, t72
+ 94: STL t70, (t72)
+ 95: INCEIPL $4
+
+ 0x2547BB44: 93210044 stw r25,68(r1)
+ 96: GETL R25, t74
+ 97: GETL R1, t76
+ 98: ADDL $0x44, t76
+ 99: STL t74, (t76)
+ 100: INCEIPL $4
+
+ 0x2547BB48: 93410048 stw r26,72(r1)
+ 101: GETL R26, t78
+ 102: GETL R1, t80
+ 103: ADDL $0x48, t80
+ 104: STL t78, (t80)
+ 105: INCEIPL $4
+
+ 0x2547BB4C: 9361004C stw r27,76(r1)
+ 106: GETL R27, t82
+ 107: GETL R1, t84
+ 108: ADDL $0x4C, t84
+ 109: STL t82, (t84)
+ 110: INCEIPL $4
+
+ 0x2547BB50: 93810050 stw r28,80(r1)
+ 111: GETL R28, t86
+ 112: GETL R1, t88
+ 113: ADDL $0x50, t88
+ 114: STL t86, (t88)
+ 115: INCEIPL $4
+
+ 0x2547BB54: 93A10054 stw r29,84(r1)
+ 116: GETL R29, t90
+ 117: GETL R1, t92
+ 118: ADDL $0x54, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0x2547BB58: 90010064 stw r0,100(r1)
+ 121: GETL R0, t94
+ 122: GETL R1, t96
+ 123: ADDL $0x64, t96
+ 124: STL t94, (t96)
+ 125: INCEIPL $4
+
+ 0x2547BB5C: 91810014 stw r12,20(r1)
+ 126: GETL R12, t98
+ 127: GETL R1, t100
+ 128: ADDL $0x14, t100
+ 129: STL t98, (t100)
+ 130: INCEIPL $4
+
+ 0x2547BB60: 809203F8 lwz r4,1016(r18)
+ 131: GETL R18, t102
+ 132: ADDL $0x3F8, t102
+ 133: LDL (t102), t104
+ 134: PUTL t104, R4
+ 135: INCEIPL $4
+
+ 0x2547BB64: 38720180 addi r3,r18,384
+ 136: GETL R18, t106
+ 137: ADDL $0x180, t106
+ 138: PUTL t106, R3
+ 139: INCEIPL $4
+
+ 0x2547BB68: 7C8903A6 mtctr r4
+ 140: GETL R4, t108
+ 141: PUTL t108, CTR
+ 142: INCEIPL $4
+
+ 0x2547BB6C: 4E800421 bctrl
+ 143: MOVL $0x2547BB70, t110
+ 144: PUTL t110, LR
+ 145: GETL CTR, t112
+ 146: JMPo-c t112 ($4)
+
+
+
+. 3492 2547BAEC 132
+. 93 C1 00 58 7F C8 02 A6 7D 80 00 26 91 C1 00 18 92 41 00 28 81 DE 04 F4 82 5E 04 C8 91 E1 00 1C 39 E0 00 0F 92 01 00 20 3A 00 00 00 92 21 00 24 3A 20 01 68 92 C1 00 38 3A C0 00 00 93 E1 00 5C 7C 3F 0B 78 92 61 00 2C 92 81 00 30 92 A1 00 34 92 E1 00 3C 93 01 00 40 93 21 00 44 93 41 00 48 93 61 00 4C 93 81 00 50 93 A1 00 54 90 01 00 64 91 81 00 14 80 92 03 F8 38 72 01 80 7C 89 03 A6 4E 80 04 21
+==== BB 3493 (0x2547BB70) approx BBs exec'd 0 ====
+
+ 0x2547BB70: 7D319214 add r9,r17,r18
+ 0: GETL R17, t0
+ 1: GETL R18, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547BB74: 80690004 lwz r3,4(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547BB78: 546A103A rlwinm r10,r3,2,0,29
+ 10: GETL R3, t8
+ 11: SHLL $0x2, t8
+ 12: PUTL t8, R10
+ 13: INCEIPL $4
+
+ 0x2547BB7C: 7F8A8040 cmpl cr7,r10,r16
+ 14: GETL R10, t10
+ 15: GETL R16, t12
+ 16: CMPUL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2547BB80: 409D002C bc 4,29,0x2547BBAC
+ 19: Jc29o $0x2547BBAC
+
+
+
+. 3493 2547BB70 20
+. 7D 31 92 14 80 69 00 04 54 6A 10 3A 7F 8A 80 40 40 9D 00 2C
+==== BB 3494 (0x2547BBAC) approx BBs exec'd 0 ====
+
+ 0x2547BBAC: 7D71902E lwzx r11,r17,r18
+ 0: GETL R18, t0
+ 1: GETL R17, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R11
+ 5: INCEIPL $4
+
+ 0x2547BBB0: 3AE00000 li r23,0
+ 6: MOVL $0x0, t6
+ 7: PUTL t6, R23
+ 8: INCEIPL $4
+
+ 0x2547BBB4: 2E0B0000 cmpi cr4,r11,0
+ 9: GETL R11, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x4, CR
+ 12: INCEIPL $4
+
+ 0x2547BBB8: 41920020 bc 12,18,0x2547BBD8
+ 13: Js18o $0x2547BBD8
+
+
+
+. 3494 2547BBAC 16
+. 7D 71 90 2E 3A E0 00 00 2E 0B 00 00 41 92 00 20
+==== BB 3495 (0x2547BBD8) approx BBs exec'd 0 ====
+
+ 0x2547BBD8: 7EF3BB79 or. r19,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R19
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547BBDC: 41820110 bc 12,2,0x2547BCEC
+ 5: Js02o $0x2547BCEC
+
+
+
+. 3495 2547BBD8 8
+. 7E F3 BB 79 41 82 01 10
+==== BB 3496 (0x2547BCEC) approx BBs exec'd 0 ====
+
+ 0x2547BCEC: 80B203FC lwz r5,1020(r18)
+ 0: GETL R18, t0
+ 1: ADDL $0x3FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547BCF0: 3B400000 li r26,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x2547BCF4: 38720180 addi r3,r18,384
+ 8: GETL R18, t6
+ 9: ADDL $0x180, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x2547BCF8: 7E1A9840 cmpl cr4,r26,r19
+ 12: GETL R26, t8
+ 13: GETL R19, t10
+ 14: CMPUL t8, t10, t12 (-rSo)
+ 15: ICRFL t12, $0x4, CR
+ 16: INCEIPL $4
+
+ 0x2547BCFC: 7CA903A6 mtctr r5
+ 17: GETL R5, t14
+ 18: PUTL t14, CTR
+ 19: INCEIPL $4
+
+ 0x2547BD00: 4E800421 bctrl
+ 20: MOVL $0x2547BD04, t16
+ 21: PUTL t16, LR
+ 22: GETL CTR, t18
+ 23: JMPo-c t18 ($4)
+
+
+
+. 3496 2547BCEC 24
+. 80 B2 03 FC 3B 40 00 00 38 72 01 80 7E 1A 98 40 7C A9 03 A6 4E 80 04 21
+==== BB 3497 (0x2547BD04) approx BBs exec'd 0 ====
+
+ 0x2547BD04: 40900068 bc 4,16,0x2547BD6C
+ 0: Jc16o $0x2547BD6C
+
+
+
+. 3497 2547BD04 4
+. 40 90 00 68
+==== BB 3498 (0x2547BD6C) approx BBs exec'd 0 ====
+
+ 0x2547BD6C: 35EFFFFF addic. r15,r15,-1
+ 0: GETL R15, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R15
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x2547BD70: 3A31FFE8 addi r17,r17,-24
+ 6: GETL R17, t4
+ 7: ADDL $0xFFFFFFE8, t4
+ 8: PUTL t4, R17
+ 9: INCEIPL $4
+
+ 0x2547BD74: 4080FDEC bc 4,0,0x2547BB60
+ 10: Jc00o $0x2547BB60
+
+
+
+. 3498 2547BD6C 12
+. 35 EF FF FF 3A 31 FF E8 40 80 FD EC
+==== BB 3499 (0x2547BB60) approx BBs exec'd 0 ====
+
+ 0x2547BB60: 809203F8 lwz r4,1016(r18)
+ 0: GETL R18, t0
+ 1: ADDL $0x3F8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547BB64: 38720180 addi r3,r18,384
+ 5: GETL R18, t4
+ 6: ADDL $0x180, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x2547BB68: 7C8903A6 mtctr r4
+ 9: GETL R4, t6
+ 10: PUTL t6, CTR
+ 11: INCEIPL $4
+
+ 0x2547BB6C: 4E800421 bctrl
+ 12: MOVL $0x2547BB70, t8
+ 13: PUTL t8, LR
+ 14: GETL CTR, t10
+ 15: JMPo-c t10 ($4)
+
+
+
+. 3499 2547BB60 16
+. 80 92 03 F8 38 72 01 80 7C 89 03 A6 4E 80 04 21
+==== BB 3500 (0x2547BB84) approx BBs exec'd 0 ====
+
+ 0x2547BB84: 2C100000 cmpi cr0,r16,0
+ 0: GETL R16, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x2547BB88: 40820110 bc 4,2,0x2547BC98
+ 4: Jc02o $0x2547BC98
+
+
+
+. 3500 2547BB84 8
+. 2C 10 00 00 40 82 01 10
+==== BB 3501 (0x2547BB8C) approx BBs exec'd 0 ====
+
+ 0x2547BB8C: 390A001E addi r8,r10,30
+ 0: GETL R10, t0
+ 1: ADDL $0x1E, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x2547BB90: 81610000 lwz r11,0(r1)
+ 4: GETL R1, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x2547BB94: 55070036 rlwinm r7,r8,0,0,27
+ 8: GETL R8, t6
+ 9: ANDL $0xFFFFFFF0, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0x2547BB98: 7D505378 or r16,r10,r10
+ 12: GETL R10, t8
+ 13: PUTL t8, R16
+ 14: INCEIPL $4
+
+ 0x2547BB9C: 7CC700D0 neg r6,r7
+ 15: GETL R7, t10
+ 16: NEGL t10
+ 17: PUTL t10, R6
+ 18: INCEIPL $4
+
+ 0x2547BBA0: 7D61316E stwux r11,r1,r6
+ 19: GETL R6, t12
+ 20: GETL R1, t14
+ 21: ADDL t14, t12
+ 22: PUTL t12, R1
+ 23: GETL R11, t16
+ 24: STL t16, (t12)
+ 25: INCEIPL $4
+
+ 0x2547BBA4: 38A10017 addi r5,r1,23
+ 26: GETL R1, t18
+ 27: ADDL $0x17, t18
+ 28: PUTL t18, R5
+ 29: INCEIPL $4
+
+ 0x2547BBA8: 54B60036 rlwinm r22,r5,0,0,27
+ 30: GETL R5, t20
+ 31: ANDL $0xFFFFFFF0, t20
+ 32: PUTL t20, R22
+ 33: INCEIPL $4
+
+ 0x2547BBAC: 7D71902E lwzx r11,r17,r18
+ 34: GETL R18, t22
+ 35: GETL R17, t24
+ 36: ADDL t24, t22
+ 37: LDL (t22), t26
+ 38: PUTL t26, R11
+ 39: INCEIPL $4
+
+ 0x2547BBB0: 3AE00000 li r23,0
+ 40: MOVL $0x0, t28
+ 41: PUTL t28, R23
+ 42: INCEIPL $4
+
+ 0x2547BBB4: 2E0B0000 cmpi cr4,r11,0
+ 43: GETL R11, t30
+ 44: CMP0L t30, t32 (-rSo)
+ 45: ICRFL t32, $0x4, CR
+ 46: INCEIPL $4
+
+ 0x2547BBB8: 41920020 bc 12,18,0x2547BBD8
+ 47: Js18o $0x2547BBD8
+
+
+
+. 3501 2547BB8C 48
+. 39 0A 00 1E 81 61 00 00 55 07 00 36 7D 50 53 78 7C C7 00 D0 7D 61 31 6E 38 A1 00 17 54 B6 00 36 7D 71 90 2E 3A E0 00 00 2E 0B 00 00 41 92 00 20
+==== BB 3502 (0x2547BBBC) approx BBs exec'd 0 ====
+
+ 0x2547BBBC: 834B0014 lwz r26,20(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547BBC0: 56EA103A rlwinm r10,r23,2,0,29
+ 5: GETL R23, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x2547BBC4: 7F1A5800 cmp cr6,r26,r11
+ 9: GETL R26, t6
+ 10: GETL R11, t8
+ 11: CMPL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0x2547BBC8: 419A0108 bc 12,26,0x2547BCD0
+ 14: Js26o $0x2547BCD0
+
+
+
+. 3502 2547BBBC 16
+. 83 4B 00 14 56 EA 10 3A 7F 1A 58 00 41 9A 01 08
+==== BB 3503 (0x2547BCD0) approx BBs exec'd 0 ====
+
+ 0x2547BCD0: 836B0178 lwz r27,376(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x178, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x2547BCD4: 3AF70001 addi r23,r23,1
+ 5: GETL R23, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R23
+ 8: INCEIPL $4
+
+ 0x2547BCD8: 7D6AB12E stwx r11,r10,r22
+ 9: GETL R22, t6
+ 10: GETL R10, t8
+ 11: ADDL t8, t6
+ 12: GETL R11, t10
+ 13: STL t10, (t6)
+ 14: INCEIPL $4
+
+ 0x2547BCDC: 395B0001 addi r10,r27,1
+ 15: GETL R27, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547BCE0: 914B0178 stw r10,376(r11)
+ 19: GETL R10, t14
+ 20: GETL R11, t16
+ 21: ADDL $0x178, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x2547BCE4: 816B000C lwz r11,12(r11)
+ 24: GETL R11, t18
+ 25: ADDL $0xC, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R11
+ 28: INCEIPL $4
+
+ 0x2547BCE8: 4BFFFEE8 b 0x2547BBD0
+ 29: JMPo $0x2547BBD0 ($4)
+
+
+
+. 3503 2547BCD0 28
+. 83 6B 01 78 3A F7 00 01 7D 6A B1 2E 39 5B 00 01 91 4B 01 78 81 6B 00 0C 4B FF FE E8
+==== BB 3504 (0x2547BBD0) approx BBs exec'd 0 ====
+
+ 0x2547BBD0: 2E0B0000 cmpi cr4,r11,0
+ 0: GETL R11, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x2547BBD4: 4092FFE8 bc 4,18,0x2547BBBC
+ 4: Jc18o $0x2547BBBC
+
+
+
+. 3504 2547BBD0 8
+. 2E 0B 00 00 40 92 FF E8
+==== BB 3505 (0x2547BBE0) approx BBs exec'd 0 ====
+
+ 0x2547BBE0: 2E0F0000 cmpi cr4,r15,0
+ 0: GETL R15, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x2547BBE4: 7F71902E lwzx r27,r17,r18
+ 4: GETL R18, t4
+ 5: GETL R17, t6
+ 6: ADDL t6, t4
+ 7: LDL (t4), t8
+ 8: PUTL t8, R27
+ 9: INCEIPL $4
+
+ 0x2547BBE8: 40920008 bc 4,18,0x2547BBF0
+ 10: Jc18o $0x2547BBF0
+
+
+
+. 3505 2547BBE0 12
+. 2E 0F 00 00 7F 71 90 2E 40 92 00 08
+==== BB 3506 (0x2547BBEC) approx BBs exec'd 0 ====
+
+ 0x2547BBEC: 837B000C lwz r27,12(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x2547BBF0: 2F9B0000 cmpi cr7,r27,0
+ 5: GETL R27, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547BBF4: 419E00F8 bc 12,30,0x2547BCEC
+ 9: Js30o $0x2547BCEC
+
+
+
+. 3506 2547BBEC 12
+. 83 7B 00 0C 2F 9B 00 00 41 9E 00 F8
+==== BB 3507 (0x2547BBF8) approx BBs exec'd 0 ====
+
+ 0x2547BBF8: 839B0014 lwz r28,20(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x2547BBFC: 7C9CD800 cmp cr1,r28,r27
+ 5: GETL R28, t4
+ 6: GETL R27, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x2547BC00: 4086FFEC bc 4,6,0x2547BBEC
+ 10: Jc06o $0x2547BBEC
+
+
+
+. 3507 2547BBF8 12
+. 83 9B 00 14 7C 9C D8 00 40 86 FF EC
+==== BB 3508 (0x2547BC04) approx BBs exec'd 0 ====
+
+ 0x2547BC04: 7F200026 mfcr r25
+ 0: GETL CR, t0
+ 1: PUTL t0, R25
+ 2: INCEIPL $4
+
+ 0x2547BC08: 57399FFE rlwinm r25,r25,19,31,31
+ 3: GETL R25, t2
+ 4: ROLL $0x13, t2
+ 5: ANDL $0x1, t2
+ 6: PUTL t2, R25
+ 7: INCEIPL $4
+
+ 0x2547BC0C: 48000008 b 0x2547BC14
+ 8: JMPo $0x2547BC14 ($4)
+
+
+
+. 3508 2547BC04 12
+. 7F 20 00 26 57 39 9F FE 48 00 00 08
+==== BB 3509 (0x2547BC14) approx BBs exec'd 0 ====
+
+ 0x2547BC14: 572C103A rlwinm r12,r25,2,0,29
+ 0: GETL R25, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0x2547BC18: 7FACB02E lwzx r29,r12,r22
+ 4: GETL R22, t2
+ 5: GETL R12, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547BC1C: 7F1DD800 cmp cr6,r29,r27
+ 10: GETL R29, t8
+ 11: GETL R27, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x6, CR
+ 14: INCEIPL $4
+
+ 0x2547BC20: 409AFFF0 bc 4,26,0x2547BC10
+ 15: Jc26o $0x2547BC10
+
+
+
+. 3509 2547BC14 16
+. 57 2C 10 3A 7F AC B0 2E 7F 1D D8 00 40 9A FF F0
+==== BB 3510 (0x2547BC24) approx BBs exec'd 0 ====
+
+ 0x2547BC24: 3B590001 addi r26,r25,1
+ 0: GETL R25, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x2547BC28: 7C1AB840 cmpl cr0,r26,r23
+ 4: GETL R26, t2
+ 5: GETL R23, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547BC2C: 40A0FFC0 bc 5,0,0x2547BBEC
+ 9: Jc00o $0x2547BBEC
+
+
+
+. 3510 2547BC24 12
+. 3B 59 00 01 7C 1A B8 40 40 A0 FF C0
+==== BB 3511 (0x2547BC30) approx BBs exec'd 0 ====
+
+ 0x2547BC30: 5720103A rlwinm r0,r25,2,0,29
+ 0: GETL R25, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x2547BC34: 7C140378 or r20,r0,r0
+ 4: GETL R0, t2
+ 5: PUTL t2, R20
+ 6: INCEIPL $4
+
+ 0x2547BC38: 7EA0B214 add r21,r0,r22
+ 7: GETL R0, t4
+ 8: GETL R22, t6
+ 9: ADDL t4, t6
+ 10: PUTL t6, R21
+ 11: INCEIPL $4
+
+ 0x2547BC3C: 5758103A rlwinm r24,r26,2,0,29
+ 12: GETL R26, t8
+ 13: SHLL $0x2, t8
+ 14: PUTL t8, R24
+ 15: INCEIPL $4
+
+ 0x2547BC40: 7C78B02E lwzx r3,r24,r22
+ 16: GETL R22, t10
+ 17: GETL R24, t12
+ 18: ADDL t12, t10
+ 19: LDL (t10), t14
+ 20: PUTL t14, R3
+ 21: INCEIPL $4
+
+ 0x2547BC44: 816301E8 lwz r11,488(r3)
+ 22: GETL R3, t16
+ 23: ADDL $0x1E8, t16
+ 24: LDL (t16), t18
+ 25: PUTL t18, R11
+ 26: INCEIPL $4
+
+ 0x2547BC48: 2F8B0000 cmpi cr7,r11,0
+ 27: GETL R11, t20
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x7, CR
+ 30: INCEIPL $4
+
+ 0x2547BC4C: 419E002C bc 12,30,0x2547BC78
+ 31: Js30o $0x2547BC78
+
+
+
+. 3511 2547BC30 32
+. 57 20 10 3A 7C 14 03 78 7E A0 B2 14 57 58 10 3A 7C 78 B0 2E 81 63 01 E8 2F 8B 00 00 41 9E 00 2C
+==== BB 3512 (0x2547BC50) approx BBs exec'd 0 ====
+
+ 0x2547BC50: 812B0000 lwz r9,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547BC54: 2C890000 cmpi cr1,r9,0
+ 4: GETL R9, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x2547BC58: 41860020 bc 12,6,0x2547BC78
+ 8: Js06o $0x2547BC78
+
+
+
+. 3512 2547BC50 12
+. 81 2B 00 00 2C 89 00 00 41 86 00 20
+==== BB 3513 (0x2547BC5C) approx BBs exec'd 0 ====
+
+ 0x2547BC5C: 7C99D050 subf r4,r25,r26
+ 0: GETL R25, t0
+ 1: GETL R26, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547BC60: 5485103A rlwinm r5,r4,2,0,29
+ 5: GETL R4, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547BC64: 7F09D800 cmp cr6,r9,r27
+ 9: GETL R9, t6
+ 10: GETL R27, t8
+ 11: CMPL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0x2547BC68: 419A0240 bc 12,26,0x2547BEA8
+ 14: Js26o $0x2547BEA8
+
+
+
+. 3513 2547BC5C 16
+. 7C 99 D0 50 54 85 10 3A 7F 09 D8 00 41 9A 02 40
+==== BB 3514 (0x2547BC6C) approx BBs exec'd 0 ====
+
+ 0x2547BC6C: 852B0004 lwzu r9,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R11
+ 3: LDL (t0), t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x2547BC70: 2C090000 cmpi cr0,r9,0
+ 6: GETL R9, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547BC74: 4082FFF0 bc 4,2,0x2547BC64
+ 10: Jc02o $0x2547BC64
+
+
+
+. 3514 2547BC6C 12
+. 85 2B 00 04 2C 09 00 00 40 82 FF F0
+==== BB 3515 (0x2547BC64) approx BBs exec'd 0 ====
+
+ 0x2547BC64: 7F09D800 cmp cr6,r9,r27
+ 0: GETL R9, t0
+ 1: GETL R27, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x2547BC68: 419A0240 bc 12,26,0x2547BEA8
+ 5: Js26o $0x2547BEA8
+
+
+
+. 3515 2547BC64 8
+. 7F 09 D8 00 41 9A 02 40
+==== BB 3516 (0x2547BC78) approx BBs exec'd 0 ====
+
+ 0x2547BC78: 7D38B02E lwzx r9,r24,r22
+ 0: GETL R22, t0
+ 1: GETL R24, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R9
+ 5: INCEIPL $4
+
+ 0x2547BC7C: 814901F4 lwz r10,500(r9)
+ 6: GETL R9, t6
+ 7: ADDL $0x1F4, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R10
+ 10: INCEIPL $4
+
+ 0x2547BC80: 2F8A0000 cmpi cr7,r10,0
+ 11: GETL R10, t10
+ 12: CMP0L t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0x2547BC84: 409E0258 bc 4,30,0x2547BEDC
+ 15: Jc30o $0x2547BEDC
+
+
+
+. 3516 2547BC78 16
+. 7D 38 B0 2E 81 49 01 F4 2F 8A 00 00 40 9E 02 58
+==== BB 3517 (0x2547BC88) approx BBs exec'd 0 ====
+
+ 0x2547BC88: 3B5A0001 addi r26,r26,1
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x2547BC8C: 7F1AB840 cmpl cr6,r26,r23
+ 4: GETL R26, t2
+ 5: GETL R23, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547BC90: 4198FFAC bc 12,24,0x2547BC3C
+ 9: Js24o $0x2547BC3C
+
+
+
+. 3517 2547BC88 12
+. 3B 5A 00 01 7F 1A B8 40 41 98 FF AC
+==== BB 3518 (0x2547BC3C) approx BBs exec'd 0 ====
+
+ 0x2547BC3C: 5758103A rlwinm r24,r26,2,0,29
+ 0: GETL R26, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R24
+ 3: INCEIPL $4
+
+ 0x2547BC40: 7C78B02E lwzx r3,r24,r22
+ 4: GETL R22, t2
+ 5: GETL R24, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547BC44: 816301E8 lwz r11,488(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x1E8, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547BC48: 2F8B0000 cmpi cr7,r11,0
+ 15: GETL R11, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2547BC4C: 419E002C bc 12,30,0x2547BC78
+ 19: Js30o $0x2547BC78
+
+
+
+. 3518 2547BC3C 20
+. 57 58 10 3A 7C 78 B0 2E 81 63 01 E8 2F 8B 00 00 41 9E 00 2C
+==== BB 3519 (0x2547BC94) approx BBs exec'd 0 ====
+
+ 0x2547BC94: 4BFFFF58 b 0x2547BBEC
+ 0: JMPo $0x2547BBEC ($4)
+
+
+
+. 3519 2547BC94 4
+. 4B FF FF 58
+==== BB 3520 (0x2547BC10) approx BBs exec'd 0 ====
+
+ 0x2547BC10: 3B390001 addi r25,r25,1
+ 0: GETL R25, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0x2547BC14: 572C103A rlwinm r12,r25,2,0,29
+ 4: GETL R25, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R12
+ 7: INCEIPL $4
+
+ 0x2547BC18: 7FACB02E lwzx r29,r12,r22
+ 8: GETL R22, t4
+ 9: GETL R12, t6
+ 10: ADDL t6, t4
+ 11: LDL (t4), t8
+ 12: PUTL t8, R29
+ 13: INCEIPL $4
+
+ 0x2547BC1C: 7F1DD800 cmp cr6,r29,r27
+ 14: GETL R29, t10
+ 15: GETL R27, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0x2547BC20: 409AFFF0 bc 4,26,0x2547BC10
+ 19: Jc26o $0x2547BC10
+
+
+
+. 3520 2547BC10 20
+. 3B 39 00 01 57 2C 10 3A 7F AC B0 2E 7F 1D D8 00 40 9A FF F0
+==== BB 3521 (0x2547BEA8) approx BBs exec'd 0 ====
+
+ 0x2547BEA8: 7F98B02E lwzx r28,r24,r22
+ 0: GETL R22, t0
+ 1: GETL R24, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R28
+ 5: INCEIPL $4
+
+ 0x2547BEAC: 3BB50004 addi r29,r21,4
+ 6: GETL R21, t6
+ 7: ADDL $0x4, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547BEB0: 7EA4AB78 or r4,r21,r21
+ 10: GETL R21, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x2547BEB4: 7FA3EB78 or r3,r29,r29
+ 13: GETL R29, t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0x2547BEB8: 480076E5 bl 0x2548359C
+ 16: MOVL $0x2547BEBC, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0x2548359C ($4)
+
+
+
+. 3521 2547BEA8 20
+. 7F 98 B0 2E 3B B5 00 04 7E A4 AB 78 7F A3 EB 78 48 00 76 E5
+==== BB 3522 (0x2547BEBC) approx BBs exec'd 0 ====
+
+ 0x2547BEBC: 93950000 stw r28,0(r21)
+ 0: GETL R28, t0
+ 1: GETL R21, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x2547BEC0: 7D38B02E lwzx r9,r24,r22
+ 4: GETL R22, t4
+ 5: GETL R24, t6
+ 6: ADDL t6, t4
+ 7: LDL (t4), t8
+ 8: PUTL t8, R9
+ 9: INCEIPL $4
+
+ 0x2547BEC4: 3B390001 addi r25,r25,1
+ 10: GETL R25, t10
+ 11: ADDL $0x1, t10
+ 12: PUTL t10, R25
+ 13: INCEIPL $4
+
+ 0x2547BEC8: 3A940004 addi r20,r20,4
+ 14: GETL R20, t12
+ 15: ADDL $0x4, t12
+ 16: PUTL t12, R20
+ 17: INCEIPL $4
+
+ 0x2547BECC: 7FB5EB78 or r21,r29,r29
+ 18: GETL R29, t14
+ 19: PUTL t14, R21
+ 20: INCEIPL $4
+
+ 0x2547BED0: 814901F4 lwz r10,500(r9)
+ 21: GETL R9, t16
+ 22: ADDL $0x1F4, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R10
+ 25: INCEIPL $4
+
+ 0x2547BED4: 2F8A0000 cmpi cr7,r10,0
+ 26: GETL R10, t20
+ 27: CMP0L t20, t22 (-rSo)
+ 28: ICRFL t22, $0x7, CR
+ 29: INCEIPL $4
+
+ 0x2547BED8: 419EFDB0 bc 12,30,0x2547BC88
+ 30: Js30o $0x2547BC88
+
+
+
+. 3522 2547BEBC 32
+. 93 95 00 00 7D 38 B0 2E 3B 39 00 01 3A 94 00 04 7F B5 EB 78 81 49 01 F4 2F 8A 00 00 41 9E FD B0
+==== BB 3523 (0x2547BD08) approx BBs exec'd 0 ====
+
+ 0x2547BD08: 817E034C lwz r11,844(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x34C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547BD0C: 832B0000 lwz r25,0(r11)
+ 5: GETL R11, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R25
+ 8: INCEIPL $4
+
+ 0x2547BD10: 48000030 b 0x2547BD40
+ 9: JMPo $0x2547BD40 ($4)
+
+
+
+. 3523 2547BD08 12
+. 81 7E 03 4C 83 2B 00 00 48 00 00 30
+==== BB 3524 (0x2547BD40) approx BBs exec'd 0 ====
+
+ 0x2547BD40: 5748103A rlwinm r8,r26,2,0,29
+ 0: GETL R26, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x2547BD44: 7F88B02E lwzx r28,r8,r22
+ 4: GETL R22, t2
+ 5: GETL R8, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x2547BD48: 817C0180 lwz r11,384(r28)
+ 10: GETL R28, t8
+ 11: ADDL $0x180, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547BD4C: 75601000 andis. r0,r11,0x1000
+ 15: GETL R11, t12
+ 16: ANDL $0x10000000, t12
+ 17: PUTL t12, R0
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x0, CR
+ 20: INCEIPL $4
+
+ 0x2547BD50: 40A2FFC4 bc 5,2,0x2547BD14
+ 21: Jc02o $0x2547BD14
+
+
+
+. 3524 2547BD40 20
+. 57 48 10 3A 7F 88 B0 2E 81 7C 01 80 75 60 10 00 40 A2 FF C4
+==== BB 3525 (0x2547BD14) approx BBs exec'd 0 ====
+
+ 0x2547BD14: 55750104 rlwinm r21,r11,0,4,2
+ 0: GETL R11, t0
+ 1: ANDL $0xEFFFFFFF, t0
+ 2: PUTL t0, R21
+ 3: INCEIPL $4
+
+ 0x2547BD18: 809C0004 lwz r4,4(r28)
+ 4: GETL R28, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2547BD1C: 92BC0180 stw r21,384(r28)
+ 9: GETL R21, t6
+ 10: GETL R28, t8
+ 11: ADDL $0x180, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547BD20: 8A840000 lbz r20,0(r4)
+ 14: GETL R4, t10
+ 15: LDB (t10), t12
+ 16: PUTL t12, R20
+ 17: INCEIPL $4
+
+ 0x2547BD24: 2F140000 cmpi cr6,r20,0
+ 18: GETL R20, t14
+ 19: CMP0L t14, t16 (-rSo)
+ 20: ICRFL t16, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x2547BD28: 409A00C0 bc 4,26,0x2547BDE8
+ 22: Jc26o $0x2547BDE8
+
+
+
+. 3525 2547BD14 24
+. 55 75 01 04 80 9C 00 04 92 BC 01 80 8A 84 00 00 2F 14 00 00 40 9A 00 C0
+==== BB 3526 (0x2547BD2C) approx BBs exec'd 0 ====
+
+ 0x2547BD2C: 7569C000 andis. r9,r11,0xC000
+ 0: GETL R11, t0
+ 1: ANDL $0xC0000000, t0
+ 2: PUTL t0, R9
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x2547BD30: 408200B8 bc 4,2,0x2547BDE8
+ 6: Jc02o $0x2547BDE8
+
+
+
+. 3526 2547BD2C 8
+. 75 69 C0 00 40 82 00 B8
+==== BB 3527 (0x2547BD34) approx BBs exec'd 0 ====
+
+ 0x2547BD34: 3B5A0001 addi r26,r26,1
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x2547BD38: 7F9A9840 cmpl cr7,r26,r19
+ 4: GETL R26, t2
+ 5: GETL R19, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547BD3C: 409C0030 bc 4,28,0x2547BD6C
+ 9: Jc28o $0x2547BD6C
+
+
+
+. 3527 2547BD34 12
+. 3B 5A 00 01 7F 9A 98 40 40 9C 00 30
+==== BB 3528 (0x2547BDE8) approx BBs exec'd 0 ====
+
+ 0x2547BDE8: 813C0088 lwz r9,136(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x88, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547BDEC: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547BDF0: 409E0010 bc 4,30,0x2547BE00
+ 9: Jc30o $0x2547BE00
+
+
+
+. 3528 2547BDE8 12
+. 81 3C 00 88 2F 89 00 00 40 9E 00 10
+==== BB 3529 (0x2547BDF4) approx BBs exec'd 0 ====
+
+ 0x2547BDF4: 82FC0054 lwz r23,84(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x54, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x2547BDF8: 2C970000 cmpi cr1,r23,0
+ 5: GETL R23, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547BDFC: 4186FF38 bc 12,6,0x2547BD34
+ 9: Js06o $0x2547BD34
+
+
+
+. 3529 2547BDF4 12
+. 82 FC 00 54 2C 97 00 00 41 86 FF 38
+==== BB 3530 (0x2547BE00) approx BBs exec'd 0 ====
+
+ 0x2547BE00: 830E0000 lwz r24,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R24
+ 3: INCEIPL $4
+
+ 0x2547BE04: 730B0002 andi. r11,r24,0x2
+ 4: GETL R24, t4
+ 5: ANDL $0x2, t4
+ 6: PUTL t4, R11
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547BE08: 4082007C bc 4,2,0x2547BE84
+ 10: Jc02o $0x2547BE84
+
+
+
+. 3530 2547BE00 12
+. 83 0E 00 00 73 0B 00 02 40 82 00 7C
+==== BB 3531 (0x2547BE0C) approx BBs exec'd 0 ====
+
+ 0x2547BE0C: 2F090000 cmpi cr6,r9,0
+ 0: GETL R9, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547BE10: 419A0044 bc 12,26,0x2547BE54
+ 4: Js26o $0x2547BE54
+
+
+
+. 3531 2547BE0C 8
+. 2F 09 00 00 41 9A 00 44
+==== BB 3532 (0x2547BE54) approx BBs exec'd 0 ====
+
+ 0x2547BE54: 813C0054 lwz r9,84(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x54, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547BE58: 2E090000 cmpi cr4,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x2547BE5C: 4192FEF8 bc 12,18,0x2547BD54
+ 9: Js18o $0x2547BD54
+
+
+
+. 3532 2547BE54 12
+. 81 3C 00 54 2E 09 00 00 41 92 FE F8
+==== BB 3533 (0x2547BE60) approx BBs exec'd 0 ====
+
+ 0x2547BE60: 80A90004 lwz r5,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547BE64: 83BC0000 lwz r29,0(r28)
+ 5: GETL R28, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R29
+ 8: INCEIPL $4
+
+ 0x2547BE68: 7CFD2A14 add r7,r29,r5
+ 9: GETL R29, t8
+ 10: GETL R5, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R7
+ 13: INCEIPL $4
+
+ 0x2547BE6C: 7CE903A6 mtctr r7
+ 14: GETL R7, t12
+ 15: PUTL t12, CTR
+ 16: INCEIPL $4
+
+ 0x2547BE70: 4E800421 bctrl
+ 17: MOVL $0x2547BE74, t14
+ 18: PUTL t14, LR
+ 19: GETL CTR, t16
+ 20: JMPo-c t16 ($4)
+
+
+
+. 3533 2547BE60 20
+. 80 A9 00 04 83 BC 00 00 7C FD 2A 14 7C E9 03 A6 4E 80 04 21
+==== BB 3534 (0xFFDEF80) approx BBs exec'd 0 ====
+
+ 0xFFDEF80: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDEF84: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDEF88: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFFDEF8C: 4BFFF979 bl 0xFFDE904
+ 14: MOVL $0xFFDEF90, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFFDE904 ($4)
+
+
+
+. 3534 FFDEF80 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 4B FF F9 79
+==== BB 3535 (0xFFDE904) approx BBs exec'd 0 ====
+
+ 0xFFDE904: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDE908: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDE90C: 429F0005 bcl 20,31,0xFFDE910
+ 9: MOVL $0xFFDE910, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFFDE910: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFFDE914: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xFFDE918: 93E1000C stw r31,12(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xFFDE91C: 90010014 stw r0,20(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFFDE920: 801EFFF0 lwz r0,-16(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0xFFFFFFF0, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFFDE924: 7FC0F214 add r30,r0,r30
+ 35: GETL R0, t26
+ 36: GETL R30, t28
+ 37: ADDL t26, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0xFFDE928: 813E8000 lwz r9,-32768(r30)
+ 40: GETL R30, t30
+ 41: ADDL $0xFFFF8000, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xFFDE92C: 88090000 lbz r0,0(r9)
+ 45: GETL R9, t34
+ 46: LDB (t34), t36
+ 47: PUTL t36, R0
+ 48: INCEIPL $4
+
+ 0xFFDE930: 2F800000 cmpi cr7,r0,0
+ 49: GETL R0, t38
+ 50: CMP0L t38, t40 (-rSo)
+ 51: ICRFL t40, $0x7, CR
+ 52: INCEIPL $4
+
+ 0xFFDE934: 409E0050 bc 4,30,0xFFDE984
+ 53: Jc30o $0xFFDE984
+
+
+
+. 3535 FFDE904 52
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 88 09 00 00 2F 80 00 00 40 9E 00 50
+==== BB 3536 (0xFFDE938) approx BBs exec'd 0 ====
+
+ 0xFFDE938: 801E8004 lwz r0,-32764(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8004, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDE93C: 2F800000 cmpi cr7,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFFDE940: 419E0010 bc 12,30,0xFFDE950
+ 9: Js30o $0xFFDE950
+
+
+
+. 3536 FFDE938 12
+. 80 1E 80 04 2F 80 00 00 41 9E 00 10
+==== BB 3537 (0xFFDE944) approx BBs exec'd 0 ====
+
+ 0xFFDE944: 813E8008 lwz r9,-32760(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8008, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFFDE948: 80690000 lwz r3,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFFDE94C: 48010831 bl 0xFFEF17C
+ 9: MOVL $0xFFDE950, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0xFFEF17C ($4)
+
+
+
+. 3537 FFDE944 12
+. 81 3E 80 08 80 69 00 00 48 01 08 31
+==== BB 3538 (0xFFEF17C) approx BBs exec'd 0 ====
+
+ 0xFFEF17C: 3960000C li r11,12
+ 0: MOVL $0xC, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFFEF180: 4BFFFFBC b 0xFFEF13C
+ 3: JMPo $0xFFEF13C ($4)
+
+
+
+. 3538 FFEF17C 8
+. 39 60 00 0C 4B FF FF BC
+==== BB 3539 (0xFFEF13C) approx BBs exec'd 0 ====
+
+ 0xFFEF13C: 556C083C rlwinm r12,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0xFFEF140: 7D6C5A14 add r11,r12,r11
+ 4: GETL R12, t2
+ 5: GETL R11, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0xFFEF144: 3980AF5C li r12,-20644
+ 9: MOVL $0xFFFFAF5C, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0xFFEF148: 3D8C2548 addis r12,r12,9544
+ 12: MOVL $0x2547AF5C, t8
+ 13: PUTL t8, R12
+ 14: INCEIPL $4
+
+ 0xFFEF14C: 7D8903A6 mtctr r12
+ 15: GETL R12, t10
+ 16: PUTL t10, CTR
+ 17: INCEIPL $4
+
+ 0xFFEF150: 39808040 li r12,-32704
+ 18: MOVL $0xFFFF8040, t12
+ 19: PUTL t12, R12
+ 20: INCEIPL $4
+
+ 0xFFEF154: 3D8C2547 addis r12,r12,9543
+ 21: MOVL $0x25468040, t14
+ 22: PUTL t14, R12
+ 23: INCEIPL $4
+
+ 0xFFEF158: 4E800420 bctr
+ 24: GETL CTR, t16
+ 25: JMPo t16 ($4)
+
+
+
+. 3539 FFEF13C 32
+. 55 6C 08 3C 7D 6C 5A 14 39 80 AF 5C 3D 8C 25 48 7D 89 03 A6 39 80 80 40 3D 8C 25 47 4E 80 04 20
+==== BB 3540 __cxa_finalize(0xFE93F44) approx BBs exec'd 0 ====
+
+ 0xFE93F44: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE93F48: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE93F4C: 48113F05 bl 0xFFA7E50
+ 9: MOVL $0xFE93F50, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3540 FE93F44 12
+. 94 21 FF D0 7C 08 02 A6 48 11 3F 05
+==== BB 3541 (0xFE93F50) approx BBs exec'd 0 ====
+
+ 0xFE93F50: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE93F54: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE93F58: 93810020 stw r28,32(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x20, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE93F5C: 90010034 stw r0,52(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x34, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE93F60: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0xFE93F64: 93210014 stw r25,20(r1)
+ 21: GETL R25, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE93F68: 2E030000 cmpi cr4,r3,0
+ 26: GETL R3, t20
+ 27: CMP0L t20, t22 (-rSo)
+ 28: ICRFL t22, $0x4, CR
+ 29: INCEIPL $4
+
+ 0xFE93F6C: 813E1AFC lwz r9,6908(r30)
+ 30: GETL R30, t24
+ 31: ADDL $0x1AFC, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R9
+ 34: INCEIPL $4
+
+ 0xFE93F70: 7C791B78 or r25,r3,r3
+ 35: GETL R3, t28
+ 36: PUTL t28, R25
+ 37: INCEIPL $4
+
+ 0xFE93F74: 93010010 stw r24,16(r1)
+ 38: GETL R24, t30
+ 39: GETL R1, t32
+ 40: ADDL $0x10, t32
+ 41: STL t30, (t32)
+ 42: INCEIPL $4
+
+ 0xFE93F78: 83890000 lwz r28,0(r9)
+ 43: GETL R9, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R28
+ 46: INCEIPL $4
+
+ 0xFE93F7C: 93410018 stw r26,24(r1)
+ 47: GETL R26, t38
+ 48: GETL R1, t40
+ 49: ADDL $0x18, t40
+ 50: STL t38, (t40)
+ 51: INCEIPL $4
+
+ 0xFE93F80: 2F9C0000 cmpi cr7,r28,0
+ 52: GETL R28, t42
+ 53: CMP0L t42, t44 (-rSo)
+ 54: ICRFL t44, $0x7, CR
+ 55: INCEIPL $4
+
+ 0xFE93F84: 9361001C stw r27,28(r1)
+ 56: GETL R27, t46
+ 57: GETL R1, t48
+ 58: ADDL $0x1C, t48
+ 59: STL t46, (t48)
+ 60: INCEIPL $4
+
+ 0xFE93F88: 93A10024 stw r29,36(r1)
+ 61: GETL R29, t50
+ 62: GETL R1, t52
+ 63: ADDL $0x24, t52
+ 64: STL t50, (t52)
+ 65: INCEIPL $4
+
+ 0xFE93F8C: 93E1002C stw r31,44(r1)
+ 66: GETL R31, t54
+ 67: GETL R1, t56
+ 68: ADDL $0x2C, t56
+ 69: STL t54, (t56)
+ 70: INCEIPL $4
+
+ 0xFE93F90: 9181000C stw r12,12(r1)
+ 71: GETL R12, t58
+ 72: GETL R1, t60
+ 73: ADDL $0xC, t60
+ 74: STL t58, (t60)
+ 75: INCEIPL $4
+
+ 0xFE93F94: 419E0088 bc 12,30,0xFE9401C
+ 76: Js30o $0xFE9401C
+
+
+
+. 3541 FE93F50 72
+. 93 C1 00 28 7F C8 02 A6 93 81 00 20 90 01 00 34 7D 80 00 26 93 21 00 14 2E 03 00 00 81 3E 1A FC 7C 79 1B 78 93 01 00 10 83 89 00 00 93 41 00 18 2F 9C 00 00 93 61 00 1C 93 A1 00 24 93 E1 00 2C 91 81 00 0C 41 9E 00 88
+==== BB 3542 (0xFE93F98) approx BBs exec'd 0 ====
+
+ 0xFE93F98: 80BC0004 lwz r5,4(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFE93F9C: 3BBC0008 addi r29,r28,8
+ 5: GETL R28, t4
+ 6: ADDL $0x8, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0xFE93FA0: 54A42036 rlwinm r4,r5,4,0,27
+ 9: GETL R5, t6
+ 10: SHLL $0x4, t6
+ 11: PUTL t6, R4
+ 12: INCEIPL $4
+
+ 0xFE93FA4: 7C64E214 add r3,r4,r28
+ 13: GETL R4, t8
+ 14: GETL R28, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0xFE93FA8: 3BE3FFF8 addi r31,r3,-8
+ 18: GETL R3, t12
+ 19: ADDL $0xFFFFFFF8, t12
+ 20: PUTL t12, R31
+ 21: INCEIPL $4
+
+ 0xFE93FAC: 7C1DF840 cmpl cr0,r29,r31
+ 22: GETL R29, t14
+ 23: GETL R31, t16
+ 24: CMPUL t14, t16, t18 (-rSo)
+ 25: ICRFL t18, $0x0, CR
+ 26: INCEIPL $4
+
+ 0xFE93FB0: 41810060 bc 12,1,0xFE94010
+ 27: Js01o $0xFE94010
+
+
+
+. 3542 FE93F98 28
+. 80 BC 00 04 3B BC 00 08 54 A4 20 36 7C 64 E2 14 3B E3 FF F8 7C 1D F8 40 41 81 00 60
+==== BB 3543 (0xFE94010) approx BBs exec'd 0 ====
+
+ 0xFE94010: 839C0000 lwz r28,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R28
+ 3: INCEIPL $4
+
+ 0xFE94014: 2F9C0000 cmpi cr7,r28,0
+ 4: GETL R28, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFE94018: 409EFF80 bc 4,30,0xFE93F98
+ 8: Jc30o $0xFE93F98
+
+
+
+. 3543 FE94010 12
+. 83 9C 00 00 2F 9C 00 00 40 9E FF 80
+==== BB 3544 (0xFE9401C) approx BBs exec'd 0 ====
+
+ 0xFE9401C: 40920098 bc 4,18,0xFE940B4
+ 0: Jc18o $0xFE940B4
+
+
+
+. 3544 FE9401C 4
+. 40 92 00 98
+==== BB 3545 (0xFE940B4) approx BBs exec'd 0 ====
+
+ 0xFE940B4: 81410034 lwz r10,52(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFE940B8: 7F23CB78 or r3,r25,r25
+ 5: GETL R25, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE940BC: 8101000C lwz r8,12(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R8
+ 12: INCEIPL $4
+
+ 0xFE940C0: 83C10028 lwz r30,40(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x28, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0xFE940C4: 7D4803A6 mtlr r10
+ 18: GETL R10, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFE940C8: 83E1002C lwz r31,44(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x2C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0xFE940CC: 7D008120 mtcrf 0x8,r8
+ 26: GETL R8, t20
+ 27: ICRFL t20, $0x4, CR
+ 28: INCEIPL $4
+
+ 0xFE940D0: 83010010 lwz r24,16(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x10, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R24
+ 33: INCEIPL $4
+
+ 0xFE940D4: 83210014 lwz r25,20(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x14, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R25
+ 38: INCEIPL $4
+
+ 0xFE940D8: 83410018 lwz r26,24(r1)
+ 39: GETL R1, t30
+ 40: ADDL $0x18, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R26
+ 43: INCEIPL $4
+
+ 0xFE940DC: 8361001C lwz r27,28(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x1C, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R27
+ 48: INCEIPL $4
+
+ 0xFE940E0: 83810020 lwz r28,32(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x20, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R28
+ 53: INCEIPL $4
+
+ 0xFE940E4: 83A10024 lwz r29,36(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x24, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R29
+ 58: INCEIPL $4
+
+ 0xFE940E8: 38210030 addi r1,r1,48
+ 59: GETL R1, t46
+ 60: ADDL $0x30, t46
+ 61: PUTL t46, R1
+ 62: INCEIPL $4
+
+ 0xFE940EC: 480ABD24 b 0xFF3FE10
+ 63: JMPo $0xFF3FE10 ($4)
+
+
+
+. 3545 FE940B4 60
+. 81 41 00 34 7F 23 CB 78 81 01 00 0C 83 C1 00 28 7D 48 03 A6 83 E1 00 2C 7D 00 81 20 83 01 00 10 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 38 21 00 30 48 0A BD 24
+==== BB 3546 __unregister_atfork(0xFF3FE10) approx BBs exec'd 0 ====
+
+ 0xFF3FE10: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFF3FE14: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFF3FE18: 48068039 bl 0xFFA7E50
+ 9: MOVL $0xFF3FE1C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3546 FF3FE10 12
+. 94 21 FF D0 7C 08 02 A6 48 06 80 39
+==== BB 3547 (0xFF3FE1C) approx BBs exec'd 0 ====
+
+ 0xFF3FE1C: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF3FE20: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFF3FE24: 93010010 stw r24,16(r1)
+ 8: GETL R24, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFF3FE28: 90010034 stw r0,52(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x34, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFF3FE2C: 93A10024 stw r29,36(r1)
+ 18: GETL R29, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x24, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFF3FE30: 831E1CD4 lwz r24,7380(r30)
+ 23: GETL R30, t18
+ 24: ADDL $0x1CD4, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R24
+ 27: INCEIPL $4
+
+ 0xFF3FE34: 93410018 stw r26,24(r1)
+ 28: GETL R26, t22
+ 29: GETL R1, t24
+ 30: ADDL $0x18, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0xFF3FE38: 7C7A1B78 or r26,r3,r3
+ 33: GETL R3, t26
+ 34: PUTL t26, R26
+ 35: INCEIPL $4
+
+ 0xFF3FE3C: 83B80000 lwz r29,0(r24)
+ 36: GETL R24, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R29
+ 39: INCEIPL $4
+
+ 0xFF3FE40: 9361001C stw r27,28(r1)
+ 40: GETL R27, t32
+ 41: GETL R1, t34
+ 42: ADDL $0x1C, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0xFF3FE44: 3B600000 li r27,0
+ 45: MOVL $0x0, t36
+ 46: PUTL t36, R27
+ 47: INCEIPL $4
+
+ 0xFF3FE48: 93E1002C stw r31,44(r1)
+ 48: GETL R31, t38
+ 49: GETL R1, t40
+ 50: ADDL $0x2C, t40
+ 51: STL t38, (t40)
+ 52: INCEIPL $4
+
+ 0xFF3FE4C: 7C3F0B78 or r31,r1,r1
+ 53: GETL R1, t42
+ 54: PUTL t42, R31
+ 55: INCEIPL $4
+
+ 0xFF3FE50: 93210014 stw r25,20(r1)
+ 56: GETL R25, t44
+ 57: GETL R1, t46
+ 58: ADDL $0x14, t46
+ 59: STL t44, (t46)
+ 60: INCEIPL $4
+
+ 0xFF3FE54: 93810020 stw r28,32(r1)
+ 61: GETL R28, t48
+ 62: GETL R1, t50
+ 63: ADDL $0x20, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0xFF3FE58: 48000018 b 0xFF3FE70
+ 66: JMPo $0xFF3FE70 ($4)
+
+
+
+. 3547 FF3FE1C 64
+. 93 C1 00 28 7F C8 02 A6 93 01 00 10 90 01 00 34 93 A1 00 24 83 1E 1C D4 93 41 00 18 7C 7A 1B 78 83 B8 00 00 93 61 00 1C 3B 60 00 00 93 E1 00 2C 7C 3F 0B 78 93 21 00 14 93 81 00 20 48 00 00 18
+==== BB 3548 (0xFF3FE70) approx BBs exec'd 0 ====
+
+ 0xFF3FE70: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFF3FE74: 409AFFE8 bc 4,26,0xFF3FE5C
+ 4: Jc26o $0xFF3FE5C
+
+
+
+. 3548 FF3FE70 8
+. 2F 1D 00 00 40 9A FF E8
+==== BB 3549 (0xFF3FE5C) approx BBs exec'd 0 ====
+
+ 0xFF3FE5C: 807D0010 lwz r3,16(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFF3FE60: 7F83D000 cmp cr7,r3,r26
+ 5: GETL R3, t4
+ 6: GETL R26, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFF3FE64: 419E0048 bc 12,30,0xFF3FEAC
+ 10: Js30o $0xFF3FEAC
+
+
+
+. 3549 FF3FE5C 12
+. 80 7D 00 10 7F 83 D0 00 41 9E 00 48
+==== BB 3550 (0xFF3FE68) approx BBs exec'd 0 ====
+
+ 0xFF3FE68: 7FBBEB78 or r27,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R27
+ 2: INCEIPL $4
+
+ 0xFF3FE6C: 83BD0000 lwz r29,0(r29)
+ 3: GETL R29, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R29
+ 6: INCEIPL $4
+
+ 0xFF3FE70: 2F1D0000 cmpi cr6,r29,0
+ 7: GETL R29, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x6, CR
+ 10: INCEIPL $4
+
+ 0xFF3FE74: 409AFFE8 bc 4,26,0xFF3FE5C
+ 11: Jc26o $0xFF3FE5C
+
+
+
+. 3550 FF3FE68 16
+. 7F BB EB 78 83 BD 00 00 2F 1D 00 00 40 9A FF E8
+==== BB 3551 (0xFF3FE78) approx BBs exec'd 0 ====
+
+ 0xFF3FE78: 80610000 lwz r3,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFF3FE7C: 83830004 lwz r28,4(r3)
+ 4: GETL R3, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R28
+ 8: INCEIPL $4
+
+ 0xFF3FE80: 8303FFE0 lwz r24,-32(r3)
+ 9: GETL R3, t8
+ 10: ADDL $0xFFFFFFE0, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R24
+ 13: INCEIPL $4
+
+ 0xFF3FE84: 7F8803A6 mtlr r28
+ 14: GETL R28, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0xFF3FE88: 8323FFE4 lwz r25,-28(r3)
+ 17: GETL R3, t14
+ 18: ADDL $0xFFFFFFE4, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R25
+ 21: INCEIPL $4
+
+ 0xFF3FE8C: 8343FFE8 lwz r26,-24(r3)
+ 22: GETL R3, t18
+ 23: ADDL $0xFFFFFFE8, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R26
+ 26: INCEIPL $4
+
+ 0xFF3FE90: 8363FFEC lwz r27,-20(r3)
+ 27: GETL R3, t22
+ 28: ADDL $0xFFFFFFEC, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R27
+ 31: INCEIPL $4
+
+ 0xFF3FE94: 8383FFF0 lwz r28,-16(r3)
+ 32: GETL R3, t26
+ 33: ADDL $0xFFFFFFF0, t26
+ 34: LDL (t26), t28
+ 35: PUTL t28, R28
+ 36: INCEIPL $4
+
+ 0xFF3FE98: 83A3FFF4 lwz r29,-12(r3)
+ 37: GETL R3, t30
+ 38: ADDL $0xFFFFFFF4, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R29
+ 41: INCEIPL $4
+
+ 0xFF3FE9C: 83C3FFF8 lwz r30,-8(r3)
+ 42: GETL R3, t34
+ 43: ADDL $0xFFFFFFF8, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R30
+ 46: INCEIPL $4
+
+ 0xFF3FEA0: 83E3FFFC lwz r31,-4(r3)
+ 47: GETL R3, t38
+ 48: ADDL $0xFFFFFFFC, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R31
+ 51: INCEIPL $4
+
+ 0xFF3FEA4: 7C611B78 or r1,r3,r3
+ 52: GETL R3, t42
+ 53: PUTL t42, R1
+ 54: INCEIPL $4
+
+ 0xFF3FEA8: 4E800020 blr
+ 55: GETL LR, t44
+ 56: JMPo-r t44 ($4)
+
+
+
+. 3551 FF3FE78 52
+. 80 61 00 00 83 83 00 04 83 03 FF E0 7F 88 03 A6 83 23 FF E4 83 43 FF E8 83 63 FF EC 83 83 FF F0 83 A3 FF F4 83 C3 FF F8 83 E3 FF FC 7C 61 1B 78 4E 80 00 20
+==== BB 3552 (0xFFDE950) approx BBs exec'd 0 ====
+
+ 0xFFDE950: 83FE800C lwz r31,-32756(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF800C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFFDE954: 48000014 b 0xFFDE968
+ 5: JMPo $0xFFDE968 ($4)
+
+
+
+. 3552 FFDE950 8
+. 83 FE 80 0C 48 00 00 14
+==== BB 3553 (0xFFDE968) approx BBs exec'd 0 ====
+
+ 0xFFDE968: 813F0000 lwz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFFDE96C: 81690000 lwz r11,0(r9)
+ 4: GETL R9, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R11
+ 7: INCEIPL $4
+
+ 0xFFDE970: 2F8B0000 cmpi cr7,r11,0
+ 8: GETL R11, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFFDE974: 409EFFE4 bc 4,30,0xFFDE958
+ 12: Jc30o $0xFFDE958
+
+
+
+. 3553 FFDE968 16
+. 81 3F 00 00 81 69 00 00 2F 8B 00 00 40 9E FF E4
+==== BB 3554 (0xFFDE978) approx BBs exec'd 0 ====
+
+ 0xFFDE978: 813E8000 lwz r9,-32768(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8000, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFFDE97C: 38000001 li r0,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFFDE980: 98090000 stb r0,0(r9)
+ 8: GETL R0, t6
+ 9: GETL R9, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFFDE984: 80010014 lwz r0,20(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x14, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R0
+ 16: INCEIPL $4
+
+ 0xFFDE988: 83C10008 lwz r30,8(r1)
+ 17: GETL R1, t14
+ 18: ADDL $0x8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R30
+ 21: INCEIPL $4
+
+ 0xFFDE98C: 83E1000C lwz r31,12(r1)
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R31
+ 26: INCEIPL $4
+
+ 0xFFDE990: 7C0803A6 mtlr r0
+ 27: GETL R0, t22
+ 28: PUTL t22, LR
+ 29: INCEIPL $4
+
+ 0xFFDE994: 38210010 addi r1,r1,16
+ 30: GETL R1, t24
+ 31: ADDL $0x10, t24
+ 32: PUTL t24, R1
+ 33: INCEIPL $4
+
+ 0xFFDE998: 4E800020 blr
+ 34: GETL LR, t26
+ 35: JMPo-r t26 ($4)
+
+
+
+. 3554 FFDE978 36
+. 81 3E 80 00 38 00 00 01 98 09 00 00 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3555 (0xFFDEF90) approx BBs exec'd 0 ====
+
+ 0xFFDEF90: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDEF94: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xFFDEF98: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xFFDEF9C: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 3555 FFDEF90 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3556 (0x2547BE74) approx BBs exec'd 0 ====
+
+ 0x2547BE74: 811C0178 lwz r8,376(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x178, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547BE78: 3968FFFF addi r11,r8,-1
+ 5: GETL R8, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0x2547BE7C: 917C0178 stw r11,376(r28)
+ 9: GETL R11, t6
+ 10: GETL R28, t8
+ 11: ADDL $0x178, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547BE80: 4BFFFEE0 b 0x2547BD60
+ 14: JMPo $0x2547BD60 ($4)
+
+
+
+. 3556 2547BE74 16
+. 81 1C 01 78 39 68 FF FF 91 7C 01 78 4B FF FE E0
+==== BB 3557 (0x2547BD60) approx BBs exec'd 0 ====
+
+ 0x2547BD60: 3B5A0001 addi r26,r26,1
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x2547BD64: 7F9A9840 cmpl cr7,r26,r19
+ 4: GETL R26, t2
+ 5: GETL R19, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547BD68: 419CFFD8 bc 12,28,0x2547BD40
+ 9: Js28o $0x2547BD40
+
+
+
+. 3557 2547BD60 12
+. 3B 5A 00 01 7F 9A 98 40 41 9C FF D8
+==== BB 3558 (0xEE87878) approx BBs exec'd 0 ====
+
+ 0xEE87878: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE8787C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE87880: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xEE87884: 4BFFA7B5 bl 0xEE82038
+ 14: MOVL $0xEE87888, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xEE82038 ($4)
+
+
+
+. 3558 EE87878 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 4B FF A7 B5
+==== BB 3559 (0xEE82038) approx BBs exec'd 0 ====
+
+ 0xEE82038: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE8203C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE82040: 429F0005 bcl 20,31,0xEE82044
+ 9: MOVL $0xEE82044, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xEE82044: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xEE82048: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xEE8204C: 93E1000C stw r31,12(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xEE82050: 90010014 stw r0,20(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xEE82054: 801EFFF0 lwz r0,-16(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0xFFFFFFF0, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xEE82058: 7FC0F214 add r30,r0,r30
+ 35: GETL R0, t26
+ 36: GETL R30, t28
+ 37: ADDL t26, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0xEE8205C: 813E8000 lwz r9,-32768(r30)
+ 40: GETL R30, t30
+ 41: ADDL $0xFFFF8000, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xEE82060: 88090000 lbz r0,0(r9)
+ 45: GETL R9, t34
+ 46: LDB (t34), t36
+ 47: PUTL t36, R0
+ 48: INCEIPL $4
+
+ 0xEE82064: 2F800000 cmpi cr7,r0,0
+ 49: GETL R0, t38
+ 50: CMP0L t38, t40 (-rSo)
+ 51: ICRFL t40, $0x7, CR
+ 52: INCEIPL $4
+
+ 0xEE82068: 409E0050 bc 4,30,0xEE820B8
+ 53: Jc30o $0xEE820B8
+
+
+
+. 3559 EE82038 52
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 88 09 00 00 2F 80 00 00 40 9E 00 50
+==== BB 3560 (0xEE8206C) approx BBs exec'd 0 ====
+
+ 0xEE8206C: 801E8004 lwz r0,-32764(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8004, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE82070: 2F800000 cmpi cr7,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xEE82074: 419E0010 bc 12,30,0xEE82084
+ 9: Js30o $0xEE82084
+
+
+
+. 3560 EE8206C 12
+. 80 1E 80 04 2F 80 00 00 41 9E 00 10
+==== BB 3561 (0xEE82078) approx BBs exec'd 0 ====
+
+ 0xEE82078: 813E8008 lwz r9,-32760(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8008, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xEE8207C: 80690000 lwz r3,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xEE82080: 48016361 bl 0xEE983E0
+ 9: MOVL $0xEE82084, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0xEE983E0 ($4)
+
+
+
+. 3561 EE82078 12
+. 81 3E 80 08 80 69 00 00 48 01 63 61
+==== BB 3562 (0xEE983E0) approx BBs exec'd 0 ====
+
+ 0xEE983E0: 396000F0 li r11,240
+ 0: MOVL $0xF0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xEE983E4: 4BFFFDF4 b 0xEE981D8
+ 3: JMPo $0xEE981D8 ($4)
+
+
+
+. 3562 EE983E0 8
+. 39 60 00 F0 4B FF FD F4
+==== BB 3563 (0xEE981D8) approx BBs exec'd 0 ====
+
+ 0xEE981D8: 556C083C rlwinm r12,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0xEE981DC: 7D6C5A14 add r11,r12,r11
+ 4: GETL R12, t2
+ 5: GETL R11, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0xEE981E0: 3980AF5C li r12,-20644
+ 9: MOVL $0xFFFFAF5C, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0xEE981E4: 3D8C2548 addis r12,r12,9544
+ 12: MOVL $0x2547AF5C, t8
+ 13: PUTL t8, R12
+ 14: INCEIPL $4
+
+ 0xEE981E8: 7D8903A6 mtctr r12
+ 15: GETL R12, t10
+ 16: PUTL t10, CTR
+ 17: INCEIPL $4
+
+ 0xEE981EC: 39808328 li r12,-31960
+ 18: MOVL $0xFFFF8328, t12
+ 19: PUTL t12, R12
+ 20: INCEIPL $4
+
+ 0xEE981F0: 3D8C2547 addis r12,r12,9543
+ 21: MOVL $0x25468328, t14
+ 22: PUTL t14, R12
+ 23: INCEIPL $4
+
+ 0xEE981F4: 4E800420 bctr
+ 24: GETL CTR, t16
+ 25: JMPo t16 ($4)
+
+
+
+. 3563 EE981D8 32
+. 55 6C 08 3C 7D 6C 5A 14 39 80 AF 5C 3D 8C 25 48 7D 89 03 A6 39 80 83 28 3D 8C 25 47 4E 80 04 20
+==== BB 3564 (0xEE82084) approx BBs exec'd 0 ====
+
+ 0xEE82084: 83FE800C lwz r31,-32756(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF800C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xEE82088: 48000014 b 0xEE8209C
+ 5: JMPo $0xEE8209C ($4)
+
+
+
+. 3564 EE82084 8
+. 83 FE 80 0C 48 00 00 14
+==== BB 3565 (0xEE8209C) approx BBs exec'd 0 ====
+
+ 0xEE8209C: 813F0000 lwz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xEE820A0: 81690000 lwz r11,0(r9)
+ 4: GETL R9, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R11
+ 7: INCEIPL $4
+
+ 0xEE820A4: 2F8B0000 cmpi cr7,r11,0
+ 8: GETL R11, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xEE820A8: 409EFFE4 bc 4,30,0xEE8208C
+ 12: Jc30o $0xEE8208C
+
+
+
+. 3565 EE8209C 16
+. 81 3F 00 00 81 69 00 00 2F 8B 00 00 40 9E FF E4
+==== BB 3566 (0xEE820AC) approx BBs exec'd 0 ====
+
+ 0xEE820AC: 813E8000 lwz r9,-32768(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8000, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xEE820B0: 38000001 li r0,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xEE820B4: 98090000 stb r0,0(r9)
+ 8: GETL R0, t6
+ 9: GETL R9, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0xEE820B8: 80010014 lwz r0,20(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x14, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R0
+ 16: INCEIPL $4
+
+ 0xEE820BC: 83C10008 lwz r30,8(r1)
+ 17: GETL R1, t14
+ 18: ADDL $0x8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R30
+ 21: INCEIPL $4
+
+ 0xEE820C0: 83E1000C lwz r31,12(r1)
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R31
+ 26: INCEIPL $4
+
+ 0xEE820C4: 7C0803A6 mtlr r0
+ 27: GETL R0, t22
+ 28: PUTL t22, LR
+ 29: INCEIPL $4
+
+ 0xEE820C8: 38210010 addi r1,r1,16
+ 30: GETL R1, t24
+ 31: ADDL $0x10, t24
+ 32: PUTL t24, R1
+ 33: INCEIPL $4
+
+ 0xEE820CC: 4E800020 blr
+ 34: GETL LR, t26
+ 35: JMPo-r t26 ($4)
+
+
+
+. 3566 EE820AC 36
+. 81 3E 80 00 38 00 00 01 98 09 00 00 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3567 (0xEE87888) approx BBs exec'd 0 ====
+
+ 0xEE87888: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE8788C: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xEE87890: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xEE87894: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 3567 EE87888 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3568 (0xEE3D124) approx BBs exec'd 0 ====
+
+ 0xEE3D124: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE3D128: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE3D12C: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xEE3D130: 4BFF7161 bl 0xEE34290
+ 14: MOVL $0xEE3D134, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xEE34290 ($4)
+
+
+
+. 3568 EE3D124 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 4B FF 71 61
+==== BB 3569 (0xEE34290) approx BBs exec'd 0 ====
+
+ 0xEE34290: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xEE34294: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xEE34298: 429F0005 bcl 20,31,0xEE3429C
+ 9: MOVL $0xEE3429C, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xEE3429C: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xEE342A0: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xEE342A4: 93E1000C stw r31,12(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xEE342A8: 90010014 stw r0,20(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xEE342AC: 801EFFF0 lwz r0,-16(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0xFFFFFFF0, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xEE342B0: 7FC0F214 add r30,r0,r30
+ 35: GETL R0, t26
+ 36: GETL R30, t28
+ 37: ADDL t26, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0xEE342B4: 813E8000 lwz r9,-32768(r30)
+ 40: GETL R30, t30
+ 41: ADDL $0xFFFF8000, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xEE342B8: 88090000 lbz r0,0(r9)
+ 45: GETL R9, t34
+ 46: LDB (t34), t36
+ 47: PUTL t36, R0
+ 48: INCEIPL $4
+
+ 0xEE342BC: 2F800000 cmpi cr7,r0,0
+ 49: GETL R0, t38
+ 50: CMP0L t38, t40 (-rSo)
+ 51: ICRFL t40, $0x7, CR
+ 52: INCEIPL $4
+
+ 0xEE342C0: 409E0050 bc 4,30,0xEE34310
+ 53: Jc30o $0xEE34310
+
+
+
+. 3569 EE34290 52
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 88 09 00 00 2F 80 00 00 40 9E 00 50
+==== BB 3570 (0xEE342C4) approx BBs exec'd 0 ====
+
+ 0xEE342C4: 801E8004 lwz r0,-32764(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8004, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE342C8: 2F800000 cmpi cr7,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xEE342CC: 419E0010 bc 12,30,0xEE342DC
+ 9: Js30o $0xEE342DC
+
+
+
+. 3570 EE342C4 12
+. 80 1E 80 04 2F 80 00 00 41 9E 00 10
+==== BB 3571 (0xEE342D0) approx BBs exec'd 0 ====
+
+ 0xEE342D0: 813E8008 lwz r9,-32760(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8008, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xEE342D4: 80690000 lwz r3,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xEE342D8: 4801B805 bl 0xEE4FADC
+ 9: MOVL $0xEE342DC, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0xEE4FADC ($4)
+
+
+
+. 3571 EE342D0 12
+. 81 3E 80 08 80 69 00 00 48 01 B8 05
+==== BB 3572 (0xEE4FADC) approx BBs exec'd 0 ====
+
+ 0xEE4FADC: 39600070 li r11,112
+ 0: MOVL $0x70, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xEE4FAE0: 4BFFFEF4 b 0xEE4F9D4
+ 3: JMPo $0xEE4F9D4 ($4)
+
+
+
+. 3572 EE4FADC 8
+. 39 60 00 70 4B FF FE F4
+==== BB 3573 (0xEE342DC) approx BBs exec'd 0 ====
+
+ 0xEE342DC: 83FE800C lwz r31,-32756(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF800C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xEE342E0: 48000014 b 0xEE342F4
+ 5: JMPo $0xEE342F4 ($4)
+
+
+
+. 3573 EE342DC 8
+. 83 FE 80 0C 48 00 00 14
+==== BB 3574 (0xEE342F4) approx BBs exec'd 0 ====
+
+ 0xEE342F4: 813F0000 lwz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xEE342F8: 81690000 lwz r11,0(r9)
+ 4: GETL R9, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R11
+ 7: INCEIPL $4
+
+ 0xEE342FC: 2F8B0000 cmpi cr7,r11,0
+ 8: GETL R11, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xEE34300: 409EFFE4 bc 4,30,0xEE342E4
+ 12: Jc30o $0xEE342E4
+
+
+
+. 3574 EE342F4 16
+. 81 3F 00 00 81 69 00 00 2F 8B 00 00 40 9E FF E4
+==== BB 3575 (0xEE34304) approx BBs exec'd 0 ====
+
+ 0xEE34304: 813E8000 lwz r9,-32768(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8000, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xEE34308: 38000001 li r0,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xEE3430C: 98090000 stb r0,0(r9)
+ 8: GETL R0, t6
+ 9: GETL R9, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0xEE34310: 80010014 lwz r0,20(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x14, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R0
+ 16: INCEIPL $4
+
+ 0xEE34314: 83C10008 lwz r30,8(r1)
+ 17: GETL R1, t14
+ 18: ADDL $0x8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R30
+ 21: INCEIPL $4
+
+ 0xEE34318: 83E1000C lwz r31,12(r1)
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R31
+ 26: INCEIPL $4
+
+ 0xEE3431C: 7C0803A6 mtlr r0
+ 27: GETL R0, t22
+ 28: PUTL t22, LR
+ 29: INCEIPL $4
+
+ 0xEE34320: 38210010 addi r1,r1,16
+ 30: GETL R1, t24
+ 31: ADDL $0x10, t24
+ 32: PUTL t24, R1
+ 33: INCEIPL $4
+
+ 0xEE34324: 4E800020 blr
+ 34: GETL LR, t26
+ 35: JMPo-r t26 ($4)
+
+
+
+. 3575 EE34304 36
+. 81 3E 80 00 38 00 00 01 98 09 00 00 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3576 (0xEE3D134) approx BBs exec'd 0 ====
+
+ 0xEE3D134: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xEE3D138: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xEE3D13C: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xEE3D140: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 3576 EE3D134 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3577 (0xFFB1EC0) approx BBs exec'd 0 ====
+
+ 0xFFB1EC0: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFB1EC4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFB1EC8: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFFB1ECC: 4BFFEED5 bl 0xFFB0DA0
+ 14: MOVL $0xFFB1ED0, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFFB0DA0 ($4)
+
+
+
+. 3577 FFB1EC0 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 4B FF EE D5
+==== BB 3578 (0xFFB0DA0) approx BBs exec'd 0 ====
+
+ 0xFFB0DA0: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFB0DA4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFB0DA8: 429F0005 bcl 20,31,0xFFB0DAC
+ 9: MOVL $0xFFB0DAC, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFFB0DAC: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFFB0DB0: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xFFB0DB4: 93E1000C stw r31,12(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xFFB0DB8: 90010014 stw r0,20(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFFB0DBC: 801EFFF0 lwz r0,-16(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0xFFFFFFF0, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFFB0DC0: 7FC0F214 add r30,r0,r30
+ 35: GETL R0, t26
+ 36: GETL R30, t28
+ 37: ADDL t26, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0xFFB0DC4: 813E8000 lwz r9,-32768(r30)
+ 40: GETL R30, t30
+ 41: ADDL $0xFFFF8000, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xFFB0DC8: 88090000 lbz r0,0(r9)
+ 45: GETL R9, t34
+ 46: LDB (t34), t36
+ 47: PUTL t36, R0
+ 48: INCEIPL $4
+
+ 0xFFB0DCC: 2F800000 cmpi cr7,r0,0
+ 49: GETL R0, t38
+ 50: CMP0L t38, t40 (-rSo)
+ 51: ICRFL t40, $0x7, CR
+ 52: INCEIPL $4
+
+ 0xFFB0DD0: 409E0050 bc 4,30,0xFFB0E20
+ 53: Jc30o $0xFFB0E20
+
+
+
+. 3578 FFB0DA0 52
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 88 09 00 00 2F 80 00 00 40 9E 00 50
+==== BB 3579 (0xFFB0DD4) approx BBs exec'd 0 ====
+
+ 0xFFB0DD4: 801E8004 lwz r0,-32764(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8004, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFB0DD8: 2F800000 cmpi cr7,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFFB0DDC: 419E0010 bc 12,30,0xFFB0DEC
+ 9: Js30o $0xFFB0DEC
+
+
+
+. 3579 FFB0DD4 12
+. 80 1E 80 04 2F 80 00 00 41 9E 00 10
+==== BB 3580 (0xFFB0DE0) approx BBs exec'd 0 ====
+
+ 0xFFB0DE0: 813E8008 lwz r9,-32760(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8008, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFFB0DE4: 80690000 lwz r3,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFFB0DE8: 4801235D bl 0xFFC3144
+ 9: MOVL $0xFFB0DEC, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0xFFC3144 ($4)
+
+
+
+. 3580 FFB0DE0 12
+. 81 3E 80 08 80 69 00 00 48 01 23 5D
+==== BB 3581 (0xFFC3144) approx BBs exec'd 0 ====
+
+ 0xFFC3144: 39600028 li r11,40
+ 0: MOVL $0x28, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFFC3148: 4BFFFF84 b 0xFFC30CC
+ 3: JMPo $0xFFC30CC ($4)
+
+
+
+. 3581 FFC3144 8
+. 39 60 00 28 4B FF FF 84
+==== BB 3582 (0xFFC30CC) approx BBs exec'd 0 ====
+
+ 0xFFC30CC: 556C083C rlwinm r12,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0xFFC30D0: 7D6C5A14 add r11,r12,r11
+ 4: GETL R12, t2
+ 5: GETL R11, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0xFFC30D4: 3980AF5C li r12,-20644
+ 9: MOVL $0xFFFFAF5C, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0xFFC30D8: 3D8C2548 addis r12,r12,9544
+ 12: MOVL $0x2547AF5C, t8
+ 13: PUTL t8, R12
+ 14: INCEIPL $4
+
+ 0xFFC30DC: 7D8903A6 mtctr r12
+ 15: GETL R12, t10
+ 16: PUTL t10, CTR
+ 17: INCEIPL $4
+
+ 0xFFC30E0: 39808B90 li r12,-29808
+ 18: MOVL $0xFFFF8B90, t12
+ 19: PUTL t12, R12
+ 20: INCEIPL $4
+
+ 0xFFC30E4: 3D8C2547 addis r12,r12,9543
+ 21: MOVL $0x25468B90, t14
+ 22: PUTL t14, R12
+ 23: INCEIPL $4
+
+ 0xFFC30E8: 4E800420 bctr
+ 24: GETL CTR, t16
+ 25: JMPo t16 ($4)
+
+
+
+. 3582 FFC30CC 32
+. 55 6C 08 3C 7D 6C 5A 14 39 80 AF 5C 3D 8C 25 48 7D 89 03 A6 39 80 8B 90 3D 8C 25 47 4E 80 04 20
+==== BB 3583 (0xFFB0DEC) approx BBs exec'd 0 ====
+
+ 0xFFB0DEC: 83FE800C lwz r31,-32756(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF800C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFFB0DF0: 48000014 b 0xFFB0E04
+ 5: JMPo $0xFFB0E04 ($4)
+
+
+
+. 3583 FFB0DEC 8
+. 83 FE 80 0C 48 00 00 14
+==== BB 3584 (0xFFB0E04) approx BBs exec'd 0 ====
+
+ 0xFFB0E04: 813F0000 lwz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFFB0E08: 81690000 lwz r11,0(r9)
+ 4: GETL R9, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R11
+ 7: INCEIPL $4
+
+ 0xFFB0E0C: 2F8B0000 cmpi cr7,r11,0
+ 8: GETL R11, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFFB0E10: 409EFFE4 bc 4,30,0xFFB0DF4
+ 12: Jc30o $0xFFB0DF4
+
+
+
+. 3584 FFB0E04 16
+. 81 3F 00 00 81 69 00 00 2F 8B 00 00 40 9E FF E4
+==== BB 3585 (0xFFB0DF4) approx BBs exec'd 0 ====
+
+ 0xFFB0DF4: 38090004 addi r0,r9,4
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0xFFB0DF8: 7D6803A6 mtlr r11
+ 4: GETL R11, t2
+ 5: PUTL t2, LR
+ 6: INCEIPL $4
+
+ 0xFFB0DFC: 901F0000 stw r0,0(r31)
+ 7: GETL R0, t4
+ 8: GETL R31, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0xFFB0E00: 4E800021 blrl
+ 11: GETL LR, t8
+ 12: MOVL $0xFFB0E04, t10
+ 13: PUTL t10, LR
+ 14: JMPo-r t8 ($4)
+
+
+
+. 3585 FFB0DF4 16
+. 38 09 00 04 7D 68 03 A6 90 1F 00 00 4E 80 00 21
+==== BB 3586 fini(0xFFB16B0) approx BBs exec'd 0 ====
+
+ 0xFFB16B0: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFB16B4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFB16B8: 48011951 bl 0xFFC3008
+ 9: MOVL $0xFFB16BC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC3008 ($4)
+
+
+
+. 3586 FFB16B0 12
+. 94 21 FF F0 7C 08 02 A6 48 01 19 51
+==== BB 3587 (0xFFB16BC) approx BBs exec'd 0 ====
+
+ 0xFFB16BC: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFFB16C0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFFB16C4: 93E1000C stw r31,12(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFFB16C8: 90010014 stw r0,20(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFFB16CC: 813E002C lwz r9,44(r30)
+ 18: GETL R30, t14
+ 19: ADDL $0x2C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R9
+ 22: INCEIPL $4
+
+ 0xFFB16D0: 809E0038 lwz r4,56(r30)
+ 23: GETL R30, t18
+ 24: ADDL $0x38, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R4
+ 27: INCEIPL $4
+
+ 0xFFB16D4: 83E9000C lwz r31,12(r9)
+ 28: GETL R9, t22
+ 29: ADDL $0xC, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R31
+ 32: INCEIPL $4
+
+ 0xFFB16D8: 2F9F0000 cmpi cr7,r31,0
+ 33: GETL R31, t26
+ 34: CMP0L t26, t28 (-rSo)
+ 35: ICRFL t28, $0x7, CR
+ 36: INCEIPL $4
+
+ 0xFFB16DC: 7FE3FB78 or r3,r31,r31
+ 37: GETL R31, t30
+ 38: PUTL t30, R3
+ 39: INCEIPL $4
+
+ 0xFFB16E0: 419E0014 bc 12,30,0xFFB16F4
+ 40: Js30o $0xFFB16F4
+
+
+
+. 3587 FFB16BC 40
+. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 81 3E 00 2C 80 9E 00 38 83 E9 00 0C 2F 9F 00 00 7F E3 FB 78 41 9E 00 14
+==== BB 3588 (0xFFB16F4) approx BBs exec'd 0 ====
+
+ 0xFFB16F4: 80610014 lwz r3,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFFB16F8: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFFB16FC: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xFFB1700: 7C6803A6 mtlr r3
+ 15: GETL R3, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFFB1704: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xFFB1708: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 3588 FFB16F4 24
+. 80 61 00 14 83 C1 00 08 83 E1 00 0C 7C 68 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3589 (0xFFB0E14) approx BBs exec'd 0 ====
+
+ 0xFFB0E14: 813E8000 lwz r9,-32768(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8000, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFFB0E18: 38000001 li r0,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFFB0E1C: 98090000 stb r0,0(r9)
+ 8: GETL R0, t6
+ 9: GETL R9, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFFB0E20: 80010014 lwz r0,20(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x14, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R0
+ 16: INCEIPL $4
+
+ 0xFFB0E24: 83C10008 lwz r30,8(r1)
+ 17: GETL R1, t14
+ 18: ADDL $0x8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R30
+ 21: INCEIPL $4
+
+ 0xFFB0E28: 83E1000C lwz r31,12(r1)
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R31
+ 26: INCEIPL $4
+
+ 0xFFB0E2C: 7C0803A6 mtlr r0
+ 27: GETL R0, t22
+ 28: PUTL t22, LR
+ 29: INCEIPL $4
+
+ 0xFFB0E30: 38210010 addi r1,r1,16
+ 30: GETL R1, t24
+ 31: ADDL $0x10, t24
+ 32: PUTL t24, R1
+ 33: INCEIPL $4
+
+ 0xFFB0E34: 4E800020 blr
+ 34: GETL LR, t26
+ 35: JMPo-r t26 ($4)
+
+
+
+. 3589 FFB0E14 36
+. 81 3E 80 00 38 00 00 01 98 09 00 00 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3590 (0xFFB1ED0) approx BBs exec'd 0 ====
+
+ 0xFFB1ED0: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFB1ED4: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xFFB1ED8: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xFFB1EDC: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+
+. 3590 FFB1ED0 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3591 (0x2547BE14) approx BBs exec'd 0 ====
+
+ 0x2547BE14: 809C0090 lwz r4,144(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x90, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547BE18: 80690004 lwz r3,4(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547BE1C: 83640004 lwz r27,4(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R27
+ 14: INCEIPL $4
+
+ 0x2547BE20: 801C0000 lwz r0,0(r28)
+ 15: GETL R28, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R0
+ 18: INCEIPL $4
+
+ 0x2547BE24: 576CF0BE rlwinm r12,r27,30,2,31
+ 19: GETL R27, t16
+ 20: SHRL $0x2, t16
+ 21: PUTL t16, R12
+ 22: INCEIPL $4
+
+ 0x2547BE28: 2F8C0000 cmpi cr7,r12,0
+ 23: GETL R12, t18
+ 24: CMP0L t18, t20 (-rSo)
+ 25: ICRFL t20, $0x7, CR
+ 26: INCEIPL $4
+
+ 0x2547BE2C: 7F601A14 add r27,r0,r3
+ 27: GETL R0, t22
+ 28: GETL R3, t24
+ 29: ADDL t22, t24
+ 30: PUTL t24, R27
+ 31: INCEIPL $4
+
+ 0x2547BE30: 3BACFFFF addi r29,r12,-1
+ 32: GETL R12, t26
+ 33: ADDL $0xFFFFFFFF, t26
+ 34: PUTL t26, R29
+ 35: INCEIPL $4
+
+ 0x2547BE34: 419E0020 bc 12,30,0x2547BE54
+ 36: Js30o $0x2547BE54
+
+
+
+. 3591 2547BE14 36
+. 80 9C 00 90 80 69 00 04 83 64 00 04 80 1C 00 00 57 6C F0 BE 2F 8C 00 00 7F 60 1A 14 3B AC FF FF 41 9E 00 20
+==== BB 3592 (0x2547BE38) approx BBs exec'd 0 ====
+
+ 0x2547BE38: 57A6103A rlwinm r6,r29,2,0,29
+ 0: GETL R29, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x2547BE3C: 7D26D82E lwzx r9,r6,r27
+ 4: GETL R27, t2
+ 5: GETL R6, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x2547BE40: 7D2903A6 mtctr r9
+ 10: GETL R9, t8
+ 11: PUTL t8, CTR
+ 12: INCEIPL $4
+
+ 0x2547BE44: 4E800421 bctrl
+ 13: MOVL $0x2547BE48, t10
+ 14: PUTL t10, LR
+ 15: GETL CTR, t12
+ 16: JMPo-c t12 ($4)
+
+
+
+. 3592 2547BE38 16
+. 57 A6 10 3A 7D 26 D8 2E 7D 29 03 A6 4E 80 04 21
+==== BB 3593 __libc_fini(0xFE7B5BC) approx BBs exec'd 0 ====
+
+ 0xFE7B5BC: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE7B5C0: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE7B5C4: 4812C88D bl 0xFFA7E50
+ 9: MOVL $0xFE7B5C8, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3593 FE7B5BC 12
+. 94 21 FF F0 7C 08 02 A6 48 12 C8 8D
+==== BB 3594 (0xFE7B5C8) approx BBs exec'd 0 ====
+
+ 0xFE7B5C8: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE7B5CC: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE7B5D0: 93E1000C stw r31,12(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE7B5D4: 90010014 stw r0,20(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE7B5D8: 813E0014 lwz r9,20(r30)
+ 18: GETL R30, t14
+ 19: ADDL $0x14, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R9
+ 22: INCEIPL $4
+
+ 0xFE7B5DC: 80090004 lwz r0,4(r9)
+ 23: GETL R9, t18
+ 24: ADDL $0x4, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R0
+ 27: INCEIPL $4
+
+ 0xFE7B5E0: 3BE90004 addi r31,r9,4
+ 28: GETL R9, t22
+ 29: ADDL $0x4, t22
+ 30: PUTL t22, R31
+ 31: INCEIPL $4
+
+ 0xFE7B5E4: 2F800000 cmpi cr7,r0,0
+ 32: GETL R0, t24
+ 33: CMP0L t24, t26 (-rSo)
+ 34: ICRFL t26, $0x7, CR
+ 35: INCEIPL $4
+
+ 0xFE7B5E8: 419E0018 bc 12,30,0xFE7B600
+ 36: Js30o $0xFE7B600
+
+
+
+. 3594 FE7B5C8 36
+. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 81 3E 00 14 80 09 00 04 3B E9 00 04 2F 80 00 00 41 9E 00 18
+==== BB 3595 (0xFE7B600) approx BBs exec'd 0 ====
+
+ 0xFE7B600: 80610014 lwz r3,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE7B604: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFE7B608: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xFE7B60C: 7C6803A6 mtlr r3
+ 15: GETL R3, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFE7B610: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xFE7B614: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+
+. 3595 FE7B600 24
+. 80 61 00 14 83 C1 00 08 83 E1 00 0C 7C 68 03 A6 38 21 00 10 4E 80 00 20
+==== BB 3596 (0x2547BE48) approx BBs exec'd 0 ====
+
+ 0x2547BE48: 2F9D0000 cmpi cr7,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547BE4C: 3BBDFFFF addi r29,r29,-1
+ 4: GETL R29, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x2547BE50: 409EFFE8 bc 4,30,0x2547BE38
+ 8: Jc30o $0x2547BE38
+
+
+
+. 3596 2547BE48 12
+. 2F 9D 00 00 3B BD FF FF 40 9E FF E8
+==== BB 3597 (0x2547BD54) approx BBs exec'd 0 ====
+
+ 0x2547BD54: 811C0178 lwz r8,376(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x178, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547BD58: 3968FFFF addi r11,r8,-1
+ 5: GETL R8, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0x2547BD5C: 917C0178 stw r11,376(r28)
+ 9: GETL R11, t6
+ 10: GETL R28, t8
+ 11: ADDL $0x178, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547BD60: 3B5A0001 addi r26,r26,1
+ 14: GETL R26, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R26
+ 17: INCEIPL $4
+
+ 0x2547BD64: 7F9A9840 cmpl cr7,r26,r19
+ 18: GETL R26, t12
+ 19: GETL R19, t14
+ 20: CMPUL t12, t14, t16 (-rSo)
+ 21: ICRFL t16, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x2547BD68: 419CFFD8 bc 12,28,0x2547BD40
+ 23: Js28o $0x2547BD40
+
+
+
+. 3597 2547BD54 24
+. 81 1C 01 78 39 68 FF FF 91 7C 01 78 3B 5A 00 01 7F 9A 98 40 41 9C FF D8
+==== BB 3598 (0x2547BD78) approx BBs exec'd 0 ====
+
+ 0x2547BD78: 81EE0000 lwz r15,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R15
+ 3: INCEIPL $4
+
+ 0x2547BD7C: 71E90080 andi. r9,r15,0x80
+ 4: GETL R15, t4
+ 5: ANDL $0x80, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547BD80: 408201AC bc 4,2,0x2547BF2C
+ 10: Jc02o $0x2547BF2C
+
+
+
+. 3598 2547BD78 12
+. 81 EE 00 00 71 E9 00 80 40 82 01 AC
+==== BB 3599 (0x2547BD84) approx BBs exec'd 0 ====
+
+ 0x2547BD84: 81410000 lwz r10,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0x2547BD88: 81CA0004 lwz r14,4(r10)
+ 4: GETL R10, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R14
+ 8: INCEIPL $4
+
+ 0x2547BD8C: 818AFFB4 lwz r12,-76(r10)
+ 9: GETL R10, t8
+ 10: ADDL $0xFFFFFFB4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0x2547BD90: 7DC803A6 mtlr r14
+ 14: GETL R14, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x2547BD94: 81EAFFBC lwz r15,-68(r10)
+ 17: GETL R10, t14
+ 18: ADDL $0xFFFFFFBC, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R15
+ 21: INCEIPL $4
+
+ 0x2547BD98: 81CAFFB8 lwz r14,-72(r10)
+ 22: GETL R10, t18
+ 23: ADDL $0xFFFFFFB8, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R14
+ 26: INCEIPL $4
+
+ 0x2547BD9C: 7D808120 mtcrf 0x8,r12
+ 27: GETL R12, t22
+ 28: ICRFL t22, $0x4, CR
+ 29: INCEIPL $4
+
+ 0x2547BDA0: 820AFFC0 lwz r16,-64(r10)
+ 30: GETL R10, t24
+ 31: ADDL $0xFFFFFFC0, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R16
+ 34: INCEIPL $4
+
+ 0x2547BDA4: 822AFFC4 lwz r17,-60(r10)
+ 35: GETL R10, t28
+ 36: ADDL $0xFFFFFFC4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R17
+ 39: INCEIPL $4
+
+ 0x2547BDA8: 824AFFC8 lwz r18,-56(r10)
+ 40: GETL R10, t32
+ 41: ADDL $0xFFFFFFC8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R18
+ 44: INCEIPL $4
+
+ 0x2547BDAC: 826AFFCC lwz r19,-52(r10)
+ 45: GETL R10, t36
+ 46: ADDL $0xFFFFFFCC, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R19
+ 49: INCEIPL $4
+
+ 0x2547BDB0: 828AFFD0 lwz r20,-48(r10)
+ 50: GETL R10, t40
+ 51: ADDL $0xFFFFFFD0, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R20
+ 54: INCEIPL $4
+
+ 0x2547BDB4: 82AAFFD4 lwz r21,-44(r10)
+ 55: GETL R10, t44
+ 56: ADDL $0xFFFFFFD4, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R21
+ 59: INCEIPL $4
+
+ 0x2547BDB8: 82CAFFD8 lwz r22,-40(r10)
+ 60: GETL R10, t48
+ 61: ADDL $0xFFFFFFD8, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R22
+ 64: INCEIPL $4
+
+ 0x2547BDBC: 82EAFFDC lwz r23,-36(r10)
+ 65: GETL R10, t52
+ 66: ADDL $0xFFFFFFDC, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R23
+ 69: INCEIPL $4
+
+ 0x2547BDC0: 830AFFE0 lwz r24,-32(r10)
+ 70: GETL R10, t56
+ 71: ADDL $0xFFFFFFE0, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R24
+ 74: INCEIPL $4
+
+ 0x2547BDC4: 832AFFE4 lwz r25,-28(r10)
+ 75: GETL R10, t60
+ 76: ADDL $0xFFFFFFE4, t60
+ 77: LDL (t60), t62
+ 78: PUTL t62, R25
+ 79: INCEIPL $4
+
+ 0x2547BDC8: 834AFFE8 lwz r26,-24(r10)
+ 80: GETL R10, t64
+ 81: ADDL $0xFFFFFFE8, t64
+ 82: LDL (t64), t66
+ 83: PUTL t66, R26
+ 84: INCEIPL $4
+
+ 0x2547BDCC: 836AFFEC lwz r27,-20(r10)
+ 85: GETL R10, t68
+ 86: ADDL $0xFFFFFFEC, t68
+ 87: LDL (t68), t70
+ 88: PUTL t70, R27
+ 89: INCEIPL $4
+
+ 0x2547BDD0: 838AFFF0 lwz r28,-16(r10)
+ 90: GETL R10, t72
+ 91: ADDL $0xFFFFFFF0, t72
+ 92: LDL (t72), t74
+ 93: PUTL t74, R28
+ 94: INCEIPL $4
+
+ 0x2547BDD4: 83AAFFF4 lwz r29,-12(r10)
+ 95: GETL R10, t76
+ 96: ADDL $0xFFFFFFF4, t76
+ 97: LDL (t76), t78
+ 98: PUTL t78, R29
+ 99: INCEIPL $4
+
+ 0x2547BDD8: 83CAFFF8 lwz r30,-8(r10)
+ 100: GETL R10, t80
+ 101: ADDL $0xFFFFFFF8, t80
+ 102: LDL (t80), t82
+ 103: PUTL t82, R30
+ 104: INCEIPL $4
+
+ 0x2547BDDC: 83EAFFFC lwz r31,-4(r10)
+ 105: GETL R10, t84
+ 106: ADDL $0xFFFFFFFC, t84
+ 107: LDL (t84), t86
+ 108: PUTL t86, R31
+ 109: INCEIPL $4
+
+ 0x2547BDE0: 7D415378 or r1,r10,r10
+ 110: GETL R10, t88
+ 111: PUTL t88, R1
+ 112: INCEIPL $4
+
+ 0x2547BDE4: 4E800020 blr
+ 113: GETL LR, t90
+ 114: JMPo-r t90 ($4)
+
+
+
+. 3599 2547BD84 100
+. 81 41 00 00 81 CA 00 04 81 8A FF B4 7D C8 03 A6 81 EA FF BC 81 CA FF B8 7D 80 81 20 82 0A FF C0 82 2A FF C4 82 4A FF C8 82 6A FF CC 82 8A FF D0 82 AA FF D4 82 CA FF D8 82 EA FF DC 83 0A FF E0 83 2A FF E4 83 4A FF E8 83 6A FF EC 83 8A FF F0 83 AA FF F4 83 CA FF F8 83 EA FF FC 7D 41 53 78 4E 80 00 20
+==== BB 3600 (0xFE93C54) approx BBs exec'd 0 ====
+
+ 0xFE93C54: 807F0000 lwz r3,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFE93C58: 80030000 lwz r0,0(r3)
+ 4: GETL R3, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xFE93C5C: 2F000000 cmpi cr6,r0,0
+ 8: GETL R0, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFE93C60: 901F0000 stw r0,0(r31)
+ 12: GETL R0, t12
+ 13: GETL R31, t14
+ 14: STL t12, (t14)
+ 15: INCEIPL $4
+
+ 0xFE93C64: 419AFF64 bc 12,26,0xFE93BC8
+ 16: Js26o $0xFE93BC8
+
+
+
+. 3600 FE93C54 20
+. 80 7F 00 00 80 03 00 00 2F 00 00 00 90 1F 00 00 41 9A FF 64
+==== BB 3601 (0xFE93BC8) approx BBs exec'd 0 ====
+
+ 0xFE93BC8: 2F800000 cmpi cr7,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE93BCC: 419E00CC bc 12,30,0xFE93C98
+ 4: Js30o $0xFE93C98
+
+
+
+. 3601 FE93BC8 8
+. 2F 80 00 00 41 9E 00 CC
+==== BB 3602 (0xFE93C98) approx BBs exec'd 0 ====
+
+ 0xFE93C98: 83FE1BBC lwz r31,7100(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BBC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFE93C9C: 83BE1C38 lwz r29,7224(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1C38, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0xFE93CA0: 7F9FE840 cmpl cr7,r31,r29
+ 10: GETL R31, t8
+ 11: GETL R29, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFE93CA4: 409C001C bc 4,28,0xFE93CC0
+ 15: Jc28o $0xFE93CC0
+
+
+
+. 3602 FE93C98 16
+. 83 FE 1B BC 83 BE 1C 38 7F 9F E8 40 40 9C 00 1C
+==== BB 3603 (0xFE93CA8) approx BBs exec'd 0 ====
+
+ 0xFE93CA8: 815F0000 lwz r10,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFE93CAC: 3BFF0004 addi r31,r31,4
+ 4: GETL R31, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0xFE93CB0: 7D4903A6 mtctr r10
+ 8: GETL R10, t6
+ 9: PUTL t6, CTR
+ 10: INCEIPL $4
+
+ 0xFE93CB4: 4E800421 bctrl
+ 11: MOVL $0xFE93CB8, t8
+ 12: PUTL t8, LR
+ 13: GETL CTR, t10
+ 14: JMPo-c t10 ($4)
+
+
+
+. 3603 FE93CA8 16
+. 81 5F 00 00 3B FF 00 04 7D 49 03 A6 4E 80 04 21
+==== BB 3604 _IO_cleanup(0xFECCB0C) approx BBs exec'd 0 ====
+
+ 0xFECCB0C: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFECCB10: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFECCB14: 480DB33D bl 0xFFA7E50
+ 9: MOVL $0xFECCB18, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3604 FECCB0C 12
+. 94 21 FF E0 7C 08 02 A6 48 0D B3 3D
+==== BB 3605 (0xFECCB18) approx BBs exec'd 0 ====
+
+ 0xFECCB18: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECCB1C: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFECCB20: 38600000 li r3,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFECCB24: 93810010 stw r28,16(r1)
+ 11: GETL R28, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x10, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFECCB28: 93E1001C stw r31,28(r1)
+ 16: GETL R31, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x1C, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFECCB2C: 93A10014 stw r29,20(r1)
+ 21: GETL R29, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFECCB30: 90010024 stw r0,36(r1)
+ 26: GETL R0, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x24, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xFECCB34: 4BFFF98D bl 0xFECC4C0
+ 31: MOVL $0xFECCB38, t24
+ 32: PUTL t24, LR
+ 33: JMPo-c $0xFECC4C0 ($4)
+
+
+
+. 3605 FECCB18 32
+. 93 C1 00 18 7F C8 02 A6 38 60 00 00 93 81 00 10 93 E1 00 1C 93 A1 00 14 90 01 00 24 4B FF F9 8D
+==== BB 3606 _IO_flush_all_lockp(0xFECC4C0) approx BBs exec'd 0 ====
+
+ 0xFECC4C0: 9421FFB0 stwu r1,-80(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFB0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFECC4C4: 7C8802A6 mflr r4
+ 6: GETL LR, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFECC4C8: 480DB989 bl 0xFFA7E50
+ 9: MOVL $0xFECC4CC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3606 FECC4C0 12
+. 94 21 FF B0 7C 88 02 A6 48 0D B9 89
+==== BB 3607 (0xFECC4CC) approx BBs exec'd 0 ====
+
+ 0xFECC4CC: 93C10048 stw r30,72(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x48, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECC4D0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFECC4D4: 92C10028 stw r22,40(r1)
+ 8: GETL R22, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x28, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFECC4D8: 90810054 stw r4,84(r1)
+ 13: GETL R4, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x54, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFECC4DC: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0xFECC4E0: 92E1002C stw r23,44(r1)
+ 21: GETL R23, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x2C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFECC4E4: 3AE00000 li r23,0
+ 26: MOVL $0x0, t20
+ 27: PUTL t20, R23
+ 28: INCEIPL $4
+
+ 0xFECC4E8: 82DE1B48 lwz r22,6984(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x1B48, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R22
+ 33: INCEIPL $4
+
+ 0xFECC4EC: 93E1004C stw r31,76(r1)
+ 34: GETL R31, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x4C, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFECC4F0: 7C7F1B78 or r31,r3,r3
+ 39: GETL R3, t30
+ 40: PUTL t30, R31
+ 41: INCEIPL $4
+
+ 0xFECC4F4: 813600B8 lwz r9,184(r22)
+ 42: GETL R22, t32
+ 43: ADDL $0xB8, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R9
+ 46: INCEIPL $4
+
+ 0xFECC4F8: 93010030 stw r24,48(r1)
+ 47: GETL R24, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x30, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0xFECC4FC: 3169FFFF addic r11,r9,-1
+ 52: GETL R9, t40
+ 53: ADCL $0xFFFFFFFF, t40 (-wCa)
+ 54: PUTL t40, R11
+ 55: INCEIPL $4
+
+ 0xFECC500: 7C0B4910 subfe r0,r11,r9
+ 56: GETL R11, t42
+ 57: GETL R9, t44
+ 58: SBBL t42, t44 (-rCa-wCa)
+ 59: PUTL t44, R0
+ 60: INCEIPL $4
+
+ 0xFECC504: 93210034 stw r25,52(r1)
+ 61: GETL R25, t46
+ 62: GETL R1, t48
+ 63: ADDL $0x34, t48
+ 64: STL t46, (t48)
+ 65: INCEIPL $4
+
+ 0xFECC508: 2D800000 cmpi cr3,r0,0
+ 66: GETL R0, t50
+ 67: CMP0L t50, t52 (-rSo)
+ 68: ICRFL t52, $0x3, CR
+ 69: INCEIPL $4
+
+ 0xFECC50C: 93410038 stw r26,56(r1)
+ 70: GETL R26, t54
+ 71: GETL R1, t56
+ 72: ADDL $0x38, t56
+ 73: STL t54, (t56)
+ 74: INCEIPL $4
+
+ 0xFECC510: 9361003C stw r27,60(r1)
+ 75: GETL R27, t58
+ 76: GETL R1, t60
+ 77: ADDL $0x3C, t60
+ 78: STL t58, (t60)
+ 79: INCEIPL $4
+
+ 0xFECC514: 93810040 stw r28,64(r1)
+ 80: GETL R28, t62
+ 81: GETL R1, t64
+ 82: ADDL $0x40, t64
+ 83: STL t62, (t64)
+ 84: INCEIPL $4
+
+ 0xFECC518: 93A10044 stw r29,68(r1)
+ 85: GETL R29, t66
+ 86: GETL R1, t68
+ 87: ADDL $0x44, t68
+ 88: STL t66, (t68)
+ 89: INCEIPL $4
+
+ 0xFECC51C: 91810024 stw r12,36(r1)
+ 90: GETL R12, t70
+ 91: GETL R1, t72
+ 92: ADDL $0x24, t72
+ 93: STL t70, (t72)
+ 94: INCEIPL $4
+
+ 0xFECC520: 408E0248 bc 4,14,0xFECC768
+ 95: Jc14o $0xFECC768
+
+
+
+. 3607 FECC4CC 88
+. 93 C1 00 48 7F C8 02 A6 92 C1 00 28 90 81 00 54 7D 80 00 26 92 E1 00 2C 3A E0 00 00 82 DE 1B 48 93 E1 00 4C 7C 7F 1B 78 81 36 00 B8 93 01 00 30 31 69 FF FF 7C 0B 49 10 93 21 00 34 2D 80 00 00 93 41 00 38 93 61 00 3C 93 81 00 40 93 A1 00 44 91 81 00 24 40 8E 02 48
+==== BB 3608 (0xFECC524) approx BBs exec'd 0 ====
+
+ 0xFECC524: 807E05E4 lwz r3,1508(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5E4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECC528: 92E10014 stw r23,20(r1)
+ 5: GETL R23, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x14, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFECC52C: 90610010 stw r3,16(r1)
+ 10: GETL R3, t8
+ 11: GETL R1, t10
+ 12: ADDL $0x10, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFECC530: 2E1F0000 cmpi cr4,r31,0
+ 15: GETL R31, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x4, CR
+ 18: INCEIPL $4
+
+ 0xFECC534: 41920050 bc 12,18,0xFECC584
+ 19: Js18o $0xFECC584
+
+
+
+. 3608 FECC524 20
+. 80 7E 05 E4 92 E1 00 14 90 61 00 10 2E 1F 00 00 41 92 00 50
+==== BB 3609 (0xFECC584) approx BBs exec'd 0 ====
+
+ 0xFECC584: 831E1BEC lwz r24,7148(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BEC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0xFECC588: 833E05EC lwz r25,1516(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x5EC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0xFECC58C: 83F80000 lwz r31,0(r24)
+ 10: GETL R24, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R31
+ 13: INCEIPL $4
+
+ 0xFECC590: 83990000 lwz r28,0(r25)
+ 14: GETL R25, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R28
+ 17: INCEIPL $4
+
+ 0xFECC594: 2C9F0000 cmpi cr1,r31,0
+ 18: GETL R31, t16
+ 19: CMP0L t16, t18 (-rSo)
+ 20: ICRFL t18, $0x1, CR
+ 21: INCEIPL $4
+
+ 0xFECC598: 41860128 bc 12,6,0xFECC6C0
+ 22: Js06o $0xFECC6C0
+
+
+
+. 3609 FECC584 24
+. 83 1E 1B EC 83 3E 05 EC 83 F8 00 00 83 99 00 00 2C 9F 00 00 41 86 01 28
+==== BB 3610 (0xFECC59C) approx BBs exec'd 0 ====
+
+ 0xFECC59C: 835E05E8 lwz r26,1512(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFECC5A0: 3B600000 li r27,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R27
+ 7: INCEIPL $4
+
+ 0xFECC5A4: 93FA0000 stw r31,0(r26)
+ 8: GETL R31, t6
+ 9: GETL R26, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFECC5A8: 4192005C bc 12,18,0xFECC604
+ 12: Js18o $0xFECC604
+
+
+
+. 3610 FECC59C 16
+. 83 5E 05 E8 3B 60 00 00 93 FA 00 00 41 92 00 5C
+==== BB 3611 (0xFECC604) approx BBs exec'd 0 ====
+
+ 0xFECC604: 807F0060 lwz r3,96(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFECC608: 2F030000 cmpi cr6,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFECC60C: 40990144 bc 4,25,0xFECC750
+ 9: Jc25o $0xFECC750
+
+
+
+. 3611 FECC604 12
+. 80 7F 00 60 2F 03 00 00 40 99 01 44
+==== BB 3612 (0xFECC750) approx BBs exec'd 0 ====
+
+ 0xFECC750: 817F0014 lwz r11,20(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFECC754: 813F0010 lwz r9,16(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFECC758: 7C8B4840 cmpl cr1,r11,r9
+ 10: GETL R11, t8
+ 11: GETL R9, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0xFECC75C: 40A5FEB4 bc 5,5,0xFECC610
+ 15: Jc05o $0xFECC610
+
+
+
+. 3612 FECC750 16
+. 81 7F 00 14 81 3F 00 10 7C 8B 48 40 40 A5 FE B4
+==== BB 3613 (0xFECC610) approx BBs exec'd 0 ====
+
+ 0xFECC610: 895F0046 lbz r10,70(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFECC614: 2C0A0000 cmpi cr0,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFECC618: 40820044 bc 4,2,0xFECC65C
+ 9: Jc02o $0xFECC65C
+
+
+
+. 3613 FECC610 12
+. 89 5F 00 46 2C 0A 00 00 40 82 00 44
+==== BB 3614 (0xFECC61C) approx BBs exec'd 0 ====
+
+ 0xFECC61C: 40990040 bc 4,25,0xFECC65C
+ 0: Jc25o $0xFECC65C
+
+
+
+. 3614 FECC61C 4
+. 40 99 00 40
+==== BB 3615 (0xFECC65C) approx BBs exec'd 0 ====
+
+ 0xFECC65C: 41920044 bc 12,18,0xFECC6A0
+ 0: Js18o $0xFECC6A0
+
+
+
+. 3615 FECC65C 4
+. 41 92 00 44
+==== BB 3616 (0xFECC6A0) approx BBs exec'd 0 ====
+
+ 0xFECC6A0: 80190000 lwz r0,0(r25)
+ 0: GETL R25, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFECC6A4: 937A0000 stw r27,0(r26)
+ 4: GETL R27, t4
+ 5: GETL R26, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0xFECC6A8: 7F9C0000 cmp cr7,r28,r0
+ 8: GETL R28, t8
+ 9: GETL R0, t10
+ 10: CMPL t8, t10, t12 (-rSo)
+ 11: ICRFL t12, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFECC6AC: 419E009C bc 12,30,0xFECC748
+ 13: Js30o $0xFECC748
+
+
+
+. 3616 FECC6A0 16
+. 80 19 00 00 93 7A 00 00 7F 9C 00 00 41 9E 00 9C
+==== BB 3617 (0xFECC748) approx BBs exec'd 0 ====
+
+ 0xFECC748: 83FF0034 lwz r31,52(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFECC74C: 4BFFFF6C b 0xFECC6B8
+ 5: JMPo $0xFECC6B8 ($4)
+
+
+
+. 3617 FECC748 8
+. 83 FF 00 34 4B FF FF 6C
+==== BB 3618 (0xFECC6B8) approx BBs exec'd 0 ====
+
+ 0xFECC6B8: 2C1F0000 cmpi cr0,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFECC6BC: 4082FEE8 bc 4,2,0xFECC5A4
+ 4: Jc02o $0xFECC5A4
+
+
+
+. 3618 FECC6B8 8
+. 2C 1F 00 00 40 82 FE E8
+==== BB 3619 (0xFECC5A4) approx BBs exec'd 0 ====
+
+ 0xFECC5A4: 93FA0000 stw r31,0(r26)
+ 0: GETL R31, t0
+ 1: GETL R26, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFECC5A8: 4192005C bc 12,18,0xFECC604
+ 4: Js18o $0xFECC604
+
+
+
+. 3619 FECC5A4 8
+. 93 FA 00 00 41 92 00 5C
+==== BB 3620 (0xFECC6C0) approx BBs exec'd 0 ====
+
+ 0xFECC6C0: 41920038 bc 12,18,0xFECC6F8
+ 0: Js18o $0xFECC6F8
+
+
+
+. 3620 FECC6C0 4
+. 41 92 00 38
+==== BB 3621 (0xFECC6F8) approx BBs exec'd 0 ====
+
+ 0xFECC6F8: 408E0088 bc 4,14,0xFECC780
+ 0: Jc14o $0xFECC780
+
+
+
+. 3621 FECC6F8 4
+. 40 8E 00 88
+==== BB 3622 (0xFECC6FC) approx BBs exec'd 0 ====
+
+ 0xFECC6FC: 7EE3BB78 or r3,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFECC700: 81810024 lwz r12,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0xFECC704: 82E10054 lwz r23,84(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x54, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0xFECC708: 82C10028 lwz r22,40(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x28, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R22
+ 17: INCEIPL $4
+
+ 0xFECC70C: 7D818120 mtcrf 0x18,r12
+ 18: GETL R12, t14
+ 19: ICRFL t14, $0x3, CR
+ 20: ICRFL t14, $0x4, CR
+ 21: INCEIPL $4
+
+ 0xFECC710: 7EE803A6 mtlr r23
+ 22: GETL R23, t16
+ 23: PUTL t16, LR
+ 24: INCEIPL $4
+
+ 0xFECC714: 83010030 lwz r24,48(r1)
+ 25: GETL R1, t18
+ 26: ADDL $0x30, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R24
+ 29: INCEIPL $4
+
+ 0xFECC718: 82E1002C lwz r23,44(r1)
+ 30: GETL R1, t22
+ 31: ADDL $0x2C, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R23
+ 34: INCEIPL $4
+
+ 0xFECC71C: 83210034 lwz r25,52(r1)
+ 35: GETL R1, t26
+ 36: ADDL $0x34, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R25
+ 39: INCEIPL $4
+
+ 0xFECC720: 83410038 lwz r26,56(r1)
+ 40: GETL R1, t30
+ 41: ADDL $0x38, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R26
+ 44: INCEIPL $4
+
+ 0xFECC724: 8361003C lwz r27,60(r1)
+ 45: GETL R1, t34
+ 46: ADDL $0x3C, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R27
+ 49: INCEIPL $4
+
+ 0xFECC728: 83810040 lwz r28,64(r1)
+ 50: GETL R1, t38
+ 51: ADDL $0x40, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R28
+ 54: INCEIPL $4
+
+ 0xFECC72C: 83A10044 lwz r29,68(r1)
+ 55: GETL R1, t42
+ 56: ADDL $0x44, t42
+ 57: LDL (t42), t44
+ 58: PUTL t44, R29
+ 59: INCEIPL $4
+
+ 0xFECC730: 83C10048 lwz r30,72(r1)
+ 60: GETL R1, t46
+ 61: ADDL $0x48, t46
+ 62: LDL (t46), t48
+ 63: PUTL t48, R30
+ 64: INCEIPL $4
+
+ 0xFECC734: 83E1004C lwz r31,76(r1)
+ 65: GETL R1, t50
+ 66: ADDL $0x4C, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R31
+ 69: INCEIPL $4
+
+ 0xFECC738: 38210050 addi r1,r1,80
+ 70: GETL R1, t54
+ 71: ADDL $0x50, t54
+ 72: PUTL t54, R1
+ 73: INCEIPL $4
+
+ 0xFECC73C: 4E800020 blr
+ 74: GETL LR, t56
+ 75: JMPo-r t56 ($4)
+
+
+
+. 3622 FECC6FC 68
+. 7E E3 BB 78 81 81 00 24 82 E1 00 54 82 C1 00 28 7D 81 81 20 7E E8 03 A6 83 01 00 30 82 E1 00 2C 83 21 00 34 83 41 00 38 83 61 00 3C 83 81 00 40 83 A1 00 44 83 C1 00 48 83 E1 00 4C 38 21 00 50 4E 80 00 20
+==== BB 3623 (0xFECCB38) approx BBs exec'd 0 ====
+
+ 0xFECCB38: 813E1BEC lwz r9,7148(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BEC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFECCB3C: 7C7C1B78 or r28,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFECCB40: 83E90000 lwz r31,0(r9)
+ 8: GETL R9, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R31
+ 11: INCEIPL $4
+
+ 0xFECCB44: 2F9F0000 cmpi cr7,r31,0
+ 12: GETL R31, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0xFECCB48: 419E0080 bc 12,30,0xFECCBC8
+ 16: Js30o $0xFECCBC8
+
+
+
+. 3623 FECCB38 20
+. 81 3E 1B EC 7C 7C 1B 78 83 E9 00 00 2F 9F 00 00 41 9E 00 80
+==== BB 3624 (0xFECCB4C) approx BBs exec'd 0 ====
+
+ 0xFECCB4C: 3BA0FFFF li r29,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFECCB50: 48000014 b 0xFECCB64
+ 3: JMPo $0xFECCB64 ($4)
+
+
+
+. 3624 FECCB4C 8
+. 3B A0 FF FF 48 00 00 14
+==== BB 3625 (0xFECCB64) approx BBs exec'd 0 ====
+
+ 0xFECCB64: 801F0000 lwz r0,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFECCB68: 70090002 andi. r9,r0,0x2
+ 4: GETL R0, t4
+ 5: ANDL $0x2, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFECCB6C: 5403EFFE rlwinm r3,r0,29,31,31
+ 10: GETL R0, t8
+ 11: ROLL $0x1D, t8
+ 12: ANDL $0x1, t8
+ 13: PUTL t8, R3
+ 14: INCEIPL $4
+
+ 0xFECCB70: 2F830000 cmpi cr7,r3,0
+ 15: GETL R3, t10
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x7, CR
+ 18: INCEIPL $4
+
+ 0xFECCB74: 40A2FFE0 bc 5,2,0xFECCB54
+ 19: Jc02o $0xFECCB54
+
+
+
+. 3625 FECCB64 20
+. 80 1F 00 00 70 09 00 02 54 03 EF FE 2F 83 00 00 40 A2 FF E0
+==== BB 3626 (0xFECCB54) approx BBs exec'd 0 ====
+
+ 0xFECCB54: 93BF0060 stw r29,96(r31)
+ 0: GETL R29, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x60, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFECCB58: 83FF0034 lwz r31,52(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x34, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0xFECCB5C: 2F1F0000 cmpi cr6,r31,0
+ 10: GETL R31, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFECCB60: 419A0068 bc 12,26,0xFECCBC8
+ 14: Js26o $0xFECCBC8
+
+
+
+. 3626 FECCB54 16
+. 93 BF 00 60 83 FF 00 34 2F 1F 00 00 41 9A 00 68
+==== BB 3627 (0xFECCB78) approx BBs exec'd 0 ====
+
+ 0xFECCB78: 70091000 andi. r9,r0,0x1000
+ 0: GETL R0, t0
+ 1: ANDL $0x1000, t0
+ 2: PUTL t0, R9
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFECCB7C: 419E0008 bc 12,30,0xFECCB84
+ 6: Js30o $0xFECCB84
+
+
+
+. 3627 FECCB78 8
+. 70 09 10 00 41 9E 00 08
+==== BB 3628 (0xFECCB80) approx BBs exec'd 0 ====
+
+ 0xFECCB80: 41A2FFD4 bc 13,2,0xFECCB54
+ 0: Js02o $0xFECCB54
+
+
+
+. 3628 FECCB80 4
+. 41 A2 FF D4
+==== BB 3629 (0xFECCBC8) approx BBs exec'd 0 ====
+
+ 0xFECCBC8: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFECCBCC: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFECCBD0: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0xFECCBD4: 83810010 lwz r28,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0xFECCBD8: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFECCBDC: 83C10018 lwz r30,24(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x18, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R30
+ 25: INCEIPL $4
+
+ 0xFECCBE0: 83E1001C lwz r31,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0xFECCBE4: 38210020 addi r1,r1,32
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0xFECCBE8: 4E800020 blr
+ 35: GETL LR, t26
+ 36: JMPo-r t26 ($4)
+
+
+
+. 3629 FECCBC8 36
+. 80 81 00 24 7F 83 E3 78 83 A1 00 14 83 81 00 10 7C 88 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+==== BB 3630 (0xFE93CB8) approx BBs exec'd 0 ====
+
+ 0xFE93CB8: 7F9FE840 cmpl cr7,r31,r29
+ 0: GETL R31, t0
+ 1: GETL R29, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE93CBC: 419CFFEC bc 12,28,0xFE93CA8
+ 5: Js28o $0xFE93CA8
+
+
+
+. 3630 FE93CB8 8
+. 7F 9F E8 40 41 9C FF EC
+==== BB 3631 (0xFE93CC0) approx BBs exec'd 0 ====
+
+ 0xFE93CC0: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE93CC4: 48062141 bl 0xFEF5E04
+ 3: MOVL $0xFE93CC8, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFEF5E04 ($4)
+
+
+
+. 3631 FE93CC0 8
+. 7F 83 E3 78 48 06 21 41
+==== BB 3632 __GI__exit(0xFEF5E04) approx BBs exec'd 0 ====
+
+ 0xFEF5E04: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEF5E08: 480B2049 bl 0xFFA7E50
+ 6: MOVL $0xFEF5E0C, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFFA7E50 ($4)
+
+
+
+. 3632 FEF5E04 8
+. 94 21 FF E0 48 0B 20 49
+==== BB 3633 (0xFEF5E0C) approx BBs exec'd 0 ====
+
+ 0xFEF5E0C: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEF5E10: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEF5E14: 93A10014 stw r29,20(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEF5E18: 93E1001C stw r31,28(r1)
+ 13: GETL R31, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x1C, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEF5E1C: 7C7F1B78 or r31,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0xFEF5E20: 813E1C4C lwz r9,7244(r30)
+ 21: GETL R30, t16
+ 22: ADDL $0x1C4C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R9
+ 25: INCEIPL $4
+
+ 0xFEF5E24: 7FA91214 add r29,r9,r2
+ 26: GETL R9, t20
+ 27: GETL R2, t22
+ 28: ADDL t20, t22
+ 29: PUTL t22, R29
+ 30: INCEIPL $4
+
+ 0xFEF5E28: 380000EA li r0,234
+ 31: MOVL $0xEA, t24
+ 32: PUTL t24, R0
+ 33: INCEIPL $4
+
+ 0xFEF5E2C: 7FE3FB78 or r3,r31,r31
+ 34: GETL R31, t26
+ 35: PUTL t26, R3
+ 36: INCEIPL $4
+
+ 0xFEF5E30: 44000002 sc
+ 37: JMPo-sys $0xFEF5E34 ($4)
+
+
+
+. 3633 FEF5E0C 40
+. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 93 E1 00 1C 7C 7F 1B 78 81 3E 1C 4C 7F A9 12 14 38 00 00 EA 7F E3 FB 78 44 00 00 02
diff --git a/main/VEX/orig_ppc32/loadsafp.orig b/main/VEX/orig_ppc32/loadsafp.orig
new file mode 100644
index 0000000..fea268b
--- /dev/null
+++ b/main/VEX/orig_ppc32/loadsafp.orig
@@ -0,0 +1,22354 @@
+==3281== Nulgrind, a binary JIT-compiler for Linux.
+==3281== Copyright (C) 2002-2004, and GNU GPL'd, by Nicholas Nethercote.
+==3281== Using valgrind-2.2.0-ppc, a program supervision framework for Linux.
+==3281== Copyright (C) 2000-2004, and GNU GPL'd, by Julian Seward et al.
+==3281== For more details, rerun with: -v
+==3281==
+. 0 254804D4 20
+. 7C 23 0B 78 38 80 00 00 38 21 FF F0 90 81 00 00 4B FF 15 81
+
+. 0 25471A64 80
+. 7C 08 02 A6 39 60 00 4B 94 21 FD 50 7D 69 03 A6 92 E1 02 8C 90 01 02 B4 7C 77 1B 78 93 01 02 90 38 00 00 00 93 21 02 94 39 21 00 30 93 41 02 98 93 61 02 9C 93 81 02 A0 93 A1 02 A4 93 C1 02 A8 93 E1 02 AC 90 09 00 00 39 29 00 04 42 00 FF F8
+
+. 0 25471AA8 12
+. 90 09 00 00 39 29 00 04 42 00 FF F8
+
+. 0 25471AB4 4
+. 48 00 00 09
+
+. 0 25471ABC 12
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+
+. 0 25497000 4
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+
+. 0 25471AC8 64
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+
+. 0 25471B08 64
+. 3F E0 6F FF 3F 60 70 00 3F 40 6F FF 3F 20 6F FF 3F A0 6F FF 3F 80 6F FF 7C 0B 03 78 63 E6 FF FF 63 65 00 21 63 44 FD FF 63 23 FE 34 63 BD FE FF 63 9C FF 40 2C 0B 00 21 55 60 10 3A 40 81 00 18
+
+. 0 25471B5C 16
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+
+. 0 25471B3C 12
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+
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+
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+
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+
+. 0 25471E40 12
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+
+. 0 25471E4C 12
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+
+. 0 25471B6C 12
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+
+. 0 25471B78 12
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+
+. 0 25471B84 24
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+
+. 0 25471B9C 24
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+
+. 0 25471BB4 24
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+
+. 0 25471BCC 24
+. 83 A9 00 04 7F 9D 5A 14 93 89 00 04 81 28 00 1C 2F 89 00 00 41 9E 00 10
+
+. 0 25471BE4 24
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+
+. 0 25471BFC 24
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+
+. 0 25471C14 32
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+
+. 0 25471C40 20
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+
+. 0 25480830 16
+. 7C C8 02 A6 94 21 FF D0 7D 80 00 26 48 01 67 C5
+
+. 0 25480840 68
+. 93 21 00 14 7C 99 23 78 90 C1 00 34 80 03 00 7C 93 A1 00 24 7C 7D 1B 78 2F 80 00 00 93 C1 00 28 92 E1 00 0C 7F C8 02 A6 93 01 00 10 93 41 00 18 93 61 00 1C 93 81 00 20 93 E1 00 2C 91 81 00 08 41 9E 02 94
+
+. 0 25480884 56
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+
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+
+. 0 254808BC 72
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+
+. 0 25480A78 32
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+
+. 0 25480AA4 4
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+
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+
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+
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+
+. 0 25480ACC 28
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+
+. 0 25480AF8 8
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+
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+
+. 0 25480AF4 12
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+
+. 0 25480B00 12
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+
+. 0 25480B0C 72
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+
+. 0 25471C54 44
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+
+. 0 25471C80 28
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+
+. 0 25471CA8 48
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+
+. 0 25471CD8 32
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+
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+
+. 0 25471D0C 28
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+
+. 0 25471D28 8
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+
+. 0 25471D30 32
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+
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+
+. 0 25471D58 12
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+
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+
+. 0 25471D74 28
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+
+. 0 25471D90 8
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+
+. 0 25471E04 12
+. 3B FF 00 0C 91 28 00 00 4B FF FF A4
+
+. 0 25471DB0 8
+. 7C 9F E0 40 41 84 FF 7C
+
+. 0 25471D98 20
+. 7F 03 C3 78 7F E4 FB 78 38 A0 00 00 7C C7 33 78 48 00 EF 01
+
+. 0 25480CA8 16
+. 2B 8A 00 4D 7C 08 02 A6 94 21 FF D0 48 01 63 4D
+
+. 0 25480CB8 68
+. 93 41 00 18 7D 3A 4B 78 93 61 00 1C 7C DB 33 78 93 81 00 20 7C 9C 23 78 93 A1 00 24 7C BD 2B 78 93 C1 00 28 7F C8 02 A6 93 E1 00 2C 7D 5F 53 78 90 01 00 34 90 61 00 08 90 E1 00 10 91 01 00 0C 41 9D 01 40
+
+. 0 25480CFC 24
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+
+. 0 25480FD8 24
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+
+. 0 25481240 16
+. 55 3A 01 BA 67 40 48 00 90 05 00 00 4B FF FB B4
+
+. 0 25480E00 16
+. 7C 00 28 6C 7C 00 04 AC 83 81 00 0C 7C 00 E7 AC
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+
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+. 0 FEE0DC8 40
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+
+. 0 10015728 8
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+. 0 10028F1C 8
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+. 0 FEDBE1C 32
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+
+. 0 FEDBE3C 12
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+
+. 0 FEDBE48 20
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+
+. 0 FEDBE5C 20
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+. 0 FEDBE70 8
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+. 0 FEDBE64 12
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+
+. 0 FEDBE78 12
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+
+. 0 FEDBE84 52
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+
+. 0 FEE9AE8 12
+. 80 C3 00 60 2C 06 00 00 40 81 00 C4
+
+. 0 FEE9BB4 8
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+
+. 0 FEE8D58 12
+. 80 83 00 00 70 89 10 00 41 82 00 C0
+
+. 0 FEE8E20 16
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+
+. 0 FEE8D74 40
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+
+. 0 FEEA570 56
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+
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+
+. 0 FF41FD8 12
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+
+. 0 FF41FE4 8
+. 38 00 00 04 44 00 00 02
+
+PASS: fft_complex_bitreverse_order, n = 1
+. 0 FF41FEC 4
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+
+. 0 FEEA5CC 12
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+
+. 0 FEE8E70 12
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+. 0 FEE8DE4 20
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+. 0 FEE9BBC 4
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+
+. 0 FEE9B34 16
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+
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+
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+
+. 0 FEEEE00 16
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+
+. 0 FEEEE10 28
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+
+. 0 FEEEE2C 84
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+
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+. 0 FEEF560 8
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+
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+
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+
+. 0 10001508 40
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+
+. 0 100046B0 12
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+
+. 0 10001530 100
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+
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+
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+
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+
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+
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+
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+
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+
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+
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+
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+
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+
+. 0 10005054 8
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+
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+
+. 0 1000478C 92
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+
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+
+. 0 10005074 20
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+
+. 0 10005088 20
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+
+. 0 10005F20 20
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+
+. 0 10005C48 208
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+
+. 0 10005D18 40
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+
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+
+. 0 10028EF4 8
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+
+. 0 FE0DF50 32
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+
+. 0 FE0DF70 48
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+
+. 0 FE0E6CC 12
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+
+. 0 FE0E18C 40
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+
+. 0 10005D6C 12
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+
+. 0 10028F94 8
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+
+. 0 FE0C884 36
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+
+. 0 FE0C8A8 88
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+
+. 0 FE0CA5C 84
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+
+. 0 10005D78 64
+. 7D 7D CA 14 7C 0B DB 96 7D 3C D2 14 7C 1C D4 AE 37 FF FF FF C9 89 00 08 7F 9C C2 14 FD A1 03 32 FC 21 00 32 FC 1E 68 38 FF DE 0B 3A FF 9C 00 2A FF BD F0 2A 7C 00 D9 D6 7F A0 58 50 40 82 FF 9C
+
+. 0 10005DB8 28
+. 3B 39 00 01 7D 36 AA 14 7F 99 D8 40 7F 96 AD AE DB A9 00 08 7E D6 A2 14 41 9C FF 5C
+
+. 0 10005DD4 100
+. 80 01 00 94 38 60 00 00 82 61 00 24 82 81 00 28 7C 08 03 A6 82 A1 00 2C 82 C1 00 30 82 E1 00 34 83 01 00 38 83 21 00 3C 83 41 00 40 83 61 00 44 83 81 00 48 83 A1 00 4C 83 C1 00 50 83 E1 00 54 CB 21 00 58 CB 41 00 60 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
+
+. 0 10005F34 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 1000509C 44
+. 80 01 00 34 83 21 00 14 83 41 00 18 7C 08 03 A6 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+. 0 10001644 8
+. 2F 9E 00 00 41 9E 00 30
+
+. 0 1000164C 44
+. 7F C9 03 A6 38 00 00 00 57 4B 20 36 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 CA 14 7C 19 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
+
+. 0 10001678 16
+. 7F 63 DB 78 7F 44 D3 78 7F C5 F3 78 48 00 7B 49
+
+. 0 100091CC 20
+. 7C 08 02 A6 94 21 FF F0 38 C0 FF FF 90 01 00 14 4B FF FD 09
+
+. 0 10008EE4 124
+. 94 21 FF 90 7C 08 02 A6 42 9F 00 05 93 C1 00 40 7F C8 02 A6 2F 85 00 01 90 01 00 74 93 41 00 30 7C DA 33 78 80 1E FF F0 93 81 00 38 7C BC 2B 78 93 A1 00 3C 7F C0 F2 14 93 E1 00 44 7C 9D 23 78 7C 7F 1B 78 DB 61 00 48 DB 81 00 50 38 60 00 00 DB A1 00 58 DB C1 00 60 DB E1 00 68 92 81 00 18 92 A1 00 1C 92 C1 00 20 92 E1 00 24 93 01 00 28 93 21 00 2C 93 61 00 34 41 9E 02 00
+
+. 0 1000915C 84
+. 80 01 00 74 82 81 00 18 82 A1 00 1C 7C 08 03 A6 82 C1 00 20 82 E1 00 24 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB 61 00 48 CB 81 00 50 CB A1 00 58 CB C1 00 60 CB E1 00 68 38 21 00 70 4E 80 00 20
+
+. 0 100091E0 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 10001688 8
+. 2F 9E 00 00 41 9E 00 30
+
+. 0 10001690 44
+. 7F C9 03 A6 38 00 00 00 57 4B 20 36 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 BA 14 7C 17 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
+
+. 0 100016BC 52
+. 3E A0 10 02 2A 1A 00 01 CB F5 81 10 3C A0 10 01 3C 60 10 01 38 A5 69 3C FC 20 F8 90 7F 04 C3 78 7F 66 DB 78 38 63 69 4C 7F 47 D3 78 7F C8 F3 78 4B FF F1 2D
+
+. 0 100016F0 24
+. 3C 80 10 01 38 84 6C 58 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3E E5
+
+. 0 10028F6C 4
+. 4B EA 1E 64
+
+. 0 FEEA6E4 20
+. 88 FB 00 00 3B 7B 00 01 98 E3 00 00 38 63 00 01 42 00 FF F0
+
+. 0 10028F44 4
+. 4B E9 9F 90
+
+. 0 FEF89E0 20
+. 81 64 00 00 38 A5 FF FF 81 44 00 04 38 84 00 08 4B FF FF 54
+
+. 0 FEC31A4 104
+. 3B 04 00 01 39 60 00 00 93 1F 04 4C 3A 20 FF FF 8B 04 00 01 3A 00 00 20 39 FF 03 F8 91 7F 04 EC 3A 58 FF E0 91 7F 04 F0 2A 12 00 5A 91 7F 04 F4 91 7F 04 F8 38 00 00 00 91 7F 04 FC 91 7F 05 00 91 7F 05 04 91 7F 05 08 91 7F 05 0C 91 7F 05 10 92 3F 05 14 91 7F 05 18 92 1F 05 1C 91 7F 05 68 91 FF 04 D4 41 91 00 20
+
+. 0 10028F2C 4
+. 4B EB 7D A8
+
+. 0 10028F1C 4
+. 4B EB 2F 00
+
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 1, stride = 1
+. 0 10001708 4
+. 41 91 03 68
+
+. 0 1000170C 16
+. 7F 44 D3 78 7F C5 F3 78 7F 63 DB 78 48 00 7B 01
+
+. 0 10009218 64
+. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 01 00 24 38 C0 00 01 7C 7F 1B 78 93 81 00 10 80 1E FF F0 7C 9C 23 78 93 A1 00 14 7C BD 2B 78 7F C0 F2 14 4B FF FC 91
+
+. 0 10009258 8
+. 2C 03 00 00 40 82 00 64
+
+. 0 10009260 48
+. 81 3E 80 9C 3C 00 43 30 90 01 00 08 7F 83 E8 40 93 A1 00 0C C8 09 00 00 C9 A1 00 08 81 3E 80 A0 FD AD 00 28 C8 09 00 00 FD 80 68 24 40 9C 00 34
+
+. 0 10009290 48
+. 7F A9 03 A6 57 84 20 36 38 00 00 00 7C 1F 04 AE 7D 20 FA 14 FC 00 03 32 7C 1F 05 AE 7C 00 22 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
+
+. 0 100092C0 32
+. 80 01 00 24 83 81 00 10 83 A1 00 14 7C 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 1000171C 40
+. FC 20 F8 90 3F E0 10 01 3C A0 10 01 38 A5 69 98 7F 24 CB 78 7F 66 DB 78 38 7F 69 90 7F 47 D3 78 7F C8 F3 78 4B FF F0 D9
+
+. 0 10001744 24
+. 3C 80 10 01 38 84 6C A0 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3E 91
+
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 1, stride = 1
+. 0 1000175C 4
+. 41 91 02 E4
+
+. 0 10001760 16
+. 7E E3 BB 78 7F 44 D3 78 7F C5 F3 78 48 00 7A 85
+
+. 0 100091F0 20
+. 7C 08 02 A6 94 21 FF F0 38 C0 00 01 90 01 00 14 4B FF FC E5
+
+. 0 10009204 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 10001770 8
+. 2F 9E 00 00 41 9E 00 54
+
+. 0 10001778 80
+. 3C 00 43 30 3D 20 10 02 90 01 00 08 39 29 80 F8 93 C1 00 0C 7F C9 03 A6 C9 A1 00 08 38 00 00 00 C8 09 00 00 57 4B 20 36 FD 8D 00 28 7C 19 04 AE 7D 20 CA 14 FC 00 03 32 7C 19 05 AE 7C 00 5A 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
+
+. 0 100017C8 40
+. CB F5 81 10 3C A0 10 01 38 A5 69 E4 7F 24 CB 78 FC 20 F8 90 7E E6 BB 78 7F 47 D3 78 7F C8 F3 78 38 7F 69 90 4B FF F0 2D
+
+. 0 100017F0 24
+. 3C 80 10 01 38 84 6C E8 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3D E5
+
+. 0 FEF8088 24
+. 7C A9 03 A6 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
+
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 1, stride = 1
+. 0 10001808 8
+. 2B 9A 00 01 41 9D 02 04
+
+. 0 10001810 52
+. 3D 20 10 02 3D 60 10 02 39 29 80 F0 39 6B 81 18 C8 49 00 00 7F 66 DB 78 C8 2B 00 00 7F 07 C3 78 7F C4 F3 78 7F 45 D3 78 38 60 00 01 3F 80 10 01 48 00 2F A9
+
+. 0 100047E8 96
+. 94 21 FF 90 7C 08 02 A6 93 C1 00 30 7C 9E 23 79 DB 81 00 50 FF 80 08 90 DB A1 00 58 FF A0 10 90 93 21 00 1C 7C F9 3B 78 93 61 00 24 7C 7B 1B 78 DB 21 00 38 DB 41 00 40 DB 61 00 48 DB C1 00 60 DB E1 00 68 93 01 00 18 93 41 00 20 93 81 00 28 93 A1 00 2C 93 E1 00 34 90 01 00 74 41 82 01 58
+
+. 0 10004848 8
+. 2F 9E 00 00 41 9E 00 3C
+
+. 0 10004850 56
+. 7F C9 03 A6 39 60 00 00 39 80 00 00 38 00 00 00 54 AA 20 36 7D 20 32 14 7D 66 01 2E 38 C6 00 04 7D 86 01 2E 38 C6 FF FC 91 69 00 08 91 89 00 0C 7C 00 52 14 42 00 FF E0
+
+. 0 10004888 40
+. 7C 1B F3 96 2F 9E 00 00 7C 00 F1 D6 7C 00 D8 50 7C 00 29 D6 54 00 20 36 7D 20 32 14 7F 86 05 AE DB A9 00 08 41 9E 00 A0
+
+. 0 100048B0 104
+. 3F 00 43 30 3D 20 10 02 39 29 80 F8 93 C1 00 14 93 01 00 10 54 BA 20 36 CB 29 00 00 3D 20 10 02 C8 01 00 10 3B 80 00 00 CB 49 81 38 3B A0 00 00 FF 60 C8 28 7F DF F3 78 7C 1D F3 96 93 01 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD DA 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF D8 24 FC 20 F8 90 48 02 45 E1
+
+. 0 10028EF4 4
+. 4B DE 50 5C
+
+. 0 10004918 12
+. FF C0 08 90 FC 20 F8 90 48 02 46 75
+
+. 0 10028F94 4
+. 4B DE 38 F0
+
+. 0 10004924 40
+. 37 FF FF FF FC 01 07 32 7D 3C CA 14 FC 21 07 72 FC 1E 07 7A FF DE 0F 38 7F DC CD AE 7F 9C D2 14 D8 09 00 08 40 82 FF A0
+
+. 0 1000494C 80
+. 38 60 00 00 80 01 00 74 83 01 00 18 83 21 00 1C 7C 08 03 A6 83 41 00 20 83 61 00 24 83 81 00 28 83 A1 00 2C 83 C1 00 30 83 E1 00 34 CB 21 00 38 CB 41 00 40 CB 61 00 48 CB 81 00 50 CB A1 00 58 CB C1 00 60 CB E1 00 68 38 21 00 70 4E 80 00 20
+
+. 0 10001844 16
+. 7F 44 D3 78 7F C5 F3 78 7F 63 DB 78 48 00 79 7D
+
+. 0 10001854 40
+. FC 20 F8 90 3C A0 10 01 7F 47 D3 78 7F C8 F3 78 38 A5 6A 40 7F 04 C3 78 7F 66 DB 78 38 7C 6A 34 3B A0 00 00 4B FF EF A1
+
+. 0 1000187C 24
+. 3C 80 10 01 38 84 6D 30 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3D 59
+
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 1, stride = 1
+. 0 10001894 44
+. 3D 20 10 02 3D 60 10 02 39 29 80 F0 39 6B 81 18 C8 49 00 00 C8 2B 00 00 7F 06 C3 78 7F 44 D3 78 7F 65 DB 78 7F C3 F3 78 48 00 31 05
+
+. 0 100049C0 20
+. 2C 03 00 00 7C 08 02 A6 94 21 FF F0 90 01 00 14 41 82 00 B0
+
+. 0 100049D4 8
+. 2F 83 00 00 41 9E 00 24
+
+. 0 100049DC 32
+. 7C 69 03 A6 38 00 00 00 54 8B 20 36 7D 20 2A 14 7C 25 05 AE D8 49 00 08 7C 00 5A 14 42 00 FF F0
+
+. 0 100049FC 8
+. 2F 83 00 00 41 9E 00 3C
+
+. 0 10004A04 56
+. 7C 69 03 A6 54 84 20 36 39 60 00 00 39 80 00 00 38 00 00 00 7D 20 32 14 7D 66 01 2E 38 C6 00 04 7D 86 01 2E 38 C6 FF FC 91 69 00 08 91 89 00 0C 7C 00 22 14 42 00 FF E0
+
+. 0 10004A3C 68
+. 3C 00 43 30 3D 20 10 02 90 61 00 0C 39 29 80 F8 90 01 00 08 38 60 00 00 C8 01 00 08 C9 A9 00 00 80 01 00 14 38 21 00 10 FC 00 68 28 7C 08 03 A6 FD A0 00 B2 FC 00 00 72 D9 A6 00 08 D8 06 00 00 4E 80 00 20
+
+. 0 100018C0 16
+. 7F 44 D3 78 7F C5 F3 78 7F 63 DB 78 48 00 79 01
+
+. 0 100018D0 36
+. FC 20 F8 90 3C A0 10 01 7F 04 C3 78 38 A5 6A 90 7F 66 DB 78 7F 47 D3 78 7F C8 F3 78 38 7C 6A 34 4B FF EF 29
+
+. 0 100018F4 24
+. 3C 80 10 01 38 84 6D 78 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3C E1
+
+. 0 FEF808C 20
+. 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
+
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 1, stride = 1
+. 0 1000190C 12
+. 7F 9D F0 40 3B E0 00 00 40 9C 00 78
+
+. 0 10001918 52
+. 3E C0 10 01 3D 20 10 02 3D 60 10 02 39 29 81 18 39 6B 80 F0 C8 29 00 00 7F 66 DB 78 C8 4B 00 00 7F 07 C3 78 7F E3 FB 78 7F C4 F3 78 7F 45 D3 78 48 00 31 69
+
+. 0 10004AB0 112
+. 94 21 FF 80 7C 08 02 A6 93 C1 00 40 7C 9E 23 79 DB 81 00 60 FF 80 08 90 DB A1 00 68 FF A0 10 90 92 E1 00 24 7C B7 2B 78 93 21 00 2C 7C D9 33 78 93 41 00 30 7C 7A 1B 78 93 61 00 34 7C FB 3B 78 DB 21 00 48 DB 41 00 50 DB 61 00 58 DB C1 00 70 DB E1 00 78 92 C1 00 20 93 01 00 28 93 81 00 38 93 A1 00 3C 93 E1 00 44 90 01 00 84 41 82 01 90
+
+. 0 10004B20 8
+. 2F 9E 00 00 41 9E 00 A0
+
+. 0 10004B28 104
+. 3E C0 43 30 3D 20 10 02 39 29 80 F8 93 C1 00 14 92 C1 00 10 3B 80 00 00 CB 29 00 00 3D 20 10 02 C8 01 00 10 3B A0 00 00 CB 49 81 40 54 B8 20 36 FF 60 C8 28 7F DF F3 78 7C 1D F3 96 92 C1 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD D2 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF D8 24 FC 20 F8 90 48 02 43 69
+
+. 0 10004B90 12
+. FF C0 08 90 FC 20 F8 90 48 02 43 FD
+
+. 0 10004B9C 40
+. 37 FF FF FF FC 01 07 32 7D 3C CA 14 FC 21 07 72 FC 1E 07 7A FF DE 0F 38 7F DC CD AE 7F 9C C2 14 D8 09 00 08 40 82 FF A0
+
+. 0 10004BC4 8
+. 2F 9E 00 00 41 9E 00 3C
+
+. 0 10004BCC 56
+. 7F C9 03 A6 39 60 00 00 39 80 00 00 38 00 00 00 56 EA 20 36 7D 20 DA 14 7D 7B 01 2E 3B 7B 00 04 7D 9B 01 2E 3B 7B FF FC 91 69 00 08 91 89 00 0C 7C 00 52 14 42 00 FF E0
+
+. 0 10004C04 8
+. 2F 9A 00 00 40 9D 00 C8
+
+. 0 10004CD0 20
+. 7D 3A F0 50 7C 09 F3 96 7C 00 F1 D6 7C 60 48 50 4B FF FF 38
+
+. 0 10004C18 148
+. 3C 00 43 30 3D 20 10 02 90 01 00 10 39 29 80 F8 93 C1 00 14 7C 17 19 D6 C9 A1 00 10 38 60 00 00 C8 09 00 00 FD AD 00 28 54 00 20 36 7D 20 DA 14 FC 0D 07 72 FD AD 07 32 7D BB 05 AE D8 09 00 08 80 01 00 84 82 C1 00 20 82 E1 00 24 7C 08 03 A6 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB 21 00 48 CB 41 00 50 CB 61 00 58 CB 81 00 60 CB A1 00 68 CB C1 00 70 CB E1 00 78 38 21 00 80 4E 80 00 20
+
+. 0 1000194C 16
+. 7F 44 D3 78 7F C5 F3 78 7F 63 DB 78 48 00 78 75
+
+. 0 1000195C 36
+. C8 35 81 10 3B FF 00 01 38 7C 6A 34 7F 04 C3 78 38 B6 6A E4 7F 66 DB 78 7F 47 D3 78 7F C8 F3 78 4B FF EE 9D
+
+. 0 10001980 12
+. 7F 9F F0 40 7F BD 1B 78 41 9C FF 94
+
+. 0 1000198C 28
+. 3C 80 10 01 7F C5 F3 78 7F 46 D3 78 38 84 6D C4 7F A3 EB 78 4C C6 31 82 48 01 3C 45
+
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 1, stride = 1
+. 0 100019A8 8
+. 7F 63 DB 78 48 02 75 D9
+
+. 0 10028F84 4
+. 4B EC 65 0C
+
+. 0 100019B0 8
+. 7F 23 CB 78 48 02 75 D1
+
+. 0 100019B8 8
+. 7F 03 C3 78 48 02 75 C9
+
+. 0 100019C0 8
+. 7E E3 BB 78 48 02 75 C1
+
+. 0 100019C8 72
+. 80 01 00 54 81 81 00 18 82 A1 00 1C 7C 08 03 A6 82 C1 00 20 7D 80 81 20 82 E1 00 24 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB E1 00 48 38 21 00 50 4E 80 00 20
+
+. 0 100046BC 12
+. 7F A3 EB 78 7F E4 FB 78 4B FF D7 69
+
+. 0 10001E2C 60
+. 94 21 FF D0 7C 08 02 A6 93 81 00 20 7F 84 19 D6 93 A1 00 24 93 61 00 1C 7C 7B 1B 78 90 01 00 34 57 9D 18 38 93 41 00 18 7F A3 EB 78 93 C1 00 28 93 E1 00 2C 7C 9E 23 78 48 02 70 D1
+
+. 0 10001E68 12
+. 7C 7A 1B 78 7F A3 EB 78 48 02 70 C5
+
+. 0 10001E74 12
+. 7C 7F 1B 78 7F A3 EB 78 48 02 70 B9
+
+. 0 10001E80 16
+. 2B 9C 00 00 7C 7D 1B 78 39 40 00 00 40 9D 00 38
+
+. 0 10001E90 52
+. 3D 60 10 02 7F 89 03 A6 39 6B 80 F8 3D 20 43 30 C9 AB 00 00 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 7C 1F 05 AE 42 00 FF E4
+
+. 0 10001EC4 16
+. 57 85 18 38 7F 43 D3 78 7F E4 FB 78 48 02 70 A5
+
+. 0 10028F74 4
+. 4B EC F7 64
+
+. 0 FEF8760 8
+. 2C 85 00 00 41 86 00 1C
+
+. 0 FEF8768 24
+. 7C A9 03 A6 88 FD 00 00 3B BD 00 01 98 FF 00 00 3B FF 00 01 42 00 FF F0
+
+. 0 FEF876C 20
+. 88 FD 00 00 3B BD 00 01 98 FF 00 00 3B FF 00 01 42 00 FF F0
+
+. 0 10001ED4 12
+. 2B 9E 00 01 38 E0 00 00 40 9D 00 18
+
+. 0 10001EF4 12
+. 39 40 00 00 7F 8A F0 40 40 9C 00 54
+
+. 0 10001F00 24
+. 7F E8 FB 78 57 66 18 38 39 60 00 00 7D 49 53 78 7F 8B 38 40 40 9C 00 1C
+
+. 0 10001F30 32
+. 7C 0B D9 D6 39 4A 00 01 7F 8A F0 40 C8 08 00 00 7D 08 32 14 54 00 18 38 7C 1D 05 AE 41 9C FF BC
+
+. 0 10001F50 16
+. 34 DE FF FF 39 60 00 00 39 40 00 00 41 82 00 5C
+
+. 0 10001FB8 44
+. 3D 20 10 02 3C A0 10 01 C8 29 81 10 3C 60 10 01 7F 67 DB 78 7F E6 FB 78 7F C8 F3 78 7F A4 EB 78 38 A5 6B FC 38 63 6C 1C 4B FF EA 69
+
+. 0 10000A48 124
+. 94 21 FF A0 7C 08 02 A6 93 A1 00 3C 7D 1D 43 79 3D 20 10 02 93 01 00 28 39 29 80 F0 93 21 00 2C 93 61 00 34 FD 40 08 90 93 C1 00 40 7C 78 1B 78 93 E1 00 44 7C 9E 23 78 DB A1 00 48 7C B9 2B 78 DB C1 00 50 7C DF 33 78 DB E1 00 58 7C FB 3B 78 92 41 00 10 92 61 00 14 92 81 00 18 92 A1 00 1C 92 C1 00 20 92 E1 00 24 93 41 00 30 93 81 00 38 90 01 00 64 C8 29 00 00 41 82 00 44
+
+. 0 10000AC4 56
+. 3D 20 10 02 7F A9 03 A6 39 29 80 F8 38 00 00 00 C9 69 00 00 54 E9 18 38 7D 9F 04 AE 7D BE 04 AE 7C 00 4A 14 FC 0C 68 28 FC 00 02 10 FF E0 02 F2 FF 9F 08 00 40 9D 00 08
+
+. 0 10000B00 4
+. 42 00 FF DC
+
+. 0 10000B04 12
+. FF 81 50 00 38 60 00 00 40 9C 00 58
+
+. 0 10000B10 84
+. 80 01 00 64 82 41 00 10 82 61 00 14 7C 08 03 A6 82 81 00 18 82 A1 00 1C 82 C1 00 20 82 E1 00 24 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB A1 00 48 CB C1 00 50 CB E1 00 58 38 21 00 60 4E 80 00 20
+
+. 0 10001FE4 20
+. 3C 80 10 01 7F C5 F3 78 38 84 70 08 4C C6 31 82 48 01 35 F5
+
+. 0 FEF8934 8
+. 2C 80 00 02 41 86 00 BC
+
+. 0 FEF893C 8
+. 2F 00 00 03 41 9A 00 8C
+
+. 0 FEF89CC 20
+. 81 64 00 00 38 63 FF F8 81 44 00 04 38 A5 00 01 4B FF FF 90
+
+. 0 FEF896C 56
+. 7D 6C 40 30 7D 4B 3C 30 7D 86 5B 78 81 64 00 08 90 C3 00 08 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
+
+PASS: fft_real_bitreverse_order, n = 1
+. 0 10001FF8 8
+. 7F A3 EB 78 48 02 6F 89
+
+. 0 10002000 8
+. 7F E3 FB 78 48 02 6F 81
+
+. 0 10002008 8
+. 7F 43 D3 78 48 02 6F 79
+
+. 0 10002010 40
+. 80 01 00 34 83 41 00 18 83 61 00 1C 7C 08 03 A6 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+. 0 100046C8 16
+. 7F A3 EB 78 7F E4 FB 78 3B BD 00 01 4B FF D9 65
+
+. 0 10002038 64
+. 94 21 FF D0 7C 08 02 A6 93 41 00 18 7F 44 19 D6 93 61 00 1C 7C 7B 1B 78 90 01 00 34 93 21 00 14 57 43 18 38 93 81 00 20 93 A1 00 24 7C 9C 23 78 57 5D 20 36 93 C1 00 28 93 E1 00 2C 48 02 6E C1
+
+. 0 10002078 12
+. 7C 7F 1B 78 7F A3 EB 78 48 02 6E B5
+
+. 0 10002084 12
+. 7C 7E 1B 78 7F A3 EB 78 48 02 6E A9
+
+. 0 10002090 12
+. 7C 79 1B 78 7F A3 EB 78 48 02 6E 9D
+
+. 0 1000209C 16
+. 2B 9A 00 00 7C 7D 1B 78 39 40 00 00 40 9D 00 38
+
+. 0 100020AC 52
+. 3D 60 10 02 7F 49 03 A6 39 6B 80 F8 3D 20 43 30 C9 AB 00 00 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 7C 1F 05 AE 42 00 FF E4
+
+. 0 100020E0 16
+. 57 40 08 3C 39 40 00 00 2B 80 00 00 40 9D 00 64
+
+. 0 100020F0 96
+. 3D 60 10 02 3D 20 10 02 C9 2B 81 00 3D 60 10 02 39 6B 80 F8 C9 09 80 E8 7C 09 03 A6 3D 20 10 02 C9 6B 00 00 C9 49 81 08 3D 20 43 30 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 58 28 FD A0 50 2A FD 80 40 2A FC 00 48 2A 7D BD 05 AE 7D 9E 05 AE 7C 19 05 AE 42 00 FF D0
+
+. 0 1000211C 52
+. 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 58 28 FD A0 50 2A FD 80 40 2A FC 00 48 2A 7D BD 05 AE 7D 9E 05 AE 7C 19 05 AE 42 00 FF D0
+
+. 0 10002150 8
+. 38 60 00 00 48 01 32 A1
+
+. 0 10002158 20
+. 7F 64 DB 78 7F C5 F3 78 7F A6 EB 78 7F 83 E3 78 48 00 2F AD
+
+. 0 10005114 68
+. 94 21 FF D0 7C 08 02 A6 93 21 00 14 7C 79 1B 79 92 E1 00 0C 7C D7 33 78 93 01 00 10 7C 98 23 78 93 A1 00 24 7C BD 2B 78 93 41 00 18 93 61 00 1C 93 81 00 20 93 C1 00 28 93 E1 00 2C 90 01 00 34 41 82 00 88
+
+. 0 10005158 8
+. 2F 99 00 00 41 9E 00 38
+
+. 0 10005160 24
+. 3B 40 00 00 3B 60 00 00 3B C0 00 00 54 9C 20 36 7F 3F CB 78 4B FF F6 19
+
+. 0 10005178 28
+. 37 FF FF FF 7D 3E EA 14 7C 3E ED AE 93 49 00 08 93 69 00 0C 7F DE E2 14 40 82 FF E4
+
+. 0 10005194 20
+. 7F A3 EB 78 7F 04 C3 78 7F 25 CB 78 7E E6 BB 78 48 00 0D 7D
+
+. 0 100051A8 52
+. 80 01 00 34 82 E1 00 0C 83 01 00 10 7C 08 03 A6 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+. 0 1000216C 16
+. 7F 23 CB 78 7F C4 F3 78 57 45 20 36 48 02 6D FD
+
+. 0 1000217C 8
+. 2F 9C 00 00 41 9E 00 24
+
+. 0 10002184 32
+. 7F 89 03 A6 39 60 00 00 55 60 20 36 55 69 18 38 7C 1E 04 AE 7D 6B DA 14 7C 09 FD AE 42 00 FF EC
+
+. 0 100021A4 20
+. 7F 64 DB 78 7F 85 E3 78 7F E3 FB 78 3F 40 10 02 48 01 03 D1
+
+. 0 10012584 124
+. 94 21 FF 90 7C 08 02 A6 42 9F 00 05 93 C1 00 48 7F C8 02 A6 2F 85 00 01 90 01 00 74 93 81 00 40 7C BC 2B 78 80 1E FF F0 93 A1 00 44 7C 9D 23 78 93 E1 00 4C 7F C0 F2 14 7C 7F 1B 78 DB 81 00 50 DB A1 00 58 38 60 00 00 DB C1 00 60 DB E1 00 68 92 41 00 18 92 61 00 1C 92 81 00 20 92 A1 00 24 92 C1 00 28 92 E1 00 2C 93 01 00 30 93 21 00 34 93 41 00 38 93 61 00 3C 41 9E 02 10
+
+. 0 1001280C 88
+. 80 01 00 74 82 41 00 18 82 61 00 1C 7C 08 03 A6 82 81 00 20 82 A1 00 24 82 C1 00 28 82 E1 00 2C 83 01 00 30 83 21 00 34 83 41 00 38 83 61 00 3C 83 81 00 40 83 A1 00 44 83 C1 00 48 83 E1 00 4C CB 81 00 50 CB A1 00 58 CB C1 00 60 CB E1 00 68 38 21 00 70 4E 80 00 20
+
+. 0 100021B8 20
+. 7F C4 F3 78 7F 65 DB 78 7F 86 E3 78 7F E3 FB 78 48 00 C4 15
+
+. 0 1000E5DC 48
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 2C 06 00 00 90 01 00 14 7C AC 2B 78 93 E1 00 0C 80 1E FF F0 7F C0 F2 14 41 82 00 C4
+
+. 0 1000E60C 40
+. 38 06 FF FF 83 FE 81 CC 2B 80 00 01 C8 03 00 00 C9 BF 00 00 38 A0 00 01 D8 04 00 00 7C 07 03 78 D9 A4 00 08 40 9D 00 54
+
+. 0 1000E684 8
+. 7F 87 28 00 41 9E 00 20
+
+. 0 1000E68C 28
+. 80 01 00 14 38 60 00 00 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+
+. 0 100021CC 40
+. C8 3A 81 10 3C A0 10 01 3C 60 10 01 7F 67 DB 78 7F 88 E3 78 38 A5 69 3C 7F A4 EB 78 7F C6 F3 78 38 63 69 4C 4B FF E6 29
+
+. 0 100021F4 24
+. 3C 80 10 01 38 84 70 2C 7F 85 E3 78 7F 66 DB 78 4C C6 31 82 48 01 33 E1
+
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 1, stride = 1
+. 0 1000220C 16
+. 7F E3 FB 78 7F 64 DB 78 7F 85 E3 78 48 00 BE 79
+
+. 0 1000E090 132
+. 94 21 FF 80 7C 08 02 A6 42 9F 00 05 93 C1 00 50 7F C8 02 A6 2F 85 00 01 90 01 00 84 92 E1 00 34 7C B7 2B 78 80 1E FF F0 93 A1 00 4C 7C 9D 23 78 93 E1 00 54 7F C0 F2 14 7C 7F 1B 78 DB 61 00 58 DB 81 00 60 38 60 00 00 DB A1 00 68 DB C1 00 70 DB E1 00 78 92 21 00 1C 92 41 00 20 92 61 00 24 92 81 00 28 92 A1 00 2C 92 C1 00 30 93 01 00 38 93 21 00 3C 93 41 00 40 93 61 00 44 93 81 00 48 41 9E 02 34
+
+. 0 1000E344 96
+. 80 01 00 84 82 21 00 1C 82 41 00 20 7C 08 03 A6 82 61 00 24 82 81 00 28 82 A1 00 2C 82 C1 00 30 82 E1 00 34 83 01 00 38 83 21 00 3C 83 41 00 40 83 61 00 44 83 81 00 48 83 A1 00 4C 83 C1 00 50 83 E1 00 54 CB 61 00 58 CB 81 00 60 CB A1 00 68 CB C1 00 70 CB E1 00 78 38 21 00 80 4E 80 00 20
+
+. 0 1000221C 8
+. 2F 9C 00 00 41 9E 00 44
+
+. 0 10002224 64
+. 3C 00 43 30 3D 20 10 02 90 01 00 08 39 29 80 F8 93 81 00 0C 7F 89 03 A6 C8 09 00 00 38 00 00 00 C9 A1 00 08 57 69 18 38 FD AD 00 28 7C 1F 04 AE FC 00 68 24 7C 1F 05 AE 7C 00 4A 14 42 00 FF F0
+
+. 0 10002264 20
+. 7F C4 F3 78 7F 65 DB 78 7F 86 E3 78 7F E3 FB 78 48 01 06 11
+
+. 0 10012884 40
+. 7C 08 02 A6 94 21 FF F0 42 9F 00 05 93 C1 00 08 7F C8 02 A6 2C 06 00 00 90 01 00 14 80 1E FF F0 7F C0 F2 14 41 82 00 54
+
+. 0 100128AC 8
+. 2F 86 00 00 41 9E 00 34
+
+. 0 100128B4 48
+. 81 3E 82 9C 7C C9 03 A6 39 40 00 00 C9 A9 00 00 55 40 18 38 55 49 20 36 7C 03 04 AE 7D 69 22 14 7D 4A 2A 14 7C 09 25 AE D9 AB 00 08 42 00 FF E4
+
+. 0 100128E4 24
+. 80 01 00 14 38 60 00 00 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 10002278 40
+. C8 3A 81 10 3C A0 10 01 3C 60 10 01 7F 67 DB 78 7F 88 E3 78 7F 24 CB 78 7F C6 F3 78 38 A5 69 98 38 63 69 90 4B FF E5 7D
+
+. 0 100022A0 24
+. 3C 80 10 01 7F 85 E3 78 7F 66 DB 78 38 84 70 6C 4C C6 31 82 48 01 33 35
+
+. 0 FEF89F4 24
+. 81 44 00 00 38 63 FF F4 81 64 00 04 38 A5 00 02 38 84 FF FC 4B FF FF 78
+
+. 0 FEF8980 36
+. 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
+
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 1, stride = 1
+. 0 100022B8 8
+. 7F E3 FB 78 48 02 6C C9
+
+. 0 100022C0 8
+. 7F C3 F3 78 48 02 6C C1
+
+. 0 100022C8 8
+. 7F 23 CB 78 48 02 6C B9
+
+. 0 100022D0 8
+. 7F A3 EB 78 48 02 6C B1
+
+. 0 100022D8 44
+. 80 01 00 34 83 21 00 14 83 41 00 18 7C 08 03 A6 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+. 0 100046D8 8
+. 2B 9D 00 03 40 9D FF C8
+
+. 0 100046A4 12
+. 7F A3 EB 78 7F E4 FB 78 4B FF CC 4D
+
+. 0 FEF8864 20
+. 80 04 00 00 38 63 FF FC 81 24 00 04 90 03 00 04 4B FF FF A0
+
+. 0 FEF8814 64
+. 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+
+PASS: fft_complex_bitreverse_order, n = 1
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 1, stride = 2
+. 0 10001A70 20
+. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F1 B1
+
+. 0 10000C30 20
+. 39 40 00 00 94 21 FF F0 7F 8A 28 40 39 60 00 00 40 9C 00 98
+
+. 0 10000C44 16
+. 7C A7 2B 78 2B 84 00 01 39 6B 00 02 40 9D 00 80
+
+. 0 10000C54 124
+. 3D 20 10 02 38 04 FF FF 39 29 80 F8 7C 09 03 A6 C9 49 00 00 3D 00 43 30 55 69 18 38 7C 0B 32 14 39 6B 00 01 90 01 00 0C 91 01 00 08 7C 0B 32 14 C9 81 00 08 90 01 00 0C 55 60 18 38 C8 01 00 08 FD 8C 50 28 7D 69 1C AE 39 6B 00 01 FC 00 50 28 7D A3 04 AE FF 8B 60 00 FF 0D 00 00 4F DE F0 42 4F 5A D0 42 7D 20 00 26 55 20 FF FE 55 29 DF FE 7D 4A 03 78 7D 4A 4B 78 42 00 FF A0
+
+. 0 10000CD0 8
+. 34 E7 FF FF 40 82 FF 74
+
+. 0 10000CD8 12
+. 7D 43 53 78 38 21 00 10 4E 80 00 20
+
+. 0 10001A84 24
+. 3C 80 10 01 38 84 6E A0 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3B 51
+
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 1, stride = 2
+. 0 10001A9C 4
+. 4B FF FC 70
+
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 1, stride = 2
+. 0 10001A40 20
+. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F1 E1
+
+. 0 10001A54 24
+. 3C 80 10 01 38 84 6E 54 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3B 81
+
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 1, stride = 2
+. 0 10001A6C 4
+. 4B FF FC F4
+
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 1, stride = 2
+. 0 10001A10 20
+. 7F 44 D3 78 7F C5 F3 78 38 C0 0B B8 7E E3 BB 78 4B FF F2 11
+
+. 0 10001A24 24
+. 3C 80 10 01 38 84 6E 08 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3B B1
+
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 1, stride = 2
+. 0 10001A3C 4
+. 4B FF FD D4
+
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 1, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 1, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 1, stride = 2
+. 0 10001EA4 32
+. 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 7C 1F 05 AE 42 00 FF E4
+
+PASS: fft_real_bitreverse_order, n = 1
+. 0 100020C0 32
+. 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 7C 1F 05 AE 42 00 FF E4
+
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 1, stride = 2
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 1, stride = 2
+. 0 FEF8804 80
+. 80 04 00 00 91 23 00 00 81 24 00 04 90 03 00 04 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+
+PASS: fft_complex_bitreverse_order, n = 1
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 1, stride = 3
+. 0 10000C6C 100
+. 55 69 18 38 7C 0B 32 14 39 6B 00 01 90 01 00 0C 91 01 00 08 7C 0B 32 14 C9 81 00 08 90 01 00 0C 55 60 18 38 C8 01 00 08 FD 8C 50 28 7D 69 1C AE 39 6B 00 01 FC 00 50 28 7D A3 04 AE FF 8B 60 00 FF 0D 00 00 4F DE F0 42 4F 5A D0 42 7D 20 00 26 55 20 FF FE 55 29 DF FE 7D 4A 03 78 7D 4A 4B 78 42 00 FF A0
+
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 1, stride = 3
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 1, stride = 3
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 1, stride = 3
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 1, stride = 3
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 1, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 1, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 1, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 1, stride = 3
+. 0 FEF88D8 28
+. 80 04 00 00 38 84 FF F8 81 24 00 0C 38 63 FF F4 38 A5 00 02 90 03 00 0C 4B FF FF 34
+
+. 0 FEF8824 48
+. 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+
+PASS: fft_real_bitreverse_order, n = 1
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 1, stride = 3
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 1, stride = 3
+. 0 100046E0 12
+. 57 FF 08 3C 7F 9F F0 40 40 9D FF B0
+
+. 0 100013B0 20
+. 39 20 00 01 38 E7 00 01 7D 20 38 30 7F 80 F0 40 41 9C FF F4
+
+. 0 100013E8 24
+. 7C E9 03 A6 55 20 07 FE 55 6B 08 3C 7D 6B 03 78 55 29 F8 7E 42 00 FF F0
+
+. 0 100013D8 16
+. 39 60 00 00 7D 49 53 78 7F 8B 38 40 40 9C 00 1C
+
+. 0 10001440 24
+. 57 C3 F8 7E 38 C0 00 00 57 65 20 36 7F 87 40 40 7C 6A 1B 78 40 9C 00 40
+
+. 0 10001494 8
+. 7F 8A 40 40 40 9D FF F4
+
+. 0 1000149C 20
+. 38 E7 00 01 7D 08 52 14 7F 84 38 40 7C C6 2A 14 41 9D FF A0
+
+. 0 100008AC 60
+. 7D 20 FA 14 7D 60 F2 14 C9 AB 00 08 7D 9F 04 AE 7C 1E 04 AE 7C 00 52 14 C9 69 00 08 FC 0C 00 28 FD 4B 68 28 FC 00 02 10 FD A0 52 10 FC 00 68 2A FF E0 02 72 FF 9F 08 00 40 9D 00 08
+
+PASS: fft_complex_bitreverse_order, n = 2
+. 0 10005068 4
+. 4B FF F7 25
+
+. 0 10005D50 28
+. 93 A1 00 14 92 E1 00 10 CB E1 00 10 FF FF D8 28 FF FF 06 B2 FC 20 F8 90 48 02 31 8D
+
+. 0 10005D2C 20
+. 2F 9B 00 00 CB 93 00 00 3B A0 00 00 FF A0 E0 90 41 9E 00 7C
+
+. 0 FE0DFA0 16
+. 3C C0 3F EB 60 C5 5F FF 7C 09 28 00 41 81 02 08
+
+. 0 FE0E1B4 16
+. 3D 60 40 03 61 6A 68 FC 7C 09 50 00 41 81 00 E4
+
+. 0 FE0E2A4 16
+. 3C 60 41 99 60 65 21 FA 7C 09 28 00 41 81 01 F8
+
+. 0 FE0E2B4 120
+. 81 5E 0E 58 81 7E 0E 5C C8 0A 00 00 C9 6B 00 00 80 FE 0E 54 FC 8B 00 7A 81 3E 0E 50 C8 A7 00 00 C9 89 00 00 80 9E 0E 4C FD A4 00 28 80 DE 0F C4 CB A4 00 00 C8 46 00 00 FC 65 03 72 D8 81 00 30 81 21 00 30 81 41 00 34 FC EC 03 72 55 5F 07 BE FD 01 18 28 FC DD 03 72 FD 48 38 28 FC 81 10 00 D8 C1 00 28 FC 4A 30 28 FC 2A 10 28 D8 41 00 20 FC 81 30 28 40 85 03 9C
+
+. 0 FE0E6C4 8
+. 81 3E 10 08 4B FF FC 68
+
+. 0 FE0E330 16
+. 2F 1F 00 01 C9 29 00 00 FC 7F 02 72 41 9A 05 C0
+
+. 0 FE0E340 4
+. 40 99 03 98
+
+. 0 FE0E344 8
+. 2C 1F 00 02 41 82 03 98
+
+. 0 FE0E6E0 12
+. C8 26 00 00 FC 02 08 00 40 80 00 10
+
+. 0 FE0E6F8 180
+. 81 5E 0E 80 80 BE 0F C8 C9 6A 00 00 80 9E 0F CC FC 0B 10 2A 80 7E 0F D0 83 BE 0F D4 CB C5 00 00 FD 20 58 28 C8 C4 00 00 C9 03 00 00 CB BD 00 00 FD 42 48 28 80 FE 0F D8 D8 01 00 30 C8 A7 00 00 FD AA 20 2A 81 61 00 30 81 81 00 34 81 1E 0E 7C 55 80 28 34 D8 81 00 28 FD 2D 03 72 7D 20 42 14 C9 49 00 08 FD 89 37 BA CB C9 00 18 FC E9 EA 3A C9 09 00 10 7F A8 04 AE FD 6D 02 72 FC 0C 2A 7A FD 6B 69 FA FC C0 02 72 FC EB 02 B2 FD 88 01 B2 FC 1E 38 28 FD 5D 02 F2 FD A0 60 28 FC AD 50 28 FD A8 28 2A FF C8 68 28 FD 45 F0 2A FC 8A 08 00 40 85 04 B4
+
+. 0 FE0EC5C 16
+. 81 9E 10 04 C8 EC 00 00 FC 0A 19 F8 4B FF FB 50
+
+. 0 FE0E7B8 12
+. FC 6D 00 2A FF 03 68 00 40 9A 03 04
+
+. 0 FE0E7C4 12
+. 2F 9F 00 00 FC 20 68 90 41 BE F9 C0
+
+. 0 FE0E7D0 4
+. 4B FF FE A4
+
+. 0 FE0E674 8
+. FC 20 08 50 4B FF FB 14
+
+. 0 FE0C900 16
+. 3C C0 3F CF 60 C5 FF FF 7C 0B 28 00 41 81 01 A4
+
+. 0 FE0CAB0 16
+. 3D 80 3F EB 61 80 5F FF 7F 8B 00 00 41 9D 01 F8
+
+. 0 FE0CCB4 16
+. 3F E0 40 03 63 FD 68 FC 7E 0B E8 00 41 91 01 24
+
+. 0 FE0CDE4 16
+. 3D 00 41 99 61 0A 21 FA 7F 0B 50 00 41 99 03 68
+
+. 0 FE0CDF4 120
+. 83 7E 0E 5C 83 9E 0E 58 C9 5B 00 00 C9 1C 00 00 83 5E 0E 54 FF CA 40 7A 83 3E 0E 50 C8 7A 00 00 C8 B9 00 00 83 1E 0E 4C FC FE 40 28 83 BE 0F 64 C9 78 00 00 DB C1 00 30 FC 43 01 F2 CB 7D 00 00 81 21 00 30 81 41 00 34 FF 85 01 F2 55 5F 07 BE FF A1 10 28 FC 2B 01 F2 FF 5D E0 28 FE 1F D8 00 D8 21 00 28 FF DA 08 28 FD 9A F0 28 DB C1 00 20 FC 4C 08 28 40 91 09 38
+
+. 0 FE0D7A0 8
+. 81 3E 0F B0 4B FF F6 CC
+
+. 0 FE0CE70 16
+. 2F 9F 00 01 C9 29 00 00 FC 9F 02 72 41 9E 04 D0
+
+. 0 FE0CE80 4
+. 41 9D 04 BC
+
+. 0 FE0D33C 8
+. 2F 9F 00 02 41 9E 07 2C
+
+. 0 FE0DA6C 8
+. 2F 9F 00 00 4B FF F4 1C
+
+. 0 FE0CE8C 8
+. FD 5E 07 B2 41 9E 00 10
+
+. 0 FE0CE94 32
+. FF C0 F0 50 FC 40 10 50 DB C1 00 20 80 DE 0F 98 D8 41 00 28 C8 C6 00 00 FC 8A 30 00 40 84 0A B8
+
+. 0 FE0CEB4 100
+. 80 FE 0E 70 81 1E 0E 6C C9 27 00 00 C8 C8 00 00 81 5E 0E 68 FC 69 32 BA 81 7E 0E 64 C9 0A 00 00 C8 AB 00 00 81 9E 0E 60 FC E3 42 BA 83 FE 0F 7C CB 8C 00 00 C9 7F 00 00 C8 3D 00 00 FF A7 2A BA FF 62 02 F2 FF 5D E2 BA FD 9A DF B8 FD AC 12 BA FD 9E 68 2A FC 1E 60 28 FD A0 68 2A FF 0D 08 00 40 99 0E 10
+
+. 0 FE0CF18 28
+. 81 3E 0F 90 C9 49 00 00 FC 0D 22 BA FC 8C 00 2A FC 20 60 90 FE 04 60 00 41 B2 FB 28
+
+. 0 FE0CF34 172
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+
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+
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+
+. 0 FE0D00C 16
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+
+. 0 FE0D01C 20
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+
+. 0 FE251EC 12
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+
+. 0 FE251F8 324
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+
+. 0 FE2533C 12
+. FD A0 50 50 FC 02 08 00 40 81 07 1C
+
+. 0 FE25348 8
+. FF 8D 10 00 40 9D 06 F4
+
+. 0 FE25A40 32
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+
+. 0 FE2536C 128
+. C9 A6 00 00 FD 69 38 2A C8 45 00 00 FD 84 03 72 81 3E 20 80 FC CB 03 72 FC A4 60 28 FD 29 58 28 FC 2B 30 28 FD 05 60 2A C8 A9 00 00 FF 29 38 2A FC 01 30 2A FD 84 40 28 FF 7F 02 F2 FD 4C 00 32 FC 2B 00 28 FC C8 00 32 FD A8 50 7A FD 24 DE 7A FC E6 68 2A FC 06 38 28 FD 00 68 2A FF 6C 40 7A FD 7B 48 2A FD 07 58 2A FC 88 10 00 FD 47 40 28 FC C5 40 2A FC E0 40 90 FD 2A 58 2A 41 85 00 08
+
+. 0 FE253F0 8
+. FF 05 10 00 40 99 06 40
+
+. 0 FE25A34 12
+. FC 40 28 50 FF 87 10 00 4B FF F9 C0
+
+. 0 FE253FC 4
+. 40 9D 06 18
+
+. 0 FE25A14 32
+. C9 89 00 00 81 3E 20 7C FC AC 30 28 C9 69 00 00 FC 25 40 2A FC 01 48 2A FC A0 58 2A 4B FF F9 EC
+
+. 0 FE2541C 204
+. CB 26 00 00 FD 46 28 2A C8 45 00 00 FD A4 06 72 FD 6A 06 72 FD 04 68 28 FC C6 50 28 FF 6A 58 28 FC E8 68 2A FC 26 28 2A FD 9B 58 2A FF 64 38 28 FD 3F 02 B2 FC BB 03 32 FD 6A 60 28 FC 07 03 32 FD A7 2A FA FC C4 48 7A FC 20 68 2A FC E3 06 72 FD 00 08 28 FD 83 38 28 FD 28 68 2A FD 8C 38 2A FC BB 4A FA FF 63 60 28 FC 05 30 2A FD A1 00 2A FC ED 06 72 FD 01 68 28 FD 5D 03 72 FF 2D 38 28 FD 68 00 2A FC D9 38 2A FF 23 52 FA FD 3B 01 B2 FD 0D 30 28 FC AC 01 B2 FC 2C 4A 3A FC C5 08 2A FC 05 30 28 FD 40 08 2A FC FB 52 3A FD 27 C8 2A FC 26 48 2A FF 81 10 00 FD A6 08 28 FC A1 18 2A FC E0 08 90 FC CD 48 2A 41 9D 00 08
+
+. 0 FE254E8 12
+. FC E0 08 50 FC 03 10 00 40 81 05 18
+
+. 0 FE254F4 8
+. FF 87 18 00 40 9D 04 FC
+
+. 0 FE259F4 20
+. FD 83 28 28 FC EC 08 2A FD 27 30 2A FC 29 E8 2A 4B FF FB 08
+
+. 0 FE2550C 144
+. C8 C6 00 00 80 9E 20 78 FC 04 01 B2 81 7E 20 74 C8 E4 00 00 C9 0B 00 00 FD 67 01 B2 C8 C5 00 00 81 3E 20 70 FD 44 00 28 FC 47 07 F2 FF 2A 00 2A FF A7 58 28 FD 08 11 3A FC 7D 58 2A FC 44 C8 28 FF A5 08 2A FD 47 18 28 C8 E9 00 00 FF 62 00 F2 FD 99 00 F2 FD B9 DA BA FD 25 E8 28 FF 6C 68 2A FF 29 08 2A FC 0C D8 28 FC 60 68 2A FD 62 1A BA FC AB 40 2A FD 5B 28 2A FC 8A 30 00 FC 3B 50 28 FD 27 50 2A FD A0 50 90 FD 61 28 2A 41 85 00 08
+
+. 0 FE2559C 12
+. FD A0 50 50 FF 07 30 00 40 99 04 44
+
+. 0 FE255A8 8
+. FF 8D 38 00 40 9D 04 1C
+
+. 0 FE259C8 32
+. C8 C9 00 00 80 FE 20 6C FC 06 48 28 C9 07 00 00 FC E0 50 2A FC 47 58 2A FC E2 40 2A 4B FF FB E8
+
+. 0 FE255CC 128
+. C9 A6 00 00 FD 69 38 2A C8 A5 00 00 FD 04 03 72 81 3E 20 68 FC 4B 03 72 FC C4 40 28 FD 29 58 28 FF 6B 10 28 FC 66 40 2A C8 C9 00 00 FC 29 38 2A FC 1B 10 2A FF 64 18 28 FD 9F 02 F2 FD 5B 00 32 FC 4B 00 28 FC E3 00 32 FD A3 50 BA FD 24 60 7A FD 47 68 2A FD 07 50 28 FC 68 68 2A FD 9B 18 BA FC 2C 48 2A FD 0A 08 2A FF 88 28 00 FD 6A 40 28 FD 26 40 2A FC E0 40 90 FD 4B 08 2A 41 9D 00 08
+
+. 0 FE25650 8
+. FC 06 28 00 40 81 03 68
+
+. 0 FE259BC 12
+. FC A0 30 50 FF 87 28 00 4B FF FC 98
+
+. 0 FE2565C 4
+. 40 9D 03 40
+
+. 0 FE2599C 32
+. C9 A9 00 00 81 5E 20 64 FC CD 48 28 C9 6A 00 00 FC 46 40 2A FF 62 50 2A FC FB 58 2A 4B FF FC C4
+
+. 0 FE2567C 128
+. C8 46 00 00 FD 69 38 2A C8 A5 00 00 FD 84 00 B2 81 3E 20 60 FF 6B 00 B2 FC C4 60 28 FD 29 58 28 FC 0B D8 28 FD A6 60 2A C8 C9 00 00 FD 1F 02 F2 FC 60 D8 2A FD 84 68 28 FC 29 38 2A FD 6B 18 28 FD 4C 00 F2 FC 4D 00 F2 FF 6D 52 FA FD 24 40 7A FC E2 D8 2A FC 02 38 28 FC 60 D8 2A FD 0C 1A FA FC 28 48 2A FD 07 08 2A FC 88 28 00 FD 47 40 28 FD 26 40 2A FC E0 40 90 FD 4A 08 2A 41 85 00 08
+
+. 0 FE256FC 12
+. FC E0 40 50 FF 06 28 00 40 99 02 8C
+
+. 0 FE25708 8
+. FF 87 30 00 40 9D 02 64
+
+. 0 FE25970 32
+. C9 89 00 00 81 7E 20 5C FC CC 48 28 C9 6B 00 00 FF 66 40 2A FC 1B 50 2A FC E0 58 2A 4B FF FD A0
+
+. 0 FE2572C 288
+. C8 66 00 00 FD 69 38 2A CB 65 00 00 FD 84 00 F2 FD 0B 00 F2 FC 04 60 28 FD 29 58 28 FC 4B 40 28 FD A0 60 2A FC DF 02 F2 FC A2 40 2A FD 04 68 28 FF E9 38 2A FC 4B 28 28 FC E8 01 72 FC 2D 01 72 FD 4D 38 BA FD 24 37 FA FC E1 50 2A FC DC 00 F2 FC 01 38 28 FC 9D 00 F2 FD 80 50 2A FD 7C 30 28 FF FE 00 F2 FC A8 60 BA FD BD 20 28 FD 8B 30 2A FC A5 48 2A FD 0D 20 2A FC DC 60 28 FD 27 28 2A FC 3E F8 28 FC 46 02 32 FD 49 00 F2 FD 61 F8 2A FF FD 40 28 FC 09 50 28 FC 3E 58 28 FC 6C 17 FA FC 80 50 2A FD 8C 02 32 FD 49 20 28 FD A4 02 F2 FD 0A 02 F2 FC E7 48 28 FD 78 07 72 FC 04 40 7A FD 0C 18 2A FC 47 28 2A FC 8D 00 2A FC AC 40 28 FC E2 07 B2 FD AD 20 28 FD 85 18 2A FC 5C 5E 7A FC 6D 00 2A FC A6 67 FA FF 2A 18 7A FF A9 3E BA FF 85 10 2A FF F9 E8 2A FC 68 E0 2A FD A4 F8 2A FF 83 D8 00 FF 08 18 28 FC 84 68 28 FD 63 68 28 FC 58 E0 2A FC 24 F8 2A FD 80 18 90 41 9D 00 08
+
+. 0 FE25850 8
+. FC 0D D8 00 40 81 01 10
+
+. 0 FE25964 12
+. FF 60 68 50 FF 8C D8 00 4B FF FE F0
+
+. 0 FE2585C 4
+. 40 9D 00 F4
+
+. 0 FE25860 48
+. FF 23 58 28 FF 19 68 28 FF 98 08 28 FC 5C 10 2A FC 2B 10 2A C9 A5 00 00 FC 81 68 00 FF EB 08 28 FD 81 F0 2A FC 60 08 90 FC 5F 10 2A 41 85 00 08
+
+. 0 FE25894 8
+. FF 1E 68 00 40 99 00 5C
+
+. 0 FE258F4 12
+. FC C0 F0 50 FF 83 30 00 41 BD FF A8
+
+. 0 FE258A4 80
+. FD A1 60 28 83 C1 00 18 CB 01 00 20 CB 21 00 28 FC 6D F0 2A CB 61 00 38 CB 81 00 40 CB A1 00 48 FF C3 D0 2A CB E1 00 58 FC 3E 10 2A CB C1 00 50 FC 4C 08 2A FD 2C 10 28 D8 43 00 00 FF 49 08 2A DB 43 00 08 CB 41 00 30 38 21 00 60 4E 80 00 20
+
+. 0 FE0D030 16
+. C9 A1 00 18 C8 1D 00 00 FF 8D 00 00 40 9D 0E 38
+
+. 0 FE0DE74 20
+. 83 FE 0F 68 FC 9F 00 00 C8 7F 00 00 FD AD 00 F2 40 85 00 80
+
+. 0 FE0DF04 8
+. 81 3E 0F BC 4B FF FF 84
+
+. 0 FE0DE8C 16
+. C8 C9 00 00 FD 7F 01 B2 FC 0D 58 28 4B FF F1 C8
+
+. 0 FE0D060 16
+. C8 21 00 10 FD 21 00 2A FF 01 48 00 41 9A 00 D8
+
+. 0 FE0D070 112
+. C8 DC 00 00 C9 3B 00 00 C9 7A 00 00 FC 69 37 FA C8 B9 00 00 83 5E 0E 48 83 3E 0E 44 C8 FA 00 00 FF 63 30 28 CB D9 00 00 D8 61 00 30 81 21 00 30 81 41 00 34 FC 4B 06 F2 71 40 00 02 FF 85 06 F2 FF BF 10 28 FD 07 06 F2 FD BD E0 28 FF 5E 06 F2 FC 0D 40 28 FF C0 D0 28 FD 8D 00 28 FD 40 F0 28 FC 8C 40 28 FC 2A D0 28 FC 44 08 2A 41 82 00 0C
+
+. 0 FE0D0E0 24
+. FF C0 F0 50 FC 40 10 50 C8 9D 00 00 FC 20 F0 90 FE 1E 20 00 41 91 00 0C
+
+. 0 FE0D0F8 16
+. FC 40 10 50 FC 20 F0 50 7F 03 C3 78 48 01 80 E9
+
+. 0 FE0D108 16
+. C9 A1 00 18 C8 1D 00 00 FF 8D 00 00 40 9D 0E 14
+
+. 0 FE0DF28 16
+. FF 1F 00 00 C9 5F 00 00 FD AD 02 B2 40 99 00 14
+
+. 0 FE0DF48 8
+. 81 3E 0F C0 4B FF FF 88
+
+. 0 FE0DED4 16
+. C9 89 00 00 FD 5F 03 32 FC 0D 50 28 4B FF F2 54
+
+. 0 FE0D134 16
+. C8 21 00 10 FF 41 00 2A FE 01 D0 00 40 92 04 70
+
+. 0 FE0D144 12
+. CB FD 00 00 FF 9E F8 00 41 BD F9 0C
+
+. 0 FE0D150 8
+. FC 20 08 50 4B FF FC 6C
+
+. 0 FE0CDC0 8
+. FD 60 08 90 4B FF FC 98
+
+. 0 10001658 32
+. 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 CA 14 7C 19 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
+
+. 0 10008F60 8
+. 7C A3 2B 78 4B FF D8 95
+
+. 0 100067F8 20
+. 38 00 00 01 94 21 FF F0 7F 80 18 40 39 20 00 00 40 9C 00 14
+
+. 0 1000680C 16
+. 54 00 08 3C 39 29 00 01 7F 80 18 40 41 9C FF F4
+
+. 0 1000681C 20
+. 38 00 00 01 7C 00 48 30 7F 83 00 00 38 60 FF FF 40 9E 00 08
+
+. 0 10006830 12
+. 7D 23 4B 78 38 21 00 10 4E 80 00 20
+
+. 0 10008F68 12
+. 2F 83 FF FF 7C 79 1B 78 41 9E 02 40
+
+. 0 10008F74 24
+. 7F E3 FB 78 7F A4 EB 78 7F 85 E3 78 7F 26 CB 78 3B 00 00 00 4B FF D2 C5
+
+. 0 1000624C 28
+. 94 21 FF F0 39 00 00 00 93 E1 00 08 7C 9F 23 78 34 85 FF FF 38 E0 00 00 41 82 00 74
+
+. 0 10006268 24
+. 54 A5 F8 7E 38 C0 00 00 57 EC 20 36 7F 87 40 40 7C AA 2B 78 40 9C 00 40
+
+. 0 100062BC 8
+. 7F 8A 40 40 40 9D FF F4
+
+. 0 100062C4 20
+. 38 E7 00 01 7D 08 52 14 7F 84 38 40 7C C6 62 14 41 9D FF A0
+
+. 0 100062D8 16
+. 38 60 00 00 83 E1 00 08 38 21 00 10 4E 80 00 20
+
+. 0 10008F8C 12
+. 7F 98 C8 40 3B 60 00 01 40 9C 01 C4
+
+. 0 10008F98 108
+. 6F 40 80 00 81 3E 80 8C 3F 40 43 30 90 01 00 0C 93 41 00 08 C8 09 00 00 C9 A1 00 08 81 3E 80 90 FD AD 00 28 82 FE 80 84 C8 09 00 00 82 DE 80 88 FD AD 68 2A 82 BE 80 94 82 9E 80 98 FF 6D 00 32 93 61 00 14 93 41 00 10 C8 15 00 00 CB E1 00 10 CB B7 00 00 FF FF 00 28 CB D6 00 00 FF FF F8 2A FF FB F8 24 FC 20 F8 90 48 01 FF 95
+
+. 0 10009004 16
+. FF 80 08 90 C8 34 00 00 FC 3F 00 72 48 01 FF 85
+
+. 0 FE0CCC4 8
+. 2F 09 00 00 40 99 06 44
+
+. 0 FE0D30C 16
+. 83 9E 0E 78 C8 5C 00 00 FD 82 08 2A 4B FF F9 C0
+
+. 0 FE0CCD8 20
+. 83 FE 0F 64 C8 FF 00 00 FF 8C 38 00 4F DD F3 82 41 9E 0A 88
+
+. 0 FE0D770 48
+. 81 5E 0E 80 83 BE 0E 74 C8 CA 00 00 CB DD 00 00 FC 86 60 2A FC A4 30 28 D8 81 00 30 81 61 00 30 81 81 00 34 FD AC 28 28 FD 4D F0 2A 4B FF F5 80
+
+. 0 FE0CD1C 152
+. FD 0A 02 B2 80 DE 0F 6C 80 BE 0F 70 55 80 28 34 80 9E 0F 78 80 7E 0F 74 C8 46 00 00 FD 2A 02 32 C8 E5 00 00 CB 64 00 00 CB 83 00 00 FF 48 38 BA 80 FE 0F 7C FF A8 E6 FA 81 1E 0E 7C C9 67 00 00 7D 20 42 14 7D A8 04 AE FC 3A 5A 3A C8 49 00 10 C8 89 00 18 FC C9 57 7A C9 49 00 08 81 9E 0F 90 FC 01 02 32 CB 4C 00 00 FC 66 02 B2 FD 82 00 32 FC A4 18 28 FF CD 01 B2 FC E5 60 28 FF 67 F0 28 FD 82 D8 2A FF 82 60 28 FF BB E0 2A FD 1D 66 BA FC 08 60 00 40 82 08 10
+
+. 0 FE0CDB4 8
+. FC 20 60 90 41 B9 FC A0
+
+. 0 FE0CDBC 12
+. FC 20 08 50 FD 60 08 90 4B FF FC 98
+
+. 0 10009014 24
+. 39 00 00 00 FC 01 00 72 7F 88 E0 40 57 66 08 3C FD 01 00 7A 40 9C 00 64
+
+. 0 1000902C 96
+. 7C 08 DA 14 7D 3D 41 D6 7D 08 32 14 7F 88 E0 40 7C 1D 01 D6 55 29 20 36 7C 09 FC AE 7D 69 FA 14 54 00 20 36 7D 7F 04 AE 7D 40 FA 14 C9 8A 00 08 FC 00 58 28 7C 1F 05 AE C9 AB 00 08 FD AD 60 28 D9 AA 00 08 7C 09 FC AE FC 00 58 2A 7C 09 FD AE C9 AB 00 08 FD AD 60 2A D9 AB 00 08 41 9C FF A4
+
+. 0 1000908C 12
+. 38 E0 00 01 7F 87 D8 40 40 9C 00 B4
+
+. 0 10009148 16
+. 3B 18 00 01 7C DB 33 78 7F 98 C8 40 41 9C FE 84
+
+. 0 10009158 88
+. 38 60 00 00 80 01 00 74 82 81 00 18 82 A1 00 1C 7C 08 03 A6 82 C1 00 20 82 E1 00 24 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB 61 00 48 CB 81 00 50 CB A1 00 58 CB C1 00 60 CB E1 00 68 38 21 00 70 4E 80 00 20
+
+. 0 1000169C 32
+. 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 BA 14 7C 17 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
+
+. 0 100008E8 8
+. FC 20 F8 90 42 00 FF C0
+
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 2, stride = 1
+. 0 FE0CE6C 20
+. 81 3E 0F 94 2F 9F 00 01 C9 29 00 00 FC 9F 02 72 41 9E 04 D0
+
+. 0 FE0DD24 16
+. 80 7E 0F 90 C8 23 00 00 FC 0D 20 78 4B FF F1 F4
+
+. 0 FE0CF24 16
+. FC 8C 00 2A FC 20 60 90 FE 04 60 00 41 B2 FB 28
+
+. 0 FE0DDDC 20
+. 81 1E 0F 88 FC 9F 28 00 C9 A8 00 00 FC C6 03 72 40 85 01 00
+
+. 0 FE0DDF0 20
+. 81 3E 0F 9C CB A9 00 00 FF 7F 07 72 FC 06 D8 28 4B FF F2 00
+
+. 0 FE0D000 12
+. FF 81 00 2A FF 1C 08 00 41 BA FA 50
+
+. 0 FE0D024 12
+. 3B 01 00 10 7F 03 C3 78 48 01 81 C1
+
+. 0 FE0DE88 20
+. 81 3E 0F A0 C8 C9 00 00 FD 7F 01 B2 FC 0D 58 28 4B FF F1 C8
+
+. 0 FE0D100 8
+. 7F 03 C3 78 48 01 80 E9
+
+. 0 FE0DF38 8
+. 81 3E 0F A4 4B FF FF 98
+
+. 0 FE0CA58 88
+. FD 60 08 90 83 01 00 A4 FC 20 58 90 80 81 00 4C 7F 08 03 A6 83 21 00 54 83 01 00 50 7C 80 81 20 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C CB 41 00 70 CB 61 00 78 CB 81 00 80 CB A1 00 88 CB C1 00 90 CB E1 00 98 38 21 00 A0 4E 80 00 20
+
+. 0 FE0CCCC 32
+. 83 9E 0E 78 CB 9C 00 00 FD 9C 08 28 83 FE 0F 64 C8 FF 00 00 FF 8C 38 00 4F DD F3 82 41 9E 0A 88
+
+. 0 1000929C 36
+. 7C 1F 04 AE 7D 20 FA 14 FC 00 03 32 7C 1F 05 AE 7C 00 22 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
+
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 2, stride = 1
+. 0 100017A4 36
+. 7C 19 04 AE 7D 20 CA 14 FC 00 03 32 7C 19 05 AE 7C 00 5A 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
+
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 2, stride = 1
+. 0 10004864 36
+. 7D 20 32 14 7D 66 01 2E 38 C6 00 04 7D 86 01 2E 38 C6 FF FC 91 69 00 08 91 89 00 0C 7C 00 52 14 42 00 FF E0
+
+. 0 100048E8 48
+. 7C 1D F3 96 93 01 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD DA 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF D8 24 FC 20 F8 90 48 02 45 E1
+
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 2, stride = 1
+. 0 100049E8 20
+. 7D 20 2A 14 7C 25 05 AE D8 49 00 08 7C 00 5A 14 42 00 FF F0
+
+. 0 10004A18 36
+. 7D 20 32 14 7D 66 01 2E 38 C6 00 04 7D 86 01 2E 38 C6 FF FC 91 69 00 08 91 89 00 0C 7C 00 22 14 42 00 FF E0
+
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 2, stride = 1
+. 0 10004B60 48
+. 7C 1D F3 96 92 C1 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD D2 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF D8 24 FC 20 F8 90 48 02 43 69
+
+. 0 10004BE0 36
+. 7D 20 DA 14 7D 7B 01 2E 3B 7B 00 04 7D 9B 01 2E 3B 7B FF FC 91 69 00 08 91 89 00 0C 7C 00 52 14 42 00 FF E0
+
+. 0 1000191C 48
+. 3D 20 10 02 3D 60 10 02 39 29 81 18 39 6B 80 F0 C8 29 00 00 7F 66 DB 78 C8 4B 00 00 7F 07 C3 78 7F E3 FB 78 7F C4 F3 78 7F 45 D3 78 48 00 31 69
+
+. 0 FE0E32C 20
+. 81 3E 0F F4 2F 1F 00 01 C9 29 00 00 FC 7F 02 72 41 9A 05 C0
+
+. 0 FE0E6EC 192
+. FC 40 10 50 FC 80 20 50 D8 41 00 20 81 5E 0E 80 80 BE 0F C8 C9 6A 00 00 80 9E 0F CC FC 0B 10 2A 80 7E 0F D0 83 BE 0F D4 CB C5 00 00 FD 20 58 28 C8 C4 00 00 C9 03 00 00 CB BD 00 00 FD 42 48 28 80 FE 0F D8 D8 01 00 30 C8 A7 00 00 FD AA 20 2A 81 61 00 30 81 81 00 34 81 1E 0E 7C 55 80 28 34 D8 81 00 28 FD 2D 03 72 7D 20 42 14 C9 49 00 08 FD 89 37 BA CB C9 00 18 FC E9 EA 3A C9 09 00 10 7F A8 04 AE FD 6D 02 72 FC 0C 2A 7A FD 6B 69 FA FC C0 02 72 FC EB 02 B2 FD 88 01 B2 FC 1E 38 28 FD 5D 02 F2 FD A0 60 28 FC AD 50 28 FD A8 28 2A FF C8 68 28 FD 45 F0 2A FC 8A 08 00 40 85 04 B4
+
+. 0 10004C0C 160
+. 7C 1A F3 96 7C 00 F1 D6 7C 60 D0 50 3C 00 43 30 3D 20 10 02 90 01 00 10 39 29 80 F8 93 C1 00 14 7C 17 19 D6 C9 A1 00 10 38 60 00 00 C8 09 00 00 FD AD 00 28 54 00 20 36 7D 20 DA 14 FC 0D 07 72 FD AD 07 32 7D BB 05 AE D8 09 00 08 80 01 00 84 82 C1 00 20 82 E1 00 24 7C 08 03 A6 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB 21 00 48 CB 41 00 50 CB 61 00 58 CB 81 00 60 CB A1 00 68 CB C1 00 70 CB E1 00 78 38 21 00 80 4E 80 00 20
+
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 2, stride = 1
+. 0 10001EE0 20
+. 39 20 00 01 38 E7 00 01 7D 20 38 30 7F 80 F0 40 41 9C FF F4
+
+. 0 10001F18 24
+. 7C E9 03 A6 55 20 07 FE 55 6B 08 3C 7D 6B 03 78 55 29 F8 7E 42 00 FF F0
+
+. 0 10001F08 16
+. 39 60 00 00 7D 49 53 78 7F 8B 38 40 40 9C 00 1C
+
+. 0 10001F60 24
+. 57 C5 F8 7E 39 00 00 00 57 67 18 38 7F 8A 58 40 7C A9 2B 78 40 9C 00 28
+
+. 0 10001F9C 8
+. 7F 89 58 40 40 9D FF F4
+
+. 0 10001FA4 20
+. 39 4A 00 01 7D 6B 4A 14 7F 86 50 40 7D 08 3A 14 41 9D FF B8
+
+. 0 10000ADC 32
+. 7D 9F 04 AE 7D BE 04 AE 7C 00 4A 14 FC 0C 68 28 FC 00 02 10 FF E0 02 F2 FF 9F 08 00 40 9D 00 08
+
+PASS: fft_real_bitreverse_order, n = 2
+. 0 10005174 4
+. 4B FF F6 19
+
+. 0 1000218C 24
+. 55 60 20 36 55 69 18 38 7C 1E 04 AE 7D 6B DA 14 7C 09 FD AE 42 00 FF EC
+
+. 0 10012600 8
+. 7C A3 2B 78 4B FF 41 F5
+
+. 0 10012608 12
+. 2F 83 FF FF 7C 79 1B 78 41 9E 02 54
+
+. 0 10012614 24
+. 7F 85 E3 78 7F E3 FB 78 7F A4 EB 78 7F 26 CB 78 3B 00 00 01 4B FF 3C C1
+
+. 0 100062E8 20
+. 34 C5 FF FF 94 21 FF F0 39 60 00 00 39 40 00 00 41 82 00 5C
+
+. 0 100062FC 24
+. 54 A5 F8 7E 39 00 00 00 54 87 18 38 7F 8A 58 40 7C A9 2B 78 40 9C 00 28
+
+. 0 10006338 8
+. 7F 89 58 40 40 9D FF F4
+
+. 0 10006340 20
+. 39 4A 00 01 7D 6B 4A 14 7F 86 50 40 7D 08 3A 14 41 9D FF B8
+
+. 0 10006354 12
+. 38 60 00 00 38 21 00 10 4E 80 00 20
+
+. 0 1001262C 16
+. 7F 98 C8 40 7F 9A E3 78 3B 80 00 01 41 9D 01 D0
+
+. 0 1001263C 40
+. 82 DE 82 84 3E E0 43 30 82 BE 82 88 82 9E 82 8C 82 7E 82 90 82 5E 82 94 57 5A F8 7F 7F 9B E3 78 57 9C 08 3C 41 82 00 40
+
+. 0 10012664 60
+. 7F 49 03 A6 39 60 00 00 7C 0B DA 14 7D 2B E9 D6 7D 6B E2 14 7C 00 E9 D6 55 29 18 38 7C 09 FC AE 54 00 18 38 7D 9F 04 AE FD A0 60 28 FC 00 60 2A 7C 09 FD AE 7D BF 05 AE 42 00 FF D0
+
+. 0 100126A0 44
+. 93 81 00 0C 92 E1 00 08 C9 B4 00 00 C8 01 00 08 CB F3 00 00 FC 00 68 28 CB B6 00 00 CB D5 00 00 FF FF 00 24 FC 20 F8 90 48 01 68 CD
+
+. 0 100126CC 16
+. FF 80 08 90 C8 32 00 00 FC 3F 00 72 48 01 68 BD
+
+. 0 100126DC 24
+. 57 65 F8 7E FC 01 00 72 2B 85 00 01 38 C0 00 01 FC 81 00 7A 40 9D 00 D8
+
+. 0 100127C8 8
+. 2B 9B 00 01 40 9D 00 30
+
+. 0 100127FC 12
+. 3B 18 00 01 7F 98 C8 40 40 9D FE 50
+
+. 0 10012808 92
+. 38 60 00 00 80 01 00 74 82 41 00 18 82 61 00 1C 7C 08 03 A6 82 81 00 20 82 A1 00 24 82 C1 00 28 82 E1 00 2C 83 01 00 30 83 21 00 34 83 41 00 38 83 61 00 3C 83 81 00 40 83 A1 00 44 83 C1 00 48 83 E1 00 4C CB 81 00 50 CB A1 00 58 CB C1 00 60 CB E1 00 68 38 21 00 70 4E 80 00 20
+
+. 0 1000E6A8 36
+. 7D 2C 29 D6 C9 BF 00 00 55 20 18 38 55 29 20 36 7C 03 04 AE 7D 69 22 14 7C 09 25 AE D9 AB 00 08 4B FF FF C4
+
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 2, stride = 1
+. 0 1000E114 8
+. 7C A3 2B 78 4B FF 86 E1
+
+. 0 1000E11C 12
+. 2F 83 FF FF 7C 78 1B 78 41 9E 02 80
+
+. 0 1000E128 24
+. 3B 20 00 01 7E FC BB 78 7F 99 18 40 3B 40 00 01 56 FB F8 7E 41 9D 01 F0
+
+. 0 1000E140 40
+. 81 3E 81 B8 3E C0 43 30 82 BE 81 A4 CB 69 00 00 82 9E 81 A8 82 7E 81 AC 82 5E 81 B0 82 3E 81 B4 2F 9A 00 00 41 9E 00 40
+
+. 0 1000E168 60
+. 7F 49 03 A6 39 60 00 00 7C 0B DA 14 7D 2B E9 D6 7D 6B E2 14 7C 00 E9 D6 55 29 18 38 7C 09 FC AE 54 00 18 38 7D 9F 04 AE FD A0 60 28 FC 00 60 2A 7C 09 FD AE 7D BF 05 AE 42 00 FF D0
+
+. 0 1000E1A4 44
+. 93 81 00 0C 92 C1 00 08 C9 B3 00 00 C8 01 00 08 CB F2 00 00 FC 00 68 28 CB B5 00 00 CB D4 00 00 FF FF 00 24 FC 20 F8 90 48 01 AD C9
+
+. 0 1000E1D0 16
+. FF 80 08 90 C8 31 00 00 FC 3F 00 72 48 01 AD B9
+
+. 0 1000E1E0 24
+. 57 65 F8 7E FC 01 00 72 2B 85 00 01 38 C0 00 01 FC A1 00 7A 40 9D 00 C8
+
+. 0 1000E2BC 8
+. 2B 9B 00 01 40 9D 00 54
+
+. 0 1000E314 24
+. 3B 39 00 01 7C BB 2B 78 7F 99 C0 40 57 9C F8 7E 57 5A 08 3C 40 9D FE 38
+
+. 0 1000E32C 20
+. 7F E3 FB 78 7F A4 EB 78 7E E5 BB 78 7F 06 C3 78 4B FF 7F AD
+
+. 0 1000E340 100
+. 38 60 00 00 80 01 00 84 82 21 00 1C 82 41 00 20 7C 08 03 A6 82 61 00 24 82 81 00 28 82 A1 00 2C 82 C1 00 30 82 E1 00 34 83 01 00 38 83 21 00 3C 83 41 00 40 83 61 00 44 83 81 00 48 83 A1 00 4C 83 C1 00 50 83 E1 00 54 CB 61 00 58 CB 81 00 60 CB A1 00 68 CB C1 00 70 CB E1 00 78 38 21 00 80 4E 80 00 20
+
+. 0 10002250 20
+. 7C 1F 04 AE FC 00 68 24 7C 1F 05 AE 7C 00 4A 14 42 00 FF F0
+
+. 0 100128C4 32
+. 55 40 18 38 55 49 20 36 7C 03 04 AE 7D 69 22 14 7D 4A 2A 14 7C 09 25 AE D9 AB 00 08 42 00 FF E4
+
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 2, stride = 1
+PASS: fft_complex_bitreverse_order, n = 2
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 2, stride = 2
+. 0 10000C48 12
+. 2B 84 00 01 39 6B 00 02 40 9D 00 80
+
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 2, stride = 2
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 2, stride = 2
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 2, stride = 2
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 2, stride = 2
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 2, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 2, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 2, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 2, stride = 2
+PASS: fft_real_bitreverse_order, n = 2
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 2, stride = 2
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 2, stride = 2
+PASS: fft_complex_bitreverse_order, n = 2
+. 0 FEEEC18 8
+. 71 20 00 02 40 82 02 FC
+
+. 0 FEEEC20 20
+. 81 03 00 30 7F 5F EA 14 83 7E 06 5C 7F 08 F8 00 41 9A 02 54
+
+. 0 FEEEC34 8
+. 71 60 00 02 41 82 03 50
+
+. 0 FEEEF88 24
+. 82 48 00 04 83 7E 06 74 56 51 00 38 7D 68 8A 14 7F 8B D0 40 41 9D FC A0
+
+. 0 FEEEC3C 16
+. 80 1A 00 04 83 7E 06 60 70 0B 00 01 41 82 02 3C
+
+. 0 FEEEC4C 12
+. 28 80 00 08 54 1B 00 38 40 85 02 2C
+
+. 0 FEEEC58 12
+. 82 7C 04 4C 7F 13 D8 40 40 99 02 20
+
+. 0 FEEEC64 8
+. 71 27 00 01 40 82 00 3C
+
+. 0 FEEECA4 8
+. 7F 88 D0 00 41 9E 02 C0
+
+. 0 FEEEF68 20
+. 7F BD DA 14 93 FC 00 30 63 AA 00 01 91 5F 00 04 4B FF FD 94
+
+. 0 FEEED0C 8
+. 28 9D FF FF 40 85 01 24
+
+. 0 FEEED14 12
+. 83 BC 00 04 73 A9 00 01 41 82 02 60
+
+. 0 FEEEF7C 8
+. 7F 83 E3 78 4B FF F5 45
+
+. 0 FEEE53C 48
+. 61 63 00 01 81 DE 06 4C 54 69 F8 7A 82 1E 05 F0 90 78 00 04 7E 89 C2 14 3B 58 00 38 3A D8 00 08 7D CF 73 78 83 F6 00 00 2C 1F 00 00 41 82 01 A0
+
+. 0 FEEE56C 24
+. 38 A0 00 00 7E 13 83 78 90 B6 00 00 7D F2 7B 78 7D D1 73 78 48 00 00 5C
+
+. 0 FEEE5DC 36
+. 80 FF 00 04 39 00 FF FA 82 FF 00 08 7C FC 40 38 70 E8 00 01 7F BF E2 14 80 DD 00 04 54 DB 00 38 40 82 00 38
+
+. 0 FEEE634 12
+. 83 38 00 30 7C 99 E8 00 41 86 00 B0
+
+. 0 FEEE640 16
+. 7C 9D DA 14 80 04 00 04 70 0A 00 01 41 A2 FF 38
+
+. 0 FEEE650 16
+. 80 BD 00 04 54 A9 00 3C 91 3D 00 04 4B FF FF 54
+
+. 0 FEEE5B0 44
+. 2F 17 00 00 80 DA 00 08 63 87 00 01 93 FA 00 08 93 E6 00 0C 7F 9F E1 2E 90 FF 00 04 90 DF 00 08 93 5F 00 0C 7E FF BB 78 41 9A 01 30
+
+. 0 FEEE600 32
+. 81 7F 00 00 7F EB F8 50 7F 9C 5A 14 81 5F 00 08 81 7F 00 0C 81 8A 00 0C 7C 8C F8 00 40 86 00 FC
+
+. 0 FEEE620 12
+. 82 AB 00 08 7F 15 F8 00 40 9A 00 F0
+
+. 0 FEEE62C 20
+. 91 4B 00 08 91 6A 00 0C 83 38 00 30 7C 99 E8 00 41 86 00 B0
+
+. 0 FEEE708 12
+. 7F 96 A0 00 3A D6 00 04 40 9E FE 50
+
+. 0 FEEE560 12
+. 83 F6 00 00 2C 1F 00 00 41 82 01 A0
+
+. 0 FEEE584 24
+. 81 7D 00 08 7F 9C DA 14 81 3D 00 0C 83 6B 00 0C 7F 1B E8 00 40 9A 01 9C
+
+. 0 FEEE59C 12
+. 80 69 00 08 7F 83 E8 00 40 9E 01 90
+
+. 0 FEEE5A8 52
+. 91 69 00 08 91 2B 00 0C 2F 17 00 00 80 DA 00 08 63 87 00 01 93 FA 00 08 93 E6 00 0C 7F 9F E1 2E 90 FF 00 04 90 DF 00 08 93 5F 00 0C 7E FF BB 78 41 9A 01 30
+
+. 0 FEEE714 4
+. 4B FF FF 80
+
+. 0 FEEE694 88
+. 82 61 00 74 81 C1 00 28 7E 68 03 A6 81 E1 00 2C 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
+
+. 0 FEEEF84 4
+. 4B FF FD 9C
+
+. 0 FEEED20 12
+. 83 FE 05 FC 7F 1C F8 00 41 9A 03 9C
+
+. 0 FEEF0C4 28
+. 82 3C 00 30 81 5E 06 28 81 71 00 04 81 8A 00 00 55 7F 00 38 7F 9F 60 40 41 BC FD 58
+
+. 0 FEEF0E0 36
+. 82 EA 00 04 82 4A 00 18 7E D7 F8 50 7E B6 92 14 3A 95 FF EF 7C 94 93 96 3A 64 FF FF 7F 73 91 D7 40 A1 FD 34
+
+. 0 FEEEE34 76
+. 83 A1 00 64 82 21 00 24 7F A8 03 A6 82 41 00 28 82 61 00 2C 82 81 00 30 82 A1 00 34 82 C1 00 38 82 E1 00 3C 83 01 00 40 83 21 00 44 83 41 00 48 83 61 00 4C 83 81 00 50 83 A1 00 54 83 C1 00 58 83 E1 00 5C 38 21 00 60 4E 80 00 20
+
+. 0 FEEEC6C 32
+. 82 9F 00 00 7F F4 F8 50 7F BD A2 14 81 5F 00 08 81 7F 00 0C 80 8A 00 0C 7F 84 F8 00 40 9E 04 20
+
+. 0 FEEEC8C 12
+. 82 AB 00 08 7C 95 F8 00 40 86 04 14
+
+. 0 FEEEC98 20
+. 91 4B 00 08 91 6A 00 0C 81 1C 00 30 7F 88 D0 00 41 9E 02 C0
+
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 2, stride = 3
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 2, stride = 3
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 2, stride = 3
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 2, stride = 3
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 2, stride = 3
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 2, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 2, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 2, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 2, stride = 3
+. 0 FEEECAC 16
+. 7F 3A DA 14 83 19 00 04 73 0A 00 01 40 82 02 A0
+
+. 0 FEEEF58 16
+. 80 FA 00 04 54 FB 00 3C 93 7A 00 04 4B FF FD 84
+
+. 0 FEEECE8 44
+. 38 7C 00 38 63 A8 00 01 80 C3 00 08 90 7F 00 0C 90 DF 00 08 91 1F 00 04 7F BF E9 2E 93 E6 00 0C 93 E3 00 08 28 9D FF FF 40 85 01 24
+
+PASS: fft_real_bitreverse_order, n = 2
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 2, stride = 3
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 2, stride = 3
+. 0 FEEE6EC 28
+. 2F 17 00 00 7D 1C DA 14 61 1C 00 01 93 F8 00 30 93 9F 00 04 7E FF BB 78 40 9A FE D8
+
+. 0 100013B4 16
+. 38 E7 00 01 7D 20 38 30 7F 80 F0 40 41 9C FF F4
+
+. 0 100013EC 20
+. 55 20 07 FE 55 6B 08 3C 7D 6B 03 78 55 29 F8 7E 42 00 FF F0
+
+. 0 1000144C 12
+. 7F 87 40 40 7C 6A 1B 78 40 9C 00 40
+
+. 0 10001458 52
+. 7C 1B 41 D6 7D 66 FA 14 7D 86 FC AE C9 6B 00 08 54 00 20 36 7D BF 04 AE 7D 20 FA 14 7D A6 FD AE C8 09 00 08 D8 0B 00 08 7D 9F 05 AE D9 69 00 08 48 00 00 0C
+
+. 0 1000148C 16
+. 7D 0A 40 50 55 4A F8 7E 7F 8A 40 40 40 9D FF F4
+
+PASS: fft_complex_bitreverse_order, n = 4
+. 0 FE0E1C4 16
+. 80 DE 0F C4 CB A6 00 00 FC 81 E8 00 41 85 01 98
+
+. 0 FE0E1D4 60
+. 83 BE 0E 78 80 7E 0E 74 C8 7D 00 00 83 FE 0F EC FC 03 08 2A C8 23 00 00 C9 BF 00 00 FC C1 00 2A FD 46 01 B2 D8 C1 00 20 FD 60 30 28 FF 8A 68 00 FC 4B 08 2A D8 41 00 28 40 9C 01 98
+
+. 0 FE0E210 100
+. 81 5E 0E 70 81 1E 0E 6C C9 AA 00 00 C9 28 00 00 80 FE 0E 68 FD 6D 4A BA 80 BE 0E 64 C8 E7 00 00 C8 25 00 00 81 3E 0E 60 FC 6B 3A BA 80 9E 0F D8 CB A9 00 00 C8 84 00 00 C8 E6 00 00 FC A3 0A BA FF C2 01 32 FD 05 EA BA FD 88 F1 B8 FD 2C 12 BA FC 26 48 2A FC 06 08 28 FD 80 48 2A FF 0C 38 00 40 99 04 3C
+
+. 0 FE0E6AC 24
+. 83 BE 0F DC 81 9E 0F F0 CB DD 00 00 C8 0C 00 00 FC 0C 07 B8 4B FF FB C8
+
+. 0 FE0E288 12
+. FD 81 00 2A FC 0C 08 00 41 82 FE FC
+
+. 0 FE0E294 12
+. FC 20 30 90 FC 60 F8 90 4B FF D7 FD
+
+. 0 FE0BA98 12
+. 94 21 FF B0 7C 08 02 A6 48 06 76 11
+
+. 0 FE0BAA4 232
+. 93 C1 00 38 7F C8 02 A6 FC E1 00 72 DB C1 00 40 DB E1 00 48 FF E0 08 90 81 1E 0E 8C 80 FE 0E 70 C9 48 00 00 81 7E 0E 6C FD 81 50 2A CB C7 00 00 C9 2B 00 00 80 DE 0E 88 FD 8C 50 28 80 BE 0E 68 FC BE 49 FA 80 9E 0E 90 C8 C6 00 00 FD 01 60 28 C8 05 00 00 C8 24 00 00 FD 46 03 32 80 7E 0E 64 FD A5 01 FA 81 3E 0E 84 C8 83 00 00 FD 66 00 72 C9 29 00 00 93 E1 00 3C FD 08 10 2A 83 FE 0E 94 FF CD 21 FA 93 81 00 30 93 A1 00 34 FC 0B 03 32 90 01 00 54 FC A6 02 32 C8 DF 00 00 FC 2A 03 32 FD BE 49 FA FC 80 02 32 FF C5 02 32 FD 41 03 32 FD 2D 21 FA FD 7E 02 32 FC 9F 50 2A FF C0 18 90 FC A9 5F FA FC 7F 20 28 FC 25 10 2A FC 03 50 2A FD A1 00 2A FC 24 68 2A FD 84 08 28 FD 8C 68 2A FF 8C 30 00 40 9D 00 58
+
+. 0 FE0BBE0 20
+. FC 9E 30 00 81 9E 0E 98 C8 CC 00 00 FD 8C 01 B2 41 85 00 78
+
+. 0 FE0BBF4 28
+. 81 3E 0E A0 C9 A9 00 00 FD 7E 03 72 FD 8C 58 28 FC 81 60 2A FF 04 08 00 41 BA FF AC
+
+. 0 FE0BC10 16
+. C9 1F 00 00 FC 20 F8 90 FF 9F 40 00 41 9D 00 0C
+
+. 0 FE0BC28 12
+. 3B 81 00 10 7F 83 E3 78 48 01 95 BD
+
+. 0 FE0BC34 16
+. C9 A1 00 18 C8 1F 00 00 FC 0D 00 00 40 81 00 40
+
+. 0 FE0BC80 20
+. 83 BE 0E A4 FF 1E 00 00 C8 BD 00 00 FD AD 01 72 41 99 01 40
+
+. 0 FE0BC94 32
+. 81 3E 0E AC C9 29 00 00 FC 1E 02 72 FC 0D 00 28 C9 A1 00 10 FD 8D 00 2A FF 8D 60 00 41 9E 00 E4
+
+. 0 FE0BCB4 132
+. 80 FE 0E 5C 81 7E 0E 58 C8 C7 00 00 C8 0B 00 00 80 DE 0E 54 FD 26 07 BA 80 BE 0E 50 C8 E6 00 00 C9 85 00 00 80 9E 0E 48 FD 69 00 28 80 7E 0E 44 C9 44 00 00 CB E3 00 00 FC 67 02 F2 D9 21 00 20 81 21 00 20 81 41 00 24 FC AC 02 F2 55 49 07 BE FC 3E 18 28 2C 09 00 01 FC 8A 02 F2 FC 41 28 28 FC DF 02 F2 FD 02 20 28 FF E8 30 28 FD A2 40 28 FC E8 F8 28 FC 6D 20 28 FD 47 30 28 FC 43 50 2A 41 82 00 E4
+
+. 0 FE0BD38 16
+. C9 BF 00 00 FC 20 F8 90 FC 9F 68 00 41 85 00 0C
+
+. 0 FE0BD50 8
+. 7F 83 E3 78 48 01 94 99
+
+. 0 FE0BD58 16
+. C9 A1 00 18 C8 1F 00 00 FF 0D 00 00 40 99 00 84
+
+. 0 FE0BDE8 16
+. FC 1E 00 00 C8 5D 00 00 FD AD 00 B2 40 81 00 38
+
+. 0 FE0BE2C 8
+. 81 3E 0E B4 4B FF FF CC
+
+. 0 FE0BDFC 16
+. C8 29 00 00 FD 7E 00 72 FC 0D 58 28 4B FF FF 7C
+
+. 0 FE0BD84 16
+. C9 A1 00 10 FC AD 00 2A FC 8D 28 00 40 86 00 7C
+
+. 0 FE0BD94 16
+. CB DF 00 00 FC 20 68 90 FF 1F F0 00 41 B9 FE 18
+
+. 0 FE0BBB8 40
+. 83 81 00 54 83 A1 00 34 7F 88 03 A6 83 C1 00 38 83 81 00 30 83 E1 00 3C CB C1 00 40 CB E1 00 48 38 21 00 50 4E 80 00 20
+
+. 0 FE0E2A0 4
+. 4B FF FE EC
+
+. 0 FE0E8FC 8
+. FD 42 00 B2 40 9A 00 10
+
+. 0 FE0E904 32
+. FC 40 10 50 FC 80 20 50 D8 41 00 20 81 1E 0F EC D8 81 00 28 CB C8 00 00 FF 0A F0 00 40 98 00 A4
+
+. 0 FE0E924 100
+. 80 7E 0E 70 80 BE 0E 6C C8 C3 00 00 C9 05 00 00 83 FE 0E 68 FD 26 42 BA 83 BE 0E 64 CB DF 00 00 C8 1D 00 00 C8 C6 00 00 FD 69 F2 BA 81 9E 0E 60 80 DE 0F D8 C9 8C 00 00 C8 A6 00 00 FD AB 02 BA FF A4 01 72 FC ED 62 BA FC 27 E8 B8 FD 01 22 BA FC 22 40 2A FD 42 08 28 FD AA 40 2A FF 8D 30 00 40 9D 03 E8
+
+. 0 FE0E988 24
+. 80 9E 0F DC C9 44 00 00 FC 0D 1A BA FC 61 00 2A FC 03 08 00 41 82 F7 F0
+
+. 0 FE0E9A0 16
+. FC 20 10 90 FC 60 F8 90 FC 40 20 90 4B FF D0 ED
+
+. 0 FE0BB8C 20
+. 81 5E 0E 98 FC 1E 30 00 C8 6A 00 00 FD 8C 00 F2 40 81 00 D4
+
+. 0 FE0BC70 16
+. 81 3E 0E A0 C8 E9 00 00 FD 9E 61 FA 4B FF FF 30
+
+. 0 FE0BBAC 12
+. FC 81 60 2A FF 04 08 00 40 9A 00 5C
+
+. 0 FE0BC20 20
+. FC 40 10 50 FC 20 F8 50 3B 81 00 10 7F 83 E3 78 48 01 95 BD
+
+. 0 FE0BE18 12
+. FF E0 F8 50 FC 40 10 50 4B FF FF 18
+
+. 0 FE0BD48 16
+. FC 40 10 50 FC 20 F8 50 7F 83 E3 78 48 01 94 99
+
+. 0 FE0BD68 16
+. FF 9E 00 00 C8 9D 00 00 FD AD 01 32 40 9D 00 B0
+
+. 0 FE0BE24 8
+. 81 3E 0E B4 4B FF FF 54
+
+. 0 FE0BD7C 24
+. C9 09 00 00 FC 1E 6A 3A C9 A1 00 10 FC AD 00 2A FC 8D 28 00 40 86 00 7C
+
+. 0 FE0BDA4 44
+. 83 81 00 54 FC 20 68 50 83 A1 00 34 7F 88 03 A6 83 C1 00 38 83 81 00 30 83 E1 00 3C CB C1 00 40 CB E1 00 48 38 21 00 50 4E 80 00 20
+
+. 0 FE0E9B0 4
+. 4B FF F7 DC
+
+. 0 FE0D34C 12
+. C8 7D 00 00 FF 9E 18 00 40 9C 00 10
+
+. 0 FE0D364 180
+. 81 5E 0E 80 80 FE 0F 6C C9 4A 00 00 80 DE 0F 70 FD 8A F0 2A 80 9E 0F 78 80 7E 0F 74 C8 27 00 00 FC CC 50 28 C9 66 00 00 CB A4 00 00 C8 03 00 00 FD BE 30 28 80 BE 0F 7C D9 81 00 30 C8 A5 00 00 FF 6D 10 2A 81 61 00 30 81 81 00 34 81 1E 0E 7C 55 99 28 34 D8 41 00 28 FD 3B 06 F2 7F 59 42 14 CB 5A 00 08 FF 89 58 7A C8 3A 00 18 FD 09 07 7A CB BA 00 10 FC FB 02 72 FD 9C 2A 7A 7F 99 44 AE FD 67 DA 3A FD 4C 02 72 FC CB 06 B2 FD 1D 02 B2 FC 01 30 28 FC BC 02 F2 FD A0 40 28 FF 6D 28 28 FD BD D8 2A FC FD 68 28 FD 5B 38 2A FC 8A 18 00 40 85 04 00
+
+. 0 FE0D814 16
+. 83 9E 0F 80 C9 3C 00 00 FC 0A 22 78 4B FF FC 04
+
+. 0 FE0D424 20
+. FC 8D 00 2A 57 E0 F8 7F FC 20 68 90 FF 04 68 00 41 9A 03 90
+
+. 0 FE0D7C4 4
+. 41 A2 F2 94
+
+. 0 10006274 12
+. 7F 87 40 40 7C AA 2B 78 40 9C 00 40
+
+. 0 10006280 52
+. 7C 1F 41 D6 7D 66 1A 14 7D 86 1C AE C9 6B 00 08 54 00 20 36 7D A3 04 AE 7D 20 1A 14 7D A6 1D AE C8 09 00 08 D8 0B 00 08 7D 83 05 AE D9 69 00 08 48 00 00 0C
+
+. 0 100062B4 16
+. 7D 0A 40 50 55 4A F8 7E 7F 8A 40 40 40 9D FF F4
+
+. 0 10008FD8 44
+. 93 61 00 14 93 41 00 10 C8 15 00 00 CB E1 00 10 CB B7 00 00 FF FF 00 28 CB D6 00 00 FF FF F8 2A FF FB F8 24 FC 20 F8 90 48 01 FF 95
+
+. 0 FE0CAC0 8
+. 2F 89 00 00 40 9D 0C 9C
+
+. 0 FE0D760 16
+. 80 DE 0E 80 CB 46 00 00 FC 1A 08 28 4B FF F3 68
+
+. 0 FE0CAD4 16
+. D8 01 00 30 80 E1 00 30 81 01 00 34 40 9D 02 E8
+
+. 0 FE0CDC8 28
+. 90 E1 00 30 91 01 00 34 CB C6 00 00 C8 41 00 30 FF A2 F0 28 FD 5D F8 2A 4B FF FD 14
+
+. 0 FE0CAF4 88
+. FC 0A 02 B2 81 5E 0F 6C 80 FE 0F 70 55 04 28 34 CB 6A 00 00 CB 47 00 00 81 3E 0F 74 FC 8A 00 32 81 7E 0F 78 FD 60 D6 FA 80 BE 0F 7C C8 69 00 00 CB CB 00 00 CB A5 00 00 FC 20 1F BA 81 5E 0E 7C FD AB E8 3A 7D 24 54 AE 7D 24 52 14 FD 64 50 7A FC 0D 00 32 41 9D 00 08
+
+. 0 FE0CB4C 12
+. FD 20 48 50 C9 49 00 08 41 9D 00 08
+
+. 0 FE0CB58 64
+. FD 40 50 50 C9 A9 00 18 FC 29 00 32 CB 89 00 10 FC 8B 53 7A 81 1E 0F 80 C8 E8 00 00 FC 44 08 28 FD 9C 12 FA FC C9 60 2A FD 49 30 28 FC 20 30 90 FD 0C 50 2A FC A8 31 FA FC 05 30 00 41 A2 FE C4
+
+. 0 10009098 48
+. FC 1C 07 B2 39 00 00 00 7F 88 E0 40 FD 7C F7 7A FD A8 07 B2 FD 88 07 72 FC 1D 00 28 FD 2B 68 28 FD 40 60 28 FF C0 48 90 FF A0 50 90 40 9C 00 78
+
+. 0 100090C8 116
+. 7D 28 3A 14 7D 08 32 14 7C 09 DA 14 7D 3D 49 D6 7F 88 E0 40 7C 1D 01 D6 55 29 20 36 7D A9 FC AE 7D 69 FA 14 54 00 20 36 7D 40 FA 14 7C 1F 04 AE C9 6A 00 08 FD 89 02 F2 FD 8A 60 38 FC 09 00 32 FD AD 60 28 FD 6A 02 FA 7D BF 05 AE C8 0B 00 08 FC 00 58 28 D8 0A 00 08 7D A9 FC AE FD AD 60 2A 7D A9 FD AE C8 0B 00 08 FC 00 58 2A D8 0B 00 08 41 9C FF 90
+
+. 0 1000913C 12
+. 38 E7 00 01 7F 87 D8 40 41 9C FF 54
+
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 4, stride = 1
+. 0 FE0CAC8 28
+. 80 DE 0E 80 C9 46 00 00 FC 0A 08 2A D8 01 00 30 80 E1 00 30 81 01 00 34 40 9D 02 E8
+
+. 0 FE0CAE4 104
+. CB 86 00 00 C9 21 00 30 FF 69 E0 28 FD 5F D8 28 FC 0A 02 B2 81 5E 0F 6C 80 FE 0F 70 55 04 28 34 CB 6A 00 00 CB 47 00 00 81 3E 0F 74 FC 8A 00 32 81 7E 0F 78 FD 60 D6 FA 80 BE 0F 7C C8 69 00 00 CB CB 00 00 CB A5 00 00 FC 20 1F BA 81 5E 0E 7C FD AB E8 3A 7D 24 54 AE 7D 24 52 14 FD 64 50 7A FC 0D 00 32 41 9D 00 08
+
+. 0 FE0CB50 8
+. C9 49 00 08 41 9D 00 08
+
+. 0 FE0CB5C 60
+. C9 A9 00 18 FC 29 00 32 CB 89 00 10 FC 8B 53 7A 81 1E 0F 80 C8 E8 00 00 FC 44 08 28 FD 9C 12 FA FC C9 60 2A FD 49 30 28 FC 20 30 90 FD 0C 50 2A FC A8 31 FA FC 05 30 00 41 A2 FE C4
+
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 4, stride = 1
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 4, stride = 1
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 4, stride = 1
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 4, stride = 1
+. 0 FE0E368 60
+. 81 9E 0E 78 80 7E 0E 74 C8 8C 00 00 83 FE 0F EC FC 04 08 28 C8 23 00 00 C9 BF 00 00 FC C1 00 2A FD 46 01 B2 D8 C1 00 20 FD 60 30 28 FF 8A 68 00 FC 4B 08 2A D8 41 00 28 41 BC FE 70
+
+. 0 FE0BC68 8
+. 81 3E 0E 9C 4B FF FF 8C
+
+. 0 FE0BBF8 24
+. C9 A9 00 00 FD 7E 03 72 FD 8C 58 28 FC 81 60 2A FF 04 08 00 41 BA FF AC
+
+. 0 FE0BDD0 8
+. 81 3E 0E A8 4B FF FE C4
+
+. 0 FE0BC98 28
+. C9 29 00 00 FC 1E 02 72 FC 0D 00 28 C9 A1 00 10 FD 8D 00 2A FF 8D 60 00 41 9E 00 E4
+
+. 0 FE0BDF8 20
+. 81 3E 0E B0 C8 29 00 00 FD 7E 00 72 FC 0D 58 28 4B FF FF 7C
+
+. 0 FE0E34C 8
+. 2C 9F 00 03 41 86 05 AC
+
+. 0 FE0E910 20
+. 81 1E 0F EC D8 81 00 28 CB C8 00 00 FF 0A F0 00 40 98 00 A4
+
+. 0 FE0BBA0 24
+. 81 3E 0E 9C C8 E9 00 00 FD 9E 61 FA FC 81 60 2A FF 04 08 00 40 9A 00 5C
+
+. 0 FE0BD78 28
+. 81 3E 0E B0 C9 09 00 00 FC 1E 6A 3A C9 A1 00 10 FC AD 00 2A FC 8D 28 00 40 86 00 7C
+
+. 0 FE0D344 8
+. 2C 1F 00 03 40 82 FF E8
+
+. 0 FE0D358 192
+. FF C0 F0 50 FC 40 10 50 DB C1 00 20 81 5E 0E 80 80 FE 0F 6C C9 4A 00 00 80 DE 0F 70 FD 8A F0 2A 80 9E 0F 78 80 7E 0F 74 C8 27 00 00 FC CC 50 28 C9 66 00 00 CB A4 00 00 C8 03 00 00 FD BE 30 28 80 BE 0F 7C D9 81 00 30 C8 A5 00 00 FF 6D 10 2A 81 61 00 30 81 81 00 34 81 1E 0E 7C 55 99 28 34 D8 41 00 28 FD 3B 06 F2 7F 59 42 14 CB 5A 00 08 FF 89 58 7A C8 3A 00 18 FD 09 07 7A CB BA 00 10 FC FB 02 72 FD 9C 2A 7A 7F 99 44 AE FD 67 DA 3A FD 4C 02 72 FC CB 06 B2 FD 1D 02 B2 FC 01 30 28 FC BC 02 F2 FD A0 40 28 FF 6D 28 28 FD BD D8 2A FC FD 68 28 FD 5B 38 2A FC 8A 18 00 40 85 04 00
+
+. 0 FE0D7C8 8
+. FC 20 08 50 4B FF F5 F4
+
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 4, stride = 1
+. 0 10001EE4 16
+. 38 E7 00 01 7D 20 38 30 7F 80 F0 40 41 9C FF F4
+
+. 0 10001F1C 20
+. 55 20 07 FE 55 6B 08 3C 7D 6B 03 78 55 29 F8 7E 42 00 FF F0
+
+. 0 10001F6C 12
+. 7F 8A 58 40 7C A9 2B 78 40 9C 00 28
+
+. 0 10001F78 28
+. 7C 1B 59 D6 7D A8 FC AE 54 00 18 38 7C 1F 04 AE 7C 08 FD AE 7D BF 05 AE 48 00 00 0C
+
+. 0 10001F94 16
+. 7D 69 58 50 55 29 F8 7E 7F 89 58 40 40 9D FF F4
+
+PASS: fft_real_bitreverse_order, n = 4
+. 0 10006308 12
+. 7F 8A 58 40 7C A9 2B 78 40 9C 00 28
+
+. 0 10006314 28
+. 7C 04 59 D6 7D A8 1C AE 54 00 18 38 7C 03 04 AE 7C 08 1D AE 7D A3 05 AE 48 00 00 0C
+
+. 0 10006330 16
+. 7D 69 58 50 55 29 F8 7E 7F 89 58 40 40 9D FF F4
+
+. 0 1001266C 52
+. 7C 0B DA 14 7D 2B E9 D6 7D 6B E2 14 7C 00 E9 D6 55 29 18 38 7C 09 FC AE 54 00 18 38 7D 9F 04 AE FD A0 60 28 FC 00 60 2A 7C 09 FD AE 7D BF 05 AE 42 00 FF D0
+
+. 0 10012654 16
+. 57 5A F8 7F 7F 9B E3 78 57 9C 08 3C 41 82 00 40
+
+. 0 100127D0 8
+. 2F 9A 00 00 41 9E 00 28
+
+. 0 100127D8 36
+. 7F 49 03 A6 7D 25 E0 50 7C 09 E9 D6 7D 29 E2 14 54 00 18 38 7C 1F 04 AE FC 00 00 50 7C 1F 05 AE 42 00 FF E8
+
+. 0 1000E634 80
+. 7D 88 63 78 7D 67 61 D6 38 A5 00 01 7C E5 30 50 7F 87 28 40 55 09 18 38 55 60 18 38 7C 09 1C AE 7D A3 04 AE 55 6B 20 36 55 00 20 36 7D 4B 22 14 FD 80 68 50 7D 20 22 14 7C 04 05 AE 7D 08 62 14 D9 A9 00 08 7C 0B 25 AE D9 8A 00 08 41 9D FF B8
+
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 4, stride = 1
+. 0 1000E2C4 8
+. 2F 9A 00 00 41 9E 00 4C
+
+. 0 1000E2CC 72
+. 7D 7B 2A 14 FD A0 D8 90 39 40 00 00 7F 49 03 A6 7C 0A 2A 14 7D 2B E9 D6 7D 4A E2 14 7D 6B E2 14 7C 00 E9 D6 55 29 18 38 54 00 18 38 7C 1F 04 AE FC 00 00 2A 7C 1F 05 AE 7C 09 FC AE FC 00 03 72 7C 09 FD AE 42 00 FF CC
+
+. 0 1000E160 8
+. 2F 9A 00 00 41 9E 00 40
+
+. 0 1000E170 52
+. 7C 0B DA 14 7D 2B E9 D6 7D 6B E2 14 7C 00 E9 D6 55 29 18 38 7C 09 FC AE 54 00 18 38 7D 9F 04 AE FD A0 60 28 FC 00 60 2A 7C 09 FD AE 7D BF 05 AE 42 00 FF D0
+
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 4, stride = 1
+PASS: fft_complex_bitreverse_order, n = 4
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 4, stride = 2
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 4, stride = 2
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 4, stride = 2
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 4, stride = 2
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 4, stride = 2
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 4, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 4, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 4, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 4, stride = 2
+PASS: fft_real_bitreverse_order, n = 4
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 4, stride = 2
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 4, stride = 2
+PASS: fft_complex_bitreverse_order, n = 4
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 4, stride = 3
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 4, stride = 3
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 4, stride = 3
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 4, stride = 3
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 4, stride = 3
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 4, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 4, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 4, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 4, stride = 3
+PASS: fft_real_bitreverse_order, n = 4
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 4, stride = 3
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 4, stride = 3
+PASS: fft_complex_bitreverse_order, n = 8
+. 0 FE0DFB0 20
+. 80 FE 0F C4 FC 00 08 90 CB A7 00 00 FF 01 E8 00 41 99 00 08
+
+. 0 FE0DFC4 192
+. FC 00 08 50 81 3E 0E 80 80 9E 0F C8 C8 C9 00 00 80 7E 0F CC FC 66 00 2A 83 FE 0F D0 83 BE 0F D4 C8 83 00 00 FC 43 30 28 D8 61 00 30 C8 64 00 00 CB DF 00 00 FD 80 10 28 C8 5D 00 00 81 9E 0F D8 80 E1 00 30 81 01 00 34 FD 4C 03 32 C8 AC 00 00 80 DE 0E 7C 55 0A 28 34 81 1E 0F DC 7D 6A 32 14 FC 2A 20 FA C9 6B 00 08 C9 2B 00 18 FD 0C 02 B2 FC EA 17 BA FD A1 2A BA C8 2B 00 10 FD 08 61 FA FC 0D 02 B2 7D 4A 34 AE FD 68 02 F2 FD A1 00 32 FC E9 58 28 FD 8A 02 32 FC 07 68 28 C9 A8 00 00 FD 40 60 28 FD 61 50 2A FD 21 58 28 FC 20 58 90 FD 0A 48 2A FC E8 5B 7A FC 87 58 00 41 86 01 0C
+
+. 0 FE0E3A4 24
+. C8 A6 00 00 38 A0 00 01 FC 00 30 90 FC 86 28 00 FC A0 10 90 41 85 00 10
+
+. 0 FE0E3BC 188
+. FC 00 30 50 38 A0 00 00 FC A0 10 50 81 1E 0E 80 81 7E 0F C8 CB A8 00 00 81 5E 0F CC FC 7D 00 2A C9 AB 00 00 C8 8A 00 00 80 9E 0F D8 FD 83 E8 28 D8 61 00 30 80 E1 00 30 81 01 00 34 81 3E 0F D4 FD 80 60 28 80 FE 0F D0 CB C4 00 00 55 00 28 34 C9 07 00 00 FD 4C 03 32 C8 E9 00 00 80 7E 0E 7C 7F E0 1A 14 FD 2A 23 7A FC 2A 3A 3A C8 FF 00 08 FD 69 F2 BA 7D 23 04 AE CB DF 00 18 FC 6C 02 B2 FF AB 02 B2 FC 03 28 7A C8 3F 00 10 FC 8C E9 7A CB A6 00 00 FD 40 60 2A FD A9 01 32 FD 0A 3F BA FD 68 68 28 FC 81 5A BA FC 29 20 2A FC 69 08 28 FD 44 18 2A FF 8A E8 00 40 9D 02 08
+
+. 0 FE0E67C 24
+. 83 FE 0F F8 83 BE 0F F0 C9 3F 00 00 C9 7D 00 00 FD 4A 5A 78 4B FF FD FC
+
+. 0 FE0E48C 12
+. FF C1 50 2A FF 1E 08 00 40 9A 05 20
+
+. 0 FE0E498 8
+. 2F 85 00 00 40 BE FC F0
+
+. 0 FE0E4A0 8
+. FC 20 08 50 4B FF FC E8
+
+. 0 FE0CCEC 200
+. 81 5E 0E 80 83 BE 0E 74 C9 4A 00 00 C9 7D 00 00 FC 2A 60 28 FC 60 58 50 FC 01 50 28 D8 21 00 30 81 61 00 30 81 81 00 34 FD 20 60 2A FD 43 48 28 FD 0A 02 B2 80 DE 0F 6C 80 BE 0F 70 55 80 28 34 80 9E 0F 78 80 7E 0F 74 C8 46 00 00 FD 2A 02 32 C8 E5 00 00 CB 64 00 00 CB 83 00 00 FF 48 38 BA 80 FE 0F 7C FF A8 E6 FA 81 1E 0E 7C C9 67 00 00 7D 20 42 14 7D A8 04 AE FC 3A 5A 3A C8 49 00 10 C8 89 00 18 FC C9 57 7A C9 49 00 08 81 9E 0F 90 FC 01 02 32 CB 4C 00 00 FC 66 02 B2 FD 82 00 32 FC A4 18 28 FF CD 01 B2 FC E5 60 28 FF 67 F0 28 FD 82 D8 2A FF 82 60 28 FF BB E0 2A FD 1D 66 BA FC 08 60 00 40 82 08 10
+
+. 0 FE0E9C4 24
+. C8 26 00 00 38 A0 00 01 FC 00 10 90 FC 82 08 00 FC C0 20 90 41 85 00 10
+
+. 0 FE0E9DC 188
+. FC 00 10 50 38 A0 00 00 FC C0 20 50 80 7E 0E 80 83 FE 0F C8 CB A3 00 00 83 BE 0F CC FD 3D 00 2A C9 1F 00 00 C8 FD 00 00 81 7E 0F D8 FD 89 E8 28 D9 21 00 30 80 E1 00 30 81 01 00 34 81 9E 0F D0 FD 80 60 28 55 00 28 34 81 1E 0F D4 C8 0B 00 00 FF CC 03 32 C8 2C 00 00 C9 48 00 00 81 5E 0E 7C FC BE 3A 3A 7C E0 52 14 FD 7E 50 7A C8 27 00 18 C9 47 00 08 FD A5 07 BA 7C AA 04 AE FD 2C 07 B2 FF AD 07 B2 FC E9 32 FA C9 27 00 10 FD 0C E9 BA CB A6 00 00 FC 07 60 2A FC C5 02 32 FF C0 50 7A FD 7E 30 28 FD A9 58 3A FC 25 68 2A FD 85 08 28 FD 4D 60 2A FF 0A E8 00 40 99 02 E8
+
+. 0 FE0ED7C 16
+. 80 9E 0F F8 C9 64 00 00 FC 0A 1A F8 4B FF FD 1C
+
+. 0 FE0EAA4 12
+. FC 61 00 2A FF 83 08 00 41 9E F9 EC
+
+. 0 FE0E6D8 8
+. 2F 9F 00 00 40 BE FC 78
+
+. 0 FE0E7AC 24
+. 81 7E 10 04 C8 2B 00 00 FC 0A 18 7A FC 6D 00 2A FF 03 68 00 40 9A 03 04
+
+. 0 FE0CE84 8
+. 2F 9F 00 00 40 9E 04 A8
+
+. 0 FE0CEA0 20
+. 80 DE 0F 98 D8 41 00 28 C8 C6 00 00 FC 8A 30 00 40 84 0A B8
+
+. 0 FE0D968 24
+. CB 5D 00 00 3B E0 00 01 FD A0 F0 90 FC 1E D0 00 FC C0 10 90 41 81 00 10
+
+. 0 FE0D98C 180
+. 81 7E 0E 80 80 BE 0F 6C C8 2B 00 00 80 9E 0F 70 FF 41 68 2A C8 E5 00 00 C9 24 00 00 80 7E 0F 7C DB 41 00 30 C9 61 00 30 80 FE 0F 78 FD 8B 08 28 80 DE 0F 74 C8 A3 00 00 C8 67 00 00 FF 4D 60 28 C9 A6 00 00 81 21 00 30 81 41 00 34 81 1E 0E 7C FD 5A 06 B2 55 5C 28 34 7F 7C 42 14 C9 7B 00 18 FF 6A 49 FA C8 FB 00 08 FD 0A 68 FA FF 9B 2A BA 7F 7C 44 AE FF BA 02 B2 FC 1C 02 B2 FC 3D 32 3A CB BB 00 10 C9 1D 00 00 FD 3A 01 BA FD A1 D0 2A FC 7B 02 72 FC AD 3A FA FF 85 18 28 FD 9D E3 7A FD BB 60 2A FC 1B 68 28 FD 4C 00 2A FE 0A 40 00 40 91 02 D8
+
+. 0 FE0DD14 16
+. 81 9E 0F B4 C8 0C 00 00 FC 0A 20 38 4B FF FD 2C
+
+. 0 FE0DA4C 12
+. FC 8D 00 2A FF 84 68 00 40 9E 00 58
+
+. 0 FE0DA58 12
+. 2F 9F 00 00 FC 20 68 90 40 BE EF F8
+
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 8, stride = 1
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 8, stride = 1
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 8, stride = 1
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 8, stride = 1
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 8, stride = 1
+. 0 FE0DFC8 188
+. 81 3E 0E 80 80 9E 0F C8 C8 C9 00 00 80 7E 0F CC FC 66 00 2A 83 FE 0F D0 83 BE 0F D4 C8 83 00 00 FC 43 30 28 D8 61 00 30 C8 64 00 00 CB DF 00 00 FD 80 10 28 C8 5D 00 00 81 9E 0F D8 80 E1 00 30 81 01 00 34 FD 4C 03 32 C8 AC 00 00 80 DE 0E 7C 55 0A 28 34 81 1E 0F DC 7D 6A 32 14 FC 2A 20 FA C9 6B 00 08 C9 2B 00 18 FD 0C 02 B2 FC EA 17 BA FD A1 2A BA C8 2B 00 10 FD 08 61 FA FC 0D 02 B2 7D 4A 34 AE FD 68 02 F2 FD A1 00 32 FC E9 58 28 FD 8A 02 32 FC 07 68 28 C9 A8 00 00 FD 40 60 28 FD 61 50 2A FD 21 58 28 FC 20 58 90 FD 0A 48 2A FC E8 5B 7A FC 87 58 00 41 86 01 0C
+
+. 0 FE0D980 192
+. FD A0 F0 50 3B E0 00 00 FC C0 10 50 81 7E 0E 80 80 BE 0F 6C C8 2B 00 00 80 9E 0F 70 FF 41 68 2A C8 E5 00 00 C9 24 00 00 80 7E 0F 7C DB 41 00 30 C9 61 00 30 80 FE 0F 78 FD 8B 08 28 80 DE 0F 74 C8 A3 00 00 C8 67 00 00 FF 4D 60 28 C9 A6 00 00 81 21 00 30 81 41 00 34 81 1E 0E 7C FD 5A 06 B2 55 5C 28 34 7F 7C 42 14 C9 7B 00 18 FF 6A 49 FA C8 FB 00 08 FD 0A 68 FA FF 9B 2A BA 7F 7C 44 AE FF BA 02 B2 FC 1C 02 B2 FC 3D 32 3A CB BB 00 10 C9 1D 00 00 FD 3A 01 BA FD A1 D0 2A FC 7B 02 72 FC AD 3A FA FF 85 18 28 FD 9D E3 7A FD BB 60 2A FC 1B 68 28 FD 4C 00 2A FE 0A 40 00 40 91 02 D8
+
+. 0 FE0DA64 8
+. FC 20 08 50 4B FF F3 58
+
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 8, stride = 1
+PASS: fft_real_bitreverse_order, n = 8
+. 0 100127E0 28
+. 7C 09 E9 D6 7D 29 E2 14 54 00 18 38 7C 1F 04 AE FC 00 00 50 7C 1F 05 AE 42 00 FF E8
+
+. 0 100126F4 44
+. FC 1C 07 B2 2F 9A 00 00 FD 7C F7 7A FD A4 07 B2 FD 84 07 72 FC 1D 00 28 FC AB 68 28 FC C0 60 28 FF C0 28 90 FF A0 30 90 41 9E 00 A0
+
+. 0 10012720 156
+. 7F 49 03 A6 7D 06 E0 50 38 E0 00 00 7D 48 E9 D6 7C 07 DA 14 7D 60 32 14 7C 06 00 50 7D 27 32 14 7D 6B E9 D6 55 4A 18 38 7D 4A FC AE 7C E7 E2 14 7D 08 E2 14 FD 66 02 B2 7C 00 E9 D6 55 6B 18 38 7C 0B FC AE FD 45 02 B2 FC E5 00 32 7D 29 E9 D6 54 00 18 38 7D 1F 04 AE FC 06 00 32 FD A8 58 28 55 29 18 38 FD 6B 40 2A 7D 29 FC AE FD AD 38 28 FD 89 00 28 FC 00 48 2A FD 6B 38 2A FD 8C 50 2A FC 00 50 28 FD A0 68 50 7C 09 FD AE 7D 6A FD AE 7D 9F 05 AE 7D AB FD AE 42 00 FF 74
+
+. 0 100127BC 12
+. 38 C6 00 01 7F 85 30 40 41 9D FF 30
+
+. 0 1000E638 76
+. 7D 67 61 D6 38 A5 00 01 7C E5 30 50 7F 87 28 40 55 09 18 38 55 60 18 38 7C 09 1C AE 7D A3 04 AE 55 6B 20 36 55 00 20 36 7D 4B 22 14 FD 80 68 50 7D 20 22 14 7C 04 05 AE 7D 08 62 14 D9 A9 00 08 7C 0B 25 AE D9 8A 00 08 41 9D FF B8
+
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 8, stride = 1
+. 0 1000E1F8 44
+. FC 1C 07 B2 2F 9A 00 00 FD 7C F7 7A FD A5 07 B2 FD 85 07 72 FC 1D 00 28 FC CB 68 28 FC E0 60 28 FF C0 30 90 FF A0 38 90 41 9E 00 90
+
+. 0 1000E224 140
+. 7F 49 03 A6 7D 06 E0 50 38 E0 00 00 7C 07 DA 14 7D 27 32 14 7D 40 32 14 7C 06 00 50 7D 4A E9 D6 7C E7 E2 14 7D 68 E9 D6 55 4A 18 38 7D 0A FC AE 7D 08 E2 14 FD 00 40 50 7D 29 E9 D6 55 6B 18 38 7C 0B FC AE FD 80 40 28 7C 00 E9 D6 55 29 18 38 7D 69 FC AE FC 00 40 2A 54 00 18 38 7D 3F 04 AE FD AB 48 28 FD 6B 48 2A FD 26 03 32 FD 46 03 72 7D 69 FD AE 7C 1F 05 AE FD A7 4B 78 FD 87 53 3A 7D AA FD AE 7D 8B FD AE 42 00 FF 84
+
+. 0 1000E2B0 12
+. 38 C6 00 01 7F 85 30 40 41 9D FF 40
+
+. 0 1000E2DC 56
+. 7C 0A 2A 14 7D 2B E9 D6 7D 4A E2 14 7D 6B E2 14 7C 00 E9 D6 55 29 18 38 54 00 18 38 7C 1F 04 AE FC 00 00 2A 7C 1F 05 AE 7C 09 FC AE FC 00 03 72 7C 09 FD AE 42 00 FF CC
+
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 8, stride = 1
+PASS: fft_complex_bitreverse_order, n = 8
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 8, stride = 2
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 8, stride = 2
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 8, stride = 2
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 8, stride = 2
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 8, stride = 2
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 8, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 8, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 8, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 8, stride = 2
+PASS: fft_real_bitreverse_order, n = 8
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 8, stride = 2
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 8, stride = 2
+PASS: fft_complex_bitreverse_order, n = 8
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 8, stride = 3
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 8, stride = 3
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 8, stride = 3
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 8, stride = 3
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 8, stride = 3
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 8, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 8, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 8, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 8, stride = 3
+PASS: fft_real_bitreverse_order, n = 8
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 8, stride = 3
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 8, stride = 3
+. 0 FEC184C 36
+. 7C C3 50 16 54 C0 E8 FE 1C A0 00 0A 2C 00 00 00 7D 25 18 50 7C 03 03 78 7D 69 40 AE 9D 64 FF FF 40 82 FF E0
+
+PASS: fft_complex_bitreverse_order, n = 16
+. 0 FE0E3C8 176
+. 81 1E 0E 80 81 7E 0F C8 CB A8 00 00 81 5E 0F CC FC 7D 00 2A C9 AB 00 00 C8 8A 00 00 80 9E 0F D8 FD 83 E8 28 D8 61 00 30 80 E1 00 30 81 01 00 34 81 3E 0F D4 FD 80 60 28 80 FE 0F D0 CB C4 00 00 55 00 28 34 C9 07 00 00 FD 4C 03 32 C8 E9 00 00 80 7E 0E 7C 7F E0 1A 14 FD 2A 23 7A FC 2A 3A 3A C8 FF 00 08 FD 69 F2 BA 7D 23 04 AE CB DF 00 18 FC 6C 02 B2 FF AB 02 B2 FC 03 28 7A C8 3F 00 10 FC 8C E9 7A CB A6 00 00 FD 40 60 2A FD A9 01 32 FD 0A 3F BA FD 68 68 28 FC 81 5A BA FC 29 20 2A FC 69 08 28 FD 44 18 2A FF 8A E8 00 40 9D 02 08
+
+. 0 FE0EA98 24
+. 80 DE 0F F8 C8 C6 00 00 FC 0A 19 BA FC 61 00 2A FF 83 08 00 41 9E F9 EC
+
+. 0 FE0D418 32
+. 83 7E 0F 80 C8 7B 00 00 FC 0A 20 FA FC 8D 00 2A 57 E0 F8 7F FC 20 68 90 FF 04 68 00 41 9A 03 90
+
+. 0 FE0E9E8 176
+. 80 7E 0E 80 83 FE 0F C8 CB A3 00 00 83 BE 0F CC FD 3D 00 2A C9 1F 00 00 C8 FD 00 00 81 7E 0F D8 FD 89 E8 28 D9 21 00 30 80 E1 00 30 81 01 00 34 81 9E 0F D0 FD 80 60 28 55 00 28 34 81 1E 0F D4 C8 0B 00 00 FF CC 03 32 C8 2C 00 00 C9 48 00 00 81 5E 0E 7C FC BE 3A 3A 7C E0 52 14 FD 7E 50 7A C8 27 00 18 C9 47 00 08 FD A5 07 BA 7C AA 04 AE FD 2C 07 B2 FF AD 07 B2 FC E9 32 FA C9 27 00 10 FD 0C E9 BA CB A6 00 00 FC 07 60 2A FC C5 02 32 FF C0 50 7A FD 7E 30 28 FD A9 58 3A FC 25 68 2A FD 85 08 28 FD 4D 60 2A FF 0A E8 00 40 99 02 E8
+
+. 0 FE0DA40 24
+. 83 1E 0F B4 C8 D8 00 00 FC 0A 21 BA FC 8D 00 2A FF 84 68 00 40 9E 00 58
+
+. 0 FE0C910 108
+. FC E1 00 72 83 1E 0E 70 81 5E 0E 6C CB 98 00 00 CB AA 00 00 81 1E 0E 68 FD 47 00 72 80 FE 0E 64 FF 5C E9 FA CB 68 00 00 C9 27 00 00 81 7E 0E 60 81 3E 0F 54 FC DA D9 FA C8 AB 00 00 C9 A9 00 00 FD 06 49 FA FC C8 01 F2 FC 26 28 2A FD 81 02 B2 FD 7F 60 2A FC 9F 58 28 FC 20 58 90 FC 64 60 2A FC 43 5B 7A FC 82 58 00 41 86 00 E0
+
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 16, stride = 1
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 16, stride = 1
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 16, stride = 1
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 16, stride = 1
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 16, stride = 1
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 16, stride = 1
+PASS: fft_real_bitreverse_order, n = 16
+. 0 1001272C 144
+. 7D 48 E9 D6 7C 07 DA 14 7D 60 32 14 7C 06 00 50 7D 27 32 14 7D 6B E9 D6 55 4A 18 38 7D 4A FC AE 7C E7 E2 14 7D 08 E2 14 FD 66 02 B2 7C 00 E9 D6 55 6B 18 38 7C 0B FC AE FD 45 02 B2 FC E5 00 32 7D 29 E9 D6 54 00 18 38 7D 1F 04 AE FC 06 00 32 FD A8 58 28 55 29 18 38 FD 6B 40 2A 7D 29 FC AE FD AD 38 28 FD 89 00 28 FC 00 48 2A FD 6B 38 2A FD 8C 50 2A FC 00 50 28 FD A0 68 50 7C 09 FD AE 7D 6A FD AE 7D 9F 05 AE 7D AB FD AE 42 00 FF 74
+
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 16, stride = 1
+. 0 1000E230 128
+. 7C 07 DA 14 7D 27 32 14 7D 40 32 14 7C 06 00 50 7D 4A E9 D6 7C E7 E2 14 7D 68 E9 D6 55 4A 18 38 7D 0A FC AE 7D 08 E2 14 FD 00 40 50 7D 29 E9 D6 55 6B 18 38 7C 0B FC AE FD 80 40 28 7C 00 E9 D6 55 29 18 38 7D 69 FC AE FC 00 40 2A 54 00 18 38 7D 3F 04 AE FD AB 48 28 FD 6B 48 2A FD 26 03 32 FD 46 03 72 7D 69 FD AE 7C 1F 05 AE FD A7 4B 78 FD 87 53 3A 7D AA FD AE 7D 8B FD AE 42 00 FF 84
+
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 16, stride = 1
+. 0 FEEF788 16
+. 57 3A D1 BE 2B 1A 00 20 3B 1A 00 38 41 99 01 8C
+
+. 0 FEEF798 8
+. 71 40 00 01 41 82 01 CC
+
+. 0 FEEF97C 24
+. 57 15 18 38 7F F5 E2 14 39 3F 00 30 83 A9 00 0C 7F 9D 48 00 41 9E 00 14
+
+PASS: fft_complex_bitreverse_order, n = 16
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 16, stride = 2
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 16, stride = 2
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 16, stride = 2
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 16, stride = 2
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 16, stride = 2
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 16, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 16, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 16, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 16, stride = 2
+PASS: fft_real_bitreverse_order, n = 16
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 16, stride = 2
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 16, stride = 2
+PASS: fft_complex_bitreverse_order, n = 16
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 16, stride = 3
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 16, stride = 3
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 16, stride = 3
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 16, stride = 3
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 16, stride = 3
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 16, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 16, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 16, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 16, stride = 3
+PASS: fft_real_bitreverse_order, n = 16
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 16, stride = 3
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 16, stride = 3
+PASS: fft_complex_bitreverse_order, n = 32
+. 0 FE0E478 32
+. 81 9E 0F F8 80 DE 0F F0 C8 0C 00 00 C8 A6 00 00 FD 4A 28 3A FF C1 50 2A FF 1E 08 00 40 9A 05 20
+
+. 0 FE0DAAC 20
+. CB BD 00 00 FF 80 10 90 FC A0 F0 90 FF 9E E8 00 41 9D 00 08
+
+. 0 FE0DAC0 36
+. FC A0 F0 50 C9 4B 00 00 FC 6A 28 2A FD 03 50 28 D8 61 00 30 81 21 00 30 81 41 00 34 FC 25 40 28 41 9D 00 08
+
+. 0 FE0DAE4 192
+. FF 80 10 50 FC A1 00 72 C8 06 00 00 C8 87 00 00 55 40 28 34 83 FE 0F 84 7C C0 42 14 C8 66 00 10 FF 65 01 3A C9 5F 00 00 C9 06 00 18 FC 41 01 72 C8 E6 00 08 C9 85 00 00 FD A3 50 2A CB 44 00 00 FD 21 50 2A C8 03 00 00 FC C2 06 F2 FC 4D 50 28 FF 65 D3 3A FD 66 3A 3A FC 83 10 28 FD 29 50 28 FC E3 59 BA 7C C8 04 AE FF 44 40 2A FD 61 48 28 FD 9B 01 7A FD 1A 38 7A FD 46 00 72 FD 22 02 72 FC 6B E0 2A FF 6C 01 72 FC 02 40 FA FC 8A 07 32 FC E9 30 2A FF 46 06 F2 FD 60 20 28 FC 26 38 28 FD AB D0 28 FD 81 48 2A FC AD 60 2A FC 27 28 2A FC 47 08 28 FC 85 10 2A FC 84 E8 00 40 85 02 14
+
+. 0 FE0DDB4 20
+. 80 7E 0F 88 FC 1F E8 00 C9 03 00 00 FC 84 02 32 40 81 00 F0
+
+. 0 FE0DEB4 8
+. 81 3E 0F B8 4B FF FF 14
+
+. 0 FE0DDCC 16
+. C9 69 00 00 FC 7F 02 F2 FC 04 18 28 4B FF FD EC
+
+. 0 FE0DBC4 12
+. FC C1 00 2A FE 06 08 00 41 B2 F5 78
+
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 32, stride = 1
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 32, stride = 1
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 32, stride = 1
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 32, stride = 1
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 32, stride = 1
+. 0 FE0DAC4 32
+. C9 4B 00 00 FC 6A 28 2A FD 03 50 28 D8 61 00 30 81 21 00 30 81 41 00 34 FC 25 40 28 41 9D 00 08
+
+. 0 FE0DAE8 188
+. FC A1 00 72 C8 06 00 00 C8 87 00 00 55 40 28 34 83 FE 0F 84 7C C0 42 14 C8 66 00 10 FF 65 01 3A C9 5F 00 00 C9 06 00 18 FC 41 01 72 C8 E6 00 08 C9 85 00 00 FD A3 50 2A CB 44 00 00 FD 21 50 2A C8 03 00 00 FC C2 06 F2 FC 4D 50 28 FF 65 D3 3A FD 66 3A 3A FC 83 10 28 FD 29 50 28 FC E3 59 BA 7C C8 04 AE FF 44 40 2A FD 61 48 28 FD 9B 01 7A FD 1A 38 7A FD 46 00 72 FD 22 02 72 FC 6B E0 2A FF 6C 01 72 FC 02 40 FA FC 8A 07 32 FC E9 30 2A FF 46 06 F2 FD 60 20 28 FC 26 38 28 FD AB D0 28 FD 81 48 2A FC AD 60 2A FC 27 28 2A FC 47 08 28 FC 85 10 2A FC 84 E8 00 40 85 02 14
+
+. 0 FE0DDC8 20
+. 81 3E 0F 9C C9 69 00 00 FC 7F 02 F2 FC 04 18 28 4B FF FD EC
+
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 32, stride = 1
+PASS: fft_real_bitreverse_order, n = 32
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 32, stride = 1
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 32, stride = 1
+PASS: fft_complex_bitreverse_order, n = 32
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 32, stride = 2
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 32, stride = 2
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 32, stride = 2
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 32, stride = 2
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 32, stride = 2
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 32, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 32, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 32, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 32, stride = 2
+PASS: fft_real_bitreverse_order, n = 32
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 32, stride = 2
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 32, stride = 2
+PASS: fft_complex_bitreverse_order, n = 32
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 32, stride = 3
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 32, stride = 3
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 32, stride = 3
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 32, stride = 3
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 32, stride = 3
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 32, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 32, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 32, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 32, stride = 3
+PASS: fft_real_bitreverse_order, n = 32
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 32, stride = 3
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 32, stride = 3
+PASS: fft_complex_bitreverse_order, n = 64
+. 0 FE0D5C0 16
+. C9 9F 00 00 FD A0 F8 90 FC 9F 60 00 41 85 00 08
+
+. 0 FE0D5D0 24
+. FD A0 F8 50 CB DC 00 00 FC FE 68 28 FF 07 60 00 4F 59 D3 82 41 9A 01 EC
+
+. 0 FE0D7D0 36
+. C8 CA 00 00 C9 5D 00 00 FD 86 38 2A FC AC 30 28 D9 81 00 30 81 41 00 30 81 61 00 34 FC 47 28 28 4B FF FE 20
+
+. 0 FE0D610 200
+. FD 22 00 B2 C8 E5 00 00 CB C6 00 00 55 6B 28 34 CB 87 00 00 7C AB 42 14 80 FE 0F 84 FF A9 3F BA C8 83 00 00 CB 47 00 00 C8 C4 00 00 FF 62 D0 2A C8 65 00 08 FD 7D E2 7A 7F AB 44 AE 80 7E 0F 88 FD 9D D0 2A FD 1B D0 28 FC 2B 02 72 C9 65 00 18 FF CC D0 28 FC 02 40 28 FD A2 0A BA C8 25 00 10 FC E0 50 2A FC BD F0 28 FF 81 03 72 FF 69 21 BA FF 42 02 72 FC 9E 02 32 FD 45 18 2A FD 9E 01 F2 FC 0B E0 28 FD 3A 06 F2 CB 43 00 00 FC 6A 00 B2 FF 81 20 28 FD A0 60 28 FC BD 02 72 FF C1 E0 28 FC CD 18 28 FC FE 20 28 FC 46 28 28 FF 62 38 2A FC 3C D8 2A FD 7C 08 28 FF BB 58 2A FD 5D 0E BA FE 0A 08 00 41 92 00 68
+
+. 0 FE0D73C 12
+. C8 1F 00 00 FF 9F 00 00 41 BD F3 14
+
+. 0 FE0D748 4
+. 4B FF FA 08
+
+. 0 FE0E9B4 12
+. FC 20 30 90 FC 60 F8 90 4B FF D4 79
+
+. 0 FE0BE34 12
+. 94 21 FF B0 7C 08 02 A6 48 06 72 75
+
+. 0 FE0BE40 56
+. 93 C1 00 30 7F C8 02 A6 93 E1 00 34 DB C1 00 40 FF C0 08 90 DB A1 00 38 FF A0 18 90 83 FE 0E B8 DB E1 00 48 FC A0 F0 90 C8 3F 00 00 90 01 00 54 FF 9E 08 00 41 9D 00 08
+
+. 0 FE0BE78 40
+. FC A0 F0 50 81 3E 0E 80 C8 69 00 00 FD A3 28 2A FC 0D 18 28 D9 A1 00 20 80 E1 00 20 81 01 00 24 FC 65 00 28 41 9D 00 08
+
+. 0 FE0BEA0 216
+. FC 40 10 50 FC A3 00 F2 81 3E 0E BC 81 9E 0E C0 55 04 28 34 CB E9 00 00 C9 AC 00 00 81 5E 0E 7C FC E3 01 72 80 FE 0E C4 FC 85 6F FA 7C C4 52 14 C9 47 00 00 CB E6 00 10 C9 86 00 08 FD 23 50 2A FD 07 01 32 C8 86 00 18 80 BE 0E C8 FD 7F 50 2A 81 7E 0E CC C8 C5 00 00 FD 29 50 28 FD A8 61 3A C8 0B 00 00 80 7E 0E D0 FD 6B 50 28 FD 85 01 BA C8 03 00 00 FC FF 58 28 FC DF 6A 3A 7D A4 54 AE FD 47 20 2A FD 03 48 28 FF EC 01 7A FC EA 30 FA FC 8D 00 F2 FD 2B 02 72 FC C8 10 2A FC 7F 01 72 FC 0B 39 BA FD 44 00 B2 FC A9 68 2A FD 8D 00 F2 FD 0D 28 28 FF E0 50 28 FC E8 48 2A FC DF 60 28 FD 66 38 2A FD A5 58 2A FC 85 68 28 FC AB 20 2A FF 85 08 00 40 9D 00 68
+
+. 0 FE0BF78 20
+. FC 1D 08 00 81 1E 0E D4 C8 28 00 00 FC A5 00 72 40 81 00 D8
+
+. 0 FE0C060 16
+. 81 3E 0E DC C8 69 00 00 FC 1D 28 FA 4B FF FF 2C
+
+. 0 FE0BF98 12
+. FC AD 00 2A FF 05 68 00 40 9A 00 6C
+
+. 0 FE0BFA4 16
+. CB BF 00 00 FC 20 68 90 FC 1E E8 00 41 81 00 08
+
+. 0 FE0BFB4 40
+. FC 20 68 50 83 E1 00 54 83 C1 00 30 7F E8 03 A6 CB A1 00 38 83 E1 00 34 CB C1 00 40 CB E1 00 48 38 21 00 50 4E 80 00 20
+
+. 0 FE0E9C0 4
+. 4B FF F7 CC
+
+. 0 FE0EAB0 16
+. FC 20 10 90 FC 60 F8 90 FC 40 20 90 4B FF D3 79
+
+. 0 FE0BFDC 20
+. 80 7E 0E D4 FC 9D 08 00 C9 03 00 00 FC A5 02 32 41 85 00 6C
+
+. 0 FE0BFF0 28
+. 81 3E 0E DC C9 49 00 00 FD 3D 02 B2 FC 05 48 28 FC AD 00 2A FF 05 68 00 41 BA FF 9C
+
+. 0 FE0EAC0 4
+. 4B FF F6 CC
+
+. 0 FE0ED6C 16
+. 81 3E 0F DC C8 E9 00 00 FC 0D 19 F8 4B FF FC 1C
+
+. 0 FE0E994 12
+. FC 61 00 2A FC 03 08 00 41 82 F7 F0
+
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 64, stride = 1
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 64, stride = 1
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 64, stride = 1
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 64, stride = 1
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 64, stride = 1
+. 0 FE0D5D4 20
+. CB DC 00 00 FC FE 68 28 FF 07 60 00 4F 59 D3 82 41 9A 01 EC
+
+. 0 FE0BF8C 24
+. 81 3E 0E D8 C8 69 00 00 FC 1D 28 FA FC AD 00 2A FF 05 68 00 40 9A 00 6C
+
+. 0 FE0C058 8
+. 81 3E 0E D8 4B FF FF 98
+
+. 0 FE0BFF4 24
+. C9 49 00 00 FD 3D 02 B2 FC 05 48 28 FC AD 00 2A FF 05 68 00 41 BA FF 9C
+
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 64, stride = 1
+PASS: fft_real_bitreverse_order, n = 64
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 64, stride = 1
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 64, stride = 1
+PASS: fft_complex_bitreverse_order, n = 64
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 64, stride = 2
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 64, stride = 2
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 64, stride = 2
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 64, stride = 2
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 64, stride = 2
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 64, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 64, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 64, stride = 2
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 64, stride = 2
+PASS: fft_real_bitreverse_order, n = 64
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 64, stride = 2
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 64, stride = 2
+. 0 FEEF920 16
+. 57 3B BA 7E 28 1B 00 14 3B 1B 00 5B 40 A1 FE 6C
+
+PASS: fft_complex_bitreverse_order, n = 64
+PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 64, stride = 3
+PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 64, stride = 3
+PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 64, stride = 3
+PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 64, stride = 3
+PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 64, stride = 3
+PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 64, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 64, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 64, stride = 3
+PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 64, stride = 3
+PASS: fft_real_bitreverse_order, n = 64
+PASS: gsl_fft_real_radix2 with signal_real_noise, n = 64, stride = 3
+PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 64, stride = 3
+. 0 100046EC 12
+. 7F 9F E3 78 7F 9F F0 40 41 9D 00 50
+
+. 0 100046F8 16
+. 3B A0 00 01 7F A3 EB 78 7F E4 FB 78 4B FF C5 E1
+
+. 0 10000CE4 108
+. 94 21 FF B0 7C 08 02 A6 93 81 00 38 7F 84 19 D6 93 A1 00 3C 93 41 00 30 7C 7A 1B 78 93 E1 00 44 3B E0 00 00 7D 80 00 26 57 9D 20 36 7F A3 EB 78 90 01 00 54 91 81 00 10 57 9C 08 3C 92 E1 00 24 93 01 00 28 93 21 00 2C 93 61 00 34 93 C1 00 40 7C 9E 23 78 DB E1 00 48 92 61 00 14 92 81 00 18 92 A1 00 1C 92 C1 00 20 48 02 81 E9
+
+. 0 10000D50 12
+. 7C 7B 1B 78 7F A3 EB 78 48 02 81 DD
+
+. 0 10000D5C 12
+. 7C 79 1B 78 7F A3 EB 78 48 02 81 D1
+
+. 0 10000D68 12
+. 7C 78 1B 78 7F A3 EB 78 48 02 81 C5
+
+. 0 10000D74 12
+. 2B 9C 00 00 7C 77 1B 78 40 9D 00 68
+
+. 0 10000D80 100
+. 3D 60 10 02 3D 20 10 02 C9 0B 81 00 3D 60 10 02 39 6B 80 F8 C8 E9 80 E8 7F 89 03 A6 3D 20 10 02 C9 4B 00 00 C9 29 81 08 3D 20 43 30 93 E1 00 0C 57 E0 18 38 91 21 00 08 3B FF 00 01 C8 01 00 08 FC 00 50 28 FD A0 48 2A 7C 1B 05 AE FD 80 38 2A FD 60 40 2A 7D B7 05 AE 7D 99 05 AE 7D 78 05 AE 42 00 FF CC
+
+. 0 10000DAC 56
+. 93 E1 00 0C 57 E0 18 38 91 21 00 08 3B FF 00 01 C8 01 00 08 FC 00 50 28 FD A0 48 2A 7C 1B 05 AE FD 80 38 2A FD 60 40 2A 7D B7 05 AE 7D 99 05 AE 7D 78 05 AE 42 00 FF CC
+
+. 0 10000DE4 8
+. 38 60 00 00 48 01 46 0D
+
+. 0 10000DEC 8
+. 7F C3 F3 78 48 00 5A 51
+
+. 0 10006840 128
+. 94 21 FF 70 7C 08 02 A6 42 9F 00 05 93 C1 00 60 7F C8 02 A6 92 E1 00 44 7C 77 1B 79 90 01 00 94 DB 61 00 68 80 1E FF F0 DB 81 00 70 DB A1 00 78 7F C0 F2 14 DB C1 00 80 DB E1 00 88 91 C1 00 20 91 E1 00 24 92 01 00 28 92 21 00 2C 92 41 00 30 92 61 00 34 92 81 00 38 92 A1 00 3C 92 C1 00 40 93 01 00 48 93 21 00 4C 93 41 00 50 93 61 00 54 93 81 00 58 93 A1 00 5C 93 E1 00 64 41 82 01 DC
+
+. 0 100068C0 8
+. 38 60 02 0C 48 02 26 71
+
+. 0 100068C8 12
+. 7C 69 1B 79 91 21 00 14 41 82 02 44
+
+. 0 100068D4 8
+. 56 E3 20 36 48 02 26 5D
+
+. 0 100068DC 16
+. 81 21 00 14 2F 83 00 00 90 69 02 08 41 9E 02 48
+
+. 0 100068EC 24
+. 81 21 00 14 7E E3 BB 78 38 81 00 10 92 E9 00 00 38 A9 00 08 4B FF FE 69
+
+. 0 10006768 116
+. 94 21 FF C0 7C 08 02 A6 42 9F 00 05 93 C1 00 38 7F C8 02 A6 93 81 00 30 90 01 00 44 7C A6 2B 78 93 A1 00 34 7C 85 23 78 80 1E FF F0 38 81 00 10 7F C0 F2 14 81 3E 80 10 83 89 00 18 80 09 00 00 83 A9 00 14 81 69 00 04 81 49 00 08 81 09 00 0C 80 E9 00 10 90 01 00 10 93 A1 00 24 93 81 00 28 91 61 00 14 91 41 00 18 91 01 00 1C 90 E1 00 20 4B FF FC A1
+
+. 0 10006478 60
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 2F 83 00 00 90 01 00 14 38 E0 00 00 93 E1 00 0C 7C 68 1B 78 80 1E FF F0 7C BF 2B 78 38 A0 00 00 7F C0 F2 14 41 9E 01 7C
+
+. 0 100064B4 8
+. 2F 83 00 01 41 9E 01 4C
+
+. 0 10006604 40
+. 90 66 00 00 38 00 00 00 90 7F 00 00 7C 03 03 78 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+
+. 0 100067DC 28
+. 80 01 00 44 83 81 00 30 83 A1 00 34 7C 08 03 A6 83 C1 00 38 38 21 00 40 4E 80 00 20
+
+. 0 10006904 8
+. 2F 83 00 00 40 9E 01 DC
+
+. 0 1000690C 68
+. 81 61 00 10 3C 00 43 30 81 21 00 14 3A A0 00 00 7F 95 58 40 39 C0 00 01 91 69 00 04 81 3E 80 20 90 01 00 08 92 E1 00 0C C9 89 00 00 C9 A1 00 08 81 3E 80 24 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9C 00 DC
+
+. 0 10006950 60
+. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 40 00 00 83 09 02 08 7D 30 4B 78 7F 1B C3 78 82 50 00 08 3A 60 00 01 7D D1 73 78 93 70 01 08 7D CE 91 D6 7F 93 90 40 7E D7 73 96 40 9C 00 8C
+
+. 0 10006A14 12
+. 35 EF FF FF 3A 10 00 04 40 82 FF 50
+
+. 0 10006A20 8
+. 7F 95 B8 40 41 9D 00 90
+
+. 0 10006A28 112
+. 80 61 00 14 80 01 00 94 81 C1 00 20 81 E1 00 24 7C 08 03 A6 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
+
+. 0 10000DF4 36
+. 3C 80 10 01 7F 46 D3 78 38 84 68 DC 7F C5 F3 78 7C 76 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 47 D5
+
+PASS: gsl_fft_complex_wavetable_alloc, n = 1, stride = 1
+. 0 10000E18 8
+. 7F C3 F3 78 48 00 5D 3D
+
+. 0 10006B58 60
+. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 A1 00 14 7C 7D 1B 79 90 01 00 24 93 E1 00 1C 38 60 00 08 80 1E FF F0 38 A0 00 7B 38 C0 00 01 7F C0 F2 14 41 82 00 5C
+
+. 0 10006B94 4
+. 48 02 23 A1
+
+. 0 10006B98 20
+. 38 A0 00 83 7C 7F 1B 79 38 C0 00 08 57 A3 20 36 41 82 00 74
+
+. 0 10006BAC 8
+. 93 BF 00 00 48 02 23 85
+
+. 0 10006BB4 24
+. 2F 83 00 00 7C 60 1B 78 90 1F 00 04 7F E3 FB 78 7F E0 FB 78 41 9E 00 68
+
+. 0 10006BCC 32
+. 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 10000E20 32
+. 3C 80 10 01 38 84 69 14 7F C5 F3 78 7C 7C 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 47 AD
+
+PASS: gsl_fft_complex_workspace_alloc, n = 1
+. 0 10000E40 20
+. 7F C3 F3 78 7F 44 D3 78 7F 65 DB 78 7F 06 C3 78 48 00 41 C9
+
+. 0 10000E54 8
+. 2F 9E 00 00 41 9E 00 30
+
+. 0 10000E5C 44
+. 7F C9 03 A6 38 00 00 00 57 4B 20 36 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 CA 14 7C 19 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
+
+. 0 10000E88 24
+. 7F 63 DB 78 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 48 00 80 21
+
+. 0 10008EBC 20
+. 7C 08 02 A6 94 21 FF F0 39 00 FF FF 90 01 00 14 4B FF DF 0D
+
+. 0 10006DD8 232
+. 94 21 FD 80 7C 08 02 A6 42 9F 00 05 D9 C1 01 F0 D9 E1 01 F8 7D 80 00 26 DA 01 02 00 39 20 00 00 DA 21 02 08 DA 41 02 10 DA 61 02 18 DA 81 02 20 DA A1 02 28 DA C1 02 30 DA E1 02 38 DB 01 02 40 DB 21 02 48 DB 41 02 50 DB 61 02 58 DB 81 02 60 DB A1 02 68 DB C1 02 70 DB E1 02 78 91 C1 01 A8 91 E1 01 AC 92 01 01 B0 92 21 01 B4 92 41 01 B8 92 61 01 BC 92 81 01 C0 92 A1 01 C4 92 C1 01 C8 92 E1 01 CC 93 01 01 D0 93 21 01 D4 93 41 01 D8 93 61 01 DC 93 81 01 E0 93 C1 01 E8 7F C8 02 A6 90 01 02 84 81 67 00 04 80 1E FF F0 91 01 00 1C 39 00 00 01 7F C0 F2 14 7C A0 2B 79 93 A1 01 E4 93 E1 01 EC 91 81 01 A4 90 01 00 18 90 61 00 10 90 81 00 14 81 46 00 04 91 01 00 24 91 21 00 28 91 61 00 2C 41 82 0D 70
+
+. 0 10006EC0 16
+. 80 01 00 18 38 60 00 00 2F 80 00 01 41 9E 06 D8
+
+. 0 100075A4 168
+. 80 01 02 84 81 81 01 A4 81 C1 01 A8 7C 08 03 A6 81 E1 01 AC 7D 81 81 20 82 01 01 B0 82 21 01 B4 82 41 01 B8 82 61 01 BC 82 81 01 C0 82 A1 01 C4 82 C1 01 C8 82 E1 01 CC 83 01 01 D0 83 21 01 D4 83 41 01 D8 83 61 01 DC 83 81 01 E0 83 A1 01 E4 83 C1 01 E8 83 E1 01 EC C9 C1 01 F0 C9 E1 01 F8 CA 01 02 00 CA 21 02 08 CA 41 02 10 CA 61 02 18 CA 81 02 20 CA A1 02 28 CA C1 02 30 CA E1 02 38 CB 01 02 40 CB 21 02 48 CB 41 02 50 CB 61 02 58 CB 81 02 60 CB A1 02 68 CB C1 02 70 CB E1 02 78 38 21 02 80 4E 80 00 20
+
+. 0 10008ED0 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 10000EA0 8
+. 2F 9E 00 00 41 9E 00 30
+
+. 0 10000EA8 44
+. 7F C9 03 A6 38 00 00 00 57 4B 20 36 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 BA 14 7C 17 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
+
+. 0 10000ED4 52
+. 3E 60 10 02 2A 1A 00 01 CB F3 81 10 3C A0 10 01 3C 60 10 01 38 A5 69 3C FC 20 F8 90 7F 04 C3 78 7F 66 DB 78 38 63 69 4C 7F 47 D3 78 7F C8 F3 78 4B FF F9 15
+
+. 0 10000F08 24
+. 3C 80 10 01 38 84 69 50 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 46 CD
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 1, stride = 1
+. 0 10000F20 4
+. 41 91 03 A8
+
+. 0 10000F24 24
+. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 7E 99
+
+. 0 10008DD0 64
+. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 01 00 24 39 00 00 01 7C 7F 1B 78 93 81 00 10 80 1E FF F0 7C 9C 23 78 93 A1 00 14 7C BD 2B 78 7F C0 F2 14 4B FF DF CD
+
+. 0 10008E10 8
+. 2C 03 00 00 40 82 00 64
+
+. 0 10008E18 48
+. 81 3E 80 74 3C 00 43 30 90 01 00 08 7F 83 E8 40 93 A1 00 0C C8 09 00 00 C9 A1 00 08 81 3E 80 78 FD AD 00 28 C8 09 00 00 FD 80 68 24 40 9C 00 34
+
+. 0 10008E48 48
+. 7F A9 03 A6 57 84 20 36 38 00 00 00 7C 1F 04 AE 7D 20 FA 14 FC 00 03 32 7C 1F 05 AE 7C 00 22 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
+
+. 0 10008E78 32
+. 80 01 00 24 83 81 00 10 83 A1 00 14 7C 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 10000F3C 40
+. FC 20 F8 90 3F E0 10 01 3C A0 10 01 38 A5 69 98 7F 24 CB 78 7F 66 DB 78 38 7F 69 90 7F 47 D3 78 7F C8 F3 78 4B FF F8 B9
+
+. 0 10000F64 24
+. 3C 80 10 01 38 84 69 A4 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 46 71
+
+PASS: gsl_fft_complex_inverse with signal_noise, n = 1, stride = 1
+. 0 10000F7C 4
+. 41 91 03 1C
+
+. 0 10000F80 24
+. 7E E3 BB 78 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 48 00 7F 05
+
+. 0 10008E98 20
+. 7C 08 02 A6 94 21 FF F0 39 00 00 01 90 01 00 14 4B FF DF 31
+
+. 0 10008EAC 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 10000F98 8
+. 2F 9E 00 00 41 9E 00 54
+
+. 0 10000FA0 80
+. 3C 00 43 30 3D 20 10 02 90 01 00 08 39 29 80 F8 93 C1 00 0C 7F C9 03 A6 C9 A1 00 08 38 00 00 00 C8 09 00 00 57 4B 20 36 FD 8D 00 28 7C 19 04 AE 7D 20 CA 14 FC 00 03 32 7C 19 05 AE 7C 00 5A 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
+
+. 0 10000FF0 40
+. CB F3 81 10 3C A0 10 01 38 A5 69 E4 7F 24 CB 78 FC 20 F8 90 7E E6 BB 78 7F 47 D3 78 7F C8 F3 78 38 7F 69 90 4B FF F8 05
+
+. 0 10001018 24
+. 3C 80 10 01 38 84 69 F4 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 45 BD
+
+PASS: gsl_fft_complex_backward with signal_noise, n = 1, stride = 1
+. 0 10001030 8
+. 2B 9A 00 01 41 9D 02 34
+
+. 0 10001038 52
+. 3D 20 10 02 3D 60 10 02 39 29 80 F0 39 6B 81 18 C8 49 00 00 7F C4 F3 78 C8 2B 00 00 7F 45 D3 78 7F 66 DB 78 7F 07 C3 78 38 60 00 01 3E A0 10 01 48 00 37 81
+
+. 0 1000106C 24
+. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 7E 3D
+
+. 0 10001084 40
+. FC 20 F8 90 3C A0 10 01 7F C8 F3 78 7F 47 D3 78 38 A5 6A 40 7F 04 C3 78 7F 66 DB 78 38 75 6A 34 3B A0 00 00 4B FF F7 71
+
+. 0 100010AC 24
+. 3C 80 10 01 38 84 6A 50 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 45 29
+
+PASS: gsl_fft_complex_forward with signal_pulse, n = 1, stride = 1
+. 0 100010C4 44
+. 3D 20 10 02 3D 60 10 02 39 29 80 F0 39 6B 81 18 C8 49 00 00 C8 2B 00 00 7F 44 D3 78 7F 65 DB 78 7F 06 C3 78 7F C3 F3 78 48 00 38 D5
+
+. 0 100010F0 24
+. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 7D B9
+
+. 0 10001108 36
+. FC 20 F8 90 3C A0 10 01 7F 04 C3 78 38 A5 6A 90 7F 66 DB 78 7F 47 D3 78 7F C8 F3 78 38 75 6A 34 4B FF F6 F1
+
+. 0 1000112C 24
+. 3C 80 10 01 38 84 6A A0 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 44 A9
+
+PASS: gsl_fft_complex_forward with signal_constant, n = 1, stride = 1
+. 0 10001144 12
+. 7F 9D F0 40 3B E0 00 00 40 9C 00 80
+
+. 0 10001150 52
+. 3E 80 10 01 3D 20 10 02 3D 60 10 02 39 29 81 18 39 6B 80 F0 C8 29 00 00 7F E3 FB 78 C8 4B 00 00 7F C4 F3 78 7F 45 D3 78 7F 66 DB 78 7F 07 C3 78 48 00 39 31
+
+. 0 10001184 24
+. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 7D 25
+
+. 0 1000119C 36
+. C8 33 81 10 3B FF 00 01 38 75 6A 34 7F 04 C3 78 38 B4 6A E4 7F 66 DB 78 7F 47 D3 78 7F C8 F3 78 4B FF F6 5D
+
+. 0 100011C0 12
+. 7F 9F F0 40 7F BD 1B 78 41 9C FF 8C
+
+. 0 100011CC 28
+. 3C 80 10 01 7F C5 F3 78 7F 46 D3 78 38 84 6A F0 7F A3 EB 78 4C C6 31 82 48 01 44 05
+
+PASS: gsl_fft_complex_forward with signal_exp, n = 1, stride = 1
+. 0 100011E8 8
+. 7E C3 B3 78 48 00 5A 65
+
+. 0 10006C50 32
+. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 02 08 48 02 23 19
+
+. 0 10006C70 16
+. 38 00 00 00 90 1D 02 08 7F A3 EB 78 48 02 23 09
+
+. 0 10006C80 24
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
+
+. 0 100011F0 8
+. 7F 83 E3 78 48 00 5A A5
+
+. 0 10006C98 32
+. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 00 04 48 02 22 D1
+
+. 0 10006CB8 16
+. 38 00 00 00 90 1D 00 04 7F A3 EB 78 48 02 22 C1
+
+. 0 10006CC8 24
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
+
+. 0 100011F8 8
+. 7F 63 DB 78 48 02 7D 89
+
+. 0 10001200 8
+. 7F 23 CB 78 48 02 7D 81
+
+. 0 10001208 8
+. 7F 03 C3 78 48 02 7D 79
+
+. 0 10001210 8
+. 7E E3 BB 78 48 02 7D 71
+
+. 0 10001218 80
+. 80 01 00 54 81 81 00 10 82 61 00 14 7C 08 03 A6 82 81 00 18 7D 80 81 20 82 A1 00 1C 82 C1 00 20 82 E1 00 24 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB E1 00 48 38 21 00 50 4E 80 00 20
+
+. 0 10004708 12
+. 7F A3 EB 78 7F E4 FB 78 4B FF E4 CD
+
+. 0 10002BDC 108
+. 94 21 FF B0 7C 08 02 A6 93 81 00 38 7F 84 19 D6 93 A1 00 3C 93 41 00 30 7C 7A 1B 78 93 E1 00 44 3B E0 00 00 7D 80 00 26 57 9D 18 38 7F A3 EB 78 90 01 00 54 91 81 00 10 57 9C 08 3C 92 E1 00 24 93 01 00 28 93 21 00 2C 93 61 00 34 93 C1 00 40 7C 9E 23 78 DB E1 00 48 92 61 00 14 92 81 00 18 92 A1 00 1C 92 C1 00 20 48 02 62 F1
+
+. 0 10002C48 12
+. 7C 7B 1B 78 7F A3 EB 78 48 02 62 E5
+
+. 0 FEEF7DC 8
+. 7E 55 93 78 48 00 00 54
+
+. 0 FEEF834 16
+. 81 5F 00 04 83 BF 00 0C 2B 8A 00 08 40 9D 03 20
+
+. 0 FEEF844 12
+. 82 FC 04 4C 7C 8A B8 40 41 85 03 14
+
+. 0 FEEF850 12
+. 2B 99 01 FF 55 4A 00 38 41 9D 00 0C
+
+. 0 FEEF85C 8
+. 7C 9A E8 00 41 86 02 14
+
+. 0 FEEFA74 12
+. 83 7C 00 34 7F 1B F8 00 40 9A FD E8
+
+. 0 FEEF864 16
+. 7F 8A C8 00 93 5D 00 08 93 BC 00 44 41 9E 03 EC
+
+. 0 FEEF874 8
+. 28 8A 01 FF 40 A5 FF 6C
+
+. 0 FEEF87C 16
+. 55 43 D1 BE 2B 03 00 20 39 03 00 38 40 99 00 48
+
+. 0 FEEF8D0 24
+. 55 0C 18 38 7E EC E2 14 39 37 00 30 81 69 00 08 7C 0B 48 00 41 A2 FF 10
+
+. 0 FEEF7F4 64
+. 91 3F 00 0C 55 03 06 FE 93 EB 00 0C 3B A0 00 01 91 7F 00 08 7D 0B 2E 70 93 E9 00 08 55 66 10 3A 83 FC 00 44 7F 66 E2 14 81 1B 04 38 7F A4 18 30 7F 1F D0 00 7D 0A 23 78 91 5B 04 38 41 9A 01 44
+
+. 0 FEEFA30 16
+. 39 68 00 30 38 C0 00 01 7C C0 28 39 40 82 00 14
+
+. 0 FEEFA50 12
+. 81 4B 00 0C 7F 8A 58 00 40 9E 01 BC
+
+. 0 FEEFC14 32
+. 80 6A 00 04 80 8A 00 0C 54 60 00 38 7C F9 00 50 91 64 00 08 2A 07 00 0F 90 8B 00 0C 41 91 00 54
+
+. 0 FEEFC84 24
+. 7C 6A CA 14 90 7C 00 40 90 7C 00 44 93 43 00 08 93 43 00 0C 41 85 00 08
+
+. 0 FEEFC9C 36
+. 90 7C 00 34 57 AF 10 3A 60 F2 00 01 7D F6 9B 78 39 0A 00 08 92 CA 00 04 7C E3 39 2E 92 43 00 04 4B FF F9 F4
+
+. 0 10002C54 12
+. 7C 79 1B 78 7F A3 EB 78 48 02 62 D9
+
+. 0 FEEFA80 12
+. 38 99 00 10 7C 04 50 40 40 80 FD DC
+
+. 0 FEEFA8C 80
+. 81 3E 05 FC 7C 99 50 50 63 26 00 01 60 80 00 01 7F 87 4A 78 39 1F 00 08 31 27 FF FF 7D 69 39 10 7D 3F CA 14 55 63 10 3A 91 3C 00 34 7C 65 33 78 91 3C 00 40 90 BF 00 04 91 3C 00 44 7C 89 21 2E 90 09 00 04 93 49 00 0C 93 49 00 08 4B FF FB D8
+
+. 0 10002C60 12
+. 7C 78 1B 78 7F A3 EB 78 48 02 62 CD
+
+. 0 10002C6C 12
+. 2B 9C 00 00 7C 77 1B 78 40 9D 00 78
+
+. 0 10002C78 116
+. 3D 60 10 02 3D 20 10 02 C9 0B 81 00 3D 60 10 02 39 6B 80 F8 C8 E9 80 E8 7F 89 03 A6 3D 20 10 02 C9 4B 00 00 C9 29 81 08 3D 20 43 30 93 E1 00 0C 57 E0 10 3A 91 21 00 08 3B FF 00 01 C8 01 00 08 FC 00 50 28 FD A0 48 2A FD 80 38 2A FD 60 40 2A FD A0 68 18 FD 80 60 18 FD 60 58 18 FC 00 00 18 7D B7 05 2E 7D 99 05 2E 7D 78 05 2E 7C 1B 05 2E 42 00 FF BC
+
+. 0 10002CA4 72
+. 93 E1 00 0C 57 E0 10 3A 91 21 00 08 3B FF 00 01 C8 01 00 08 FC 00 50 28 FD A0 48 2A FD 80 38 2A FD 60 40 2A FD A0 68 18 FD 80 60 18 FD 60 58 18 FC 00 00 18 7D B7 05 2E 7D 99 05 2E 7D 78 05 2E 7C 1B 05 2E 42 00 FF BC
+
+. 0 10002CEC 8
+. 38 60 00 00 48 01 27 05
+
+. 0 10002CF4 8
+. 7F C3 F3 78 48 00 69 71
+
+. 0 10009668 128
+. 94 21 FF 70 7C 08 02 A6 42 9F 00 05 93 C1 00 60 7F C8 02 A6 92 E1 00 44 7C 77 1B 79 90 01 00 94 DB 61 00 68 80 1E FF F0 DB 81 00 70 DB A1 00 78 7F C0 F2 14 DB C1 00 80 DB E1 00 88 91 C1 00 20 91 E1 00 24 92 01 00 28 92 21 00 2C 92 41 00 30 92 61 00 34 92 81 00 38 92 A1 00 3C 92 C1 00 40 93 01 00 48 93 21 00 4C 93 41 00 50 93 61 00 54 93 81 00 58 93 A1 00 5C 93 E1 00 64 41 82 01 E4
+
+. 0 100096E8 8
+. 38 60 02 0C 48 01 F8 49
+
+. 0 FEEF7E4 80
+. 7F AA E2 14 55 48 E8 FE 39 3D 00 30 81 69 00 08 91 3F 00 0C 55 03 06 FE 93 EB 00 0C 3B A0 00 01 91 7F 00 08 7D 0B 2E 70 93 E9 00 08 55 66 10 3A 83 FC 00 44 7F 66 E2 14 81 1B 04 38 7F A4 18 30 7F 1F D0 00 7D 0A 23 78 91 5B 04 38 41 9A 01 44
+
+. 0 100096F0 12
+. 7C 69 1B 79 91 21 00 14 41 82 02 4C
+
+. 0 100096FC 8
+. 56 E3 18 38 48 01 F8 35
+
+. 0 FEEFA38 8
+. 7C C0 28 39 40 82 00 14
+
+. 0 FEEFA40 16
+. 54 C6 08 3C 39 6B 00 08 7C C9 28 39 41 82 FF F4
+
+. 0 10009704 16
+. 81 21 00 14 2F 83 00 00 90 69 02 08 41 9E 02 50
+
+. 0 10009714 24
+. 81 21 00 14 7E E3 BB 78 38 81 00 10 92 E9 00 00 38 A9 00 08 4B FF D0 41
+
+. 0 1000972C 8
+. 2F 83 00 00 40 9E 01 E4
+
+. 0 10009734 68
+. 81 61 00 10 3C 00 43 30 81 21 00 14 3A A0 00 00 7F 95 58 40 39 C0 00 01 91 69 00 04 81 3E 80 C4 90 01 00 08 92 E1 00 0C C9 89 00 00 C9 A1 00 08 81 3E 80 C8 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9C 00 E4
+
+. 0 10009778 60
+. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 40 00 00 83 09 02 08 7D 30 4B 78 7F 1B C3 78 82 50 00 08 3A 60 00 01 7D D1 73 78 93 70 01 08 7D CE 91 D6 7F 93 90 40 7E D7 73 96 40 9C 00 94
+
+. 0 10009844 12
+. 35 EF FF FF 3A 10 00 04 40 82 FF 48
+
+. 0 10009850 8
+. 7F 95 B8 40 41 9D 00 90
+
+. 0 10009858 112
+. 80 61 00 14 80 01 00 94 81 C1 00 20 81 E1 00 24 7C 08 03 A6 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
+
+. 0 10002CFC 36
+. 3C 80 10 01 7F 46 D3 78 38 84 74 BC 7F C5 F3 78 7C 76 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 28 CD
+
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 1, stride = 1
+. 0 10002D20 8
+. 7F C3 F3 78 48 00 6C 65
+
+. 0 10009988 60
+. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 A1 00 14 7C 7D 1B 79 90 01 00 24 93 E1 00 1C 38 60 00 08 80 1E FF F0 38 A0 00 7B 38 C0 00 01 7F C0 F2 14 41 82 00 5C
+
+. 0 100099C4 4
+. 48 01 F5 71
+
+. 0 100099C8 20
+. 38 A0 00 83 7C 7F 1B 79 38 C0 00 08 57 A3 18 38 41 82 00 74
+
+. 0 100099DC 8
+. 93 BF 00 00 48 01 F5 55
+
+. 0 100099E4 24
+. 2F 83 00 00 7C 60 1B 78 90 1F 00 04 7F E3 FB 78 7F E0 FB 78 41 9E 00 68
+
+. 0 100099FC 32
+. 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 10002D28 32
+. 3C 80 10 01 38 84 74 F8 7F C5 F3 78 7C 7C 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 28 A5
+
+PASS: gsl_fft_complex_workspace_float_alloc, n = 1
+. 0 10002D48 20
+. 7F C3 F3 78 7F 44 D3 78 7F 65 DB 78 7F 06 C3 78 48 00 2C D1
+
+. 0 10005A28 64
+. 94 21 FF D0 7C 08 02 A6 93 41 00 18 7C 7A 1B 79 93 01 00 10 7C D8 33 78 93 21 00 14 7C 99 23 78 93 81 00 20 7C BC 2B 78 93 61 00 1C 93 A1 00 24 93 C1 00 28 93 E1 00 2C 90 01 00 34 41 82 00 84
+
+. 0 10005A68 8
+. 2F 9A 00 00 41 9E 00 38
+
+. 0 10005A70 16
+. 3B C0 00 00 54 9B 18 38 7F 5F D3 78 4B FF ED 11
+
+. 0 10005A80 20
+. 7F BE E2 14 FC 20 08 18 7C 3E E5 2E 7F DE DA 14 4B FF EC FD
+
+. 0 10005A94 16
+. 37 FF FF FF FC 20 08 18 D0 3D 00 04 40 82 FF DC
+
+. 0 10005AA4 20
+. 7F 83 E3 78 7F 24 CB 78 7F 45 D3 78 7F 06 C3 78 48 00 06 89
+
+. 0 1000613C 20
+. 7C 08 02 A6 94 21 FF F0 38 E0 FF FF 90 01 00 14 4B FF FD FD
+
+. 0 10005F48 208
+. 94 21 FF 70 7C 08 02 A6 42 9F 00 05 93 C1 00 50 7F C8 02 A6 6C E7 80 00 90 01 00 94 90 E1 00 0C 80 1E FF F0 90 A1 00 14 7F C0 F2 14 3C 00 43 30 81 3E 80 18 90 01 00 08 C8 09 00 00 C9 A1 00 08 81 3E 80 20 FD AD 00 28 90 01 00 10 C9 89 00 00 81 3E 80 1C FD AD 68 2A 93 21 00 3C C8 09 00 00 3B 20 00 00 7F 99 28 40 DB 41 00 60 FD AD 00 32 C8 01 00 10 92 A1 00 2C 7C D5 33 78 FC 00 60 28 93 41 00 40 93 61 00 44 7C 7A 1B 78 DB 21 00 58 7C BB 2B 78 DB 61 00 68 FF 4D 00 24 DB 81 00 70 DB A1 00 78 DB C1 00 80 DB E1 00 88 92 61 00 24 92 81 00 28 92 C1 00 30 92 E1 00 34 93 01 00 38 93 81 00 48 93 A1 00 4C 93 E1 00 54 40 9C 00 C4
+
+. 0 10006018 40
+. 54 94 18 38 82 7E 80 24 FF 20 60 90 3A C0 00 00 7E 98 A3 78 2F 9B 00 00 C3 93 00 00 3B A0 00 00 FF A0 E0 90 41 9E 00 80
+
+. 0 10006040 44
+. 3E E0 43 30 FF 60 C8 90 3B 80 00 00 7F 7F DB 78 93 A1 00 14 92 E1 00 10 CB E1 00 10 FF FF D8 28 FF FF 06 B2 FC 20 F8 90 48 02 2E 8D
+
+. 0 1000606C 12
+. FF C0 08 18 FC 20 F8 90 48 02 2F 21
+
+. 0 10006078 68
+. 7D 7D CA 14 7C 0B DB 96 FC 20 08 18 7D 3C D2 14 7C 1C D4 2E C1 89 00 04 37 FF FF FF 7F 9C C2 14 ED A1 03 32 EC 21 00 32 EC 1E 68 38 EF DE 0B 3A EF 9C 00 2A EF BD F0 2A 7C 00 D9 D6 7F A0 58 50 40 82 FF 98
+
+. 0 100060BC 28
+. 3B 39 00 01 7D 36 AA 14 7F 99 D8 40 7F 96 AD 2E D3 A9 00 04 7E D6 A2 14 41 9C FF 58
+
+. 0 100060D8 100
+. 80 01 00 94 38 60 00 00 82 61 00 24 82 81 00 28 7C 08 03 A6 82 A1 00 2C 82 C1 00 30 82 E1 00 34 83 01 00 38 83 21 00 3C 83 41 00 40 83 61 00 44 83 81 00 48 83 A1 00 4C 83 C1 00 50 83 E1 00 54 CB 21 00 58 CB 41 00 60 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
+
+. 0 10006150 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 10005AB8 48
+. 80 01 00 34 83 01 00 10 83 21 00 14 7C 08 03 A6 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+. 0 10002D5C 8
+. 2F 9E 00 00 41 9E 00 30
+
+. 0 10002D64 44
+. 7F C9 03 A6 38 00 00 00 57 4B 18 38 7D 20 DA 14 7C 1B 04 2E C1 A9 00 04 7D 20 CA 14 7C 19 05 2E 7C 00 5A 14 D1 A9 00 04 42 00 FF E4
+
+. 0 10002D90 24
+. 7F 63 DB 78 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 48 00 8F D9
+
+. 0 1000BD7C 20
+. 7C 08 02 A6 94 21 FF F0 39 00 FF FF 90 01 00 14 4B FF DE 7D
+
+. 0 10009C08 232
+. 94 21 FD D0 7C 08 02 A6 42 9F 00 05 D9 C1 01 A0 D9 E1 01 A8 7D 80 00 26 DA 01 01 B0 39 20 00 00 DA 21 01 B8 DA 41 01 C0 DA 61 01 C8 DA 81 01 D0 DA A1 01 D8 DA C1 01 E0 DA E1 01 E8 DB 01 01 F0 DB 21 01 F8 DB 41 02 00 DB 61 02 08 DB 81 02 10 DB A1 02 18 DB C1 02 20 DB E1 02 28 91 C1 01 58 91 E1 01 5C 92 01 01 60 92 21 01 64 92 41 01 68 92 61 01 6C 92 81 01 70 92 A1 01 74 92 C1 01 78 92 E1 01 7C 93 01 01 80 93 21 01 84 93 41 01 88 93 61 01 8C 93 81 01 90 93 C1 01 98 7F C8 02 A6 90 01 02 34 81 67 00 04 80 1E FF F0 91 01 00 1C 39 00 00 01 7F C0 F2 14 7C A0 2B 79 93 A1 01 94 93 E1 01 9C 91 81 01 54 90 01 00 18 90 61 00 10 90 81 00 14 81 46 00 04 91 01 00 24 91 21 00 28 91 61 00 2C 41 82 0D 8C
+
+. 0 10009CF0 16
+. 80 01 00 18 38 60 00 00 2F 80 00 01 41 9E 06 C8
+
+. 0 1000A3C4 168
+. 80 01 02 34 81 81 01 54 81 C1 01 58 7C 08 03 A6 81 E1 01 5C 7D 81 81 20 82 01 01 60 82 21 01 64 82 41 01 68 82 61 01 6C 82 81 01 70 82 A1 01 74 82 C1 01 78 82 E1 01 7C 83 01 01 80 83 21 01 84 83 41 01 88 83 61 01 8C 83 81 01 90 83 A1 01 94 83 C1 01 98 83 E1 01 9C C9 C1 01 A0 C9 E1 01 A8 CA 01 01 B0 CA 21 01 B8 CA 41 01 C0 CA 61 01 C8 CA 81 01 D0 CA A1 01 D8 CA C1 01 E0 CA E1 01 E8 CB 01 01 F0 CB 21 01 F8 CB 41 02 00 CB 61 02 08 CB 81 02 10 CB A1 02 18 CB C1 02 20 CB E1 02 28 38 21 02 30 4E 80 00 20
+
+. 0 1000BD90 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 10002DA8 8
+. 2F 9E 00 00 41 9E 00 30
+
+. 0 10002DB0 44
+. 7F C9 03 A6 38 00 00 00 57 4B 18 38 7D 20 DA 14 7C 1B 04 2E C1 A9 00 04 7D 20 BA 14 7C 17 05 2E 7C 00 5A 14 D1 A9 00 04 42 00 FF E4
+
+. 0 10002DDC 52
+. 3E 60 10 02 2A 1A 00 01 CB F3 81 10 3C A0 10 01 3C 60 10 01 38 A5 69 3C FC 20 F8 90 7F 04 C3 78 7F 66 DB 78 38 63 69 4C 7F 47 D3 78 7F C8 F3 78 4B FF F8 F9
+
+. 0 10002704 124
+. 94 21 FF A0 7C 08 02 A6 93 81 00 38 7D 1C 43 79 3D 20 10 02 93 01 00 28 39 29 80 F0 93 21 00 2C 93 61 00 34 FD 20 08 90 93 C1 00 40 7C 78 1B 78 93 E1 00 44 7C 9E 23 78 DB A1 00 48 7C B9 2B 78 DB C1 00 50 7C DF 33 78 DB E1 00 58 7C FB 3B 78 92 41 00 10 92 61 00 14 92 81 00 18 92 A1 00 1C 92 C1 00 20 92 E1 00 24 93 41 00 30 93 A1 00 3C 90 01 00 64 C8 29 00 00 41 82 00 60
+
+. 0 10002780 84
+. 3D 20 10 02 7F 89 03 A6 39 29 81 20 38 00 00 00 C9 49 00 00 54 EA 18 38 7D 20 FA 14 7D 60 F2 14 7C 1F 04 2E 7D 9E 04 2E 7C 00 52 14 C1 A9 00 04 C1 6B 00 04 EC 00 60 28 ED AD 58 28 FC 00 02 10 FD A0 6A 10 FC 00 68 2A FF E0 02 B2 FF 9F 08 00 40 9D 00 08
+
+. 0 100027D8 4
+. 42 00 FF C0
+
+. 0 100027DC 12
+. FF 81 48 00 38 60 00 00 40 9C 00 58
+
+. 0 100027E8 84
+. 80 01 00 64 82 41 00 10 82 61 00 14 7C 08 03 A6 82 81 00 18 82 A1 00 1C 82 C1 00 20 82 E1 00 24 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB A1 00 48 CB C1 00 50 CB E1 00 58 38 21 00 60 4E 80 00 20
+
+. 0 10002E10 24
+. 3C 80 10 01 38 84 75 28 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 27 C5
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 1, stride = 1
+. 0 10002E28 4
+. 41 91 03 AC
+
+. 0 10002E2C 24
+. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 8E 4D
+
+. 0 1000BC8C 64
+. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 01 00 24 39 00 00 01 7C 7F 1B 78 93 81 00 10 80 1E FF F0 7C 9C 23 78 93 A1 00 14 7C BD 2B 78 7F C0 F2 14 4B FF DF 41
+
+. 0 1000BCCC 8
+. 2C 03 00 00 40 82 00 68
+
+. 0 1000BCD4 52
+. 81 3E 81 08 3C 00 43 30 90 01 00 08 7F 83 E8 40 93 A1 00 0C C8 09 00 00 C9 A1 00 08 81 3E 81 0C FD AD 00 28 C0 09 00 00 FD A0 68 18 ED 80 68 24 40 9C 00 34
+
+. 0 1000BD08 48
+. 7F A9 03 A6 57 84 18 38 38 00 00 00 7C 1F 04 2E 7D 20 FA 14 EC 00 03 32 7C 1F 05 2E 7C 00 22 14 C1 A9 00 04 ED AD 03 32 D1 A9 00 04 42 00 FF E0
+
+. 0 1000BD38 32
+. 80 01 00 24 83 81 00 10 83 A1 00 14 7C 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 10002E44 40
+. FC 20 F8 90 3F E0 10 01 3C A0 10 01 38 A5 69 98 7F 24 CB 78 7F 66 DB 78 38 7F 69 90 7F 47 D3 78 7F C8 F3 78 4B FF F8 9D
+
+. 0 10002E6C 24
+. 3C 80 10 01 38 84 75 70 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 27 69
+
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 1, stride = 1
+. 0 10002E84 4
+. 41 91 03 20
+
+. 0 10002E88 24
+. 7E E3 BB 78 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 48 00 8E BD
+
+. 0 1000BD58 20
+. 7C 08 02 A6 94 21 FF F0 39 00 00 01 90 01 00 14 4B FF DE A1
+
+. 0 1000BD6C 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 10002EA0 8
+. 2F 9E 00 00 41 9E 00 58
+
+. 0 10002EA8 84
+. 3C 00 43 30 3D 20 10 02 90 01 00 08 39 29 80 F8 93 C1 00 0C 7F C9 03 A6 C9 A1 00 08 38 00 00 00 C8 09 00 00 57 4B 18 38 FD AD 00 28 FD 80 68 18 7C 19 04 2E 7D 20 CA 14 EC 00 03 32 7C 19 05 2E 7C 00 5A 14 C1 A9 00 04 ED AD 03 32 D1 A9 00 04 42 00 FF E0
+
+. 0 10002EFC 40
+. CB F3 81 10 3C A0 10 01 38 A5 69 E4 7F 24 CB 78 FC 20 F8 90 7E E6 BB 78 7F 47 D3 78 7F C8 F3 78 38 7F 69 90 4B FF F7 E5
+
+. 0 10002F24 24
+. 3C 80 10 01 38 84 75 B8 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 26 B1
+
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 1, stride = 1
+. 0 10002F3C 8
+. 2B 9A 00 01 41 9D 02 34
+
+. 0 10002F44 52
+. 3D 20 10 02 3D 60 10 02 39 29 81 28 39 6B 81 2C C0 49 00 00 7F C4 F3 78 C0 2B 00 00 7F 45 D3 78 7F 66 DB 78 7F 07 C3 78 38 60 00 01 3E A0 10 01 48 00 22 BD
+
+. 0 10005230 96
+. 94 21 FF 90 7C 08 02 A6 93 C1 00 30 7C 9E 23 79 DB 81 00 50 FF 80 08 90 DB A1 00 58 FF A0 10 90 93 21 00 1C 7C F9 3B 78 93 61 00 24 7C 7B 1B 78 DB 21 00 38 DB 41 00 40 DB 61 00 48 DB C1 00 60 DB E1 00 68 93 01 00 18 93 41 00 20 93 81 00 28 93 A1 00 2C 93 E1 00 34 90 01 00 74 41 82 01 48
+
+. 0 10005290 8
+. 2F 9E 00 00 41 9E 00 28
+
+. 0 10005298 36
+. 7F C9 03 A6 39 40 00 00 38 00 00 00 54 AB 18 38 7D 20 32 14 7D 46 01 2E 91 49 00 04 7C 00 5A 14 42 00 FF F0
+
+. 0 100052BC 40
+. 7C 1B F3 96 2F 9E 00 00 7C 00 F1 D6 7C 00 D8 50 7C 00 29 D6 54 00 18 38 7D 20 32 14 7F 86 05 2E D3 A9 00 04 41 9E 00 A4
+
+. 0 100052E4 104
+. 3F 00 43 30 3D 20 10 02 39 29 80 F8 93 C1 00 14 93 01 00 10 54 BA 18 38 CB 29 00 00 3D 20 10 02 C8 01 00 10 3B 80 00 00 CB 49 81 38 3B A0 00 00 FF 60 C8 28 7F DF F3 78 7C 1D F3 96 93 01 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD DA 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF D8 24 FC 20 F8 90 48 02 3B AD
+
+. 0 1000534C 12
+. FF C0 08 18 FC 20 F8 90 48 02 3C 41
+
+. 0 10005358 44
+. 37 FF FF FF FC 20 08 18 7D 3C CA 14 EC 01 07 32 EC 21 07 72 EC 1E 07 7A EF DE 0F 38 7F DC CD 2E 7F 9C D2 14 D0 09 00 04 40 82 FF 9C
+
+. 0 10005384 80
+. 38 60 00 00 80 01 00 74 83 01 00 18 83 21 00 1C 7C 08 03 A6 83 41 00 20 83 61 00 24 83 81 00 28 83 A1 00 2C 83 C1 00 30 83 E1 00 34 CB 21 00 38 CB 41 00 40 CB 61 00 48 CB 81 00 50 CB A1 00 58 CB C1 00 60 CB E1 00 68 38 21 00 70 4E 80 00 20
+
+. 0 10002F78 24
+. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 8D F1
+
+. 0 10002F90 40
+. FC 20 F8 90 3C A0 10 01 7F C8 F3 78 7F 47 D3 78 38 A5 6A 40 7F 04 C3 78 7F 66 DB 78 38 75 6A 34 3B A0 00 00 4B FF F7 51
+
+. 0 10002FB8 24
+. 3C 80 10 01 38 84 76 00 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 26 1D
+
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 1, stride = 1
+. 0 10002FD0 44
+. 3D 20 10 02 3D 60 10 02 39 29 81 28 39 6B 81 2C C0 49 00 00 C0 2B 00 00 7F 44 D3 78 7F 65 DB 78 7F 06 C3 78 7F C3 F3 78 48 00 24 01
+
+. 0 100053F8 20
+. 2C 03 00 00 7C 08 02 A6 94 21 FF F0 90 01 00 14 41 82 00 A0
+
+. 0 1000540C 8
+. 2F 83 00 00 41 9E 00 24
+
+. 0 10005414 32
+. 7C 69 03 A6 38 00 00 00 54 8B 18 38 7D 20 2A 14 7C 25 05 2E D0 49 00 04 7C 00 5A 14 42 00 FF F0
+
+. 0 10005434 8
+. 2F 83 00 00 41 9E 00 28
+
+. 0 1000543C 36
+. 7C 69 03 A6 54 84 18 38 39 60 00 00 38 00 00 00 7D 20 32 14 7D 66 01 2E 91 69 00 04 7C 00 22 14 42 00 FF F0
+
+. 0 10005460 72
+. 3C 00 43 30 3D 20 10 02 90 61 00 0C 39 29 80 F8 90 01 00 08 38 60 00 00 C8 01 00 08 C9 A9 00 00 80 01 00 14 38 21 00 10 FC 00 68 28 7C 08 03 A6 FC 00 00 18 ED A0 00 B2 EC 00 00 72 D1 A6 00 04 D0 06 00 00 4E 80 00 20
+
+. 0 10002FFC 24
+. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 8D 6D
+
+. 0 10003014 36
+. FC 20 F8 90 3C A0 10 01 7F 04 C3 78 38 A5 6A 90 7F 66 DB 78 7F 47 D3 78 7F C8 F3 78 38 75 6A 34 4B FF F6 D1
+
+. 0 10003038 24
+. 3C 80 10 01 38 84 76 48 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 25 9D
+
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 1, stride = 1
+. 0 10003050 12
+. 7F 9D F0 40 3B E0 00 00 40 9C 00 80
+
+. 0 1000305C 52
+. 3E 80 10 01 3D 20 10 02 3D 60 10 02 39 29 81 2C 39 6B 81 28 C0 29 00 00 7F E3 FB 78 C0 4B 00 00 7F C4 F3 78 7F 45 D3 78 7F 66 DB 78 7F 07 C3 78 48 00 24 4D
+
+. 0 100054D8 112
+. 94 21 FF 80 7C 08 02 A6 93 C1 00 40 7C 9E 23 79 DB 61 00 58 FF 60 08 90 DB 81 00 60 FF 80 10 90 92 E1 00 24 7C B7 2B 78 93 21 00 2C 7C D9 33 78 93 41 00 30 7C 7A 1B 78 93 61 00 34 7C FB 3B 78 DB 21 00 48 DB 41 00 50 DB A1 00 68 DB C1 00 70 DB E1 00 78 92 C1 00 20 93 01 00 28 93 81 00 38 93 A1 00 3C 93 E1 00 44 90 01 00 84 41 82 01 84
+
+. 0 10005548 8
+. 2F 9E 00 00 41 9E 00 A4
+
+. 0 10005550 104
+. 3E C0 43 30 3D 20 10 02 39 29 80 F8 93 C1 00 14 92 C1 00 10 3B 80 00 00 CB 29 00 00 3D 20 10 02 C8 01 00 10 3B A0 00 00 CB 49 81 40 54 B8 18 38 FF A0 C8 28 7F DF F3 78 7C 1D F3 96 92 C1 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD D2 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF E8 24 FC 20 F8 90 48 02 39 41
+
+. 0 100055B8 12
+. FF C0 08 18 FC 20 F8 90 48 02 39 D5
+
+. 0 100055C4 44
+. 37 FF FF FF FC 20 08 18 7D 3C CA 14 EC 01 06 F2 EC 21 07 32 EC 1E 07 3A EF DE 0E F8 7F DC CD 2E 7F 9C C2 14 D0 09 00 04 40 82 FF 9C
+
+. 0 100055F0 8
+. 2F 9E 00 00 41 9E 00 28
+
+. 0 100055F8 36
+. 7F C9 03 A6 39 40 00 00 38 00 00 00 56 EB 18 38 7D 20 DA 14 7D 5B 01 2E 91 49 00 04 7C 00 5A 14 42 00 FF F0
+
+. 0 1000561C 8
+. 2F 9A 00 00 40 9D 00 CC
+
+. 0 100056EC 20
+. 7D 3A F0 50 7C 09 F3 96 7C 00 F1 D6 7C 60 48 50 4B FF FF 34
+
+. 0 10005630 152
+. 3C 00 43 30 3D 20 10 02 90 01 00 10 39 29 80 F8 93 C1 00 14 7C 17 19 D6 C9 A9 00 00 38 60 00 00 C8 01 00 10 FC 00 68 28 54 00 18 38 7D 20 DA 14 FC 00 00 18 ED A0 07 32 EC 00 06 F2 7C 1B 05 2E D1 A9 00 04 80 01 00 84 82 C1 00 20 82 E1 00 24 7C 08 03 A6 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB 21 00 48 CB 41 00 50 CB 61 00 58 CB 81 00 60 CB A1 00 68 CB C1 00 70 CB E1 00 78 38 21 00 80 4E 80 00 20
+
+. 0 10003090 24
+. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 8C D9
+
+. 0 100030A8 36
+. C8 33 81 10 3B FF 00 01 38 75 6A 34 7F 04 C3 78 38 B4 6A E4 7F 66 DB 78 7F 47 D3 78 7F C8 F3 78 4B FF F6 3D
+
+. 0 100030CC 12
+. 7F 9F F0 40 7F BD 1B 78 41 9C FF 8C
+
+. 0 100030D8 28
+. 3C 80 10 01 7F C5 F3 78 7F 46 D3 78 38 84 76 90 7F A3 EB 78 4C C6 31 82 48 01 24 F9
+
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 1, stride = 1
+. 0 100030F4 8
+. 7E C3 B3 78 48 00 69 89
+
+. 0 10009A80 32
+. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 02 08 48 01 F4 E9
+
+. 0 10009AA0 16
+. 38 00 00 00 90 1D 02 08 7F A3 EB 78 48 01 F4 D9
+
+. 0 10009AB0 24
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
+
+. 0 100030FC 8
+. 7F 83 E3 78 48 00 69 C9
+
+. 0 10009AC8 32
+. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 00 04 48 01 F4 A1
+
+. 0 10009AE8 16
+. 38 00 00 00 90 1D 00 04 7F A3 EB 78 48 01 F4 91
+
+. 0 10009AF8 24
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
+
+. 0 10003104 8
+. 7F 63 DB 78 48 02 5E 7D
+
+. 0 1000310C 8
+. 7F 23 CB 78 48 02 5E 75
+
+. 0 10003114 8
+. 7F 03 C3 78 48 02 5E 6D
+
+. 0 1000311C 8
+. 7E E3 BB 78 48 02 5E 65
+
+. 0 10003124 80
+. 80 01 00 54 81 81 00 10 82 61 00 14 7C 08 03 A6 82 81 00 18 7D 80 81 20 82 A1 00 1C 82 C1 00 20 82 E1 00 24 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB E1 00 48 38 21 00 50 4E 80 00 20
+
+. 0 10004714 12
+. 7F A3 EB 78 7F E4 FB 78 4B FF D3 85
+
+. 0 10001AA0 76
+. 94 21 FF C0 7C 08 02 A6 93 41 00 28 7F 44 19 D6 93 81 00 30 7C 7C 1B 78 90 01 00 44 93 21 00 24 57 43 18 38 93 61 00 2C 93 A1 00 34 57 5D 20 36 93 C1 00 38 7C 9E 23 78 93 E1 00 3C 92 C1 00 18 92 E1 00 1C 93 01 00 20 48 02 74 4D
+
+. 0 10001AEC 12
+. 7C 7F 1B 78 7F A3 EB 78 48 02 74 41
+
+. 0 10001AF8 12
+. 7C 7B 1B 78 7F A3 EB 78 48 02 74 35
+
+. 0 FEEFC5C 20
+. 7F 9F CA 14 83 1C 00 04 63 16 00 01 92 DC 00 04 41 8E 00 10
+
+. 0 FEEFC7C 8
+. 39 1F 00 08 4B FF FA 30
+
+. 0 10001B04 12
+. 7C 79 1B 78 7F A3 EB 78 48 02 74 29
+
+. 0 FEEFA5C 24
+. 7C A5 30 78 7F 03 E2 14 39 6A 00 08 54 C6 08 3C 90 B8 04 38 4B FF FF 7C
+
+. 0 FEEF9EC 28
+. 21 26 00 00 7E A9 31 14 7D 26 28 10 7D 29 49 10 7D 29 00 D0 7D 2A AB 79 41 82 00 34
+
+. 0 10001B10 16
+. 2B 9A 00 00 7C 7D 1B 78 39 40 00 00 40 9D 00 38
+
+. 0 10001B20 52
+. 3D 60 10 02 7F 49 03 A6 39 6B 80 F8 3D 20 43 30 C9 AB 00 00 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 7C 1F 05 AE 42 00 FF E4
+
+. 0 10001B54 16
+. 57 40 08 3C 39 40 00 00 2B 80 00 00 40 9D 00 64
+
+. 0 10001B64 96
+. 3D 60 10 02 3D 20 10 02 C9 2B 81 00 3D 60 10 02 39 6B 80 F8 C9 09 80 E8 7C 09 03 A6 3D 20 10 02 C9 6B 00 00 C9 49 81 08 3D 20 43 30 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 58 28 FD A0 50 2A FD 80 40 2A FC 00 48 2A 7D BD 05 AE 7D 9B 05 AE 7C 19 05 AE 42 00 FF D0
+
+. 0 10001B90 52
+. 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 58 28 FD A0 50 2A FD 80 40 2A FC 00 48 2A 7D BD 05 AE 7D 9B 05 AE 7C 19 05 AE 42 00 FF D0
+
+. 0 10001BC4 8
+. 38 60 00 00 48 01 38 2D
+
+. 0 10001BCC 8
+. 7F C3 F3 78 48 00 ED 75
+
+. 0 10010944 136
+. 94 21 FF 70 7C 08 02 A6 42 9F 00 05 93 C1 00 60 7F C8 02 A6 7D 80 00 26 93 01 00 48 7C 78 1B 79 90 01 00 94 80 1E FF F0 DB 61 00 68 DB 81 00 70 7F C0 F2 14 DB A1 00 78 DB C1 00 80 DB E1 00 88 91 C1 00 20 91 E1 00 24 92 01 00 28 92 21 00 2C 92 41 00 30 92 61 00 34 92 81 00 38 92 A1 00 3C 92 C1 00 40 92 E1 00 44 93 21 00 4C 93 41 00 50 93 61 00 54 93 81 00 58 93 A1 00 5C 93 E1 00 64 91 81 00 1C 41 82 02 08
+
+. 0 100109CC 8
+. 38 60 02 0C 48 01 85 65
+
+. 0 100109D4 12
+. 7C 69 1B 79 91 21 00 14 41 82 02 6C
+
+. 0 100109E0 8
+. 2F 98 00 01 41 9E 01 DC
+
+. 0 10010BC0 16
+. 81 21 00 14 3A E0 00 00 92 E9 02 08 4B FF FE 34
+
+. 0 10010A00 24
+. 81 21 00 14 7F 03 C3 78 38 81 00 10 93 09 00 00 38 A9 00 08 4B FF 5C 6D
+
+. 0 10006680 92
+. 94 21 FF C0 7C 08 02 A6 42 9F 00 05 93 C1 00 38 7F C8 02 A6 7C A6 2B 78 90 01 00 44 7C 85 23 78 38 81 00 10 80 1E FF F0 7F C0 F2 14 81 3E 80 0C 80 09 00 00 80 E9 00 10 81 69 00 04 81 49 00 08 81 09 00 0C 90 01 00 10 91 61 00 14 91 41 00 18 91 01 00 1C 90 E1 00 20 4B FF FD A1
+
+. 0 100066DC 20
+. 80 01 00 44 83 C1 00 38 38 21 00 40 7C 08 03 A6 4E 80 00 20
+
+. 0 10010A18 8
+. 2F 83 00 00 40 9E 01 FC
+
+. 0 10010A20 68
+. 81 61 00 10 3C 00 43 30 81 21 00 14 3A C0 00 00 2B 8B 00 00 39 C0 00 01 91 69 00 04 81 3E 82 44 90 01 00 08 93 01 00 0C C9 89 00 00 C9 A1 00 08 81 3E 82 48 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9D 00 DC
+
+. 0 10010A64 60
+. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 20 00 00 82 E9 02 08 7D 31 4B 78 7E FA BB 78 82 71 00 08 3A 80 00 01 7D C9 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7E 58 73 96 40 9C 00 94
+
+. 0 10010B30 12
+. 35 EF FF FF 3A 31 00 04 40 82 FF 48
+
+. 0 10010B3C 16
+. 57 00 F8 7E 80 61 00 14 7F 80 B0 40 41 9C 00 A4
+
+. 0 10010B4C 116
+. 80 01 00 94 81 81 00 1C 81 C1 00 20 7C 08 03 A6 81 E1 00 24 7D 80 81 20 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
+
+. 0 10001BD4 36
+. 3C 80 10 01 7F 86 E3 78 38 84 6E EC 7F C5 F3 78 7C 76 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 39 F5
+
+PASS: gsl_fft_real_wavetable_alloc, n = 1, stride = 1
+. 0 10001BF8 8
+. 7F C3 F3 78 48 00 F0 91
+
+. 0 10010C8C 60
+. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 A1 00 14 7C 7D 1B 79 90 01 00 24 93 E1 00 1C 38 60 00 08 80 1E FF F0 38 A0 00 84 38 C0 00 01 7F C0 F2 14 41 82 00 5C
+
+. 0 10010CC8 4
+. 48 01 82 6D
+
+. 0 10010CCC 20
+. 38 A0 00 8C 7C 7F 1B 79 38 C0 00 08 57 A3 18 38 41 82 00 74
+
+. 0 10010CE0 8
+. 93 BF 00 00 48 01 82 51
+
+. 0 10010CE8 24
+. 2F 83 00 00 7C 60 1B 78 90 1F 00 04 7F E3 FB 78 7F E0 FB 78 41 9E 00 68
+
+. 0 10010D00 32
+. 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 10001C00 32
+. 3C 80 10 01 38 84 6F 20 7F C5 F3 78 7C 78 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 39 CD
+
+PASS: gsl_fft_real_workspace_alloc, n = 1
+. 0 10001C20 20
+. 7F 84 E3 78 7F 65 DB 78 7F A6 EB 78 7F C3 F3 78 48 00 34 E5
+
+. 0 10001C34 16
+. 7F 23 CB 78 7F 64 DB 78 57 45 20 36 48 02 73 35
+
+. 0 10001C44 8
+. 2F 9E 00 00 41 9E 00 24
+
+. 0 10001C4C 32
+. 7F C9 03 A6 39 60 00 00 55 60 20 36 55 69 18 38 7C 1B 04 AE 7D 6B E2 14 7C 09 FD AE 42 00 FF EC
+
+. 0 10001C6C 28
+. 7F 07 C3 78 7F 84 E3 78 7F C5 F3 78 7E C6 B3 78 7F E3 FB 78 3E E0 10 02 48 00 F1 95
+
+. 0 10010E18 216
+. 94 21 FE F0 7C 08 02 A6 42 9F 00 05 92 21 00 44 D9 C1 00 80 39 20 00 00 D9 E1 00 88 3A 20 00 01 DA 01 00 90 DA 21 00 98 DA 41 00 A0 DA 61 00 A8 DA 81 00 B0 DA A1 00 B8 DA C1 00 C0 DA E1 00 C8 DB 01 00 D0 DB 21 00 D8 DB 41 00 E0 DB 61 00 E8 DB 81 00 F0 DB A1 00 F8 DB C1 01 00 DB E1 01 08 91 C1 00 38 91 E1 00 3C 92 01 00 40 92 41 00 48 92 61 00 4C 92 81 00 50 92 A1 00 54 92 C1 00 58 92 E1 00 5C 93 01 00 60 93 21 00 64 93 41 00 68 93 61 00 6C 93 81 00 70 93 C1 00 78 7F C8 02 A6 90 01 01 14 81 07 00 04 80 1E FF F0 93 A1 00 74 7F C0 F2 14 7C A0 2B 79 93 E1 00 7C 90 01 00 18 90 61 00 10 90 81 00 14 81 46 00 04 91 01 00 20 91 21 00 24 41 82 16 40
+
+. 0 10010EF0 16
+. 80 01 00 18 38 60 00 00 2F 80 00 01 41 9E 09 2C
+
+. 0 10011828 160
+. 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
+
+. 0 10001C88 20
+. 7F 64 DB 78 7F 85 E3 78 7F C6 F3 78 7F E3 FB 78 48 00 C8 05
+
+. 0 1000E49C 56
+. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 2C 06 00 00 90 01 00 24 93 E1 00 1C 7C 7F 1B 78 80 1E FF F0 7C A3 2B 78 93 A1 00 14 7F C0 F2 14 41 82 00 D4
+
+. 0 1000E4D4 40
+. 39 26 FF FF 83 BE 81 C8 2B 89 00 01 C8 1F 00 00 C9 BD 00 00 38 A0 00 01 D8 04 00 00 7D 28 4B 78 D9 A4 00 08 40 9D 00 58
+
+. 0 1000E550 8
+. 7F 88 28 00 41 9E 00 24
+
+. 0 1000E558 32
+. 80 01 00 24 38 60 00 00 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 10001C9C 40
+. C8 37 81 10 3C A0 10 01 3C 60 10 01 7F 87 E3 78 7F C8 F3 78 38 A5 69 3C 7F A4 EB 78 7F 66 DB 78 38 63 69 4C 4B FF EB 59
+
+. 0 10001CC4 24
+. 3C 80 10 01 38 84 6F 48 7F C5 F3 78 7F 86 E3 78 4C C6 31 82 48 01 39 11
+
+PASS: gsl_fft_real with signal_real_noise, n = 1, stride = 1
+. 0 10001CDC 8
+. 7F C3 F3 78 48 00 A8 61
+
+. 0 1000C540 136
+. 94 21 FF 70 7C 08 02 A6 42 9F 00 05 93 C1 00 60 7F C8 02 A6 7D 80 00 26 92 E1 00 44 7C 77 1B 79 90 01 00 94 80 1E FF F0 DB 61 00 68 DB 81 00 70 7F C0 F2 14 DB A1 00 78 DB C1 00 80 DB E1 00 88 91 C1 00 20 91 E1 00 24 92 01 00 28 92 21 00 2C 92 41 00 30 92 61 00 34 92 81 00 38 92 A1 00 3C 92 C1 00 40 93 01 00 48 93 21 00 4C 93 41 00 50 93 61 00 54 93 81 00 58 93 A1 00 5C 93 E1 00 64 91 81 00 1C 41 82 01 F0
+
+. 0 1000C5C8 8
+. 38 60 02 0C 48 01 C9 69
+
+. 0 1000C5D0 12
+. 7C 69 1B 79 91 21 00 14 41 82 02 54
+
+. 0 1000C5DC 8
+. 56 E3 20 36 48 01 C9 55
+
+. 0 1000C5E4 16
+. 81 21 00 14 2F 83 00 00 90 69 02 08 41 9E 02 58
+
+. 0 1000C5F4 24
+. 81 21 00 14 7E E3 BB 78 38 81 00 10 92 E9 00 00 38 A9 00 08 4B FF A0 ED
+
+. 0 100066F4 92
+. 94 21 FF C0 7C 08 02 A6 42 9F 00 05 93 C1 00 38 7F C8 02 A6 7C A6 2B 78 90 01 00 44 7C 85 23 78 38 81 00 10 80 1E FF F0 7F C0 F2 14 81 3E 80 0C 80 09 00 00 80 E9 00 10 81 69 00 04 81 49 00 08 81 09 00 0C 90 01 00 10 91 61 00 14 91 41 00 18 91 01 00 1C 90 E1 00 20 4B FF FD 2D
+
+. 0 10006750 20
+. 80 01 00 44 83 C1 00 38 38 21 00 40 7C 08 03 A6 4E 80 00 20
+
+. 0 1000C60C 8
+. 2F 83 00 00 40 9E 01 EC
+
+. 0 1000C614 68
+. 81 61 00 10 3C 00 43 30 81 21 00 14 3A C0 00 00 7F 96 58 40 39 C0 00 01 91 69 00 04 81 3E 81 54 90 01 00 08 92 E1 00 0C C9 89 00 00 C9 A1 00 08 81 3E 81 58 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9C 00 DC
+
+. 0 1000C658 60
+. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 20 00 00 83 09 02 08 7D 31 4B 78 7F 1A C3 78 82 71 00 08 3A 80 00 01 7D D2 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7D 37 73 96 40 9C 00 94
+
+. 0 1000C724 12
+. 35 EF FF FF 3A 31 00 04 40 82 FF 48
+
+. 0 1000C730 16
+. 56 E0 F8 7E 80 61 00 14 7F 80 B0 40 41 9C 00 94
+
+. 0 1000C740 116
+. 80 01 00 94 81 81 00 1C 81 C1 00 20 7C 08 03 A6 81 E1 00 24 7D 80 81 20 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
+
+. 0 10001CE4 36
+. 3C 80 10 01 7C 7A 1B 78 38 84 6F 84 20 03 00 00 7C 60 19 14 7F C5 F3 78 7F 86 E3 78 4C C6 31 82 48 01 38 E5
+
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 1, stride = 1
+. 0 10001D08 24
+. 7F E3 FB 78 7F 84 E3 78 7F C5 F3 78 7F 46 D3 78 7F 07 C3 78 48 00 AB 9D
+
+. 0 1000C8B8 200
+. 94 21 FE F0 7C 08 02 A6 42 9F 00 05 D9 C1 00 80 D9 E1 00 88 DA 01 00 90 DA 21 00 98 DA 41 00 A0 DA 61 00 A8 DA 81 00 B0 DA A1 00 B8 DA C1 00 C0 DA E1 00 C8 DB 01 00 D0 DB 21 00 D8 DB 41 00 E0 DB 61 00 E8 DB 81 00 F0 DB A1 00 F8 DB C1 01 00 DB E1 01 08 91 C1 00 38 91 E1 00 3C 92 01 00 40 92 21 00 44 92 41 00 48 92 61 00 4C 92 81 00 50 92 A1 00 54 92 C1 00 58 92 E1 00 5C 93 01 00 60 93 21 00 64 93 41 00 68 93 61 00 6C 93 81 00 70 93 C1 00 78 7F C8 02 A6 90 01 01 14 81 07 00 04 80 1E FF F0 93 A1 00 74 7F C0 F2 14 7C A0 2B 79 93 E1 00 7C 90 01 00 18 90 61 00 10 90 81 00 14 91 01 00 1C 41 82 10 58
+
+. 0 1000C980 16
+. 80 01 00 18 38 60 00 00 2F 80 00 01 41 9E 05 98
+
+. 0 1000CF24 160
+. 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
+
+. 0 10001D20 8
+. 2F 9E 00 00 41 9E 00 44
+
+. 0 10001D28 64
+. 3C 00 43 30 3D 20 10 02 90 01 00 08 39 29 80 F8 93 C1 00 0C 7F C9 03 A6 C8 09 00 00 38 00 00 00 C9 A1 00 08 57 89 18 38 FD AD 00 28 7C 1F 04 AE FC 00 68 24 7C 1F 05 AE 7C 00 4A 14 42 00 FF F0
+
+. 0 10001D68 20
+. 7F 64 DB 78 7F 85 E3 78 7F C6 F3 78 7F E3 FB 78 48 01 0B 0D
+
+. 0 10001D7C 40
+. C8 37 81 10 3C A0 10 01 3C 60 10 01 7F 87 E3 78 7F C8 F3 78 7F 24 CB 78 7F 66 DB 78 38 A5 69 98 38 63 69 90 4B FF EA 79
+
+. 0 10001DA4 24
+. 3C 80 10 01 7F C5 F3 78 7F 86 E3 78 38 84 6F C0 4C C6 31 82 48 01 38 31
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 1, stride = 1
+. 0 10001DBC 8
+. 7F 03 C3 78 48 00 F0 0D
+
+. 0 10010DCC 32
+. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 00 04 48 01 81 9D
+
+. 0 10010DEC 16
+. 38 00 00 00 90 1D 00 04 7F A3 EB 78 48 01 81 8D
+
+. 0 10010DFC 24
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
+
+. 0 10001DC4 8
+. 7E C3 B3 78 48 00 EF BD
+
+. 0 10010D84 32
+. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 02 08 48 01 81 E5
+
+. 0 10010DA4 16
+. 38 00 00 00 90 1D 02 08 7F A3 EB 78 48 01 81 D5
+
+. 0 10010DB4 24
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
+
+. 0 10001DCC 8
+. 7F 43 D3 78 48 00 AA 9D
+
+. 0 1000C86C 32
+. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 02 08 48 01 C6 FD
+
+. 0 1000C88C 16
+. 38 00 00 00 90 1D 02 08 7F A3 EB 78 48 01 C6 ED
+
+. 0 1000C89C 24
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
+
+. 0 10001DD4 8
+. 7F E3 FB 78 48 02 71 AD
+
+. 0 10001DDC 8
+. 7F 63 DB 78 48 02 71 A5
+
+. 0 10001DE4 8
+. 7F 23 CB 78 48 02 71 9D
+
+. 0 10001DEC 8
+. 7F A3 EB 78 48 02 71 95
+
+. 0 10001DF4 56
+. 80 01 00 44 82 C1 00 18 82 E1 00 1C 7C 08 03 A6 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+
+. 0 10004720 16
+. 7F A3 EB 78 7F E4 FB 78 3B BD 00 01 4B FF F2 99
+
+. 0 100039C4 76
+. 94 21 FF C0 7C 08 02 A6 93 41 00 28 7F 44 19 D6 93 81 00 30 7C 7C 1B 78 90 01 00 44 93 21 00 24 57 43 10 3A 93 61 00 2C 93 A1 00 34 57 5D 18 38 93 C1 00 38 7C 9E 23 78 93 E1 00 3C 92 C1 00 18 92 E1 00 1C 93 01 00 20 48 02 55 29
+
+. 0 FEEF714 16
+. 81 5C 00 04 3B 20 00 10 7C 8A C8 40 40 A4 FF 4C
+
+. 0 10003A10 12
+. 7C 7F 1B 78 7F A3 EB 78 48 02 55 1D
+
+. 0 10003A1C 12
+. 7C 7B 1B 78 7F A3 EB 78 48 02 55 11
+
+. 0 10003A28 12
+. 7C 79 1B 78 7F A3 EB 78 48 02 55 05
+
+. 0 10003A34 16
+. 2B 9A 00 00 7C 7D 1B 78 39 40 00 00 40 9D 00 3C
+
+. 0 10003A44 56
+. 3D 60 10 02 7F 49 03 A6 39 6B 80 F8 3D 20 43 30 C9 AB 00 00 91 41 00 0C 55 40 10 3A 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 FC 00 00 18 7C 1F 05 2E 42 00 FF E0
+
+. 0 10003A7C 16
+. 57 40 08 3C 39 40 00 00 2B 80 00 00 40 9D 00 70
+
+. 0 10003A8C 108
+. 3D 60 10 02 3D 20 10 02 C9 2B 81 00 3D 60 10 02 39 6B 80 F8 C9 09 80 E8 7C 09 03 A6 3D 20 10 02 C9 6B 00 00 C9 49 81 08 3D 20 43 30 91 41 00 0C 55 40 10 3A 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 58 28 FD A0 50 2A FD 80 40 2A FC 00 48 2A FD A0 68 18 FD 80 60 18 FC 00 00 18 7D BD 05 2E 7D 9B 05 2E 7C 19 05 2E 42 00 FF C4
+
+. 0 10003AB8 64
+. 91 41 00 0C 55 40 10 3A 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 58 28 FD A0 50 2A FD 80 40 2A FC 00 48 2A FD A0 68 18 FD 80 60 18 FC 00 00 18 7D BD 05 2E 7D 9B 05 2E 7C 19 05 2E 42 00 FF C4
+
+. 0 10003AF8 8
+. 38 60 00 00 48 01 18 F9
+
+. 0 10003B00 8
+. 7F C3 F3 78 48 00 EE 29
+
+. 0 1001292C 136
+. 94 21 FF 70 7C 08 02 A6 42 9F 00 05 93 C1 00 60 7F C8 02 A6 7D 80 00 26 93 01 00 48 7C 78 1B 79 90 01 00 94 80 1E FF F0 DB 61 00 68 DB 81 00 70 7F C0 F2 14 DB A1 00 78 DB C1 00 80 DB E1 00 88 91 C1 00 20 91 E1 00 24 92 01 00 28 92 21 00 2C 92 41 00 30 92 61 00 34 92 81 00 38 92 A1 00 3C 92 C1 00 40 92 E1 00 44 93 21 00 4C 93 41 00 50 93 61 00 54 93 81 00 58 93 A1 00 5C 93 E1 00 64 91 81 00 1C 41 82 02 10
+
+. 0 100129B4 8
+. 38 60 02 0C 48 01 65 7D
+
+. 0 100129BC 12
+. 7C 69 1B 79 91 21 00 14 41 82 02 74
+
+. 0 100129C8 8
+. 2F 98 00 01 41 9E 01 E4
+
+. 0 10012BB0 16
+. 81 21 00 14 3A E0 00 00 92 E9 02 08 4B FF FE 2C
+
+. 0 100129E8 24
+. 81 21 00 14 7F 03 C3 78 38 81 00 10 93 09 00 00 38 A9 00 08 4B FF 3C 85
+
+. 0 10012A00 8
+. 2F 83 00 00 40 9E 02 04
+
+. 0 10012A08 68
+. 81 61 00 10 3C 00 43 30 81 21 00 14 3A C0 00 00 2B 8B 00 00 39 C0 00 01 91 69 00 04 81 3E 82 A0 90 01 00 08 93 01 00 0C C9 89 00 00 C9 A1 00 08 81 3E 82 A4 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9D 00 E4
+
+. 0 10012A4C 60
+. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 20 00 00 82 E9 02 08 7D 31 4B 78 7E FA BB 78 82 71 00 08 3A 80 00 01 7D C9 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7E 58 73 96 40 9C 00 9C
+
+. 0 10012B20 12
+. 35 EF FF FF 3A 31 00 04 40 82 FF 40
+
+. 0 10012B2C 16
+. 57 00 F8 7E 80 61 00 14 7F 80 B0 40 41 9C 00 A4
+
+. 0 10012B3C 116
+. 80 01 00 94 81 81 00 1C 81 C1 00 20 7C 08 03 A6 81 E1 00 24 7D 80 81 20 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
+
+. 0 10003B08 36
+. 3C 80 10 01 7F 86 E3 78 38 84 7A 78 7F C5 F3 78 7C 76 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 1A C1
+
+PASS: gsl_fft_real_wavetable_float_alloc, n = 1, stride = 1
+. 0 10003B2C 8
+. 7F C3 F3 78 48 00 F1 4D
+
+. 0 10012C7C 60
+. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 A1 00 14 7C 7D 1B 79 90 01 00 24 93 E1 00 1C 38 60 00 08 80 1E FF F0 38 A0 00 84 38 C0 00 01 7F C0 F2 14 41 82 00 5C
+
+. 0 10012CB8 4
+. 48 01 62 7D
+
+. 0 10012CBC 20
+. 38 A0 00 8C 7C 7F 1B 79 38 C0 00 08 57 A3 10 3A 41 82 00 74
+
+. 0 10012CD0 8
+. 93 BF 00 00 48 01 62 61
+
+. 0 10012CD8 24
+. 2F 83 00 00 7C 60 1B 78 90 1F 00 04 7F E3 FB 78 7F E0 FB 78 41 9E 00 68
+
+. 0 10012CF0 32
+. 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 10003B34 32
+. 3C 80 10 01 38 84 7A B0 7F C5 F3 78 7C 78 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 1A 99
+
+PASS: gsl_fft_real_workspace_float_alloc, n = 1
+. 0 10003B54 20
+. 7F 84 E3 78 7F 65 DB 78 7F A6 EB 78 7F C3 F3 78 48 00 1F D5
+
+. 0 10005B38 64
+. 94 21 FF D0 7C 08 02 A6 93 61 00 1C 7C 7B 1B 79 93 01 00 10 7C D8 33 78 93 21 00 14 7C 99 23 78 93 A1 00 24 7C BD 2B 78 93 41 00 18 93 81 00 20 93 C1 00 28 93 E1 00 2C 90 01 00 34 41 82 00 80
+
+. 0 10005B78 8
+. 2F 9B 00 00 41 9E 00 34
+
+. 0 10005B80 20
+. 3B 40 00 00 3B C0 00 00 54 9C 18 38 7F 7F DB 78 4B FF EB FD
+
+. 0 10005B94 28
+. 37 FF FF FF FC 20 08 18 7D 3E EA 14 7C 3E ED 2E 7F DE E2 14 93 49 00 04 40 82 FF E4
+
+. 0 10005BB0 20
+. 7F A3 EB 78 7F 24 CB 78 7F 65 DB 78 7F 06 C3 78 48 00 05 7D
+
+. 0 10005BC4 48
+. 80 01 00 34 83 01 00 10 83 21 00 14 7C 08 03 A6 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+. 0 10003B68 16
+. 7F 23 CB 78 7F 64 DB 78 57 45 18 38 48 02 54 01
+
+. 0 10003B78 8
+. 2F 9E 00 00 41 9E 00 24
+
+. 0 10003B80 32
+. 7F C9 03 A6 39 60 00 00 55 60 18 38 55 69 10 3A 7C 1B 04 2E 7D 6B E2 14 7C 09 FD 2E 42 00 FF EC
+
+. 0 10003BA0 28
+. 7F 07 C3 78 7F 84 E3 78 7F C5 F3 78 7E C6 B3 78 7F E3 FB 78 3E E0 10 02 48 00 F2 51
+
+. 0 10012E08 216
+. 94 21 FE E0 7C 08 02 A6 42 9F 00 05 92 21 00 54 D9 C1 00 90 39 20 00 00 D9 E1 00 98 3A 20 00 01 DA 01 00 A0 DA 21 00 A8 DA 41 00 B0 DA 61 00 B8 DA 81 00 C0 DA A1 00 C8 DA C1 00 D0 DA E1 00 D8 DB 01 00 E0 DB 21 00 E8 DB 41 00 F0 DB 61 00 F8 DB 81 01 00 DB A1 01 08 DB C1 01 10 DB E1 01 18 91 C1 00 48 91 E1 00 4C 92 01 00 50 92 41 00 58 92 61 00 5C 92 81 00 60 92 A1 00 64 92 C1 00 68 92 E1 00 6C 93 01 00 70 93 21 00 74 93 41 00 78 93 61 00 7C 93 81 00 80 93 C1 00 88 7F C8 02 A6 90 01 01 24 81 07 00 04 80 1E FF F0 93 A1 00 84 7F C0 F2 14 7C A0 2B 79 93 E1 00 8C 90 01 00 18 90 61 00 10 90 81 00 14 81 46 00 04 91 01 00 20 91 21 00 24 41 82 16 B4
+
+. 0 10012EE0 16
+. 80 01 00 18 38 60 00 00 2F 80 00 01 41 9E 09 68
+
+. 0 10013854 160
+. 80 01 01 24 81 C1 00 48 81 E1 00 4C 7C 08 03 A6 82 01 00 50 82 21 00 54 82 41 00 58 82 61 00 5C 82 81 00 60 82 A1 00 64 82 C1 00 68 82 E1 00 6C 83 01 00 70 83 21 00 74 83 41 00 78 83 61 00 7C 83 81 00 80 83 A1 00 84 83 C1 00 88 83 E1 00 8C C9 C1 00 90 C9 E1 00 98 CA 01 00 A0 CA 21 00 A8 CA 41 00 B0 CA 61 00 B8 CA 81 00 C0 CA A1 00 C8 CA C1 00 D0 CA E1 00 D8 CB 01 00 E0 CB 21 00 E8 CB 41 00 F0 CB 61 00 F8 CB 81 01 00 CB A1 01 08 CB C1 01 10 CB E1 01 18 38 21 01 20 4E 80 00 20
+
+. 0 10003BBC 20
+. 7F 64 DB 78 7F 85 E3 78 7F C6 F3 78 7F E3 FB 78 48 00 CB 15
+
+. 0 100106E0 56
+. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 2C 06 00 00 90 01 00 24 93 E1 00 1C 7C 7F 1B 78 80 1E FF F0 7C A3 2B 78 93 A1 00 14 7F C0 F2 14 41 82 00 D4
+
+. 0 10010718 40
+. 39 26 FF FF 83 BE 82 38 2B 89 00 01 C0 1F 00 00 C1 BD 00 00 38 A0 00 01 D0 04 00 00 7D 28 4B 78 D1 A4 00 04 40 9D 00 58
+
+. 0 10010794 8
+. 7F 88 28 00 41 9E 00 24
+
+. 0 1001079C 32
+. 80 01 00 24 38 60 00 00 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 10003BD0 40
+. C8 37 81 10 3C A0 10 01 3C 60 10 01 7F 87 E3 78 7F C8 F3 78 38 A5 69 3C 7F A4 EB 78 7F 66 DB 78 38 63 69 4C 4B FF EB 11
+
+. 0 10003BF8 24
+. 3C 80 10 01 38 84 7A DC 7F C5 F3 78 7F 86 E3 78 4C C6 31 82 48 01 19 DD
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 1, stride = 1
+. 0 10003C10 8
+. 7F C3 F3 78 48 00 AA ED
+
+. 0 1000E700 136
+. 94 21 FF 70 7C 08 02 A6 42 9F 00 05 93 C1 00 60 7F C8 02 A6 7D 80 00 26 92 E1 00 44 7C 77 1B 79 90 01 00 94 80 1E FF F0 DB 61 00 68 DB 81 00 70 7F C0 F2 14 DB A1 00 78 DB C1 00 80 DB E1 00 88 91 C1 00 20 91 E1 00 24 92 01 00 28 92 21 00 2C 92 41 00 30 92 61 00 34 92 81 00 38 92 A1 00 3C 92 C1 00 40 93 01 00 48 93 21 00 4C 93 41 00 50 93 61 00 54 93 81 00 58 93 A1 00 5C 93 E1 00 64 91 81 00 1C 41 82 01 F8
+
+. 0 1000E788 8
+. 38 60 02 0C 48 01 A7 A9
+
+. 0 1000E790 12
+. 7C 69 1B 79 91 21 00 14 41 82 02 5C
+
+. 0 1000E79C 8
+. 56 E3 18 38 48 01 A7 95
+
+. 0 1000E7A4 16
+. 81 21 00 14 2F 83 00 00 90 69 02 08 41 9E 02 60
+
+. 0 1000E7B4 24
+. 81 21 00 14 7E E3 BB 78 38 81 00 10 92 E9 00 00 38 A9 00 08 4B FF 7F 2D
+
+. 0 1000E7CC 8
+. 2F 83 00 00 40 9E 01 F4
+
+. 0 1000E7D4 68
+. 81 61 00 10 3C 00 43 30 81 21 00 14 3A C0 00 00 7F 96 58 40 39 C0 00 01 91 69 00 04 81 3E 81 D0 90 01 00 08 92 E1 00 0C C9 89 00 00 C9 A1 00 08 81 3E 81 D4 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9C 00 E4
+
+. 0 1000E818 60
+. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 20 00 00 83 09 02 08 7D 31 4B 78 7F 1A C3 78 82 71 00 08 3A 80 00 01 7D D2 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7D 37 73 96 40 9C 00 9C
+
+. 0 1000E8EC 12
+. 35 EF FF FF 3A 31 00 04 40 82 FF 40
+
+. 0 1000E8F8 16
+. 56 E0 F8 7E 80 61 00 14 7F 80 B0 40 41 9C 00 94
+
+. 0 1000E908 116
+. 80 01 00 94 81 81 00 1C 81 C1 00 20 7C 08 03 A6 81 E1 00 24 7D 80 81 20 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
+
+. 0 10003C18 36
+. 3C 80 10 01 7C 7A 1B 78 38 84 7B 1C 20 03 00 00 7C 60 19 14 7F C5 F3 78 7F 86 E3 78 4C C6 31 82 48 01 19 B1
+
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 1, stride = 1
+. 0 10003C3C 24
+. 7F E3 FB 78 7F 84 E3 78 7F C5 F3 78 7F 46 D3 78 7F 07 C3 78 48 00 AE 31
+
+. 0 1000EA80 200
+. 94 21 FE F0 7C 08 02 A6 42 9F 00 05 D9 C1 00 80 D9 E1 00 88 DA 01 00 90 DA 21 00 98 DA 41 00 A0 DA 61 00 A8 DA 81 00 B0 DA A1 00 B8 DA C1 00 C0 DA E1 00 C8 DB 01 00 D0 DB 21 00 D8 DB 41 00 E0 DB 61 00 E8 DB 81 00 F0 DB A1 00 F8 DB C1 01 00 DB E1 01 08 91 C1 00 38 91 E1 00 3C 92 01 00 40 92 21 00 44 92 41 00 48 92 61 00 4C 92 81 00 50 92 A1 00 54 92 C1 00 58 92 E1 00 5C 93 01 00 60 93 21 00 64 93 41 00 68 93 61 00 6C 93 81 00 70 93 C1 00 78 7F C8 02 A6 90 01 01 14 81 07 00 04 80 1E FF F0 93 A1 00 74 7F C0 F2 14 7C A0 2B 79 93 E1 00 7C 90 01 00 18 90 61 00 10 90 81 00 14 91 01 00 1C 41 82 10 7C
+
+. 0 1000EB48 16
+. 80 01 00 18 38 60 00 00 2F 80 00 01 41 9E 05 9C
+
+. 0 1000F0F0 160
+. 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
+
+. 0 10003C54 8
+. 2F 9E 00 00 41 9E 00 48
+
+. 0 10003C5C 68
+. 3C 00 43 30 3D 20 10 02 90 01 00 08 39 29 80 F8 93 C1 00 0C 7F C9 03 A6 C8 09 00 00 38 00 00 00 C9 A1 00 08 57 89 10 3A FD AD 00 28 FD A0 68 18 7C 1F 04 2E EC 00 68 24 7C 1F 05 2E 7C 00 4A 14 42 00 FF F0
+
+. 0 10003CA0 20
+. 7F 64 DB 78 7F 85 E3 78 7F C6 F3 78 7F E3 FB 78 48 01 0C 41
+
+. 0 100148F0 40
+. 7C 08 02 A6 94 21 FF F0 42 9F 00 05 93 C1 00 08 7F C8 02 A6 2C 06 00 00 90 01 00 14 80 1E FF F0 7F C0 F2 14 41 82 00 54
+
+. 0 10014918 8
+. 2F 86 00 00 41 9E 00 34
+
+. 0 10014920 48
+. 81 3E 82 F0 7C C9 03 A6 39 40 00 00 C1 A9 00 00 55 40 10 3A 55 49 18 38 7C 03 04 2E 7D 69 22 14 7D 4A 2A 14 7C 09 25 2E D1 AB 00 04 42 00 FF E4
+
+. 0 10014950 24
+. 80 01 00 14 38 60 00 00 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 10003CB4 40
+. C8 37 81 10 3C A0 10 01 3C 60 10 01 7F 87 E3 78 7F C8 F3 78 7F 24 CB 78 7F 66 DB 78 38 A5 69 98 38 63 69 90 4B FF EA 2D
+
+. 0 10003CDC 24
+. 3C 80 10 01 7F C5 F3 78 7F 86 E3 78 38 84 7B 5C 4C C6 31 82 48 01 18 F9
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 1, stride = 1
+. 0 10003CF4 8
+. 7F 03 C3 78 48 00 F0 C5
+
+. 0 10012DBC 32
+. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 00 04 48 01 61 AD
+
+. 0 10012DDC 16
+. 38 00 00 00 90 1D 00 04 7F A3 EB 78 48 01 61 9D
+
+. 0 10012DEC 24
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
+
+. 0 10003CFC 8
+. 7E C3 B3 78 48 00 F0 75
+
+. 0 10012D74 32
+. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 02 08 48 01 61 F5
+
+. 0 10012D94 16
+. 38 00 00 00 90 1D 02 08 7F A3 EB 78 48 01 61 E5
+
+. 0 10012DA4 24
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
+
+. 0 10003D04 8
+. 7F 43 D3 78 48 00 AD 2D
+
+. 0 1000EA34 32
+. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 02 08 48 01 A5 35
+
+. 0 1000EA54 16
+. 38 00 00 00 90 1D 02 08 7F A3 EB 78 48 01 A5 25
+
+. 0 1000EA64 24
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
+
+. 0 10003D0C 8
+. 7F E3 FB 78 48 02 52 75
+
+. 0 10003D14 8
+. 7F 63 DB 78 48 02 52 6D
+
+. 0 10003D1C 8
+. 7F 23 CB 78 48 02 52 65
+
+. 0 10003D24 8
+. 7F A3 EB 78 48 02 52 5D
+
+. 0 10003D2C 56
+. 80 01 00 44 82 C1 00 18 82 E1 00 1C 7C 08 03 A6 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+
+. 0 10004730 8
+. 2B 9D 00 03 40 9D FF C8
+
+. 0 100046FC 12
+. 7F A3 EB 78 7F E4 FB 78 4B FF C5 E1
+
+PASS: gsl_fft_complex_wavetable_alloc, n = 1, stride = 2
+. 0 FEEF74C 40
+. 82 FE 05 FC 7E 83 CA 14 82 D4 00 04 7E 1C B8 00 82 63 00 0C 62 D5 00 01 92 B4 00 04 91 53 00 08 92 6A 00 0C 41 92 00 10
+
+. 0 FEEF780 8
+. 39 03 00 08 4B FF FF 2C
+
+PASS: gsl_fft_complex_workspace_alloc, n = 1
+PASS: gsl_fft_complex_forward with signal_noise, n = 1, stride = 2
+. 0 100012C8 20
+. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F9 59
+
+. 0 100012DC 24
+. 3C 80 10 01 38 84 6B B8 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 42 F9
+
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 1, stride = 2
+. 0 100012F4 4
+. 4B FF FC 30
+
+PASS: gsl_fft_complex_inverse with signal_noise, n = 1, stride = 2
+. 0 10001298 20
+. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F9 89
+
+. 0 100012AC 24
+. 3C 80 10 01 38 84 6B 74 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 43 29
+
+PASS: gsl_fft_complex_inverse other data untouched, n = 1, stride = 2
+. 0 100012C4 4
+. 4B FF FC BC
+
+PASS: gsl_fft_complex_backward with signal_noise, n = 1, stride = 2
+. 0 10001268 20
+. 7F 44 D3 78 7F C5 F3 78 38 C0 0B B8 7E E3 BB 78 4B FF F9 B9
+
+. 0 1000127C 24
+. 3C 80 10 01 38 84 6B 30 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 43 59
+
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 1, stride = 2
+. 0 10001294 4
+. 4B FF FD A4
+
+PASS: gsl_fft_complex_forward with signal_pulse, n = 1, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 1, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 1, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 1, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 1
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 1, stride = 2
+. 0 100031D4 20
+. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F9 3D
+
+. 0 10002B20 20
+. 39 40 00 00 94 21 FF F0 7F 8A 28 40 39 60 00 00 40 9C 00 A0
+
+. 0 10002B34 16
+. 7C A7 2B 78 2B 84 00 01 39 6B 00 02 40 9D 00 88
+
+. 0 10002B44 132
+. 3D 20 10 02 38 04 FF FF 39 29 80 F8 7C 09 03 A6 C9 49 00 00 3D 00 43 30 55 69 10 3A 7C 0B 32 14 39 6B 00 01 90 01 00 0C 91 01 00 08 7C 0B 32 14 C9 A1 00 08 90 01 00 0C 55 60 10 3A C8 01 00 08 FD AD 50 28 7D 69 1C 2E 39 6B 00 01 FC 00 50 28 7D 83 04 2E FD A0 68 18 FC 00 00 18 FF 8B 68 00 FF 0C 00 00 4F DE F0 42 4F 5A D0 42 7D 20 00 26 55 20 FF FE 55 29 DF FE 7D 4A 03 78 7D 4A 4B 78 42 00 FF 98
+
+. 0 10002BC8 8
+. 34 E7 FF FF 40 82 FF 6C
+
+. 0 10002BD0 12
+. 7D 43 53 78 38 21 00 10 4E 80 00 20
+
+. 0 100031E8 24
+. 3C 80 10 01 38 84 77 68 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 23 ED
+
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 1, stride = 2
+. 0 10003200 4
+. 4B FF FC 2C
+
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 1, stride = 2
+. 0 100031A4 20
+. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F9 6D
+
+. 0 100031B8 24
+. 3C 80 10 01 38 84 77 20 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 24 1D
+
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 1, stride = 2
+. 0 100031D0 4
+. 4B FF FC B8
+
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 1, stride = 2
+. 0 10003174 20
+. 7F 44 D3 78 7F C5 F3 78 38 C0 0B B8 7E E3 BB 78 4B FF F9 9D
+
+. 0 10003188 24
+. 3C 80 10 01 38 84 76 D4 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 24 4D
+
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 1, stride = 2
+. 0 100031A0 4
+. 4B FF FD A4
+
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 1, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 1, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 1, stride = 2
+. 0 10001B34 32
+. 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 7C 1F 05 AE 42 00 FF E4
+
+PASS: gsl_fft_real_wavetable_alloc, n = 1, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 1
+PASS: gsl_fft_real with signal_real_noise, n = 1, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 1, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 1, stride = 2
+. 0 10003A58 36
+. 91 41 00 0C 55 40 10 3A 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 FC 00 00 18 7C 1F 05 2E 42 00 FF E0
+
+PASS: gsl_fft_real_wavetable_float_alloc, n = 1, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 1
+PASS: gsl_fft_real_float with signal_real_noise, n = 1, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 1, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 1, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 1, stride = 3
+. 0 FEEFC34 20
+. 7F 4A 02 14 81 DA 00 04 61 C7 00 01 90 FA 00 04 41 9A 00 10
+
+. 0 FEEFC54 8
+. 39 0A 00 08 4B FF FA 58
+
+PASS: gsl_fft_complex_workspace_alloc, n = 1
+PASS: gsl_fft_complex_forward with signal_noise, n = 1, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 1, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 1, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 1, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 1, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 1, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 1, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 1, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 1, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 1, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 1
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 1, stride = 3
+. 0 10002B5C 108
+. 55 69 10 3A 7C 0B 32 14 39 6B 00 01 90 01 00 0C 91 01 00 08 7C 0B 32 14 C9 A1 00 08 90 01 00 0C 55 60 10 3A C8 01 00 08 FD AD 50 28 7D 69 1C 2E 39 6B 00 01 FC 00 50 28 7D 83 04 2E FD A0 68 18 FC 00 00 18 FF 8B 68 00 FF 0C 00 00 4F DE F0 42 4F 5A D0 42 7D 20 00 26 55 20 FF FE 55 29 DF FE 7D 4A 03 78 7D 4A 4B 78 42 00 FF 98
+
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 1, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 1, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 1, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 1, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 1, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 1, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 1, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 1, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 1, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 1
+PASS: gsl_fft_real with signal_real_noise, n = 1, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 1, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 1, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 1, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 1
+PASS: gsl_fft_real_float with signal_real_noise, n = 1, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 1, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 1, stride = 3
+. 0 10004738 12
+. 3B FF 00 01 7F 9F F0 40 40 9D FF B8
+
+. 0 100064BC 36
+. 81 24 00 00 68 6B 00 01 30 09 FF FF 7D 40 49 10 31 2B FF FF 7C 09 59 10 7D 49 00 39 7D 6A 5B 78 41 82 00 5C
+
+. 0 100064E0 16
+. 39 80 00 00 7D 6C 20 2E 7D 28 5B 96 48 00 00 18
+
+. 0 10006504 12
+. 7C 09 59 D6 7F 88 00 00 41 9E FF E4
+
+. 0 10006510 40
+. 38 A5 00 01 69 0A 00 01 54 AC 10 3A 7D 2C 20 2E 30 09 FF FF 7D 60 49 10 31 2A FF FF 7C 09 51 10 7D 69 00 39 40 82 FF B0
+
+. 0 100064E4 12
+. 7D 6C 20 2E 7D 28 5B 96 48 00 00 18
+
+. 0 100064F0 32
+. 7D 28 4B 78 7D 29 5B 96 54 E0 10 3A 7D 66 01 2E 38 E7 00 01 7C 09 59 D6 7F 88 00 00 41 9E FF E4
+
+. 0 10006538 20
+. 31 2A FF FF 7C 09 51 10 39 60 00 02 7C 0A 40 79 48 00 00 24
+
+. 0 1000656C 8
+. 55 00 F8 7E 40 82 FF DC
+
+. 0 10006574 12
+. 2F 88 00 01 39 60 00 03 40 BE 00 0C
+
+. 0 10006580 4
+. 48 00 00 30
+
+. 0 100065B0 16
+. 38 A0 00 00 39 60 00 01 7F 85 38 40 40 9C 00 1C
+
+. 0 100065C0 24
+. 7C E9 03 A6 54 A0 10 3A 38 A5 00 01 7D 26 00 2E 7D 6B 49 D6 42 00 FF F0
+
+. 0 100065D8 8
+. 7F 8B 18 00 40 9E 00 84
+
+. 0 100065E0 36
+. 38 00 00 00 90 FF 00 00 7C 03 03 78 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+
+. 0 1000698C 24
+. FF 80 D8 90 7E 39 8B 78 3B 80 00 01 3B E0 00 00 7F 9C B0 40 41 9D 00 64
+
+. 0 100069A4 68
+. 3E 80 43 30 FF C0 E0 90 7F FF CA 14 92 81 00 08 7C 1F BB 96 3B 9C 00 01 7F BA C2 14 3A B5 00 01 3B 7B 00 10 7C 00 B9 D6 7F E0 F8 50 93 E1 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 02 25 11
+
+. 0 100069E8 16
+. 7C 3A C5 AE FC 20 F8 90 3B 5A 00 10 48 02 25 A1
+
+. 0 100069F8 12
+. 7F 9C B0 40 D8 3D 00 08 40 9D FF AC
+
+. 0 10006A04 16
+. 3A 73 00 01 7F 39 8A 14 7F 93 90 40 41 9C FF 84
+
+PASS: gsl_fft_complex_wavetable_alloc, n = 2, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 2
+. 0 10000E68 32
+. 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 CA 14 7C 19 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
+
+. 0 10006ED0 16
+. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 1E B8
+
+. 0 10006EE0 16
+. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 1E C4
+
+. 0 10006EF0 12
+. 80 01 00 28 7F 80 50 40 40 9C 06 A8
+
+. 0 10006EFC 96
+. 80 E1 00 1C 38 C6 01 08 81 01 00 18 81 21 00 18 2E 07 FF FF 91 41 00 20 55 08 F8 7E 55 29 F0 BE 7D 47 00 D0 4D 90 00 00 90 C1 01 88 91 01 01 80 91 21 01 84 91 41 01 8C 81 61 01 88 80 01 00 24 82 EB FF 00 81 81 00 28 7C 00 B9 D6 80 C1 00 18 2F 8C 00 00 90 01 00 24 7D E6 03 96 40 9E 06 F4
+
+. 0 10006F5C 28
+. 2F 97 00 02 3B 00 00 01 83 E1 00 10 83 21 00 14 83 41 00 2C 93 01 00 28 41 9E 06 F8
+
+. 0 1000766C 36
+. 3B 60 00 00 81 01 01 88 7F 9B 78 40 81 21 00 24 82 68 00 00 38 A0 00 00 38 E0 00 00 55 26 F8 7E 40 BC FE EC
+
+. 0 10007690 32
+. 81 41 00 1C 7E 7C 9B 78 82 DE 80 40 38 80 00 00 2F 0A FF FF 82 FE 80 44 2F 9B 00 00 40 9E 00 CC
+
+. 0 100076B0 16
+. C8 B6 00 00 C8 D7 00 00 2F 86 00 00 41 9E 00 A0
+
+. 0 100076C0 156
+. 7C 07 C1 D6 7C C9 03 A6 54 88 20 36 57 3D 20 36 57 03 20 36 54 0A 20 36 81 61 01 80 7D 28 FA 14 C9 29 00 08 7C 84 CA 14 7C 05 5A 14 7D 88 FC AE 7C 00 C9 D6 7D 6A D2 14 38 A5 00 01 7D 08 EA 14 54 00 20 36 7D 20 FA 14 7D 1F 04 AE C8 E9 00 08 7C 07 32 14 FC 0C 40 28 7C 00 C1 D6 FD A9 38 28 38 E7 00 01 FD 8C 40 2A FD 66 00 32 54 00 20 36 FD 46 03 72 7D 20 D2 14 7D 8A D5 AE 7D 4A 1A 14 FD A5 5B 7A FC 05 50 38 FD 29 38 2A D9 2B 00 08 7C 1A 05 AE D9 A9 00 08 42 00 FF 80
+
+. 0 1000775C 20
+. 3B 7B 00 01 7C E7 32 14 7F 9B 78 40 3B 9C 00 10 40 BC FE 0C
+
+. 0 10007578 28
+. 80 C1 01 88 80 01 00 20 38 C6 00 04 90 C1 01 88 34 C0 FF FF 90 C1 00 20 40 82 F9 A4
+
+. 0 10007594 12
+. 80 E1 00 28 2F 87 00 01 41 9E 0A 48
+
+. 0 10007FE4 20
+. 81 21 00 18 39 00 00 00 91 01 00 20 7F 88 48 40 40 BC F5 AC
+
+. 0 10007FF8 76
+. 81 41 00 14 7D 29 03 A6 38 00 00 00 55 44 20 36 81 61 00 20 81 81 00 2C 55 69 20 36 80 C1 00 10 7C 09 64 AE 7D 29 62 14 80 E1 00 20 7D 60 32 14 7C 06 05 AE 7C 00 22 14 C9 A9 00 08 38 E7 00 01 90 E1 00 20 D9 AB 00 08 42 00 FF C8
+
+. 0 10008008 60
+. 81 61 00 20 81 81 00 2C 55 69 20 36 80 C1 00 10 7C 09 64 AE 7D 29 62 14 80 E1 00 20 7D 60 32 14 7C 06 05 AE 7C 00 22 14 C9 A9 00 08 38 E7 00 01 90 E1 00 20 D9 AB 00 08 42 00 FF C8
+
+. 0 10008044 8
+. 38 60 00 00 4B FF F5 5C
+
+. 0 10000EB4 32
+. 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 BA 14 7C 17 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 2, stride = 1
+. 0 10008E54 36
+. 7C 1F 04 AE 7D 20 FA 14 FC 00 03 32 7C 1F 05 AE 7C 00 22 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
+
+PASS: gsl_fft_complex_inverse with signal_noise, n = 2, stride = 1
+. 0 10000FCC 36
+. 7C 19 04 AE 7D 20 CA 14 FC 00 03 32 7C 19 05 AE 7C 00 5A 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
+
+PASS: gsl_fft_complex_backward with signal_noise, n = 2, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 2, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 2, stride = 1
+. 0 10001154 48
+. 3D 20 10 02 3D 60 10 02 39 29 81 18 39 6B 80 F0 C8 29 00 00 7F E3 FB 78 C8 4B 00 00 7F C4 F3 78 7F 45 D3 78 7F 66 DB 78 7F 07 C3 78 48 00 39 31
+
+PASS: gsl_fft_complex_forward with signal_exp, n = 2, stride = 1
+. 0 100097B4 24
+. FF 80 D8 90 7E 39 8B 78 3B 80 00 01 3B E0 00 00 7F 9C B0 40 41 9D 00 6C
+
+. 0 100097CC 68
+. 3E 80 43 30 FF C0 E0 90 7F FF CA 14 92 81 00 08 7C 1F BB 96 3B 9C 00 01 7F BA C2 14 3A B5 00 01 3B 7B 00 08 7C 00 B9 D6 7F E0 F8 50 93 E1 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 F6 E9
+
+. 0 10009810 20
+. FC 00 08 18 FC 20 F8 90 7C 1A C5 2E 3B 5A 00 08 48 01 F7 75
+
+. 0 10009824 16
+. 7F 9C B0 40 FC 20 08 18 D0 3D 00 04 40 9D FF A4
+
+. 0 10009834 16
+. 3A 73 00 01 7F 39 8A 14 7F 93 90 40 41 9C FF 7C
+
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 2, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 2
+. 0 10005A7C 4
+. 4B FF ED 11
+
+. 0 10006050 28
+. 93 A1 00 14 92 E1 00 10 CB E1 00 10 FF FF D8 28 FF FF 06 B2 FC 20 F8 90 48 02 2E 8D
+
+. 0 1000602C 20
+. 2F 9B 00 00 C3 93 00 00 3B A0 00 00 FF A0 E0 90 41 9E 00 80
+
+. 0 10002D70 32
+. 7D 20 DA 14 7C 1B 04 2E C1 A9 00 04 7D 20 CA 14 7C 19 05 2E 7C 00 5A 14 D1 A9 00 04 42 00 FF E4
+
+. 0 10009D00 16
+. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 1F 44
+
+. 0 10009D10 16
+. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 1F 50
+
+. 0 10009D20 12
+. 80 01 00 28 7F 80 50 40 40 9C 06 98
+
+. 0 10009D2C 88
+. 80 E1 00 1C 38 C6 01 08 81 01 00 18 81 21 00 18 2E 07 FF FF 55 08 F8 7E 90 C1 01 44 55 29 F0 BE 4D 90 00 00 91 41 00 20 91 01 01 3C 91 21 01 40 81 41 01 44 81 81 00 24 82 EA FF 00 81 61 00 28 7D 8C B9 D6 80 01 00 18 2F 8B 00 00 91 81 00 24 7D E0 63 96 40 9E 06 EC
+
+. 0 10009D84 28
+. 2F 97 00 02 3B 00 00 01 83 E1 00 10 83 21 00 14 83 41 00 2C 93 01 00 28 41 9E 06 F0
+
+. 0 1000A48C 36
+. 3B 60 00 00 81 01 01 44 7F 9B 78 40 81 21 00 24 82 88 00 00 38 A0 00 00 38 E0 00 00 55 26 F8 7E 40 BC FE EC
+
+. 0 1000A4B0 32
+. 81 41 00 1C 7E 9C A3 78 82 FE 80 CC 38 80 00 00 2F 0A FF FF 82 DE 80 D0 2F 9B 00 00 40 9E 00 CC
+
+. 0 1000A4D0 16
+. C0 B7 00 00 C0 D6 00 00 2F 86 00 00 41 9E 00 A0
+
+. 0 1000A4E0 156
+. 7C 07 C1 D6 7C C9 03 A6 54 88 18 38 57 3D 18 38 57 03 18 38 54 0A 18 38 81 61 01 3C 7D 28 FA 14 C1 29 00 04 7C 84 CA 14 7C 05 5A 14 7D 48 FC 2E 7C 00 C9 D6 38 A5 00 01 7D 08 EA 14 54 00 18 38 7D 20 FA 14 7D 1F 04 2E C0 E9 00 04 7C 07 32 14 EC 0A 40 28 7C 00 C1 D6 ED A9 38 28 7D 2A D2 14 ED 4A 40 2A 38 E7 00 01 ED 86 00 32 ED 66 03 72 54 00 18 38 ED 29 38 2A 7D 60 D2 14 ED A5 63 7A 7D 4A D5 2E EC 05 58 38 7D 4A 1A 14 D1 29 00 04 7C 1A 05 2E D1 AB 00 04 42 00 FF 80
+
+. 0 1000A57C 20
+. 3B 7B 00 01 7C E7 32 14 7F 9B 78 40 3B 9C 00 08 40 BC FE 0C
+
+. 0 1000A398 28
+. 80 E1 01 44 80 01 00 20 38 E7 00 04 90 E1 01 44 34 E0 FF FF 90 E1 00 20 40 82 F9 AC
+
+. 0 1000A3B4 12
+. 81 01 00 28 2F 88 00 01 41 9E 0A AC
+
+. 0 1000AE68 20
+. 81 41 00 18 39 20 00 00 91 21 00 20 7F 89 50 40 40 BC F5 48
+
+. 0 1000AE7C 72
+. 81 61 00 14 7D 49 03 A6 38 00 00 00 55 64 18 38 81 81 00 20 80 E1 00 2C 55 89 18 38 81 01 00 10 7C 09 3C 2E 7D 29 3A 14 7D 60 42 14 39 8C 00 01 7C 08 05 2E 7C 00 22 14 C1 A9 00 04 91 81 00 20 D1 AB 00 04 42 00 FF CC
+
+. 0 1000AE8C 56
+. 81 81 00 20 80 E1 00 2C 55 89 18 38 81 01 00 10 7C 09 3C 2E 7D 29 3A 14 7D 60 42 14 39 8C 00 01 7C 08 05 2E 7C 00 22 14 C1 A9 00 04 91 81 00 20 D1 AB 00 04 42 00 FF CC
+
+. 0 1000AEC4 8
+. 38 60 00 00 4B FF F4 FC
+
+. 0 10002DBC 32
+. 7D 20 DA 14 7C 1B 04 2E C1 A9 00 04 7D 20 BA 14 7C 17 05 2E 7C 00 5A 14 D1 A9 00 04 42 00 FF E4
+
+. 0 10002798 60
+. 7D 20 FA 14 7D 60 F2 14 7C 1F 04 2E 7D 9E 04 2E 7C 00 52 14 C1 A9 00 04 C1 6B 00 04 EC 00 60 28 ED AD 58 28 FC 00 02 10 FD A0 6A 10 FC 00 68 2A FF E0 02 B2 FF 9F 08 00 40 9D 00 08
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 2, stride = 1
+. 0 1000BD14 36
+. 7C 1F 04 2E 7D 20 FA 14 EC 00 03 32 7C 1F 05 2E 7C 00 22 14 C1 A9 00 04 ED AD 03 32 D1 A9 00 04 42 00 FF E0
+
+. 0 100027D4 8
+. FC 20 F8 90 42 00 FF C0
+
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 2, stride = 1
+. 0 10002ED8 36
+. 7C 19 04 2E 7D 20 CA 14 EC 00 03 32 7C 19 05 2E 7C 00 5A 14 C1 A9 00 04 ED AD 03 32 D1 A9 00 04 42 00 FF E0
+
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 2, stride = 1
+. 0 100052A8 20
+. 7D 20 32 14 7D 46 01 2E 91 49 00 04 7C 00 5A 14 42 00 FF F0
+
+. 0 1000531C 48
+. 7C 1D F3 96 93 01 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD DA 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF D8 24 FC 20 F8 90 48 02 3B AD
+
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 2, stride = 1
+. 0 10005420 20
+. 7D 20 2A 14 7C 25 05 2E D0 49 00 04 7C 00 5A 14 42 00 FF F0
+
+. 0 1000544C 20
+. 7D 20 32 14 7D 66 01 2E 91 69 00 04 7C 00 22 14 42 00 FF F0
+
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 2, stride = 1
+. 0 10005588 48
+. 7C 1D F3 96 92 C1 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD D2 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF E8 24 FC 20 F8 90 48 02 39 41
+
+. 0 10005608 20
+. 7D 20 DA 14 7D 5B 01 2E 91 49 00 04 7C 00 5A 14 42 00 FF F0
+
+. 0 10003060 48
+. 3D 20 10 02 3D 60 10 02 39 29 81 2C 39 6B 81 28 C0 29 00 00 7F E3 FB 78 C0 4B 00 00 7F C4 F3 78 7F 45 D3 78 7F 66 DB 78 7F 07 C3 78 48 00 24 4D
+
+. 0 10005624 164
+. 7C 1A F3 96 7C 00 F1 D6 7C 60 D0 50 3C 00 43 30 3D 20 10 02 90 01 00 10 39 29 80 F8 93 C1 00 14 7C 17 19 D6 C9 A9 00 00 38 60 00 00 C8 01 00 10 FC 00 68 28 54 00 18 38 7D 20 DA 14 FC 00 00 18 ED A0 07 32 EC 00 06 F2 7C 1B 05 2E D1 A9 00 04 80 01 00 84 82 C1 00 20 82 E1 00 24 7C 08 03 A6 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB 21 00 48 CB 41 00 50 CB 61 00 58 CB 81 00 60 CB A1 00 68 CB C1 00 70 CB E1 00 78 38 21 00 80 4E 80 00 20
+
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 2, stride = 1
+. 0 100109E8 8
+. 57 03 18 36 48 01 85 49
+
+. 0 100109F0 16
+. 81 21 00 14 2F 83 00 00 90 69 02 08 41 9E 02 68
+
+. 0 10010AA0 32
+. 38 09 00 01 FF 80 D8 90 54 00 F8 7E 7E 5B 93 78 2A 00 00 01 7C 10 03 78 3B 80 00 00 40 91 00 64
+
+. 0 10010B20 16
+. 3A 94 00 01 7F 7B 92 14 7F 94 98 40 41 9C FF 8C
+
+PASS: gsl_fft_real_wavetable_alloc, n = 2, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 2
+. 0 10001C54 24
+. 55 60 20 36 55 69 18 38 7C 1B 04 AE 7D 6B E2 14 7C 09 FD AE 42 00 FF EC
+
+. 0 10010F00 16
+. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 16 3C
+
+. 0 10010F10 16
+. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 16 48
+
+. 0 10010F20 12
+. 80 01 00 24 7F 80 50 40 40 9C 08 FC
+
+. 0 10010F2C 68
+. 80 E1 00 18 38 C6 01 08 81 01 00 18 54 E7 F8 7E 90 C1 00 30 91 41 00 1C 55 0E F0 BE 90 E1 00 2C 81 21 00 24 81 41 00 30 2F 89 00 00 39 31 00 01 83 6A FF 00 55 29 F8 7E 38 09 FF FF 7E 31 D9 D6 40 9E 09 9C
+
+. 0 10010F70 28
+. 2F 9B 00 02 3B 00 00 01 83 E1 00 10 83 A1 00 14 83 21 00 20 93 01 00 24 41 9E 09 A0
+
+. 0 10011928 28
+. 81 81 00 18 56 25 F8 7E 80 E1 00 30 7F 4C 8B 96 83 87 00 00 2F 9A 00 00 41 9E 00 64
+
+. 0 10011944 96
+. 7F 49 03 A6 39 51 FF FF 38 E0 00 00 39 00 00 00 81 21 00 2C 7D 78 39 D6 7C E7 8A 14 7C 08 4A 14 7C 1D 01 D6 55 6B 18 38 7D 3D 41 D6 54 00 18 38 7D BF 04 AE 7D 08 2A 14 55 29 18 38 7C 18 51 D6 7C 09 FC AE 7D 4A 8A 14 FD 80 68 28 FC 00 68 2A 54 00 18 38 7C 0B CD AE 7D 99 05 AE 42 00 FF B4
+
+. 0 100119A4 8
+. 2F 85 00 01 41 BE FE 0C
+
+. 0 100117B4 28
+. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F7 80
+
+. 0 100117D0 12
+. 81 01 00 24 2F 88 00 01 40 BE 00 4C
+
+. 0 100117DC 20
+. 81 41 00 18 39 20 00 00 91 21 00 1C 7F 89 50 40 40 9C 00 38
+
+. 0 100117F0 52
+. 81 61 00 14 7D 49 03 A6 80 61 00 10 55 64 18 38 81 81 00 1C 80 E1 00 20 55 80 18 38 39 8C 00 01 7C 07 04 AE 91 81 00 1C D8 03 00 00 7C 63 22 14 42 00 FF E0
+
+. 0 10011800 36
+. 81 81 00 1C 80 E1 00 20 55 80 18 38 39 8C 00 01 7C 07 04 AE 91 81 00 1C D8 03 00 00 7C 63 22 14 42 00 FF E0
+
+. 0 10011824 164
+. 38 60 00 00 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
+
+. 0 1000E578 44
+. 54 C9 18 38 7C 03 29 D6 39 29 FF F8 C9 BD 00 00 7D 29 19 D6 54 00 20 36 7C 09 FC AE 7D 20 22 14 7C 04 05 AE D9 A9 00 08 4B FF FF B8
+
+PASS: gsl_fft_real with signal_real_noise, n = 2, stride = 1
+. 0 1000C694 32
+. 38 09 00 01 FF 80 D8 90 54 00 F8 7E 7E 5B 93 78 2A 00 00 01 7C 10 03 78 3B 80 00 00 40 91 00 64
+
+. 0 1000C714 16
+. 3A 94 00 01 7F 7B 92 14 7F 94 98 40 41 9C FF 8C
+
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 2, stride = 1
+. 0 1000C990 16
+. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 15 FC
+
+. 0 1000C9A0 16
+. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 15 D0
+
+. 0 1000C9B0 28
+. 80 06 00 04 38 E0 00 00 39 00 00 01 90 E1 00 28 7F 87 00 40 91 01 00 20 40 9C 05 58
+
+. 0 1000C9CC 88
+. 81 21 00 18 38 C6 01 08 81 41 00 18 55 29 F8 7E 90 C1 00 34 55 4A F0 BE 90 01 00 24 91 21 00 2C 91 41 00 30 81 61 00 34 83 21 00 20 83 EB FF 00 80 01 00 18 7F 39 F9 D6 81 81 00 28 2F 8C 00 00 7F 60 CB 96 93 21 00 20 39 3B 00 01 55 29 F8 7E 38 09 FF FF 40 9E 06 5C
+
+. 0 1000CA24 28
+. 2F 9F 00 02 3A E0 00 01 83 A1 00 10 83 81 00 14 83 41 00 1C 92 E1 00 28 41 9E 06 60
+
+. 0 1000D09C 20
+. 80 E1 00 20 81 01 00 34 54 F6 F8 7F 82 08 00 00 41 82 00 60
+
+. 0 1000D0B0 92
+. 57 69 20 36 7E C9 03 A6 7D 27 4B 78 39 49 FF F8 39 00 00 00 81 61 00 2C 7C 08 E1 D6 7D 28 5A 14 7D 6A E1 D6 54 00 20 36 7C 1D 04 AE 7D 4A 3A 14 7D AB EC AE 7C 08 B9 D6 7D 08 DA 14 FD 80 68 28 FC 00 68 2A 7D 29 B9 D6 54 00 18 38 7C 1A 05 AE 55 29 18 38 7D 89 D5 AE 42 00 FF BC
+
+. 0 1000D10C 8
+. 2F 9B 00 01 41 BE FD A0
+
+. 0 1000CEB0 28
+. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 FB 28
+
+. 0 1000CECC 12
+. 80 E1 00 28 2F 87 00 01 40 BE 00 4C
+
+. 0 1000CED8 20
+. 81 21 00 18 39 00 00 00 91 01 00 24 7F 88 48 40 40 9C 00 38
+
+. 0 1000CEEC 52
+. 81 41 00 14 7D 29 03 A6 80 61 00 10 55 44 18 38 81 61 00 24 81 81 00 1C 55 60 18 38 39 6B 00 01 7C 0C 04 AE 91 61 00 24 D8 03 00 00 7C 63 22 14 42 00 FF E0
+
+. 0 1000CEFC 36
+. 81 61 00 24 81 81 00 1C 55 60 18 38 39 6B 00 01 7C 0C 04 AE 91 61 00 24 D8 03 00 00 7C 63 22 14 42 00 FF E0
+
+. 0 1000CF20 164
+. 38 60 00 00 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
+
+. 0 10001D54 20
+. 7C 1F 04 AE FC 00 68 24 7C 1F 05 AE 7C 00 4A 14 42 00 FF F0
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 2, stride = 1
+. 0 100129D0 8
+. 57 03 10 38 48 01 65 61
+
+. 0 100129D8 16
+. 81 21 00 14 2F 83 00 00 90 69 02 08 41 9E 02 70
+
+. 0 10012A88 32
+. 38 09 00 01 FF 80 D8 90 54 00 F8 7E 7E 5B 93 78 2A 00 00 01 7C 10 03 78 3B 80 00 00 40 91 00 6C
+
+. 0 10012B10 16
+. 3A 94 00 01 7F 7B 92 14 7F 94 98 40 41 9C FF 84
+
+PASS: gsl_fft_real_wavetable_float_alloc, n = 2, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 2
+. 0 10005B90 4
+. 4B FF EB FD
+
+. 0 10003B88 24
+. 55 60 18 38 55 69 10 3A 7C 1B 04 2E 7D 6B E2 14 7C 09 FD 2E 42 00 FF EC
+
+. 0 10012EF0 16
+. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 16 B0
+
+. 0 10012F00 16
+. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 16 BC
+
+. 0 10012F10 12
+. 80 01 00 24 7F 80 50 40 40 9C 09 38
+
+. 0 10012F1C 68
+. 80 E1 00 18 38 C6 01 08 81 01 00 18 54 E7 F8 7E 90 C1 00 30 91 41 00 1C 55 0E F0 BE 90 E1 00 2C 81 21 00 24 81 41 00 30 2F 89 00 00 39 31 00 01 83 6A FF 00 55 29 F8 7E 38 09 FF FF 7E 31 D9 D6 40 9E 09 D8
+
+. 0 10012F60 28
+. 2F 9B 00 02 3B 00 00 01 83 A1 00 10 83 E1 00 14 83 21 00 20 93 01 00 24 41 9E 09 DC
+
+. 0 10013954 28
+. 81 81 00 18 56 24 F8 7E 80 E1 00 30 7F 4C 8B 96 83 87 00 00 2F 9A 00 00 41 9E 00 64
+
+. 0 10013970 96
+. 7F 49 03 A6 39 51 FF FF 38 E0 00 00 39 00 00 00 81 21 00 2C 7D 78 39 D6 7C E7 8A 14 7C 08 4A 14 7C 1F 01 D6 55 6B 10 3A 7D 3F 41 D6 54 00 10 3A 7D BD 04 2E 7D 08 22 14 55 29 10 3A 7C 18 51 D6 7C 09 EC 2E 7D 4A 8A 14 ED 80 68 28 EC 00 68 2A 54 00 10 3A 7C 0B CD 2E 7D 99 05 2E 42 00 FF B4
+
+. 0 100139D0 8
+. 2F 84 00 01 41 BE FE 0C
+
+. 0 100137E0 28
+. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F7 44
+
+. 0 100137FC 12
+. 81 01 00 24 2F 88 00 01 40 BE 00 4C
+
+. 0 10013808 20
+. 81 41 00 18 39 20 00 00 91 21 00 1C 7F 89 50 40 40 9C 00 38
+
+. 0 1001381C 52
+. 81 61 00 14 7D 49 03 A6 80 61 00 10 55 64 10 3A 81 81 00 1C 80 E1 00 20 55 80 10 3A 39 8C 00 01 7C 07 04 2E 91 81 00 1C D0 03 00 00 7C 63 22 14 42 00 FF E0
+
+. 0 1001382C 36
+. 81 81 00 1C 80 E1 00 20 55 80 10 3A 39 8C 00 01 7C 07 04 2E 91 81 00 1C D0 03 00 00 7C 63 22 14 42 00 FF E0
+
+. 0 10013850 164
+. 38 60 00 00 80 01 01 24 81 C1 00 48 81 E1 00 4C 7C 08 03 A6 82 01 00 50 82 21 00 54 82 41 00 58 82 61 00 5C 82 81 00 60 82 A1 00 64 82 C1 00 68 82 E1 00 6C 83 01 00 70 83 21 00 74 83 41 00 78 83 61 00 7C 83 81 00 80 83 A1 00 84 83 C1 00 88 83 E1 00 8C C9 C1 00 90 C9 E1 00 98 CA 01 00 A0 CA 21 00 A8 CA 41 00 B0 CA 61 00 B8 CA 81 00 C0 CA A1 00 C8 CA C1 00 D0 CA E1 00 D8 CB 01 00 E0 CB 21 00 E8 CB 41 00 F0 CB 61 00 F8 CB 81 01 00 CB A1 01 08 CB C1 01 10 CB E1 01 18 38 21 01 20 4E 80 00 20
+
+. 0 100107BC 44
+. 54 C9 10 3A 7C 03 29 D6 39 29 FF FC C1 BD 00 00 7D 29 19 D6 54 00 18 38 7C 09 FC 2E 7D 20 22 14 7C 04 05 2E D1 A9 00 04 4B FF FF B8
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 2, stride = 1
+. 0 1000E854 32
+. 38 09 00 01 FF 80 D8 90 54 00 F8 7E 7E 5B 93 78 2A 00 00 01 7C 10 03 78 3B 80 00 00 40 91 00 6C
+
+. 0 1000E8DC 16
+. 3A 94 00 01 7F 7B 92 14 7F 94 98 40 41 9C FF 84
+
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 2, stride = 1
+. 0 1000EB58 16
+. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 16 60
+
+. 0 1000EB68 16
+. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 16 34
+
+. 0 1000EB78 28
+. 80 06 00 04 38 E0 00 00 39 00 00 01 90 E1 00 28 7F 87 00 40 91 01 00 20 40 9C 05 5C
+
+. 0 1000EB94 88
+. 81 21 00 18 38 C6 01 08 81 41 00 18 55 29 F8 7E 90 C1 00 34 55 4A F0 BE 90 01 00 24 91 21 00 2C 91 41 00 30 81 61 00 34 83 21 00 20 83 AB FF 00 80 01 00 18 7F 39 E9 D6 81 81 00 28 2F 8C 00 00 7F 60 CB 96 93 21 00 20 39 3B 00 01 55 29 F8 7E 38 09 FF FF 40 9E 06 60
+
+. 0 1000EBEC 28
+. 2F 9D 00 02 3A E0 00 01 83 E1 00 10 83 81 00 14 83 41 00 1C 92 E1 00 28 41 9E 06 64
+
+. 0 1000F268 20
+. 80 E1 00 20 81 01 00 34 54 F6 F8 7F 82 08 00 00 41 82 00 60
+
+. 0 1000F27C 92
+. 57 69 18 38 7E C9 03 A6 7D 27 4B 78 39 49 FF FC 39 00 00 00 81 61 00 2C 7C 08 E1 D6 7D 28 5A 14 7D 6A E1 D6 54 00 18 38 7C 1F 04 2E 7D 4A 3A 14 7D AB FC 2E 7C 08 B9 D6 7D 08 DA 14 ED 80 68 28 EC 00 68 2A 7D 29 B9 D6 54 00 10 3A 7C 1A 05 2E 55 29 10 3A 7D 89 D5 2E 42 00 FF BC
+
+. 0 1000F2D8 8
+. 2F 9B 00 01 41 BE FD A0
+
+. 0 1000F07C 28
+. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 FB 24
+
+. 0 1000F098 12
+. 80 E1 00 28 2F 87 00 01 40 BE 00 4C
+
+. 0 1000F0A4 20
+. 81 21 00 18 39 00 00 00 91 01 00 24 7F 88 48 40 40 9C 00 38
+
+. 0 1000F0B8 52
+. 81 41 00 14 7D 29 03 A6 80 61 00 10 55 44 10 3A 81 61 00 24 81 81 00 1C 55 60 10 3A 39 6B 00 01 7C 0C 04 2E 91 61 00 24 D0 03 00 00 7C 63 22 14 42 00 FF E0
+
+. 0 1000F0C8 36
+. 81 61 00 24 81 81 00 1C 55 60 10 3A 39 6B 00 01 7C 0C 04 2E 91 61 00 24 D0 03 00 00 7C 63 22 14 42 00 FF E0
+
+. 0 1000F0EC 164
+. 38 60 00 00 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
+
+. 0 10003C8C 20
+. 7C 1F 04 2E EC 00 68 24 7C 1F 05 2E 7C 00 4A 14 42 00 FF F0
+
+. 0 10014930 32
+. 55 40 10 3A 55 49 18 38 7C 03 04 2E 7D 69 22 14 7D 4A 2A 14 7C 09 25 2E D1 AB 00 04 42 00 FF E4
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 2, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 2, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 2
+PASS: gsl_fft_complex_forward with signal_noise, n = 2, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 2, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 2, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 2, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 2, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 2, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 2, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 2, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 2, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 2, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 2
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 2, stride = 2
+. 0 10002B38 12
+. 2B 84 00 01 39 6B 00 02 40 9D 00 88
+
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 2, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 2, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 2, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 2, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 2, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 2, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 2, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 2, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 2, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 2
+PASS: gsl_fft_real with signal_real_noise, n = 2, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 2, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 2, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 2, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 2
+PASS: gsl_fft_real_float with signal_real_noise, n = 2, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 2, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 2, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 2, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 2
+PASS: gsl_fft_complex_forward with signal_noise, n = 2, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 2, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 2, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 2, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 2, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 2, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 2, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 2, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 2, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 2, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 2
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 2, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 2, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 2, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 2, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 2, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 2, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 2, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 2, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 2, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 2, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 2
+PASS: gsl_fft_real with signal_real_noise, n = 2, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 2, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 2, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 2, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 2
+PASS: gsl_fft_real_float with signal_real_noise, n = 2, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 2, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 2, stride = 3
+. 0 FEEF8E8 20
+. 80 E9 00 0C 61 4A 00 01 80 07 00 04 7F 80 50 40 41 9C 00 14
+
+. 0 FEEF8FC 12
+. 7D 2B 4B 78 7C E9 3B 78 4B FF FE F0
+
+. 0 FEEFCA0 32
+. 57 AF 10 3A 60 F2 00 01 7D F6 9B 78 39 0A 00 08 92 CA 00 04 7C E3 39 2E 92 43 00 04 4B FF F9 F4
+
+. 0 10006994 16
+. 3B 80 00 01 3B E0 00 00 7F 9C B0 40 41 9D 00 64
+
+PASS: gsl_fft_complex_wavetable_alloc, n = 3, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 3
+. 0 10006F78 8
+. 2F 97 00 03 41 9E 08 1C
+
+. 0 10007798 72
+. 3D 20 AA AA 81 81 00 24 61 29 AA AB 80 E1 00 18 7D 6C 48 16 3A 40 00 00 80 C1 01 88 7F 92 78 40 55 E0 20 36 82 66 00 00 38 80 00 00 7D 27 48 16 55 63 F8 7E 7E 20 9A 14 38 A0 00 00 54 77 08 3C 55 34 F8 7E 40 BC FD 9C
+
+. 0 100077E0 60
+. 81 1E 80 4C 7E 6C 9B 78 81 3E 80 50 7E 35 8B 78 81 5E 80 48 56 96 08 3C 82 1E 80 40 3E 60 43 30 81 DE 80 44 3B A0 00 00 CB 68 00 00 CB 49 00 00 CB 2A 00 00 2F 92 00 00 40 9E 01 64
+
+. 0 1000781C 24
+. CB D0 00 00 CB AE 00 00 FC 20 F0 90 FF E0 E8 90 2F 83 00 00 41 9E 01 2C
+
+. 0 10007834 296
+. 81 61 00 1C FF 80 D8 90 92 61 00 08 57 A6 20 36 6D 60 80 00 57 3B 20 36 90 01 00 0C 7C 05 C1 D6 C8 01 00 08 57 1C 20 36 7C 69 03 A6 FC 00 D0 28 54 07 20 36 FC 40 06 72 7C 04 A2 14 7D 76 22 14 7C 00 C9 D6 7D 26 FA 14 C8 E9 00 08 7D 07 D2 14 7D 06 FC AE 38 84 00 01 7F BD CA 14 7D 6B C9 D6 54 00 20 36 7D 40 FA 14 7D BF 04 AE C8 0A 00 08 7C 05 1A 14 7C C6 DA 14 55 6B 20 36 7C 00 C1 D6 7D 2B FA 14 7D 8B FC AE C9 69 00 08 7D 37 2A 14 FC 8D 60 2A 38 A5 00 01 FC 60 58 2A 7D 29 C1 D6 FD AD 60 28 54 00 20 36 FC 00 58 28 7D 60 D2 14 FD 44 07 32 55 29 20 36 FD 83 07 32 7D 49 D2 14 FD A2 03 72 FC 02 00 32 FD 48 50 28 FD 87 60 28 FD 08 20 2A FD 6A 00 2A FD 2C 68 28 FD 4A 00 28 7D 07 D5 AE FD 8C 68 2A 7C E7 E2 14 FC BF 02 F2 FC 1D 02 B2 FD BD 03 32 FC DF 02 72 FD 9E 03 3A FD 21 2A 7A FD 5E 6A B8 FD 61 32 F8 FC E7 18 2A D8 E8 00 08 7D 5A 05 AE D9 8B 00 08 7D 69 D5 AE D9 2A 00 08 42 00 FF 14
+
+. 0 1000795C 24
+. 3A 52 00 01 7C A5 BA 14 7F 92 78 40 39 8C 00 10 3A B5 00 10 40 BC FC 08
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 3, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 3, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 3, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 3, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 3, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 3, stride = 1
+. 0 FEEECBC 20
+. 81 7A 00 08 81 3A 00 0C 80 0B 00 0C 7C 80 D0 00 40 86 04 DC
+
+. 0 FEEECD0 12
+. 80 A9 00 08 7F 05 D0 00 40 9A 04 D0
+
+. 0 FEEECDC 56
+. 91 69 00 08 91 2B 00 0C 7F BD DA 14 38 7C 00 38 63 A8 00 01 80 C3 00 08 90 7F 00 0C 90 DF 00 08 91 1F 00 04 7F BF E9 2E 93 E6 00 0C 93 E3 00 08 28 9D FF FF 40 85 01 24
+
+. 0 100097BC 16
+. 3B 80 00 01 3B E0 00 00 7F 9C B0 40 41 9D 00 6C
+
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 3, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 3
+. 0 10009DA0 8
+. 2F 97 00 03 41 9E 08 14
+
+. 0 1000A5B8 72
+. 3D 20 AA AA 81 81 00 24 61 29 AA AB 81 01 00 18 7D 6C 48 16 3A 40 00 00 80 E1 01 44 7F 92 78 40 55 E0 18 38 82 87 00 00 38 80 00 00 7D 28 48 16 55 63 F8 7E 7E 20 A2 14 38 A0 00 00 54 77 08 3C 55 33 F8 7E 40 BC FD 9C
+
+. 0 1000A600 60
+. 81 3E 80 D8 7E 8C A3 78 81 5E 80 DC 7E 35 8B 78 81 7E 80 D4 56 76 08 3C 82 1E 80 CC 3E 80 43 30 81 DE 80 D0 3B A0 00 00 CB 69 00 00 CB 4A 00 00 C3 2B 00 00 2F 92 00 00 40 9E 01 80
+
+. 0 1000A63C 24
+. C3 B0 00 00 C3 8E 00 00 FF E0 E8 90 FF C0 E0 90 2F 83 00 00 41 9E 01 48
+
+. 0 1000A654 324
+. 80 E1 00 1C FC 20 D8 90 92 81 00 08 57 A6 18 38 6C E0 80 00 57 3B 18 38 90 01 00 0C 7C 05 C1 D6 C8 01 00 08 57 1C 18 38 7C 69 03 A6 FC 00 D0 28 54 07 18 38 FC 00 00 18 EC 40 06 72 7C 04 9A 14 7D 76 22 14 7C 00 C9 D6 7D 26 FA 14 C0 A9 00 04 38 84 00 01 7C C6 FC 2E 7F BD CA 14 FD 80 28 90 7C C6 DA 14 7D 6B C9 D6 54 00 18 38 7D 40 FA 14 7D 3F 04 2E C1 4A 00 04 FD 60 30 90 7C 05 1A 14 55 6B 18 38 7C 00 C1 D6 7D 2B FA 14 7D 0B FC 2E C0 E9 00 04 7D 77 2A 14 EC 89 40 2A 7D 27 D2 14 EC 6A 38 2A 7D 6B C1 D6 ED 29 40 28 54 00 18 38 FC 00 20 90 7D 40 D2 14 FD A0 18 90 38 A5 00 01 ED 4A 38 28 55 6B 18 38 FC 00 00 72 7D 0B D2 14 FD AD 00 72 FD 6B 00 28 ED 22 02 72 FD 8C 68 28 ED 42 02 B2 FD 60 58 18 FD 80 60 18 EC C6 20 2A EC 0B 50 2A ED AC 48 28 ED 6B 50 28 7C C7 D5 2E ED 8C 48 2A 7C E7 E2 14 ED 3E 00 32 ED 5C 02 F2 ED 1C 03 32 EC FE 03 72 EC A5 18 2A ED 9D 53 3A ED BF 4B 7A ED 7D 42 F8 D0 A9 00 04 EC 1F 38 38 7D 7A 05 2E D1 8A 00 04 7C 0B D5 2E D1 A8 00 04 42 00 FE FC
+
+. 0 1000A798 24
+. 3A 52 00 01 7C A5 BA 14 7F 92 78 40 39 8C 00 08 3A B5 00 08 40 BC FB EC
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 3, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 3, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 3, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 3, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 3, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 3, stride = 1
+. 0 10010AB8 8
+. 3B 80 00 00 40 91 00 64
+
+PASS: gsl_fft_real_wavetable_alloc, n = 3, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 3
+. 0 10010F8C 8
+. 2F 9B 00 03 41 9E 0E 5C
+
+. 0 10011DEC 56
+. 80 E1 00 18 3D 20 AA AA 81 01 00 30 61 29 AA AB 7E A7 8B 96 54 00 20 36 83 88 00 00 7E E0 E2 14 2F 95 00 00 7C 11 48 16 7D 27 48 16 54 1B F8 7E 55 23 F8 7E 41 9E 00 A4
+
+. 0 10011E24 160
+. 81 3E 82 50 57 66 08 3C 81 7E 82 54 39 46 FF FF C9 49 00 00 38 E0 00 00 C9 2B 00 00 39 00 00 00 7E A9 03 A6 7C 08 1A 14 55 4B 18 38 7D 20 1A 14 7C 1D 01 D6 39 6B 00 08 7D 3D 49 D6 54 00 18 38 7D BF 04 AE 55 29 18 38 7C 1D 41 D6 7C 09 FC AE 7D 08 DA 14 FD 6D 00 2A FD AD 00 28 54 00 18 38 7C 1F 04 AE 7D 38 39 D6 FD 8B 02 B2 7C E7 8A 14 FD AD 02 72 7C 18 51 D6 55 29 18 38 FD 80 60 28 7D 4A 8A 14 FC 00 58 2A 7D 6B C1 D6 54 00 18 38 7C 09 CD AE 7D 99 05 AE 7D AB CD AE 42 00 FF 88
+
+. 0 10011EC4 8
+. 2F 9B 00 01 41 BE F8 EC
+
+. 0 1000E4FC 84
+. 54 6A 20 36 54 60 18 38 7C E0 FA 14 7D 4C 53 78 7C 03 41 D6 38 A5 00 01 7D AA FC AE 7D 05 30 50 7F 88 28 40 C8 07 00 00 FD 80 68 50 7D 2A 22 14 54 00 20 36 7C 0A 25 AE 7D 60 22 14 D9 A9 00 08 7C E7 62 14 7C 04 05 AE 7D 4A 62 14 D9 8B 00 08 41 9D FF C0
+
+PASS: gsl_fft_real with signal_real_noise, n = 3, stride = 1
+. 0 1000C6AC 8
+. 3B 80 00 00 40 91 00 64
+
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 3, stride = 1
+. 0 1000CA40 8
+. 2F 9F 00 03 41 9E 08 70
+
+. 0 1000D2B4 48
+. 81 41 00 20 54 00 20 36 81 61 00 34 7E 8A FB 96 81 9E 81 64 82 0B 00 00 83 21 00 18 7F 00 82 14 CB CC 00 00 2F 94 00 00 7F F9 FB 96 41 9E 00 94
+
+. 0 1000D2E4 144
+. FD 3E F0 2A 7E 89 03 A6 57 66 08 3C 38 E0 00 00 1C 07 00 03 7D 07 FA 14 7D 48 FA 14 7D 17 41 D6 7D 26 02 14 39 29 FF FF 55 2B 18 38 39 6B 00 08 7C 1C 01 D6 55 08 18 38 7D 6B E1 D6 54 00 18 38 7D 7D 04 AE 7D 3C 49 D6 7D AB EC AE FD A9 03 72 55 29 18 38 7C 17 39 D6 7C 09 EC AE 7C E7 DA 14 FD 8B 00 28 FC 00 00 2A 7D 57 51 D6 54 00 18 38 FD 4C 68 2A FD 6B 00 2A FD 8C 68 28 55 4A 18 38 7D 7A 05 AE 7D 88 D5 AE 7D 4A D5 AE 42 00 FF 84
+
+. 0 1000D374 8
+. 2F 9B 00 01 41 BE FB 38
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 3, stride = 1
+. 0 10012AA0 8
+. 3B 80 00 00 40 91 00 6C
+
+PASS: gsl_fft_real_wavetable_float_alloc, n = 3, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 3
+. 0 10012F7C 8
+. 2F 9B 00 03 41 9E 0E 9C
+
+. 0 10013E1C 56
+. 80 E1 00 18 3D 20 AA AA 81 01 00 30 61 29 AA AB 7E A7 8B 96 54 00 18 38 83 88 00 00 7E E0 E2 14 2F 95 00 00 7C 11 48 16 7D 27 48 16 54 1B F8 7E 55 23 F8 7E 41 9E 00 B0
+
+. 0 10013E54 172
+. 81 3E 82 A8 57 66 08 3C 81 7E 82 AC 39 46 FF FF C9 29 00 00 38 E0 00 00 C1 0B 00 00 39 00 00 00 7E A9 03 A6 7C 08 1A 14 55 4B 10 3A 7D 20 1A 14 7C 1F 01 D6 39 6B 00 04 7D 3F 49 D6 54 00 10 3A 7D 7D 04 2E 55 29 10 3A 7C 1F 41 D6 7C 09 EC 2E 7D 08 DA 14 ED 4B 00 2A 54 00 10 3A ED 6B 00 28 7D 9D 04 2E 7D 38 39 D6 FD A0 50 90 7C E7 8A 14 FC 00 60 90 ED 6B 02 32 FD AD 02 72 7C 18 51 D6 55 29 10 3A ED 8C 50 2A 7D 4A 8A 14 FC 00 68 28 7D 6B C1 D6 54 00 10 3A 7D 89 CD 2E FC 00 00 18 7C 19 05 2E 7D 6B CD 2E 42 00 FF 7C
+
+. 0 10013F00 8
+. 2F 9B 00 01 41 BE F8 DC
+
+. 0 10010740 84
+. 54 6A 18 38 54 60 10 3A 7C E0 FA 14 7D 4C 53 78 7C 03 41 D6 38 A5 00 01 7D AA FC 2E 7D 05 30 50 7F 88 28 40 C0 07 00 00 FD 80 68 50 7D 2A 22 14 54 00 18 38 7C 0A 25 2E 7D 60 22 14 D1 A9 00 04 7C E7 62 14 7C 04 05 2E 7D 4A 62 14 D1 8B 00 04 41 9D FF C0
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 3, stride = 1
+. 0 1000E86C 8
+. 3B 80 00 00 40 91 00 6C
+
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 3, stride = 1
+. 0 1000EC08 8
+. 2F 9D 00 03 41 9E 08 74
+
+. 0 1000F480 48
+. 81 41 00 20 54 00 18 38 81 61 00 34 7E 6A EB 96 81 9E 81 DC 82 0B 00 00 C3 AC 00 00 7E C0 82 14 80 01 00 18 2F 93 00 00 7F 20 EB 96 41 9E 00 94
+
+. 0 1000F4B0 144
+. ED 3D E8 2A 7E 69 03 A6 57 66 08 3C 38 E0 00 00 1C 07 00 03 7D 07 CA 14 7D 48 CA 14 7D 17 41 D6 7D 26 02 14 39 29 FF FF 55 2B 10 3A 7C 1C 01 D6 39 6B 00 04 55 08 10 3A 7D 3C 49 D6 54 00 10 3A 7D 7F 04 2E 7D 6B E1 D6 55 29 10 3A 7C 09 FC 2E ED 8B 00 28 7D AB FC 2E EC 00 00 2A 7C 17 39 D6 7C E7 DA 14 ED A9 03 72 ED 6B 00 2A 7D 57 51 D6 ED 4C 68 2A ED 8C 68 28 54 00 10 3A 7D 7A 05 2E 55 4A 10 3A 7D 88 D5 2E 7D 4A D5 2E 42 00 FF 84
+
+. 0 1000F540 8
+. 2F 9B 00 01 41 BE FB 38
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 3, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 3, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 3
+PASS: gsl_fft_complex_forward with signal_noise, n = 3, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 3, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 3, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 3, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 3, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 3, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 3, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 3, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 3, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 3, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 3
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 3, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 3, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 3, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 3, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 3, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 3, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 3, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 3, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 3, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 3, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 3
+PASS: gsl_fft_real with signal_real_noise, n = 3, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 3, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 3, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 3, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 3
+PASS: gsl_fft_real_float with signal_real_noise, n = 3, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 3, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 3, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 3, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 3
+PASS: gsl_fft_complex_forward with signal_noise, n = 3, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 3, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 3, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 3, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 3, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 3, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 3, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 3, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 3, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 3, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 3
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 3, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 3, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 3, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 3, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 3, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 3, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 3, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 3, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 3, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 3, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 3
+PASS: gsl_fft_real with signal_real_noise, n = 3, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 3, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 3, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 3, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 3
+. 0 FEF8878 20
+. 80 04 00 00 38 63 FF E4 38 84 FF E8 38 A5 00 06 4B FF FF B4
+
+. 0 FEF883C 24
+. 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 3, stride = 3
+. 0 FEEF994 16
+. 81 29 00 08 80 E9 00 04 7C 87 C8 40 40 84 01 54
+
+. 0 FEEFAF4 16
+. 81 DD 00 04 55 DF 00 38 7D 9F C8 40 41 8C FF F0
+
+. 0 FEEFB04 24
+. 81 7D 00 08 7F 19 F8 50 81 3D 00 0C 82 0B 00 0C 7F 10 E8 00 40 9A 05 AC
+
+. 0 FEEFB1C 12
+. 82 29 00 08 7C 11 E8 00 40 82 05 A0
+
+. 0 FEEFB28 16
+. 91 69 00 08 91 2B 00 0C 28 98 00 0F 41 85 05 54
+
+. 0 FEF0088 60
+. 31 2F FF FF 7C A9 79 10 63 17 00 01 54 A0 10 3A 7D 3D CA 14 7C 0C A3 78 39 1D 00 08 91 3C 00 44 91 9D 00 04 91 3C 00 40 7F 09 C1 2E 93 49 00 0C 92 E9 00 04 93 49 00 08 4B FF F5 F0
+
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 3, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 3, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 4, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 4
+. 0 10006F80 8
+. 2F 97 00 04 41 9E 0A 2C
+
+. 0 100079B0 52
+. 39 C0 00 00 81 81 01 88 7F 8E 78 40 80 C1 00 24 82 6C 00 00 55 E0 20 36 54 DC F0 BE 3B A0 00 00 7E 20 9A 14 38 60 00 00 7E 40 8A 14 1E BC 00 03 40 BC FB 98
+
+. 0 100079E4 68
+. 81 01 01 84 3D 60 43 30 80 E1 00 1C 7E 2C 8B 78 81 3E 80 44 7E 71 9B 78 81 5E 80 50 2F 07 FF FF 1E 08 00 03 91 21 01 7C 55 14 08 3C 57 93 08 3C CA CA 00 00 7D 68 03 A6 3B 60 00 00 2F 8E 00 00 40 9E 01 C0
+
+. 0 10007A28 40
+. 80 DE 80 40 80 E1 01 7C CB 06 00 00 CA E7 00 00 FF 60 C0 90 FF 20 B8 90 FF 80 C0 90 FF 40 B8 90 2F 9C 00 00 41 9E 01 74
+
+. 0 10007A50 368
+. 81 01 00 1C 7D 28 02 A6 57 64 20 36 57 36 20 36 6D 00 80 00 57 17 20 36 90 01 00 0C 7C 03 C1 D6 91 21 00 08 7F 89 03 A6 C8 01 00 08 54 05 20 36 FF A0 B0 28 81 41 01 84 7D 70 EA 14 7D 6B C9 D6 7D 24 FA 14 7C 1D 52 14 C9 29 00 08 7D 54 EA 14 7D 84 FC AE 7C C5 D2 14 7C 00 C9 D6 55 6B 20 36 7D 2B FA 14 7C CB FC AE C8 49 00 08 7D 73 1A 14 3B BD 00 01 54 00 20 36 7D 4A C9 D6 7D 00 FA 14 7C 7F 04 AE C8 88 00 08 7C 15 1A 14 FD 43 30 28 7F 7B CA 14 FD 64 10 28 55 4A 20 36 7D 2A FA 14 7D 0A FC AE C8 E9 00 08 FD 5D 02 B2 7D 23 E2 14 7D 6B C1 D6 FD 7D 02 F2 7C 84 B2 14 38 63 00 01 FC 0C 40 28 FD A9 38 28 7D 29 C1 D6 FC 63 30 2A 55 6B 20 36 FC 84 10 2A 7D 0B D2 14 FD 8C 40 2A FD 29 38 2A 7C 00 C1 D6 FC A0 58 2A 55 29 20 36 FC CD 50 28 7D 49 D2 14 FD 0C 18 28 FC E9 20 28 54 00 20 36 FD AD 50 2A 7C E0 D2 14 FC 00 58 28 FF D9 02 32 FD 77 00 32 FD 5A 01 72 FC 57 03 72 FC 39 01 F2 FF FA 01 B2 FD B8 5B 7A FC FB F1 FA FC DC 51 BA FC 18 10 38 FD 1B 0A 38 FC BC F9 78 FD 8C 18 2A FD 29 20 2A 7D 85 D5 AE 7C A5 BA 14 D9 26 00 08 7C 09 D5 AE D9 AA 00 08 7D 0B D5 AE D8 E8 00 08 7C BA 05 AE D8 C7 00 08 42 00 FE C8
+
+. 0 10007BC0 28
+. 39 CE 00 01 7C 63 AA 14 7F 8E 78 40 3A 31 00 10 39 8C 00 10 3A 52 00 10 40 BC F9 A0
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 4, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 4, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 4, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 4, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 4, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 4, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 4, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 4
+. 0 10009DA8 8
+. 2F 97 00 04 41 9E 0A 40
+
+. 0 1000A7EC 52
+. 39 C0 00 00 81 01 01 44 7F 8E 78 40 81 21 00 24 82 88 00 00 55 E0 18 38 55 3C F0 BE 3B A0 00 00 7E 20 A2 14 38 60 00 00 7E 40 8A 14 1E BC 00 03 40 BC FB 7C
+
+. 0 1000A820 80
+. 81 61 01 40 3D 20 43 30 81 9E 80 CC 57 93 08 3C 81 41 00 1C 1E 0B 00 03 80 FE 80 D0 7D 28 03 A6 81 1E 80 DC 2F 0A FF FF 91 81 01 34 3B 60 00 00 7E 4C 93 78 90 E1 01 38 7E 32 8B 78 CA C8 00 00 7E 91 A3 78 55 74 08 3C 2F 8E 00 00 40 9E 01 C4
+
+. 0 1000A870 40
+. 81 41 01 34 81 61 01 38 C3 0A 00 00 C2 EB 00 00 FF 60 C0 90 FF 40 B8 90 FF 80 C0 90 FF 20 B8 90 2F 9C 00 00 41 9E 01 78
+
+. 0 1000A898 372
+. 80 E1 00 1C 7D 08 02 A6 57 64 18 38 57 36 18 38 6C E0 80 00 57 17 18 38 90 01 00 0C 7C 03 C1 D6 91 01 00 08 7F 89 03 A6 C8 01 00 08 FC 00 B0 28 54 05 18 38 FF A0 00 18 81 21 01 40 7D 70 EA 14 7D 6B C9 D6 7D 54 EA 14 7C 1D 4A 14 7D A4 FC 2E 7D 24 FA 14 C0 E9 00 04 3B BD 00 01 7C 00 C9 D6 55 6B 18 38 7D 2B FA 14 7C AB FC 2E C0 89 00 04 7D 75 1A 14 7F 7B CA 14 7D 4A C9 D6 54 00 18 38 7D 00 FA 14 7C 7F 04 2E C0 C8 00 04 7C 03 E2 14 ED 43 28 28 7C 84 B2 14 55 4A 18 38 EC 06 20 28 7D 2A FA 14 7D 2A FC 2E C1 09 00 04 ED 5D 02 B2 ED 8D 48 28 7D 33 1A 14 ED 67 40 28 7C 00 C1 D6 EC 1D 00 32 7D 45 D2 14 ED AD 48 2A 38 63 00 01 EC E7 40 2A EC 63 28 2A 7D 29 C1 D6 EC C6 20 2A 54 00 18 38 EC 4C 00 2A 7D 00 D2 14 EC 8B 50 28 ED 0D 18 28 7D 6B C1 D6 EC A7 30 28 55 29 18 38 ED 8C 00 28 7C E9 D2 14 ED 6B 50 2A EF FA 02 32 55 6B 18 38 EC 37 03 32 7C CB D2 14 EF D9 00 B2 EC 17 02 F2 ED 5A 01 72 ED 39 01 32 ED 78 0A FA EC BB F9 7A EC 9C F1 3A ED 98 03 38 ED 1B 52 38 EC 5C 48 B8 ED AD 18 2A EC E7 30 2A 7D A5 D5 2E 7C A5 BA 14 D0 EA 00 04 7D 9A 05 2E D1 68 00 04 7D 09 D5 2E D0 A7 00 04 7C 4B D5 2E D0 86 00 04 42 00 FE C8
+
+. 0 1000AA0C 28
+. 39 CE 00 01 7C 63 AA 14 7F 8E 78 40 3A 31 00 08 3A 52 00 08 39 8C 00 08 40 BC F9 74
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 4, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 4, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 4, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 4, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 4, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 4, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 4, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 4
+. 0 10010F94 8
+. 2F 9B 00 04 41 9E 11 B0
+
+. 0 10012148 40
+. 81 61 00 18 54 00 20 36 81 81 00 30 56 3A F0 BE 7E 4B 8B 96 83 8C 00 00 7E E0 E2 14 7E A0 BA 14 2F 92 00 00 41 9E 00 B8
+
+. 0 10012170 180
+. 57 44 08 3C 7E 49 03 A6 38 E4 FF FF 38 A0 00 00 38 C0 00 00 7C 06 72 14 7D 44 3A 14 7D 20 72 14 7C 1D 01 D6 7D 69 72 14 54 E8 18 38 39 08 00 08 54 00 18 38 7D 3D 49 D6 7D BF 04 AE 7D 7D 59 D6 55 29 18 38 7D 29 FC AE 7C 1D 31 D6 55 6B 18 38 7D 6B FC AE 7C C6 D2 14 FD 4D 58 28 54 00 18 38 FD AD 58 2A 7D 9F 04 AE 7D 38 39 D6 FD 40 50 50 7C E7 8A 14 FC 0C 48 2A FD 8C 48 28 7C 18 29 D6 55 29 18 38 FD 60 68 28 7C A5 8A 14 FC 00 68 2A 7D 58 51 D6 54 00 18 38 7C 19 05 AE 7D 89 CD AE 7D 08 C1 D6 55 4A 18 38 7D 48 CD AE 7D 6A CD AE 42 00 FF 64
+
+. 0 10012224 8
+. 2F 9A 00 01 41 BE F5 8C
+
+PASS: gsl_fft_real with signal_real_noise, n = 4, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 4, stride = 1
+. 0 1000CA48 8
+. 2F 9F 00 04 41 9E 0B A8
+
+. 0 1000D5F4 32
+. 81 01 00 20 54 00 20 36 81 21 00 34 55 11 F0 BF 82 09 00 00 7F 00 82 14 7E C0 C2 14 41 82 00 BC
+
+. 0 1000D614 184
+. 7E 29 03 A6 57 63 08 3C 38 A0 00 00 54 A0 10 3A 81 81 00 30 7D 23 02 14 7C 1C 01 D6 39 29 FF FF 55 2A 18 38 7D 63 4A 14 39 4A 00 08 7D 7C 59 D6 54 00 18 38 7D 9D 04 AE 7D 05 62 14 7C E8 62 14 7D 3C 49 D6 55 6B 18 38 7D 4B EC AE 7C C7 62 14 FD 6C 50 28 7D 4A E1 D6 55 29 18 38 7C 09 EC AE FD 8C 50 2A FC 00 00 2A 7D AA EC AE 7C 17 29 D6 7C A5 DA 14 FD AD 68 2A FD 4C 00 28 7D 17 41 D6 FD 8C 00 2A FD 2B 68 2A 54 00 18 38 FD 6B 68 28 7D 9A 05 AE 7C F7 39 D6 55 08 18 38 7D 68 D5 AE 7C D7 31 D6 54 E7 18 38 7D 47 D5 AE 54 C6 18 38 7D 26 D5 AE 42 00 FF 58
+
+. 0 1000D6CC 8
+. 2F 9B 00 01 41 BE F7 E0
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 4, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 4, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 4
+. 0 10012F84 8
+. 2F 9B 00 04 41 9E 12 1C
+
+. 0 100141A4 40
+. 81 81 00 18 54 00 18 38 80 E1 00 30 56 3A F0 BE 7E 4C 8B 96 83 87 00 00 7E E0 E2 14 7F 60 BA 14 2F 92 00 00 41 9E 00 B8
+
+. 0 100141CC 180
+. 57 44 08 3C 7E 49 03 A6 38 E4 FF FF 38 A0 00 00 38 C0 00 00 7C 06 72 14 7D 44 3A 14 7D 20 72 14 7C 1F 01 D6 7D 69 72 14 54 E8 10 3A 39 08 00 04 54 00 10 3A 7D 3F 49 D6 7D BD 04 2E 7D 7F 59 D6 55 29 10 3A 7D 29 EC 2E 7C 1F 31 D6 55 6B 10 3A 7D 6B EC 2E 7C C6 D2 14 ED 4D 58 28 54 00 10 3A ED AD 58 2A 7D 9D 04 2E 7D 38 39 D6 FD 40 50 50 7C E7 8A 14 EC 0C 48 2A ED 8C 48 28 7C 18 29 D6 55 29 10 3A ED 60 68 28 7C A5 8A 14 EC 00 68 2A 7D 58 51 D6 54 00 10 3A 7C 19 05 2E 7D 89 CD 2E 7D 08 C1 D6 55 4A 10 3A 7D 48 CD 2E 7D 6A CD 2E 42 00 FF 64
+
+. 0 10014280 8
+. 2F 9A 00 01 41 BE F5 5C
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 4, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 4, stride = 1
+. 0 1000EC10 8
+. 2F 9D 00 04 41 9E 0B C4
+
+. 0 1000F7D8 32
+. 81 01 00 20 54 00 18 38 81 21 00 34 55 11 F0 BF 82 09 00 00 7E C0 82 14 7F 20 B2 14 41 82 00 BC
+
+. 0 1000F7F8 184
+. 7E 29 03 A6 57 63 08 3C 38 A0 00 00 54 A0 10 3A 81 81 00 30 7D 23 02 14 7C 1C 01 D6 39 29 FF FF 55 2A 10 3A 7D 63 4A 14 39 4A 00 04 7D 7C 59 D6 54 00 10 3A 7D 9F 04 2E 7D 05 62 14 7C E8 62 14 7D 3C 49 D6 55 6B 10 3A 7D 4B FC 2E 7C C7 62 14 ED 6C 50 28 7D 4A E1 D6 55 29 10 3A 7C 09 FC 2E ED 8C 50 2A EC 00 00 2A 7D AA FC 2E 7C 17 29 D6 7C A5 DA 14 ED AD 68 2A ED 4C 00 28 7D 17 41 D6 ED 8C 00 2A ED 2B 68 2A 54 00 10 3A ED 6B 68 28 7D 9A 05 2E 7C F7 39 D6 55 08 10 3A 7D 68 D5 2E 7C D7 31 D6 54 E7 10 3A 7D 47 D5 2E 54 C6 10 3A 7D 26 D5 2E 42 00 FF 58
+
+. 0 1000F8B0 8
+. 2F 9B 00 01 41 BE F7 C8
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 4, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 4, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 4
+PASS: gsl_fft_complex_forward with signal_noise, n = 4, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 4, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 4, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 4, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 4, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 4, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 4, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 4, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 4, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 4, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 4
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 4, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 4, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 4, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 4, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 4, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 4, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 4, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 4, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 4, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 4, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 4
+PASS: gsl_fft_real with signal_real_noise, n = 4, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 4, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 4, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 4, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 4
+PASS: gsl_fft_real_float with signal_real_noise, n = 4, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 4, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 4, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 4, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 4
+PASS: gsl_fft_complex_forward with signal_noise, n = 4, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 4, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 4, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 4, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 4, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 4, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 4, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 4, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 4, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 4, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 4
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 4, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 4, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 4, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 4, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 4, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 4, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 4, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 4, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 4, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 4, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 4
+PASS: gsl_fft_real with signal_real_noise, n = 4, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 4, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 4, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 4, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 4
+PASS: gsl_fft_real_float with signal_real_noise, n = 4, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 4, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 4, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 5, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 5
+. 0 10006F88 8
+. 2F 97 00 05 41 9E 0C BC
+
+. 0 10007C48 80
+. 81 81 01 88 3C 00 CC CC 80 C1 00 18 60 00 CC CD 81 61 00 24 3B 80 00 00 82 6C 00 00 3B 60 00 00 7D 4B 00 16 81 3E 80 54 55 EB 20 36 7E 2B 9A 14 C8 29 00 00 7E 4B 8A 14 7C 06 00 16 55 57 F0 BE 7F AB 92 14 56 F0 10 3A 54 15 F0 BE 48 02 13 01
+
+. 0 10007C98 16
+. 81 3E 80 58 FE E0 08 90 C8 29 00 00 48 02 12 F1
+
+. 0 10007CA8 16
+. 7F 9C 78 40 FF 00 08 90 93 81 00 30 40 BC F8 C4
+
+. 0 10007CB8 64
+. 1C 17 00 03 80 DE 80 44 92 41 01 70 1D D5 00 03 92 21 01 74 7C 08 03 A6 90 C1 01 68 56 B2 08 3C 93 A1 01 6C 56 B1 10 3A 92 61 01 78 56 EC 08 3C 3A C0 00 00 80 E1 00 30 2F 87 00 00 40 9E 02 B8
+
+. 0 10007CF8 48
+. 81 1E 80 40 81 21 01 68 CA 08 00 00 C9 E9 00 00 FE 40 80 90 FE 20 78 90 FE C0 80 90 FE A0 78 90 FE 80 80 90 FE 60 78 90 2F 97 00 00 41 9E 02 34
+
+. 0 10007D28 400
+. 80 C1 00 1C 3C E0 43 30 81 1E 80 50 56 DD 20 36 6C C0 80 00 90 E1 00 08 90 01 00 0C 7C 1C C1 D6 C8 01 00 08 57 33 20 36 C8 48 00 00 57 14 20 36 80 DE 80 5C 7E E9 03 A6 FF 20 10 28 54 03 20 36 C9 C6 00 00 7C 1B AA 14 7D 72 DA 14 7D 4E DA 14 7D 11 DA 14 7C 00 C9 D6 7D 3D FA 14 CB 89 00 08 7C 83 D2 14 7F BD FC AE 3B 7B 00 01 7E D6 CA 14 7D 6B C9 D6 54 00 20 36 7D 20 FA 14 7C FF 04 AE C9 49 00 08 7C 1C BA 14 7F BD 9A 14 7D 4A C9 D6 55 6B 20 36 7C CB FA 14 7D AB FC AE C8 06 00 08 7D 08 C9 D6 55 4A 20 36 7C EA FA 14 7D 8A FC AE C9 67 00 08 7C E8 02 A6 FC 8D 60 2A 7D 50 E2 14 55 08 20 36 FC 60 58 2A 7D 28 FA 14 7C 48 FC AE C8 29 00 08 FD AD 60 28 FD 27 10 2A 81 1E 80 60 FD 0A 08 2A 7D 67 E2 14 FC 00 58 28 7D 2C E2 14 FF 69 20 2A 7C 00 C1 D6 FF 48 18 2A 3B 9C 00 01 FC E7 10 28 C8 48 00 00 FC B7 03 72 7D 29 C1 D6 54 00 20 36 FC D7 00 32 7C E0 D2 14 FD B8 03 72 7D 6B C1 D6 55 29 20 36 FC 18 00 32 7C C9 D2 14 FD 4A 08 28 FD 29 20 28 7D 4A C1 D6 FD 08 18 28 55 6B 20 36 FD 7B 00 B2 7C AB D2 14 FD 9A 00 B2 55 4A 20 36 7D 0A D2 14 FC B8 29 F8 FC D8 32 B8 FC F7 69 FA FD 57 02 BA FD 29 03 B2 FD 08 03 B2 FD 7D 58 28 FD 9C 60 28 FC F9 01 F2 FD 59 02 B2 FC B9 01 72 FC D9 01 B2 FC 0B 48 28 FD AC 40 28
+
+. 0 10007EB8 160
+. FD 6B 48 2A FD 8C 40 2A FC 80 30 2A FC 6D 28 28 FC 4B 50 2A FC 2C 38 28 FD 6B 50 28 FC 00 30 28 FD AD 28 2A FD 8C 38 2A FF CF 02 F2 FF F1 00 32 FC B5 01 32 FC D3 00 B2 FC EF 03 32 FD 51 03 72 FD 35 00 F2 FD 13 00 72 FD 90 F3 3A FD B2 FB 7A FC 76 28 FA FC 34 30 7A FD 70 3A F8 FC 12 50 38 FC 96 49 38 FC 54 40 B8 FF BD D8 2A FF 9C D0 2A 7F A3 D5 AE 7C 63 A2 14 DB 84 00 08 7D 7A 05 AE D9 87 00 08 7C 09 D5 AE D9 A6 00 08 7C 8B D5 AE D8 65 00 08 7C 4A D5 AE D8 28 00 08 42 00 FE 18
+
+. 0 10007F58 72
+. 80 E1 00 30 7F 9C 82 14 81 01 01 78 38 E7 00 01 81 21 01 74 7F 87 78 40 81 41 01 70 81 61 01 6C 39 08 00 10 39 29 00 10 39 4A 00 10 39 6B 00 10 90 E1 00 30 91 01 01 78 91 21 01 74 91 41 01 70 91 61 01 6C 40 BC F5 DC
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 5, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 5, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 5, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 5, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 5, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 5, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 5, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 5
+. 0 10009DB0 8
+. 2F 97 00 05 41 9E 0C E0
+
+. 0 1000AA94 80
+. 81 81 01 44 3C 00 CC CC 80 E1 00 18 60 00 CC CD 81 61 00 24 3B 60 00 00 82 8C 00 00 3B 80 00 00 7D 4B 00 16 81 3E 80 E0 55 EB 18 38 7E 2B A2 14 C8 29 00 00 7E 4B 8A 14 7C 07 00 16 55 57 F0 BE 7F AB 92 14 56 F0 10 3A 54 15 F0 BE 48 01 E4 B5
+
+. 0 1000AAE4 16
+. 81 3E 80 E4 FE E0 08 18 C8 29 00 00 48 01 E4 A5
+
+. 0 1000AAF4 16
+. 7F 9B 78 40 93 61 00 30 FF 00 08 18 40 BC F8 98
+
+. 0 1000AB04 72
+. 1C 17 00 03 80 FE 80 CC 81 1E 80 D0 1D D5 00 03 92 41 01 28 7C 08 03 A6 92 21 01 2C 56 B2 08 3C 90 E1 01 1C 56 B1 10 3A 91 01 01 20 56 EC 08 3C 93 A1 01 24 3A C0 00 00 92 81 01 30 81 21 00 30 2F 89 00 00 40 9E 02 E4
+
+. 0 1000AB4C 52
+. 81 41 01 1C 81 61 01 20 C1 CA 00 00 C0 0B 00 00 FE 80 70 90 D0 01 00 34 FE 60 00 90 FE 40 70 90 FE 20 00 90 FE 00 70 90 FD E0 00 90 2F 97 00 00 41 9E 02 5C
+
+. 0 1000AB80 400
+. 81 21 00 1C 3D 40 43 30 81 7E 80 DC 56 C3 18 38 6D 20 80 00 91 41 00 08 90 01 00 0C 7C 1C C1 D6 C8 01 00 08 57 33 18 38 C8 2B 00 00 57 14 18 38 80 FE 80 E8 7E E9 03 A6 FC 00 08 28 81 1E 80 EC CA C7 00 00 54 1D 18 38 CA A8 00 00 FF 20 00 18 7C 1B AA 14 7D 72 DA 14 7D 4E DA 14 7D 11 DA 14 7C 00 C9 D6 7D 23 FA 14 C3 89 00 04 7C BC BA 14 7F A3 FC 2E 7C 8C E2 14 3B 7B 00 01 7D 6B C9 D6 54 00 18 38 7D 20 FA 14 7C 9F 04 2E C0 A9 00 04 7E D6 CA 14 7C 63 9A 14 7D 4A C9 D6 55 6B 18 38 7C CB FA 14 7C EB FC 2E C1 06 00 04 7C D0 E2 14 7D 08 C9 D6 55 4A 18 38 7C EA FA 14 7D 4A FC 2E C0 C7 00 04 ED 87 50 2A 55 08 18 38 ED 68 30 2A 7D 28 FA 14 7C 68 FC 2E C0 49 00 04 EC E7 50 28 EC 04 18 2A 7D 28 02 A6 ED A5 10 2A 7C A5 C1 D6 ED 08 30 28 EF 60 60 2A 7C 09 E2 14 EF 4D 58 2A 7D 3D D2 14 EC 00 60 28 7C 84 C1 D6 ED AD 58 28 54 A5 18 38 FD 40 D8 90 7D 65 D2 14 FD 20 D0 90 3B 9C 00 01 7C 00 C1 D6 FD 4A 05 72 54 84 18 38 7D 44 D2 14 FD 29 05 72 7C C6 C1 D6 54 00 18 38 7D 00 D2 14 FD 80 E8 90 FD 60 E0 90 FC 00 05 B2 54 C6 18 38 7C E6 D2 14 FD AD 05 B2 EC 84 18 28 EC A5 10 28 C0 41 00 34 FD 8C 50 28 FD 6B 48 28 EC D7 01 F2 ED 57 02 32 EC F8 01 F2 ED 18 02 32 FC 00 00 18 FD A0 68 18 EC D8 31 38 ED 58 51 78
+
+. 0 1000AD10 200
+. FD 80 60 18 FD 60 58 18 EC 97 39 3A EC B7 41 7A ED 2C 00 28 ED 0B 68 28 EC 99 01 32 EC B9 01 72 EC D9 01 B2 ED 59 02 B2 ED 8C 00 2A ED 6B 68 2A EC 09 50 2A ED A8 30 28 EC 6B 20 28 EC EC 28 2A ED 29 50 28 ED 8C 28 28 ED 08 30 2A ED 6B 20 2A EC 22 03 32 EF F3 02 72 EC 82 02 F2 EF D1 00 32 EC AF 01 F2 EC 53 02 32 ED 51 03 72 EC CF 00 F2 EF BD D8 2A EF 9C D0 2A ED 6E 0A FA ED 14 FA 3A 7F BD D5 2E ED B2 F3 7A D3 89 00 04 EC 70 28 FA 7F BD A2 14 ED 8E 23 38 ED 34 12 78 EC 12 50 38 EC F0 31 F8 7D 85 D5 2E D1 6B 00 04 7D 24 D5 2E D1 0A 00 04 7C 1A 05 2E D1 A8 00 04 7C E6 D5 2E D0 67 00 04 42 00 FD FC
+
+. 0 1000ADD8 72
+. 80 E1 00 30 7F 9C 82 14 81 01 01 30 38 E7 00 01 81 21 01 2C 7F 87 78 40 81 41 01 28 81 61 01 24 39 08 00 08 39 29 00 08 39 4A 00 08 39 6B 00 08 90 E1 00 30 91 01 01 30 91 21 01 2C 91 41 01 28 91 61 01 24 40 BC F5 7C
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 5, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 5, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 5, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 5, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 5, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 5, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 5, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 5
+. 0 10010F9C 8
+. 2F 9B 00 05 41 9E 02 78
+
+. 0 10011218 68
+. 81 01 00 18 54 00 20 36 81 21 00 30 3D 60 CC CC 7E 48 8B 96 61 6B CC CD 83 89 00 00 81 3E 82 5C 7E E0 E2 14 7E A0 BA 14 C8 29 00 00 7E 80 AA 14 7C 11 58 16 7D 68 58 16 54 16 F0 BE 55 7A F0 BE 48 01 7D 3D
+
+. 0 1001125C 16
+. 81 3E 82 60 FF 80 08 90 C8 29 00 00 48 01 7D 2D
+
+. 0 1001126C 12
+. 2F 92 00 00 FF 60 08 90 41 9E 01 14
+
+. 0 10011278 272
+. 80 FE 82 64 56 C3 08 3C 81 1E 82 68 FC C0 E0 50 FC A0 08 50 C8 87 00 00 C8 68 00 00 38 A3 FF FF 38 80 00 00 3B 60 00 00 7E 49 03 A6 7C 1B D2 14 7D 03 2A 14 7D 20 D2 14 7C 1D 01 D6 7D 69 D2 14 7D 4B D2 14 55 07 18 38 7D 3D 49 D6 54 00 18 38 7D 7F 04 AE 54 A6 18 38 38 C6 00 08 38 E7 00 08 7D 7D 59 D6 55 29 18 38 7D A9 FC AE 7D 5D 51 D6 55 6B 18 38 7D 4B FC AE FD 8D 50 2A 55 4A 18 38 7C 1D D9 D6 7D 0A FC AE FD AD 50 28 7F 7B B2 14 FC 0B 40 2A 54 00 18 38 FD 3C 03 72 7D 5F 04 AE 7D 38 21 D6 FC E0 60 2A 7C 84 8A 14 FC 00 60 28 FD BB 03 72 7C 18 29 D6 55 29 18 38 FD 87 00 F2 7C A5 8A 14 FD 6B 40 28 FC 00 01 32 7D 18 41 D6 54 00 18 38 FD 8A 60 28 FD 25 4A FA 7C C6 C1 D6 55 08 18 38 FD 66 6A F8 FD 4A 38 2A 7C E7 C1 D6 FD AC 00 28 FD 8C 00 2A 7D 49 CD AE 7D 99 05 AE 7D 66 CD AE 7D A8 CD AE 7D 27 CD AE 42 00 FF 20
+
+. 0 10011388 8
+. 2F 96 00 01 41 9E 04 28
+
+. 0 1000E50C 68
+. 7C 03 41 D6 38 A5 00 01 7D AA FC AE 7D 05 30 50 7F 88 28 40 C8 07 00 00 FD 80 68 50 7D 2A 22 14 54 00 20 36 7C 0A 25 AE 7D 60 22 14 D9 A9 00 08 7C E7 62 14 7C 04 05 AE 7D 4A 62 14 D9 8B 00 08 41 9D FF C0
+
+PASS: gsl_fft_real with signal_real_noise, n = 5, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 5, stride = 1
+. 0 1000CA50 8
+. 2F 9F 00 05 41 9E 0F 9C
+
+. 0 1000D9F0 36
+. 83 21 00 34 54 00 20 36 81 3E 81 70 82 19 00 00 C8 29 00 00 7F 00 82 14 7E C0 C2 14 7E A0 B2 14 48 01 B5 85
+
+. 0 1000DA14 16
+. 81 3E 81 74 FF 20 08 90 C8 29 00 00 48 01 B5 75
+
+. 0 1000DA24 28
+. 80 01 00 20 80 C1 00 18 FF 00 08 90 7E 60 FB 96 2F 93 00 00 7F 26 FB 96 41 9E 01 14
+
+. 0 1000DA40 272
+. 80 FE 81 78 57 66 08 3C 81 1E 81 7C 38 A0 00 00 C8 E7 00 00 7E 69 03 A6 C8 C8 00 00 1D 05 00 05 7C E5 CA 14 7D 26 42 14 7D 1C 41 D6 39 29 FF FF 7C 06 4A 14 54 0A 18 38 7D 7C 49 D6 39 4A 00 08 55 29 18 38 39 29 00 08 55 08 18 38 7C 1C 01 D6 55 6B 18 38 7D 8B EC AE 7D 67 CA 14 7D 08 EC AE 54 00 18 38 7D 4A E1 D6 7C 1D 04 AE FD 2C 00 2A 7D 6A EC AE 7D 29 E1 D6 FD 8C 00 28 7D 4B CA 14 FD 29 48 2A FD B9 02 F2 7C 09 EC AE 7D 2A CA 14 FD 78 02 F2 7C 17 29 D6 7C A5 DA 14 FD 49 01 B2 FD 8C 01 F2 7C F7 39 D6 54 00 18 38 FD B8 68 38 FC 19 58 3A 7D 77 59 D6 54 E7 18 38 FD 48 50 28 FD AD 68 2A FC 00 00 2A 7D 57 51 D6 FD 6A 60 28 55 6B 18 38 FD 8C 50 2A FD 08 48 2A 7D 37 49 D6 FD 4B 68 2A FD 2C 00 2A 55 4A 18 38 FD 8C 00 28 7D 1A 05 AE FD 6B 68 28 55 29 18 38 7D 87 D5 AE 7D 6B D5 AE 7D 4A D5 AE 7D 29 D5 AE 42 00 FF 10
+
+. 0 1000DB50 8
+. 2F 9B 00 01 41 BE F3 5C
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 5, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 5, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 5
+. 0 10012F8C 8
+. 2F 9B 00 05 41 9E 02 78
+
+. 0 10013208 68
+. 81 41 00 18 54 00 18 38 81 81 00 30 3D 60 CC CC 7E 6A 8B 96 61 6B CC CD 83 8C 00 00 81 3E 82 B8 7E E0 E2 14 7F 60 BA 14 C8 29 00 00 7E C0 DA 14 7C 11 58 16 7D 6A 58 16 54 15 F0 BE 55 7A F0 BE 48 01 5D 4D
+
+. 0 1001324C 16
+. 81 3E 82 BC FF 60 08 18 C8 29 00 00 48 01 5D 3D
+
+. 0 1001325C 12
+. 2F 93 00 00 FF 40 08 18 41 9E 01 24
+
+. 0 10013268 288
+. 80 FE 82 C0 56 B4 08 3C 81 1E 82 C4 FC 80 D8 50 FC 60 D0 50 C8 C7 00 00 C8 A8 00 00 38 B4 FF FF 38 80 00 00 38 60 00 00 7E 69 03 A6 7C 03 D2 14 7D 14 2A 14 7D 20 D2 14 7C 1F 01 D6 7D 69 D2 14 7D 4B D2 14 55 07 10 3A 7D 3F 49 D6 54 00 10 3A 7D 5D 04 2E 54 A6 10 3A 38 C6 00 04 38 E7 00 04 7D 7F 59 D6 55 29 10 3A 7D 69 EC 2E 7D 5F 51 D6 55 6B 10 3A 7D 8B EC 2E ED AB 60 2A 55 4A 10 3A 7C 1F 19 D6 7D 0A EC 2E ED 6B 60 28 7C 63 AA 14 EC 0A 40 2A 54 00 10 3A ED 4A 40 28 7D 3D 04 2E 7D 38 21 D6 EC E0 68 2A 7C 84 8A 14 EC 00 68 28 FD A0 48 90 FD 80 38 90 7C 18 29 D6 55 29 10 3A ED 29 38 2A 7C A5 8A 14 FD 8C 01 72 7D 18 41 D6 54 00 10 3A FC 00 01 B2 7D 29 CD 2E FD AD 60 28 ED 9B 02 F2 7C C6 C1 D6 FC 00 00 18 55 08 10 3A FD A0 68 18 ED 7A 02 F2 7C E7 C1 D6 ED 83 62 BA ED 0D 00 28 ED 44 5A B8 ED AD 00 2A 7D B9 05 2E 7D 46 CD 2E 7D 08 CD 2E 7D 87 CD 2E 42 00 FF 10
+
+. 0 10013388 8
+. 2F 95 00 01 41 9E 04 54
+
+. 0 10010750 68
+. 7C 03 41 D6 38 A5 00 01 7D AA FC 2E 7D 05 30 50 7F 88 28 40 C0 07 00 00 FD 80 68 50 7D 2A 22 14 54 00 18 38 7C 0A 25 2E 7D 60 22 14 D1 A9 00 04 7C E7 62 14 7C 04 05 2E 7D 4A 62 14 D1 8B 00 04 41 9D FF C0
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 5, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 5, stride = 1
+. 0 1000EC18 8
+. 2F 9D 00 05 41 9E 0F C0
+
+. 0 1000FBDC 36
+. 83 21 00 34 54 00 18 38 81 3E 81 E8 82 19 00 00 C8 29 00 00 7E C0 82 14 7F 20 B2 14 7E A0 CA 14 48 01 93 99
+
+. 0 1000FC00 16
+. 81 3E 81 EC FF 20 08 18 C8 29 00 00 48 01 93 89
+
+. 0 1000FC10 28
+. 80 01 00 20 80 C1 00 18 FF 00 08 18 7E 40 EB 96 2F 92 00 00 7F 06 EB 96 41 9E 01 24
+
+. 0 1000FC2C 288
+. 80 FE 81 F0 57 65 08 3C 81 1E 81 F4 38 80 00 00 C8 C7 00 00 7E 49 03 A6 C8 A8 00 00 1D 44 00 05 7C C4 C2 14 7C E6 C2 14 7C D7 31 D6 7D 65 52 14 39 6B FF FF 7C 05 5A 14 7D 3C 59 D6 54 08 10 3A 39 08 00 04 55 6B 10 3A 39 6B 00 04 7C 1C 01 D6 55 29 10 3A 7C 09 FC 2E 7D 27 C2 14 54 C6 10 3A 54 00 10 3A 7D 5C 51 D6 7D BF 04 2E ED 00 68 2A EC 00 68 28 55 4A 10 3A 7D 08 E1 D6 7C EA FC 2E ED 08 40 2A FD A0 38 90 FD 80 40 90 7D 6B E1 D6 7D 28 FC 2E FC 00 01 B2 FD 8C 01 72 7D 6B FC 2E 7D 69 C2 14 ED 59 02 72 7C 17 21 D6 ED 38 02 72 7C 84 DA 14 FD AD 60 28 FC 00 00 18 ED 58 52 F8 7C F7 39 D6 FD A0 68 18 54 00 10 3A ED 79 4A FA ED 4A 50 2A ED 8D 00 28 7D 37 49 D6 EC 00 68 2A 54 E7 10 3A ED 6B 58 2A ED AC 50 2A 7D 77 59 D6 EC E7 40 2A ED 20 58 2A 55 29 10 3A EC 00 58 28 ED 8C 50 28 7C FA 05 2E 55 6B 10 3A 7C 06 D5 2E 7D 87 D5 2E 7D A9 D5 2E 7D 2B D5 2E 42 00 FF 00
+
+. 0 1000FD4C 8
+. 2F 9B 00 01 41 BE F3 2C
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 5, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 5, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 5
+PASS: gsl_fft_complex_forward with signal_noise, n = 5, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 5, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 5, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 5, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 5, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 5, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 5, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 5, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 5, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 5, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 5
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 5, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 5, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 5, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 5, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 5, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 5, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 5, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 5, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 5, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 5, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 5
+PASS: gsl_fft_real with signal_real_noise, n = 5, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 5, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 5, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 5, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 5
+PASS: gsl_fft_real_float with signal_real_noise, n = 5, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 5, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 5, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 5, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 5
+PASS: gsl_fft_complex_forward with signal_noise, n = 5, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 5, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 5, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 5, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 5, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 5, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 5, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 5, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 5, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 5, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 5
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 5, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 5, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 5, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 5, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 5, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 5, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 5, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 5, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 5, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 5, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 5
+PASS: gsl_fft_real with signal_real_noise, n = 5, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 5, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 5, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 5, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 5
+PASS: gsl_fft_real_float with signal_real_noise, n = 5, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 5, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 5, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 6, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 6
+. 0 10006F90 8
+. 2F 97 00 06 41 9E 11 2C
+
+. 0 100080C0 88
+. 81 81 00 24 3D 20 AA AA 80 C1 01 88 61 29 AA AB 81 01 00 18 7D 6C 48 16 38 E0 00 00 82 66 00 00 55 E0 20 36 90 E1 00 34 7F 87 78 40 7D 28 48 16 7E 20 9A 14 7E 40 8A 14 55 76 F0 BE 7F A0 92 14 7F 80 EA 14 55 35 F0 BE 39 80 00 00 3A E0 00 00 1E 16 00 05 40 BC F4 64
+
+. 0 10008118 100
+. 81 21 00 1C 1D 55 00 05 1D 76 00 03 80 DE 80 44 2F 09 FF FF 56 A7 10 3A 56 C8 08 3C 56 C9 10 3A 92 21 01 60 1D D5 00 03 91 41 01 40 56 B1 08 3C 91 61 01 48 7C E8 03 A6 90 C1 01 50 3A 80 00 00 93 81 01 54 93 A1 01 58 92 41 01 5C 92 61 01 64 91 01 01 44 91 21 01 4C 81 41 00 34 2F 8A 00 00 40 9E 03 58
+
+. 0 1000817C 76
+. 81 7E 80 40 80 C1 01 50 C8 0B 00 00 D8 01 00 38 C8 06 00 00 CA 01 00 38 D8 01 00 40 FD C0 00 90 80 C1 00 40 80 E1 00 44 FD E0 80 90 FE 60 80 90 D8 01 00 50 90 C1 00 48 90 E1 00 4C FE 40 00 90 FE 20 80 90 2F 96 00 00 41 9E 02 AC
+
+. 0 100081C8 400
+. 80 C1 00 1C 3C E0 43 30 81 1E 80 50 56 9B 20 36 6C C0 80 00 90 E1 00 08 90 01 00 0C 7C 17 C1 D6 C8 48 00 00 57 32 20 36 C8 01 00 08 57 13 20 36 80 FE 80 48 7E C9 03 A6 FC 00 10 28 80 DE 80 4C C8 47 00 00 54 1C 20 36 CA 86 00 00 FE A0 00 B2 7C C8 02 A6 80 E1 01 40 7C 0C AA 14 7D 71 62 14 7D 07 62 14 7C 00 C9 D6 7D 46 62 14 7C 9B FC AE 7D 3B FA 14 CA E1 00 40 C8 29 00 08 7C EE 62 14 7D 6B C9 D6 54 00 20 36 7D 20 FA 14 7C FF 04 AE C9 09 00 08 7F BC D2 14 CB 01 00 48 39 8C 00 01 7D 4A C9 D6 55 6B 20 36 7D 2B FC AE 7C AB FA 14 C9 65 00 08 7E 94 CA 14 80 01 01 48 7F 7B 92 14 7D 08 C9 D6 55 4A 20 36 7C 0A FC AE 7C CA FA 14 C9 A6 00 08 7D 40 BA 14 FC C9 00 2A 80 C1 01 4C 55 08 20 36 7C E7 C9 D6 7D 48 FC AE 7D 28 FA 14 C9 89 00 08 FC AB 68 2A FC 6A 38 2A 81 01 01 44 FC 4C 40 2A 54 E7 20 36 FD 6B 68 28 7F 87 FC AE FD 4A 38 28 7D 27 FA 14 FD 8C 40 28 CB A9 00 08 FC E6 05 32 7D 68 BA 14 7D 37 B2 14 7D 06 BA 14 FD A3 05 32 7C 10 BA 14 7D 29 C1 D6 3A F7 00 01 FD 29 00 28 FD 05 05 32 FC 02 05 32 7D 6B C1 D6 55 29 20 36 FD 75 02 F2 7C E9 D2 14 FD 95 03 32 7D 4A C1 D6 55 6B 20 36 FD 35 02 72 7C CB D2 14 FD 55 02 B2 7D 08 C1 D6 55 4A 20 36 FC E4 38 28 7C AA D2 14 FD BC 68 28 FD 01 40 28 7C 00 C1 D6
+
+. 0 10008358 280
+. FC 1D 00 28 55 08 20 36 FC 84 30 2A 7C 88 D2 14 FC C7 58 2A FF 9C 18 2A 54 00 20 36 FC 6D 60 2A 7C 60 D2 14 FC 21 28 2A FF BD 10 2A FC A8 48 28 FC 40 50 28 FC E7 58 28 FD AD 60 28 FC 00 50 2A FF E6 18 28 FD 08 48 2A FC C6 18 2A FF C5 10 28 FC A5 10 2A C8 41 00 48 FD 87 68 28 FD 68 00 28 FC 42 01 B2 FD 08 00 2A C8 01 00 40 FD 24 E0 28 FD 41 E8 28 D8 41 01 98 FC E7 68 2A C9 A1 00 50 FC 00 03 32 FF 6D 07 F2 FF 57 02 F2 D8 01 01 90 FF 38 01 72 FE CD 07 B2 C9 A1 00 38 FC 6E 02 72 FC 52 01 F2 FF 0E 02 B2 FE F2 02 32 FD 6D 02 FA C8 01 01 98 FD 4F 1A BA FC B0 01 7A FD 13 12 3A FF D1 DF BA FD 8D D3 38 FC D0 C9 B8 FD 2F C2 78 FC F3 B9 F8 FF F1 B7 F8 FC 84 E0 2A FC 21 E8 2A 7C 9C D5 AE 7F 9C 9A 14 D8 3D 00 08 7D 89 D5 AE D9 67 00 08 7C CB D5 AE D8 A6 00 08 7D 2A D5 AE D9 45 00 08 7C E8 D5 AE D9 04 00 08 7F FA 05 AE DB C3 00 08 42 00 FD AC
+
+. 0 10008470 84
+. 80 C1 00 34 7E F7 82 14 80 E1 01 64 38 C6 00 01 81 01 01 60 7F 86 78 40 81 21 01 5C 81 41 01 58 38 E7 00 10 81 61 01 54 39 08 00 10 39 29 00 10 39 4A 00 10 39 6B 00 10 90 C1 00 34 90 E1 01 64 91 01 01 60 91 21 01 5C 91 41 01 58 91 61 01 54 40 BC F0 B8
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 6, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 6, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 6, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 6, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 6, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 6, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 6, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 6
+. 0 10009DB8 8
+. 2F 97 00 06 41 9E 11 88
+
+. 0 1000AF44 88
+. 81 81 00 24 3D 20 AA AA 80 E1 01 44 61 29 AA AB 81 41 00 18 7D 6C 48 16 39 00 00 00 82 87 00 00 55 E0 18 38 91 01 00 38 7F 88 78 40 7D 2A 48 16 7E 20 A2 14 7E 40 8A 14 55 76 F0 BE 7F A0 92 14 7F 80 EA 14 55 35 F0 BE 39 80 00 00 3A E0 00 00 1E 16 00 05 40 BC F4 00
+
+. 0 1000AF9C 108
+. 81 61 00 1C 1C 15 00 03 1C F5 00 05 81 3E 80 CC 1D 16 00 03 81 5E 80 D0 2F 0B FF FF 90 01 00 F0 56 CB 08 3C 56 C0 10 3A 92 21 01 14 7C E8 03 A6 92 81 01 18 56 B1 08 3C 91 01 00 F8 56 AE 10 3A 91 21 01 00 3A 80 00 00 91 41 01 04 93 81 01 08 93 A1 01 0C 92 41 01 10 91 61 00 F4 90 01 00 FC 80 E1 00 38 2F 87 00 00 40 9E 03 48
+
+. 0 1000B008 64
+. 81 01 01 00 80 E1 01 04 C0 08 00 00 D0 01 00 3C C2 61 00 3C C0 07 00 00 FE 40 98 90 D0 01 00 40 FE 20 00 90 D0 01 00 44 FE 00 98 90 FD E0 00 90 D0 01 00 48 FD C0 98 90 2F 96 00 00 41 9E 02 A8
+
+. 0 1000B048 400
+. 80 E1 00 1C 3D 00 43 30 81 3E 80 DC 56 9B 18 38 6C E0 80 00 91 01 00 08 90 01 00 0C 7C 17 C1 D6 C8 29 00 00 57 32 18 38 C8 01 00 08 57 13 18 38 81 1E 80 D4 7E C9 03 A6 FC 00 08 28 80 FE 80 F0 C0 28 00 00 54 1C 18 38 C2 87 00 00 FC 00 00 18 EE A0 00 72 7C E8 02 A6 7C 0C AA 14 7D 71 62 14 7D 4E 62 14 7C 00 C9 D6 81 21 00 F0 7D 07 62 14 7C 9B FC 2E 7C E9 62 14 7D 3B FA 14 7D 6B C9 D6 54 00 18 38 C0 69 00 04 7D 20 FA 14 C1 09 00 04 39 8C 00 01 7C FF 04 2E 7C 17 B2 14 7D 4A C9 D6 55 6B 18 38 7C AB FA 14 7D 2B FC 2E C1 65 00 04 7E 94 CA 14 7F 7B 92 14 7D 08 C9 D6 55 4A 18 38 7C CA FA 14 7C 0A FC 2E C1 A6 00 04 EC C9 00 2A 81 41 00 F4 55 08 18 38 7C E7 C9 D6 7D 28 FA 14 7D 48 FC 2E C1 89 00 04 EC AB 68 2A EC 4A 38 2A 81 01 00 FC EC 2C 40 2A 54 E7 18 38 7D 27 FA 14 ED 29 00 28 ED 6B 68 28 7F E7 FC 2E ED 4A 38 28 C3 C9 00 04 ED 8C 40 28 80 E1 00 F8 ED 06 05 32 7D 2A BA 14 EC E5 05 32 7D 67 BA 14 EC 02 05 32 7D 48 BA 14 ED A1 05 32 7D 10 BA 14 EC E3 38 28 7C 00 C1 D6 ED 04 40 28 7C FC D2 14 ED 35 02 72 3A F7 00 01 ED 75 02 F2 EC 1F 00 28 7D 29 C1 D6 ED BE 68 28 54 00 18 38 ED 55 02 B2 7C C0 D2 14 ED 95 03 32 EC 84 30 2A 7D 6B C1 D6 EC C8 58 2A 55 29 18 38 EC 63 28 2A 7C A9 D2 14 EC A7 48 28
+
+. 0 1000B1D8 276
+. EF FF 10 2A 7D 4A C1 D6 EC 40 60 2A 55 6B 18 38 EF DE 08 2A 7C 8B D2 14 EC 2D 50 28 ED 08 58 28 7D 08 C1 D6 ED AD 50 2A 55 4A 18 38 EC E7 48 2A 7C 6A D2 14 EC 00 60 28 EF 85 08 28 55 08 18 38 ED 67 68 28 7F A8 D2 14 ED 88 00 28 ED 08 00 2A C0 01 00 40 EF A6 10 28 EC E7 68 2A EC C6 10 2A C0 41 00 48 EC A5 08 2A C0 21 00 44 EF 60 03 32 EE E0 02 F2 C0 01 00 48 ED 24 F8 28 ED 43 F0 28 EC 00 07 32 EF 41 01 B2 ED A1 01 72 EC 2F 01 F2 D0 01 01 48 EF 02 07 72 C0 01 00 3C EE D1 02 72 EF 2F 02 32 EC 51 02 B2 ED 10 0A 38 C0 21 01 48 ED 60 DA FA EC B3 D1 7A ED 52 B2 BA EC F0 C9 FA EF 8E C7 3A ED 80 BB 38 EC D3 69 B8 ED 32 12 78 EF AE 0F 78 EC 84 F8 2A EC 63 F0 2A 7C 9C D5 2E 7F 9C 9A 14 D0 67 00 04 7D 9A 05 2E D1 66 00 04 7C C9 D5 2E D0 A5 00 04 7D 2B D5 2E D1 44 00 04 7D 0A D5 2E D0 E3 00 04 7F A8 D5 2E D3 9D 00 04 42 00 FD B4
+
+. 0 1000B2EC 84
+. 80 E1 00 38 7E F7 82 14 81 01 01 18 38 E7 00 01 81 21 01 14 7F 87 78 40 81 41 01 10 81 61 01 0C 39 08 00 08 90 E1 00 38 39 29 00 08 80 E1 01 08 39 4A 00 08 39 6B 00 08 91 01 01 18 38 E7 00 08 91 21 01 14 91 41 01 10 91 61 01 0C 90 E1 01 08 40 BC F0 5C
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 6, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 6, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 6, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 6, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 6, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 6, stride = 1
+. 0 100065C4 20
+. 54 A0 10 3A 38 A5 00 01 7D 26 00 2E 7D 6B 49 D6 42 00 FF F0
+
+. 0 10010A80 32
+. 82 71 00 08 3A 80 00 01 7D C9 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7E 58 73 96 40 9C 00 94
+
+. 0 10010AC0 68
+. 3E A0 43 30 FF C0 E0 90 3B F0 FF FF 7F 9C DA 14 92 A1 00 08 7C 1C C3 96 7F B9 BA 14 3A D6 00 01 3B 5A 00 10 7C 00 C1 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 83 F5
+
+. 0 10010B04 16
+. 7C 39 BD AE FC 20 F8 90 3B 39 00 10 48 01 84 85
+
+. 0 10010B14 12
+. 37 FF FF FF D8 3D 00 08 40 82 FF B0
+
+PASS: gsl_fft_real_wavetable_alloc, n = 6, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 6
+. 0 10011E48 124
+. 7C 08 1A 14 55 4B 18 38 7D 20 1A 14 7C 1D 01 D6 39 6B 00 08 7D 3D 49 D6 54 00 18 38 7D BF 04 AE 55 29 18 38 7C 1D 41 D6 7C 09 FC AE 7D 08 DA 14 FD 6D 00 2A FD AD 00 28 54 00 18 38 7C 1F 04 AE 7D 38 39 D6 FD 8B 02 B2 7C E7 8A 14 FD AD 02 72 7C 18 51 D6 55 29 18 38 FD 80 60 28 7D 4A 8A 14 FC 00 58 2A 7D 6B C1 D6 54 00 18 38 7C 09 CD AE 7D 99 05 AE 7D AB CD AE 42 00 FF 88
+
+. 0 10010F4C 36
+. 81 21 00 24 81 41 00 30 2F 89 00 00 39 31 00 01 83 6A FF 00 55 29 F8 7E 38 09 FF FF 7E 31 D9 D6 40 9E 09 9C
+
+. 0 10011908 32
+. 2F 9B 00 02 39 60 00 00 83 E1 00 20 3B A0 00 01 83 21 00 10 83 01 00 14 91 61 00 24 40 9E F6 68
+
+. 0 100119AC 20
+. 38 05 00 01 3B 60 00 01 54 00 F8 7E 2B 80 00 01 40 9D 00 F8
+
+. 0 100119C0 32
+. 7C 17 03 78 38 9C 00 10 38 71 FF FE 2F 9A 00 00 C8 04 FF F8 C9 04 FF F0 FC E0 00 50 41 9E 00 C4
+
+. 0 100119E0 192
+. 57 69 08 3C 7F 49 03 A6 38 C9 FF FF 38 E3 FF FF 7C C8 33 78 81 41 00 2C 55 0B 18 38 39 6B 00 08 7D 28 52 14 7D 6B E9 D6 54 CA 18 38 39 4A 00 08 7C 1D 49 D6 55 29 18 38 39 29 00 08 7D 6B FC AE 54 EB 18 38 39 6B 00 08 54 00 18 38 7D 29 E9 D6 7D 9F 04 AE FC 07 03 32 7D A9 FC AE 7C 1D 41 D6 7D 08 2A 14 FD 47 03 72 FD A8 03 7A 54 00 18 38 7C 1F 04 AE 7D 38 39 D6 FD 88 53 38 7C E7 8A 14 FD 4B 68 28 7C 18 31 D6 FD 6B 68 2A FD 20 60 28 55 29 18 38 FD 40 50 50 7C C6 8A 14 FC 00 60 2A 7D 4A C1 D6 54 00 18 38 7C 19 05 AE 7D 6B C1 D6 7D 6A CD AE 7D 29 CD AE 7D 4B CD AE 42 00 FF 58
+
+. 0 10011AA0 20
+. 3B 7B 00 01 38 63 FF FE 7F 97 D8 40 38 84 00 10 41 9D FF 1C
+
+. 0 10011AB4 8
+. 70 AB 00 01 40 A2 FC FC
+
+PASS: gsl_fft_real with signal_real_noise, n = 6, stride = 1
+. 0 1000C674 32
+. 82 71 00 08 3A 80 00 01 7D D2 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7D 37 73 96 40 9C 00 94
+
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 6, stride = 1
+. 0 1000D37C 20
+. 38 1B 00 01 3A A0 00 01 54 00 F8 7E 2B 80 00 01 40 9D 01 98
+
+. 0 1000D524 8
+. 73 67 00 01 40 A2 F9 88
+
+. 0 1000D52C 8
+. 2F 94 00 00 41 BE F9 80
+
+. 0 1000D534 160
+. FD 3E F0 2A 7E 89 03 A6 57 66 08 3C 38 FB FF FF 38 A0 00 00 1D 25 00 03 7D 47 FA 14 7D 0A FA 14 7D 57 51 D6 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 55 2B 18 38 7C 1C 01 D6 39 6B 00 08 55 4A 18 38 7C A5 DA 14 7D 3C 49 D6 54 00 18 38 7D 5D 04 AE 7D 6B E1 D6 55 29 18 38 7C 09 EC AE FD 80 50 28 7D AB EC AE FC 00 00 2A 7C 17 39 D6 7C E7 DA 14 FD A9 03 72 FD 60 60 50 7D 17 41 D6 FC 00 50 2A FD 8C 68 28 54 00 18 38 FD 6B 68 28 7C 1A 05 AE 55 08 18 38 7D 8A D5 AE 7D 68 D5 AE 42 00 FF 78
+
+. 0 1000D5D4 28
+. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 F4 04
+
+. 0 1000C9F0 52
+. 81 61 00 34 83 21 00 20 83 EB FF 00 80 01 00 18 7F 39 F9 D6 81 81 00 28 2F 8C 00 00 7F 60 CB 96 93 21 00 20 39 3B 00 01 55 29 F8 7E 38 09 FF FF 40 9E 06 5C
+
+. 0 1000D07C 32
+. 2F 9F 00 02 38 C0 00 00 83 A1 00 1C 3B 80 00 01 83 41 00 10 82 E1 00 14 90 C1 00 28 40 9E F9 A8
+
+. 0 1000D0C4 72
+. 81 61 00 2C 7C 08 E1 D6 7D 28 5A 14 7D 6A E1 D6 54 00 20 36 7C 1D 04 AE 7D 4A 3A 14 7D AB EC AE 7C 08 B9 D6 7D 08 DA 14 FD 80 68 28 FC 00 68 2A 7D 29 B9 D6 54 00 18 38 7C 1A 05 AE 55 29 18 38 7D 89 D5 AE 42 00 FF BC
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 6, stride = 1
+. 0 10012A68 32
+. 82 71 00 08 3A 80 00 01 7D C9 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7E 58 73 96 40 9C 00 9C
+
+. 0 10012AA8 68
+. 3E A0 43 30 FF C0 E0 90 3B F0 FF FF 7F 9C DA 14 92 A1 00 08 7C 1C C3 96 7F B9 BA 14 3A D6 00 01 3B 5A 00 08 7C 00 C1 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 64 0D
+
+. 0 10012AEC 20
+. FC 00 08 18 FC 20 F8 90 7C 19 BD 2E 3B 39 00 08 48 01 64 99
+
+. 0 10012B00 16
+. 37 FF FF FF FC 20 08 18 D0 3D 00 04 40 82 FF A8
+
+PASS: gsl_fft_real_wavetable_float_alloc, n = 6, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 6
+. 0 10013E78 136
+. 7C 08 1A 14 55 4B 10 3A 7D 20 1A 14 7C 1F 01 D6 39 6B 00 04 7D 3F 49 D6 54 00 10 3A 7D 7D 04 2E 55 29 10 3A 7C 1F 41 D6 7C 09 EC 2E 7D 08 DA 14 ED 4B 00 2A 54 00 10 3A ED 6B 00 28 7D 9D 04 2E 7D 38 39 D6 FD A0 50 90 7C E7 8A 14 FC 00 60 90 ED 6B 02 32 FD AD 02 72 7C 18 51 D6 55 29 10 3A ED 8C 50 2A 7D 4A 8A 14 FC 00 68 28 7D 6B C1 D6 54 00 10 3A 7D 89 CD 2E FC 00 00 18 7C 19 05 2E 7D 6B CD 2E 42 00 FF 7C
+
+. 0 10012F3C 36
+. 81 21 00 24 81 41 00 30 2F 89 00 00 39 31 00 01 83 6A FF 00 55 29 F8 7E 38 09 FF FF 7E 31 D9 D6 40 9E 09 D8
+
+. 0 10013934 32
+. 2F 9B 00 02 39 60 00 00 83 A1 00 20 3B E0 00 01 83 21 00 10 83 01 00 14 91 61 00 24 40 9E F6 2C
+
+. 0 100139D8 20
+. 38 04 00 01 3B 60 00 01 54 00 F8 7E 2B 80 00 01 40 9D 00 F8
+
+. 0 100139EC 32
+. 38 7C 00 08 7C 17 03 78 3B 91 FF FE 2F 9A 00 00 C0 03 FF FC C1 03 FF F8 FC E0 00 50 41 9E 00 C4
+
+. 0 10013A0C 192
+. 57 69 08 3C 7F 49 03 A6 38 A9 FF FF 38 DC FF FF 7C A7 2B 78 81 41 00 2C 54 EB 10 3A 39 6B 00 04 54 A8 10 3A 7D 27 52 14 7D 6B F9 D6 54 CA 10 3A 39 08 00 04 39 4A 00 04 7C 1F 49 D6 55 29 10 3A 39 29 00 04 7D 6B EC 2E 54 00 10 3A 7D 29 F9 D6 7D BD 04 2E ED 87 03 72 7C 09 EC 2E 7C 1F 39 D6 7C E7 22 14 ED 88 60 3A EC 07 00 32 54 00 10 3A 7D 38 31 D6 ED 4B 60 28 7C C6 8A 14 ED A8 03 78 7C 1D 04 2E ED 6B 60 2A 7C 18 29 D6 FD 40 50 50 ED 20 68 28 55 29 10 3A EC 00 68 2A 7C A5 8A 14 7D 08 C1 D6 54 00 10 3A 7C 19 05 2E 7D 4A C1 D6 7D 68 CD 2E 7D 29 CD 2E 7D 4A CD 2E 42 00 FF 58
+
+. 0 10013ACC 20
+. 3B 7B 00 01 3B 9C FF FE 7F 97 D8 40 38 63 00 08 41 9D FF 1C
+
+. 0 10013AE0 8
+. 70 8B 00 01 40 A2 FC FC
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 6, stride = 1
+. 0 1000E834 32
+. 82 71 00 08 3A 80 00 01 7D D2 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7D 37 73 96 40 9C 00 9C
+
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 6, stride = 1
+. 0 1000F548 20
+. 38 1B 00 01 3A 80 00 01 54 00 F8 7E 2B 80 00 01 40 9D 01 B0
+
+. 0 1000F708 8
+. 73 67 00 01 40 A2 F9 70
+
+. 0 1000F710 8
+. 2F 93 00 00 41 BE F9 68
+
+. 0 1000F718 160
+. ED 3D E8 2A 7E 69 03 A6 57 66 08 3C 38 FB FF FF 38 A0 00 00 1D 25 00 03 7D 47 CA 14 7D 0A CA 14 7D 57 51 D6 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 55 2B 10 3A 7C 1C 01 D6 39 6B 00 04 55 4A 10 3A 7C A5 DA 14 7D 3C 49 D6 54 00 10 3A 7D 5F 04 2E 55 29 10 3A 7D 6B E1 D6 7C 09 FC 2E ED 80 50 28 7D AB FC 2E EC 00 00 2A 7C 17 39 D6 7C E7 DA 14 ED A9 03 72 FD 60 60 50 EC 00 50 2A 7D 17 41 D6 ED 8C 68 28 ED 6B 68 28 54 00 10 3A 7C 1A 05 2E 7D 8A D5 2E 55 08 10 3A 7D 68 D5 2E 42 00 FF 78
+
+. 0 1000F7B8 28
+. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 F3 E8
+
+. 0 1000EBB8 52
+. 81 61 00 34 83 21 00 20 83 AB FF 00 80 01 00 18 7F 39 E9 D6 81 81 00 28 2F 8C 00 00 7F 60 CB 96 93 21 00 20 39 3B 00 01 55 29 F8 7E 38 09 FF FF 40 9E 06 60
+
+. 0 1000F248 32
+. 2F 9D 00 02 38 C0 00 00 83 E1 00 1C 3B 80 00 01 83 41 00 10 82 E1 00 14 90 C1 00 28 40 9E F9 A4
+
+. 0 1000F290 72
+. 81 61 00 2C 7C 08 E1 D6 7D 28 5A 14 7D 6A E1 D6 54 00 18 38 7C 1F 04 2E 7D 4A 3A 14 7D AB FC 2E 7C 08 B9 D6 7D 08 DA 14 ED 80 68 28 EC 00 68 2A 7D 29 B9 D6 54 00 10 3A 7C 1A 05 2E 55 29 10 3A 7D 89 D5 2E 42 00 FF BC
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 6, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 6, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 6
+PASS: gsl_fft_complex_forward with signal_noise, n = 6, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 6, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 6, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 6, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 6, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 6, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 6, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 6, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 6, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 6, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 6
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 6, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 6, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 6, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 6, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 6, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 6, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 6, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 6, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 6, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 6, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 6
+PASS: gsl_fft_real with signal_real_noise, n = 6, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 6, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 6, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 6, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 6
+PASS: gsl_fft_real_float with signal_real_noise, n = 6, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 6, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 6, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 6, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 6
+PASS: gsl_fft_complex_forward with signal_noise, n = 6, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 6, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 6, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 6, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 6, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 6, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 6, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 6, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 6, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 6, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 6
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 6, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 6, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 6, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 6, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 6, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 6, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 6, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 6, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 6, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 6, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 6
+PASS: gsl_fft_real with signal_real_noise, n = 6, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 6, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 6, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 6, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 6
+PASS: gsl_fft_real_float with signal_real_noise, n = 6, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 6, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 6, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 7, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 7
+. 0 10006F98 8
+. 2F 97 00 07 41 9E 15 EC
+
+. 0 10008588 108
+. 81 81 00 24 3D 20 24 92 80 E1 00 18 61 29 49 25 80 C1 01 88 7D 0C 48 16 55 EA 20 36 82 66 00 00 3A C0 00 00 3A 80 00 00 7D 27 48 16 7E 2A 9A 14 7D 68 60 50 81 9E 80 64 7E 4A 8A 14 55 6B F8 7E C8 2C 00 00 7C 09 38 50 7F AA 92 14 54 00 F8 7E 7D 08 5A 14 7F 8A EA 14 7D 29 02 14 55 10 F0 BE 7F 6A E2 14 55 2E F0 BE 48 02 09 05
+
+. 0 100085F4 28
+. 81 3E 80 68 1C 10 00 06 D8 21 00 60 CB C9 00 00 90 01 01 00 FC 20 F0 90 48 02 08 E9
+
+. 0 10008610 20
+. 81 3E 80 6C D8 21 00 68 CB E9 00 00 FC 20 F8 90 48 02 08 D5
+
+. 0 10008624 16
+. 80 DE 80 64 D8 21 00 70 C8 26 00 00 48 02 09 65
+
+. 0 10008634 12
+. D8 21 00 78 FC 20 F0 90 48 02 09 59
+
+. 0 10008640 12
+. D8 21 00 80 FC 20 F8 90 48 02 09 4D
+
+. 0 1000864C 16
+. 7F 96 78 40 D8 21 00 88 92 C1 00 58 40 BC EF 20
+
+. 0 1000865C 124
+. 80 01 00 1C 1C CE 00 03 1C EE 00 05 81 9E 80 44 1D 0E 00 06 2F 00 FF FF 1D 50 00 03 90 C1 01 08 1D 70 00 05 90 E1 01 0C 55 C0 10 3A 56 06 08 3C 56 07 10 3A 91 81 01 24 92 61 01 3C 55 CC 08 3C 91 01 01 10 7C 08 03 A6 91 41 01 18 3A 60 00 00 91 61 01 20 93 61 01 28 93 81 01 2C 93 A1 01 30 92 41 01 34 92 21 01 38 90 C1 01 14 90 E1 01 1C 81 01 00 58 2F 88 00 00 40 9E 05 AC
+
+. 0 100086D8 160
+. 81 3E 80 40 80 C1 01 24 C8 09 00 00 D8 01 00 90 C8 06 00 00 80 C1 00 90 80 E1 00 94 D8 01 00 98 90 C1 00 A0 90 E1 00 A4 80 E1 00 98 81 01 00 9C 90 E1 00 A8 91 01 00 AC 81 01 00 A0 81 21 00 A4 91 01 00 B0 91 21 00 B4 81 21 00 A8 81 41 00 AC 91 21 00 B8 91 41 00 BC 80 C1 00 B8 80 E1 00 BC 81 41 00 B0 81 61 00 B4 90 C1 00 C8 90 E1 00 CC 91 41 00 C0 91 61 00 C4 91 41 00 D0 91 61 00 D4 90 C1 00 D8 90 E1 00 DC 91 41 00 E0 91 61 00 E4 90 C1 00 E8 90 E1 00 EC 2F 90 00 00 41 9E 04 9C
+
+. 0 10008778 400
+. C8 E1 00 78 3C E0 43 30 C9 01 00 80 7E 09 03 A6 FD A7 38 2A C9 61 00 88 FD 88 40 2A CA E1 00 60 FD 47 40 2A CB 01 00 68 FD AD 40 28 CB 21 00 88 FD 87 60 28 80 DE 80 70 FD 2B 58 2A CB 41 00 70 FD 17 C0 2A C8 46 00 00 FD AD C8 2A 80 C1 01 8C FD 2A 48 2A 81 3E 80 50 FD 8C C8 28 6C C0 80 00 FD 4A C8 28 90 01 00 0C FC E8 D0 2A 90 E1 00 08 FD AD 10 24 80 DE 80 40 7C 16 C1 D6 56 75 20 36 57 31 20 36 57 12 20 36 54 17 20 36 FD 4A 10 24 FD 8C 10 24 FD 29 10 24 FC E7 10 24 FC 17 B8 2A FD 78 C0 2A FC DA D0 2A FC 00 C0 28 FD 77 58 28 FD 08 30 28 FC 00 D0 28 FD 6B D0 2A FE 08 10 24 FE 40 10 24 C8 01 00 08 FE 2B 10 24 C8 49 00 00 FC 00 10 28 C8 46 00 00 FE 67 10 28 FD 20 02 72 FD E0 02 B2 FD C0 03 72 D9 21 00 F8 FC 00 03 32 D8 01 00 F0 7C E8 02 A6 81 21 01 0C 80 C1 01 08 7C 14 72 14 7D 6C A2 14 7C 00 C9 D6 7D 07 A2 14 7E F5 FC AE 7C E9 A2 14 81 21 01 10 7D 46 A2 14 7C C9 A2 14 7D 6B C9 D6 7D 35 FA 14 54 00 20 36 CA C9 00 08 7D 20 FA 14 7C BF 04 AE 7C E7 C9 D6 55 6B 20 36 C8 E9 00 08 7C AB FA 14 7C CB FC AE 7F 77 D2 14 C9 05 00 08 3A 94 00 01 7C C6 C9 D6 54 E7 20 36 7D 67 FA 14 7C 87 FC AE C8 6B 00 08 7D 76 82 14 FD 46 20 28 80 01 01 14 7D 4A C9 D6 54 C6 20 36 7D 26 FA 14 7D 86 FC AE C9 69 00 08
+
+. 0 10008908 400
+. FD 28 18 28 FF 25 60 28 80 C1 01 1C 7D 08 C9 D6 55 4A 20 36 7C 2A FC AE 7C 6A FA 14 C8 43 00 08 FF 07 58 28 FC C6 20 2A 7D 40 B2 14 55 08 20 36 FD 08 18 2A 7D A8 FC AE 7C 88 FA 14 C8 04 00 08 FC A5 60 2A FF ED 08 2A C8 61 00 F8 FC E7 58 2A 80 01 01 18 FF C0 10 2A 7C E6 B2 14 FD AD 08 28 81 21 01 20 FC 00 10 28 80 C1 01 00 FD 86 28 2A 7D 00 B2 14 FD 68 38 2A 7C 09 B2 14 FC 2A C8 28 7D 26 B2 14 FC 49 C0 28 7D 6B C1 D6 FF A5 F8 28 7E 73 CA 14 FF 87 F0 28 7E B5 8A 14 FC 23 00 72 3A D6 00 01 7D 4A C1 D6 55 6B 20 36 FC 43 00 B2 C8 61 00 F0 7C CB D2 14 FF 6D 50 28 FF 40 48 28 7D 08 C1 D6 FC A6 28 28 55 4A 20 36 FC E8 38 28 7C AA D2 14 FF B2 07 72 7C E7 C1 D6 55 08 20 36 FE F7 60 2A 7C 88 D2 14 FE D6 58 2A FC DF 30 28 FD 1E 40 28 7C 00 C1 D6 FD 4D 50 2A 54 E7 20 36 FD 20 48 2A 7C 67 D2 14 FD B9 68 28 FC 18 00 28 7D 29 C1 D6 FF 92 07 32 54 00 20 36 7F A0 D2 14 FE F7 F8 2A FF 63 06 F2 55 29 20 36 7F 89 D2 14 FF 43 06 B2 7E F7 D5 AE 7E F7 92 14 FE D6 F0 2A FC D1 01 B2 FD 11 02 32 FC B0 01 72 FD AE 03 72 FC 0E 00 32 FD 8C F8 2A FD 6B F0 2A FD 4A C8 2A FD 29 C0 2A CB 01 00 B8 FF E0 E8 50 FC 60 08 50 FC 80 10 50 FC F0 01 F2 FD 4F 02 B2 FD 2F 02 72 FD 93 BB 3A CA E1 00 D8 FD 73 B2 FA FF C0 E0 50
+
+. 0 10008A98 376
+. FF FF 28 28 FC 63 68 28 FC 84 00 28 FF BD 30 2A FF 9C 40 2A FD AD D8 2A FC 00 D0 2A FC A5 30 28 FC 42 D0 28 FF DE 38 28 FC 21 D8 28 FC E7 40 28 FC 84 48 2A FD AD 50 2A FC 00 48 2A FF EC F8 2A FF AC E8 2A FF 8B E0 2A FC 42 48 2A FD 8C 28 2A FC 63 50 2A FC 21 50 2A FF CB F0 2A FD 6B 38 2A FC BF 20 28 FC FD 00 28 FC DC 68 2A FF BD 00 2A C8 01 00 C8 FF 9C 68 28 C9 A1 00 A8 FD 4C 10 2A FF FF 20 2A C8 81 00 98 FD 8C 10 28 C8 41 00 D8 FD 2B 08 28 FD 1E 18 2A FD 6B 08 2A FF 64 07 72 FF DE 18 28 C8 61 00 E8 FE A2 01 72 FC 44 07 32 C8 81 00 B8 FF 38 03 32 FE 83 01 F2 C8 61 00 C8 DA DB 00 08 FF 00 02 B2 FC 04 02 F2 FC 97 02 32 CA E1 00 E8 FF 4D 07 F2 FC 2D 07 B2 FD A3 02 72 FC 77 01 B2 CA E1 00 90 FF 97 DF 3A CA E1 00 B0 CB 61 00 A0 FD 77 CA FA CB 21 00 C0 CA E1 00 90 FF DB D7 BA CB 41 00 D0 CB 61 00 E0 FD 39 C2 7A CB 21 00 B0 CB 01 00 A0 FD 1A AA 3A CB 41 00 C0 FC DB A1 BA CB 61 00 D0 FD 99 03 38 C8 01 00 E0 FF B7 17 78 FF F8 0F F8 FD 5A 6A B8 7F AB D5 AE DB 86 00 08 FC BB 21 78 7F EA D5 AE DB C5 00 08 FC E0 19 F8 7D 88 D5 AE D9 64 00 08 7D 47 D5 AE D9 23 00 08 7C BA 05 AE D9 1D 00 08 7C E9 D5 AE D8 DC 00 08 42 00 FC 60
+
+. 0 10008C10 100
+. 80 C1 00 58 80 E1 01 00 38 C6 00 01 81 01 01 3C 7F 86 78 40 81 21 01 38 81 41 01 34 7E D6 3A 14 81 61 01 30 39 08 00 10 80 E1 01 28 39 29 00 10 90 C1 00 58 39 4A 00 10 80 C1 01 2C 39 6B 00 10 38 E7 00 10 91 01 01 3C 38 C6 00 10 91 21 01 38 91 41 01 34 91 61 01 30 90 C1 01 2C 90 E1 01 28 40 BC E9 08
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 7, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 7, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 7, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 7, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 7, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 7, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 7, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 7
+. 0 10009DC0 8
+. 2F 97 00 07 41 9E 16 40
+
+. 0 1000B404 112
+. 81 81 00 18 3D 20 24 92 81 41 00 24 61 29 49 25 81 61 01 44 3A 60 00 00 7D 0A 48 16 80 01 00 24 82 8B 00 00 55 EA 18 38 80 FE 80 F4 3A E0 00 00 7E 2A A2 14 7D 2C 48 16 7E 4A 8A 14 7D 68 00 50 C8 27 00 00 55 6B F8 7E 7F AA 92 14 7C 09 60 50 7D 08 5A 14 54 00 F8 7E 7F 8A EA 14 7D 29 02 14 55 10 F0 BE 7F 6A E2 14 55 2E F0 BE 48 01 DA 85
+
+. 0 1000B474 32
+. 81 3E 80 F8 FC 20 08 18 1C 10 00 06 CB C9 00 00 90 01 00 A8 D0 21 00 4C FC 20 F0 90 48 01 DA 65
+
+. 0 1000B494 24
+. 81 3E 80 FC FC 20 08 18 CB E9 00 00 D0 21 00 50 FC 20 F8 90 48 01 DA 4D
+
+. 0 1000B4AC 20
+. 80 FE 80 F4 FC 20 08 18 D0 21 00 54 C8 27 00 00 48 01 DA D9
+
+. 0 1000B4C0 16
+. FC 20 08 18 D0 21 00 58 FC 20 F0 90 48 01 DA C9
+
+. 0 1000B4D0 16
+. FC 20 08 18 D0 21 00 5C FC 20 F8 90 48 01 DA B9
+
+. 0 1000B4E0 20
+. 39 80 00 00 7F 8C 78 40 FC 20 08 18 D0 21 00 60 40 BC EE A8
+
+. 0 1000B4F4 140
+. 1C EE 00 03 80 01 00 1C 1D 0E 00 05 92 81 00 EC 1D 2E 00 06 90 E1 00 AC 1D 50 00 03 80 FE 80 CC 1D 70 00 05 91 01 00 B4 81 1E 80 D0 2F 00 FF FF 91 21 00 B8 55 C9 08 3C 91 41 00 C4 55 CA 10 3A 91 61 00 CC 7D 60 00 D0 90 E1 00 D0 56 00 08 3C 56 07 10 3A 91 01 00 D4 93 61 00 D8 7D 28 03 A6 93 81 00 DC 3A 80 00 00 93 A1 00 E0 92 41 00 E4 92 21 00 E8 91 41 00 B0 91 61 00 BC 90 01 00 C0 90 E1 00 C8 2F 8C 00 00 40 9E 05 B4
+
+. 0 1000B580 76
+. 81 01 00 D0 80 E1 00 D4 C0 08 00 00 D0 01 00 64 C0 21 00 64 C0 07 00 00 D0 21 00 6C D0 01 00 68 D0 01 00 70 D0 21 00 74 D0 01 00 78 D0 21 00 7C D0 01 00 80 D0 21 00 84 D0 01 00 88 D0 21 00 8C D0 01 00 90 2F 90 00 00 41 9E 05 04
+
+. 0 1000B5CC 400
+. C0 21 00 58 3D 20 43 30 C0 41 00 5C 7E 09 03 A6 FD 80 08 90 C1 21 00 4C C1 A1 00 50 FC 00 10 90 C2 E1 00 50 ED 41 10 2A EC C9 68 2A C0 A1 00 60 FD A0 48 90 C3 41 00 54 FD 0C 60 2A 80 FE 81 00 FC E0 00 2A 81 5E 80 DC FD 20 B8 90 C8 27 00 00 FD 08 00 28 80 E1 00 BC FC 0D 68 2A 91 21 00 08 FD 60 28 90 6C E0 80 00 FC 60 50 90 90 01 00 0C ED 4A 28 28 80 FE 81 04 FC A0 D0 90 7C 17 C1 D6 FC 00 48 28 56 95 18 38 FD 8C 38 28 57 31 18 38 FC 8B 58 2A 57 12 18 38 FC 00 28 28 54 16 18 38 EC E6 D0 2A FD 08 58 2A FC 00 08 24 FD 8C 58 28 D8 01 00 98 FC 63 20 2A C8 01 00 08 FD 65 28 2A FD 4A 08 24 FD 08 08 24 FD 8C 08 24 FC 63 08 24 FC C6 58 28 FC E7 08 24 FC C6 08 24 FC 49 48 2A D8 C1 00 A0 FD AD 10 28 FD AD 28 2A FE 4D 08 24 C8 2A 00 00 FC 00 08 28 C8 27 00 00 FE 67 08 28 FD C0 00 F2 FE 20 02 B2 FE 00 02 32 FD E0 03 32 81 01 00 AC 7C E8 02 A6 81 21 00 B0 7C 13 72 14 7D 48 9A 14 7C 00 C9 D6 7D 09 9A 14 81 21 00 B4 7D 67 9A 14 CA E1 00 98 7C E9 9A 14 81 21 00 B8 7D 6B C9 D6 54 00 18 38 7C C9 9A 14 7C BF 04 2E 7D 35 FA 14 7E 95 FC 2E C2 A9 00 04 7D 20 FA 14 7C E7 C9 D6 55 6B 18 38 C0 E9 00 04 7C AB FA 14 7C CB FC 2E 7F B7 82 14 C1 45 00 04 7F 76 D2 14 7C C6 C9 D6 54 E7 18 38 7D 67 FA 14 7C 87 FC 2E
+
+. 0 1000B75C 400
+. C0 6B 00 04 3A 73 00 01 ED 86 20 28 80 01 00 C0 7D 4A C9 D6 54 C6 18 38 7D 26 FA 14 7D 26 FC 2E C1 09 00 04 ED 6A 18 28 EF A5 48 28 80 E1 00 C4 7D 08 C9 D6 55 4A 18 38 7C 6A FA 14 7C 2A FC 2E C0 43 00 04 EF 87 40 28 EC A5 48 2A 81 21 00 CC 55 08 18 38 EC C6 20 2A 7C 88 FA 14 7D A8 FC 2E C0 04 00 04 EC E7 40 2A EF 6D 08 2A 81 01 00 C8 EF 40 10 2A 81 41 00 A8 ED 4A 18 2A 7F 80 BA 14 EF 26 28 2A 7C 07 BA 14 EC 00 10 28 7C A8 BA 14 EC 4B E0 28 7C 89 BA 14 EF 0A 38 2A 7C 6A BA 14 ED AD 08 28 7F BD C1 D6 EC 2C E8 28 7E 94 CA 14 EC 85 D8 28 7E B5 8A 14 EC 67 D0 28 3A F7 00 01 ED 39 D8 2A 7F 9C C1 D6 EF C0 58 28 57 BD 18 38 EC A6 28 28 7D 3D D2 14 EC DB 30 28 ED 60 58 2A 7C 00 C1 D6 EC 1C 00 28 57 9C 18 38 7D 7C D2 14 ED 18 D0 2A EF ED 60 28 7C A5 C1 D6 EC EA 38 28 54 00 18 38 ED 5A 50 28 7D 40 D2 14 ED 8D 60 2A 7C 84 C1 D6 ED BD 68 28 54 A5 18 38 7D 05 D2 14 ED 6B E0 2A 7C 63 C1 D6 54 84 18 38 7C E4 D2 14 54 63 18 38 FC 4E 00 B2 7C C3 D2 14 FC 97 01 32 FC 77 00 F2 CA E1 00 A0 ED 8C E8 2A FC 2E 00 72 FD 33 02 72 FC D2 01 B2 FC 10 00 32 FF CF 07 B2 FC B7 01 72 FC F7 01 F2 FC 40 10 18 EE 94 C8 2A FD 13 02 32 FD 52 02 B2 FD B0 03 72 FF EF 07 F2 FC 80 20 18 FC 60 18 18 FC 20 08 18 EE B5 C0 2A
+
+. 0 1000B8EC 400
+. FD 71 02 F2 EE 94 D8 2A FC C0 30 18 FF C0 F0 18 FC 00 00 18 FF 60 10 50 FD 91 03 32 FD 20 48 18 EE B5 D0 2A FD 40 50 18 FF E0 F8 18 FC A0 28 18 FC E0 38 18 FD A0 68 18 FF A0 20 50 FF 80 18 50 FF 40 08 50 FD 00 40 18 FD 60 58 18 ED 34 48 2A EF 7B 00 28 EC 84 30 2A EC 00 F0 2A FD 80 60 18 ED 15 40 2A EF BD 28 28 EF 9C 38 28 EC A5 30 28 EC E7 50 28 EF 5A 68 28 EC 21 F8 28 EC 42 F0 28 C3 C1 00 70 EC 63 50 2A ED AD F8 2A C3 E1 00 78 EC 00 58 2A EC 89 20 2A EF 7B 58 2A ED AD 60 2A EC 21 60 2A EC 42 58 2A EF A9 E8 2A EF 88 E0 2A EC 68 18 2A ED 29 28 2A ED 08 38 2A EF 5A 60 2A EC E4 00 28 EC BD D8 28 ED 68 08 28 ED 89 10 2A EC C3 68 2A EC 84 00 2A C0 01 00 80 ED 29 10 28 C0 41 00 90 ED 08 08 2A C0 21 00 88 EC 63 68 28 EF BD D8 2A C3 61 00 68 ED 5C D0 2A EC 42 01 F2 EF 9C D0 28 EE E0 03 32 EF 5B 01 32 D0 41 01 48 ED BB 00 F2 C3 61 00 88 EF 1F 02 72 EE C1 01 72 EC 3F 02 32 EF E0 02 F2 C0 01 00 90 EF 3E 07 72 EC 5E 07 32 EF DB 02 B2 EF 60 01 B2 C0 01 00 64 EC 60 D0 FA C3 41 00 6C C0 01 00 74 EF 9A CF 3A C3 41 00 7C ED 00 C2 3A C0 01 00 84 ED 7A BA FA C2 E1 00 8C C3 41 01 48 ED 40 B2 BA C0 01 00 64 EC D7 D1 BA C3 41 00 7C EC 80 69 38 C2 E1 00 74 C1 A1 00 6C ED 9A FB 38 C0 01 00 8C ED 37 0A 78
+
+. 0 1000BA7C 80
+. C3 E1 00 84 EF AD 17 78 EC E0 D9 F8 7E 96 D5 2E EC BF F1 78 D2 BB 00 04 7E D6 92 14 7C 9D D5 2E D0 69 00 04 7F BC D5 2E D3 8B 00 04 7D 3A 05 2E D1 0A 00 04 7D 85 D5 2E D1 68 00 04 7C A4 D5 2E D1 47 00 04 7C E3 D5 2E D0 C6 00 04 42 00 FC 14
+
+. 0 1000BACC 92
+. 80 E1 00 EC 39 8C 00 01 7F 8C 78 40 81 01 00 E8 38 E7 00 08 81 21 00 E4 81 41 00 E0 39 08 00 08 81 61 00 DC 39 29 00 08 90 E1 00 EC 39 4A 00 08 80 E1 00 D8 39 6B 00 08 80 01 00 A8 38 E7 00 08 91 01 00 E8 7E F7 02 14 91 21 00 E4 91 41 00 E0 91 61 00 DC 90 E1 00 D8 40 BC E8 74
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 7, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 7, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 7, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 7, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 7, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 7, stride = 1
+. 0 10006588 16
+. 7D 28 5B 96 7C 09 59 D6 7F 88 00 00 40 9E FF F0
+
+. 0 10006584 20
+. 39 6B 00 02 7D 28 5B 96 7C 09 59 D6 7F 88 00 00 40 9E FF F0
+
+. 0 10006598 24
+. 54 E0 10 3A 7D 28 4B 78 2F 89 00 01 7D 66 01 2E 38 E7 00 01 40 9E FF DC
+
+PASS: gsl_fft_real_wavetable_alloc, n = 7, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 7
+. 0 10010FA4 76
+. 3C 00 43 30 80 FE 82 6C 90 01 00 08 3A 40 00 00 93 61 00 0C 7E 91 DB 96 C9 A7 00 00 C8 01 00 08 81 3E 82 70 FC 00 68 28 81 01 00 18 CB E9 00 00 81 21 00 30 FF FF 00 24 83 89 00 00 7E 08 8B 96 FC 20 F8 90 7F 48 DB 96 48 01 7F 09
+
+. 0 10010FF0 12
+. FF C0 08 90 FC 20 F8 90 48 01 7F 9D
+
+. 0 10010FFC 12
+. 7F 92 80 40 FF A0 08 90 40 9C 00 D8
+
+. 0 10011008 72
+. 82 FE 82 74 38 60 00 00 82 DE 82 78 56 86 08 3C 38 A0 00 00 7C 18 19 D6 C8 D7 00 00 C8 F6 00 00 38 E0 00 00 39 43 FF FF 7F 6B DB 78 54 04 18 38 2F 07 00 00 C9 36 00 00 C9 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
+
+. 0 10011060 12
+. 39 00 00 00 7F 88 D8 40 40 9C 00 44
+
+. 0 1001106C 36
+. 7F 69 03 A6 7C A9 2B 78 7C 09 E9 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 18 38 7D 9F 04 AE 41 9E 00 14
+
+. 0 100110A0 12
+. FD 0B 43 3A FD 2A 4B 3A 42 00 FF CC
+
+. 0 10011074 28
+. 7C 09 E9 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 18 38 7D 9F 04 AE 41 9E 00 14
+
+. 0 10011090 28
+. FC 07 02 F2 FD A7 02 B2 FD 46 02 B8 FD 66 6A FA FD 0B 43 3A FD 2A 4B 3A 42 00 FF CC
+
+. 0 100110AC 4
+. 40 9A 08 1C
+
+. 0 100110B0 24
+. 7D 24 CD AE 38 E7 00 01 39 6B FF FF 7F 8B 38 40 7D 4A 32 14 40 9C FF 74
+
+. 0 10011038 24
+. 2F 07 00 00 C9 36 00 00 C9 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
+
+. 0 10011050 28
+. FC 07 07 72 FD A6 07 72 FC C6 07 BA FC E7 6F B8 39 00 00 00 7F 88 D8 40 40 9C 00 44
+
+. 0 100118C8 8
+. 7F 8B 38 40 40 9D 00 24
+
+. 0 100118D0 32
+. 55 49 18 38 7C 18 51 D6 39 29 00 08 7D 29 C1 D6 54 00 18 38 7D 39 05 AE 7D 09 CD AE 4B FF F7 C8
+
+. 0 100110B4 20
+. 38 E7 00 01 39 6B FF FF 7F 8B 38 40 7D 4A 32 14 40 9C FF 74
+
+. 0 100110C8 20
+. 3A 52 00 01 7C A5 A2 14 7F 92 80 40 7C 63 8A 14 41 9C FF 44
+
+. 0 100110DC 8
+. 2F 94 00 01 41 9E 06 D4
+
+PASS: gsl_fft_real with signal_real_noise, n = 7, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 7, stride = 1
+. 0 1000CA58 76
+. 3C 00 43 30 81 1E 81 84 90 01 00 08 3A 40 00 00 93 E1 00 0C 81 21 00 20 C9 A8 00 00 C8 01 00 08 7D C9 FB 96 81 3E 81 88 FC 00 68 28 81 41 00 34 CB E9 00 00 81 61 00 18 FF FF 00 24 82 0A 00 00 7E 6B FB 96 FC 20 F8 90 48 01 C4 55
+
+. 0 1000CAA4 12
+. FF C0 08 90 FC 20 F8 90 48 01 C4 E9
+
+. 0 1000CAB0 12
+. 7F 92 70 40 FF A0 08 90 40 9C 00 DC
+
+. 0 1000CABC 40
+. 7E BF D9 D6 82 DE 81 8C 80 BE 81 90 3B 20 00 00 3B 00 00 00 38 60 00 00 C9 16 00 00 7F 83 F8 40 C9 25 00 00 40 9C 00 A0
+
+. 0 1000CAE4 40
+. 7C 18 D9 D6 7F 26 CB 78 7C 1C 01 D6 7C 95 91 D6 54 07 18 38 2F 83 00 00 C9 85 00 00 C9 76 00 00 FD 40 60 90 41 9E 00 18
+
+. 0 1000CB20 28
+. 39 00 00 00 39 64 FF FF 57 6A 08 3C 2F 88 00 00 7C 08 F8 50 7F 00 40 00 40 9E 04 8C
+
+. 0 1000CB3C 40
+. C8 05 00 00 7D A7 EC AE FC 0A 00 32 FC 0B 03 78 FD 8C 00 2A 39 08 00 01 7D 6B 52 14 7C 08 F8 50 7F 80 40 40 40 9C FF CC
+
+. 0 1000CB2C 16
+. 2F 88 00 00 7C 08 F8 50 7F 00 40 00 40 9E 04 8C
+
+. 0 1000CFC4 28
+. FD A9 02 B2 55 69 18 38 39 29 00 08 FC 09 02 F2 FD 68 6A F8 FD 48 02 BA 41 9A 00 28
+
+. 0 1000CFE0 36
+. 7D 29 E1 D6 7C 1C 59 D6 7C 09 EC AE FC 0A 00 32 54 00 18 38 7D BD 04 AE FC 0B 03 78 FC 00 00 2A 4B FF FB 4C
+
+. 0 1000CB4C 24
+. FD 8C 00 2A 39 08 00 01 7D 6B 52 14 7C 08 F8 50 7F 80 40 40 40 9C FF CC
+
+. 0 1000CB64 28
+. 7C 17 31 D6 38 63 00 01 7F 83 F8 40 7C C6 9A 14 54 00 18 38 7D 9A 05 AE 41 9C FF 7C
+
+. 0 1000CAF8 20
+. 2F 83 00 00 C9 85 00 00 C9 76 00 00 FD 40 60 90 41 9E 00 18
+
+. 0 1000CB0C 48
+. FC 09 07 B2 FD A9 07 72 FC 08 07 7A FD 08 6F B8 FD 20 00 90 39 00 00 00 39 64 FF FF 57 6A 08 3C 2F 88 00 00 7C 08 F8 50 7F 00 40 00 40 9E 04 8C
+
+. 0 1000CB80 20
+. 3A 52 00 01 7F 18 FA 14 7F 92 70 40 7F 39 DA 14 41 9C FF 40
+
+. 0 1000CB94 8
+. 2F 9B 00 01 41 9E 03 18
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 7, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 7, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 7
+. 0 10012F94 76
+. 3C 00 43 30 80 FE 82 C8 90 01 00 08 3A 40 00 00 93 61 00 0C 7E 91 DB 96 C9 A7 00 00 C8 01 00 08 81 3E 82 CC FC 00 68 28 81 01 00 18 CB E9 00 00 81 21 00 30 FF FF 00 24 83 89 00 00 7E 08 8B 96 FC 20 F8 90 7F 48 DB 96 48 01 5F 19
+
+. 0 10012FE0 12
+. FF C0 08 18 FC 20 F8 90 48 01 5F AD
+
+. 0 10012FEC 12
+. 7F 92 80 40 FF A0 08 18 40 9C 00 D8
+
+. 0 10012FF8 72
+. 82 FE 82 D0 38 60 00 00 82 DE 82 D4 56 86 08 3C 38 A0 00 00 7C 18 19 D6 C0 D7 00 00 C0 F6 00 00 38 E0 00 00 39 43 FF FF 7F 6B DB 78 54 04 10 3A 2F 07 00 00 C1 36 00 00 C1 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
+
+. 0 10013050 12
+. 39 00 00 00 7F 88 D8 40 40 9C 00 44
+
+. 0 1001305C 36
+. 7F 69 03 A6 7C A9 2B 78 7C 09 F9 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 10 3A 7D 9D 04 2E 41 9E 00 14
+
+. 0 10013090 12
+. ED 0B 43 3A ED 2A 4B 3A 42 00 FF CC
+
+. 0 10013064 28
+. 7C 09 F9 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 10 3A 7D 9D 04 2E 41 9E 00 14
+
+. 0 10013080 28
+. EC 07 02 F2 ED A7 02 B2 ED 46 02 B8 ED 66 6A FA ED 0B 43 3A ED 2A 4B 3A 42 00 FF CC
+
+. 0 1001309C 4
+. 40 9A 08 58
+
+. 0 100130A0 24
+. 7D 24 CD 2E 38 E7 00 01 39 6B FF FF 7F 8B 38 40 7D 4A 32 14 40 9C FF 74
+
+. 0 10013028 24
+. 2F 07 00 00 C1 36 00 00 C1 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
+
+. 0 10013040 28
+. EC 07 07 72 ED A6 07 72 EC C6 07 BA EC E7 6F B8 39 00 00 00 7F 88 D8 40 40 9C 00 44
+
+. 0 100138F4 8
+. 7F 8B 38 40 40 9D 00 24
+
+. 0 100138FC 32
+. 55 49 10 3A 7C 18 51 D6 39 29 00 04 7D 29 C1 D6 54 00 10 3A 7D 39 05 2E 7D 09 CD 2E 4B FF F7 8C
+
+. 0 100130A4 20
+. 38 E7 00 01 39 6B FF FF 7F 8B 38 40 7D 4A 32 14 40 9C FF 74
+
+. 0 100130B8 20
+. 3A 52 00 01 7C A5 A2 14 7F 92 80 40 7C 63 8A 14 41 9C FF 44
+
+. 0 100130CC 8
+. 2F 94 00 01 41 9E 07 10
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 7, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 7, stride = 1
+. 0 1000EC20 76
+. 3C 00 43 30 80 DE 81 FC 90 01 00 08 3A 40 00 00 93 A1 00 0C C9 A6 00 00 C8 01 00 08 81 3E 82 00 FC 00 68 28 80 E1 00 20 CB E9 00 00 7D C7 EB 96 81 01 00 34 FF FF 00 24 81 21 00 18 82 08 00 00 7E 69 EB 96 FC 20 F8 90 48 01 A2 8D
+
+. 0 1000EC6C 12
+. FF C0 08 18 FC 20 F8 90 48 01 A3 21
+
+. 0 1000EC78 12
+. 7F 92 70 40 FF A0 08 18 40 9C 00 DC
+
+. 0 1000EC84 40
+. 7E BD D9 D6 82 DE 82 04 80 BE 82 08 3B 20 00 00 3B 00 00 00 38 60 00 00 C1 16 00 00 7F 83 E8 40 C1 25 00 00 40 9C 00 A0
+
+. 0 1000ECAC 40
+. 7C 18 D9 D6 7F 26 CB 78 7C 1C 01 D6 7C 95 91 D6 54 07 10 3A 2F 83 00 00 C1 85 00 00 C1 76 00 00 FD 40 60 90 41 9E 00 18
+
+. 0 1000ECE8 28
+. 39 00 00 00 39 64 FF FF 57 6A 08 3C 2F 88 00 00 7C 08 E8 50 7F 00 40 00 40 9E 04 90
+
+. 0 1000ED04 40
+. C0 05 00 00 7D A7 FC 2E EC 0A 00 32 EC 0B 03 78 ED 8C 00 2A 39 08 00 01 7D 6B 52 14 7C 08 E8 50 7F 80 40 40 40 9C FF CC
+
+. 0 1000ECF4 16
+. 2F 88 00 00 7C 08 E8 50 7F 00 40 00 40 9E 04 90
+
+. 0 1000F190 28
+. EC 09 02 B2 55 69 10 3A ED A9 02 F2 39 29 00 04 ED 68 02 F8 ED 48 6A BA 41 9A 00 28
+
+. 0 1000F1AC 36
+. 7D 29 E1 D6 7C 1C 59 D6 7C 09 FC 2E EC 0A 00 32 54 00 10 3A 7D BF 04 2E EC 0B 03 78 EC 00 00 2A 4B FF FB 48
+
+. 0 1000ED14 24
+. ED 8C 00 2A 39 08 00 01 7D 6B 52 14 7C 08 E8 50 7F 80 40 40 40 9C FF CC
+
+. 0 1000ED2C 28
+. 7C 17 31 D6 38 63 00 01 7F 83 E8 40 7C C6 9A 14 54 00 10 3A 7D 9A 05 2E 41 9C FF 7C
+
+. 0 1000ECC0 20
+. 2F 83 00 00 C1 85 00 00 C1 76 00 00 FD 40 60 90 41 9E 00 18
+
+. 0 1000ECD4 48
+. EC 09 07 B2 ED A9 07 72 EC 08 07 7A ED 08 6F B8 FD 20 00 90 39 00 00 00 39 64 FF FF 57 6A 08 3C 2F 88 00 00 7C 08 E8 50 7F 00 40 00 40 9E 04 90
+
+. 0 1000ED48 20
+. 3A 52 00 01 7F 18 EA 14 7F 92 70 40 7F 39 DA 14 41 9C FF 40
+
+. 0 1000ED5C 8
+. 2F 9B 00 01 41 9E 03 1C
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 7, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 7, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 7
+PASS: gsl_fft_complex_forward with signal_noise, n = 7, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 7, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 7, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 7, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 7, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 7, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 7, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 7, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 7, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 7, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 7
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 7, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 7, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 7, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 7, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 7, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 7, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 7, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 7, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 7, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 7, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 7
+PASS: gsl_fft_real with signal_real_noise, n = 7, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 7, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 7, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 7, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 7
+PASS: gsl_fft_real_float with signal_real_noise, n = 7, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 7, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 7, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 7, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 7
+PASS: gsl_fft_complex_forward with signal_noise, n = 7, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 7, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 7, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 7, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 7, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 7, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 7, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 7, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 7, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 7, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 7
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 7, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 7, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 7, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 7, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 7, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 7, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 7, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 7, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 7, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 7, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 7
+PASS: gsl_fft_real with signal_real_noise, n = 7, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 7, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 7, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 7, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 7
+PASS: gsl_fft_real_float with signal_real_noise, n = 7, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 7, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 7, stride = 3
+. 0 100069AC 60
+. 7F FF CA 14 92 81 00 08 7C 1F BB 96 3B 9C 00 01 7F BA C2 14 3A B5 00 01 3B 7B 00 10 7C 00 B9 D6 7F E0 F8 50 93 E1 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 02 25 11
+
+. 0 1000696C 32
+. 82 50 00 08 3A 60 00 01 7D D1 73 78 93 70 01 08 7D CE 91 D6 7F 93 90 40 7E D7 73 96 40 9C 00 8C
+
+PASS: gsl_fft_complex_wavetable_alloc, n = 8, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 8
+. 0 10007BDC 8
+. 2F 8E 00 00 41 BE FE 48
+
+. 0 10007BE4 4
+. 40 9A 00 20
+
+. 0 10007BE8 28
+. CB 11 FF F0 CA F1 FF F8 CB 6C FF F0 CB 2C FF F8 CB 92 FF F0 CB 52 FF F8 4B FF FE 48
+
+. 0 10007A48 8
+. 2F 9C 00 00 41 9E 01 74
+
+. 0 10006F34 40
+. 81 61 01 88 80 01 00 24 82 EB FF 00 81 81 00 28 7C 00 B9 D6 80 C1 00 18 2F 8C 00 00 90 01 00 24 7D E6 03 96 40 9E 06 F4
+
+. 0 1000764C 32
+. 2F 97 00 02 38 E0 00 00 83 E1 00 2C 3B 20 00 01 83 41 00 10 83 01 00 14 90 E1 00 28 40 9E F9 10
+
+. 0 100076D8 132
+. 81 61 01 80 7D 28 FA 14 C9 29 00 08 7C 84 CA 14 7C 05 5A 14 7D 88 FC AE 7C 00 C9 D6 7D 6A D2 14 38 A5 00 01 7D 08 EA 14 54 00 20 36 7D 20 FA 14 7D 1F 04 AE C8 E9 00 08 7C 07 32 14 FC 0C 40 28 7C 00 C1 D6 FD A9 38 28 38 E7 00 01 FD 8C 40 2A FD 66 00 32 54 00 20 36 FD 46 03 72 7D 20 D2 14 7D 8A D5 AE 7D 4A 1A 14 FD A5 5B 7A FC 05 50 38 FD 29 38 2A D9 2B 00 08 7C 1A 05 AE D9 A9 00 08 42 00 FF 80
+
+. 0 100075A0 172
+. 38 60 00 00 80 01 02 84 81 81 01 A4 81 C1 01 A8 7C 08 03 A6 81 E1 01 AC 7D 81 81 20 82 01 01 B0 82 21 01 B4 82 41 01 B8 82 61 01 BC 82 81 01 C0 82 A1 01 C4 82 C1 01 C8 82 E1 01 CC 83 01 01 D0 83 21 01 D4 83 41 01 D8 83 61 01 DC 83 81 01 E0 83 A1 01 E4 83 C1 01 E8 83 E1 01 EC C9 C1 01 F0 C9 E1 01 F8 CA 01 02 00 CA 21 02 08 CA 41 02 10 CA 61 02 18 CA 81 02 20 CA A1 02 28 CA C1 02 30 CA E1 02 38 CB 01 02 40 CB 21 02 48 CB 41 02 50 CB 61 02 58 CB 81 02 60 CB A1 02 68 CB C1 02 70 CB E1 02 78 38 21 02 80 4E 80 00 20
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 8, stride = 1
+. 0 10007C04 40
+. C8 11 FF F8 C9 AC FF F8 C9 92 FF F8 FE E0 00 50 FF 20 68 50 CB 11 FF F0 FF 40 60 50 CB 6C FF F0 CB 92 FF F0 4B FF FE 20
+
+PASS: gsl_fft_complex_inverse with signal_noise, n = 8, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 8, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 8, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 8, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 8, stride = 1
+. 0 100097D4 60
+. 7F FF CA 14 92 81 00 08 7C 1F BB 96 3B 9C 00 01 7F BA C2 14 3A B5 00 01 3B 7B 00 08 7C 00 B9 D6 7F E0 F8 50 93 E1 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 F6 E9
+
+. 0 10009794 32
+. 82 50 00 08 3A 60 00 01 7D D1 73 78 93 70 01 08 7D CE 91 D6 7F 93 90 40 7E D7 73 96 40 9C 00 94
+
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 8, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 8
+. 0 1000AA28 8
+. 2F 8E 00 00 41 BE FE 44
+
+. 0 1000AA30 4
+. 40 9A 00 20
+
+. 0 1000AA34 28
+. C3 11 FF F8 C2 F1 FF FC C3 72 FF F8 C3 52 FF FC C3 8C FF F8 C3 2C FF FC 4B FF FE 44
+
+. 0 1000A890 8
+. 2F 9C 00 00 41 9E 01 78
+
+. 0 10009D5C 40
+. 81 41 01 44 81 81 00 24 82 EA FF 00 81 61 00 28 7D 8C B9 D6 80 01 00 18 2F 8B 00 00 91 81 00 24 7D E0 63 96 40 9E 06 EC
+
+. 0 1000A46C 32
+. 2F 97 00 02 38 E0 00 00 83 E1 00 2C 3B 20 00 01 83 41 00 10 83 01 00 14 90 E1 00 28 40 9E F9 18
+
+. 0 1000A4F8 132
+. 81 61 01 3C 7D 28 FA 14 C1 29 00 04 7C 84 CA 14 7C 05 5A 14 7D 48 FC 2E 7C 00 C9 D6 38 A5 00 01 7D 08 EA 14 54 00 18 38 7D 20 FA 14 7D 1F 04 2E C0 E9 00 04 7C 07 32 14 EC 0A 40 28 7C 00 C1 D6 ED A9 38 28 7D 2A D2 14 ED 4A 40 2A 38 E7 00 01 ED 86 00 32 ED 66 03 72 54 00 18 38 ED 29 38 2A 7D 60 D2 14 ED A5 63 7A 7D 4A D5 2E EC 05 58 38 7D 4A 1A 14 D1 29 00 04 7C 1A 05 2E D1 AB 00 04 42 00 FF 80
+
+. 0 1000A3C0 172
+. 38 60 00 00 80 01 02 34 81 81 01 54 81 C1 01 58 7C 08 03 A6 81 E1 01 5C 7D 81 81 20 82 01 01 60 82 21 01 64 82 41 01 68 82 61 01 6C 82 81 01 70 82 A1 01 74 82 C1 01 78 82 E1 01 7C 83 01 01 80 83 21 01 84 83 41 01 88 83 61 01 8C 83 81 01 90 83 A1 01 94 83 C1 01 98 83 E1 01 9C C9 C1 01 A0 C9 E1 01 A8 CA 01 01 B0 CA 21 01 B8 CA 41 01 C0 CA 61 01 C8 CA 81 01 D0 CA A1 01 D8 CA C1 01 E0 CA E1 01 E8 CB 01 01 F0 CB 21 01 F8 CB 41 02 00 CB 61 02 08 CB 81 02 10 CB A1 02 18 CB C1 02 20 CB E1 02 28 38 21 02 30 4E 80 00 20
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 8, stride = 1
+. 0 1000AA50 40
+. C0 11 FF FC C1 B2 FF FC C1 8C FF FC FE E0 00 50 FF 40 68 50 C3 11 FF F8 FF 20 60 50 C3 72 FF F8 C3 8C FF F8 4B FF FE 1C
+
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 8, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 8, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 8, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 8, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 8, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 8, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 8
+. 0 10012184 160
+. 7C 06 72 14 7D 44 3A 14 7D 20 72 14 7C 1D 01 D6 7D 69 72 14 54 E8 18 38 39 08 00 08 54 00 18 38 7D 3D 49 D6 7D BF 04 AE 7D 7D 59 D6 55 29 18 38 7D 29 FC AE 7C 1D 31 D6 55 6B 18 38 7D 6B FC AE 7C C6 D2 14 FD 4D 58 28 54 00 18 38 FD AD 58 2A 7D 9F 04 AE 7D 38 39 D6 FD 40 50 50 7C E7 8A 14 FC 0C 48 2A FD 8C 48 28 7C 18 29 D6 55 29 18 38 FD 60 68 28 7C A5 8A 14 FC 00 68 2A 7D 58 51 D6 54 00 18 38 7C 19 05 AE 7D 89 CD AE 7D 08 C1 D6 55 4A 18 38 7D 48 CD AE 7D 6A CD AE 42 00 FF 64
+
+. 0 10011ABC 8
+. 2F 9A 00 00 41 BE FC F4
+
+. 0 10011AC4 88
+. 38 E5 FF FF 7F 49 03 A6 7C E8 3B 78 7C 1D 41 D6 81 81 00 2C 54 EA 18 38 7D 68 62 14 39 4A 00 08 7D 38 39 D6 54 00 18 38 7C 1F 04 AE 7D 08 2A 14 7C E7 8A 14 7D 7D 59 D6 55 29 18 38 7C 09 CD AE 55 6B 18 38 7D 4A C1 D6 7C 0B FC AE FC 00 00 50 7C 0A CD AE 42 00 FF B8
+
+. 0 10011B1C 28
+. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F4 18
+
+. 0 10011B38 4
+. 4B FF FC 98
+
+PASS: gsl_fft_real with signal_real_noise, n = 8, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 8, stride = 1
+. 0 1000D6D4 20
+. 39 FB 00 01 3A 40 00 01 55 E0 F8 7E 2B 80 00 01 40 9D 01 F0
+
+. 0 1000D8D4 8
+. 73 66 00 01 40 A2 F5 D8
+
+. 0 1000D8DC 8
+. 2F 91 00 00 41 BE F5 D0
+
+. 0 1000D8E4 208
+. 80 FE 81 6C 38 9B FF FF 7E 29 03 A6 57 63 08 3C C9 27 00 00 7C 85 23 78 57 7F 10 3A 7D 23 2A 14 54 AB 18 38 55 2A 18 38 7C 1C 29 D6 39 6B 00 08 81 81 00 30 39 4A 00 08 7D 04 62 14 7D 3C 49 D6 54 00 18 38 7D 9D 04 AE 7C E8 62 14 7C C7 62 14 7C A5 FA 14 7D 6B E1 D6 55 29 18 38 7D A9 EC AE FD 4C 68 28 7D 4A E1 D6 7D 6B EC AE FD 8C 68 2A FD 4A 02 72 7C 0A EC AE 7C 17 21 D6 FD 8C 60 2A 7C 84 DA 14 FD AB 00 2A FC 00 58 28 7D 17 41 D6 54 00 18 38 FD AD 02 72 7D 9A 05 AE FC 00 00 2A 7C F7 39 D6 55 08 18 38 FD 6A 68 2A FD 4A 68 28 7C D7 31 D6 FD 60 58 50 54 E7 18 38 7D 48 D5 AE 7C 07 D5 AE 54 C6 18 38 7D 66 D5 AE 42 00 FF 50
+
+. 0 1000D9B4 28
+. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 F0 24
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 8, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 8, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 8
+. 0 100141E0 160
+. 7C 06 72 14 7D 44 3A 14 7D 20 72 14 7C 1F 01 D6 7D 69 72 14 54 E8 10 3A 39 08 00 04 54 00 10 3A 7D 3F 49 D6 7D BD 04 2E 7D 7F 59 D6 55 29 10 3A 7D 29 EC 2E 7C 1F 31 D6 55 6B 10 3A 7D 6B EC 2E 7C C6 D2 14 ED 4D 58 28 54 00 10 3A ED AD 58 2A 7D 9D 04 2E 7D 38 39 D6 FD 40 50 50 7C E7 8A 14 EC 0C 48 2A ED 8C 48 28 7C 18 29 D6 55 29 10 3A ED 60 68 28 7C A5 8A 14 EC 00 68 2A 7D 58 51 D6 54 00 10 3A 7C 19 05 2E 7D 89 CD 2E 7D 08 C1 D6 55 4A 10 3A 7D 48 CD 2E 7D 6A CD 2E 42 00 FF 64
+
+. 0 10013AE8 8
+. 2F 9A 00 00 41 BE FC F4
+
+. 0 10013AF0 88
+. 38 E4 FF FF 7F 49 03 A6 7C E8 3B 78 7C 1F 41 D6 81 81 00 2C 54 EA 10 3A 7D 68 62 14 39 4A 00 04 7D 38 39 D6 54 00 10 3A 7C 1D 04 2E 7D 08 22 14 7C E7 8A 14 7D 7F 59 D6 55 29 10 3A 7C 09 CD 2E 55 6B 10 3A 7D 4A C1 D6 7C 0B EC 2E FC 00 00 50 7C 0A CD 2E 42 00 FF B8
+
+. 0 10013B48 28
+. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F3 DC
+
+. 0 10013B64 4
+. 4B FF FC 98
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 8, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 8, stride = 1
+. 0 1000F8B8 20
+. 39 FB 00 01 3A 40 00 01 55 E0 F8 7E 2B 80 00 01 40 9D 01 F0
+
+. 0 1000FAB8 8
+. 73 66 00 01 40 A2 F5 C0
+
+. 0 1000FAC0 8
+. 2F 91 00 00 41 BE F5 B8
+
+. 0 1000FAC8 216
+. 80 FE 81 E4 38 9B FF FF 7E 29 03 A6 57 63 08 3C C9 27 00 00 7C 85 23 78 57 7D 10 3A 7D 23 2A 14 54 AB 10 3A 55 2A 10 3A 7C 1C 29 D6 39 6B 00 04 81 81 00 30 39 4A 00 04 7D 04 62 14 7D 3C 49 D6 54 00 10 3A 7D 5F 04 2E 7C E8 62 14 7C C7 62 14 7C A5 EA 14 7D 6B E1 D6 55 29 10 3A 7C 09 FC 2E ED AA 00 28 7D 4A E1 D6 7D 6B FC 2E ED 4A 00 2A 7D 8A FC 2E 7C 17 21 D6 FD AD 02 72 7C 84 DA 14 EC 0B 60 2A ED 8C 58 28 7D 17 41 D6 FD A0 68 18 54 00 10 3A ED 4A 50 2A 7C F7 39 D6 ED 8C 60 2A FC 00 02 72 55 08 10 3A 7D 5A 05 2E 7C D7 31 D6 54 E7 10 3A FC 00 00 18 ED 6D 00 2A 54 C6 10 3A ED AD 00 28 FD 60 58 50 7D A8 D5 2E 7D 87 D5 2E 7D 66 D5 2E 42 00 FF 48
+
+. 0 1000FBA0 28
+. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 F0 00
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 8, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 8, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 8
+PASS: gsl_fft_complex_forward with signal_noise, n = 8, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 8, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 8, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 8, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 8, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 8, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 8, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 8, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 8, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 8, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 8
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 8, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 8, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 8, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 8, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 8, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 8, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 8, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 8, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 8, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 8, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 8
+PASS: gsl_fft_real with signal_real_noise, n = 8, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 8, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 8, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 8, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 8
+PASS: gsl_fft_real_float with signal_real_noise, n = 8, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 8, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 8, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 8, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 8
+PASS: gsl_fft_complex_forward with signal_noise, n = 8, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 8, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 8, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 8, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 8, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 8, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 8, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 8, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 8, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 8, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 8
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 8, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 8, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 8, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 8, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 8, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 8, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 8, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 8, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 8, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 8, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 8
+PASS: gsl_fft_real with signal_real_noise, n = 8, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 8, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 8, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 8, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 8
+PASS: gsl_fft_real_float with signal_real_noise, n = 8, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 8, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 8, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 9, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 9
+. 0 10007974 8
+. 2F 92 00 00 41 BE FE A4
+
+. 0 1000797C 4
+. 40 92 00 18
+
+. 0 10007980 20
+. CB CC FF F0 CB AC FF F8 C8 35 FF F0 CB F5 FF F8 4B FF FE 9C
+
+. 0 1000782C 8
+. 2F 83 00 00 41 9E 01 2C
+
+. 0 1000786C 240
+. 7C 04 A2 14 7D 76 22 14 7C 00 C9 D6 7D 26 FA 14 C8 E9 00 08 7D 07 D2 14 7D 06 FC AE 38 84 00 01 7F BD CA 14 7D 6B C9 D6 54 00 20 36 7D 40 FA 14 7D BF 04 AE C8 0A 00 08 7C 05 1A 14 7C C6 DA 14 55 6B 20 36 7C 00 C1 D6 7D 2B FA 14 7D 8B FC AE C9 69 00 08 7D 37 2A 14 FC 8D 60 2A 38 A5 00 01 FC 60 58 2A 7D 29 C1 D6 FD AD 60 28 54 00 20 36 FC 00 58 28 7D 60 D2 14 FD 44 07 32 55 29 20 36 FD 83 07 32 7D 49 D2 14 FD A2 03 72 FC 02 00 32 FD 48 50 28 FD 87 60 28 FD 08 20 2A FD 6A 00 2A FD 2C 68 28 FD 4A 00 28 7D 07 D5 AE FD 8C 68 2A 7C E7 E2 14 FC BF 02 F2 FC 1D 02 B2 FD BD 03 32 FC DF 02 72 FD 9E 03 3A FD 21 2A 7A FD 5E 6A B8 FD 61 32 F8 FC E7 18 2A D8 E8 00 08 7D 5A 05 AE D9 8B 00 08 7D 69 D5 AE D9 2A 00 08 42 00 FF 14
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 9, stride = 1
+. 0 10007994 28
+. C8 0C FF F8 C9 B5 FF F8 FF A0 00 50 CB CC FF F0 FF E0 68 50 C8 35 FF F0 4B FF FE 80
+
+PASS: gsl_fft_complex_inverse with signal_noise, n = 9, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 9, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 9, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 9, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 9, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 9, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 9
+. 0 1000A7B0 8
+. 2F 92 00 00 41 BE FE 88
+
+. 0 1000A7B8 4
+. 40 92 00 18
+
+. 0 1000A7BC 20
+. C3 AC FF F8 C3 8C FF FC C3 F5 FF F8 C3 D5 FF FC 4B FF FE 80
+
+. 0 1000A64C 8
+. 2F 83 00 00 41 9E 01 48
+
+. 0 1000A690 264
+. 7C 04 9A 14 7D 76 22 14 7C 00 C9 D6 7D 26 FA 14 C0 A9 00 04 38 84 00 01 7C C6 FC 2E 7F BD CA 14 FD 80 28 90 7C C6 DA 14 7D 6B C9 D6 54 00 18 38 7D 40 FA 14 7D 3F 04 2E C1 4A 00 04 FD 60 30 90 7C 05 1A 14 55 6B 18 38 7C 00 C1 D6 7D 2B FA 14 7D 0B FC 2E C0 E9 00 04 7D 77 2A 14 EC 89 40 2A 7D 27 D2 14 EC 6A 38 2A 7D 6B C1 D6 ED 29 40 28 54 00 18 38 FC 00 20 90 7D 40 D2 14 FD A0 18 90 38 A5 00 01 ED 4A 38 28 55 6B 18 38 FC 00 00 72 7D 0B D2 14 FD AD 00 72 FD 6B 00 28 ED 22 02 72 FD 8C 68 28 ED 42 02 B2 FD 60 58 18 FD 80 60 18 EC C6 20 2A EC 0B 50 2A ED AC 48 28 ED 6B 50 28 7C C7 D5 2E ED 8C 48 2A 7C E7 E2 14 ED 3E 00 32 ED 5C 02 F2 ED 1C 03 32 EC FE 03 72 EC A5 18 2A ED 9D 53 3A ED BF 4B 7A ED 7D 42 F8 D0 A9 00 04 EC 1F 38 38 7D 7A 05 2E D1 8A 00 04 7C 0B D5 2E D1 A8 00 04 42 00 FE FC
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 9, stride = 1
+. 0 1000A7D0 28
+. C0 0C FF FC C1 B5 FF FC FF 80 00 50 C3 AC FF F8 FF C0 68 50 C3 F5 FF F8 4B FF FE 64
+
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 9, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 9, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 9, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 9, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 9, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 9, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 9
+. 0 10011ECC 20
+. 38 1B 00 01 3A C0 00 01 54 00 F8 7E 2B 80 00 01 40 9D 01 A4
+
+. 0 10011EE0 64
+. 81 9E 82 50 3B 57 00 10 80 FE 82 54 3B 9C 00 10 7C 14 03 78 57 77 08 3C CB CC 00 00 CB A7 00 00 2F 95 00 00 C8 1C FF F8 C9 BA FF F8 FC 80 00 50 C8 BC FF F0 FC 40 68 50 C8 7A FF F0 41 9E 01 50
+
+. 0 10011F20 332
+. 56 CB 08 3C 7D 36 D8 50 55 29 08 3C 38 AB FF FF 38 89 FF FF FC 20 F0 90 FF E0 E8 90 7C A6 2B 78 7E A9 03 A6 7D 26 1A 14 7C F7 2A 14 7C 09 1A 14 7D 7D 49 D6 54 0A 18 38 55 29 18 38 39 29 00 08 7C 1D 01 D6 39 4A 00 08 55 6B 18 38 7D 8B FC AE 54 CB 18 38 39 6B 00 08 7D 29 E9 D6 54 00 18 38 7D 7F 04 AE FD 04 03 32 54 E8 18 38 FC E2 02 F2 39 08 00 08 7D 4A E9 D6 7D A9 FC AE 54 A9 18 38 FD 44 03 72 39 29 00 08 7C 0A FC AE FD A5 43 7A 7D 6B E9 D6 FD 22 00 32 FC 03 38 3A 7C 1D 31 D6 7C EB FC AE FD 63 4A F8 54 8B 18 38 39 6B 00 08 FD 85 53 38 7C C6 DA 14 54 00 18 38 7D 58 21 D6 FC CD 00 2A 7C 84 8A 14 FD AD 00 28 FD 4C 58 28 FD 26 00 72 7C F8 39 D6 55 4A 18 38 FD 8C 58 2A 7D 7F 04 AE FD 4A 07 F2 7C 18 29 D6 54 E7 18 38 FC 0C 00 72 7C A5 8A 14 FD 27 48 28 FD AD 07 F2 7D 29 C1 D6 54 00 18 38 FC 0B 00 28 FD 09 50 28 7D 08 C1 D6 FD 6B 60 2A FC E7 30 2A FD 80 68 2A FD 00 40 50 7D 79 05 AE 7D 6B C1 D6 FC 00 68 28 FD 29 50 2A 7C E9 CD AE 7C 07 CD AE 7D 28 CD AE 7D 8A CD AE 7D 0B CD AE 42 00 FE DC
+
+. 0 1001206C 20
+. 3A D6 00 01 3B 9C 00 10 7F 94 B0 40 3B 5A 00 10 41 9D FE 84
+
+. 0 10012080 8
+. 73 68 00 01 40 A2 F7 30
+
+PASS: gsl_fft_real with signal_real_noise, n = 9, stride = 1
+. 0 1000C6B4 68
+. 3E A0 43 30 FF C0 E0 90 3B F0 FF FF 7F 9C DA 14 92 A1 00 08 7C 1C BB 96 7F B9 C2 14 3A D6 00 01 3B 5A 00 10 7C 00 B9 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 C8 01
+
+. 0 1000C6F8 16
+. 7C 39 C5 AE FC 20 F8 90 3B 39 00 10 48 01 C8 91
+
+. 0 1000C708 12
+. 37 FF FF FF D8 3D 00 08 40 82 FF B0
+
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 9, stride = 1
+. 0 1000D390 48
+. 80 DE 81 68 7C 13 03 78 3B 18 00 10 3A D0 00 10 57 79 08 3C CB 86 00 00 2F 94 00 00 C8 36 FF F0 CB F6 FF F8 C8 78 FF F0 C8 58 FF F8 41 9E 01 54
+
+. 0 1000D3C0 336
+. 56 A4 08 3C FF A0 E0 90 38 A4 FF FF 38 60 00 00 7E 89 03 A6 1D 03 00 03 7C C5 FA 14 7C 63 DA 14 7D 64 40 50 7D 08 22 14 7D 6B CA 14 39 08 FF FF 39 6B FF FF 7C 19 42 14 55 6A 18 38 54 09 18 38 39 4A 00 08 39 29 00 08 7D 4A E1 D6 55 07 18 38 38 E7 00 08 7D 29 E1 D6 7D 4A EC AE 54 CA 18 38 FD 40 50 50 39 4A 00 08 7C 1C 01 D6 7D 69 EC AE 54 A9 18 38 FC 8B 50 2A 39 29 00 08 FD 6B 50 28 7D 7C 59 D6 54 00 18 38 7D 1D 04 AE FD A4 07 72 FD 6B 07 B2 55 6B 18 38 7C E7 E1 D6 7C 0B EC AE FD 88 00 28 7D 1C 41 D6 FD 08 00 2A 7C C7 EC AE 7C E6 FA 14 FD 8C 07 B2 54 EB 18 38 39 6B 00 08 FD A6 68 28 55 08 18 38 FC 08 07 72 7D 28 EC AE 7C 17 29 D6 7C A5 DA 14 FD 4D 60 28 FD AD 60 2A FC 09 00 28 FC A3 02 B2 7C D7 31 D6 54 00 18 38 FC E1 03 72 FD 42 02 B2 7C F7 39 D6 54 C6 18 38 FD BF 03 72 FD 80 58 2A 7D 29 B9 D6 FC 00 58 28 54 E7 18 38 FD 29 40 2A FC A2 2B 3A 7D 4A B9 D6 FC FF 38 3A 7D 3A 05 AE FC 01 68 38 7D 6B B9 D6 FD 83 53 38 FC C6 20 2A 7C C9 D5 AE 7C 06 D5 AE 7C EA D5 AE 7D 87 D5 AE 7C AB D5 AE 42 00 FE C8
+
+. 0 1000D510 20
+. 3A B5 00 01 3A D6 00 10 7F 93 A8 40 3B 18 00 10 41 9D FE 88
+
+. 0 1000D2F4 128
+. 1C 07 00 03 7D 07 FA 14 7D 48 FA 14 7D 17 41 D6 7D 26 02 14 39 29 FF FF 55 2B 18 38 39 6B 00 08 7C 1C 01 D6 55 08 18 38 7D 6B E1 D6 54 00 18 38 7D 7D 04 AE 7D 3C 49 D6 7D AB EC AE FD A9 03 72 55 29 18 38 7C 17 39 D6 7C 09 EC AE 7C E7 DA 14 FD 8B 00 28 FC 00 00 2A 7D 57 51 D6 54 00 18 38 FD 4C 68 2A FD 6B 00 2A FD 8C 68 28 55 4A 18 38 7D 7A 05 AE 7D 88 D5 AE 7D 4A D5 AE 42 00 FF 84
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 9, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 9, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 9
+. 0 10013F08 20
+. 38 1B 00 01 3A C0 00 01 54 00 F8 7E 2B 80 00 01 40 9D 01 B8
+
+. 0 10013F1C 76
+. 81 9E 82 B0 3B 57 00 08 80 FE 82 AC 3B 9C 00 08 C0 0C 00 00 7C 14 03 78 57 77 08 3C C3 C7 00 00 D0 01 00 38 81 81 00 38 7D 88 03 A6 2F 95 00 00 C0 1C FF FC C1 BA FF FC FC 80 00 50 C0 BC FF F8 FC 40 68 50 C0 7A FF F8 41 9E 01 58
+
+. 0 10013F68 340
+. 56 CB 08 3C 7D 36 D8 50 7D 08 02 A6 55 29 08 3C 38 AB FF FF 91 01 00 38 38 89 FF FF C0 21 00 38 FF E0 F0 90 7C A6 2B 78 7E A9 03 A6 7D 26 1A 14 54 88 10 3A 7C 09 1A 14 7D 7F 49 D6 54 0A 10 3A 55 29 10 3A 39 29 00 04 7C 1F 01 D6 39 4A 00 04 55 6B 10 3A 7D 4B EC 2E 54 CB 10 3A 39 6B 00 04 7D 29 F9 D6 54 00 10 3A 7D 7D 04 2E ED 84 02 B2 39 08 00 04 ED 22 02 F2 7D 4A F9 D6 7D A9 EC 2E 54 A9 10 3A ED 85 63 7A 39 29 00 04 ED A4 03 72 7C 0A EC 2E 7D 6B F9 D6 ED 23 48 3A EC 02 00 32 ED 45 6A B8 7C 1F 31 D6 EC CC 48 2A 7C EB EC 2E ED 63 02 F8 7D 77 2A 14 ED 8C 48 28 55 6A 10 3A 54 00 10 3A 7C F8 21 D6 ED 0A 58 28 7C 1D 04 2E ED 4A 58 2A 39 4A 00 04 ED 66 00 72 7C C6 DA 14 ED 08 07 F2 7C 18 29 D6 ED AA 00 72 54 E7 10 3A ED 67 58 28 7C A5 8A 14 ED 8C 07 F2 7C 84 8A 14 ED A0 68 28 7D 78 59 D6 ED 2B 40 28 54 00 10 3A EC 00 50 2A EC E7 30 2A 7D 29 C1 D6 ED 4D 60 2A FD 20 48 50 55 6B 10 3A ED AD 60 28 7C 19 05 2E ED 6B 40 2A 7D 4A C1 D6 7C E9 CD 2E 7D AB CD 2E 7D 08 C1 D6 7D 6A CD 2E 7D 47 CD 2E 7D 28 CD 2E 42 00 FE DC
+
+. 0 100140BC 20
+. 3A D6 00 01 3B 9C 00 08 7F 94 B0 40 3B 5A 00 08 41 9D FE 7C
+
+. 0 100140D0 8
+. 73 69 00 01 40 A2 F7 0C
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 9, stride = 1
+. 0 1000E874 68
+. 3E A0 43 30 FF C0 E0 90 3B F0 FF FF 7F 9C DA 14 92 A1 00 08 7C 1C BB 96 7F B9 C2 14 3A D6 00 01 3B 5A 00 08 7C 00 B9 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 A6 41
+
+. 0 1000E8B8 20
+. FC 00 08 18 FC 20 F8 90 7C 19 C5 2E 3B 39 00 08 48 01 A6 CD
+
+. 0 1000E8CC 16
+. 37 FF FF FF FC 20 08 18 D0 3D 00 04 40 82 FF A8
+
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 9, stride = 1
+. 0 1000F55C 48
+. 80 DE 81 E0 7C 12 03 78 3A D6 00 08 3A B0 00 08 57 78 08 3C CB 86 00 00 2F 93 00 00 C0 75 FF F8 C0 55 FF FC C0 36 FF F8 C3 F6 FF FC 41 9E 01 6C
+
+. 0 1000F58C 360
+. 56 83 08 3C FF C0 E0 90 38 83 FF FF 3B A0 00 00 7E 69 03 A6 1D 1D 00 03 7C C4 CA 14 7C A6 CA 14 7F BD DA 14 7D 63 40 50 7D 08 1A 14 7D 6B C2 14 39 08 FF FF 39 6B FF FF 7C 18 42 14 55 6A 10 3A 54 09 10 3A 39 4A 00 04 39 29 00 04 7D 4A E1 D6 55 07 10 3A 38 E7 00 04 7D 29 E1 D6 7D 2A FC 2E 54 CA 10 3A FD 20 48 50 39 4A 00 04 7C 1C 01 D6 7D 49 FC 2E 54 89 10 3A EC 8A 48 2A 39 29 00 04 ED 4A 48 28 7D 7C 59 D6 54 00 10 3A 7D 7F 04 2E FD A0 20 90 ED 4A 07 72 55 6B 10 3A 7C E7 E1 D6 7C EB FC 2E FD AD 07 B2 54 AB 10 3A EC AB 38 2A 39 6B 00 04 7D 1C 41 D6 7C C7 FC 2E ED 6B 38 28 FD 80 28 90 FC 00 30 90 55 08 10 3A ED 6B 07 72 7D 08 FC 2E FD 8C 07 B2 7C 17 21 D6 7C 84 DA 14 FC 00 68 28 FD A0 40 90 EC C6 20 2A FC 00 00 18 7C D7 31 D6 FD AD 60 28 54 00 10 3A ED 08 28 2A ED 80 58 28 FD A0 68 18 7C B7 29 D6 EC 00 58 2A 54 C6 10 3A EC E1 03 32 7D 1A 05 2E ED 2D 50 2A ED 63 00 32 7D 29 B9 D6 ED AD 50 28 54 A5 10 3A EC 02 00 32 ED 9F 03 32 7D 4A B9 D6 ED 62 5B 7A EC FF 3A 7A 7C C9 D5 2E ED A3 03 78 ED 21 62 78 7D 6B B9 D6 7D A6 D5 2E 7D 6A D5 2E 7D 25 D5 2E 7C EB D5 2E 42 00 FE B0
+
+. 0 1000F6F4 20
+. 3A 94 00 01 3A B5 00 08 7F 92 A0 40 3A D6 00 08 41 9D FE 70
+
+. 0 1000F4C0 128
+. 1C 07 00 03 7D 07 CA 14 7D 48 CA 14 7D 17 41 D6 7D 26 02 14 39 29 FF FF 55 2B 10 3A 7C 1C 01 D6 39 6B 00 04 55 08 10 3A 7D 3C 49 D6 54 00 10 3A 7D 7F 04 2E 7D 6B E1 D6 55 29 10 3A 7C 09 FC 2E ED 8B 00 28 7D AB FC 2E EC 00 00 2A 7C 17 39 D6 7C E7 DA 14 ED A9 03 72 ED 6B 00 2A 7D 57 51 D6 ED 4C 68 2A ED 8C 68 28 54 00 10 3A 7D 7A 05 2E 55 4A 10 3A 7D 88 D5 2E 7D 4A D5 2E 42 00 FF 84
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 9, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 9, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 9
+PASS: gsl_fft_complex_forward with signal_noise, n = 9, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 9, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 9, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 9, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 9, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 9, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 9, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 9, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 9, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 9, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 9
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 9, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 9, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 9, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 9, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 9, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 9, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 9, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 9, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 9, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 9, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 9
+PASS: gsl_fft_real with signal_real_noise, n = 9, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 9, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 9, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 9, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 9
+PASS: gsl_fft_real_float with signal_real_noise, n = 9, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 9, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 9, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 9, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 9
+PASS: gsl_fft_complex_forward with signal_noise, n = 9, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 9, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 9, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 9, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 9, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 9, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 9, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 9, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 9, stride = 3
+. 0 FEEF88C 16
+. 55 46 BA 7E 28 06 00 14 39 06 00 5B 40 81 00 38
+
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 9, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 9
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 9, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 9, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 9, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 9, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 9, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 9, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 9, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 9, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 9, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 9, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 9
+PASS: gsl_fft_real with signal_real_noise, n = 9, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 9, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 9, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 9, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 9
+PASS: gsl_fft_real_float with signal_real_noise, n = 9, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 9, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 9, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 10, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 10
+. 0 10007FA0 12
+. 80 E1 00 30 2F 87 00 00 41 BE FD 50
+
+. 0 10007FAC 4
+. 40 8E 00 D0
+
+. 0 10007FB0 52
+. 81 41 01 78 81 61 01 74 80 C1 01 70 80 E1 01 6C CA 0A FF F0 C9 EA FF F8 CA 4B FF F0 CA 2B FF F8 CA C6 FF F0 CA A6 FF F8 CA 87 FF F0 CA 67 FF F8 4B FF FD 40
+
+. 0 10007D20 8
+. 2F 97 00 00 41 9E 02 34
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 10, stride = 1
+. 0 1000807C 68
+. 81 01 01 78 81 21 01 74 81 41 01 70 81 61 01 6C C8 08 FF F8 C9 A9 FF F8 C9 8A FF F8 FD E0 00 50 C9 6B FF F8 FE 20 68 50 FE A0 60 50 CA 08 FF F0 FE 60 58 50 CA 49 FF F0 CA CA FF F0 CA 8B FF F0 4B FF FC 64
+
+PASS: gsl_fft_complex_inverse with signal_noise, n = 10, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 10, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 10, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 10, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 10, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 10, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 10
+. 0 1000AE20 12
+. 81 21 00 30 2F 89 00 00 41 BE FD 24
+
+. 0 1000AE2C 4
+. 40 8E 00 D0
+
+. 0 1000AE30 56
+. 80 E1 01 30 81 01 01 28 C0 07 FF FC 81 21 01 24 C1 C7 FF F8 80 E1 01 2C C2 48 FF F8 C2 87 FF F8 C2 67 FF FC C2 28 FF FC C2 09 FF F8 C1 E9 FF FC D0 01 00 34 4B FF FD 14
+
+. 0 1000AB78 8
+. 2F 97 00 00 41 9E 02 5C
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 10, stride = 1
+. 0 1000AEFC 72
+. 81 41 01 30 81 61 01 2C 80 E1 01 28 81 01 01 24 C0 0A FF FC C1 AB FF FC C1 87 FF FC FC 00 00 50 C1 68 FF FC FE 60 68 50 FE 20 60 50 C1 CA FF F8 FD E0 58 50 C2 8B FF F8 C2 47 FF F8 C2 08 FF F8 D0 01 00 34 4B FF FC 38
+
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 10, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 10, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 10, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 10, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 10, stride = 1
+. 0 10010ACC 56
+. 7F 9C DA 14 92 A1 00 08 7C 1C C3 96 7F B9 BA 14 3A D6 00 01 3B 5A 00 10 7C 00 C1 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 83 F5
+
+PASS: gsl_fft_real_wavetable_alloc, n = 10, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 10
+. 0 100112A4 228
+. 7C 1B D2 14 7D 03 2A 14 7D 20 D2 14 7C 1D 01 D6 7D 69 D2 14 7D 4B D2 14 55 07 18 38 7D 3D 49 D6 54 00 18 38 7D 7F 04 AE 54 A6 18 38 38 C6 00 08 38 E7 00 08 7D 7D 59 D6 55 29 18 38 7D A9 FC AE 7D 5D 51 D6 55 6B 18 38 7D 4B FC AE FD 8D 50 2A 55 4A 18 38 7C 1D D9 D6 7D 0A FC AE FD AD 50 28 7F 7B B2 14 FC 0B 40 2A 54 00 18 38 FD 3C 03 72 7D 5F 04 AE 7D 38 21 D6 FC E0 60 2A 7C 84 8A 14 FC 00 60 28 FD BB 03 72 7C 18 29 D6 55 29 18 38 FD 87 00 F2 7C A5 8A 14 FD 6B 40 28 FC 00 01 32 7D 18 41 D6 54 00 18 38 FD 8A 60 28 FD 25 4A FA 7C C6 C1 D6 55 08 18 38 FD 66 6A F8 FD 4A 38 2A 7C E7 C1 D6 FD AC 00 28 FD 8C 00 2A 7D 49 CD AE 7D 99 05 AE 7D 66 CD AE 7D A8 CD AE 7D 27 CD AE 42 00 FF 20
+
+. 0 100119CC 20
+. 2F 9A 00 00 C8 04 FF F8 C9 04 FF F0 FC E0 00 50 41 9E 00 C4
+
+PASS: gsl_fft_real with signal_real_noise, n = 10, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 10, stride = 1
+. 0 1000DB58 20
+. 3A 5B 00 01 3A 80 00 01 56 40 F8 7E 2B 80 00 01 40 9D 02 C0
+
+. 0 1000DE28 8
+. 73 6B 00 01 40 A2 F0 84
+
+. 0 1000DE30 8
+. 2F 93 00 00 41 BE F0 7C
+
+. 0 1000DE38 292
+. 81 9E 81 7C 7E 69 03 A6 80 FE 81 80 57 66 08 3C C8 CC 00 00 38 BB FF FF C8 A7 00 00 38 80 00 00 1D 24 00 05 7C E5 CA 14 7C 84 DA 14 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 7D 7C 49 D6 54 0A 18 38 7D 06 02 14 39 4A 00 08 7C 1C 01 D6 55 6B 18 38 7D 6B EC AE 55 29 18 38 39 29 00 08 FD 6B 58 2A 54 00 18 38 7D 4A E1 D6 7C 1D 04 AE FC 00 00 2A 7D 1C 41 D6 7D AA EC AE FD 8B 00 28 FD 6B 00 2A 7D 29 E1 D6 55 08 18 38 7C E8 EC AE FD AD 68 2A FD 8C 01 72 FD 2B 39 B8 7C 09 EC AE 7D 27 CA 14 7C 17 29 D6 FD 58 03 72 7D 69 CA 14 7D 4B CA 14 FD B9 03 72 7C A5 DA 14 7C F7 39 D6 54 00 18 38 FC 00 00 2A FD 0C 48 28 FD 8C 48 2A FD 59 50 38 7D 37 49 D6 54 E7 18 38 FC 18 68 3A FD 20 60 50 7D 77 59 D6 FD A0 40 50 55 29 18 38 FD 6B 38 2A FD 29 00 28 7D 57 51 D6 FD AD 50 28 FD 8C 00 28 55 6B 18 38 FD 08 50 28 7D 7A 05 AE 55 4A 18 38 7D 87 D5 AE 7D 09 D5 AE 7D AB D5 AE 7D 2A D5 AE 42 00 FF 00
+
+. 0 1000DF5C 28
+. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 EA 7C
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 10, stride = 1
+. 0 10012AB4 56
+. 7F 9C DA 14 92 A1 00 08 7C 1C C3 96 7F B9 BA 14 3A D6 00 01 3B 5A 00 08 7C 00 C1 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 64 0D
+
+PASS: gsl_fft_real_wavetable_float_alloc, n = 10, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 10
+. 0 10013294 244
+. 7C 03 D2 14 7D 14 2A 14 7D 20 D2 14 7C 1F 01 D6 7D 69 D2 14 7D 4B D2 14 55 07 10 3A 7D 3F 49 D6 54 00 10 3A 7D 5D 04 2E 54 A6 10 3A 38 C6 00 04 38 E7 00 04 7D 7F 59 D6 55 29 10 3A 7D 69 EC 2E 7D 5F 51 D6 55 6B 10 3A 7D 8B EC 2E ED AB 60 2A 55 4A 10 3A 7C 1F 19 D6 7D 0A EC 2E ED 6B 60 28 7C 63 AA 14 EC 0A 40 2A 54 00 10 3A ED 4A 40 28 7D 3D 04 2E 7D 38 21 D6 EC E0 68 2A 7C 84 8A 14 EC 00 68 28 FD A0 48 90 FD 80 38 90 7C 18 29 D6 55 29 10 3A ED 29 38 2A 7C A5 8A 14 FD 8C 01 72 7D 18 41 D6 54 00 10 3A FC 00 01 B2 7D 29 CD 2E FD AD 60 28 ED 9B 02 F2 7C C6 C1 D6 FC 00 00 18 55 08 10 3A FD A0 68 18 ED 7A 02 F2 7C E7 C1 D6 ED 83 62 BA ED 0D 00 28 ED 44 5A B8 ED AD 00 2A 7D B9 05 2E 7D 46 CD 2E 7D 08 CD 2E 7D 87 CD 2E 42 00 FF 10
+
+. 0 100139F8 20
+. 2F 9A 00 00 C0 03 FF FC C1 03 FF F8 FC E0 00 50 41 9E 00 C4
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 10, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 10, stride = 1
+. 0 1000FD54 20
+. 3A 3B 00 01 3A 60 00 01 56 20 F8 7E 2B 80 00 01 40 9D 02 E0
+
+. 0 10010044 8
+. 73 6B 00 01 40 A2 F0 34
+
+. 0 1001004C 8
+. 2F 92 00 00 41 BE F0 2C
+
+. 0 10010054 308
+. 81 9E 81 F4 7E 49 03 A6 83 3E 81 F8 57 65 08 3C C8 CC 00 00 38 DB FF FF C8 B9 00 00 38 80 00 00 1D 24 00 05 7C E6 C2 14 7C 84 DA 14 7D 29 DA 14 39 29 FF FF 7C 05 4A 14 7D 7C 49 D6 7D 45 02 14 54 08 10 3A 39 08 00 04 7C 1C 01 D6 55 6B 10 3A 7D 4B FC 2E 55 29 10 3A 39 29 00 04 ED 4A 50 2A 54 00 10 3A 7D 5C 51 D6 7C 1F 04 2E EC 00 00 2A 55 4A 10 3A 7D 08 E1 D6 7C EA FC 2E 7D 47 C2 14 ED 8A 00 28 ED 4A 00 2A FC 00 38 90 7D 29 E1 D6 FD A0 50 90 ED 4A 38 2A FD 8C 01 72 7D 69 FC 2E 7D 2A C2 14 7C 17 31 D6 FD AD 01 B8 7C 08 FC 2E 7D 69 C2 14 FD 80 60 18 7C C6 DA 14 EC 00 00 2A 7C F7 39 D6 FD A0 68 18 54 00 10 3A ED 6B 58 2A 7D 5A 05 2E ED 38 00 32 ED 0C 68 28 7D 57 51 D6 ED 8C 68 2A 54 E7 10 3A EC 19 00 32 ED 39 4A F8 FD A0 40 50 7D 37 49 D6 ED 78 02 FA 55 4A 10 3A FC 00 60 50 ED AD 48 28 7D 77 59 D6 ED 8C 58 28 EC 00 58 28 55 29 10 3A ED 08 48 28 7D 87 D5 2E 55 6B 10 3A 7D 0A D5 2E 7D A9 D5 2E 7C 0B D5 2E 42 00 FE F0
+
+. 0 10010188 28
+. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 EA 18
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 10, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 10, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 10
+PASS: gsl_fft_complex_forward with signal_noise, n = 10, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 10, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 10, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 10, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 10, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 10, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 10, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 10, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 10, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 10, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 10
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 10, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 10, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 10, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 10, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 10, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 10, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 10, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 10, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 10, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 10, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 10
+PASS: gsl_fft_real with signal_real_noise, n = 10, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 10, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 10, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 10, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 10
+PASS: gsl_fft_real_float with signal_real_noise, n = 10, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 10, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 10, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 10, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 10
+PASS: gsl_fft_complex_forward with signal_noise, n = 10, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 10, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 10, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 10, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 10, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 10, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 10, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 10, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 10, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 10, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 10
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 10, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 10, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 10, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 10, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 10, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 10, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 10, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 10, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 10, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 10, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 10
+PASS: gsl_fft_real with signal_real_noise, n = 10, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 10, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 10, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 10, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 10
+PASS: gsl_fft_real_float with signal_real_noise, n = 10, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 10, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 10, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 11, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 11
+. 0 10006FA0 44
+. 81 01 00 18 3B 77 FF FF 81 41 00 24 7C 68 BB 96 81 21 01 88 82 69 00 00 7F 8A BB 96 2F 83 00 00 7D 7B E1 D6 7D 68 03 A6 41 9E 00 3C
+
+. 0 10006FCC 56
+. 7C 69 03 A6 39 40 00 00 38 00 00 00 57 07 20 36 57 28 20 36 7C 0A FC AE 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
+
+. 0 10007004 20
+. 57 69 F8 7E 3A A0 00 01 39 29 00 01 2B 89 00 01 40 9D 00 B4
+
+. 0 10007018 20
+. 7D 3D 4B 78 7C 65 1B 78 38 C0 00 00 7F 86 18 40 40 9C 00 90
+
+. 0 1000702C 140
+. 7C 15 B8 50 7C 69 03 A6 7C 80 19 D6 7D 25 32 14 7C 04 32 14 7D 59 49 D6 38 C6 00 01 7D 79 01 D6 55 4A 20 36 7D AA FC AE 7C EA FA 14 55 6B 20 36 7D 38 49 D6 7C 0B FC AE 7D 0B FA 14 FD AD 00 2A 55 29 20 36 7C 18 01 D6 7D A9 D5 AE 7D 29 D2 14 C9 A8 00 08 C8 07 00 08 54 00 20 36 FC 00 68 2A D8 09 00 08 7D 20 D2 14 7C 0B FC AE 7D AA FC AE FD AD 00 28 7D BA 05 AE C8 07 00 08 C9 A8 00 08 FC 00 68 28 D8 09 00 08 42 00 FF 84
+
+. 0 100070B8 16
+. 3A B5 00 01 7C A5 1A 14 7F 9D A8 40 41 9D FF 5C
+
+. 0 10007020 12
+. 38 C0 00 00 7F 86 18 40 40 9C 00 90
+
+. 0 100070C8 8
+. 2F 83 00 00 41 9E 00 3C
+
+. 0 100070D0 56
+. 7C 69 03 A6 39 40 00 00 38 00 00 00 57 27 20 36 57 08 20 36 7C 0A D4 AE 7D 6A D2 14 7D 20 FA 14 7D 4A 42 14 7C 1F 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
+
+. 0 10007108 20
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+
+. 0 1000711C 20
+. 7D 27 4B 78 7C 6A 1B 78 38 C0 00 00 7F 86 18 40 40 9C 00 50
+
+. 0 10007130 76
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+
+. 0 1000717C 16
+. 39 8C 00 01 7D 4A 1A 14 7F 87 60 40 41 9D FF 9C
+
+. 0 10007124 12
+. 38 C0 00 00 7F 86 18 40 40 9C 00 50
+
+. 0 1000718C 20
+. 57 69 F8 7E 3A A0 00 01 39 29 00 01 2B 89 00 01 40 9D 01 B4
+
+. 0 100071A0 64
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+
+. 0 100071E0 92
+. 7C 69 03 A6 38 00 00 00 57 08 20 36 7D 26 EA 14 7C 1A 04 AE 7D 29 C9 D6 7D 40 D2 14 7D 66 DA 14 38 C6 00 01 55 29 20 36 7D 6B C9 D6 7C 09 FD AE 7D 29 FA 14 C8 0A 00 08 D8 09 00 08 55 6B 20 36 7D BA 04 AE 7C 00 42 14 7D AB FD AE 7D 6B FA 14 C8 0A 00 08 D8 0B 00 08 42 00 FF B4
+
+. 0 1000723C 8
+. 39 80 00 01 40 85 01 00
+
+. 0 10007244 20
+. 81 C1 01 04 7C 67 1B 78 82 3E 80 44 2F 85 00 00 40 9E 0D F8
+
+. 0 1000804C 4
+. 40 9A 00 18
+
+. 0 10008050 20
+. 54 A9 20 36 7D 29 9A 14 C9 09 FF F8 C8 E9 FF F0 4B FF F2 00
+
+. 0 10007260 12
+. 38 C0 00 00 7F 86 18 40 40 9C 00 B8
+
+. 0 1000726C 180
+. 7C 0C B8 50 7C 69 03 A6 7C 80 19 D6 7D 44 32 14 7D 27 32 14 7D 4A C1 D6 7C 06 EA 14 7D 06 DA 14 38 C6 00 01 7D 29 C1 D6 55 4A 20 36 7D 6A D2 14 7D 8A D4 AE C8 0B 00 08 FD 88 03 32 55 29 20 36 7C 00 C9 D6 7D 49 D4 AE FC 08 00 32 7D 29 D2 14 FD 47 02 B2 C9 69 00 08 54 00 20 36 7D 08 C9 D6 7D BF 04 AE FD 67 02 F2 7D 60 FA 14 FD 2A 00 28 FD 4A 00 2A 55 08 20 36 7D 28 FA 14 FD AD 48 2A FD 2B 60 2A FD 6B 60 28 7D BF 05 AE C8 0B 00 08 FC 00 48 2A D8 0B 00 08 7D A8 FC AE FD AD 50 2A 7D A8 FD AE C8 09 00 08 FC 00 58 2A D8 09 00 08 42 00 FF 5C
+
+. 0 10007320 32
+. 7C A5 A2 14 39 8C 00 01 7C 05 B3 96 7F 92 60 40 7C E7 1A 14 7C 00 B1 D6 7C A0 28 50 41 9D FF 14
+
+. 0 10007250 8
+. 2F 85 00 00 40 9E 0D F8
+
+. 0 10007340 16
+. 3A B5 00 01 7F BD 1A 14 7F 90 A8 40 41 9D FE 78
+
+. 0 100071C4 28
+. 38 C0 00 00 7C B5 79 D6 7F 86 18 40 7C 15 B8 50 7F 60 19 D6 7C B4 2B 78 40 9C 00 60
+
+. 0 10007350 8
+. 2F 9C 00 00 41 9E 00 3C
+
+. 0 10007358 56
+. 7F 89 03 A6 39 40 00 00 38 00 00 00 57 07 20 36 57 28 20 36 7C 0A FC AE 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
+
+. 0 10007390 12
+. 39 80 00 01 7F 8C B8 40 40 9C 00 68
+
+. 0 1000739C 20
+. 7F 8A E3 78 7C 60 1B 78 38 80 00 00 7F 84 E0 40 40 9C 00 40
+
+. 0 100073B0 60
+. 7F 89 03 A6 7D 20 22 14 7D 6A 22 14 7D 29 C9 D6 38 84 00 01 7D 6B C1 D6 55 29 20 36 7D A9 FC AE 7D 29 FA 14 55 6B 20 36 7D AB D5 AE 7D 6B D2 14 C8 09 00 08 D8 0B 00 08 42 00 FF CC
+
+. 0 100073EC 20
+. 39 8C 00 01 7C 00 1A 14 7F 8C B8 40 7D 4A E2 14 41 9C FF A8
+
+. 0 100073A4 12
+. 38 80 00 00 7F 84 E0 40 40 9C 00 40
+
+. 0 10007400 12
+. 2B 8F 00 01 80 A1 00 24 40 9D 00 68
+
+. 0 10007470 20
+. 3B A0 00 01 7F 86 E3 78 7F 9D 78 40 80 A1 00 24 40 9C 00 F8
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 11, stride = 1
+. 0 10008064 24
+. 54 A9 20 36 7D 29 9A 14 C8 09 FF F8 C8 E9 FF F0 FD 00 00 50 4B FF F1 E8
+
+PASS: gsl_fft_complex_inverse with signal_noise, n = 11, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 11, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 11, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 11, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 11, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 11, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 11
+. 0 10009DC8 44
+. 81 01 00 18 3B 77 FF FF 81 41 00 24 7C 68 BB 96 81 21 01 44 82 89 00 00 7F 8A BB 96 2F 83 00 00 7D 7B E1 D6 7D 68 03 A6 41 9E 00 3C
+
+. 0 10009DF4 56
+. 7C 69 03 A6 39 40 00 00 38 00 00 00 57 07 18 38 57 28 18 38 7C 0A FC 2E 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
+
+. 0 10009E2C 20
+. 57 69 F8 7E 3A A0 00 01 39 29 00 01 2B 89 00 01 40 9D 00 B4
+
+. 0 10009E40 20
+. 7D 3D 4B 78 7C 65 1B 78 38 C0 00 00 7F 86 18 40 40 9C 00 90
+
+. 0 10009E54 140
+. 7C 15 B8 50 7C 69 03 A6 7C 80 19 D6 7D 25 32 14 7C 04 32 14 7D 59 49 D6 38 C6 00 01 7D 79 01 D6 55 4A 18 38 7D AA FC 2E 7C EA FA 14 55 6B 18 38 7D 38 49 D6 7C 0B FC 2E 7D 0B FA 14 ED AD 00 2A 55 29 18 38 7C 18 01 D6 7D A9 D5 2E 7D 29 D2 14 C1 A8 00 04 C0 07 00 04 54 00 18 38 EC 00 68 2A D0 09 00 04 7D 20 D2 14 7C 0B FC 2E 7D AA FC 2E ED AD 00 28 7D BA 05 2E C0 07 00 04 C1 A8 00 04 EC 00 68 28 D0 09 00 04 42 00 FF 84
+
+. 0 10009EE0 16
+. 3A B5 00 01 7C A5 1A 14 7F 9D A8 40 41 9D FF 5C
+
+. 0 10009E48 12
+. 38 C0 00 00 7F 86 18 40 40 9C 00 90
+
+. 0 10009EF0 8
+. 2F 83 00 00 41 9E 00 3C
+
+. 0 10009EF8 56
+. 7C 69 03 A6 39 40 00 00 38 00 00 00 57 27 18 38 57 08 18 38 7C 0A D4 2E 7D 6A D2 14 7D 20 FA 14 7D 4A 42 14 7C 1F 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
+
+. 0 10009F30 20
+. 57 69 F8 7E 39 80 00 01 39 29 00 01 2B 89 00 01 40 9D 00 74
+
+. 0 10009F44 20
+. 7D 27 4B 78 7C 6A 1B 78 38 C0 00 00 7F 86 18 40 40 9C 00 50
+
+. 0 10009F58 76
+. 7C 69 03 A6 38 00 00 00 57 28 18 38 7D 2A 32 14 7C 1F 04 2E 7D 29 C1 D6 7D 60 FA 14 38 C6 00 01 55 29 18 38 7D A9 D4 2E 7D 29 D2 14 EC 00 68 2A 7C 1F 05 2E 7C 00 42 14 C1 A9 00 04 C0 0B 00 04 EC 00 68 2A D0 0B 00 04 42 00 FF C4
+
+. 0 10009FA4 16
+. 39 8C 00 01 7D 4A 1A 14 7F 87 60 40 41 9D FF 9C
+
+. 0 10009F4C 12
+. 38 C0 00 00 7F 86 18 40 40 9C 00 50
+
+. 0 10009FB4 20
+. 57 69 F8 7E 3A A0 00 01 39 29 00 01 2B 89 00 01 40 9D 01 AC
+
+. 0 10009FC8 56
+. 81 81 00 1C 7E D7 79 D6 7D 2E 4B 78 28 89 00 01 2F 0C FF FF 7C 7D 1B 78 7D 32 4B 78 38 C0 00 00 7C B5 79 D6 7F 86 18 40 7C 15 B8 50 7F 60 19 D6 7C B3 2B 78 40 9C 00 60
+
+. 0 1000A000 92
+. 7C 69 03 A6 38 00 00 00 57 08 18 38 7D 26 EA 14 7C 1A 04 2E 7D 29 C9 D6 7D 40 D2 14 7D 66 DA 14 38 C6 00 01 55 29 18 38 7D 6B C9 D6 7C 09 FD 2E 7D 29 FA 14 C0 0A 00 04 D0 09 00 04 55 6B 18 38 7D BA 04 2E 7C 00 42 14 7D AB FD 2E 7D 6B FA 14 C0 0A 00 04 D0 0B 00 04 42 00 FF B4
+
+. 0 1000A05C 8
+. 39 80 00 01 40 85 01 00
+
+. 0 1000A064 20
+. 82 3E 80 CC 7C 67 1B 78 82 1E 80 D0 2F 85 00 00 40 9E 0E 58
+
+. 0 1000AECC 4
+. 40 9A 00 18
+
+. 0 1000AED0 20
+. 54 A9 18 38 7D 29 A2 14 C1 09 FF FC C0 E9 FF F8 4B FF F1 A0
+
+. 0 1000A080 12
+. 38 C0 00 00 7F 86 18 40 40 9C 00 B8
+
+. 0 1000A08C 180
+. 7C 0C B8 50 7C 69 03 A6 7C 80 19 D6 7D 44 32 14 7D 67 32 14 7D 4A C1 D6 7C 06 EA 14 7D 06 DA 14 38 C6 00 01 7D 6B C1 D6 55 4A 18 38 7D 2A D2 14 7D AA D4 2E C1 29 00 04 ED A8 03 72 55 6B 18 38 7C 00 C9 D6 7D 4B D4 2E ED 28 02 72 7D 6B D2 14 ED 47 02 B2 C1 6B 00 04 54 00 18 38 7D 08 C9 D6 7C 1F 04 2E ED 67 02 F2 ED 8A 48 28 7D 20 FA 14 ED 4A 48 2A 55 08 18 38 EC 00 60 2A ED 8B 68 2A ED 6B 68 28 7C 1F 05 2E C0 09 00 04 EC 00 60 2A D0 09 00 04 7D 28 FA 14 7D A8 FC 2E ED AD 50 2A 7D A8 FD 2E C0 09 00 04 EC 00 58 2A D0 09 00 04 42 00 FF 5C
+
+. 0 1000A140 32
+. 7C A5 9A 14 39 8C 00 01 7C 05 B3 96 7F 92 60 40 7C E7 1A 14 7C 00 B1 D6 7C A0 28 50 41 9D FF 14
+
+. 0 1000A070 8
+. 2F 85 00 00 40 9E 0E 58
+
+. 0 1000A160 16
+. 3A B5 00 01 7F BD 1A 14 7F 8E A8 40 41 9D FE 78
+
+. 0 10009FE4 28
+. 38 C0 00 00 7C B5 79 D6 7F 86 18 40 7C 15 B8 50 7F 60 19 D6 7C B3 2B 78 40 9C 00 60
+
+. 0 1000A170 8
+. 2F 9C 00 00 41 9E 00 3C
+
+. 0 1000A178 56
+. 7F 89 03 A6 39 40 00 00 38 00 00 00 57 07 18 38 57 28 18 38 7C 0A FC 2E 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
+
+. 0 1000A1B0 12
+. 39 80 00 01 7F 8C B8 40 40 9C 00 68
+
+. 0 1000A1BC 20
+. 7F 8A E3 78 7C 60 1B 78 38 80 00 00 7F 84 E0 40 40 9C 00 40
+
+. 0 1000A1D0 60
+. 7F 89 03 A6 7D 20 22 14 7D 6A 22 14 7D 29 C9 D6 38 84 00 01 7D 6B C1 D6 55 29 18 38 7D A9 FC 2E 7D 29 FA 14 55 6B 18 38 7D AB D5 2E 7D 6B D2 14 C0 09 00 04 D0 0B 00 04 42 00 FF CC
+
+. 0 1000A20C 20
+. 39 8C 00 01 7C 00 1A 14 7F 8C B8 40 7D 4A E2 14 41 9C FF A8
+
+. 0 1000A1C4 12
+. 38 80 00 00 7F 84 E0 40 40 9C 00 40
+
+. 0 1000A220 12
+. 2B 8F 00 01 80 A1 00 24 40 9D 00 68
+
+. 0 1000A290 20
+. 3B A0 00 01 7F 86 E3 78 7F 9D 78 40 80 A1 00 24 40 9C 00 F8
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 11, stride = 1
+. 0 1000AEE4 24
+. 54 A9 18 38 7D 29 A2 14 C0 09 FF FC C0 E9 FF F8 FD 00 00 50 4B FF F1 88
+
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 11, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 11, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 11, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 11, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 11, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 11, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 11
+PASS: gsl_fft_real with signal_real_noise, n = 11, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 11, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 11, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 11, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 11
+PASS: gsl_fft_real_float with signal_real_noise, n = 11, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 11, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 11, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 11, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 11
+PASS: gsl_fft_complex_forward with signal_noise, n = 11, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 11, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 11, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 11, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 11, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 11, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 11, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 11, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 11, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 11, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 11
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 11, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 11, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 11, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 11, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 11, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 11, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 11, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 11, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 11, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 11, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 11
+PASS: gsl_fft_real with signal_real_noise, n = 11, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 11, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 11, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 11, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 11
+PASS: gsl_fft_real_float with signal_real_noise, n = 11, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 11, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 11, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 11, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 11
+PASS: gsl_fft_complex_forward with signal_noise, n = 11, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 11, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 11, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 11, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 11, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 11, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 11, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 11, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 11, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 11, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 11
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 11, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 11, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 11, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 11, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 11, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 11, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 11, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 11, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 11, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 11, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 11
+PASS: gsl_fft_real with signal_real_noise, n = 11, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 11, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 11, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 11, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 11
+PASS: gsl_fft_real_float with signal_real_noise, n = 11, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 11, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 11, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 12, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 12
+. 0 100084C4 12
+. 81 41 00 34 2F 8A 00 00 41 BE FC B0
+
+. 0 100084D0 4
+. 40 9A 00 54
+
+. 0 100084D4 80
+. 80 E1 01 64 80 C1 01 60 C8 07 FF F0 C8 47 FF F8 81 01 01 54 80 E1 01 58 D8 01 00 38 CA 06 FF F0 C8 06 FF F8 80 C1 01 5C D8 01 00 48 C9 E6 FF F0 C8 08 FF F8 C9 C6 FF F8 CA 67 FF F0 CA 47 FF F8 CA 28 FF F0 D8 41 00 40 D8 01 00 50 4B FF FC A0
+
+. 0 100081C0 8
+. 2F 96 00 00 41 9E 02 AC
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 12, stride = 1
+. 0 10008524 100
+. 80 C1 01 64 80 E1 01 60 81 01 01 5C 81 21 01 58 81 41 01 54 C8 06 FF F8 C9 A7 FF F8 FC 00 00 50 C9 88 FF F8 C9 69 FF F8 FD A0 68 50 C9 4A FF F8 FD C0 60 50 FE 40 58 50 D8 01 00 40 FD 40 50 50 C8 06 FF F0 CA 07 FF F0 C9 E8 FF F0 CA 69 FF F0 CA 2A FF F0 D9 A1 00 48 D9 41 00 50 D8 01 00 38 4B FF FC 3C
+
+PASS: gsl_fft_complex_inverse with signal_noise, n = 12, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 12, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 12, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 12, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 12, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 12, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 12
+. 0 1000B340 12
+. 80 E1 00 38 2F 87 00 00 41 BE FC C0
+
+. 0 1000B34C 4
+. 40 9A 00 54
+
+. 0 1000B350 80
+. 80 E1 01 18 81 01 01 0C C0 07 FF F8 C0 27 FF FC 80 E1 01 14 81 21 01 08 D0 01 00 3C C2 67 FF F8 C0 07 FF FC 80 E1 01 10 D0 01 00 44 C2 47 FF F8 C0 09 FF FC C2 27 FF FC C2 08 FF F8 C1 E8 FF FC C1 C9 FF F8 D0 21 00 40 D0 01 00 48 4B FF FC A4
+
+. 0 1000B040 8
+. 2F 96 00 00 41 9E 02 A8
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 12, stride = 1
+. 0 1000B3A0 100
+. 80 E1 01 18 81 01 01 14 81 21 01 10 81 41 01 0C 81 61 01 08 C0 07 FF FC C1 A8 FF FC FC 00 00 50 C1 89 FF FC C1 6A FF FC FD A0 68 50 C1 4B FF FC FE 20 60 50 FD E0 58 50 D0 01 00 40 FD 40 50 50 C0 07 FF F8 C2 68 FF F8 C2 49 FF F8 C2 0A FF F8 C1 CB FF F8 D1 A1 00 44 D1 41 00 48 D0 01 00 3C 4B FF FC 40
+
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 12, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 12, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 12, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 12, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 12, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 12, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 12
+. 0 10012088 8
+. 2F 95 00 00 41 BE F7 28
+
+. 0 10012090 152
+. 81 3E 82 50 39 1B FF FF 81 5E 82 54 7E A9 03 A6 57 66 08 3C C9 49 00 00 C9 2A 00 00 7D 07 43 78 7C 07 1A 14 7D 66 42 14 7D 20 1A 14 7C 1D 01 D6 55 0A 18 38 39 4A 00 08 7D 3D 49 D6 54 00 18 38 7C 1F 04 AE 7C 1D 39 D6 55 29 18 38 7D 89 FC AE 7C E7 DA 14 FD 60 60 2A 54 00 18 38 FC 00 60 28 7D BF 04 AE 7D 78 59 D6 FD 6B 02 72 FD 80 6A BA 7C 18 41 D6 55 6B 18 38 FD AD 00 28 7D 08 8A 14 7D 4A C1 D6 54 00 18 38 7D 99 05 AE 7D 6A CD AE 7D AB CD AE 42 00 FF 8C
+
+. 0 10012128 28
+. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 EE 0C
+
+. 0 10012144 4
+. 4B FF F6 8C
+
+PASS: gsl_fft_real with signal_real_noise, n = 12, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 12, stride = 1
+. 0 1000D6E8 52
+. 3A 98 00 10 3A 70 00 10 3A B6 00 10 57 78 08 3C 3A 00 00 02 2F 91 00 00 CB D3 FF F0 CB B3 FF F8 CB 94 FF F0 CB 74 FF F8 CB 55 FF F0 CB 35 FF F8 41 9E 01 9C
+
+. 0 1000D71C 400
+. 38 70 FF FF 7D 30 C0 50 7E 29 03 A6 3B E9 FF FF 7C 79 1B 78 57 76 10 3A 7C F8 FA 14 57 EB 18 38 54 E9 18 38 39 6B 00 08 39 29 00 08 7D 58 CA 14 7D 29 E1 D6 55 46 18 38 57 28 18 38 39 08 00 08 38 C6 00 08 7D 6B E1 D6 7D 69 EC AE FD 60 58 50 7C 1C C9 D6 7D 4B EC AE 7F 39 B2 14 FD 40 50 50 7D 3C F9 D6 54 00 18 38 7D 3D 04 AE 7F FF B2 14 80 01 00 30 7D 5C 51 D6 55 29 18 38 7C 29 EC AE 7D 63 02 14 7C AB 02 14 7C 85 02 14 7C FC 39 D6 55 4A 18 38 7C CA EC AE 54 69 18 38 55 6A 18 38 FC E6 08 28 39 29 00 08 7D 08 E1 D6 54 E7 18 38 7C A7 EC AE FC C6 08 2A 54 87 18 38 FD 89 28 28 39 4A 00 08 7C C6 E1 D6 7D A8 EC AE FD 29 28 2A 54 A8 18 38 FC 0D 58 28 39 08 00 08 FD AD 58 2A 38 E7 00 08 7D 06 EC AE 7C 17 19 D6 FC 60 38 28 7C 63 DA 14 FC 48 50 28 FD 08 50 2A FC 00 38 2A 7D 77 59 D6 FC 8C 10 2A 54 00 18 38 FD 6D 40 28 FC FE 00 32 7C B7 29 D6 55 6B 18 38 FC BC 02 F2 FC 39 01 32 7C 97 21 D6 54 A5 18 38 FF F9 00 F2 FC 1D 00 32 7D 29 B9 D6 54 84 18 38 FD 7B 02 F2 FD 49 30 28 FD 8C 10 28 7D 4A B9 D6 FC 7A 08 FA FC FD 3B 3A 7D 08 B9 D6 FC BB 2A BA FD 9E 03 38 7C E7 B9 D6 FD 5C 5A B8 FC 9A F9 38 FD 29 30 2A FD AD 40 2A 7D 3A 05 AE 7D A9 D5 AE 7D 8B D5 AE 7C EA D5 AE 7D 45 D5 AE 7C A8 D5 AE 7C 84 D5 AE
+
+. 0 1000D8AC 8
+. 7C 67 D5 AE 42 00 FE 84
+
+. 0 1000D8B4 32
+. 3A 52 00 01 55 E0 F8 7E 7F 80 90 40 3A 10 00 02 3A 73 00 10 3A 94 00 10 3A B5 00 10 41 9D FE 2C
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 12, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 12, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 12
+. 0 100140D8 8
+. 2F 95 00 00 41 BE F7 04
+
+. 0 100140E0 164
+. 81 5E 82 A8 39 1B FF FF 81 7E 82 AC 7E A9 03 A6 57 66 08 3C C9 2A 00 00 C1 0B 00 00 7D 07 43 78 7C 07 1A 14 7D 66 42 14 7D 20 1A 14 7C 1F 01 D6 55 0A 10 3A 39 4A 00 04 7D 3F 49 D6 54 00 10 3A 7D 7D 04 2E 7C 1F 39 D6 55 29 10 3A 7C 09 EC 2E 7C E7 DA 14 ED 4B 00 28 54 00 10 3A ED 6B 00 2A 7D 9D 04 2E 7D 78 59 D6 FC 00 50 90 FD A0 60 90 ED 6B 02 32 7C 18 41 D6 ED 8C 50 28 FC 00 6A 7A 55 6B 10 3A 7D 08 8A 14 7D 4A C1 D6 54 00 10 3A FC 00 00 18 7C 19 05 2E 7D 6A CD 2E 7D 8B CD 2E 42 00 FF 80
+
+. 0 10014184 28
+. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 ED A0
+
+. 0 100141A0 4
+. 4B FF F6 5C
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 12, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 12, stride = 1
+. 0 1000F8CC 52
+. 3A 70 00 08 3A B9 00 08 3A 96 00 08 57 78 08 3C 3A 00 00 02 2F 91 00 00 C3 F3 FF F8 C3 D3 FF FC C3 B4 FF F8 C3 94 FF FC C3 75 FF F8 C3 55 FF FC 41 9E 01 9C
+
+. 0 1000F900 400
+. 38 70 FF FF 7D 30 C0 50 7E 29 03 A6 3B A9 FF FF 7C 79 1B 78 57 76 10 3A 7C F8 EA 14 57 AB 10 3A 54 E9 10 3A 39 6B 00 04 39 29 00 04 7D 58 CA 14 7D 29 E1 D6 55 46 10 3A 57 28 10 3A 39 08 00 04 38 C6 00 04 7D 6B E1 D6 7D 49 FC 2E FD 40 50 50 7C 1C C9 D6 7D 2B FC 2E 7F 39 B2 14 FD 20 48 50 7D 3C E9 D6 54 00 10 3A 7D 7F 04 2E 7F BD B2 14 80 01 00 30 7D 5C 51 D6 55 29 10 3A 7C 29 FC 2E 7D 63 02 14 7C AB 02 14 7C 85 02 14 7C FC 39 D6 55 4A 10 3A 7C EA FC 2E 54 69 10 3A 55 6A 10 3A EC A7 08 28 39 29 00 04 7D 08 E1 D6 54 E7 10 3A 7C C7 FC 2E EC E7 08 2A 54 87 10 3A ED 8B 30 28 39 4A 00 04 7C C6 E1 D6 7D A8 FC 2E ED 6B 30 2A 54 A8 10 3A EC 0D 50 28 39 08 00 04 ED AD 50 2A 38 E7 00 04 7D 06 FC 2E 7C 17 19 D6 EC 40 28 28 7C 63 DA 14 EC 88 48 28 ED 08 48 2A EC 00 28 2A 7D 77 59 D6 EC 6C 20 2A 54 00 10 3A ED 4D 40 28 ED 2B 38 28 ED 8C 20 28 7C B7 29 D6 EC DF 00 32 55 6B 10 3A EC BD 02 B2 EC 3A 00 F2 EC 9A 00 B2 7C 97 21 D6 EC 1E 00 32 54 A5 10 3A ED 5C 02 B2 EC DE 33 3A 7D 29 B9 D6 EC BC 2A 7A EC 5B 08 BA 54 84 10 3A ED 9F 03 38 ED 3D 52 78 7D 4A B9 D6 EC 7B 20 F8 ED 6B 38 2A ED AD 40 2A 7D 08 B9 D6 7D 7A 05 2E 7D A9 D5 2E 7D 8B D5 2E 7C CA D5 2E 7C E7 B9 D6 7D 25 D5 2E 7C A8 D5 2E 7C 64 D5 2E
+
+. 0 1000FA90 8
+. 7C 47 D5 2E 42 00 FE 84
+
+. 0 1000FA98 32
+. 3A 52 00 01 55 E0 F8 7E 7F 80 90 40 3A 10 00 02 3A 73 00 08 3A 94 00 08 3A B5 00 08 41 9D FE 2C
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 12, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 12, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 12
+PASS: gsl_fft_complex_forward with signal_noise, n = 12, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 12, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 12, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 12, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 12, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 12, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 12, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 12, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 12, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 12, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 12
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 12, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 12, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 12, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 12, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 12, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 12, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 12, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 12, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 12, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 12, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 12
+PASS: gsl_fft_real with signal_real_noise, n = 12, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 12, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 12, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 12, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 12
+PASS: gsl_fft_real_float with signal_real_noise, n = 12, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 12, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 12, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 12, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 12
+PASS: gsl_fft_complex_forward with signal_noise, n = 12, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 12, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 12, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 12, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 12, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 12, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 12, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 12, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 12, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 12, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 12
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 12, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 12, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 12, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 12, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 12, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 12, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 12, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 12, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 12, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 12, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 12
+PASS: gsl_fft_real with signal_real_noise, n = 12, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 12, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 12, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 12, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 12
+PASS: gsl_fft_real_float with signal_real_noise, n = 12, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 12, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 12, stride = 3
+. 0 FE0BE7C 36
+. 81 3E 0E 80 C8 69 00 00 FD A3 28 2A FC 0D 18 28 D9 A1 00 20 80 E1 00 20 81 01 00 24 FC 65 00 28 41 9D 00 08
+
+. 0 FE0BEA4 212
+. FC A3 00 F2 81 3E 0E BC 81 9E 0E C0 55 04 28 34 CB E9 00 00 C9 AC 00 00 81 5E 0E 7C FC E3 01 72 80 FE 0E C4 FC 85 6F FA 7C C4 52 14 C9 47 00 00 CB E6 00 10 C9 86 00 08 FD 23 50 2A FD 07 01 32 C8 86 00 18 80 BE 0E C8 FD 7F 50 2A 81 7E 0E CC C8 C5 00 00 FD 29 50 28 FD A8 61 3A C8 0B 00 00 80 7E 0E D0 FD 6B 50 28 FD 85 01 BA C8 03 00 00 FC FF 58 28 FC DF 6A 3A 7D A4 54 AE FD 47 20 2A FD 03 48 28 FF EC 01 7A FC EA 30 FA FC 8D 00 F2 FD 2B 02 72 FC C8 10 2A FC 7F 01 72 FC 0B 39 BA FD 44 00 B2 FC A9 68 2A FD 8D 00 F2 FD 0D 28 28 FF E0 50 28 FC E8 48 2A FC DF 60 28 FD 66 38 2A FD A5 58 2A FC 85 68 28 FC AB 20 2A FF 85 08 00 40 9D 00 68
+
+. 0 FE0BFB8 36
+. 83 E1 00 54 83 C1 00 30 7F E8 03 A6 CB A1 00 38 83 E1 00 34 CB C1 00 40 CB E1 00 48 38 21 00 50 4E 80 00 20
+
+. 0 FE0E274 32
+. 81 7E 0F DC 80 DE 0F F0 C9 0B 00 00 C9 46 00 00 FC 0C 52 3A FD 81 00 2A FC 0C 08 00 41 82 FE FC
+
+PASS: gsl_fft_complex_wavetable_alloc, n = 13, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 13
+PASS: gsl_fft_complex_forward with signal_noise, n = 13, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 13, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 13, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 13, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 13, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 13, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 13, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 13
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 13, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 13, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 13, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 13, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 13, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 13, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 13, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 13
+PASS: gsl_fft_real with signal_real_noise, n = 13, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 13, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 13, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 13, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 13
+PASS: gsl_fft_real_float with signal_real_noise, n = 13, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 13, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 13, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 13, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 13
+PASS: gsl_fft_complex_forward with signal_noise, n = 13, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 13, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 13, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 13, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 13, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 13, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 13, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 13, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 13, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 13, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 13
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 13, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 13, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 13, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 13, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 13, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 13, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 13, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 13, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 13, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 13, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 13
+PASS: gsl_fft_real with signal_real_noise, n = 13, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 13, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 13, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 13, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 13
+PASS: gsl_fft_real_float with signal_real_noise, n = 13, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 13, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 13, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 13, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 13
+PASS: gsl_fft_complex_forward with signal_noise, n = 13, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 13, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 13, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 13, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 13, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 13, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 13, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 13, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 13, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 13, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 13
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 13, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 13, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 13, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 13, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 13, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 13, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 13, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 13, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 13, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 13, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 13
+PASS: gsl_fft_real with signal_real_noise, n = 13, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 13, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 13, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 13, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 13
+PASS: gsl_fft_real_float with signal_real_noise, n = 13, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 13, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 13, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 14, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 14
+. 0 10008C74 12
+. 81 01 00 58 2F 88 00 00 41 BE FA 5C
+
+. 0 10008C80 4
+. 40 9A 00 80
+
+. 0 10008C84 124
+. 80 E1 01 3C 80 C1 01 38 C8 07 FF F0 C8 47 FF F8 D8 01 00 90 D8 41 00 98 C8 06 FF F0 C8 46 FF F8 80 C1 01 34 D8 01 00 A0 D8 41 00 A8 C8 06 FF F0 C8 46 FF F8 80 C1 01 30 D8 01 00 B0 D8 41 00 B8 C8 06 FF F0 C8 46 FF F8 80 C1 01 2C D8 01 00 C0 D8 41 00 C8 C8 06 FF F0 C8 46 FF F8 80 C1 01 28 D8 01 00 D0 D8 41 00 D8 C8 06 FF F0 C8 46 FF F8 D8 01 00 E0 D8 41 00 E8 4B FF FA 74
+
+. 0 10008770 8
+. 2F 90 00 00 41 9E 04 9C
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 14, stride = 1
+. 0 10008D00 148
+. 80 C1 01 3C 80 E1 01 38 81 01 01 34 81 21 01 30 81 41 01 2C 81 61 01 28 C8 06 FF F8 C9 A7 FF F8 FC 00 00 50 C9 88 FF F8 C9 69 FF F8 FD A0 68 50 C9 4A FF F8 FD 80 60 50 C9 2B FF F8 FD 60 58 50 FD 40 50 50 D8 01 00 98 FD 20 48 50 C8 06 FF F0 C8 47 FF F0 C8 68 FF F0 C8 89 FF F0 C8 AA FF F0 C8 CB FF F0 D9 A1 00 A8 D9 81 00 B8 D9 61 00 C8 D9 41 00 D8 D9 21 00 E8 D8 01 00 90 D8 41 00 A0 D8 61 00 B0 D8 81 00 C0 D8 A1 00 D0 D8 C1 00 E0 4B FF F9 E0
+
+PASS: gsl_fft_complex_inverse with signal_noise, n = 14, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 14, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 14, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 14, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 14, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 14, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 14
+. 0 1000BB28 8
+. 2F 8C 00 00 41 BE FA 54
+
+. 0 1000BB30 4
+. 40 9A 00 80
+
+. 0 1000BB34 124
+. 80 E1 00 EC C0 07 FF F8 C0 27 FF FC 80 E1 00 E8 D0 01 00 64 D0 21 00 68 C0 07 FF F8 C0 27 FF FC 80 E1 00 E4 D0 01 00 6C D0 21 00 70 C0 07 FF F8 C0 27 FF FC 80 E1 00 E0 D0 01 00 74 D0 21 00 78 C0 07 FF F8 C0 27 FF FC 80 E1 00 DC D0 01 00 7C D0 21 00 80 C0 07 FF F8 C0 27 FF FC 80 E1 00 D8 D0 01 00 84 D0 21 00 88 C0 07 FF F8 C0 27 FF FC D0 01 00 8C D0 21 00 90 4B FF FA 18
+
+. 0 1000B5C4 8
+. 2F 90 00 00 41 9E 05 04
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 14, stride = 1
+. 0 1000BBB0 160
+. 80 E1 00 EC 81 01 00 E8 C0 07 FF FC C1 A8 FF FC FC 00 00 50 80 E1 00 D8 81 01 00 EC FD A0 68 50 81 21 00 E4 81 41 00 E0 81 61 00 DC C1 27 FF FC D0 01 00 68 80 E1 00 E8 FD 20 48 50 C0 08 FF F8 C1 89 FF FC C1 6A FF FC C1 4B FF FC FD 80 60 50 D0 01 00 64 FD 60 58 50 C0 07 FF F8 FD 40 50 50 80 E1 00 D8 D0 01 00 6C C0 29 FF F8 C0 4A FF F8 C0 AB FF F8 C0 07 FF F8 D1 A1 00 70 D1 81 00 78 D1 61 00 80 D1 41 00 88 D1 21 00 90 D0 21 00 74 D0 41 00 7C D0 A1 00 84 D0 01 00 8C 4B FF F9 78
+
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 14, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 14, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 14, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 14, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 14, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 14, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 14
+. 0 10011954 80
+. 81 21 00 2C 7D 78 39 D6 7C E7 8A 14 7C 08 4A 14 7C 1D 01 D6 55 6B 18 38 7D 3D 41 D6 54 00 18 38 7D BF 04 AE 7D 08 2A 14 55 29 18 38 7C 18 51 D6 7C 09 FC AE 7D 4A 8A 14 FD 80 68 28 FC 00 68 2A 54 00 18 38 7C 0B CD AE 7D 99 05 AE 42 00 FF B4
+
+. 0 100110E4 20
+. 39 F4 00 01 3A 60 00 01 55 E0 F8 7E 2B 80 00 01 40 9D 0A A4
+
+. 0 10011B98 8
+. 72 80 00 01 40 A2 FC 18
+
+. 0 10011BA0 52
+. 3C 00 43 30 80 FE 82 6C 90 01 00 08 3A 40 00 00 93 61 00 0C C9 A7 00 00 C8 01 00 08 81 3E 82 7C FC 00 68 28 CB E9 00 00 FF FF 00 24 FC 20 F8 90 48 01 73 25
+
+. 0 10011BD4 12
+. FF 80 08 90 FC 20 F8 90 48 01 73 B9
+
+. 0 10011BE0 12
+. 7F 92 80 40 FC 20 08 50 40 BC FB CC
+
+. 0 10011BEC 40
+. 82 FE 82 74 56 6A 08 3C 82 DE 82 78 38 C0 00 00 38 A0 00 00 38 E0 00 00 C8 77 00 00 7F 87 D8 40 C8 96 00 00 40 9C 00 FC
+
+. 0 10011C14 32
+. 2F 87 00 00 C8 B6 00 00 C9 37 00 00 FC C0 28 90 FD 40 28 90 FC E0 48 90 FD 00 28 90 41 9E 00 14
+
+. 0 10011C44 12
+. 39 00 00 00 7F 88 D8 40 40 9C 00 74
+
+. 0 10011C50 36
+. 7D 25 52 14 7F 69 03 A6 39 29 FF FF 7C 1D 49 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 18 38 41 9E 00 28
+
+. 0 10011C98 40
+. 7C 1F 04 AE FD A8 00 32 FC 07 00 32 FD 6A 03 72 FD 8A 00 32 FC 09 58 38 FD A9 63 7A FC A5 00 2A FC C6 68 2A 42 00 FF A0
+
+. 0 10011C5C 24
+. 7C 1D 49 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 18 38 41 9E 00 28
+
+. 0 10011C74 76
+. FC 08 07 32 FD 68 00 72 FD A4 02 B2 FD 84 02 72 FC 07 00 7A FD 23 6A 78 FD 43 62 BA FC E7 5F 38 FD 00 00 90 7C 1F 04 AE FD A8 00 32 FC 07 00 32 FD 6A 03 72 FD 8A 00 32 FC 09 58 38 FD A9 63 7A FC A5 00 2A FC C6 68 2A 42 00 FF A0
+
+. 0 10011CC0 16
+. 38 07 00 01 7D 27 D8 50 7F 80 48 40 40 9C 00 AC
+
+. 0 10011CD0 60
+. 7D 27 A1 D6 7F 80 D8 40 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 29 52 14 39 29 FF FF 55 2B 18 38 7D 38 49 D6 39 6B 00 08 7D 6B C1 D6 55 29 18 38 7C A9 CD AE 7C CB CD AE 41 9C FF 0C
+
+. 0 10011C34 28
+. FC 04 07 72 FD A3 07 72 FC 63 07 BA FC 84 6F B8 39 00 00 00 7F 88 D8 40 40 9C 00 74
+
+. 0 10011D78 8
+. 7F 80 48 00 41 9E 00 44
+
+. 0 10011DC0 44
+. 7D 27 A1 D6 7F 80 D8 40 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 29 52 14 39 29 FF FF 7D 38 49 D6 55 29 18 38 7C A9 CD AE 4B FF FF 20
+
+. 0 10011D08 4
+. 41 9C FF 0C
+
+. 0 10011D80 64
+. 7D 29 A1 D6 7F 80 D8 40 FC 00 30 50 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 2A 48 50 39 29 FF FF 55 2B 18 38 7D 38 49 D6 39 6B 00 08 7D 6B C1 D6 55 29 18 38 7C A9 CD AE 7C 0B CD AE 4B FF FF 4C
+
+. 0 10011D0C 20
+. 3A 52 00 01 7C A5 A2 14 7F 92 80 40 7C C6 8A 14 41 9C FE E4
+
+. 0 10011D20 28
+. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F2 14
+
+. 0 10011D3C 4
+. 4B FF FA 94
+
+PASS: gsl_fft_real with signal_real_noise, n = 14, stride = 1
+. 0 1000C6C0 56
+. 7F 9C DA 14 92 A1 00 08 7C 1C BB 96 7F B9 C2 14 3A D6 00 01 3B 5A 00 10 7C 00 B9 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 C8 01
+
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 14, stride = 1
+. 0 1000D114 20
+. 38 1B 00 01 3B 00 00 01 54 00 F8 7E 2B 80 00 01 40 9D 00 F8
+
+. 0 1000D128 28
+. 7C 15 03 78 3B F0 00 10 3B 3B FF FF 2F 96 00 00 C8 DF FF F0 C8 FF FF F8 41 9E 00 C8
+
+. 0 1000D144 196
+. 57 09 08 3C 57 2B 08 3C 38 C9 FF FF 7E C9 03 A6 38 8B FF FF 7C C5 33 78 57 63 08 3C 54 A9 18 38 54 8B 18 38 39 29 00 08 39 6B 00 08 7D 29 E1 D6 81 81 00 2C 54 C8 18 38 7D 46 62 14 55 47 18 38 7D 6B E1 D6 7D 29 EC AE 39 08 00 08 38 E7 00 08 7D 3C 29 D6 7D 0B EC AE 7C A5 1A 14 FD 89 40 2A FD 29 40 28 7C 1C 21 D6 55 29 18 38 7D 69 EC AE FD 46 03 32 7C 84 1A 14 FD 87 03 32 54 00 18 38 7D 57 51 D6 7D BD 04 AE FC 0B 68 28 7C 17 31 D6 FD 6B 68 2A 55 4A 18 38 FD 47 50 3A 7C C6 DA 14 FC 06 60 38 7D 08 B9 D6 54 00 18 38 7D 7A 05 AE 7C E7 B9 D6 7D 28 D5 AE 7C 0A D5 AE 7D 47 D5 AE 42 00 FF 5C
+
+. 0 1000D208 20
+. 3B 18 00 01 3B 39 FF FF 7F 95 C0 40 3B FF 00 10 41 9D FF 1C
+
+. 0 1000D134 16
+. 2F 96 00 00 C8 DF FF F0 C8 FF FF F8 41 9E 00 C8
+
+. 0 1000D21C 8
+. 73 79 00 01 40 A2 FC 90
+
+. 0 1000CAD0 20
+. 38 60 00 00 C9 16 00 00 7F 83 F8 40 C9 25 00 00 40 9C 00 A0
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 14, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 14, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 14
+. 0 10013980 80
+. 81 21 00 2C 7D 78 39 D6 7C E7 8A 14 7C 08 4A 14 7C 1F 01 D6 55 6B 10 3A 7D 3F 41 D6 54 00 10 3A 7D BD 04 2E 7D 08 22 14 55 29 10 3A 7C 18 51 D6 7C 09 EC 2E 7D 4A 8A 14 ED 80 68 28 EC 00 68 2A 54 00 10 3A 7C 0B CD 2E 7D 99 05 2E 42 00 FF B4
+
+. 0 100130D4 20
+. 39 F4 00 01 3A 60 00 01 55 E0 F8 7E 2B 80 00 01 40 9D 0A E0
+
+. 0 10013BC4 8
+. 72 80 00 01 40 A2 FC 18
+
+. 0 10013BCC 52
+. 3C 00 43 30 80 FE 82 C8 90 01 00 08 3A 40 00 00 93 61 00 0C C9 A7 00 00 C8 01 00 08 81 3E 82 D8 FC 00 68 28 CB E9 00 00 FF FF 00 24 FC 20 F8 90 48 01 52 F9
+
+. 0 10013C00 12
+. FF 80 08 18 FC 20 F8 90 48 01 53 8D
+
+. 0 10013C0C 16
+. 7F 92 80 40 FC 20 08 18 FC 20 08 50 40 BC FB C8
+
+. 0 10013C1C 40
+. 82 FE 82 D0 56 6A 08 3C 82 DE 82 D4 38 C0 00 00 38 A0 00 00 38 E0 00 00 C0 77 00 00 7F 87 D8 40 C0 96 00 00 40 9C 00 FC
+
+. 0 10013C44 32
+. 2F 87 00 00 C0 B6 00 00 C1 17 00 00 FC C0 28 90 FD 40 28 90 FC E0 40 90 FD 20 28 90 41 9E 00 14
+
+. 0 10013C74 12
+. 39 00 00 00 7F 88 D8 40 40 9C 00 74
+
+. 0 10013C80 36
+. 7D 25 52 14 7F 69 03 A6 39 29 FF FF 7C 1F 49 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 10 3A 41 9E 00 28
+
+. 0 10013CC8 40
+. 7C 1D 04 2E ED A7 00 32 EC 09 00 32 ED 6A 03 72 ED 8A 00 32 EC 08 58 3A ED A8 63 78 EC C6 00 2A EC A5 68 2A 42 00 FF A0
+
+. 0 10013C8C 24
+. 7C 1F 49 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 10 3A 41 9E 00 28
+
+. 0 10013CA4 76
+. EC 09 07 32 ED 89 00 72 ED 64 02 B2 EC 07 00 7A ED A4 02 32 EC E7 67 38 ED 03 5A 38 ED 43 6A BA FD 20 00 90 7C 1D 04 2E ED A7 00 32 EC 09 00 32 ED 6A 03 72 ED 8A 00 32 EC 08 58 3A ED A8 63 78 EC C6 00 2A EC A5 68 2A 42 00 FF A0
+
+. 0 10013CF0 16
+. 38 07 00 01 7D 27 D8 50 7F 80 48 40 40 9C 00 AC
+
+. 0 10013D00 60
+. 7D 27 A1 D6 7F 80 D8 40 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 29 52 14 39 29 FF FF 55 2B 10 3A 7D 38 49 D6 39 6B 00 04 7D 6B C1 D6 55 29 10 3A 7C A9 CD 2E 7C CB CD 2E 41 9C FF 0C
+
+. 0 10013C64 28
+. EC 04 07 72 ED A3 07 72 EC 63 07 BA EC 84 6F B8 39 00 00 00 7F 88 D8 40 40 9C 00 74
+
+. 0 10013DA8 8
+. 7F 80 48 00 41 9E 00 44
+
+. 0 10013DF0 44
+. 7D 27 A1 D6 7F 80 D8 40 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 29 52 14 39 29 FF FF 7D 38 49 D6 55 29 10 3A 7C A9 CD 2E 4B FF FF 20
+
+. 0 10013D38 4
+. 41 9C FF 0C
+
+. 0 10013DB0 64
+. 7D 29 A1 D6 7F 80 D8 40 FC 00 30 50 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 2A 48 50 39 29 FF FF 55 2B 10 3A 7D 38 49 D6 39 6B 00 04 7D 6B C1 D6 55 29 10 3A 7C A9 CD 2E 7C 0B CD 2E 4B FF FF 4C
+
+. 0 10013D3C 20
+. 3A 52 00 01 7C A5 A2 14 7F 92 80 40 7C C6 8A 14 41 9C FE E4
+
+. 0 10013D50 28
+. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F1 D4
+
+. 0 10013D6C 4
+. 4B FF FA 90
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 14, stride = 1
+. 0 1000E880 56
+. 7F 9C DA 14 92 A1 00 08 7C 1C BB 96 7F B9 C2 14 3A D6 00 01 3B 5A 00 08 7C 00 B9 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 A6 41
+
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 14, stride = 1
+. 0 1000F2E0 20
+. 38 1B 00 01 3B 00 00 01 54 00 F8 7E 2B 80 00 01 40 9D 00 F8
+
+. 0 1000F2F4 28
+. 7C 15 03 78 3B B0 00 08 3B 3B FF FF 2F 96 00 00 C0 DD FF F8 C0 FD FF FC 41 9E 00 C8
+
+. 0 1000F310 196
+. 57 09 08 3C 57 2B 08 3C 38 C9 FF FF 7E C9 03 A6 38 8B FF FF 7C C5 33 78 57 63 08 3C 54 A9 10 3A 54 8B 10 3A 39 29 00 04 39 6B 00 04 7D 29 E1 D6 81 81 00 2C 54 C8 10 3A 7D 46 62 14 55 47 10 3A 7D 6B E1 D6 7D 29 FC 2E 39 08 00 04 38 E7 00 04 7D 3C 29 D6 7D 0B FC 2E 7C A5 1A 14 EC 09 40 2A ED 29 40 28 7C 1C 21 D6 55 29 10 3A 7D A9 FC 2E ED 46 00 32 EC 07 00 32 7C 84 1A 14 54 00 10 3A 7D 57 51 D6 7D 9F 04 2E ED 6D 60 28 7C 17 31 D6 ED AD 60 2A 55 4A 10 3A ED 47 52 FA 7C C6 DA 14 ED 66 02 F8 7D 08 B9 D6 54 00 10 3A 7D BA 05 2E 7C E7 B9 D6 7D 28 D5 2E 7D 6A D5 2E 7D 47 D5 2E 42 00 FF 5C
+
+. 0 1000F3D4 20
+. 3B 18 00 01 3B 39 FF FF 7F 95 C0 40 3B BD 00 08 41 9D FF 1C
+
+. 0 1000F300 16
+. 2F 96 00 00 C0 DD FF F8 C0 FD FF FC 41 9E 00 C8
+
+. 0 1000F3E8 8
+. 73 79 00 01 40 A2 FC 90
+
+. 0 1000EC98 20
+. 38 60 00 00 C1 16 00 00 7F 83 E8 40 C1 25 00 00 40 9C 00 A0
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 14, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 14, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 14
+PASS: gsl_fft_complex_forward with signal_noise, n = 14, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 14, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 14, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 14, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 14, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 14, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 14, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 14, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 14, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 14, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 14
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 14, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 14, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 14, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 14, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 14, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 14, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 14, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 14, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 14, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 14, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 14
+PASS: gsl_fft_real with signal_real_noise, n = 14, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 14, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 14, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 14, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 14
+PASS: gsl_fft_real_float with signal_real_noise, n = 14, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 14, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 14, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 14, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 14
+PASS: gsl_fft_complex_forward with signal_noise, n = 14, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 14, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 14, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 14, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 14, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 14, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 14, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 14, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 14, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 14, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 14
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 14, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 14, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 14, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 14, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 14, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 14, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 14, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 14, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 14, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 14, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 14
+PASS: gsl_fft_real with signal_real_noise, n = 14, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 14, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 14, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 14, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 14
+PASS: gsl_fft_real_float with signal_real_noise, n = 14, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 14, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 14, stride = 3
+. 0 FE0CB98 20
+. 83 1E 0F 64 FD A0 F8 90 CB 98 00 00 FE 1F E0 00 40 91 07 50
+
+. 0 FE0D2F8 8
+. FD A0 F8 50 4B FF F8 B0
+
+. 0 FE0CBAC 192
+. C8 26 00 00 83 7E 0F 84 FD 01 68 2A 80 DE 0F 88 C8 9B 00 00 FD 48 08 28 D9 01 00 30 81 61 00 30 81 81 00 34 FD 6D 50 28 55 99 28 34 7F 59 52 14 7D 59 54 AE C8 FA 00 10 FD 0B 02 F2 C8 5A 00 18 C8 BA 00 08 FC 07 20 2A FC CB 20 2A FC 68 1F BA FD 2B 02 32 FC 20 20 28 FD A8 D6 FA FD 89 00 F2 FD 27 08 28 FC 66 20 28 FF CC 28 BA FD AD EA 3A FF 67 F3 3A FF 49 10 2A FC A1 00 F2 FD 9A DA FA CB 66 00 00 FC 8D 02 32 FC 4B 18 28 FF C5 50 2A FC EA 01 32 FC C1 60 BA FD 0A F0 28 FC 06 38 28 FD 68 28 2A FD 20 58 2A FC 3E 48 2A FF BE 08 28 FF 49 E8 2A FC 7A 0E FA FC 83 08 00 41 86 06 98
+
+. 0 FE0D300 4
+. 41 B1 F7 58
+
+. 0 FE0D304 8
+. FC 20 08 50 4B FF FA B8
+
+PASS: gsl_fft_complex_wavetable_alloc, n = 15, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 15
+. 0 FE0DBA4 20
+. FF 1F E8 00 81 3E 0F 88 CB A9 00 00 FC 84 07 72 40 99 03 30
+
+. 0 FE0DEE4 8
+. 81 3E 0F B8 4B FF FC D4
+
+. 0 FE0DBBC 20
+. C8 A9 00 00 FC 1F 21 7A FC C1 00 2A FE 06 08 00 41 B2 F5 78
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 15, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 15, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 15, stride = 1
+. 0 FE0EAC4 20
+. CB C6 00 00 FF A0 20 90 FC E0 10 90 FF 82 F0 00 41 9D 00 08
+
+. 0 FE0EADC 32
+. C8 AA 00 00 FD A5 38 2A FD 8D 28 28 D9 A1 00 30 81 41 00 30 81 61 00 34 FC 27 60 28 41 9D 00 08
+
+. 0 FE0EB00 188
+. FD 21 00 72 C8 C5 00 00 C8 84 00 00 C9 07 00 00 55 67 28 34 81 5E 0F E0 7C A7 42 14 FC A9 21 BA C8 9D 00 00 C9 4A 00 00 C8 C3 00 00 FC 61 50 2A FD A5 42 7A 7C A7 44 AE FD 03 50 28 C8 65 00 08 FD 85 50 2A FD 6D 02 72 FD 8C 50 28 FC E1 40 28 FC 01 5F 7A C9 65 00 10 FC E7 E8 2A FD 45 60 28 FD AB 00 32 C8 05 00 18 FC C9 21 BA FD 21 02 72 FD 0C 02 32 FD 4A 18 2A FD 8C 01 F2 FC 80 68 28 FD A9 01 B2 FC 6A 00 72 FC E4 60 28 FC 8B 40 28 FC 25 03 72 FD 6B 20 28 FC 07 18 28 FD 2B 40 28 FD 40 08 28 FC CA 48 2A FC 24 30 2A FD 04 08 28 FC 86 40 2A FF 84 F0 00 40 9D 01 D4
+
+. 0 FE0ED8C 20
+. 83 BE 0F E4 FC 9F F0 00 C8 1D 00 00 FC 84 00 32 40 85 00 F0
+
+. 0 FE0EE8C 8
+. 81 3E 10 18 4B FF FF 14
+
+. 0 FE0EDA4 16
+. C9 69 00 00 FC FF 02 F2 FC 04 38 28 4B FF FE 2C
+
+. 0 FE0EBDC 12
+. FD 81 00 2A FF 0C 08 00 41 9A 00 60
+
+. 0 FE0EC44 8
+. 2F 9F 00 00 41 BE F5 44
+
+PASS: gsl_fft_complex_forward with signal_pulse, n = 15, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 15, stride = 1
+. 0 FE0EDA0 20
+. 81 3E 10 10 C9 69 00 00 FC FF 02 F2 FC 04 38 28 4B FF FE 2C
+
+PASS: gsl_fft_complex_forward with signal_exp, n = 15, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 15, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 15
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 15, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 15, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 15, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 15, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 15, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 15, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 15, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 15
+. 0 10011F00 32
+. 2F 95 00 00 C8 1C FF F8 C9 BA FF F8 FC 80 00 50 C8 BC FF F0 FC 40 68 50 C8 7A FF F0 41 9E 01 50
+
+PASS: gsl_fft_real with signal_real_noise, n = 15, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 15, stride = 1
+. 0 1000DB6C 60
+. 39 D8 00 10 3A 35 00 10 39 F6 00 10 3A 10 00 10 57 78 08 3C 2F 93 00 00 CA F0 FF F0 CA D0 FF F8 CA AE FF F0 CA 8E FF F8 CA 6F FF F0 CA 4F FF F8 CA 31 FF F0 CA 11 FF F8 41 9E 02 64
+
+. 0 1000DBA8 400
+. 81 3E 81 80 56 96 08 3C 81 5E 81 7C 3B F6 FF FF C9 E9 00 00 3A A0 00 00 C9 CA 00 00 7E 69 03 A6 1C F5 00 05 7C 7F CA 14 7E B5 DA 14 7D 76 38 50 7C E7 B2 14 7D 6B C2 14 38 E7 FF FF 39 6B FF FF 7C 18 3A 14 7C D8 5A 14 55 6A 18 38 54 C9 18 38 39 4A 00 08 39 29 00 08 7D 18 02 14 7D 29 E1 D6 54 05 18 38 55 04 18 38 38 A5 00 08 38 84 00 08 7D 4A E1 D6 7D 09 EC AE 54 E9 18 38 FD 00 40 50 39 29 00 08 7C 1C 01 D6 7C 8A EC AE 7D 43 CA 14 FC 80 20 50 7D 1C 41 D6 54 00 18 38 7C FD 04 AE 7C 0A CA 14 7C DC 31 D6 55 08 18 38 7D 48 EC AE 7D 00 CA 14 7D 7C 59 D6 54 C6 18 38 7C A6 EC AE 55 46 18 38 38 C6 00 08 FC CA 28 2A 7C A5 E1 D6 55 6B 18 38 7C 6B EC AE FD 4A 28 28 57 EB 18 38 FD A7 18 2A 39 6B 00 08 7C 84 E1 D6 7D 65 EC AE FC B9 02 B2 54 05 18 38 38 A5 00 08 FD 8B 20 2A 7C 04 EC AE FF 6D 30 2A 7C FC 39 D6 FD AD 30 28 FD 20 40 2A 55 04 18 38 FC 00 40 28 38 84 00 08 FD 1B 03 B2 7D 29 E1 D6 54 E7 18 38 FF 4C 48 2A 7C 47 EC AE FD 8C 48 28 54 67 18 38 FC D9 00 32 38 E7 00 08 7C 29 EC AE 7C 77 19 D6 FD 3A 03 B2 FD 58 02 B2 7D 37 F9 D6 54 63 18 38 FC 18 00 32 7F FF DA 14 FC E7 18 28 FD 6B 20 28 7D 57 51 D6 FD AD 03 F2 55 29 18 38 FD 8C 03 F2 7C 17 01 D6 55 4A 18 38 FD 02 40 28 FD 21 48 28 FC B8 29 F8
+
+. 0 1000DD38 208
+. 7D 17 41 D6 54 00 18 38 FC D8 32 F8 FC F9 51 FA 7D 6B B9 D6 55 08 18 38 FD 79 02 FA FD 49 60 28 FC 08 68 28 7C E7 B9 D6 FD 08 68 2A FD 29 60 2A FD A0 30 2A FD 8A 28 28 7C C6 B9 D6 FC 88 58 2A FC 69 38 28 FD 08 58 28 FD 29 38 2A 7C A5 B9 D6 FC 00 30 28 FD 4A 28 2A FF F6 02 32 7C 84 B9 D6 FF D4 00 32 FF B2 03 72 FF 90 01 32 FD 76 02 72 FC F4 02 B2 FC D2 03 32 FC B0 00 F2 FD 37 FA 7A FD 55 F2 BA FD 93 EB 3A FC 71 E0 FA FD 17 5A 38 FC 15 38 38 FD B3 33 78 FC 91 29 38 FC 42 D8 2A FC 21 D0 2A 7C 49 D5 AE 7C 2B D5 AE 7D 03 D5 AE 7D 27 D5 AE 7C 0A D5 AE 7D 46 D5 AE 7D BA 05 AE 7D 85 D5 AE 7C 88 D5 AE 7C 64 D5 AE 42 00 FD C4
+
+. 0 1000DE08 32
+. 3A 94 00 01 56 40 F8 7E 7F 80 A0 40 3A 10 00 10 39 CE 00 10 39 EF 00 10 3A 31 00 10 41 9D FD 5C
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 15, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 15, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 15
+. 0 10013F48 32
+. 2F 95 00 00 C0 1C FF FC C1 BA FF FC FC 80 00 50 C0 BC FF F8 FC 40 68 50 C0 7A FF F8 41 9E 01 58
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 15, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 15, stride = 1
+. 0 1000FD68 60
+. 39 96 00 08 39 F5 00 08 39 D9 00 08 3A 10 00 08 57 76 08 3C 2F 92 00 00 C2 F0 FF F8 C2 D0 FF FC C2 AC FF F8 C2 8C FF FC C2 6E FF F8 C2 4E FF FC C2 2F FF F8 C2 0F FF FC 41 9E 02 84
+
+. 0 1000FDA4 400
+. 81 3E 81 F8 56 75 08 3C 81 5E 81 F4 3B 35 FF FF C9 E9 00 00 3A 80 00 00 C9 CA 00 00 7E 49 03 A6 1C F4 00 05 7F B9 C2 14 7C 7D C2 14 7E 94 DA 14 7D 75 38 50 7C E7 AA 14 7D 6B B2 14 38 E7 FF FF 39 6B FF FF 7C 16 3A 14 7C D6 5A 14 55 6A 10 3A 54 C9 10 3A 39 4A 00 04 39 29 00 04 7D 16 02 14 7D 29 E1 D6 54 05 10 3A 55 04 10 3A 38 A5 00 04 38 84 00 04 7D 4A E1 D6 7C 89 FC 2E 54 E9 10 3A FC 80 20 50 39 29 00 04 7C 1C 01 D6 7C 6A FC 2E FC 60 18 50 7D 1C 41 D6 54 00 10 3A 7C BF 04 2E 7C DC 31 D6 55 08 10 3A 7C C8 FC 2E 7D 7C 59 D6 54 C6 10 3A 7F E6 FC 2E 57 A6 10 3A 38 C6 00 04 ED 66 F8 2A 7C A5 E1 D6 55 6B 10 3A 7F CB FC 2E EC C6 F8 28 7D 63 C2 14 EC 05 F0 2A 55 6A 10 3A 7C 84 E1 D6 7C E5 FC 2E EC A5 F0 28 54 65 10 3A ED A7 18 2A 38 A5 00 04 EF 60 58 2A 39 4A 00 04 7D 04 FC 2E 7C FC 39 D6 EC 00 58 28 ED 88 20 2A FD 40 D8 90 7D 29 E1 D6 54 E7 10 3A EF 4D 60 2A 7C 47 FC 2E ED AD 60 28 7C EB C2 14 FD 4A 03 B2 54 E8 10 3A 7C 29 FC 2E 57 29 10 3A FD 20 D0 90 7C 17 C9 D6 39 29 00 04 39 08 00 04 FD 29 03 B2 7F 39 DA 14 7F B7 E9 D6 54 00 10 3A FD 80 10 90 FD 60 08 90 FC 00 03 F2 7C 77 19 D6 57 BD 10 3A FD AD 03 F2 ED 08 20 28 FD 8C 50 28 7D 77 59 D6 FD 6B 48 28 54 63 10 3A EC E7 18 28 FC 00 00 18
+
+. 0 1000FF34 240
+. FD A0 68 18 7C F7 39 D6 FD 80 60 18 55 6B 10 3A FD 60 58 18 ED 39 01 B2 ED 59 02 32 7D 29 B9 D6 EC D8 01 B2 54 E7 10 3A ED 18 02 32 ED 38 49 78 ED 58 51 F8 7C C6 B9 D6 EC 8C 00 28 EC 6B 68 28 EC B9 31 7A EC F9 41 FA 7C A5 B9 D6 ED 8C 00 2A ED 6B 68 2A EC 04 50 2A ED A3 48 28 7D 4A B9 D6 ED 0C 38 2A EC CB 28 28 ED 8C 38 28 ED 6B 28 2A 7D 08 B9 D6 EC 84 50 28 EC 63 48 2A ED 56 03 32 ED 34 01 32 EC F2 00 32 EC B0 02 32 EF F6 02 F2 EF D4 00 F2 EF B2 03 72 EF 90 01 B2 EC 42 D8 2A EC 21 D0 2A ED 77 52 FA EC 75 48 FA 7C 5A 05 2E ED B3 3B 7A 7C 29 D5 2E EC D1 29 BA ED 97 FB 38 EC 95 F1 38 EC 13 E8 38 ED 11 E2 38 7D 9D D5 2E 7D 66 D5 2E 7C 83 D5 2E 7C 65 D5 2E 7C 0B D5 2E 7D AA D5 2E 7D 07 D5 2E 7C C8 D5 2E 42 00 FD A4
+
+. 0 10010024 32
+. 3A 73 00 01 56 20 F8 7E 7F 80 98 40 3A 10 00 08 39 8C 00 08 39 CE 00 08 39 EF 00 08 41 9D FD 3C
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 15, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 15, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 15
+PASS: gsl_fft_complex_forward with signal_noise, n = 15, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 15, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 15, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 15, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 15, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 15, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 15, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 15, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 15, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 15, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 15
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 15, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 15, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 15, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 15, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 15, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 15, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 15, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 15, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 15, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 15, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 15
+PASS: gsl_fft_real with signal_real_noise, n = 15, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 15, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 15, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 15, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 15
+PASS: gsl_fft_real_float with signal_real_noise, n = 15, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 15, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 15, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 15, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 15
+PASS: gsl_fft_complex_forward with signal_noise, n = 15, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 15, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 15, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 15, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 15, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 15, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 15, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 15, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 15, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 15, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 15
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 15, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 15, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 15, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 15, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 15, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 15, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 15, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 15, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 15, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 15, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 15
+PASS: gsl_fft_real with signal_real_noise, n = 15, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 15, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 15, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 15, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 15
+PASS: gsl_fft_real_float with signal_real_noise, n = 15, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 15, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 15, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 16, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 16
+. 0 10007A84 316
+. 81 41 01 84 7D 70 EA 14 7D 6B C9 D6 7D 24 FA 14 7C 1D 52 14 C9 29 00 08 7D 54 EA 14 7D 84 FC AE 7C C5 D2 14 7C 00 C9 D6 55 6B 20 36 7D 2B FA 14 7C CB FC AE C8 49 00 08 7D 73 1A 14 3B BD 00 01 54 00 20 36 7D 4A C9 D6 7D 00 FA 14 7C 7F 04 AE C8 88 00 08 7C 15 1A 14 FD 43 30 28 7F 7B CA 14 FD 64 10 28 55 4A 20 36 7D 2A FA 14 7D 0A FC AE C8 E9 00 08 FD 5D 02 B2 7D 23 E2 14 7D 6B C1 D6 FD 7D 02 F2 7C 84 B2 14 38 63 00 01 FC 0C 40 28 FD A9 38 28 7D 29 C1 D6 FC 63 30 2A 55 6B 20 36 FC 84 10 2A 7D 0B D2 14 FD 8C 40 2A FD 29 38 2A 7C 00 C1 D6 FC A0 58 2A 55 29 20 36 FC CD 50 28 7D 49 D2 14 FD 0C 18 28 FC E9 20 28 54 00 20 36 FD AD 50 2A 7C E0 D2 14 FC 00 58 28 FF D9 02 32 FD 77 00 32 FD 5A 01 72 FC 57 03 72 FC 39 01 F2 FF FA 01 B2 FD B8 5B 7A FC FB F1 FA FC DC 51 BA FC 18 10 38 FD 1B 0A 38 FC BC F9 78 FD 8C 18 2A FD 29 20 2A 7D 85 D5 AE 7C A5 BA 14 D9 26 00 08 7C 09 D5 AE D9 AA 00 08 7D 0B D5 AE D8 E8 00 08 7C BA 05 AE D8 C7 00 08 42 00 FE C8
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 16, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 16, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 16, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 16, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 16, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 16, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 16, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 16
+. 0 1000A8D0 316
+. 81 21 01 40 7D 70 EA 14 7D 6B C9 D6 7D 54 EA 14 7C 1D 4A 14 7D A4 FC 2E 7D 24 FA 14 C0 E9 00 04 3B BD 00 01 7C 00 C9 D6 55 6B 18 38 7D 2B FA 14 7C AB FC 2E C0 89 00 04 7D 75 1A 14 7F 7B CA 14 7D 4A C9 D6 54 00 18 38 7D 00 FA 14 7C 7F 04 2E C0 C8 00 04 7C 03 E2 14 ED 43 28 28 7C 84 B2 14 55 4A 18 38 EC 06 20 28 7D 2A FA 14 7D 2A FC 2E C1 09 00 04 ED 5D 02 B2 ED 8D 48 28 7D 33 1A 14 ED 67 40 28 7C 00 C1 D6 EC 1D 00 32 7D 45 D2 14 ED AD 48 2A 38 63 00 01 EC E7 40 2A EC 63 28 2A 7D 29 C1 D6 EC C6 20 2A 54 00 18 38 EC 4C 00 2A 7D 00 D2 14 EC 8B 50 28 ED 0D 18 28 7D 6B C1 D6 EC A7 30 28 55 29 18 38 ED 8C 00 28 7C E9 D2 14 ED 6B 50 2A EF FA 02 32 55 6B 18 38 EC 37 03 32 7C CB D2 14 EF D9 00 B2 EC 17 02 F2 ED 5A 01 72 ED 39 01 32 ED 78 0A FA EC BB F9 7A EC 9C F1 3A ED 98 03 38 ED 1B 52 38 EC 5C 48 B8 ED AD 18 2A EC E7 30 2A 7D A5 D5 2E 7C A5 BA 14 D0 EA 00 04 7D 9A 05 2E D1 68 00 04 7D 09 D5 2E D0 A7 00 04 7C 4B D5 2E D0 86 00 04 42 00 FE C8
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 16, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 16, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 16, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 16, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 16, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 16, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 16, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 16
+. 0 1001222C 20
+. 3A 1A 00 01 3A 60 00 01 56 00 F8 7E 2B 80 00 01 40 9D 01 FC
+
+. 0 10012240 60
+. 3A D5 00 10 3A 9C 00 10 3A B7 00 10 57 57 08 3C 2F 92 00 00 C8 14 FF F8 C9 B5 FF F8 C9 96 FF F8 FC 20 00 50 FF C0 68 50 C8 54 FF F0 FF 80 60 50 CB F5 FF F0 CB B6 FF F0 41 9E 01 A4
+
+. 0 1001227C 400
+. 56 67 08 3C 7D 33 D0 50 55 29 08 3C 3B 87 FF FF 7E 49 03 A6 38 69 FF FF 7F 9B E3 78 7C 1B 72 14 57 66 18 38 7D 60 72 14 54 09 18 38 7D 0B 72 14 39 29 00 08 55 0A 18 38 7D 29 E9 D6 39 4A 00 08 55 67 18 38 38 E7 00 08 7D 4A E9 D6 7D 49 FC AE 38 C6 00 08 FD 21 02 B2 7C B7 E2 14 7C 97 1A 14 7C 1D 01 D6 7C AA FC AE 54 69 18 38 FD 7C 01 72 57 8A 18 38 39 4A 00 08 7D 7D 59 D6 54 00 18 38 7D 9F 04 AE 39 29 00 08 FC 01 03 32 7D 1D 41 D6 55 6B 18 38 7C EB FC AE FD 82 4B 38 FC DE 01 F2 7C E7 E9 D6 55 08 18 38 7D 08 FC AE FD 42 02 BA 54 88 18 38 FC 9C 02 32 39 08 00 08 7D A7 FC AE 7C C6 E9 D6 FD 1D 5A 38 54 A7 18 38 38 E7 00 08 FD 3E 03 72 7C 1D D9 D6 7D 66 FC AE FD BF 33 7A 7F 7B D2 14 FC BD 21 7A 54 00 18 38 7D 78 19 D6 FC CC 40 28 7C 1F 04 AE FC FF 49 F8 7C 63 8A 14 FC 8B 68 28 7C 18 E1 D6 FD 2A 28 28 55 6B 18 38 FD 6B 68 2A 7F 9C 8A 14 FC C0 30 50 FD 4A 28 2A 7C B8 29 D6 FD A0 38 28 54 00 18 38 FC 00 38 2A FC 64 30 28 FC AB 50 28 7C 98 21 D6 FD 20 48 50 54 A5 18 38 FD 8C 40 2A FC A0 28 50 7D 4A C1 D6 FC ED 48 2A FD 00 60 28 54 84 18 38 FC 60 18 50 FC 00 60 2A 7C E7 C1 D6 FD 6B 50 2A FD AD 48 28 FC 84 30 2A 7C 19 05 AE 7D 6A CD AE 7D 08 C1 D6 7D A5 CD AE 7C 87 CD AE 7D 04 CD AE 7D 29 C1 D6
+
+. 0 1001240C 16
+. 7C A8 CD AE 7C EB CD AE 7C 69 CD AE 42 00 FE 80
+
+. 0 1001241C 28
+. 3A 73 00 01 56 00 F8 7E 7F 80 98 40 3A 94 00 10 3A B5 00 10 3A D6 00 10 41 9D FE 1C
+
+. 0 10012438 8
+. 73 40 00 01 40 A2 F3 78
+
+. 0 10012440 8
+. 2F 92 00 00 41 BE F3 70
+
+. 0 10012448 196
+. 56 67 08 3C 7E 49 03 A6 38 C7 FF FF 80 FE 82 58 57 44 08 3C 38 BA FF FF C9 07 00 00 7C 05 72 14 7D 44 32 14 7D 60 72 14 7C 1D 01 D6 7D 2B 72 14 55 48 18 38 54 C7 18 38 7D 3D 49 D6 54 00 18 38 7C 1F 04 AE 38 E7 00 08 39 08 00 08 7D 7D 59 D6 55 29 18 38 7D A9 FC AE FD 80 68 2A 7C 1D 29 D6 FC 00 68 28 55 6B 18 38 7D 4B FC AE FD 8C 02 32 7C A5 D2 14 FC 00 02 32 54 00 18 38 7D BF 04 AE 7D 58 51 D6 FD 60 50 50 FD 4A 60 28 FD 2D 00 28 7C 18 31 D6 FD 6B 60 28 FD AD 00 2A 55 4A 18 38 7C C6 8A 14 7C E7 C1 D6 54 00 18 38 7D B9 05 AE 7D 08 C1 D6 7D 67 CD AE 7D 2A CD AE 7D 48 CD AE 42 00 FF 5C
+
+. 0 1001250C 28
+. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 EA 28
+
+. 0 10012528 4
+. 4B FF F2 A8
+
+PASS: gsl_fft_real with signal_real_noise, n = 16, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 16, stride = 1
+. 0 1000D620 172
+. 54 A0 10 3A 81 81 00 30 7D 23 02 14 7C 1C 01 D6 39 29 FF FF 55 2A 18 38 7D 63 4A 14 39 4A 00 08 7D 7C 59 D6 54 00 18 38 7D 9D 04 AE 7D 05 62 14 7C E8 62 14 7D 3C 49 D6 55 6B 18 38 7D 4B EC AE 7C C7 62 14 FD 6C 50 28 7D 4A E1 D6 55 29 18 38 7C 09 EC AE FD 8C 50 2A FC 00 00 2A 7D AA EC AE 7C 17 29 D6 7C A5 DA 14 FD AD 68 2A FD 4C 00 28 7D 17 41 D6 FD 8C 00 2A FD 2B 68 2A 54 00 18 38 FD 6B 68 28 7D 9A 05 AE 7C F7 39 D6 55 08 18 38 7D 68 D5 AE 7C D7 31 D6 54 E7 18 38 7D 47 D5 AE 54 C6 18 38 7D 26 D5 AE 42 00 FF 58
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 16, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 16, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 16
+. 0 10014288 20
+. 3A 1A 00 01 3A 60 00 01 56 00 F8 7E 2B 80 00 01 40 9D 01 FC
+
+. 0 1001429C 60
+. 3A B7 00 08 3A DB 00 08 3A 9C 00 08 57 57 08 3C 2F 92 00 00 C0 14 FF FC C1 B5 FF FC C1 96 FF FC FC 20 00 50 FF C0 68 50 C0 54 FF F8 FF 80 60 50 C3 F5 FF F8 C3 B6 FF F8 41 9E 01 A4
+
+. 0 100142D8 400
+. 56 68 08 3C 7D 33 D0 50 55 29 08 3C 3B 88 FF FF 7E 49 03 A6 38 69 FF FF 7F 9B E3 78 7C 1B 72 14 57 66 10 3A 7D 60 72 14 54 09 10 3A 7D 0B 72 14 39 29 00 04 55 0A 10 3A 7D 29 F9 D6 39 4A 00 04 55 67 10 3A 38 E7 00 04 7D 4A F9 D6 7D 49 EC 2E 38 C6 00 04 ED 21 02 B2 7C B7 E2 14 7C 97 1A 14 7C 1F 01 D6 7C EA EC 2E 57 89 10 3A EC 9C 01 F2 54 6A 10 3A 39 29 00 04 7D 7F 59 D6 54 00 10 3A 7D 7D 04 2E 39 4A 00 04 ED 22 4A F8 7D 1F 41 D6 55 6B 10 3A 7D 0B EC 2E ED 61 02 F2 54 AB 10 3A ED 9E 02 32 39 6B 00 04 7C E7 F9 D6 55 08 10 3A 7C 08 EC 2E ED 42 5A BA 54 88 10 3A EC 9D 20 38 39 08 00 04 EC 1C 00 32 7C C6 F9 D6 7D A7 EC 2E EC A9 20 28 ED 9F 63 7A 7C 1F D9 D6 EC FD 01 FA ED BE 03 72 7D 66 EC 2E FC A0 28 50 7F 7B D2 14 EC 6B 60 28 EC CA 38 28 54 00 10 3A ED 1F 6A 38 7C 1D 04 2E ED 4A 38 2A 7C 18 E1 D6 ED 6B 60 2A 7F 9C 8A 14 ED A0 40 28 ED 29 20 2A EC E3 28 28 7C F8 19 D6 ED 8B 50 28 54 00 10 3A FC C0 30 50 7C 63 8A 14 EC 00 40 2A 7C B8 29 D6 FD 80 60 50 EC 8D 30 2A 54 E7 10 3A ED 00 48 28 FC E0 38 50 7C 98 21 D6 EC 00 48 2A ED 6B 50 2A 54 A5 10 3A ED AD 30 28 EC 63 28 2A 7C 19 05 2E 7D 29 C1 D6 54 84 10 3A 7D 6B C1 D6 7D 69 CD 2E 7D A5 CD 2E 7D 08 C1 D6 7C 6B CD 2E 7D 04 CD 2E 7D 4A C1 D6
+
+. 0 10014468 16
+. 7D 88 CD 2E 7C 87 CD 2E 7C EA CD 2E 42 00 FE 80
+
+. 0 10014478 28
+. 3A 73 00 01 56 00 F8 7E 7F 80 98 40 3A 94 00 08 3A B5 00 08 3A D6 00 08 41 9D FE 1C
+
+. 0 10014494 8
+. 73 48 00 01 40 A2 F3 48
+
+. 0 1001449C 8
+. 2F 92 00 00 41 BE F3 40
+
+. 0 100144A4 204
+. 81 3E 82 B4 56 68 08 3C 38 C8 FF FF 7E 49 03 A6 57 44 08 3C C9 09 00 00 38 BA FF FF 7C 05 72 14 7D 44 32 14 7D 60 72 14 7C 1F 01 D6 7D 2B 72 14 55 47 10 3A 54 C8 10 3A 7D 3F 49 D6 54 00 10 3A 7D BD 04 2E 39 08 00 04 38 E7 00 04 55 29 10 3A 7D 7F 59 D6 7D 89 EC 2E EC 0D 60 2A ED AD 60 28 7C 1F 29 D6 55 6B 10 3A 7D 6B EC 2E 7C A5 D2 14 FD 40 58 50 54 00 10 3A FC 00 02 32 7D 9D 04 2E 7D 38 31 D6 7C C6 8A 14 FD AD 02 32 FC 00 00 18 7D 58 51 D6 55 29 10 3A FD A0 68 18 ED 6B 00 28 ED 4A 00 28 7D 08 C1 D6 ED 2C 68 28 ED 8C 68 2A 55 4A 10 3A 7C E7 C1 D6 7D 89 CD 2E 7D 48 CD 2E 7D 2A CD 2E 7D 67 CD 2E 42 00 FF 54
+
+. 0 10014570 28
+. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 E9 B4
+
+. 0 1001458C 4
+. 4B FF F2 70
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 16, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 16, stride = 1
+. 0 1000F804 172
+. 54 A0 10 3A 81 81 00 30 7D 23 02 14 7C 1C 01 D6 39 29 FF FF 55 2A 10 3A 7D 63 4A 14 39 4A 00 04 7D 7C 59 D6 54 00 10 3A 7D 9F 04 2E 7D 05 62 14 7C E8 62 14 7D 3C 49 D6 55 6B 10 3A 7D 4B FC 2E 7C C7 62 14 ED 6C 50 28 7D 4A E1 D6 55 29 10 3A 7C 09 FC 2E ED 8C 50 2A EC 00 00 2A 7D AA FC 2E 7C 17 29 D6 7C A5 DA 14 ED AD 68 2A ED 4C 00 28 7D 17 41 D6 ED 8C 00 2A ED 2B 68 2A 54 00 10 3A ED 6B 68 28 7D 9A 05 2E 7C F7 39 D6 55 08 10 3A 7D 68 D5 2E 7C D7 31 D6 54 E7 10 3A 7D 47 D5 2E 54 C6 10 3A 7D 26 D5 2E 42 00 FF 58
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 16, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 16, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 16
+PASS: gsl_fft_complex_forward with signal_noise, n = 16, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 16, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 16, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 16, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 16, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 16, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 16, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 16, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 16, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 16, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 16
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 16, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 16, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 16, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 16, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 16, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 16, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 16, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 16, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 16, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 16, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 16
+PASS: gsl_fft_real with signal_real_noise, n = 16, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 16, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 16, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 16, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 16
+PASS: gsl_fft_real_float with signal_real_noise, n = 16, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 16, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 16, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 16, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 16
+PASS: gsl_fft_complex_forward with signal_noise, n = 16, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 16, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 16, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 16, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 16, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 16, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 16, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 16, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 16, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 16, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 16
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 16, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 16, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 16, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 16, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 16, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 16, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 16, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 16, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 16, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 16, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 16
+PASS: gsl_fft_real with signal_real_noise, n = 16, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 16, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 16, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 16, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 16
+PASS: gsl_fft_real_float with signal_real_noise, n = 16, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 16, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 16, stride = 3
+. 0 FE0D438 16
+. CB BD 00 00 FC E0 F0 90 FF 9E E8 00 41 9D 00 08
+
+. 0 FE0D44C 32
+. C9 0A 00 00 FC A8 38 2A FF 65 40 28 D8 A1 00 30 81 41 00 30 81 61 00 34 FC 27 D8 28 41 9D 00 08
+
+. 0 FE0D470 188
+. FF 41 00 72 C9 47 00 00 C8 66 00 00 55 6A 28 34 C8 E5 00 00 7C EA 42 14 83 1E 0F 84 FF 9A 1A BA C8 A4 00 00 C8 18 00 00 C9 63 00 00 FD 81 00 2A C8 67 00 08 FD BC 3E BA 7F 8A 44 AE FD 0C 00 28 FC DC 00 2A FF 6D 06 B2 FD 86 00 28 C8 07 00 18 FD 21 40 28 FC 81 D8 BA CB 67 00 10 FC E9 10 2A FD 5C 60 28 FD BB 01 32 FC DA 59 7A FD 21 06 B2 FD 6C 01 F2 FF 4C 02 32 FC 8A 18 2A FC A0 68 28 FD 29 01 B2 FD 44 00 72 FD BB D0 28 FC 85 58 28 FC 7C 02 72 FD 84 50 28 FC DB 68 28 FC 2C 18 28 FD 66 D0 28 FC 01 58 2A FC 2D 00 2A FC ED 08 28 FC 80 38 2A FC 04 E8 00 40 81 05 5C
+
+. 0 FE0DA84 20
+. 81 1E 0F 88 FF 9F E8 00 CB 48 00 00 FC 84 06 B2 40 9D 02 F0
+
+. 0 FE0DD84 8
+. 81 3E 0F B8 4B FF FD 14
+
+. 0 FE0DA9C 16
+. C9 69 00 00 FC BF 02 F2 FC 04 28 28 4B FF FA A4
+
+. 0 FE0D54C 12
+. FC 81 00 2A FC 84 08 00 41 86 02 6C
+
+. 0 FE0D7C0 8
+. 57 E0 F8 7F 41 A2 F2 94
+
+PASS: gsl_fft_complex_wavetable_alloc, n = 17, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 17
+PASS: gsl_fft_complex_forward with signal_noise, n = 17, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 17, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 17, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 17, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 17, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 17, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 17, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 17
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 17, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 17, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 17, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 17, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 17, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 17, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 17, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 17
+PASS: gsl_fft_real with signal_real_noise, n = 17, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 17, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 17, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 17, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 17
+PASS: gsl_fft_real_float with signal_real_noise, n = 17, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 17, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 17, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 17, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 17
+PASS: gsl_fft_complex_forward with signal_noise, n = 17, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 17, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 17, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 17, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 17, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 17, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 17, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 17, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 17, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 17, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 17
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 17, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 17, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 17, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 17, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 17, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 17, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 17, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 17, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 17, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 17, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 17
+PASS: gsl_fft_real with signal_real_noise, n = 17, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 17, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 17, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 17, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 17
+PASS: gsl_fft_real_float with signal_real_noise, n = 17, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 17, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 17, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 17, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 17
+PASS: gsl_fft_complex_forward with signal_noise, n = 17, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 17, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 17, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 17, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 17, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 17, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 17, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 17, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 17, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 17, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 17
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 17, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 17, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 17, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 17, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 17, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 17, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 17, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 17, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 17, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 17, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 17
+PASS: gsl_fft_real with signal_real_noise, n = 17, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 17, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 17, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 17, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 17
+PASS: gsl_fft_real_float with signal_real_noise, n = 17, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 17, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 17, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 18, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 18
+. 0 FE0EBBC 20
+. FC 1F F0 00 81 1E 0F E4 CB C8 00 00 FC 84 07 B2 40 81 02 B8
+
+. 0 FE0EE84 8
+. 81 3E 10 18 4B FF FD 4C
+
+. 0 FE0EBD4 20
+. C9 29 00 00 FC 1F 22 7A FD 81 00 2A FF 0C 08 00 41 9A 00 60
+
+. 0 FE0EC4C 4
+. 4B FF FA 28
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 18, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 18, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 18, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 18, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 18, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 18, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 18, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 18
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 18, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 18, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 18, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 18, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 18, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 18, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 18, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 18
+. 0 10011F44 296
+. 7D 26 1A 14 7C F7 2A 14 7C 09 1A 14 7D 7D 49 D6 54 0A 18 38 55 29 18 38 39 29 00 08 7C 1D 01 D6 39 4A 00 08 55 6B 18 38 7D 8B FC AE 54 CB 18 38 39 6B 00 08 7D 29 E9 D6 54 00 18 38 7D 7F 04 AE FD 04 03 32 54 E8 18 38 FC E2 02 F2 39 08 00 08 7D 4A E9 D6 7D A9 FC AE 54 A9 18 38 FD 44 03 72 39 29 00 08 7C 0A FC AE FD A5 43 7A 7D 6B E9 D6 FD 22 00 32 FC 03 38 3A 7C 1D 31 D6 7C EB FC AE FD 63 4A F8 54 8B 18 38 39 6B 00 08 FD 85 53 38 7C C6 DA 14 54 00 18 38 7D 58 21 D6 FC CD 00 2A 7C 84 8A 14 FD AD 00 28 FD 4C 58 28 FD 26 00 72 7C F8 39 D6 55 4A 18 38 FD 8C 58 2A 7D 7F 04 AE FD 4A 07 F2 7C 18 29 D6 54 E7 18 38 FC 0C 00 72 7C A5 8A 14 FD 27 48 28 FD AD 07 F2 7D 29 C1 D6 54 00 18 38 FC 0B 00 28 FD 09 50 28 7D 08 C1 D6 FD 6B 60 2A FC E7 30 2A FD 80 68 2A FD 00 40 50 7D 79 05 AE 7D 6B C1 D6 FC 00 68 28 FD 29 50 2A 7C E9 CD AE 7C 07 CD AE 7D 28 CD AE 7D 8A CD AE 7D 0B CD AE 42 00 FE DC
+
+PASS: gsl_fft_real with signal_real_noise, n = 18, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 18, stride = 1
+. 0 1000D3A8 24
+. 2F 94 00 00 C8 36 FF F0 CB F6 FF F8 C8 78 FF F0 C8 58 FF F8 41 9E 01 54
+
+. 0 1000D548 140
+. 1D 25 00 03 7D 47 FA 14 7D 0A FA 14 7D 57 51 D6 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 55 2B 18 38 7C 1C 01 D6 39 6B 00 08 55 4A 18 38 7C A5 DA 14 7D 3C 49 D6 54 00 18 38 7D 5D 04 AE 7D 6B E1 D6 55 29 18 38 7C 09 EC AE FD 80 50 28 7D AB EC AE FC 00 00 2A 7C 17 39 D6 7C E7 DA 14 FD A9 03 72 FD 60 60 50 7D 17 41 D6 FC 00 50 2A FD 8C 68 28 54 00 18 38 FD 6B 68 28 7C 1A 05 AE 55 08 18 38 7D 8A D5 AE 7D 68 D5 AE 42 00 FF 78
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 18, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 18, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 18
+. 0 10013F94 296
+. 7D 26 1A 14 54 88 10 3A 7C 09 1A 14 7D 7F 49 D6 54 0A 10 3A 55 29 10 3A 39 29 00 04 7C 1F 01 D6 39 4A 00 04 55 6B 10 3A 7D 4B EC 2E 54 CB 10 3A 39 6B 00 04 7D 29 F9 D6 54 00 10 3A 7D 7D 04 2E ED 84 02 B2 39 08 00 04 ED 22 02 F2 7D 4A F9 D6 7D A9 EC 2E 54 A9 10 3A ED 85 63 7A 39 29 00 04 ED A4 03 72 7C 0A EC 2E 7D 6B F9 D6 ED 23 48 3A EC 02 00 32 ED 45 6A B8 7C 1F 31 D6 EC CC 48 2A 7C EB EC 2E ED 63 02 F8 7D 77 2A 14 ED 8C 48 28 55 6A 10 3A 54 00 10 3A 7C F8 21 D6 ED 0A 58 28 7C 1D 04 2E ED 4A 58 2A 39 4A 00 04 ED 66 00 72 7C C6 DA 14 ED 08 07 F2 7C 18 29 D6 ED AA 00 72 54 E7 10 3A ED 67 58 28 7C A5 8A 14 ED 8C 07 F2 7C 84 8A 14 ED A0 68 28 7D 78 59 D6 ED 2B 40 28 54 00 10 3A EC 00 50 2A EC E7 30 2A 7D 29 C1 D6 ED 4D 60 2A FD 20 48 50 55 6B 10 3A ED AD 60 28 7C 19 05 2E ED 6B 40 2A 7D 4A C1 D6 7C E9 CD 2E 7D AB CD 2E 7D 08 C1 D6 7D 6A CD 2E 7D 47 CD 2E 7D 28 CD 2E 42 00 FE DC
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 18, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 18, stride = 1
+. 0 1000F574 24
+. 2F 93 00 00 C0 75 FF F8 C0 55 FF FC C0 36 FF F8 C3 F6 FF FC 41 9E 01 6C
+
+. 0 1000F72C 140
+. 1D 25 00 03 7D 47 CA 14 7D 0A CA 14 7D 57 51 D6 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 55 2B 10 3A 7C 1C 01 D6 39 6B 00 04 55 4A 10 3A 7C A5 DA 14 7D 3C 49 D6 54 00 10 3A 7D 5F 04 2E 55 29 10 3A 7D 6B E1 D6 7C 09 FC 2E ED 80 50 28 7D AB FC 2E EC 00 00 2A 7C 17 39 D6 7C E7 DA 14 ED A9 03 72 FD 60 60 50 EC 00 50 2A 7D 17 41 D6 ED 8C 68 28 ED 6B 68 28 54 00 10 3A 7C 1A 05 2E 7D 8A D5 2E 55 08 10 3A 7D 68 D5 2E 42 00 FF 78
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 18, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 18, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 18
+PASS: gsl_fft_complex_forward with signal_noise, n = 18, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 18, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 18, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 18, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 18, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 18, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 18, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 18, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 18, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 18, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 18
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 18, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 18, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 18, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 18, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 18, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 18, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 18, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 18, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 18, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 18, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 18
+PASS: gsl_fft_real with signal_real_noise, n = 18, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 18, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 18, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 18, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 18
+PASS: gsl_fft_real_float with signal_real_noise, n = 18, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 18, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 18, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 18, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 18
+PASS: gsl_fft_complex_forward with signal_noise, n = 18, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 18, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 18, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 18, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 18, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 18, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 18, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 18, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 18, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 18, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 18
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 18, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 18, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 18, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 18, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 18, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 18, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 18, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 18, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 18, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 18, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 18
+PASS: gsl_fft_real with signal_real_noise, n = 18, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 18, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 18, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 18, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 18
+PASS: gsl_fft_real_float with signal_real_noise, n = 18, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 18, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 18, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 19, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 19
+PASS: gsl_fft_complex_forward with signal_noise, n = 19, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 19, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 19, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 19, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 19, stride = 1
+. 0 FE0DBB8 24
+. 81 3E 0F 9C C8 A9 00 00 FC 1F 21 7A FC C1 00 2A FE 06 08 00 41 B2 F5 78
+
+PASS: gsl_fft_complex_forward with signal_exp, n = 19, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 19, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 19
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 19, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 19, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 19, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 19, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 19, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 19, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 19, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 19
+PASS: gsl_fft_real with signal_real_noise, n = 19, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 19, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 19, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 19, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 19
+PASS: gsl_fft_real_float with signal_real_noise, n = 19, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 19, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 19, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 19, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 19
+PASS: gsl_fft_complex_forward with signal_noise, n = 19, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 19, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 19, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 19, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 19, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 19, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 19, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 19, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 19, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 19, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 19
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 19, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 19, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 19, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 19, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 19, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 19, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 19, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 19, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 19, stride = 2
+. 0 FEEF554 12
+. 7F 80 F8 28 7F A0 F9 2D 40 A2 FF F8
+
+PASS: gsl_fft_real_wavetable_alloc, n = 19, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 19
+PASS: gsl_fft_real with signal_real_noise, n = 19, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 19, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 19, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 19, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 19
+PASS: gsl_fft_real_float with signal_real_noise, n = 19, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 19, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 19, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 19, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 19
+PASS: gsl_fft_complex_forward with signal_noise, n = 19, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 19, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 19, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 19, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 19, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 19, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 19, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 19, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 19, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 19, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 19
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 19, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 19, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 19, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 19, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 19, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 19, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 19, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 19, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 19, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 19, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 19
+PASS: gsl_fft_real with signal_real_noise, n = 19, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 19, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 19, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 19, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 19
+PASS: gsl_fft_real_float with signal_real_noise, n = 19, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 19, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 19, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 20, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 20
+PASS: gsl_fft_complex_forward with signal_noise, n = 20, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 20, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 20, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 20, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 20, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 20, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 20, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 20
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 20, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 20, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 20, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 20, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 20, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 20, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 20, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 20
+. 0 10012250 44
+. 2F 92 00 00 C8 14 FF F8 C9 B5 FF F8 C9 96 FF F8 FC 20 00 50 FF C0 68 50 C8 54 FF F0 FF 80 60 50 CB F5 FF F0 CB B6 FF F0 41 9E 01 A4
+
+PASS: gsl_fft_real with signal_real_noise, n = 20, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 20, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 20, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 20, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 20
+. 0 100142AC 44
+. 2F 92 00 00 C0 14 FF FC C1 B5 FF FC C1 96 FF FC FC 20 00 50 FF C0 68 50 C0 54 FF F8 FF 80 60 50 C3 F5 FF F8 C3 B6 FF F8 41 9E 01 A4
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 20, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 20, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 20, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 20, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 20
+PASS: gsl_fft_complex_forward with signal_noise, n = 20, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 20, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 20, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 20, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 20, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 20, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 20, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 20, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 20, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 20, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 20
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 20, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 20, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 20, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 20, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 20, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 20, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 20, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 20, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 20, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 20, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 20
+PASS: gsl_fft_real with signal_real_noise, n = 20, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 20, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 20, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 20, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 20
+PASS: gsl_fft_real_float with signal_real_noise, n = 20, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 20, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 20, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 20, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 20
+PASS: gsl_fft_complex_forward with signal_noise, n = 20, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 20, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 20, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 20, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 20, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 20, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 20, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 20, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 20, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 20, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 20
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 20, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 20, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 20, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 20, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 20, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 20, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 20, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 20, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 20, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 20, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 20
+PASS: gsl_fft_real with signal_real_noise, n = 20, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 20, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 20, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 20, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 20
+PASS: gsl_fft_real_float with signal_real_noise, n = 20, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 20, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 20, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 21, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 21
+PASS: gsl_fft_complex_forward with signal_noise, n = 21, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 21, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 21, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 21, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 21, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 21, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 21, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 21
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 21, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 21, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 21, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 21, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 21, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 21, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 21, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 21
+. 0 100110F8 20
+. 80 9E 82 74 80 7E 82 78 3A 40 00 00 7F 92 80 40 40 9C 0A 80
+
+. 0 1001110C 36
+. 56 6C 08 3C 3A A0 00 00 55 E5 F8 7E 3A C0 00 00 38 E0 00 00 C8 64 00 00 7F 87 D8 40 C8 83 00 00 40 9C 0A 48
+
+. 0 10011130 36
+. 7D 35 62 14 56 97 08 3C 38 C9 FF FF 2F 87 00 00 C8 A3 00 00 C8 E4 00 00 FC C0 28 90 FD 00 28 90 41 9E 00 14
+
+. 0 10011164 12
+. 39 00 00 00 7F 88 D8 40 40 9C 09 D0
+
+. 0 10011170 20
+. 7D 36 62 14 7F 69 03 A6 39 49 FF FF 7D 65 98 50 48 00 00 78
+
+. 0 100111F8 16
+. 2F 88 00 00 55 60 20 36 7D 20 E2 14 41 BE FF 80
+
+. 0 10011184 72
+. C9 24 00 00 C9 83 00 00 55 49 18 38 7C 1D 51 D6 39 29 00 08 7D 65 5A 14 39 08 00 01 7D 29 E9 D6 54 00 18 38 7D 7F 04 AE 7D 4A D2 14 39 6B FF FF FD AC 02 F2 7C 09 FC AE FD 8C 00 32 FD 49 68 3A FD 89 62 F8 41 9E 00 14
+
+. 0 100111DC 28
+. FC 08 03 32 FD A8 02 B2 FC 07 02 BA FD A7 6B 38 FC C6 00 2A FC A5 68 2A 42 40 09 48
+
+. 0 10011208 16
+. C8 09 00 08 7D 3C 04 AE FD 80 00 50 4B FF FF 78
+
+. 0 1001118C 64
+. 55 49 18 38 7C 1D 51 D6 39 29 00 08 7D 65 5A 14 39 08 00 01 7D 29 E9 D6 54 00 18 38 7D 7F 04 AE 7D 4A D2 14 39 6B FF FF FD AC 02 F2 7C 09 FC AE FD 8C 00 32 FD 49 68 3A FD 89 62 F8 41 9E 00 14
+
+. 0 100111CC 44
+. FC 04 02 32 FD A4 01 F2 FC E3 01 F8 FD 03 6A 3A FC 08 03 32 FD A8 02 B2 FC 07 02 BA FD A7 6B 38 FC C6 00 2A FC A5 68 2A 42 40 09 48
+
+. 0 10011B3C 12
+. 7D 27 D8 50 7F 89 38 40 40 9D 01 FC
+
+. 0 10011B48 44
+. 54 C9 18 38 7C 18 31 D6 39 29 00 08 7D 29 C1 D6 54 00 18 38 7C B9 05 AE 7C C9 CD AE 38 E7 00 01 7C C6 BA 14 7F 87 D8 40 41 9C F5 CC
+
+. 0 1001113C 24
+. 2F 87 00 00 C8 A3 00 00 C8 E4 00 00 FC C0 28 90 FD 00 28 90 41 9E 00 14
+
+. 0 10011154 28
+. FC 04 07 72 FD A3 07 72 FC 63 07 BA FC 84 6F B8 39 00 00 00 7F 88 D8 40 40 9C 09 D0
+
+. 0 10011D40 56
+. 7D 29 A1 D6 FC 00 30 50 55 29 08 3C 7D 35 4A 14 7D 2C 48 50 39 29 FF FF 55 2B 18 38 7D 38 49 D6 39 6B 00 08 7D 6B C1 D6 55 29 18 38 7C A9 CD AE 7C 0B CD AE 4B FF FD F0
+
+. 0 10011B64 16
+. 38 E7 00 01 7C C6 BA 14 7F 87 D8 40 41 9C F5 CC
+
+. 0 10011B74 20
+. 3A 52 00 01 7E D6 A2 14 7F 92 80 40 7E B5 8A 14 41 9C F5 98
+
+. 0 10011B88 16
+. 3A 73 00 01 55 E0 F8 7E 7F 80 98 40 41 9D F5 6C
+
+PASS: gsl_fft_real with signal_real_noise, n = 21, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 21, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 21, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 21, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 21
+. 0 100130E8 20
+. 80 9E 82 D0 80 7E 82 D4 3A 40 00 00 7F 92 80 40 40 9C 0A BC
+
+. 0 100130FC 36
+. 56 6C 08 3C 3A A0 00 00 55 E5 F8 7E 3A C0 00 00 38 E0 00 00 C0 64 00 00 7F 87 D8 40 C0 83 00 00 40 9C 0A 84
+
+. 0 10013120 36
+. 7D 35 62 14 56 97 08 3C 38 C9 FF FF 2F 87 00 00 C0 A3 00 00 C0 E4 00 00 FC C0 28 90 FD 00 28 90 41 9E 00 14
+
+. 0 10013154 12
+. 39 00 00 00 7F 88 D8 40 40 9C 0A 0C
+
+. 0 10013160 20
+. 7D 36 62 14 7F 69 03 A6 39 49 FF FF 7D 65 98 50 48 00 00 78
+
+. 0 100131E8 16
+. 2F 88 00 00 55 60 18 38 7D 20 E2 14 41 BE FF 80
+
+. 0 10013174 72
+. C1 24 00 00 C1 83 00 00 55 49 10 3A 7C 1F 51 D6 39 29 00 04 7D 65 5A 14 39 08 00 01 7D 29 F9 D6 54 00 10 3A 7D 7D 04 2E 7D 4A D2 14 39 6B FF FF ED AC 02 F2 7C 09 EC 2E ED 8C 00 32 ED 49 68 3A ED 89 62 F8 41 9E 00 14
+
+. 0 100131CC 28
+. EC 08 03 32 ED A8 02 B2 EC 07 02 BA ED A7 6B 38 EC C6 00 2A EC A5 68 2A 42 40 09 84
+
+. 0 100131F8 16
+. C0 09 00 04 7D 3C 04 2E FD 80 00 50 4B FF FF 78
+
+. 0 1001317C 64
+. 55 49 10 3A 7C 1F 51 D6 39 29 00 04 7D 65 5A 14 39 08 00 01 7D 29 F9 D6 54 00 10 3A 7D 7D 04 2E 7D 4A D2 14 39 6B FF FF ED AC 02 F2 7C 09 EC 2E ED 8C 00 32 ED 49 68 3A ED 89 62 F8 41 9E 00 14
+
+. 0 100131BC 44
+. EC 04 02 32 ED A4 01 F2 EC E3 01 F8 ED 03 6A 3A EC 08 03 32 ED A8 02 B2 EC 07 02 BA ED A7 6B 38 EC C6 00 2A EC A5 68 2A 42 40 09 84
+
+. 0 10013B68 12
+. 7D 27 D8 50 7F 89 38 40 40 9D 02 00
+
+. 0 10013B74 44
+. 54 C9 10 3A 7C 18 31 D6 39 29 00 04 7D 29 C1 D6 54 00 10 3A 7C B9 05 2E 7C C9 CD 2E 38 E7 00 01 7C C6 BA 14 7F 87 D8 40 41 9C F5 90
+
+. 0 1001312C 24
+. 2F 87 00 00 C0 A3 00 00 C0 E4 00 00 FC C0 28 90 FD 00 28 90 41 9E 00 14
+
+. 0 10013144 28
+. EC 04 07 72 ED A3 07 72 EC 63 07 BA EC 84 6F B8 39 00 00 00 7F 88 D8 40 40 9C 0A 0C
+
+. 0 10013D70 56
+. 7D 29 A1 D6 FC 00 30 50 55 29 08 3C 7D 35 4A 14 7D 2C 48 50 39 29 FF FF 55 2B 10 3A 7D 38 49 D6 39 6B 00 04 7D 6B C1 D6 55 29 10 3A 7C A9 CD 2E 7C 0B CD 2E 4B FF FD EC
+
+. 0 10013B90 16
+. 38 E7 00 01 7C C6 BA 14 7F 87 D8 40 41 9C F5 90
+
+. 0 10013BA0 20
+. 3A 52 00 01 7E D6 A2 14 7F 92 80 40 7E B5 8A 14 41 9C F5 5C
+
+. 0 10013BB4 16
+. 3A 73 00 01 55 E0 F8 7E 7F 80 98 40 41 9D F5 30
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 21, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 21, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 21, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 21, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 21
+PASS: gsl_fft_complex_forward with signal_noise, n = 21, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 21, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 21, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 21, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 21, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 21, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 21, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 21, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 21, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 21, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 21
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 21, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 21, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 21, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 21, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 21, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 21, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 21, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 21, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 21, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 21, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 21
+PASS: gsl_fft_real with signal_real_noise, n = 21, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 21, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 21, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 21, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 21
+PASS: gsl_fft_real_float with signal_real_noise, n = 21, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 21, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 21, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 21, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 21
+PASS: gsl_fft_complex_forward with signal_noise, n = 21, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 21, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 21, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 21, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 21, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 21, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 21, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 21, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 21, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 21, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 21
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 21, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 21, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 21, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 21, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 21, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 21, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 21, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 21, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 21, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 21, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 21
+PASS: gsl_fft_real with signal_real_noise, n = 21, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 21, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 21, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 21, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 21
+PASS: gsl_fft_real_float with signal_real_noise, n = 21, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 21, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 21, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 22, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 22
+. 0 10007770 8
+. 2F 9B 00 00 41 BE FF 3C
+
+. 0 10007778 4
+. 40 9A 00 10
+
+. 0 1000777C 12
+. C8 BC FF F0 C8 DC FF F8 4B FF FF 34
+
+. 0 100076B8 8
+. 2F 86 00 00 41 9E 00 A0
+
+. 0 10006FE0 36
+. 7C 0A FC AE 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
+
+. 0 10007038 128
+. 7D 25 32 14 7C 04 32 14 7D 59 49 D6 38 C6 00 01 7D 79 01 D6 55 4A 20 36 7D AA FC AE 7C EA FA 14 55 6B 20 36 7D 38 49 D6 7C 0B FC AE 7D 0B FA 14 FD AD 00 2A 55 29 20 36 7C 18 01 D6 7D A9 D5 AE 7D 29 D2 14 C9 A8 00 08 C8 07 00 08 54 00 20 36 FC 00 68 2A D8 09 00 08 7D 20 D2 14 7C 0B FC AE 7D AA FC AE FD AD 00 28 7D BA 05 AE C8 07 00 08 C9 A8 00 08 FC 00 68 28 D8 09 00 08 42 00 FF 84
+
+. 0 100070E4 36
+. 7C 0A D4 AE 7D 6A D2 14 7D 20 FA 14 7D 4A 42 14 7C 1F 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
+
+. 0 1000713C 64
+. 7D 2A 32 14 7C 1F 04 AE 7D 29 C1 D6 7D 60 FA 14 38 C6 00 01 55 29 20 36 7D A9 D4 AE 7D 29 D2 14 FC 00 68 2A 7C 1F 05 AE 7C 00 42 14 C9 A9 00 08 C8 0B 00 08 FC 00 68 2A D8 0B 00 08 42 00 FF C4
+
+. 0 100071EC 80
+. 7D 26 EA 14 7C 1A 04 AE 7D 29 C9 D6 7D 40 D2 14 7D 66 DA 14 38 C6 00 01 55 29 20 36 7D 6B C9 D6 7C 09 FD AE 7D 29 FA 14 C8 0A 00 08 D8 09 00 08 55 6B 20 36 7D BA 04 AE 7C 00 42 14 7D AB FD AE 7D 6B FA 14 C8 0A 00 08 D8 0B 00 08 42 00 FF B4
+
+. 0 10007278 168
+. 7D 44 32 14 7D 27 32 14 7D 4A C1 D6 7C 06 EA 14 7D 06 DA 14 38 C6 00 01 7D 29 C1 D6 55 4A 20 36 7D 6A D2 14 7D 8A D4 AE C8 0B 00 08 FD 88 03 32 55 29 20 36 7C 00 C9 D6 7D 49 D4 AE FC 08 00 32 7D 29 D2 14 FD 47 02 B2 C9 69 00 08 54 00 20 36 7D 08 C9 D6 7D BF 04 AE FD 67 02 F2 7D 60 FA 14 FD 2A 00 28 FD 4A 00 2A 55 08 20 36 7D 28 FA 14 FD AD 48 2A FD 2B 60 2A FD 6B 60 28 7D BF 05 AE C8 0B 00 08 FC 00 48 2A D8 0B 00 08 7D A8 FC AE FD AD 50 2A 7D A8 FD AE C8 09 00 08 FC 00 58 2A D8 09 00 08 42 00 FF 5C
+
+. 0 1000736C 36
+. 7C 0A FC AE 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
+
+. 0 100073B4 56
+. 7D 20 22 14 7D 6A 22 14 7D 29 C9 D6 38 84 00 01 7D 6B C1 D6 55 29 20 36 7D A9 FC AE 7D 29 FA 14 55 6B 20 36 7D AB D5 AE 7D 6B D2 14 C8 09 00 08 D8 0B 00 08 42 00 FF CC
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 22, stride = 1
+. 0 10007788 16
+. C8 1C FF F8 C8 BC FF F0 FC C0 00 50 4B FF FF 24
+
+PASS: gsl_fft_complex_inverse with signal_noise, n = 22, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 22, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 22, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 22, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 22, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 22, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 22
+. 0 1000A590 8
+. 2F 9B 00 00 41 BE FF 3C
+
+. 0 1000A598 4
+. 40 9A 00 10
+
+. 0 1000A59C 12
+. C0 BC FF F8 C0 DC FF FC 4B FF FF 34
+
+. 0 1000A4D8 8
+. 2F 86 00 00 41 9E 00 A0
+
+. 0 10009E08 36
+. 7C 0A FC 2E 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
+
+. 0 10009E60 128
+. 7D 25 32 14 7C 04 32 14 7D 59 49 D6 38 C6 00 01 7D 79 01 D6 55 4A 18 38 7D AA FC 2E 7C EA FA 14 55 6B 18 38 7D 38 49 D6 7C 0B FC 2E 7D 0B FA 14 ED AD 00 2A 55 29 18 38 7C 18 01 D6 7D A9 D5 2E 7D 29 D2 14 C1 A8 00 04 C0 07 00 04 54 00 18 38 EC 00 68 2A D0 09 00 04 7D 20 D2 14 7C 0B FC 2E 7D AA FC 2E ED AD 00 28 7D BA 05 2E C0 07 00 04 C1 A8 00 04 EC 00 68 28 D0 09 00 04 42 00 FF 84
+
+. 0 10009F0C 36
+. 7C 0A D4 2E 7D 6A D2 14 7D 20 FA 14 7D 4A 42 14 7C 1F 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
+
+. 0 10009F64 64
+. 7D 2A 32 14 7C 1F 04 2E 7D 29 C1 D6 7D 60 FA 14 38 C6 00 01 55 29 18 38 7D A9 D4 2E 7D 29 D2 14 EC 00 68 2A 7C 1F 05 2E 7C 00 42 14 C1 A9 00 04 C0 0B 00 04 EC 00 68 2A D0 0B 00 04 42 00 FF C4
+
+. 0 1000A00C 80
+. 7D 26 EA 14 7C 1A 04 2E 7D 29 C9 D6 7D 40 D2 14 7D 66 DA 14 38 C6 00 01 55 29 18 38 7D 6B C9 D6 7C 09 FD 2E 7D 29 FA 14 C0 0A 00 04 D0 09 00 04 55 6B 18 38 7D BA 04 2E 7C 00 42 14 7D AB FD 2E 7D 6B FA 14 C0 0A 00 04 D0 0B 00 04 42 00 FF B4
+
+. 0 1000A098 168
+. 7D 44 32 14 7D 67 32 14 7D 4A C1 D6 7C 06 EA 14 7D 06 DA 14 38 C6 00 01 7D 6B C1 D6 55 4A 18 38 7D 2A D2 14 7D AA D4 2E C1 29 00 04 ED A8 03 72 55 6B 18 38 7C 00 C9 D6 7D 4B D4 2E ED 28 02 72 7D 6B D2 14 ED 47 02 B2 C1 6B 00 04 54 00 18 38 7D 08 C9 D6 7C 1F 04 2E ED 67 02 F2 ED 8A 48 28 7D 20 FA 14 ED 4A 48 2A 55 08 18 38 EC 00 60 2A ED 8B 68 2A ED 6B 68 28 7C 1F 05 2E C0 09 00 04 EC 00 60 2A D0 09 00 04 7D 28 FA 14 7D A8 FC 2E ED AD 50 2A 7D A8 FD 2E C0 09 00 04 EC 00 58 2A D0 09 00 04 42 00 FF 5C
+
+. 0 1000A18C 36
+. 7C 0A FC 2E 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
+
+. 0 1000A1D4 56
+. 7D 20 22 14 7D 6A 22 14 7D 29 C9 D6 38 84 00 01 7D 6B C1 D6 55 29 18 38 7D A9 FC 2E 7D 29 FA 14 55 6B 18 38 7D AB D5 2E 7D 6B D2 14 C0 09 00 04 D0 0B 00 04 42 00 FF CC
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 22, stride = 1
+. 0 1000A5A8 16
+. C0 1C FF FC C0 BC FF F8 FC C0 00 50 4B FF FF 24
+
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 22, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 22, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 22, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 22, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 22, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 22, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 22
+PASS: gsl_fft_real with signal_real_noise, n = 22, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 22, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 22, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 22, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 22
+PASS: gsl_fft_real_float with signal_real_noise, n = 22, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 22, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 22, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 22, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 22
+PASS: gsl_fft_complex_forward with signal_noise, n = 22, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 22, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 22, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 22, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 22, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 22, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 22, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 22, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 22, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 22, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 22
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 22, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 22, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 22, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 22, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 22, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 22, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 22, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 22, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 22, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 22, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 22
+PASS: gsl_fft_real with signal_real_noise, n = 22, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 22, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 22, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 22, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 22
+PASS: gsl_fft_real_float with signal_real_noise, n = 22, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 22, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 22, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 22, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 22
+PASS: gsl_fft_complex_forward with signal_noise, n = 22, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 22, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 22, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 22, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 22, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 22, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 22, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 22, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 22, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 22, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 22
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 22, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 22, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 22, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 22, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 22, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 22, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 22, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 22, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 22, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 22, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 22
+PASS: gsl_fft_real with signal_real_noise, n = 22, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 22, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 22, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 22, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 22
+PASS: gsl_fft_real_float with signal_real_noise, n = 22, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 22, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 22, stride = 3
+. 0 FE0E084 8
+. FC 00 F8 90 40 99 02 D8
+
+. 0 FE0E360 8
+. FC 00 F8 50 4B FF FD 28
+
+. 0 FE0E08C 200
+. FD 46 00 2A 81 1E 0F E0 80 BE 0F E4 FD 0A 30 28 D9 41 00 30 81 21 00 30 81 41 00 34 FD 40 40 28 55 40 28 34 C8 08 00 00 7C E0 32 14 7C C6 04 AE FC 2A 02 B2 C9 07 00 10 FD 2A 00 2A FD 86 00 2A FC E1 20 FA C8 67 00 08 FD 8C 00 28 FD 29 00 28 C8 07 00 18 FD A7 28 7A FC 8A 48 28 FC E6 60 28 FD 6D 00 72 FC A1 17 BA FD A8 02 F2 FD 6A 00 72 FC 47 18 2A FC 2C 02 72 FD 8C 01 32 FF C0 68 28 FC 8B 01 72 FC E2 02 B2 FD A8 08 28 FC 7E 60 28 CB C5 00 00 FC 46 01 32 FD 83 38 28 FD 08 68 28 FC 0C 10 28 FD 48 08 28 FD 20 50 2A FC CD 48 2A FD 6D 30 28 FC 20 30 90 FC A9 58 2A FC 85 37 BA FF 84 30 00 41 9E 00 3C
+
+PASS: gsl_fft_complex_wavetable_alloc, n = 23, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 23
+PASS: gsl_fft_complex_forward with signal_noise, n = 23, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 23, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 23, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 23, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 23, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 23, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 23, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 23
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 23, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 23, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 23, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 23, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 23, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 23, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 23, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 23
+PASS: gsl_fft_real with signal_real_noise, n = 23, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 23, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 23, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 23, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 23
+PASS: gsl_fft_real_float with signal_real_noise, n = 23, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 23, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 23, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 23, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 23
+PASS: gsl_fft_complex_forward with signal_noise, n = 23, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 23, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 23, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 23, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 23, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 23, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 23, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 23, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 23, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 23, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 23
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 23, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 23, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 23, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 23, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 23, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 23, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 23, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 23, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 23, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 23, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 23
+PASS: gsl_fft_real with signal_real_noise, n = 23, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 23, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 23, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 23, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 23
+PASS: gsl_fft_real_float with signal_real_noise, n = 23, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 23, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 23, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 23, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 23
+PASS: gsl_fft_complex_forward with signal_noise, n = 23, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 23, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 23, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 23, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 23, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 23, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 23, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 23, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 23, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 23, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 23
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 23, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 23, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 23, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 23, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 23, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 23, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 23, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 23, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 23, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 23, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 23
+PASS: gsl_fft_real with signal_real_noise, n = 23, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 23, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 23, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 23, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 23
+PASS: gsl_fft_real_float with signal_real_noise, n = 23, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 23, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 23, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 24, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 24
+PASS: gsl_fft_complex_forward with signal_noise, n = 24, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 24, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 24, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 24, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 24, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 24, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 24, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 24
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 24, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 24, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 24, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 24, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 24, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 24, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 24, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 24
+. 0 100120B0 120
+. 7C 07 1A 14 7D 66 42 14 7D 20 1A 14 7C 1D 01 D6 55 0A 18 38 39 4A 00 08 7D 3D 49 D6 54 00 18 38 7C 1F 04 AE 7C 1D 39 D6 55 29 18 38 7D 89 FC AE 7C E7 DA 14 FD 60 60 2A 54 00 18 38 FC 00 60 28 7D BF 04 AE 7D 78 59 D6 FD 6B 02 72 FD 80 6A BA 7C 18 41 D6 55 6B 18 38 FD AD 00 28 7D 08 8A 14 7D 4A C1 D6 54 00 18 38 7D 99 05 AE 7D 6A CD AE 7D AB CD AE 42 00 FF 8C
+
+PASS: gsl_fft_real with signal_real_noise, n = 24, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 24, stride = 1
+. 0 1000D6FC 32
+. 2F 91 00 00 CB D3 FF F0 CB B3 FF F8 CB 94 FF F0 CB 74 FF F8 CB 55 FF F0 CB 35 FF F8 41 9E 01 9C
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 24, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 24, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 24
+. 0 10014100 132
+. 7C 07 1A 14 7D 66 42 14 7D 20 1A 14 7C 1F 01 D6 55 0A 10 3A 39 4A 00 04 7D 3F 49 D6 54 00 10 3A 7D 7D 04 2E 7C 1F 39 D6 55 29 10 3A 7C 09 EC 2E 7C E7 DA 14 ED 4B 00 28 54 00 10 3A ED 6B 00 2A 7D 9D 04 2E 7D 78 59 D6 FC 00 50 90 FD A0 60 90 ED 6B 02 32 7C 18 41 D6 ED 8C 50 28 FC 00 6A 7A 55 6B 10 3A 7D 08 8A 14 7D 4A C1 D6 54 00 10 3A FC 00 00 18 7C 19 05 2E 7D 6A CD 2E 7D 8B CD 2E 42 00 FF 80
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 24, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 24, stride = 1
+. 0 1000F8E0 32
+. 2F 91 00 00 C3 F3 FF F8 C3 D3 FF FC C3 B4 FF F8 C3 94 FF FC C3 75 FF F8 C3 55 FF FC 41 9E 01 9C
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 24, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 24, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 24
+PASS: gsl_fft_complex_forward with signal_noise, n = 24, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 24, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 24, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 24, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 24, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 24, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 24, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 24, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 24, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 24, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 24
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 24, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 24, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 24, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 24, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 24, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 24, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 24, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 24, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 24, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 24, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 24
+PASS: gsl_fft_real with signal_real_noise, n = 24, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 24, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 24, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 24, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 24
+PASS: gsl_fft_real_float with signal_real_noise, n = 24, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 24, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 24, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 24, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 24
+PASS: gsl_fft_complex_forward with signal_noise, n = 24, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 24, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 24, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 24, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 24, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 24, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 24, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 24, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 24, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 24, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 24
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 24, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 24, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 24, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 24, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 24, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 24, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 24, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 24, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 24, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 24, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 24
+PASS: gsl_fft_real with signal_real_noise, n = 24, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 24, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 24, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 24, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 24
+PASS: gsl_fft_real_float with signal_real_noise, n = 24, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 24, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 24, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 25, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 25
+. 0 10007D6C 400
+. 7C 1B AA 14 7D 72 DA 14 7D 4E DA 14 7D 11 DA 14 7C 00 C9 D6 7D 3D FA 14 CB 89 00 08 7C 83 D2 14 7F BD FC AE 3B 7B 00 01 7E D6 CA 14 7D 6B C9 D6 54 00 20 36 7D 20 FA 14 7C FF 04 AE C9 49 00 08 7C 1C BA 14 7F BD 9A 14 7D 4A C9 D6 55 6B 20 36 7C CB FA 14 7D AB FC AE C8 06 00 08 7D 08 C9 D6 55 4A 20 36 7C EA FA 14 7D 8A FC AE C9 67 00 08 7C E8 02 A6 FC 8D 60 2A 7D 50 E2 14 55 08 20 36 FC 60 58 2A 7D 28 FA 14 7C 48 FC AE C8 29 00 08 FD AD 60 28 FD 27 10 2A 81 1E 80 60 FD 0A 08 2A 7D 67 E2 14 FC 00 58 28 7D 2C E2 14 FF 69 20 2A 7C 00 C1 D6 FF 48 18 2A 3B 9C 00 01 FC E7 10 28 C8 48 00 00 FC B7 03 72 7D 29 C1 D6 54 00 20 36 FC D7 00 32 7C E0 D2 14 FD B8 03 72 7D 6B C1 D6 55 29 20 36 FC 18 00 32 7C C9 D2 14 FD 4A 08 28 FD 29 20 28 7D 4A C1 D6 FD 08 18 28 55 6B 20 36 FD 7B 00 B2 7C AB D2 14 FD 9A 00 B2 55 4A 20 36 7D 0A D2 14 FC B8 29 F8 FC D8 32 B8 FC F7 69 FA FD 57 02 BA FD 29 03 B2 FD 08 03 B2 FD 7D 58 28 FD 9C 60 28 FC F9 01 F2 FD 59 02 B2 FC B9 01 72 FC D9 01 B2 FC 0B 48 28 FD AC 40 28 FD 6B 48 2A FD 8C 40 2A FC 80 30 2A FC 6D 28 28 FC 4B 50 2A FC 2C 38 28 FD 6B 50 28 FC 00 30 28 FD AD 28 2A FD 8C 38 2A FF CF 02 F2 FF F1 00 32 FC B5 01 32 FC D3 00 B2 FC EF 03 32 FD 51 03 72 FD 35 00 F2
+
+. 0 10007EFC 92
+. FD 13 00 72 FD 90 F3 3A FD B2 FB 7A FC 76 28 FA FC 34 30 7A FD 70 3A F8 FC 12 50 38 FC 96 49 38 FC 54 40 B8 FF BD D8 2A FF 9C D0 2A 7F A3 D5 AE 7C 63 A2 14 DB 84 00 08 7D 7A 05 AE D9 87 00 08 7C 09 D5 AE D9 A6 00 08 7C 8B D5 AE D8 65 00 08 7C 4A D5 AE D8 28 00 08 42 00 FE 18
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 25, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 25, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 25, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 25, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 25, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 25, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 25, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 25
+. 0 1000ABD0 400
+. 7C 1B AA 14 7D 72 DA 14 7D 4E DA 14 7D 11 DA 14 7C 00 C9 D6 7D 23 FA 14 C3 89 00 04 7C BC BA 14 7F A3 FC 2E 7C 8C E2 14 3B 7B 00 01 7D 6B C9 D6 54 00 18 38 7D 20 FA 14 7C 9F 04 2E C0 A9 00 04 7E D6 CA 14 7C 63 9A 14 7D 4A C9 D6 55 6B 18 38 7C CB FA 14 7C EB FC 2E C1 06 00 04 7C D0 E2 14 7D 08 C9 D6 55 4A 18 38 7C EA FA 14 7D 4A FC 2E C0 C7 00 04 ED 87 50 2A 55 08 18 38 ED 68 30 2A 7D 28 FA 14 7C 68 FC 2E C0 49 00 04 EC E7 50 28 EC 04 18 2A 7D 28 02 A6 ED A5 10 2A 7C A5 C1 D6 ED 08 30 28 EF 60 60 2A 7C 09 E2 14 EF 4D 58 2A 7D 3D D2 14 EC 00 60 28 7C 84 C1 D6 ED AD 58 28 54 A5 18 38 FD 40 D8 90 7D 65 D2 14 FD 20 D0 90 3B 9C 00 01 7C 00 C1 D6 FD 4A 05 72 54 84 18 38 7D 44 D2 14 FD 29 05 72 7C C6 C1 D6 54 00 18 38 7D 00 D2 14 FD 80 E8 90 FD 60 E0 90 FC 00 05 B2 54 C6 18 38 7C E6 D2 14 FD AD 05 B2 EC 84 18 28 EC A5 10 28 C0 41 00 34 FD 8C 50 28 FD 6B 48 28 EC D7 01 F2 ED 57 02 32 EC F8 01 F2 ED 18 02 32 FC 00 00 18 FD A0 68 18 EC D8 31 38 ED 58 51 78 FD 80 60 18 FD 60 58 18 EC 97 39 3A EC B7 41 7A ED 2C 00 28 ED 0B 68 28 EC 99 01 32 EC B9 01 72 EC D9 01 B2 ED 59 02 B2 ED 8C 00 2A ED 6B 68 2A EC 09 50 2A ED A8 30 28 EC 6B 20 28 EC EC 28 2A ED 29 50 28 ED 8C 28 28 ED 08 30 2A ED 6B 20 2A
+
+. 0 1000AD60 120
+. EC 22 03 32 EF F3 02 72 EC 82 02 F2 EF D1 00 32 EC AF 01 F2 EC 53 02 32 ED 51 03 72 EC CF 00 F2 EF BD D8 2A EF 9C D0 2A ED 6E 0A FA ED 14 FA 3A 7F BD D5 2E ED B2 F3 7A D3 89 00 04 EC 70 28 FA 7F BD A2 14 ED 8E 23 38 ED 34 12 78 EC 12 50 38 EC F0 31 F8 7D 85 D5 2E D1 6B 00 04 7D 24 D5 2E D1 0A 00 04 7C 1A 05 2E D1 A8 00 04 7C E6 D5 2E D0 67 00 04 42 00 FD FC
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 25, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 25, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 25, stride = 1
+. 0 FEC3310 12
+. 7D 40 18 28 7D 20 19 2D 40 A2 FF F8
+
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 25, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 25, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 25, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 25, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 25
+. 0 10011390 20
+. 3A 16 00 01 3A 60 00 01 56 00 F8 7E 2B 80 00 01 40 9D 02 FC
+
+. 0 100113A4 108
+. 81 3E 82 64 3A F7 00 10 3B 9C 00 10 7E E8 03 A6 FE 40 E0 50 39 F4 00 10 FE 20 D8 50 39 95 00 10 93 81 00 28 56 D7 08 3C C9 C9 00 00 7D 68 02 A6 81 41 00 28 2F 92 00 00 C9 8C FF F8 C8 0A FF F8 C9 AB FF F8 FE A0 60 50 C9 6F FF F8 FF 20 00 50 FE E0 68 50 CB 4A FF F0 FE 60 58 50 CB 0B FF F0 CA CC FF F0 CA 8F FF F0 41 9E 02 60
+
+. 0 10011410 400
+. 56 69 08 3C 80 FE 82 68 3B 69 FF FF 7E 93 B0 50 FE 00 70 90 C9 E7 00 00 3A A0 00 00 7F 7C DB 78 7E 49 03 A6 7D 7C D2 14 7C 0B D2 14 7D 1D 59 D6 7D 20 D2 14 7D 49 D2 14 54 07 18 38 55 26 18 38 55 45 18 38 7C 1D 01 D6 55 6B 18 38 39 6B 00 08 38 E7 00 08 38 C6 00 08 7D 3D 49 D6 38 A5 00 08 55 08 18 38 54 00 18 38 7C E8 FC AE 7D 5F 04 AE 7D 5D 51 D6 55 29 18 38 7D 29 FC AE FC 39 01 F2 57 89 18 38 FC 17 02 B2 39 29 00 08 7D 6B E9 D6 55 4A 18 38 7C AA FC AE FD B5 02 72 57 6A 18 38 FD 93 01 72 39 4A 00 08 7C E7 E9 D6 7D 0B FC AE 56 8B 08 3C FC 79 02 32 7D 6B AA 14 39 6B FF FF 7C C6 E9 D6 7D 67 FC AE FD 1A 0A 3A 7C F7 5A 14 55 64 18 38 FC 57 02 F2 54 E3 18 38 7C A5 E9 D6 7C C6 FC AE FD 78 02 FA 38 84 00 08 38 63 00 08 FF F5 01 B2 7E B5 8A 14 7C 85 FC AE 7D 29 E9 D6 FC D6 69 BA FF D3 01 32 7C 1D E1 D6 7F A9 FC AE FC 94 61 3A 7D 37 DA 14 7D 17 4A 14 FD 36 FA 78 55 26 18 38 54 00 18 38 55 05 18 38 FC B4 F1 78 7C 3F 04 AE 38 C6 00 08 7C 18 D9 D6 FC FA 19 F8 38 A5 00 08 7F 9C B2 14 FD 58 12 B8 7F 7B 8A 14 7D 38 49 D6 54 00 18 38 FD AB 30 2A FC 08 20 2A FD 87 28 2A FC 6A 48 2A 7D 18 41 D6 FF C0 68 2A 55 29 18 38 FD 4A 48 28 FF EC 18 2A FC 00 68 28 7D 78 59 D6 FD 3E 03 F2 55 08 18 38 FD 6B 30 28
+
+. 0 10011410 204
+. FC 5C 02 B2 7C F8 39 D6 55 6B 18 38 FD 5B 02 B2 FC E7 28 28 7D 4A C1 D6 FC 00 04 32 54 E7 18 38 FD 8C 18 28 FD BF 03 F2 7C C6 C1 D6 FD 3D 48 28 FC DC 02 F2 7C A5 C1 D6 FD 7B 02 F2 FD 08 20 28 FC 51 11 FA 7C 84 C1 D6 FD 8C 04 32 FC F2 51 F8 7C 63 C1 D6 FD 49 00 28 FD A1 68 28 FD 29 00 2A FC D1 32 3A FD 12 5A 38 FC 0D 60 28 FC AA 10 28 FD 69 38 28 FD AD 60 2A FC 80 30 2A FC 21 F8 2A FD 8D 40 2A FF BD F0 2A FD 60 58 50 7C 39 05 AE FC A0 28 50 FD AD 40 28 7F AA CD AE FD 29 38 2A FC 00 30 28 FD 4A 10 2A 7D A9 CD AE 7D 26 CD AE 7C 08 CD AE 7D 45 CD AE 7D 8B CD AE 7D 64 CD AE 7C 87 CD AE 7C A3 CD AE 42 00 FD CC
+
+. 0 1001166C 48
+. 3A 73 00 01 56 00 F8 7E 7D 28 02 A6 7F 80 98 40 81 01 00 28 39 8C 00 10 39 EF 00 10 39 08 00 10 39 29 00 10 91 01 00 28 7D 28 03 A6 41 9D FD 38
+
+. 0 100113D0 64
+. 7D 68 02 A6 81 41 00 28 2F 92 00 00 C9 8C FF F8 C8 0A FF F8 C9 AB FF F8 FE A0 60 50 C9 6F FF F8 FF 20 00 50 FE E0 68 50 CB 4A FF F0 FE 60 58 50 CB 0B FF F0 CA CC FF F0 CA 8F FF F0 41 9E 02 60
+
+. 0 1001169C 8
+. 72 CA 00 01 40 82 01 14
+
+PASS: gsl_fft_real with signal_real_noise, n = 25, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 25, stride = 1
+. 0 1000DB80 40
+. 2F 93 00 00 CA F0 FF F0 CA D0 FF F8 CA AE FF F0 CA 8E FF F8 CA 6F FF F0 CA 4F FF F8 CA 31 FF F0 CA 11 FF F8 41 9E 02 64
+
+. 0 1000DA5C 244
+. 1D 05 00 05 7C E5 CA 14 7D 26 42 14 7D 1C 41 D6 39 29 FF FF 7C 06 4A 14 54 0A 18 38 7D 7C 49 D6 39 4A 00 08 55 29 18 38 39 29 00 08 55 08 18 38 7C 1C 01 D6 55 6B 18 38 7D 8B EC AE 7D 67 CA 14 7D 08 EC AE 54 00 18 38 7D 4A E1 D6 7C 1D 04 AE FD 2C 00 2A 7D 6A EC AE 7D 29 E1 D6 FD 8C 00 28 7D 4B CA 14 FD 29 48 2A FD B9 02 F2 7C 09 EC AE 7D 2A CA 14 FD 78 02 F2 7C 17 29 D6 7C A5 DA 14 FD 49 01 B2 FD 8C 01 F2 7C F7 39 D6 54 00 18 38 FD B8 68 38 FC 19 58 3A 7D 77 59 D6 54 E7 18 38 FD 48 50 28 FD AD 68 2A FC 00 00 2A 7D 57 51 D6 FD 6A 60 28 55 6B 18 38 FD 8C 50 2A FD 08 48 2A 7D 37 49 D6 FD 4B 68 2A FD 2C 00 2A 55 4A 18 38 FD 8C 00 28 7D 1A 05 AE FD 6B 68 28 55 29 18 38 7D 87 D5 AE 7D 6B D5 AE 7D 4A D5 AE 7D 29 D5 AE 42 00 FF 10
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 25, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 25, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 25
+. 0 10013390 20
+. 3A 55 00 01 3A 80 00 01 56 40 F8 7E 2B 80 00 01 40 9D 03 18
+
+. 0 100133A4 100
+. 3A F7 00 08 3B 9C 00 08 7E E8 03 A6 FD E0 D8 50 FD C0 D0 50 39 F6 00 08 39 9B 00 08 93 81 00 28 56 B7 08 3C 7D 48 02 A6 81 21 00 28 2F 93 00 00 C1 8C FF FC C0 09 FF FC C1 AA FF FC FE 80 60 50 C1 6F FF FC FF 00 00 50 FE C0 68 50 C3 29 FF F8 FE 40 58 50 C2 EA FF F8 C2 AC FF F8 C2 6F FF F8 41 9E 02 84
+
+. 0 10013408 400
+. 56 89 08 3C 81 7E 82 C0 80 FE 82 C4 3B 89 FF FF 7E 14 A8 50 CA 2B 00 00 CA 07 00 00 3A C0 00 00 7F 9B E3 78 7E 69 03 A6 7D 7B D2 14 7C 0B D2 14 7D 1F 59 D6 7D 20 D2 14 7D 49 D2 14 54 07 10 3A 55 26 10 3A 55 45 10 3A 7C 1F 01 D6 55 6B 10 3A 39 6B 00 04 38 E7 00 04 38 C6 00 04 7D 3F 49 D6 38 A5 00 04 55 08 10 3A 54 00 10 3A 7C C8 EC 2E 7D 1D 04 2E 7D 5F 51 D6 55 29 10 3A 7C 89 EC 2E EC B8 01 B2 EC F6 02 32 57 69 10 3A EC 54 01 32 39 29 00 04 7D 6B F9 D6 55 4A 10 3A 7C 6A EC 2E 57 8A 10 3A 39 4A 00 04 EC 32 00 F2 7C E7 F9 D6 7D 6B EC 2E EC B9 2A FA ED 78 02 F2 7C C6 F9 D6 7C 07 EC 2E EC F7 38 3A EC 16 00 32 7C A5 F9 D6 7D 86 EC 2E EC D9 59 B8 EC 55 13 3A ED 94 03 32 7D A5 EC 2E ED 17 02 38 7D 29 F9 D6 EC 33 0B 7A ED B2 03 72 EC 95 61 38 EC 05 08 2A 7C 1F D9 D6 ED 87 10 2A 7F C9 EC 2E EC 73 68 F8 56 09 08 3C ED 68 20 2A 7D 29 B2 14 EF 80 60 2A 54 00 10 3A ED A6 18 2A 7F FD 04 2E EC 00 60 28 7C 17 E2 14 FD 40 E0 90 39 29 FF FF EF AD 58 2A 7D 17 02 14 ED AD 58 28 7C 97 4A 14 FD 4A 04 32 54 07 10 3A 55 06 10 3A 55 25 10 3A 54 83 10 3A FD 80 E8 90 7D 78 E1 D6 FD 20 F0 90 38 E7 00 04 38 C6 00 04 FD 8C 04 32 38 A5 00 04 38 63 00 04 7C 18 01 D6 FC 00 04 72 55 6B 10 3A 7F 7B AA 14 ED 08 20 28
+
+. 0 10013598 240
+. 7E D6 8A 14 FD 29 50 28 7D 18 41 D6 FD 60 F8 90 54 00 10 3A FD AD 04 72 7F 9C 8A 14 EC C6 18 28 7D 38 49 D6 FC 00 00 18 55 08 10 3A EC E7 10 28 FD 6B 60 28 FD 20 48 18 7C 98 21 D6 ED 5B 02 32 55 29 10 3A ED 1A 02 32 EC 89 00 28 ED 4E 51 BA 7D 4A C1 D6 FD A0 68 18 54 84 10 3A ED 29 00 2A EC A5 08 28 FD 60 58 18 7C E7 C1 D6 EC CF 41 B8 ED 9B 01 F2 EC FA 01 F2 EC 0B 68 28 7C C6 C1 D6 ED 8E 61 7A ED 6B 68 2A EC 64 50 28 ED 09 30 28 7C A5 C1 D6 EC AF 39 78 ED A0 60 2A EF FF E8 2A 7C 63 C1 D6 EC EB 28 2A EF DE E0 2A FD 00 40 50 7F EB CD 2E FC 60 18 50 ED 6B 28 28 7F CA CD 2E ED 29 30 2A EC 00 60 28 EC 84 50 2A 7D 79 05 2E 7D 27 CD 2E 7C 08 CD 2E 7C 86 CD 2E 7C E9 CD 2E 7D 05 CD 2E 7D A4 CD 2E 7C 63 CD 2E 42 00 FD AC
+
+. 0 10013688 48
+. 3A 94 00 01 56 40 F8 7E 7D 28 02 A6 7F 80 A0 40 81 01 00 28 39 8C 00 08 39 EF 00 08 39 08 00 08 39 29 00 08 91 01 00 28 7D 28 03 A6 41 9D FD 14
+
+. 0 100133C8 64
+. 7D 48 02 A6 81 21 00 28 2F 93 00 00 C1 8C FF FC C0 09 FF FC C1 AA FF FC FE 80 60 50 C1 6F FF FC FF 00 00 50 FE C0 68 50 C3 29 FF F8 FE 40 58 50 C2 EA FF F8 C2 AC FF F8 C2 6F FF F8 41 9E 02 84
+
+. 0 100136B8 8
+. 72 AA 00 01 40 82 01 24
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 25, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 25, stride = 1
+. 0 1000FD7C 40
+. 2F 92 00 00 C2 F0 FF F8 C2 D0 FF FC C2 AC FF F8 C2 8C FF FC C2 6E FF F8 C2 4E FF FC C2 2F FF F8 C2 0F FF FC 41 9E 02 84
+
+. 0 1000FC48 260
+. 1D 44 00 05 7C C4 C2 14 7C E6 C2 14 7C D7 31 D6 7D 65 52 14 39 6B FF FF 7C 05 5A 14 7D 3C 59 D6 54 08 10 3A 39 08 00 04 55 6B 10 3A 39 6B 00 04 7C 1C 01 D6 55 29 10 3A 7C 09 FC 2E 7D 27 C2 14 54 C6 10 3A 54 00 10 3A 7D 5C 51 D6 7D BF 04 2E ED 00 68 2A EC 00 68 28 55 4A 10 3A 7D 08 E1 D6 7C EA FC 2E ED 08 40 2A FD A0 38 90 FD 80 40 90 7D 6B E1 D6 7D 28 FC 2E FC 00 01 B2 FD 8C 01 72 7D 6B FC 2E 7D 69 C2 14 ED 59 02 72 7C 17 21 D6 ED 38 02 72 7C 84 DA 14 FD AD 60 28 FC 00 00 18 ED 58 52 F8 7C F7 39 D6 FD A0 68 18 54 00 10 3A ED 79 4A FA ED 4A 50 2A ED 8D 00 28 7D 37 49 D6 EC 00 68 2A 54 E7 10 3A ED 6B 58 2A ED AC 50 2A 7D 77 59 D6 EC E7 40 2A ED 20 58 2A 55 29 10 3A EC 00 58 28 ED 8C 50 28 7C FA 05 2E 55 6B 10 3A 7C 06 D5 2E 7D 87 D5 2E 7D A9 D5 2E 7D 2B D5 2E 42 00 FF 00
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 25, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 25, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 25
+PASS: gsl_fft_complex_forward with signal_noise, n = 25, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 25, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 25, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 25, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 25, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 25, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 25, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 25, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 25, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 25, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 25
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 25, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 25, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 25, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 25, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 25, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 25, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 25, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 25, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 25, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 25, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 25
+PASS: gsl_fft_real with signal_real_noise, n = 25, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 25, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 25, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 25, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 25
+PASS: gsl_fft_real_float with signal_real_noise, n = 25, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 25, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 25, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 25, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 25
+PASS: gsl_fft_complex_forward with signal_noise, n = 25, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 25, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 25, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 25, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 25, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 25, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 25, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 25, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 25, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 25, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 25
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 25, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 25, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 25, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 25, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 25, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 25, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 25, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 25, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 25, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 25, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 25
+PASS: gsl_fft_real with signal_real_noise, n = 25, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 25, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 25, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 25, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 25
+PASS: gsl_fft_real_float with signal_real_noise, n = 25, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 25, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 25, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 26, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 26
+PASS: gsl_fft_complex_forward with signal_noise, n = 26, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 26, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 26, stride = 1
+. 0 FE0D040 20
+. 83 FE 0F 68 FC 1F 00 00 C8 5F 00 00 FD AD 00 B2 40 81 0E AC
+
+. 0 FE0DEFC 8
+. 81 3E 0F BC 4B FF F1 58
+
+. 0 FE0D058 24
+. C8 A9 00 00 FC 1F 69 7A C8 21 00 10 FD 21 00 2A FF 01 48 00 41 9A 00 D8
+
+PASS: gsl_fft_complex_forward with signal_pulse, n = 26, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 26, stride = 1
+. 0 FE0D054 28
+. 81 3E 0F A0 C8 A9 00 00 FC 1F 69 7A C8 21 00 10 FD 21 00 2A FF 01 48 00 41 9A 00 D8
+
+PASS: gsl_fft_complex_forward with signal_exp, n = 26, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 26, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 26
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 26, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 26, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 26, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 26, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 26, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 26, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 26, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 26
+PASS: gsl_fft_real with signal_real_noise, n = 26, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 26, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 26, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 26, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 26
+PASS: gsl_fft_real_float with signal_real_noise, n = 26, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 26, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 26, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 26, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 26
+PASS: gsl_fft_complex_forward with signal_noise, n = 26, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 26, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 26, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 26, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 26, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 26, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 26, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 26, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 26, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 26, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 26
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 26, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 26, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 26, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 26, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 26, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 26, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 26, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 26, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 26, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 26, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 26
+PASS: gsl_fft_real with signal_real_noise, n = 26, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 26, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 26, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 26, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 26
+PASS: gsl_fft_real_float with signal_real_noise, n = 26, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 26, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 26, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 26, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 26
+PASS: gsl_fft_complex_forward with signal_noise, n = 26, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 26, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 26, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 26, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 26, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 26, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 26, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 26, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 26, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 26, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 26
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 26, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 26, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 26, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 26, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 26, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 26, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 26, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 26, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 26, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 26, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 26
+PASS: gsl_fft_real with signal_real_noise, n = 26, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 26, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 26, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 26, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 26
+PASS: gsl_fft_real_float with signal_real_noise, n = 26, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 26, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 26, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 27, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 27
+PASS: gsl_fft_complex_forward with signal_noise, n = 27, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 27, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 27, stride = 1
+. 0 FE0DEEC 8
+. 81 3E 0F B8 4B FF FF 04
+
+. 0 FE0DDF4 16
+. CB A9 00 00 FF 7F 07 72 FC 06 D8 28 4B FF F2 00
+
+PASS: gsl_fft_complex_forward with signal_pulse, n = 27, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 27, stride = 1
+. 0 FE0EBD0 24
+. 81 3E 10 10 C9 29 00 00 FC 1F 22 7A FD 81 00 2A FF 0C 08 00 41 9A 00 60
+
+. 0 FE0CFF4 24
+. 81 3E 0F 9C C8 09 00 00 FC 1F 30 3A FF 81 00 2A FF 1C 08 00 41 BA FA 50
+
+PASS: gsl_fft_complex_forward with signal_exp, n = 27, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 27, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 27
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 27, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 27, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 27, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 27, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 27, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 27, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 27, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 27
+PASS: gsl_fft_real with signal_real_noise, n = 27, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 27, stride = 1
+. 0 1000D3D4 316
+. 1D 03 00 03 7C C5 FA 14 7C 63 DA 14 7D 64 40 50 7D 08 22 14 7D 6B CA 14 39 08 FF FF 39 6B FF FF 7C 19 42 14 55 6A 18 38 54 09 18 38 39 4A 00 08 39 29 00 08 7D 4A E1 D6 55 07 18 38 38 E7 00 08 7D 29 E1 D6 7D 4A EC AE 54 CA 18 38 FD 40 50 50 39 4A 00 08 7C 1C 01 D6 7D 69 EC AE 54 A9 18 38 FC 8B 50 2A 39 29 00 08 FD 6B 50 28 7D 7C 59 D6 54 00 18 38 7D 1D 04 AE FD A4 07 72 FD 6B 07 B2 55 6B 18 38 7C E7 E1 D6 7C 0B EC AE FD 88 00 28 7D 1C 41 D6 FD 08 00 2A 7C C7 EC AE 7C E6 FA 14 FD 8C 07 B2 54 EB 18 38 39 6B 00 08 FD A6 68 28 55 08 18 38 FC 08 07 72 7D 28 EC AE 7C 17 29 D6 7C A5 DA 14 FD 4D 60 28 FD AD 60 2A FC 09 00 28 FC A3 02 B2 7C D7 31 D6 54 00 18 38 FC E1 03 72 FD 42 02 B2 7C F7 39 D6 54 C6 18 38 FD BF 03 72 FD 80 58 2A 7D 29 B9 D6 FC 00 58 28 54 E7 18 38 FD 29 40 2A FC A2 2B 3A 7D 4A B9 D6 FC FF 38 3A 7D 3A 05 AE FC 01 68 38 7D 6B B9 D6 FD 83 53 38 FC C6 20 2A 7C C9 D5 AE 7C 06 D5 AE 7C EA D5 AE 7D 87 D5 AE 7C AB D5 AE 42 00 FE C8
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 27, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 27, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 27
+PASS: gsl_fft_real_float with signal_real_noise, n = 27, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 27, stride = 1
+. 0 1000F5A0 340
+. 1D 1D 00 03 7C C4 CA 14 7C A6 CA 14 7F BD DA 14 7D 63 40 50 7D 08 1A 14 7D 6B C2 14 39 08 FF FF 39 6B FF FF 7C 18 42 14 55 6A 10 3A 54 09 10 3A 39 4A 00 04 39 29 00 04 7D 4A E1 D6 55 07 10 3A 38 E7 00 04 7D 29 E1 D6 7D 2A FC 2E 54 CA 10 3A FD 20 48 50 39 4A 00 04 7C 1C 01 D6 7D 49 FC 2E 54 89 10 3A EC 8A 48 2A 39 29 00 04 ED 4A 48 28 7D 7C 59 D6 54 00 10 3A 7D 7F 04 2E FD A0 20 90 ED 4A 07 72 55 6B 10 3A 7C E7 E1 D6 7C EB FC 2E FD AD 07 B2 54 AB 10 3A EC AB 38 2A 39 6B 00 04 7D 1C 41 D6 7C C7 FC 2E ED 6B 38 28 FD 80 28 90 FC 00 30 90 55 08 10 3A ED 6B 07 72 7D 08 FC 2E FD 8C 07 B2 7C 17 21 D6 7C 84 DA 14 FC 00 68 28 FD A0 40 90 EC C6 20 2A FC 00 00 18 7C D7 31 D6 FD AD 60 28 54 00 10 3A ED 08 28 2A ED 80 58 28 FD A0 68 18 7C B7 29 D6 EC 00 58 2A 54 C6 10 3A EC E1 03 32 7D 1A 05 2E ED 2D 50 2A ED 63 00 32 7D 29 B9 D6 ED AD 50 28 54 A5 10 3A EC 02 00 32 ED 9F 03 32 7D 4A B9 D6 ED 62 5B 7A EC FF 3A 7A 7C C9 D5 2E ED A3 03 78 ED 21 62 78 7D 6B B9 D6 7D A6 D5 2E 7D 6A D5 2E 7D 25 D5 2E 7C EB D5 2E 42 00 FE B0
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 27, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 27, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 27
+PASS: gsl_fft_complex_forward with signal_noise, n = 27, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 27, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 27, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 27, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 27, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 27, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 27, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 27, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 27, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 27, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 27
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 27, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 27, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 27, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 27, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 27, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 27, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 27, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 27, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 27, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 27, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 27
+PASS: gsl_fft_real with signal_real_noise, n = 27, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 27, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 27, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 27, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 27
+PASS: gsl_fft_real_float with signal_real_noise, n = 27, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 27, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 27, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 27, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 27
+PASS: gsl_fft_complex_forward with signal_noise, n = 27, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 27, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 27, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 27, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 27, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 27, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 27, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 27, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 27, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 27, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 27
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 27, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 27, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 27, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 27, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 27, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 27, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 27, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 27, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 27, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 27, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 27
+PASS: gsl_fft_real with signal_real_noise, n = 27, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 27, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 27, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 27, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 27
+PASS: gsl_fft_real_float with signal_real_noise, n = 27, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 27, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 27, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 28, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 28
+PASS: gsl_fft_complex_forward with signal_noise, n = 28, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 28, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 28, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 28, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 28, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 28, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 28, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 28
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 28, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 28, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 28, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 28, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 28, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 28, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 28, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 28
+PASS: gsl_fft_real with signal_real_noise, n = 28, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 28, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 28, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 28, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 28
+PASS: gsl_fft_real_float with signal_real_noise, n = 28, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 28, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 28, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 28, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 28
+PASS: gsl_fft_complex_forward with signal_noise, n = 28, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 28, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 28, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 28, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 28, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 28, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 28, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 28, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 28, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 28, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 28
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 28, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 28, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 28, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 28, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 28, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 28, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 28, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 28, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 28, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 28, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 28
+PASS: gsl_fft_real with signal_real_noise, n = 28, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 28, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 28, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 28, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 28
+PASS: gsl_fft_real_float with signal_real_noise, n = 28, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 28, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 28, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 28, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 28
+PASS: gsl_fft_complex_forward with signal_noise, n = 28, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 28, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 28, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 28, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 28, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 28, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 28, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 28, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 28, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 28, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 28
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 28, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 28, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 28, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 28, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 28, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 28, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 28, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 28, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 28, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 28, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 28
+PASS: gsl_fft_real with signal_real_noise, n = 28, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 28, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 28, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 28, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 28
+PASS: gsl_fft_real_float with signal_real_noise, n = 28, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 28, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 28, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 29, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 29
+PASS: gsl_fft_complex_forward with signal_noise, n = 29, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 29, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 29, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 29, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 29, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 29, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 29, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 29
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 29, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 29, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 29, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 29, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 29, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 29, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 29, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 29
+PASS: gsl_fft_real with signal_real_noise, n = 29, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 29, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 29, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 29, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 29
+PASS: gsl_fft_real_float with signal_real_noise, n = 29, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 29, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 29, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 29, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 29
+PASS: gsl_fft_complex_forward with signal_noise, n = 29, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 29, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 29, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 29, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 29, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 29, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 29, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 29, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 29, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 29, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 29
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 29, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 29, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 29, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 29, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 29, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 29, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 29, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 29, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 29, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 29, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 29
+PASS: gsl_fft_real with signal_real_noise, n = 29, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 29, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 29, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 29, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 29
+PASS: gsl_fft_real_float with signal_real_noise, n = 29, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 29, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 29, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 29, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 29
+PASS: gsl_fft_complex_forward with signal_noise, n = 29, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 29, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 29, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 29, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 29, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 29, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 29, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 29, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 29, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 29, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 29
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 29, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 29, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 29, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 29, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 29, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 29, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 29, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 29, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 29, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 29, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 29
+PASS: gsl_fft_real with signal_real_noise, n = 29, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 29, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 29, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 29, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 29
+PASS: gsl_fft_real_float with signal_real_noise, n = 29, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 29, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 29, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 30, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 30
+PASS: gsl_fft_complex_forward with signal_noise, n = 30, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 30, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 30, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 30, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 30, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 30, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 30, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 30
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 30, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 30, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 30, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 30, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 30, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 30, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 30, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 30
+PASS: gsl_fft_real with signal_real_noise, n = 30, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 30, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 30, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 30, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 30
+PASS: gsl_fft_real_float with signal_real_noise, n = 30, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 30, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 30, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 30, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 30
+PASS: gsl_fft_complex_forward with signal_noise, n = 30, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 30, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 30, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 30, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 30, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 30, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 30, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 30, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 30, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 30, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 30
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 30, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 30, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 30, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 30, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 30, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 30, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 30, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 30, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 30, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 30, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 30
+PASS: gsl_fft_real with signal_real_noise, n = 30, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 30, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 30, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 30, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 30
+PASS: gsl_fft_real_float with signal_real_noise, n = 30, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 30, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 30, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 30, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 30
+PASS: gsl_fft_complex_forward with signal_noise, n = 30, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 30, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 30, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 30, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 30, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 30, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 30, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 30, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 30, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 30, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 30
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 30, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 30, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 30, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 30, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 30, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 30, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 30, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 30, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 30, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 30, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 30
+PASS: gsl_fft_real with signal_real_noise, n = 30, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 30, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 30, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 30, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 30
+PASS: gsl_fft_real_float with signal_real_noise, n = 30, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 30, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 30, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 31, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 31
+PASS: gsl_fft_complex_forward with signal_noise, n = 31, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 31, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 31, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 31, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 31, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 31, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 31, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 31
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 31, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 31, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 31, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 31, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 31, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 31, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 31, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 31
+PASS: gsl_fft_real with signal_real_noise, n = 31, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 31, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 31, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 31, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 31
+PASS: gsl_fft_real_float with signal_real_noise, n = 31, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 31, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 31, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 31, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 31
+PASS: gsl_fft_complex_forward with signal_noise, n = 31, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 31, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 31, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 31, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 31, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 31, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 31, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 31, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 31, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 31, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 31
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 31, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 31, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 31, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 31, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 31, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 31, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 31, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 31, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 31, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 31, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 31
+PASS: gsl_fft_real with signal_real_noise, n = 31, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 31, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 31, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 31, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 31
+PASS: gsl_fft_real_float with signal_real_noise, n = 31, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 31, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 31, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 31, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 31
+PASS: gsl_fft_complex_forward with signal_noise, n = 31, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 31, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 31, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 31, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 31, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 31, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 31, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 31, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 31, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 31, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 31
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 31, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 31, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 31, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 31, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 31, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 31, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 31, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 31, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 31, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 31, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 31
+PASS: gsl_fft_real with signal_real_noise, n = 31, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 31, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 31, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 31, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 31
+PASS: gsl_fft_real_float with signal_real_noise, n = 31, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 31, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 31, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 32, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 32
+PASS: gsl_fft_complex_forward with signal_noise, n = 32, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 32, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 32, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 32, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 32, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 32, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 32, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 32
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 32, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 32, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 32, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 32, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 32, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 32, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 32, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 32
+. 0 10012298 388
+. 7C 1B 72 14 57 66 18 38 7D 60 72 14 54 09 18 38 7D 0B 72 14 39 29 00 08 55 0A 18 38 7D 29 E9 D6 39 4A 00 08 55 67 18 38 38 E7 00 08 7D 4A E9 D6 7D 49 FC AE 38 C6 00 08 FD 21 02 B2 7C B7 E2 14 7C 97 1A 14 7C 1D 01 D6 7C AA FC AE 54 69 18 38 FD 7C 01 72 57 8A 18 38 39 4A 00 08 7D 7D 59 D6 54 00 18 38 7D 9F 04 AE 39 29 00 08 FC 01 03 32 7D 1D 41 D6 55 6B 18 38 7C EB FC AE FD 82 4B 38 FC DE 01 F2 7C E7 E9 D6 55 08 18 38 7D 08 FC AE FD 42 02 BA 54 88 18 38 FC 9C 02 32 39 08 00 08 7D A7 FC AE 7C C6 E9 D6 FD 1D 5A 38 54 A7 18 38 38 E7 00 08 FD 3E 03 72 7C 1D D9 D6 7D 66 FC AE FD BF 33 7A 7F 7B D2 14 FC BD 21 7A 54 00 18 38 7D 78 19 D6 FC CC 40 28 7C 1F 04 AE FC FF 49 F8 7C 63 8A 14 FC 8B 68 28 7C 18 E1 D6 FD 2A 28 28 55 6B 18 38 FD 6B 68 2A 7F 9C 8A 14 FC C0 30 50 FD 4A 28 2A 7C B8 29 D6 FD A0 38 28 54 00 18 38 FC 00 38 2A FC 64 30 28 FC AB 50 28 7C 98 21 D6 FD 20 48 50 54 A5 18 38 FD 8C 40 2A FC A0 28 50 7D 4A C1 D6 FC ED 48 2A FD 00 60 28 54 84 18 38 FC 60 18 50 FC 00 60 2A 7C E7 C1 D6 FD 6B 50 2A FD AD 48 28 FC 84 30 2A 7C 19 05 AE 7D 6A CD AE 7D 08 C1 D6 7D A5 CD AE 7C 87 CD AE 7D 04 CD AE 7D 29 C1 D6 7C A8 CD AE 7C EB CD AE 7C 69 CD AE 42 00 FE 80
+
+. 0 10012464 168
+. 7C 05 72 14 7D 44 32 14 7D 60 72 14 7C 1D 01 D6 7D 2B 72 14 55 48 18 38 54 C7 18 38 7D 3D 49 D6 54 00 18 38 7C 1F 04 AE 38 E7 00 08 39 08 00 08 7D 7D 59 D6 55 29 18 38 7D A9 FC AE FD 80 68 2A 7C 1D 29 D6 FC 00 68 28 55 6B 18 38 7D 4B FC AE FD 8C 02 32 7C A5 D2 14 FC 00 02 32 54 00 18 38 7D BF 04 AE 7D 58 51 D6 FD 60 50 50 FD 4A 60 28 FD 2D 00 28 7C 18 31 D6 FD 6B 60 28 FD AD 00 2A 55 4A 18 38 7C C6 8A 14 7C E7 C1 D6 54 00 18 38 7D B9 05 AE 7D 08 C1 D6 7D 67 CD AE 7D 2A CD AE 7D 48 CD AE 42 00 FF 5C
+
+PASS: gsl_fft_real with signal_real_noise, n = 32, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 32, stride = 1
+. 0 1000D900 180
+. 7D 23 2A 14 54 AB 18 38 55 2A 18 38 7C 1C 29 D6 39 6B 00 08 81 81 00 30 39 4A 00 08 7D 04 62 14 7D 3C 49 D6 54 00 18 38 7D 9D 04 AE 7C E8 62 14 7C C7 62 14 7C A5 FA 14 7D 6B E1 D6 55 29 18 38 7D A9 EC AE FD 4C 68 28 7D 4A E1 D6 7D 6B EC AE FD 8C 68 2A FD 4A 02 72 7C 0A EC AE 7C 17 21 D6 FD 8C 60 2A 7C 84 DA 14 FD AB 00 2A FC 00 58 28 7D 17 41 D6 54 00 18 38 FD AD 02 72 7D 9A 05 AE FC 00 00 2A 7C F7 39 D6 55 08 18 38 FD 6A 68 2A FD 4A 68 28 7C D7 31 D6 FD 60 58 50 54 E7 18 38 7D 48 D5 AE 7C 07 D5 AE 54 C6 18 38 7D 66 D5 AE 42 00 FF 50
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 32, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 32, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 32
+. 0 100142F4 388
+. 7C 1B 72 14 57 66 10 3A 7D 60 72 14 54 09 10 3A 7D 0B 72 14 39 29 00 04 55 0A 10 3A 7D 29 F9 D6 39 4A 00 04 55 67 10 3A 38 E7 00 04 7D 4A F9 D6 7D 49 EC 2E 38 C6 00 04 ED 21 02 B2 7C B7 E2 14 7C 97 1A 14 7C 1F 01 D6 7C EA EC 2E 57 89 10 3A EC 9C 01 F2 54 6A 10 3A 39 29 00 04 7D 7F 59 D6 54 00 10 3A 7D 7D 04 2E 39 4A 00 04 ED 22 4A F8 7D 1F 41 D6 55 6B 10 3A 7D 0B EC 2E ED 61 02 F2 54 AB 10 3A ED 9E 02 32 39 6B 00 04 7C E7 F9 D6 55 08 10 3A 7C 08 EC 2E ED 42 5A BA 54 88 10 3A EC 9D 20 38 39 08 00 04 EC 1C 00 32 7C C6 F9 D6 7D A7 EC 2E EC A9 20 28 ED 9F 63 7A 7C 1F D9 D6 EC FD 01 FA ED BE 03 72 7D 66 EC 2E FC A0 28 50 7F 7B D2 14 EC 6B 60 28 EC CA 38 28 54 00 10 3A ED 1F 6A 38 7C 1D 04 2E ED 4A 38 2A 7C 18 E1 D6 ED 6B 60 2A 7F 9C 8A 14 ED A0 40 28 ED 29 20 2A EC E3 28 28 7C F8 19 D6 ED 8B 50 28 54 00 10 3A FC C0 30 50 7C 63 8A 14 EC 00 40 2A 7C B8 29 D6 FD 80 60 50 EC 8D 30 2A 54 E7 10 3A ED 00 48 28 FC E0 38 50 7C 98 21 D6 EC 00 48 2A ED 6B 50 2A 54 A5 10 3A ED AD 30 28 EC 63 28 2A 7C 19 05 2E 7D 29 C1 D6 54 84 10 3A 7D 6B C1 D6 7D 69 CD 2E 7D A5 CD 2E 7D 08 C1 D6 7C 6B CD 2E 7D 04 CD 2E 7D 4A C1 D6 7D 88 CD 2E 7C 87 CD 2E 7C EA CD 2E 42 00 FE 80
+
+. 0 100144C0 176
+. 7C 05 72 14 7D 44 32 14 7D 60 72 14 7C 1F 01 D6 7D 2B 72 14 55 47 10 3A 54 C8 10 3A 7D 3F 49 D6 54 00 10 3A 7D BD 04 2E 39 08 00 04 38 E7 00 04 55 29 10 3A 7D 7F 59 D6 7D 89 EC 2E EC 0D 60 2A ED AD 60 28 7C 1F 29 D6 55 6B 10 3A 7D 6B EC 2E 7C A5 D2 14 FD 40 58 50 54 00 10 3A FC 00 02 32 7D 9D 04 2E 7D 38 31 D6 7C C6 8A 14 FD AD 02 32 FC 00 00 18 7D 58 51 D6 55 29 10 3A FD A0 68 18 ED 6B 00 28 ED 4A 00 28 7D 08 C1 D6 ED 2C 68 28 ED 8C 68 2A 55 4A 10 3A 7C E7 C1 D6 7D 89 CD 2E 7D 48 CD 2E 7D 2A CD 2E 7D 67 CD 2E 42 00 FF 54
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 32, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 32, stride = 1
+. 0 1000FAE4 188
+. 7D 23 2A 14 54 AB 10 3A 55 2A 10 3A 7C 1C 29 D6 39 6B 00 04 81 81 00 30 39 4A 00 04 7D 04 62 14 7D 3C 49 D6 54 00 10 3A 7D 5F 04 2E 7C E8 62 14 7C C7 62 14 7C A5 EA 14 7D 6B E1 D6 55 29 10 3A 7C 09 FC 2E ED AA 00 28 7D 4A E1 D6 7D 6B FC 2E ED 4A 00 2A 7D 8A FC 2E 7C 17 21 D6 FD AD 02 72 7C 84 DA 14 EC 0B 60 2A ED 8C 58 28 7D 17 41 D6 FD A0 68 18 54 00 10 3A ED 4A 50 2A 7C F7 39 D6 ED 8C 60 2A FC 00 02 72 55 08 10 3A 7D 5A 05 2E 7C D7 31 D6 54 E7 10 3A FC 00 00 18 ED 6D 00 2A 54 C6 10 3A ED AD 00 28 FD 60 58 50 7D A8 D5 2E 7D 87 D5 2E 7D 66 D5 2E 42 00 FF 48
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 32, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 32, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 32
+PASS: gsl_fft_complex_forward with signal_noise, n = 32, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 32, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 32, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 32, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 32, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 32, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 32, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 32, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 32, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 32, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 32
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 32, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 32, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 32, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 32, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 32, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 32, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 32, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 32, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 32, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 32, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 32
+PASS: gsl_fft_real with signal_real_noise, n = 32, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 32, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 32, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 32, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 32
+PASS: gsl_fft_real_float with signal_real_noise, n = 32, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 32, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 32, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 32, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 32
+PASS: gsl_fft_complex_forward with signal_noise, n = 32, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 32, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 32, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 32, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 32, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 32, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 32, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 32, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 32, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 32, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 32
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 32, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 32, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 32, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 32, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 32, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 32, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 32, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 32, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 32, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 32, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 32
+PASS: gsl_fft_real with signal_real_noise, n = 32, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 32, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 32, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 32, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 32
+PASS: gsl_fft_real_float with signal_real_noise, n = 32, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 32, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 32, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 33, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 33
+PASS: gsl_fft_complex_forward with signal_noise, n = 33, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 33, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 33, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 33, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 33, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 33, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 33, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 33
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 33, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 33, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 33, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 33, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 33, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 33, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 33, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 33
+PASS: gsl_fft_real with signal_real_noise, n = 33, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 33, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 33, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 33, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 33
+PASS: gsl_fft_real_float with signal_real_noise, n = 33, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 33, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 33, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 33, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 33
+PASS: gsl_fft_complex_forward with signal_noise, n = 33, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 33, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 33, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 33, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 33, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 33, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 33, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 33, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 33, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 33, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 33
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 33, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 33, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 33, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 33, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 33, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 33, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 33, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 33, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 33, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 33, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 33
+PASS: gsl_fft_real with signal_real_noise, n = 33, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 33, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 33, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 33, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 33
+PASS: gsl_fft_real_float with signal_real_noise, n = 33, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 33, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 33, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 33, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 33
+PASS: gsl_fft_complex_forward with signal_noise, n = 33, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 33, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 33, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 33, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 33, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 33, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 33, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 33, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 33, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 33, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 33
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 33, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 33, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 33, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 33, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 33, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 33, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 33, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 33, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 33, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 33, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 33
+PASS: gsl_fft_real with signal_real_noise, n = 33, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 33, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 33, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 33, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 33
+PASS: gsl_fft_real_float with signal_real_noise, n = 33, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 33, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 33, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 34, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 34
+PASS: gsl_fft_complex_forward with signal_noise, n = 34, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 34, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 34, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 34, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 34, stride = 1
+. 0 FE0DA98 20
+. 81 3E 0F 9C C9 69 00 00 FC BF 02 F2 FC 04 28 28 4B FF FA A4
+
+PASS: gsl_fft_complex_forward with signal_exp, n = 34, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 34, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 34
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 34, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 34, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 34, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 34, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 34, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 34, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 34, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 34
+PASS: gsl_fft_real with signal_real_noise, n = 34, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 34, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 34, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 34, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 34
+PASS: gsl_fft_real_float with signal_real_noise, n = 34, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 34, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 34, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 34, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 34
+PASS: gsl_fft_complex_forward with signal_noise, n = 34, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 34, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 34, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 34, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 34, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 34, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 34, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 34, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 34, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 34, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 34
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 34, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 34, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 34, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 34, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 34, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 34, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 34, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 34, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 34, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 34, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 34
+PASS: gsl_fft_real with signal_real_noise, n = 34, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 34, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 34, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 34, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 34
+PASS: gsl_fft_real_float with signal_real_noise, n = 34, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 34, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 34, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 34, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 34
+PASS: gsl_fft_complex_forward with signal_noise, n = 34, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 34, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 34, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 34, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 34, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 34, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 34, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 34, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 34, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 34, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 34
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 34, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 34, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 34, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 34, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 34, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 34, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 34, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 34, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 34, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 34, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 34
+PASS: gsl_fft_real with signal_real_noise, n = 34, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 34, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 34, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 34, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 34
+PASS: gsl_fft_real_float with signal_real_noise, n = 34, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 34, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 34, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 35, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 35
+PASS: gsl_fft_complex_forward with signal_noise, n = 35, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 35, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 35, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 35, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 35, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 35, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 35, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 35
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 35, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 35, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 35, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 35, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 35, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 35, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 35, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 35
+. 0 10011100 12
+. 3A 40 00 00 7F 92 80 40 40 9C 0A 80
+
+PASS: gsl_fft_real with signal_real_noise, n = 35, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 35, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 35, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 35, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 35
+. 0 100130F0 12
+. 3A 40 00 00 7F 92 80 40 40 9C 0A BC
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 35, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 35, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 35, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 35, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 35
+PASS: gsl_fft_complex_forward with signal_noise, n = 35, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 35, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 35, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 35, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 35, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 35, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 35, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 35, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 35, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 35, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 35
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 35, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 35, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 35, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 35, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 35, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 35, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 35, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 35, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 35, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 35, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 35
+PASS: gsl_fft_real with signal_real_noise, n = 35, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 35, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 35, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 35, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 35
+PASS: gsl_fft_real_float with signal_real_noise, n = 35, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 35, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 35, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 35, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 35
+PASS: gsl_fft_complex_forward with signal_noise, n = 35, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 35, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 35, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 35, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 35, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 35, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 35, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 35, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 35, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 35, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 35
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 35, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 35, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 35, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 35, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 35, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 35, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 35, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 35, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 35, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 35, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 35
+PASS: gsl_fft_real with signal_real_noise, n = 35, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 35, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 35, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 35, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 35
+PASS: gsl_fft_real_float with signal_real_noise, n = 35, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 35, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 35, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 36, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 36
+. 0 10008218 400
+. 7C C8 02 A6 80 E1 01 40 7C 0C AA 14 7D 71 62 14 7D 07 62 14 7C 00 C9 D6 7D 46 62 14 7C 9B FC AE 7D 3B FA 14 CA E1 00 40 C8 29 00 08 7C EE 62 14 7D 6B C9 D6 54 00 20 36 7D 20 FA 14 7C FF 04 AE C9 09 00 08 7F BC D2 14 CB 01 00 48 39 8C 00 01 7D 4A C9 D6 55 6B 20 36 7D 2B FC AE 7C AB FA 14 C9 65 00 08 7E 94 CA 14 80 01 01 48 7F 7B 92 14 7D 08 C9 D6 55 4A 20 36 7C 0A FC AE 7C CA FA 14 C9 A6 00 08 7D 40 BA 14 FC C9 00 2A 80 C1 01 4C 55 08 20 36 7C E7 C9 D6 7D 48 FC AE 7D 28 FA 14 C9 89 00 08 FC AB 68 2A FC 6A 38 2A 81 01 01 44 FC 4C 40 2A 54 E7 20 36 FD 6B 68 28 7F 87 FC AE FD 4A 38 28 7D 27 FA 14 FD 8C 40 28 CB A9 00 08 FC E6 05 32 7D 68 BA 14 7D 37 B2 14 7D 06 BA 14 FD A3 05 32 7C 10 BA 14 7D 29 C1 D6 3A F7 00 01 FD 29 00 28 FD 05 05 32 FC 02 05 32 7D 6B C1 D6 55 29 20 36 FD 75 02 F2 7C E9 D2 14 FD 95 03 32 7D 4A C1 D6 55 6B 20 36 FD 35 02 72 7C CB D2 14 FD 55 02 B2 7D 08 C1 D6 55 4A 20 36 FC E4 38 28 7C AA D2 14 FD BC 68 28 FD 01 40 28 7C 00 C1 D6 FC 1D 00 28 55 08 20 36 FC 84 30 2A 7C 88 D2 14 FC C7 58 2A FF 9C 18 2A 54 00 20 36 FC 6D 60 2A 7C 60 D2 14 FC 21 28 2A FF BD 10 2A FC A8 48 28 FC 40 50 28 FC E7 58 28 FD AD 60 28 FC 00 50 2A FF E6 18 28 FD 08 48 2A FC C6 18 2A FF C5 10 28
+
+. 0 100083A8 200
+. FC A5 10 2A C8 41 00 48 FD 87 68 28 FD 68 00 28 FC 42 01 B2 FD 08 00 2A C8 01 00 40 FD 24 E0 28 FD 41 E8 28 D8 41 01 98 FC E7 68 2A C9 A1 00 50 FC 00 03 32 FF 6D 07 F2 FF 57 02 F2 D8 01 01 90 FF 38 01 72 FE CD 07 B2 C9 A1 00 38 FC 6E 02 72 FC 52 01 F2 FF 0E 02 B2 FE F2 02 32 FD 6D 02 FA C8 01 01 98 FD 4F 1A BA FC B0 01 7A FD 13 12 3A FF D1 DF BA FD 8D D3 38 FC D0 C9 B8 FD 2F C2 78 FC F3 B9 F8 FF F1 B7 F8 FC 84 E0 2A FC 21 E8 2A 7C 9C D5 AE 7F 9C 9A 14 D8 3D 00 08 7D 89 D5 AE D9 67 00 08 7C CB D5 AE D8 A6 00 08 7D 2A D5 AE D9 45 00 08 7C E8 D5 AE D9 04 00 08 7F FA 05 AE DB C3 00 08 42 00 FD AC
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 36, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 36, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 36, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 36, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 36, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 36, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 36, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 36
+. 0 1000B09C 400
+. 7C E8 02 A6 7C 0C AA 14 7D 71 62 14 7D 4E 62 14 7C 00 C9 D6 81 21 00 F0 7D 07 62 14 7C 9B FC 2E 7C E9 62 14 7D 3B FA 14 7D 6B C9 D6 54 00 18 38 C0 69 00 04 7D 20 FA 14 C1 09 00 04 39 8C 00 01 7C FF 04 2E 7C 17 B2 14 7D 4A C9 D6 55 6B 18 38 7C AB FA 14 7D 2B FC 2E C1 65 00 04 7E 94 CA 14 7F 7B 92 14 7D 08 C9 D6 55 4A 18 38 7C CA FA 14 7C 0A FC 2E C1 A6 00 04 EC C9 00 2A 81 41 00 F4 55 08 18 38 7C E7 C9 D6 7D 28 FA 14 7D 48 FC 2E C1 89 00 04 EC AB 68 2A EC 4A 38 2A 81 01 00 FC EC 2C 40 2A 54 E7 18 38 7D 27 FA 14 ED 29 00 28 ED 6B 68 28 7F E7 FC 2E ED 4A 38 28 C3 C9 00 04 ED 8C 40 28 80 E1 00 F8 ED 06 05 32 7D 2A BA 14 EC E5 05 32 7D 67 BA 14 EC 02 05 32 7D 48 BA 14 ED A1 05 32 7D 10 BA 14 EC E3 38 28 7C 00 C1 D6 ED 04 40 28 7C FC D2 14 ED 35 02 72 3A F7 00 01 ED 75 02 F2 EC 1F 00 28 7D 29 C1 D6 ED BE 68 28 54 00 18 38 ED 55 02 B2 7C C0 D2 14 ED 95 03 32 EC 84 30 2A 7D 6B C1 D6 EC C8 58 2A 55 29 18 38 EC 63 28 2A 7C A9 D2 14 EC A7 48 28 EF FF 10 2A 7D 4A C1 D6 EC 40 60 2A 55 6B 18 38 EF DE 08 2A 7C 8B D2 14 EC 2D 50 28 ED 08 58 28 7D 08 C1 D6 ED AD 50 2A 55 4A 18 38 EC E7 48 2A 7C 6A D2 14 EC 00 60 28 EF 85 08 28 55 08 18 38 ED 67 68 28 7F A8 D2 14 ED 88 00 28 ED 08 00 2A C0 01 00 40
+
+. 0 1000B22C 192
+. EF A6 10 28 EC E7 68 2A EC C6 10 2A C0 41 00 48 EC A5 08 2A C0 21 00 44 EF 60 03 32 EE E0 02 F2 C0 01 00 48 ED 24 F8 28 ED 43 F0 28 EC 00 07 32 EF 41 01 B2 ED A1 01 72 EC 2F 01 F2 D0 01 01 48 EF 02 07 72 C0 01 00 3C EE D1 02 72 EF 2F 02 32 EC 51 02 B2 ED 10 0A 38 C0 21 01 48 ED 60 DA FA EC B3 D1 7A ED 52 B2 BA EC F0 C9 FA EF 8E C7 3A ED 80 BB 38 EC D3 69 B8 ED 32 12 78 EF AE 0F 78 EC 84 F8 2A EC 63 F0 2A 7C 9C D5 2E 7F 9C 9A 14 D0 67 00 04 7D 9A 05 2E D1 66 00 04 7C C9 D5 2E D0 A5 00 04 7D 2B D5 2E D1 44 00 04 7D 0A D5 2E D0 E3 00 04 7F A8 D5 2E D3 9D 00 04 42 00 FD B4
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 36, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 36, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 36, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 36, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 36, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 36, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 36, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 36
+PASS: gsl_fft_real with signal_real_noise, n = 36, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 36, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 36, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 36, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 36
+PASS: gsl_fft_real_float with signal_real_noise, n = 36, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 36, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 36, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 36, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 36
+PASS: gsl_fft_complex_forward with signal_noise, n = 36, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 36, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 36, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 36, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 36, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 36, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 36, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 36, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 36, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 36, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 36
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 36, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 36, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 36, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 36, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 36, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 36, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 36, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 36, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 36, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 36, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 36
+PASS: gsl_fft_real with signal_real_noise, n = 36, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 36, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 36, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 36, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 36
+PASS: gsl_fft_real_float with signal_real_noise, n = 36, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 36, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 36, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 36, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 36
+PASS: gsl_fft_complex_forward with signal_noise, n = 36, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 36, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 36, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 36, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 36, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 36, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 36, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 36, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 36, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 36, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 36
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 36, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 36, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 36, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 36, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 36, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 36, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 36, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 36, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 36, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 36, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 36
+PASS: gsl_fft_real with signal_real_noise, n = 36, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 36, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 36, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 36, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 36
+PASS: gsl_fft_real_float with signal_real_noise, n = 36, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 36, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 36, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 37, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 37
+PASS: gsl_fft_complex_forward with signal_noise, n = 37, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 37, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 37, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 37, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 37, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 37, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 37, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 37
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 37, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 37, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 37, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 37, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 37, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 37, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 37, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 37
+PASS: gsl_fft_real with signal_real_noise, n = 37, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 37, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 37, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 37, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 37
+PASS: gsl_fft_real_float with signal_real_noise, n = 37, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 37, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 37, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 37, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 37
+PASS: gsl_fft_complex_forward with signal_noise, n = 37, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 37, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 37, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 37, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 37, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 37, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 37, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 37, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 37, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 37, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 37
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 37, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 37, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 37, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 37, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 37, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 37, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 37, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 37, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 37, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 37, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 37
+PASS: gsl_fft_real with signal_real_noise, n = 37, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 37, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 37, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 37, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 37
+PASS: gsl_fft_real_float with signal_real_noise, n = 37, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 37, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 37, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 37, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 37
+PASS: gsl_fft_complex_forward with signal_noise, n = 37, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 37, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 37, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 37, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 37, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 37, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 37, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 37, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 37, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 37, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 37
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 37, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 37, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 37, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 37, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 37, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 37, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 37, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 37, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 37, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 37, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 37
+PASS: gsl_fft_real with signal_real_noise, n = 37, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 37, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 37, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 37, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 37
+PASS: gsl_fft_real_float with signal_real_noise, n = 37, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 37, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 37, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 38, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 38
+PASS: gsl_fft_complex_forward with signal_noise, n = 38, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 38, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 38, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 38, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 38, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 38, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 38, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 38
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 38, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 38, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 38, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 38, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 38, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 38, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 38, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 38
+PASS: gsl_fft_real with signal_real_noise, n = 38, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 38, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 38, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 38, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 38
+PASS: gsl_fft_real_float with signal_real_noise, n = 38, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 38, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 38, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 38, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 38
+PASS: gsl_fft_complex_forward with signal_noise, n = 38, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 38, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 38, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 38, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 38, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 38, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 38, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 38, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 38, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 38, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 38
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 38, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 38, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 38, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 38, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 38, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 38, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 38, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 38, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 38, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 38, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 38
+PASS: gsl_fft_real with signal_real_noise, n = 38, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 38, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 38, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 38, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 38
+PASS: gsl_fft_real_float with signal_real_noise, n = 38, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 38, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 38, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 38, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 38
+PASS: gsl_fft_complex_forward with signal_noise, n = 38, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 38, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 38, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 38, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 38, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 38, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 38, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 38, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 38, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 38, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 38
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 38, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 38, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 38, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 38, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 38, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 38, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 38, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 38, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 38, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 38, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 38
+PASS: gsl_fft_real with signal_real_noise, n = 38, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 38, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 38, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 38, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 38
+PASS: gsl_fft_real_float with signal_real_noise, n = 38, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 38, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 38, stride = 3
+. 0 FE0C97C 144
+. 83 BE 0F 58 83 9E 0E 88 C9 1D 00 00 83 7E 0F 5C FC BF 40 2A C8 9C 00 00 C8 3B 00 00 83 5E 0E 84 FC 05 40 28 83 3E 0F 60 FD 64 00 72 CB BA 00 00 FD A4 00 32 FD 3F 00 28 FC 4B 00 32 FC 6D 00 32 FF C4 02 72 FD 03 00 32 C8 19 00 00 FF 62 02 72 FF 9E 02 72 FF 46 E8 2A FD BF 40 2A FD 5C 02 72 FD 9A D9 FA FC BF 68 28 FC 8C 57 FA FC 25 40 2A FD 64 08 2A FC 4D 58 2A FC 6D 10 28 FC 20 10 90 FF C3 58 2A FC FE 10 3A FE 07 10 00 41 92 00 50
+
+PASS: gsl_fft_complex_wavetable_alloc, n = 39, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 39
+PASS: gsl_fft_complex_forward with signal_noise, n = 39, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 39, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 39, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 39, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 39, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 39, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 39, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 39
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 39, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 39, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 39, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 39, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 39, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 39, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 39, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 39
+PASS: gsl_fft_real with signal_real_noise, n = 39, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 39, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 39, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 39, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 39
+PASS: gsl_fft_real_float with signal_real_noise, n = 39, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 39, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 39, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 39, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 39
+PASS: gsl_fft_complex_forward with signal_noise, n = 39, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 39, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 39, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 39, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 39, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 39, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 39, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 39, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 39, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 39, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 39
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 39, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 39, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 39, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 39, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 39, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 39, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 39, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 39, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 39, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 39, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 39
+PASS: gsl_fft_real with signal_real_noise, n = 39, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 39, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 39, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 39, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 39
+PASS: gsl_fft_real_float with signal_real_noise, n = 39, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 39, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 39, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 39, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 39
+PASS: gsl_fft_complex_forward with signal_noise, n = 39, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 39, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 39, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 39, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 39, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 39, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 39, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 39, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 39, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 39, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 39
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 39, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 39, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 39, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 39, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 39, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 39, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 39, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 39, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 39, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 39, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 39
+PASS: gsl_fft_real with signal_real_noise, n = 39, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 39, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 39, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 39, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 39
+PASS: gsl_fft_real_float with signal_real_noise, n = 39, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 39, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 39, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 40, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 40
+. 0 FE0D52C 20
+. FE 1F E8 00 80 9E 0F 88 CB A4 00 00 FC 84 07 72 40 91 08 40
+
+. 0 FE0DD7C 8
+. 81 3E 0F B8 4B FF F7 C4
+
+. 0 FE0D544 20
+. C9 09 00 00 FC 1F 22 3A FC 81 00 2A FC 84 08 00 41 86 02 6C
+
+. 0 FE0DBD0 16
+. CB BD 00 00 FC 20 F0 90 FF 9E E8 00 41 9D 00 08
+
+. 0 FE0DBE4 12
+. FC 40 E0 90 38 61 00 10 48 01 76 01
+
+. 0 FE25858 8
+. FF 8C 68 00 40 9D 00 F4
+
+. 0 FE2589C 8
+. FF 83 F0 00 40 9D 00 60
+
+. 0 FE25900 80
+. FD 7E 60 28 83 C1 00 18 CB 01 00 20 CB 21 00 28 FC AB 08 2A CB 61 00 38 CB 81 00 40 CB A1 00 48 FC E5 10 2A CB C1 00 50 CB E1 00 58 FC 27 D0 2A FC 4C 08 2A FD 2C 10 28 D8 43 00 00 FF 49 08 2A DB 43 00 08 CB 41 00 30 38 21 00 60 4E 80 00 20
+
+. 0 FE0DBF0 12
+. C9 A1 00 18 FC 8D E8 00 40 85 02 C4
+
+. 0 FE0DBFC 20
+. 80 BE 0F 8C FF 1F E8 00 CB 85 00 00 FD AD 07 32 40 99 03 14
+
+. 0 FE0DF20 8
+. 81 3E 0F BC 4B FF F2 08
+
+. 0 FE0D12C 24
+. C8 29 00 00 FC 1F 68 7A C8 21 00 10 FF 41 00 2A FE 01 D0 00 40 92 04 70
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 40, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 40, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 40, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 40, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 40, stride = 1
+. 0 FE0D540 24
+. 81 3E 0F 9C C9 09 00 00 FC 1F 22 3A FC 81 00 2A FC 84 08 00 41 86 02 6C
+
+. 0 FE0DBE0 16
+. FC 20 F0 50 FC 40 E0 90 38 61 00 10 48 01 76 01
+
+. 0 FE0DC10 8
+. 81 3E 0F A0 4B FF F5 18
+
+PASS: gsl_fft_complex_forward with signal_exp, n = 40, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 40, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 40
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 40, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 40, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 40, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 40, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 40, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 40, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 40, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 40
+PASS: gsl_fft_real with signal_real_noise, n = 40, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 40, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 40, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 40, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 40
+PASS: gsl_fft_real_float with signal_real_noise, n = 40, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 40, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 40, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 40, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 40
+PASS: gsl_fft_complex_forward with signal_noise, n = 40, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 40, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 40, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 40, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 40, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 40, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 40, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 40, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 40, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 40, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 40
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 40, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 40, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 40, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 40, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 40, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 40, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 40, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 40, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 40, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 40, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 40
+PASS: gsl_fft_real with signal_real_noise, n = 40, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 40, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 40, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 40, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 40
+PASS: gsl_fft_real_float with signal_real_noise, n = 40, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 40, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 40, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 40, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 40
+PASS: gsl_fft_complex_forward with signal_noise, n = 40, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 40, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 40, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 40, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 40, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 40, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 40, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 40, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 40, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 40, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 40
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 40, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 40, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 40, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 40, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 40, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 40, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 40, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 40, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 40, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 40, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 40
+PASS: gsl_fft_real with signal_real_noise, n = 40, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 40, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 40, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 40, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 40
+PASS: gsl_fft_real_float with signal_real_noise, n = 40, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 40, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 40, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 41, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 41
+PASS: gsl_fft_complex_forward with signal_noise, n = 41, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 41, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 41, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 41, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 41, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 41, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 41, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 41
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 41, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 41, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 41, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 41, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 41, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 41, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 41, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 41
+PASS: gsl_fft_real with signal_real_noise, n = 41, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 41, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 41, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 41, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 41
+PASS: gsl_fft_real_float with signal_real_noise, n = 41, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 41, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 41, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 41, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 41
+PASS: gsl_fft_complex_forward with signal_noise, n = 41, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 41, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 41, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 41, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 41, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 41, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 41, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 41, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 41, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 41, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 41
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 41, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 41, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 41, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 41, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 41, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 41, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 41, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 41, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 41, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 41, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 41
+PASS: gsl_fft_real with signal_real_noise, n = 41, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 41, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 41, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 41, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 41
+PASS: gsl_fft_real_float with signal_real_noise, n = 41, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 41, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 41, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 41, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 41
+PASS: gsl_fft_complex_forward with signal_noise, n = 41, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 41, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 41, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 41, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 41, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 41, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 41, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 41, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 41, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 41, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 41
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 41, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 41, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 41, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 41, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 41, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 41, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 41, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 41, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 41, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 41, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 41
+PASS: gsl_fft_real with signal_real_noise, n = 41, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 41, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 41, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 41, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 41
+PASS: gsl_fft_real_float with signal_real_noise, n = 41, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 41, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 41, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 42, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 42
+PASS: gsl_fft_complex_forward with signal_noise, n = 42, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 42, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 42, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 42, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 42, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 42, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 42, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 42
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 42, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 42, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 42, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 42, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 42, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 42, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 42, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 42
+. 0 100119F4 172
+. 81 41 00 2C 55 0B 18 38 39 6B 00 08 7D 28 52 14 7D 6B E9 D6 54 CA 18 38 39 4A 00 08 7C 1D 49 D6 55 29 18 38 39 29 00 08 7D 6B FC AE 54 EB 18 38 39 6B 00 08 54 00 18 38 7D 29 E9 D6 7D 9F 04 AE FC 07 03 32 7D A9 FC AE 7C 1D 41 D6 7D 08 2A 14 FD 47 03 72 FD A8 03 7A 54 00 18 38 7C 1F 04 AE 7D 38 39 D6 FD 88 53 38 7C E7 8A 14 FD 4B 68 28 7C 18 31 D6 FD 6B 68 2A FD 20 60 28 55 29 18 38 FD 40 50 50 7C C6 8A 14 FC 00 60 2A 7D 4A C1 D6 54 00 18 38 7C 19 05 AE 7D 6B C1 D6 7D 6A CD AE 7D 29 CD AE 7D 4B CD AE 42 00 FF 58
+
+PASS: gsl_fft_real with signal_real_noise, n = 42, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 42, stride = 1
+. 0 1000D160 168
+. 54 A9 18 38 54 8B 18 38 39 29 00 08 39 6B 00 08 7D 29 E1 D6 81 81 00 2C 54 C8 18 38 7D 46 62 14 55 47 18 38 7D 6B E1 D6 7D 29 EC AE 39 08 00 08 38 E7 00 08 7D 3C 29 D6 7D 0B EC AE 7C A5 1A 14 FD 89 40 2A FD 29 40 28 7C 1C 21 D6 55 29 18 38 7D 69 EC AE FD 46 03 32 7C 84 1A 14 FD 87 03 32 54 00 18 38 7D 57 51 D6 7D BD 04 AE FC 0B 68 28 7C 17 31 D6 FD 6B 68 2A 55 4A 18 38 FD 47 50 3A 7C C6 DA 14 FC 06 60 38 7D 08 B9 D6 54 00 18 38 7D 7A 05 AE 7C E7 B9 D6 7D 28 D5 AE 7C 0A D5 AE 7D 47 D5 AE 42 00 FF 5C
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 42, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 42, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 42
+. 0 10013A20 172
+. 81 41 00 2C 54 EB 10 3A 39 6B 00 04 54 A8 10 3A 7D 27 52 14 7D 6B F9 D6 54 CA 10 3A 39 08 00 04 39 4A 00 04 7C 1F 49 D6 55 29 10 3A 39 29 00 04 7D 6B EC 2E 54 00 10 3A 7D 29 F9 D6 7D BD 04 2E ED 87 03 72 7C 09 EC 2E 7C 1F 39 D6 7C E7 22 14 ED 88 60 3A EC 07 00 32 54 00 10 3A 7D 38 31 D6 ED 4B 60 28 7C C6 8A 14 ED A8 03 78 7C 1D 04 2E ED 6B 60 2A 7C 18 29 D6 FD 40 50 50 ED 20 68 28 55 29 10 3A EC 00 68 2A 7C A5 8A 14 7D 08 C1 D6 54 00 10 3A 7C 19 05 2E 7D 4A C1 D6 7D 68 CD 2E 7D 29 CD 2E 7D 4A CD 2E 42 00 FF 58
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 42, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 42, stride = 1
+. 0 1000F32C 168
+. 54 A9 10 3A 54 8B 10 3A 39 29 00 04 39 6B 00 04 7D 29 E1 D6 81 81 00 2C 54 C8 10 3A 7D 46 62 14 55 47 10 3A 7D 6B E1 D6 7D 29 FC 2E 39 08 00 04 38 E7 00 04 7D 3C 29 D6 7D 0B FC 2E 7C A5 1A 14 EC 09 40 2A ED 29 40 28 7C 1C 21 D6 55 29 10 3A 7D A9 FC 2E ED 46 00 32 EC 07 00 32 7C 84 1A 14 54 00 10 3A 7D 57 51 D6 7D 9F 04 2E ED 6D 60 28 7C 17 31 D6 ED AD 60 2A 55 4A 10 3A ED 47 52 FA 7C C6 DA 14 ED 66 02 F8 7D 08 B9 D6 54 00 10 3A 7D BA 05 2E 7C E7 B9 D6 7D 28 D5 2E 7D 6A D5 2E 7D 47 D5 2E 42 00 FF 5C
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 42, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 42, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 42
+PASS: gsl_fft_complex_forward with signal_noise, n = 42, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 42, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 42, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 42, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 42, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 42, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 42, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 42, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 42, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 42, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 42
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 42, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 42, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 42, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 42, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 42, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 42, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 42, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 42, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 42, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 42, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 42
+PASS: gsl_fft_real with signal_real_noise, n = 42, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 42, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 42, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 42, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 42
+PASS: gsl_fft_real_float with signal_real_noise, n = 42, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 42, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 42, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 42, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 42
+PASS: gsl_fft_complex_forward with signal_noise, n = 42, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 42, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 42, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 42, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 42, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 42, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 42, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 42, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 42, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 42, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 42
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 42, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 42, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 42, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 42, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 42, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 42, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 42, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 42, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 42, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 42, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 42
+PASS: gsl_fft_real with signal_real_noise, n = 42, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 42, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 42, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 42, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 42
+PASS: gsl_fft_real_float with signal_real_noise, n = 42, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 42, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 42, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 43, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 43
+PASS: gsl_fft_complex_forward with signal_noise, n = 43, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 43, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 43, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 43, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 43, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 43, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 43, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 43
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 43, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 43, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 43, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 43, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 43, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 43, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 43, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 43
+PASS: gsl_fft_real with signal_real_noise, n = 43, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 43, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 43, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 43, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 43
+PASS: gsl_fft_real_float with signal_real_noise, n = 43, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 43, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 43, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 43, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 43
+PASS: gsl_fft_complex_forward with signal_noise, n = 43, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 43, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 43, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 43, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 43, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 43, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 43, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 43, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 43, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 43, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 43
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 43, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 43, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 43, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 43, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 43, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 43, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 43, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 43, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 43, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 43, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 43
+PASS: gsl_fft_real with signal_real_noise, n = 43, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 43, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 43, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 43, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 43
+PASS: gsl_fft_real_float with signal_real_noise, n = 43, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 43, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 43, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 43, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 43
+PASS: gsl_fft_complex_forward with signal_noise, n = 43, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 43, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 43, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 43, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 43, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 43, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 43, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 43, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 43, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 43, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 43
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 43, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 43, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 43, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 43, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 43, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 43, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 43, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 43, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 43, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 43, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 43
+PASS: gsl_fft_real with signal_real_noise, n = 43, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 43, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 43, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 43, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 43
+PASS: gsl_fft_real_float with signal_real_noise, n = 43, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 43, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 43, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 44, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 44
+PASS: gsl_fft_complex_forward with signal_noise, n = 44, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 44, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 44, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 44, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 44, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 44, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 44, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 44
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 44, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 44, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 44, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 44, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 44, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 44, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 44, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 44
+PASS: gsl_fft_real with signal_real_noise, n = 44, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 44, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 44, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 44, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 44
+PASS: gsl_fft_real_float with signal_real_noise, n = 44, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 44, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 44, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 44, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 44
+PASS: gsl_fft_complex_forward with signal_noise, n = 44, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 44, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 44, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 44, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 44, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 44, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 44, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 44, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 44, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 44, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 44
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 44, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 44, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 44, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 44, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 44, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 44, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 44, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 44, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 44, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 44, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 44
+PASS: gsl_fft_real with signal_real_noise, n = 44, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 44, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 44, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 44, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 44
+PASS: gsl_fft_real_float with signal_real_noise, n = 44, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 44, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 44, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 44, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 44
+PASS: gsl_fft_complex_forward with signal_noise, n = 44, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 44, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 44, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 44, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 44, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 44, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 44, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 44, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 44, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 44, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 44
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 44, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 44, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 44, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 44, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 44, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 44, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 44, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 44, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 44, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 44, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 44
+PASS: gsl_fft_real with signal_real_noise, n = 44, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 44, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 44, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 44, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 44
+PASS: gsl_fft_real_float with signal_real_noise, n = 44, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 44, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 44, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 45, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 45
+PASS: gsl_fft_complex_forward with signal_noise, n = 45, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 45, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 45, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 45, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 45, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 45, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 45, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 45
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 45, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 45, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 45, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 45, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 45, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 45, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 45, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 45
+PASS: gsl_fft_real with signal_real_noise, n = 45, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 45, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 45, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 45, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 45
+PASS: gsl_fft_real_float with signal_real_noise, n = 45, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 45, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 45, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 45, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 45
+PASS: gsl_fft_complex_forward with signal_noise, n = 45, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 45, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 45, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 45, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 45, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 45, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 45, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 45, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 45, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 45, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 45
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 45, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 45, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 45, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 45, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 45, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 45, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 45, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 45, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 45, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 45, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 45
+PASS: gsl_fft_real with signal_real_noise, n = 45, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 45, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 45, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 45, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 45
+PASS: gsl_fft_real_float with signal_real_noise, n = 45, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 45, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 45, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 45, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 45
+PASS: gsl_fft_complex_forward with signal_noise, n = 45, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 45, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 45, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 45, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 45, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 45, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 45, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 45, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 45, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 45, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 45
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 45, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 45, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 45, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 45, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 45, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 45, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 45, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 45, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 45, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 45, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 45
+PASS: gsl_fft_real with signal_real_noise, n = 45, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 45, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 45, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 45, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 45
+PASS: gsl_fft_real_float with signal_real_noise, n = 45, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 45, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 45, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 46, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 46
+PASS: gsl_fft_complex_forward with signal_noise, n = 46, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 46, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 46, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 46, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 46, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 46, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 46, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 46
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 46, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 46, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 46, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 46, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 46, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 46, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 46, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 46
+PASS: gsl_fft_real with signal_real_noise, n = 46, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 46, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 46, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 46, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 46
+PASS: gsl_fft_real_float with signal_real_noise, n = 46, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 46, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 46, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 46, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 46
+PASS: gsl_fft_complex_forward with signal_noise, n = 46, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 46, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 46, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 46, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 46, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 46, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 46, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 46, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 46, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 46, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 46
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 46, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 46, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 46, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 46, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 46, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 46, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 46, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 46, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 46, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 46, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 46
+PASS: gsl_fft_real with signal_real_noise, n = 46, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 46, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 46, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 46, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 46
+PASS: gsl_fft_real_float with signal_real_noise, n = 46, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 46, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 46, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 46, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 46
+PASS: gsl_fft_complex_forward with signal_noise, n = 46, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 46, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 46, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 46, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 46, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 46, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 46, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 46, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 46, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 46, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 46
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 46, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 46, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 46, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 46, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 46, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 46, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 46, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 46, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 46, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 46, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 46
+PASS: gsl_fft_real with signal_real_noise, n = 46, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 46, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 46, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 46, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 46
+PASS: gsl_fft_real_float with signal_real_noise, n = 46, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 46, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 46, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 47, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 47
+PASS: gsl_fft_complex_forward with signal_noise, n = 47, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 47, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 47, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 47, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 47, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 47, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 47, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 47
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 47, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 47, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 47, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 47, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 47, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 47, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 47, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 47
+PASS: gsl_fft_real with signal_real_noise, n = 47, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 47, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 47, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 47, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 47
+PASS: gsl_fft_real_float with signal_real_noise, n = 47, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 47, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 47, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 47, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 47
+PASS: gsl_fft_complex_forward with signal_noise, n = 47, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 47, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 47, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 47, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 47, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 47, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 47, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 47, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 47, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 47, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 47
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 47, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 47, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 47, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 47, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 47, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 47, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 47, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 47, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 47, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 47, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 47
+PASS: gsl_fft_real with signal_real_noise, n = 47, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 47, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 47, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 47, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 47
+PASS: gsl_fft_real_float with signal_real_noise, n = 47, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 47, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 47, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 47, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 47
+PASS: gsl_fft_complex_forward with signal_noise, n = 47, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 47, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 47, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 47, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 47, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 47, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 47, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 47, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 47, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 47, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 47
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 47, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 47, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 47, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 47, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 47, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 47, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 47, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 47, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 47, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 47, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 47
+PASS: gsl_fft_real with signal_real_noise, n = 47, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 47, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 47, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 47, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 47
+PASS: gsl_fft_real_float with signal_real_noise, n = 47, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 47, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 47, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 48, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 48
+PASS: gsl_fft_complex_forward with signal_noise, n = 48, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 48, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 48, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 48, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 48, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 48, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 48, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 48
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 48, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 48, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 48, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 48, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 48, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 48, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 48, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 48
+PASS: gsl_fft_real with signal_real_noise, n = 48, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 48, stride = 1
+. 0 1000D734 384
+. 7C F8 FA 14 57 EB 18 38 54 E9 18 38 39 6B 00 08 39 29 00 08 7D 58 CA 14 7D 29 E1 D6 55 46 18 38 57 28 18 38 39 08 00 08 38 C6 00 08 7D 6B E1 D6 7D 69 EC AE FD 60 58 50 7C 1C C9 D6 7D 4B EC AE 7F 39 B2 14 FD 40 50 50 7D 3C F9 D6 54 00 18 38 7D 3D 04 AE 7F FF B2 14 80 01 00 30 7D 5C 51 D6 55 29 18 38 7C 29 EC AE 7D 63 02 14 7C AB 02 14 7C 85 02 14 7C FC 39 D6 55 4A 18 38 7C CA EC AE 54 69 18 38 55 6A 18 38 FC E6 08 28 39 29 00 08 7D 08 E1 D6 54 E7 18 38 7C A7 EC AE FC C6 08 2A 54 87 18 38 FD 89 28 28 39 4A 00 08 7C C6 E1 D6 7D A8 EC AE FD 29 28 2A 54 A8 18 38 FC 0D 58 28 39 08 00 08 FD AD 58 2A 38 E7 00 08 7D 06 EC AE 7C 17 19 D6 FC 60 38 28 7C 63 DA 14 FC 48 50 28 FD 08 50 2A FC 00 38 2A 7D 77 59 D6 FC 8C 10 2A 54 00 18 38 FD 6D 40 28 FC FE 00 32 7C B7 29 D6 55 6B 18 38 FC BC 02 F2 FC 39 01 32 7C 97 21 D6 54 A5 18 38 FF F9 00 F2 FC 1D 00 32 7D 29 B9 D6 54 84 18 38 FD 7B 02 F2 FD 49 30 28 FD 8C 10 28 7D 4A B9 D6 FC 7A 08 FA FC FD 3B 3A 7D 08 B9 D6 FC BB 2A BA FD 9E 03 38 7C E7 B9 D6 FD 5C 5A B8 FC 9A F9 38 FD 29 30 2A FD AD 40 2A 7D 3A 05 AE 7D A9 D5 AE 7D 8B D5 AE 7C EA D5 AE 7D 45 D5 AE 7C A8 D5 AE 7C 84 D5 AE 7C 67 D5 AE 42 00 FE 84
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 48, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 48, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 48
+PASS: gsl_fft_real_float with signal_real_noise, n = 48, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 48, stride = 1
+. 0 1000F918 384
+. 7C F8 EA 14 57 AB 10 3A 54 E9 10 3A 39 6B 00 04 39 29 00 04 7D 58 CA 14 7D 29 E1 D6 55 46 10 3A 57 28 10 3A 39 08 00 04 38 C6 00 04 7D 6B E1 D6 7D 49 FC 2E FD 40 50 50 7C 1C C9 D6 7D 2B FC 2E 7F 39 B2 14 FD 20 48 50 7D 3C E9 D6 54 00 10 3A 7D 7F 04 2E 7F BD B2 14 80 01 00 30 7D 5C 51 D6 55 29 10 3A 7C 29 FC 2E 7D 63 02 14 7C AB 02 14 7C 85 02 14 7C FC 39 D6 55 4A 10 3A 7C EA FC 2E 54 69 10 3A 55 6A 10 3A EC A7 08 28 39 29 00 04 7D 08 E1 D6 54 E7 10 3A 7C C7 FC 2E EC E7 08 2A 54 87 10 3A ED 8B 30 28 39 4A 00 04 7C C6 E1 D6 7D A8 FC 2E ED 6B 30 2A 54 A8 10 3A EC 0D 50 28 39 08 00 04 ED AD 50 2A 38 E7 00 04 7D 06 FC 2E 7C 17 19 D6 EC 40 28 28 7C 63 DA 14 EC 88 48 28 ED 08 48 2A EC 00 28 2A 7D 77 59 D6 EC 6C 20 2A 54 00 10 3A ED 4D 40 28 ED 2B 38 28 ED 8C 20 28 7C B7 29 D6 EC DF 00 32 55 6B 10 3A EC BD 02 B2 EC 3A 00 F2 EC 9A 00 B2 7C 97 21 D6 EC 1E 00 32 54 A5 10 3A ED 5C 02 B2 EC DE 33 3A 7D 29 B9 D6 EC BC 2A 7A EC 5B 08 BA 54 84 10 3A ED 9F 03 38 ED 3D 52 78 7D 4A B9 D6 EC 7B 20 F8 ED 6B 38 2A ED AD 40 2A 7D 08 B9 D6 7D 7A 05 2E 7D A9 D5 2E 7D 8B D5 2E 7C CA D5 2E 7C E7 B9 D6 7D 25 D5 2E 7C A8 D5 2E 7C 64 D5 2E 7C 47 D5 2E 42 00 FE 84
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 48, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 48, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 48
+PASS: gsl_fft_complex_forward with signal_noise, n = 48, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 48, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 48, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 48, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 48, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 48, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 48, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 48, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 48, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 48, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 48
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 48, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 48, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 48, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 48, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 48, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 48, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 48, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 48, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 48, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 48, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 48
+PASS: gsl_fft_real with signal_real_noise, n = 48, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 48, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 48, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 48, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 48
+PASS: gsl_fft_real_float with signal_real_noise, n = 48, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 48, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 48, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 48, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 48
+PASS: gsl_fft_complex_forward with signal_noise, n = 48, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 48, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 48, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 48, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 48, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 48, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 48, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 48, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 48, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 48, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 48
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 48, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 48, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 48, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 48, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 48, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 48, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 48, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 48, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 48, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 48, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 48
+PASS: gsl_fft_real with signal_real_noise, n = 48, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 48, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 48, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 48, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 48
+PASS: gsl_fft_real_float with signal_real_noise, n = 48, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 48, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 48, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 49, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 49
+. 0 FE0D6D8 12
+. C8 5F 00 00 FF 9F 10 00 40 9D 01 24
+
+. 0 FE0D804 16
+. FC 60 F8 50 C8 BC 00 00 FC 43 28 28 4B FF FE DC
+
+. 0 FE0D6EC 24
+. C9 BD 00 00 38 61 00 10 FC 22 68 28 FC 82 08 28 FC 44 68 28 48 01 8B DD
+
+. 0 FE262DC 12
+. 94 21 FF D0 7C 08 02 A6 48 04 CD CD
+
+. 0 FE262E8 68
+. 93 C1 00 28 7F C8 02 A6 93 E1 00 2C 90 01 00 34 7C 7F 1B 78 FD 80 08 90 38 61 00 10 81 7E 20 AC FD 60 10 90 80 9E 20 58 C9 AB 00 00 81 3E 20 B0 FF 81 68 00 C9 44 00 00 C8 09 00 00 FC 0A 00 32 41 9D 00 0C
+
+. 0 FE2632C 24
+. FD 80 08 50 FD 60 10 50 FC 00 60 00 FC 20 60 90 FC 40 58 90 41 81 00 D0
+
+. 0 FE26410 4
+. 4B FF F6 5D
+
+. 0 FE25A6C 12
+. 94 21 FF 90 7C A8 02 A6 48 04 D6 3D
+
+. 0 FE25A78 400
+. 93 C1 00 28 7F C8 02 A6 DB E1 00 68 DB 81 00 50 DB 21 00 38 7C A8 03 A6 80 9E 20 98 81 1E 20 A4 C8 04 00 00 C9 68 00 00 FC C0 08 2A DB 01 00 30 DB C1 00 60 DB A1 00 58 FF E6 00 28 DB 61 00 48 C8 88 00 00 81 9E 20 90 FF 81 F8 28 D8 C1 00 08 DB 41 00 40 93 E1 00 2C FF FC 10 2A 83 FE 20 8C 80 FE 20 A8 81 21 00 08 81 41 00 0C FD 5F 02 F2 80 DE 20 88 81 7E 20 94 55 40 28 34 FD 1C F8 28 93 01 00 10 7D 20 5A 14 93 21 00 14 FC BF 50 28 93 41 00 18 FF 88 10 2A C9 1F 00 00 93 61 00 1C 7C 7A 1B 78 FD 25 50 2A 93 81 00 20 FF 7F 07 32 93 A1 00 24 80 9E 20 84 FD BF 48 28 83 3E 20 7C FF 09 02 72 83 BE 20 78 83 7E 20 74 FF 29 03 72 83 9E 20 6C 81 5E 20 68 FC 3B D8 2A 80 7E 20 64 7F 6B 04 AE FC 59 C8 2A 81 7E 20 70 CB 29 00 18 80 BE 20 60 FF D8 10 2A 83 1E 20 5C FF B8 F0 28 CB 09 00 08 FD 9D 10 2A C8 4C 00 00 CB A9 00 10 FD 42 01 32 81 3E 20 80 FC 6D 63 7A FC A2 50 28 FC E3 08 2A FD 85 50 2A FC 7E 38 2A FC C3 01 32 C8 86 00 00 FF 5E 18 28 FD 63 30 28 FF DA 38 2A C8 E7 00 00 FC 2B 30 2A FD 62 60 28 FC 02 07 B2 FC A3 08 28 FF 41 03 32 FD 25 03 32 FD 08 00 FA FD A1 4A FA FC 3A 68 2A FC DA 08 28 FC 06 68 2A FC 45 02 FA FD 82 40 2A FC A1 60 2A FF 85 38 00 FD 41 28 28 FD 24 28 2A FD A0 28 90 FC CA 60 2A
+
+. 0 FE25C08 4
+. 41 9D 00 08
+
+. 0 FE25C0C 12
+. FD A0 28 50 FC 04 38 00 40 81 06 BC
+
+. 0 FE25C18 8
+. FF 8D 20 00 40 9D 06 98
+
+. 0 FE262B4 28
+. C9 66 00 00 C8 44 00 00 FD 0B 48 28 FD 48 28 2A FC AA 30 2A FC C5 10 2A 4B FF F9 6C
+
+. 0 FE25C38 124
+. C8 48 00 00 FD 69 30 2A C8 27 00 00 FD 83 00 B2 FD 4B 00 B2 C8 49 00 00 FD A3 60 28 FC A9 58 28 FF 4B 50 28 FC ED 60 2A FD 25 30 2A FC 9A 50 2A FF 43 38 28 FD 1E 02 F2 FC DA 01 32 FC AB 20 28 FC 07 01 32 FD A7 31 7A FC 83 42 7A FC C0 68 2A FD 40 30 28 FD 8A 68 2A FC FA 61 7A FC 07 20 2A FC A6 00 2A FC 85 08 00 FD 26 28 28 FC 80 28 90 FC C2 28 2A FC E9 00 2A 41 85 00 08
+
+. 0 FE25CB8 8
+. FF 02 08 00 40 99 05 EC
+
+. 0 FE262A8 12
+. FC 20 10 50 FF 84 08 00 4B FF FA 14
+
+. 0 FE25CC4 4
+. 40 9D 05 C8
+
+. 0 FE2628C 28
+. C8 49 00 00 CB 59 00 00 FD 82 30 28 FD AC 28 2A FD 4D 38 2A FC AA D0 2A 4B FF FA 3C
+
+. 0 FE25CE0 204
+. C8 E8 00 00 FD 46 28 2A C8 47 00 00 FD 83 01 F2 FC 8A 01 F2 FF 43 60 28 FC C6 50 28 FC 2A 20 28 FD BA 60 2A FD 1E 02 B2 FC 01 20 2A FC 23 68 28 FD 26 28 2A FD 4A 00 28 FD 61 00 32 FF 4D 00 32 FC 8D 5A BA FC C3 42 7A FD 7A 20 2A FD 1F 01 F2 FC BA 58 28 FD 9F 40 28 FC 05 20 2A FD 8C 40 2A FD A1 02 BA FD 1F 60 28 FD 2D 30 2A FD AB 48 2A FC 8D 01 F2 FF 4B 68 28 FC BC 03 72 FC 2D 20 28 FD 7A 48 2A FC 01 20 2A FC 3F 2A FA FC C8 00 32 FC 8D 00 28 FC EC 00 32 FD 4C 31 3A FC C7 50 2A FF 47 30 28 FD 3A 50 2A FC A8 49 3A FC E5 08 2A FC 26 38 2A FF 81 10 00 FC 06 08 28 FC 81 F8 2A FC A0 08 90 FC C0 38 2A 41 9D 00 08
+
+. 0 FE25DB0 8
+. FC 1F 10 00 40 81 04 CC
+
+. 0 FE26280 12
+. FC 40 F8 50 FF 85 10 00 4B FF FB 34
+
+. 0 FE25DBC 4
+. 40 9D 04 B0
+
+. 0 FE2626C 20
+. FD BF 20 28 FD 0D 08 2A FD 28 30 2A FC 29 E0 2A 4B FF FB 54
+
+. 0 FE25DD0 132
+. C8 C8 00 00 C9 5D 00 00 FD A3 01 B2 C9 1B 00 00 C8 A7 00 00 FC EA 01 B2 C8 CB 00 00 FC 43 68 28 FD 8A 07 B2 FF 42 68 2A FF EA 38 28 FC 48 60 FA FC 1F 38 2A FD 83 D0 28 FF E4 08 2A FD 4A 00 28 FD 6C 00 32 FF 9A 00 32 FD BA 5A BA FD 24 F8 28 FC 9C 68 2A FF 49 08 2A FC FC 20 28 FC 07 68 2A FC 2C 02 BA FF 81 10 2A FC E4 E0 2A FC 87 28 00 FD 64 38 28 FD 26 38 2A FD A0 38 90 FD 0B E0 2A 41 85 00 08
+
+. 0 FE25E54 12
+. FD A0 38 50 FF 06 28 00 40 99 04 04
+
+. 0 FE25E60 8
+. FF 8D 30 00 40 9D 03 E0
+
+. 0 FE26244 28
+. C8 CB 00 00 C9 5C 00 00 FD A6 48 28 FC 4D 38 2A FD 82 40 2A FC EC 50 2A 4B FF FC 24
+
+. 0 FE25E80 124
+. C8 A8 00 00 FD 69 38 2A C8 87 00 00 FD 83 01 72 FD 4B 01 72 C8 AA 00 00 FC C3 60 28 FD 29 58 28 FC 4B 50 28 FD A6 60 2A FF 9E 02 F2 FC 02 50 2A FD 83 68 28 FC 29 38 2A FD 6B 00 28 FD 0C 00 32 FC CD 00 32 FC 4D 42 FA FD 23 E0 7A FD 06 10 2A FD 46 40 28 FC 0A 10 2A FC EC 02 FA FC 27 48 2A FC E8 08 2A FF 87 20 00 FF 88 38 28 FD 25 38 2A FC C0 38 90 FD 1C 08 2A 41 9D 00 08
+
+. 0 FE25F00 8
+. FC 05 20 00 40 81 03 34
+
+. 0 FE26238 12
+. FC 80 28 50 FF 86 20 00 4B FF FC CC
+
+. 0 FE25F0C 4
+. 40 9D 03 10
+
+. 0 FE2621C 28
+. C9 8A 00 00 C9 63 00 00 FC CC 48 28 FD 46 38 2A FC 4A 40 2A FC E2 58 2A 4B FF FC F4
+
+. 0 FE25F28 124
+. C8 A8 00 00 FD 69 38 2A C8 87 00 00 FC C3 01 72 FD 4B 01 72 C8 A5 00 00 FD A3 30 28 FD 29 58 28 FC 4B 50 28 FF 8D 30 2A FC 3E 02 F2 FC 02 50 2A FC 43 E0 28 FD 89 38 2A FD 6B 00 28 FD 02 00 32 FC DC 00 32 FD BC 42 FA FD 23 0B 3A FD 06 68 2A FD 46 40 28 FC 0A 68 2A FC E2 02 FA FC 27 48 2A FC E8 08 2A FC 87 20 00 FF 88 38 28 FD 25 38 2A FC C0 38 90 FD 1C 08 2A 41 85 00 08
+
+. 0 FE25FA4 12
+. FC C0 38 50 FF 05 20 00 40 99 02 64
+
+. 0 FE25FB0 8
+. FF 86 28 00 40 9D 02 40
+
+. 0 FE261F4 28
+. C8 C5 00 00 C9 78 00 00 FD A6 48 28 FD 4D 38 2A FC 4A 40 2A FC E2 58 2A 4B FF FD C4
+
+. 0 FE25FD0 288
+. C9 48 00 00 FC A9 38 2A CB 87 00 00 FD 83 02 B2 FD 05 02 B2 FD 63 60 28 FC 9E 01 72 FC CB 60 2A FC 25 40 28 FD 29 28 28 FF C1 40 2A FC 23 30 28 FC 49 38 2A FD 65 F0 28 FC E1 07 B2 FC 06 07 B2 FD A6 3A FA FD 23 20 BA FC E0 68 2A FC DB 02 B2 FC 60 38 28 FC 9F 02 B2 FD 83 68 2A FC 5D 02 B2 FC A1 62 FA FD 1B 30 28 FF DF 20 28 FC A5 48 2A FD 88 30 2A FD 7E 20 2A FD 27 28 2A FC 3D 10 28 FC DB 60 28 FD 49 02 B2 FD A1 10 2A FC 66 02 F2 FC 09 50 28 FC 5F 58 28 FC 3D 68 28 FC 80 50 2A FC 6C 18 BA FD 49 20 28 FF CC 02 F2 FD 0A 03 72 FD A4 03 72 FC 04 40 7A FD 67 48 28 FD 1E 18 2A FC 8D 00 2A FC EB 28 2A FD 9E 40 28 FC AD 20 28 FD 78 07 F2 FF CC 18 2A FC E7 07 72 FD A5 00 2A FD 9B 5E BA FC A6 F0 BA FC 6A 68 7A FF E9 3E 7A FF 65 60 2A FF C3 F8 2A FC 68 D8 2A FD A4 F0 2A FF 83 E0 00 FF 48 18 28 FF 04 68 28 FD 63 68 2A FC 5A D8 2A FC 38 F0 2A FD 80 18 90 41 9D 00 08
+
+. 0 FE260F0 12
+. FD 80 18 50 FC 0D E0 00 40 81 00 F0
+
+. 0 FE260FC 8
+. FF 8C 68 00 40 9D 00 D4
+
+. 0 FE26104 48
+. FF 43 58 28 FF 7A 68 2A FF 1B 08 2A FC 58 10 2A FC 2B 10 2A C9 A7 00 00 FC 60 E8 90 FC 9D 68 00 FC 8B 08 28 FD 9D 08 28 FC 44 10 2A 41 85 00 08
+
+. 0 FE26138 8
+. FF 01 68 00 40 99 00 78
+
+. 0 FE261B4 12
+. FD A0 08 50 FF 83 68 00 41 BD FF 8C
+
+. 0 FE26148 108
+. FC DD 60 28 FC 66 08 28 FF A3 10 28 FC 3D C8 2A FD 2C 08 2A 83 01 00 10 83 21 00 14 83 61 00 1C FC 4C 48 28 D9 3A 00 00 83 81 00 20 83 A1 00 24 FF 22 08 2A 83 C1 00 28 83 E1 00 2C CB 01 00 30 DB 3A 00 08 CB 41 00 40 83 41 00 18 CB 21 00 38 CB 61 00 48 CB 81 00 50 CB A1 00 58 CB C1 00 60 CB E1 00 68 38 21 00 70 4E 80 00 20
+
+. 0 FE26414 4
+. 4B FF FF 7C
+
+. 0 FE26390 40
+. C8 E1 00 18 C9 01 00 10 80 61 00 34 D9 1F 00 00 D8 FF 00 08 7C 68 03 A6 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+. 0 FE0D704 28
+. 80 9E 0F 8C C8 21 00 10 C9 21 00 18 C8 C4 00 00 FD 09 09 BA FC 01 40 00 41 82 00 20
+
+. 0 1000886C 400
+. 7C E8 02 A6 81 21 01 0C 80 C1 01 08 7C 14 72 14 7D 6C A2 14 7C 00 C9 D6 7D 07 A2 14 7E F5 FC AE 7C E9 A2 14 81 21 01 10 7D 46 A2 14 7C C9 A2 14 7D 6B C9 D6 7D 35 FA 14 54 00 20 36 CA C9 00 08 7D 20 FA 14 7C BF 04 AE 7C E7 C9 D6 55 6B 20 36 C8 E9 00 08 7C AB FA 14 7C CB FC AE 7F 77 D2 14 C9 05 00 08 3A 94 00 01 7C C6 C9 D6 54 E7 20 36 7D 67 FA 14 7C 87 FC AE C8 6B 00 08 7D 76 82 14 FD 46 20 28 80 01 01 14 7D 4A C9 D6 54 C6 20 36 7D 26 FA 14 7D 86 FC AE C9 69 00 08 FD 28 18 28 FF 25 60 28 80 C1 01 1C 7D 08 C9 D6 55 4A 20 36 7C 2A FC AE 7C 6A FA 14 C8 43 00 08 FF 07 58 28 FC C6 20 2A 7D 40 B2 14 55 08 20 36 FD 08 18 2A 7D A8 FC AE 7C 88 FA 14 C8 04 00 08 FC A5 60 2A FF ED 08 2A C8 61 00 F8 FC E7 58 2A 80 01 01 18 FF C0 10 2A 7C E6 B2 14 FD AD 08 28 81 21 01 20 FC 00 10 28 80 C1 01 00 FD 86 28 2A 7D 00 B2 14 FD 68 38 2A 7C 09 B2 14 FC 2A C8 28 7D 26 B2 14 FC 49 C0 28 7D 6B C1 D6 FF A5 F8 28 7E 73 CA 14 FF 87 F0 28 7E B5 8A 14 FC 23 00 72 3A D6 00 01 7D 4A C1 D6 55 6B 20 36 FC 43 00 B2 C8 61 00 F0 7C CB D2 14 FF 6D 50 28 FF 40 48 28 7D 08 C1 D6 FC A6 28 28 55 4A 20 36 FC E8 38 28 7C AA D2 14 FF B2 07 72 7C E7 C1 D6 55 08 20 36 FE F7 60 2A 7C 88 D2 14 FE D6 58 2A FC DF 30 28 FD 1E 40 28
+
+. 0 100089FC 400
+. 7C 00 C1 D6 FD 4D 50 2A 54 E7 20 36 FD 20 48 2A 7C 67 D2 14 FD B9 68 28 FC 18 00 28 7D 29 C1 D6 FF 92 07 32 54 00 20 36 7F A0 D2 14 FE F7 F8 2A FF 63 06 F2 55 29 20 36 7F 89 D2 14 FF 43 06 B2 7E F7 D5 AE 7E F7 92 14 FE D6 F0 2A FC D1 01 B2 FD 11 02 32 FC B0 01 72 FD AE 03 72 FC 0E 00 32 FD 8C F8 2A FD 6B F0 2A FD 4A C8 2A FD 29 C0 2A CB 01 00 B8 FF E0 E8 50 FC 60 08 50 FC 80 10 50 FC F0 01 F2 FD 4F 02 B2 FD 2F 02 72 FD 93 BB 3A CA E1 00 D8 FD 73 B2 FA FF C0 E0 50 FF FF 28 28 FC 63 68 28 FC 84 00 28 FF BD 30 2A FF 9C 40 2A FD AD D8 2A FC 00 D0 2A FC A5 30 28 FC 42 D0 28 FF DE 38 28 FC 21 D8 28 FC E7 40 28 FC 84 48 2A FD AD 50 2A FC 00 48 2A FF EC F8 2A FF AC E8 2A FF 8B E0 2A FC 42 48 2A FD 8C 28 2A FC 63 50 2A FC 21 50 2A FF CB F0 2A FD 6B 38 2A FC BF 20 28 FC FD 00 28 FC DC 68 2A FF BD 00 2A C8 01 00 C8 FF 9C 68 28 C9 A1 00 A8 FD 4C 10 2A FF FF 20 2A C8 81 00 98 FD 8C 10 28 C8 41 00 D8 FD 2B 08 28 FD 1E 18 2A FD 6B 08 2A FF 64 07 72 FF DE 18 28 C8 61 00 E8 FE A2 01 72 FC 44 07 32 C8 81 00 B8 FF 38 03 32 FE 83 01 F2 C8 61 00 C8 DA DB 00 08 FF 00 02 B2 FC 04 02 F2 FC 97 02 32 CA E1 00 E8 FF 4D 07 F2 FC 2D 07 B2 FD A3 02 72 FC 77 01 B2 CA E1 00 90 FF 97 DF 3A CA E1 00 B0 CB 61 00 A0
+
+. 0 10008B8C 132
+. FD 77 CA FA CB 21 00 C0 CA E1 00 90 FF DB D7 BA CB 41 00 D0 CB 61 00 E0 FD 39 C2 7A CB 21 00 B0 CB 01 00 A0 FD 1A AA 3A CB 41 00 C0 FC DB A1 BA CB 61 00 D0 FD 99 03 38 C8 01 00 E0 FF B7 17 78 FF F8 0F F8 FD 5A 6A B8 7F AB D5 AE DB 86 00 08 FC BB 21 78 7F EA D5 AE DB C5 00 08 FC E0 19 F8 7D 88 D5 AE D9 64 00 08 7D 47 D5 AE D9 23 00 08 7C BA 05 AE D9 1D 00 08 7C E9 D5 AE D8 DC 00 08 42 00 FC 60
+
+PASS: gsl_fft_complex_forward with signal_noise, n = 49, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 49, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 49, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 49, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 49, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 49, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 49, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 49
+. 0 1000B6DC 400
+. 81 01 00 AC 7C E8 02 A6 81 21 00 B0 7C 13 72 14 7D 48 9A 14 7C 00 C9 D6 7D 09 9A 14 81 21 00 B4 7D 67 9A 14 CA E1 00 98 7C E9 9A 14 81 21 00 B8 7D 6B C9 D6 54 00 18 38 7C C9 9A 14 7C BF 04 2E 7D 35 FA 14 7E 95 FC 2E C2 A9 00 04 7D 20 FA 14 7C E7 C9 D6 55 6B 18 38 C0 E9 00 04 7C AB FA 14 7C CB FC 2E 7F B7 82 14 C1 45 00 04 7F 76 D2 14 7C C6 C9 D6 54 E7 18 38 7D 67 FA 14 7C 87 FC 2E C0 6B 00 04 3A 73 00 01 ED 86 20 28 80 01 00 C0 7D 4A C9 D6 54 C6 18 38 7D 26 FA 14 7D 26 FC 2E C1 09 00 04 ED 6A 18 28 EF A5 48 28 80 E1 00 C4 7D 08 C9 D6 55 4A 18 38 7C 6A FA 14 7C 2A FC 2E C0 43 00 04 EF 87 40 28 EC A5 48 2A 81 21 00 CC 55 08 18 38 EC C6 20 2A 7C 88 FA 14 7D A8 FC 2E C0 04 00 04 EC E7 40 2A EF 6D 08 2A 81 01 00 C8 EF 40 10 2A 81 41 00 A8 ED 4A 18 2A 7F 80 BA 14 EF 26 28 2A 7C 07 BA 14 EC 00 10 28 7C A8 BA 14 EC 4B E0 28 7C 89 BA 14 EF 0A 38 2A 7C 6A BA 14 ED AD 08 28 7F BD C1 D6 EC 2C E8 28 7E 94 CA 14 EC 85 D8 28 7E B5 8A 14 EC 67 D0 28 3A F7 00 01 ED 39 D8 2A 7F 9C C1 D6 EF C0 58 28 57 BD 18 38 EC A6 28 28 7D 3D D2 14 EC DB 30 28 ED 60 58 2A 7C 00 C1 D6 EC 1C 00 28 57 9C 18 38 7D 7C D2 14 ED 18 D0 2A EF ED 60 28 7C A5 C1 D6 EC EA 38 28 54 00 18 38 ED 5A 50 28 7D 40 D2 14 ED 8D 60 2A
+
+. 0 1000B86C 400
+. 7C 84 C1 D6 ED BD 68 28 54 A5 18 38 7D 05 D2 14 ED 6B E0 2A 7C 63 C1 D6 54 84 18 38 7C E4 D2 14 54 63 18 38 FC 4E 00 B2 7C C3 D2 14 FC 97 01 32 FC 77 00 F2 CA E1 00 A0 ED 8C E8 2A FC 2E 00 72 FD 33 02 72 FC D2 01 B2 FC 10 00 32 FF CF 07 B2 FC B7 01 72 FC F7 01 F2 FC 40 10 18 EE 94 C8 2A FD 13 02 32 FD 52 02 B2 FD B0 03 72 FF EF 07 F2 FC 80 20 18 FC 60 18 18 FC 20 08 18 EE B5 C0 2A FD 71 02 F2 EE 94 D8 2A FC C0 30 18 FF C0 F0 18 FC 00 00 18 FF 60 10 50 FD 91 03 32 FD 20 48 18 EE B5 D0 2A FD 40 50 18 FF E0 F8 18 FC A0 28 18 FC E0 38 18 FD A0 68 18 FF A0 20 50 FF 80 18 50 FF 40 08 50 FD 00 40 18 FD 60 58 18 ED 34 48 2A EF 7B 00 28 EC 84 30 2A EC 00 F0 2A FD 80 60 18 ED 15 40 2A EF BD 28 28 EF 9C 38 28 EC A5 30 28 EC E7 50 28 EF 5A 68 28 EC 21 F8 28 EC 42 F0 28 C3 C1 00 70 EC 63 50 2A ED AD F8 2A C3 E1 00 78 EC 00 58 2A EC 89 20 2A EF 7B 58 2A ED AD 60 2A EC 21 60 2A EC 42 58 2A EF A9 E8 2A EF 88 E0 2A EC 68 18 2A ED 29 28 2A ED 08 38 2A EF 5A 60 2A EC E4 00 28 EC BD D8 28 ED 68 08 28 ED 89 10 2A EC C3 68 2A EC 84 00 2A C0 01 00 80 ED 29 10 28 C0 41 00 90 ED 08 08 2A C0 21 00 88 EC 63 68 28 EF BD D8 2A C3 61 00 68 ED 5C D0 2A EC 42 01 F2 EF 9C D0 28 EE E0 03 32 EF 5B 01 32 D0 41 01 48
+
+. 0 1000B9FC 208
+. ED BB 00 F2 C3 61 00 88 EF 1F 02 72 EE C1 01 72 EC 3F 02 32 EF E0 02 F2 C0 01 00 90 EF 3E 07 72 EC 5E 07 32 EF DB 02 B2 EF 60 01 B2 C0 01 00 64 EC 60 D0 FA C3 41 00 6C C0 01 00 74 EF 9A CF 3A C3 41 00 7C ED 00 C2 3A C0 01 00 84 ED 7A BA FA C2 E1 00 8C C3 41 01 48 ED 40 B2 BA C0 01 00 64 EC D7 D1 BA C3 41 00 7C EC 80 69 38 C2 E1 00 74 C1 A1 00 6C ED 9A FB 38 C0 01 00 8C ED 37 0A 78 C3 E1 00 84 EF AD 17 78 EC E0 D9 F8 7E 96 D5 2E EC BF F1 78 D2 BB 00 04 7E D6 92 14 7C 9D D5 2E D0 69 00 04 7F BC D5 2E D3 8B 00 04 7D 3A 05 2E D1 0A 00 04 7D 85 D5 2E D1 68 00 04 7C A4 D5 2E D1 47 00 04 7C E3 D5 2E D0 C6 00 04 42 00 FC 14
+
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 49, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 49, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 49, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 49, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 49, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 49, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 49, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 49
+. 0 1001101C 52
+. 7C 18 19 D6 C8 D7 00 00 C8 F6 00 00 38 E0 00 00 39 43 FF FF 7F 6B DB 78 54 04 18 38 2F 07 00 00 C9 36 00 00 C9 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
+
+PASS: gsl_fft_real with signal_real_noise, n = 49, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 49, stride = 1
+. 0 1000CB9C 24
+. 38 1B 00 01 39 E0 00 01 54 0B F8 7E 7C 08 03 A6 2B 8B 00 01 40 9D 01 8C
+
+. 0 1000CBB4 24
+. 83 3E 81 8C 7D 74 5B 78 83 1E 81 90 3A 40 00 00 7F 92 70 40 40 9C 01 60
+
+. 0 1000CBCC 40
+. 20 CF 00 00 7E C6 79 14 55 EC 08 3C 3A 20 00 00 3A A0 00 00 38 60 00 00 C8 B9 00 00 7F 83 F8 40 C8 D8 00 00 40 9C 01 24
+
+. 0 1000CBF4 40
+. 7D 31 62 14 7D 74 78 50 38 A9 FF FF 38 8B 00 01 2C 83 00 00 C9 18 00 00 C9 39 00 00 FC E0 40 90 FD 40 40 90 41 86 00 18
+
+. 0 1000CC30 12
+. 39 00 00 00 7F 88 F8 40 40 9C 00 80
+
+. 0 1000CC3C 48
+. 7C 15 D9 D6 7F E9 03 A6 57 67 08 3C 7D 20 62 14 7C CC 00 50 39 49 FF FF 2F 88 00 00 55 49 18 38 39 69 00 08 7D 28 F8 50 7F 09 40 40 41 9E 00 14
+
+. 0 1000CC7C 4
+. 40 99 03 9C
+
+. 0 1000CC80 56
+. 7C 1C 51 D6 7D 2B E1 D6 54 00 18 38 7D 9D 04 AE 7D 69 EC AE FD AA 03 32 39 08 00 01 7D 4A 3A 14 FC 0A 02 F2 FD A9 6A FA FC 09 03 38 FC E7 68 2A FD 08 00 2A 42 00 FF A0
+
+. 0 1000CC54 24
+. 2F 88 00 00 55 49 18 38 39 69 00 08 7D 28 F8 50 7F 09 40 40 41 9E 00 14
+
+. 0 1000CC6C 20
+. FC 06 02 B2 FD A6 02 72 FD 25 02 78 FD 45 6A BA 40 99 03 9C
+
+. 0 1000D018 52
+. 7D 29 D9 D6 55 29 08 3C 7D 26 4A 14 39 29 FF FF 55 2B 18 38 7D 3C 49 D6 39 6B 00 08 7D 6B E1 D6 55 29 18 38 7D 89 EC AE 7C 0B EC AE FD 60 00 50 4B FF FC 4C
+
+. 0 1000CC94 36
+. FD AA 03 32 39 08 00 01 7D 4A 3A 14 FC 0A 02 F2 FD A9 6A FA FC 09 03 38 FC E7 68 2A FD 08 00 2A 42 00 FF A0
+
+. 0 1000CCB8 16
+. 7C 00 00 26 54 00 3F FE 7E C7 03 79 41 82 03 88
+
+. 0 1000CCC8 76
+. C9 39 00 00 C9 58 00 00 FD AA 02 32 54 A9 18 38 7C 17 29 D6 39 29 00 08 FC 0A 01 F2 38 63 00 01 7F 83 F8 40 FD A9 69 FA 7D 74 22 14 7D 29 B9 D6 54 00 18 38 FC 09 02 38 38 8B FF FF 7C A5 9A 14 7C 1A 05 AE 7D A9 D5 AE 41 9C FE F4
+
+. 0 1000CC04 24
+. 2C 83 00 00 C9 18 00 00 C9 39 00 00 FC E0 40 90 FD 40 40 90 41 86 00 18
+
+. 0 1000CC1C 32
+. FC 06 07 B2 FD A6 07 72 FC 05 07 7A FC A5 6F B8 FC C0 00 90 39 00 00 00 7F 88 F8 40 40 9C 00 80
+
+. 0 1000D04C 20
+. 54 89 20 36 7D 29 82 14 C9 49 FF F8 C9 29 FF F0 4B FF FC 74
+
+. 0 1000CCD0 68
+. FD AA 02 32 54 A9 18 38 7C 17 29 D6 39 29 00 08 FC 0A 01 F2 38 63 00 01 7F 83 F8 40 FD A9 69 FA 7D 74 22 14 7D 29 B9 D6 54 00 18 38 FC 09 02 38 38 8B FF FF 7C A5 9A 14 7C 1A 05 AE 7D A9 D5 AE 41 9C FE F4
+
+. 0 1000CD14 20
+. 3A 52 00 01 7E B5 FA 14 7F 92 70 40 7E 31 DA 14 41 9C FE BC
+
+. 0 1000CD28 20
+. 7D 08 02 A6 39 EF 00 01 55 00 F8 7E 7F 80 78 40 41 9D FE 88
+
+. 0 1000CBC0 12
+. 3A 40 00 00 7F 92 70 40 40 9C 01 60
+
+. 0 1000CD3C 8
+. 73 69 00 01 40 82 01 70
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 49, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 49, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 49
+. 0 1001300C 52
+. 7C 18 19 D6 C0 D7 00 00 C0 F6 00 00 38 E0 00 00 39 43 FF FF 7F 6B DB 78 54 04 10 3A 2F 07 00 00 C1 36 00 00 C1 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 49, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 49, stride = 1
+. 0 1000ED64 24
+. 38 1B 00 01 39 E0 00 01 54 0B F8 7E 7C 08 03 A6 2B 8B 00 01 40 9D 01 8C
+
+. 0 1000ED7C 24
+. 83 3E 82 04 7D 74 5B 78 83 1E 82 08 3A 40 00 00 7F 92 70 40 40 9C 01 60
+
+. 0 1000ED94 40
+. 20 CF 00 00 7E C6 79 14 55 EC 08 3C 3A 20 00 00 3A A0 00 00 38 60 00 00 C0 B9 00 00 7F 83 E8 40 C0 D8 00 00 40 9C 01 24
+
+. 0 1000EDBC 40
+. 7D 31 62 14 7D 74 78 50 38 A9 FF FF 38 8B 00 01 2C 83 00 00 C1 18 00 00 C1 39 00 00 FC E0 40 90 FD 40 40 90 41 86 00 18
+
+. 0 1000EDF8 12
+. 39 00 00 00 7F 88 E8 40 40 9C 00 80
+
+. 0 1000EE04 48
+. 7C 15 D9 D6 7F A9 03 A6 57 67 08 3C 7D 20 62 14 7C CC 00 50 39 49 FF FF 2F 88 00 00 55 49 10 3A 39 69 00 04 7D 28 E8 50 7F 09 40 40 41 9E 00 14
+
+. 0 1000EE44 4
+. 40 99 03 A0
+
+. 0 1000EE48 56
+. 7C 1C 51 D6 7D 2B E1 D6 54 00 10 3A 7D 9F 04 2E 7D 69 FC 2E ED AA 03 32 39 08 00 01 EC 0A 02 F2 7D 4A 3A 14 ED A9 6A FA EC 09 03 38 EC E7 68 2A ED 08 00 2A 42 00 FF A0
+
+. 0 1000EE1C 24
+. 2F 88 00 00 55 49 10 3A 39 69 00 04 7D 28 E8 50 7F 09 40 40 41 9E 00 14
+
+. 0 1000EE34 20
+. EC 06 02 B2 ED A6 02 72 ED 25 02 78 ED 45 6A BA 40 99 03 A0
+
+. 0 1000F1E4 52
+. 7D 29 D9 D6 55 29 08 3C 7D 26 4A 14 39 29 FF FF 55 2B 10 3A 7D 3C 49 D6 39 6B 00 04 7D 6B E1 D6 55 29 10 3A 7D 89 FC 2E 7C 0B FC 2E FD 60 00 50 4B FF FC 48
+
+. 0 1000EE5C 36
+. ED AA 03 32 39 08 00 01 EC 0A 02 F2 7D 4A 3A 14 ED A9 6A FA EC 09 03 38 EC E7 68 2A ED 08 00 2A 42 00 FF A0
+
+. 0 1000EE80 16
+. 7C 00 00 26 54 00 3F FE 7E C7 03 79 41 82 03 8C
+
+. 0 1000EE90 76
+. C1 39 00 00 C1 58 00 00 54 A9 10 3A ED AA 02 32 EC 0A 01 F2 7C 17 29 D6 39 29 00 04 38 63 00 01 ED A9 69 FA 7F 83 E8 40 EC 09 02 38 7D 29 B9 D6 54 00 10 3A 7D 74 22 14 7C 1A 05 2E 38 8B FF FF 7C A5 9A 14 7D A9 D5 2E 41 9C FE F4
+
+. 0 1000EDCC 24
+. 2C 83 00 00 C1 18 00 00 C1 39 00 00 FC E0 40 90 FD 40 40 90 41 86 00 18
+
+. 0 1000EDE4 32
+. EC 06 07 B2 ED A6 07 72 EC 05 07 7A EC A5 6F B8 FC C0 00 90 39 00 00 00 7F 88 E8 40 40 9C 00 80
+
+. 0 1000F218 20
+. 54 89 18 38 7D 29 82 14 C1 49 FF FC C1 29 FF F8 4B FF FC 70
+
+. 0 1000EE98 68
+. 54 A9 10 3A ED AA 02 32 EC 0A 01 F2 7C 17 29 D6 39 29 00 04 38 63 00 01 ED A9 69 FA 7F 83 E8 40 EC 09 02 38 7D 29 B9 D6 54 00 10 3A 7D 74 22 14 7C 1A 05 2E 38 8B FF FF 7C A5 9A 14 7D A9 D5 2E 41 9C FE F4
+
+. 0 1000EEDC 20
+. 3A 52 00 01 7E B5 EA 14 7F 92 70 40 7E 31 DA 14 41 9C FE BC
+
+. 0 1000EEF0 20
+. 7D 08 02 A6 39 EF 00 01 55 00 F8 7E 7F 80 78 40 41 9D FE 88
+
+. 0 1000ED88 12
+. 3A 40 00 00 7F 92 70 40 40 9C 01 60
+
+. 0 1000EF04 8
+. 73 69 00 01 40 82 01 74
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 49, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 49, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 49
+PASS: gsl_fft_complex_forward with signal_noise, n = 49, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 49, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 49, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 49, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 49, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 49, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 49, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 49, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 49, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 49, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 49
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 49, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 49, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 49, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 49, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 49, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 49, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 49, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 49, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 49, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 49, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 49
+PASS: gsl_fft_real with signal_real_noise, n = 49, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 49, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 49, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 49, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 49
+PASS: gsl_fft_real_float with signal_real_noise, n = 49, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 49, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 49, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 49, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 49
+PASS: gsl_fft_complex_forward with signal_noise, n = 49, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 49, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 49, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 49, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 49, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 49, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 49, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 49, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 49, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 49, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 49
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 49, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 49, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 49, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 49, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 49, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 49, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 49, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 49, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 49, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 49, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 49
+PASS: gsl_fft_real with signal_real_noise, n = 49, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 49, stride = 3
+. 0 FEE0DB4 12
+. 7C 00 18 28 7D 20 19 2D 40 A2 FF F8
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 49, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 49, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 49
+PASS: gsl_fft_real_float with signal_real_noise, n = 49, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 49, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 49, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 50, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 50
+PASS: gsl_fft_complex_forward with signal_noise, n = 50, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 50, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 50, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 50, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 50, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 50, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 50, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 50
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 50, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 50, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 50, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 50, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 50, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 50, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 50, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 50
+. 0 10011434 400
+. 7D 7C D2 14 7C 0B D2 14 7D 1D 59 D6 7D 20 D2 14 7D 49 D2 14 54 07 18 38 55 26 18 38 55 45 18 38 7C 1D 01 D6 55 6B 18 38 39 6B 00 08 38 E7 00 08 38 C6 00 08 7D 3D 49 D6 38 A5 00 08 55 08 18 38 54 00 18 38 7C E8 FC AE 7D 5F 04 AE 7D 5D 51 D6 55 29 18 38 7D 29 FC AE FC 39 01 F2 57 89 18 38 FC 17 02 B2 39 29 00 08 7D 6B E9 D6 55 4A 18 38 7C AA FC AE FD B5 02 72 57 6A 18 38 FD 93 01 72 39 4A 00 08 7C E7 E9 D6 7D 0B FC AE 56 8B 08 3C FC 79 02 32 7D 6B AA 14 39 6B FF FF 7C C6 E9 D6 7D 67 FC AE FD 1A 0A 3A 7C F7 5A 14 55 64 18 38 FC 57 02 F2 54 E3 18 38 7C A5 E9 D6 7C C6 FC AE FD 78 02 FA 38 84 00 08 38 63 00 08 FF F5 01 B2 7E B5 8A 14 7C 85 FC AE 7D 29 E9 D6 FC D6 69 BA FF D3 01 32 7C 1D E1 D6 7F A9 FC AE FC 94 61 3A 7D 37 DA 14 7D 17 4A 14 FD 36 FA 78 55 26 18 38 54 00 18 38 55 05 18 38 FC B4 F1 78 7C 3F 04 AE 38 C6 00 08 7C 18 D9 D6 FC FA 19 F8 38 A5 00 08 7F 9C B2 14 FD 58 12 B8 7F 7B 8A 14 7D 38 49 D6 54 00 18 38 FD AB 30 2A FC 08 20 2A FD 87 28 2A FC 6A 48 2A 7D 18 41 D6 FF C0 68 2A 55 29 18 38 FD 4A 48 28 FF EC 18 2A FC 00 68 28 7D 78 59 D6 FD 3E 03 F2 55 08 18 38 FD 6B 30 28 FC 5C 02 B2 7C F8 39 D6 55 6B 18 38 FD 5B 02 B2 FC E7 28 28 7D 4A C1 D6 FC 00 04 32 54 E7 18 38 FD 8C 18 28
+
+. 0 100115C4 168
+. FD BF 03 F2 7C C6 C1 D6 FD 3D 48 28 FC DC 02 F2 7C A5 C1 D6 FD 7B 02 F2 FD 08 20 28 FC 51 11 FA 7C 84 C1 D6 FD 8C 04 32 FC F2 51 F8 7C 63 C1 D6 FD 49 00 28 FD A1 68 28 FD 29 00 2A FC D1 32 3A FD 12 5A 38 FC 0D 60 28 FC AA 10 28 FD 69 38 28 FD AD 60 2A FC 80 30 2A FC 21 F8 2A FD 8D 40 2A FF BD F0 2A FD 60 58 50 7C 39 05 AE FC A0 28 50 FD AD 40 28 7F AA CD AE FD 29 38 2A FC 00 30 28 FD 4A 10 2A 7D A9 CD AE 7D 26 CD AE 7C 08 CD AE 7D 45 CD AE 7D 8B CD AE 7D 64 CD AE 7C 87 CD AE 7C A3 CD AE 42 00 FD CC
+
+PASS: gsl_fft_real with signal_real_noise, n = 50, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 50, stride = 1
+. 0 1000DE58 260
+. 1D 24 00 05 7C E5 CA 14 7C 84 DA 14 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 7D 7C 49 D6 54 0A 18 38 7D 06 02 14 39 4A 00 08 7C 1C 01 D6 55 6B 18 38 7D 6B EC AE 55 29 18 38 39 29 00 08 FD 6B 58 2A 54 00 18 38 7D 4A E1 D6 7C 1D 04 AE FC 00 00 2A 7D 1C 41 D6 7D AA EC AE FD 8B 00 28 FD 6B 00 2A 7D 29 E1 D6 55 08 18 38 7C E8 EC AE FD AD 68 2A FD 8C 01 72 FD 2B 39 B8 7C 09 EC AE 7D 27 CA 14 7C 17 29 D6 FD 58 03 72 7D 69 CA 14 7D 4B CA 14 FD B9 03 72 7C A5 DA 14 7C F7 39 D6 54 00 18 38 FC 00 00 2A FD 0C 48 28 FD 8C 48 2A FD 59 50 38 7D 37 49 D6 54 E7 18 38 FC 18 68 3A FD 20 60 50 7D 77 59 D6 FD A0 40 50 55 29 18 38 FD 6B 38 2A FD 29 00 28 7D 57 51 D6 FD AD 50 28 FD 8C 00 28 55 6B 18 38 FD 08 50 28 7D 7A 05 AE 55 4A 18 38 7D 87 D5 AE 7D 09 D5 AE 7D AB D5 AE 7D 2A D5 AE 42 00 FF 00
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 50, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 50, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 50
+. 0 10013430 400
+. 7D 7B D2 14 7C 0B D2 14 7D 1F 59 D6 7D 20 D2 14 7D 49 D2 14 54 07 10 3A 55 26 10 3A 55 45 10 3A 7C 1F 01 D6 55 6B 10 3A 39 6B 00 04 38 E7 00 04 38 C6 00 04 7D 3F 49 D6 38 A5 00 04 55 08 10 3A 54 00 10 3A 7C C8 EC 2E 7D 1D 04 2E 7D 5F 51 D6 55 29 10 3A 7C 89 EC 2E EC B8 01 B2 EC F6 02 32 57 69 10 3A EC 54 01 32 39 29 00 04 7D 6B F9 D6 55 4A 10 3A 7C 6A EC 2E 57 8A 10 3A 39 4A 00 04 EC 32 00 F2 7C E7 F9 D6 7D 6B EC 2E EC B9 2A FA ED 78 02 F2 7C C6 F9 D6 7C 07 EC 2E EC F7 38 3A EC 16 00 32 7C A5 F9 D6 7D 86 EC 2E EC D9 59 B8 EC 55 13 3A ED 94 03 32 7D A5 EC 2E ED 17 02 38 7D 29 F9 D6 EC 33 0B 7A ED B2 03 72 EC 95 61 38 EC 05 08 2A 7C 1F D9 D6 ED 87 10 2A 7F C9 EC 2E EC 73 68 F8 56 09 08 3C ED 68 20 2A 7D 29 B2 14 EF 80 60 2A 54 00 10 3A ED A6 18 2A 7F FD 04 2E EC 00 60 28 7C 17 E2 14 FD 40 E0 90 39 29 FF FF EF AD 58 2A 7D 17 02 14 ED AD 58 28 7C 97 4A 14 FD 4A 04 32 54 07 10 3A 55 06 10 3A 55 25 10 3A 54 83 10 3A FD 80 E8 90 7D 78 E1 D6 FD 20 F0 90 38 E7 00 04 38 C6 00 04 FD 8C 04 32 38 A5 00 04 38 63 00 04 7C 18 01 D6 FC 00 04 72 55 6B 10 3A 7F 7B AA 14 ED 08 20 28 7E D6 8A 14 FD 29 50 28 7D 18 41 D6 FD 60 F8 90 54 00 10 3A FD AD 04 72 7F 9C 8A 14 EC C6 18 28 7D 38 49 D6 FC 00 00 18
+
+. 0 100135C0 200
+. 55 08 10 3A EC E7 10 28 FD 6B 60 28 FD 20 48 18 7C 98 21 D6 ED 5B 02 32 55 29 10 3A ED 1A 02 32 EC 89 00 28 ED 4E 51 BA 7D 4A C1 D6 FD A0 68 18 54 84 10 3A ED 29 00 2A EC A5 08 28 FD 60 58 18 7C E7 C1 D6 EC CF 41 B8 ED 9B 01 F2 EC FA 01 F2 EC 0B 68 28 7C C6 C1 D6 ED 8E 61 7A ED 6B 68 2A EC 64 50 28 ED 09 30 28 7C A5 C1 D6 EC AF 39 78 ED A0 60 2A EF FF E8 2A 7C 63 C1 D6 EC EB 28 2A EF DE E0 2A FD 00 40 50 7F EB CD 2E FC 60 18 50 ED 6B 28 28 7F CA CD 2E ED 29 30 2A EC 00 60 28 EC 84 50 2A 7D 79 05 2E 7D 27 CD 2E 7C 08 CD 2E 7C 86 CD 2E 7C E9 CD 2E 7D 05 CD 2E 7D A4 CD 2E 7C 63 CD 2E 42 00 FD AC
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 50, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 50, stride = 1
+. 0 10010074 276
+. 1D 24 00 05 7C E6 C2 14 7C 84 DA 14 7D 29 DA 14 39 29 FF FF 7C 05 4A 14 7D 7C 49 D6 7D 45 02 14 54 08 10 3A 39 08 00 04 7C 1C 01 D6 55 6B 10 3A 7D 4B FC 2E 55 29 10 3A 39 29 00 04 ED 4A 50 2A 54 00 10 3A 7D 5C 51 D6 7C 1F 04 2E EC 00 00 2A 55 4A 10 3A 7D 08 E1 D6 7C EA FC 2E 7D 47 C2 14 ED 8A 00 28 ED 4A 00 2A FC 00 38 90 7D 29 E1 D6 FD A0 50 90 ED 4A 38 2A FD 8C 01 72 7D 69 FC 2E 7D 2A C2 14 7C 17 31 D6 FD AD 01 B8 7C 08 FC 2E 7D 69 C2 14 FD 80 60 18 7C C6 DA 14 EC 00 00 2A 7C F7 39 D6 FD A0 68 18 54 00 10 3A ED 6B 58 2A 7D 5A 05 2E ED 38 00 32 ED 0C 68 28 7D 57 51 D6 ED 8C 68 2A 54 E7 10 3A EC 19 00 32 ED 39 4A F8 FD A0 40 50 7D 37 49 D6 ED 78 02 FA 55 4A 10 3A FC 00 60 50 ED AD 48 28 7D 77 59 D6 ED 8C 58 28 EC 00 58 28 55 29 10 3A ED 08 48 28 7D 87 D5 2E 55 6B 10 3A 7D 0A D5 2E 7D A9 D5 2E 7C 0B D5 2E 42 00 FE F0
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 50, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 50, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 50
+PASS: gsl_fft_complex_forward with signal_noise, n = 50, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 50, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 50, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 50, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 50, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 50, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 50, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 50, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 50, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 50, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 50
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 50, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 50, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 50, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 50, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 50, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 50, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 50, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 50, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 50, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 50, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 50
+PASS: gsl_fft_real with signal_real_noise, n = 50, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 50, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 50, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 50, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 50
+PASS: gsl_fft_real_float with signal_real_noise, n = 50, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 50, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 50, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 50, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 50
+PASS: gsl_fft_complex_forward with signal_noise, n = 50, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 50, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 50, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 50, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 50, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 50, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 50, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 50, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 50, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 50, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 50
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 50, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 50, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 50, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 50, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 50, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 50, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 50, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 50, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 50, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 50, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 50
+PASS: gsl_fft_real with signal_real_noise, n = 50, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 50, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 50, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 50, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 50
+PASS: gsl_fft_real_float with signal_real_noise, n = 50, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 50, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 50, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 51, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 51
+PASS: gsl_fft_complex_forward with signal_noise, n = 51, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 51, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 51, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 51, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 51, stride = 1
+. 0 FE0D6E4 32
+. C9 5C 00 00 FC 5F 50 28 C9 BD 00 00 38 61 00 10 FC 22 68 28 FC 82 08 28 FC 44 68 28 48 01 8B DD
+
+PASS: gsl_fft_complex_forward with signal_exp, n = 51, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 51, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 51
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 51, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 51, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 51, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 51, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 51, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 51, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 51, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 51
+PASS: gsl_fft_real with signal_real_noise, n = 51, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 51, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 51, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 51, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 51
+PASS: gsl_fft_real_float with signal_real_noise, n = 51, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 51, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 51, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 51, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 51
+PASS: gsl_fft_complex_forward with signal_noise, n = 51, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 51, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 51, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 51, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 51, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 51, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 51, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 51, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 51, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 51, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 51
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 51, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 51, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 51, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 51, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 51, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 51, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 51, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 51, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 51, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 51, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 51
+PASS: gsl_fft_real with signal_real_noise, n = 51, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 51, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 51, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 51, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 51
+PASS: gsl_fft_real_float with signal_real_noise, n = 51, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 51, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 51, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 51, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 51
+PASS: gsl_fft_complex_forward with signal_noise, n = 51, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 51, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 51, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 51, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 51, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 51, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 51, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 51, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 51, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 51, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 51
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 51, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 51, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 51, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 51, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 51, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 51, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 51, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 51, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 51, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 51, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 51
+PASS: gsl_fft_real with signal_real_noise, n = 51, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 51, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 51, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 51, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 51
+PASS: gsl_fft_real_float with signal_real_noise, n = 51, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 51, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 51, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 52, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 52
+PASS: gsl_fft_complex_forward with signal_noise, n = 52, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 52, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 52, stride = 1
+. 0 FE0BC44 20
+. 83 BE 0E A4 FC 9E 00 00 C8 5D 00 00 FD AD 00 B2 40 85 01 84
+
+. 0 FE0BDD8 16
+. 81 3E 0E AC C8 29 00 00 FC 1E 68 7A 4B FF FE C0
+
+. 0 FE0BCA4 16
+. C9 A1 00 10 FD 8D 00 2A FF 8D 60 00 41 9E 00 E4
+
+PASS: gsl_fft_complex_forward with signal_pulse, n = 52, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 52, stride = 1
+. 0 FE0BC58 16
+. 81 3E 0E A8 C8 29 00 00 FC 1E 68 7A 48 00 00 40
+
+PASS: gsl_fft_complex_forward with signal_exp, n = 52, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 52, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 52
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 52, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 52, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 52, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 52, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 52, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 52, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 52, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 52
+PASS: gsl_fft_real with signal_real_noise, n = 52, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 52, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 52, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 52, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 52
+PASS: gsl_fft_real_float with signal_real_noise, n = 52, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 52, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 52, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 52, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 52
+PASS: gsl_fft_complex_forward with signal_noise, n = 52, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 52, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 52, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 52, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 52, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 52, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 52, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 52, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 52, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 52, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 52
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 52, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 52, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 52, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 52, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 52, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 52, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 52, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 52, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 52, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 52, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 52
+PASS: gsl_fft_real with signal_real_noise, n = 52, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 52, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 52, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 52, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 52
+PASS: gsl_fft_real_float with signal_real_noise, n = 52, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 52, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 52, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 52, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 52
+PASS: gsl_fft_complex_forward with signal_noise, n = 52, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 52, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 52, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 52, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 52, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 52, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 52, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 52, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 52, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 52, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 52
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 52, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 52, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 52, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 52, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 52, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 52, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 52, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 52, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 52, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 52, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 52
+PASS: gsl_fft_real with signal_real_noise, n = 52, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 52, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 52, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 52, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 52
+PASS: gsl_fft_real_float with signal_real_noise, n = 52, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 52, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 52, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 53, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 53
+PASS: gsl_fft_complex_forward with signal_noise, n = 53, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 53, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 53, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 53, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 53, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 53, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 53, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 53
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 53, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 53, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 53, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 53, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 53, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 53, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 53, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 53
+PASS: gsl_fft_real with signal_real_noise, n = 53, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 53, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 53, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 53, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 53
+PASS: gsl_fft_real_float with signal_real_noise, n = 53, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 53, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 53, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 53, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 53
+PASS: gsl_fft_complex_forward with signal_noise, n = 53, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 53, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 53, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 53, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 53, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 53, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 53, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 53, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 53, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 53, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 53
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 53, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 53, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 53, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 53, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 53, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 53, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 53, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 53, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 53, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 53, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 53
+PASS: gsl_fft_real with signal_real_noise, n = 53, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 53, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 53, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 53, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 53
+PASS: gsl_fft_real_float with signal_real_noise, n = 53, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 53, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 53, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 53, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 53
+PASS: gsl_fft_complex_forward with signal_noise, n = 53, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 53, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 53, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 53, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 53, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 53, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 53, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 53, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 53, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 53, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 53
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 53, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 53, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 53, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 53, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 53, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 53, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 53, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 53, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 53, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 53, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 53
+PASS: gsl_fft_real with signal_real_noise, n = 53, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 53, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 53, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 53, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 53
+PASS: gsl_fft_real_float with signal_real_noise, n = 53, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 53, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 53, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 54, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 54
+PASS: gsl_fft_complex_forward with signal_noise, n = 54, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 54, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 54, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 54, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 54, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 54, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 54, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 54
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 54, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 54, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 54, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 54, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 54, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 54, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 54, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 54
+PASS: gsl_fft_real with signal_real_noise, n = 54, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 54, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 54, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 54, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 54
+PASS: gsl_fft_real_float with signal_real_noise, n = 54, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 54, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 54, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 54, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 54
+PASS: gsl_fft_complex_forward with signal_noise, n = 54, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 54, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 54, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 54, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 54, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 54, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 54, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 54, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 54, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 54, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 54
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 54, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 54, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 54, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 54, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 54, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 54, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 54, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 54, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 54, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 54, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 54
+PASS: gsl_fft_real with signal_real_noise, n = 54, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 54, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 54, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 54, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 54
+PASS: gsl_fft_real_float with signal_real_noise, n = 54, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 54, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 54, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 54, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 54
+PASS: gsl_fft_complex_forward with signal_noise, n = 54, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 54, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 54, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 54, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 54, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 54, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 54, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 54, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 54, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 54, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 54
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 54, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 54, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 54, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 54, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 54, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 54, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 54, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 54, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 54, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 54, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 54
+PASS: gsl_fft_real with signal_real_noise, n = 54, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 54, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 54, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 54, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 54
+PASS: gsl_fft_real_float with signal_real_noise, n = 54, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 54, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 54, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 55, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 55
+PASS: gsl_fft_complex_forward with signal_noise, n = 55, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 55, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 55, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 55, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 55, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 55, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 55, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 55
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 55, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 55, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 55, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 55, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 55, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 55, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 55, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 55
+PASS: gsl_fft_real with signal_real_noise, n = 55, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 55, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 55, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 55, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 55
+PASS: gsl_fft_real_float with signal_real_noise, n = 55, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 55, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 55, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 55, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 55
+PASS: gsl_fft_complex_forward with signal_noise, n = 55, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 55, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 55, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 55, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 55, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 55, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 55, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 55, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 55, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 55, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 55
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 55, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 55, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 55, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 55, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 55, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 55, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 55, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 55, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 55, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 55, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 55
+PASS: gsl_fft_real with signal_real_noise, n = 55, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 55, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 55, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 55, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 55
+PASS: gsl_fft_real_float with signal_real_noise, n = 55, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 55, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 55, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 55, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 55
+PASS: gsl_fft_complex_forward with signal_noise, n = 55, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 55, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 55, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 55, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 55, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 55, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 55, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 55, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 55, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 55, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 55
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 55, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 55, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 55, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 55, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 55, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 55, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 55, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 55, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 55, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 55, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 55
+PASS: gsl_fft_real with signal_real_noise, n = 55, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 55, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 55, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 55, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 55
+PASS: gsl_fft_real_float with signal_real_noise, n = 55, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 55, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 55, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 56, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 56
+PASS: gsl_fft_complex_forward with signal_noise, n = 56, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 56, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 56, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 56, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 56, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 56, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 56, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 56
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 56, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 56, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 56, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 56, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 56, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 56, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 56, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 56
+. 0 10011AD0 76
+. 7C 1D 41 D6 81 81 00 2C 54 EA 18 38 7D 68 62 14 39 4A 00 08 7D 38 39 D6 54 00 18 38 7C 1F 04 AE 7D 08 2A 14 7C E7 8A 14 7D 7D 59 D6 55 29 18 38 7C 09 CD AE 55 6B 18 38 7D 4A C1 D6 7C 0B FC AE FC 00 00 50 7C 0A CD AE 42 00 FF B8
+
+PASS: gsl_fft_real with signal_real_noise, n = 56, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 56, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 56, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 56, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 56
+. 0 10013AFC 76
+. 7C 1F 41 D6 81 81 00 2C 54 EA 10 3A 7D 68 62 14 39 4A 00 04 7D 38 39 D6 54 00 10 3A 7C 1D 04 2E 7D 08 22 14 7C E7 8A 14 7D 7F 59 D6 55 29 10 3A 7C 09 CD 2E 55 6B 10 3A 7D 4A C1 D6 7C 0B EC 2E FC 00 00 50 7C 0A CD 2E 42 00 FF B8
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 56, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 56, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 56, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 56, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 56
+PASS: gsl_fft_complex_forward with signal_noise, n = 56, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 56, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 56, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 56, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 56, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 56, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 56, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 56, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 56, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 56, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 56
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 56, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 56, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 56, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 56, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 56, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 56, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 56, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 56, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 56, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 56, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 56
+PASS: gsl_fft_real with signal_real_noise, n = 56, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 56, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 56, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 56, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 56
+PASS: gsl_fft_real_float with signal_real_noise, n = 56, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 56, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 56, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 56, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 56
+PASS: gsl_fft_complex_forward with signal_noise, n = 56, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 56, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 56, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 56, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 56, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 56, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 56, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 56, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 56, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 56, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 56
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 56, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 56, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 56, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 56, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 56, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 56, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 56, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 56, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 56, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 56, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 56
+PASS: gsl_fft_real with signal_real_noise, n = 56, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 56, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 56, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 56, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 56
+PASS: gsl_fft_real_float with signal_real_noise, n = 56, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 56, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 56, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 57, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 57
+PASS: gsl_fft_complex_forward with signal_noise, n = 57, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 57, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 57, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 57, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 57, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 57, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 57, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 57
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 57, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 57, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 57, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 57, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 57, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 57, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 57, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 57
+PASS: gsl_fft_real with signal_real_noise, n = 57, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 57, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 57, stride = 1
+. 0 FEF19B8 12
+. 7F A0 F8 28 7C 00 F9 2D 40 A2 FF F8
+
+PASS: gsl_fft_real_wavetable_float_alloc, n = 57, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 57
+PASS: gsl_fft_real_float with signal_real_noise, n = 57, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 57, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 57, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 57, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 57
+PASS: gsl_fft_complex_forward with signal_noise, n = 57, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 57, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 57, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 57, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 57, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 57, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 57, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 57, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 57, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 57, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 57
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 57, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 57, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 57, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 57, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 57, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 57, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 57, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 57, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 57, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 57, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 57
+PASS: gsl_fft_real with signal_real_noise, n = 57, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 57, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 57, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 57, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 57
+PASS: gsl_fft_real_float with signal_real_noise, n = 57, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 57, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 57, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 57, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 57
+PASS: gsl_fft_complex_forward with signal_noise, n = 57, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 57, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 57, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 57, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 57, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 57, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 57, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 57, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 57, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 57, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 57
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 57, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 57, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 57, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 57, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 57, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 57, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 57, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 57, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 57, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 57, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 57
+PASS: gsl_fft_real with signal_real_noise, n = 57, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 57, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 57, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 57, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 57
+PASS: gsl_fft_real_float with signal_real_noise, n = 57, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 57, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 57, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 58, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 58
+PASS: gsl_fft_complex_forward with signal_noise, n = 58, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 58, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 58, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 58, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 58, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 58, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 58, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 58
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 58, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 58, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 58, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 58, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 58, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 58, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 58, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 58
+PASS: gsl_fft_real with signal_real_noise, n = 58, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 58, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 58, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 58, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 58
+PASS: gsl_fft_real_float with signal_real_noise, n = 58, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 58, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 58, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 58, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 58
+PASS: gsl_fft_complex_forward with signal_noise, n = 58, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 58, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 58, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 58, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 58, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 58, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 58, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 58, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 58, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 58, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 58
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 58, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 58, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 58, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 58, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 58, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 58, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 58, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 58, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 58, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 58, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 58
+PASS: gsl_fft_real with signal_real_noise, n = 58, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 58, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 58, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 58, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 58
+PASS: gsl_fft_real_float with signal_real_noise, n = 58, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 58, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 58, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 58, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 58
+PASS: gsl_fft_complex_forward with signal_noise, n = 58, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 58, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 58, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 58, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 58, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 58, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 58, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 58, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 58, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 58, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 58
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 58, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 58, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 58, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 58, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 58, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 58, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 58, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 58, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 58, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 58, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 58
+PASS: gsl_fft_real with signal_real_noise, n = 58, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 58, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 58, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 58, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 58
+PASS: gsl_fft_real_float with signal_real_noise, n = 58, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 58, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 58, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 59, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 59
+PASS: gsl_fft_complex_forward with signal_noise, n = 59, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 59, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 59, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 59, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 59, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 59, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 59, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 59
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 59, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 59, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 59, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 59, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 59, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 59, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 59, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 59
+PASS: gsl_fft_real with signal_real_noise, n = 59, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 59, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 59, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 59, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 59
+PASS: gsl_fft_real_float with signal_real_noise, n = 59, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 59, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 59, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 59, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 59
+PASS: gsl_fft_complex_forward with signal_noise, n = 59, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 59, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 59, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 59, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 59, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 59, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 59, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 59, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 59, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 59, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 59
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 59, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 59, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 59, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 59, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 59, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 59, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 59, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 59, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 59, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 59, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 59
+PASS: gsl_fft_real with signal_real_noise, n = 59, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 59, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 59, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 59, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 59
+PASS: gsl_fft_real_float with signal_real_noise, n = 59, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 59, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 59, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 59, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 59
+PASS: gsl_fft_complex_forward with signal_noise, n = 59, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 59, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 59, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 59, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 59, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 59, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 59, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 59, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 59, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 59, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 59
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 59, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 59, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 59, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 59, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 59, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 59, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 59, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 59, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 59, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 59, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 59
+PASS: gsl_fft_real with signal_real_noise, n = 59, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 59, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 59, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 59, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 59
+PASS: gsl_fft_real_float with signal_real_noise, n = 59, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 59, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 59, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 60, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 60
+PASS: gsl_fft_complex_forward with signal_noise, n = 60, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 60, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 60, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 60, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 60, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 60, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 60, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 60
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 60, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 60, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 60, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 60, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 60, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 60, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 60, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 60
+PASS: gsl_fft_real with signal_real_noise, n = 60, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 60, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 60, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 60, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 60
+PASS: gsl_fft_real_float with signal_real_noise, n = 60, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 60, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 60, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 60, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 60
+PASS: gsl_fft_complex_forward with signal_noise, n = 60, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 60, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 60, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 60, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 60, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 60, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 60, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 60, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 60, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 60, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 60
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 60, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 60, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 60, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 60, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 60, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 60, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 60, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 60, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 60, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 60, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 60
+PASS: gsl_fft_real with signal_real_noise, n = 60, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 60, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 60, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 60, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 60
+PASS: gsl_fft_real_float with signal_real_noise, n = 60, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 60, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 60, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 60, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 60
+PASS: gsl_fft_complex_forward with signal_noise, n = 60, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 60, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 60, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 60, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 60, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 60, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 60, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 60, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 60, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 60, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 60
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 60, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 60, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 60, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 60, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 60, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 60, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 60, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 60, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 60, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 60, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 60
+PASS: gsl_fft_real with signal_real_noise, n = 60, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 60, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 60, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 60, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 60
+PASS: gsl_fft_real_float with signal_real_noise, n = 60, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 60, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 60, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 61, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 61
+PASS: gsl_fft_complex_forward with signal_noise, n = 61, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 61, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 61, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 61, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 61, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 61, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 61, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 61
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 61, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 61, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 61, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 61, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 61, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 61, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 61, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 61
+PASS: gsl_fft_real with signal_real_noise, n = 61, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 61, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 61, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 61, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 61
+PASS: gsl_fft_real_float with signal_real_noise, n = 61, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 61, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 61, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 61, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 61
+PASS: gsl_fft_complex_forward with signal_noise, n = 61, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 61, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 61, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 61, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 61, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 61, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 61, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 61, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 61, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 61, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 61
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 61, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 61, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 61, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 61, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 61, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 61, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 61, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 61, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 61, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 61, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 61
+PASS: gsl_fft_real with signal_real_noise, n = 61, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 61, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 61, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 61, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 61
+PASS: gsl_fft_real_float with signal_real_noise, n = 61, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 61, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 61, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 61, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 61
+PASS: gsl_fft_complex_forward with signal_noise, n = 61, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 61, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 61, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 61, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 61, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 61, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 61, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 61, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 61, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 61, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 61
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 61, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 61, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 61, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 61, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 61, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 61, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 61, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 61, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 61, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 61, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 61
+PASS: gsl_fft_real with signal_real_noise, n = 61, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 61, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 61, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 61, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 61
+PASS: gsl_fft_real_float with signal_real_noise, n = 61, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 61, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 61, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 62, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 62
+PASS: gsl_fft_complex_forward with signal_noise, n = 62, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 62, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 62, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 62, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 62, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 62, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 62, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 62
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 62, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 62, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 62, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 62, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 62, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 62, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 62, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 62
+PASS: gsl_fft_real with signal_real_noise, n = 62, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 62, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 62, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 62, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 62
+PASS: gsl_fft_real_float with signal_real_noise, n = 62, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 62, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 62, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 62, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 62
+PASS: gsl_fft_complex_forward with signal_noise, n = 62, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 62, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 62, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 62, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 62, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 62, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 62, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 62, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 62, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 62, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 62
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 62, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 62, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 62, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 62, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 62, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 62, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 62, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 62, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 62, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 62, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 62
+PASS: gsl_fft_real with signal_real_noise, n = 62, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 62, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 62, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 62, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 62
+PASS: gsl_fft_real_float with signal_real_noise, n = 62, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 62, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 62, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 62, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 62
+PASS: gsl_fft_complex_forward with signal_noise, n = 62, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 62, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 62, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 62, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 62, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 62, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 62, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 62, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 62, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 62, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 62
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 62, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 62, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 62, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 62, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 62, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 62, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 62, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 62, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 62, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 62, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 62
+PASS: gsl_fft_real with signal_real_noise, n = 62, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 62, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 62, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 62, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 62
+PASS: gsl_fft_real_float with signal_real_noise, n = 62, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 62, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 62, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 63, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 63
+PASS: gsl_fft_complex_forward with signal_noise, n = 63, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 63, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 63, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 63, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 63, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 63, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 63, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 63
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 63, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 63, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 63, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 63, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 63, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 63, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 63, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 63
+PASS: gsl_fft_real with signal_real_noise, n = 63, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 63, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 63, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 63, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 63
+PASS: gsl_fft_real_float with signal_real_noise, n = 63, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 63, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 63, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 63, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 63
+PASS: gsl_fft_complex_forward with signal_noise, n = 63, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 63, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 63, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 63, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 63, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 63, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 63, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 63, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 63, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 63, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 63
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 63, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 63, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 63, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 63, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 63, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 63, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 63, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 63, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 63, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 63, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 63
+PASS: gsl_fft_real with signal_real_noise, n = 63, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 63, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 63, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 63, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 63
+PASS: gsl_fft_real_float with signal_real_noise, n = 63, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 63, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 63, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 63, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 63
+PASS: gsl_fft_complex_forward with signal_noise, n = 63, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 63, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 63, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 63, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 63, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 63, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 63, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 63, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 63, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 63, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 63
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 63, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 63, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 63, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 63, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 63, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 63, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 63, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 63, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 63, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 63, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 63
+PASS: gsl_fft_real with signal_real_noise, n = 63, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 63, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 63, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 63, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 63
+PASS: gsl_fft_real_float with signal_real_noise, n = 63, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 63, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 63, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 64, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 64
+PASS: gsl_fft_complex_forward with signal_noise, n = 64, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 64, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 64, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 64, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 64, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 64, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 64, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 64
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 64, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 64, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 64, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 64, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 64, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 64, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 64, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 64
+PASS: gsl_fft_real with signal_real_noise, n = 64, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 64, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 64, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 64, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 64
+PASS: gsl_fft_real_float with signal_real_noise, n = 64, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 64, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 64, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 64, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 64
+PASS: gsl_fft_complex_forward with signal_noise, n = 64, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 64, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 64, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 64, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 64, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 64, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 64, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 64, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 64, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 64, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 64
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 64, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 64, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 64, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 64, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 64, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 64, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 64, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 64, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 64, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 64, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 64
+PASS: gsl_fft_real with signal_real_noise, n = 64, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 64, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 64, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 64, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 64
+PASS: gsl_fft_real_float with signal_real_noise, n = 64, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 64, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 64, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 64, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 64
+PASS: gsl_fft_complex_forward with signal_noise, n = 64, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 64, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 64, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 64, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 64, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 64, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 64, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 64, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 64, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 64, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 64
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 64, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 64, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 64, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 64, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 64, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 64, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 64, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 64, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 64, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 64, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 64
+PASS: gsl_fft_real with signal_real_noise, n = 64, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 64, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 64, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 64, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 64
+PASS: gsl_fft_real_float with signal_real_noise, n = 64, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 64, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 64, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 65, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 65
+PASS: gsl_fft_complex_forward with signal_noise, n = 65, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 65, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 65, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 65, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 65, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 65, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 65, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 65
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 65, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 65, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 65, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 65, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 65, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 65, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 65, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 65
+PASS: gsl_fft_real with signal_real_noise, n = 65, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 65, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 65, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 65, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 65
+PASS: gsl_fft_real_float with signal_real_noise, n = 65, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 65, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 65, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 65, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 65
+PASS: gsl_fft_complex_forward with signal_noise, n = 65, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 65, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 65, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 65, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 65, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 65, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 65, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 65, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 65, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 65, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 65
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 65, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 65, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 65, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 65, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 65, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 65, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 65, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 65, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 65, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 65, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 65
+PASS: gsl_fft_real with signal_real_noise, n = 65, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 65, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 65, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 65, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 65
+PASS: gsl_fft_real_float with signal_real_noise, n = 65, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 65, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 65, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 65, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 65
+PASS: gsl_fft_complex_forward with signal_noise, n = 65, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 65, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 65, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 65, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 65, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 65, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 65, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 65, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 65, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 65, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 65
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 65, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 65, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 65, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 65, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 65, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 65, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 65, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 65, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 65, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 65, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 65
+PASS: gsl_fft_real with signal_real_noise, n = 65, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 65, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 65, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 65, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 65
+PASS: gsl_fft_real_float with signal_real_noise, n = 65, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 65, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 65, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 66, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 66
+PASS: gsl_fft_complex_forward with signal_noise, n = 66, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 66, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 66, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 66, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 66, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 66, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 66, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 66
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 66, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 66, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 66, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 66, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 66, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 66, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 66, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 66
+PASS: gsl_fft_real with signal_real_noise, n = 66, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 66, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 66, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 66, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 66
+PASS: gsl_fft_real_float with signal_real_noise, n = 66, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 66, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 66, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 66, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 66
+PASS: gsl_fft_complex_forward with signal_noise, n = 66, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 66, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 66, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 66, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 66, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 66, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 66, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 66, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 66, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 66, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 66
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 66, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 66, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 66, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 66, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 66, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 66, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 66, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 66, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 66, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 66, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 66
+PASS: gsl_fft_real with signal_real_noise, n = 66, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 66, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 66, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 66, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 66
+PASS: gsl_fft_real_float with signal_real_noise, n = 66, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 66, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 66, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 66, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 66
+PASS: gsl_fft_complex_forward with signal_noise, n = 66, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 66, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 66, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 66, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 66, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 66, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 66, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 66, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 66, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 66, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 66
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 66, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 66, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 66, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 66, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 66, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 66, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 66, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 66, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 66, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 66, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 66
+PASS: gsl_fft_real with signal_real_noise, n = 66, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 66, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 66, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 66, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 66
+PASS: gsl_fft_real_float with signal_real_noise, n = 66, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 66, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 66, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 67, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 67
+PASS: gsl_fft_complex_forward with signal_noise, n = 67, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 67, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 67, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 67, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 67, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 67, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 67, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 67
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 67, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 67, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 67, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 67, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 67, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 67, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 67, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 67
+PASS: gsl_fft_real with signal_real_noise, n = 67, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 67, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 67, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 67, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 67
+PASS: gsl_fft_real_float with signal_real_noise, n = 67, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 67, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 67, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 67, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 67
+PASS: gsl_fft_complex_forward with signal_noise, n = 67, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 67, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 67, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 67, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 67, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 67, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 67, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 67, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 67, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 67, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 67
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 67, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 67, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 67, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 67, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 67, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 67, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 67, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 67, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 67, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 67, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 67
+PASS: gsl_fft_real with signal_real_noise, n = 67, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 67, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 67, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 67, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 67
+PASS: gsl_fft_real_float with signal_real_noise, n = 67, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 67, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 67, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 67, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 67
+PASS: gsl_fft_complex_forward with signal_noise, n = 67, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 67, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 67, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 67, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 67, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 67, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 67, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 67, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 67, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 67, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 67
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 67, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 67, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 67, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 67, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 67, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 67, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 67, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 67, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 67, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 67, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 67
+PASS: gsl_fft_real with signal_real_noise, n = 67, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 67, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 67, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 67, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 67
+PASS: gsl_fft_real_float with signal_real_noise, n = 67, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 67, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 67, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 68, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 68
+PASS: gsl_fft_complex_forward with signal_noise, n = 68, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 68, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 68, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 68, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 68, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 68, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 68, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 68
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 68, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 68, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 68, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 68, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 68, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 68, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 68, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 68
+PASS: gsl_fft_real with signal_real_noise, n = 68, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 68, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 68, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 68, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 68
+PASS: gsl_fft_real_float with signal_real_noise, n = 68, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 68, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 68, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 68, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 68
+PASS: gsl_fft_complex_forward with signal_noise, n = 68, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 68, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 68, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 68, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 68, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 68, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 68, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 68, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 68, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 68, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 68
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 68, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 68, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 68, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 68, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 68, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 68, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 68, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 68, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 68, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 68, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 68
+PASS: gsl_fft_real with signal_real_noise, n = 68, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 68, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 68, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 68, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 68
+PASS: gsl_fft_real_float with signal_real_noise, n = 68, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 68, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 68, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 68, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 68
+PASS: gsl_fft_complex_forward with signal_noise, n = 68, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 68, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 68, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 68, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 68, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 68, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 68, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 68, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 68, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 68, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 68
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 68, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 68, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 68, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 68, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 68, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 68, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 68, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 68, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 68, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 68, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 68
+PASS: gsl_fft_real with signal_real_noise, n = 68, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 68, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 68, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 68, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 68
+PASS: gsl_fft_real_float with signal_real_noise, n = 68, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 68, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 68, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 69, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 69
+PASS: gsl_fft_complex_forward with signal_noise, n = 69, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 69, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 69, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 69, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 69, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 69, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 69, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 69
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 69, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 69, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 69, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 69, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 69, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 69, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 69, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 69
+PASS: gsl_fft_real with signal_real_noise, n = 69, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 69, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 69, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 69, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 69
+PASS: gsl_fft_real_float with signal_real_noise, n = 69, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 69, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 69, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 69, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 69
+PASS: gsl_fft_complex_forward with signal_noise, n = 69, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 69, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 69, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 69, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 69, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 69, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 69, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 69, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 69, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 69, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 69
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 69, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 69, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 69, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 69, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 69, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 69, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 69, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 69, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 69, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 69, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 69
+PASS: gsl_fft_real with signal_real_noise, n = 69, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 69, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 69, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 69, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 69
+PASS: gsl_fft_real_float with signal_real_noise, n = 69, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 69, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 69, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 69, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 69
+PASS: gsl_fft_complex_forward with signal_noise, n = 69, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 69, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 69, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 69, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 69, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 69, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 69, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 69, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 69, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 69, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 69
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 69, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 69, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 69, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 69, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 69, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 69, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 69, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 69, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 69, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 69, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 69
+PASS: gsl_fft_real with signal_real_noise, n = 69, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 69, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 69, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 69, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 69
+PASS: gsl_fft_real_float with signal_real_noise, n = 69, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 69, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 69, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 70, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 70
+PASS: gsl_fft_complex_forward with signal_noise, n = 70, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 70, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 70, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 70, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 70, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 70, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 70, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 70
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 70, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 70, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 70, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 70, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 70, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 70, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 70, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 70
+PASS: gsl_fft_real with signal_real_noise, n = 70, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 70, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 70, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 70, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 70
+PASS: gsl_fft_real_float with signal_real_noise, n = 70, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 70, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 70, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 70, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 70
+PASS: gsl_fft_complex_forward with signal_noise, n = 70, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 70, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 70, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 70, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 70, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 70, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 70, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 70, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 70, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 70, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 70
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 70, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 70, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 70, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 70, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 70, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 70, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 70, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 70, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 70, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 70, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 70
+PASS: gsl_fft_real with signal_real_noise, n = 70, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 70, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 70, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 70, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 70
+PASS: gsl_fft_real_float with signal_real_noise, n = 70, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 70, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 70, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 70, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 70
+PASS: gsl_fft_complex_forward with signal_noise, n = 70, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 70, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 70, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 70, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 70, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 70, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 70, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 70, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 70, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 70, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 70
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 70, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 70, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 70, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 70, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 70, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 70, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 70, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 70, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 70, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 70, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 70
+PASS: gsl_fft_real with signal_real_noise, n = 70, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 70, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 70, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 70, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 70
+PASS: gsl_fft_real_float with signal_real_noise, n = 70, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 70, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 70, stride = 3
+. 0 FE0D5E8 240
+. C8 0A 00 00 C9 3D 00 00 FD 00 38 28 FD 40 48 50 FC 68 00 28 D9 01 00 30 81 41 00 30 81 61 00 34 FC 83 38 2A FC 40 20 50 FD 22 00 B2 C8 E5 00 00 CB C6 00 00 55 6B 28 34 CB 87 00 00 7C AB 42 14 80 FE 0F 84 FF A9 3F BA C8 83 00 00 CB 47 00 00 C8 C4 00 00 FF 62 D0 2A C8 65 00 08 FD 7D E2 7A 7F AB 44 AE 80 7E 0F 88 FD 9D D0 2A FD 1B D0 28 FC 2B 02 72 C9 65 00 18 FF CC D0 28 FC 02 40 28 FD A2 0A BA C8 25 00 10 FC E0 50 2A FC BD F0 28 FF 81 03 72 FF 69 21 BA FF 42 02 72 FC 9E 02 32 FD 45 18 2A FD 9E 01 F2 FC 0B E0 28 FD 3A 06 F2 CB 43 00 00 FC 6A 00 B2 FF 81 20 28 FD A0 60 28 FC BD 02 72 FF C1 E0 28 FC CD 18 28 FC FE 20 28 FC 46 28 28 FF 62 38 2A FC 3C D8 2A FD 7C 08 28 FF BB 58 2A FD 5D 0E BA FE 0A 08 00 41 92 00 68
+
+PASS: gsl_fft_complex_wavetable_alloc, n = 71, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 71
+PASS: gsl_fft_complex_forward with signal_noise, n = 71, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 71, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 71, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 71, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 71, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 71, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 71, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 71
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 71, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 71, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 71, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 71, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 71, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 71, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 71, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 71
+PASS: gsl_fft_real with signal_real_noise, n = 71, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 71, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 71, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 71, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 71
+PASS: gsl_fft_real_float with signal_real_noise, n = 71, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 71, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 71, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 71, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 71
+PASS: gsl_fft_complex_forward with signal_noise, n = 71, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 71, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 71, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 71, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 71, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 71, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 71, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 71, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 71, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 71, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 71
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 71, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 71, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 71, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 71, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 71, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 71, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 71, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 71, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 71, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 71, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 71
+PASS: gsl_fft_real with signal_real_noise, n = 71, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 71, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 71, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 71, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 71
+PASS: gsl_fft_real_float with signal_real_noise, n = 71, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 71, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 71, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 71, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 71
+PASS: gsl_fft_complex_forward with signal_noise, n = 71, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 71, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 71, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 71, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 71, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 71, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 71, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 71, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 71, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 71, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 71
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 71, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 71, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 71, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 71, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 71, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 71, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 71, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 71, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 71, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 71, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 71
+PASS: gsl_fft_real with signal_real_noise, n = 71, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 71, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 71, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 71, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 71
+PASS: gsl_fft_real_float with signal_real_noise, n = 71, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 71, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 71, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 72, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 72
+PASS: gsl_fft_complex_forward with signal_noise, n = 72, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 72, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 72, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 72, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 72, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 72, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 72, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 72
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 72, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 72, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 72, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 72, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 72, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 72, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 72, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 72
+PASS: gsl_fft_real with signal_real_noise, n = 72, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 72, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 72, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 72, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 72
+PASS: gsl_fft_real_float with signal_real_noise, n = 72, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 72, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 72, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 72, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 72
+PASS: gsl_fft_complex_forward with signal_noise, n = 72, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 72, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 72, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 72, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 72, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 72, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 72, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 72, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 72, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 72, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 72
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 72, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 72, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 72, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 72, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 72, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 72, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 72, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 72, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 72, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 72, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 72
+PASS: gsl_fft_real with signal_real_noise, n = 72, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 72, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 72, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 72, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 72
+PASS: gsl_fft_real_float with signal_real_noise, n = 72, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 72, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 72, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 72, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 72
+PASS: gsl_fft_complex_forward with signal_noise, n = 72, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 72, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 72, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 72, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 72, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 72, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 72, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 72, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 72, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 72, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 72
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 72, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 72, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 72, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 72, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 72, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 72, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 72, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 72, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 72, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 72, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 72
+PASS: gsl_fft_real with signal_real_noise, n = 72, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 72, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 72, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 72, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 72
+PASS: gsl_fft_real_float with signal_real_noise, n = 72, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 72, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 72, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 73, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 73
+PASS: gsl_fft_complex_forward with signal_noise, n = 73, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 73, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 73, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 73, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 73, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 73, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 73, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 73
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 73, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 73, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 73, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 73, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 73, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 73, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 73, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 73
+PASS: gsl_fft_real with signal_real_noise, n = 73, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 73, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 73, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 73, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 73
+PASS: gsl_fft_real_float with signal_real_noise, n = 73, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 73, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 73, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 73, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 73
+PASS: gsl_fft_complex_forward with signal_noise, n = 73, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 73, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 73, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 73, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 73, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 73, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 73, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 73, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 73, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 73, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 73
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 73, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 73, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 73, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 73, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 73, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 73, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 73, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 73, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 73, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 73, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 73
+PASS: gsl_fft_real with signal_real_noise, n = 73, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 73, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 73, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 73, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 73
+PASS: gsl_fft_real_float with signal_real_noise, n = 73, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 73, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 73, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 73, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 73
+PASS: gsl_fft_complex_forward with signal_noise, n = 73, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 73, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 73, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 73, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 73, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 73, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 73, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 73, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 73, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 73, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 73
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 73, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 73, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 73, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 73, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 73, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 73, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 73, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 73, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 73, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 73, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 73
+PASS: gsl_fft_real with signal_real_noise, n = 73, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 73, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 73, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 73, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 73
+PASS: gsl_fft_real_float with signal_real_noise, n = 73, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 73, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 73, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 74, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 74
+PASS: gsl_fft_complex_forward with signal_noise, n = 74, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 74, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 74, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 74, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 74, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 74, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 74, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 74
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 74, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 74, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 74, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 74, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 74, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 74, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 74, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 74
+PASS: gsl_fft_real with signal_real_noise, n = 74, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 74, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 74, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 74, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 74
+PASS: gsl_fft_real_float with signal_real_noise, n = 74, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 74, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 74, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 74, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 74
+PASS: gsl_fft_complex_forward with signal_noise, n = 74, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 74, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 74, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 74, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 74, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 74, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 74, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 74, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 74, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 74, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 74
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 74, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 74, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 74, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 74, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 74, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 74, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 74, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 74, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 74, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 74, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 74
+PASS: gsl_fft_real with signal_real_noise, n = 74, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 74, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 74, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 74, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 74
+PASS: gsl_fft_real_float with signal_real_noise, n = 74, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 74, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 74, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 74, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 74
+PASS: gsl_fft_complex_forward with signal_noise, n = 74, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 74, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 74, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 74, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 74, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 74, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 74, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 74, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 74, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 74, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 74
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 74, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 74, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 74, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 74, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 74, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 74, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 74, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 74, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 74, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 74, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 74
+PASS: gsl_fft_real with signal_real_noise, n = 74, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 74, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 74, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 74, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 74
+PASS: gsl_fft_real_float with signal_real_noise, n = 74, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 74, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 74, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 75, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 75
+PASS: gsl_fft_complex_forward with signal_noise, n = 75, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 75, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 75, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 75, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 75, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 75, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 75, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 75
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 75, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 75, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 75, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 75, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 75, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 75, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 75, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 75
+PASS: gsl_fft_real with signal_real_noise, n = 75, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 75, stride = 1
+. 0 1000DBC8 400
+. 1C F5 00 05 7C 7F CA 14 7E B5 DA 14 7D 76 38 50 7C E7 B2 14 7D 6B C2 14 38 E7 FF FF 39 6B FF FF 7C 18 3A 14 7C D8 5A 14 55 6A 18 38 54 C9 18 38 39 4A 00 08 39 29 00 08 7D 18 02 14 7D 29 E1 D6 54 05 18 38 55 04 18 38 38 A5 00 08 38 84 00 08 7D 4A E1 D6 7D 09 EC AE 54 E9 18 38 FD 00 40 50 39 29 00 08 7C 1C 01 D6 7C 8A EC AE 7D 43 CA 14 FC 80 20 50 7D 1C 41 D6 54 00 18 38 7C FD 04 AE 7C 0A CA 14 7C DC 31 D6 55 08 18 38 7D 48 EC AE 7D 00 CA 14 7D 7C 59 D6 54 C6 18 38 7C A6 EC AE 55 46 18 38 38 C6 00 08 FC CA 28 2A 7C A5 E1 D6 55 6B 18 38 7C 6B EC AE FD 4A 28 28 57 EB 18 38 FD A7 18 2A 39 6B 00 08 7C 84 E1 D6 7D 65 EC AE FC B9 02 B2 54 05 18 38 38 A5 00 08 FD 8B 20 2A 7C 04 EC AE FF 6D 30 2A 7C FC 39 D6 FD AD 30 28 FD 20 40 2A 55 04 18 38 FC 00 40 28 38 84 00 08 FD 1B 03 B2 7D 29 E1 D6 54 E7 18 38 FF 4C 48 2A 7C 47 EC AE FD 8C 48 28 54 67 18 38 FC D9 00 32 38 E7 00 08 7C 29 EC AE 7C 77 19 D6 FD 3A 03 B2 FD 58 02 B2 7D 37 F9 D6 54 63 18 38 FC 18 00 32 7F FF DA 14 FC E7 18 28 FD 6B 20 28 7D 57 51 D6 FD AD 03 F2 55 29 18 38 FD 8C 03 F2 7C 17 01 D6 55 4A 18 38 FD 02 40 28 FD 21 48 28 FC B8 29 F8 7D 17 41 D6 54 00 18 38 FC D8 32 F8 FC F9 51 FA 7D 6B B9 D6 55 08 18 38 FD 79 02 FA FD 49 60 28
+
+. 0 1000DD58 176
+. FC 08 68 28 7C E7 B9 D6 FD 08 68 2A FD 29 60 2A FD A0 30 2A FD 8A 28 28 7C C6 B9 D6 FC 88 58 2A FC 69 38 28 FD 08 58 28 FD 29 38 2A 7C A5 B9 D6 FC 00 30 28 FD 4A 28 2A FF F6 02 32 7C 84 B9 D6 FF D4 00 32 FF B2 03 72 FF 90 01 32 FD 76 02 72 FC F4 02 B2 FC D2 03 32 FC B0 00 F2 FD 37 FA 7A FD 55 F2 BA FD 93 EB 3A FC 71 E0 FA FD 17 5A 38 FC 15 38 38 FD B3 33 78 FC 91 29 38 FC 42 D8 2A FC 21 D0 2A 7C 49 D5 AE 7C 2B D5 AE 7D 03 D5 AE 7D 27 D5 AE 7C 0A D5 AE 7D 46 D5 AE 7D BA 05 AE 7D 85 D5 AE 7C 88 D5 AE 7C 64 D5 AE 42 00 FD C4
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 75, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 75, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 75
+PASS: gsl_fft_real_float with signal_real_noise, n = 75, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 75, stride = 1
+. 0 1000FDC4 400
+. 1C F4 00 05 7F B9 C2 14 7C 7D C2 14 7E 94 DA 14 7D 75 38 50 7C E7 AA 14 7D 6B B2 14 38 E7 FF FF 39 6B FF FF 7C 16 3A 14 7C D6 5A 14 55 6A 10 3A 54 C9 10 3A 39 4A 00 04 39 29 00 04 7D 16 02 14 7D 29 E1 D6 54 05 10 3A 55 04 10 3A 38 A5 00 04 38 84 00 04 7D 4A E1 D6 7C 89 FC 2E 54 E9 10 3A FC 80 20 50 39 29 00 04 7C 1C 01 D6 7C 6A FC 2E FC 60 18 50 7D 1C 41 D6 54 00 10 3A 7C BF 04 2E 7C DC 31 D6 55 08 10 3A 7C C8 FC 2E 7D 7C 59 D6 54 C6 10 3A 7F E6 FC 2E 57 A6 10 3A 38 C6 00 04 ED 66 F8 2A 7C A5 E1 D6 55 6B 10 3A 7F CB FC 2E EC C6 F8 28 7D 63 C2 14 EC 05 F0 2A 55 6A 10 3A 7C 84 E1 D6 7C E5 FC 2E EC A5 F0 28 54 65 10 3A ED A7 18 2A 38 A5 00 04 EF 60 58 2A 39 4A 00 04 7D 04 FC 2E 7C FC 39 D6 EC 00 58 28 ED 88 20 2A FD 40 D8 90 7D 29 E1 D6 54 E7 10 3A EF 4D 60 2A 7C 47 FC 2E ED AD 60 28 7C EB C2 14 FD 4A 03 B2 54 E8 10 3A 7C 29 FC 2E 57 29 10 3A FD 20 D0 90 7C 17 C9 D6 39 29 00 04 39 08 00 04 FD 29 03 B2 7F 39 DA 14 7F B7 E9 D6 54 00 10 3A FD 80 10 90 FD 60 08 90 FC 00 03 F2 7C 77 19 D6 57 BD 10 3A FD AD 03 F2 ED 08 20 28 FD 8C 50 28 7D 77 59 D6 FD 6B 48 28 54 63 10 3A EC E7 18 28 FC 00 00 18 FD A0 68 18 7C F7 39 D6 FD 80 60 18 55 6B 10 3A FD 60 58 18 ED 39 01 B2 ED 59 02 32 7D 29 B9 D6
+
+. 0 1000FF54 208
+. EC D8 01 B2 54 E7 10 3A ED 18 02 32 ED 38 49 78 ED 58 51 F8 7C C6 B9 D6 EC 8C 00 28 EC 6B 68 28 EC B9 31 7A EC F9 41 FA 7C A5 B9 D6 ED 8C 00 2A ED 6B 68 2A EC 04 50 2A ED A3 48 28 7D 4A B9 D6 ED 0C 38 2A EC CB 28 28 ED 8C 38 28 ED 6B 28 2A 7D 08 B9 D6 EC 84 50 28 EC 63 48 2A ED 56 03 32 ED 34 01 32 EC F2 00 32 EC B0 02 32 EF F6 02 F2 EF D4 00 F2 EF B2 03 72 EF 90 01 B2 EC 42 D8 2A EC 21 D0 2A ED 77 52 FA EC 75 48 FA 7C 5A 05 2E ED B3 3B 7A 7C 29 D5 2E EC D1 29 BA ED 97 FB 38 EC 95 F1 38 EC 13 E8 38 ED 11 E2 38 7D 9D D5 2E 7D 66 D5 2E 7C 83 D5 2E 7C 65 D5 2E 7C 0B D5 2E 7D AA D5 2E 7D 07 D5 2E 7C C8 D5 2E 42 00 FD A4
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 75, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 75, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 75
+PASS: gsl_fft_complex_forward with signal_noise, n = 75, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 75, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 75, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 75, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 75, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 75, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 75, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 75, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 75, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 75, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 75
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 75, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 75, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 75, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 75, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 75, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 75, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 75, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 75, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 75, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 75, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 75
+PASS: gsl_fft_real with signal_real_noise, n = 75, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 75, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 75, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 75, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 75
+PASS: gsl_fft_real_float with signal_real_noise, n = 75, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 75, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 75, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 75, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 75
+PASS: gsl_fft_complex_forward with signal_noise, n = 75, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 75, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 75, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 75, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 75, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 75, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 75, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 75, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 75, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 75, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 75
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 75, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 75, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 75, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 75, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 75, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 75, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 75, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 75, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 75, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 75, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 75
+PASS: gsl_fft_real with signal_real_noise, n = 75, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 75, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 75, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 75, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 75
+PASS: gsl_fft_real_float with signal_real_noise, n = 75, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 75, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 75, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 76, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 76
+PASS: gsl_fft_complex_forward with signal_noise, n = 76, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 76, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 76, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 76, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 76, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 76, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 76, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 76
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 76, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 76, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 76, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 76, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 76, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 76, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 76, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 76
+PASS: gsl_fft_real with signal_real_noise, n = 76, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 76, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 76, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 76, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 76
+PASS: gsl_fft_real_float with signal_real_noise, n = 76, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 76, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 76, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 76, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 76
+PASS: gsl_fft_complex_forward with signal_noise, n = 76, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 76, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 76, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 76, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 76, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 76, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 76, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 76, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 76, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 76, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 76
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 76, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 76, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 76, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 76, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 76, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 76, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 76, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 76, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 76, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 76, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 76
+PASS: gsl_fft_real with signal_real_noise, n = 76, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 76, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 76, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 76, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 76
+PASS: gsl_fft_real_float with signal_real_noise, n = 76, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 76, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 76, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 76, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 76
+PASS: gsl_fft_complex_forward with signal_noise, n = 76, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 76, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 76, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 76, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 76, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 76, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 76, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 76, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 76, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 76, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 76
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 76, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 76, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 76, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 76, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 76, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 76, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 76, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 76, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 76, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 76, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 76
+PASS: gsl_fft_real with signal_real_noise, n = 76, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 76, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 76, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 76, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 76
+PASS: gsl_fft_real_float with signal_real_noise, n = 76, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 76, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 76, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 77, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 77
+PASS: gsl_fft_complex_forward with signal_noise, n = 77, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 77, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 77, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 77, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 77, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 77, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 77, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 77
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 77, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 77, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 77, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 77, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 77, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 77, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 77, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 77
+PASS: gsl_fft_real with signal_real_noise, n = 77, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 77, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 77, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 77, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 77
+PASS: gsl_fft_real_float with signal_real_noise, n = 77, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 77, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 77, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 77, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 77
+PASS: gsl_fft_complex_forward with signal_noise, n = 77, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 77, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 77, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 77, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 77, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 77, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 77, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 77, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 77, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 77, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 77
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 77, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 77, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 77, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 77, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 77, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 77, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 77, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 77, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 77, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 77, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 77
+PASS: gsl_fft_real with signal_real_noise, n = 77, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 77, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 77, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 77, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 77
+PASS: gsl_fft_real_float with signal_real_noise, n = 77, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 77, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 77, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 77, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 77
+PASS: gsl_fft_complex_forward with signal_noise, n = 77, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 77, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 77, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 77, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 77, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 77, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 77, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 77, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 77, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 77, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 77
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 77, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 77, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 77, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 77, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 77, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 77, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 77, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 77, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 77, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 77, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 77
+PASS: gsl_fft_real with signal_real_noise, n = 77, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 77, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 77, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 77, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 77
+PASS: gsl_fft_real_float with signal_real_noise, n = 77, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 77, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 77, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 78, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 78
+PASS: gsl_fft_complex_forward with signal_noise, n = 78, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 78, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 78, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 78, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 78, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 78, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 78, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 78
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 78, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 78, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 78, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 78, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 78, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 78, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 78, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 78
+PASS: gsl_fft_real with signal_real_noise, n = 78, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 78, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 78, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 78, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 78
+PASS: gsl_fft_real_float with signal_real_noise, n = 78, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 78, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 78, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 78, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 78
+PASS: gsl_fft_complex_forward with signal_noise, n = 78, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 78, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 78, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 78, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 78, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 78, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 78, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 78, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 78, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 78, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 78
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 78, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 78, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 78, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 78, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 78, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 78, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 78, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 78, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 78, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 78, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 78
+PASS: gsl_fft_real with signal_real_noise, n = 78, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 78, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 78, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 78, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 78
+PASS: gsl_fft_real_float with signal_real_noise, n = 78, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 78, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 78, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 78, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 78
+PASS: gsl_fft_complex_forward with signal_noise, n = 78, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 78, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 78, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 78, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 78, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 78, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 78, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 78, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 78, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 78, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 78
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 78, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 78, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 78, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 78, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 78, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 78, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 78, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 78, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 78, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 78, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 78
+PASS: gsl_fft_real with signal_real_noise, n = 78, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 78, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 78, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 78, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 78
+PASS: gsl_fft_real_float with signal_real_noise, n = 78, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 78, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 78, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 79, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 79
+PASS: gsl_fft_complex_forward with signal_noise, n = 79, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 79, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 79, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 79, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 79, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 79, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 79, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 79
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 79, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 79, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 79, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 79, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 79, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 79, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 79, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 79
+PASS: gsl_fft_real with signal_real_noise, n = 79, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 79, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 79, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 79, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 79
+PASS: gsl_fft_real_float with signal_real_noise, n = 79, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 79, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 79, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 79, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 79
+PASS: gsl_fft_complex_forward with signal_noise, n = 79, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 79, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 79, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 79, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 79, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 79, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 79, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 79, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 79, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 79, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 79
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 79, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 79, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 79, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 79, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 79, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 79, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 79, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 79, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 79, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 79, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 79
+PASS: gsl_fft_real with signal_real_noise, n = 79, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 79, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 79, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 79, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 79
+PASS: gsl_fft_real_float with signal_real_noise, n = 79, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 79, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 79, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 79, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 79
+PASS: gsl_fft_complex_forward with signal_noise, n = 79, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 79, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 79, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 79, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 79, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 79, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 79, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 79, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 79, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 79, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 79
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 79, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 79, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 79, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 79, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 79, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 79, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 79, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 79, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 79, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 79, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 79
+PASS: gsl_fft_real with signal_real_noise, n = 79, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 79, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 79, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 79, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 79
+PASS: gsl_fft_real_float with signal_real_noise, n = 79, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 79, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 79, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 80, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 80
+PASS: gsl_fft_complex_forward with signal_noise, n = 80, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 80, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 80, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 80, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 80, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 80, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 80, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 80
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 80, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 80, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 80, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 80, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 80, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 80, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 80, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 80
+PASS: gsl_fft_real with signal_real_noise, n = 80, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 80, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 80, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 80, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 80
+PASS: gsl_fft_real_float with signal_real_noise, n = 80, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 80, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 80, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 80, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 80
+PASS: gsl_fft_complex_forward with signal_noise, n = 80, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 80, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 80, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 80, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 80, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 80, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 80, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 80, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 80, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 80, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 80
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 80, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 80, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 80, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 80, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 80, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 80, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 80, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 80, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 80, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 80, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 80
+PASS: gsl_fft_real with signal_real_noise, n = 80, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 80, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 80, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 80, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 80
+PASS: gsl_fft_real_float with signal_real_noise, n = 80, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 80, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 80, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 80, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 80
+PASS: gsl_fft_complex_forward with signal_noise, n = 80, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 80, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 80, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 80, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 80, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 80, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 80, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 80, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 80, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 80, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 80
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 80, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 80, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 80, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 80, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 80, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 80, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 80, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 80, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 80, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 80, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 80
+PASS: gsl_fft_real with signal_real_noise, n = 80, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 80, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 80, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 80, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 80
+PASS: gsl_fft_real_float with signal_real_noise, n = 80, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 80, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 80, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 81, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 81
+PASS: gsl_fft_complex_forward with signal_noise, n = 81, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 81, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 81, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 81, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 81, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 81, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 81, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 81
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 81, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 81, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 81, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 81, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 81, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 81, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 81, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 81
+PASS: gsl_fft_real with signal_real_noise, n = 81, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 81, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 81, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 81, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 81
+PASS: gsl_fft_real_float with signal_real_noise, n = 81, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 81, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 81, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 81, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 81
+PASS: gsl_fft_complex_forward with signal_noise, n = 81, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 81, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 81, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 81, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 81, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 81, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 81, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 81, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 81, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 81, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 81
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 81, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 81, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 81, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 81, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 81, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 81, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 81, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 81, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 81, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 81, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 81
+PASS: gsl_fft_real with signal_real_noise, n = 81, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 81, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 81, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 81, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 81
+PASS: gsl_fft_real_float with signal_real_noise, n = 81, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 81, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 81, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 81, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 81
+PASS: gsl_fft_complex_forward with signal_noise, n = 81, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 81, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 81, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 81, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 81, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 81, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 81, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 81, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 81, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 81, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 81
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 81, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 81, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 81, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 81, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 81, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 81, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 81, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 81, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 81, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 81, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 81
+PASS: gsl_fft_real with signal_real_noise, n = 81, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 81, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 81, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 81, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 81
+PASS: gsl_fft_real_float with signal_real_noise, n = 81, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 81, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 81, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 82, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 82
+PASS: gsl_fft_complex_forward with signal_noise, n = 82, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 82, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 82, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 82, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 82, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 82, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 82, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 82
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 82, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 82, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 82, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 82, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 82, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 82, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 82, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 82
+PASS: gsl_fft_real with signal_real_noise, n = 82, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 82, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 82, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 82, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 82
+PASS: gsl_fft_real_float with signal_real_noise, n = 82, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 82, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 82, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 82, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 82
+PASS: gsl_fft_complex_forward with signal_noise, n = 82, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 82, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 82, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 82, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 82, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 82, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 82, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 82, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 82, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 82, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 82
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 82, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 82, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 82, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 82, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 82, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 82, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 82, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 82, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 82, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 82, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 82
+PASS: gsl_fft_real with signal_real_noise, n = 82, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 82, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 82, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 82, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 82
+PASS: gsl_fft_real_float with signal_real_noise, n = 82, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 82, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 82, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 82, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 82
+PASS: gsl_fft_complex_forward with signal_noise, n = 82, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 82, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 82, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 82, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 82, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 82, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 82, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 82, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 82, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 82, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 82
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 82, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 82, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 82, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 82, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 82, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 82, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 82, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 82, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 82, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 82, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 82
+PASS: gsl_fft_real with signal_real_noise, n = 82, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 82, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 82, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 82, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 82
+PASS: gsl_fft_real_float with signal_real_noise, n = 82, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 82, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 82, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 83, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 83
+PASS: gsl_fft_complex_forward with signal_noise, n = 83, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 83, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 83, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 83, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 83, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 83, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 83, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 83
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 83, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 83, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 83, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 83, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 83, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 83, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 83, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 83
+PASS: gsl_fft_real with signal_real_noise, n = 83, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 83, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 83, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 83, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 83
+PASS: gsl_fft_real_float with signal_real_noise, n = 83, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 83, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 83, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 83, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 83
+PASS: gsl_fft_complex_forward with signal_noise, n = 83, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 83, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 83, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 83, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 83, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 83, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 83, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 83, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 83, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 83, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 83
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 83, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 83, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 83, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 83, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 83, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 83, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 83, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 83, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 83, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 83, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 83
+PASS: gsl_fft_real with signal_real_noise, n = 83, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 83, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 83, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 83, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 83
+PASS: gsl_fft_real_float with signal_real_noise, n = 83, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 83, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 83, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 83, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 83
+PASS: gsl_fft_complex_forward with signal_noise, n = 83, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 83, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 83, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 83, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 83, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 83, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 83, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 83, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 83, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 83, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 83
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 83, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 83, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 83, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 83, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 83, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 83, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 83, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 83, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 83, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 83, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 83
+PASS: gsl_fft_real with signal_real_noise, n = 83, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 83, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 83, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 83, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 83
+PASS: gsl_fft_real_float with signal_real_noise, n = 83, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 83, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 83, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 84, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 84
+PASS: gsl_fft_complex_forward with signal_noise, n = 84, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 84, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 84, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 84, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 84, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 84, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 84, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 84
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 84, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 84, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 84, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 84, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 84, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 84, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 84, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 84
+PASS: gsl_fft_real with signal_real_noise, n = 84, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 84, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 84, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 84, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 84
+PASS: gsl_fft_real_float with signal_real_noise, n = 84, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 84, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 84, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 84, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 84
+PASS: gsl_fft_complex_forward with signal_noise, n = 84, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 84, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 84, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 84, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 84, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 84, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 84, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 84, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 84, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 84, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 84
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 84, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 84, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 84, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 84, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 84, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 84, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 84, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 84, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 84, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 84, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 84
+PASS: gsl_fft_real with signal_real_noise, n = 84, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 84, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 84, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 84, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 84
+PASS: gsl_fft_real_float with signal_real_noise, n = 84, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 84, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 84, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 84, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 84
+PASS: gsl_fft_complex_forward with signal_noise, n = 84, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 84, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 84, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 84, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 84, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 84, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 84, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 84, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 84, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 84, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 84
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 84, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 84, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 84, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 84, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 84, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 84, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 84, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 84, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 84, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 84, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 84
+PASS: gsl_fft_real with signal_real_noise, n = 84, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 84, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 84, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 84, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 84
+PASS: gsl_fft_real_float with signal_real_noise, n = 84, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 84, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 84, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 85, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 85
+PASS: gsl_fft_complex_forward with signal_noise, n = 85, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 85, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 85, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 85, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 85, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 85, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 85, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 85
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 85, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 85, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 85, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 85, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 85, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 85, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 85, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 85
+PASS: gsl_fft_real with signal_real_noise, n = 85, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 85, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 85, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 85, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 85
+PASS: gsl_fft_real_float with signal_real_noise, n = 85, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 85, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 85, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 85, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 85
+PASS: gsl_fft_complex_forward with signal_noise, n = 85, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 85, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 85, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 85, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 85, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 85, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 85, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 85, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 85, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 85, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 85
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 85, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 85, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 85, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 85, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 85, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 85, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 85, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 85, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 85, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 85, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 85
+PASS: gsl_fft_real with signal_real_noise, n = 85, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 85, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 85, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 85, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 85
+PASS: gsl_fft_real_float with signal_real_noise, n = 85, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 85, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 85, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 85, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 85
+PASS: gsl_fft_complex_forward with signal_noise, n = 85, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 85, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 85, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 85, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 85, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 85, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 85, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 85, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 85, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 85, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 85
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 85, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 85, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 85, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 85, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 85, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 85, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 85, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 85, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 85, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 85, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 85
+PASS: gsl_fft_real with signal_real_noise, n = 85, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 85, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 85, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 85, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 85
+PASS: gsl_fft_real_float with signal_real_noise, n = 85, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 85, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 85, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 86, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 86
+PASS: gsl_fft_complex_forward with signal_noise, n = 86, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 86, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 86, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 86, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 86, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 86, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 86, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 86
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 86, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 86, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 86, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 86, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 86, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 86, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 86, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 86
+PASS: gsl_fft_real with signal_real_noise, n = 86, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 86, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 86, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 86, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 86
+PASS: gsl_fft_real_float with signal_real_noise, n = 86, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 86, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 86, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 86, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 86
+PASS: gsl_fft_complex_forward with signal_noise, n = 86, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 86, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 86, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 86, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 86, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 86, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 86, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 86, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 86, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 86, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 86
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 86, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 86, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 86, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 86, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 86, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 86, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 86, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 86, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 86, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 86, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 86
+PASS: gsl_fft_real with signal_real_noise, n = 86, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 86, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 86, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 86, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 86
+PASS: gsl_fft_real_float with signal_real_noise, n = 86, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 86, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 86, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 86, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 86
+PASS: gsl_fft_complex_forward with signal_noise, n = 86, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 86, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 86, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 86, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 86, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 86, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 86, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 86, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 86, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 86, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 86
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 86, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 86, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 86, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 86, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 86, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 86, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 86, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 86, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 86, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 86, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 86
+PASS: gsl_fft_real with signal_real_noise, n = 86, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 86, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 86, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 86, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 86
+PASS: gsl_fft_real_float with signal_real_noise, n = 86, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 86, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 86, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 87, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 87
+PASS: gsl_fft_complex_forward with signal_noise, n = 87, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 87, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 87, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 87, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 87, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 87, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 87, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 87
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 87, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 87, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 87, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 87, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 87, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 87, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 87, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 87
+PASS: gsl_fft_real with signal_real_noise, n = 87, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 87, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 87, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 87, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 87
+PASS: gsl_fft_real_float with signal_real_noise, n = 87, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 87, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 87, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 87, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 87
+PASS: gsl_fft_complex_forward with signal_noise, n = 87, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 87, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 87, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 87, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 87, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 87, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 87, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 87, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 87, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 87, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 87
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 87, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 87, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 87, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 87, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 87, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 87, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 87, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 87, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 87, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 87, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 87
+PASS: gsl_fft_real with signal_real_noise, n = 87, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 87, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 87, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 87, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 87
+PASS: gsl_fft_real_float with signal_real_noise, n = 87, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 87, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 87, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 87, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 87
+PASS: gsl_fft_complex_forward with signal_noise, n = 87, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 87, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 87, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 87, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 87, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 87, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 87, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 87, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 87, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 87, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 87
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 87, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 87, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 87, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 87, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 87, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 87, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 87, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 87, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 87, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 87, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 87
+PASS: gsl_fft_real with signal_real_noise, n = 87, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 87, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 87, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 87, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 87
+PASS: gsl_fft_real_float with signal_real_noise, n = 87, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 87, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 87, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 88, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 88
+PASS: gsl_fft_complex_forward with signal_noise, n = 88, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 88, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 88, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 88, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 88, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 88, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 88, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 88
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 88, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 88, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 88, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 88, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 88, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 88, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 88, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 88
+PASS: gsl_fft_real with signal_real_noise, n = 88, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 88, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 88, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 88, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 88
+PASS: gsl_fft_real_float with signal_real_noise, n = 88, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 88, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 88, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 88, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 88
+PASS: gsl_fft_complex_forward with signal_noise, n = 88, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 88, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 88, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 88, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 88, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 88, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 88, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 88, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 88, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 88, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 88
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 88, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 88, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 88, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 88, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 88, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 88, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 88, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 88, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 88, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 88, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 88
+PASS: gsl_fft_real with signal_real_noise, n = 88, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 88, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 88, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 88, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 88
+PASS: gsl_fft_real_float with signal_real_noise, n = 88, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 88, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 88, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 88, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 88
+PASS: gsl_fft_complex_forward with signal_noise, n = 88, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 88, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 88, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 88, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 88, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 88, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 88, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 88, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 88, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 88, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 88
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 88, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 88, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 88, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 88, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 88, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 88, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 88, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 88, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 88, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 88, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 88
+PASS: gsl_fft_real with signal_real_noise, n = 88, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 88, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 88, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 88, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 88
+PASS: gsl_fft_real_float with signal_real_noise, n = 88, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 88, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 88, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 89, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 89
+PASS: gsl_fft_complex_forward with signal_noise, n = 89, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 89, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 89, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 89, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 89, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 89, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 89, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 89
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 89, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 89, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 89, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 89, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 89, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 89, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 89, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 89
+PASS: gsl_fft_real with signal_real_noise, n = 89, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 89, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 89, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 89, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 89
+PASS: gsl_fft_real_float with signal_real_noise, n = 89, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 89, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 89, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 89, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 89
+PASS: gsl_fft_complex_forward with signal_noise, n = 89, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 89, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 89, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 89, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 89, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 89, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 89, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 89, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 89, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 89, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 89
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 89, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 89, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 89, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 89, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 89, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 89, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 89, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 89, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 89, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 89, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 89
+PASS: gsl_fft_real with signal_real_noise, n = 89, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 89, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 89, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 89, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 89
+PASS: gsl_fft_real_float with signal_real_noise, n = 89, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 89, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 89, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 89, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 89
+PASS: gsl_fft_complex_forward with signal_noise, n = 89, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 89, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 89, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 89, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 89, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 89, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 89, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 89, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 89, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 89, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 89
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 89, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 89, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 89, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 89, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 89, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 89, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 89, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 89, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 89, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 89, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 89
+PASS: gsl_fft_real with signal_real_noise, n = 89, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 89, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 89, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 89, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 89
+PASS: gsl_fft_real_float with signal_real_noise, n = 89, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 89, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 89, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 90, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 90
+PASS: gsl_fft_complex_forward with signal_noise, n = 90, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 90, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 90, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 90, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 90, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 90, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 90, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 90
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 90, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 90, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 90, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 90, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 90, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 90, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 90, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 90
+PASS: gsl_fft_real with signal_real_noise, n = 90, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 90, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 90, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 90, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 90
+PASS: gsl_fft_real_float with signal_real_noise, n = 90, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 90, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 90, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 90, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 90
+PASS: gsl_fft_complex_forward with signal_noise, n = 90, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 90, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 90, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 90, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 90, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 90, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 90, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 90, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 90, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 90, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 90
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 90, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 90, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 90, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 90, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 90, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 90, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 90, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 90, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 90, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 90, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 90
+PASS: gsl_fft_real with signal_real_noise, n = 90, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 90, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 90, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 90, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 90
+PASS: gsl_fft_real_float with signal_real_noise, n = 90, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 90, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 90, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 90, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 90
+PASS: gsl_fft_complex_forward with signal_noise, n = 90, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 90, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 90, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 90, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 90, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 90, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 90, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 90, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 90, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 90, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 90
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 90, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 90, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 90, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 90, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 90, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 90, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 90, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 90, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 90, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 90, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 90
+PASS: gsl_fft_real with signal_real_noise, n = 90, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 90, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 90, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 90, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 90
+PASS: gsl_fft_real_float with signal_real_noise, n = 90, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 90, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 90, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 91, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 91
+PASS: gsl_fft_complex_forward with signal_noise, n = 91, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 91, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 91, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 91, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 91, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 91, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 91, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 91
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 91, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 91, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 91, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 91, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 91, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 91, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 91, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 91
+PASS: gsl_fft_real with signal_real_noise, n = 91, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 91, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 91, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 91, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 91
+PASS: gsl_fft_real_float with signal_real_noise, n = 91, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 91, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 91, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 91, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 91
+PASS: gsl_fft_complex_forward with signal_noise, n = 91, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 91, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 91, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 91, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 91, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 91, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 91, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 91, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 91, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 91, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 91
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 91, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 91, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 91, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 91, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 91, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 91, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 91, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 91, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 91, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 91, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 91
+PASS: gsl_fft_real with signal_real_noise, n = 91, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 91, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 91, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 91, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 91
+PASS: gsl_fft_real_float with signal_real_noise, n = 91, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 91, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 91, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 91, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 91
+PASS: gsl_fft_complex_forward with signal_noise, n = 91, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 91, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 91, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 91, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 91, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 91, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 91, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 91, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 91, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 91, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 91
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 91, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 91, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 91, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 91, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 91, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 91, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 91, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 91, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 91, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 91, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 91
+PASS: gsl_fft_real with signal_real_noise, n = 91, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 91, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 91, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 91, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 91
+PASS: gsl_fft_real_float with signal_real_noise, n = 91, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 91, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 91, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 92, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 92
+PASS: gsl_fft_complex_forward with signal_noise, n = 92, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 92, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 92, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 92, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 92, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 92, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 92, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 92
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 92, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 92, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 92, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 92, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 92, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 92, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 92, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 92
+PASS: gsl_fft_real with signal_real_noise, n = 92, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 92, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 92, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 92, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 92
+PASS: gsl_fft_real_float with signal_real_noise, n = 92, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 92, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 92, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 92, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 92
+PASS: gsl_fft_complex_forward with signal_noise, n = 92, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 92, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 92, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 92, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 92, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 92, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 92, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 92, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 92, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 92, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 92
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 92, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 92, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 92, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 92, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 92, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 92, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 92, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 92, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 92, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 92, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 92
+PASS: gsl_fft_real with signal_real_noise, n = 92, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 92, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 92, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 92, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 92
+PASS: gsl_fft_real_float with signal_real_noise, n = 92, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 92, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 92, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 92, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 92
+PASS: gsl_fft_complex_forward with signal_noise, n = 92, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 92, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 92, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 92, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 92, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 92, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 92, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 92, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 92, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 92, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 92
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 92, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 92, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 92, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 92, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 92, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 92, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 92, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 92, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 92, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 92, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 92
+PASS: gsl_fft_real with signal_real_noise, n = 92, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 92, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 92, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 92, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 92
+PASS: gsl_fft_real_float with signal_real_noise, n = 92, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 92, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 92, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 93, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 93
+PASS: gsl_fft_complex_forward with signal_noise, n = 93, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 93, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 93, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 93, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 93, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 93, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 93, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 93
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 93, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 93, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 93, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 93, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 93, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 93, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 93, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 93
+PASS: gsl_fft_real with signal_real_noise, n = 93, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 93, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 93, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 93, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 93
+PASS: gsl_fft_real_float with signal_real_noise, n = 93, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 93, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 93, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 93, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 93
+PASS: gsl_fft_complex_forward with signal_noise, n = 93, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 93, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 93, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 93, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 93, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 93, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 93, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 93, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 93, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 93, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 93
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 93, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 93, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 93, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 93, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 93, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 93, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 93, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 93, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 93, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 93, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 93
+PASS: gsl_fft_real with signal_real_noise, n = 93, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 93, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 93, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 93, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 93
+PASS: gsl_fft_real_float with signal_real_noise, n = 93, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 93, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 93, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 93, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 93
+PASS: gsl_fft_complex_forward with signal_noise, n = 93, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 93, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 93, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 93, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 93, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 93, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 93, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 93, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 93, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 93, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 93
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 93, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 93, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 93, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 93, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 93, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 93, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 93, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 93, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 93, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 93, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 93
+PASS: gsl_fft_real with signal_real_noise, n = 93, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 93, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 93, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 93, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 93
+PASS: gsl_fft_real_float with signal_real_noise, n = 93, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 93, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 93, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 94, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 94
+PASS: gsl_fft_complex_forward with signal_noise, n = 94, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 94, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 94, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 94, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 94, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 94, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 94, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 94
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 94, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 94, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 94, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 94, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 94, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 94, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 94, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 94
+PASS: gsl_fft_real with signal_real_noise, n = 94, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 94, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 94, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 94, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 94
+PASS: gsl_fft_real_float with signal_real_noise, n = 94, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 94, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 94, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 94, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 94
+PASS: gsl_fft_complex_forward with signal_noise, n = 94, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 94, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 94, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 94, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 94, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 94, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 94, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 94, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 94, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 94, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 94
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 94, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 94, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 94, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 94, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 94, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 94, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 94, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 94, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 94, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 94, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 94
+PASS: gsl_fft_real with signal_real_noise, n = 94, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 94, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 94, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 94, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 94
+PASS: gsl_fft_real_float with signal_real_noise, n = 94, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 94, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 94, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 94, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 94
+PASS: gsl_fft_complex_forward with signal_noise, n = 94, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 94, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 94, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 94, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 94, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 94, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 94, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 94, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 94, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 94, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 94
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 94, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 94, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 94, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 94, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 94, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 94, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 94, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 94, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 94, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 94, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 94
+PASS: gsl_fft_real with signal_real_noise, n = 94, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 94, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 94, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 94, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 94
+PASS: gsl_fft_real_float with signal_real_noise, n = 94, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 94, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 94, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 95, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 95
+PASS: gsl_fft_complex_forward with signal_noise, n = 95, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 95, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 95, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 95, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 95, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 95, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 95, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 95
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 95, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 95, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 95, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 95, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 95, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 95, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 95, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 95
+PASS: gsl_fft_real with signal_real_noise, n = 95, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 95, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 95, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 95, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 95
+PASS: gsl_fft_real_float with signal_real_noise, n = 95, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 95, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 95, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 95, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 95
+PASS: gsl_fft_complex_forward with signal_noise, n = 95, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 95, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 95, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 95, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 95, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 95, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 95, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 95, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 95, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 95, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 95
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 95, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 95, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 95, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 95, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 95, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 95, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 95, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 95, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 95, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 95, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 95
+PASS: gsl_fft_real with signal_real_noise, n = 95, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 95, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 95, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 95, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 95
+PASS: gsl_fft_real_float with signal_real_noise, n = 95, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 95, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 95, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 95, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 95
+PASS: gsl_fft_complex_forward with signal_noise, n = 95, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 95, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 95, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 95, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 95, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 95, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 95, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 95, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 95, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 95, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 95
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 95, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 95, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 95, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 95, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 95, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 95, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 95, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 95, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 95, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 95, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 95
+PASS: gsl_fft_real with signal_real_noise, n = 95, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 95, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 95, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 95, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 95
+PASS: gsl_fft_real_float with signal_real_noise, n = 95, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 95, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 95, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 96, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 96
+PASS: gsl_fft_complex_forward with signal_noise, n = 96, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 96, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 96, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 96, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 96, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 96, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 96, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 96
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 96, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 96, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 96, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 96, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 96, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 96, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 96, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 96
+PASS: gsl_fft_real with signal_real_noise, n = 96, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 96, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 96, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 96, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 96
+PASS: gsl_fft_real_float with signal_real_noise, n = 96, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 96, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 96, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 96, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 96
+PASS: gsl_fft_complex_forward with signal_noise, n = 96, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 96, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 96, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 96, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 96, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 96, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 96, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 96, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 96, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 96, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 96
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 96, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 96, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 96, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 96, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 96, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 96, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 96, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 96, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 96, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 96, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 96
+PASS: gsl_fft_real with signal_real_noise, n = 96, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 96, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 96, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 96, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 96
+PASS: gsl_fft_real_float with signal_real_noise, n = 96, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 96, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 96, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 96, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 96
+PASS: gsl_fft_complex_forward with signal_noise, n = 96, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 96, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 96, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 96, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 96, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 96, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 96, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 96, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 96, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 96, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 96
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 96, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 96, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 96, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 96, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 96, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 96, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 96, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 96, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 96, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 96, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 96
+PASS: gsl_fft_real with signal_real_noise, n = 96, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 96, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 96, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 96, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 96
+PASS: gsl_fft_real_float with signal_real_noise, n = 96, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 96, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 96, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 97, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 97
+PASS: gsl_fft_complex_forward with signal_noise, n = 97, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 97, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 97, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 97, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 97, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 97, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 97, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 97
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 97, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 97, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 97, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 97, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 97, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 97, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 97, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 97
+PASS: gsl_fft_real with signal_real_noise, n = 97, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 97, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 97, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 97, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 97
+PASS: gsl_fft_real_float with signal_real_noise, n = 97, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 97, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 97, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 97, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 97
+PASS: gsl_fft_complex_forward with signal_noise, n = 97, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 97, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 97, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 97, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 97, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 97, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 97, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 97, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 97, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 97, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 97
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 97, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 97, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 97, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 97, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 97, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 97, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 97, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 97, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 97, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 97, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 97
+PASS: gsl_fft_real with signal_real_noise, n = 97, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 97, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 97, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 97, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 97
+PASS: gsl_fft_real_float with signal_real_noise, n = 97, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 97, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 97, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 97, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 97
+PASS: gsl_fft_complex_forward with signal_noise, n = 97, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 97, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 97, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 97, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 97, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 97, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 97, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 97, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 97, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 97, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 97
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 97, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 97, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 97, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 97, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 97, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 97, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 97, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 97, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 97, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 97, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 97
+PASS: gsl_fft_real with signal_real_noise, n = 97, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 97, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 97, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 97, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 97
+PASS: gsl_fft_real_float with signal_real_noise, n = 97, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 97, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 97, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 98, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 98
+PASS: gsl_fft_complex_forward with signal_noise, n = 98, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 98, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 98, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 98, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 98, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 98, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 98, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 98
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 98, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 98, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 98, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 98, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 98, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 98, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 98, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 98
+. 0 10011C00 20
+. 38 E0 00 00 C8 77 00 00 7F 87 D8 40 C8 96 00 00 40 9C 00 FC
+
+PASS: gsl_fft_real with signal_real_noise, n = 98, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 98, stride = 1
+. 0 1000CBE0 20
+. 38 60 00 00 C8 B9 00 00 7F 83 F8 40 C8 D8 00 00 40 9C 01 24
+
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 98, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 98, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 98
+. 0 10013C30 20
+. 38 E0 00 00 C0 77 00 00 7F 87 D8 40 C0 96 00 00 40 9C 00 FC
+
+PASS: gsl_fft_real_float with signal_real_noise, n = 98, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 98, stride = 1
+. 0 1000EDA8 20
+. 38 60 00 00 C0 B9 00 00 7F 83 E8 40 C0 D8 00 00 40 9C 01 24
+
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 98, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 98, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 98
+PASS: gsl_fft_complex_forward with signal_noise, n = 98, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 98, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 98, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 98, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 98, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 98, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 98, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 98, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 98, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 98, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 98
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 98, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 98, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 98, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 98, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 98, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 98, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 98, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 98, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 98, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 98, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 98
+PASS: gsl_fft_real with signal_real_noise, n = 98, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 98, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 98, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 98, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 98
+PASS: gsl_fft_real_float with signal_real_noise, n = 98, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 98, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 98, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 98, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 98
+PASS: gsl_fft_complex_forward with signal_noise, n = 98, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 98, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 98, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 98, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 98, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 98, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 98, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 98, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 98, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 98, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 98
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 98, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 98, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 98, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 98, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 98, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 98, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 98, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 98, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 98, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 98, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 98
+PASS: gsl_fft_real with signal_real_noise, n = 98, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 98, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 98, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 98, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 98
+PASS: gsl_fft_real_float with signal_real_noise, n = 98, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 98, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 98, stride = 3
+PASS: gsl_fft_complex_wavetable_alloc, n = 99, stride = 1
+PASS: gsl_fft_complex_workspace_alloc, n = 99
+PASS: gsl_fft_complex_forward with signal_noise, n = 99, stride = 1
+PASS: gsl_fft_complex_inverse with signal_noise, n = 99, stride = 1
+PASS: gsl_fft_complex_backward with signal_noise, n = 99, stride = 1
+PASS: gsl_fft_complex_forward with signal_pulse, n = 99, stride = 1
+PASS: gsl_fft_complex_forward with signal_constant, n = 99, stride = 1
+PASS: gsl_fft_complex_forward with signal_exp, n = 99, stride = 1
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 99, stride = 1
+PASS: gsl_fft_complex_workspace_float_alloc, n = 99
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 99, stride = 1
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 99, stride = 1
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 99, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 99, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 99, stride = 1
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 99, stride = 1
+PASS: gsl_fft_real_wavetable_alloc, n = 99, stride = 1
+PASS: gsl_fft_real_workspace_alloc, n = 99
+PASS: gsl_fft_real with signal_real_noise, n = 99, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 99, stride = 1
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 99, stride = 1
+PASS: gsl_fft_real_wavetable_float_alloc, n = 99, stride = 1
+PASS: gsl_fft_real_workspace_float_alloc, n = 99
+PASS: gsl_fft_real_float with signal_real_noise, n = 99, stride = 1
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 99, stride = 1
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 99, stride = 1
+PASS: gsl_fft_complex_wavetable_alloc, n = 99, stride = 2
+PASS: gsl_fft_complex_workspace_alloc, n = 99
+PASS: gsl_fft_complex_forward with signal_noise, n = 99, stride = 2
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 99, stride = 2
+PASS: gsl_fft_complex_inverse with signal_noise, n = 99, stride = 2
+PASS: gsl_fft_complex_inverse other data untouched, n = 99, stride = 2
+PASS: gsl_fft_complex_backward with signal_noise, n = 99, stride = 2
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 99, stride = 2
+PASS: gsl_fft_complex_forward with signal_pulse, n = 99, stride = 2
+PASS: gsl_fft_complex_forward with signal_constant, n = 99, stride = 2
+PASS: gsl_fft_complex_forward with signal_exp, n = 99, stride = 2
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 99, stride = 2
+PASS: gsl_fft_complex_workspace_float_alloc, n = 99
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 99, stride = 2
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 99, stride = 2
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 99, stride = 2
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 99, stride = 2
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 99, stride = 2
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 99, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 99, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 99, stride = 2
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 99, stride = 2
+PASS: gsl_fft_real_wavetable_alloc, n = 99, stride = 2
+PASS: gsl_fft_real_workspace_alloc, n = 99
+PASS: gsl_fft_real with signal_real_noise, n = 99, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 99, stride = 2
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 99, stride = 2
+PASS: gsl_fft_real_wavetable_float_alloc, n = 99, stride = 2
+PASS: gsl_fft_real_workspace_float_alloc, n = 99
+PASS: gsl_fft_real_float with signal_real_noise, n = 99, stride = 2
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 99, stride = 2
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 99, stride = 2
+PASS: gsl_fft_complex_wavetable_alloc, n = 99, stride = 3
+PASS: gsl_fft_complex_workspace_alloc, n = 99
+PASS: gsl_fft_complex_forward with signal_noise, n = 99, stride = 3
+PASS: gsl_fft_complex_forward avoids unstrided data, n = 99, stride = 3
+PASS: gsl_fft_complex_inverse with signal_noise, n = 99, stride = 3
+PASS: gsl_fft_complex_inverse other data untouched, n = 99, stride = 3
+PASS: gsl_fft_complex_backward with signal_noise, n = 99, stride = 3
+PASS: gsl_fft_complex_backward avoids unstrided data, n = 99, stride = 3
+PASS: gsl_fft_complex_forward with signal_pulse, n = 99, stride = 3
+PASS: gsl_fft_complex_forward with signal_constant, n = 99, stride = 3
+PASS: gsl_fft_complex_forward with signal_exp, n = 99, stride = 3
+PASS: gsl_fft_complex_wavetable_float_alloc, n = 99, stride = 3
+PASS: gsl_fft_complex_workspace_float_alloc, n = 99
+PASS: gsl_fft_complex_float_forward with signal_noise, n = 99, stride = 3
+PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 99, stride = 3
+PASS: gsl_fft_complex_float_inverse with signal_noise, n = 99, stride = 3
+PASS: gsl_fft_complex_float_inverse other data untouched, n = 99, stride = 3
+PASS: gsl_fft_complex_float_backward with signal_noise, n = 99, stride = 3
+PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 99, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_pulse, n = 99, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_constant, n = 99, stride = 3
+PASS: gsl_fft_complex_float_forward with signal_exp, n = 99, stride = 3
+PASS: gsl_fft_real_wavetable_alloc, n = 99, stride = 3
+PASS: gsl_fft_real_workspace_alloc, n = 99
+PASS: gsl_fft_real with signal_real_noise, n = 99, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 99, stride = 3
+PASS: gsl_fft_halfcomplex with data from signal_noise, n = 99, stride = 3
+PASS: gsl_fft_real_wavetable_float_alloc, n = 99, stride = 3
+PASS: gsl_fft_real_workspace_float_alloc, n = 99
+PASS: gsl_fft_real_float with signal_real_noise, n = 99, stride = 3
+PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 99, stride = 3
+PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 99, stride = 3
+. 0 10004744 12
+. 3C 60 10 00 38 63 47 88 48 01 0C A9
+
+. 0 10004750 4
+. 4B FF DB B5
+
+. 0 10002304 56
+. 7C 08 02 A6 94 21 FF C0 38 60 00 00 92 C1 00 18 92 E1 00 1C 90 01 00 44 93 01 00 20 3B 01 00 08 93 21 00 24 93 41 00 28 93 61 00 2C 93 81 00 30 93 A1 00 34 48 00 45 09
+
+. 0 10006A98 20
+. 80 7E 80 00 38 A0 00 21 80 9E 80 14 38 C0 00 01 48 00 E8 B5
+
+. 0 1001535C 56
+. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 A1 00 14 90 01 00 24 80 1E FF F0 7F C0 F2 14 7C 60 1B 78 81 3E 80 00 81 29 00 00 2F 89 00 00 41 9E 00 24
+
+. 0 10015394 8
+. 7D 28 03 A6 4E 80 00 21
+
+. 0 10004788 4
+. 4E 80 00 20
+
+. 0 1001539C 24
+. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
+
+. 0 10006AAC 8
+. 38 60 00 00 4B FF FF 7C
+
+. 0 10006A2C 108
+. 80 01 00 94 81 C1 00 20 81 E1 00 24 7C 08 03 A6 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
+
+. 0 1000233C 24
+. 30 03 FF FF 7F 80 19 10 3C 80 10 01 38 84 70 B8 7F 83 E3 78 48 01 32 99
+
+PASS: trap for n = 0 in gsl_fft_complex_wavetable_alloc
+. 0 10002354 8
+. 38 60 00 00 48 00 E5 ED
+
+. 0 10010BD0 20
+. 80 7E 80 00 38 A0 00 21 80 9E 82 40 38 C0 00 01 48 00 47 7D
+
+. 0 10010BE4 8
+. 38 60 00 00 4B FF FF 64
+
+. 0 1000235C 24
+. 3C 80 10 01 30 03 FF FF 7F A0 19 10 38 84 70 EC 7F A3 EB 78 48 01 32 79
+
+. 0 1001563C 44
+. D8 21 00 28 D8 41 00 30 D8 61 00 38 D8 81 00 40 D8 A1 00 48 D8 C1 00 50 D8 E1 00 58 D9 01 00 60 91 7D 00 00 7C 9D 23 78 40 9E 00 54
+
+. 0 FECAE1C 68
+. D8 21 00 28 D8 41 00 30 D8 61 00 38 D8 81 00 40 D8 A1 00 48 D8 C1 00 50 D8 E1 00 58 D9 01 00 60 38 C1 00 98 39 21 00 08 39 00 00 01 38 E0 00 00 99 01 00 70 98 E1 00 71 90 C1 00 74 91 21 00 78 4B FF 80 79
+
+PASS: trap for n = 0 in gsl_fft_real_wavetable_alloc
+. 0 10002374 8
+. 38 60 00 00 48 00 A1 C9
+
+. 0 1000C7B4 20
+. 80 7E 80 00 38 A0 00 21 80 9E 81 50 38 C0 00 01 48 00 8B 99
+
+. 0 1000C7C8 8
+. 38 60 00 00 4B FF FF 74
+
+. 0 1000237C 24
+. 3C 80 10 01 31 23 FF FF 7C 09 19 10 38 84 71 1C 7C 03 03 78 48 01 32 59
+
+PASS: trap for n = 0 in gsl_fft_halfcomplex_wavetable_alloc
+. 0 10002394 8
+. 38 60 00 00 48 00 47 C1
+
+. 0 10006BEC 12
+. 80 7E 80 00 80 9E 80 14 48 00 E7 69
+
+. 0 10006BF8 36
+. 38 00 00 00 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 1000239C 16
+. 3C 80 10 01 7F 83 E3 78 38 84 71 54 48 01 32 41
+
+PASS: trap for n = 0 in gsl_fft_complex_workspace_alloc
+. 0 100023AC 8
+. 38 60 00 00 48 00 E8 DD
+
+. 0 10010D20 12
+. 80 7E 80 00 80 9E 82 40 48 00 46 35
+
+. 0 10010D2C 36
+. 38 00 00 00 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 100023B4 16
+. 3C 80 10 01 38 84 71 88 7F A3 EB 78 48 01 32 29
+
+PASS: trap for n = 0 in gsl_fft_real_workspace_alloc
+. 0 100023C4 8
+. 38 60 00 0A 48 00 44 79
+
+. 0 100023CC 16
+. 3B A1 00 10 7C 7B 1B 78 38 60 00 0A 48 00 A1 69
+
+. 0 100023DC 16
+. 3B 80 00 03 7C 76 1B 78 38 60 00 0A 48 00 E5 5D
+
+. 0 100023EC 12
+. 7C 77 1B 78 38 60 00 0A 48 00 47 65
+
+. 0 100023F8 12
+. 7C 7A 1B 78 38 60 00 0A 48 00 E8 8D
+
+. 0 10002404 28
+. 7F 66 DB 78 7C 79 1B 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 6A A1
+
+. 0 10007C2C 20
+. 80 7E 80 00 38 A0 00 6B 80 9E 80 34 38 C0 00 01 48 00 D7 21
+
+. 0 10007C40 8
+. 38 60 00 01 4B FF F9 60
+
+. 0 10002420 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 71 B8 48 01 31 B9
+
+PASS: trap for n = 0 in gsl_fft_complex_forward
+. 0 10002434 24
+. 7E E6 BB 78 7F 27 CB 78 38 A0 00 00 7F 03 C3 78 38 80 00 01 48 00 E9 D1
+
+. 0 1001252C 20
+. 80 7E 80 00 38 A0 00 36 80 9E 82 4C 38 C0 00 01 48 00 2E 21
+
+. 0 10012540 8
+. 38 60 00 01 4B FF F2 E4
+
+. 0 1000244C 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 71 E4 48 01 31 8D
+
+PASS: trap for n = 0 in gsl_fft_real_transform
+. 0 10002460 24
+. 7E C6 B3 78 7F 27 CB 78 38 A0 00 00 7F 03 C3 78 38 80 00 01 48 00 A4 45
+
+. 0 1000D9D4 20
+. 80 7E 80 00 38 A0 00 58 80 9E 81 5C 38 C0 00 01 48 00 79 79
+
+. 0 1000D9E8 8
+. 38 60 00 01 4B FF F5 38
+
+. 0 10002478 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 72 10 48 01 31 61
+
+PASS: trap for n = 0 in gsl_fft_halfcomplex_transform
+. 0 1000248C 16
+. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 6D 35
+
+. 0 10006834 8
+. 38 21 00 10 4E 80 00 20
+
+. 0 100091B0 20
+. 80 7E 80 7C 38 A0 00 5A 80 9E 80 80 38 C0 00 04 48 00 C1 9D
+
+. 0 100091C4 8
+. 38 60 00 04 4B FF FF 94
+
+. 0 1000249C 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 72 40 48 01 31 3D
+
+PASS: trap for n = 0 in gsl_fft_complex_radix2_forward
+. 0 100024B0 24
+. 7F 66 DB 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 69 D5
+
+. 0 100024C8 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 72 74 48 01 31 11
+
+PASS: trap for n = 0 in gsl_fft_complex_backward
+. 0 100024DC 16
+. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 6D 09
+
+. 0 100024EC 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 72 A0 48 01 30 ED
+
+PASS: trap for n = 0 in gsl_fft_complex_radix2_backward
+. 0 10002500 24
+. 7F 66 DB 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 68 BD
+
+. 0 10002518 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 72 D4 48 01 30 C1
+
+PASS: trap for n = 0 in gsl_fft_complex_inverse
+. 0 1000252C 16
+. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 6C E1
+
+. 0 1000253C 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 73 00 48 01 30 9D
+
+PASS: trap for n = 0 in gsl_fft_complex_radix2_inverse
+. 0 10002550 16
+. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 6C 71
+
+. 0 10002560 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 73 34 48 01 30 79
+
+PASS: trap for n != 2^k in gsl_fft_complex_radix2_forward
+. 0 10002574 16
+. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 6C 71
+
+. 0 10002584 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 73 68 48 01 30 55
+
+PASS: trap for n != 2^k in gsl_fft_complex_radix2_backward
+. 0 10002598 16
+. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 6C 75
+
+. 0 100025A8 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 73 A0 48 01 30 31
+
+PASS: trap for n != 2^k in gsl_fft_complex_radix2_inverse
+. 0 100025BC 28
+. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 38 80 00 01 7F A3 EB 78 48 00 68 E9
+
+. 0 10008D94 20
+. 80 7E 80 38 38 A0 00 75 80 9E 80 34 38 C0 00 04 48 00 C5 B9
+
+. 0 10008DA8 8
+. 38 60 00 04 4B FF E7 F8
+
+. 0 100025D8 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 73 D4 48 01 30 01
+
+PASS: trap for n != nw in gsl_fft_complex_forward
+. 0 100025EC 28
+. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 38 80 00 01 7F A3 EB 78 48 00 68 95
+
+. 0 10002608 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 74 00 48 01 2F D1
+
+PASS: trap for n != nw in gsl_fft_complex_backward
+. 0 1000261C 28
+. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 7F A3 EB 78 38 80 00 01 48 00 67 9D
+
+. 0 10002638 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 74 30 48 01 2F A1
+
+PASS: trap for n != nw in gsl_fft_complex_inverse
+. 0 1000264C 28
+. 7E E6 BB 78 7F 27 CB 78 93 97 00 00 38 A0 00 04 38 80 00 01 7F 03 C3 78 48 00 E7 B5
+
+. 0 10012548 20
+. 80 7E 80 38 38 A0 00 40 80 9E 82 4C 38 C0 00 04 48 00 2E 05
+
+. 0 1001255C 8
+. 38 60 00 04 4B FF F2 C8
+
+. 0 10002668 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 74 5C 48 01 2F 71
+
+PASS: trap for n != nw in gsl_fft_real_transform
+. 0 1000267C 28
+. 7E C6 B3 78 7F 27 CB 78 38 A0 00 04 93 96 00 00 7F 03 C3 78 38 80 00 01 48 00 A2 25
+
+. 0 1000DF98 20
+. 80 7E 80 38 38 A0 00 62 80 9E 81 5C 38 C0 00 04 48 00 73 B5
+
+. 0 1000DFAC 8
+. 38 60 00 04 4B FF EF 74
+
+. 0 10002698 20
+. 3C 80 10 01 38 84 74 88 20 03 00 00 7C 60 19 14 48 01 2F 41
+
+PASS: trap for n != nw in gsl_fft_halfcomplex_transform
+. 0 100026AC 8
+. 7E C3 B3 78 48 00 A1 BD
+
+. 0 100026B4 8
+. 7E E3 BB 78 48 00 E6 CD
+
+. 0 100026BC 8
+. 7F 63 DB 78 48 00 45 91
+
+. 0 100026C4 8
+. 7F 23 CB 78 48 00 E7 05
+
+. 0 100026CC 8
+. 7F 43 D3 78 48 00 45 C9
+
+. 0 100026D4 48
+. 80 01 00 44 82 C1 00 18 82 E1 00 1C 7C 08 03 A6 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 38 21 00 40 4E 80 00 20
+
+. 0 10004754 4
+. 4B FF FB 01
+
+. 0 10004254 56
+. 7C 08 02 A6 94 21 FF C0 38 60 00 00 92 C1 00 18 92 E1 00 1C 90 01 00 44 93 01 00 20 3B 01 00 08 93 21 00 24 93 41 00 28 93 61 00 2C 93 81 00 30 93 A1 00 34 48 00 53 E1
+
+. 0 100098C8 20
+. 80 7E 80 00 38 A0 00 21 80 9E 80 14 38 C0 00 01 48 00 BA 85
+
+. 0 100098DC 8
+. 38 60 00 00 4B FF FF 7C
+
+. 0 1000985C 108
+. 80 01 00 94 81 C1 00 20 81 E1 00 24 7C 08 03 A6 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
+
+. 0 1000428C 24
+. 30 03 FF FF 7F 80 19 10 3C 80 10 01 38 84 7C 6C 7F 83 E3 78 48 01 13 49
+
+PASS: trap for n = 0 in gsl_fft_complex_wavetable_float_alloc
+. 0 100042A4 8
+. 38 60 00 00 48 00 E6 85
+
+. 0 10012BC0 20
+. 80 7E 80 00 38 A0 00 21 80 9E 82 40 38 C0 00 01 48 00 27 8D
+
+. 0 10012BD4 8
+. 38 60 00 00 4B FF FF 64
+
+. 0 100042AC 24
+. 3C 80 10 01 30 03 FF FF 7F A0 19 10 38 84 7C A4 7F A3 EB 78 48 01 13 29
+
+PASS: trap for n = 0 in gsl_fft_real_wavetable_float_alloc
+. 0 100042C4 8
+. 38 60 00 00 48 00 A4 39
+
+. 0 1000E97C 20
+. 80 7E 80 00 38 A0 00 21 80 9E 81 50 38 C0 00 01 48 00 69 D1
+
+. 0 1000E990 8
+. 38 60 00 00 4B FF FF 74
+
+. 0 100042CC 24
+. 3C 80 10 01 31 23 FF FF 7C 09 19 10 38 84 7C DC 7C 03 03 78 48 01 13 09
+
+PASS: trap for n = 0 in gsl_fft_halfcomplex_wavetable_float_alloc
+. 0 100042E4 8
+. 38 60 00 00 48 00 56 A1
+
+. 0 10009A1C 12
+. 80 7E 80 00 80 9E 80 14 48 00 B9 39
+
+. 0 10009A28 36
+. 38 00 00 00 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 100042EC 16
+. 3C 80 10 01 7F 83 E3 78 38 84 7D 18 48 01 12 F1
+
+PASS: trap for n = 0 in gsl_fft_complex_workspace_float_alloc
+. 0 100042FC 8
+. 38 60 00 00 48 00 E9 7D
+
+. 0 10012D10 12
+. 80 7E 80 00 80 9E 82 40 48 00 26 45
+
+. 0 10012D1C 36
+. 38 00 00 00 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 10004304 16
+. 3C 80 10 01 38 84 7D 50 7F A3 EB 78 48 01 12 D9
+
+PASS: trap for n = 0 in gsl_fft_real_workspace_float_alloc
+. 0 10004314 8
+. 38 60 00 0A 48 00 53 51
+
+. 0 1000431C 16
+. 3B A1 00 0C 7C 7B 1B 78 38 60 00 0A 48 00 A3 D9
+
+. 0 1000432C 16
+. 3B 80 00 03 7C 76 1B 78 38 60 00 0A 48 00 E5 F5
+
+. 0 1000433C 12
+. 7C 77 1B 78 38 60 00 0A 48 00 56 45
+
+. 0 10004348 12
+. 7C 7A 1B 78 38 60 00 0A 48 00 E9 2D
+
+. 0 10004354 28
+. 7F 66 DB 78 7C 79 1B 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 7A 11
+
+. 0 1000AA78 20
+. 80 7E 80 00 38 A0 00 6B 80 9E 80 34 38 C0 00 01 48 00 A8 D5
+
+. 0 1000AA8C 8
+. 38 60 00 01 4B FF F9 34
+
+. 0 10004370 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7D 88 48 01 12 69
+
+PASS: trap for n = 0 in gsl_fft_complex_float_forward
+. 0 10004384 24
+. 7E E6 BB 78 7F 27 CB 78 38 A0 00 00 7F 03 C3 78 38 80 00 01 48 00 EA 71
+
+. 0 10014590 20
+. 80 7E 80 00 38 A0 00 36 80 9E 82 4C 38 C0 00 01 48 00 0D BD
+
+. 0 100145A4 8
+. 38 60 00 01 4B FF F2 AC
+
+. 0 1000439C 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7D B8 48 01 12 3D
+
+PASS: trap for n = 0 in gsl_fft_real_float_transform
+. 0 100043B0 24
+. 7E C6 B3 78 7F 27 CB 78 38 A0 00 00 7F 03 C3 78 38 80 00 01 48 00 A6 BD
+
+. 0 1000FBC0 20
+. 80 7E 80 00 38 A0 00 58 80 9E 81 5C 38 C0 00 01 48 00 57 8D
+
+. 0 1000FBD4 8
+. 38 60 00 01 4B FF F5 18
+
+. 0 100043C8 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7D E8 48 01 12 11
+
+PASS: trap for n = 0 in gsl_fft_halfcomplex_float_transform
+. 0 100043DC 16
+. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 7C AD
+
+. 0 1000C094 20
+. 7C 08 02 A6 94 21 FF F0 38 C0 FF FF 90 01 00 14 4B FF FD 01
+
+. 0 1000BDA4 124
+. 94 21 FF 90 7C 08 02 A6 42 9F 00 05 93 C1 00 40 7F C8 02 A6 2F 85 00 01 90 01 00 74 93 41 00 30 7C DA 33 78 80 1E FF F0 93 81 00 38 7C BC 2B 78 93 A1 00 3C 7F C0 F2 14 93 E1 00 44 7C 9D 23 78 7C 7F 1B 78 DB 61 00 48 DB 81 00 50 38 60 00 00 DB A1 00 58 DB C1 00 60 DB E1 00 68 92 81 00 18 92 A1 00 1C 92 C1 00 20 92 E1 00 24 93 01 00 28 93 21 00 2C 93 61 00 34 41 9E 02 08
+
+. 0 1000BE20 8
+. 7C A3 2B 78 4B FF A9 D5
+
+. 0 1000BE28 12
+. 2F 83 FF FF 7C 79 1B 78 41 9E 02 48
+
+. 0 1000C078 20
+. 80 7E 80 7C 38 A0 00 5A 80 9E 80 80 38 C0 00 04 48 00 92 D5
+
+. 0 1000C08C 8
+. 38 60 00 04 4B FF FF 94
+
+. 0 1000C024 84
+. 80 01 00 74 82 81 00 18 82 A1 00 1C 7C 08 03 A6 82 C1 00 20 82 E1 00 24 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB 61 00 48 CB 81 00 50 CB A1 00 58 CB C1 00 60 CB E1 00 68 38 21 00 70 4E 80 00 20
+
+. 0 1000C0A8 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 100043EC 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7E 20 48 01 11 ED
+
+PASS: trap for n = 0 in gsl_fft_complex_float_radix2_forward
+. 0 10004400 24
+. 7F 66 DB 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 79 45
+
+. 0 10004418 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7E 58 48 01 11 C1
+
+PASS: trap for n = 0 in gsl_fft_complex_float_backward
+. 0 1000442C 16
+. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 7C 81
+
+. 0 1000C0B8 20
+. 7C 08 02 A6 94 21 FF F0 38 C0 00 01 90 01 00 14 4B FF FC DD
+
+. 0 1000C0CC 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 1000443C 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7E 8C 48 01 11 9D
+
+PASS: trap for n = 0 in gsl_fft_complex_float_radix2_backward
+. 0 10004450 24
+. 7F 66 DB 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 78 29
+
+. 0 10004468 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7E C4 48 01 11 71
+
+PASS: trap for n = 0 in gsl_fft_complex_float_inverse
+. 0 1000447C 16
+. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 7C 59
+
+. 0 1000C0E0 64
+. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 01 00 24 38 C0 00 01 7C 7F 1B 78 93 81 00 10 80 1E FF F0 7C 9C 23 78 93 A1 00 14 7C BD 2B 78 7F C0 F2 14 4B FF FC 89
+
+. 0 1000C120 8
+. 2C 03 00 00 40 82 00 68
+
+. 0 1000C18C 32
+. 80 01 00 24 83 81 00 10 83 A1 00 14 7C 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 1000448C 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7E F4 48 01 11 4D
+
+PASS: trap for n = 0 in gsl_fft_complex_float_radix2_inverse
+. 0 100044A0 16
+. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 7B E9
+
+. 0 100044B0 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7F 2C 48 01 11 29
+
+PASS: trap for n != 2^k in gsl_fft_complex_float_radix2_forward
+. 0 100044C4 16
+. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 7B E9
+
+. 0 100044D4 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7F 68 48 01 11 05
+
+PASS: trap for n != 2^k in gsl_fft_complex_float_radix2_backward
+. 0 100044E8 16
+. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 7B ED
+
+. 0 100044F8 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7F A4 48 01 10 E1
+
+PASS: trap for n != 2^k in gsl_fft_complex_float_radix2_inverse
+. 0 1000450C 28
+. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 38 80 00 01 7F A3 EB 78 48 00 78 59
+
+. 0 1000BC50 20
+. 80 7E 80 38 38 A0 00 75 80 9E 80 34 38 C0 00 04 48 00 96 FD
+
+. 0 1000BC64 8
+. 38 60 00 04 4B FF E7 5C
+
+. 0 10004528 20
+. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7F E0 48 01 10 B1
+
+PASS: trap for n != nw in gsl_fft_complex_float_forward
+. 0 1000453C 28
+. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 38 80 00 01 7F A3 EB 78 48 00 78 05
+
+. 0 10004558 20
+. 3C 80 10 02 20 03 00 00 7C 60 19 14 38 84 80 14 48 01 10 81
+
+PASS: trap for n != nw in gsl_fft_complex_float_backward
+. 0 1000456C 28
+. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 7F A3 EB 78 38 80 00 01 48 00 77 09
+
+. 0 10004588 20
+. 3C 80 10 02 20 03 00 00 7C 60 19 14 38 84 80 48 48 01 10 51
+
+PASS: trap for n != nw in gsl_fft_complex_float_inverse
+. 0 1000459C 28
+. 7E E6 BB 78 7F 27 CB 78 93 97 00 00 38 A0 00 04 38 80 00 01 7F 03 C3 78 48 00 E8 55
+
+. 0 100145AC 20
+. 80 7E 80 38 38 A0 00 40 80 9E 82 4C 38 C0 00 04 48 00 0D A1
+
+. 0 100145C0 8
+. 38 60 00 04 4B FF F2 90
+
+. 0 100045B8 20
+. 3C 80 10 02 20 03 00 00 7C 60 19 14 38 84 80 7C 48 01 10 21
+
+PASS: trap for n != nw in gsl_fft_real_float_transform
+. 0 100045CC 28
+. 7E C6 B3 78 7F 27 CB 78 38 A0 00 04 93 96 00 00 7F 03 C3 78 38 80 00 01 48 00 A4 9D
+
+. 0 100101C4 20
+. 80 7E 80 38 38 A0 00 62 80 9E 81 5C 38 C0 00 04 48 00 51 89
+
+. 0 100101D8 8
+. 38 60 00 04 4B FF EF 14
+
+. 0 100045E8 20
+. 3C 80 10 02 38 84 80 B0 20 03 00 00 7C 60 19 14 48 01 0F F1
+
+PASS: trap for n != nw in gsl_fft_halfcomplex_float_transform
+. 0 100045FC 8
+. 7E C3 B3 78 48 00 A4 35
+
+. 0 10004604 8
+. 7E E3 BB 78 48 00 E7 6D
+
+. 0 1000460C 8
+. 7F 63 DB 78 48 00 54 71
+
+. 0 10004614 8
+. 7F 23 CB 78 48 00 E7 A5
+
+. 0 1000461C 8
+. 7F 43 D3 78 48 00 54 A9
+
+. 0 10004624 48
+. 80 01 00 44 82 C1 00 18 82 E1 00 1C 7C 08 03 A6 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 38 21 00 40 4E 80 00 20
+
+. 0 10004758 4
+. 48 01 1B 2D
+
+. 0 10016284 52
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 38 60 00 01 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 10 80 09 00 00 2F 80 00 00 40 9E 00 38
+
+. 0 100162B8 28
+. 81 3E 80 04 38 60 00 00 81 7E 80 00 80 A9 00 00 80 8B 00 00 7F 85 20 00 41 9E 00 1C
+
+. 0 100162EC 20
+. 80 01 00 14 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+. 0 1000475C 4
+. 48 02 48 21
+
+. 0 10028F7C 8
+. 39 60 00 44 4B FF FF 4C
+
+. 0 FEB3B98 12
+. 94 21 FF E0 7C 08 02 A6 48 11 42 B1
+
+. 0 FEB3BA4 44
+. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 93 81 00 10 7C 7C 1B 78 93 A1 00 14 83 FE 1A FC 90 01 00 24 80 1F 00 00 2F 80 00 00 41 9E 00 CC
+
+. 0 FEB3BD0 16
+. 81 3F 00 00 80 69 00 04 2C 03 00 00 41 82 00 78
+
+. 0 FEB3BE0 8
+. 7D 2A 4B 78 48 00 00 18
+
+. 0 FEB3BFC 36
+. 80 AA 00 04 39 25 FF FF 55 24 20 36 91 2A 00 04 7D 64 52 14 80 0B 00 08 39 6B 00 08 2F 80 00 03 41 9E 00 54
+
+. 0 FEB3C20 12
+. 2C 80 00 02 2F 00 00 04 40 BD FF C0
+
+. 0 FEB3C2C 4
+. 40 9A FF C0
+
+. 0 FEB3C30 20
+. 81 0B 00 04 7F 84 E3 78 80 6B 00 08 7D 09 03 A6 4E 80 04 21
+
+. 0 1001654C 68
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+
+. 0 100165B4 4
+. 48 00 02 69
+
+. 0 1001681C 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 4B FE 9F 05
+
+. 0 1000072C 36
+. 7C 08 02 A6 94 21 FF F0 93 C1 00 08 3F C0 10 03 93 E1 00 0C 90 01 00 14 88 1E 8F FC 2F 80 00 00 40 9E 00 34
+
+. 0 10000750 8
+. 3F E0 10 03 48 00 00 14
+
+. 0 10000768 16
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+
+. 0 10000778 32
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+
+. 0 1001682C 16
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+
+. 0 100165B8 28
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+
+. 0 FEB3C44 16
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+
+. 0 2547BAE0 12
+. 94 21 FF A0 7C 08 02 A6 48 01 B5 19
+
+. 0 2547BAEC 132
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+
+. 0 2547BB70 20
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+
+. 0 2547BBAC 16
+. 7D 71 90 2E 3A E0 00 00 2E 0B 00 00 41 92 00 20
+
+. 0 2547BBD8 8
+. 7E F3 BB 79 41 82 01 10
+
+. 0 2547BCEC 24
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+
+. 0 2547BD04 4
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+
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+
+. 0 2547BB60 16
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+
+. 0 2547BB84 8
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+
+. 0 2547BB8C 48
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+
+. 0 2547BBBC 16
+. 83 4B 00 14 56 EA 10 3A 7F 1A 58 00 41 9A 01 08
+
+. 0 2547BCD0 28
+. 83 6B 01 78 3A F7 00 01 7D 6A B1 2E 39 5B 00 01 91 4B 01 78 81 6B 00 0C 4B FF FE E8
+
+. 0 2547BBD0 8
+. 2E 0B 00 00 40 92 FF E8
+
+. 0 2547BBE0 12
+. 2E 0F 00 00 7F 71 90 2E 40 92 00 08
+
+. 0 2547BBEC 12
+. 83 7B 00 0C 2F 9B 00 00 41 9E 00 F8
+
+. 0 2547BBF8 12
+. 83 9B 00 14 7C 9C D8 00 40 86 FF EC
+
+. 0 2547BC04 12
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+
+. 0 2547BC14 16
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+
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+
+. 0 2547BC30 32
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+
+. 0 2547BC50 12
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+
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+
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+
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+
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+
+. 0 2547BE00 12
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+
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+
+. 0 2547BE60 20
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+
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+. 0 FFDE904 52
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+
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+. 0 FFEF17C 8
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+
+. 0 FFEF13C 32
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+
+. 0 FEB3F44 12
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+
+. 0 FEB3F50 72
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+
+. 0 FEB3F98 28
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+
+. 0 FEB4010 12
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+
+. 0 FEB401C 4
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+
+. 0 FEB40B4 60
+. 81 41 00 34 7F 23 CB 78 81 01 00 0C 83 C1 00 28 7D 48 03 A6 83 E1 00 2C 7D 00 81 20 83 01 00 10 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 38 21 00 30 48 0A BD 24
+
+. 0 FF5FE10 12
+. 94 21 FF D0 7C 08 02 A6 48 06 80 39
+
+. 0 FF5FE1C 64
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+
+. 0 FF5FE70 8
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+
+. 0 FF5FE68 16
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+. 0 FF5FE78 52
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+
+. 0 FFDE950 8
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+
+. 0 FFDE978 36
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+
+. 0 FFDEF90 16
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+. 0 2547BE74 16
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+. 0 FDF9BFC 52
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+. 0 FDF9C30 12
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+. 0 FDF9C3C 12
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+
+. 0 FE75404 8
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+. 0 FE75354 32
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+
+. 0 FDF9C48 8
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+. 0 FDF9C60 16
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+. 0 FDF9C70 36
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+
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+
+. 0 2547BE14 36
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+. 0 2547BE38 16
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+. 0 FE9B5BC 12
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+
+. 0 FEB3C54 20
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+
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+
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+
+. 0 FEEBFE0 32
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+
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+. 0 FEEBBC8 20
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+
+. 0 FEEC030 64
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+
+. 0 FEE8C64 12
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+
+. 0 FEE8C70 52
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+
+. 0 FEECBB8 16
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+. 0 FEECB80 4
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+. 0 FEECBC8 36
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+
+. 0 FEB3CB8 8
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+
+. 0 FEB3CC0 8
+. 7F 83 E3 78 48 06 21 41
+
+. 0 FF15E04 8
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+
+. 0 FF15E0C 40
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+
+==3281==
diff --git a/main/VEX/orig_ppc32/morefp.orig b/main/VEX/orig_ppc32/morefp.orig
new file mode 100644
index 0000000..818586b
--- /dev/null
+++ b/main/VEX/orig_ppc32/morefp.orig
@@ -0,0 +1,6944 @@
+==3289== Nulgrind, a binary JIT-compiler for Linux.
+==3289== Copyright (C) 2002-2004, and GNU GPL'd, by Nicholas Nethercote.
+==3289== Using valgrind-2.2.0-ppc, a program supervision framework for Linux.
+==3289== Copyright (C) 2000-2004, and GNU GPL'd, by Julian Seward et al.
+==3289== For more details, rerun with: -v
+==3289==
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+PASS: Poly J1 DHT
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+. 0 FEEC604 12
+. 80 7F 00 60 2F 03 00 00 40 99 01 44
+
+. 0 FEEC750 16
+. 81 7F 00 14 81 3F 00 10 7C 8B 48 40 40 A5 FE B4
+
+. 0 FEEC610 12
+. 89 5F 00 46 2C 0A 00 00 40 82 00 44
+
+. 0 FEEC61C 4
+. 40 99 00 40
+
+. 0 FEEC65C 4
+. 41 92 00 44
+
+. 0 FEEC6A0 16
+. 80 19 00 00 93 7A 00 00 7F 9C 00 00 41 9E 00 9C
+
+. 0 FEEC748 8
+. 83 FF 00 34 4B FF FF 6C
+
+. 0 FEEC6B8 8
+. 2C 1F 00 00 40 82 FE E8
+
+. 0 FEEC5A4 8
+. 93 FA 00 00 41 92 00 5C
+
+. 0 FEEC6C0 4
+. 41 92 00 38
+
+. 0 FEEC6F8 4
+. 40 8E 00 88
+
+. 0 FEEC6FC 68
+. 7E E3 BB 78 81 81 00 24 82 E1 00 54 82 C1 00 28 7D 81 81 20 7E E8 03 A6 83 01 00 30 82 E1 00 2C 83 21 00 34 83 41 00 38 83 61 00 3C 83 81 00 40 83 A1 00 44 83 C1 00 48 83 E1 00 4C 38 21 00 50 4E 80 00 20
+
+. 0 FEECB38 20
+. 81 3E 1B EC 7C 7C 1B 78 83 E9 00 00 2F 9F 00 00 41 9E 00 80
+
+. 0 FEECB4C 8
+. 3B A0 FF FF 48 00 00 14
+
+. 0 FEECB64 20
+. 80 1F 00 00 70 09 00 02 54 03 EF FE 2F 83 00 00 40 A2 FF E0
+
+. 0 FEECB54 16
+. 93 BF 00 60 83 FF 00 34 2F 1F 00 00 41 9A 00 68
+
+. 0 FEECB78 8
+. 70 09 10 00 41 9E 00 08
+
+. 0 FEECB84 24
+. 80 DF 00 60 7F E3 FB 78 38 80 00 00 38 A0 00 00 2C 86 00 00 41 86 FF BC
+
+. 0 FEECB9C 28
+. 89 9F 00 46 7D 8A 07 74 7D 0A FA 14 80 E8 00 98 81 67 00 2C 7D 69 03 A6 4E 80 04 21
+
+. 0 FEE8C4C 24
+. 7C 08 02 A6 94 21 FF F0 93 E1 00 08 7C 7F 1B 78 90 01 00 14 48 00 33 3D
+
+. 0 FEEBF9C 68
+. 7D 48 02 A6 94 21 FF E0 93 81 00 10 7C BC 2B 78 93 A1 00 14 7C 9D 23 78 91 41 00 24 93 E1 00 1C 7C 7F 1B 78 93 C1 00 18 89 03 00 46 7D 07 07 74 7C C7 1A 14 80 86 00 98 81 64 00 30 7D 69 03 A6 4E 80 04 21
+
+. 0 FEEBFE0 32
+. 20 1D 00 00 7D 20 E9 14 2F 83 FF FF 21 7C 00 00 7C 0B E1 14 7D 2B 03 79 38 60 00 00 41 9E 00 54
+
+. 0 FEEC000 20
+. 7F A4 EB 78 7F E3 FB 78 38 BF 00 48 38 C0 00 00 40 82 00 60
+
+. 0 FEEC070 16
+. 81 9F 00 00 38 9F 00 47 61 80 00 02 4B FF FF AC
+
+. 0 FEEC028 8
+. 90 1F 00 00 4B FF FB 51
+
+. 0 FEEBBB8 16
+. 80 03 00 00 7D 23 4B 78 70 0B 00 01 40 A2 00 1C
+
+. 0 FEEBBC8 20
+. 80 DF 00 20 7C A9 30 50 38 85 0F FF 54 84 00 26 48 06 26 A5
+
+. 0 FF4E27C 8
+. 38 00 00 5B 44 00 00 02
+
+. 0 FF4E284 4
+. 4C A3 00 20
+
+. 0 FEEBC20 40
+. 80 61 00 24 90 1F 00 00 83 61 00 0C 7C 68 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 FEEC030 64
+. 38 A0 00 00 7F E3 FB 78 90 BF 00 0C 90 BF 00 18 90 BF 00 14 90 BF 00 10 90 BF 00 08 90 BF 00 04 83 81 00 24 83 A1 00 14 7F 88 03 A6 83 C1 00 18 83 81 00 10 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 FEE8C64 12
+. 2F 83 00 00 38 60 00 00 41 9E 00 24
+
+. 0 FEE8C70 52
+. 80 9F 00 1C 7F E3 FB 78 90 9F 00 08 90 9F 00 18 90 9F 00 14 90 9F 00 10 90 9F 00 0C 90 9F 00 04 80 A1 00 14 83 E1 00 08 38 21 00 10 7C A8 03 A6 4E 80 00 20
+
+. 0 FEECBB8 16
+. 93 BF 00 60 83 FF 00 34 2F 1F 00 00 40 9A FF A0
+
+. 0 FEECB80 4
+. 41 A2 FF D4
+
+. 0 FEECBC8 36
+. 80 81 00 24 7F 83 E3 78 83 A1 00 14 83 81 00 10 7C 88 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+. 0 FEB3CB8 8
+. 7F 9F E8 40 41 9C FF EC
+
+. 0 FEB3CC0 8
+. 7F 83 E3 78 48 06 21 41
+
+. 0 FF15E04 8
+. 94 21 FF E0 48 0B 20 49
+
+. 0 FF15E0C 40
+. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 93 E1 00 1C 7C 7F 1B 78 81 3E 1C 4C 7F A9 12 14 38 00 00 EA 7F E3 FB 78 44 00 00 02
+
+==3289==
diff --git a/main/VEX/orig_ppc32/return0.orig b/main/VEX/orig_ppc32/return0.orig
new file mode 100644
index 0000000..75adad9
--- /dev/null
+++ b/main/VEX/orig_ppc32/return0.orig
@@ -0,0 +1,60452 @@
+==== BB 0 _start(0x254804D4) approx BBs exec'd 0 ====
+
+ 0x254804D4: 7C230B78 or r3,r1,r1
+ 0: GETL R1, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254804D8: 38800000 li r4,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x254804DC: 3821FFF0 addi r1,r1,-16
+ 6: GETL R1, t4
+ 7: ADDL $0xFFFFFFF0, t4
+ 8: PUTL t4, R1
+ 9: INCEIPL $4
+
+ 0x254804E0: 90810000 stw r4,0(r1)
+ 10: GETL R4, t6
+ 11: GETL R1, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x254804E4: 4BFF1581 bl 0x25471A64
+ 14: MOVL $0x254804E8, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x25471A64 ($4)
+
+
+. 0 254804D4 20
+. 7C 23 0B 78 38 80 00 00 38 21 FF F0 90 81 00 00 4B FF 15 81
+
+==== BB 1 _dl_start(0x25471A64) approx BBs exec'd 0 ====
+
+ 0x25471A64: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25471A68: 3960004B li r11,75
+ 3: MOVL $0x4B, t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0x25471A6C: 9421FD50 stwu r1,-688(r1)
+ 6: GETL R1, t4
+ 7: GETL R1, t6
+ 8: ADDL $0xFFFFFD50, t6
+ 9: PUTL t6, R1
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x25471A70: 7D6903A6 mtctr r11
+ 12: GETL R11, t8
+ 13: PUTL t8, CTR
+ 14: INCEIPL $4
+
+ 0x25471A74: 92E1028C stw r23,652(r1)
+ 15: GETL R23, t10
+ 16: GETL R1, t12
+ 17: ADDL $0x28C, t12
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0x25471A78: 900102B4 stw r0,692(r1)
+ 20: GETL R0, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x2B4, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x25471A7C: 7C771B78 or r23,r3,r3
+ 25: GETL R3, t18
+ 26: PUTL t18, R23
+ 27: INCEIPL $4
+
+ 0x25471A80: 93010290 stw r24,656(r1)
+ 28: GETL R24, t20
+ 29: GETL R1, t22
+ 30: ADDL $0x290, t22
+ 31: STL t20, (t22)
+ 32: INCEIPL $4
+
+ 0x25471A84: 38000000 li r0,0
+ 33: MOVL $0x0, t24
+ 34: PUTL t24, R0
+ 35: INCEIPL $4
+
+ 0x25471A88: 93210294 stw r25,660(r1)
+ 36: GETL R25, t26
+ 37: GETL R1, t28
+ 38: ADDL $0x294, t28
+ 39: STL t26, (t28)
+ 40: INCEIPL $4
+
+ 0x25471A8C: 39210030 addi r9,r1,48
+ 41: GETL R1, t30
+ 42: ADDL $0x30, t30
+ 43: PUTL t30, R9
+ 44: INCEIPL $4
+
+ 0x25471A90: 93410298 stw r26,664(r1)
+ 45: GETL R26, t32
+ 46: GETL R1, t34
+ 47: ADDL $0x298, t34
+ 48: STL t32, (t34)
+ 49: INCEIPL $4
+
+ 0x25471A94: 9361029C stw r27,668(r1)
+ 50: GETL R27, t36
+ 51: GETL R1, t38
+ 52: ADDL $0x29C, t38
+ 53: STL t36, (t38)
+ 54: INCEIPL $4
+
+ 0x25471A98: 938102A0 stw r28,672(r1)
+ 55: GETL R28, t40
+ 56: GETL R1, t42
+ 57: ADDL $0x2A0, t42
+ 58: STL t40, (t42)
+ 59: INCEIPL $4
+
+ 0x25471A9C: 93A102A4 stw r29,676(r1)
+ 60: GETL R29, t44
+ 61: GETL R1, t46
+ 62: ADDL $0x2A4, t46
+ 63: STL t44, (t46)
+ 64: INCEIPL $4
+
+ 0x25471AA0: 93C102A8 stw r30,680(r1)
+ 65: GETL R30, t48
+ 66: GETL R1, t50
+ 67: ADDL $0x2A8, t50
+ 68: STL t48, (t50)
+ 69: INCEIPL $4
+
+ 0x25471AA4: 93E102AC stw r31,684(r1)
+ 70: GETL R31, t52
+ 71: GETL R1, t54
+ 72: ADDL $0x2AC, t54
+ 73: STL t52, (t54)
+ 74: INCEIPL $4
+
+ 0x25471AA8: 90090000 stw r0,0(r9)
+ 75: GETL R0, t56
+ 76: GETL R9, t58
+ 77: STL t56, (t58)
+ 78: INCEIPL $4
+
+ 0x25471AAC: 39290004 addi r9,r9,4
+ 79: GETL R9, t60
+ 80: ADDL $0x4, t60
+ 81: PUTL t60, R9
+ 82: INCEIPL $4
+
+ 0x25471AB0: 4200FFF8 bc 16,0,0x25471AA8
+ 83: GETL CTR, t62
+ 84: ADDL $0xFFFFFFFF, t62
+ 85: PUTL t62, CTR
+ 86: JIFZL t62, $0x25471AB4
+ 87: JMPo $0x25471AA8 ($4)
+
+
+. 0 25471A64 80
+. 7C 08 02 A6 39 60 00 4B 94 21 FD 50 7D 69 03 A6 92 E1 02 8C 90 01 02 B4 7C 77 1B 78 93 01 02 90 38 00 00 00 93 21 02 94 39 21 00 30 93 41 02 98 93 61 02 9C 93 81 02 A0 93 A1 02 A4 93 C1 02 A8 93 E1 02 AC 90 09 00 00 39 29 00 04 42 00 FF F8
+
+==== BB 2 (0x25471AA8) approx BBs exec'd 0 ====
+
+ 0x25471AA8: 90090000 stw r0,0(r9)
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25471AAC: 39290004 addi r9,r9,4
+ 4: GETL R9, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x25471AB0: 4200FFF8 bc 16,0,0x25471AA8
+ 8: GETL CTR, t6
+ 9: ADDL $0xFFFFFFFF, t6
+ 10: PUTL t6, CTR
+ 11: JIFZL t6, $0x25471AB4
+ 12: JMPo $0x25471AA8 ($4)
+
+
+. 0 25471AA8 12
+. 90 09 00 00 39 29 00 04 42 00 FF F8
+
+==== BB 3 (0x25471AB4) approx BBs exec'd 0 ====
+
+ 0x25471AB4: 48000009 bl 0x25471ABC
+ 0: MOVL $0x25471AB8, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25471ABC ($4)
+
+
+. 0 25471AB4 4
+. 48 00 00 09
+
+==== BB 4 (0x25471ABC) approx BBs exec'd 0 ====
+
+ 0x25471ABC: 7CE802A6 mflr r7
+ 0: GETL LR, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x25471AC0: 3B010010 addi r24,r1,16
+ 3: GETL R1, t2
+ 4: ADDL $0x10, t2
+ 5: PUTL t2, R24
+ 6: INCEIPL $4
+
+ 0x25471AC4: 4802553D bl 0x25497000
+ 7: MOVL $0x25471AC8, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0x25497000 ($4)
+
+
+. 0 25471ABC 12
+. 7C E8 02 A6 3B 01 00 10 48 02 55 3D
+
+==== BB 5 (0x25497000) approx BBs exec'd 0 ====
+
+ 0x25497000: 4E800021 blrl
+ 0: GETL LR, t0
+ 1: MOVL $0x25497004, t2
+ 2: PUTL t2, LR
+ 3: JMPo-r t0 ($4)
+
+
+. 0 25497000 4
+. 4E 80 00 21
+
+==== BB 6 (0x25471AC8) approx BBs exec'd 0 ====
+
+ 0x25471AC8: 7D4802A6 mflr r10
+ 0: GETL LR, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x25471ACC: 81870000 lwz r12,0(r7)
+ 3: GETL R7, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R12
+ 6: INCEIPL $4
+
+ 0x25471AD0: 810A0000 lwz r8,0(r10)
+ 7: GETL R10, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R8
+ 10: INCEIPL $4
+
+ 0x25471AD4: 5586302E rlwinm r6,r12,6,0,23
+ 11: GETL R12, t10
+ 12: ROLL $0x6, t10
+ 13: ANDL $0xFFFFFF00, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x25471AD8: 7CC43670 srawi r4,r6,6
+ 16: GETL R6, t12
+ 17: SARL $0x6, t12 (-wCa)
+ 18: PUTL t12, R4
+ 19: INCEIPL $4
+
+ 0x25471ADC: 7CA83850 subf r5,r8,r7
+ 20: GETL R8, t14
+ 21: GETL R7, t16
+ 22: SUBL t14, t16
+ 23: PUTL t16, R5
+ 24: INCEIPL $4
+
+ 0x25471AE0: 39010030 addi r8,r1,48
+ 25: GETL R1, t18
+ 26: ADDL $0x30, t18
+ 27: PUTL t18, R8
+ 28: INCEIPL $4
+
+ 0x25471AE4: 7CE52214 add r7,r5,r4
+ 29: GETL R5, t20
+ 30: GETL R4, t22
+ 31: ADDL t20, t22
+ 32: PUTL t22, R7
+ 33: INCEIPL $4
+
+ 0x25471AE8: 90E10010 stw r7,16(r1)
+ 34: GETL R7, t24
+ 35: GETL R1, t26
+ 36: ADDL $0x10, t26
+ 37: STL t24, (t26)
+ 38: INCEIPL $4
+
+ 0x25471AEC: 806A0000 lwz r3,0(r10)
+ 39: GETL R10, t28
+ 40: LDL (t28), t30
+ 41: PUTL t30, R3
+ 42: INCEIPL $4
+
+ 0x25471AF0: 7C07182E lwzx r0,r7,r3
+ 43: GETL R3, t32
+ 44: GETL R7, t34
+ 45: ADDL t34, t32
+ 46: LDL (t32), t36
+ 47: PUTL t36, R0
+ 48: INCEIPL $4
+
+ 0x25471AF4: 7D271A14 add r9,r7,r3
+ 49: GETL R7, t38
+ 50: GETL R3, t40
+ 51: ADDL t38, t40
+ 52: PUTL t40, R9
+ 53: INCEIPL $4
+
+ 0x25471AF8: 91210018 stw r9,24(r1)
+ 54: GETL R9, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x18, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0x25471AFC: 7D2A4B78 or r10,r9,r9
+ 59: GETL R9, t46
+ 60: PUTL t46, R10
+ 61: INCEIPL $4
+
+ 0x25471B00: 2F800000 cmpi cr7,r0,0
+ 62: GETL R0, t48
+ 63: CMP0L t48, t50 (-rSo)
+ 64: ICRFL t50, $0x7, CR
+ 65: INCEIPL $4
+
+ 0x25471B04: 419E0068 bc 12,30,0x25471B6C
+ 66: Js30o $0x25471B6C
+
+
+. 0 25471AC8 64
+. 7D 48 02 A6 81 87 00 00 81 0A 00 00 55 86 30 2E 7C C4 36 70 7C A8 38 50 39 01 00 30 7C E5 22 14 90 E1 00 10 80 6A 00 00 7C 07 18 2E 7D 27 1A 14 91 21 00 18 7D 2A 4B 78 2F 80 00 00 41 9E 00 68
+
+==== BB 7 (0x25471B08) approx BBs exec'd 0 ====
+
+ 0x25471B08: 3FE06FFF lis r31,28671
+ 0: MOVL $0x6FFF0000, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0x25471B0C: 3F607000 lis r27,28672
+ 3: MOVL $0x70000000, t2
+ 4: PUTL t2, R27
+ 5: INCEIPL $4
+
+ 0x25471B10: 3F406FFF lis r26,28671
+ 6: MOVL $0x6FFF0000, t4
+ 7: PUTL t4, R26
+ 8: INCEIPL $4
+
+ 0x25471B14: 3F206FFF lis r25,28671
+ 9: MOVL $0x6FFF0000, t6
+ 10: PUTL t6, R25
+ 11: INCEIPL $4
+
+ 0x25471B18: 3FA06FFF lis r29,28671
+ 12: MOVL $0x6FFF0000, t8
+ 13: PUTL t8, R29
+ 14: INCEIPL $4
+
+ 0x25471B1C: 3F806FFF lis r28,28671
+ 15: MOVL $0x6FFF0000, t10
+ 16: PUTL t10, R28
+ 17: INCEIPL $4
+
+ 0x25471B20: 7C0B0378 or r11,r0,r0
+ 18: GETL R0, t12
+ 19: PUTL t12, R11
+ 20: INCEIPL $4
+
+ 0x25471B24: 63E6FFFF ori r6,r31,0xFFFF
+ 21: MOVL $0x6FFFFFFF, t14
+ 22: PUTL t14, R6
+ 23: INCEIPL $4
+
+ 0x25471B28: 63650021 ori r5,r27,0x21
+ 24: MOVL $0x70000021, t16
+ 25: PUTL t16, R5
+ 26: INCEIPL $4
+
+ 0x25471B2C: 6344FDFF ori r4,r26,0xFDFF
+ 27: MOVL $0x6FFFFDFF, t18
+ 28: PUTL t18, R4
+ 29: INCEIPL $4
+
+ 0x25471B30: 6323FE34 ori r3,r25,0xFE34
+ 30: MOVL $0x6FFFFE34, t20
+ 31: PUTL t20, R3
+ 32: INCEIPL $4
+
+ 0x25471B34: 63BDFEFF ori r29,r29,0xFEFF
+ 33: MOVL $0x6FFFFEFF, t22
+ 34: PUTL t22, R29
+ 35: INCEIPL $4
+
+ 0x25471B38: 639CFF40 ori r28,r28,0xFF40
+ 36: MOVL $0x6FFFFF40, t24
+ 37: PUTL t24, R28
+ 38: INCEIPL $4
+
+ 0x25471B3C: 2C0B0021 cmpi cr0,r11,33
+ 39: GETL R11, t26
+ 40: MOVL $0x21, t30
+ 41: CMPL t26, t30, t28 (-rSo)
+ 42: ICRFL t28, $0x0, CR
+ 43: INCEIPL $4
+
+ 0x25471B40: 5560103A rlwinm r0,r11,2,0,29
+ 44: GETL R11, t32
+ 45: SHLL $0x2, t32
+ 46: PUTL t32, R0
+ 47: INCEIPL $4
+
+ 0x25471B44: 40810018 bc 4,1,0x25471B5C
+ 48: Jc01o $0x25471B5C
+
+
+. 0 25471B08 64
+. 3F E0 6F FF 3F 60 70 00 3F 40 6F FF 3F 20 6F FF 3F A0 6F FF 3F 80 6F FF 7C 0B 03 78 63 E6 FF FF 63 65 00 21 63 44 FD FF 63 23 FE 34 63 BD FE FF 63 9C FF 40 2C 0B 00 21 55 60 10 3A 40 81 00 18
+
+==== BB 8 (0x25471B5C) approx BBs exec'd 0 ====
+
+ 0x25471B5C: 7D48012E stwx r10,r8,r0
+ 0: GETL R0, t0
+ 1: GETL R8, t2
+ 2: ADDL t2, t0
+ 3: GETL R10, t4
+ 4: STL t4, (t0)
+ 5: INCEIPL $4
+
+ 0x25471B60: 856A0008 lwzu r11,8(r10)
+ 6: GETL R10, t6
+ 7: ADDL $0x8, t6
+ 8: PUTL t6, R10
+ 9: LDL (t6), t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x25471B64: 2C8B0000 cmpi cr1,r11,0
+ 12: GETL R11, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x1, CR
+ 15: INCEIPL $4
+
+ 0x25471B68: 4086FFD4 bc 4,6,0x25471B3C
+ 16: Jc06o $0x25471B3C
+
+
+. 0 25471B5C 16
+. 7D 48 01 2E 85 6A 00 08 2C 8B 00 00 40 86 FF D4
+
+==== BB 9 (0x25471B3C) approx BBs exec'd 0 ====
+
+ 0x25471B3C: 2C0B0021 cmpi cr0,r11,33
+ 0: GETL R11, t0
+ 1: MOVL $0x21, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25471B40: 5560103A rlwinm r0,r11,2,0,29
+ 5: GETL R11, t6
+ 6: SHLL $0x2, t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x25471B44: 40810018 bc 4,1,0x25471B5C
+ 9: Jc01o $0x25471B5C
+
+
+. 0 25471B3C 12
+. 2C 0B 00 21 55 60 10 3A 40 81 00 18
+
+==== BB 10 (0x25471B48) approx BBs exec'd 0 ====
+
+ 0x25471B48: 7C0B3050 subf r0,r11,r6
+ 0: GETL R11, t0
+ 1: GETL R6, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25471B4C: 2880000F cmpli cr1,r0,15
+ 5: GETL R0, t4
+ 6: MOVL $0xF, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x25471B50: 418502D8 bc 12,5,0x25471E28
+ 10: Js05o $0x25471E28
+
+
+. 0 25471B48 12
+. 7C 0B 30 50 28 80 00 0F 41 85 02 D8
+
+==== BB 11 (0x25471B54) approx BBs exec'd 0 ====
+
+ 0x25471B54: 7C0B2850 subf r0,r11,r5
+ 0: GETL R11, t0
+ 1: GETL R5, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25471B58: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25471B5C: 7D48012E stwx r10,r8,r0
+ 9: GETL R0, t6
+ 10: GETL R8, t8
+ 11: ADDL t8, t6
+ 12: GETL R10, t10
+ 13: STL t10, (t6)
+ 14: INCEIPL $4
+
+ 0x25471B60: 856A0008 lwzu r11,8(r10)
+ 15: GETL R10, t12
+ 16: ADDL $0x8, t12
+ 17: PUTL t12, R10
+ 18: LDL (t12), t14
+ 19: PUTL t14, R11
+ 20: INCEIPL $4
+
+ 0x25471B64: 2C8B0000 cmpi cr1,r11,0
+ 21: GETL R11, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x1, CR
+ 24: INCEIPL $4
+
+ 0x25471B68: 4086FFD4 bc 4,6,0x25471B3C
+ 25: Jc06o $0x25471B3C
+
+
+. 0 25471B54 24
+. 7C 0B 28 50 54 00 10 3A 7D 48 01 2E 85 6A 00 08 2C 8B 00 00 40 86 FF D4
+
+==== BB 12 (0x25471E28) approx BBs exec'd 0 ====
+
+ 0x25471E28: 5579083C rlwinm r25,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0x25471E2C: 7F2C0E70 srawi r12,r25,1
+ 4: GETL R25, t2
+ 5: SARL $0x1, t2 (-wCa)
+ 6: PUTL t2, R12
+ 7: INCEIPL $4
+
+ 0x25471E30: 7D8960F8 nor r9,r12,r12
+ 8: GETL R12, t4
+ 9: NOTL t4
+ 10: PUTL t4, R9
+ 11: INCEIPL $4
+
+ 0x25471E34: 200C0031 subfic r0,r12,49
+ 12: GETL R12, t6
+ 13: MOVL $0x31, t8
+ 14: SBBL t6, t8 (-wCa)
+ 15: PUTL t8, R0
+ 16: INCEIPL $4
+
+ 0x25471E38: 2B090002 cmpli cr6,r9,2
+ 17: GETL R9, t10
+ 18: MOVL $0x2, t14
+ 19: CMPUL t10, t14, t12 (-rSo)
+ 20: ICRFL t12, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x25471E3C: 40B9FD1C bc 5,25,0x25471B58
+ 22: Jc25o $0x25471B58
+
+
+. 0 25471E28 24
+. 55 79 08 3C 7F 2C 0E 70 7D 89 60 F8 20 0C 00 31 2B 09 00 02 40 B9 FD 1C
+
+==== BB 13 (0x25471E40) approx BBs exec'd 0 ====
+
+ 0x25471E40: 7F4B2050 subf r26,r11,r4
+ 0: GETL R11, t0
+ 1: GETL R4, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25471E44: 2B9A000B cmpli cr7,r26,11
+ 5: GETL R26, t4
+ 6: MOVL $0xB, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x25471E48: 419D0010 bc 12,29,0x25471E58
+ 10: Js29o $0x25471E58
+
+
+. 0 25471E40 12
+. 7F 4B 20 50 2B 9A 00 0B 41 9D 00 10
+
+==== BB 14 (0x25471E4C) approx BBs exec'd 0 ====
+
+ 0x25471E4C: 7C0B1850 subf r0,r11,r3
+ 0: GETL R11, t0
+ 1: GETL R3, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25471E50: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25471E54: 4BFFFD08 b 0x25471B5C
+ 9: JMPo $0x25471B5C ($4)
+
+
+. 0 25471E4C 12
+. 7C 0B 18 50 54 00 10 3A 4B FF FD 08
+
+==== BB 15 (0x25471B6C) approx BBs exec'd 0 ====
+
+ 0x25471B6C: 81780000 lwz r11,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25471B70: 2F0B0000 cmpi cr6,r11,0
+ 4: GETL R11, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x25471B74: 419A00B0 bc 12,26,0x25471C24
+ 8: Js26o $0x25471C24
+
+
+. 0 25471B6C 12
+. 81 78 00 00 2F 0B 00 00 41 9A 00 B0
+
+==== BB 16 (0x25471B78) approx BBs exec'd 0 ====
+
+ 0x25471B78: 81280010 lwz r9,16(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25471B7C: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25471B80: 419E0010 bc 12,30,0x25471B90
+ 9: Js30o $0x25471B90
+
+
+. 0 25471B78 12
+. 81 28 00 10 2F 89 00 00 41 9E 00 10
+
+==== BB 17 (0x25471B84) approx BBs exec'd 0 ====
+
+ 0x25471B84: 81490004 lwz r10,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25471B88: 7C6A5A14 add r3,r10,r11
+ 5: GETL R10, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25471B8C: 90690004 stw r3,4(r9)
+ 10: GETL R3, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471B90: 8128000C lwz r9,12(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0xC, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471B94: 2C090000 cmpi cr0,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x25471B98: 41820010 bc 12,2,0x25471BA8
+ 24: Js02o $0x25471BA8
+
+
+. 0 25471B84 24
+. 81 49 00 04 7C 6A 5A 14 90 69 00 04 81 28 00 0C 2C 09 00 00 41 82 00 10
+
+==== BB 18 (0x25471B9C) approx BBs exec'd 0 ====
+
+ 0x25471B9C: 80A90004 lwz r5,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25471BA0: 7C855A14 add r4,r5,r11
+ 5: GETL R5, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25471BA4: 90890004 stw r4,4(r9)
+ 10: GETL R4, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471BA8: 81280014 lwz r9,20(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x14, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471BAC: 2C890000 cmpi cr1,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x1, CR
+ 23: INCEIPL $4
+
+ 0x25471BB0: 41860010 bc 12,6,0x25471BC0
+ 24: Js06o $0x25471BC0
+
+
+. 0 25471B9C 24
+. 80 A9 00 04 7C 85 5A 14 90 89 00 04 81 28 00 14 2C 89 00 00 41 86 00 10
+
+==== BB 19 (0x25471BB4) approx BBs exec'd 0 ====
+
+ 0x25471BB4: 80E90004 lwz r7,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25471BB8: 7CC75A14 add r6,r7,r11
+ 5: GETL R7, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x25471BBC: 90C90004 stw r6,4(r9)
+ 10: GETL R6, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471BC0: 81280018 lwz r9,24(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x18, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471BC4: 2F090000 cmpi cr6,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x6, CR
+ 23: INCEIPL $4
+
+ 0x25471BC8: 419A0010 bc 12,26,0x25471BD8
+ 24: Js26o $0x25471BD8
+
+
+. 0 25471BB4 24
+. 80 E9 00 04 7C C7 5A 14 90 C9 00 04 81 28 00 18 2F 09 00 00 41 9A 00 10
+
+==== BB 20 (0x25471BCC) approx BBs exec'd 0 ====
+
+ 0x25471BCC: 83A90004 lwz r29,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25471BD0: 7F9D5A14 add r28,r29,r11
+ 5: GETL R29, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25471BD4: 93890004 stw r28,4(r9)
+ 10: GETL R28, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471BD8: 8128001C lwz r9,28(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x1C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471BDC: 2F890000 cmpi cr7,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x7, CR
+ 23: INCEIPL $4
+
+ 0x25471BE0: 419E0010 bc 12,30,0x25471BF0
+ 24: Js30o $0x25471BF0
+
+
+. 0 25471BCC 24
+. 83 A9 00 04 7F 9D 5A 14 93 89 00 04 81 28 00 1C 2F 89 00 00 41 9E 00 10
+
+==== BB 21 (0x25471BE4) approx BBs exec'd 0 ====
+
+ 0x25471BE4: 80090004 lwz r0,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25471BE8: 7FE05A14 add r31,r0,r11
+ 5: GETL R0, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0x25471BEC: 93E90004 stw r31,4(r9)
+ 10: GETL R31, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471BF0: 8128005C lwz r9,92(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x5C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471BF4: 2C090000 cmpi cr0,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x25471BF8: 41820010 bc 12,2,0x25471C08
+ 24: Js02o $0x25471C08
+
+
+. 0 25471BE4 24
+. 80 09 00 04 7F E0 5A 14 93 E9 00 04 81 28 00 5C 2C 09 00 00 41 82 00 10
+
+==== BB 22 (0x25471BFC) approx BBs exec'd 0 ====
+
+ 0x25471BFC: 83290004 lwz r25,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x25471C00: 7D995A14 add r12,r25,r11
+ 5: GETL R25, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25471C04: 91890004 stw r12,4(r9)
+ 10: GETL R12, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471C08: 812800C4 lwz r9,196(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0xC4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25471C0C: 2C890000 cmpi cr1,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x1, CR
+ 23: INCEIPL $4
+
+ 0x25471C10: 41860010 bc 12,6,0x25471C20
+ 24: Js06o $0x25471C20
+
+
+. 0 25471BFC 24
+. 83 29 00 04 7D 99 5A 14 91 89 00 04 81 28 00 C4 2C 89 00 00 41 86 00 10
+
+==== BB 23 (0x25471C14) approx BBs exec'd 0 ====
+
+ 0x25471C14: 83490004 lwz r26,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25471C18: 7D1A5A14 add r8,r26,r11
+ 5: GETL R26, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x25471C1C: 91090004 stw r8,4(r9)
+ 10: GETL R8, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471C20: 80E10010 lwz r7,16(r1)
+ 15: GETL R1, t12
+ 16: ADDL $0x10, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R7
+ 19: INCEIPL $4
+
+ 0x25471C24: 2F070000 cmpi cr6,r7,0
+ 20: GETL R7, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x6, CR
+ 23: INCEIPL $4
+
+ 0x25471C28: 3960FFFF li r11,-1
+ 24: MOVL $0xFFFFFFFF, t20
+ 25: PUTL t20, R11
+ 26: INCEIPL $4
+
+ 0x25471C2C: 9161023C stw r11,572(r1)
+ 27: GETL R11, t22
+ 28: GETL R1, t24
+ 29: ADDL $0x23C, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0x25471C30: 409A0010 bc 4,26,0x25471C40
+ 32: Jc26o $0x25471C40
+
+
+. 0 25471C14 32
+. 83 49 00 04 7D 1A 5A 14 91 09 00 04 80 E1 00 10 2F 07 00 00 39 60 FF FF 91 61 02 3C 40 9A 00 10
+
+==== BB 24 (0x25471C40) approx BBs exec'd 0 ====
+
+ 0x25471C40: 7F03C378 or r3,r24,r24
+ 0: GETL R24, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25471C44: 38800000 li r4,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25471C48: 38A00000 li r5,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x25471C4C: 3B600000 li r27,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R27
+ 11: INCEIPL $4
+
+ 0x25471C50: 4800EBE1 bl 0x25480830
+ 12: MOVL $0x25471C54, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25480830 ($4)
+
+
+. 0 25471C40 20
+. 7F 03 C3 78 38 80 00 00 38 A0 00 00 3B 60 00 00 48 00 EB E1
+
+==== BB 25 __elf_machine_runtime_setup(0x25480830) approx BBs exec'd 0 ====
+
+ 0x25480830: 7CC802A6 mflr r6
+ 0: GETL LR, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x25480834: 9421FFD0 stwu r1,-48(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFD0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x25480838: 7D800026 mfcr r12
+ 9: GETL CR, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x2548083C: 480167C5 bl 0x25497000
+ 12: MOVL $0x25480840, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25497000 ($4)
+
+
+. 0 25480830 16
+. 7C C8 02 A6 94 21 FF D0 7D 80 00 26 48 01 67 C5
+
+==== BB 26 (0x25480840) approx BBs exec'd 0 ====
+
+ 0x25480840: 93210014 stw r25,20(r1)
+ 0: GETL R25, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25480844: 7C992378 or r25,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R25
+ 7: INCEIPL $4
+
+ 0x25480848: 90C10034 stw r6,52(r1)
+ 8: GETL R6, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x34, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2548084C: 8003007C lwz r0,124(r3)
+ 13: GETL R3, t10
+ 14: ADDL $0x7C, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R0
+ 17: INCEIPL $4
+
+ 0x25480850: 93A10024 stw r29,36(r1)
+ 18: GETL R29, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x24, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25480854: 7C7D1B78 or r29,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x25480858: 2F800000 cmpi cr7,r0,0
+ 26: GETL R0, t20
+ 27: CMP0L t20, t22 (-rSo)
+ 28: ICRFL t22, $0x7, CR
+ 29: INCEIPL $4
+
+ 0x2548085C: 93C10028 stw r30,40(r1)
+ 30: GETL R30, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x28, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x25480860: 92E1000C stw r23,12(r1)
+ 35: GETL R23, t28
+ 36: GETL R1, t30
+ 37: ADDL $0xC, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x25480864: 7FC802A6 mflr r30
+ 40: GETL LR, t32
+ 41: PUTL t32, R30
+ 42: INCEIPL $4
+
+ 0x25480868: 93010010 stw r24,16(r1)
+ 43: GETL R24, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x10, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x2548086C: 93410018 stw r26,24(r1)
+ 48: GETL R26, t38
+ 49: GETL R1, t40
+ 50: ADDL $0x18, t40
+ 51: STL t38, (t40)
+ 52: INCEIPL $4
+
+ 0x25480870: 9361001C stw r27,28(r1)
+ 53: GETL R27, t42
+ 54: GETL R1, t44
+ 55: ADDL $0x1C, t44
+ 56: STL t42, (t44)
+ 57: INCEIPL $4
+
+ 0x25480874: 93810020 stw r28,32(r1)
+ 58: GETL R28, t46
+ 59: GETL R1, t48
+ 60: ADDL $0x20, t48
+ 61: STL t46, (t48)
+ 62: INCEIPL $4
+
+ 0x25480878: 93E1002C stw r31,44(r1)
+ 63: GETL R31, t50
+ 64: GETL R1, t52
+ 65: ADDL $0x2C, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0x2548087C: 91810008 stw r12,8(r1)
+ 68: GETL R12, t54
+ 69: GETL R1, t56
+ 70: ADDL $0x8, t56
+ 71: STL t54, (t56)
+ 72: INCEIPL $4
+
+ 0x25480880: 419E0294 bc 12,30,0x25480B14
+ 73: Js30o $0x25480B14
+
+
+. 0 25480840 68
+. 93 21 00 14 7C 99 23 78 90 C1 00 34 80 03 00 7C 93 A1 00 24 7C 7D 1B 78 2F 80 00 00 93 C1 00 28 92 E1 00 0C 7F C8 02 A6 93 01 00 10 93 41 00 18 93 61 00 1C 93 81 00 20 93 E1 00 2C 91 81 00 08 41 9E 02 94
+
+==== BB 27 (0x25480884) approx BBs exec'd 0 ====
+
+ 0x25480884: 82E30028 lwz r23,40(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x28, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x25480888: 3D40AAAA lis r10,-21846
+ 5: MOVL $0xAAAA0000, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0x2548088C: 6148AAAB ori r8,r10,0xAAAB
+ 8: MOVL $0xAAAAAAAB, t6
+ 9: PUTL t6, R8
+ 10: INCEIPL $4
+
+ 0x25480890: 8083002C lwz r4,44(r3)
+ 11: GETL R3, t8
+ 12: ADDL $0x2C, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0x25480894: 80F70004 lwz r7,4(r23)
+ 16: GETL R23, t12
+ 17: ADDL $0x4, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R7
+ 20: INCEIPL $4
+
+ 0x25480898: 83E40004 lwz r31,4(r4)
+ 21: GETL R4, t16
+ 22: ADDL $0x4, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0x2548089C: 7D674016 mulhwu r11,r7,r8
+ 26: GETL R7, t20
+ 27: GETL R8, t22
+ 28: UMULHL t20, t22
+ 29: PUTL t22, R11
+ 30: INCEIPL $4
+
+ 0x254808A0: 557BE8FE rlwinm r27,r11,29,3,31
+ 31: GETL R11, t24
+ 32: SHRL $0x3, t24
+ 33: PUTL t24, R27
+ 34: INCEIPL $4
+
+ 0x254808A4: 281B2000 cmpli cr0,r27,8192
+ 35: GETL R27, t26
+ 36: MOVL $0x2000, t30
+ 37: CMPUL t26, t30, t28 (-rSo)
+ 38: ICRFL t28, $0x0, CR
+ 39: INCEIPL $4
+
+ 0x254808A8: 5763083C rlwinm r3,r27,1,0,30
+ 40: GETL R27, t32
+ 41: SHLL $0x1, t32
+ 42: PUTL t32, R3
+ 43: INCEIPL $4
+
+ 0x254808AC: 38030012 addi r0,r3,18
+ 44: GETL R3, t34
+ 45: ADDL $0x12, t34
+ 46: PUTL t34, R0
+ 47: INCEIPL $4
+
+ 0x254808B0: 7D201A14 add r9,r0,r3
+ 48: GETL R0, t36
+ 49: GETL R3, t38
+ 50: ADDL t36, t38
+ 51: PUTL t38, R9
+ 52: INCEIPL $4
+
+ 0x254808B4: 3AE9C000 addi r23,r9,-16384
+ 53: GETL R9, t40
+ 54: ADDL $0xFFFFC000, t40
+ 55: PUTL t40, R23
+ 56: INCEIPL $4
+
+ 0x254808B8: 4081029C bc 4,1,0x25480B54
+ 57: Jc01o $0x25480B54
+
+
+. 0 25480884 56
+. 82 E3 00 28 3D 40 AA AA 61 48 AA AB 80 83 00 2C 80 F7 00 04 83 E4 00 04 7D 67 40 16 55 7B E8 FE 28 1B 20 00 57 63 08 3C 38 03 00 12 7D 20 1A 14 3A E9 C0 00 40 81 02 9C
+
+==== BB 28 (0x25480B54) approx BBs exec'd 0 ====
+
+ 0x25480B54: 7C170378 or r23,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R23
+ 2: INCEIPL $4
+
+ 0x25480B58: 4BFFFD64 b 0x254808BC
+ 3: JMPo $0x254808BC ($4)
+
+
+. 0 25480B54 8
+. 7C 17 03 78 4B FF FD 64
+
+==== BB 29 (0x254808BC) approx BBs exec'd 0 ====
+
+ 0x254808BC: 56E8103A rlwinm r8,r23,2,0,29
+ 0: GETL R23, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x254808C0: 2E190000 cmpi cr4,r25,0
+ 4: GETL R25, t2
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x4, CR
+ 7: INCEIPL $4
+
+ 0x254808C4: 7F48FA14 add r26,r8,r31
+ 8: GETL R8, t6
+ 9: GETL R31, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x254808C8: 3C607D69 lis r3,32105
+ 13: MOVL $0x7D690000, t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0x254808CC: 3CFA0001 addis r7,r26,1
+ 16: GETL R26, t12
+ 17: ADDL $0x10000, t12
+ 18: PUTL t12, R7
+ 19: INCEIPL $4
+
+ 0x254808D0: 574B043E rlwinm r11,r26,0,16,31
+ 20: GETL R26, t14
+ 21: ANDL $0xFFFF, t14
+ 22: PUTL t14, R11
+ 23: INCEIPL $4
+
+ 0x254808D4: 38878000 addi r4,r7,-32768
+ 24: GETL R7, t16
+ 25: ADDL $0xFFFF8000, t16
+ 26: PUTL t16, R4
+ 27: INCEIPL $4
+
+ 0x254808D8: 3CC04E80 lis r6,20096
+ 28: MOVL $0x4E800000, t18
+ 29: PUTL t18, R6
+ 30: INCEIPL $4
+
+ 0x254808DC: 5489843E rlwinm r9,r4,16,16,31
+ 31: GETL R4, t20
+ 32: SHRL $0x10, t20
+ 33: PUTL t20, R9
+ 34: INCEIPL $4
+
+ 0x254808E0: 6560816B oris r0,r11,0x816B
+ 35: GETL R11, t22
+ 36: ORL $0x816B0000, t22
+ 37: PUTL t22, R0
+ 38: INCEIPL $4
+
+ 0x254808E4: 652C3D6B oris r12,r9,0x3D6B
+ 39: GETL R9, t24
+ 40: ORL $0x3D6B0000, t24
+ 41: PUTL t24, R12
+ 42: INCEIPL $4
+
+ 0x254808E8: 607C03A6 ori r28,r3,0x3A6
+ 43: MOVL $0x7D6903A6, t26
+ 44: PUTL t26, R28
+ 45: INCEIPL $4
+
+ 0x254808EC: 60D80420 ori r24,r6,0x420
+ 46: MOVL $0x4E800420, t28
+ 47: PUTL t28, R24
+ 48: INCEIPL $4
+
+ 0x254808F0: 919F0000 stw r12,0(r31)
+ 49: GETL R12, t30
+ 50: GETL R31, t32
+ 51: STL t30, (t32)
+ 52: INCEIPL $4
+
+ 0x254808F4: 901F0004 stw r0,4(r31)
+ 53: GETL R0, t34
+ 54: GETL R31, t36
+ 55: ADDL $0x4, t36
+ 56: STL t34, (t36)
+ 57: INCEIPL $4
+
+ 0x254808F8: 939F0008 stw r28,8(r31)
+ 58: GETL R28, t38
+ 59: GETL R31, t40
+ 60: ADDL $0x8, t40
+ 61: STL t38, (t40)
+ 62: INCEIPL $4
+
+ 0x254808FC: 931F000C stw r24,12(r31)
+ 63: GETL R24, t42
+ 64: GETL R31, t44
+ 65: ADDL $0xC, t44
+ 66: STL t42, (t44)
+ 67: INCEIPL $4
+
+ 0x25480900: 41920178 bc 12,18,0x25480A78
+ 68: Js18o $0x25480A78
+
+
+. 0 254808BC 72
+. 56 E8 10 3A 2E 19 00 00 7F 48 FA 14 3C 60 7D 69 3C FA 00 01 57 4B 04 3E 38 87 80 00 3C C0 4E 80 54 89 84 3E 65 60 81 6B 65 2C 3D 6B 60 7C 03 A6 60 D8 04 20 91 9F 00 00 90 1F 00 04 93 9F 00 08 93 1F 00 0C 41 92 01 78
+
+==== BB 30 (0x25480A78) approx BBs exec'd 0 ====
+
+ 0x25480A78: 817E04F0 lwz r11,1264(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25480A7C: 3159FFFF addic r10,r25,-1
+ 5: GETL R25, t4
+ 6: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x25480A80: 7CAAC910 subfe r5,r10,r25
+ 9: GETL R10, t6
+ 10: GETL R25, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0x25480A84: 314BFFFF addic r10,r11,-1
+ 14: GETL R11, t10
+ 15: ADCL $0xFFFFFFFF, t10 (-wCa)
+ 16: PUTL t10, R10
+ 17: INCEIPL $4
+
+ 0x25480A88: 7C8A5910 subfe r4,r10,r11
+ 18: GETL R10, t12
+ 19: GETL R11, t14
+ 20: SBBL t12, t14 (-rCa-wCa)
+ 21: PUTL t14, R4
+ 22: INCEIPL $4
+
+ 0x25480A8C: 7CAA2039 and. r10,r5,r4
+ 23: GETL R5, t16
+ 24: GETL R4, t18
+ 25: ANDL t16, t18
+ 26: PUTL t18, R10
+ 27: CMP0L t18, t20 (-rSo)
+ 28: ICRFL t20, $0x0, CR
+ 29: INCEIPL $4
+
+ 0x25480A90: 39400004 li r10,4
+ 30: MOVL $0x4, t22
+ 31: PUTL t22, R10
+ 32: INCEIPL $4
+
+ 0x25480A94: 41820010 bc 12,2,0x25480AA4
+ 33: Js02o $0x25480AA4
+
+
+. 0 25480A78 32
+. 81 7E 04 F0 31 59 FF FF 7C AA C9 10 31 4B FF FF 7C 8A 59 10 7C AA 20 39 39 40 00 04 41 82 00 10
+
+==== BB 31 (0x25480AA4) approx BBs exec'd 0 ====
+
+ 0x25480AA4: 419200B8 bc 12,18,0x25480B5C
+ 0: Js18o $0x25480B5C
+
+
+. 0 25480AA4 4
+. 41 92 00 B8
+
+==== BB 32 (0x25480B5C) approx BBs exec'd 0 ====
+
+ 0x25480B5C: 39600006 li r11,6
+ 0: MOVL $0x6, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x25480B60: 4BFFFF4C b 0x25480AAC
+ 3: JMPo $0x25480AAC ($4)
+
+
+. 0 25480B5C 8
+. 39 60 00 06 4B FF FF 4C
+
+==== BB 33 (0x25480AAC) approx BBs exec'd 0 ====
+
+ 0x25480AAC: 39200000 li r9,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25480AB0: 48000014 b 0x25480AC4
+ 3: JMPo $0x25480AC4 ($4)
+
+
+. 0 25480AAC 8
+. 39 20 00 00 48 00 00 14
+
+==== BB 34 (0x25480AC4) approx BBs exec'd 0 ====
+
+ 0x25480AC4: 7E095840 cmpl cr4,r9,r11
+ 0: GETL R9, t0
+ 1: GETL R11, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x25480AC8: 4190FFEC bc 12,16,0x25480AB4
+ 5: Js16o $0x25480AB4
+
+
+. 0 25480AC4 8
+. 7E 09 58 40 41 90 FF EC
+
+==== BB 35 (0x25480AB4) approx BBs exec'd 0 ====
+
+ 0x25480AB4: 553A103A rlwinm r26,r9,2,0,29
+ 0: GETL R9, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x25480AB8: 7EFAFA14 add r23,r26,r31
+ 4: GETL R26, t2
+ 5: GETL R31, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R23
+ 8: INCEIPL $4
+
+ 0x25480ABC: 7C00B86C dcbst r0,r23
+ 9: INCEIPL $4
+
+ 0x25480AC0: 7D295214 add r9,r9,r10
+ 10: GETL R9, t6
+ 11: GETL R10, t8
+ 12: ADDL t6, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x25480AC4: 7E095840 cmpl cr4,r9,r11
+ 15: GETL R9, t10
+ 16: GETL R11, t12
+ 17: CMPUL t10, t12, t14 (-rSo)
+ 18: ICRFL t14, $0x4, CR
+ 19: INCEIPL $4
+
+ 0x25480AC8: 4190FFEC bc 12,16,0x25480AB4
+ 20: Js16o $0x25480AB4
+
+
+. 0 25480AB4 24
+. 55 3A 10 3A 7E FA FA 14 7C 00 B8 6C 7D 29 52 14 7E 09 58 40 41 90 FF EC
+
+==== BB 36 (0x25480ACC) approx BBs exec'd 0 ====
+
+ 0x25480ACC: 5568103A rlwinm r8,r11,2,0,29
+ 0: GETL R11, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x25480AD0: 7CE8FA14 add r7,r8,r31
+ 4: GETL R8, t2
+ 5: GETL R31, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x25480AD4: 3927FFFC addi r9,r7,-4
+ 9: GETL R7, t6
+ 10: ADDL $0xFFFFFFFC, t6
+ 11: PUTL t6, R9
+ 12: INCEIPL $4
+
+ 0x25480AD8: 7C00486C dcbst r0,r9
+ 13: INCEIPL $4
+
+ 0x25480ADC: 7C0004AC sync
+ 14: INCEIPL $4
+
+ 0x25480AE0: 39200000 li r9,0
+ 15: MOVL $0x0, t8
+ 16: PUTL t8, R9
+ 17: INCEIPL $4
+
+ 0x25480AE4: 48000014 b 0x25480AF8
+ 18: JMPo $0x25480AF8 ($4)
+
+
+. 0 25480ACC 28
+. 55 68 10 3A 7C E8 FA 14 39 27 FF FC 7C 00 48 6C 7C 00 04 AC 39 20 00 00 48 00 00 14
+
+==== BB 37 (0x25480AF8) approx BBs exec'd 0 ====
+
+ 0x25480AF8: 7F895840 cmpl cr7,r9,r11
+ 0: GETL R9, t0
+ 1: GETL R11, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25480AFC: 419CFFEC bc 12,28,0x25480AE8
+ 5: Js28o $0x25480AE8
+
+
+. 0 25480AF8 8
+. 7F 89 58 40 41 9C FF EC
+
+==== BB 38 (0x25480AE8) approx BBs exec'd 0 ====
+
+ 0x25480AE8: 553B103A rlwinm r27,r9,2,0,29
+ 0: GETL R9, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25480AEC: 7CDBFA14 add r6,r27,r31
+ 4: GETL R27, t2
+ 5: GETL R31, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x25480AF0: 7C0037AC icbi r0,r6
+ 9: GETL R6, t6
+ 10: CALLM_So
+ 11: PUSHL t6
+ 12: CALLMo $0x68
+ 13: CALLM_Eo
+ 14: INCEIPL $4
+
+ 0x25480AF4: 7D295214 add r9,r9,r10
+ 15: GETL R9, t8
+ 16: GETL R10, t10
+ 17: ADDL t8, t10
+ 18: PUTL t10, R9
+ 19: INCEIPL $4
+
+ 0x25480AF8: 7F895840 cmpl cr7,r9,r11
+ 20: GETL R9, t12
+ 21: GETL R11, t14
+ 22: CMPUL t12, t14, t16 (-rSo)
+ 23: ICRFL t16, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x25480AFC: 419CFFEC bc 12,28,0x25480AE8
+ 25: Js28o $0x25480AE8
+
+
+. 0 25480AE8 24
+. 55 3B 10 3A 7C DB FA 14 7C 00 37 AC 7D 29 52 14 7F 89 58 40 41 9C FF EC
+
+==== BB 39 (0x25480B00) approx BBs exec'd 0 ====
+
+ 0x25480B00: 7C68FA14 add r3,r8,r31
+ 0: GETL R8, t0
+ 1: GETL R31, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25480B04: 3BE3FFFC addi r31,r3,-4
+ 5: GETL R3, t4
+ 6: ADDL $0xFFFFFFFC, t4
+ 7: PUTL t4, R31
+ 8: INCEIPL $4
+
+ 0x25480B08: 7C00FFAC icbi r0,r31
+ 9: GETL R31, t6
+ 10: CALLM_So
+ 11: PUSHL t6
+ 12: CALLMo $0x68
+ 13: CALLM_Eo
+ 14: INCEIPL $4
+
+ 0x25480B0C: 7C0004AC sync
+ 15: INCEIPL $4
+
+ 0x25480B10: 4C00012C 16: INCEIPL $4
+
+ 0x25480B14: 7F23CB78 or r3,r25,r25
+ 17: GETL R25, t8
+ 18: PUTL t8, R3
+ 19: INCEIPL $4
+
+ 0x25480B18: 81010008 lwz r8,8(r1)
+ 20: GETL R1, t10
+ 21: ADDL $0x8, t10
+ 22: LDL (t10), t12
+ 23: PUTL t12, R8
+ 24: INCEIPL $4
+
+ 0x25480B1C: 83210034 lwz r25,52(r1)
+ 25: GETL R1, t14
+ 26: ADDL $0x34, t14
+ 27: LDL (t14), t16
+ 28: PUTL t16, R25
+ 29: INCEIPL $4
+
+ 0x25480B20: 82E1000C lwz r23,12(r1)
+ 30: GETL R1, t18
+ 31: ADDL $0xC, t18
+ 32: LDL (t18), t20
+ 33: PUTL t20, R23
+ 34: INCEIPL $4
+
+ 0x25480B24: 7D008120 mtcrf 0x8,r8
+ 35: GETL R8, t22
+ 36: ICRFL t22, $0x4, CR
+ 37: INCEIPL $4
+
+ 0x25480B28: 7F2803A6 mtlr r25
+ 38: GETL R25, t24
+ 39: PUTL t24, LR
+ 40: INCEIPL $4
+
+ 0x25480B2C: 83010010 lwz r24,16(r1)
+ 41: GETL R1, t26
+ 42: ADDL $0x10, t26
+ 43: LDL (t26), t28
+ 44: PUTL t28, R24
+ 45: INCEIPL $4
+
+ 0x25480B30: 83210014 lwz r25,20(r1)
+ 46: GETL R1, t30
+ 47: ADDL $0x14, t30
+ 48: LDL (t30), t32
+ 49: PUTL t32, R25
+ 50: INCEIPL $4
+
+ 0x25480B34: 83410018 lwz r26,24(r1)
+ 51: GETL R1, t34
+ 52: ADDL $0x18, t34
+ 53: LDL (t34), t36
+ 54: PUTL t36, R26
+ 55: INCEIPL $4
+
+ 0x25480B38: 8361001C lwz r27,28(r1)
+ 56: GETL R1, t38
+ 57: ADDL $0x1C, t38
+ 58: LDL (t38), t40
+ 59: PUTL t40, R27
+ 60: INCEIPL $4
+
+ 0x25480B3C: 83810020 lwz r28,32(r1)
+ 61: GETL R1, t42
+ 62: ADDL $0x20, t42
+ 63: LDL (t42), t44
+ 64: PUTL t44, R28
+ 65: INCEIPL $4
+
+ 0x25480B40: 83A10024 lwz r29,36(r1)
+ 66: GETL R1, t46
+ 67: ADDL $0x24, t46
+ 68: LDL (t46), t48
+ 69: PUTL t48, R29
+ 70: INCEIPL $4
+
+ 0x25480B44: 83C10028 lwz r30,40(r1)
+ 71: GETL R1, t50
+ 72: ADDL $0x28, t50
+ 73: LDL (t50), t52
+ 74: PUTL t52, R30
+ 75: INCEIPL $4
+
+ 0x25480B48: 83E1002C lwz r31,44(r1)
+ 76: GETL R1, t54
+ 77: ADDL $0x2C, t54
+ 78: LDL (t54), t56
+ 79: PUTL t56, R31
+ 80: INCEIPL $4
+
+ 0x25480B4C: 38210030 addi r1,r1,48
+ 81: GETL R1, t58
+ 82: ADDL $0x30, t58
+ 83: PUTL t58, R1
+ 84: INCEIPL $4
+
+ 0x25480B50: 4E800020 blr
+ 85: GETL LR, t60
+ 86: JMPo-r t60 ($4)
+
+
+. 0 25480B00 84
+. 7C 68 FA 14 3B E3 FF FC 7C 00 FF AC 7C 00 04 AC 4C 00 01 2C 7F 23 CB 78 81 01 00 08 83 21 00 34 82 E1 00 0C 7D 00 81 20 7F 28 03 A6 83 01 00 10 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+==== BB 40 (0x25471C54) approx BBs exec'd 0 ====
+
+ 0x25471C54: 38E00000 li r7,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x25471C58: 8161004C lwz r11,76(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x4C, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x25471C5C: 39400001 li r10,1
+ 8: MOVL $0x1, t6
+ 9: PUTL t6, R10
+ 10: INCEIPL $4
+
+ 0x25471C60: 91410264 stw r10,612(r1)
+ 11: GETL R10, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x264, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25471C64: 2C0B0000 cmpi cr0,r11,0
+ 16: GETL R11, t12
+ 17: CMP0L t12, t14 (-rSo)
+ 18: ICRFL t14, $0x0, CR
+ 19: INCEIPL $4
+
+ 0x25471C68: 93610260 stw r27,608(r1)
+ 20: GETL R27, t16
+ 21: GETL R1, t18
+ 22: ADDL $0x260, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25471C6C: 93610270 stw r27,624(r1)
+ 25: GETL R27, t20
+ 26: GETL R1, t22
+ 27: ADDL $0x270, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0x25471C70: 93610258 stw r27,600(r1)
+ 30: GETL R27, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x258, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x25471C74: 9361026C stw r27,620(r1)
+ 35: GETL R27, t28
+ 36: GETL R1, t30
+ 37: ADDL $0x26C, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x25471C78: 90E10254 stw r7,596(r1)
+ 40: GETL R7, t32
+ 41: GETL R1, t34
+ 42: ADDL $0x254, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0x25471C7C: 41820018 bc 12,2,0x25471C94
+ 45: Js02o $0x25471C94
+
+
+. 0 25471C54 44
+. 38 E0 00 00 81 61 00 4C 39 40 00 01 91 41 02 64 2C 0B 00 00 93 61 02 60 93 61 02 70 93 61 02 58 93 61 02 6C 90 E1 02 54 41 82 00 18
+
+==== BB 41 (0x25471C80) approx BBs exec'd 0 ====
+
+ 0x25471C80: 80AB0004 lwz r5,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25471C84: 80810050 lwz r4,80(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x50, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25471C88: 90A10250 stw r5,592(r1)
+ 10: GETL R5, t8
+ 11: GETL R1, t10
+ 12: ADDL $0x250, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25471C8C: 80E40004 lwz r7,4(r4)
+ 15: GETL R4, t12
+ 16: ADDL $0x4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R7
+ 19: INCEIPL $4
+
+ 0x25471C90: 90E10254 stw r7,596(r1)
+ 20: GETL R7, t16
+ 21: GETL R1, t18
+ 22: ADDL $0x254, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25471C94: 2C830000 cmpi cr1,r3,0
+ 25: GETL R3, t20
+ 26: CMP0L t20, t22 (-rSo)
+ 27: ICRFL t22, $0x1, CR
+ 28: INCEIPL $4
+
+ 0x25471C98: 41860010 bc 12,6,0x25471CA8
+ 29: Js06o $0x25471CA8
+
+
+. 0 25471C80 28
+. 80 AB 00 04 80 81 00 50 90 A1 02 50 80 E4 00 04 90 E1 02 54 2C 83 00 00 41 86 00 10
+
+==== BB 42 (0x25471CA8) approx BBs exec'd 0 ====
+
+ 0x25471CA8: 3B610008 addi r27,r1,8
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25471CAC: 3B200002 li r25,2
+ 4: MOVL $0x2, t2
+ 5: PUTL t2, R25
+ 6: INCEIPL $4
+
+ 0x25471CB0: 814100D0 lwz r10,208(r1)
+ 7: GETL R1, t4
+ 8: ADDL $0xD0, t4
+ 9: LDL (t4), t6
+ 10: PUTL t6, R10
+ 11: INCEIPL $4
+
+ 0x25471CB4: 81210048 lwz r9,72(r1)
+ 12: GETL R1, t8
+ 13: ADDL $0x48, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R9
+ 16: INCEIPL $4
+
+ 0x25471CB8: 2F8A0000 cmpi cr7,r10,0
+ 17: GETL R10, t12
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x7, CR
+ 20: INCEIPL $4
+
+ 0x25471CBC: 811B0248 lwz r8,584(r27)
+ 21: GETL R27, t16
+ 22: ADDL $0x248, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R8
+ 25: INCEIPL $4
+
+ 0x25471CC0: 817B024C lwz r11,588(r27)
+ 26: GETL R27, t20
+ 27: ADDL $0x24C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R11
+ 30: INCEIPL $4
+
+ 0x25471CC4: 83490004 lwz r26,4(r9)
+ 31: GETL R9, t24
+ 32: ADDL $0x4, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R26
+ 35: INCEIPL $4
+
+ 0x25471CC8: 39200000 li r9,0
+ 36: MOVL $0x0, t28
+ 37: PUTL t28, R9
+ 38: INCEIPL $4
+
+ 0x25471CCC: 7F885A14 add r28,r8,r11
+ 39: GETL R8, t30
+ 40: GETL R11, t32
+ 41: ADDL t30, t32
+ 42: PUTL t32, R28
+ 43: INCEIPL $4
+
+ 0x25471CD0: 83A10010 lwz r29,16(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x10, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R29
+ 48: INCEIPL $4
+
+ 0x25471CD4: 419E0008 bc 12,30,0x25471CDC
+ 49: Js30o $0x25471CDC
+
+
+. 0 25471CA8 48
+. 3B 61 00 08 3B 20 00 02 81 41 00 D0 81 21 00 48 2F 8A 00 00 81 1B 02 48 81 7B 02 4C 83 49 00 04 39 20 00 00 7F 88 5A 14 83 A1 00 10 41 9E 00 08
+
+==== BB 43 (0x25471CD8) approx BBs exec'd 0 ====
+
+ 0x25471CD8: 812A0004 lwz r9,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25471CDC: 3CA0AAAA lis r5,-21846
+ 5: MOVL $0xAAAA0000, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25471CE0: 60A4AAAB ori r4,r5,0xAAAB
+ 8: MOVL $0xAAAAAAAB, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x25471CE4: 7D4B2016 mulhwu r10,r11,r4
+ 11: GETL R11, t8
+ 12: GETL R4, t10
+ 13: UMULHL t8, t10
+ 14: PUTL t10, R10
+ 15: INCEIPL $4
+
+ 0x25471CE8: 7D0B4378 or r11,r8,r8
+ 16: GETL R8, t12
+ 17: PUTL t12, R11
+ 18: INCEIPL $4
+
+ 0x25471CEC: 5540E8FE rlwinm r0,r10,29,3,31
+ 19: GETL R10, t14
+ 20: SHRL $0x3, t14
+ 21: PUTL t14, R0
+ 22: INCEIPL $4
+
+ 0x25471CF0: 7C004840 cmpl cr0,r0,r9
+ 23: GETL R0, t16
+ 24: GETL R9, t18
+ 25: CMPUL t16, t18, t20 (-rSo)
+ 26: ICRFL t20, $0x0, CR
+ 27: INCEIPL $4
+
+ 0x25471CF4: 40810008 bc 4,1,0x25471CFC
+ 28: Jc01o $0x25471CFC
+
+
+. 0 25471CD8 32
+. 81 2A 00 04 3C A0 AA AA 60 A4 AA AB 7D 4B 20 16 7D 0B 43 78 55 40 E8 FE 7C 00 48 40 40 81 00 08
+
+==== BB 44 (0x25471CF8) approx BBs exec'd 0 ====
+
+ 0x25471CF8: 7D204B78 or r0,r9,r9
+ 0: GETL R9, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25471CFC: 1C60000C mulli r3,r0,12
+ 3: GETL R0, t2
+ 4: MULL $0xC, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0x25471D00: 7FEB1A14 add r31,r11,r3
+ 7: GETL R11, t4
+ 8: GETL R3, t6
+ 9: ADDL t4, t6
+ 10: PUTL t6, R31
+ 11: INCEIPL $4
+
+ 0x25471D04: 7F8BF840 cmpl cr7,r11,r31
+ 12: GETL R11, t8
+ 13: GETL R31, t10
+ 14: CMPUL t8, t10, t12 (-rSo)
+ 15: ICRFL t12, $0x7, CR
+ 16: INCEIPL $4
+
+ 0x25471D08: 409C0020 bc 4,28,0x25471D28
+ 17: Jc28o $0x25471D28
+
+
+. 0 25471CF8 20
+. 7D 20 4B 78 1C 60 00 0C 7F EB 1A 14 7F 8B F8 40 40 9C 00 20
+
+==== BB 45 (0x25471D0C) approx BBs exec'd 0 ====
+
+ 0x25471D0C: 818B0008 lwz r12,8(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x25471D10: 80CB0000 lwz r6,0(r11)
+ 5: GETL R11, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x25471D14: 396B000C addi r11,r11,12
+ 9: GETL R11, t8
+ 10: ADDL $0xC, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x25471D18: 7CECEA14 add r7,r12,r29
+ 13: GETL R12, t10
+ 14: GETL R29, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R7
+ 17: INCEIPL $4
+
+ 0x25471D1C: 7F8BF840 cmpl cr7,r11,r31
+ 18: GETL R11, t14
+ 19: GETL R31, t16
+ 20: CMPUL t14, t16, t18 (-rSo)
+ 21: ICRFL t18, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x25471D20: 7CE6E92E stwx r7,r6,r29
+ 23: GETL R29, t20
+ 24: GETL R6, t22
+ 25: ADDL t22, t20
+ 26: GETL R7, t24
+ 27: STL t24, (t20)
+ 28: INCEIPL $4
+
+ 0x25471D24: 419CFFE8 bc 12,28,0x25471D0C
+ 29: Js28o $0x25471D0C
+
+
+. 0 25471D0C 28
+. 81 8B 00 08 80 CB 00 00 39 6B 00 0C 7C EC EA 14 7F 8B F8 40 7C E6 E9 2E 41 9C FF E8
+
+==== BB 46 (0x25471D28) approx BBs exec'd 0 ====
+
+ 0x25471D28: 7C9FE040 cmpl cr1,r31,r28
+ 0: GETL R31, t0
+ 1: GETL R28, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25471D2C: 4084008C bc 4,4,0x25471DB8
+ 5: Jc04o $0x25471DB8
+
+
+. 0 25471D28 8
+. 7C 9F E0 40 40 84 00 8C
+
+==== BB 47 (0x25471D30) approx BBs exec'd 0 ====
+
+ 0x25471D30: 811F0004 lwz r8,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25471D34: 817F0000 lwz r11,0(r31)
+ 5: GETL R31, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0x25471D38: 550A063E rlwinm r10,r8,0,24,31
+ 9: GETL R8, t8
+ 10: ANDL $0xFF, t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x25471D3C: 5500E136 rlwinm r0,r8,28,4,27
+ 13: GETL R8, t10
+ 14: ROLL $0x1C, t10
+ 15: ANDL $0xFFFFFF0, t10
+ 16: PUTL t10, R0
+ 17: INCEIPL $4
+
+ 0x25471D40: 2F0A0016 cmpi cr6,r10,22
+ 18: GETL R10, t12
+ 19: MOVL $0x16, t16
+ 20: CMPL t12, t16, t14 (-rSo)
+ 21: ICRFL t14, $0x6, CR
+ 22: INCEIPL $4
+
+ 0x25471D44: 7CC0D214 add r6,r0,r26
+ 23: GETL R0, t18
+ 24: GETL R26, t20
+ 25: ADDL t18, t20
+ 26: PUTL t20, R6
+ 27: INCEIPL $4
+
+ 0x25471D48: 7D0BEA14 add r8,r11,r29
+ 28: GETL R11, t22
+ 29: GETL R29, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R8
+ 32: INCEIPL $4
+
+ 0x25471D4C: 419A00C4 bc 12,26,0x25471E10
+ 33: Js26o $0x25471E10
+
+
+. 0 25471D30 32
+. 81 1F 00 04 81 7F 00 00 55 0A 06 3E 55 00 E1 36 2F 0A 00 16 7C C0 D2 14 7D 0B EA 14 41 9A 00 C4
+
+==== BB 48 (0x25471D50) approx BBs exec'd 0 ====
+
+ 0x25471D50: 2F8A0000 cmpi cr7,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25471D54: 419E0058 bc 12,30,0x25471DAC
+ 4: Js30o $0x25471DAC
+
+
+. 0 25471D50 8
+. 2F 8A 00 00 41 9E 00 58
+
+==== BB 49 (0x25471D58) approx BBs exec'd 0 ====
+
+ 0x25471D58: 8966000C lbz r11,12(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25471D5C: 5569E13F rlwinm. r9,r11,28,4,31
+ 5: GETL R11, t4
+ 6: SHRL $0x4, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25471D60: 4182014C bc 12,2,0x25471EAC
+ 11: Js02o $0x25471EAC
+
+
+. 0 25471D58 12
+. 89 66 00 0C 55 69 E1 3F 41 82 01 4C
+
+==== BB 50 (0x25471D64) approx BBs exec'd 0 ====
+
+ 0x25471D64: A006000E lhz r0,14(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0xE, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25471D68: 2F000000 cmpi cr6,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25471D6C: 39200000 li r9,0
+ 9: MOVL $0x0, t8
+ 10: PUTL t8, R9
+ 11: INCEIPL $4
+
+ 0x25471D70: 419A0008 bc 12,26,0x25471D78
+ 12: Js26o $0x25471D78
+
+
+. 0 25471D64 16
+. A0 06 00 0E 2F 00 00 00 39 20 00 00 41 9A 00 08
+
+==== BB 51 (0x25471D74) approx BBs exec'd 0 ====
+
+ 0x25471D74: 81210010 lwz r9,16(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25471D78: 80A60004 lwz r5,4(r6)
+ 5: GETL R6, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0x25471D7C: 7D292A14 add r9,r9,r5
+ 10: GETL R9, t8
+ 11: GETL R5, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x25471D80: 2F8A0001 cmpi cr7,r10,1
+ 15: GETL R10, t12
+ 16: MOVL $0x1, t16
+ 17: CMPL t12, t16, t14 (-rSo)
+ 18: ICRFL t14, $0x7, CR
+ 19: INCEIPL $4
+
+ 0x25471D84: 807F0008 lwz r3,8(r31)
+ 20: GETL R31, t18
+ 21: ADDL $0x8, t18
+ 22: LDL (t18), t20
+ 23: PUTL t20, R3
+ 24: INCEIPL $4
+
+ 0x25471D88: 7D291A14 add r9,r9,r3
+ 25: GETL R9, t22
+ 26: GETL R3, t24
+ 27: ADDL t22, t24
+ 28: PUTL t24, R9
+ 29: INCEIPL $4
+
+ 0x25471D8C: 419E0078 bc 12,30,0x25471E04
+ 30: Js30o $0x25471E04
+
+
+. 0 25471D74 28
+. 81 21 00 10 80 A6 00 04 7D 29 2A 14 2F 8A 00 01 80 7F 00 08 7D 29 1A 14 41 9E 00 78
+
+==== BB 52 (0x25471D90) approx BBs exec'd 0 ====
+
+ 0x25471D90: 2C0A0014 cmpi cr0,r10,20
+ 0: GETL R10, t0
+ 1: MOVL $0x14, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25471D94: 41820070 bc 12,2,0x25471E04
+ 5: Js02o $0x25471E04
+
+
+. 0 25471D90 8
+. 2C 0A 00 14 41 82 00 70
+
+==== BB 53 (0x25471E04) approx BBs exec'd 0 ====
+
+ 0x25471E04: 3BFF000C addi r31,r31,12
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0x25471E08: 91280000 stw r9,0(r8)
+ 4: GETL R9, t2
+ 5: GETL R8, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x25471E0C: 4BFFFFA4 b 0x25471DB0
+ 8: JMPo $0x25471DB0 ($4)
+
+
+. 0 25471E04 12
+. 3B FF 00 0C 91 28 00 00 4B FF FF A4
+
+==== BB 54 (0x25471DB0) approx BBs exec'd 0 ====
+
+ 0x25471DB0: 7C9FE040 cmpl cr1,r31,r28
+ 0: GETL R31, t0
+ 1: GETL R28, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25471DB4: 4184FF7C bc 12,4,0x25471D30
+ 5: Js04o $0x25471D30
+
+
+. 0 25471DB0 8
+. 7C 9F E0 40 41 84 FF 7C
+
+==== BB 55 (0x25471D98) approx BBs exec'd 0 ====
+
+ 0x25471D98: 7F03C378 or r3,r24,r24
+ 0: GETL R24, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25471D9C: 7FE4FB78 or r4,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25471DA0: 38A00000 li r5,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x25471DA4: 7CC73378 or r7,r6,r6
+ 9: GETL R6, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0x25471DA8: 4800EF01 bl 0x25480CA8
+ 12: MOVL $0x25471DAC, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25480CA8 ($4)
+
+
+. 0 25471D98 20
+. 7F 03 C3 78 7F E4 FB 78 38 A0 00 00 7C C7 33 78 48 00 EF 01
+
+==== BB 56 __process_machine_rela(0x25480CA8) approx BBs exec'd 0 ====
+
+ 0x25480CA8: 2B8A004D cmpli cr7,r10,77
+ 0: GETL R10, t0
+ 1: MOVL $0x4D, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25480CAC: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0x25480CB0: 9421FFD0 stwu r1,-48(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFFD0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25480CB4: 4801634D bl 0x25497000
+ 14: MOVL $0x25480CB8, t12
+ 15: PUTL t12, LR
+ 16: JMPo-c $0x25497000 ($4)
+
+
+. 0 25480CA8 16
+. 2B 8A 00 4D 7C 08 02 A6 94 21 FF D0 48 01 63 4D
+
+==== BB 57 (0x25480CB8) approx BBs exec'd 0 ====
+
+ 0x25480CB8: 93410018 stw r26,24(r1)
+ 0: GETL R26, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25480CBC: 7D3A4B78 or r26,r9,r9
+ 5: GETL R9, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x25480CC0: 9361001C stw r27,28(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25480CC4: 7CDB3378 or r27,r6,r6
+ 13: GETL R6, t10
+ 14: PUTL t10, R27
+ 15: INCEIPL $4
+
+ 0x25480CC8: 93810020 stw r28,32(r1)
+ 16: GETL R28, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x20, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x25480CCC: 7C9C2378 or r28,r4,r4
+ 21: GETL R4, t16
+ 22: PUTL t16, R28
+ 23: INCEIPL $4
+
+ 0x25480CD0: 93A10024 stw r29,36(r1)
+ 24: GETL R29, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x24, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x25480CD4: 7CBD2B78 or r29,r5,r5
+ 29: GETL R5, t22
+ 30: PUTL t22, R29
+ 31: INCEIPL $4
+
+ 0x25480CD8: 93C10028 stw r30,40(r1)
+ 32: GETL R30, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x28, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x25480CDC: 7FC802A6 mflr r30
+ 37: GETL LR, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0x25480CE0: 93E1002C stw r31,44(r1)
+ 40: GETL R31, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x2C, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x25480CE4: 7D5F5378 or r31,r10,r10
+ 45: GETL R10, t34
+ 46: PUTL t34, R31
+ 47: INCEIPL $4
+
+ 0x25480CE8: 90010034 stw r0,52(r1)
+ 48: GETL R0, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x34, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x25480CEC: 90610008 stw r3,8(r1)
+ 53: GETL R3, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x8, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x25480CF0: 90E10010 stw r7,16(r1)
+ 58: GETL R7, t44
+ 59: GETL R1, t46
+ 60: ADDL $0x10, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x25480CF4: 9101000C stw r8,12(r1)
+ 63: GETL R8, t48
+ 64: GETL R1, t50
+ 65: ADDL $0xC, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x25480CF8: 419D0140 bc 12,29,0x25480E38
+ 68: Js29o $0x25480E38
+
+
+. 0 25480CB8 68
+. 93 41 00 18 7D 3A 4B 78 93 61 00 1C 7C DB 33 78 93 81 00 20 7C 9C 23 78 93 A1 00 24 7C BD 2B 78 93 C1 00 28 7F C8 02 A6 93 E1 00 2C 7D 5F 53 78 90 01 00 34 90 61 00 08 90 E1 00 10 91 01 00 0C 41 9D 01 40
+
+==== BB 58 (0x25480CFC) approx BBs exec'd 0 ====
+
+ 0x25480CFC: 817E0450 lwz r11,1104(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x450, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25480D00: 5544103A rlwinm r4,r10,2,0,29
+ 5: GETL R10, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x25480D04: 7C64582E lwzx r3,r4,r11
+ 9: GETL R11, t6
+ 10: GETL R4, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x25480D08: 7D235A14 add r9,r3,r11
+ 15: GETL R3, t12
+ 16: GETL R11, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25480D0C: 7D2903A6 mtctr r9
+ 20: GETL R9, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0x25480D10: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+. 0 25480CFC 24
+. 81 7E 04 50 55 44 10 3A 7C 64 58 2E 7D 23 5A 14 7D 29 03 A6 4E 80 04 20
+
+==== BB 59 (0x25480FD8) approx BBs exec'd 0 ====
+
+ 0x25480FD8: 80A1000C lwz r5,12(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25480FDC: 7FA5D050 subf r29,r5,r26
+ 5: GETL R5, t4
+ 6: GETL R26, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x25480FE0: 57BF3032 rlwinm r31,r29,6,0,25
+ 10: GETL R29, t8
+ 11: SHLL $0x6, t8
+ 12: PUTL t8, R31
+ 13: INCEIPL $4
+
+ 0x25480FE4: 7FE93670 srawi r9,r31,6
+ 14: GETL R31, t10
+ 15: SARL $0x6, t10 (-wCa)
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x25480FE8: 7F89E800 cmp cr7,r9,r29
+ 18: GETL R9, t12
+ 19: GETL R29, t14
+ 20: CMPL t12, t14, t16 (-rSo)
+ 21: ICRFL t16, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x25480FEC: 419E0254 bc 12,30,0x25481240
+ 23: Js30o $0x25481240
+
+
+. 0 25480FD8 24
+. 80 A1 00 0C 7F A5 D0 50 57 BF 30 32 7F E9 36 70 7F 89 E8 00 41 9E 02 54
+
+==== BB 60 (0x25481240) approx BBs exec'd 0 ====
+
+ 0x25481240: 553A01BA rlwinm r26,r9,0,6,29
+ 0: GETL R9, t0
+ 1: ANDL $0x3FFFFFC, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x25481244: 67404800 oris r0,r26,0x4800
+ 4: GETL R26, t2
+ 5: ORL $0x48000000, t2
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0x25481248: 90050000 stw r0,0(r5)
+ 8: GETL R0, t4
+ 9: GETL R5, t6
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x2548124C: 4BFFFBB4 b 0x25480E00
+ 12: JMPo $0x25480E00 ($4)
+
+
+. 0 25481240 16
+. 55 3A 01 BA 67 40 48 00 90 05 00 00 4B FF FB B4
+
+==== BB 61 (0x25480E00) approx BBs exec'd 0 ====
+
+ 0x25480E00: 7C00286C dcbst r0,r5
+ 0: INCEIPL $4
+
+ 0x25480E04: 7C0004AC sync
+ 1: INCEIPL $4
+
+ 0x25480E08: 8381000C lwz r28,12(r1)
+ 2: GETL R1, t0
+ 3: ADDL $0xC, t0
+ 4: LDL (t0), t2
+ 5: PUTL t2, R28
+ 6: INCEIPL $4
+
+ 0x25480E0C: 7C00E7AC icbi r0,r28
+ 7: GETL R28, t4
+ 8: CALLM_So
+ 9: PUSHL t4
+ 10: CALLMo $0x68
+ 11: CALLM_Eo
+ 12: INCEIPL $4
+
+ 0x25480E10: 80610034 lwz r3,52(r1)
+ 13: GETL R1, t6
+ 14: ADDL $0x34, t6
+ 15: LDL (t6), t8
+ 16: PUTL t8, R3
+ 17: INCEIPL $4
+
+ 0x25480E14: 83410018 lwz r26,24(r1)
+ 18: GETL R1, t10
+ 19: ADDL $0x18, t10
+ 20: LDL (t10), t12
+ 21: PUTL t12, R26
+ 22: INCEIPL $4
+
+ 0x25480E18: 8361001C lwz r27,28(r1)
+ 23: GETL R1, t14
+ 24: ADDL $0x1C, t14
+ 25: LDL (t14), t16
+ 26: PUTL t16, R27
+ 27: INCEIPL $4
+
+ 0x25480E1C: 7C6803A6 mtlr r3
+ 28: GETL R3, t18
+ 29: PUTL t18, LR
+ 30: INCEIPL $4
+
+ 0x25480E20: 83810020 lwz r28,32(r1)
+ 31: GETL R1, t20
+ 32: ADDL $0x20, t20
+ 33: LDL (t20), t22
+ 34: PUTL t22, R28
+ 35: INCEIPL $4
+
+ 0x25480E24: 83A10024 lwz r29,36(r1)
+ 36: GETL R1, t24
+ 37: ADDL $0x24, t24
+ 38: LDL (t24), t26
+ 39: PUTL t26, R29
+ 40: INCEIPL $4
+
+ 0x25480E28: 83C10028 lwz r30,40(r1)
+ 41: GETL R1, t28
+ 42: ADDL $0x28, t28
+ 43: LDL (t28), t30
+ 44: PUTL t30, R30
+ 45: INCEIPL $4
+
+ 0x25480E2C: 83E1002C lwz r31,44(r1)
+ 46: GETL R1, t32
+ 47: ADDL $0x2C, t32
+ 48: LDL (t32), t34
+ 49: PUTL t34, R31
+ 50: INCEIPL $4
+
+ 0x25480E30: 38210030 addi r1,r1,48
+ 51: GETL R1, t36
+ 52: ADDL $0x30, t36
+ 53: PUTL t36, R1
+ 54: INCEIPL $4
+
+ 0x25480E34: 4E800020 blr
+ 55: GETL LR, t38
+ 56: JMPo-r t38 ($4)
+
+
+. 0 25480E00 56
+. 7C 00 28 6C 7C 00 04 AC 83 81 00 0C 7C 00 E7 AC 80 61 00 34 83 41 00 18 83 61 00 1C 7C 68 03 A6 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+==== BB 62 (0x25471DAC) approx BBs exec'd 0 ====
+
+ 0x25471DAC: 3BFF000C addi r31,r31,12
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0x25471DB0: 7C9FE040 cmpl cr1,r31,r28
+ 4: GETL R31, t2
+ 5: GETL R28, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25471DB4: 4184FF7C bc 12,4,0x25471D30
+ 9: Js04o $0x25471D30
+
+
+. 0 25471DAC 12
+. 3B FF 00 0C 7C 9F E0 40 41 84 FF 7C
+
+==== BB 63 (0x25471DB8) approx BBs exec'd 0 ====
+
+ 0x25471DB8: 3739FFFF addic. r25,r25,-1
+ 0: GETL R25, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R25
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25471DBC: 3B7B000C addi r27,r27,12
+ 6: GETL R27, t4
+ 7: ADDL $0xC, t4
+ 8: PUTL t4, R27
+ 9: INCEIPL $4
+
+ 0x25471DC0: 4080FEF0 bc 4,0,0x25471CB0
+ 10: Jc00o $0x25471CB0
+
+
+. 0 25471DB8 12
+. 37 39 FF FF 3B 7B 00 0C 40 80 FE F0
+
+==== BB 64 (0x25471CB0) approx BBs exec'd 0 ====
+
+ 0x25471CB0: 814100D0 lwz r10,208(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0xD0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25471CB4: 81210048 lwz r9,72(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x48, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25471CB8: 2F8A0000 cmpi cr7,r10,0
+ 10: GETL R10, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25471CBC: 811B0248 lwz r8,584(r27)
+ 14: GETL R27, t12
+ 15: ADDL $0x248, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R8
+ 18: INCEIPL $4
+
+ 0x25471CC0: 817B024C lwz r11,588(r27)
+ 19: GETL R27, t16
+ 20: ADDL $0x24C, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R11
+ 23: INCEIPL $4
+
+ 0x25471CC4: 83490004 lwz r26,4(r9)
+ 24: GETL R9, t20
+ 25: ADDL $0x4, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R26
+ 28: INCEIPL $4
+
+ 0x25471CC8: 39200000 li r9,0
+ 29: MOVL $0x0, t24
+ 30: PUTL t24, R9
+ 31: INCEIPL $4
+
+ 0x25471CCC: 7F885A14 add r28,r8,r11
+ 32: GETL R8, t26
+ 33: GETL R11, t28
+ 34: ADDL t26, t28
+ 35: PUTL t28, R28
+ 36: INCEIPL $4
+
+ 0x25471CD0: 83A10010 lwz r29,16(r1)
+ 37: GETL R1, t30
+ 38: ADDL $0x10, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R29
+ 41: INCEIPL $4
+
+ 0x25471CD4: 419E0008 bc 12,30,0x25471CDC
+ 42: Js30o $0x25471CDC
+
+
+. 0 25471CB0 40
+. 81 41 00 D0 81 21 00 48 2F 8A 00 00 81 1B 02 48 81 7B 02 4C 83 49 00 04 39 20 00 00 7F 88 5A 14 83 A1 00 10 41 9E 00 08
+
+==== BB 65 (0x25471CFC) approx BBs exec'd 0 ====
+
+ 0x25471CFC: 1C60000C mulli r3,r0,12
+ 0: GETL R0, t0
+ 1: MULL $0xC, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x25471D00: 7FEB1A14 add r31,r11,r3
+ 4: GETL R11, t2
+ 5: GETL R3, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R31
+ 8: INCEIPL $4
+
+ 0x25471D04: 7F8BF840 cmpl cr7,r11,r31
+ 9: GETL R11, t6
+ 10: GETL R31, t8
+ 11: CMPUL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25471D08: 409C0020 bc 4,28,0x25471D28
+ 14: Jc28o $0x25471D28
+
+
+. 0 25471CFC 16
+. 1C 60 00 0C 7F EB 1A 14 7F 8B F8 40 40 9C 00 20
+
+==== BB 66 (0x25471DC4) approx BBs exec'd 0 ====
+
+ 0x25471DC4: 7EE3BB78 or r3,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25471DC8: 7F04C378 or r4,r24,r24
+ 3: GETL R24, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25471DCC: 4BFFFBBD bl 0x25471988
+ 6: MOVL $0x25471DD0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25471988 ($4)
+
+
+. 0 25471DC4 12
+. 7E E3 BB 78 7F 04 C3 78 4B FF FB BD
+
+==== BB 67 _dl_start_final(0x25471988) approx BBs exec'd 0 ====
+
+ 0x25471988: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547198C: 7D2802A6 mflr r9
+ 6: GETL LR, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x25471990: 48025671 bl 0x25497000
+ 9: MOVL $0x25471994, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25471988 12
+. 94 21 FF E0 7D 28 02 A6 48 02 56 71
+
+==== BB 68 (0x25471994) approx BBs exec'd 0 ====
+
+ 0x25471994: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25471998: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547199C: 93A10014 stw r29,20(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x254719A0: 91210024 stw r9,36(r1)
+ 13: GETL R9, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254719A4: 38A0012C li r5,300
+ 18: MOVL $0x12C, t14
+ 19: PUTL t14, R5
+ 20: INCEIPL $4
+
+ 0x254719A8: 80040000 lwz r0,0(r4)
+ 21: GETL R4, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R0
+ 24: INCEIPL $4
+
+ 0x254719AC: 83BE04C8 lwz r29,1224(r30)
+ 25: GETL R30, t20
+ 26: ADDL $0x4C8, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R29
+ 29: INCEIPL $4
+
+ 0x254719B0: 81840008 lwz r12,8(r4)
+ 30: GETL R4, t24
+ 31: ADDL $0x8, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R12
+ 34: INCEIPL $4
+
+ 0x254719B4: 38840020 addi r4,r4,32
+ 35: GETL R4, t28
+ 36: ADDL $0x20, t28
+ 37: PUTL t28, R4
+ 38: INCEIPL $4
+
+ 0x254719B8: 901D01B8 stw r0,440(r29)
+ 39: GETL R0, t30
+ 40: GETL R29, t32
+ 41: ADDL $0x1B8, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0x254719BC: 919D01C0 stw r12,448(r29)
+ 44: GETL R12, t34
+ 45: GETL R29, t36
+ 46: ADDL $0x1C0, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0x254719C0: 9361000C stw r27,12(r1)
+ 49: GETL R27, t38
+ 50: GETL R1, t40
+ 51: ADDL $0xC, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0x254719C4: 7C7B1B78 or r27,r3,r3
+ 54: GETL R3, t42
+ 55: PUTL t42, R27
+ 56: INCEIPL $4
+
+ 0x254719C8: 93810010 stw r28,16(r1)
+ 57: GETL R28, t44
+ 58: GETL R1, t46
+ 59: ADDL $0x10, t46
+ 60: STL t44, (t46)
+ 61: INCEIPL $4
+
+ 0x254719CC: 387D01D8 addi r3,r29,472
+ 62: GETL R29, t48
+ 63: ADDL $0x1D8, t48
+ 64: PUTL t48, R3
+ 65: INCEIPL $4
+
+ 0x254719D0: 3B9D01B8 addi r28,r29,440
+ 66: GETL R29, t50
+ 67: ADDL $0x1B8, t50
+ 68: PUTL t50, R28
+ 69: INCEIPL $4
+
+ 0x254719D4: 4801220D bl 0x25483BE0
+ 70: MOVL $0x254719D8, t52
+ 71: PUTL t52, LR
+ 72: JMPo-c $0x25483BE0 ($4)
+
+
+. 0 25471994 68
+. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 91 21 00 24 38 A0 01 2C 80 04 00 00 83 BE 04 C8 81 84 00 08 38 84 00 20 90 1D 01 B8 91 9D 01 C0 93 61 00 0C 7C 7B 1B 78 93 81 00 10 38 7D 01 D8 3B 9D 01 B8 48 01 22 0D
+
+==== BB 69 memcpy(0x25483BE0) approx BBs exec'd 0 ====
+
+ 0x25483BE0: 2B85000F cmpli cr7,r5,15
+ 0: GETL R5, t0
+ 1: MOVL $0xF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25483BE4: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0x25483BE8: 9421FFE0 stwu r1,-32(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFFE0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25483BEC: 9361000C stw r27,12(r1)
+ 14: GETL R27, t12
+ 15: GETL R1, t14
+ 16: ADDL $0xC, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25483BF0: 7C7B1B78 or r27,r3,r3
+ 19: GETL R3, t16
+ 20: PUTL t16, R27
+ 21: INCEIPL $4
+
+ 0x25483BF4: 93A10014 stw r29,20(r1)
+ 22: GETL R29, t18
+ 23: GETL R1, t20
+ 24: ADDL $0x14, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0x25483BF8: 7C9D2378 or r29,r4,r4
+ 27: GETL R4, t22
+ 28: PUTL t22, R29
+ 29: INCEIPL $4
+
+ 0x25483BFC: 93E1001C stw r31,28(r1)
+ 30: GETL R31, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x1C, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x25483C00: 7C7F1B78 or r31,r3,r3
+ 35: GETL R3, t28
+ 36: PUTL t28, R31
+ 37: INCEIPL $4
+
+ 0x25483C04: 93810010 stw r28,16(r1)
+ 38: GETL R28, t30
+ 39: GETL R1, t32
+ 40: ADDL $0x10, t32
+ 41: STL t30, (t32)
+ 42: INCEIPL $4
+
+ 0x25483C08: 93C10018 stw r30,24(r1)
+ 43: GETL R30, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x18, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x25483C0C: 90010024 stw r0,36(r1)
+ 48: GETL R0, t38
+ 49: GETL R1, t40
+ 50: ADDL $0x24, t40
+ 51: STL t38, (t40)
+ 52: INCEIPL $4
+
+ 0x25483C10: 409D0058 bc 4,29,0x25483C68
+ 53: Jc29o $0x25483C68
+
+
+. 0 25483BE0 52
+. 2B 85 00 0F 7C 08 02 A6 94 21 FF E0 93 61 00 0C 7C 7B 1B 78 93 A1 00 14 7C 9D 23 78 93 E1 00 1C 7C 7F 1B 78 93 81 00 10 93 C1 00 18 90 01 00 24 40 9D 00 58
+
+==== BB 70 (0x25483C14) approx BBs exec'd 0 ====
+
+ 0x25483C14: 7C8300D0 neg r4,r3
+ 0: GETL R3, t0
+ 1: NEGL t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x25483C18: 548307BE rlwinm r3,r4,0,30,31
+ 4: GETL R4, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R3
+ 7: INCEIPL $4
+
+ 0x25483C1C: 7C691B79 or. r9,r3,r3
+ 8: GETL R3, t4
+ 9: PUTL t4, R9
+ 10: CMP0L t4, t6 (-rSo)
+ 11: ICRFL t6, $0x0, CR
+ 12: INCEIPL $4
+
+ 0x25483C20: 7F832850 subf r28,r3,r5
+ 13: GETL R3, t8
+ 14: GETL R5, t10
+ 15: SUBL t8, t10
+ 16: PUTL t10, R28
+ 17: INCEIPL $4
+
+ 0x25483C24: 4182001C bc 12,2,0x25483C40
+ 18: Js02o $0x25483C40
+
+
+. 0 25483C14 20
+. 7C 83 00 D0 54 83 07 BE 7C 69 1B 79 7F 83 28 50 41 82 00 1C
+
+==== BB 71 (0x25483C40) approx BBs exec'd 0 ====
+
+ 0x25483C40: 73A00003 andi. r0,r29,0x3
+ 0: GETL R29, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25483C44: 4082006C bc 4,2,0x25483CB0
+ 6: Jc02o $0x25483CB0
+
+
+. 0 25483C40 8
+. 73 A0 00 03 40 82 00 6C
+
+==== BB 72 (0x25483C48) approx BBs exec'd 0 ====
+
+ 0x25483C48: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25483C4C: 7FA4EB78 or r4,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25483C50: 5785F0BE rlwinm r5,r28,30,2,31
+ 6: GETL R28, t4
+ 7: SHRL $0x2, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0x25483C54: 48000071 bl 0x25483CC4
+ 10: MOVL $0x25483C58, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0x25483CC4 ($4)
+
+
+. 0 25483C48 16
+. 7F E3 FB 78 7F A4 EB 78 57 85 F0 BE 48 00 00 71
+
+==== BB 73 _wordcopy_fwd_aligned(0x25483CC4) approx BBs exec'd 0 ====
+
+ 0x25483CC4: 54A0077E rlwinm r0,r5,0,29,31
+ 0: GETL R5, t0
+ 1: ANDL $0x7, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x25483CC8: 7D8802A6 mflr r12
+ 4: GETL LR, t2
+ 5: PUTL t2, R12
+ 6: INCEIPL $4
+
+ 0x25483CCC: 2B800007 cmpli cr7,r0,7
+ 7: GETL R0, t4
+ 8: MOVL $0x7, t8
+ 9: CMPUL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x25483CD0: 48013331 bl 0x25497000
+ 12: MOVL $0x25483CD4, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0x25497000 ($4)
+
+
+. 0 25483CC4 16
+. 54 A0 07 7E 7D 88 02 A6 2B 80 00 07 48 01 33 31
+
+==== BB 74 (0x25483CD4) approx BBs exec'd 0 ====
+
+ 0x25483CD4: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25483CD8: 93C10008 stw r30,8(r1)
+ 6: GETL R30, t4
+ 7: GETL R1, t6
+ 8: ADDL $0x8, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x25483CDC: 7FC802A6 mflr r30
+ 11: GETL LR, t8
+ 12: PUTL t8, R30
+ 13: INCEIPL $4
+
+ 0x25483CE0: 7D8803A6 mtlr r12
+ 14: GETL R12, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0x25483CE4: 419D0028 bc 12,29,0x25483D0C
+ 17: Js29o $0x25483D0C
+
+
+. 0 25483CD4 20
+. 94 21 FF F0 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 41 9D 00 28
+
+==== BB 75 (0x25483CE8) approx BBs exec'd 0 ====
+
+ 0x25483CE8: 817E0490 lwz r11,1168(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x490, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25483CEC: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25483CF0: 7CCB002E lwzx r6,r11,r0
+ 9: GETL R0, t6
+ 10: GETL R11, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R6
+ 14: INCEIPL $4
+
+ 0x25483CF4: 7D265A14 add r9,r6,r11
+ 15: GETL R6, t12
+ 16: GETL R11, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25483CF8: 7D2903A6 mtctr r9
+ 20: GETL R9, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0x25483CFC: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+. 0 25483CE8 24
+. 81 7E 04 90 54 00 10 3A 7C CB 00 2E 7D 26 5A 14 7D 29 03 A6 4E 80 04 20
+
+==== BB 76 (0x25483D94) approx BBs exec'd 0 ====
+
+ 0x25483D94: 81240000 lwz r9,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25483D98: 3863FFE8 addi r3,r3,-24
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFE8, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483D9C: 3884FFEC addi r4,r4,-20
+ 8: GETL R4, t6
+ 9: ADDL $0xFFFFFFEC, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0x25483DA0: 38A50005 addi r5,r5,5
+ 12: GETL R5, t8
+ 13: ADDL $0x5, t8
+ 14: PUTL t8, R5
+ 15: INCEIPL $4
+
+ 0x25483DA4: 4BFFFF98 b 0x25483D3C
+ 16: JMPo $0x25483D3C ($4)
+
+
+. 0 25483D94 20
+. 81 24 00 00 38 63 FF E8 38 84 FF EC 38 A5 00 05 4B FF FF 98
+
+==== BB 77 (0x25483D3C) approx BBs exec'd 0 ====
+
+ 0x25483D3C: 80040018 lwz r0,24(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25483D40: 91230018 stw r9,24(r3)
+ 5: GETL R9, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x18, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25483D44: 34A5FFF8 addic. r5,r5,-8
+ 10: GETL R5, t8
+ 11: ADCL $0xFFFFFFF8, t8 (-wCa)
+ 12: PUTL t8, R5
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x25483D48: 8124001C lwz r9,28(r4)
+ 16: GETL R4, t12
+ 17: ADDL $0x1C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R9
+ 20: INCEIPL $4
+
+ 0x25483D4C: 9003001C stw r0,28(r3)
+ 21: GETL R0, t16
+ 22: GETL R3, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25483D50: 38840020 addi r4,r4,32
+ 26: GETL R4, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R4
+ 29: INCEIPL $4
+
+ 0x25483D54: 38630020 addi r3,r3,32
+ 30: GETL R3, t22
+ 31: ADDL $0x20, t22
+ 32: PUTL t22, R3
+ 33: INCEIPL $4
+
+ 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
+ 34: Jc02o $0x25483D0C
+
+
+. 0 25483D3C 32
+. 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+
+==== BB 78 (0x25483D0C) approx BBs exec'd 0 ====
+
+ 0x25483D0C: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25483D10: 91230000 stw r9,0(r3)
+ 4: GETL R9, t4
+ 5: GETL R3, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0x25483D14: 81240004 lwz r9,4(r4)
+ 8: GETL R4, t8
+ 9: ADDL $0x4, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R9
+ 12: INCEIPL $4
+
+ 0x25483D18: 90030004 stw r0,4(r3)
+ 13: GETL R0, t12
+ 14: GETL R3, t14
+ 15: ADDL $0x4, t14
+ 16: STL t12, (t14)
+ 17: INCEIPL $4
+
+ 0x25483D1C: 80040008 lwz r0,8(r4)
+ 18: GETL R4, t16
+ 19: ADDL $0x8, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R0
+ 22: INCEIPL $4
+
+ 0x25483D20: 91230008 stw r9,8(r3)
+ 23: GETL R9, t20
+ 24: GETL R3, t22
+ 25: ADDL $0x8, t22
+ 26: STL t20, (t22)
+ 27: INCEIPL $4
+
+ 0x25483D24: 8124000C lwz r9,12(r4)
+ 28: GETL R4, t24
+ 29: ADDL $0xC, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R9
+ 32: INCEIPL $4
+
+ 0x25483D28: 9003000C stw r0,12(r3)
+ 33: GETL R0, t28
+ 34: GETL R3, t30
+ 35: ADDL $0xC, t30
+ 36: STL t28, (t30)
+ 37: INCEIPL $4
+
+ 0x25483D2C: 80040010 lwz r0,16(r4)
+ 38: GETL R4, t32
+ 39: ADDL $0x10, t32
+ 40: LDL (t32), t34
+ 41: PUTL t34, R0
+ 42: INCEIPL $4
+
+ 0x25483D30: 91230010 stw r9,16(r3)
+ 43: GETL R9, t36
+ 44: GETL R3, t38
+ 45: ADDL $0x10, t38
+ 46: STL t36, (t38)
+ 47: INCEIPL $4
+
+ 0x25483D34: 81240014 lwz r9,20(r4)
+ 48: GETL R4, t40
+ 49: ADDL $0x14, t40
+ 50: LDL (t40), t42
+ 51: PUTL t42, R9
+ 52: INCEIPL $4
+
+ 0x25483D38: 90030014 stw r0,20(r3)
+ 53: GETL R0, t44
+ 54: GETL R3, t46
+ 55: ADDL $0x14, t46
+ 56: STL t44, (t46)
+ 57: INCEIPL $4
+
+ 0x25483D3C: 80040018 lwz r0,24(r4)
+ 58: GETL R4, t48
+ 59: ADDL $0x18, t48
+ 60: LDL (t48), t50
+ 61: PUTL t50, R0
+ 62: INCEIPL $4
+
+ 0x25483D40: 91230018 stw r9,24(r3)
+ 63: GETL R9, t52
+ 64: GETL R3, t54
+ 65: ADDL $0x18, t54
+ 66: STL t52, (t54)
+ 67: INCEIPL $4
+
+ 0x25483D44: 34A5FFF8 addic. r5,r5,-8
+ 68: GETL R5, t56
+ 69: ADCL $0xFFFFFFF8, t56 (-wCa)
+ 70: PUTL t56, R5
+ 71: CMP0L t56, t58 (-rSo)
+ 72: ICRFL t58, $0x0, CR
+ 73: INCEIPL $4
+
+ 0x25483D48: 8124001C lwz r9,28(r4)
+ 74: GETL R4, t60
+ 75: ADDL $0x1C, t60
+ 76: LDL (t60), t62
+ 77: PUTL t62, R9
+ 78: INCEIPL $4
+
+ 0x25483D4C: 9003001C stw r0,28(r3)
+ 79: GETL R0, t64
+ 80: GETL R3, t66
+ 81: ADDL $0x1C, t66
+ 82: STL t64, (t66)
+ 83: INCEIPL $4
+
+ 0x25483D50: 38840020 addi r4,r4,32
+ 84: GETL R4, t68
+ 85: ADDL $0x20, t68
+ 86: PUTL t68, R4
+ 87: INCEIPL $4
+
+ 0x25483D54: 38630020 addi r3,r3,32
+ 88: GETL R3, t70
+ 89: ADDL $0x20, t70
+ 90: PUTL t70, R3
+ 91: INCEIPL $4
+
+ 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
+ 92: Jc02o $0x25483D0C
+
+
+. 0 25483D0C 80
+. 80 04 00 00 91 23 00 00 81 24 00 04 90 03 00 04 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+
+==== BB 79 (0x25483D5C) approx BBs exec'd 0 ====
+
+ 0x25483D5C: 83C10008 lwz r30,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R30
+ 4: INCEIPL $4
+
+ 0x25483D60: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x25483D64: 91230000 stw r9,0(r3)
+ 9: GETL R9, t6
+ 10: GETL R3, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25483D68: 4E800020 blr
+ 13: GETL LR, t10
+ 14: JMPo-r t10 ($4)
+
+
+. 0 25483D5C 16
+. 83 C1 00 08 38 21 00 10 91 23 00 00 4E 80 00 20
+
+==== BB 80 (0x25483C58) approx BBs exec'd 0 ====
+
+ 0x25483C58: 5786003A rlwinm r6,r28,0,0,29
+ 0: GETL R28, t0
+ 1: ANDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x25483C5C: 578507BE rlwinm r5,r28,0,30,31
+ 4: GETL R28, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0x25483C60: 7FFF3214 add r31,r31,r6
+ 8: GETL R31, t4
+ 9: GETL R6, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R31
+ 12: INCEIPL $4
+
+ 0x25483C64: 7FBD3214 add r29,r29,r6
+ 13: GETL R29, t8
+ 14: GETL R6, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0x25483C68: 2C850000 cmpi cr1,r5,0
+ 18: GETL R5, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x1, CR
+ 21: INCEIPL $4
+
+ 0x25483C6C: 4186001C bc 12,6,0x25483C88
+ 22: Js06o $0x25483C88
+
+
+. 0 25483C58 24
+. 57 86 00 3A 57 85 07 BE 7F FF 32 14 7F BD 32 14 2C 85 00 00 41 86 00 1C
+
+==== BB 81 (0x25483C88) approx BBs exec'd 0 ====
+
+ 0x25483C88: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25483C8C: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483C90: 83810010 lwz r28,16(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0x25483C94: 8361000C lwz r27,12(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0xC, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R27
+ 17: INCEIPL $4
+
+ 0x25483C98: 7D0803A6 mtlr r8
+ 18: GETL R8, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x25483C9C: 83A10014 lwz r29,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x25483CA0: 83C10018 lwz r30,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0x25483CA4: 83E1001C lwz r31,28(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x1C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R31
+ 35: INCEIPL $4
+
+ 0x25483CA8: 38210020 addi r1,r1,32
+ 36: GETL R1, t28
+ 37: ADDL $0x20, t28
+ 38: PUTL t28, R1
+ 39: INCEIPL $4
+
+ 0x25483CAC: 4E800020 blr
+ 40: GETL LR, t30
+ 41: JMPo-r t30 ($4)
+
+
+. 0 25483C88 40
+. 81 01 00 24 7F 63 DB 78 83 81 00 10 83 61 00 0C 7D 08 03 A6 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 82 (0x254719D8) approx BBs exec'd 0 ====
+
+ 0x254719D8: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254719DC: 48006B91 bl 0x2547856C
+ 3: MOVL $0x254719E0, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x2547856C ($4)
+
+
+. 0 254719D8 8
+. 7F 83 E3 78 48 00 6B 91
+
+==== BB 83 _dl_setup_hash(0x2547856C) approx BBs exec'd 0 ====
+
+ 0x2547856C: 81230030 lwz r9,48(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25478570: 9421FFF0 stwu r1,-16(r1)
+ 5: GETL R1, t4
+ 6: GETL R1, t6
+ 7: ADDL $0xFFFFFFF0, t6
+ 8: PUTL t6, R1
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x25478574: 2F890000 cmpi cr7,r9,0
+ 11: GETL R9, t8
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x7, CR
+ 14: INCEIPL $4
+
+ 0x25478578: 419E0024 bc 12,30,0x2547859C
+ 15: Js30o $0x2547859C
+
+
+. 0 2547856C 16
+. 81 23 00 30 94 21 FF F0 2F 89 00 00 41 9E 00 24
+
+==== BB 84 (0x2547857C) approx BBs exec'd 0 ====
+
+ 0x2547857C: 81690004 lwz r11,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25478580: 814B0000 lwz r10,0(r11)
+ 5: GETL R11, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0x25478584: 388B0008 addi r4,r11,8
+ 9: GETL R11, t8
+ 10: ADDL $0x8, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25478588: 90830170 stw r4,368(r3)
+ 13: GETL R4, t10
+ 14: GETL R3, t12
+ 15: ADDL $0x170, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547858C: 5549103A rlwinm r9,r10,2,0,29
+ 18: GETL R10, t14
+ 19: SHLL $0x2, t14
+ 20: PUTL t14, R9
+ 21: INCEIPL $4
+
+ 0x25478590: 9143016C stw r10,364(r3)
+ 22: GETL R10, t16
+ 23: GETL R3, t18
+ 24: ADDL $0x16C, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0x25478594: 7C044A14 add r0,r4,r9
+ 27: GETL R4, t20
+ 28: GETL R9, t22
+ 29: ADDL t20, t22
+ 30: PUTL t22, R0
+ 31: INCEIPL $4
+
+ 0x25478598: 90030174 stw r0,372(r3)
+ 32: GETL R0, t24
+ 33: GETL R3, t26
+ 34: ADDL $0x174, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x2547859C: 38210010 addi r1,r1,16
+ 37: GETL R1, t28
+ 38: ADDL $0x10, t28
+ 39: PUTL t28, R1
+ 40: INCEIPL $4
+
+ 0x254785A0: 4E800020 blr
+ 41: GETL LR, t30
+ 42: JMPo-r t30 ($4)
+
+
+. 0 2547857C 40
+. 81 69 00 04 81 4B 00 00 38 8B 00 08 90 83 01 70 55 49 10 3A 91 43 01 6C 7C 04 4A 14 90 03 01 74 38 21 00 10 4E 80 00 20
+
+==== BB 85 (0x254719E0) approx BBs exec'd 0 ====
+
+ 0x254719E0: 80FE04FC lwz r7,1276(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254719E4: 80DE0500 lwz r6,1280(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x500, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x254719E8: 3940FFFF li r10,-1
+ 10: MOVL $0xFFFFFFFF, t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x254719EC: 80BE04A4 lwz r5,1188(r30)
+ 13: GETL R30, t10
+ 14: ADDL $0x4A4, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R5
+ 17: INCEIPL $4
+
+ 0x254719F0: 39000001 li r8,1
+ 18: MOVL $0x1, t14
+ 19: PUTL t14, R8
+ 20: INCEIPL $4
+
+ 0x254719F4: 817E04C0 lwz r11,1216(r30)
+ 21: GETL R30, t16
+ 22: ADDL $0x4C0, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R11
+ 25: INCEIPL $4
+
+ 0x254719F8: 7F63DB78 or r3,r27,r27
+ 26: GETL R27, t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0x254719FC: 809E0024 lwz r4,36(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x24, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R4
+ 33: INCEIPL $4
+
+ 0x25471A00: 915D03E4 stw r10,996(r29)
+ 34: GETL R10, t26
+ 35: GETL R29, t28
+ 36: ADDL $0x3E4, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x25471A04: 939D01CC stw r28,460(r29)
+ 39: GETL R28, t30
+ 40: GETL R29, t32
+ 41: ADDL $0x1CC, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0x25471A08: 911D0330 stw r8,816(r29)
+ 44: GETL R8, t34
+ 45: GETL R29, t36
+ 46: ADDL $0x330, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0x25471A0C: 90FD0358 stw r7,856(r29)
+ 49: GETL R7, t38
+ 50: GETL R29, t40
+ 51: ADDL $0x358, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0x25471A10: 90DD035C stw r6,860(r29)
+ 54: GETL R6, t42
+ 55: GETL R29, t44
+ 56: ADDL $0x35C, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0x25471A14: 90BD0360 stw r5,864(r29)
+ 59: GETL R5, t46
+ 60: GETL R29, t48
+ 61: ADDL $0x360, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0x25471A18: 902B0000 stw r1,0(r11)
+ 64: GETL R1, t50
+ 65: GETL R11, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0x25471A1C: 4800D629 bl 0x2547F044
+ 68: MOVL $0x25471A20, t54
+ 69: PUTL t54, LR
+ 70: JMPo-c $0x2547F044 ($4)
+
+
+. 0 254719E0 64
+. 80 FE 04 FC 80 DE 05 00 39 40 FF FF 80 BE 04 A4 39 00 00 01 81 7E 04 C0 7F 63 DB 78 80 9E 00 24 91 5D 03 E4 93 9D 01 CC 91 1D 03 30 90 FD 03 58 90 DD 03 5C 90 BD 03 60 90 2B 00 00 48 00 D6 29
+
+==== BB 86 _dl_sysdep_start(0x2547F044) approx BBs exec'd 0 ====
+
+ 0x2547F044: 7D8802A6 mflr r12
+ 0: GETL LR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0x2547F048: 9421FDE0 stwu r1,-544(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFDE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547F04C: 38E30004 addi r7,r3,4
+ 9: GETL R3, t6
+ 10: ADDL $0x4, t6
+ 11: PUTL t6, R7
+ 12: INCEIPL $4
+
+ 0x2547F050: 48017FB1 bl 0x25497000
+ 13: MOVL $0x2547F054, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547F044 16
+. 7D 88 02 A6 94 21 FD E0 38 E3 00 04 48 01 7F B1
+
+==== BB 87 (0x2547F054) approx BBs exec'd 0 ====
+
+ 0x2547F054: 93C10218 stw r30,536(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x218, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547F058: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547F05C: 91810224 stw r12,548(r1)
+ 8: GETL R12, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x224, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547F060: 81030000 lwz r8,0(r3)
+ 13: GETL R3, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R8
+ 16: INCEIPL $4
+
+ 0x2547F064: 80BE04C0 lwz r5,1216(r30)
+ 17: GETL R30, t14
+ 18: ADDL $0x4C0, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R5
+ 21: INCEIPL $4
+
+ 0x2547F068: 5506103A rlwinm r6,r8,2,0,29
+ 22: GETL R8, t18
+ 23: SHLL $0x2, t18
+ 24: PUTL t18, R6
+ 25: INCEIPL $4
+
+ 0x2547F06C: 813E04D4 lwz r9,1236(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4D4, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R9
+ 30: INCEIPL $4
+
+ 0x2547F070: 7D463A14 add r10,r6,r7
+ 31: GETL R6, t24
+ 32: GETL R7, t26
+ 33: ADDL t24, t26
+ 34: PUTL t26, R10
+ 35: INCEIPL $4
+
+ 0x2547F074: 90650000 stw r3,0(r5)
+ 36: GETL R3, t28
+ 37: GETL R5, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x2547F078: 800A0004 lwz r0,4(r10)
+ 40: GETL R10, t32
+ 41: ADDL $0x4, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R0
+ 44: INCEIPL $4
+
+ 0x2547F07C: 394A0004 addi r10,r10,4
+ 45: GETL R10, t36
+ 46: ADDL $0x4, t36
+ 47: PUTL t36, R10
+ 48: INCEIPL $4
+
+ 0x2547F080: 807E04D0 lwz r3,1232(r30)
+ 49: GETL R30, t38
+ 50: ADDL $0x4D0, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R3
+ 53: INCEIPL $4
+
+ 0x2547F084: 2F800000 cmpi cr7,r0,0
+ 54: GETL R0, t42
+ 55: CMP0L t42, t44 (-rSo)
+ 56: ICRFL t44, $0x7, CR
+ 57: INCEIPL $4
+
+ 0x2547F088: 817E04B8 lwz r11,1208(r30)
+ 58: GETL R30, t46
+ 59: ADDL $0x4B8, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R11
+ 62: INCEIPL $4
+
+ 0x2547F08C: 92A101F4 stw r21,500(r1)
+ 63: GETL R21, t50
+ 64: GETL R1, t52
+ 65: ADDL $0x1F4, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0x2547F090: 3AA00000 li r21,0
+ 68: MOVL $0x0, t54
+ 69: PUTL t54, R21
+ 70: INCEIPL $4
+
+ 0x2547F094: 92C101F8 stw r22,504(r1)
+ 71: GETL R22, t56
+ 72: GETL R1, t58
+ 73: ADDL $0x1F8, t58
+ 74: STL t56, (t58)
+ 75: INCEIPL $4
+
+ 0x2547F098: 3AC00000 li r22,0
+ 76: MOVL $0x0, t60
+ 77: PUTL t60, R22
+ 78: INCEIPL $4
+
+ 0x2547F09C: 92E101FC stw r23,508(r1)
+ 79: GETL R23, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x1FC, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x2547F0A0: 7C972378 or r23,r4,r4
+ 84: GETL R4, t66
+ 85: PUTL t66, R23
+ 86: INCEIPL $4
+
+ 0x2547F0A4: 93010200 stw r24,512(r1)
+ 87: GETL R24, t68
+ 88: GETL R1, t70
+ 89: ADDL $0x200, t70
+ 90: STL t68, (t70)
+ 91: INCEIPL $4
+
+ 0x2547F0A8: 3B000000 li r24,0
+ 92: MOVL $0x0, t72
+ 93: PUTL t72, R24
+ 94: INCEIPL $4
+
+ 0x2547F0AC: 93210204 stw r25,516(r1)
+ 95: GETL R25, t74
+ 96: GETL R1, t76
+ 97: ADDL $0x204, t76
+ 98: STL t74, (t76)
+ 99: INCEIPL $4
+
+ 0x2547F0B0: 3B200000 li r25,0
+ 100: MOVL $0x0, t78
+ 101: PUTL t78, R25
+ 102: INCEIPL $4
+
+ 0x2547F0B4: 93E1021C stw r31,540(r1)
+ 103: GETL R31, t80
+ 104: GETL R1, t82
+ 105: ADDL $0x21C, t82
+ 106: STL t80, (t82)
+ 107: INCEIPL $4
+
+ 0x2547F0B8: 3BE00000 li r31,0
+ 108: MOVL $0x0, t84
+ 109: PUTL t84, R31
+ 110: INCEIPL $4
+
+ 0x2547F0BC: 93410208 stw r26,520(r1)
+ 111: GETL R26, t86
+ 112: GETL R1, t88
+ 113: ADDL $0x208, t88
+ 114: STL t86, (t88)
+ 115: INCEIPL $4
+
+ 0x2547F0C0: 9361020C stw r27,524(r1)
+ 116: GETL R27, t90
+ 117: GETL R1, t92
+ 118: ADDL $0x20C, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0x2547F0C4: 93810210 stw r28,528(r1)
+ 121: GETL R28, t94
+ 122: GETL R1, t96
+ 123: ADDL $0x210, t96
+ 124: STL t94, (t96)
+ 125: INCEIPL $4
+
+ 0x2547F0C8: 93A10214 stw r29,532(r1)
+ 126: GETL R29, t98
+ 127: GETL R1, t100
+ 128: ADDL $0x214, t100
+ 129: STL t98, (t100)
+ 130: INCEIPL $4
+
+ 0x2547F0CC: 91030000 stw r8,0(r3)
+ 131: GETL R8, t102
+ 132: GETL R3, t104
+ 133: STL t102, (t104)
+ 134: INCEIPL $4
+
+ 0x2547F0D0: 90E90000 stw r7,0(r9)
+ 135: GETL R7, t106
+ 136: GETL R9, t108
+ 137: STL t106, (t108)
+ 138: INCEIPL $4
+
+ 0x2547F0D4: 914B0000 stw r10,0(r11)
+ 139: GETL R10, t110
+ 140: GETL R11, t112
+ 141: STL t110, (t112)
+ 142: INCEIPL $4
+
+ 0x2547F0D8: 419E0010 bc 12,30,0x2547F0E8
+ 143: Js30o $0x2547F0E8
+
+
+. 0 2547F054 136
+. 93 C1 02 18 7F C8 02 A6 91 81 02 24 81 03 00 00 80 BE 04 C0 55 06 10 3A 81 3E 04 D4 7D 46 3A 14 90 65 00 00 80 0A 00 04 39 4A 00 04 80 7E 04 D0 2F 80 00 00 81 7E 04 B8 92 A1 01 F4 3A A0 00 00 92 C1 01 F8 3A C0 00 00 92 E1 01 FC 7C 97 23 78 93 01 02 00 3B 00 00 00 93 21 02 04 3B 20 00 00 93 E1 02 1C 3B E0 00 00 93 41 02 08 93 61 02 0C 93 81 02 10 93 A1 02 14 91 03 00 00 90 E9 00 00 91 4B 00 00 41 9E 00 10
+
+==== BB 88 (0x2547F0DC) approx BBs exec'd 0 ====
+
+ 0x2547F0DC: 848A0004 lwzu r4,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R10
+ 3: LDL (t0), t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x2547F0E0: 2F840000 cmpi cr7,r4,0
+ 6: GETL R4, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x2547F0E4: 409EFFF8 bc 4,30,0x2547F0DC
+ 10: Jc30o $0x2547F0DC
+
+
+. 0 2547F0DC 12
+. 84 8A 00 04 2F 84 00 00 40 9E FF F8
+
+==== BB 89 (0x2547F0E8) approx BBs exec'd 0 ====
+
+ 0x2547F0E8: 3B6A0013 addi r27,r10,19
+ 0: GETL R10, t0
+ 1: ADDL $0x13, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x2547F0EC: 380A0004 addi r0,r10,4
+ 4: GETL R10, t2
+ 5: ADDL $0x4, t2
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0x2547F0F0: 576B0036 rlwinm r11,r27,0,0,27
+ 8: GETL R27, t4
+ 9: ANDL $0xFFFFFFF0, t4
+ 10: PUTL t4, R11
+ 11: INCEIPL $4
+
+ 0x2547F0F4: 834B0000 lwz r26,0(r11)
+ 12: GETL R11, t6
+ 13: LDL (t6), t8
+ 14: PUTL t8, R26
+ 15: INCEIPL $4
+
+ 0x2547F0F8: 2F9A0010 cmpi cr7,r26,16
+ 16: GETL R26, t10
+ 17: MOVL $0x10, t14
+ 18: CMPL t10, t14, t12 (-rSo)
+ 19: ICRFL t12, $0x7, CR
+ 20: INCEIPL $4
+
+ 0x2547F0FC: 419D0008 bc 12,29,0x2547F104
+ 21: Js29o $0x2547F104
+
+
+. 0 2547F0E8 24
+. 3B 6A 00 13 38 0A 00 04 57 6B 00 36 83 4B 00 00 2F 9A 00 10 41 9D 00 08
+
+==== BB 90 (0x2547F104) approx BBs exec'd 0 ====
+
+ 0x2547F104: 7C080378 or r8,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0x2547F108: 835E04F4 lwz r26,1268(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x4F4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x2547F10C: 81680000 lwz r11,0(r8)
+ 8: GETL R8, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x2547F110: 3B800000 li r28,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R28
+ 14: INCEIPL $4
+
+ 0x2547F114: 813E03EC lwz r9,1004(r30)
+ 15: GETL R30, t12
+ 16: ADDL $0x3EC, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x2547F118: 2C0B0000 cmpi cr0,r11,0
+ 20: GETL R11, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x2547F11C: 83BE04E0 lwz r29,1248(r30)
+ 24: GETL R30, t20
+ 25: ADDL $0x4E0, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R29
+ 28: INCEIPL $4
+
+ 0x2547F120: 90090000 stw r0,0(r9)
+ 29: GETL R0, t24
+ 30: GETL R9, t26
+ 31: STL t24, (t26)
+ 32: INCEIPL $4
+
+ 0x2547F124: 93A101E0 stw r29,480(r1)
+ 33: GETL R29, t28
+ 34: GETL R1, t30
+ 35: ADDL $0x1E0, t30
+ 36: STL t28, (t30)
+ 37: INCEIPL $4
+
+ 0x2547F128: 939A000C stw r28,12(r26)
+ 38: GETL R28, t32
+ 39: GETL R26, t34
+ 40: ADDL $0xC, t34
+ 41: STL t32, (t34)
+ 42: INCEIPL $4
+
+ 0x2547F12C: 4182004C bc 12,2,0x2547F178
+ 43: Js02o $0x2547F178
+
+
+. 0 2547F104 44
+. 7C 08 03 78 83 5E 04 F4 81 68 00 00 3B 80 00 00 81 3E 03 EC 2C 0B 00 00 83 BE 04 E0 90 09 00 00 93 A1 01 E0 93 9A 00 0C 41 82 00 4C
+
+==== BB 91 (0x2547F130) approx BBs exec'd 0 ====
+
+ 0x2547F130: 7D6A5B78 or r10,r11,r11
+ 0: GETL R11, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x2547F134: 380AFFFD addi r0,r10,-3
+ 3: GETL R10, t2
+ 4: ADDL $0xFFFFFFFD, t2
+ 5: PUTL t2, R0
+ 6: INCEIPL $4
+
+ 0x2547F138: 28800014 cmpli cr1,r0,20
+ 7: GETL R0, t4
+ 8: MOVL $0x14, t8
+ 9: CMPUL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x2547F13C: 41850024 bc 12,5,0x2547F160
+ 12: Js05o $0x2547F160
+
+
+. 0 2547F130 16
+. 7D 6A 5B 78 38 0A FF FD 28 80 00 14 41 85 00 24
+
+==== BB 92 (0x2547F140) approx BBs exec'd 0 ====
+
+ 0x2547F140: 817E03F4 lwz r11,1012(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x3F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547F144: 5405103A rlwinm r5,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547F148: 7C65582E lwzx r3,r5,r11
+ 9: GETL R11, t6
+ 10: GETL R5, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x2547F14C: 7CE35A14 add r7,r3,r11
+ 15: GETL R3, t12
+ 16: GETL R11, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R7
+ 19: INCEIPL $4
+
+ 0x2547F150: 7CE903A6 mtctr r7
+ 20: GETL R7, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0x2547F154: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+. 0 2547F140 24
+. 81 7E 03 F4 54 05 10 3A 7C 65 58 2E 7C E3 5A 14 7C E9 03 A6 4E 80 04 20
+
+==== BB 93 (0x2547F160) approx BBs exec'd 0 ====
+
+ 0x2547F160: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F164: 7CAB5030 slw r11,r5,r10
+ 3: GETL R5, t4
+ 4: GETL R10, t2
+ 5: SHLL t2, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x2547F168: 85480008 lwzu r10,8(r8)
+ 8: GETL R8, t6
+ 9: ADDL $0x8, t6
+ 10: PUTL t6, R8
+ 11: LDL (t6), t8
+ 12: PUTL t8, R10
+ 13: INCEIPL $4
+
+ 0x2547F16C: 7FFF5B78 or r31,r31,r11
+ 14: GETL R31, t10
+ 15: GETL R11, t12
+ 16: ORL t12, t10
+ 17: PUTL t10, R31
+ 18: INCEIPL $4
+
+ 0x2547F170: 2F8A0000 cmpi cr7,r10,0
+ 19: GETL R10, t14
+ 20: CMP0L t14, t16 (-rSo)
+ 21: ICRFL t16, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x2547F174: 409EFFC0 bc 4,30,0x2547F134
+ 23: Jc30o $0x2547F134
+
+
+. 0 2547F160 24
+. 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FF C0
+
+==== BB 94 (0x2547F134) approx BBs exec'd 0 ====
+
+ 0x2547F134: 380AFFFD addi r0,r10,-3
+ 0: GETL R10, t0
+ 1: ADDL $0xFFFFFFFD, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x2547F138: 28800014 cmpli cr1,r0,20
+ 4: GETL R0, t2
+ 5: MOVL $0x14, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547F13C: 41850024 bc 12,5,0x2547F160
+ 9: Js05o $0x2547F160
+
+
+. 0 2547F134 12
+. 38 0A FF FD 28 80 00 14 41 85 00 24
+
+==== BB 95 (0x2547F3D4) approx BBs exec'd 0 ====
+
+ 0x2547F3D4: 813E04F0 lwz r9,1264(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547F3D8: 2F090000 cmpi cr6,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547F3DC: 41BAFD84 bc 13,26,0x2547F160
+ 9: Js26o $0x2547F160
+
+
+. 0 2547F3D4 12
+. 81 3E 04 F0 2F 09 00 00 41 BA FD 84
+
+==== BB 96 (0x2547F3E0) approx BBs exec'd 0 ====
+
+ 0x2547F3E0: 80680004 lwz r3,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547F3E4: 90690000 stw r3,0(r9)
+ 5: GETL R3, t4
+ 6: GETL R9, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547F3E8: 81480000 lwz r10,0(r8)
+ 9: GETL R8, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R10
+ 12: INCEIPL $4
+
+ 0x2547F3EC: 38A00001 li r5,1
+ 13: MOVL $0x1, t12
+ 14: PUTL t12, R5
+ 15: INCEIPL $4
+
+ 0x2547F3F0: 7CAB5030 slw r11,r5,r10
+ 16: GETL R5, t16
+ 17: GETL R10, t14
+ 18: SHLL t14, t16
+ 19: PUTL t16, R11
+ 20: INCEIPL $4
+
+ 0x2547F3F4: 85480008 lwzu r10,8(r8)
+ 21: GETL R8, t18
+ 22: ADDL $0x8, t18
+ 23: PUTL t18, R8
+ 24: LDL (t18), t20
+ 25: PUTL t20, R10
+ 26: INCEIPL $4
+
+ 0x2547F3F8: 7FFF5B78 or r31,r31,r11
+ 27: GETL R31, t22
+ 28: GETL R11, t24
+ 29: ORL t24, t22
+ 30: PUTL t22, R31
+ 31: INCEIPL $4
+
+ 0x2547F3FC: 2F8A0000 cmpi cr7,r10,0
+ 32: GETL R10, t26
+ 33: CMP0L t26, t28 (-rSo)
+ 34: ICRFL t28, $0x7, CR
+ 35: INCEIPL $4
+
+ 0x2547F400: 409EFD34 bc 4,30,0x2547F134
+ 36: Jc30o $0x2547F134
+
+
+. 0 2547F3E0 36
+. 80 68 00 04 90 69 00 00 81 48 00 00 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FD 34
+
+==== BB 97 (0x2547F158) approx BBs exec'd 0 ====
+
+ 0x2547F158: 83A80004 lwz r29,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x2547F15C: 93BA003C stw r29,60(r26)
+ 5: GETL R29, t4
+ 6: GETL R26, t6
+ 7: ADDL $0x3C, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547F160: 38A00001 li r5,1
+ 10: MOVL $0x1, t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0x2547F164: 7CAB5030 slw r11,r5,r10
+ 13: GETL R5, t12
+ 14: GETL R10, t10
+ 15: SHLL t10, t12
+ 16: PUTL t12, R11
+ 17: INCEIPL $4
+
+ 0x2547F168: 85480008 lwzu r10,8(r8)
+ 18: GETL R8, t14
+ 19: ADDL $0x8, t14
+ 20: PUTL t14, R8
+ 21: LDL (t14), t16
+ 22: PUTL t16, R10
+ 23: INCEIPL $4
+
+ 0x2547F16C: 7FFF5B78 or r31,r31,r11
+ 24: GETL R31, t18
+ 25: GETL R11, t20
+ 26: ORL t20, t18
+ 27: PUTL t18, R31
+ 28: INCEIPL $4
+
+ 0x2547F170: 2F8A0000 cmpi cr7,r10,0
+ 29: GETL R10, t22
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x7, CR
+ 32: INCEIPL $4
+
+ 0x2547F174: 409EFFC0 bc 4,30,0x2547F134
+ 33: Jc30o $0x2547F134
+
+
+. 0 2547F158 32
+. 83 A8 00 04 93 BA 00 3C 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FF C0
+
+==== BB 98 (0x2547F4BC) approx BBs exec'd 0 ====
+
+ 0x2547F4BC: 81480004 lwz r10,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547F4C0: 915A0004 stw r10,4(r26)
+ 5: GETL R10, t4
+ 6: GETL R26, t6
+ 7: ADDL $0x4, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547F4C4: 81480000 lwz r10,0(r8)
+ 10: GETL R8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R10
+ 13: INCEIPL $4
+
+ 0x2547F4C8: 4BFFFF24 b 0x2547F3EC
+ 14: JMPo $0x2547F3EC ($4)
+
+
+. 0 2547F4BC 16
+. 81 48 00 04 91 5A 00 04 81 48 00 00 4B FF FF 24
+
+==== BB 99 (0x2547F3EC) approx BBs exec'd 0 ====
+
+ 0x2547F3EC: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F3F0: 7CAB5030 slw r11,r5,r10
+ 3: GETL R5, t4
+ 4: GETL R10, t2
+ 5: SHLL t2, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x2547F3F4: 85480008 lwzu r10,8(r8)
+ 8: GETL R8, t6
+ 9: ADDL $0x8, t6
+ 10: PUTL t6, R8
+ 11: LDL (t6), t8
+ 12: PUTL t8, R10
+ 13: INCEIPL $4
+
+ 0x2547F3F8: 7FFF5B78 or r31,r31,r11
+ 14: GETL R31, t10
+ 15: GETL R11, t12
+ 16: ORL t12, t10
+ 17: PUTL t10, R31
+ 18: INCEIPL $4
+
+ 0x2547F3FC: 2F8A0000 cmpi cr7,r10,0
+ 19: GETL R10, t14
+ 20: CMP0L t14, t16 (-rSo)
+ 21: ICRFL t16, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x2547F400: 409EFD34 bc 4,30,0x2547F134
+ 23: Jc30o $0x2547F134
+
+
+. 0 2547F3EC 24
+. 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FD 34
+
+==== BB 100 (0x2547F418) approx BBs exec'd 0 ====
+
+ 0x2547F418: 81280004 lwz r9,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547F41C: 913A001C stw r9,28(r26)
+ 5: GETL R9, t4
+ 6: GETL R26, t6
+ 7: ADDL $0x1C, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547F420: 81480000 lwz r10,0(r8)
+ 10: GETL R8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R10
+ 13: INCEIPL $4
+
+ 0x2547F424: 4BFFFFC8 b 0x2547F3EC
+ 14: JMPo $0x2547F3EC ($4)
+
+
+. 0 2547F418 16
+. 81 28 00 04 91 3A 00 1C 81 48 00 00 4B FF FF C8
+
+==== BB 101 (0x2547F4EC) approx BBs exec'd 0 ====
+
+ 0x2547F4EC: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F4F0: 82C80004 lwz r22,4(r8)
+ 3: GETL R8, t2
+ 4: ADDL $0x4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R22
+ 7: INCEIPL $4
+
+ 0x2547F4F4: 7CAB5030 slw r11,r5,r10
+ 8: GETL R5, t8
+ 9: GETL R10, t6
+ 10: SHLL t6, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x2547F4F8: 85480008 lwzu r10,8(r8)
+ 13: GETL R8, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R8
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547F4FC: 7FFF5B78 or r31,r31,r11
+ 19: GETL R31, t14
+ 20: GETL R11, t16
+ 21: ORL t16, t14
+ 22: PUTL t14, R31
+ 23: INCEIPL $4
+
+ 0x2547F500: 2F8A0000 cmpi cr7,r10,0
+ 24: GETL R10, t18
+ 25: CMP0L t18, t20 (-rSo)
+ 26: ICRFL t20, $0x7, CR
+ 27: INCEIPL $4
+
+ 0x2547F504: 409EFC30 bc 4,30,0x2547F134
+ 28: Jc30o $0x2547F134
+
+
+. 0 2547F4EC 28
+. 38 A0 00 01 82 C8 00 04 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FC 30
+
+==== BB 102 (0x2547F4CC) approx BBs exec'd 0 ====
+
+ 0x2547F4CC: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F4D0: 82A80004 lwz r21,4(r8)
+ 3: GETL R8, t2
+ 4: ADDL $0x4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R21
+ 7: INCEIPL $4
+
+ 0x2547F4D4: 7CAB5030 slw r11,r5,r10
+ 8: GETL R5, t8
+ 9: GETL R10, t6
+ 10: SHLL t6, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x2547F4D8: 85480008 lwzu r10,8(r8)
+ 13: GETL R8, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R8
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547F4DC: 7FFF5B78 or r31,r31,r11
+ 19: GETL R31, t14
+ 20: GETL R11, t16
+ 21: ORL t16, t14
+ 22: PUTL t14, R31
+ 23: INCEIPL $4
+
+ 0x2547F4E0: 2F8A0000 cmpi cr7,r10,0
+ 24: GETL R10, t18
+ 25: CMP0L t18, t20 (-rSo)
+ 26: ICRFL t20, $0x7, CR
+ 27: INCEIPL $4
+
+ 0x2547F4E4: 409EFC50 bc 4,30,0x2547F134
+ 28: Jc30o $0x2547F134
+
+
+. 0 2547F4CC 28
+. 38 A0 00 01 82 A8 00 04 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FC 50
+
+==== BB 103 (0x2547F494) approx BBs exec'd 0 ====
+
+ 0x2547F494: 80080004 lwz r0,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547F498: 38A00001 li r5,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547F49C: 81480000 lwz r10,0(r8)
+ 8: GETL R8, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R10
+ 11: INCEIPL $4
+
+ 0x2547F4A0: 900101E0 stw r0,480(r1)
+ 12: GETL R0, t10
+ 13: GETL R1, t12
+ 14: ADDL $0x1E0, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0x2547F4A4: 7CAB5030 slw r11,r5,r10
+ 17: GETL R5, t16
+ 18: GETL R10, t14
+ 19: SHLL t14, t16
+ 20: PUTL t16, R11
+ 21: INCEIPL $4
+
+ 0x2547F4A8: 85480008 lwzu r10,8(r8)
+ 22: GETL R8, t18
+ 23: ADDL $0x8, t18
+ 24: PUTL t18, R8
+ 25: LDL (t18), t20
+ 26: PUTL t20, R10
+ 27: INCEIPL $4
+
+ 0x2547F4AC: 7FFF5B78 or r31,r31,r11
+ 28: GETL R31, t22
+ 29: GETL R11, t24
+ 30: ORL t24, t22
+ 31: PUTL t22, R31
+ 32: INCEIPL $4
+
+ 0x2547F4B0: 2F8A0000 cmpi cr7,r10,0
+ 33: GETL R10, t26
+ 34: CMP0L t26, t28 (-rSo)
+ 35: ICRFL t28, $0x7, CR
+ 36: INCEIPL $4
+
+ 0x2547F4B4: 409EFC80 bc 4,30,0x2547F134
+ 37: Jc30o $0x2547F134
+
+
+. 0 2547F494 36
+. 80 08 00 04 38 A0 00 01 81 48 00 00 90 01 01 E0 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FC 80
+
+==== BB 104 (0x2547F470) approx BBs exec'd 0 ====
+
+ 0x2547F470: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F474: 80C80004 lwz r6,4(r8)
+ 3: GETL R8, t2
+ 4: ADDL $0x4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0x2547F478: 7CAB5030 slw r11,r5,r10
+ 8: GETL R5, t8
+ 9: GETL R10, t6
+ 10: SHLL t6, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x2547F47C: 85480008 lwzu r10,8(r8)
+ 13: GETL R8, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R8
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547F480: 7F393278 xor r25,r25,r6
+ 19: GETL R25, t14
+ 20: GETL R6, t16
+ 21: XORL t14, t16
+ 22: PUTL t16, R25
+ 23: INCEIPL $4
+
+ 0x2547F484: 7FFF5B78 or r31,r31,r11
+ 24: GETL R31, t18
+ 25: GETL R11, t20
+ 26: ORL t20, t18
+ 27: PUTL t18, R31
+ 28: INCEIPL $4
+
+ 0x2547F488: 2F8A0000 cmpi cr7,r10,0
+ 29: GETL R10, t22
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x7, CR
+ 32: INCEIPL $4
+
+ 0x2547F48C: 409EFCA8 bc 4,30,0x2547F134
+ 33: Jc30o $0x2547F134
+
+
+. 0 2547F470 32
+. 38 A0 00 01 80 C8 00 04 7C AB 50 30 85 48 00 08 7F 39 32 78 7F FF 5B 78 2F 8A 00 00 40 9E FC A8
+
+==== BB 105 (0x2547F44C) approx BBs exec'd 0 ====
+
+ 0x2547F44C: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F450: 81880004 lwz r12,4(r8)
+ 3: GETL R8, t2
+ 4: ADDL $0x4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0x2547F454: 7CAB5030 slw r11,r5,r10
+ 8: GETL R5, t8
+ 9: GETL R10, t6
+ 10: SHLL t6, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x2547F458: 85480008 lwzu r10,8(r8)
+ 13: GETL R8, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R8
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547F45C: 7F186278 xor r24,r24,r12
+ 19: GETL R24, t14
+ 20: GETL R12, t16
+ 21: XORL t14, t16
+ 22: PUTL t16, R24
+ 23: INCEIPL $4
+
+ 0x2547F460: 7FFF5B78 or r31,r31,r11
+ 24: GETL R31, t18
+ 25: GETL R11, t20
+ 26: ORL t20, t18
+ 27: PUTL t18, R31
+ 28: INCEIPL $4
+
+ 0x2547F464: 2F8A0000 cmpi cr7,r10,0
+ 29: GETL R10, t22
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x7, CR
+ 32: INCEIPL $4
+
+ 0x2547F468: 409EFCCC bc 4,30,0x2547F134
+ 33: Jc30o $0x2547F134
+
+
+. 0 2547F44C 32
+. 38 A0 00 01 81 88 00 04 7C AB 50 30 85 48 00 08 7F 18 62 78 7F FF 5B 78 2F 8A 00 00 40 9E FC CC
+
+==== BB 106 (0x2547F3A4) approx BBs exec'd 0 ====
+
+ 0x2547F3A4: 83680004 lwz r27,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x2547F3A8: 38A00001 li r5,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547F3AC: 809E04B4 lwz r4,1204(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x4B4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x2547F3B0: 3BE0FFFF li r31,-1
+ 13: MOVL $0xFFFFFFFF, t10
+ 14: PUTL t10, R31
+ 15: INCEIPL $4
+
+ 0x2547F3B4: 81480000 lwz r10,0(r8)
+ 16: GETL R8, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R10
+ 19: INCEIPL $4
+
+ 0x2547F3B8: 93640000 stw r27,0(r4)
+ 20: GETL R27, t16
+ 21: GETL R4, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0x2547F3BC: 7CAB5030 slw r11,r5,r10
+ 24: GETL R5, t22
+ 25: GETL R10, t20
+ 26: SHLL t20, t22
+ 27: PUTL t22, R11
+ 28: INCEIPL $4
+
+ 0x2547F3C0: 85480008 lwzu r10,8(r8)
+ 29: GETL R8, t24
+ 30: ADDL $0x8, t24
+ 31: PUTL t24, R8
+ 32: LDL (t24), t26
+ 33: PUTL t26, R10
+ 34: INCEIPL $4
+
+ 0x2547F3C4: 7FFF5B78 or r31,r31,r11
+ 35: GETL R31, t28
+ 36: GETL R11, t30
+ 37: ORL t30, t28
+ 38: PUTL t28, R31
+ 39: INCEIPL $4
+
+ 0x2547F3C8: 2F8A0000 cmpi cr7,r10,0
+ 40: GETL R10, t32
+ 41: CMP0L t32, t34 (-rSo)
+ 42: ICRFL t34, $0x7, CR
+ 43: INCEIPL $4
+
+ 0x2547F3CC: 409EFD68 bc 4,30,0x2547F134
+ 44: Jc30o $0x2547F134
+
+
+. 0 2547F3A4 44
+. 83 68 00 04 38 A0 00 01 80 9E 04 B4 3B E0 FF FF 81 48 00 00 93 64 00 00 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FD 68
+
+==== BB 107 (0x2547F3D0) approx BBs exec'd 0 ====
+
+ 0x2547F3D0: 4BFFFDA8 b 0x2547F178
+ 0: JMPo $0x2547F178 ($4)
+
+
+. 0 2547F3D0 4
+. 4B FF FD A8
+
+==== BB 108 (0x2547F178) approx BBs exec'd 0 ====
+
+ 0x2547F178: 38610050 addi r3,r1,80
+ 0: GETL R1, t0
+ 1: ADDL $0x50, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x2547F17C: 4800364D bl 0x254827C8
+ 4: MOVL $0x2547F180, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0x254827C8 ($4)
+
+
+. 0 2547F178 8
+. 38 61 00 50 48 00 36 4D
+
+==== BB 109 uname(0x254827C8) approx BBs exec'd 0 ====
+
+ 0x254827C8: 3800007A li r0,122
+ 0: MOVL $0x7A, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254827CC: 44000002 sc
+ 3: JMPo-sys $0x254827D0 ($4)
+
+
+. 0 254827C8 8
+. 38 00 00 7A 44 00 00 02
+
+==== BB 110 (0x254827D0) approx BBs exec'd 0 ====
+
+ 0x254827D0: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+. 0 254827D0 4
+. 4C A3 00 20
+
+==== BB 111 (0x2547F180) approx BBs exec'd 0 ====
+
+ 0x2547F180: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x2547F184: 3BA10010 addi r29,r1,16
+ 4: GETL R1, t4
+ 5: ADDL $0x10, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x2547F188: 408201DC bc 4,2,0x2547F364
+ 8: Jc02o $0x2547F364
+
+
+. 0 2547F180 12
+. 2C 03 00 00 3B A1 00 10 40 82 01 DC
+
+==== BB 112 (0x2547F18C) approx BBs exec'd 0 ====
+
+ 0x2547F18C: 3BA100D2 addi r29,r1,210
+ 0: GETL R1, t0
+ 1: ADDL $0xD2, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x2547F190: 893D0000 lbz r9,0(r29)
+ 4: GETL R29, t2
+ 5: LDB (t2), t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x2547F194: 7FA3EB78 or r3,r29,r29
+ 8: GETL R29, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x2547F198: 38E00000 li r7,0
+ 11: MOVL $0x0, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0x2547F19C: 39000000 li r8,0
+ 14: MOVL $0x0, t10
+ 15: PUTL t10, R8
+ 16: INCEIPL $4
+
+ 0x2547F1A0: 3949FFD0 addi r10,r9,-48
+ 17: GETL R9, t12
+ 18: ADDL $0xFFFFFFD0, t12
+ 19: PUTL t12, R10
+ 20: INCEIPL $4
+
+ 0x2547F1A4: 2B8A0009 cmpli cr7,r10,9
+ 21: GETL R10, t14
+ 22: MOVL $0x9, t18
+ 23: CMPUL t14, t18, t16 (-rSo)
+ 24: ICRFL t16, $0x7, CR
+ 25: INCEIPL $4
+
+ 0x2547F1A8: 419D0068 bc 12,29,0x2547F210
+ 26: Js29o $0x2547F210
+
+
+. 0 2547F18C 32
+. 3B A1 00 D2 89 3D 00 00 7F A3 EB 78 38 E0 00 00 39 00 00 00 39 49 FF D0 2B 8A 00 09 41 9D 00 68
+
+==== BB 113 (0x2547F1AC) approx BBs exec'd 0 ====
+
+ 0x2547F1AC: 89630001 lbz r11,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547F1B0: 3929FFD0 addi r9,r9,-48
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFD0, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x2547F1B4: 39430001 addi r10,r3,1
+ 9: GETL R3, t6
+ 10: ADDL $0x1, t6
+ 11: PUTL t6, R10
+ 12: INCEIPL $4
+
+ 0x2547F1B8: 380BFFD0 addi r0,r11,-48
+ 13: GETL R11, t8
+ 14: ADDL $0xFFFFFFD0, t8
+ 15: PUTL t8, R0
+ 16: INCEIPL $4
+
+ 0x2547F1BC: 2B800009 cmpli cr7,r0,9
+ 17: GETL R0, t10
+ 18: MOVL $0x9, t14
+ 19: CMPUL t10, t14, t12 (-rSo)
+ 20: ICRFL t12, $0x7, CR
+ 21: INCEIPL $4
+
+ 0x2547F1C0: 419D0020 bc 12,29,0x2547F1E0
+ 22: Js29o $0x2547F1E0
+
+
+. 0 2547F1AC 24
+. 89 63 00 01 39 29 FF D0 39 43 00 01 38 0B FF D0 2B 80 00 09 41 9D 00 20
+
+==== BB 114 (0x2547F1E0) approx BBs exec'd 0 ====
+
+ 0x2547F1E0: 2C8B002E cmpi cr1,r11,46
+ 0: GETL R11, t0
+ 1: MOVL $0x2E, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x2547F1E4: 54FB402E rlwinm r27,r7,8,0,23
+ 5: GETL R7, t6
+ 6: SHLL $0x8, t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0x2547F1E8: 7F674B78 or r7,r27,r9
+ 9: GETL R27, t8
+ 10: GETL R9, t10
+ 11: ORL t10, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0x2547F1EC: 39080001 addi r8,r8,1
+ 14: GETL R8, t12
+ 15: ADDL $0x1, t12
+ 16: PUTL t12, R8
+ 17: INCEIPL $4
+
+ 0x2547F1F0: 386A0001 addi r3,r10,1
+ 18: GETL R10, t14
+ 19: ADDL $0x1, t14
+ 20: PUTL t14, R3
+ 21: INCEIPL $4
+
+ 0x2547F1F4: 40860014 bc 4,6,0x2547F208
+ 22: Jc06o $0x2547F208
+
+
+. 0 2547F1E0 24
+. 2C 8B 00 2E 54 FB 40 2E 7F 67 4B 78 39 08 00 01 38 6A 00 01 40 86 00 14
+
+==== BB 115 (0x2547F1F8) approx BBs exec'd 0 ====
+
+ 0x2547F1F8: 892A0001 lbz r9,1(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547F1FC: 3B89FFD0 addi r28,r9,-48
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFD0, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x2547F200: 281C0009 cmpli cr0,r28,9
+ 9: GETL R28, t6
+ 10: MOVL $0x9, t10
+ 11: CMPUL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x0, CR
+ 13: INCEIPL $4
+
+ 0x2547F204: 4081FFA8 bc 4,1,0x2547F1AC
+ 14: Jc01o $0x2547F1AC
+
+
+. 0 2547F1F8 16
+. 89 2A 00 01 3B 89 FF D0 28 1C 00 09 40 81 FF A8
+
+==== BB 116 (0x2547F208) approx BBs exec'd 0 ====
+
+ 0x2547F208: 2F080002 cmpi cr6,r8,2
+ 0: GETL R8, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x2547F20C: 41990010 bc 12,25,0x2547F21C
+ 5: Js25o $0x2547F21C
+
+
+. 0 2547F208 8
+. 2F 08 00 02 41 99 00 10
+
+==== BB 117 (0x2547F21C) approx BBs exec'd 0 ====
+
+ 0x2547F21C: 3CA00002 lis r5,2
+ 0: MOVL $0x20000, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547F220: 60AB0204 ori r11,r5,0x204
+ 3: MOVL $0x20204, t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0x2547F224: 7F875840 cmpl cr7,r7,r11
+ 6: GETL R7, t4
+ 7: GETL R11, t6
+ 8: CMPUL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x2547F228: 409D03B4 bc 4,29,0x2547F5DC
+ 11: Jc29o $0x2547F5DC
+
+
+. 0 2547F21C 16
+. 3C A0 00 02 60 AB 02 04 7F 87 58 40 40 9D 03 B4
+
+==== BB 118 (0x2547F22C) approx BBs exec'd 0 ====
+
+ 0x2547F22C: 90FA0008 stw r7,8(r26)
+ 0: GETL R7, t0
+ 1: GETL R26, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547F230: 3880006E li r4,110
+ 5: MOVL $0x6E, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x2547F234: 48003BCD bl 0x25482E00
+ 8: MOVL $0x2547F238, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x25482E00 ($4)
+
+
+. 0 2547F22C 12
+. 90 FA 00 08 38 80 00 6E 48 00 3B CD
+
+==== BB 119 strchr(0x25482E00) approx BBs exec'd 0 ====
+
+ 0x25482E00: 5084442E rlwimi r4,r4,8,16,23
+ 0: GETL R4, t0
+ 1: GETL R4, t2
+ 2: ROLL $0x8, t2
+ 3: ANDL $0xFF00, t2
+ 4: ANDL $0xFFFF00FF, t0
+ 5: ORL t0, t2
+ 6: PUTL t2, R4
+ 7: INCEIPL $4
+
+ 0x25482E04: 3960FFFF li r11,-1
+ 8: MOVL $0xFFFFFFFF, t4
+ 9: PUTL t4, R11
+ 10: INCEIPL $4
+
+ 0x25482E08: 5084801E rlwimi r4,r4,16,0,15
+ 11: GETL R4, t6
+ 12: GETL R4, t8
+ 13: ROLL $0x10, t8
+ 14: ANDL $0xFFFF0000, t8
+ 15: ANDL $0xFFFF, t6
+ 16: ORL t6, t8
+ 17: PUTL t8, R4
+ 18: INCEIPL $4
+
+ 0x25482E0C: 546A1EF8 rlwinm r10,r3,3,27,28
+ 19: GETL R3, t10
+ 20: ROLL $0x3, t10
+ 21: ANDL $0x18, t10
+ 22: PUTL t10, R10
+ 23: INCEIPL $4
+
+ 0x25482E10: 3CC0FEFF lis r6,-257
+ 24: MOVL $0xFEFF0000, t12
+ 25: PUTL t12, R6
+ 26: INCEIPL $4
+
+ 0x25482E14: 3CE07F7F lis r7,32639
+ 27: MOVL $0x7F7F0000, t14
+ 28: PUTL t14, R7
+ 29: INCEIPL $4
+
+ 0x25482E18: 5468003A rlwinm r8,r3,0,0,29
+ 30: GETL R3, t16
+ 31: ANDL $0xFFFFFFFC, t16
+ 32: PUTL t16, R8
+ 33: INCEIPL $4
+
+ 0x25482E1C: 38C6FEFF addi r6,r6,-257
+ 34: MOVL $0xFEFEFEFF, t18
+ 35: PUTL t18, R6
+ 36: INCEIPL $4
+
+ 0x25482E20: 38E77F7F addi r7,r7,32639
+ 37: MOVL $0x7F7F7F7F, t20
+ 38: PUTL t20, R7
+ 39: INCEIPL $4
+
+ 0x25482E24: 80A80000 lwz r5,0(r8)
+ 40: GETL R8, t22
+ 41: LDL (t22), t24
+ 42: PUTL t24, R5
+ 43: INCEIPL $4
+
+ 0x25482E28: 7D6B5430 srw r11,r11,r10
+ 44: GETL R11, t28
+ 45: GETL R10, t26
+ 46: SHRL t26, t28
+ 47: PUTL t28, R11
+ 48: INCEIPL $4
+
+ 0x25482E2C: 7CA55B38 orc r5,r5,r11
+ 49: GETL R5, t30
+ 50: GETL R11, t32
+ 51: NOTL t32
+ 52: ORL t30, t32
+ 53: PUTL t32, R5
+ 54: INCEIPL $4
+
+ 0x25482E30: 7C062A14 add r0,r6,r5
+ 55: GETL R6, t34
+ 56: GETL R5, t36
+ 57: ADDL t34, t36
+ 58: PUTL t36, R0
+ 59: INCEIPL $4
+
+ 0x25482E34: 7CE928F8 nor r9,r7,r5
+ 60: GETL R7, t38
+ 61: GETL R5, t40
+ 62: ORL t40, t38
+ 63: NOTL t38
+ 64: PUTL t38, R9
+ 65: INCEIPL $4
+
+ 0x25482E38: 7C004839 and. r0,r0,r9
+ 66: GETL R0, t42
+ 67: GETL R9, t44
+ 68: ANDL t42, t44
+ 69: PUTL t44, R0
+ 70: CMP0L t44, t46 (-rSo)
+ 71: ICRFL t46, $0x0, CR
+ 72: INCEIPL $4
+
+ 0x25482E3C: 7C8C2A78 xor r12,r4,r5
+ 73: GETL R4, t48
+ 74: GETL R5, t50
+ 75: XORL t48, t50
+ 76: PUTL t50, R12
+ 77: INCEIPL $4
+
+ 0x25482E40: 7D8C5B38 orc r12,r12,r11
+ 78: GETL R12, t52
+ 79: GETL R11, t54
+ 80: NOTL t54
+ 81: ORL t52, t54
+ 82: PUTL t54, R12
+ 83: INCEIPL $4
+
+ 0x25482E44: 48000020 b 0x25482E64
+ 84: JMPo $0x25482E64 ($4)
+
+
+. 0 25482E00 72
+. 50 84 44 2E 39 60 FF FF 50 84 80 1E 54 6A 1E F8 3C C0 FE FF 3C E0 7F 7F 54 68 00 3A 38 C6 FE FF 38 E7 7F 7F 80 A8 00 00 7D 6B 54 30 7C A5 5B 38 7C 06 2A 14 7C E9 28 F8 7C 00 48 39 7C 8C 2A 78 7D 8C 5B 38 48 00 00 20
+
+==== BB 120 (0x25482E64) approx BBs exec'd 0 ====
+
+ 0x25482E64: 7C066214 add r0,r6,r12
+ 0: GETL R6, t0
+ 1: GETL R12, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25482E68: 7CE960F8 nor r9,r7,r12
+ 5: GETL R7, t4
+ 6: GETL R12, t6
+ 7: ORL t6, t4
+ 8: NOTL t4
+ 9: PUTL t4, R9
+ 10: INCEIPL $4
+
+ 0x25482E6C: 4182FFDC bc 12,2,0x25482E48
+ 11: Js02o $0x25482E48
+
+
+. 0 25482E64 12
+. 7C 06 62 14 7C E9 60 F8 41 82 FF DC
+
+==== BB 121 (0x25482E48) approx BBs exec'd 0 ====
+
+ 0x25482E48: 84A80004 lwzu r5,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R8
+ 3: LDL (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25482E4C: 7C004839 and. r0,r0,r9
+ 6: GETL R0, t4
+ 7: GETL R9, t6
+ 8: ANDL t4, t6
+ 9: PUTL t6, R0
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x0, CR
+ 12: INCEIPL $4
+
+ 0x25482E50: 7C062A14 add r0,r6,r5
+ 13: GETL R6, t10
+ 14: GETL R5, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R0
+ 17: INCEIPL $4
+
+ 0x25482E54: 7CE928F8 nor r9,r7,r5
+ 18: GETL R7, t14
+ 19: GETL R5, t16
+ 20: ORL t16, t14
+ 21: NOTL t14
+ 22: PUTL t14, R9
+ 23: INCEIPL $4
+
+ 0x25482E58: 4082005C bc 4,2,0x25482EB4
+ 24: Jc02o $0x25482EB4
+
+
+. 0 25482E48 20
+. 84 A8 00 04 7C 00 48 39 7C 06 2A 14 7C E9 28 F8 40 82 00 5C
+
+==== BB 122 (0x25482E5C) approx BBs exec'd 0 ====
+
+ 0x25482E5C: 7C004839 and. r0,r0,r9
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0x25482E60: 7C8C2A78 xor r12,r4,r5
+ 7: GETL R4, t6
+ 8: GETL R5, t8
+ 9: XORL t6, t8
+ 10: PUTL t8, R12
+ 11: INCEIPL $4
+
+ 0x25482E64: 7C066214 add r0,r6,r12
+ 12: GETL R6, t10
+ 13: GETL R12, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R0
+ 16: INCEIPL $4
+
+ 0x25482E68: 7CE960F8 nor r9,r7,r12
+ 17: GETL R7, t14
+ 18: GETL R12, t16
+ 19: ORL t16, t14
+ 20: NOTL t14
+ 21: PUTL t14, R9
+ 22: INCEIPL $4
+
+ 0x25482E6C: 4182FFDC bc 12,2,0x25482E48
+ 23: Js02o $0x25482E48
+
+
+. 0 25482E5C 20
+. 7C 00 48 39 7C 8C 2A 78 7C 06 62 14 7C E9 60 F8 41 82 FF DC
+
+==== BB 123 (0x25482E70) approx BBs exec'd 0 ====
+
+ 0x25482E70: 7C004839 and. r0,r0,r9
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0x25482E74: 38600000 li r3,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25482E78: 4D820020 bclr 12,2
+ 10: GETL LR, t8
+ 11: Js02o-r t8
+
+
+. 0 25482E70 12
+. 7C 00 48 39 38 60 00 00 4D 82 00 20
+
+==== BB 124 (0x2547F238) approx BBs exec'd 0 ====
+
+ 0x2547F238: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547F23C: 418602F4 bc 12,6,0x2547F530
+ 4: Js06o $0x2547F530
+
+
+. 0 2547F238 8
+. 2C 83 00 00 41 86 02 F4
+
+==== BB 125 (0x2547F530) approx BBs exec'd 0 ====
+
+ 0x2547F530: 813A0008 lwz r9,8(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547F534: 3C000002 lis r0,2
+ 5: MOVL $0x20000, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x2547F538: 60030544 ori r3,r0,0x544
+ 8: MOVL $0x20544, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x2547F53C: 7C891840 cmpl cr1,r9,r3
+ 11: GETL R9, t8
+ 12: GETL R3, t10
+ 13: CMPUL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x1, CR
+ 15: INCEIPL $4
+
+ 0x2547F540: 41A5FD24 bc 13,5,0x2547F264
+ 16: Js05o $0x2547F264
+
+
+. 0 2547F530 20
+. 81 3A 00 08 3C 00 00 02 60 03 05 44 7C 89 18 40 41 A5 FD 24
+
+==== BB 126 (0x2547F264) approx BBs exec'd 0 ====
+
+ 0x2547F264: 2F1FFFFF cmpi cr6,r31,-1
+ 0: GETL R31, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x2547F268: 83BE04B4 lwz r29,1204(r30)
+ 5: GETL R30, t6
+ 6: ADDL $0x4B4, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R29
+ 9: INCEIPL $4
+
+ 0x2547F26C: 419A0030 bc 12,26,0x2547F29C
+ 10: Js26o $0x2547F29C
+
+
+. 0 2547F264 12
+. 2F 1F FF FF 83 BE 04 B4 41 9A 00 30
+
+==== BB 127 (0x2547F29C) approx BBs exec'd 0 ====
+
+ 0x2547F29C: 831A0004 lwz r24,4(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0x2547F2A0: 2F980000 cmpi cr7,r24,0
+ 5: GETL R24, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547F2A4: 409E000C bc 4,30,0x2547F2B0
+ 9: Jc30o $0x2547F2B0
+
+
+. 0 2547F29C 12
+. 83 1A 00 04 2F 98 00 00 40 9E 00 0C
+
+==== BB 128 (0x2547F2B0) approx BBs exec'd 0 ====
+
+ 0x2547F2B0: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547F2B4: 839E0500 lwz r28,1280(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x500, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x2547F2B8: 48001119 bl 0x254803D0
+ 8: MOVL $0x2547F2BC, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x254803D0 ($4)
+
+
+. 0 2547F2B0 12
+. 38 60 00 00 83 9E 05 00 48 00 11 19
+
+==== BB 129 brk(0x254803D0) approx BBs exec'd 0 ====
+
+ 0x254803D0: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x254803D4: 90610008 stw r3,8(r1)
+ 6: GETL R3, t4
+ 7: GETL R1, t6
+ 8: ADDL $0x8, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x254803D8: 3800002D li r0,45
+ 11: MOVL $0x2D, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x254803DC: 44000002 sc
+ 14: JMPo-sys $0x254803E0 ($4)
+
+
+. 0 254803D0 16
+. 94 21 FF F0 90 61 00 08 38 00 00 2D 44 00 00 02
+
+==== BB 130 (0x254803E0) approx BBs exec'd 0 ====
+
+ 0x254803E0: 80C10008 lwz r6,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254803E4: 7C8802A6 mflr r4
+ 5: GETL LR, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x254803E8: 48016C19 bl 0x25497000
+ 8: MOVL $0x254803EC, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x25497000 ($4)
+
+
+. 0 254803E0 12
+. 80 C1 00 08 7C 88 02 A6 48 01 6C 19
+
+==== BB 131 (0x254803EC) approx BBs exec'd 0 ====
+
+ 0x254803EC: 7CA802A6 mflr r5
+ 0: GETL LR, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x254803F0: 80A50504 lwz r5,1284(r5)
+ 3: GETL R5, t2
+ 4: ADDL $0x504, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x254803F4: 7C8803A6 mtlr r4
+ 8: GETL R4, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0x254803F8: 90650000 stw r3,0(r5)
+ 11: GETL R3, t8
+ 12: GETL R5, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x254803FC: 7C061840 cmpl cr0,r6,r3
+ 15: GETL R6, t12
+ 16: GETL R3, t14
+ 17: CMPUL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x0, CR
+ 19: INCEIPL $4
+
+ 0x25480400: 38210010 addi r1,r1,16
+ 20: GETL R1, t18
+ 21: ADDL $0x10, t18
+ 22: PUTL t18, R1
+ 23: INCEIPL $4
+
+ 0x25480404: 38600000 li r3,0
+ 24: MOVL $0x0, t20
+ 25: PUTL t20, R3
+ 26: INCEIPL $4
+
+ 0x25480408: 4CA10020 bclr 5,1
+ 27: GETL LR, t22
+ 28: Jc01o-r t22
+
+
+. 0 254803EC 32
+. 7C A8 02 A6 80 A5 05 04 7C 88 03 A6 90 65 00 00 7C 06 18 40 38 21 00 10 38 60 00 00 4C A1 00 20
+
+==== BB 132 (0x2547F2BC) approx BBs exec'd 0 ====
+
+ 0x2547F2BC: 813E0504 lwz r9,1284(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x504, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547F2C0: 809A0004 lwz r4,4(r26)
+ 5: GETL R26, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x2547F2C4: 81690000 lwz r11,0(r9)
+ 10: GETL R9, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0x2547F2C8: 7F2400D0 neg r25,r4
+ 14: GETL R4, t12
+ 15: NEGL t12
+ 16: PUTL t12, R25
+ 17: INCEIPL $4
+
+ 0x2547F2CC: 7C8BE040 cmpl cr1,r11,r28
+ 18: GETL R11, t14
+ 19: GETL R28, t16
+ 20: CMPUL t14, t16, t18 (-rSo)
+ 21: ICRFL t18, $0x1, CR
+ 22: INCEIPL $4
+
+ 0x2547F2D0: 7F645A14 add r27,r4,r11
+ 23: GETL R4, t20
+ 24: GETL R11, t22
+ 25: ADDL t20, t22
+ 26: PUTL t22, R27
+ 27: INCEIPL $4
+
+ 0x2547F2D4: 399BFFFF addi r12,r27,-1
+ 28: GETL R27, t24
+ 29: ADDL $0xFFFFFFFF, t24
+ 30: PUTL t24, R12
+ 31: INCEIPL $4
+
+ 0x2547F2D8: 7D83C838 and r3,r12,r25
+ 32: GETL R12, t26
+ 33: GETL R25, t28
+ 34: ANDL t26, t28
+ 35: PUTL t28, R3
+ 36: INCEIPL $4
+
+ 0x2547F2DC: 408402D8 bc 4,4,0x2547F5B4
+ 37: Jc04o $0x2547F5B4
+
+
+. 0 2547F2BC 36
+. 81 3E 05 04 80 9A 00 04 81 69 00 00 7F 24 00 D0 7C 8B E0 40 7F 64 5A 14 39 9B FF FF 7D 83 C8 38 40 84 02 D8
+
+==== BB 133 (0x2547F2E0) approx BBs exec'd 0 ====
+
+ 0x2547F2E0: 807A000C lwz r3,12(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547F2E4: 2C030000 cmpi cr0,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547F2E8: 4182000C bc 12,2,0x2547F2F4
+ 9: Js02o $0x2547F2F4
+
+
+. 0 2547F2E0 12
+. 80 7A 00 0C 2C 03 00 00 41 82 00 0C
+
+==== BB 134 (0x2547F2F4) approx BBs exec'd 0 ====
+
+ 0x2547F2F4: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547F2F8: 4800111D bl 0x25480414
+ 3: MOVL $0x2547F2FC, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25480414 ($4)
+
+
+. 0 2547F2F4 8
+. 38 60 00 00 48 00 11 1D
+
+==== BB 135 sbrk(0x25480414) approx BBs exec'd 0 ====
+
+ 0x25480414: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25480418: 7C8802A6 mflr r4
+ 6: GETL LR, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2548041C: 48016BE5 bl 0x25497000
+ 9: MOVL $0x25480420, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25480414 12
+. 94 21 FF E0 7C 88 02 A6 48 01 6B E5
+
+==== BB 136 (0x25480420) approx BBs exec'd 0 ====
+
+ 0x25480420: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25480424: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25480428: 93E1001C stw r31,28(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2548042C: 90810024 stw r4,36(r1)
+ 13: GETL R4, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25480430: 93A10014 stw r29,20(r1)
+ 18: GETL R29, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25480434: 7C7D1B78 or r29,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x25480438: 83FE0504 lwz r31,1284(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x504, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0x2548043C: 38600000 li r3,0
+ 31: MOVL $0x0, t24
+ 32: PUTL t24, R3
+ 33: INCEIPL $4
+
+ 0x25480440: 801F0000 lwz r0,0(r31)
+ 34: GETL R31, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R0
+ 37: INCEIPL $4
+
+ 0x25480444: 2F800000 cmpi cr7,r0,0
+ 38: GETL R0, t30
+ 39: CMP0L t30, t32 (-rSo)
+ 40: ICRFL t32, $0x7, CR
+ 41: INCEIPL $4
+
+ 0x25480448: 419E003C bc 12,30,0x25480484
+ 42: Js30o $0x25480484
+
+
+. 0 25480420 44
+. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 81 00 24 93 A1 00 14 7C 7D 1B 78 83 FE 05 04 38 60 00 00 80 1F 00 00 2F 80 00 00 41 9E 00 3C
+
+==== BB 137 (0x2548044C) approx BBs exec'd 0 ====
+
+ 0x2548044C: 813E049C lwz r9,1180(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x49C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25480450: 80A90000 lwz r5,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R5
+ 8: INCEIPL $4
+
+ 0x25480454: 2C050000 cmpi cr0,r5,0
+ 9: GETL R5, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x0, CR
+ 12: INCEIPL $4
+
+ 0x25480458: 4082002C bc 4,2,0x25480484
+ 13: Jc02o $0x25480484
+
+
+. 0 2548044C 16
+. 81 3E 04 9C 80 A9 00 00 2C 05 00 00 40 82 00 2C
+
+==== BB 138 (0x2548045C) approx BBs exec'd 0 ====
+
+ 0x2548045C: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25480460: 409A003C bc 4,26,0x2548049C
+ 4: Jc26o $0x2548049C
+
+
+. 0 2548045C 8
+. 2F 1D 00 00 40 9A 00 3C
+
+==== BB 139 (0x25480464) approx BBs exec'd 0 ====
+
+ 0x25480464: 807F0000 lwz r3,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25480468: 80C10024 lwz r6,36(r1)
+ 4: GETL R1, t4
+ 5: ADDL $0x24, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x2548046C: 83A10014 lwz r29,20(r1)
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R29
+ 13: INCEIPL $4
+
+ 0x25480470: 83C10018 lwz r30,24(r1)
+ 14: GETL R1, t12
+ 15: ADDL $0x18, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R30
+ 18: INCEIPL $4
+
+ 0x25480474: 7CC803A6 mtlr r6
+ 19: GETL R6, t16
+ 20: PUTL t16, LR
+ 21: INCEIPL $4
+
+ 0x25480478: 83E1001C lwz r31,28(r1)
+ 22: GETL R1, t18
+ 23: ADDL $0x1C, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R31
+ 26: INCEIPL $4
+
+ 0x2548047C: 38210020 addi r1,r1,32
+ 27: GETL R1, t22
+ 28: ADDL $0x20, t22
+ 29: PUTL t22, R1
+ 30: INCEIPL $4
+
+ 0x25480480: 4E800020 blr
+ 31: GETL LR, t24
+ 32: JMPo-r t24 ($4)
+
+
+. 0 25480464 32
+. 80 7F 00 00 80 C1 00 24 83 A1 00 14 83 C1 00 18 7C C8 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 140 (0x2547F2FC) approx BBs exec'd 0 ====
+
+ 0x2547F2FC: 7F83E000 cmp cr7,r3,r28
+ 0: GETL R3, t0
+ 1: GETL R28, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x2547F300: 419E02C4 bc 12,30,0x2547F5C4
+ 5: Js30o $0x2547F5C4
+
+
+. 0 2547F2FC 8
+. 7F 83 E0 00 41 9E 02 C4
+
+==== BB 141 (0x2547F304) approx BBs exec'd 0 ====
+
+ 0x2547F304: 80BD0000 lwz r5,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x2547F308: 2C850000 cmpi cr1,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x2547F30C: 408602A0 bc 4,6,0x2547F5AC
+ 8: Jc06o $0x2547F5AC
+
+
+. 0 2547F304 12
+. 80 BD 00 00 2C 85 00 00 40 86 02 A0
+
+==== BB 142 (0x2547F310) approx BBs exec'd 0 ====
+
+ 0x2547F310: 7EC3B378 or r3,r22,r22
+ 0: GETL R22, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547F314: 7EE803A6 mtlr r23
+ 3: GETL R23, t2
+ 4: PUTL t2, LR
+ 5: INCEIPL $4
+
+ 0x2547F318: 7EA4AB78 or r4,r21,r21
+ 6: GETL R21, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2547F31C: 38A101E0 addi r5,r1,480
+ 9: GETL R1, t6
+ 10: ADDL $0x1E0, t6
+ 11: PUTL t6, R5
+ 12: INCEIPL $4
+
+ 0x2547F320: 4E800021 blrl
+ 13: GETL LR, t8
+ 14: MOVL $0x2547F324, t10
+ 15: PUTL t10, LR
+ 16: JMPo-r t8 ($4)
+
+
+. 0 2547F310 20
+. 7E C3 B3 78 7E E8 03 A6 7E A4 AB 78 38 A1 01 E0 4E 80 00 21
+
+==== BB 143 dl_main(0x254721F0) approx BBs exec'd 0 ====
+
+ 0x254721F0: 9421FF30 stwu r1,-208(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF30, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x254721F4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254721F8: 48024E09 bl 0x25497000
+ 9: MOVL $0x254721FC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 254721F0 12
+. 94 21 FF 30 7C 08 02 A6 48 02 4E 09
+
+==== BB 144 (0x254721FC) approx BBs exec'd 0 ====
+
+ 0x254721FC: 93C100C8 stw r30,200(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xC8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25472200: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25472204: 92010090 stw r16,144(r1)
+ 8: GETL R16, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x90, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25472208: 900100D4 stw r0,212(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0xD4, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547220C: 7D600026 mfcr r11
+ 18: GETL CR, t14
+ 19: PUTL t14, R11
+ 20: INCEIPL $4
+
+ 0x25472210: 91C10088 stw r14,136(r1)
+ 21: GETL R14, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x88, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25472214: 821E04B4 lwz r16,1204(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4B4, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R16
+ 30: INCEIPL $4
+
+ 0x25472218: 819E04B8 lwz r12,1208(r30)
+ 31: GETL R30, t24
+ 32: ADDL $0x4B8, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R12
+ 35: INCEIPL $4
+
+ 0x2547221C: 81500000 lwz r10,0(r16)
+ 36: GETL R16, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R10
+ 39: INCEIPL $4
+
+ 0x25472220: 81DE04C8 lwz r14,1224(r30)
+ 40: GETL R30, t32
+ 41: ADDL $0x4C8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R14
+ 44: INCEIPL $4
+
+ 0x25472224: 2F8A0000 cmpi cr7,r10,0
+ 45: GETL R10, t36
+ 46: CMP0L t36, t38 (-rSo)
+ 47: ICRFL t38, $0x7, CR
+ 48: INCEIPL $4
+
+ 0x25472228: 813E0020 lwz r9,32(r30)
+ 49: GETL R30, t40
+ 50: ADDL $0x20, t40
+ 51: LDL (t40), t42
+ 52: PUTL t42, R9
+ 53: INCEIPL $4
+
+ 0x2547222C: 91610084 stw r11,132(r1)
+ 54: GETL R11, t44
+ 55: GETL R1, t46
+ 56: ADDL $0x84, t46
+ 57: STL t44, (t46)
+ 58: INCEIPL $4
+
+ 0x25472230: 811E04D8 lwz r8,1240(r30)
+ 59: GETL R30, t48
+ 60: ADDL $0x4D8, t48
+ 61: LDL (t48), t50
+ 62: PUTL t50, R8
+ 63: INCEIPL $4
+
+ 0x25472234: 816C0000 lwz r11,0(r12)
+ 64: GETL R12, t52
+ 65: LDL (t52), t54
+ 66: PUTL t54, R11
+ 67: INCEIPL $4
+
+ 0x25472238: 80FE04B0 lwz r7,1200(r30)
+ 68: GETL R30, t56
+ 69: ADDL $0x4B0, t56
+ 70: LDL (t56), t58
+ 71: PUTL t58, R7
+ 72: INCEIPL $4
+
+ 0x2547223C: 80DE001C lwz r6,28(r30)
+ 73: GETL R30, t60
+ 74: ADDL $0x1C, t60
+ 75: LDL (t60), t62
+ 76: PUTL t62, R6
+ 77: INCEIPL $4
+
+ 0x25472240: 801E04A8 lwz r0,1192(r30)
+ 78: GETL R30, t64
+ 79: ADDL $0x4A8, t64
+ 80: LDL (t64), t66
+ 81: PUTL t66, R0
+ 82: INCEIPL $4
+
+ 0x25472244: 93E100CC stw r31,204(r1)
+ 83: GETL R31, t68
+ 84: GETL R1, t70
+ 85: ADDL $0xCC, t70
+ 86: STL t68, (t70)
+ 87: INCEIPL $4
+
+ 0x25472248: 7C3F0B78 or r31,r1,r1
+ 88: GETL R1, t72
+ 89: PUTL t72, R31
+ 90: INCEIPL $4
+
+ 0x2547224C: 91E1008C stw r15,140(r1)
+ 91: GETL R15, t74
+ 92: GETL R1, t76
+ 93: ADDL $0x8C, t76
+ 94: STL t74, (t76)
+ 95: INCEIPL $4
+
+ 0x25472250: 92410098 stw r18,152(r1)
+ 96: GETL R18, t78
+ 97: GETL R1, t80
+ 98: ADDL $0x98, t80
+ 99: STL t78, (t80)
+ 100: INCEIPL $4
+
+ 0x25472254: 3A400000 li r18,0
+ 101: MOVL $0x0, t82
+ 102: PUTL t82, R18
+ 103: INCEIPL $4
+
+ 0x25472258: 9261009C stw r19,156(r1)
+ 104: GETL R19, t84
+ 105: GETL R1, t86
+ 106: ADDL $0x9C, t86
+ 107: STL t84, (t86)
+ 108: INCEIPL $4
+
+ 0x2547225C: 3A600000 li r19,0
+ 109: MOVL $0x0, t88
+ 110: PUTL t88, R19
+ 111: INCEIPL $4
+
+ 0x25472260: 928100A0 stw r20,160(r1)
+ 112: GETL R20, t90
+ 113: GETL R1, t92
+ 114: ADDL $0xA0, t92
+ 115: STL t90, (t92)
+ 116: INCEIPL $4
+
+ 0x25472264: 3A800000 li r20,0
+ 117: MOVL $0x0, t94
+ 118: PUTL t94, R20
+ 119: INCEIPL $4
+
+ 0x25472268: 92A100A4 stw r21,164(r1)
+ 120: GETL R21, t96
+ 121: GETL R1, t98
+ 122: ADDL $0xA4, t98
+ 123: STL t96, (t98)
+ 124: INCEIPL $4
+
+ 0x2547226C: 3AA00000 li r21,0
+ 125: MOVL $0x0, t100
+ 126: PUTL t100, R21
+ 127: INCEIPL $4
+
+ 0x25472270: 92C100A8 stw r22,168(r1)
+ 128: GETL R22, t102
+ 129: GETL R1, t104
+ 130: ADDL $0xA8, t104
+ 131: STL t102, (t104)
+ 132: INCEIPL $4
+
+ 0x25472274: 7CB62B78 or r22,r5,r5
+ 133: GETL R5, t106
+ 134: PUTL t106, R22
+ 135: INCEIPL $4
+
+ 0x25472278: 92E100AC stw r23,172(r1)
+ 136: GETL R23, t108
+ 137: GETL R1, t110
+ 138: ADDL $0xAC, t110
+ 139: STL t108, (t110)
+ 140: INCEIPL $4
+
+ 0x2547227C: 7C972378 or r23,r4,r4
+ 141: GETL R4, t112
+ 142: PUTL t112, R23
+ 143: INCEIPL $4
+
+ 0x25472280: 930100B0 stw r24,176(r1)
+ 144: GETL R24, t114
+ 145: GETL R1, t116
+ 146: ADDL $0xB0, t116
+ 147: STL t114, (t116)
+ 148: INCEIPL $4
+
+ 0x25472284: 7C781B78 or r24,r3,r3
+ 149: GETL R3, t118
+ 150: PUTL t118, R24
+ 151: INCEIPL $4
+
+ 0x25472288: 932100B4 stw r25,180(r1)
+ 152: GETL R25, t120
+ 153: GETL R1, t122
+ 154: ADDL $0xB4, t122
+ 155: STL t120, (t122)
+ 156: INCEIPL $4
+
+ 0x2547228C: 3B200000 li r25,0
+ 157: MOVL $0x0, t124
+ 158: PUTL t124, R25
+ 159: INCEIPL $4
+
+ 0x25472290: 912E03FC stw r9,1020(r14)
+ 160: GETL R9, t126
+ 161: GETL R14, t128
+ 162: ADDL $0x3FC, t128
+ 163: STL t126, (t128)
+ 164: INCEIPL $4
+
+ 0x25472294: 92210094 stw r17,148(r1)
+ 165: GETL R17, t130
+ 166: GETL R1, t132
+ 167: ADDL $0x94, t132
+ 168: STL t130, (t132)
+ 169: INCEIPL $4
+
+ 0x25472298: 934100B8 stw r26,184(r1)
+ 170: GETL R26, t134
+ 171: GETL R1, t136
+ 172: ADDL $0xB8, t136
+ 173: STL t134, (t136)
+ 174: INCEIPL $4
+
+ 0x2547229C: 936100BC stw r27,188(r1)
+ 175: GETL R27, t138
+ 176: GETL R1, t140
+ 177: ADDL $0xBC, t140
+ 178: STL t138, (t140)
+ 179: INCEIPL $4
+
+ 0x254722A0: 938100C0 stw r28,192(r1)
+ 180: GETL R28, t142
+ 181: GETL R1, t144
+ 182: ADDL $0xC0, t144
+ 183: STL t142, (t144)
+ 184: INCEIPL $4
+
+ 0x254722A4: 93A100C4 stw r29,196(r1)
+ 185: GETL R29, t146
+ 186: GETL R1, t148
+ 187: ADDL $0xC4, t148
+ 188: STL t146, (t148)
+ 189: INCEIPL $4
+
+ 0x254722A8: 910E01B4 stw r8,436(r14)
+ 190: GETL R8, t150
+ 191: GETL R14, t152
+ 192: ADDL $0x1B4, t152
+ 193: STL t150, (t152)
+ 194: INCEIPL $4
+
+ 0x254722AC: 90EE042C stw r7,1068(r14)
+ 195: GETL R7, t154
+ 196: GETL R14, t156
+ 197: ADDL $0x42C, t156
+ 198: STL t154, (t156)
+ 199: INCEIPL $4
+
+ 0x254722B0: 90CE03F8 stw r6,1016(r14)
+ 200: GETL R6, t158
+ 201: GETL R14, t160
+ 202: ADDL $0x3F8, t160
+ 203: STL t158, (t160)
+ 204: INCEIPL $4
+
+ 0x254722B4: 900E0404 stw r0,1028(r14)
+ 205: GETL R0, t162
+ 206: GETL R14, t164
+ 207: ADDL $0x404, t164
+ 208: STL t162, (t164)
+ 209: INCEIPL $4
+
+ 0x254722B8: 917F0038 stw r11,56(r31)
+ 210: GETL R11, t166
+ 211: GETL R31, t168
+ 212: ADDL $0x38, t168
+ 213: STL t166, (t168)
+ 214: INCEIPL $4
+
+ 0x254722BC: 81FE04F4 lwz r15,1268(r30)
+ 215: GETL R30, t170
+ 216: ADDL $0x4F4, t170
+ 217: LDL (t170), t172
+ 218: PUTL t172, R15
+ 219: INCEIPL $4
+
+ 0x254722C0: 813E007C lwz r9,124(r30)
+ 220: GETL R30, t174
+ 221: ADDL $0x7C, t174
+ 222: LDL (t174), t176
+ 223: PUTL t176, R9
+ 224: INCEIPL $4
+
+ 0x254722C4: 419E0008 bc 12,30,0x254722CC
+ 225: Js30o $0x254722CC
+
+
+. 0 254721FC 204
+. 93 C1 00 C8 7F C8 02 A6 92 01 00 90 90 01 00 D4 7D 60 00 26 91 C1 00 88 82 1E 04 B4 81 9E 04 B8 81 50 00 00 81 DE 04 C8 2F 8A 00 00 81 3E 00 20 91 61 00 84 81 1E 04 D8 81 6C 00 00 80 FE 04 B0 80 DE 00 1C 80 1E 04 A8 93 E1 00 CC 7C 3F 0B 78 91 E1 00 8C 92 41 00 98 3A 40 00 00 92 61 00 9C 3A 60 00 00 92 81 00 A0 3A 80 00 00 92 A1 00 A4 3A A0 00 00 92 C1 00 A8 7C B6 2B 78 92 E1 00 AC 7C 97 23 78 93 01 00 B0 7C 78 1B 78 93 21 00 B4 3B 20 00 00 91 2E 03 FC 92 21 00 94 93 41 00 B8 93 61 00 BC 93 81 00 C0 93 A1 00 C4 91 0E 01 B4 90 EE 04 2C 90 CE 03 F8 90 0E 04 04 91 7F 00 38 81 FE 04 F4 81 3E 00 7C 41 9E 00 08
+
+==== BB 145 (0x254722CC) approx BBs exec'd 0 ====
+
+ 0x254722CC: 823E0040 lwz r17,64(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x40, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R17
+ 4: INCEIPL $4
+
+ 0x254722D0: 912F0054 stw r9,84(r15)
+ 5: GETL R9, t4
+ 6: GETL R15, t6
+ 7: ADDL $0x54, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x254722D4: 387F0038 addi r3,r31,56
+ 10: GETL R31, t8
+ 11: ADDL $0x38, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0x254722D8: 4800D951 bl 0x2547FC28
+ 14: MOVL $0x254722DC, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x2547FC28 ($4)
+
+
+. 0 254722CC 16
+. 82 3E 00 40 91 2F 00 54 38 7F 00 38 48 00 D9 51
+
+==== BB 146 _dl_next_ld_env_entry(0x2547FC28) approx BBs exec'd 0 ====
+
+ 0x2547FC28: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547FC2C: 39400000 li r10,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x2547FC30: 81630000 lwz r11,0(r3)
+ 9: GETL R3, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x2547FC34: 812B0000 lwz r9,0(r11)
+ 13: GETL R11, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R9
+ 16: INCEIPL $4
+
+ 0x2547FC38: 2F890000 cmpi cr7,r9,0
+ 17: GETL R9, t14
+ 18: CMP0L t14, t16 (-rSo)
+ 19: ICRFL t16, $0x7, CR
+ 20: INCEIPL $4
+
+ 0x2547FC3C: 419E001C bc 12,30,0x2547FC58
+ 21: Js30o $0x2547FC58
+
+
+. 0 2547FC28 24
+. 94 21 FF F0 39 40 00 00 81 63 00 00 81 2B 00 00 2F 89 00 00 41 9E 00 1C
+
+==== BB 147 (0x2547FC40) approx BBs exec'd 0 ====
+
+ 0x2547FC40: 88090000 lbz r0,0(r9)
+ 0: GETL R9, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547FC44: 2C00004C cmpi cr0,r0,76
+ 4: GETL R0, t4
+ 5: MOVL $0x4C, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547FC48: 4182001C bc 12,2,0x2547FC64
+ 9: Js02o $0x2547FC64
+
+
+. 0 2547FC40 12
+. 88 09 00 00 2C 00 00 4C 41 82 00 1C
+
+==== BB 148 (0x2547FC4C) approx BBs exec'd 0 ====
+
+ 0x2547FC4C: 852B0004 lwzu r9,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R11
+ 3: LDL (t0), t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x2547FC50: 2F890000 cmpi cr7,r9,0
+ 6: GETL R9, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x2547FC54: 409EFFEC bc 4,30,0x2547FC40
+ 10: Jc30o $0x2547FC40
+
+
+. 0 2547FC4C 12
+. 85 2B 00 04 2F 89 00 00 40 9E FF EC
+
+==== BB 149 (0x2547FC64) approx BBs exec'd 0 ====
+
+ 0x2547FC64: 88890001 lbz r4,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547FC68: 2C840044 cmpi cr1,r4,68
+ 5: GETL R4, t4
+ 6: MOVL $0x44, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x2547FC6C: 4086FFE0 bc 4,6,0x2547FC4C
+ 10: Jc06o $0x2547FC4C
+
+
+. 0 2547FC64 12
+. 88 89 00 01 2C 84 00 44 40 86 FF E0
+
+==== BB 150 (0x2547FC70) approx BBs exec'd 0 ====
+
+ 0x2547FC70: 88A90002 lbz r5,2(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x2, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547FC74: 2F05005F cmpi cr6,r5,95
+ 5: GETL R5, t4
+ 6: MOVL $0x5F, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x2547FC78: 409AFFD4 bc 4,26,0x2547FC4C
+ 10: Jc26o $0x2547FC4C
+
+
+. 0 2547FC70 12
+. 88 A9 00 02 2F 05 00 5F 40 9A FF D4
+
+==== BB 151 (0x2547FC7C) approx BBs exec'd 0 ====
+
+ 0x2547FC7C: 38CB0004 addi r6,r11,4
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x2547FC80: 39490003 addi r10,r9,3
+ 4: GETL R9, t2
+ 5: ADDL $0x3, t2
+ 6: PUTL t2, R10
+ 7: INCEIPL $4
+
+ 0x2547FC84: 90C30000 stw r6,0(r3)
+ 8: GETL R6, t4
+ 9: GETL R3, t6
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x2547FC88: 4BFFFFD0 b 0x2547FC58
+ 12: JMPo $0x2547FC58 ($4)
+
+
+. 0 2547FC7C 16
+. 38 CB 00 04 39 49 00 03 90 C3 00 00 4B FF FF D0
+
+==== BB 152 (0x2547FC58) approx BBs exec'd 0 ====
+
+ 0x2547FC58: 7D435378 or r3,r10,r10
+ 0: GETL R10, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547FC5C: 38210010 addi r1,r1,16
+ 3: GETL R1, t2
+ 4: ADDL $0x10, t2
+ 5: PUTL t2, R1
+ 6: INCEIPL $4
+
+ 0x2547FC60: 4E800020 blr
+ 7: GETL LR, t4
+ 8: JMPo-r t4 ($4)
+
+
+. 0 2547FC58 12
+. 7D 43 53 78 38 21 00 10 4E 80 00 20
+
+==== BB 153 (0x254722DC) approx BBs exec'd 0 ====
+
+ 0x254722DC: 7C7D1B79 or. r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254722E0: 41820064 bc 12,2,0x25472344
+ 5: Js02o $0x25472344
+
+
+. 0 254722DC 8
+. 7C 7D 1B 79 41 82 00 64
+
+==== BB 154 (0x254722E4) approx BBs exec'd 0 ====
+
+ 0x254722E4: 881D0000 lbz r0,0(r29)
+ 0: GETL R29, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x254722E8: 39600000 li r11,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R11
+ 6: INCEIPL $4
+
+ 0x254722EC: 7C090379 or. r9,r0,r0
+ 7: GETL R0, t6
+ 8: PUTL t6, R9
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x254722F0: 40A20018 bc 5,2,0x25472308
+ 12: Jc02o $0x25472308
+
+
+. 0 254722E4 16
+. 88 1D 00 00 39 60 00 00 7C 09 03 79 40 A2 00 18
+
+==== BB 155 (0x25472308) approx BBs exec'd 0 ====
+
+ 0x25472308: 2C89003D cmpi cr1,r9,61
+ 0: GETL R9, t0
+ 1: MOVL $0x3D, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x2547230C: 4086FFEC bc 4,6,0x254722F8
+ 5: Jc06o $0x254722F8
+
+
+. 0 25472308 8
+. 2C 89 00 3D 40 86 FF EC
+
+==== BB 156 (0x254722F8) approx BBs exec'd 0 ====
+
+ 0x254722F8: 396B0001 addi r11,r11,1
+ 0: GETL R11, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0x254722FC: 7C1D58AE lbzx r0,r29,r11
+ 4: GETL R11, t2
+ 5: GETL R29, t4
+ 6: ADDL t4, t2
+ 7: LDB (t2), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x25472300: 7C090379 or. r9,r0,r0
+ 10: GETL R0, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25472304: 4182000C bc 12,2,0x25472310
+ 15: Js02o $0x25472310
+
+
+. 0 254722F8 16
+. 39 6B 00 01 7C 1D 58 AE 7C 09 03 79 41 82 00 0C
+
+==== BB 157 (0x25472310) approx BBs exec'd 0 ====
+
+ 0x25472310: 2D80003D cmpi cr3,r0,61
+ 0: GETL R0, t0
+ 1: MOVL $0x3D, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x3, CR
+ 4: INCEIPL $4
+
+ 0x25472314: 408EFFC0 bc 4,14,0x254722D4
+ 5: Jc14o $0x254722D4
+
+
+. 0 25472310 8
+. 2D 80 00 3D 40 8E FF C0
+
+==== BB 158 (0x25472318) approx BBs exec'd 0 ====
+
+ 0x25472318: 380BFFFC addi r0,r11,-4
+ 0: GETL R11, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x2547231C: 2A000010 cmpli cr4,r0,16
+ 4: GETL R0, t2
+ 5: MOVL $0x10, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x25472320: 41B1FFB4 bc 13,17,0x254722D4
+ 9: Js17o $0x254722D4
+
+
+. 0 25472318 12
+. 38 0B FF FC 2A 00 00 10 41 B1 FF B4
+
+==== BB 159 (0x25472324) approx BBs exec'd 0 ====
+
+ 0x25472324: 80BE0080 lwz r5,128(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x80, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25472328: 541A103A rlwinm r26,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R26
+ 8: INCEIPL $4
+
+ 0x2547232C: 7C9A282E lwzx r4,r26,r5
+ 9: GETL R5, t6
+ 10: GETL R26, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0x25472330: 7C642A14 add r3,r4,r5
+ 15: GETL R4, t12
+ 16: GETL R5, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R3
+ 19: INCEIPL $4
+
+ 0x25472334: 7C6903A6 mtctr r3
+ 20: GETL R3, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0x25472338: 4E800420 bctr
+ 23: GETL CTR, t18
+ 24: JMPo t18 ($4)
+
+
+. 0 25472324 24
+. 80 BE 00 80 54 1A 10 3A 7C 9A 28 2E 7C 64 2A 14 7C 69 03 A6 4E 80 04 20
+
+==== BB 160 (0x25473248) approx BBs exec'd 0 ====
+
+ 0x25473248: 809E00C4 lwz r4,196(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xC4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547324C: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25473250: 38A0000C li r5,12
+ 8: MOVL $0xC, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x25473254: 48010045 bl 0x25483298
+ 11: MOVL $0x25473258, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483298 ($4)
+
+
+. 0 25473248 16
+. 80 9E 00 C4 7F A3 EB 78 38 A0 00 0C 48 01 00 45
+
+==== BB 161 memcmp(0x25483298) approx BBs exec'd 0 ====
+
+ 0x25483298: 2B85000F cmpli cr7,r5,15
+ 0: GETL R5, t0
+ 1: MOVL $0xF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x2548329C: 9421FFE0 stwu r1,-32(r1)
+ 5: GETL R1, t6
+ 6: GETL R1, t8
+ 7: ADDL $0xFFFFFFE0, t8
+ 8: PUTL t8, R1
+ 9: STL t6, (t8)
+ 10: INCEIPL $4
+
+ 0x254832A0: 93810010 stw r28,16(r1)
+ 11: GETL R28, t10
+ 12: GETL R1, t12
+ 13: ADDL $0x10, t12
+ 14: STL t10, (t12)
+ 15: INCEIPL $4
+
+ 0x254832A4: 7C6B1B78 or r11,r3,r3
+ 16: GETL R3, t14
+ 17: PUTL t14, R11
+ 18: INCEIPL $4
+
+ 0x254832A8: 93A10014 stw r29,20(r1)
+ 19: GETL R29, t16
+ 20: GETL R1, t18
+ 21: ADDL $0x14, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0x254832AC: 93C10018 stw r30,24(r1)
+ 24: GETL R30, t20
+ 25: GETL R1, t22
+ 26: ADDL $0x18, t22
+ 27: STL t20, (t22)
+ 28: INCEIPL $4
+
+ 0x254832B0: 93E1001C stw r31,28(r1)
+ 29: GETL R31, t24
+ 30: GETL R1, t26
+ 31: ADDL $0x1C, t26
+ 32: STL t24, (t26)
+ 33: INCEIPL $4
+
+ 0x254832B4: 409D00BC bc 4,29,0x25483370
+ 34: Jc29o $0x25483370
+
+
+. 0 25483298 32
+. 2B 85 00 0F 94 21 FF E0 93 81 00 10 7C 6B 1B 78 93 A1 00 14 93 C1 00 18 93 E1 00 1C 40 9D 00 BC
+
+==== BB 162 (0x25483370) approx BBs exec'd 0 ====
+
+ 0x25483370: 2C050000 cmpi cr0,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25483374: 41820024 bc 12,2,0x25483398
+ 4: Js02o $0x25483398
+
+
+. 0 25483370 8
+. 2C 05 00 00 41 82 00 24
+
+==== BB 163 (0x25483378) approx BBs exec'd 0 ====
+
+ 0x25483378: 898B0000 lbz r12,0(r11)
+ 0: GETL R11, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R12
+ 3: INCEIPL $4
+
+ 0x2548337C: 396B0001 addi r11,r11,1
+ 4: GETL R11, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x25483380: 8BA40000 lbz r29,0(r4)
+ 8: GETL R4, t6
+ 9: LDB (t6), t8
+ 10: PUTL t8, R29
+ 11: INCEIPL $4
+
+ 0x25483384: 38840001 addi r4,r4,1
+ 12: GETL R4, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0x25483388: 7C7D6051 subf. r3,r29,r12
+ 16: GETL R29, t12
+ 17: GETL R12, t14
+ 18: SUBL t12, t14
+ 19: PUTL t14, R3
+ 20: CMP0L t14, t16 (-rSo)
+ 21: ICRFL t16, $0x0, CR
+ 22: INCEIPL $4
+
+ 0x2548338C: 40820010 bc 4,2,0x2548339C
+ 23: Jc02o $0x2548339C
+
+
+. 0 25483378 24
+. 89 8B 00 00 39 6B 00 01 8B A4 00 00 38 84 00 01 7C 7D 60 51 40 82 00 10
+
+==== BB 164 (0x25483390) approx BBs exec'd 0 ====
+
+ 0x25483390: 34A5FFFF addic. r5,r5,-1
+ 0: GETL R5, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R5
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25483394: 4082FFE4 bc 4,2,0x25483378
+ 6: Jc02o $0x25483378
+
+
+. 0 25483390 8
+. 34 A5 FF FF 40 82 FF E4
+
+==== BB 165 (0x25483398) approx BBs exec'd 0 ====
+
+ 0x25483398: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2548339C: 83810010 lwz r28,16(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x10, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x254833A0: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x254833A4: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0x254833A8: 83E1001C lwz r31,28(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x1C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R31
+ 22: INCEIPL $4
+
+ 0x254833AC: 38210020 addi r1,r1,32
+ 23: GETL R1, t18
+ 24: ADDL $0x20, t18
+ 25: PUTL t18, R1
+ 26: INCEIPL $4
+
+ 0x254833B0: 4E800020 blr
+ 27: GETL LR, t20
+ 28: JMPo-r t20 ($4)
+
+
+. 0 25483398 28
+. 38 60 00 00 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 166 (0x25473258) approx BBs exec'd 0 ====
+
+ 0x25473258: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547325C: 409E0428 bc 4,30,0x25473684
+ 4: Jc30o $0x25473684
+
+
+. 0 25473258 8
+. 2F 83 00 00 40 9E 04 28
+
+==== BB 167 (0x25473260) approx BBs exec'd 0 ====
+
+ 0x25473260: 813E004C lwz r9,76(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25473264: 381D000D addi r0,r29,13
+ 5: GETL R29, t4
+ 6: ADDL $0xD, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25473268: 90090000 stw r0,0(r9)
+ 9: GETL R0, t6
+ 10: GETL R9, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547326C: 4BFFF068 b 0x254722D4
+ 13: JMPo $0x254722D4 ($4)
+
+
+. 0 25473260 16
+. 81 3E 00 4C 38 1D 00 0D 90 09 00 00 4B FF F0 68
+
+==== BB 168 (0x254722D4) approx BBs exec'd 0 ====
+
+ 0x254722D4: 387F0038 addi r3,r31,56
+ 0: GETL R31, t0
+ 1: ADDL $0x38, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x254722D8: 4800D951 bl 0x2547FC28
+ 4: MOVL $0x254722DC, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0x2547FC28 ($4)
+
+
+. 0 254722D4 8
+. 38 7F 00 38 48 00 D9 51
+
+==== BB 169 (0x25473218) approx BBs exec'd 0 ====
+
+ 0x25473218: 809E00C0 lwz r4,192(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xC0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547321C: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25473220: 38A00007 li r5,7
+ 8: MOVL $0x7, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x25473224: 48010075 bl 0x25483298
+ 11: MOVL $0x25473228, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483298 ($4)
+
+
+. 0 25473218 16
+. 80 9E 00 C0 7F A3 EB 78 38 A0 00 07 48 01 00 75
+
+==== BB 170 (0x2548339C) approx BBs exec'd 0 ====
+
+ 0x2548339C: 83810010 lwz r28,16(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x254833A0: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x254833A4: 83C10018 lwz r30,24(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R30
+ 14: INCEIPL $4
+
+ 0x254833A8: 83E1001C lwz r31,28(r1)
+ 15: GETL R1, t12
+ 16: ADDL $0x1C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R31
+ 19: INCEIPL $4
+
+ 0x254833AC: 38210020 addi r1,r1,32
+ 20: GETL R1, t16
+ 21: ADDL $0x20, t16
+ 22: PUTL t16, R1
+ 23: INCEIPL $4
+
+ 0x254833B0: 4E800020 blr
+ 24: GETL LR, t18
+ 25: JMPo-r t18 ($4)
+
+
+. 0 2548339C 24
+. 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 171 (0x25473228) approx BBs exec'd 0 ====
+
+ 0x25473228: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547322C: 4086048C bc 4,6,0x254736B8
+ 4: Jc06o $0x254736B8
+
+
+. 0 25473228 8
+. 2C 83 00 00 40 86 04 8C
+
+==== BB 172 (0x254736B8) approx BBs exec'd 0 ====
+
+ 0x254736B8: 809E00E0 lwz r4,224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xE0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254736BC: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254736C0: 38A00007 li r5,7
+ 8: MOVL $0x7, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x254736C4: 4800FBD5 bl 0x25483298
+ 11: MOVL $0x254736C8, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483298 ($4)
+
+
+. 0 254736B8 16
+. 80 9E 00 E0 7F A3 EB 78 38 A0 00 07 48 00 FB D5
+
+==== BB 173 (0x254736C8) approx BBs exec'd 0 ====
+
+ 0x254736C8: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x254736CC: 40820088 bc 4,2,0x25473754
+ 4: Jc02o $0x25473754
+
+
+. 0 254736C8 8
+. 2C 03 00 00 40 82 00 88
+
+==== BB 174 (0x254736D0) approx BBs exec'd 0 ====
+
+ 0x254736D0: 38FD0008 addi r7,r29,8
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: PUTL t0, R7
+ 3: INCEIPL $4
+
+ 0x254736D4: 90F10000 stw r7,0(r17)
+ 4: GETL R7, t2
+ 5: GETL R17, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x254736D8: 4BFFEBFC b 0x254722D4
+ 8: JMPo $0x254722D4 ($4)
+
+
+. 0 254736D0 12
+. 38 FD 00 08 90 F1 00 00 4B FF EB FC
+
+==== BB 175 (0x25472344) approx BBs exec'd 0 ====
+
+ 0x25472344: 83700000 lwz r27,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R27
+ 3: INCEIPL $4
+
+ 0x25472348: 933F0030 stw r25,48(r31)
+ 4: GETL R25, t4
+ 5: GETL R31, t6
+ 6: ADDL $0x30, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547234C: 2D9B0000 cmpi cr3,r27,0
+ 9: GETL R27, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x3, CR
+ 12: INCEIPL $4
+
+ 0x25472350: 408E128C bc 4,14,0x254735DC
+ 13: Jc14o $0x254735DC
+
+
+. 0 25472344 16
+. 83 70 00 00 93 3F 00 30 2D 9B 00 00 40 8E 12 8C
+
+==== BB 176 (0x25472354) approx BBs exec'd 0 ====
+
+ 0x25472354: 813E0034 lwz r9,52(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25472358: 3014FFFF addic r0,r20,-1
+ 5: GETL R20, t4
+ 6: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547235C: 7F40A110 subfe r26,r0,r20
+ 9: GETL R0, t6
+ 10: GETL R20, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R26
+ 13: INCEIPL $4
+
+ 0x25472360: 83A90000 lwz r29,0(r9)
+ 14: GETL R9, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0x25472364: 313DFFFF addic r9,r29,-1
+ 18: GETL R29, t14
+ 19: ADCL $0xFFFFFFFF, t14 (-wCa)
+ 20: PUTL t14, R9
+ 21: INCEIPL $4
+
+ 0x25472368: 7F89E910 subfe r28,r9,r29
+ 22: GETL R9, t16
+ 23: GETL R29, t18
+ 24: SBBL t16, t18 (-rCa-wCa)
+ 25: PUTL t18, R28
+ 26: INCEIPL $4
+
+ 0x2547236C: 7F80D039 and. r0,r28,r26
+ 27: GETL R28, t20
+ 28: GETL R26, t22
+ 29: ANDL t20, t22
+ 30: PUTL t22, R0
+ 31: CMP0L t22, t24 (-rSo)
+ 32: ICRFL t24, $0x0, CR
+ 33: INCEIPL $4
+
+ 0x25472370: 40820B58 bc 4,2,0x25472EC8
+ 34: Jc02o $0x25472EC8
+
+
+. 0 25472354 32
+. 81 3E 00 34 30 14 FF FF 7F 40 A1 10 83 A9 00 00 31 3D FF FF 7F 89 E9 10 7F 80 D0 39 40 82 0B 58
+
+==== BB 177 (0x25472374) approx BBs exec'd 0 ====
+
+ 0x25472374: 83560000 lwz r26,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R26
+ 3: INCEIPL $4
+
+ 0x25472378: 80BE04E0 lwz r5,1248(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x4E0, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R5
+ 8: INCEIPL $4
+
+ 0x2547237C: 7D9A2800 cmp cr3,r26,r5
+ 9: GETL R26, t8
+ 10: GETL R5, t10
+ 11: CMPL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x3, CR
+ 13: INCEIPL $4
+
+ 0x25472380: 418E0940 bc 12,14,0x25472CC0
+ 14: Js14o $0x25472CC0
+
+
+. 0 25472374 16
+. 83 56 00 00 80 BE 04 E0 7D 9A 28 00 41 8E 09 40
+
+==== BB 178 (0x25472384) approx BBs exec'd 0 ====
+
+ 0x25472384: 807E0084 lwz r3,132(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25472388: 38A00000 li r5,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547238C: 38C00000 li r6,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0x25472390: 38E00000 li r7,0
+ 11: MOVL $0x0, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0x25472394: 7C641B78 or r4,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R4
+ 16: INCEIPL $4
+
+ 0x25472398: 39000000 li r8,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R8
+ 19: INCEIPL $4
+
+ 0x2547239C: 48006D59 bl 0x254790F4
+ 20: MOVL $0x254723A0, t14
+ 21: PUTL t14, LR
+ 22: JMPo-c $0x254790F4 ($4)
+
+
+. 0 25472384 28
+. 80 7E 00 84 38 A0 00 00 38 C0 00 00 38 E0 00 00 7C 64 1B 78 39 00 00 00 48 00 6D 59
+
+==== BB 179 _dl_new_object(0x254790F4) approx BBs exec'd 0 ====
+
+ 0x254790F4: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x254790F8: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254790FC: 4801DF05 bl 0x25497000
+ 9: MOVL $0x25479100, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 254790F4 12
+. 94 21 FF D0 7C 08 02 A6 48 01 DF 05
+
+==== BB 180 (0x25479100) approx BBs exec'd 0 ====
+
+ 0x25479100: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25479104: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25479108: 92C10008 stw r22,8(r1)
+ 8: GETL R22, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x8, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547910C: 92E1000C stw r23,12(r1)
+ 13: GETL R23, t10
+ 14: GETL R1, t12
+ 15: ADDL $0xC, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25479110: 7C771B78 or r23,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R23
+ 20: INCEIPL $4
+
+ 0x25479114: 93010010 stw r24,16(r1)
+ 21: GETL R24, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x10, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25479118: 7C832378 or r3,r4,r4
+ 26: GETL R4, t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0x2547911C: 93210014 stw r25,20(r1)
+ 29: GETL R25, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x14, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0x25479120: 7CB82B78 or r24,r5,r5
+ 34: GETL R5, t26
+ 35: PUTL t26, R24
+ 36: INCEIPL $4
+
+ 0x25479124: 93410018 stw r26,24(r1)
+ 37: GETL R26, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x18, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0x25479128: 7CF63B78 or r22,r7,r7
+ 42: GETL R7, t32
+ 43: PUTL t32, R22
+ 44: INCEIPL $4
+
+ 0x2547912C: 9361001C stw r27,28(r1)
+ 45: GETL R27, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x1C, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0x25479130: 7C9A2378 or r26,r4,r4
+ 50: GETL R4, t38
+ 51: PUTL t38, R26
+ 52: INCEIPL $4
+
+ 0x25479134: 93810020 stw r28,32(r1)
+ 53: GETL R28, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x20, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x25479138: 7D194378 or r25,r8,r8
+ 58: GETL R8, t44
+ 59: PUTL t44, R25
+ 60: INCEIPL $4
+
+ 0x2547913C: 93E1002C stw r31,44(r1)
+ 61: GETL R31, t46
+ 62: GETL R1, t48
+ 63: ADDL $0x2C, t48
+ 64: STL t46, (t48)
+ 65: INCEIPL $4
+
+ 0x25479140: 7CDC3378 or r28,r6,r6
+ 66: GETL R6, t50
+ 67: PUTL t50, R28
+ 68: INCEIPL $4
+
+ 0x25479144: 90010034 stw r0,52(r1)
+ 69: GETL R0, t52
+ 70: GETL R1, t54
+ 71: ADDL $0x34, t54
+ 72: STL t52, (t54)
+ 73: INCEIPL $4
+
+ 0x25479148: 93A10024 stw r29,36(r1)
+ 74: GETL R29, t56
+ 75: GETL R1, t58
+ 76: ADDL $0x24, t58
+ 77: STL t56, (t58)
+ 78: INCEIPL $4
+
+ 0x2547914C: 48009E85 bl 0x25482FD0
+ 79: MOVL $0x25479150, t60
+ 80: PUTL t60, LR
+ 81: JMPo-c $0x25482FD0 ($4)
+
+
+. 0 25479100 80
+. 93 C1 00 28 7F C8 02 A6 92 C1 00 08 92 E1 00 0C 7C 77 1B 78 93 01 00 10 7C 83 23 78 93 21 00 14 7C B8 2B 78 93 41 00 18 7C F6 3B 78 93 61 00 1C 7C 9A 23 78 93 81 00 20 7D 19 43 78 93 E1 00 2C 7C DC 33 78 90 01 00 34 93 A1 00 24 48 00 9E 85
+
+==== BB 181 strlen(0x25482FD0) approx BBs exec'd 0 ====
+
+ 0x25482FD0: 5464003A rlwinm r4,r3,0,0,29
+ 0: GETL R3, t0
+ 1: ANDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x25482FD4: 3CE07F7F lis r7,32639
+ 4: MOVL $0x7F7F0000, t2
+ 5: PUTL t2, R7
+ 6: INCEIPL $4
+
+ 0x25482FD8: 54651EF8 rlwinm r5,r3,3,27,28
+ 7: GETL R3, t4
+ 8: ROLL $0x3, t4
+ 9: ANDL $0x18, t4
+ 10: PUTL t4, R5
+ 11: INCEIPL $4
+
+ 0x25482FDC: 81040000 lwz r8,0(r4)
+ 12: GETL R4, t6
+ 13: LDL (t6), t8
+ 14: PUTL t8, R8
+ 15: INCEIPL $4
+
+ 0x25482FE0: 3920FFFF li r9,-1
+ 16: MOVL $0xFFFFFFFF, t10
+ 17: PUTL t10, R9
+ 18: INCEIPL $4
+
+ 0x25482FE4: 38E77F7F addi r7,r7,32639
+ 19: MOVL $0x7F7F7F7F, t12
+ 20: PUTL t12, R7
+ 21: INCEIPL $4
+
+ 0x25482FE8: 7D292C30 srw r9,r9,r5
+ 22: GETL R9, t16
+ 23: GETL R5, t14
+ 24: SHRL t14, t16
+ 25: PUTL t16, R9
+ 26: INCEIPL $4
+
+ 0x25482FEC: 7CE04038 and r0,r7,r8
+ 27: GETL R7, t18
+ 28: GETL R8, t20
+ 29: ANDL t18, t20
+ 30: PUTL t20, R0
+ 31: INCEIPL $4
+
+ 0x25482FF0: 7CEA4378 or r10,r7,r8
+ 32: GETL R7, t22
+ 33: GETL R8, t24
+ 34: ORL t24, t22
+ 35: PUTL t22, R10
+ 36: INCEIPL $4
+
+ 0x25482FF4: 7C003A14 add r0,r0,r7
+ 37: GETL R0, t26
+ 38: GETL R7, t28
+ 39: ADDL t26, t28
+ 40: PUTL t28, R0
+ 41: INCEIPL $4
+
+ 0x25482FF8: 7D4000F8 nor r0,r10,r0
+ 42: GETL R10, t30
+ 43: GETL R0, t32
+ 44: ORL t32, t30
+ 45: NOTL t30
+ 46: PUTL t30, R0
+ 47: INCEIPL $4
+
+ 0x25482FFC: 7C084839 and. r8,r0,r9
+ 48: GETL R0, t34
+ 49: GETL R9, t36
+ 50: ANDL t34, t36
+ 51: PUTL t36, R8
+ 52: CMP0L t36, t38 (-rSo)
+ 53: ICRFL t38, $0x0, CR
+ 54: INCEIPL $4
+
+ 0x25483000: 7C601120 mtcrf 0x1,r3
+ 55: GETL R3, t40
+ 56: ICRFL t40, $0x7, CR
+ 57: INCEIPL $4
+
+ 0x25483004: 40820070 bc 4,2,0x25483074
+ 58: Jc02o $0x25483074
+
+
+. 0 25482FD0 56
+. 54 64 00 3A 3C E0 7F 7F 54 65 1E F8 81 04 00 00 39 20 FF FF 38 E7 7F 7F 7D 29 2C 30 7C E0 40 38 7C EA 43 78 7C 00 3A 14 7D 40 00 F8 7C 08 48 39 7C 60 11 20 40 82 00 70
+
+==== BB 182 (0x25483074) approx BBs exec'd 0 ====
+
+ 0x25483074: 7D0B0034 cntlzw r11,r8
+ 0: GETL R8, t0
+ 1: CNTLZL t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0x25483078: 7C032050 subf r0,r3,r4
+ 4: GETL R3, t2
+ 5: GETL R4, t4
+ 6: SUBL t2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2548307C: 556BE8FE rlwinm r11,r11,29,3,31
+ 9: GETL R11, t6
+ 10: SHRL $0x3, t6
+ 11: PUTL t6, R11
+ 12: INCEIPL $4
+
+ 0x25483080: 7C605A14 add r3,r0,r11
+ 13: GETL R0, t8
+ 14: GETL R11, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0x25483084: 4E800020 blr
+ 18: GETL LR, t12
+ 19: JMPo-r t12 ($4)
+
+
+. 0 25483074 20
+. 7D 0B 00 34 7C 03 20 50 55 6B E8 FE 7C 60 5A 14 4E 80 00 20
+
+==== BB 183 (0x25479150) approx BBs exec'd 0 ====
+
+ 0x25479150: 38800001 li r4,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x25479154: 7C691B78 or r9,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x25479158: 3863024D addi r3,r3,589
+ 6: GETL R3, t4
+ 7: ADDL $0x24D, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0x2547915C: 3B690001 addi r27,r9,1
+ 10: GETL R9, t6
+ 11: ADDL $0x1, t6
+ 12: PUTL t6, R27
+ 13: INCEIPL $4
+
+ 0x25479160: 4801E8CD bl 0x25497A2C
+ 14: MOVL $0x25479164, t8
+ 15: PUTL t8, LR
+ 16: JMPo-c $0x25497A2C ($4)
+
+
+. 0 25479150 20
+. 38 80 00 01 7C 69 1B 78 38 63 02 4D 3B 69 00 01 48 01 E8 CD
+
+==== BB 184 (0x25497A2C) approx BBs exec'd 0 ====
+
+ 0x25497A2C: 4BFE848C b 0x2547FEB8
+ 0: JMPo $0x2547FEB8 ($4)
+
+
+. 0 25497A2C 4
+. 4B FE 84 8C
+
+==== BB 185 calloc(0x2547FEB8) approx BBs exec'd 0 ====
+
+ 0x2547FEB8: 7C6321D6 mullw r3,r3,r4
+ 0: GETL R3, t0
+ 1: GETL R4, t2
+ 2: MULL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547FEBC: 7CA802A6 mflr r5
+ 5: GETL LR, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547FEC0: 9421FFF0 stwu r1,-16(r1)
+ 8: GETL R1, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xFFFFFFF0, t8
+ 11: PUTL t8, R1
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547FEC4: 90A10014 stw r5,20(r1)
+ 14: GETL R5, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x14, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x2547FEC8: 48017B5D bl 0x25497A24
+ 19: MOVL $0x2547FECC, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x25497A24 ($4)
+
+
+. 0 2547FEB8 20
+. 7C 63 21 D6 7C A8 02 A6 94 21 FF F0 90 A1 00 14 48 01 7B 5D
+
+==== BB 186 (0x25497A24) approx BBs exec'd 0 ====
+
+ 0x25497A24: 4BFE846C b 0x2547FE90
+ 0: JMPo $0x2547FE90 ($4)
+
+
+. 0 25497A24 4
+. 4B FE 84 6C
+
+==== BB 187 malloc(0x2547FE90) approx BBs exec'd 0 ====
+
+ 0x2547FE90: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547FE94: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547FE98: 90810014 stw r4,20(r1)
+ 9: GETL R4, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547FE9C: 7C641B78 or r4,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R4
+ 16: INCEIPL $4
+
+ 0x2547FEA0: 38600008 li r3,8
+ 17: MOVL $0x8, t12
+ 18: PUTL t12, R3
+ 19: INCEIPL $4
+
+ 0x2547FEA4: 48017B79 bl 0x25497A1C
+ 20: MOVL $0x2547FEA8, t14
+ 21: PUTL t14, LR
+ 22: JMPo-c $0x25497A1C ($4)
+
+
+. 0 2547FE90 24
+. 7C 88 02 A6 94 21 FF F0 90 81 00 14 7C 64 1B 78 38 60 00 08 48 01 7B 79
+
+==== BB 188 (0x25497A1C) approx BBs exec'd 0 ====
+
+ 0x25497A1C: 4BFE832C b 0x2547FD48
+ 0: JMPo $0x2547FD48 ($4)
+
+
+. 0 25497A1C 4
+. 4B FE 83 2C
+
+==== BB 189 __libc_memalign(0x2547FD48) approx BBs exec'd 0 ====
+
+ 0x2547FD48: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547FD4C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547FD50: 480172B1 bl 0x25497000
+ 9: MOVL $0x2547FD54, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547FD48 12
+. 94 21 FF E0 7C 08 02 A6 48 01 72 B1
+
+==== BB 190 (0x2547FD54) approx BBs exec'd 0 ====
+
+ 0x2547FD54: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547FD58: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547FD5C: 9361000C stw r27,12(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547FD60: 90010024 stw r0,36(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547FD64: 7C6A1B78 or r10,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R10
+ 20: INCEIPL $4
+
+ 0x2547FD68: 93810010 stw r28,16(r1)
+ 21: GETL R28, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x10, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547FD6C: 38A00003 li r5,3
+ 26: MOVL $0x3, t20
+ 27: PUTL t20, R5
+ 28: INCEIPL $4
+
+ 0x2547FD70: 837E0418 lwz r27,1048(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x418, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R27
+ 33: INCEIPL $4
+
+ 0x2547FD74: 38C00022 li r6,34
+ 34: MOVL $0x22, t26
+ 35: PUTL t26, R6
+ 36: INCEIPL $4
+
+ 0x2547FD78: 93A10014 stw r29,20(r1)
+ 37: GETL R29, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x14, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0x2547FD7C: 38E0FFFF li r7,-1
+ 42: MOVL $0xFFFFFFFF, t32
+ 43: PUTL t32, R7
+ 44: INCEIPL $4
+
+ 0x2547FD80: 817B0000 lwz r11,0(r27)
+ 45: GETL R27, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R11
+ 48: INCEIPL $4
+
+ 0x2547FD84: 7FA300D0 neg r29,r3
+ 49: GETL R3, t38
+ 50: NEGL t38
+ 51: PUTL t38, R29
+ 52: INCEIPL $4
+
+ 0x2547FD88: 93E1001C stw r31,28(r1)
+ 53: GETL R31, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x1C, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x2547FD8C: 39000000 li r8,0
+ 58: MOVL $0x0, t44
+ 59: PUTL t44, R8
+ 60: INCEIPL $4
+
+ 0x2547FD90: 2F8B0000 cmpi cr7,r11,0
+ 61: GETL R11, t46
+ 62: CMP0L t46, t48 (-rSo)
+ 63: ICRFL t48, $0x7, CR
+ 64: INCEIPL $4
+
+ 0x2547FD94: 819E0500 lwz r12,1280(r30)
+ 65: GETL R30, t50
+ 66: ADDL $0x500, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R12
+ 69: INCEIPL $4
+
+ 0x2547FD98: 38600000 li r3,0
+ 70: MOVL $0x0, t54
+ 71: PUTL t54, R3
+ 72: INCEIPL $4
+
+ 0x2547FD9C: 7C9C2378 or r28,r4,r4
+ 73: GETL R4, t56
+ 74: PUTL t56, R28
+ 75: INCEIPL $4
+
+ 0x2547FDA0: 83FE041C lwz r31,1052(r30)
+ 76: GETL R30, t58
+ 77: ADDL $0x41C, t58
+ 78: LDL (t58), t60
+ 79: PUTL t60, R31
+ 80: INCEIPL $4
+
+ 0x2547FDA4: 409E0024 bc 4,30,0x2547FDC8
+ 81: Jc30o $0x2547FDC8
+
+
+. 0 2547FD54 84
+. 93 C1 00 18 7F C8 02 A6 93 61 00 0C 90 01 00 24 7C 6A 1B 78 93 81 00 10 38 A0 00 03 83 7E 04 18 38 C0 00 22 93 A1 00 14 38 E0 FF FF 81 7B 00 00 7F A3 00 D0 93 E1 00 1C 39 00 00 00 2F 8B 00 00 81 9E 05 00 38 60 00 00 7C 9C 23 78 83 FE 04 1C 40 9E 00 24
+
+==== BB 191 (0x2547FDA8) approx BBs exec'd 0 ====
+
+ 0x2547FDA8: 813E04F4 lwz r9,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547FDAC: 919F0000 stw r12,0(r31)
+ 5: GETL R12, t4
+ 6: GETL R31, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547FDB0: 81690004 lwz r11,4(r9)
+ 9: GETL R9, t8
+ 10: ADDL $0x4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0x2547FDB4: 7C8B6214 add r4,r11,r12
+ 14: GETL R11, t12
+ 15: GETL R12, t14
+ 16: ADDL t12, t14
+ 17: PUTL t14, R4
+ 18: INCEIPL $4
+
+ 0x2547FDB8: 3924FFFF addi r9,r4,-1
+ 19: GETL R4, t16
+ 20: ADDL $0xFFFFFFFF, t16
+ 21: PUTL t16, R9
+ 22: INCEIPL $4
+
+ 0x2547FDBC: 7C8B00D0 neg r4,r11
+ 23: GETL R11, t18
+ 24: NEGL t18
+ 25: PUTL t18, R4
+ 26: INCEIPL $4
+
+ 0x2547FDC0: 7D2B2038 and r11,r9,r4
+ 27: GETL R9, t20
+ 28: GETL R4, t22
+ 29: ANDL t20, t22
+ 30: PUTL t22, R11
+ 31: INCEIPL $4
+
+ 0x2547FDC4: 917B0000 stw r11,0(r27)
+ 32: GETL R11, t24
+ 33: GETL R27, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547FDC8: 813F0000 lwz r9,0(r31)
+ 36: GETL R31, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R9
+ 39: INCEIPL $4
+
+ 0x2547FDCC: 7C895214 add r4,r9,r10
+ 40: GETL R9, t32
+ 41: GETL R10, t34
+ 42: ADDL t32, t34
+ 43: PUTL t34, R4
+ 44: INCEIPL $4
+
+ 0x2547FDD0: 3804FFFF addi r0,r4,-1
+ 45: GETL R4, t36
+ 46: ADDL $0xFFFFFFFF, t36
+ 47: PUTL t36, R0
+ 48: INCEIPL $4
+
+ 0x2547FDD4: 7C0AE838 and r10,r0,r29
+ 49: GETL R0, t38
+ 50: GETL R29, t40
+ 51: ANDL t38, t40
+ 52: PUTL t40, R10
+ 53: INCEIPL $4
+
+ 0x2547FDD8: 7D8AE214 add r12,r10,r28
+ 54: GETL R10, t42
+ 55: GETL R28, t44
+ 56: ADDL t42, t44
+ 57: PUTL t44, R12
+ 58: INCEIPL $4
+
+ 0x2547FDDC: 915F0000 stw r10,0(r31)
+ 59: GETL R10, t46
+ 60: GETL R31, t48
+ 61: STL t46, (t48)
+ 62: INCEIPL $4
+
+ 0x2547FDE0: 7C0C5840 cmpl cr0,r12,r11
+ 63: GETL R12, t50
+ 64: GETL R11, t52
+ 65: CMPUL t50, t52, t54 (-rSo)
+ 66: ICRFL t54, $0x0, CR
+ 67: INCEIPL $4
+
+ 0x2547FDE4: 4080003C bc 4,0,0x2547FE20
+ 68: Jc00o $0x2547FE20
+
+
+. 0 2547FDA8 64
+. 81 3E 04 F4 91 9F 00 00 81 69 00 04 7C 8B 62 14 39 24 FF FF 7C 8B 00 D0 7D 2B 20 38 91 7B 00 00 81 3F 00 00 7C 89 52 14 38 04 FF FF 7C 0A E8 38 7D 8A E2 14 91 5F 00 00 7C 0C 58 40 40 80 00 3C
+
+==== BB 192 (0x2547FDE8) approx BBs exec'd 0 ====
+
+ 0x2547FDE8: 807F0000 lwz r3,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x2547FDEC: 80C10024 lwz r6,36(r1)
+ 4: GETL R1, t4
+ 5: ADDL $0x24, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x2547FDF0: 7D03E214 add r8,r3,r28
+ 9: GETL R3, t8
+ 10: GETL R28, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R8
+ 13: INCEIPL $4
+
+ 0x2547FDF4: 80FE0420 lwz r7,1056(r30)
+ 14: GETL R30, t12
+ 15: ADDL $0x420, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R7
+ 18: INCEIPL $4
+
+ 0x2547FDF8: 911F0000 stw r8,0(r31)
+ 19: GETL R8, t16
+ 20: GETL R31, t18
+ 21: STL t16, (t18)
+ 22: INCEIPL $4
+
+ 0x2547FDFC: 7CC803A6 mtlr r6
+ 23: GETL R6, t20
+ 24: PUTL t20, LR
+ 25: INCEIPL $4
+
+ 0x2547FE00: 8361000C lwz r27,12(r1)
+ 26: GETL R1, t22
+ 27: ADDL $0xC, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R27
+ 30: INCEIPL $4
+
+ 0x2547FE04: 83810010 lwz r28,16(r1)
+ 31: GETL R1, t26
+ 32: ADDL $0x10, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R28
+ 35: INCEIPL $4
+
+ 0x2547FE08: 83A10014 lwz r29,20(r1)
+ 36: GETL R1, t30
+ 37: ADDL $0x14, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R29
+ 40: INCEIPL $4
+
+ 0x2547FE0C: 83C10018 lwz r30,24(r1)
+ 41: GETL R1, t34
+ 42: ADDL $0x18, t34
+ 43: LDL (t34), t36
+ 44: PUTL t36, R30
+ 45: INCEIPL $4
+
+ 0x2547FE10: 83E1001C lwz r31,28(r1)
+ 46: GETL R1, t38
+ 47: ADDL $0x1C, t38
+ 48: LDL (t38), t40
+ 49: PUTL t40, R31
+ 50: INCEIPL $4
+
+ 0x2547FE14: 38210020 addi r1,r1,32
+ 51: GETL R1, t42
+ 52: ADDL $0x20, t42
+ 53: PUTL t42, R1
+ 54: INCEIPL $4
+
+ 0x2547FE18: 90670000 stw r3,0(r7)
+ 55: GETL R3, t44
+ 56: GETL R7, t46
+ 57: STL t44, (t46)
+ 58: INCEIPL $4
+
+ 0x2547FE1C: 4E800020 blr
+ 59: GETL LR, t48
+ 60: JMPo-r t48 ($4)
+
+
+. 0 2547FDE8 56
+. 80 7F 00 00 80 C1 00 24 7D 03 E2 14 80 FE 04 20 91 1F 00 00 7C C8 03 A6 83 61 00 0C 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 90 67 00 00 4E 80 00 20
+
+==== BB 193 (0x2547FEA8) approx BBs exec'd 0 ====
+
+ 0x2547FEA8: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547FEAC: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x2547FEB0: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x2547FEB4: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+. 0 2547FEA8 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+==== BB 194 (0x2547FECC) approx BBs exec'd 0 ====
+
+ 0x2547FECC: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547FED0: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x2547FED4: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x2547FED8: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+. 0 2547FECC 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+==== BB 195 (0x25479164) approx BBs exec'd 0 ====
+
+ 0x25479164: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25479168: 38600000 li r3,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547916C: 41820174 bc 12,2,0x254792E0
+ 8: Js02o $0x254792E0
+
+
+. 0 25479164 12
+. 7C 7F 1B 79 38 60 00 00 41 82 01 74
+
+==== BB 196 (0x25479170) approx BBs exec'd 0 ====
+
+ 0x25479170: 3BBF0240 addi r29,r31,576
+ 0: GETL R31, t0
+ 1: ADDL $0x240, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x25479174: 7F44D378 or r4,r26,r26
+ 4: GETL R26, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0x25479178: 7F65DB78 or r5,r27,r27
+ 7: GETL R27, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0x2547917C: 93FF0014 stw r31,20(r31)
+ 10: GETL R31, t6
+ 11: GETL R31, t8
+ 12: ADDL $0x14, t8
+ 13: STL t6, (t8)
+ 14: INCEIPL $4
+
+ 0x25479180: 93BF001C stw r29,28(r31)
+ 15: GETL R29, t10
+ 16: GETL R31, t12
+ 17: ADDL $0x1C, t12
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0x25479184: 387F024C addi r3,r31,588
+ 20: GETL R31, t14
+ 21: ADDL $0x24C, t14
+ 22: PUTL t14, R3
+ 23: INCEIPL $4
+
+ 0x25479188: 4800AA59 bl 0x25483BE0
+ 24: MOVL $0x2547918C, t16
+ 25: PUTL t16, LR
+ 26: JMPo-c $0x25483BE0 ($4)
+
+
+. 0 25479170 28
+. 3B BF 02 40 7F 44 D3 78 7F 65 DB 78 93 FF 00 14 93 BF 00 1C 38 7F 02 4C 48 00 AA 59
+
+==== BB 197 (0x25483C68) approx BBs exec'd 0 ====
+
+ 0x25483C68: 2C850000 cmpi cr1,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x25483C6C: 4186001C bc 12,6,0x25483C88
+ 4: Js06o $0x25483C88
+
+
+. 0 25483C68 8
+. 2C 85 00 00 41 86 00 1C
+
+==== BB 198 (0x25483C70) approx BBs exec'd 0 ====
+
+ 0x25483C70: 7CA903A6 mtctr r5
+ 0: GETL R5, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x25483C74: 88FD0000 lbz r7,0(r29)
+ 3: GETL R29, t2
+ 4: LDB (t2), t4
+ 5: PUTL t4, R7
+ 6: INCEIPL $4
+
+ 0x25483C78: 3BBD0001 addi r29,r29,1
+ 7: GETL R29, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R29
+ 10: INCEIPL $4
+
+ 0x25483C7C: 98FF0000 stb r7,0(r31)
+ 11: GETL R7, t8
+ 12: GETL R31, t10
+ 13: STB t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25483C80: 3BFF0001 addi r31,r31,1
+ 15: GETL R31, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R31
+ 18: INCEIPL $4
+
+ 0x25483C84: 4200FFF0 bc 16,0,0x25483C74
+ 19: GETL CTR, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, CTR
+ 22: JIFZL t14, $0x25483C88
+ 23: JMPo $0x25483C74 ($4)
+
+
+. 0 25483C70 24
+. 7C A9 03 A6 88 FD 00 00 3B BD 00 01 98 FF 00 00 3B FF 00 01 42 00 FF F0
+
+==== BB 199 (0x2547918C) approx BBs exec'd 0 ====
+
+ 0x2547918C: 38A00001 li r5,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x25479190: 90BD0008 stw r5,8(r29)
+ 3: GETL R5, t2
+ 4: GETL R29, t4
+ 5: ADDL $0x8, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x25479194: 1D590018 mulli r10,r25,24
+ 8: GETL R25, t6
+ 9: MULL $0x18, t6
+ 10: PUTL t6, R10
+ 11: INCEIPL $4
+
+ 0x25479198: 80DF0180 lwz r6,384(r31)
+ 12: GETL R31, t8
+ 13: ADDL $0x180, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R6
+ 16: INCEIPL $4
+
+ 0x2547919C: 3880FFFF li r4,-1
+ 17: MOVL $0xFFFFFFFF, t12
+ 18: PUTL t12, R4
+ 19: INCEIPL $4
+
+ 0x254791A0: 80BE04C8 lwz r5,1224(r30)
+ 20: GETL R30, t14
+ 21: ADDL $0x4C8, t14
+ 22: LDL (t14), t16
+ 23: PUTL t16, R5
+ 24: INCEIPL $4
+
+ 0x254791A4: 5306F002 rlwimi r6,r24,30,0,1
+ 25: GETL R6, t18
+ 26: GETL R24, t20
+ 27: ROLL $0x1E, t20
+ 28: ANDL $0xC0000000, t20
+ 29: ANDL $0x3FFFFFFF, t18
+ 30: ORL t18, t20
+ 31: PUTL t20, R6
+ 32: INCEIPL $4
+
+ 0x254791A8: 939F0168 stw r28,360(r31)
+ 33: GETL R28, t22
+ 34: GETL R31, t24
+ 35: ADDL $0x168, t24
+ 36: STL t22, (t24)
+ 37: INCEIPL $4
+
+ 0x254791AC: 90DF0180 stw r6,384(r31)
+ 38: GETL R6, t26
+ 39: GETL R31, t28
+ 40: ADDL $0x180, t28
+ 41: STL t26, (t28)
+ 42: INCEIPL $4
+
+ 0x254791B0: 38DF01AC addi r6,r31,428
+ 43: GETL R31, t30
+ 44: ADDL $0x1AC, t30
+ 45: PUTL t30, R6
+ 46: INCEIPL $4
+
+ 0x254791B4: 7D6A282E lwzx r11,r10,r5
+ 47: GETL R5, t32
+ 48: GETL R10, t34
+ 49: ADDL t34, t32
+ 50: LDL (t32), t36
+ 51: PUTL t36, R11
+ 52: INCEIPL $4
+
+ 0x254791B8: 907F0240 stw r3,576(r31)
+ 53: GETL R3, t38
+ 54: GETL R31, t40
+ 55: ADDL $0x240, t40
+ 56: STL t38, (t40)
+ 57: INCEIPL $4
+
+ 0x254791BC: 38600004 li r3,4
+ 58: MOVL $0x4, t42
+ 59: PUTL t42, R3
+ 60: INCEIPL $4
+
+ 0x254791C0: 2F8B0000 cmpi cr7,r11,0
+ 61: GETL R11, t44
+ 62: CMP0L t44, t46 (-rSo)
+ 63: ICRFL t46, $0x7, CR
+ 64: INCEIPL $4
+
+ 0x254791C4: 909F022C stw r4,556(r31)
+ 65: GETL R4, t48
+ 66: GETL R31, t50
+ 67: ADDL $0x22C, t50
+ 68: STL t48, (t50)
+ 69: INCEIPL $4
+
+ 0x254791C8: 907F01BC stw r3,444(r31)
+ 70: GETL R3, t52
+ 71: GETL R31, t54
+ 72: ADDL $0x1BC, t54
+ 73: STL t52, (t54)
+ 74: INCEIPL $4
+
+ 0x254791CC: 38800000 li r4,0
+ 75: MOVL $0x0, t56
+ 76: PUTL t56, R4
+ 77: INCEIPL $4
+
+ 0x254791D0: 92FF0004 stw r23,4(r31)
+ 78: GETL R23, t58
+ 79: GETL R31, t60
+ 80: ADDL $0x4, t60
+ 81: STL t58, (t60)
+ 82: INCEIPL $4
+
+ 0x254791D4: 933F0018 stw r25,24(r31)
+ 83: GETL R25, t62
+ 84: GETL R31, t64
+ 85: ADDL $0x18, t64
+ 86: STL t62, (t64)
+ 87: INCEIPL $4
+
+ 0x254791D8: 90DF01C0 stw r6,448(r31)
+ 88: GETL R6, t66
+ 89: GETL R31, t68
+ 90: ADDL $0x1C0, t68
+ 91: STL t66, (t68)
+ 92: INCEIPL $4
+
+ 0x254791DC: 409E013C bc 4,30,0x25479318
+ 93: Jc30o $0x25479318
+
+
+. 0 2547918C 84
+. 38 A0 00 01 90 BD 00 08 1D 59 00 18 80 DF 01 80 38 80 FF FF 80 BE 04 C8 53 06 F0 02 93 9F 01 68 90 DF 01 80 38 DF 01 AC 7D 6A 28 2E 90 7F 02 40 38 60 00 04 2F 8B 00 00 90 9F 02 2C 90 7F 01 BC 38 80 00 00 92 FF 00 04 93 3F 00 18 90 DF 01 C0 40 9E 01 3C
+
+==== BB 200 (0x254791E0) approx BBs exec'd 0 ====
+
+ 0x254791E0: 7FEA292E stwx r31,r10,r5
+ 0: GETL R5, t0
+ 1: GETL R10, t2
+ 2: ADDL t2, t0
+ 3: GETL R31, t4
+ 4: STL t4, (t0)
+ 5: INCEIPL $4
+
+ 0x254791E4: 2F1C0000 cmpi cr6,r28,0
+ 6: GETL R28, t6
+ 7: CMP0L t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x254791E8: 7D4A2A14 add r10,r10,r5
+ 10: GETL R10, t10
+ 11: GETL R5, t12
+ 12: ADDL t10, t12
+ 13: PUTL t12, R10
+ 14: INCEIPL $4
+
+ 0x254791EC: 81650198 lwz r11,408(r5)
+ 15: GETL R5, t14
+ 16: ADDL $0x198, t14
+ 17: LDL (t14), t16
+ 18: PUTL t16, R11
+ 19: INCEIPL $4
+
+ 0x254791F0: 832A0004 lwz r25,4(r10)
+ 20: GETL R10, t18
+ 21: ADDL $0x4, t18
+ 22: LDL (t18), t20
+ 23: PUTL t20, R25
+ 24: INCEIPL $4
+
+ 0x254791F4: 8185019C lwz r12,412(r5)
+ 25: GETL R5, t22
+ 26: ADDL $0x19C, t22
+ 27: LDL (t22), t24
+ 28: PUTL t24, R12
+ 29: INCEIPL $4
+
+ 0x254791F8: 3B190001 addi r24,r25,1
+ 30: GETL R25, t26
+ 31: ADDL $0x1, t26
+ 32: PUTL t26, R24
+ 33: INCEIPL $4
+
+ 0x254791FC: 310C0001 addic r8,r12,1
+ 34: GETL R12, t28
+ 35: ADCL $0x1, t28 (-wCa)
+ 36: PUTL t28, R8
+ 37: INCEIPL $4
+
+ 0x25479200: 7CEB0194 addze r7,r11
+ 38: GETL R11, t30
+ 39: ADCL $0x0, t30 (-rCa-wCa)
+ 40: PUTL t30, R7
+ 41: INCEIPL $4
+
+ 0x25479204: 930A0004 stw r24,4(r10)
+ 42: GETL R24, t32
+ 43: GETL R10, t34
+ 44: ADDL $0x4, t34
+ 45: STL t32, (t34)
+ 46: INCEIPL $4
+
+ 0x25479208: 90E50198 stw r7,408(r5)
+ 47: GETL R7, t36
+ 48: GETL R5, t38
+ 49: ADDL $0x198, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0x2547920C: 9105019C stw r8,412(r5)
+ 52: GETL R8, t40
+ 53: GETL R5, t42
+ 54: ADDL $0x19C, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0x25479210: 40BA000C bc 5,26,0x2547921C
+ 57: Jc26o $0x2547921C
+
+
+. 0 254791E0 52
+. 7F EA 29 2E 2F 1C 00 00 7D 4A 2A 14 81 65 01 98 83 2A 00 04 81 85 01 9C 3B 19 00 01 31 0C 00 01 7C EB 01 94 93 0A 00 04 90 E5 01 98 91 05 01 9C 40 BA 00 0C
+
+==== BB 201 (0x25479214) approx BBs exec'd 0 ====
+
+ 0x25479214: 48000164 b 0x25479378
+ 0: JMPo $0x25479378 ($4)
+
+
+. 0 25479214 4
+. 48 00 01 64
+
+==== BB 202 (0x25479378) approx BBs exec'd 0 ====
+
+ 0x25479378: 7FFCFB78 or r28,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0x2547937C: 4BFFFEAC b 0x25479228
+ 3: JMPo $0x25479228 ($4)
+
+
+. 0 25479378 8
+. 7F FC FB 78 4B FF FE AC
+
+==== BB 203 (0x25479228) approx BBs exec'd 0 ====
+
+ 0x25479228: 2F840000 cmpi cr7,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547922C: 393C0158 addi r9,r28,344
+ 4: GETL R28, t4
+ 5: ADDL $0x158, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x25479230: 419E0010 bc 12,30,0x25479240
+ 8: Js30o $0x25479240
+
+
+. 0 25479228 12
+. 2F 84 00 00 39 3C 01 58 41 9E 00 10
+
+==== BB 204 (0x25479240) approx BBs exec'd 0 ====
+
+ 0x25479240: 56CCEFFE rlwinm r12,r22,29,31,31
+ 0: GETL R22, t0
+ 1: ROLL $0x1D, t0
+ 2: ANDL $0x1, t0
+ 3: PUTL t0, R12
+ 4: INCEIPL $4
+
+ 0x25479244: 7D8B2039 and. r11,r12,r4
+ 5: GETL R12, t2
+ 6: GETL R4, t4
+ 7: ANDL t2, t4
+ 8: PUTL t4, R11
+ 9: CMP0L t4, t6 (-rSo)
+ 10: ICRFL t6, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25479248: 41820010 bc 12,2,0x25479258
+ 12: Js02o $0x25479258
+
+
+. 0 25479240 12
+. 56 CC EF FE 7D 8B 20 39 41 82 00 10
+
+==== BB 205 (0x25479258) approx BBs exec'd 0 ====
+
+ 0x25479258: 549A103A rlwinm r26,r4,2,0,29
+ 0: GETL R4, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x2547925C: 7D3A312E stwx r9,r26,r6
+ 4: GETL R6, t2
+ 5: GETL R26, t4
+ 6: ADDL t4, t2
+ 7: GETL R9, t6
+ 8: STL t6, (t2)
+ 9: INCEIPL $4
+
+ 0x25479260: 3B7F0158 addi r27,r31,344
+ 10: GETL R31, t8
+ 11: ADDL $0x158, t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0x25479264: 937F01C4 stw r27,452(r31)
+ 14: GETL R27, t10
+ 15: GETL R31, t12
+ 16: ADDL $0x1C4, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x25479268: 8BB70000 lbz r29,0(r23)
+ 19: GETL R23, t14
+ 20: LDB (t14), t16
+ 21: PUTL t16, R29
+ 22: INCEIPL $4
+
+ 0x2547926C: 2F1D0000 cmpi cr6,r29,0
+ 23: GETL R29, t18
+ 24: CMP0L t18, t20 (-rSo)
+ 25: ICRFL t20, $0x6, CR
+ 26: INCEIPL $4
+
+ 0x25479270: 419A006C bc 12,26,0x254792DC
+ 27: Js26o $0x254792DC
+
+
+. 0 25479258 28
+. 54 9A 10 3A 7D 3A 31 2E 3B 7F 01 58 93 7F 01 C4 8B B7 00 00 2F 1D 00 00 41 9A 00 6C
+
+==== BB 206 (0x254792DC) approx BBs exec'd 0 ====
+
+ 0x254792DC: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254792E0: 83810034 lwz r28,52(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x34, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x254792E4: 82C10008 lwz r22,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R22
+ 12: INCEIPL $4
+
+ 0x254792E8: 7F8803A6 mtlr r28
+ 13: GETL R28, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x254792EC: 82E1000C lwz r23,12(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0xC, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R23
+ 20: INCEIPL $4
+
+ 0x254792F0: 83010010 lwz r24,16(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x10, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R24
+ 25: INCEIPL $4
+
+ 0x254792F4: 83210014 lwz r25,20(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R25
+ 30: INCEIPL $4
+
+ 0x254792F8: 83410018 lwz r26,24(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x18, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R26
+ 35: INCEIPL $4
+
+ 0x254792FC: 8361001C lwz r27,28(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R27
+ 40: INCEIPL $4
+
+ 0x25479300: 83810020 lwz r28,32(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x20, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R28
+ 45: INCEIPL $4
+
+ 0x25479304: 83A10024 lwz r29,36(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x24, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R29
+ 50: INCEIPL $4
+
+ 0x25479308: 83C10028 lwz r30,40(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x28, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R30
+ 55: INCEIPL $4
+
+ 0x2547930C: 83E1002C lwz r31,44(r1)
+ 56: GETL R1, t44
+ 57: ADDL $0x2C, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R31
+ 60: INCEIPL $4
+
+ 0x25479310: 38210030 addi r1,r1,48
+ 61: GETL R1, t48
+ 62: ADDL $0x30, t48
+ 63: PUTL t48, R1
+ 64: INCEIPL $4
+
+ 0x25479314: 4E800020 blr
+ 65: GETL LR, t50
+ 66: JMPo-r t50 ($4)
+
+
+. 0 254792DC 60
+. 7F E3 FB 78 83 81 00 34 82 C1 00 08 7F 88 03 A6 82 E1 00 0C 83 01 00 10 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+==== BB 207 (0x254723A0) approx BBs exec'd 0 ====
+
+ 0x254723A0: 828E0000 lwz r20,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R20
+ 3: INCEIPL $4
+
+ 0x254723A4: 2D940000 cmpi cr3,r20,0
+ 4: GETL R20, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x3, CR
+ 7: INCEIPL $4
+
+ 0x254723A8: 418E0C90 bc 12,14,0x25473038
+ 8: Js14o $0x25473038
+
+
+. 0 254723A0 12
+. 82 8E 00 00 2D 94 00 00 41 8E 0C 90
+
+==== BB 208 (0x254723AC) approx BBs exec'd 0 ====
+
+ 0x254723AC: 80D60000 lwz r6,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x254723B0: 9314014C stw r24,332(r20)
+ 4: GETL R24, t4
+ 5: GETL R20, t6
+ 6: ADDL $0x14C, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x254723B4: 90D40150 stw r6,336(r20)
+ 9: GETL R6, t8
+ 10: GETL R20, t10
+ 11: ADDL $0x150, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x254723B8: B2F40154 sth r23,340(r20)
+ 14: GETL R23, t12
+ 15: GETL R20, t14
+ 16: ADDL $0x154, t14
+ 17: STW t12, (t14)
+ 18: INCEIPL $4
+
+ 0x254723BC: 56EC2834 rlwinm r12,r23,5,0,26
+ 19: GETL R23, t16
+ 20: SHLL $0x5, t16
+ 21: PUTL t16, R12
+ 22: INCEIPL $4
+
+ 0x254723C0: 81140178 lwz r8,376(r20)
+ 23: GETL R20, t18
+ 24: ADDL $0x178, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R8
+ 27: INCEIPL $4
+
+ 0x254723C4: 7C8CC214 add r4,r12,r24
+ 28: GETL R12, t22
+ 29: GETL R24, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R4
+ 32: INCEIPL $4
+
+ 0x254723C8: 80F4017C lwz r7,380(r20)
+ 33: GETL R20, t26
+ 34: ADDL $0x17C, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R7
+ 37: INCEIPL $4
+
+ 0x254723CC: 7E04C040 cmpl cr4,r4,r24
+ 38: GETL R4, t30
+ 39: GETL R24, t32
+ 40: CMPUL t30, t32, t34 (-rSo)
+ 41: ICRFL t34, $0x4, CR
+ 42: INCEIPL $4
+
+ 0x254723D0: 39280001 addi r9,r8,1
+ 43: GETL R8, t36
+ 44: ADDL $0x1, t36
+ 45: PUTL t36, R9
+ 46: INCEIPL $4
+
+ 0x254723D4: 3B270001 addi r25,r7,1
+ 47: GETL R7, t38
+ 48: ADDL $0x1, t38
+ 49: PUTL t38, R25
+ 50: INCEIPL $4
+
+ 0x254723D8: 39000000 li r8,0
+ 51: MOVL $0x0, t40
+ 52: PUTL t40, R8
+ 53: INCEIPL $4
+
+ 0x254723DC: 38E00000 li r7,0
+ 54: MOVL $0x0, t42
+ 55: PUTL t42, R7
+ 56: INCEIPL $4
+
+ 0x254723E0: 3B80FFFF li r28,-1
+ 57: MOVL $0xFFFFFFFF, t44
+ 58: PUTL t44, R28
+ 59: INCEIPL $4
+
+ 0x254723E4: 7F0AC378 or r10,r24,r24
+ 60: GETL R24, t46
+ 61: PUTL t46, R10
+ 62: INCEIPL $4
+
+ 0x254723E8: 939401A0 stw r28,416(r20)
+ 63: GETL R28, t48
+ 64: GETL R20, t50
+ 65: ADDL $0x1A0, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x254723EC: 91340178 stw r9,376(r20)
+ 68: GETL R9, t52
+ 69: GETL R20, t54
+ 70: ADDL $0x178, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0x254723F0: 9334017C stw r25,380(r20)
+ 73: GETL R25, t56
+ 74: GETL R20, t58
+ 75: ADDL $0x17C, t58
+ 76: STL t56, (t58)
+ 77: INCEIPL $4
+
+ 0x254723F4: 911401A4 stw r8,420(r20)
+ 78: GETL R8, t60
+ 79: GETL R20, t62
+ 80: ADDL $0x1A4, t62
+ 81: STL t60, (t62)
+ 82: INCEIPL $4
+
+ 0x254723F8: 90F401A8 stw r7,424(r20)
+ 83: GETL R7, t64
+ 84: GETL R20, t66
+ 85: ADDL $0x1A8, t66
+ 86: STL t64, (t66)
+ 87: INCEIPL $4
+
+ 0x254723FC: 409100C8 bc 4,17,0x254724C4
+ 88: Jc17o $0x254724C4
+
+
+. 0 254723AC 84
+. 80 D6 00 00 93 14 01 4C 90 D4 01 50 B2 F4 01 54 56 EC 28 34 81 14 01 78 7C 8C C2 14 80 F4 01 7C 7E 04 C0 40 39 28 00 01 3B 27 00 01 39 00 00 00 38 E0 00 00 3B 80 FF FF 7F 0A C3 78 93 94 01 A0 91 34 01 78 93 34 01 7C 91 14 01 A4 90 F4 01 A8 40 91 00 C8
+
+==== BB 209 (0x25472400) approx BBs exec'd 0 ====
+
+ 0x25472400: 3F606474 lis r27,25716
+ 0: MOVL $0x64740000, t0
+ 1: PUTL t0, R27
+ 2: INCEIPL $4
+
+ 0x25472404: 83BE0044 lwz r29,68(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x44, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25472408: 80DE0048 lwz r6,72(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x48, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R6
+ 12: INCEIPL $4
+
+ 0x2547240C: 6363E552 ori r3,r27,0xE552
+ 13: MOVL $0x6474E552, t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0x25472410: 38A00001 li r5,1
+ 16: MOVL $0x1, t12
+ 17: PUTL t12, R5
+ 18: INCEIPL $4
+
+ 0x25472414: 48000028 b 0x2547243C
+ 19: JMPo $0x2547243C ($4)
+
+
+. 0 25472400 24
+. 3F 60 64 74 83 BE 00 44 80 DE 00 48 63 63 E5 52 38 A0 00 01 48 00 00 28
+
+==== BB 210 (0x2547243C) approx BBs exec'd 0 ====
+
+ 0x2547243C: 800A0000 lwz r0,0(r10)
+ 0: GETL R10, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25472440: 2F000006 cmpi cr6,r0,6
+ 4: GETL R0, t4
+ 5: MOVL $0x6, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25472444: 419A0798 bc 12,26,0x25472BDC
+ 9: Js26o $0x25472BDC
+
+
+. 0 2547243C 12
+. 80 0A 00 00 2F 00 00 06 41 9A 07 98
+
+==== BB 211 (0x25472BDC) approx BBs exec'd 0 ====
+
+ 0x25472BDC: 816A0008 lwz r11,8(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25472BE0: 7F4BC050 subf r26,r11,r24
+ 5: GETL R11, t4
+ 6: GETL R24, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0x25472BE4: 93540000 stw r26,0(r20)
+ 10: GETL R26, t8
+ 11: GETL R20, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25472BE8: 4BFFF848 b 0x25472430
+ 14: JMPo $0x25472430 ($4)
+
+
+. 0 25472BDC 16
+. 81 6A 00 08 7F 4B C0 50 93 54 00 00 4B FF F8 48
+
+==== BB 212 (0x25472430) approx BBs exec'd 0 ====
+
+ 0x25472430: 394A0020 addi r10,r10,32
+ 0: GETL R10, t0
+ 1: ADDL $0x20, t0
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0x25472434: 7F845040 cmpl cr7,r4,r10
+ 4: GETL R4, t2
+ 5: GETL R10, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25472438: 409D0084 bc 4,29,0x254724BC
+ 9: Jc29o $0x254724BC
+
+
+. 0 25472430 12
+. 39 4A 00 20 7F 84 50 40 40 9D 00 84
+
+==== BB 213 (0x25472448) approx BBs exec'd 0 ====
+
+ 0x25472448: 2B800006 cmpli cr7,r0,6
+ 0: GETL R0, t0
+ 1: MOVL $0x6, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x2547244C: 40BDFFCC bc 5,29,0x25472418
+ 5: Jc29o $0x25472418
+
+
+. 0 25472448 8
+. 2B 80 00 06 40 BD FF CC
+
+==== BB 214 (0x25472418) approx BBs exec'd 0 ====
+
+ 0x25472418: 2C000002 cmpi cr0,r0,2
+ 0: GETL R0, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547241C: 41820854 bc 12,2,0x25472C70
+ 5: Js02o $0x25472C70
+
+
+. 0 25472418 8
+. 2C 00 00 02 41 82 08 54
+
+==== BB 215 (0x25472420) approx BBs exec'd 0 ====
+
+ 0x25472420: 28800002 cmpli cr1,r0,2
+ 0: GETL R0, t0
+ 1: MOVL $0x2, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25472424: 418507E4 bc 12,5,0x25472C08
+ 5: Js05o $0x25472C08
+
+
+. 0 25472420 8
+. 28 80 00 02 41 85 07 E4
+
+==== BB 216 (0x25472C08) approx BBs exec'd 0 ====
+
+ 0x25472C08: 2F000003 cmpi cr6,r0,3
+ 0: GETL R0, t0
+ 1: MOVL $0x3, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25472C0C: 409AF824 bc 4,26,0x25472430
+ 5: Jc26o $0x25472430
+
+
+. 0 25472C08 8
+. 2F 00 00 03 40 9A F8 24
+
+==== BB 217 (0x25472C10) approx BBs exec'd 0 ====
+
+ 0x25472C10: 82AE01C0 lwz r21,448(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1C0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x25472C14: 7FA7EB78 or r7,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x25472C18: 81740000 lwz r11,0(r20)
+ 8: GETL R20, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x25472C1C: 2F150000 cmpi cr6,r21,0
+ 12: GETL R21, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x6, CR
+ 15: INCEIPL $4
+
+ 0x25472C20: 812A0008 lwz r9,8(r10)
+ 16: GETL R10, t14
+ 17: ADDL $0x8, t14
+ 18: LDL (t14), t16
+ 19: PUTL t16, R9
+ 20: INCEIPL $4
+
+ 0x25472C24: 93AE01D4 stw r29,468(r14)
+ 21: GETL R29, t18
+ 22: GETL R14, t20
+ 23: ADDL $0x1D4, t20
+ 24: STL t18, (t20)
+ 25: INCEIPL $4
+
+ 0x25472C28: 7C0B4A14 add r0,r11,r9
+ 26: GETL R11, t22
+ 27: GETL R9, t24
+ 28: ADDL t22, t24
+ 29: PUTL t24, R0
+ 30: INCEIPL $4
+
+ 0x25472C2C: 901D0000 stw r0,0(r29)
+ 31: GETL R0, t26
+ 32: GETL R29, t28
+ 33: STL t26, (t28)
+ 34: INCEIPL $4
+
+ 0x25472C30: 409A0444 bc 4,26,0x25473074
+ 35: Jc26o $0x25473074
+
+
+. 0 25472C10 36
+. 82 AE 01 C0 7F A7 EB 78 81 74 00 00 2F 15 00 00 81 2A 00 08 93 AE 01 D4 7C 0B 4A 14 90 1D 00 00 40 9A 04 44
+
+==== BB 218 (0x25473074) approx BBs exec'd 0 ====
+
+ 0x25473074: 3AA00001 li r21,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R21
+ 2: INCEIPL $4
+
+ 0x25473078: 4BFFF3B8 b 0x25472430
+ 3: JMPo $0x25472430 ($4)
+
+
+. 0 25473074 8
+. 3A A0 00 01 4B FF F3 B8
+
+==== BB 219 (0x25472428) approx BBs exec'd 0 ====
+
+ 0x25472428: 2E000001 cmpi cr4,r0,1
+ 0: GETL R0, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x2547242C: 41920B80 bc 12,18,0x25472FAC
+ 5: Js18o $0x25472FAC
+
+
+. 0 25472428 8
+. 2E 00 00 01 41 92 0B 80
+
+==== BB 220 (0x25472FAC) approx BBs exec'd 0 ====
+
+ 0x25472FAC: 80EA001C lwz r7,28(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25472FB0: 810A0008 lwz r8,8(r10)
+ 5: GETL R10, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x25472FB4: 7D8700D0 neg r12,r7
+ 10: GETL R7, t8
+ 11: NEGL t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0x25472FB8: 80F40000 lwz r7,0(r20)
+ 14: GETL R20, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R7
+ 17: INCEIPL $4
+
+ 0x25472FBC: 7D1C6038 and r28,r8,r12
+ 18: GETL R8, t14
+ 19: GETL R12, t16
+ 20: ANDL t14, t16
+ 21: PUTL t16, R28
+ 22: INCEIPL $4
+
+ 0x25472FC0: 813401A0 lwz r9,416(r20)
+ 23: GETL R20, t18
+ 24: ADDL $0x1A0, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R9
+ 27: INCEIPL $4
+
+ 0x25472FC4: 7C07E214 add r0,r7,r28
+ 28: GETL R7, t22
+ 29: GETL R28, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R0
+ 32: INCEIPL $4
+
+ 0x25472FC8: 7F090040 cmpl cr6,r9,r0
+ 33: GETL R9, t26
+ 34: GETL R0, t28
+ 35: CMPUL t26, t28, t30 (-rSo)
+ 36: ICRFL t30, $0x6, CR
+ 37: INCEIPL $4
+
+ 0x25472FCC: 419900B0 bc 12,25,0x2547307C
+ 38: Js25o $0x2547307C
+
+
+. 0 25472FAC 36
+. 80 EA 00 1C 81 0A 00 08 7D 87 00 D0 80 F4 00 00 7D 1C 60 38 81 34 01 A0 7C 07 E2 14 7F 09 00 40 41 99 00 B0
+
+==== BB 221 (0x2547307C) approx BBs exec'd 0 ====
+
+ 0x2547307C: 901401A0 stw r0,416(r20)
+ 0: GETL R0, t0
+ 1: GETL R20, t2
+ 2: ADDL $0x1A0, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25473080: 810A0008 lwz r8,8(r10)
+ 5: GETL R10, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x25473084: 4BFFFF4C b 0x25472FD0
+ 10: JMPo $0x25472FD0 ($4)
+
+
+. 0 2547307C 12
+. 90 14 01 A0 81 0A 00 08 4B FF FF 4C
+
+==== BB 222 (0x25472FD0) approx BBs exec'd 0 ====
+
+ 0x25472FD0: 836A0014 lwz r27,20(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x25472FD4: 7EE74214 add r23,r7,r8
+ 5: GETL R7, t4
+ 6: GETL R8, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R23
+ 9: INCEIPL $4
+
+ 0x25472FD8: 811401A4 lwz r8,420(r20)
+ 10: GETL R20, t8
+ 11: ADDL $0x1A4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R8
+ 14: INCEIPL $4
+
+ 0x25472FDC: 7D77DA14 add r11,r23,r27
+ 15: GETL R23, t12
+ 16: GETL R27, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R11
+ 19: INCEIPL $4
+
+ 0x25472FE0: 7F885840 cmpl cr7,r8,r11
+ 20: GETL R8, t16
+ 21: GETL R11, t18
+ 22: CMPUL t16, t18, t20 (-rSo)
+ 23: ICRFL t20, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x25472FE4: 409C0008 bc 4,28,0x25472FEC
+ 25: Jc28o $0x25472FEC
+
+
+. 0 25472FD0 24
+. 83 6A 00 14 7E E7 42 14 81 14 01 A4 7D 77 DA 14 7F 88 58 40 40 9C 00 08
+
+==== BB 223 (0x25472FE8) approx BBs exec'd 0 ====
+
+ 0x25472FE8: 917401A4 stw r11,420(r20)
+ 0: GETL R11, t0
+ 1: GETL R20, t2
+ 2: ADDL $0x1A4, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25472FEC: 834A0018 lwz r26,24(r10)
+ 5: GETL R10, t4
+ 6: ADDL $0x18, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0x25472FF0: 73490001 andi. r9,r26,0x1
+ 10: GETL R26, t8
+ 11: ANDL $0x1, t8
+ 12: PUTL t8, R9
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x25472FF4: 41A2F43C bc 13,2,0x25472430
+ 16: Js02o $0x25472430
+
+
+. 0 25472FE8 16
+. 91 74 01 A4 83 4A 00 18 73 49 00 01 41 A2 F4 3C
+
+==== BB 224 (0x25472FF8) approx BBs exec'd 0 ====
+
+ 0x25472FF8: 801401A8 lwz r0,424(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x1A8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25472FFC: 7C805840 cmpl cr1,r0,r11
+ 5: GETL R0, t4
+ 6: GETL R11, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x25473000: 40A4F430 bc 5,4,0x25472430
+ 10: Jc04o $0x25472430
+
+
+. 0 25472FF8 12
+. 80 14 01 A8 7C 80 58 40 40 A4 F4 30
+
+==== BB 225 (0x25473004) approx BBs exec'd 0 ====
+
+ 0x25473004: 917401A8 stw r11,424(r20)
+ 0: GETL R11, t0
+ 1: GETL R20, t2
+ 2: ADDL $0x1A8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25473008: 4BFFF428 b 0x25472430
+ 5: JMPo $0x25472430 ($4)
+
+
+. 0 25473004 8
+. 91 74 01 A8 4B FF F4 28
+
+==== BB 226 (0x25472C70) approx BBs exec'd 0 ====
+
+ 0x25472C70: 82D40000 lwz r22,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R22
+ 3: INCEIPL $4
+
+ 0x25472C74: 832A0008 lwz r25,8(r10)
+ 4: GETL R10, t4
+ 5: ADDL $0x8, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R25
+ 8: INCEIPL $4
+
+ 0x25472C78: 7C16CA14 add r0,r22,r25
+ 9: GETL R22, t8
+ 10: GETL R25, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R0
+ 13: INCEIPL $4
+
+ 0x25472C7C: 90140008 stw r0,8(r20)
+ 14: GETL R0, t12
+ 15: GETL R20, t14
+ 16: ADDL $0x8, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25472C80: 4BFFF7B0 b 0x25472430
+ 19: JMPo $0x25472430 ($4)
+
+
+. 0 25472C70 20
+. 82 D4 00 00 83 2A 00 08 7C 16 CA 14 90 14 00 08 4B FF F7 B0
+
+==== BB 227 (0x25472450) approx BBs exec'd 0 ====
+
+ 0x25472450: 3EE06474 lis r23,25716
+ 0: MOVL $0x64740000, t0
+ 1: PUTL t0, R23
+ 2: INCEIPL $4
+
+ 0x25472454: 62E9E551 ori r9,r23,0xE551
+ 3: MOVL $0x6474E551, t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x25472458: 7F804800 cmp cr7,r0,r9
+ 6: GETL R0, t4
+ 7: GETL R9, t6
+ 8: CMPL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x2547245C: 419E0828 bc 12,30,0x25472C84
+ 11: Js30o $0x25472C84
+
+
+. 0 25472450 16
+. 3E E0 64 74 62 E9 E5 51 7F 80 48 00 41 9E 08 28
+
+==== BB 228 (0x25472C84) approx BBs exec'd 0 ====
+
+ 0x25472C84: 80EA0018 lwz r7,24(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25472C88: 90EE0400 stw r7,1024(r14)
+ 5: GETL R7, t4
+ 6: GETL R14, t6
+ 7: ADDL $0x400, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25472C8C: 4BFFF7A4 b 0x25472430
+ 10: JMPo $0x25472430 ($4)
+
+
+. 0 25472C84 12
+. 80 EA 00 18 90 EE 04 00 4B FF F7 A4
+
+==== BB 229 (0x254724BC) approx BBs exec'd 0 ====
+
+ 0x254724BC: 811401A4 lwz r8,420(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x1A4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254724C0: 80F401A8 lwz r7,424(r20)
+ 5: GETL R20, t4
+ 6: ADDL $0x1A8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0x254724C4: 81340218 lwz r9,536(r20)
+ 10: GETL R20, t8
+ 11: ADDL $0x218, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x254724C8: 2C090000 cmpi cr0,r9,0
+ 15: GETL R9, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x254724CC: 41820010 bc 12,2,0x254724DC
+ 19: Js02o $0x254724DC
+
+
+. 0 254724BC 20
+. 81 14 01 A4 80 F4 01 A8 81 34 02 18 2C 09 00 00 41 82 00 10
+
+==== BB 230 (0x254724DC) approx BBs exec'd 0 ====
+
+ 0x254724DC: 2C880000 cmpi cr1,r8,0
+ 0: GETL R8, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x254724E0: 4086000C bc 4,6,0x254724EC
+ 4: Jc06o $0x254724EC
+
+
+. 0 254724DC 8
+. 2C 88 00 00 40 86 00 0C
+
+==== BB 231 (0x254724EC) approx BBs exec'd 0 ====
+
+ 0x254724EC: 2E070000 cmpi cr4,r7,0
+ 0: GETL R7, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x254724F0: 4092000C bc 4,18,0x254724FC
+ 4: Jc18o $0x254724FC
+
+
+. 0 254724EC 8
+. 2E 07 00 00 40 92 00 0C
+
+==== BB 232 (0x254724FC) approx BBs exec'd 0 ====
+
+ 0x254724FC: 80AE01D4 lwz r5,468(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1D4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25472500: 2F050000 cmpi cr6,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25472504: 409A001C bc 4,26,0x25472520
+ 9: Jc26o $0x25472520
+
+
+. 0 254724FC 12
+. 80 AE 01 D4 2F 05 00 00 40 9A 00 1C
+
+==== BB 233 (0x25472520) approx BBs exec'd 0 ====
+
+ 0x25472520: 2E130000 cmpi cr4,r19,0
+ 0: GETL R19, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25472524: 409201A8 bc 4,18,0x254726CC
+ 4: Jc18o $0x254726CC
+
+
+. 0 25472520 8
+. 2E 13 00 00 40 92 01 A8
+
+==== BB 234 (0x25472528) approx BBs exec'd 0 ====
+
+ 0x25472528: 81540008 lwz r10,8(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547252C: 2C0A0000 cmpi cr0,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25472530: 41820194 bc 12,2,0x254726C4
+ 9: Js02o $0x254726C4
+
+
+. 0 25472528 12
+. 81 54 00 08 2C 0A 00 00 41 82 01 94
+
+==== BB 235 (0x25472534) approx BBs exec'd 0 ====
+
+ 0x25472534: 816A0000 lwz r11,0(r10)
+ 0: GETL R10, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25472538: 39140020 addi r8,r20,32
+ 4: GETL R20, t4
+ 5: ADDL $0x20, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0x2547253C: 2C8B0000 cmpi cr1,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x25472540: 41860064 bc 12,6,0x254725A4
+ 12: Js06o $0x254725A4
+
+
+. 0 25472534 16
+. 81 6A 00 00 39 14 00 20 2C 8B 00 00 41 86 00 64
+
+==== BB 236 (0x25472544) approx BBs exec'd 0 ====
+
+ 0x25472544: 3EC06FFF lis r22,28671
+ 0: MOVL $0x6FFF0000, t0
+ 1: PUTL t0, R22
+ 2: INCEIPL $4
+
+ 0x25472548: 3CC07000 lis r6,28672
+ 3: MOVL $0x70000000, t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0x2547254C: 3C006FFF lis r0,28671
+ 6: MOVL $0x6FFF0000, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25472550: 3F406FFF lis r26,28671
+ 9: MOVL $0x6FFF0000, t6
+ 10: PUTL t6, R26
+ 11: INCEIPL $4
+
+ 0x25472554: 3EE06FFF lis r23,28671
+ 12: MOVL $0x6FFF0000, t8
+ 13: PUTL t8, R23
+ 14: INCEIPL $4
+
+ 0x25472558: 3E606FFF lis r19,28671
+ 15: MOVL $0x6FFF0000, t10
+ 16: PUTL t10, R19
+ 17: INCEIPL $4
+
+ 0x2547255C: 62C7FFFF ori r7,r22,0xFFFF
+ 18: MOVL $0x6FFFFFFF, t12
+ 19: PUTL t12, R7
+ 20: INCEIPL $4
+
+ 0x25472560: 60C60021 ori r6,r6,0x21
+ 21: MOVL $0x70000021, t14
+ 22: PUTL t14, R6
+ 23: INCEIPL $4
+
+ 0x25472564: 6005FDFF ori r5,r0,0xFDFF
+ 24: MOVL $0x6FFFFDFF, t16
+ 25: PUTL t16, R5
+ 26: INCEIPL $4
+
+ 0x25472568: 6344FE34 ori r4,r26,0xFE34
+ 27: MOVL $0x6FFFFE34, t18
+ 28: PUTL t18, R4
+ 29: INCEIPL $4
+
+ 0x2547256C: 62E3FEFF ori r3,r23,0xFEFF
+ 30: MOVL $0x6FFFFEFF, t20
+ 31: PUTL t20, R3
+ 32: INCEIPL $4
+
+ 0x25472570: 627DFF40 ori r29,r19,0xFF40
+ 33: MOVL $0x6FFFFF40, t22
+ 34: PUTL t22, R29
+ 35: INCEIPL $4
+
+ 0x25472574: 2F0B0021 cmpi cr6,r11,33
+ 36: GETL R11, t24
+ 37: MOVL $0x21, t28
+ 38: CMPL t24, t28, t26 (-rSo)
+ 39: ICRFL t26, $0x6, CR
+ 40: INCEIPL $4
+
+ 0x25472578: 5560103A rlwinm r0,r11,2,0,29
+ 41: GETL R11, t30
+ 42: SHLL $0x2, t30
+ 43: PUTL t30, R0
+ 44: INCEIPL $4
+
+ 0x2547257C: 40990018 bc 4,25,0x25472594
+ 45: Jc25o $0x25472594
+
+
+. 0 25472544 60
+. 3E C0 6F FF 3C C0 70 00 3C 00 6F FF 3F 40 6F FF 3E E0 6F FF 3E 60 6F FF 62 C7 FF FF 60 C6 00 21 60 05 FD FF 63 44 FE 34 62 E3 FE FF 62 7D FF 40 2F 0B 00 21 55 60 10 3A 40 99 00 18
+
+==== BB 237 (0x25472594) approx BBs exec'd 0 ====
+
+ 0x25472594: 7D48012E stwx r10,r8,r0
+ 0: GETL R0, t0
+ 1: GETL R8, t2
+ 2: ADDL t2, t0
+ 3: GETL R10, t4
+ 4: STL t4, (t0)
+ 5: INCEIPL $4
+
+ 0x25472598: 856A0008 lwzu r11,8(r10)
+ 6: GETL R10, t6
+ 7: ADDL $0x8, t6
+ 8: PUTL t6, R10
+ 9: LDL (t6), t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x2547259C: 2F8B0000 cmpi cr7,r11,0
+ 12: GETL R11, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0x254725A0: 409EFFD4 bc 4,30,0x25472574
+ 16: Jc30o $0x25472574
+
+
+. 0 25472594 16
+. 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
+
+==== BB 238 (0x25472574) approx BBs exec'd 0 ====
+
+ 0x25472574: 2F0B0021 cmpi cr6,r11,33
+ 0: GETL R11, t0
+ 1: MOVL $0x21, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25472578: 5560103A rlwinm r0,r11,2,0,29
+ 5: GETL R11, t6
+ 6: SHLL $0x2, t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x2547257C: 40990018 bc 4,25,0x25472594
+ 9: Jc25o $0x25472594
+
+
+. 0 25472574 12
+. 2F 0B 00 21 55 60 10 3A 40 99 00 18
+
+==== BB 239 (0x25472580) approx BBs exec'd 0 ====
+
+ 0x25472580: 7F2B3850 subf r25,r11,r7
+ 0: GETL R11, t0
+ 1: GETL R7, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x25472584: 2B99000F cmpli cr7,r25,15
+ 5: GETL R25, t4
+ 6: MOVL $0xF, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x25472588: 419D0708 bc 12,29,0x25472C90
+ 10: Js29o $0x25472C90
+
+
+. 0 25472580 12
+. 7F 2B 38 50 2B 99 00 0F 41 9D 07 08
+
+==== BB 240 (0x2547258C) approx BBs exec'd 0 ====
+
+ 0x2547258C: 7C0B3050 subf r0,r11,r6
+ 0: GETL R11, t0
+ 1: GETL R6, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25472590: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25472594: 7D48012E stwx r10,r8,r0
+ 9: GETL R0, t6
+ 10: GETL R8, t8
+ 11: ADDL t8, t6
+ 12: GETL R10, t10
+ 13: STL t10, (t6)
+ 14: INCEIPL $4
+
+ 0x25472598: 856A0008 lwzu r11,8(r10)
+ 15: GETL R10, t12
+ 16: ADDL $0x8, t12
+ 17: PUTL t12, R10
+ 18: LDL (t12), t14
+ 19: PUTL t14, R11
+ 20: INCEIPL $4
+
+ 0x2547259C: 2F8B0000 cmpi cr7,r11,0
+ 21: GETL R11, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x254725A0: 409EFFD4 bc 4,30,0x25472574
+ 25: Jc30o $0x25472574
+
+
+. 0 2547258C 24
+. 7C 0B 30 50 54 00 10 3A 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
+
+==== BB 241 (0x254725A4) approx BBs exec'd 0 ====
+
+ 0x254725A4: 81740000 lwz r11,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x254725A8: 2C0B0000 cmpi cr0,r11,0
+ 4: GETL R11, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x254725AC: 418200AC bc 12,2,0x25472658
+ 8: Js02o $0x25472658
+
+
+. 0 254725A4 12
+. 81 74 00 00 2C 0B 00 00 41 82 00 AC
+
+==== BB 242 (0x25472658) approx BBs exec'd 0 ====
+
+ 0x25472658: 81280078 lwz r9,120(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x78, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547265C: 2C090000 cmpi cr0,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25472660: 41820030 bc 12,2,0x25472690
+ 9: Js02o $0x25472690
+
+
+. 0 25472658 12
+. 81 28 00 78 2C 09 00 00 41 82 00 30
+
+==== BB 243 (0x25472690) approx BBs exec'd 0 ====
+
+ 0x25472690: 81280098 lwz r9,152(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x98, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25472694: 2C890000 cmpi cr1,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25472698: 41860018 bc 12,6,0x254726B0
+ 9: Js06o $0x254726B0
+
+
+. 0 25472690 12
+. 81 28 00 98 2C 89 00 00 41 86 00 18
+
+==== BB 244 (0x254726B0) approx BBs exec'd 0 ====
+
+ 0x254726B0: 81680074 lwz r11,116(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254726B4: 2F0B0000 cmpi cr6,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x254726B8: 419A000C bc 12,26,0x254726C4
+ 9: Js26o $0x254726C4
+
+
+. 0 254726B0 12
+. 81 68 00 74 2F 0B 00 00 41 9A 00 0C
+
+==== BB 245 (0x254726C4) approx BBs exec'd 0 ====
+
+ 0x254726C4: 7E83A378 or r3,r20,r20
+ 0: GETL R20, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254726C8: 48005EA5 bl 0x2547856C
+ 3: MOVL $0x254726CC, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x2547856C ($4)
+
+
+. 0 254726C4 8
+. 7E 83 A3 78 48 00 5E A5
+
+==== BB 246 (0x254726CC) approx BBs exec'd 0 ====
+
+ 0x254726CC: 811F0030 lwz r8,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254726D0: 2F880002 cmpi cr7,r8,2
+ 5: GETL R8, t4
+ 6: MOVL $0x2, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x254726D4: 419E0A04 bc 12,30,0x254730D8
+ 10: Js30o $0x254730D8
+
+
+. 0 254726CC 12
+. 81 1F 00 30 2F 88 00 02 41 9E 0A 04
+
+==== BB 247 (0x254726D8) approx BBs exec'd 0 ====
+
+ 0x254726D8: 4192088C bc 12,18,0x25472F64
+ 0: Js18o $0x25472F64
+
+
+. 0 254726D8 4
+. 41 92 08 8C
+
+==== BB 248 (0x25472F64) approx BBs exec'd 0 ====
+
+ 0x25472F64: 82BE004C lwz r21,76(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x25472F68: 80750000 lwz r3,0(r21)
+ 5: GETL R21, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0x25472F6C: 48002169 bl 0x254750D4
+ 9: MOVL $0x25472F70, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0x254750D4 ($4)
+
+
+. 0 25472F64 12
+. 82 BE 00 4C 80 75 00 00 48 00 21 69
+
+==== BB 249 _dl_init_paths(0x254750D4) approx BBs exec'd 0 ====
+
+ 0x254750D4: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x254750D8: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254750DC: 48021F25 bl 0x25497000
+ 9: MOVL $0x254750E0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 254750D4 12
+. 94 21 FF D0 7C 08 02 A6 48 02 1F 25
+
+==== BB 250 (0x254750E0) approx BBs exec'd 0 ====
+
+ 0x254750E0: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254750E4: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x254750E8: 93010010 stw r24,16(r1)
+ 8: GETL R24, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x254750EC: 90010034 stw r0,52(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x34, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254750F0: 93210014 stw r25,20(r1)
+ 18: GETL R25, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x254750F4: 7C791B78 or r25,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R25
+ 25: INCEIPL $4
+
+ 0x254750F8: 831E04F4 lwz r24,1268(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4F4, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R24
+ 30: INCEIPL $4
+
+ 0x254750FC: 80BE0154 lwz r5,340(r30)
+ 31: GETL R30, t24
+ 32: ADDL $0x154, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R5
+ 35: INCEIPL $4
+
+ 0x25475100: 80980010 lwz r4,16(r24)
+ 36: GETL R24, t28
+ 37: ADDL $0x10, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R4
+ 40: INCEIPL $4
+
+ 0x25475104: 80DE015C lwz r6,348(r30)
+ 41: GETL R30, t32
+ 42: ADDL $0x15C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R6
+ 45: INCEIPL $4
+
+ 0x25475108: 8078000C lwz r3,12(r24)
+ 46: GETL R24, t36
+ 47: ADDL $0xC, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R3
+ 50: INCEIPL $4
+
+ 0x2547510C: 9361001C stw r27,28(r1)
+ 51: GETL R27, t40
+ 52: GETL R1, t42
+ 53: ADDL $0x1C, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0x25475110: 93810020 stw r28,32(r1)
+ 56: GETL R28, t44
+ 57: GETL R1, t46
+ 58: ADDL $0x20, t46
+ 59: STL t44, (t46)
+ 60: INCEIPL $4
+
+ 0x25475114: 93E1002C stw r31,44(r1)
+ 61: GETL R31, t48
+ 62: GETL R1, t50
+ 63: ADDL $0x2C, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0x25475118: 7C3F0B78 or r31,r1,r1
+ 66: GETL R1, t52
+ 67: PUTL t52, R31
+ 68: INCEIPL $4
+
+ 0x2547511C: 92E1000C stw r23,12(r1)
+ 69: GETL R23, t54
+ 70: GETL R1, t56
+ 71: ADDL $0xC, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0x25475120: 93410018 stw r26,24(r1)
+ 74: GETL R26, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x18, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0x25475124: 93A10024 stw r29,36(r1)
+ 79: GETL R29, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x24, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x25475128: 4800A629 bl 0x2547F750
+ 84: MOVL $0x2547512C, t66
+ 85: PUTL t66, LR
+ 86: JMPo-c $0x2547F750 ($4)
+
+
+. 0 254750E0 76
+. 93 C1 00 28 7F C8 02 A6 93 01 00 10 90 01 00 34 93 21 00 14 7C 79 1B 78 83 1E 04 F4 80 BE 01 54 80 98 00 10 80 DE 01 5C 80 78 00 0C 93 61 00 1C 93 81 00 20 93 E1 00 2C 7C 3F 0B 78 92 E1 00 0C 93 41 00 18 93 A1 00 24 48 00 A6 29
+
+==== BB 251 _dl_important_hwcaps(0x2547F750) approx BBs exec'd 0 ====
+
+ 0x2547F750: 9421FFB0 stwu r1,-80(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFB0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547F754: 7CE802A6 mflr r7
+ 6: GETL LR, t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x2547F758: 480178A9 bl 0x25497000
+ 9: MOVL $0x2547F75C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547F750 12
+. 94 21 FF B0 7C E8 02 A6 48 01 78 A9
+
+==== BB 252 (0x2547F75C) approx BBs exec'd 0 ====
+
+ 0x2547F75C: 93C10048 stw r30,72(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x48, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547F760: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547F764: 93810040 stw r28,64(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x40, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547F768: 90E10054 stw r7,84(r1)
+ 13: GETL R7, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x54, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547F76C: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0x2547F770: 92010010 stw r16,16(r1)
+ 21: GETL R16, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x10, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547F774: 7CD03378 or r16,r6,r6
+ 26: GETL R6, t20
+ 27: PUTL t20, R16
+ 28: INCEIPL $4
+
+ 0x2547F778: 813E04F4 lwz r9,1268(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x4F4, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R9
+ 33: INCEIPL $4
+
+ 0x2547F77C: 9261001C stw r19,28(r1)
+ 34: GETL R19, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x1C, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x2547F780: 7C932378 or r19,r4,r4
+ 39: GETL R4, t30
+ 40: PUTL t30, R19
+ 41: INCEIPL $4
+
+ 0x2547F784: 81690040 lwz r11,64(r9)
+ 42: GETL R9, t32
+ 43: ADDL $0x40, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R11
+ 46: INCEIPL $4
+
+ 0x2547F788: 8009003C lwz r0,60(r9)
+ 47: GETL R9, t36
+ 48: ADDL $0x3C, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R0
+ 51: INCEIPL $4
+
+ 0x2547F78C: 92810020 stw r20,32(r1)
+ 52: GETL R20, t40
+ 53: GETL R1, t42
+ 54: ADDL $0x20, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0x2547F790: 7CB42B78 or r20,r5,r5
+ 57: GETL R5, t44
+ 58: PUTL t44, R20
+ 59: INCEIPL $4
+
+ 0x2547F794: 7C1C5838 and r28,r0,r11
+ 60: GETL R0, t46
+ 61: GETL R11, t48
+ 62: ANDL t46, t48
+ 63: PUTL t48, R28
+ 64: INCEIPL $4
+
+ 0x2547F798: 92C10028 stw r22,40(r1)
+ 65: GETL R22, t50
+ 66: GETL R1, t52
+ 67: ADDL $0x28, t52
+ 68: STL t50, (t52)
+ 69: INCEIPL $4
+
+ 0x2547F79C: 2F9C0000 cmpi cr7,r28,0
+ 70: GETL R28, t54
+ 71: CMP0L t54, t56 (-rSo)
+ 72: ICRFL t56, $0x7, CR
+ 73: INCEIPL $4
+
+ 0x2547F7A0: 93E1004C stw r31,76(r1)
+ 74: GETL R31, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x4C, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0x2547F7A4: 92210014 stw r17,20(r1)
+ 79: GETL R17, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x14, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x2547F7A8: 7C3F0B78 or r31,r1,r1
+ 84: GETL R1, t66
+ 85: PUTL t66, R31
+ 86: INCEIPL $4
+
+ 0x2547F7AC: 92410018 stw r18,24(r1)
+ 87: GETL R18, t68
+ 88: GETL R1, t70
+ 89: ADDL $0x18, t70
+ 90: STL t68, (t70)
+ 91: INCEIPL $4
+
+ 0x2547F7B0: 7C761B78 or r22,r3,r3
+ 92: GETL R3, t72
+ 93: PUTL t72, R22
+ 94: INCEIPL $4
+
+ 0x2547F7B4: 92A10024 stw r21,36(r1)
+ 95: GETL R21, t74
+ 96: GETL R1, t76
+ 97: ADDL $0x24, t76
+ 98: STL t74, (t76)
+ 99: INCEIPL $4
+
+ 0x2547F7B8: 3003FFFF addic r0,r3,-1
+ 100: GETL R3, t78
+ 101: ADCL $0xFFFFFFFF, t78 (-wCa)
+ 102: PUTL t78, R0
+ 103: INCEIPL $4
+
+ 0x2547F7BC: 7D401910 subfe r10,r0,r3
+ 104: GETL R0, t80
+ 105: GETL R3, t82
+ 106: SBBL t80, t82 (-rCa-wCa)
+ 107: PUTL t82, R10
+ 108: INCEIPL $4
+
+ 0x2547F7C0: 92E1002C stw r23,44(r1)
+ 109: GETL R23, t84
+ 110: GETL R1, t86
+ 111: ADDL $0x2C, t86
+ 112: STL t84, (t86)
+ 113: INCEIPL $4
+
+ 0x2547F7C4: 39600000 li r11,0
+ 114: MOVL $0x0, t88
+ 115: PUTL t88, R11
+ 116: INCEIPL $4
+
+ 0x2547F7C8: 93010030 stw r24,48(r1)
+ 117: GETL R24, t90
+ 118: GETL R1, t92
+ 119: ADDL $0x30, t92
+ 120: STL t90, (t92)
+ 121: INCEIPL $4
+
+ 0x2547F7CC: 93210034 stw r25,52(r1)
+ 122: GETL R25, t94
+ 123: GETL R1, t96
+ 124: ADDL $0x34, t96
+ 125: STL t94, (t96)
+ 126: INCEIPL $4
+
+ 0x2547F7D0: 93410038 stw r26,56(r1)
+ 127: GETL R26, t98
+ 128: GETL R1, t100
+ 129: ADDL $0x38, t100
+ 130: STL t98, (t100)
+ 131: INCEIPL $4
+
+ 0x2547F7D4: 9361003C stw r27,60(r1)
+ 132: GETL R27, t102
+ 133: GETL R1, t104
+ 134: ADDL $0x3C, t104
+ 135: STL t102, (t104)
+ 136: INCEIPL $4
+
+ 0x2547F7D8: 93A10044 stw r29,68(r1)
+ 137: GETL R29, t106
+ 138: GETL R1, t108
+ 139: ADDL $0x44, t108
+ 140: STL t106, (t108)
+ 141: INCEIPL $4
+
+ 0x2547F7DC: 9181000C stw r12,12(r1)
+ 142: GETL R12, t110
+ 143: GETL R1, t112
+ 144: ADDL $0xC, t112
+ 145: STL t110, (t112)
+ 146: INCEIPL $4
+
+ 0x2547F7E0: 419E0028 bc 12,30,0x2547F808
+ 147: Js30o $0x2547F808
+
+
+. 0 2547F75C 136
+. 93 C1 00 48 7F C8 02 A6 93 81 00 40 90 E1 00 54 7D 80 00 26 92 01 00 10 7C D0 33 78 81 3E 04 F4 92 61 00 1C 7C 93 23 78 81 69 00 40 80 09 00 3C 92 81 00 20 7C B4 2B 78 7C 1C 58 38 92 C1 00 28 2F 9C 00 00 93 E1 00 4C 92 21 00 14 7C 3F 0B 78 92 41 00 18 7C 76 1B 78 92 A1 00 24 30 03 FF FF 7D 40 19 10 92 E1 00 2C 39 60 00 00 93 01 00 30 93 21 00 34 93 41 00 38 93 61 00 3C 93 A1 00 44 91 81 00 0C 41 9E 00 28
+
+==== BB 253 (0x2547F808) approx BBs exec'd 0 ====
+
+ 0x2547F808: 3B0A0001 addi r24,r10,1
+ 0: GETL R10, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R24
+ 3: INCEIPL $4
+
+ 0x2547F80C: 82210000 lwz r17,0(r1)
+ 4: GETL R1, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R17
+ 7: INCEIPL $4
+
+ 0x2547F810: 57121838 rlwinm r18,r24,3,0,28
+ 8: GETL R24, t6
+ 9: SHLL $0x3, t6
+ 10: PUTL t6, R18
+ 11: INCEIPL $4
+
+ 0x2547F814: 3B200000 li r25,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R25
+ 14: INCEIPL $4
+
+ 0x2547F818: 3AF2001E addi r23,r18,30
+ 15: GETL R18, t10
+ 16: ADDL $0x1E, t10
+ 17: PUTL t10, R23
+ 18: INCEIPL $4
+
+ 0x2547F81C: 3B400000 li r26,0
+ 19: MOVL $0x0, t12
+ 20: PUTL t12, R26
+ 21: INCEIPL $4
+
+ 0x2547F820: 56F50036 rlwinm r21,r23,0,0,27
+ 22: GETL R23, t14
+ 23: ANDL $0xFFFFFFF0, t14
+ 24: PUTL t14, R21
+ 25: INCEIPL $4
+
+ 0x2547F824: 7D5500D0 neg r10,r21
+ 26: GETL R21, t16
+ 27: NEGL t16
+ 28: PUTL t16, R10
+ 29: INCEIPL $4
+
+ 0x2547F828: 7E21516E stwux r17,r1,r10
+ 30: GETL R10, t18
+ 31: GETL R1, t20
+ 32: ADDL t20, t18
+ 33: PUTL t18, R1
+ 34: GETL R17, t22
+ 35: STL t22, (t18)
+ 36: INCEIPL $4
+
+ 0x2547F82C: 39010017 addi r8,r1,23
+ 37: GETL R1, t24
+ 38: ADDL $0x17, t24
+ 39: PUTL t24, R8
+ 40: INCEIPL $4
+
+ 0x2547F830: 551B0036 rlwinm r27,r8,0,0,27
+ 41: GETL R8, t26
+ 42: ANDL $0xFFFFFFF0, t26
+ 43: PUTL t26, R27
+ 44: INCEIPL $4
+
+ 0x2547F834: 419E0048 bc 12,30,0x2547F87C
+ 45: Js30o $0x2547F87C
+
+
+. 0 2547F808 48
+. 3B 0A 00 01 82 21 00 00 57 12 18 38 3B 20 00 00 3A F2 00 1E 3B 40 00 00 56 F5 00 36 7D 55 00 D0 7E 21 51 6E 39 01 00 17 55 1B 00 36 41 9E 00 48
+
+==== BB 254 (0x2547F87C) approx BBs exec'd 0 ====
+
+ 0x2547F87C: 2F960000 cmpi cr7,r22,0
+ 0: GETL R22, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547F880: 419E0018 bc 12,30,0x2547F898
+ 4: Js30o $0x2547F898
+
+
+. 0 2547F87C 8
+. 2F 96 00 00 41 9E 00 18
+
+==== BB 255 (0x2547F898) approx BBs exec'd 0 ====
+
+ 0x2547F898: 2E180001 cmpi cr4,r24,1
+ 0: GETL R24, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x2547F89C: 57291838 rlwinm r9,r25,3,0,28
+ 5: GETL R25, t6
+ 6: SHLL $0x3, t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0x2547F8A0: 833E0410 lwz r25,1040(r30)
+ 9: GETL R30, t8
+ 10: ADDL $0x410, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R25
+ 13: INCEIPL $4
+
+ 0x2547F8A4: 7E69DA14 add r19,r9,r27
+ 14: GETL R9, t12
+ 15: GETL R27, t14
+ 16: ADDL t12, t14
+ 17: PUTL t14, R19
+ 18: INCEIPL $4
+
+ 0x2547F8A8: 3AC00003 li r22,3
+ 19: MOVL $0x3, t16
+ 20: PUTL t16, R22
+ 21: INCEIPL $4
+
+ 0x2547F8AC: 7F29D92E stwx r25,r9,r27
+ 22: GETL R27, t18
+ 23: GETL R9, t20
+ 24: ADDL t20, t18
+ 25: GETL R25, t22
+ 26: STL t22, (t18)
+ 27: INCEIPL $4
+
+ 0x2547F8B0: 92D30004 stw r22,4(r19)
+ 28: GETL R22, t24
+ 29: GETL R19, t26
+ 30: ADDL $0x4, t26
+ 31: STL t24, (t26)
+ 32: INCEIPL $4
+
+ 0x2547F8B4: 41920324 bc 12,18,0x2547FBD8
+ 33: Js18o $0x2547FBD8
+
+
+. 0 2547F898 32
+. 2E 18 00 01 57 29 18 38 83 3E 04 10 7E 69 DA 14 3A C0 00 03 7F 29 D9 2E 92 D3 00 04 41 92 03 24
+
+==== BB 256 (0x2547FBD8) approx BBs exec'd 0 ====
+
+ 0x2547FBD8: 819B0004 lwz r12,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x2547FBDC: 390C0001 addi r8,r12,1
+ 5: GETL R12, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x2547FBE0: 4BFFFD30 b 0x2547F910
+ 9: JMPo $0x2547F910 ($4)
+
+
+. 0 2547FBD8 12
+. 81 9B 00 04 39 0C 00 01 4B FF FD 30
+
+==== BB 257 (0x2547F910) approx BBs exec'd 0 ====
+
+ 0x2547F910: 3BA00001 li r29,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0x2547F914: 7FAAC030 slw r10,r29,r24
+ 3: GETL R29, t4
+ 4: GETL R24, t2
+ 5: SHLL t2, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0x2547F918: 555A1838 rlwinm r26,r10,3,0,28
+ 8: GETL R10, t6
+ 9: SHLL $0x3, t6
+ 10: PUTL t6, R26
+ 11: INCEIPL $4
+
+ 0x2547F91C: 91540000 stw r10,0(r20)
+ 12: GETL R10, t8
+ 13: GETL R20, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x2547F920: 7C7A4214 add r3,r26,r8
+ 16: GETL R26, t12
+ 17: GETL R8, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R3
+ 20: INCEIPL $4
+
+ 0x2547F924: 48018101 bl 0x25497A24
+ 21: MOVL $0x2547F928, t16
+ 22: PUTL t16, LR
+ 23: JMPo-c $0x25497A24 ($4)
+
+
+. 0 2547F910 24
+. 3B A0 00 01 7F AA C0 30 55 5A 18 38 91 54 00 00 7C 7A 42 14 48 01 81 01
+
+==== BB 258 (0x2547FDC8) approx BBs exec'd 0 ====
+
+ 0x2547FDC8: 813F0000 lwz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547FDCC: 7C895214 add r4,r9,r10
+ 4: GETL R9, t4
+ 5: GETL R10, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x2547FDD0: 3804FFFF addi r0,r4,-1
+ 9: GETL R4, t8
+ 10: ADDL $0xFFFFFFFF, t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x2547FDD4: 7C0AE838 and r10,r0,r29
+ 13: GETL R0, t10
+ 14: GETL R29, t12
+ 15: ANDL t10, t12
+ 16: PUTL t12, R10
+ 17: INCEIPL $4
+
+ 0x2547FDD8: 7D8AE214 add r12,r10,r28
+ 18: GETL R10, t14
+ 19: GETL R28, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R12
+ 22: INCEIPL $4
+
+ 0x2547FDDC: 915F0000 stw r10,0(r31)
+ 23: GETL R10, t18
+ 24: GETL R31, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0x2547FDE0: 7C0C5840 cmpl cr0,r12,r11
+ 27: GETL R12, t22
+ 28: GETL R11, t24
+ 29: CMPUL t22, t24, t26 (-rSo)
+ 30: ICRFL t26, $0x0, CR
+ 31: INCEIPL $4
+
+ 0x2547FDE4: 4080003C bc 4,0,0x2547FE20
+ 32: Jc00o $0x2547FE20
+
+
+. 0 2547FDC8 32
+. 81 3F 00 00 7C 89 52 14 38 04 FF FF 7C 0A E8 38 7D 8A E2 14 91 5F 00 00 7C 0C 58 40 40 80 00 3C
+
+==== BB 259 (0x2547F928) approx BBs exec'd 0 ====
+
+ 0x2547F928: 7C761B79 or. r22,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R22
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547F92C: 418202E8 bc 12,2,0x2547FC14
+ 5: Js02o $0x2547FC14
+
+
+. 0 2547F928 8
+. 7C 76 1B 79 41 82 02 E8
+
+==== BB 260 (0x2547F930) approx BBs exec'd 0 ====
+
+ 0x2547F930: 419201FC bc 12,18,0x2547FB2C
+ 0: Js18o $0x2547FB2C
+
+
+. 0 2547F930 4
+. 41 92 01 FC
+
+==== BB 261 (0x2547FB2C) approx BBs exec'd 0 ====
+
+ 0x2547FB2C: 83340000 lwz r25,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R25
+ 3: INCEIPL $4
+
+ 0x2547FB30: 39000000 li r8,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R8
+ 6: INCEIPL $4
+
+ 0x2547FB34: 827B0004 lwz r19,4(r27)
+ 7: GETL R27, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R19
+ 11: INCEIPL $4
+
+ 0x2547FB38: 3B00002F li r24,47
+ 12: MOVL $0x2F, t10
+ 13: PUTL t10, R24
+ 14: INCEIPL $4
+
+ 0x2547FB3C: 57291838 rlwinm r9,r25,3,0,28
+ 15: GETL R25, t12
+ 16: SHLL $0x3, t12
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0x2547FB40: 9116000C stw r8,12(r22)
+ 19: GETL R8, t14
+ 20: GETL R22, t16
+ 21: ADDL $0xC, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x2547FB44: 7C69B214 add r3,r9,r22
+ 24: GETL R9, t18
+ 25: GETL R22, t20
+ 26: ADDL t18, t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0x2547FB48: 3B930001 addi r28,r19,1
+ 29: GETL R19, t22
+ 30: ADDL $0x1, t22
+ 31: PUTL t22, R28
+ 32: INCEIPL $4
+
+ 0x2547FB4C: 93960004 stw r28,4(r22)
+ 33: GETL R28, t24
+ 34: GETL R22, t26
+ 35: ADDL $0x4, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0x2547FB50: 3A400002 li r18,2
+ 38: MOVL $0x2, t28
+ 39: PUTL t28, R18
+ 40: INCEIPL $4
+
+ 0x2547FB54: 90760000 stw r3,0(r22)
+ 41: GETL R3, t30
+ 42: GETL R22, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x2547FB58: 90760008 stw r3,8(r22)
+ 45: GETL R3, t34
+ 46: GETL R22, t36
+ 47: ADDL $0x8, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0x2547FB5C: 80BB0004 lwz r5,4(r27)
+ 50: GETL R27, t38
+ 51: ADDL $0x4, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R5
+ 54: INCEIPL $4
+
+ 0x2547FB60: 809B0000 lwz r4,0(r27)
+ 55: GETL R27, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R4
+ 58: INCEIPL $4
+
+ 0x2547FB64: 48003EBD bl 0x25483A20
+ 59: MOVL $0x2547FB68, t46
+ 60: PUTL t46, LR
+ 61: JMPo-c $0x25483A20 ($4)
+
+
+. 0 2547FB2C 60
+. 83 34 00 00 39 00 00 00 82 7B 00 04 3B 00 00 2F 57 29 18 38 91 16 00 0C 7C 69 B2 14 3B 93 00 01 93 96 00 04 3A 40 00 02 90 76 00 00 90 76 00 08 80 BB 00 04 80 9B 00 00 48 00 3E BD
+
+==== BB 262 mempcpy(0x25483A20) approx BBs exec'd 0 ====
+
+ 0x25483A20: 2B85000F cmpli cr7,r5,15
+ 0: GETL R5, t0
+ 1: MOVL $0xF, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25483A24: 7C0802A6 mflr r0
+ 5: GETL LR, t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0x25483A28: 9421FFE0 stwu r1,-32(r1)
+ 8: GETL R1, t8
+ 9: GETL R1, t10
+ 10: ADDL $0xFFFFFFE0, t10
+ 11: PUTL t10, R1
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25483A2C: 93A10014 stw r29,20(r1)
+ 14: GETL R29, t12
+ 15: GETL R1, t14
+ 16: ADDL $0x14, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25483A30: 7C7D1B78 or r29,r3,r3
+ 19: GETL R3, t16
+ 20: PUTL t16, R29
+ 21: INCEIPL $4
+
+ 0x25483A34: 93E1001C stw r31,28(r1)
+ 22: GETL R31, t18
+ 23: GETL R1, t20
+ 24: ADDL $0x1C, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0x25483A38: 7C9F2378 or r31,r4,r4
+ 27: GETL R4, t22
+ 28: PUTL t22, R31
+ 29: INCEIPL $4
+
+ 0x25483A3C: 93810010 stw r28,16(r1)
+ 30: GETL R28, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x10, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x25483A40: 93C10018 stw r30,24(r1)
+ 35: GETL R30, t28
+ 36: GETL R1, t30
+ 37: ADDL $0x18, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x25483A44: 90010024 stw r0,36(r1)
+ 40: GETL R0, t32
+ 41: GETL R1, t34
+ 42: ADDL $0x24, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0x25483A48: 409D0058 bc 4,29,0x25483AA0
+ 45: Jc29o $0x25483AA0
+
+
+. 0 25483A20 44
+. 2B 85 00 0F 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 E1 00 1C 7C 9F 23 78 93 81 00 10 93 C1 00 18 90 01 00 24 40 9D 00 58
+
+==== BB 263 (0x25483AA0) approx BBs exec'd 0 ====
+
+ 0x25483AA0: 2C850000 cmpi cr1,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x25483AA4: 4186001C bc 12,6,0x25483AC0
+ 4: Js06o $0x25483AC0
+
+
+. 0 25483AA0 8
+. 2C 85 00 00 41 86 00 1C
+
+==== BB 264 (0x25483AA8) approx BBs exec'd 0 ====
+
+ 0x25483AA8: 7CA903A6 mtctr r5
+ 0: GETL R5, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x25483AAC: 88FF0000 lbz r7,0(r31)
+ 3: GETL R31, t2
+ 4: LDB (t2), t4
+ 5: PUTL t4, R7
+ 6: INCEIPL $4
+
+ 0x25483AB0: 3BFF0001 addi r31,r31,1
+ 7: GETL R31, t6
+ 8: ADDL $0x1, t6
+ 9: PUTL t6, R31
+ 10: INCEIPL $4
+
+ 0x25483AB4: 98FD0000 stb r7,0(r29)
+ 11: GETL R7, t8
+ 12: GETL R29, t10
+ 13: STB t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25483AB8: 3BBD0001 addi r29,r29,1
+ 15: GETL R29, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0x25483ABC: 4200FFF0 bc 16,0,0x25483AAC
+ 19: GETL CTR, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, CTR
+ 22: JIFZL t14, $0x25483AC0
+ 23: JMPo $0x25483AAC ($4)
+
+
+. 0 25483AA8 24
+. 7C A9 03 A6 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
+
+==== BB 265 (0x25483AAC) approx BBs exec'd 0 ====
+
+ 0x25483AAC: 88FF0000 lbz r7,0(r31)
+ 0: GETL R31, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25483AB0: 3BFF0001 addi r31,r31,1
+ 4: GETL R31, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0x25483AB4: 98FD0000 stb r7,0(r29)
+ 8: GETL R7, t6
+ 9: GETL R29, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25483AB8: 3BBD0001 addi r29,r29,1
+ 12: GETL R29, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0x25483ABC: 4200FFF0 bc 16,0,0x25483AAC
+ 16: GETL CTR, t12
+ 17: ADDL $0xFFFFFFFF, t12
+ 18: PUTL t12, CTR
+ 19: JIFZL t12, $0x25483AC0
+ 20: JMPo $0x25483AAC ($4)
+
+
+. 0 25483AAC 20
+. 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
+
+==== BB 266 (0x25483AC0) approx BBs exec'd 0 ====
+
+ 0x25483AC0: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25483AC4: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483AC8: 83810010 lwz r28,16(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0x25483ACC: 83A10014 lwz r29,20(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x14, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0x25483AD0: 7D0803A6 mtlr r8
+ 18: GETL R8, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x25483AD4: 83C10018 lwz r30,24(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x18, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R30
+ 25: INCEIPL $4
+
+ 0x25483AD8: 83E1001C lwz r31,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0x25483ADC: 38210020 addi r1,r1,32
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0x25483AE0: 4E800020 blr
+ 35: GETL LR, t26
+ 36: JMPo-r t26 ($4)
+
+
+. 0 25483AC0 36
+. 81 01 00 24 7F A3 EB 78 83 81 00 10 83 A1 00 14 7D 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 267 (0x2547FB68) approx BBs exec'd 0 ====
+
+ 0x2547FB68: 9B030000 stb r24,0(r3)
+ 0: GETL R24, t0
+ 1: GETL R3, t2
+ 2: STB t0, (t2)
+ 3: INCEIPL $4
+
+ 0x2547FB6C: 92540000 stw r18,0(r20)
+ 4: GETL R18, t4
+ 5: GETL R20, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0x2547FB70: 83760004 lwz r27,4(r22)
+ 8: GETL R22, t8
+ 9: ADDL $0x4, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R27
+ 12: INCEIPL $4
+
+ 0x2547FB74: 7EC3B378 or r3,r22,r22
+ 13: GETL R22, t12
+ 14: PUTL t12, R3
+ 15: INCEIPL $4
+
+ 0x2547FB78: 93700000 stw r27,0(r16)
+ 16: GETL R27, t14
+ 17: GETL R16, t16
+ 18: STL t14, (t16)
+ 19: INCEIPL $4
+
+ 0x2547FB7C: 81010000 lwz r8,0(r1)
+ 20: GETL R1, t18
+ 21: LDL (t18), t20
+ 22: PUTL t20, R8
+ 23: INCEIPL $4
+
+ 0x2547FB80: 82080004 lwz r16,4(r8)
+ 24: GETL R8, t22
+ 25: ADDL $0x4, t22
+ 26: LDL (t22), t24
+ 27: PUTL t24, R16
+ 28: INCEIPL $4
+
+ 0x2547FB84: 80E8FFBC lwz r7,-68(r8)
+ 29: GETL R8, t26
+ 30: ADDL $0xFFFFFFBC, t26
+ 31: LDL (t26), t28
+ 32: PUTL t28, R7
+ 33: INCEIPL $4
+
+ 0x2547FB88: 7E0803A6 mtlr r16
+ 34: GETL R16, t30
+ 35: PUTL t30, LR
+ 36: INCEIPL $4
+
+ 0x2547FB8C: 8228FFC4 lwz r17,-60(r8)
+ 37: GETL R8, t32
+ 38: ADDL $0xFFFFFFC4, t32
+ 39: LDL (t32), t34
+ 40: PUTL t34, R17
+ 41: INCEIPL $4
+
+ 0x2547FB90: 8208FFC0 lwz r16,-64(r8)
+ 42: GETL R8, t36
+ 43: ADDL $0xFFFFFFC0, t36
+ 44: LDL (t36), t38
+ 45: PUTL t38, R16
+ 46: INCEIPL $4
+
+ 0x2547FB94: 7CE08120 mtcrf 0x8,r7
+ 47: GETL R7, t40
+ 48: ICRFL t40, $0x4, CR
+ 49: INCEIPL $4
+
+ 0x2547FB98: 8248FFC8 lwz r18,-56(r8)
+ 50: GETL R8, t42
+ 51: ADDL $0xFFFFFFC8, t42
+ 52: LDL (t42), t44
+ 53: PUTL t44, R18
+ 54: INCEIPL $4
+
+ 0x2547FB9C: 8268FFCC lwz r19,-52(r8)
+ 55: GETL R8, t46
+ 56: ADDL $0xFFFFFFCC, t46
+ 57: LDL (t46), t48
+ 58: PUTL t48, R19
+ 59: INCEIPL $4
+
+ 0x2547FBA0: 8288FFD0 lwz r20,-48(r8)
+ 60: GETL R8, t50
+ 61: ADDL $0xFFFFFFD0, t50
+ 62: LDL (t50), t52
+ 63: PUTL t52, R20
+ 64: INCEIPL $4
+
+ 0x2547FBA4: 82A8FFD4 lwz r21,-44(r8)
+ 65: GETL R8, t54
+ 66: ADDL $0xFFFFFFD4, t54
+ 67: LDL (t54), t56
+ 68: PUTL t56, R21
+ 69: INCEIPL $4
+
+ 0x2547FBA8: 82C8FFD8 lwz r22,-40(r8)
+ 70: GETL R8, t58
+ 71: ADDL $0xFFFFFFD8, t58
+ 72: LDL (t58), t60
+ 73: PUTL t60, R22
+ 74: INCEIPL $4
+
+ 0x2547FBAC: 82E8FFDC lwz r23,-36(r8)
+ 75: GETL R8, t62
+ 76: ADDL $0xFFFFFFDC, t62
+ 77: LDL (t62), t64
+ 78: PUTL t64, R23
+ 79: INCEIPL $4
+
+ 0x2547FBB0: 8308FFE0 lwz r24,-32(r8)
+ 80: GETL R8, t66
+ 81: ADDL $0xFFFFFFE0, t66
+ 82: LDL (t66), t68
+ 83: PUTL t68, R24
+ 84: INCEIPL $4
+
+ 0x2547FBB4: 8328FFE4 lwz r25,-28(r8)
+ 85: GETL R8, t70
+ 86: ADDL $0xFFFFFFE4, t70
+ 87: LDL (t70), t72
+ 88: PUTL t72, R25
+ 89: INCEIPL $4
+
+ 0x2547FBB8: 8348FFE8 lwz r26,-24(r8)
+ 90: GETL R8, t74
+ 91: ADDL $0xFFFFFFE8, t74
+ 92: LDL (t74), t76
+ 93: PUTL t76, R26
+ 94: INCEIPL $4
+
+ 0x2547FBBC: 8368FFEC lwz r27,-20(r8)
+ 95: GETL R8, t78
+ 96: ADDL $0xFFFFFFEC, t78
+ 97: LDL (t78), t80
+ 98: PUTL t80, R27
+ 99: INCEIPL $4
+
+ 0x2547FBC0: 8388FFF0 lwz r28,-16(r8)
+ 100: GETL R8, t82
+ 101: ADDL $0xFFFFFFF0, t82
+ 102: LDL (t82), t84
+ 103: PUTL t84, R28
+ 104: INCEIPL $4
+
+ 0x2547FBC4: 83A8FFF4 lwz r29,-12(r8)
+ 105: GETL R8, t86
+ 106: ADDL $0xFFFFFFF4, t86
+ 107: LDL (t86), t88
+ 108: PUTL t88, R29
+ 109: INCEIPL $4
+
+ 0x2547FBC8: 83C8FFF8 lwz r30,-8(r8)
+ 110: GETL R8, t90
+ 111: ADDL $0xFFFFFFF8, t90
+ 112: LDL (t90), t92
+ 113: PUTL t92, R30
+ 114: INCEIPL $4
+
+ 0x2547FBCC: 83E8FFFC lwz r31,-4(r8)
+ 115: GETL R8, t94
+ 116: ADDL $0xFFFFFFFC, t94
+ 117: LDL (t94), t96
+ 118: PUTL t96, R31
+ 119: INCEIPL $4
+
+ 0x2547FBD0: 7D014378 or r1,r8,r8
+ 120: GETL R8, t98
+ 121: PUTL t98, R1
+ 122: INCEIPL $4
+
+ 0x2547FBD4: 4E800020 blr
+ 123: GETL LR, t100
+ 124: JMPo-r t100 ($4)
+
+
+. 0 2547FB68 112
+. 9B 03 00 00 92 54 00 00 83 76 00 04 7E C3 B3 78 93 70 00 00 81 01 00 00 82 08 00 04 80 E8 FF BC 7E 08 03 A6 82 28 FF C4 82 08 FF C0 7C E0 81 20 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
+
+==== BB 268 (0x2547512C) approx BBs exec'd 0 ====
+
+ 0x2547512C: 813E0160 lwz r9,352(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x160, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475130: 837E0164 lwz r27,356(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x164, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R27
+ 9: INCEIPL $4
+
+ 0x25475134: 90690000 stw r3,0(r9)
+ 10: GETL R3, t8
+ 11: GETL R9, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25475138: 3860000C li r3,12
+ 14: MOVL $0xC, t12
+ 15: PUTL t12, R3
+ 16: INCEIPL $4
+
+ 0x2547513C: 480228E9 bl 0x25497A24
+ 17: MOVL $0x25475140, t14
+ 18: PUTL t14, LR
+ 19: JMPo-c $0x25497A24 ($4)
+
+
+. 0 2547512C 20
+. 81 3E 01 60 83 7E 01 64 90 69 00 00 38 60 00 0C 48 02 28 E9
+
+==== BB 269 (0x25475140) approx BBs exec'd 0 ====
+
+ 0x25475140: 7C7C1B79 or. r28,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R28
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25475144: 907B0000 stw r3,0(r27)
+ 5: GETL R3, t4
+ 6: GETL R27, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x25475148: 41820188 bc 12,2,0x254752D0
+ 9: Js02o $0x254752D0
+
+
+. 0 25475140 12
+. 7C 7C 1B 79 90 7B 00 00 41 82 01 88
+
+==== BB 270 (0x2547514C) approx BBs exec'd 0 ====
+
+ 0x2547514C: 835E0154 lwz r26,340(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x154, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25475150: 3D40CCCC lis r10,-13108
+ 5: MOVL $0xCCCC0000, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0x25475154: 6146CCCD ori r6,r10,0xCCCD
+ 8: MOVL $0xCCCCCCCD, t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0x25475158: 811A0000 lwz r8,0(r26)
+ 11: GETL R26, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R8
+ 14: INCEIPL $4
+
+ 0x2547515C: 5507103A rlwinm r7,r8,2,0,29
+ 15: GETL R8, t12
+ 16: SHLL $0x2, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0x25475160: 38A70027 addi r5,r7,39
+ 19: GETL R7, t14
+ 20: ADDL $0x27, t14
+ 21: PUTL t14, R5
+ 22: INCEIPL $4
+
+ 0x25475164: 7C653016 mulhwu r3,r5,r6
+ 23: GETL R5, t16
+ 24: GETL R6, t18
+ 25: UMULHL t16, t18
+ 26: PUTL t18, R3
+ 27: INCEIPL $4
+
+ 0x25475168: 547DE13E rlwinm r29,r3,28,4,31
+ 28: GETL R3, t20
+ 29: SHRL $0x4, t20
+ 30: PUTL t20, R29
+ 31: INCEIPL $4
+
+ 0x2547516C: 1C7D0140 mulli r3,r29,320
+ 32: GETL R29, t22
+ 33: MULL $0x140, t22
+ 34: PUTL t22, R3
+ 35: INCEIPL $4
+
+ 0x25475170: 480228B5 bl 0x25497A24
+ 36: MOVL $0x25475174, t24
+ 37: PUTL t24, LR
+ 38: JMPo-c $0x25497A24 ($4)
+
+
+. 0 2547514C 40
+. 83 5E 01 54 3D 40 CC CC 61 46 CC CD 81 1A 00 00 55 07 10 3A 38 A7 00 27 7C 65 30 16 54 7D E1 3E 1C 7D 01 40 48 02 28 B5
+
+==== BB 271 (0x25475174) approx BBs exec'd 0 ====
+
+ 0x25475174: 809B0000 lwz r4,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25475178: 907C0000 stw r3,0(r28)
+ 4: GETL R3, t4
+ 5: GETL R28, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0x2547517C: 81240000 lwz r9,0(r4)
+ 8: GETL R4, t8
+ 9: LDL (t8), t10
+ 10: PUTL t10, R9
+ 11: INCEIPL $4
+
+ 0x25475180: 80DE0188 lwz r6,392(r30)
+ 12: GETL R30, t12
+ 13: ADDL $0x188, t12
+ 14: LDL (t12), t14
+ 15: PUTL t14, R6
+ 16: INCEIPL $4
+
+ 0x25475184: 2F890000 cmpi cr7,r9,0
+ 17: GETL R9, t16
+ 18: CMP0L t16, t18 (-rSo)
+ 19: ICRFL t18, $0x7, CR
+ 20: INCEIPL $4
+
+ 0x25475188: 419E014C bc 12,30,0x254752D4
+ 21: Js30o $0x254752D4
+
+
+. 0 25475174 24
+. 80 9B 00 00 90 7C 00 00 81 24 00 00 80 DE 01 88 2F 89 00 00 41 9E 01 4C
+
+==== BB 272 (0x2547518C) approx BBs exec'd 0 ====
+
+ 0x2547518C: 82FE04C8 lwz r23,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x25475190: 39600000 li r11,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x25475194: 1C7D0014 mulli r3,r29,20
+ 8: GETL R29, t6
+ 9: MULL $0x14, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x25475198: 80FA0000 lwz r7,0(r26)
+ 12: GETL R26, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R7
+ 15: INCEIPL $4
+
+ 0x2547519C: 811E014C lwz r8,332(r30)
+ 16: GETL R30, t12
+ 17: ADDL $0x14C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R8
+ 20: INCEIPL $4
+
+ 0x254751A0: 39400000 li r10,0
+ 21: MOVL $0x0, t16
+ 22: PUTL t16, R10
+ 23: INCEIPL $4
+
+ 0x254751A4: 809E0194 lwz r4,404(r30)
+ 24: GETL R30, t18
+ 25: ADDL $0x194, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R4
+ 28: INCEIPL $4
+
+ 0x254751A8: 38C00000 li r6,0
+ 29: MOVL $0x0, t22
+ 30: PUTL t22, R6
+ 31: INCEIPL $4
+
+ 0x254751AC: 80BE0148 lwz r5,328(r30)
+ 32: GETL R30, t24
+ 33: ADDL $0x148, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R5
+ 36: INCEIPL $4
+
+ 0x254751B0: 917B0004 stw r11,4(r27)
+ 37: GETL R11, t28
+ 38: GETL R27, t30
+ 39: ADDL $0x4, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0x254751B4: 7D2B4B78 or r11,r9,r9
+ 42: GETL R9, t32
+ 43: PUTL t32, R11
+ 44: INCEIPL $4
+
+ 0x254751B8: 913701B0 stw r9,432(r23)
+ 45: GETL R9, t34
+ 46: GETL R23, t36
+ 47: ADDL $0x1B0, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0x254751BC: 555B103A rlwinm r27,r10,2,0,29
+ 50: GETL R10, t38
+ 51: SHLL $0x2, t38
+ 52: PUTL t38, R27
+ 53: INCEIPL $4
+
+ 0x254751C0: 7C863840 cmpl cr1,r6,r7
+ 54: GETL R6, t40
+ 55: GETL R7, t42
+ 56: CMPUL t40, t42, t44 (-rSo)
+ 57: ICRFL t44, $0x1, CR
+ 58: INCEIPL $4
+
+ 0x254751C4: 7F5B282E lwzx r26,r27,r5
+ 59: GETL R5, t46
+ 60: GETL R27, t48
+ 61: ADDL t48, t46
+ 62: LDL (t46), t50
+ 63: PUTL t50, R26
+ 64: INCEIPL $4
+
+ 0x254751C8: 917C0000 stw r11,0(r28)
+ 65: GETL R11, t52
+ 66: GETL R28, t54
+ 67: STL t52, (t54)
+ 68: INCEIPL $4
+
+ 0x254751CC: 3B9C0004 addi r28,r28,4
+ 69: GETL R28, t56
+ 70: ADDL $0x4, t56
+ 71: PUTL t56, R28
+ 72: INCEIPL $4
+
+ 0x254751D0: 7D9A4214 add r12,r26,r8
+ 73: GETL R26, t58
+ 74: GETL R8, t60
+ 75: ADDL t58, t60
+ 76: PUTL t60, R12
+ 77: INCEIPL $4
+
+ 0x254751D4: 910B000C stw r8,12(r11)
+ 78: GETL R8, t62
+ 79: GETL R11, t64
+ 80: ADDL $0xC, t64
+ 81: STL t62, (t64)
+ 82: INCEIPL $4
+
+ 0x254751D8: 908B0004 stw r4,4(r11)
+ 83: GETL R4, t66
+ 84: GETL R11, t68
+ 85: ADDL $0x4, t68
+ 86: STL t66, (t68)
+ 87: INCEIPL $4
+
+ 0x254751DC: 390C0001 addi r8,r12,1
+ 88: GETL R12, t70
+ 89: ADDL $0x1, t70
+ 90: PUTL t70, R8
+ 91: INCEIPL $4
+
+ 0x254751E0: 90CB0008 stw r6,8(r11)
+ 92: GETL R6, t72
+ 93: GETL R11, t74
+ 94: ADDL $0x8, t74
+ 95: STL t72, (t74)
+ 96: INCEIPL $4
+
+ 0x254751E4: 934B0010 stw r26,16(r11)
+ 97: GETL R26, t76
+ 98: GETL R11, t78
+ 99: ADDL $0x10, t78
+ 100: STL t76, (t78)
+ 101: INCEIPL $4
+
+ 0x254751E8: 4084001C bc 4,4,0x25475204
+ 102: Jc04o $0x25475204
+
+
+. 0 2547518C 96
+. 82 FE 04 C8 39 60 00 00 1C 7D 00 14 80 FA 00 00 81 1E 01 4C 39 40 00 00 80 9E 01 94 38 C0 00 00 80 BE 01 48 91 7B 00 04 7D 2B 4B 78 91 37 01 B0 55 5B 10 3A 7C 86 38 40 7F 5B 28 2E 91 7C 00 00 3B 9C 00 04 7D 9A 42 14 91 0B 00 0C 90 8B 00 04 39 0C 00 01 90 CB 00 08 93 4B 00 10 40 84 00 1C
+
+==== BB 273 (0x254751EC) approx BBs exec'd 0 ====
+
+ 0x254751EC: 7CE903A6 mtctr r7
+ 0: GETL R7, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x254751F0: 38000000 li r0,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x254751F4: 392B0014 addi r9,r11,20
+ 6: GETL R11, t4
+ 7: ADDL $0x14, t4
+ 8: PUTL t4, R9
+ 9: INCEIPL $4
+
+ 0x254751F8: 90090000 stw r0,0(r9)
+ 10: GETL R0, t6
+ 11: GETL R9, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x254751FC: 39290004 addi r9,r9,4
+ 14: GETL R9, t10
+ 15: ADDL $0x4, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x25475200: 4200FFF8 bc 16,0,0x254751F8
+ 18: GETL CTR, t12
+ 19: ADDL $0xFFFFFFFF, t12
+ 20: PUTL t12, CTR
+ 21: JIFZL t12, $0x25475204
+ 22: JMPo $0x254751F8 ($4)
+
+
+. 0 254751EC 24
+. 7C E9 03 A6 38 00 00 00 39 2B 00 14 90 09 00 00 39 29 00 04 42 00 FF F8
+
+==== BB 274 (0x254751F8) approx BBs exec'd 0 ====
+
+ 0x254751F8: 90090000 stw r0,0(r9)
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x254751FC: 39290004 addi r9,r9,4
+ 4: GETL R9, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x25475200: 4200FFF8 bc 16,0,0x254751F8
+ 8: GETL CTR, t6
+ 9: ADDL $0xFFFFFFFF, t6
+ 10: PUTL t6, CTR
+ 11: JIFZL t6, $0x25475204
+ 12: JMPo $0x254751F8 ($4)
+
+
+. 0 254751F8 12
+. 90 09 00 00 39 29 00 04 42 00 FF F8
+
+==== BB 275 (0x25475204) approx BBs exec'd 0 ====
+
+ 0x25475204: 2F0A0001 cmpi cr6,r10,1
+ 0: GETL R10, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25475208: 394A0001 addi r10,r10,1
+ 5: GETL R10, t6
+ 6: ADDL $0x1, t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0x2547520C: 419A00BC bc 12,26,0x254752C8
+ 9: Js26o $0x254752C8
+
+
+. 0 25475204 12
+. 2F 0A 00 01 39 4A 00 01 41 9A 00 BC
+
+==== BB 276 (0x25475210) approx BBs exec'd 0 ====
+
+ 0x25475210: 7C035A14 add r0,r3,r11
+ 0: GETL R3, t0
+ 1: GETL R11, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475214: 280A0001 cmpli cr0,r10,1
+ 5: GETL R10, t4
+ 6: MOVL $0x1, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x25475218: 900B0000 stw r0,0(r11)
+ 10: GETL R0, t10
+ 11: GETL R11, t12
+ 12: STL t10, (t12)
+ 13: INCEIPL $4
+
+ 0x2547521C: 7D6B1A14 add r11,r11,r3
+ 14: GETL R11, t14
+ 15: GETL R3, t16
+ 16: ADDL t14, t16
+ 17: PUTL t16, R11
+ 18: INCEIPL $4
+
+ 0x25475220: 40A1FF9C bc 5,1,0x254751BC
+ 19: Jc01o $0x254751BC
+
+
+. 0 25475210 20
+. 7C 03 5A 14 28 0A 00 01 90 0B 00 00 7D 6B 1A 14 40 A1 FF 9C
+
+==== BB 277 (0x254751BC) approx BBs exec'd 0 ====
+
+ 0x254751BC: 555B103A rlwinm r27,r10,2,0,29
+ 0: GETL R10, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x254751C0: 7C863840 cmpl cr1,r6,r7
+ 4: GETL R6, t2
+ 5: GETL R7, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x254751C4: 7F5B282E lwzx r26,r27,r5
+ 9: GETL R5, t8
+ 10: GETL R27, t10
+ 11: ADDL t10, t8
+ 12: LDL (t8), t12
+ 13: PUTL t12, R26
+ 14: INCEIPL $4
+
+ 0x254751C8: 917C0000 stw r11,0(r28)
+ 15: GETL R11, t14
+ 16: GETL R28, t16
+ 17: STL t14, (t16)
+ 18: INCEIPL $4
+
+ 0x254751CC: 3B9C0004 addi r28,r28,4
+ 19: GETL R28, t18
+ 20: ADDL $0x4, t18
+ 21: PUTL t18, R28
+ 22: INCEIPL $4
+
+ 0x254751D0: 7D9A4214 add r12,r26,r8
+ 23: GETL R26, t20
+ 24: GETL R8, t22
+ 25: ADDL t20, t22
+ 26: PUTL t22, R12
+ 27: INCEIPL $4
+
+ 0x254751D4: 910B000C stw r8,12(r11)
+ 28: GETL R8, t24
+ 29: GETL R11, t26
+ 30: ADDL $0xC, t26
+ 31: STL t24, (t26)
+ 32: INCEIPL $4
+
+ 0x254751D8: 908B0004 stw r4,4(r11)
+ 33: GETL R4, t28
+ 34: GETL R11, t30
+ 35: ADDL $0x4, t30
+ 36: STL t28, (t30)
+ 37: INCEIPL $4
+
+ 0x254751DC: 390C0001 addi r8,r12,1
+ 38: GETL R12, t32
+ 39: ADDL $0x1, t32
+ 40: PUTL t32, R8
+ 41: INCEIPL $4
+
+ 0x254751E0: 90CB0008 stw r6,8(r11)
+ 42: GETL R6, t34
+ 43: GETL R11, t36
+ 44: ADDL $0x8, t36
+ 45: STL t34, (t36)
+ 46: INCEIPL $4
+
+ 0x254751E4: 934B0010 stw r26,16(r11)
+ 47: GETL R26, t38
+ 48: GETL R11, t40
+ 49: ADDL $0x10, t40
+ 50: STL t38, (t40)
+ 51: INCEIPL $4
+
+ 0x254751E8: 4084001C bc 4,4,0x25475204
+ 52: Jc04o $0x25475204
+
+
+. 0 254751BC 48
+. 55 5B 10 3A 7C 86 38 40 7F 5B 28 2E 91 7C 00 00 3B 9C 00 04 7D 9A 42 14 91 0B 00 0C 90 8B 00 04 39 0C 00 01 90 CB 00 08 93 4B 00 10 40 84 00 1C
+
+==== BB 278 (0x254752C8) approx BBs exec'd 0 ====
+
+ 0x254752C8: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254752CC: 4BFFFF48 b 0x25475214
+ 3: JMPo $0x25475214 ($4)
+
+
+. 0 254752C8 8
+. 38 00 00 00 4B FF FF 48
+
+==== BB 279 (0x25475214) approx BBs exec'd 0 ====
+
+ 0x25475214: 280A0001 cmpli cr0,r10,1
+ 0: GETL R10, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25475218: 900B0000 stw r0,0(r11)
+ 5: GETL R0, t6
+ 6: GETL R11, t8
+ 7: STL t6, (t8)
+ 8: INCEIPL $4
+
+ 0x2547521C: 7D6B1A14 add r11,r11,r3
+ 9: GETL R11, t10
+ 10: GETL R3, t12
+ 11: ADDL t10, t12
+ 12: PUTL t12, R11
+ 13: INCEIPL $4
+
+ 0x25475220: 40A1FF9C bc 5,1,0x254751BC
+ 14: Jc01o $0x254751BC
+
+
+. 0 25475214 16
+. 28 0A 00 01 90 0B 00 00 7D 6B 1A 14 40 A1 FF 9C
+
+==== BB 280 (0x25475224) approx BBs exec'd 0 ====
+
+ 0x25475224: 83B70000 lwz r29,0(r23)
+ 0: GETL R23, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0x25475228: 38000009 li r0,9
+ 4: MOVL $0x9, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0x2547522C: 809E0158 lwz r4,344(r30)
+ 7: GETL R30, t6
+ 8: ADDL $0x158, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R4
+ 11: INCEIPL $4
+
+ 0x25475230: 39200000 li r9,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x25475234: 2F9D0000 cmpi cr7,r29,0
+ 15: GETL R29, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x25475238: 913C0000 stw r9,0(r28)
+ 19: GETL R9, t16
+ 20: GETL R28, t18
+ 21: STL t16, (t18)
+ 22: INCEIPL $4
+
+ 0x2547523C: 90040000 stw r0,0(r4)
+ 23: GETL R0, t20
+ 24: GETL R4, t22
+ 25: STL t20, (t22)
+ 26: INCEIPL $4
+
+ 0x25475240: 419E0028 bc 12,30,0x25475268
+ 27: Js30o $0x25475268
+
+
+. 0 25475224 32
+. 83 B7 00 00 38 00 00 09 80 9E 01 58 39 20 00 00 2F 9D 00 00 91 3C 00 00 90 04 00 00 41 9E 00 28
+
+==== BB 281 (0x25475244) approx BBs exec'd 0 ====
+
+ 0x25475244: 839D0094 lwz r28,148(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x94, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x25475248: 2C9C0000 cmpi cr1,r28,0
+ 5: GETL R28, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547524C: 408601BC bc 4,6,0x25475408
+ 9: Jc06o $0x25475408
+
+
+. 0 25475244 12
+. 83 9D 00 94 2C 9C 00 00 40 86 01 BC
+
+==== BB 282 (0x25475250) approx BBs exec'd 0 ====
+
+ 0x25475250: 817D005C lwz r11,92(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x5C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25475254: 3800FFFF li r0,-1
+ 5: MOVL $0xFFFFFFFF, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x25475258: 901D01E0 stw r0,480(r29)
+ 8: GETL R0, t6
+ 9: GETL R29, t8
+ 10: ADDL $0x1E0, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547525C: 2F0B0000 cmpi cr6,r11,0
+ 13: GETL R11, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x6, CR
+ 16: INCEIPL $4
+
+ 0x25475260: 409A0084 bc 4,26,0x254752E4
+ 17: Jc26o $0x254752E4
+
+
+. 0 25475250 20
+. 81 7D 00 5C 38 00 FF FF 90 1D 01 E0 2F 0B 00 00 40 9A 00 84
+
+==== BB 283 (0x25475264) approx BBs exec'd 0 ====
+
+ 0x25475264: 901D018C stw r0,396(r29)
+ 0: GETL R0, t0
+ 1: GETL R29, t2
+ 2: ADDL $0x18C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25475268: 2C190000 cmpi cr0,r25,0
+ 5: GETL R25, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547526C: 41820010 bc 12,2,0x2547527C
+ 9: Js02o $0x2547527C
+
+
+. 0 25475264 12
+. 90 1D 01 8C 2C 19 00 00 41 82 00 10
+
+==== BB 284 (0x25475270) approx BBs exec'd 0 ====
+
+ 0x25475270: 8BB90000 lbz r29,0(r25)
+ 0: GETL R25, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0x25475274: 2F9D0000 cmpi cr7,r29,0
+ 4: GETL R29, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0x25475278: 409E0094 bc 4,30,0x2547530C
+ 8: Jc30o $0x2547530C
+
+
+. 0 25475270 12
+. 8B B9 00 00 2F 9D 00 00 40 9E 00 94
+
+==== BB 285 (0x2547530C) approx BBs exec'd 0 ====
+
+ 0x2547530C: 7F23CB78 or r3,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25475310: 7F3DCB78 or r29,r25,r25
+ 3: GETL R25, t2
+ 4: PUTL t2, R29
+ 5: INCEIPL $4
+
+ 0x25475314: 4800DCBD bl 0x25482FD0
+ 6: MOVL $0x25475318, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25482FD0 ($4)
+
+
+. 0 2547530C 12
+. 7F 23 CB 78 7F 3D CB 78 48 00 DC BD
+
+==== BB 286 (0x25483008) approx BBs exec'd 0 ====
+
+ 0x25483008: 3CC0FEFF lis r6,-257
+ 0: MOVL $0xFEFF0000, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x2548300C: 38C6FEFF addi r6,r6,-257
+ 3: MOVL $0xFEFEFEFF, t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0x25483010: 419D001C bc 12,29,0x2548302C
+ 6: Js29o $0x2548302C
+
+
+. 0 25483008 12
+. 3C C0 FE FF 38 C6 FE FF 41 9D 00 1C
+
+==== BB 287 (0x25483014) approx BBs exec'd 0 ====
+
+ 0x25483014: 85040004 lwzu r8,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R4
+ 3: LDL (t0), t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0x25483018: 7CE04038 and r0,r7,r8
+ 6: GETL R7, t4
+ 7: GETL R8, t6
+ 8: ANDL t4, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x2548301C: 7CEA4378 or r10,r7,r8
+ 11: GETL R7, t8
+ 12: GETL R8, t10
+ 13: ORL t10, t8
+ 14: PUTL t8, R10
+ 15: INCEIPL $4
+
+ 0x25483020: 7C003A14 add r0,r0,r7
+ 16: GETL R0, t12
+ 17: GETL R7, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0x25483024: 7D4800F9 nor. r8,r10,r0
+ 21: GETL R10, t16
+ 22: GETL R0, t18
+ 23: ORL t18, t16
+ 24: NOTL t16
+ 25: PUTL t16, R8
+ 26: CMP0L t16, t20 (-rSo)
+ 27: ICRFL t20, $0x0, CR
+ 28: INCEIPL $4
+
+ 0x25483028: 4082004C bc 4,2,0x25483074
+ 29: Jc02o $0x25483074
+
+
+. 0 25483014 24
+. 85 04 00 04 7C E0 40 38 7C EA 43 78 7C 00 3A 14 7D 48 00 F9 40 82 00 4C
+
+==== BB 288 (0x2548302C) approx BBs exec'd 0 ====
+
+ 0x2548302C: 81040004 lwz r8,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25483030: 85240008 lwzu r9,8(r4)
+ 5: GETL R4, t4
+ 6: ADDL $0x8, t4
+ 7: PUTL t4, R4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0x25483034: 7C064214 add r0,r6,r8
+ 11: GETL R6, t8
+ 12: GETL R8, t10
+ 13: ADDL t8, t10
+ 14: PUTL t10, R0
+ 15: INCEIPL $4
+
+ 0x25483038: 7CEA40F8 nor r10,r7,r8
+ 16: GETL R7, t12
+ 17: GETL R8, t14
+ 18: ORL t14, t12
+ 19: NOTL t12
+ 20: PUTL t12, R10
+ 21: INCEIPL $4
+
+ 0x2548303C: 7C005039 and. r0,r0,r10
+ 22: GETL R0, t16
+ 23: GETL R10, t18
+ 24: ANDL t16, t18
+ 25: PUTL t18, R0
+ 26: CMP0L t18, t20 (-rSo)
+ 27: ICRFL t20, $0x0, CR
+ 28: INCEIPL $4
+
+ 0x25483040: 7D664A14 add r11,r6,r9
+ 29: GETL R6, t22
+ 30: GETL R9, t24
+ 31: ADDL t22, t24
+ 32: PUTL t24, R11
+ 33: INCEIPL $4
+
+ 0x25483044: 7CEC48F8 nor r12,r7,r9
+ 34: GETL R7, t26
+ 35: GETL R9, t28
+ 36: ORL t28, t26
+ 37: NOTL t26
+ 38: PUTL t26, R12
+ 39: INCEIPL $4
+
+ 0x25483048: 4082001C bc 4,2,0x25483064
+ 40: Jc02o $0x25483064
+
+
+. 0 2548302C 32
+. 81 04 00 04 85 24 00 08 7C 06 42 14 7C EA 40 F8 7C 00 50 39 7D 66 4A 14 7C EC 48 F8 40 82 00 1C
+
+==== BB 289 (0x2548304C) approx BBs exec'd 0 ====
+
+ 0x2548304C: 7D606039 and. r0,r11,r12
+ 0: GETL R11, t0
+ 1: GETL R12, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0x25483050: 4182FFDC bc 12,2,0x2548302C
+ 7: Js02o $0x2548302C
+
+
+. 0 2548304C 8
+. 7D 60 60 39 41 82 FF DC
+
+==== BB 290 (0x25483064) approx BBs exec'd 0 ====
+
+ 0x25483064: 7CE04038 and r0,r7,r8
+ 0: GETL R7, t0
+ 1: GETL R8, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25483068: 3884FFFC addi r4,r4,-4
+ 5: GETL R4, t4
+ 6: ADDL $0xFFFFFFFC, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2548306C: 7C003A14 add r0,r0,r7
+ 9: GETL R0, t6
+ 10: GETL R7, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x25483070: 7D480078 andc r8,r10,r0
+ 14: GETL R10, t10
+ 15: GETL R0, t12
+ 16: NOTL t12
+ 17: ANDL t10, t12
+ 18: PUTL t12, R8
+ 19: INCEIPL $4
+
+ 0x25483074: 7D0B0034 cntlzw r11,r8
+ 20: GETL R8, t14
+ 21: CNTLZL t14
+ 22: PUTL t14, R11
+ 23: INCEIPL $4
+
+ 0x25483078: 7C032050 subf r0,r3,r4
+ 24: GETL R3, t16
+ 25: GETL R4, t18
+ 26: SUBL t16, t18
+ 27: PUTL t18, R0
+ 28: INCEIPL $4
+
+ 0x2548307C: 556BE8FE rlwinm r11,r11,29,3,31
+ 29: GETL R11, t20
+ 30: SHRL $0x3, t20
+ 31: PUTL t20, R11
+ 32: INCEIPL $4
+
+ 0x25483080: 7C605A14 add r3,r0,r11
+ 33: GETL R0, t22
+ 34: GETL R11, t24
+ 35: ADDL t22, t24
+ 36: PUTL t24, R3
+ 37: INCEIPL $4
+
+ 0x25483084: 4E800020 blr
+ 38: GETL LR, t26
+ 39: JMPo-r t26 ($4)
+
+
+. 0 25483064 36
+. 7C E0 40 38 38 84 FF FC 7C 00 3A 14 7D 48 00 78 7D 0B 00 34 7C 03 20 50 55 6B E8 FE 7C 60 5A 14 4E 80 00 20
+
+==== BB 291 (0x25475318) approx BBs exec'd 0 ====
+
+ 0x25475318: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547531C: 3B63001F addi r27,r3,31
+ 3: GETL R3, t2
+ 4: ADDL $0x1F, t2
+ 5: PUTL t2, R27
+ 6: INCEIPL $4
+
+ 0x25475320: 81810000 lwz r12,0(r1)
+ 7: GETL R1, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0x25475324: 577A0036 rlwinm r26,r27,0,0,27
+ 11: GETL R27, t8
+ 12: ANDL $0xFFFFFFF0, t8
+ 13: PUTL t8, R26
+ 14: INCEIPL $4
+
+ 0x25475328: 7C791B78 or r25,r3,r3
+ 15: GETL R3, t10
+ 16: PUTL t10, R25
+ 17: INCEIPL $4
+
+ 0x2547532C: 7D7A00D0 neg r11,r26
+ 18: GETL R26, t12
+ 19: NEGL t12
+ 20: PUTL t12, R11
+ 21: INCEIPL $4
+
+ 0x25475330: 38B90001 addi r5,r25,1
+ 22: GETL R25, t14
+ 23: ADDL $0x1, t14
+ 24: PUTL t14, R5
+ 25: INCEIPL $4
+
+ 0x25475334: 7D81596E stwux r12,r1,r11
+ 26: GETL R11, t16
+ 27: GETL R1, t18
+ 28: ADDL t18, t16
+ 29: PUTL t16, R1
+ 30: GETL R12, t20
+ 31: STL t20, (t16)
+ 32: INCEIPL $4
+
+ 0x25475338: 39410017 addi r10,r1,23
+ 33: GETL R1, t22
+ 34: ADDL $0x17, t22
+ 35: PUTL t22, R10
+ 36: INCEIPL $4
+
+ 0x2547533C: 55430036 rlwinm r3,r10,0,0,27
+ 37: GETL R10, t24
+ 38: ANDL $0xFFFFFFF0, t24
+ 39: PUTL t24, R3
+ 40: INCEIPL $4
+
+ 0x25475340: 4800E8A1 bl 0x25483BE0
+ 41: MOVL $0x25475344, t26
+ 42: PUTL t26, LR
+ 43: JMPo-c $0x25483BE0 ($4)
+
+
+. 0 25475318 44
+. 7F A4 EB 78 3B 63 00 1F 81 81 00 00 57 7A 00 36 7C 79 1B 78 7D 7A 00 D0 38 B9 00 01 7D 81 59 6E 39 41 00 17 55 43 00 36 48 00 E8 A1
+
+==== BB 292 (0x25483D00) approx BBs exec'd 0 ====
+
+ 0x25483D00: 81240000 lwz r9,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25483D04: 38A5FFFF addi r5,r5,-1
+ 4: GETL R5, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25483D08: 38840004 addi r4,r4,4
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0x25483D0C: 80040000 lwz r0,0(r4)
+ 12: GETL R4, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R0
+ 15: INCEIPL $4
+
+ 0x25483D10: 91230000 stw r9,0(r3)
+ 16: GETL R9, t12
+ 17: GETL R3, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25483D14: 81240004 lwz r9,4(r4)
+ 20: GETL R4, t16
+ 21: ADDL $0x4, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R9
+ 24: INCEIPL $4
+
+ 0x25483D18: 90030004 stw r0,4(r3)
+ 25: GETL R0, t20
+ 26: GETL R3, t22
+ 27: ADDL $0x4, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0x25483D1C: 80040008 lwz r0,8(r4)
+ 30: GETL R4, t24
+ 31: ADDL $0x8, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R0
+ 34: INCEIPL $4
+
+ 0x25483D20: 91230008 stw r9,8(r3)
+ 35: GETL R9, t28
+ 36: GETL R3, t30
+ 37: ADDL $0x8, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x25483D24: 8124000C lwz r9,12(r4)
+ 40: GETL R4, t32
+ 41: ADDL $0xC, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R9
+ 44: INCEIPL $4
+
+ 0x25483D28: 9003000C stw r0,12(r3)
+ 45: GETL R0, t36
+ 46: GETL R3, t38
+ 47: ADDL $0xC, t38
+ 48: STL t36, (t38)
+ 49: INCEIPL $4
+
+ 0x25483D2C: 80040010 lwz r0,16(r4)
+ 50: GETL R4, t40
+ 51: ADDL $0x10, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R0
+ 54: INCEIPL $4
+
+ 0x25483D30: 91230010 stw r9,16(r3)
+ 55: GETL R9, t44
+ 56: GETL R3, t46
+ 57: ADDL $0x10, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0x25483D34: 81240014 lwz r9,20(r4)
+ 60: GETL R4, t48
+ 61: ADDL $0x14, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R9
+ 64: INCEIPL $4
+
+ 0x25483D38: 90030014 stw r0,20(r3)
+ 65: GETL R0, t52
+ 66: GETL R3, t54
+ 67: ADDL $0x14, t54
+ 68: STL t52, (t54)
+ 69: INCEIPL $4
+
+ 0x25483D3C: 80040018 lwz r0,24(r4)
+ 70: GETL R4, t56
+ 71: ADDL $0x18, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R0
+ 74: INCEIPL $4
+
+ 0x25483D40: 91230018 stw r9,24(r3)
+ 75: GETL R9, t60
+ 76: GETL R3, t62
+ 77: ADDL $0x18, t62
+ 78: STL t60, (t62)
+ 79: INCEIPL $4
+
+ 0x25483D44: 34A5FFF8 addic. r5,r5,-8
+ 80: GETL R5, t64
+ 81: ADCL $0xFFFFFFF8, t64 (-wCa)
+ 82: PUTL t64, R5
+ 83: CMP0L t64, t66 (-rSo)
+ 84: ICRFL t66, $0x0, CR
+ 85: INCEIPL $4
+
+ 0x25483D48: 8124001C lwz r9,28(r4)
+ 86: GETL R4, t68
+ 87: ADDL $0x1C, t68
+ 88: LDL (t68), t70
+ 89: PUTL t70, R9
+ 90: INCEIPL $4
+
+ 0x25483D4C: 9003001C stw r0,28(r3)
+ 91: GETL R0, t72
+ 92: GETL R3, t74
+ 93: ADDL $0x1C, t74
+ 94: STL t72, (t74)
+ 95: INCEIPL $4
+
+ 0x25483D50: 38840020 addi r4,r4,32
+ 96: GETL R4, t76
+ 97: ADDL $0x20, t76
+ 98: PUTL t76, R4
+ 99: INCEIPL $4
+
+ 0x25483D54: 38630020 addi r3,r3,32
+ 100: GETL R3, t78
+ 101: ADDL $0x20, t78
+ 102: PUTL t78, R3
+ 103: INCEIPL $4
+
+ 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
+ 104: Jc02o $0x25483D0C
+
+
+. 0 25483D00 92
+. 81 24 00 00 38 A5 FF FF 38 84 00 04 80 04 00 00 91 23 00 00 81 24 00 04 90 03 00 04 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+
+==== BB 293 (0x25475344) approx BBs exec'd 0 ====
+
+ 0x25475344: 893D0000 lbz r9,0(r29)
+ 0: GETL R29, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25475348: 7C7C1B78 or r28,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R28
+ 6: INCEIPL $4
+
+ 0x2547534C: 38600001 li r3,1
+ 7: MOVL $0x1, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25475350: 48000018 b 0x25475368
+ 10: JMPo $0x25475368 ($4)
+
+
+. 0 25475344 16
+. 89 3D 00 00 7C 7C 1B 78 38 60 00 01 48 00 00 18
+
+==== BB 294 (0x25475368) approx BBs exec'd 0 ====
+
+ 0x25475368: 2C890000 cmpi cr1,r9,0
+ 0: GETL R9, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547536C: 4086FFE8 bc 4,6,0x25475354
+ 4: Jc06o $0x25475354
+
+
+. 0 25475368 8
+. 2C 89 00 00 40 86 FF E8
+
+==== BB 295 (0x25475354) approx BBs exec'd 0 ====
+
+ 0x25475354: 3809FFC6 addi r0,r9,-58
+ 0: GETL R9, t0
+ 1: ADDL $0xFFFFFFC6, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x25475358: 8D3D0001 lbzu r9,1(r29)
+ 4: GETL R29, t2
+ 5: ADDL $0x1, t2
+ 6: PUTL t2, R29
+ 7: LDB (t2), t4
+ 8: PUTL t4, R9
+ 9: INCEIPL $4
+
+ 0x2547535C: 20800001 subfic r4,r0,1
+ 10: GETL R0, t6
+ 11: MOVL $0x1, t8
+ 12: SBBL t6, t8 (-wCa)
+ 13: PUTL t8, R4
+ 14: INCEIPL $4
+
+ 0x25475360: 7C830194 addze r4,r3
+ 15: GETL R3, t10
+ 16: ADCL $0x0, t10 (-rCa-wCa)
+ 17: PUTL t10, R4
+ 18: INCEIPL $4
+
+ 0x25475364: 7C832378 or r3,r4,r4
+ 19: GETL R4, t12
+ 20: PUTL t12, R3
+ 21: INCEIPL $4
+
+ 0x25475368: 2C890000 cmpi cr1,r9,0
+ 22: GETL R9, t14
+ 23: CMP0L t14, t16 (-rSo)
+ 24: ICRFL t16, $0x1, CR
+ 25: INCEIPL $4
+
+ 0x2547536C: 4086FFE8 bc 4,6,0x25475354
+ 26: Jc06o $0x25475354
+
+
+. 0 25475354 28
+. 38 09 FF C6 8D 3D 00 01 20 80 00 01 7C 83 01 94 7C 83 23 78 2C 89 00 00 40 86 FF E8
+
+==== BB 296 (0x25475370) approx BBs exec'd 0 ====
+
+ 0x25475370: 5469103A rlwinm r9,r3,2,0,29
+ 0: GETL R3, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x25475374: 83BE0168 lwz r29,360(r30)
+ 4: GETL R30, t2
+ 5: ADDL $0x168, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0x25475378: 38690004 addi r3,r9,4
+ 9: GETL R9, t6
+ 10: ADDL $0x4, t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0x2547537C: 480226A9 bl 0x25497A24
+ 13: MOVL $0x25475380, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0x25497A24 ($4)
+
+
+. 0 25475370 16
+. 54 69 10 3A 83 BE 01 68 38 69 00 04 48 02 26 A9
+
+==== BB 297 (0x25475380) approx BBs exec'd 0 ====
+
+ 0x25475380: 80DE0188 lwz r6,392(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x188, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x25475384: 2F030000 cmpi cr6,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25475388: 7C641B78 or r4,r3,r3
+ 9: GETL R3, t8
+ 10: PUTL t8, R4
+ 11: INCEIPL $4
+
+ 0x2547538C: 907D0000 stw r3,0(r29)
+ 12: GETL R3, t10
+ 13: GETL R29, t12
+ 14: STL t10, (t12)
+ 15: INCEIPL $4
+
+ 0x25475390: 41BAFF44 bc 13,26,0x254752D4
+ 16: Js26o $0x254752D4
+
+
+. 0 25475380 20
+. 80 DE 01 88 2F 03 00 00 7C 64 1B 78 90 7D 00 00 41 BA FF 44
+
+==== BB 298 (0x25475394) approx BBs exec'd 0 ====
+
+ 0x25475394: 807E04B4 lwz r3,1204(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4B4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25475398: 39000000 li r8,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0x2547539C: 80BE01A0 lwz r5,416(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x1A0, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0x254753A0: 80C30000 lwz r6,0(r3)
+ 13: GETL R3, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R6
+ 16: INCEIPL $4
+
+ 0x254753A4: 7F83E378 or r3,r28,r28
+ 17: GETL R28, t14
+ 18: PUTL t14, R3
+ 19: INCEIPL $4
+
+ 0x254753A8: 80FE01A4 lwz r7,420(r30)
+ 20: GETL R30, t16
+ 21: ADDL $0x1A4, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R7
+ 24: INCEIPL $4
+
+ 0x254753AC: 4BFFF79D bl 0x25474B48
+ 25: MOVL $0x254753B0, t20
+ 26: PUTL t20, LR
+ 27: JMPo-c $0x25474B48 ($4)
+
+
+. 0 25475394 28
+. 80 7E 04 B4 39 00 00 00 80 BE 01 A0 80 C3 00 00 7F 83 E3 78 80 FE 01 A4 4B FF F7 9D
+
+==== BB 299 fillin_rpath(0x25474B48) approx BBs exec'd 0 ====
+
+ 0x25474B48: 9421FFA0 stwu r1,-96(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFA0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25474B4C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25474B50: 480224B1 bl 0x25497000
+ 9: MOVL $0x25474B54, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25474B48 12
+. 94 21 FF A0 7C 08 02 A6 48 02 24 B1
+
+==== BB 300 (0x25474B54) approx BBs exec'd 0 ====
+
+ 0x25474B54: 93C10058 stw r30,88(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x58, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25474B58: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25474B5C: 7D800026 mfcr r12
+ 8: GETL CR, t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0x25474B60: 91E1001C stw r15,28(r1)
+ 11: GETL R15, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x1C, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25474B64: 2D880000 cmpi cr3,r8,0
+ 16: GETL R8, t12
+ 17: CMP0L t12, t14 (-rSo)
+ 18: ICRFL t14, $0x3, CR
+ 19: INCEIPL $4
+
+ 0x25474B68: 92010020 stw r16,32(r1)
+ 20: GETL R16, t16
+ 21: GETL R1, t18
+ 22: ADDL $0x20, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25474B6C: 92210024 stw r17,36(r1)
+ 25: GETL R17, t20
+ 26: GETL R1, t22
+ 27: ADDL $0x24, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0x25474B70: 92410028 stw r18,40(r1)
+ 30: GETL R18, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x28, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x25474B74: 81FE0148 lwz r15,328(r30)
+ 35: GETL R30, t28
+ 36: ADDL $0x148, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R15
+ 39: INCEIPL $4
+
+ 0x25474B78: 823E04C8 lwz r17,1224(r30)
+ 40: GETL R30, t32
+ 41: ADDL $0x4C8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R17
+ 44: INCEIPL $4
+
+ 0x25474B7C: 821E0154 lwz r16,340(r30)
+ 45: GETL R30, t36
+ 46: ADDL $0x154, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R16
+ 49: INCEIPL $4
+
+ 0x25474B80: 825E0158 lwz r18,344(r30)
+ 50: GETL R30, t40
+ 51: ADDL $0x158, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R18
+ 54: INCEIPL $4
+
+ 0x25474B84: 9261002C stw r19,44(r1)
+ 55: GETL R19, t44
+ 56: GETL R1, t46
+ 57: ADDL $0x2C, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0x25474B88: 7CF33B78 or r19,r7,r7
+ 60: GETL R7, t48
+ 61: PUTL t48, R19
+ 62: INCEIPL $4
+
+ 0x25474B8C: 92810030 stw r20,48(r1)
+ 63: GETL R20, t50
+ 64: GETL R1, t52
+ 65: ADDL $0x30, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0x25474B90: 7CD43378 or r20,r6,r6
+ 68: GETL R6, t54
+ 69: PUTL t54, R20
+ 70: INCEIPL $4
+
+ 0x25474B94: 92A10034 stw r21,52(r1)
+ 71: GETL R21, t56
+ 72: GETL R1, t58
+ 73: ADDL $0x34, t58
+ 74: STL t56, (t58)
+ 75: INCEIPL $4
+
+ 0x25474B98: 7CB52B78 or r21,r5,r5
+ 76: GETL R5, t60
+ 77: PUTL t60, R21
+ 78: INCEIPL $4
+
+ 0x25474B9C: 92C10038 stw r22,56(r1)
+ 79: GETL R22, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x38, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x25474BA0: 7C962378 or r22,r4,r4
+ 84: GETL R4, t66
+ 85: PUTL t66, R22
+ 86: INCEIPL $4
+
+ 0x25474BA4: 92E1003C stw r23,60(r1)
+ 87: GETL R23, t68
+ 88: GETL R1, t70
+ 89: ADDL $0x3C, t70
+ 90: STL t68, (t70)
+ 91: INCEIPL $4
+
+ 0x25474BA8: 7D174378 or r23,r8,r8
+ 92: GETL R8, t72
+ 93: PUTL t72, R23
+ 94: INCEIPL $4
+
+ 0x25474BAC: 93010040 stw r24,64(r1)
+ 95: GETL R24, t74
+ 96: GETL R1, t76
+ 97: ADDL $0x40, t76
+ 98: STL t74, (t76)
+ 99: INCEIPL $4
+
+ 0x25474BB0: 3B000000 li r24,0
+ 100: MOVL $0x0, t78
+ 101: PUTL t78, R24
+ 102: INCEIPL $4
+
+ 0x25474BB4: 93210044 stw r25,68(r1)
+ 103: GETL R25, t80
+ 104: GETL R1, t82
+ 105: ADDL $0x44, t82
+ 106: STL t80, (t82)
+ 107: INCEIPL $4
+
+ 0x25474BB8: 93410048 stw r26,72(r1)
+ 108: GETL R26, t84
+ 109: GETL R1, t86
+ 110: ADDL $0x48, t86
+ 111: STL t84, (t86)
+ 112: INCEIPL $4
+
+ 0x25474BBC: 9361004C stw r27,76(r1)
+ 113: GETL R27, t88
+ 114: GETL R1, t90
+ 115: ADDL $0x4C, t90
+ 116: STL t88, (t90)
+ 117: INCEIPL $4
+
+ 0x25474BC0: 93810050 stw r28,80(r1)
+ 118: GETL R28, t92
+ 119: GETL R1, t94
+ 120: ADDL $0x50, t94
+ 121: STL t92, (t94)
+ 122: INCEIPL $4
+
+ 0x25474BC4: 93A10054 stw r29,84(r1)
+ 123: GETL R29, t96
+ 124: GETL R1, t98
+ 125: ADDL $0x54, t98
+ 126: STL t96, (t98)
+ 127: INCEIPL $4
+
+ 0x25474BC8: 93E1005C stw r31,92(r1)
+ 128: GETL R31, t100
+ 129: GETL R1, t102
+ 130: ADDL $0x5C, t102
+ 131: STL t100, (t102)
+ 132: INCEIPL $4
+
+ 0x25474BCC: 90010064 stw r0,100(r1)
+ 133: GETL R0, t104
+ 134: GETL R1, t106
+ 135: ADDL $0x64, t106
+ 136: STL t104, (t106)
+ 137: INCEIPL $4
+
+ 0x25474BD0: 91810018 stw r12,24(r1)
+ 138: GETL R12, t108
+ 139: GETL R1, t110
+ 140: ADDL $0x18, t110
+ 141: STL t108, (t110)
+ 142: INCEIPL $4
+
+ 0x25474BD4: 90610008 stw r3,8(r1)
+ 143: GETL R3, t112
+ 144: GETL R1, t114
+ 145: ADDL $0x8, t114
+ 146: STL t112, (t114)
+ 147: INCEIPL $4
+
+ 0x25474BD8: 38610008 addi r3,r1,8
+ 148: GETL R1, t116
+ 149: ADDL $0x8, t116
+ 150: PUTL t116, R3
+ 151: INCEIPL $4
+
+ 0x25474BDC: 7EA4AB78 or r4,r21,r21
+ 152: GETL R21, t118
+ 153: PUTL t118, R4
+ 154: INCEIPL $4
+
+ 0x25474BE0: 4800B75D bl 0x2548033C
+ 155: MOVL $0x25474BE4, t120
+ 156: PUTL t120, LR
+ 157: JMPo-c $0x2548033C ($4)
+
+
+. 0 25474B54 144
+. 93 C1 00 58 7F C8 02 A6 7D 80 00 26 91 E1 00 1C 2D 88 00 00 92 01 00 20 92 21 00 24 92 41 00 28 81 FE 01 48 82 3E 04 C8 82 1E 01 54 82 5E 01 58 92 61 00 2C 7C F3 3B 78 92 81 00 30 7C D4 33 78 92 A1 00 34 7C B5 2B 78 92 C1 00 38 7C 96 23 78 92 E1 00 3C 7D 17 43 78 93 01 00 40 3B 00 00 00 93 21 00 44 93 41 00 48 93 61 00 4C 93 81 00 50 93 A1 00 54 93 E1 00 5C 90 01 00 64 91 81 00 18 90 61 00 08 38 61 00 08 7E A4 AB 78 48 00 B7 5D
+
+==== BB 301 __strsep_g(0x2548033C) approx BBs exec'd 0 ====
+
+ 0x2548033C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25480340: 7C681B78 or r8,r3,r3
+ 6: GETL R3, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x25480344: 80630000 lwz r3,0(r3)
+ 9: GETL R3, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0x25480348: 2F830000 cmpi cr7,r3,0
+ 13: GETL R3, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x7, CR
+ 16: INCEIPL $4
+
+ 0x2548034C: 419E0054 bc 12,30,0x254803A0
+ 17: Js30o $0x254803A0
+
+
+. 0 2548033C 20
+. 94 21 FF F0 7C 68 1B 78 80 63 00 00 2F 83 00 00 41 9E 00 54
+
+==== BB 302 (0x25480350) approx BBs exec'd 0 ====
+
+ 0x25480350: 88030000 lbz r0,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25480354: 7C6A1B78 or r10,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R10
+ 6: INCEIPL $4
+
+ 0x25480358: 39200000 li r9,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x2548035C: 2C000000 cmpi cr0,r0,0
+ 10: GETL R0, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x0, CR
+ 13: INCEIPL $4
+
+ 0x25480360: 4182003C bc 12,2,0x2548039C
+ 14: Js02o $0x2548039C
+
+
+. 0 25480350 20
+. 88 03 00 00 7C 6A 1B 78 39 20 00 00 2C 00 00 00 41 82 00 3C
+
+==== BB 303 (0x25480364) approx BBs exec'd 0 ====
+
+ 0x25480364: 7C0B0378 or r11,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x25480368: 88040000 lbz r0,0(r4)
+ 3: GETL R4, t2
+ 4: LDB (t2), t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0x2548036C: 7C892378 or r9,r4,r4
+ 7: GETL R4, t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25480370: 7C805800 cmp cr1,r0,r11
+ 10: GETL R0, t8
+ 11: GETL R11, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x25480374: 41860010 bc 12,6,0x25480384
+ 15: Js06o $0x25480384
+
+
+. 0 25480364 20
+. 7C 0B 03 78 88 04 00 00 7C 89 23 78 7C 80 58 00 41 86 00 10
+
+==== BB 304 (0x25480378) approx BBs exec'd 0 ====
+
+ 0x25480378: 8C090001 lbzu r0,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R9
+ 3: LDB (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x2548037C: 2F000000 cmpi cr6,r0,0
+ 6: GETL R0, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x25480380: 409AFFF0 bc 4,26,0x25480370
+ 10: Jc26o $0x25480370
+
+
+. 0 25480378 12
+. 8C 09 00 01 2F 00 00 00 40 9A FF F0
+
+==== BB 305 (0x25480370) approx BBs exec'd 0 ====
+
+ 0x25480370: 7C805800 cmp cr1,r0,r11
+ 0: GETL R0, t0
+ 1: GETL R11, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25480374: 41860010 bc 12,6,0x25480384
+ 5: Js06o $0x25480384
+
+
+. 0 25480370 8
+. 7C 80 58 00 41 86 00 10
+
+==== BB 306 (0x25480384) approx BBs exec'd 0 ====
+
+ 0x25480384: 2F800000 cmpi cr7,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25480388: 409E0020 bc 4,30,0x254803A8
+ 4: Jc30o $0x254803A8
+
+
+. 0 25480384 8
+. 2F 80 00 00 40 9E 00 20
+
+==== BB 307 (0x2548038C) approx BBs exec'd 0 ====
+
+ 0x2548038C: 8D6A0001 lbzu r11,1(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R10
+ 3: LDB (t0), t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0x25480390: 2C0B0000 cmpi cr0,r11,0
+ 6: GETL R11, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x25480394: 4082FFD4 bc 4,2,0x25480368
+ 10: Jc02o $0x25480368
+
+
+. 0 2548038C 12
+. 8D 6A 00 01 2C 0B 00 00 40 82 FF D4
+
+==== BB 308 (0x25480368) approx BBs exec'd 0 ====
+
+ 0x25480368: 88040000 lbz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2548036C: 7C892378 or r9,r4,r4
+ 4: GETL R4, t4
+ 5: PUTL t4, R9
+ 6: INCEIPL $4
+
+ 0x25480370: 7C805800 cmp cr1,r0,r11
+ 7: GETL R0, t6
+ 8: GETL R11, t8
+ 9: CMPL t6, t8, t10 (-rSo)
+ 10: ICRFL t10, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x25480374: 41860010 bc 12,6,0x25480384
+ 12: Js06o $0x25480384
+
+
+. 0 25480368 16
+. 88 04 00 00 7C 89 23 78 7C 80 58 00 41 86 00 10
+
+==== BB 309 (0x254803A8) approx BBs exec'd 0 ====
+
+ 0x254803A8: 392A0001 addi r9,r10,1
+ 0: GETL R10, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x254803AC: 38000000 li r0,0
+ 4: MOVL $0x0, t2
+ 5: PUTL t2, R0
+ 6: INCEIPL $4
+
+ 0x254803B0: 980A0000 stb r0,0(r10)
+ 7: GETL R0, t4
+ 8: GETL R10, t6
+ 9: STB t4, (t6)
+ 10: INCEIPL $4
+
+ 0x254803B4: 91280000 stw r9,0(r8)
+ 11: GETL R9, t8
+ 12: GETL R8, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x254803B8: 4BFFFFE8 b 0x254803A0
+ 15: JMPo $0x254803A0 ($4)
+
+
+. 0 254803A8 20
+. 39 2A 00 01 38 00 00 00 98 0A 00 00 91 28 00 00 4B FF FF E8
+
+==== BB 310 (0x254803A0) approx BBs exec'd 0 ====
+
+ 0x254803A0: 38210010 addi r1,r1,16
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: PUTL t0, R1
+ 3: INCEIPL $4
+
+ 0x254803A4: 4E800020 blr
+ 4: GETL LR, t2
+ 5: JMPo-r t2 ($4)
+
+
+. 0 254803A0 8
+. 38 21 00 10 4E 80 00 20
+
+==== BB 311 (0x25474BE4) approx BBs exec'd 0 ====
+
+ 0x25474BE4: 2E030000 cmpi cr4,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25474BE8: 7C7F1B78 or r31,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R31
+ 6: INCEIPL $4
+
+ 0x25474BEC: 7C7C1B78 or r28,r3,r3
+ 7: GETL R3, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25474BF0: 4192014C bc 12,18,0x25474D3C
+ 10: Js18o $0x25474D3C
+
+
+. 0 25474BE4 16
+. 2E 03 00 00 7C 7F 1B 78 7C 7C 1B 78 41 92 01 4C
+
+==== BB 312 (0x25474BF4) approx BBs exec'd 0 ====
+
+ 0x25474BF4: 4800E3DD bl 0x25482FD0
+ 0: MOVL $0x25474BF8, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25482FD0 ($4)
+
+
+. 0 25474BF4 4
+. 48 00 E3 DD
+
+==== BB 313 (0x25474BF8) approx BBs exec'd 0 ====
+
+ 0x25474BF8: 7C7D1B79 or. r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25474BFC: 408201A8 bc 4,2,0x25474DA4
+ 5: Jc02o $0x25474DA4
+
+
+. 0 25474BF8 8
+. 7C 7D 1B 79 40 82 01 A8
+
+==== BB 314 (0x25474DA4) approx BBs exec'd 0 ====
+
+ 0x25474DA4: 2B9D0001 cmpli cr7,r29,1
+ 0: GETL R29, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25474DA8: 409D0024 bc 4,29,0x25474DCC
+ 5: Jc29o $0x25474DCC
+
+
+. 0 25474DA4 8
+. 2B 9D 00 01 40 9D 00 24
+
+==== BB 315 (0x25474DAC) approx BBs exec'd 0 ====
+
+ 0x25474DAC: 7D3FEA14 add r9,r31,r29
+ 0: GETL R31, t0
+ 1: GETL R29, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25474DB0: 8869FFFF lbz r3,-1(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: LDB (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25474DB4: 2C83002F cmpi cr1,r3,47
+ 10: GETL R3, t8
+ 11: MOVL $0x2F, t12
+ 12: CMPL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x25474DB8: 40860014 bc 4,6,0x25474DCC
+ 15: Jc06o $0x25474DCC
+
+
+. 0 25474DAC 16
+. 7D 3F EA 14 88 69 FF FF 2C 83 00 2F 40 86 00 14
+
+==== BB 316 (0x25474DCC) approx BBs exec'd 0 ====
+
+ 0x25474DCC: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25474DD0: 41BAFE34 bc 13,26,0x25474C04
+ 4: Js26o $0x25474C04
+
+
+. 0 25474DCC 8
+. 2F 1D 00 00 41 BA FE 34
+
+==== BB 317 (0x25474DD4) approx BBs exec'd 0 ====
+
+ 0x25474DD4: 7D3CEA14 add r9,r28,r29
+ 0: GETL R28, t0
+ 1: GETL R29, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25474DD8: 8889FFFF lbz r4,-1(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: LDB (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25474DDC: 2C04002F cmpi cr0,r4,47
+ 10: GETL R4, t8
+ 11: MOVL $0x2F, t12
+ 12: CMPL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25474DE0: 41A2FE24 bc 13,2,0x25474C04
+ 15: Js02o $0x25474C04
+
+
+. 0 25474DD4 16
+. 7D 3C EA 14 88 89 FF FF 2C 04 00 2F 41 A2 FE 24
+
+==== BB 318 (0x25474DE4) approx BBs exec'd 0 ====
+
+ 0x25474DE4: 2F940000 cmpi cr7,r20,0
+ 0: GETL R20, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25474DE8: 38A0002F li r5,47
+ 4: MOVL $0x2F, t4
+ 5: PUTL t4, R5
+ 6: INCEIPL $4
+
+ 0x25474DEC: 7CBCE9AE stbx r5,r28,r29
+ 7: GETL R29, t6
+ 8: GETL R28, t8
+ 9: ADDL t8, t6
+ 10: GETL R5, t10
+ 11: STB t10, (t6)
+ 12: INCEIPL $4
+
+ 0x25474DF0: 3BBD0001 addi r29,r29,1
+ 13: GETL R29, t12
+ 14: ADDL $0x1, t12
+ 15: PUTL t12, R29
+ 16: INCEIPL $4
+
+ 0x25474DF4: 419EFE18 bc 12,30,0x25474C0C
+ 17: Js30o $0x25474C0C
+
+
+. 0 25474DE4 20
+. 2F 94 00 00 38 A0 00 2F 7C BC E9 AE 3B BD 00 01 41 9E FE 18
+
+==== BB 319 (0x25474C0C) approx BBs exec'd 0 ====
+
+ 0x25474C0C: 83F101B0 lwz r31,432(r17)
+ 0: GETL R17, t0
+ 1: ADDL $0x1B0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x25474C10: 7E398B78 or r25,r17,r17
+ 5: GETL R17, t4
+ 6: PUTL t4, R25
+ 7: INCEIPL $4
+
+ 0x25474C14: 2E1F0000 cmpi cr4,r31,0
+ 8: GETL R31, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x4, CR
+ 11: INCEIPL $4
+
+ 0x25474C18: 41920024 bc 12,18,0x25474C3C
+ 12: Js18o $0x25474C3C
+
+
+. 0 25474C0C 16
+. 83 F1 01 B0 7E 39 8B 78 2E 1F 00 00 41 92 00 24
+
+==== BB 320 (0x25474C1C) approx BBs exec'd 0 ====
+
+ 0x25474C1C: 815F0010 lwz r10,16(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25474C20: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25474C24: 7FA5EB78 or r5,r29,r29
+ 8: GETL R29, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x25474C28: 7F8AE800 cmp cr7,r10,r29
+ 11: GETL R10, t8
+ 12: GETL R29, t10
+ 13: CMPL t8, t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0x25474C2C: 419E0240 bc 12,30,0x25474E6C
+ 16: Js30o $0x25474E6C
+
+
+. 0 25474C1C 20
+. 81 5F 00 10 7F 83 E3 78 7F A5 EB 78 7F 8A E8 00 41 9E 02 40
+
+==== BB 321 (0x25474C30) approx BBs exec'd 0 ====
+
+ 0x25474C30: 83FF0000 lwz r31,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R31
+ 3: INCEIPL $4
+
+ 0x25474C34: 2E1F0000 cmpi cr4,r31,0
+ 4: GETL R31, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x4, CR
+ 7: INCEIPL $4
+
+ 0x25474C38: 4092FFE4 bc 4,18,0x25474C1C
+ 8: Jc18o $0x25474C1C
+
+
+. 0 25474C30 12
+. 83 FF 00 00 2E 1F 00 00 40 92 FF E4
+
+==== BB 322 (0x25474C3C) approx BBs exec'd 0 ====
+
+ 0x25474C3C: 418E0284 bc 12,14,0x25474EC0
+ 0: Js14o $0x25474EC0
+
+
+. 0 25474C3C 4
+. 41 8E 02 84
+
+==== BB 323 (0x25474EC0) approx BBs exec'd 0 ====
+
+ 0x25474EC0: 80700000 lwz r3,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25474EC4: 3B600000 li r27,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R27
+ 6: INCEIPL $4
+
+ 0x25474EC8: 7E1A8378 or r26,r16,r16
+ 7: GETL R16, t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0x25474ECC: 5460103A rlwinm r0,r3,2,0,29
+ 10: GETL R3, t8
+ 11: SHLL $0x2, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x25474ED0: 7D80DA14 add r12,r0,r27
+ 14: GETL R0, t10
+ 15: GETL R27, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R12
+ 18: INCEIPL $4
+
+ 0x25474ED4: 7FECEA14 add r31,r12,r29
+ 19: GETL R12, t14
+ 20: GETL R29, t16
+ 21: ADDL t14, t16
+ 22: PUTL t16, R31
+ 23: INCEIPL $4
+
+ 0x25474ED8: 387F0015 addi r3,r31,21
+ 24: GETL R31, t18
+ 25: ADDL $0x15, t18
+ 26: PUTL t18, R3
+ 27: INCEIPL $4
+
+ 0x25474EDC: 48022B49 bl 0x25497A24
+ 28: MOVL $0x25474EE0, t20
+ 29: PUTL t20, LR
+ 30: JMPo-c $0x25497A24 ($4)
+
+
+. 0 25474EC0 32
+. 80 70 00 00 3B 60 00 00 7E 1A 83 78 54 60 10 3A 7D 80 DA 14 7F EC EA 14 38 7F 00 15 48 02 2B 49
+
+==== BB 324 (0x25474EE0) approx BBs exec'd 0 ====
+
+ 0x25474EE0: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25474EE4: 4082FD8C bc 4,2,0x25474C70
+ 5: Jc02o $0x25474C70
+
+
+. 0 25474EE0 8
+. 7C 7F 1B 79 40 82 FD 8C
+
+==== BB 325 (0x25474C70) approx BBs exec'd 0 ====
+
+ 0x25474C70: 80F00000 lwz r7,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25474C74: 7F84E378 or r4,r28,r28
+ 4: GETL R28, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0x25474C78: 54E6103A rlwinm r6,r7,2,0,29
+ 7: GETL R7, t6
+ 8: SHLL $0x2, t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0x25474C7C: 7CA6FA14 add r5,r6,r31
+ 11: GETL R6, t8
+ 12: GETL R31, t10
+ 13: ADDL t8, t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0x25474C80: 38650014 addi r3,r5,20
+ 16: GETL R5, t12
+ 17: ADDL $0x14, t12
+ 18: PUTL t12, R3
+ 19: INCEIPL $4
+
+ 0x25474C84: 7FA5EB78 or r5,r29,r29
+ 20: GETL R29, t14
+ 21: PUTL t14, R5
+ 22: INCEIPL $4
+
+ 0x25474C88: 907F000C stw r3,12(r31)
+ 23: GETL R3, t16
+ 24: GETL R31, t18
+ 25: ADDL $0xC, t18
+ 26: STL t16, (t18)
+ 27: INCEIPL $4
+
+ 0x25474C8C: 4800ED95 bl 0x25483A20
+ 28: MOVL $0x25474C90, t20
+ 29: PUTL t20, LR
+ 30: JMPo-c $0x25483A20 ($4)
+
+
+. 0 25474C70 32
+. 80 F0 00 00 7F 84 E3 78 54 E6 10 3A 7C A6 FA 14 38 65 00 14 7F A5 EB 78 90 7F 00 0C 48 00 ED 95
+
+==== BB 326 (0x25483A4C) approx BBs exec'd 0 ====
+
+ 0x25483A4C: 7C8300D0 neg r4,r3
+ 0: GETL R3, t0
+ 1: NEGL t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x25483A50: 548307BE rlwinm r3,r4,0,30,31
+ 4: GETL R4, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R3
+ 7: INCEIPL $4
+
+ 0x25483A54: 7C691B79 or. r9,r3,r3
+ 8: GETL R3, t4
+ 9: PUTL t4, R9
+ 10: CMP0L t4, t6 (-rSo)
+ 11: ICRFL t6, $0x0, CR
+ 12: INCEIPL $4
+
+ 0x25483A58: 7F832850 subf r28,r3,r5
+ 13: GETL R3, t8
+ 14: GETL R5, t10
+ 15: SUBL t8, t10
+ 16: PUTL t10, R28
+ 17: INCEIPL $4
+
+ 0x25483A5C: 4182001C bc 12,2,0x25483A78
+ 18: Js02o $0x25483A78
+
+
+. 0 25483A4C 20
+. 7C 83 00 D0 54 83 07 BE 7C 69 1B 79 7F 83 28 50 41 82 00 1C
+
+==== BB 327 (0x25483A78) approx BBs exec'd 0 ====
+
+ 0x25483A78: 73E00003 andi. r0,r31,0x3
+ 0: GETL R31, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25483A7C: 40820068 bc 4,2,0x25483AE4
+ 6: Jc02o $0x25483AE4
+
+
+. 0 25483A78 8
+. 73 E0 00 03 40 82 00 68
+
+==== BB 328 (0x25483A80) approx BBs exec'd 0 ====
+
+ 0x25483A80: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25483A84: 7FE4FB78 or r4,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25483A88: 5785F0BE rlwinm r5,r28,30,2,31
+ 6: GETL R28, t4
+ 7: SHRL $0x2, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0x25483A8C: 48000239 bl 0x25483CC4
+ 10: MOVL $0x25483A90, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0x25483CC4 ($4)
+
+
+. 0 25483A80 16
+. 7F A3 EB 78 7F E4 FB 78 57 85 F0 BE 48 00 02 39
+
+==== BB 329 (0x25483DA8) approx BBs exec'd 0 ====
+
+ 0x25483DA8: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25483DAC: 3884FFF0 addi r4,r4,-16
+ 4: GETL R4, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25483DB0: 81240014 lwz r9,20(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0x25483DB4: 3863FFEC addi r3,r3,-20
+ 13: GETL R3, t10
+ 14: ADDL $0xFFFFFFEC, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0x25483DB8: 38A50004 addi r5,r5,4
+ 17: GETL R5, t12
+ 18: ADDL $0x4, t12
+ 19: PUTL t12, R5
+ 20: INCEIPL $4
+
+ 0x25483DBC: 90030014 stw r0,20(r3)
+ 21: GETL R0, t14
+ 22: GETL R3, t16
+ 23: ADDL $0x14, t16
+ 24: STL t14, (t16)
+ 25: INCEIPL $4
+
+ 0x25483DC0: 4BFFFF7C b 0x25483D3C
+ 26: JMPo $0x25483D3C ($4)
+
+
+. 0 25483DA8 28
+. 80 04 00 00 38 84 FF F0 81 24 00 14 38 63 FF EC 38 A5 00 04 90 03 00 14 4B FF FF 7C
+
+==== BB 330 (0x25483A90) approx BBs exec'd 0 ====
+
+ 0x25483A90: 5786003A rlwinm r6,r28,0,0,29
+ 0: GETL R28, t0
+ 1: ANDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x25483A94: 578507BE rlwinm r5,r28,0,30,31
+ 4: GETL R28, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0x25483A98: 7FBD3214 add r29,r29,r6
+ 8: GETL R29, t4
+ 9: GETL R6, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R29
+ 12: INCEIPL $4
+
+ 0x25483A9C: 7FFF3214 add r31,r31,r6
+ 13: GETL R31, t8
+ 14: GETL R6, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R31
+ 17: INCEIPL $4
+
+ 0x25483AA0: 2C850000 cmpi cr1,r5,0
+ 18: GETL R5, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x1, CR
+ 21: INCEIPL $4
+
+ 0x25483AA4: 4186001C bc 12,6,0x25483AC0
+ 22: Js06o $0x25483AC0
+
+
+. 0 25483A90 24
+. 57 86 00 3A 57 85 07 BE 7F BD 32 14 7F FF 32 14 2C 85 00 00 41 86 00 1C
+
+==== BB 331 (0x25474C90) approx BBs exec'd 0 ====
+
+ 0x25474C90: 39200000 li r9,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25474C94: 99230000 stb r9,0(r3)
+ 3: GETL R9, t2
+ 4: GETL R3, t4
+ 5: STB t2, (t4)
+ 6: INCEIPL $4
+
+ 0x25474C98: 80920000 lwz r4,0(r18)
+ 7: GETL R18, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R4
+ 10: INCEIPL $4
+
+ 0x25474C9C: 93BF0010 stw r29,16(r31)
+ 11: GETL R29, t10
+ 12: GETL R31, t12
+ 13: ADDL $0x10, t12
+ 14: STL t10, (t12)
+ 15: INCEIPL $4
+
+ 0x25474CA0: 7F9D2040 cmpl cr7,r29,r4
+ 16: GETL R29, t14
+ 17: GETL R4, t16
+ 18: CMPUL t14, t16, t18 (-rSo)
+ 19: ICRFL t18, $0x7, CR
+ 20: INCEIPL $4
+
+ 0x25474CA4: 409D0008 bc 4,29,0x25474CAC
+ 21: Jc29o $0x25474CAC
+
+
+. 0 25474C90 24
+. 39 20 00 00 99 23 00 00 80 92 00 00 93 BF 00 10 7F 9D 20 40 40 9D 00 08
+
+==== BB 332 (0x25474CA8) approx BBs exec'd 0 ====
+
+ 0x25474CA8: 93B20000 stw r29,0(r18)
+ 0: GETL R29, t0
+ 1: GETL R18, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25474CAC: 813A0000 lwz r9,0(r26)
+ 4: GETL R26, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R9
+ 7: INCEIPL $4
+
+ 0x25474CB0: 895C0000 lbz r10,0(r28)
+ 8: GETL R28, t8
+ 9: LDB (t8), t10
+ 10: PUTL t10, R10
+ 11: INCEIPL $4
+
+ 0x25474CB4: 2C890000 cmpi cr1,r9,0
+ 12: GETL R9, t12
+ 13: CMP0L t12, t14 (-rSo)
+ 14: ICRFL t14, $0x1, CR
+ 15: INCEIPL $4
+
+ 0x25474CB8: 6948002F xori r8,r10,0x2F
+ 16: GETL R10, t16
+ 17: XORL $0x2F, t16
+ 18: PUTL t16, R8
+ 19: INCEIPL $4
+
+ 0x25474CBC: 7F8800D0 neg r28,r8
+ 20: GETL R8, t18
+ 21: NEGL t18
+ 22: PUTL t18, R28
+ 23: INCEIPL $4
+
+ 0x25474CC0: 578317BC rlwinm r3,r28,2,30,30
+ 24: GETL R28, t20
+ 25: ROLL $0x2, t20
+ 26: ANDL $0x2, t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0x25474CC4: 41860018 bc 12,6,0x25474CDC
+ 29: Js06o $0x25474CDC
+
+
+. 0 25474CA8 32
+. 93 B2 00 00 81 3A 00 00 89 5C 00 00 2C 89 00 00 69 48 00 2F 7F 88 00 D0 57 83 17 BC 41 86 00 18
+
+==== BB 333 (0x25474CC8) approx BBs exec'd 0 ====
+
+ 0x25474CC8: 7D2903A6 mtctr r9
+ 0: GETL R9, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x25474CCC: 397F0014 addi r11,r31,20
+ 3: GETL R31, t2
+ 4: ADDL $0x14, t2
+ 5: PUTL t2, R11
+ 6: INCEIPL $4
+
+ 0x25474CD0: 906B0000 stw r3,0(r11)
+ 7: GETL R3, t4
+ 8: GETL R11, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x25474CD4: 396B0004 addi r11,r11,4
+ 11: GETL R11, t8
+ 12: ADDL $0x4, t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0x25474CD8: 4200FFF8 bc 16,0,0x25474CD0
+ 15: GETL CTR, t10
+ 16: ADDL $0xFFFFFFFF, t10
+ 17: PUTL t10, CTR
+ 18: JIFZL t10, $0x25474CDC
+ 19: JMPo $0x25474CD0 ($4)
+
+
+. 0 25474CC8 20
+. 7D 29 03 A6 39 7F 00 14 90 6B 00 00 39 6B 00 04 42 00 FF F8
+
+==== BB 334 (0x25474CD0) approx BBs exec'd 0 ====
+
+ 0x25474CD0: 906B0000 stw r3,0(r11)
+ 0: GETL R3, t0
+ 1: GETL R11, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25474CD4: 396B0004 addi r11,r11,4
+ 4: GETL R11, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x25474CD8: 4200FFF8 bc 16,0,0x25474CD0
+ 8: GETL CTR, t6
+ 9: ADDL $0xFFFFFFFF, t6
+ 10: PUTL t6, CTR
+ 11: JIFZL t6, $0x25474CDC
+ 12: JMPo $0x25474CD0 ($4)
+
+
+. 0 25474CD0 12
+. 90 6B 00 00 39 6B 00 04 42 00 FF F8
+
+==== BB 335 (0x25474CDC) approx BBs exec'd 0 ====
+
+ 0x25474CDC: 927F0004 stw r19,4(r31)
+ 0: GETL R19, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x4, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25474CE0: 418E021C bc 12,14,0x25474EFC
+ 5: Js14o $0x25474EFC
+
+
+. 0 25474CDC 8
+. 92 7F 00 04 41 8E 02 1C
+
+==== BB 336 (0x25474EFC) approx BBs exec'd 0 ====
+
+ 0x25474EFC: 92FF0008 stw r23,8(r31)
+ 0: GETL R23, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25474F00: 4BFFFE08 b 0x25474D08
+ 5: JMPo $0x25474D08 ($4)
+
+
+. 0 25474EFC 8
+. 92 FF 00 08 4B FF FE 08
+
+==== BB 337 (0x25474D08) approx BBs exec'd 0 ====
+
+ 0x25474D08: 801901B0 lwz r0,432(r25)
+ 0: GETL R25, t0
+ 1: ADDL $0x1B0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25474D0C: 571D103A rlwinm r29,r24,2,0,29
+ 5: GETL R24, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0x25474D10: 38610008 addi r3,r1,8
+ 9: GETL R1, t6
+ 10: ADDL $0x8, t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0x25474D14: 7EA4AB78 or r4,r21,r21
+ 13: GETL R21, t8
+ 14: PUTL t8, R4
+ 15: INCEIPL $4
+
+ 0x25474D18: 901F0000 stw r0,0(r31)
+ 16: GETL R0, t10
+ 17: GETL R31, t12
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0x25474D1C: 3B180001 addi r24,r24,1
+ 20: GETL R24, t14
+ 21: ADDL $0x1, t14
+ 22: PUTL t14, R24
+ 23: INCEIPL $4
+
+ 0x25474D20: 93F901B0 stw r31,432(r25)
+ 24: GETL R31, t16
+ 25: GETL R25, t18
+ 26: ADDL $0x1B0, t18
+ 27: STL t16, (t18)
+ 28: INCEIPL $4
+
+ 0x25474D24: 7FFDB12E stwx r31,r29,r22
+ 29: GETL R22, t20
+ 30: GETL R29, t22
+ 31: ADDL t22, t20
+ 32: GETL R31, t24
+ 33: STL t24, (t20)
+ 34: INCEIPL $4
+
+ 0x25474D28: 4800B615 bl 0x2548033C
+ 35: MOVL $0x25474D2C, t26
+ 36: PUTL t26, LR
+ 37: JMPo-c $0x2548033C ($4)
+
+
+. 0 25474D08 36
+. 80 19 01 B0 57 1D 10 3A 38 61 00 08 7E A4 AB 78 90 1F 00 00 3B 18 00 01 93 F9 01 B0 7F FD B1 2E 48 00 B6 15
+
+==== BB 338 (0x25474D2C) approx BBs exec'd 0 ====
+
+ 0x25474D2C: 2E030000 cmpi cr4,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25474D30: 7C7F1B78 or r31,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R31
+ 6: INCEIPL $4
+
+ 0x25474D34: 7C7C1B78 or r28,r3,r3
+ 7: GETL R3, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25474D38: 4092FEBC bc 4,18,0x25474BF4
+ 10: Jc18o $0x25474BF4
+
+
+. 0 25474D2C 16
+. 2E 03 00 00 7C 7F 1B 78 7C 7C 1B 78 40 92 FE BC
+
+==== BB 339 (0x25483054) approx BBs exec'd 0 ====
+
+ 0x25483054: 7CE04838 and r0,r7,r9
+ 0: GETL R7, t0
+ 1: GETL R9, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25483058: 7C003A14 add r0,r0,r7
+ 5: GETL R0, t4
+ 6: GETL R7, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x2548305C: 7D880078 andc r8,r12,r0
+ 10: GETL R12, t8
+ 11: GETL R0, t10
+ 12: NOTL t10
+ 13: ANDL t8, t10
+ 14: PUTL t10, R8
+ 15: INCEIPL $4
+
+ 0x25483060: 48000014 b 0x25483074
+ 16: JMPo $0x25483074 ($4)
+
+
+. 0 25483054 16
+. 7C E0 48 38 7C 00 3A 14 7D 88 00 78 48 00 00 14
+
+==== BB 340 (0x2547FE20) approx BBs exec'd 0 ====
+
+ 0x2547FE20: 813E04F4 lwz r9,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547FE24: 81890004 lwz r12,4(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x2547FE28: 7C8CE214 add r4,r12,r28
+ 10: GETL R12, t8
+ 11: GETL R28, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0x2547FE2C: 7D4C00D0 neg r10,r12
+ 15: GETL R12, t12
+ 16: NEGL t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547FE30: 3964FFFF addi r11,r4,-1
+ 19: GETL R4, t14
+ 20: ADDL $0xFFFFFFFF, t14
+ 21: PUTL t14, R11
+ 22: INCEIPL $4
+
+ 0x2547FE34: 7D7D5038 and r29,r11,r10
+ 23: GETL R11, t16
+ 24: GETL R10, t18
+ 25: ANDL t16, t18
+ 26: PUTL t18, R29
+ 27: INCEIPL $4
+
+ 0x2547FE38: 7FA4EB78 or r4,r29,r29
+ 28: GETL R29, t20
+ 29: PUTL t20, R4
+ 30: INCEIPL $4
+
+ 0x2547FE3C: 4800295D bl 0x25482798
+ 31: MOVL $0x2547FE40, t22
+ 32: PUTL t22, LR
+ 33: JMPo-c $0x25482798 ($4)
+
+
+. 0 2547FE20 32
+. 81 3E 04 F4 81 89 00 04 7C 8C E2 14 7D 4C 00 D0 39 64 FF FF 7D 7D 50 38 7F A4 EB 78 48 00 29 5D
+
+==== BB 341 mmap(0x25482798) approx BBs exec'd 0 ====
+
+ 0x25482798: 3800005A li r0,90
+ 0: MOVL $0x5A, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x2548279C: 44000002 sc
+ 3: JMPo-sys $0x254827A0 ($4)
+
+
+. 0 25482798 8
+. 38 00 00 5A 44 00 00 02
+
+==== BB 342 (0x254827A0) approx BBs exec'd 0 ====
+
+ 0x254827A0: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+. 0 254827A0 4
+. 4C A3 00 20
+
+==== BB 343 (0x2547FE40) approx BBs exec'd 0 ====
+
+ 0x2547FE40: 80BB0000 lwz r5,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x2547FE44: 7D23EA14 add r9,r3,r29
+ 4: GETL R3, t4
+ 5: GETL R29, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0x2547FE48: 7C832800 cmp cr1,r3,r5
+ 9: GETL R3, t8
+ 10: GETL R5, t10
+ 11: CMPL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x2547FE4C: 41860008 bc 12,6,0x2547FE54
+ 14: Js06o $0x2547FE54
+
+
+. 0 2547FE40 16
+. 80 BB 00 00 7D 23 EA 14 7C 83 28 00 41 86 00 08
+
+==== BB 344 (0x2547FE50) approx BBs exec'd 0 ====
+
+ 0x2547FE50: 907F0000 stw r3,0(r31)
+ 0: GETL R3, t0
+ 1: GETL R31, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x2547FE54: 807F0000 lwz r3,0(r31)
+ 4: GETL R31, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R3
+ 7: INCEIPL $4
+
+ 0x2547FE58: 80C10024 lwz r6,36(r1)
+ 8: GETL R1, t8
+ 9: ADDL $0x24, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R6
+ 12: INCEIPL $4
+
+ 0x2547FE5C: 7D03E214 add r8,r3,r28
+ 13: GETL R3, t12
+ 14: GETL R28, t14
+ 15: ADDL t12, t14
+ 16: PUTL t14, R8
+ 17: INCEIPL $4
+
+ 0x2547FE60: 80FE0420 lwz r7,1056(r30)
+ 18: GETL R30, t16
+ 19: ADDL $0x420, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R7
+ 22: INCEIPL $4
+
+ 0x2547FE64: 913B0000 stw r9,0(r27)
+ 23: GETL R9, t20
+ 24: GETL R27, t22
+ 25: STL t20, (t22)
+ 26: INCEIPL $4
+
+ 0x2547FE68: 7CC803A6 mtlr r6
+ 27: GETL R6, t24
+ 28: PUTL t24, LR
+ 29: INCEIPL $4
+
+ 0x2547FE6C: 911F0000 stw r8,0(r31)
+ 30: GETL R8, t26
+ 31: GETL R31, t28
+ 32: STL t26, (t28)
+ 33: INCEIPL $4
+
+ 0x2547FE70: 8361000C lwz r27,12(r1)
+ 34: GETL R1, t30
+ 35: ADDL $0xC, t30
+ 36: LDL (t30), t32
+ 37: PUTL t32, R27
+ 38: INCEIPL $4
+
+ 0x2547FE74: 83810010 lwz r28,16(r1)
+ 39: GETL R1, t34
+ 40: ADDL $0x10, t34
+ 41: LDL (t34), t36
+ 42: PUTL t36, R28
+ 43: INCEIPL $4
+
+ 0x2547FE78: 83A10014 lwz r29,20(r1)
+ 44: GETL R1, t38
+ 45: ADDL $0x14, t38
+ 46: LDL (t38), t40
+ 47: PUTL t40, R29
+ 48: INCEIPL $4
+
+ 0x2547FE7C: 83C10018 lwz r30,24(r1)
+ 49: GETL R1, t42
+ 50: ADDL $0x18, t42
+ 51: LDL (t42), t44
+ 52: PUTL t44, R30
+ 53: INCEIPL $4
+
+ 0x2547FE80: 83E1001C lwz r31,28(r1)
+ 54: GETL R1, t46
+ 55: ADDL $0x1C, t46
+ 56: LDL (t46), t48
+ 57: PUTL t48, R31
+ 58: INCEIPL $4
+
+ 0x2547FE84: 38210020 addi r1,r1,32
+ 59: GETL R1, t50
+ 60: ADDL $0x20, t50
+ 61: PUTL t50, R1
+ 62: INCEIPL $4
+
+ 0x2547FE88: 90670000 stw r3,0(r7)
+ 63: GETL R3, t52
+ 64: GETL R7, t54
+ 65: STL t52, (t54)
+ 66: INCEIPL $4
+
+ 0x2547FE8C: 4E800020 blr
+ 67: GETL LR, t56
+ 68: JMPo-r t56 ($4)
+
+
+. 0 2547FE50 64
+. 90 7F 00 00 80 7F 00 00 80 C1 00 24 7D 03 E2 14 80 FE 04 20 91 3B 00 00 7C C8 03 A6 91 1F 00 00 83 61 00 0C 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 90 67 00 00 4E 80 00 20
+
+==== BB 345 (0x25483AE4) approx BBs exec'd 0 ====
+
+ 0x25483AE4: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25483AE8: 7FE4FB78 or r4,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25483AEC: 5785F0BE rlwinm r5,r28,30,2,31
+ 6: GETL R28, t4
+ 7: SHRL $0x2, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0x25483AF0: 48000329 bl 0x25483E18
+ 10: MOVL $0x25483AF4, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0x25483E18 ($4)
+
+
+. 0 25483AE4 16
+. 7F A3 EB 78 7F E4 FB 78 57 85 F0 BE 48 00 03 29
+
+==== BB 346 _wordcopy_fwd_dest_aligned(0x25483E18) approx BBs exec'd 0 ====
+
+ 0x25483E18: 54A007BE rlwinm r0,r5,0,30,31
+ 0: GETL R5, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x25483E1C: 54881EF8 rlwinm r8,r4,3,27,28
+ 4: GETL R4, t2
+ 5: ROLL $0x3, t2
+ 6: ANDL $0x18, t2
+ 7: PUTL t2, R8
+ 8: INCEIPL $4
+
+ 0x25483E20: 2F800001 cmpi cr7,r0,1
+ 9: GETL R0, t4
+ 10: MOVL $0x1, t8
+ 11: CMPL t4, t8, t6 (-rSo)
+ 12: ICRFL t6, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25483E24: 9421FFF0 stwu r1,-16(r1)
+ 14: GETL R1, t10
+ 15: GETL R1, t12
+ 16: ADDL $0xFFFFFFF0, t12
+ 17: PUTL t12, R1
+ 18: STL t10, (t12)
+ 19: INCEIPL $4
+
+ 0x25483E28: 5484003A rlwinm r4,r4,0,0,29
+ 20: GETL R4, t14
+ 21: ANDL $0xFFFFFFFC, t14
+ 22: PUTL t14, R4
+ 23: INCEIPL $4
+
+ 0x25483E2C: 20E80020 subfic r7,r8,32
+ 24: GETL R8, t16
+ 25: MOVL $0x20, t18
+ 26: SBBL t16, t18 (-wCa)
+ 27: PUTL t18, R7
+ 28: INCEIPL $4
+
+ 0x25483E30: 419E00B8 bc 12,30,0x25483EE8
+ 29: Js30o $0x25483EE8
+
+
+. 0 25483E18 28
+. 54 A0 07 BE 54 88 1E F8 2F 80 00 01 94 21 FF F0 54 84 00 3A 20 E8 00 20 41 9E 00 B8
+
+==== BB 347 (0x25483E34) approx BBs exec'd 0 ====
+
+ 0x25483E34: 28000001 cmpli cr0,r0,1
+ 0: GETL R0, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25483E38: 4180008C bc 12,0,0x25483EC4
+ 5: Js00o $0x25483EC4
+
+
+. 0 25483E34 8
+. 28 00 00 01 41 80 00 8C
+
+==== BB 348 (0x25483E3C) approx BBs exec'd 0 ====
+
+ 0x25483E3C: 2C800002 cmpi cr1,r0,2
+ 0: GETL R0, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25483E40: 418600BC bc 12,6,0x25483EFC
+ 5: Js06o $0x25483EFC
+
+
+. 0 25483E3C 8
+. 2C 80 00 02 41 86 00 BC
+
+==== BB 349 (0x25483EFC) approx BBs exec'd 0 ====
+
+ 0x25483EFC: 81440000 lwz r10,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0x25483F00: 3863FFF4 addi r3,r3,-12
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFF4, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483F04: 81640004 lwz r11,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x25483F08: 38A50002 addi r5,r5,2
+ 13: GETL R5, t10
+ 14: ADDL $0x2, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0x25483F0C: 3884FFFC addi r4,r4,-4
+ 17: GETL R4, t12
+ 18: ADDL $0xFFFFFFFC, t12
+ 19: PUTL t12, R4
+ 20: INCEIPL $4
+
+ 0x25483F10: 4BFFFF78 b 0x25483E88
+ 21: JMPo $0x25483E88 ($4)
+
+
+. 0 25483EFC 24
+. 81 44 00 00 38 63 FF F4 81 64 00 04 38 A5 00 02 38 84 FF FC 4B FF FF 78
+
+==== BB 350 (0x25483E88) approx BBs exec'd 0 ====
+
+ 0x25483E88: 34A5FFFC addic. r5,r5,-4
+ 0: GETL R5, t0
+ 1: ADCL $0xFFFFFFFC, t0 (-wCa)
+ 2: PUTL t0, R5
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25483E8C: 7D464030 slw r6,r10,r8
+ 6: GETL R10, t6
+ 7: GETL R8, t4
+ 8: SHLL t4, t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0x25483E90: 7D693C30 srw r9,r11,r7
+ 11: GETL R11, t10
+ 12: GETL R7, t8
+ 13: SHRL t8, t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0x25483E94: 8144000C lwz r10,12(r4)
+ 16: GETL R4, t12
+ 17: ADDL $0xC, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R10
+ 20: INCEIPL $4
+
+ 0x25483E98: 7CC04B78 or r0,r6,r9
+ 21: GETL R6, t16
+ 22: GETL R9, t18
+ 23: ORL t18, t16
+ 24: PUTL t16, R0
+ 25: INCEIPL $4
+
+ 0x25483E9C: 38840010 addi r4,r4,16
+ 26: GETL R4, t20
+ 27: ADDL $0x10, t20
+ 28: PUTL t20, R4
+ 29: INCEIPL $4
+
+ 0x25483EA0: 9003000C stw r0,12(r3)
+ 30: GETL R0, t22
+ 31: GETL R3, t24
+ 32: ADDL $0xC, t24
+ 33: STL t22, (t24)
+ 34: INCEIPL $4
+
+ 0x25483EA4: 38630010 addi r3,r3,16
+ 35: GETL R3, t26
+ 36: ADDL $0x10, t26
+ 37: PUTL t26, R3
+ 38: INCEIPL $4
+
+ 0x25483EA8: 40A2FFA4 bc 5,2,0x25483E4C
+ 39: Jc02o $0x25483E4C
+
+
+. 0 25483E88 36
+. 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
+
+==== BB 351 (0x25483E4C) approx BBs exec'd 0 ====
+
+ 0x25483E4C: 7D664030 slw r6,r11,r8
+ 0: GETL R11, t2
+ 1: GETL R8, t0
+ 2: SHLL t0, t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x25483E50: 7D493C30 srw r9,r10,r7
+ 5: GETL R10, t6
+ 6: GETL R7, t4
+ 7: SHRL t4, t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25483E54: 7CC04B78 or r0,r6,r9
+ 10: GETL R6, t8
+ 11: GETL R9, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R0
+ 14: INCEIPL $4
+
+ 0x25483E58: 81640000 lwz r11,0(r4)
+ 15: GETL R4, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R11
+ 18: INCEIPL $4
+
+ 0x25483E5C: 90030000 stw r0,0(r3)
+ 19: GETL R0, t16
+ 20: GETL R3, t18
+ 21: STL t16, (t18)
+ 22: INCEIPL $4
+
+ 0x25483E60: 7D404030 slw r0,r10,r8
+ 23: GETL R10, t22
+ 24: GETL R8, t20
+ 25: SHLL t20, t22
+ 26: PUTL t22, R0
+ 27: INCEIPL $4
+
+ 0x25483E64: 7D6A3C30 srw r10,r11,r7
+ 28: GETL R11, t26
+ 29: GETL R7, t24
+ 30: SHRL t24, t26
+ 31: PUTL t26, R10
+ 32: INCEIPL $4
+
+ 0x25483E68: 7C0C5378 or r12,r0,r10
+ 33: GETL R0, t28
+ 34: GETL R10, t30
+ 35: ORL t30, t28
+ 36: PUTL t28, R12
+ 37: INCEIPL $4
+
+ 0x25483E6C: 81440004 lwz r10,4(r4)
+ 38: GETL R4, t32
+ 39: ADDL $0x4, t32
+ 40: LDL (t32), t34
+ 41: PUTL t34, R10
+ 42: INCEIPL $4
+
+ 0x25483E70: 91830004 stw r12,4(r3)
+ 43: GETL R12, t36
+ 44: GETL R3, t38
+ 45: ADDL $0x4, t38
+ 46: STL t36, (t38)
+ 47: INCEIPL $4
+
+ 0x25483E74: 7D6C4030 slw r12,r11,r8
+ 48: GETL R11, t42
+ 49: GETL R8, t40
+ 50: SHLL t40, t42
+ 51: PUTL t42, R12
+ 52: INCEIPL $4
+
+ 0x25483E78: 7D4B3C30 srw r11,r10,r7
+ 53: GETL R10, t46
+ 54: GETL R7, t44
+ 55: SHRL t44, t46
+ 56: PUTL t46, R11
+ 57: INCEIPL $4
+
+ 0x25483E7C: 7D865B78 or r6,r12,r11
+ 58: GETL R12, t48
+ 59: GETL R11, t50
+ 60: ORL t50, t48
+ 61: PUTL t48, R6
+ 62: INCEIPL $4
+
+ 0x25483E80: 81640008 lwz r11,8(r4)
+ 63: GETL R4, t52
+ 64: ADDL $0x8, t52
+ 65: LDL (t52), t54
+ 66: PUTL t54, R11
+ 67: INCEIPL $4
+
+ 0x25483E84: 90C30008 stw r6,8(r3)
+ 68: GETL R6, t56
+ 69: GETL R3, t58
+ 70: ADDL $0x8, t58
+ 71: STL t56, (t58)
+ 72: INCEIPL $4
+
+ 0x25483E88: 34A5FFFC addic. r5,r5,-4
+ 73: GETL R5, t60
+ 74: ADCL $0xFFFFFFFC, t60 (-wCa)
+ 75: PUTL t60, R5
+ 76: CMP0L t60, t62 (-rSo)
+ 77: ICRFL t62, $0x0, CR
+ 78: INCEIPL $4
+
+ 0x25483E8C: 7D464030 slw r6,r10,r8
+ 79: GETL R10, t66
+ 80: GETL R8, t64
+ 81: SHLL t64, t66
+ 82: PUTL t66, R6
+ 83: INCEIPL $4
+
+ 0x25483E90: 7D693C30 srw r9,r11,r7
+ 84: GETL R11, t70
+ 85: GETL R7, t68
+ 86: SHRL t68, t70
+ 87: PUTL t70, R9
+ 88: INCEIPL $4
+
+ 0x25483E94: 8144000C lwz r10,12(r4)
+ 89: GETL R4, t72
+ 90: ADDL $0xC, t72
+ 91: LDL (t72), t74
+ 92: PUTL t74, R10
+ 93: INCEIPL $4
+
+ 0x25483E98: 7CC04B78 or r0,r6,r9
+ 94: GETL R6, t76
+ 95: GETL R9, t78
+ 96: ORL t78, t76
+ 97: PUTL t76, R0
+ 98: INCEIPL $4
+
+ 0x25483E9C: 38840010 addi r4,r4,16
+ 99: GETL R4, t80
+ 100: ADDL $0x10, t80
+ 101: PUTL t80, R4
+ 102: INCEIPL $4
+
+ 0x25483EA0: 9003000C stw r0,12(r3)
+ 103: GETL R0, t82
+ 104: GETL R3, t84
+ 105: ADDL $0xC, t84
+ 106: STL t82, (t84)
+ 107: INCEIPL $4
+
+ 0x25483EA4: 38630010 addi r3,r3,16
+ 108: GETL R3, t86
+ 109: ADDL $0x10, t86
+ 110: PUTL t86, R3
+ 111: INCEIPL $4
+
+ 0x25483EA8: 40A2FFA4 bc 5,2,0x25483E4C
+ 112: Jc02o $0x25483E4C
+
+
+. 0 25483E4C 96
+. 7D 66 40 30 7D 49 3C 30 7C C0 4B 78 81 64 00 00 90 03 00 00 7D 40 40 30 7D 6A 3C 30 7C 0C 53 78 81 44 00 04 91 83 00 04 7D 6C 40 30 7D 4B 3C 30 7D 86 5B 78 81 64 00 08 90 C3 00 08 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
+
+==== BB 352 (0x25483EAC) approx BBs exec'd 0 ====
+
+ 0x25483EAC: 7D654030 slw r5,r11,r8
+ 0: GETL R11, t2
+ 1: GETL R8, t0
+ 2: SHLL t0, t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25483EB0: 7D483C30 srw r8,r10,r7
+ 5: GETL R10, t6
+ 6: GETL R7, t4
+ 7: SHRL t4, t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x25483EB4: 7CA44378 or r4,r5,r8
+ 10: GETL R5, t8
+ 11: GETL R8, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R4
+ 14: INCEIPL $4
+
+ 0x25483EB8: 38210010 addi r1,r1,16
+ 15: GETL R1, t12
+ 16: ADDL $0x10, t12
+ 17: PUTL t12, R1
+ 18: INCEIPL $4
+
+ 0x25483EBC: 90830000 stw r4,0(r3)
+ 19: GETL R4, t14
+ 20: GETL R3, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25483EC0: 4E800020 blr
+ 23: GETL LR, t18
+ 24: JMPo-r t18 ($4)
+
+
+. 0 25483EAC 24
+. 7D 65 40 30 7D 48 3C 30 7C A4 43 78 38 21 00 10 90 83 00 00 4E 80 00 20
+
+==== BB 353 (0x25483AF4) approx BBs exec'd 0 ====
+
+ 0x25483AF4: 4BFFFF9C b 0x25483A90
+ 0: JMPo $0x25483A90 ($4)
+
+
+. 0 25483AF4 4
+. 4B FF FF 9C
+
+==== BB 354 (0x25474CAC) approx BBs exec'd 0 ====
+
+ 0x25474CAC: 813A0000 lwz r9,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25474CB0: 895C0000 lbz r10,0(r28)
+ 4: GETL R28, t4
+ 5: LDB (t4), t6
+ 6: PUTL t6, R10
+ 7: INCEIPL $4
+
+ 0x25474CB4: 2C890000 cmpi cr1,r9,0
+ 8: GETL R9, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x25474CB8: 6948002F xori r8,r10,0x2F
+ 12: GETL R10, t12
+ 13: XORL $0x2F, t12
+ 14: PUTL t12, R8
+ 15: INCEIPL $4
+
+ 0x25474CBC: 7F8800D0 neg r28,r8
+ 16: GETL R8, t14
+ 17: NEGL t14
+ 18: PUTL t14, R28
+ 19: INCEIPL $4
+
+ 0x25474CC0: 578317BC rlwinm r3,r28,2,30,30
+ 20: GETL R28, t16
+ 21: ROLL $0x2, t16
+ 22: ANDL $0x2, t16
+ 23: PUTL t16, R3
+ 24: INCEIPL $4
+
+ 0x25474CC4: 41860018 bc 12,6,0x25474CDC
+ 25: Js06o $0x25474CDC
+
+
+. 0 25474CAC 28
+. 81 3A 00 00 89 5C 00 00 2C 89 00 00 69 48 00 2F 7F 88 00 D0 57 83 17 BC 41 86 00 18
+
+==== BB 355 (0x25483EE8) approx BBs exec'd 0 ====
+
+ 0x25483EE8: 81640000 lwz r11,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25483EEC: 38A5FFFF addi r5,r5,-1
+ 4: GETL R5, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25483EF0: 81440004 lwz r10,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x25483EF4: 38840008 addi r4,r4,8
+ 13: GETL R4, t10
+ 14: ADDL $0x8, t10
+ 15: PUTL t10, R4
+ 16: INCEIPL $4
+
+ 0x25483EF8: 4BFFFF54 b 0x25483E4C
+ 17: JMPo $0x25483E4C ($4)
+
+
+. 0 25483EE8 20
+. 81 64 00 00 38 A5 FF FF 81 44 00 04 38 84 00 08 4B FF FF 54
+
+==== BB 356 (0x2548039C) approx BBs exec'd 0 ====
+
+ 0x2548039C: 91280000 stw r9,0(r8)
+ 0: GETL R9, t0
+ 1: GETL R8, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x254803A0: 38210010 addi r1,r1,16
+ 4: GETL R1, t4
+ 5: ADDL $0x10, t4
+ 6: PUTL t4, R1
+ 7: INCEIPL $4
+
+ 0x254803A4: 4E800020 blr
+ 8: GETL LR, t6
+ 9: JMPo-r t6 ($4)
+
+
+. 0 2548039C 12
+. 91 28 00 00 38 21 00 10 4E 80 00 20
+
+==== BB 357 (0x25474C00) approx BBs exec'd 0 ====
+
+ 0x25474C00: 839E0150 lwz r28,336(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x150, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x25474C04: 2F940000 cmpi cr7,r20,0
+ 5: GETL R20, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25474C08: 409E01F0 bc 4,30,0x25474DF8
+ 9: Jc30o $0x25474DF8
+
+
+. 0 25474C00 12
+. 83 9E 01 50 2F 94 00 00 40 9E 01 F0
+
+==== BB 358 (0x25474D3C) approx BBs exec'd 0 ====
+
+ 0x25474D3C: 81E10064 lwz r15,100(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x64, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R15
+ 4: INCEIPL $4
+
+ 0x25474D40: 5710103A rlwinm r16,r24,2,0,29
+ 5: GETL R24, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R16
+ 8: INCEIPL $4
+
+ 0x25474D44: 81810018 lwz r12,24(r1)
+ 9: GETL R1, t6
+ 10: ADDL $0x18, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0x25474D48: 7C70B12E stwx r3,r16,r22
+ 14: GETL R22, t10
+ 15: GETL R16, t12
+ 16: ADDL t12, t10
+ 17: GETL R3, t14
+ 18: STL t14, (t10)
+ 19: INCEIPL $4
+
+ 0x25474D4C: 7DE803A6 mtlr r15
+ 20: GETL R15, t16
+ 21: PUTL t16, LR
+ 22: INCEIPL $4
+
+ 0x25474D50: 7EC3B378 or r3,r22,r22
+ 23: GETL R22, t18
+ 24: PUTL t18, R3
+ 25: INCEIPL $4
+
+ 0x25474D54: 81E1001C lwz r15,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R15
+ 30: INCEIPL $4
+
+ 0x25474D58: 82010020 lwz r16,32(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R16
+ 35: INCEIPL $4
+
+ 0x25474D5C: 7D818120 mtcrf 0x18,r12
+ 36: GETL R12, t28
+ 37: ICRFL t28, $0x3, CR
+ 38: ICRFL t28, $0x4, CR
+ 39: INCEIPL $4
+
+ 0x25474D60: 82210024 lwz r17,36(r1)
+ 40: GETL R1, t30
+ 41: ADDL $0x24, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R17
+ 44: INCEIPL $4
+
+ 0x25474D64: 82410028 lwz r18,40(r1)
+ 45: GETL R1, t34
+ 46: ADDL $0x28, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R18
+ 49: INCEIPL $4
+
+ 0x25474D68: 8261002C lwz r19,44(r1)
+ 50: GETL R1, t38
+ 51: ADDL $0x2C, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R19
+ 54: INCEIPL $4
+
+ 0x25474D6C: 82810030 lwz r20,48(r1)
+ 55: GETL R1, t42
+ 56: ADDL $0x30, t42
+ 57: LDL (t42), t44
+ 58: PUTL t44, R20
+ 59: INCEIPL $4
+
+ 0x25474D70: 82A10034 lwz r21,52(r1)
+ 60: GETL R1, t46
+ 61: ADDL $0x34, t46
+ 62: LDL (t46), t48
+ 63: PUTL t48, R21
+ 64: INCEIPL $4
+
+ 0x25474D74: 82C10038 lwz r22,56(r1)
+ 65: GETL R1, t50
+ 66: ADDL $0x38, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R22
+ 69: INCEIPL $4
+
+ 0x25474D78: 82E1003C lwz r23,60(r1)
+ 70: GETL R1, t54
+ 71: ADDL $0x3C, t54
+ 72: LDL (t54), t56
+ 73: PUTL t56, R23
+ 74: INCEIPL $4
+
+ 0x25474D7C: 83010040 lwz r24,64(r1)
+ 75: GETL R1, t58
+ 76: ADDL $0x40, t58
+ 77: LDL (t58), t60
+ 78: PUTL t60, R24
+ 79: INCEIPL $4
+
+ 0x25474D80: 83210044 lwz r25,68(r1)
+ 80: GETL R1, t62
+ 81: ADDL $0x44, t62
+ 82: LDL (t62), t64
+ 83: PUTL t64, R25
+ 84: INCEIPL $4
+
+ 0x25474D84: 83410048 lwz r26,72(r1)
+ 85: GETL R1, t66
+ 86: ADDL $0x48, t66
+ 87: LDL (t66), t68
+ 88: PUTL t68, R26
+ 89: INCEIPL $4
+
+ 0x25474D88: 8361004C lwz r27,76(r1)
+ 90: GETL R1, t70
+ 91: ADDL $0x4C, t70
+ 92: LDL (t70), t72
+ 93: PUTL t72, R27
+ 94: INCEIPL $4
+
+ 0x25474D8C: 83810050 lwz r28,80(r1)
+ 95: GETL R1, t74
+ 96: ADDL $0x50, t74
+ 97: LDL (t74), t76
+ 98: PUTL t76, R28
+ 99: INCEIPL $4
+
+ 0x25474D90: 83A10054 lwz r29,84(r1)
+ 100: GETL R1, t78
+ 101: ADDL $0x54, t78
+ 102: LDL (t78), t80
+ 103: PUTL t80, R29
+ 104: INCEIPL $4
+
+ 0x25474D94: 83C10058 lwz r30,88(r1)
+ 105: GETL R1, t82
+ 106: ADDL $0x58, t82
+ 107: LDL (t82), t84
+ 108: PUTL t84, R30
+ 109: INCEIPL $4
+
+ 0x25474D98: 83E1005C lwz r31,92(r1)
+ 110: GETL R1, t86
+ 111: ADDL $0x5C, t86
+ 112: LDL (t86), t88
+ 113: PUTL t88, R31
+ 114: INCEIPL $4
+
+ 0x25474D9C: 38210060 addi r1,r1,96
+ 115: GETL R1, t90
+ 116: ADDL $0x60, t90
+ 117: PUTL t90, R1
+ 118: INCEIPL $4
+
+ 0x25474DA0: 4E800020 blr
+ 119: GETL LR, t92
+ 120: JMPo-r t92 ($4)
+
+
+. 0 25474D3C 104
+. 81 E1 00 64 57 10 10 3A 81 81 00 18 7C 70 B1 2E 7D E8 03 A6 7E C3 B3 78 81 E1 00 1C 82 01 00 20 7D 81 81 20 82 21 00 24 82 41 00 28 82 61 00 2C 82 81 00 30 82 A1 00 34 82 C1 00 38 82 E1 00 3C 83 01 00 40 83 21 00 44 83 41 00 48 83 61 00 4C 83 81 00 50 83 A1 00 54 83 C1 00 58 83 E1 00 5C 38 21 00 60 4E 80 00 20
+
+==== BB 359 (0x254753B0) approx BBs exec'd 0 ====
+
+ 0x254753B0: 807D0000 lwz r3,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x254753B4: 83830000 lwz r28,0(r3)
+ 4: GETL R3, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R28
+ 7: INCEIPL $4
+
+ 0x254753B8: 2C1C0000 cmpi cr0,r28,0
+ 8: GETL R28, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x254753BC: 41820074 bc 12,2,0x25475430
+ 12: Js02o $0x25475430
+
+
+. 0 254753B0 16
+. 80 7D 00 00 83 83 00 00 2C 1C 00 00 41 82 00 74
+
+==== BB 360 (0x254753C0) approx BBs exec'd 0 ====
+
+ 0x254753C0: 38E00000 li r7,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x254753C4: 90FD0004 stw r7,4(r29)
+ 3: GETL R7, t2
+ 4: GETL R29, t4
+ 5: ADDL $0x4, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x254753C8: 83B701B0 lwz r29,432(r23)
+ 8: GETL R23, t6
+ 9: ADDL $0x1B0, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x254753CC: 93B80060 stw r29,96(r24)
+ 13: GETL R29, t10
+ 14: GETL R24, t12
+ 15: ADDL $0x60, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254753D0: 81410000 lwz r10,0(r1)
+ 18: GETL R1, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R10
+ 21: INCEIPL $4
+
+ 0x254753D4: 82EA0004 lwz r23,4(r10)
+ 22: GETL R10, t18
+ 23: ADDL $0x4, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R23
+ 26: INCEIPL $4
+
+ 0x254753D8: 830AFFE0 lwz r24,-32(r10)
+ 27: GETL R10, t22
+ 28: ADDL $0xFFFFFFE0, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R24
+ 31: INCEIPL $4
+
+ 0x254753DC: 7EE803A6 mtlr r23
+ 32: GETL R23, t26
+ 33: PUTL t26, LR
+ 34: INCEIPL $4
+
+ 0x254753E0: 832AFFE4 lwz r25,-28(r10)
+ 35: GETL R10, t28
+ 36: ADDL $0xFFFFFFE4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R25
+ 39: INCEIPL $4
+
+ 0x254753E4: 82EAFFDC lwz r23,-36(r10)
+ 40: GETL R10, t32
+ 41: ADDL $0xFFFFFFDC, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R23
+ 44: INCEIPL $4
+
+ 0x254753E8: 834AFFE8 lwz r26,-24(r10)
+ 45: GETL R10, t36
+ 46: ADDL $0xFFFFFFE8, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R26
+ 49: INCEIPL $4
+
+ 0x254753EC: 836AFFEC lwz r27,-20(r10)
+ 50: GETL R10, t40
+ 51: ADDL $0xFFFFFFEC, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R27
+ 54: INCEIPL $4
+
+ 0x254753F0: 838AFFF0 lwz r28,-16(r10)
+ 55: GETL R10, t44
+ 56: ADDL $0xFFFFFFF0, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R28
+ 59: INCEIPL $4
+
+ 0x254753F4: 83AAFFF4 lwz r29,-12(r10)
+ 60: GETL R10, t48
+ 61: ADDL $0xFFFFFFF4, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R29
+ 64: INCEIPL $4
+
+ 0x254753F8: 83CAFFF8 lwz r30,-8(r10)
+ 65: GETL R10, t52
+ 66: ADDL $0xFFFFFFF8, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R30
+ 69: INCEIPL $4
+
+ 0x254753FC: 83EAFFFC lwz r31,-4(r10)
+ 70: GETL R10, t56
+ 71: ADDL $0xFFFFFFFC, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R31
+ 74: INCEIPL $4
+
+ 0x25475400: 7D415378 or r1,r10,r10
+ 75: GETL R10, t60
+ 76: PUTL t60, R1
+ 77: INCEIPL $4
+
+ 0x25475404: 4E800020 blr
+ 78: GETL LR, t62
+ 79: JMPo-r t62 ($4)
+
+
+. 0 254753C0 72
+. 38 E0 00 00 90 FD 00 04 83 B7 01 B0 93 B8 00 60 81 41 00 00 82 EA 00 04 83 0A FF E0 7E E8 03 A6 83 2A FF E4 82 EA FF DC 83 4A FF E8 83 6A FF EC 83 8A FF F0 83 AA FF F4 83 CA FF F8 83 EA FF FC 7D 41 53 78 4E 80 00 20
+
+==== BB 361 (0x25472F70) approx BBs exec'd 0 ====
+
+ 0x25472F70: 4BFFF76C b 0x254726DC
+ 0: JMPo $0x254726DC ($4)
+
+
+. 0 25472F70 4
+. 4B FF F7 6C
+
+==== BB 362 (0x254726DC) approx BBs exec'd 0 ====
+
+ 0x254726DC: 80EE01BC lwz r7,444(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1BC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254726E0: 2E070000 cmpi cr4,r7,0
+ 5: GETL R7, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254726E4: 40920010 bc 4,18,0x254726F4
+ 9: Jc18o $0x254726F4
+
+
+. 0 254726DC 12
+. 80 EE 01 BC 2E 07 00 00 40 92 00 10
+
+==== BB 363 (0x254726E8) approx BBs exec'd 0 ====
+
+ 0x254726E8: 83AE01D4 lwz r29,468(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1D4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254726EC: 815D0000 lwz r10,0(r29)
+ 5: GETL R29, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0x254726F0: 914E01BC stw r10,444(r14)
+ 9: GETL R10, t8
+ 10: GETL R14, t10
+ 11: ADDL $0x1BC, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x254726F4: 834F004C lwz r26,76(r15)
+ 14: GETL R15, t12
+ 15: ADDL $0x4C, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R26
+ 18: INCEIPL $4
+
+ 0x254726F8: 3AE00001 li r23,1
+ 19: MOVL $0x1, t16
+ 20: PUTL t16, R23
+ 21: INCEIPL $4
+
+ 0x254726FC: 808E0338 lwz r4,824(r14)
+ 22: GETL R14, t18
+ 23: ADDL $0x338, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R4
+ 26: INCEIPL $4
+
+ 0x25472700: 386E01B8 addi r3,r14,440
+ 27: GETL R14, t22
+ 28: ADDL $0x1B8, t22
+ 29: PUTL t22, R3
+ 30: INCEIPL $4
+
+ 0x25472704: 2C1AFFFE cmpi cr0,r26,-2
+ 31: GETL R26, t24
+ 32: MOVL $0xFFFFFFFE, t28
+ 33: CMPL t24, t28, t26 (-rSo)
+ 34: ICRFL t26, $0x0, CR
+ 35: INCEIPL $4
+
+ 0x25472708: 826E0004 lwz r19,4(r14)
+ 36: GETL R14, t30
+ 37: ADDL $0x4, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R19
+ 40: INCEIPL $4
+
+ 0x2547270C: 816E0198 lwz r11,408(r14)
+ 41: GETL R14, t34
+ 42: ADDL $0x198, t34
+ 43: LDL (t34), t36
+ 44: PUTL t36, R11
+ 45: INCEIPL $4
+
+ 0x25472710: 52E4F002 rlwimi r4,r23,30,0,1
+ 46: GETL R4, t38
+ 47: GETL R23, t40
+ 48: ROLL $0x1E, t40
+ 49: ANDL $0xC0000000, t40
+ 50: ANDL $0x3FFFFFFF, t38
+ 51: ORL t38, t40
+ 52: PUTL t40, R4
+ 53: INCEIPL $4
+
+ 0x25472714: 818E019C lwz r12,412(r14)
+ 54: GETL R14, t42
+ 55: ADDL $0x19C, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R12
+ 58: INCEIPL $4
+
+ 0x25472718: 38B30001 addi r5,r19,1
+ 59: GETL R19, t46
+ 60: ADDL $0x1, t46
+ 61: PUTL t46, R5
+ 62: INCEIPL $4
+
+ 0x2547271C: 908E0338 stw r4,824(r14)
+ 63: GETL R4, t48
+ 64: GETL R14, t50
+ 65: ADDL $0x338, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x25472720: 310C0001 addic r8,r12,1
+ 68: GETL R12, t52
+ 69: ADCL $0x1, t52 (-wCa)
+ 70: PUTL t52, R8
+ 71: INCEIPL $4
+
+ 0x25472724: 7CEB0194 addze r7,r11
+ 72: GETL R11, t54
+ 73: ADCL $0x0, t54 (-rCa-wCa)
+ 74: PUTL t54, R7
+ 75: INCEIPL $4
+
+ 0x25472728: 90AE0004 stw r5,4(r14)
+ 76: GETL R5, t56
+ 77: GETL R14, t58
+ 78: ADDL $0x4, t58
+ 79: STL t56, (t58)
+ 80: INCEIPL $4
+
+ 0x2547272C: 9074000C stw r3,12(r20)
+ 81: GETL R3, t60
+ 82: GETL R20, t62
+ 83: ADDL $0xC, t62
+ 84: STL t60, (t62)
+ 85: INCEIPL $4
+
+ 0x25472730: 90EE0198 stw r7,408(r14)
+ 86: GETL R7, t64
+ 87: GETL R14, t66
+ 88: ADDL $0x198, t66
+ 89: STL t64, (t66)
+ 90: INCEIPL $4
+
+ 0x25472734: 910E019C stw r8,412(r14)
+ 91: GETL R8, t68
+ 92: GETL R14, t70
+ 93: ADDL $0x19C, t70
+ 94: STL t68, (t70)
+ 95: INCEIPL $4
+
+ 0x25472738: 928E01C8 stw r20,456(r14)
+ 96: GETL R20, t72
+ 97: GETL R14, t74
+ 98: ADDL $0x1C8, t74
+ 99: STL t72, (t74)
+ 100: INCEIPL $4
+
+ 0x2547273C: 41820838 bc 12,2,0x25472F74
+ 101: Js02o $0x25472F74
+
+
+. 0 254726E8 88
+. 83 AE 01 D4 81 5D 00 00 91 4E 01 BC 83 4F 00 4C 3A E0 00 01 80 8E 03 38 38 6E 01 B8 2C 1A FF FE 82 6E 00 04 81 6E 01 98 52 E4 F0 02 81 8E 01 9C 38 B3 00 01 90 8E 03 38 31 0C 00 01 7C EB 01 94 90 AE 00 04 90 74 00 0C 90 EE 01 98 91 0E 01 9C 92 8E 01 C8 41 82 08 38
+
+==== BB 364 (0x25472F74) approx BBs exec'd 0 ====
+
+ 0x25472F74: 80140000 lwz r0,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25472F78: 7DE97B78 or r9,r15,r15
+ 4: GETL R15, t4
+ 5: PUTL t4, R9
+ 6: INCEIPL $4
+
+ 0x25472F7C: 2F000000 cmpi cr6,r0,0
+ 7: GETL R0, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x6, CR
+ 10: INCEIPL $4
+
+ 0x25472F80: 3800FFFF li r0,-1
+ 11: MOVL $0xFFFFFFFF, t10
+ 12: PUTL t10, R0
+ 13: INCEIPL $4
+
+ 0x25472F84: 419A0008 bc 12,26,0x25472F8C
+ 14: Js26o $0x25472F8C
+
+
+. 0 25472F74 20
+. 80 14 00 00 7D E9 7B 78 2F 00 00 00 38 00 FF FF 41 9A 00 08
+
+==== BB 365 (0x25472F8C) approx BBs exec'd 0 ====
+
+ 0x25472F8C: 9009004C stw r0,76(r9)
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ADDL $0x4C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25472F90: 4BFFF7B0 b 0x25472740
+ 5: JMPo $0x25472740 ($4)
+
+
+. 0 25472F8C 8
+. 90 09 00 4C 4B FF F7 B0
+
+==== BB 366 (0x25472740) approx BBs exec'd 0 ====
+
+ 0x25472740: 818E0358 lwz r12,856(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x358, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x25472744: A16C002C lhz r11,44(r12)
+ 5: GETL R12, t4
+ 6: ADDL $0x2C, t4
+ 7: LDW (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25472748: 838C001C lwz r28,28(r12)
+ 10: GETL R12, t8
+ 11: ADDL $0x1C, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R28
+ 14: INCEIPL $4
+
+ 0x2547274C: B16E030C sth r11,780(r14)
+ 15: GETL R11, t12
+ 16: GETL R14, t14
+ 17: ADDL $0x30C, t14
+ 18: STW t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25472750: A32C002C lhz r25,44(r12)
+ 20: GETL R12, t16
+ 21: ADDL $0x2C, t16
+ 22: LDW (t16), t18
+ 23: PUTL t18, R25
+ 24: INCEIPL $4
+
+ 0x25472754: 7D6CE214 add r11,r12,r28
+ 25: GETL R12, t20
+ 26: GETL R28, t22
+ 27: ADDL t20, t22
+ 28: PUTL t22, R11
+ 29: INCEIPL $4
+
+ 0x25472758: 916E0304 stw r11,772(r14)
+ 30: GETL R11, t24
+ 31: GETL R14, t26
+ 32: ADDL $0x304, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x2547275C: 2F990000 cmpi cr7,r25,0
+ 35: GETL R25, t28
+ 36: CMP0L t28, t30 (-rSo)
+ 37: ICRFL t30, $0x7, CR
+ 38: INCEIPL $4
+
+ 0x25472760: 3959FFFF addi r10,r25,-1
+ 39: GETL R25, t32
+ 40: ADDL $0xFFFFFFFF, t32
+ 41: PUTL t32, R10
+ 42: INCEIPL $4
+
+ 0x25472764: 419E002C bc 12,30,0x25472790
+ 43: Js30o $0x25472790
+
+
+. 0 25472740 40
+. 81 8E 03 58 A1 6C 00 2C 83 8C 00 1C B1 6E 03 0C A3 2C 00 2C 7D 6C E2 14 91 6E 03 04 2F 99 00 00 39 59 FF FF 41 9E 00 2C
+
+==== BB 367 (0x25472768) approx BBs exec'd 0 ====
+
+ 0x25472768: 3D206474 lis r9,25716
+ 0: MOVL $0x64740000, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x2547276C: 6127E552 ori r7,r9,0xE552
+ 3: MOVL $0x6474E552, t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x25472770: 55582834 rlwinm r24,r10,5,0,26
+ 6: GETL R10, t4
+ 7: SHLL $0x5, t4
+ 8: PUTL t4, R24
+ 9: INCEIPL $4
+
+ 0x25472774: 7F78582E lwzx r27,r24,r11
+ 10: GETL R11, t6
+ 11: GETL R24, t8
+ 12: ADDL t8, t6
+ 13: LDL (t6), t10
+ 14: PUTL t10, R27
+ 15: INCEIPL $4
+
+ 0x25472778: 7D185A14 add r8,r24,r11
+ 16: GETL R24, t12
+ 17: GETL R11, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R8
+ 20: INCEIPL $4
+
+ 0x2547277C: 7C9B3800 cmp cr1,r27,r7
+ 21: GETL R27, t16
+ 22: GETL R7, t18
+ 23: CMPL t16, t18, t20 (-rSo)
+ 24: ICRFL t20, $0x1, CR
+ 25: INCEIPL $4
+
+ 0x25472780: 41860C80 bc 12,6,0x25473400
+ 26: Js06o $0x25473400
+
+
+. 0 25472768 28
+. 3D 20 64 74 61 27 E5 52 55 58 28 34 7F 78 58 2E 7D 18 5A 14 7C 9B 38 00 41 86 0C 80
+
+==== BB 368 (0x25473400) approx BBs exec'd 0 ====
+
+ 0x25473400: 83B10000 lwz r29,0(r17)
+ 0: GETL R17, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R29
+ 3: INCEIPL $4
+
+ 0x25473404: 3B400000 li r26,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R26
+ 6: INCEIPL $4
+
+ 0x25473408: 82C80008 lwz r22,8(r8)
+ 7: GETL R8, t6
+ 8: ADDL $0x8, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R22
+ 11: INCEIPL $4
+
+ 0x2547340C: 3B200000 li r25,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R25
+ 14: INCEIPL $4
+
+ 0x25473410: 2C1D0000 cmpi cr0,r29,0
+ 15: GETL R29, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x25473414: 92CE03EC stw r22,1004(r14)
+ 19: GETL R22, t16
+ 20: GETL R14, t18
+ 21: ADDL $0x3EC, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0x25473418: 80C80014 lwz r6,20(r8)
+ 24: GETL R8, t20
+ 25: ADDL $0x14, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R6
+ 28: INCEIPL $4
+
+ 0x2547341C: 90CE03F0 stw r6,1008(r14)
+ 29: GETL R6, t24
+ 30: GETL R14, t26
+ 31: ADDL $0x3F0, t26
+ 32: STL t24, (t26)
+ 33: INCEIPL $4
+
+ 0x25473420: 4182F384 bc 12,2,0x254727A4
+ 34: Js02o $0x254727A4
+
+
+. 0 25473400 36
+. 83 B1 00 00 3B 40 00 00 82 C8 00 08 3B 20 00 00 2C 1D 00 00 92 CE 03 EC 80 C8 00 14 90 CE 03 F0 41 82 F3 84
+
+==== BB 369 (0x25473424) approx BBs exec'd 0 ====
+
+ 0x25473424: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25473428: 4800FBA9 bl 0x25482FD0
+ 3: MOVL $0x2547342C, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25482FD0 ($4)
+
+
+. 0 25473424 8
+. 7F A3 EB 78 48 00 FB A9
+
+==== BB 370 (0x2547342C) approx BBs exec'd 0 ====
+
+ 0x2547342C: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x25473430: 7C711B78 or r17,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R17
+ 5: INCEIPL $4
+
+ 0x25473434: 3863001F addi r3,r3,31
+ 6: GETL R3, t4
+ 7: ADDL $0x1F, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0x25473438: 546A0036 rlwinm r10,r3,0,0,27
+ 10: GETL R3, t6
+ 11: ANDL $0xFFFFFFF0, t6
+ 12: PUTL t6, R10
+ 13: INCEIPL $4
+
+ 0x2547343C: 80E10000 lwz r7,0(r1)
+ 14: GETL R1, t8
+ 15: LDL (t8), t10
+ 16: PUTL t10, R7
+ 17: INCEIPL $4
+
+ 0x25473440: 7EAA00D0 neg r21,r10
+ 18: GETL R10, t12
+ 19: NEGL t12
+ 20: PUTL t12, R21
+ 21: INCEIPL $4
+
+ 0x25473444: 38B10001 addi r5,r17,1
+ 22: GETL R17, t14
+ 23: ADDL $0x1, t14
+ 24: PUTL t14, R5
+ 25: INCEIPL $4
+
+ 0x25473448: 7CE1A96E stwux r7,r1,r21
+ 26: GETL R21, t16
+ 27: GETL R1, t18
+ 28: ADDL t18, t16
+ 29: PUTL t16, R1
+ 30: GETL R7, t20
+ 31: STL t20, (t16)
+ 32: INCEIPL $4
+
+ 0x2547344C: 39010017 addi r8,r1,23
+ 33: GETL R1, t22
+ 34: ADDL $0x17, t22
+ 35: PUTL t22, R8
+ 36: INCEIPL $4
+
+ 0x25473450: 55030036 rlwinm r3,r8,0,0,27
+ 37: GETL R8, t24
+ 38: ANDL $0xFFFFFFF0, t24
+ 39: PUTL t24, R3
+ 40: INCEIPL $4
+
+ 0x25473454: 4801078D bl 0x25483BE0
+ 41: MOVL $0x25473458, t26
+ 42: PUTL t26, LR
+ 43: JMPo-c $0x25483BE0 ($4)
+
+
+. 0 2547342C 44
+. 7F A4 EB 78 7C 71 1B 78 38 63 00 1F 54 6A 00 36 80 E1 00 00 7E AA 00 D0 38 B1 00 01 7C E1 A9 6E 39 01 00 17 55 03 00 36 48 01 07 8D
+
+==== BB 371 (0x25483CB0) approx BBs exec'd 0 ====
+
+ 0x25483CB0: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25483CB4: 7FA4EB78 or r4,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25483CB8: 5785F0BE rlwinm r5,r28,30,2,31
+ 6: GETL R28, t4
+ 7: SHRL $0x2, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0x25483CBC: 4800015D bl 0x25483E18
+ 10: MOVL $0x25483CC0, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0x25483E18 ($4)
+
+
+. 0 25483CB0 16
+. 7F E3 FB 78 7F A4 EB 78 57 85 F0 BE 48 00 01 5D
+
+==== BB 372 (0x25483EC4) approx BBs exec'd 0 ====
+
+ 0x25483EC4: 81440000 lwz r10,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0x25483EC8: 3863FFFC addi r3,r3,-4
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFFC, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483ECC: 85640004 lwzu r11,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: PUTL t6, R4
+ 11: LDL (t6), t8
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0x25483ED0: 4BFFFF90 b 0x25483E60
+ 14: JMPo $0x25483E60 ($4)
+
+
+. 0 25483EC4 16
+. 81 44 00 00 38 63 FF FC 85 64 00 04 4B FF FF 90
+
+==== BB 373 (0x25483E60) approx BBs exec'd 0 ====
+
+ 0x25483E60: 7D404030 slw r0,r10,r8
+ 0: GETL R10, t2
+ 1: GETL R8, t0
+ 2: SHLL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25483E64: 7D6A3C30 srw r10,r11,r7
+ 5: GETL R11, t6
+ 6: GETL R7, t4
+ 7: SHRL t4, t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x25483E68: 7C0C5378 or r12,r0,r10
+ 10: GETL R0, t8
+ 11: GETL R10, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R12
+ 14: INCEIPL $4
+
+ 0x25483E6C: 81440004 lwz r10,4(r4)
+ 15: GETL R4, t12
+ 16: ADDL $0x4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R10
+ 19: INCEIPL $4
+
+ 0x25483E70: 91830004 stw r12,4(r3)
+ 20: GETL R12, t16
+ 21: GETL R3, t18
+ 22: ADDL $0x4, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25483E74: 7D6C4030 slw r12,r11,r8
+ 25: GETL R11, t22
+ 26: GETL R8, t20
+ 27: SHLL t20, t22
+ 28: PUTL t22, R12
+ 29: INCEIPL $4
+
+ 0x25483E78: 7D4B3C30 srw r11,r10,r7
+ 30: GETL R10, t26
+ 31: GETL R7, t24
+ 32: SHRL t24, t26
+ 33: PUTL t26, R11
+ 34: INCEIPL $4
+
+ 0x25483E7C: 7D865B78 or r6,r12,r11
+ 35: GETL R12, t28
+ 36: GETL R11, t30
+ 37: ORL t30, t28
+ 38: PUTL t28, R6
+ 39: INCEIPL $4
+
+ 0x25483E80: 81640008 lwz r11,8(r4)
+ 40: GETL R4, t32
+ 41: ADDL $0x8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R11
+ 44: INCEIPL $4
+
+ 0x25483E84: 90C30008 stw r6,8(r3)
+ 45: GETL R6, t36
+ 46: GETL R3, t38
+ 47: ADDL $0x8, t38
+ 48: STL t36, (t38)
+ 49: INCEIPL $4
+
+ 0x25483E88: 34A5FFFC addic. r5,r5,-4
+ 50: GETL R5, t40
+ 51: ADCL $0xFFFFFFFC, t40 (-wCa)
+ 52: PUTL t40, R5
+ 53: CMP0L t40, t42 (-rSo)
+ 54: ICRFL t42, $0x0, CR
+ 55: INCEIPL $4
+
+ 0x25483E8C: 7D464030 slw r6,r10,r8
+ 56: GETL R10, t46
+ 57: GETL R8, t44
+ 58: SHLL t44, t46
+ 59: PUTL t46, R6
+ 60: INCEIPL $4
+
+ 0x25483E90: 7D693C30 srw r9,r11,r7
+ 61: GETL R11, t50
+ 62: GETL R7, t48
+ 63: SHRL t48, t50
+ 64: PUTL t50, R9
+ 65: INCEIPL $4
+
+ 0x25483E94: 8144000C lwz r10,12(r4)
+ 66: GETL R4, t52
+ 67: ADDL $0xC, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R10
+ 70: INCEIPL $4
+
+ 0x25483E98: 7CC04B78 or r0,r6,r9
+ 71: GETL R6, t56
+ 72: GETL R9, t58
+ 73: ORL t58, t56
+ 74: PUTL t56, R0
+ 75: INCEIPL $4
+
+ 0x25483E9C: 38840010 addi r4,r4,16
+ 76: GETL R4, t60
+ 77: ADDL $0x10, t60
+ 78: PUTL t60, R4
+ 79: INCEIPL $4
+
+ 0x25483EA0: 9003000C stw r0,12(r3)
+ 80: GETL R0, t62
+ 81: GETL R3, t64
+ 82: ADDL $0xC, t64
+ 83: STL t62, (t64)
+ 84: INCEIPL $4
+
+ 0x25483EA4: 38630010 addi r3,r3,16
+ 85: GETL R3, t66
+ 86: ADDL $0x10, t66
+ 87: PUTL t66, R3
+ 88: INCEIPL $4
+
+ 0x25483EA8: 40A2FFA4 bc 5,2,0x25483E4C
+ 89: Jc02o $0x25483E4C
+
+
+. 0 25483E60 76
+. 7D 40 40 30 7D 6A 3C 30 7C 0C 53 78 81 44 00 04 91 83 00 04 7D 6C 40 30 7D 4B 3C 30 7D 86 5B 78 81 64 00 08 90 C3 00 08 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
+
+==== BB 374 (0x25483CC0) approx BBs exec'd 0 ====
+
+ 0x25483CC0: 4BFFFF98 b 0x25483C58
+ 0: JMPo $0x25483C58 ($4)
+
+
+. 0 25483CC0 4
+. 4B FF FF 98
+
+==== BB 375 (0x25473458) approx BBs exec'd 0 ====
+
+ 0x25473458: 907F0044 stw r3,68(r31)
+ 0: GETL R3, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x44, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547345C: 809E00D0 lwz r4,208(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0xD0, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25473460: 387F0044 addi r3,r31,68
+ 10: GETL R31, t8
+ 11: ADDL $0x44, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0x25473464: 4800CED9 bl 0x2548033C
+ 14: MOVL $0x25473468, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x2548033C ($4)
+
+
+. 0 25473458 16
+. 90 7F 00 44 80 9E 00 D0 38 7F 00 44 48 00 CE D9
+
+==== BB 376 (0x25480398) approx BBs exec'd 0 ====
+
+ 0x25480398: 39200000 li r9,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x2548039C: 91280000 stw r9,0(r8)
+ 3: GETL R9, t2
+ 4: GETL R8, t4
+ 5: STL t2, (t4)
+ 6: INCEIPL $4
+
+ 0x254803A0: 38210010 addi r1,r1,16
+ 7: GETL R1, t6
+ 8: ADDL $0x10, t6
+ 9: PUTL t6, R1
+ 10: INCEIPL $4
+
+ 0x254803A4: 4E800020 blr
+ 11: GETL LR, t8
+ 12: JMPo-r t8 ($4)
+
+
+. 0 25480398 16
+. 39 20 00 00 91 28 00 00 38 21 00 10 4E 80 00 20
+
+==== BB 377 (0x25473468) approx BBs exec'd 0 ====
+
+ 0x25473468: 7C7D1B79 or. r29,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R29
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547346C: 41A2F338 bc 13,2,0x254727A4
+ 5: Js02o $0x254727A4
+
+
+. 0 25473468 8
+. 7C 7D 1B 79 41 A2 F3 38
+
+==== BB 378 (0x25473470) approx BBs exec'd 0 ====
+
+ 0x25473470: 88BD0000 lbz r5,0(r29)
+ 0: GETL R29, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x25473474: 2F050000 cmpi cr6,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x25473478: 41BAFFE4 bc 13,26,0x2547345C
+ 8: Js26o $0x2547345C
+
+
+. 0 25473470 12
+. 88 BD 00 00 2F 05 00 00 41 BA FF E4
+
+==== BB 379 (0x2547347C) approx BBs exec'd 0 ====
+
+ 0x2547347C: 80900000 lwz r4,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25473480: 2F840000 cmpi cr7,r4,0
+ 4: GETL R4, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0x25473484: 409E0774 bc 4,30,0x25473BF8
+ 8: Jc30o $0x25473BF8
+
+
+. 0 2547347C 12
+. 80 90 00 00 2F 84 00 00 40 9E 07 74
+
+==== BB 380 (0x25473488) approx BBs exec'd 0 ====
+
+ 0x25473488: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547348C: 38A00001 li r5,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25473490: 38C00001 li r6,1
+ 6: MOVL $0x1, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x25473494: 38E00000 li r7,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0x25473498: 39000000 li r8,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R8
+ 14: INCEIPL $4
+
+ 0x2547349C: 39200000 li r9,0
+ 15: MOVL $0x0, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x254734A0: 7E83A378 or r3,r20,r20
+ 18: GETL R20, t12
+ 19: PUTL t12, R3
+ 20: INCEIPL $4
+
+ 0x254734A4: 48003845 bl 0x25476CE8
+ 21: MOVL $0x254734A8, t14
+ 22: PUTL t14, LR
+ 23: JMPo-c $0x25476CE8 ($4)
+
+
+. 0 25473488 32
+. 7F A4 EB 78 38 A0 00 01 38 C0 00 01 38 E0 00 00 39 00 00 00 39 20 00 00 7E 83 A3 78 48 00 38 45
+
+==== BB 381 _dl_map_object(0x25476CE8) approx BBs exec'd 0 ====
+
+ 0x25476CE8: 9421FD70 stwu r1,-656(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFD70, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25476CEC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25476CF0: 48020311 bl 0x25497000
+ 9: MOVL $0x25476CF4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25476CE8 12
+. 94 21 FD 70 7C 08 02 A6 48 02 03 11
+
+==== BB 382 (0x25476CF4) approx BBs exec'd 0 ====
+
+ 0x25476CF4: 93C10288 stw r30,648(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x288, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25476CF8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25476CFC: 9261025C stw r19,604(r1)
+ 8: GETL R19, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x25C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25476D00: 92A10264 stw r21,612(r1)
+ 13: GETL R21, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x264, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25476D04: 1E690018 mulli r19,r9,24
+ 18: GETL R9, t14
+ 19: MULL $0x18, t14
+ 20: PUTL t14, R19
+ 21: INCEIPL $4
+
+ 0x25476D08: 90010294 stw r0,660(r1)
+ 22: GETL R0, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x294, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0x25476D0C: 7D800026 mfcr r12
+ 27: GETL CR, t20
+ 28: PUTL t20, R12
+ 29: INCEIPL $4
+
+ 0x25476D10: 82BE04C8 lwz r21,1224(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0x4C8, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R21
+ 34: INCEIPL $4
+
+ 0x25476D14: 93A10284 stw r29,644(r1)
+ 35: GETL R29, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x284, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0x25476D18: 7FB3A82E lwzx r29,r19,r21
+ 40: GETL R21, t30
+ 41: GETL R19, t32
+ 42: ADDL t32, t30
+ 43: LDL (t30), t34
+ 44: PUTL t34, R29
+ 45: INCEIPL $4
+
+ 0x25476D1C: 92010250 stw r16,592(r1)
+ 46: GETL R16, t36
+ 47: GETL R1, t38
+ 48: ADDL $0x250, t38
+ 49: STL t36, (t38)
+ 50: INCEIPL $4
+
+ 0x25476D20: 7CD03378 or r16,r6,r6
+ 51: GETL R6, t40
+ 52: PUTL t40, R16
+ 53: INCEIPL $4
+
+ 0x25476D24: 2F9D0000 cmpi cr7,r29,0
+ 54: GETL R29, t42
+ 55: CMP0L t42, t44 (-rSo)
+ 56: ICRFL t44, $0x7, CR
+ 57: INCEIPL $4
+
+ 0x25476D28: 92210254 stw r17,596(r1)
+ 58: GETL R17, t46
+ 59: GETL R1, t48
+ 60: ADDL $0x254, t48
+ 61: STL t46, (t48)
+ 62: INCEIPL $4
+
+ 0x25476D2C: 92E1026C stw r23,620(r1)
+ 63: GETL R23, t50
+ 64: GETL R1, t52
+ 65: ADDL $0x26C, t52
+ 66: STL t50, (t52)
+ 67: INCEIPL $4
+
+ 0x25476D30: 7CF13B78 or r17,r7,r7
+ 68: GETL R7, t54
+ 69: PUTL t54, R17
+ 70: INCEIPL $4
+
+ 0x25476D34: 93010270 stw r24,624(r1)
+ 71: GETL R24, t56
+ 72: GETL R1, t58
+ 73: ADDL $0x270, t58
+ 74: STL t56, (t58)
+ 75: INCEIPL $4
+
+ 0x25476D38: 7CB72B78 or r23,r5,r5
+ 76: GETL R5, t60
+ 77: PUTL t60, R23
+ 78: INCEIPL $4
+
+ 0x25476D3C: 93210274 stw r25,628(r1)
+ 79: GETL R25, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x274, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x25476D40: 7D184378 or r24,r8,r8
+ 84: GETL R8, t66
+ 85: PUTL t66, R24
+ 86: INCEIPL $4
+
+ 0x25476D44: 9361027C stw r27,636(r1)
+ 87: GETL R27, t68
+ 88: GETL R1, t70
+ 89: ADDL $0x27C, t70
+ 90: STL t68, (t70)
+ 91: INCEIPL $4
+
+ 0x25476D48: 7D394B78 or r25,r9,r9
+ 92: GETL R9, t72
+ 93: PUTL t72, R25
+ 94: INCEIPL $4
+
+ 0x25476D4C: 93E1028C stw r31,652(r1)
+ 95: GETL R31, t74
+ 96: GETL R1, t76
+ 97: ADDL $0x28C, t76
+ 98: STL t74, (t76)
+ 99: INCEIPL $4
+
+ 0x25476D50: 7C7B1B78 or r27,r3,r3
+ 100: GETL R3, t78
+ 101: PUTL t78, R27
+ 102: INCEIPL $4
+
+ 0x25476D54: 91C10248 stw r14,584(r1)
+ 103: GETL R14, t80
+ 104: GETL R1, t82
+ 105: ADDL $0x248, t82
+ 106: STL t80, (t82)
+ 107: INCEIPL $4
+
+ 0x25476D58: 7C9F2378 or r31,r4,r4
+ 108: GETL R4, t84
+ 109: PUTL t84, R31
+ 110: INCEIPL $4
+
+ 0x25476D5C: 91E1024C stw r15,588(r1)
+ 111: GETL R15, t86
+ 112: GETL R1, t88
+ 113: ADDL $0x24C, t88
+ 114: STL t86, (t88)
+ 115: INCEIPL $4
+
+ 0x25476D60: 92410258 stw r18,600(r1)
+ 116: GETL R18, t90
+ 117: GETL R1, t92
+ 118: ADDL $0x258, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0x25476D64: 92810260 stw r20,608(r1)
+ 121: GETL R20, t94
+ 122: GETL R1, t96
+ 123: ADDL $0x260, t96
+ 124: STL t94, (t96)
+ 125: INCEIPL $4
+
+ 0x25476D68: 92C10268 stw r22,616(r1)
+ 126: GETL R22, t98
+ 127: GETL R1, t100
+ 128: ADDL $0x268, t100
+ 129: STL t98, (t100)
+ 130: INCEIPL $4
+
+ 0x25476D6C: 93410278 stw r26,632(r1)
+ 131: GETL R26, t102
+ 132: GETL R1, t104
+ 133: ADDL $0x278, t104
+ 134: STL t102, (t104)
+ 135: INCEIPL $4
+
+ 0x25476D70: 93810280 stw r28,640(r1)
+ 136: GETL R28, t106
+ 137: GETL R1, t108
+ 138: ADDL $0x280, t108
+ 139: STL t106, (t108)
+ 140: INCEIPL $4
+
+ 0x25476D74: 91810244 stw r12,580(r1)
+ 141: GETL R12, t110
+ 142: GETL R1, t112
+ 143: ADDL $0x244, t112
+ 144: STL t110, (t112)
+ 145: INCEIPL $4
+
+ 0x25476D78: 419E0040 bc 12,30,0x25476DB8
+ 146: Js30o $0x25476DB8
+
+
+. 0 25476CF4 136
+. 93 C1 02 88 7F C8 02 A6 92 61 02 5C 92 A1 02 64 1E 69 00 18 90 01 02 94 7D 80 00 26 82 BE 04 C8 93 A1 02 84 7F B3 A8 2E 92 01 02 50 7C D0 33 78 2F 9D 00 00 92 21 02 54 92 E1 02 6C 7C F1 3B 78 93 01 02 70 7C B7 2B 78 93 21 02 74 7D 18 43 78 93 61 02 7C 7D 39 4B 78 93 E1 02 8C 7C 7B 1B 78 91 C1 02 48 7C 9F 23 78 91 E1 02 4C 92 41 02 58 92 81 02 60 92 C1 02 68 93 41 02 78 93 81 02 80 91 81 02 44 41 9E 00 40
+
+==== BB 383 (0x25476D7C) approx BBs exec'd 0 ====
+
+ 0x25476D7C: 3AC00000 li r22,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R22
+ 2: INCEIPL $4
+
+ 0x25476D80: 80BD0180 lwz r5,384(r29)
+ 3: GETL R29, t2
+ 4: ADDL $0x180, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25476D84: 7FA4EB78 or r4,r29,r29
+ 8: GETL R29, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x25476D88: 7FE3FB78 or r3,r31,r31
+ 11: GETL R31, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0x25476D8C: 74A90040 andis. r9,r5,0x40
+ 14: GETL R5, t10
+ 15: ANDL $0x400000, t10
+ 16: PUTL t10, R9
+ 17: CMP0L t10, t12 (-rSo)
+ 18: ICRFL t12, $0x0, CR
+ 19: INCEIPL $4
+
+ 0x25476D90: 4082001C bc 4,2,0x25476DAC
+ 20: Jc02o $0x25476DAC
+
+
+. 0 25476D7C 24
+. 3A C0 00 00 80 BD 01 80 7F A4 EB 78 7F E3 FB 78 74 A9 00 40 40 82 00 1C
+
+==== BB 384 (0x25476D94) approx BBs exec'd 0 ====
+
+ 0x25476D94: 48005941 bl 0x2547C6D4
+ 0: MOVL $0x25476D98, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547C6D4 ($4)
+
+
+. 0 25476D94 4
+. 48 00 59 41
+
+==== BB 385 _dl_name_match_p(0x2547C6D4) approx BBs exec'd 0 ====
+
+ 0x2547C6D4: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x2547C6D8: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547C6DC: 93E1001C stw r31,28(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547C6E0: 7C9F2378 or r31,r4,r4
+ 14: GETL R4, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0x2547C6E4: 93A10014 stw r29,20(r1)
+ 17: GETL R29, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0x2547C6E8: 7C7D1B78 or r29,r3,r3
+ 22: GETL R3, t16
+ 23: PUTL t16, R29
+ 24: INCEIPL $4
+
+ 0x2547C6EC: 90010024 stw r0,36(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x24, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0x2547C6F0: 80840004 lwz r4,4(r4)
+ 30: GETL R4, t22
+ 31: ADDL $0x4, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R4
+ 34: INCEIPL $4
+
+ 0x2547C6F4: 93C10018 stw r30,24(r1)
+ 35: GETL R30, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x18, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0x2547C6F8: 480067E9 bl 0x25482EE0
+ 40: MOVL $0x2547C6FC, t30
+ 41: PUTL t30, LR
+ 42: JMPo-c $0x25482EE0 ($4)
+
+
+. 0 2547C6D4 40
+. 7C 08 02 A6 94 21 FF E0 93 E1 00 1C 7C 9F 23 78 93 A1 00 14 7C 7D 1B 78 90 01 00 24 80 84 00 04 93 C1 00 18 48 00 67 E9
+
+==== BB 386 strcmp(0x25482EE0) approx BBs exec'd 0 ====
+
+ 0x25482EE0: 7C801B78 or r0,r4,r3
+ 0: GETL R4, t0
+ 1: GETL R3, t2
+ 2: ORL t2, t0
+ 3: PUTL t0, R0
+ 4: INCEIPL $4
+
+ 0x25482EE4: 540007BF rlwinm. r0,r0,0,30,31
+ 5: GETL R0, t4
+ 6: ANDL $0x3, t4
+ 7: PUTL t4, R0
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25482EE8: 3CE0FEFF lis r7,-257
+ 11: MOVL $0xFEFF0000, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0x25482EEC: 40820094 bc 4,2,0x25482F80
+ 14: Jc02o $0x25482F80
+
+
+. 0 25482EE0 16
+. 7C 80 1B 78 54 00 07 BF 3C E0 FE FF 40 82 00 94
+
+==== BB 387 (0x25482EF0) approx BBs exec'd 0 ====
+
+ 0x25482EF0: 80A30000 lwz r5,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x25482EF4: 80C40000 lwz r6,0(r4)
+ 4: GETL R4, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R6
+ 7: INCEIPL $4
+
+ 0x25482EF8: 3D007F7F lis r8,32639
+ 8: MOVL $0x7F7F0000, t8
+ 9: PUTL t8, R8
+ 10: INCEIPL $4
+
+ 0x25482EFC: 38E7FEFF addi r7,r7,-257
+ 11: GETL R7, t10
+ 12: ADDL $0xFFFFFEFF, t10
+ 13: PUTL t10, R7
+ 14: INCEIPL $4
+
+ 0x25482F00: 39087F7F addi r8,r8,32639
+ 15: MOVL $0x7F7F7F7F, t12
+ 16: PUTL t12, R8
+ 17: INCEIPL $4
+
+ 0x25482F04: 48000010 b 0x25482F14
+ 18: JMPo $0x25482F14 ($4)
+
+
+. 0 25482EF0 24
+. 80 A3 00 00 80 C4 00 00 3D 00 7F 7F 38 E7 FE FF 39 08 7F 7F 48 00 00 10
+
+==== BB 388 (0x25482F14) approx BBs exec'd 0 ====
+
+ 0x25482F14: 7C072A14 add r0,r7,r5
+ 0: GETL R7, t0
+ 1: GETL R5, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25482F18: 7D0928F8 nor r9,r8,r5
+ 5: GETL R8, t4
+ 6: GETL R5, t6
+ 7: ORL t6, t4
+ 8: NOTL t4
+ 9: PUTL t4, R9
+ 10: INCEIPL $4
+
+ 0x25482F1C: 7C004839 and. r0,r0,r9
+ 11: GETL R0, t8
+ 12: GETL R9, t10
+ 13: ANDL t8, t10
+ 14: PUTL t10, R0
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x0, CR
+ 17: INCEIPL $4
+
+ 0x25482F20: 7C853000 cmp cr1,r5,r6
+ 18: GETL R5, t14
+ 19: GETL R6, t16
+ 20: CMPL t14, t16, t18 (-rSo)
+ 21: ICRFL t18, $0x1, CR
+ 22: INCEIPL $4
+
+ 0x25482F24: 4182FFE4 bc 12,2,0x25482F08
+ 23: Js02o $0x25482F08
+
+
+. 0 25482F14 20
+. 7C 07 2A 14 7D 09 28 F8 7C 00 48 39 7C 85 30 00 41 82 FF E4
+
+==== BB 389 (0x25482F08) approx BBs exec'd 0 ====
+
+ 0x25482F08: 84A30004 lwzu r5,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R3
+ 3: LDL (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25482F0C: 40860054 bc 4,6,0x25482F60
+ 6: Jc06o $0x25482F60
+
+
+. 0 25482F08 8
+. 84 A3 00 04 40 86 00 54
+
+==== BB 390 (0x25482F60) approx BBs exec'd 0 ====
+
+ 0x25482F60: 80A3FFFC lwz r5,-4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25482F64: 7CAA3279 xor. r10,r5,r6
+ 5: GETL R5, t4
+ 6: GETL R6, t6
+ 7: XORL t4, t6
+ 8: PUTL t6, R10
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25482F68: 7C662850 subf r3,r6,r5
+ 12: GETL R6, t10
+ 13: GETL R5, t12
+ 14: SUBL t10, t12
+ 15: PUTL t12, R3
+ 16: INCEIPL $4
+
+ 0x25482F6C: 4CA00020 bclr 5,0
+ 17: GETL LR, t14
+ 18: Jc00o-r t14
+
+
+. 0 25482F60 16
+. 80 A3 FF FC 7C AA 32 79 7C 66 28 50 4C A0 00 20
+
+==== BB 391 (0x2547C6FC) approx BBs exec'd 0 ====
+
+ 0x2547C6FC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547C700: 38600001 li r3,1
+ 4: MOVL $0x1, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x2547C704: 419E0030 bc 12,30,0x2547C734
+ 7: Js30o $0x2547C734
+
+
+. 0 2547C6FC 12
+. 2F 83 00 00 38 60 00 01 41 9E 00 30
+
+==== BB 392 (0x2547C708) approx BBs exec'd 0 ====
+
+ 0x2547C708: 83FF001C lwz r31,28(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x2547C70C: 4800001C b 0x2547C728
+ 5: JMPo $0x2547C728 ($4)
+
+
+. 0 2547C708 8
+. 83 FF 00 1C 48 00 00 1C
+
+==== BB 393 (0x2547C728) approx BBs exec'd 0 ====
+
+ 0x2547C728: 2C1F0000 cmpi cr0,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x2547C72C: 4082FFE4 bc 4,2,0x2547C710
+ 4: Jc02o $0x2547C710
+
+
+. 0 2547C728 8
+. 2C 1F 00 00 40 82 FF E4
+
+==== BB 394 (0x2547C710) approx BBs exec'd 0 ====
+
+ 0x2547C710: 809F0000 lwz r4,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x2547C714: 7FA3EB78 or r3,r29,r29
+ 4: GETL R29, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x2547C718: 480067C9 bl 0x25482EE0
+ 7: MOVL $0x2547C71C, t6
+ 8: PUTL t6, LR
+ 9: JMPo-c $0x25482EE0 ($4)
+
+
+. 0 2547C710 12
+. 80 9F 00 00 7F A3 EB 78 48 00 67 C9
+
+==== BB 395 (0x2547C71C) approx BBs exec'd 0 ====
+
+ 0x2547C71C: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547C720: 41860030 bc 12,6,0x2547C750
+ 4: Js06o $0x2547C750
+
+
+. 0 2547C71C 8
+. 2C 83 00 00 41 86 00 30
+
+==== BB 396 (0x2547C724) approx BBs exec'd 0 ====
+
+ 0x2547C724: 83FF0004 lwz r31,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x2547C728: 2C1F0000 cmpi cr0,r31,0
+ 5: GETL R31, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547C72C: 4082FFE4 bc 4,2,0x2547C710
+ 9: Jc02o $0x2547C710
+
+
+. 0 2547C724 12
+. 83 FF 00 04 2C 1F 00 00 40 82 FF E4
+
+==== BB 397 (0x2547C730) approx BBs exec'd 0 ====
+
+ 0x2547C730: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547C734: 80810024 lwz r4,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x2547C738: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x2547C73C: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0x2547C740: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547C744: 83E1001C lwz r31,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0x2547C748: 38210020 addi r1,r1,32
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0x2547C74C: 4E800020 blr
+ 30: GETL LR, t22
+ 31: JMPo-r t22 ($4)
+
+
+. 0 2547C730 32
+. 38 60 00 00 80 81 00 24 83 A1 00 14 83 C1 00 18 7C 88 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 398 (0x25476D98) approx BBs exec'd 0 ====
+
+ 0x25476D98: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x25476D9C: 408601B8 bc 4,6,0x25476F54
+ 4: Jc06o $0x25476F54
+
+
+. 0 25476D98 8
+. 2C 83 00 00 40 86 01 B8
+
+==== BB 399 (0x25476DA0) approx BBs exec'd 0 ====
+
+ 0x25476DA0: 807D0180 lwz r3,384(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25476DA4: 74690080 andis. r9,r3,0x80
+ 5: GETL R3, t4
+ 6: ANDL $0x800000, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25476DA8: 418200F8 bc 12,2,0x25476EA0
+ 11: Js02o $0x25476EA0
+
+
+. 0 25476DA0 12
+. 80 7D 01 80 74 69 00 80 41 82 00 F8
+
+==== BB 400 (0x25476EA0) approx BBs exec'd 0 ====
+
+ 0x25476EA0: 817D0058 lwz r11,88(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x58, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25476EA4: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25476EA8: 2D8B0000 cmpi cr3,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x3, CR
+ 11: INCEIPL $4
+
+ 0x25476EAC: 41AEFF00 bc 13,14,0x25476DAC
+ 12: Js14o $0x25476DAC
+
+
+. 0 25476EA0 16
+. 81 7D 00 58 7F E3 FB 78 2D 8B 00 00 41 AE FF 00
+
+==== BB 401 (0x25476DAC) approx BBs exec'd 0 ====
+
+ 0x25476DAC: 83BD000C lwz r29,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25476DB0: 2C9D0000 cmpi cr1,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25476DB4: 4086FFCC bc 4,6,0x25476D80
+ 9: Jc06o $0x25476D80
+
+
+. 0 25476DAC 12
+. 83 BD 00 0C 2C 9D 00 00 40 86 FF CC
+
+==== BB 402 (0x25476D80) approx BBs exec'd 0 ====
+
+ 0x25476D80: 80BD0180 lwz r5,384(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25476D84: 7FA4EB78 or r4,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25476D88: 7FE3FB78 or r3,r31,r31
+ 8: GETL R31, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x25476D8C: 74A90040 andis. r9,r5,0x40
+ 11: GETL R5, t8
+ 12: ANDL $0x400000, t8
+ 13: PUTL t8, R9
+ 14: CMP0L t8, t10 (-rSo)
+ 15: ICRFL t10, $0x0, CR
+ 16: INCEIPL $4
+
+ 0x25476D90: 4082001C bc 4,2,0x25476DAC
+ 17: Jc02o $0x25476DAC
+
+
+. 0 25476D80 20
+. 80 BD 01 80 7F A4 EB 78 7F E3 FB 78 74 A9 00 40 40 82 00 1C
+
+==== BB 403 (0x25476EB0) approx BBs exec'd 0 ====
+
+ 0x25476EB0: 813D0034 lwz r9,52(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25476EB4: 816B0004 lwz r11,4(r11)
+ 5: GETL R11, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25476EB8: 80890004 lwz r4,4(r9)
+ 10: GETL R9, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0x25476EBC: 7F845A14 add r28,r4,r11
+ 15: GETL R4, t12
+ 16: GETL R11, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R28
+ 19: INCEIPL $4
+
+ 0x25476EC0: 7F84E378 or r4,r28,r28
+ 20: GETL R28, t16
+ 21: PUTL t16, R4
+ 22: INCEIPL $4
+
+ 0x25476EC4: 4800C01D bl 0x25482EE0
+ 23: MOVL $0x25476EC8, t18
+ 24: PUTL t18, LR
+ 25: JMPo-c $0x25482EE0 ($4)
+
+
+. 0 25476EB0 24
+. 81 3D 00 34 81 6B 00 04 80 89 00 04 7F 84 5A 14 7F 84 E3 78 48 00 C0 1D
+
+==== BB 404 (0x25482F80) approx BBs exec'd 0 ====
+
+ 0x25482F80: 88A30000 lbz r5,0(r3)
+ 0: GETL R3, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x25482F84: 88C40000 lbz r6,0(r4)
+ 4: GETL R4, t4
+ 5: LDB (t4), t6
+ 6: PUTL t6, R6
+ 7: INCEIPL $4
+
+ 0x25482F88: 48000010 b 0x25482F98
+ 8: JMPo $0x25482F98 ($4)
+
+
+. 0 25482F80 12
+. 88 A3 00 00 88 C4 00 00 48 00 00 10
+
+==== BB 405 (0x25482F98) approx BBs exec'd 0 ====
+
+ 0x25482F98: 2C850000 cmpi cr1,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x25482F9C: 41860020 bc 12,6,0x25482FBC
+ 4: Js06o $0x25482FBC
+
+
+. 0 25482F98 8
+. 2C 85 00 00 41 86 00 20
+
+==== BB 406 (0x25482FA0) approx BBs exec'd 0 ====
+
+ 0x25482FA0: 7C053000 cmp cr0,r5,r6
+ 0: GETL R5, t0
+ 1: GETL R6, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25482FA4: 40820018 bc 4,2,0x25482FBC
+ 5: Jc02o $0x25482FBC
+
+
+. 0 25482FA0 8
+. 7C 05 30 00 40 82 00 18
+
+==== BB 407 (0x25482FBC) approx BBs exec'd 0 ====
+
+ 0x25482FBC: 7C662850 subf r3,r6,r5
+ 0: GETL R6, t0
+ 1: GETL R5, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25482FC0: 4E800020 blr
+ 5: GETL LR, t4
+ 6: JMPo-r t4 ($4)
+
+
+. 0 25482FBC 8
+. 7C 66 28 50 4E 80 00 20
+
+==== BB 408 (0x25476EC8) approx BBs exec'd 0 ====
+
+ 0x25476EC8: 2E030000 cmpi cr4,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25476ECC: 4092FEE0 bc 4,18,0x25476DAC
+ 4: Jc18o $0x25476DAC
+
+
+. 0 25476EC8 8
+. 2E 03 00 00 40 92 FE E0
+
+==== BB 409 (0x25476DB8) approx BBs exec'd 0 ====
+
+ 0x25476DB8: 829E04F4 lwz r20,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R20
+ 4: INCEIPL $4
+
+ 0x25476DBC: 2D9B0000 cmpi cr3,r27,0
+ 5: GETL R27, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x3, CR
+ 8: INCEIPL $4
+
+ 0x25476DC0: 81540000 lwz r10,0(r20)
+ 9: GETL R20, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R10
+ 12: INCEIPL $4
+
+ 0x25476DC4: 71490040 andi. r9,r10,0x40
+ 13: GETL R10, t12
+ 14: ANDL $0x40, t12
+ 15: PUTL t12, R9
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x25476DC8: 40820390 bc 4,2,0x25477158
+ 19: Jc02o $0x25477158
+
+
+. 0 25476DB8 20
+. 82 9E 04 F4 2D 9B 00 00 81 54 00 00 71 49 00 40 40 82 03 90
+
+==== BB 410 (0x25476DCC) approx BBs exec'd 0 ====
+
+ 0x25476DCC: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476DD0: 3880002F li r4,47
+ 3: MOVL $0x2F, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25476DD4: 4800C02D bl 0x25482E00
+ 6: MOVL $0x25476DD8, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25482E00 ($4)
+
+
+. 0 25476DCC 12
+. 7F E3 FB 78 38 80 00 2F 48 00 C0 2D
+
+==== BB 411 (0x25482EB4) approx BBs exec'd 0 ====
+
+ 0x25482EB4: 7CE06038 and r0,r7,r12
+ 0: GETL R7, t0
+ 1: GETL R12, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25482EB8: 7CEA6378 or r10,r7,r12
+ 5: GETL R7, t4
+ 6: GETL R12, t6
+ 7: ORL t6, t4
+ 8: PUTL t4, R10
+ 9: INCEIPL $4
+
+ 0x25482EBC: 7C003A14 add r0,r0,r7
+ 10: GETL R0, t8
+ 11: GETL R7, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0x25482EC0: 7D4900F8 nor r9,r10,r0
+ 15: GETL R10, t12
+ 16: GETL R0, t14
+ 17: ORL t14, t12
+ 18: NOTL t12
+ 19: PUTL t12, R9
+ 20: INCEIPL $4
+
+ 0x25482EC4: 7D240034 cntlzw r4,r9
+ 21: GETL R9, t16
+ 22: CNTLZL t16
+ 23: PUTL t16, R4
+ 24: INCEIPL $4
+
+ 0x25482EC8: 3908FFFC addi r8,r8,-4
+ 25: GETL R8, t18
+ 26: ADDL $0xFFFFFFFC, t18
+ 27: PUTL t18, R8
+ 28: INCEIPL $4
+
+ 0x25482ECC: 5484E8FE rlwinm r4,r4,29,3,31
+ 29: GETL R4, t20
+ 30: SHRL $0x3, t20
+ 31: PUTL t20, R4
+ 32: INCEIPL $4
+
+ 0x25482ED0: 7C682214 add r3,r8,r4
+ 33: GETL R8, t22
+ 34: GETL R4, t24
+ 35: ADDL t22, t24
+ 36: PUTL t24, R3
+ 37: INCEIPL $4
+
+ 0x25482ED4: 4E800020 blr
+ 38: GETL LR, t26
+ 39: JMPo-r t26 ($4)
+
+
+. 0 25482EB4 36
+. 7C E0 60 38 7C EA 63 78 7C 00 3A 14 7D 49 00 F8 7D 24 00 34 39 08 FF FC 54 84 E8 FE 7C 68 22 14 4E 80 00 20
+
+==== BB 412 (0x25476DD8) approx BBs exec'd 0 ====
+
+ 0x25476DD8: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25476DDC: 419A0290 bc 12,26,0x2547706C
+ 4: Js26o $0x2547706C
+
+
+. 0 25476DD8 8
+. 2F 03 00 00 41 9A 02 90
+
+==== BB 413 (0x25476DE0) approx BBs exec'd 0 ====
+
+ 0x25476DE0: 418E01D8 bc 12,14,0x25476FB8
+ 0: Js14o $0x25476FB8
+
+
+. 0 25476DE0 4
+. 41 8E 01 D8
+
+==== BB 414 (0x25476DE4) approx BBs exec'd 0 ====
+
+ 0x25476DE4: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476DE8: 7FE4FB78 or r4,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25476DEC: 4BFFD941 bl 0x2547472C
+ 6: MOVL $0x25476DF0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x2547472C ($4)
+
+
+. 0 25476DE4 12
+. 7F 63 DB 78 7F E4 FB 78 4B FF D9 41
+
+==== BB 415 expand_dynamic_string_token(0x2547472C) approx BBs exec'd 0 ====
+
+ 0x2547472C: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25474730: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25474734: 480228CD bl 0x25497000
+ 9: MOVL $0x25474738, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547472C 12
+. 94 21 FF D0 7C 08 02 A6 48 02 28 CD
+
+==== BB 416 (0x25474738) approx BBs exec'd 0 ====
+
+ 0x25474738: 7D800026 mfcr r12
+ 0: GETL CR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0x2547473C: 93C10028 stw r30,40(r1)
+ 3: GETL R30, t2
+ 4: GETL R1, t4
+ 5: ADDL $0x28, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x25474740: 7FC802A6 mflr r30
+ 8: GETL LR, t6
+ 9: PUTL t6, R30
+ 10: INCEIPL $4
+
+ 0x25474744: 93A10024 stw r29,36(r1)
+ 11: GETL R29, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x24, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25474748: 7C9D2378 or r29,r4,r4
+ 16: GETL R4, t12
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0x2547474C: 93410018 stw r26,24(r1)
+ 19: GETL R26, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x18, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x25474750: 38800024 li r4,36
+ 24: MOVL $0x24, t18
+ 25: PUTL t18, R4
+ 26: INCEIPL $4
+
+ 0x25474754: 93810020 stw r28,32(r1)
+ 27: GETL R28, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0x25474758: 7C7C1B78 or r28,r3,r3
+ 32: GETL R3, t24
+ 33: PUTL t24, R28
+ 34: INCEIPL $4
+
+ 0x2547475C: 92E1000C stw r23,12(r1)
+ 35: GETL R23, t26
+ 36: GETL R1, t28
+ 37: ADDL $0xC, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0x25474760: 7FA3EB78 or r3,r29,r29
+ 40: GETL R29, t30
+ 41: PUTL t30, R3
+ 42: INCEIPL $4
+
+ 0x25474764: 93010010 stw r24,16(r1)
+ 43: GETL R24, t32
+ 44: GETL R1, t34
+ 45: ADDL $0x10, t34
+ 46: STL t32, (t34)
+ 47: INCEIPL $4
+
+ 0x25474768: 93210014 stw r25,20(r1)
+ 48: GETL R25, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x14, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x2547476C: 9361001C stw r27,28(r1)
+ 53: GETL R27, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x1C, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x25474770: 93E1002C stw r31,44(r1)
+ 58: GETL R31, t44
+ 59: GETL R1, t46
+ 60: ADDL $0x2C, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x25474774: 90010034 stw r0,52(r1)
+ 63: GETL R0, t48
+ 64: GETL R1, t50
+ 65: ADDL $0x34, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x25474778: 91810008 stw r12,8(r1)
+ 68: GETL R12, t52
+ 69: GETL R1, t54
+ 70: ADDL $0x8, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0x2547477C: 4800E685 bl 0x25482E00
+ 73: MOVL $0x25474780, t56
+ 74: PUTL t56, LR
+ 75: JMPo-c $0x25482E00 ($4)
+
+
+. 0 25474738 72
+. 7D 80 00 26 93 C1 00 28 7F C8 02 A6 93 A1 00 24 7C 9D 23 78 93 41 00 18 38 80 00 24 93 81 00 20 7C 7C 1B 78 92 E1 00 0C 7F A3 EB 78 93 01 00 10 93 21 00 14 93 61 00 1C 93 E1 00 2C 90 01 00 34 91 81 00 08 48 00 E6 85
+
+==== BB 417 (0x25474780) approx BBs exec'd 0 ====
+
+ 0x25474780: 7C7A1B79 or. r26,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R26
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25474784: 40820074 bc 4,2,0x254747F8
+ 5: Jc02o $0x254747F8
+
+
+. 0 25474780 8
+. 7C 7A 1B 79 40 82 00 74
+
+==== BB 418 (0x25474788) approx BBs exec'd 0 ====
+
+ 0x25474788: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547478C: 4800E845 bl 0x25482FD0
+ 3: MOVL $0x25474790, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25482FD0 ($4)
+
+
+. 0 25474788 8
+. 7F A3 EB 78 48 00 E8 45
+
+==== BB 419 (0x25474790) approx BBs exec'd 0 ====
+
+ 0x25474790: 3BE30001 addi r31,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0x25474794: 7FE3FB78 or r3,r31,r31
+ 4: GETL R31, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0x25474798: 4802328D bl 0x25497A24
+ 7: MOVL $0x2547479C, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0x25497A24 ($4)
+
+
+. 0 25474790 12
+. 3B E3 00 01 7F E3 FB 78 48 02 32 8D
+
+==== BB 420 (0x2547479C) approx BBs exec'd 0 ====
+
+ 0x2547479C: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254747A0: 2C030000 cmpi cr0,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0x254747A4: 41820014 bc 12,2,0x254747B8
+ 7: Js02o $0x254747B8
+
+
+. 0 2547479C 12
+. 38 00 00 00 2C 03 00 00 41 82 00 14
+
+==== BB 421 (0x254747A8) approx BBs exec'd 0 ====
+
+ 0x254747A8: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254747AC: 7FE5FB78 or r5,r31,r31
+ 3: GETL R31, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x254747B0: 4800F431 bl 0x25483BE0
+ 6: MOVL $0x254747B4, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25483BE0 ($4)
+
+
+. 0 254747A8 12
+. 7F A4 EB 78 7F E5 FB 78 48 00 F4 31
+
+==== BB 422 (0x25483D6C) approx BBs exec'd 0 ====
+
+ 0x25483D6C: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25483D70: 3863FFFC addi r3,r3,-4
+ 4: GETL R3, t4
+ 5: ADDL $0xFFFFFFFC, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25483D74: 81240004 lwz r9,4(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0x25483D78: 90030004 stw r0,4(r3)
+ 13: GETL R0, t10
+ 14: GETL R3, t12
+ 15: ADDL $0x4, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25483D7C: 4BFFFFA0 b 0x25483D1C
+ 18: JMPo $0x25483D1C ($4)
+
+
+. 0 25483D6C 20
+. 80 04 00 00 38 63 FF FC 81 24 00 04 90 03 00 04 4B FF FF A0
+
+==== BB 423 (0x25483D1C) approx BBs exec'd 0 ====
+
+ 0x25483D1C: 80040008 lwz r0,8(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25483D20: 91230008 stw r9,8(r3)
+ 5: GETL R9, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25483D24: 8124000C lwz r9,12(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x25483D28: 9003000C stw r0,12(r3)
+ 15: GETL R0, t12
+ 16: GETL R3, t14
+ 17: ADDL $0xC, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25483D2C: 80040010 lwz r0,16(r4)
+ 20: GETL R4, t16
+ 21: ADDL $0x10, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R0
+ 24: INCEIPL $4
+
+ 0x25483D30: 91230010 stw r9,16(r3)
+ 25: GETL R9, t20
+ 26: GETL R3, t22
+ 27: ADDL $0x10, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0x25483D34: 81240014 lwz r9,20(r4)
+ 30: GETL R4, t24
+ 31: ADDL $0x14, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R9
+ 34: INCEIPL $4
+
+ 0x25483D38: 90030014 stw r0,20(r3)
+ 35: GETL R0, t28
+ 36: GETL R3, t30
+ 37: ADDL $0x14, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x25483D3C: 80040018 lwz r0,24(r4)
+ 40: GETL R4, t32
+ 41: ADDL $0x18, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R0
+ 44: INCEIPL $4
+
+ 0x25483D40: 91230018 stw r9,24(r3)
+ 45: GETL R9, t36
+ 46: GETL R3, t38
+ 47: ADDL $0x18, t38
+ 48: STL t36, (t38)
+ 49: INCEIPL $4
+
+ 0x25483D44: 34A5FFF8 addic. r5,r5,-8
+ 50: GETL R5, t40
+ 51: ADCL $0xFFFFFFF8, t40 (-wCa)
+ 52: PUTL t40, R5
+ 53: CMP0L t40, t42 (-rSo)
+ 54: ICRFL t42, $0x0, CR
+ 55: INCEIPL $4
+
+ 0x25483D48: 8124001C lwz r9,28(r4)
+ 56: GETL R4, t44
+ 57: ADDL $0x1C, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R9
+ 60: INCEIPL $4
+
+ 0x25483D4C: 9003001C stw r0,28(r3)
+ 61: GETL R0, t48
+ 62: GETL R3, t50
+ 63: ADDL $0x1C, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0x25483D50: 38840020 addi r4,r4,32
+ 66: GETL R4, t52
+ 67: ADDL $0x20, t52
+ 68: PUTL t52, R4
+ 69: INCEIPL $4
+
+ 0x25483D54: 38630020 addi r3,r3,32
+ 70: GETL R3, t54
+ 71: ADDL $0x20, t54
+ 72: PUTL t54, R3
+ 73: INCEIPL $4
+
+ 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
+ 74: Jc02o $0x25483D0C
+
+
+. 0 25483D1C 64
+. 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+
+==== BB 424 (0x254747B4) approx BBs exec'd 0 ====
+
+ 0x254747B4: 7C601B78 or r0,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254747B8: 7C030378 or r3,r0,r0
+ 3: GETL R0, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0x254747BC: 83810034 lwz r28,52(r1)
+ 6: GETL R1, t4
+ 7: ADDL $0x34, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R28
+ 10: INCEIPL $4
+
+ 0x254747C0: 81410008 lwz r10,8(r1)
+ 11: GETL R1, t8
+ 12: ADDL $0x8, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R10
+ 15: INCEIPL $4
+
+ 0x254747C4: 7F8803A6 mtlr r28
+ 16: GETL R28, t12
+ 17: PUTL t12, LR
+ 18: INCEIPL $4
+
+ 0x254747C8: 82E1000C lwz r23,12(r1)
+ 19: GETL R1, t14
+ 20: ADDL $0xC, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R23
+ 23: INCEIPL $4
+
+ 0x254747CC: 83010010 lwz r24,16(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x10, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R24
+ 28: INCEIPL $4
+
+ 0x254747D0: 7D408120 mtcrf 0x8,r10
+ 29: GETL R10, t22
+ 30: ICRFL t22, $0x4, CR
+ 31: INCEIPL $4
+
+ 0x254747D4: 83210014 lwz r25,20(r1)
+ 32: GETL R1, t24
+ 33: ADDL $0x14, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R25
+ 36: INCEIPL $4
+
+ 0x254747D8: 83410018 lwz r26,24(r1)
+ 37: GETL R1, t28
+ 38: ADDL $0x18, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R26
+ 41: INCEIPL $4
+
+ 0x254747DC: 8361001C lwz r27,28(r1)
+ 42: GETL R1, t32
+ 43: ADDL $0x1C, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R27
+ 46: INCEIPL $4
+
+ 0x254747E0: 83810020 lwz r28,32(r1)
+ 47: GETL R1, t36
+ 48: ADDL $0x20, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R28
+ 51: INCEIPL $4
+
+ 0x254747E4: 83A10024 lwz r29,36(r1)
+ 52: GETL R1, t40
+ 53: ADDL $0x24, t40
+ 54: LDL (t40), t42
+ 55: PUTL t42, R29
+ 56: INCEIPL $4
+
+ 0x254747E8: 83C10028 lwz r30,40(r1)
+ 57: GETL R1, t44
+ 58: ADDL $0x28, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R30
+ 61: INCEIPL $4
+
+ 0x254747EC: 83E1002C lwz r31,44(r1)
+ 62: GETL R1, t48
+ 63: ADDL $0x2C, t48
+ 64: LDL (t48), t50
+ 65: PUTL t50, R31
+ 66: INCEIPL $4
+
+ 0x254747F0: 38210030 addi r1,r1,48
+ 67: GETL R1, t52
+ 68: ADDL $0x30, t52
+ 69: PUTL t52, R1
+ 70: INCEIPL $4
+
+ 0x254747F4: 4E800020 blr
+ 71: GETL LR, t54
+ 72: JMPo-r t54 ($4)
+
+
+. 0 254747B4 68
+. 7C 60 1B 78 7C 03 03 78 83 81 00 34 81 41 00 08 7F 88 03 A6 82 E1 00 0C 83 01 00 10 7D 40 81 20 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+==== BB 425 (0x25476DF0) approx BBs exec'd 0 ====
+
+ 0x25476DF0: 3B40FFFF li r26,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R26
+ 2: INCEIPL $4
+
+ 0x25476DF4: 2F030000 cmpi cr6,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x6, CR
+ 6: INCEIPL $4
+
+ 0x25476DF8: 90610228 stw r3,552(r1)
+ 7: GETL R3, t6
+ 8: GETL R1, t8
+ 9: ADDL $0x228, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25476DFC: 2E1AFFFF cmpi cr4,r26,-1
+ 12: GETL R26, t10
+ 13: MOVL $0xFFFFFFFF, t14
+ 14: CMPL t10, t14, t12 (-rSo)
+ 15: ICRFL t12, $0x4, CR
+ 16: INCEIPL $4
+
+ 0x25476E00: 409A0200 bc 4,26,0x25477000
+ 17: Jc26o $0x25477000
+
+
+. 0 25476DF0 20
+. 3B 40 FF FF 2F 03 00 00 90 61 02 28 2E 1A FF FF 40 9A 02 00
+
+==== BB 426 (0x25477000) approx BBs exec'd 0 ====
+
+ 0x25477000: 38810018 addi r4,r1,24
+ 0: GETL R1, t0
+ 1: ADDL $0x18, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x25477004: 4BFFF441 bl 0x25476444
+ 4: MOVL $0x25477008, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0x25476444 ($4)
+
+
+. 0 25477000 8
+. 38 81 00 18 4B FF F4 41
+
+==== BB 427 open_verify(0x25476444) approx BBs exec'd 0 ====
+
+ 0x25476444: 9421FFA0 stwu r1,-96(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFA0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25476448: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547644C: 48020BB5 bl 0x25497000
+ 9: MOVL $0x25476450, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25476444 12
+. 94 21 FF A0 7C 08 02 A6 48 02 0B B5
+
+==== BB 428 (0x25476450) approx BBs exec'd 0 ====
+
+ 0x25476450: 93C10058 stw r30,88(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x58, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25476454: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25476458: 93010040 stw r24,64(r1)
+ 8: GETL R24, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x40, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547645C: 93E1005C stw r31,92(r1)
+ 13: GETL R31, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x5C, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25476460: 7C982378 or r24,r4,r4
+ 18: GETL R4, t14
+ 19: PUTL t14, R24
+ 20: INCEIPL $4
+
+ 0x25476464: 7C3F0B78 or r31,r1,r1
+ 21: GETL R1, t16
+ 22: PUTL t16, R31
+ 23: INCEIPL $4
+
+ 0x25476468: 38800000 li r4,0
+ 24: MOVL $0x0, t18
+ 25: PUTL t18, R4
+ 26: INCEIPL $4
+
+ 0x2547646C: 92C10038 stw r22,56(r1)
+ 27: GETL R22, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x38, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0x25476470: 7C761B78 or r22,r3,r3
+ 32: GETL R3, t24
+ 33: PUTL t24, R22
+ 34: INCEIPL $4
+
+ 0x25476474: 93210044 stw r25,68(r1)
+ 35: GETL R25, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x44, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0x25476478: 9361004C stw r27,76(r1)
+ 40: GETL R27, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x4C, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x2547647C: 3B600000 li r27,0
+ 45: MOVL $0x0, t34
+ 46: PUTL t34, R27
+ 47: INCEIPL $4
+
+ 0x25476480: 92A10034 stw r21,52(r1)
+ 48: GETL R21, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x34, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x25476484: 92E1003C stw r23,60(r1)
+ 53: GETL R23, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x3C, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x25476488: 93410048 stw r26,72(r1)
+ 58: GETL R26, t44
+ 59: GETL R1, t46
+ 60: ADDL $0x48, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x2547648C: 93810050 stw r28,80(r1)
+ 63: GETL R28, t48
+ 64: GETL R1, t50
+ 65: ADDL $0x50, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x25476490: 93A10054 stw r29,84(r1)
+ 68: GETL R29, t52
+ 69: GETL R1, t54
+ 70: ADDL $0x54, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0x25476494: 90010064 stw r0,100(r1)
+ 73: GETL R0, t56
+ 74: GETL R1, t58
+ 75: ADDL $0x64, t58
+ 76: STL t56, (t58)
+ 77: INCEIPL $4
+
+ 0x25476498: 4800BB49 bl 0x25481FE0
+ 78: MOVL $0x2547649C, t60
+ 79: PUTL t60, LR
+ 80: JMPo-c $0x25481FE0 ($4)
+
+
+. 0 25476450 76
+. 93 C1 00 58 7F C8 02 A6 93 01 00 40 93 E1 00 5C 7C 98 23 78 7C 3F 0B 78 38 80 00 00 92 C1 00 38 7C 76 1B 78 93 21 00 44 93 61 00 4C 3B 60 00 00 92 A1 00 34 92 E1 00 3C 93 41 00 48 93 81 00 50 93 A1 00 54 90 01 00 64 48 00 BB 49
+
+==== BB 429 open(0x25481FE0) approx BBs exec'd 0 ====
+
+ 0x25481FE0: 38000005 li r0,5
+ 0: MOVL $0x5, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25481FE4: 44000002 sc
+ 3: JMPo-sys $0x25481FE8 ($4)
+
+
+. 0 25481FE0 8
+. 38 00 00 05 44 00 00 02
+
+==== BB 430 (0x25481FE8) approx BBs exec'd 0 ====
+
+ 0x25481FE8: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+. 0 25481FE8 4
+. 4C A3 00 20
+
+==== BB 431 (0x2547649C) approx BBs exec'd 0 ====
+
+ 0x2547649C: 2F83FFFF cmpi cr7,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x254764A0: 7C791B78 or r25,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R25
+ 7: INCEIPL $4
+
+ 0x254764A4: 419E00CC bc 12,30,0x25476570
+ 8: Js30o $0x25476570
+
+
+. 0 2547649C 12
+. 2F 83 FF FF 7C 79 1B 78 41 9E 00 CC
+
+==== BB 432 (0x254764A8) approx BBs exec'd 0 ====
+
+ 0x254764A8: 82FE0514 lwz r23,1300(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x514, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x254764AC: 3B980004 addi r28,r24,4
+ 5: GETL R24, t4
+ 6: ADDL $0x4, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x254764B0: 7F84E378 or r4,r28,r28
+ 9: GETL R28, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0x254764B4: 38A00200 li r5,512
+ 12: MOVL $0x200, t8
+ 13: PUTL t8, R5
+ 14: INCEIPL $4
+
+ 0x254764B8: 93770000 stw r27,0(r23)
+ 15: GETL R27, t10
+ 16: GETL R23, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x254764BC: 4800BB45 bl 0x25482000
+ 19: MOVL $0x254764C0, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x25482000 ($4)
+
+
+. 0 254764A8 24
+. 82 FE 05 14 3B 98 00 04 7F 84 E3 78 38 A0 02 00 93 77 00 00 48 00 BB 45
+
+==== BB 433 read(0x25482000) approx BBs exec'd 0 ====
+
+ 0x25482000: 38000003 li r0,3
+ 0: MOVL $0x3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25482004: 44000002 sc
+ 3: JMPo-sys $0x25482008 ($4)
+
+
+. 0 25482000 8
+. 38 00 00 03 44 00 00 02
+
+==== BB 434 (0x25482008) approx BBs exec'd 0 ====
+
+ 0x25482008: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+. 0 25482008 4
+. 4C A3 00 20
+
+==== BB 435 (0x254764C0) approx BBs exec'd 0 ====
+
+ 0x254764C0: 2C030033 cmpi cr0,r3,51
+ 0: GETL R3, t0
+ 1: MOVL $0x33, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254764C4: 7C7D1B78 or r29,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R29
+ 7: INCEIPL $4
+
+ 0x254764C8: 90780000 stw r3,0(r24)
+ 8: GETL R3, t8
+ 9: GETL R24, t10
+ 10: STL t8, (t10)
+ 11: INCEIPL $4
+
+ 0x254764CC: 4081014C bc 4,1,0x25476618
+ 12: Jc01o $0x25476618
+
+
+. 0 254764C0 16
+. 2C 03 00 33 7C 7D 1B 78 90 78 00 00 40 81 01 4C
+
+==== BB 436 (0x254764D0) approx BBs exec'd 0 ====
+
+ 0x254764D0: 809E016C lwz r4,364(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x16C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254764D4: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254764D8: 38A00009 li r5,9
+ 8: MOVL $0x9, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x254764DC: 4800CDBD bl 0x25483298
+ 11: MOVL $0x254764E0, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483298 ($4)
+
+
+. 0 254764D0 16
+. 80 9E 01 6C 7F 83 E3 78 38 A0 00 09 48 00 CD BD
+
+==== BB 437 (0x254764E0) approx BBs exec'd 0 ====
+
+ 0x254764E0: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x254764E4: 409A0234 bc 4,26,0x25476718
+ 4: Jc26o $0x25476718
+
+
+. 0 254764E0 8
+. 2F 03 00 00 40 9A 02 34
+
+==== BB 438 (0x254764E8) approx BBs exec'd 0 ====
+
+ 0x254764E8: 819C0014 lwz r12,20(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x254764EC: 811E0200 lwz r8,512(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x200, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x254764F0: 2C8C0001 cmpi cr1,r12,1
+ 10: GETL R12, t8
+ 11: MOVL $0x1, t12
+ 12: CMPL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x254764F4: 40860138 bc 4,6,0x2547662C
+ 15: Jc06o $0x2547662C
+
+
+. 0 254764E8 16
+. 81 9C 00 14 81 1E 02 00 2C 8C 00 01 40 86 01 38
+
+==== BB 439 (0x254764F8) approx BBs exec'd 0 ====
+
+ 0x254764F8: A11C0012 lhz r8,18(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x12, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254764FC: 2F080014 cmpi cr6,r8,20
+ 5: GETL R8, t4
+ 6: MOVL $0x14, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x25476500: 409A01D0 bc 4,26,0x254766D0
+ 10: Jc26o $0x254766D0
+
+
+. 0 254764F8 12
+. A1 1C 00 12 2F 08 00 14 40 9A 01 D0
+
+==== BB 440 (0x25476504) approx BBs exec'd 0 ====
+
+ 0x25476504: A01C0010 lhz r0,16(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x10, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25476508: 2F800003 cmpi cr7,r0,3
+ 5: GETL R0, t4
+ 6: MOVL $0x3, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x2547650C: 409E0278 bc 4,30,0x25476784
+ 10: Jc30o $0x25476784
+
+
+. 0 25476504 12
+. A0 1C 00 10 2F 80 00 03 40 9E 02 78
+
+==== BB 441 (0x25476510) approx BBs exec'd 0 ====
+
+ 0x25476510: A2BC002A lhz r21,42(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x2A, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x25476514: 811E0204 lwz r8,516(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x204, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x25476518: 2C950020 cmpi cr1,r21,32
+ 10: GETL R21, t8
+ 11: MOVL $0x20, t12
+ 12: CMPL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x2547651C: 40860110 bc 4,6,0x2547662C
+ 15: Jc06o $0x2547662C
+
+
+. 0 25476510 16
+. A2 BC 00 2A 81 1E 02 04 2C 95 00 20 40 86 01 10
+
+==== BB 442 (0x25476520) approx BBs exec'd 0 ====
+
+ 0x25476520: A17C002C lhz r11,44(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x2C, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25476524: 809C001C lwz r4,28(r28)
+ 5: GETL R28, t4
+ 6: ADDL $0x1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25476528: 557B2834 rlwinm r27,r11,5,0,26
+ 10: GETL R11, t8
+ 11: SHLL $0x5, t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0x2547652C: 7F44DA14 add r26,r4,r27
+ 14: GETL R4, t10
+ 15: GETL R27, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R26
+ 18: INCEIPL $4
+
+ 0x25476530: 7F1AE840 cmpl cr6,r26,r29
+ 19: GETL R26, t14
+ 20: GETL R29, t16
+ 21: CMPUL t14, t16, t18 (-rSo)
+ 22: ICRFL t18, $0x6, CR
+ 23: INCEIPL $4
+
+ 0x25476534: 7FA4C214 add r29,r4,r24
+ 24: GETL R4, t20
+ 25: GETL R24, t22
+ 26: ADDL t20, t22
+ 27: PUTL t22, R29
+ 28: INCEIPL $4
+
+ 0x25476538: 3B5D0004 addi r26,r29,4
+ 29: GETL R29, t24
+ 30: ADDL $0x4, t24
+ 31: PUTL t24, R26
+ 32: INCEIPL $4
+
+ 0x2547653C: 41990108 bc 12,25,0x25476644
+ 33: Js25o $0x25476644
+
+
+. 0 25476520 32
+. A1 7C 00 2C 80 9C 00 1C 55 7B 28 34 7F 44 DA 14 7F 1A E8 40 7F A4 C2 14 3B 5D 00 04 41 99 01 08
+
+==== BB 443 (0x25476540) approx BBs exec'd 0 ====
+
+ 0x25476540: 557B2834 rlwinm r27,r11,5,0,26
+ 0: GETL R11, t0
+ 1: SHLL $0x5, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25476544: 7F5DD378 or r29,r26,r26
+ 4: GETL R26, t2
+ 5: PUTL t2, R29
+ 6: INCEIPL $4
+
+ 0x25476548: 7C1BD214 add r0,r27,r26
+ 7: GETL R27, t4
+ 8: GETL R26, t6
+ 9: ADDL t4, t6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0x2547654C: 4800001C b 0x25476568
+ 12: JMPo $0x25476568 ($4)
+
+
+. 0 25476540 16
+. 55 7B 28 34 7F 5D D3 78 7C 1B D2 14 48 00 00 1C
+
+==== BB 444 (0x25476568) approx BBs exec'd 0 ====
+
+ 0x25476568: 7C00E840 cmpl cr0,r0,r29
+ 0: GETL R0, t0
+ 1: GETL R29, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547656C: 4181FFE4 bc 12,1,0x25476550
+ 5: Js01o $0x25476550
+
+
+. 0 25476568 8
+. 7C 00 E8 40 41 81 FF E4
+
+==== BB 445 (0x25476550) approx BBs exec'd 0 ====
+
+ 0x25476550: 809D0000 lwz r4,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25476554: 2C840004 cmpi cr1,r4,4
+ 4: GETL R4, t4
+ 5: MOVL $0x4, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25476558: 4186005C bc 12,6,0x254765B4
+ 9: Js06o $0x254765B4
+
+
+. 0 25476550 12
+. 80 9D 00 00 2C 84 00 04 41 86 00 5C
+
+==== BB 446 (0x2547655C) approx BBs exec'd 0 ====
+
+ 0x2547655C: 55662834 rlwinm r6,r11,5,0,26
+ 0: GETL R11, t0
+ 1: SHLL $0x5, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x25476560: 3BBD0020 addi r29,r29,32
+ 4: GETL R29, t2
+ 5: ADDL $0x20, t2
+ 6: PUTL t2, R29
+ 7: INCEIPL $4
+
+ 0x25476564: 7C06D214 add r0,r6,r26
+ 8: GETL R6, t4
+ 9: GETL R26, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R0
+ 12: INCEIPL $4
+
+ 0x25476568: 7C00E840 cmpl cr0,r0,r29
+ 13: GETL R0, t8
+ 14: GETL R29, t10
+ 15: CMPUL t8, t10, t12 (-rSo)
+ 16: ICRFL t12, $0x0, CR
+ 17: INCEIPL $4
+
+ 0x2547656C: 4181FFE4 bc 12,1,0x25476550
+ 18: Js01o $0x25476550
+
+
+. 0 2547655C 20
+. 55 66 28 34 3B BD 00 20 7C 06 D2 14 7C 00 E8 40 41 81 FF E4
+
+==== BB 447 (0x25476570) approx BBs exec'd 0 ====
+
+ 0x25476570: 80810000 lwz r4,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25476574: 7F23CB78 or r3,r25,r25
+ 4: GETL R25, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x25476578: 82E40004 lwz r23,4(r4)
+ 7: GETL R4, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R23
+ 11: INCEIPL $4
+
+ 0x2547657C: 82A4FFD4 lwz r21,-44(r4)
+ 12: GETL R4, t10
+ 13: ADDL $0xFFFFFFD4, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R21
+ 16: INCEIPL $4
+
+ 0x25476580: 7EE803A6 mtlr r23
+ 17: GETL R23, t14
+ 18: PUTL t14, LR
+ 19: INCEIPL $4
+
+ 0x25476584: 82C4FFD8 lwz r22,-40(r4)
+ 20: GETL R4, t16
+ 21: ADDL $0xFFFFFFD8, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R22
+ 24: INCEIPL $4
+
+ 0x25476588: 82E4FFDC lwz r23,-36(r4)
+ 25: GETL R4, t20
+ 26: ADDL $0xFFFFFFDC, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R23
+ 29: INCEIPL $4
+
+ 0x2547658C: 8304FFE0 lwz r24,-32(r4)
+ 30: GETL R4, t24
+ 31: ADDL $0xFFFFFFE0, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R24
+ 34: INCEIPL $4
+
+ 0x25476590: 8324FFE4 lwz r25,-28(r4)
+ 35: GETL R4, t28
+ 36: ADDL $0xFFFFFFE4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R25
+ 39: INCEIPL $4
+
+ 0x25476594: 8344FFE8 lwz r26,-24(r4)
+ 40: GETL R4, t32
+ 41: ADDL $0xFFFFFFE8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R26
+ 44: INCEIPL $4
+
+ 0x25476598: 8364FFEC lwz r27,-20(r4)
+ 45: GETL R4, t36
+ 46: ADDL $0xFFFFFFEC, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R27
+ 49: INCEIPL $4
+
+ 0x2547659C: 8384FFF0 lwz r28,-16(r4)
+ 50: GETL R4, t40
+ 51: ADDL $0xFFFFFFF0, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R28
+ 54: INCEIPL $4
+
+ 0x254765A0: 83A4FFF4 lwz r29,-12(r4)
+ 55: GETL R4, t44
+ 56: ADDL $0xFFFFFFF4, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R29
+ 59: INCEIPL $4
+
+ 0x254765A4: 83C4FFF8 lwz r30,-8(r4)
+ 60: GETL R4, t48
+ 61: ADDL $0xFFFFFFF8, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R30
+ 64: INCEIPL $4
+
+ 0x254765A8: 83E4FFFC lwz r31,-4(r4)
+ 65: GETL R4, t52
+ 66: ADDL $0xFFFFFFFC, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R31
+ 69: INCEIPL $4
+
+ 0x254765AC: 7C812378 or r1,r4,r4
+ 70: GETL R4, t56
+ 71: PUTL t56, R1
+ 72: INCEIPL $4
+
+ 0x254765B0: 4E800020 blr
+ 73: GETL LR, t58
+ 74: JMPo-r t58 ($4)
+
+
+. 0 25476570 68
+. 80 81 00 00 7F 23 CB 78 82 E4 00 04 82 A4 FF D4 7E E8 03 A6 82 C4 FF D8 82 E4 FF DC 83 04 FF E0 83 24 FF E4 83 44 FF E8 83 64 FF EC 83 84 FF F0 83 A4 FF F4 83 C4 FF F8 83 E4 FF FC 7C 81 23 78 4E 80 00 20
+
+==== BB 448 (0x25477008) approx BBs exec'd 0 ====
+
+ 0x25477008: 2E03FFFF cmpi cr4,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x2547700C: 7C7A1B78 or r26,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R26
+ 7: INCEIPL $4
+
+ 0x25477010: 4092FDF4 bc 4,18,0x25476E04
+ 8: Jc18o $0x25476E04
+
+
+. 0 25477008 12
+. 2E 03 FF FF 7C 7A 1B 78 40 92 FD F4
+
+==== BB 449 (0x25476E04) approx BBs exec'd 0 ====
+
+ 0x25476E04: 571227FE rlwinm r18,r24,4,31,31
+ 0: GETL R24, t0
+ 1: ROLL $0x4, t0
+ 2: ANDL $0x1, t0
+ 3: PUTL t0, R18
+ 4: INCEIPL $4
+
+ 0x25476E08: 32D2FFFF addic r22,r18,-1
+ 5: GETL R18, t2
+ 6: ADCL $0xFFFFFFFF, t2 (-wCa)
+ 7: PUTL t2, R22
+ 8: INCEIPL $4
+
+ 0x25476E0C: 7ED6B110 subfe r22,r22,r22
+ 9: GETL R22, t4
+ 10: GETL R22, t6
+ 11: SBBL t4, t6 (-rCa-wCa)
+ 12: PUTL t6, R22
+ 13: INCEIPL $4
+
+ 0x25476E10: 7F7CB038 and r28,r27,r22
+ 14: GETL R27, t8
+ 15: GETL R22, t10
+ 16: ANDL t8, t10
+ 17: PUTL t10, R28
+ 18: INCEIPL $4
+
+ 0x25476E14: 4092020C bc 4,18,0x25477020
+ 19: Jc18o $0x25477020
+
+
+. 0 25476E04 20
+. 57 12 27 FE 32 D2 FF FF 7E D6 B1 10 7F 7C B0 38 40 92 02 0C
+
+==== BB 450 (0x25477020) approx BBs exec'd 0 ====
+
+ 0x25477020: 80FE04C0 lwz r7,1216(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25477024: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25477028: 80C10228 lwz r6,552(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x228, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R6
+ 12: INCEIPL $4
+
+ 0x2547702C: 7F44D378 or r4,r26,r26
+ 13: GETL R26, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0x25477030: 81C70000 lwz r14,0(r7)
+ 16: GETL R7, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R14
+ 19: INCEIPL $4
+
+ 0x25477034: 7E088378 or r8,r16,r16
+ 20: GETL R16, t16
+ 21: PUTL t16, R8
+ 22: INCEIPL $4
+
+ 0x25477038: 7F87E378 or r7,r28,r28
+ 23: GETL R28, t18
+ 24: PUTL t18, R7
+ 25: INCEIPL $4
+
+ 0x2547703C: 7F09C378 or r9,r24,r24
+ 26: GETL R24, t20
+ 27: PUTL t20, R9
+ 28: INCEIPL $4
+
+ 0x25477040: 38A10018 addi r5,r1,24
+ 29: GETL R1, t22
+ 30: ADDL $0x18, t22
+ 31: PUTL t22, R5
+ 32: INCEIPL $4
+
+ 0x25477044: 3941022C addi r10,r1,556
+ 33: GETL R1, t24
+ 34: ADDL $0x22C, t24
+ 35: PUTL t24, R10
+ 36: INCEIPL $4
+
+ 0x25477048: 91C1022C stw r14,556(r1)
+ 37: GETL R14, t26
+ 38: GETL R1, t28
+ 39: ADDL $0x22C, t28
+ 40: STL t26, (t28)
+ 41: INCEIPL $4
+
+ 0x2547704C: 93210008 stw r25,8(r1)
+ 42: GETL R25, t30
+ 43: GETL R1, t32
+ 44: ADDL $0x8, t32
+ 45: STL t30, (t32)
+ 46: INCEIPL $4
+
+ 0x25477050: 4BFFE4B9 bl 0x25475508
+ 47: MOVL $0x25477054, t34
+ 48: PUTL t34, LR
+ 49: JMPo-c $0x25475508 ($4)
+
+
+. 0 25477020 52
+. 80 FE 04 C0 7F E3 FB 78 80 C1 02 28 7F 44 D3 78 81 C7 00 00 7E 08 83 78 7F 87 E3 78 7F 09 C3 78 38 A1 00 18 39 41 02 2C 91 C1 02 2C 93 21 00 08 4B FF E4 B9
+
+==== BB 451 _dl_map_object_from_fd(0x25475508) approx BBs exec'd 0 ====
+
+ 0x25475508: 9421FF00 stwu r1,-256(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF00, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547550C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25475510: 48021AF1 bl 0x25497000
+ 9: MOVL $0x25475514, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25475508 12
+. 94 21 FF 00 7C 08 02 A6 48 02 1A F1
+
+==== BB 452 (0x25475514) approx BBs exec'd 0 ====
+
+ 0x25475514: 7D800026 mfcr r12
+ 0: GETL CR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0x25475518: 93C100F8 stw r30,248(r1)
+ 3: GETL R30, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xF8, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x2547551C: 7FC802A6 mflr r30
+ 8: GETL LR, t6
+ 9: PUTL t6, R30
+ 10: INCEIPL $4
+
+ 0x25475520: 93E100FC stw r31,252(r1)
+ 11: GETL R31, t8
+ 12: GETL R1, t10
+ 13: ADDL $0xFC, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25475524: 7C3F0B78 or r31,r1,r1
+ 16: GETL R1, t12
+ 17: PUTL t12, R31
+ 18: INCEIPL $4
+
+ 0x25475528: 90010104 stw r0,260(r1)
+ 19: GETL R0, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x104, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x2547552C: 920100C0 stw r16,192(r1)
+ 24: GETL R16, t18
+ 25: GETL R1, t20
+ 26: ADDL $0xC0, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x25475530: 7CD03378 or r16,r6,r6
+ 29: GETL R6, t22
+ 30: PUTL t22, R16
+ 31: INCEIPL $4
+
+ 0x25475534: 926100CC stw r19,204(r1)
+ 32: GETL R19, t24
+ 33: GETL R1, t26
+ 34: ADDL $0xCC, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x25475538: 7C932378 or r19,r4,r4
+ 37: GETL R4, t28
+ 38: PUTL t28, R19
+ 39: INCEIPL $4
+
+ 0x2547553C: 928100D0 stw r20,208(r1)
+ 40: GETL R20, t30
+ 41: GETL R1, t32
+ 42: ADDL $0xD0, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x25475540: 7C741B78 or r20,r3,r3
+ 45: GETL R3, t34
+ 46: PUTL t34, R20
+ 47: INCEIPL $4
+
+ 0x25475544: 92C100D8 stw r22,216(r1)
+ 48: GETL R22, t36
+ 49: GETL R1, t38
+ 50: ADDL $0xD8, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x25475548: 38600003 li r3,3
+ 53: MOVL $0x3, t40
+ 54: PUTL t40, R3
+ 55: INCEIPL $4
+
+ 0x2547554C: 92E100DC stw r23,220(r1)
+ 56: GETL R23, t42
+ 57: GETL R1, t44
+ 58: ADDL $0xDC, t44
+ 59: STL t42, (t44)
+ 60: INCEIPL $4
+
+ 0x25475550: 7D364B78 or r22,r9,r9
+ 61: GETL R9, t46
+ 62: PUTL t46, R22
+ 63: INCEIPL $4
+
+ 0x25475554: 932100E4 stw r25,228(r1)
+ 64: GETL R25, t48
+ 65: GETL R1, t50
+ 66: ADDL $0xE4, t50
+ 67: STL t48, (t50)
+ 68: INCEIPL $4
+
+ 0x25475558: 7CF73B78 or r23,r7,r7
+ 69: GETL R7, t52
+ 70: PUTL t52, R23
+ 71: INCEIPL $4
+
+ 0x2547555C: 934100E8 stw r26,232(r1)
+ 72: GETL R26, t54
+ 73: GETL R1, t56
+ 74: ADDL $0xE8, t56
+ 75: STL t54, (t56)
+ 76: INCEIPL $4
+
+ 0x25475560: 7D194378 or r25,r8,r8
+ 77: GETL R8, t58
+ 78: PUTL t58, R25
+ 79: INCEIPL $4
+
+ 0x25475564: 936100EC stw r27,236(r1)
+ 80: GETL R27, t60
+ 81: GETL R1, t62
+ 82: ADDL $0xEC, t62
+ 83: STL t60, (t62)
+ 84: INCEIPL $4
+
+ 0x25475568: 3B400000 li r26,0
+ 85: MOVL $0x0, t64
+ 86: PUTL t64, R26
+ 87: INCEIPL $4
+
+ 0x2547556C: 938100F0 stw r28,240(r1)
+ 88: GETL R28, t66
+ 89: GETL R1, t68
+ 90: ADDL $0xF0, t68
+ 91: STL t66, (t68)
+ 92: INCEIPL $4
+
+ 0x25475570: 7CBC2B78 or r28,r5,r5
+ 93: GETL R5, t70
+ 94: PUTL t70, R28
+ 95: INCEIPL $4
+
+ 0x25475574: 91C100B8 stw r14,184(r1)
+ 96: GETL R14, t72
+ 97: GETL R1, t74
+ 98: ADDL $0xB8, t74
+ 99: STL t72, (t74)
+ 100: INCEIPL $4
+
+ 0x25475578: 38BF0028 addi r5,r31,40
+ 101: GETL R31, t76
+ 102: ADDL $0x28, t76
+ 103: PUTL t76, R5
+ 104: INCEIPL $4
+
+ 0x2547557C: 91E100BC stw r15,188(r1)
+ 105: GETL R15, t78
+ 106: GETL R1, t80
+ 107: ADDL $0xBC, t80
+ 108: STL t78, (t80)
+ 109: INCEIPL $4
+
+ 0x25475580: 922100C4 stw r17,196(r1)
+ 110: GETL R17, t82
+ 111: GETL R1, t84
+ 112: ADDL $0xC4, t84
+ 113: STL t82, (t84)
+ 114: INCEIPL $4
+
+ 0x25475584: 924100C8 stw r18,200(r1)
+ 115: GETL R18, t86
+ 116: GETL R1, t88
+ 117: ADDL $0xC8, t88
+ 118: STL t86, (t88)
+ 119: INCEIPL $4
+
+ 0x25475588: 92A100D4 stw r21,212(r1)
+ 120: GETL R21, t90
+ 121: GETL R1, t92
+ 122: ADDL $0xD4, t92
+ 123: STL t90, (t92)
+ 124: INCEIPL $4
+
+ 0x2547558C: 930100E0 stw r24,224(r1)
+ 125: GETL R24, t94
+ 126: GETL R1, t96
+ 127: ADDL $0xE0, t96
+ 128: STL t94, (t96)
+ 129: INCEIPL $4
+
+ 0x25475590: 93A100F4 stw r29,244(r1)
+ 130: GETL R29, t98
+ 131: GETL R1, t100
+ 132: ADDL $0xF4, t100
+ 133: STL t98, (t100)
+ 134: INCEIPL $4
+
+ 0x25475594: 918100B4 stw r12,180(r1)
+ 135: GETL R12, t102
+ 136: GETL R1, t104
+ 137: ADDL $0xB4, t104
+ 138: STL t102, (t104)
+ 139: INCEIPL $4
+
+ 0x25475598: 915F0098 stw r10,152(r31)
+ 140: GETL R10, t106
+ 141: GETL R31, t108
+ 142: ADDL $0x98, t108
+ 143: STL t106, (t108)
+ 144: INCEIPL $4
+
+ 0x2547559C: 837F0108 lwz r27,264(r31)
+ 145: GETL R31, t110
+ 146: ADDL $0x108, t110
+ 147: LDL (t110), t112
+ 148: PUTL t112, R27
+ 149: INCEIPL $4
+
+ 0x254755A0: 4800C905 bl 0x25481EA4
+ 150: MOVL $0x254755A4, t114
+ 151: PUTL t114, LR
+ 152: JMPo-c $0x25481EA4 ($4)
+
+
+. 0 25475514 144
+. 7D 80 00 26 93 C1 00 F8 7F C8 02 A6 93 E1 00 FC 7C 3F 0B 78 90 01 01 04 92 01 00 C0 7C D0 33 78 92 61 00 CC 7C 93 23 78 92 81 00 D0 7C 74 1B 78 92 C1 00 D8 38 60 00 03 92 E1 00 DC 7D 36 4B 78 93 21 00 E4 7C F7 3B 78 93 41 00 E8 7D 19 43 78 93 61 00 EC 3B 40 00 00 93 81 00 F0 7C BC 2B 78 91 C1 00 B8 38 BF 00 28 91 E1 00 BC 92 21 00 C4 92 41 00 C8 92 A1 00 D4 93 01 00 E0 93 A1 00 F4 91 81 00 B4 91 5F 00 98 83 7F 01 08 48 00 C9 05
+
+==== BB 453 __GI___fxstat64(0x25481EA4) approx BBs exec'd 0 ====
+
+ 0x25481EA4: 9421FF80 stwu r1,-128(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF80, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25481EA8: 7CC802A6 mflr r6
+ 6: GETL LR, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x25481EAC: 48015155 bl 0x25497000
+ 9: MOVL $0x25481EB0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25481EA4 12
+. 94 21 FF 80 7C C8 02 A6 48 01 51 55
+
+==== BB 454 (0x25481EB0) approx BBs exec'd 0 ====
+
+ 0x25481EB0: 93C10078 stw r30,120(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x78, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25481EB4: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25481EB8: 9361006C stw r27,108(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x6C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25481EBC: 90C10084 stw r6,132(r1)
+ 13: GETL R6, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x84, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25481EC0: 93210064 stw r25,100(r1)
+ 18: GETL R25, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x64, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25481EC4: 7C791B78 or r25,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R25
+ 25: INCEIPL $4
+
+ 0x25481EC8: 837E04EC lwz r27,1260(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4EC, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R27
+ 30: INCEIPL $4
+
+ 0x25481ECC: 93810070 stw r28,112(r1)
+ 31: GETL R28, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x70, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x25481ED0: 7CBC2B78 or r28,r5,r5
+ 36: GETL R5, t28
+ 37: PUTL t28, R28
+ 38: INCEIPL $4
+
+ 0x25481ED4: 801B0000 lwz r0,0(r27)
+ 39: GETL R27, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R0
+ 42: INCEIPL $4
+
+ 0x25481ED8: 93E1007C stw r31,124(r1)
+ 43: GETL R31, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x7C, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x25481EDC: 7C9F2378 or r31,r4,r4
+ 48: GETL R4, t38
+ 49: PUTL t38, R31
+ 50: INCEIPL $4
+
+ 0x25481EE0: 2F800000 cmpi cr7,r0,0
+ 51: GETL R0, t40
+ 52: CMP0L t40, t42 (-rSo)
+ 53: ICRFL t42, $0x7, CR
+ 54: INCEIPL $4
+
+ 0x25481EE4: 93410068 stw r26,104(r1)
+ 55: GETL R26, t44
+ 56: GETL R1, t46
+ 57: ADDL $0x68, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0x25481EE8: 93A10074 stw r29,116(r1)
+ 60: GETL R29, t48
+ 61: GETL R1, t50
+ 62: ADDL $0x74, t50
+ 63: STL t48, (t50)
+ 64: INCEIPL $4
+
+ 0x25481EEC: 409E0048 bc 4,30,0x25481F34
+ 65: Jc30o $0x25481F34
+
+
+. 0 25481EB0 64
+. 93 C1 00 78 7F C8 02 A6 93 61 00 6C 90 C1 00 84 93 21 00 64 7C 79 1B 78 83 7E 04 EC 93 81 00 70 7C BC 2B 78 80 1B 00 00 93 E1 00 7C 7C 9F 23 78 2F 80 00 00 93 41 00 68 93 A1 00 74 40 9E 00 48
+
+==== BB 455 (0x25481EF0) approx BBs exec'd 0 ====
+
+ 0x25481EF0: 83BE0514 lwz r29,1300(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x514, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25481EF4: 7C832378 or r3,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25481EF8: 380000C5 li r0,197
+ 8: MOVL $0xC5, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x25481EFC: 7CA42B78 or r4,r5,r5
+ 11: GETL R5, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x25481F00: 835D0000 lwz r26,0(r29)
+ 14: GETL R29, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R26
+ 17: INCEIPL $4
+
+ 0x25481F04: 44000002 sc
+ 18: JMPo-sys $0x25481F08 ($4)
+
+
+. 0 25481EF0 24
+. 83 BE 05 14 7C 83 23 78 38 00 00 C5 7C A4 2B 78 83 5D 00 00 44 00 00 02
+
+==== BB 456 (0x25481F08) approx BBs exec'd 0 ====
+
+ 0x25481F08: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25481F0C: 74091000 andis. r9,r0,0x1000
+ 3: GETL R0, t2
+ 4: ANDL $0x10000000, t2
+ 5: PUTL t2, R9
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25481F10: 408200C4 bc 4,2,0x25481FD4
+ 9: Jc02o $0x25481FD4
+
+
+. 0 25481F08 12
+. 7C 00 00 26 74 09 10 00 40 82 00 C4
+
+==== BB 457 (0x25481F14) approx BBs exec'd 0 ====
+
+ 0x25481F14: 2C83FFFF cmpi cr1,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25481F18: 40A60044 bc 5,6,0x25481F5C
+ 5: Jc06o $0x25481F5C
+
+
+. 0 25481F14 8
+. 2C 83 FF FF 40 A6 00 44
+
+==== BB 458 (0x25481F5C) approx BBs exec'd 0 ====
+
+ 0x25481F5C: 80A10084 lwz r5,132(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25481F60: 83210064 lwz r25,100(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x64, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0x25481F64: 83410068 lwz r26,104(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x68, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R26
+ 14: INCEIPL $4
+
+ 0x25481F68: 7CA803A6 mtlr r5
+ 15: GETL R5, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x25481F6C: 8361006C lwz r27,108(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x6C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R27
+ 22: INCEIPL $4
+
+ 0x25481F70: 83810070 lwz r28,112(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x70, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R28
+ 27: INCEIPL $4
+
+ 0x25481F74: 83A10074 lwz r29,116(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x74, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R29
+ 32: INCEIPL $4
+
+ 0x25481F78: 83C10078 lwz r30,120(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x78, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R30
+ 37: INCEIPL $4
+
+ 0x25481F7C: 83E1007C lwz r31,124(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x7C, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R31
+ 42: INCEIPL $4
+
+ 0x25481F80: 38210080 addi r1,r1,128
+ 43: GETL R1, t34
+ 44: ADDL $0x80, t34
+ 45: PUTL t34, R1
+ 46: INCEIPL $4
+
+ 0x25481F84: 4E800020 blr
+ 47: GETL LR, t36
+ 48: JMPo-r t36 ($4)
+
+
+. 0 25481F5C 44
+. 80 A1 00 84 83 21 00 64 83 41 00 68 7C A8 03 A6 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C 38 21 00 80 4E 80 00 20
+
+==== BB 459 (0x254755A4) approx BBs exec'd 0 ====
+
+ 0x254755A4: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x254755A8: 935F00A0 stw r26,160(r31)
+ 4: GETL R26, t4
+ 5: GETL R31, t6
+ 6: ADDL $0xA0, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x254755AC: 419C082C bc 12,28,0x25475DD8
+ 9: Js28o $0x25475DD8
+
+
+. 0 254755A4 12
+. 2F 83 00 00 93 5F 00 A0 41 9C 08 2C
+
+==== BB 460 (0x254755B0) approx BBs exec'd 0 ====
+
+ 0x254755B0: 1CBB0018 mulli r5,r27,24
+ 0: GETL R27, t0
+ 1: MULL $0x18, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0x254755B4: 809E04C8 lwz r4,1224(r30)
+ 4: GETL R30, t2
+ 5: ADDL $0x4C8, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x254755B8: 7FA5202E lwzx r29,r5,r4
+ 9: GETL R4, t6
+ 10: GETL R5, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0x254755BC: 2C1D0000 cmpi cr0,r29,0
+ 15: GETL R29, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x254755C0: 41820148 bc 12,2,0x25475708
+ 19: Js02o $0x25475708
+
+
+. 0 254755B0 20
+. 1C BB 00 18 80 9E 04 C8 7F A5 20 2E 2C 1D 00 00 41 82 01 48
+
+==== BB 461 (0x254755C4) approx BBs exec'd 0 ====
+
+ 0x254755C4: 817F0030 lwz r11,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254755C8: 3B400000 li r26,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x254755CC: 48000010 b 0x254755DC
+ 8: JMPo $0x254755DC ($4)
+
+
+. 0 254755C4 12
+. 81 7F 00 30 3B 40 00 00 48 00 00 10
+
+==== BB 462 (0x254755DC) approx BBs exec'd 0 ====
+
+ 0x254755DC: 80DD01D8 lwz r6,472(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1D8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254755E0: 7C865800 cmp cr1,r6,r11
+ 5: GETL R6, t4
+ 6: GETL R11, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x254755E4: 4086FFEC bc 4,6,0x254755D0
+ 10: Jc06o $0x254755D0
+
+
+. 0 254755DC 12
+. 80 DD 01 D8 7C 86 58 00 40 86 FF EC
+
+==== BB 463 (0x254755E8) approx BBs exec'd 0 ====
+
+ 0x254755E8: 811D01DC lwz r8,476(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1DC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254755EC: 80FF0034 lwz r7,52(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x34, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0x254755F0: 7E083800 cmp cr4,r8,r7
+ 10: GETL R8, t8
+ 11: GETL R7, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x4, CR
+ 14: INCEIPL $4
+
+ 0x254755F4: 4092FFDC bc 4,18,0x254755D0
+ 15: Jc18o $0x254755D0
+
+
+. 0 254755E8 16
+. 81 1D 01 DC 80 FF 00 34 7E 08 38 00 40 92 FF DC
+
+==== BB 464 (0x254755D0) approx BBs exec'd 0 ====
+
+ 0x254755D0: 83BD000C lwz r29,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254755D4: 2E1D0000 cmpi cr4,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254755D8: 41920130 bc 12,18,0x25475708
+ 9: Js18o $0x25475708
+
+
+. 0 254755D0 12
+. 83 BD 00 0C 2E 1D 00 00 41 92 01 30
+
+==== BB 465 (0x25475708) approx BBs exec'd 0 ====
+
+ 0x25475708: 2F1B0000 cmpi cr6,r27,0
+ 0: GETL R27, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547570C: 409A06E0 bc 4,26,0x25475DEC
+ 4: Jc26o $0x25475DEC
+
+
+. 0 25475708 8
+. 2F 1B 00 00 40 9A 06 E0
+
+==== BB 466 (0x25475710) approx BBs exec'd 0 ====
+
+ 0x25475710: 72C00004 andi. r0,r22,0x4
+ 0: GETL R22, t0
+ 1: ANDL $0x4, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25475714: 38600000 li r3,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x25475718: 40A2FF8C bc 5,2,0x254756A4
+ 9: Jc02o $0x254756A4
+
+
+. 0 25475710 12
+. 72 C0 00 04 38 60 00 00 40 A2 FF 8C
+
+==== BB 467 (0x2547571C) approx BBs exec'd 0 ====
+
+ 0x2547571C: 823E04F4 lwz r17,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R17
+ 4: INCEIPL $4
+
+ 0x25475720: 80910000 lwz r4,0(r17)
+ 5: GETL R17, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x25475724: 70890040 andi. r9,r4,0x40
+ 9: GETL R4, t8
+ 10: ANDL $0x40, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25475728: 40820738 bc 4,2,0x25475E60
+ 15: Jc02o $0x25475E60
+
+
+. 0 2547571C 16
+. 82 3E 04 F4 80 91 00 00 70 89 00 40 40 82 07 38
+
+==== BB 468 (0x2547572C) approx BBs exec'd 0 ====
+
+ 0x2547572C: 7F25CB78 or r5,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x25475730: 7F68DB78 or r8,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0x25475734: 7E038378 or r3,r16,r16
+ 6: GETL R16, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x25475738: 7E84A378 or r4,r20,r20
+ 9: GETL R20, t6
+ 10: PUTL t6, R4
+ 11: INCEIPL $4
+
+ 0x2547573C: 7EE6BB78 or r6,r23,r23
+ 12: GETL R23, t8
+ 13: PUTL t8, R6
+ 14: INCEIPL $4
+
+ 0x25475740: 7EC7B378 or r7,r22,r22
+ 15: GETL R22, t10
+ 16: PUTL t10, R7
+ 17: INCEIPL $4
+
+ 0x25475744: 480039B1 bl 0x254790F4
+ 18: MOVL $0x25475748, t12
+ 19: PUTL t12, LR
+ 20: JMPo-c $0x254790F4 ($4)
+
+
+. 0 2547572C 28
+. 7F 25 CB 78 7F 68 DB 78 7E 03 83 78 7E 84 A3 78 7E E6 BB 78 7E C7 B3 78 48 00 39 B1
+
+==== BB 469 (0x25479318) approx BBs exec'd 0 ====
+
+ 0x25479318: 7D695B78 or r9,r11,r11
+ 0: GETL R11, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x2547931C: 48000008 b 0x25479324
+ 3: JMPo $0x25479324 ($4)
+
+
+. 0 25479318 8
+. 7D 69 5B 78 48 00 00 08
+
+==== BB 470 (0x25479324) approx BBs exec'd 0 ====
+
+ 0x25479324: 8009000C lwz r0,12(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25479328: 2C800000 cmpi cr1,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547932C: 4086FFF4 bc 4,6,0x25479320
+ 9: Jc06o $0x25479320
+
+
+. 0 25479324 12
+. 80 09 00 0C 2C 80 00 00 40 86 FF F4
+
+==== BB 471 (0x25479320) approx BBs exec'd 0 ====
+
+ 0x25479320: 7C090378 or r9,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25479324: 8009000C lwz r0,12(r9)
+ 3: GETL R9, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x25479328: 2C800000 cmpi cr1,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x2547932C: 4086FFF4 bc 4,6,0x25479320
+ 12: Jc06o $0x25479320
+
+
+. 0 25479320 16
+. 7C 09 03 78 80 09 00 0C 2C 80 00 00 40 86 FF F4
+
+==== BB 472 (0x25479330) approx BBs exec'd 0 ====
+
+ 0x25479330: 93E9000C stw r31,12(r9)
+ 0: GETL R31, t0
+ 1: GETL R9, t2
+ 2: ADDL $0xC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25479334: 2F1C0000 cmpi cr6,r28,0
+ 5: GETL R28, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25479338: 913F0010 stw r9,16(r31)
+ 9: GETL R9, t8
+ 10: GETL R31, t10
+ 11: ADDL $0x10, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x2547933C: 38800001 li r4,1
+ 14: MOVL $0x1, t12
+ 15: PUTL t12, R4
+ 16: INCEIPL $4
+
+ 0x25479340: 7D0A282E lwzx r8,r10,r5
+ 17: GETL R5, t14
+ 18: GETL R10, t16
+ 19: ADDL t16, t14
+ 20: LDL (t14), t18
+ 21: PUTL t18, R8
+ 22: INCEIPL $4
+
+ 0x25479344: 7D4A2A14 add r10,r10,r5
+ 23: GETL R10, t20
+ 24: GETL R5, t22
+ 25: ADDL t20, t22
+ 26: PUTL t22, R10
+ 27: INCEIPL $4
+
+ 0x25479348: 832A0004 lwz r25,4(r10)
+ 28: GETL R10, t24
+ 29: ADDL $0x4, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R25
+ 32: INCEIPL $4
+
+ 0x2547934C: 81650198 lwz r11,408(r5)
+ 33: GETL R5, t28
+ 34: ADDL $0x198, t28
+ 35: LDL (t28), t30
+ 36: PUTL t30, R11
+ 37: INCEIPL $4
+
+ 0x25479350: 38E80158 addi r7,r8,344
+ 38: GETL R8, t32
+ 39: ADDL $0x158, t32
+ 40: PUTL t32, R7
+ 41: INCEIPL $4
+
+ 0x25479354: 8185019C lwz r12,412(r5)
+ 42: GETL R5, t34
+ 43: ADDL $0x19C, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R12
+ 46: INCEIPL $4
+
+ 0x25479358: 3B190001 addi r24,r25,1
+ 47: GETL R25, t38
+ 48: ADDL $0x1, t38
+ 49: PUTL t38, R24
+ 50: INCEIPL $4
+
+ 0x2547935C: 90E60000 stw r7,0(r6)
+ 51: GETL R7, t40
+ 52: GETL R6, t42
+ 53: STL t40, (t42)
+ 54: INCEIPL $4
+
+ 0x25479360: 310C0001 addic r8,r12,1
+ 55: GETL R12, t44
+ 56: ADCL $0x1, t44 (-wCa)
+ 57: PUTL t44, R8
+ 58: INCEIPL $4
+
+ 0x25479364: 7CEB0194 addze r7,r11
+ 59: GETL R11, t46
+ 60: ADCL $0x0, t46 (-rCa-wCa)
+ 61: PUTL t46, R7
+ 62: INCEIPL $4
+
+ 0x25479368: 930A0004 stw r24,4(r10)
+ 63: GETL R24, t48
+ 64: GETL R10, t50
+ 65: ADDL $0x4, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x2547936C: 90E50198 stw r7,408(r5)
+ 68: GETL R7, t52
+ 69: GETL R5, t54
+ 70: ADDL $0x198, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0x25479370: 9105019C stw r8,412(r5)
+ 73: GETL R8, t56
+ 74: GETL R5, t58
+ 75: ADDL $0x19C, t58
+ 76: STL t56, (t58)
+ 77: INCEIPL $4
+
+ 0x25479374: 409AFEA8 bc 4,26,0x2547921C
+ 78: Jc26o $0x2547921C
+
+
+. 0 25479330 72
+. 93 E9 00 0C 2F 1C 00 00 91 3F 00 10 38 80 00 01 7D 0A 28 2E 7D 4A 2A 14 83 2A 00 04 81 65 01 98 38 E8 01 58 81 85 01 9C 3B 19 00 01 90 E6 00 00 31 0C 00 01 7C EB 01 94 93 0A 00 04 90 E5 01 98 91 05 01 9C 40 9A FE A8
+
+==== BB 473 (0x2547921C) approx BBs exec'd 0 ====
+
+ 0x2547921C: 801C0168 lwz r0,360(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x168, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25479220: 2C000000 cmpi cr0,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25479224: 4082FFF4 bc 4,2,0x25479218
+ 9: Jc02o $0x25479218
+
+
+. 0 2547921C 12
+. 80 1C 01 68 2C 00 00 00 40 82 FF F4
+
+==== BB 474 (0x25479234) approx BBs exec'd 0 ====
+
+ 0x25479234: 81660000 lwz r11,0(r6)
+ 0: GETL R6, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25479238: 7C895800 cmp cr1,r9,r11
+ 4: GETL R9, t4
+ 5: GETL R11, t6
+ 6: CMPL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547923C: 41860024 bc 12,6,0x25479260
+ 9: Js06o $0x25479260
+
+
+. 0 25479234 12
+. 81 66 00 00 7C 89 58 00 41 86 00 24
+
+==== BB 475 (0x25479260) approx BBs exec'd 0 ====
+
+ 0x25479260: 3B7F0158 addi r27,r31,344
+ 0: GETL R31, t0
+ 1: ADDL $0x158, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25479264: 937F01C4 stw r27,452(r31)
+ 4: GETL R27, t2
+ 5: GETL R31, t4
+ 6: ADDL $0x1C4, t4
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x25479268: 8BB70000 lbz r29,0(r23)
+ 9: GETL R23, t6
+ 10: LDB (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x2547926C: 2F1D0000 cmpi cr6,r29,0
+ 13: GETL R29, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x6, CR
+ 16: INCEIPL $4
+
+ 0x25479270: 419A006C bc 12,26,0x254792DC
+ 17: Js26o $0x254792DC
+
+
+. 0 25479260 20
+. 3B 7F 01 58 93 7F 01 C4 8B B7 00 00 2F 1D 00 00 41 9A 00 6C
+
+==== BB 476 (0x25479274) approx BBs exec'd 0 ====
+
+ 0x25479274: 7EE3BB78 or r3,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25479278: 3B800000 li r28,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R28
+ 5: INCEIPL $4
+
+ 0x2547927C: 48009D55 bl 0x25482FD0
+ 6: MOVL $0x25479280, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25482FD0 ($4)
+
+
+. 0 25479274 12
+. 7E E3 BB 78 3B 80 00 00 48 00 9D 55
+
+==== BB 477 (0x25479280) approx BBs exec'd 0 ====
+
+ 0x25479280: 2F9D002F cmpi cr7,r29,47
+ 0: GETL R29, t0
+ 1: MOVL $0x2F, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25479284: 3B630001 addi r27,r3,1
+ 5: GETL R3, t6
+ 6: ADDL $0x1, t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0x25479288: 835E0514 lwz r26,1300(r30)
+ 9: GETL R30, t8
+ 10: ADDL $0x514, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R26
+ 13: INCEIPL $4
+
+ 0x2547928C: 7F7DDB78 or r29,r27,r27
+ 14: GETL R27, t12
+ 15: PUTL t12, R29
+ 16: INCEIPL $4
+
+ 0x25479290: 419E0154 bc 12,30,0x254793E4
+ 17: Js30o $0x254793E4
+
+
+. 0 25479280 20
+. 2F 9D 00 2F 3B 63 00 01 83 5E 05 14 7F 7D DB 78 41 9E 01 54
+
+==== BB 478 (0x254793E4) approx BBs exec'd 0 ====
+
+ 0x254793E4: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254793E8: 4801E63D bl 0x25497A24
+ 3: MOVL $0x254793EC, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25497A24 ($4)
+
+
+. 0 254793E4 8
+. 7F 63 DB 78 48 01 E6 3D
+
+==== BB 479 (0x254793EC) approx BBs exec'd 0 ====
+
+ 0x254793EC: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x254793F0: 7C7C1B78 or r28,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R28
+ 6: INCEIPL $4
+
+ 0x254793F4: 4086FFB0 bc 4,6,0x254793A4
+ 7: Jc06o $0x254793A4
+
+
+. 0 254793EC 12
+. 2C 83 00 00 7C 7C 1B 78 40 86 FF B0
+
+==== BB 480 (0x254793A4) approx BBs exec'd 0 ====
+
+ 0x254793A4: 7EE4BB78 or r4,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254793A8: 7F65DB78 or r5,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x254793AC: 4800A675 bl 0x25483A20
+ 6: MOVL $0x254793B0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25483A20 ($4)
+
+
+. 0 254793A4 12
+. 7E E4 BB 78 7F 65 DB 78 48 00 A6 75
+
+==== BB 481 (0x254793B0) approx BBs exec'd 0 ====
+
+ 0x254793B0: 8EE3FFFF lbzu r23,-1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R23
+ 5: INCEIPL $4
+
+ 0x254793B4: 2C17002F cmpi cr0,r23,47
+ 6: GETL R23, t4
+ 7: MOVL $0x2F, t8
+ 8: CMPL t4, t8, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x254793B8: 4082FFF8 bc 4,2,0x254793B0
+ 11: Jc02o $0x254793B0
+
+
+. 0 254793B0 12
+. 8E E3 FF FF 2C 17 00 2F 40 82 FF F8
+
+==== BB 482 (0x254793BC) approx BBs exec'd 0 ====
+
+ 0x254793BC: 7F03E000 cmp cr6,r3,r28
+ 0: GETL R3, t0
+ 1: GETL R28, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x254793C0: 419A0014 bc 12,26,0x254793D4
+ 5: Js26o $0x254793D4
+
+
+. 0 254793BC 8
+. 7F 03 E0 00 41 9A 00 14
+
+==== BB 483 (0x254793C4) approx BBs exec'd 0 ====
+
+ 0x254793C4: 38C00000 li r6,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x254793C8: 98C30000 stb r6,0(r3)
+ 3: GETL R6, t2
+ 4: GETL R3, t4
+ 5: STB t2, (t4)
+ 6: INCEIPL $4
+
+ 0x254793CC: 939F019C stw r28,412(r31)
+ 7: GETL R28, t6
+ 8: GETL R31, t8
+ 9: ADDL $0x19C, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x254793D0: 4BFFFF0C b 0x254792DC
+ 12: JMPo $0x254792DC ($4)
+
+
+. 0 254793C4 16
+. 38 C0 00 00 98 C3 00 00 93 9F 01 9C 4B FF FF 0C
+
+==== BB 484 (0x25475748) approx BBs exec'd 0 ====
+
+ 0x25475748: 3B1C0004 addi r24,r28,4
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R24
+ 3: INCEIPL $4
+
+ 0x2547574C: 7C7A1B79 or. r26,r3,r3
+ 4: GETL R3, t2
+ 5: PUTL t2, R26
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25475750: 41820708 bc 12,2,0x25475E58
+ 9: Js02o $0x25475E58
+
+
+. 0 25475748 12
+. 3B 1C 00 04 7C 7A 1B 79 41 82 07 08
+
+==== BB 485 (0x25475754) approx BBs exec'd 0 ====
+
+ 0x25475754: A1F8002C lhz r15,44(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0x2C, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R15
+ 4: INCEIPL $4
+
+ 0x25475758: 81D80018 lwz r14,24(r24)
+ 5: GETL R24, t4
+ 6: ADDL $0x18, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R14
+ 9: INCEIPL $4
+
+ 0x2547575C: A1580010 lhz r10,16(r24)
+ 10: GETL R24, t8
+ 11: ADDL $0x10, t8
+ 12: LDW (t8), t10
+ 13: PUTL t10, R10
+ 14: INCEIPL $4
+
+ 0x25475760: B1FA0154 sth r15,340(r26)
+ 15: GETL R15, t12
+ 16: GETL R26, t14
+ 17: ADDL $0x154, t14
+ 18: STW t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25475764: 91DA0150 stw r14,336(r26)
+ 20: GETL R14, t16
+ 21: GETL R26, t18
+ 22: ADDL $0x150, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25475768: A118002C lhz r8,44(r24)
+ 25: GETL R24, t20
+ 26: ADDL $0x2C, t20
+ 27: LDW (t20), t22
+ 28: PUTL t22, R8
+ 29: INCEIPL $4
+
+ 0x2547576C: 8378001C lwz r27,28(r24)
+ 30: GETL R24, t24
+ 31: ADDL $0x1C, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R27
+ 34: INCEIPL $4
+
+ 0x25475770: 551D2834 rlwinm r29,r8,5,0,26
+ 35: GETL R8, t28
+ 36: SHLL $0x5, t28
+ 37: PUTL t28, R29
+ 38: INCEIPL $4
+
+ 0x25475774: 80DC0000 lwz r6,0(r28)
+ 39: GETL R28, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R6
+ 42: INCEIPL $4
+
+ 0x25475778: 7CFBEA14 add r7,r27,r29
+ 43: GETL R27, t34
+ 44: GETL R29, t36
+ 45: ADDL t34, t36
+ 46: PUTL t36, R7
+ 47: INCEIPL $4
+
+ 0x2547577C: 7F3BE214 add r25,r27,r28
+ 48: GETL R27, t38
+ 49: GETL R28, t40
+ 50: ADDL t38, t40
+ 51: PUTL t40, R25
+ 52: INCEIPL $4
+
+ 0x25475780: 7F873040 cmpl cr7,r7,r6
+ 53: GETL R7, t42
+ 54: GETL R6, t44
+ 55: CMPUL t42, t44, t46 (-rSo)
+ 56: ICRFL t46, $0x7, CR
+ 57: INCEIPL $4
+
+ 0x25475784: 915F009C stw r10,156(r31)
+ 58: GETL R10, t48
+ 59: GETL R31, t50
+ 60: ADDL $0x9C, t50
+ 61: STL t48, (t50)
+ 62: INCEIPL $4
+
+ 0x25475788: 3B790004 addi r27,r25,4
+ 63: GETL R25, t52
+ 64: ADDL $0x4, t52
+ 65: PUTL t52, R27
+ 66: INCEIPL $4
+
+ 0x2547578C: 419D0438 bc 12,29,0x25475BC4
+ 67: Js29o $0x25475BC4
+
+
+. 0 25475754 60
+. A1 F8 00 2C 81 D8 00 18 A1 58 00 10 B1 FA 01 54 91 DA 01 50 A1 18 00 2C 83 78 00 1C 55 1D 28 34 80 DC 00 00 7C FB EA 14 7F 3B E2 14 7F 87 30 40 91 5F 00 9C 3B 79 00 04 41 9D 04 38
+
+==== BB 486 (0x25475790) approx BBs exec'd 0 ====
+
+ 0x25475790: A11A0154 lhz r8,340(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x154, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25475794: 7C320B78 or r18,r1,r1
+ 5: GETL R1, t4
+ 6: PUTL t4, R18
+ 7: INCEIPL $4
+
+ 0x25475798: 80810000 lwz r4,0(r1)
+ 8: GETL R1, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R4
+ 11: INCEIPL $4
+
+ 0x2547579C: 3BA00007 li r29,7
+ 12: MOVL $0x7, t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0x254757A0: 1CE80018 mulli r7,r8,24
+ 15: GETL R8, t12
+ 16: MULL $0x18, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0x254757A4: 3B800000 li r28,0
+ 19: MOVL $0x0, t14
+ 20: PUTL t14, R28
+ 21: INCEIPL $4
+
+ 0x254757A8: 38C7001E addi r6,r7,30
+ 22: GETL R7, t16
+ 23: ADDL $0x1E, t16
+ 24: PUTL t16, R6
+ 25: INCEIPL $4
+
+ 0x254757AC: 54D902B6 rlwinm r25,r6,0,10,27
+ 26: GETL R6, t18
+ 27: ANDL $0x3FFFF0, t18
+ 28: PUTL t18, R25
+ 29: INCEIPL $4
+
+ 0x254757B0: 7CB900D0 neg r5,r25
+ 30: GETL R25, t20
+ 31: NEGL t20
+ 32: PUTL t20, R5
+ 33: INCEIPL $4
+
+ 0x254757B4: 7C81296E stwux r4,r1,r5
+ 34: GETL R5, t22
+ 35: GETL R1, t24
+ 36: ADDL t24, t22
+ 37: PUTL t22, R1
+ 38: GETL R4, t26
+ 39: STL t26, (t22)
+ 40: INCEIPL $4
+
+ 0x254757B8: A0FA0154 lhz r7,340(r26)
+ 41: GETL R26, t28
+ 42: ADDL $0x154, t28
+ 43: LDW (t28), t30
+ 44: PUTL t30, R7
+ 45: INCEIPL $4
+
+ 0x254757BC: 3861002F addi r3,r1,47
+ 46: GETL R1, t32
+ 47: ADDL $0x2F, t32
+ 48: PUTL t32, R3
+ 49: INCEIPL $4
+
+ 0x254757C0: 93BF00A4 stw r29,164(r31)
+ 50: GETL R29, t34
+ 51: GETL R31, t36
+ 52: ADDL $0xA4, t36
+ 53: STL t34, (t36)
+ 54: INCEIPL $4
+
+ 0x254757C4: 54750036 rlwinm r21,r3,0,0,27
+ 55: GETL R3, t38
+ 56: ANDL $0xFFFFFFF0, t38
+ 57: PUTL t38, R21
+ 58: INCEIPL $4
+
+ 0x254757C8: 54E92834 rlwinm r9,r7,5,0,26
+ 59: GETL R7, t40
+ 60: SHLL $0x5, t40
+ 61: PUTL t40, R9
+ 62: INCEIPL $4
+
+ 0x254757CC: 939F00A8 stw r28,168(r31)
+ 63: GETL R28, t42
+ 64: GETL R31, t44
+ 65: ADDL $0xA8, t44
+ 66: STL t42, (t44)
+ 67: INCEIPL $4
+
+ 0x254757D0: 7C09DA14 add r0,r9,r27
+ 68: GETL R9, t46
+ 69: GETL R27, t48
+ 70: ADDL t46, t48
+ 71: PUTL t48, R0
+ 72: INCEIPL $4
+
+ 0x254757D4: 7F7DDB78 or r29,r27,r27
+ 73: GETL R27, t50
+ 74: PUTL t50, R29
+ 75: INCEIPL $4
+
+ 0x254757D8: 7E00D840 cmpl cr4,r0,r27
+ 76: GETL R0, t52
+ 77: GETL R27, t54
+ 78: CMPUL t52, t54, t56 (-rSo)
+ 79: ICRFL t56, $0x4, CR
+ 80: INCEIPL $4
+
+ 0x254757DC: 409103A8 bc 4,17,0x25475B84
+ 81: Jc17o $0x25475B84
+
+
+. 0 25475790 80
+. A1 1A 01 54 7C 32 0B 78 80 81 00 00 3B A0 00 07 1C E8 00 18 3B 80 00 00 38 C7 00 1E 54 D9 02 B6 7C B9 00 D0 7C 81 29 6E A0 FA 01 54 38 61 00 2F 93 BF 00 A4 54 75 00 36 54 E9 28 34 93 9F 00 A8 7C 09 DA 14 7F 7D DB 78 7E 00 D8 40 40 91 03 A8
+
+==== BB 487 (0x254757E0) approx BBs exec'd 0 ====
+
+ 0x254757E0: 3B200000 li r25,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R25
+ 2: INCEIPL $4
+
+ 0x254757E4: 48000028 b 0x2547580C
+ 3: JMPo $0x2547580C ($4)
+
+
+. 0 254757E0 8
+. 3B 20 00 00 48 00 00 28
+
+==== BB 488 (0x2547580C) approx BBs exec'd 0 ====
+
+ 0x2547580C: 813D0000 lwz r9,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25475810: 2F090006 cmpi cr6,r9,6
+ 4: GETL R9, t4
+ 5: MOVL $0x6, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25475814: 419A0094 bc 12,26,0x254758A8
+ 9: Js26o $0x254758A8
+
+
+. 0 2547580C 12
+. 81 3D 00 00 2F 09 00 06 41 9A 00 94
+
+==== BB 489 (0x25475818) approx BBs exec'd 0 ====
+
+ 0x25475818: 28090006 cmpli cr0,r9,6
+ 0: GETL R9, t0
+ 1: MOVL $0x6, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547581C: 40A1FFCC bc 5,1,0x254757E8
+ 5: Jc01o $0x254757E8
+
+
+. 0 25475818 8
+. 28 09 00 06 40 A1 FF CC
+
+==== BB 490 (0x254757E8) approx BBs exec'd 0 ====
+
+ 0x254757E8: 2F890001 cmpi cr7,r9,1
+ 0: GETL R9, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x254757EC: 419E02C4 bc 12,30,0x25475AB0
+ 5: Js30o $0x25475AB0
+
+
+. 0 254757E8 8
+. 2F 89 00 01 41 9E 02 C4
+
+==== BB 491 (0x25475AB0) approx BBs exec'd 0 ====
+
+ 0x25475AB0: 81310004 lwz r9,4(r17)
+ 0: GETL R17, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475AB4: 817D001C lwz r11,28(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25475AB8: 3909FFFF addi r8,r9,-1
+ 10: GETL R9, t8
+ 11: ADDL $0xFFFFFFFF, t8
+ 12: PUTL t8, R8
+ 13: INCEIPL $4
+
+ 0x25475ABC: 7D694039 and. r9,r11,r8
+ 14: GETL R11, t10
+ 15: GETL R8, t12
+ 16: ANDL t10, t12
+ 17: PUTL t12, R9
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x0, CR
+ 20: INCEIPL $4
+
+ 0x25475AC0: 4082062C bc 4,2,0x254760EC
+ 21: Jc02o $0x254760EC
+
+
+. 0 25475AB0 20
+. 81 31 00 04 81 7D 00 1C 39 09 FF FF 7D 69 40 39 40 82 06 2C
+
+==== BB 492 (0x25475AC4) approx BBs exec'd 0 ====
+
+ 0x25475AC4: 815D0008 lwz r10,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25475AC8: 38ABFFFF addi r5,r11,-1
+ 5: GETL R11, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x25475ACC: 80DD0004 lwz r6,4(r29)
+ 9: GETL R29, t6
+ 10: ADDL $0x4, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R6
+ 13: INCEIPL $4
+
+ 0x25475AD0: 7C865050 subf r4,r6,r10
+ 14: GETL R6, t10
+ 15: GETL R10, t12
+ 16: SUBL t10, t12
+ 17: PUTL t12, R4
+ 18: INCEIPL $4
+
+ 0x25475AD4: 7C8B2839 and. r11,r4,r5
+ 19: GETL R4, t14
+ 20: GETL R5, t16
+ 21: ANDL t14, t16
+ 22: PUTL t16, R11
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x0, CR
+ 25: INCEIPL $4
+
+ 0x25475AD8: 40820650 bc 4,2,0x25476128
+ 26: Jc02o $0x25476128
+
+
+. 0 25475AC4 24
+. 81 5D 00 08 38 AB FF FF 80 DD 00 04 7C 86 50 50 7C 8B 28 39 40 82 06 50
+
+==== BB 493 (0x25475ADC) approx BBs exec'd 0 ====
+
+ 0x25475ADC: 7D4A4078 andc r10,r10,r8
+ 0: GETL R10, t0
+ 1: GETL R8, t2
+ 2: NOTL t2
+ 3: ANDL t0, t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0x25475AE0: 3B9C0001 addi r28,r28,1
+ 6: GETL R28, t4
+ 7: ADDL $0x1, t4
+ 8: PUTL t4, R28
+ 9: INCEIPL $4
+
+ 0x25475AE4: 7D55C92E stwx r10,r21,r25
+ 10: GETL R25, t6
+ 11: GETL R21, t8
+ 12: ADDL t8, t6
+ 13: GETL R10, t10
+ 14: STL t10, (t6)
+ 15: INCEIPL $4
+
+ 0x25475AE8: 289C0001 cmpli cr1,r28,1
+ 16: GETL R28, t12
+ 17: MOVL $0x1, t16
+ 18: CMPUL t12, t16, t14 (-rSo)
+ 19: ICRFL t14, $0x1, CR
+ 20: INCEIPL $4
+
+ 0x25475AEC: 813D0008 lwz r9,8(r29)
+ 21: GETL R29, t18
+ 22: ADDL $0x8, t18
+ 23: LDL (t18), t20
+ 24: PUTL t20, R9
+ 25: INCEIPL $4
+
+ 0x25475AF0: 801D0010 lwz r0,16(r29)
+ 26: GETL R29, t22
+ 27: ADDL $0x10, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R0
+ 30: INCEIPL $4
+
+ 0x25475AF4: 81F10004 lwz r15,4(r17)
+ 31: GETL R17, t26
+ 32: ADDL $0x4, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R15
+ 35: INCEIPL $4
+
+ 0x25475AF8: 7C690214 add r3,r9,r0
+ 36: GETL R9, t30
+ 37: GETL R0, t32
+ 38: ADDL t30, t32
+ 39: PUTL t32, R3
+ 40: INCEIPL $4
+
+ 0x25475AFC: 7D837A14 add r12,r3,r15
+ 41: GETL R3, t34
+ 42: GETL R15, t36
+ 43: ADDL t34, t36
+ 44: PUTL t36, R12
+ 45: INCEIPL $4
+
+ 0x25475B00: 7DCF00D0 neg r14,r15
+ 46: GETL R15, t38
+ 47: NEGL t38
+ 48: PUTL t38, R14
+ 49: INCEIPL $4
+
+ 0x25475B04: 396CFFFF addi r11,r12,-1
+ 50: GETL R12, t40
+ 51: ADDL $0xFFFFFFFF, t40
+ 52: PUTL t40, R11
+ 53: INCEIPL $4
+
+ 0x25475B08: 7D687038 and r8,r11,r14
+ 54: GETL R11, t42
+ 55: GETL R14, t44
+ 56: ANDL t42, t44
+ 57: PUTL t44, R8
+ 58: INCEIPL $4
+
+ 0x25475B0C: 7D75CA14 add r11,r21,r25
+ 59: GETL R21, t46
+ 60: GETL R25, t48
+ 61: ADDL t46, t48
+ 62: PUTL t48, R11
+ 63: INCEIPL $4
+
+ 0x25475B10: 910B0004 stw r8,4(r11)
+ 64: GETL R8, t50
+ 65: GETL R11, t52
+ 66: ADDL $0x4, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0x25475B14: 3B390018 addi r25,r25,24
+ 69: GETL R25, t54
+ 70: ADDL $0x18, t54
+ 71: PUTL t54, R25
+ 72: INCEIPL $4
+
+ 0x25475B18: 809D0008 lwz r4,8(r29)
+ 73: GETL R29, t56
+ 74: ADDL $0x8, t56
+ 75: LDL (t56), t58
+ 76: PUTL t58, R4
+ 77: INCEIPL $4
+
+ 0x25475B1C: 80DD0010 lwz r6,16(r29)
+ 78: GETL R29, t60
+ 79: ADDL $0x10, t60
+ 80: LDL (t60), t62
+ 81: PUTL t62, R6
+ 82: INCEIPL $4
+
+ 0x25475B20: 7CA43214 add r5,r4,r6
+ 83: GETL R4, t64
+ 84: GETL R6, t66
+ 85: ADDL t64, t66
+ 86: PUTL t66, R5
+ 87: INCEIPL $4
+
+ 0x25475B24: 90AB0008 stw r5,8(r11)
+ 88: GETL R5, t68
+ 89: GETL R11, t70
+ 90: ADDL $0x8, t70
+ 91: STL t68, (t70)
+ 92: INCEIPL $4
+
+ 0x25475B28: 813D0008 lwz r9,8(r29)
+ 93: GETL R29, t72
+ 94: ADDL $0x8, t72
+ 95: LDL (t72), t74
+ 96: PUTL t74, R9
+ 97: INCEIPL $4
+
+ 0x25475B2C: 801D0014 lwz r0,20(r29)
+ 98: GETL R29, t76
+ 99: ADDL $0x14, t76
+ 100: LDL (t76), t78
+ 101: PUTL t78, R0
+ 102: INCEIPL $4
+
+ 0x25475B30: 7C690214 add r3,r9,r0
+ 103: GETL R9, t80
+ 104: GETL R0, t82
+ 105: ADDL t80, t82
+ 106: PUTL t82, R3
+ 107: INCEIPL $4
+
+ 0x25475B34: 906B000C stw r3,12(r11)
+ 108: GETL R3, t84
+ 109: GETL R11, t86
+ 110: ADDL $0xC, t86
+ 111: STL t84, (t86)
+ 112: INCEIPL $4
+
+ 0x25475B38: 81910004 lwz r12,4(r17)
+ 113: GETL R17, t88
+ 114: ADDL $0x4, t88
+ 115: LDL (t88), t90
+ 116: PUTL t90, R12
+ 117: INCEIPL $4
+
+ 0x25475B3C: 81DD0004 lwz r14,4(r29)
+ 118: GETL R29, t92
+ 119: ADDL $0x4, t92
+ 120: LDL (t92), t94
+ 121: PUTL t94, R14
+ 122: INCEIPL $4
+
+ 0x25475B40: 7DEC00D0 neg r15,r12
+ 123: GETL R12, t96
+ 124: NEGL t96
+ 125: PUTL t96, R15
+ 126: INCEIPL $4
+
+ 0x25475B44: 7DC87838 and r8,r14,r15
+ 127: GETL R14, t98
+ 128: GETL R15, t100
+ 129: ANDL t98, t100
+ 130: PUTL t100, R8
+ 131: INCEIPL $4
+
+ 0x25475B48: 910B0010 stw r8,16(r11)
+ 132: GETL R8, t102
+ 133: GETL R11, t104
+ 134: ADDL $0x10, t104
+ 135: STL t102, (t104)
+ 136: INCEIPL $4
+
+ 0x25475B4C: 40850018 bc 4,5,0x25475B64
+ 137: Jc05o $0x25475B64
+
+
+. 0 25475ADC 116
+. 7D 4A 40 78 3B 9C 00 01 7D 55 C9 2E 28 9C 00 01 81 3D 00 08 80 1D 00 10 81 F1 00 04 7C 69 02 14 7D 83 7A 14 7D CF 00 D0 39 6C FF FF 7D 68 70 38 7D 75 CA 14 91 0B 00 04 3B 39 00 18 80 9D 00 08 80 DD 00 10 7C A4 32 14 90 AB 00 08 81 3D 00 08 80 1D 00 14 7C 69 02 14 90 6B 00 0C 81 91 00 04 81 DD 00 04 7D EC 00 D0 7D C8 78 38 91 0B 00 10 40 85 00 18
+
+==== BB 494 (0x25475B64) approx BBs exec'd 0 ====
+
+ 0x25475B64: 807D0018 lwz r3,24(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25475B68: 3D807351 lis r12,29521
+ 5: MOVL $0x73510000, t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0x25475B6C: 618E6240 ori r14,r12,0x6240
+ 8: MOVL $0x73516240, t6
+ 9: PUTL t6, R14
+ 10: INCEIPL $4
+
+ 0x25475B70: 546F16FA rlwinm r15,r3,2,27,29
+ 11: GETL R3, t8
+ 12: ROLL $0x2, t8
+ 13: ANDL $0x1C, t8
+ 14: PUTL t8, R15
+ 15: INCEIPL $4
+
+ 0x25475B74: 7DC87E30 sraw r8,r14,r15
+ 16: GETL R14, t12
+ 17: GETL R15, t10
+ 18: SARL t10, t12 (-wCa)
+ 19: PUTL t12, R8
+ 20: INCEIPL $4
+
+ 0x25475B78: 5506073E rlwinm r6,r8,0,28,31
+ 21: GETL R8, t14
+ 22: ANDL $0xF, t14
+ 23: PUTL t14, R6
+ 24: INCEIPL $4
+
+ 0x25475B7C: 90CB0014 stw r6,20(r11)
+ 25: GETL R6, t16
+ 26: GETL R11, t18
+ 27: ADDL $0x14, t18
+ 28: STL t16, (t18)
+ 29: INCEIPL $4
+
+ 0x25475B80: 4BFFFC78 b 0x254757F8
+ 30: JMPo $0x254757F8 ($4)
+
+
+. 0 25475B64 32
+. 80 7D 00 18 3D 80 73 51 61 8E 62 40 54 6F 16 FA 7D C8 7E 30 55 06 07 3E 90 CB 00 14 4B FF FC 78
+
+==== BB 495 (0x254757F8) approx BBs exec'd 0 ====
+
+ 0x254757F8: 54EF2834 rlwinm r15,r7,5,0,26
+ 0: GETL R7, t0
+ 1: SHLL $0x5, t0
+ 2: PUTL t0, R15
+ 3: INCEIPL $4
+
+ 0x254757FC: 3BBD0020 addi r29,r29,32
+ 4: GETL R29, t2
+ 5: ADDL $0x20, t2
+ 6: PUTL t2, R29
+ 7: INCEIPL $4
+
+ 0x25475800: 7DCFDA14 add r14,r15,r27
+ 8: GETL R15, t4
+ 9: GETL R27, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R14
+ 12: INCEIPL $4
+
+ 0x25475804: 7C8EE840 cmpl cr1,r14,r29
+ 13: GETL R14, t8
+ 14: GETL R29, t10
+ 15: CMPUL t8, t10, t12 (-rSo)
+ 16: ICRFL t12, $0x1, CR
+ 17: INCEIPL $4
+
+ 0x25475808: 408500BC bc 4,5,0x254758C4
+ 18: Jc05o $0x254758C4
+
+
+. 0 254757F8 20
+. 54 EF 28 34 3B BD 00 20 7D CF DA 14 7C 8E E8 40 40 85 00 BC
+
+==== BB 496 (0x25475B50) approx BBs exec'd 0 ====
+
+ 0x25475B50: 808BFFEC lwz r4,-20(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0xFFFFFFEC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25475B54: 7E045000 cmp cr4,r4,r10
+ 5: GETL R4, t4
+ 6: GETL R10, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x4, CR
+ 9: INCEIPL $4
+
+ 0x25475B58: 4192000C bc 12,18,0x25475B64
+ 10: Js18o $0x25475B64
+
+
+. 0 25475B50 12
+. 80 8B FF EC 7E 04 50 00 41 92 00 0C
+
+==== BB 497 (0x25475B5C) approx BBs exec'd 0 ====
+
+ 0x25475B5C: 39400001 li r10,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x25475B60: 915F00A8 stw r10,168(r31)
+ 3: GETL R10, t2
+ 4: GETL R31, t4
+ 5: ADDL $0xA8, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x25475B64: 807D0018 lwz r3,24(r29)
+ 8: GETL R29, t6
+ 9: ADDL $0x18, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0x25475B68: 3D807351 lis r12,29521
+ 13: MOVL $0x73510000, t10
+ 14: PUTL t10, R12
+ 15: INCEIPL $4
+
+ 0x25475B6C: 618E6240 ori r14,r12,0x6240
+ 16: MOVL $0x73516240, t12
+ 17: PUTL t12, R14
+ 18: INCEIPL $4
+
+ 0x25475B70: 546F16FA rlwinm r15,r3,2,27,29
+ 19: GETL R3, t14
+ 20: ROLL $0x2, t14
+ 21: ANDL $0x1C, t14
+ 22: PUTL t14, R15
+ 23: INCEIPL $4
+
+ 0x25475B74: 7DC87E30 sraw r8,r14,r15
+ 24: GETL R14, t18
+ 25: GETL R15, t16
+ 26: SARL t16, t18 (-wCa)
+ 27: PUTL t18, R8
+ 28: INCEIPL $4
+
+ 0x25475B78: 5506073E rlwinm r6,r8,0,28,31
+ 29: GETL R8, t20
+ 30: ANDL $0xF, t20
+ 31: PUTL t20, R6
+ 32: INCEIPL $4
+
+ 0x25475B7C: 90CB0014 stw r6,20(r11)
+ 33: GETL R6, t22
+ 34: GETL R11, t24
+ 35: ADDL $0x14, t24
+ 36: STL t22, (t24)
+ 37: INCEIPL $4
+
+ 0x25475B80: 4BFFFC78 b 0x254757F8
+ 38: JMPo $0x254757F8 ($4)
+
+
+. 0 25475B5C 40
+. 39 40 00 01 91 5F 00 A8 80 7D 00 18 3D 80 73 51 61 8E 62 40 54 6F 16 FA 7D C8 7E 30 55 06 07 3E 90 CB 00 14 4B FF FC 78
+
+==== BB 498 (0x254757F0) approx BBs exec'd 0 ====
+
+ 0x254757F0: 2C890002 cmpi cr1,r9,2
+ 0: GETL R9, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254757F4: 418603B8 bc 12,6,0x25475BAC
+ 5: Js06o $0x25475BAC
+
+
+. 0 254757F0 8
+. 2C 89 00 02 41 86 03 B8
+
+==== BB 499 (0x25475BAC) approx BBs exec'd 0 ====
+
+ 0x25475BAC: 807D0014 lwz r3,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25475BB0: 819D0008 lwz r12,8(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25475BB4: 546BE8FE rlwinm r11,r3,29,3,31
+ 10: GETL R3, t8
+ 11: SHRL $0x3, t8
+ 12: PUTL t8, R11
+ 13: INCEIPL $4
+
+ 0x25475BB8: 919A0008 stw r12,8(r26)
+ 14: GETL R12, t10
+ 15: GETL R26, t12
+ 16: ADDL $0x8, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x25475BBC: B17A0156 sth r11,342(r26)
+ 19: GETL R11, t14
+ 20: GETL R26, t16
+ 21: ADDL $0x156, t16
+ 22: STW t14, (t16)
+ 23: INCEIPL $4
+
+ 0x25475BC0: 4BFFFC38 b 0x254757F8
+ 24: JMPo $0x254757F8 ($4)
+
+
+. 0 25475BAC 24
+. 80 7D 00 14 81 9D 00 08 54 6B E8 FE 91 9A 00 08 B1 7A 01 56 4B FF FC 38
+
+==== BB 500 (0x25475820) approx BBs exec'd 0 ====
+
+ 0x25475820: 3DC06474 lis r14,25716
+ 0: MOVL $0x64740000, t0
+ 1: PUTL t0, R14
+ 2: INCEIPL $4
+
+ 0x25475824: 61C0E551 ori r0,r14,0xE551
+ 3: MOVL $0x6474E551, t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x25475828: 7E090000 cmp cr4,r9,r0
+ 6: GETL R9, t4
+ 7: GETL R0, t6
+ 8: CMPL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x4, CR
+ 10: INCEIPL $4
+
+ 0x2547582C: 41920278 bc 12,18,0x25475AA4
+ 11: Js18o $0x25475AA4
+
+
+. 0 25475820 16
+. 3D C0 64 74 61 C0 E5 51 7E 09 00 00 41 92 02 78
+
+==== BB 501 (0x25475AA4) approx BBs exec'd 0 ====
+
+ 0x25475AA4: 815D0018 lwz r10,24(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25475AA8: 915F00A4 stw r10,164(r31)
+ 5: GETL R10, t4
+ 6: GETL R31, t6
+ 7: ADDL $0xA4, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25475AAC: 4BFFFD4C b 0x254757F8
+ 10: JMPo $0x254757F8 ($4)
+
+
+. 0 25475AA4 12
+. 81 5D 00 18 91 5F 00 A4 4B FF FD 4C
+
+==== BB 502 (0x254758C4) approx BBs exec'd 0 ====
+
+ 0x254758C4: 2E1C0000 cmpi cr4,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x254758C8: 419202BC bc 12,18,0x25475B84
+ 4: Js18o $0x25475B84
+
+
+. 0 254758C4 8
+. 2E 1C 00 00 41 92 02 BC
+
+==== BB 503 (0x254758CC) approx BBs exec'd 0 ====
+
+ 0x254758CC: 1DFC0018 mulli r15,r28,24
+ 0: GETL R28, t0
+ 1: MULL $0x18, t0
+ 2: PUTL t0, R15
+ 3: INCEIPL $4
+
+ 0x254758D0: 839F009C lwz r28,156(r31)
+ 4: GETL R31, t2
+ 5: ADDL $0x9C, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x254758D4: 81750000 lwz r11,0(r21)
+ 9: GETL R21, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x254758D8: 7EBDAB78 or r29,r21,r21
+ 13: GETL R21, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0x254758DC: 2E1C0003 cmpi cr4,r28,3
+ 16: GETL R28, t12
+ 17: MOVL $0x3, t16
+ 18: CMPL t12, t16, t14 (-rSo)
+ 19: ICRFL t14, $0x4, CR
+ 20: INCEIPL $4
+
+ 0x254758E0: 7F8FAA14 add r28,r15,r21
+ 21: GETL R15, t18
+ 22: GETL R21, t20
+ 23: ADDL t18, t20
+ 24: PUTL t20, R28
+ 25: INCEIPL $4
+
+ 0x254758E4: 833CFFF4 lwz r25,-12(r28)
+ 26: GETL R28, t22
+ 27: ADDL $0xFFFFFFF4, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R25
+ 30: INCEIPL $4
+
+ 0x254758E8: 7DCBC850 subf r14,r11,r25
+ 31: GETL R11, t26
+ 32: GETL R25, t28
+ 33: SUBL t26, t28
+ 34: PUTL t28, R14
+ 35: INCEIPL $4
+
+ 0x254758EC: 40920818 bc 4,18,0x25476104
+ 36: Jc18o $0x25476104
+
+
+. 0 254758CC 36
+. 1D FC 00 18 83 9F 00 9C 81 75 00 00 7E BD AB 78 2E 1C 00 03 7F 8F AA 14 83 3C FF F4 7D CB C8 50 40 92 08 18
+
+==== BB 504 (0x254758F0) approx BBs exec'd 0 ====
+
+ 0x254758F0: 8191004C lwz r12,76(r17)
+ 0: GETL R17, t0
+ 1: ADDL $0x4C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x254758F4: 7DC47378 or r4,r14,r14
+ 5: GETL R14, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x254758F8: 7EE3BB78 or r3,r23,r23
+ 8: GETL R23, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x254758FC: 7D656038 and r5,r11,r12
+ 11: GETL R11, t8
+ 12: GETL R12, t10
+ 13: ANDL t8, t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0x25475900: 4800ADE9 bl 0x254806E8
+ 16: MOVL $0x25475904, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0x254806E8 ($4)
+
+
+. 0 254758F0 20
+. 81 91 00 4C 7D C4 73 78 7E E3 BB 78 7D 65 60 38 48 00 AD E9
+
+==== BB 505 __elf_preferred_address(0x254806E8) approx BBs exec'd 0 ====
+
+ 0x254806E8: 7CA32B79 or. r3,r5,r5
+ 0: GETL R5, t0
+ 1: PUTL t0, R3
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254806EC: 7D8802A6 mflr r12
+ 5: GETL LR, t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0x254806F0: 9421FFE0 stwu r1,-32(r1)
+ 8: GETL R1, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xFFFFFFE0, t8
+ 11: PUTL t8, R1
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x254806F4: 4801690D bl 0x25497000
+ 14: MOVL $0x254806F8, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x25497000 ($4)
+
+
+. 0 254806E8 16
+. 7C A3 2B 79 7D 88 02 A6 94 21 FF E0 48 01 69 0D
+
+==== BB 506 (0x254806F8) approx BBs exec'd 0 ====
+
+ 0x254806F8: 93A10014 stw r29,20(r1)
+ 0: GETL R29, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254806FC: 7C9D2378 or r29,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25480700: 93C10018 stw r30,24(r1)
+ 8: GETL R30, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x18, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25480704: 7FC802A6 mflr r30
+ 13: GETL LR, t10
+ 14: PUTL t10, R30
+ 15: INCEIPL $4
+
+ 0x25480708: 93810010 stw r28,16(r1)
+ 16: GETL R28, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x10, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x2548070C: 93E1001C stw r31,28(r1)
+ 21: GETL R31, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25480710: 7D8803A6 mtlr r12
+ 26: GETL R12, t20
+ 27: PUTL t20, LR
+ 28: INCEIPL $4
+
+ 0x25480714: 408200FC bc 4,2,0x25480810
+ 29: Jc02o $0x25480810
+
+
+. 0 254806F8 32
+. 93 A1 00 14 7C 9D 23 78 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 E1 00 1C 7D 88 03 A6 40 82 00 FC
+
+==== BB 507 (0x25480718) approx BBs exec'd 0 ====
+
+ 0x25480718: 3CC00003 lis r6,3
+ 0: MOVL $0x30000, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x2548071C: 83FE04F4 lwz r31,1268(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0x4F4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0x25480720: 809E04C8 lwz r4,1224(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x4C8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25480724: 60C6FFFF ori r6,r6,0xFFFF
+ 13: MOVL $0x3FFFF, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x25480728: 3CE07000 lis r7,28672
+ 16: MOVL $0x70000000, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0x2548072C: 3980000F li r12,15
+ 19: MOVL $0xF, t14
+ 20: PUTL t14, R12
+ 21: INCEIPL $4
+
+ 0x25480730: 81640000 lwz r11,0(r4)
+ 22: GETL R4, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R11
+ 25: INCEIPL $4
+
+ 0x25480734: 38840018 addi r4,r4,24
+ 26: GETL R4, t20
+ 27: ADDL $0x18, t20
+ 28: PUTL t20, R4
+ 29: INCEIPL $4
+
+ 0x25480738: 2F8B0000 cmpi cr7,r11,0
+ 30: GETL R11, t22
+ 31: CMP0L t22, t24 (-rSo)
+ 32: ICRFL t24, $0x7, CR
+ 33: INCEIPL $4
+
+ 0x2548073C: 419E009C bc 12,30,0x254807D8
+ 34: Js30o $0x254807D8
+
+
+. 0 25480718 40
+. 3C C0 00 03 83 FE 04 F4 80 9E 04 C8 60 C6 FF FF 3C E0 70 00 39 80 00 0F 81 64 00 00 38 84 00 18 2F 8B 00 00 41 9E 00 9C
+
+==== BB 508 (0x25480740) approx BBs exec'd 0 ====
+
+ 0x25480740: 813F0004 lwz r9,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25480744: 38A9FFFF addi r5,r9,-1
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x25480748: 7CA328F8 nor r3,r5,r5
+ 9: GETL R5, t6
+ 10: NOTL t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0x2548074C: 800B01A4 lwz r0,420(r11)
+ 13: GETL R11, t8
+ 14: ADDL $0x1A4, t8
+ 15: LDL (t8), t10
+ 16: PUTL t10, R0
+ 17: INCEIPL $4
+
+ 0x25480750: 838B01A0 lwz r28,416(r11)
+ 18: GETL R11, t12
+ 19: ADDL $0x1A0, t12
+ 20: LDL (t12), t14
+ 21: PUTL t14, R28
+ 22: INCEIPL $4
+
+ 0x25480754: 7C082B78 or r8,r0,r5
+ 23: GETL R0, t16
+ 24: GETL R5, t18
+ 25: ORL t18, t16
+ 26: PUTL t16, R8
+ 27: INCEIPL $4
+
+ 0x25480758: 7C883840 cmpl cr1,r8,r7
+ 28: GETL R8, t20
+ 29: GETL R7, t22
+ 30: CMPUL t20, t22, t24 (-rSo)
+ 31: ICRFL t24, $0x1, CR
+ 32: INCEIPL $4
+
+ 0x2548075C: 7F8A1838 and r10,r28,r3
+ 33: GETL R28, t26
+ 34: GETL R3, t28
+ 35: ANDL t26, t28
+ 36: PUTL t28, R10
+ 37: INCEIPL $4
+
+ 0x25480760: 40840010 bc 4,4,0x25480770
+ 38: Jc04o $0x25480770
+
+
+. 0 25480740 36
+. 81 3F 00 04 38 A9 FF FF 7C A3 28 F8 80 0B 01 A4 83 8B 01 A0 7C 08 2B 78 7C 88 38 40 7F 8A 18 38 40 84 00 10
+
+==== BB 509 (0x25480764) approx BBs exec'd 0 ====
+
+ 0x25480764: 838B0180 lwz r28,384(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x25480768: 7789C000 andis. r9,r28,0xC000
+ 5: GETL R28, t4
+ 6: ANDL $0xC0000000, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x2548076C: 4082000C bc 4,2,0x25480778
+ 11: Jc02o $0x25480778
+
+
+. 0 25480764 12
+. 83 8B 01 80 77 89 C0 00 40 82 00 0C
+
+==== BB 510 (0x25480770) approx BBs exec'd 0 ====
+
+ 0x25480770: 7F075040 cmpl cr6,r7,r10
+ 0: GETL R7, t0
+ 1: GETL R10, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25480774: 40980054 bc 4,24,0x254807C8
+ 5: Jc24o $0x254807C8
+
+
+. 0 25480770 8
+. 7F 07 50 40 40 98 00 54
+
+==== BB 511 (0x254807C8) approx BBs exec'd 0 ====
+
+ 0x254807C8: 7D475378 or r7,r10,r10
+ 0: GETL R10, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x254807CC: 816B000C lwz r11,12(r11)
+ 3: GETL R11, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x254807D0: 2C8B0000 cmpi cr1,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x254807D4: 4086FF78 bc 4,6,0x2548074C
+ 12: Jc06o $0x2548074C
+
+
+. 0 254807C8 16
+. 7D 47 53 78 81 6B 00 0C 2C 8B 00 00 40 86 FF 78
+
+==== BB 512 (0x2548074C) approx BBs exec'd 0 ====
+
+ 0x2548074C: 800B01A4 lwz r0,420(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x1A4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25480750: 838B01A0 lwz r28,416(r11)
+ 5: GETL R11, t4
+ 6: ADDL $0x1A0, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25480754: 7C082B78 or r8,r0,r5
+ 10: GETL R0, t8
+ 11: GETL R5, t10
+ 12: ORL t10, t8
+ 13: PUTL t8, R8
+ 14: INCEIPL $4
+
+ 0x25480758: 7C883840 cmpl cr1,r8,r7
+ 15: GETL R8, t12
+ 16: GETL R7, t14
+ 17: CMPUL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x1, CR
+ 19: INCEIPL $4
+
+ 0x2548075C: 7F8A1838 and r10,r28,r3
+ 20: GETL R28, t18
+ 21: GETL R3, t20
+ 22: ANDL t18, t20
+ 23: PUTL t20, R10
+ 24: INCEIPL $4
+
+ 0x25480760: 40840010 bc 4,4,0x25480770
+ 25: Jc04o $0x25480770
+
+
+. 0 2548074C 24
+. 80 0B 01 A4 83 8B 01 A0 7C 08 2B 78 7C 88 38 40 7F 8A 18 38 40 84 00 10
+
+==== BB 513 (0x25480778) approx BBs exec'd 0 ====
+
+ 0x25480778: 7C064010 subfc r0,r6,r8
+ 0: GETL R6, t0
+ 1: GETL R8, t2
+ 2: SBBL t0, t2 (-wCa)
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2548077C: 38000000 li r0,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x25480780: 7C000114 adde r0,r0,r0
+ 8: GETL R0, t6
+ 9: GETL R0, t8
+ 10: ADCL t6, t8 (-rCa-wCa)
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x25480784: 7D2A3010 subfc r9,r10,r6
+ 13: GETL R10, t10
+ 14: GETL R6, t12
+ 15: SBBL t10, t12 (-wCa)
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x25480788: 39200000 li r9,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R9
+ 20: INCEIPL $4
+
+ 0x2548078C: 7D294914 adde r9,r9,r9
+ 21: GETL R9, t16
+ 22: GETL R9, t18
+ 23: ADCL t16, t18 (-rCa-wCa)
+ 24: PUTL t18, R9
+ 25: INCEIPL $4
+
+ 0x25480790: 7C1C4839 and. r28,r0,r9
+ 26: GETL R0, t20
+ 27: GETL R9, t22
+ 28: ANDL t20, t22
+ 29: PUTL t22, R28
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x0, CR
+ 32: INCEIPL $4
+
+ 0x25480794: 40820094 bc 4,2,0x25480828
+ 33: Jc02o $0x25480828
+
+
+. 0 25480778 32
+. 7C 06 40 10 38 00 00 00 7C 00 01 14 7D 2A 30 10 39 20 00 00 7D 29 49 14 7C 1C 48 39 40 82 00 94
+
+==== BB 514 (0x25480798) approx BBs exec'd 0 ====
+
+ 0x25480798: 7C083810 subfc r0,r8,r7
+ 0: GETL R8, t0
+ 1: GETL R7, t2
+ 2: SBBL t0, t2 (-wCa)
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2548079C: 38000000 li r0,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x254807A0: 7C000114 adde r0,r0,r0
+ 8: GETL R0, t6
+ 9: GETL R0, t8
+ 10: ADCL t6, t8 (-rCa-wCa)
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x254807A4: 7D265010 subfc r9,r6,r10
+ 13: GETL R6, t10
+ 14: GETL R10, t12
+ 15: SBBL t10, t12 (-wCa)
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x254807A8: 39200000 li r9,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R9
+ 20: INCEIPL $4
+
+ 0x254807AC: 7D294914 adde r9,r9,r9
+ 21: GETL R9, t16
+ 22: GETL R9, t18
+ 23: ADCL t16, t18 (-rCa-wCa)
+ 24: PUTL t18, R9
+ 25: INCEIPL $4
+
+ 0x254807B0: 7C1C4839 and. r28,r0,r9
+ 26: GETL R0, t20
+ 27: GETL R9, t22
+ 28: ANDL t20, t22
+ 29: PUTL t22, R28
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x0, CR
+ 32: INCEIPL $4
+
+ 0x254807B4: 41820018 bc 12,2,0x254807CC
+ 33: Js02o $0x254807CC
+
+
+. 0 25480798 32
+. 7C 08 38 10 38 00 00 00 7C 00 01 14 7D 26 50 10 39 20 00 00 7D 29 49 14 7C 1C 48 39 41 82 00 18
+
+==== BB 515 (0x254807CC) approx BBs exec'd 0 ====
+
+ 0x254807CC: 816B000C lwz r11,12(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254807D0: 2C8B0000 cmpi cr1,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x254807D4: 4086FF78 bc 4,6,0x2548074C
+ 9: Jc06o $0x2548074C
+
+
+. 0 254807CC 12
+. 81 6B 00 0C 2C 8B 00 00 40 86 FF 78
+
+==== BB 516 (0x254807D8) approx BBs exec'd 0 ====
+
+ 0x254807D8: 358CFFFF addic. r12,r12,-1
+ 0: GETL R12, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R12
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x254807DC: 4080FF54 bc 4,0,0x25480730
+ 6: Jc00o $0x25480730
+
+
+. 0 254807D8 8
+. 35 8C FF FF 40 80 FF 54
+
+==== BB 517 (0x25480730) approx BBs exec'd 0 ====
+
+ 0x25480730: 81640000 lwz r11,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25480734: 38840018 addi r4,r4,24
+ 4: GETL R4, t4
+ 5: ADDL $0x18, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25480738: 2F8B0000 cmpi cr7,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x2548073C: 419E009C bc 12,30,0x254807D8
+ 12: Js30o $0x254807D8
+
+
+. 0 25480730 16
+. 81 64 00 00 38 84 00 18 2F 8B 00 00 41 9E 00 9C
+
+==== BB 518 (0x254807E0) approx BBs exec'd 0 ====
+
+ 0x254807E0: 3C67FFFF addis r3,r7,-1
+ 0: GETL R7, t0
+ 1: ADDL $0xFFFF0000, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x254807E4: 80FF0004 lwz r7,4(r31)
+ 4: GETL R31, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x254807E8: 7F033040 cmpl cr6,r3,r6
+ 9: GETL R3, t6
+ 10: GETL R6, t8
+ 11: CMPUL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0x254807EC: 3887FFFF addi r4,r7,-1
+ 14: GETL R7, t12
+ 15: ADDL $0xFFFFFFFF, t12
+ 16: PUTL t12, R4
+ 17: INCEIPL $4
+
+ 0x254807F0: 7C85EB78 or r5,r4,r29
+ 18: GETL R4, t14
+ 19: GETL R29, t16
+ 20: ORL t16, t14
+ 21: PUTL t14, R5
+ 22: INCEIPL $4
+
+ 0x254807F4: 38850001 addi r4,r5,1
+ 23: GETL R5, t18
+ 24: ADDL $0x1, t18
+ 25: PUTL t18, R4
+ 26: INCEIPL $4
+
+ 0x254807F8: 40990014 bc 4,25,0x2548080C
+ 27: Jc25o $0x2548080C
+
+
+. 0 254807E0 28
+. 3C 67 FF FF 80 FF 00 04 7F 03 30 40 38 87 FF FF 7C 85 EB 78 38 85 00 01 40 99 00 14
+
+==== BB 519 (0x254807FC) approx BBs exec'd 0 ====
+
+ 0x254807FC: 7D061850 subf r8,r6,r3
+ 0: GETL R6, t0
+ 1: GETL R3, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25480800: 7C641850 subf r3,r4,r3
+ 5: GETL R4, t4
+ 6: GETL R3, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25480804: 7F882040 cmpl cr7,r8,r4
+ 10: GETL R8, t8
+ 11: GETL R4, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0x25480808: 409C0008 bc 4,28,0x25480810
+ 15: Jc28o $0x25480810
+
+
+. 0 254807FC 16
+. 7D 06 18 50 7C 64 18 50 7F 88 20 40 40 9C 00 08
+
+==== BB 520 (0x25480810) approx BBs exec'd 0 ====
+
+ 0x25480810: 83810010 lwz r28,16(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x25480814: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x25480818: 83C10018 lwz r30,24(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R30
+ 14: INCEIPL $4
+
+ 0x2548081C: 83E1001C lwz r31,28(r1)
+ 15: GETL R1, t12
+ 16: ADDL $0x1C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R31
+ 19: INCEIPL $4
+
+ 0x25480820: 38210020 addi r1,r1,32
+ 20: GETL R1, t16
+ 21: ADDL $0x20, t16
+ 22: PUTL t16, R1
+ 23: INCEIPL $4
+
+ 0x25480824: 4E800020 blr
+ 24: GETL LR, t18
+ 25: JMPo-r t18 ($4)
+
+
+. 0 25480810 24
+. 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 521 (0x25475904) approx BBs exec'd 0 ====
+
+ 0x25475904: 80B50014 lwz r5,20(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25475908: 81150010 lwz r8,16(r21)
+ 5: GETL R21, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x2547590C: 7DC47378 or r4,r14,r14
+ 10: GETL R14, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25475910: 38C00802 li r6,2050
+ 13: MOVL $0x802, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x25475914: 7E679B78 or r7,r19,r19
+ 16: GETL R19, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0x25475918: 4800CE81 bl 0x25482798
+ 19: MOVL $0x2547591C, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x25482798 ($4)
+
+
+. 0 25475904 24
+. 80 B5 00 14 81 15 00 10 7D C4 73 78 38 C0 08 02 7E 67 9B 78 48 00 CE 81
+
+==9225== Reading syms from /home/sewardj/valgrind-2.2.0-ppc/Inst/lib/valgrind/vg_inject.so (0xFFDD000)
+==== BB 522 (0x2547591C) approx BBs exec'd 0 ====
+
+ 0x2547591C: 2F03FFFF cmpi cr6,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25475920: 907A01A0 stw r3,416(r26)
+ 5: GETL R3, t6
+ 6: GETL R26, t8
+ 7: ADDL $0x1A0, t8
+ 8: STL t6, (t8)
+ 9: INCEIPL $4
+
+ 0x25475924: 419A013C bc 12,26,0x25475A60
+ 10: Js26o $0x25475A60
+
+
+. 0 2547591C 12
+. 2F 03 FF FF 90 7A 01 A0 41 9A 01 3C
+
+==== BB 523 (0x25475928) approx BBs exec'd 0 ====
+
+ 0x25475928: 817F00A8 lwz r11,168(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xA8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547592C: 7CA37214 add r5,r3,r14
+ 5: GETL R3, t4
+ 6: GETL R14, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R5
+ 9: INCEIPL $4
+
+ 0x25475930: 90BA01A4 stw r5,420(r26)
+ 10: GETL R5, t8
+ 11: GETL R26, t10
+ 12: ADDL $0x1A4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475934: 2F8B0000 cmpi cr7,r11,0
+ 15: GETL R11, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x25475938: 80F50000 lwz r7,0(r21)
+ 19: GETL R21, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R7
+ 22: INCEIPL $4
+
+ 0x2547593C: 7C071850 subf r0,r7,r3
+ 23: GETL R7, t20
+ 24: GETL R3, t22
+ 25: SUBL t20, t22
+ 26: PUTL t22, R0
+ 27: INCEIPL $4
+
+ 0x25475940: 901A0000 stw r0,0(r26)
+ 28: GETL R0, t24
+ 29: GETL R26, t26
+ 30: STL t24, (t26)
+ 31: INCEIPL $4
+
+ 0x25475944: 409E0534 bc 4,30,0x25475E78
+ 32: Jc30o $0x25475E78
+
+
+. 0 25475928 32
+. 81 7F 00 A8 7C A3 72 14 90 BA 01 A4 2F 8B 00 00 80 F5 00 00 7C 07 18 50 90 1A 00 00 40 9E 05 34
+
+==== BB 524 (0x25475E78) approx BBs exec'd 0 ====
+
+ 0x25475E78: 80750004 lwz r3,4(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25475E7C: 38A00000 li r5,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25475E80: 809CFFF4 lwz r4,-12(r28)
+ 8: GETL R28, t6
+ 9: ADDL $0xFFFFFFF4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25475E84: 7C832050 subf r4,r3,r4
+ 13: GETL R3, t10
+ 14: GETL R4, t12
+ 15: SUBL t10, t12
+ 16: PUTL t12, R4
+ 17: INCEIPL $4
+
+ 0x25475E88: 7C601A14 add r3,r0,r3
+ 18: GETL R0, t14
+ 19: GETL R3, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R3
+ 22: INCEIPL $4
+
+ 0x25475E8C: 4800C92D bl 0x254827B8
+ 23: MOVL $0x25475E90, t18
+ 24: PUTL t18, LR
+ 25: JMPo-c $0x254827B8 ($4)
+
+
+. 0 25475E78 24
+. 80 75 00 04 38 A0 00 00 80 9C FF F4 7C 83 20 50 7C 60 1A 14 48 00 C9 2D
+
+==== BB 525 mprotect(0x254827B8) approx BBs exec'd 0 ====
+
+ 0x254827B8: 3800007D li r0,125
+ 0: MOVL $0x7D, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254827BC: 44000002 sc
+ 3: JMPo-sys $0x254827C0 ($4)
+
+
+. 0 254827B8 8
+. 38 00 00 7D 44 00 00 02
+
+==== BB 526 (0x254827C0) approx BBs exec'd 0 ====
+
+ 0x254827C0: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+. 0 254827C0 4
+. 4C A3 00 20
+
+==== BB 527 (0x25475E90) approx BBs exec'd 0 ====
+
+ 0x25475E90: 4BFFFAB8 b 0x25475948
+ 0: JMPo $0x25475948 ($4)
+
+
+. 0 25475E90 4
+. 4B FF FA B8
+
+==== BB 528 (0x25475948) approx BBs exec'd 0 ====
+
+ 0x25475948: 80DD0014 lwz r6,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547594C: 70C90004 andi. r9,r6,0x4
+ 5: GETL R6, t4
+ 6: ANDL $0x4, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25475950: 41820014 bc 12,2,0x25475964
+ 11: Js02o $0x25475964
+
+
+. 0 25475948 12
+. 80 DD 00 14 70 C9 00 04 41 82 00 14
+
+==== BB 529 (0x25475954) approx BBs exec'd 0 ====
+
+ 0x25475954: 839D0004 lwz r28,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x25475958: 833A0000 lwz r25,0(r26)
+ 5: GETL R26, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R25
+ 8: INCEIPL $4
+
+ 0x2547595C: 7D19E214 add r8,r25,r28
+ 9: GETL R25, t8
+ 10: GETL R28, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R8
+ 13: INCEIPL $4
+
+ 0x25475960: 911A01A8 stw r8,424(r26)
+ 14: GETL R8, t12
+ 15: GETL R26, t14
+ 16: ADDL $0x1A8, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25475964: 819A014C lwz r12,332(r26)
+ 19: GETL R26, t16
+ 20: ADDL $0x14C, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R12
+ 23: INCEIPL $4
+
+ 0x25475968: 2F8C0000 cmpi cr7,r12,0
+ 24: GETL R12, t20
+ 25: CMP0L t20, t22 (-rSo)
+ 26: ICRFL t22, $0x7, CR
+ 27: INCEIPL $4
+
+ 0x2547596C: 409E0038 bc 4,30,0x254759A4
+ 28: Jc30o $0x254759A4
+
+
+. 0 25475954 28
+. 83 9D 00 04 83 3A 00 00 7D 19 E2 14 91 1A 01 A8 81 9A 01 4C 2F 8C 00 00 40 9E 00 38
+
+==== BB 530 (0x25475970) approx BBs exec'd 0 ====
+
+ 0x25475970: 815D0010 lwz r10,16(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25475974: 8178001C lwz r11,28(r24)
+ 5: GETL R24, t4
+ 6: ADDL $0x1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25475978: 7C8A5840 cmpl cr1,r10,r11
+ 10: GETL R10, t8
+ 11: GETL R11, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x2547597C: 41850028 bc 12,5,0x254759A4
+ 15: Js05o $0x254759A4
+
+
+. 0 25475970 16
+. 81 5D 00 10 81 78 00 1C 7C 8A 58 40 41 85 00 28
+
+==== BB 531 (0x25475980) approx BBs exec'd 0 ====
+
+ 0x25475980: 801D0004 lwz r0,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475984: 811D0000 lwz r8,0(r29)
+ 5: GETL R29, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R8
+ 8: INCEIPL $4
+
+ 0x25475988: A138002C lhz r9,44(r24)
+ 9: GETL R24, t8
+ 10: ADDL $0x2C, t8
+ 11: LDW (t8), t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0x2547598C: 7C880050 subf r4,r8,r0
+ 14: GETL R8, t12
+ 15: GETL R0, t14
+ 16: SUBL t12, t14
+ 17: PUTL t14, R4
+ 18: INCEIPL $4
+
+ 0x25475990: 55232834 rlwinm r3,r9,5,0,26
+ 19: GETL R9, t16
+ 20: SHLL $0x5, t16
+ 21: PUTL t16, R3
+ 22: INCEIPL $4
+
+ 0x25475994: 7CA45214 add r5,r4,r10
+ 23: GETL R4, t18
+ 24: GETL R10, t20
+ 25: ADDL t18, t20
+ 26: PUTL t20, R5
+ 27: INCEIPL $4
+
+ 0x25475998: 7CEB1A14 add r7,r11,r3
+ 28: GETL R11, t22
+ 29: GETL R3, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R7
+ 32: INCEIPL $4
+
+ 0x2547599C: 7F053840 cmpl cr6,r5,r7
+ 33: GETL R5, t26
+ 34: GETL R7, t28
+ 35: CMPUL t26, t28, t30 (-rSo)
+ 36: ICRFL t30, $0x6, CR
+ 37: INCEIPL $4
+
+ 0x254759A0: 4098069C bc 4,24,0x2547603C
+ 38: Jc24o $0x2547603C
+
+
+. 0 25475980 36
+. 80 1D 00 04 81 1D 00 00 A1 38 00 2C 7C 88 00 50 55 23 28 34 7C A4 52 14 7C EB 1A 14 7F 05 38 40 40 98 06 9C
+
+==== BB 532 (0x2547603C) approx BBs exec'd 0 ====
+
+ 0x2547603C: 7EE85A14 add r23,r8,r11
+ 0: GETL R8, t0
+ 1: GETL R11, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x25476040: 7D6AB850 subf r11,r10,r23
+ 5: GETL R10, t4
+ 6: GETL R23, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25476044: 917A014C stw r11,332(r26)
+ 10: GETL R11, t8
+ 11: GETL R26, t10
+ 12: ADDL $0x14C, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25476048: 4BFFF95C b 0x254759A4
+ 15: JMPo $0x254759A4 ($4)
+
+
+. 0 2547603C 16
+. 7E E8 5A 14 7D 6A B8 50 91 7A 01 4C 4B FF F9 5C
+
+==== BB 533 (0x254759A4) approx BBs exec'd 0 ====
+
+ 0x254759A4: 809D000C lwz r4,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254759A8: 807D0008 lwz r3,8(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x254759AC: 7C041840 cmpl cr0,r4,r3
+ 10: GETL R4, t8
+ 11: GETL R3, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x254759B0: 40810068 bc 4,1,0x25475A18
+ 15: Jc01o $0x25475A18
+
+
+. 0 254759A4 16
+. 80 9D 00 0C 80 7D 00 08 7C 04 18 40 40 81 00 68
+
+==== BB 534 (0x25475A18) approx BBs exec'd 0 ====
+
+ 0x25475A18: 3BBD0018 addi r29,r29,24
+ 0: GETL R29, t0
+ 1: ADDL $0x18, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x25475A1C: 7F357A14 add r25,r21,r15
+ 4: GETL R21, t2
+ 5: GETL R15, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R25
+ 8: INCEIPL $4
+
+ 0x25475A20: 7F99E840 cmpl cr7,r25,r29
+ 9: GETL R25, t6
+ 10: GETL R29, t8
+ 11: CMPUL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25475A24: 409D01F8 bc 4,29,0x25475C1C
+ 14: Jc29o $0x25475C1C
+
+
+. 0 25475A18 16
+. 3B BD 00 18 7F 35 7A 14 7F 99 E8 40 40 9D 01 F8
+
+==== BB 535 (0x25475A28) approx BBs exec'd 0 ====
+
+ 0x25475A28: 809D0004 lwz r4,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25475A2C: 801D0000 lwz r0,0(r29)
+ 5: GETL R29, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x25475A30: 7C840040 cmpl cr1,r4,r0
+ 9: GETL R4, t8
+ 10: GETL R0, t10
+ 11: CMPUL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x25475A34: 4085FF14 bc 4,5,0x25475948
+ 14: Jc05o $0x25475948
+
+
+. 0 25475A28 16
+. 80 9D 00 04 80 1D 00 00 7C 84 00 40 40 85 FF 14
+
+==== BB 536 (0x25475A38) approx BBs exec'd 0 ====
+
+ 0x25475A38: 815A0000 lwz r10,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0x25475A3C: 7C802050 subf r4,r0,r4
+ 4: GETL R0, t4
+ 5: GETL R4, t6
+ 6: SUBL t4, t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x25475A40: 80BD0014 lwz r5,20(r29)
+ 9: GETL R29, t8
+ 10: ADDL $0x14, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R5
+ 13: INCEIPL $4
+
+ 0x25475A44: 38C00812 li r6,2066
+ 14: MOVL $0x812, t12
+ 15: PUTL t12, R6
+ 16: INCEIPL $4
+
+ 0x25475A48: 811D0010 lwz r8,16(r29)
+ 17: GETL R29, t14
+ 18: ADDL $0x10, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R8
+ 21: INCEIPL $4
+
+ 0x25475A4C: 7C6A0214 add r3,r10,r0
+ 22: GETL R10, t18
+ 23: GETL R0, t20
+ 24: ADDL t18, t20
+ 25: PUTL t20, R3
+ 26: INCEIPL $4
+
+ 0x25475A50: 7E679B78 or r7,r19,r19
+ 27: GETL R19, t22
+ 28: PUTL t22, R7
+ 29: INCEIPL $4
+
+ 0x25475A54: 4800CD45 bl 0x25482798
+ 30: MOVL $0x25475A58, t24
+ 31: PUTL t24, LR
+ 32: JMPo-c $0x25482798 ($4)
+
+
+. 0 25475A38 32
+. 81 5A 00 00 7C 80 20 50 80 BD 00 14 38 C0 08 12 81 1D 00 10 7C 6A 02 14 7E 67 9B 78 48 00 CD 45
+
+==== BB 537 (0x25475A58) approx BBs exec'd 0 ====
+
+ 0x25475A58: 2F03FFFF cmpi cr6,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25475A5C: 409AFEEC bc 4,26,0x25475948
+ 5: Jc26o $0x25475948
+
+
+. 0 25475A58 8
+. 2F 03 FF FF 40 9A FE EC
+
+==== BB 538 (0x254759B4) approx BBs exec'd 0 ====
+
+ 0x254759B4: 80DA0000 lwz r6,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x254759B8: 81710004 lwz r11,4(r17)
+ 4: GETL R17, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0x254759BC: 7F261A14 add r25,r6,r3
+ 9: GETL R6, t8
+ 10: GETL R3, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R25
+ 13: INCEIPL $4
+
+ 0x254759C0: 7EE62214 add r23,r6,r4
+ 14: GETL R6, t12
+ 15: GETL R4, t14
+ 16: ADDL t12, t14
+ 17: PUTL t14, R23
+ 18: INCEIPL $4
+
+ 0x254759C4: 7D0BCA14 add r8,r11,r25
+ 19: GETL R11, t16
+ 20: GETL R25, t18
+ 21: ADDL t16, t18
+ 22: PUTL t18, R8
+ 23: INCEIPL $4
+
+ 0x254759C8: 7C6B00D0 neg r3,r11
+ 24: GETL R11, t20
+ 25: NEGL t20
+ 26: PUTL t20, R3
+ 27: INCEIPL $4
+
+ 0x254759CC: 3948FFFF addi r10,r8,-1
+ 28: GETL R8, t22
+ 29: ADDL $0xFFFFFFFF, t22
+ 30: PUTL t22, R10
+ 31: INCEIPL $4
+
+ 0x254759D0: 7D5C1838 and r28,r10,r3
+ 32: GETL R10, t24
+ 33: GETL R3, t26
+ 34: ANDL t24, t26
+ 35: PUTL t26, R28
+ 36: INCEIPL $4
+
+ 0x254759D4: 7F97E040 cmpl cr7,r23,r28
+ 37: GETL R23, t28
+ 38: GETL R28, t30
+ 39: CMPUL t28, t30, t32 (-rSo)
+ 40: ICRFL t32, $0x7, CR
+ 41: INCEIPL $4
+
+ 0x254759D8: 409C0008 bc 4,28,0x254759E0
+ 42: Jc28o $0x254759E0
+
+
+. 0 254759B4 40
+. 80 DA 00 00 81 71 00 04 7F 26 1A 14 7E E6 22 14 7D 0B CA 14 7C 6B 00 D0 39 48 FF FF 7D 5C 18 38 7F 97 E0 40 40 9C 00 08
+
+==== BB 539 (0x254759DC) approx BBs exec'd 0 ====
+
+ 0x254759DC: 7EFCBB78 or r28,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0x254759E0: 7C9CC840 cmpl cr1,r28,r25
+ 3: GETL R28, t2
+ 4: GETL R25, t4
+ 5: CMPUL t2, t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x254759E4: 4085002C bc 4,5,0x25475A10
+ 8: Jc05o $0x25475A10
+
+
+. 0 254759DC 12
+. 7E FC BB 78 7C 9C C8 40 40 85 00 2C
+
+==== BB 540 (0x254759E8) approx BBs exec'd 0 ====
+
+ 0x254759E8: 80BD0014 lwz r5,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x254759EC: 70AA0002 andi. r10,r5,0x2
+ 5: GETL R5, t4
+ 6: ANDL $0x2, t4
+ 7: PUTL t4, R10
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x254759F0: 41820838 bc 12,2,0x25476228
+ 11: Js02o $0x25476228
+
+
+. 0 254759E8 12
+. 80 BD 00 14 70 AA 00 02 41 82 08 38
+
+==== BB 541 (0x254759F4) approx BBs exec'd 0 ====
+
+ 0x254759F4: 7CB9E050 subf r5,r25,r28
+ 0: GETL R25, t0
+ 1: GETL R28, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x254759F8: 7F23CB78 or r3,r25,r25
+ 5: GETL R25, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254759FC: 38800000 li r4,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x25475A00: 4800DD45 bl 0x25483744
+ 11: MOVL $0x25475A04, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483744 ($4)
+
+
+. 0 254759F4 16
+. 7C B9 E0 50 7F 23 CB 78 38 80 00 00 48 00 DD 45
+
+==== BB 542 memset(0x25483744) approx BBs exec'd 0 ====
+
+ 0x25483744: 28850004 cmpli cr1,r5,4
+ 0: GETL R5, t0
+ 1: MOVL $0x4, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25483748: 70670003 andi. r7,r3,0x3
+ 5: GETL R3, t6
+ 6: ANDL $0x3, t6
+ 7: PUTL t6, R7
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x2548374C: 7C661B78 or r6,r3,r3
+ 11: GETL R3, t10
+ 12: PUTL t10, R6
+ 13: INCEIPL $4
+
+ 0x25483750: 40850190 bc 4,5,0x254838E0
+ 14: Jc05o $0x254838E0
+
+
+. 0 25483744 16
+. 28 85 00 04 70 67 00 03 7C 66 1B 78 40 85 01 90
+
+==== BB 543 (0x25483754) approx BBs exec'd 0 ====
+
+ 0x25483754: 2A85001F cmpli cr5,r5,31
+ 0: GETL R5, t0
+ 1: MOVL $0x1F, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x5, CR
+ 4: INCEIPL $4
+
+ 0x25483758: 5084442E rlwimi r4,r4,8,16,23
+ 5: GETL R4, t6
+ 6: GETL R4, t8
+ 7: ROLL $0x8, t8
+ 8: ANDL $0xFF00, t8
+ 9: ANDL $0xFFFF00FF, t6
+ 10: ORL t6, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x2548375C: 41A20024 bc 13,2,0x25483780
+ 13: Js02o $0x25483780
+
+
+. 0 25483754 12
+. 2A 85 00 1F 50 84 44 2E 41 A2 00 24
+
+==== BB 544 (0x25483780) approx BBs exec'd 0 ====
+
+ 0x25483780: 7CA01120 mtcrf 0x1,r5
+ 0: GETL R5, t0
+ 1: ICRFL t0, $0x7, CR
+ 2: INCEIPL $4
+
+ 0x25483784: 5084801E rlwimi r4,r4,16,0,15
+ 3: GETL R4, t2
+ 4: GETL R4, t4
+ 5: ROLL $0x10, t4
+ 6: ANDL $0xFFFF0000, t4
+ 7: ANDL $0xFFFF, t2
+ 8: ORL t2, t4
+ 9: PUTL t4, R4
+ 10: INCEIPL $4
+
+ 0x25483788: 40950198 bc 4,21,0x25483920
+ 11: Jc21o $0x25483920
+
+
+. 0 25483780 12
+. 7C A0 11 20 50 84 80 1E 40 95 01 98
+
+==== BB 545 (0x2548378C) approx BBs exec'd 0 ====
+
+ 0x2548378C: 70C7001C andi. r7,r6,0x1C
+ 0: GETL R6, t0
+ 1: ANDL $0x1C, t0
+ 2: PUTL t0, R7
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25483790: 20E70020 subfic r7,r7,32
+ 6: GETL R7, t4
+ 7: MOVL $0x20, t6
+ 8: SBBL t4, t6 (-wCa)
+ 9: PUTL t6, R7
+ 10: INCEIPL $4
+
+ 0x25483794: 41820040 bc 12,2,0x254837D4
+ 11: Js02o $0x254837D4
+
+
+. 0 2548378C 12
+. 70 C7 00 1C 20 E7 00 20 41 82 00 40
+
+==== BB 546 (0x25483798) approx BBs exec'd 0 ====
+
+ 0x25483798: 7CE01120 mtcrf 0x1,r7
+ 0: GETL R7, t0
+ 1: ICRFL t0, $0x7, CR
+ 2: INCEIPL $4
+
+ 0x2548379C: 7CC63A14 add r6,r6,r7
+ 3: GETL R6, t2
+ 4: GETL R7, t4
+ 5: ADDL t2, t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0x254837A0: 7CA72850 subf r5,r7,r5
+ 8: GETL R7, t6
+ 9: GETL R5, t8
+ 10: SUBL t6, t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0x254837A4: 28870010 cmpli cr1,r7,16
+ 13: GETL R7, t10
+ 14: MOVL $0x10, t14
+ 15: CMPUL t10, t14, t12 (-rSo)
+ 16: ICRFL t12, $0x1, CR
+ 17: INCEIPL $4
+
+ 0x254837A8: 7CC83378 or r8,r6,r6
+ 18: GETL R6, t16
+ 19: PUTL t16, R8
+ 20: INCEIPL $4
+
+ 0x254837AC: 409C000C bc 4,28,0x254837B8
+ 21: Jc28o $0x254837B8
+
+
+. 0 25483798 24
+. 7C E0 11 20 7C C6 3A 14 7C A7 28 50 28 87 00 10 7C C8 33 78 40 9C 00 0C
+
+==== BB 547 (0x254837B8) approx BBs exec'd 0 ====
+
+ 0x254837B8: 41840014 bc 12,4,0x254837CC
+ 0: Js04o $0x254837CC
+
+
+. 0 254837B8 4
+. 41 84 00 14
+
+==== BB 548 (0x254837CC) approx BBs exec'd 0 ====
+
+ 0x254837CC: 409D0008 bc 4,29,0x254837D4
+ 0: Jc29o $0x254837D4
+
+
+. 0 254837CC 4
+. 40 9D 00 08
+
+==== BB 549 (0x254837D0) approx BBs exec'd 0 ====
+
+ 0x254837D0: 9088FFFC stw r4,-4(r8)
+ 0: GETL R4, t0
+ 1: GETL R8, t2
+ 2: ADDL $0xFFFFFFFC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254837D4: 28840000 cmpli cr1,r4,0
+ 5: GETL R4, t4
+ 6: MOVL $0x0, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x254837D8: 54A70035 rlwinm. r7,r5,0,0,26
+ 10: GETL R5, t10
+ 11: ANDL $0xFFFFFFE0, t10
+ 12: PUTL t10, R7
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x254837DC: 7CA01120 mtcrf 0x1,r5
+ 16: GETL R5, t14
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x254837E0: 418601A0 bc 12,6,0x25483980
+ 19: Js06o $0x25483980
+
+
+. 0 254837D0 20
+. 90 88 FF FC 28 84 00 00 54 A7 00 35 7C A0 11 20 41 86 01 A0
+
+==== BB 550 (0x25483980) approx BBs exec'd 0 ====
+
+ 0x25483980: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25483984: 4182FF9C bc 12,2,0x25483920
+ 3: Js02o $0x25483920
+
+
+. 0 25483980 8
+. 7C 08 02 A6 41 82 FF 9C
+
+==== BB 551 (0x25483988) approx BBs exec'd 0 ====
+
+ 0x25483988: 48013679 bl 0x25497000
+ 0: MOVL $0x2548398C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25497000 ($4)
+
+
+. 0 25483988 4
+. 48 01 36 79
+
+==== BB 552 (0x2548398C) approx BBs exec'd 0 ====
+
+ 0x2548398C: 7D2802A6 mflr r9
+ 0: GETL LR, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25483990: 812904F0 lwz r9,1264(r9)
+ 3: GETL R9, t2
+ 4: ADDL $0x4F0, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x25483994: 81090000 lwz r8,0(r9)
+ 8: GETL R9, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R8
+ 11: INCEIPL $4
+
+ 0x25483998: 7C0803A6 mtlr r0
+ 12: GETL R0, t10
+ 13: PUTL t10, LR
+ 14: INCEIPL $4
+
+ 0x2548399C: 28880000 cmpli cr1,r8,0
+ 15: GETL R8, t12
+ 16: MOVL $0x0, t16
+ 17: CMPUL t12, t16, t14 (-rSo)
+ 18: ICRFL t14, $0x1, CR
+ 19: INCEIPL $4
+
+ 0x254839A0: 4186FE44 bc 12,6,0x254837E4
+ 20: Js06o $0x254837E4
+
+
+. 0 2548398C 24
+. 7D 28 02 A6 81 29 04 F0 81 09 00 00 7C 08 03 A6 28 88 00 00 41 86 FE 44
+
+==== BB 553 (0x254839A4) approx BBs exec'd 0 ====
+
+ 0x254839A4: 28880020 cmpli cr1,r8,32
+ 0: GETL R8, t0
+ 1: MOVL $0x20, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254839A8: 4186FEBC bc 12,6,0x25483864
+ 5: Js06o $0x25483864
+
+
+. 0 254839A4 8
+. 28 88 00 20 41 86 FE BC
+
+==== BB 554 (0x25483864) approx BBs exec'd 0 ====
+
+ 0x25483864: 54A506FE rlwinm r5,r5,0,27,31
+ 0: GETL R5, t0
+ 1: ANDL $0x1F, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0x25483868: 7CE02120 mtcrf 0x2,r7
+ 4: GETL R7, t2
+ 5: ICRFL t2, $0x6, CR
+ 6: INCEIPL $4
+
+ 0x2548386C: 54E0C9FF rlwinm. r0,r7,25,7,31
+ 7: GETL R7, t4
+ 8: SHRL $0x7, t4
+ 9: PUTL t4, R0
+ 10: CMP0L t4, t6 (-rSo)
+ 11: ICRFL t6, $0x0, CR
+ 12: INCEIPL $4
+
+ 0x25483870: 7C0903A6 mtctr r0
+ 13: GETL R0, t8
+ 14: PUTL t8, CTR
+ 15: INCEIPL $4
+
+ 0x25483874: 38E00020 li r7,32
+ 16: MOVL $0x20, t10
+ 17: PUTL t10, R7
+ 18: INCEIPL $4
+
+ 0x25483878: 3900FFC0 li r8,-64
+ 19: MOVL $0xFFFFFFC0, t12
+ 20: PUTL t12, R8
+ 21: INCEIPL $4
+
+ 0x2548387C: 28850010 cmpli cr1,r5,16
+ 22: GETL R5, t14
+ 23: MOVL $0x10, t18
+ 24: CMPUL t14, t18, t16 (-rSo)
+ 25: ICRFL t16, $0x1, CR
+ 26: INCEIPL $4
+
+ 0x25483880: 409A000C bc 4,26,0x2548388C
+ 27: Jc26o $0x2548388C
+
+
+. 0 25483864 32
+. 54 A5 06 FE 7C E0 21 20 54 E0 C9 FF 7C 09 03 A6 38 E0 00 20 39 00 FF C0 28 85 00 10 40 9A 00 0C
+
+==== BB 555 (0x2548388C) approx BBs exec'd 0 ====
+
+ 0x2548388C: 3920FFE0 li r9,-32
+ 0: MOVL $0xFFFFFFE0, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25483890: 40990010 bc 4,25,0x254838A0
+ 3: Jc25o $0x254838A0
+
+
+. 0 2548388C 8
+. 39 20 FF E0 40 99 00 10
+
+==== BB 556 (0x254838A0) approx BBs exec'd 0 ====
+
+ 0x254838A0: 2A850000 cmpli cr5,r5,0
+ 0: GETL R5, t0
+ 1: MOVL $0x0, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x5, CR
+ 4: INCEIPL $4
+
+ 0x254838A4: 4182007C bc 12,2,0x25483920
+ 5: Js02o $0x25483920
+
+
+. 0 254838A0 8
+. 2A 85 00 00 41 82 00 7C
+
+==== BB 557 (0x254838A8) approx BBs exec'd 0 ====
+
+ 0x254838A8: 7C0037EC dcbz r0,r6
+ 0: GETL R6, t0
+ 1: ANDL $0xFFFFFFE0, t0
+ 2: MOVL $0x0, t2
+ 3: STL t2, (t0)
+ 4: ADDL $0x4, t0
+ 5: STL t2, (t0)
+ 6: ADDL $0x4, t0
+ 7: STL t2, (t0)
+ 8: ADDL $0x4, t0
+ 9: STL t2, (t0)
+ 10: ADDL $0x4, t0
+ 11: STL t2, (t0)
+ 12: ADDL $0x4, t0
+ 13: STL t2, (t0)
+ 14: ADDL $0x4, t0
+ 15: STL t2, (t0)
+ 16: ADDL $0x4, t0
+ 17: STL t2, (t0)
+ 18: INCEIPL $4
+
+ 0x254838AC: 7C0737EC dcbz r7,r6
+ 19: GETL R6, t4
+ 20: GETL R7, t6
+ 21: ADDL t6, t4
+ 22: ANDL $0xFFFFFFE0, t4
+ 23: MOVL $0x0, t8
+ 24: STL t8, (t4)
+ 25: ADDL $0x4, t4
+ 26: STL t8, (t4)
+ 27: ADDL $0x4, t4
+ 28: STL t8, (t4)
+ 29: ADDL $0x4, t4
+ 30: STL t8, (t4)
+ 31: ADDL $0x4, t4
+ 32: STL t8, (t4)
+ 33: ADDL $0x4, t4
+ 34: STL t8, (t4)
+ 35: ADDL $0x4, t4
+ 36: STL t8, (t4)
+ 37: ADDL $0x4, t4
+ 38: STL t8, (t4)
+ 39: INCEIPL $4
+
+ 0x254838B0: 38C60080 addi r6,r6,128
+ 40: GETL R6, t10
+ 41: ADDL $0x80, t10
+ 42: PUTL t10, R6
+ 43: INCEIPL $4
+
+ 0x254838B4: 7C0837EC dcbz r8,r6
+ 44: GETL R6, t12
+ 45: GETL R8, t14
+ 46: ADDL t14, t12
+ 47: ANDL $0xFFFFFFE0, t12
+ 48: MOVL $0x0, t16
+ 49: STL t16, (t12)
+ 50: ADDL $0x4, t12
+ 51: STL t16, (t12)
+ 52: ADDL $0x4, t12
+ 53: STL t16, (t12)
+ 54: ADDL $0x4, t12
+ 55: STL t16, (t12)
+ 56: ADDL $0x4, t12
+ 57: STL t16, (t12)
+ 58: ADDL $0x4, t12
+ 59: STL t16, (t12)
+ 60: ADDL $0x4, t12
+ 61: STL t16, (t12)
+ 62: ADDL $0x4, t12
+ 63: STL t16, (t12)
+ 64: INCEIPL $4
+
+ 0x254838B8: 7C0937EC dcbz r9,r6
+ 65: GETL R6, t18
+ 66: GETL R9, t20
+ 67: ADDL t20, t18
+ 68: ANDL $0xFFFFFFE0, t18
+ 69: MOVL $0x0, t22
+ 70: STL t22, (t18)
+ 71: ADDL $0x4, t18
+ 72: STL t22, (t18)
+ 73: ADDL $0x4, t18
+ 74: STL t22, (t18)
+ 75: ADDL $0x4, t18
+ 76: STL t22, (t18)
+ 77: ADDL $0x4, t18
+ 78: STL t22, (t18)
+ 79: ADDL $0x4, t18
+ 80: STL t22, (t18)
+ 81: ADDL $0x4, t18
+ 82: STL t22, (t18)
+ 83: ADDL $0x4, t18
+ 84: STL t22, (t18)
+ 85: INCEIPL $4
+
+ 0x254838BC: 4200FFEC bc 16,0,0x254838A8
+ 86: GETL CTR, t24
+ 87: ADDL $0xFFFFFFFF, t24
+ 88: PUTL t24, CTR
+ 89: JIFZL t24, $0x254838C0
+ 90: JMPo $0x254838A8 ($4)
+
+
+. 0 254838A8 24
+. 7C 00 37 EC 7C 07 37 EC 38 C6 00 80 7C 08 37 EC 7C 09 37 EC 42 00 FF EC
+
+==== BB 558 (0x254838C0) approx BBs exec'd 0 ====
+
+ 0x254838C0: 4D960020 bclr 12,22
+ 0: GETL LR, t0
+ 1: Js22o-r t0
+
+
+. 0 254838C0 4
+. 4D 96 00 20
+
+==== BB 559 (0x254838C4) approx BBs exec'd 0 ====
+
+ 0x254838C4: 48000060 b 0x25483924
+ 0: JMPo $0x25483924 ($4)
+
+
+. 0 254838C4 4
+. 48 00 00 60
+
+==== BB 560 (0x25483924) approx BBs exec'd 0 ====
+
+ 0x25483924: 7CC62A14 add r6,r6,r5
+ 0: GETL R6, t0
+ 1: GETL R5, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x25483928: 419F0020 bc 12,31,0x25483948
+ 5: Js31o $0x25483948
+
+
+. 0 25483924 8
+. 7C C6 2A 14 41 9F 00 20
+
+==== BB 561 (0x2548392C) approx BBs exec'd 0 ====
+
+ 0x2548392C: 419E0024 bc 12,30,0x25483950
+ 0: Js30o $0x25483950
+
+
+. 0 2548392C 4
+. 41 9E 00 24
+
+==== BB 562 (0x25483930) approx BBs exec'd 0 ====
+
+ 0x25483930: 419D0028 bc 12,29,0x25483958
+ 0: Js29o $0x25483958
+
+
+. 0 25483930 4
+. 41 9D 00 28
+
+==== BB 563 (0x25483958) approx BBs exec'd 0 ====
+
+ 0x25483958: 9486FFFC stwu r4,-4(r6)
+ 0: GETL R4, t0
+ 1: GETL R6, t2
+ 2: ADDL $0xFFFFFFFC, t2
+ 3: PUTL t2, R6
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2548395C: 41840014 bc 12,4,0x25483970
+ 6: Js04o $0x25483970
+
+
+. 0 25483958 8
+. 94 86 FF FC 41 84 00 14
+
+==== BB 564 (0x25483970) approx BBs exec'd 0 ====
+
+ 0x25483970: 4C9C0020 bclr 4,28
+ 0: GETL LR, t0
+ 1: Jc28o-r t0
+
+
+. 0 25483970 4
+. 4C 9C 00 20
+
+==== BB 565 (0x25475A04) approx BBs exec'd 0 ====
+
+ 0x25475A04: 80BD0014 lwz r5,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25475A08: 70A00002 andi. r0,r5,0x2
+ 5: GETL R5, t4
+ 6: ANDL $0x2, t4
+ 7: PUTL t4, R0
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25475A0C: 41820808 bc 12,2,0x25476214
+ 11: Js02o $0x25476214
+
+
+. 0 25475A04 12
+. 80 BD 00 14 70 A0 00 02 41 82 08 08
+
+==== BB 566 (0x25475A10) approx BBs exec'd 0 ====
+
+ 0x25475A10: 7F97E040 cmpl cr7,r23,r28
+ 0: GETL R23, t0
+ 1: GETL R28, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25475A14: 419D06AC bc 12,29,0x254760C0
+ 5: Js29o $0x254760C0
+
+
+. 0 25475A10 8
+. 7F 97 E0 40 41 9D 06 AC
+
+==== BB 567 (0x25475C1C) approx BBs exec'd 0 ====
+
+ 0x25475C1C: 82A10000 lwz r21,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R21
+ 3: INCEIPL $4
+
+ 0x25475C20: 7E419378 or r1,r18,r18
+ 4: GETL R18, t4
+ 5: PUTL t4, R1
+ 6: INCEIPL $4
+
+ 0x25475C24: 92A10000 stw r21,0(r1)
+ 7: GETL R21, t6
+ 8: GETL R1, t8
+ 9: STL t6, (t8)
+ 10: INCEIPL $4
+
+ 0x25475C28: 813A0008 lwz r9,8(r26)
+ 11: GETL R26, t10
+ 12: ADDL $0x8, t10
+ 13: LDL (t10), t12
+ 14: PUTL t12, R9
+ 15: INCEIPL $4
+
+ 0x25475C2C: 2F090000 cmpi cr6,r9,0
+ 16: GETL R9, t14
+ 17: CMP0L t14, t16 (-rSo)
+ 18: ICRFL t16, $0x6, CR
+ 19: INCEIPL $4
+
+ 0x25475C30: 409A0264 bc 4,26,0x25475E94
+ 20: Jc26o $0x25475E94
+
+
+. 0 25475C1C 24
+. 82 A1 00 00 7E 41 93 78 92 A1 00 00 81 3A 00 08 2F 09 00 00 40 9A 02 64
+
+==== BB 568 (0x25475E94) approx BBs exec'd 0 ====
+
+ 0x25475E94: 825A0000 lwz r18,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R18
+ 3: INCEIPL $4
+
+ 0x25475E98: 7D299214 add r9,r9,r18
+ 4: GETL R9, t4
+ 5: GETL R18, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0x25475E9C: 913A0008 stw r9,8(r26)
+ 9: GETL R9, t8
+ 10: GETL R26, t10
+ 11: ADDL $0x8, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25475EA0: 4BFFFD98 b 0x25475C38
+ 14: JMPo $0x25475C38 ($4)
+
+
+. 0 25475E94 16
+. 82 5A 00 00 7D 29 92 14 91 3A 00 08 4B FF FD 98
+
+==== BB 569 (0x25475C38) approx BBs exec'd 0 ====
+
+ 0x25475C38: 2E090000 cmpi cr4,r9,0
+ 0: GETL R9, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25475C3C: 7D2A4B78 or r10,r9,r9
+ 4: GETL R9, t4
+ 5: PUTL t4, R10
+ 6: INCEIPL $4
+
+ 0x25475C40: 41920264 bc 12,18,0x25475EA4
+ 7: Js18o $0x25475EA4
+
+
+. 0 25475C38 12
+. 2E 09 00 00 7D 2A 4B 78 41 92 02 64
+
+==== BB 570 (0x25475C44) approx BBs exec'd 0 ====
+
+ 0x25475C44: 81690000 lwz r11,0(r9)
+ 0: GETL R9, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25475C48: 391A0020 addi r8,r26,32
+ 4: GETL R26, t4
+ 5: ADDL $0x20, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0x25475C4C: 2C0B0000 cmpi cr0,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25475C50: 41820064 bc 12,2,0x25475CB4
+ 12: Js02o $0x25475CB4
+
+
+. 0 25475C44 16
+. 81 69 00 00 39 1A 00 20 2C 0B 00 00 41 82 00 64
+
+==== BB 571 (0x25475C54) approx BBs exec'd 0 ====
+
+ 0x25475C54: 3C607000 lis r3,28672
+ 0: MOVL $0x70000000, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25475C58: 3CE06FFF lis r7,28671
+ 3: MOVL $0x6FFF0000, t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x25475C5C: 3CA06FFF lis r5,28671
+ 6: MOVL $0x6FFF0000, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x25475C60: 3F806FFF lis r28,28671
+ 9: MOVL $0x6FFF0000, t6
+ 10: PUTL t6, R28
+ 11: INCEIPL $4
+
+ 0x25475C64: 3DE06FFF lis r15,28671
+ 12: MOVL $0x6FFF0000, t8
+ 13: PUTL t8, R15
+ 14: INCEIPL $4
+
+ 0x25475C68: 3FA06FFF lis r29,28671
+ 15: MOVL $0x6FFF0000, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0x25475C6C: 60660021 ori r6,r3,0x21
+ 18: MOVL $0x70000021, t12
+ 19: PUTL t12, R6
+ 20: INCEIPL $4
+
+ 0x25475C70: 60E7FFFF ori r7,r7,0xFFFF
+ 21: MOVL $0x6FFFFFFF, t14
+ 22: PUTL t14, R7
+ 23: INCEIPL $4
+
+ 0x25475C74: 60A5FDFF ori r5,r5,0xFDFF
+ 24: MOVL $0x6FFFFDFF, t16
+ 25: PUTL t16, R5
+ 26: INCEIPL $4
+
+ 0x25475C78: 6384FE34 ori r4,r28,0xFE34
+ 27: MOVL $0x6FFFFE34, t18
+ 28: PUTL t18, R4
+ 29: INCEIPL $4
+
+ 0x25475C7C: 61E3FEFF ori r3,r15,0xFEFF
+ 30: MOVL $0x6FFFFEFF, t20
+ 31: PUTL t20, R3
+ 32: INCEIPL $4
+
+ 0x25475C80: 63BDFF40 ori r29,r29,0xFF40
+ 33: MOVL $0x6FFFFF40, t22
+ 34: PUTL t22, R29
+ 35: INCEIPL $4
+
+ 0x25475C84: 2F8B0021 cmpi cr7,r11,33
+ 36: GETL R11, t24
+ 37: MOVL $0x21, t28
+ 38: CMPL t24, t28, t26 (-rSo)
+ 39: ICRFL t26, $0x7, CR
+ 40: INCEIPL $4
+
+ 0x25475C88: 5560103A rlwinm r0,r11,2,0,29
+ 41: GETL R11, t30
+ 42: SHLL $0x2, t30
+ 43: PUTL t30, R0
+ 44: INCEIPL $4
+
+ 0x25475C8C: 409D0018 bc 4,29,0x25475CA4
+ 45: Jc29o $0x25475CA4
+
+
+. 0 25475C54 60
+. 3C 60 70 00 3C E0 6F FF 3C A0 6F FF 3F 80 6F FF 3D E0 6F FF 3F A0 6F FF 60 66 00 21 60 E7 FF FF 60 A5 FD FF 63 84 FE 34 61 E3 FE FF 63 BD FF 40 2F 8B 00 21 55 60 10 3A 40 9D 00 18
+
+==== BB 572 (0x25475CA4) approx BBs exec'd 0 ====
+
+ 0x25475CA4: 7D48012E stwx r10,r8,r0
+ 0: GETL R0, t0
+ 1: GETL R8, t2
+ 2: ADDL t2, t0
+ 3: GETL R10, t4
+ 4: STL t4, (t0)
+ 5: INCEIPL $4
+
+ 0x25475CA8: 856A0008 lwzu r11,8(r10)
+ 6: GETL R10, t6
+ 7: ADDL $0x8, t6
+ 8: PUTL t6, R10
+ 9: LDL (t6), t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x25475CAC: 2F8B0000 cmpi cr7,r11,0
+ 12: GETL R11, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0x25475CB0: 409EFFD4 bc 4,30,0x25475C84
+ 16: Jc30o $0x25475C84
+
+
+. 0 25475CA4 16
+. 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
+
+==== BB 573 (0x25475C84) approx BBs exec'd 0 ====
+
+ 0x25475C84: 2F8B0021 cmpi cr7,r11,33
+ 0: GETL R11, t0
+ 1: MOVL $0x21, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25475C88: 5560103A rlwinm r0,r11,2,0,29
+ 5: GETL R11, t6
+ 6: SHLL $0x2, t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x25475C8C: 409D0018 bc 4,29,0x25475CA4
+ 9: Jc29o $0x25475CA4
+
+
+. 0 25475C84 12
+. 2F 8B 00 21 55 60 10 3A 40 9D 00 18
+
+==== BB 574 (0x25475C90) approx BBs exec'd 0 ====
+
+ 0x25475C90: 7D2B3850 subf r9,r11,r7
+ 0: GETL R11, t0
+ 1: GETL R7, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475C94: 2889000F cmpli cr1,r9,15
+ 5: GETL R9, t4
+ 6: MOVL $0xF, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x25475C98: 418503BC bc 12,5,0x25476054
+ 10: Js05o $0x25476054
+
+
+. 0 25475C90 12
+. 7D 2B 38 50 28 89 00 0F 41 85 03 BC
+
+==== BB 575 (0x25475C9C) approx BBs exec'd 0 ====
+
+ 0x25475C9C: 7C0B3050 subf r0,r11,r6
+ 0: GETL R11, t0
+ 1: GETL R6, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475CA0: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25475CA4: 7D48012E stwx r10,r8,r0
+ 9: GETL R0, t6
+ 10: GETL R8, t8
+ 11: ADDL t8, t6
+ 12: GETL R10, t10
+ 13: STL t10, (t6)
+ 14: INCEIPL $4
+
+ 0x25475CA8: 856A0008 lwzu r11,8(r10)
+ 15: GETL R10, t12
+ 16: ADDL $0x8, t12
+ 17: PUTL t12, R10
+ 18: LDL (t12), t14
+ 19: PUTL t14, R11
+ 20: INCEIPL $4
+
+ 0x25475CAC: 2F8B0000 cmpi cr7,r11,0
+ 21: GETL R11, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x25475CB0: 409EFFD4 bc 4,30,0x25475C84
+ 25: Jc30o $0x25475C84
+
+
+. 0 25475C9C 24
+. 7C 0B 30 50 54 00 10 3A 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
+
+==== BB 576 (0x25475CB4) approx BBs exec'd 0 ====
+
+ 0x25475CB4: 817A0000 lwz r11,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25475CB8: 2C8B0000 cmpi cr1,r11,0
+ 4: GETL R11, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x25475CBC: 418600AC bc 12,6,0x25475D68
+ 8: Js06o $0x25475D68
+
+
+. 0 25475CB4 12
+. 81 7A 00 00 2C 8B 00 00 41 86 00 AC
+
+==== BB 577 (0x25475CC0) approx BBs exec'd 0 ====
+
+ 0x25475CC0: 81280010 lwz r9,16(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475CC4: 2F090000 cmpi cr6,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25475CC8: 419A0010 bc 12,26,0x25475CD8
+ 9: Js26o $0x25475CD8
+
+
+. 0 25475CC0 12
+. 81 28 00 10 2F 09 00 00 41 9A 00 10
+
+==== BB 578 (0x25475CCC) approx BBs exec'd 0 ====
+
+ 0x25475CCC: 81490004 lwz r10,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25475CD0: 7C8A5A14 add r4,r10,r11
+ 5: GETL R10, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25475CD4: 90890004 stw r4,4(r9)
+ 10: GETL R4, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475CD8: 8128000C lwz r9,12(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0xC, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475CDC: 2E090000 cmpi cr4,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x4, CR
+ 23: INCEIPL $4
+
+ 0x25475CE0: 41920010 bc 12,18,0x25475CF0
+ 24: Js18o $0x25475CF0
+
+
+. 0 25475CCC 24
+. 81 49 00 04 7C 8A 5A 14 90 89 00 04 81 28 00 0C 2E 09 00 00 41 92 00 10
+
+==== BB 579 (0x25475CE4) approx BBs exec'd 0 ====
+
+ 0x25475CE4: 82490004 lwz r18,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x25475CE8: 7CD25A14 add r6,r18,r11
+ 5: GETL R18, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x25475CEC: 90C90004 stw r6,4(r9)
+ 10: GETL R6, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475CF0: 81280014 lwz r9,20(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x14, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475CF4: 2C090000 cmpi cr0,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x25475CF8: 41820010 bc 12,2,0x25475D08
+ 24: Js02o $0x25475D08
+
+
+. 0 25475CE4 24
+. 82 49 00 04 7C D2 5A 14 90 C9 00 04 81 28 00 14 2C 09 00 00 41 82 00 10
+
+==== BB 580 (0x25475CFC) approx BBs exec'd 0 ====
+
+ 0x25475CFC: 81E90004 lwz r15,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R15
+ 4: INCEIPL $4
+
+ 0x25475D00: 7FAF5A14 add r29,r15,r11
+ 5: GETL R15, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x25475D04: 93A90004 stw r29,4(r9)
+ 10: GETL R29, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475D08: 81280018 lwz r9,24(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x18, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475D0C: 2F890000 cmpi cr7,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x7, CR
+ 23: INCEIPL $4
+
+ 0x25475D10: 419E0010 bc 12,30,0x25475D20
+ 24: Js30o $0x25475D20
+
+
+. 0 25475CFC 24
+. 81 E9 00 04 7F AF 5A 14 93 A9 00 04 81 28 00 18 2F 89 00 00 41 9E 00 10
+
+==== BB 581 (0x25475D14) approx BBs exec'd 0 ====
+
+ 0x25475D14: 80A90004 lwz r5,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25475D18: 7F855A14 add r28,r5,r11
+ 5: GETL R5, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25475D1C: 93890004 stw r28,4(r9)
+ 10: GETL R28, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475D20: 8128001C lwz r9,28(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x1C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475D24: 2C890000 cmpi cr1,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x1, CR
+ 23: INCEIPL $4
+
+ 0x25475D28: 41860010 bc 12,6,0x25475D38
+ 24: Js06o $0x25475D38
+
+
+. 0 25475D14 24
+. 80 A9 00 04 7F 85 5A 14 93 89 00 04 81 28 00 1C 2C 89 00 00 41 86 00 10
+
+==== BB 582 (0x25475D2C) approx BBs exec'd 0 ====
+
+ 0x25475D2C: 80E90004 lwz r7,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25475D30: 7C675A14 add r3,r7,r11
+ 5: GETL R7, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25475D34: 90690004 stw r3,4(r9)
+ 10: GETL R3, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475D38: 8128005C lwz r9,92(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x5C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475D3C: 2F090000 cmpi cr6,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x6, CR
+ 23: INCEIPL $4
+
+ 0x25475D40: 419A0010 bc 12,26,0x25475D50
+ 24: Js26o $0x25475D50
+
+
+. 0 25475D2C 24
+. 80 E9 00 04 7C 67 5A 14 90 69 00 04 81 28 00 5C 2F 09 00 00 41 9A 00 10
+
+==== BB 583 (0x25475D44) approx BBs exec'd 0 ====
+
+ 0x25475D44: 80090004 lwz r0,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475D48: 7EE05A14 add r23,r0,r11
+ 5: GETL R0, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R23
+ 9: INCEIPL $4
+
+ 0x25475D4C: 92E90004 stw r23,4(r9)
+ 10: GETL R23, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475D50: 812800C4 lwz r9,196(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0xC4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475D54: 2E090000 cmpi cr4,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x4, CR
+ 23: INCEIPL $4
+
+ 0x25475D58: 41920010 bc 12,18,0x25475D68
+ 24: Js18o $0x25475D68
+
+
+. 0 25475D44 24
+. 80 09 00 04 7E E0 5A 14 92 E9 00 04 81 28 00 C4 2E 09 00 00 41 92 00 10
+
+==== BB 584 (0x25475D5C) approx BBs exec'd 0 ====
+
+ 0x25475D5C: 83290004 lwz r25,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x25475D60: 7D995A14 add r12,r25,r11
+ 5: GETL R25, t4
+ 6: GETL R11, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25475D64: 91890004 stw r12,4(r9)
+ 10: GETL R12, t8
+ 11: GETL R9, t10
+ 12: ADDL $0x4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475D68: 81280078 lwz r9,120(r8)
+ 15: GETL R8, t12
+ 16: ADDL $0x78, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25475D6C: 2C090000 cmpi cr0,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x25475D70: 41820030 bc 12,2,0x25475DA0
+ 24: Js02o $0x25475DA0
+
+
+. 0 25475D5C 24
+. 83 29 00 04 7D 99 5A 14 91 89 00 04 81 28 00 78 2C 09 00 00 41 82 00 30
+
+==== BB 585 (0x25475DA0) approx BBs exec'd 0 ====
+
+ 0x25475DA0: 81280098 lwz r9,152(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x98, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475DA4: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25475DA8: 419E0354 bc 12,30,0x254760FC
+ 9: Js30o $0x254760FC
+
+
+. 0 25475DA0 12
+. 81 28 00 98 2F 89 00 00 41 9E 03 54
+
+==== BB 586 (0x25475DAC) approx BBs exec'd 0 ====
+
+ 0x25475DAC: 81690004 lwz r11,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25475DB0: 71600001 andi. r0,r11,0x1
+ 5: GETL R11, t4
+ 6: ANDL $0x1, t4
+ 7: PUTL t4, R0
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25475DB4: 917A01FC stw r11,508(r26)
+ 11: GETL R11, t8
+ 12: GETL R26, t10
+ 13: ADDL $0x1FC, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25475DB8: 41820008 bc 12,2,0x25475DC0
+ 16: Js02o $0x25475DC0
+
+
+. 0 25475DAC 16
+. 81 69 00 04 71 60 00 01 91 7A 01 FC 41 82 00 08
+
+==== BB 587 (0x25475DC0) approx BBs exec'd 0 ====
+
+ 0x25475DC0: 81280074 lwz r9,116(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475DC4: 2C890000 cmpi cr1,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25475DC8: 418600E0 bc 12,6,0x25475EA8
+ 9: Js06o $0x25475EA8
+
+
+. 0 25475DC0 12
+. 81 28 00 74 2C 89 00 00 41 86 00 E0
+
+==== BB 588 (0x25475EA8) approx BBs exec'd 0 ====
+
+ 0x25475EA8: 71690040 andi. r9,r11,0x40
+ 0: GETL R11, t0
+ 1: ANDL $0x40, t0
+ 2: PUTL t0, R9
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25475EAC: 408202A4 bc 4,2,0x25476150
+ 6: Jc02o $0x25476150
+
+
+. 0 25475EA8 8
+. 71 69 00 40 40 82 02 A4
+
+==== BB 589 (0x25475EB0) approx BBs exec'd 0 ====
+
+ 0x25475EB0: 813A014C lwz r9,332(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x14C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475EB4: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25475EB8: 419E01CC bc 12,30,0x25476084
+ 9: Js30o $0x25476084
+
+
+. 0 25475EB0 12
+. 81 3A 01 4C 2F 89 00 00 41 9E 01 CC
+
+==== BB 590 (0x25475EBC) approx BBs exec'd 0 ====
+
+ 0x25475EBC: 825A0000 lwz r18,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R18
+ 3: INCEIPL $4
+
+ 0x25475EC0: 7CC99214 add r6,r9,r18
+ 4: GETL R9, t4
+ 5: GETL R18, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x25475EC4: 90DA014C stw r6,332(r26)
+ 9: GETL R6, t8
+ 10: GETL R26, t10
+ 11: ADDL $0x14C, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25475EC8: 80BE04C8 lwz r5,1224(r30)
+ 14: GETL R30, t12
+ 15: ADDL $0x4C8, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R5
+ 18: INCEIPL $4
+
+ 0x25475ECC: 839F00A4 lwz r28,164(r31)
+ 19: GETL R31, t16
+ 20: ADDL $0xA4, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R28
+ 23: INCEIPL $4
+
+ 0x25475ED0: 81E50400 lwz r15,1024(r5)
+ 24: GETL R5, t20
+ 25: ADDL $0x400, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R15
+ 28: INCEIPL $4
+
+ 0x25475ED4: 7F9D7878 andc r29,r28,r15
+ 29: GETL R28, t24
+ 30: GETL R15, t26
+ 31: NOTL t26
+ 32: ANDL t24, t26
+ 33: PUTL t26, R29
+ 34: INCEIPL $4
+
+ 0x25475ED8: 73AB0001 andi. r11,r29,0x1
+ 35: GETL R29, t28
+ 36: ANDL $0x1, t28
+ 37: PUTL t28, R11
+ 38: CMP0L t28, t30 (-rSo)
+ 39: ICRFL t30, $0x0, CR
+ 40: INCEIPL $4
+
+ 0x25475EDC: 408202B0 bc 4,2,0x2547618C
+ 41: Jc02o $0x2547618C
+
+
+. 0 25475EBC 36
+. 82 5A 00 00 7C C9 92 14 90 DA 01 4C 80 BE 04 C8 83 9F 00 A4 81 E5 04 00 7F 9D 78 78 73 AB 00 01 40 82 02 B0
+
+==== BB 591 (0x25475EE0) approx BBs exec'd 0 ====
+
+ 0x25475EE0: 813A0218 lwz r9,536(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x218, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475EE4: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25475EE8: 419E0010 bc 12,30,0x25475EF8
+ 9: Js30o $0x25475EF8
+
+
+. 0 25475EE0 12
+. 81 3A 02 18 2F 89 00 00 41 9E 00 10
+
+==== BB 592 (0x25475EF8) approx BBs exec'd 0 ====
+
+ 0x25475EF8: 7E639B78 or r3,r19,r19
+ 0: GETL R19, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25475EFC: 4800C0F5 bl 0x25481FF0
+ 3: MOVL $0x25475F00, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25481FF0 ($4)
+
+
+. 0 25475EF8 8
+. 7E 63 9B 78 48 00 C0 F5
+
+==== BB 593 close(0x25481FF0) approx BBs exec'd 0 ====
+
+ 0x25481FF0: 38000006 li r0,6
+ 0: MOVL $0x6, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25481FF4: 44000002 sc
+ 3: JMPo-sys $0x25481FF8 ($4)
+
+
+. 0 25481FF0 8
+. 38 00 00 06 44 00 00 02
+
+==== BB 594 (0x25481FF8) approx BBs exec'd 0 ====
+
+ 0x25481FF8: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+. 0 25481FF8 4
+. 4C A3 00 20
+
+==== BB 595 (0x25475F00) approx BBs exec'd 0 ====
+
+ 0x25475F00: 811E01C8 lwz r8,456(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25475F04: 2C830000 cmpi cr1,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x25475F08: 40A6FB68 bc 5,6,0x25475A70
+ 9: Jc06o $0x25475A70
+
+
+. 0 25475F00 12
+. 81 1E 01 C8 2C 83 00 00 40 A6 FB 68
+
+==== BB 596 (0x25475F0C) approx BBs exec'd 0 ====
+
+ 0x25475F0C: 817A0180 lwz r11,384(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25475F10: 81FF009C lwz r15,156(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x9C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R15
+ 9: INCEIPL $4
+
+ 0x25475F14: 557D0002 rlwinm r29,r11,0,0,1
+ 10: GETL R11, t8
+ 11: ANDL $0xC0000000, t8
+ 12: PUTL t8, R29
+ 13: INCEIPL $4
+
+ 0x25475F18: 69F30002 xori r19,r15,0x2
+ 14: GETL R15, t10
+ 15: XORL $0x2, t10
+ 16: PUTL t10, R19
+ 17: INCEIPL $4
+
+ 0x25475F1C: 21330000 subfic r9,r19,0
+ 18: GETL R19, t12
+ 19: MOVL $0x0, t14
+ 20: SBBL t12, t14 (-wCa)
+ 21: PUTL t14, R9
+ 22: INCEIPL $4
+
+ 0x25475F20: 7E699914 adde r19,r9,r19
+ 23: GETL R9, t16
+ 24: GETL R19, t18
+ 25: ADCL t16, t18 (-rCa-wCa)
+ 26: PUTL t18, R19
+ 27: INCEIPL $4
+
+ 0x25475F24: 6FB24000 xoris r18,r29,0x4000
+ 28: GETL R29, t20
+ 29: XORL $0x40000000, t20
+ 30: PUTL t20, R18
+ 31: INCEIPL $4
+
+ 0x25475F28: 21520000 subfic r10,r18,0
+ 32: GETL R18, t22
+ 33: MOVL $0x0, t24
+ 34: SBBL t22, t24 (-wCa)
+ 35: PUTL t24, R10
+ 36: INCEIPL $4
+
+ 0x25475F2C: 7E4A9114 adde r18,r10,r18
+ 37: GETL R10, t26
+ 38: GETL R18, t28
+ 39: ADCL t26, t28 (-rCa-wCa)
+ 40: PUTL t28, R18
+ 41: INCEIPL $4
+
+ 0x25475F30: 7E4A9839 and. r10,r18,r19
+ 42: GETL R18, t30
+ 43: GETL R19, t32
+ 44: ANDL t30, t32
+ 45: PUTL t32, R10
+ 46: CMP0L t32, t34 (-rSo)
+ 47: ICRFL t34, $0x0, CR
+ 48: INCEIPL $4
+
+ 0x25475F34: 3A60FFFF li r19,-1
+ 49: MOVL $0xFFFFFFFF, t36
+ 50: PUTL t36, R19
+ 51: INCEIPL $4
+
+ 0x25475F38: 408200BC bc 4,2,0x25475FF4
+ 52: Jc02o $0x25475FF4
+
+
+. 0 25475F0C 48
+. 81 7A 01 80 81 FF 00 9C 55 7D 00 02 69 F3 00 02 21 33 00 00 7E 69 99 14 6F B2 40 00 21 52 00 00 7E 4A 91 14 7E 4A 98 39 3A 60 FF FF 40 82 00 BC
+
+==== BB 597 (0x25475F3C) approx BBs exec'd 0 ====
+
+ 0x25475F3C: 807A0150 lwz r3,336(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x150, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25475F40: 80FA0000 lwz r7,0(r26)
+ 5: GETL R26, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R7
+ 8: INCEIPL $4
+
+ 0x25475F44: 7D633A14 add r11,r3,r7
+ 9: GETL R3, t8
+ 10: GETL R7, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0x25475F48: 917A0150 stw r11,336(r26)
+ 14: GETL R11, t12
+ 15: GETL R26, t14
+ 16: ADDL $0x150, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25475F4C: 80B10000 lwz r5,0(r17)
+ 19: GETL R17, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R5
+ 22: INCEIPL $4
+
+ 0x25475F50: 70A90040 andi. r9,r5,0x40
+ 23: GETL R5, t20
+ 24: ANDL $0x40, t20
+ 25: PUTL t20, R9
+ 26: CMP0L t20, t22 (-rSo)
+ 27: ICRFL t22, $0x0, CR
+ 28: INCEIPL $4
+
+ 0x25475F54: 40820278 bc 4,2,0x254761CC
+ 29: Jc02o $0x254761CC
+
+
+. 0 25475F3C 28
+. 80 7A 01 50 80 FA 00 00 7D 63 3A 14 91 7A 01 50 80 B1 00 00 70 A9 00 40 40 82 02 78
+
+==== BB 598 (0x25475F58) approx BBs exec'd 0 ====
+
+ 0x25475F58: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25475F5C: 48002611 bl 0x2547856C
+ 3: MOVL $0x25475F60, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x2547856C ($4)
+
+
+. 0 25475F58 8
+. 7F 43 D3 78 48 00 26 11
+
+==== BB 599 (0x25475F60) approx BBs exec'd 0 ====
+
+ 0x25475F60: 72C00008 andi. r0,r22,0x8
+ 0: GETL R22, t0
+ 1: ANDL $0x8, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25475F64: 40820010 bc 4,2,0x25475F74
+ 6: Jc02o $0x25475F74
+
+
+. 0 25475F60 8
+. 72 C0 00 08 40 82 00 10
+
+==== BB 600 (0x25475F68) approx BBs exec'd 0 ====
+
+ 0x25475F68: 81DA0060 lwz r14,96(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R14
+ 4: INCEIPL $4
+
+ 0x25475F6C: 2F0E0000 cmpi cr6,r14,0
+ 5: GETL R14, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25475F70: 409A02E0 bc 4,26,0x25476250
+ 9: Jc26o $0x25476250
+
+
+. 0 25475F68 12
+. 81 DA 00 60 2F 0E 00 00 40 9A 02 E0
+
+==== BB 601 (0x25475F74) approx BBs exec'd 0 ====
+
+ 0x25475F74: 811A01FC lwz r8,508(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x1FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25475F78: 71090020 andi. r9,r8,0x20
+ 5: GETL R8, t4
+ 6: ANDL $0x20, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25475F7C: 4182000C bc 12,2,0x25475F88
+ 11: Js02o $0x25475F88
+
+
+. 0 25475F74 12
+. 81 1A 01 FC 71 09 00 20 41 82 00 0C
+
+==== BB 602 (0x25475F80) approx BBs exec'd 0 ====
+
+ 0x25475F80: 813E04C8 lwz r9,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475F84: 934901A0 stw r26,416(r9)
+ 5: GETL R26, t4
+ 6: GETL R9, t6
+ 7: ADDL $0x1A0, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25475F88: 80910050 lwz r4,80(r17)
+ 10: GETL R17, t8
+ 11: ADDL $0x50, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0x25475F8C: C81F0028 lfd f0,40(r31)
+ 15: GETL R31, t12
+ 16: ADDL $0x28, t12
+ 17: FPU_RQ (t12), 0x0:0x0
+ 18: INCEIPL $4
+
+ 0x25475F90: 2C840000 cmpi cr1,r4,0
+ 19: GETL R4, t14
+ 20: CMP0L t14, t16 (-rSo)
+ 21: ICRFL t16, $0x1, CR
+ 22: INCEIPL $4
+
+ 0x25475F94: D81A01D0 stfd f0,464(r26)
+ 23: GETL R26, t18
+ 24: ADDL $0x1D0, t18
+ 25: FPU_WQ 0x0:0x0, (t18)
+ 26: INCEIPL $4
+
+ 0x25475F98: C9BF0030 lfd f13,48(r31)
+ 27: GETL R31, t20
+ 28: ADDL $0x30, t20
+ 29: FPU_RQ (t20), 0x0:0xD
+ 30: INCEIPL $4
+
+ 0x25475F9C: D9BA01D8 stfd f13,472(r26)
+ 31: GETL R26, t22
+ 32: ADDL $0x1D8, t22
+ 33: FPU_WQ 0x0:0xD, (t22)
+ 34: INCEIPL $4
+
+ 0x25475FA0: 4186FEB0 bc 12,6,0x25475E50
+ 35: Js06o $0x25475E50
+
+
+. 0 25475F80 36
+. 81 3E 04 C8 93 49 01 A0 80 91 00 50 C8 1F 00 28 2C 84 00 00 D8 1A 01 D0 C9 BF 00 30 D9 BA 01 D8 41 86 FE B0
+
+==== BB 603 (0x25475E50) approx BBs exec'd 0 ====
+
+ 0x25475E50: 7F43D378 or r3,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25475E54: 4BFFF850 b 0x254756A4
+ 3: JMPo $0x254756A4 ($4)
+
+
+. 0 25475E50 8
+. 7F 43 D3 78 4B FF F8 50
+
+==== BB 604 (0x254756A4) approx BBs exec'd 0 ====
+
+ 0x254756A4: 80A10000 lwz r5,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x254756A8: 83450004 lwz r26,4(r5)
+ 4: GETL R5, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R26
+ 8: INCEIPL $4
+
+ 0x254756AC: 8185FFB4 lwz r12,-76(r5)
+ 9: GETL R5, t8
+ 10: ADDL $0xFFFFFFB4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0x254756B0: 7F4803A6 mtlr r26
+ 14: GETL R26, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x254756B4: 81C5FFB8 lwz r14,-72(r5)
+ 17: GETL R5, t14
+ 18: ADDL $0xFFFFFFB8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R14
+ 21: INCEIPL $4
+
+ 0x254756B8: 81E5FFBC lwz r15,-68(r5)
+ 22: GETL R5, t18
+ 23: ADDL $0xFFFFFFBC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R15
+ 26: INCEIPL $4
+
+ 0x254756BC: 7D808120 mtcrf 0x8,r12
+ 27: GETL R12, t22
+ 28: ICRFL t22, $0x4, CR
+ 29: INCEIPL $4
+
+ 0x254756C0: 8205FFC0 lwz r16,-64(r5)
+ 30: GETL R5, t24
+ 31: ADDL $0xFFFFFFC0, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R16
+ 34: INCEIPL $4
+
+ 0x254756C4: 8225FFC4 lwz r17,-60(r5)
+ 35: GETL R5, t28
+ 36: ADDL $0xFFFFFFC4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R17
+ 39: INCEIPL $4
+
+ 0x254756C8: 8245FFC8 lwz r18,-56(r5)
+ 40: GETL R5, t32
+ 41: ADDL $0xFFFFFFC8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R18
+ 44: INCEIPL $4
+
+ 0x254756CC: 8265FFCC lwz r19,-52(r5)
+ 45: GETL R5, t36
+ 46: ADDL $0xFFFFFFCC, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R19
+ 49: INCEIPL $4
+
+ 0x254756D0: 8285FFD0 lwz r20,-48(r5)
+ 50: GETL R5, t40
+ 51: ADDL $0xFFFFFFD0, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R20
+ 54: INCEIPL $4
+
+ 0x254756D4: 82A5FFD4 lwz r21,-44(r5)
+ 55: GETL R5, t44
+ 56: ADDL $0xFFFFFFD4, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R21
+ 59: INCEIPL $4
+
+ 0x254756D8: 82C5FFD8 lwz r22,-40(r5)
+ 60: GETL R5, t48
+ 61: ADDL $0xFFFFFFD8, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R22
+ 64: INCEIPL $4
+
+ 0x254756DC: 82E5FFDC lwz r23,-36(r5)
+ 65: GETL R5, t52
+ 66: ADDL $0xFFFFFFDC, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R23
+ 69: INCEIPL $4
+
+ 0x254756E0: 8305FFE0 lwz r24,-32(r5)
+ 70: GETL R5, t56
+ 71: ADDL $0xFFFFFFE0, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R24
+ 74: INCEIPL $4
+
+ 0x254756E4: 8325FFE4 lwz r25,-28(r5)
+ 75: GETL R5, t60
+ 76: ADDL $0xFFFFFFE4, t60
+ 77: LDL (t60), t62
+ 78: PUTL t62, R25
+ 79: INCEIPL $4
+
+ 0x254756E8: 8345FFE8 lwz r26,-24(r5)
+ 80: GETL R5, t64
+ 81: ADDL $0xFFFFFFE8, t64
+ 82: LDL (t64), t66
+ 83: PUTL t66, R26
+ 84: INCEIPL $4
+
+ 0x254756EC: 8365FFEC lwz r27,-20(r5)
+ 85: GETL R5, t68
+ 86: ADDL $0xFFFFFFEC, t68
+ 87: LDL (t68), t70
+ 88: PUTL t70, R27
+ 89: INCEIPL $4
+
+ 0x254756F0: 8385FFF0 lwz r28,-16(r5)
+ 90: GETL R5, t72
+ 91: ADDL $0xFFFFFFF0, t72
+ 92: LDL (t72), t74
+ 93: PUTL t74, R28
+ 94: INCEIPL $4
+
+ 0x254756F4: 83A5FFF4 lwz r29,-12(r5)
+ 95: GETL R5, t76
+ 96: ADDL $0xFFFFFFF4, t76
+ 97: LDL (t76), t78
+ 98: PUTL t78, R29
+ 99: INCEIPL $4
+
+ 0x254756F8: 83C5FFF8 lwz r30,-8(r5)
+ 100: GETL R5, t80
+ 101: ADDL $0xFFFFFFF8, t80
+ 102: LDL (t80), t82
+ 103: PUTL t82, R30
+ 104: INCEIPL $4
+
+ 0x254756FC: 83E5FFFC lwz r31,-4(r5)
+ 105: GETL R5, t84
+ 106: ADDL $0xFFFFFFFC, t84
+ 107: LDL (t84), t86
+ 108: PUTL t86, R31
+ 109: INCEIPL $4
+
+ 0x25475700: 7CA12B78 or r1,r5,r5
+ 110: GETL R5, t88
+ 111: PUTL t88, R1
+ 112: INCEIPL $4
+
+ 0x25475704: 4E800020 blr
+ 113: GETL LR, t90
+ 114: JMPo-r t90 ($4)
+
+
+. 0 254756A4 100
+. 80 A1 00 00 83 45 00 04 81 85 FF B4 7F 48 03 A6 81 C5 FF B8 81 E5 FF BC 7D 80 81 20 82 05 FF C0 82 25 FF C4 82 45 FF C8 82 65 FF CC 82 85 FF D0 82 A5 FF D4 82 C5 FF D8 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
+
+==== BB 605 (0x25477054) approx BBs exec'd 0 ====
+
+ 0x25477054: 4BFFFF04 b 0x25476F58
+ 0: JMPo $0x25476F58 ($4)
+
+
+. 0 25477054 4
+. 4B FF FF 04
+
+==== BB 606 (0x25476F58) approx BBs exec'd 0 ====
+
+ 0x25476F58: 83E10294 lwz r31,660(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x294, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x25476F5C: 81810244 lwz r12,580(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x244, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25476F60: 7FE803A6 mtlr r31
+ 10: GETL R31, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0x25476F64: 81C10248 lwz r14,584(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x248, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R14
+ 17: INCEIPL $4
+
+ 0x25476F68: 81E1024C lwz r15,588(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x24C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R15
+ 22: INCEIPL $4
+
+ 0x25476F6C: 7D818120 mtcrf 0x18,r12
+ 23: GETL R12, t18
+ 24: ICRFL t18, $0x3, CR
+ 25: ICRFL t18, $0x4, CR
+ 26: INCEIPL $4
+
+ 0x25476F70: 82010250 lwz r16,592(r1)
+ 27: GETL R1, t20
+ 28: ADDL $0x250, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R16
+ 31: INCEIPL $4
+
+ 0x25476F74: 82210254 lwz r17,596(r1)
+ 32: GETL R1, t24
+ 33: ADDL $0x254, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R17
+ 36: INCEIPL $4
+
+ 0x25476F78: 82410258 lwz r18,600(r1)
+ 37: GETL R1, t28
+ 38: ADDL $0x258, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R18
+ 41: INCEIPL $4
+
+ 0x25476F7C: 8261025C lwz r19,604(r1)
+ 42: GETL R1, t32
+ 43: ADDL $0x25C, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R19
+ 46: INCEIPL $4
+
+ 0x25476F80: 82810260 lwz r20,608(r1)
+ 47: GETL R1, t36
+ 48: ADDL $0x260, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R20
+ 51: INCEIPL $4
+
+ 0x25476F84: 82A10264 lwz r21,612(r1)
+ 52: GETL R1, t40
+ 53: ADDL $0x264, t40
+ 54: LDL (t40), t42
+ 55: PUTL t42, R21
+ 56: INCEIPL $4
+
+ 0x25476F88: 82C10268 lwz r22,616(r1)
+ 57: GETL R1, t44
+ 58: ADDL $0x268, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R22
+ 61: INCEIPL $4
+
+ 0x25476F8C: 82E1026C lwz r23,620(r1)
+ 62: GETL R1, t48
+ 63: ADDL $0x26C, t48
+ 64: LDL (t48), t50
+ 65: PUTL t50, R23
+ 66: INCEIPL $4
+
+ 0x25476F90: 83010270 lwz r24,624(r1)
+ 67: GETL R1, t52
+ 68: ADDL $0x270, t52
+ 69: LDL (t52), t54
+ 70: PUTL t54, R24
+ 71: INCEIPL $4
+
+ 0x25476F94: 83210274 lwz r25,628(r1)
+ 72: GETL R1, t56
+ 73: ADDL $0x274, t56
+ 74: LDL (t56), t58
+ 75: PUTL t58, R25
+ 76: INCEIPL $4
+
+ 0x25476F98: 83410278 lwz r26,632(r1)
+ 77: GETL R1, t60
+ 78: ADDL $0x278, t60
+ 79: LDL (t60), t62
+ 80: PUTL t62, R26
+ 81: INCEIPL $4
+
+ 0x25476F9C: 8361027C lwz r27,636(r1)
+ 82: GETL R1, t64
+ 83: ADDL $0x27C, t64
+ 84: LDL (t64), t66
+ 85: PUTL t66, R27
+ 86: INCEIPL $4
+
+ 0x25476FA0: 83810280 lwz r28,640(r1)
+ 87: GETL R1, t68
+ 88: ADDL $0x280, t68
+ 89: LDL (t68), t70
+ 90: PUTL t70, R28
+ 91: INCEIPL $4
+
+ 0x25476FA4: 83A10284 lwz r29,644(r1)
+ 92: GETL R1, t72
+ 93: ADDL $0x284, t72
+ 94: LDL (t72), t74
+ 95: PUTL t74, R29
+ 96: INCEIPL $4
+
+ 0x25476FA8: 83C10288 lwz r30,648(r1)
+ 97: GETL R1, t76
+ 98: ADDL $0x288, t76
+ 99: LDL (t76), t78
+ 100: PUTL t78, R30
+ 101: INCEIPL $4
+
+ 0x25476FAC: 83E1028C lwz r31,652(r1)
+ 102: GETL R1, t80
+ 103: ADDL $0x28C, t80
+ 104: LDL (t80), t82
+ 105: PUTL t82, R31
+ 106: INCEIPL $4
+
+ 0x25476FB0: 38210290 addi r1,r1,656
+ 107: GETL R1, t84
+ 108: ADDL $0x290, t84
+ 109: PUTL t84, R1
+ 110: INCEIPL $4
+
+ 0x25476FB4: 4E800020 blr
+ 111: GETL LR, t86
+ 112: JMPo-r t86 ($4)
+
+
+. 0 25476F58 96
+. 83 E1 02 94 81 81 02 44 7F E8 03 A6 81 C1 02 48 81 E1 02 4C 7D 81 81 20 82 01 02 50 82 21 02 54 82 41 02 58 82 61 02 5C 82 81 02 60 82 A1 02 64 82 C1 02 68 82 E1 02 6C 83 01 02 70 83 21 02 74 83 41 02 78 83 61 02 7C 83 81 02 80 83 A1 02 84 83 C1 02 88 83 E1 02 8C 38 21 02 90 4E 80 00 20
+
+==== BB 607 (0x254734A8) approx BBs exec'd 0 ====
+
+ 0x254734A8: 809E00D0 lwz r4,208(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xD0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254734AC: 82E30178 lwz r23,376(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x178, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R23
+ 9: INCEIPL $4
+
+ 0x254734B0: 3A770001 addi r19,r23,1
+ 10: GETL R23, t8
+ 11: ADDL $0x1, t8
+ 12: PUTL t8, R19
+ 13: INCEIPL $4
+
+ 0x254734B4: 92630178 stw r19,376(r3)
+ 14: GETL R19, t10
+ 15: GETL R3, t12
+ 16: ADDL $0x178, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x254734B8: 387F0044 addi r3,r31,68
+ 19: GETL R31, t14
+ 20: ADDL $0x44, t14
+ 21: PUTL t14, R3
+ 22: INCEIPL $4
+
+ 0x254734BC: 6A7D0001 xori r29,r19,0x1
+ 23: GETL R19, t16
+ 24: XORL $0x1, t16
+ 25: PUTL t16, R29
+ 26: INCEIPL $4
+
+ 0x254734C0: 23BD0000 subfic r29,r29,0
+ 27: GETL R29, t18
+ 28: MOVL $0x0, t20
+ 29: SBBL t18, t20 (-wCa)
+ 30: PUTL t20, R29
+ 31: INCEIPL $4
+
+ 0x254734C4: 7FB90194 addze r29,r25
+ 32: GETL R25, t22
+ 33: ADCL $0x0, t22 (-rCa-wCa)
+ 34: PUTL t22, R29
+ 35: INCEIPL $4
+
+ 0x254734C8: 4800CE75 bl 0x2548033C
+ 36: MOVL $0x254734CC, t24
+ 37: PUTL t24, LR
+ 38: JMPo-c $0x2548033C ($4)
+
+
+. 0 254734A8 36
+. 80 9E 00 D0 82 E3 01 78 3A 77 00 01 92 63 01 78 38 7F 00 44 6A 7D 00 01 23 BD 00 00 7F B9 01 94 48 00 CE 75
+
+==== BB 608 (0x254734CC) approx BBs exec'd 0 ====
+
+ 0x254734CC: 7FB9EB78 or r25,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R25
+ 2: INCEIPL $4
+
+ 0x254734D0: 7C7D1B79 or. r29,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R29
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x254734D4: 4082FF9C bc 4,2,0x25473470
+ 8: Jc02o $0x25473470
+
+
+. 0 254734CC 12
+. 7F B9 EB 78 7C 7D 1B 79 40 82 FF 9C
+
+==== BB 609 (0x254734D8) approx BBs exec'd 0 ====
+
+ 0x254734D8: 807E003C lwz r3,60(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x3C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254734DC: 38800004 li r4,4
+ 5: MOVL $0x4, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x254734E0: 4800EB51 bl 0x25482030
+ 8: MOVL $0x254734E4, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x25482030 ($4)
+
+
+. 0 254734D8 12
+. 80 7E 00 3C 38 80 00 04 48 00 EB 51
+
+==== BB 610 access(0x25482030) approx BBs exec'd 0 ====
+
+ 0x25482030: 38000021 li r0,33
+ 0: MOVL $0x21, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25482034: 44000002 sc
+ 3: JMPo-sys $0x25482038 ($4)
+
+
+. 0 25482030 8
+. 38 00 00 21 44 00 00 02
+
+==== BB 611 (0x25482038) approx BBs exec'd 0 ====
+
+ 0x25482038: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+. 0 25482038 4
+. 4C A3 00 20
+
+==== BB 612 (0x2548203C) approx BBs exec'd 0 ====
+
+ 0x2548203C: 4BFFF2F4 b 0x25481330
+ 0: JMPo $0x25481330 ($4)
+
+
+. 0 2548203C 4
+. 4B FF F2 F4
+
+==== BB 613 __syscall_error(0x25481330) approx BBs exec'd 0 ====
+
+ 0x25481330: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25481334: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x25481338: 48015CC9 bl 0x25497000
+ 9: MOVL $0x2548133C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25481330 12
+. 94 21 FF F0 7D 88 02 A6 48 01 5C C9
+
+==== BB 614 (0x2548133C) approx BBs exec'd 0 ====
+
+ 0x2548133C: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25481340: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25481344: 7D8803A6 mtlr r12
+ 8: GETL R12, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0x25481348: 813E0514 lwz r9,1300(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x514, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0x2548134C: 83C10008 lwz r30,8(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x8, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0x25481350: 38210010 addi r1,r1,16
+ 21: GETL R1, t16
+ 22: ADDL $0x10, t16
+ 23: PUTL t16, R1
+ 24: INCEIPL $4
+
+ 0x25481354: 90690000 stw r3,0(r9)
+ 25: GETL R3, t18
+ 26: GETL R9, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x25481358: 3860FFFF li r3,-1
+ 29: MOVL $0xFFFFFFFF, t22
+ 30: PUTL t22, R3
+ 31: INCEIPL $4
+
+ 0x2548135C: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+. 0 2548133C 36
+. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 81 3E 05 14 83 C1 00 08 38 21 00 10 90 69 00 00 38 60 FF FF 4E 80 00 20
+
+==== BB 615 (0x254734E4) approx BBs exec'd 0 ====
+
+ 0x254734E4: 2E030000 cmpi cr4,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x254734E8: 4092F2D0 bc 4,18,0x254727B8
+ 4: Jc18o $0x254727B8
+
+
+. 0 254734E4 8
+. 2E 03 00 00 40 92 F2 D0
+
+==== BB 616 (0x254727B8) approx BBs exec'd 0 ====
+
+ 0x254727B8: 2C190000 cmpi cr0,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x254727BC: 408213F0 bc 4,2,0x25473BAC
+ 4: Jc02o $0x25473BAC
+
+
+. 0 254727B8 8
+. 2C 19 00 00 40 82 13 F0
+
+==== BB 617 (0x25473BAC) approx BBs exec'd 0 ====
+
+ 0x25473BAC: 5736103A rlwinm r22,r25,2,0,29
+ 0: GETL R25, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R22
+ 3: INCEIPL $4
+
+ 0x25473BB0: 83A10000 lwz r29,0(r1)
+ 4: GETL R1, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25473BB4: 38D6001E addi r6,r22,30
+ 8: GETL R22, t6
+ 9: ADDL $0x1E, t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0x25473BB8: 39600000 li r11,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0x25473BBC: 54C00036 rlwinm r0,r6,0,0,27
+ 15: GETL R6, t10
+ 16: ANDL $0xFFFFFFF0, t10
+ 17: PUTL t10, R0
+ 18: INCEIPL $4
+
+ 0x25473BC0: 7F4000D0 neg r26,r0
+ 19: GETL R0, t12
+ 20: NEGL t12
+ 21: PUTL t12, R26
+ 22: INCEIPL $4
+
+ 0x25473BC4: 7FA1D16E stwux r29,r1,r26
+ 23: GETL R26, t14
+ 24: GETL R1, t16
+ 25: ADDL t16, t14
+ 26: PUTL t14, R1
+ 27: GETL R29, t18
+ 28: STL t18, (t14)
+ 29: INCEIPL $4
+
+ 0x25473BC8: 3B610017 addi r27,r1,23
+ 30: GETL R1, t20
+ 31: ADDL $0x17, t20
+ 32: PUTL t20, R27
+ 33: INCEIPL $4
+
+ 0x25473BCC: 812E01C4 lwz r9,452(r14)
+ 34: GETL R14, t22
+ 35: ADDL $0x1C4, t22
+ 36: LDL (t22), t24
+ 37: PUTL t24, R9
+ 38: INCEIPL $4
+
+ 0x25473BD0: 577A0036 rlwinm r26,r27,0,0,27
+ 39: GETL R27, t26
+ 40: ANDL $0xFFFFFFF0, t26
+ 41: PUTL t26, R26
+ 42: INCEIPL $4
+
+ 0x25473BD4: 556C103A rlwinm r12,r11,2,0,29
+ 43: GETL R11, t28
+ 44: SHLL $0x2, t28
+ 45: PUTL t28, R12
+ 46: INCEIPL $4
+
+ 0x25473BD8: 396B0001 addi r11,r11,1
+ 47: MOVL $0x1, t30
+ 48: PUTL t30, R11
+ 49: INCEIPL $4
+
+ 0x25473BDC: 7D2CD12E stwx r9,r12,r26
+ 50: GETL R26, t32
+ 51: GETL R12, t34
+ 52: ADDL t34, t32
+ 53: GETL R9, t36
+ 54: STL t36, (t32)
+ 55: INCEIPL $4
+
+ 0x25473BE0: 8129000C lwz r9,12(r9)
+ 56: GETL R9, t38
+ 57: ADDL $0xC, t38
+ 58: LDL (t38), t40
+ 59: PUTL t40, R9
+ 60: INCEIPL $4
+
+ 0x25473BE4: 2F890000 cmpi cr7,r9,0
+ 61: GETL R9, t42
+ 62: CMP0L t42, t44 (-rSo)
+ 63: ICRFL t44, $0x7, CR
+ 64: INCEIPL $4
+
+ 0x25473BE8: 409EFFEC bc 4,30,0x25473BD4
+ 65: Jc30o $0x25473BD4
+
+
+. 0 25473BAC 64
+. 57 36 10 3A 83 A1 00 00 38 D6 00 1E 39 60 00 00 54 C0 00 36 7F 40 00 D0 7F A1 D1 6E 3B 61 00 17 81 2E 01 C4 57 7A 00 36 55 6C 10 3A 39 6B 00 01 7D 2C D1 2E 81 29 00 0C 2F 89 00 00 40 9E FF EC
+
+==== BB 618 (0x25473BEC) approx BBs exec'd 0 ====
+
+ 0x25473BEC: 4BFFEBD4 b 0x254727C0
+ 0: JMPo $0x254727C0 ($4)
+
+
+. 0 25473BEC 4
+. 4B FF EB D4
+
+==== BB 619 (0x254727C0) approx BBs exec'd 0 ====
+
+ 0x254727C0: 817F0030 lwz r11,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254727C4: 38E00000 li r7,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x254727C8: 7F44D378 or r4,r26,r26
+ 8: GETL R26, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x254727CC: 7F25CB78 or r5,r25,r25
+ 11: GETL R25, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0x254727D0: 69660003 xori r6,r11,0x3
+ 14: GETL R11, t10
+ 15: XORL $0x3, t10
+ 16: PUTL t10, R6
+ 17: INCEIPL $4
+
+ 0x254727D4: 20060000 subfic r0,r6,0
+ 18: GETL R6, t12
+ 19: MOVL $0x0, t14
+ 20: SBBL t12, t14 (-wCa)
+ 21: PUTL t14, R0
+ 22: INCEIPL $4
+
+ 0x254727D8: 7CC03114 adde r6,r0,r6
+ 23: GETL R0, t16
+ 24: GETL R6, t18
+ 25: ADCL t16, t18 (-rCa-wCa)
+ 26: PUTL t18, R6
+ 27: INCEIPL $4
+
+ 0x254727DC: 7E83A378 or r3,r20,r20
+ 28: GETL R20, t20
+ 29: PUTL t20, R3
+ 30: INCEIPL $4
+
+ 0x254727E0: 480079E5 bl 0x2547A1C4
+ 31: MOVL $0x254727E4, t22
+ 32: PUTL t22, LR
+ 33: JMPo-c $0x2547A1C4 ($4)
+
+
+. 0 254727C0 36
+. 81 7F 00 30 38 E0 00 00 7F 44 D3 78 7F 25 CB 78 69 66 00 03 20 06 00 00 7C C0 31 14 7E 83 A3 78 48 00 79 E5
+
+==== BB 620 _dl_map_object_deps(0x2547A1C4) approx BBs exec'd 0 ====
+
+ 0x2547A1C4: 9421FF60 stwu r1,-160(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF60, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547A1C8: 7D2802A6 mflr r9
+ 6: GETL LR, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x2547A1CC: 91E1005C stw r15,92(r1)
+ 9: GETL R15, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x5C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547A1D0: 1DE5000C mulli r15,r5,12
+ 14: GETL R5, t10
+ 15: MULL $0xC, t10
+ 16: PUTL t10, R15
+ 17: INCEIPL $4
+
+ 0x2547A1D4: 91C10058 stw r14,88(r1)
+ 18: GETL R14, t12
+ 19: GETL R1, t14
+ 20: ADDL $0x58, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0x2547A1D8: 4801CE29 bl 0x25497000
+ 23: MOVL $0x2547A1DC, t16
+ 24: PUTL t16, LR
+ 25: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547A1C4 24
+. 94 21 FF 60 7D 28 02 A6 91 E1 00 5C 1D E5 00 0C 91 C1 00 58 48 01 CE 29
+
+==== BB 621 (0x2547A1DC) approx BBs exec'd 0 ====
+
+ 0x2547A1DC: 39CF0036 addi r14,r15,54
+ 0: GETL R15, t0
+ 1: ADDL $0x36, t0
+ 2: PUTL t0, R14
+ 3: INCEIPL $4
+
+ 0x2547A1E0: 81410000 lwz r10,0(r1)
+ 4: GETL R1, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0x2547A1E4: 55CC0036 rlwinm r12,r14,0,0,27
+ 8: GETL R14, t6
+ 9: ANDL $0xFFFFFFF0, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x2547A1E8: 93A10094 stw r29,148(r1)
+ 12: GETL R29, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x94, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x2547A1EC: 7D0C00D0 neg r8,r12
+ 17: GETL R12, t12
+ 18: NEGL t12
+ 19: PUTL t12, R8
+ 20: INCEIPL $4
+
+ 0x2547A1F0: 3BA00000 li r29,0
+ 21: MOVL $0x0, t14
+ 22: PUTL t14, R29
+ 23: INCEIPL $4
+
+ 0x2547A1F4: 912100A4 stw r9,164(r1)
+ 24: GETL R9, t16
+ 25: GETL R1, t18
+ 26: ADDL $0xA4, t18
+ 27: STL t16, (t18)
+ 28: INCEIPL $4
+
+ 0x2547A1F8: 7F9D2840 cmpl cr7,r29,r5
+ 29: GETL R29, t20
+ 30: GETL R5, t22
+ 31: CMPUL t20, t22, t24 (-rSo)
+ 32: ICRFL t24, $0x7, CR
+ 33: INCEIPL $4
+
+ 0x2547A1FC: 92E1007C stw r23,124(r1)
+ 34: GETL R23, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x7C, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x2547A200: 7C771B78 or r23,r3,r3
+ 39: GETL R3, t30
+ 40: PUTL t30, R23
+ 41: INCEIPL $4
+
+ 0x2547A204: 93C10098 stw r30,152(r1)
+ 42: GETL R30, t32
+ 43: GETL R1, t34
+ 44: ADDL $0x98, t34
+ 45: STL t32, (t34)
+ 46: INCEIPL $4
+
+ 0x2547A208: 38000000 li r0,0
+ 47: MOVL $0x0, t36
+ 48: PUTL t36, R0
+ 49: INCEIPL $4
+
+ 0x2547A20C: 93E1009C stw r31,156(r1)
+ 50: GETL R31, t38
+ 51: GETL R1, t40
+ 52: ADDL $0x9C, t40
+ 53: STL t38, (t40)
+ 54: INCEIPL $4
+
+ 0x2547A210: 7C3F0B78 or r31,r1,r1
+ 55: GETL R1, t42
+ 56: PUTL t42, R31
+ 57: INCEIPL $4
+
+ 0x2547A214: 92010060 stw r16,96(r1)
+ 58: GETL R16, t44
+ 59: GETL R1, t46
+ 60: ADDL $0x60, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x2547A218: 7FC802A6 mflr r30
+ 63: GETL LR, t48
+ 64: PUTL t48, R30
+ 65: INCEIPL $4
+
+ 0x2547A21C: 92210064 stw r17,100(r1)
+ 66: GETL R17, t50
+ 67: GETL R1, t52
+ 68: ADDL $0x64, t52
+ 69: STL t50, (t52)
+ 70: INCEIPL $4
+
+ 0x2547A220: 7CCF3378 or r15,r6,r6
+ 71: GETL R6, t54
+ 72: PUTL t54, R15
+ 73: INCEIPL $4
+
+ 0x2547A224: 92410068 stw r18,104(r1)
+ 74: GETL R18, t56
+ 75: GETL R1, t58
+ 76: ADDL $0x68, t58
+ 77: STL t56, (t58)
+ 78: INCEIPL $4
+
+ 0x2547A228: 7CEE3B78 or r14,r7,r7
+ 79: GETL R7, t60
+ 80: PUTL t60, R14
+ 81: INCEIPL $4
+
+ 0x2547A22C: 9261006C stw r19,108(r1)
+ 82: GETL R19, t62
+ 83: GETL R1, t64
+ 84: ADDL $0x6C, t64
+ 85: STL t62, (t64)
+ 86: INCEIPL $4
+
+ 0x2547A230: 92810070 stw r20,112(r1)
+ 87: GETL R20, t66
+ 88: GETL R1, t68
+ 89: ADDL $0x70, t68
+ 90: STL t66, (t68)
+ 91: INCEIPL $4
+
+ 0x2547A234: 92A10074 stw r21,116(r1)
+ 92: GETL R21, t70
+ 93: GETL R1, t72
+ 94: ADDL $0x74, t72
+ 95: STL t70, (t72)
+ 96: INCEIPL $4
+
+ 0x2547A238: 92C10078 stw r22,120(r1)
+ 97: GETL R22, t74
+ 98: GETL R1, t76
+ 99: ADDL $0x78, t76
+ 100: STL t74, (t76)
+ 101: INCEIPL $4
+
+ 0x2547A23C: 93010080 stw r24,128(r1)
+ 102: GETL R24, t78
+ 103: GETL R1, t80
+ 104: ADDL $0x80, t80
+ 105: STL t78, (t80)
+ 106: INCEIPL $4
+
+ 0x2547A240: 93210084 stw r25,132(r1)
+ 107: GETL R25, t82
+ 108: GETL R1, t84
+ 109: ADDL $0x84, t84
+ 110: STL t82, (t84)
+ 111: INCEIPL $4
+
+ 0x2547A244: 93410088 stw r26,136(r1)
+ 112: GETL R26, t86
+ 113: GETL R1, t88
+ 114: ADDL $0x88, t88
+ 115: STL t86, (t88)
+ 116: INCEIPL $4
+
+ 0x2547A248: 9361008C stw r27,140(r1)
+ 117: GETL R27, t90
+ 118: GETL R1, t92
+ 119: ADDL $0x8C, t92
+ 120: STL t90, (t92)
+ 121: INCEIPL $4
+
+ 0x2547A24C: 93810090 stw r28,144(r1)
+ 122: GETL R28, t94
+ 123: GETL R1, t96
+ 124: ADDL $0x90, t96
+ 125: STL t94, (t96)
+ 126: INCEIPL $4
+
+ 0x2547A250: 7D41416E stwux r10,r1,r8
+ 127: GETL R8, t98
+ 128: GETL R1, t100
+ 129: ADDL t100, t98
+ 130: PUTL t98, R1
+ 131: GETL R10, t102
+ 132: STL t102, (t98)
+ 133: INCEIPL $4
+
+ 0x2547A254: 39000001 li r8,1
+ 134: MOVL $0x1, t104
+ 135: PUTL t104, R8
+ 136: INCEIPL $4
+
+ 0x2547A258: 81230180 lwz r9,384(r3)
+ 137: GETL R3, t106
+ 138: ADDL $0x180, t106
+ 139: LDL (t106), t108
+ 140: PUTL t108, R9
+ 141: INCEIPL $4
+
+ 0x2547A25C: 38610017 addi r3,r1,23
+ 142: GETL R1, t110
+ 143: ADDL $0x17, t110
+ 144: PUTL t110, R3
+ 145: INCEIPL $4
+
+ 0x2547A260: 546A0036 rlwinm r10,r3,0,0,27
+ 146: GETL R3, t112
+ 147: ANDL $0xFFFFFFF0, t112
+ 148: PUTL t112, R10
+ 149: INCEIPL $4
+
+ 0x2547A264: 5109C94C rlwimi r9,r8,25,5,6
+ 150: GETL R9, t114
+ 151: GETL R8, t116
+ 152: ROLL $0x19, t116
+ 153: ANDL $0x6000000, t116
+ 154: ANDL $0xF9FFFFFF, t114
+ 155: ORL t114, t116
+ 156: PUTL t116, R9
+ 157: INCEIPL $4
+
+ 0x2547A268: 396A000C addi r11,r10,12
+ 158: GETL R10, t118
+ 159: ADDL $0xC, t118
+ 160: PUTL t118, R11
+ 161: INCEIPL $4
+
+ 0x2547A26C: 900A0000 stw r0,0(r10)
+ 162: GETL R0, t120
+ 163: GETL R10, t122
+ 164: STL t120, (t122)
+ 165: INCEIPL $4
+
+ 0x2547A270: 916A0008 stw r11,8(r10)
+ 166: GETL R11, t124
+ 167: GETL R10, t126
+ 168: ADDL $0x8, t126
+ 169: STL t124, (t126)
+ 170: INCEIPL $4
+
+ 0x2547A274: 91370180 stw r9,384(r23)
+ 171: GETL R9, t128
+ 172: GETL R23, t130
+ 173: ADDL $0x180, t130
+ 174: STL t128, (t130)
+ 175: INCEIPL $4
+
+ 0x2547A278: 915F0008 stw r10,8(r31)
+ 176: GETL R10, t132
+ 177: GETL R31, t134
+ 178: ADDL $0x8, t134
+ 179: STL t132, (t134)
+ 180: INCEIPL $4
+
+ 0x2547A27C: 92EA0004 stw r23,4(r10)
+ 181: GETL R23, t136
+ 182: GETL R10, t138
+ 183: ADDL $0x4, t138
+ 184: STL t136, (t138)
+ 185: INCEIPL $4
+
+ 0x2547A280: 911F000C stw r8,12(r31)
+ 186: GETL R8, t140
+ 187: GETL R31, t142
+ 188: ADDL $0xC, t142
+ 189: STL t140, (t142)
+ 190: INCEIPL $4
+
+ 0x2547A284: 409C005C bc 4,28,0x2547A2E0
+ 191: Jc28o $0x2547A2E0
+
+
+. 0 2547A1DC 172
+. 39 CF 00 36 81 41 00 00 55 CC 00 36 93 A1 00 94 7D 0C 00 D0 3B A0 00 00 91 21 00 A4 7F 9D 28 40 92 E1 00 7C 7C 77 1B 78 93 C1 00 98 38 00 00 00 93 E1 00 9C 7C 3F 0B 78 92 01 00 60 7F C8 02 A6 92 21 00 64 7C CF 33 78 92 41 00 68 7C EE 3B 78 92 61 00 6C 92 81 00 70 92 A1 00 74 92 C1 00 78 93 01 00 80 93 21 00 84 93 41 00 88 93 61 00 8C 93 81 00 90 7D 41 41 6E 39 00 00 01 81 23 01 80 38 61 00 17 54 6A 00 36 51 09 C9 4C 39 6A 00 0C 90 0A 00 00 91 6A 00 08 91 37 01 80 91 5F 00 08 92 EA 00 04 91 1F 00 0C 40 9C 00 5C
+
+==== BB 622 (0x2547A288) approx BBs exec'd 0 ====
+
+ 0x2547A288: 7CA903A6 mtctr r5
+ 0: GETL R5, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x2547A28C: 7D475378 or r7,r10,r10
+ 3: GETL R10, t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x2547A290: 38A00000 li r5,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547A294: 38C00001 li r6,1
+ 9: MOVL $0x1, t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0x2547A298: 48000008 b 0x2547A2A0
+ 12: JMPo $0x2547A2A0 ($4)
+
+
+. 0 2547A288 20
+. 7C A9 03 A6 7D 47 53 78 38 A0 00 00 38 C0 00 01 48 00 00 08
+
+==== BB 623 (0x2547A2A0) approx BBs exec'd 0 ====
+
+ 0x2547A2A0: 1E68000C mulli r19,r8,12
+ 0: GETL R8, t0
+ 1: MULL $0xC, t0
+ 2: PUTL t0, R19
+ 3: INCEIPL $4
+
+ 0x2547A2A4: 57B5103A rlwinm r21,r29,2,0,29
+ 4: GETL R29, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R21
+ 7: INCEIPL $4
+
+ 0x2547A2A8: 7E15202E lwzx r16,r21,r4
+ 8: GETL R4, t4
+ 9: GETL R21, t6
+ 10: ADDL t6, t4
+ 11: LDL (t4), t8
+ 12: PUTL t8, R16
+ 13: INCEIPL $4
+
+ 0x2547A2AC: 39280001 addi r9,r8,1
+ 14: GETL R8, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x2547A2B0: 7E533A14 add r18,r19,r7
+ 18: GETL R19, t12
+ 19: GETL R7, t14
+ 20: ADDL t12, t14
+ 21: PUTL t14, R18
+ 22: INCEIPL $4
+
+ 0x2547A2B4: 7CB3392E stwx r5,r19,r7
+ 23: GETL R7, t16
+ 24: GETL R19, t18
+ 25: ADDL t18, t16
+ 26: GETL R5, t20
+ 27: STL t20, (t16)
+ 28: INCEIPL $4
+
+ 0x2547A2B8: 3A92000C addi r20,r18,12
+ 29: GETL R18, t22
+ 30: ADDL $0xC, t22
+ 31: PUTL t22, R20
+ 32: INCEIPL $4
+
+ 0x2547A2BC: 92120004 stw r16,4(r18)
+ 33: GETL R16, t24
+ 34: GETL R18, t26
+ 35: ADDL $0x4, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0x2547A2C0: 92920008 stw r20,8(r18)
+ 38: GETL R20, t28
+ 39: GETL R18, t30
+ 40: ADDL $0x8, t30
+ 41: STL t28, (t30)
+ 42: INCEIPL $4
+
+ 0x2547A2C4: 3BBD0001 addi r29,r29,1
+ 43: GETL R29, t32
+ 44: ADDL $0x1, t32
+ 45: PUTL t32, R29
+ 46: INCEIPL $4
+
+ 0x2547A2C8: 82300180 lwz r17,384(r16)
+ 47: GETL R16, t34
+ 48: ADDL $0x180, t34
+ 49: LDL (t34), t36
+ 50: PUTL t36, R17
+ 51: INCEIPL $4
+
+ 0x2547A2CC: 913F000C stw r9,12(r31)
+ 52: GETL R9, t38
+ 53: GETL R31, t40
+ 54: ADDL $0xC, t40
+ 55: STL t38, (t40)
+ 56: INCEIPL $4
+
+ 0x2547A2D0: 50D1C94C rlwimi r17,r6,25,5,6
+ 57: GETL R17, t42
+ 58: GETL R6, t44
+ 59: ROLL $0x19, t44
+ 60: ANDL $0x6000000, t44
+ 61: ANDL $0xF9FFFFFF, t42
+ 62: ORL t42, t44
+ 63: PUTL t44, R17
+ 64: INCEIPL $4
+
+ 0x2547A2D4: 92300180 stw r17,384(r16)
+ 65: GETL R17, t46
+ 66: GETL R16, t48
+ 67: ADDL $0x180, t48
+ 68: STL t46, (t48)
+ 69: INCEIPL $4
+
+ 0x2547A2D8: 4200FFC4 bc 16,0,0x2547A29C
+ 70: GETL CTR, t50
+ 71: ADDL $0xFFFFFFFF, t50
+ 72: PUTL t50, CTR
+ 73: JIFZL t50, $0x2547A2DC
+ 74: JMPo $0x2547A29C ($4)
+
+
+. 0 2547A2A0 60
+. 1E 68 00 0C 57 B5 10 3A 7E 15 20 2E 39 28 00 01 7E 53 3A 14 7C B3 39 2E 3A 92 00 0C 92 12 00 04 92 92 00 08 3B BD 00 01 82 30 01 80 91 3F 00 0C 50 D1 C9 4C 92 30 01 80 42 00 FF C4
+
+==== BB 624 (0x2547A2DC) approx BBs exec'd 0 ====
+
+ 0x2547A2DC: 7D284B78 or r8,r9,r9
+ 0: GETL R9, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0x2547A2E0: 831F0008 lwz r24,8(r31)
+ 3: GETL R31, t2
+ 4: ADDL $0x8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R24
+ 7: INCEIPL $4
+
+ 0x2547A2E4: 1EC8000C mulli r22,r8,12
+ 8: GETL R8, t6
+ 9: MULL $0xC, t6
+ 10: PUTL t6, R22
+ 11: INCEIPL $4
+
+ 0x2547A2E8: 821E0514 lwz r16,1300(r30)
+ 12: GETL R30, t8
+ 13: ADDL $0x514, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R16
+ 16: INCEIPL $4
+
+ 0x2547A2EC: 3A200000 li r17,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R17
+ 19: INCEIPL $4
+
+ 0x2547A2F0: 7F1BC379 or. r27,r24,r24
+ 20: GETL R24, t14
+ 21: PUTL t14, R27
+ 22: CMP0L t14, t16 (-rSo)
+ 23: ICRFL t16, $0x0, CR
+ 24: INCEIPL $4
+
+ 0x2547A2F4: 7CF6C214 add r7,r22,r24
+ 25: GETL R22, t18
+ 26: GETL R24, t20
+ 27: ADDL t18, t20
+ 28: PUTL t20, R7
+ 29: INCEIPL $4
+
+ 0x2547A2F8: 80900000 lwz r4,0(r16)
+ 30: GETL R16, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R4
+ 33: INCEIPL $4
+
+ 0x2547A2FC: 38A7FFF4 addi r5,r7,-12
+ 34: GETL R7, t26
+ 35: ADDL $0xFFFFFFF4, t26
+ 36: PUTL t26, R5
+ 37: INCEIPL $4
+
+ 0x2547A300: 38C00000 li r6,0
+ 38: MOVL $0x0, t28
+ 39: PUTL t28, R6
+ 40: INCEIPL $4
+
+ 0x2547A304: 7CB32B78 or r19,r5,r5
+ 41: GETL R5, t30
+ 42: PUTL t30, R19
+ 43: INCEIPL $4
+
+ 0x2547A308: 90C50008 stw r6,8(r5)
+ 44: GETL R6, t32
+ 45: GETL R5, t34
+ 46: ADDL $0x8, t34
+ 47: STL t32, (t34)
+ 48: INCEIPL $4
+
+ 0x2547A30C: 923F0034 stw r17,52(r31)
+ 49: GETL R17, t36
+ 50: GETL R31, t38
+ 51: ADDL $0x34, t38
+ 52: STL t36, (t38)
+ 53: INCEIPL $4
+
+ 0x2547A310: 909F0038 stw r4,56(r31)
+ 54: GETL R4, t40
+ 55: GETL R31, t42
+ 56: ADDL $0x38, t42
+ 57: STL t40, (t42)
+ 58: INCEIPL $4
+
+ 0x2547A314: 92300000 stw r17,0(r16)
+ 59: GETL R17, t44
+ 60: GETL R16, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x2547A318: 418202AC bc 12,2,0x2547A5C4
+ 63: Js02o $0x2547A5C4
+
+
+. 0 2547A2DC 64
+. 7D 28 4B 78 83 1F 00 08 1E C8 00 0C 82 1E 05 14 3A 20 00 00 7F 1B C3 79 7C F6 C2 14 80 90 00 00 38 A7 FF F4 38 C0 00 00 7C B3 2B 78 90 C5 00 08 92 3F 00 34 90 9F 00 38 92 30 00 00 41 82 02 AC
+
+==== BB 625 (0x2547A31C) approx BBs exec'd 0 ====
+
+ 0x2547A31C: 835B0004 lwz r26,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547A320: 3B800001 li r28,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x2547A324: 939B0000 stw r28,0(r27)
+ 8: GETL R28, t6
+ 9: GETL R27, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x2547A328: 3B000000 li r24,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R24
+ 14: INCEIPL $4
+
+ 0x2547A32C: 833A0158 lwz r25,344(r26)
+ 15: GETL R26, t12
+ 16: ADDL $0x158, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R25
+ 19: INCEIPL $4
+
+ 0x2547A330: 3AC00000 li r22,0
+ 20: MOVL $0x0, t16
+ 21: PUTL t16, R22
+ 22: INCEIPL $4
+
+ 0x2547A334: 2C990000 cmpi cr1,r25,0
+ 23: GETL R25, t18
+ 24: CMP0L t18, t20 (-rSo)
+ 25: ICRFL t20, $0x1, CR
+ 26: INCEIPL $4
+
+ 0x2547A338: 40860030 bc 4,6,0x2547A368
+ 27: Jc06o $0x2547A368
+
+
+. 0 2547A31C 32
+. 83 5B 00 04 3B 80 00 01 93 9B 00 00 3B 00 00 00 83 3A 01 58 3A C0 00 00 2C 99 00 00 40 86 00 30
+
+==== BB 626 (0x2547A33C) approx BBs exec'd 0 ====
+
+ 0x2547A33C: 807A01E8 lwz r3,488(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x1E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547A340: 7F4BBA78 xor r11,r26,r23
+ 5: GETL R26, t4
+ 6: GETL R23, t6
+ 7: XORL t4, t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x2547A344: 314BFFFF addic r10,r11,-1
+ 10: GETL R11, t8
+ 11: ADCL $0xFFFFFFFF, t8 (-wCa)
+ 12: PUTL t8, R10
+ 13: INCEIPL $4
+
+ 0x2547A348: 7FAA5910 subfe r29,r10,r11
+ 14: GETL R10, t10
+ 15: GETL R11, t12
+ 16: SBBL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0x2547A34C: 21230000 subfic r9,r3,0
+ 19: GETL R3, t14
+ 20: MOVL $0x0, t16
+ 21: SBBL t14, t16 (-wCa)
+ 22: PUTL t16, R9
+ 23: INCEIPL $4
+
+ 0x2547A350: 7C091914 adde r0,r9,r3
+ 24: GETL R9, t18
+ 25: GETL R3, t20
+ 26: ADCL t18, t20 (-rCa-wCa)
+ 27: PUTL t20, R0
+ 28: INCEIPL $4
+
+ 0x2547A354: 7C0BE839 and. r11,r0,r29
+ 29: GETL R0, t22
+ 30: GETL R29, t24
+ 31: ANDL t22, t24
+ 32: PUTL t24, R11
+ 33: CMP0L t24, t26 (-rSo)
+ 34: ICRFL t26, $0x0, CR
+ 35: INCEIPL $4
+
+ 0x2547A358: 41820010 bc 12,2,0x2547A368
+ 36: Js02o $0x2547A368
+
+
+. 0 2547A33C 32
+. 80 7A 01 E8 7F 4B BA 78 31 4B FF FF 7F AA 59 10 21 23 00 00 7C 09 19 14 7C 0B E8 39 41 82 00 10
+
+==== BB 627 (0x2547A368) approx BBs exec'd 0 ====
+
+ 0x2547A368: 82BA0024 lwz r21,36(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x2547A36C: 2F950000 cmpi cr7,r21,0
+ 5: GETL R21, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547A370: 409E001C bc 4,30,0x2547A38C
+ 9: Jc30o $0x2547A38C
+
+
+. 0 2547A368 12
+. 82 BA 00 24 2F 95 00 00 40 9E 00 1C
+
+==== BB 628 (0x2547A38C) approx BBs exec'd 0 ====
+
+ 0x2547A38C: 80DA0034 lwz r6,52(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547A390: 7F72DB78 or r18,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R18
+ 7: INCEIPL $4
+
+ 0x2547A394: 839A0008 lwz r28,8(r26)
+ 8: GETL R26, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0x2547A398: 82A60004 lwz r21,4(r6)
+ 13: GETL R6, t10
+ 14: ADDL $0x4, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R21
+ 17: INCEIPL $4
+
+ 0x2547A39C: 91FF0014 stw r15,20(r31)
+ 18: GETL R15, t14
+ 19: GETL R31, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x2547A3A0: 91DF0018 stw r14,24(r31)
+ 23: GETL R14, t18
+ 24: GETL R31, t20
+ 25: ADDL $0x18, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0x2547A3A4: 813C0000 lwz r9,0(r28)
+ 28: GETL R28, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R9
+ 31: INCEIPL $4
+
+ 0x2547A3A8: 92BF001C stw r21,28(r31)
+ 32: GETL R21, t26
+ 33: GETL R31, t28
+ 34: ADDL $0x1C, t28
+ 35: STL t26, (t28)
+ 36: INCEIPL $4
+
+ 0x2547A3AC: 2F090000 cmpi cr6,r9,0
+ 37: GETL R9, t30
+ 38: CMP0L t30, t32 (-rSo)
+ 39: ICRFL t32, $0x6, CR
+ 40: INCEIPL $4
+
+ 0x2547A3B0: 935F0010 stw r26,16(r31)
+ 41: GETL R26, t34
+ 42: GETL R31, t36
+ 43: ADDL $0x10, t36
+ 44: STL t34, (t36)
+ 45: INCEIPL $4
+
+ 0x2547A3B4: 419A0504 bc 12,26,0x2547A8B8
+ 46: Js26o $0x2547A8B8
+
+
+. 0 2547A38C 44
+. 80 DA 00 34 7F 72 DB 78 83 9A 00 08 82 A6 00 04 91 FF 00 14 91 DF 00 18 81 3C 00 00 92 BF 00 1C 2F 09 00 00 93 5F 00 10 41 9A 05 04
+
+==== BB 629 (0x2547A3B8) approx BBs exec'd 0 ====
+
+ 0x2547A3B8: 3F207FFF lis r25,32767
+ 0: MOVL $0x7FFF0000, t0
+ 1: PUTL t0, R25
+ 2: INCEIPL $4
+
+ 0x2547A3BC: 6327FFFD ori r7,r25,0xFFFD
+ 3: MOVL $0x7FFFFFFD, t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x2547A3C0: 90FF0040 stw r7,64(r31)
+ 6: GETL R7, t4
+ 7: GETL R31, t6
+ 8: ADDL $0x40, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x2547A3C4: 480000BC b 0x2547A480
+ 11: JMPo $0x2547A480 ($4)
+
+
+. 0 2547A3B8 16
+. 3F 20 7F FF 63 27 FF FD 90 FF 00 40 48 00 00 BC
+
+==== BB 630 (0x2547A480) approx BBs exec'd 0 ====
+
+ 0x2547A480: 2F890001 cmpi cr7,r9,1
+ 0: GETL R9, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x2547A484: 419EFF44 bc 12,30,0x2547A3C8
+ 5: Js30o $0x2547A3C8
+
+
+. 0 2547A480 8
+. 2F 89 00 01 41 9E FF 44
+
+==== BB 631 (0x2547A3C8) approx BBs exec'd 0 ====
+
+ 0x2547A3C8: 801C0004 lwz r0,4(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547A3CC: 38800024 li r4,36
+ 5: MOVL $0x24, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x2547A3D0: 7FA0AA14 add r29,r0,r21
+ 8: GETL R0, t6
+ 9: GETL R21, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x2547A3D4: 7FA3EB78 or r3,r29,r29
+ 13: GETL R29, t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0x2547A3D8: 7FB9EB78 or r25,r29,r29
+ 16: GETL R29, t12
+ 17: PUTL t12, R25
+ 18: INCEIPL $4
+
+ 0x2547A3DC: 48008A25 bl 0x25482E00
+ 19: MOVL $0x2547A3E0, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x25482E00 ($4)
+
+
+. 0 2547A3C8 24
+. 80 1C 00 04 38 80 00 24 7F A0 AA 14 7F A3 EB 78 7F B9 EB 78 48 00 8A 25
+
+==== BB 632 (0x2547A3E0) approx BBs exec'd 0 ====
+
+ 0x2547A3E0: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547A3E4: 40860588 bc 4,6,0x2547A96C
+ 4: Jc06o $0x2547A96C
+
+
+. 0 2547A3E0 8
+. 2C 83 00 00 40 86 05 88
+
+==== BB 633 (0x2547A3E8) approx BBs exec'd 0 ====
+
+ 0x2547A3E8: 80BE02F8 lwz r5,760(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x2F8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547A3EC: 387F0030 addi r3,r31,48
+ 5: GETL R31, t4
+ 6: ADDL $0x30, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x2547A3F0: 389F0034 addi r4,r31,52
+ 9: GETL R31, t6
+ 10: ADDL $0x34, t6
+ 11: PUTL t6, R4
+ 12: INCEIPL $4
+
+ 0x2547A3F4: 38DF0010 addi r6,r31,16
+ 13: GETL R31, t8
+ 14: ADDL $0x10, t8
+ 15: PUTL t8, R6
+ 16: INCEIPL $4
+
+ 0x2547A3F8: 93BF0020 stw r29,32(r31)
+ 17: GETL R29, t10
+ 18: GETL R31, t12
+ 19: ADDL $0x20, t12
+ 20: STL t10, (t12)
+ 21: INCEIPL $4
+
+ 0x2547A3FC: 480011A5 bl 0x2547B5A0
+ 22: MOVL $0x2547A400, t14
+ 23: PUTL t14, LR
+ 24: JMPo-c $0x2547B5A0 ($4)
+
+
+. 0 2547A3E8 24
+. 80 BE 02 F8 38 7F 00 30 38 9F 00 34 38 DF 00 10 93 BF 00 20 48 00 11 A5
+
+==== BB 634 _dl_catch_error(0x2547B5A0) approx BBs exec'd 0 ====
+
+ 0x2547B5A0: 9421FD60 stwu r1,-672(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFD60, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547B5A4: 7D4802A6 mflr r10
+ 6: GETL LR, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x2547B5A8: 4801BA59 bl 0x25497000
+ 9: MOVL $0x2547B5AC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547B5A0 12
+. 94 21 FD 60 7D 48 02 A6 48 01 BA 59
+
+==== BB 635 (0x2547B5AC) approx BBs exec'd 0 ====
+
+ 0x2547B5AC: 93C10298 stw r30,664(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x298, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547B5B0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547B5B4: 39000000 li r8,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R8
+ 10: INCEIPL $4
+
+ 0x2547B5B8: 914102A4 stw r10,676(r1)
+ 11: GETL R10, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x2A4, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x2547B5BC: 93E1029C stw r31,668(r1)
+ 16: GETL R31, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x29C, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x2547B5C0: 80FE04C8 lwz r7,1224(r30)
+ 21: GETL R30, t16
+ 22: ADDL $0x4C8, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R7
+ 25: INCEIPL $4
+
+ 0x2547B5C4: 91010014 stw r8,20(r1)
+ 26: GETL R8, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x14, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0x2547B5C8: 812701B4 lwz r9,436(r7)
+ 31: GETL R7, t24
+ 32: ADDL $0x1B4, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R9
+ 35: INCEIPL $4
+
+ 0x2547B5CC: 90810274 stw r4,628(r1)
+ 36: GETL R4, t28
+ 37: GETL R1, t30
+ 38: ADDL $0x274, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0x2547B5D0: 7D2903A6 mtctr r9
+ 41: GETL R9, t32
+ 42: PUTL t32, CTR
+ 43: INCEIPL $4
+
+ 0x2547B5D4: 90A10278 stw r5,632(r1)
+ 44: GETL R5, t34
+ 45: GETL R1, t36
+ 46: ADDL $0x278, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0x2547B5D8: 90C1027C stw r6,636(r1)
+ 49: GETL R6, t38
+ 50: GETL R1, t40
+ 51: ADDL $0x27C, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0x2547B5DC: 90610270 stw r3,624(r1)
+ 54: GETL R3, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x270, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0x2547B5E0: 4E800421 bctrl
+ 59: MOVL $0x2547B5E4, t46
+ 60: PUTL t46, LR
+ 61: GETL CTR, t48
+ 62: JMPo-c t48 ($4)
+
+
+. 0 2547B5AC 56
+. 93 C1 02 98 7F C8 02 A6 39 00 00 00 91 41 02 A4 93 E1 02 9C 80 FE 04 C8 91 01 00 14 81 27 01 B4 90 81 02 74 7D 29 03 A6 90 A1 02 78 90 C1 02 7C 90 61 02 70 4E 80 04 21
+
+==== BB 636 _dl_initial_error_catch_tsd(0x2547185C) approx BBs exec'd 0 ====
+
+ 0x2547185C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25471860: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x25471864: 4802579D bl 0x25497000
+ 9: MOVL $0x25471868, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547185C 12
+. 94 21 FF F0 7D 88 02 A6 48 02 57 9D
+
+==== BB 637 (0x25471868) approx BBs exec'd 0 ====
+
+ 0x25471868: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547186C: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25471870: 7D8803A6 mtlr r12
+ 8: GETL R12, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0x25471874: 807E0018 lwz r3,24(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x18, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0x25471878: 83C10008 lwz r30,8(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x8, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R30
+ 20: INCEIPL $4
+
+ 0x2547187C: 38210010 addi r1,r1,16
+ 21: GETL R1, t16
+ 22: ADDL $0x10, t16
+ 23: PUTL t16, R1
+ 24: INCEIPL $4
+
+ 0x25471880: 4E800020 blr
+ 25: GETL LR, t18
+ 26: JMPo-r t18 ($4)
+
+
+. 0 25471868 28
+. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 80 7E 00 18 83 C1 00 08 38 21 00 10 4E 80 00 20
+
+==== BB 638 (0x2547B5E4) approx BBs exec'd 0 ====
+
+ 0x2547B5E4: 80030000 lwz r0,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547B5E8: 90610280 stw r3,640(r1)
+ 4: GETL R3, t4
+ 5: GETL R1, t6
+ 6: ADDL $0x280, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547B5EC: 38610020 addi r3,r1,32
+ 9: GETL R1, t8
+ 10: ADDL $0x20, t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0x2547B5F0: 90010008 stw r0,8(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x8, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547B5F4: 480072BD bl 0x254828B0
+ 18: MOVL $0x2547B5F8, t14
+ 19: PUTL t14, LR
+ 20: JMPo-c $0x254828B0 ($4)
+
+
+. 0 2547B5E4 20
+. 80 03 00 00 90 61 02 80 38 61 00 20 90 01 00 08 48 00 72 BD
+
+==== BB 639 _setjmp(0x254828B0) approx BBs exec'd 0 ====
+
+ 0x254828B0: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254828B4: 480001DC b 0x25482A90
+ 3: JMPo $0x25482A90 ($4)
+
+
+. 0 254828B0 8
+. 38 80 00 00 48 00 01 DC
+
+==== BB 640 __sigsetjmp(0x25482A90) approx BBs exec'd 0 ====
+
+ 0x25482A90: 90230000 stw r1,0(r3)
+ 0: GETL R1, t0
+ 1: GETL R3, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25482A94: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0x25482A98: 91C3000C stw r14,12(r3)
+ 7: GETL R14, t6
+ 8: GETL R3, t8
+ 9: ADDL $0xC, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25482A9C: D9C30058 stfd f14,88(r3)
+ 12: GETL R3, t10
+ 13: ADDL $0x58, t10
+ 14: FPU_WQ 0x0:0xE, (t10)
+ 15: INCEIPL $4
+
+ 0x25482AA0: 90030008 stw r0,8(r3)
+ 16: GETL R0, t12
+ 17: GETL R3, t14
+ 18: ADDL $0x8, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x25482AA4: 91E30010 stw r15,16(r3)
+ 21: GETL R15, t16
+ 22: GETL R3, t18
+ 23: ADDL $0x10, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25482AA8: D9E30060 stfd f15,96(r3)
+ 26: GETL R3, t20
+ 27: ADDL $0x60, t20
+ 28: FPU_WQ 0x0:0xF, (t20)
+ 29: INCEIPL $4
+
+ 0x25482AAC: 7C000026 mfcr r0
+ 30: GETL CR, t22
+ 31: PUTL t22, R0
+ 32: INCEIPL $4
+
+ 0x25482AB0: 92030014 stw r16,20(r3)
+ 33: GETL R16, t24
+ 34: GETL R3, t26
+ 35: ADDL $0x14, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0x25482AB4: DA030068 stfd f16,104(r3)
+ 38: GETL R3, t28
+ 39: ADDL $0x68, t28
+ 40: FPU_WQ 0x0:0x10, (t28)
+ 41: INCEIPL $4
+
+ 0x25482AB8: 90030054 stw r0,84(r3)
+ 42: GETL R0, t30
+ 43: GETL R3, t32
+ 44: ADDL $0x54, t32
+ 45: STL t30, (t32)
+ 46: INCEIPL $4
+
+ 0x25482ABC: 92230018 stw r17,24(r3)
+ 47: GETL R17, t34
+ 48: GETL R3, t36
+ 49: ADDL $0x18, t36
+ 50: STL t34, (t36)
+ 51: INCEIPL $4
+
+ 0x25482AC0: DA230070 stfd f17,112(r3)
+ 52: GETL R3, t38
+ 53: ADDL $0x70, t38
+ 54: FPU_WQ 0x0:0x11, (t38)
+ 55: INCEIPL $4
+
+ 0x25482AC4: 9243001C stw r18,28(r3)
+ 56: GETL R18, t40
+ 57: GETL R3, t42
+ 58: ADDL $0x1C, t42
+ 59: STL t40, (t42)
+ 60: INCEIPL $4
+
+ 0x25482AC8: DA430078 stfd f18,120(r3)
+ 61: GETL R3, t44
+ 62: ADDL $0x78, t44
+ 63: FPU_WQ 0x0:0x12, (t44)
+ 64: INCEIPL $4
+
+ 0x25482ACC: 92630020 stw r19,32(r3)
+ 65: GETL R19, t46
+ 66: GETL R3, t48
+ 67: ADDL $0x20, t48
+ 68: STL t46, (t48)
+ 69: INCEIPL $4
+
+ 0x25482AD0: DA630080 stfd f19,128(r3)
+ 70: GETL R3, t50
+ 71: ADDL $0x80, t50
+ 72: FPU_WQ 0x0:0x13, (t50)
+ 73: INCEIPL $4
+
+ 0x25482AD4: 92830024 stw r20,36(r3)
+ 74: GETL R20, t52
+ 75: GETL R3, t54
+ 76: ADDL $0x24, t54
+ 77: STL t52, (t54)
+ 78: INCEIPL $4
+
+ 0x25482AD8: DA830088 stfd f20,136(r3)
+ 79: GETL R3, t56
+ 80: ADDL $0x88, t56
+ 81: FPU_WQ 0x0:0x14, (t56)
+ 82: INCEIPL $4
+
+ 0x25482ADC: 92A30028 stw r21,40(r3)
+ 83: GETL R21, t58
+ 84: GETL R3, t60
+ 85: ADDL $0x28, t60
+ 86: STL t58, (t60)
+ 87: INCEIPL $4
+
+ 0x25482AE0: DAA30090 stfd f21,144(r3)
+ 88: GETL R3, t62
+ 89: ADDL $0x90, t62
+ 90: FPU_WQ 0x0:0x15, (t62)
+ 91: INCEIPL $4
+
+ 0x25482AE4: 92C3002C stw r22,44(r3)
+ 92: GETL R22, t64
+ 93: GETL R3, t66
+ 94: ADDL $0x2C, t66
+ 95: STL t64, (t66)
+ 96: INCEIPL $4
+
+ 0x25482AE8: DAC30098 stfd f22,152(r3)
+ 97: GETL R3, t68
+ 98: ADDL $0x98, t68
+ 99: FPU_WQ 0x0:0x16, (t68)
+ 100: INCEIPL $4
+
+ 0x25482AEC: 92E30030 stw r23,48(r3)
+ 101: GETL R23, t70
+ 102: GETL R3, t72
+ 103: ADDL $0x30, t72
+ 104: STL t70, (t72)
+ 105: INCEIPL $4
+
+ 0x25482AF0: DAE300A0 stfd f23,160(r3)
+ 106: GETL R3, t74
+ 107: ADDL $0xA0, t74
+ 108: FPU_WQ 0x0:0x17, (t74)
+ 109: INCEIPL $4
+
+ 0x25482AF4: 93030034 stw r24,52(r3)
+ 110: GETL R24, t76
+ 111: GETL R3, t78
+ 112: ADDL $0x34, t78
+ 113: STL t76, (t78)
+ 114: INCEIPL $4
+
+ 0x25482AF8: DB0300A8 stfd f24,168(r3)
+ 115: GETL R3, t80
+ 116: ADDL $0xA8, t80
+ 117: FPU_WQ 0x0:0x18, (t80)
+ 118: INCEIPL $4
+
+ 0x25482AFC: 93230038 stw r25,56(r3)
+ 119: GETL R25, t82
+ 120: GETL R3, t84
+ 121: ADDL $0x38, t84
+ 122: STL t82, (t84)
+ 123: INCEIPL $4
+
+ 0x25482B00: DB2300B0 stfd f25,176(r3)
+ 124: GETL R3, t86
+ 125: ADDL $0xB0, t86
+ 126: FPU_WQ 0x0:0x19, (t86)
+ 127: INCEIPL $4
+
+ 0x25482B04: 9343003C stw r26,60(r3)
+ 128: GETL R26, t88
+ 129: GETL R3, t90
+ 130: ADDL $0x3C, t90
+ 131: STL t88, (t90)
+ 132: INCEIPL $4
+
+ 0x25482B08: DB4300B8 stfd f26,184(r3)
+ 133: GETL R3, t92
+ 134: ADDL $0xB8, t92
+ 135: FPU_WQ 0x0:0x1A, (t92)
+ 136: INCEIPL $4
+
+ 0x25482B0C: 93630040 stw r27,64(r3)
+ 137: GETL R27, t94
+ 138: GETL R3, t96
+ 139: ADDL $0x40, t96
+ 140: STL t94, (t96)
+ 141: INCEIPL $4
+
+ 0x25482B10: DB6300C0 stfd f27,192(r3)
+ 142: GETL R3, t98
+ 143: ADDL $0xC0, t98
+ 144: FPU_WQ 0x0:0x1B, (t98)
+ 145: INCEIPL $4
+
+ 0x25482B14: 93830044 stw r28,68(r3)
+ 146: GETL R28, t100
+ 147: GETL R3, t102
+ 148: ADDL $0x44, t102
+ 149: STL t100, (t102)
+ 150: INCEIPL $4
+
+ 0x25482B18: DB8300C8 stfd f28,200(r3)
+ 151: GETL R3, t104
+ 152: ADDL $0xC8, t104
+ 153: FPU_WQ 0x0:0x1C, (t104)
+ 154: INCEIPL $4
+
+ 0x25482B1C: 93A30048 stw r29,72(r3)
+ 155: GETL R29, t106
+ 156: GETL R3, t108
+ 157: ADDL $0x48, t108
+ 158: STL t106, (t108)
+ 159: INCEIPL $4
+
+ 0x25482B20: DBA300D0 stfd f29,208(r3)
+ 160: GETL R3, t110
+ 161: ADDL $0xD0, t110
+ 162: FPU_WQ 0x0:0x1D, (t110)
+ 163: INCEIPL $4
+
+ 0x25482B24: 93C3004C stw r30,76(r3)
+ 164: GETL R30, t112
+ 165: GETL R3, t114
+ 166: ADDL $0x4C, t114
+ 167: STL t112, (t114)
+ 168: INCEIPL $4
+
+ 0x25482B28: DBC300D8 stfd f30,216(r3)
+ 169: GETL R3, t116
+ 170: ADDL $0xD8, t116
+ 171: FPU_WQ 0x0:0x1E, (t116)
+ 172: INCEIPL $4
+
+ 0x25482B2C: 93E30050 stw r31,80(r3)
+ 173: GETL R31, t118
+ 174: GETL R3, t120
+ 175: ADDL $0x50, t120
+ 176: STL t118, (t120)
+ 177: INCEIPL $4
+
+ 0x25482B30: DBE300E0 stfd f31,224(r3)
+ 178: GETL R3, t122
+ 179: ADDL $0xE0, t122
+ 180: FPU_WQ 0x0:0x1F, (t122)
+ 181: INCEIPL $4
+
+ 0x25482B34: 7CC802A6 mflr r6
+ 182: GETL LR, t124
+ 183: PUTL t124, R6
+ 184: INCEIPL $4
+
+ 0x25482B38: 480144C9 bl 0x25497000
+ 185: MOVL $0x25482B3C, t126
+ 186: PUTL t126, LR
+ 187: JMPo-c $0x25497000 ($4)
+
+
+. 0 25482A90 172
+. 90 23 00 00 7C 08 02 A6 91 C3 00 0C D9 C3 00 58 90 03 00 08 91 E3 00 10 D9 E3 00 60 7C 00 00 26 92 03 00 14 DA 03 00 68 90 03 00 54 92 23 00 18 DA 23 00 70 92 43 00 1C DA 43 00 78 92 63 00 20 DA 63 00 80 92 83 00 24 DA 83 00 88 92 A3 00 28 DA A3 00 90 92 C3 00 2C DA C3 00 98 92 E3 00 30 DA E3 00 A0 93 03 00 34 DB 03 00 A8 93 23 00 38 DB 23 00 B0 93 43 00 3C DB 43 00 B8 93 63 00 40 DB 63 00 C0 93 83 00 44 DB 83 00 C8 93 A3 00 48 DB A3 00 D0 93 C3 00 4C DB C3 00 D8 93 E3 00 50 DB E3 00 E0 7C C8 02 A6 48 01 44 C9
+
+==== BB 641 (0x25482B3C) approx BBs exec'd 0 ====
+
+ 0x25482B3C: 7CA802A6 mflr r5
+ 0: GETL LR, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x25482B40: 80A504E4 lwz r5,1252(r5)
+ 3: GETL R5, t2
+ 4: ADDL $0x4E4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25482B44: 7CC803A6 mtlr r6
+ 8: GETL R6, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0x25482B48: 80A5003C lwz r5,60(r5)
+ 11: GETL R5, t8
+ 12: ADDL $0x3C, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0x25482B4C: 74A51000 andis. r5,r5,0x1000
+ 16: GETL R5, t12
+ 17: ANDL $0x10000000, t12
+ 18: PUTL t12, R5
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x0, CR
+ 21: INCEIPL $4
+
+ 0x25482B50: 41820158 bc 12,2,0x25482CA8
+ 22: Js02o $0x25482CA8
+
+
+. 0 25482B3C 24
+. 7C A8 02 A6 80 A5 04 E4 7C C8 03 A6 80 A5 00 3C 74 A5 10 00 41 82 01 58
+
+==== BB 642 (0x25482CA8) approx BBs exec'd 0 ====
+
+ 0x25482CA8: 4BFFD2F0 b 0x2547FF98
+ 0: JMPo $0x2547FF98 ($4)
+
+
+. 0 25482CA8 4
+. 4B FF D2 F0
+
+==== BB 643 __sigjmp_save(0x2547FF98) approx BBs exec'd 0 ====
+
+ 0x2547FF98: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547FF9C: 38000000 li r0,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547FFA0: 900301C0 stw r0,448(r3)
+ 9: GETL R0, t6
+ 10: GETL R3, t8
+ 11: ADDL $0x1C0, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547FFA4: 38210010 addi r1,r1,16
+ 14: GETL R1, t10
+ 15: ADDL $0x10, t10
+ 16: PUTL t10, R1
+ 17: INCEIPL $4
+
+ 0x2547FFA8: 38600000 li r3,0
+ 18: MOVL $0x0, t12
+ 19: PUTL t12, R3
+ 20: INCEIPL $4
+
+ 0x2547FFAC: 4E800020 blr
+ 21: GETL LR, t14
+ 22: JMPo-r t14 ($4)
+
+
+. 0 2547FF98 24
+. 94 21 FF F0 38 00 00 00 90 03 01 C0 38 21 00 10 38 60 00 00 4E 80 00 20
+
+==== BB 644 (0x2547B5F8) approx BBs exec'd 0 ====
+
+ 0x2547B5F8: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547B5FC: 8061027C lwz r3,636(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x27C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547B600: 7FEAFB78 or r10,r31,r31
+ 10: GETL R31, t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x2547B604: 2F9FFFFF cmpi cr7,r31,-1
+ 13: GETL R31, t10
+ 14: MOVL $0xFFFFFFFF, t14
+ 15: CMPL t10, t14, t12 (-rSo)
+ 16: ICRFL t12, $0x7, CR
+ 17: INCEIPL $4
+
+ 0x2547B608: 40820054 bc 4,2,0x2547B65C
+ 18: Jc02o $0x2547B65C
+
+
+. 0 2547B5F8 20
+. 7C 7F 1B 79 80 61 02 7C 7F EA FB 78 2F 9F FF FF 40 82 00 54
+
+==== BB 645 (0x2547B60C) approx BBs exec'd 0 ====
+
+ 0x2547B60C: 81210280 lwz r9,640(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x280, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547B610: 38010010 addi r0,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547B614: 81810278 lwz r12,632(r1)
+ 9: GETL R1, t6
+ 10: ADDL $0x278, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0x2547B618: 90090000 stw r0,0(r9)
+ 14: GETL R0, t10
+ 15: GETL R9, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547B61C: 7D8903A6 mtctr r12
+ 18: GETL R12, t14
+ 19: PUTL t14, CTR
+ 20: INCEIPL $4
+
+ 0x2547B620: 4E800421 bctrl
+ 21: MOVL $0x2547B624, t16
+ 22: PUTL t16, LR
+ 23: GETL CTR, t18
+ 24: JMPo-c t18 ($4)
+
+
+. 0 2547B60C 24
+. 81 21 02 80 38 01 00 10 81 81 02 78 90 09 00 00 7D 89 03 A6 4E 80 04 21
+
+==== BB 646 openaux(0x2547A0BC) approx BBs exec'd 0 ====
+
+ 0x2547A0BC: 7C8802A6 mflr r4
+ 0: GETL LR, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547A0C0: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547A0C4: 93E10008 stw r31,8(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547A0C8: 7C7F1B78 or r31,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0x2547A0CC: 38A00000 li r5,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R5
+ 19: INCEIPL $4
+
+ 0x2547A0D0: 90810014 stw r4,20(r1)
+ 20: GETL R4, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x2547A0D4: 80630000 lwz r3,0(r3)
+ 25: GETL R3, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R3
+ 28: INCEIPL $4
+
+ 0x2547A0D8: 809F0010 lwz r4,16(r31)
+ 29: GETL R31, t22
+ 30: ADDL $0x10, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R4
+ 33: INCEIPL $4
+
+ 0x2547A0DC: 80030180 lwz r0,384(r3)
+ 34: GETL R3, t26
+ 35: ADDL $0x180, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R0
+ 38: INCEIPL $4
+
+ 0x2547A0E0: 7409C000 andis. r9,r0,0xC000
+ 39: GETL R0, t30
+ 40: ANDL $0xC0000000, t30
+ 41: PUTL t30, R9
+ 42: CMP0L t30, t32 (-rSo)
+ 43: ICRFL t32, $0x0, CR
+ 44: INCEIPL $4
+
+ 0x2547A0E4: 540617BE rlwinm r6,r0,2,30,31
+ 45: GETL R0, t34
+ 46: SHRL $0x1E, t34
+ 47: PUTL t34, R6
+ 48: INCEIPL $4
+
+ 0x2547A0E8: 40820008 bc 4,2,0x2547A0F0
+ 49: Jc02o $0x2547A0F0
+
+
+. 0 2547A0BC 48
+. 7C 88 02 A6 94 21 FF F0 93 E1 00 08 7C 7F 1B 78 38 A0 00 00 90 81 00 14 80 63 00 00 80 9F 00 10 80 03 01 80 74 09 C0 00 54 06 17 BE 40 82 00 08
+
+==== BB 647 (0x2547A0EC) approx BBs exec'd 0 ====
+
+ 0x2547A0EC: 38C00001 li r6,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x2547A0F0: 80FF0004 lwz r7,4(r31)
+ 3: GETL R31, t2
+ 4: ADDL $0x4, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x2547A0F4: 811F0008 lwz r8,8(r31)
+ 8: GETL R31, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R8
+ 12: INCEIPL $4
+
+ 0x2547A0F8: 81230018 lwz r9,24(r3)
+ 13: GETL R3, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x2547A0FC: 4BFFCBED bl 0x25476CE8
+ 18: MOVL $0x2547A100, t14
+ 19: PUTL t14, LR
+ 20: JMPo-c $0x25476CE8 ($4)
+
+
+. 0 2547A0EC 20
+. 38 C0 00 01 80 FF 00 04 81 1F 00 08 81 23 00 18 4B FF CB ED
+
+==== BB 648 (0x25482FA8) approx BBs exec'd 0 ====
+
+ 0x25482FA8: 8CA30001 lbzu r5,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25482FAC: 8CC40001 lbzu r6,1(r4)
+ 6: GETL R4, t4
+ 7: ADDL $0x1, t4
+ 8: PUTL t4, R4
+ 9: LDB (t4), t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0x25482FB0: 2C850000 cmpi cr1,r5,0
+ 12: GETL R5, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x1, CR
+ 15: INCEIPL $4
+
+ 0x25482FB4: 7C053000 cmp cr0,r5,r6
+ 16: GETL R5, t12
+ 17: GETL R6, t14
+ 18: CMPL t12, t14, t16 (-rSo)
+ 19: ICRFL t16, $0x0, CR
+ 20: INCEIPL $4
+
+ 0x25482FB8: 4086FFD4 bc 4,6,0x25482F8C
+ 21: Jc06o $0x25482F8C
+
+
+. 0 25482FA8 20
+. 8C A3 00 01 8C C4 00 01 2C 85 00 00 7C 05 30 00 40 86 FF D4
+
+==== BB 649 (0x25482F8C) approx BBs exec'd 0 ====
+
+ 0x25482F8C: 8CA30001 lbzu r5,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R3
+ 3: LDB (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25482F90: 40820034 bc 4,2,0x25482FC4
+ 6: Jc02o $0x25482FC4
+
+
+. 0 25482F8C 8
+. 8C A3 00 01 40 82 00 34
+
+==== BB 650 (0x25482FC4) approx BBs exec'd 0 ====
+
+ 0x25482FC4: 88A3FFFF lbz r5,-1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25482FC8: 7C662850 subf r3,r6,r5
+ 5: GETL R6, t4
+ 6: GETL R5, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25482FCC: 4E800020 blr
+ 10: GETL LR, t8
+ 11: JMPo-r t8 ($4)
+
+
+. 0 25482FC4 12
+. 88 A3 FF FF 7C 66 28 50 4E 80 00 20
+
+==== BB 651 (0x2547706C) approx BBs exec'd 0 ====
+
+ 0x2547706C: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25477070: 4800BF61 bl 0x25482FD0
+ 3: MOVL $0x25477074, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25482FD0 ($4)
+
+
+. 0 2547706C 8
+. 7F E3 FB 78 48 00 BF 61
+
+==== BB 652 (0x25477074) approx BBs exec'd 0 ====
+
+ 0x25477074: 83540000 lwz r26,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R26
+ 3: INCEIPL $4
+
+ 0x25477078: 3AC30001 addi r22,r3,1
+ 4: GETL R3, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R22
+ 7: INCEIPL $4
+
+ 0x2547707C: 73490001 andi. r9,r26,0x1
+ 8: GETL R26, t6
+ 9: ANDL $0x1, t6
+ 10: PUTL t6, R9
+ 11: CMP0L t6, t8 (-rSo)
+ 12: ICRFL t8, $0x0, CR
+ 13: INCEIPL $4
+
+ 0x25477080: 408203C4 bc 4,2,0x25477444
+ 14: Jc02o $0x25477444
+
+
+. 0 25477074 16
+. 83 54 00 00 3A C3 00 01 73 49 00 01 40 82 03 C4
+
+==== BB 653 (0x25477084) approx BBs exec'd 0 ====
+
+ 0x25477084: 3B40FFFF li r26,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R26
+ 2: INCEIPL $4
+
+ 0x25477088: 418E0020 bc 12,14,0x254770A8
+ 3: Js14o $0x254770A8
+
+
+. 0 25477084 8
+. 3B 40 FF FF 41 8E 00 20
+
+==== BB 654 (0x2547708C) approx BBs exec'd 0 ====
+
+ 0x2547708C: 839B0094 lwz r28,148(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x94, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x25477090: 7F6CFE70 srawi r12,r27,31
+ 5: GETL R27, t4
+ 6: SARL $0x1F, t4 (-wCa)
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x25477094: 7D9DDA78 xor r29,r12,r27
+ 9: GETL R12, t6
+ 10: GETL R27, t8
+ 11: XORL t6, t8
+ 12: PUTL t8, R29
+ 13: INCEIPL $4
+
+ 0x25477098: 2E1AFFFF cmpi cr4,r26,-1
+ 14: GETL R26, t10
+ 15: MOVL $0xFFFFFFFF, t14
+ 16: CMPL t10, t14, t12 (-rSo)
+ 17: ICRFL t12, $0x4, CR
+ 18: INCEIPL $4
+
+ 0x2547709C: 2F9C0000 cmpi cr7,r28,0
+ 19: GETL R28, t16
+ 20: CMP0L t16, t18 (-rSo)
+ 21: ICRFL t18, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x254770A0: 7DCCE850 subf r14,r12,r29
+ 23: GETL R12, t20
+ 24: GETL R29, t22
+ 25: SUBL t20, t22
+ 26: PUTL t22, R14
+ 27: INCEIPL $4
+
+ 0x254770A4: 409E016C bc 4,30,0x25477210
+ 28: Jc30o $0x25477210
+
+
+. 0 2547708C 28
+. 83 9B 00 94 7F 6C FE 70 7D 9D DA 78 2E 1A FF FF 2F 9C 00 00 7D CC E8 50 40 9E 01 6C
+
+==== BB 655 (0x254770A8) approx BBs exec'd 0 ====
+
+ 0x254770A8: 2C9B0000 cmpi cr1,r27,0
+ 0: GETL R27, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x254770AC: 7F65FE70 srawi r5,r27,31
+ 4: GETL R27, t4
+ 5: SARL $0x1F, t4 (-wCa)
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x254770B0: 7CA0DA78 xor r0,r5,r27
+ 8: GETL R5, t6
+ 9: GETL R27, t8
+ 10: XORL t6, t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x254770B4: 7F7DDB78 or r29,r27,r27
+ 13: GETL R27, t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0x254770B8: 7DC50050 subf r14,r5,r0
+ 16: GETL R5, t12
+ 17: GETL R0, t14
+ 18: SUBL t12, t14
+ 19: PUTL t14, R14
+ 20: INCEIPL $4
+
+ 0x254770BC: 41860370 bc 12,6,0x2547742C
+ 21: Js06o $0x2547742C
+
+
+. 0 254770A8 24
+. 2C 9B 00 00 7F 65 FE 70 7C A0 DA 78 7F 7D DB 78 7D C5 00 50 41 86 03 70
+
+==== BB 656 (0x254770C0) approx BBs exec'd 0 ====
+
+ 0x254770C0: 825E019C lwz r18,412(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x19C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x254770C4: 39E0FFFF li r15,-1
+ 5: MOVL $0xFFFFFFFF, t4
+ 6: PUTL t4, R15
+ 7: INCEIPL $4
+
+ 0x254770C8: 48000024 b 0x254770EC
+ 8: JMPo $0x254770EC ($4)
+
+
+. 0 254770C0 12
+. 82 5E 01 9C 39 E0 FF FF 48 00 00 24
+
+==== BB 657 (0x254770EC) approx BBs exec'd 0 ====
+
+ 0x254770EC: 807D018C lwz r3,396(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x18C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254770F0: 3B9D018C addi r28,r29,396
+ 5: GETL R29, t4
+ 6: ADDL $0x18C, t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x254770F4: 38000000 li r0,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0x254770F8: 2E03FFFF cmpi cr4,r3,-1
+ 12: GETL R3, t8
+ 13: MOVL $0xFFFFFFFF, t12
+ 14: CMPL t8, t12, t10 (-rSo)
+ 15: ICRFL t10, $0x4, CR
+ 16: INCEIPL $4
+
+ 0x254770FC: 2F030000 cmpi cr6,r3,0
+ 17: GETL R3, t14
+ 18: CMP0L t14, t16 (-rSo)
+ 19: ICRFL t16, $0x6, CR
+ 20: INCEIPL $4
+
+ 0x25477100: 4192002C bc 12,18,0x2547712C
+ 21: Js18o $0x2547712C
+
+
+. 0 254770EC 24
+. 80 7D 01 8C 3B 9D 01 8C 38 00 00 00 2E 03 FF FF 2F 03 00 00 41 92 00 2C
+
+==== BB 658 (0x2547712C) approx BBs exec'd 0 ====
+
+ 0x2547712C: 2C000000 cmpi cr0,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25477130: 7F86E378 or r6,r28,r28
+ 4: GETL R28, t4
+ 5: PUTL t4, R6
+ 6: INCEIPL $4
+
+ 0x25477134: 7FE3FB78 or r3,r31,r31
+ 7: GETL R31, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25477138: 7EC4B378 or r4,r22,r22
+ 10: GETL R22, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x2547713C: 7EE5BB78 or r5,r23,r23
+ 13: GETL R23, t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0x25477140: 38E10228 addi r7,r1,552
+ 16: GETL R1, t12
+ 17: ADDL $0x228, t12
+ 18: PUTL t12, R7
+ 19: INCEIPL $4
+
+ 0x25477144: 39010018 addi r8,r1,24
+ 20: GETL R1, t14
+ 21: ADDL $0x18, t14
+ 22: PUTL t14, R8
+ 23: INCEIPL $4
+
+ 0x25477148: 4182FF84 bc 12,2,0x254770CC
+ 24: Js02o $0x254770CC
+
+
+. 0 2547712C 32
+. 2C 00 00 00 7F 86 E3 78 7F E3 FB 78 7E C4 B3 78 7E E5 BB 78 38 E1 02 28 39 01 00 18 41 82 FF 84
+
+==== BB 659 (0x254770CC) approx BBs exec'd 0 ====
+
+ 0x254770CC: 2E1AFFFF cmpi cr4,r26,-1
+ 0: GETL R26, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x254770D0: 83BD0168 lwz r29,360(r29)
+ 5: GETL R29, t6
+ 6: ADDL $0x168, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R29
+ 9: INCEIPL $4
+
+ 0x254770D4: 313DFFFF addic r9,r29,-1
+ 10: GETL R29, t10
+ 11: ADCL $0xFFFFFFFF, t10 (-wCa)
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0x254770D8: 7CC9E910 subfe r6,r9,r29
+ 14: GETL R9, t12
+ 15: GETL R29, t14
+ 16: SBBL t12, t14 (-rCa-wCa)
+ 17: PUTL t14, R6
+ 18: INCEIPL $4
+
+ 0x254770DC: 7D200026 mfcr r9
+ 19: GETL CR, t16
+ 20: PUTL t16, R9
+ 21: INCEIPL $4
+
+ 0x254770E0: 55299FFE rlwinm r9,r9,19,31,31
+ 22: GETL R9, t18
+ 23: ROLL $0x13, t18
+ 24: ANDL $0x1, t18
+ 25: PUTL t18, R9
+ 26: INCEIPL $4
+
+ 0x254770E4: 7D2B3039 and. r11,r9,r6
+ 27: GETL R9, t20
+ 28: GETL R6, t22
+ 29: ANDL t20, t22
+ 30: PUTL t22, R11
+ 31: CMP0L t22, t24 (-rSo)
+ 32: ICRFL t24, $0x0, CR
+ 33: INCEIPL $4
+
+ 0x254770E8: 418200B0 bc 12,2,0x25477198
+ 34: Js02o $0x25477198
+
+
+. 0 254770CC 32
+. 2E 1A FF FF 83 BD 01 68 31 3D FF FF 7C C9 E9 10 7D 20 00 26 55 29 9F FE 7D 2B 30 39 41 82 00 B0
+
+==== BB 660 (0x25477198) approx BBs exec'd 0 ====
+
+ 0x25477198: 409200A8 bc 4,18,0x25477240
+ 0: Jc18o $0x25477240
+
+
+. 0 25477198 4
+. 40 92 00 A8
+
+==== BB 661 (0x2547719C) approx BBs exec'd 0 ====
+
+ 0x2547719C: 80B50000 lwz r5,0(r21)
+ 0: GETL R21, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x254771A0: 2F850000 cmpi cr7,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0x254771A4: 419E0068 bc 12,30,0x2547720C
+ 8: Js30o $0x2547720C
+
+
+. 0 2547719C 12
+. 80 B5 00 00 2F 85 00 00 41 9E 00 68
+
+==== BB 662 (0x254771A8) approx BBs exec'd 0 ====
+
+ 0x254771A8: 83A50180 lwz r29,384(r5)
+ 0: GETL R5, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254771AC: 7CAADA78 xor r10,r5,r27
+ 5: GETL R5, t4
+ 6: GETL R27, t6
+ 7: XORL t4, t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x254771B0: 300AFFFF addic r0,r10,-1
+ 10: GETL R10, t8
+ 11: ADCL $0xFFFFFFFF, t8 (-wCa)
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x254771B4: 7D005110 subfe r8,r0,r10
+ 14: GETL R0, t10
+ 15: GETL R10, t12
+ 16: SBBL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R8
+ 18: INCEIPL $4
+
+ 0x254771B8: 57BC0002 rlwinm r28,r29,0,0,1
+ 19: GETL R29, t14
+ 20: ANDL $0xC0000000, t14
+ 21: PUTL t14, R28
+ 22: INCEIPL $4
+
+ 0x254771BC: 6F928000 xoris r18,r28,0x8000
+ 23: GETL R28, t16
+ 24: XORL $0x80000000, t16
+ 25: PUTL t16, R18
+ 26: INCEIPL $4
+
+ 0x254771C0: 3132FFFF addic r9,r18,-1
+ 27: GETL R18, t18
+ 28: ADCL $0xFFFFFFFF, t18 (-wCa)
+ 29: PUTL t18, R9
+ 30: INCEIPL $4
+
+ 0x254771C4: 7DE99110 subfe r15,r9,r18
+ 31: GETL R9, t20
+ 32: GETL R18, t22
+ 33: SBBL t20, t22 (-rCa-wCa)
+ 34: PUTL t22, R15
+ 35: INCEIPL $4
+
+ 0x254771C8: 7DE04039 and. r0,r15,r8
+ 36: GETL R15, t24
+ 37: GETL R8, t26
+ 38: ANDL t24, t26
+ 39: PUTL t26, R0
+ 40: CMP0L t26, t28 (-rSo)
+ 41: ICRFL t28, $0x0, CR
+ 42: INCEIPL $4
+
+ 0x254771CC: 41820040 bc 12,2,0x2547720C
+ 43: Js02o $0x2547720C
+
+
+. 0 254771A8 40
+. 83 A5 01 80 7C AA DA 78 30 0A FF FF 7D 00 51 10 57 BC 00 02 6F 92 80 00 31 32 FF FF 7D E9 91 10 7D E0 40 39 41 82 00 40
+
+==== BB 663 (0x2547720C) approx BBs exec'd 0 ====
+
+ 0x2547720C: 40920034 bc 4,18,0x25477240
+ 0: Jc18o $0x25477240
+
+
+. 0 2547720C 4
+. 40 92 00 34
+
+==== BB 664 (0x25477210) approx BBs exec'd 0 ====
+
+ 0x25477210: 80DE0168 lwz r6,360(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x168, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x25477214: 80A60000 lwz r5,0(r6)
+ 5: GETL R6, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R5
+ 8: INCEIPL $4
+
+ 0x25477218: 2C85FFFF cmpi cr1,r5,-1
+ 9: GETL R5, t8
+ 10: MOVL $0xFFFFFFFF, t12
+ 11: CMPL t8, t12, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x2547721C: 41860024 bc 12,6,0x25477240
+ 14: Js06o $0x25477240
+
+
+. 0 25477210 16
+. 80 DE 01 68 80 A6 00 00 2C 85 FF FF 41 86 00 24
+
+==== BB 665 (0x25477220) approx BBs exec'd 0 ====
+
+ 0x25477220: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25477224: 7EC4B378 or r4,r22,r22
+ 3: GETL R22, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25477228: 7EE5BB78 or r5,r23,r23
+ 6: GETL R23, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547722C: 38E10228 addi r7,r1,552
+ 9: GETL R1, t6
+ 10: ADDL $0x228, t6
+ 11: PUTL t6, R7
+ 12: INCEIPL $4
+
+ 0x25477230: 39010018 addi r8,r1,24
+ 13: GETL R1, t8
+ 14: ADDL $0x18, t8
+ 15: PUTL t8, R8
+ 16: INCEIPL $4
+
+ 0x25477234: 4BFFF561 bl 0x25476794
+ 17: MOVL $0x25477238, t10
+ 18: PUTL t10, LR
+ 19: JMPo-c $0x25476794 ($4)
+
+
+. 0 25477220 24
+. 7F E3 FB 78 7E C4 B3 78 7E E5 BB 78 38 E1 02 28 39 01 00 18 4B FF F5 61
+
+==== BB 666 open_path(0x25476794) approx BBs exec'd 0 ====
+
+ 0x25476794: 9421FF00 stwu r1,-256(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF00, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25476798: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547679C: 48020865 bl 0x25497000
+ 9: MOVL $0x254767A0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25476794 12
+. 94 21 FF 00 7C 08 02 A6 48 02 08 65
+
+==== BB 667 (0x254767A0) approx BBs exec'd 0 ====
+
+ 0x254767A0: 93C100F8 stw r30,248(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xF8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254767A4: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x254767A8: 924100C8 stw r18,200(r1)
+ 8: GETL R18, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC8, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x254767AC: 926100CC stw r19,204(r1)
+ 13: GETL R19, t10
+ 14: GETL R1, t12
+ 15: ADDL $0xCC, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254767B0: 7D200026 mfcr r9
+ 18: GETL CR, t14
+ 19: PUTL t14, R9
+ 20: INCEIPL $4
+
+ 0x254767B4: 90010104 stw r0,260(r1)
+ 21: GETL R0, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x104, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x254767B8: 38000000 li r0,0
+ 26: MOVL $0x0, t20
+ 27: PUTL t20, R0
+ 28: INCEIPL $4
+
+ 0x254767BC: 825E015C lwz r18,348(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x15C, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R18
+ 33: INCEIPL $4
+
+ 0x254767C0: 827E0158 lwz r19,344(r30)
+ 34: GETL R30, t26
+ 35: ADDL $0x158, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R19
+ 38: INCEIPL $4
+
+ 0x254767C4: 920100C0 stw r16,192(r1)
+ 39: GETL R16, t30
+ 40: GETL R1, t32
+ 41: ADDL $0xC0, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0x254767C8: 922100C4 stw r17,196(r1)
+ 44: GETL R17, t34
+ 45: GETL R1, t36
+ 46: ADDL $0xC4, t36
+ 47: STL t34, (t36)
+ 48: INCEIPL $4
+
+ 0x254767CC: 82130000 lwz r16,0(r19)
+ 49: GETL R19, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R16
+ 52: INCEIPL $4
+
+ 0x254767D0: 82320000 lwz r17,0(r18)
+ 53: GETL R18, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R17
+ 56: INCEIPL $4
+
+ 0x254767D4: 7D124378 or r18,r8,r8
+ 57: GETL R8, t46
+ 58: PUTL t46, R18
+ 59: INCEIPL $4
+
+ 0x254767D8: 91E100BC stw r15,188(r1)
+ 60: GETL R15, t48
+ 61: GETL R1, t50
+ 62: ADDL $0xBC, t50
+ 63: STL t48, (t50)
+ 64: INCEIPL $4
+
+ 0x254767DC: 7DF08A14 add r15,r16,r17
+ 65: GETL R16, t52
+ 66: GETL R17, t54
+ 67: ADDL t52, t54
+ 68: PUTL t54, R15
+ 69: INCEIPL $4
+
+ 0x254767E0: 91C100B8 stw r14,184(r1)
+ 70: GETL R14, t56
+ 71: GETL R1, t58
+ 72: ADDL $0xB8, t58
+ 73: STL t56, (t58)
+ 74: INCEIPL $4
+
+ 0x254767E4: 93E100FC stw r31,252(r1)
+ 75: GETL R31, t60
+ 76: GETL R1, t62
+ 77: ADDL $0xFC, t62
+ 78: STL t60, (t62)
+ 79: INCEIPL $4
+
+ 0x254767E8: 7DCF2214 add r14,r15,r4
+ 80: GETL R15, t64
+ 81: GETL R4, t66
+ 82: ADDL t64, t66
+ 83: PUTL t66, R14
+ 84: INCEIPL $4
+
+ 0x254767EC: 7C3F0B78 or r31,r1,r1
+ 85: GETL R1, t68
+ 86: PUTL t68, R31
+ 87: INCEIPL $4
+
+ 0x254767F0: 398E001E addi r12,r14,30
+ 88: GETL R14, t70
+ 89: ADDL $0x1E, t70
+ 90: PUTL t70, R12
+ 91: INCEIPL $4
+
+ 0x254767F4: 90DF0084 stw r6,132(r31)
+ 92: GETL R6, t72
+ 93: GETL R31, t74
+ 94: ADDL $0x84, t74
+ 95: STL t72, (t74)
+ 96: INCEIPL $4
+
+ 0x254767F8: 558B0036 rlwinm r11,r12,0,0,27
+ 97: GETL R12, t76
+ 98: ANDL $0xFFFFFFF0, t76
+ 99: PUTL t76, R11
+ 100: INCEIPL $4
+
+ 0x254767FC: 81410000 lwz r10,0(r1)
+ 101: GETL R1, t78
+ 102: LDL (t78), t80
+ 103: PUTL t80, R10
+ 104: INCEIPL $4
+
+ 0x25476800: 7C711B78 or r17,r3,r3
+ 105: GETL R3, t82
+ 106: PUTL t82, R17
+ 107: INCEIPL $4
+
+ 0x25476804: 92A100D4 stw r21,212(r1)
+ 108: GETL R21, t84
+ 109: GETL R1, t86
+ 110: ADDL $0xD4, t86
+ 111: STL t84, (t86)
+ 112: INCEIPL $4
+
+ 0x25476808: 39E00000 li r15,0
+ 113: MOVL $0x0, t88
+ 114: PUTL t88, R15
+ 115: INCEIPL $4
+
+ 0x2547680C: 912100B4 stw r9,180(r1)
+ 116: GETL R9, t90
+ 117: GETL R1, t92
+ 118: ADDL $0xB4, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0x25476810: 7D2B00D0 neg r9,r11
+ 121: GETL R11, t94
+ 122: NEGL t94
+ 123: PUTL t94, R9
+ 124: INCEIPL $4
+
+ 0x25476814: 82A60000 lwz r21,0(r6)
+ 125: GETL R6, t96
+ 126: LDL (t96), t98
+ 127: PUTL t98, R21
+ 128: INCEIPL $4
+
+ 0x25476818: 92C100D8 stw r22,216(r1)
+ 129: GETL R22, t100
+ 130: GETL R1, t102
+ 131: ADDL $0xD8, t102
+ 132: STL t100, (t102)
+ 133: INCEIPL $4
+
+ 0x2547681C: 7C962378 or r22,r4,r4
+ 134: GETL R4, t104
+ 135: PUTL t104, R22
+ 136: INCEIPL $4
+
+ 0x25476820: 934100E8 stw r26,232(r1)
+ 137: GETL R26, t106
+ 138: GETL R1, t108
+ 139: ADDL $0xE8, t108
+ 140: STL t106, (t108)
+ 141: INCEIPL $4
+
+ 0x25476824: 3B40FFFF li r26,-1
+ 142: MOVL $0xFFFFFFFF, t110
+ 143: PUTL t110, R26
+ 144: INCEIPL $4
+
+ 0x25476828: 936100EC stw r27,236(r1)
+ 145: GETL R27, t112
+ 146: GETL R1, t114
+ 147: ADDL $0xEC, t114
+ 148: STL t112, (t114)
+ 149: INCEIPL $4
+
+ 0x2547682C: 2E1AFFFF cmpi cr4,r26,-1
+ 150: GETL R26, t116
+ 151: MOVL $0xFFFFFFFF, t120
+ 152: CMPL t116, t120, t118 (-rSo)
+ 153: ICRFL t118, $0x4, CR
+ 154: INCEIPL $4
+
+ 0x25476830: 93A100F4 stw r29,244(r1)
+ 155: GETL R29, t122
+ 156: GETL R1, t124
+ 157: ADDL $0xF4, t124
+ 158: STL t122, (t124)
+ 159: INCEIPL $4
+
+ 0x25476834: 928100D0 stw r20,208(r1)
+ 160: GETL R20, t126
+ 161: GETL R1, t128
+ 162: ADDL $0xD0, t128
+ 163: STL t126, (t128)
+ 164: INCEIPL $4
+
+ 0x25476838: 92E100DC stw r23,220(r1)
+ 165: GETL R23, t130
+ 166: GETL R1, t132
+ 167: ADDL $0xDC, t132
+ 168: STL t130, (t132)
+ 169: INCEIPL $4
+
+ 0x2547683C: 930100E0 stw r24,224(r1)
+ 170: GETL R24, t134
+ 171: GETL R1, t136
+ 172: ADDL $0xE0, t136
+ 173: STL t134, (t136)
+ 174: INCEIPL $4
+
+ 0x25476840: 932100E4 stw r25,228(r1)
+ 175: GETL R25, t138
+ 176: GETL R1, t140
+ 177: ADDL $0xE4, t140
+ 178: STL t138, (t140)
+ 179: INCEIPL $4
+
+ 0x25476844: 938100F0 stw r28,240(r1)
+ 180: GETL R28, t142
+ 181: GETL R1, t144
+ 182: ADDL $0xF0, t144
+ 183: STL t142, (t144)
+ 184: INCEIPL $4
+
+ 0x25476848: 7D41496E stwux r10,r1,r9
+ 185: GETL R9, t146
+ 186: GETL R1, t148
+ 187: ADDL t148, t146
+ 188: PUTL t146, R1
+ 189: GETL R10, t150
+ 190: STL t150, (t146)
+ 191: INCEIPL $4
+
+ 0x2547684C: 38810017 addi r4,r1,23
+ 192: GETL R1, t152
+ 193: ADDL $0x17, t152
+ 194: PUTL t152, R4
+ 195: INCEIPL $4
+
+ 0x25476850: 83B50000 lwz r29,0(r21)
+ 196: GETL R21, t154
+ 197: LDL (t154), t156
+ 198: PUTL t156, R29
+ 199: INCEIPL $4
+
+ 0x25476854: 81DE04F4 lwz r14,1268(r30)
+ 200: GETL R30, t158
+ 201: ADDL $0x4F4, t158
+ 202: LDL (t158), t160
+ 203: PUTL t160, R14
+ 204: INCEIPL $4
+
+ 0x25476858: 549B0036 rlwinm r27,r4,0,0,27
+ 205: GETL R4, t162
+ 206: ANDL $0xFFFFFFF0, t162
+ 207: PUTL t162, R27
+ 208: INCEIPL $4
+
+ 0x2547685C: 90BF0080 stw r5,128(r31)
+ 209: GETL R5, t164
+ 210: GETL R31, t166
+ 211: ADDL $0x80, t166
+ 212: STL t164, (t166)
+ 213: INCEIPL $4
+
+ 0x25476860: 90FF0088 stw r7,136(r31)
+ 214: GETL R7, t168
+ 215: GETL R31, t170
+ 216: ADDL $0x88, t170
+ 217: STL t168, (t170)
+ 218: INCEIPL $4
+
+ 0x25476864: 901F008C stw r0,140(r31)
+ 219: GETL R0, t172
+ 220: GETL R31, t174
+ 221: ADDL $0x8C, t174
+ 222: STL t172, (t174)
+ 223: INCEIPL $4
+
+ 0x25476868: 806E0000 lwz r3,0(r14)
+ 224: GETL R14, t176
+ 225: LDL (t176), t178
+ 226: PUTL t178, R3
+ 227: INCEIPL $4
+
+ 0x2547686C: 3A600000 li r19,0
+ 228: MOVL $0x0, t180
+ 229: PUTL t180, R19
+ 230: INCEIPL $4
+
+ 0x25476870: 3AE00000 li r23,0
+ 231: MOVL $0x0, t182
+ 232: PUTL t182, R23
+ 233: INCEIPL $4
+
+ 0x25476874: 70690001 andi. r9,r3,0x1
+ 234: GETL R3, t184
+ 235: ANDL $0x1, t184
+ 236: PUTL t184, R9
+ 237: CMP0L t184, t186 (-rSo)
+ 238: ICRFL t186, $0x0, CR
+ 239: INCEIPL $4
+
+ 0x25476878: 4082025C bc 4,2,0x25476AD4
+ 240: Jc02o $0x25476AD4
+
+
+. 0 254767A0 220
+. 93 C1 00 F8 7F C8 02 A6 92 41 00 C8 92 61 00 CC 7D 20 00 26 90 01 01 04 38 00 00 00 82 5E 01 5C 82 7E 01 58 92 01 00 C0 92 21 00 C4 82 13 00 00 82 32 00 00 7D 12 43 78 91 E1 00 BC 7D F0 8A 14 91 C1 00 B8 93 E1 00 FC 7D CF 22 14 7C 3F 0B 78 39 8E 00 1E 90 DF 00 84 55 8B 00 36 81 41 00 00 7C 71 1B 78 92 A1 00 D4 39 E0 00 00 91 21 00 B4 7D 2B 00 D0 82 A6 00 00 92 C1 00 D8 7C 96 23 78 93 41 00 E8 3B 40 FF FF 93 61 00 EC 2E 1A FF FF 93 A1 00 F4 92 81 00 D0 92 E1 00 DC 93 01 00 E0 93 21 00 E4 93 81 00 F0 7D 41 49 6E 38 81 00 17 83 B5 00 00 81 DE 04 F4 54 9B 00 36 90 BF 00 80 90 FF 00 88 90 1F 00 8C 80 6E 00 00 3A 60 00 00 3A E0 00 00 70 69 00 01 40 82 02 5C
+
+==== BB 668 (0x2547687C) approx BBs exec'd 0 ====
+
+ 0x2547687C: 809D000C lwz r4,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25476880: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25476884: 80BD0010 lwz r5,16(r29)
+ 8: GETL R29, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0x25476888: 3B800000 li r28,0
+ 13: MOVL $0x0, t10
+ 14: PUTL t10, R28
+ 15: INCEIPL $4
+
+ 0x2547688C: 4800D195 bl 0x25483A20
+ 16: MOVL $0x25476890, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0x25483A20 ($4)
+
+
+. 0 2547687C 20
+. 80 9D 00 0C 7F 63 DB 78 80 BD 00 10 3B 80 00 00 48 00 D1 95
+
+==== BB 669 (0x25476890) approx BBs exec'd 0 ====
+
+ 0x25476890: 7C781B78 or r24,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R24
+ 2: INCEIPL $4
+
+ 0x25476894: 409201A0 bc 4,18,0x25476A34
+ 3: Jc18o $0x25476A34
+
+
+. 0 25476890 8
+. 7C 78 1B 78 40 92 01 A0
+
+==== BB 670 (0x25476898) approx BBs exec'd 0 ====
+
+ 0x25476898: 833E0154 lwz r25,340(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x154, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x2547689C: 81990000 lwz r12,0(r25)
+ 5: GETL R25, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R12
+ 8: INCEIPL $4
+
+ 0x254768A0: 7F9C6040 cmpl cr7,r28,r12
+ 9: GETL R28, t8
+ 10: GETL R12, t10
+ 11: CMPUL t8, t10, t12 (-rSo)
+ 12: ICRFL t12, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x254768A4: 409C014C bc 4,28,0x254769F0
+ 14: Jc28o $0x254769F0
+
+
+. 0 25476898 16
+. 83 3E 01 54 81 99 00 00 7F 9C 60 40 40 9C 01 4C
+
+==== BB 671 (0x254768A8) approx BBs exec'd 0 ====
+
+ 0x254768A8: 817E0228 lwz r11,552(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x228, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254768AC: 3A800002 li r20,2
+ 5: MOVL $0x2, t4
+ 6: PUTL t4, R20
+ 7: INCEIPL $4
+
+ 0x254768B0: 820B0000 lwz r16,0(r11)
+ 8: GETL R11, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R16
+ 11: INCEIPL $4
+
+ 0x254768B4: 4800001C b 0x254768D0
+ 12: JMPo $0x254768D0 ($4)
+
+
+. 0 254768A8 16
+. 81 7E 02 28 3A 80 00 02 82 0B 00 00 48 00 00 1C
+
+==== BB 672 (0x254768D0) approx BBs exec'd 0 ====
+
+ 0x254768D0: 80DD0014 lwz r6,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254768D4: 2C860001 cmpi cr1,r6,1
+ 5: GETL R6, t4
+ 6: MOVL $0x1, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x254768D8: 41A6FFE0 bc 13,6,0x254768B8
+ 10: Js06o $0x254768B8
+
+
+. 0 254768D0 12
+. 80 DD 00 14 2C 86 00 01 41 A6 FF E0
+
+==== BB 673 (0x254768DC) approx BBs exec'd 0 ====
+
+ 0x254768DC: 813E0160 lwz r9,352(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x160, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x254768E0: 578A1838 rlwinm r10,r28,3,0,28
+ 5: GETL R28, t4
+ 6: SHLL $0x3, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x254768E4: 7F03C378 or r3,r24,r24
+ 9: GETL R24, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x254768E8: 80A90000 lwz r5,0(r9)
+ 12: GETL R9, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0x254768EC: 7E6A2A14 add r19,r10,r5
+ 16: GETL R10, t12
+ 17: GETL R5, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R19
+ 20: INCEIPL $4
+
+ 0x254768F0: 7C8A282E lwzx r4,r10,r5
+ 21: GETL R5, t16
+ 22: GETL R10, t18
+ 23: ADDL t18, t16
+ 24: LDL (t16), t20
+ 25: PUTL t20, R4
+ 26: INCEIPL $4
+
+ 0x254768F4: 80B30004 lwz r5,4(r19)
+ 27: GETL R19, t22
+ 28: ADDL $0x4, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R5
+ 31: INCEIPL $4
+
+ 0x254768F8: 4800D129 bl 0x25483A20
+ 32: MOVL $0x254768FC, t26
+ 33: PUTL t26, LR
+ 34: JMPo-c $0x25483A20 ($4)
+
+
+. 0 254768DC 32
+. 81 3E 01 60 57 8A 18 38 7F 03 C3 78 80 A9 00 00 7E 6A 2A 14 7C 8A 28 2E 80 B3 00 04 48 00 D1 29
+
+==== BB 674 (0x254768FC) approx BBs exec'd 0 ====
+
+ 0x254768FC: 7E248B78 or r4,r17,r17
+ 0: GETL R17, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x25476900: 7EC5B378 or r5,r22,r22
+ 3: GETL R22, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25476904: 4800D11D bl 0x25483A20
+ 6: MOVL $0x25476908, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25483A20 ($4)
+
+
+. 0 254768FC 12
+. 7E 24 8B 78 7E C5 B3 78 48 00 D1 1D
+
+==== BB 675 (0x25476908) approx BBs exec'd 0 ====
+
+ 0x25476908: 834E0000 lwz r26,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R26
+ 3: INCEIPL $4
+
+ 0x2547690C: 7E7B1850 subf r19,r27,r3
+ 4: GETL R27, t4
+ 5: GETL R3, t6
+ 6: SUBL t4, t6
+ 7: PUTL t6, R19
+ 8: INCEIPL $4
+
+ 0x25476910: 73490001 andi. r9,r26,0x1
+ 9: GETL R26, t8
+ 10: ANDL $0x1, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25476914: 408201AC bc 4,2,0x25476AC0
+ 15: Jc02o $0x25476AC0
+
+
+. 0 25476908 16
+. 83 4E 00 00 7E 7B 18 50 73 49 00 01 40 82 01 AC
+
+==== BB 676 (0x25476918) approx BBs exec'd 0 ====
+
+ 0x25476918: 7F63DB78 or r3,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547691C: 7E449378 or r4,r18,r18
+ 3: GETL R18, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x25476920: 4BFFFB25 bl 0x25476444
+ 6: MOVL $0x25476924, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25476444 ($4)
+
+
+. 0 25476918 12
+. 7F 63 DB 78 7E 44 93 78 4B FF FB 25
+
+==== BB 677 (0x25481FEC) approx BBs exec'd 0 ====
+
+ 0x25481FEC: 4BFFF344 b 0x25481330
+ 0: JMPo $0x25481330 ($4)
+
+
+. 0 25481FEC 4
+. 4B FF F3 44
+
+==== BB 678 (0x25476924) approx BBs exec'd 0 ====
+
+ 0x25476924: 801D0014 lwz r0,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25476928: 7C7A1B78 or r26,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x2547692C: 2E03FFFF cmpi cr4,r3,-1
+ 8: GETL R3, t6
+ 9: MOVL $0xFFFFFFFF, t10
+ 10: CMPL t6, t10, t8 (-rSo)
+ 11: ICRFL t8, $0x4, CR
+ 12: INCEIPL $4
+
+ 0x25476930: 2F000000 cmpi cr6,r0,0
+ 13: GETL R0, t12
+ 14: CMP0L t12, t14 (-rSo)
+ 15: ICRFL t14, $0x6, CR
+ 16: INCEIPL $4
+
+ 0x25476934: 409A000C bc 4,26,0x25476940
+ 17: Jc26o $0x25476940
+
+
+. 0 25476924 20
+. 80 1D 00 14 7C 7A 1B 78 2E 03 FF FF 2F 00 00 00 40 9A 00 0C
+
+==== BB 679 (0x25476938) approx BBs exec'd 0 ====
+
+ 0x25476938: 41920078 bc 12,18,0x254769B0
+ 0: Js18o $0x254769B0
+
+
+. 0 25476938 4
+. 41 92 00 78
+
+==== BB 680 (0x254769B0) approx BBs exec'd 0 ====
+
+ 0x254769B0: 7C769850 subf r3,r22,r19
+ 0: GETL R22, t0
+ 1: GETL R19, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254769B4: 7F64DB78 or r4,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x254769B8: 7CFB1A14 add r7,r27,r3
+ 8: GETL R27, t6
+ 9: GETL R3, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0x254769BC: 38BF0010 addi r5,r31,16
+ 13: GETL R31, t10
+ 14: ADDL $0x10, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0x254769C0: 9807FFFF stb r0,-1(r7)
+ 17: GETL R0, t12
+ 18: GETL R7, t14
+ 19: ADDL $0xFFFFFFFF, t14
+ 20: STB t12, (t14)
+ 21: INCEIPL $4
+
+ 0x254769C4: 38600003 li r3,3
+ 22: MOVL $0x3, t16
+ 23: PUTL t16, R3
+ 24: INCEIPL $4
+
+ 0x254769C8: 4800B3A1 bl 0x25481D68
+ 25: MOVL $0x254769CC, t18
+ 26: PUTL t18, LR
+ 27: JMPo-c $0x25481D68 ($4)
+
+
+. 0 254769B0 28
+. 7C 76 98 50 7F 64 DB 78 7C FB 1A 14 38 BF 00 10 98 07 FF FF 38 60 00 03 48 00 B3 A1
+
+==== BB 681 __GI___xstat64(0x25481D68) approx BBs exec'd 0 ====
+
+ 0x25481D68: 9421FF80 stwu r1,-128(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF80, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25481D6C: 7CC802A6 mflr r6
+ 6: GETL LR, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x25481D70: 48015291 bl 0x25497000
+ 9: MOVL $0x25481D74, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25481D68 12
+. 94 21 FF 80 7C C8 02 A6 48 01 52 91
+
+==== BB 682 (0x25481D74) approx BBs exec'd 0 ====
+
+ 0x25481D74: 93C10078 stw r30,120(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x78, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25481D78: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25481D7C: 9361006C stw r27,108(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x6C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25481D80: 90C10084 stw r6,132(r1)
+ 13: GETL R6, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x84, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25481D84: 93210064 stw r25,100(r1)
+ 18: GETL R25, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x64, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25481D88: 7C791B78 or r25,r3,r3
+ 23: GETL R3, t18
+ 24: PUTL t18, R25
+ 25: INCEIPL $4
+
+ 0x25481D8C: 837E04EC lwz r27,1260(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4EC, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R27
+ 30: INCEIPL $4
+
+ 0x25481D90: 93810070 stw r28,112(r1)
+ 31: GETL R28, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x70, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x25481D94: 7CBC2B78 or r28,r5,r5
+ 36: GETL R5, t28
+ 37: PUTL t28, R28
+ 38: INCEIPL $4
+
+ 0x25481D98: 801B0000 lwz r0,0(r27)
+ 39: GETL R27, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R0
+ 42: INCEIPL $4
+
+ 0x25481D9C: 93E1007C stw r31,124(r1)
+ 43: GETL R31, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x7C, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x25481DA0: 7C9F2378 or r31,r4,r4
+ 48: GETL R4, t38
+ 49: PUTL t38, R31
+ 50: INCEIPL $4
+
+ 0x25481DA4: 2F800000 cmpi cr7,r0,0
+ 51: GETL R0, t40
+ 52: CMP0L t40, t42 (-rSo)
+ 53: ICRFL t42, $0x7, CR
+ 54: INCEIPL $4
+
+ 0x25481DA8: 93410068 stw r26,104(r1)
+ 55: GETL R26, t44
+ 56: GETL R1, t46
+ 57: ADDL $0x68, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0x25481DAC: 93A10074 stw r29,116(r1)
+ 60: GETL R29, t48
+ 61: GETL R1, t50
+ 62: ADDL $0x74, t50
+ 63: STL t48, (t50)
+ 64: INCEIPL $4
+
+ 0x25481DB0: 409E0048 bc 4,30,0x25481DF8
+ 65: Jc30o $0x25481DF8
+
+
+. 0 25481D74 64
+. 93 C1 00 78 7F C8 02 A6 93 61 00 6C 90 C1 00 84 93 21 00 64 7C 79 1B 78 83 7E 04 EC 93 81 00 70 7C BC 2B 78 80 1B 00 00 93 E1 00 7C 7C 9F 23 78 2F 80 00 00 93 41 00 68 93 A1 00 74 40 9E 00 48
+
+==== BB 683 (0x25481DB4) approx BBs exec'd 0 ====
+
+ 0x25481DB4: 83BE0514 lwz r29,1300(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x514, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25481DB8: 7C832378 or r3,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25481DBC: 380000C3 li r0,195
+ 8: MOVL $0xC3, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x25481DC0: 7CA42B78 or r4,r5,r5
+ 11: GETL R5, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x25481DC4: 835D0000 lwz r26,0(r29)
+ 14: GETL R29, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R26
+ 17: INCEIPL $4
+
+ 0x25481DC8: 44000002 sc
+ 18: JMPo-sys $0x25481DCC ($4)
+
+
+. 0 25481DB4 24
+. 83 BE 05 14 7C 83 23 78 38 00 00 C3 7C A4 2B 78 83 5D 00 00 44 00 00 02
+
+==== BB 684 (0x25481DCC) approx BBs exec'd 0 ====
+
+ 0x25481DCC: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25481DD0: 74091000 andis. r9,r0,0x1000
+ 3: GETL R0, t2
+ 4: ANDL $0x10000000, t2
+ 5: PUTL t2, R9
+ 6: CMP0L t2, t4 (-rSo)
+ 7: ICRFL t4, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25481DD4: 408200C4 bc 4,2,0x25481E98
+ 9: Jc02o $0x25481E98
+
+
+. 0 25481DCC 12
+. 7C 00 00 26 74 09 10 00 40 82 00 C4
+
+==== BB 685 (0x25481E98) approx BBs exec'd 0 ====
+
+ 0x25481E98: 907D0000 stw r3,0(r29)
+ 0: GETL R3, t0
+ 1: GETL R29, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25481E9C: 3860FFFF li r3,-1
+ 4: MOVL $0xFFFFFFFF, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x25481EA0: 4BFFFF38 b 0x25481DD8
+ 7: JMPo $0x25481DD8 ($4)
+
+
+. 0 25481E98 12
+. 90 7D 00 00 38 60 FF FF 4B FF FF 38
+
+==== BB 686 (0x25481DD8) approx BBs exec'd 0 ====
+
+ 0x25481DD8: 2C83FFFF cmpi cr1,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25481DDC: 40A60044 bc 5,6,0x25481E20
+ 5: Jc06o $0x25481E20
+
+
+. 0 25481DD8 8
+. 2C 83 FF FF 40 A6 00 44
+
+==== BB 687 (0x25481DE0) approx BBs exec'd 0 ====
+
+ 0x25481DE0: 809D0000 lwz r4,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25481DE4: 2F040026 cmpi cr6,r4,38
+ 4: GETL R4, t4
+ 5: MOVL $0x26, t8
+ 6: CMPL t4, t8, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25481DE8: 40BA0038 bc 5,26,0x25481E20
+ 9: Jc26o $0x25481E20
+
+
+. 0 25481DE0 12
+. 80 9D 00 00 2F 04 00 26 40 BA 00 38
+
+==== BB 688 (0x25481E20) approx BBs exec'd 0 ====
+
+ 0x25481E20: 80A10084 lwz r5,132(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25481E24: 83210064 lwz r25,100(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x64, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0x25481E28: 83410068 lwz r26,104(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x68, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R26
+ 14: INCEIPL $4
+
+ 0x25481E2C: 7CA803A6 mtlr r5
+ 15: GETL R5, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x25481E30: 8361006C lwz r27,108(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x6C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R27
+ 22: INCEIPL $4
+
+ 0x25481E34: 83810070 lwz r28,112(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x70, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R28
+ 27: INCEIPL $4
+
+ 0x25481E38: 83A10074 lwz r29,116(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x74, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R29
+ 32: INCEIPL $4
+
+ 0x25481E3C: 83C10078 lwz r30,120(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x78, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R30
+ 37: INCEIPL $4
+
+ 0x25481E40: 83E1007C lwz r31,124(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x7C, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R31
+ 42: INCEIPL $4
+
+ 0x25481E44: 38210080 addi r1,r1,128
+ 43: GETL R1, t34
+ 44: ADDL $0x80, t34
+ 45: PUTL t34, R1
+ 46: INCEIPL $4
+
+ 0x25481E48: 4E800020 blr
+ 47: GETL LR, t36
+ 48: JMPo-r t36 ($4)
+
+
+. 0 25481E20 44
+. 80 A1 00 84 83 21 00 64 83 41 00 68 7C A8 03 A6 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C 38 21 00 80 4E 80 00 20
+
+==== BB 689 (0x254769CC) approx BBs exec'd 0 ====
+
+ 0x254769CC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x254769D0: 409E0014 bc 4,30,0x254769E4
+ 4: Jc30o $0x254769E4
+
+
+. 0 254769CC 8
+. 2F 83 00 00 40 9E 00 14
+
+==== BB 690 (0x254769E4) approx BBs exec'd 0 ====
+
+ 0x254769E4: 38800001 li r4,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254769E8: 909D0014 stw r4,20(r29)
+ 3: GETL R4, t2
+ 4: GETL R29, t4
+ 5: ADDL $0x14, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x254769EC: 4BFFFF54 b 0x25476940
+ 8: JMPo $0x25476940 ($4)
+
+
+. 0 254769E4 12
+. 38 80 00 01 90 9D 00 14 4B FF FF 54
+
+==== BB 691 (0x25476940) approx BBs exec'd 0 ====
+
+ 0x25476940: 817D0014 lwz r11,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25476944: 696C0002 xori r12,r11,0x2
+ 5: GETL R11, t4
+ 6: XORL $0x2, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x25476948: 212C0000 subfic r9,r12,0
+ 9: GETL R12, t6
+ 10: MOVL $0x0, t8
+ 11: SBBL t6, t8 (-wCa)
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0x2547694C: 7D896114 adde r12,r9,r12
+ 14: GETL R9, t10
+ 15: GETL R12, t12
+ 16: ADCL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R12
+ 18: INCEIPL $4
+
+ 0x25476950: 7EF76378 or r23,r23,r12
+ 19: GETL R23, t14
+ 20: GETL R12, t16
+ 21: ORL t16, t14
+ 22: PUTL t14, R23
+ 23: INCEIPL $4
+
+ 0x25476954: 41B2FF64 bc 13,18,0x254768B8
+ 24: Js18o $0x254768B8
+
+
+. 0 25476940 24
+. 81 7D 00 14 69 6C 00 02 21 2C 00 00 7D 89 61 14 7E F7 63 78 41 B2 FF 64
+
+==== BB 692 (0x254768B8) approx BBs exec'd 0 ====
+
+ 0x254768B8: 3B9C0001 addi r28,r28,1
+ 0: GETL R28, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0x254768BC: 3BBD0004 addi r29,r29,4
+ 4: GETL R29, t2
+ 5: ADDL $0x4, t2
+ 6: PUTL t2, R29
+ 7: INCEIPL $4
+
+ 0x254768C0: 40920174 bc 4,18,0x25476A34
+ 8: Jc18o $0x25476A34
+
+
+. 0 254768B8 12
+. 3B 9C 00 01 3B BD 00 04 40 92 01 74
+
+==== BB 693 (0x254768C4) approx BBs exec'd 0 ====
+
+ 0x254768C4: 81390000 lwz r9,0(r25)
+ 0: GETL R25, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x254768C8: 7C9C4840 cmpl cr1,r28,r9
+ 4: GETL R28, t4
+ 5: GETL R9, t6
+ 6: CMPUL t4, t6, t8 (-rSo)
+ 7: ICRFL t8, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x254768CC: 40840124 bc 4,4,0x254769F0
+ 9: Jc04o $0x254769F0
+
+
+. 0 254768C4 12
+. 81 39 00 00 7C 9C 48 40 40 84 01 24
+
+==== BB 694 (0x254769D4) approx BBs exec'd 0 ====
+
+ 0x254769D4: 811F0020 lwz r8,32(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254769D8: 55000426 rlwinm r0,r8,0,16,19
+ 5: GETL R8, t4
+ 6: ANDL $0xF000, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254769DC: 2C804000 cmpi cr1,r0,16384
+ 9: GETL R0, t6
+ 10: MOVL $0x4000, t10
+ 11: CMPL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x254769E0: 41A6FF5C bc 13,6,0x2547693C
+ 14: Js06o $0x2547693C
+
+
+. 0 254769D4 16
+. 81 1F 00 20 55 00 04 26 2C 80 40 00 41 A6 FF 5C
+
+==== BB 695 (0x2547693C) approx BBs exec'd 0 ====
+
+ 0x2547693C: 929D0014 stw r20,20(r29)
+ 0: GETL R20, t0
+ 1: GETL R29, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25476940: 817D0014 lwz r11,20(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25476944: 696C0002 xori r12,r11,0x2
+ 10: GETL R11, t8
+ 11: XORL $0x2, t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0x25476948: 212C0000 subfic r9,r12,0
+ 14: GETL R12, t10
+ 15: MOVL $0x0, t12
+ 16: SBBL t10, t12 (-wCa)
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0x2547694C: 7D896114 adde r12,r9,r12
+ 19: GETL R9, t14
+ 20: GETL R12, t16
+ 21: ADCL t14, t16 (-rCa-wCa)
+ 22: PUTL t16, R12
+ 23: INCEIPL $4
+
+ 0x25476950: 7EF76378 or r23,r23,r12
+ 24: GETL R23, t18
+ 25: GETL R12, t20
+ 26: ORL t20, t18
+ 27: PUTL t18, R23
+ 28: INCEIPL $4
+
+ 0x25476954: 41B2FF64 bc 13,18,0x254768B8
+ 29: Js18o $0x254768B8
+
+
+. 0 2547693C 28
+. 92 9D 00 14 81 7D 00 14 69 6C 00 02 21 2C 00 00 7D 89 61 14 7E F7 63 78 41 B2 FF 64
+
+==== BB 696 (0x254769F0) approx BBs exec'd 0 ====
+
+ 0x254769F0: 40920044 bc 4,18,0x25476A34
+ 0: Jc18o $0x25476A34
+
+
+. 0 254769F0 4
+. 40 92 00 44
+
+==== BB 697 (0x254769F4) approx BBs exec'd 0 ====
+
+ 0x254769F4: 2F170000 cmpi cr6,r23,0
+ 0: GETL R23, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x254769F8: 419A001C bc 12,26,0x25476A14
+ 4: Js26o $0x25476A14
+
+
+. 0 254769F4 8
+. 2F 17 00 00 41 9A 00 1C
+
+==== BB 698 (0x254769FC) approx BBs exec'd 0 ====
+
+ 0x254769FC: 83BE0514 lwz r29,1300(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x514, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25476A00: 813D0000 lwz r9,0(r29)
+ 5: GETL R29, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0x25476A04: 2F890002 cmpi cr7,r9,2
+ 9: GETL R9, t8
+ 10: MOVL $0x2, t12
+ 11: CMPL t8, t12, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25476A08: 419E000C bc 12,30,0x25476A14
+ 14: Js30o $0x25476A14
+
+
+. 0 254769FC 16
+. 83 BE 05 14 81 3D 00 00 2F 89 00 02 41 9E 00 0C
+
+==== BB 699 (0x25476A14) approx BBs exec'd 0 ====
+
+ 0x25476A14: 87B50004 lwzu r29,4(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R21
+ 3: LDL (t0), t2
+ 4: PUTL t2, R29
+ 5: INCEIPL $4
+
+ 0x25476A18: 7DEFBB78 or r15,r15,r23
+ 6: GETL R15, t4
+ 7: GETL R23, t6
+ 8: ORL t6, t4
+ 9: PUTL t4, R15
+ 10: INCEIPL $4
+
+ 0x25476A1C: 2C9D0000 cmpi cr1,r29,0
+ 11: GETL R29, t8
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x25476A20: 4086FE48 bc 4,6,0x25476868
+ 15: Jc06o $0x25476868
+
+
+. 0 25476A14 16
+. 87 B5 00 04 7D EF BB 78 2C 9D 00 00 40 86 FE 48
+
+==== BB 700 (0x25476868) approx BBs exec'd 0 ====
+
+ 0x25476868: 806E0000 lwz r3,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x2547686C: 3A600000 li r19,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R19
+ 6: INCEIPL $4
+
+ 0x25476870: 3AE00000 li r23,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R23
+ 9: INCEIPL $4
+
+ 0x25476874: 70690001 andi. r9,r3,0x1
+ 10: GETL R3, t8
+ 11: ANDL $0x1, t8
+ 12: PUTL t8, R9
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x25476878: 4082025C bc 4,2,0x25476AD4
+ 16: Jc02o $0x25476AD4
+
+
+. 0 25476868 20
+. 80 6E 00 00 3A 60 00 00 3A E0 00 00 70 69 00 01 40 82 02 5C
+
+==== BB 701 (0x25483DE0) approx BBs exec'd 0 ====
+
+ 0x25483DE0: 80040000 lwz r0,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25483DE4: 3884FFF8 addi r4,r4,-8
+ 4: GETL R4, t4
+ 5: ADDL $0xFFFFFFF8, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25483DE8: 8124000C lwz r9,12(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0x25483DEC: 3863FFF4 addi r3,r3,-12
+ 13: GETL R3, t10
+ 14: ADDL $0xFFFFFFF4, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0x25483DF0: 38A50002 addi r5,r5,2
+ 17: GETL R5, t12
+ 18: ADDL $0x2, t12
+ 19: PUTL t12, R5
+ 20: INCEIPL $4
+
+ 0x25483DF4: 9003000C stw r0,12(r3)
+ 21: GETL R0, t14
+ 22: GETL R3, t16
+ 23: ADDL $0xC, t16
+ 24: STL t14, (t16)
+ 25: INCEIPL $4
+
+ 0x25483DF8: 4BFFFF34 b 0x25483D2C
+ 26: JMPo $0x25483D2C ($4)
+
+
+. 0 25483DE0 28
+. 80 04 00 00 38 84 FF F8 81 24 00 0C 38 63 FF F4 38 A5 00 02 90 03 00 0C 4B FF FF 34
+
+==== BB 702 (0x25483D2C) approx BBs exec'd 0 ====
+
+ 0x25483D2C: 80040010 lwz r0,16(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25483D30: 91230010 stw r9,16(r3)
+ 5: GETL R9, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x10, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25483D34: 81240014 lwz r9,20(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x25483D38: 90030014 stw r0,20(r3)
+ 15: GETL R0, t12
+ 16: GETL R3, t14
+ 17: ADDL $0x14, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25483D3C: 80040018 lwz r0,24(r4)
+ 20: GETL R4, t16
+ 21: ADDL $0x18, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R0
+ 24: INCEIPL $4
+
+ 0x25483D40: 91230018 stw r9,24(r3)
+ 25: GETL R9, t20
+ 26: GETL R3, t22
+ 27: ADDL $0x18, t22
+ 28: STL t20, (t22)
+ 29: INCEIPL $4
+
+ 0x25483D44: 34A5FFF8 addic. r5,r5,-8
+ 30: GETL R5, t24
+ 31: ADCL $0xFFFFFFF8, t24 (-wCa)
+ 32: PUTL t24, R5
+ 33: CMP0L t24, t26 (-rSo)
+ 34: ICRFL t26, $0x0, CR
+ 35: INCEIPL $4
+
+ 0x25483D48: 8124001C lwz r9,28(r4)
+ 36: GETL R4, t28
+ 37: ADDL $0x1C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R9
+ 40: INCEIPL $4
+
+ 0x25483D4C: 9003001C stw r0,28(r3)
+ 41: GETL R0, t32
+ 42: GETL R3, t34
+ 43: ADDL $0x1C, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0x25483D50: 38840020 addi r4,r4,32
+ 46: GETL R4, t36
+ 47: ADDL $0x20, t36
+ 48: PUTL t36, R4
+ 49: INCEIPL $4
+
+ 0x25483D54: 38630020 addi r3,r3,32
+ 50: GETL R3, t38
+ 51: ADDL $0x20, t38
+ 52: PUTL t38, R3
+ 53: INCEIPL $4
+
+ 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
+ 54: Jc02o $0x25483D0C
+
+
+. 0 25483D2C 48
+. 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+
+==== BB 703 (0x25483DC4) approx BBs exec'd 0 ====
+
+ 0x25483DC4: 81240000 lwz r9,0(r4)
+ 0: GETL R4, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25483DC8: 3884FFF4 addi r4,r4,-12
+ 4: GETL R4, t4
+ 5: ADDL $0xFFFFFFF4, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25483DCC: 80040010 lwz r0,16(r4)
+ 8: GETL R4, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x25483DD0: 3863FFF0 addi r3,r3,-16
+ 13: GETL R3, t10
+ 14: ADDL $0xFFFFFFF0, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0x25483DD4: 38A50003 addi r5,r5,3
+ 17: GETL R5, t12
+ 18: ADDL $0x3, t12
+ 19: PUTL t12, R5
+ 20: INCEIPL $4
+
+ 0x25483DD8: 91230010 stw r9,16(r3)
+ 21: GETL R9, t14
+ 22: GETL R3, t16
+ 23: ADDL $0x10, t16
+ 24: STL t14, (t16)
+ 25: INCEIPL $4
+
+ 0x25483DDC: 4BFFFF58 b 0x25483D34
+ 26: JMPo $0x25483D34 ($4)
+
+
+. 0 25483DC4 28
+. 81 24 00 00 38 84 FF F4 80 04 00 10 38 63 FF F0 38 A5 00 03 91 23 00 10 4B FF FF 58
+
+==== BB 704 (0x25483D34) approx BBs exec'd 0 ====
+
+ 0x25483D34: 81240014 lwz r9,20(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25483D38: 90030014 stw r0,20(r3)
+ 5: GETL R0, t4
+ 6: GETL R3, t6
+ 7: ADDL $0x14, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25483D3C: 80040018 lwz r0,24(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0x25483D40: 91230018 stw r9,24(r3)
+ 15: GETL R9, t12
+ 16: GETL R3, t14
+ 17: ADDL $0x18, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25483D44: 34A5FFF8 addic. r5,r5,-8
+ 20: GETL R5, t16
+ 21: ADCL $0xFFFFFFF8, t16 (-wCa)
+ 22: PUTL t16, R5
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x0, CR
+ 25: INCEIPL $4
+
+ 0x25483D48: 8124001C lwz r9,28(r4)
+ 26: GETL R4, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R9
+ 30: INCEIPL $4
+
+ 0x25483D4C: 9003001C stw r0,28(r3)
+ 31: GETL R0, t24
+ 32: GETL R3, t26
+ 33: ADDL $0x1C, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x25483D50: 38840020 addi r4,r4,32
+ 36: GETL R4, t28
+ 37: ADDL $0x20, t28
+ 38: PUTL t28, R4
+ 39: INCEIPL $4
+
+ 0x25483D54: 38630020 addi r3,r3,32
+ 40: GETL R3, t30
+ 41: ADDL $0x20, t30
+ 42: PUTL t30, R3
+ 43: INCEIPL $4
+
+ 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
+ 44: Jc02o $0x25483D0C
+
+
+. 0 25483D34 40
+. 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
+
+==== BB 705 (0x25476A24) approx BBs exec'd 0 ====
+
+ 0x25476A24: 2E0F0000 cmpi cr4,r15,0
+ 0: GETL R15, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25476A28: 4192026C bc 12,18,0x25476C94
+ 4: Js18o $0x25476C94
+
+
+. 0 25476A24 8
+. 2E 0F 00 00 41 92 02 6C
+
+==== BB 706 (0x25476A2C) approx BBs exec'd 0 ====
+
+ 0x25476A2C: 3860FFFF li r3,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476A30: 4800002C b 0x25476A5C
+ 3: JMPo $0x25476A5C ($4)
+
+
+. 0 25476A2C 8
+. 38 60 FF FF 48 00 00 2C
+
+==== BB 707 (0x25476A5C) approx BBs exec'd 0 ====
+
+ 0x25476A5C: 81010000 lwz r8,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0x25476A60: 81E80004 lwz r15,4(r8)
+ 4: GETL R8, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R15
+ 8: INCEIPL $4
+
+ 0x25476A64: 8088FFB4 lwz r4,-76(r8)
+ 9: GETL R8, t8
+ 10: ADDL $0xFFFFFFB4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R4
+ 13: INCEIPL $4
+
+ 0x25476A68: 7DE803A6 mtlr r15
+ 14: GETL R15, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x25476A6C: 81C8FFB8 lwz r14,-72(r8)
+ 17: GETL R8, t14
+ 18: ADDL $0xFFFFFFB8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R14
+ 21: INCEIPL $4
+
+ 0x25476A70: 81E8FFBC lwz r15,-68(r8)
+ 22: GETL R8, t18
+ 23: ADDL $0xFFFFFFBC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R15
+ 26: INCEIPL $4
+
+ 0x25476A74: 7C808120 mtcrf 0x8,r4
+ 27: GETL R4, t22
+ 28: ICRFL t22, $0x4, CR
+ 29: INCEIPL $4
+
+ 0x25476A78: 8208FFC0 lwz r16,-64(r8)
+ 30: GETL R8, t24
+ 31: ADDL $0xFFFFFFC0, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R16
+ 34: INCEIPL $4
+
+ 0x25476A7C: 8228FFC4 lwz r17,-60(r8)
+ 35: GETL R8, t28
+ 36: ADDL $0xFFFFFFC4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R17
+ 39: INCEIPL $4
+
+ 0x25476A80: 8248FFC8 lwz r18,-56(r8)
+ 40: GETL R8, t32
+ 41: ADDL $0xFFFFFFC8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R18
+ 44: INCEIPL $4
+
+ 0x25476A84: 8268FFCC lwz r19,-52(r8)
+ 45: GETL R8, t36
+ 46: ADDL $0xFFFFFFCC, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R19
+ 49: INCEIPL $4
+
+ 0x25476A88: 8288FFD0 lwz r20,-48(r8)
+ 50: GETL R8, t40
+ 51: ADDL $0xFFFFFFD0, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R20
+ 54: INCEIPL $4
+
+ 0x25476A8C: 82A8FFD4 lwz r21,-44(r8)
+ 55: GETL R8, t44
+ 56: ADDL $0xFFFFFFD4, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R21
+ 59: INCEIPL $4
+
+ 0x25476A90: 82C8FFD8 lwz r22,-40(r8)
+ 60: GETL R8, t48
+ 61: ADDL $0xFFFFFFD8, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R22
+ 64: INCEIPL $4
+
+ 0x25476A94: 82E8FFDC lwz r23,-36(r8)
+ 65: GETL R8, t52
+ 66: ADDL $0xFFFFFFDC, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R23
+ 69: INCEIPL $4
+
+ 0x25476A98: 8308FFE0 lwz r24,-32(r8)
+ 70: GETL R8, t56
+ 71: ADDL $0xFFFFFFE0, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R24
+ 74: INCEIPL $4
+
+ 0x25476A9C: 8328FFE4 lwz r25,-28(r8)
+ 75: GETL R8, t60
+ 76: ADDL $0xFFFFFFE4, t60
+ 77: LDL (t60), t62
+ 78: PUTL t62, R25
+ 79: INCEIPL $4
+
+ 0x25476AA0: 8348FFE8 lwz r26,-24(r8)
+ 80: GETL R8, t64
+ 81: ADDL $0xFFFFFFE8, t64
+ 82: LDL (t64), t66
+ 83: PUTL t66, R26
+ 84: INCEIPL $4
+
+ 0x25476AA4: 8368FFEC lwz r27,-20(r8)
+ 85: GETL R8, t68
+ 86: ADDL $0xFFFFFFEC, t68
+ 87: LDL (t68), t70
+ 88: PUTL t70, R27
+ 89: INCEIPL $4
+
+ 0x25476AA8: 8388FFF0 lwz r28,-16(r8)
+ 90: GETL R8, t72
+ 91: ADDL $0xFFFFFFF0, t72
+ 92: LDL (t72), t74
+ 93: PUTL t74, R28
+ 94: INCEIPL $4
+
+ 0x25476AAC: 83A8FFF4 lwz r29,-12(r8)
+ 95: GETL R8, t76
+ 96: ADDL $0xFFFFFFF4, t76
+ 97: LDL (t76), t78
+ 98: PUTL t78, R29
+ 99: INCEIPL $4
+
+ 0x25476AB0: 83C8FFF8 lwz r30,-8(r8)
+ 100: GETL R8, t80
+ 101: ADDL $0xFFFFFFF8, t80
+ 102: LDL (t80), t82
+ 103: PUTL t82, R30
+ 104: INCEIPL $4
+
+ 0x25476AB4: 83E8FFFC lwz r31,-4(r8)
+ 105: GETL R8, t84
+ 106: ADDL $0xFFFFFFFC, t84
+ 107: LDL (t84), t86
+ 108: PUTL t86, R31
+ 109: INCEIPL $4
+
+ 0x25476AB8: 7D014378 or r1,r8,r8
+ 110: GETL R8, t88
+ 111: PUTL t88, R1
+ 112: INCEIPL $4
+
+ 0x25476ABC: 4E800020 blr
+ 113: GETL LR, t90
+ 114: JMPo-r t90 ($4)
+
+
+. 0 25476A5C 100
+. 81 01 00 00 81 E8 00 04 80 88 FF B4 7D E8 03 A6 81 C8 FF B8 81 E8 FF BC 7C 80 81 20 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
+
+==== BB 708 (0x25477238) approx BBs exec'd 0 ====
+
+ 0x25477238: 2E03FFFF cmpi cr4,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x2547723C: 7C7A1B78 or r26,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R26
+ 7: INCEIPL $4
+
+ 0x25477240: 7D6E00D0 neg r11,r14
+ 8: GETL R14, t8
+ 9: NEGL t8
+ 10: PUTL t8, R11
+ 11: INCEIPL $4
+
+ 0x25477244: 7CE00026 mfcr r7
+ 12: GETL CR, t10
+ 13: PUTL t10, R7
+ 14: INCEIPL $4
+
+ 0x25477248: 54E79FFE rlwinm r7,r7,19,31,31
+ 15: GETL R7, t12
+ 16: ROLL $0x13, t12
+ 17: ANDL $0x1, t12
+ 18: PUTL t12, R7
+ 19: INCEIPL $4
+
+ 0x2547724C: 556E0FFE rlwinm r14,r11,1,31,31
+ 20: GETL R11, t14
+ 21: SHRL $0x1F, t14
+ 22: PUTL t14, R14
+ 23: INCEIPL $4
+
+ 0x25477250: 7CEB7039 and. r11,r7,r14
+ 24: GETL R7, t16
+ 25: GETL R14, t18
+ 26: ANDL t16, t18
+ 27: PUTL t18, R11
+ 28: CMP0L t18, t20 (-rSo)
+ 29: ICRFL t20, $0x0, CR
+ 30: INCEIPL $4
+
+ 0x25477254: 41820044 bc 12,2,0x25477298
+ 31: Js02o $0x25477298
+
+
+. 0 25477238 32
+. 2E 03 FF FF 7C 7A 1B 78 7D 6E 00 D0 7C E0 00 26 54 E7 9F FE 55 6E 0F FE 7C EB 70 39 41 82 00 44
+
+==== BB 709 (0x25477258) approx BBs exec'd 0 ====
+
+ 0x25477258: 801B01E0 lwz r0,480(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x1E0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547725C: 3BBB01E0 addi r29,r27,480
+ 5: GETL R27, t4
+ 6: ADDL $0x1E0, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0x25477260: 39200000 li r9,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0x25477264: 2F00FFFF cmpi cr6,r0,-1
+ 12: GETL R0, t8
+ 13: MOVL $0xFFFFFFFF, t12
+ 14: CMPL t8, t12, t10 (-rSo)
+ 15: ICRFL t10, $0x6, CR
+ 16: INCEIPL $4
+
+ 0x25477268: 419A0028 bc 12,26,0x25477290
+ 17: Js26o $0x25477290
+
+
+. 0 25477258 20
+. 80 1B 01 E0 3B BB 01 E0 39 20 00 00 2F 00 FF FF 41 9A 00 28
+
+==== BB 710 (0x25477290) approx BBs exec'd 0 ====
+
+ 0x25477290: 2C090000 cmpi cr0,r9,0
+ 0: GETL R9, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25477294: 408200DC bc 4,2,0x25477370
+ 4: Jc02o $0x25477370
+
+
+. 0 25477290 8
+. 2C 09 00 00 40 82 00 DC
+
+==== BB 711 (0x25477298) approx BBs exec'd 0 ====
+
+ 0x25477298: 4092008C bc 4,18,0x25477324
+ 0: Jc18o $0x25477324
+
+
+. 0 25477298 4
+. 40 92 00 8C
+
+==== BB 712 (0x2547729C) approx BBs exec'd 0 ====
+
+ 0x2547729C: 2F170000 cmpi cr6,r23,0
+ 0: GETL R23, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x254772A0: 409A01E4 bc 4,26,0x25477484
+ 4: Jc26o $0x25477484
+
+
+. 0 2547729C 8
+. 2F 17 00 00 40 9A 01 E4
+
+==== BB 713 (0x254772A4) approx BBs exec'd 0 ====
+
+ 0x254772A4: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254772A8: 48000949 bl 0x25477BF0
+ 3: MOVL $0x254772AC, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25477BF0 ($4)
+
+
+. 0 254772A4 8
+. 7F E3 FB 78 48 00 09 49
+
+==== BB 714 _dl_load_cache_lookup(0x25477BF0) approx BBs exec'd 0 ====
+
+ 0x25477BF0: 9421FFC0 stwu r1,-64(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFC0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25477BF4: 7C8802A6 mflr r4
+ 6: GETL LR, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x25477BF8: 4801F409 bl 0x25497000
+ 9: MOVL $0x25477BFC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25477BF0 12
+. 94 21 FF C0 7C 88 02 A6 48 01 F4 09
+
+==== BB 715 (0x25477BFC) approx BBs exec'd 0 ====
+
+ 0x25477BFC: 93C10038 stw r30,56(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x38, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25477C00: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25477C04: 9261000C stw r19,12(r1)
+ 8: GETL R19, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25477C08: 90810044 stw r4,68(r1)
+ 13: GETL R4, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x44, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25477C0C: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0x25477C10: 92E1001C stw r23,28(r1)
+ 21: GETL R23, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25477C14: 7C771B78 or r23,r3,r3
+ 26: GETL R3, t20
+ 27: PUTL t20, R23
+ 28: INCEIPL $4
+
+ 0x25477C18: 827E04F4 lwz r19,1268(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x4F4, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R19
+ 33: INCEIPL $4
+
+ 0x25477C1C: 92810010 stw r20,16(r1)
+ 34: GETL R20, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x10, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x25477C20: 80130000 lwz r0,0(r19)
+ 39: GETL R19, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R0
+ 42: INCEIPL $4
+
+ 0x25477C24: 92A10014 stw r21,20(r1)
+ 43: GETL R21, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x14, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x25477C28: 70090001 andi. r9,r0,0x1
+ 48: GETL R0, t38
+ 49: ANDL $0x1, t38
+ 50: PUTL t38, R9
+ 51: CMP0L t38, t40 (-rSo)
+ 52: ICRFL t40, $0x0, CR
+ 53: INCEIPL $4
+
+ 0x25477C2C: 92C10018 stw r22,24(r1)
+ 54: GETL R22, t42
+ 55: GETL R1, t44
+ 56: ADDL $0x18, t44
+ 57: STL t42, (t44)
+ 58: INCEIPL $4
+
+ 0x25477C30: 93010020 stw r24,32(r1)
+ 59: GETL R24, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x20, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0x25477C34: 93210024 stw r25,36(r1)
+ 64: GETL R25, t50
+ 65: GETL R1, t52
+ 66: ADDL $0x24, t52
+ 67: STL t50, (t52)
+ 68: INCEIPL $4
+
+ 0x25477C38: 93410028 stw r26,40(r1)
+ 69: GETL R26, t54
+ 70: GETL R1, t56
+ 71: ADDL $0x28, t56
+ 72: STL t54, (t56)
+ 73: INCEIPL $4
+
+ 0x25477C3C: 9361002C stw r27,44(r1)
+ 74: GETL R27, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x2C, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0x25477C40: 93810030 stw r28,48(r1)
+ 79: GETL R28, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x30, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x25477C44: 93A10034 stw r29,52(r1)
+ 84: GETL R29, t66
+ 85: GETL R1, t68
+ 86: ADDL $0x34, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0x25477C48: 93E1003C stw r31,60(r1)
+ 89: GETL R31, t70
+ 90: GETL R1, t72
+ 91: ADDL $0x3C, t72
+ 92: STL t70, (t72)
+ 93: INCEIPL $4
+
+ 0x25477C4C: 91810008 stw r12,8(r1)
+ 94: GETL R12, t74
+ 95: GETL R1, t76
+ 96: ADDL $0x8, t76
+ 97: STL t74, (t76)
+ 98: INCEIPL $4
+
+ 0x25477C50: 4082037C bc 4,2,0x25477FCC
+ 99: Jc02o $0x25477FCC
+
+
+. 0 25477BFC 88
+. 93 C1 00 38 7F C8 02 A6 92 61 00 0C 90 81 00 44 7D 80 00 26 92 E1 00 1C 7C 77 1B 78 82 7E 04 F4 92 81 00 10 80 13 00 00 92 A1 00 14 70 09 00 01 92 C1 00 18 93 01 00 20 93 21 00 24 93 41 00 28 93 61 00 2C 93 81 00 30 93 A1 00 34 93 E1 00 3C 91 81 00 08 40 82 03 7C
+
+==== BB 716 (0x25477C54) approx BBs exec'd 0 ====
+
+ 0x25477C54: 82DE0254 lwz r22,596(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x254, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R22
+ 4: INCEIPL $4
+
+ 0x25477C58: 80760000 lwz r3,0(r22)
+ 5: GETL R22, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0x25477C5C: 2F830000 cmpi cr7,r3,0
+ 9: GETL R3, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x25477C60: 419E00FC bc 12,30,0x25477D5C
+ 13: Js30o $0x25477D5C
+
+
+. 0 25477C54 16
+. 82 DE 02 54 80 76 00 00 2F 83 00 00 41 9E 00 FC
+
+==== BB 717 (0x25477D5C) approx BBs exec'd 0 ====
+
+ 0x25477D5C: 807E0260 lwz r3,608(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x260, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25477D60: 38A00001 li r5,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25477D64: 809E025C lwz r4,604(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x25C, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25477D68: 48004245 bl 0x2547BFAC
+ 13: MOVL $0x25477D6C, t10
+ 14: PUTL t10, LR
+ 15: JMPo-c $0x2547BFAC ($4)
+
+
+. 0 25477D5C 16
+. 80 7E 02 60 38 A0 00 01 80 9E 02 5C 48 00 42 45
+
+==== BB 718 _dl_sysdep_read_whole_file(0x2547BFAC) approx BBs exec'd 0 ====
+
+ 0x2547BFAC: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x2547BFB0: 9421FF60 stwu r1,-160(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFF60, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547BFB4: 93810090 stw r28,144(r1)
+ 9: GETL R28, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x90, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547BFB8: 7C9C2378 or r28,r4,r4
+ 14: GETL R4, t10
+ 15: PUTL t10, R28
+ 16: INCEIPL $4
+
+ 0x2547BFBC: 38800000 li r4,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R4
+ 19: INCEIPL $4
+
+ 0x2547BFC0: 9361008C stw r27,140(r1)
+ 20: GETL R27, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x8C, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x2547BFC4: 93A10094 stw r29,148(r1)
+ 25: GETL R29, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x94, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0x2547BFC8: 7CBD2B78 or r29,r5,r5
+ 30: GETL R5, t22
+ 31: PUTL t22, R29
+ 32: INCEIPL $4
+
+ 0x2547BFCC: 93E1009C stw r31,156(r1)
+ 33: GETL R31, t24
+ 34: GETL R1, t26
+ 35: ADDL $0x9C, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0x2547BFD0: 3B60FFFF li r27,-1
+ 38: MOVL $0xFFFFFFFF, t28
+ 39: PUTL t28, R27
+ 40: INCEIPL $4
+
+ 0x2547BFD4: 93C10098 stw r30,152(r1)
+ 41: GETL R30, t30
+ 42: GETL R1, t32
+ 43: ADDL $0x98, t32
+ 44: STL t30, (t32)
+ 45: INCEIPL $4
+
+ 0x2547BFD8: 900100A4 stw r0,164(r1)
+ 46: GETL R0, t34
+ 47: GETL R1, t36
+ 48: ADDL $0xA4, t36
+ 49: STL t34, (t36)
+ 50: INCEIPL $4
+
+ 0x2547BFDC: 48006005 bl 0x25481FE0
+ 51: MOVL $0x2547BFE0, t38
+ 52: PUTL t38, LR
+ 53: JMPo-c $0x25481FE0 ($4)
+
+
+. 0 2547BFAC 52
+. 7C 08 02 A6 94 21 FF 60 93 81 00 90 7C 9C 23 78 38 80 00 00 93 61 00 8C 93 A1 00 94 7C BD 2B 78 93 E1 00 9C 3B 60 FF FF 93 C1 00 98 90 01 00 A4 48 00 60 05
+
+==== BB 719 (0x2547BFE0) approx BBs exec'd 0 ====
+
+ 0x2547BFE0: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547BFE4: 38A10010 addi r5,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547BFE8: 38600003 li r3,3
+ 9: MOVL $0x3, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x2547BFEC: 7FE4FB78 or r4,r31,r31
+ 12: GETL R31, t8
+ 13: PUTL t8, R4
+ 14: INCEIPL $4
+
+ 0x2547BFF0: 41800040 bc 12,0,0x2547C030
+ 15: Js00o $0x2547C030
+
+
+. 0 2547BFE0 20
+. 7C 7F 1B 79 38 A1 00 10 38 60 00 03 7F E4 FB 78 41 80 00 40
+
+==== BB 720 (0x2547BFF4) approx BBs exec'd 0 ====
+
+ 0x2547BFF4: 48005EB1 bl 0x25481EA4
+ 0: MOVL $0x2547BFF8, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25481EA4 ($4)
+
+
+. 0 2547BFF4 4
+. 48 00 5E B1
+
+==== BB 721 (0x2547BFF8) approx BBs exec'd 0 ====
+
+ 0x2547BFF8: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547BFFC: 419C002C bc 12,28,0x2547C028
+ 4: Js28o $0x2547C028
+
+
+. 0 2547BFF8 8
+. 2F 83 00 00 41 9C 00 2C
+
+==== BB 722 (0x2547C000) approx BBs exec'd 0 ====
+
+ 0x2547C000: 81210044 lwz r9,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547C004: 7FA5EB78 or r5,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547C008: 38C00002 li r6,2
+ 8: MOVL $0x2, t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0x2547C00C: 7FE7FB78 or r7,r31,r31
+ 11: GETL R31, t8
+ 12: PUTL t8, R7
+ 13: INCEIPL $4
+
+ 0x2547C010: 2C890000 cmpi cr1,r9,0
+ 14: GETL R9, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x1, CR
+ 17: INCEIPL $4
+
+ 0x2547C014: 7D244B78 or r4,r9,r9
+ 18: GETL R9, t14
+ 19: PUTL t14, R4
+ 20: INCEIPL $4
+
+ 0x2547C018: 39000000 li r8,0
+ 21: MOVL $0x0, t16
+ 22: PUTL t16, R8
+ 23: INCEIPL $4
+
+ 0x2547C01C: 38600000 li r3,0
+ 24: MOVL $0x0, t18
+ 25: PUTL t18, R3
+ 26: INCEIPL $4
+
+ 0x2547C020: 913C0000 stw r9,0(r28)
+ 27: GETL R9, t20
+ 28: GETL R28, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0x2547C024: 40860034 bc 4,6,0x2547C058
+ 31: Jc06o $0x2547C058
+
+
+. 0 2547C000 40
+. 81 21 00 44 7F A5 EB 78 38 C0 00 02 7F E7 FB 78 2C 89 00 00 7D 24 4B 78 39 00 00 00 38 60 00 00 91 3C 00 00 40 86 00 34
+
+==== BB 723 (0x2547C058) approx BBs exec'd 0 ====
+
+ 0x2547C058: 48006741 bl 0x25482798
+ 0: MOVL $0x2547C05C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25482798 ($4)
+
+
+. 0 2547C058 4
+. 48 00 67 41
+
+==== BB 724 (0x2547C05C) approx BBs exec'd 0 ====
+
+ 0x2547C05C: 7C7B1B78 or r27,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R27
+ 2: INCEIPL $4
+
+ 0x2547C060: 4BFFFFC8 b 0x2547C028
+ 3: JMPo $0x2547C028 ($4)
+
+
+. 0 2547C05C 8
+. 7C 7B 1B 78 4B FF FF C8
+
+==== BB 725 (0x2547C028) approx BBs exec'd 0 ====
+
+ 0x2547C028: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547C02C: 48005FC5 bl 0x25481FF0
+ 3: MOVL $0x2547C030, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25481FF0 ($4)
+
+
+. 0 2547C028 8
+. 7F E3 FB 78 48 00 5F C5
+
+==== BB 726 (0x2547C030) approx BBs exec'd 0 ====
+
+ 0x2547C030: 808100A4 lwz r4,164(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0xA4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547C034: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547C038: 83810090 lwz r28,144(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x90, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0x2547C03C: 8361008C lwz r27,140(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x8C, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R27
+ 17: INCEIPL $4
+
+ 0x2547C040: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547C044: 83A10094 lwz r29,148(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x94, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x2547C048: 83C10098 lwz r30,152(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x98, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0x2547C04C: 83E1009C lwz r31,156(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x9C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R31
+ 35: INCEIPL $4
+
+ 0x2547C050: 382100A0 addi r1,r1,160
+ 36: GETL R1, t28
+ 37: ADDL $0xA0, t28
+ 38: PUTL t28, R1
+ 39: INCEIPL $4
+
+ 0x2547C054: 4E800020 blr
+ 40: GETL LR, t30
+ 41: JMPo-r t30 ($4)
+
+
+. 0 2547C030 40
+. 80 81 00 A4 7F 63 DB 78 83 81 00 90 83 61 00 8C 7C 88 03 A6 83 A1 00 94 83 C1 00 98 83 E1 00 9C 38 21 00 A0 4E 80 00 20
+
+==== BB 727 (0x25477D6C) approx BBs exec'd 0 ====
+
+ 0x25477D6C: 2E03FFFF cmpi cr4,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x25477D70: 7C7F1B78 or r31,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R31
+ 7: INCEIPL $4
+
+ 0x25477D74: 41920154 bc 12,18,0x25477EC8
+ 8: Js18o $0x25477EC8
+
+
+. 0 25477D6C 12
+. 2E 03 FF FF 7C 7F 1B 78 41 92 01 54
+
+==== BB 728 (0x25477D78) approx BBs exec'd 0 ====
+
+ 0x25477D78: 813E025C lwz r9,604(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x25C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25477D7C: 83A90000 lwz r29,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R29
+ 8: INCEIPL $4
+
+ 0x25477D80: 289D0010 cmpli cr1,r29,16
+ 9: GETL R29, t8
+ 10: MOVL $0x10, t12
+ 11: CMPUL t8, t12, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x25477D84: 408500E8 bc 4,5,0x25477E6C
+ 14: Jc05o $0x25477E6C
+
+
+. 0 25477D78 16
+. 81 3E 02 5C 83 A9 00 00 28 9D 00 10 40 85 00 E8
+
+==== BB 729 (0x25477D88) approx BBs exec'd 0 ====
+
+ 0x25477D88: 809E0264 lwz r4,612(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x264, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25477D8C: 38A0000B li r5,11
+ 5: MOVL $0xB, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25477D90: 4800B509 bl 0x25483298
+ 8: MOVL $0x25477D94, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x25483298 ($4)
+
+
+. 0 25477D88 12
+. 80 9E 02 64 38 A0 00 0B 48 00 B5 09
+
+==== BB 730 (0x25477D94) approx BBs exec'd 0 ====
+
+ 0x25477D94: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25477D98: 409A00D4 bc 4,26,0x25477E6C
+ 4: Jc26o $0x25477E6C
+
+
+. 0 25477D94 8
+. 2F 03 00 00 40 9A 00 D4
+
+==== BB 731 (0x25477D9C) approx BBs exec'd 0 ====
+
+ 0x25477D9C: 815F000C lwz r10,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25477DA0: 93F60000 stw r31,0(r22)
+ 5: GETL R31, t4
+ 6: GETL R22, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x25477DA4: 1D0A000C mulli r8,r10,12
+ 9: GETL R10, t8
+ 10: MULL $0xC, t8
+ 11: PUTL t8, R8
+ 12: INCEIPL $4
+
+ 0x25477DA8: 839E0258 lwz r28,600(r30)
+ 13: GETL R30, t10
+ 14: ADDL $0x258, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0x25477DAC: 38E80017 addi r7,r8,23
+ 18: GETL R8, t14
+ 19: ADDL $0x17, t14
+ 20: PUTL t14, R7
+ 21: INCEIPL $4
+
+ 0x25477DB0: 54E50038 rlwinm r5,r7,0,0,28
+ 22: GETL R7, t16
+ 23: ANDL $0xFFFFFFF8, t16
+ 24: PUTL t16, R5
+ 25: INCEIPL $4
+
+ 0x25477DB4: 38C50030 addi r6,r5,48
+ 26: GETL R5, t18
+ 27: ADDL $0x30, t18
+ 28: PUTL t18, R6
+ 29: INCEIPL $4
+
+ 0x25477DB8: 7C7F2A14 add r3,r31,r5
+ 30: GETL R31, t20
+ 31: GETL R5, t22
+ 32: ADDL t20, t22
+ 33: PUTL t22, R3
+ 34: INCEIPL $4
+
+ 0x25477DBC: 7E06E840 cmpl cr4,r6,r29
+ 35: GETL R6, t24
+ 36: GETL R29, t26
+ 37: CMPUL t24, t26, t28 (-rSo)
+ 38: ICRFL t28, $0x4, CR
+ 39: INCEIPL $4
+
+ 0x25477DC0: 4191001C bc 12,17,0x25477DDC
+ 40: Js17o $0x25477DDC
+
+
+. 0 25477D9C 40
+. 81 5F 00 0C 93 F6 00 00 1D 0A 00 0C 83 9E 02 58 38 E8 00 17 54 E5 00 38 38 C5 00 30 7C 7F 2A 14 7E 06 E8 40 41 91 00 1C
+
+==== BB 732 (0x25477DC4) approx BBs exec'd 0 ====
+
+ 0x25477DC4: 809E0268 lwz r4,616(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x268, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25477DC8: 38A00014 li r5,20
+ 5: MOVL $0x14, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x25477DCC: 907C0000 stw r3,0(r28)
+ 8: GETL R3, t6
+ 9: GETL R28, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25477DD0: 4800B4C9 bl 0x25483298
+ 12: MOVL $0x25477DD4, t10
+ 13: PUTL t10, LR
+ 14: JMPo-c $0x25483298 ($4)
+
+
+. 0 25477DC4 16
+. 80 9E 02 68 38 A0 00 14 90 7C 00 00 48 00 B4 C9
+
+==== BB 733 (0x254832B8) approx BBs exec'd 0 ====
+
+ 0x254832B8: 548007BE rlwinm r0,r4,0,30,31
+ 0: GETL R4, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x254832BC: 2C000000 cmpi cr0,r0,0
+ 4: GETL R0, t2
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x254832C0: 4182002C bc 12,2,0x254832EC
+ 8: Js02o $0x254832EC
+
+
+. 0 254832B8 12
+. 54 80 07 BE 2C 00 00 00 41 82 00 2C
+
+==== BB 734 (0x254832EC) approx BBs exec'd 0 ====
+
+ 0x254832EC: 556907BE rlwinm r9,r11,0,30,31
+ 0: GETL R11, t0
+ 1: ANDL $0x3, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x254832F0: 2F090000 cmpi cr6,r9,0
+ 4: GETL R9, t2
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x254832F4: 409A00C0 bc 4,26,0x254833B4
+ 8: Jc26o $0x254833B4
+
+
+. 0 254832EC 12
+. 55 69 07 BE 2F 09 00 00 40 9A 00 C0
+
+==== BB 735 (0x254832F8) approx BBs exec'd 0 ====
+
+ 0x254832F8: 54A8F0BE rlwinm r8,r5,30,2,31
+ 0: GETL R5, t0
+ 1: SHRL $0x2, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x254832FC: 7D6A5B78 or r10,r11,r11
+ 4: GETL R11, t2
+ 5: PUTL t2, R10
+ 6: INCEIPL $4
+
+ 0x25483300: 550007BE rlwinm r0,r8,0,30,31
+ 7: GETL R8, t4
+ 8: ANDL $0x3, t4
+ 9: PUTL t4, R0
+ 10: INCEIPL $4
+
+ 0x25483304: 7C892378 or r9,r4,r4
+ 11: GETL R4, t6
+ 12: PUTL t6, R9
+ 13: INCEIPL $4
+
+ 0x25483308: 2F800001 cmpi cr7,r0,1
+ 14: GETL R0, t8
+ 15: MOVL $0x1, t12
+ 16: CMPL t8, t12, t10 (-rSo)
+ 17: ICRFL t10, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2548330C: 419E0150 bc 12,30,0x2548345C
+ 19: Js30o $0x2548345C
+
+
+. 0 254832F8 24
+. 54 A8 F0 BE 7D 6A 5B 78 55 00 07 BE 7C 89 23 78 2F 80 00 01 41 9E 01 50
+
+==== BB 736 (0x2548345C) approx BBs exec'd 0 ====
+
+ 0x2548345C: 806B0000 lwz r3,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25483460: 3908FFFF addi r8,r8,-1
+ 4: GETL R8, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R8
+ 7: INCEIPL $4
+
+ 0x25483464: 80C40000 lwz r6,0(r4)
+ 8: GETL R4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R6
+ 11: INCEIPL $4
+
+ 0x25483468: 394B0004 addi r10,r11,4
+ 12: GETL R11, t10
+ 13: ADDL $0x4, t10
+ 14: PUTL t10, R10
+ 15: INCEIPL $4
+
+ 0x2548346C: 39240004 addi r9,r4,4
+ 16: GETL R4, t12
+ 17: ADDL $0x4, t12
+ 18: PUTL t12, R9
+ 19: INCEIPL $4
+
+ 0x25483470: 7F033000 cmp cr6,r3,r6
+ 20: GETL R3, t14
+ 21: GETL R6, t16
+ 22: CMPL t14, t16, t18 (-rSo)
+ 23: ICRFL t18, $0x6, CR
+ 24: INCEIPL $4
+
+ 0x25483474: 80EA0000 lwz r7,0(r10)
+ 25: GETL R10, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R7
+ 28: INCEIPL $4
+
+ 0x25483478: 80090000 lwz r0,0(r9)
+ 29: GETL R9, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R0
+ 32: INCEIPL $4
+
+ 0x2548347C: 419A00C8 bc 12,26,0x25483544
+ 33: Js26o $0x25483544
+
+
+. 0 2548345C 36
+. 80 6B 00 00 39 08 FF FF 80 C4 00 00 39 4B 00 04 39 24 00 04 7F 03 30 00 80 EA 00 00 80 09 00 00 41 9A 00 C8
+
+==== BB 737 (0x25483544) approx BBs exec'd 0 ====
+
+ 0x25483544: 7F870000 cmp cr7,r7,r0
+ 0: GETL R7, t0
+ 1: GETL R0, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25483548: 806A0004 lwz r3,4(r10)
+ 5: GETL R10, t6
+ 6: ADDL $0x4, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R3
+ 9: INCEIPL $4
+
+ 0x2548354C: 80C90004 lwz r6,4(r9)
+ 10: GETL R9, t10
+ 11: ADDL $0x4, t10
+ 12: LDL (t10), t12
+ 13: PUTL t12, R6
+ 14: INCEIPL $4
+
+ 0x25483550: 409EFDF4 bc 4,30,0x25483344
+ 15: Jc30o $0x25483344
+
+
+. 0 25483544 16
+. 7F 87 00 00 80 6A 00 04 80 C9 00 04 40 9E FD F4
+
+==== BB 738 (0x25483554) approx BBs exec'd 0 ====
+
+ 0x25483554: 7C033000 cmp cr0,r3,r6
+ 0: GETL R3, t0
+ 1: GETL R6, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25483558: 80EA0008 lwz r7,8(r10)
+ 5: GETL R10, t6
+ 6: ADDL $0x8, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R7
+ 9: INCEIPL $4
+
+ 0x2548355C: 80090008 lwz r0,8(r9)
+ 10: GETL R9, t10
+ 11: ADDL $0x8, t10
+ 12: LDL (t10), t12
+ 13: PUTL t12, R0
+ 14: INCEIPL $4
+
+ 0x25483560: 41A2FDD4 bc 13,2,0x25483334
+ 15: Js02o $0x25483334
+
+
+. 0 25483554 16
+. 7C 03 30 00 80 EA 00 08 80 09 00 08 41 A2 FD D4
+
+==== BB 739 (0x25483334) approx BBs exec'd 0 ====
+
+ 0x25483334: 7C870000 cmp cr1,r7,r0
+ 0: GETL R7, t0
+ 1: GETL R0, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25483338: 806A000C lwz r3,12(r10)
+ 5: GETL R10, t6
+ 6: ADDL $0xC, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R3
+ 9: INCEIPL $4
+
+ 0x2548333C: 80C9000C lwz r6,12(r9)
+ 10: GETL R9, t10
+ 11: ADDL $0xC, t10
+ 12: LDL (t10), t12
+ 13: PUTL t12, R6
+ 14: INCEIPL $4
+
+ 0x25483340: 41860148 bc 12,6,0x25483488
+ 15: Js06o $0x25483488
+
+
+. 0 25483334 16
+. 7C 87 00 00 80 6A 00 0C 80 C9 00 0C 41 86 01 48
+
+==== BB 740 (0x25483488) approx BBs exec'd 0 ====
+
+ 0x25483488: 3908FFFC addi r8,r8,-4
+ 0: GETL R8, t0
+ 1: ADDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x2548348C: 394A0010 addi r10,r10,16
+ 4: GETL R10, t2
+ 5: ADDL $0x10, t2
+ 6: PUTL t2, R10
+ 7: INCEIPL $4
+
+ 0x25483490: 2F080000 cmpi cr6,r8,0
+ 8: GETL R8, t4
+ 9: CMP0L t4, t6 (-rSo)
+ 10: ICRFL t6, $0x6, CR
+ 11: INCEIPL $4
+
+ 0x25483494: 39290010 addi r9,r9,16
+ 12: GETL R9, t8
+ 13: ADDL $0x10, t8
+ 14: PUTL t8, R9
+ 15: INCEIPL $4
+
+ 0x25483498: 40BAFFD8 bc 5,26,0x25483470
+ 16: Jc26o $0x25483470
+
+
+. 0 25483488 20
+. 39 08 FF FC 39 4A 00 10 2F 08 00 00 39 29 00 10 40 BA FF D8
+
+==== BB 741 (0x2548349C) approx BBs exec'd 0 ====
+
+ 0x2548349C: 7F833000 cmp cr7,r3,r6
+ 0: GETL R3, t0
+ 1: GETL R6, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x254834A0: 7C033010 subfc r0,r3,r6
+ 5: GETL R3, t6
+ 6: GETL R6, t8
+ 7: SBBL t6, t8 (-wCa)
+ 8: PUTL t8, R0
+ 9: INCEIPL $4
+
+ 0x254834A4: 7C000110 subfe r0,r0,r0
+ 10: GETL R0, t10
+ 11: GETL R0, t12
+ 12: SBBL t10, t12 (-rCa-wCa)
+ 13: PUTL t12, R0
+ 14: INCEIPL $4
+
+ 0x254834A8: 7C0003B8 nand r0,r0,r0
+ 15: GETL R0, t14
+ 16: GETL R0, t16
+ 17: ANDL t14, t16
+ 18: NOTL t16
+ 19: PUTL t16, R0
+ 20: INCEIPL $4
+
+ 0x254834AC: 60000001 ori r0,r0,0x1
+ 21: GETL R0, t18
+ 22: ORL $0x1, t18
+ 23: PUTL t18, R0
+ 24: INCEIPL $4
+
+ 0x254834B0: 409EFEA4 bc 4,30,0x25483354
+ 25: Jc30o $0x25483354
+
+
+. 0 2548349C 24
+. 7F 83 30 00 7C 03 30 10 7C 00 01 10 7C 00 03 B8 60 00 00 01 40 9E FE A4
+
+==== BB 742 (0x254834B4) approx BBs exec'd 0 ====
+
+ 0x254834B4: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254834B8: 4BFFFE9C b 0x25483354
+ 3: JMPo $0x25483354 ($4)
+
+
+. 0 254834B4 8
+. 38 00 00 00 4B FF FE 9C
+
+==== BB 743 (0x25483354) approx BBs exec'd 0 ====
+
+ 0x25483354: 2F800000 cmpi cr7,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25483358: 7C030378 or r3,r0,r0
+ 4: GETL R0, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x2548335C: 409E0040 bc 4,30,0x2548339C
+ 7: Jc30o $0x2548339C
+
+
+. 0 25483354 12
+. 2F 80 00 00 7C 03 03 78 40 9E 00 40
+
+==== BB 744 (0x25483360) approx BBs exec'd 0 ====
+
+ 0x25483360: 54BC003A rlwinm r28,r5,0,0,29
+ 0: GETL R5, t0
+ 1: ANDL $0xFFFFFFFC, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0x25483364: 54A507BE rlwinm r5,r5,0,30,31
+ 4: GETL R5, t2
+ 5: ANDL $0x3, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0x25483368: 7C84E214 add r4,r4,r28
+ 8: GETL R4, t4
+ 9: GETL R28, t6
+ 10: ADDL t4, t6
+ 11: PUTL t6, R4
+ 12: INCEIPL $4
+
+ 0x2548336C: 7D6BE214 add r11,r11,r28
+ 13: GETL R11, t8
+ 14: GETL R28, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R11
+ 17: INCEIPL $4
+
+ 0x25483370: 2C050000 cmpi cr0,r5,0
+ 18: GETL R5, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x0, CR
+ 21: INCEIPL $4
+
+ 0x25483374: 41820024 bc 12,2,0x25483398
+ 22: Js02o $0x25483398
+
+
+. 0 25483360 24
+. 54 BC 00 3A 54 A5 07 BE 7C 84 E2 14 7D 6B E2 14 2C 05 00 00 41 82 00 24
+
+==== BB 745 (0x25477DD4) approx BBs exec'd 0 ====
+
+ 0x25477DD4: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25477DD8: 41A2FE8C bc 13,2,0x25477C64
+ 4: Js02o $0x25477C64
+
+
+. 0 25477DD4 8
+. 2C 03 00 00 41 A2 FE 8C
+
+==== BB 746 (0x25477C64) approx BBs exec'd 0 ====
+
+ 0x25477C64: 81560000 lwz r10,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0x25477C68: 38600000 li r3,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x25477C6C: 2F0AFFFF cmpi cr6,r10,-1
+ 7: GETL R10, t6
+ 8: MOVL $0xFFFFFFFF, t10
+ 9: CMPL t6, t10, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0x25477C70: 419A0094 bc 12,26,0x25477D04
+ 12: Js26o $0x25477D04
+
+
+. 0 25477C64 16
+. 81 56 00 00 38 60 00 00 2F 0A FF FF 41 9A 00 94
+
+==== BB 747 (0x25477C74) approx BBs exec'd 0 ====
+
+ 0x25477C74: 831E0258 lwz r24,600(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x258, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0x25477C78: 3AA00000 li r21,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R21
+ 7: INCEIPL $4
+
+ 0x25477C7C: 83780000 lwz r27,0(r24)
+ 8: GETL R24, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R27
+ 11: INCEIPL $4
+
+ 0x25477C80: 2E1BFFFF cmpi cr4,r27,-1
+ 12: GETL R27, t10
+ 13: MOVL $0xFFFFFFFF, t14
+ 14: CMPL t10, t14, t12 (-rSo)
+ 15: ICRFL t12, $0x4, CR
+ 16: INCEIPL $4
+
+ 0x25477C84: 41920164 bc 12,18,0x25477DE8
+ 17: Js18o $0x25477DE8
+
+
+. 0 25477C74 20
+. 83 1E 02 58 3A A0 00 00 83 78 00 00 2E 1B FF FF 41 92 01 64
+
+==== BB 748 (0x25477C88) approx BBs exec'd 0 ====
+
+ 0x25477C88: 83FB0014 lwz r31,20(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x25477C8C: 839E025C lwz r28,604(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x25C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25477C90: 3B5FFFFF addi r26,r31,-1
+ 10: GETL R31, t8
+ 11: ADDL $0xFFFFFFFF, t8
+ 12: PUTL t8, R26
+ 13: INCEIPL $4
+
+ 0x25477C94: 7F95D000 cmp cr7,r21,r26
+ 14: GETL R21, t10
+ 15: GETL R26, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x25477C98: 83BC0000 lwz r29,0(r28)
+ 19: GETL R28, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R29
+ 22: INCEIPL $4
+
+ 0x25477C9C: 3B800000 li r28,0
+ 23: MOVL $0x0, t20
+ 24: PUTL t20, R28
+ 25: INCEIPL $4
+
+ 0x25477CA0: 7ECAEA14 add r22,r10,r29
+ 26: GETL R10, t22
+ 27: GETL R29, t24
+ 28: ADDL t22, t24
+ 29: PUTL t24, R22
+ 30: INCEIPL $4
+
+ 0x25477CA4: 7F3BB050 subf r25,r27,r22
+ 31: GETL R27, t26
+ 32: GETL R22, t28
+ 33: SUBL t26, t28
+ 34: PUTL t28, R25
+ 35: INCEIPL $4
+
+ 0x25477CA8: 419D004C bc 12,29,0x25477CF4
+ 36: Js29o $0x25477CF4
+
+
+. 0 25477C88 36
+. 83 FB 00 14 83 9E 02 5C 3B 5F FF FF 7F 95 D0 00 83 BC 00 00 3B 80 00 00 7E CA EA 14 7F 3B B0 50 41 9D 00 4C
+
+==== BB 749 (0x25477CAC) approx BBs exec'd 0 ====
+
+ 0x25477CAC: 7C7CD214 add r3,r28,r26
+ 0: GETL R28, t0
+ 1: GETL R26, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25477CB0: 80980000 lwz r4,0(r24)
+ 5: GETL R24, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x25477CB4: 7C7D0E70 srawi r29,r3,1
+ 9: GETL R3, t8
+ 10: SARL $0x1, t8 (-wCa)
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x25477CB8: 7FBD0194 addze r29,r29
+ 13: GETL R29, t10
+ 14: ADCL $0x0, t10 (-rCa-wCa)
+ 15: PUTL t10, R29
+ 16: INCEIPL $4
+
+ 0x25477CBC: 7EE3BB78 or r3,r23,r23
+ 17: GETL R23, t12
+ 18: PUTL t12, R3
+ 19: INCEIPL $4
+
+ 0x25477CC0: 1FFD0018 mulli r31,r29,24
+ 20: GETL R29, t14
+ 21: MULL $0x18, t14
+ 22: PUTL t14, R31
+ 23: INCEIPL $4
+
+ 0x25477CC4: 7D9F2214 add r12,r31,r4
+ 24: GETL R31, t16
+ 25: GETL R4, t18
+ 26: ADDL t16, t18
+ 27: PUTL t18, R12
+ 28: INCEIPL $4
+
+ 0x25477CC8: 800C0034 lwz r0,52(r12)
+ 29: GETL R12, t20
+ 30: ADDL $0x34, t20
+ 31: LDL (t20), t22
+ 32: PUTL t22, R0
+ 33: INCEIPL $4
+
+ 0x25477CCC: 7C00C840 cmpl cr0,r0,r25
+ 34: GETL R0, t24
+ 35: GETL R25, t26
+ 36: CMPUL t24, t26, t28 (-rSo)
+ 37: ICRFL t28, $0x0, CR
+ 38: INCEIPL $4
+
+ 0x25477CD0: 7C9B0214 add r4,r27,r0
+ 39: GETL R27, t30
+ 40: GETL R0, t32
+ 41: ADDL t30, t32
+ 42: PUTL t32, R4
+ 43: INCEIPL $4
+
+ 0x25477CD4: 40800020 bc 4,0,0x25477CF4
+ 44: Jc00o $0x25477CF4
+
+
+. 0 25477CAC 44
+. 7C 7C D2 14 80 98 00 00 7C 7D 0E 70 7F BD 01 94 7E E3 BB 78 1F FD 00 18 7D 9F 22 14 80 0C 00 34 7C 00 C8 40 7C 9B 02 14 40 80 00 20
+
+==== BB 750 (0x25477CD8) approx BBs exec'd 0 ====
+
+ 0x25477CD8: 4BFFFDFD bl 0x25477AD4
+ 0: MOVL $0x25477CDC, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25477AD4 ($4)
+
+
+. 0 25477CD8 4
+. 4B FF FD FD
+
+==== BB 751 _dl_cache_libcmp(0x25477AD4) approx BBs exec'd 0 ====
+
+ 0x25477AD4: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25477AD8: 7C671B78 or r7,r3,r3
+ 6: GETL R3, t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x25477ADC: 89430000 lbz r10,0(r3)
+ 9: GETL R3, t6
+ 10: LDB (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x25477AE0: 2F8A0000 cmpi cr7,r10,0
+ 13: GETL R10, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x7, CR
+ 16: INCEIPL $4
+
+ 0x25477AE4: 419E00DC bc 12,30,0x25477BC0
+ 17: Js30o $0x25477BC0
+
+
+. 0 25477AD4 20
+. 94 21 FF F0 7C 67 1B 78 89 43 00 00 2F 8A 00 00 41 9E 00 DC
+
+==== BB 752 (0x25477AE8) approx BBs exec'd 0 ====
+
+ 0x25477AE8: 88640000 lbz r3,0(r4)
+ 0: GETL R4, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25477AEC: 380AFFD0 addi r0,r10,-48
+ 4: GETL R10, t4
+ 5: ADDL $0xFFFFFFD0, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x25477AF0: 7D4B5378 or r11,r10,r10
+ 8: GETL R10, t6
+ 9: PUTL t6, R11
+ 10: INCEIPL $4
+
+ 0x25477AF4: 28000009 cmpli cr0,r0,9
+ 11: GETL R0, t8
+ 12: MOVL $0x9, t12
+ 13: CMPUL t8, t12, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x25477AF8: 4181008C bc 12,1,0x25477B84
+ 16: Js01o $0x25477B84
+
+
+. 0 25477AE8 20
+. 88 64 00 00 38 0A FF D0 7D 4B 53 78 28 00 00 09 41 81 00 8C
+
+==== BB 753 (0x25477B84) approx BBs exec'd 0 ====
+
+ 0x25477B84: 3903FFD0 addi r8,r3,-48
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFD0, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x25477B88: 7C601B78 or r0,r3,r3
+ 4: GETL R3, t2
+ 5: PUTL t2, R0
+ 6: INCEIPL $4
+
+ 0x25477B8C: 28080009 cmpli cr0,r8,9
+ 7: GETL R8, t4
+ 8: MOVL $0x9, t8
+ 9: CMPUL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25477B90: 40810048 bc 4,1,0x25477BD8
+ 12: Jc01o $0x25477BD8
+
+
+. 0 25477B84 16
+. 39 03 FF D0 7C 60 1B 78 28 08 00 09 40 81 00 48
+
+==== BB 754 (0x25477B94) approx BBs exec'd 0 ====
+
+ 0x25477B94: 5543063E rlwinm r3,r10,0,24,31
+ 0: GETL R10, t0
+ 1: ANDL $0xFF, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x25477B98: 5400063E rlwinm r0,r0,0,24,31
+ 4: GETL R0, t2
+ 5: ANDL $0xFF, t2
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0x25477B9C: 7C830000 cmp cr1,r3,r0
+ 8: GETL R3, t4
+ 9: GETL R0, t6
+ 10: CMPL t4, t6, t8 (-rSo)
+ 11: ICRFL t8, $0x1, CR
+ 12: INCEIPL $4
+
+ 0x25477BA0: 40860044 bc 4,6,0x25477BE4
+ 13: Jc06o $0x25477BE4
+
+
+. 0 25477B94 16
+. 55 43 06 3E 54 00 06 3E 7C 83 00 00 40 86 00 44
+
+==== BB 755 (0x25477BA4) approx BBs exec'd 0 ====
+
+ 0x25477BA4: 8D470001 lbzu r10,1(r7)
+ 0: GETL R7, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R7
+ 3: LDB (t0), t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0x25477BA8: 8C640001 lbzu r3,1(r4)
+ 6: GETL R4, t4
+ 7: ADDL $0x1, t4
+ 8: PUTL t4, R4
+ 9: LDB (t4), t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x25477BAC: 2F0A0000 cmpi cr6,r10,0
+ 12: GETL R10, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x6, CR
+ 15: INCEIPL $4
+
+ 0x25477BB0: 409AFF3C bc 4,26,0x25477AEC
+ 16: Jc26o $0x25477AEC
+
+
+. 0 25477BA4 16
+. 8D 47 00 01 8C 64 00 01 2F 0A 00 00 40 9A FF 3C
+
+==== BB 756 (0x25477AEC) approx BBs exec'd 0 ====
+
+ 0x25477AEC: 380AFFD0 addi r0,r10,-48
+ 0: GETL R10, t0
+ 1: ADDL $0xFFFFFFD0, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x25477AF0: 7D4B5378 or r11,r10,r10
+ 4: GETL R10, t2
+ 5: PUTL t2, R11
+ 6: INCEIPL $4
+
+ 0x25477AF4: 28000009 cmpli cr0,r0,9
+ 7: GETL R0, t4
+ 8: MOVL $0x9, t8
+ 9: CMPUL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25477AF8: 4181008C bc 12,1,0x25477B84
+ 12: Js01o $0x25477B84
+
+
+. 0 25477AEC 16
+. 38 0A FF D0 7D 4B 53 78 28 00 00 09 41 81 00 8C
+
+==== BB 757 (0x25477BE4) approx BBs exec'd 0 ====
+
+ 0x25477BE4: 7C601850 subf r3,r0,r3
+ 0: GETL R0, t0
+ 1: GETL R3, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25477BE8: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x25477BEC: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+. 0 25477BE4 12
+. 7C 60 18 50 38 21 00 10 4E 80 00 20
+
+==== BB 758 (0x25477CDC) approx BBs exec'd 0 ====
+
+ 0x25477CDC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25477CE0: 419E0214 bc 12,30,0x25477EF4
+ 4: Js30o $0x25477EF4
+
+
+. 0 25477CDC 8
+. 2F 83 00 00 41 9E 02 14
+
+==== BB 759 (0x25477CE4) approx BBs exec'd 0 ====
+
+ 0x25477CE4: 409C006C bc 4,28,0x25477D50
+ 0: Jc28o $0x25477D50
+
+
+. 0 25477CE4 4
+. 40 9C 00 6C
+
+==== BB 760 (0x25477CE8) approx BBs exec'd 0 ====
+
+ 0x25477CE8: 3B9D0001 addi r28,r29,1
+ 0: GETL R29, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0x25477CEC: 7F9CD000 cmp cr7,r28,r26
+ 4: GETL R28, t2
+ 5: GETL R26, t4
+ 6: CMPL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25477CF0: 409DFFBC bc 4,29,0x25477CAC
+ 9: Jc29o $0x25477CAC
+
+
+. 0 25477CE8 12
+. 3B 9D 00 01 7F 9C D0 00 40 9D FF BC
+
+==== BB 761 (0x25477D50) approx BBs exec'd 0 ====
+
+ 0x25477D50: 3B5DFFFF addi r26,r29,-1
+ 0: GETL R29, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x25477D54: 7F9CD000 cmp cr7,r28,r26
+ 4: GETL R28, t2
+ 5: GETL R26, t4
+ 6: CMPL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25477D58: 4BFFFF98 b 0x25477CF0
+ 9: JMPo $0x25477CF0 ($4)
+
+
+. 0 25477D50 12
+. 3B 5D FF FF 7F 9C D0 00 4B FF FF 98
+
+==== BB 762 (0x25477CF0) approx BBs exec'd 0 ====
+
+ 0x25477CF0: 409DFFBC bc 4,29,0x25477CAC
+ 0: Jc29o $0x25477CAC
+
+
+. 0 25477CF0 4
+. 40 9D FF BC
+
+==== BB 763 (0x25477AFC) approx BBs exec'd 0 ====
+
+ 0x25477AFC: 38A3FFD0 addi r5,r3,-48
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFD0, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0x25477B00: 7C691B78 or r9,r3,r3
+ 4: GETL R3, t2
+ 5: PUTL t2, R9
+ 6: INCEIPL $4
+
+ 0x25477B04: 28850009 cmpli cr1,r5,9
+ 7: GETL R5, t4
+ 8: MOVL $0x9, t8
+ 9: CMPUL t4, t8, t6 (-rSo)
+ 10: ICRFL t6, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x25477B08: 418500C4 bc 12,5,0x25477BCC
+ 12: Js05o $0x25477BCC
+
+
+. 0 25477AFC 16
+. 38 A3 FF D0 7C 69 1B 78 28 85 00 09 41 85 00 C4
+
+==== BB 764 (0x25477B0C) approx BBs exec'd 0 ====
+
+ 0x25477B0C: 8D470001 lbzu r10,1(r7)
+ 0: GETL R7, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R7
+ 3: LDB (t0), t2
+ 4: PUTL t2, R10
+ 5: INCEIPL $4
+
+ 0x25477B10: 556B063E rlwinm r11,r11,0,24,31
+ 6: GETL R11, t4
+ 7: ANDL $0xFF, t4
+ 8: PUTL t4, R11
+ 9: INCEIPL $4
+
+ 0x25477B14: 5529063E rlwinm r9,r9,0,24,31
+ 10: GETL R9, t6
+ 11: ANDL $0xFF, t6
+ 12: PUTL t6, R9
+ 13: INCEIPL $4
+
+ 0x25477B18: 390BFFD0 addi r8,r11,-48
+ 14: GETL R11, t8
+ 15: ADDL $0xFFFFFFD0, t8
+ 16: PUTL t8, R8
+ 17: INCEIPL $4
+
+ 0x25477B1C: 386AFFD0 addi r3,r10,-48
+ 18: GETL R10, t10
+ 19: ADDL $0xFFFFFFD0, t10
+ 20: PUTL t10, R3
+ 21: INCEIPL $4
+
+ 0x25477B20: 3969FFD0 addi r11,r9,-48
+ 22: GETL R9, t12
+ 23: ADDL $0xFFFFFFD0, t12
+ 24: PUTL t12, R11
+ 25: INCEIPL $4
+
+ 0x25477B24: 2B830009 cmpli cr7,r3,9
+ 26: GETL R3, t14
+ 27: MOVL $0x9, t18
+ 28: CMPUL t14, t18, t16 (-rSo)
+ 29: ICRFL t16, $0x7, CR
+ 30: INCEIPL $4
+
+ 0x25477B28: 38840001 addi r4,r4,1
+ 31: GETL R4, t20
+ 32: ADDL $0x1, t20
+ 33: PUTL t20, R4
+ 34: INCEIPL $4
+
+ 0x25477B2C: 419D0020 bc 12,29,0x25477B4C
+ 35: Js29o $0x25477B4C
+
+
+. 0 25477B0C 36
+. 8D 47 00 01 55 6B 06 3E 55 29 06 3E 39 0B FF D0 38 6A FF D0 39 69 FF D0 2B 83 00 09 38 84 00 01 41 9D 00 20
+
+==== BB 765 (0x25477B4C) approx BBs exec'd 0 ====
+
+ 0x25477B4C: 88640000 lbz r3,0(r4)
+ 0: GETL R4, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25477B50: 48000014 b 0x25477B64
+ 4: JMPo $0x25477B64 ($4)
+
+
+. 0 25477B4C 8
+. 88 64 00 00 48 00 00 14
+
+==== BB 766 (0x25477B64) approx BBs exec'd 0 ====
+
+ 0x25477B64: 38A3FFD0 addi r5,r3,-48
+ 0: GETL R3, t0
+ 1: ADDL $0xFFFFFFD0, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0x25477B68: 2B050009 cmpli cr6,r5,9
+ 4: GETL R5, t2
+ 5: MOVL $0x9, t6
+ 6: CMPUL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25477B6C: 4099FFE8 bc 4,25,0x25477B54
+ 9: Jc25o $0x25477B54
+
+
+. 0 25477B64 12
+. 38 A3 FF D0 2B 05 00 09 40 99 FF E8
+
+==== BB 767 (0x25477B70) approx BBs exec'd 0 ====
+
+ 0x25477B70: 7F885800 cmp cr7,r8,r11
+ 0: GETL R8, t0
+ 1: GETL R11, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25477B74: 41BE0038 bc 13,30,0x25477BAC
+ 5: Js30o $0x25477BAC
+
+
+. 0 25477B70 8
+. 7F 88 58 00 41 BE 00 38
+
+==== BB 768 (0x25477BAC) approx BBs exec'd 0 ====
+
+ 0x25477BAC: 2F0A0000 cmpi cr6,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25477BB0: 409AFF3C bc 4,26,0x25477AEC
+ 4: Jc26o $0x25477AEC
+
+
+. 0 25477BAC 8
+. 2F 0A 00 00 40 9A FF 3C
+
+==== BB 769 (0x25477BB4) approx BBs exec'd 0 ====
+
+ 0x25477BB4: 7C635050 subf r3,r3,r10
+ 0: GETL R3, t0
+ 1: GETL R10, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25477BB8: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x25477BBC: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+. 0 25477BB4 12
+. 7C 63 50 50 38 21 00 10 4E 80 00 20
+
+==== BB 770 (0x25477EF4) approx BBs exec'd 0 ====
+
+ 0x25477EF4: 2F9D0000 cmpi cr7,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25477EF8: 7FB6EB78 or r22,r29,r29
+ 4: GETL R29, t4
+ 5: PUTL t4, R22
+ 6: INCEIPL $4
+
+ 0x25477EFC: 7FFCFB78 or r28,r31,r31
+ 7: GETL R31, t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x25477F00: 41BD0020 bc 13,29,0x25477F20
+ 10: Js29o $0x25477F20
+
+
+. 0 25477EF4 16
+. 2F 9D 00 00 7F B6 EB 78 7F FC FB 78 41 BD 00 20
+
+==== BB 771 (0x25477F20) approx BBs exec'd 0 ====
+
+ 0x25477F20: 80D80000 lwz r6,0(r24)
+ 0: GETL R24, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x25477F24: 7EE3BB78 or r3,r23,r23
+ 4: GETL R23, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x25477F28: 3B9CFFE8 addi r28,r28,-24
+ 7: GETL R28, t6
+ 8: ADDL $0xFFFFFFE8, t6
+ 9: PUTL t6, R28
+ 10: INCEIPL $4
+
+ 0x25477F2C: 7D3F3214 add r9,r31,r6
+ 11: GETL R31, t8
+ 12: GETL R6, t10
+ 13: ADDL t8, t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0x25477F30: 80A9001C lwz r5,28(r9)
+ 16: GETL R9, t12
+ 17: ADDL $0x1C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R5
+ 20: INCEIPL $4
+
+ 0x25477F34: 7C85C840 cmpl cr1,r5,r25
+ 21: GETL R5, t16
+ 22: GETL R25, t18
+ 23: CMPUL t16, t18, t20 (-rSo)
+ 24: ICRFL t20, $0x1, CR
+ 25: INCEIPL $4
+
+ 0x25477F38: 7C9B2A14 add r4,r27,r5
+ 26: GETL R27, t22
+ 27: GETL R5, t24
+ 28: ADDL t22, t24
+ 29: PUTL t24, R4
+ 30: INCEIPL $4
+
+ 0x25477F3C: 4184FFCC bc 12,4,0x25477F08
+ 31: Js04o $0x25477F08
+
+
+. 0 25477F20 32
+. 80 D8 00 00 7E E3 BB 78 3B 9C FF E8 7D 3F 32 14 80 A9 00 1C 7C 85 C8 40 7C 9B 2A 14 41 84 FF CC
+
+==== BB 772 (0x25477F08) approx BBs exec'd 0 ====
+
+ 0x25477F08: 4BFFFBCD bl 0x25477AD4
+ 0: MOVL $0x25477F0C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25477AD4 ($4)
+
+
+. 0 25477F08 4
+. 4B FF FB CD
+
+==== BB 773 (0x25477F0C) approx BBs exec'd 0 ====
+
+ 0x25477F0C: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25477F10: 409A0030 bc 4,26,0x25477F40
+ 4: Jc26o $0x25477F40
+
+
+. 0 25477F0C 8
+. 2F 03 00 00 40 9A 00 30
+
+==== BB 774 (0x25477F40) approx BBs exec'd 0 ====
+
+ 0x25477F40: 7E1DB000 cmp cr4,r29,r22
+ 0: GETL R29, t0
+ 1: GETL R22, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x25477F44: 80F80000 lwz r7,0(r24)
+ 5: GETL R24, t6
+ 6: LDL (t6), t8
+ 7: PUTL t8, R7
+ 8: INCEIPL $4
+
+ 0x25477F48: 7FFF3A14 add r31,r31,r7
+ 9: GETL R31, t10
+ 10: GETL R7, t12
+ 11: ADDL t10, t12
+ 12: PUTL t12, R31
+ 13: INCEIPL $4
+
+ 0x25477F4C: 3B9F0030 addi r28,r31,48
+ 14: GETL R31, t14
+ 15: ADDL $0x30, t14
+ 16: PUTL t14, R28
+ 17: INCEIPL $4
+
+ 0x25477F50: 40910024 bc 4,17,0x25477F74
+ 18: Jc17o $0x25477F74
+
+
+. 0 25477F40 20
+. 7E 1D B0 00 80 F8 00 00 7F FF 3A 14 3B 9F 00 30 40 91 00 24
+
+==== BB 775 (0x25477F74) approx BBs exec'd 0 ====
+
+ 0x25477F74: 811F0030 lwz r8,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25477F78: 691F0001 xori r31,r8,0x1
+ 5: GETL R8, t4
+ 6: XORL $0x1, t4
+ 7: PUTL t4, R31
+ 8: INCEIPL $4
+
+ 0x25477F7C: 213F0000 subfic r9,r31,0
+ 9: GETL R31, t6
+ 10: MOVL $0x0, t8
+ 11: SBBL t6, t8 (-wCa)
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0x25477F80: 7FE9F914 adde r31,r9,r31
+ 14: GETL R9, t10
+ 15: GETL R31, t12
+ 16: ADCL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R31
+ 18: INCEIPL $4
+
+ 0x25477F84: 69140003 xori r20,r8,0x3
+ 19: GETL R8, t14
+ 20: XORL $0x3, t14
+ 21: PUTL t14, R20
+ 22: INCEIPL $4
+
+ 0x25477F88: 21540000 subfic r10,r20,0
+ 23: GETL R20, t16
+ 24: MOVL $0x0, t18
+ 25: SBBL t16, t18 (-wCa)
+ 26: PUTL t18, R10
+ 27: INCEIPL $4
+
+ 0x25477F8C: 7E8AA114 adde r20,r10,r20
+ 28: GETL R10, t20
+ 29: GETL R20, t22
+ 30: ADCL t20, t22 (-rCa-wCa)
+ 31: PUTL t22, R20
+ 32: INCEIPL $4
+
+ 0x25477F90: 7FEBA379 or. r11,r31,r20
+ 33: GETL R31, t24
+ 34: GETL R20, t26
+ 35: ORL t26, t24
+ 36: PUTL t24, R11
+ 37: CMP0L t24, t28 (-rSo)
+ 38: ICRFL t28, $0x0, CR
+ 39: INCEIPL $4
+
+ 0x25477F94: 41820024 bc 12,2,0x25477FB8
+ 40: Js02o $0x25477FB8
+
+
+. 0 25477F74 36
+. 81 1F 00 30 69 1F 00 01 21 3F 00 00 7F E9 F9 14 69 14 00 03 21 54 00 00 7E 8A A1 14 7F EB A3 79 41 82 00 24
+
+==== BB 776 (0x25477F98) approx BBs exec'd 0 ====
+
+ 0x25477F98: 80FC0008 lwz r7,8(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x25477F9C: 7F07C840 cmpl cr6,r7,r25
+ 5: GETL R7, t4
+ 6: GETL R25, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x25477FA0: 40980018 bc 4,24,0x25477FB8
+ 10: Jc24o $0x25477FB8
+
+
+. 0 25477F98 12
+. 80 FC 00 08 7F 07 C8 40 40 98 00 18
+
+==== BB 777 (0x25477FA4) approx BBs exec'd 0 ====
+
+ 0x25477FA4: 2E150000 cmpi cr4,r21,0
+ 0: GETL R21, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x25477FA8: 41920128 bc 12,18,0x254780D0
+ 4: Js18o $0x254780D0
+
+
+. 0 25477FA4 8
+. 2E 15 00 00 41 92 01 28
+
+==== BB 778 (0x254780D0) approx BBs exec'd 0 ====
+
+ 0x254780D0: 81330008 lwz r9,8(r19)
+ 0: GETL R19, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x254780D4: 2C890000 cmpi cr1,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x254780D8: 41860010 bc 12,6,0x254780E8
+ 9: Js06o $0x254780E8
+
+
+. 0 254780D0 12
+. 81 33 00 08 2C 89 00 00 41 86 00 10
+
+==== BB 779 (0x254780DC) approx BBs exec'd 0 ====
+
+ 0x254780DC: 817C000C lwz r11,12(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254780E0: 7C0B4840 cmpl cr0,r11,r9
+ 5: GETL R11, t4
+ 6: GETL R9, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x254780E4: 4181FED4 bc 12,1,0x25477FB8
+ 10: Js01o $0x25477FB8
+
+
+. 0 254780DC 12
+. 81 7C 00 0C 7C 0B 48 40 41 81 FE D4
+
+==== BB 780 (0x254780E8) approx BBs exec'd 0 ====
+
+ 0x254780E8: 80D3003C lwz r6,60(r19)
+ 0: GETL R19, t0
+ 1: ADDL $0x3C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254780EC: 3A800000 li r20,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R20
+ 7: INCEIPL $4
+
+ 0x254780F0: 807C0010 lwz r3,16(r28)
+ 8: GETL R28, t6
+ 9: ADDL $0x10, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0x254780F4: 66898000 oris r9,r20,0x8000
+ 13: MOVL $0x80000000, t10
+ 14: PUTL t10, R9
+ 15: INCEIPL $4
+
+ 0x254780F8: 801C0014 lwz r0,20(r28)
+ 16: GETL R28, t12
+ 17: ADDL $0x14, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0x254780FC: 7D2548F8 nor r5,r9,r9
+ 21: GETL R9, t16
+ 22: NOTL t16
+ 23: PUTL t16, R5
+ 24: INCEIPL $4
+
+ 0x25478100: 7CCC30F8 nor r12,r6,r6
+ 25: GETL R6, t18
+ 26: NOTL t18
+ 27: PUTL t18, R12
+ 28: INCEIPL $4
+
+ 0x25478104: 7C642838 and r4,r3,r5
+ 29: GETL R3, t20
+ 30: GETL R5, t22
+ 31: ANDL t20, t22
+ 32: PUTL t22, R4
+ 33: INCEIPL $4
+
+ 0x25478108: 7C1C6038 and r28,r0,r12
+ 34: GETL R0, t24
+ 35: GETL R12, t26
+ 36: ANDL t24, t26
+ 37: PUTL t26, R28
+ 38: INCEIPL $4
+
+ 0x2547810C: 7C80E379 or. r0,r4,r28
+ 39: GETL R4, t28
+ 40: GETL R28, t30
+ 41: ORL t30, t28
+ 42: PUTL t28, R0
+ 43: CMP0L t28, t32 (-rSo)
+ 44: ICRFL t32, $0x0, CR
+ 45: INCEIPL $4
+
+ 0x25478110: 4082FEA8 bc 4,2,0x25477FB8
+ 46: Jc02o $0x25477FB8
+
+
+. 0 254780E8 44
+. 80 D3 00 3C 3A 80 00 00 80 7C 00 10 66 89 80 00 80 1C 00 14 7D 25 48 F8 7C CC 30 F8 7C 64 28 38 7C 1C 60 38 7C 80 E3 79 40 82 FE A8
+
+==== BB 781 (0x25478114) approx BBs exec'd 0 ====
+
+ 0x25478114: 83F30038 lwz r31,56(r19)
+ 0: GETL R19, t0
+ 1: ADDL $0x38, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x25478118: 7EA7DA14 add r21,r7,r27
+ 5: GETL R7, t4
+ 6: GETL R27, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R21
+ 9: INCEIPL $4
+
+ 0x2547811C: 7F1F4000 cmp cr6,r31,r8
+ 10: GETL R31, t8
+ 11: GETL R8, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x6, CR
+ 14: INCEIPL $4
+
+ 0x25478120: 409AFE98 bc 4,26,0x25477FB8
+ 15: Jc26o $0x25477FB8
+
+
+. 0 25478114 16
+. 83 F3 00 38 7E A7 DA 14 7F 1F 40 00 40 9A FE 98
+
+==== BB 782 (0x25478124) approx BBs exec'd 0 ====
+
+ 0x25478124: 4BFFFBD0 b 0x25477CF4
+ 0: JMPo $0x25477CF4 ($4)
+
+
+. 0 25478124 4
+. 4B FF FB D0
+
+==== BB 783 (0x25477CF4) approx BBs exec'd 0 ====
+
+ 0x25477CF4: 82F30000 lwz r23,0(r19)
+ 0: GETL R19, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R23
+ 3: INCEIPL $4
+
+ 0x25477CF8: 72EB0001 andi. r11,r23,0x1
+ 4: GETL R23, t4
+ 5: ANDL $0x1, t4
+ 6: PUTL t4, R11
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x25477CFC: 408201AC bc 4,2,0x25477EA8
+ 10: Jc02o $0x25477EA8
+
+
+. 0 25477CF4 12
+. 82 F3 00 00 72 EB 00 01 40 82 01 AC
+
+==== BB 784 (0x25477D00) approx BBs exec'd 0 ====
+
+ 0x25477D00: 7EA3AB78 or r3,r21,r21
+ 0: GETL R21, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25477D04: 82610044 lwz r19,68(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x44, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R19
+ 7: INCEIPL $4
+
+ 0x25477D08: 80E10008 lwz r7,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R7
+ 12: INCEIPL $4
+
+ 0x25477D0C: 7E6803A6 mtlr r19
+ 13: GETL R19, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x25477D10: 82810010 lwz r20,16(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x10, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R20
+ 20: INCEIPL $4
+
+ 0x25477D14: 8261000C lwz r19,12(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R19
+ 25: INCEIPL $4
+
+ 0x25477D18: 7CE08120 mtcrf 0x8,r7
+ 26: GETL R7, t20
+ 27: ICRFL t20, $0x4, CR
+ 28: INCEIPL $4
+
+ 0x25477D1C: 82A10014 lwz r21,20(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x14, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R21
+ 33: INCEIPL $4
+
+ 0x25477D20: 82C10018 lwz r22,24(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x18, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R22
+ 38: INCEIPL $4
+
+ 0x25477D24: 82E1001C lwz r23,28(r1)
+ 39: GETL R1, t30
+ 40: ADDL $0x1C, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R23
+ 43: INCEIPL $4
+
+ 0x25477D28: 83010020 lwz r24,32(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x20, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R24
+ 48: INCEIPL $4
+
+ 0x25477D2C: 83210024 lwz r25,36(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x24, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R25
+ 53: INCEIPL $4
+
+ 0x25477D30: 83410028 lwz r26,40(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x28, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R26
+ 58: INCEIPL $4
+
+ 0x25477D34: 8361002C lwz r27,44(r1)
+ 59: GETL R1, t46
+ 60: ADDL $0x2C, t46
+ 61: LDL (t46), t48
+ 62: PUTL t48, R27
+ 63: INCEIPL $4
+
+ 0x25477D38: 83810030 lwz r28,48(r1)
+ 64: GETL R1, t50
+ 65: ADDL $0x30, t50
+ 66: LDL (t50), t52
+ 67: PUTL t52, R28
+ 68: INCEIPL $4
+
+ 0x25477D3C: 83A10034 lwz r29,52(r1)
+ 69: GETL R1, t54
+ 70: ADDL $0x34, t54
+ 71: LDL (t54), t56
+ 72: PUTL t56, R29
+ 73: INCEIPL $4
+
+ 0x25477D40: 83C10038 lwz r30,56(r1)
+ 74: GETL R1, t58
+ 75: ADDL $0x38, t58
+ 76: LDL (t58), t60
+ 77: PUTL t60, R30
+ 78: INCEIPL $4
+
+ 0x25477D44: 83E1003C lwz r31,60(r1)
+ 79: GETL R1, t62
+ 80: ADDL $0x3C, t62
+ 81: LDL (t62), t64
+ 82: PUTL t64, R31
+ 83: INCEIPL $4
+
+ 0x25477D48: 38210040 addi r1,r1,64
+ 84: GETL R1, t66
+ 85: ADDL $0x40, t66
+ 86: PUTL t66, R1
+ 87: INCEIPL $4
+
+ 0x25477D4C: 4E800020 blr
+ 88: GETL LR, t68
+ 89: JMPo-r t68 ($4)
+
+
+. 0 25477D00 80
+. 7E A3 AB 78 82 61 00 44 80 E1 00 08 7E 68 03 A6 82 81 00 10 82 61 00 0C 7C E0 81 20 82 A1 00 14 82 C1 00 18 82 E1 00 1C 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
+
+==== BB 785 (0x254772AC) approx BBs exec'd 0 ====
+
+ 0x254772AC: 7C721B79 or. r18,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R18
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254772B0: 7F800026 mfcr r28
+ 5: GETL CR, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x254772B4: 41820020 bc 12,2,0x254772D4
+ 8: Js02o $0x254772D4
+
+
+. 0 254772AC 12
+. 7C 72 1B 79 7F 80 00 26 41 82 00 20
+
+==== BB 786 (0x254772B8) approx BBs exec'd 0 ====
+
+ 0x254772B8: 418E017C bc 12,14,0x25477434
+ 0: Js14o $0x25477434
+
+
+. 0 254772B8 4
+. 41 8E 01 7C
+
+==== BB 787 (0x254772BC) approx BBs exec'd 0 ====
+
+ 0x254772BC: 7F69DB78 or r9,r27,r27
+ 0: GETL R27, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x254772C0: 83A901FC lwz r29,508(r9)
+ 3: GETL R9, t2
+ 4: ADDL $0x1FC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x254772C4: 73A90800 andi. r9,r29,0x800
+ 8: GETL R29, t6
+ 9: ANDL $0x800, t6
+ 10: PUTL t6, R9
+ 11: CMP0L t6, t8 (-rSo)
+ 12: ICRFL t8, $0x0, CR
+ 13: INCEIPL $4
+
+ 0x254772C8: 408201D4 bc 4,2,0x2547749C
+ 14: Jc02o $0x2547749C
+
+
+. 0 254772BC 16
+. 7F 69 DB 78 83 A9 01 FC 73 A9 08 00 40 82 01 D4
+
+==== BB 788 (0x254772CC) approx BBs exec'd 0 ====
+
+ 0x254772CC: 7F880120 mtcrf 0x80,r28
+ 0: GETL R28, t0
+ 1: ICRFL t0, $0x0, CR
+ 2: INCEIPL $4
+
+ 0x254772D0: 408200C8 bc 4,2,0x25477398
+ 3: Jc02o $0x25477398
+
+
+. 0 254772CC 8
+. 7F 88 01 20 40 82 00 C8
+
+==== BB 789 (0x25477398) approx BBs exec'd 0 ====
+
+ 0x25477398: 7E439378 or r3,r18,r18
+ 0: GETL R18, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547739C: 38810018 addi r4,r1,24
+ 3: GETL R1, t2
+ 4: ADDL $0x18, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0x254773A0: 4BFFF0A5 bl 0x25476444
+ 7: MOVL $0x254773A4, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0x25476444 ($4)
+
+
+. 0 25477398 12
+. 7E 43 93 78 38 81 00 18 4B FF F0 A5
+
+==== BB 790 (0x254765B4) approx BBs exec'd 0 ====
+
+ 0x254765B4: 80FD0010 lwz r7,16(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254765B8: 2F070020 cmpi cr6,r7,32
+ 5: GETL R7, t4
+ 6: MOVL $0x20, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x254765BC: 409AFFA0 bc 4,26,0x2547655C
+ 10: Jc26o $0x2547655C
+
+
+. 0 254765B4 12
+. 80 FD 00 10 2F 07 00 20 40 9A FF A0
+
+==== BB 791 (0x254765C0) approx BBs exec'd 0 ====
+
+ 0x254765C0: 815D001C lwz r10,28(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x254765C4: 2B8A0003 cmpli cr7,r10,3
+ 5: GETL R10, t4
+ 6: MOVL $0x3, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0x254765C8: 40BDFF94 bc 5,29,0x2547655C
+ 10: Jc29o $0x2547655C
+
+
+. 0 254765C0 12
+. 81 5D 00 1C 2B 8A 00 03 40 BD FF 94
+
+==== BB 792 (0x254765CC) approx BBs exec'd 0 ====
+
+ 0x254765CC: 819D0004 lwz r12,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x254765D0: 38A00000 li r5,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x254765D4: 81180000 lwz r8,0(r24)
+ 8: GETL R24, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R8
+ 11: INCEIPL $4
+
+ 0x254765D8: 3ABF0010 addi r21,r31,16
+ 12: GETL R31, t10
+ 13: ADDL $0x10, t10
+ 14: PUTL t10, R21
+ 15: INCEIPL $4
+
+ 0x254765DC: 380C0020 addi r0,r12,32
+ 16: GETL R12, t12
+ 17: ADDL $0x20, t12
+ 18: PUTL t12, R0
+ 19: INCEIPL $4
+
+ 0x254765E0: 7D6CC214 add r11,r12,r24
+ 20: GETL R12, t14
+ 21: GETL R24, t16
+ 22: ADDL t14, t16
+ 23: PUTL t16, R11
+ 24: INCEIPL $4
+
+ 0x254765E4: 7C004040 cmpl cr0,r0,r8
+ 25: GETL R0, t18
+ 26: GETL R8, t20
+ 27: CMPUL t18, t20, t22 (-rSo)
+ 28: ICRFL t22, $0x0, CR
+ 29: INCEIPL $4
+
+ 0x254765E8: 7F23CB78 or r3,r25,r25
+ 30: GETL R25, t24
+ 31: PUTL t24, R3
+ 32: INCEIPL $4
+
+ 0x254765EC: 7D846378 or r4,r12,r12
+ 33: GETL R12, t26
+ 34: PUTL t26, R4
+ 35: INCEIPL $4
+
+ 0x254765F0: 3B6B0004 addi r27,r11,4
+ 36: GETL R11, t28
+ 37: ADDL $0x4, t28
+ 38: PUTL t28, R27
+ 39: INCEIPL $4
+
+ 0x254765F4: 418100FC bc 12,1,0x254766F0
+ 40: Js01o $0x254766F0
+
+
+. 0 254765CC 44
+. 81 9D 00 04 38 A0 00 00 81 18 00 00 3A BF 00 10 38 0C 00 20 7D 6C C2 14 7C 00 40 40 7F 23 CB 78 7D 84 63 78 3B 6B 00 04 41 81 00 FC
+
+==== BB 793 (0x254765F8) approx BBs exec'd 0 ====
+
+ 0x254765F8: 809E0170 lwz r4,368(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x170, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254765FC: 7F63DB78 or r3,r27,r27
+ 5: GETL R27, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25476600: 38A00010 li r5,16
+ 8: MOVL $0x10, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x25476604: 4800CC95 bl 0x25483298
+ 11: MOVL $0x25476608, t8
+ 12: PUTL t8, LR
+ 13: JMPo-c $0x25483298 ($4)
+
+
+. 0 254765F8 16
+. 80 9E 01 70 7F 63 DB 78 38 A0 00 10 48 00 CC 95
+
+==== BB 794 (0x25483310) approx BBs exec'd 0 ====
+
+ 0x25483310: 28000001 cmpli cr0,r0,1
+ 0: GETL R0, t0
+ 1: MOVL $0x1, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25483314: 41800228 bc 12,0,0x2548353C
+ 5: Js00o $0x2548353C
+
+
+. 0 25483310 8
+. 28 00 00 01 41 80 02 28
+
+==== BB 795 (0x2548353C) approx BBs exec'd 0 ====
+
+ 0x2548353C: 80EB0000 lwz r7,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25483540: 80040000 lwz r0,0(r4)
+ 4: GETL R4, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0x25483544: 7F870000 cmp cr7,r7,r0
+ 8: GETL R7, t8
+ 9: GETL R0, t10
+ 10: CMPL t8, t10, t12 (-rSo)
+ 11: ICRFL t12, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x25483548: 806A0004 lwz r3,4(r10)
+ 13: GETL R10, t14
+ 14: ADDL $0x4, t14
+ 15: LDL (t14), t16
+ 16: PUTL t16, R3
+ 17: INCEIPL $4
+
+ 0x2548354C: 80C90004 lwz r6,4(r9)
+ 18: GETL R9, t18
+ 19: ADDL $0x4, t18
+ 20: LDL (t18), t20
+ 21: PUTL t20, R6
+ 22: INCEIPL $4
+
+ 0x25483550: 409EFDF4 bc 4,30,0x25483344
+ 23: Jc30o $0x25483344
+
+
+. 0 2548353C 24
+. 80 EB 00 00 80 04 00 00 7F 87 00 00 80 6A 00 04 80 C9 00 04 40 9E FD F4
+
+==== BB 796 (0x25476608) approx BBs exec'd 0 ====
+
+ 0x25476608: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547660C: 419A0084 bc 12,26,0x25476690
+ 4: Js26o $0x25476690
+
+
+. 0 25476608 8
+. 2F 03 00 00 41 9A 00 84
+
+==== BB 797 (0x25476690) approx BBs exec'd 0 ====
+
+ 0x25476690: 813B0010 lwz r9,16(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25476694: 8B5B0017 lbz r26,23(r27)
+ 5: GETL R27, t4
+ 6: ADDL $0x17, t4
+ 7: LDB (t4), t6
+ 8: PUTL t6, R26
+ 9: INCEIPL $4
+
+ 0x25476698: 8BBB001B lbz r29,27(r27)
+ 10: GETL R27, t8
+ 11: ADDL $0x1B, t8
+ 12: LDB (t8), t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0x2547669C: 2F890000 cmpi cr7,r9,0
+ 15: GETL R9, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x254766A0: 5755402E rlwinm r21,r26,8,0,23
+ 19: GETL R26, t16
+ 20: SHLL $0x8, t16
+ 21: PUTL t16, R21
+ 22: INCEIPL $4
+
+ 0x254766A4: 8B1B001F lbz r24,31(r27)
+ 23: GETL R27, t18
+ 24: ADDL $0x1F, t18
+ 25: LDB (t18), t20
+ 26: PUTL t20, R24
+ 27: INCEIPL $4
+
+ 0x254766A8: 7F95EA14 add r28,r21,r29
+ 28: GETL R21, t22
+ 29: GETL R29, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R28
+ 32: INCEIPL $4
+
+ 0x254766AC: 5796402E rlwinm r22,r28,8,0,23
+ 33: GETL R28, t26
+ 34: SHLL $0x8, t26
+ 35: PUTL t26, R22
+ 36: INCEIPL $4
+
+ 0x254766B0: 7C16C214 add r0,r22,r24
+ 37: GETL R22, t28
+ 38: GETL R24, t30
+ 39: ADDL t28, t30
+ 40: PUTL t30, R0
+ 41: INCEIPL $4
+
+ 0x254766B4: 409E001C bc 4,30,0x254766D0
+ 42: Jc30o $0x254766D0
+
+
+. 0 25476690 40
+. 81 3B 00 10 8B 5B 00 17 8B BB 00 1B 2F 89 00 00 57 55 40 2E 8B 1B 00 1F 7F 95 EA 14 57 96 40 2E 7C 16 C2 14 40 9E 00 1C
+
+==== BB 798 (0x254766B8) approx BBs exec'd 0 ====
+
+ 0x254766B8: 807E04F4 lwz r3,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254766BC: 81230008 lwz r9,8(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x254766C0: 2C090000 cmpi cr0,r9,0
+ 10: GETL R9, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x0, CR
+ 13: INCEIPL $4
+
+ 0x254766C4: 41A2FEAC bc 13,2,0x25476570
+ 14: Js02o $0x25476570
+
+
+. 0 254766B8 16
+. 80 7E 04 F4 81 23 00 08 2C 09 00 00 41 A2 FE AC
+
+==== BB 799 (0x254766C8) approx BBs exec'd 0 ====
+
+ 0x254766C8: 7C890040 cmpl cr1,r9,r0
+ 0: GETL R9, t0
+ 1: GETL R0, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254766CC: 40A4FEA4 bc 5,4,0x25476570
+ 5: Jc04o $0x25476570
+
+
+. 0 254766C8 8
+. 7C 89 00 40 40 A4 FE A4
+
+==== BB 800 (0x254773A4) approx BBs exec'd 0 ====
+
+ 0x254773A4: 2E03FFFF cmpi cr4,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x4, CR
+ 4: INCEIPL $4
+
+ 0x254773A8: 7C7A1B78 or r26,r3,r3
+ 5: GETL R3, t6
+ 6: PUTL t6, R26
+ 7: INCEIPL $4
+
+ 0x254773AC: 41B2FF2C bc 13,18,0x254772D8
+ 8: Js18o $0x254772D8
+
+
+. 0 254773A4 12
+. 2E 03 FF FF 7C 7A 1B 78 41 B2 FF 2C
+
+==== BB 801 (0x254773B0) approx BBs exec'd 0 ====
+
+ 0x254773B0: 7E439378 or r3,r18,r18
+ 0: GETL R18, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x254773B4: 4800BC1D bl 0x25482FD0
+ 3: MOVL $0x254773B8, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25482FD0 ($4)
+
+
+. 0 254773B0 8
+. 7E 43 93 78 48 00 BC 1D
+
+==== BB 802 (0x254773B8) approx BBs exec'd 0 ====
+
+ 0x254773B8: 3BA30001 addi r29,r3,1
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x254773BC: 7FA3EB78 or r3,r29,r29
+ 4: GETL R29, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0x254773C0: 48020665 bl 0x25497A24
+ 7: MOVL $0x254773C4, t4
+ 8: PUTL t4, LR
+ 9: JMPo-c $0x25497A24 ($4)
+
+
+. 0 254773B8 12
+. 3B A3 00 01 7F A3 EB 78 48 02 06 65
+
+==== BB 803 (0x254773C4) approx BBs exec'd 0 ====
+
+ 0x254773C4: 38000000 li r0,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254773C8: 2F030000 cmpi cr6,r3,0
+ 3: GETL R3, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x6, CR
+ 6: INCEIPL $4
+
+ 0x254773CC: 419A0014 bc 12,26,0x254773E0
+ 7: Js26o $0x254773E0
+
+
+. 0 254773C4 12
+. 38 00 00 00 2F 03 00 00 41 9A 00 14
+
+==== BB 804 (0x254773D0) approx BBs exec'd 0 ====
+
+ 0x254773D0: 7E449378 or r4,r18,r18
+ 0: GETL R18, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254773D4: 7FA5EB78 or r5,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x254773D8: 4800C809 bl 0x25483BE0
+ 6: MOVL $0x254773DC, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25483BE0 ($4)
+
+
+. 0 254773D0 12
+. 7E 44 93 78 7F A5 EB 78 48 00 C8 09
+
+==== BB 805 (0x25483C74) approx BBs exec'd 0 ====
+
+ 0x25483C74: 88FD0000 lbz r7,0(r29)
+ 0: GETL R29, t0
+ 1: LDB (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25483C78: 3BBD0001 addi r29,r29,1
+ 4: GETL R29, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25483C7C: 98FF0000 stb r7,0(r31)
+ 8: GETL R7, t6
+ 9: GETL R31, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25483C80: 3BFF0001 addi r31,r31,1
+ 12: GETL R31, t10
+ 13: ADDL $0x1, t10
+ 14: PUTL t10, R31
+ 15: INCEIPL $4
+
+ 0x25483C84: 4200FFF0 bc 16,0,0x25483C74
+ 16: GETL CTR, t12
+ 17: ADDL $0xFFFFFFFF, t12
+ 18: PUTL t12, CTR
+ 19: JIFZL t12, $0x25483C88
+ 20: JMPo $0x25483C74 ($4)
+
+
+. 0 25483C74 20
+. 88 FD 00 00 3B BD 00 01 98 FF 00 00 3B FF 00 01 42 00 FF F0
+
+==== BB 806 (0x254773DC) approx BBs exec'd 0 ====
+
+ 0x254773DC: 7C601B78 or r0,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254773E0: 2F800000 cmpi cr7,r0,0
+ 3: GETL R0, t2
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x7, CR
+ 6: INCEIPL $4
+
+ 0x254773E4: 90010228 stw r0,552(r1)
+ 7: GETL R0, t6
+ 8: GETL R1, t8
+ 9: ADDL $0x228, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x254773E8: 409EFEEC bc 4,30,0x254772D4
+ 12: Jc30o $0x254772D4
+
+
+. 0 254773DC 16
+. 7C 60 1B 78 2F 80 00 00 90 01 02 28 40 9E FE EC
+
+==== BB 807 (0x254772D4) approx BBs exec'd 0 ====
+
+ 0x254772D4: 40920050 bc 4,18,0x25477324
+ 0: Jc18o $0x25477324
+
+
+. 0 254772D4 4
+. 40 92 00 50
+
+==== BB 808 (0x25477324) approx BBs exec'd 0 ====
+
+ 0x25477324: 82F40000 lwz r23,0(r20)
+ 0: GETL R20, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R23
+ 3: INCEIPL $4
+
+ 0x25477328: 72E90001 andi. r9,r23,0x1
+ 4: GETL R23, t4
+ 5: ANDL $0x1, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547732C: 4182FAD8 bc 12,2,0x25476E04
+ 10: Js02o $0x25476E04
+
+
+. 0 25477324 12
+. 82 F4 00 00 72 E9 00 01 41 82 FA D8
+
+==== BB 809 (0x254758A8) approx BBs exec'd 0 ====
+
+ 0x254758A8: 54EF2834 rlwinm r15,r7,5,0,26
+ 0: GETL R7, t0
+ 1: SHLL $0x5, t0
+ 2: PUTL t0, R15
+ 3: INCEIPL $4
+
+ 0x254758AC: 801D0008 lwz r0,8(r29)
+ 4: GETL R29, t2
+ 5: ADDL $0x8, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254758B0: 7DCFDA14 add r14,r15,r27
+ 9: GETL R15, t6
+ 10: GETL R27, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R14
+ 13: INCEIPL $4
+
+ 0x254758B4: 3BBD0020 addi r29,r29,32
+ 14: GETL R29, t10
+ 15: ADDL $0x20, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0x254758B8: 7C8EE840 cmpl cr1,r14,r29
+ 18: GETL R14, t12
+ 19: GETL R29, t14
+ 20: CMPUL t12, t14, t16 (-rSo)
+ 21: ICRFL t16, $0x1, CR
+ 22: INCEIPL $4
+
+ 0x254758BC: 901A014C stw r0,332(r26)
+ 23: GETL R0, t18
+ 24: GETL R26, t20
+ 25: ADDL $0x14C, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0x254758C0: 4185FF4C bc 12,5,0x2547580C
+ 28: Js05o $0x2547580C
+
+
+. 0 254758A8 28
+. 54 EF 28 34 80 1D 00 08 7D CF DA 14 3B BD 00 20 7C 8E E8 40 90 1A 01 4C 41 85 FF 4C
+
+==== BB 810 (0x25475830) approx BBs exec'd 0 ====
+
+ 0x25475830: 7F090040 cmpl cr6,r9,r0
+ 0: GETL R9, t0
+ 1: GETL R0, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25475834: 4199024C bc 12,25,0x25475A80
+ 5: Js25o $0x25475A80
+
+
+. 0 25475830 8
+. 7F 09 00 40 41 99 02 4C
+
+==== BB 811 (0x25475838) approx BBs exec'd 0 ====
+
+ 0x25475838: 2C090007 cmpi cr0,r9,7
+ 0: GETL R9, t0
+ 1: MOVL $0x7, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547583C: 4082FFBC bc 4,2,0x254757F8
+ 5: Jc02o $0x254757F8
+
+
+. 0 25475838 8
+. 2C 09 00 07 40 82 FF BC
+
+==== BB 812 (0x25475840) approx BBs exec'd 0 ====
+
+ 0x25475840: 801D0014 lwz r0,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475844: 2F000000 cmpi cr6,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25475848: 41BAFFB0 bc 13,26,0x254757F8
+ 9: Js26o $0x254757F8
+
+
+. 0 25475840 12
+. 80 1D 00 14 2F 00 00 00 41 BA FF B0
+
+==== BB 813 (0x2547584C) approx BBs exec'd 0 ====
+
+ 0x2547584C: 901A0220 stw r0,544(r26)
+ 0: GETL R0, t0
+ 1: GETL R26, t2
+ 2: ADDL $0x220, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25475850: 817D001C lwz r11,28(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x1C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0x25475854: 917A0224 stw r11,548(r26)
+ 10: GETL R11, t8
+ 11: GETL R26, t10
+ 12: ADDL $0x224, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25475858: 813D001C lwz r9,28(r29)
+ 15: GETL R29, t12
+ 16: ADDL $0x1C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x2547585C: 2F890000 cmpi cr7,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x7, CR
+ 23: INCEIPL $4
+
+ 0x25475860: 419E07EC bc 12,30,0x2547604C
+ 24: Js30o $0x2547604C
+
+
+. 0 2547584C 24
+. 90 1A 02 20 81 7D 00 1C 91 7A 02 24 81 3D 00 1C 2F 89 00 00 41 9E 07 EC
+
+==== BB 814 (0x25475864) approx BBs exec'd 0 ====
+
+ 0x25475864: 80BD0008 lwz r5,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25475868: 3929FFFF addi r9,r9,-1
+ 5: GETL R9, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x2547586C: 7CA04838 and r0,r5,r9
+ 9: GETL R5, t6
+ 10: GETL R9, t8
+ 11: ANDL t6, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x25475870: 901A0228 stw r0,552(r26)
+ 14: GETL R0, t10
+ 15: GETL R26, t12
+ 16: ADDL $0x228, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x25475874: 81DA0180 lwz r14,384(r26)
+ 19: GETL R26, t14
+ 20: ADDL $0x180, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R14
+ 23: INCEIPL $4
+
+ 0x25475878: 3CC04000 lis r6,16384
+ 24: MOVL $0x40000000, t18
+ 25: PUTL t18, R6
+ 26: INCEIPL $4
+
+ 0x2547587C: 815D0010 lwz r10,16(r29)
+ 27: GETL R29, t20
+ 28: ADDL $0x10, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R10
+ 31: INCEIPL $4
+
+ 0x25475880: 55C80002 rlwinm r8,r14,0,0,1
+ 32: GETL R14, t24
+ 33: ANDL $0xC0000000, t24
+ 34: PUTL t24, R8
+ 35: INCEIPL $4
+
+ 0x25475884: 7C083000 cmp cr0,r8,r6
+ 36: GETL R8, t26
+ 37: GETL R6, t28
+ 38: CMPL t26, t28, t30 (-rSo)
+ 39: ICRFL t30, $0x0, CR
+ 40: INCEIPL $4
+
+ 0x25475888: 915A021C stw r10,540(r26)
+ 41: GETL R10, t32
+ 42: GETL R26, t34
+ 43: ADDL $0x21C, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0x2547588C: 809D0008 lwz r4,8(r29)
+ 46: GETL R29, t36
+ 47: ADDL $0x8, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R4
+ 50: INCEIPL $4
+
+ 0x25475890: 909A0218 stw r4,536(r26)
+ 51: GETL R4, t40
+ 52: GETL R26, t42
+ 53: ADDL $0x218, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0x25475894: 40820A24 bc 4,2,0x254762B8
+ 56: Jc02o $0x254762B8
+
+
+. 0 25475864 52
+. 80 BD 00 08 39 29 FF FF 7C A0 48 38 90 1A 02 28 81 DA 01 80 3C C0 40 00 81 5D 00 10 55 C8 00 02 7C 08 30 00 91 5A 02 1C 80 9D 00 08 90 9A 02 18 40 82 0A 24
+
+==== BB 815 (0x25475898) approx BBs exec'd 0 ====
+
+ 0x25475898: 4800837D bl 0x2547DC14
+ 0: MOVL $0x2547589C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547DC14 ($4)
+
+
+. 0 25475898 4
+. 48 00 83 7D
+
+==== BB 816 _dl_next_tls_modid(0x2547DC14) approx BBs exec'd 0 ====
+
+ 0x2547DC14: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547DC18: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x2547DC1C: 480193E5 bl 0x25497000
+ 9: MOVL $0x2547DC20, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547DC14 12
+. 94 21 FF F0 7D 88 02 A6 48 01 93 E5
+
+==== BB 817 (0x2547DC20) approx BBs exec'd 0 ====
+
+ 0x2547DC20: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547DC24: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547DC28: 7D8803A6 mtlr r12
+ 8: GETL R12, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0x2547DC2C: 80DE04C8 lwz r6,1224(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x4C8, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x2547DC30: 8806040C lbz r0,1036(r6)
+ 16: GETL R6, t12
+ 17: ADDL $0x40C, t12
+ 18: LDB (t12), t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0x2547DC34: 2F800000 cmpi cr7,r0,0
+ 21: GETL R0, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x2547DC38: 409E0020 bc 4,30,0x2547DC58
+ 25: Jc30o $0x2547DC58
+
+
+. 0 2547DC20 28
+. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 80 DE 04 C8 88 06 04 0C 2F 80 00 00 40 9E 00 20
+
+==== BB 818 (0x2547DC3C) approx BBs exec'd 0 ====
+
+ 0x2547DC3C: 81460408 lwz r10,1032(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0x408, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547DC40: 390A0001 addi r8,r10,1
+ 5: GETL R10, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x2547DC44: 91060408 stw r8,1032(r6)
+ 9: GETL R8, t6
+ 10: GETL R6, t8
+ 11: ADDL $0x408, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547DC48: 7D034378 or r3,r8,r8
+ 14: GETL R8, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0x2547DC4C: 83C10008 lwz r30,8(r1)
+ 17: GETL R1, t12
+ 18: ADDL $0x8, t12
+ 19: LDL (t12), t14
+ 20: PUTL t14, R30
+ 21: INCEIPL $4
+
+ 0x2547DC50: 38210010 addi r1,r1,16
+ 22: GETL R1, t16
+ 23: ADDL $0x10, t16
+ 24: PUTL t16, R1
+ 25: INCEIPL $4
+
+ 0x2547DC54: 4E800020 blr
+ 26: GETL LR, t18
+ 27: JMPo-r t18 ($4)
+
+
+. 0 2547DC3C 28
+. 81 46 04 08 39 0A 00 01 91 06 04 08 7D 03 43 78 83 C1 00 08 38 21 00 10 4E 80 00 20
+
+==== BB 819 (0x2547589C) approx BBs exec'd 0 ====
+
+ 0x2547589C: A0FA0154 lhz r7,340(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x154, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254758A0: 907A0230 stw r3,560(r26)
+ 5: GETL R3, t4
+ 6: GETL R26, t6
+ 7: ADDL $0x230, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x254758A4: 4BFFFF54 b 0x254757F8
+ 10: JMPo $0x254757F8 ($4)
+
+
+. 0 2547589C 12
+. A0 FA 01 54 90 7A 02 30 4B FF FF 54
+
+==== BB 820 (0x25475A80) approx BBs exec'd 0 ====
+
+ 0x25475A80: 3D406474 lis r10,25716
+ 0: MOVL $0x64740000, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x25475A84: 614FE552 ori r15,r10,0xE552
+ 3: MOVL $0x6474E552, t2
+ 4: PUTL t2, R15
+ 5: INCEIPL $4
+
+ 0x25475A88: 7F897800 cmp cr7,r9,r15
+ 6: GETL R9, t4
+ 7: GETL R15, t6
+ 8: CMPL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x25475A8C: 409EFD6C bc 4,30,0x254757F8
+ 11: Jc30o $0x254757F8
+
+
+. 0 25475A80 16
+. 3D 40 64 74 61 4F E5 52 7F 89 78 00 40 9E FD 6C
+
+==== BB 821 (0x25475A90) approx BBs exec'd 0 ====
+
+ 0x25475A90: 811D0008 lwz r8,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25475A94: 911A0234 stw r8,564(r26)
+ 5: GETL R8, t4
+ 6: GETL R26, t6
+ 7: ADDL $0x234, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25475A98: 80DD0014 lwz r6,20(r29)
+ 10: GETL R29, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R6
+ 14: INCEIPL $4
+
+ 0x25475A9C: 90DA0238 stw r6,568(r26)
+ 15: GETL R6, t12
+ 16: GETL R26, t14
+ 17: ADDL $0x238, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25475AA0: 4BFFFD58 b 0x254757F8
+ 20: JMPo $0x254757F8 ($4)
+
+
+. 0 25475A90 20
+. 81 1D 00 08 91 1A 02 34 80 DD 00 14 90 DA 02 38 4B FF FD 58
+
+==9225== Reading syms from /lib/tls/libc-2.3.4.so (0xFE80000)
+==9225== object doesn't have any debug info
+==== BB 822 (0x254759E0) approx BBs exec'd 0 ====
+
+ 0x254759E0: 7C9CC840 cmpl cr1,r28,r25
+ 0: GETL R28, t0
+ 1: GETL R25, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254759E4: 4085002C bc 4,5,0x25475A10
+ 5: Jc05o $0x25475A10
+
+
+. 0 254759E0 8
+. 7C 9C C8 40 40 85 00 2C
+
+==== BB 823 (0x254837B0) approx BBs exec'd 0 ====
+
+ 0x254837B0: 9088FFFC stw r4,-4(r8)
+ 0: GETL R4, t0
+ 1: GETL R8, t2
+ 2: ADDL $0xFFFFFFFC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254837B4: 9488FFF8 stwu r4,-8(r8)
+ 5: GETL R4, t4
+ 6: GETL R8, t6
+ 7: ADDL $0xFFFFFFF8, t6
+ 8: PUTL t6, R8
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x254837B8: 41840014 bc 12,4,0x254837CC
+ 11: Js04o $0x254837CC
+
+
+. 0 254837B0 12
+. 90 88 FF FC 94 88 FF F8 41 84 00 14
+
+==== BB 824 (0x254837D4) approx BBs exec'd 0 ====
+
+ 0x254837D4: 28840000 cmpli cr1,r4,0
+ 0: GETL R4, t0
+ 1: MOVL $0x0, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254837D8: 54A70035 rlwinm. r7,r5,0,0,26
+ 5: GETL R5, t6
+ 6: ANDL $0xFFFFFFE0, t6
+ 7: PUTL t6, R7
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x254837DC: 7CA01120 mtcrf 0x1,r5
+ 11: GETL R5, t10
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x254837E0: 418601A0 bc 12,6,0x25483980
+ 14: Js06o $0x25483980
+
+
+. 0 254837D4 16
+. 28 84 00 00 54 A7 00 35 7C A0 11 20 41 86 01 A0
+
+==== BB 825 (0x25483884) approx BBs exec'd 0 ====
+
+ 0x25483884: 7C0037EC dcbz r0,r6
+ 0: GETL R6, t0
+ 1: ANDL $0xFFFFFFE0, t0
+ 2: MOVL $0x0, t2
+ 3: STL t2, (t0)
+ 4: ADDL $0x4, t0
+ 5: STL t2, (t0)
+ 6: ADDL $0x4, t0
+ 7: STL t2, (t0)
+ 8: ADDL $0x4, t0
+ 9: STL t2, (t0)
+ 10: ADDL $0x4, t0
+ 11: STL t2, (t0)
+ 12: ADDL $0x4, t0
+ 13: STL t2, (t0)
+ 14: ADDL $0x4, t0
+ 15: STL t2, (t0)
+ 16: ADDL $0x4, t0
+ 17: STL t2, (t0)
+ 18: INCEIPL $4
+
+ 0x25483888: 38C60020 addi r6,r6,32
+ 19: GETL R6, t4
+ 20: ADDL $0x20, t4
+ 21: PUTL t4, R6
+ 22: INCEIPL $4
+
+ 0x2548388C: 3920FFE0 li r9,-32
+ 23: MOVL $0xFFFFFFE0, t6
+ 24: PUTL t6, R9
+ 25: INCEIPL $4
+
+ 0x25483890: 40990010 bc 4,25,0x254838A0
+ 26: Jc25o $0x254838A0
+
+
+. 0 25483884 16
+. 7C 00 37 EC 38 C6 00 20 39 20 FF E0 40 99 00 10
+
+==== BB 826 (0x254760C0) approx BBs exec'd 0 ====
+
+ 0x254760C0: 80BD0014 lwz r5,20(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x254760C4: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254760C8: 7C9CB850 subf r4,r28,r23
+ 8: GETL R28, t6
+ 9: GETL R23, t8
+ 10: SUBL t6, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x254760CC: 38C00032 li r6,50
+ 13: MOVL $0x32, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x254760D0: 38E0FFFF li r7,-1
+ 16: MOVL $0xFFFFFFFF, t12
+ 17: PUTL t12, R7
+ 18: INCEIPL $4
+
+ 0x254760D4: 39000000 li r8,0
+ 19: MOVL $0x0, t14
+ 20: PUTL t14, R8
+ 21: INCEIPL $4
+
+ 0x254760D8: 4800C6C1 bl 0x25482798
+ 22: MOVL $0x254760DC, t16
+ 23: PUTL t16, LR
+ 24: JMPo-c $0x25482798 ($4)
+
+
+. 0 254760C0 28
+. 80 BD 00 14 7F 83 E3 78 7C 9C B8 50 38 C0 00 32 38 E0 FF FF 39 00 00 00 48 00 C6 C1
+
+==== BB 827 (0x254760DC) approx BBs exec'd 0 ====
+
+ 0x254760DC: 2C83FFFF cmpi cr1,r3,-1
+ 0: GETL R3, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x254760E0: 4086F938 bc 4,6,0x25475A18
+ 5: Jc06o $0x25475A18
+
+
+. 0 254760DC 8
+. 2C 83 FF FF 40 86 F9 38
+
+==== BB 828 (0x25476054) approx BBs exec'd 0 ====
+
+ 0x25476054: 556C083C rlwinm r12,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0x25476058: 7D800E70 srawi r0,r12,1
+ 4: GETL R12, t2
+ 5: SARL $0x1, t2 (-wCa)
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0x2547605C: 7C1700F8 nor r23,r0,r0
+ 8: GETL R0, t4
+ 9: NOTL t4
+ 10: PUTL t4, R23
+ 11: INCEIPL $4
+
+ 0x25476060: 20000031 subfic r0,r0,49
+ 12: GETL R0, t6
+ 13: MOVL $0x31, t8
+ 14: SBBL t6, t8 (-wCa)
+ 15: PUTL t8, R0
+ 16: INCEIPL $4
+
+ 0x25476064: 2B170002 cmpli cr6,r23,2
+ 17: GETL R23, t10
+ 18: MOVL $0x2, t14
+ 19: CMPUL t10, t14, t12 (-rSo)
+ 20: ICRFL t12, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x25476068: 40B9FC38 bc 5,25,0x25475CA0
+ 22: Jc25o $0x25475CA0
+
+
+. 0 25476054 24
+. 55 6C 08 3C 7D 80 0E 70 7C 17 00 F8 20 00 00 31 2B 17 00 02 40 B9 FC 38
+
+==== BB 829 (0x2547606C) approx BBs exec'd 0 ====
+
+ 0x2547606C: 7F2B2850 subf r25,r11,r5
+ 0: GETL R11, t0
+ 1: GETL R5, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x25476070: 2A19000B cmpli cr4,r25,11
+ 5: GETL R25, t4
+ 6: MOVL $0xB, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x4, CR
+ 9: INCEIPL $4
+
+ 0x25476074: 419100C4 bc 12,17,0x25476138
+ 10: Js17o $0x25476138
+
+
+. 0 2547606C 12
+. 7F 2B 28 50 2A 19 00 0B 41 91 00 C4
+
+==== BB 830 (0x25476078) approx BBs exec'd 0 ====
+
+ 0x25476078: 7C0B2050 subf r0,r11,r4
+ 0: GETL R11, t0
+ 1: GETL R4, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547607C: 5400103A rlwinm r0,r0,2,0,29
+ 5: GETL R0, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25476080: 4BFFFC24 b 0x25475CA4
+ 9: JMPo $0x25475CA4 ($4)
+
+
+. 0 25476078 12
+. 7C 0B 20 50 54 00 10 3A 4B FF FC 24
+
+==== BB 831 (0x25475D68) approx BBs exec'd 0 ====
+
+ 0x25475D68: 81280078 lwz r9,120(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x78, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25475D6C: 2C090000 cmpi cr0,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25475D70: 41820030 bc 12,2,0x25475DA0
+ 9: Js02o $0x25475DA0
+
+
+. 0 25475D68 12
+. 81 28 00 78 2C 09 00 00 41 82 00 30
+
+==== BB 832 (0x25475D74) approx BBs exec'd 0 ====
+
+ 0x25475D74: 80090004 lwz r0,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25475D78: 700A0002 andi. r10,r0,0x2
+ 5: GETL R0, t4
+ 6: ANDL $0x2, t4
+ 7: PUTL t4, R10
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25475D7C: 901A0200 stw r0,512(r26)
+ 11: GETL R0, t8
+ 12: GETL R26, t10
+ 13: ADDL $0x200, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x25475D80: 41820008 bc 12,2,0x25475D88
+ 16: Js02o $0x25475D88
+
+
+. 0 25475D74 16
+. 80 09 00 04 70 0A 00 02 90 1A 02 00 41 82 00 08
+
+==== BB 833 (0x25475D88) approx BBs exec'd 0 ====
+
+ 0x25475D88: 700B0004 andi. r11,r0,0x4
+ 0: GETL R0, t0
+ 1: ANDL $0x4, t0
+ 2: PUTL t0, R11
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25475D8C: 41820008 bc 12,2,0x25475D94
+ 6: Js02o $0x25475D94
+
+
+. 0 25475D88 8
+. 70 0B 00 04 41 82 00 08
+
+==== BB 834 (0x25475D94) approx BBs exec'd 0 ====
+
+ 0x25475D94: 700A0008 andi. r10,r0,0x8
+ 0: GETL R0, t0
+ 1: ANDL $0x8, t0
+ 2: PUTL t0, R10
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25475D98: 41820008 bc 12,2,0x25475DA0
+ 6: Js02o $0x25475DA0
+
+
+. 0 25475D94 8
+. 70 0A 00 08 41 82 00 08
+
+==== BB 835 (0x25475D9C) approx BBs exec'd 0 ====
+
+ 0x25475D9C: 91280060 stw r9,96(r8)
+ 0: GETL R9, t0
+ 1: GETL R8, t2
+ 2: ADDL $0x60, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25475DA0: 81280098 lwz r9,152(r8)
+ 5: GETL R8, t4
+ 6: ADDL $0x98, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25475DA4: 2F890000 cmpi cr7,r9,0
+ 10: GETL R9, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25475DA8: 419E0354 bc 12,30,0x254760FC
+ 14: Js30o $0x254760FC
+
+
+. 0 25475D9C 16
+. 91 28 00 60 81 28 00 98 2F 89 00 00 41 9E 03 54
+
+==== BB 836 (0x25475DBC) approx BBs exec'd 0 ====
+
+ 0x25475DBC: 91280060 stw r9,96(r8)
+ 0: GETL R9, t0
+ 1: GETL R8, t2
+ 2: ADDL $0x60, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25475DC0: 81280074 lwz r9,116(r8)
+ 5: GETL R8, t4
+ 6: ADDL $0x74, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25475DC4: 2C890000 cmpi cr1,r9,0
+ 10: GETL R9, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x25475DC8: 418600E0 bc 12,6,0x25475EA8
+ 14: Js06o $0x25475EA8
+
+
+. 0 25475DBC 16
+. 91 28 00 60 81 28 00 74 2C 89 00 00 41 86 00 E0
+
+==== BB 837 (0x25475EEC) approx BBs exec'd 0 ====
+
+ 0x25475EEC: 80DA0000 lwz r6,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x25475EF0: 7D493214 add r10,r9,r6
+ 4: GETL R9, t4
+ 5: GETL R6, t6
+ 6: ADDL t4, t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0x25475EF4: 915A0218 stw r10,536(r26)
+ 9: GETL R10, t8
+ 10: GETL R26, t10
+ 11: ADDL $0x218, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25475EF8: 7E639B78 or r3,r19,r19
+ 14: GETL R19, t12
+ 15: PUTL t12, R3
+ 16: INCEIPL $4
+
+ 0x25475EFC: 4800C0F5 bl 0x25481FF0
+ 17: MOVL $0x25475F00, t14
+ 18: PUTL t14, LR
+ 19: JMPo-c $0x25481FF0 ($4)
+
+
+. 0 25475EEC 20
+. 80 DA 00 00 7D 49 32 14 91 5A 02 18 7E 63 9B 78 48 00 C0 F5
+
+==== BB 838 (0x25475F88) approx BBs exec'd 0 ====
+
+ 0x25475F88: 80910050 lwz r4,80(r17)
+ 0: GETL R17, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25475F8C: C81F0028 lfd f0,40(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x28, t4
+ 7: FPU_RQ (t4), 0x0:0x0
+ 8: INCEIPL $4
+
+ 0x25475F90: 2C840000 cmpi cr1,r4,0
+ 9: GETL R4, t6
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x1, CR
+ 12: INCEIPL $4
+
+ 0x25475F94: D81A01D0 stfd f0,464(r26)
+ 13: GETL R26, t10
+ 14: ADDL $0x1D0, t10
+ 15: FPU_WQ 0x0:0x0, (t10)
+ 16: INCEIPL $4
+
+ 0x25475F98: C9BF0030 lfd f13,48(r31)
+ 17: GETL R31, t12
+ 18: ADDL $0x30, t12
+ 19: FPU_RQ (t12), 0x0:0xD
+ 20: INCEIPL $4
+
+ 0x25475F9C: D9BA01D8 stfd f13,472(r26)
+ 21: GETL R26, t14
+ 22: ADDL $0x1D8, t14
+ 23: FPU_WQ 0x0:0xD, (t14)
+ 24: INCEIPL $4
+
+ 0x25475FA0: 4186FEB0 bc 12,6,0x25475E50
+ 25: Js06o $0x25475E50
+
+
+. 0 25475F88 28
+. 80 91 00 50 C8 1F 00 28 2C 84 00 00 D8 1A 01 D0 C9 BF 00 30 D9 BA 01 D8 41 86 FE B0
+
+==== BB 839 (0x2547A100) approx BBs exec'd 0 ====
+
+ 0x2547A100: 907F0014 stw r3,20(r31)
+ 0: GETL R3, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547A104: 80610014 lwz r3,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547A108: 83E10008 lwz r31,8(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0x2547A10C: 38210010 addi r1,r1,16
+ 15: GETL R1, t12
+ 16: ADDL $0x10, t12
+ 17: PUTL t12, R1
+ 18: INCEIPL $4
+
+ 0x2547A110: 7C6803A6 mtlr r3
+ 19: GETL R3, t14
+ 20: PUTL t14, LR
+ 21: INCEIPL $4
+
+ 0x2547A114: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+. 0 2547A100 24
+. 90 7F 00 14 80 61 00 14 83 E1 00 08 38 21 00 10 7C 68 03 A6 4E 80 00 20
+
+==== BB 840 (0x2547B624) approx BBs exec'd 0 ====
+
+ 0x2547B624: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547B628: 81610008 lwz r11,8(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x2547B62C: 80C10280 lwz r6,640(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x280, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R6
+ 12: INCEIPL $4
+
+ 0x2547B630: 80A10270 lwz r5,624(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x270, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R5
+ 17: INCEIPL $4
+
+ 0x2547B634: 80810274 lwz r4,628(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x274, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R4
+ 22: INCEIPL $4
+
+ 0x2547B638: 93E50000 stw r31,0(r5)
+ 23: GETL R31, t18
+ 24: GETL R5, t20
+ 25: STL t18, (t20)
+ 26: INCEIPL $4
+
+ 0x2547B63C: 91660000 stw r11,0(r6)
+ 27: GETL R11, t22
+ 28: GETL R6, t24
+ 29: STL t22, (t24)
+ 30: INCEIPL $4
+
+ 0x2547B640: 93E40000 stw r31,0(r4)
+ 31: GETL R31, t26
+ 32: GETL R4, t28
+ 33: STL t26, (t28)
+ 34: INCEIPL $4
+
+ 0x2547B644: 814102A4 lwz r10,676(r1)
+ 35: GETL R1, t30
+ 36: ADDL $0x2A4, t30
+ 37: LDL (t30), t32
+ 38: PUTL t32, R10
+ 39: INCEIPL $4
+
+ 0x2547B648: 83C10298 lwz r30,664(r1)
+ 40: GETL R1, t34
+ 41: ADDL $0x298, t34
+ 42: LDL (t34), t36
+ 43: PUTL t36, R30
+ 44: INCEIPL $4
+
+ 0x2547B64C: 83E1029C lwz r31,668(r1)
+ 45: GETL R1, t38
+ 46: ADDL $0x29C, t38
+ 47: LDL (t38), t40
+ 48: PUTL t40, R31
+ 49: INCEIPL $4
+
+ 0x2547B650: 7D4803A6 mtlr r10
+ 50: GETL R10, t42
+ 51: PUTL t42, LR
+ 52: INCEIPL $4
+
+ 0x2547B654: 382102A0 addi r1,r1,672
+ 53: GETL R1, t44
+ 54: ADDL $0x2A0, t44
+ 55: PUTL t44, R1
+ 56: INCEIPL $4
+
+ 0x2547B658: 4E800020 blr
+ 57: GETL LR, t46
+ 58: JMPo-r t46 ($4)
+
+
+. 0 2547B624 56
+. 38 60 00 00 81 61 00 08 80 C1 02 80 80 A1 02 70 80 81 02 74 93 E5 00 00 91 66 00 00 93 E4 00 00 81 41 02 A4 83 C1 02 98 83 E1 02 9C 7D 48 03 A6 38 21 02 A0 4E 80 00 20
+
+==== BB 841 (0x2547A400) approx BBs exec'd 0 ====
+
+ 0x2547A400: 833F0034 lwz r25,52(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R25
+ 4: INCEIPL $4
+
+ 0x2547A404: 2F190000 cmpi cr6,r25,0
+ 5: GETL R25, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547A408: 409A01AC bc 4,26,0x2547A5B4
+ 9: Jc26o $0x2547A5B4
+
+
+. 0 2547A400 12
+. 83 3F 00 34 2F 19 00 00 40 9A 01 AC
+
+==== BB 842 (0x2547A40C) approx BBs exec'd 0 ====
+
+ 0x2547A40C: 815F0024 lwz r10,36(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547A410: 808A0180 lwz r4,384(r10)
+ 5: GETL R10, t4
+ 6: ADDL $0x180, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x2547A414: 54893FBE rlwinm r9,r4,7,30,31
+ 10: GETL R4, t8
+ 11: ROLL $0x7, t8
+ 12: ANDL $0x3, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x2547A418: 2F890000 cmpi cr7,r9,0
+ 15: GETL R9, t10
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2547A41C: 409E0044 bc 4,30,0x2547A460
+ 19: Jc30o $0x2547A460
+
+
+. 0 2547A40C 20
+. 81 5F 00 24 80 8A 01 80 54 89 3F BE 2F 89 00 00 40 9E 00 44
+
+==== BB 843 (0x2547A420) approx BBs exec'd 0 ====
+
+ 0x2547A420: 80010000 lwz r0,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547A424: 38C00001 li r6,1
+ 4: MOVL $0x1, t4
+ 5: PUTL t4, R6
+ 6: INCEIPL $4
+
+ 0x2547A428: 80FF000C lwz r7,12(r31)
+ 7: GETL R31, t6
+ 8: ADDL $0xC, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R7
+ 11: INCEIPL $4
+
+ 0x2547A42C: 9401FFE0 stwu r0,-32(r1)
+ 12: GETL R0, t10
+ 13: GETL R1, t12
+ 14: ADDL $0xFFFFFFE0, t12
+ 15: PUTL t12, R1
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547A430: 3A810017 addi r20,r1,23
+ 18: GETL R1, t14
+ 19: ADDL $0x17, t14
+ 20: PUTL t14, R20
+ 21: INCEIPL $4
+
+ 0x2547A434: 56850036 rlwinm r5,r20,0,0,27
+ 22: GETL R20, t16
+ 23: ANDL $0xFFFFFFF0, t16
+ 24: PUTL t16, R5
+ 25: INCEIPL $4
+
+ 0x2547A438: 91250008 stw r9,8(r5)
+ 26: GETL R9, t18
+ 27: GETL R5, t20
+ 28: ADDL $0x8, t20
+ 29: STL t18, (t20)
+ 30: INCEIPL $4
+
+ 0x2547A43C: 91250000 stw r9,0(r5)
+ 31: GETL R9, t22
+ 32: GETL R5, t24
+ 33: STL t22, (t24)
+ 34: INCEIPL $4
+
+ 0x2547A440: 39270001 addi r9,r7,1
+ 35: GETL R7, t26
+ 36: ADDL $0x1, t26
+ 37: PUTL t26, R9
+ 38: INCEIPL $4
+
+ 0x2547A444: 90B30008 stw r5,8(r19)
+ 39: GETL R5, t28
+ 40: GETL R19, t30
+ 41: ADDL $0x8, t30
+ 42: STL t28, (t30)
+ 43: INCEIPL $4
+
+ 0x2547A448: 91450004 stw r10,4(r5)
+ 44: GETL R10, t32
+ 45: GETL R5, t34
+ 46: ADDL $0x4, t34
+ 47: STL t32, (t34)
+ 48: INCEIPL $4
+
+ 0x2547A44C: 826A0180 lwz r19,384(r10)
+ 49: GETL R10, t36
+ 50: ADDL $0x180, t36
+ 51: LDL (t36), t38
+ 52: PUTL t38, R19
+ 53: INCEIPL $4
+
+ 0x2547A450: 913F000C stw r9,12(r31)
+ 54: GETL R9, t40
+ 55: GETL R31, t42
+ 56: ADDL $0xC, t42
+ 57: STL t40, (t42)
+ 58: INCEIPL $4
+
+ 0x2547A454: 50D3C94C rlwimi r19,r6,25,5,6
+ 59: GETL R19, t44
+ 60: GETL R6, t46
+ 61: ROLL $0x19, t46
+ 62: ANDL $0x6000000, t46
+ 63: ANDL $0xF9FFFFFF, t44
+ 64: ORL t44, t46
+ 65: PUTL t46, R19
+ 66: INCEIPL $4
+
+ 0x2547A458: 926A0180 stw r19,384(r10)
+ 67: GETL R19, t48
+ 68: GETL R10, t50
+ 69: ADDL $0x180, t50
+ 70: STL t48, (t50)
+ 71: INCEIPL $4
+
+ 0x2547A45C: 7CB32B78 or r19,r5,r5
+ 72: GETL R5, t52
+ 73: PUTL t52, R19
+ 74: INCEIPL $4
+
+ 0x2547A460: 2C980000 cmpi cr1,r24,0
+ 75: GETL R24, t54
+ 76: CMP0L t54, t56 (-rSo)
+ 77: ICRFL t56, $0x1, CR
+ 78: INCEIPL $4
+
+ 0x2547A464: 41860010 bc 12,6,0x2547A474
+ 79: Js06o $0x2547A474
+
+
+. 0 2547A420 72
+. 80 01 00 00 38 C0 00 01 80 FF 00 0C 94 01 FF E0 3A 81 00 17 56 85 00 36 91 25 00 08 91 25 00 00 39 27 00 01 90 B3 00 08 91 45 00 04 82 6A 01 80 91 3F 00 0C 50 D3 C9 4C 92 6A 01 80 7C B3 2B 78 2C 98 00 00 41 86 00 10
+
+==== BB 844 (0x2547A474) approx BBs exec'd 0 ====
+
+ 0x2547A474: 853C0008 lwzu r9,8(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x8, t0
+ 2: PUTL t0, R28
+ 3: LDL (t0), t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x2547A478: 2C090000 cmpi cr0,r9,0
+ 6: GETL R9, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547A47C: 4182043C bc 12,2,0x2547A8B8
+ 10: Js02o $0x2547A8B8
+
+
+. 0 2547A474 12
+. 85 3C 00 08 2C 09 00 00 41 82 04 3C
+
+==== BB 845 (0x2547A488) approx BBs exec'd 0 ====
+
+ 0x2547A488: 807F0040 lwz r3,64(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x40, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547A48C: 7C091800 cmp cr0,r9,r3
+ 5: GETL R9, t4
+ 6: GETL R3, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547A490: 41820014 bc 12,2,0x2547A4A4
+ 10: Js02o $0x2547A4A4
+
+
+. 0 2547A488 12
+. 80 7F 00 40 7C 09 18 00 41 82 00 14
+
+==== BB 846 (0x2547A494) approx BBs exec'd 0 ====
+
+ 0x2547A494: 3D407FFF lis r10,32767
+ 0: MOVL $0x7FFF0000, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x2547A498: 6148FFFF ori r8,r10,0xFFFF
+ 3: MOVL $0x7FFFFFFF, t2
+ 4: PUTL t2, R8
+ 5: INCEIPL $4
+
+ 0x2547A49C: 7F094000 cmp cr6,r9,r8
+ 6: GETL R9, t4
+ 7: GETL R8, t6
+ 8: CMPL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x6, CR
+ 10: INCEIPL $4
+
+ 0x2547A4A0: 409AFFD4 bc 4,26,0x2547A474
+ 11: Jc26o $0x2547A474
+
+
+. 0 2547A494 16
+. 3D 40 7F FF 61 48 FF FF 7F 09 40 00 40 9A FF D4
+
+==== BB 847 (0x2547A8B8) approx BBs exec'd 0 ====
+
+ 0x2547A8B8: 2F980000 cmpi cr7,r24,0
+ 0: GETL R24, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547A8BC: 419E005C bc 12,30,0x2547A918
+ 4: Js30o $0x2547A918
+
+
+. 0 2547A8B8 8
+. 2F 98 00 00 41 9E 00 5C
+
+==== BB 848 (0x2547A918) approx BBs exec'd 0 ====
+
+ 0x2547A918: 801B0000 lwz r0,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547A91C: 2F1B0000 cmpi cr6,r27,0
+ 4: GETL R27, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x2547A920: 2C000000 cmpi cr0,r0,0
+ 8: GETL R0, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x2547A924: 4182001C bc 12,2,0x2547A940
+ 12: Js02o $0x2547A940
+
+
+. 0 2547A918 16
+. 80 1B 00 00 2F 1B 00 00 2C 00 00 00 41 82 00 1C
+
+==== BB 849 (0x2547A928) approx BBs exec'd 0 ====
+
+ 0x2547A928: 837B0008 lwz r27,8(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x2547A92C: 2F1B0000 cmpi cr6,r27,0
+ 5: GETL R27, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547A930: 41BAFC94 bc 13,26,0x2547A5C4
+ 9: Js26o $0x2547A5C4
+
+
+. 0 2547A928 12
+. 83 7B 00 08 2F 1B 00 00 41 BA FC 94
+
+==== BB 850 (0x2547A934) approx BBs exec'd 0 ====
+
+ 0x2547A934: 801B0000 lwz r0,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x2547A938: 2C000000 cmpi cr0,r0,0
+ 4: GETL R0, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x2547A93C: 4082FFEC bc 4,2,0x2547A928
+ 8: Jc02o $0x2547A928
+
+
+. 0 2547A934 12
+. 80 1B 00 00 2C 00 00 00 40 82 FF EC
+
+==== BB 851 (0x2547A940) approx BBs exec'd 0 ====
+
+ 0x2547A940: 409AF9DC bc 4,26,0x2547A31C
+ 0: Jc26o $0x2547A31C
+
+
+. 0 2547A940 4
+. 40 9A F9 DC
+
+==== BB 852 (0x2547A35C) approx BBs exec'd 0 ====
+
+ 0x2547A35C: A13A0156 lhz r9,342(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x156, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547A360: 2F090000 cmpi cr6,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547A364: 409A05E4 bc 4,26,0x2547A948
+ 9: Jc26o $0x2547A948
+
+
+. 0 2547A35C 12
+. A1 3A 01 56 2F 09 00 00 40 9A 05 E4
+
+==== BB 853 (0x2547A948) approx BBs exec'd 0 ====
+
+ 0x2547A948: 5534103A rlwinm r20,r9,2,0,29
+ 0: GETL R9, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R20
+ 3: INCEIPL $4
+
+ 0x2547A94C: 81810000 lwz r12,0(r1)
+ 4: GETL R1, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0x2547A950: 3A54001E addi r18,r20,30
+ 8: GETL R20, t6
+ 9: ADDL $0x1E, t6
+ 10: PUTL t6, R18
+ 11: INCEIPL $4
+
+ 0x2547A954: 56490376 rlwinm r9,r18,0,13,27
+ 12: GETL R18, t8
+ 13: ANDL $0x7FFF0, t8
+ 14: PUTL t8, R9
+ 15: INCEIPL $4
+
+ 0x2547A958: 7D4900D0 neg r10,r9
+ 16: GETL R9, t10
+ 17: NEGL t10
+ 18: PUTL t10, R10
+ 19: INCEIPL $4
+
+ 0x2547A95C: 7D81516E stwux r12,r1,r10
+ 20: GETL R10, t12
+ 21: GETL R1, t14
+ 22: ADDL t14, t12
+ 23: PUTL t12, R1
+ 24: GETL R12, t16
+ 25: STL t16, (t12)
+ 26: INCEIPL $4
+
+ 0x2547A960: 39010017 addi r8,r1,23
+ 27: GETL R1, t18
+ 28: ADDL $0x17, t18
+ 29: PUTL t18, R8
+ 30: INCEIPL $4
+
+ 0x2547A964: 55180036 rlwinm r24,r8,0,0,27
+ 31: GETL R8, t20
+ 32: ANDL $0xFFFFFFF0, t20
+ 33: PUTL t20, R24
+ 34: INCEIPL $4
+
+ 0x2547A968: 4BFFFA00 b 0x2547A368
+ 35: JMPo $0x2547A368 ($4)
+
+
+. 0 2547A948 36
+. 55 34 10 3A 81 81 00 00 3A 54 00 1E 56 49 03 76 7D 49 00 D0 7D 81 51 6E 39 01 00 17 55 18 00 36 4B FF FA 00
+
+==== BB 854 (0x2547A0F0) approx BBs exec'd 0 ====
+
+ 0x2547A0F0: 80FF0004 lwz r7,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547A0F4: 811F0008 lwz r8,8(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x2547A0F8: 81230018 lwz r9,24(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x2547A0FC: 4BFFCBED bl 0x25476CE8
+ 15: MOVL $0x2547A100, t12
+ 16: PUTL t12, LR
+ 17: JMPo-c $0x25476CE8 ($4)
+
+
+. 0 2547A0F0 16
+. 80 FF 00 04 81 1F 00 08 81 23 00 18 4B FF CB ED
+
+==== BB 855 (0x25482F10) approx BBs exec'd 0 ====
+
+ 0x25482F10: 84C40004 lwzu r6,4(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R4
+ 3: LDL (t0), t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0x25482F14: 7C072A14 add r0,r7,r5
+ 6: GETL R7, t4
+ 7: GETL R5, t6
+ 8: ADDL t4, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x25482F18: 7D0928F8 nor r9,r8,r5
+ 11: GETL R8, t8
+ 12: GETL R5, t10
+ 13: ORL t10, t8
+ 14: NOTL t8
+ 15: PUTL t8, R9
+ 16: INCEIPL $4
+
+ 0x25482F1C: 7C004839 and. r0,r0,r9
+ 17: GETL R0, t12
+ 18: GETL R9, t14
+ 19: ANDL t12, t14
+ 20: PUTL t14, R0
+ 21: CMP0L t14, t16 (-rSo)
+ 22: ICRFL t16, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x25482F20: 7C853000 cmp cr1,r5,r6
+ 24: GETL R5, t18
+ 25: GETL R6, t20
+ 26: CMPL t18, t20, t22 (-rSo)
+ 27: ICRFL t22, $0x1, CR
+ 28: INCEIPL $4
+
+ 0x25482F24: 4182FFE4 bc 12,2,0x25482F08
+ 29: Js02o $0x25482F08
+
+
+. 0 25482F10 24
+. 84 C4 00 04 7C 07 2A 14 7D 09 28 F8 7C 00 48 39 7C 85 30 00 41 82 FF E4
+
+==== BB 856 (0x25482F28) approx BBs exec'd 0 ====
+
+ 0x25482F28: 7D002838 and r0,r8,r5
+ 0: GETL R8, t0
+ 1: GETL R5, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25482F2C: 4186002C bc 12,6,0x25482F58
+ 5: Js06o $0x25482F58
+
+
+. 0 25482F28 8
+. 7D 00 28 38 41 86 00 2C
+
+==== BB 857 (0x25482F30) approx BBs exec'd 0 ====
+
+ 0x25482F30: 7C004214 add r0,r0,r8
+ 0: GETL R0, t0
+ 1: GETL R8, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x25482F34: 7CAA3279 xor. r10,r5,r6
+ 5: GETL R5, t4
+ 6: GETL R6, t6
+ 7: XORL t4, t6
+ 8: PUTL t6, R10
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25482F38: 7D290078 andc r9,r9,r0
+ 12: GETL R9, t10
+ 13: GETL R0, t12
+ 14: NOTL t12
+ 15: ANDL t10, t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x25482F3C: 41800034 bc 12,0,0x25482F70
+ 18: Js00o $0x25482F70
+
+
+. 0 25482F30 16
+. 7C 00 42 14 7C AA 32 79 7D 29 00 78 41 80 00 34
+
+==== BB 858 (0x25482F40) approx BBs exec'd 0 ====
+
+ 0x25482F40: 7D4A0034 cntlzw r10,r10
+ 0: GETL R10, t0
+ 1: CNTLZL t0
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0x25482F44: 7D290034 cntlzw r9,r9
+ 4: GETL R9, t2
+ 5: CNTLZL t2
+ 6: PUTL t2, R9
+ 7: INCEIPL $4
+
+ 0x25482F48: 39290007 addi r9,r9,7
+ 8: GETL R9, t4
+ 9: ADDL $0x7, t4
+ 10: PUTL t4, R9
+ 11: INCEIPL $4
+
+ 0x25482F4C: 7C895000 cmp cr1,r9,r10
+ 12: GETL R9, t6
+ 13: GETL R10, t8
+ 14: CMPL t6, t8, t10 (-rSo)
+ 15: ICRFL t10, $0x1, CR
+ 16: INCEIPL $4
+
+ 0x25482F50: 7C662850 subf r3,r6,r5
+ 17: GETL R6, t12
+ 18: GETL R5, t14
+ 19: SUBL t12, t14
+ 20: PUTL t14, R3
+ 21: INCEIPL $4
+
+ 0x25482F54: 4CA40020 bclr 5,4
+ 22: GETL LR, t16
+ 23: Jc04o-r t16
+
+
+. 0 25482F40 24
+. 7D 4A 00 34 7D 29 00 34 39 29 00 07 7C 89 50 00 7C 66 28 50 4C A4 00 20
+
+==== BB 859 (0x25482F58) approx BBs exec'd 0 ====
+
+ 0x25482F58: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25482F5C: 4E800020 blr
+ 3: GETL LR, t2
+ 4: JMPo-r t2 ($4)
+
+
+. 0 25482F58 8
+. 38 60 00 00 4E 80 00 20
+
+==== BB 860 (0x2547C750) approx BBs exec'd 0 ====
+
+ 0x2547C750: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547C754: 38600001 li r3,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547C758: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0x2547C75C: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0x2547C760: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547C764: 83E1001C lwz r31,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0x2547C768: 38210020 addi r1,r1,32
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0x2547C76C: 4E800020 blr
+ 30: GETL LR, t22
+ 31: JMPo-r t22 ($4)
+
+
+. 0 2547C750 32
+. 80 81 00 24 38 60 00 01 83 A1 00 14 83 C1 00 18 7C 88 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 861 (0x25476F54) approx BBs exec'd 0 ====
+
+ 0x25476F54: 7FA3EB78 or r3,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476F58: 83E10294 lwz r31,660(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x294, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0x25476F5C: 81810244 lwz r12,580(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x244, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R12
+ 12: INCEIPL $4
+
+ 0x25476F60: 7FE803A6 mtlr r31
+ 13: GETL R31, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x25476F64: 81C10248 lwz r14,584(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x248, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R14
+ 20: INCEIPL $4
+
+ 0x25476F68: 81E1024C lwz r15,588(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x24C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R15
+ 25: INCEIPL $4
+
+ 0x25476F6C: 7D818120 mtcrf 0x18,r12
+ 26: GETL R12, t20
+ 27: ICRFL t20, $0x3, CR
+ 28: ICRFL t20, $0x4, CR
+ 29: INCEIPL $4
+
+ 0x25476F70: 82010250 lwz r16,592(r1)
+ 30: GETL R1, t22
+ 31: ADDL $0x250, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R16
+ 34: INCEIPL $4
+
+ 0x25476F74: 82210254 lwz r17,596(r1)
+ 35: GETL R1, t26
+ 36: ADDL $0x254, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R17
+ 39: INCEIPL $4
+
+ 0x25476F78: 82410258 lwz r18,600(r1)
+ 40: GETL R1, t30
+ 41: ADDL $0x258, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R18
+ 44: INCEIPL $4
+
+ 0x25476F7C: 8261025C lwz r19,604(r1)
+ 45: GETL R1, t34
+ 46: ADDL $0x25C, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R19
+ 49: INCEIPL $4
+
+ 0x25476F80: 82810260 lwz r20,608(r1)
+ 50: GETL R1, t38
+ 51: ADDL $0x260, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R20
+ 54: INCEIPL $4
+
+ 0x25476F84: 82A10264 lwz r21,612(r1)
+ 55: GETL R1, t42
+ 56: ADDL $0x264, t42
+ 57: LDL (t42), t44
+ 58: PUTL t44, R21
+ 59: INCEIPL $4
+
+ 0x25476F88: 82C10268 lwz r22,616(r1)
+ 60: GETL R1, t46
+ 61: ADDL $0x268, t46
+ 62: LDL (t46), t48
+ 63: PUTL t48, R22
+ 64: INCEIPL $4
+
+ 0x25476F8C: 82E1026C lwz r23,620(r1)
+ 65: GETL R1, t50
+ 66: ADDL $0x26C, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R23
+ 69: INCEIPL $4
+
+ 0x25476F90: 83010270 lwz r24,624(r1)
+ 70: GETL R1, t54
+ 71: ADDL $0x270, t54
+ 72: LDL (t54), t56
+ 73: PUTL t56, R24
+ 74: INCEIPL $4
+
+ 0x25476F94: 83210274 lwz r25,628(r1)
+ 75: GETL R1, t58
+ 76: ADDL $0x274, t58
+ 77: LDL (t58), t60
+ 78: PUTL t60, R25
+ 79: INCEIPL $4
+
+ 0x25476F98: 83410278 lwz r26,632(r1)
+ 80: GETL R1, t62
+ 81: ADDL $0x278, t62
+ 82: LDL (t62), t64
+ 83: PUTL t64, R26
+ 84: INCEIPL $4
+
+ 0x25476F9C: 8361027C lwz r27,636(r1)
+ 85: GETL R1, t66
+ 86: ADDL $0x27C, t66
+ 87: LDL (t66), t68
+ 88: PUTL t68, R27
+ 89: INCEIPL $4
+
+ 0x25476FA0: 83810280 lwz r28,640(r1)
+ 90: GETL R1, t70
+ 91: ADDL $0x280, t70
+ 92: LDL (t70), t72
+ 93: PUTL t72, R28
+ 94: INCEIPL $4
+
+ 0x25476FA4: 83A10284 lwz r29,644(r1)
+ 95: GETL R1, t74
+ 96: ADDL $0x284, t74
+ 97: LDL (t74), t76
+ 98: PUTL t76, R29
+ 99: INCEIPL $4
+
+ 0x25476FA8: 83C10288 lwz r30,648(r1)
+ 100: GETL R1, t78
+ 101: ADDL $0x288, t78
+ 102: LDL (t78), t80
+ 103: PUTL t80, R30
+ 104: INCEIPL $4
+
+ 0x25476FAC: 83E1028C lwz r31,652(r1)
+ 105: GETL R1, t82
+ 106: ADDL $0x28C, t82
+ 107: LDL (t82), t84
+ 108: PUTL t84, R31
+ 109: INCEIPL $4
+
+ 0x25476FB0: 38210290 addi r1,r1,656
+ 110: GETL R1, t86
+ 111: ADDL $0x290, t86
+ 112: PUTL t86, R1
+ 113: INCEIPL $4
+
+ 0x25476FB4: 4E800020 blr
+ 114: GETL LR, t88
+ 115: JMPo-r t88 ($4)
+
+
+. 0 25476F54 100
+. 7F A3 EB 78 83 E1 02 94 81 81 02 44 7F E8 03 A6 81 C1 02 48 81 E1 02 4C 7D 81 81 20 82 01 02 50 82 21 02 54 82 41 02 58 82 61 02 5C 82 81 02 60 82 A1 02 64 82 C1 02 68 82 E1 02 6C 83 01 02 70 83 21 02 74 83 41 02 78 83 61 02 7C 83 81 02 80 83 A1 02 84 83 C1 02 88 83 E1 02 8C 38 21 02 90 4E 80 00 20
+
+==== BB 862 (0x2547A460) approx BBs exec'd 0 ====
+
+ 0x2547A460: 2C980000 cmpi cr1,r24,0
+ 0: GETL R24, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547A464: 41860010 bc 12,6,0x2547A474
+ 4: Js06o $0x2547A474
+
+
+. 0 2547A460 8
+. 2C 98 00 00 41 86 00 10
+
+==== BB 863 (0x2547A468) approx BBs exec'd 0 ====
+
+ 0x2547A468: 56CB103A rlwinm r11,r22,2,0,29
+ 0: GETL R22, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R11
+ 3: INCEIPL $4
+
+ 0x2547A46C: 3AD60001 addi r22,r22,1
+ 4: GETL R22, t2
+ 5: ADDL $0x1, t2
+ 6: PUTL t2, R22
+ 7: INCEIPL $4
+
+ 0x2547A470: 7D4BC12E stwx r10,r11,r24
+ 8: GETL R24, t4
+ 9: GETL R11, t6
+ 10: ADDL t6, t4
+ 11: GETL R10, t8
+ 12: STL t8, (t4)
+ 13: INCEIPL $4
+
+ 0x2547A474: 853C0008 lwzu r9,8(r28)
+ 14: GETL R28, t10
+ 15: ADDL $0x8, t10
+ 16: PUTL t10, R28
+ 17: LDL (t10), t12
+ 18: PUTL t12, R9
+ 19: INCEIPL $4
+
+ 0x2547A478: 2C090000 cmpi cr0,r9,0
+ 20: GETL R9, t14
+ 21: CMP0L t14, t16 (-rSo)
+ 22: ICRFL t16, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x2547A47C: 4182043C bc 12,2,0x2547A8B8
+ 24: Js02o $0x2547A8B8
+
+
+. 0 2547A468 24
+. 56 CB 10 3A 3A D6 00 01 7D 4B C1 2E 85 3C 00 08 2C 09 00 00 41 82 04 3C
+
+==== BB 864 (0x2547A8C0) approx BBs exec'd 0 ====
+
+ 0x2547A8C0: 3BB60001 addi r29,r22,1
+ 0: GETL R22, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x2547A8C4: 56DC103A rlwinm r28,r22,2,0,29
+ 4: GETL R22, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R28
+ 7: INCEIPL $4
+
+ 0x2547A8C8: 3A400000 li r18,0
+ 8: MOVL $0x0, t4
+ 9: PUTL t4, R18
+ 10: INCEIPL $4
+
+ 0x2547A8CC: 57B61838 rlwinm r22,r29,3,0,28
+ 11: GETL R29, t6
+ 12: SHLL $0x3, t6
+ 13: PUTL t6, R22
+ 14: INCEIPL $4
+
+ 0x2547A8D0: 7E5CC12E stwx r18,r28,r24
+ 15: GETL R24, t8
+ 16: GETL R28, t10
+ 17: ADDL t10, t8
+ 18: GETL R18, t12
+ 19: STL t12, (t8)
+ 20: INCEIPL $4
+
+ 0x2547A8D4: 38760004 addi r3,r22,4
+ 21: GETL R22, t14
+ 22: ADDL $0x4, t14
+ 23: PUTL t14, R3
+ 24: INCEIPL $4
+
+ 0x2547A8D8: 4801D14D bl 0x25497A24
+ 25: MOVL $0x2547A8DC, t16
+ 26: PUTL t16, LR
+ 27: JMPo-c $0x25497A24 ($4)
+
+
+. 0 2547A8C0 28
+. 3B B6 00 01 56 DC 10 3A 3A 40 00 00 57 B6 18 38 7E 5C C1 2E 38 76 00 04 48 01 D1 4D
+
+==== BB 865 (0x2547A8DC) approx BBs exec'd 0 ====
+
+ 0x2547A8DC: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547A8E0: 7C691B78 or r9,r3,r3
+ 4: GETL R3, t4
+ 5: PUTL t4, R9
+ 6: INCEIPL $4
+
+ 0x2547A8E4: 907A01E8 stw r3,488(r26)
+ 7: GETL R3, t6
+ 8: GETL R26, t8
+ 9: ADDL $0x1E8, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x2547A8E8: 418605C4 bc 12,6,0x2547AEAC
+ 12: Js06o $0x2547AEAC
+
+
+. 0 2547A8DC 16
+. 2C 83 00 00 7C 69 1B 78 90 7A 01 E8 41 86 05 C4
+
+==== BB 866 (0x2547A8EC) approx BBs exec'd 0 ====
+
+ 0x2547A8EC: 57B5103A rlwinm r21,r29,2,0,29
+ 0: GETL R29, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R21
+ 3: INCEIPL $4
+
+ 0x2547A8F0: 7F04C378 or r4,r24,r24
+ 4: GETL R24, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0x2547A8F4: 7EA5AB78 or r5,r21,r21
+ 7: GETL R21, t4
+ 8: PUTL t4, R5
+ 9: INCEIPL $4
+
+ 0x2547A8F8: 93490000 stw r26,0(r9)
+ 10: GETL R26, t6
+ 11: GETL R9, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547A8FC: 38630004 addi r3,r3,4
+ 14: GETL R3, t10
+ 15: ADDL $0x4, t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0x2547A900: 480092E1 bl 0x25483BE0
+ 18: MOVL $0x2547A904, t12
+ 19: PUTL t12, LR
+ 20: JMPo-c $0x25483BE0 ($4)
+
+
+. 0 2547A8EC 24
+. 57 B5 10 3A 7F 04 C3 78 7E A5 AB 78 93 49 00 00 38 63 00 04 48 00 92 E1
+
+==== BB 867 (0x2547A904) approx BBs exec'd 0 ====
+
+ 0x2547A904: 809A01E8 lwz r4,488(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x1E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547A908: 7EA5AB78 or r5,r21,r21
+ 5: GETL R21, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547A90C: 7F552214 add r26,r21,r4
+ 8: GETL R21, t6
+ 9: GETL R4, t8
+ 10: ADDL t6, t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x2547A910: 387A0004 addi r3,r26,4
+ 13: GETL R26, t10
+ 14: ADDL $0x4, t10
+ 15: PUTL t10, R3
+ 16: INCEIPL $4
+
+ 0x2547A914: 480092CD bl 0x25483BE0
+ 17: MOVL $0x2547A918, t12
+ 18: PUTL t12, LR
+ 19: JMPo-c $0x25483BE0 ($4)
+
+
+. 0 2547A904 20
+. 80 9A 01 E8 7E A5 AB 78 7F 55 22 14 38 7A 00 04 48 00 92 CD
+
+==== BB 868 (0x25482F94) approx BBs exec'd 0 ====
+
+ 0x25482F94: 8CC40001 lbzu r6,1(r4)
+ 0: GETL R4, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R4
+ 3: LDB (t0), t2
+ 4: PUTL t2, R6
+ 5: INCEIPL $4
+
+ 0x25482F98: 2C850000 cmpi cr1,r5,0
+ 6: GETL R5, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x25482F9C: 41860020 bc 12,6,0x25482FBC
+ 10: Js06o $0x25482FBC
+
+
+. 0 25482F94 12
+. 8C C4 00 01 2C 85 00 00 41 86 00 20
+
+==== BB 869 (0x25476ED0) approx BBs exec'd 0 ====
+
+ 0x25476ED0: 809D001C lwz r4,28(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25476ED4: 3B600000 li r27,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R27
+ 7: INCEIPL $4
+
+ 0x25476ED8: 48000020 b 0x25476EF8
+ 8: JMPo $0x25476EF8 ($4)
+
+
+. 0 25476ED0 12
+. 80 9D 00 1C 3B 60 00 00 48 00 00 20
+
+==== BB 870 (0x25476EF8) approx BBs exec'd 0 ====
+
+ 0x25476EF8: 2F040000 cmpi cr6,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25476EFC: 409AFFE0 bc 4,26,0x25476EDC
+ 4: Jc26o $0x25476EDC
+
+
+. 0 25476EF8 8
+. 2F 04 00 00 40 9A FF E0
+
+==== BB 871 (0x25476EDC) approx BBs exec'd 0 ====
+
+ 0x25476EDC: 7C9B2378 or r27,r4,r4
+ 0: GETL R4, t0
+ 1: PUTL t0, R27
+ 2: INCEIPL $4
+
+ 0x25476EE0: 80840000 lwz r4,0(r4)
+ 3: GETL R4, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0x25476EE4: 7F83E378 or r3,r28,r28
+ 7: GETL R28, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x25476EE8: 4800BFF9 bl 0x25482EE0
+ 10: MOVL $0x25476EEC, t8
+ 11: PUTL t8, LR
+ 12: JMPo-c $0x25482EE0 ($4)
+
+
+. 0 25476EDC 16
+. 7C 9B 23 78 80 84 00 00 7F 83 E3 78 48 00 BF F9
+
+==== BB 872 (0x25476EEC) approx BBs exec'd 0 ====
+
+ 0x25476EEC: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25476EF0: 419E0058 bc 12,30,0x25476F48
+ 4: Js30o $0x25476F48
+
+
+. 0 25476EEC 8
+. 2F 83 00 00 41 9E 00 58
+
+==== BB 873 (0x25476EF4) approx BBs exec'd 0 ====
+
+ 0x25476EF4: 809B0004 lwz r4,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25476EF8: 2F040000 cmpi cr6,r4,0
+ 5: GETL R4, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25476EFC: 409AFFE0 bc 4,26,0x25476EDC
+ 9: Jc26o $0x25476EDC
+
+
+. 0 25476EF4 12
+. 80 9B 00 04 2F 04 00 00 40 9A FF E0
+
+==== BB 874 (0x25476F00) approx BBs exec'd 0 ====
+
+ 0x25476F00: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25476F04: 4800C0CD bl 0x25482FD0
+ 3: MOVL $0x25476F08, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x25482FD0 ($4)
+
+
+. 0 25476F00 8
+. 7F 83 E3 78 48 00 C0 CD
+
+==== BB 875 (0x25476F08) approx BBs exec'd 0 ====
+
+ 0x25476F08: 7C661B78 or r6,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x25476F0C: 3863000D addi r3,r3,13
+ 3: GETL R3, t2
+ 4: ADDL $0xD, t2
+ 5: PUTL t2, R3
+ 6: INCEIPL $4
+
+ 0x25476F10: 3B460001 addi r26,r6,1
+ 7: GETL R6, t4
+ 8: ADDL $0x1, t4
+ 9: PUTL t4, R26
+ 10: INCEIPL $4
+
+ 0x25476F14: 48020B11 bl 0x25497A24
+ 11: MOVL $0x25476F18, t6
+ 12: PUTL t6, LR
+ 13: JMPo-c $0x25497A24 ($4)
+
+
+. 0 25476F08 16
+. 7C 66 1B 78 38 63 00 0D 3B 46 00 01 48 02 0B 11
+
+==== BB 876 (0x25476F18) approx BBs exec'd 0 ====
+
+ 0x25476F18: 7C7F1B79 or. r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25476F1C: 80DE01AC lwz r6,428(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1AC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x25476F20: 7F84E378 or r4,r28,r28
+ 10: GETL R28, t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x25476F24: 4182013C bc 12,2,0x25477060
+ 13: Js02o $0x25477060
+
+
+. 0 25476F18 16
+. 7C 7F 1B 79 80 DE 01 AC 7F 84 E3 78 41 82 01 3C
+
+==== BB 877 (0x25476F28) approx BBs exec'd 0 ====
+
+ 0x25476F28: 7F84E378 or r4,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x25476F2C: 7F45D378 or r5,r26,r26
+ 3: GETL R26, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0x25476F30: 387F000C addi r3,r31,12
+ 6: GETL R31, t4
+ 7: ADDL $0xC, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0x25476F34: 4800CCAD bl 0x25483BE0
+ 10: MOVL $0x25476F38, t6
+ 11: PUTL t6, LR
+ 12: JMPo-c $0x25483BE0 ($4)
+
+
+. 0 25476F28 16
+. 7F 84 E3 78 7F 45 D3 78 38 7F 00 0C 48 00 CC AD
+
+==== BB 878 (0x25476F38) approx BBs exec'd 0 ====
+
+ 0x25476F38: 92DF0004 stw r22,4(r31)
+ 0: GETL R22, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x4, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25476F3C: 907F0000 stw r3,0(r31)
+ 5: GETL R3, t4
+ 6: GETL R31, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x25476F40: 92DF0008 stw r22,8(r31)
+ 9: GETL R22, t8
+ 10: GETL R31, t10
+ 11: ADDL $0x8, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25476F44: 93FB0004 stw r31,4(r27)
+ 14: GETL R31, t12
+ 15: GETL R27, t14
+ 16: ADDL $0x4, t14
+ 17: STL t12, (t14)
+ 18: INCEIPL $4
+
+ 0x25476F48: 811D0180 lwz r8,384(r29)
+ 19: GETL R29, t16
+ 20: ADDL $0x180, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R8
+ 23: INCEIPL $4
+
+ 0x25476F4C: 65070080 oris r7,r8,0x80
+ 24: GETL R8, t20
+ 25: ORL $0x800000, t20
+ 26: PUTL t20, R7
+ 27: INCEIPL $4
+
+ 0x25476F50: 90FD0180 stw r7,384(r29)
+ 28: GETL R7, t22
+ 29: GETL R29, t24
+ 30: ADDL $0x180, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0x25476F54: 7FA3EB78 or r3,r29,r29
+ 33: GETL R29, t26
+ 34: PUTL t26, R3
+ 35: INCEIPL $4
+
+ 0x25476F58: 83E10294 lwz r31,660(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x294, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R31
+ 40: INCEIPL $4
+
+ 0x25476F5C: 81810244 lwz r12,580(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x244, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R12
+ 45: INCEIPL $4
+
+ 0x25476F60: 7FE803A6 mtlr r31
+ 46: GETL R31, t36
+ 47: PUTL t36, LR
+ 48: INCEIPL $4
+
+ 0x25476F64: 81C10248 lwz r14,584(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x248, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R14
+ 53: INCEIPL $4
+
+ 0x25476F68: 81E1024C lwz r15,588(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x24C, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R15
+ 58: INCEIPL $4
+
+ 0x25476F6C: 7D818120 mtcrf 0x18,r12
+ 59: GETL R12, t46
+ 60: ICRFL t46, $0x3, CR
+ 61: ICRFL t46, $0x4, CR
+ 62: INCEIPL $4
+
+ 0x25476F70: 82010250 lwz r16,592(r1)
+ 63: GETL R1, t48
+ 64: ADDL $0x250, t48
+ 65: LDL (t48), t50
+ 66: PUTL t50, R16
+ 67: INCEIPL $4
+
+ 0x25476F74: 82210254 lwz r17,596(r1)
+ 68: GETL R1, t52
+ 69: ADDL $0x254, t52
+ 70: LDL (t52), t54
+ 71: PUTL t54, R17
+ 72: INCEIPL $4
+
+ 0x25476F78: 82410258 lwz r18,600(r1)
+ 73: GETL R1, t56
+ 74: ADDL $0x258, t56
+ 75: LDL (t56), t58
+ 76: PUTL t58, R18
+ 77: INCEIPL $4
+
+ 0x25476F7C: 8261025C lwz r19,604(r1)
+ 78: GETL R1, t60
+ 79: ADDL $0x25C, t60
+ 80: LDL (t60), t62
+ 81: PUTL t62, R19
+ 82: INCEIPL $4
+
+ 0x25476F80: 82810260 lwz r20,608(r1)
+ 83: GETL R1, t64
+ 84: ADDL $0x260, t64
+ 85: LDL (t64), t66
+ 86: PUTL t66, R20
+ 87: INCEIPL $4
+
+ 0x25476F84: 82A10264 lwz r21,612(r1)
+ 88: GETL R1, t68
+ 89: ADDL $0x264, t68
+ 90: LDL (t68), t70
+ 91: PUTL t70, R21
+ 92: INCEIPL $4
+
+ 0x25476F88: 82C10268 lwz r22,616(r1)
+ 93: GETL R1, t72
+ 94: ADDL $0x268, t72
+ 95: LDL (t72), t74
+ 96: PUTL t74, R22
+ 97: INCEIPL $4
+
+ 0x25476F8C: 82E1026C lwz r23,620(r1)
+ 98: GETL R1, t76
+ 99: ADDL $0x26C, t76
+ 100: LDL (t76), t78
+ 101: PUTL t78, R23
+ 102: INCEIPL $4
+
+ 0x25476F90: 83010270 lwz r24,624(r1)
+ 103: GETL R1, t80
+ 104: ADDL $0x270, t80
+ 105: LDL (t80), t82
+ 106: PUTL t82, R24
+ 107: INCEIPL $4
+
+ 0x25476F94: 83210274 lwz r25,628(r1)
+ 108: GETL R1, t84
+ 109: ADDL $0x274, t84
+ 110: LDL (t84), t86
+ 111: PUTL t86, R25
+ 112: INCEIPL $4
+
+ 0x25476F98: 83410278 lwz r26,632(r1)
+ 113: GETL R1, t88
+ 114: ADDL $0x278, t88
+ 115: LDL (t88), t90
+ 116: PUTL t90, R26
+ 117: INCEIPL $4
+
+ 0x25476F9C: 8361027C lwz r27,636(r1)
+ 118: GETL R1, t92
+ 119: ADDL $0x27C, t92
+ 120: LDL (t92), t94
+ 121: PUTL t94, R27
+ 122: INCEIPL $4
+
+ 0x25476FA0: 83810280 lwz r28,640(r1)
+ 123: GETL R1, t96
+ 124: ADDL $0x280, t96
+ 125: LDL (t96), t98
+ 126: PUTL t98, R28
+ 127: INCEIPL $4
+
+ 0x25476FA4: 83A10284 lwz r29,644(r1)
+ 128: GETL R1, t100
+ 129: ADDL $0x284, t100
+ 130: LDL (t100), t102
+ 131: PUTL t102, R29
+ 132: INCEIPL $4
+
+ 0x25476FA8: 83C10288 lwz r30,648(r1)
+ 133: GETL R1, t104
+ 134: ADDL $0x288, t104
+ 135: LDL (t104), t106
+ 136: PUTL t106, R30
+ 137: INCEIPL $4
+
+ 0x25476FAC: 83E1028C lwz r31,652(r1)
+ 138: GETL R1, t108
+ 139: ADDL $0x28C, t108
+ 140: LDL (t108), t110
+ 141: PUTL t110, R31
+ 142: INCEIPL $4
+
+ 0x25476FB0: 38210290 addi r1,r1,656
+ 143: GETL R1, t112
+ 144: ADDL $0x290, t112
+ 145: PUTL t112, R1
+ 146: INCEIPL $4
+
+ 0x25476FB4: 4E800020 blr
+ 147: GETL LR, t114
+ 148: JMPo-r t114 ($4)
+
+
+. 0 25476F38 128
+. 92 DF 00 04 90 7F 00 00 92 DF 00 08 93 FB 00 04 81 1D 01 80 65 07 00 80 90 FD 01 80 7F A3 EB 78 83 E1 02 94 81 81 02 44 7F E8 03 A6 81 C1 02 48 81 E1 02 4C 7D 81 81 20 82 01 02 50 82 21 02 54 82 41 02 58 82 61 02 5C 82 81 02 60 82 A1 02 64 82 C1 02 68 82 E1 02 6C 83 01 02 70 83 21 02 74 83 41 02 78 83 61 02 7C 83 81 02 80 83 A1 02 84 83 C1 02 88 83 E1 02 8C 38 21 02 90 4E 80 00 20
+
+==== BB 879 (0x2547A374) approx BBs exec'd 0 ====
+
+ 0x2547A374: 809A00F0 lwz r4,240(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0xF0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547A378: 2C840000 cmpi cr1,r4,0
+ 5: GETL R4, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547A37C: 40860010 bc 4,6,0x2547A38C
+ 9: Jc06o $0x2547A38C
+
+
+. 0 2547A374 12
+. 80 9A 00 F0 2C 84 00 00 40 86 00 10
+
+==== BB 880 (0x2547A380) approx BBs exec'd 0 ====
+
+ 0x2547A380: 80BA00E8 lwz r5,232(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0xE8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547A384: 2C050000 cmpi cr0,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547A388: 41820530 bc 12,2,0x2547A8B8
+ 9: Js02o $0x2547A8B8
+
+
+. 0 2547A380 12
+. 80 BA 00 E8 2C 05 00 00 41 82 05 30
+
+==== BB 881 (0x2547A5C4) approx BBs exec'd 0 ====
+
+ 0x2547A5C4: 83100000 lwz r24,0(r16)
+ 0: GETL R16, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R24
+ 3: INCEIPL $4
+
+ 0x2547A5C8: 827F0038 lwz r19,56(r31)
+ 4: GETL R31, t4
+ 5: ADDL $0x38, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R19
+ 8: INCEIPL $4
+
+ 0x2547A5CC: 21780000 subfic r11,r24,0
+ 9: GETL R24, t8
+ 10: MOVL $0x0, t10
+ 11: SBBL t8, t10 (-wCa)
+ 12: PUTL t10, R11
+ 13: INCEIPL $4
+
+ 0x2547A5D0: 7DCBC114 adde r14,r11,r24
+ 14: GETL R11, t12
+ 15: GETL R24, t14
+ 16: ADCL t12, t14 (-rCa-wCa)
+ 17: PUTL t14, R14
+ 18: INCEIPL $4
+
+ 0x2547A5D4: 3153FFFF addic r10,r19,-1
+ 19: GETL R19, t16
+ 20: ADCL $0xFFFFFFFF, t16 (-wCa)
+ 21: PUTL t16, R10
+ 22: INCEIPL $4
+
+ 0x2547A5D8: 7F6A9910 subfe r27,r10,r19
+ 23: GETL R10, t18
+ 24: GETL R19, t20
+ 25: SBBL t18, t20 (-rCa-wCa)
+ 26: PUTL t20, R27
+ 27: INCEIPL $4
+
+ 0x2547A5DC: 7DC8D839 and. r8,r14,r27
+ 28: GETL R14, t22
+ 29: GETL R27, t24
+ 30: ANDL t22, t24
+ 31: PUTL t24, R8
+ 32: CMP0L t24, t26 (-rSo)
+ 33: ICRFL t26, $0x0, CR
+ 34: INCEIPL $4
+
+ 0x2547A5E0: 4182000C bc 12,2,0x2547A5EC
+ 35: Js02o $0x2547A5EC
+
+
+. 0 2547A5C4 32
+. 83 10 00 00 82 7F 00 38 21 78 00 00 7D CB C1 14 31 53 FF FF 7F 6A 99 10 7D C8 D8 39 41 82 00 0C
+
+==== BB 882 (0x2547A5E4) approx BBs exec'd 0 ====
+
+ 0x2547A5E4: 811F0038 lwz r8,56(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x38, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547A5E8: 91100000 stw r8,0(r16)
+ 5: GETL R8, t4
+ 6: GETL R16, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547A5EC: 807701E8 lwz r3,488(r23)
+ 9: GETL R23, t8
+ 10: ADDL $0x1E8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R3
+ 13: INCEIPL $4
+
+ 0x2547A5F0: 2F030000 cmpi cr6,r3,0
+ 14: GETL R3, t12
+ 15: CMP0L t12, t14 (-rSo)
+ 16: ICRFL t14, $0x6, CR
+ 17: INCEIPL $4
+
+ 0x2547A5F4: 419A0018 bc 12,26,0x2547A60C
+ 18: Js26o $0x2547A60C
+
+
+. 0 2547A5E4 20
+. 81 1F 00 38 91 10 00 00 80 77 01 E8 2F 03 00 00 41 9A 00 18
+
+==== BB 883 (0x2547A60C) approx BBs exec'd 0 ====
+
+ 0x2547A60C: 80DF000C lwz r6,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547A610: 54C51838 rlwinm r5,r6,3,0,28
+ 5: GETL R6, t4
+ 6: SHLL $0x3, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547A614: 38650004 addi r3,r5,4
+ 9: GETL R5, t6
+ 10: ADDL $0x4, t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0x2547A618: 4801D40D bl 0x25497A24
+ 13: MOVL $0x2547A61C, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0x25497A24 ($4)
+
+
+. 0 2547A60C 16
+. 80 DF 00 0C 54 C5 18 38 38 65 00 04 48 01 D4 0D
+
+==== BB 884 (0x2547A61C) approx BBs exec'd 0 ====
+
+ 0x2547A61C: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547A620: 907701E8 stw r3,488(r23)
+ 4: GETL R3, t4
+ 5: GETL R23, t6
+ 6: ADDL $0x1E8, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547A624: 4186089C bc 12,6,0x2547AEC0
+ 9: Js06o $0x2547AEC0
+
+
+. 0 2547A61C 12
+. 2C 83 00 00 90 77 01 E8 41 86 08 9C
+
+==== BB 885 (0x2547A628) approx BBs exec'd 0 ====
+
+ 0x2547A628: 80FF0008 lwz r7,8(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547A62C: 38A00000 li r5,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547A630: 829F000C lwz r20,12(r31)
+ 8: GETL R31, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R20
+ 12: INCEIPL $4
+
+ 0x2547A634: 2C070000 cmpi cr0,r7,0
+ 13: GETL R7, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x0, CR
+ 16: INCEIPL $4
+
+ 0x2547A638: 569D103A rlwinm r29,r20,2,0,29
+ 17: GETL R20, t14
+ 18: SHLL $0x2, t14
+ 19: PUTL t14, R29
+ 20: INCEIPL $4
+
+ 0x2547A63C: 9297015C stw r20,348(r23)
+ 21: GETL R20, t16
+ 22: GETL R23, t18
+ 23: ADDL $0x15C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547A640: 7D23EA14 add r9,r3,r29
+ 26: GETL R3, t20
+ 27: GETL R29, t22
+ 28: ADDL t20, t22
+ 29: PUTL t22, R9
+ 30: INCEIPL $4
+
+ 0x2547A644: 90BF000C stw r5,12(r31)
+ 31: GETL R5, t24
+ 32: GETL R31, t26
+ 33: ADDL $0xC, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547A648: 38890004 addi r4,r9,4
+ 36: GETL R9, t28
+ 37: ADDL $0x4, t28
+ 38: PUTL t28, R4
+ 39: INCEIPL $4
+
+ 0x2547A64C: 90970158 stw r4,344(r23)
+ 40: GETL R4, t30
+ 41: GETL R23, t32
+ 42: ADDL $0x158, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x2547A650: 41820050 bc 12,2,0x2547A6A0
+ 45: Js02o $0x2547A6A0
+
+
+. 0 2547A628 44
+. 80 FF 00 08 38 A0 00 00 82 9F 00 0C 2C 07 00 00 56 9D 10 3A 92 97 01 5C 7D 23 EA 14 90 BF 00 0C 38 89 00 04 90 97 01 58 41 82 00 50
+
+==== BB 886 (0x2547A654) approx BBs exec'd 0 ====
+
+ 0x2547A654: 2F0F0000 cmpi cr6,r15,0
+ 0: GETL R15, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547A658: 38C00000 li r6,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R6
+ 6: INCEIPL $4
+
+ 0x2547A65C: 409A01F8 bc 4,26,0x2547A854
+ 7: Jc26o $0x2547A854
+
+
+. 0 2547A654 12
+. 2F 0F 00 00 38 C0 00 00 40 9A 01 F8
+
+==== BB 887 (0x2547A660) approx BBs exec'd 0 ====
+
+ 0x2547A660: 817F000C lwz r11,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547A664: 80070004 lwz r0,4(r7)
+ 5: GETL R7, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x2547A668: 83370158 lwz r25,344(r23)
+ 10: GETL R23, t8
+ 11: ADDL $0x158, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R25
+ 14: INCEIPL $4
+
+ 0x2547A66C: 5576103A rlwinm r22,r11,2,0,29
+ 15: GETL R11, t12
+ 16: SHLL $0x2, t12
+ 17: PUTL t12, R22
+ 18: INCEIPL $4
+
+ 0x2547A670: 398B0001 addi r12,r11,1
+ 19: GETL R11, t14
+ 20: ADDL $0x1, t14
+ 21: PUTL t14, R12
+ 22: INCEIPL $4
+
+ 0x2547A674: 7C16C92E stwx r0,r22,r25
+ 23: GETL R25, t16
+ 24: GETL R22, t18
+ 25: ADDL t18, t16
+ 26: GETL R0, t20
+ 27: STL t20, (t16)
+ 28: INCEIPL $4
+
+ 0x2547A678: 81E70004 lwz r15,4(r7)
+ 29: GETL R7, t22
+ 30: ADDL $0x4, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R15
+ 33: INCEIPL $4
+
+ 0x2547A67C: 806F0180 lwz r3,384(r15)
+ 34: GETL R15, t26
+ 35: ADDL $0x180, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R3
+ 38: INCEIPL $4
+
+ 0x2547A680: 919F000C stw r12,12(r31)
+ 39: GETL R12, t30
+ 40: GETL R31, t32
+ 41: ADDL $0xC, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0x2547A684: 50C3C94C rlwimi r3,r6,25,5,6
+ 44: GETL R3, t34
+ 45: GETL R6, t36
+ 46: ROLL $0x19, t36
+ 47: ANDL $0x6000000, t36
+ 48: ANDL $0xF9FFFFFF, t34
+ 49: ORL t34, t36
+ 50: PUTL t36, R3
+ 51: INCEIPL $4
+
+ 0x2547A688: 906F0180 stw r3,384(r15)
+ 52: GETL R3, t38
+ 53: GETL R15, t40
+ 54: ADDL $0x180, t40
+ 55: STL t38, (t40)
+ 56: INCEIPL $4
+
+ 0x2547A68C: 80E70008 lwz r7,8(r7)
+ 57: GETL R7, t42
+ 58: ADDL $0x8, t42
+ 59: LDL (t42), t44
+ 60: PUTL t44, R7
+ 61: INCEIPL $4
+
+ 0x2547A690: 2F070000 cmpi cr6,r7,0
+ 62: GETL R7, t46
+ 63: CMP0L t46, t48 (-rSo)
+ 64: ICRFL t48, $0x6, CR
+ 65: INCEIPL $4
+
+ 0x2547A694: 409AFFCC bc 4,26,0x2547A660
+ 66: Jc26o $0x2547A660
+
+
+. 0 2547A660 56
+. 81 7F 00 0C 80 07 00 04 83 37 01 58 55 76 10 3A 39 8B 00 01 7C 16 C9 2E 81 E7 00 04 80 6F 01 80 91 9F 00 0C 50 C3 C9 4C 90 6F 01 80 80 E7 00 08 2F 07 00 00 40 9A FF CC
+
+==== BB 888 (0x2547A698) approx BBs exec'd 0 ====
+
+ 0x2547A698: 80BF000C lwz r5,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547A69C: 80970158 lwz r4,344(r23)
+ 5: GETL R23, t4
+ 6: ADDL $0x158, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x2547A6A0: 839E04F4 lwz r28,1268(r30)
+ 10: GETL R30, t8
+ 11: ADDL $0x4F4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R28
+ 14: INCEIPL $4
+
+ 0x2547A6A4: 80FC0000 lwz r7,0(r28)
+ 15: GETL R28, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R7
+ 18: INCEIPL $4
+
+ 0x2547A6A8: 70E80400 andi. r8,r7,0x400
+ 19: GETL R7, t16
+ 20: ANDL $0x400, t16
+ 21: PUTL t16, R8
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x0, CR
+ 24: INCEIPL $4
+
+ 0x2547A6AC: 408204E0 bc 4,2,0x2547AB8C
+ 25: Jc02o $0x2547AB8C
+
+
+. 0 2547A698 24
+. 80 BF 00 0C 80 97 01 58 83 9E 04 F4 80 FC 00 00 70 E8 04 00 40 82 04 E0
+
+==== BB 889 (0x2547A6B0) approx BBs exec'd 0 ====
+
+ 0x2547A6B0: 80D701F0 lwz r6,496(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x1F0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547A6B4: 38600000 li r3,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547A6B8: 2B860000 cmpli cr7,r6,0
+ 8: GETL R6, t6
+ 9: MOVL $0x0, t10
+ 10: CMPUL t6, t10, t8 (-rSo)
+ 11: ICRFL t8, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x2547A6BC: 409D0048 bc 4,29,0x2547A704
+ 13: Jc29o $0x2547A704
+
+
+. 0 2547A6B0 16
+. 80 D7 01 F0 38 60 00 00 2B 86 00 00 40 9D 00 48
+
+==== BB 890 (0x2547A704) approx BBs exec'd 0 ====
+
+ 0x2547A704: 807701E8 lwz r3,488(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x1E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547A708: 54A5103A rlwinm r5,r5,2,0,29
+ 5: GETL R5, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547A70C: 3B000001 li r24,1
+ 9: MOVL $0x1, t6
+ 10: PUTL t6, R24
+ 11: INCEIPL $4
+
+ 0x2547A710: 480094D1 bl 0x25483BE0
+ 12: MOVL $0x2547A714, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25483BE0 ($4)
+
+
+. 0 2547A704 16
+. 80 77 01 E8 54 A5 10 3A 3B 00 00 01 48 00 94 D1
+
+==== BB 891 (0x2547A714) approx BBs exec'd 0 ====
+
+ 0x2547A714: 80FF000C lwz r7,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547A718: 7C183840 cmpl cr0,r24,r7
+ 5: GETL R24, t4
+ 6: GETL R7, t6
+ 7: CMPUL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547A71C: 4080032C bc 4,0,0x2547AA48
+ 10: Jc00o $0x2547AA48
+
+
+. 0 2547A714 12
+. 80 FF 00 0C 7C 18 38 40 40 80 03 2C
+
+==== BB 892 (0x2547A720) approx BBs exec'd 0 ====
+
+ 0x2547A720: 815701E8 lwz r10,488(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x1E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547A724: 82570158 lwz r18,344(r23)
+ 5: GETL R23, t4
+ 6: ADDL $0x158, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R18
+ 9: INCEIPL $4
+
+ 0x2547A728: 5715103A rlwinm r21,r24,2,0,29
+ 10: GETL R24, t8
+ 11: SHLL $0x2, t8
+ 12: PUTL t8, R21
+ 13: INCEIPL $4
+
+ 0x2547A72C: 806A0004 lwz r3,4(r10)
+ 14: GETL R10, t10
+ 15: ADDL $0x4, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R3
+ 18: INCEIPL $4
+
+ 0x2547A730: 3B200001 li r25,1
+ 19: MOVL $0x1, t14
+ 20: PUTL t14, R25
+ 21: INCEIPL $4
+
+ 0x2547A734: 7F55902E lwzx r26,r21,r18
+ 22: GETL R18, t16
+ 23: GETL R21, t18
+ 24: ADDL t18, t16
+ 25: LDL (t16), t20
+ 26: PUTL t20, R26
+ 27: INCEIPL $4
+
+ 0x2547A738: 7F83D000 cmp cr7,r3,r26
+ 28: GETL R3, t22
+ 29: GETL R26, t24
+ 30: CMPL t22, t24, t26 (-rSo)
+ 31: ICRFL t26, $0x7, CR
+ 32: INCEIPL $4
+
+ 0x2547A73C: 419E0018 bc 12,30,0x2547A754
+ 33: Js30o $0x2547A754
+
+
+. 0 2547A720 32
+. 81 57 01 E8 82 57 01 58 57 15 10 3A 80 6A 00 04 3B 20 00 01 7F 55 90 2E 7F 83 D0 00 41 9E 00 18
+
+==== BB 893 (0x2547A754) approx BBs exec'd 0 ====
+
+ 0x2547A754: 3B790001 addi r27,r25,1
+ 0: GETL R25, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x2547A758: 7C9B3840 cmpl cr1,r27,r7
+ 4: GETL R27, t2
+ 5: GETL R7, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547A75C: 4084007C bc 4,4,0x2547A7D8
+ 9: Jc04o $0x2547A7D8
+
+
+. 0 2547A754 12
+. 3B 79 00 01 7C 9B 38 40 40 84 00 7C
+
+==== BB 894 (0x2547A760) approx BBs exec'd 0 ====
+
+ 0x2547A760: 5768103A rlwinm r8,r27,2,0,29
+ 0: GETL R27, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x2547A764: 7E68502E lwzx r19,r8,r10
+ 4: GETL R10, t2
+ 5: GETL R8, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R19
+ 9: INCEIPL $4
+
+ 0x2547A768: 817301E8 lwz r11,488(r19)
+ 10: GETL R19, t8
+ 11: ADDL $0x1E8, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547A76C: 2F0B0000 cmpi cr6,r11,0
+ 15: GETL R11, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0x2547A770: 419A005C bc 12,26,0x2547A7CC
+ 19: Js26o $0x2547A7CC
+
+
+. 0 2547A760 20
+. 57 68 10 3A 7E 68 50 2E 81 73 01 E8 2F 0B 00 00 41 9A 00 5C
+
+==== BB 895 (0x2547A774) approx BBs exec'd 0 ====
+
+ 0x2547A774: 812B0000 lwz r9,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547A778: 2F890000 cmpi cr7,r9,0
+ 4: GETL R9, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0x2547A77C: 419E0050 bc 12,30,0x2547A7CC
+ 8: Js30o $0x2547A7CC
+
+
+. 0 2547A774 12
+. 81 2B 00 00 2F 89 00 00 41 9E 00 50
+
+==== BB 896 (0x2547A780) approx BBs exec'd 0 ====
+
+ 0x2547A780: 7E19D850 subf r16,r25,r27
+ 0: GETL R25, t0
+ 1: GETL R27, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R16
+ 4: INCEIPL $4
+
+ 0x2547A784: 5605103A rlwinm r5,r16,2,0,29
+ 5: GETL R16, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547A788: 48000010 b 0x2547A798
+ 9: JMPo $0x2547A798 ($4)
+
+
+. 0 2547A780 12
+. 7E 19 D8 50 56 05 10 3A 48 00 00 10
+
+==== BB 897 (0x2547A798) approx BBs exec'd 0 ====
+
+ 0x2547A798: 7C09D000 cmp cr0,r9,r26
+ 0: GETL R9, t0
+ 1: GETL R26, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547A79C: 396B0004 addi r11,r11,4
+ 5: GETL R11, t6
+ 6: ADDL $0x4, t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0x2547A7A0: 4082FFEC bc 4,2,0x2547A78C
+ 9: Jc02o $0x2547A78C
+
+
+. 0 2547A798 12
+. 7C 09 D0 00 39 6B 00 04 40 82 FF EC
+
+==== BB 898 (0x2547A78C) approx BBs exec'd 0 ====
+
+ 0x2547A78C: 812B0000 lwz r9,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547A790: 2C890000 cmpi cr1,r9,0
+ 4: GETL R9, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x2547A794: 41860038 bc 12,6,0x2547A7CC
+ 8: Js06o $0x2547A7CC
+
+
+. 0 2547A78C 12
+. 81 2B 00 00 2C 89 00 00 41 86 00 38
+
+==== BB 899 (0x2547A7CC) approx BBs exec'd 0 ====
+
+ 0x2547A7CC: 3B7B0001 addi r27,r27,1
+ 0: GETL R27, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x2547A7D0: 7C9B3840 cmpl cr1,r27,r7
+ 4: GETL R27, t2
+ 5: GETL R7, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547A7D4: 4184FF8C bc 12,4,0x2547A760
+ 9: Js04o $0x2547A760
+
+
+. 0 2547A7CC 12
+. 3B 7B 00 01 7C 9B 38 40 41 84 FF 8C
+
+==== BB 900 (0x2547A7D8) approx BBs exec'd 0 ====
+
+ 0x2547A7D8: 3B180001 addi r24,r24,1
+ 0: GETL R24, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R24
+ 3: INCEIPL $4
+
+ 0x2547A7DC: 7F183840 cmpl cr6,r24,r7
+ 4: GETL R24, t2
+ 5: GETL R7, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547A7E0: 4198FF44 bc 12,24,0x2547A724
+ 9: Js24o $0x2547A724
+
+
+. 0 2547A7D8 12
+. 3B 18 00 01 7F 18 38 40 41 98 FF 44
+
+==== BB 901 (0x2547A724) approx BBs exec'd 0 ====
+
+ 0x2547A724: 82570158 lwz r18,344(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x158, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x2547A728: 5715103A rlwinm r21,r24,2,0,29
+ 5: GETL R24, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R21
+ 8: INCEIPL $4
+
+ 0x2547A72C: 806A0004 lwz r3,4(r10)
+ 9: GETL R10, t6
+ 10: ADDL $0x4, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0x2547A730: 3B200001 li r25,1
+ 14: MOVL $0x1, t10
+ 15: PUTL t10, R25
+ 16: INCEIPL $4
+
+ 0x2547A734: 7F55902E lwzx r26,r21,r18
+ 17: GETL R18, t12
+ 18: GETL R21, t14
+ 19: ADDL t14, t12
+ 20: LDL (t12), t16
+ 21: PUTL t16, R26
+ 22: INCEIPL $4
+
+ 0x2547A738: 7F83D000 cmp cr7,r3,r26
+ 23: GETL R3, t18
+ 24: GETL R26, t20
+ 25: CMPL t18, t20, t22 (-rSo)
+ 26: ICRFL t22, $0x7, CR
+ 27: INCEIPL $4
+
+ 0x2547A73C: 419E0018 bc 12,30,0x2547A754
+ 28: Js30o $0x2547A754
+
+
+. 0 2547A724 28
+. 82 57 01 58 57 15 10 3A 80 6A 00 04 3B 20 00 01 7F 55 90 2E 7F 83 D0 00 41 9E 00 18
+
+==== BB 902 (0x2547A740) approx BBs exec'd 0 ====
+
+ 0x2547A740: 3B390001 addi r25,r25,1
+ 0: GETL R25, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0x2547A744: 572E103A rlwinm r14,r25,2,0,29
+ 4: GETL R25, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R14
+ 7: INCEIPL $4
+
+ 0x2547A748: 7F6E502E lwzx r27,r14,r10
+ 8: GETL R10, t4
+ 9: GETL R14, t6
+ 10: ADDL t6, t4
+ 11: LDL (t4), t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0x2547A74C: 7F9BD000 cmp cr7,r27,r26
+ 14: GETL R27, t10
+ 15: GETL R26, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2547A750: 409EFFF0 bc 4,30,0x2547A740
+ 19: Jc30o $0x2547A740
+
+
+. 0 2547A740 20
+. 3B 39 00 01 57 2E 10 3A 7F 6E 50 2E 7F 9B D0 00 40 9E FF F0
+
+==== BB 903 (0x2547A7E4) approx BBs exec'd 0 ====
+
+ 0x2547A7E4: 2F910000 cmpi cr7,r17,0
+ 0: GETL R17, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547A7E8: 54F7103A rlwinm r23,r7,2,0,29
+ 4: GETL R7, t4
+ 5: SHLL $0x2, t4
+ 6: PUTL t4, R23
+ 7: INCEIPL $4
+
+ 0x2547A7EC: 3B400000 li r26,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R26
+ 10: INCEIPL $4
+
+ 0x2547A7F0: 7F57512E stwx r26,r23,r10
+ 11: GETL R10, t8
+ 12: GETL R23, t10
+ 13: ADDL t10, t8
+ 14: GETL R26, t12
+ 15: STL t12, (t8)
+ 16: INCEIPL $4
+
+ 0x2547A7F4: 409E06DC bc 4,30,0x2547AED0
+ 17: Jc30o $0x2547AED0
+
+
+. 0 2547A7E4 20
+. 2F 91 00 00 54 F7 10 3A 3B 40 00 00 7F 57 51 2E 40 9E 06 DC
+
+==== BB 904 (0x2547A7F8) approx BBs exec'd 0 ====
+
+ 0x2547A7F8: 81010000 lwz r8,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0x2547A7FC: 82280004 lwz r17,4(r8)
+ 4: GETL R8, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R17
+ 8: INCEIPL $4
+
+ 0x2547A800: 81C8FFB8 lwz r14,-72(r8)
+ 9: GETL R8, t8
+ 10: ADDL $0xFFFFFFB8, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R14
+ 13: INCEIPL $4
+
+ 0x2547A804: 7E2803A6 mtlr r17
+ 14: GETL R17, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x2547A808: 81E8FFBC lwz r15,-68(r8)
+ 17: GETL R8, t14
+ 18: ADDL $0xFFFFFFBC, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R15
+ 21: INCEIPL $4
+
+ 0x2547A80C: 8208FFC0 lwz r16,-64(r8)
+ 22: GETL R8, t18
+ 23: ADDL $0xFFFFFFC0, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R16
+ 26: INCEIPL $4
+
+ 0x2547A810: 8228FFC4 lwz r17,-60(r8)
+ 27: GETL R8, t22
+ 28: ADDL $0xFFFFFFC4, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R17
+ 31: INCEIPL $4
+
+ 0x2547A814: 8248FFC8 lwz r18,-56(r8)
+ 32: GETL R8, t26
+ 33: ADDL $0xFFFFFFC8, t26
+ 34: LDL (t26), t28
+ 35: PUTL t28, R18
+ 36: INCEIPL $4
+
+ 0x2547A818: 8268FFCC lwz r19,-52(r8)
+ 37: GETL R8, t30
+ 38: ADDL $0xFFFFFFCC, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R19
+ 41: INCEIPL $4
+
+ 0x2547A81C: 8288FFD0 lwz r20,-48(r8)
+ 42: GETL R8, t34
+ 43: ADDL $0xFFFFFFD0, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R20
+ 46: INCEIPL $4
+
+ 0x2547A820: 82A8FFD4 lwz r21,-44(r8)
+ 47: GETL R8, t38
+ 48: ADDL $0xFFFFFFD4, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R21
+ 51: INCEIPL $4
+
+ 0x2547A824: 82C8FFD8 lwz r22,-40(r8)
+ 52: GETL R8, t42
+ 53: ADDL $0xFFFFFFD8, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R22
+ 56: INCEIPL $4
+
+ 0x2547A828: 82E8FFDC lwz r23,-36(r8)
+ 57: GETL R8, t46
+ 58: ADDL $0xFFFFFFDC, t46
+ 59: LDL (t46), t48
+ 60: PUTL t48, R23
+ 61: INCEIPL $4
+
+ 0x2547A82C: 8308FFE0 lwz r24,-32(r8)
+ 62: GETL R8, t50
+ 63: ADDL $0xFFFFFFE0, t50
+ 64: LDL (t50), t52
+ 65: PUTL t52, R24
+ 66: INCEIPL $4
+
+ 0x2547A830: 8328FFE4 lwz r25,-28(r8)
+ 67: GETL R8, t54
+ 68: ADDL $0xFFFFFFE4, t54
+ 69: LDL (t54), t56
+ 70: PUTL t56, R25
+ 71: INCEIPL $4
+
+ 0x2547A834: 8348FFE8 lwz r26,-24(r8)
+ 72: GETL R8, t58
+ 73: ADDL $0xFFFFFFE8, t58
+ 74: LDL (t58), t60
+ 75: PUTL t60, R26
+ 76: INCEIPL $4
+
+ 0x2547A838: 8368FFEC lwz r27,-20(r8)
+ 77: GETL R8, t62
+ 78: ADDL $0xFFFFFFEC, t62
+ 79: LDL (t62), t64
+ 80: PUTL t64, R27
+ 81: INCEIPL $4
+
+ 0x2547A83C: 8388FFF0 lwz r28,-16(r8)
+ 82: GETL R8, t66
+ 83: ADDL $0xFFFFFFF0, t66
+ 84: LDL (t66), t68
+ 85: PUTL t68, R28
+ 86: INCEIPL $4
+
+ 0x2547A840: 83A8FFF4 lwz r29,-12(r8)
+ 87: GETL R8, t70
+ 88: ADDL $0xFFFFFFF4, t70
+ 89: LDL (t70), t72
+ 90: PUTL t72, R29
+ 91: INCEIPL $4
+
+ 0x2547A844: 83C8FFF8 lwz r30,-8(r8)
+ 92: GETL R8, t74
+ 93: ADDL $0xFFFFFFF8, t74
+ 94: LDL (t74), t76
+ 95: PUTL t76, R30
+ 96: INCEIPL $4
+
+ 0x2547A848: 83E8FFFC lwz r31,-4(r8)
+ 97: GETL R8, t78
+ 98: ADDL $0xFFFFFFFC, t78
+ 99: LDL (t78), t80
+ 100: PUTL t80, R31
+ 101: INCEIPL $4
+
+ 0x2547A84C: 7D014378 or r1,r8,r8
+ 102: GETL R8, t82
+ 103: PUTL t82, R1
+ 104: INCEIPL $4
+
+ 0x2547A850: 4E800020 blr
+ 105: GETL LR, t84
+ 106: JMPo-r t84 ($4)
+
+
+. 0 2547A7F8 92
+. 81 01 00 00 82 28 00 04 81 C8 FF B8 7E 28 03 A6 81 E8 FF BC 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
+
+==== BB 905 (0x254727E4) approx BBs exec'd 0 ====
+
+ 0x254727E4: 80F4015C lwz r7,348(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x15C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254727E8: 2C870000 cmpi cr1,r7,0
+ 5: GETL R7, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x254727EC: 4186003C bc 12,6,0x25472828
+ 9: Js06o $0x25472828
+
+
+. 0 254727E4 12
+. 80 F4 01 5C 2C 87 00 00 41 86 00 3C
+
+==== BB 906 (0x254727F0) approx BBs exec'd 0 ====
+
+ 0x254727F0: 81140158 lwz r8,344(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x158, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254727F4: 7CE903A6 mtctr r7
+ 5: GETL R7, t4
+ 6: PUTL t4, CTR
+ 7: INCEIPL $4
+
+ 0x254727F8: 38E7FFFF addi r7,r7,-1
+ 8: GETL R7, t6
+ 9: ADDL $0xFFFFFFFF, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0x254727FC: 54F1103A rlwinm r17,r7,2,0,29
+ 12: GETL R7, t8
+ 13: SHLL $0x2, t8
+ 14: PUTL t8, R17
+ 15: INCEIPL $4
+
+ 0x25472800: 7F11402E lwzx r24,r17,r8
+ 16: GETL R8, t10
+ 17: GETL R17, t12
+ 18: ADDL t12, t10
+ 19: LDL (t10), t14
+ 20: PUTL t14, R24
+ 21: INCEIPL $4
+
+ 0x25472804: 82B80180 lwz r21,384(r24)
+ 22: GETL R24, t16
+ 23: ADDL $0x180, t16
+ 24: LDL (t16), t18
+ 25: PUTL t18, R21
+ 26: INCEIPL $4
+
+ 0x25472808: 66A80800 oris r8,r21,0x800
+ 27: GETL R21, t20
+ 28: ORL $0x8000000, t20
+ 29: PUTL t20, R8
+ 30: INCEIPL $4
+
+ 0x2547280C: 91180180 stw r8,384(r24)
+ 31: GETL R8, t22
+ 32: GETL R24, t24
+ 33: ADDL $0x180, t24
+ 34: STL t22, (t24)
+ 35: INCEIPL $4
+
+ 0x25472810: 81140158 lwz r8,344(r20)
+ 36: GETL R20, t26
+ 37: ADDL $0x158, t26
+ 38: LDL (t26), t28
+ 39: PUTL t28, R8
+ 40: INCEIPL $4
+
+ 0x25472814: 7F31402E lwzx r25,r17,r8
+ 41: GETL R8, t30
+ 42: GETL R17, t32
+ 43: ADDL t32, t30
+ 44: LDL (t30), t34
+ 45: PUTL t34, R25
+ 46: INCEIPL $4
+
+ 0x25472818: 81390178 lwz r9,376(r25)
+ 47: GETL R25, t36
+ 48: ADDL $0x178, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R9
+ 51: INCEIPL $4
+
+ 0x2547281C: 3B890001 addi r28,r9,1
+ 52: GETL R9, t40
+ 53: ADDL $0x1, t40
+ 54: PUTL t40, R28
+ 55: INCEIPL $4
+
+ 0x25472820: 93990178 stw r28,376(r25)
+ 56: GETL R28, t42
+ 57: GETL R25, t44
+ 58: ADDL $0x178, t44
+ 59: STL t42, (t44)
+ 60: INCEIPL $4
+
+ 0x25472824: 4200FFD4 bc 16,0,0x254727F8
+ 61: GETL CTR, t46
+ 62: ADDL $0xFFFFFFFF, t46
+ 63: PUTL t46, CTR
+ 64: JIFZL t46, $0x25472828
+ 65: JMPo $0x254727F8 ($4)
+
+
+. 0 254727F0 56
+. 81 14 01 58 7C E9 03 A6 38 E7 FF FF 54 F1 10 3A 7F 11 40 2E 82 B8 01 80 66 A8 08 00 91 18 01 80 81 14 01 58 7F 31 40 2E 81 39 01 78 3B 89 00 01 93 99 01 78 42 00 FF D4
+
+==== BB 907 (0x254727F8) approx BBs exec'd 0 ====
+
+ 0x254727F8: 38E7FFFF addi r7,r7,-1
+ 0: GETL R7, t0
+ 1: ADDL $0xFFFFFFFF, t0
+ 2: PUTL t0, R7
+ 3: INCEIPL $4
+
+ 0x254727FC: 54F1103A rlwinm r17,r7,2,0,29
+ 4: GETL R7, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R17
+ 7: INCEIPL $4
+
+ 0x25472800: 7F11402E lwzx r24,r17,r8
+ 8: GETL R8, t4
+ 9: GETL R17, t6
+ 10: ADDL t6, t4
+ 11: LDL (t4), t8
+ 12: PUTL t8, R24
+ 13: INCEIPL $4
+
+ 0x25472804: 82B80180 lwz r21,384(r24)
+ 14: GETL R24, t10
+ 15: ADDL $0x180, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R21
+ 18: INCEIPL $4
+
+ 0x25472808: 66A80800 oris r8,r21,0x800
+ 19: GETL R21, t14
+ 20: ORL $0x8000000, t14
+ 21: PUTL t14, R8
+ 22: INCEIPL $4
+
+ 0x2547280C: 91180180 stw r8,384(r24)
+ 23: GETL R8, t16
+ 24: GETL R24, t18
+ 25: ADDL $0x180, t18
+ 26: STL t16, (t18)
+ 27: INCEIPL $4
+
+ 0x25472810: 81140158 lwz r8,344(r20)
+ 28: GETL R20, t20
+ 29: ADDL $0x158, t20
+ 30: LDL (t20), t22
+ 31: PUTL t22, R8
+ 32: INCEIPL $4
+
+ 0x25472814: 7F31402E lwzx r25,r17,r8
+ 33: GETL R8, t24
+ 34: GETL R17, t26
+ 35: ADDL t26, t24
+ 36: LDL (t24), t28
+ 37: PUTL t28, R25
+ 38: INCEIPL $4
+
+ 0x25472818: 81390178 lwz r9,376(r25)
+ 39: GETL R25, t30
+ 40: ADDL $0x178, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R9
+ 43: INCEIPL $4
+
+ 0x2547281C: 3B890001 addi r28,r9,1
+ 44: GETL R9, t34
+ 45: ADDL $0x1, t34
+ 46: PUTL t34, R28
+ 47: INCEIPL $4
+
+ 0x25472820: 93990178 stw r28,376(r25)
+ 48: GETL R28, t36
+ 49: GETL R25, t38
+ 50: ADDL $0x178, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x25472824: 4200FFD4 bc 16,0,0x254727F8
+ 53: GETL CTR, t40
+ 54: ADDL $0xFFFFFFFF, t40
+ 55: PUTL t40, CTR
+ 56: JIFZL t40, $0x25472828
+ 57: JMPo $0x254727F8 ($4)
+
+
+. 0 254727F8 48
+. 38 E7 FF FF 54 F1 10 3A 7F 11 40 2E 82 B8 01 80 66 A8 08 00 91 18 01 80 81 14 01 58 7F 31 40 2E 81 39 01 78 3B 89 00 01 93 99 01 78 42 00 FF D4
+
+==== BB 908 (0x25472828) approx BBs exec'd 0 ====
+
+ 0x25472828: 816E01C8 lwz r11,456(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547282C: 80EE01C4 lwz r7,452(r14)
+ 5: GETL R14, t4
+ 6: ADDL $0x1C4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0x25472830: 90EB000C stw r7,12(r11)
+ 10: GETL R7, t8
+ 11: GETL R11, t10
+ 12: ADDL $0xC, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x25472834: 812E01C4 lwz r9,452(r14)
+ 15: GETL R14, t12
+ 16: ADDL $0x1C4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25472838: 2E090000 cmpi cr4,r9,0
+ 20: GETL R9, t16
+ 21: CMP0L t16, t18 (-rSo)
+ 22: ICRFL t18, $0x4, CR
+ 23: INCEIPL $4
+
+ 0x2547283C: 41920008 bc 12,18,0x25472844
+ 24: Js18o $0x25472844
+
+
+. 0 25472828 24
+. 81 6E 01 C8 80 EE 01 C4 90 EB 00 0C 81 2E 01 C4 2E 09 00 00 41 92 00 08
+
+==== BB 909 (0x25472840) approx BBs exec'd 0 ====
+
+ 0x25472840: 91690010 stw r11,16(r9)
+ 0: GETL R11, t0
+ 1: GETL R9, t2
+ 2: ADDL $0x10, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25472844: 814E0330 lwz r10,816(r14)
+ 5: GETL R14, t4
+ 6: ADDL $0x330, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x25472848: 2B0A0001 cmpli cr6,r10,1
+ 10: GETL R10, t8
+ 11: MOVL $0x1, t12
+ 12: CMPUL t8, t12, t10 (-rSo)
+ 13: ICRFL t10, $0x6, CR
+ 14: INCEIPL $4
+
+ 0x2547284C: 40991358 bc 4,25,0x25473BA4
+ 15: Jc25o $0x25473BA4
+
+
+. 0 25472840 16
+. 91 69 00 10 81 4E 03 30 2B 0A 00 01 40 99 13 58
+
+==== BB 910 (0x25472850) approx BBs exec'd 0 ====
+
+ 0x25472850: 81540158 lwz r10,344(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x158, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25472854: 390E01B8 addi r8,r14,440
+ 5: GETL R14, t4
+ 6: ADDL $0x1B8, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x25472858: 39200001 li r9,1
+ 9: MOVL $0x1, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0x2547285C: 39600004 li r11,4
+ 12: MOVL $0x4, t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0x25472860: 806A0004 lwz r3,4(r10)
+ 15: GETL R10, t10
+ 16: ADDL $0x4, t10
+ 17: LDL (t10), t12
+ 18: PUTL t12, R3
+ 19: INCEIPL $4
+
+ 0x25472864: 7F834000 cmp cr7,r3,r8
+ 20: GETL R3, t14
+ 21: GETL R8, t16
+ 22: CMPL t14, t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0x25472868: 419E0018 bc 12,30,0x25472880
+ 25: Js30o $0x25472880
+
+
+. 0 25472850 28
+. 81 54 01 58 39 0E 01 B8 39 20 00 01 39 60 00 04 80 6A 00 04 7F 83 40 00 41 9E 00 18
+
+==== BB 911 (0x2547286C) approx BBs exec'd 0 ====
+
+ 0x2547286C: 39290001 addi r9,r9,1
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x25472870: 552B103A rlwinm r11,r9,2,0,29
+ 4: GETL R9, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R11
+ 7: INCEIPL $4
+
+ 0x25472874: 7C8B502E lwzx r4,r11,r10
+ 8: GETL R10, t4
+ 9: GETL R11, t6
+ 10: ADDL t6, t4
+ 11: LDL (t4), t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x25472878: 7F844000 cmp cr7,r4,r8
+ 14: GETL R4, t10
+ 15: GETL R8, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2547287C: 409EFFF0 bc 4,30,0x2547286C
+ 19: Jc30o $0x2547286C
+
+
+. 0 2547286C 20
+. 39 29 00 01 55 2B 10 3A 7C 8B 50 2E 7F 84 40 00 40 9E FF F0
+
+==== BB 912 (0x25472880) approx BBs exec'd 0 ====
+
+ 0x25472880: 811F0030 lwz r8,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25472884: 7D4B5214 add r10,r11,r10
+ 5: GETL R11, t4
+ 6: GETL R10, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x25472888: 816AFFFC lwz r11,-4(r10)
+ 10: GETL R10, t8
+ 11: ADDL $0xFFFFFFFC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547288C: 2C080000 cmpi cr0,r8,0
+ 15: GETL R8, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x25472890: 916E01C8 stw r11,456(r14)
+ 19: GETL R11, t16
+ 20: GETL R14, t18
+ 21: ADDL $0x1C8, t18
+ 22: STL t16, (t18)
+ 23: INCEIPL $4
+
+ 0x25472894: 40820F34 bc 4,2,0x254737C8
+ 24: Jc02o $0x254737C8
+
+
+. 0 25472880 24
+. 81 1F 00 30 7D 4B 52 14 81 6A FF FC 2C 08 00 00 91 6E 01 C8 40 82 0F 34
+
+==== BB 913 (0x25472898) approx BBs exec'd 0 ====
+
+ 0x25472898: 8274015C lwz r19,348(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x15C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0x2547289C: 3AE90001 addi r23,r9,1
+ 5: GETL R9, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R23
+ 8: INCEIPL $4
+
+ 0x254728A0: 38000000 li r0,0
+ 9: MOVL $0x0, t6
+ 10: PUTL t6, R0
+ 11: INCEIPL $4
+
+ 0x254728A4: 7DC97378 or r9,r14,r14
+ 12: GETL R14, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x254728A8: 7F979840 cmpl cr7,r23,r19
+ 15: GETL R23, t10
+ 16: GETL R19, t12
+ 17: CMPUL t10, t12, t14 (-rSo)
+ 18: ICRFL t14, $0x7, CR
+ 19: INCEIPL $4
+
+ 0x254728AC: 409C0008 bc 4,28,0x254728B4
+ 20: Jc28o $0x254728B4
+
+
+. 0 25472898 24
+. 82 74 01 5C 3A E9 00 01 38 00 00 00 7D C9 73 78 7F 97 98 40 40 9C 00 08
+
+==== BB 914 (0x254728B4) approx BBs exec'd 0 ====
+
+ 0x254728B4: 900901C4 stw r0,452(r9)
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ADDL $0x1C4, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254728B8: 820E01C8 lwz r16,456(r14)
+ 5: GETL R14, t4
+ 6: ADDL $0x1C8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R16
+ 9: INCEIPL $4
+
+ 0x254728BC: 380E01B8 addi r0,r14,440
+ 10: GETL R14, t8
+ 11: ADDL $0x1B8, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x254728C0: 9010000C stw r0,12(r16)
+ 14: GETL R0, t10
+ 15: GETL R16, t12
+ 16: ADDL $0xC, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x254728C4: 812E01C4 lwz r9,452(r14)
+ 19: GETL R14, t14
+ 20: ADDL $0x1C4, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R9
+ 23: INCEIPL $4
+
+ 0x254728C8: 2C890000 cmpi cr1,r9,0
+ 24: GETL R9, t18
+ 25: CMP0L t18, t20 (-rSo)
+ 26: ICRFL t20, $0x1, CR
+ 27: INCEIPL $4
+
+ 0x254728CC: 41860008 bc 12,6,0x254728D4
+ 28: Js06o $0x254728D4
+
+
+. 0 254728B4 28
+. 90 09 01 C4 82 0E 01 C8 38 0E 01 B8 90 10 00 0C 81 2E 01 C4 2C 89 00 00 41 86 00 08
+
+==== BB 915 (0x254728D4) approx BBs exec'd 0 ====
+
+ 0x254728D4: 807E002C lwz r3,44(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x2C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254728D8: 691A0003 xori r26,r8,0x3
+ 5: GETL R8, t4
+ 6: XORL $0x3, t4
+ 7: PUTL t4, R26
+ 8: INCEIPL $4
+
+ 0x254728DC: 201A0000 subfic r0,r26,0
+ 9: GETL R26, t6
+ 10: MOVL $0x0, t8
+ 11: SBBL t6, t8 (-wCa)
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x254728E0: 7F40D114 adde r26,r0,r26
+ 14: GETL R0, t10
+ 15: GETL R26, t12
+ 16: ADCL t10, t12 (-rCa-wCa)
+ 17: PUTL t12, R26
+ 18: INCEIPL $4
+
+ 0x254728E4: 809E0014 lwz r4,20(r30)
+ 19: GETL R30, t14
+ 20: ADDL $0x14, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R4
+ 23: INCEIPL $4
+
+ 0x254728E8: 21480000 subfic r10,r8,0
+ 24: GETL R8, t18
+ 25: MOVL $0x0, t20
+ 26: SBBL t18, t20 (-wCa)
+ 27: PUTL t20, R10
+ 28: INCEIPL $4
+
+ 0x254728EC: 7FAA4114 adde r29,r10,r8
+ 29: GETL R10, t22
+ 30: GETL R8, t24
+ 31: ADCL t22, t24 (-rCa-wCa)
+ 32: PUTL t24, R29
+ 33: INCEIPL $4
+
+ 0x254728F0: 38BF0058 addi r5,r31,88
+ 34: GETL R31, t26
+ 35: ADDL $0x58, t26
+ 36: PUTL t26, R5
+ 37: INCEIPL $4
+
+ 0x254728F4: 93BF0058 stw r29,88(r31)
+ 38: GETL R29, t28
+ 39: GETL R31, t30
+ 40: ADDL $0x58, t30
+ 41: STL t28, (t30)
+ 42: INCEIPL $4
+
+ 0x254728F8: 935F005C stw r26,92(r31)
+ 43: GETL R26, t32
+ 44: GETL R31, t34
+ 45: ADDL $0x5C, t34
+ 46: STL t32, (t34)
+ 47: INCEIPL $4
+
+ 0x254728FC: 48008D9D bl 0x2547B698
+ 48: MOVL $0x25472900, t36
+ 49: PUTL t36, LR
+ 50: JMPo-c $0x2547B698 ($4)
+
+
+. 0 254728D4 44
+. 80 7E 00 2C 69 1A 00 03 20 1A 00 00 7F 40 D1 14 80 9E 00 14 21 48 00 00 7F AA 41 14 38 BF 00 58 93 BF 00 58 93 5F 00 5C 48 00 8D 9D
+
+==== BB 916 _dl_receive_error(0x2547B698) approx BBs exec'd 0 ====
+
+ 0x2547B698: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547B69C: 7CC802A6 mflr r6
+ 6: GETL LR, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x2547B6A0: 4801B961 bl 0x25497000
+ 9: MOVL $0x2547B6A4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547B698 12
+. 94 21 FF D0 7C C8 02 A6 48 01 B9 61
+
+==== BB 917 (0x2547B6A4) approx BBs exec'd 0 ====
+
+ 0x2547B6A4: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547B6A8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547B6AC: 9361001C stw r27,28(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547B6B0: 7CBB2B78 or r27,r5,r5
+ 13: GETL R5, t10
+ 14: PUTL t10, R27
+ 15: INCEIPL $4
+
+ 0x2547B6B4: 90C10034 stw r6,52(r1)
+ 16: GETL R6, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x34, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x2547B6B8: 92E1000C stw r23,12(r1)
+ 21: GETL R23, t16
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547B6BC: 7C972378 or r23,r4,r4
+ 26: GETL R4, t20
+ 27: PUTL t20, R23
+ 28: INCEIPL $4
+
+ 0x2547B6C0: 80BE04C8 lwz r5,1224(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x4C8, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R5
+ 33: INCEIPL $4
+
+ 0x2547B6C4: 93210014 stw r25,20(r1)
+ 34: GETL R25, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x14, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x2547B6C8: 7C791B78 or r25,r3,r3
+ 39: GETL R3, t30
+ 40: PUTL t30, R25
+ 41: INCEIPL $4
+
+ 0x2547B6CC: 812501B4 lwz r9,436(r5)
+ 42: GETL R5, t32
+ 43: ADDL $0x1B4, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R9
+ 46: INCEIPL $4
+
+ 0x2547B6D0: 93410018 stw r26,24(r1)
+ 47: GETL R26, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x18, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0x2547B6D4: 93810020 stw r28,32(r1)
+ 52: GETL R28, t40
+ 53: GETL R1, t42
+ 54: ADDL $0x20, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0x2547B6D8: 7D2903A6 mtctr r9
+ 57: GETL R9, t44
+ 58: PUTL t44, CTR
+ 59: INCEIPL $4
+
+ 0x2547B6DC: 93A10024 stw r29,36(r1)
+ 60: GETL R29, t46
+ 61: GETL R1, t48
+ 62: ADDL $0x24, t48
+ 63: STL t46, (t48)
+ 64: INCEIPL $4
+
+ 0x2547B6E0: 839E031C lwz r28,796(r30)
+ 65: GETL R30, t50
+ 66: ADDL $0x31C, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R28
+ 69: INCEIPL $4
+
+ 0x2547B6E4: 4E800421 bctrl
+ 70: MOVL $0x2547B6E8, t54
+ 71: PUTL t54, LR
+ 72: GETL CTR, t56
+ 73: JMPo-c t56 ($4)
+
+
+. 0 2547B6A4 68
+. 93 C1 00 28 7F C8 02 A6 93 61 00 1C 7C BB 2B 78 90 C1 00 34 92 E1 00 0C 7C 97 23 78 80 BE 04 C8 93 21 00 14 7C 79 1B 78 81 25 01 B4 93 41 00 18 93 81 00 20 7D 29 03 A6 93 A1 00 24 83 9E 03 1C 4E 80 04 21
+
+==== BB 918 (0x2547B6E8) approx BBs exec'd 0 ====
+
+ 0x2547B6E8: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547B6EC: 7C7D1B78 or r29,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R29
+ 5: INCEIPL $4
+
+ 0x2547B6F0: 7EE803A6 mtlr r23
+ 6: GETL R23, t4
+ 7: PUTL t4, LR
+ 8: INCEIPL $4
+
+ 0x2547B6F4: 835D0000 lwz r26,0(r29)
+ 9: GETL R29, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x2547B6F8: 7F63DB78 or r3,r27,r27
+ 13: GETL R27, t10
+ 14: PUTL t10, R3
+ 15: INCEIPL $4
+
+ 0x2547B6FC: 909D0000 stw r4,0(r29)
+ 16: GETL R4, t12
+ 17: GETL R29, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x2547B700: 837C0000 lwz r27,0(r28)
+ 20: GETL R28, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R27
+ 23: INCEIPL $4
+
+ 0x2547B704: 933C0000 stw r25,0(r28)
+ 24: GETL R25, t20
+ 25: GETL R28, t22
+ 26: STL t20, (t22)
+ 27: INCEIPL $4
+
+ 0x2547B708: 4E800021 blrl
+ 28: GETL LR, t24
+ 29: MOVL $0x2547B70C, t26
+ 30: PUTL t26, LR
+ 31: JMPo-r t24 ($4)
+
+
+. 0 2547B6E8 36
+. 38 80 00 00 7C 7D 1B 78 7E E8 03 A6 83 5D 00 00 7F 63 DB 78 90 9D 00 00 83 7C 00 00 93 3C 00 00 4E 80 00 21
+
+==== BB 919 version_check_doit(0x254717D4) approx BBs exec'd 0 ====
+
+ 0x254717D4: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x254717D8: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x254717DC: 48025825 bl 0x25497000
+ 9: MOVL $0x254717E0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 254717D4 12
+. 94 21 FF E0 7C 08 02 A6 48 02 58 25
+
+==== BB 920 (0x254717E0) approx BBs exec'd 0 ====
+
+ 0x254717E0: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254717E4: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x254717E8: 93E1001C stw r31,28(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x254717EC: 90010024 stw r0,36(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254717F0: 7C7F1B78 or r31,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0x254717F4: 80BF0004 lwz r5,4(r31)
+ 21: GETL R31, t16
+ 22: ADDL $0x4, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R5
+ 25: INCEIPL $4
+
+ 0x254717F8: 38800001 li r4,1
+ 26: MOVL $0x1, t20
+ 27: PUTL t20, R4
+ 28: INCEIPL $4
+
+ 0x254717FC: 813E04C8 lwz r9,1224(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x4C8, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R9
+ 33: INCEIPL $4
+
+ 0x25471800: 93A10014 stw r29,20(r1)
+ 34: GETL R29, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x14, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0x25471804: 80690000 lwz r3,0(r9)
+ 39: GETL R9, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R3
+ 42: INCEIPL $4
+
+ 0x25471808: 4800B7C1 bl 0x2547CFC8
+ 43: MOVL $0x2547180C, t34
+ 44: PUTL t34, LR
+ 45: JMPo-c $0x2547CFC8 ($4)
+
+
+. 0 254717E0 44
+. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 01 00 24 7C 7F 1B 78 80 BF 00 04 38 80 00 01 81 3E 04 C8 93 A1 00 14 80 69 00 00 48 00 B7 C1
+
+==== BB 921 _dl_check_all_versions(0x2547CFC8) approx BBs exec'd 0 ====
+
+ 0x2547CFC8: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547CFCC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547CFD0: 93E1001C stw r31,28(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547CFD4: 7C7F1B79 or. r31,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R31
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x2547CFD8: 93410008 stw r26,8(r1)
+ 19: GETL R26, t14
+ 20: GETL R1, t16
+ 21: ADDL $0x8, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x2547CFDC: 7C9A2378 or r26,r4,r4
+ 24: GETL R4, t18
+ 25: PUTL t18, R26
+ 26: INCEIPL $4
+
+ 0x2547CFE0: 9361000C stw r27,12(r1)
+ 27: GETL R27, t20
+ 28: GETL R1, t22
+ 29: ADDL $0xC, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0x2547CFE4: 7CBB2B78 or r27,r5,r5
+ 32: GETL R5, t24
+ 33: PUTL t24, R27
+ 34: INCEIPL $4
+
+ 0x2547CFE8: 93810010 stw r28,16(r1)
+ 35: GETL R28, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x10, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0x2547CFEC: 3B800000 li r28,0
+ 40: MOVL $0x0, t30
+ 41: PUTL t30, R28
+ 42: INCEIPL $4
+
+ 0x2547CFF0: 93A10014 stw r29,20(r1)
+ 43: GETL R29, t32
+ 44: GETL R1, t34
+ 45: ADDL $0x14, t34
+ 46: STL t32, (t34)
+ 47: INCEIPL $4
+
+ 0x2547CFF4: 93C10018 stw r30,24(r1)
+ 48: GETL R30, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x18, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x2547CFF8: 90010024 stw r0,36(r1)
+ 53: GETL R0, t40
+ 54: GETL R1, t42
+ 55: ADDL $0x24, t42
+ 56: STL t40, (t42)
+ 57: INCEIPL $4
+
+ 0x2547CFFC: 40A20018 bc 5,2,0x2547D014
+ 58: Jc02o $0x2547D014
+
+
+. 0 2547CFC8 56
+. 94 21 FF E0 7C 08 02 A6 93 E1 00 1C 7C 7F 1B 79 93 41 00 08 7C 9A 23 78 93 61 00 0C 7C BB 2B 78 93 81 00 10 3B 80 00 00 93 A1 00 14 93 C1 00 18 90 01 00 24 40 A2 00 18
+
+==== BB 922 (0x2547D014) approx BBs exec'd 0 ====
+
+ 0x2547D014: 80DF0180 lwz r6,384(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547D018: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547D01C: 7F44D378 or r4,r26,r26
+ 8: GETL R26, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x2547D020: 7F65DB78 or r5,r27,r27
+ 11: GETL R27, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0x2547D024: 74C90040 andis. r9,r6,0x40
+ 14: GETL R6, t10
+ 15: ANDL $0x400000, t10
+ 16: PUTL t10, R9
+ 17: CMP0L t10, t12 (-rSo)
+ 18: ICRFL t12, $0x0, CR
+ 19: INCEIPL $4
+
+ 0x2547D028: 3BA00000 li r29,0
+ 20: MOVL $0x0, t14
+ 21: PUTL t14, R29
+ 22: INCEIPL $4
+
+ 0x2547D02C: 4082FFD8 bc 4,2,0x2547D004
+ 23: Jc02o $0x2547D004
+
+
+. 0 2547D014 28
+. 80 DF 01 80 7F E3 FB 78 7F 44 D3 78 7F 65 DB 78 74 C9 00 40 3B A0 00 00 40 82 FF D8
+
+==== BB 923 (0x2547D030) approx BBs exec'd 0 ====
+
+ 0x2547D030: 4BFFFB41 bl 0x2547CB70
+ 0: MOVL $0x2547D034, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547CB70 ($4)
+
+
+. 0 2547D030 4
+. 4B FF FB 41
+
+==== BB 924 _dl_check_map_versions(0x2547CB70) approx BBs exec'd 0 ====
+
+ 0x2547CB70: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x2547CB74: 9421FF60 stwu r1,-160(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFF60, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547CB78: 7D800026 mfcr r12
+ 9: GETL CR, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x2547CB7C: 4801A485 bl 0x25497000
+ 12: MOVL $0x2547CB80, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547CB70 16
+. 7C 08 02 A6 94 21 FF 60 7D 80 00 26 48 01 A4 85
+
+==== BB 925 (0x2547CB80) approx BBs exec'd 0 ====
+
+ 0x2547CB80: 92010060 stw r16,96(r1)
+ 0: GETL R16, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x60, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547CB84: 3A000000 li r16,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R16
+ 7: INCEIPL $4
+
+ 0x2547CB88: 900100A4 stw r0,164(r1)
+ 8: GETL R0, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xA4, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547CB8C: 81230034 lwz r9,52(r3)
+ 13: GETL R3, t10
+ 14: ADDL $0x34, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x2547CB90: 92A10074 stw r21,116(r1)
+ 18: GETL R21, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x74, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x2547CB94: 7C952378 or r21,r4,r4
+ 23: GETL R4, t18
+ 24: PUTL t18, R21
+ 25: INCEIPL $4
+
+ 0x2547CB98: 2F890000 cmpi cr7,r9,0
+ 26: GETL R9, t20
+ 27: CMP0L t20, t22 (-rSo)
+ 28: ICRFL t22, $0x7, CR
+ 29: INCEIPL $4
+
+ 0x2547CB9C: 92C10078 stw r22,120(r1)
+ 30: GETL R22, t24
+ 31: GETL R1, t26
+ 32: ADDL $0x78, t26
+ 33: STL t24, (t26)
+ 34: INCEIPL $4
+
+ 0x2547CBA0: 93010080 stw r24,128(r1)
+ 35: GETL R24, t28
+ 36: GETL R1, t30
+ 37: ADDL $0x80, t30
+ 38: STL t28, (t30)
+ 39: INCEIPL $4
+
+ 0x2547CBA4: 3AC00000 li r22,0
+ 40: MOVL $0x0, t32
+ 41: PUTL t32, R22
+ 42: INCEIPL $4
+
+ 0x2547CBA8: 9361008C stw r27,140(r1)
+ 43: GETL R27, t34
+ 44: GETL R1, t36
+ 45: ADDL $0x8C, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x2547CBAC: 3B000000 li r24,0
+ 48: MOVL $0x0, t38
+ 49: PUTL t38, R24
+ 50: INCEIPL $4
+
+ 0x2547CBB0: 93C10098 stw r30,152(r1)
+ 51: GETL R30, t40
+ 52: GETL R1, t42
+ 53: ADDL $0x98, t42
+ 54: STL t40, (t42)
+ 55: INCEIPL $4
+
+ 0x2547CBB4: 7C7B1B78 or r27,r3,r3
+ 56: GETL R3, t44
+ 57: PUTL t44, R27
+ 58: INCEIPL $4
+
+ 0x2547CBB8: 93E1009C stw r31,156(r1)
+ 59: GETL R31, t46
+ 60: GETL R1, t48
+ 61: ADDL $0x9C, t48
+ 62: STL t46, (t48)
+ 63: INCEIPL $4
+
+ 0x2547CBBC: 7FC802A6 mflr r30
+ 64: GETL LR, t50
+ 65: PUTL t50, R30
+ 66: INCEIPL $4
+
+ 0x2547CBC0: 92210064 stw r17,100(r1)
+ 67: GETL R17, t52
+ 68: GETL R1, t54
+ 69: ADDL $0x64, t54
+ 70: STL t52, (t54)
+ 71: INCEIPL $4
+
+ 0x2547CBC4: 7C3F0B78 or r31,r1,r1
+ 72: GETL R1, t56
+ 73: PUTL t56, R31
+ 74: INCEIPL $4
+
+ 0x2547CBC8: 92410068 stw r18,104(r1)
+ 75: GETL R18, t58
+ 76: GETL R1, t60
+ 77: ADDL $0x68, t60
+ 78: STL t58, (t60)
+ 79: INCEIPL $4
+
+ 0x2547CBCC: 38600000 li r3,0
+ 80: MOVL $0x0, t62
+ 81: PUTL t62, R3
+ 82: INCEIPL $4
+
+ 0x2547CBD0: 9261006C stw r19,108(r1)
+ 83: GETL R19, t64
+ 84: GETL R1, t66
+ 85: ADDL $0x6C, t66
+ 86: STL t64, (t66)
+ 87: INCEIPL $4
+
+ 0x2547CBD4: 92810070 stw r20,112(r1)
+ 88: GETL R20, t68
+ 89: GETL R1, t70
+ 90: ADDL $0x70, t70
+ 91: STL t68, (t70)
+ 92: INCEIPL $4
+
+ 0x2547CBD8: 92E1007C stw r23,124(r1)
+ 93: GETL R23, t72
+ 94: GETL R1, t74
+ 95: ADDL $0x7C, t74
+ 96: STL t72, (t74)
+ 97: INCEIPL $4
+
+ 0x2547CBDC: 93210084 stw r25,132(r1)
+ 98: GETL R25, t76
+ 99: GETL R1, t78
+ 100: ADDL $0x84, t78
+ 101: STL t76, (t78)
+ 102: INCEIPL $4
+
+ 0x2547CBE0: 93410088 stw r26,136(r1)
+ 103: GETL R26, t80
+ 104: GETL R1, t82
+ 105: ADDL $0x88, t82
+ 106: STL t80, (t82)
+ 107: INCEIPL $4
+
+ 0x2547CBE4: 93810090 stw r28,144(r1)
+ 108: GETL R28, t84
+ 109: GETL R1, t86
+ 110: ADDL $0x90, t86
+ 111: STL t84, (t86)
+ 112: INCEIPL $4
+
+ 0x2547CBE8: 93A10094 stw r29,148(r1)
+ 113: GETL R29, t88
+ 114: GETL R1, t90
+ 115: ADDL $0x94, t90
+ 116: STL t88, (t90)
+ 117: INCEIPL $4
+
+ 0x2547CBEC: 9181005C stw r12,92(r1)
+ 118: GETL R12, t92
+ 119: GETL R1, t94
+ 120: ADDL $0x5C, t94
+ 121: STL t92, (t94)
+ 122: INCEIPL $4
+
+ 0x2547CBF0: 419E0180 bc 12,30,0x2547CD70
+ 123: Js30o $0x2547CD70
+
+
+. 0 2547CB80 116
+. 92 01 00 60 3A 00 00 00 90 01 00 A4 81 23 00 34 92 A1 00 74 7C 95 23 78 2F 89 00 00 92 C1 00 78 93 01 00 80 3A C0 00 00 93 61 00 8C 3B 00 00 00 93 C1 00 98 7C 7B 1B 78 93 E1 00 9C 7F C8 02 A6 92 21 00 64 7C 3F 0B 78 92 41 00 68 38 60 00 00 92 61 00 6C 92 81 00 70 92 E1 00 7C 93 21 00 84 93 41 00 88 93 81 00 90 93 A1 00 94 91 81 00 5C 41 9E 01 80
+
+==== BB 926 (0x2547CBF4) approx BBs exec'd 0 ====
+
+ 0x2547CBF4: 825B00AC lwz r18,172(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xAC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x2547CBF8: 83290004 lwz r25,4(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0x2547CBFC: 2D920000 cmpi cr3,r18,0
+ 10: GETL R18, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x3, CR
+ 13: INCEIPL $4
+
+ 0x2547CC00: 823B00B4 lwz r17,180(r27)
+ 14: GETL R27, t12
+ 15: ADDL $0xB4, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R17
+ 18: INCEIPL $4
+
+ 0x2547CC04: 418E0128 bc 12,14,0x2547CD2C
+ 19: Js14o $0x2547CD2C
+
+
+. 0 2547CBF4 20
+. 82 5B 00 AC 83 29 00 04 2D 92 00 00 82 3B 00 B4 41 8E 01 28
+
+==== BB 927 (0x2547CC08) approx BBs exec'd 0 ====
+
+ 0x2547CC08: 817B0000 lwz r11,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x2547CC0C: 2E050000 cmpi cr4,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x4, CR
+ 7: INCEIPL $4
+
+ 0x2547CC10: 81320004 lwz r9,4(r18)
+ 8: GETL R18, t8
+ 9: ADDL $0x4, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R9
+ 12: INCEIPL $4
+
+ 0x2547CC14: 829E04C8 lwz r20,1224(r30)
+ 13: GETL R30, t12
+ 14: ADDL $0x4C8, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R20
+ 17: INCEIPL $4
+
+ 0x2547CC18: 7C8B4A2E lhzx r4,r11,r9
+ 18: GETL R9, t16
+ 19: GETL R11, t18
+ 20: ADDL t18, t16
+ 21: LDW (t16), t20
+ 22: PUTL t20, R4
+ 23: INCEIPL $4
+
+ 0x2547CC1C: 7EEB4A14 add r23,r11,r9
+ 24: GETL R11, t22
+ 25: GETL R9, t24
+ 26: ADDL t22, t24
+ 27: PUTL t24, R23
+ 28: INCEIPL $4
+
+ 0x2547CC20: 827E04D4 lwz r19,1236(r30)
+ 29: GETL R30, t26
+ 30: ADDL $0x4D4, t26
+ 31: LDL (t26), t28
+ 32: PUTL t28, R19
+ 33: INCEIPL $4
+
+ 0x2547CC24: 2C040001 cmpi cr0,r4,1
+ 34: GETL R4, t30
+ 35: MOVL $0x1, t34
+ 36: CMPL t30, t34, t32 (-rSo)
+ 37: ICRFL t32, $0x0, CR
+ 38: INCEIPL $4
+
+ 0x2547CC28: 408202D0 bc 4,2,0x2547CEF8
+ 39: Jc02o $0x2547CEF8
+
+
+. 0 2547CC08 36
+. 81 7B 00 00 2E 05 00 00 81 32 00 04 82 9E 04 C8 7C 8B 4A 2E 7E EB 4A 14 82 7E 04 D4 2C 04 00 01 40 82 02 D0
+
+==== BB 928 (0x2547CC2C) approx BBs exec'd 0 ====
+
+ 0x2547CC2C: 835B0018 lwz r26,24(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x18, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547CC30: 83970004 lwz r28,4(r23)
+ 5: GETL R23, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x2547CC34: 1E1A0018 mulli r16,r26,24
+ 10: GETL R26, t8
+ 11: MULL $0x18, t8
+ 12: PUTL t8, R16
+ 13: INCEIPL $4
+
+ 0x2547CC38: 7F5CCA14 add r26,r28,r25
+ 14: GETL R28, t10
+ 15: GETL R25, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R26
+ 18: INCEIPL $4
+
+ 0x2547CC3C: 7FB0A02E lwzx r29,r16,r20
+ 19: GETL R20, t14
+ 20: GETL R16, t16
+ 21: ADDL t16, t14
+ 22: LDL (t14), t18
+ 23: PUTL t18, R29
+ 24: INCEIPL $4
+
+ 0x2547CC40: 4800001C b 0x2547CC5C
+ 25: JMPo $0x2547CC5C ($4)
+
+
+. 0 2547CC2C 24
+. 83 5B 00 18 83 97 00 04 1E 1A 00 18 7F 5C CA 14 7F B0 A0 2E 48 00 00 1C
+
+==== BB 929 (0x2547CC5C) approx BBs exec'd 0 ====
+
+ 0x2547CC5C: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547CC60: 409AFFE4 bc 4,26,0x2547CC44
+ 4: Jc26o $0x2547CC44
+
+
+. 0 2547CC5C 8
+. 2F 1D 00 00 40 9A FF E4
+
+==== BB 930 (0x2547CC44) approx BBs exec'd 0 ====
+
+ 0x2547CC44: 7FA4EB78 or r4,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547CC48: 7F43D378 or r3,r26,r26
+ 3: GETL R26, t2
+ 4: PUTL t2, R3
+ 5: INCEIPL $4
+
+ 0x2547CC4C: 4BFFFA89 bl 0x2547C6D4
+ 6: MOVL $0x2547CC50, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x2547C6D4 ($4)
+
+
+. 0 2547CC44 12
+. 7F A4 EB 78 7F 43 D3 78 4B FF FA 89
+
+==== BB 931 (0x2547CC50) approx BBs exec'd 0 ====
+
+ 0x2547CC50: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547CC54: 409E0220 bc 4,30,0x2547CE74
+ 4: Jc30o $0x2547CE74
+
+
+. 0 2547CC50 8
+. 2F 83 00 00 40 9E 02 20
+
+==== BB 932 (0x2547CC58) approx BBs exec'd 0 ====
+
+ 0x2547CC58: 83BD000C lwz r29,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x2547CC5C: 2F1D0000 cmpi cr6,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547CC60: 409AFFE4 bc 4,26,0x2547CC44
+ 9: Jc26o $0x2547CC44
+
+
+. 0 2547CC58 12
+. 83 BD 00 0C 2F 1D 00 00 40 9A FF E4
+
+==== BB 933 (0x2547CE74) approx BBs exec'd 0 ====
+
+ 0x2547CE74: 7FBCEB78 or r28,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0x2547CE78: 4192FE30 bc 12,18,0x2547CCA8
+ 3: Js18o $0x2547CCA8
+
+
+. 0 2547CE74 8
+. 7F BC EB 78 41 92 FE 30
+
+==== BB 934 (0x2547CCA8) approx BBs exec'd 0 ====
+
+ 0x2547CCA8: 80970008 lwz r4,8(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547CCAC: 7FA4BA14 add r29,r4,r23
+ 5: GETL R4, t4
+ 6: GETL R23, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547CCB0: 7E7A9B78 or r26,r19,r19
+ 10: GETL R19, t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x2547CCB4: 811B0004 lwz r8,4(r27)
+ 13: GETL R27, t10
+ 14: ADDL $0x4, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R8
+ 17: INCEIPL $4
+
+ 0x2547CCB8: 7EA7AB78 or r7,r21,r21
+ 18: GETL R21, t14
+ 19: PUTL t14, R7
+ 20: INCEIPL $4
+
+ 0x2547CCBC: 88A80000 lbz r5,0(r8)
+ 21: GETL R8, t16
+ 22: LDB (t16), t18
+ 23: PUTL t18, R5
+ 24: INCEIPL $4
+
+ 0x2547CCC0: 7D034378 or r3,r8,r8
+ 25: GETL R8, t20
+ 26: PUTL t20, R3
+ 27: INCEIPL $4
+
+ 0x2547CCC4: 2C850000 cmpi cr1,r5,0
+ 28: GETL R5, t22
+ 29: CMP0L t22, t24 (-rSo)
+ 30: ICRFL t24, $0x1, CR
+ 31: INCEIPL $4
+
+ 0x2547CCC8: 4086000C bc 4,6,0x2547CCD4
+ 32: Jc06o $0x2547CCD4
+
+
+. 0 2547CCA8 36
+. 80 97 00 08 7F A4 BA 14 7E 7A 9B 78 81 1B 00 04 7E A7 AB 78 88 A8 00 00 7D 03 43 78 2C 85 00 00 40 86 00 0C
+
+==== BB 935 (0x2547CCCC) approx BBs exec'd 0 ====
+
+ 0x2547CCCC: 80DA0000 lwz r6,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x2547CCD0: 80660000 lwz r3,0(r6)
+ 4: GETL R6, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R3
+ 7: INCEIPL $4
+
+ 0x2547CCD4: 815D0008 lwz r10,8(r29)
+ 8: GETL R29, t8
+ 9: ADDL $0x8, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R10
+ 12: INCEIPL $4
+
+ 0x2547CCD8: A21D0004 lhz r16,4(r29)
+ 13: GETL R29, t12
+ 14: ADDL $0x4, t12
+ 15: LDW (t12), t14
+ 16: PUTL t14, R16
+ 17: INCEIPL $4
+
+ 0x2547CCDC: 809D0000 lwz r4,0(r29)
+ 18: GETL R29, t16
+ 19: LDL (t16), t18
+ 20: PUTL t18, R4
+ 21: INCEIPL $4
+
+ 0x2547CCE0: 7CAACA14 add r5,r10,r25
+ 22: GETL R10, t20
+ 23: GETL R25, t22
+ 24: ADDL t20, t22
+ 25: PUTL t22, R5
+ 26: INCEIPL $4
+
+ 0x2547CCE4: 80DC0014 lwz r6,20(r28)
+ 27: GETL R28, t24
+ 28: ADDL $0x14, t24
+ 29: LDL (t24), t26
+ 30: PUTL t26, R6
+ 31: INCEIPL $4
+
+ 0x2547CCE8: 560807BC rlwinm r8,r16,0,30,30
+ 32: GETL R16, t28
+ 33: ANDL $0x2, t28
+ 34: PUTL t28, R8
+ 35: INCEIPL $4
+
+ 0x2547CCEC: 4BFFFA85 bl 0x2547C770
+ 36: MOVL $0x2547CCF0, t30
+ 37: PUTL t30, LR
+ 38: JMPo-c $0x2547C770 ($4)
+
+
+. 0 2547CCCC 36
+. 80 DA 00 00 80 66 00 00 81 5D 00 08 A2 1D 00 04 80 9D 00 00 7C AA CA 14 80 DC 00 14 56 08 07 BC 4B FF FA 85
+
+==== BB 936 match_symbol(0x2547C770) approx BBs exec'd 0 ====
+
+ 0x2547C770: 9421FF20 stwu r1,-224(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFF20, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547C774: 7D4802A6 mflr r10
+ 6: GETL LR, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x2547C778: 4801A889 bl 0x25497000
+ 9: MOVL $0x2547C77C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547C770 12
+. 94 21 FF 20 7D 48 02 A6 48 01 A8 89
+
+==== BB 937 (0x2547C77C) approx BBs exec'd 0 ====
+
+ 0x2547C77C: 93C100D8 stw r30,216(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xD8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547C780: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547C784: 926100AC stw r19,172(r1)
+ 8: GETL R19, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xAC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547C788: 914100E4 stw r10,228(r1)
+ 13: GETL R10, t10
+ 14: GETL R1, t12
+ 15: ADDL $0xE4, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547C78C: 3A600000 li r19,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R19
+ 20: INCEIPL $4
+
+ 0x2547C790: 81660034 lwz r11,52(r6)
+ 21: GETL R6, t16
+ 22: ADDL $0x34, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R11
+ 25: INCEIPL $4
+
+ 0x2547C794: 813E04F4 lwz r9,1268(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4F4, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R9
+ 30: INCEIPL $4
+
+ 0x2547C798: 92C100B8 stw r22,184(r1)
+ 31: GETL R22, t24
+ 32: GETL R1, t26
+ 33: ADDL $0xB8, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547C79C: 7CF63B78 or r22,r7,r7
+ 36: GETL R7, t28
+ 37: PUTL t28, R22
+ 38: INCEIPL $4
+
+ 0x2547C7A0: 80090000 lwz r0,0(r9)
+ 39: GETL R9, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R0
+ 42: INCEIPL $4
+
+ 0x2547C7A4: 92E100BC stw r23,188(r1)
+ 43: GETL R23, t34
+ 44: GETL R1, t36
+ 45: ADDL $0xBC, t36
+ 46: STL t34, (t36)
+ 47: INCEIPL $4
+
+ 0x2547C7A8: 7D174378 or r23,r8,r8
+ 48: GETL R8, t38
+ 49: PUTL t38, R23
+ 50: INCEIPL $4
+
+ 0x2547C7AC: 70090010 andi. r9,r0,0x10
+ 51: GETL R0, t40
+ 52: ANDL $0x10, t40
+ 53: PUTL t40, R9
+ 54: CMP0L t40, t42 (-rSo)
+ 55: ICRFL t42, $0x0, CR
+ 56: INCEIPL $4
+
+ 0x2547C7B0: 930100C0 stw r24,192(r1)
+ 57: GETL R24, t44
+ 58: GETL R1, t46
+ 59: ADDL $0xC0, t46
+ 60: STL t44, (t46)
+ 61: INCEIPL $4
+
+ 0x2547C7B4: 932100C4 stw r25,196(r1)
+ 62: GETL R25, t48
+ 63: GETL R1, t50
+ 64: ADDL $0xC4, t50
+ 65: STL t48, (t50)
+ 66: INCEIPL $4
+
+ 0x2547C7B8: 7C781B78 or r24,r3,r3
+ 67: GETL R3, t52
+ 68: PUTL t52, R24
+ 69: INCEIPL $4
+
+ 0x2547C7BC: 936100CC stw r27,204(r1)
+ 70: GETL R27, t54
+ 71: GETL R1, t56
+ 72: ADDL $0xCC, t56
+ 73: STL t54, (t56)
+ 74: INCEIPL $4
+
+ 0x2547C7C0: 7CD93378 or r25,r6,r6
+ 75: GETL R6, t58
+ 76: PUTL t58, R25
+ 77: INCEIPL $4
+
+ 0x2547C7C4: 938100D0 stw r28,208(r1)
+ 78: GETL R28, t60
+ 79: GETL R1, t62
+ 80: ADDL $0xD0, t62
+ 81: STL t60, (t62)
+ 82: INCEIPL $4
+
+ 0x2547C7C8: 7C9B2378 or r27,r4,r4
+ 83: GETL R4, t64
+ 84: PUTL t64, R27
+ 85: INCEIPL $4
+
+ 0x2547C7CC: 93E100DC stw r31,220(r1)
+ 86: GETL R31, t66
+ 87: GETL R1, t68
+ 88: ADDL $0xDC, t68
+ 89: STL t66, (t68)
+ 90: INCEIPL $4
+
+ 0x2547C7D0: 7CBC2B78 or r28,r5,r5
+ 91: GETL R5, t70
+ 92: PUTL t70, R28
+ 93: INCEIPL $4
+
+ 0x2547C7D4: 928100B0 stw r20,176(r1)
+ 94: GETL R20, t72
+ 95: GETL R1, t74
+ 96: ADDL $0xB0, t74
+ 97: STL t72, (t74)
+ 98: INCEIPL $4
+
+ 0x2547C7D8: 7C3F0B78 or r31,r1,r1
+ 99: GETL R1, t76
+ 100: PUTL t76, R31
+ 101: INCEIPL $4
+
+ 0x2547C7DC: 92A100B4 stw r21,180(r1)
+ 102: GETL R21, t78
+ 103: GETL R1, t80
+ 104: ADDL $0xB4, t80
+ 105: STL t78, (t80)
+ 106: INCEIPL $4
+
+ 0x2547C7E0: 934100C8 stw r26,200(r1)
+ 107: GETL R26, t82
+ 108: GETL R1, t84
+ 109: ADDL $0xC8, t84
+ 110: STL t82, (t84)
+ 111: INCEIPL $4
+
+ 0x2547C7E4: 93A100D4 stw r29,212(r1)
+ 112: GETL R29, t86
+ 113: GETL R1, t88
+ 114: ADDL $0xD4, t88
+ 115: STL t86, (t88)
+ 116: INCEIPL $4
+
+ 0x2547C7E8: 834B0004 lwz r26,4(r11)
+ 117: GETL R11, t90
+ 118: ADDL $0x4, t90
+ 119: LDL (t90), t92
+ 120: PUTL t92, R26
+ 121: INCEIPL $4
+
+ 0x2547C7EC: 40820230 bc 4,2,0x2547CA1C
+ 122: Jc02o $0x2547CA1C
+
+
+. 0 2547C77C 116
+. 93 C1 00 D8 7F C8 02 A6 92 61 00 AC 91 41 00 E4 3A 60 00 00 81 66 00 34 81 3E 04 F4 92 C1 00 B8 7C F6 3B 78 80 09 00 00 92 E1 00 BC 7D 17 43 78 70 09 00 10 93 01 00 C0 93 21 00 C4 7C 78 1B 78 93 61 00 CC 7C D9 33 78 93 81 00 D0 7C 9B 23 78 93 E1 00 DC 7C BC 2B 78 92 81 00 B0 7C 3F 0B 78 92 A1 00 B4 93 41 00 C8 93 A1 00 D4 83 4B 00 04 40 82 02 30
+
+==== BB 938 (0x2547C7F0) approx BBs exec'd 0 ====
+
+ 0x2547C7F0: 813900B4 lwz r9,180(r25)
+ 0: GETL R25, t0
+ 1: ADDL $0xB4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547C7F4: 2C890000 cmpi cr1,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547C7F8: 41860264 bc 12,6,0x2547CA5C
+ 9: Js06o $0x2547CA5C
+
+
+. 0 2547C7F0 12
+. 81 39 00 B4 2C 89 00 00 41 86 02 64
+
+==== BB 939 (0x2547C7FC) approx BBs exec'd 0 ====
+
+ 0x2547C7FC: 81690004 lwz r11,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547C800: 3A9F0008 addi r20,r31,8
+ 5: GETL R31, t4
+ 6: ADDL $0x8, t4
+ 7: PUTL t4, R20
+ 8: INCEIPL $4
+
+ 0x2547C804: 80190000 lwz r0,0(r25)
+ 9: GETL R25, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x2547C808: 82BE0358 lwz r21,856(r30)
+ 13: GETL R30, t10
+ 14: ADDL $0x358, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R21
+ 17: INCEIPL $4
+
+ 0x2547C80C: 7FA05A14 add r29,r0,r11
+ 18: GETL R0, t14
+ 19: GETL R11, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R29
+ 22: INCEIPL $4
+
+ 0x2547C810: A13D0000 lhz r9,0(r29)
+ 23: GETL R29, t18
+ 24: LDW (t18), t20
+ 25: PUTL t20, R9
+ 26: INCEIPL $4
+
+ 0x2547C814: 7F83E378 or r3,r28,r28
+ 27: GETL R28, t22
+ 28: PUTL t22, R3
+ 29: INCEIPL $4
+
+ 0x2547C818: 2F890001 cmpi cr7,r9,1
+ 30: GETL R9, t24
+ 31: MOVL $0x1, t28
+ 32: CMPL t24, t28, t26 (-rSo)
+ 33: ICRFL t26, $0x7, CR
+ 34: INCEIPL $4
+
+ 0x2547C81C: 409E0124 bc 4,30,0x2547C940
+ 35: Jc30o $0x2547C940
+
+
+. 0 2547C7FC 36
+. 81 69 00 04 3A 9F 00 08 80 19 00 00 82 BE 03 58 7F A0 5A 14 A1 3D 00 00 7F 83 E3 78 2F 89 00 01 40 9E 01 24
+
+==== BB 940 (0x2547C820) approx BBs exec'd 0 ====
+
+ 0x2547C820: 809D0008 lwz r4,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547C824: 7C84D800 cmp cr1,r4,r27
+ 5: GETL R4, t4
+ 6: GETL R27, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x2547C828: 418600B4 bc 12,6,0x2547C8DC
+ 10: Js06o $0x2547C8DC
+
+
+. 0 2547C820 12
+. 80 9D 00 08 7C 84 D8 00 41 86 00 B4
+
+==== BB 941 (0x2547C82C) approx BBs exec'd 0 ====
+
+ 0x2547C82C: 80FD0010 lwz r7,16(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547C830: 2F870000 cmpi cr7,r7,0
+ 5: GETL R7, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547C834: 7FBD3A14 add r29,r29,r7
+ 9: GETL R29, t8
+ 10: GETL R7, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R29
+ 13: INCEIPL $4
+
+ 0x2547C838: 409EFFD8 bc 4,30,0x2547C810
+ 14: Jc30o $0x2547C810
+
+
+. 0 2547C82C 16
+. 80 FD 00 10 2F 87 00 00 7F BD 3A 14 40 9E FF D8
+
+==== BB 942 (0x2547C810) approx BBs exec'd 0 ====
+
+ 0x2547C810: A13D0000 lhz r9,0(r29)
+ 0: GETL R29, t0
+ 1: LDW (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547C814: 7F83E378 or r3,r28,r28
+ 4: GETL R28, t4
+ 5: PUTL t4, R3
+ 6: INCEIPL $4
+
+ 0x2547C818: 2F890001 cmpi cr7,r9,1
+ 7: GETL R9, t6
+ 8: MOVL $0x1, t10
+ 9: CMPL t6, t10, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x2547C81C: 409E0124 bc 4,30,0x2547C940
+ 12: Jc30o $0x2547C940
+
+
+. 0 2547C810 16
+. A1 3D 00 00 7F 83 E3 78 2F 89 00 01 40 9E 01 24
+
+==== BB 943 (0x2547C8DC) approx BBs exec'd 0 ====
+
+ 0x2547C8DC: 80BD000C lwz r5,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547C8E0: 7CC5E82E lwzx r6,r5,r29
+ 5: GETL R29, t4
+ 6: GETL R5, t6
+ 7: ADDL t6, t4
+ 8: LDL (t4), t8
+ 9: PUTL t8, R6
+ 10: INCEIPL $4
+
+ 0x2547C8E4: 7C86D214 add r4,r6,r26
+ 11: GETL R6, t10
+ 12: GETL R26, t12
+ 13: ADDL t10, t12
+ 14: PUTL t12, R4
+ 15: INCEIPL $4
+
+ 0x2547C8E8: 480065F9 bl 0x25482EE0
+ 16: MOVL $0x2547C8EC, t14
+ 17: PUTL t14, LR
+ 18: JMPo-c $0x25482EE0 ($4)
+
+
+. 0 2547C8DC 16
+. 80 BD 00 0C 7C C5 E8 2E 7C 86 D2 14 48 00 65 F9
+
+==== BB 944 (0x2547C8EC) approx BBs exec'd 0 ====
+
+ 0x2547C8EC: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547C8F0: 40BAFF3C bc 5,26,0x2547C82C
+ 4: Jc26o $0x2547C82C
+
+
+. 0 2547C8EC 8
+. 2F 03 00 00 40 BA FF 3C
+
+==== BB 945 (0x2547C8F4) approx BBs exec'd 0 ====
+
+ 0x2547C8F4: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547C8F8: 80C10000 lwz r6,0(r1)
+ 3: GETL R1, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R6
+ 6: INCEIPL $4
+
+ 0x2547C8FC: 80E60004 lwz r7,4(r6)
+ 7: GETL R6, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R7
+ 11: INCEIPL $4
+
+ 0x2547C900: 8266FFCC lwz r19,-52(r6)
+ 12: GETL R6, t10
+ 13: ADDL $0xFFFFFFCC, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R19
+ 16: INCEIPL $4
+
+ 0x2547C904: 8286FFD0 lwz r20,-48(r6)
+ 17: GETL R6, t14
+ 18: ADDL $0xFFFFFFD0, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R20
+ 21: INCEIPL $4
+
+ 0x2547C908: 7CE803A6 mtlr r7
+ 22: GETL R7, t18
+ 23: PUTL t18, LR
+ 24: INCEIPL $4
+
+ 0x2547C90C: 82A6FFD4 lwz r21,-44(r6)
+ 25: GETL R6, t20
+ 26: ADDL $0xFFFFFFD4, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R21
+ 29: INCEIPL $4
+
+ 0x2547C910: 82C6FFD8 lwz r22,-40(r6)
+ 30: GETL R6, t24
+ 31: ADDL $0xFFFFFFD8, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R22
+ 34: INCEIPL $4
+
+ 0x2547C914: 82E6FFDC lwz r23,-36(r6)
+ 35: GETL R6, t28
+ 36: ADDL $0xFFFFFFDC, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R23
+ 39: INCEIPL $4
+
+ 0x2547C918: 8306FFE0 lwz r24,-32(r6)
+ 40: GETL R6, t32
+ 41: ADDL $0xFFFFFFE0, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R24
+ 44: INCEIPL $4
+
+ 0x2547C91C: 8326FFE4 lwz r25,-28(r6)
+ 45: GETL R6, t36
+ 46: ADDL $0xFFFFFFE4, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R25
+ 49: INCEIPL $4
+
+ 0x2547C920: 8346FFE8 lwz r26,-24(r6)
+ 50: GETL R6, t40
+ 51: ADDL $0xFFFFFFE8, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R26
+ 54: INCEIPL $4
+
+ 0x2547C924: 8366FFEC lwz r27,-20(r6)
+ 55: GETL R6, t44
+ 56: ADDL $0xFFFFFFEC, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R27
+ 59: INCEIPL $4
+
+ 0x2547C928: 8386FFF0 lwz r28,-16(r6)
+ 60: GETL R6, t48
+ 61: ADDL $0xFFFFFFF0, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R28
+ 64: INCEIPL $4
+
+ 0x2547C92C: 83A6FFF4 lwz r29,-12(r6)
+ 65: GETL R6, t52
+ 66: ADDL $0xFFFFFFF4, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R29
+ 69: INCEIPL $4
+
+ 0x2547C930: 83C6FFF8 lwz r30,-8(r6)
+ 70: GETL R6, t56
+ 71: ADDL $0xFFFFFFF8, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R30
+ 74: INCEIPL $4
+
+ 0x2547C934: 83E6FFFC lwz r31,-4(r6)
+ 75: GETL R6, t60
+ 76: ADDL $0xFFFFFFFC, t60
+ 77: LDL (t60), t62
+ 78: PUTL t62, R31
+ 79: INCEIPL $4
+
+ 0x2547C938: 7CC13378 or r1,r6,r6
+ 80: GETL R6, t64
+ 81: PUTL t64, R1
+ 82: INCEIPL $4
+
+ 0x2547C93C: 4E800020 blr
+ 83: GETL LR, t66
+ 84: JMPo-r t66 ($4)
+
+
+. 0 2547C8F4 76
+. 38 60 00 00 80 C1 00 00 80 E6 00 04 82 66 FF CC 82 86 FF D0 7C E8 03 A6 82 A6 FF D4 82 C6 FF D8 82 E6 FF DC 83 06 FF E0 83 26 FF E4 83 46 FF E8 83 66 FF EC 83 86 FF F0 83 A6 FF F4 83 C6 FF F8 83 E6 FF FC 7C C1 33 78 4E 80 00 20
+
+==== BB 946 (0x2547CCF0) approx BBs exec'd 0 ====
+
+ 0x2547CCF0: A17D0006 lhz r11,6(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x6, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547CCF4: 7ED61B78 or r22,r22,r3
+ 5: GETL R22, t4
+ 6: GETL R3, t6
+ 7: ORL t6, t4
+ 8: PUTL t4, R22
+ 9: INCEIPL $4
+
+ 0x2547CCF8: 5560047E rlwinm r0,r11,0,17,31
+ 10: GETL R11, t8
+ 11: ANDL $0x7FFF, t8
+ 12: PUTL t8, R0
+ 13: INCEIPL $4
+
+ 0x2547CCFC: 7F00C040 cmpl cr6,r0,r24
+ 14: GETL R0, t10
+ 15: GETL R24, t12
+ 16: CMPUL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0x2547CD00: 40990008 bc 4,25,0x2547CD08
+ 19: Jc25o $0x2547CD08
+
+
+. 0 2547CCF0 20
+. A1 7D 00 06 7E D6 1B 78 55 60 04 7E 7F 00 C0 40 40 99 00 08
+
+==== BB 947 (0x2547CD04) approx BBs exec'd 0 ====
+
+ 0x2547CD04: 7C180378 or r24,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R24
+ 2: INCEIPL $4
+
+ 0x2547CD08: 807D000C lwz r3,12(r29)
+ 3: GETL R29, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547CD0C: 2F830000 cmpi cr7,r3,0
+ 8: GETL R3, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x2547CD10: 7FBD1A14 add r29,r29,r3
+ 12: GETL R29, t10
+ 13: GETL R3, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R29
+ 16: INCEIPL $4
+
+ 0x2547CD14: 409EFFA0 bc 4,30,0x2547CCB4
+ 17: Jc30o $0x2547CCB4
+
+
+. 0 2547CD04 20
+. 7C 18 03 78 80 7D 00 0C 2F 83 00 00 7F BD 1A 14 40 9E FF A0
+
+==== BB 948 (0x2547CD18) approx BBs exec'd 0 ====
+
+ 0x2547CD18: 8017000C lwz r0,12(r23)
+ 0: GETL R23, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547CD1C: 2C000000 cmpi cr0,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547CD20: 4182000C bc 12,2,0x2547CD2C
+ 9: Js02o $0x2547CD2C
+
+
+. 0 2547CD18 12
+. 80 17 00 0C 2C 00 00 00 41 82 00 0C
+
+==== BB 949 (0x2547CD2C) approx BBs exec'd 0 ====
+
+ 0x2547CD2C: 2E110000 cmpi cr4,r17,0
+ 0: GETL R17, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x2547CD30: 41920034 bc 12,18,0x2547CD64
+ 4: Js18o $0x2547CD64
+
+
+. 0 2547CD2C 8
+. 2E 11 00 00 41 92 00 34
+
+==== BB 950 (0x2547CD64) approx BBs exec'd 0 ====
+
+ 0x2547CD64: 2F980000 cmpi cr7,r24,0
+ 0: GETL R24, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547CD68: 409E0064 bc 4,30,0x2547CDCC
+ 4: Jc30o $0x2547CDCC
+
+
+. 0 2547CD64 8
+. 2F 98 00 00 40 9E 00 64
+
+==== BB 951 (0x2547CDCC) approx BBs exec'd 0 ====
+
+ 0x2547CDCC: 3BB80001 addi r29,r24,1
+ 0: GETL R24, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x2547CDD0: 38800010 li r4,16
+ 4: MOVL $0x10, t2
+ 5: PUTL t2, R4
+ 6: INCEIPL $4
+
+ 0x2547CDD4: 7FA3EB78 or r3,r29,r29
+ 7: GETL R29, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0x2547CDD8: 3A00000C li r16,12
+ 10: MOVL $0xC, t6
+ 11: PUTL t6, R16
+ 12: INCEIPL $4
+
+ 0x2547CDDC: 4801AC51 bl 0x25497A2C
+ 13: MOVL $0x2547CDE0, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0x25497A2C ($4)
+
+
+. 0 2547CDCC 20
+. 3B B8 00 01 38 80 00 10 7F A3 EB 78 3A 00 00 0C 48 01 AC 51
+
+==== BB 952 (0x2547CDE0) approx BBs exec'd 0 ====
+
+ 0x2547CDE0: 80DE0378 lwz r6,888(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x378, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547CDE4: 2C030000 cmpi cr0,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547CDE8: 7C651B78 or r5,r3,r3
+ 9: GETL R3, t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0x2547CDEC: 907B0188 stw r3,392(r27)
+ 12: GETL R3, t10
+ 13: GETL R27, t12
+ 14: ADDL $0x188, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0x2547CDF0: 418201AC bc 12,2,0x2547CF9C
+ 17: Js02o $0x2547CF9C
+
+
+. 0 2547CDE0 20
+. 80 DE 03 78 2C 03 00 00 7C 65 1B 78 90 7B 01 88 41 82 01 AC
+
+==== BB 953 (0x2547CDF4) approx BBs exec'd 0 ====
+
+ 0x2547CDF4: 839B00E4 lwz r28,228(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xE4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x2547CDF8: 93BB0184 stw r29,388(r27)
+ 5: GETL R29, t4
+ 6: GETL R27, t6
+ 7: ADDL $0x184, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547CDFC: 831C0004 lwz r24,4(r28)
+ 10: GETL R28, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R24
+ 14: INCEIPL $4
+
+ 0x2547CE00: 931B0198 stw r24,408(r27)
+ 15: GETL R24, t12
+ 16: GETL R27, t14
+ 17: ADDL $0x198, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x2547CE04: 418E0088 bc 12,14,0x2547CE8C
+ 20: Js14o $0x2547CE8C
+
+
+. 0 2547CDF4 20
+. 83 9B 00 E4 93 BB 01 84 83 1C 00 04 93 1B 01 98 41 8E 00 88
+
+==== BB 954 (0x2547CE08) approx BBs exec'd 0 ====
+
+ 0x2547CE08: 83520004 lwz r26,4(r18)
+ 0: GETL R18, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547CE0C: 825B0000 lwz r18,0(r27)
+ 5: GETL R27, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R18
+ 8: INCEIPL $4
+
+ 0x2547CE10: 7CD2D214 add r6,r18,r26
+ 9: GETL R18, t8
+ 10: GETL R26, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R6
+ 13: INCEIPL $4
+
+ 0x2547CE14: 81860008 lwz r12,8(r6)
+ 14: GETL R6, t12
+ 15: ADDL $0x8, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R12
+ 18: INCEIPL $4
+
+ 0x2547CE18: 7CEC3214 add r7,r12,r6
+ 19: GETL R12, t16
+ 20: GETL R6, t18
+ 21: ADDL t16, t18
+ 22: PUTL t18, R7
+ 23: INCEIPL $4
+
+ 0x2547CE1C: A2A70006 lhz r21,6(r7)
+ 24: GETL R7, t20
+ 25: ADDL $0x6, t20
+ 26: LDW (t20), t22
+ 27: PUTL t22, R21
+ 28: INCEIPL $4
+
+ 0x2547CE20: 80670000 lwz r3,0(r7)
+ 29: GETL R7, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R3
+ 32: INCEIPL $4
+
+ 0x2547CE24: 56A42376 rlwinm r4,r21,4,13,27
+ 33: GETL R21, t28
+ 34: ROLL $0x4, t28
+ 35: ANDL $0x7FFF0, t28
+ 36: PUTL t28, R4
+ 37: INCEIPL $4
+
+ 0x2547CE28: 56B00420 rlwinm r16,r21,0,16,16
+ 38: GETL R21, t30
+ 39: ANDL $0x8000, t30
+ 40: PUTL t30, R16
+ 41: INCEIPL $4
+
+ 0x2547CE2C: 7FA42A14 add r29,r4,r5
+ 42: GETL R4, t32
+ 43: GETL R5, t34
+ 44: ADDL t32, t34
+ 45: PUTL t34, R29
+ 46: INCEIPL $4
+
+ 0x2547CE30: 907D0004 stw r3,4(r29)
+ 47: GETL R3, t36
+ 48: GETL R29, t38
+ 49: ADDL $0x4, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0x2547CE34: 921D0008 stw r16,8(r29)
+ 52: GETL R16, t40
+ 53: GETL R29, t42
+ 54: ADDL $0x8, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0x2547CE38: 8167000C lwz r11,12(r7)
+ 57: GETL R7, t44
+ 58: ADDL $0xC, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R11
+ 61: INCEIPL $4
+
+ 0x2547CE3C: 81470008 lwz r10,8(r7)
+ 62: GETL R7, t48
+ 63: ADDL $0x8, t48
+ 64: LDL (t48), t50
+ 65: PUTL t50, R10
+ 66: INCEIPL $4
+
+ 0x2547CE40: 2D8B0000 cmpi cr3,r11,0
+ 67: GETL R11, t52
+ 68: CMP0L t52, t54 (-rSo)
+ 69: ICRFL t54, $0x3, CR
+ 70: INCEIPL $4
+
+ 0x2547CE44: 81060004 lwz r8,4(r6)
+ 71: GETL R6, t56
+ 72: ADDL $0x4, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R8
+ 75: INCEIPL $4
+
+ 0x2547CE48: 7D2ACA14 add r9,r10,r25
+ 76: GETL R10, t60
+ 77: GETL R25, t62
+ 78: ADDL t60, t62
+ 79: PUTL t62, R9
+ 80: INCEIPL $4
+
+ 0x2547CE4C: 7CE75A14 add r7,r7,r11
+ 81: GETL R7, t64
+ 82: GETL R11, t66
+ 83: ADDL t64, t66
+ 84: PUTL t66, R7
+ 85: INCEIPL $4
+
+ 0x2547CE50: 7C08CA14 add r0,r8,r25
+ 86: GETL R8, t68
+ 87: GETL R25, t70
+ 88: ADDL t68, t70
+ 89: PUTL t70, R0
+ 90: INCEIPL $4
+
+ 0x2547CE54: 7D24292E stwx r9,r4,r5
+ 91: GETL R5, t72
+ 92: GETL R4, t74
+ 93: ADDL t74, t72
+ 94: GETL R9, t76
+ 95: STL t76, (t72)
+ 96: INCEIPL $4
+
+ 0x2547CE58: 901D000C stw r0,12(r29)
+ 97: GETL R0, t78
+ 98: GETL R29, t80
+ 99: ADDL $0xC, t80
+ 100: STL t78, (t80)
+ 101: INCEIPL $4
+
+ 0x2547CE5C: 408EFFC0 bc 4,14,0x2547CE1C
+ 102: Jc14o $0x2547CE1C
+
+
+. 0 2547CE08 88
+. 83 52 00 04 82 5B 00 00 7C D2 D2 14 81 86 00 08 7C EC 32 14 A2 A7 00 06 80 67 00 00 56 A4 23 76 56 B0 04 20 7F A4 2A 14 90 7D 00 04 92 1D 00 08 81 67 00 0C 81 47 00 08 2D 8B 00 00 81 06 00 04 7D 2A CA 14 7C E7 5A 14 7C 08 CA 14 7D 24 29 2E 90 1D 00 0C 40 8E FF C0
+
+==== BB 955 (0x2547CE60) approx BBs exec'd 0 ====
+
+ 0x2547CE60: 8006000C lwz r0,12(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547CE64: 2C800000 cmpi cr1,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547CE68: 41860024 bc 12,6,0x2547CE8C
+ 9: Js06o $0x2547CE8C
+
+
+. 0 2547CE60 12
+. 80 06 00 0C 2C 80 00 00 41 86 00 24
+
+==== BB 956 (0x2547CE8C) approx BBs exec'd 0 ====
+
+ 0x2547CE8C: 41B2FEE0 bc 13,18,0x2547CD6C
+ 0: Js18o $0x2547CD6C
+
+
+. 0 2547CE8C 4
+. 41 B2 FE E0
+
+==== BB 957 (0x2547CD6C) approx BBs exec'd 0 ====
+
+ 0x2547CD6C: 7EC3B378 or r3,r22,r22
+ 0: GETL R22, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547CD70: 80A10000 lwz r5,0(r1)
+ 3: GETL R1, t2
+ 4: LDL (t2), t4
+ 5: PUTL t4, R5
+ 6: INCEIPL $4
+
+ 0x2547CD74: 82C50004 lwz r22,4(r5)
+ 7: GETL R5, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R22
+ 11: INCEIPL $4
+
+ 0x2547CD78: 8185FFBC lwz r12,-68(r5)
+ 12: GETL R5, t10
+ 13: ADDL $0xFFFFFFBC, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R12
+ 16: INCEIPL $4
+
+ 0x2547CD7C: 7EC803A6 mtlr r22
+ 17: GETL R22, t14
+ 18: PUTL t14, LR
+ 19: INCEIPL $4
+
+ 0x2547CD80: 8205FFC0 lwz r16,-64(r5)
+ 20: GETL R5, t16
+ 21: ADDL $0xFFFFFFC0, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R16
+ 24: INCEIPL $4
+
+ 0x2547CD84: 8225FFC4 lwz r17,-60(r5)
+ 25: GETL R5, t20
+ 26: ADDL $0xFFFFFFC4, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R17
+ 29: INCEIPL $4
+
+ 0x2547CD88: 7D818120 mtcrf 0x18,r12
+ 30: GETL R12, t24
+ 31: ICRFL t24, $0x3, CR
+ 32: ICRFL t24, $0x4, CR
+ 33: INCEIPL $4
+
+ 0x2547CD8C: 8245FFC8 lwz r18,-56(r5)
+ 34: GETL R5, t26
+ 35: ADDL $0xFFFFFFC8, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R18
+ 38: INCEIPL $4
+
+ 0x2547CD90: 8265FFCC lwz r19,-52(r5)
+ 39: GETL R5, t30
+ 40: ADDL $0xFFFFFFCC, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R19
+ 43: INCEIPL $4
+
+ 0x2547CD94: 8285FFD0 lwz r20,-48(r5)
+ 44: GETL R5, t34
+ 45: ADDL $0xFFFFFFD0, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R20
+ 48: INCEIPL $4
+
+ 0x2547CD98: 82A5FFD4 lwz r21,-44(r5)
+ 49: GETL R5, t38
+ 50: ADDL $0xFFFFFFD4, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R21
+ 53: INCEIPL $4
+
+ 0x2547CD9C: 82C5FFD8 lwz r22,-40(r5)
+ 54: GETL R5, t42
+ 55: ADDL $0xFFFFFFD8, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R22
+ 58: INCEIPL $4
+
+ 0x2547CDA0: 82E5FFDC lwz r23,-36(r5)
+ 59: GETL R5, t46
+ 60: ADDL $0xFFFFFFDC, t46
+ 61: LDL (t46), t48
+ 62: PUTL t48, R23
+ 63: INCEIPL $4
+
+ 0x2547CDA4: 8305FFE0 lwz r24,-32(r5)
+ 64: GETL R5, t50
+ 65: ADDL $0xFFFFFFE0, t50
+ 66: LDL (t50), t52
+ 67: PUTL t52, R24
+ 68: INCEIPL $4
+
+ 0x2547CDA8: 8325FFE4 lwz r25,-28(r5)
+ 69: GETL R5, t54
+ 70: ADDL $0xFFFFFFE4, t54
+ 71: LDL (t54), t56
+ 72: PUTL t56, R25
+ 73: INCEIPL $4
+
+ 0x2547CDAC: 8345FFE8 lwz r26,-24(r5)
+ 74: GETL R5, t58
+ 75: ADDL $0xFFFFFFE8, t58
+ 76: LDL (t58), t60
+ 77: PUTL t60, R26
+ 78: INCEIPL $4
+
+ 0x2547CDB0: 8365FFEC lwz r27,-20(r5)
+ 79: GETL R5, t62
+ 80: ADDL $0xFFFFFFEC, t62
+ 81: LDL (t62), t64
+ 82: PUTL t64, R27
+ 83: INCEIPL $4
+
+ 0x2547CDB4: 8385FFF0 lwz r28,-16(r5)
+ 84: GETL R5, t66
+ 85: ADDL $0xFFFFFFF0, t66
+ 86: LDL (t66), t68
+ 87: PUTL t68, R28
+ 88: INCEIPL $4
+
+ 0x2547CDB8: 83A5FFF4 lwz r29,-12(r5)
+ 89: GETL R5, t70
+ 90: ADDL $0xFFFFFFF4, t70
+ 91: LDL (t70), t72
+ 92: PUTL t72, R29
+ 93: INCEIPL $4
+
+ 0x2547CDBC: 83C5FFF8 lwz r30,-8(r5)
+ 94: GETL R5, t74
+ 95: ADDL $0xFFFFFFF8, t74
+ 96: LDL (t74), t76
+ 97: PUTL t76, R30
+ 98: INCEIPL $4
+
+ 0x2547CDC0: 83E5FFFC lwz r31,-4(r5)
+ 99: GETL R5, t78
+ 100: ADDL $0xFFFFFFFC, t78
+ 101: LDL (t78), t80
+ 102: PUTL t80, R31
+ 103: INCEIPL $4
+
+ 0x2547CDC4: 7CA12B78 or r1,r5,r5
+ 104: GETL R5, t82
+ 105: PUTL t82, R1
+ 106: INCEIPL $4
+
+ 0x2547CDC8: 4E800020 blr
+ 107: GETL LR, t84
+ 108: JMPo-r t84 ($4)
+
+
+. 0 2547CD6C 96
+. 7E C3 B3 78 80 A1 00 00 82 C5 00 04 81 85 FF BC 7E C8 03 A6 82 05 FF C0 82 25 FF C4 7D 81 81 20 82 45 FF C8 82 65 FF CC 82 85 FF D0 82 A5 FF D4 82 C5 FF D8 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
+
+==== BB 958 (0x2547D034) approx BBs exec'd 0 ====
+
+ 0x2547D034: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547D038: 41BEFFCC bc 13,30,0x2547D004
+ 4: Js30o $0x2547D004
+
+
+. 0 2547D034 8
+. 2F 83 00 00 41 BE FF CC
+
+==== BB 959 (0x2547D004) approx BBs exec'd 0 ====
+
+ 0x2547D004: 83FF000C lwz r31,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0x2547D008: 7F9CEB78 or r28,r28,r29
+ 5: GETL R28, t4
+ 6: GETL R29, t6
+ 7: ORL t6, t4
+ 8: PUTL t4, R28
+ 9: INCEIPL $4
+
+ 0x2547D00C: 2C9F0000 cmpi cr1,r31,0
+ 10: GETL R31, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x2547D010: 41860040 bc 12,6,0x2547D050
+ 14: Js06o $0x2547D050
+
+
+. 0 2547D004 16
+. 83 FF 00 0C 7F 9C EB 78 2C 9F 00 00 41 86 00 40
+
+==== BB 960 (0x2547CCD4) approx BBs exec'd 0 ====
+
+ 0x2547CCD4: 815D0008 lwz r10,8(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547CCD8: A21D0004 lhz r16,4(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x4, t4
+ 7: LDW (t4), t6
+ 8: PUTL t6, R16
+ 9: INCEIPL $4
+
+ 0x2547CCDC: 809D0000 lwz r4,0(r29)
+ 10: GETL R29, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R4
+ 13: INCEIPL $4
+
+ 0x2547CCE0: 7CAACA14 add r5,r10,r25
+ 14: GETL R10, t12
+ 15: GETL R25, t14
+ 16: ADDL t12, t14
+ 17: PUTL t14, R5
+ 18: INCEIPL $4
+
+ 0x2547CCE4: 80DC0014 lwz r6,20(r28)
+ 19: GETL R28, t16
+ 20: ADDL $0x14, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R6
+ 23: INCEIPL $4
+
+ 0x2547CCE8: 560807BC rlwinm r8,r16,0,30,30
+ 24: GETL R16, t20
+ 25: ANDL $0x2, t20
+ 26: PUTL t20, R8
+ 27: INCEIPL $4
+
+ 0x2547CCEC: 4BFFFA85 bl 0x2547C770
+ 28: MOVL $0x2547CCF0, t22
+ 29: PUTL t22, LR
+ 30: JMPo-c $0x2547C770 ($4)
+
+
+. 0 2547CCD4 28
+. 81 5D 00 08 A2 1D 00 04 80 9D 00 00 7C AA CA 14 80 DC 00 14 56 08 07 BC 4B FF FA 85
+
+==== BB 961 (0x2547CCB4) approx BBs exec'd 0 ====
+
+ 0x2547CCB4: 811B0004 lwz r8,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547CCB8: 7EA7AB78 or r7,r21,r21
+ 5: GETL R21, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x2547CCBC: 88A80000 lbz r5,0(r8)
+ 8: GETL R8, t6
+ 9: LDB (t6), t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0x2547CCC0: 7D034378 or r3,r8,r8
+ 12: GETL R8, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x2547CCC4: 2C850000 cmpi cr1,r5,0
+ 15: GETL R5, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x1, CR
+ 18: INCEIPL $4
+
+ 0x2547CCC8: 4086000C bc 4,6,0x2547CCD4
+ 19: Jc06o $0x2547CCD4
+
+
+. 0 2547CCB4 24
+. 81 1B 00 04 7E A7 AB 78 88 A8 00 00 7D 03 43 78 2C 85 00 00 40 86 00 0C
+
+==== BB 962 (0x2547CD08) approx BBs exec'd 0 ====
+
+ 0x2547CD08: 807D000C lwz r3,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547CD0C: 2F830000 cmpi cr7,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547CD10: 7FBD1A14 add r29,r29,r3
+ 9: GETL R29, t8
+ 10: GETL R3, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R29
+ 13: INCEIPL $4
+
+ 0x2547CD14: 409EFFA0 bc 4,30,0x2547CCB4
+ 14: Jc30o $0x2547CCB4
+
+
+. 0 2547CD08 16
+. 80 7D 00 0C 2F 83 00 00 7F BD 1A 14 40 9E FF A0
+
+==== BB 963 (0x2547CE1C) approx BBs exec'd 0 ====
+
+ 0x2547CE1C: A2A70006 lhz r21,6(r7)
+ 0: GETL R7, t0
+ 1: ADDL $0x6, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x2547CE20: 80670000 lwz r3,0(r7)
+ 5: GETL R7, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0x2547CE24: 56A42376 rlwinm r4,r21,4,13,27
+ 9: GETL R21, t8
+ 10: ROLL $0x4, t8
+ 11: ANDL $0x7FFF0, t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x2547CE28: 56B00420 rlwinm r16,r21,0,16,16
+ 14: GETL R21, t10
+ 15: ANDL $0x8000, t10
+ 16: PUTL t10, R16
+ 17: INCEIPL $4
+
+ 0x2547CE2C: 7FA42A14 add r29,r4,r5
+ 18: GETL R4, t12
+ 19: GETL R5, t14
+ 20: ADDL t12, t14
+ 21: PUTL t14, R29
+ 22: INCEIPL $4
+
+ 0x2547CE30: 907D0004 stw r3,4(r29)
+ 23: GETL R3, t16
+ 24: GETL R29, t18
+ 25: ADDL $0x4, t18
+ 26: STL t16, (t18)
+ 27: INCEIPL $4
+
+ 0x2547CE34: 921D0008 stw r16,8(r29)
+ 28: GETL R16, t20
+ 29: GETL R29, t22
+ 30: ADDL $0x8, t22
+ 31: STL t20, (t22)
+ 32: INCEIPL $4
+
+ 0x2547CE38: 8167000C lwz r11,12(r7)
+ 33: GETL R7, t24
+ 34: ADDL $0xC, t24
+ 35: LDL (t24), t26
+ 36: PUTL t26, R11
+ 37: INCEIPL $4
+
+ 0x2547CE3C: 81470008 lwz r10,8(r7)
+ 38: GETL R7, t28
+ 39: ADDL $0x8, t28
+ 40: LDL (t28), t30
+ 41: PUTL t30, R10
+ 42: INCEIPL $4
+
+ 0x2547CE40: 2D8B0000 cmpi cr3,r11,0
+ 43: GETL R11, t32
+ 44: CMP0L t32, t34 (-rSo)
+ 45: ICRFL t34, $0x3, CR
+ 46: INCEIPL $4
+
+ 0x2547CE44: 81060004 lwz r8,4(r6)
+ 47: GETL R6, t36
+ 48: ADDL $0x4, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R8
+ 51: INCEIPL $4
+
+ 0x2547CE48: 7D2ACA14 add r9,r10,r25
+ 52: GETL R10, t40
+ 53: GETL R25, t42
+ 54: ADDL t40, t42
+ 55: PUTL t42, R9
+ 56: INCEIPL $4
+
+ 0x2547CE4C: 7CE75A14 add r7,r7,r11
+ 57: GETL R7, t44
+ 58: GETL R11, t46
+ 59: ADDL t44, t46
+ 60: PUTL t46, R7
+ 61: INCEIPL $4
+
+ 0x2547CE50: 7C08CA14 add r0,r8,r25
+ 62: GETL R8, t48
+ 63: GETL R25, t50
+ 64: ADDL t48, t50
+ 65: PUTL t50, R0
+ 66: INCEIPL $4
+
+ 0x2547CE54: 7D24292E stwx r9,r4,r5
+ 67: GETL R5, t52
+ 68: GETL R4, t54
+ 69: ADDL t54, t52
+ 70: GETL R9, t56
+ 71: STL t56, (t52)
+ 72: INCEIPL $4
+
+ 0x2547CE58: 901D000C stw r0,12(r29)
+ 73: GETL R0, t58
+ 74: GETL R29, t60
+ 75: ADDL $0xC, t60
+ 76: STL t58, (t60)
+ 77: INCEIPL $4
+
+ 0x2547CE5C: 408EFFC0 bc 4,14,0x2547CE1C
+ 78: Jc14o $0x2547CE1C
+
+
+. 0 2547CE1C 68
+. A2 A7 00 06 80 67 00 00 56 A4 23 76 56 B0 04 20 7F A4 2A 14 90 7D 00 04 92 1D 00 08 81 67 00 0C 81 47 00 08 2D 8B 00 00 81 06 00 04 7D 2A CA 14 7C E7 5A 14 7C 08 CA 14 7D 24 29 2E 90 1D 00 0C 40 8E FF C0
+
+==== BB 964 (0x2547CD34) approx BBs exec'd 0 ====
+
+ 0x2547CD34: 82BB0000 lwz r21,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R21
+ 3: INCEIPL $4
+
+ 0x2547CD38: 82F10004 lwz r23,4(r17)
+ 4: GETL R17, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R23
+ 8: INCEIPL $4
+
+ 0x2547CD3C: 7D35BA14 add r9,r21,r23
+ 9: GETL R21, t8
+ 10: GETL R23, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0x2547CD40: A2690004 lhz r19,4(r9)
+ 14: GETL R9, t12
+ 15: ADDL $0x4, t12
+ 16: LDW (t12), t14
+ 17: PUTL t14, R19
+ 18: INCEIPL $4
+
+ 0x2547CD44: 5660047E rlwinm r0,r19,0,17,31
+ 19: GETL R19, t16
+ 20: ANDL $0x7FFF, t16
+ 21: PUTL t16, R0
+ 22: INCEIPL $4
+
+ 0x2547CD48: 7C80C040 cmpl cr1,r0,r24
+ 23: GETL R0, t18
+ 24: GETL R24, t20
+ 25: CMPUL t18, t20, t22 (-rSo)
+ 26: ICRFL t22, $0x1, CR
+ 27: INCEIPL $4
+
+ 0x2547CD4C: 40850008 bc 4,5,0x2547CD54
+ 28: Jc05o $0x2547CD54
+
+
+. 0 2547CD34 28
+. 82 BB 00 00 82 F1 00 04 7D 35 BA 14 A2 69 00 04 56 60 04 7E 7C 80 C0 40 40 85 00 08
+
+==== BB 965 (0x2547CD54) approx BBs exec'd 0 ====
+
+ 0x2547CD54: 82890010 lwz r20,16(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R20
+ 4: INCEIPL $4
+
+ 0x2547CD58: 2F140000 cmpi cr6,r20,0
+ 5: GETL R20, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547CD5C: 7D29A214 add r9,r9,r20
+ 9: GETL R9, t8
+ 10: GETL R20, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0x2547CD60: 409AFFE0 bc 4,26,0x2547CD40
+ 14: Jc26o $0x2547CD40
+
+
+. 0 2547CD54 16
+. 82 89 00 10 2F 14 00 00 7D 29 A2 14 40 9A FF E0
+
+==== BB 966 (0x2547CD40) approx BBs exec'd 0 ====
+
+ 0x2547CD40: A2690004 lhz r19,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0x2547CD44: 5660047E rlwinm r0,r19,0,17,31
+ 5: GETL R19, t4
+ 6: ANDL $0x7FFF, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547CD48: 7C80C040 cmpl cr1,r0,r24
+ 9: GETL R0, t6
+ 10: GETL R24, t8
+ 11: CMPUL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x2547CD4C: 40850008 bc 4,5,0x2547CD54
+ 14: Jc05o $0x2547CD54
+
+
+. 0 2547CD40 16
+. A2 69 00 04 56 60 04 7E 7C 80 C0 40 40 85 00 08
+
+==== BB 967 (0x2547CE90) approx BBs exec'd 0 ====
+
+ 0x2547CE90: 80DB0000 lwz r6,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R6
+ 3: INCEIPL $4
+
+ 0x2547CE94: 38E00000 li r7,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R7
+ 6: INCEIPL $4
+
+ 0x2547CE98: 83710004 lwz r27,4(r17)
+ 7: GETL R17, t6
+ 8: ADDL $0x4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R27
+ 11: INCEIPL $4
+
+ 0x2547CE9C: 7C66DA14 add r3,r6,r27
+ 12: GETL R6, t10
+ 13: GETL R27, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R3
+ 16: INCEIPL $4
+
+ 0x2547CEA0: A2230002 lhz r17,2(r3)
+ 17: GETL R3, t14
+ 18: ADDL $0x2, t14
+ 19: LDW (t14), t16
+ 20: PUTL t16, R17
+ 21: INCEIPL $4
+
+ 0x2547CEA4: 8103000C lwz r8,12(r3)
+ 22: GETL R3, t18
+ 23: ADDL $0xC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R8
+ 26: INCEIPL $4
+
+ 0x2547CEA8: 72290001 andi. r9,r17,0x1
+ 27: GETL R17, t22
+ 28: ANDL $0x1, t22
+ 29: PUTL t22, R9
+ 30: CMP0L t22, t24 (-rSo)
+ 31: ICRFL t24, $0x0, CR
+ 32: INCEIPL $4
+
+ 0x2547CEAC: 40820028 bc 4,2,0x2547CED4
+ 33: Jc02o $0x2547CED4
+
+
+. 0 2547CE90 32
+. 80 DB 00 00 38 E0 00 00 83 71 00 04 7C 66 DA 14 A2 23 00 02 81 03 00 0C 72 29 00 01 40 82 00 28
+
+==== BB 968 (0x2547CED4) approx BBs exec'd 0 ====
+
+ 0x2547CED4: 82430010 lwz r18,16(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x2547CED8: 2E120000 cmpi cr4,r18,0
+ 5: GETL R18, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x2547CEDC: 7C639214 add r3,r3,r18
+ 9: GETL R3, t8
+ 10: GETL R18, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R3
+ 13: INCEIPL $4
+
+ 0x2547CEE0: 4092FFC0 bc 4,18,0x2547CEA0
+ 14: Jc18o $0x2547CEA0
+
+
+. 0 2547CED4 16
+. 82 43 00 10 2E 12 00 00 7C 63 92 14 40 92 FF C0
+
+==== BB 969 (0x2547CEA0) approx BBs exec'd 0 ====
+
+ 0x2547CEA0: A2230002 lhz r17,2(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x2, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R17
+ 4: INCEIPL $4
+
+ 0x2547CEA4: 8103000C lwz r8,12(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R8
+ 9: INCEIPL $4
+
+ 0x2547CEA8: 72290001 andi. r9,r17,0x1
+ 10: GETL R17, t8
+ 11: ANDL $0x1, t8
+ 12: PUTL t8, R9
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x2547CEAC: 40820028 bc 4,2,0x2547CED4
+ 16: Jc02o $0x2547CED4
+
+
+. 0 2547CEA0 16
+. A2 23 00 02 81 03 00 0C 72 29 00 01 40 82 00 28
+
+==== BB 970 (0x2547CEB0) approx BBs exec'd 0 ====
+
+ 0x2547CEB0: A3430004 lhz r26,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547CEB4: 83830008 lwz r28,8(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x2547CEB8: 57572376 rlwinm r23,r26,4,13,27
+ 10: GETL R26, t8
+ 11: ROLL $0x4, t8
+ 12: ANDL $0x7FFF0, t8
+ 13: PUTL t8, R23
+ 14: INCEIPL $4
+
+ 0x2547CEBC: 7F172A14 add r24,r23,r5
+ 15: GETL R23, t10
+ 16: GETL R5, t12
+ 17: ADDL t10, t12
+ 18: PUTL t12, R24
+ 19: INCEIPL $4
+
+ 0x2547CEC0: 93980004 stw r28,4(r24)
+ 20: GETL R28, t14
+ 21: GETL R24, t16
+ 22: ADDL $0x4, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x2547CEC4: 7E88182E lwzx r20,r8,r3
+ 25: GETL R3, t18
+ 26: GETL R8, t20
+ 27: ADDL t20, t18
+ 28: LDL (t18), t22
+ 29: PUTL t22, R20
+ 30: INCEIPL $4
+
+ 0x2547CEC8: 90F8000C stw r7,12(r24)
+ 31: GETL R7, t24
+ 32: GETL R24, t26
+ 33: ADDL $0xC, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547CECC: 7E74CA14 add r19,r20,r25
+ 36: GETL R20, t28
+ 37: GETL R25, t30
+ 38: ADDL t28, t30
+ 39: PUTL t30, R19
+ 40: INCEIPL $4
+
+ 0x2547CED0: 7E77292E stwx r19,r23,r5
+ 41: GETL R5, t32
+ 42: GETL R23, t34
+ 43: ADDL t34, t32
+ 44: GETL R19, t36
+ 45: STL t36, (t32)
+ 46: INCEIPL $4
+
+ 0x2547CED4: 82430010 lwz r18,16(r3)
+ 47: GETL R3, t38
+ 48: ADDL $0x10, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R18
+ 51: INCEIPL $4
+
+ 0x2547CED8: 2E120000 cmpi cr4,r18,0
+ 52: GETL R18, t42
+ 53: CMP0L t42, t44 (-rSo)
+ 54: ICRFL t44, $0x4, CR
+ 55: INCEIPL $4
+
+ 0x2547CEDC: 7C639214 add r3,r3,r18
+ 56: GETL R3, t46
+ 57: GETL R18, t48
+ 58: ADDL t46, t48
+ 59: PUTL t48, R3
+ 60: INCEIPL $4
+
+ 0x2547CEE0: 4092FFC0 bc 4,18,0x2547CEA0
+ 61: Jc18o $0x2547CEA0
+
+
+. 0 2547CEB0 52
+. A3 43 00 04 83 83 00 08 57 57 23 76 7F 17 2A 14 93 98 00 04 7E 88 18 2E 90 F8 00 0C 7E 74 CA 14 7E 77 29 2E 82 43 00 10 2E 12 00 00 7C 63 92 14 40 92 FF C0
+
+==== BB 971 (0x2547CEE4) approx BBs exec'd 0 ====
+
+ 0x2547CEE4: 7EC3B378 or r3,r22,r22
+ 0: GETL R22, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547CEE8: 4BFFFE88 b 0x2547CD70
+ 3: JMPo $0x2547CD70 ($4)
+
+
+. 0 2547CEE4 8
+. 7E C3 B3 78 4B FF FE 88
+
+==== BB 972 (0x2547CD70) approx BBs exec'd 0 ====
+
+ 0x2547CD70: 80A10000 lwz r5,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x2547CD74: 82C50004 lwz r22,4(r5)
+ 4: GETL R5, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R22
+ 8: INCEIPL $4
+
+ 0x2547CD78: 8185FFBC lwz r12,-68(r5)
+ 9: GETL R5, t8
+ 10: ADDL $0xFFFFFFBC, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0x2547CD7C: 7EC803A6 mtlr r22
+ 14: GETL R22, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x2547CD80: 8205FFC0 lwz r16,-64(r5)
+ 17: GETL R5, t14
+ 18: ADDL $0xFFFFFFC0, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R16
+ 21: INCEIPL $4
+
+ 0x2547CD84: 8225FFC4 lwz r17,-60(r5)
+ 22: GETL R5, t18
+ 23: ADDL $0xFFFFFFC4, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R17
+ 26: INCEIPL $4
+
+ 0x2547CD88: 7D818120 mtcrf 0x18,r12
+ 27: GETL R12, t22
+ 28: ICRFL t22, $0x3, CR
+ 29: ICRFL t22, $0x4, CR
+ 30: INCEIPL $4
+
+ 0x2547CD8C: 8245FFC8 lwz r18,-56(r5)
+ 31: GETL R5, t24
+ 32: ADDL $0xFFFFFFC8, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R18
+ 35: INCEIPL $4
+
+ 0x2547CD90: 8265FFCC lwz r19,-52(r5)
+ 36: GETL R5, t28
+ 37: ADDL $0xFFFFFFCC, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R19
+ 40: INCEIPL $4
+
+ 0x2547CD94: 8285FFD0 lwz r20,-48(r5)
+ 41: GETL R5, t32
+ 42: ADDL $0xFFFFFFD0, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R20
+ 45: INCEIPL $4
+
+ 0x2547CD98: 82A5FFD4 lwz r21,-44(r5)
+ 46: GETL R5, t36
+ 47: ADDL $0xFFFFFFD4, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R21
+ 50: INCEIPL $4
+
+ 0x2547CD9C: 82C5FFD8 lwz r22,-40(r5)
+ 51: GETL R5, t40
+ 52: ADDL $0xFFFFFFD8, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R22
+ 55: INCEIPL $4
+
+ 0x2547CDA0: 82E5FFDC lwz r23,-36(r5)
+ 56: GETL R5, t44
+ 57: ADDL $0xFFFFFFDC, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R23
+ 60: INCEIPL $4
+
+ 0x2547CDA4: 8305FFE0 lwz r24,-32(r5)
+ 61: GETL R5, t48
+ 62: ADDL $0xFFFFFFE0, t48
+ 63: LDL (t48), t50
+ 64: PUTL t50, R24
+ 65: INCEIPL $4
+
+ 0x2547CDA8: 8325FFE4 lwz r25,-28(r5)
+ 66: GETL R5, t52
+ 67: ADDL $0xFFFFFFE4, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R25
+ 70: INCEIPL $4
+
+ 0x2547CDAC: 8345FFE8 lwz r26,-24(r5)
+ 71: GETL R5, t56
+ 72: ADDL $0xFFFFFFE8, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R26
+ 75: INCEIPL $4
+
+ 0x2547CDB0: 8365FFEC lwz r27,-20(r5)
+ 76: GETL R5, t60
+ 77: ADDL $0xFFFFFFEC, t60
+ 78: LDL (t60), t62
+ 79: PUTL t62, R27
+ 80: INCEIPL $4
+
+ 0x2547CDB4: 8385FFF0 lwz r28,-16(r5)
+ 81: GETL R5, t64
+ 82: ADDL $0xFFFFFFF0, t64
+ 83: LDL (t64), t66
+ 84: PUTL t66, R28
+ 85: INCEIPL $4
+
+ 0x2547CDB8: 83A5FFF4 lwz r29,-12(r5)
+ 86: GETL R5, t68
+ 87: ADDL $0xFFFFFFF4, t68
+ 88: LDL (t68), t70
+ 89: PUTL t70, R29
+ 90: INCEIPL $4
+
+ 0x2547CDBC: 83C5FFF8 lwz r30,-8(r5)
+ 91: GETL R5, t72
+ 92: ADDL $0xFFFFFFF8, t72
+ 93: LDL (t72), t74
+ 94: PUTL t74, R30
+ 95: INCEIPL $4
+
+ 0x2547CDC0: 83E5FFFC lwz r31,-4(r5)
+ 96: GETL R5, t76
+ 97: ADDL $0xFFFFFFFC, t76
+ 98: LDL (t76), t78
+ 99: PUTL t78, R31
+ 100: INCEIPL $4
+
+ 0x2547CDC4: 7CA12B78 or r1,r5,r5
+ 101: GETL R5, t80
+ 102: PUTL t80, R1
+ 103: INCEIPL $4
+
+ 0x2547CDC8: 4E800020 blr
+ 104: GETL LR, t82
+ 105: JMPo-r t82 ($4)
+
+
+. 0 2547CD70 92
+. 80 A1 00 00 82 C5 00 04 81 85 FF BC 7E C8 03 A6 82 05 FF C0 82 25 FF C4 7D 81 81 20 82 45 FF C8 82 65 FF CC 82 85 FF D0 82 A5 FF D4 82 C5 FF D8 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
+
+==== BB 973 (0x2547CD50) approx BBs exec'd 0 ====
+
+ 0x2547CD50: 7C180378 or r24,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R24
+ 2: INCEIPL $4
+
+ 0x2547CD54: 82890010 lwz r20,16(r9)
+ 3: GETL R9, t2
+ 4: ADDL $0x10, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R20
+ 7: INCEIPL $4
+
+ 0x2547CD58: 2F140000 cmpi cr6,r20,0
+ 8: GETL R20, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0x2547CD5C: 7D29A214 add r9,r9,r20
+ 12: GETL R9, t10
+ 13: GETL R20, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R9
+ 16: INCEIPL $4
+
+ 0x2547CD60: 409AFFE0 bc 4,26,0x2547CD40
+ 17: Jc26o $0x2547CD40
+
+
+. 0 2547CD50 20
+. 7C 18 03 78 82 89 00 10 2F 14 00 00 7D 29 A2 14 40 9A FF E0
+
+==== BB 974 (0x2547D050) approx BBs exec'd 0 ====
+
+ 0x2547D050: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547D054: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547D058: 83410008 lwz r26,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x2547D05C: 8361000C lwz r27,12(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0xC, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R27
+ 17: INCEIPL $4
+
+ 0x2547D060: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547D064: 83810010 lwz r28,16(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x10, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R28
+ 25: INCEIPL $4
+
+ 0x2547D068: 83A10014 lwz r29,20(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R29
+ 30: INCEIPL $4
+
+ 0x2547D06C: 83C10018 lwz r30,24(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x18, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R30
+ 35: INCEIPL $4
+
+ 0x2547D070: 83E1001C lwz r31,28(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R31
+ 40: INCEIPL $4
+
+ 0x2547D074: 38210020 addi r1,r1,32
+ 41: GETL R1, t32
+ 42: ADDL $0x20, t32
+ 43: PUTL t32, R1
+ 44: INCEIPL $4
+
+ 0x2547D078: 4E800020 blr
+ 45: GETL LR, t34
+ 46: JMPo-r t34 ($4)
+
+
+. 0 2547D050 44
+. 80 81 00 24 7F 83 E3 78 83 41 00 08 83 61 00 0C 7C 88 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 975 (0x2547180C) approx BBs exec'd 0 ====
+
+ 0x2547180C: 2F830000 cmpi cr7,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25471810: 419E0014 bc 12,30,0x25471824
+ 4: Js30o $0x25471824
+
+
+. 0 2547180C 8
+. 2F 83 00 00 41 9E 00 14
+
+==== BB 976 (0x25471824) approx BBs exec'd 0 ====
+
+ 0x25471824: 80610024 lwz r3,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25471828: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547182C: 83C10018 lwz r30,24(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R30
+ 14: INCEIPL $4
+
+ 0x25471830: 7C6803A6 mtlr r3
+ 15: GETL R3, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x25471834: 83E1001C lwz r31,28(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x1C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R31
+ 22: INCEIPL $4
+
+ 0x25471838: 38210020 addi r1,r1,32
+ 23: GETL R1, t18
+ 24: ADDL $0x20, t18
+ 25: PUTL t18, R1
+ 26: INCEIPL $4
+
+ 0x2547183C: 4E800020 blr
+ 27: GETL LR, t20
+ 28: JMPo-r t20 ($4)
+
+
+. 0 25471824 28
+. 80 61 00 24 83 A1 00 14 83 C1 00 18 7C 68 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 977 (0x2547B70C) approx BBs exec'd 0 ====
+
+ 0x2547B70C: 935D0000 stw r26,0(r29)
+ 0: GETL R26, t0
+ 1: GETL R29, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x2547B710: 80010034 lwz r0,52(r1)
+ 4: GETL R1, t4
+ 5: ADDL $0x34, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R0
+ 8: INCEIPL $4
+
+ 0x2547B714: 937C0000 stw r27,0(r28)
+ 9: GETL R27, t8
+ 10: GETL R28, t10
+ 11: STL t8, (t10)
+ 12: INCEIPL $4
+
+ 0x2547B718: 82E1000C lwz r23,12(r1)
+ 13: GETL R1, t12
+ 14: ADDL $0xC, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R23
+ 17: INCEIPL $4
+
+ 0x2547B71C: 7C0803A6 mtlr r0
+ 18: GETL R0, t16
+ 19: PUTL t16, LR
+ 20: INCEIPL $4
+
+ 0x2547B720: 83210014 lwz r25,20(r1)
+ 21: GETL R1, t18
+ 22: ADDL $0x14, t18
+ 23: LDL (t18), t20
+ 24: PUTL t20, R25
+ 25: INCEIPL $4
+
+ 0x2547B724: 83410018 lwz r26,24(r1)
+ 26: GETL R1, t22
+ 27: ADDL $0x18, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R26
+ 30: INCEIPL $4
+
+ 0x2547B728: 8361001C lwz r27,28(r1)
+ 31: GETL R1, t26
+ 32: ADDL $0x1C, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R27
+ 35: INCEIPL $4
+
+ 0x2547B72C: 83810020 lwz r28,32(r1)
+ 36: GETL R1, t30
+ 37: ADDL $0x20, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R28
+ 40: INCEIPL $4
+
+ 0x2547B730: 83A10024 lwz r29,36(r1)
+ 41: GETL R1, t34
+ 42: ADDL $0x24, t34
+ 43: LDL (t34), t36
+ 44: PUTL t36, R29
+ 45: INCEIPL $4
+
+ 0x2547B734: 83C10028 lwz r30,40(r1)
+ 46: GETL R1, t38
+ 47: ADDL $0x28, t38
+ 48: LDL (t38), t40
+ 49: PUTL t40, R30
+ 50: INCEIPL $4
+
+ 0x2547B738: 38210030 addi r1,r1,48
+ 51: GETL R1, t42
+ 52: ADDL $0x30, t42
+ 53: PUTL t42, R1
+ 54: INCEIPL $4
+
+ 0x2547B73C: 4E800020 blr
+ 55: GETL LR, t44
+ 56: JMPo-r t44 ($4)
+
+
+. 0 2547B70C 52
+. 93 5D 00 00 80 01 00 34 93 7C 00 00 82 E1 00 0C 7C 08 03 A6 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 38 21 00 30 4E 80 00 20
+
+==== BB 978 (0x25472900) approx BBs exec'd 0 ====
+
+ 0x25472900: 836E03D8 lwz r27,984(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x3D8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x25472904: 2E1B0000 cmpi cr4,r27,0
+ 5: GETL R27, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x25472908: 40920AEC bc 4,18,0x254733F4
+ 9: Jc18o $0x254733F4
+
+
+. 0 25472900 12
+. 83 6E 03 D8 2E 1B 00 00 40 92 0A EC
+
+==== BB 979 (0x2547290C) approx BBs exec'd 0 ====
+
+ 0x2547290C: 816E0408 lwz r11,1032(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x408, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25472910: 3ACB003F addi r22,r11,63
+ 5: GETL R11, t4
+ 6: ADDL $0x3F, t4
+ 7: PUTL t4, R22
+ 8: INCEIPL $4
+
+ 0x25472914: 916E0414 stw r11,1044(r14)
+ 9: GETL R11, t6
+ 10: GETL R14, t8
+ 11: ADDL $0x414, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x25472918: 56D91838 rlwinm r25,r22,3,0,28
+ 14: GETL R22, t10
+ 15: SHLL $0x3, t10
+ 16: PUTL t10, R25
+ 17: INCEIPL $4
+
+ 0x2547291C: 38790008 addi r3,r25,8
+ 18: GETL R25, t12
+ 19: ADDL $0x8, t12
+ 20: PUTL t12, R3
+ 21: INCEIPL $4
+
+ 0x25472920: 48025105 bl 0x25497A24
+ 22: MOVL $0x25472924, t14
+ 23: PUTL t14, LR
+ 24: JMPo-c $0x25497A24 ($4)
+
+
+. 0 2547290C 24
+. 81 6E 04 08 3A CB 00 3F 91 6E 04 14 56 D9 18 38 38 79 00 08 48 02 51 05
+
+==== BB 980 (0x25472924) approx BBs exec'd 0 ====
+
+ 0x25472924: 7F25CB78 or r5,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x25472928: 7C6C1B78 or r12,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R12
+ 5: INCEIPL $4
+
+ 0x2547292C: 38800000 li r4,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x25472930: 38630008 addi r3,r3,8
+ 9: GETL R3, t6
+ 10: ADDL $0x8, t6
+ 11: PUTL t6, R3
+ 12: INCEIPL $4
+
+ 0x25472934: 918E0410 stw r12,1040(r14)
+ 13: GETL R12, t8
+ 14: GETL R14, t10
+ 15: ADDL $0x410, t10
+ 16: STL t8, (t10)
+ 17: INCEIPL $4
+
+ 0x25472938: 48010E0D bl 0x25483744
+ 18: MOVL $0x2547293C, t12
+ 19: PUTL t12, LR
+ 20: JMPo-c $0x25483744 ($4)
+
+
+. 0 25472924 24
+. 7F 25 CB 78 7C 6C 1B 78 38 80 00 00 38 63 00 08 91 8E 04 10 48 01 0E 0D
+
+==== BB 981 (0x2547293C) approx BBs exec'd 0 ====
+
+ 0x2547293C: 80CE0410 lwz r6,1040(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x410, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x25472940: 38000000 li r0,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x25472944: 7E89A378 or r9,r20,r20
+ 8: GETL R20, t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0x25472948: 90060004 stw r0,4(r6)
+ 11: GETL R0, t8
+ 12: GETL R6, t10
+ 13: ADDL $0x4, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x2547294C: 92C60000 stw r22,0(r6)
+ 16: GETL R22, t12
+ 17: GETL R6, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x25472950: 418E0024 bc 12,14,0x25472974
+ 20: Js14o $0x25472974
+
+
+. 0 2547293C 24
+. 80 CE 04 10 38 00 00 00 7E 89 A3 78 90 06 00 04 92 C6 00 00 41 8E 00 24
+
+==== BB 982 (0x25472954) approx BBs exec'd 0 ====
+
+ 0x25472954: 38630004 addi r3,r3,4
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x25472958: 83890220 lwz r28,544(r9)
+ 4: GETL R9, t2
+ 5: ADDL $0x220, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x2547295C: 2F1C0000 cmpi cr6,r28,0
+ 9: GETL R28, t6
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x6, CR
+ 12: INCEIPL $4
+
+ 0x25472960: 419A0008 bc 12,26,0x25472968
+ 13: Js26o $0x25472968
+
+
+. 0 25472954 16
+. 38 63 00 04 83 89 02 20 2F 1C 00 00 41 9A 00 08
+
+==== BB 983 (0x25472968) approx BBs exec'd 0 ====
+
+ 0x25472968: 8129000C lwz r9,12(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547296C: 2C090000 cmpi cr0,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25472970: 4082FFE8 bc 4,2,0x25472958
+ 9: Jc02o $0x25472958
+
+
+. 0 25472968 12
+. 81 29 00 0C 2C 09 00 00 40 82 FF E8
+
+==== BB 984 (0x25472958) approx BBs exec'd 0 ====
+
+ 0x25472958: 83890220 lwz r28,544(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x220, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x2547295C: 2F1C0000 cmpi cr6,r28,0
+ 5: GETL R28, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x25472960: 419A0008 bc 12,26,0x25472968
+ 9: Js26o $0x25472968
+
+
+. 0 25472958 12
+. 83 89 02 20 2F 1C 00 00 41 9A 00 08
+
+==== BB 985 (0x25472964) approx BBs exec'd 0 ====
+
+ 0x25472964: 95230008 stwu r9,8(r3)
+ 0: GETL R9, t0
+ 1: GETL R3, t2
+ 2: ADDL $0x8, t2
+ 3: PUTL t2, R3
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25472968: 8129000C lwz r9,12(r9)
+ 6: GETL R9, t4
+ 7: ADDL $0xC, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R9
+ 10: INCEIPL $4
+
+ 0x2547296C: 2C090000 cmpi cr0,r9,0
+ 11: GETL R9, t8
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25472970: 4082FFE8 bc 4,2,0x25472958
+ 15: Jc02o $0x25472958
+
+
+. 0 25472964 16
+. 95 23 00 08 81 29 00 0C 2C 09 00 00 40 82 FF E8
+
+==== BB 986 (0x25472974) approx BBs exec'd 0 ====
+
+ 0x25472974: 4800B359 bl 0x2547DCCC
+ 0: MOVL $0x25472978, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547DCCC ($4)
+
+
+. 0 25472974 4
+. 48 00 B3 59
+
+==== BB 987 _dl_determine_tlsoffset(0x2547DCCC) approx BBs exec'd 0 ====
+
+ 0x2547DCCC: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547DCD0: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x2547DCD4: 4801932D bl 0x25497000
+ 9: MOVL $0x2547DCD8, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547DCCC 12
+. 94 21 FF E0 7D 88 02 A6 48 01 93 2D
+
+==== BB 988 (0x2547DCD8) approx BBs exec'd 0 ====
+
+ 0x2547DCD8: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547DCDC: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547DCE0: 9361000C stw r27,12(r1)
+ 8: GETL R27, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547DCE4: 93810010 stw r28,16(r1)
+ 13: GETL R28, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x10, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547DCE8: 38600000 li r3,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R3
+ 20: INCEIPL $4
+
+ 0x2547DCEC: 93A10014 stw r29,20(r1)
+ 21: GETL R29, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547DCF0: 7D8803A6 mtlr r12
+ 26: GETL R12, t20
+ 27: PUTL t20, LR
+ 28: INCEIPL $4
+
+ 0x2547DCF4: 837E04C8 lwz r27,1224(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x4C8, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R27
+ 33: INCEIPL $4
+
+ 0x2547DCF8: 3B800020 li r28,32
+ 34: MOVL $0x20, t26
+ 35: PUTL t26, R28
+ 36: INCEIPL $4
+
+ 0x2547DCFC: 93E1001C stw r31,28(r1)
+ 37: GETL R31, t28
+ 38: GETL R1, t30
+ 39: ADDL $0x1C, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0x2547DD00: 3BA00000 li r29,0
+ 42: MOVL $0x0, t32
+ 43: PUTL t32, R29
+ 44: INCEIPL $4
+
+ 0x2547DD04: 813B0410 lwz r9,1040(r27)
+ 45: GETL R27, t34
+ 46: ADDL $0x410, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R9
+ 49: INCEIPL $4
+
+ 0x2547DD08: 3BE00000 li r31,0
+ 50: MOVL $0x0, t38
+ 51: PUTL t38, R31
+ 52: INCEIPL $4
+
+ 0x2547DD0C: 39800001 li r12,1
+ 53: MOVL $0x1, t40
+ 54: PUTL t40, R12
+ 55: INCEIPL $4
+
+ 0x2547DD10: 38A90008 addi r5,r9,8
+ 56: GETL R9, t42
+ 57: ADDL $0x8, t42
+ 58: PUTL t42, R5
+ 59: INCEIPL $4
+
+ 0x2547DD14: 8005000C lwz r0,12(r5)
+ 60: GETL R5, t44
+ 61: ADDL $0xC, t44
+ 62: LDL (t44), t46
+ 63: PUTL t46, R0
+ 64: INCEIPL $4
+
+ 0x2547DD18: 2F800000 cmpi cr7,r0,0
+ 65: GETL R0, t48
+ 66: CMP0L t48, t50 (-rSo)
+ 67: ICRFL t50, $0x7, CR
+ 68: INCEIPL $4
+
+ 0x2547DD1C: 419E0104 bc 12,30,0x2547DE20
+ 69: Js30o $0x2547DE20
+
+
+. 0 2547DCD8 72
+. 93 C1 00 18 7F C8 02 A6 93 61 00 0C 93 81 00 10 38 60 00 00 93 A1 00 14 7D 88 03 A6 83 7E 04 C8 3B 80 00 20 93 E1 00 1C 3B A0 00 00 81 3B 04 10 3B E0 00 00 39 80 00 01 38 A9 00 08 80 05 00 0C 2F 80 00 00 41 9E 01 04
+
+==== BB 989 (0x2547DD20) approx BBs exec'd 0 ====
+
+ 0x2547DD20: 38C00008 li r6,8
+ 0: MOVL $0x8, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x2547DD24: 48000058 b 0x2547DD7C
+ 3: JMPo $0x2547DD7C ($4)
+
+
+. 0 2547DD20 8
+. 38 C0 00 08 48 00 00 58
+
+==== BB 990 (0x2547DD7C) approx BBs exec'd 0 ====
+
+ 0x2547DD7C: 7D662A14 add r11,r6,r5
+ 0: GETL R6, t0
+ 1: GETL R5, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547DD80: 814B0004 lwz r10,4(r11)
+ 5: GETL R11, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x2547DD84: 816A0224 lwz r11,548(r10)
+ 10: GETL R10, t8
+ 11: ADDL $0x224, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547DD88: 810A0228 lwz r8,552(r10)
+ 15: GETL R10, t12
+ 16: ADDL $0x228, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R8
+ 19: INCEIPL $4
+
+ 0x2547DD8C: 7C1C5840 cmpl cr0,r28,r11
+ 20: GETL R28, t16
+ 21: GETL R11, t18
+ 22: CMPUL t16, t18, t20 (-rSo)
+ 23: ICRFL t20, $0x0, CR
+ 24: INCEIPL $4
+
+ 0x2547DD90: 388BFFFF addi r4,r11,-1
+ 25: GETL R11, t22
+ 26: ADDL $0xFFFFFFFF, t22
+ 27: PUTL t22, R4
+ 28: INCEIPL $4
+
+ 0x2547DD94: 7CE800D0 neg r7,r8
+ 29: GETL R8, t24
+ 30: NEGL t24
+ 31: PUTL t24, R7
+ 32: INCEIPL $4
+
+ 0x2547DD98: 7CE82038 and r8,r7,r4
+ 33: GETL R7, t26
+ 34: GETL R4, t28
+ 35: ANDL t26, t28
+ 36: PUTL t28, R8
+ 37: INCEIPL $4
+
+ 0x2547DD9C: 40800008 bc 4,0,0x2547DDA4
+ 38: Jc00o $0x2547DDA4
+
+
+. 0 2547DD7C 36
+. 7D 66 2A 14 81 4B 00 04 81 6A 02 24 81 0A 02 28 7C 1C 58 40 38 8B FF FF 7C E8 00 D0 7C E8 20 38 40 80 00 08
+
+==== BB 991 (0x2547DDA4) approx BBs exec'd 0 ====
+
+ 0x2547DDA4: 80EA0220 lwz r7,544(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x220, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547DDA8: 7C9FE850 subf r4,r31,r29
+ 5: GETL R31, t4
+ 6: GETL R29, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x2547DDAC: 7C872040 cmpl cr1,r7,r4
+ 10: GETL R7, t8
+ 11: GETL R4, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x2547DDB0: 40A5FF78 bc 5,5,0x2547DD28
+ 15: Jc05o $0x2547DD28
+
+
+. 0 2547DDA4 16
+. 80 EA 02 20 7C 9F E8 50 7C 87 20 40 40 A5 FF 78
+
+==== BB 992 (0x2547DDB4) approx BBs exec'd 0 ====
+
+ 0x2547DDB4: 7D662A14 add r11,r6,r5
+ 0: GETL R6, t0
+ 1: GETL R5, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547DDB8: 814B0004 lwz r10,4(r11)
+ 5: GETL R11, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x2547DDBC: 816A0224 lwz r11,548(r10)
+ 10: GETL R10, t8
+ 11: ADDL $0x224, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547DDC0: 7CCB1A14 add r6,r11,r3
+ 15: GETL R11, t12
+ 16: GETL R3, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R6
+ 19: INCEIPL $4
+
+ 0x2547DDC4: 3806FFFF addi r0,r6,-1
+ 20: GETL R6, t16
+ 21: ADDL $0xFFFFFFFF, t16
+ 22: PUTL t16, R0
+ 23: INCEIPL $4
+
+ 0x2547DDC8: 7D205B96 divwu r9, r0, r11
+ 24: GETL R0, t20
+ 25: GETL R11, t18
+ 26: UDIVL t18, t20
+ 27: PUTL t20, R9
+ 28: INCEIPL $4
+
+ 0x2547DDCC: 7D2959D6 mullw r9,r9,r11
+ 29: GETL R9, t22
+ 30: GETL R11, t24
+ 31: MULL t22, t24
+ 32: PUTL t24, R9
+ 33: INCEIPL $4
+
+ 0x2547DDD0: 7CE34850 subf r7,r3,r9
+ 34: GETL R3, t26
+ 35: GETL R9, t28
+ 36: SUBL t26, t28
+ 37: PUTL t28, R7
+ 38: INCEIPL $4
+
+ 0x2547DDD4: 7C074040 cmpl cr0,r7,r8
+ 39: GETL R7, t30
+ 40: GETL R8, t32
+ 41: CMPUL t30, t32, t34 (-rSo)
+ 42: ICRFL t34, $0x0, CR
+ 43: INCEIPL $4
+
+ 0x2547DDD8: 40800008 bc 4,0,0x2547DDE0
+ 44: Jc00o $0x2547DDE0
+
+
+. 0 2547DDB4 40
+. 7D 66 2A 14 81 4B 00 04 81 6A 02 24 7C CB 1A 14 38 06 FF FF 7D 20 5B 96 7D 29 59 D6 7C E3 48 50 7C 07 40 40 40 80 00 08
+
+==== BB 993 (0x2547DDE0) approx BBs exec'd 0 ====
+
+ 0x2547DDE0: 7D684850 subf r11,r8,r9
+ 0: GETL R8, t0
+ 1: GETL R9, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547DDE4: 7CE35850 subf r7,r3,r11
+ 5: GETL R3, t4
+ 6: GETL R11, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R7
+ 9: INCEIPL $4
+
+ 0x2547DDE8: 916A022C stw r11,556(r10)
+ 10: GETL R11, t8
+ 11: GETL R10, t10
+ 12: ADDL $0x22C, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x2547DDEC: 7C872040 cmpl cr1,r7,r4
+ 15: GETL R7, t12
+ 16: GETL R4, t14
+ 17: CMPUL t12, t14, t16 (-rSo)
+ 18: ICRFL t16, $0x1, CR
+ 19: INCEIPL $4
+
+ 0x2547DDF0: 4085000C bc 4,5,0x2547DDFC
+ 20: Jc05o $0x2547DDFC
+
+
+. 0 2547DDE0 20
+. 7D 68 48 50 7C E3 58 50 91 6A 02 2C 7C 87 20 40 40 85 00 0C
+
+==== BB 994 (0x2547DDFC) approx BBs exec'd 0 ====
+
+ 0x2547DDFC: 806A0220 lwz r3,544(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x220, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547DE00: 398C0001 addi r12,r12,1
+ 5: GETL R12, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x2547DE04: 55861838 rlwinm r6,r12,3,0,28
+ 9: GETL R12, t6
+ 10: SHLL $0x3, t6
+ 11: PUTL t6, R6
+ 12: INCEIPL $4
+
+ 0x2547DE08: 7D434A14 add r10,r3,r9
+ 13: GETL R3, t8
+ 14: GETL R9, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R10
+ 17: INCEIPL $4
+
+ 0x2547DE0C: 7C685050 subf r3,r8,r10
+ 18: GETL R8, t12
+ 19: GETL R10, t14
+ 20: SUBL t12, t14
+ 21: PUTL t14, R3
+ 22: INCEIPL $4
+
+ 0x2547DE10: 7D062A14 add r8,r6,r5
+ 23: GETL R6, t16
+ 24: GETL R5, t18
+ 25: ADDL t16, t18
+ 26: PUTL t18, R8
+ 27: INCEIPL $4
+
+ 0x2547DE14: 80880004 lwz r4,4(r8)
+ 28: GETL R8, t20
+ 29: ADDL $0x4, t20
+ 30: LDL (t20), t22
+ 31: PUTL t22, R4
+ 32: INCEIPL $4
+
+ 0x2547DE18: 2F040000 cmpi cr6,r4,0
+ 33: GETL R4, t24
+ 34: CMP0L t24, t26 (-rSo)
+ 35: ICRFL t26, $0x6, CR
+ 36: INCEIPL $4
+
+ 0x2547DE1C: 409AFF60 bc 4,26,0x2547DD7C
+ 37: Jc26o $0x2547DD7C
+
+
+. 0 2547DDFC 36
+. 80 6A 02 20 39 8C 00 01 55 86 18 38 7D 43 4A 14 7C 68 50 50 7D 06 2A 14 80 88 00 04 2F 04 00 00 40 9A FF 60
+
+==== BB 995 (0x2547DE20) approx BBs exec'd 0 ====
+
+ 0x2547DE20: 3BA3069F addi r29,r3,1695
+ 0: GETL R3, t0
+ 1: ADDL $0x69F, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0x2547DE24: 939B0420 stw r28,1056(r27)
+ 4: GETL R28, t2
+ 5: GETL R27, t4
+ 6: ADDL $0x420, t4
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547DE28: 57A50034 rlwinm r5,r29,0,0,26
+ 9: GETL R29, t6
+ 10: ANDL $0xFFFFFFE0, t6
+ 11: PUTL t6, R5
+ 12: INCEIPL $4
+
+ 0x2547DE2C: 907B041C stw r3,1052(r27)
+ 13: GETL R3, t8
+ 14: GETL R27, t10
+ 15: ADDL $0x41C, t10
+ 16: STL t8, (t10)
+ 17: INCEIPL $4
+
+ 0x2547DE30: 90BB0418 stw r5,1048(r27)
+ 18: GETL R5, t12
+ 19: GETL R27, t14
+ 20: ADDL $0x418, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0x2547DE34: 83810010 lwz r28,16(r1)
+ 23: GETL R1, t16
+ 24: ADDL $0x10, t16
+ 25: LDL (t16), t18
+ 26: PUTL t18, R28
+ 27: INCEIPL $4
+
+ 0x2547DE38: 8361000C lwz r27,12(r1)
+ 28: GETL R1, t20
+ 29: ADDL $0xC, t20
+ 30: LDL (t20), t22
+ 31: PUTL t22, R27
+ 32: INCEIPL $4
+
+ 0x2547DE3C: 83A10014 lwz r29,20(r1)
+ 33: GETL R1, t24
+ 34: ADDL $0x14, t24
+ 35: LDL (t24), t26
+ 36: PUTL t26, R29
+ 37: INCEIPL $4
+
+ 0x2547DE40: 83C10018 lwz r30,24(r1)
+ 38: GETL R1, t28
+ 39: ADDL $0x18, t28
+ 40: LDL (t28), t30
+ 41: PUTL t30, R30
+ 42: INCEIPL $4
+
+ 0x2547DE44: 83E1001C lwz r31,28(r1)
+ 43: GETL R1, t32
+ 44: ADDL $0x1C, t32
+ 45: LDL (t32), t34
+ 46: PUTL t34, R31
+ 47: INCEIPL $4
+
+ 0x2547DE48: 38210020 addi r1,r1,32
+ 48: GETL R1, t36
+ 49: ADDL $0x20, t36
+ 50: PUTL t36, R1
+ 51: INCEIPL $4
+
+ 0x2547DE4C: 4E800020 blr
+ 52: GETL LR, t38
+ 53: JMPo-r t38 ($4)
+
+
+. 0 2547DE20 48
+. 3B A3 06 9F 93 9B 04 20 57 A5 00 34 90 7B 04 1C 90 BB 04 18 83 81 00 10 83 61 00 0C 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 996 (0x25472978) approx BBs exec'd 0 ====
+
+ 0x25472978: 4800B57D bl 0x2547DEF4
+ 0: MOVL $0x2547297C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547DEF4 ($4)
+
+
+. 0 25472978 4
+. 48 00 B5 7D
+
+==== BB 997 _dl_allocate_tls_storage(0x2547DEF4) approx BBs exec'd 0 ====
+
+ 0x2547DEF4: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547DEF8: 7C6802A6 mflr r3
+ 6: GETL LR, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x2547DEFC: 48019105 bl 0x25497000
+ 9: MOVL $0x2547DF00, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547DEF4 12
+. 94 21 FF E0 7C 68 02 A6 48 01 91 05
+
+==== BB 998 (0x2547DF00) approx BBs exec'd 0 ====
+
+ 0x2547DF00: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547DF04: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547DF08: 93810010 stw r28,16(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547DF0C: 90610024 stw r3,36(r1)
+ 13: GETL R3, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547DF10: 93A10014 stw r29,20(r1)
+ 18: GETL R29, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x14, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x2547DF14: 839E04C8 lwz r28,1224(r30)
+ 23: GETL R30, t18
+ 24: ADDL $0x4C8, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R28
+ 27: INCEIPL $4
+
+ 0x2547DF18: 9361000C stw r27,12(r1)
+ 28: GETL R27, t22
+ 29: GETL R1, t24
+ 30: ADDL $0xC, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0x2547DF1C: 807C0420 lwz r3,1056(r28)
+ 33: GETL R28, t26
+ 34: ADDL $0x420, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R3
+ 37: INCEIPL $4
+
+ 0x2547DF20: 809C0418 lwz r4,1048(r28)
+ 38: GETL R28, t30
+ 39: ADDL $0x418, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R4
+ 42: INCEIPL $4
+
+ 0x2547DF24: 38A3046F addi r5,r3,1135
+ 43: GETL R3, t34
+ 44: ADDL $0x46F, t34
+ 45: PUTL t34, R5
+ 46: INCEIPL $4
+
+ 0x2547DF28: 7D2300D0 neg r9,r3
+ 47: GETL R3, t36
+ 48: NEGL t36
+ 49: PUTL t36, R9
+ 50: INCEIPL $4
+
+ 0x2547DF2C: 7CA04838 and r0,r5,r9
+ 51: GETL R5, t38
+ 52: GETL R9, t40
+ 53: ANDL t38, t40
+ 54: PUTL t40, R0
+ 55: INCEIPL $4
+
+ 0x2547DF30: 93E1001C stw r31,28(r1)
+ 56: GETL R31, t42
+ 57: GETL R1, t44
+ 58: ADDL $0x1C, t44
+ 59: STL t42, (t44)
+ 60: INCEIPL $4
+
+ 0x2547DF34: 7FA40214 add r29,r4,r0
+ 61: GETL R4, t46
+ 62: GETL R0, t48
+ 63: ADDL t46, t48
+ 64: PUTL t48, R29
+ 65: INCEIPL $4
+
+ 0x2547DF38: 7FA4EB78 or r4,r29,r29
+ 66: GETL R29, t50
+ 67: PUTL t50, R4
+ 68: INCEIPL $4
+
+ 0x2547DF3C: 48019AE1 bl 0x25497A1C
+ 69: MOVL $0x2547DF40, t52
+ 70: PUTL t52, LR
+ 71: JMPo-c $0x25497A1C ($4)
+
+
+. 0 2547DF00 64
+. 93 C1 00 18 7F C8 02 A6 93 81 00 10 90 61 00 24 93 A1 00 14 83 9E 04 C8 93 61 00 0C 80 7C 04 20 80 9C 04 18 38 A3 04 6F 7D 23 00 D0 7C A0 48 38 93 E1 00 1C 7F A4 02 14 7F A4 EB 78 48 01 9A E1
+
+==== BB 999 (0x2547DF40) approx BBs exec'd 0 ====
+
+ 0x2547DF40: 38A00470 li r5,1136
+ 0: MOVL $0x470, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547DF44: 7C7F1B79 or. r31,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R31
+ 5: CMP0L t2, t4 (-rSo)
+ 6: ICRFL t4, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x2547DF48: 38800000 li r4,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0x2547DF4C: 7FFBFB78 or r27,r31,r31
+ 11: GETL R31, t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0x2547DF50: 7C1FEA14 add r0,r31,r29
+ 14: GETL R31, t10
+ 15: GETL R29, t12
+ 16: ADDL t10, t12
+ 17: PUTL t12, R0
+ 18: INCEIPL $4
+
+ 0x2547DF54: 4182004C bc 12,2,0x2547DFA0
+ 19: Js02o $0x2547DFA0
+
+
+. 0 2547DF40 24
+. 38 A0 04 70 7C 7F 1B 79 38 80 00 00 7F FB FB 78 7C 1F EA 14 41 82 00 4C
+
+==== BB 1000 (0x2547DF58) approx BBs exec'd 0 ====
+
+ 0x2547DF58: 80FC0418 lwz r7,1048(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x418, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547DF5C: 7FA70050 subf r29,r7,r0
+ 5: GETL R7, t4
+ 6: GETL R0, t6
+ 7: SUBL t4, t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547DF60: 387DFB90 addi r3,r29,-1136
+ 10: GETL R29, t8
+ 11: ADDL $0xFFFFFB90, t8
+ 12: PUTL t8, R3
+ 13: INCEIPL $4
+
+ 0x2547DF64: 480057E1 bl 0x25483744
+ 14: MOVL $0x2547DF68, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x25483744 ($4)
+
+
+. 0 2547DF58 16
+. 80 FC 04 18 7F A7 00 50 38 7D FB 90 48 00 57 E1
+
+==== BB 1001 (0x254837BC) approx BBs exec'd 0 ====
+
+ 0x254837BC: 9088FFFC stw r4,-4(r8)
+ 0: GETL R4, t0
+ 1: GETL R8, t2
+ 2: ADDL $0xFFFFFFFC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254837C0: 9088FFF8 stw r4,-8(r8)
+ 5: GETL R4, t4
+ 6: GETL R8, t6
+ 7: ADDL $0xFFFFFFF8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x254837C4: 9088FFF4 stw r4,-12(r8)
+ 10: GETL R4, t8
+ 11: GETL R8, t10
+ 12: ADDL $0xFFFFFFF4, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x254837C8: 9488FFF0 stwu r4,-16(r8)
+ 15: GETL R4, t12
+ 16: GETL R8, t14
+ 17: ADDL $0xFFFFFFF0, t14
+ 18: PUTL t14, R8
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x254837CC: 409D0008 bc 4,29,0x254837D4
+ 21: Jc29o $0x254837D4
+
+
+. 0 254837BC 20
+. 90 88 FF FC 90 88 FF F8 90 88 FF F4 94 88 FF F0 40 9D 00 08
+
+==== BB 1002 (0x25483894) approx BBs exec'd 0 ====
+
+ 0x25483894: 7C0037EC dcbz r0,r6
+ 0: GETL R6, t0
+ 1: ANDL $0xFFFFFFE0, t0
+ 2: MOVL $0x0, t2
+ 3: STL t2, (t0)
+ 4: ADDL $0x4, t0
+ 5: STL t2, (t0)
+ 6: ADDL $0x4, t0
+ 7: STL t2, (t0)
+ 8: ADDL $0x4, t0
+ 9: STL t2, (t0)
+ 10: ADDL $0x4, t0
+ 11: STL t2, (t0)
+ 12: ADDL $0x4, t0
+ 13: STL t2, (t0)
+ 14: ADDL $0x4, t0
+ 15: STL t2, (t0)
+ 16: ADDL $0x4, t0
+ 17: STL t2, (t0)
+ 18: INCEIPL $4
+
+ 0x25483898: 7C0737EC dcbz r7,r6
+ 19: GETL R6, t4
+ 20: GETL R7, t6
+ 21: ADDL t6, t4
+ 22: ANDL $0xFFFFFFE0, t4
+ 23: MOVL $0x0, t8
+ 24: STL t8, (t4)
+ 25: ADDL $0x4, t4
+ 26: STL t8, (t4)
+ 27: ADDL $0x4, t4
+ 28: STL t8, (t4)
+ 29: ADDL $0x4, t4
+ 30: STL t8, (t4)
+ 31: ADDL $0x4, t4
+ 32: STL t8, (t4)
+ 33: ADDL $0x4, t4
+ 34: STL t8, (t4)
+ 35: ADDL $0x4, t4
+ 36: STL t8, (t4)
+ 37: ADDL $0x4, t4
+ 38: STL t8, (t4)
+ 39: INCEIPL $4
+
+ 0x2548389C: 38C60040 addi r6,r6,64
+ 40: GETL R6, t10
+ 41: ADDL $0x40, t10
+ 42: PUTL t10, R6
+ 43: INCEIPL $4
+
+ 0x254838A0: 2A850000 cmpli cr5,r5,0
+ 44: GETL R5, t12
+ 45: MOVL $0x0, t16
+ 46: CMPUL t12, t16, t14 (-rSo)
+ 47: ICRFL t14, $0x5, CR
+ 48: INCEIPL $4
+
+ 0x254838A4: 4182007C bc 12,2,0x25483920
+ 49: Js02o $0x25483920
+
+
+. 0 25483894 20
+. 7C 00 37 EC 7C 07 37 EC 38 C6 00 40 2A 85 00 00 41 82 00 7C
+
+==== BB 1003 (0x2547DF68) approx BBs exec'd 0 ====
+
+ 0x2547DF68: 80DC0408 lwz r6,1032(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x408, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547DF6C: 38800004 li r4,4
+ 5: MOVL $0x4, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x2547DF70: 38660010 addi r3,r6,16
+ 8: GETL R6, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x2547DF74: 3BE6000E addi r31,r6,14
+ 12: GETL R6, t8
+ 13: ADDL $0xE, t8
+ 14: PUTL t8, R31
+ 15: INCEIPL $4
+
+ 0x2547DF78: 48019AB5 bl 0x25497A2C
+ 16: MOVL $0x2547DF7C, t10
+ 17: PUTL t10, LR
+ 18: JMPo-c $0x25497A2C ($4)
+
+
+. 0 2547DF68 20
+. 80 DC 04 08 38 80 00 04 38 66 00 10 3B E6 00 0E 48 01 9A B5
+
+==== BB 1004 (0x2547DF7C) approx BBs exec'd 0 ====
+
+ 0x2547DF7C: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0x2547DF80: 38030004 addi r0,r3,4
+ 4: GETL R3, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x2547DF84: 41860044 bc 12,6,0x2547DFC8
+ 8: Js06o $0x2547DFC8
+
+
+. 0 2547DF7C 12
+. 2C 83 00 00 38 03 00 04 41 86 00 44
+
+==== BB 1005 (0x2547DF88) approx BBs exec'd 0 ====
+
+ 0x2547DF88: 93E30000 stw r31,0(r3)
+ 0: GETL R31, t0
+ 1: GETL R3, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x2547DF8C: 901DFFFC stw r0,-4(r29)
+ 4: GETL R0, t4
+ 5: GETL R29, t6
+ 6: ADDL $0xFFFFFFFC, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x2547DF90: 2F9D0000 cmpi cr7,r29,0
+ 9: GETL R29, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x2547DF94: 7FBFEB78 or r31,r29,r29
+ 13: GETL R29, t12
+ 14: PUTL t12, R31
+ 15: INCEIPL $4
+
+ 0x2547DF98: 7F63DB78 or r3,r27,r27
+ 16: GETL R27, t14
+ 17: PUTL t14, R3
+ 18: INCEIPL $4
+
+ 0x2547DF9C: 419E0034 bc 12,30,0x2547DFD0
+ 19: Js30o $0x2547DFD0
+
+
+. 0 2547DF88 24
+. 93 E3 00 00 90 1D FF FC 2F 9D 00 00 7F BF EB 78 7F 63 DB 78 41 9E 00 34
+
+==== BB 1006 (0x2547DFA0) approx BBs exec'd 0 ====
+
+ 0x2547DFA0: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547DFA4: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547DFA8: 8361000C lwz r27,12(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R27
+ 12: INCEIPL $4
+
+ 0x2547DFAC: 83810010 lwz r28,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0x2547DFB0: 7D0803A6 mtlr r8
+ 18: GETL R8, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547DFB4: 83A10014 lwz r29,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x2547DFB8: 83C10018 lwz r30,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0x2547DFBC: 83E1001C lwz r31,28(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x1C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R31
+ 35: INCEIPL $4
+
+ 0x2547DFC0: 38210020 addi r1,r1,32
+ 36: GETL R1, t28
+ 37: ADDL $0x20, t28
+ 38: PUTL t28, R1
+ 39: INCEIPL $4
+
+ 0x2547DFC4: 4E800020 blr
+ 40: GETL LR, t30
+ 41: JMPo-r t30 ($4)
+
+
+. 0 2547DFA0 40
+. 81 01 00 24 7F E3 FB 78 83 61 00 0C 83 81 00 10 7D 08 03 A6 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 1007 (0x2547297C) approx BBs exec'd 0 ====
+
+ 0x2547297C: 7C711B79 or. r17,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R17
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x25472980: 41820E04 bc 12,2,0x25473784
+ 5: Js02o $0x25473784
+
+
+. 0 2547297C 8
+. 7C 71 1B 79 41 82 0E 04
+
+==== BB 1008 (0x25472984) approx BBs exec'd 0 ====
+
+ 0x25472984: 813F0030 lwz r9,48(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x30, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25472988: 39540158 addi r10,r20,344
+ 5: GETL R20, t4
+ 6: ADDL $0x158, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x2547298C: 8311FFFC lwz r24,-4(r17)
+ 9: GETL R17, t6
+ 10: ADDL $0xFFFFFFFC, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R24
+ 13: INCEIPL $4
+
+ 0x25472990: 2F890000 cmpi cr7,r9,0
+ 14: GETL R9, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x7, CR
+ 17: INCEIPL $4
+
+ 0x25472994: 915F0078 stw r10,120(r31)
+ 18: GETL R10, t14
+ 19: GETL R31, t16
+ 20: ADDL $0x78, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25472998: 930E0424 stw r24,1060(r14)
+ 23: GETL R24, t18
+ 24: GETL R14, t20
+ 25: ADDL $0x424, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0x2547299C: 409E0E38 bc 4,30,0x254737D4
+ 28: Jc30o $0x254737D4
+
+
+. 0 25472984 28
+. 81 3F 00 30 39 54 01 58 83 11 FF FC 2F 89 00 00 91 5F 00 78 93 0E 04 24 40 9E 0E 38
+
+==== BB 1009 (0x254729A0) approx BBs exec'd 0 ====
+
+ 0x254729A0: 8074013C lwz r3,316(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x13C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254729A4: 2E120000 cmpi cr4,r18,0
+ 5: GETL R18, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254729A8: 2F830000 cmpi cr7,r3,0
+ 9: GETL R3, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x254729AC: 419E0118 bc 12,30,0x25472AC4
+ 13: Js30o $0x25472AC4
+
+
+. 0 254729A0 16
+. 80 74 01 3C 2E 12 00 00 2F 83 00 00 41 9E 01 18
+
+==== BB 1010 (0x25472AC4) approx BBs exec'd 0 ====
+
+ 0x25472AC4: 806E01B8 lwz r3,440(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1B8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25472AC8: 4800947D bl 0x2547BF44
+ 5: MOVL $0x25472ACC, t4
+ 6: PUTL t4, LR
+ 7: JMPo-c $0x2547BF44 ($4)
+
+
+. 0 25472AC4 8
+. 80 6E 01 B8 48 00 94 7D
+
+==== BB 1011 _dl_debug_initialize(0x2547BF44) approx BBs exec'd 0 ====
+
+ 0x2547BF44: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547BF48: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x2547BF4C: 4801B0B5 bl 0x25497000
+ 9: MOVL $0x2547BF50, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547BF44 12
+. 94 21 FF F0 7D 88 02 A6 48 01 B0 B5
+
+==== BB 1012 (0x2547BF50) approx BBs exec'd 0 ====
+
+ 0x2547BF50: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547BF54: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547BF58: 7C681B78 or r8,r3,r3
+ 8: GETL R3, t6
+ 9: PUTL t6, R8
+ 10: INCEIPL $4
+
+ 0x2547BF5C: 7D8803A6 mtlr r12
+ 11: GETL R12, t8
+ 12: PUTL t8, LR
+ 13: INCEIPL $4
+
+ 0x2547BF60: 815E0518 lwz r10,1304(r30)
+ 14: GETL R30, t10
+ 15: ADDL $0x518, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547BF64: 800A0008 lwz r0,8(r10)
+ 19: GETL R10, t14
+ 20: ADDL $0x8, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R0
+ 23: INCEIPL $4
+
+ 0x2547BF68: 7D435378 or r3,r10,r10
+ 24: GETL R10, t18
+ 25: PUTL t18, R3
+ 26: INCEIPL $4
+
+ 0x2547BF6C: 2F800000 cmpi cr7,r0,0
+ 27: GETL R0, t20
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x7, CR
+ 30: INCEIPL $4
+
+ 0x2547BF70: 409E0024 bc 4,30,0x2547BF94
+ 31: Jc30o $0x2547BF94
+
+
+. 0 2547BF50 36
+. 93 C1 00 08 7F C8 02 A6 7C 68 1B 78 7D 88 03 A6 81 5E 05 18 80 0A 00 08 7D 43 53 78 2F 80 00 00 40 9E 00 24
+
+==== BB 1013 (0x2547BF74) approx BBs exec'd 0 ====
+
+ 0x2547BF74: 813E04C8 lwz r9,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547BF78: 38A00001 li r5,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0x2547BF7C: 809E0508 lwz r4,1288(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x508, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R4
+ 12: INCEIPL $4
+
+ 0x2547BF80: 81690000 lwz r11,0(r9)
+ 13: GETL R9, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R11
+ 16: INCEIPL $4
+
+ 0x2547BF84: 90AA0000 stw r5,0(r10)
+ 17: GETL R5, t14
+ 18: GETL R10, t16
+ 19: STL t14, (t16)
+ 20: INCEIPL $4
+
+ 0x2547BF88: 910A0010 stw r8,16(r10)
+ 21: GETL R8, t18
+ 22: GETL R10, t20
+ 23: ADDL $0x10, t20
+ 24: STL t18, (t20)
+ 25: INCEIPL $4
+
+ 0x2547BF8C: 916A0004 stw r11,4(r10)
+ 26: GETL R11, t22
+ 27: GETL R10, t24
+ 28: ADDL $0x4, t24
+ 29: STL t22, (t24)
+ 30: INCEIPL $4
+
+ 0x2547BF90: 908A0008 stw r4,8(r10)
+ 31: GETL R4, t26
+ 32: GETL R10, t28
+ 33: ADDL $0x8, t28
+ 34: STL t26, (t28)
+ 35: INCEIPL $4
+
+ 0x2547BF94: 83C10008 lwz r30,8(r1)
+ 36: GETL R1, t30
+ 37: ADDL $0x8, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R30
+ 40: INCEIPL $4
+
+ 0x2547BF98: 38210010 addi r1,r1,16
+ 41: GETL R1, t34
+ 42: ADDL $0x10, t34
+ 43: PUTL t34, R1
+ 44: INCEIPL $4
+
+ 0x2547BF9C: 4E800020 blr
+ 45: GETL LR, t36
+ 46: JMPo-r t36 ($4)
+
+
+. 0 2547BF74 44
+. 81 3E 04 C8 38 A0 00 01 80 9E 05 08 81 69 00 00 90 AA 00 00 91 0A 00 10 91 6A 00 04 90 8A 00 08 83 C1 00 08 38 21 00 10 4E 80 00 20
+
+==== BB 1014 (0x25472ACC) approx BBs exec'd 0 ====
+
+ 0x25472ACC: 81340074 lwz r9,116(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25472AD0: 7C7A1B78 or r26,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x25472AD4: 2F090000 cmpi cr6,r9,0
+ 8: GETL R9, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0x25472AD8: 419A0008 bc 12,26,0x25472AE0
+ 12: Js26o $0x25472AE0
+
+
+. 0 25472ACC 16
+. 81 34 00 74 7C 7A 1B 78 2F 09 00 00 41 9A 00 08
+
+==== BB 1015 (0x25472ADC) approx BBs exec'd 0 ====
+
+ 0x25472ADC: 90690004 stw r3,4(r9)
+ 0: GETL R3, t0
+ 1: GETL R9, t2
+ 2: ADDL $0x4, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25472AE0: 812E022C lwz r9,556(r14)
+ 5: GETL R14, t4
+ 6: ADDL $0x22C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x25472AE4: 2F890000 cmpi cr7,r9,0
+ 10: GETL R9, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25472AE8: 419E0008 bc 12,30,0x25472AF0
+ 14: Js30o $0x25472AF0
+
+
+. 0 25472ADC 16
+. 90 69 00 04 81 2E 02 2C 2F 89 00 00 41 9E 00 08
+
+==== BB 1016 (0x25472AF0) approx BBs exec'd 0 ====
+
+ 0x25472AF0: 825F0078 lwz r18,120(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x78, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x25472AF4: C8140158 lfd f0,344(r20)
+ 5: GETL R20, t4
+ 6: ADDL $0x158, t4
+ 7: FPU_RQ (t4), 0x0:0x0
+ 8: INCEIPL $4
+
+ 0x25472AF8: 924E0008 stw r18,8(r14)
+ 9: GETL R18, t6
+ 10: GETL R14, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x25472AFC: D80F0014 stfd f0,20(r15)
+ 14: GETL R15, t10
+ 15: ADDL $0x14, t10
+ 16: FPU_WQ 0x0:0x0, (t10)
+ 17: INCEIPL $4
+
+ 0x25472B00: 924E0010 stw r18,16(r14)
+ 18: GETL R18, t12
+ 19: GETL R14, t14
+ 20: ADDL $0x10, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0x25472B04: 41920844 bc 12,18,0x25473348
+ 23: Js18o $0x25473348
+
+
+. 0 25472AF0 24
+. 82 5F 00 78 C8 14 01 58 92 4E 00 08 D8 0F 00 14 92 4E 00 10 41 92 08 44
+
+==== BB 1017 (0x25473348) approx BBs exec'd 0 ====
+
+ 0x25473348: 8174000C lwz r11,12(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547334C: 7E9DA378 or r29,r20,r20
+ 5: GETL R20, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25473350: 820F0050 lwz r16,80(r15)
+ 8: GETL R15, t6
+ 9: ADDL $0x50, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R16
+ 12: INCEIPL $4
+
+ 0x25473354: 2C0B0000 cmpi cr0,r11,0
+ 13: GETL R11, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x0, CR
+ 16: INCEIPL $4
+
+ 0x25473358: 82EF0028 lwz r23,40(r15)
+ 17: GETL R15, t14
+ 18: ADDL $0x28, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R23
+ 21: INCEIPL $4
+
+ 0x2547335C: 3150FFFF addic r10,r16,-1
+ 22: GETL R16, t18
+ 23: ADCL $0xFFFFFFFF, t18 (-wCa)
+ 24: PUTL t18, R10
+ 25: INCEIPL $4
+
+ 0x25473360: 7F6A8110 subfe r27,r10,r16
+ 26: GETL R10, t20
+ 27: GETL R16, t22
+ 28: SBBL t20, t22 (-rCa-wCa)
+ 29: PUTL t22, R27
+ 30: INCEIPL $4
+
+ 0x25473364: 7EF3DB78 or r19,r23,r27
+ 31: GETL R23, t24
+ 32: GETL R27, t26
+ 33: ORL t26, t24
+ 34: PUTL t24, R19
+ 35: INCEIPL $4
+
+ 0x25473368: 926F0028 stw r19,40(r15)
+ 36: GETL R19, t28
+ 37: GETL R15, t30
+ 38: ADDL $0x28, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0x2547336C: 41820018 bc 12,2,0x25473384
+ 41: Js02o $0x25473384
+
+
+. 0 25473348 40
+. 81 74 00 0C 7E 9D A3 78 82 0F 00 50 2C 0B 00 00 82 EF 00 28 31 50 FF FF 7F 6A 81 10 7E F3 DB 78 92 6F 00 28 41 82 00 18
+
+==== BB 1018 (0x25473370) approx BBs exec'd 0 ====
+
+ 0x25473370: 7D605B78 or r0,r11,r11
+ 0: GETL R11, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25473374: 7C1D0378 or r29,r0,r0
+ 3: GETL R0, t2
+ 4: PUTL t2, R29
+ 5: INCEIPL $4
+
+ 0x25473378: 801D000C lwz r0,12(r29)
+ 6: GETL R29, t4
+ 7: ADDL $0xC, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x2547337C: 2F000000 cmpi cr6,r0,0
+ 11: GETL R0, t8
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x6, CR
+ 14: INCEIPL $4
+
+ 0x25473380: 409AFFF4 bc 4,26,0x25473374
+ 15: Jc26o $0x25473374
+
+
+. 0 25473370 20
+. 7D 60 5B 78 7C 1D 03 78 80 1D 00 0C 2F 00 00 00 40 9A FF F4
+
+==== BB 1019 (0x25473374) approx BBs exec'd 0 ====
+
+ 0x25473374: 7C1D0378 or r29,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0x25473378: 801D000C lwz r0,12(r29)
+ 3: GETL R29, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x2547337C: 2F000000 cmpi cr6,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x6, CR
+ 11: INCEIPL $4
+
+ 0x25473380: 409AFFF4 bc 4,26,0x25473374
+ 12: Jc26o $0x25473374
+
+
+. 0 25473374 16
+. 7C 1D 03 78 80 1D 00 0C 2F 00 00 00 40 9A FF F4
+
+==== BB 1020 (0x25473384) approx BBs exec'd 0 ====
+
+ 0x25473384: 82DD001C lwz r22,28(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R22
+ 4: INCEIPL $4
+
+ 0x25473388: 81360004 lwz r9,4(r22)
+ 5: GETL R22, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x2547338C: 2F890000 cmpi cr7,r9,0
+ 10: GETL R9, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25473390: 409E0420 bc 4,30,0x254737B0
+ 14: Jc30o $0x254737B0
+
+
+. 0 25473384 16
+. 82 DD 00 1C 81 36 00 04 2F 89 00 00 40 9E 04 20
+
+==== BB 1021 (0x254737B0) approx BBs exec'd 0 ====
+
+ 0x254737B0: 38000001 li r0,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254737B4: 90090008 stw r0,8(r9)
+ 3: GETL R0, t2
+ 4: GETL R9, t4
+ 5: ADDL $0x8, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x254737B8: 81290004 lwz r9,4(r9)
+ 8: GETL R9, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R9
+ 12: INCEIPL $4
+
+ 0x254737BC: 2C890000 cmpi cr1,r9,0
+ 13: GETL R9, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x1, CR
+ 16: INCEIPL $4
+
+ 0x254737C0: 4186FBD4 bc 12,6,0x25473394
+ 17: Js06o $0x25473394
+
+
+. 0 254737B0 20
+. 38 00 00 01 90 09 00 08 81 29 00 04 2C 89 00 00 41 86 FB D4
+
+==== BB 1022 (0x25473394) approx BBs exec'd 0 ====
+
+ 0x25473394: 3B8E01B8 addi r28,r14,440
+ 0: GETL R14, t0
+ 1: ADDL $0x1B8, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0x25473398: 7D9CE800 cmp cr3,r28,r29
+ 4: GETL R28, t2
+ 5: GETL R29, t4
+ 6: CMPL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x3, CR
+ 8: INCEIPL $4
+
+ 0x2547339C: 418E0018 bc 12,14,0x254733B4
+ 9: Js14o $0x254733B4
+
+
+. 0 25473394 12
+. 3B 8E 01 B8 7D 9C E8 00 41 8E 00 18
+
+==== BB 1023 (0x254733B4) approx BBs exec'd 0 ====
+
+ 0x254733B4: 83BD0010 lwz r29,16(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254733B8: 2E1D0000 cmpi cr4,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254733BC: 4092FFC8 bc 4,18,0x25473384
+ 9: Jc18o $0x25473384
+
+
+. 0 254733B4 12
+. 83 BD 00 10 2E 1D 00 00 40 92 FF C8
+
+==== BB 1024 (0x254733A0) approx BBs exec'd 0 ====
+
+ 0x254733A0: 809D01C0 lwz r4,448(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x1C0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254733A4: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254733A8: 80AF0028 lwz r5,40(r15)
+ 8: GETL R15, t6
+ 9: ADDL $0x28, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R5
+ 12: INCEIPL $4
+
+ 0x254733AC: 7F66DB78 or r6,r27,r27
+ 13: GETL R27, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x254733B0: 48006211 bl 0x254795C0
+ 16: MOVL $0x254733B4, t12
+ 17: PUTL t12, LR
+ 18: JMPo-c $0x254795C0 ($4)
+
+
+. 0 254733A0 20
+. 80 9D 01 C0 7F A3 EB 78 80 AF 00 28 7F 66 DB 78 48 00 62 11
+
+==== BB 1025 _dl_relocate_object(0x254795C0) approx BBs exec'd 0 ====
+
+ 0x254795C0: 7CE802A6 mflr r7
+ 0: GETL LR, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x254795C4: 9421FF50 stwu r1,-176(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFF50, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x254795C8: 7D800026 mfcr r12
+ 9: GETL CR, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x254795CC: 93E100AC stw r31,172(r1)
+ 12: GETL R31, t8
+ 13: GETL R1, t10
+ 14: ADDL $0xAC, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x254795D0: 4801DA31 bl 0x25497000
+ 17: MOVL $0x254795D4, t12
+ 18: PUTL t12, LR
+ 19: JMPo-c $0x25497000 ($4)
+
+
+. 0 254795C0 20
+. 7C E8 02 A6 94 21 FF 50 7D 80 00 26 93 E1 00 AC 48 01 DA 31
+
+==== BB 1026 (0x254795D4) approx BBs exec'd 0 ====
+
+ 0x254795D4: 7C3F0B78 or r31,r1,r1
+ 0: GETL R1, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0x254795D8: 90E100B4 stw r7,180(r1)
+ 3: GETL R7, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xB4, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x254795DC: 80030180 lwz r0,384(r3)
+ 8: GETL R3, t6
+ 9: ADDL $0x180, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x254795E0: 92210074 stw r17,116(r1)
+ 13: GETL R17, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x74, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254795E4: 3A200000 li r17,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R17
+ 20: INCEIPL $4
+
+ 0x254795E8: 74082000 andis. r8,r0,0x2000
+ 21: GETL R0, t16
+ 22: ANDL $0x20000000, t16
+ 23: PUTL t16, R8
+ 24: CMP0L t16, t18 (-rSo)
+ 25: ICRFL t18, $0x0, CR
+ 26: INCEIPL $4
+
+ 0x254795EC: 9361009C stw r27,156(r1)
+ 27: GETL R27, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x9C, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0x254795F0: 938100A0 stw r28,160(r1)
+ 32: GETL R28, t24
+ 33: GETL R1, t26
+ 34: ADDL $0xA0, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x254795F4: 7CDB3378 or r27,r6,r6
+ 37: GETL R6, t28
+ 38: PUTL t28, R27
+ 39: INCEIPL $4
+
+ 0x254795F8: 93C100A8 stw r30,168(r1)
+ 40: GETL R30, t30
+ 41: GETL R1, t32
+ 42: ADDL $0xA8, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x254795FC: 7CBC2B78 or r28,r5,r5
+ 45: GETL R5, t34
+ 46: PUTL t34, R28
+ 47: INCEIPL $4
+
+ 0x25479600: 92010070 stw r16,112(r1)
+ 48: GETL R16, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x70, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x25479604: 7FC802A6 mflr r30
+ 53: GETL LR, t40
+ 54: PUTL t40, R30
+ 55: INCEIPL $4
+
+ 0x25479608: 92410078 stw r18,120(r1)
+ 56: GETL R18, t42
+ 57: GETL R1, t44
+ 58: ADDL $0x78, t44
+ 59: STL t42, (t44)
+ 60: INCEIPL $4
+
+ 0x2547960C: 9261007C stw r19,124(r1)
+ 61: GETL R19, t46
+ 62: GETL R1, t48
+ 63: ADDL $0x7C, t48
+ 64: STL t46, (t48)
+ 65: INCEIPL $4
+
+ 0x25479610: 92810080 stw r20,128(r1)
+ 66: GETL R20, t50
+ 67: GETL R1, t52
+ 68: ADDL $0x80, t52
+ 69: STL t50, (t52)
+ 70: INCEIPL $4
+
+ 0x25479614: 92A10084 stw r21,132(r1)
+ 71: GETL R21, t54
+ 72: GETL R1, t56
+ 73: ADDL $0x84, t56
+ 74: STL t54, (t56)
+ 75: INCEIPL $4
+
+ 0x25479618: 92C10088 stw r22,136(r1)
+ 76: GETL R22, t58
+ 77: GETL R1, t60
+ 78: ADDL $0x88, t60
+ 79: STL t58, (t60)
+ 80: INCEIPL $4
+
+ 0x2547961C: 92E1008C stw r23,140(r1)
+ 81: GETL R23, t62
+ 82: GETL R1, t64
+ 83: ADDL $0x8C, t64
+ 84: STL t62, (t64)
+ 85: INCEIPL $4
+
+ 0x25479620: 93010090 stw r24,144(r1)
+ 86: GETL R24, t66
+ 87: GETL R1, t68
+ 88: ADDL $0x90, t68
+ 89: STL t66, (t68)
+ 90: INCEIPL $4
+
+ 0x25479624: 93210094 stw r25,148(r1)
+ 91: GETL R25, t70
+ 92: GETL R1, t72
+ 93: ADDL $0x94, t72
+ 94: STL t70, (t72)
+ 95: INCEIPL $4
+
+ 0x25479628: 93410098 stw r26,152(r1)
+ 96: GETL R26, t74
+ 97: GETL R1, t76
+ 98: ADDL $0x98, t76
+ 99: STL t74, (t76)
+ 100: INCEIPL $4
+
+ 0x2547962C: 93A100A4 stw r29,164(r1)
+ 101: GETL R29, t78
+ 102: GETL R1, t80
+ 103: ADDL $0xA4, t80
+ 104: STL t78, (t80)
+ 105: INCEIPL $4
+
+ 0x25479630: 9181006C stw r12,108(r1)
+ 106: GETL R12, t82
+ 107: GETL R1, t84
+ 108: ADDL $0x6C, t84
+ 109: STL t82, (t84)
+ 110: INCEIPL $4
+
+ 0x25479634: 909F0010 stw r4,16(r31)
+ 111: GETL R4, t86
+ 112: GETL R31, t88
+ 113: ADDL $0x10, t88
+ 114: STL t86, (t88)
+ 115: INCEIPL $4
+
+ 0x25479638: 907F000C stw r3,12(r31)
+ 116: GETL R3, t90
+ 117: GETL R31, t92
+ 118: ADDL $0xC, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0x2547963C: 40820118 bc 4,2,0x25479754
+ 121: Jc02o $0x25479754
+
+
+. 0 254795D4 108
+. 7C 3F 0B 78 90 E1 00 B4 80 03 01 80 92 21 00 74 3A 20 00 00 74 08 20 00 93 61 00 9C 93 81 00 A0 7C DB 33 78 93 C1 00 A8 7C BC 2B 78 92 01 00 70 7F C8 02 A6 92 41 00 78 92 61 00 7C 92 81 00 80 92 A1 00 84 92 C1 00 88 92 E1 00 8C 93 01 00 90 93 21 00 94 93 41 00 98 93 A1 00 A4 91 81 00 6C 90 9F 00 10 90 7F 00 0C 40 82 01 18
+
+==== BB 1027 (0x25479640) approx BBs exec'd 0 ====
+
+ 0x25479640: 2D860000 cmpi cr3,r6,0
+ 0: GETL R6, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x3, CR
+ 3: INCEIPL $4
+
+ 0x25479644: 418E016C bc 12,14,0x254797B0
+ 4: Js14o $0x254797B0
+
+
+. 0 25479640 8
+. 2D 86 00 00 41 8E 01 6C
+
+==== BB 1028 (0x254797B0) approx BBs exec'd 0 ====
+
+ 0x254797B0: 80A30080 lwz r5,128(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x80, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x254797B4: 3085FFFF addic r4,r5,-1
+ 5: GETL R5, t4
+ 6: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x254797B8: 7C842110 subfe r4,r4,r4
+ 9: GETL R4, t6
+ 10: GETL R4, t8
+ 11: SBBL t6, t8 (-rCa-wCa)
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x254797BC: 7F9C2038 and r28,r28,r4
+ 14: GETL R28, t10
+ 15: GETL R4, t12
+ 16: ANDL t10, t12
+ 17: PUTL t12, R28
+ 18: INCEIPL $4
+
+ 0x254797C0: 4BFFFE88 b 0x25479648
+ 19: JMPo $0x25479648 ($4)
+
+
+. 0 254797B0 20
+. 80 A3 00 80 30 85 FF FF 7C 84 21 10 7F 9C 20 38 4B FF FE 88
+
+==== BB 1029 (0x25479648) approx BBs exec'd 0 ====
+
+ 0x25479648: 835E04F4 lwz r26,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547964C: 80DA0000 lwz r6,0(r26)
+ 5: GETL R26, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x25479650: 70C90020 andi. r9,r6,0x20
+ 9: GETL R6, t8
+ 10: ANDL $0x20, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x25479654: 408207B4 bc 4,2,0x25479E08
+ 15: Jc02o $0x25479E08
+
+
+. 0 25479648 16
+. 83 5E 04 F4 80 DA 00 00 70 C9 00 20 40 82 07 B4
+
+==== BB 1030 (0x25479658) approx BBs exec'd 0 ====
+
+ 0x25479658: 807F000C lwz r3,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547965C: 81430078 lwz r10,120(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x78, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x25479660: 2E0A0000 cmpi cr4,r10,0
+ 10: GETL R10, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x4, CR
+ 13: INCEIPL $4
+
+ 0x25479664: 409206C0 bc 4,18,0x25479D24
+ 14: Jc18o $0x25479D24
+
+
+. 0 25479658 16
+. 80 7F 00 0C 81 43 00 78 2E 0A 00 00 40 92 06 C0
+
+==== BB 1031 (0x25479668) approx BBs exec'd 0 ====
+
+ 0x25479668: 80C30034 lwz r6,52(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547966C: 7F84E378 or r4,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0x25479670: 7F65DB78 or r5,r27,r27
+ 8: GETL R27, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x25479674: 3B800001 li r28,1
+ 11: MOVL $0x1, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0x25479678: 83A60004 lwz r29,4(r6)
+ 14: GETL R6, t10
+ 15: ADDL $0x4, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R29
+ 18: INCEIPL $4
+
+ 0x2547967C: 3B600000 li r27,0
+ 19: MOVL $0x0, t14
+ 20: PUTL t14, R27
+ 21: INCEIPL $4
+
+ 0x25479680: 93BF0008 stw r29,8(r31)
+ 22: GETL R29, t16
+ 23: GETL R31, t18
+ 24: ADDL $0x8, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0x25479684: 480071AD bl 0x25480830
+ 27: MOVL $0x25479688, t20
+ 28: PUTL t20, LR
+ 29: JMPo-c $0x25480830 ($4)
+
+
+. 0 25479668 32
+. 80 C3 00 34 7F 84 E3 78 7F 65 DB 78 3B 80 00 01 83 A6 00 04 3B 60 00 00 93 BF 00 08 48 00 71 AD
+
+==== BB 1032 (0x25479688) approx BBs exec'd 0 ====
+
+ 0x25479688: 83BF000C lwz r29,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x2547968C: 38C00000 li r6,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0x25479690: 939F0034 stw r28,52(r31)
+ 8: GETL R28, t6
+ 9: GETL R31, t8
+ 10: ADDL $0x34, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25479694: 817D003C lwz r11,60(r29)
+ 13: GETL R29, t10
+ 14: ADDL $0x3C, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R11
+ 17: INCEIPL $4
+
+ 0x25479698: 937F0030 stw r27,48(r31)
+ 18: GETL R27, t14
+ 19: GETL R31, t16
+ 20: ADDL $0x30, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x2547969C: 2C8B0000 cmpi cr1,r11,0
+ 23: GETL R11, t18
+ 24: CMP0L t18, t20 (-rSo)
+ 25: ICRFL t20, $0x1, CR
+ 26: INCEIPL $4
+
+ 0x254796A0: 937F0040 stw r27,64(r31)
+ 27: GETL R27, t22
+ 28: GETL R31, t24
+ 29: ADDL $0x40, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0x254796A4: 937F0028 stw r27,40(r31)
+ 32: GETL R27, t26
+ 33: GETL R31, t28
+ 34: ADDL $0x28, t28
+ 35: STL t26, (t28)
+ 36: INCEIPL $4
+
+ 0x254796A8: 937F003C stw r27,60(r31)
+ 37: GETL R27, t30
+ 38: GETL R31, t32
+ 39: ADDL $0x3C, t32
+ 40: STL t30, (t32)
+ 41: INCEIPL $4
+
+ 0x254796AC: 90DF0024 stw r6,36(r31)
+ 42: GETL R6, t34
+ 43: GETL R31, t36
+ 44: ADDL $0x24, t36
+ 45: STL t34, (t36)
+ 46: INCEIPL $4
+
+ 0x254796B0: 41860018 bc 12,6,0x254796C8
+ 47: Js06o $0x254796C8
+
+
+. 0 25479688 44
+. 83 BF 00 0C 38 C0 00 00 93 9F 00 34 81 7D 00 3C 93 7F 00 30 2C 8B 00 00 93 7F 00 40 93 7F 00 28 93 7F 00 3C 90 DF 00 24 41 86 00 18
+
+==== BB 1033 (0x254796B4) approx BBs exec'd 0 ====
+
+ 0x254796B4: 810B0004 lwz r8,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x254796B8: 809D0040 lwz r4,64(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x40, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x254796BC: 911F0020 stw r8,32(r31)
+ 10: GETL R8, t8
+ 11: GETL R31, t10
+ 12: ADDL $0x20, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0x254796C0: 80C40004 lwz r6,4(r4)
+ 15: GETL R4, t12
+ 16: ADDL $0x4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R6
+ 19: INCEIPL $4
+
+ 0x254796C4: 90DF0024 stw r6,36(r31)
+ 20: GETL R6, t16
+ 21: GETL R31, t18
+ 22: ADDL $0x24, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x254796C8: 2E030000 cmpi cr4,r3,0
+ 25: GETL R3, t20
+ 26: CMP0L t20, t22 (-rSo)
+ 27: ICRFL t22, $0x4, CR
+ 28: INCEIPL $4
+
+ 0x254796CC: 41920010 bc 12,18,0x254796DC
+ 29: Js18o $0x254796DC
+
+
+. 0 254796B4 28
+. 81 0B 00 04 80 9D 00 40 91 1F 00 20 80 C4 00 04 90 DF 00 24 2E 03 00 00 41 92 00 10
+
+==== BB 1034 (0x254796DC) approx BBs exec'd 0 ====
+
+ 0x254796DC: 821E04C8 lwz r16,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R16
+ 4: INCEIPL $4
+
+ 0x254796E0: 3ABF0008 addi r21,r31,8
+ 5: GETL R31, t4
+ 6: ADDL $0x8, t4
+ 7: PUTL t4, R21
+ 8: INCEIPL $4
+
+ 0x254796E4: 3A400002 li r18,2
+ 9: MOVL $0x2, t6
+ 10: PUTL t6, R18
+ 11: INCEIPL $4
+
+ 0x254796E8: 80B50020 lwz r5,32(r21)
+ 12: GETL R21, t8
+ 13: ADDL $0x20, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0x254796EC: 7FB6EB78 or r22,r29,r29
+ 17: GETL R29, t12
+ 18: PUTL t12, R22
+ 19: INCEIPL $4
+
+ 0x254796F0: 81750018 lwz r11,24(r21)
+ 20: GETL R21, t14
+ 21: ADDL $0x18, t14
+ 22: LDL (t14), t16
+ 23: PUTL t16, R11
+ 24: INCEIPL $4
+
+ 0x254796F4: 2C050000 cmpi cr0,r5,0
+ 25: GETL R5, t18
+ 26: CMP0L t18, t20 (-rSo)
+ 27: ICRFL t20, $0x0, CR
+ 28: INCEIPL $4
+
+ 0x254796F8: 8115001C lwz r8,28(r21)
+ 29: GETL R21, t22
+ 30: ADDL $0x1C, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R8
+ 33: INCEIPL $4
+
+ 0x254796FC: 7D695B78 or r9,r11,r11
+ 34: GETL R11, t26
+ 35: PUTL t26, R9
+ 36: INCEIPL $4
+
+ 0x25479700: 833D0000 lwz r25,0(r29)
+ 37: GETL R29, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R25
+ 40: INCEIPL $4
+
+ 0x25479704: 7F0B4214 add r24,r11,r8
+ 41: GETL R11, t32
+ 42: GETL R8, t34
+ 43: ADDL t32, t34
+ 44: PUTL t34, R24
+ 45: INCEIPL $4
+
+ 0x25479708: 418200BC bc 12,2,0x254797C4
+ 46: Js02o $0x254797C4
+
+
+. 0 254796DC 48
+. 82 1E 04 C8 3A BF 00 08 3A 40 00 02 80 B5 00 20 7F B6 EB 78 81 75 00 18 2C 05 00 00 81 15 00 1C 7D 69 5B 78 83 3D 00 00 7F 0B 42 14 41 82 00 BC
+
+==== BB 1035 (0x254797C4) approx BBs exec'd 0 ====
+
+ 0x254797C4: 815D00C0 lwz r10,192(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x254797C8: 38E00000 li r7,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x254797CC: 807D0038 lwz r3,56(r29)
+ 8: GETL R29, t6
+ 9: ADDL $0x38, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0x254797D0: 2F8A0000 cmpi cr7,r10,0
+ 13: GETL R10, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x7, CR
+ 16: INCEIPL $4
+
+ 0x254797D4: 82630004 lwz r19,4(r3)
+ 17: GETL R3, t14
+ 18: ADDL $0x4, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R19
+ 21: INCEIPL $4
+
+ 0x254797D8: 419E0008 bc 12,30,0x254797E0
+ 22: Js30o $0x254797E0
+
+
+. 0 254797C4 24
+. 81 5D 00 C0 38 E0 00 00 80 7D 00 38 2F 8A 00 00 82 63 00 04 41 9E 00 08
+
+==== BB 1036 (0x254797DC) approx BBs exec'd 0 ====
+
+ 0x254797DC: 80EA0004 lwz r7,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254797E0: 3C00AAAA lis r0,-21846
+ 5: MOVL $0xAAAA0000, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x254797E4: 600CAAAB ori r12,r0,0xAAAB
+ 8: MOVL $0xAAAAAAAB, t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0x254797E8: 7EE86016 mulhwu r23,r8,r12
+ 11: GETL R8, t8
+ 12: GETL R12, t10
+ 13: UMULHL t8, t10
+ 14: PUTL t10, R23
+ 15: INCEIPL $4
+
+ 0x254797EC: 56E9E8FE rlwinm r9,r23,29,3,31
+ 16: GETL R23, t12
+ 17: SHRL $0x3, t12
+ 18: PUTL t12, R9
+ 19: INCEIPL $4
+
+ 0x254797F0: 7C893840 cmpl cr1,r9,r7
+ 20: GETL R9, t14
+ 21: GETL R7, t16
+ 22: CMPUL t14, t16, t18 (-rSo)
+ 23: ICRFL t18, $0x1, CR
+ 24: INCEIPL $4
+
+ 0x254797F4: 40850008 bc 4,5,0x254797FC
+ 25: Jc05o $0x254797FC
+
+
+. 0 254797DC 28
+. 80 EA 00 04 3C 00 AA AA 60 0C AA AB 7E E8 60 16 56 E9 E8 FE 7C 89 38 40 40 85 00 08
+
+==== BB 1037 (0x254797F8) approx BBs exec'd 0 ====
+
+ 0x254797F8: 7CE93B78 or r9,r7,r7
+ 0: GETL R7, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x254797FC: 3B7001B8 addi r27,r16,440
+ 3: GETL R16, t2
+ 4: ADDL $0x1B8, t2
+ 5: PUTL t2, R27
+ 6: INCEIPL $4
+
+ 0x25479800: 1CE9000C mulli r7,r9,12
+ 7: GETL R9, t4
+ 8: MULL $0xC, t4
+ 9: PUTL t4, R7
+ 10: INCEIPL $4
+
+ 0x25479804: 7E1DD800 cmp cr4,r29,r27
+ 11: GETL R29, t6
+ 12: GETL R27, t8
+ 13: CMPL t6, t8, t10 (-rSo)
+ 14: ICRFL t10, $0x4, CR
+ 15: INCEIPL $4
+
+ 0x25479808: 7F8B3A14 add r28,r11,r7
+ 16: GETL R11, t12
+ 17: GETL R7, t14
+ 18: ADDL t12, t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0x2547980C: 41920018 bc 12,18,0x25479824
+ 21: Js18o $0x25479824
+
+
+. 0 254797F8 24
+. 7C E9 3B 78 3B 70 01 B8 1C E9 00 0C 7E 1D D8 00 7F 8B 3A 14 41 92 00 18
+
+==== BB 1038 (0x25479810) approx BBs exec'd 0 ====
+
+ 0x25479810: 2F190000 cmpi cr6,r25,0
+ 0: GETL R25, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25479814: 409A01CC bc 4,26,0x254799E0
+ 4: Jc26o $0x254799E0
+
+
+. 0 25479810 8
+. 2F 19 00 00 40 9A 01 CC
+
+==== BB 1039 (0x25479818) approx BBs exec'd 0 ====
+
+ 0x25479818: 80DD011C lwz r6,284(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x11C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547981C: 2C060000 cmpi cr0,r6,0
+ 5: GETL R6, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25479820: 418201C0 bc 12,2,0x254799E0
+ 9: Js02o $0x254799E0
+
+
+. 0 25479818 12
+. 80 DD 01 1C 2C 06 00 00 41 82 01 C0
+
+==== BB 1040 (0x25479824) approx BBs exec'd 0 ====
+
+ 0x25479824: 813D00E4 lwz r9,228(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xE4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25479828: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547982C: 419E0280 bc 12,30,0x25479AAC
+ 9: Js30o $0x25479AAC
+
+
+. 0 25479824 12
+. 81 3D 00 E4 2F 89 00 00 41 9E 02 80
+
+==== BB 1041 (0x25479830) approx BBs exec'd 0 ====
+
+ 0x25479830: 7C9CC040 cmpl cr1,r28,r24
+ 0: GETL R28, t0
+ 1: GETL R24, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25479834: 82890004 lwz r20,4(r9)
+ 5: GETL R9, t6
+ 6: ADDL $0x4, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R20
+ 9: INCEIPL $4
+
+ 0x25479838: 40A4FEE8 bc 5,4,0x25479720
+ 10: Jc04o $0x25479720
+
+
+. 0 25479830 12
+. 7C 9C C0 40 82 89 00 04 40 A4 FE E8
+
+==== BB 1042 (0x2547983C) approx BBs exec'd 0 ====
+
+ 0x2547983C: 819C0004 lwz r12,4(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x25479840: 81560188 lwz r10,392(r22)
+ 5: GETL R22, t4
+ 6: ADDL $0x188, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x25479844: 5597C23E rlwinm r23,r12,24,8,31
+ 10: GETL R12, t8
+ 11: SHRL $0x8, t8
+ 12: PUTL t8, R23
+ 13: INCEIPL $4
+
+ 0x25479848: 559D063E rlwinm r29,r12,0,24,31
+ 14: GETL R12, t10
+ 15: ANDL $0xFF, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0x2547984C: 56EB083C rlwinm r11,r23,1,0,30
+ 18: GETL R23, t12
+ 19: SHLL $0x1, t12
+ 20: PUTL t12, R11
+ 21: INCEIPL $4
+
+ 0x25479850: 2E1D0016 cmpi cr4,r29,22
+ 22: GETL R29, t14
+ 23: MOVL $0x16, t18
+ 24: CMPL t14, t18, t16 (-rSo)
+ 25: ICRFL t16, $0x4, CR
+ 26: INCEIPL $4
+
+ 0x25479854: 7CABA22E lhzx r5,r11,r20
+ 27: GETL R20, t20
+ 28: GETL R11, t22
+ 29: ADDL t22, t20
+ 30: LDW (t20), t24
+ 31: PUTL t24, R5
+ 32: INCEIPL $4
+
+ 0x25479858: 56E32036 rlwinm r3,r23,4,0,27
+ 33: GETL R23, t26
+ 34: SHLL $0x4, t26
+ 35: PUTL t26, R3
+ 36: INCEIPL $4
+
+ 0x2547985C: 817C0000 lwz r11,0(r28)
+ 37: GETL R28, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R11
+ 40: INCEIPL $4
+
+ 0x25479860: 7F639A14 add r27,r3,r19
+ 41: GETL R3, t32
+ 42: GETL R19, t34
+ 43: ADDL t32, t34
+ 44: PUTL t34, R27
+ 45: INCEIPL $4
+
+ 0x25479864: 54BA2376 rlwinm r26,r5,4,13,27
+ 46: GETL R5, t36
+ 47: ROLL $0x4, t36
+ 48: ANDL $0x7FFF0, t36
+ 49: PUTL t36, R26
+ 50: INCEIPL $4
+
+ 0x25479868: 937F0050 stw r27,80(r31)
+ 51: GETL R27, t38
+ 52: GETL R31, t40
+ 53: ADDL $0x50, t40
+ 54: STL t38, (t40)
+ 55: INCEIPL $4
+
+ 0x2547986C: 7D4AD214 add r10,r10,r26
+ 56: GETL R10, t42
+ 57: GETL R26, t44
+ 58: ADDL t42, t44
+ 59: PUTL t44, R10
+ 60: INCEIPL $4
+
+ 0x25479870: 7EEBCA14 add r23,r11,r25
+ 61: GETL R11, t46
+ 62: GETL R25, t48
+ 63: ADDL t46, t48
+ 64: PUTL t48, R23
+ 65: INCEIPL $4
+
+ 0x25479874: 7F66DB78 or r6,r27,r27
+ 66: GETL R27, t50
+ 67: PUTL t50, R6
+ 68: INCEIPL $4
+
+ 0x25479878: 3B400000 li r26,0
+ 69: MOVL $0x0, t52
+ 70: PUTL t52, R26
+ 71: INCEIPL $4
+
+ 0x2547987C: 419201DC bc 12,18,0x25479A58
+ 72: Js18o $0x25479A58
+
+
+. 0 2547983C 68
+. 81 9C 00 04 81 56 01 88 55 97 C2 3E 55 9D 06 3E 56 EB 08 3C 2E 1D 00 16 7C AB A2 2E 56 E3 20 36 81 7C 00 00 7F 63 9A 14 54 BA 23 76 93 7F 00 50 7D 4A D2 14 7E EB CA 14 7F 66 DB 78 3B 40 00 00 41 92 01 DC
+
+==== BB 1043 (0x25479880) approx BBs exec'd 0 ====
+
+ 0x25479880: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25479884: 419A0148 bc 12,26,0x254799CC
+ 4: Js26o $0x254799CC
+
+
+. 0 25479880 8
+. 2F 1D 00 00 41 9A 01 48
+
+==== BB 1044 (0x25479888) approx BBs exec'd 0 ====
+
+ 0x25479888: 889B000C lbz r4,12(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547988C: 5488E13F rlwinm. r8,r4,28,4,31
+ 5: GETL R4, t4
+ 6: SHRL $0x4, t4
+ 7: PUTL t4, R8
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x25479890: 4182062C bc 12,2,0x25479EBC
+ 11: Js02o $0x25479EBC
+
+
+. 0 25479888 12
+. 88 9B 00 0C 54 88 E1 3F 41 82 06 2C
+
+==== BB 1045 (0x25479894) approx BBs exec'd 0 ====
+
+ 0x25479894: 8B5B000C lbz r26,12(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25479898: 5749E13F rlwinm. r9,r26,28,4,31
+ 5: GETL R26, t4
+ 6: SHRL $0x4, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x2547989C: 418201B4 bc 12,2,0x25479A50
+ 11: Js02o $0x25479A50
+
+
+. 0 25479894 12
+. 8B 5B 00 0C 57 49 E1 3F 41 82 01 B4
+
+==== BB 1046 (0x254798A0) approx BBs exec'd 0 ====
+
+ 0x254798A0: 809F000C lwz r4,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254798A4: 2E1D0015 cmpi cr4,r29,21
+ 5: GETL R29, t4
+ 6: MOVL $0x15, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x4, CR
+ 9: INCEIPL $4
+
+ 0x254798A8: 2C9D000A cmpi cr1,r29,10
+ 10: GETL R29, t10
+ 11: MOVL $0xA, t14
+ 12: CMPL t10, t14, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x254798AC: 2F1D0013 cmpi cr6,r29,19
+ 15: GETL R29, t16
+ 16: MOVL $0x13, t20
+ 17: CMPL t16, t20, t18 (-rSo)
+ 18: ICRFL t18, $0x6, CR
+ 19: INCEIPL $4
+
+ 0x254798B0: 80C40208 lwz r6,520(r4)
+ 20: GETL R4, t22
+ 21: ADDL $0x208, t22
+ 22: LDL (t22), t24
+ 23: PUTL t24, R6
+ 24: INCEIPL $4
+
+ 0x254798B4: 7F86D800 cmp cr7,r6,r27
+ 25: GETL R6, t26
+ 26: GETL R27, t28
+ 27: CMPL t26, t28, t30 (-rSo)
+ 28: ICRFL t30, $0x7, CR
+ 29: INCEIPL $4
+
+ 0x254798B8: 419E062C bc 12,30,0x25479EE4
+ 30: Js30o $0x25479EE4
+
+
+. 0 254798A0 28
+. 80 9F 00 0C 2E 1D 00 15 2C 9D 00 0A 2F 1D 00 13 80 C4 02 08 7F 86 D8 00 41 9E 06 2C
+
+==== BB 1047 (0x254798BC) approx BBs exec'd 0 ====
+
+ 0x254798BC: 7CC00026 mfcr r6
+ 0: GETL CR, t0
+ 1: PUTL t0, R6
+ 2: INCEIPL $4
+
+ 0x254798C0: 54C69FFE rlwinm r6,r6,19,31,31
+ 3: GETL R6, t2
+ 4: ROLL $0x13, t2
+ 5: ANDL $0x1, t2
+ 6: PUTL t2, R6
+ 7: INCEIPL $4
+
+ 0x254798C4: 39000000 li r8,0
+ 8: MOVL $0x0, t4
+ 9: PUTL t4, R8
+ 10: INCEIPL $4
+
+ 0x254798C8: 7F400026 mfcr r26
+ 11: GETL CR, t6
+ 12: PUTL t6, R26
+ 13: INCEIPL $4
+
+ 0x254798CC: 575A3FFE rlwinm r26,r26,7,31,31
+ 14: GETL R26, t8
+ 15: ROLL $0x7, t8
+ 16: ANDL $0x1, t8
+ 17: PUTL t8, R26
+ 18: INCEIPL $4
+
+ 0x254798D0: 7CCBD379 or. r11,r6,r26
+ 19: GETL R6, t10
+ 20: GETL R26, t12
+ 21: ORL t12, t10
+ 22: PUTL t10, R11
+ 23: CMP0L t10, t14 (-rSo)
+ 24: ICRFL t14, $0x0, CR
+ 25: INCEIPL $4
+
+ 0x254798D4: 40820130 bc 4,2,0x25479A04
+ 26: Jc02o $0x25479A04
+
+
+. 0 254798BC 28
+. 7C C0 00 26 54 C6 9F FE 39 00 00 00 7F 40 00 26 57 5A 3F FE 7C CB D3 79 40 82 01 30
+
+==== BB 1048 (0x254798D8) approx BBs exec'd 0 ====
+
+ 0x254798D8: 387DFFBC addi r3,r29,-68
+ 0: GETL R29, t0
+ 1: ADDL $0xFFFFFFBC, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x254798DC: 6BA50002 xori r5,r29,0x2
+ 4: GETL R29, t2
+ 5: XORL $0x2, t2
+ 6: PUTL t2, R5
+ 7: INCEIPL $4
+
+ 0x254798E0: 21650000 subfic r11,r5,0
+ 8: GETL R5, t4
+ 9: MOVL $0x0, t6
+ 10: SBBL t4, t6 (-wCa)
+ 11: PUTL t6, R11
+ 12: INCEIPL $4
+
+ 0x254798E4: 7CAB2914 adde r5,r11,r5
+ 13: GETL R11, t8
+ 14: GETL R5, t10
+ 15: ADCL t8, t10 (-rCa-wCa)
+ 16: PUTL t10, R5
+ 17: INCEIPL $4
+
+ 0x254798E8: 2123000A subfic r9,r3,10
+ 18: GETL R3, t12
+ 19: MOVL $0xA, t14
+ 20: SBBL t12, t14 (-wCa)
+ 21: PUTL t14, R9
+ 22: INCEIPL $4
+
+ 0x254798EC: 39200000 li r9,0
+ 23: MOVL $0x0, t16
+ 24: PUTL t16, R9
+ 25: INCEIPL $4
+
+ 0x254798F0: 7D294914 adde r9,r9,r9
+ 26: GETL R9, t18
+ 27: GETL R9, t20
+ 28: ADCL t18, t20 (-rCa-wCa)
+ 29: PUTL t20, R9
+ 30: INCEIPL $4
+
+ 0x254798F4: 7D2B2B79 or. r11,r9,r5
+ 31: GETL R9, t22
+ 32: GETL R5, t24
+ 33: ORL t24, t22
+ 34: PUTL t22, R11
+ 35: CMP0L t22, t26 (-rSo)
+ 36: ICRFL t26, $0x0, CR
+ 37: INCEIPL $4
+
+ 0x254798F8: 4082010C bc 4,2,0x25479A04
+ 38: Jc02o $0x25479A04
+
+
+. 0 254798D8 36
+. 38 7D FF BC 6B A5 00 02 21 65 00 00 7C AB 29 14 21 23 00 0A 39 20 00 00 7D 29 49 14 7D 2B 2B 79 40 82 01 0C
+
+==== BB 1049 (0x254798FC) approx BBs exec'd 0 ====
+
+ 0x254798FC: 7C000026 mfcr r0
+ 0: GETL CR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x25479900: 5400DFFE rlwinm r0,r0,27,31,31
+ 3: GETL R0, t2
+ 4: ROLL $0x1B, t2
+ 5: ANDL $0x1, t2
+ 6: PUTL t2, R0
+ 7: INCEIPL $4
+
+ 0x25479904: 2C8A0000 cmpi cr1,r10,0
+ 8: GETL R10, t4
+ 9: CMP0L t4, t6 (-rSo)
+ 10: ICRFL t6, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x25479908: 93640208 stw r27,520(r4)
+ 12: GETL R27, t8
+ 13: GETL R4, t10
+ 14: ADDL $0x208, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x2547990C: 38E00000 li r7,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R7
+ 19: INCEIPL $4
+
+ 0x25479910: 540C083C rlwinm r12,r0,1,0,30
+ 20: GETL R0, t14
+ 21: SHLL $0x1, t14
+ 22: PUTL t14, R12
+ 23: INCEIPL $4
+
+ 0x25479914: 39600001 li r11,1
+ 24: MOVL $0x1, t16
+ 25: PUTL t16, R11
+ 26: INCEIPL $4
+
+ 0x25479918: 7D884378 or r8,r12,r8
+ 27: GETL R12, t18
+ 28: GETL R8, t20
+ 29: ORL t20, t18
+ 30: PUTL t18, R8
+ 31: INCEIPL $4
+
+ 0x2547991C: 9104020C stw r8,524(r4)
+ 32: GETL R8, t22
+ 33: GETL R4, t24
+ 34: ADDL $0x20C, t24
+ 35: STL t22, (t24)
+ 36: INCEIPL $4
+
+ 0x25479920: 41860018 bc 12,6,0x25479938
+ 37: Js06o $0x25479938
+
+
+. 0 254798FC 40
+. 7C 00 00 26 54 00 DF FE 2C 8A 00 00 93 64 02 08 38 E0 00 00 54 0C 08 3C 39 60 00 01 7D 88 43 78 91 04 02 0C 41 86 00 18
+
+==== BB 1050 (0x25479924) approx BBs exec'd 0 ====
+
+ 0x25479924: 834A0004 lwz r26,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25479928: 2E1A0000 cmpi cr4,r26,0
+ 5: GETL R26, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x2547992C: 4192000C bc 12,18,0x25479938
+ 9: Js18o $0x25479938
+
+
+. 0 25479924 12
+. 83 4A 00 04 2E 1A 00 00 41 92 00 0C
+
+==== BB 1051 (0x25479930) approx BBs exec'd 0 ====
+
+ 0x25479930: 7D475378 or r7,r10,r10
+ 0: GETL R10, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x25479934: 39600000 li r11,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0x25479938: 80DF0050 lwz r6,80(r31)
+ 6: GETL R31, t4
+ 7: ADDL $0x50, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R6
+ 10: INCEIPL $4
+
+ 0x2547993C: 7D695B78 or r9,r11,r11
+ 11: GETL R11, t8
+ 12: PUTL t8, R9
+ 13: INCEIPL $4
+
+ 0x25479940: 815F0008 lwz r10,8(r31)
+ 14: GETL R31, t10
+ 15: ADDL $0x8, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x25479944: 80A60000 lwz r5,0(r6)
+ 19: GETL R6, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R5
+ 22: INCEIPL $4
+
+ 0x25479948: 80DF0010 lwz r6,16(r31)
+ 23: GETL R31, t18
+ 24: ADDL $0x10, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R6
+ 27: INCEIPL $4
+
+ 0x2547994C: 7C655214 add r3,r5,r10
+ 28: GETL R5, t22
+ 29: GETL R10, t24
+ 30: ADDL t22, t24
+ 31: PUTL t24, R3
+ 32: INCEIPL $4
+
+ 0x25479950: 38BF0050 addi r5,r31,80
+ 33: GETL R31, t26
+ 34: ADDL $0x50, t26
+ 35: PUTL t26, R5
+ 36: INCEIPL $4
+
+ 0x25479954: 39400000 li r10,0
+ 37: MOVL $0x0, t28
+ 38: PUTL t28, R10
+ 39: INCEIPL $4
+
+ 0x25479958: 4BFFEC4D bl 0x254785A4
+ 40: MOVL $0x2547995C, t30
+ 41: PUTL t30, LR
+ 42: JMPo-c $0x254785A4 ($4)
+
+
+. 0 25479930 44
+. 7D 47 53 78 39 60 00 00 80 DF 00 50 7D 69 5B 78 81 5F 00 08 80 A6 00 00 80 DF 00 10 7C 65 52 14 38 BF 00 50 39 40 00 00 4B FF EC 4D
+
+==== BB 1052 _dl_lookup_symbol_x(0x254785A4) approx BBs exec'd 0 ====
+
+ 0x254785A4: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254785A8: 7D800026 mfcr r12
+ 3: GETL CR, t2
+ 4: PUTL t2, R12
+ 5: INCEIPL $4
+
+ 0x254785AC: 9421FF60 stwu r1,-160(r1)
+ 6: GETL R1, t4
+ 7: GETL R1, t6
+ 8: ADDL $0xFFFFFF60, t6
+ 9: PUTL t6, R1
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x254785B0: 4801EA51 bl 0x25497000
+ 12: MOVL $0x254785B4, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25497000 ($4)
+
+
+. 0 254785A4 16
+. 7C 08 02 A6 7D 80 00 26 94 21 FF 60 48 01 EA 51
+
+==== BB 1053 (0x254785B4) approx BBs exec'd 0 ====
+
+ 0x254785B4: 9261006C stw r19,108(r1)
+ 0: GETL R19, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x6C, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254785B8: 7C932378 or r19,r4,r4
+ 5: GETL R4, t4
+ 6: PUTL t4, R19
+ 7: INCEIPL $4
+
+ 0x254785BC: 92810070 stw r20,112(r1)
+ 8: GETL R20, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x70, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x254785C0: 7D144378 or r20,r8,r8
+ 13: GETL R8, t10
+ 14: PUTL t10, R20
+ 15: INCEIPL $4
+
+ 0x254785C4: 92A10074 stw r21,116(r1)
+ 16: GETL R21, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x74, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x254785C8: 7CD53378 or r21,r6,r6
+ 21: GETL R6, t16
+ 22: PUTL t16, R21
+ 23: INCEIPL $4
+
+ 0x254785CC: 92C10078 stw r22,120(r1)
+ 24: GETL R22, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x78, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x254785D0: 7CB62B78 or r22,r5,r5
+ 29: GETL R5, t22
+ 30: PUTL t22, R22
+ 31: INCEIPL $4
+
+ 0x254785D4: 92E1007C stw r23,124(r1)
+ 32: GETL R23, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x7C, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x254785D8: 7D374B78 or r23,r9,r9
+ 37: GETL R9, t28
+ 38: PUTL t28, R23
+ 39: INCEIPL $4
+
+ 0x254785DC: 93010080 stw r24,128(r1)
+ 40: GETL R24, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x80, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x254785E0: 7CF83B78 or r24,r7,r7
+ 45: GETL R7, t34
+ 46: PUTL t34, R24
+ 47: INCEIPL $4
+
+ 0x254785E4: 93210084 stw r25,132(r1)
+ 48: GETL R25, t36
+ 49: GETL R1, t38
+ 50: ADDL $0x84, t38
+ 51: STL t36, (t38)
+ 52: INCEIPL $4
+
+ 0x254785E8: 7C791B78 or r25,r3,r3
+ 53: GETL R3, t40
+ 54: PUTL t40, R25
+ 55: INCEIPL $4
+
+ 0x254785EC: 93410088 stw r26,136(r1)
+ 56: GETL R26, t42
+ 57: GETL R1, t44
+ 58: ADDL $0x88, t44
+ 59: STL t42, (t44)
+ 60: INCEIPL $4
+
+ 0x254785F0: 7D5A5378 or r26,r10,r10
+ 61: GETL R10, t46
+ 62: PUTL t46, R26
+ 63: INCEIPL $4
+
+ 0x254785F4: 93810090 stw r28,144(r1)
+ 64: GETL R28, t48
+ 65: GETL R1, t50
+ 66: ADDL $0x90, t50
+ 67: STL t48, (t50)
+ 68: INCEIPL $4
+
+ 0x254785F8: 3B800000 li r28,0
+ 69: MOVL $0x0, t52
+ 70: PUTL t52, R28
+ 71: INCEIPL $4
+
+ 0x254785FC: 93C10098 stw r30,152(r1)
+ 72: GETL R30, t54
+ 73: GETL R1, t56
+ 74: ADDL $0x98, t56
+ 75: STL t54, (t56)
+ 76: INCEIPL $4
+
+ 0x25478600: 7FC802A6 mflr r30
+ 77: GETL LR, t58
+ 78: PUTL t58, R30
+ 79: INCEIPL $4
+
+ 0x25478604: 93E1009C stw r31,156(r1)
+ 80: GETL R31, t60
+ 81: GETL R1, t62
+ 82: ADDL $0x9C, t62
+ 83: STL t60, (t62)
+ 84: INCEIPL $4
+
+ 0x25478608: 7C3F0B78 or r31,r1,r1
+ 85: GETL R1, t64
+ 86: PUTL t64, R31
+ 87: INCEIPL $4
+
+ 0x2547860C: 92210064 stw r17,100(r1)
+ 88: GETL R17, t66
+ 89: GETL R1, t68
+ 90: ADDL $0x64, t68
+ 91: STL t66, (t68)
+ 92: INCEIPL $4
+
+ 0x25478610: 92410068 stw r18,104(r1)
+ 93: GETL R18, t70
+ 94: GETL R1, t72
+ 95: ADDL $0x68, t72
+ 96: STL t70, (t72)
+ 97: INCEIPL $4
+
+ 0x25478614: 9361008C stw r27,140(r1)
+ 98: GETL R27, t74
+ 99: GETL R1, t76
+ 100: ADDL $0x8C, t76
+ 101: STL t74, (t76)
+ 102: INCEIPL $4
+
+ 0x25478618: 93A10094 stw r29,148(r1)
+ 103: GETL R29, t78
+ 104: GETL R1, t80
+ 105: ADDL $0x94, t80
+ 106: STL t78, (t80)
+ 107: INCEIPL $4
+
+ 0x2547861C: 900100A4 stw r0,164(r1)
+ 108: GETL R0, t82
+ 109: GETL R1, t84
+ 110: ADDL $0xA4, t84
+ 111: STL t82, (t84)
+ 112: INCEIPL $4
+
+ 0x25478620: 91810060 stw r12,96(r1)
+ 113: GETL R12, t86
+ 114: GETL R1, t88
+ 115: ADDL $0x60, t88
+ 116: STL t86, (t88)
+ 117: INCEIPL $4
+
+ 0x25478624: 88030000 lbz r0,0(r3)
+ 118: GETL R3, t90
+ 119: LDB (t90), t92
+ 120: PUTL t92, R0
+ 121: INCEIPL $4
+
+ 0x25478628: 2F800000 cmpi cr7,r0,0
+ 122: GETL R0, t94
+ 123: CMP0L t94, t96 (-rSo)
+ 124: ICRFL t96, $0x7, CR
+ 125: INCEIPL $4
+
+ 0x2547862C: 419E0018 bc 12,30,0x25478644
+ 126: Js30o $0x25478644
+
+
+. 0 254785B4 124
+. 92 61 00 6C 7C 93 23 78 92 81 00 70 7D 14 43 78 92 A1 00 74 7C D5 33 78 92 C1 00 78 7C B6 2B 78 92 E1 00 7C 7D 37 4B 78 93 01 00 80 7C F8 3B 78 93 21 00 84 7C 79 1B 78 93 41 00 88 7D 5A 53 78 93 81 00 90 3B 80 00 00 93 C1 00 98 7F C8 02 A6 93 E1 00 9C 7C 3F 0B 78 92 21 00 64 92 41 00 68 93 61 00 8C 93 A1 00 94 90 01 00 A4 91 81 00 60 88 03 00 00 2F 80 00 00 41 9E 00 18
+
+==== BB 1054 (0x25478630) approx BBs exec'd 0 ====
+
+ 0x25478630: 89630001 lbz r11,1(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25478634: 7C1C0378 or r28,r0,r0
+ 5: GETL R0, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x25478638: 39230001 addi r9,r3,1
+ 8: GETL R3, t6
+ 9: ADDL $0x1, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0x2547863C: 2C0B0000 cmpi cr0,r11,0
+ 12: GETL R11, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x0, CR
+ 15: INCEIPL $4
+
+ 0x25478640: 4082015C bc 4,2,0x2547879C
+ 16: Jc02o $0x2547879C
+
+
+. 0 25478630 20
+. 89 63 00 01 7C 1C 03 78 39 23 00 01 2C 0B 00 00 40 82 01 5C
+
+==== BB 1055 (0x2547879C) approx BBs exec'd 0 ====
+
+ 0x2547879C: 89490001 lbz r10,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x254787A0: 54032036 rlwinm r3,r0,4,0,27
+ 5: GETL R0, t4
+ 6: SHLL $0x4, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x254787A4: 7F835A14 add r28,r3,r11
+ 9: GETL R3, t6
+ 10: GETL R11, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0x254787A8: 39290001 addi r9,r9,1
+ 14: GETL R9, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x254787AC: 2C8A0000 cmpi cr1,r10,0
+ 18: GETL R10, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x1, CR
+ 21: INCEIPL $4
+
+ 0x254787B0: 41A6FE94 bc 13,6,0x25478644
+ 22: Js06o $0x25478644
+
+
+. 0 2547879C 24
+. 89 49 00 01 54 03 20 36 7F 83 5A 14 39 29 00 01 2C 8A 00 00 41 A6 FE 94
+
+==== BB 1056 (0x254787B4) approx BBs exec'd 0 ====
+
+ 0x254787B4: 89690001 lbz r11,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254787B8: 57842036 rlwinm r4,r28,4,0,27
+ 5: GETL R28, t4
+ 6: SHLL $0x4, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x254787BC: 7F845214 add r28,r4,r10
+ 9: GETL R4, t6
+ 10: GETL R10, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0x254787C0: 39290001 addi r9,r9,1
+ 14: GETL R9, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x254787C4: 2E0B0000 cmpi cr4,r11,0
+ 18: GETL R11, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x4, CR
+ 21: INCEIPL $4
+
+ 0x254787C8: 41B2FE7C bc 13,18,0x25478644
+ 22: Js18o $0x25478644
+
+
+. 0 254787B4 24
+. 89 69 00 01 57 84 20 36 7F 84 52 14 39 29 00 01 2E 0B 00 00 41 B2 FE 7C
+
+==== BB 1057 (0x254787CC) approx BBs exec'd 0 ====
+
+ 0x254787CC: 89490001 lbz r10,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x254787D0: 57852036 rlwinm r5,r28,4,0,27
+ 5: GETL R28, t4
+ 6: SHLL $0x4, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x254787D4: 7F855A14 add r28,r5,r11
+ 9: GETL R5, t6
+ 10: GETL R11, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0x254787D8: 39290001 addi r9,r9,1
+ 14: GETL R9, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x254787DC: 2F0A0000 cmpi cr6,r10,0
+ 18: GETL R10, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x254787E0: 41BAFE64 bc 13,26,0x25478644
+ 22: Js26o $0x25478644
+
+
+. 0 254787CC 24
+. 89 49 00 01 57 85 20 36 7F 85 5A 14 39 29 00 01 2F 0A 00 00 41 BA FE 64
+
+==== BB 1058 (0x25478644) approx BBs exec'd 0 ====
+
+ 0x25478644: 825E04C8 lwz r18,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R18
+ 4: INCEIPL $4
+
+ 0x25478648: 2E1A0000 cmpi cr4,r26,0
+ 5: GETL R26, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x2547864C: 3B600000 li r27,0
+ 9: MOVL $0x0, t8
+ 10: PUTL t8, R27
+ 11: INCEIPL $4
+
+ 0x25478650: 39400000 li r10,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R10
+ 14: INCEIPL $4
+
+ 0x25478654: 83B201A8 lwz r29,424(r18)
+ 15: GETL R18, t12
+ 16: ADDL $0x1A8, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R29
+ 19: INCEIPL $4
+
+ 0x25478658: 937F0048 stw r27,72(r31)
+ 20: GETL R27, t16
+ 21: GETL R31, t18
+ 22: ADDL $0x48, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x2547865C: 3B600000 li r27,0
+ 25: MOVL $0x0, t20
+ 26: PUTL t20, R27
+ 27: INCEIPL $4
+
+ 0x25478660: 397D0001 addi r11,r29,1
+ 28: GETL R29, t22
+ 29: ADDL $0x1, t22
+ 30: PUTL t22, R11
+ 31: INCEIPL $4
+
+ 0x25478664: 915F004C stw r10,76(r31)
+ 32: GETL R10, t24
+ 33: GETL R31, t26
+ 34: ADDL $0x4C, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x25478668: 917201A8 stw r11,424(r18)
+ 37: GETL R11, t28
+ 38: GETL R18, t30
+ 39: ADDL $0x1A8, t30
+ 40: STL t28, (t30)
+ 41: INCEIPL $4
+
+ 0x2547866C: 7EBDAB78 or r29,r21,r21
+ 42: GETL R21, t32
+ 43: PUTL t32, R29
+ 44: INCEIPL $4
+
+ 0x25478670: 40920538 bc 4,18,0x25478BA8
+ 45: Jc18o $0x25478BA8
+
+
+. 0 25478644 48
+. 82 5E 04 C8 2E 1A 00 00 3B 60 00 00 39 40 00 00 83 B2 01 A8 93 7F 00 48 3B 60 00 00 39 7D 00 01 91 5F 00 4C 91 72 01 A8 7E BD AB 78 40 92 05 38
+
+==== BB 1059 (0x25478674) approx BBs exec'd 0 ====
+
+ 0x25478674: 81750000 lwz r11,0(r21)
+ 0: GETL R21, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x25478678: 2C8B0000 cmpi cr1,r11,0
+ 4: GETL R11, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x2547867C: 7F68DB78 or r8,r27,r27
+ 8: GETL R27, t8
+ 9: PUTL t8, R8
+ 10: INCEIPL $4
+
+ 0x25478680: 4186004C bc 12,6,0x254786CC
+ 11: Js06o $0x254786CC
+
+
+. 0 25478674 16
+. 81 75 00 00 2C 8B 00 00 7F 68 DB 78 41 86 00 4C
+
+==== BB 1060 (0x25478684) approx BBs exec'd 0 ====
+
+ 0x25478684: 80F50000 lwz r7,0(r21)
+ 0: GETL R21, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25478688: 3A3F0018 addi r17,r31,24
+ 4: GETL R31, t4
+ 5: ADDL $0x18, t4
+ 6: PUTL t4, R17
+ 7: INCEIPL $4
+
+ 0x2547868C: 80B60000 lwz r5,0(r22)
+ 8: GETL R22, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0x25478690: 7F23CB78 or r3,r25,r25
+ 12: GETL R25, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x25478694: 7F84E378 or r4,r28,r28
+ 15: GETL R28, t12
+ 16: PUTL t12, R4
+ 17: INCEIPL $4
+
+ 0x25478698: 38DF0048 addi r6,r31,72
+ 18: GETL R31, t14
+ 19: ADDL $0x48, t14
+ 20: PUTL t14, R6
+ 21: INCEIPL $4
+
+ 0x2547869C: 7F09C378 or r9,r24,r24
+ 22: GETL R24, t16
+ 23: PUTL t16, R9
+ 24: INCEIPL $4
+
+ 0x254786A0: 7EEABB78 or r10,r23,r23
+ 25: GETL R23, t18
+ 26: PUTL t18, R10
+ 27: INCEIPL $4
+
+ 0x254786A4: 93410008 stw r26,8(r1)
+ 28: GETL R26, t20
+ 29: GETL R1, t22
+ 30: ADDL $0x8, t22
+ 31: STL t20, (t22)
+ 32: INCEIPL $4
+
+ 0x254786A8: 9281000C stw r20,12(r1)
+ 33: GETL R20, t24
+ 34: GETL R1, t26
+ 35: ADDL $0xC, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0x254786AC: 4BFFFAFD bl 0x254781A8
+ 38: MOVL $0x254786B0, t28
+ 39: PUTL t28, LR
+ 40: JMPo-c $0x254781A8 ($4)
+
+
+. 0 25478684 44
+. 80 F5 00 00 3A 3F 00 18 80 B6 00 00 7F 23 CB 78 7F 84 E3 78 38 DF 00 48 7F 09 C3 78 7E EA BB 78 93 41 00 08 92 81 00 0C 4B FF FA FD
+
+==== BB 1061 do_lookup_x(0x254781A8) approx BBs exec'd 0 ====
+
+ 0x254781A8: 7D6802A6 mflr r11
+ 0: GETL LR, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x254781AC: 9421FF90 stwu r1,-112(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFF90, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x254781B0: 4801EE51 bl 0x25497000
+ 9: MOVL $0x254781B4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 254781A8 12
+. 7D 68 02 A6 94 21 FF 90 48 01 EE 51
+
+==== BB 1062 (0x254781B4) approx BBs exec'd 0 ====
+
+ 0x254781B4: 93C10068 stw r30,104(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x68, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x254781B8: 80010078 lwz r0,120(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x78, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x254781BC: 7FC802A6 mflr r30
+ 10: GETL LR, t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0x254781C0: 91610074 stw r11,116(r1)
+ 13: GETL R11, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x74, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x254781C4: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0x254781C8: 91E1002C stw r15,44(r1)
+ 21: GETL R15, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x2C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x254781CC: 92010030 stw r16,48(r1)
+ 26: GETL R16, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x30, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0x254781D0: 81E70004 lwz r15,4(r7)
+ 31: GETL R7, t24
+ 32: ADDL $0x4, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R15
+ 35: INCEIPL $4
+
+ 0x254781D4: 82070000 lwz r16,0(r7)
+ 36: GETL R7, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R16
+ 39: INCEIPL $4
+
+ 0x254781D8: 91C10028 stw r14,40(r1)
+ 40: GETL R14, t32
+ 41: GETL R1, t34
+ 42: ADDL $0x28, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0x254781DC: 7C8E2378 or r14,r4,r4
+ 45: GETL R4, t36
+ 46: PUTL t36, R14
+ 47: INCEIPL $4
+
+ 0x254781E0: 92210034 stw r17,52(r1)
+ 48: GETL R17, t38
+ 49: GETL R1, t40
+ 50: ADDL $0x34, t40
+ 51: STL t38, (t40)
+ 52: INCEIPL $4
+
+ 0x254781E4: 92A10044 stw r21,68(r1)
+ 53: GETL R21, t42
+ 54: GETL R1, t44
+ 55: ADDL $0x44, t44
+ 56: STL t42, (t44)
+ 57: INCEIPL $4
+
+ 0x254781E8: 7D354B78 or r21,r9,r9
+ 58: GETL R9, t46
+ 59: PUTL t46, R21
+ 60: INCEIPL $4
+
+ 0x254781EC: 93410058 stw r26,88(r1)
+ 61: GETL R26, t48
+ 62: GETL R1, t50
+ 63: ADDL $0x58, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0x254781F0: 3120FFFF addic r9,r0,-1
+ 66: GETL R0, t52
+ 67: ADCL $0xFFFFFFFF, t52 (-wCa)
+ 68: PUTL t52, R9
+ 69: INCEIPL $4
+
+ 0x254781F4: 7E290110 subfe r17,r9,r0
+ 70: GETL R9, t54
+ 71: GETL R0, t56
+ 72: SBBL t54, t56 (-rCa-wCa)
+ 73: PUTL t56, R17
+ 74: INCEIPL $4
+
+ 0x254781F8: 7D1A4378 or r26,r8,r8
+ 75: GETL R8, t58
+ 76: PUTL t58, R26
+ 77: INCEIPL $4
+
+ 0x254781FC: 92410038 stw r18,56(r1)
+ 78: GETL R18, t60
+ 79: GETL R1, t62
+ 80: ADDL $0x38, t62
+ 81: STL t60, (t62)
+ 82: INCEIPL $4
+
+ 0x25478200: 9261003C stw r19,60(r1)
+ 83: GETL R19, t64
+ 84: GETL R1, t66
+ 85: ADDL $0x3C, t66
+ 86: STL t64, (t66)
+ 87: INCEIPL $4
+
+ 0x25478204: 92810040 stw r20,64(r1)
+ 88: GETL R20, t68
+ 89: GETL R1, t70
+ 90: ADDL $0x40, t70
+ 91: STL t68, (t70)
+ 92: INCEIPL $4
+
+ 0x25478208: 92C10048 stw r22,72(r1)
+ 93: GETL R22, t72
+ 94: GETL R1, t74
+ 95: ADDL $0x48, t74
+ 96: STL t72, (t74)
+ 97: INCEIPL $4
+
+ 0x2547820C: 92E1004C stw r23,76(r1)
+ 98: GETL R23, t76
+ 99: GETL R1, t78
+ 100: ADDL $0x4C, t78
+ 101: STL t76, (t78)
+ 102: INCEIPL $4
+
+ 0x25478210: 93010050 stw r24,80(r1)
+ 103: GETL R24, t80
+ 104: GETL R1, t82
+ 105: ADDL $0x50, t82
+ 106: STL t80, (t82)
+ 107: INCEIPL $4
+
+ 0x25478214: 93210054 stw r25,84(r1)
+ 108: GETL R25, t84
+ 109: GETL R1, t86
+ 110: ADDL $0x54, t86
+ 111: STL t84, (t86)
+ 112: INCEIPL $4
+
+ 0x25478218: 9361005C stw r27,92(r1)
+ 113: GETL R27, t88
+ 114: GETL R1, t90
+ 115: ADDL $0x5C, t90
+ 116: STL t88, (t90)
+ 117: INCEIPL $4
+
+ 0x2547821C: 93810060 stw r28,96(r1)
+ 118: GETL R28, t92
+ 119: GETL R1, t94
+ 120: ADDL $0x60, t94
+ 121: STL t92, (t94)
+ 122: INCEIPL $4
+
+ 0x25478220: 93A10064 stw r29,100(r1)
+ 123: GETL R29, t96
+ 124: GETL R1, t98
+ 125: ADDL $0x64, t98
+ 126: STL t96, (t98)
+ 127: INCEIPL $4
+
+ 0x25478224: 93E1006C stw r31,108(r1)
+ 128: GETL R31, t100
+ 129: GETL R1, t102
+ 130: ADDL $0x6C, t102
+ 131: STL t100, (t102)
+ 132: INCEIPL $4
+
+ 0x25478228: 91810024 stw r12,36(r1)
+ 133: GETL R12, t104
+ 134: GETL R1, t106
+ 135: ADDL $0x24, t106
+ 136: STL t104, (t106)
+ 137: INCEIPL $4
+
+ 0x2547822C: 90610008 stw r3,8(r1)
+ 138: GETL R3, t108
+ 139: GETL R1, t110
+ 140: ADDL $0x8, t110
+ 141: STL t108, (t110)
+ 142: INCEIPL $4
+
+ 0x25478230: 90A1000C stw r5,12(r1)
+ 143: GETL R5, t112
+ 144: GETL R1, t114
+ 145: ADDL $0xC, t114
+ 146: STL t112, (t114)
+ 147: INCEIPL $4
+
+ 0x25478234: 90C10010 stw r6,16(r1)
+ 148: GETL R6, t116
+ 149: GETL R1, t118
+ 150: ADDL $0x10, t118
+ 151: STL t116, (t118)
+ 152: INCEIPL $4
+
+ 0x25478238: 91410014 stw r10,20(r1)
+ 153: GETL R10, t120
+ 154: GETL R1, t122
+ 155: ADDL $0x14, t122
+ 156: STL t120, (t122)
+ 157: INCEIPL $4
+
+ 0x2547823C: 48000010 b 0x2547824C
+ 158: JMPo $0x2547824C ($4)
+
+
+. 0 254781B4 140
+. 93 C1 00 68 80 01 00 78 7F C8 02 A6 91 61 00 74 7D 80 00 26 91 E1 00 2C 92 01 00 30 81 E7 00 04 82 07 00 00 91 C1 00 28 7C 8E 23 78 92 21 00 34 92 A1 00 44 7D 35 4B 78 93 41 00 58 31 20 FF FF 7E 29 01 10 7D 1A 43 78 92 41 00 38 92 61 00 3C 92 81 00 40 92 C1 00 48 92 E1 00 4C 93 01 00 50 93 21 00 54 93 61 00 5C 93 81 00 60 93 A1 00 64 93 E1 00 6C 91 81 00 24 90 61 00 08 90 A1 00 0C 90 C1 00 10 91 41 00 14 48 00 00 10
+
+==== BB 1063 (0x2547824C) approx BBs exec'd 0 ====
+
+ 0x2547824C: 5745103A rlwinm r5,r26,2,0,29
+ 0: GETL R26, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R5
+ 3: INCEIPL $4
+
+ 0x25478250: 80810078 lwz r4,120(r1)
+ 4: GETL R1, t2
+ 5: ADDL $0x78, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x25478254: 7D25802E lwzx r9,r5,r16
+ 9: GETL R16, t6
+ 10: GETL R5, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R9
+ 14: INCEIPL $4
+
+ 0x25478258: 3A800000 li r20,0
+ 15: MOVL $0x0, t12
+ 16: PUTL t12, R20
+ 17: INCEIPL $4
+
+ 0x2547825C: 3A600000 li r19,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R19
+ 20: INCEIPL $4
+
+ 0x25478260: 83890014 lwz r28,20(r9)
+ 21: GETL R9, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R28
+ 25: INCEIPL $4
+
+ 0x25478264: 7F832278 xor r3,r28,r4
+ 26: GETL R28, t20
+ 27: GETL R4, t22
+ 28: XORL t20, t22
+ 29: PUTL t22, R3
+ 30: INCEIPL $4
+
+ 0x25478268: 21630000 subfic r11,r3,0
+ 31: GETL R3, t24
+ 32: MOVL $0x0, t26
+ 33: SBBL t24, t26 (-wCa)
+ 34: PUTL t26, R11
+ 35: INCEIPL $4
+
+ 0x2547826C: 7C6B1914 adde r3,r11,r3
+ 36: GETL R11, t28
+ 37: GETL R3, t30
+ 38: ADCL t28, t30 (-rCa-wCa)
+ 39: PUTL t30, R3
+ 40: INCEIPL $4
+
+ 0x25478270: 7E291839 and. r9,r17,r3
+ 41: GETL R17, t32
+ 42: GETL R3, t34
+ 43: ANDL t32, t34
+ 44: PUTL t34, R9
+ 45: CMP0L t34, t36 (-rSo)
+ 46: ICRFL t36, $0x0, CR
+ 47: INCEIPL $4
+
+ 0x25478274: 4082FFCC bc 4,2,0x25478240
+ 48: Jc02o $0x25478240
+
+
+. 0 2547824C 44
+. 57 45 10 3A 80 81 00 78 7D 25 80 2E 3A 80 00 00 3A 60 00 00 83 89 00 14 7F 83 22 78 21 63 00 00 7C 6B 19 14 7E 29 18 39 40 82 FF CC
+
+==== BB 1064 (0x25478278) approx BBs exec'd 0 ====
+
+ 0x25478278: 80C1007C lwz r6,124(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x7C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547827C: 54CBFFFF rlwinm. r11,r6,31,31,31
+ 5: GETL R6, t4
+ 6: ROLL $0x1F, t4
+ 7: ANDL $0x1, t4
+ 8: PUTL t4, R11
+ 9: CMP0L t4, t6 (-rSo)
+ 10: ICRFL t6, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x25478280: 41820010 bc 12,2,0x25478290
+ 12: Js02o $0x25478290
+
+
+. 0 25478278 12
+. 80 C1 00 7C 54 CB FF FF 41 82 00 10
+
+==== BB 1065 (0x25478290) approx BBs exec'd 0 ====
+
+ 0x25478290: 815E04F4 lwz r10,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25478294: 810A0000 lwz r8,0(r10)
+ 5: GETL R10, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R8
+ 8: INCEIPL $4
+
+ 0x25478298: 71090008 andi. r9,r8,0x8
+ 9: GETL R8, t8
+ 10: ANDL $0x8, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x2547829C: 40820248 bc 4,2,0x254784E4
+ 15: Jc02o $0x254784E4
+
+
+. 0 25478290 16
+. 81 5E 04 F4 81 0A 00 00 71 09 00 08 40 82 02 48
+
+==== BB 1066 (0x254782A0) approx BBs exec'd 0 ====
+
+ 0x254782A0: 801C016C lwz r0,364(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x16C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x254782A4: 833C0170 lwz r25,368(r28)
+ 5: GETL R28, t4
+ 6: ADDL $0x170, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0x254782A8: 7D8E0396 divwu r12, r14, r0
+ 10: GETL R14, t10
+ 11: GETL R0, t8
+ 12: UDIVL t8, t10
+ 13: PUTL t10, R12
+ 14: INCEIPL $4
+
+ 0x254782AC: 817C0038 lwz r11,56(r28)
+ 15: GETL R28, t12
+ 16: ADDL $0x38, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R11
+ 19: INCEIPL $4
+
+ 0x254782B0: 807C0034 lwz r3,52(r28)
+ 20: GETL R28, t16
+ 21: ADDL $0x34, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R3
+ 24: INCEIPL $4
+
+ 0x254782B4: 830B0004 lwz r24,4(r11)
+ 25: GETL R11, t20
+ 26: ADDL $0x4, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R24
+ 29: INCEIPL $4
+
+ 0x254782B8: 82430004 lwz r18,4(r3)
+ 30: GETL R3, t24
+ 31: ADDL $0x4, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R18
+ 34: INCEIPL $4
+
+ 0x254782BC: 82DC0198 lwz r22,408(r28)
+ 35: GETL R28, t28
+ 36: ADDL $0x198, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R22
+ 39: INCEIPL $4
+
+ 0x254782C0: 7FEC01D6 mullw r31,r12,r0
+ 40: GETL R12, t32
+ 41: GETL R0, t34
+ 42: MULL t32, t34
+ 43: PUTL t34, R31
+ 44: INCEIPL $4
+
+ 0x254782C4: 7FBF7050 subf r29,r31,r14
+ 45: GETL R31, t36
+ 46: GETL R14, t38
+ 47: SUBL t36, t38
+ 48: PUTL t38, R29
+ 49: INCEIPL $4
+
+ 0x254782C8: 57BB103A rlwinm r27,r29,2,0,29
+ 50: GETL R29, t40
+ 51: SHLL $0x2, t40
+ 52: PUTL t40, R27
+ 53: INCEIPL $4
+
+ 0x254782CC: 7FFBC82E lwzx r31,r27,r25
+ 54: GETL R25, t42
+ 55: GETL R27, t44
+ 56: ADDL t44, t42
+ 57: LDL (t42), t46
+ 58: PUTL t46, R31
+ 59: INCEIPL $4
+
+ 0x254782D0: 2E1F0000 cmpi cr4,r31,0
+ 60: GETL R31, t48
+ 61: CMP0L t48, t50 (-rSo)
+ 62: ICRFL t50, $0x4, CR
+ 63: INCEIPL $4
+
+ 0x254782D4: 419200F8 bc 12,18,0x254783CC
+ 64: Js18o $0x254783CC
+
+
+. 0 254782A0 56
+. 80 1C 01 6C 83 3C 01 70 7D 8E 03 96 81 7C 00 38 80 7C 00 34 83 0B 00 04 82 43 00 04 82 DC 01 98 7F EC 01 D6 7F BF 70 50 57 BB 10 3A 7F FB C8 2E 2E 1F 00 00 41 92 00 F8
+
+==== BB 1067 (0x254782D8) approx BBs exec'd 0 ====
+
+ 0x254782D8: 2D960000 cmpi cr3,r22,0
+ 0: GETL R22, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x3, CR
+ 3: INCEIPL $4
+
+ 0x254782DC: 48000028 b 0x25478304
+ 4: JMPo $0x25478304 ($4)
+
+
+. 0 254782D8 8
+. 2D 96 00 00 48 00 00 28
+
+==== BB 1068 (0x25478304) approx BBs exec'd 0 ====
+
+ 0x25478304: 57E92036 rlwinm r9,r31,4,0,27
+ 0: GETL R31, t0
+ 1: SHLL $0x4, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x25478308: 7FA9C214 add r29,r9,r24
+ 4: GETL R9, t2
+ 5: GETL R24, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0x2547830C: 809D0004 lwz r4,4(r29)
+ 9: GETL R29, t6
+ 10: ADDL $0x4, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R4
+ 13: INCEIPL $4
+
+ 0x25478310: 2C840000 cmpi cr1,r4,0
+ 14: GETL R4, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x1, CR
+ 17: INCEIPL $4
+
+ 0x25478314: 41A6FFCC bc 13,6,0x254782E0
+ 18: Js06o $0x254782E0
+
+
+. 0 25478304 20
+. 57 E9 20 36 7F A9 C2 14 80 9D 00 04 2C 84 00 00 41 A6 FF CC
+
+==== BB 1069 (0x25478318) approx BBs exec'd 0 ====
+
+ 0x25478318: A0FD000E lhz r7,14(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xE, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x2547831C: 2C070000 cmpi cr0,r7,0
+ 5: GETL R7, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x25478320: 40820010 bc 4,2,0x25478330
+ 9: Jc02o $0x25478330
+
+
+. 0 25478318 12
+. A0 FD 00 0E 2C 07 00 00 40 82 00 10
+
+==== BB 1070 (0x25478330) approx BBs exec'd 0 ====
+
+ 0x25478330: 8B7D000C lbz r27,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x25478334: 5760073E rlwinm r0,r27,0,28,31
+ 5: GETL R27, t4
+ 6: ANDL $0xF, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x25478338: 2F800002 cmpi cr7,r0,2
+ 9: GETL R0, t6
+ 10: MOVL $0x2, t10
+ 11: CMPL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x2547833C: 409D000C bc 4,29,0x25478348
+ 14: Jc29o $0x25478348
+
+
+. 0 25478330 16
+. 8B 7D 00 0C 57 60 07 3E 2F 80 00 02 40 9D 00 0C
+
+==== BB 1071 (0x25478348) approx BBs exec'd 0 ====
+
+ 0x25478348: 8141000C lwz r10,12(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547834C: 7F1D5000 cmp cr6,r29,r10
+ 5: GETL R29, t4
+ 6: GETL R10, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x25478350: 419A001C bc 12,26,0x2547836C
+ 10: Js26o $0x2547836C
+
+
+. 0 25478348 12
+. 81 41 00 0C 7F 1D 50 00 41 9A 00 1C
+
+==== BB 1072 (0x25478354) approx BBs exec'd 0 ====
+
+ 0x25478354: 7EE9C02E lwzx r23,r9,r24
+ 0: GETL R24, t0
+ 1: GETL R9, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R23
+ 5: INCEIPL $4
+
+ 0x25478358: 80810008 lwz r4,8(r1)
+ 6: GETL R1, t6
+ 7: ADDL $0x8, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R4
+ 10: INCEIPL $4
+
+ 0x2547835C: 7C779214 add r3,r23,r18
+ 11: GETL R23, t10
+ 12: GETL R18, t12
+ 13: ADDL t10, t12
+ 14: PUTL t12, R3
+ 15: INCEIPL $4
+
+ 0x25478360: 4800AB81 bl 0x25482EE0
+ 16: MOVL $0x25478364, t14
+ 17: PUTL t14, LR
+ 18: JMPo-c $0x25482EE0 ($4)
+
+
+. 0 25478354 16
+. 7E E9 C0 2E 80 81 00 08 7C 77 92 14 48 00 AB 81
+
+==== BB 1073 (0x25478364) approx BBs exec'd 0 ====
+
+ 0x25478364: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25478368: 4082FF88 bc 4,2,0x254782F0
+ 4: Jc02o $0x254782F0
+
+
+. 0 25478364 8
+. 2C 03 00 00 40 82 FF 88
+
+==== BB 1074 (0x254782F0) approx BBs exec'd 0 ====
+
+ 0x254782F0: 83BC0174 lwz r29,372(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x174, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254782F4: 57E7103A rlwinm r7,r31,2,0,29
+ 5: GETL R31, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x254782F8: 7FE7E82E lwzx r31,r7,r29
+ 9: GETL R29, t6
+ 10: GETL R7, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0x254782FC: 2E1F0000 cmpi cr4,r31,0
+ 15: GETL R31, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x4, CR
+ 18: INCEIPL $4
+
+ 0x25478300: 41920108 bc 12,18,0x25478408
+ 19: Js18o $0x25478408
+
+
+. 0 254782F0 20
+. 83 BC 01 74 57 E7 10 3A 7F E7 E8 2E 2E 1F 00 00 41 92 01 08
+
+==== BB 1075 (0x25478408) approx BBs exec'd 0 ====
+
+ 0x25478408: 2D940001 cmpi cr3,r20,1
+ 0: GETL R20, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x3, CR
+ 4: INCEIPL $4
+
+ 0x2547840C: 408EFFC0 bc 4,14,0x254783CC
+ 5: Jc14o $0x254783CC
+
+
+. 0 25478408 8
+. 2D 94 00 01 40 8E FF C0
+
+==== BB 1076 (0x254783CC) approx BBs exec'd 0 ====
+
+ 0x254783CC: 7F000026 mfcr r24
+ 0: GETL CR, t0
+ 1: PUTL t0, R24
+ 2: INCEIPL $4
+
+ 0x254783D0: 57189FFE rlwinm r24,r24,19,31,31
+ 3: GETL R24, t2
+ 4: ROLL $0x13, t2
+ 5: ANDL $0x1, t2
+ 6: PUTL t2, R24
+ 7: INCEIPL $4
+
+ 0x254783D4: 3175FFFF addic r11,r21,-1
+ 8: GETL R21, t4
+ 9: ADCL $0xFFFFFFFF, t4 (-wCa)
+ 10: PUTL t4, R11
+ 11: INCEIPL $4
+
+ 0x254783D8: 7ECBA910 subfe r22,r11,r21
+ 12: GETL R11, t6
+ 13: GETL R21, t8
+ 14: SBBL t6, t8 (-rCa-wCa)
+ 15: PUTL t8, R22
+ 16: INCEIPL $4
+
+ 0x254783DC: 7F0BB039 and. r11,r24,r22
+ 17: GETL R24, t10
+ 18: GETL R22, t12
+ 19: ANDL t10, t12
+ 20: PUTL t12, R11
+ 21: CMP0L t12, t14 (-rSo)
+ 22: ICRFL t14, $0x0, CR
+ 23: INCEIPL $4
+
+ 0x254783E0: 41A2FE60 bc 13,2,0x25478240
+ 24: Js02o $0x25478240
+
+
+. 0 254783CC 24
+. 7F 00 00 26 57 18 9F FE 31 75 FF FF 7E CB A9 10 7F 0B B0 39 41 A2 FE 60
+
+==== BB 1077 (0x254783E4) approx BBs exec'd 0 ====
+
+ 0x254783E4: 8075000C lwz r3,12(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254783E8: 2E030000 cmpi cr4,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254783EC: 4192FE54 bc 12,18,0x25478240
+ 9: Js18o $0x25478240
+
+
+. 0 254783E4 12
+. 80 75 00 0C 2E 03 00 00 41 92 FE 54
+
+==== BB 1078 (0x25478240) approx BBs exec'd 0 ====
+
+ 0x25478240: 3B5A0001 addi r26,r26,1
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x25478244: 7F9A7840 cmpl cr7,r26,r15
+ 4: GETL R26, t2
+ 5: GETL R15, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25478248: 409C01DC bc 4,28,0x25478424
+ 9: Jc28o $0x25478424
+
+
+. 0 25478240 12
+. 3B 5A 00 01 7F 9A 78 40 40 9C 01 DC
+
+==== BB 1079 (0x2547836C) approx BBs exec'd 0 ====
+
+ 0x2547836C: 2F950000 cmpi cr7,r21,0
+ 0: GETL R21, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25478370: 419E0130 bc 12,30,0x254784A0
+ 4: Js30o $0x254784A0
+
+
+. 0 2547836C 8
+. 2F 95 00 00 41 9E 01 30
+
+==== BB 1080 (0x25478374) approx BBs exec'd 0 ====
+
+ 0x25478374: 418E0044 bc 12,14,0x254783B8
+ 0: Js14o $0x254783B8
+
+
+. 0 25478374 4
+. 41 8E 00 44
+
+==== BB 1081 (0x25478378) approx BBs exec'd 0 ====
+
+ 0x25478378: 57F9083C rlwinm r25,r31,1,0,30
+ 0: GETL R31, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0x2547837C: 815C0188 lwz r10,392(r28)
+ 4: GETL R28, t2
+ 5: ADDL $0x188, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x25478380: 7EF9B22E lhzx r23,r25,r22
+ 9: GETL R22, t6
+ 10: GETL R25, t8
+ 11: ADDL t8, t6
+ 12: LDW (t6), t10
+ 13: PUTL t10, R23
+ 14: INCEIPL $4
+
+ 0x25478384: 81350004 lwz r9,4(r21)
+ 15: GETL R21, t12
+ 16: ADDL $0x4, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R9
+ 19: INCEIPL $4
+
+ 0x25478388: 56EB2376 rlwinm r11,r23,4,13,27
+ 20: GETL R23, t16
+ 21: ROLL $0x4, t16
+ 22: ANDL $0x7FFF0, t16
+ 23: PUTL t16, R11
+ 24: INCEIPL $4
+
+ 0x2547838C: 7D8B5214 add r12,r11,r10
+ 25: GETL R11, t18
+ 26: GETL R10, t20
+ 27: ADDL t18, t20
+ 28: PUTL t20, R12
+ 29: INCEIPL $4
+
+ 0x25478390: 832C0004 lwz r25,4(r12)
+ 30: GETL R12, t22
+ 31: ADDL $0x4, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R25
+ 34: INCEIPL $4
+
+ 0x25478394: 7C994800 cmp cr1,r25,r9
+ 35: GETL R25, t26
+ 36: GETL R9, t28
+ 37: CMPL t26, t28, t30 (-rSo)
+ 38: ICRFL t30, $0x1, CR
+ 39: INCEIPL $4
+
+ 0x25478398: 418600F0 bc 12,6,0x25478488
+ 40: Js06o $0x25478488
+
+
+. 0 25478378 36
+. 57 F9 08 3C 81 5C 01 88 7E F9 B2 2E 81 35 00 04 56 EB 23 76 7D 8B 52 14 83 2C 00 04 7C 99 48 00 41 86 00 F0
+
+==== BB 1082 (0x25478488) approx BBs exec'd 0 ====
+
+ 0x25478488: 7C6B502E lwzx r3,r11,r10
+ 0: GETL R10, t0
+ 1: GETL R11, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R3
+ 5: INCEIPL $4
+
+ 0x2547848C: 80950000 lwz r4,0(r21)
+ 6: GETL R21, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R4
+ 9: INCEIPL $4
+
+ 0x25478490: 4800AA51 bl 0x25482EE0
+ 10: MOVL $0x25478494, t10
+ 11: PUTL t10, LR
+ 12: JMPo-c $0x25482EE0 ($4)
+
+
+. 0 25478488 12
+. 7C 6B 50 2E 80 95 00 00 48 00 AA 51
+
+==== BB 1083 (0x25478494) approx BBs exec'd 0 ====
+
+ 0x25478494: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25478498: 409AFF04 bc 4,26,0x2547839C
+ 4: Jc26o $0x2547839C
+
+
+. 0 25478494 8
+. 2F 03 00 00 40 9A FF 04
+
+==== BB 1084 (0x2547849C) approx BBs exec'd 0 ====
+
+ 0x2547849C: 4BFFFF1C b 0x254783B8
+ 0: JMPo $0x254783B8 ($4)
+
+
+. 0 2547849C 4
+. 4B FF FF 1C
+
+==== BB 1085 (0x254783B8) approx BBs exec'd 0 ====
+
+ 0x254783B8: 5760E13E rlwinm r0,r27,28,4,31
+ 0: GETL R27, t0
+ 1: SHRL $0x4, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x254783BC: 2F800001 cmpi cr7,r0,1
+ 4: GETL R0, t2
+ 5: MOVL $0x1, t6
+ 6: CMPL t2, t6, t4 (-rSo)
+ 7: ICRFL t4, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x254783C0: 419E017C bc 12,30,0x2547853C
+ 9: Js30o $0x2547853C
+
+
+. 0 254783B8 12
+. 57 60 E1 3E 2F 80 00 01 41 9E 01 7C
+
+==== BB 1086 (0x2547853C) approx BBs exec'd 0 ====
+
+ 0x2547853C: 81C10010 lwz r14,16(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R14
+ 4: INCEIPL $4
+
+ 0x25478540: 38600001 li r3,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25478544: 938E0004 stw r28,4(r14)
+ 8: GETL R28, t6
+ 9: GETL R14, t8
+ 10: ADDL $0x4, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25478548: 93AE0000 stw r29,0(r14)
+ 13: GETL R29, t10
+ 14: GETL R14, t12
+ 15: STL t10, (t12)
+ 16: INCEIPL $4
+
+ 0x2547854C: 4BFFFEDC b 0x25478428
+ 17: JMPo $0x25478428 ($4)
+
+
+. 0 2547853C 20
+. 81 C1 00 10 38 60 00 01 93 8E 00 04 93 AE 00 00 4B FF FE DC
+
+==== BB 1087 (0x25478428) approx BBs exec'd 0 ====
+
+ 0x25478428: 81E10074 lwz r15,116(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x74, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R15
+ 4: INCEIPL $4
+
+ 0x2547842C: 81810024 lwz r12,36(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x24, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25478430: 7DE803A6 mtlr r15
+ 10: GETL R15, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0x25478434: 81C10028 lwz r14,40(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x28, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R14
+ 17: INCEIPL $4
+
+ 0x25478438: 81E1002C lwz r15,44(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x2C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R15
+ 22: INCEIPL $4
+
+ 0x2547843C: 7D818120 mtcrf 0x18,r12
+ 23: GETL R12, t18
+ 24: ICRFL t18, $0x3, CR
+ 25: ICRFL t18, $0x4, CR
+ 26: INCEIPL $4
+
+ 0x25478440: 82010030 lwz r16,48(r1)
+ 27: GETL R1, t20
+ 28: ADDL $0x30, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R16
+ 31: INCEIPL $4
+
+ 0x25478444: 82210034 lwz r17,52(r1)
+ 32: GETL R1, t24
+ 33: ADDL $0x34, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R17
+ 36: INCEIPL $4
+
+ 0x25478448: 82410038 lwz r18,56(r1)
+ 37: GETL R1, t28
+ 38: ADDL $0x38, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R18
+ 41: INCEIPL $4
+
+ 0x2547844C: 8261003C lwz r19,60(r1)
+ 42: GETL R1, t32
+ 43: ADDL $0x3C, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R19
+ 46: INCEIPL $4
+
+ 0x25478450: 82810040 lwz r20,64(r1)
+ 47: GETL R1, t36
+ 48: ADDL $0x40, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R20
+ 51: INCEIPL $4
+
+ 0x25478454: 82A10044 lwz r21,68(r1)
+ 52: GETL R1, t40
+ 53: ADDL $0x44, t40
+ 54: LDL (t40), t42
+ 55: PUTL t42, R21
+ 56: INCEIPL $4
+
+ 0x25478458: 82C10048 lwz r22,72(r1)
+ 57: GETL R1, t44
+ 58: ADDL $0x48, t44
+ 59: LDL (t44), t46
+ 60: PUTL t46, R22
+ 61: INCEIPL $4
+
+ 0x2547845C: 82E1004C lwz r23,76(r1)
+ 62: GETL R1, t48
+ 63: ADDL $0x4C, t48
+ 64: LDL (t48), t50
+ 65: PUTL t50, R23
+ 66: INCEIPL $4
+
+ 0x25478460: 83010050 lwz r24,80(r1)
+ 67: GETL R1, t52
+ 68: ADDL $0x50, t52
+ 69: LDL (t52), t54
+ 70: PUTL t54, R24
+ 71: INCEIPL $4
+
+ 0x25478464: 83210054 lwz r25,84(r1)
+ 72: GETL R1, t56
+ 73: ADDL $0x54, t56
+ 74: LDL (t56), t58
+ 75: PUTL t58, R25
+ 76: INCEIPL $4
+
+ 0x25478468: 83410058 lwz r26,88(r1)
+ 77: GETL R1, t60
+ 78: ADDL $0x58, t60
+ 79: LDL (t60), t62
+ 80: PUTL t62, R26
+ 81: INCEIPL $4
+
+ 0x2547846C: 8361005C lwz r27,92(r1)
+ 82: GETL R1, t64
+ 83: ADDL $0x5C, t64
+ 84: LDL (t64), t66
+ 85: PUTL t66, R27
+ 86: INCEIPL $4
+
+ 0x25478470: 83810060 lwz r28,96(r1)
+ 87: GETL R1, t68
+ 88: ADDL $0x60, t68
+ 89: LDL (t68), t70
+ 90: PUTL t70, R28
+ 91: INCEIPL $4
+
+ 0x25478474: 83A10064 lwz r29,100(r1)
+ 92: GETL R1, t72
+ 93: ADDL $0x64, t72
+ 94: LDL (t72), t74
+ 95: PUTL t74, R29
+ 96: INCEIPL $4
+
+ 0x25478478: 83C10068 lwz r30,104(r1)
+ 97: GETL R1, t76
+ 98: ADDL $0x68, t76
+ 99: LDL (t76), t78
+ 100: PUTL t78, R30
+ 101: INCEIPL $4
+
+ 0x2547847C: 83E1006C lwz r31,108(r1)
+ 102: GETL R1, t80
+ 103: ADDL $0x6C, t80
+ 104: LDL (t80), t82
+ 105: PUTL t82, R31
+ 106: INCEIPL $4
+
+ 0x25478480: 38210070 addi r1,r1,112
+ 107: GETL R1, t84
+ 108: ADDL $0x70, t84
+ 109: PUTL t84, R1
+ 110: INCEIPL $4
+
+ 0x25478484: 4E800020 blr
+ 111: GETL LR, t86
+ 112: JMPo-r t86 ($4)
+
+
+. 0 25478428 96
+. 81 E1 00 74 81 81 00 24 7D E8 03 A6 81 C1 00 28 81 E1 00 2C 7D 81 81 20 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
+
+==== BB 1088 (0x254786B0) approx BBs exec'd 0 ====
+
+ 0x254786B0: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x254786B4: 39000000 li r8,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R8
+ 6: INCEIPL $4
+
+ 0x254786B8: 41810014 bc 12,1,0x254786CC
+ 7: Js01o $0x254786CC
+
+
+. 0 254786B0 12
+. 2C 03 00 00 39 00 00 00 41 81 00 14
+
+==== BB 1089 (0x254786CC) approx BBs exec'd 0 ====
+
+ 0x254786CC: 815F0048 lwz r10,72(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x254786D0: 2F8A0000 cmpi cr7,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x254786D4: 419E0504 bc 12,30,0x25478BD8
+ 9: Js30o $0x25478BD8
+
+
+. 0 254786CC 12
+. 81 5F 00 48 2F 8A 00 00 41 9E 05 04
+
+==== BB 1090 (0x254786D8) approx BBs exec'd 0 ====
+
+ 0x254786D8: 80B60000 lwz r5,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0x254786DC: 2F850000 cmpi cr7,r5,0
+ 4: GETL R5, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0x254786E0: 419E0140 bc 12,30,0x25478820
+ 8: Js30o $0x25478820
+
+
+. 0 254786D8 12
+. 80 B6 00 00 2F 85 00 00 41 9E 01 40
+
+==== BB 1091 (0x254786E4) approx BBs exec'd 0 ====
+
+ 0x254786E4: 88E5000D lbz r7,13(r5)
+ 0: GETL R5, t0
+ 1: ADDL $0xD, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R7
+ 4: INCEIPL $4
+
+ 0x254786E8: 39200000 li r9,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x254786EC: 2E090000 cmpi cr4,r9,0
+ 8: GETL R9, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x4, CR
+ 11: INCEIPL $4
+
+ 0x254786F0: 54E607BE rlwinm r6,r7,0,30,31
+ 12: GETL R7, t10
+ 13: ANDL $0x3, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x254786F4: 2F060003 cmpi cr6,r6,3
+ 16: GETL R6, t12
+ 17: MOVL $0x3, t16
+ 18: CMPL t12, t16, t14 (-rSo)
+ 19: ICRFL t14, $0x6, CR
+ 20: INCEIPL $4
+
+ 0x254786F8: 419A0234 bc 12,26,0x2547892C
+ 21: Js26o $0x2547892C
+
+
+. 0 254786E4 24
+. 88 E5 00 0D 39 20 00 00 2E 09 00 00 54 E6 07 BE 2F 06 00 03 41 9A 02 34
+
+==== BB 1092 (0x254786FC) approx BBs exec'd 0 ====
+
+ 0x254786FC: 3B7F0048 addi r27,r31,72
+ 0: GETL R31, t0
+ 1: ADDL $0x48, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25478700: 839B0004 lwz r28,4(r27)
+ 4: GETL R27, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R28
+ 8: INCEIPL $4
+
+ 0x25478704: 3D808000 lis r12,-32768
+ 9: MOVL $0x80000000, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x25478708: 801C0180 lwz r0,384(r28)
+ 12: GETL R28, t8
+ 13: ADDL $0x180, t8
+ 14: LDL (t8), t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0x2547870C: 541D0002 rlwinm r29,r0,0,0,1
+ 17: GETL R0, t12
+ 18: ANDL $0xC0000000, t12
+ 19: PUTL t12, R29
+ 20: INCEIPL $4
+
+ 0x25478710: 7F1D6000 cmp cr6,r29,r12
+ 21: GETL R29, t14
+ 22: GETL R12, t16
+ 23: CMPL t14, t16, t18 (-rSo)
+ 24: ICRFL t18, $0x6, CR
+ 25: INCEIPL $4
+
+ 0x25478714: 419A05BC bc 12,26,0x25478CD0
+ 26: Js26o $0x25478CD0
+
+
+. 0 254786FC 28
+. 3B 7F 00 48 83 9B 00 04 3D 80 80 00 80 1C 01 80 54 1D 00 02 7F 1D 60 00 41 9A 05 BC
+
+==== BB 1093 (0x25478718) approx BBs exec'd 0 ====
+
+ 0x25478718: 82BB0004 lwz r21,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x2547871C: 83BE04F4 lwz r29,1268(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x4F4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x25478720: 83550180 lwz r26,384(r21)
+ 10: GETL R21, t8
+ 11: ADDL $0x180, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R26
+ 14: INCEIPL $4
+
+ 0x25478724: 67570010 oris r23,r26,0x10
+ 15: GETL R26, t12
+ 16: ORL $0x100000, t12
+ 17: PUTL t12, R23
+ 18: INCEIPL $4
+
+ 0x25478728: 92F50180 stw r23,384(r21)
+ 19: GETL R23, t14
+ 20: GETL R21, t16
+ 21: ADDL $0x180, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x2547872C: 801D0000 lwz r0,0(r29)
+ 24: GETL R29, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R0
+ 27: INCEIPL $4
+
+ 0x25478730: 70090404 andi. r9,r0,0x404
+ 28: GETL R0, t22
+ 29: ANDL $0x404, t22
+ 30: PUTL t22, R9
+ 31: CMP0L t22, t24 (-rSo)
+ 32: ICRFL t24, $0x0, CR
+ 33: INCEIPL $4
+
+ 0x25478734: 408202A0 bc 4,2,0x254789D4
+ 34: Jc02o $0x254789D4
+
+
+. 0 25478718 32
+. 82 BB 00 04 83 BE 04 F4 83 55 01 80 67 57 00 10 92 F5 01 80 80 1D 00 00 70 09 04 04 40 82 02 A0
+
+==== BB 1094 (0x25478738) approx BBs exec'd 0 ====
+
+ 0x25478738: 807B0004 lwz r3,4(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x2547873C: 801F0048 lwz r0,72(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x48, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R0
+ 9: INCEIPL $4
+
+ 0x25478740: 90160000 stw r0,0(r22)
+ 10: GETL R0, t8
+ 11: GETL R22, t10
+ 12: STL t8, (t10)
+ 13: INCEIPL $4
+
+ 0x25478744: 80E10000 lwz r7,0(r1)
+ 14: GETL R1, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R7
+ 17: INCEIPL $4
+
+ 0x25478748: 82C70004 lwz r22,4(r7)
+ 18: GETL R7, t16
+ 19: ADDL $0x4, t16
+ 20: LDL (t16), t18
+ 21: PUTL t18, R22
+ 22: INCEIPL $4
+
+ 0x2547874C: 8107FFC0 lwz r8,-64(r7)
+ 23: GETL R7, t20
+ 24: ADDL $0xFFFFFFC0, t20
+ 25: LDL (t20), t22
+ 26: PUTL t22, R8
+ 27: INCEIPL $4
+
+ 0x25478750: 7EC803A6 mtlr r22
+ 28: GETL R22, t24
+ 29: PUTL t24, LR
+ 30: INCEIPL $4
+
+ 0x25478754: 8227FFC4 lwz r17,-60(r7)
+ 31: GETL R7, t26
+ 32: ADDL $0xFFFFFFC4, t26
+ 33: LDL (t26), t28
+ 34: PUTL t28, R17
+ 35: INCEIPL $4
+
+ 0x25478758: 8247FFC8 lwz r18,-56(r7)
+ 36: GETL R7, t30
+ 37: ADDL $0xFFFFFFC8, t30
+ 38: LDL (t30), t32
+ 39: PUTL t32, R18
+ 40: INCEIPL $4
+
+ 0x2547875C: 7D008120 mtcrf 0x8,r8
+ 41: GETL R8, t34
+ 42: ICRFL t34, $0x4, CR
+ 43: INCEIPL $4
+
+ 0x25478760: 8267FFCC lwz r19,-52(r7)
+ 44: GETL R7, t36
+ 45: ADDL $0xFFFFFFCC, t36
+ 46: LDL (t36), t38
+ 47: PUTL t38, R19
+ 48: INCEIPL $4
+
+ 0x25478764: 8287FFD0 lwz r20,-48(r7)
+ 49: GETL R7, t40
+ 50: ADDL $0xFFFFFFD0, t40
+ 51: LDL (t40), t42
+ 52: PUTL t42, R20
+ 53: INCEIPL $4
+
+ 0x25478768: 82A7FFD4 lwz r21,-44(r7)
+ 54: GETL R7, t44
+ 55: ADDL $0xFFFFFFD4, t44
+ 56: LDL (t44), t46
+ 57: PUTL t46, R21
+ 58: INCEIPL $4
+
+ 0x2547876C: 82C7FFD8 lwz r22,-40(r7)
+ 59: GETL R7, t48
+ 60: ADDL $0xFFFFFFD8, t48
+ 61: LDL (t48), t50
+ 62: PUTL t50, R22
+ 63: INCEIPL $4
+
+ 0x25478770: 82E7FFDC lwz r23,-36(r7)
+ 64: GETL R7, t52
+ 65: ADDL $0xFFFFFFDC, t52
+ 66: LDL (t52), t54
+ 67: PUTL t54, R23
+ 68: INCEIPL $4
+
+ 0x25478774: 8307FFE0 lwz r24,-32(r7)
+ 69: GETL R7, t56
+ 70: ADDL $0xFFFFFFE0, t56
+ 71: LDL (t56), t58
+ 72: PUTL t58, R24
+ 73: INCEIPL $4
+
+ 0x25478778: 8327FFE4 lwz r25,-28(r7)
+ 74: GETL R7, t60
+ 75: ADDL $0xFFFFFFE4, t60
+ 76: LDL (t60), t62
+ 77: PUTL t62, R25
+ 78: INCEIPL $4
+
+ 0x2547877C: 8347FFE8 lwz r26,-24(r7)
+ 79: GETL R7, t64
+ 80: ADDL $0xFFFFFFE8, t64
+ 81: LDL (t64), t66
+ 82: PUTL t66, R26
+ 83: INCEIPL $4
+
+ 0x25478780: 8367FFEC lwz r27,-20(r7)
+ 84: GETL R7, t68
+ 85: ADDL $0xFFFFFFEC, t68
+ 86: LDL (t68), t70
+ 87: PUTL t70, R27
+ 88: INCEIPL $4
+
+ 0x25478784: 8387FFF0 lwz r28,-16(r7)
+ 89: GETL R7, t72
+ 90: ADDL $0xFFFFFFF0, t72
+ 91: LDL (t72), t74
+ 92: PUTL t74, R28
+ 93: INCEIPL $4
+
+ 0x25478788: 83A7FFF4 lwz r29,-12(r7)
+ 94: GETL R7, t76
+ 95: ADDL $0xFFFFFFF4, t76
+ 96: LDL (t76), t78
+ 97: PUTL t78, R29
+ 98: INCEIPL $4
+
+ 0x2547878C: 83C7FFF8 lwz r30,-8(r7)
+ 99: GETL R7, t80
+ 100: ADDL $0xFFFFFFF8, t80
+ 101: LDL (t80), t82
+ 102: PUTL t82, R30
+ 103: INCEIPL $4
+
+ 0x25478790: 83E7FFFC lwz r31,-4(r7)
+ 104: GETL R7, t84
+ 105: ADDL $0xFFFFFFFC, t84
+ 106: LDL (t84), t86
+ 107: PUTL t86, R31
+ 108: INCEIPL $4
+
+ 0x25478794: 7CE13B78 or r1,r7,r7
+ 109: GETL R7, t88
+ 110: PUTL t88, R1
+ 111: INCEIPL $4
+
+ 0x25478798: 4E800020 blr
+ 112: GETL LR, t90
+ 113: JMPo-r t90 ($4)
+
+
+. 0 25478738 100
+. 80 7B 00 04 80 1F 00 48 90 16 00 00 80 E1 00 00 82 C7 00 04 81 07 FF C0 7E C8 03 A6 82 27 FF C4 82 47 FF C8 7D 00 81 20 82 67 FF CC 82 87 FF D0 82 A7 FF D4 82 C7 FF D8 82 E7 FF DC 83 07 FF E0 83 27 FF E4 83 47 FF E8 83 67 FF EC 83 87 FF F0 83 A7 FF F4 83 C7 FF F8 83 E7 FF FC 7C E1 3B 78 4E 80 00 20
+
+==== BB 1095 (0x2547995C) approx BBs exec'd 0 ====
+
+ 0x2547995C: 811F0050 lwz r8,80(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25479960: 809F000C lwz r4,12(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R4
+ 9: INCEIPL $4
+
+ 0x25479964: 7C7A1B78 or r26,r3,r3
+ 10: GETL R3, t8
+ 11: PUTL t8, R26
+ 12: INCEIPL $4
+
+ 0x25479968: 7D064378 or r6,r8,r8
+ 13: GETL R8, t10
+ 14: PUTL t10, R6
+ 15: INCEIPL $4
+
+ 0x2547996C: 90640210 stw r3,528(r4)
+ 16: GETL R3, t12
+ 17: GETL R4, t14
+ 18: ADDL $0x210, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x25479970: 91040214 stw r8,532(r4)
+ 21: GETL R8, t16
+ 22: GETL R4, t18
+ 23: ADDL $0x214, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x25479974: 2F060000 cmpi cr6,r6,0
+ 26: GETL R6, t20
+ 27: CMP0L t20, t22 (-rSo)
+ 28: ICRFL t22, $0x6, CR
+ 29: INCEIPL $4
+
+ 0x25479978: 39200000 li r9,0
+ 30: MOVL $0x0, t24
+ 31: PUTL t24, R9
+ 32: INCEIPL $4
+
+ 0x2547997C: 419A0010 bc 12,26,0x2547998C
+ 33: Js26o $0x2547998C
+
+
+. 0 2547995C 36
+. 81 1F 00 50 80 9F 00 0C 7C 7A 1B 78 7D 06 43 78 90 64 02 10 91 04 02 14 2F 06 00 00 39 20 00 00 41 9A 00 10
+
+==== BB 1096 (0x25479980) approx BBs exec'd 0 ====
+
+ 0x25479980: 80FA0000 lwz r7,0(r26)
+ 0: GETL R26, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R7
+ 3: INCEIPL $4
+
+ 0x25479984: 81660004 lwz r11,4(r6)
+ 4: GETL R6, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R11
+ 8: INCEIPL $4
+
+ 0x25479988: 7D275A14 add r9,r7,r11
+ 9: GETL R7, t8
+ 10: GETL R11, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0x2547998C: 2F9D0044 cmpi cr7,r29,68
+ 14: GETL R29, t12
+ 15: MOVL $0x44, t16
+ 16: CMPL t12, t16, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x25479990: 801C0008 lwz r0,8(r28)
+ 19: GETL R28, t18
+ 20: ADDL $0x8, t18
+ 21: LDL (t18), t20
+ 22: PUTL t20, R0
+ 23: INCEIPL $4
+
+ 0x25479994: 7D290214 add r9,r9,r0
+ 24: GETL R9, t22
+ 25: GETL R0, t24
+ 26: ADDL t22, t24
+ 27: PUTL t24, R9
+ 28: INCEIPL $4
+
+ 0x25479998: 419E0100 bc 12,30,0x25479A98
+ 29: Js30o $0x25479A98
+
+
+. 0 25479980 28
+. 80 FA 00 00 81 66 00 04 7D 27 5A 14 2F 9D 00 44 80 1C 00 08 7D 29 02 14 41 9E 01 00
+
+==== BB 1097 (0x2547999C) approx BBs exec'd 0 ====
+
+ 0x2547999C: 419D00D0 bc 12,29,0x25479A6C
+ 0: Js29o $0x25479A6C
+
+
+. 0 2547999C 4
+. 41 9D 00 D0
+
+==== BB 1098 (0x254799A0) approx BBs exec'd 0 ====
+
+ 0x254799A0: 2F9D0001 cmpi cr7,r29,1
+ 0: GETL R29, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x254799A4: 419E00EC bc 12,30,0x25479A90
+ 5: Js30o $0x25479A90
+
+
+. 0 254799A0 8
+. 2F 9D 00 01 41 9E 00 EC
+
+==== BB 1099 (0x25479A90) approx BBs exec'd 0 ====
+
+ 0x25479A90: 91370000 stw r9,0(r23)
+ 0: GETL R9, t0
+ 1: GETL R23, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25479A94: 4BFFFF38 b 0x254799CC
+ 4: JMPo $0x254799CC ($4)
+
+
+. 0 25479A90 8
+. 91 37 00 00 4B FF FF 38
+
+==== BB 1100 (0x254799CC) approx BBs exec'd 0 ====
+
+ 0x254799CC: 3B9C000C addi r28,r28,12
+ 0: GETL R28, t0
+ 1: ADDL $0xC, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0x254799D0: 7E1CC040 cmpl cr4,r28,r24
+ 4: GETL R28, t2
+ 5: GETL R24, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x254799D4: 4190FE68 bc 12,16,0x2547983C
+ 9: Js16o $0x2547983C
+
+
+. 0 254799CC 12
+. 3B 9C 00 0C 7E 1C C0 40 41 90 FE 68
+
+==== BB 1101 (0x254787E4) approx BBs exec'd 0 ====
+
+ 0x254787E4: 89690001 lbz r11,1(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x1, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254787E8: 57862036 rlwinm r6,r28,4,0,27
+ 5: GETL R28, t4
+ 6: SHLL $0x4, t4
+ 7: PUTL t4, R6
+ 8: INCEIPL $4
+
+ 0x254787EC: 7F865214 add r28,r6,r10
+ 9: GETL R6, t6
+ 10: GETL R10, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R28
+ 13: INCEIPL $4
+
+ 0x254787F0: 39490001 addi r10,r9,1
+ 14: GETL R9, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R10
+ 17: INCEIPL $4
+
+ 0x254787F4: 2F8B0000 cmpi cr7,r11,0
+ 18: GETL R11, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x7, CR
+ 21: INCEIPL $4
+
+ 0x254787F8: 41BEFE4C bc 13,30,0x25478644
+ 22: Js30o $0x25478644
+
+
+. 0 254787E4 24
+. 89 69 00 01 57 86 20 36 7F 86 52 14 39 49 00 01 2F 8B 00 00 41 BE FE 4C
+
+==== BB 1102 (0x254787FC) approx BBs exec'd 0 ====
+
+ 0x254787FC: 57922036 rlwinm r18,r28,4,0,27
+ 0: GETL R28, t0
+ 1: SHLL $0x4, t0
+ 2: PUTL t0, R18
+ 3: INCEIPL $4
+
+ 0x25478800: 7E325A14 add r17,r18,r11
+ 4: GETL R18, t2
+ 5: GETL R11, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R17
+ 8: INCEIPL $4
+
+ 0x25478804: 8D6A0001 lbzu r11,1(r10)
+ 9: GETL R10, t6
+ 10: ADDL $0x1, t6
+ 11: PUTL t6, R10
+ 12: LDB (t6), t8
+ 13: PUTL t8, R11
+ 14: INCEIPL $4
+
+ 0x25478808: 56280006 rlwinm r8,r17,0,0,3
+ 15: GETL R17, t10
+ 16: ANDL $0xF0000000, t10
+ 17: PUTL t10, R8
+ 18: INCEIPL $4
+
+ 0x2547880C: 2F8B0000 cmpi cr7,r11,0
+ 19: GETL R11, t12
+ 20: CMP0L t12, t14 (-rSo)
+ 21: ICRFL t14, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x25478810: 7E274278 xor r7,r17,r8
+ 23: GETL R17, t16
+ 24: GETL R8, t18
+ 25: XORL t16, t18
+ 26: PUTL t18, R7
+ 27: INCEIPL $4
+
+ 0x25478814: 5509463E rlwinm r9,r8,8,24,31
+ 28: GETL R8, t20
+ 29: SHRL $0x18, t20
+ 30: PUTL t20, R9
+ 31: INCEIPL $4
+
+ 0x25478818: 7CFC4A78 xor r28,r7,r9
+ 32: GETL R7, t22
+ 33: GETL R9, t24
+ 34: XORL t22, t24
+ 35: PUTL t24, R28
+ 36: INCEIPL $4
+
+ 0x2547881C: 4BFFFFDC b 0x254787F8
+ 37: JMPo $0x254787F8 ($4)
+
+
+. 0 254787FC 36
+. 57 92 20 36 7E 32 5A 14 8D 6A 00 01 56 28 00 06 2F 8B 00 00 7E 27 42 78 55 09 46 3E 7C FC 4A 78 4B FF FF DC
+
+==== BB 1103 (0x254787F8) approx BBs exec'd 0 ====
+
+ 0x254787F8: 41BEFE4C bc 13,30,0x25478644
+ 0: Js30o $0x25478644
+
+
+. 0 254787F8 4
+. 41 BE FE 4C
+
+==== BB 1104 (0x25478324) approx BBs exec'd 0 ====
+
+ 0x25478324: 8101007C lwz r8,124(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x7C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25478328: 71000001 andi. r0,r8,0x1
+ 5: GETL R8, t4
+ 6: ANDL $0x1, t4
+ 7: PUTL t4, R0
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x2547832C: 40A2FFC4 bc 5,2,0x254782F0
+ 11: Jc02o $0x254782F0
+
+
+. 0 25478324 12
+. 81 01 00 7C 71 00 00 01 40 A2 FF C4
+
+==== BB 1105 (0x254782E0) approx BBs exec'd 0 ====
+
+ 0x254782E0: 88DD000C lbz r6,12(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254782E4: 54C5073E rlwinm r5,r6,0,28,31
+ 5: GETL R6, t4
+ 6: ANDL $0xF, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x254782E8: 2F050006 cmpi cr6,r5,6
+ 9: GETL R5, t6
+ 10: MOVL $0x6, t10
+ 11: CMPL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x6, CR
+ 13: INCEIPL $4
+
+ 0x254782EC: 419A002C bc 12,26,0x25478318
+ 14: Js26o $0x25478318
+
+
+. 0 254782E0 16
+. 88 DD 00 0C 54 C5 07 3E 2F 05 00 06 41 9A 00 2C
+
+==== BB 1106 (0x25479EE4) approx BBs exec'd 0 ====
+
+ 0x25479EE4: 7D200026 mfcr r9
+ 0: GETL CR, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x25479EE8: 55299FFE rlwinm r9,r9,19,31,31
+ 3: GETL R9, t2
+ 4: ROLL $0x13, t2
+ 5: ANDL $0x1, t2
+ 6: PUTL t2, R9
+ 7: INCEIPL $4
+
+ 0x25479EEC: 39600000 li r11,0
+ 8: MOVL $0x0, t4
+ 9: PUTL t4, R11
+ 10: INCEIPL $4
+
+ 0x25479EF0: 7CA00026 mfcr r5
+ 11: GETL CR, t6
+ 12: PUTL t6, R5
+ 13: INCEIPL $4
+
+ 0x25479EF4: 54A53FFE rlwinm r5,r5,7,31,31
+ 14: GETL R5, t8
+ 15: ROLL $0x7, t8
+ 16: ANDL $0x1, t8
+ 17: PUTL t8, R5
+ 18: INCEIPL $4
+
+ 0x25479EF8: 7D282B79 or. r8,r9,r5
+ 19: GETL R9, t10
+ 20: GETL R5, t12
+ 21: ORL t12, t10
+ 22: PUTL t10, R8
+ 23: CMP0L t10, t14 (-rSo)
+ 24: ICRFL t14, $0x0, CR
+ 25: INCEIPL $4
+
+ 0x25479EFC: 40820058 bc 4,2,0x25479F54
+ 26: Jc02o $0x25479F54
+
+
+. 0 25479EE4 28
+. 7D 20 00 26 55 29 9F FE 39 60 00 00 7C A0 00 26 54 A5 3F FE 7D 28 2B 79 40 82 00 58
+
+==== BB 1107 (0x25479F00) approx BBs exec'd 0 ====
+
+ 0x25479F00: 381DFFBC addi r0,r29,-68
+ 0: GETL R29, t0
+ 1: ADDL $0xFFFFFFBC, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x25479F04: 6BA30002 xori r3,r29,0x2
+ 4: GETL R29, t2
+ 5: XORL $0x2, t2
+ 6: PUTL t2, R3
+ 7: INCEIPL $4
+
+ 0x25479F08: 21030000 subfic r8,r3,0
+ 8: GETL R3, t4
+ 9: MOVL $0x0, t6
+ 10: SBBL t4, t6 (-wCa)
+ 11: PUTL t6, R8
+ 12: INCEIPL $4
+
+ 0x25479F0C: 7C681914 adde r3,r8,r3
+ 13: GETL R8, t8
+ 14: GETL R3, t10
+ 15: ADCL t8, t10 (-rCa-wCa)
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0x25479F10: 2180000A subfic r12,r0,10
+ 18: GETL R0, t12
+ 19: MOVL $0xA, t14
+ 20: SBBL t12, t14 (-wCa)
+ 21: PUTL t14, R12
+ 22: INCEIPL $4
+
+ 0x25479F14: 39800000 li r12,0
+ 23: MOVL $0x0, t16
+ 24: PUTL t16, R12
+ 25: INCEIPL $4
+
+ 0x25479F18: 7D8C6114 adde r12,r12,r12
+ 26: GETL R12, t18
+ 27: GETL R12, t20
+ 28: ADCL t18, t20 (-rCa-wCa)
+ 29: PUTL t20, R12
+ 30: INCEIPL $4
+
+ 0x25479F1C: 7D881B79 or. r8,r12,r3
+ 31: GETL R12, t22
+ 32: GETL R3, t24
+ 33: ORL t24, t22
+ 34: PUTL t22, R8
+ 35: CMP0L t22, t26 (-rSo)
+ 36: ICRFL t26, $0x0, CR
+ 37: INCEIPL $4
+
+ 0x25479F20: 40820034 bc 4,2,0x25479F54
+ 38: Jc02o $0x25479F54
+
+
+. 0 25479F00 36
+. 38 1D FF BC 6B A3 00 02 21 03 00 00 7C 68 19 14 21 80 00 0A 39 80 00 00 7D 8C 61 14 7D 88 1B 79 40 82 00 34
+
+==== BB 1108 (0x25479F24) approx BBs exec'd 0 ====
+
+ 0x25479F24: 2F1D0013 cmpi cr6,r29,19
+ 0: GETL R29, t0
+ 1: MOVL $0x13, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x25479F28: 8124020C lwz r9,524(r4)
+ 5: GETL R4, t6
+ 6: ADDL $0x20C, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R9
+ 9: INCEIPL $4
+
+ 0x25479F2C: 419A00B4 bc 12,26,0x25479FE0
+ 10: Js26o $0x25479FE0
+
+
+. 0 25479F24 12
+. 2F 1D 00 13 81 24 02 0C 41 9A 00 B4
+
+==== BB 1109 (0x25479F30) approx BBs exec'd 0 ====
+
+ 0x25479F30: 7F8B4800 cmp cr7,r11,r9
+ 0: GETL R11, t0
+ 1: GETL R9, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25479F34: 409EF988 bc 4,30,0x254798BC
+ 5: Jc30o $0x254798BC
+
+
+. 0 25479F30 8
+. 7F 8B 48 00 40 9E F9 88
+
+==== BB 1110 (0x25479F38) approx BBs exec'd 0 ====
+
+ 0x25479F38: 817001AC lwz r11,428(r16)
+ 0: GETL R16, t0
+ 1: ADDL $0x1AC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25479F3C: 80C40214 lwz r6,532(r4)
+ 5: GETL R4, t4
+ 6: ADDL $0x214, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x25479F40: 83440210 lwz r26,528(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0x210, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R26
+ 14: INCEIPL $4
+
+ 0x25479F44: 394B0001 addi r10,r11,1
+ 15: GETL R11, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x25479F48: 915001AC stw r10,428(r16)
+ 19: GETL R10, t14
+ 20: GETL R16, t16
+ 21: ADDL $0x1AC, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x25479F4C: 90DF0050 stw r6,80(r31)
+ 24: GETL R6, t18
+ 25: GETL R31, t20
+ 26: ADDL $0x50, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x25479F50: 4BFFFA24 b 0x25479974
+ 29: JMPo $0x25479974 ($4)
+
+
+. 0 25479F38 28
+. 81 70 01 AC 80 C4 02 14 83 44 02 10 39 4B 00 01 91 50 01 AC 90 DF 00 50 4B FF FA 24
+
+==== BB 1111 (0x25479974) approx BBs exec'd 0 ====
+
+ 0x25479974: 2F060000 cmpi cr6,r6,0
+ 0: GETL R6, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25479978: 39200000 li r9,0
+ 4: MOVL $0x0, t4
+ 5: PUTL t4, R9
+ 6: INCEIPL $4
+
+ 0x2547997C: 419A0010 bc 12,26,0x2547998C
+ 7: Js26o $0x2547998C
+
+
+. 0 25479974 12
+. 2F 06 00 00 39 20 00 00 41 9A 00 10
+
+==== BB 1112 (0x254799A8) approx BBs exec'd 0 ====
+
+ 0x254799A8: 2C1D0014 cmpi cr0,r29,20
+ 0: GETL R29, t0
+ 1: MOVL $0x14, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254799AC: 418200E4 bc 12,2,0x25479A90
+ 5: Js02o $0x25479A90
+
+
+. 0 254799A8 8
+. 2C 1D 00 14 41 82 00 E4
+
+==== BB 1113 (0x25479EBC) approx BBs exec'd 0 ====
+
+ 0x25479EBC: A11B000E lhz r8,14(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xE, t0
+ 2: LDW (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x25479EC0: 2F880000 cmpi cr7,r8,0
+ 5: GETL R8, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25479EC4: 41BEF9D0 bc 13,30,0x25479894
+ 9: Js30o $0x25479894
+
+
+. 0 25479EBC 12
+. A1 1B 00 0E 2F 88 00 00 41 BE F9 D0
+
+==== BB 1114 (0x25479A50) approx BBs exec'd 0 ====
+
+ 0x25479A50: 835F000C lwz r26,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25479A54: 4BFFFF20 b 0x25479974
+ 5: JMPo $0x25479974 ($4)
+
+
+. 0 25479A50 8
+. 83 5F 00 0C 4B FF FF 20
+
+==== BB 1115 (0x25479A98) approx BBs exec'd 0 ====
+
+ 0x25479A98: 2F1A0000 cmpi cr6,r26,0
+ 0: GETL R26, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x25479A9C: 41BAFF30 bc 13,26,0x254799CC
+ 4: Js26o $0x254799CC
+
+
+. 0 25479A98 8
+. 2F 1A 00 00 41 BA FF 30
+
+==== BB 1116 (0x25479AA0) approx BBs exec'd 0 ====
+
+ 0x25479AA0: 837A0230 lwz r27,560(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x230, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x25479AA4: 93770000 stw r27,0(r23)
+ 5: GETL R27, t4
+ 6: GETL R23, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0x25479AA8: 4BFFFF24 b 0x254799CC
+ 9: JMPo $0x254799CC ($4)
+
+
+. 0 25479AA0 12
+. 83 7A 02 30 93 77 00 00 4B FF FF 24
+
+==== BB 1117 (0x25479A6C) approx BBs exec'd 0 ====
+
+ 0x25479A6C: 2C9D0049 cmpi cr1,r29,73
+ 0: GETL R29, t0
+ 1: MOVL $0x49, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25479A70: 41860238 bc 12,6,0x25479CA8
+ 5: Js06o $0x25479CA8
+
+
+. 0 25479A6C 8
+. 2C 9D 00 49 41 86 02 38
+
+==== BB 1118 (0x25479CA8) approx BBs exec'd 0 ====
+
+ 0x25479CA8: 2C1A0000 cmpi cr0,r26,0
+ 0: GETL R26, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x25479CAC: 41A2FD20 bc 13,2,0x254799CC
+ 4: Js02o $0x254799CC
+
+
+. 0 25479CA8 8
+. 2C 1A 00 00 41 A2 FD 20
+
+==== BB 1119 (0x25479CB0) approx BBs exec'd 0 ====
+
+ 0x25479CB0: 817A022C lwz r11,556(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x22C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25479CB4: 2C8BFFFF cmpi cr1,r11,-1
+ 5: GETL R11, t4
+ 6: MOVL $0xFFFFFFFF, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x25479CB8: 4186034C bc 12,6,0x2547A004
+ 10: Js06o $0x2547A004
+
+
+. 0 25479CB0 12
+. 81 7A 02 2C 2C 8B FF FF 41 86 03 4C
+
+==== BB 1120 (0x25479CBC) approx BBs exec'd 0 ====
+
+ 0x25479CBC: 83460004 lwz r26,4(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25479CC0: 7D8BD214 add r12,r11,r26
+ 5: GETL R11, t4
+ 6: GETL R26, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R12
+ 9: INCEIPL $4
+
+ 0x25479CC4: 7C6C0214 add r3,r12,r0
+ 10: GETL R12, t8
+ 11: GETL R0, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R3
+ 14: INCEIPL $4
+
+ 0x25479CC8: 39239000 addi r9,r3,-28672
+ 15: GETL R3, t12
+ 16: ADDL $0xFFFF9000, t12
+ 17: PUTL t12, R9
+ 18: INCEIPL $4
+
+ 0x25479CCC: 91370000 stw r9,0(r23)
+ 19: GETL R9, t14
+ 20: GETL R23, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x25479CD0: 4BFFFCFC b 0x254799CC
+ 23: JMPo $0x254799CC ($4)
+
+
+. 0 25479CBC 24
+. 83 46 00 04 7D 8B D2 14 7C 6C 02 14 39 23 90 00 91 37 00 00 4B FF FC FC
+
+==== BB 1121 (0x254783C4) approx BBs exec'd 0 ====
+
+ 0x254783C4: 2C000002 cmpi cr0,r0,2
+ 0: GETL R0, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x254783C8: 41820164 bc 12,2,0x2547852C
+ 5: Js02o $0x2547852C
+
+
+. 0 254783C4 8
+. 2C 00 00 02 41 82 01 64
+
+==== BB 1122 (0x2547852C) approx BBs exec'd 0 ====
+
+ 0x2547852C: 829E04F4 lwz r20,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R20
+ 4: INCEIPL $4
+
+ 0x25478530: 82740030 lwz r19,48(r20)
+ 5: GETL R20, t4
+ 6: ADDL $0x30, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R19
+ 9: INCEIPL $4
+
+ 0x25478534: 2C930000 cmpi cr1,r19,0
+ 10: GETL R19, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x25478538: 40860018 bc 4,6,0x25478550
+ 14: Jc06o $0x25478550
+
+
+. 0 2547852C 16
+. 82 9E 04 F4 82 74 00 30 2C 93 00 00 40 86 00 18
+
+==== BB 1123 (0x254783F0) approx BBs exec'd 0 ====
+
+ 0x254783F0: 7F84E378 or r4,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x254783F4: 480042E1 bl 0x2547C6D4
+ 3: MOVL $0x254783F8, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x2547C6D4 ($4)
+
+
+. 0 254783F0 8
+. 7F 84 E3 78 48 00 42 E1
+
+==== BB 1124 (0x254783F8) approx BBs exec'd 0 ====
+
+ 0x254783F8: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x254783FC: 419AFE44 bc 12,26,0x25478240
+ 4: Js26o $0x25478240
+
+
+. 0 254783F8 8
+. 2F 03 00 00 41 9A FE 44
+
+==== BB 1125 (0x25479938) approx BBs exec'd 0 ====
+
+ 0x25479938: 80DF0050 lwz r6,80(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547993C: 7D695B78 or r9,r11,r11
+ 5: GETL R11, t4
+ 6: PUTL t4, R9
+ 7: INCEIPL $4
+
+ 0x25479940: 815F0008 lwz r10,8(r31)
+ 8: GETL R31, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x25479944: 80A60000 lwz r5,0(r6)
+ 13: GETL R6, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R5
+ 16: INCEIPL $4
+
+ 0x25479948: 80DF0010 lwz r6,16(r31)
+ 17: GETL R31, t14
+ 18: ADDL $0x10, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R6
+ 21: INCEIPL $4
+
+ 0x2547994C: 7C655214 add r3,r5,r10
+ 22: GETL R5, t18
+ 23: GETL R10, t20
+ 24: ADDL t18, t20
+ 25: PUTL t20, R3
+ 26: INCEIPL $4
+
+ 0x25479950: 38BF0050 addi r5,r31,80
+ 27: GETL R31, t22
+ 28: ADDL $0x50, t22
+ 29: PUTL t22, R5
+ 30: INCEIPL $4
+
+ 0x25479954: 39400000 li r10,0
+ 31: MOVL $0x0, t24
+ 32: PUTL t24, R10
+ 33: INCEIPL $4
+
+ 0x25479958: 4BFFEC4D bl 0x254785A4
+ 34: MOVL $0x2547995C, t26
+ 35: PUTL t26, LR
+ 36: JMPo-c $0x254785A4 ($4)
+
+
+. 0 25479938 36
+. 80 DF 00 50 7D 69 5B 78 81 5F 00 08 80 A6 00 00 80 DF 00 10 7C 65 52 14 38 BF 00 50 39 40 00 00 4B FF EC 4D
+
+==== BB 1126 (0x25478424) approx BBs exec'd 0 ====
+
+ 0x25478424: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25478428: 81E10074 lwz r15,116(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x74, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R15
+ 7: INCEIPL $4
+
+ 0x2547842C: 81810024 lwz r12,36(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x24, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R12
+ 12: INCEIPL $4
+
+ 0x25478430: 7DE803A6 mtlr r15
+ 13: GETL R15, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x25478434: 81C10028 lwz r14,40(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x28, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R14
+ 20: INCEIPL $4
+
+ 0x25478438: 81E1002C lwz r15,44(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x2C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R15
+ 25: INCEIPL $4
+
+ 0x2547843C: 7D818120 mtcrf 0x18,r12
+ 26: GETL R12, t20
+ 27: ICRFL t20, $0x3, CR
+ 28: ICRFL t20, $0x4, CR
+ 29: INCEIPL $4
+
+ 0x25478440: 82010030 lwz r16,48(r1)
+ 30: GETL R1, t22
+ 31: ADDL $0x30, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R16
+ 34: INCEIPL $4
+
+ 0x25478444: 82210034 lwz r17,52(r1)
+ 35: GETL R1, t26
+ 36: ADDL $0x34, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R17
+ 39: INCEIPL $4
+
+ 0x25478448: 82410038 lwz r18,56(r1)
+ 40: GETL R1, t30
+ 41: ADDL $0x38, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R18
+ 44: INCEIPL $4
+
+ 0x2547844C: 8261003C lwz r19,60(r1)
+ 45: GETL R1, t34
+ 46: ADDL $0x3C, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R19
+ 49: INCEIPL $4
+
+ 0x25478450: 82810040 lwz r20,64(r1)
+ 50: GETL R1, t38
+ 51: ADDL $0x40, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R20
+ 54: INCEIPL $4
+
+ 0x25478454: 82A10044 lwz r21,68(r1)
+ 55: GETL R1, t42
+ 56: ADDL $0x44, t42
+ 57: LDL (t42), t44
+ 58: PUTL t44, R21
+ 59: INCEIPL $4
+
+ 0x25478458: 82C10048 lwz r22,72(r1)
+ 60: GETL R1, t46
+ 61: ADDL $0x48, t46
+ 62: LDL (t46), t48
+ 63: PUTL t48, R22
+ 64: INCEIPL $4
+
+ 0x2547845C: 82E1004C lwz r23,76(r1)
+ 65: GETL R1, t50
+ 66: ADDL $0x4C, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R23
+ 69: INCEIPL $4
+
+ 0x25478460: 83010050 lwz r24,80(r1)
+ 70: GETL R1, t54
+ 71: ADDL $0x50, t54
+ 72: LDL (t54), t56
+ 73: PUTL t56, R24
+ 74: INCEIPL $4
+
+ 0x25478464: 83210054 lwz r25,84(r1)
+ 75: GETL R1, t58
+ 76: ADDL $0x54, t58
+ 77: LDL (t58), t60
+ 78: PUTL t60, R25
+ 79: INCEIPL $4
+
+ 0x25478468: 83410058 lwz r26,88(r1)
+ 80: GETL R1, t62
+ 81: ADDL $0x58, t62
+ 82: LDL (t62), t64
+ 83: PUTL t64, R26
+ 84: INCEIPL $4
+
+ 0x2547846C: 8361005C lwz r27,92(r1)
+ 85: GETL R1, t66
+ 86: ADDL $0x5C, t66
+ 87: LDL (t66), t68
+ 88: PUTL t68, R27
+ 89: INCEIPL $4
+
+ 0x25478470: 83810060 lwz r28,96(r1)
+ 90: GETL R1, t70
+ 91: ADDL $0x60, t70
+ 92: LDL (t70), t72
+ 93: PUTL t72, R28
+ 94: INCEIPL $4
+
+ 0x25478474: 83A10064 lwz r29,100(r1)
+ 95: GETL R1, t74
+ 96: ADDL $0x64, t74
+ 97: LDL (t74), t76
+ 98: PUTL t76, R29
+ 99: INCEIPL $4
+
+ 0x25478478: 83C10068 lwz r30,104(r1)
+ 100: GETL R1, t78
+ 101: ADDL $0x68, t78
+ 102: LDL (t78), t80
+ 103: PUTL t80, R30
+ 104: INCEIPL $4
+
+ 0x2547847C: 83E1006C lwz r31,108(r1)
+ 105: GETL R1, t82
+ 106: ADDL $0x6C, t82
+ 107: LDL (t82), t84
+ 108: PUTL t84, R31
+ 109: INCEIPL $4
+
+ 0x25478480: 38210070 addi r1,r1,112
+ 110: GETL R1, t86
+ 111: ADDL $0x70, t86
+ 112: PUTL t86, R1
+ 113: INCEIPL $4
+
+ 0x25478484: 4E800020 blr
+ 114: GETL LR, t88
+ 115: JMPo-r t88 ($4)
+
+
+. 0 25478424 100
+. 38 60 00 00 81 E1 00 74 81 81 00 24 7D E8 03 A6 81 C1 00 28 81 E1 00 2C 7D 81 81 20 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
+
+==== BB 1127 (0x254786BC) approx BBs exec'd 0 ====
+
+ 0x254786BC: 4180016C bc 12,0,0x25478828
+ 0: Js00o $0x25478828
+
+
+. 0 254786BC 4
+. 41 80 01 6C
+
+==== BB 1128 (0x254786C0) approx BBs exec'd 0 ====
+
+ 0x254786C0: 84FD0004 lwzu r7,4(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R29
+ 3: LDL (t0), t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x254786C4: 2F070000 cmpi cr6,r7,0
+ 6: GETL R7, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x254786C8: 409AFFC4 bc 4,26,0x2547868C
+ 10: Jc26o $0x2547868C
+
+
+. 0 254786C0 12
+. 84 FD 00 04 2F 07 00 00 40 9A FF C4
+
+==== BB 1129 (0x25478BD8) approx BBs exec'd 0 ====
+
+ 0x25478BD8: 81360000 lwz r9,0(r22)
+ 0: GETL R22, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x25478BDC: 2C090000 cmpi cr0,r9,0
+ 4: GETL R9, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x0, CR
+ 7: INCEIPL $4
+
+ 0x25478BE0: 408201B8 bc 4,2,0x25478D98
+ 8: Jc02o $0x25478D98
+
+
+. 0 25478BD8 12
+. 81 36 00 00 2C 09 00 00 40 82 01 B8
+
+==== BB 1130 (0x25478D98) approx BBs exec'd 0 ====
+
+ 0x25478D98: 8BA9000C lbz r29,12(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0xC, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x25478D9C: 57BBE13E rlwinm r27,r29,28,4,31
+ 5: GETL R29, t4
+ 6: SHRL $0x4, t4
+ 7: PUTL t4, R27
+ 8: INCEIPL $4
+
+ 0x25478DA0: 2C9B0002 cmpi cr1,r27,2
+ 9: GETL R27, t6
+ 10: MOVL $0x2, t10
+ 11: CMPL t6, t10, t8 (-rSo)
+ 12: ICRFL t8, $0x1, CR
+ 13: INCEIPL $4
+
+ 0x25478DA4: 4086FE40 bc 4,6,0x25478BE4
+ 14: Jc06o $0x25478BE4
+
+
+. 0 25478D98 16
+. 8B A9 00 0C 57 BB E1 3E 2C 9B 00 02 40 86 FE 40
+
+==== BB 1131 (0x25478DA8) approx BBs exec'd 0 ====
+
+ 0x25478DA8: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25478DAC: 38000000 li r0,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x25478DB0: 4BFFF990 b 0x25478740
+ 6: JMPo $0x25478740 ($4)
+
+
+. 0 25478DA8 12
+. 38 60 00 00 38 00 00 00 4B FF F9 90
+
+==== BB 1132 (0x25478740) approx BBs exec'd 0 ====
+
+ 0x25478740: 90160000 stw r0,0(r22)
+ 0: GETL R0, t0
+ 1: GETL R22, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25478744: 80E10000 lwz r7,0(r1)
+ 4: GETL R1, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R7
+ 7: INCEIPL $4
+
+ 0x25478748: 82C70004 lwz r22,4(r7)
+ 8: GETL R7, t8
+ 9: ADDL $0x4, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R22
+ 12: INCEIPL $4
+
+ 0x2547874C: 8107FFC0 lwz r8,-64(r7)
+ 13: GETL R7, t12
+ 14: ADDL $0xFFFFFFC0, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R8
+ 17: INCEIPL $4
+
+ 0x25478750: 7EC803A6 mtlr r22
+ 18: GETL R22, t16
+ 19: PUTL t16, LR
+ 20: INCEIPL $4
+
+ 0x25478754: 8227FFC4 lwz r17,-60(r7)
+ 21: GETL R7, t18
+ 22: ADDL $0xFFFFFFC4, t18
+ 23: LDL (t18), t20
+ 24: PUTL t20, R17
+ 25: INCEIPL $4
+
+ 0x25478758: 8247FFC8 lwz r18,-56(r7)
+ 26: GETL R7, t22
+ 27: ADDL $0xFFFFFFC8, t22
+ 28: LDL (t22), t24
+ 29: PUTL t24, R18
+ 30: INCEIPL $4
+
+ 0x2547875C: 7D008120 mtcrf 0x8,r8
+ 31: GETL R8, t26
+ 32: ICRFL t26, $0x4, CR
+ 33: INCEIPL $4
+
+ 0x25478760: 8267FFCC lwz r19,-52(r7)
+ 34: GETL R7, t28
+ 35: ADDL $0xFFFFFFCC, t28
+ 36: LDL (t28), t30
+ 37: PUTL t30, R19
+ 38: INCEIPL $4
+
+ 0x25478764: 8287FFD0 lwz r20,-48(r7)
+ 39: GETL R7, t32
+ 40: ADDL $0xFFFFFFD0, t32
+ 41: LDL (t32), t34
+ 42: PUTL t34, R20
+ 43: INCEIPL $4
+
+ 0x25478768: 82A7FFD4 lwz r21,-44(r7)
+ 44: GETL R7, t36
+ 45: ADDL $0xFFFFFFD4, t36
+ 46: LDL (t36), t38
+ 47: PUTL t38, R21
+ 48: INCEIPL $4
+
+ 0x2547876C: 82C7FFD8 lwz r22,-40(r7)
+ 49: GETL R7, t40
+ 50: ADDL $0xFFFFFFD8, t40
+ 51: LDL (t40), t42
+ 52: PUTL t42, R22
+ 53: INCEIPL $4
+
+ 0x25478770: 82E7FFDC lwz r23,-36(r7)
+ 54: GETL R7, t44
+ 55: ADDL $0xFFFFFFDC, t44
+ 56: LDL (t44), t46
+ 57: PUTL t46, R23
+ 58: INCEIPL $4
+
+ 0x25478774: 8307FFE0 lwz r24,-32(r7)
+ 59: GETL R7, t48
+ 60: ADDL $0xFFFFFFE0, t48
+ 61: LDL (t48), t50
+ 62: PUTL t50, R24
+ 63: INCEIPL $4
+
+ 0x25478778: 8327FFE4 lwz r25,-28(r7)
+ 64: GETL R7, t52
+ 65: ADDL $0xFFFFFFE4, t52
+ 66: LDL (t52), t54
+ 67: PUTL t54, R25
+ 68: INCEIPL $4
+
+ 0x2547877C: 8347FFE8 lwz r26,-24(r7)
+ 69: GETL R7, t56
+ 70: ADDL $0xFFFFFFE8, t56
+ 71: LDL (t56), t58
+ 72: PUTL t58, R26
+ 73: INCEIPL $4
+
+ 0x25478780: 8367FFEC lwz r27,-20(r7)
+ 74: GETL R7, t60
+ 75: ADDL $0xFFFFFFEC, t60
+ 76: LDL (t60), t62
+ 77: PUTL t62, R27
+ 78: INCEIPL $4
+
+ 0x25478784: 8387FFF0 lwz r28,-16(r7)
+ 79: GETL R7, t64
+ 80: ADDL $0xFFFFFFF0, t64
+ 81: LDL (t64), t66
+ 82: PUTL t66, R28
+ 83: INCEIPL $4
+
+ 0x25478788: 83A7FFF4 lwz r29,-12(r7)
+ 84: GETL R7, t68
+ 85: ADDL $0xFFFFFFF4, t68
+ 86: LDL (t68), t70
+ 87: PUTL t70, R29
+ 88: INCEIPL $4
+
+ 0x2547878C: 83C7FFF8 lwz r30,-8(r7)
+ 89: GETL R7, t72
+ 90: ADDL $0xFFFFFFF8, t72
+ 91: LDL (t72), t74
+ 92: PUTL t74, R30
+ 93: INCEIPL $4
+
+ 0x25478790: 83E7FFFC lwz r31,-4(r7)
+ 94: GETL R7, t76
+ 95: ADDL $0xFFFFFFFC, t76
+ 96: LDL (t76), t78
+ 97: PUTL t78, R31
+ 98: INCEIPL $4
+
+ 0x25478794: 7CE13B78 or r1,r7,r7
+ 99: GETL R7, t80
+ 100: PUTL t80, R1
+ 101: INCEIPL $4
+
+ 0x25478798: 4E800020 blr
+ 102: GETL LR, t82
+ 103: JMPo-r t82 ($4)
+
+
+. 0 25478740 92
+. 90 16 00 00 80 E1 00 00 82 C7 00 04 81 07 FF C0 7E C8 03 A6 82 27 FF C4 82 47 FF C8 7D 00 81 20 82 67 FF CC 82 87 FF D0 82 A7 FF D4 82 C7 FF D8 82 E7 FF DC 83 07 FF E0 83 27 FF E4 83 47 FF E8 83 67 FF EC 83 87 FF F0 83 A7 FF F4 83 C7 FF F8 83 E7 FF FC 7C E1 3B 78 4E 80 00 20
+
+==== BB 1133 (0x2547998C) approx BBs exec'd 0 ====
+
+ 0x2547998C: 2F9D0044 cmpi cr7,r29,68
+ 0: GETL R29, t0
+ 1: MOVL $0x44, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25479990: 801C0008 lwz r0,8(r28)
+ 5: GETL R28, t6
+ 6: ADDL $0x8, t6
+ 7: LDL (t6), t8
+ 8: PUTL t8, R0
+ 9: INCEIPL $4
+
+ 0x25479994: 7D290214 add r9,r9,r0
+ 10: GETL R9, t10
+ 11: GETL R0, t12
+ 12: ADDL t10, t12
+ 13: PUTL t12, R9
+ 14: INCEIPL $4
+
+ 0x25479998: 419E0100 bc 12,30,0x25479A98
+ 15: Js30o $0x25479A98
+
+
+. 0 2547998C 16
+. 2F 9D 00 44 80 1C 00 08 7D 29 02 14 41 9E 01 00
+
+==== BB 1134 (0x254784A0) approx BBs exec'd 0 ====
+
+ 0x254784A0: 41AEFF18 bc 13,14,0x254783B8
+ 0: Js14o $0x254783B8
+
+
+. 0 254784A0 4
+. 41 AE FF 18
+
+==== BB 1135 (0x254784A4) approx BBs exec'd 0 ====
+
+ 0x254784A4: 80610014 lwz r3,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x254784A8: 5469FFFF rlwinm. r9,r3,31,31,31
+ 5: GETL R3, t4
+ 6: ROLL $0x1F, t4
+ 7: ANDL $0x1, t4
+ 8: PUTL t4, R9
+ 9: CMP0L t4, t6 (-rSo)
+ 10: ICRFL t6, $0x0, CR
+ 11: INCEIPL $4
+
+ 0x254784AC: 4182006C bc 12,2,0x25478518
+ 12: Js02o $0x25478518
+
+
+. 0 254784A4 12
+. 80 61 00 14 54 69 FF FF 41 82 00 6C
+
+==== BB 1136 (0x25478518) approx BBs exec'd 0 ====
+
+ 0x25478518: 57E9083C rlwinm r9,r31,1,0,30
+ 0: GETL R31, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x2547851C: 7CC9B22E lhzx r6,r9,r22
+ 4: GETL R22, t2
+ 5: GETL R9, t4
+ 6: ADDL t4, t2
+ 7: LDW (t2), t6
+ 8: PUTL t6, R6
+ 9: INCEIPL $4
+
+ 0x25478520: 54C5047E rlwinm r5,r6,0,17,31
+ 10: GETL R6, t8
+ 11: ANDL $0x7FFF, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0x25478524: 2F850002 cmpi cr7,r5,2
+ 14: GETL R5, t10
+ 15: MOVL $0x2, t14
+ 16: CMPL t10, t14, t12 (-rSo)
+ 17: ICRFL t12, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x25478528: 4BFFFF98 b 0x254784C0
+ 19: JMPo $0x254784C0 ($4)
+
+
+. 0 25478518 20
+. 57 E9 08 3C 7C C9 B2 2E 54 C5 04 7E 2F 85 00 02 4B FF FF 98
+
+==== BB 1137 (0x254784C0) approx BBs exec'd 0 ====
+
+ 0x254784C0: 40BDFEF8 bc 5,29,0x254783B8
+ 0: Jc29o $0x254783B8
+
+
+. 0 254784C0 4
+. 40 BD FE F8
+
+==== BB 1138 (0x25479A04) approx BBs exec'd 0 ====
+
+ 0x25479A04: 39000001 li r8,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0x25479A08: 4BFFFEF4 b 0x254798FC
+ 3: JMPo $0x254798FC ($4)
+
+
+. 0 25479A04 8
+. 39 00 00 01 4B FF FE F4
+
+==== BB 1139 (0x254799B0) approx BBs exec'd 0 ====
+
+ 0x254799B0: 7F45D378 or r5,r26,r26
+ 0: GETL R26, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x254799B4: 7F67DB78 or r7,r27,r27
+ 3: GETL R27, t2
+ 4: PUTL t2, R7
+ 5: INCEIPL $4
+
+ 0x254799B8: 7EE8BB78 or r8,r23,r23
+ 6: GETL R23, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x254799BC: 7FAAEB78 or r10,r29,r29
+ 9: GETL R29, t6
+ 10: PUTL t6, R10
+ 11: INCEIPL $4
+
+ 0x254799C0: 7EC3B378 or r3,r22,r22
+ 12: GETL R22, t8
+ 13: PUTL t8, R3
+ 14: INCEIPL $4
+
+ 0x254799C4: 7F84E378 or r4,r28,r28
+ 15: GETL R28, t10
+ 16: PUTL t10, R4
+ 17: INCEIPL $4
+
+ 0x254799C8: 480072E1 bl 0x25480CA8
+ 18: MOVL $0x254799CC, t12
+ 19: PUTL t12, LR
+ 20: JMPo-c $0x25480CA8 ($4)
+
+
+. 0 254799B0 28
+. 7F 45 D3 78 7F 67 DB 78 7E E8 BB 78 7F AA EB 78 7E C3 B3 78 7F 84 E3 78 48 00 72 E1
+
+==== BB 1140 (0x25480FF0) approx BBs exec'd 0 ====
+
+ 0x25480FF0: 3D3AFE00 addis r9,r26,-512
+ 0: GETL R26, t0
+ 1: ADDL $0xFE000000, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x25480FF4: 3D60FC00 lis r11,-1024
+ 4: MOVL $0xFC000000, t2
+ 5: PUTL t2, R11
+ 6: INCEIPL $4
+
+ 0x25480FF8: 38690003 addi r3,r9,3
+ 7: GETL R9, t4
+ 8: ADDL $0x3, t4
+ 9: PUTL t4, R3
+ 10: INCEIPL $4
+
+ 0x25480FFC: 61600002 ori r0,r11,0x2
+ 11: MOVL $0xFC000002, t6
+ 12: PUTL t6, R0
+ 13: INCEIPL $4
+
+ 0x25481000: 7C030040 cmpl cr0,r3,r0
+ 14: GETL R3, t8
+ 15: GETL R0, t10
+ 16: CMPUL t8, t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x25481004: 40810194 bc 4,1,0x25481198
+ 19: Jc01o $0x25481198
+
+
+. 0 25480FF0 24
+. 3D 3A FE 00 3D 60 FC 00 38 69 00 03 61 60 00 02 7C 03 00 40 40 81 01 94
+
+==== BB 1141 (0x25481198) approx BBs exec'd 0 ====
+
+ 0x25481198: 81610008 lwz r11,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2548119C: 814B002C lwz r10,44(r11)
+ 5: GETL R11, t4
+ 6: ADDL $0x2C, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R10
+ 9: INCEIPL $4
+
+ 0x254811A0: 810A0004 lwz r8,4(r10)
+ 10: GETL R10, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R8
+ 14: INCEIPL $4
+
+ 0x254811A4: 7CE82850 subf r7,r8,r5
+ 15: GETL R8, t12
+ 16: GETL R5, t14
+ 17: SUBL t12, t14
+ 18: PUTL t14, R7
+ 19: INCEIPL $4
+
+ 0x254811A8: 7CEA1670 srawi r10,r7,2
+ 20: GETL R7, t16
+ 21: SARL $0x2, t16 (-wCa)
+ 22: PUTL t16, R10
+ 23: INCEIPL $4
+
+ 0x254811AC: 288A4011 cmpli cr1,r10,16401
+ 24: GETL R10, t18
+ 25: MOVL $0x4011, t22
+ 26: CMPUL t18, t22, t20 (-rSo)
+ 27: ICRFL t20, $0x1, CR
+ 28: INCEIPL $4
+
+ 0x254811B0: 418500A0 bc 12,5,0x25481250
+ 29: Js05o $0x25481250
+
+
+. 0 25481198 28
+. 81 61 00 08 81 4B 00 2C 81 0A 00 04 7C E8 28 50 7C EA 16 70 28 8A 40 11 41 85 00 A0
+
+==== BB 1142 (0x254811B4) approx BBs exec'd 0 ====
+
+ 0x254811B4: 816B0028 lwz r11,40(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x28, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254811B8: 3C60AAAA lis r3,-21846
+ 5: MOVL $0xAAAA0000, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254811BC: 6060AAAB ori r0,r3,0xAAAB
+ 8: MOVL $0xAAAAAAAB, t6
+ 9: PUTL t6, R0
+ 10: INCEIPL $4
+
+ 0x254811C0: 3BAAFFEE addi r29,r10,-18
+ 11: GETL R10, t8
+ 12: ADDL $0xFFFFFFEE, t8
+ 13: PUTL t8, R29
+ 14: INCEIPL $4
+
+ 0x254811C4: 83EB0004 lwz r31,4(r11)
+ 15: GETL R11, t10
+ 16: ADDL $0x4, t10
+ 17: LDL (t10), t12
+ 18: PUTL t12, R31
+ 19: INCEIPL $4
+
+ 0x254811C8: 57ABF87E rlwinm r11,r29,31,1,31
+ 20: GETL R29, t14
+ 21: SHRL $0x1, t14
+ 22: PUTL t14, R11
+ 23: INCEIPL $4
+
+ 0x254811CC: 7F7F0016 mulhwu r27,r31,r0
+ 24: GETL R31, t16
+ 25: GETL R0, t18
+ 26: UMULHL t16, t18
+ 27: PUTL t18, R27
+ 28: INCEIPL $4
+
+ 0x254811D0: 577CE8FE rlwinm r28,r27,29,3,31
+ 29: GETL R27, t20
+ 30: SHRL $0x3, t20
+ 31: PUTL t20, R28
+ 32: INCEIPL $4
+
+ 0x254811D4: 2B1C2000 cmpli cr6,r28,8192
+ 33: GETL R28, t22
+ 34: MOVL $0x2000, t26
+ 35: CMPUL t22, t26, t24 (-rSo)
+ 36: ICRFL t24, $0x6, CR
+ 37: INCEIPL $4
+
+ 0x254811D8: 5787083C rlwinm r7,r28,1,0,30
+ 38: GETL R28, t28
+ 39: SHLL $0x1, t28
+ 40: PUTL t28, R7
+ 41: INCEIPL $4
+
+ 0x254811DC: 39270012 addi r9,r7,18
+ 42: GETL R7, t30
+ 43: ADDL $0x12, t30
+ 44: PUTL t30, R9
+ 45: INCEIPL $4
+
+ 0x254811E0: 552C103A rlwinm r12,r9,2,0,29
+ 46: GETL R9, t32
+ 47: SHLL $0x2, t32
+ 48: PUTL t32, R12
+ 49: INCEIPL $4
+
+ 0x254811E4: 7CCC4214 add r6,r12,r8
+ 50: GETL R12, t34
+ 51: GETL R8, t36
+ 52: ADDL t34, t36
+ 53: PUTL t36, R6
+ 54: INCEIPL $4
+
+ 0x254811E8: 40990014 bc 4,25,0x254811FC
+ 55: Jc25o $0x254811FC
+
+
+. 0 254811B4 56
+. 81 6B 00 28 3C 60 AA AA 60 60 AA AB 3B AA FF EE 83 EB 00 04 57 AB F8 7E 7F 7F 00 16 57 7C E8 FE 2B 1C 20 00 57 87 08 3C 39 27 00 12 55 2C 10 3A 7C CC 42 14 40 99 00 14
+
+==== BB 1143 (0x254811FC) approx BBs exec'd 0 ====
+
+ 0x254811FC: 1FEAFFFC mulli r31,r10,-4
+ 0: GETL R10, t0
+ 1: MULL $0xFFFFFFFC, t0
+ 2: PUTL t0, R31
+ 3: INCEIPL $4
+
+ 0x25481200: 556C103A rlwinm r12,r11,2,0,29
+ 4: GETL R11, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R12
+ 7: INCEIPL $4
+
+ 0x25481204: 559B043E rlwinm r27,r12,0,16,31
+ 8: GETL R12, t4
+ 9: ANDL $0xFFFF, t4
+ 10: PUTL t4, R27
+ 11: INCEIPL $4
+
+ 0x25481208: 7F4C312E stwx r26,r12,r6
+ 12: GETL R6, t6
+ 13: GETL R12, t8
+ 14: ADDL t8, t6
+ 15: GETL R26, t10
+ 16: STL t10, (t6)
+ 17: INCEIPL $4
+
+ 0x2548120C: 3BBFFFFC addi r29,r31,-4
+ 18: GETL R31, t12
+ 19: ADDL $0xFFFFFFFC, t12
+ 20: PUTL t12, R29
+ 21: INCEIPL $4
+
+ 0x25481210: 676A3960 oris r10,r27,0x3960
+ 22: GETL R27, t14
+ 23: ORL $0x39600000, t14
+ 24: PUTL t14, R10
+ 25: INCEIPL $4
+
+ 0x25481214: 57BC01BA rlwinm r28,r29,0,6,29
+ 26: GETL R29, t16
+ 27: ANDL $0x3FFFFFC, t16
+ 28: PUTL t16, R28
+ 29: INCEIPL $4
+
+ 0x25481218: 91450000 stw r10,0(r5)
+ 30: GETL R10, t18
+ 31: GETL R5, t20
+ 32: STL t18, (t20)
+ 33: INCEIPL $4
+
+ 0x2548121C: 67874800 oris r7,r28,0x4800
+ 34: GETL R28, t22
+ 35: ORL $0x48000000, t22
+ 36: PUTL t22, R7
+ 37: INCEIPL $4
+
+ 0x25481220: 94E50004 stwu r7,4(r5)
+ 38: GETL R7, t24
+ 39: GETL R5, t26
+ 40: ADDL $0x4, t26
+ 41: PUTL t26, R5
+ 42: STL t24, (t26)
+ 43: INCEIPL $4
+
+ 0x25481224: 7C00286C dcbst r0,r5
+ 44: INCEIPL $4
+
+ 0x25481228: 7C0004AC sync
+ 45: INCEIPL $4
+
+ 0x2548122C: 80A1000C lwz r5,12(r1)
+ 46: GETL R1, t28
+ 47: ADDL $0xC, t28
+ 48: LDL (t28), t30
+ 49: PUTL t30, R5
+ 50: INCEIPL $4
+
+ 0x25481230: 39050004 addi r8,r5,4
+ 51: GETL R5, t32
+ 52: ADDL $0x4, t32
+ 53: PUTL t32, R8
+ 54: INCEIPL $4
+
+ 0x25481234: 7C0047AC icbi r0,r8
+ 55: GETL R8, t34
+ 56: CALLM_So
+ 57: PUSHL t34
+ 58: CALLMo $0x68
+ 59: CALLM_Eo
+ 60: INCEIPL $4
+
+ 0x25481238: 80A1000C lwz r5,12(r1)
+ 61: GETL R1, t36
+ 62: ADDL $0xC, t36
+ 63: LDL (t36), t38
+ 64: PUTL t38, R5
+ 65: INCEIPL $4
+
+ 0x2548123C: 4BFFFBC4 b 0x25480E00
+ 66: JMPo $0x25480E00 ($4)
+
+
+. 0 254811FC 68
+. 1F EA FF FC 55 6C 10 3A 55 9B 04 3E 7F 4C 31 2E 3B BF FF FC 67 6A 39 60 57 BC 01 BA 91 45 00 00 67 87 48 00 94 E5 00 04 7C 00 28 6C 7C 00 04 AC 80 A1 00 0C 39 05 00 04 7C 00 47 AC 80 A1 00 0C 4B FF FB C4
+
+==== BB 1144 (0x254799D8) approx BBs exec'd 0 ====
+
+ 0x254799D8: 83BF000C lwz r29,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x254799DC: 4BFFFD44 b 0x25479720
+ 5: JMPo $0x25479720 ($4)
+
+
+. 0 254799D8 8
+. 83 BF 00 0C 4B FF FD 44
+
+==== BB 1145 (0x25479720) approx BBs exec'd 0 ====
+
+ 0x25479720: 3652FFFF addic. r18,r18,-1
+ 0: GETL R18, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R18
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x25479724: 3AB5000C addi r21,r21,12
+ 6: GETL R21, t4
+ 7: ADDL $0xC, t4
+ 8: PUTL t4, R21
+ 9: INCEIPL $4
+
+ 0x25479728: 4080FFC0 bc 4,0,0x254796E8
+ 10: Jc00o $0x254796E8
+
+
+. 0 25479720 12
+. 36 52 FF FF 3A B5 00 0C 40 80 FF C0
+
+==== BB 1146 (0x254796E8) approx BBs exec'd 0 ====
+
+ 0x254796E8: 80B50020 lwz r5,32(r21)
+ 0: GETL R21, t0
+ 1: ADDL $0x20, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x254796EC: 7FB6EB78 or r22,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R22
+ 7: INCEIPL $4
+
+ 0x254796F0: 81750018 lwz r11,24(r21)
+ 8: GETL R21, t6
+ 9: ADDL $0x18, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x254796F4: 2C050000 cmpi cr0,r5,0
+ 13: GETL R5, t10
+ 14: CMP0L t10, t12 (-rSo)
+ 15: ICRFL t12, $0x0, CR
+ 16: INCEIPL $4
+
+ 0x254796F8: 8115001C lwz r8,28(r21)
+ 17: GETL R21, t14
+ 18: ADDL $0x1C, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R8
+ 21: INCEIPL $4
+
+ 0x254796FC: 7D695B78 or r9,r11,r11
+ 22: GETL R11, t18
+ 23: PUTL t18, R9
+ 24: INCEIPL $4
+
+ 0x25479700: 833D0000 lwz r25,0(r29)
+ 25: GETL R29, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R25
+ 28: INCEIPL $4
+
+ 0x25479704: 7F0B4214 add r24,r11,r8
+ 29: GETL R11, t24
+ 30: GETL R8, t26
+ 31: ADDL t24, t26
+ 32: PUTL t26, R24
+ 33: INCEIPL $4
+
+ 0x25479708: 418200BC bc 12,2,0x254797C4
+ 34: Js02o $0x254797C4
+
+
+. 0 254796E8 36
+. 80 B5 00 20 7F B6 EB 78 81 75 00 18 2C 05 00 00 81 15 00 1C 7D 69 5B 78 83 3D 00 00 7F 0B 42 14 41 82 00 BC
+
+==== BB 1147 (0x2547970C) approx BBs exec'd 0 ====
+
+ 0x2547970C: 7F8BC040 cmpl cr7,r11,r24
+ 0: GETL R11, t0
+ 1: GETL R24, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x25479710: 409C0010 bc 4,28,0x25479720
+ 5: Jc28o $0x25479720
+
+
+. 0 2547970C 8
+. 7F 8B C0 40 40 9C 00 10
+
+==== BB 1148 (0x254797FC) approx BBs exec'd 0 ====
+
+ 0x254797FC: 3B7001B8 addi r27,r16,440
+ 0: GETL R16, t0
+ 1: ADDL $0x1B8, t0
+ 2: PUTL t0, R27
+ 3: INCEIPL $4
+
+ 0x25479800: 1CE9000C mulli r7,r9,12
+ 4: GETL R9, t2
+ 5: MULL $0xC, t2
+ 6: PUTL t2, R7
+ 7: INCEIPL $4
+
+ 0x25479804: 7E1DD800 cmp cr4,r29,r27
+ 8: GETL R29, t4
+ 9: GETL R27, t6
+ 10: CMPL t4, t6, t8 (-rSo)
+ 11: ICRFL t8, $0x4, CR
+ 12: INCEIPL $4
+
+ 0x25479808: 7F8B3A14 add r28,r11,r7
+ 13: GETL R11, t10
+ 14: GETL R7, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0x2547980C: 41920018 bc 12,18,0x25479824
+ 18: Js18o $0x25479824
+
+
+. 0 254797FC 20
+. 3B 70 01 B8 1C E9 00 0C 7E 1D D8 00 7F 8B 3A 14 41 92 00 18
+
+==== BB 1149 (0x2547972C) approx BBs exec'd 0 ====
+
+ 0x2547972C: 408E0710 bc 4,14,0x25479E3C
+ 0: Jc14o $0x25479E3C
+
+
+. 0 2547972C 4
+. 40 8E 07 10
+
+==== BB 1150 (0x25479730) approx BBs exec'd 0 ====
+
+ 0x25479730: 827D0180 lwz r19,384(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R19
+ 4: INCEIPL $4
+
+ 0x25479734: 2F910000 cmpi cr7,r17,0
+ 5: GETL R17, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x25479738: 66722000 oris r18,r19,0x2000
+ 9: GETL R19, t8
+ 10: ORL $0x20000000, t8
+ 11: PUTL t8, R18
+ 12: INCEIPL $4
+
+ 0x2547973C: 925D0180 stw r18,384(r29)
+ 13: GETL R18, t10
+ 14: GETL R29, t12
+ 15: ADDL $0x180, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25479740: 409E05C0 bc 4,30,0x25479D00
+ 18: Jc30o $0x25479D00
+
+
+. 0 25479730 20
+. 82 7D 01 80 2F 91 00 00 66 72 20 00 92 5D 01 80 40 9E 05 C0
+
+==== BB 1151 (0x25479744) approx BBs exec'd 0 ====
+
+ 0x25479744: 807F000C lwz r3,12(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0x25479748: 82A30238 lwz r21,568(r3)
+ 5: GETL R3, t4
+ 6: ADDL $0x238, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R21
+ 9: INCEIPL $4
+
+ 0x2547974C: 2F950000 cmpi cr7,r21,0
+ 10: GETL R21, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x7, CR
+ 13: INCEIPL $4
+
+ 0x25479750: 409E02BC bc 4,30,0x25479A0C
+ 14: Jc30o $0x25479A0C
+
+
+. 0 25479744 16
+. 80 7F 00 0C 82 A3 02 38 2F 95 00 00 40 9E 02 BC
+
+==== BB 1152 (0x25479A0C) approx BBs exec'd 0 ====
+
+ 0x25479A0C: 4BFFFB1D bl 0x25479528
+ 0: MOVL $0x25479A10, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25479528 ($4)
+
+
+. 0 25479A0C 4
+. 4B FF FB 1D
+
+==== BB 1153 _dl_protect_relro(0x25479528) approx BBs exec'd 0 ====
+
+ 0x25479528: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547952C: 7D8802A6 mflr r12
+ 6: GETL LR, t4
+ 7: PUTL t4, R12
+ 8: INCEIPL $4
+
+ 0x25479530: 4801DAD1 bl 0x25497000
+ 9: MOVL $0x25479534, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25479528 12
+. 94 21 FF F0 7D 88 02 A6 48 01 DA D1
+
+==== BB 1154 (0x25479534) approx BBs exec'd 0 ====
+
+ 0x25479534: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25479538: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547953C: 93E1000C stw r31,12(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25479540: 91810014 stw r12,20(r1)
+ 13: GETL R12, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x25479544: 7C7F1B78 or r31,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0x25479548: 80A30000 lwz r5,0(r3)
+ 21: GETL R3, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R5
+ 24: INCEIPL $4
+
+ 0x2547954C: 813E04F4 lwz r9,1268(r30)
+ 25: GETL R30, t20
+ 26: ADDL $0x4F4, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R9
+ 29: INCEIPL $4
+
+ 0x25479550: 81030234 lwz r8,564(r3)
+ 30: GETL R3, t24
+ 31: ADDL $0x234, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R8
+ 34: INCEIPL $4
+
+ 0x25479554: 80E30238 lwz r7,568(r3)
+ 35: GETL R3, t28
+ 36: ADDL $0x238, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R7
+ 39: INCEIPL $4
+
+ 0x25479558: 80C90004 lwz r6,4(r9)
+ 40: GETL R9, t32
+ 41: ADDL $0x4, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R6
+ 44: INCEIPL $4
+
+ 0x2547955C: 7C654214 add r3,r5,r8
+ 45: GETL R5, t36
+ 46: GETL R8, t38
+ 47: ADDL t36, t38
+ 48: PUTL t38, R3
+ 49: INCEIPL $4
+
+ 0x25479560: 7C833A14 add r4,r3,r7
+ 50: GETL R3, t40
+ 51: GETL R7, t42
+ 52: ADDL t40, t42
+ 53: PUTL t42, R4
+ 54: INCEIPL $4
+
+ 0x25479564: 38A00001 li r5,1
+ 55: MOVL $0x1, t44
+ 56: PUTL t44, R5
+ 57: INCEIPL $4
+
+ 0x25479568: 7D4600D0 neg r10,r6
+ 58: GETL R6, t46
+ 59: NEGL t46
+ 60: PUTL t46, R10
+ 61: INCEIPL $4
+
+ 0x2547956C: 7C605038 and r0,r3,r10
+ 62: GETL R3, t48
+ 63: GETL R10, t50
+ 64: ANDL t48, t50
+ 65: PUTL t50, R0
+ 66: INCEIPL $4
+
+ 0x25479570: 7C8B5038 and r11,r4,r10
+ 67: GETL R4, t52
+ 68: GETL R10, t54
+ 69: ANDL t52, t54
+ 70: PUTL t54, R11
+ 71: INCEIPL $4
+
+ 0x25479574: 7F805800 cmp cr7,r0,r11
+ 72: GETL R0, t56
+ 73: GETL R11, t58
+ 74: CMPL t56, t58, t60 (-rSo)
+ 75: ICRFL t60, $0x7, CR
+ 76: INCEIPL $4
+
+ 0x25479578: 7C030378 or r3,r0,r0
+ 77: GETL R0, t62
+ 78: PUTL t62, R3
+ 79: INCEIPL $4
+
+ 0x2547957C: 7C805850 subf r4,r0,r11
+ 80: GETL R0, t64
+ 81: GETL R11, t66
+ 82: SUBL t64, t66
+ 83: PUTL t66, R4
+ 84: INCEIPL $4
+
+ 0x25479580: 419E0010 bc 12,30,0x25479590
+ 85: Js30o $0x25479590
+
+
+. 0 25479534 80
+. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 91 81 00 14 7C 7F 1B 78 80 A3 00 00 81 3E 04 F4 81 03 02 34 80 E3 02 38 80 C9 00 04 7C 65 42 14 7C 83 3A 14 38 A0 00 01 7D 46 00 D0 7C 60 50 38 7C 8B 50 38 7F 80 58 00 7C 03 03 78 7C 80 58 50 41 9E 00 10
+
+==== BB 1155 (0x25479584) approx BBs exec'd 0 ====
+
+ 0x25479584: 48009235 bl 0x254827B8
+ 0: MOVL $0x25479588, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x254827B8 ($4)
+
+
+. 0 25479584 4
+. 48 00 92 35
+
+==== BB 1156 (0x25479588) approx BBs exec'd 0 ====
+
+ 0x25479588: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x2547958C: 4180001C bc 12,0,0x254795A8
+ 4: Js00o $0x254795A8
+
+
+. 0 25479588 8
+. 2C 03 00 00 41 80 00 1C
+
+==== BB 1157 (0x25479590) approx BBs exec'd 0 ====
+
+ 0x25479590: 81610014 lwz r11,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x25479594: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0x25479598: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0x2547959C: 7D6803A6 mtlr r11
+ 15: GETL R11, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x254795A0: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0x254795A4: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+. 0 25479590 24
+. 81 61 00 14 83 C1 00 08 83 E1 00 0C 7D 68 03 A6 38 21 00 10 4E 80 00 20
+
+==== BB 1158 (0x25479A10) approx BBs exec'd 0 ====
+
+ 0x25479A10: 4BFFFD44 b 0x25479754
+ 0: JMPo $0x25479754 ($4)
+
+
+. 0 25479A10 4
+. 4B FF FD 44
+
+==== BB 1159 (0x25479754) approx BBs exec'd 0 ====
+
+ 0x25479754: 80810000 lwz r4,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R4
+ 3: INCEIPL $4
+
+ 0x25479758: 83240004 lwz r25,4(r4)
+ 4: GETL R4, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R25
+ 8: INCEIPL $4
+
+ 0x2547975C: 8184FFBC lwz r12,-68(r4)
+ 9: GETL R4, t8
+ 10: ADDL $0xFFFFFFBC, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0x25479760: 7F2803A6 mtlr r25
+ 14: GETL R25, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x25479764: 8204FFC0 lwz r16,-64(r4)
+ 17: GETL R4, t14
+ 18: ADDL $0xFFFFFFC0, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R16
+ 21: INCEIPL $4
+
+ 0x25479768: 8224FFC4 lwz r17,-60(r4)
+ 22: GETL R4, t18
+ 23: ADDL $0xFFFFFFC4, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R17
+ 26: INCEIPL $4
+
+ 0x2547976C: 7D818120 mtcrf 0x18,r12
+ 27: GETL R12, t22
+ 28: ICRFL t22, $0x3, CR
+ 29: ICRFL t22, $0x4, CR
+ 30: INCEIPL $4
+
+ 0x25479770: 8244FFC8 lwz r18,-56(r4)
+ 31: GETL R4, t24
+ 32: ADDL $0xFFFFFFC8, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R18
+ 35: INCEIPL $4
+
+ 0x25479774: 8264FFCC lwz r19,-52(r4)
+ 36: GETL R4, t28
+ 37: ADDL $0xFFFFFFCC, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R19
+ 40: INCEIPL $4
+
+ 0x25479778: 8284FFD0 lwz r20,-48(r4)
+ 41: GETL R4, t32
+ 42: ADDL $0xFFFFFFD0, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R20
+ 45: INCEIPL $4
+
+ 0x2547977C: 82A4FFD4 lwz r21,-44(r4)
+ 46: GETL R4, t36
+ 47: ADDL $0xFFFFFFD4, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R21
+ 50: INCEIPL $4
+
+ 0x25479780: 82C4FFD8 lwz r22,-40(r4)
+ 51: GETL R4, t40
+ 52: ADDL $0xFFFFFFD8, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R22
+ 55: INCEIPL $4
+
+ 0x25479784: 82E4FFDC lwz r23,-36(r4)
+ 56: GETL R4, t44
+ 57: ADDL $0xFFFFFFDC, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R23
+ 60: INCEIPL $4
+
+ 0x25479788: 8304FFE0 lwz r24,-32(r4)
+ 61: GETL R4, t48
+ 62: ADDL $0xFFFFFFE0, t48
+ 63: LDL (t48), t50
+ 64: PUTL t50, R24
+ 65: INCEIPL $4
+
+ 0x2547978C: 8324FFE4 lwz r25,-28(r4)
+ 66: GETL R4, t52
+ 67: ADDL $0xFFFFFFE4, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R25
+ 70: INCEIPL $4
+
+ 0x25479790: 8344FFE8 lwz r26,-24(r4)
+ 71: GETL R4, t56
+ 72: ADDL $0xFFFFFFE8, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R26
+ 75: INCEIPL $4
+
+ 0x25479794: 8364FFEC lwz r27,-20(r4)
+ 76: GETL R4, t60
+ 77: ADDL $0xFFFFFFEC, t60
+ 78: LDL (t60), t62
+ 79: PUTL t62, R27
+ 80: INCEIPL $4
+
+ 0x25479798: 8384FFF0 lwz r28,-16(r4)
+ 81: GETL R4, t64
+ 82: ADDL $0xFFFFFFF0, t64
+ 83: LDL (t64), t66
+ 84: PUTL t66, R28
+ 85: INCEIPL $4
+
+ 0x2547979C: 83A4FFF4 lwz r29,-12(r4)
+ 86: GETL R4, t68
+ 87: ADDL $0xFFFFFFF4, t68
+ 88: LDL (t68), t70
+ 89: PUTL t70, R29
+ 90: INCEIPL $4
+
+ 0x254797A0: 83C4FFF8 lwz r30,-8(r4)
+ 91: GETL R4, t72
+ 92: ADDL $0xFFFFFFF8, t72
+ 93: LDL (t72), t74
+ 94: PUTL t74, R30
+ 95: INCEIPL $4
+
+ 0x254797A4: 83E4FFFC lwz r31,-4(r4)
+ 96: GETL R4, t76
+ 97: ADDL $0xFFFFFFFC, t76
+ 98: LDL (t76), t78
+ 99: PUTL t78, R31
+ 100: INCEIPL $4
+
+ 0x254797A8: 7C812378 or r1,r4,r4
+ 101: GETL R4, t80
+ 102: PUTL t80, R1
+ 103: INCEIPL $4
+
+ 0x254797AC: 4E800020 blr
+ 104: GETL LR, t82
+ 105: JMPo-r t82 ($4)
+
+
+. 0 25479754 92
+. 80 81 00 00 83 24 00 04 81 84 FF BC 7F 28 03 A6 82 04 FF C0 82 24 FF C4 7D 81 81 20 82 44 FF C8 82 64 FF CC 82 84 FF D0 82 A4 FF D4 82 C4 FF D8 82 E4 FF DC 83 04 FF E0 83 24 FF E4 83 44 FF E8 83 64 FF EC 83 84 FF F0 83 A4 FF F4 83 C4 FF F8 83 E4 FF FC 7C 81 23 78 4E 80 00 20
+
+==== BB 1160 (0x25480904) approx BBs exec'd 0 ====
+
+ 0x25480904: 2F850000 cmpi cr7,r5,0
+ 0: GETL R5, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x25480908: 3B9F0018 addi r28,r31,24
+ 4: GETL R31, t4
+ 5: ADDL $0x18, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x2548090C: 419E0264 bc 12,30,0x25480B70
+ 8: Js30o $0x25480B70
+
+
+. 0 25480904 12
+. 2F 85 00 00 3B 9F 00 18 41 9E 02 64
+
+==== BB 1161 (0x25480B70) approx BBs exec'd 0 ====
+
+ 0x25480B70: 831E04CC lwz r24,1228(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4CC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0x25480B74: 4BFFFDA0 b 0x25480914
+ 5: JMPo $0x25480914 ($4)
+
+
+. 0 25480B70 8
+. 83 1E 04 CC 4B FF FD A0
+
+==== BB 1162 (0x25480914) approx BBs exec'd 0 ====
+
+ 0x25480914: 409E02C0 bc 4,30,0x25480BD4
+ 0: Jc30o $0x25480BD4
+
+
+. 0 25480914 4
+. 40 9E 02 C0
+
+==== BB 1163 (0x25480918) approx BBs exec'd 0 ====
+
+ 0x25480918: 3C98FE00 addis r4,r24,-512
+ 0: GETL R24, t0
+ 1: ADDL $0xFE000000, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x2548091C: 3C00FC00 lis r0,-1024
+ 4: MOVL $0xFC000000, t2
+ 5: PUTL t2, R0
+ 6: INCEIPL $4
+
+ 0x25480920: 38640003 addi r3,r4,3
+ 7: GETL R4, t4
+ 8: ADDL $0x3, t4
+ 9: PUTL t4, R3
+ 10: INCEIPL $4
+
+ 0x25480924: 60060002 ori r6,r0,0x2
+ 11: MOVL $0xFC000002, t6
+ 12: PUTL t6, R6
+ 13: INCEIPL $4
+
+ 0x25480928: 39800000 li r12,0
+ 14: MOVL $0x0, t8
+ 15: PUTL t8, R12
+ 16: INCEIPL $4
+
+ 0x2548092C: 7F033040 cmpl cr6,r3,r6
+ 17: GETL R3, t10
+ 18: GETL R6, t12
+ 19: CMPUL t10, t12, t14 (-rSo)
+ 20: ICRFL t14, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x25480930: 618A8000 ori r10,r12,0x8000
+ 22: MOVL $0x8000, t16
+ 23: PUTL t16, R10
+ 24: INCEIPL $4
+
+ 0x25480934: 7CBA00D0 neg r5,r26
+ 25: GETL R26, t18
+ 26: NEGL t18
+ 27: PUTL t18, R5
+ 28: INCEIPL $4
+
+ 0x25480938: 7D1A5050 subf r8,r26,r10
+ 29: GETL R26, t20
+ 30: GETL R10, t22
+ 31: SUBL t20, t22
+ 32: PUTL t22, R8
+ 33: INCEIPL $4
+
+ 0x2548093C: 54A9043E rlwinm r9,r5,0,16,31
+ 34: GETL R5, t24
+ 35: ANDL $0xFFFF, t24
+ 36: PUTL t24, R9
+ 37: INCEIPL $4
+
+ 0x25480940: 5507843E rlwinm r7,r8,16,16,31
+ 38: GETL R8, t26
+ 39: SHRL $0x10, t26
+ 40: PUTL t26, R7
+ 41: INCEIPL $4
+
+ 0x25480944: 3D60556C lis r11,21868
+ 42: MOVL $0x556C0000, t28
+ 43: PUTL t28, R11
+ 44: INCEIPL $4
+
+ 0x25480948: 3C807D6C lis r4,32108
+ 45: MOVL $0x7D6C0000, t30
+ 46: PUTL t30, R4
+ 47: INCEIPL $4
+
+ 0x2548094C: 64E03D6B oris r0,r7,0x3D6B
+ 48: GETL R7, t32
+ 49: ORL $0x3D6B0000, t32
+ 50: PUTL t32, R0
+ 51: INCEIPL $4
+
+ 0x25480950: 6523396B oris r3,r9,0x396B
+ 52: GETL R9, t34
+ 53: ORL $0x396B0000, t34
+ 54: PUTL t34, R3
+ 55: INCEIPL $4
+
+ 0x25480954: 6166083C ori r6,r11,0x83C
+ 56: MOVL $0x556C083C, t36
+ 57: PUTL t36, R6
+ 58: INCEIPL $4
+
+ 0x25480958: 608C5A14 ori r12,r4,0x5A14
+ 59: MOVL $0x7D6C5A14, t38
+ 60: PUTL t38, R12
+ 61: INCEIPL $4
+
+ 0x2548095C: 901C0000 stw r0,0(r28)
+ 62: GETL R0, t40
+ 63: GETL R28, t42
+ 64: STL t40, (t42)
+ 65: INCEIPL $4
+
+ 0x25480960: 907C0004 stw r3,4(r28)
+ 66: GETL R3, t44
+ 67: GETL R28, t46
+ 68: ADDL $0x4, t46
+ 69: STL t44, (t46)
+ 70: INCEIPL $4
+
+ 0x25480964: 90DC0008 stw r6,8(r28)
+ 71: GETL R6, t48
+ 72: GETL R28, t50
+ 73: ADDL $0x8, t50
+ 74: STL t48, (t50)
+ 75: INCEIPL $4
+
+ 0x25480968: 919C000C stw r12,12(r28)
+ 76: GETL R12, t52
+ 77: GETL R28, t54
+ 78: ADDL $0xC, t54
+ 79: STL t52, (t54)
+ 80: INCEIPL $4
+
+ 0x2548096C: 4099020C bc 4,25,0x25480B78
+ 81: Jc25o $0x25480B78
+
+
+. 0 25480918 88
+. 3C 98 FE 00 3C 00 FC 00 38 64 00 03 60 06 00 02 39 80 00 00 7F 03 30 40 61 8A 80 00 7C BA 00 D0 7D 1A 50 50 54 A9 04 3E 55 07 84 3E 3D 60 55 6C 3C 80 7D 6C 64 E0 3D 6B 65 23 39 6B 61 66 08 3C 60 8C 5A 14 90 1C 00 00 90 7C 00 04 90 DC 00 08 91 9C 00 0C 40 99 02 0C
+
+==== BB 1164 (0x25480B78) approx BBs exec'd 0 ====
+
+ 0x25480B78: 3C980001 addis r4,r24,1
+ 0: GETL R24, t0
+ 1: ADDL $0x10000, t0
+ 2: PUTL t0, R4
+ 3: INCEIPL $4
+
+ 0x25480B7C: 3C7D0001 addis r3,r29,1
+ 4: GETL R29, t2
+ 5: ADDL $0x10000, t2
+ 6: PUTL t2, R3
+ 7: INCEIPL $4
+
+ 0x25480B80: 38C48000 addi r6,r4,-32768
+ 8: GETL R4, t4
+ 9: ADDL $0xFFFF8000, t4
+ 10: PUTL t4, R6
+ 11: INCEIPL $4
+
+ 0x25480B84: 39838000 addi r12,r3,-32768
+ 12: GETL R3, t6
+ 13: ADDL $0xFFFF8000, t6
+ 14: PUTL t6, R12
+ 15: INCEIPL $4
+
+ 0x25480B88: 54C9843E rlwinm r9,r6,16,16,31
+ 16: GETL R6, t8
+ 17: SHRL $0x10, t8
+ 18: PUTL t8, R9
+ 19: INCEIPL $4
+
+ 0x25480B8C: 57A7043E rlwinm r7,r29,0,16,31
+ 20: GETL R29, t10
+ 21: ANDL $0xFFFF, t10
+ 22: PUTL t10, R7
+ 23: INCEIPL $4
+
+ 0x25480B90: 5708043E rlwinm r8,r24,0,16,31
+ 24: GETL R24, t12
+ 25: ANDL $0xFFFF, t12
+ 26: PUTL t12, R8
+ 27: INCEIPL $4
+
+ 0x25480B94: 558B843E rlwinm r11,r12,16,16,31
+ 28: GETL R12, t14
+ 29: SHRL $0x10, t14
+ 30: PUTL t14, R11
+ 31: INCEIPL $4
+
+ 0x25480B98: 3D407D89 lis r10,32137
+ 32: MOVL $0x7D890000, t16
+ 33: PUTL t16, R10
+ 34: INCEIPL $4
+
+ 0x25480B9C: 3CA04E80 lis r5,20096
+ 35: MOVL $0x4E800000, t18
+ 36: PUTL t18, R5
+ 37: INCEIPL $4
+
+ 0x25480BA0: 65183980 oris r24,r8,0x3980
+ 38: GETL R8, t20
+ 39: ORL $0x39800000, t20
+ 40: PUTL t20, R24
+ 41: INCEIPL $4
+
+ 0x25480BA4: 653D3D8C oris r29,r9,0x3D8C
+ 42: GETL R9, t22
+ 43: ORL $0x3D8C0000, t22
+ 44: PUTL t22, R29
+ 45: INCEIPL $4
+
+ 0x25480BA8: 614403A6 ori r4,r10,0x3A6
+ 46: MOVL $0x7D8903A6, t24
+ 47: PUTL t24, R4
+ 48: INCEIPL $4
+
+ 0x25480BAC: 64E33980 oris r3,r7,0x3980
+ 49: GETL R7, t26
+ 50: ORL $0x39800000, t26
+ 51: PUTL t26, R3
+ 52: INCEIPL $4
+
+ 0x25480BB0: 65663D8C oris r6,r11,0x3D8C
+ 53: GETL R11, t28
+ 54: ORL $0x3D8C0000, t28
+ 55: PUTL t28, R6
+ 56: INCEIPL $4
+
+ 0x25480BB4: 60A00420 ori r0,r5,0x420
+ 57: MOVL $0x4E800420, t30
+ 58: PUTL t30, R0
+ 59: INCEIPL $4
+
+ 0x25480BB8: 901C0024 stw r0,36(r28)
+ 60: GETL R0, t32
+ 61: GETL R28, t34
+ 62: ADDL $0x24, t34
+ 63: STL t32, (t34)
+ 64: INCEIPL $4
+
+ 0x25480BBC: 931C0010 stw r24,16(r28)
+ 65: GETL R24, t36
+ 66: GETL R28, t38
+ 67: ADDL $0x10, t38
+ 68: STL t36, (t38)
+ 69: INCEIPL $4
+
+ 0x25480BC0: 93BC0014 stw r29,20(r28)
+ 70: GETL R29, t40
+ 71: GETL R28, t42
+ 72: ADDL $0x14, t42
+ 73: STL t40, (t42)
+ 74: INCEIPL $4
+
+ 0x25480BC4: 909C0018 stw r4,24(r28)
+ 75: GETL R4, t44
+ 76: GETL R28, t46
+ 77: ADDL $0x18, t46
+ 78: STL t44, (t46)
+ 79: INCEIPL $4
+
+ 0x25480BC8: 907C001C stw r3,28(r28)
+ 80: GETL R3, t48
+ 81: GETL R28, t50
+ 82: ADDL $0x1C, t50
+ 83: STL t48, (t50)
+ 84: INCEIPL $4
+
+ 0x25480BCC: 90DC0020 stw r6,32(r28)
+ 85: GETL R6, t52
+ 86: GETL R28, t54
+ 87: ADDL $0x20, t54
+ 88: STL t52, (t54)
+ 89: INCEIPL $4
+
+ 0x25480BD0: 4BFFFDD0 b 0x254809A0
+ 90: JMPo $0x254809A0 ($4)
+
+
+. 0 25480B78 92
+. 3C 98 00 01 3C 7D 00 01 38 C4 80 00 39 83 80 00 54 C9 84 3E 57 A7 04 3E 57 08 04 3E 55 8B 84 3E 3D 40 7D 89 3C A0 4E 80 65 18 39 80 65 3D 3D 8C 61 44 03 A6 64 E3 39 80 65 66 3D 8C 60 A0 04 20 90 1C 00 24 93 1C 00 10 93 BC 00 14 90 9C 00 18 90 7C 00 1C 90 DC 00 20 4B FF FD D0
+
+==== BB 1165 (0x254809A0) approx BBs exec'd 0 ====
+
+ 0x254809A0: 39000000 li r8,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R8
+ 2: INCEIPL $4
+
+ 0x254809A4: 38800012 li r4,18
+ 3: MOVL $0x12, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x254809A8: 7F88D840 cmpl cr7,r8,r27
+ 6: GETL R8, t4
+ 7: GETL R27, t6
+ 8: CMPUL t4, t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0x254809AC: 409C0054 bc 4,28,0x25480A00
+ 11: Jc28o $0x25480A00
+
+
+. 0 254809A0 16
+. 39 00 00 00 38 80 00 12 7F 88 D8 40 40 9C 00 54
+
+==== BB 1166 (0x254809B0) approx BBs exec'd 0 ====
+
+ 0x254809B0: 38E0FFD4 li r7,-44
+ 0: MOVL $0xFFFFFFD4, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x254809B4: 550A143A rlwinm r10,r8,2,16,29
+ 3: GETL R8, t2
+ 4: ROLL $0x2, t2
+ 5: ANDL $0xFFFC, t2
+ 6: PUTL t2, R10
+ 7: INCEIPL $4
+
+ 0x254809B8: 39080001 addi r8,r8,1
+ 8: GETL R8, t4
+ 9: ADDL $0x1, t4
+ 10: PUTL t4, R8
+ 11: INCEIPL $4
+
+ 0x254809BC: 7D7B4010 subfc r11,r27,r8
+ 12: GETL R27, t6
+ 13: GETL R8, t8
+ 14: SBBL t6, t8 (-wCa)
+ 15: PUTL t8, R11
+ 16: INCEIPL $4
+
+ 0x254809C0: 7D6B5910 subfe r11,r11,r11
+ 17: GETL R11, t10
+ 18: GETL R11, t12
+ 19: SBBL t10, t12 (-rCa-wCa)
+ 20: PUTL t12, R11
+ 21: INCEIPL $4
+
+ 0x254809C4: 7D6B00D0 neg r11,r11
+ 22: GETL R11, t14
+ 23: NEGL t14
+ 24: PUTL t14, R11
+ 25: INCEIPL $4
+
+ 0x254809C8: 21881FFF subfic r12,r8,8191
+ 26: GETL R8, t16
+ 27: MOVL $0x1FFF, t18
+ 28: SBBL t16, t18 (-wCa)
+ 29: PUTL t18, R12
+ 30: INCEIPL $4
+
+ 0x254809CC: 39800000 li r12,0
+ 31: MOVL $0x0, t20
+ 32: PUTL t20, R12
+ 33: INCEIPL $4
+
+ 0x254809D0: 7D8C6114 adde r12,r12,r12
+ 34: GETL R12, t22
+ 35: GETL R12, t24
+ 36: ADCL t22, t24 (-rCa-wCa)
+ 37: PUTL t24, R12
+ 38: INCEIPL $4
+
+ 0x254809D4: 7D696039 and. r9,r11,r12
+ 39: GETL R11, t26
+ 40: GETL R12, t28
+ 41: ANDL t26, t28
+ 42: PUTL t28, R9
+ 43: CMP0L t28, t30 (-rSo)
+ 44: ICRFL t30, $0x0, CR
+ 45: INCEIPL $4
+
+ 0x254809D8: 5498103A rlwinm r24,r4,2,0,29
+ 46: GETL R4, t32
+ 47: SHLL $0x2, t32
+ 48: PUTL t32, R24
+ 49: INCEIPL $4
+
+ 0x254809DC: 54E501BA rlwinm r5,r7,0,6,29
+ 50: GETL R7, t34
+ 51: ANDL $0x3FFFFFC, t34
+ 52: PUTL t34, R5
+ 53: INCEIPL $4
+
+ 0x254809E0: 65403960 oris r0,r10,0x3960
+ 54: GETL R10, t36
+ 55: ORL $0x39600000, t36
+ 56: PUTL t36, R0
+ 57: INCEIPL $4
+
+ 0x254809E4: 64BD4800 oris r29,r5,0x4800
+ 58: GETL R5, t38
+ 59: ORL $0x48000000, t38
+ 60: PUTL t38, R29
+ 61: INCEIPL $4
+
+ 0x254809E8: 7F98FA14 add r28,r24,r31
+ 62: GETL R24, t40
+ 63: GETL R31, t42
+ 64: ADDL t40, t42
+ 65: PUTL t42, R28
+ 66: INCEIPL $4
+
+ 0x254809EC: 7C18F92E stwx r0,r24,r31
+ 67: GETL R31, t44
+ 68: GETL R24, t46
+ 69: ADDL t46, t44
+ 70: GETL R0, t48
+ 71: STL t48, (t44)
+ 72: INCEIPL $4
+
+ 0x254809F0: 38840002 addi r4,r4,2
+ 73: GETL R4, t50
+ 74: ADDL $0x2, t50
+ 75: PUTL t50, R4
+ 76: INCEIPL $4
+
+ 0x254809F4: 93BC0004 stw r29,4(r28)
+ 77: GETL R29, t52
+ 78: GETL R28, t54
+ 79: ADDL $0x4, t54
+ 80: STL t52, (t54)
+ 81: INCEIPL $4
+
+ 0x254809F8: 38E7FFF8 addi r7,r7,-8
+ 82: MOVL $0xFFFFFFCC, t56
+ 83: PUTL t56, R7
+ 84: INCEIPL $4
+
+ 0x254809FC: 4082FFB8 bc 4,2,0x254809B4
+ 85: Jc02o $0x254809B4
+
+
+. 0 254809B0 80
+. 38 E0 FF D4 55 0A 14 3A 39 08 00 01 7D 7B 40 10 7D 6B 59 10 7D 6B 00 D0 21 88 1F FF 39 80 00 00 7D 8C 61 14 7D 69 60 39 54 98 10 3A 54 E5 01 BA 65 40 39 60 64 BD 48 00 7F 98 FA 14 7C 18 F9 2E 38 84 00 02 93 BC 00 04 38 E7 FF F8 40 82 FF B8
+
+==== BB 1167 (0x254809B4) approx BBs exec'd 0 ====
+
+ 0x254809B4: 550A143A rlwinm r10,r8,2,16,29
+ 0: GETL R8, t0
+ 1: ROLL $0x2, t0
+ 2: ANDL $0xFFFC, t0
+ 3: PUTL t0, R10
+ 4: INCEIPL $4
+
+ 0x254809B8: 39080001 addi r8,r8,1
+ 5: GETL R8, t2
+ 6: ADDL $0x1, t2
+ 7: PUTL t2, R8
+ 8: INCEIPL $4
+
+ 0x254809BC: 7D7B4010 subfc r11,r27,r8
+ 9: GETL R27, t4
+ 10: GETL R8, t6
+ 11: SBBL t4, t6 (-wCa)
+ 12: PUTL t6, R11
+ 13: INCEIPL $4
+
+ 0x254809C0: 7D6B5910 subfe r11,r11,r11
+ 14: GETL R11, t8
+ 15: GETL R11, t10
+ 16: SBBL t8, t10 (-rCa-wCa)
+ 17: PUTL t10, R11
+ 18: INCEIPL $4
+
+ 0x254809C4: 7D6B00D0 neg r11,r11
+ 19: GETL R11, t12
+ 20: NEGL t12
+ 21: PUTL t12, R11
+ 22: INCEIPL $4
+
+ 0x254809C8: 21881FFF subfic r12,r8,8191
+ 23: GETL R8, t14
+ 24: MOVL $0x1FFF, t16
+ 25: SBBL t14, t16 (-wCa)
+ 26: PUTL t16, R12
+ 27: INCEIPL $4
+
+ 0x254809CC: 39800000 li r12,0
+ 28: MOVL $0x0, t18
+ 29: PUTL t18, R12
+ 30: INCEIPL $4
+
+ 0x254809D0: 7D8C6114 adde r12,r12,r12
+ 31: GETL R12, t20
+ 32: GETL R12, t22
+ 33: ADCL t20, t22 (-rCa-wCa)
+ 34: PUTL t22, R12
+ 35: INCEIPL $4
+
+ 0x254809D4: 7D696039 and. r9,r11,r12
+ 36: GETL R11, t24
+ 37: GETL R12, t26
+ 38: ANDL t24, t26
+ 39: PUTL t26, R9
+ 40: CMP0L t26, t28 (-rSo)
+ 41: ICRFL t28, $0x0, CR
+ 42: INCEIPL $4
+
+ 0x254809D8: 5498103A rlwinm r24,r4,2,0,29
+ 43: GETL R4, t30
+ 44: SHLL $0x2, t30
+ 45: PUTL t30, R24
+ 46: INCEIPL $4
+
+ 0x254809DC: 54E501BA rlwinm r5,r7,0,6,29
+ 47: GETL R7, t32
+ 48: ANDL $0x3FFFFFC, t32
+ 49: PUTL t32, R5
+ 50: INCEIPL $4
+
+ 0x254809E0: 65403960 oris r0,r10,0x3960
+ 51: GETL R10, t34
+ 52: ORL $0x39600000, t34
+ 53: PUTL t34, R0
+ 54: INCEIPL $4
+
+ 0x254809E4: 64BD4800 oris r29,r5,0x4800
+ 55: GETL R5, t36
+ 56: ORL $0x48000000, t36
+ 57: PUTL t36, R29
+ 58: INCEIPL $4
+
+ 0x254809E8: 7F98FA14 add r28,r24,r31
+ 59: GETL R24, t38
+ 60: GETL R31, t40
+ 61: ADDL t38, t40
+ 62: PUTL t40, R28
+ 63: INCEIPL $4
+
+ 0x254809EC: 7C18F92E stwx r0,r24,r31
+ 64: GETL R31, t42
+ 65: GETL R24, t44
+ 66: ADDL t44, t42
+ 67: GETL R0, t46
+ 68: STL t46, (t42)
+ 69: INCEIPL $4
+
+ 0x254809F0: 38840002 addi r4,r4,2
+ 70: GETL R4, t48
+ 71: ADDL $0x2, t48
+ 72: PUTL t48, R4
+ 73: INCEIPL $4
+
+ 0x254809F4: 93BC0004 stw r29,4(r28)
+ 74: GETL R29, t50
+ 75: GETL R28, t52
+ 76: ADDL $0x4, t52
+ 77: STL t50, (t52)
+ 78: INCEIPL $4
+
+ 0x254809F8: 38E7FFF8 addi r7,r7,-8
+ 79: GETL R7, t54
+ 80: ADDL $0xFFFFFFF8, t54
+ 81: PUTL t54, R7
+ 82: INCEIPL $4
+
+ 0x254809FC: 4082FFB8 bc 4,2,0x254809B4
+ 83: Jc02o $0x254809B4
+
+
+. 0 254809B4 76
+. 55 0A 14 3A 39 08 00 01 7D 7B 40 10 7D 6B 59 10 7D 6B 00 D0 21 88 1F FF 39 80 00 00 7D 8C 61 14 7D 69 60 39 54 98 10 3A 54 E5 01 BA 65 40 39 60 64 BD 48 00 7F 98 FA 14 7C 18 F9 2E 38 84 00 02 93 BC 00 04 38 E7 FF F8 40 82 FF B8
+
+==== BB 1168 (0x25480A00) approx BBs exec'd 0 ====
+
+ 0x25480A00: 7C88D840 cmpl cr1,r8,r27
+ 0: GETL R8, t0
+ 1: GETL R27, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25480A04: 40840074 bc 4,4,0x25480A78
+ 5: Jc04o $0x25480A78
+
+
+. 0 25480A00 8
+. 7C 88 D8 40 40 84 00 74
+
+==== BB 1169 (0x25480A98) approx BBs exec'd 0 ====
+
+ 0x25480A98: 800B0000 lwz r0,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0x25480A9C: 2F000000 cmpi cr6,r0,0
+ 4: GETL R0, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x25480AA0: 409A00C4 bc 4,26,0x25480B64
+ 8: Jc26o $0x25480B64
+
+
+. 0 25480A98 12
+. 80 0B 00 00 2F 00 00 00 40 9A 00 C4
+
+==== BB 1170 (0x25480B64) approx BBs exec'd 0 ====
+
+ 0x25480B64: 7C0A1670 srawi r10,r0,2
+ 0: GETL R0, t0
+ 1: SARL $0x2, t0 (-wCa)
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0x25480B68: 7D4A0194 addze r10,r10
+ 4: GETL R10, t2
+ 5: ADCL $0x0, t2 (-rCa-wCa)
+ 6: PUTL t2, R10
+ 7: INCEIPL $4
+
+ 0x25480B6C: 4BFFFF38 b 0x25480AA4
+ 8: JMPo $0x25480AA4 ($4)
+
+
+. 0 25480B64 12
+. 7C 0A 16 70 7D 4A 01 94 4B FF FF 38
+
+==== BB 1171 (0x25480AA8) approx BBs exec'd 0 ====
+
+ 0x25480AA8: 7EEBBB78 or r11,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x25480AAC: 39200000 li r9,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x25480AB0: 48000014 b 0x25480AC4
+ 6: JMPo $0x25480AC4 ($4)
+
+
+. 0 25480AA8 12
+. 7E EB BB 78 39 20 00 00 48 00 00 14
+
+==== BB 1172 (0x254796D0) approx BBs exec'd 0 ====
+
+ 0x254796D0: 817D0070 lwz r11,112(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x70, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254796D4: 2F0B0000 cmpi cr6,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x254796D8: 409A033C bc 4,26,0x25479A14
+ 9: Jc26o $0x25479A14
+
+
+. 0 254796D0 12
+. 81 7D 00 70 2F 0B 00 00 40 9A 03 3C
+
+==== BB 1173 (0x25479A14) approx BBs exec'd 0 ====
+
+ 0x25479A14: 835D007C lwz r26,124(r29)
+ 0: GETL R29, t0
+ 1: ADDL $0x7C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x25479A18: 833D0028 lwz r25,40(r29)
+ 5: GETL R29, t4
+ 6: ADDL $0x28, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0x25479A1C: 829A0004 lwz r20,4(r26)
+ 10: GETL R26, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R20
+ 14: INCEIPL $4
+
+ 0x25479A20: 82BF0020 lwz r21,32(r31)
+ 15: GETL R31, t12
+ 16: ADDL $0x20, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R21
+ 19: INCEIPL $4
+
+ 0x25479A24: 929F002C stw r20,44(r31)
+ 20: GETL R20, t16
+ 21: GETL R31, t18
+ 22: ADDL $0x2C, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0x25479A28: 82590004 lwz r18,4(r25)
+ 25: GETL R25, t20
+ 26: ADDL $0x4, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R18
+ 29: INCEIPL $4
+
+ 0x25479A2C: 7D553214 add r10,r21,r6
+ 30: GETL R21, t24
+ 31: GETL R6, t26
+ 32: ADDL t24, t26
+ 33: PUTL t26, R10
+ 34: INCEIPL $4
+
+ 0x25479A30: 7D35A050 subf r9,r21,r20
+ 35: GETL R21, t28
+ 36: GETL R20, t30
+ 37: SUBL t28, t30
+ 38: PUTL t30, R9
+ 39: INCEIPL $4
+
+ 0x25479A34: 7E149214 add r16,r20,r18
+ 40: GETL R20, t32
+ 41: GETL R18, t34
+ 42: ADDL t32, t34
+ 43: PUTL t34, R16
+ 44: INCEIPL $4
+
+ 0x25479A38: 913F0024 stw r9,36(r31)
+ 45: GETL R9, t36
+ 46: GETL R31, t38
+ 47: ADDL $0x24, t38
+ 48: STL t36, (t38)
+ 49: INCEIPL $4
+
+ 0x25479A3C: 7E705050 subf r19,r16,r10
+ 50: GETL R16, t40
+ 51: GETL R10, t42
+ 52: SUBL t40, t42
+ 53: PUTL t42, R19
+ 54: INCEIPL $4
+
+ 0x25479A40: 925F0030 stw r18,48(r31)
+ 55: GETL R18, t44
+ 56: GETL R31, t46
+ 57: ADDL $0x30, t46
+ 58: STL t44, (t46)
+ 59: INCEIPL $4
+
+ 0x25479A44: 927F003C stw r19,60(r31)
+ 60: GETL R19, t48
+ 61: GETL R31, t50
+ 62: ADDL $0x3C, t50
+ 63: STL t48, (t50)
+ 64: INCEIPL $4
+
+ 0x25479A48: 921F0038 stw r16,56(r31)
+ 65: GETL R16, t52
+ 66: GETL R31, t54
+ 67: ADDL $0x38, t54
+ 68: STL t52, (t54)
+ 69: INCEIPL $4
+
+ 0x25479A4C: 4BFFFC90 b 0x254796DC
+ 70: JMPo $0x254796DC ($4)
+
+
+. 0 25479A14 60
+. 83 5D 00 7C 83 3D 00 28 82 9A 00 04 82 BF 00 20 92 9F 00 2C 82 59 00 04 7D 55 32 14 7D 35 A0 50 7E 14 92 14 91 3F 00 24 7E 70 50 50 92 5F 00 30 92 7F 00 3C 92 1F 00 38 4B FF FC 90
+
+==== BB 1174 (0x254799E0) approx BBs exec'd 0 ====
+
+ 0x254799E0: 7F8BE040 cmpl cr7,r11,r28
+ 0: GETL R11, t0
+ 1: GETL R28, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x254799E4: 40BCFE40 bc 5,28,0x25479824
+ 5: Jc28o $0x25479824
+
+
+. 0 254799E0 8
+. 7F 8B E0 40 40 BC FE 40
+
+==== BB 1175 (0x254799E8) approx BBs exec'd 0 ====
+
+ 0x254799E8: 812B0008 lwz r9,8(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x254799EC: 808B0000 lwz r4,0(r11)
+ 5: GETL R11, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x254799F0: 396B000C addi r11,r11,12
+ 9: GETL R11, t8
+ 10: ADDL $0xC, t8
+ 11: PUTL t8, R11
+ 12: INCEIPL $4
+
+ 0x254799F4: 7F8BE040 cmpl cr7,r11,r28
+ 13: GETL R11, t10
+ 14: GETL R28, t12
+ 15: CMPUL t10, t12, t14 (-rSo)
+ 16: ICRFL t14, $0x7, CR
+ 17: INCEIPL $4
+
+ 0x254799F8: 7D09CA14 add r8,r9,r25
+ 18: GETL R9, t16
+ 19: GETL R25, t18
+ 20: ADDL t16, t18
+ 21: PUTL t18, R8
+ 22: INCEIPL $4
+
+ 0x254799FC: 7D04C92E stwx r8,r4,r25
+ 23: GETL R25, t20
+ 24: GETL R4, t22
+ 25: ADDL t22, t20
+ 26: GETL R8, t24
+ 27: STL t24, (t20)
+ 28: INCEIPL $4
+
+ 0x25479A00: 4BFFFFE4 b 0x254799E4
+ 29: JMPo $0x254799E4 ($4)
+
+
+. 0 254799E8 28
+. 81 2B 00 08 80 8B 00 00 39 6B 00 0C 7F 8B E0 40 7D 09 CA 14 7D 04 C9 2E 4B FF FF E4
+
+==== BB 1176 (0x254799E4) approx BBs exec'd 0 ====
+
+ 0x254799E4: 40BCFE40 bc 5,28,0x25479824
+ 0: Jc28o $0x25479824
+
+
+. 0 254799E4 4
+. 40 BC FE 40
+
+==== BB 1177 (0x25479714) approx BBs exec'd 0 ====
+
+ 0x25479714: 3929000C addi r9,r9,12
+ 0: GETL R9, t0
+ 1: ADDL $0xC, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x25479718: 7F89C040 cmpl cr7,r9,r24
+ 4: GETL R9, t2
+ 5: GETL R24, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547971C: 419CFFF8 bc 12,28,0x25479714
+ 9: Js28o $0x25479714
+
+
+. 0 25479714 12
+. 39 29 00 0C 7F 89 C0 40 41 9C FF F8
+
+==== BB 1178 (0x254797E0) approx BBs exec'd 0 ====
+
+ 0x254797E0: 3C00AAAA lis r0,-21846
+ 0: MOVL $0xAAAA0000, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254797E4: 600CAAAB ori r12,r0,0xAAAB
+ 3: MOVL $0xAAAAAAAB, t2
+ 4: PUTL t2, R12
+ 5: INCEIPL $4
+
+ 0x254797E8: 7EE86016 mulhwu r23,r8,r12
+ 6: GETL R8, t4
+ 7: GETL R12, t6
+ 8: UMULHL t4, t6
+ 9: PUTL t6, R23
+ 10: INCEIPL $4
+
+ 0x254797EC: 56E9E8FE rlwinm r9,r23,29,3,31
+ 11: GETL R23, t8
+ 12: SHRL $0x3, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x254797F0: 7C893840 cmpl cr1,r9,r7
+ 15: GETL R9, t10
+ 16: GETL R7, t12
+ 17: CMPUL t10, t12, t14 (-rSo)
+ 18: ICRFL t14, $0x1, CR
+ 19: INCEIPL $4
+
+ 0x254797F4: 40850008 bc 4,5,0x254797FC
+ 20: Jc05o $0x254797FC
+
+
+. 0 254797E0 24
+. 3C 00 AA AA 60 0C AA AB 7E E8 60 16 56 E9 E8 FE 7C 89 38 40 40 85 00 08
+
+==== BB 1179 (0x254733C0) approx BBs exec'd 0 ====
+
+ 0x254733C0: 4800C225 bl 0x2547F5E4
+ 0: MOVL $0x254733C4, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x2547F5E4 ($4)
+
+
+. 0 254733C0 4
+. 48 00 C2 25
+
+==== BB 1180 _dl_sysdep_start_cleanup(0x2547F5E4) approx BBs exec'd 0 ====
+
+ 0x2547F5E4: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547F5E8: 38210010 addi r1,r1,16
+ 6: GETL R1, t4
+ 7: ADDL $0x10, t4
+ 8: PUTL t4, R1
+ 9: INCEIPL $4
+
+ 0x2547F5EC: 4E800020 blr
+ 10: GETL LR, t6
+ 11: JMPo-r t6 ($4)
+
+
+. 0 2547F5E4 12
+. 94 21 FF F0 38 21 00 10 4E 80 00 20
+
+==== BB 1181 (0x254733C4) approx BBs exec'd 0 ====
+
+ 0x254733C4: 80CE01A4 lwz r6,420(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x1A4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x254733C8: 2C060000 cmpi cr0,r6,0
+ 5: GETL R6, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x254733CC: 4082094C bc 4,2,0x25473D18
+ 9: Jc02o $0x25473D18
+
+
+. 0 254733C4 12
+. 80 CE 01 A4 2C 06 00 00 40 82 09 4C
+
+==== BB 1182 (0x254733D0) approx BBs exec'd 0 ====
+
+ 0x254733D0: 816E0330 lwz r11,816(r14)
+ 0: GETL R14, t0
+ 1: ADDL $0x330, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x254733D4: 2B0B0001 cmpli cr6,r11,1
+ 5: GETL R11, t4
+ 6: MOVL $0x1, t8
+ 7: CMPUL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0x254733D8: 4099F784 bc 4,25,0x25472B5C
+ 10: Jc25o $0x25472B5C
+
+
+. 0 254733D0 12
+. 81 6E 03 30 2B 0B 00 01 40 99 F7 84
+
+==== BB 1183 (0x254733DC) approx BBs exec'd 0 ====
+
+ 0x254733DC: 809401C0 lwz r4,448(r20)
+ 0: GETL R20, t0
+ 1: ADDL $0x1C0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254733E0: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x254733E4: 38A00000 li r5,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R5
+ 10: INCEIPL $4
+
+ 0x254733E8: 38C00000 li r6,0
+ 11: MOVL $0x0, t8
+ 12: PUTL t8, R6
+ 13: INCEIPL $4
+
+ 0x254733EC: 480061D5 bl 0x254795C0
+ 14: MOVL $0x254733F0, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x254795C0 ($4)
+
+
+. 0 254733DC 20
+. 80 94 01 C0 7F 83 E3 78 38 A0 00 00 38 C0 00 00 48 00 61 D5
+
+==== BB 1184 (0x254733F0) approx BBs exec'd 0 ====
+
+ 0x254733F0: 4BFFF76C b 0x25472B5C
+ 0: JMPo $0x25472B5C ($4)
+
+
+. 0 254733F0 4
+. 4B FF F7 6C
+
+==== BB 1185 (0x25472B5C) approx BBs exec'd 0 ====
+
+ 0x25472B5C: 7E238B78 or r3,r17,r17
+ 0: GETL R17, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x25472B60: 4800B479 bl 0x2547DFD8
+ 3: MOVL $0x25472B64, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0x2547DFD8 ($4)
+
+
+. 0 25472B5C 8
+. 7E 23 8B 78 48 00 B4 79
+
+==== BB 1186 __GI__dl_allocate_tls_init(0x2547DFD8) approx BBs exec'd 0 ====
+
+ 0x2547DFD8: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547DFDC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547DFE0: 93210014 stw r25,20(r1)
+ 9: GETL R25, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547DFE4: 7C791B79 or. r25,r3,r3
+ 14: GETL R3, t10
+ 15: PUTL t10, R25
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0x2547DFE8: 48019019 bl 0x25497000
+ 19: MOVL $0x2547DFEC, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547DFD8 20
+. 94 21 FF D0 7C 08 02 A6 93 21 00 14 7C 79 1B 79 48 01 90 19
+
+==== BB 1187 (0x2547DFEC) approx BBs exec'd 0 ====
+
+ 0x2547DFEC: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547DFF0: 92E1000C stw r23,12(r1)
+ 5: GETL R23, t4
+ 6: GETL R1, t6
+ 7: ADDL $0xC, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547DFF4: 7FC802A6 mflr r30
+ 10: GETL LR, t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0x2547DFF8: 93010010 stw r24,16(r1)
+ 13: GETL R24, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x10, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547DFFC: 38600000 li r3,0
+ 18: MOVL $0x0, t14
+ 19: PUTL t14, R3
+ 20: INCEIPL $4
+
+ 0x2547E000: 93410018 stw r26,24(r1)
+ 21: GETL R26, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x18, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547E004: 9361001C stw r27,28(r1)
+ 26: GETL R27, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x1C, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0x2547E008: 93810020 stw r28,32(r1)
+ 31: GETL R28, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x20, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547E00C: 93A10024 stw r29,36(r1)
+ 36: GETL R29, t28
+ 37: GETL R1, t30
+ 38: ADDL $0x24, t30
+ 39: STL t28, (t30)
+ 40: INCEIPL $4
+
+ 0x2547E010: 93E1002C stw r31,44(r1)
+ 41: GETL R31, t32
+ 42: GETL R1, t34
+ 43: ADDL $0x2C, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0x2547E014: 90010034 stw r0,52(r1)
+ 46: GETL R0, t36
+ 47: GETL R1, t38
+ 48: ADDL $0x34, t38
+ 49: STL t36, (t38)
+ 50: INCEIPL $4
+
+ 0x2547E018: 418200D8 bc 12,2,0x2547E0F0
+ 51: Js02o $0x2547E0F0
+
+
+. 0 2547DFEC 48
+. 93 C1 00 28 92 E1 00 0C 7F C8 02 A6 93 01 00 10 38 60 00 00 93 41 00 18 93 61 00 1C 93 81 00 20 93 A1 00 24 93 E1 00 2C 90 01 00 34 41 82 00 D8
+
+==== BB 1188 (0x2547E01C) approx BBs exec'd 0 ====
+
+ 0x2547E01C: 831E04C8 lwz r24,1224(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4C8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0x2547E020: 3B400000 li r26,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x2547E024: 82F9FFFC lwz r23,-4(r25)
+ 8: GETL R25, t6
+ 9: ADDL $0xFFFFFFFC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0x2547E028: 83780410 lwz r27,1040(r24)
+ 13: GETL R24, t10
+ 14: ADDL $0x410, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R27
+ 17: INCEIPL $4
+
+ 0x2547E02C: 817B0000 lwz r11,0(r27)
+ 18: GETL R27, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R11
+ 21: INCEIPL $4
+
+ 0x2547E030: 201A0000 subfic r0,r26,0
+ 22: GETL R26, t18
+ 23: MOVL $0x0, t20
+ 24: SBBL t18, t20 (-wCa)
+ 25: PUTL t20, R0
+ 26: INCEIPL $4
+
+ 0x2547E034: 7FE0D114 adde r31,r0,r26
+ 27: GETL R0, t22
+ 28: GETL R26, t24
+ 29: ADCL t22, t24 (-rCa-wCa)
+ 30: PUTL t24, R31
+ 31: INCEIPL $4
+
+ 0x2547E038: 7D3AFA14 add r9,r26,r31
+ 32: GETL R26, t26
+ 33: GETL R31, t28
+ 34: ADDL t26, t28
+ 35: PUTL t28, R9
+ 36: INCEIPL $4
+
+ 0x2547E03C: 7F8BF840 cmpl cr7,r11,r31
+ 37: GETL R11, t30
+ 38: GETL R31, t32
+ 39: CMPUL t30, t32, t34 (-rSo)
+ 40: ICRFL t34, $0x7, CR
+ 41: INCEIPL $4
+
+ 0x2547E040: 409D0064 bc 4,29,0x2547E0A4
+ 42: Jc29o $0x2547E0A4
+
+
+. 0 2547E01C 40
+. 83 1E 04 C8 3B 40 00 00 82 F9 FF FC 83 78 04 10 81 7B 00 00 20 1A 00 00 7F E0 D1 14 7D 3A FA 14 7F 8B F8 40 40 9D 00 64
+
+==== BB 1189 (0x2547E044) approx BBs exec'd 0 ====
+
+ 0x2547E044: 57E31838 rlwinm r3,r31,3,0,28
+ 0: GETL R31, t0
+ 1: SHLL $0x3, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0x2547E048: 7D23DA14 add r9,r3,r27
+ 4: GETL R3, t2
+ 5: GETL R27, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x2547E04C: 3B89000C addi r28,r9,12
+ 9: GETL R9, t6
+ 10: ADDL $0xC, t6
+ 11: PUTL t6, R28
+ 12: INCEIPL $4
+
+ 0x2547E050: 80980408 lwz r4,1032(r24)
+ 13: GETL R24, t8
+ 14: ADDL $0x408, t8
+ 15: LDL (t8), t10
+ 16: PUTL t10, R4
+ 17: INCEIPL $4
+
+ 0x2547E054: 7D3AFA14 add r9,r26,r31
+ 18: GETL R26, t12
+ 19: GETL R31, t14
+ 20: ADDL t12, t14
+ 21: PUTL t14, R9
+ 22: INCEIPL $4
+
+ 0x2547E058: 7C892040 cmpl cr1,r9,r4
+ 23: GETL R9, t16
+ 24: GETL R4, t18
+ 25: CMPUL t16, t18, t20 (-rSo)
+ 26: ICRFL t20, $0x1, CR
+ 27: INCEIPL $4
+
+ 0x2547E05C: 41850048 bc 12,5,0x2547E0A4
+ 28: Js05o $0x2547E0A4
+
+
+. 0 2547E044 28
+. 57 E3 18 38 7D 23 DA 14 3B 89 00 0C 80 98 04 08 7D 3A FA 14 7C 89 20 40 41 85 00 48
+
+==== BB 1190 (0x2547E060) approx BBs exec'd 0 ====
+
+ 0x2547E060: 813C0000 lwz r9,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547E064: 2F090000 cmpi cr6,r9,0
+ 4: GETL R9, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x6, CR
+ 7: INCEIPL $4
+
+ 0x2547E068: 419A0028 bc 12,26,0x2547E090
+ 8: Js26o $0x2547E090
+
+
+. 0 2547E060 12
+. 81 3C 00 00 2F 09 00 00 41 9A 00 28
+
+==== BB 1191 (0x2547E06C) approx BBs exec'd 0 ====
+
+ 0x2547E06C: 8169022C lwz r11,556(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x22C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547E070: 2C0BFFFF cmpi cr0,r11,-1
+ 5: GETL R11, t4
+ 6: MOVL $0xFFFFFFFF, t8
+ 7: CMPL t4, t8, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547E074: 7D4BCA14 add r10,r11,r25
+ 10: GETL R11, t10
+ 11: GETL R25, t12
+ 12: ADDL t10, t12
+ 13: PUTL t12, R10
+ 14: INCEIPL $4
+
+ 0x2547E078: 7D435378 or r3,r10,r10
+ 15: GETL R10, t14
+ 16: PUTL t14, R3
+ 17: INCEIPL $4
+
+ 0x2547E07C: 40820040 bc 4,2,0x2547E0BC
+ 18: Jc02o $0x2547E0BC
+
+
+. 0 2547E06C 20
+. 81 69 02 2C 2C 0B FF FF 7D 4B CA 14 7D 43 53 78 40 82 00 40
+
+==== BB 1192 (0x2547E0BC) approx BBs exec'd 0 ====
+
+ 0x2547E0BC: 81690230 lwz r11,560(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x230, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547E0C0: 5568103A rlwinm r8,r11,2,0,29
+ 5: GETL R11, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x2547E0C4: 7D48B92E stwx r10,r8,r23
+ 9: GETL R23, t6
+ 10: GETL R8, t8
+ 11: ADDL t8, t6
+ 12: GETL R10, t10
+ 13: STL t10, (t6)
+ 14: INCEIPL $4
+
+ 0x2547E0C8: 80A9021C lwz r5,540(r9)
+ 15: GETL R9, t12
+ 16: ADDL $0x21C, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R5
+ 19: INCEIPL $4
+
+ 0x2547E0CC: 80E90220 lwz r7,544(r9)
+ 20: GETL R9, t16
+ 21: ADDL $0x220, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R7
+ 24: INCEIPL $4
+
+ 0x2547E0D0: 80890218 lwz r4,536(r9)
+ 25: GETL R9, t20
+ 26: ADDL $0x218, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R4
+ 29: INCEIPL $4
+
+ 0x2547E0D4: 7FA53850 subf r29,r5,r7
+ 30: GETL R5, t24
+ 31: GETL R7, t26
+ 32: SUBL t24, t26
+ 33: PUTL t26, R29
+ 34: INCEIPL $4
+
+ 0x2547E0D8: 48005949 bl 0x25483A20
+ 35: MOVL $0x2547E0DC, t28
+ 36: PUTL t28, LR
+ 37: JMPo-c $0x25483A20 ($4)
+
+
+. 0 2547E0BC 32
+. 81 69 02 30 55 68 10 3A 7D 48 B9 2E 80 A9 02 1C 80 E9 02 20 80 89 02 18 7F A5 38 50 48 00 59 49
+
+==== BB 1193 (0x2547E0DC) approx BBs exec'd 0 ====
+
+ 0x2547E0DC: 7FA5EB78 or r5,r29,r29
+ 0: GETL R29, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0x2547E0E0: 38800000 li r4,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x2547E0E4: 48005661 bl 0x25483744
+ 6: MOVL $0x2547E0E8, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x25483744 ($4)
+
+
+. 0 2547E0DC 12
+. 7F A5 EB 78 38 80 00 00 48 00 56 61
+
+==== BB 1194 (0x25483920) approx BBs exec'd 0 ====
+
+ 0x25483920: 28850010 cmpli cr1,r5,16
+ 0: GETL R5, t0
+ 1: MOVL $0x10, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0x25483924: 7CC62A14 add r6,r6,r5
+ 5: GETL R6, t6
+ 6: GETL R5, t8
+ 7: ADDL t6, t8
+ 8: PUTL t8, R6
+ 9: INCEIPL $4
+
+ 0x25483928: 419F0020 bc 12,31,0x25483948
+ 10: Js31o $0x25483948
+
+
+. 0 25483920 12
+. 28 85 00 10 7C C6 2A 14 41 9F 00 20
+
+==== BB 1195 (0x25483934) approx BBs exec'd 0 ====
+
+ 0x25483934: 4084002C bc 4,4,0x25483960
+ 0: Jc04o $0x25483960
+
+
+. 0 25483934 4
+. 40 84 00 2C
+
+==== BB 1196 (0x25483938) approx BBs exec'd 0 ====
+
+ 0x25483938: 4C9C0020 bclr 4,28
+ 0: GETL LR, t0
+ 1: Jc28o-r t0
+
+
+. 0 25483938 4
+. 4C 9C 00 20
+
+==== BB 1197 (0x2548393C) approx BBs exec'd 0 ====
+
+ 0x2548393C: 9086FFFC stw r4,-4(r6)
+ 0: GETL R4, t0
+ 1: GETL R6, t2
+ 2: ADDL $0xFFFFFFFC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25483940: 9086FFF8 stw r4,-8(r6)
+ 5: GETL R4, t4
+ 6: GETL R6, t6
+ 7: ADDL $0xFFFFFFF8, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x25483944: 4E800020 blr
+ 10: GETL LR, t8
+ 11: JMPo-r t8 ($4)
+
+
+. 0 2548393C 12
+. 90 86 FF FC 90 86 FF F8 4E 80 00 20
+
+==== BB 1198 (0x2547E0E8) approx BBs exec'd 0 ====
+
+ 0x2547E0E8: 4BFFFFA4 b 0x2547E08C
+ 0: JMPo $0x2547E08C ($4)
+
+
+. 0 2547E0E8 4
+. 4B FF FF A4
+
+==== BB 1199 (0x2547E08C) approx BBs exec'd 0 ====
+
+ 0x2547E08C: 817B0000 lwz r11,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R11
+ 3: INCEIPL $4
+
+ 0x2547E090: 3BFF0001 addi r31,r31,1
+ 4: GETL R31, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0x2547E094: 3B9C0008 addi r28,r28,8
+ 8: GETL R28, t6
+ 9: ADDL $0x8, t6
+ 10: PUTL t6, R28
+ 11: INCEIPL $4
+
+ 0x2547E098: 7F8BF840 cmpl cr7,r11,r31
+ 12: GETL R11, t8
+ 13: GETL R31, t10
+ 14: CMPUL t8, t10, t12 (-rSo)
+ 15: ICRFL t12, $0x7, CR
+ 16: INCEIPL $4
+
+ 0x2547E09C: 419DFFB4 bc 12,29,0x2547E050
+ 17: Js29o $0x2547E050
+
+
+. 0 2547E08C 20
+. 81 7B 00 00 3B FF 00 01 3B 9C 00 08 7F 8B F8 40 41 9D FF B4
+
+==== BB 1200 (0x2547E050) approx BBs exec'd 0 ====
+
+ 0x2547E050: 80980408 lwz r4,1032(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0x408, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547E054: 7D3AFA14 add r9,r26,r31
+ 5: GETL R26, t4
+ 6: GETL R31, t6
+ 7: ADDL t4, t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x2547E058: 7C892040 cmpl cr1,r9,r4
+ 10: GETL R9, t8
+ 11: GETL R4, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0x2547E05C: 41850048 bc 12,5,0x2547E0A4
+ 15: Js05o $0x2547E0A4
+
+
+. 0 2547E050 16
+. 80 98 04 08 7D 3A FA 14 7C 89 20 40 41 85 00 48
+
+==== BB 1201 (0x2547E0A4) approx BBs exec'd 0 ====
+
+ 0x2547E0A4: 81580408 lwz r10,1032(r24)
+ 0: GETL R24, t0
+ 1: ADDL $0x408, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547E0A8: 7D3A4B78 or r26,r9,r9
+ 5: GETL R9, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x2547E0AC: 7C8A4840 cmpl cr1,r10,r9
+ 8: GETL R10, t6
+ 9: GETL R9, t8
+ 10: CMPUL t6, t8, t10 (-rSo)
+ 11: ICRFL t10, $0x1, CR
+ 12: INCEIPL $4
+
+ 0x2547E0B0: 4085003C bc 4,5,0x2547E0EC
+ 13: Jc05o $0x2547E0EC
+
+
+. 0 2547E0A4 16
+. 81 58 04 08 7D 3A 4B 78 7C 8A 48 40 40 85 00 3C
+
+==== BB 1202 (0x2547E0EC) approx BBs exec'd 0 ====
+
+ 0x2547E0EC: 7F23CB78 or r3,r25,r25
+ 0: GETL R25, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547E0F0: 81810034 lwz r12,52(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x34, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0x2547E0F4: 82E1000C lwz r23,12(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0x2547E0F8: 83010010 lwz r24,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R24
+ 17: INCEIPL $4
+
+ 0x2547E0FC: 7D8803A6 mtlr r12
+ 18: GETL R12, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547E100: 83210014 lwz r25,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R25
+ 25: INCEIPL $4
+
+ 0x2547E104: 83410018 lwz r26,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R26
+ 30: INCEIPL $4
+
+ 0x2547E108: 8361001C lwz r27,28(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x1C, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R27
+ 35: INCEIPL $4
+
+ 0x2547E10C: 83810020 lwz r28,32(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x20, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R28
+ 40: INCEIPL $4
+
+ 0x2547E110: 83A10024 lwz r29,36(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x24, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R29
+ 45: INCEIPL $4
+
+ 0x2547E114: 83C10028 lwz r30,40(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x28, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R30
+ 50: INCEIPL $4
+
+ 0x2547E118: 83E1002C lwz r31,44(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x2C, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R31
+ 55: INCEIPL $4
+
+ 0x2547E11C: 38210030 addi r1,r1,48
+ 56: GETL R1, t44
+ 57: ADDL $0x30, t44
+ 58: PUTL t44, R1
+ 59: INCEIPL $4
+
+ 0x2547E120: 4E800020 blr
+ 60: GETL LR, t46
+ 61: JMPo-r t46 ($4)
+
+
+. 0 2547E0EC 56
+. 7F 23 CB 78 81 81 00 34 82 E1 00 0C 83 01 00 10 7D 88 03 A6 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
+
+==== BB 1203 (0x25472B64) approx BBs exec'd 0 ====
+
+ 0x25472B64: 38517000 addi r2,r17,28672
+ 0: GETL R17, t0
+ 1: ADDL $0x7000, t0
+ 2: PUTL t0, R2
+ 3: INCEIPL $4
+
+ 0x25472B68: 3B000001 li r24,1
+ 4: MOVL $0x1, t2
+ 5: PUTL t2, R24
+ 6: INCEIPL $4
+
+ 0x25472B6C: 931A000C stw r24,12(r26)
+ 7: GETL R24, t4
+ 8: GETL R26, t6
+ 9: ADDL $0xC, t6
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x25472B70: 48009431 bl 0x2547BFA0
+ 12: MOVL $0x25472B74, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x2547BFA0 ($4)
+
+
+. 0 25472B64 16
+. 38 51 70 00 3B 00 00 01 93 1A 00 0C 48 00 94 31
+
+==== BB 1204 __GI__dl_debug_state(0x2547BFA0) approx BBs exec'd 0 ====
+
+ 0x2547BFA0: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547BFA4: 38210010 addi r1,r1,16
+ 6: GETL R1, t4
+ 7: ADDL $0x10, t4
+ 8: PUTL t4, R1
+ 9: INCEIPL $4
+
+ 0x2547BFA8: 4E800020 blr
+ 10: GETL LR, t6
+ 11: JMPo-r t6 ($4)
+
+
+. 0 2547BFA0 12
+. 94 21 FF F0 38 21 00 10 4E 80 00 20
+
+==== BB 1205 (0x25472B74) approx BBs exec'd 0 ====
+
+ 0x25472B74: 480055BD bl 0x25478130
+ 0: MOVL $0x25472B78, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25478130 ($4)
+
+
+. 0 25472B74 4
+. 48 00 55 BD
+
+==== BB 1206 _dl_unload_cache(0x25478130) approx BBs exec'd 0 ====
+
+ 0x25478130: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x25478134: 7C6802A6 mflr r3
+ 6: GETL LR, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x25478138: 4801EEC9 bl 0x25497000
+ 9: MOVL $0x2547813C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 25478130 12
+. 94 21 FF F0 7C 68 02 A6 48 01 EE C9
+
+==== BB 1207 (0x2547813C) approx BBs exec'd 0 ====
+
+ 0x2547813C: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x25478140: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x25478144: 93E1000C stw r31,12(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x25478148: 90610014 stw r3,20(r1)
+ 13: GETL R3, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547814C: 3800FFFD li r0,-3
+ 18: MOVL $0xFFFFFFFD, t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0x25478150: 83FE0254 lwz r31,596(r30)
+ 21: GETL R30, t16
+ 22: ADDL $0x254, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0x25478154: 807F0000 lwz r3,0(r31)
+ 26: GETL R31, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R3
+ 29: INCEIPL $4
+
+ 0x25478158: 3923FFFF addi r9,r3,-1
+ 30: GETL R3, t24
+ 31: ADDL $0xFFFFFFFF, t24
+ 32: PUTL t24, R9
+ 33: INCEIPL $4
+
+ 0x2547815C: 7F890040 cmpl cr7,r9,r0
+ 34: GETL R9, t26
+ 35: GETL R0, t28
+ 36: CMPUL t26, t28, t30 (-rSo)
+ 37: ICRFL t30, $0x7, CR
+ 38: INCEIPL $4
+
+ 0x25478160: 409D001C bc 4,29,0x2547817C
+ 39: Jc29o $0x2547817C
+
+
+. 0 2547813C 40
+. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 61 00 14 38 00 FF FD 83 FE 02 54 80 7F 00 00 39 23 FF FF 7F 89 00 40 40 9D 00 1C
+
+==== BB 1208 (0x2547817C) approx BBs exec'd 0 ====
+
+ 0x2547817C: 80BE025C lwz r5,604(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x25C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x25478180: 80850000 lwz r4,0(r5)
+ 5: GETL R5, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x25478184: 4800A625 bl 0x254827A8
+ 9: MOVL $0x25478188, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0x254827A8 ($4)
+
+
+. 0 2547817C 12
+. 80 BE 02 5C 80 85 00 00 48 00 A6 25
+
+==== BB 1209 munmap(0x254827A8) approx BBs exec'd 0 ====
+
+ 0x254827A8: 3800005B li r0,91
+ 0: MOVL $0x5B, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x254827AC: 44000002 sc
+ 3: JMPo-sys $0x254827B0 ($4)
+
+
+. 0 254827A8 8
+. 38 00 00 5B 44 00 00 02
+
+==== BB 1210 (0x254827B0) approx BBs exec'd 0 ====
+
+ 0x254827B0: 4CA30020 bclr 5,3
+ 0: GETL LR, t0
+ 1: Jc03o-r t0
+
+
+. 0 254827B0 4
+. 4C A3 00 20
+
+==== BB 1211 (0x25478188) approx BBs exec'd 0 ====
+
+ 0x25478188: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0x2547818C: 80C10014 lwz r6,20(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x14, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R6
+ 7: INCEIPL $4
+
+ 0x25478190: 909F0000 stw r4,0(r31)
+ 8: GETL R4, t6
+ 9: GETL R31, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0x25478194: 83C10008 lwz r30,8(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x8, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R30
+ 16: INCEIPL $4
+
+ 0x25478198: 7CC803A6 mtlr r6
+ 17: GETL R6, t14
+ 18: PUTL t14, LR
+ 19: INCEIPL $4
+
+ 0x2547819C: 83E1000C lwz r31,12(r1)
+ 20: GETL R1, t16
+ 21: ADDL $0xC, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R31
+ 24: INCEIPL $4
+
+ 0x254781A0: 38210010 addi r1,r1,16
+ 25: GETL R1, t20
+ 26: ADDL $0x10, t20
+ 27: PUTL t20, R1
+ 28: INCEIPL $4
+
+ 0x254781A4: 4E800020 blr
+ 29: GETL LR, t22
+ 30: JMPo-r t22 ($4)
+
+
+. 0 25478188 32
+. 38 80 00 00 80 C1 00 14 90 9F 00 00 83 C1 00 08 7C C8 03 A6 83 E1 00 0C 38 21 00 10 4E 80 00 20
+
+==== BB 1212 (0x25472B78) approx BBs exec'd 0 ====
+
+ 0x25472B78: 81010000 lwz r8,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R8
+ 3: INCEIPL $4
+
+ 0x25472B7C: 82280004 lwz r17,4(r8)
+ 4: GETL R8, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R17
+ 8: INCEIPL $4
+
+ 0x25472B80: 8188FFB4 lwz r12,-76(r8)
+ 9: GETL R8, t8
+ 10: ADDL $0xFFFFFFB4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0x25472B84: 7E2803A6 mtlr r17
+ 14: GETL R17, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x25472B88: 81C8FFB8 lwz r14,-72(r8)
+ 17: GETL R8, t14
+ 18: ADDL $0xFFFFFFB8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R14
+ 21: INCEIPL $4
+
+ 0x25472B8C: 81E8FFBC lwz r15,-68(r8)
+ 22: GETL R8, t18
+ 23: ADDL $0xFFFFFFBC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R15
+ 26: INCEIPL $4
+
+ 0x25472B90: 7D818120 mtcrf 0x18,r12
+ 27: GETL R12, t22
+ 28: ICRFL t22, $0x3, CR
+ 29: ICRFL t22, $0x4, CR
+ 30: INCEIPL $4
+
+ 0x25472B94: 8208FFC0 lwz r16,-64(r8)
+ 31: GETL R8, t24
+ 32: ADDL $0xFFFFFFC0, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R16
+ 35: INCEIPL $4
+
+ 0x25472B98: 8228FFC4 lwz r17,-60(r8)
+ 36: GETL R8, t28
+ 37: ADDL $0xFFFFFFC4, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R17
+ 40: INCEIPL $4
+
+ 0x25472B9C: 8248FFC8 lwz r18,-56(r8)
+ 41: GETL R8, t32
+ 42: ADDL $0xFFFFFFC8, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R18
+ 45: INCEIPL $4
+
+ 0x25472BA0: 8268FFCC lwz r19,-52(r8)
+ 46: GETL R8, t36
+ 47: ADDL $0xFFFFFFCC, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R19
+ 50: INCEIPL $4
+
+ 0x25472BA4: 8288FFD0 lwz r20,-48(r8)
+ 51: GETL R8, t40
+ 52: ADDL $0xFFFFFFD0, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R20
+ 55: INCEIPL $4
+
+ 0x25472BA8: 82A8FFD4 lwz r21,-44(r8)
+ 56: GETL R8, t44
+ 57: ADDL $0xFFFFFFD4, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R21
+ 60: INCEIPL $4
+
+ 0x25472BAC: 82C8FFD8 lwz r22,-40(r8)
+ 61: GETL R8, t48
+ 62: ADDL $0xFFFFFFD8, t48
+ 63: LDL (t48), t50
+ 64: PUTL t50, R22
+ 65: INCEIPL $4
+
+ 0x25472BB0: 82E8FFDC lwz r23,-36(r8)
+ 66: GETL R8, t52
+ 67: ADDL $0xFFFFFFDC, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R23
+ 70: INCEIPL $4
+
+ 0x25472BB4: 8308FFE0 lwz r24,-32(r8)
+ 71: GETL R8, t56
+ 72: ADDL $0xFFFFFFE0, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R24
+ 75: INCEIPL $4
+
+ 0x25472BB8: 8328FFE4 lwz r25,-28(r8)
+ 76: GETL R8, t60
+ 77: ADDL $0xFFFFFFE4, t60
+ 78: LDL (t60), t62
+ 79: PUTL t62, R25
+ 80: INCEIPL $4
+
+ 0x25472BBC: 8348FFE8 lwz r26,-24(r8)
+ 81: GETL R8, t64
+ 82: ADDL $0xFFFFFFE8, t64
+ 83: LDL (t64), t66
+ 84: PUTL t66, R26
+ 85: INCEIPL $4
+
+ 0x25472BC0: 8368FFEC lwz r27,-20(r8)
+ 86: GETL R8, t68
+ 87: ADDL $0xFFFFFFEC, t68
+ 88: LDL (t68), t70
+ 89: PUTL t70, R27
+ 90: INCEIPL $4
+
+ 0x25472BC4: 8388FFF0 lwz r28,-16(r8)
+ 91: GETL R8, t72
+ 92: ADDL $0xFFFFFFF0, t72
+ 93: LDL (t72), t74
+ 94: PUTL t74, R28
+ 95: INCEIPL $4
+
+ 0x25472BC8: 83A8FFF4 lwz r29,-12(r8)
+ 96: GETL R8, t76
+ 97: ADDL $0xFFFFFFF4, t76
+ 98: LDL (t76), t78
+ 99: PUTL t78, R29
+ 100: INCEIPL $4
+
+ 0x25472BCC: 83C8FFF8 lwz r30,-8(r8)
+ 101: GETL R8, t80
+ 102: ADDL $0xFFFFFFF8, t80
+ 103: LDL (t80), t82
+ 104: PUTL t82, R30
+ 105: INCEIPL $4
+
+ 0x25472BD0: 83E8FFFC lwz r31,-4(r8)
+ 106: GETL R8, t84
+ 107: ADDL $0xFFFFFFFC, t84
+ 108: LDL (t84), t86
+ 109: PUTL t86, R31
+ 110: INCEIPL $4
+
+ 0x25472BD4: 7D014378 or r1,r8,r8
+ 111: GETL R8, t88
+ 112: PUTL t88, R1
+ 113: INCEIPL $4
+
+ 0x25472BD8: 4E800020 blr
+ 114: GETL LR, t90
+ 115: JMPo-r t90 ($4)
+
+
+. 0 25472B78 100
+. 81 01 00 00 82 28 00 04 81 88 FF B4 7E 28 03 A6 81 C8 FF B8 81 E8 FF BC 7D 81 81 20 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
+
+==== BB 1213 (0x2547F324) approx BBs exec'd 0 ====
+
+ 0x2547F324: 82A10224 lwz r21,548(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x224, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x2547F328: 806101E0 lwz r3,480(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x1E0, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547F32C: 7EA803A6 mtlr r21
+ 10: GETL R21, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0x2547F330: 82C101F8 lwz r22,504(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x1F8, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R22
+ 17: INCEIPL $4
+
+ 0x2547F334: 82A101F4 lwz r21,500(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x1F4, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R21
+ 22: INCEIPL $4
+
+ 0x2547F338: 82E101FC lwz r23,508(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1FC, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R23
+ 27: INCEIPL $4
+
+ 0x2547F33C: 83010200 lwz r24,512(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x200, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R24
+ 32: INCEIPL $4
+
+ 0x2547F340: 83210204 lwz r25,516(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x204, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R25
+ 37: INCEIPL $4
+
+ 0x2547F344: 83410208 lwz r26,520(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x208, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R26
+ 42: INCEIPL $4
+
+ 0x2547F348: 8361020C lwz r27,524(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x20C, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R27
+ 47: INCEIPL $4
+
+ 0x2547F34C: 83810210 lwz r28,528(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x210, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R28
+ 52: INCEIPL $4
+
+ 0x2547F350: 83A10214 lwz r29,532(r1)
+ 53: GETL R1, t42
+ 54: ADDL $0x214, t42
+ 55: LDL (t42), t44
+ 56: PUTL t44, R29
+ 57: INCEIPL $4
+
+ 0x2547F354: 83C10218 lwz r30,536(r1)
+ 58: GETL R1, t46
+ 59: ADDL $0x218, t46
+ 60: LDL (t46), t48
+ 61: PUTL t48, R30
+ 62: INCEIPL $4
+
+ 0x2547F358: 83E1021C lwz r31,540(r1)
+ 63: GETL R1, t50
+ 64: ADDL $0x21C, t50
+ 65: LDL (t50), t52
+ 66: PUTL t52, R31
+ 67: INCEIPL $4
+
+ 0x2547F35C: 38210220 addi r1,r1,544
+ 68: GETL R1, t54
+ 69: ADDL $0x220, t54
+ 70: PUTL t54, R1
+ 71: INCEIPL $4
+
+ 0x2547F360: 4E800020 blr
+ 72: GETL LR, t56
+ 73: JMPo-r t56 ($4)
+
+
+. 0 2547F324 64
+. 82 A1 02 24 80 61 01 E0 7E A8 03 A6 82 C1 01 F8 82 A1 01 F4 82 E1 01 FC 83 01 02 00 83 21 02 04 83 41 02 08 83 61 02 0C 83 81 02 10 83 A1 02 14 83 C1 02 18 83 E1 02 1C 38 21 02 20 4E 80 00 20
+
+==== BB 1214 (0x25471A20) approx BBs exec'd 0 ====
+
+ 0x25471A20: 813E04F4 lwz r9,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x25471A24: 7C7D1B78 or r29,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x25471A28: 38600000 li r3,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0x25471A2C: 80090000 lwz r0,0(r9)
+ 11: GETL R9, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0x25471A30: 70090080 andi. r9,r0,0x80
+ 15: GETL R0, t12
+ 16: ANDL $0x80, t12
+ 17: PUTL t12, R9
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x0, CR
+ 20: INCEIPL $4
+
+ 0x25471A34: 40820028 bc 4,2,0x25471A5C
+ 21: Jc02o $0x25471A5C
+
+
+. 0 25471A20 24
+. 81 3E 04 F4 7C 7D 1B 78 38 60 00 00 80 09 00 00 70 09 00 80 40 82 00 28
+
+==== BB 1215 (0x25471A38) approx BBs exec'd 0 ====
+
+ 0x25471A38: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25471A3C: 7FA3EB78 or r3,r29,r29
+ 5: GETL R29, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x25471A40: 8361000C lwz r27,12(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R27
+ 12: INCEIPL $4
+
+ 0x25471A44: 83810010 lwz r28,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0x25471A48: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x25471A4C: 83A10014 lwz r29,20(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R29
+ 25: INCEIPL $4
+
+ 0x25471A50: 83C10018 lwz r30,24(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x18, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R30
+ 30: INCEIPL $4
+
+ 0x25471A54: 38210020 addi r1,r1,32
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0x25471A58: 4E800020 blr
+ 35: GETL LR, t26
+ 36: JMPo-r t26 ($4)
+
+
+. 0 25471A38 36
+. 80 81 00 24 7F A3 EB 78 83 61 00 0C 83 81 00 10 7C 88 03 A6 83 A1 00 14 83 C1 00 18 38 21 00 20 4E 80 00 20
+
+==== BB 1216 (0x25471DD0) approx BBs exec'd 0 ====
+
+ 0x25471DD0: 82E102B4 lwz r23,692(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x2B4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x25471DD4: 83010290 lwz r24,656(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x290, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R24
+ 9: INCEIPL $4
+
+ 0x25471DD8: 7EE803A6 mtlr r23
+ 10: GETL R23, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0x25471DDC: 83210294 lwz r25,660(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x294, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R25
+ 17: INCEIPL $4
+
+ 0x25471DE0: 82E1028C lwz r23,652(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x28C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R23
+ 22: INCEIPL $4
+
+ 0x25471DE4: 83410298 lwz r26,664(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x298, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R26
+ 27: INCEIPL $4
+
+ 0x25471DE8: 8361029C lwz r27,668(r1)
+ 28: GETL R1, t22
+ 29: ADDL $0x29C, t22
+ 30: LDL (t22), t24
+ 31: PUTL t24, R27
+ 32: INCEIPL $4
+
+ 0x25471DEC: 838102A0 lwz r28,672(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x2A0, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R28
+ 37: INCEIPL $4
+
+ 0x25471DF0: 83A102A4 lwz r29,676(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x2A4, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R29
+ 42: INCEIPL $4
+
+ 0x25471DF4: 83C102A8 lwz r30,680(r1)
+ 43: GETL R1, t34
+ 44: ADDL $0x2A8, t34
+ 45: LDL (t34), t36
+ 46: PUTL t36, R30
+ 47: INCEIPL $4
+
+ 0x25471DF8: 83E102AC lwz r31,684(r1)
+ 48: GETL R1, t38
+ 49: ADDL $0x2AC, t38
+ 50: LDL (t38), t40
+ 51: PUTL t40, R31
+ 52: INCEIPL $4
+
+ 0x25471DFC: 382102B0 addi r1,r1,688
+ 53: GETL R1, t42
+ 54: ADDL $0x2B0, t42
+ 55: PUTL t42, R1
+ 56: INCEIPL $4
+
+ 0x25471E00: 4E800020 blr
+ 57: GETL LR, t44
+ 58: JMPo-r t44 ($4)
+
+
+. 0 25471DD0 52
+. 82 E1 02 B4 83 01 02 90 7E E8 03 A6 83 21 02 94 82 E1 02 8C 83 41 02 98 83 61 02 9C 83 81 02 A0 83 A1 02 A4 83 C1 02 A8 83 E1 02 AC 38 21 02 B0 4E 80 00 20
+
+==== BB 1217 (0x254804E8) approx BBs exec'd 0 ====
+
+ 0x254804E8: 48016B19 bl 0x25497000
+ 0: MOVL $0x254804EC, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x25497000 ($4)
+
+
+. 0 254804E8 4
+. 48 01 6B 19
+
+==== BB 1218 (0x254804EC) approx BBs exec'd 0 ====
+
+ 0x254804EC: 7FE802A6 mflr r31
+ 0: GETL LR, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0x254804F0: 7C7E1B78 or r30,r3,r3
+ 3: GETL R3, t2
+ 4: PUTL t2, R30
+ 5: INCEIPL $4
+
+ 0x254804F4: 839F0498 lwz r28,1176(r31)
+ 6: GETL R31, t4
+ 7: ADDL $0x498, t4
+ 8: LDL (t4), t6
+ 9: PUTL t6, R28
+ 10: INCEIPL $4
+
+ 0x254804F8: 83BF04D0 lwz r29,1232(r31)
+ 11: GETL R31, t8
+ 12: ADDL $0x4D0, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R29
+ 15: INCEIPL $4
+
+ 0x254804FC: 837F04DC lwz r27,1244(r31)
+ 16: GETL R31, t12
+ 17: ADDL $0x4DC, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R27
+ 20: INCEIPL $4
+
+ 0x25480500: 807C0000 lwz r3,0(r28)
+ 21: GETL R28, t16
+ 22: LDL (t16), t18
+ 23: PUTL t18, R3
+ 24: INCEIPL $4
+
+ 0x25480504: 809D0000 lwz r4,0(r29)
+ 25: GETL R29, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R4
+ 28: INCEIPL $4
+
+ 0x25480508: 80BB0000 lwz r5,0(r27)
+ 29: GETL R27, t24
+ 30: LDL (t24), t26
+ 31: PUTL t26, R5
+ 32: INCEIPL $4
+
+ 0x2548050C: 5486103A rlwinm r6,r4,2,0,29
+ 33: GETL R4, t28
+ 34: SHLL $0x2, t28
+ 35: PUTL t28, R6
+ 36: INCEIPL $4
+
+ 0x25480510: 7CC53214 add r6,r5,r6
+ 37: GETL R5, t30
+ 38: GETL R6, t32
+ 39: ADDL t30, t32
+ 40: PUTL t32, R6
+ 41: INCEIPL $4
+
+ 0x25480514: 38C60004 addi r6,r6,4
+ 42: GETL R6, t34
+ 43: ADDL $0x4, t34
+ 44: PUTL t34, R6
+ 45: INCEIPL $4
+
+ 0x25480518: 4BFFB229 bl 0x2547B740
+ 46: MOVL $0x2548051C, t36
+ 47: PUTL t36, LR
+ 48: JMPo-c $0x2547B740 ($4)
+
+
+. 0 254804EC 48
+. 7F E8 02 A6 7C 7E 1B 78 83 9F 04 98 83 BF 04 D0 83 7F 04 DC 80 7C 00 00 80 9D 00 00 80 BB 00 00 54 86 10 3A 7C C5 32 14 38 C6 00 04 4B FF B2 29
+
+==== BB 1219 _dl_init_internal(0x2547B740) approx BBs exec'd 0 ====
+
+ 0x2547B740: 9421FFC0 stwu r1,-64(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFC0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547B744: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547B748: 4801B8B9 bl 0x25497000
+ 9: MOVL $0x2547B74C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547B740 12
+. 94 21 FF C0 7C 08 02 A6 48 01 B8 B9
+
+==== BB 1220 (0x2547B74C) approx BBs exec'd 0 ====
+
+ 0x2547B74C: 93C10038 stw r30,56(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x38, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547B750: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547B754: 92C10018 stw r22,24(r1)
+ 8: GETL R22, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x18, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0x2547B758: 90010044 stw r0,68(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x44, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0x2547B75C: 93E1003C stw r31,60(r1)
+ 18: GETL R31, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x3C, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0x2547B760: 82DE04C8 lwz r22,1224(r30)
+ 23: GETL R30, t18
+ 24: ADDL $0x4C8, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R22
+ 27: INCEIPL $4
+
+ 0x2547B764: 92E1001C stw r23,28(r1)
+ 28: GETL R23, t22
+ 29: GETL R1, t24
+ 30: ADDL $0x1C, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0x2547B768: 7C972378 or r23,r4,r4
+ 33: GETL R4, t26
+ 34: PUTL t26, R23
+ 35: INCEIPL $4
+
+ 0x2547B76C: 83F601A0 lwz r31,416(r22)
+ 36: GETL R22, t28
+ 37: ADDL $0x1A0, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R31
+ 40: INCEIPL $4
+
+ 0x2547B770: 93010020 stw r24,32(r1)
+ 41: GETL R24, t32
+ 42: GETL R1, t34
+ 43: ADDL $0x20, t34
+ 44: STL t32, (t34)
+ 45: INCEIPL $4
+
+ 0x2547B774: 7CB82B78 or r24,r5,r5
+ 46: GETL R5, t36
+ 47: PUTL t36, R24
+ 48: INCEIPL $4
+
+ 0x2547B778: 2F9F0000 cmpi cr7,r31,0
+ 49: GETL R31, t38
+ 50: CMP0L t38, t40 (-rSo)
+ 51: ICRFL t40, $0x7, CR
+ 52: INCEIPL $4
+
+ 0x2547B77C: 93210024 stw r25,36(r1)
+ 53: GETL R25, t42
+ 54: GETL R1, t44
+ 55: ADDL $0x24, t44
+ 56: STL t42, (t44)
+ 57: INCEIPL $4
+
+ 0x2547B780: 93410028 stw r26,40(r1)
+ 58: GETL R26, t46
+ 59: GETL R1, t48
+ 60: ADDL $0x28, t48
+ 61: STL t46, (t48)
+ 62: INCEIPL $4
+
+ 0x2547B784: 7CD93378 or r25,r6,r6
+ 63: GETL R6, t50
+ 64: PUTL t50, R25
+ 65: INCEIPL $4
+
+ 0x2547B788: 9361002C stw r27,44(r1)
+ 66: GETL R27, t52
+ 67: GETL R1, t54
+ 68: ADDL $0x2C, t54
+ 69: STL t52, (t54)
+ 70: INCEIPL $4
+
+ 0x2547B78C: 7C7A1B78 or r26,r3,r3
+ 71: GETL R3, t56
+ 72: PUTL t56, R26
+ 73: INCEIPL $4
+
+ 0x2547B790: 93A10034 stw r29,52(r1)
+ 74: GETL R29, t58
+ 75: GETL R1, t60
+ 76: ADDL $0x34, t60
+ 77: STL t58, (t60)
+ 78: INCEIPL $4
+
+ 0x2547B794: 92810010 stw r20,16(r1)
+ 79: GETL R20, t62
+ 80: GETL R1, t64
+ 81: ADDL $0x10, t64
+ 82: STL t62, (t64)
+ 83: INCEIPL $4
+
+ 0x2547B798: 92A10014 stw r21,20(r1)
+ 84: GETL R21, t66
+ 85: GETL R1, t68
+ 86: ADDL $0x14, t68
+ 87: STL t66, (t68)
+ 88: INCEIPL $4
+
+ 0x2547B79C: 93810030 stw r28,48(r1)
+ 89: GETL R28, t70
+ 90: GETL R1, t72
+ 91: ADDL $0x30, t72
+ 92: STL t70, (t72)
+ 93: INCEIPL $4
+
+ 0x2547B7A0: 83A300A0 lwz r29,160(r3)
+ 94: GETL R3, t74
+ 95: ADDL $0xA0, t74
+ 96: LDL (t74), t76
+ 97: PUTL t76, R29
+ 98: INCEIPL $4
+
+ 0x2547B7A4: 836300A4 lwz r27,164(r3)
+ 99: GETL R3, t78
+ 100: ADDL $0xA4, t78
+ 101: LDL (t78), t80
+ 102: PUTL t80, R27
+ 103: INCEIPL $4
+
+ 0x2547B7A8: 409E019C bc 4,30,0x2547B944
+ 104: Jc30o $0x2547B944
+
+
+. 0 2547B74C 96
+. 93 C1 00 38 7F C8 02 A6 92 C1 00 18 90 01 00 44 93 E1 00 3C 82 DE 04 C8 92 E1 00 1C 7C 97 23 78 83 F6 01 A0 93 01 00 20 7C B8 2B 78 2F 9F 00 00 93 21 00 24 93 41 00 28 7C D9 33 78 93 61 00 2C 7C 7A 1B 78 93 A1 00 34 92 81 00 10 92 A1 00 14 93 81 00 30 83 A3 00 A0 83 63 00 A4 40 9E 01 9C
+
+==== BB 1221 (0x2547B944) approx BBs exec'd 0 ====
+
+ 0x2547B944: 801F0180 lwz r0,384(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x180, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x2547B948: 74091000 andis. r9,r0,0x1000
+ 5: GETL R0, t4
+ 6: ANDL $0x10000000, t4
+ 7: PUTL t4, R9
+ 8: CMP0L t4, t6 (-rSo)
+ 9: ICRFL t6, $0x0, CR
+ 10: INCEIPL $4
+
+ 0x2547B94C: 40820110 bc 4,2,0x2547BA5C
+ 11: Jc02o $0x2547BA5C
+
+
+. 0 2547B944 12
+. 80 1F 01 80 74 09 10 00 40 82 01 10
+
+==== BB 1222 (0x2547B950) approx BBs exec'd 0 ====
+
+ 0x2547B950: 64091000 oris r9,r0,0x1000
+ 0: GETL R0, t0
+ 1: ORL $0x10000000, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x2547B954: 809F0004 lwz r4,4(r31)
+ 4: GETL R31, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2547B958: 913F0180 stw r9,384(r31)
+ 9: GETL R9, t6
+ 10: GETL R31, t8
+ 11: ADDL $0x180, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547B95C: 88640000 lbz r3,0(r4)
+ 14: GETL R4, t10
+ 15: LDB (t10), t12
+ 16: PUTL t12, R3
+ 17: INCEIPL $4
+
+ 0x2547B960: 2F030000 cmpi cr6,r3,0
+ 18: GETL R3, t14
+ 19: CMP0L t14, t16 (-rSo)
+ 20: ICRFL t16, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x2547B964: 419A00F0 bc 12,26,0x2547BA54
+ 22: Js26o $0x2547BA54
+
+
+. 0 2547B950 24
+. 64 09 10 00 80 9F 00 04 91 3F 01 80 88 64 00 00 2F 03 00 00 41 9A 00 F0
+
+==== BB 1223 (0x2547B968) approx BBs exec'd 0 ====
+
+ 0x2547B968: 815F0050 lwz r10,80(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547B96C: 2C8A0000 cmpi cr1,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547B970: 40860010 bc 4,6,0x2547B980
+ 9: Jc06o $0x2547B980
+
+
+. 0 2547B968 12
+. 81 5F 00 50 2C 8A 00 00 40 86 00 10
+
+==== BB 1224 (0x2547B980) approx BBs exec'd 0 ====
+
+ 0x2547B980: 813E04F4 lwz r9,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547B984: 80C90000 lwz r6,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R6
+ 8: INCEIPL $4
+
+ 0x2547B988: 70C90002 andi. r9,r6,0x2
+ 9: GETL R6, t8
+ 10: ANDL $0x2, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x2547B98C: 40820130 bc 4,2,0x2547BABC
+ 15: Jc02o $0x2547BABC
+
+
+. 0 2547B980 16
+. 81 3E 04 F4 80 C9 00 00 70 C9 00 02 40 82 01 30
+
+==== BB 1225 (0x2547B990) approx BBs exec'd 0 ====
+
+ 0x2547B990: 2F0A0000 cmpi cr6,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547B994: 409A00D4 bc 4,26,0x2547BA68
+ 4: Jc26o $0x2547BA68
+
+
+. 0 2547B990 8
+. 2F 0A 00 00 40 9A 00 D4
+
+==== BB 1226 (0x2547BA68) approx BBs exec'd 0 ====
+
+ 0x2547BA68: 818A0004 lwz r12,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0x2547BA6C: 7EE3BB78 or r3,r23,r23
+ 5: GETL R23, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547BA70: 811F0000 lwz r8,0(r31)
+ 8: GETL R31, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R8
+ 11: INCEIPL $4
+
+ 0x2547BA74: 7F04C378 or r4,r24,r24
+ 12: GETL R24, t10
+ 13: PUTL t10, R4
+ 14: INCEIPL $4
+
+ 0x2547BA78: 7F25CB78 or r5,r25,r25
+ 15: GETL R25, t12
+ 16: PUTL t12, R5
+ 17: INCEIPL $4
+
+ 0x2547BA7C: 7CE86214 add r7,r8,r12
+ 18: GETL R8, t14
+ 19: GETL R12, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R7
+ 22: INCEIPL $4
+
+ 0x2547BA80: 7CE903A6 mtctr r7
+ 23: GETL R7, t18
+ 24: PUTL t18, CTR
+ 25: INCEIPL $4
+
+ 0x2547BA84: 4E800421 bctrl
+ 26: MOVL $0x2547BA88, t20
+ 27: PUTL t20, LR
+ 28: GETL CTR, t22
+ 29: JMPo-c t22 ($4)
+
+
+. 0 2547BA68 32
+. 81 8A 00 04 7E E3 BB 78 81 1F 00 00 7F 04 C3 78 7F 25 CB 78 7C E8 62 14 7C E9 03 A6 4E 80 04 21
+
+==== BB 1227 (0xFFDE898) approx BBs exec'd 0 ====
+
+ 0xFFDE898: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDE89C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDE8A0: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFFDE8A4: 4800001D bl 0xFFDE8C0
+ 14: MOVL $0xFFDE8A8, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFFDE8C0 ($4)
+
+
+. 0 FFDE898 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 48 00 00 1D
+
+==== BB 1228 (0xFFDE8C0) approx BBs exec'd 0 ====
+
+ 0xFFDE8C0: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDE8C4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDE8C8: 93C10008 stw r30,8(r1)
+ 9: GETL R30, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFFDE8CC: 90010014 stw r0,20(r1)
+ 14: GETL R0, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x14, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xFFDE8D0: 48010839 bl 0xFFEF108
+ 19: MOVL $0xFFDE8D4, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0xFFEF108 ($4)
+
+
+. 0 FFDE8C0 20
+. 94 21 FF F0 7C 08 02 A6 93 C1 00 08 90 01 00 14 48 01 08 39
+
+==== BB 1229 (0xFFEF108) approx BBs exec'd 0 ====
+
+ 0xFFEF108: 4E800021 blrl
+ 0: GETL LR, t0
+ 1: MOVL $0xFFEF10C, t2
+ 2: PUTL t2, LR
+ 3: JMPo-r t0 ($4)
+
+
+. 0 FFEF108 4
+. 4E 80 00 21
+
+==== BB 1230 (0xFFDE8D4) approx BBs exec'd 0 ====
+
+ 0xFFDE8D4: 7FC802A6 mflr r30
+ 0: GETL LR, t0
+ 1: PUTL t0, R30
+ 2: INCEIPL $4
+
+ 0xFFDE8D8: 801E000C lwz r0,12(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFFDE8DC: 2F800000 cmpi cr7,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFFDE8E0: 419E000C bc 12,30,0xFFDE8EC
+ 12: Js30o $0xFFDE8EC
+
+
+. 0 FFDE8D4 16
+. 7F C8 02 A6 80 1E 00 0C 2F 80 00 00 41 9E 00 0C
+
+==== BB 1231 (0xFFDE8EC) approx BBs exec'd 0 ====
+
+ 0xFFDE8EC: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDE8F0: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xFFDE8F4: 83C10008 lwz r30,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0xFFDE8F8: 38210010 addi r1,r1,16
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: PUTL t10, R1
+ 16: INCEIPL $4
+
+ 0xFFDE8FC: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+. 0 FFDE8EC 20
+. 80 01 00 14 7C 08 03 A6 83 C1 00 08 38 21 00 10 4E 80 00 20
+
+==== BB 1232 (0xFFDE8A8) approx BBs exec'd 0 ====
+
+ 0xFFDE8A8: 48000115 bl 0xFFDE9BC
+ 0: MOVL $0xFFDE8AC, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFFDE9BC ($4)
+
+
+. 0 FFDE8A8 4
+. 48 00 01 15
+
+==== BB 1233 (0xFFDE9BC) approx BBs exec'd 0 ====
+
+ 0xFFDE9BC: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDE9C0: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDE9C4: 429F0005 bcl 20,31,0xFFDE9C8
+ 9: MOVL $0xFFDE9C8, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFFDE9C8: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFFDE9CC: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xFFDE9D0: 90010014 stw r0,20(r1)
+ 20: GETL R0, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xFFDE9D4: 801EFFF0 lwz r0,-16(r30)
+ 25: GETL R30, t18
+ 26: ADDL $0xFFFFFFF0, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R0
+ 29: INCEIPL $4
+
+ 0xFFDE9D8: 7FC0F214 add r30,r0,r30
+ 30: GETL R0, t22
+ 31: GETL R30, t24
+ 32: ADDL t22, t24
+ 33: PUTL t24, R30
+ 34: INCEIPL $4
+
+ 0xFFDE9DC: 807E8010 lwz r3,-32752(r30)
+ 35: GETL R30, t26
+ 36: ADDL $0xFFFF8010, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R3
+ 39: INCEIPL $4
+
+ 0xFFDE9E0: 80030000 lwz r0,0(r3)
+ 40: GETL R3, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R0
+ 43: INCEIPL $4
+
+ 0xFFDE9E4: 2F800000 cmpi cr7,r0,0
+ 44: GETL R0, t34
+ 45: CMP0L t34, t36 (-rSo)
+ 46: ICRFL t36, $0x7, CR
+ 47: INCEIPL $4
+
+ 0xFFDE9E8: 419E0018 bc 12,30,0xFFDEA00
+ 48: Js30o $0xFFDEA00
+
+
+. 0 FFDE9BC 48
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 90 01 00 14 80 1E FF F0 7F C0 F2 14 80 7E 80 10 80 03 00 00 2F 80 00 00 41 9E 00 18
+
+==== BB 1234 (0xFFDEA00) approx BBs exec'd 0 ====
+
+ 0xFFDEA00: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDEA04: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFFDEA08: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0xFFDEA0C: 7C0803A6 mtlr r0
+ 14: GETL R0, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0xFFDEA10: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+. 0 FFDEA00 20
+. 80 01 00 14 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+==== BB 1235 (0xFFDE8AC) approx BBs exec'd 0 ====
+
+ 0xFFDE8AC: 48000659 bl 0xFFDEF04
+ 0: MOVL $0xFFDE8B0, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFFDEF04 ($4)
+
+
+. 0 FFDE8AC 4
+. 48 00 06 59
+
+==== BB 1236 (0xFFDEF04) approx BBs exec'd 0 ====
+
+ 0xFFDEF04: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDEF08: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDEF0C: 429F0005 bcl 20,31,0xFFDEF10
+ 9: MOVL $0xFFDEF10, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFFDEF10: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFFDEF14: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xFFDEF18: 93E1000C stw r31,12(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xFFDEF1C: 90010014 stw r0,20(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFFDEF20: 801EFFF0 lwz r0,-16(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0xFFFFFFF0, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFFDEF24: 7FC0F214 add r30,r0,r30
+ 35: GETL R0, t26
+ 36: GETL R30, t28
+ 37: ADDL t26, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0xFFDEF28: 813E8000 lwz r9,-32768(r30)
+ 40: GETL R30, t30
+ 41: ADDL $0xFFFF8000, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xFFDEF2C: 8009FFFC lwz r0,-4(r9)
+ 45: GETL R9, t34
+ 46: ADDL $0xFFFFFFFC, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R0
+ 49: INCEIPL $4
+
+ 0xFFDEF30: 3BE9FFFC addi r31,r9,-4
+ 50: GETL R9, t38
+ 51: ADDL $0xFFFFFFFC, t38
+ 52: PUTL t38, R31
+ 53: INCEIPL $4
+
+ 0xFFDEF34: 48000010 b 0xFFDEF44
+ 54: JMPo $0xFFDEF44 ($4)
+
+
+. 0 FFDEF04 52
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 80 09 FF FC 3B E9 FF FC 48 00 00 10
+
+==== BB 1237 (0xFFDEF44) approx BBs exec'd 0 ====
+
+ 0xFFDEF44: 2F80FFFF cmpi cr7,r0,-1
+ 0: GETL R0, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFFDEF48: 409EFFF0 bc 4,30,0xFFDEF38
+ 5: Jc30o $0xFFDEF38
+
+
+. 0 FFDEF44 8
+. 2F 80 FF FF 40 9E FF F0
+
+==== BB 1238 (0xFFDEF4C) approx BBs exec'd 0 ====
+
+ 0xFFDEF4C: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDEF50: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFFDEF54: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xFFDEF58: 7C0803A6 mtlr r0
+ 15: GETL R0, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFFDEF5C: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xFFDEF60: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+. 0 FFDEF4C 24
+. 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+
+==== BB 1239 (0xFFDE8B0) approx BBs exec'd 0 ====
+
+ 0xFFDE8B0: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDE8B4: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xFFDE8B8: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xFFDE8BC: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+. 0 FFDE8B0 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+
+==== BB 1240 (0x2547BA88) approx BBs exec'd 0 ====
+
+ 0x2547BA88: 4BFFFF10 b 0x2547B998
+ 0: JMPo $0x2547B998 ($4)
+
+
+. 0 2547BA88 4
+. 4B FF FF 10
+
+==== BB 1241 (0x2547B998) approx BBs exec'd 0 ====
+
+ 0x2547B998: 817F0084 lwz r11,132(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547B99C: 2C8B0000 cmpi cr1,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547B9A0: 418600BC bc 12,6,0x2547BA5C
+ 9: Js06o $0x2547BA5C
+
+
+. 0 2547B998 12
+. 81 7F 00 84 2C 8B 00 00 41 86 00 BC
+
+==== BB 1242 (0x2547BA5C) approx BBs exec'd 0 ====
+
+ 0x2547BA5C: 3B800000 li r28,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R28
+ 2: INCEIPL $4
+
+ 0x2547BA60: 939601A0 stw r28,416(r22)
+ 3: GETL R28, t2
+ 4: GETL R22, t4
+ 5: ADDL $0x1A0, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0x2547BA64: 4BFFFD48 b 0x2547B7AC
+ 8: JMPo $0x2547B7AC ($4)
+
+
+. 0 2547BA5C 12
+. 3B 80 00 00 93 96 01 A0 4B FF FD 48
+
+==== BB 1243 (0x2547B7AC) approx BBs exec'd 0 ====
+
+ 0x2547B7AC: 2F9D0000 cmpi cr7,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547B7B0: 409E0240 bc 4,30,0x2547B9F0
+ 4: Jc30o $0x2547B9F0
+
+
+. 0 2547B7AC 8
+. 2F 9D 00 00 40 9E 02 40
+
+==== BB 1244 (0x2547B7B4) approx BBs exec'd 0 ====
+
+ 0x2547B7B4: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547B7B8: 3A800001 li r20,1
+ 3: MOVL $0x1, t2
+ 4: PUTL t2, R20
+ 5: INCEIPL $4
+
+ 0x2547B7BC: 48000789 bl 0x2547BF44
+ 6: MOVL $0x2547B7C0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0x2547BF44 ($4)
+
+
+. 0 2547B7B4 12
+. 38 60 00 00 3A 80 00 01 48 00 07 89
+
+==== BB 1245 (0x2547BF94) approx BBs exec'd 0 ====
+
+ 0x2547BF94: 83C10008 lwz r30,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R30
+ 4: INCEIPL $4
+
+ 0x2547BF98: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x2547BF9C: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+. 0 2547BF94 12
+. 83 C1 00 08 38 21 00 10 4E 80 00 20
+
+==== BB 1246 (0x2547B7C0) approx BBs exec'd 0 ====
+
+ 0x2547B7C0: 9283000C stw r20,12(r3)
+ 0: GETL R20, t0
+ 1: GETL R3, t2
+ 2: ADDL $0xC, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547B7C4: 7C761B78 or r22,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R22
+ 7: INCEIPL $4
+
+ 0x2547B7C8: 480007D9 bl 0x2547BFA0
+ 8: MOVL $0x2547B7CC, t6
+ 9: PUTL t6, LR
+ 10: JMPo-c $0x2547BFA0 ($4)
+
+
+. 0 2547B7C0 12
+. 92 83 00 0C 7C 76 1B 78 48 00 07 D9
+
+==== BB 1247 (0x2547B7CC) approx BBs exec'd 0 ====
+
+ 0x2547B7CC: 83BA015C lwz r29,348(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x15C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0x2547B7D0: 2F9D0000 cmpi cr7,r29,0
+ 5: GETL R29, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547B7D4: 3B9DFFFF addi r28,r29,-1
+ 9: GETL R29, t8
+ 10: ADDL $0xFFFFFFFF, t8
+ 11: PUTL t8, R28
+ 12: INCEIPL $4
+
+ 0x2547B7D8: 419E0058 bc 12,30,0x2547B830
+ 13: Js30o $0x2547B830
+
+
+. 0 2547B7CC 16
+. 83 BA 01 5C 2F 9D 00 00 3B 9D FF FF 41 9E 00 58
+
+==== BB 1248 (0x2547B7DC) approx BBs exec'd 0 ====
+
+ 0x2547B7DC: 82BA01E8 lwz r21,488(r26)
+ 0: GETL R26, t0
+ 1: ADDL $0x1E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R21
+ 4: INCEIPL $4
+
+ 0x2547B7E0: 5780103A rlwinm r0,r28,2,0,29
+ 5: GETL R28, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547B7E4: 7FF5002E lwzx r31,r21,r0
+ 9: GETL R0, t6
+ 10: GETL R21, t8
+ 11: ADDL t8, t6
+ 12: LDL (t6), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0x2547B7E8: 801F0180 lwz r0,384(r31)
+ 15: GETL R31, t12
+ 16: ADDL $0x180, t12
+ 17: LDL (t12), t14
+ 18: PUTL t14, R0
+ 19: INCEIPL $4
+
+ 0x2547B7EC: 74091000 andis. r9,r0,0x1000
+ 20: GETL R0, t16
+ 21: ANDL $0x10000000, t16
+ 22: PUTL t16, R9
+ 23: CMP0L t16, t18 (-rSo)
+ 24: ICRFL t18, $0x0, CR
+ 25: INCEIPL $4
+
+ 0x2547B7F0: 40820034 bc 4,2,0x2547B824
+ 26: Jc02o $0x2547B824
+
+
+. 0 2547B7DC 24
+. 82 BA 01 E8 57 80 10 3A 7F F5 00 2E 80 1F 01 80 74 09 10 00 40 82 00 34
+
+==== BB 1249 (0x2547B7F4) approx BBs exec'd 0 ====
+
+ 0x2547B7F4: 64091000 oris r9,r0,0x1000
+ 0: GETL R0, t0
+ 1: ORL $0x10000000, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0x2547B7F8: 809F0004 lwz r4,4(r31)
+ 4: GETL R31, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2547B7FC: 913F0180 stw r9,384(r31)
+ 9: GETL R9, t6
+ 10: GETL R31, t8
+ 11: ADDL $0x180, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547B800: 88640000 lbz r3,0(r4)
+ 14: GETL R4, t10
+ 15: LDB (t10), t12
+ 16: PUTL t12, R3
+ 17: INCEIPL $4
+
+ 0x2547B804: 2F030000 cmpi cr6,r3,0
+ 18: GETL R3, t14
+ 19: CMP0L t14, t16 (-rSo)
+ 20: ICRFL t16, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x2547B808: 419A0104 bc 12,26,0x2547B90C
+ 22: Js26o $0x2547B90C
+
+
+. 0 2547B7F4 24
+. 64 09 10 00 80 9F 00 04 91 3F 01 80 88 64 00 00 2F 03 00 00 41 9A 01 04
+
+==== BB 1250 (0x2547B80C) approx BBs exec'd 0 ====
+
+ 0x2547B80C: 815F0050 lwz r10,80(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x50, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547B810: 2C8A0000 cmpi cr1,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547B814: 40860064 bc 4,6,0x2547B878
+ 9: Jc06o $0x2547B878
+
+
+. 0 2547B80C 12
+. 81 5F 00 50 2C 8A 00 00 40 86 00 64
+
+==== BB 1251 (0x2547B818) approx BBs exec'd 0 ====
+
+ 0x2547B818: 80BF0084 lwz r5,132(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547B81C: 2F850000 cmpi cr7,r5,0
+ 5: GETL R5, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547B820: 409E0058 bc 4,30,0x2547B878
+ 9: Jc30o $0x2547B878
+
+
+. 0 2547B818 12
+. 80 BF 00 84 2F 85 00 00 40 9E 00 58
+
+==== BB 1252 (0x2547B824) approx BBs exec'd 0 ====
+
+ 0x2547B824: 2F9C0000 cmpi cr7,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547B828: 3B9CFFFF addi r28,r28,-1
+ 4: GETL R28, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x2547B82C: 409EFFB0 bc 4,30,0x2547B7DC
+ 8: Jc30o $0x2547B7DC
+
+
+. 0 2547B824 12
+. 2F 9C 00 00 3B 9C FF FF 40 9E FF B0
+
+==== BB 1253 (0x2547B878) approx BBs exec'd 0 ====
+
+ 0x2547B878: 80DE04F4 lwz r6,1268(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x4F4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0x2547B87C: 83660000 lwz r27,0(r6)
+ 5: GETL R6, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0x2547B880: 73690002 andi. r9,r27,0x2
+ 9: GETL R27, t8
+ 10: ANDL $0x2, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0x2547B884: 4082009C bc 4,2,0x2547B920
+ 15: Jc02o $0x2547B920
+
+
+. 0 2547B878 16
+. 80 DE 04 F4 83 66 00 00 73 69 00 02 40 82 00 9C
+
+==== BB 1254 (0x2547B888) approx BBs exec'd 0 ====
+
+ 0x2547B888: 2F0A0000 cmpi cr6,r10,0
+ 0: GETL R10, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547B88C: 409A005C bc 4,26,0x2547B8E8
+ 4: Jc26o $0x2547B8E8
+
+
+. 0 2547B888 8
+. 2F 0A 00 00 40 9A 00 5C
+
+==== BB 1255 (0x2547B8E8) approx BBs exec'd 0 ====
+
+ 0x2547B8E8: 810A0004 lwz r8,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547B8EC: 7EE3BB78 or r3,r23,r23
+ 5: GETL R23, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0x2547B8F0: 80FF0000 lwz r7,0(r31)
+ 8: GETL R31, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R7
+ 11: INCEIPL $4
+
+ 0x2547B8F4: 7F25CB78 or r5,r25,r25
+ 12: GETL R25, t10
+ 13: PUTL t10, R5
+ 14: INCEIPL $4
+
+ 0x2547B8F8: 7C874214 add r4,r7,r8
+ 15: GETL R7, t12
+ 16: GETL R8, t14
+ 17: ADDL t12, t14
+ 18: PUTL t14, R4
+ 19: INCEIPL $4
+
+ 0x2547B8FC: 7C8903A6 mtctr r4
+ 20: GETL R4, t16
+ 21: PUTL t16, CTR
+ 22: INCEIPL $4
+
+ 0x2547B900: 7F04C378 or r4,r24,r24
+ 23: GETL R24, t18
+ 24: PUTL t18, R4
+ 25: INCEIPL $4
+
+ 0x2547B904: 4E800421 bctrl
+ 26: MOVL $0x2547B908, t20
+ 27: PUTL t20, LR
+ 28: GETL CTR, t22
+ 29: JMPo-c t22 ($4)
+
+
+. 0 2547B8E8 32
+. 81 0A 00 04 7E E3 BB 78 80 FF 00 00 7F 25 CB 78 7C 87 42 14 7C 89 03 A6 7F 04 C3 78 4E 80 04 21
+
+==== BB 1256 _init(0xFE9B620) approx BBs exec'd 0 ====
+
+ 0xFE9B620: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE9B624: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE9B628: 4812C829 bl 0xFFC7E50
+ 9: MOVL $0xFE9B62C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FE9B620 12
+. 94 21 FF E0 7C 08 02 A6 48 12 C8 29
+
+==== BB 1257 (0xFFC7E50) approx BBs exec'd 0 ====
+
+ 0xFFC7E50: 4E800021 blrl
+ 0: GETL LR, t0
+ 1: MOVL $0xFFC7E54, t2
+ 2: PUTL t2, LR
+ 3: JMPo-r t0 ($4)
+
+
+. 0 FFC7E50 4
+. 4E 80 00 21
+
+==== BB 1258 (0xFE9B62C) approx BBs exec'd 0 ====
+
+ 0xFE9B62C: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE9B630: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE9B634: 93810010 stw r28,16(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE9B638: 93A10014 stw r29,20(r1)
+ 13: GETL R29, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE9B63C: 7CBC2B78 or r28,r5,r5
+ 18: GETL R5, t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0xFE9B640: 93E1001C stw r31,28(r1)
+ 21: GETL R31, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x1C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFE9B644: 7C9D2378 or r29,r4,r4
+ 26: GETL R4, t20
+ 27: PUTL t20, R29
+ 28: INCEIPL $4
+
+ 0xFE9B648: 817E1CE4 lwz r11,7396(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x1CE4, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R11
+ 33: INCEIPL $4
+
+ 0xFE9B64C: 7C7F1B78 or r31,r3,r3
+ 34: GETL R3, t26
+ 35: PUTL t26, R31
+ 36: INCEIPL $4
+
+ 0xFE9B650: 811E1AA4 lwz r8,6820(r30)
+ 37: GETL R30, t28
+ 38: ADDL $0x1AA4, t28
+ 39: LDL (t28), t30
+ 40: PUTL t30, R8
+ 41: INCEIPL $4
+
+ 0xFE9B654: 39200000 li r9,0
+ 42: MOVL $0x0, t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xFE9B658: 2F8B0000 cmpi cr7,r11,0
+ 45: GETL R11, t34
+ 46: CMP0L t34, t36 (-rSo)
+ 47: ICRFL t36, $0x7, CR
+ 48: INCEIPL $4
+
+ 0xFE9B65C: 90010024 stw r0,36(r1)
+ 49: GETL R0, t38
+ 50: GETL R1, t40
+ 51: ADDL $0x24, t40
+ 52: STL t38, (t40)
+ 53: INCEIPL $4
+
+ 0xFE9B660: 7D0A4378 or r10,r8,r8
+ 54: GETL R8, t42
+ 55: PUTL t42, R10
+ 56: INCEIPL $4
+
+ 0xFE9B664: 419E0010 bc 12,30,0xFE9B674
+ 57: Js30o $0xFE9B674
+
+
+. 0 FE9B62C 60
+. 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 A1 00 14 7C BC 2B 78 93 E1 00 1C 7C 9D 23 78 81 7E 1C E4 7C 7F 1B 78 81 1E 1A A4 39 20 00 00 2F 8B 00 00 90 01 00 24 7D 0A 43 78 41 9E 00 10
+
+==== BB 1259 (0xFE9B674) approx BBs exec'd 0 ====
+
+ 0xFE9B674: 912A0000 stw r9,0(r10)
+ 0: GETL R9, t0
+ 1: GETL R10, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFE9B678: 80880000 lwz r4,0(r8)
+ 4: GETL R8, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R4
+ 7: INCEIPL $4
+
+ 0xFE9B67C: 2C840000 cmpi cr1,r4,0
+ 8: GETL R4, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x1, CR
+ 11: INCEIPL $4
+
+ 0xFE9B680: 40860024 bc 4,6,0xFE9B6A4
+ 12: Jc06o $0xFE9B6A4
+
+
+. 0 FE9B674 16
+. 91 2A 00 00 80 88 00 00 2C 84 00 00 40 86 00 24
+
+==== BB 1260 (0xFE9B684) approx BBs exec'd 0 ====
+
+ 0xFE9B684: 813E1BF4 lwz r9,7156(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BF4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFE9B688: 817E1BC8 lwz r11,7112(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1BC8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R11
+ 9: INCEIPL $4
+
+ 0xFE9B68C: 81490000 lwz r10,0(r9)
+ 10: GETL R9, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R10
+ 13: INCEIPL $4
+
+ 0xFE9B690: 80AB0034 lwz r5,52(r11)
+ 14: GETL R11, t12
+ 15: ADDL $0x34, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R5
+ 18: INCEIPL $4
+
+ 0xFE9B694: 7D435378 or r3,r10,r10
+ 19: GETL R10, t16
+ 20: PUTL t16, R3
+ 21: INCEIPL $4
+
+ 0xFE9B698: 7F055000 cmp cr6,r5,r10
+ 22: GETL R5, t18
+ 23: GETL R10, t20
+ 24: CMPL t18, t20, t22 (-rSo)
+ 25: ICRFL t22, $0x6, CR
+ 26: INCEIPL $4
+
+ 0xFE9B69C: 419A0008 bc 12,26,0xFE9B6A4
+ 27: Js26o $0xFE9B6A4
+
+
+. 0 FE9B684 28
+. 81 3E 1B F4 81 7E 1B C8 81 49 00 00 80 AB 00 34 7D 43 53 78 7F 05 50 00 41 9A 00 08
+
+==== BB 1261 (0xFE9B6A4) approx BBs exec'd 0 ====
+
+ 0xFE9B6A4: 819E1A8C lwz r12,6796(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1A8C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R12
+ 4: INCEIPL $4
+
+ 0xFE9B6A8: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFE9B6AC: 811E1DD4 lwz r8,7636(r30)
+ 8: GETL R30, t6
+ 9: ADDL $0x1DD4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R8
+ 12: INCEIPL $4
+
+ 0xFE9B6B0: 7FA4EB78 or r4,r29,r29
+ 13: GETL R29, t10
+ 14: PUTL t10, R4
+ 15: INCEIPL $4
+
+ 0xFE9B6B4: 80FE1B84 lwz r7,7044(r30)
+ 16: GETL R30, t12
+ 17: ADDL $0x1B84, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R7
+ 20: INCEIPL $4
+
+ 0xFE9B6B8: 7F85E378 or r5,r28,r28
+ 21: GETL R28, t16
+ 22: PUTL t16, R5
+ 23: INCEIPL $4
+
+ 0xFE9B6BC: 93EC0000 stw r31,0(r12)
+ 24: GETL R31, t18
+ 25: GETL R12, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0xFE9B6C0: 93A80000 stw r29,0(r8)
+ 28: GETL R29, t22
+ 29: GETL R8, t24
+ 30: STL t22, (t24)
+ 31: INCEIPL $4
+
+ 0xFE9B6C4: 93870000 stw r28,0(r7)
+ 32: GETL R28, t26
+ 33: GETL R7, t28
+ 34: STL t26, (t28)
+ 35: INCEIPL $4
+
+ 0xFE9B6C8: 480B6421 bl 0xFF51AE8
+ 36: MOVL $0xFE9B6CC, t30
+ 37: PUTL t30, LR
+ 38: JMPo-c $0xFF51AE8 ($4)
+
+
+. 0 FE9B6A4 40
+. 81 9E 1A 8C 7F E3 FB 78 81 1E 1D D4 7F A4 EB 78 80 FE 1B 84 7F 85 E3 78 93 EC 00 00 93 A8 00 00 93 87 00 00 48 0B 64 21
+
+==== BB 1262 __init_misc(0xFF51AE8) approx BBs exec'd 0 ====
+
+ 0xFF51AE8: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFF51AEC: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFF51AF0: 93A10014 stw r29,20(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFF51AF4: 7C9D2379 or. r29,r4,r4
+ 14: GETL R4, t10
+ 15: PUTL t10, R29
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x0, CR
+ 18: INCEIPL $4
+
+ 0xFF51AF8: 48076359 bl 0xFFC7E50
+ 19: MOVL $0xFF51AFC, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FF51AE8 20
+. 94 21 FF E0 7C 08 02 A6 93 A1 00 14 7C 9D 23 79 48 07 63 59
+
+==== BB 1263 (0xFF51AFC) approx BBs exec'd 0 ====
+
+ 0xFF51AFC: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF51B00: 93E1001C stw r31,28(r1)
+ 5: GETL R31, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x1C, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFF51B04: 7FC802A6 mflr r30
+ 10: GETL LR, t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0xFF51B08: 90010024 stw r0,36(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x24, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFF51B0C: 4182003C bc 12,2,0xFF51B48
+ 18: Js02o $0xFF51B48
+
+
+. 0 FF51AFC 20
+. 93 C1 00 18 93 E1 00 1C 7F C8 02 A6 90 01 00 24 41 82 00 3C
+
+==== BB 1264 (0xFF51B10) approx BBs exec'd 0 ====
+
+ 0xFF51B10: 83FD0000 lwz r31,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R31
+ 3: INCEIPL $4
+
+ 0xFF51B14: 3880002F li r4,47
+ 4: MOVL $0x2F, t4
+ 5: PUTL t4, R4
+ 6: INCEIPL $4
+
+ 0xFF51B18: 2F9F0000 cmpi cr7,r31,0
+ 7: GETL R31, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x7, CR
+ 10: INCEIPL $4
+
+ 0xFF51B1C: 7FE3FB78 or r3,r31,r31
+ 11: GETL R31, t10
+ 12: PUTL t10, R3
+ 13: INCEIPL $4
+
+ 0xFF51B20: 419E0028 bc 12,30,0xFF51B48
+ 14: Js30o $0xFF51B48
+
+
+. 0 FF51B10 20
+. 83 FD 00 00 38 80 00 2F 2F 9F 00 00 7F E3 FB 78 41 9E 00 28
+
+==== BB 1265 (0xFF51B24) approx BBs exec'd 0 ====
+
+ 0xFF51B24: 4BFA5459 bl 0xFEF6F7C
+ 0: MOVL $0xFF51B28, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFEF6F7C ($4)
+
+
+. 0 FF51B24 4
+. 4B FA 54 59
+
+==== BB 1266 strrchr(0xFEF6F7C) approx BBs exec'd 0 ====
+
+ 0xFEF6F7C: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEF6F80: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFEF6F84: 93A10014 stw r29,20(r1)
+ 9: GETL R29, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEF6F88: 549D063E rlwinm r29,r4,0,24,31
+ 14: GETL R4, t10
+ 15: ANDL $0xFF, t10
+ 16: PUTL t10, R29
+ 17: INCEIPL $4
+
+ 0xFEF6F8C: 2F9D0000 cmpi cr7,r29,0
+ 18: GETL R29, t12
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x7, CR
+ 21: INCEIPL $4
+
+ 0xFEF6F90: 93C10018 stw r30,24(r1)
+ 22: GETL R30, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x18, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0xFEF6F94: 90010024 stw r0,36(r1)
+ 27: GETL R0, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x24, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFEF6F98: 7C601B78 or r0,r3,r3
+ 32: GETL R3, t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFEF6F9C: 93E1001C stw r31,28(r1)
+ 35: GETL R31, t26
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: STL t26, (t28)
+ 39: INCEIPL $4
+
+ 0xFEF6FA0: 409E0024 bc 4,30,0xFEF6FC4
+ 40: Jc30o $0xFEF6FC4
+
+
+. 0 FEF6F7C 40
+. 94 21 FF E0 7C 08 02 A6 93 A1 00 14 54 9D 06 3E 2F 9D 00 00 93 C1 00 18 90 01 00 24 7C 60 1B 78 93 E1 00 1C 40 9E 00 24
+
+==== BB 1267 (0xFEF6FC4) approx BBs exec'd 0 ====
+
+ 0xFEF6FC4: 3BE00000 li r31,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0xFEF6FC8: 4800000C b 0xFEF6FD4
+ 3: JMPo $0xFEF6FD4 ($4)
+
+
+. 0 FEF6FC4 8
+. 3B E0 00 00 48 00 00 0C
+
+==== BB 1268 (0xFEF6FD4) approx BBs exec'd 0 ====
+
+ 0xFEF6FD4: 7C030378 or r3,r0,r0
+ 0: GETL R0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEF6FD8: 7FA4EB78 or r4,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFEF6FDC: 4BFFF2F1 bl 0xFEF62CC
+ 6: MOVL $0xFEF6FE0, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFEF62CC ($4)
+
+
+. 0 FEF6FD4 12
+. 7C 03 03 78 7F A4 EB 78 4B FF F2 F1
+
+==== BB 1269 strchr(0xFEF62CC) approx BBs exec'd 0 ====
+
+ 0xFEF62CC: 5084442E rlwimi r4,r4,8,16,23
+ 0: GETL R4, t0
+ 1: GETL R4, t2
+ 2: ROLL $0x8, t2
+ 3: ANDL $0xFF00, t2
+ 4: ANDL $0xFFFF00FF, t0
+ 5: ORL t0, t2
+ 6: PUTL t2, R4
+ 7: INCEIPL $4
+
+ 0xFEF62D0: 3960FFFF li r11,-1
+ 8: MOVL $0xFFFFFFFF, t4
+ 9: PUTL t4, R11
+ 10: INCEIPL $4
+
+ 0xFEF62D4: 5084801E rlwimi r4,r4,16,0,15
+ 11: GETL R4, t6
+ 12: GETL R4, t8
+ 13: ROLL $0x10, t8
+ 14: ANDL $0xFFFF0000, t8
+ 15: ANDL $0xFFFF, t6
+ 16: ORL t6, t8
+ 17: PUTL t8, R4
+ 18: INCEIPL $4
+
+ 0xFEF62D8: 546A1EF8 rlwinm r10,r3,3,27,28
+ 19: GETL R3, t10
+ 20: ROLL $0x3, t10
+ 21: ANDL $0x18, t10
+ 22: PUTL t10, R10
+ 23: INCEIPL $4
+
+ 0xFEF62DC: 3CC0FEFF lis r6,-257
+ 24: MOVL $0xFEFF0000, t12
+ 25: PUTL t12, R6
+ 26: INCEIPL $4
+
+ 0xFEF62E0: 3CE07F7F lis r7,32639
+ 27: MOVL $0x7F7F0000, t14
+ 28: PUTL t14, R7
+ 29: INCEIPL $4
+
+ 0xFEF62E4: 5468003A rlwinm r8,r3,0,0,29
+ 30: GETL R3, t16
+ 31: ANDL $0xFFFFFFFC, t16
+ 32: PUTL t16, R8
+ 33: INCEIPL $4
+
+ 0xFEF62E8: 38C6FEFF addi r6,r6,-257
+ 34: MOVL $0xFEFEFEFF, t18
+ 35: PUTL t18, R6
+ 36: INCEIPL $4
+
+ 0xFEF62EC: 38E77F7F addi r7,r7,32639
+ 37: MOVL $0x7F7F7F7F, t20
+ 38: PUTL t20, R7
+ 39: INCEIPL $4
+
+ 0xFEF62F0: 80A80000 lwz r5,0(r8)
+ 40: GETL R8, t22
+ 41: LDL (t22), t24
+ 42: PUTL t24, R5
+ 43: INCEIPL $4
+
+ 0xFEF62F4: 7D6B5430 srw r11,r11,r10
+ 44: GETL R11, t28
+ 45: GETL R10, t26
+ 46: SHRL t26, t28
+ 47: PUTL t28, R11
+ 48: INCEIPL $4
+
+ 0xFEF62F8: 7CA55B38 orc r5,r5,r11
+ 49: GETL R5, t30
+ 50: GETL R11, t32
+ 51: NOTL t32
+ 52: ORL t30, t32
+ 53: PUTL t32, R5
+ 54: INCEIPL $4
+
+ 0xFEF62FC: 7C062A14 add r0,r6,r5
+ 55: GETL R6, t34
+ 56: GETL R5, t36
+ 57: ADDL t34, t36
+ 58: PUTL t36, R0
+ 59: INCEIPL $4
+
+ 0xFEF6300: 7CE928F8 nor r9,r7,r5
+ 60: GETL R7, t38
+ 61: GETL R5, t40
+ 62: ORL t40, t38
+ 63: NOTL t38
+ 64: PUTL t38, R9
+ 65: INCEIPL $4
+
+ 0xFEF6304: 7C004839 and. r0,r0,r9
+ 66: GETL R0, t42
+ 67: GETL R9, t44
+ 68: ANDL t42, t44
+ 69: PUTL t44, R0
+ 70: CMP0L t44, t46 (-rSo)
+ 71: ICRFL t46, $0x0, CR
+ 72: INCEIPL $4
+
+ 0xFEF6308: 7C8C2A78 xor r12,r4,r5
+ 73: GETL R4, t48
+ 74: GETL R5, t50
+ 75: XORL t48, t50
+ 76: PUTL t50, R12
+ 77: INCEIPL $4
+
+ 0xFEF630C: 7D8C5B38 orc r12,r12,r11
+ 78: GETL R12, t52
+ 79: GETL R11, t54
+ 80: NOTL t54
+ 81: ORL t52, t54
+ 82: PUTL t54, R12
+ 83: INCEIPL $4
+
+ 0xFEF6310: 48000020 b 0xFEF6330
+ 84: JMPo $0xFEF6330 ($4)
+
+
+. 0 FEF62CC 72
+. 50 84 44 2E 39 60 FF FF 50 84 80 1E 54 6A 1E F8 3C C0 FE FF 3C E0 7F 7F 54 68 00 3A 38 C6 FE FF 38 E7 7F 7F 80 A8 00 00 7D 6B 54 30 7C A5 5B 38 7C 06 2A 14 7C E9 28 F8 7C 00 48 39 7C 8C 2A 78 7D 8C 5B 38 48 00 00 20
+
+==== BB 1270 (0xFEF6330) approx BBs exec'd 0 ====
+
+ 0xFEF6330: 7C066214 add r0,r6,r12
+ 0: GETL R6, t0
+ 1: GETL R12, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEF6334: 7CE960F8 nor r9,r7,r12
+ 5: GETL R7, t4
+ 6: GETL R12, t6
+ 7: ORL t6, t4
+ 8: NOTL t4
+ 9: PUTL t4, R9
+ 10: INCEIPL $4
+
+ 0xFEF6338: 4182FFDC bc 12,2,0xFEF6314
+ 11: Js02o $0xFEF6314
+
+
+. 0 FEF6330 12
+. 7C 06 62 14 7C E9 60 F8 41 82 FF DC
+
+==== BB 1271 (0xFEF6314) approx BBs exec'd 0 ====
+
+ 0xFEF6314: 84A80004 lwzu r5,4(r8)
+ 0: GETL R8, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R8
+ 3: LDL (t0), t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFEF6318: 7C004839 and. r0,r0,r9
+ 6: GETL R0, t4
+ 7: GETL R9, t6
+ 8: ANDL t4, t6
+ 9: PUTL t6, R0
+ 10: CMP0L t6, t8 (-rSo)
+ 11: ICRFL t8, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFEF631C: 7C062A14 add r0,r6,r5
+ 13: GETL R6, t10
+ 14: GETL R5, t12
+ 15: ADDL t10, t12
+ 16: PUTL t12, R0
+ 17: INCEIPL $4
+
+ 0xFEF6320: 7CE928F8 nor r9,r7,r5
+ 18: GETL R7, t14
+ 19: GETL R5, t16
+ 20: ORL t16, t14
+ 21: NOTL t14
+ 22: PUTL t14, R9
+ 23: INCEIPL $4
+
+ 0xFEF6324: 4082005C bc 4,2,0xFEF6380
+ 24: Jc02o $0xFEF6380
+
+
+. 0 FEF6314 20
+. 84 A8 00 04 7C 00 48 39 7C 06 2A 14 7C E9 28 F8 40 82 00 5C
+
+==== BB 1272 (0xFEF6380) approx BBs exec'd 0 ====
+
+ 0xFEF6380: 7CE06038 and r0,r7,r12
+ 0: GETL R7, t0
+ 1: GETL R12, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFEF6384: 7CEA6378 or r10,r7,r12
+ 5: GETL R7, t4
+ 6: GETL R12, t6
+ 7: ORL t6, t4
+ 8: PUTL t4, R10
+ 9: INCEIPL $4
+
+ 0xFEF6388: 7C003A14 add r0,r0,r7
+ 10: GETL R0, t8
+ 11: GETL R7, t10
+ 12: ADDL t8, t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0xFEF638C: 7D4900F8 nor r9,r10,r0
+ 15: GETL R10, t12
+ 16: GETL R0, t14
+ 17: ORL t14, t12
+ 18: NOTL t12
+ 19: PUTL t12, R9
+ 20: INCEIPL $4
+
+ 0xFEF6390: 7D240034 cntlzw r4,r9
+ 21: GETL R9, t16
+ 22: CNTLZL t16
+ 23: PUTL t16, R4
+ 24: INCEIPL $4
+
+ 0xFEF6394: 3908FFFC addi r8,r8,-4
+ 25: GETL R8, t18
+ 26: ADDL $0xFFFFFFFC, t18
+ 27: PUTL t18, R8
+ 28: INCEIPL $4
+
+ 0xFEF6398: 5484E8FE rlwinm r4,r4,29,3,31
+ 29: GETL R4, t20
+ 30: SHRL $0x3, t20
+ 31: PUTL t20, R4
+ 32: INCEIPL $4
+
+ 0xFEF639C: 7C682214 add r3,r8,r4
+ 33: GETL R8, t22
+ 34: GETL R4, t24
+ 35: ADDL t22, t24
+ 36: PUTL t24, R3
+ 37: INCEIPL $4
+
+ 0xFEF63A0: 4E800020 blr
+ 38: GETL LR, t26
+ 39: JMPo-r t26 ($4)
+
+
+. 0 FEF6380 36
+. 7C E0 60 38 7C EA 63 78 7C 00 3A 14 7D 49 00 F8 7D 24 00 34 39 08 FF FC 54 84 E8 FE 7C 68 22 14 4E 80 00 20
+
+==== BB 1273 (0xFEF6FE0) approx BBs exec'd 0 ====
+
+ 0xFEF6FE0: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEF6FE4: 4082FFE8 bc 4,2,0xFEF6FCC
+ 4: Jc02o $0xFEF6FCC
+
+
+. 0 FEF6FE0 8
+. 2C 03 00 00 40 82 FF E8
+
+==== BB 1274 (0xFEF6FCC) approx BBs exec'd 0 ====
+
+ 0xFEF6FCC: 7C7F1B78 or r31,r3,r3
+ 0: GETL R3, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0xFEF6FD0: 38030001 addi r0,r3,1
+ 3: GETL R3, t2
+ 4: ADDL $0x1, t2
+ 5: PUTL t2, R0
+ 6: INCEIPL $4
+
+ 0xFEF6FD4: 7C030378 or r3,r0,r0
+ 7: GETL R0, t4
+ 8: PUTL t4, R3
+ 9: INCEIPL $4
+
+ 0xFEF6FD8: 7FA4EB78 or r4,r29,r29
+ 10: GETL R29, t6
+ 11: PUTL t6, R4
+ 12: INCEIPL $4
+
+ 0xFEF6FDC: 4BFFF2F1 bl 0xFEF62CC
+ 13: MOVL $0xFEF6FE0, t8
+ 14: PUTL t8, LR
+ 15: JMPo-c $0xFEF62CC ($4)
+
+
+. 0 FEF6FCC 20
+. 7C 7F 1B 78 38 03 00 01 7C 03 03 78 7F A4 EB 78 4B FF F2 F1
+
+==== BB 1275 (0xFEF6328) approx BBs exec'd 0 ====
+
+ 0xFEF6328: 7C004839 and. r0,r0,r9
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFEF632C: 7C8C2A78 xor r12,r4,r5
+ 7: GETL R4, t6
+ 8: GETL R5, t8
+ 9: XORL t6, t8
+ 10: PUTL t8, R12
+ 11: INCEIPL $4
+
+ 0xFEF6330: 7C066214 add r0,r6,r12
+ 12: GETL R6, t10
+ 13: GETL R12, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R0
+ 16: INCEIPL $4
+
+ 0xFEF6334: 7CE960F8 nor r9,r7,r12
+ 17: GETL R7, t14
+ 18: GETL R12, t16
+ 19: ORL t16, t14
+ 20: NOTL t14
+ 21: PUTL t14, R9
+ 22: INCEIPL $4
+
+ 0xFEF6338: 4182FFDC bc 12,2,0xFEF6314
+ 23: Js02o $0xFEF6314
+
+
+. 0 FEF6328 20
+. 7C 00 48 39 7C 8C 2A 78 7C 06 62 14 7C E9 60 F8 41 82 FF DC
+
+==== BB 1276 (0xFEF633C) approx BBs exec'd 0 ====
+
+ 0xFEF633C: 7C004839 and. r0,r0,r9
+ 0: GETL R0, t0
+ 1: GETL R9, t2
+ 2: ANDL t0, t2
+ 3: PUTL t2, R0
+ 4: CMP0L t2, t4 (-rSo)
+ 5: ICRFL t4, $0x0, CR
+ 6: INCEIPL $4
+
+ 0xFEF6340: 38600000 li r3,0
+ 7: MOVL $0x0, t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0xFEF6344: 4D820020 bclr 12,2
+ 10: GETL LR, t8
+ 11: Js02o-r t8
+
+
+. 0 FEF633C 12
+. 7C 00 48 39 38 60 00 00 4D 82 00 20
+
+==== BB 1277 (0xFEF6FE8) approx BBs exec'd 0 ====
+
+ 0xFEF6FE8: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFEF6FEC: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEF6FF0: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0xFEF6FF4: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0xFEF6FF8: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFEF6FFC: 83E1001C lwz r31,28(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0xFEF7000: 38210020 addi r1,r1,32
+ 26: GETL R1, t20
+ 27: ADDL $0x20, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0xFEF7004: 4E800020 blr
+ 30: GETL LR, t22
+ 31: JMPo-r t22 ($4)
+
+
+. 0 FEF6FE8 32
+. 80 81 00 24 7F E3 FB 78 83 A1 00 14 83 C1 00 18 7C 88 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 1278 (0xFF51B28) approx BBs exec'd 0 ====
+
+ 0xFF51B28: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFF51B2C: 38630001 addi r3,r3,1
+ 4: GETL R3, t4
+ 5: ADDL $0x1, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFF51B30: 41860034 bc 12,6,0xFF51B64
+ 8: Js06o $0xFF51B64
+
+
+. 0 FF51B28 12
+. 2C 83 00 00 38 63 00 01 41 86 00 34
+
+==== BB 1279 (0xFF51B34) approx BBs exec'd 0 ====
+
+ 0xFF51B34: 809E1C34 lwz r4,7220(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1C34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFF51B38: 90640000 stw r3,0(r4)
+ 5: GETL R3, t4
+ 6: GETL R4, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFF51B3C: 80BD0000 lwz r5,0(r29)
+ 9: GETL R29, t8
+ 10: LDL (t8), t10
+ 11: PUTL t10, R5
+ 12: INCEIPL $4
+
+ 0xFF51B40: 807E1E24 lwz r3,7716(r30)
+ 13: GETL R30, t12
+ 14: ADDL $0x1E24, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R3
+ 17: INCEIPL $4
+
+ 0xFF51B44: 90A30000 stw r5,0(r3)
+ 18: GETL R5, t16
+ 19: GETL R3, t18
+ 20: STL t16, (t18)
+ 21: INCEIPL $4
+
+ 0xFF51B48: 80C10024 lwz r6,36(r1)
+ 22: GETL R1, t20
+ 23: ADDL $0x24, t20
+ 24: LDL (t20), t22
+ 25: PUTL t22, R6
+ 26: INCEIPL $4
+
+ 0xFF51B4C: 83A10014 lwz r29,20(r1)
+ 27: GETL R1, t24
+ 28: ADDL $0x14, t24
+ 29: LDL (t24), t26
+ 30: PUTL t26, R29
+ 31: INCEIPL $4
+
+ 0xFF51B50: 83C10018 lwz r30,24(r1)
+ 32: GETL R1, t28
+ 33: ADDL $0x18, t28
+ 34: LDL (t28), t30
+ 35: PUTL t30, R30
+ 36: INCEIPL $4
+
+ 0xFF51B54: 7CC803A6 mtlr r6
+ 37: GETL R6, t32
+ 38: PUTL t32, LR
+ 39: INCEIPL $4
+
+ 0xFF51B58: 83E1001C lwz r31,28(r1)
+ 40: GETL R1, t34
+ 41: ADDL $0x1C, t34
+ 42: LDL (t34), t36
+ 43: PUTL t36, R31
+ 44: INCEIPL $4
+
+ 0xFF51B5C: 38210020 addi r1,r1,32
+ 45: GETL R1, t38
+ 46: ADDL $0x20, t38
+ 47: PUTL t38, R1
+ 48: INCEIPL $4
+
+ 0xFF51B60: 4E800020 blr
+ 49: GETL LR, t40
+ 50: JMPo-r t40 ($4)
+
+
+. 0 FF51B34 48
+. 80 9E 1C 34 90 64 00 00 80 BD 00 00 80 7E 1E 24 90 A3 00 00 80 C1 00 24 83 A1 00 14 83 C1 00 18 7C C8 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 1280 (0xFE9B6CC) approx BBs exec'd 0 ====
+
+ 0xFE9B6CC: 4BFFFE95 bl 0xFE9B560
+ 0: MOVL $0xFE9B6D0, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFE9B560 ($4)
+
+
+. 0 FE9B6CC 4
+. 4B FF FE 95
+
+==== BB 1281 __libc_global_ctors(0xFE9B560) approx BBs exec'd 0 ====
+
+ 0xFE9B560: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE9B564: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE9B568: 4812C8E9 bl 0xFFC7E50
+ 9: MOVL $0xFE9B56C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FE9B560 12
+. 94 21 FF F0 7C 08 02 A6 48 12 C8 E9
+
+==== BB 1282 (0xFE9B56C) approx BBs exec'd 0 ====
+
+ 0xFE9B56C: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE9B570: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE9B574: 93E1000C stw r31,12(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE9B578: 90010014 stw r0,20(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE9B57C: 813E0018 lwz r9,24(r30)
+ 18: GETL R30, t14
+ 19: ADDL $0x18, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R9
+ 22: INCEIPL $4
+
+ 0xFE9B580: 80090004 lwz r0,4(r9)
+ 23: GETL R9, t18
+ 24: ADDL $0x4, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R0
+ 27: INCEIPL $4
+
+ 0xFE9B584: 3BE90004 addi r31,r9,4
+ 28: GETL R9, t22
+ 29: ADDL $0x4, t22
+ 30: PUTL t22, R31
+ 31: INCEIPL $4
+
+ 0xFE9B588: 2F800000 cmpi cr7,r0,0
+ 32: GETL R0, t24
+ 33: CMP0L t24, t26 (-rSo)
+ 34: ICRFL t26, $0x7, CR
+ 35: INCEIPL $4
+
+ 0xFE9B58C: 419E0018 bc 12,30,0xFE9B5A4
+ 36: Js30o $0xFE9B5A4
+
+
+. 0 FE9B56C 36
+. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 81 3E 00 18 80 09 00 04 3B E9 00 04 2F 80 00 00 41 9E 00 18
+
+==== BB 1283 (0xFE9B590) approx BBs exec'd 0 ====
+
+ 0xFE9B590: 7C0903A6 mtctr r0
+ 0: GETL R0, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0xFE9B594: 4E800421 bctrl
+ 3: MOVL $0xFE9B598, t2
+ 4: PUTL t2, LR
+ 5: GETL CTR, t4
+ 6: JMPo-c t4 ($4)
+
+
+. 0 FE9B590 8
+. 7C 09 03 A6 4E 80 04 21
+
+==== BB 1284 _IO_check_libio(0xFEED850) approx BBs exec'd 0 ====
+
+ 0xFEED850: 7D8802A6 mflr r12
+ 0: GETL LR, t0
+ 1: PUTL t0, R12
+ 2: INCEIPL $4
+
+ 0xFEED854: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEED858: 480DA5F9 bl 0xFFC7E50
+ 9: MOVL $0xFEED85C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FEED850 12
+. 7D 88 02 A6 94 21 FF F0 48 0D A5 F9
+
+==== BB 1285 (0xFEED85C) approx BBs exec'd 0 ====
+
+ 0xFEED85C: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEED860: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEED864: 7D8803A6 mtlr r12
+ 8: GETL R12, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0xFEED868: 801E1DC8 lwz r0,7624(r30)
+ 11: GETL R30, t8
+ 12: ADDL $0x1DC8, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R0
+ 15: INCEIPL $4
+
+ 0xFEED86C: 811E1B00 lwz r8,6912(r30)
+ 16: GETL R30, t12
+ 17: ADDL $0x1B00, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R8
+ 20: INCEIPL $4
+
+ 0xFEED870: 2F800000 cmpi cr7,r0,0
+ 21: GETL R0, t16
+ 22: CMP0L t16, t18 (-rSo)
+ 23: ICRFL t18, $0x7, CR
+ 24: INCEIPL $4
+
+ 0xFEED874: 815E1BCC lwz r10,7116(r30)
+ 25: GETL R30, t20
+ 26: ADDL $0x1BCC, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R10
+ 29: INCEIPL $4
+
+ 0xFEED878: 80FE1AE8 lwz r7,6888(r30)
+ 30: GETL R30, t24
+ 31: ADDL $0x1AE8, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R7
+ 34: INCEIPL $4
+
+ 0xFEED87C: 3800FFB4 li r0,-76
+ 35: MOVL $0xFFFFFFB4, t28
+ 36: PUTL t28, R0
+ 37: INCEIPL $4
+
+ 0xFEED880: 419E0010 bc 12,30,0xFEED890
+ 38: Js30o $0xFEED890
+
+
+. 0 FEED85C 40
+. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 80 1E 1D C8 81 1E 1B 00 2F 80 00 00 81 5E 1B CC 80 FE 1A E8 38 00 FF B4 41 9E 00 10
+
+==== BB 1286 (0xFEED884) approx BBs exec'd 0 ====
+
+ 0xFEED884: 83C10008 lwz r30,8(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R30
+ 4: INCEIPL $4
+
+ 0xFEED888: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0xFEED88C: 4E800020 blr
+ 9: GETL LR, t6
+ 10: JMPo-r t6 ($4)
+
+
+. 0 FEED884 12
+. 83 C1 00 08 38 21 00 10 4E 80 00 20
+
+==== BB 1287 (0xFE9B598) approx BBs exec'd 0 ====
+
+ 0xFE9B598: 841F0004 lwzu r0,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R31
+ 3: LDL (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xFE9B59C: 2F800000 cmpi cr7,r0,0
+ 6: GETL R0, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x7, CR
+ 9: INCEIPL $4
+
+ 0xFE9B5A0: 409EFFF0 bc 4,30,0xFE9B590
+ 10: Jc30o $0xFE9B590
+
+
+. 0 FE9B598 12
+. 84 1F 00 04 2F 80 00 00 40 9E FF F0
+
+==== BB 1288 (0xFE9B5A4) approx BBs exec'd 0 ====
+
+ 0xFE9B5A4: 80610014 lwz r3,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE9B5A8: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFE9B5AC: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xFE9B5B0: 7C6803A6 mtlr r3
+ 15: GETL R3, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFE9B5B4: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xFE9B5B8: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+. 0 FE9B5A4 24
+. 80 61 00 14 83 C1 00 08 83 E1 00 0C 7C 68 03 A6 38 21 00 10 4E 80 00 20
+
+==== BB 1289 (0xFE9B6D0) approx BBs exec'd 0 ====
+
+ 0xFE9B6D0: 80C10024 lwz r6,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFE9B6D4: 83810010 lwz r28,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0xFE9B6D8: 83A10014 lwz r29,20(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0xFE9B6DC: 7CC803A6 mtlr r6
+ 15: GETL R6, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFE9B6E0: 83C10018 lwz r30,24(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x18, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R30
+ 22: INCEIPL $4
+
+ 0xFE9B6E4: 83E1001C lwz r31,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R31
+ 27: INCEIPL $4
+
+ 0xFE9B6E8: 38210020 addi r1,r1,32
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: PUTL t22, R1
+ 31: INCEIPL $4
+
+ 0xFE9B6EC: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+. 0 FE9B6D0 32
+. 80 C1 00 24 83 81 00 10 83 A1 00 14 7C C8 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 1290 (0x2547B908) approx BBs exec'd 0 ====
+
+ 0x2547B908: 4BFFFF88 b 0x2547B890
+ 0: JMPo $0x2547B890 ($4)
+
+
+. 0 2547B908 4
+. 4B FF FF 88
+
+==== BB 1291 (0x2547B890) approx BBs exec'd 0 ====
+
+ 0x2547B890: 817F0084 lwz r11,132(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x84, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547B894: 2C8B0000 cmpi cr1,r11,0
+ 5: GETL R11, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547B898: 41A6FF8C bc 13,6,0x2547B824
+ 9: Js06o $0x2547B824
+
+
+. 0 2547B890 12
+. 81 7F 00 84 2C 8B 00 00 41 A6 FF 8C
+
+==== BB 1292 (0x2547B90C) approx BBs exec'd 0 ====
+
+ 0x2547B90C: 7520C000 andis. r0,r9,0xC000
+ 0: GETL R9, t0
+ 1: ANDL $0xC0000000, t0
+ 2: PUTL t0, R0
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x2547B910: 40A2FEFC bc 5,2,0x2547B80C
+ 6: Jc02o $0x2547B80C
+
+
+. 0 2547B90C 8
+. 75 20 C0 00 40 A2 FE FC
+
+==== BB 1293 (0x2547B914) approx BBs exec'd 0 ====
+
+ 0x2547B914: 2F9C0000 cmpi cr7,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547B918: 3B9CFFFF addi r28,r28,-1
+ 4: GETL R28, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0x2547B91C: 4BFFFF10 b 0x2547B82C
+ 8: JMPo $0x2547B82C ($4)
+
+
+. 0 2547B914 12
+. 2F 9C 00 00 3B 9C FF FF 4B FF FF 10
+
+==== BB 1294 (0x2547B82C) approx BBs exec'd 0 ====
+
+ 0x2547B82C: 409EFFB0 bc 4,30,0x2547B7DC
+ 0: Jc30o $0x2547B7DC
+
+
+. 0 2547B82C 4
+. 40 9E FF B0
+
+==== BB 1295 (0x2547B830) approx BBs exec'd 0 ====
+
+ 0x2547B830: 82E10044 lwz r23,68(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x44, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x2547B834: 3B000000 li r24,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R24
+ 7: INCEIPL $4
+
+ 0x2547B838: 83C10038 lwz r30,56(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x38, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0x2547B83C: 7EE803A6 mtlr r23
+ 13: GETL R23, t10
+ 14: PUTL t10, LR
+ 15: INCEIPL $4
+
+ 0x2547B840: 83E1003C lwz r31,60(r1)
+ 16: GETL R1, t12
+ 17: ADDL $0x3C, t12
+ 18: LDL (t12), t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0x2547B844: 9316000C stw r24,12(r22)
+ 21: GETL R24, t16
+ 22: GETL R22, t18
+ 23: ADDL $0xC, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0x2547B848: 82810010 lwz r20,16(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x10, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R20
+ 30: INCEIPL $4
+
+ 0x2547B84C: 82A10014 lwz r21,20(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x14, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R21
+ 35: INCEIPL $4
+
+ 0x2547B850: 82C10018 lwz r22,24(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x18, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R22
+ 40: INCEIPL $4
+
+ 0x2547B854: 82E1001C lwz r23,28(r1)
+ 41: GETL R1, t32
+ 42: ADDL $0x1C, t32
+ 43: LDL (t32), t34
+ 44: PUTL t34, R23
+ 45: INCEIPL $4
+
+ 0x2547B858: 83010020 lwz r24,32(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x20, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R24
+ 50: INCEIPL $4
+
+ 0x2547B85C: 83210024 lwz r25,36(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x24, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R25
+ 55: INCEIPL $4
+
+ 0x2547B860: 83410028 lwz r26,40(r1)
+ 56: GETL R1, t44
+ 57: ADDL $0x28, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R26
+ 60: INCEIPL $4
+
+ 0x2547B864: 8361002C lwz r27,44(r1)
+ 61: GETL R1, t48
+ 62: ADDL $0x2C, t48
+ 63: LDL (t48), t50
+ 64: PUTL t50, R27
+ 65: INCEIPL $4
+
+ 0x2547B868: 83810030 lwz r28,48(r1)
+ 66: GETL R1, t52
+ 67: ADDL $0x30, t52
+ 68: LDL (t52), t54
+ 69: PUTL t54, R28
+ 70: INCEIPL $4
+
+ 0x2547B86C: 83A10034 lwz r29,52(r1)
+ 71: GETL R1, t56
+ 72: ADDL $0x34, t56
+ 73: LDL (t56), t58
+ 74: PUTL t58, R29
+ 75: INCEIPL $4
+
+ 0x2547B870: 38210040 addi r1,r1,64
+ 76: GETL R1, t60
+ 77: ADDL $0x40, t60
+ 78: PUTL t60, R1
+ 79: INCEIPL $4
+
+ 0x2547B874: 4800072C b 0x2547BFA0
+ 80: JMPo $0x2547BFA0 ($4)
+
+
+. 0 2547B830 72
+. 82 E1 00 44 3B 00 00 00 83 C1 00 38 7E E8 03 A6 83 E1 00 3C 93 16 00 0C 82 81 00 10 82 A1 00 14 82 C1 00 18 82 E1 00 1C 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 38 21 00 40 48 00 07 2C
+
+==== BB 1296 (0x2548051C) approx BBs exec'd 0 ====
+
+ 0x2548051C: 807D0000 lwz r3,0(r29)
+ 0: GETL R29, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0x25480520: 809B0000 lwz r4,0(r27)
+ 4: GETL R27, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R4
+ 7: INCEIPL $4
+
+ 0x25480524: 5465103A rlwinm r5,r3,2,0,29
+ 8: GETL R3, t8
+ 9: SHLL $0x2, t8
+ 10: PUTL t8, R5
+ 11: INCEIPL $4
+
+ 0x25480528: 7CC42A14 add r6,r4,r5
+ 12: GETL R4, t10
+ 13: GETL R5, t12
+ 14: ADDL t10, t12
+ 15: PUTL t12, R6
+ 16: INCEIPL $4
+
+ 0x2548052C: 38A60004 addi r5,r6,4
+ 17: GETL R6, t14
+ 18: ADDL $0x4, t14
+ 19: PUTL t14, R5
+ 20: INCEIPL $4
+
+ 0x25480530: 84060004 lwzu r0,4(r6)
+ 21: GETL R6, t16
+ 22: ADDL $0x4, t16
+ 23: PUTL t16, R6
+ 24: LDL (t16), t18
+ 25: PUTL t18, R0
+ 26: INCEIPL $4
+
+ 0x25480534: 2C000000 cmpi cr0,r0,0
+ 27: GETL R0, t20
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x0, CR
+ 30: INCEIPL $4
+
+ 0x25480538: 4082FFF8 bc 4,2,0x25480530
+ 31: Jc02o $0x25480530
+
+
+. 0 2548051C 32
+. 80 7D 00 00 80 9B 00 00 54 65 10 3A 7C C4 2A 14 38 A6 00 04 84 06 00 04 2C 00 00 00 40 82 FF F8
+
+==== BB 1297 (0x25480530) approx BBs exec'd 0 ====
+
+ 0x25480530: 84060004 lwzu r0,4(r6)
+ 0: GETL R6, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R6
+ 3: LDL (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0x25480534: 2C000000 cmpi cr0,r0,0
+ 6: GETL R0, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x25480538: 4082FFF8 bc 4,2,0x25480530
+ 10: Jc02o $0x25480530
+
+
+. 0 25480530 12
+. 84 06 00 04 2C 00 00 00 40 82 FF F8
+
+==== BB 1298 (0x2548053C) approx BBs exec'd 0 ====
+
+ 0x2548053C: 38C60004 addi r6,r6,4
+ 0: GETL R6, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x25480540: 80FF04AC lwz r7,1196(r31)
+ 4: GETL R31, t2
+ 5: ADDL $0x4AC, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R7
+ 8: INCEIPL $4
+
+ 0x25480544: 7FC903A6 mtctr r30
+ 9: GETL R30, t6
+ 10: PUTL t6, CTR
+ 11: INCEIPL $4
+
+ 0x25480548: 3BE00000 li r31,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R31
+ 14: INCEIPL $4
+
+ 0x2548054C: 93E10000 stw r31,0(r1)
+ 15: GETL R31, t10
+ 16: GETL R1, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x25480550: 7FE803A6 mtlr r31
+ 19: GETL R31, t14
+ 20: PUTL t14, LR
+ 21: INCEIPL $4
+
+ 0x25480554: 93E10004 stw r31,4(r1)
+ 22: GETL R31, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x4, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0x25480558: 93E10008 stw r31,8(r1)
+ 27: GETL R31, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x8, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0x2548055C: 93E1000C stw r31,12(r1)
+ 32: GETL R31, t24
+ 33: GETL R1, t26
+ 34: ADDL $0xC, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x25480560: 4E800420 bctr
+ 37: GETL CTR, t28
+ 38: JMPo t28 ($4)
+
+
+. 0 2548053C 40
+. 38 C6 00 04 80 FF 04 AC 7F C9 03 A6 3B E0 00 00 93 E1 00 00 7F E8 03 A6 93 E1 00 04 93 E1 00 08 93 E1 00 0C 4E 80 04 20
+
+==== BB 1299 _start(0x100002A0) approx BBs exec'd 0 ====
+
+ 0x100002A0: 7C290B78 or r9,r1,r1
+ 0: GETL R1, t0
+ 1: PUTL t0, R9
+ 2: INCEIPL $4
+
+ 0x100002A4: 54210036 rlwinm r1,r1,0,0,27
+ 3: GETL R1, t2
+ 4: ANDL $0xFFFFFFF0, t2
+ 5: PUTL t2, R1
+ 6: INCEIPL $4
+
+ 0x100002A8: 38000000 li r0,0
+ 7: MOVL $0x0, t4
+ 8: PUTL t4, R0
+ 9: INCEIPL $4
+
+ 0x100002AC: 9421FFF0 stwu r1,-16(r1)
+ 10: GETL R1, t6
+ 11: GETL R1, t8
+ 12: ADDL $0xFFFFFFF0, t8
+ 13: PUTL t8, R1
+ 14: STL t6, (t8)
+ 15: INCEIPL $4
+
+ 0x100002B0: 7C0803A6 mtlr r0
+ 16: GETL R0, t10
+ 17: PUTL t10, LR
+ 18: INCEIPL $4
+
+ 0x100002B4: 90010000 stw r0,0(r1)
+ 19: GETL R0, t12
+ 20: GETL R1, t14
+ 21: STL t12, (t14)
+ 22: INCEIPL $4
+
+ 0x100002B8: 3D001000 lis r8,4096
+ 23: MOVL $0x10000000, t16
+ 24: PUTL t16, R8
+ 25: INCEIPL $4
+
+ 0x100002BC: 85A8077C lwzu r13,1916(r8)
+ 26: MOVL $0x1000077C, t18
+ 27: PUTL t18, R8
+ 28: LDL (t18), t20
+ 29: PUTL t20, R13
+ 30: INCEIPL $4
+
+ 0x100002C0: 48010624 b 0x100108E4
+ 31: JMPo $0x100108E4 ($4)
+
+
+. 0 100002A0 36
+. 7C 29 0B 78 54 21 00 36 38 00 00 00 94 21 FF F0 7C 08 03 A6 90 01 00 00 3D 00 10 00 85 A8 07 7C 48 01 06 24
+
+==== BB 1300 (0x100108E4) approx BBs exec'd 0 ====
+
+ 0x100108E4: 39600000 li r11,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0x100108E8: 4BFFFFD4 b 0x100108BC
+ 3: JMPo $0x100108BC ($4)
+
+
+. 0 100108E4 8
+. 39 60 00 00 4B FF FF D4
+
+==== BB 1301 (0x100108BC) approx BBs exec'd 0 ====
+
+ 0x100108BC: 556C083C rlwinm r12,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0x100108C0: 7D6C5A14 add r11,r12,r11
+ 4: GETL R12, t2
+ 5: GETL R11, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0x100108C4: 3980AF5C li r12,-20644
+ 9: MOVL $0xFFFFAF5C, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0x100108C8: 3D8C2548 addis r12,r12,9544
+ 12: MOVL $0x2547AF5C, t8
+ 13: PUTL t8, R12
+ 14: INCEIPL $4
+
+ 0x100108CC: 7D8903A6 mtctr r12
+ 15: GETL R12, t10
+ 16: PUTL t10, CTR
+ 17: INCEIPL $4
+
+ 0x100108D0: 39807A88 li r12,31368
+ 18: MOVL $0x7A88, t12
+ 19: PUTL t12, R12
+ 20: INCEIPL $4
+
+ 0x100108D4: 3D8C2549 addis r12,r12,9545
+ 21: MOVL $0x25497A88, t14
+ 22: PUTL t14, R12
+ 23: INCEIPL $4
+
+ 0x100108D8: 4E800420 bctr
+ 24: GETL CTR, t16
+ 25: JMPo t16 ($4)
+
+
+. 0 100108BC 32
+. 55 6C 08 3C 7D 6C 5A 14 39 80 AF 5C 3D 8C 25 48 7D 89 03 A6 39 80 7A 88 3D 8C 25 49 4E 80 04 20
+
+==== BB 1302 _dl_runtime_resolve(0x2547AF5C) approx BBs exec'd 0 ====
+
+ 0x2547AF5C: 9421FFC0 stwu r1,-64(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFC0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547AF60: 9001000C stw r0,12(r1)
+ 6: GETL R0, t4
+ 7: GETL R1, t6
+ 8: ADDL $0xC, t6
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x2547AF64: 90610010 stw r3,16(r1)
+ 11: GETL R3, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x10, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x2547AF68: 90810014 stw r4,20(r1)
+ 16: GETL R4, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x14, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x2547AF6C: 7D836378 or r3,r12,r12
+ 21: GETL R12, t16
+ 22: PUTL t16, R3
+ 23: INCEIPL $4
+
+ 0x2547AF70: 90A10018 stw r5,24(r1)
+ 24: GETL R5, t18
+ 25: GETL R1, t20
+ 26: ADDL $0x18, t20
+ 27: STL t18, (t20)
+ 28: INCEIPL $4
+
+ 0x2547AF74: 7D645B78 or r4,r11,r11
+ 29: GETL R11, t22
+ 30: PUTL t22, R4
+ 31: INCEIPL $4
+
+ 0x2547AF78: 90C1001C stw r6,28(r1)
+ 32: GETL R6, t24
+ 33: GETL R1, t26
+ 34: ADDL $0x1C, t26
+ 35: STL t24, (t26)
+ 36: INCEIPL $4
+
+ 0x2547AF7C: 7C0802A6 mflr r0
+ 37: GETL LR, t28
+ 38: PUTL t28, R0
+ 39: INCEIPL $4
+
+ 0x2547AF80: 90E10020 stw r7,32(r1)
+ 40: GETL R7, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x20, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x2547AF84: 90010030 stw r0,48(r1)
+ 45: GETL R0, t34
+ 46: GETL R1, t36
+ 47: ADDL $0x30, t36
+ 48: STL t34, (t36)
+ 49: INCEIPL $4
+
+ 0x2547AF88: 91010024 stw r8,36(r1)
+ 50: GETL R8, t38
+ 51: GETL R1, t40
+ 52: ADDL $0x24, t40
+ 53: STL t38, (t40)
+ 54: INCEIPL $4
+
+ 0x2547AF8C: 7C000026 mfcr r0
+ 55: GETL CR, t42
+ 56: PUTL t42, R0
+ 57: INCEIPL $4
+
+ 0x2547AF90: 91210028 stw r9,40(r1)
+ 58: GETL R9, t44
+ 59: GETL R1, t46
+ 60: ADDL $0x28, t46
+ 61: STL t44, (t46)
+ 62: INCEIPL $4
+
+ 0x2547AF94: 9141002C stw r10,44(r1)
+ 63: GETL R10, t48
+ 64: GETL R1, t50
+ 65: ADDL $0x2C, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x2547AF98: 90010008 stw r0,8(r1)
+ 68: GETL R0, t52
+ 69: GETL R1, t54
+ 70: ADDL $0x8, t54
+ 71: STL t52, (t54)
+ 72: INCEIPL $4
+
+ 0x2547AF9C: 480000C9 bl 0x2547B064
+ 73: MOVL $0x2547AFA0, t56
+ 74: PUTL t56, LR
+ 75: JMPo-c $0x2547B064 ($4)
+
+
+. 0 2547AF5C 68
+. 94 21 FF C0 90 01 00 0C 90 61 00 10 90 81 00 14 7D 83 63 78 90 A1 00 18 7D 64 5B 78 90 C1 00 1C 7C 08 02 A6 90 E1 00 20 90 01 00 30 91 01 00 24 7C 00 00 26 91 21 00 28 91 41 00 2C 90 01 00 08 48 00 00 C9
+
+==== BB 1303 fixup(0x2547B064) approx BBs exec'd 0 ====
+
+ 0x2547B064: 7CE802A6 mflr r7
+ 0: GETL LR, t0
+ 1: PUTL t0, R7
+ 2: INCEIPL $4
+
+ 0x2547B068: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x2547B06C: 93810010 stw r28,16(r1)
+ 9: GETL R28, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547B070: 4801BF91 bl 0x25497000
+ 14: MOVL $0x2547B074, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547B064 16
+. 7C E8 02 A6 94 21 FF E0 93 81 00 10 48 01 BF 91
+
+==== BB 1304 (0x2547B074) approx BBs exec'd 0 ====
+
+ 0x2547B074: 93A10014 stw r29,20(r1)
+ 0: GETL R29, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x14, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547B078: 90E10024 stw r7,36(r1)
+ 5: GETL R7, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x24, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0x2547B07C: 80C3007C lwz r6,124(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x7C, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R6
+ 14: INCEIPL $4
+
+ 0x2547B080: 93C10018 stw r30,24(r1)
+ 15: GETL R30, t12
+ 16: GETL R1, t14
+ 17: ADDL $0x18, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0x2547B084: 7FC802A6 mflr r30
+ 20: GETL LR, t16
+ 21: PUTL t16, R30
+ 22: INCEIPL $4
+
+ 0x2547B088: 93E1001C stw r31,28(r1)
+ 23: GETL R31, t18
+ 24: GETL R1, t20
+ 25: ADDL $0x1C, t20
+ 26: STL t18, (t20)
+ 27: INCEIPL $4
+
+ 0x2547B08C: 7C7F1B78 or r31,r3,r3
+ 28: GETL R3, t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0x2547B090: 81460004 lwz r10,4(r6)
+ 31: GETL R6, t24
+ 32: ADDL $0x4, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R10
+ 35: INCEIPL $4
+
+ 0x2547B094: 80A30038 lwz r5,56(r3)
+ 36: GETL R3, t28
+ 37: ADDL $0x38, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R5
+ 40: INCEIPL $4
+
+ 0x2547B098: 7FAA2214 add r29,r10,r4
+ 41: GETL R10, t32
+ 42: GETL R4, t34
+ 43: ADDL t32, t34
+ 44: PUTL t34, R29
+ 45: INCEIPL $4
+
+ 0x2547B09C: 7D6A202E lwzx r11,r10,r4
+ 46: GETL R4, t36
+ 47: GETL R10, t38
+ 48: ADDL t38, t36
+ 49: LDL (t36), t40
+ 50: PUTL t40, R11
+ 51: INCEIPL $4
+
+ 0x2547B0A0: 807D0004 lwz r3,4(r29)
+ 52: GETL R29, t42
+ 53: ADDL $0x4, t42
+ 54: LDL (t42), t44
+ 55: PUTL t44, R3
+ 56: INCEIPL $4
+
+ 0x2547B0A4: 81850004 lwz r12,4(r5)
+ 57: GETL R5, t46
+ 58: ADDL $0x4, t46
+ 59: LDL (t46), t48
+ 60: PUTL t48, R12
+ 61: INCEIPL $4
+
+ 0x2547B0A8: 5466C23E rlwinm r6,r3,24,8,31
+ 62: GETL R3, t50
+ 63: SHRL $0x8, t50
+ 64: PUTL t50, R6
+ 65: INCEIPL $4
+
+ 0x2547B0AC: 807F0000 lwz r3,0(r31)
+ 66: GETL R31, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R3
+ 69: INCEIPL $4
+
+ 0x2547B0B0: 54C52036 rlwinm r5,r6,4,0,27
+ 70: GETL R6, t56
+ 71: SHLL $0x4, t56
+ 72: PUTL t56, R5
+ 73: INCEIPL $4
+
+ 0x2547B0B4: 7D056214 add r8,r5,r12
+ 74: GETL R5, t58
+ 75: GETL R12, t60
+ 76: ADDL t58, t60
+ 77: PUTL t60, R8
+ 78: INCEIPL $4
+
+ 0x2547B0B8: 7F835A14 add r28,r3,r11
+ 79: GETL R3, t62
+ 80: GETL R11, t64
+ 81: ADDL t62, t64
+ 82: PUTL t64, R28
+ 83: INCEIPL $4
+
+ 0x2547B0BC: 8808000D lbz r0,13(r8)
+ 84: GETL R8, t66
+ 85: ADDL $0xD, t66
+ 86: LDB (t66), t68
+ 87: PUTL t68, R0
+ 88: INCEIPL $4
+
+ 0x2547B0C0: 70090003 andi. r9,r0,0x3
+ 89: GETL R0, t70
+ 90: ANDL $0x3, t70
+ 91: PUTL t70, R9
+ 92: CMP0L t70, t72 (-rSo)
+ 93: ICRFL t72, $0x0, CR
+ 94: INCEIPL $4
+
+ 0x2547B0C4: 813F0034 lwz r9,52(r31)
+ 95: GETL R31, t74
+ 96: ADDL $0x34, t74
+ 97: LDL (t74), t76
+ 98: PUTL t76, R9
+ 99: INCEIPL $4
+
+ 0x2547B0C8: 80890004 lwz r4,4(r9)
+ 100: GETL R9, t78
+ 101: ADDL $0x4, t78
+ 102: LDL (t78), t80
+ 103: PUTL t80, R4
+ 104: INCEIPL $4
+
+ 0x2547B0CC: 91010008 stw r8,8(r1)
+ 105: GETL R8, t82
+ 106: GETL R1, t84
+ 107: ADDL $0x8, t84
+ 108: STL t82, (t84)
+ 109: INCEIPL $4
+
+ 0x2547B0D0: 408200E0 bc 4,2,0x2547B1B0
+ 110: Jc02o $0x2547B1B0
+
+
+. 0 2547B074 96
+. 93 A1 00 14 90 E1 00 24 80 C3 00 7C 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 7C 7F 1B 78 81 46 00 04 80 A3 00 38 7F AA 22 14 7D 6A 20 2E 80 7D 00 04 81 85 00 04 54 66 C2 3E 80 7F 00 00 54 C5 20 36 7D 05 62 14 7F 83 5A 14 88 08 00 0D 70 09 00 03 81 3F 00 34 80 89 00 04 91 01 00 08 40 82 00 E0
+
+==== BB 1305 (0x2547B0D4) approx BBs exec'd 0 ====
+
+ 0x2547B0D4: 815F00E4 lwz r10,228(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0xE4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x2547B0D8: 38E00000 li r7,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R7
+ 7: INCEIPL $4
+
+ 0x2547B0DC: 2F8A0000 cmpi cr7,r10,0
+ 8: GETL R10, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x2547B0E0: 409E009C bc 4,30,0x2547B17C
+ 12: Jc30o $0x2547B17C
+
+
+. 0 2547B0D4 16
+. 81 5F 00 E4 38 E0 00 00 2F 8A 00 00 40 9E 00 9C
+
+==== BB 1306 (0x2547B17C) approx BBs exec'd 0 ====
+
+ 0x2547B17C: 816A0004 lwz r11,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547B180: 54C9083C rlwinm r9,r6,1,0,30
+ 5: GETL R6, t4
+ 6: SHLL $0x1, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0x2547B184: 80DF0188 lwz r6,392(r31)
+ 9: GETL R31, t6
+ 10: ADDL $0x188, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R6
+ 13: INCEIPL $4
+
+ 0x2547B188: 7D095A2E lhzx r8,r9,r11
+ 14: GETL R11, t10
+ 15: GETL R9, t12
+ 16: ADDL t12, t10
+ 17: LDW (t10), t14
+ 18: PUTL t14, R8
+ 19: INCEIPL $4
+
+ 0x2547B18C: 55072376 rlwinm r7,r8,4,13,27
+ 20: GETL R8, t16
+ 21: ROLL $0x4, t16
+ 22: ANDL $0x7FFF0, t16
+ 23: PUTL t16, R7
+ 24: INCEIPL $4
+
+ 0x2547B190: 7D663A14 add r11,r6,r7
+ 25: GETL R6, t18
+ 26: GETL R7, t20
+ 27: ADDL t18, t20
+ 28: PUTL t20, R11
+ 29: INCEIPL $4
+
+ 0x2547B194: 806B0004 lwz r3,4(r11)
+ 30: GETL R11, t22
+ 31: ADDL $0x4, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R3
+ 34: INCEIPL $4
+
+ 0x2547B198: 7C6AFE70 srawi r10,r3,31
+ 35: GETL R3, t26
+ 36: SARL $0x1F, t26 (-wCa)
+ 37: PUTL t26, R10
+ 38: INCEIPL $4
+
+ 0x2547B19C: 7D401A78 xor r0,r10,r3
+ 39: GETL R10, t28
+ 40: GETL R3, t30
+ 41: XORL t28, t30
+ 42: PUTL t30, R0
+ 43: INCEIPL $4
+
+ 0x2547B1A0: 7D205050 subf r9,r0,r10
+ 44: GETL R0, t32
+ 45: GETL R10, t34
+ 46: SUBL t32, t34
+ 47: PUTL t34, R9
+ 48: INCEIPL $4
+
+ 0x2547B1A4: 7D28FE70 srawi r8,r9,31
+ 49: GETL R9, t36
+ 50: SARL $0x1F, t36 (-wCa)
+ 51: PUTL t36, R8
+ 52: INCEIPL $4
+
+ 0x2547B1A8: 7D674038 and r7,r11,r8
+ 53: GETL R11, t38
+ 54: GETL R8, t40
+ 55: ANDL t38, t40
+ 56: PUTL t40, R7
+ 57: INCEIPL $4
+
+ 0x2547B1AC: 4BFFFF38 b 0x2547B0E4
+ 58: JMPo $0x2547B0E4 ($4)
+
+
+. 0 2547B17C 52
+. 81 6A 00 04 54 C9 08 3C 80 DF 01 88 7D 09 5A 2E 55 07 23 76 7D 66 3A 14 80 6B 00 04 7C 6A FE 70 7D 40 1A 78 7D 20 50 50 7D 28 FE 70 7D 67 40 38 4B FF FF 38
+
+==== BB 1307 (0x2547B0E4) approx BBs exec'd 0 ====
+
+ 0x2547B0E4: 7C05602E lwzx r0,r5,r12
+ 0: GETL R12, t0
+ 1: GETL R5, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R0
+ 5: INCEIPL $4
+
+ 0x2547B0E8: 39400000 li r10,0
+ 6: MOVL $0x0, t6
+ 7: PUTL t6, R10
+ 8: INCEIPL $4
+
+ 0x2547B0EC: 80DF01C0 lwz r6,448(r31)
+ 9: GETL R31, t8
+ 10: ADDL $0x1C0, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R6
+ 13: INCEIPL $4
+
+ 0x2547B0F0: 38A10008 addi r5,r1,8
+ 14: GETL R1, t12
+ 15: ADDL $0x8, t12
+ 16: PUTL t12, R5
+ 17: INCEIPL $4
+
+ 0x2547B0F4: 7C602214 add r3,r0,r4
+ 18: GETL R0, t14
+ 19: GETL R4, t16
+ 20: ADDL t14, t16
+ 21: PUTL t16, R3
+ 22: INCEIPL $4
+
+ 0x2547B0F8: 39000001 li r8,1
+ 23: MOVL $0x1, t18
+ 24: PUTL t18, R8
+ 25: INCEIPL $4
+
+ 0x2547B0FC: 7FE4FB78 or r4,r31,r31
+ 26: GETL R31, t20
+ 27: PUTL t20, R4
+ 28: INCEIPL $4
+
+ 0x2547B100: 39200001 li r9,1
+ 29: MOVL $0x1, t22
+ 30: PUTL t22, R9
+ 31: INCEIPL $4
+
+ 0x2547B104: 4BFFD4A1 bl 0x254785A4
+ 32: MOVL $0x2547B108, t24
+ 33: PUTL t24, LR
+ 34: JMPo-c $0x254785A4 ($4)
+
+
+. 0 2547B0E4 36
+. 7C 05 60 2E 39 40 00 00 80 DF 01 C0 38 A1 00 08 7C 60 22 14 39 00 00 01 7F E4 FB 78 39 20 00 01 4B FF D4 A1
+
+==== BB 1308 (0x2547B108) approx BBs exec'd 0 ====
+
+ 0x2547B108: 39400000 li r10,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0x2547B10C: 81610008 lwz r11,8(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x2547B110: 2C8B0000 cmpi cr1,r11,0
+ 8: GETL R11, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x1, CR
+ 11: INCEIPL $4
+
+ 0x2547B114: 41860018 bc 12,6,0x2547B12C
+ 12: Js06o $0x2547B12C
+
+
+. 0 2547B108 16
+. 39 40 00 00 81 61 00 08 2C 8B 00 00 41 86 00 18
+
+==== BB 1309 (0x2547B118) approx BBs exec'd 0 ====
+
+ 0x2547B118: 2F030000 cmpi cr6,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547B11C: 419A00A0 bc 12,26,0x2547B1BC
+ 4: Js26o $0x2547B1BC
+
+
+. 0 2547B118 8
+. 2F 03 00 00 41 9A 00 A0
+
+==== BB 1310 (0x2547B120) approx BBs exec'd 0 ====
+
+ 0x2547B120: 81830000 lwz r12,0(r3)
+ 0: GETL R3, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R12
+ 3: INCEIPL $4
+
+ 0x2547B124: 808B0004 lwz r4,4(r11)
+ 4: GETL R11, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R4
+ 8: INCEIPL $4
+
+ 0x2547B128: 7D4C2214 add r10,r12,r4
+ 9: GETL R12, t8
+ 10: GETL R4, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R10
+ 13: INCEIPL $4
+
+ 0x2547B12C: 80FE04F4 lwz r7,1268(r30)
+ 14: GETL R30, t12
+ 15: ADDL $0x4F4, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R7
+ 18: INCEIPL $4
+
+ 0x2547B130: 80DD0008 lwz r6,8(r29)
+ 19: GETL R29, t16
+ 20: ADDL $0x8, t16
+ 21: LDL (t16), t18
+ 22: PUTL t18, R6
+ 23: INCEIPL $4
+
+ 0x2547B134: 8067002C lwz r3,44(r7)
+ 24: GETL R7, t20
+ 25: ADDL $0x2C, t20
+ 26: LDL (t20), t22
+ 27: PUTL t22, R3
+ 28: INCEIPL $4
+
+ 0x2547B138: 7D665214 add r11,r6,r10
+ 29: GETL R6, t24
+ 30: GETL R10, t26
+ 31: ADDL t24, t26
+ 32: PUTL t26, R11
+ 33: INCEIPL $4
+
+ 0x2547B13C: 2C030000 cmpi cr0,r3,0
+ 34: GETL R3, t28
+ 35: CMP0L t28, t30 (-rSo)
+ 36: ICRFL t30, $0x0, CR
+ 37: INCEIPL $4
+
+ 0x2547B140: 7D635B78 or r3,r11,r11
+ 38: GETL R11, t32
+ 39: PUTL t32, R3
+ 40: INCEIPL $4
+
+ 0x2547B144: 40820018 bc 4,2,0x2547B15C
+ 41: Jc02o $0x2547B15C
+
+
+. 0 2547B120 40
+. 81 83 00 00 80 8B 00 04 7D 4C 22 14 80 FE 04 F4 80 DD 00 08 80 67 00 2C 7D 66 52 14 2C 03 00 00 7D 63 5B 78 40 82 00 18
+
+==== BB 1311 (0x2547B148) approx BBs exec'd 0 ====
+
+ 0x2547B148: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x2547B14C: 7FA4EB78 or r4,r29,r29
+ 3: GETL R29, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0x2547B150: 7F85E378 or r5,r28,r28
+ 6: GETL R28, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547B154: 7D665B78 or r6,r11,r11
+ 9: GETL R11, t6
+ 10: PUTL t6, R6
+ 11: INCEIPL $4
+
+ 0x2547B158: 4800540D bl 0x25480564
+ 12: MOVL $0x2547B15C, t8
+ 13: PUTL t8, LR
+ 14: JMPo-c $0x25480564 ($4)
+
+
+. 0 2547B148 20
+. 7F E3 FB 78 7F A4 EB 78 7F 85 E3 78 7D 66 5B 78 48 00 54 0D
+
+==== BB 1312 __elf_machine_fixup_plt(0x25480564) approx BBs exec'd 0 ====
+
+ 0x25480564: 7D453050 subf r10,r5,r6
+ 0: GETL R5, t0
+ 1: GETL R6, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0x25480568: 3D06FE00 addis r8,r6,-512
+ 5: GETL R6, t4
+ 6: ADDL $0xFE000000, t4
+ 7: PUTL t4, R8
+ 8: INCEIPL $4
+
+ 0x2548056C: 554C3032 rlwinm r12,r10,6,0,25
+ 9: GETL R10, t6
+ 10: SHLL $0x6, t6
+ 11: PUTL t6, R12
+ 12: INCEIPL $4
+
+ 0x25480570: 3CE0FC00 lis r7,-1024
+ 13: MOVL $0xFC000000, t8
+ 14: PUTL t8, R7
+ 15: INCEIPL $4
+
+ 0x25480574: 7D843670 srawi r4,r12,6
+ 16: GETL R12, t10
+ 17: SARL $0x6, t10 (-wCa)
+ 18: PUTL t10, R4
+ 19: INCEIPL $4
+
+ 0x25480578: 39280003 addi r9,r8,3
+ 20: GETL R8, t12
+ 21: ADDL $0x3, t12
+ 22: PUTL t12, R9
+ 23: INCEIPL $4
+
+ 0x2548057C: 7F845000 cmp cr7,r4,r10
+ 24: GETL R4, t14
+ 25: GETL R10, t16
+ 26: CMPL t14, t16, t18 (-rSo)
+ 27: ICRFL t18, $0x7, CR
+ 28: INCEIPL $4
+
+ 0x25480580: 60E00002 ori r0,r7,0x2
+ 29: MOVL $0xFC000002, t20
+ 30: PUTL t20, R0
+ 31: INCEIPL $4
+
+ 0x25480584: 548B01BA rlwinm r11,r4,0,6,29
+ 32: GETL R4, t22
+ 33: ANDL $0x3FFFFFC, t22
+ 34: PUTL t22, R11
+ 35: INCEIPL $4
+
+ 0x25480588: 9421FFF0 stwu r1,-16(r1)
+ 36: GETL R1, t24
+ 37: GETL R1, t26
+ 38: ADDL $0xFFFFFFF0, t26
+ 39: PUTL t26, R1
+ 40: STL t24, (t26)
+ 41: INCEIPL $4
+
+ 0x2548058C: 7F090040 cmpl cr6,r9,r0
+ 42: GETL R9, t28
+ 43: GETL R0, t30
+ 44: CMPUL t28, t30, t32 (-rSo)
+ 45: ICRFL t32, $0x6, CR
+ 46: INCEIPL $4
+
+ 0x25480590: 656B4800 oris r11,r11,0x4800
+ 47: GETL R11, t34
+ 48: ORL $0x48000000, t34
+ 49: PUTL t34, R11
+ 50: INCEIPL $4
+
+ 0x25480594: 419E00EC bc 12,30,0x25480680
+ 51: Js30o $0x25480680
+
+
+. 0 25480564 52
+. 7D 45 30 50 3D 06 FE 00 55 4C 30 32 3C E0 FC 00 7D 84 36 70 39 28 00 03 7F 84 50 00 60 E0 00 02 54 8B 01 BA 94 21 FF F0 7F 09 00 40 65 6B 48 00 41 9E 00 EC
+
+==== BB 1313 (0x25480680) approx BBs exec'd 0 ====
+
+ 0x25480680: 91650000 stw r11,0(r5)
+ 0: GETL R11, t0
+ 1: GETL R5, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0x25480684: 7C00286C dcbst r0,r5
+ 4: INCEIPL $4
+
+ 0x25480688: 7C0004AC sync
+ 5: INCEIPL $4
+
+ 0x2548068C: 7C002FAC icbi r0,r5
+ 6: GETL R5, t4
+ 7: CALLM_So
+ 8: PUSHL t4
+ 9: CALLMo $0x68
+ 10: CALLM_Eo
+ 11: INCEIPL $4
+
+ 0x25480690: 7C0004AC sync
+ 12: INCEIPL $4
+
+ 0x25480694: 4C00012C 13: INCEIPL $4
+
+ 0x25480698: 7CC33378 or r3,r6,r6
+ 14: GETL R6, t6
+ 15: PUTL t6, R3
+ 16: INCEIPL $4
+
+ 0x2548069C: 38210010 addi r1,r1,16
+ 17: GETL R1, t8
+ 18: ADDL $0x10, t8
+ 19: PUTL t8, R1
+ 20: INCEIPL $4
+
+ 0x254806A0: 4E800020 blr
+ 21: GETL LR, t10
+ 22: JMPo-r t10 ($4)
+
+
+. 0 25480680 36
+. 91 65 00 00 7C 00 28 6C 7C 00 04 AC 7C 00 2F AC 7C 00 04 AC 4C 00 01 2C 7C C3 33 78 38 21 00 10 4E 80 00 20
+
+==== BB 1314 (0x2547B15C) approx BBs exec'd 0 ====
+
+ 0x2547B15C: 83810024 lwz r28,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x2547B160: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547B164: 7F8803A6 mtlr r28
+ 10: GETL R28, t8
+ 11: PUTL t8, LR
+ 12: INCEIPL $4
+
+ 0x2547B168: 83C10018 lwz r30,24(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0x2547B16C: 83810010 lwz r28,16(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R28
+ 22: INCEIPL $4
+
+ 0x2547B170: 83E1001C lwz r31,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R31
+ 27: INCEIPL $4
+
+ 0x2547B174: 38210020 addi r1,r1,32
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: PUTL t22, R1
+ 31: INCEIPL $4
+
+ 0x2547B178: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+. 0 2547B15C 32
+. 83 81 00 24 83 A1 00 14 7F 88 03 A6 83 C1 00 18 83 81 00 10 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 1315 (0x2547AFA0) approx BBs exec'd 0 ====
+
+ 0x2547AFA0: 7C6903A6 mtctr r3
+ 0: GETL R3, t0
+ 1: PUTL t0, CTR
+ 2: INCEIPL $4
+
+ 0x2547AFA4: 80010030 lwz r0,48(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x30, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x2547AFA8: 8141002C lwz r10,44(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x2C, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R10
+ 12: INCEIPL $4
+
+ 0x2547AFAC: 81210028 lwz r9,40(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x28, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R9
+ 17: INCEIPL $4
+
+ 0x2547AFB0: 7C0803A6 mtlr r0
+ 18: GETL R0, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0x2547AFB4: 81010024 lwz r8,36(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x24, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R8
+ 25: INCEIPL $4
+
+ 0x2547AFB8: 80010008 lwz r0,8(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x8, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R0
+ 30: INCEIPL $4
+
+ 0x2547AFBC: 80E10020 lwz r7,32(r1)
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: LDL (t24), t26
+ 34: PUTL t26, R7
+ 35: INCEIPL $4
+
+ 0x2547AFC0: 80C1001C lwz r6,28(r1)
+ 36: GETL R1, t28
+ 37: ADDL $0x1C, t28
+ 38: LDL (t28), t30
+ 39: PUTL t30, R6
+ 40: INCEIPL $4
+
+ 0x2547AFC4: 7C0FF120 mtcr r0
+ 41: GETL R0, t32
+ 42: PUTL t32, CR
+ 43: INCEIPL $4
+
+ 0x2547AFC8: 80A10018 lwz r5,24(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x18, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R5
+ 48: INCEIPL $4
+
+ 0x2547AFCC: 80810014 lwz r4,20(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x14, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R4
+ 53: INCEIPL $4
+
+ 0x2547AFD0: 80610010 lwz r3,16(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x10, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R3
+ 58: INCEIPL $4
+
+ 0x2547AFD4: 8001000C lwz r0,12(r1)
+ 59: GETL R1, t46
+ 60: ADDL $0xC, t46
+ 61: LDL (t46), t48
+ 62: PUTL t48, R0
+ 63: INCEIPL $4
+
+ 0x2547AFD8: 38210040 addi r1,r1,64
+ 64: GETL R1, t50
+ 65: ADDL $0x40, t50
+ 66: PUTL t50, R1
+ 67: INCEIPL $4
+
+ 0x2547AFDC: 4E800420 bctr
+ 68: GETL CTR, t52
+ 69: JMPo t52 ($4)
+
+
+. 0 2547AFA0 64
+. 7C 69 03 A6 80 01 00 30 81 41 00 2C 81 21 00 28 7C 08 03 A6 81 01 00 24 80 01 00 08 80 E1 00 20 80 C1 00 1C 7C 0F F1 20 80 A1 00 18 80 81 00 14 80 61 00 10 80 01 00 0C 38 21 00 40 4E 80 04 20
+
+==== BB 1316 __libc_start_main(0xFE9B8C4) approx BBs exec'd 0 ====
+
+ 0xFE9B8C4: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFE9B8C8: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFE9B8CC: 4812C585 bl 0xFFC7E50
+ 9: MOVL $0xFE9B8D0, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FE9B8C4 12
+. 7C 08 02 A6 94 21 FF F0 48 12 C5 85
+
+==== BB 1317 (0xFE9B8D0) approx BBs exec'd 0 ====
+
+ 0xFE9B8D0: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE9B8D4: 7D2A4B78 or r10,r9,r9
+ 5: GETL R9, t4
+ 6: PUTL t4, R10
+ 7: INCEIPL $4
+
+ 0xFE9B8D8: 7FC802A6 mflr r30
+ 8: GETL LR, t6
+ 9: PUTL t6, R30
+ 10: INCEIPL $4
+
+ 0xFE9B8DC: 90010014 stw r0,20(r1)
+ 11: GETL R0, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x14, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFE9B8E0: 7C6C1B78 or r12,r3,r3
+ 16: GETL R3, t12
+ 17: PUTL t12, R12
+ 18: INCEIPL $4
+
+ 0xFE9B8E4: 80090000 lwz r0,0(r9)
+ 19: GETL R9, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R0
+ 22: INCEIPL $4
+
+ 0xFE9B8E8: 7C852378 or r5,r4,r4
+ 23: GETL R4, t18
+ 24: PUTL t18, R5
+ 25: INCEIPL $4
+
+ 0xFE9B8EC: 7CE93B78 or r9,r7,r7
+ 26: GETL R7, t20
+ 27: PUTL t20, R9
+ 28: INCEIPL $4
+
+ 0xFE9B8F0: 7D074378 or r7,r8,r8
+ 29: GETL R8, t22
+ 30: PUTL t22, R7
+ 31: INCEIPL $4
+
+ 0xFE9B8F4: 2F800000 cmpi cr7,r0,0
+ 32: GETL R0, t24
+ 33: CMP0L t24, t26 (-rSo)
+ 34: ICRFL t26, $0x7, CR
+ 35: INCEIPL $4
+
+ 0xFE9B8F8: 419E0034 bc 12,30,0xFE9B92C
+ 36: Js30o $0xFE9B92C
+
+
+. 0 FE9B8D0 44
+. 93 C1 00 08 7D 2A 4B 78 7F C8 02 A6 90 01 00 14 7C 6C 1B 78 80 09 00 00 7C 85 23 78 7C E9 3B 78 7D 07 43 78 2F 80 00 00 41 9E 00 34
+
+==== BB 1318 (0xFE9B92C) approx BBs exec'd 0 ====
+
+ 0xFE9B92C: 80060000 lwz r0,0(r6)
+ 0: GETL R6, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFE9B930: 7CCB3378 or r11,r6,r6
+ 4: GETL R6, t4
+ 5: PUTL t4, R11
+ 6: INCEIPL $4
+
+ 0xFE9B934: 2C800000 cmpi cr1,r0,0
+ 7: GETL R0, t6
+ 8: CMP0L t6, t8 (-rSo)
+ 9: ICRFL t8, $0x1, CR
+ 10: INCEIPL $4
+
+ 0xFE9B938: 4186003C bc 12,6,0xFE9B974
+ 11: Js06o $0xFE9B974
+
+
+. 0 FE9B92C 16
+. 80 06 00 00 7C CB 33 78 2C 80 00 00 41 86 00 3C
+
+==== BB 1319 (0xFE9B93C) approx BBs exec'd 0 ====
+
+ 0xFE9B93C: 811E1CB0 lwz r8,7344(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1CB0, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFE9B940: 48000010 b 0xFE9B950
+ 5: JMPo $0xFE9B950 ($4)
+
+
+. 0 FE9B93C 8
+. 81 1E 1C B0 48 00 00 10
+
+==== BB 1320 (0xFE9B950) approx BBs exec'd 0 ====
+
+ 0xFE9B950: 2F800013 cmpi cr7,r0,19
+ 0: GETL R0, t0
+ 1: MOVL $0x13, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFE9B954: 2F080000 cmpi cr6,r8,0
+ 5: GETL R8, t6
+ 6: CMP0L t6, t8 (-rSo)
+ 7: ICRFL t8, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFE9B958: 409EFFEC bc 4,30,0xFE9B944
+ 9: Jc30o $0xFE9B944
+
+
+. 0 FE9B950 12
+. 2F 80 00 13 2F 08 00 00 40 9E FF EC
+
+==== BB 1321 (0xFE9B944) approx BBs exec'd 0 ====
+
+ 0xFE9B944: 840B0008 lwzu r0,8(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x8, t0
+ 2: PUTL t0, R11
+ 3: LDL (t0), t2
+ 4: PUTL t2, R0
+ 5: INCEIPL $4
+
+ 0xFE9B948: 2F000000 cmpi cr6,r0,0
+ 6: GETL R0, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFE9B94C: 419A0028 bc 12,26,0xFE9B974
+ 10: Js26o $0xFE9B974
+
+
+. 0 FE9B944 12
+. 84 0B 00 08 2F 00 00 00 41 9A 00 28
+
+==== BB 1322 (0xFE9B95C) approx BBs exec'd 0 ====
+
+ 0xFE9B95C: 41BAFFE8 bc 13,26,0xFE9B944
+ 0: Js26o $0xFE9B944
+
+
+. 0 FE9B95C 4
+. 41 BA FF E8
+
+==== BB 1323 (0xFE9B960) approx BBs exec'd 0 ====
+
+ 0xFE9B960: 808B0004 lwz r4,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFE9B964: 90880000 stw r4,0(r8)
+ 5: GETL R4, t4
+ 6: GETL R8, t6
+ 7: STL t4, (t6)
+ 8: INCEIPL $4
+
+ 0xFE9B968: 840B0008 lwzu r0,8(r11)
+ 9: GETL R11, t8
+ 10: ADDL $0x8, t8
+ 11: PUTL t8, R11
+ 12: LDL (t8), t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0xFE9B96C: 2F000000 cmpi cr6,r0,0
+ 15: GETL R0, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0xFE9B970: 409AFFE0 bc 4,26,0xFE9B950
+ 19: Jc26o $0xFE9B950
+
+
+. 0 FE9B960 20
+. 80 8B 00 04 90 88 00 00 84 0B 00 08 2F 00 00 00 40 9A FF E0
+
+==== BB 1324 (0xFE9B974) approx BBs exec'd 0 ====
+
+ 0xFE9B974: 8107000C lwz r8,12(r7)
+ 0: GETL R7, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFE9B978: 7D846378 or r4,r12,r12
+ 5: GETL R12, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFE9B97C: 80670004 lwz r3,4(r7)
+ 8: GETL R7, t6
+ 9: ADDL $0x4, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFE9B980: 80E70008 lwz r7,8(r7)
+ 13: GETL R7, t10
+ 14: ADDL $0x8, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R7
+ 17: INCEIPL $4
+
+ 0xFE9B984: 4BFFFD91 bl 0xFE9B714
+ 18: MOVL $0xFE9B988, t14
+ 19: PUTL t14, LR
+ 20: JMPo-c $0xFE9B714 ($4)
+
+
+. 0 FE9B974 20
+. 81 07 00 0C 7D 84 63 78 80 67 00 04 80 E7 00 08 4B FF FD 91
+
+==== BB 1325 generic_start_main(0xFE9B714) approx BBs exec'd 0 ====
+
+ 0xFE9B714: 9421FDE0 stwu r1,-544(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFDE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE9B718: 7D4802A6 mflr r10
+ 6: GETL LR, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0xFE9B71C: 4812C735 bl 0xFFC7E50
+ 9: MOVL $0xFE9B720, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FE9B714 12
+. 94 21 FD E0 7D 48 02 A6 48 12 C7 35
+
+==== BB 1326 (0xFE9B720) approx BBs exec'd 0 ====
+
+ 0xFE9B720: 93C10218 stw r30,536(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x218, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE9B724: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE9B728: 93A10214 stw r29,532(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x214, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE9B72C: 5480103A rlwinm r0,r4,2,0,29
+ 13: GETL R4, t10
+ 14: SHLL $0x2, t10
+ 15: PUTL t10, R0
+ 16: INCEIPL $4
+
+ 0xFE9B730: 93810210 stw r28,528(r1)
+ 17: GETL R28, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x210, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFE9B734: 7D602A14 add r11,r0,r5
+ 22: GETL R0, t16
+ 23: GETL R5, t18
+ 24: ADDL t16, t18
+ 25: PUTL t18, R11
+ 26: INCEIPL $4
+
+ 0xFE9B738: 93E1021C stw r31,540(r1)
+ 27: GETL R31, t20
+ 28: GETL R1, t22
+ 29: ADDL $0x21C, t22
+ 30: STL t20, (t22)
+ 31: INCEIPL $4
+
+ 0xFE9B73C: 83BE1CE4 lwz r29,7396(r30)
+ 32: GETL R30, t24
+ 33: ADDL $0x1CE4, t24
+ 34: LDL (t24), t26
+ 35: PUTL t26, R29
+ 36: INCEIPL $4
+
+ 0xFE9B740: 7CFC3B78 or r28,r7,r7
+ 37: GETL R7, t28
+ 38: PUTL t28, R28
+ 39: INCEIPL $4
+
+ 0xFE9B744: 91410224 stw r10,548(r1)
+ 40: GETL R10, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x224, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0xFE9B748: 7D1F4378 or r31,r8,r8
+ 45: GETL R8, t34
+ 46: PUTL t34, R31
+ 47: INCEIPL $4
+
+ 0xFE9B74C: 2F9D0000 cmpi cr7,r29,0
+ 48: GETL R29, t36
+ 49: CMP0L t36, t38 (-rSo)
+ 50: ICRFL t38, $0x7, CR
+ 51: INCEIPL $4
+
+ 0xFE9B750: 906101F0 stw r3,496(r1)
+ 52: GETL R3, t40
+ 53: GETL R1, t42
+ 54: ADDL $0x1F0, t42
+ 55: STL t40, (t42)
+ 56: INCEIPL $4
+
+ 0xFE9B754: 9361020C stw r27,524(r1)
+ 57: GETL R27, t44
+ 58: GETL R1, t46
+ 59: ADDL $0x20C, t46
+ 60: STL t44, (t46)
+ 61: INCEIPL $4
+
+ 0xFE9B758: 7D234B78 or r3,r9,r9
+ 62: GETL R9, t48
+ 63: PUTL t48, R3
+ 64: INCEIPL $4
+
+ 0xFE9B75C: 908101F4 stw r4,500(r1)
+ 65: GETL R4, t50
+ 66: GETL R1, t52
+ 67: ADDL $0x1F4, t52
+ 68: STL t50, (t52)
+ 69: INCEIPL $4
+
+ 0xFE9B760: 396B0004 addi r11,r11,4
+ 70: GETL R11, t54
+ 71: ADDL $0x4, t54
+ 72: PUTL t54, R11
+ 73: INCEIPL $4
+
+ 0xFE9B764: 90A101F8 stw r5,504(r1)
+ 74: GETL R5, t56
+ 75: GETL R1, t58
+ 76: ADDL $0x1F8, t58
+ 77: STL t56, (t58)
+ 78: INCEIPL $4
+
+ 0xFE9B768: 39400000 li r10,0
+ 79: MOVL $0x0, t60
+ 80: PUTL t60, R10
+ 81: INCEIPL $4
+
+ 0xFE9B76C: 90C101FC stw r6,508(r1)
+ 82: GETL R6, t62
+ 83: GETL R1, t64
+ 84: ADDL $0x1FC, t64
+ 85: STL t62, (t64)
+ 86: INCEIPL $4
+
+ 0xFE9B770: 419E0010 bc 12,30,0xFE9B780
+ 87: Js30o $0xFE9B780
+
+
+. 0 FE9B720 84
+. 93 C1 02 18 7F C8 02 A6 93 A1 02 14 54 80 10 3A 93 81 02 10 7D 60 2A 14 93 E1 02 1C 83 BE 1C E4 7C FC 3B 78 91 41 02 24 7D 1F 43 78 2F 9D 00 00 90 61 01 F0 93 61 02 0C 7D 23 4B 78 90 81 01 F4 39 6B 00 04 90 A1 01 F8 39 40 00 00 90 C1 01 FC 41 9E 00 10
+
+==== BB 1327 (0xFE9B780) approx BBs exec'd 0 ====
+
+ 0xFE9B780: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE9B784: 837E1B84 lwz r27,7044(r30)
+ 4: GETL R30, t4
+ 5: ADDL $0x1B84, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R27
+ 8: INCEIPL $4
+
+ 0xFE9B788: 813E1AA4 lwz r9,6820(r30)
+ 9: GETL R30, t8
+ 10: ADDL $0x1AA4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R9
+ 13: INCEIPL $4
+
+ 0xFE9B78C: 917B0000 stw r11,0(r27)
+ 14: GETL R11, t12
+ 15: GETL R27, t14
+ 16: STL t12, (t14)
+ 17: INCEIPL $4
+
+ 0xFE9B790: 91490000 stw r10,0(r9)
+ 18: GETL R10, t16
+ 19: GETL R9, t18
+ 20: STL t16, (t18)
+ 21: INCEIPL $4
+
+ 0xFE9B794: 41860010 bc 12,6,0xFE9B7A4
+ 22: Js06o $0xFE9B7A4
+
+
+. 0 FE9B780 24
+. 2C 83 00 00 83 7E 1B 84 81 3E 1A A4 91 7B 00 00 91 49 00 00 41 86 00 10
+
+==== BB 1328 (0xFE9B798) approx BBs exec'd 0 ====
+
+ 0xFE9B798: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFE9B79C: 38A00000 li r5,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R5
+ 5: INCEIPL $4
+
+ 0xFE9B7A0: 48018731 bl 0xFEB3ED0
+ 6: MOVL $0xFE9B7A4, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFEB3ED0 ($4)
+
+
+. 0 FE9B798 12
+. 38 80 00 00 38 A0 00 00 48 01 87 31
+
+==== BB 1329 __cxa_atexit_internal(0xFEB3ED0) approx BBs exec'd 0 ====
+
+ 0xFEB3ED0: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0xFEB3ED4: 9421FFE0 stwu r1,-32(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFE0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0xFEB3ED8: 93E1001C stw r31,28(r1)
+ 9: GETL R31, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x1C, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFEB3EDC: 7CBF2B78 or r31,r5,r5
+ 14: GETL R5, t10
+ 15: PUTL t10, R31
+ 16: INCEIPL $4
+
+ 0xFEB3EE0: 93810010 stw r28,16(r1)
+ 17: GETL R28, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFEB3EE4: 7C9C2378 or r28,r4,r4
+ 22: GETL R4, t16
+ 23: PUTL t16, R28
+ 24: INCEIPL $4
+
+ 0xFEB3EE8: 93A10014 stw r29,20(r1)
+ 25: GETL R29, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFEB3EEC: 7C7D1B78 or r29,r3,r3
+ 30: GETL R3, t22
+ 31: PUTL t22, R29
+ 32: INCEIPL $4
+
+ 0xFEB3EF0: 90010024 stw r0,36(r1)
+ 33: GETL R0, t24
+ 34: GETL R1, t26
+ 35: ADDL $0x24, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0xFEB3EF4: 93C10018 stw r30,24(r1)
+ 38: GETL R30, t28
+ 39: GETL R1, t30
+ 40: ADDL $0x18, t30
+ 41: STL t28, (t30)
+ 42: INCEIPL $4
+
+ 0xFEB3EF8: 4BFFFE35 bl 0xFEB3D2C
+ 43: MOVL $0xFEB3EFC, t32
+ 44: PUTL t32, LR
+ 45: JMPo-c $0xFEB3D2C ($4)
+
+
+. 0 FEB3ED0 44
+. 7C 08 02 A6 94 21 FF E0 93 E1 00 1C 7C BF 2B 78 93 81 00 10 7C 9C 23 78 93 A1 00 14 7C 7D 1B 78 90 01 00 24 93 C1 00 18 4B FF FE 35
+
+==== BB 1330 __new_exitfn(0xFEB3D2C) approx BBs exec'd 0 ====
+
+ 0xFEB3D2C: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEB3D30: 7C6802A6 mflr r3
+ 6: GETL LR, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0xFEB3D34: 4811411D bl 0xFFC7E50
+ 9: MOVL $0xFEB3D38, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FEB3D2C 12
+. 94 21 FF E0 7C 68 02 A6 48 11 41 1D
+
+==== BB 1331 (0xFEB3D38) approx BBs exec'd 0 ====
+
+ 0xFEB3D38: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEB3D3C: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEB3D40: 93810010 stw r28,16(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEB3D44: 93A10014 stw r29,20(r1)
+ 13: GETL R29, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEB3D48: 38000001 li r0,1
+ 18: MOVL $0x1, t14
+ 19: PUTL t14, R0
+ 20: INCEIPL $4
+
+ 0xFEB3D4C: 9361000C stw r27,12(r1)
+ 21: GETL R27, t16
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEB3D50: 3BA00000 li r29,0
+ 26: MOVL $0x0, t20
+ 27: PUTL t20, R29
+ 28: INCEIPL $4
+
+ 0xFEB3D54: 93E1001C stw r31,28(r1)
+ 29: GETL R31, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x1C, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFEB3D58: 90610024 stw r3,36(r1)
+ 34: GETL R3, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x24, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFEB3D5C: 839E02B4 lwz r28,692(r30)
+ 39: GETL R30, t30
+ 40: ADDL $0x2B4, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R28
+ 43: INCEIPL $4
+
+ 0xFEB3D60: 7D20E028 lwarx r9,r0,r28
+ 44: GETL R28, t34
+ 45: LOCKo
+ 46: LDL (t34), t36
+ 47: PUTL t36, R9
+ 48: INCEIPL $4
+
+ 0xFEB3D64: 7C09E800 cmp cr0,r9,r29
+ 49: GETL R9, t38
+ 50: GETL R29, t40
+ 51: CMPL t38, t40, t42 (-rSo)
+ 52: ICRFL t42, $0x0, CR
+ 53: INCEIPL $4
+
+ 0xFEB3D68: 4082000C bc 4,2,0xFEB3D74
+ 54: Jc02o $0xFEB3D74
+
+
+. 0 FEB3D38 52
+. 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 A1 00 14 38 00 00 01 93 61 00 0C 3B A0 00 00 93 E1 00 1C 90 61 00 24 83 9E 02 B4 7D 20 E0 28 7C 09 E8 00 40 82 00 0C
+
+==== BB 1332 (0xFEB3D6C) approx BBs exec'd 0 ====
+
+ 0xFEB3D6C: 7C00E12D stwcx. r0,r0,r28
+ 0: GETL R28, t0
+ 1: GETL R0, t2
+ 2: LOCKo
+ 3: STL t2, (t0) (-rSo)
+ 4: ICRFL cr, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEB3D70: 40A2FFF0 bc 5,2,0xFEB3D60
+ 6: Jc02o $0xFEB3D60
+
+
+. 0 FEB3D6C 8
+. 7C 00 E1 2D 40 A2 FF F0
+
+==== BB 1333 (0xFEB3D60) approx BBs exec'd 0 ====
+
+ 0xFEB3D60: 7D20E028 lwarx r9,r0,r28
+ 0: GETL R28, t0
+ 1: LOCKo
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEB3D64: 7C09E800 cmp cr0,r9,r29
+ 5: GETL R9, t4
+ 6: GETL R29, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEB3D68: 4082000C bc 4,2,0xFEB3D74
+ 10: Jc02o $0xFEB3D74
+
+
+. 0 FEB3D60 12
+. 7D 20 E0 28 7C 09 E8 00 40 82 00 0C
+
+==== BB 1334 (0xFEB3D74) approx BBs exec'd 0 ====
+
+ 0xFEB3D74: 4C00012C 0: INCEIPL $4
+
+ 0xFEB3D78: 2F890000 cmpi cr7,r9,0
+ 1: GETL R9, t0
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFEB3D7C: 409E0134 bc 4,30,0xFEB3EB0
+ 5: Jc30o $0xFEB3EB0
+
+
+. 0 FEB3D74 12
+. 4C 00 01 2C 2F 89 00 00 40 9E 01 34
+
+==== BB 1335 (0xFEB3D80) approx BBs exec'd 0 ====
+
+ 0xFEB3D80: 837E1AFC lwz r27,6908(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1AFC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0xFEB3D84: 83FB0000 lwz r31,0(r27)
+ 5: GETL R27, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R31
+ 8: INCEIPL $4
+
+ 0xFEB3D88: 2F1F0000 cmpi cr6,r31,0
+ 9: GETL R31, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x6, CR
+ 12: INCEIPL $4
+
+ 0xFEB3D8C: 419A0050 bc 12,26,0xFEB3DDC
+ 13: Js26o $0xFEB3DDC
+
+
+. 0 FEB3D80 16
+. 83 7E 1A FC 83 FB 00 00 2F 1F 00 00 41 9A 00 50
+
+==== BB 1336 (0xFEB3D90) approx BBs exec'd 0 ====
+
+ 0xFEB3D90: 817F0004 lwz r11,4(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFEB3D94: 3BA00000 li r29,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0xFEB3D98: 280B0000 cmpli cr0,r11,0
+ 8: GETL R11, t6
+ 9: MOVL $0x0, t10
+ 10: CMPUL t6, t10, t8 (-rSo)
+ 11: ICRFL t8, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFEB3D9C: 40810024 bc 4,1,0xFEB3DC0
+ 13: Jc01o $0xFEB3DC0
+
+
+. 0 FEB3D90 16
+. 81 7F 00 04 3B A0 00 00 28 0B 00 00 40 81 00 24
+
+==== BB 1337 (0xFEB3DC0) approx BBs exec'd 0 ====
+
+ 0xFEB3DC0: 7C0BE840 cmpl cr0,r11,r29
+ 0: GETL R11, t0
+ 1: GETL R29, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x0, CR
+ 4: INCEIPL $4
+
+ 0xFEB3DC4: 41810104 bc 12,1,0xFEB3EC8
+ 5: Js01o $0xFEB3EC8
+
+
+. 0 FEB3DC0 8
+. 7C 0B E8 40 41 81 01 04
+
+==== BB 1338 (0xFEB3DC8) approx BBs exec'd 0 ====
+
+ 0xFEB3DC8: 288B001F cmpli cr1,r11,31
+ 0: GETL R11, t0
+ 1: MOVL $0x1F, t4
+ 2: CMPUL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFEB3DCC: 408500F0 bc 4,5,0xFEB3EBC
+ 5: Jc05o $0xFEB3EBC
+
+
+. 0 FEB3DC8 8
+. 28 8B 00 1F 40 85 00 F0
+
+==== BB 1339 (0xFEB3EBC) approx BBs exec'd 0 ====
+
+ 0xFEB3EBC: 392B0001 addi r9,r11,1
+ 0: GETL R11, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFEB3EC0: 7D7D5B78 or r29,r11,r11
+ 4: GETL R11, t2
+ 5: PUTL t2, R29
+ 6: INCEIPL $4
+
+ 0xFEB3EC4: 913F0004 stw r9,4(r31)
+ 7: GETL R9, t4
+ 8: GETL R31, t6
+ 9: ADDL $0x4, t6
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0xFEB3EC8: 40BAFF40 bc 5,26,0xFEB3E08
+ 12: Jc26o $0xFEB3E08
+
+
+. 0 FEB3EBC 16
+. 39 2B 00 01 7D 7D 5B 78 91 3F 00 04 40 BA FF 40
+
+==== BB 1340 (0xFEB3E08) approx BBs exec'd 0 ====
+
+ 0xFEB3E08: 57AA2036 rlwinm r10,r29,4,0,27
+ 0: GETL R29, t0
+ 1: SHLL $0x4, t0
+ 2: PUTL t0, R10
+ 3: INCEIPL $4
+
+ 0xFEB3E0C: 39000001 li r8,1
+ 4: MOVL $0x1, t2
+ 5: PUTL t2, R8
+ 6: INCEIPL $4
+
+ 0xFEB3E10: 7CEAFA14 add r7,r10,r31
+ 7: GETL R10, t4
+ 8: GETL R31, t6
+ 9: ADDL t4, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0xFEB3E14: 91070008 stw r8,8(r7)
+ 12: GETL R8, t8
+ 13: GETL R7, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFEB3E18: 39800000 li r12,0
+ 17: MOVL $0x0, t12
+ 18: PUTL t12, R12
+ 19: INCEIPL $4
+
+ 0xFEB3E1C: 7C0004AC sync
+ 20: INCEIPL $4
+
+ 0xFEB3E20: 7D60E028 lwarx r11,r0,r28
+ 21: GETL R28, t14
+ 22: LOCKo
+ 23: LDL (t14), t16
+ 24: PUTL t16, R11
+ 25: INCEIPL $4
+
+ 0xFEB3E24: 7D80E12D stwcx. r12,r0,r28
+ 26: GETL R28, t18
+ 27: GETL R12, t20
+ 28: LOCKo
+ 29: STL t20, (t18) (-rSo)
+ 30: ICRFL cr, $0x0, CR
+ 31: INCEIPL $4
+
+ 0xFEB3E28: 40A2FFF8 bc 5,2,0xFEB3E20
+ 32: Jc02o $0xFEB3E20
+
+
+. 0 FEB3E08 36
+. 57 AA 20 36 39 00 00 01 7C EA FA 14 91 07 00 08 39 80 00 00 7C 00 04 AC 7D 60 E0 28 7D 80 E1 2D 40 A2 FF F8
+
+==== BB 1341 (0xFEB3E2C) approx BBs exec'd 0 ====
+
+ 0xFEB3E2C: 2F8B0001 cmpi cr7,r11,1
+ 0: GETL R11, t0
+ 1: MOVL $0x1, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFEB3E30: 419D0060 bc 12,29,0xFEB3E90
+ 5: Js29o $0xFEB3E90
+
+
+. 0 FEB3E2C 8
+. 2F 8B 00 01 41 9D 00 60
+
+==== BB 1342 (0xFEB3E34) approx BBs exec'd 0 ====
+
+ 0xFEB3E34: 419A0034 bc 12,26,0xFEB3E68
+ 0: Js26o $0xFEB3E68
+
+
+. 0 FEB3E34 4
+. 41 9A 00 34
+
+==== BB 1343 (0xFEB3E38) approx BBs exec'd 0 ====
+
+ 0xFEB3E38: 57BC2036 rlwinm r28,r29,4,0,27
+ 0: GETL R29, t0
+ 1: SHLL $0x4, t0
+ 2: PUTL t0, R28
+ 3: INCEIPL $4
+
+ 0xFEB3E3C: 83A10024 lwz r29,36(r1)
+ 4: GETL R1, t2
+ 5: ADDL $0x24, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0xFEB3E40: 7F7CFA14 add r27,r28,r31
+ 9: GETL R28, t6
+ 10: GETL R31, t8
+ 11: ADDL t6, t8
+ 12: PUTL t8, R27
+ 13: INCEIPL $4
+
+ 0xFEB3E44: 83C10018 lwz r30,24(r1)
+ 14: GETL R1, t10
+ 15: ADDL $0x18, t10
+ 16: LDL (t10), t12
+ 17: PUTL t12, R30
+ 18: INCEIPL $4
+
+ 0xFEB3E48: 387B0008 addi r3,r27,8
+ 19: GETL R27, t14
+ 20: ADDL $0x8, t14
+ 21: PUTL t14, R3
+ 22: INCEIPL $4
+
+ 0xFEB3E4C: 7FA803A6 mtlr r29
+ 23: GETL R29, t16
+ 24: PUTL t16, LR
+ 25: INCEIPL $4
+
+ 0xFEB3E50: 8361000C lwz r27,12(r1)
+ 26: GETL R1, t18
+ 27: ADDL $0xC, t18
+ 28: LDL (t18), t20
+ 29: PUTL t20, R27
+ 30: INCEIPL $4
+
+ 0xFEB3E54: 83810010 lwz r28,16(r1)
+ 31: GETL R1, t22
+ 32: ADDL $0x10, t22
+ 33: LDL (t22), t24
+ 34: PUTL t24, R28
+ 35: INCEIPL $4
+
+ 0xFEB3E58: 83A10014 lwz r29,20(r1)
+ 36: GETL R1, t26
+ 37: ADDL $0x14, t26
+ 38: LDL (t26), t28
+ 39: PUTL t28, R29
+ 40: INCEIPL $4
+
+ 0xFEB3E5C: 83E1001C lwz r31,28(r1)
+ 41: GETL R1, t30
+ 42: ADDL $0x1C, t30
+ 43: LDL (t30), t32
+ 44: PUTL t32, R31
+ 45: INCEIPL $4
+
+ 0xFEB3E60: 38210020 addi r1,r1,32
+ 46: GETL R1, t34
+ 47: ADDL $0x20, t34
+ 48: PUTL t34, R1
+ 49: INCEIPL $4
+
+ 0xFEB3E64: 4E800020 blr
+ 50: GETL LR, t36
+ 51: JMPo-r t36 ($4)
+
+
+. 0 FEB3E38 48
+. 57 BC 20 36 83 A1 00 24 7F 7C FA 14 83 C1 00 18 38 7B 00 08 7F A8 03 A6 83 61 00 0C 83 81 00 10 83 A1 00 14 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 1344 (0xFEB3EFC) approx BBs exec'd 0 ====
+
+ 0xFEB3EFC: 2C030000 cmpi cr0,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEB3F00: 3800FFFF li r0,-1
+ 4: MOVL $0xFFFFFFFF, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFEB3F04: 4182001C bc 12,2,0xFEB3F20
+ 7: Js02o $0xFEB3F20
+
+
+. 0 FEB3EFC 12
+. 2C 03 00 00 38 00 FF FF 41 82 00 1C
+
+==== BB 1345 (0xFEB3F08) approx BBs exec'd 0 ====
+
+ 0xFEB3F08: 38800004 li r4,4
+ 0: MOVL $0x4, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFEB3F0C: 93E3000C stw r31,12(r3)
+ 3: GETL R31, t2
+ 4: GETL R3, t4
+ 5: ADDL $0xC, t4
+ 6: STL t2, (t4)
+ 7: INCEIPL $4
+
+ 0xFEB3F10: 90830000 stw r4,0(r3)
+ 8: GETL R4, t6
+ 9: GETL R3, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFEB3F14: 38000000 li r0,0
+ 12: MOVL $0x0, t10
+ 13: PUTL t10, R0
+ 14: INCEIPL $4
+
+ 0xFEB3F18: 93A30004 stw r29,4(r3)
+ 15: GETL R29, t12
+ 16: GETL R3, t14
+ 17: ADDL $0x4, t14
+ 18: STL t12, (t14)
+ 19: INCEIPL $4
+
+ 0xFEB3F1C: 93830008 stw r28,8(r3)
+ 20: GETL R28, t16
+ 21: GETL R3, t18
+ 22: ADDL $0x8, t18
+ 23: STL t16, (t18)
+ 24: INCEIPL $4
+
+ 0xFEB3F20: 80A10024 lwz r5,36(r1)
+ 25: GETL R1, t20
+ 26: ADDL $0x24, t20
+ 27: LDL (t20), t22
+ 28: PUTL t22, R5
+ 29: INCEIPL $4
+
+ 0xFEB3F24: 7C030378 or r3,r0,r0
+ 30: GETL R0, t24
+ 31: PUTL t24, R3
+ 32: INCEIPL $4
+
+ 0xFEB3F28: 83810010 lwz r28,16(r1)
+ 33: GETL R1, t26
+ 34: ADDL $0x10, t26
+ 35: LDL (t26), t28
+ 36: PUTL t28, R28
+ 37: INCEIPL $4
+
+ 0xFEB3F2C: 83A10014 lwz r29,20(r1)
+ 38: GETL R1, t30
+ 39: ADDL $0x14, t30
+ 40: LDL (t30), t32
+ 41: PUTL t32, R29
+ 42: INCEIPL $4
+
+ 0xFEB3F30: 7CA803A6 mtlr r5
+ 43: GETL R5, t34
+ 44: PUTL t34, LR
+ 45: INCEIPL $4
+
+ 0xFEB3F34: 83C10018 lwz r30,24(r1)
+ 46: GETL R1, t36
+ 47: ADDL $0x18, t36
+ 48: LDL (t36), t38
+ 49: PUTL t38, R30
+ 50: INCEIPL $4
+
+ 0xFEB3F38: 83E1001C lwz r31,28(r1)
+ 51: GETL R1, t40
+ 52: ADDL $0x1C, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R31
+ 55: INCEIPL $4
+
+ 0xFEB3F3C: 38210020 addi r1,r1,32
+ 56: GETL R1, t44
+ 57: ADDL $0x20, t44
+ 58: PUTL t44, R1
+ 59: INCEIPL $4
+
+ 0xFEB3F40: 4E800020 blr
+ 60: GETL LR, t46
+ 61: JMPo-r t46 ($4)
+
+
+. 0 FEB3F08 60
+. 38 80 00 04 93 E3 00 0C 90 83 00 00 38 00 00 00 93 A3 00 04 93 83 00 08 80 A1 00 24 7C 03 03 78 83 81 00 10 83 A1 00 14 7C A8 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 1346 (0xFE9B7A4) approx BBs exec'd 0 ====
+
+ 0xFE9B7A4: 2F1F0000 cmpi cr6,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFE9B7A8: 419A0014 bc 12,26,0xFE9B7BC
+ 4: Js26o $0xFE9B7BC
+
+
+. 0 FE9B7A4 8
+. 2F 1F 00 00 41 9A 00 14
+
+==== BB 1347 (0xFE9B7AC) approx BBs exec'd 0 ====
+
+ 0xFE9B7AC: 7FE3FB78 or r3,r31,r31
+ 0: GETL R31, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFE9B7B0: 38800000 li r4,0
+ 3: MOVL $0x0, t2
+ 4: PUTL t2, R4
+ 5: INCEIPL $4
+
+ 0xFE9B7B4: 38A00000 li r5,0
+ 6: MOVL $0x0, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0xFE9B7B8: 48018719 bl 0xFEB3ED0
+ 9: MOVL $0xFE9B7BC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFEB3ED0 ($4)
+
+
+. 0 FE9B7AC 16
+. 7F E3 FB 78 38 80 00 00 38 A0 00 00 48 01 87 19
+
+==== BB 1348 (0xFEB3DA0) approx BBs exec'd 0 ====
+
+ 0xFEB3DA0: 393F0008 addi r9,r31,8
+ 0: GETL R31, t0
+ 1: ADDL $0x8, t0
+ 2: PUTL t0, R9
+ 3: INCEIPL $4
+
+ 0xFEB3DA4: 80890000 lwz r4,0(r9)
+ 4: GETL R9, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFEB3DA8: 39290010 addi r9,r9,16
+ 8: GETL R9, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0xFEB3DAC: 2C840000 cmpi cr1,r4,0
+ 12: GETL R4, t8
+ 13: CMP0L t8, t10 (-rSo)
+ 14: ICRFL t10, $0x1, CR
+ 15: INCEIPL $4
+
+ 0xFEB3DB0: 41860010 bc 12,6,0xFEB3DC0
+ 16: Js06o $0xFEB3DC0
+
+
+. 0 FEB3DA0 20
+. 39 3F 00 08 80 89 00 00 39 29 00 10 2C 84 00 00 41 86 00 10
+
+==== BB 1349 (0xFEB3DB4) approx BBs exec'd 0 ====
+
+ 0xFEB3DB4: 3BBD0001 addi r29,r29,1
+ 0: GETL R29, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R29
+ 3: INCEIPL $4
+
+ 0xFEB3DB8: 7F8BE840 cmpl cr7,r11,r29
+ 4: GETL R11, t2
+ 5: GETL R29, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFEB3DBC: 419DFFE8 bc 12,29,0xFEB3DA4
+ 9: Js29o $0xFEB3DA4
+
+
+. 0 FEB3DB4 12
+. 3B BD 00 01 7F 8B E8 40 41 9D FF E8
+
+==== BB 1350 (0xFE9B7BC) approx BBs exec'd 0 ====
+
+ 0xFE9B7BC: 83FE1BC8 lwz r31,7112(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BC8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFE9B7C0: 807F0000 lwz r3,0(r31)
+ 5: GETL R31, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFE9B7C4: 70690002 andi. r9,r3,0x2
+ 9: GETL R3, t8
+ 10: ANDL $0x2, t8
+ 11: PUTL t8, R9
+ 12: CMP0L t8, t10 (-rSo)
+ 13: ICRFL t10, $0x0, CR
+ 14: INCEIPL $4
+
+ 0xFE9B7C8: 7FA00026 mfcr r29
+ 15: GETL CR, t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0xFE9B7CC: 40820080 bc 4,2,0xFE9B84C
+ 18: Jc02o $0xFE9B84C
+
+
+. 0 FE9B7BC 20
+. 83 FE 1B C8 80 7F 00 00 70 69 00 02 7F A0 00 26 40 82 00 80
+
+==== BB 1351 (0xFE9B7D0) approx BBs exec'd 0 ====
+
+ 0xFE9B7D0: 2F9C0000 cmpi cr7,r28,0
+ 0: GETL R28, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFE9B7D4: 419E001C bc 12,30,0xFE9B7F0
+ 4: Js30o $0xFE9B7F0
+
+
+. 0 FE9B7D0 8
+. 2F 9C 00 00 41 9E 00 1C
+
+==== BB 1352 (0xFE9B7D8) approx BBs exec'd 0 ====
+
+ 0xFE9B7D8: 80BB0000 lwz r5,0(r27)
+ 0: GETL R27, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R5
+ 3: INCEIPL $4
+
+ 0xFE9B7DC: 7F8803A6 mtlr r28
+ 4: GETL R28, t4
+ 5: PUTL t4, LR
+ 6: INCEIPL $4
+
+ 0xFE9B7E0: 806101F4 lwz r3,500(r1)
+ 7: GETL R1, t6
+ 8: ADDL $0x1F4, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R3
+ 11: INCEIPL $4
+
+ 0xFE9B7E4: 808101F8 lwz r4,504(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x1F8, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R4
+ 16: INCEIPL $4
+
+ 0xFE9B7E8: 80C101FC lwz r6,508(r1)
+ 17: GETL R1, t14
+ 18: ADDL $0x1FC, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R6
+ 21: INCEIPL $4
+
+ 0xFE9B7EC: 4E800021 blrl
+ 22: GETL LR, t18
+ 23: MOVL $0xFE9B7F0, t20
+ 24: PUTL t20, LR
+ 25: JMPo-r t18 ($4)
+
+
+. 0 FE9B7D8 24
+. 80 BB 00 00 7F 88 03 A6 80 61 01 F4 80 81 01 F8 80 C1 01 FC 4E 80 00 21
+
+==== BB 1353 __libc_csu_init(0x100003FC) approx BBs exec'd 0 ====
+
+ 0x100003FC: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x10000400: 7CA802A6 mflr r5
+ 6: GETL LR, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x10000404: 429F0005 bcl 20,31,0x10000408
+ 9: MOVL $0x10000408, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x10000408: 93C10018 stw r30,24(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x1000040C: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0x10000410: 93810010 stw r28,16(r1)
+ 20: GETL R28, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x10, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x10000414: 93E1001C stw r31,28(r1)
+ 25: GETL R31, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0x10000418: 93A10014 stw r29,20(r1)
+ 30: GETL R29, t22
+ 31: GETL R1, t24
+ 32: ADDL $0x14, t24
+ 33: STL t22, (t24)
+ 34: INCEIPL $4
+
+ 0x1000041C: 809EFFF0 lwz r4,-16(r30)
+ 35: GETL R30, t26
+ 36: ADDL $0xFFFFFFF0, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R4
+ 39: INCEIPL $4
+
+ 0x10000420: 90A10024 stw r5,36(r1)
+ 40: GETL R5, t30
+ 41: GETL R1, t32
+ 42: ADDL $0x24, t32
+ 43: STL t30, (t32)
+ 44: INCEIPL $4
+
+ 0x10000424: 7FC4F214 add r30,r4,r30
+ 45: GETL R4, t34
+ 46: GETL R30, t36
+ 47: ADDL t34, t36
+ 48: PUTL t36, R30
+ 49: INCEIPL $4
+
+ 0x10000428: 4BFFFE51 bl 0x10000278
+ 50: MOVL $0x1000042C, t38
+ 51: PUTL t38, LR
+ 52: JMPo-c $0x10000278 ($4)
+
+
+. 0 100003FC 48
+. 94 21 FF E0 7C A8 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 E1 00 1C 93 A1 00 14 80 9E FF F0 90 A1 00 24 7F C4 F2 14 4B FF FE 51
+
+==== BB 1354 (0x10000278) approx BBs exec'd 0 ====
+
+ 0x10000278: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x1000027C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x10000280: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x10000284: 48000041 bl 0x100002C4
+ 14: MOVL $0x10000288, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x100002C4 ($4)
+
+
+. 0 10000278 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 48 00 00 41
+
+==== BB 1355 (0x100002C4) approx BBs exec'd 0 ====
+
+ 0x100002C4: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x100002C8: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x100002CC: 93C10008 stw r30,8(r1)
+ 9: GETL R30, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x100002D0: 90010014 stw r0,20(r1)
+ 14: GETL R0, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x14, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0x100002D4: 480105B5 bl 0x10010888
+ 19: MOVL $0x100002D8, t14
+ 20: PUTL t14, LR
+ 21: JMPo-c $0x10010888 ($4)
+
+
+. 0 100002C4 20
+. 94 21 FF F0 7C 08 02 A6 93 C1 00 08 90 01 00 14 48 01 05 B5
+
+==== BB 1356 (0x10010888) approx BBs exec'd 0 ====
+
+ 0x10010888: 4E800021 blrl
+ 0: GETL LR, t0
+ 1: MOVL $0x1001088C, t2
+ 2: PUTL t2, LR
+ 3: JMPo-r t0 ($4)
+
+
+. 0 10010888 4
+. 4E 80 00 21
+
+==== BB 1357 (0x100002D8) approx BBs exec'd 0 ====
+
+ 0x100002D8: 7FC802A6 mflr r30
+ 0: GETL LR, t0
+ 1: PUTL t0, R30
+ 2: INCEIPL $4
+
+ 0x100002DC: 801E000C lwz r0,12(r30)
+ 3: GETL R30, t2
+ 4: ADDL $0xC, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0x100002E0: 2F800000 cmpi cr7,r0,0
+ 8: GETL R0, t6
+ 9: CMP0L t6, t8 (-rSo)
+ 10: ICRFL t8, $0x7, CR
+ 11: INCEIPL $4
+
+ 0x100002E4: 419E000C bc 12,30,0x100002F0
+ 12: Js30o $0x100002F0
+
+
+. 0 100002D8 16
+. 7F C8 02 A6 80 1E 00 0C 2F 80 00 00 41 9E 00 0C
+
+==== BB 1358 (0x100002F0) approx BBs exec'd 0 ====
+
+ 0x100002F0: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x100002F4: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0x100002F8: 83C10008 lwz r30,8(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R30
+ 12: INCEIPL $4
+
+ 0x100002FC: 38210010 addi r1,r1,16
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: PUTL t10, R1
+ 16: INCEIPL $4
+
+ 0x10000300: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+. 0 100002F0 20
+. 80 01 00 14 7C 08 03 A6 83 C1 00 08 38 21 00 10 4E 80 00 20
+
+==== BB 1359 (0x10000288) approx BBs exec'd 0 ====
+
+ 0x10000288: 48000105 bl 0x1000038C
+ 0: MOVL $0x1000028C, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x1000038C ($4)
+
+
+. 0 10000288 4
+. 48 00 01 05
+
+==== BB 1360 (0x1000038C) approx BBs exec'd 0 ====
+
+ 0x1000038C: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x10000390: 3D601001 lis r11,4097
+ 3: MOVL $0x10010000, t2
+ 4: PUTL t2, R11
+ 5: INCEIPL $4
+
+ 0x10000394: 9421FFF0 stwu r1,-16(r1)
+ 6: GETL R1, t4
+ 7: GETL R1, t6
+ 8: ADDL $0xFFFFFFF0, t6
+ 9: PUTL t6, R1
+ 10: STL t4, (t6)
+ 11: INCEIPL $4
+
+ 0x10000398: 3D200000 lis r9,0
+ 12: MOVL $0x0, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x1000039C: 39290000 addi r9,r9,0
+ 15: MOVL $0x0, t10
+ 16: PUTL t10, R9
+ 17: INCEIPL $4
+
+ 0x100003A0: 386B07A4 addi r3,r11,1956
+ 18: MOVL $0x100107A4, t12
+ 19: PUTL t12, R3
+ 20: INCEIPL $4
+
+ 0x100003A4: 90010014 stw r0,20(r1)
+ 21: GETL R0, t14
+ 22: GETL R1, t16
+ 23: ADDL $0x14, t16
+ 24: STL t14, (t16)
+ 25: INCEIPL $4
+
+ 0x100003A8: 800B07A4 lwz r0,1956(r11)
+ 26: MOVL $0x100107A4, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R0
+ 29: INCEIPL $4
+
+ 0x100003AC: 2F800000 cmpi cr7,r0,0
+ 30: GETL R0, t22
+ 31: CMP0L t22, t24 (-rSo)
+ 32: ICRFL t24, $0x7, CR
+ 33: INCEIPL $4
+
+ 0x100003B0: 419E0014 bc 12,30,0x100003C4
+ 34: Js30o $0x100003C4
+
+
+. 0 1000038C 40
+. 7C 08 02 A6 3D 60 10 01 94 21 FF F0 3D 20 00 00 39 29 00 00 38 6B 07 A4 90 01 00 14 80 0B 07 A4 2F 80 00 00 41 9E 00 14
+
+==== BB 1361 (0x100003C4) approx BBs exec'd 0 ====
+
+ 0x100003C4: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x100003C8: 38210010 addi r1,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R1
+ 8: INCEIPL $4
+
+ 0x100003CC: 7C0803A6 mtlr r0
+ 9: GETL R0, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x100003D0: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+. 0 100003C4 16
+. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+==== BB 1362 (0x1000028C) approx BBs exec'd 0 ====
+
+ 0x1000028C: 48000469 bl 0x100006F4
+ 0: MOVL $0x10000290, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x100006F4 ($4)
+
+
+. 0 1000028C 4
+. 48 00 04 69
+
+==== BB 1363 (0x100006F4) approx BBs exec'd 0 ====
+
+ 0x100006F4: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x100006F8: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x100006FC: 3D201001 lis r9,4097
+ 9: MOVL $0x10010000, t6
+ 10: PUTL t6, R9
+ 11: INCEIPL $4
+
+ 0x10000700: 93E1000C stw r31,12(r1)
+ 12: GETL R31, t8
+ 13: GETL R1, t10
+ 14: ADDL $0xC, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x10000704: 39290798 addi r9,r9,1944
+ 17: MOVL $0x10010798, t12
+ 18: PUTL t12, R9
+ 19: INCEIPL $4
+
+ 0x10000708: 90010014 stw r0,20(r1)
+ 20: GETL R0, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x14, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x1000070C: 3BE9FFFC addi r31,r9,-4
+ 25: MOVL $0x10010794, t18
+ 26: PUTL t18, R31
+ 27: INCEIPL $4
+
+ 0x10000710: 8009FFFC lwz r0,-4(r9)
+ 28: MOVL $0x10010794, t20
+ 29: LDL (t20), t22
+ 30: PUTL t22, R0
+ 31: INCEIPL $4
+
+ 0x10000714: 48000010 b 0x10000724
+ 32: JMPo $0x10000724 ($4)
+
+
+. 0 100006F4 36
+. 7C 08 02 A6 94 21 FF F0 3D 20 10 01 93 E1 00 0C 39 29 07 98 90 01 00 14 3B E9 FF FC 80 09 FF FC 48 00 00 10
+
+==== BB 1364 (0x10000724) approx BBs exec'd 0 ====
+
+ 0x10000724: 2F80FFFF cmpi cr7,r0,-1
+ 0: GETL R0, t0
+ 1: MOVL $0xFFFFFFFF, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x7, CR
+ 4: INCEIPL $4
+
+ 0x10000728: 409EFFF0 bc 4,30,0x10000718
+ 5: Jc30o $0x10000718
+
+
+. 0 10000724 8
+. 2F 80 FF FF 40 9E FF F0
+
+==== BB 1365 (0x1000072C) approx BBs exec'd 0 ====
+
+ 0x1000072C: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10000730: 83E1000C lwz r31,12(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0xC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0x10000734: 38210010 addi r1,r1,16
+ 10: GETL R1, t8
+ 11: ADDL $0x10, t8
+ 12: PUTL t8, R1
+ 13: INCEIPL $4
+
+ 0x10000738: 7C0803A6 mtlr r0
+ 14: GETL R0, t10
+ 15: PUTL t10, LR
+ 16: INCEIPL $4
+
+ 0x1000073C: 4E800020 blr
+ 17: GETL LR, t12
+ 18: JMPo-r t12 ($4)
+
+
+. 0 1000072C 20
+. 80 01 00 14 83 E1 00 0C 38 21 00 10 7C 08 03 A6 4E 80 00 20
+
+==== BB 1366 (0x10000290) approx BBs exec'd 0 ====
+
+ 0x10000290: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10000294: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0x10000298: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0x1000029C: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+. 0 10000290 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+
+==== BB 1367 (0x1000042C) approx BBs exec'd 0 ====
+
+ 0x1000042C: 839E8004 lwz r28,-32764(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8004, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x10000430: 807E8000 lwz r3,-32768(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0xFFFF8000, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x10000434: 3BE00000 li r31,0
+ 10: MOVL $0x0, t8
+ 11: PUTL t8, R31
+ 12: INCEIPL $4
+
+ 0x10000438: 7C1C1850 subf r0,r28,r3
+ 13: GETL R28, t10
+ 14: GETL R3, t12
+ 15: SUBL t10, t12
+ 16: PUTL t12, R0
+ 17: INCEIPL $4
+
+ 0x1000043C: 7C001670 srawi r0,r0,2
+ 18: GETL R0, t14
+ 19: SARL $0x2, t14 (-wCa)
+ 20: PUTL t14, R0
+ 21: INCEIPL $4
+
+ 0x10000440: 7F9F0040 cmpl cr7,r31,r0
+ 22: GETL R31, t16
+ 23: GETL R0, t18
+ 24: CMPUL t16, t18, t20 (-rSo)
+ 25: ICRFL t20, $0x7, CR
+ 26: INCEIPL $4
+
+ 0x10000444: 409C0024 bc 4,28,0x10000468
+ 27: Jc28o $0x10000468
+
+
+. 0 1000042C 28
+. 83 9E 80 04 80 7E 80 00 3B E0 00 00 7C 1C 18 50 7C 00 16 70 7F 9F 00 40 40 9C 00 24
+
+==== BB 1368 (0x10000468) approx BBs exec'd 0 ====
+
+ 0x10000468: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x1000046C: 83810010 lwz r28,16(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x10000470: 83A10014 lwz r29,20(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R29
+ 14: INCEIPL $4
+
+ 0x10000474: 7D0803A6 mtlr r8
+ 15: GETL R8, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x10000478: 83C10018 lwz r30,24(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x18, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R30
+ 22: INCEIPL $4
+
+ 0x1000047C: 83E1001C lwz r31,28(r1)
+ 23: GETL R1, t18
+ 24: ADDL $0x1C, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R31
+ 27: INCEIPL $4
+
+ 0x10000480: 38210020 addi r1,r1,32
+ 28: GETL R1, t22
+ 29: ADDL $0x20, t22
+ 30: PUTL t22, R1
+ 31: INCEIPL $4
+
+ 0x10000484: 4E800020 blr
+ 32: GETL LR, t24
+ 33: JMPo-r t24 ($4)
+
+
+. 0 10000468 32
+. 81 01 00 24 83 81 00 10 83 A1 00 14 7D 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 1369 (0xFE9B7F0) approx BBs exec'd 0 ====
+
+ 0xFE9B7F0: 7FA80120 mtcrf 0x80,r29
+ 0: GETL R29, t0
+ 1: ICRFL t0, $0x0, CR
+ 2: INCEIPL $4
+
+ 0xFE9B7F4: 408200B0 bc 4,2,0xFE9B8A4
+ 3: Jc02o $0xFE9B8A4
+
+
+. 0 FE9B7F0 8
+. 7F A8 01 20 40 82 00 B0
+
+==== BB 1370 (0xFE9B7F8) approx BBs exec'd 0 ====
+
+ 0xFE9B7F8: 38610010 addi r3,r1,16
+ 0: GETL R1, t0
+ 1: ADDL $0x10, t0
+ 2: PUTL t0, R3
+ 3: INCEIPL $4
+
+ 0xFE9B7FC: 48014F9D bl 0xFEB0798
+ 4: MOVL $0xFE9B800, t2
+ 5: PUTL t2, LR
+ 6: JMPo-c $0xFEB0798 ($4)
+
+
+. 0 FE9B7F8 8
+. 38 61 00 10 48 01 4F 9D
+
+==== BB 1371 __GI__setjmp(0xFEB0798) approx BBs exec'd 0 ====
+
+ 0xFEB0798: 38800000 li r4,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R4
+ 2: INCEIPL $4
+
+ 0xFEB079C: 4BFFFC94 b 0xFEB0430
+ 3: JMPo $0xFEB0430 ($4)
+
+
+. 0 FEB0798 8
+. 38 80 00 00 4B FF FC 94
+
+==== BB 1372 __sigsetjmp@@GLIBC_2.3.4(0xFEB0430) approx BBs exec'd 0 ====
+
+ 0xFEB0430: 90230000 stw r1,0(r3)
+ 0: GETL R1, t0
+ 1: GETL R3, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFEB0434: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFEB0438: 91C3000C stw r14,12(r3)
+ 7: GETL R14, t6
+ 8: GETL R3, t8
+ 9: ADDL $0xC, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFEB043C: D9C30058 stfd f14,88(r3)
+ 12: GETL R3, t10
+ 13: ADDL $0x58, t10
+ 14: FPU_WQ 0x0:0xE, (t10)
+ 15: INCEIPL $4
+
+ 0xFEB0440: 90030008 stw r0,8(r3)
+ 16: GETL R0, t12
+ 17: GETL R3, t14
+ 18: ADDL $0x8, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFEB0444: 91E30010 stw r15,16(r3)
+ 21: GETL R15, t16
+ 22: GETL R3, t18
+ 23: ADDL $0x10, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEB0448: D9E30060 stfd f15,96(r3)
+ 26: GETL R3, t20
+ 27: ADDL $0x60, t20
+ 28: FPU_WQ 0x0:0xF, (t20)
+ 29: INCEIPL $4
+
+ 0xFEB044C: 7C000026 mfcr r0
+ 30: GETL CR, t22
+ 31: PUTL t22, R0
+ 32: INCEIPL $4
+
+ 0xFEB0450: 92030014 stw r16,20(r3)
+ 33: GETL R16, t24
+ 34: GETL R3, t26
+ 35: ADDL $0x14, t26
+ 36: STL t24, (t26)
+ 37: INCEIPL $4
+
+ 0xFEB0454: DA030068 stfd f16,104(r3)
+ 38: GETL R3, t28
+ 39: ADDL $0x68, t28
+ 40: FPU_WQ 0x0:0x10, (t28)
+ 41: INCEIPL $4
+
+ 0xFEB0458: 90030054 stw r0,84(r3)
+ 42: GETL R0, t30
+ 43: GETL R3, t32
+ 44: ADDL $0x54, t32
+ 45: STL t30, (t32)
+ 46: INCEIPL $4
+
+ 0xFEB045C: 92230018 stw r17,24(r3)
+ 47: GETL R17, t34
+ 48: GETL R3, t36
+ 49: ADDL $0x18, t36
+ 50: STL t34, (t36)
+ 51: INCEIPL $4
+
+ 0xFEB0460: DA230070 stfd f17,112(r3)
+ 52: GETL R3, t38
+ 53: ADDL $0x70, t38
+ 54: FPU_WQ 0x0:0x11, (t38)
+ 55: INCEIPL $4
+
+ 0xFEB0464: 9243001C stw r18,28(r3)
+ 56: GETL R18, t40
+ 57: GETL R3, t42
+ 58: ADDL $0x1C, t42
+ 59: STL t40, (t42)
+ 60: INCEIPL $4
+
+ 0xFEB0468: DA430078 stfd f18,120(r3)
+ 61: GETL R3, t44
+ 62: ADDL $0x78, t44
+ 63: FPU_WQ 0x0:0x12, (t44)
+ 64: INCEIPL $4
+
+ 0xFEB046C: 92630020 stw r19,32(r3)
+ 65: GETL R19, t46
+ 66: GETL R3, t48
+ 67: ADDL $0x20, t48
+ 68: STL t46, (t48)
+ 69: INCEIPL $4
+
+ 0xFEB0470: DA630080 stfd f19,128(r3)
+ 70: GETL R3, t50
+ 71: ADDL $0x80, t50
+ 72: FPU_WQ 0x0:0x13, (t50)
+ 73: INCEIPL $4
+
+ 0xFEB0474: 92830024 stw r20,36(r3)
+ 74: GETL R20, t52
+ 75: GETL R3, t54
+ 76: ADDL $0x24, t54
+ 77: STL t52, (t54)
+ 78: INCEIPL $4
+
+ 0xFEB0478: DA830088 stfd f20,136(r3)
+ 79: GETL R3, t56
+ 80: ADDL $0x88, t56
+ 81: FPU_WQ 0x0:0x14, (t56)
+ 82: INCEIPL $4
+
+ 0xFEB047C: 92A30028 stw r21,40(r3)
+ 83: GETL R21, t58
+ 84: GETL R3, t60
+ 85: ADDL $0x28, t60
+ 86: STL t58, (t60)
+ 87: INCEIPL $4
+
+ 0xFEB0480: DAA30090 stfd f21,144(r3)
+ 88: GETL R3, t62
+ 89: ADDL $0x90, t62
+ 90: FPU_WQ 0x0:0x15, (t62)
+ 91: INCEIPL $4
+
+ 0xFEB0484: 92C3002C stw r22,44(r3)
+ 92: GETL R22, t64
+ 93: GETL R3, t66
+ 94: ADDL $0x2C, t66
+ 95: STL t64, (t66)
+ 96: INCEIPL $4
+
+ 0xFEB0488: DAC30098 stfd f22,152(r3)
+ 97: GETL R3, t68
+ 98: ADDL $0x98, t68
+ 99: FPU_WQ 0x0:0x16, (t68)
+ 100: INCEIPL $4
+
+ 0xFEB048C: 92E30030 stw r23,48(r3)
+ 101: GETL R23, t70
+ 102: GETL R3, t72
+ 103: ADDL $0x30, t72
+ 104: STL t70, (t72)
+ 105: INCEIPL $4
+
+ 0xFEB0490: DAE300A0 stfd f23,160(r3)
+ 106: GETL R3, t74
+ 107: ADDL $0xA0, t74
+ 108: FPU_WQ 0x0:0x17, (t74)
+ 109: INCEIPL $4
+
+ 0xFEB0494: 93030034 stw r24,52(r3)
+ 110: GETL R24, t76
+ 111: GETL R3, t78
+ 112: ADDL $0x34, t78
+ 113: STL t76, (t78)
+ 114: INCEIPL $4
+
+ 0xFEB0498: DB0300A8 stfd f24,168(r3)
+ 115: GETL R3, t80
+ 116: ADDL $0xA8, t80
+ 117: FPU_WQ 0x0:0x18, (t80)
+ 118: INCEIPL $4
+
+ 0xFEB049C: 93230038 stw r25,56(r3)
+ 119: GETL R25, t82
+ 120: GETL R3, t84
+ 121: ADDL $0x38, t84
+ 122: STL t82, (t84)
+ 123: INCEIPL $4
+
+ 0xFEB04A0: DB2300B0 stfd f25,176(r3)
+ 124: GETL R3, t86
+ 125: ADDL $0xB0, t86
+ 126: FPU_WQ 0x0:0x19, (t86)
+ 127: INCEIPL $4
+
+ 0xFEB04A4: 9343003C stw r26,60(r3)
+ 128: GETL R26, t88
+ 129: GETL R3, t90
+ 130: ADDL $0x3C, t90
+ 131: STL t88, (t90)
+ 132: INCEIPL $4
+
+ 0xFEB04A8: DB4300B8 stfd f26,184(r3)
+ 133: GETL R3, t92
+ 134: ADDL $0xB8, t92
+ 135: FPU_WQ 0x0:0x1A, (t92)
+ 136: INCEIPL $4
+
+ 0xFEB04AC: 93630040 stw r27,64(r3)
+ 137: GETL R27, t94
+ 138: GETL R3, t96
+ 139: ADDL $0x40, t96
+ 140: STL t94, (t96)
+ 141: INCEIPL $4
+
+ 0xFEB04B0: DB6300C0 stfd f27,192(r3)
+ 142: GETL R3, t98
+ 143: ADDL $0xC0, t98
+ 144: FPU_WQ 0x0:0x1B, (t98)
+ 145: INCEIPL $4
+
+ 0xFEB04B4: 93830044 stw r28,68(r3)
+ 146: GETL R28, t100
+ 147: GETL R3, t102
+ 148: ADDL $0x44, t102
+ 149: STL t100, (t102)
+ 150: INCEIPL $4
+
+ 0xFEB04B8: DB8300C8 stfd f28,200(r3)
+ 151: GETL R3, t104
+ 152: ADDL $0xC8, t104
+ 153: FPU_WQ 0x0:0x1C, (t104)
+ 154: INCEIPL $4
+
+ 0xFEB04BC: 93A30048 stw r29,72(r3)
+ 155: GETL R29, t106
+ 156: GETL R3, t108
+ 157: ADDL $0x48, t108
+ 158: STL t106, (t108)
+ 159: INCEIPL $4
+
+ 0xFEB04C0: DBA300D0 stfd f29,208(r3)
+ 160: GETL R3, t110
+ 161: ADDL $0xD0, t110
+ 162: FPU_WQ 0x0:0x1D, (t110)
+ 163: INCEIPL $4
+
+ 0xFEB04C4: 93C3004C stw r30,76(r3)
+ 164: GETL R30, t112
+ 165: GETL R3, t114
+ 166: ADDL $0x4C, t114
+ 167: STL t112, (t114)
+ 168: INCEIPL $4
+
+ 0xFEB04C8: DBC300D8 stfd f30,216(r3)
+ 169: GETL R3, t116
+ 170: ADDL $0xD8, t116
+ 171: FPU_WQ 0x0:0x1E, (t116)
+ 172: INCEIPL $4
+
+ 0xFEB04CC: 93E30050 stw r31,80(r3)
+ 173: GETL R31, t118
+ 174: GETL R3, t120
+ 175: ADDL $0x50, t120
+ 176: STL t118, (t120)
+ 177: INCEIPL $4
+
+ 0xFEB04D0: DBE300E0 stfd f31,224(r3)
+ 178: GETL R3, t122
+ 179: ADDL $0xE0, t122
+ 180: FPU_WQ 0x0:0x1F, (t122)
+ 181: INCEIPL $4
+
+ 0xFEB04D4: 7CC802A6 mflr r6
+ 182: GETL LR, t124
+ 183: PUTL t124, R6
+ 184: INCEIPL $4
+
+ 0xFEB04D8: 48117979 bl 0xFFC7E50
+ 185: MOVL $0xFEB04DC, t126
+ 186: PUTL t126, LR
+ 187: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FEB0430 172
+. 90 23 00 00 7C 08 02 A6 91 C3 00 0C D9 C3 00 58 90 03 00 08 91 E3 00 10 D9 E3 00 60 7C 00 00 26 92 03 00 14 DA 03 00 68 90 03 00 54 92 23 00 18 DA 23 00 70 92 43 00 1C DA 43 00 78 92 63 00 20 DA 63 00 80 92 83 00 24 DA 83 00 88 92 A3 00 28 DA A3 00 90 92 C3 00 2C DA C3 00 98 92 E3 00 30 DA E3 00 A0 93 03 00 34 DB 03 00 A8 93 23 00 38 DB 23 00 B0 93 43 00 3C DB 43 00 B8 93 63 00 40 DB 63 00 C0 93 83 00 44 DB 83 00 C8 93 A3 00 48 DB A3 00 D0 93 C3 00 4C DB C3 00 D8 93 E3 00 50 DB E3 00 E0 7C C8 02 A6 48 11 79 79
+
+==== BB 1373 (0xFEB04DC) approx BBs exec'd 0 ====
+
+ 0xFEB04DC: 7CA802A6 mflr r5
+ 0: GETL LR, t0
+ 1: PUTL t0, R5
+ 2: INCEIPL $4
+
+ 0xFEB04E0: 80A51BC8 lwz r5,7112(r5)
+ 3: GETL R5, t2
+ 4: ADDL $0x1BC8, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R5
+ 7: INCEIPL $4
+
+ 0xFEB04E4: 7CC803A6 mtlr r6
+ 8: GETL R6, t6
+ 9: PUTL t6, LR
+ 10: INCEIPL $4
+
+ 0xFEB04E8: 80A5003C lwz r5,60(r5)
+ 11: GETL R5, t8
+ 12: ADDL $0x3C, t8
+ 13: LDL (t8), t10
+ 14: PUTL t10, R5
+ 15: INCEIPL $4
+
+ 0xFEB04EC: 74A51000 andis. r5,r5,0x1000
+ 16: GETL R5, t12
+ 17: ANDL $0x10000000, t12
+ 18: PUTL t12, R5
+ 19: CMP0L t12, t14 (-rSo)
+ 20: ICRFL t14, $0x0, CR
+ 21: INCEIPL $4
+
+ 0xFEB04F0: 41820158 bc 12,2,0xFEB0648
+ 22: Js02o $0xFEB0648
+
+
+. 0 FEB04DC 24
+. 7C A8 02 A6 80 A5 1B C8 7C C8 03 A6 80 A5 00 3C 74 A5 10 00 41 82 01 58
+
+==== BB 1374 (0xFEB0648) approx BBs exec'd 0 ====
+
+ 0xFEB0648: 480000AC b 0xFEB06F4
+ 0: JMPo $0xFEB06F4 ($4)
+
+
+. 0 FEB0648 4
+. 48 00 00 AC
+
+==== BB 1375 __vmx__sigjmp_save(0xFEB06F4) approx BBs exec'd 0 ====
+
+ 0xFEB06F4: 2F840000 cmpi cr7,r4,0
+ 0: GETL R4, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFEB06F8: 7C0802A6 mflr r0
+ 4: GETL LR, t4
+ 5: PUTL t4, R0
+ 6: INCEIPL $4
+
+ 0xFEB06FC: 9421FFE0 stwu r1,-32(r1)
+ 7: GETL R1, t6
+ 8: GETL R1, t8
+ 9: ADDL $0xFFFFFFE0, t8
+ 10: PUTL t8, R1
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEB0700: 38A301C4 addi r5,r3,452
+ 13: GETL R3, t10
+ 14: ADDL $0x1C4, t10
+ 15: PUTL t10, R5
+ 16: INCEIPL $4
+
+ 0xFEB0704: 93A10014 stw r29,20(r1)
+ 17: GETL R29, t12
+ 18: GETL R1, t14
+ 19: ADDL $0x14, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0xFEB0708: 38800000 li r4,0
+ 22: MOVL $0x0, t16
+ 23: PUTL t16, R4
+ 24: INCEIPL $4
+
+ 0xFEB070C: 93E1001C stw r31,28(r1)
+ 25: GETL R31, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFEB0710: 3BA00000 li r29,0
+ 30: MOVL $0x0, t22
+ 31: PUTL t22, R29
+ 32: INCEIPL $4
+
+ 0xFEB0714: 7C7F1B78 or r31,r3,r3
+ 33: GETL R3, t24
+ 34: PUTL t24, R31
+ 35: INCEIPL $4
+
+ 0xFEB0718: 93C10018 stw r30,24(r1)
+ 36: GETL R30, t26
+ 37: GETL R1, t28
+ 38: ADDL $0x18, t28
+ 39: STL t26, (t28)
+ 40: INCEIPL $4
+
+ 0xFEB071C: 90010024 stw r0,36(r1)
+ 41: GETL R0, t30
+ 42: GETL R1, t32
+ 43: ADDL $0x24, t32
+ 44: STL t30, (t32)
+ 45: INCEIPL $4
+
+ 0xFEB0720: 38600000 li r3,0
+ 46: MOVL $0x0, t34
+ 47: PUTL t34, R3
+ 48: INCEIPL $4
+
+ 0xFEB0724: 409E0028 bc 4,30,0xFEB074C
+ 49: Jc30o $0xFEB074C
+
+
+. 0 FEB06F4 52
+. 2F 84 00 00 7C 08 02 A6 94 21 FF E0 38 A3 01 C4 93 A1 00 14 38 80 00 00 93 E1 00 1C 3B A0 00 00 7C 7F 1B 78 93 C1 00 18 90 01 00 24 38 60 00 00 40 9E 00 28
+
+==== BB 1376 (0xFEB0728) approx BBs exec'd 0 ====
+
+ 0xFEB0728: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFEB072C: 38600000 li r3,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEB0730: 93BF01C0 stw r29,448(r31)
+ 8: GETL R29, t6
+ 9: GETL R31, t8
+ 10: ADDL $0x1C0, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEB0734: 83A10014 lwz r29,20(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x14, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R29
+ 17: INCEIPL $4
+
+ 0xFEB0738: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFEB073C: 83C10018 lwz r30,24(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x18, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R30
+ 25: INCEIPL $4
+
+ 0xFEB0740: 83E1001C lwz r31,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0xFEB0744: 38210020 addi r1,r1,32
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0xFEB0748: 4E800020 blr
+ 35: GETL LR, t26
+ 36: JMPo-r t26 ($4)
+
+
+. 0 FEB0728 36
+. 80 81 00 24 38 60 00 00 93 BF 01 C0 83 A1 00 14 7C 88 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 1377 (0xFE9B800) approx BBs exec'd 0 ====
+
+ 0xFE9B800: 2C830000 cmpi cr1,r3,0
+ 0: GETL R3, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x1, CR
+ 3: INCEIPL $4
+
+ 0xFE9B804: 40860068 bc 4,6,0xFE9B86C
+ 4: Jc06o $0xFE9B86C
+
+
+. 0 FE9B800 8
+. 2C 83 00 00 40 86 00 68
+
+==== BB 1378 (0xFE9B808) approx BBs exec'd 0 ====
+
+ 0xFE9B808: 83A28BF4 lwz r29,-29708(r2)
+ 0: GETL R2, t0
+ 1: ADDL $0xFFFF8BF4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R29
+ 4: INCEIPL $4
+
+ 0xFE9B80C: 3B610010 addi r27,r1,16
+ 5: GETL R1, t4
+ 6: ADDL $0x10, t4
+ 7: PUTL t4, R27
+ 8: INCEIPL $4
+
+ 0xFE9B810: 819E1B84 lwz r12,7044(r30)
+ 9: GETL R30, t6
+ 10: ADDL $0x1B84, t6
+ 11: LDL (t6), t8
+ 12: PUTL t8, R12
+ 13: INCEIPL $4
+
+ 0xFE9B814: 93A101E0 stw r29,480(r1)
+ 14: GETL R29, t10
+ 15: GETL R1, t12
+ 16: ADDL $0x1E0, t12
+ 17: STL t10, (t12)
+ 18: INCEIPL $4
+
+ 0xFE9B818: 83828BF0 lwz r28,-29712(r2)
+ 19: GETL R2, t14
+ 20: ADDL $0xFFFF8BF0, t14
+ 21: LDL (t14), t16
+ 22: PUTL t16, R28
+ 23: INCEIPL $4
+
+ 0xFE9B81C: 810101F0 lwz r8,496(r1)
+ 24: GETL R1, t18
+ 25: ADDL $0x1F0, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R8
+ 28: INCEIPL $4
+
+ 0xFE9B820: 938101E4 stw r28,484(r1)
+ 29: GETL R28, t22
+ 30: GETL R1, t24
+ 31: ADDL $0x1E4, t24
+ 32: STL t22, (t24)
+ 33: INCEIPL $4
+
+ 0xFE9B824: 806101F4 lwz r3,500(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x1F4, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R3
+ 38: INCEIPL $4
+
+ 0xFE9B828: 7D0803A6 mtlr r8
+ 39: GETL R8, t30
+ 40: PUTL t30, LR
+ 41: INCEIPL $4
+
+ 0xFE9B82C: 93628BF4 stw r27,-29708(r2)
+ 42: GETL R27, t32
+ 43: GETL R2, t34
+ 44: ADDL $0xFFFF8BF4, t34
+ 45: STL t32, (t34)
+ 46: INCEIPL $4
+
+ 0xFE9B830: 808101F8 lwz r4,504(r1)
+ 47: GETL R1, t36
+ 48: ADDL $0x1F8, t36
+ 49: LDL (t36), t38
+ 50: PUTL t38, R4
+ 51: INCEIPL $4
+
+ 0xFE9B834: 80AC0000 lwz r5,0(r12)
+ 52: GETL R12, t40
+ 53: LDL (t40), t42
+ 54: PUTL t42, R5
+ 55: INCEIPL $4
+
+ 0xFE9B838: 80C101FC lwz r6,508(r1)
+ 56: GETL R1, t44
+ 57: ADDL $0x1FC, t44
+ 58: LDL (t44), t46
+ 59: PUTL t46, R6
+ 60: INCEIPL $4
+
+ 0xFE9B83C: 4E800021 blrl
+ 61: GETL LR, t48
+ 62: MOVL $0xFE9B840, t50
+ 63: PUTL t50, LR
+ 64: JMPo-r t48 ($4)
+
+
+. 0 FE9B808 56
+. 83 A2 8B F4 3B 61 00 10 81 9E 1B 84 93 A1 01 E0 83 82 8B F0 81 01 01 F0 93 81 01 E4 80 61 01 F4 7D 08 03 A6 93 62 8B F4 80 81 01 F8 80 AC 00 00 80 C1 01 FC 4E 80 00 21
+
+==== BB 1379 main(0x100003F0) approx BBs exec'd 0 ====
+
+ 0x100003F0: 38600000 li r3,0
+ 0: MOVL $0x0, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0x100003F4: 4E800020 blr
+ 3: GETL LR, t2
+ 4: JMPo-r t2 ($4)
+
+
+. 0 100003F0 8
+. 38 60 00 00 4E 80 00 20
+
+==== BB 1380 (0xFE9B840) approx BBs exec'd 0 ====
+
+ 0xFE9B840: 48018359 bl 0xFEB3B98
+ 0: MOVL $0xFE9B844, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0xFEB3B98 ($4)
+
+
+. 0 FE9B840 4
+. 48 01 83 59
+
+==== BB 1381 exit(0xFEB3B98) approx BBs exec'd 0 ====
+
+ 0xFEB3B98: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEB3B9C: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFEB3BA0: 481142B1 bl 0xFFC7E50
+ 9: MOVL $0xFEB3BA4, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FEB3B98 12
+. 94 21 FF E0 7C 08 02 A6 48 11 42 B1
+
+==== BB 1382 (0xFEB3BA4) approx BBs exec'd 0 ====
+
+ 0xFEB3BA4: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEB3BA8: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEB3BAC: 93E1001C stw r31,28(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x1C, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEB3BB0: 93810010 stw r28,16(r1)
+ 13: GETL R28, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x10, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEB3BB4: 7C7C1B78 or r28,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R28
+ 20: INCEIPL $4
+
+ 0xFEB3BB8: 93A10014 stw r29,20(r1)
+ 21: GETL R29, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEB3BBC: 83FE1AFC lwz r31,6908(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x1AFC, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0xFEB3BC0: 90010024 stw r0,36(r1)
+ 31: GETL R0, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x24, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0xFEB3BC4: 801F0000 lwz r0,0(r31)
+ 36: GETL R31, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R0
+ 39: INCEIPL $4
+
+ 0xFEB3BC8: 2F800000 cmpi cr7,r0,0
+ 40: GETL R0, t32
+ 41: CMP0L t32, t34 (-rSo)
+ 42: ICRFL t34, $0x7, CR
+ 43: INCEIPL $4
+
+ 0xFEB3BCC: 419E00CC bc 12,30,0xFEB3C98
+ 44: Js30o $0xFEB3C98
+
+
+. 0 FEB3BA4 44
+. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 93 81 00 10 7C 7C 1B 78 93 A1 00 14 83 FE 1A FC 90 01 00 24 80 1F 00 00 2F 80 00 00 41 9E 00 CC
+
+==== BB 1383 (0xFEB3BD0) approx BBs exec'd 0 ====
+
+ 0xFEB3BD0: 813F0000 lwz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFEB3BD4: 80690004 lwz r3,4(r9)
+ 4: GETL R9, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFEB3BD8: 2C030000 cmpi cr0,r3,0
+ 9: GETL R3, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x0, CR
+ 12: INCEIPL $4
+
+ 0xFEB3BDC: 41820078 bc 12,2,0xFEB3C54
+ 13: Js02o $0xFEB3C54
+
+
+. 0 FEB3BD0 16
+. 81 3F 00 00 80 69 00 04 2C 03 00 00 41 82 00 78
+
+==== BB 1384 (0xFEB3BE0) approx BBs exec'd 0 ====
+
+ 0xFEB3BE0: 7D2A4B78 or r10,r9,r9
+ 0: GETL R9, t0
+ 1: PUTL t0, R10
+ 2: INCEIPL $4
+
+ 0xFEB3BE4: 48000018 b 0xFEB3BFC
+ 3: JMPo $0xFEB3BFC ($4)
+
+
+. 0 FEB3BE0 8
+. 7D 2A 4B 78 48 00 00 18
+
+==== BB 1385 (0xFEB3BFC) approx BBs exec'd 0 ====
+
+ 0xFEB3BFC: 80AA0004 lwz r5,4(r10)
+ 0: GETL R10, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFEB3C00: 3925FFFF addi r9,r5,-1
+ 5: GETL R5, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R9
+ 8: INCEIPL $4
+
+ 0xFEB3C04: 55242036 rlwinm r4,r9,4,0,27
+ 9: GETL R9, t6
+ 10: SHLL $0x4, t6
+ 11: PUTL t6, R4
+ 12: INCEIPL $4
+
+ 0xFEB3C08: 912A0004 stw r9,4(r10)
+ 13: GETL R9, t8
+ 14: GETL R10, t10
+ 15: ADDL $0x4, t10
+ 16: STL t8, (t10)
+ 17: INCEIPL $4
+
+ 0xFEB3C0C: 7D645214 add r11,r4,r10
+ 18: GETL R4, t12
+ 19: GETL R10, t14
+ 20: ADDL t12, t14
+ 21: PUTL t14, R11
+ 22: INCEIPL $4
+
+ 0xFEB3C10: 800B0008 lwz r0,8(r11)
+ 23: GETL R11, t16
+ 24: ADDL $0x8, t16
+ 25: LDL (t16), t18
+ 26: PUTL t18, R0
+ 27: INCEIPL $4
+
+ 0xFEB3C14: 396B0008 addi r11,r11,8
+ 28: GETL R11, t20
+ 29: ADDL $0x8, t20
+ 30: PUTL t20, R11
+ 31: INCEIPL $4
+
+ 0xFEB3C18: 2F800003 cmpi cr7,r0,3
+ 32: GETL R0, t22
+ 33: MOVL $0x3, t26
+ 34: CMPL t22, t26, t24 (-rSo)
+ 35: ICRFL t24, $0x7, CR
+ 36: INCEIPL $4
+
+ 0xFEB3C1C: 419E0054 bc 12,30,0xFEB3C70
+ 37: Js30o $0xFEB3C70
+
+
+. 0 FEB3BFC 36
+. 80 AA 00 04 39 25 FF FF 55 24 20 36 91 2A 00 04 7D 64 52 14 80 0B 00 08 39 6B 00 08 2F 80 00 03 41 9E 00 54
+
+==== BB 1386 (0xFEB3C20) approx BBs exec'd 0 ====
+
+ 0xFEB3C20: 2C800002 cmpi cr1,r0,2
+ 0: GETL R0, t0
+ 1: MOVL $0x2, t4
+ 2: CMPL t0, t4, t2 (-rSo)
+ 3: ICRFL t2, $0x1, CR
+ 4: INCEIPL $4
+
+ 0xFEB3C24: 2F000004 cmpi cr6,r0,4
+ 5: GETL R0, t6
+ 6: MOVL $0x4, t10
+ 7: CMPL t6, t10, t8 (-rSo)
+ 8: ICRFL t8, $0x6, CR
+ 9: INCEIPL $4
+
+ 0xFEB3C28: 40BDFFC0 bc 5,29,0xFEB3BE8
+ 10: Jc29o $0xFEB3BE8
+
+
+. 0 FEB3C20 12
+. 2C 80 00 02 2F 00 00 04 40 BD FF C0
+
+==== BB 1387 (0xFEB3C2C) approx BBs exec'd 0 ====
+
+ 0xFEB3C2C: 409AFFC0 bc 4,26,0xFEB3BEC
+ 0: Jc26o $0xFEB3BEC
+
+
+. 0 FEB3C2C 4
+. 40 9A FF C0
+
+==== BB 1388 (0xFEB3C30) approx BBs exec'd 0 ====
+
+ 0xFEB3C30: 810B0004 lwz r8,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0xFEB3C34: 7F84E378 or r4,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R4
+ 7: INCEIPL $4
+
+ 0xFEB3C38: 806B0008 lwz r3,8(r11)
+ 8: GETL R11, t6
+ 9: ADDL $0x8, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R3
+ 12: INCEIPL $4
+
+ 0xFEB3C3C: 7D0903A6 mtctr r8
+ 13: GETL R8, t10
+ 14: PUTL t10, CTR
+ 15: INCEIPL $4
+
+ 0xFEB3C40: 4E800421 bctrl
+ 16: MOVL $0xFEB3C44, t12
+ 17: PUTL t12, LR
+ 18: GETL CTR, t14
+ 19: JMPo-c t14 ($4)
+
+
+. 0 FEB3C30 20
+. 81 0B 00 04 7F 84 E3 78 80 6B 00 08 7D 09 03 A6 4E 80 04 21
+
+==== BB 1389 __libc_csu_fini(0x1000048C) approx BBs exec'd 0 ====
+
+ 0x1000048C: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x10000490: 7CA802A6 mflr r5
+ 6: GETL LR, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x10000494: 429F0005 bcl 20,31,0x10000498
+ 9: MOVL $0x10000498, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0x10000498: 93C10018 stw r30,24(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x18, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0x1000049C: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0x100004A0: 93E1001C stw r31,28(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0x1C, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0x100004A4: 93A10014 stw r29,20(r1)
+ 25: GETL R29, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0x100004A8: 90A10024 stw r5,36(r1)
+ 30: GETL R5, t22
+ 31: GETL R1, t24
+ 32: ADDL $0x24, t24
+ 33: STL t22, (t24)
+ 34: INCEIPL $4
+
+ 0x100004AC: 809EFFF0 lwz r4,-16(r30)
+ 35: GETL R30, t26
+ 36: ADDL $0xFFFFFFF0, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R4
+ 39: INCEIPL $4
+
+ 0x100004B0: 7FC4F214 add r30,r4,r30
+ 40: GETL R4, t30
+ 41: GETL R30, t32
+ 42: ADDL t30, t32
+ 43: PUTL t32, R30
+ 44: INCEIPL $4
+
+ 0x100004B4: 817E800C lwz r11,-32756(r30)
+ 45: GETL R30, t34
+ 46: ADDL $0xFFFF800C, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R11
+ 49: INCEIPL $4
+
+ 0x100004B8: 807E8008 lwz r3,-32760(r30)
+ 50: GETL R30, t38
+ 51: ADDL $0xFFFF8008, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R3
+ 54: INCEIPL $4
+
+ 0x100004BC: 7C0B1850 subf r0,r11,r3
+ 55: GETL R11, t42
+ 56: GETL R3, t44
+ 57: SUBL t42, t44
+ 58: PUTL t44, R0
+ 59: INCEIPL $4
+
+ 0x100004C0: 7C091670 srawi r9,r0,2
+ 60: GETL R0, t46
+ 61: SARL $0x2, t46 (-wCa)
+ 62: PUTL t46, R9
+ 63: INCEIPL $4
+
+ 0x100004C4: 2F890000 cmpi cr7,r9,0
+ 64: GETL R9, t48
+ 65: CMP0L t48, t50 (-rSo)
+ 66: ICRFL t50, $0x7, CR
+ 67: INCEIPL $4
+
+ 0x100004C8: 3BE9FFFF addi r31,r9,-1
+ 68: GETL R9, t52
+ 69: ADDL $0xFFFFFFFF, t52
+ 70: PUTL t52, R31
+ 71: INCEIPL $4
+
+ 0x100004CC: 419E0028 bc 12,30,0x100004F4
+ 72: Js30o $0x100004F4
+
+
+. 0 1000048C 68
+. 94 21 FF E0 7C A8 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 93 A1 00 14 90 A1 00 24 80 9E FF F0 7F C4 F2 14 81 7E 80 0C 80 7E 80 08 7C 0B 18 50 7C 09 16 70 2F 89 00 00 3B E9 FF FF 41 9E 00 28
+
+==== BB 1390 (0x100004F4) approx BBs exec'd 0 ====
+
+ 0x100004F4: 48000269 bl 0x1000075C
+ 0: MOVL $0x100004F8, t0
+ 1: PUTL t0, LR
+ 2: JMPo-c $0x1000075C ($4)
+
+
+. 0 100004F4 4
+. 48 00 02 69
+
+==== BB 1391 (0x1000075C) approx BBs exec'd 0 ====
+
+ 0x1000075C: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x10000760: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x10000764: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x10000768: 4BFFFB9D bl 0x10000304
+ 14: MOVL $0x1000076C, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0x10000304 ($4)
+
+
+. 0 1000075C 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 4B FF FB 9D
+
+==== BB 1392 (0x10000304) approx BBs exec'd 0 ====
+
+ 0x10000304: 7C0802A6 mflr r0
+ 0: GETL LR, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x10000308: 9421FFF0 stwu r1,-16(r1)
+ 3: GETL R1, t2
+ 4: GETL R1, t4
+ 5: ADDL $0xFFFFFFF0, t4
+ 6: PUTL t4, R1
+ 7: STL t2, (t4)
+ 8: INCEIPL $4
+
+ 0x1000030C: 93C10008 stw r30,8(r1)
+ 9: GETL R30, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x8, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x10000310: 3FC01001 lis r30,4097
+ 14: MOVL $0x10010000, t10
+ 15: PUTL t10, R30
+ 16: INCEIPL $4
+
+ 0x10000314: 93E1000C stw r31,12(r1)
+ 17: GETL R31, t12
+ 18: GETL R1, t14
+ 19: ADDL $0xC, t14
+ 20: STL t12, (t14)
+ 21: INCEIPL $4
+
+ 0x10000318: 90010014 stw r0,20(r1)
+ 22: GETL R0, t16
+ 23: GETL R1, t18
+ 24: ADDL $0x14, t18
+ 25: STL t16, (t18)
+ 26: INCEIPL $4
+
+ 0x1000031C: 881E08F0 lbz r0,2288(r30)
+ 27: MOVL $0x100108F0, t20
+ 28: LDB (t20), t22
+ 29: PUTL t22, R0
+ 30: INCEIPL $4
+
+ 0x10000320: 2F800000 cmpi cr7,r0,0
+ 31: GETL R0, t24
+ 32: CMP0L t24, t26 (-rSo)
+ 33: ICRFL t26, $0x7, CR
+ 34: INCEIPL $4
+
+ 0x10000324: 409E0034 bc 4,30,0x10000358
+ 35: Jc30o $0x10000358
+
+
+. 0 10000304 36
+. 7C 08 02 A6 94 21 FF F0 93 C1 00 08 3F C0 10 01 93 E1 00 0C 90 01 00 14 88 1E 08 F0 2F 80 00 00 40 9E 00 34
+
+==== BB 1393 (0x10000328) approx BBs exec'd 0 ====
+
+ 0x10000328: 3FE01001 lis r31,4097
+ 0: MOVL $0x10010000, t0
+ 1: PUTL t0, R31
+ 2: INCEIPL $4
+
+ 0x1000032C: 48000014 b 0x10000340
+ 3: JMPo $0x10000340 ($4)
+
+
+. 0 10000328 8
+. 3F E0 10 01 48 00 00 14
+
+==== BB 1394 (0x10000340) approx BBs exec'd 0 ====
+
+ 0x10000340: 817F0884 lwz r11,2180(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x884, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x10000344: 812B0000 lwz r9,0(r11)
+ 5: GETL R11, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R9
+ 8: INCEIPL $4
+
+ 0x10000348: 2F890000 cmpi cr7,r9,0
+ 9: GETL R9, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x7, CR
+ 12: INCEIPL $4
+
+ 0x1000034C: 409EFFE4 bc 4,30,0x10000330
+ 13: Jc30o $0x10000330
+
+
+. 0 10000340 16
+. 81 7F 08 84 81 2B 00 00 2F 89 00 00 40 9E FF E4
+
+==== BB 1395 (0x10000350) approx BBs exec'd 0 ====
+
+ 0x10000350: 38000001 li r0,1
+ 0: MOVL $0x1, t0
+ 1: PUTL t0, R0
+ 2: INCEIPL $4
+
+ 0x10000354: 981E08F0 stb r0,2288(r30)
+ 3: GETL R0, t2
+ 4: GETL R30, t4
+ 5: ADDL $0x8F0, t4
+ 6: STB t2, (t4)
+ 7: INCEIPL $4
+
+ 0x10000358: 80010014 lwz r0,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R0
+ 12: INCEIPL $4
+
+ 0x1000035C: 83C10008 lwz r30,8(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0x10000360: 83E1000C lwz r31,12(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0xC, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R31
+ 22: INCEIPL $4
+
+ 0x10000364: 7C0803A6 mtlr r0
+ 23: GETL R0, t18
+ 24: PUTL t18, LR
+ 25: INCEIPL $4
+
+ 0x10000368: 38210010 addi r1,r1,16
+ 26: GETL R1, t20
+ 27: ADDL $0x10, t20
+ 28: PUTL t20, R1
+ 29: INCEIPL $4
+
+ 0x1000036C: 4E800020 blr
+ 30: GETL LR, t22
+ 31: JMPo-r t22 ($4)
+
+
+. 0 10000350 32
+. 38 00 00 01 98 1E 08 F0 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+
+==== BB 1396 (0x1000076C) approx BBs exec'd 0 ====
+
+ 0x1000076C: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0x10000770: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0x10000774: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0x10000778: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+. 0 1000076C 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+
+==== BB 1397 (0x100004F8) approx BBs exec'd 0 ====
+
+ 0x100004F8: 81010024 lwz r8,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x100004FC: 83A10014 lwz r29,20(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x14, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x10000500: 83C10018 lwz r30,24(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0x18, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R30
+ 14: INCEIPL $4
+
+ 0x10000504: 7D0803A6 mtlr r8
+ 15: GETL R8, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0x10000508: 83E1001C lwz r31,28(r1)
+ 18: GETL R1, t14
+ 19: ADDL $0x1C, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R31
+ 22: INCEIPL $4
+
+ 0x1000050C: 38210020 addi r1,r1,32
+ 23: GETL R1, t18
+ 24: ADDL $0x20, t18
+ 25: PUTL t18, R1
+ 26: INCEIPL $4
+
+ 0x10000510: 4E800020 blr
+ 27: GETL LR, t20
+ 28: JMPo-r t20 ($4)
+
+
+. 0 100004F8 28
+. 81 01 00 24 83 A1 00 14 83 C1 00 18 7D 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 1398 (0xFEB3C44) approx BBs exec'd 0 ====
+
+ 0xFEB3C44: 815F0000 lwz r10,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFEB3C48: 818A0004 lwz r12,4(r10)
+ 4: GETL R10, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R12
+ 8: INCEIPL $4
+
+ 0xFEB3C4C: 2C8C0000 cmpi cr1,r12,0
+ 9: GETL R12, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x1, CR
+ 12: INCEIPL $4
+
+ 0xFEB3C50: 4086FFAC bc 4,6,0xFEB3BFC
+ 13: Jc06o $0xFEB3BFC
+
+
+. 0 FEB3C44 16
+. 81 5F 00 00 81 8A 00 04 2C 8C 00 00 40 86 FF AC
+
+==== BB 1399 _dl_fini(0x2547BAE0) approx BBs exec'd 0 ====
+
+ 0x2547BAE0: 9421FFA0 stwu r1,-96(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFA0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0x2547BAE4: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0x2547BAE8: 4801B519 bl 0x25497000
+ 9: MOVL $0x2547BAEC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0x25497000 ($4)
+
+
+. 0 2547BAE0 12
+. 94 21 FF A0 7C 08 02 A6 48 01 B5 19
+
+==== BB 1400 (0x2547BAEC) approx BBs exec'd 0 ====
+
+ 0x2547BAEC: 93C10058 stw r30,88(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x58, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0x2547BAF0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0x2547BAF4: 7D800026 mfcr r12
+ 8: GETL CR, t6
+ 9: PUTL t6, R12
+ 10: INCEIPL $4
+
+ 0x2547BAF8: 91C10018 stw r14,24(r1)
+ 11: GETL R14, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x18, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0x2547BAFC: 92410028 stw r18,40(r1)
+ 16: GETL R18, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x28, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0x2547BB00: 81DE04F4 lwz r14,1268(r30)
+ 21: GETL R30, t16
+ 22: ADDL $0x4F4, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R14
+ 25: INCEIPL $4
+
+ 0x2547BB04: 825E04C8 lwz r18,1224(r30)
+ 26: GETL R30, t20
+ 27: ADDL $0x4C8, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R18
+ 30: INCEIPL $4
+
+ 0x2547BB08: 91E1001C stw r15,28(r1)
+ 31: GETL R15, t24
+ 32: GETL R1, t26
+ 33: ADDL $0x1C, t26
+ 34: STL t24, (t26)
+ 35: INCEIPL $4
+
+ 0x2547BB0C: 39E0000F li r15,15
+ 36: MOVL $0xF, t28
+ 37: PUTL t28, R15
+ 38: INCEIPL $4
+
+ 0x2547BB10: 92010020 stw r16,32(r1)
+ 39: GETL R16, t30
+ 40: GETL R1, t32
+ 41: ADDL $0x20, t32
+ 42: STL t30, (t32)
+ 43: INCEIPL $4
+
+ 0x2547BB14: 3A000000 li r16,0
+ 44: MOVL $0x0, t34
+ 45: PUTL t34, R16
+ 46: INCEIPL $4
+
+ 0x2547BB18: 92210024 stw r17,36(r1)
+ 47: GETL R17, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x24, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0x2547BB1C: 3A200168 li r17,360
+ 52: MOVL $0x168, t40
+ 53: PUTL t40, R17
+ 54: INCEIPL $4
+
+ 0x2547BB20: 92C10038 stw r22,56(r1)
+ 55: GETL R22, t42
+ 56: GETL R1, t44
+ 57: ADDL $0x38, t44
+ 58: STL t42, (t44)
+ 59: INCEIPL $4
+
+ 0x2547BB24: 3AC00000 li r22,0
+ 60: MOVL $0x0, t46
+ 61: PUTL t46, R22
+ 62: INCEIPL $4
+
+ 0x2547BB28: 93E1005C stw r31,92(r1)
+ 63: GETL R31, t48
+ 64: GETL R1, t50
+ 65: ADDL $0x5C, t50
+ 66: STL t48, (t50)
+ 67: INCEIPL $4
+
+ 0x2547BB2C: 7C3F0B78 or r31,r1,r1
+ 68: GETL R1, t52
+ 69: PUTL t52, R31
+ 70: INCEIPL $4
+
+ 0x2547BB30: 9261002C stw r19,44(r1)
+ 71: GETL R19, t54
+ 72: GETL R1, t56
+ 73: ADDL $0x2C, t56
+ 74: STL t54, (t56)
+ 75: INCEIPL $4
+
+ 0x2547BB34: 92810030 stw r20,48(r1)
+ 76: GETL R20, t58
+ 77: GETL R1, t60
+ 78: ADDL $0x30, t60
+ 79: STL t58, (t60)
+ 80: INCEIPL $4
+
+ 0x2547BB38: 92A10034 stw r21,52(r1)
+ 81: GETL R21, t62
+ 82: GETL R1, t64
+ 83: ADDL $0x34, t64
+ 84: STL t62, (t64)
+ 85: INCEIPL $4
+
+ 0x2547BB3C: 92E1003C stw r23,60(r1)
+ 86: GETL R23, t66
+ 87: GETL R1, t68
+ 88: ADDL $0x3C, t68
+ 89: STL t66, (t68)
+ 90: INCEIPL $4
+
+ 0x2547BB40: 93010040 stw r24,64(r1)
+ 91: GETL R24, t70
+ 92: GETL R1, t72
+ 93: ADDL $0x40, t72
+ 94: STL t70, (t72)
+ 95: INCEIPL $4
+
+ 0x2547BB44: 93210044 stw r25,68(r1)
+ 96: GETL R25, t74
+ 97: GETL R1, t76
+ 98: ADDL $0x44, t76
+ 99: STL t74, (t76)
+ 100: INCEIPL $4
+
+ 0x2547BB48: 93410048 stw r26,72(r1)
+ 101: GETL R26, t78
+ 102: GETL R1, t80
+ 103: ADDL $0x48, t80
+ 104: STL t78, (t80)
+ 105: INCEIPL $4
+
+ 0x2547BB4C: 9361004C stw r27,76(r1)
+ 106: GETL R27, t82
+ 107: GETL R1, t84
+ 108: ADDL $0x4C, t84
+ 109: STL t82, (t84)
+ 110: INCEIPL $4
+
+ 0x2547BB50: 93810050 stw r28,80(r1)
+ 111: GETL R28, t86
+ 112: GETL R1, t88
+ 113: ADDL $0x50, t88
+ 114: STL t86, (t88)
+ 115: INCEIPL $4
+
+ 0x2547BB54: 93A10054 stw r29,84(r1)
+ 116: GETL R29, t90
+ 117: GETL R1, t92
+ 118: ADDL $0x54, t92
+ 119: STL t90, (t92)
+ 120: INCEIPL $4
+
+ 0x2547BB58: 90010064 stw r0,100(r1)
+ 121: GETL R0, t94
+ 122: GETL R1, t96
+ 123: ADDL $0x64, t96
+ 124: STL t94, (t96)
+ 125: INCEIPL $4
+
+ 0x2547BB5C: 91810014 stw r12,20(r1)
+ 126: GETL R12, t98
+ 127: GETL R1, t100
+ 128: ADDL $0x14, t100
+ 129: STL t98, (t100)
+ 130: INCEIPL $4
+
+ 0x2547BB60: 809203F8 lwz r4,1016(r18)
+ 131: GETL R18, t102
+ 132: ADDL $0x3F8, t102
+ 133: LDL (t102), t104
+ 134: PUTL t104, R4
+ 135: INCEIPL $4
+
+ 0x2547BB64: 38720180 addi r3,r18,384
+ 136: GETL R18, t106
+ 137: ADDL $0x180, t106
+ 138: PUTL t106, R3
+ 139: INCEIPL $4
+
+ 0x2547BB68: 7C8903A6 mtctr r4
+ 140: GETL R4, t108
+ 141: PUTL t108, CTR
+ 142: INCEIPL $4
+
+ 0x2547BB6C: 4E800421 bctrl
+ 143: MOVL $0x2547BB70, t110
+ 144: PUTL t110, LR
+ 145: GETL CTR, t112
+ 146: JMPo-c t112 ($4)
+
+
+. 0 2547BAEC 132
+. 93 C1 00 58 7F C8 02 A6 7D 80 00 26 91 C1 00 18 92 41 00 28 81 DE 04 F4 82 5E 04 C8 91 E1 00 1C 39 E0 00 0F 92 01 00 20 3A 00 00 00 92 21 00 24 3A 20 01 68 92 C1 00 38 3A C0 00 00 93 E1 00 5C 7C 3F 0B 78 92 61 00 2C 92 81 00 30 92 A1 00 34 92 E1 00 3C 93 01 00 40 93 21 00 44 93 41 00 48 93 61 00 4C 93 81 00 50 93 A1 00 54 90 01 00 64 91 81 00 14 80 92 03 F8 38 72 01 80 7C 89 03 A6 4E 80 04 21
+
+==== BB 1401 rtld_lock_default_lock_recursive(0x25471884) approx BBs exec'd 0 ====
+
+ 0x25471884: 80830004 lwz r4,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x25471888: 9421FFF0 stwu r1,-16(r1)
+ 5: GETL R1, t4
+ 6: GETL R1, t6
+ 7: ADDL $0xFFFFFFF0, t6
+ 8: PUTL t6, R1
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x2547188C: 39240001 addi r9,r4,1
+ 11: GETL R4, t8
+ 12: ADDL $0x1, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x25471890: 38210010 addi r1,r1,16
+ 15: GETL R1, t10
+ 16: ADDL $0x10, t10
+ 17: PUTL t10, R1
+ 18: INCEIPL $4
+
+ 0x25471894: 91230004 stw r9,4(r3)
+ 19: GETL R9, t12
+ 20: GETL R3, t14
+ 21: ADDL $0x4, t14
+ 22: STL t12, (t14)
+ 23: INCEIPL $4
+
+ 0x25471898: 4E800020 blr
+ 24: GETL LR, t16
+ 25: JMPo-r t16 ($4)
+
+
+. 0 25471884 24
+. 80 83 00 04 94 21 FF F0 39 24 00 01 38 21 00 10 91 23 00 04 4E 80 00 20
+
+==== BB 1402 (0x2547BB70) approx BBs exec'd 0 ====
+
+ 0x2547BB70: 7D319214 add r9,r17,r18
+ 0: GETL R17, t0
+ 1: GETL R18, t2
+ 2: ADDL t0, t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547BB74: 80690004 lwz r3,4(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547BB78: 546A103A rlwinm r10,r3,2,0,29
+ 10: GETL R3, t8
+ 11: SHLL $0x2, t8
+ 12: PUTL t8, R10
+ 13: INCEIPL $4
+
+ 0x2547BB7C: 7F8A8040 cmpl cr7,r10,r16
+ 14: GETL R10, t10
+ 15: GETL R16, t12
+ 16: CMPUL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2547BB80: 409D002C bc 4,29,0x2547BBAC
+ 19: Jc29o $0x2547BBAC
+
+
+. 0 2547BB70 20
+. 7D 31 92 14 80 69 00 04 54 6A 10 3A 7F 8A 80 40 40 9D 00 2C
+
+==== BB 1403 (0x2547BBAC) approx BBs exec'd 0 ====
+
+ 0x2547BBAC: 7D71902E lwzx r11,r17,r18
+ 0: GETL R18, t0
+ 1: GETL R17, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R11
+ 5: INCEIPL $4
+
+ 0x2547BBB0: 3AE00000 li r23,0
+ 6: MOVL $0x0, t6
+ 7: PUTL t6, R23
+ 8: INCEIPL $4
+
+ 0x2547BBB4: 2E0B0000 cmpi cr4,r11,0
+ 9: GETL R11, t8
+ 10: CMP0L t8, t10 (-rSo)
+ 11: ICRFL t10, $0x4, CR
+ 12: INCEIPL $4
+
+ 0x2547BBB8: 41920020 bc 12,18,0x2547BBD8
+ 13: Js18o $0x2547BBD8
+
+
+. 0 2547BBAC 16
+. 7D 71 90 2E 3A E0 00 00 2E 0B 00 00 41 92 00 20
+
+==== BB 1404 (0x2547BBD8) approx BBs exec'd 0 ====
+
+ 0x2547BBD8: 7EF3BB79 or. r19,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R19
+ 2: CMP0L t0, t2 (-rSo)
+ 3: ICRFL t2, $0x0, CR
+ 4: INCEIPL $4
+
+ 0x2547BBDC: 41820110 bc 12,2,0x2547BCEC
+ 5: Js02o $0x2547BCEC
+
+
+. 0 2547BBD8 8
+. 7E F3 BB 79 41 82 01 10
+
+==== BB 1405 (0x2547BCEC) approx BBs exec'd 0 ====
+
+ 0x2547BCEC: 80B203FC lwz r5,1020(r18)
+ 0: GETL R18, t0
+ 1: ADDL $0x3FC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547BCF0: 3B400000 li r26,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R26
+ 7: INCEIPL $4
+
+ 0x2547BCF4: 38720180 addi r3,r18,384
+ 8: GETL R18, t6
+ 9: ADDL $0x180, t6
+ 10: PUTL t6, R3
+ 11: INCEIPL $4
+
+ 0x2547BCF8: 7E1A9840 cmpl cr4,r26,r19
+ 12: GETL R26, t8
+ 13: GETL R19, t10
+ 14: CMPUL t8, t10, t12 (-rSo)
+ 15: ICRFL t12, $0x4, CR
+ 16: INCEIPL $4
+
+ 0x2547BCFC: 7CA903A6 mtctr r5
+ 17: GETL R5, t14
+ 18: PUTL t14, CTR
+ 19: INCEIPL $4
+
+ 0x2547BD00: 4E800421 bctrl
+ 20: MOVL $0x2547BD04, t16
+ 21: PUTL t16, LR
+ 22: GETL CTR, t18
+ 23: JMPo-c t18 ($4)
+
+
+. 0 2547BCEC 24
+. 80 B2 03 FC 3B 40 00 00 38 72 01 80 7E 1A 98 40 7C A9 03 A6 4E 80 04 21
+
+==== BB 1406 rtld_lock_default_unlock_recursive(0x2547189C) approx BBs exec'd 0 ====
+
+ 0x2547189C: 80830004 lwz r4,4(r3)
+ 0: GETL R3, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x254718A0: 9421FFF0 stwu r1,-16(r1)
+ 5: GETL R1, t4
+ 6: GETL R1, t6
+ 7: ADDL $0xFFFFFFF0, t6
+ 8: PUTL t6, R1
+ 9: STL t4, (t6)
+ 10: INCEIPL $4
+
+ 0x254718A4: 3924FFFF addi r9,r4,-1
+ 11: GETL R4, t8
+ 12: ADDL $0xFFFFFFFF, t8
+ 13: PUTL t8, R9
+ 14: INCEIPL $4
+
+ 0x254718A8: 38210010 addi r1,r1,16
+ 15: GETL R1, t10
+ 16: ADDL $0x10, t10
+ 17: PUTL t10, R1
+ 18: INCEIPL $4
+
+ 0x254718AC: 91230004 stw r9,4(r3)
+ 19: GETL R9, t12
+ 20: GETL R3, t14
+ 21: ADDL $0x4, t14
+ 22: STL t12, (t14)
+ 23: INCEIPL $4
+
+ 0x254718B0: 4E800020 blr
+ 24: GETL LR, t16
+ 25: JMPo-r t16 ($4)
+
+
+. 0 2547189C 24
+. 80 83 00 04 94 21 FF F0 39 24 FF FF 38 21 00 10 91 23 00 04 4E 80 00 20
+
+==== BB 1407 (0x2547BD04) approx BBs exec'd 0 ====
+
+ 0x2547BD04: 40900068 bc 4,16,0x2547BD6C
+ 0: Jc16o $0x2547BD6C
+
+
+. 0 2547BD04 4
+. 40 90 00 68
+
+==== BB 1408 (0x2547BD6C) approx BBs exec'd 0 ====
+
+ 0x2547BD6C: 35EFFFFF addic. r15,r15,-1
+ 0: GETL R15, t0
+ 1: ADCL $0xFFFFFFFF, t0 (-wCa)
+ 2: PUTL t0, R15
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x2547BD70: 3A31FFE8 addi r17,r17,-24
+ 6: GETL R17, t4
+ 7: ADDL $0xFFFFFFE8, t4
+ 8: PUTL t4, R17
+ 9: INCEIPL $4
+
+ 0x2547BD74: 4080FDEC bc 4,0,0x2547BB60
+ 10: Jc00o $0x2547BB60
+
+
+. 0 2547BD6C 12
+. 35 EF FF FF 3A 31 FF E8 40 80 FD EC
+
+==== BB 1409 (0x2547BB60) approx BBs exec'd 0 ====
+
+ 0x2547BB60: 809203F8 lwz r4,1016(r18)
+ 0: GETL R18, t0
+ 1: ADDL $0x3F8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547BB64: 38720180 addi r3,r18,384
+ 5: GETL R18, t4
+ 6: ADDL $0x180, t4
+ 7: PUTL t4, R3
+ 8: INCEIPL $4
+
+ 0x2547BB68: 7C8903A6 mtctr r4
+ 9: GETL R4, t6
+ 10: PUTL t6, CTR
+ 11: INCEIPL $4
+
+ 0x2547BB6C: 4E800421 bctrl
+ 12: MOVL $0x2547BB70, t8
+ 13: PUTL t8, LR
+ 14: GETL CTR, t10
+ 15: JMPo-c t10 ($4)
+
+
+. 0 2547BB60 16
+. 80 92 03 F8 38 72 01 80 7C 89 03 A6 4E 80 04 21
+
+==== BB 1410 (0x2547BB84) approx BBs exec'd 0 ====
+
+ 0x2547BB84: 2C100000 cmpi cr0,r16,0
+ 0: GETL R16, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0x2547BB88: 40820110 bc 4,2,0x2547BC98
+ 4: Jc02o $0x2547BC98
+
+
+. 0 2547BB84 8
+. 2C 10 00 00 40 82 01 10
+
+==== BB 1411 (0x2547BB8C) approx BBs exec'd 0 ====
+
+ 0x2547BB8C: 390A001E addi r8,r10,30
+ 0: GETL R10, t0
+ 1: ADDL $0x1E, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x2547BB90: 81610000 lwz r11,0(r1)
+ 4: GETL R1, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R11
+ 7: INCEIPL $4
+
+ 0x2547BB94: 55070036 rlwinm r7,r8,0,0,27
+ 8: GETL R8, t6
+ 9: ANDL $0xFFFFFFF0, t6
+ 10: PUTL t6, R7
+ 11: INCEIPL $4
+
+ 0x2547BB98: 7D505378 or r16,r10,r10
+ 12: GETL R10, t8
+ 13: PUTL t8, R16
+ 14: INCEIPL $4
+
+ 0x2547BB9C: 7CC700D0 neg r6,r7
+ 15: GETL R7, t10
+ 16: NEGL t10
+ 17: PUTL t10, R6
+ 18: INCEIPL $4
+
+ 0x2547BBA0: 7D61316E stwux r11,r1,r6
+ 19: GETL R6, t12
+ 20: GETL R1, t14
+ 21: ADDL t14, t12
+ 22: PUTL t12, R1
+ 23: GETL R11, t16
+ 24: STL t16, (t12)
+ 25: INCEIPL $4
+
+ 0x2547BBA4: 38A10017 addi r5,r1,23
+ 26: GETL R1, t18
+ 27: ADDL $0x17, t18
+ 28: PUTL t18, R5
+ 29: INCEIPL $4
+
+ 0x2547BBA8: 54B60036 rlwinm r22,r5,0,0,27
+ 30: GETL R5, t20
+ 31: ANDL $0xFFFFFFF0, t20
+ 32: PUTL t20, R22
+ 33: INCEIPL $4
+
+ 0x2547BBAC: 7D71902E lwzx r11,r17,r18
+ 34: GETL R18, t22
+ 35: GETL R17, t24
+ 36: ADDL t24, t22
+ 37: LDL (t22), t26
+ 38: PUTL t26, R11
+ 39: INCEIPL $4
+
+ 0x2547BBB0: 3AE00000 li r23,0
+ 40: MOVL $0x0, t28
+ 41: PUTL t28, R23
+ 42: INCEIPL $4
+
+ 0x2547BBB4: 2E0B0000 cmpi cr4,r11,0
+ 43: GETL R11, t30
+ 44: CMP0L t30, t32 (-rSo)
+ 45: ICRFL t32, $0x4, CR
+ 46: INCEIPL $4
+
+ 0x2547BBB8: 41920020 bc 12,18,0x2547BBD8
+ 47: Js18o $0x2547BBD8
+
+
+. 0 2547BB8C 48
+. 39 0A 00 1E 81 61 00 00 55 07 00 36 7D 50 53 78 7C C7 00 D0 7D 61 31 6E 38 A1 00 17 54 B6 00 36 7D 71 90 2E 3A E0 00 00 2E 0B 00 00 41 92 00 20
+
+==== BB 1412 (0x2547BBBC) approx BBs exec'd 0 ====
+
+ 0x2547BBBC: 834B0014 lwz r26,20(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0x2547BBC0: 56EA103A rlwinm r10,r23,2,0,29
+ 5: GETL R23, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R10
+ 8: INCEIPL $4
+
+ 0x2547BBC4: 7F1A5800 cmp cr6,r26,r11
+ 9: GETL R26, t6
+ 10: GETL R11, t8
+ 11: CMPL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0x2547BBC8: 419A0108 bc 12,26,0x2547BCD0
+ 14: Js26o $0x2547BCD0
+
+
+. 0 2547BBBC 16
+. 83 4B 00 14 56 EA 10 3A 7F 1A 58 00 41 9A 01 08
+
+==== BB 1413 (0x2547BCD0) approx BBs exec'd 0 ====
+
+ 0x2547BCD0: 836B0178 lwz r27,376(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x178, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x2547BCD4: 3AF70001 addi r23,r23,1
+ 5: GETL R23, t4
+ 6: ADDL $0x1, t4
+ 7: PUTL t4, R23
+ 8: INCEIPL $4
+
+ 0x2547BCD8: 7D6AB12E stwx r11,r10,r22
+ 9: GETL R22, t6
+ 10: GETL R10, t8
+ 11: ADDL t8, t6
+ 12: GETL R11, t10
+ 13: STL t10, (t6)
+ 14: INCEIPL $4
+
+ 0x2547BCDC: 395B0001 addi r10,r27,1
+ 15: GETL R27, t12
+ 16: ADDL $0x1, t12
+ 17: PUTL t12, R10
+ 18: INCEIPL $4
+
+ 0x2547BCE0: 914B0178 stw r10,376(r11)
+ 19: GETL R10, t14
+ 20: GETL R11, t16
+ 21: ADDL $0x178, t16
+ 22: STL t14, (t16)
+ 23: INCEIPL $4
+
+ 0x2547BCE4: 816B000C lwz r11,12(r11)
+ 24: GETL R11, t18
+ 25: ADDL $0xC, t18
+ 26: LDL (t18), t20
+ 27: PUTL t20, R11
+ 28: INCEIPL $4
+
+ 0x2547BCE8: 4BFFFEE8 b 0x2547BBD0
+ 29: JMPo $0x2547BBD0 ($4)
+
+
+. 0 2547BCD0 28
+. 83 6B 01 78 3A F7 00 01 7D 6A B1 2E 39 5B 00 01 91 4B 01 78 81 6B 00 0C 4B FF FE E8
+
+==== BB 1414 (0x2547BBD0) approx BBs exec'd 0 ====
+
+ 0x2547BBD0: 2E0B0000 cmpi cr4,r11,0
+ 0: GETL R11, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x2547BBD4: 4092FFE8 bc 4,18,0x2547BBBC
+ 4: Jc18o $0x2547BBBC
+
+
+. 0 2547BBD0 8
+. 2E 0B 00 00 40 92 FF E8
+
+==== BB 1415 (0x2547BBE0) approx BBs exec'd 0 ====
+
+ 0x2547BBE0: 2E0F0000 cmpi cr4,r15,0
+ 0: GETL R15, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x4, CR
+ 3: INCEIPL $4
+
+ 0x2547BBE4: 7F71902E lwzx r27,r17,r18
+ 4: GETL R18, t4
+ 5: GETL R17, t6
+ 6: ADDL t6, t4
+ 7: LDL (t4), t8
+ 8: PUTL t8, R27
+ 9: INCEIPL $4
+
+ 0x2547BBE8: 40920008 bc 4,18,0x2547BBF0
+ 10: Jc18o $0x2547BBF0
+
+
+. 0 2547BBE0 12
+. 2E 0F 00 00 7F 71 90 2E 40 92 00 08
+
+==== BB 1416 (0x2547BBEC) approx BBs exec'd 0 ====
+
+ 0x2547BBEC: 837B000C lwz r27,12(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0xC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R27
+ 4: INCEIPL $4
+
+ 0x2547BBF0: 2F9B0000 cmpi cr7,r27,0
+ 5: GETL R27, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547BBF4: 419E00F8 bc 12,30,0x2547BCEC
+ 9: Js30o $0x2547BCEC
+
+
+. 0 2547BBEC 12
+. 83 7B 00 0C 2F 9B 00 00 41 9E 00 F8
+
+==== BB 1417 (0x2547BBF8) approx BBs exec'd 0 ====
+
+ 0x2547BBF8: 839B0014 lwz r28,20(r27)
+ 0: GETL R27, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R28
+ 4: INCEIPL $4
+
+ 0x2547BBFC: 7C9CD800 cmp cr1,r28,r27
+ 5: GETL R28, t4
+ 6: GETL R27, t6
+ 7: CMPL t4, t6, t8 (-rSo)
+ 8: ICRFL t8, $0x1, CR
+ 9: INCEIPL $4
+
+ 0x2547BC00: 4086FFEC bc 4,6,0x2547BBEC
+ 10: Jc06o $0x2547BBEC
+
+
+. 0 2547BBF8 12
+. 83 9B 00 14 7C 9C D8 00 40 86 FF EC
+
+==== BB 1418 (0x2547BC04) approx BBs exec'd 0 ====
+
+ 0x2547BC04: 7F200026 mfcr r25
+ 0: GETL CR, t0
+ 1: PUTL t0, R25
+ 2: INCEIPL $4
+
+ 0x2547BC08: 57399FFE rlwinm r25,r25,19,31,31
+ 3: GETL R25, t2
+ 4: ROLL $0x13, t2
+ 5: ANDL $0x1, t2
+ 6: PUTL t2, R25
+ 7: INCEIPL $4
+
+ 0x2547BC0C: 48000008 b 0x2547BC14
+ 8: JMPo $0x2547BC14 ($4)
+
+
+. 0 2547BC04 12
+. 7F 20 00 26 57 39 9F FE 48 00 00 08
+
+==== BB 1419 (0x2547BC14) approx BBs exec'd 0 ====
+
+ 0x2547BC14: 572C103A rlwinm r12,r25,2,0,29
+ 0: GETL R25, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0x2547BC18: 7FACB02E lwzx r29,r12,r22
+ 4: GETL R22, t2
+ 5: GETL R12, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0x2547BC1C: 7F1DD800 cmp cr6,r29,r27
+ 10: GETL R29, t8
+ 11: GETL R27, t10
+ 12: CMPL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x6, CR
+ 14: INCEIPL $4
+
+ 0x2547BC20: 409AFFF0 bc 4,26,0x2547BC10
+ 15: Jc26o $0x2547BC10
+
+
+. 0 2547BC14 16
+. 57 2C 10 3A 7F AC B0 2E 7F 1D D8 00 40 9A FF F0
+
+==== BB 1420 (0x2547BC24) approx BBs exec'd 0 ====
+
+ 0x2547BC24: 3B590001 addi r26,r25,1
+ 0: GETL R25, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x2547BC28: 7C1AB840 cmpl cr0,r26,r23
+ 4: GETL R26, t2
+ 5: GETL R23, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0x2547BC2C: 40A0FFC0 bc 5,0,0x2547BBEC
+ 9: Jc00o $0x2547BBEC
+
+
+. 0 2547BC24 12
+. 3B 59 00 01 7C 1A B8 40 40 A0 FF C0
+
+==== BB 1421 (0x2547BC30) approx BBs exec'd 0 ====
+
+ 0x2547BC30: 5720103A rlwinm r0,r25,2,0,29
+ 0: GETL R25, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R0
+ 3: INCEIPL $4
+
+ 0x2547BC34: 7C140378 or r20,r0,r0
+ 4: GETL R0, t2
+ 5: PUTL t2, R20
+ 6: INCEIPL $4
+
+ 0x2547BC38: 7EA0B214 add r21,r0,r22
+ 7: GETL R0, t4
+ 8: GETL R22, t6
+ 9: ADDL t4, t6
+ 10: PUTL t6, R21
+ 11: INCEIPL $4
+
+ 0x2547BC3C: 5758103A rlwinm r24,r26,2,0,29
+ 12: GETL R26, t8
+ 13: SHLL $0x2, t8
+ 14: PUTL t8, R24
+ 15: INCEIPL $4
+
+ 0x2547BC40: 7C78B02E lwzx r3,r24,r22
+ 16: GETL R22, t10
+ 17: GETL R24, t12
+ 18: ADDL t12, t10
+ 19: LDL (t10), t14
+ 20: PUTL t14, R3
+ 21: INCEIPL $4
+
+ 0x2547BC44: 816301E8 lwz r11,488(r3)
+ 22: GETL R3, t16
+ 23: ADDL $0x1E8, t16
+ 24: LDL (t16), t18
+ 25: PUTL t18, R11
+ 26: INCEIPL $4
+
+ 0x2547BC48: 2F8B0000 cmpi cr7,r11,0
+ 27: GETL R11, t20
+ 28: CMP0L t20, t22 (-rSo)
+ 29: ICRFL t22, $0x7, CR
+ 30: INCEIPL $4
+
+ 0x2547BC4C: 419E002C bc 12,30,0x2547BC78
+ 31: Js30o $0x2547BC78
+
+
+. 0 2547BC30 32
+. 57 20 10 3A 7C 14 03 78 7E A0 B2 14 57 58 10 3A 7C 78 B0 2E 81 63 01 E8 2F 8B 00 00 41 9E 00 2C
+
+==== BB 1422 (0x2547BC50) approx BBs exec'd 0 ====
+
+ 0x2547BC50: 812B0000 lwz r9,0(r11)
+ 0: GETL R11, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0x2547BC54: 2C890000 cmpi cr1,r9,0
+ 4: GETL R9, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x1, CR
+ 7: INCEIPL $4
+
+ 0x2547BC58: 41860020 bc 12,6,0x2547BC78
+ 8: Js06o $0x2547BC78
+
+
+. 0 2547BC50 12
+. 81 2B 00 00 2C 89 00 00 41 86 00 20
+
+==== BB 1423 (0x2547BC5C) approx BBs exec'd 0 ====
+
+ 0x2547BC5C: 7C99D050 subf r4,r25,r26
+ 0: GETL R25, t0
+ 1: GETL R26, t2
+ 2: SUBL t0, t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547BC60: 5485103A rlwinm r5,r4,2,0,29
+ 5: GETL R4, t4
+ 6: SHLL $0x2, t4
+ 7: PUTL t4, R5
+ 8: INCEIPL $4
+
+ 0x2547BC64: 7F09D800 cmp cr6,r9,r27
+ 9: GETL R9, t6
+ 10: GETL R27, t8
+ 11: CMPL t6, t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0x2547BC68: 419A0240 bc 12,26,0x2547BEA8
+ 14: Js26o $0x2547BEA8
+
+
+. 0 2547BC5C 16
+. 7C 99 D0 50 54 85 10 3A 7F 09 D8 00 41 9A 02 40
+
+==== BB 1424 (0x2547BC6C) approx BBs exec'd 0 ====
+
+ 0x2547BC6C: 852B0004 lwzu r9,4(r11)
+ 0: GETL R11, t0
+ 1: ADDL $0x4, t0
+ 2: PUTL t0, R11
+ 3: LDL (t0), t2
+ 4: PUTL t2, R9
+ 5: INCEIPL $4
+
+ 0x2547BC70: 2C090000 cmpi cr0,r9,0
+ 6: GETL R9, t4
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547BC74: 4082FFF0 bc 4,2,0x2547BC64
+ 10: Jc02o $0x2547BC64
+
+
+. 0 2547BC6C 12
+. 85 2B 00 04 2C 09 00 00 40 82 FF F0
+
+==== BB 1425 (0x2547BC64) approx BBs exec'd 0 ====
+
+ 0x2547BC64: 7F09D800 cmp cr6,r9,r27
+ 0: GETL R9, t0
+ 1: GETL R27, t2
+ 2: CMPL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x6, CR
+ 4: INCEIPL $4
+
+ 0x2547BC68: 419A0240 bc 12,26,0x2547BEA8
+ 5: Js26o $0x2547BEA8
+
+
+. 0 2547BC64 8
+. 7F 09 D8 00 41 9A 02 40
+
+==== BB 1426 (0x2547BC78) approx BBs exec'd 0 ====
+
+ 0x2547BC78: 7D38B02E lwzx r9,r24,r22
+ 0: GETL R22, t0
+ 1: GETL R24, t2
+ 2: ADDL t2, t0
+ 3: LDL (t0), t4
+ 4: PUTL t4, R9
+ 5: INCEIPL $4
+
+ 0x2547BC7C: 814901F4 lwz r10,500(r9)
+ 6: GETL R9, t6
+ 7: ADDL $0x1F4, t6
+ 8: LDL (t6), t8
+ 9: PUTL t8, R10
+ 10: INCEIPL $4
+
+ 0x2547BC80: 2F8A0000 cmpi cr7,r10,0
+ 11: GETL R10, t10
+ 12: CMP0L t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0x2547BC84: 409E0258 bc 4,30,0x2547BEDC
+ 15: Jc30o $0x2547BEDC
+
+
+. 0 2547BC78 16
+. 7D 38 B0 2E 81 49 01 F4 2F 8A 00 00 40 9E 02 58
+
+==== BB 1427 (0x2547BC88) approx BBs exec'd 0 ====
+
+ 0x2547BC88: 3B5A0001 addi r26,r26,1
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x2547BC8C: 7F1AB840 cmpl cr6,r26,r23
+ 4: GETL R26, t2
+ 5: GETL R23, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0x2547BC90: 4198FFAC bc 12,24,0x2547BC3C
+ 9: Js24o $0x2547BC3C
+
+
+. 0 2547BC88 12
+. 3B 5A 00 01 7F 1A B8 40 41 98 FF AC
+
+==== BB 1428 (0x2547BC3C) approx BBs exec'd 0 ====
+
+ 0x2547BC3C: 5758103A rlwinm r24,r26,2,0,29
+ 0: GETL R26, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R24
+ 3: INCEIPL $4
+
+ 0x2547BC40: 7C78B02E lwzx r3,r24,r22
+ 4: GETL R22, t2
+ 5: GETL R24, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547BC44: 816301E8 lwz r11,488(r3)
+ 10: GETL R3, t8
+ 11: ADDL $0x1E8, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547BC48: 2F8B0000 cmpi cr7,r11,0
+ 15: GETL R11, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x7, CR
+ 18: INCEIPL $4
+
+ 0x2547BC4C: 419E002C bc 12,30,0x2547BC78
+ 19: Js30o $0x2547BC78
+
+
+. 0 2547BC3C 20
+. 57 58 10 3A 7C 78 B0 2E 81 63 01 E8 2F 8B 00 00 41 9E 00 2C
+
+==== BB 1429 (0x2547BC94) approx BBs exec'd 0 ====
+
+ 0x2547BC94: 4BFFFF58 b 0x2547BBEC
+ 0: JMPo $0x2547BBEC ($4)
+
+
+. 0 2547BC94 4
+. 4B FF FF 58
+
+==== BB 1430 (0x2547BC10) approx BBs exec'd 0 ====
+
+ 0x2547BC10: 3B390001 addi r25,r25,1
+ 0: GETL R25, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R25
+ 3: INCEIPL $4
+
+ 0x2547BC14: 572C103A rlwinm r12,r25,2,0,29
+ 4: GETL R25, t2
+ 5: SHLL $0x2, t2
+ 6: PUTL t2, R12
+ 7: INCEIPL $4
+
+ 0x2547BC18: 7FACB02E lwzx r29,r12,r22
+ 8: GETL R22, t4
+ 9: GETL R12, t6
+ 10: ADDL t6, t4
+ 11: LDL (t4), t8
+ 12: PUTL t8, R29
+ 13: INCEIPL $4
+
+ 0x2547BC1C: 7F1DD800 cmp cr6,r29,r27
+ 14: GETL R29, t10
+ 15: GETL R27, t12
+ 16: CMPL t10, t12, t14 (-rSo)
+ 17: ICRFL t14, $0x6, CR
+ 18: INCEIPL $4
+
+ 0x2547BC20: 409AFFF0 bc 4,26,0x2547BC10
+ 19: Jc26o $0x2547BC10
+
+
+. 0 2547BC10 20
+. 3B 39 00 01 57 2C 10 3A 7F AC B0 2E 7F 1D D8 00 40 9A FF F0
+
+==== BB 1431 (0x2547BD08) approx BBs exec'd 0 ====
+
+ 0x2547BD08: 817E034C lwz r11,844(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x34C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0x2547BD0C: 832B0000 lwz r25,0(r11)
+ 5: GETL R11, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R25
+ 8: INCEIPL $4
+
+ 0x2547BD10: 48000030 b 0x2547BD40
+ 9: JMPo $0x2547BD40 ($4)
+
+
+. 0 2547BD08 12
+. 81 7E 03 4C 83 2B 00 00 48 00 00 30
+
+==== BB 1432 (0x2547BD40) approx BBs exec'd 0 ====
+
+ 0x2547BD40: 5748103A rlwinm r8,r26,2,0,29
+ 0: GETL R26, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R8
+ 3: INCEIPL $4
+
+ 0x2547BD44: 7F88B02E lwzx r28,r8,r22
+ 4: GETL R22, t2
+ 5: GETL R8, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R28
+ 9: INCEIPL $4
+
+ 0x2547BD48: 817C0180 lwz r11,384(r28)
+ 10: GETL R28, t8
+ 11: ADDL $0x180, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R11
+ 14: INCEIPL $4
+
+ 0x2547BD4C: 75601000 andis. r0,r11,0x1000
+ 15: GETL R11, t12
+ 16: ANDL $0x10000000, t12
+ 17: PUTL t12, R0
+ 18: CMP0L t12, t14 (-rSo)
+ 19: ICRFL t14, $0x0, CR
+ 20: INCEIPL $4
+
+ 0x2547BD50: 40A2FFC4 bc 5,2,0x2547BD14
+ 21: Jc02o $0x2547BD14
+
+
+. 0 2547BD40 20
+. 57 48 10 3A 7F 88 B0 2E 81 7C 01 80 75 60 10 00 40 A2 FF C4
+
+==== BB 1433 (0x2547BD14) approx BBs exec'd 0 ====
+
+ 0x2547BD14: 55750104 rlwinm r21,r11,0,4,2
+ 0: GETL R11, t0
+ 1: ANDL $0xEFFFFFFF, t0
+ 2: PUTL t0, R21
+ 3: INCEIPL $4
+
+ 0x2547BD18: 809C0004 lwz r4,4(r28)
+ 4: GETL R28, t2
+ 5: ADDL $0x4, t2
+ 6: LDL (t2), t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0x2547BD1C: 92BC0180 stw r21,384(r28)
+ 9: GETL R21, t6
+ 10: GETL R28, t8
+ 11: ADDL $0x180, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547BD20: 8A840000 lbz r20,0(r4)
+ 14: GETL R4, t10
+ 15: LDB (t10), t12
+ 16: PUTL t12, R20
+ 17: INCEIPL $4
+
+ 0x2547BD24: 2F140000 cmpi cr6,r20,0
+ 18: GETL R20, t14
+ 19: CMP0L t14, t16 (-rSo)
+ 20: ICRFL t16, $0x6, CR
+ 21: INCEIPL $4
+
+ 0x2547BD28: 409A00C0 bc 4,26,0x2547BDE8
+ 22: Jc26o $0x2547BDE8
+
+
+. 0 2547BD14 24
+. 55 75 01 04 80 9C 00 04 92 BC 01 80 8A 84 00 00 2F 14 00 00 40 9A 00 C0
+
+==== BB 1434 (0x2547BD2C) approx BBs exec'd 0 ====
+
+ 0x2547BD2C: 7569C000 andis. r9,r11,0xC000
+ 0: GETL R11, t0
+ 1: ANDL $0xC0000000, t0
+ 2: PUTL t0, R9
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0x2547BD30: 408200B8 bc 4,2,0x2547BDE8
+ 6: Jc02o $0x2547BDE8
+
+
+. 0 2547BD2C 8
+. 75 69 C0 00 40 82 00 B8
+
+==== BB 1435 (0x2547BD34) approx BBs exec'd 0 ====
+
+ 0x2547BD34: 3B5A0001 addi r26,r26,1
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x2547BD38: 7F9A9840 cmpl cr7,r26,r19
+ 4: GETL R26, t2
+ 5: GETL R19, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547BD3C: 409C0030 bc 4,28,0x2547BD6C
+ 9: Jc28o $0x2547BD6C
+
+
+. 0 2547BD34 12
+. 3B 5A 00 01 7F 9A 98 40 40 9C 00 30
+
+==== BB 1436 (0x2547BDE8) approx BBs exec'd 0 ====
+
+ 0x2547BDE8: 813C0088 lwz r9,136(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x88, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547BDEC: 2F890000 cmpi cr7,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547BDF0: 409E0010 bc 4,30,0x2547BE00
+ 9: Jc30o $0x2547BE00
+
+
+. 0 2547BDE8 12
+. 81 3C 00 88 2F 89 00 00 40 9E 00 10
+
+==== BB 1437 (0x2547BDF4) approx BBs exec'd 0 ====
+
+ 0x2547BDF4: 82FC0054 lwz r23,84(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x54, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R23
+ 4: INCEIPL $4
+
+ 0x2547BDF8: 2C970000 cmpi cr1,r23,0
+ 5: GETL R23, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x1, CR
+ 8: INCEIPL $4
+
+ 0x2547BDFC: 4186FF38 bc 12,6,0x2547BD34
+ 9: Js06o $0x2547BD34
+
+
+. 0 2547BDF4 12
+. 82 FC 00 54 2C 97 00 00 41 86 FF 38
+
+==== BB 1438 (0x2547BE00) approx BBs exec'd 0 ====
+
+ 0x2547BE00: 830E0000 lwz r24,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R24
+ 3: INCEIPL $4
+
+ 0x2547BE04: 730B0002 andi. r11,r24,0x2
+ 4: GETL R24, t4
+ 5: ANDL $0x2, t4
+ 6: PUTL t4, R11
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547BE08: 4082007C bc 4,2,0x2547BE84
+ 10: Jc02o $0x2547BE84
+
+
+. 0 2547BE00 12
+. 83 0E 00 00 73 0B 00 02 40 82 00 7C
+
+==== BB 1439 (0x2547BE0C) approx BBs exec'd 0 ====
+
+ 0x2547BE0C: 2F090000 cmpi cr6,r9,0
+ 0: GETL R9, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0x2547BE10: 419A0044 bc 12,26,0x2547BE54
+ 4: Js26o $0x2547BE54
+
+
+. 0 2547BE0C 8
+. 2F 09 00 00 41 9A 00 44
+
+==== BB 1440 (0x2547BE54) approx BBs exec'd 0 ====
+
+ 0x2547BE54: 813C0054 lwz r9,84(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x54, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0x2547BE58: 2E090000 cmpi cr4,r9,0
+ 5: GETL R9, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x4, CR
+ 8: INCEIPL $4
+
+ 0x2547BE5C: 4192FEF8 bc 12,18,0x2547BD54
+ 9: Js18o $0x2547BD54
+
+
+. 0 2547BE54 12
+. 81 3C 00 54 2E 09 00 00 41 92 FE F8
+
+==== BB 1441 (0x2547BE60) approx BBs exec'd 0 ====
+
+ 0x2547BE60: 80A90004 lwz r5,4(r9)
+ 0: GETL R9, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0x2547BE64: 83BC0000 lwz r29,0(r28)
+ 5: GETL R28, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R29
+ 8: INCEIPL $4
+
+ 0x2547BE68: 7CFD2A14 add r7,r29,r5
+ 9: GETL R29, t8
+ 10: GETL R5, t10
+ 11: ADDL t8, t10
+ 12: PUTL t10, R7
+ 13: INCEIPL $4
+
+ 0x2547BE6C: 7CE903A6 mtctr r7
+ 14: GETL R7, t12
+ 15: PUTL t12, CTR
+ 16: INCEIPL $4
+
+ 0x2547BE70: 4E800421 bctrl
+ 17: MOVL $0x2547BE74, t14
+ 18: PUTL t14, LR
+ 19: GETL CTR, t16
+ 20: JMPo-c t16 ($4)
+
+
+. 0 2547BE60 20
+. 80 A9 00 04 83 BC 00 00 7C FD 2A 14 7C E9 03 A6 4E 80 04 21
+
+==== BB 1442 (0xFFDEF80) approx BBs exec'd 0 ====
+
+ 0xFFDEF80: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDEF84: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDEF88: 90010014 stw r0,20(r1)
+ 9: GETL R0, t6
+ 10: GETL R1, t8
+ 11: ADDL $0x14, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0xFFDEF8C: 4BFFF979 bl 0xFFDE904
+ 14: MOVL $0xFFDEF90, t10
+ 15: PUTL t10, LR
+ 16: JMPo-c $0xFFDE904 ($4)
+
+
+. 0 FFDEF80 16
+. 94 21 FF F0 7C 08 02 A6 90 01 00 14 4B FF F9 79
+
+==== BB 1443 (0xFFDE904) approx BBs exec'd 0 ====
+
+ 0xFFDE904: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFFDE908: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFFDE90C: 429F0005 bcl 20,31,0xFFDE910
+ 9: MOVL $0xFFDE910, t6
+ 10: PUTL t6, LR
+ 11: INCEIPL $4
+
+ 0xFFDE910: 93C10008 stw r30,8(r1)
+ 12: GETL R30, t8
+ 13: GETL R1, t10
+ 14: ADDL $0x8, t10
+ 15: STL t8, (t10)
+ 16: INCEIPL $4
+
+ 0xFFDE914: 7FC802A6 mflr r30
+ 17: GETL LR, t12
+ 18: PUTL t12, R30
+ 19: INCEIPL $4
+
+ 0xFFDE918: 93E1000C stw r31,12(r1)
+ 20: GETL R31, t14
+ 21: GETL R1, t16
+ 22: ADDL $0xC, t16
+ 23: STL t14, (t16)
+ 24: INCEIPL $4
+
+ 0xFFDE91C: 90010014 stw r0,20(r1)
+ 25: GETL R0, t18
+ 26: GETL R1, t20
+ 27: ADDL $0x14, t20
+ 28: STL t18, (t20)
+ 29: INCEIPL $4
+
+ 0xFFDE920: 801EFFF0 lwz r0,-16(r30)
+ 30: GETL R30, t22
+ 31: ADDL $0xFFFFFFF0, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R0
+ 34: INCEIPL $4
+
+ 0xFFDE924: 7FC0F214 add r30,r0,r30
+ 35: GETL R0, t26
+ 36: GETL R30, t28
+ 37: ADDL t26, t28
+ 38: PUTL t28, R30
+ 39: INCEIPL $4
+
+ 0xFFDE928: 813E8000 lwz r9,-32768(r30)
+ 40: GETL R30, t30
+ 41: ADDL $0xFFFF8000, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R9
+ 44: INCEIPL $4
+
+ 0xFFDE92C: 88090000 lbz r0,0(r9)
+ 45: GETL R9, t34
+ 46: LDB (t34), t36
+ 47: PUTL t36, R0
+ 48: INCEIPL $4
+
+ 0xFFDE930: 2F800000 cmpi cr7,r0,0
+ 49: GETL R0, t38
+ 50: CMP0L t38, t40 (-rSo)
+ 51: ICRFL t40, $0x7, CR
+ 52: INCEIPL $4
+
+ 0xFFDE934: 409E0050 bc 4,30,0xFFDE984
+ 53: Jc30o $0xFFDE984
+
+
+. 0 FFDE904 52
+. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 88 09 00 00 2F 80 00 00 40 9E 00 50
+
+==== BB 1444 (0xFFDE938) approx BBs exec'd 0 ====
+
+ 0xFFDE938: 801E8004 lwz r0,-32764(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8004, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDE93C: 2F800000 cmpi cr7,r0,0
+ 5: GETL R0, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0xFFDE940: 419E0010 bc 12,30,0xFFDE950
+ 9: Js30o $0xFFDE950
+
+
+. 0 FFDE938 12
+. 80 1E 80 04 2F 80 00 00 41 9E 00 10
+
+==== BB 1445 (0xFFDE944) approx BBs exec'd 0 ====
+
+ 0xFFDE944: 813E8008 lwz r9,-32760(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8008, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFFDE948: 80690000 lwz r3,0(r9)
+ 5: GETL R9, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R3
+ 8: INCEIPL $4
+
+ 0xFFDE94C: 48010831 bl 0xFFEF17C
+ 9: MOVL $0xFFDE950, t8
+ 10: PUTL t8, LR
+ 11: JMPo-c $0xFFEF17C ($4)
+
+
+. 0 FFDE944 12
+. 81 3E 80 08 80 69 00 00 48 01 08 31
+
+==== BB 1446 (0xFFEF17C) approx BBs exec'd 0 ====
+
+ 0xFFEF17C: 3960000C li r11,12
+ 0: MOVL $0xC, t0
+ 1: PUTL t0, R11
+ 2: INCEIPL $4
+
+ 0xFFEF180: 4BFFFFBC b 0xFFEF13C
+ 3: JMPo $0xFFEF13C ($4)
+
+
+. 0 FFEF17C 8
+. 39 60 00 0C 4B FF FF BC
+
+==== BB 1447 (0xFFEF13C) approx BBs exec'd 0 ====
+
+ 0xFFEF13C: 556C083C rlwinm r12,r11,1,0,30
+ 0: GETL R11, t0
+ 1: SHLL $0x1, t0
+ 2: PUTL t0, R12
+ 3: INCEIPL $4
+
+ 0xFFEF140: 7D6C5A14 add r11,r12,r11
+ 4: GETL R12, t2
+ 5: GETL R11, t4
+ 6: ADDL t2, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0xFFEF144: 3980AF5C li r12,-20644
+ 9: MOVL $0xFFFFAF5C, t6
+ 10: PUTL t6, R12
+ 11: INCEIPL $4
+
+ 0xFFEF148: 3D8C2548 addis r12,r12,9544
+ 12: MOVL $0x2547AF5C, t8
+ 13: PUTL t8, R12
+ 14: INCEIPL $4
+
+ 0xFFEF14C: 7D8903A6 mtctr r12
+ 15: GETL R12, t10
+ 16: PUTL t10, CTR
+ 17: INCEIPL $4
+
+ 0xFFEF150: 398080D0 li r12,-32560
+ 18: MOVL $0xFFFF80D0, t12
+ 19: PUTL t12, R12
+ 20: INCEIPL $4
+
+ 0xFFEF154: 3D8C2547 addis r12,r12,9543
+ 21: MOVL $0x254680D0, t14
+ 22: PUTL t14, R12
+ 23: INCEIPL $4
+
+ 0xFFEF158: 4E800420 bctr
+ 24: GETL CTR, t16
+ 25: JMPo t16 ($4)
+
+
+. 0 FFEF13C 32
+. 55 6C 08 3C 7D 6C 5A 14 39 80 AF 5C 3D 8C 25 48 7D 89 03 A6 39 80 80 D0 3D 8C 25 47 4E 80 04 20
+
+==== BB 1448 __cxa_finalize(0xFEB3F44) approx BBs exec'd 0 ====
+
+ 0xFEB3F44: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEB3F48: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFEB3F4C: 48113F05 bl 0xFFC7E50
+ 9: MOVL $0xFEB3F50, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FEB3F44 12
+. 94 21 FF D0 7C 08 02 A6 48 11 3F 05
+
+==== BB 1449 (0xFEB3F50) approx BBs exec'd 0 ====
+
+ 0xFEB3F50: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEB3F54: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEB3F58: 93810020 stw r28,32(r1)
+ 8: GETL R28, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x20, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEB3F5C: 90010034 stw r0,52(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x34, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEB3F60: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0xFEB3F64: 93210014 stw r25,20(r1)
+ 21: GETL R25, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEB3F68: 2E030000 cmpi cr4,r3,0
+ 26: GETL R3, t20
+ 27: CMP0L t20, t22 (-rSo)
+ 28: ICRFL t22, $0x4, CR
+ 29: INCEIPL $4
+
+ 0xFEB3F6C: 813E1AFC lwz r9,6908(r30)
+ 30: GETL R30, t24
+ 31: ADDL $0x1AFC, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R9
+ 34: INCEIPL $4
+
+ 0xFEB3F70: 7C791B78 or r25,r3,r3
+ 35: GETL R3, t28
+ 36: PUTL t28, R25
+ 37: INCEIPL $4
+
+ 0xFEB3F74: 93010010 stw r24,16(r1)
+ 38: GETL R24, t30
+ 39: GETL R1, t32
+ 40: ADDL $0x10, t32
+ 41: STL t30, (t32)
+ 42: INCEIPL $4
+
+ 0xFEB3F78: 83890000 lwz r28,0(r9)
+ 43: GETL R9, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R28
+ 46: INCEIPL $4
+
+ 0xFEB3F7C: 93410018 stw r26,24(r1)
+ 47: GETL R26, t38
+ 48: GETL R1, t40
+ 49: ADDL $0x18, t40
+ 50: STL t38, (t40)
+ 51: INCEIPL $4
+
+ 0xFEB3F80: 2F9C0000 cmpi cr7,r28,0
+ 52: GETL R28, t42
+ 53: CMP0L t42, t44 (-rSo)
+ 54: ICRFL t44, $0x7, CR
+ 55: INCEIPL $4
+
+ 0xFEB3F84: 9361001C stw r27,28(r1)
+ 56: GETL R27, t46
+ 57: GETL R1, t48
+ 58: ADDL $0x1C, t48
+ 59: STL t46, (t48)
+ 60: INCEIPL $4
+
+ 0xFEB3F88: 93A10024 stw r29,36(r1)
+ 61: GETL R29, t50
+ 62: GETL R1, t52
+ 63: ADDL $0x24, t52
+ 64: STL t50, (t52)
+ 65: INCEIPL $4
+
+ 0xFEB3F8C: 93E1002C stw r31,44(r1)
+ 66: GETL R31, t54
+ 67: GETL R1, t56
+ 68: ADDL $0x2C, t56
+ 69: STL t54, (t56)
+ 70: INCEIPL $4
+
+ 0xFEB3F90: 9181000C stw r12,12(r1)
+ 71: GETL R12, t58
+ 72: GETL R1, t60
+ 73: ADDL $0xC, t60
+ 74: STL t58, (t60)
+ 75: INCEIPL $4
+
+ 0xFEB3F94: 419E0088 bc 12,30,0xFEB401C
+ 76: Js30o $0xFEB401C
+
+
+. 0 FEB3F50 72
+. 93 C1 00 28 7F C8 02 A6 93 81 00 20 90 01 00 34 7D 80 00 26 93 21 00 14 2E 03 00 00 81 3E 1A FC 7C 79 1B 78 93 01 00 10 83 89 00 00 93 41 00 18 2F 9C 00 00 93 61 00 1C 93 A1 00 24 93 E1 00 2C 91 81 00 0C 41 9E 00 88
+
+==== BB 1450 (0xFEB3F98) approx BBs exec'd 0 ====
+
+ 0xFEB3F98: 80BC0004 lwz r5,4(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R5
+ 4: INCEIPL $4
+
+ 0xFEB3F9C: 3BBC0008 addi r29,r28,8
+ 5: GETL R28, t4
+ 6: ADDL $0x8, t4
+ 7: PUTL t4, R29
+ 8: INCEIPL $4
+
+ 0xFEB3FA0: 54A42036 rlwinm r4,r5,4,0,27
+ 9: GETL R5, t6
+ 10: SHLL $0x4, t6
+ 11: PUTL t6, R4
+ 12: INCEIPL $4
+
+ 0xFEB3FA4: 7C64E214 add r3,r4,r28
+ 13: GETL R4, t8
+ 14: GETL R28, t10
+ 15: ADDL t8, t10
+ 16: PUTL t10, R3
+ 17: INCEIPL $4
+
+ 0xFEB3FA8: 3BE3FFF8 addi r31,r3,-8
+ 18: GETL R3, t12
+ 19: ADDL $0xFFFFFFF8, t12
+ 20: PUTL t12, R31
+ 21: INCEIPL $4
+
+ 0xFEB3FAC: 7C1DF840 cmpl cr0,r29,r31
+ 22: GETL R29, t14
+ 23: GETL R31, t16
+ 24: CMPUL t14, t16, t18 (-rSo)
+ 25: ICRFL t18, $0x0, CR
+ 26: INCEIPL $4
+
+ 0xFEB3FB0: 41810060 bc 12,1,0xFEB4010
+ 27: Js01o $0xFEB4010
+
+
+. 0 FEB3F98 28
+. 80 BC 00 04 3B BC 00 08 54 A4 20 36 7C 64 E2 14 3B E3 FF F8 7C 1D F8 40 41 81 00 60
+
+==== BB 1451 (0xFEB4010) approx BBs exec'd 0 ====
+
+ 0xFEB4010: 839C0000 lwz r28,0(r28)
+ 0: GETL R28, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R28
+ 3: INCEIPL $4
+
+ 0xFEB4014: 2F9C0000 cmpi cr7,r28,0
+ 4: GETL R28, t4
+ 5: CMP0L t4, t6 (-rSo)
+ 6: ICRFL t6, $0x7, CR
+ 7: INCEIPL $4
+
+ 0xFEB4018: 409EFF80 bc 4,30,0xFEB3F98
+ 8: Jc30o $0xFEB3F98
+
+
+. 0 FEB4010 12
+. 83 9C 00 00 2F 9C 00 00 40 9E FF 80
+
+==== BB 1452 (0xFEB401C) approx BBs exec'd 0 ====
+
+ 0xFEB401C: 40920098 bc 4,18,0xFEB40B4
+ 0: Jc18o $0xFEB40B4
+
+
+. 0 FEB401C 4
+. 40 92 00 98
+
+==== BB 1453 (0xFEB40B4) approx BBs exec'd 0 ====
+
+ 0xFEB40B4: 81410034 lwz r10,52(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFEB40B8: 7F23CB78 or r3,r25,r25
+ 5: GETL R25, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEB40BC: 8101000C lwz r8,12(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0xC, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R8
+ 12: INCEIPL $4
+
+ 0xFEB40C0: 83C10028 lwz r30,40(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x28, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R30
+ 17: INCEIPL $4
+
+ 0xFEB40C4: 7D4803A6 mtlr r10
+ 18: GETL R10, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFEB40C8: 83E1002C lwz r31,44(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x2C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R31
+ 25: INCEIPL $4
+
+ 0xFEB40CC: 7D008120 mtcrf 0x8,r8
+ 26: GETL R8, t20
+ 27: ICRFL t20, $0x4, CR
+ 28: INCEIPL $4
+
+ 0xFEB40D0: 83010010 lwz r24,16(r1)
+ 29: GETL R1, t22
+ 30: ADDL $0x10, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R24
+ 33: INCEIPL $4
+
+ 0xFEB40D4: 83210014 lwz r25,20(r1)
+ 34: GETL R1, t26
+ 35: ADDL $0x14, t26
+ 36: LDL (t26), t28
+ 37: PUTL t28, R25
+ 38: INCEIPL $4
+
+ 0xFEB40D8: 83410018 lwz r26,24(r1)
+ 39: GETL R1, t30
+ 40: ADDL $0x18, t30
+ 41: LDL (t30), t32
+ 42: PUTL t32, R26
+ 43: INCEIPL $4
+
+ 0xFEB40DC: 8361001C lwz r27,28(r1)
+ 44: GETL R1, t34
+ 45: ADDL $0x1C, t34
+ 46: LDL (t34), t36
+ 47: PUTL t36, R27
+ 48: INCEIPL $4
+
+ 0xFEB40E0: 83810020 lwz r28,32(r1)
+ 49: GETL R1, t38
+ 50: ADDL $0x20, t38
+ 51: LDL (t38), t40
+ 52: PUTL t40, R28
+ 53: INCEIPL $4
+
+ 0xFEB40E4: 83A10024 lwz r29,36(r1)
+ 54: GETL R1, t42
+ 55: ADDL $0x24, t42
+ 56: LDL (t42), t44
+ 57: PUTL t44, R29
+ 58: INCEIPL $4
+
+ 0xFEB40E8: 38210030 addi r1,r1,48
+ 59: GETL R1, t46
+ 60: ADDL $0x30, t46
+ 61: PUTL t46, R1
+ 62: INCEIPL $4
+
+ 0xFEB40EC: 480ABD24 b 0xFF5FE10
+ 63: JMPo $0xFF5FE10 ($4)
+
+
+. 0 FEB40B4 60
+. 81 41 00 34 7F 23 CB 78 81 01 00 0C 83 C1 00 28 7D 48 03 A6 83 E1 00 2C 7D 00 81 20 83 01 00 10 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 38 21 00 30 48 0A BD 24
+
+==== BB 1454 __unregister_atfork(0xFF5FE10) approx BBs exec'd 0 ====
+
+ 0xFF5FE10: 9421FFD0 stwu r1,-48(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFD0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFF5FE14: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFF5FE18: 48068039 bl 0xFFC7E50
+ 9: MOVL $0xFF5FE1C, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FF5FE10 12
+. 94 21 FF D0 7C 08 02 A6 48 06 80 39
+
+==== BB 1455 (0xFF5FE1C) approx BBs exec'd 0 ====
+
+ 0xFF5FE1C: 93C10028 stw r30,40(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x28, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF5FE20: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFF5FE24: 93010010 stw r24,16(r1)
+ 8: GETL R24, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x10, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFF5FE28: 90010034 stw r0,52(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x34, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFF5FE2C: 93A10024 stw r29,36(r1)
+ 18: GETL R29, t14
+ 19: GETL R1, t16
+ 20: ADDL $0x24, t16
+ 21: STL t14, (t16)
+ 22: INCEIPL $4
+
+ 0xFF5FE30: 831E1CD4 lwz r24,7380(r30)
+ 23: GETL R30, t18
+ 24: ADDL $0x1CD4, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R24
+ 27: INCEIPL $4
+
+ 0xFF5FE34: 93410018 stw r26,24(r1)
+ 28: GETL R26, t22
+ 29: GETL R1, t24
+ 30: ADDL $0x18, t24
+ 31: STL t22, (t24)
+ 32: INCEIPL $4
+
+ 0xFF5FE38: 7C7A1B78 or r26,r3,r3
+ 33: GETL R3, t26
+ 34: PUTL t26, R26
+ 35: INCEIPL $4
+
+ 0xFF5FE3C: 83B80000 lwz r29,0(r24)
+ 36: GETL R24, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R29
+ 39: INCEIPL $4
+
+ 0xFF5FE40: 9361001C stw r27,28(r1)
+ 40: GETL R27, t32
+ 41: GETL R1, t34
+ 42: ADDL $0x1C, t34
+ 43: STL t32, (t34)
+ 44: INCEIPL $4
+
+ 0xFF5FE44: 3B600000 li r27,0
+ 45: MOVL $0x0, t36
+ 46: PUTL t36, R27
+ 47: INCEIPL $4
+
+ 0xFF5FE48: 93E1002C stw r31,44(r1)
+ 48: GETL R31, t38
+ 49: GETL R1, t40
+ 50: ADDL $0x2C, t40
+ 51: STL t38, (t40)
+ 52: INCEIPL $4
+
+ 0xFF5FE4C: 7C3F0B78 or r31,r1,r1
+ 53: GETL R1, t42
+ 54: PUTL t42, R31
+ 55: INCEIPL $4
+
+ 0xFF5FE50: 93210014 stw r25,20(r1)
+ 56: GETL R25, t44
+ 57: GETL R1, t46
+ 58: ADDL $0x14, t46
+ 59: STL t44, (t46)
+ 60: INCEIPL $4
+
+ 0xFF5FE54: 93810020 stw r28,32(r1)
+ 61: GETL R28, t48
+ 62: GETL R1, t50
+ 63: ADDL $0x20, t50
+ 64: STL t48, (t50)
+ 65: INCEIPL $4
+
+ 0xFF5FE58: 48000018 b 0xFF5FE70
+ 66: JMPo $0xFF5FE70 ($4)
+
+
+. 0 FF5FE1C 64
+. 93 C1 00 28 7F C8 02 A6 93 01 00 10 90 01 00 34 93 A1 00 24 83 1E 1C D4 93 41 00 18 7C 7A 1B 78 83 B8 00 00 93 61 00 1C 3B 60 00 00 93 E1 00 2C 7C 3F 0B 78 93 21 00 14 93 81 00 20 48 00 00 18
+
+==== BB 1456 (0xFF5FE70) approx BBs exec'd 0 ====
+
+ 0xFF5FE70: 2F1D0000 cmpi cr6,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x6, CR
+ 3: INCEIPL $4
+
+ 0xFF5FE74: 409AFFE8 bc 4,26,0xFF5FE5C
+ 4: Jc26o $0xFF5FE5C
+
+
+. 0 FF5FE70 8
+. 2F 1D 00 00 40 9A FF E8
+
+==== BB 1457 (0xFF5FE78) approx BBs exec'd 0 ====
+
+ 0xFF5FE78: 80610000 lwz r3,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFF5FE7C: 83830004 lwz r28,4(r3)
+ 4: GETL R3, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R28
+ 8: INCEIPL $4
+
+ 0xFF5FE80: 8303FFE0 lwz r24,-32(r3)
+ 9: GETL R3, t8
+ 10: ADDL $0xFFFFFFE0, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R24
+ 13: INCEIPL $4
+
+ 0xFF5FE84: 7F8803A6 mtlr r28
+ 14: GETL R28, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0xFF5FE88: 8323FFE4 lwz r25,-28(r3)
+ 17: GETL R3, t14
+ 18: ADDL $0xFFFFFFE4, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R25
+ 21: INCEIPL $4
+
+ 0xFF5FE8C: 8343FFE8 lwz r26,-24(r3)
+ 22: GETL R3, t18
+ 23: ADDL $0xFFFFFFE8, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R26
+ 26: INCEIPL $4
+
+ 0xFF5FE90: 8363FFEC lwz r27,-20(r3)
+ 27: GETL R3, t22
+ 28: ADDL $0xFFFFFFEC, t22
+ 29: LDL (t22), t24
+ 30: PUTL t24, R27
+ 31: INCEIPL $4
+
+ 0xFF5FE94: 8383FFF0 lwz r28,-16(r3)
+ 32: GETL R3, t26
+ 33: ADDL $0xFFFFFFF0, t26
+ 34: LDL (t26), t28
+ 35: PUTL t28, R28
+ 36: INCEIPL $4
+
+ 0xFF5FE98: 83A3FFF4 lwz r29,-12(r3)
+ 37: GETL R3, t30
+ 38: ADDL $0xFFFFFFF4, t30
+ 39: LDL (t30), t32
+ 40: PUTL t32, R29
+ 41: INCEIPL $4
+
+ 0xFF5FE9C: 83C3FFF8 lwz r30,-8(r3)
+ 42: GETL R3, t34
+ 43: ADDL $0xFFFFFFF8, t34
+ 44: LDL (t34), t36
+ 45: PUTL t36, R30
+ 46: INCEIPL $4
+
+ 0xFF5FEA0: 83E3FFFC lwz r31,-4(r3)
+ 47: GETL R3, t38
+ 48: ADDL $0xFFFFFFFC, t38
+ 49: LDL (t38), t40
+ 50: PUTL t40, R31
+ 51: INCEIPL $4
+
+ 0xFF5FEA4: 7C611B78 or r1,r3,r3
+ 52: GETL R3, t42
+ 53: PUTL t42, R1
+ 54: INCEIPL $4
+
+ 0xFF5FEA8: 4E800020 blr
+ 55: GETL LR, t44
+ 56: JMPo-r t44 ($4)
+
+
+. 0 FF5FE78 52
+. 80 61 00 00 83 83 00 04 83 03 FF E0 7F 88 03 A6 83 23 FF E4 83 43 FF E8 83 63 FF EC 83 83 FF F0 83 A3 FF F4 83 C3 FF F8 83 E3 FF FC 7C 61 1B 78 4E 80 00 20
+
+==== BB 1458 (0xFFDE950) approx BBs exec'd 0 ====
+
+ 0xFFDE950: 83FE800C lwz r31,-32756(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF800C, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFFDE954: 48000014 b 0xFFDE968
+ 5: JMPo $0xFFDE968 ($4)
+
+
+. 0 FFDE950 8
+. 83 FE 80 0C 48 00 00 14
+
+==== BB 1459 (0xFFDE968) approx BBs exec'd 0 ====
+
+ 0xFFDE968: 813F0000 lwz r9,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R9
+ 3: INCEIPL $4
+
+ 0xFFDE96C: 81690000 lwz r11,0(r9)
+ 4: GETL R9, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R11
+ 7: INCEIPL $4
+
+ 0xFFDE970: 2F8B0000 cmpi cr7,r11,0
+ 8: GETL R11, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x7, CR
+ 11: INCEIPL $4
+
+ 0xFFDE974: 409EFFE4 bc 4,30,0xFFDE958
+ 12: Jc30o $0xFFDE958
+
+
+. 0 FFDE968 16
+. 81 3F 00 00 81 69 00 00 2F 8B 00 00 40 9E FF E4
+
+==== BB 1460 (0xFFDE978) approx BBs exec'd 0 ====
+
+ 0xFFDE978: 813E8000 lwz r9,-32768(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0xFFFF8000, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFFDE97C: 38000001 li r0,1
+ 5: MOVL $0x1, t4
+ 6: PUTL t4, R0
+ 7: INCEIPL $4
+
+ 0xFFDE980: 98090000 stb r0,0(r9)
+ 8: GETL R0, t6
+ 9: GETL R9, t8
+ 10: STB t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFFDE984: 80010014 lwz r0,20(r1)
+ 12: GETL R1, t10
+ 13: ADDL $0x14, t10
+ 14: LDL (t10), t12
+ 15: PUTL t12, R0
+ 16: INCEIPL $4
+
+ 0xFFDE988: 83C10008 lwz r30,8(r1)
+ 17: GETL R1, t14
+ 18: ADDL $0x8, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R30
+ 21: INCEIPL $4
+
+ 0xFFDE98C: 83E1000C lwz r31,12(r1)
+ 22: GETL R1, t18
+ 23: ADDL $0xC, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R31
+ 26: INCEIPL $4
+
+ 0xFFDE990: 7C0803A6 mtlr r0
+ 27: GETL R0, t22
+ 28: PUTL t22, LR
+ 29: INCEIPL $4
+
+ 0xFFDE994: 38210010 addi r1,r1,16
+ 30: GETL R1, t24
+ 31: ADDL $0x10, t24
+ 32: PUTL t24, R1
+ 33: INCEIPL $4
+
+ 0xFFDE998: 4E800020 blr
+ 34: GETL LR, t26
+ 35: JMPo-r t26 ($4)
+
+
+. 0 FFDE978 36
+. 81 3E 80 00 38 00 00 01 98 09 00 00 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
+
+==== BB 1461 (0xFFDEF90) approx BBs exec'd 0 ====
+
+ 0xFFDEF90: 80010014 lwz r0,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R0
+ 4: INCEIPL $4
+
+ 0xFFDEF94: 7C0803A6 mtlr r0
+ 5: GETL R0, t4
+ 6: PUTL t4, LR
+ 7: INCEIPL $4
+
+ 0xFFDEF98: 38210010 addi r1,r1,16
+ 8: GETL R1, t6
+ 9: ADDL $0x10, t6
+ 10: PUTL t6, R1
+ 11: INCEIPL $4
+
+ 0xFFDEF9C: 4E800020 blr
+ 12: GETL LR, t8
+ 13: JMPo-r t8 ($4)
+
+
+. 0 FFDEF90 16
+. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
+
+==== BB 1462 (0x2547BE74) approx BBs exec'd 0 ====
+
+ 0x2547BE74: 811C0178 lwz r8,376(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x178, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547BE78: 3968FFFF addi r11,r8,-1
+ 5: GETL R8, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0x2547BE7C: 917C0178 stw r11,376(r28)
+ 9: GETL R11, t6
+ 10: GETL R28, t8
+ 11: ADDL $0x178, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547BE80: 4BFFFEE0 b 0x2547BD60
+ 14: JMPo $0x2547BD60 ($4)
+
+
+. 0 2547BE74 16
+. 81 1C 01 78 39 68 FF FF 91 7C 01 78 4B FF FE E0
+
+==== BB 1463 (0x2547BD60) approx BBs exec'd 0 ====
+
+ 0x2547BD60: 3B5A0001 addi r26,r26,1
+ 0: GETL R26, t0
+ 1: ADDL $0x1, t0
+ 2: PUTL t0, R26
+ 3: INCEIPL $4
+
+ 0x2547BD64: 7F9A9840 cmpl cr7,r26,r19
+ 4: GETL R26, t2
+ 5: GETL R19, t4
+ 6: CMPUL t2, t4, t6 (-rSo)
+ 7: ICRFL t6, $0x7, CR
+ 8: INCEIPL $4
+
+ 0x2547BD68: 419CFFD8 bc 12,28,0x2547BD40
+ 9: Js28o $0x2547BD40
+
+
+. 0 2547BD60 12
+. 3B 5A 00 01 7F 9A 98 40 41 9C FF D8
+
+==== BB 1464 (0x2547BE14) approx BBs exec'd 0 ====
+
+ 0x2547BE14: 809C0090 lwz r4,144(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x90, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0x2547BE18: 80690004 lwz r3,4(r9)
+ 5: GETL R9, t4
+ 6: ADDL $0x4, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R3
+ 9: INCEIPL $4
+
+ 0x2547BE1C: 83640004 lwz r27,4(r4)
+ 10: GETL R4, t8
+ 11: ADDL $0x4, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R27
+ 14: INCEIPL $4
+
+ 0x2547BE20: 801C0000 lwz r0,0(r28)
+ 15: GETL R28, t12
+ 16: LDL (t12), t14
+ 17: PUTL t14, R0
+ 18: INCEIPL $4
+
+ 0x2547BE24: 576CF0BE rlwinm r12,r27,30,2,31
+ 19: GETL R27, t16
+ 20: SHRL $0x2, t16
+ 21: PUTL t16, R12
+ 22: INCEIPL $4
+
+ 0x2547BE28: 2F8C0000 cmpi cr7,r12,0
+ 23: GETL R12, t18
+ 24: CMP0L t18, t20 (-rSo)
+ 25: ICRFL t20, $0x7, CR
+ 26: INCEIPL $4
+
+ 0x2547BE2C: 7F601A14 add r27,r0,r3
+ 27: GETL R0, t22
+ 28: GETL R3, t24
+ 29: ADDL t22, t24
+ 30: PUTL t24, R27
+ 31: INCEIPL $4
+
+ 0x2547BE30: 3BACFFFF addi r29,r12,-1
+ 32: GETL R12, t26
+ 33: ADDL $0xFFFFFFFF, t26
+ 34: PUTL t26, R29
+ 35: INCEIPL $4
+
+ 0x2547BE34: 419E0020 bc 12,30,0x2547BE54
+ 36: Js30o $0x2547BE54
+
+
+. 0 2547BE14 36
+. 80 9C 00 90 80 69 00 04 83 64 00 04 80 1C 00 00 57 6C F0 BE 2F 8C 00 00 7F 60 1A 14 3B AC FF FF 41 9E 00 20
+
+==== BB 1465 (0x2547BE38) approx BBs exec'd 0 ====
+
+ 0x2547BE38: 57A6103A rlwinm r6,r29,2,0,29
+ 0: GETL R29, t0
+ 1: SHLL $0x2, t0
+ 2: PUTL t0, R6
+ 3: INCEIPL $4
+
+ 0x2547BE3C: 7D26D82E lwzx r9,r6,r27
+ 4: GETL R27, t2
+ 5: GETL R6, t4
+ 6: ADDL t4, t2
+ 7: LDL (t2), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0x2547BE40: 7D2903A6 mtctr r9
+ 10: GETL R9, t8
+ 11: PUTL t8, CTR
+ 12: INCEIPL $4
+
+ 0x2547BE44: 4E800421 bctrl
+ 13: MOVL $0x2547BE48, t10
+ 14: PUTL t10, LR
+ 15: GETL CTR, t12
+ 16: JMPo-c t12 ($4)
+
+
+. 0 2547BE38 16
+. 57 A6 10 3A 7D 26 D8 2E 7D 29 03 A6 4E 80 04 21
+
+==== BB 1466 __libc_fini(0xFE9B5BC) approx BBs exec'd 0 ====
+
+ 0xFE9B5BC: 9421FFF0 stwu r1,-16(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFF0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFE9B5C0: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFE9B5C4: 4812C88D bl 0xFFC7E50
+ 9: MOVL $0xFE9B5C8, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FE9B5BC 12
+. 94 21 FF F0 7C 08 02 A6 48 12 C8 8D
+
+==== BB 1467 (0xFE9B5C8) approx BBs exec'd 0 ====
+
+ 0xFE9B5C8: 93C10008 stw r30,8(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x8, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFE9B5CC: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFE9B5D0: 93E1000C stw r31,12(r1)
+ 8: GETL R31, t6
+ 9: GETL R1, t8
+ 10: ADDL $0xC, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFE9B5D4: 90010014 stw r0,20(r1)
+ 13: GETL R0, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x14, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFE9B5D8: 813E0014 lwz r9,20(r30)
+ 18: GETL R30, t14
+ 19: ADDL $0x14, t14
+ 20: LDL (t14), t16
+ 21: PUTL t16, R9
+ 22: INCEIPL $4
+
+ 0xFE9B5DC: 80090004 lwz r0,4(r9)
+ 23: GETL R9, t18
+ 24: ADDL $0x4, t18
+ 25: LDL (t18), t20
+ 26: PUTL t20, R0
+ 27: INCEIPL $4
+
+ 0xFE9B5E0: 3BE90004 addi r31,r9,4
+ 28: GETL R9, t22
+ 29: ADDL $0x4, t22
+ 30: PUTL t22, R31
+ 31: INCEIPL $4
+
+ 0xFE9B5E4: 2F800000 cmpi cr7,r0,0
+ 32: GETL R0, t24
+ 33: CMP0L t24, t26 (-rSo)
+ 34: ICRFL t26, $0x7, CR
+ 35: INCEIPL $4
+
+ 0xFE9B5E8: 419E0018 bc 12,30,0xFE9B600
+ 36: Js30o $0xFE9B600
+
+
+. 0 FE9B5C8 36
+. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 81 3E 00 14 80 09 00 04 3B E9 00 04 2F 80 00 00 41 9E 00 18
+
+==== BB 1468 (0xFE9B600) approx BBs exec'd 0 ====
+
+ 0xFE9B600: 80610014 lwz r3,20(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFE9B604: 83C10008 lwz r30,8(r1)
+ 5: GETL R1, t4
+ 6: ADDL $0x8, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R30
+ 9: INCEIPL $4
+
+ 0xFE9B608: 83E1000C lwz r31,12(r1)
+ 10: GETL R1, t8
+ 11: ADDL $0xC, t8
+ 12: LDL (t8), t10
+ 13: PUTL t10, R31
+ 14: INCEIPL $4
+
+ 0xFE9B60C: 7C6803A6 mtlr r3
+ 15: GETL R3, t12
+ 16: PUTL t12, LR
+ 17: INCEIPL $4
+
+ 0xFE9B610: 38210010 addi r1,r1,16
+ 18: GETL R1, t14
+ 19: ADDL $0x10, t14
+ 20: PUTL t14, R1
+ 21: INCEIPL $4
+
+ 0xFE9B614: 4E800020 blr
+ 22: GETL LR, t16
+ 23: JMPo-r t16 ($4)
+
+
+. 0 FE9B600 24
+. 80 61 00 14 83 C1 00 08 83 E1 00 0C 7C 68 03 A6 38 21 00 10 4E 80 00 20
+
+==== BB 1469 (0x2547BE48) approx BBs exec'd 0 ====
+
+ 0x2547BE48: 2F9D0000 cmpi cr7,r29,0
+ 0: GETL R29, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0x2547BE4C: 3BBDFFFF addi r29,r29,-1
+ 4: GETL R29, t4
+ 5: ADDL $0xFFFFFFFF, t4
+ 6: PUTL t4, R29
+ 7: INCEIPL $4
+
+ 0x2547BE50: 409EFFE8 bc 4,30,0x2547BE38
+ 8: Jc30o $0x2547BE38
+
+
+. 0 2547BE48 12
+. 2F 9D 00 00 3B BD FF FF 40 9E FF E8
+
+==== BB 1470 (0x2547BD54) approx BBs exec'd 0 ====
+
+ 0x2547BD54: 811C0178 lwz r8,376(r28)
+ 0: GETL R28, t0
+ 1: ADDL $0x178, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R8
+ 4: INCEIPL $4
+
+ 0x2547BD58: 3968FFFF addi r11,r8,-1
+ 5: GETL R8, t4
+ 6: ADDL $0xFFFFFFFF, t4
+ 7: PUTL t4, R11
+ 8: INCEIPL $4
+
+ 0x2547BD5C: 917C0178 stw r11,376(r28)
+ 9: GETL R11, t6
+ 10: GETL R28, t8
+ 11: ADDL $0x178, t8
+ 12: STL t6, (t8)
+ 13: INCEIPL $4
+
+ 0x2547BD60: 3B5A0001 addi r26,r26,1
+ 14: GETL R26, t10
+ 15: ADDL $0x1, t10
+ 16: PUTL t10, R26
+ 17: INCEIPL $4
+
+ 0x2547BD64: 7F9A9840 cmpl cr7,r26,r19
+ 18: GETL R26, t12
+ 19: GETL R19, t14
+ 20: CMPUL t12, t14, t16 (-rSo)
+ 21: ICRFL t16, $0x7, CR
+ 22: INCEIPL $4
+
+ 0x2547BD68: 419CFFD8 bc 12,28,0x2547BD40
+ 23: Js28o $0x2547BD40
+
+
+. 0 2547BD54 24
+. 81 1C 01 78 39 68 FF FF 91 7C 01 78 3B 5A 00 01 7F 9A 98 40 41 9C FF D8
+
+==== BB 1471 (0x2547BD78) approx BBs exec'd 0 ====
+
+ 0x2547BD78: 81EE0000 lwz r15,0(r14)
+ 0: GETL R14, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R15
+ 3: INCEIPL $4
+
+ 0x2547BD7C: 71E90080 andi. r9,r15,0x80
+ 4: GETL R15, t4
+ 5: ANDL $0x80, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0x2547BD80: 408201AC bc 4,2,0x2547BF2C
+ 10: Jc02o $0x2547BF2C
+
+
+. 0 2547BD78 12
+. 81 EE 00 00 71 E9 00 80 40 82 01 AC
+
+==== BB 1472 (0x2547BD84) approx BBs exec'd 0 ====
+
+ 0x2547BD84: 81410000 lwz r10,0(r1)
+ 0: GETL R1, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0x2547BD88: 81CA0004 lwz r14,4(r10)
+ 4: GETL R10, t4
+ 5: ADDL $0x4, t4
+ 6: LDL (t4), t6
+ 7: PUTL t6, R14
+ 8: INCEIPL $4
+
+ 0x2547BD8C: 818AFFB4 lwz r12,-76(r10)
+ 9: GETL R10, t8
+ 10: ADDL $0xFFFFFFB4, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R12
+ 13: INCEIPL $4
+
+ 0x2547BD90: 7DC803A6 mtlr r14
+ 14: GETL R14, t12
+ 15: PUTL t12, LR
+ 16: INCEIPL $4
+
+ 0x2547BD94: 81EAFFBC lwz r15,-68(r10)
+ 17: GETL R10, t14
+ 18: ADDL $0xFFFFFFBC, t14
+ 19: LDL (t14), t16
+ 20: PUTL t16, R15
+ 21: INCEIPL $4
+
+ 0x2547BD98: 81CAFFB8 lwz r14,-72(r10)
+ 22: GETL R10, t18
+ 23: ADDL $0xFFFFFFB8, t18
+ 24: LDL (t18), t20
+ 25: PUTL t20, R14
+ 26: INCEIPL $4
+
+ 0x2547BD9C: 7D808120 mtcrf 0x8,r12
+ 27: GETL R12, t22
+ 28: ICRFL t22, $0x4, CR
+ 29: INCEIPL $4
+
+ 0x2547BDA0: 820AFFC0 lwz r16,-64(r10)
+ 30: GETL R10, t24
+ 31: ADDL $0xFFFFFFC0, t24
+ 32: LDL (t24), t26
+ 33: PUTL t26, R16
+ 34: INCEIPL $4
+
+ 0x2547BDA4: 822AFFC4 lwz r17,-60(r10)
+ 35: GETL R10, t28
+ 36: ADDL $0xFFFFFFC4, t28
+ 37: LDL (t28), t30
+ 38: PUTL t30, R17
+ 39: INCEIPL $4
+
+ 0x2547BDA8: 824AFFC8 lwz r18,-56(r10)
+ 40: GETL R10, t32
+ 41: ADDL $0xFFFFFFC8, t32
+ 42: LDL (t32), t34
+ 43: PUTL t34, R18
+ 44: INCEIPL $4
+
+ 0x2547BDAC: 826AFFCC lwz r19,-52(r10)
+ 45: GETL R10, t36
+ 46: ADDL $0xFFFFFFCC, t36
+ 47: LDL (t36), t38
+ 48: PUTL t38, R19
+ 49: INCEIPL $4
+
+ 0x2547BDB0: 828AFFD0 lwz r20,-48(r10)
+ 50: GETL R10, t40
+ 51: ADDL $0xFFFFFFD0, t40
+ 52: LDL (t40), t42
+ 53: PUTL t42, R20
+ 54: INCEIPL $4
+
+ 0x2547BDB4: 82AAFFD4 lwz r21,-44(r10)
+ 55: GETL R10, t44
+ 56: ADDL $0xFFFFFFD4, t44
+ 57: LDL (t44), t46
+ 58: PUTL t46, R21
+ 59: INCEIPL $4
+
+ 0x2547BDB8: 82CAFFD8 lwz r22,-40(r10)
+ 60: GETL R10, t48
+ 61: ADDL $0xFFFFFFD8, t48
+ 62: LDL (t48), t50
+ 63: PUTL t50, R22
+ 64: INCEIPL $4
+
+ 0x2547BDBC: 82EAFFDC lwz r23,-36(r10)
+ 65: GETL R10, t52
+ 66: ADDL $0xFFFFFFDC, t52
+ 67: LDL (t52), t54
+ 68: PUTL t54, R23
+ 69: INCEIPL $4
+
+ 0x2547BDC0: 830AFFE0 lwz r24,-32(r10)
+ 70: GETL R10, t56
+ 71: ADDL $0xFFFFFFE0, t56
+ 72: LDL (t56), t58
+ 73: PUTL t58, R24
+ 74: INCEIPL $4
+
+ 0x2547BDC4: 832AFFE4 lwz r25,-28(r10)
+ 75: GETL R10, t60
+ 76: ADDL $0xFFFFFFE4, t60
+ 77: LDL (t60), t62
+ 78: PUTL t62, R25
+ 79: INCEIPL $4
+
+ 0x2547BDC8: 834AFFE8 lwz r26,-24(r10)
+ 80: GETL R10, t64
+ 81: ADDL $0xFFFFFFE8, t64
+ 82: LDL (t64), t66
+ 83: PUTL t66, R26
+ 84: INCEIPL $4
+
+ 0x2547BDCC: 836AFFEC lwz r27,-20(r10)
+ 85: GETL R10, t68
+ 86: ADDL $0xFFFFFFEC, t68
+ 87: LDL (t68), t70
+ 88: PUTL t70, R27
+ 89: INCEIPL $4
+
+ 0x2547BDD0: 838AFFF0 lwz r28,-16(r10)
+ 90: GETL R10, t72
+ 91: ADDL $0xFFFFFFF0, t72
+ 92: LDL (t72), t74
+ 93: PUTL t74, R28
+ 94: INCEIPL $4
+
+ 0x2547BDD4: 83AAFFF4 lwz r29,-12(r10)
+ 95: GETL R10, t76
+ 96: ADDL $0xFFFFFFF4, t76
+ 97: LDL (t76), t78
+ 98: PUTL t78, R29
+ 99: INCEIPL $4
+
+ 0x2547BDD8: 83CAFFF8 lwz r30,-8(r10)
+ 100: GETL R10, t80
+ 101: ADDL $0xFFFFFFF8, t80
+ 102: LDL (t80), t82
+ 103: PUTL t82, R30
+ 104: INCEIPL $4
+
+ 0x2547BDDC: 83EAFFFC lwz r31,-4(r10)
+ 105: GETL R10, t84
+ 106: ADDL $0xFFFFFFFC, t84
+ 107: LDL (t84), t86
+ 108: PUTL t86, R31
+ 109: INCEIPL $4
+
+ 0x2547BDE0: 7D415378 or r1,r10,r10
+ 110: GETL R10, t88
+ 111: PUTL t88, R1
+ 112: INCEIPL $4
+
+ 0x2547BDE4: 4E800020 blr
+ 113: GETL LR, t90
+ 114: JMPo-r t90 ($4)
+
+
+. 0 2547BD84 100
+. 81 41 00 00 81 CA 00 04 81 8A FF B4 7D C8 03 A6 81 EA FF BC 81 CA FF B8 7D 80 81 20 82 0A FF C0 82 2A FF C4 82 4A FF C8 82 6A FF CC 82 8A FF D0 82 AA FF D4 82 CA FF D8 82 EA FF DC 83 0A FF E0 83 2A FF E4 83 4A FF E8 83 6A FF EC 83 8A FF F0 83 AA FF F4 83 CA FF F8 83 EA FF FC 7D 41 53 78 4E 80 00 20
+
+==== BB 1473 (0xFEB3C54) approx BBs exec'd 0 ====
+
+ 0xFEB3C54: 807F0000 lwz r3,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R3
+ 3: INCEIPL $4
+
+ 0xFEB3C58: 80030000 lwz r0,0(r3)
+ 4: GETL R3, t4
+ 5: LDL (t4), t6
+ 6: PUTL t6, R0
+ 7: INCEIPL $4
+
+ 0xFEB3C5C: 2F000000 cmpi cr6,r0,0
+ 8: GETL R0, t8
+ 9: CMP0L t8, t10 (-rSo)
+ 10: ICRFL t10, $0x6, CR
+ 11: INCEIPL $4
+
+ 0xFEB3C60: 901F0000 stw r0,0(r31)
+ 12: GETL R0, t12
+ 13: GETL R31, t14
+ 14: STL t12, (t14)
+ 15: INCEIPL $4
+
+ 0xFEB3C64: 419AFF64 bc 12,26,0xFEB3BC8
+ 16: Js26o $0xFEB3BC8
+
+
+. 0 FEB3C54 20
+. 80 7F 00 00 80 03 00 00 2F 00 00 00 90 1F 00 00 41 9A FF 64
+
+==== BB 1474 (0xFEB3BC8) approx BBs exec'd 0 ====
+
+ 0xFEB3BC8: 2F800000 cmpi cr7,r0,0
+ 0: GETL R0, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x7, CR
+ 3: INCEIPL $4
+
+ 0xFEB3BCC: 419E00CC bc 12,30,0xFEB3C98
+ 4: Js30o $0xFEB3C98
+
+
+. 0 FEB3BC8 8
+. 2F 80 00 00 41 9E 00 CC
+
+==== BB 1475 (0xFEB3C98) approx BBs exec'd 0 ====
+
+ 0xFEB3C98: 83FE1BBC lwz r31,7100(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BBC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFEB3C9C: 83BE1C38 lwz r29,7224(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x1C38, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R29
+ 9: INCEIPL $4
+
+ 0xFEB3CA0: 7F9FE840 cmpl cr7,r31,r29
+ 10: GETL R31, t8
+ 11: GETL R29, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x7, CR
+ 14: INCEIPL $4
+
+ 0xFEB3CA4: 409C001C bc 4,28,0xFEB3CC0
+ 15: Jc28o $0xFEB3CC0
+
+
+. 0 FEB3C98 16
+. 83 FE 1B BC 83 BE 1C 38 7F 9F E8 40 40 9C 00 1C
+
+==== BB 1476 (0xFEB3CA8) approx BBs exec'd 0 ====
+
+ 0xFEB3CA8: 815F0000 lwz r10,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R10
+ 3: INCEIPL $4
+
+ 0xFEB3CAC: 3BFF0004 addi r31,r31,4
+ 4: GETL R31, t4
+ 5: ADDL $0x4, t4
+ 6: PUTL t4, R31
+ 7: INCEIPL $4
+
+ 0xFEB3CB0: 7D4903A6 mtctr r10
+ 8: GETL R10, t6
+ 9: PUTL t6, CTR
+ 10: INCEIPL $4
+
+ 0xFEB3CB4: 4E800421 bctrl
+ 11: MOVL $0xFEB3CB8, t8
+ 12: PUTL t8, LR
+ 13: GETL CTR, t10
+ 14: JMPo-c t10 ($4)
+
+
+. 0 FEB3CA8 16
+. 81 5F 00 00 3B FF 00 04 7D 49 03 A6 4E 80 04 21
+
+==== BB 1477 _IO_cleanup(0xFEECB0C) approx BBs exec'd 0 ====
+
+ 0xFEECB0C: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEECB10: 7C0802A6 mflr r0
+ 6: GETL LR, t4
+ 7: PUTL t4, R0
+ 8: INCEIPL $4
+
+ 0xFEECB14: 480DB33D bl 0xFFC7E50
+ 9: MOVL $0xFEECB18, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FEECB0C 12
+. 94 21 FF E0 7C 08 02 A6 48 0D B3 3D
+
+==== BB 1478 (0xFEECB18) approx BBs exec'd 0 ====
+
+ 0xFEECB18: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEECB1C: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEECB20: 38600000 li r3,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R3
+ 10: INCEIPL $4
+
+ 0xFEECB24: 93810010 stw r28,16(r1)
+ 11: GETL R28, t8
+ 12: GETL R1, t10
+ 13: ADDL $0x10, t10
+ 14: STL t8, (t10)
+ 15: INCEIPL $4
+
+ 0xFEECB28: 93E1001C stw r31,28(r1)
+ 16: GETL R31, t12
+ 17: GETL R1, t14
+ 18: ADDL $0x1C, t14
+ 19: STL t12, (t14)
+ 20: INCEIPL $4
+
+ 0xFEECB2C: 93A10014 stw r29,20(r1)
+ 21: GETL R29, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x14, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEECB30: 90010024 stw r0,36(r1)
+ 26: GETL R0, t20
+ 27: GETL R1, t22
+ 28: ADDL $0x24, t22
+ 29: STL t20, (t22)
+ 30: INCEIPL $4
+
+ 0xFEECB34: 4BFFF98D bl 0xFEEC4C0
+ 31: MOVL $0xFEECB38, t24
+ 32: PUTL t24, LR
+ 33: JMPo-c $0xFEEC4C0 ($4)
+
+
+. 0 FEECB18 32
+. 93 C1 00 18 7F C8 02 A6 38 60 00 00 93 81 00 10 93 E1 00 1C 93 A1 00 14 90 01 00 24 4B FF F9 8D
+
+==== BB 1479 _IO_flush_all_lockp(0xFEEC4C0) approx BBs exec'd 0 ====
+
+ 0xFEEC4C0: 9421FFB0 stwu r1,-80(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFB0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFEEC4C4: 7C8802A6 mflr r4
+ 6: GETL LR, t4
+ 7: PUTL t4, R4
+ 8: INCEIPL $4
+
+ 0xFEEC4C8: 480DB989 bl 0xFFC7E50
+ 9: MOVL $0xFEEC4CC, t6
+ 10: PUTL t6, LR
+ 11: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FEEC4C0 12
+. 94 21 FF B0 7C 88 02 A6 48 0D B9 89
+
+==== BB 1480 (0xFEEC4CC) approx BBs exec'd 0 ====
+
+ 0xFEEC4CC: 93C10048 stw r30,72(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x48, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEEC4D0: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFEEC4D4: 92C10028 stw r22,40(r1)
+ 8: GETL R22, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x28, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFEEC4D8: 90810054 stw r4,84(r1)
+ 13: GETL R4, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x54, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFEEC4DC: 7D800026 mfcr r12
+ 18: GETL CR, t14
+ 19: PUTL t14, R12
+ 20: INCEIPL $4
+
+ 0xFEEC4E0: 92E1002C stw r23,44(r1)
+ 21: GETL R23, t16
+ 22: GETL R1, t18
+ 23: ADDL $0x2C, t18
+ 24: STL t16, (t18)
+ 25: INCEIPL $4
+
+ 0xFEEC4E4: 3AE00000 li r23,0
+ 26: MOVL $0x0, t20
+ 27: PUTL t20, R23
+ 28: INCEIPL $4
+
+ 0xFEEC4E8: 82DE1B48 lwz r22,6984(r30)
+ 29: GETL R30, t22
+ 30: ADDL $0x1B48, t22
+ 31: LDL (t22), t24
+ 32: PUTL t24, R22
+ 33: INCEIPL $4
+
+ 0xFEEC4EC: 93E1004C stw r31,76(r1)
+ 34: GETL R31, t26
+ 35: GETL R1, t28
+ 36: ADDL $0x4C, t28
+ 37: STL t26, (t28)
+ 38: INCEIPL $4
+
+ 0xFEEC4F0: 7C7F1B78 or r31,r3,r3
+ 39: GETL R3, t30
+ 40: PUTL t30, R31
+ 41: INCEIPL $4
+
+ 0xFEEC4F4: 813600B8 lwz r9,184(r22)
+ 42: GETL R22, t32
+ 43: ADDL $0xB8, t32
+ 44: LDL (t32), t34
+ 45: PUTL t34, R9
+ 46: INCEIPL $4
+
+ 0xFEEC4F8: 93010030 stw r24,48(r1)
+ 47: GETL R24, t36
+ 48: GETL R1, t38
+ 49: ADDL $0x30, t38
+ 50: STL t36, (t38)
+ 51: INCEIPL $4
+
+ 0xFEEC4FC: 3169FFFF addic r11,r9,-1
+ 52: GETL R9, t40
+ 53: ADCL $0xFFFFFFFF, t40 (-wCa)
+ 54: PUTL t40, R11
+ 55: INCEIPL $4
+
+ 0xFEEC500: 7C0B4910 subfe r0,r11,r9
+ 56: GETL R11, t42
+ 57: GETL R9, t44
+ 58: SBBL t42, t44 (-rCa-wCa)
+ 59: PUTL t44, R0
+ 60: INCEIPL $4
+
+ 0xFEEC504: 93210034 stw r25,52(r1)
+ 61: GETL R25, t46
+ 62: GETL R1, t48
+ 63: ADDL $0x34, t48
+ 64: STL t46, (t48)
+ 65: INCEIPL $4
+
+ 0xFEEC508: 2D800000 cmpi cr3,r0,0
+ 66: GETL R0, t50
+ 67: CMP0L t50, t52 (-rSo)
+ 68: ICRFL t52, $0x3, CR
+ 69: INCEIPL $4
+
+ 0xFEEC50C: 93410038 stw r26,56(r1)
+ 70: GETL R26, t54
+ 71: GETL R1, t56
+ 72: ADDL $0x38, t56
+ 73: STL t54, (t56)
+ 74: INCEIPL $4
+
+ 0xFEEC510: 9361003C stw r27,60(r1)
+ 75: GETL R27, t58
+ 76: GETL R1, t60
+ 77: ADDL $0x3C, t60
+ 78: STL t58, (t60)
+ 79: INCEIPL $4
+
+ 0xFEEC514: 93810040 stw r28,64(r1)
+ 80: GETL R28, t62
+ 81: GETL R1, t64
+ 82: ADDL $0x40, t64
+ 83: STL t62, (t64)
+ 84: INCEIPL $4
+
+ 0xFEEC518: 93A10044 stw r29,68(r1)
+ 85: GETL R29, t66
+ 86: GETL R1, t68
+ 87: ADDL $0x44, t68
+ 88: STL t66, (t68)
+ 89: INCEIPL $4
+
+ 0xFEEC51C: 91810024 stw r12,36(r1)
+ 90: GETL R12, t70
+ 91: GETL R1, t72
+ 92: ADDL $0x24, t72
+ 93: STL t70, (t72)
+ 94: INCEIPL $4
+
+ 0xFEEC520: 408E0248 bc 4,14,0xFEEC768
+ 95: Jc14o $0xFEEC768
+
+
+. 0 FEEC4CC 88
+. 93 C1 00 48 7F C8 02 A6 92 C1 00 28 90 81 00 54 7D 80 00 26 92 E1 00 2C 3A E0 00 00 82 DE 1B 48 93 E1 00 4C 7C 7F 1B 78 81 36 00 B8 93 01 00 30 31 69 FF FF 7C 0B 49 10 93 21 00 34 2D 80 00 00 93 41 00 38 93 61 00 3C 93 81 00 40 93 A1 00 44 91 81 00 24 40 8E 02 48
+
+==== BB 1481 (0xFEEC524) approx BBs exec'd 0 ====
+
+ 0xFEEC524: 807E05E4 lwz r3,1508(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5E4, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEEC528: 92E10014 stw r23,20(r1)
+ 5: GETL R23, t4
+ 6: GETL R1, t6
+ 7: ADDL $0x14, t6
+ 8: STL t4, (t6)
+ 9: INCEIPL $4
+
+ 0xFEEC52C: 90610010 stw r3,16(r1)
+ 10: GETL R3, t8
+ 11: GETL R1, t10
+ 12: ADDL $0x10, t10
+ 13: STL t8, (t10)
+ 14: INCEIPL $4
+
+ 0xFEEC530: 2E1F0000 cmpi cr4,r31,0
+ 15: GETL R31, t12
+ 16: CMP0L t12, t14 (-rSo)
+ 17: ICRFL t14, $0x4, CR
+ 18: INCEIPL $4
+
+ 0xFEEC534: 41920050 bc 12,18,0xFEEC584
+ 19: Js18o $0xFEEC584
+
+
+. 0 FEEC524 20
+. 80 7E 05 E4 92 E1 00 14 90 61 00 10 2E 1F 00 00 41 92 00 50
+
+==== BB 1482 (0xFEEC584) approx BBs exec'd 0 ====
+
+ 0xFEEC584: 831E1BEC lwz r24,7148(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BEC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R24
+ 4: INCEIPL $4
+
+ 0xFEEC588: 833E05EC lwz r25,1516(r30)
+ 5: GETL R30, t4
+ 6: ADDL $0x5EC, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R25
+ 9: INCEIPL $4
+
+ 0xFEEC58C: 83F80000 lwz r31,0(r24)
+ 10: GETL R24, t8
+ 11: LDL (t8), t10
+ 12: PUTL t10, R31
+ 13: INCEIPL $4
+
+ 0xFEEC590: 83990000 lwz r28,0(r25)
+ 14: GETL R25, t12
+ 15: LDL (t12), t14
+ 16: PUTL t14, R28
+ 17: INCEIPL $4
+
+ 0xFEEC594: 2C9F0000 cmpi cr1,r31,0
+ 18: GETL R31, t16
+ 19: CMP0L t16, t18 (-rSo)
+ 20: ICRFL t18, $0x1, CR
+ 21: INCEIPL $4
+
+ 0xFEEC598: 41860128 bc 12,6,0xFEEC6C0
+ 22: Js06o $0xFEEC6C0
+
+
+. 0 FEEC584 24
+. 83 1E 1B EC 83 3E 05 EC 83 F8 00 00 83 99 00 00 2C 9F 00 00 41 86 01 28
+
+==== BB 1483 (0xFEEC59C) approx BBs exec'd 0 ====
+
+ 0xFEEC59C: 835E05E8 lwz r26,1512(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x5E8, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R26
+ 4: INCEIPL $4
+
+ 0xFEEC5A0: 3B600000 li r27,0
+ 5: MOVL $0x0, t4
+ 6: PUTL t4, R27
+ 7: INCEIPL $4
+
+ 0xFEEC5A4: 93FA0000 stw r31,0(r26)
+ 8: GETL R31, t6
+ 9: GETL R26, t8
+ 10: STL t6, (t8)
+ 11: INCEIPL $4
+
+ 0xFEEC5A8: 4192005C bc 12,18,0xFEEC604
+ 12: Js18o $0xFEEC604
+
+
+. 0 FEEC59C 16
+. 83 5E 05 E8 3B 60 00 00 93 FA 00 00 41 92 00 5C
+
+==== BB 1484 (0xFEEC604) approx BBs exec'd 0 ====
+
+ 0xFEEC604: 807F0060 lwz r3,96(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R3
+ 4: INCEIPL $4
+
+ 0xFEEC608: 2F030000 cmpi cr6,r3,0
+ 5: GETL R3, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x6, CR
+ 8: INCEIPL $4
+
+ 0xFEEC60C: 40990144 bc 4,25,0xFEEC750
+ 9: Jc25o $0xFEEC750
+
+
+. 0 FEEC604 12
+. 80 7F 00 60 2F 03 00 00 40 99 01 44
+
+==== BB 1485 (0xFEEC750) approx BBs exec'd 0 ====
+
+ 0xFEEC750: 817F0014 lwz r11,20(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x14, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R11
+ 4: INCEIPL $4
+
+ 0xFEEC754: 813F0010 lwz r9,16(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x10, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R9
+ 9: INCEIPL $4
+
+ 0xFEEC758: 7C8B4840 cmpl cr1,r11,r9
+ 10: GETL R11, t8
+ 11: GETL R9, t10
+ 12: CMPUL t8, t10, t12 (-rSo)
+ 13: ICRFL t12, $0x1, CR
+ 14: INCEIPL $4
+
+ 0xFEEC75C: 40A5FEB4 bc 5,5,0xFEEC610
+ 15: Jc05o $0xFEEC610
+
+
+. 0 FEEC750 16
+. 81 7F 00 14 81 3F 00 10 7C 8B 48 40 40 A5 FE B4
+
+==== BB 1486 (0xFEEC610) approx BBs exec'd 0 ====
+
+ 0xFEEC610: 895F0046 lbz r10,70(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x46, t0
+ 2: LDB (t0), t2
+ 3: PUTL t2, R10
+ 4: INCEIPL $4
+
+ 0xFEEC614: 2C0A0000 cmpi cr0,r10,0
+ 5: GETL R10, t4
+ 6: CMP0L t4, t6 (-rSo)
+ 7: ICRFL t6, $0x0, CR
+ 8: INCEIPL $4
+
+ 0xFEEC618: 40820044 bc 4,2,0xFEEC65C
+ 9: Jc02o $0xFEEC65C
+
+
+. 0 FEEC610 12
+. 89 5F 00 46 2C 0A 00 00 40 82 00 44
+
+==== BB 1487 (0xFEEC61C) approx BBs exec'd 0 ====
+
+ 0xFEEC61C: 40990040 bc 4,25,0xFEEC65C
+ 0: Jc25o $0xFEEC65C
+
+
+. 0 FEEC61C 4
+. 40 99 00 40
+
+==== BB 1488 (0xFEEC65C) approx BBs exec'd 0 ====
+
+ 0xFEEC65C: 41920044 bc 12,18,0xFEEC6A0
+ 0: Js18o $0xFEEC6A0
+
+
+. 0 FEEC65C 4
+. 41 92 00 44
+
+==== BB 1489 (0xFEEC6A0) approx BBs exec'd 0 ====
+
+ 0xFEEC6A0: 80190000 lwz r0,0(r25)
+ 0: GETL R25, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEEC6A4: 937A0000 stw r27,0(r26)
+ 4: GETL R27, t4
+ 5: GETL R26, t6
+ 6: STL t4, (t6)
+ 7: INCEIPL $4
+
+ 0xFEEC6A8: 7F9C0000 cmp cr7,r28,r0
+ 8: GETL R28, t8
+ 9: GETL R0, t10
+ 10: CMPL t8, t10, t12 (-rSo)
+ 11: ICRFL t12, $0x7, CR
+ 12: INCEIPL $4
+
+ 0xFEEC6AC: 419E009C bc 12,30,0xFEEC748
+ 13: Js30o $0xFEEC748
+
+
+. 0 FEEC6A0 16
+. 80 19 00 00 93 7A 00 00 7F 9C 00 00 41 9E 00 9C
+
+==== BB 1490 (0xFEEC748) approx BBs exec'd 0 ====
+
+ 0xFEEC748: 83FF0034 lwz r31,52(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x34, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R31
+ 4: INCEIPL $4
+
+ 0xFEEC74C: 4BFFFF6C b 0xFEEC6B8
+ 5: JMPo $0xFEEC6B8 ($4)
+
+
+. 0 FEEC748 8
+. 83 FF 00 34 4B FF FF 6C
+
+==== BB 1491 (0xFEEC6B8) approx BBs exec'd 0 ====
+
+ 0xFEEC6B8: 2C1F0000 cmpi cr0,r31,0
+ 0: GETL R31, t0
+ 1: CMP0L t0, t2 (-rSo)
+ 2: ICRFL t2, $0x0, CR
+ 3: INCEIPL $4
+
+ 0xFEEC6BC: 4082FEE8 bc 4,2,0xFEEC5A4
+ 4: Jc02o $0xFEEC5A4
+
+
+. 0 FEEC6B8 8
+. 2C 1F 00 00 40 82 FE E8
+
+==== BB 1492 (0xFEEC5A4) approx BBs exec'd 0 ====
+
+ 0xFEEC5A4: 93FA0000 stw r31,0(r26)
+ 0: GETL R31, t0
+ 1: GETL R26, t2
+ 2: STL t0, (t2)
+ 3: INCEIPL $4
+
+ 0xFEEC5A8: 4192005C bc 12,18,0xFEEC604
+ 4: Js18o $0xFEEC604
+
+
+. 0 FEEC5A4 8
+. 93 FA 00 00 41 92 00 5C
+
+==== BB 1493 (0xFEEC6C0) approx BBs exec'd 0 ====
+
+ 0xFEEC6C0: 41920038 bc 12,18,0xFEEC6F8
+ 0: Js18o $0xFEEC6F8
+
+
+. 0 FEEC6C0 4
+. 41 92 00 38
+
+==== BB 1494 (0xFEEC6F8) approx BBs exec'd 0 ====
+
+ 0xFEEC6F8: 408E0088 bc 4,14,0xFEEC780
+ 0: Jc14o $0xFEEC780
+
+
+. 0 FEEC6F8 4
+. 40 8E 00 88
+
+==== BB 1495 (0xFEEC6FC) approx BBs exec'd 0 ====
+
+ 0xFEEC6FC: 7EE3BB78 or r3,r23,r23
+ 0: GETL R23, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEEC700: 81810024 lwz r12,36(r1)
+ 3: GETL R1, t2
+ 4: ADDL $0x24, t2
+ 5: LDL (t2), t4
+ 6: PUTL t4, R12
+ 7: INCEIPL $4
+
+ 0xFEEC704: 82E10054 lwz r23,84(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x54, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R23
+ 12: INCEIPL $4
+
+ 0xFEEC708: 82C10028 lwz r22,40(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x28, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R22
+ 17: INCEIPL $4
+
+ 0xFEEC70C: 7D818120 mtcrf 0x18,r12
+ 18: GETL R12, t14
+ 19: ICRFL t14, $0x3, CR
+ 20: ICRFL t14, $0x4, CR
+ 21: INCEIPL $4
+
+ 0xFEEC710: 7EE803A6 mtlr r23
+ 22: GETL R23, t16
+ 23: PUTL t16, LR
+ 24: INCEIPL $4
+
+ 0xFEEC714: 83010030 lwz r24,48(r1)
+ 25: GETL R1, t18
+ 26: ADDL $0x30, t18
+ 27: LDL (t18), t20
+ 28: PUTL t20, R24
+ 29: INCEIPL $4
+
+ 0xFEEC718: 82E1002C lwz r23,44(r1)
+ 30: GETL R1, t22
+ 31: ADDL $0x2C, t22
+ 32: LDL (t22), t24
+ 33: PUTL t24, R23
+ 34: INCEIPL $4
+
+ 0xFEEC71C: 83210034 lwz r25,52(r1)
+ 35: GETL R1, t26
+ 36: ADDL $0x34, t26
+ 37: LDL (t26), t28
+ 38: PUTL t28, R25
+ 39: INCEIPL $4
+
+ 0xFEEC720: 83410038 lwz r26,56(r1)
+ 40: GETL R1, t30
+ 41: ADDL $0x38, t30
+ 42: LDL (t30), t32
+ 43: PUTL t32, R26
+ 44: INCEIPL $4
+
+ 0xFEEC724: 8361003C lwz r27,60(r1)
+ 45: GETL R1, t34
+ 46: ADDL $0x3C, t34
+ 47: LDL (t34), t36
+ 48: PUTL t36, R27
+ 49: INCEIPL $4
+
+ 0xFEEC728: 83810040 lwz r28,64(r1)
+ 50: GETL R1, t38
+ 51: ADDL $0x40, t38
+ 52: LDL (t38), t40
+ 53: PUTL t40, R28
+ 54: INCEIPL $4
+
+ 0xFEEC72C: 83A10044 lwz r29,68(r1)
+ 55: GETL R1, t42
+ 56: ADDL $0x44, t42
+ 57: LDL (t42), t44
+ 58: PUTL t44, R29
+ 59: INCEIPL $4
+
+ 0xFEEC730: 83C10048 lwz r30,72(r1)
+ 60: GETL R1, t46
+ 61: ADDL $0x48, t46
+ 62: LDL (t46), t48
+ 63: PUTL t48, R30
+ 64: INCEIPL $4
+
+ 0xFEEC734: 83E1004C lwz r31,76(r1)
+ 65: GETL R1, t50
+ 66: ADDL $0x4C, t50
+ 67: LDL (t50), t52
+ 68: PUTL t52, R31
+ 69: INCEIPL $4
+
+ 0xFEEC738: 38210050 addi r1,r1,80
+ 70: GETL R1, t54
+ 71: ADDL $0x50, t54
+ 72: PUTL t54, R1
+ 73: INCEIPL $4
+
+ 0xFEEC73C: 4E800020 blr
+ 74: GETL LR, t56
+ 75: JMPo-r t56 ($4)
+
+
+. 0 FEEC6FC 68
+. 7E E3 BB 78 81 81 00 24 82 E1 00 54 82 C1 00 28 7D 81 81 20 7E E8 03 A6 83 01 00 30 82 E1 00 2C 83 21 00 34 83 41 00 38 83 61 00 3C 83 81 00 40 83 A1 00 44 83 C1 00 48 83 E1 00 4C 38 21 00 50 4E 80 00 20
+
+==== BB 1496 (0xFEECB38) approx BBs exec'd 0 ====
+
+ 0xFEECB38: 813E1BEC lwz r9,7148(r30)
+ 0: GETL R30, t0
+ 1: ADDL $0x1BEC, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R9
+ 4: INCEIPL $4
+
+ 0xFEECB3C: 7C7C1B78 or r28,r3,r3
+ 5: GETL R3, t4
+ 6: PUTL t4, R28
+ 7: INCEIPL $4
+
+ 0xFEECB40: 83E90000 lwz r31,0(r9)
+ 8: GETL R9, t6
+ 9: LDL (t6), t8
+ 10: PUTL t8, R31
+ 11: INCEIPL $4
+
+ 0xFEECB44: 2F9F0000 cmpi cr7,r31,0
+ 12: GETL R31, t10
+ 13: CMP0L t10, t12 (-rSo)
+ 14: ICRFL t12, $0x7, CR
+ 15: INCEIPL $4
+
+ 0xFEECB48: 419E0080 bc 12,30,0xFEECBC8
+ 16: Js30o $0xFEECBC8
+
+
+. 0 FEECB38 20
+. 81 3E 1B EC 7C 7C 1B 78 83 E9 00 00 2F 9F 00 00 41 9E 00 80
+
+==== BB 1497 (0xFEECB4C) approx BBs exec'd 0 ====
+
+ 0xFEECB4C: 3BA0FFFF li r29,-1
+ 0: MOVL $0xFFFFFFFF, t0
+ 1: PUTL t0, R29
+ 2: INCEIPL $4
+
+ 0xFEECB50: 48000014 b 0xFEECB64
+ 3: JMPo $0xFEECB64 ($4)
+
+
+. 0 FEECB4C 8
+. 3B A0 FF FF 48 00 00 14
+
+==== BB 1498 (0xFEECB64) approx BBs exec'd 0 ====
+
+ 0xFEECB64: 801F0000 lwz r0,0(r31)
+ 0: GETL R31, t0
+ 1: LDL (t0), t2
+ 2: PUTL t2, R0
+ 3: INCEIPL $4
+
+ 0xFEECB68: 70090002 andi. r9,r0,0x2
+ 4: GETL R0, t4
+ 5: ANDL $0x2, t4
+ 6: PUTL t4, R9
+ 7: CMP0L t4, t6 (-rSo)
+ 8: ICRFL t6, $0x0, CR
+ 9: INCEIPL $4
+
+ 0xFEECB6C: 5403EFFE rlwinm r3,r0,29,31,31
+ 10: GETL R0, t8
+ 11: ROLL $0x1D, t8
+ 12: ANDL $0x1, t8
+ 13: PUTL t8, R3
+ 14: INCEIPL $4
+
+ 0xFEECB70: 2F830000 cmpi cr7,r3,0
+ 15: GETL R3, t10
+ 16: CMP0L t10, t12 (-rSo)
+ 17: ICRFL t12, $0x7, CR
+ 18: INCEIPL $4
+
+ 0xFEECB74: 40A2FFE0 bc 5,2,0xFEECB54
+ 19: Jc02o $0xFEECB54
+
+
+. 0 FEECB64 20
+. 80 1F 00 00 70 09 00 02 54 03 EF FE 2F 83 00 00 40 A2 FF E0
+
+==== BB 1499 (0xFEECB54) approx BBs exec'd 0 ====
+
+ 0xFEECB54: 93BF0060 stw r29,96(r31)
+ 0: GETL R29, t0
+ 1: GETL R31, t2
+ 2: ADDL $0x60, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFEECB58: 83FF0034 lwz r31,52(r31)
+ 5: GETL R31, t4
+ 6: ADDL $0x34, t4
+ 7: LDL (t4), t6
+ 8: PUTL t6, R31
+ 9: INCEIPL $4
+
+ 0xFEECB5C: 2F1F0000 cmpi cr6,r31,0
+ 10: GETL R31, t8
+ 11: CMP0L t8, t10 (-rSo)
+ 12: ICRFL t10, $0x6, CR
+ 13: INCEIPL $4
+
+ 0xFEECB60: 419A0068 bc 12,26,0xFEECBC8
+ 14: Js26o $0xFEECBC8
+
+
+. 0 FEECB54 16
+. 93 BF 00 60 83 FF 00 34 2F 1F 00 00 41 9A 00 68
+
+==== BB 1500 (0xFEECB78) approx BBs exec'd 0 ====
+
+ 0xFEECB78: 70091000 andi. r9,r0,0x1000
+ 0: GETL R0, t0
+ 1: ANDL $0x1000, t0
+ 2: PUTL t0, R9
+ 3: CMP0L t0, t2 (-rSo)
+ 4: ICRFL t2, $0x0, CR
+ 5: INCEIPL $4
+
+ 0xFEECB7C: 419E0008 bc 12,30,0xFEECB84
+ 6: Js30o $0xFEECB84
+
+
+. 0 FEECB78 8
+. 70 09 10 00 41 9E 00 08
+
+==== BB 1501 (0xFEECB84) approx BBs exec'd 0 ====
+
+ 0xFEECB84: 80DF0060 lwz r6,96(r31)
+ 0: GETL R31, t0
+ 1: ADDL $0x60, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R6
+ 4: INCEIPL $4
+
+ 0xFEECB88: 7FE3FB78 or r3,r31,r31
+ 5: GETL R31, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEECB8C: 38800000 li r4,0
+ 8: MOVL $0x0, t6
+ 9: PUTL t6, R4
+ 10: INCEIPL $4
+
+ 0xFEECB90: 38A00000 li r5,0
+ 11: MOVL $0x0, t8
+ 12: PUTL t8, R5
+ 13: INCEIPL $4
+
+ 0xFEECB94: 2C860000 cmpi cr1,r6,0
+ 14: GETL R6, t10
+ 15: CMP0L t10, t12 (-rSo)
+ 16: ICRFL t12, $0x1, CR
+ 17: INCEIPL $4
+
+ 0xFEECB98: 4186FFBC bc 12,6,0xFEECB54
+ 18: Js06o $0xFEECB54
+
+
+. 0 FEECB84 24
+. 80 DF 00 60 7F E3 FB 78 38 80 00 00 38 A0 00 00 2C 86 00 00 41 86 FF BC
+
+==== BB 1502 (0xFEECB80) approx BBs exec'd 0 ====
+
+ 0xFEECB80: 41A2FFD4 bc 13,2,0xFEECB54
+ 0: Js02o $0xFEECB54
+
+
+. 0 FEECB80 4
+. 41 A2 FF D4
+
+==== BB 1503 (0xFEECBC8) approx BBs exec'd 0 ====
+
+ 0xFEECBC8: 80810024 lwz r4,36(r1)
+ 0: GETL R1, t0
+ 1: ADDL $0x24, t0
+ 2: LDL (t0), t2
+ 3: PUTL t2, R4
+ 4: INCEIPL $4
+
+ 0xFEECBCC: 7F83E378 or r3,r28,r28
+ 5: GETL R28, t4
+ 6: PUTL t4, R3
+ 7: INCEIPL $4
+
+ 0xFEECBD0: 83A10014 lwz r29,20(r1)
+ 8: GETL R1, t6
+ 9: ADDL $0x14, t6
+ 10: LDL (t6), t8
+ 11: PUTL t8, R29
+ 12: INCEIPL $4
+
+ 0xFEECBD4: 83810010 lwz r28,16(r1)
+ 13: GETL R1, t10
+ 14: ADDL $0x10, t10
+ 15: LDL (t10), t12
+ 16: PUTL t12, R28
+ 17: INCEIPL $4
+
+ 0xFEECBD8: 7C8803A6 mtlr r4
+ 18: GETL R4, t14
+ 19: PUTL t14, LR
+ 20: INCEIPL $4
+
+ 0xFEECBDC: 83C10018 lwz r30,24(r1)
+ 21: GETL R1, t16
+ 22: ADDL $0x18, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R30
+ 25: INCEIPL $4
+
+ 0xFEECBE0: 83E1001C lwz r31,28(r1)
+ 26: GETL R1, t20
+ 27: ADDL $0x1C, t20
+ 28: LDL (t20), t22
+ 29: PUTL t22, R31
+ 30: INCEIPL $4
+
+ 0xFEECBE4: 38210020 addi r1,r1,32
+ 31: GETL R1, t24
+ 32: ADDL $0x20, t24
+ 33: PUTL t24, R1
+ 34: INCEIPL $4
+
+ 0xFEECBE8: 4E800020 blr
+ 35: GETL LR, t26
+ 36: JMPo-r t26 ($4)
+
+
+. 0 FEECBC8 36
+. 80 81 00 24 7F 83 E3 78 83 A1 00 14 83 81 00 10 7C 88 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
+
+==== BB 1504 (0xFEB3CB8) approx BBs exec'd 0 ====
+
+ 0xFEB3CB8: 7F9FE840 cmpl cr7,r31,r29
+ 0: GETL R31, t0
+ 1: GETL R29, t2
+ 2: CMPUL t0, t2, t4 (-rSo)
+ 3: ICRFL t4, $0x7, CR
+ 4: INCEIPL $4
+
+ 0xFEB3CBC: 419CFFEC bc 12,28,0xFEB3CA8
+ 5: Js28o $0xFEB3CA8
+
+
+. 0 FEB3CB8 8
+. 7F 9F E8 40 41 9C FF EC
+
+==== BB 1505 (0xFEB3CC0) approx BBs exec'd 0 ====
+
+ 0xFEB3CC0: 7F83E378 or r3,r28,r28
+ 0: GETL R28, t0
+ 1: PUTL t0, R3
+ 2: INCEIPL $4
+
+ 0xFEB3CC4: 48062141 bl 0xFF15E04
+ 3: MOVL $0xFEB3CC8, t2
+ 4: PUTL t2, LR
+ 5: JMPo-c $0xFF15E04 ($4)
+
+
+. 0 FEB3CC0 8
+. 7F 83 E3 78 48 06 21 41
+
+==== BB 1506 __GI__exit(0xFF15E04) approx BBs exec'd 0 ====
+
+ 0xFF15E04: 9421FFE0 stwu r1,-32(r1)
+ 0: GETL R1, t0
+ 1: GETL R1, t2
+ 2: ADDL $0xFFFFFFE0, t2
+ 3: PUTL t2, R1
+ 4: STL t0, (t2)
+ 5: INCEIPL $4
+
+ 0xFF15E08: 480B2049 bl 0xFFC7E50
+ 6: MOVL $0xFF15E0C, t4
+ 7: PUTL t4, LR
+ 8: JMPo-c $0xFFC7E50 ($4)
+
+
+. 0 FF15E04 8
+. 94 21 FF E0 48 0B 20 49
+
+==== BB 1507 (0xFF15E0C) approx BBs exec'd 0 ====
+
+ 0xFF15E0C: 93C10018 stw r30,24(r1)
+ 0: GETL R30, t0
+ 1: GETL R1, t2
+ 2: ADDL $0x18, t2
+ 3: STL t0, (t2)
+ 4: INCEIPL $4
+
+ 0xFF15E10: 7FC802A6 mflr r30
+ 5: GETL LR, t4
+ 6: PUTL t4, R30
+ 7: INCEIPL $4
+
+ 0xFF15E14: 93A10014 stw r29,20(r1)
+ 8: GETL R29, t6
+ 9: GETL R1, t8
+ 10: ADDL $0x14, t8
+ 11: STL t6, (t8)
+ 12: INCEIPL $4
+
+ 0xFF15E18: 93E1001C stw r31,28(r1)
+ 13: GETL R31, t10
+ 14: GETL R1, t12
+ 15: ADDL $0x1C, t12
+ 16: STL t10, (t12)
+ 17: INCEIPL $4
+
+ 0xFF15E1C: 7C7F1B78 or r31,r3,r3
+ 18: GETL R3, t14
+ 19: PUTL t14, R31
+ 20: INCEIPL $4
+
+ 0xFF15E20: 813E1C4C lwz r9,7244(r30)
+ 21: GETL R30, t16
+ 22: ADDL $0x1C4C, t16
+ 23: LDL (t16), t18
+ 24: PUTL t18, R9
+ 25: INCEIPL $4
+
+ 0xFF15E24: 7FA91214 add r29,r9,r2
+ 26: GETL R9, t20
+ 27: GETL R2, t22
+ 28: ADDL t20, t22
+ 29: PUTL t22, R29
+ 30: INCEIPL $4
+
+ 0xFF15E28: 380000EA li r0,234
+ 31: MOVL $0xEA, t24
+ 32: PUTL t24, R0
+ 33: INCEIPL $4
+
+ 0xFF15E2C: 7FE3FB78 or r3,r31,r31
+ 34: GETL R31, t26
+ 35: PUTL t26, R3
+ 36: INCEIPL $4
+
+ 0xFF15E30: 44000002 sc
+ 37: JMPo-sys $0xFF15E34 ($4)
+
+
+. 0 FF15E0C 40
+. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 93 E1 00 1C 7C 7F 1B 78 81 3E 1C 4C 7F A9 12 14 38 00 00 EA 7F E3 FB 78 44 00 00 02
+
diff --git a/main/VEX/orig_x86/exit42.orig b/main/VEX/orig_x86/exit42.orig
new file mode 100644
index 0000000..a2a3285
--- /dev/null
+++ b/main/VEX/orig_x86/exit42.orig
@@ -0,0 +1,12580 @@
+==6382== Nulgrind, a binary JIT-compiler for x86-linux.
+==6382== Copyright (C) 2002-2004, and GNU GPL'd, by Nicholas Nethercote.
+==6382== Using valgrind-2.1.2.CVS, a program supervision framework for x86-linux.
+==6382== Copyright (C) 2000-2004, and GNU GPL'd, by Julian Seward.
+==6382== For more details, rerun with: -v
+==6382==
+==== BB 0 (0x3A965880) in 0B, out 0B, BBs exec'd 0 ====
+ 0x3A965880: movl %esp,%eax
+ 0x3A965882: call 0x3A965C80
+. 0 3A965880 7
+. 89 E0 E8 F9 03 00 00
+
+==== BB 1 _dl_start(0x3A965C80) in 7B, out 55B, BBs exec'd 0 ====
+ 0x3A965C80: pushl %ebp
+ 0x3A965C81: movl %esp,%ebp
+ 0x3A965C83: pushl %edi
+ 0x3A965C84: pushl %esi
+ 0x3A965C85: pushl %ebx
+ 0x3A965C86: subl $0x54, %esp
+ 0x3A965C89: call 0x3A97592B
+. 1 3A965C80 14
+. 55 89 E5 57 56 53 83 EC 54 E8 9D FC 00 00
+
+==== BB 2 (0x3A97592B) in 21B, out 188B, BBs exec'd 0 ====
+ 0x3A97592B: movl (%esp,,),%ebx
+ 0x3A97592E: ret
+. 2 3A97592B 4
+. 8B 1C 24 C3
+
+==== BB 3 (0x3A965C8E) in 25B, out 228B, BBs exec'd 0 ====
+ 0x3A965C8E: addl $0x129DE, %ebx
+ 0x3A965C94: movl %eax,-48(%ebp)
+ 0x3A965C97: movl 0x0(%ebx),%edx
+ 0x3A965C9D: leal 0xFFFFFF50(%ebx), %eax
+ 0x3A965CA3: subl %edx,%eax
+ 0x3A965CA5: movl %eax,0xFFFFF9E4(%ebx)
+ 0x3A965CAB: addl %edx,%eax
+ 0x3A965CAD: movl %eax,0xFFFFF9EC(%ebx)
+ 0x3A965CB3: leal 0xFFFFF994(%ebx), %eax
+ 0x3A965CB9: movl %eax,-56(%ebp)
+ 0x3A965CBC: addl $0x50, %eax
+ 0x3A965CBF: movl -56(%ebp),%edi
+ 0x3A965CC2: movl %eax,-52(%ebp)
+ 0x3A965CC5: movl 8(%eax),%esi
+ 0x3A965CC8: addl $0x68, %edi
+ 0x3A965CCB: movl (%esi),%edx
+ 0x3A965CCD: testl %edx,%edx
+ 0x3A965CCF: jnz-8 0x3A965CE1
+. 3 3A965C8E 67
+. 81 C3 DE 29 01 00 89 45 D0 8B 93 00 00 00 00 8D 83 50 FF FF FF 29 D0 89 83 E4 F9 FF FF 01 D0 89 83 EC F9 FF FF 8D 83 94 F9 FF FF 89 45 C8 83 C0 50 8B 7D C8 89 45 CC 8B 70 08 83 C7 68 8B 16 85 D2 75 10
+
+==== BB 4 (0x3A965CE1) in 92B, out 457B, BBs exec'd 0 ====
+ 0x3A965CE1: cmpl $0x21, %edx
+ 0x3A965CE4: jle-8 0x3A965CD3
+. 4 3A965CE1 5
+. 83 FA 21 7E ED
+
+==== BB 5 (0x3A965CD3) in 97B, out 514B, BBs exec'd 0 ====
+ 0x3A965CD3: movl %esi,(%edi,%edx,4)
+ 0x3A965CD6: addl $0x8, %esi
+ 0x3A965CD9: movl (%esi),%eax
+ 0x3A965CDB: testl %eax,%eax
+ 0x3A965CDD: movl %eax,%edx
+ 0x3A965CDF: jz-8 0x3A965D10
+. 5 3A965CD3 14
+. 89 34 97 83 C6 08 8B 06 85 C0 89 C2 74 2F
+
+==== BB 6 (0x3A965CE6) in 111B, out 617B, BBs exec'd 0 ====
+ 0x3A965CE6: movl $0x6FFFFFFF,%eax
+ 0x3A965CEB: subl %edx,%eax
+ 0x3A965CED: cmpl $0xF, %eax
+ 0x3A965CF0: jnbe-32 0x3A965EE0
+. 6 3A965CE6 16
+. B8 FF FF FF 6F 29 D0 83 F8 0F 0F 87 EA 01 00 00
+
+==== BB 7 (0x3A965CF6) in 127B, out 690B, BBs exec'd 0 ====
+ 0x3A965CF6: movl $0x70000021,%eax
+ 0x3A965CFB: subl %edx,%eax
+ 0x3A965CFD: movl %esi,(%edi,%eax,4)
+ 0x3A965D00: addl $0x8, %esi
+ 0x3A965D03: movl (%esi),%eax
+ 0x3A965D05: testl %eax,%eax
+ 0x3A965D07: movl %eax,%edx
+ 0x3A965D09: jnz-8 0x3A965CE1
+. 7 3A965CF6 21
+. B8 21 00 00 70 29 D0 89 34 87 83 C6 08 8B 06 85 C0 89 C2 75 D6
+
+==== BB 8 (0x3A965D0B) in 148B, out 809B, BBs exec'd 0 ====
+ 0x3A965D0B: nop
+ 0x3A965D0C: leal 0(%esi,,), %esi
+ 0x3A965D10: movl -52(%ebp),%ecx
+ 0x3A965D13: movl (%ecx),%edx
+ 0x3A965D15: testl %edx,%edx
+ 0x3A965D17: jz-8 0x3A965D70
+. 8 3A965D0B 14
+. 90 8D 74 26 00 8B 4D CC 8B 11 85 D2 74 57
+
+==== BB 9 (0x3A965D19) in 162B, out 908B, BBs exec'd 0 ====
+ 0x3A965D19: movl 16(%edi),%eax
+ 0x3A965D1C: testl %eax,%eax
+ 0x3A965D1E: jz-8 0x3A965D23
+. 9 3A965D19 7
+. 8B 47 10 85 C0 74 03
+
+==== BB 10 (0x3A965D20) in 169B, out 980B, BBs exec'd 0 ====
+ 0x3A965D20: addl %edx,4(%eax)
+ 0x3A965D23: movl 12(%edi),%eax
+ 0x3A965D26: testl %eax,%eax
+ 0x3A965D28: jz-8 0x3A965D2D
+. 10 3A965D20 10
+. 01 50 04 8B 47 0C 85 C0 74 03
+
+==== BB 11 (0x3A965D2A) in 179B, out 1071B, BBs exec'd 0 ====
+ 0x3A965D2A: addl %edx,4(%eax)
+ 0x3A965D2D: movl 20(%edi),%eax
+ 0x3A965D30: testl %eax,%eax
+ 0x3A965D32: jz-8 0x3A965D37
+. 11 3A965D2A 10
+. 01 50 04 8B 47 14 85 C0 74 03
+
+==== BB 12 (0x3A965D34) in 189B, out 1162B, BBs exec'd 0 ====
+ 0x3A965D34: addl %edx,4(%eax)
+ 0x3A965D37: movl 24(%edi),%eax
+ 0x3A965D3A: testl %eax,%eax
+ 0x3A965D3C: jz-8 0x3A965D41
+. 12 3A965D34 10
+. 01 50 04 8B 47 18 85 C0 74 03
+
+==== BB 13 (0x3A965D3E) in 199B, out 1253B, BBs exec'd 0 ====
+ 0x3A965D3E: addl %edx,4(%eax)
+ 0x3A965D41: movl 68(%edi),%eax
+ 0x3A965D44: testl %eax,%eax
+ 0x3A965D46: jz-8 0x3A965D4B
+. 13 3A965D3E 10
+. 01 50 04 8B 47 44 85 C0 74 03
+
+==== BB 14 (0x3A965D48) in 209B, out 1344B, BBs exec'd 0 ====
+ 0x3A965D48: addl %edx,4(%eax)
+ 0x3A965D4B: movl 92(%edi),%eax
+ 0x3A965D4E: testl %eax,%eax
+ 0x3A965D50: jz-8 0x3A965D55
+. 14 3A965D48 10
+. 01 50 04 8B 47 5C 85 C0 74 03
+
+==== BB 15 (0x3A965D52) in 219B, out 1435B, BBs exec'd 0 ====
+ 0x3A965D52: addl %edx,4(%eax)
+ 0x3A965D55: movl 0xC4(%edi),%eax
+ 0x3A965D5B: testl %eax,%eax
+ 0x3A965D5D: jz-8 0x3A965D70
+. 15 3A965D52 13
+. 01 50 04 8B 87 C4 00 00 00 85 C0 74 11
+
+==== BB 16 (0x3A965D5F) in 232B, out 1529B, BBs exec'd 0 ====
+ 0x3A965D5F: addl %edx,4(%eax)
+ 0x3A965D62: leal 0(%esi,,), %esi
+ 0x3A965D69: leal 0(%edi,,), %edi
+ 0x3A965D70: movl 0xFFFFF9E4(%ebx),%eax
+ 0x3A965D76: testl %eax,%eax
+ 0x3A965D78: jnz-8 0x3A965D88
+. 16 3A965D5F 27
+. 01 50 04 8D B4 26 00 00 00 00 8D BC 27 00 00 00 00 8B 83 E4 F9 FF FF 85 C0 75 0E
+
+==== BB 17 (0x3A965D88) in 259B, out 1649B, BBs exec'd 0 ====
+ 0x3A965D88: movl $0x0, -36(%ebp)
+ 0x3A965D8F: movl -56(%ebp),%ecx
+ 0x3A965D92: movl 0xFFFFFA40(%ebx),%eax
+ 0x3A965D98: movl $0x0, -28(%ebp)
+ 0x3A965D9F: addl $0x50, %ecx
+ 0x3A965DA2: testl %eax,%eax
+ 0x3A965DA4: movl $0x0, -40(%ebp)
+ 0x3A965DAB: movl $0x0, -44(%ebp)
+ 0x3A965DB2: jz-8 0x3A965DC6
+. 17 3A965D88 44
+. C7 45 DC 00 00 00 00 8B 4D C8 8B 83 40 FA FF FF C7 45 E4 00 00 00 00 83 C1 50 85 C0 C7 45 D8 00 00 00 00 C7 45 D4 00 00 00 00 74 12
+
+==== BB 18 (0x3A965DB4) in 303B, out 1807B, BBs exec'd 0 ====
+ 0x3A965DB4: movl 4(%eax),%eax
+ 0x3A965DB7: movl %eax,-44(%ebp)
+ 0x3A965DBA: movl 0xFFFFFA44(%ebx),%eax
+ 0x3A965DC0: movl 4(%eax),%eax
+ 0x3A965DC3: movl %eax,-40(%ebp)
+ 0x3A965DC6: movl 0xFFFFFA4C(%ebx),%edi
+ 0x3A965DCC: testl %edi,%edi
+ 0x3A965DCE: jz-8 0x3A965DDC
+. 18 3A965DB4 28
+. 8B 40 04 89 45 D4 8B 83 44 FA FF FF 8B 40 04 89 45 D8 8B BB 4C FA FF FF 85 FF 74 0C
+
+==== BB 19 (0x3A965DD0) in 331B, out 1944B, BBs exec'd 0 ====
+ 0x3A965DD0: movl 0xFFFFFA04(%ebx),%eax
+ 0x3A965DD6: movl 4(%eax),%eax
+ 0x3A965DD9: addl %eax,-40(%ebp)
+ 0x3A965DDC: movl -44(%ebp),%edx
+ 0x3A965DDF: movl -40(%ebp),%esi
+ 0x3A965DE2: leal (%esi,%edx,1), %eax
+ 0x3A965DE5: movl %eax,-60(%ebp)
+ 0x3A965DE8: movl -56(%ebp),%eax
+ 0x3A965DEB: movl 80(%eax),%edi
+ 0x3A965DEE: movl 48(%ecx),%eax
+ 0x3A965DF1: movl 4(%eax),%eax
+ 0x3A965DF4: movl %eax,-64(%ebp)
+ 0x3A965DF7: movl 0xB4(%ecx),%eax
+ 0x3A965DFD: xorl %ecx, %ecx
+ 0x3A965DFF: testl %eax,%eax
+ 0x3A965E01: jz-8 0x3A965E06
+. 19 3A965DD0 51
+. 8B 83 04 FA FF FF 8B 40 04 01 45 D8 8B 55 D4 8B 75 D8 8D 04 16 89 45 C4 8B 45 C8 8B 78 50 8B 41 30 8B 40 04 89 45 C0 8B 81 B4 00 00 00 31 C9 85 C0 74 03
+
+==== BB 20 (0x3A965E03) in 382B, out 2177B, BBs exec'd 0 ====
+ 0x3A965E03: movl 4(%eax),%ecx
+ 0x3A965E06: movl %esi,%eax
+ 0x3A965E08: shrl $0x3, %eax
+ 0x3A965E0B: cmpl %ecx,%eax
+ 0x3A965E0D: jbe-8 0x3A965E11
+. 20 3A965E03 12
+. 8B 48 04 89 F0 C1 E8 03 39 C8 76 02
+
+==== BB 21 (0x3A965E0F) in 394B, out 2263B, BBs exec'd 0 ====
+ 0x3A965E0F: movl %ecx,%eax
+ 0x3A965E11: leal (%edx,%eax,8), %ecx
+ 0x3A965E14: cmpl %ecx,%edx
+ 0x3A965E16: jnb-8 0x3A965E2F
+. 21 3A965E0F 9
+. 89 C8 8D 0C C2 39 CA 73 17
+
+==== BB 22 (0x3A965E18) in 403B, out 2340B, BBs exec'd 0 ====
+ 0x3A965E18: nop
+ 0x3A965E19: leal 0(%esi,,), %esi
+ 0x3A965E20: movl (%edx),%esi
+ 0x3A965E22: movl %edi,%eax
+ 0x3A965E24: addl $0x8, %edx
+ 0x3A965E27: addl %esi,%eax
+ 0x3A965E29: addl %edi,(%eax)
+ 0x3A965E2B: cmpl %ecx,%edx
+ 0x3A965E2D: jb-8 0x3A965E20
+. 22 3A965E18 23
+. 90 8D B4 26 00 00 00 00 8B 32 89 F8 83 C2 08 01 F0 01 38 39 CA 72 F1
+
+==== BB 23 (0x3A965E20) in 426B, out 2460B, BBs exec'd 0 ====
+ 0x3A965E20: movl (%edx),%esi
+ 0x3A965E22: movl %edi,%eax
+ 0x3A965E24: addl $0x8, %edx
+ 0x3A965E27: addl %esi,%eax
+ 0x3A965E29: addl %edi,(%eax)
+ 0x3A965E2B: cmpl %ecx,%edx
+ 0x3A965E2D: jb-8 0x3A965E20
+. 23 3A965E20 15
+. 8B 32 89 F8 83 C2 08 01 F0 01 38 39 CA 72 F1
+
+==== BB 24 (0x3A965E2F) in 441B, out 2566B, BBs exec'd 0 ====
+ 0x3A965E2F: cmpl -60(%ebp),%ecx
+ 0x3A965E32: jnb-8 0x3A965E81
+. 24 3A965E2F 5
+. 3B 4D C4 73 4D
+
+==== BB 25 (0x3A965E34) in 446B, out 2631B, BBs exec'd 0 ====
+ 0x3A965E34: leal 0x0(%esi), %esi
+ 0x3A965E3A: leal 0x0(%edi), %edi
+ 0x3A965E40: movl 4(%ecx),%edx
+ 0x3A965E43: movl -64(%ebp),%esi
+ 0x3A965E46: movl %edx,%eax
+ 0x3A965E48: shrl $0x8, %eax
+ 0x3A965E4B: shll $0x4, %eax
+ 0x3A965E4E: addl %esi,%eax
+ 0x3A965E50: movl (%ecx),%esi
+ 0x3A965E52: addl %edi,%esi
+ 0x3A965E54: movl %esi,-68(%ebp)
+ 0x3A965E57: movzbl %dl,%esi
+ 0x3A965E5A: xorl %edx, %edx
+ 0x3A965E5C: cmpw $0x0, 14(%eax)
+ 0x3A965E61: jz-8 0x3A965E69
+. 25 3A965E34 47
+. 8D B6 00 00 00 00 8D BF 00 00 00 00 8B 51 04 8B 75 C0 89 D0 C1 E8 08 C1 E0 04 01 F0 8B 31 01 FE 89 75 BC 0F B6 F2 31 D2 66 83 78 0E 00 74 06
+
+==== BB 26 (0x3A965E63) in 493B, out 2819B, BBs exec'd 0 ====
+ 0x3A965E63: movl 0xFFFFF9E4(%ebx),%edx
+ 0x3A965E69: addl 4(%eax),%edx
+ 0x3A965E6C: leal -6(%esi), %eax
+ 0x3A965E6F: cmpl $0x1, %eax
+ 0x3A965E72: jnbe-8 0x3A965E79
+. 26 3A965E63 17
+. 8B 93 E4 F9 FF FF 03 50 04 8D 46 FA 83 F8 01 77 05
+
+==== BB 27 (0x3A965E74) in 510B, out 2920B, BBs exec'd 0 ====
+ 0x3A965E74: movl -68(%ebp),%eax
+ 0x3A965E77: movl %edx,(%eax)
+ 0x3A965E79: addl $0x8, %ecx
+ 0x3A965E7C: cmpl -60(%ebp),%ecx
+ 0x3A965E7F: jb-8 0x3A965E40
+. 27 3A965E74 13
+. 8B 45 BC 89 10 83 C1 08 3B 4D C4 72 BF
+
+==== BB 28 (0x3A965E40) in 523B, out 3018B, BBs exec'd 0 ====
+ 0x3A965E40: movl 4(%ecx),%edx
+ 0x3A965E43: movl -64(%ebp),%esi
+ 0x3A965E46: movl %edx,%eax
+ 0x3A965E48: shrl $0x8, %eax
+ 0x3A965E4B: shll $0x4, %eax
+ 0x3A965E4E: addl %esi,%eax
+ 0x3A965E50: movl (%ecx),%esi
+ 0x3A965E52: addl %edi,%esi
+ 0x3A965E54: movl %esi,-68(%ebp)
+ 0x3A965E57: movzbl %dl,%esi
+ 0x3A965E5A: xorl %edx, %edx
+ 0x3A965E5C: cmpw $0x0, 14(%eax)
+ 0x3A965E61: jz-8 0x3A965E69
+. 28 3A965E40 35
+. 8B 51 04 8B 75 C0 89 D0 C1 E8 08 C1 E0 04 01 F0 8B 31 01 FE 89 75 BC 0F B6 F2 31 D2 66 83 78 0E 00 74 06
+
+==== BB 29 (0x3A965E81) in 558B, out 3184B, BBs exec'd 0 ====
+ 0x3A965E81: movl -56(%ebp),%eax
+ 0x3A965E84: movl $0x1,%esi
+ 0x3A965E89: addl $0x50, %eax
+ 0x3A965E8C: call 0x3A96BD80
+. 29 3A965E81 16
+. 8B 45 C8 BE 01 00 00 00 83 C0 50 E8 EF 5E 00 00
+
+==== BB 30 _dl_setup_hash(0x3A96BD80) in 574B, out 3268B, BBs exec'd 0 ====
+ 0x3A96BD80: pushl %ebp
+ 0x3A96BD81: movl %eax,%ecx
+ 0x3A96BD83: movl 40(%eax),%eax
+ 0x3A96BD86: movl %esp,%ebp
+ 0x3A96BD88: testl %eax,%eax
+ 0x3A96BD8A: jz-8 0x3A96BDA9
+. 30 3A96BD80 12
+. 55 89 C1 8B 40 28 89 E5 85 C0 74 1D
+
+==== BB 31 (0x3A96BD8C) in 586B, out 3376B, BBs exec'd 0 ====
+ 0x3A96BD8C: movl 4(%eax),%eax
+ 0x3A96BD8F: movl (%eax),%edx
+ 0x3A96BD91: addl $0x8, %eax
+ 0x3A96BD94: movl %eax,0x168(%ecx)
+ 0x3A96BD9A: leal (%eax,%edx,4), %eax
+ 0x3A96BD9D: movl %edx,0x164(%ecx)
+ 0x3A96BDA3: movl %eax,0x16C(%ecx)
+ 0x3A96BDA9: popl %ebp
+ 0x3A96BDAA: ret
+. 31 3A96BD8C 31
+. 8B 40 04 8B 10 83 C0 08 89 81 68 01 00 00 8D 04 90 89 91 64 01 00 00 89 81 6C 01 00 00 5D C3
+
+==== BB 32 (0x3A965E91) in 617B, out 3509B, BBs exec'd 0 ====
+ 0x3A965E91: movl %esi,0xFFFFFB54(%ebx)
+ 0x3A965E97: leal 0xFFFEC994(%ebx), %eax
+ 0x3A965E9D: movl %eax,0xFFFFFB78(%ebx)
+ 0x3A965EA3: leal 0x228(%ebx), %eax
+ 0x3A965EA9: movl %eax,0xFFFFFB7C(%ebx)
+ 0x3A965EAF: leal 0xFFFEDD24(%ebx), %eax
+ 0x3A965EB5: movl %eax,4(%esp,,)
+ 0x3A965EB9: movl -48(%ebp),%edx
+ 0x3A965EBC: movl %ebp,0x128(%ebx)
+ 0x3A965EC2: movl %edx,(%esp,,)
+ 0x3A965EC5: call 0x3A972DC0
+. 32 3A965E91 57
+. 89 B3 54 FB FF FF 8D 83 94 C9 FE FF 89 83 78 FB FF FF 8D 83 28 02 00 00 89 83 7C FB FF FF 8D 83 24 DD FE FF 89 44 24 04 8B 55 D0 89 AB 28 01 00 00 89 14 24 E8 F6 CE 00 00
+
+==== BB 33 _dl_sysdep_start(0x3A972DC0) in 674B, out 3678B, BBs exec'd 0 ====
+ 0x3A972DC0: pushl %ebp
+ 0x3A972DC1: xorl %edx, %edx
+ 0x3A972DC3: movl %esp,%ebp
+ 0x3A972DC5: pushl %edi
+ 0x3A972DC6: xorl %edi, %edi
+ 0x3A972DC8: xorl %ecx, %ecx
+ 0x3A972DCA: pushl %esi
+ 0x3A972DCB: xorl %esi, %esi
+ 0x3A972DCD: pushl %ebx
+ 0x3A972DCE: subl $0x204, %esp
+ 0x3A972DD4: movl 8(%ebp),%eax
+ 0x3A972DD7: movl %edx,0xFFFFFE1C(%ebp)
+ 0x3A972DDD: xorl %edx, %edx
+ 0x3A972DDF: movl %edx,0xFFFFFE0C(%ebp)
+ 0x3A972DE5: movl (%eax),%edx
+ 0x3A972DE7: call 0x3A97592B
+. 33 3A972DC0 44
+. 55 31 D2 89 E5 57 31 FF 31 C9 56 31 F6 53 81 EC 04 02 00 00 8B 45 08 89 95 1C FE FF FF 31 D2 89 95 0C FE FF FF 8B 10 E8 3F 2B 00 00
+
+==== BB 34 (0x3A972DEC) in 718B, out 3927B, BBs exec'd 0 ====
+ 0x3A972DEC: addl $0x5880, %ebx
+ 0x3A972DF2: movl %eax,0x128(%ebx)
+ 0x3A972DF8: addl $0x4, %eax
+ 0x3A972DFB: movl %edx,0x20C(%ebx)
+ 0x3A972E01: leal (%eax,%edx,4), %edx
+ 0x3A972E04: movl %esi,0xFFFFFE14(%ebp)
+ 0x3A972E0A: movl 4(%edx),%esi
+ 0x3A972E0D: movl %edi,0xFFFFFE18(%ebp)
+ 0x3A972E13: xorl %edi, %edi
+ 0x3A972E15: testl %esi,%esi
+ 0x3A972E17: movl %eax,0x38(%ebx)
+ 0x3A972E1D: leal 4(%edx), %eax
+ 0x3A972E20: movl %ecx,0xFFFFFE10(%ebp)
+ 0x3A972E26: movl %eax,%ecx
+ 0x3A972E28: movl %edi,0xFFFFFE08(%ebp)
+ 0x3A972E2E: movl %eax,0x200(%ebx)
+ 0x3A972E34: jz-8 0x3A972E3F
+. 34 3A972DEC 74
+. 81 C3 80 58 00 00 89 83 28 01 00 00 83 C0 04 89 93 0C 02 00 00 8D 14 90 89 B5 14 FE FF FF 8B 72 04 89 BD 18 FE FF FF 31 FF 85 F6 89 83 38 00 00 00 8D 42 04 89 8D 10 FE FF FF 89 C1 89 BD 08 FE FF FF 89 83 00 02 00 00 74 09
+
+==== BB 35 (0x3A972E36) in 792B, out 4192B, BBs exec'd 0 ====
+ 0x3A972E36: addl $0x4, %ecx
+ 0x3A972E39: movl (%ecx),%edx
+ 0x3A972E3B: testl %edx,%edx
+ 0x3A972E3D: jnz-8 0x3A972E36
+. 35 3A972E36 9
+. 83 C1 04 8B 11 85 D2 75 F7
+
+==== BB 36 (0x3A972E3F) in 801B, out 4271B, BBs exec'd 0 ====
+ 0x3A972E3F: addl $0x4, %ecx
+ 0x3A972E42: leal 0xFFFED214(%ebx), %eax
+ 0x3A972E48: movl %ecx,%edx
+ 0x3A972E4A: movl %ecx,0x134(%ebx)
+ 0x3A972E50: movl (%ecx),%ecx
+ 0x3A972E52: movl %eax,0xFFFFFE20(%ebp)
+ 0x3A972E58: xorl %eax, %eax
+ 0x3A972E5A: testl %ecx,%ecx
+ 0x3A972E5C: movl %eax,0xFFFFFC20(%ebx)
+ 0x3A972E62: jz-8 0x3A972EB6
+. 36 3A972E3F 37
+. 83 C1 04 8D 83 14 D2 FE FF 89 CA 89 8B 34 01 00 00 8B 09 89 85 20 FE FF FF 31 C0 85 C9 89 83 20 FC FF FF 74 52
+
+==== BB 37 (0x3A972E64) in 838B, out 4429B, BBs exec'd 0 ====
+ 0x3A972E64: leal 0x0(%esi), %esi
+ 0x3A972E6A: leal 0x0(%edi), %edi
+ 0x3A972E70: leal -3(%ecx), %eax
+ 0x3A972E73: cmpl $0x1E, %eax
+ 0x3A972E76: jnbe-8 0x3A972EA0
+. 37 3A972E64 20
+. 8D B6 00 00 00 00 8D BF 00 00 00 00 8D 41 FD 83 F8 1E 77 28
+
+==== BB 38 (0x3A972EA0) in 858B, out 4522B, BBs exec'd 0 ====
+ 0x3A972EA0: addl $0x8, %edx
+ 0x3A972EA3: movl $0x1,%eax
+ 0x3A972EA8: shll %cl, %eax
+ 0x3A972EAA: orl %eax,0xFFFFFE0C(%ebp)
+ 0x3A972EB0: movl (%edx),%ecx
+ 0x3A972EB2: testl %ecx,%ecx
+ 0x3A972EB4: jnz-8 0x3A972E70
+. 38 3A972EA0 22
+. 83 C2 08 B8 01 00 00 00 D3 E0 09 85 0C FE FF FF 8B 0A 85 C9 75 BA
+
+==== BB 39 (0x3A972E70) in 880B, out 4648B, BBs exec'd 0 ====
+ 0x3A972E70: leal -3(%ecx), %eax
+ 0x3A972E73: cmpl $0x1E, %eax
+ 0x3A972E76: jnbe-8 0x3A972EA0
+. 39 3A972E70 8
+. 8D 41 FD 83 F8 1E 77 28
+
+==== BB 40 (0x3A972E78) in 888B, out 4715B, BBs exec'd 0 ====
+ 0x3A972E78: movl -9388(%ebx,%eax,4),%eax
+ 0x3A972E7F: addl %ebx,%eax
+ 0x3A972E81: jmp*l %eax
+. 40 3A972E78 11
+. 8B 84 83 54 DB FF FF 01 D8 FF E0
+
+==== BB 41 (0x3A9731AC) in 899B, out 4766B, BBs exec'd 0 ====
+ 0x3A9731AC: movl 4(%edx),%eax
+ 0x3A9731AF: movl %eax,0xFFFFFC54(%ebx)
+ 0x3A9731B5: jmp 0x3A972EA0
+. 41 3A9731AC 14
+. 8B 42 04 89 83 54 FC FF FF E9 E6 FC FF FF
+
+==== BB 42 (0x3A9731F2) in 913B, out 4826B, BBs exec'd 0 ====
+ 0x3A9731F2: movl 4(%edx),%eax
+ 0x3A9731F5: movl %eax,0xFFFFFC18(%ebx)
+ 0x3A9731FB: jmp 0x3A972E97
+. 42 3A9731F2 14
+. 8B 42 04 89 83 18 FC FF FF E9 97 FC FF FF
+
+==== BB 43 (0x3A972E97) in 927B, out 4886B, BBs exec'd 0 ====
+ 0x3A972E97: movl (%edx),%ecx
+ 0x3A972E99: leal 0(%esi,,), %esi
+ 0x3A972EA0: addl $0x8, %edx
+ 0x3A972EA3: movl $0x1,%eax
+ 0x3A972EA8: shll %cl, %eax
+ 0x3A972EAA: orl %eax,0xFFFFFE0C(%ebp)
+ 0x3A972EB0: movl (%edx),%ecx
+ 0x3A972EB2: testl %ecx,%ecx
+ 0x3A972EB4: jnz-8 0x3A972E70
+. 43 3A972E97 31
+. 8B 0A 8D B4 26 00 00 00 00 83 C2 08 B8 01 00 00 00 D3 E0 09 85 0C FE FF FF 8B 0A 85 C9 75 BA
+
+==== BB 44 (0x3A97319E) in 958B, out 5039B, BBs exec'd 0 ====
+ 0x3A97319E: movl 4(%edx),%eax
+ 0x3A9731A1: movl %eax,0xFFFFFC30(%ebx)
+ 0x3A9731A7: jmp 0x3A972E97
+. 44 3A97319E 14
+. 8B 42 04 89 83 30 FC FF FF E9 EB FC FF FF
+
+==== BB 45 (0x3A97320E) in 972B, out 5099B, BBs exec'd 0 ====
+ 0x3A97320E: movl 4(%edx),%eax
+ 0x3A973211: movl %eax,0xFFFFFE1C(%ebp)
+ 0x3A973217: jmp 0x3A972EA0
+. 45 3A97320E 14
+. 8B 42 04 89 85 1C FE FF FF E9 84 FC FF FF
+
+==== BB 46 (0x3A973200) in 986B, out 5159B, BBs exec'd 0 ====
+ 0x3A973200: movl 4(%edx),%eax
+ 0x3A973203: movl %eax,0xFFFFFE18(%ebp)
+ 0x3A973209: jmp 0x3A972EA0
+. 46 3A973200 14
+. 8B 42 04 89 85 18 FE FF FF E9 92 FC FF FF
+
+==== BB 47 (0x3A9731E4) in 1000B, out 5219B, BBs exec'd 0 ====
+ 0x3A9731E4: movl 4(%edx),%eax
+ 0x3A9731E7: movl %eax,0xFFFFFE20(%ebp)
+ 0x3A9731ED: jmp 0x3A972E97
+. 47 3A9731E4 14
+. 8B 42 04 89 85 20 FE FF FF E9 A5 FC FF FF
+
+==== BB 48 (0x3A9731D6) in 1014B, out 5279B, BBs exec'd 0 ====
+ 0x3A9731D6: movl 4(%edx),%eax
+ 0x3A9731D9: xorl %eax,0xFFFFFE14(%ebp)
+ 0x3A9731DF: jmp 0x3A972EA0
+. 48 3A9731D6 14
+. 8B 42 04 31 85 14 FE FF FF E9 BC FC FF FF
+
+==== BB 49 (0x3A9731C8) in 1028B, out 5348B, BBs exec'd 0 ====
+ 0x3A9731C8: movl 4(%edx),%eax
+ 0x3A9731CB: xorl %eax,0xFFFFFE10(%ebp)
+ 0x3A9731D1: jmp 0x3A972EA0
+. 49 3A9731C8 14
+. 8B 42 04 31 85 10 FE FF FF E9 CA FC FF FF
+
+==== BB 50 (0x3A972E83) in 1042B, out 5417B, BBs exec'd 0 ====
+ 0x3A972E83: movl $0xFFFFFFFF,%eax
+ 0x3A972E88: movl %eax,0xFFFFFE0C(%ebp)
+ 0x3A972E8E: movl 4(%edx),%eax
+ 0x3A972E91: movl %eax,0x130(%ebx)
+ 0x3A972E97: movl (%edx),%ecx
+ 0x3A972E99: leal 0(%esi,,), %esi
+ 0x3A972EA0: addl $0x8, %edx
+ 0x3A972EA3: movl $0x1,%eax
+ 0x3A972EA8: shll %cl, %eax
+ 0x3A972EAA: orl %eax,0xFFFFFE0C(%ebp)
+ 0x3A972EB0: movl (%edx),%ecx
+ 0x3A972EB2: testl %ecx,%ecx
+ 0x3A972EB4: jnz-8 0x3A972E70
+. 50 3A972E83 51
+. B8 FF FF FF FF 89 85 0C FE FF FF 8B 42 04 89 83 30 01 00 00 8B 0A 8D B4 26 00 00 00 00 83 C2 08 B8 01 00 00 00 D3 E0 09 85 0C FE FF FF 8B 0A 85 C9 75 BA
+
+==== BB 51 (0x3A9731BA) in 1093B, out 5614B, BBs exec'd 0 ====
+ 0x3A9731BA: movl 4(%edx),%eax
+ 0x3A9731BD: movl %eax,0xFFFFFC20(%ebx)
+ 0x3A9731C3: jmp 0x3A972EA0
+. 51 3A9731BA 14
+. 8B 42 04 89 83 20 FC FF FF E9 D8 FC FF FF
+
+==== BB 52 (0x3A972EB6) in 1107B, out 5674B, BBs exec'd 0 ====
+ 0x3A972EB6: leal -76(%ebp), %edx
+ 0x3A972EB9: leal 0xFFFFFE24(%ebp), %eax
+ 0x3A972EBF: movl %edx,0xFFFFFE04(%ebp)
+ 0x3A972EC5: movl %eax,(%esp,,)
+ 0x3A972EC8: call 0x3A974D50
+. 52 3A972EB6 23
+. 8D 55 B4 8D 85 24 FE FF FF 89 95 04 FE FF FF 89 04 24 E8 83 1E 00 00
+
+==== BB 53 uname(0x3A974D50) in 1130B, out 5765B, BBs exec'd 0 ====
+ 0x3A974D50: movl %ebx,%edx
+ 0x3A974D52: movl 4(%esp,,),%ebx
+ 0x3A974D56: movl $0x7A,%eax
+ 0x3A974D5B: int $0x80
+. 53 3A974D50 13
+. 89 DA 8B 5C 24 04 B8 7A 00 00 00 CD 80
+
+==== BB 54 (0x3A974D5D) in 1143B, out 5829B, BBs exec'd 0 ====
+ 0x3A974D5D: movl %edx,%ebx
+ 0x3A974D5F: cmpl $0xFFFFF001, %eax
+ 0x3A974D64: jnb-8 0x3A974D67
+. 54 3A974D5D 9
+. 89 D3 3D 01 F0 FF FF 73 01
+
+==== BB 55 (0x3A974D66) in 1152B, out 5899B, BBs exec'd 0 ====
+ 0x3A974D66: ret
+. 55 3A974D66 1
+. C3
+
+==== BB 56 (0x3A972ECD) in 1153B, out 5929B, BBs exec'd 0 ====
+ 0x3A972ECD: testl %eax,%eax
+ 0x3A972ECF: jnz-32 0x3A9730B1
+. 56 3A972ECD 8
+. 85 C0 0F 85 DC 01 00 00
+
+==== BB 57 (0x3A972ED5) in 1161B, out 5988B, BBs exec'd 0 ====
+ 0x3A972ED5: leal 0xFFFFFEA6(%ebp), %eax
+ 0x3A972EDB: movl %eax,0xFFFFFE04(%ebp)
+ 0x3A972EE1: movl 0xFFFFFE04(%ebp),%esi
+ 0x3A972EE7: xorl %eax, %eax
+ 0x3A972EE9: xorl %edi, %edi
+ 0x3A972EEB: movl %eax,0xFFFFFE00(%ebp)
+ 0x3A972EF1: movzbl (%esi),%edx
+ 0x3A972EF4: movb %dl,%al
+ 0x3A972EF6: subb $0x30, %al
+ 0x3A972EF8: cmpb $0x9, %al
+ 0x3A972EFA: jnbe-8 0x3A972F65
+. 57 3A972ED5 39
+. 8D 85 A6 FE FF FF 89 85 04 FE FF FF 8B B5 04 FE FF FF 31 C0 31 FF 89 85 00 FE FF FF 0F B6 16 88 D0 2C 30 3C 09 77 69
+
+==== BB 58 (0x3A972EFC) in 1200B, out 6164B, BBs exec'd 0 ====
+ 0x3A972EFC: leal 0(%esi,,), %esi
+ 0x3A972F00: incl %esi
+ 0x3A972F01: movsbl %dl,%eax
+ 0x3A972F04: leal -48(%eax), %edx
+ 0x3A972F07: movzbl (%esi),%ecx
+ 0x3A972F0A: movb %cl,%al
+ 0x3A972F0C: subb $0x30, %al
+ 0x3A972F0E: movb %cl,0xFFFFFDFF(%ebp)
+ 0x3A972F14: cmpb $0x9, %al
+ 0x3A972F16: jnbe-8 0x3A972F40
+. 58 3A972EFC 28
+. 8D 74 26 00 46 0F BE C2 8D 50 D0 0F B6 0E 88 C8 2C 30 88 8D FF FD FF FF 3C 09 77 28
+
+==== BB 59 (0x3A972F40) in 1228B, out 6330B, BBs exec'd 0 ====
+ 0x3A972F40: incl 0xFFFFFE00(%ebp)
+ 0x3A972F46: shll $0x8, %edi
+ 0x3A972F49: orl %edx,%edi
+ 0x3A972F4B: incl %esi
+ 0x3A972F4C: cmpb $0x2E, %cl
+ 0x3A972F4F: jnz-8 0x3A972F5C
+. 59 3A972F40 17
+. FF 85 00 FE FF FF C1 E7 08 09 D7 46 80 F9 2E 75 0B
+
+==== BB 60 (0x3A972F51) in 1245B, out 6441B, BBs exec'd 0 ====
+ 0x3A972F51: movzbl (%esi),%edx
+ 0x3A972F54: movb %dl,%al
+ 0x3A972F56: subb $0x30, %al
+ 0x3A972F58: cmpb $0x9, %al
+ 0x3A972F5A: jbe-8 0x3A972F00
+. 60 3A972F51 11
+. 0F B6 16 88 D0 2C 30 3C 09 76 A4
+
+==== BB 61 (0x3A972F00) in 1256B, out 6537B, BBs exec'd 0 ====
+ 0x3A972F00: incl %esi
+ 0x3A972F01: movsbl %dl,%eax
+ 0x3A972F04: leal -48(%eax), %edx
+ 0x3A972F07: movzbl (%esi),%ecx
+ 0x3A972F0A: movb %cl,%al
+ 0x3A972F0C: subb $0x30, %al
+ 0x3A972F0E: movb %cl,0xFFFFFDFF(%ebp)
+ 0x3A972F14: cmpb $0x9, %al
+ 0x3A972F16: jnbe-8 0x3A972F40
+. 61 3A972F00 24
+. 46 0F BE C2 8D 50 D0 0F B6 0E 88 C8 2C 30 88 8D FF FD FF FF 3C 09 77 28
+
+==== BB 62 (0x3A972F5C) in 1280B, out 6691B, BBs exec'd 0 ====
+ 0x3A972F5C: cmpl $0x2, 0xFFFFFE00(%ebp)
+ 0x3A972F63: jnle-8 0x3A972F77
+. 62 3A972F5C 9
+. 83 BD 00 FE FF FF 02 7F 12
+
+==== BB 63 (0x3A972F77) in 1289B, out 6757B, BBs exec'd 0 ====
+ 0x3A972F77: cmpl $0x20204, %edi
+ 0x3A972F7D: jbe-32 0x3A973240
+. 63 3A972F77 12
+. 81 FF 04 02 02 00 0F 86 BD 02 00 00
+
+==== BB 64 (0x3A972F83) in 1301B, out 6817B, BBs exec'd 0 ====
+ 0x3A972F83: cmpl $0xFFFFFFFF, 0xFFFFFE0C(%ebp)
+ 0x3A972F8A: movl %edi,0xFFFFFC1C(%ebx)
+ 0x3A972F90: jz-8 0x3A972FEA
+. 64 3A972F83 15
+. 83 BD 0C FE FF FF FF 89 BB 1C FC FF FF 74 58
+
+==== BB 65 (0x3A972FEA) in 1316B, out 6902B, BBs exec'd 0 ====
+ 0x3A972FEA: movl 0xFFFFFC18(%ebx),%edi
+ 0x3A972FF0: testl %edi,%edi
+ 0x3A972FF2: jnz-8 0x3A972FFF
+. 65 3A972FEA 10
+. 8B BB 18 FC FF FF 85 FF 75 0B
+
+==== BB 66 (0x3A972FFF) in 1326B, out 6977B, BBs exec'd 0 ====
+ 0x3A972FFF: movl 0xFFFFFD94(%ebx),%esi
+ 0x3A973005: testl %esi,%esi
+ 0x3A973007: jz-8 0x3A97301F
+. 66 3A972FFF 10
+. 8B B3 94 FD FF FF 85 F6 74 16
+
+==== BB 67 (0x3A97301F) in 1336B, out 7055B, BBs exec'd 0 ====
+ 0x3A97301F: movl $0x0, (%esp,,)
+ 0x3A973026: call 0x3A9738A0
+. 67 3A97301F 12
+. C7 04 24 00 00 00 00 E8 75 08 00 00
+
+==== BB 68 brk(0x3A9738A0) in 1348B, out 7112B, BBs exec'd 0 ====
+ 0x3A9738A0: pushl %ebp
+ 0x3A9738A1: movl %esp,%ebp
+ 0x3A9738A3: pushl %ebx
+ 0x3A9738A4: movl 8(%ebp),%ecx
+ 0x3A9738A7: call 0x3A97592B
+. 68 3A9738A0 12
+. 55 89 E5 53 8B 4D 08 E8 7F 20 00 00
+
+==== BB 69 (0x3A9738AC) in 1360B, out 7212B, BBs exec'd 0 ====
+ 0x3A9738AC: addl $0x4DC0, %ebx
+ 0x3A9738B2: xchgl %ecx, %ebx
+ 0x3A9738B4: movl $0x2D,%eax
+ 0x3A9738B9: int $0x80
+. 69 3A9738AC 15
+. 81 C3 C0 4D 00 00 87 CB B8 2D 00 00 00 CD 80
+
+==== BB 70 (0x3A9738BB) in 1375B, out 7280B, BBs exec'd 0 ====
+ 0x3A9738BB: xchgl %ecx, %ebx
+ 0x3A9738BD: movl %eax,0x144(%ebx)
+ 0x3A9738C3: xorl %edx, %edx
+ 0x3A9738C5: cmpl %ecx,%eax
+ 0x3A9738C7: jb-8 0x3A9738CE
+. 70 3A9738BB 14
+. 87 CB 89 83 44 01 00 00 31 D2 39 C8 72 05
+
+==== BB 71 (0x3A9738C9) in 1389B, out 7379B, BBs exec'd 0 ====
+ 0x3A9738C9: popl %ebx
+ 0x3A9738CA: movl %edx,%eax
+ 0x3A9738CC: popl %ebp
+ 0x3A9738CD: ret
+. 71 3A9738C9 5
+. 5B 89 D0 5D C3
+
+==== BB 72 (0x3A97302B) in 1394B, out 7451B, BBs exec'd 0 ====
+ 0x3A97302B: movl 0xFFFFFC20(%ebx),%eax
+ 0x3A973031: testl %eax,%eax
+ 0x3A973033: jz-8 0x3A973056
+. 72 3A97302B 10
+. 8B 83 20 FC FF FF 85 C0 74 21
+
+==== BB 73 (0x3A973035) in 1404B, out 7526B, BBs exec'd 0 ====
+ 0x3A973035: cmpb $0x0, (%eax)
+ 0x3A973038: jnz-8 0x3A973044
+. 73 3A973035 5
+. 80 38 00 75 0A
+
+==== BB 74 (0x3A973044) in 1409B, out 7586B, BBs exec'd 0 ====
+ 0x3A973044: testl %eax,%eax
+ 0x3A973046: jz-8 0x3A973056
+. 74 3A973044 4
+. 85 C0 74 0E
+
+==== BB 75 (0x3A973048) in 1413B, out 7645B, BBs exec'd 0 ====
+ 0x3A973048: movl %eax,(%esp,,)
+ 0x3A97304B: call 0x3A9752D0
+. 75 3A973048 8
+. 89 04 24 E8 80 22 00 00
+
+==== BB 76 strlen(0x3A9752D0) in 1421B, out 7700B, BBs exec'd 0 ====
+ 0x3A9752D0: movl 4(%esp,,),%eax
+ 0x3A9752D4: movl $0x3,%edx
+ 0x3A9752D9: andl %eax,%edx
+ 0x3A9752DB: jz-8 0x3A975301
+. 76 3A9752D0 13
+. 8B 44 24 04 BA 03 00 00 00 21 C2 74 24
+
+==== BB 77 (0x3A9752DD) in 1434B, out 7781B, BBs exec'd 0 ====
+ 0x3A9752DD: jp-8 0x3A9752F6
+. 77 3A9752DD 2
+. 7A 17
+
+==== BB 78 (0x3A9752F6) in 1436B, out 7828B, BBs exec'd 0 ====
+ 0x3A9752F6: cmpb %dh{si},(%eax)
+ 0x3A9752F8: jz-32 0x3A975386
+. 78 3A9752F6 8
+. 38 30 0F 84 88 00 00 00
+
+==== BB 79 (0x3A9752FE) in 1444B, out 7888B, BBs exec'd 0 ====
+ 0x3A9752FE: incl %eax
+ 0x3A9752FF: xorl %edx, %edx
+ 0x3A975301: movl (%eax),%ecx
+ 0x3A975303: addl $0x4, %eax
+ 0x3A975306: subl %ecx,%edx
+ 0x3A975308: addl $0xFEFEFEFF, %ecx
+ 0x3A97530E: decl %edx
+ 0x3A97530F: jnb-8 0x3A975369
+. 79 3A9752FE 19
+. 40 31 D2 8B 08 83 C0 04 29 CA 81 C1 FF FE FE FE 4A 73 58
+
+==== BB 80 (0x3A975369) in 1463B, out 8001B, BBs exec'd 0 ====
+ 0x3A975369: subl $0x4, %eax
+ 0x3A97536C: subl $0xFEFEFEFF, %ecx
+ 0x3A975372: cmpb $0x0, %cl
+ 0x3A975375: jz-8 0x3A975386
+. 80 3A975369 14
+. 83 E8 04 81 E9 FF FE FE FE 80 F9 00 74 0F
+
+==== BB 81 (0x3A975377) in 1477B, out 8088B, BBs exec'd 0 ====
+ 0x3A975377: incl %eax
+ 0x3A975378: testb %ch{bp},%ch{bp}
+ 0x3A97537A: jz-8 0x3A975386
+. 81 3A975377 5
+. 40 84 ED 74 0A
+
+==== BB 82 (0x3A97537C) in 1482B, out 8160B, BBs exec'd 0 ====
+ 0x3A97537C: shrl $0x10, %ecx
+ 0x3A97537F: incl %eax
+ 0x3A975380: cmpb $0x0, %cl
+ 0x3A975383: jz-8 0x3A975386
+. 82 3A97537C 9
+. C1 E9 10 40 80 F9 00 74 01
+
+==== BB 83 (0x3A975385) in 1491B, out 8242B, BBs exec'd 0 ====
+ 0x3A975385: incl %eax
+ 0x3A975386: subl 4(%esp,,),%eax
+ 0x3A97538A: ret
+. 83 3A975385 6
+. 40 2B 44 24 04 C3
+
+==== BB 84 (0x3A973050) in 1497B, out 8299B, BBs exec'd 0 ====
+ 0x3A973050: movl %eax,0xFFFFFC24(%ebx)
+ 0x3A973056: movl $0x0, (%esp,,)
+ 0x3A97305D: call 0x3A9738E0
+. 84 3A973050 18
+. 89 83 24 FC FF FF C7 04 24 00 00 00 00 E8 7E 08 00 00
+
+==== BB 85 sbrk(0x3A9738E0) in 1515B, out 8375B, BBs exec'd 0 ====
+ 0x3A9738E0: pushl %ebp
+ 0x3A9738E1: movl %esp,%ebp
+ 0x3A9738E3: subl $0x10, %esp
+ 0x3A9738E6: movl %ebx,-12(%ebp)
+ 0x3A9738E9: movl %edi,-4(%ebp)
+ 0x3A9738EC: movl 8(%ebp),%edi
+ 0x3A9738EF: call 0x3A97592B
+. 85 3A9738E0 20
+. 55 89 E5 83 EC 10 89 5D F4 89 7D FC 8B 7D 08 E8 37 20 00 00
+
+==== BB 86 (0x3A9738F4) in 1535B, out 8499B, BBs exec'd 0 ====
+ 0x3A9738F4: addl $0x4D78, %ebx
+ 0x3A9738FA: movl %esi,-8(%ebp)
+ 0x3A9738FD: movl 0x144(%ebx),%esi
+ 0x3A973903: testl %esi,%esi
+ 0x3A973905: jz-8 0x3A973911
+. 86 3A9738F4 19
+. 81 C3 78 4D 00 00 89 75 F8 8B B3 44 01 00 00 85 F6 74 0A
+
+==== BB 87 (0x3A973907) in 1554B, out 8606B, BBs exec'd 0 ====
+ 0x3A973907: movl 0x12C(%ebx),%eax
+ 0x3A97390D: testl %eax,%eax
+ 0x3A97390F: jz-8 0x3A97392C
+. 87 3A973907 10
+. 8B 83 2C 01 00 00 85 C0 74 1B
+
+==== BB 88 (0x3A97392C) in 1564B, out 8681B, BBs exec'd 0 ====
+ 0x3A97392C: testl %edi,%edi
+ 0x3A97392E: movl %esi,%edx
+ 0x3A973930: jnz-8 0x3A973941
+. 88 3A97392C 6
+. 85 FF 89 F2 75 0F
+
+==== BB 89 (0x3A973932) in 1570B, out 8750B, BBs exec'd 0 ====
+ 0x3A973932: movl -12(%ebp),%ebx
+ 0x3A973935: movl %edx,%eax
+ 0x3A973937: movl -8(%ebp),%esi
+ 0x3A97393A: movl -4(%ebp),%edi
+ 0x3A97393D: movl %ebp,%esp
+ 0x3A97393F: popl %ebp
+ 0x3A973940: ret
+. 89 3A973932 15
+. 8B 5D F4 89 D0 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 90 (0x3A973062) in 1585B, out 8852B, BBs exec'd 0 ====
+ 0x3A973062: movl %eax,%ecx
+ 0x3A973064: leal 0x228(%ebx), %eax
+ 0x3A97306A: cmpl %eax,%ecx
+ 0x3A97306C: jz-32 0x3A973226
+. 90 3A973062 16
+. 89 C1 8D 83 28 02 00 00 39 C1 0F 84 B4 01 00 00
+
+==== BB 91 (0x3A973072) in 1601B, out 8931B, BBs exec'd 0 ====
+ 0x3A973072: movl 0x130(%ebx),%eax
+ 0x3A973078: testl %eax,%eax
+ 0x3A97307A: jnz-32 0x3A97321C
+. 91 3A973072 14
+. 8B 83 30 01 00 00 85 C0 0F 85 9C 01 00 00
+
+==== BB 92 (0x3A973080) in 1615B, out 9006B, BBs exec'd 0 ====
+ 0x3A973080: leal 0xFFFFFE20(%ebp), %eax
+ 0x3A973086: movl %eax,8(%esp,,)
+ 0x3A97308A: movl 0xFFFFFE18(%ebp),%eax
+ 0x3A973090: movl %eax,4(%esp,,)
+ 0x3A973094: movl 0xFFFFFE1C(%ebp),%edx
+ 0x3A97309A: movl %edx,(%esp,,)
+ 0x3A97309D: call*l 12(%ebp)
+. 92 3A973080 32
+. 8D 85 20 FE FF FF 89 44 24 08 8B 85 18 FE FF FF 89 44 24 04 8B 95 1C FE FF FF 89 14 24 FF 55 0C
+
+==== BB 93 dl_main(0x3A966390) in 1647B, out 9117B, BBs exec'd 0 ====
+ 0x3A966390: pushl %ebp
+ 0x3A966391: movl %esp,%ebp
+ 0x3A966393: pushl %edi
+ 0x3A966394: pushl %esi
+ 0x3A966395: pushl %ebx
+ 0x3A966396: subl $0x1C8, %esp
+ 0x3A96639C: call 0x3A97592B
+. 93 3A966390 17
+. 55 89 E5 57 56 53 81 EC C8 01 00 00 E8 8A F5 00 00
+
+==== BB 94 (0x3A9663A1) in 1664B, out 9253B, BBs exec'd 0 ====
+ 0x3A9663A1: addl $0x122CB, %ebx
+ 0x3A9663A7: movb $0x0, 0xFFFFFF0B(%ebp)
+ 0x3A9663AE: leal 0xFFFED254(%ebx), %eax
+ 0x3A9663B4: movl 0x130(%ebx),%edi
+ 0x3A9663BA: movl %eax,0xFFFFF9E0(%ebx)
+ 0x3A9663C0: leal 0xFFFED274(%ebx), %eax
+ 0x3A9663C6: movl %eax,0xFFFFFBF8(%ebx)
+ 0x3A9663CC: leal 0xFFFED284(%ebx), %eax
+ 0x3A9663D2: movl %eax,0xFFFFFBFC(%ebx)
+ 0x3A9663D8: leal 0xFFFF9FD4(%ebx), %eax
+ 0x3A9663DE: movl %eax,0xFFFFFC04(%ebx)
+ 0x3A9663E4: movl 0x200(%ebx),%eax
+ 0x3A9663EA: movb $0x0, 0xFFFFFF03(%ebp)
+ 0x3A9663F1: movb $0x0, 0xFFFFFF02(%ebp)
+ 0x3A9663F8: movl %eax,0xFFFFFF48(%ebp)
+ 0x3A9663FE: xorl %eax, %eax
+ 0x3A966400: movl %eax,0xFFFFFEF8(%ebp)
+ 0x3A966406: xorl %eax, %eax
+ 0x3A966408: testl %edi,%edi
+ 0x3A96640A: movl %eax,0xFFFFFEF4(%ebp)
+ 0x3A966410: leal 0xFFFFD5BA(%ebx), %eax
+ 0x3A966416: jz-8 0x3A96641B
+. 94 3A9663A1 119
+. 81 C3 CB 22 01 00 C6 85 0B FF FF FF 00 8D 83 54 D2 FE FF 8B BB 30 01 00 00 89 83 E0 F9 FF FF 8D 83 74 D2 FE FF 89 83 F8 FB FF FF 8D 83 84 D2 FE FF 89 83 FC FB FF FF 8D 83 D4 9F FF FF 89 83 04 FC FF FF 8B 83 00 02 00 00 C6 85 03 FF FF FF 00 C6 85 02 FF FF FF 00 89 85 48 FF FF FF 31 C0 89 85 F8 FE FF FF 31 C0 85 FF 89 85 F4 FE FF FF 8D 83 BA D5 FF FF 74 03
+
+==== BB 95 (0x3A96641B) in 1783B, out 9585B, BBs exec'd 0 ====
+ 0x3A96641B: movl %eax,0xFFFFFD80(%ebx)
+ 0x3A966421: leal 0xFFFFFF48(%ebp), %eax
+ 0x3A966427: call 0x3A9732E0
+. 95 3A96641B 17
+. 89 83 80 FD FF FF 8D 85 48 FF FF FF E8 B4 CE 00 00
+
+==== BB 96 _dl_next_ld_env_entry(0x3A9732E0) in 1800B, out 9665B, BBs exec'd 0 ====
+ 0x3A9732E0: pushl %ebp
+ 0x3A9732E1: movl %eax,%ecx
+ 0x3A9732E3: movl %esp,%ebp
+ 0x3A9732E5: pushl %esi
+ 0x3A9732E6: movl (%eax),%edx
+ 0x3A9732E8: xorl %esi, %esi
+ 0x3A9732EA: movl (%edx),%eax
+ 0x3A9732EC: testl %eax,%eax
+ 0x3A9732EE: jz-8 0x3A9732FE
+. 96 3A9732E0 16
+. 55 89 C1 89 E5 56 8B 10 31 F6 8B 02 85 C0 74 0E
+
+==== BB 97 (0x3A9732F0) in 1816B, out 9813B, BBs exec'd 0 ====
+ 0x3A9732F0: cmpb $0x4C, (%eax)
+ 0x3A9732F3: jz-8 0x3A973303
+. 97 3A9732F0 5
+. 80 38 4C 74 0E
+
+==== BB 98 (0x3A973303) in 1821B, out 9873B, BBs exec'd 0 ====
+ 0x3A973303: cmpb $0x44, 1(%eax)
+ 0x3A973307: jnz-8 0x3A9732F5
+. 98 3A973303 6
+. 80 78 01 44 75 EC
+
+==== BB 99 (0x3A9732F5) in 1827B, out 9936B, BBs exec'd 0 ====
+ 0x3A9732F5: addl $0x4, %edx
+ 0x3A9732F8: movl (%edx),%eax
+ 0x3A9732FA: testl %eax,%eax
+ 0x3A9732FC: jnz-8 0x3A9732F0
+. 99 3A9732F5 9
+. 83 C2 04 8B 02 85 C0 75 F2
+
+==== BB 100 (0x3A973309) in 1836B, out 10015B, BBs exec'd 0 ====
+ 0x3A973309: cmpb $0x5F, 2(%eax)
+ 0x3A97330D: leal 0(%esi), %esi
+ 0x3A973310: jnz-8 0x3A9732F5
+. 100 3A973309 9
+. 80 78 02 5F 8D 76 00 75 E3
+
+==== BB 101 (0x3A973312) in 1845B, out 10091B, BBs exec'd 0 ====
+ 0x3A973312: addl $0x4, %edx
+ 0x3A973315: leal 3(%eax), %esi
+ 0x3A973318: movl %edx,(%ecx)
+ 0x3A97331A: jmp-8 0x3A9732FE
+. 101 3A973312 10
+. 83 C2 04 8D 70 03 89 11 EB E2
+
+==== BB 102 (0x3A9732FE) in 1855B, out 10159B, BBs exec'd 0 ====
+ 0x3A9732FE: movl %esi,%eax
+ 0x3A973300: popl %esi
+ 0x3A973301: popl %ebp
+ 0x3A973302: ret
+. 102 3A9732FE 5
+. 89 F0 5E 5D C3
+
+==== BB 103 (0x3A96642C) in 1860B, out 10234B, BBs exec'd 0 ====
+ 0x3A96642C: movl %eax,0xFFFFFEFC(%ebp)
+ 0x3A966432: testl %eax,%eax
+ 0x3A966434: jz-8 0x3A9664A8
+. 103 3A96642C 10
+. 89 85 FC FE FF FF 85 C0 74 72
+
+==== BB 104 (0x3A966436) in 1870B, out 10309B, BBs exec'd 0 ====
+ 0x3A966436: movl 0xFFFFFEFC(%ebp),%edx
+ 0x3A96643C: xorl %esi, %esi
+ 0x3A96643E: movzbl (%edx),%eax
+ 0x3A966441: testb %al,%al
+ 0x3A966443: setnz %dl
+ 0x3A966446: cmpb $0x3D, %al
+ 0x3A966448: setnz %al
+ 0x3A96644B: andl %edx,%eax
+ 0x3A96644D: testb $0x1, %al
+ 0x3A96644F: jz-8 0x3A966485
+. 104 3A966436 27
+. 8B 95 FC FE FF FF 31 F6 0F B6 02 84 C0 0F 95 C2 3C 3D 0F 95 C0 21 D0 A8 01 74 34
+
+==== BB 105 (0x3A966451) in 1897B, out 10486B, BBs exec'd 0 ====
+ 0x3A966451: movl 0xFFFFFEFC(%ebp),%eax
+ 0x3A966457: incl %esi
+ 0x3A966458: movzbl (%esi,%eax,1),%ecx
+ 0x3A96645C: testb %cl,%cl
+ 0x3A96645E: setnz %al
+ 0x3A966461: cmpb $0x3D, %cl
+ 0x3A966464: setnz %dl
+ 0x3A966467: andl %edx,%eax
+ 0x3A966469: testb $0x1, %al
+ 0x3A96646B: jnz-8 0x3A966451
+. 105 3A966451 28
+. 8B 85 FC FE FF FF 46 0F B6 0C 06 84 C9 0F 95 C0 80 F9 3D 0F 95 C2 21 D0 A8 01 75 E4
+
+==== BB 106 (0x3A96646D) in 1925B, out 10660B, BBs exec'd 0 ====
+ 0x3A96646D: cmpb $0x3D, %cl
+ 0x3A966470: jnz-8 0x3A966421
+. 106 3A96646D 5
+. 80 F9 3D 75 AF
+
+==== BB 107 (0x3A966472) in 1930B, out 10718B, BBs exec'd 0 ====
+ 0x3A966472: leal -4(%esi), %eax
+ 0x3A966475: cmpl $0x10, %eax
+ 0x3A966478: jnbe-8 0x3A966421
+. 107 3A966472 8
+. 8D 46 FC 83 F8 10 77 A7
+
+==== BB 108 (0x3A96647A) in 1938B, out 10785B, BBs exec'd 0 ====
+ 0x3A96647A: movl -10800(%ebx,%eax,4),%eax
+ 0x3A966481: addl %ebx,%eax
+ 0x3A966483: jmp*l %eax
+. 108 3A96647A 11
+. 8B 84 83 D0 D5 FF FF 01 D8 FF E0
+
+==== BB 109 (0x3A9677CA) in 1949B, out 10836B, BBs exec'd 0 ====
+ 0x3A9677CA: cld
+ 0x3A9677CB: movl 0xFFFFFEFC(%ebp),%esi
+ 0x3A9677D1: movl $0xA,%ecx
+ 0x3A9677D6: leal 0xFFFFED45(%ebx), %edi
+ 0x3A9677DC: repe cmpsb
+. 109 3A9677CA 20
+. FC 8B B5 FC FE FF FF B9 0A 00 00 00 8D BB 45 ED FF FF F3 A6
+
+==== BB 110 (0x3A9677DC) in 1969B, out 11005B, BBs exec'd 0 ====
+ 0x3A9677DC: repe cmpsb
+. 110 3A9677DC 2
+. F3 A6
+
+==== BB 111 (0x3A9677DE) in 1971B, out 11130B, BBs exec'd 0 ====
+ 0x3A9677DE: jnz-32 0x3A966421
+. 111 3A9677DE 6
+. 0F 85 3D EC FF FF
+
+==== BB 112 (0x3A9677E4) in 1977B, out 11177B, BBs exec'd 0 ====
+ 0x3A9677E4: xorl %ecx, %ecx
+ 0x3A9677E6: xorl %edx, %edx
+ 0x3A9677E8: xorl %esi, %esi
+ 0x3A9677EA: movl %esi,12(%esp,,)
+ 0x3A9677EE: movl %ecx,8(%esp,,)
+ 0x3A9677F2: movl %edx,4(%esp,,)
+ 0x3A9677F6: movl 0xFFFFFEFC(%ebp),%eax
+ 0x3A9677FC: addl $0xB, %eax
+ 0x3A9677FF: movl %eax,(%esp,,)
+ 0x3A967802: call 0x3A973340
+. 112 3A9677E4 35
+. 31 C9 31 D2 31 F6 89 74 24 0C 89 4C 24 08 89 54 24 04 8B 85 FC FE FF FF 83 C0 0B 89 04 24 E8 39 BB 00 00
+
+==== BB 113 __strtoul_internal(0x3A973340) in 2012B, out 11334B, BBs exec'd 0 ====
+ 0x3A973340: pushl %ebp
+ 0x3A973341: movl %esp,%ebp
+ 0x3A973343: pushl %edi
+ 0x3A973344: xorl %edi, %edi
+ 0x3A973346: pushl %esi
+ 0x3A973347: pushl %ebx
+ 0x3A973348: subl $0x8, %esp
+ 0x3A97334B: movl 8(%ebp),%esi
+ 0x3A97334E: movl $0x1, -20(%ebp)
+ 0x3A973355: call 0x3A97592B
+. 113 3A973340 26
+. 55 89 E5 57 31 FF 56 53 83 EC 08 8B 75 08 C7 45 EC 01 00 00 00 E8 D1 25 00 00
+
+==== BB 114 (0x3A97335A) in 2038B, out 11509B, BBs exec'd 0 ====
+ 0x3A97335A: addl $0x5312, %ebx
+ 0x3A973360: movzbl (%esi),%ecx
+ 0x3A973363: cmpb $0x20, %cl
+ 0x3A973366: setz %al
+ 0x3A973369: cmpb $0x9, %cl
+ 0x3A97336C: setz %dl
+ 0x3A97336F: orl %edx,%eax
+ 0x3A973371: testb $0x1, %al
+ 0x3A973373: jz-8 0x3A973396
+. 114 3A97335A 27
+. 81 C3 12 53 00 00 0F B6 0E 80 F9 20 0F 94 C0 80 F9 09 0F 94 C2 09 D0 A8 01 74 21
+
+==== BB 115 (0x3A973396) in 2065B, out 11667B, BBs exec'd 0 ====
+ 0x3A973396: cmpb $0x2D, %cl
+ 0x3A973399: jz-32 0x3A973435
+. 115 3A973396 9
+. 80 F9 2D 0F 84 96 00 00 00
+
+==== BB 116 (0x3A97339F) in 2074B, out 11725B, BBs exec'd 0 ====
+ 0x3A97339F: cmpb $0x2B, %cl
+ 0x3A9733A2: jz-32 0x3A97343C
+. 116 3A97339F 9
+. 80 F9 2B 0F 84 94 00 00 00
+
+==== BB 117 (0x3A9733A8) in 2083B, out 11783B, BBs exec'd 0 ====
+ 0x3A9733A8: movb %cl,%al
+ 0x3A9733AA: subb $0x30, %al
+ 0x3A9733AC: cmpb $0x9, %al
+ 0x3A9733AE: jbe-8 0x3A9733C6
+. 117 3A9733A8 8
+. 88 C8 2C 30 3C 09 76 16
+
+==== BB 118 (0x3A9733C6) in 2091B, out 11866B, BBs exec'd 0 ====
+ 0x3A9733C6: movl $0xA, -16(%ebp)
+ 0x3A9733CD: cmpb $0x30, %cl
+ 0x3A9733D0: jz-8 0x3A973445
+. 118 3A9733C6 12
+. C7 45 F0 0A 00 00 00 80 F9 30 74 73
+
+==== BB 119 (0x3A973445) in 2103B, out 11942B, BBs exec'd 0 ====
+ 0x3A973445: movzbl 1(%esi),%eax
+ 0x3A973449: movl $0x8, -16(%ebp)
+ 0x3A973450: cmpb $0x78, %al
+ 0x3A973452: setz %dl
+ 0x3A973455: cmpb $0x58, %al
+ 0x3A973457: setz %al
+ 0x3A97345A: orl %edx,%eax
+ 0x3A97345C: testb $0x1, %al
+ 0x3A97345E: jz-32 0x3A9733D2
+. 119 3A973445 31
+. 0F B6 46 01 C7 45 F0 08 00 00 00 3C 78 0F 94 C2 3C 58 0F 94 C0 09 D0 A8 01 0F 84 6E FF FF FF
+
+==== BB 120 (0x3A973464) in 2134B, out 12101B, BBs exec'd 0 ====
+ 0x3A973464: movl $0x10, -16(%ebp)
+ 0x3A97346B: addl $0x2, %esi
+ 0x3A97346E: movzbl (%esi),%ecx
+ 0x3A973471: jmp 0x3A9733D2
+. 120 3A973464 18
+. C7 45 F0 10 00 00 00 83 C6 02 0F B6 0E E9 5C FF FF FF
+
+==== BB 121 (0x3A9733D2) in 2152B, out 12174B, BBs exec'd 0 ====
+ 0x3A9733D2: movb %cl,%al
+ 0x3A9733D4: movb %cl,%dl
+ 0x3A9733D6: subb $0x30, %al
+ 0x3A9733D8: cmpb $0x9, %al
+ 0x3A9733DA: jnbe-8 0x3A97341B
+. 121 3A9733D2 10
+. 88 C8 88 CA 2C 30 3C 09 77 3F
+
+==== BB 122 (0x3A9733DC) in 2162B, out 12268B, BBs exec'd 0 ====
+ 0x3A9733DC: leal 0(%esi,,), %esi
+ 0x3A9733E0: movsbl %dl,%eax
+ 0x3A9733E3: cmpl $0xCCCCCCC, %edi
+ 0x3A9733E9: leal -48(%eax), %ecx
+ 0x3A9733EC: jnbe-32 0x3A973476
+. 122 3A9733DC 22
+. 8D 74 26 00 0F BE C2 81 FF CC CC CC 0C 8D 48 D0 0F 87 84 00 00 00
+
+==== BB 123 (0x3A9733F2) in 2184B, out 12368B, BBs exec'd 0 ====
+ 0x3A9733F2: cmpl $0x19999999, %edi
+ 0x3A9733F8: setz %al
+ 0x3A9733FB: cmpl $0x5, %ecx
+ 0x3A9733FE: setnbe %dl
+ 0x3A973401: andl %edx,%eax
+ 0x3A973403: testb $0x1, %al
+ 0x3A973405: jnz-8 0x3A973476
+. 123 3A9733F2 21
+. 81 FF 99 99 99 19 0F 94 C0 83 F9 05 0F 97 C2 21 D0 A8 01 75 6F
+
+==== BB 124 (0x3A973407) in 2205B, out 12495B, BBs exec'd 0 ====
+ 0x3A973407: movl -16(%ebp),%edx
+ 0x3A97340A: incl %esi
+ 0x3A97340B: imull %edx, %edi
+ 0x3A97340E: movzbl (%esi),%edx
+ 0x3A973411: addl %ecx,%edi
+ 0x3A973413: movb %dl,%al
+ 0x3A973415: subb $0x30, %al
+ 0x3A973417: cmpb $0x9, %al
+ 0x3A973419: jbe-8 0x3A9733E0
+. 124 3A973407 20
+. 8B 55 F0 46 0F AF FA 0F B6 16 01 CF 88 D0 2C 30 3C 09 76 C5
+
+==== BB 125 (0x3A9733E0) in 2225B, out 12634B, BBs exec'd 0 ====
+ 0x3A9733E0: movsbl %dl,%eax
+ 0x3A9733E3: cmpl $0xCCCCCCC, %edi
+ 0x3A9733E9: leal -48(%eax), %ecx
+ 0x3A9733EC: jnbe-32 0x3A973476
+. 125 3A9733E0 18
+. 0F BE C2 81 FF CC CC CC 0C 8D 48 D0 0F 87 84 00 00 00
+
+==== BB 126 (0x3A97341B) in 2243B, out 12721B, BBs exec'd 0 ====
+ 0x3A97341B: movl 12(%ebp),%eax
+ 0x3A97341E: testl %eax,%eax
+ 0x3A973420: jz-8 0x3A973427
+. 126 3A97341B 7
+. 8B 45 0C 85 C0 74 05
+
+==== BB 127 (0x3A973427) in 2250B, out 12793B, BBs exec'd 0 ====
+ 0x3A973427: movl -20(%ebp),%eax
+ 0x3A97342A: imull %edi, %eax
+ 0x3A97342D: addl $0x8, %esp
+ 0x3A973430: popl %ebx
+ 0x3A973431: popl %esi
+ 0x3A973432: popl %edi
+ 0x3A973433: popl %ebp
+ 0x3A973434: ret
+. 127 3A973427 14
+. 8B 45 EC 0F AF C7 83 C4 08 5B 5E 5F 5D C3
+
+==== BB 128 (0x3A967807) in 2264B, out 12923B, BBs exec'd 0 ====
+ 0x3A967807: movl %eax,0xFFFFFC58(%ebx)
+ 0x3A96780D: jmp 0x3A966421
+. 128 3A967807 11
+. 89 83 58 FC FF FF E9 0F EC FF FF
+
+==== BB 129 (0x3A966421) in 2275B, out 12970B, BBs exec'd 0 ====
+ 0x3A966421: leal 0xFFFFFF48(%ebp), %eax
+ 0x3A966427: call 0x3A9732E0
+. 129 3A966421 11
+. 8D 85 48 FF FF FF E8 B4 CE 00 00
+
+==== BB 130 (0x3A967760) in 2286B, out 13031B, BBs exec'd 0 ====
+ 0x3A967760: cld
+ 0x3A967761: movl 0xFFFFFEFC(%ebp),%esi
+ 0x3A967767: movl $0xC,%ecx
+ 0x3A96776C: leal 0xFFFFF02D(%ebx), %edi
+ 0x3A967772: repe cmpsb
+. 130 3A967760 20
+. FC 8B B5 FC FE FF FF B9 0C 00 00 00 8D BB 2D F0 FF FF F3 A6
+
+==== BB 131 (0x3A967772) in 2306B, out 13200B, BBs exec'd 0 ====
+ 0x3A967772: repe cmpsb
+. 131 3A967772 2
+. F3 A6
+
+==== BB 132 (0x3A967774) in 2308B, out 13325B, BBs exec'd 0 ====
+ 0x3A967774: jnz-32 0x3A967A85
+. 132 3A967774 6
+. 0F 85 0B 03 00 00
+
+==== BB 133 (0x3A96777A) in 2314B, out 13372B, BBs exec'd 0 ====
+ 0x3A96777A: movl 0xFFFFFEFC(%ebp),%eax
+ 0x3A967780: addl $0xD, %eax
+ 0x3A967783: movl %eax,0xAC(%ebx)
+ 0x3A967789: jmp 0x3A966421
+. 133 3A96777A 20
+. 8B 85 FC FE FF FF 83 C0 0D 89 83 AC 00 00 00 E9 93 EC FF FF
+
+==== BB 134 (0x3A9678A7) in 2334B, out 13446B, BBs exec'd 0 ====
+ 0x3A9678A7: cld
+ 0x3A9678A8: movl 0xFFFFFEFC(%ebp),%esi
+ 0x3A9678AE: movl $0x7,%ecx
+ 0x3A9678B3: leal 0xFFFFED69(%ebx), %edi
+ 0x3A9678B9: repe cmpsb
+. 134 3A9678A7 20
+. FC 8B B5 FC FE FF FF B9 07 00 00 00 8D BB 69 ED FF FF F3 A6
+
+==== BB 135 (0x3A9678BB) in 2354B, out 13615B, BBs exec'd 0 ====
+ 0x3A9678BB: jnz-32 0x3A967B31
+. 135 3A9678BB 6
+. 0F 85 70 02 00 00
+
+==== BB 136 (0x3A967B31) in 2360B, out 13662B, BBs exec'd 0 ====
+ 0x3A967B31: cld
+ 0x3A967B32: movl 0xFFFFFEFC(%ebp),%esi
+ 0x3A967B38: movl $0x7,%ecx
+ 0x3A967B3D: leal 0xFFFFEDCF(%ebx), %edi
+ 0x3A967B43: repe cmpsb
+. 136 3A967B31 20
+. FC 8B B5 FC FE FF FF B9 07 00 00 00 8D BB CF ED FF FF F3 A6
+
+==== BB 137 (0x3A967B43) in 2380B, out 13831B, BBs exec'd 0 ====
+ 0x3A967B43: repe cmpsb
+. 137 3A967B43 2
+. F3 A6
+
+==== BB 138 (0x3A967B45) in 2382B, out 13956B, BBs exec'd 0 ====
+ 0x3A967B45: jnz-32 0x3A967EDB
+. 138 3A967B45 6
+. 0F 85 90 03 00 00
+
+==== BB 139 (0x3A967B4B) in 2388B, out 14003B, BBs exec'd 0 ====
+ 0x3A967B4B: movl 0xFFFFFEFC(%ebp),%eax
+ 0x3A967B51: addl $0x8, %eax
+ 0x3A967B54: movl %eax,0xB0(%ebx)
+ 0x3A967B5A: jmp 0x3A966421
+. 139 3A967B4B 20
+. 8B 85 FC FE FF FF 83 C0 08 89 83 B0 00 00 00 E9 C2 E8 FF FF
+
+==== BB 140 (0x3A9664A8) in 2408B, out 14077B, BBs exec'd 0 ====
+ 0x3A9664A8: movl 0xFFFFFEF8(%ebp),%eax
+ 0x3A9664AE: movl %eax,0xFFFFFF50(%ebp)
+ 0x3A9664B4: movl 0x130(%ebx),%eax
+ 0x3A9664BA: testl %eax,%eax
+ 0x3A9664BC: jnz-32 0x3A967A31
+. 140 3A9664A8 26
+. 8B 85 F8 FE FF FF 89 85 50 FF FF FF 8B 83 30 01 00 00 85 C0 0F 85 6F 15 00 00
+
+==== BB 141 (0x3A9664C2) in 2434B, out 14181B, BBs exec'd 0 ====
+ 0x3A9664C2: movl 0xB8(%ebx),%edi
+ 0x3A9664C8: testl %edi,%edi
+ 0x3A9664CA: jz-32 0x3A966580
+. 141 3A9664C2 14
+. 8B BB B8 00 00 00 85 FF 0F 84 B0 00 00 00
+
+==== BB 142 (0x3A966580) in 2448B, out 14256B, BBs exec'd 0 ====
+ 0x3A966580: movl 16(%ebp),%edx
+ 0x3A966583: movl $0x1,%eax
+ 0x3A966588: movl %eax,0x34(%ebx)
+ 0x3A96658E: leal 0xFFFED214(%ebx), %eax
+ 0x3A966594: cmpl %eax,(%edx)
+ 0x3A966596: jz-32 0x3A966A99
+. 142 3A966580 28
+. 8B 55 10 B8 01 00 00 00 89 83 34 00 00 00 8D 83 14 D2 FE FF 39 02 0F 84 FD 04 00 00
+
+==== BB 143 (0x3A96659C) in 2476B, out 14363B, BBs exec'd 0 ====
+ 0x3A96659C: movl $0x0, (%esp,,)
+ 0x3A9665A3: leal 0xFFFFEDF6(%ebx), %edx
+ 0x3A9665A9: xorl %ecx, %ecx
+ 0x3A9665AB: movl %edx,%eax
+ 0x3A9665AD: call 0x3A96C9D0
+. 143 3A96659C 22
+. C7 04 24 00 00 00 00 8D 93 F6 ED FF FF 31 C9 89 D0 E8 1E 64 00 00
+
+==== BB 144 _dl_new_object(0x3A96C9D0) in 2498B, out 14461B, BBs exec'd 0 ====
+ 0x3A96C9D0: pushl %ebp
+ 0x3A96C9D1: movl %esp,%ebp
+ 0x3A96C9D3: pushl %edi
+ 0x3A96C9D4: pushl %esi
+ 0x3A96C9D5: pushl %ebx
+ 0x3A96C9D6: subl $0x2C, %esp
+ 0x3A96C9D9: movl 8(%ebp),%edi
+ 0x3A96C9DC: call 0x3A97592B
+. 144 3A96C9D0 17
+. 55 89 E5 57 56 53 83 EC 2C 8B 7D 08 E8 4A 8F 00 00
+
+==== BB 145 (0x3A96C9E1) in 2515B, out 14607B, BBs exec'd 0 ====
+ 0x3A96C9E1: addl $0xBC8B, %ebx
+ 0x3A96C9E7: movl %edx,-20(%ebp)
+ 0x3A96C9EA: movl %ecx,-24(%ebp)
+ 0x3A96C9ED: movl %eax,-16(%ebp)
+ 0x3A96C9F0: movl %edx,(%esp,,)
+ 0x3A96C9F3: call 0x3A9752D0
+. 145 3A96C9E1 23
+. 81 C3 8B BC 00 00 89 55 EC 89 4D E8 89 45 F0 89 14 24 E8 D8 88 00 00
+
+==== BB 146 (0x3A9752DF) in 2538B, out 14721B, BBs exec'd 0 ====
+ 0x3A9752DF: cmpb %dh{si},(%eax)
+ 0x3A9752E1: jz-32 0x3A975386
+. 146 3A9752DF 8
+. 38 30 0F 84 9F 00 00 00
+
+==== BB 147 (0x3A975386) in 2546B, out 14781B, BBs exec'd 0 ====
+ 0x3A975386: subl 4(%esp,,),%eax
+ 0x3A97538A: ret
+. 147 3A975386 5
+. 2B 44 24 04 C3
+
+==== BB 148 (0x3A96C9F8) in 2551B, out 14833B, BBs exec'd 0 ====
+ 0x3A96C9F8: leal 1(%eax), %edx
+ 0x3A96C9FB: movl $0x1,%ecx
+ 0x3A96CA00: addl $0x221, %eax
+ 0x3A96CA05: movl %edx,-28(%ebp)
+ 0x3A96CA08: movl %ecx,4(%esp,,)
+ 0x3A96CA0C: movl %eax,(%esp,,)
+ 0x3A96CA0F: call 0x3A96582C
+. 148 3A96C9F8 28
+. 8D 50 01 B9 01 00 00 00 05 21 02 00 00 89 55 E4 89 4C 24 04 89 04 24 E8 18 8E FF FF
+
+==== BB 149 (0x3A96582C) in 2579B, out 14953B, BBs exec'd 0 ====
+ 0x3A96582C: jmp*l 0x14(%ebx)
+. 149 3A96582C 6
+. FF A3 14 00 00 00
+
+==== BB 150 calloc(0x3A973870) in 2585B, out 14980B, BBs exec'd 0 ====
+ 0x3A973870: pushl %ebp
+ 0x3A973871: movl %esp,%ebp
+ 0x3A973873: pushl %ebx
+ 0x3A973874: subl $0x4, %esp
+ 0x3A973877: movl 12(%ebp),%eax
+ 0x3A97387A: movl 8(%ebp),%ecx
+ 0x3A97387D: call 0x3A97592B
+. 150 3A973870 18
+. 55 89 E5 53 83 EC 04 8B 45 0C 8B 4D 08 E8 A9 20 00 00
+
+==== BB 151 (0x3A973882) in 2603B, out 15107B, BBs exec'd 0 ====
+ 0x3A973882: addl $0x4DEA, %ebx
+ 0x3A973888: imull %ecx, %eax
+ 0x3A97388B: movl %eax,(%esp,,)
+ 0x3A97388E: call 0x3A96581C
+. 151 3A973882 17
+. 81 C3 EA 4D 00 00 0F AF C1 89 04 24 E8 89 1F FF FF
+
+==== BB 152 (0x3A96581C) in 2620B, out 15193B, BBs exec'd 0 ====
+ 0x3A96581C: jmp*l 0x10(%ebx)
+. 152 3A96581C 6
+. FF A3 10 00 00 00
+
+==== BB 153 malloc(0x3A973800) in 2626B, out 15220B, BBs exec'd 0 ====
+ 0x3A973800: pushl %ebp
+ 0x3A973801: movl %esp,%ebp
+ 0x3A973803: pushl %ebx
+ 0x3A973804: subl $0x8, %esp
+ 0x3A973807: movl 8(%ebp),%eax
+ 0x3A97380A: call 0x3A97592B
+. 153 3A973800 15
+. 55 89 E5 53 83 EC 08 8B 45 08 E8 1C 21 00 00
+
+==== BB 154 (0x3A97380F) in 2641B, out 15334B, BBs exec'd 0 ====
+ 0x3A97380F: addl $0x4E5D, %ebx
+ 0x3A973815: movl $0x8, (%esp,,)
+ 0x3A97381C: movl %eax,4(%esp,,)
+ 0x3A973820: call 0x3A96580C
+. 154 3A97380F 22
+. 81 C3 5D 4E 00 00 C7 04 24 08 00 00 00 89 44 24 04 E8 E7 1F FF FF
+
+==== BB 155 (0x3A96580C) in 2663B, out 15424B, BBs exec'd 0 ====
+ 0x3A96580C: jmp*l 0xC(%ebx)
+. 155 3A96580C 6
+. FF A3 0C 00 00 00
+
+==== BB 156 __libc_memalign(0x3A973700) in 2669B, out 15451B, BBs exec'd 0 ====
+ 0x3A973700: pushl %ebp
+ 0x3A973701: movl %esp,%ebp
+ 0x3A973703: subl $0x24, %esp
+ 0x3A973706: movl %ebx,-12(%ebp)
+ 0x3A973709: movl %esi,-8(%ebp)
+ 0x3A97370C: movl 8(%ebp),%esi
+ 0x3A97370F: movl %edi,-4(%ebp)
+ 0x3A973712: movl 12(%ebp),%edi
+ 0x3A973715: call 0x3A97592B
+. 156 3A973700 26
+. 55 89 E5 83 EC 24 89 5D F4 89 75 F8 8B 75 08 89 7D FC 8B 7D 0C E8 11 22 00 00
+
+==== BB 157 (0x3A97371A) in 2695B, out 15601B, BBs exec'd 0 ====
+ 0x3A97371A: addl $0x4F52, %ebx
+ 0x3A973720: movl 0x13C(%ebx),%ecx
+ 0x3A973726: testl %ecx,%ecx
+ 0x3A973728: jnz-8 0x3A97374A
+. 157 3A97371A 16
+. 81 C3 52 4F 00 00 8B 8B 3C 01 00 00 85 C9 75 20
+
+==== BB 158 (0x3A97372A) in 2711B, out 15689B, BBs exec'd 0 ====
+ 0x3A97372A: movl 0xFFFFFC18(%ebx),%eax
+ 0x3A973730: leal 0x228(%ebx), %edx
+ 0x3A973736: movl %edx,0x138(%ebx)
+ 0x3A97373C: leal -1(%edx,%eax,1), %ecx
+ 0x3A973740: negl %eax
+ 0x3A973742: andl %eax,%ecx
+ 0x3A973744: movl %ecx,0x13C(%ebx)
+ 0x3A97374A: movl 0x138(%ebx),%eax
+ 0x3A973750: addl %esi,%eax
+ 0x3A973752: leal -1(%eax), %edx
+ 0x3A973755: negl %esi
+ 0x3A973757: andl %esi,%edx
+ 0x3A973759: leal (%edi,%edx,1), %eax
+ 0x3A97375C: cmpl %ecx,%eax
+ 0x3A97375E: jnb-8 0x3A973780
+. 158 3A97372A 54
+. 8B 83 18 FC FF FF 8D 93 28 02 00 00 89 93 38 01 00 00 8D 4C 02 FF F7 D8 21 C1 89 8B 3C 01 00 00 8B 83 38 01 00 00 01 F0 8D 50 FF F7 DE 21 F2 8D 04 17 39 C8 73 20
+
+==== BB 159 (0x3A973760) in 2765B, out 15879B, BBs exec'd 0 ====
+ 0x3A973760: movl %edx,0x140(%ebx)
+ 0x3A973766: movl %edx,%eax
+ 0x3A973768: leal (%edi,%edx,1), %edx
+ 0x3A97376B: movl %edx,0x138(%ebx)
+ 0x3A973771: movl -12(%ebp),%ebx
+ 0x3A973774: movl -8(%ebp),%esi
+ 0x3A973777: movl -4(%ebp),%edi
+ 0x3A97377A: movl %ebp,%esp
+ 0x3A97377C: popl %ebp
+ 0x3A97377D: ret
+. 159 3A973760 30
+. 89 93 40 01 00 00 89 D0 8D 14 17 89 93 38 01 00 00 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 160 (0x3A973825) in 2795B, out 16027B, BBs exec'd 0 ====
+ 0x3A973825: addl $0x8, %esp
+ 0x3A973828: popl %ebx
+ 0x3A973829: popl %ebp
+ 0x3A97382A: ret
+. 160 3A973825 6
+. 83 C4 08 5B 5D C3
+
+==== BB 161 (0x3A973893) in 2801B, out 16103B, BBs exec'd 0 ====
+ 0x3A973893: popl %edx
+ 0x3A973894: popl %ebx
+ 0x3A973895: popl %ebp
+ 0x3A973896: ret
+. 161 3A973893 4
+. 5A 5B 5D C3
+
+==== BB 162 (0x3A96CA14) in 2805B, out 16181B, BBs exec'd 0 ====
+ 0x3A96CA14: movl %eax,-32(%ebp)
+ 0x3A96CA17: movl -32(%ebp),%edx
+ 0x3A96CA1A: xorl %eax, %eax
+ 0x3A96CA1C: testl %edx,%edx
+ 0x3A96CA1E: jz-32 0x3A96CC29
+. 162 3A96CA14 16
+. 89 45 E0 8B 55 E0 31 C0 85 D2 0F 84 05 02 00 00
+
+==== BB 163 (0x3A96CA24) in 2821B, out 16280B, BBs exec'd 0 ====
+ 0x3A96CA24: movl -32(%ebp),%esi
+ 0x3A96CA27: movl -32(%ebp),%ecx
+ 0x3A96CA2A: movl -28(%ebp),%edx
+ 0x3A96CA2D: addl $0x214, %esi
+ 0x3A96CA33: movl %ecx,%eax
+ 0x3A96CA35: addl $0x220, %eax
+ 0x3A96CA3A: movl %esi,20(%ecx)
+ 0x3A96CA3D: movl %edx,8(%esp,,)
+ 0x3A96CA41: movl -20(%ebp),%ecx
+ 0x3A96CA44: movl %eax,(%esp,,)
+ 0x3A96CA47: movl %ecx,4(%esp,,)
+ 0x3A96CA4B: call 0x3A975870
+. 163 3A96CA24 44
+. 8B 75 E0 8B 4D E0 8B 55 E4 81 C6 14 02 00 00 89 C8 05 20 02 00 00 89 71 14 89 54 24 08 8B 4D EC 89 04 24 89 4C 24 04 E8 20 8E 00 00
+
+==== BB 164 memcpy(0x3A975870) in 2865B, out 16451B, BBs exec'd 0 ====
+ 0x3A975870: pushl %edi
+ 0x3A975871: pushl %esi
+ 0x3A975872: movl 12(%esp,,),%edi
+ 0x3A975876: movl 16(%esp,,),%esi
+ 0x3A97587A: movl 20(%esp,,),%ecx
+ 0x3A97587E: movl %edi,%eax
+ 0x3A975880: cld
+ 0x3A975881: cmpl $0x20, %ecx
+ 0x3A975884: jbe-8 0x3A9758DC
+. 164 3A975870 22
+. 57 56 8B 7C 24 0C 8B 74 24 10 8B 4C 24 14 89 F8 FC 83 F9 20 76 56
+
+==== BB 165 (0x3A9758DC) in 2887B, out 16600B, BBs exec'd 0 ====
+ 0x3A9758DC: rep movsb
+. 165 3A9758DC 2
+. F3 A4
+
+==== BB 166 (0x3A9758DE) in 2889B, out 16695B, BBs exec'd 0 ====
+ 0x3A9758DE: popl %esi
+ 0x3A9758DF: popl %edi
+ 0x3A9758E0: ret
+. 166 3A9758DE 3
+. 5E 5F C3
+
+==== BB 167 (0x3A96CA50) in 2892B, out 16757B, BBs exec'd 0 ====
+ 0x3A96CA50: movl $0x1, 8(%esi)
+ 0x3A96CA57: movl -32(%ebp),%edx
+ 0x3A96CA5A: movl $0x4,%esi
+ 0x3A96CA5F: movl -16(%ebp),%ecx
+ 0x3A96CA62: movl %eax,0x214(%edx)
+ 0x3A96CA68: movl %ecx,4(%edx)
+ 0x3A96CA6B: movl -32(%ebp),%ecx
+ 0x3A96CA6E: movzbl -24(%ebp),%edx
+ 0x3A96CA72: movzbl 0x174(%ecx),%eax
+ 0x3A96CA79: movl %edi,0x160(%ecx)
+ 0x3A96CA7F: andb $0x3, %dl
+ 0x3A96CA82: movl %esi,0x1AC(%ecx)
+ 0x3A96CA88: andb $0xFC, %al
+ 0x3A96CA8A: orb %dl,%al
+ 0x3A96CA8C: movb %al,0x174(%ecx)
+ 0x3A96CA92: movl %ecx,%edx
+ 0x3A96CA94: movl 0xFFFFF994(%ebx),%eax
+ 0x3A96CA9A: addl $0x19C, %edx
+ 0x3A96CAA0: movl %edx,0x1B0(%ecx)
+ 0x3A96CAA6: xorl %ecx, %ecx
+ 0x3A96CAA8: testl %eax,%eax
+ 0x3A96CAAA: jz-32 0x3A96CC33
+. 167 3A96CA50 96
+. C7 46 08 01 00 00 00 8B 55 E0 BE 04 00 00 00 8B 4D F0 89 82 14 02 00 00 89 4A 04 8B 4D E0 0F B6 55 E8 0F B6 81 74 01 00 00 89 B9 60 01 00 00 80 E2 03 89 B1 AC 01 00 00 24 FC 08 D0 88 81 74 01 00 00 89 CA 8B 83 94 F9 FF FF 81 C2 9C 01 00 00 89 91 B0 01 00 00 31 C9 85 C0 0F 84 83 01 00 00
+
+==== BB 168 (0x3A96CC33) in 2988B, out 17098B, BBs exec'd 0 ====
+ 0x3A96CC33: movl -32(%ebp),%eax
+ 0x3A96CC36: movl %eax,0xFFFFF994(%ebx)
+ 0x3A96CC3C: incl 0xFFFFF998(%ebx)
+ 0x3A96CC42: addl $0x1, 0xFFFFF9C4(%ebx)
+ 0x3A96CC49: adcl $0x0, 0xFFFFF9C8(%ebx)
+ 0x3A96CC50: testl %edi,%edi
+ 0x3A96CC52: jnz-32 0x3A96CB07
+. 168 3A96CC33 37
+. 8B 45 E0 89 83 94 F9 FF FF FF 83 98 F9 FF FF 83 83 C4 F9 FF FF 01 83 93 C8 F9 FF FF 00 85 FF 0F 85 AF FE FF FF
+
+==== BB 169 (0x3A96CC58) in 3025B, out 17244B, BBs exec'd 0 ====
+ 0x3A96CC58: movl -32(%ebp),%edi
+ 0x3A96CC5B: jmp 0x3A96CB2C
+. 169 3A96CC58 8
+. 8B 7D E0 E9 CC FE FF FF
+
+==== BB 170 (0x3A96CB2C) in 3033B, out 17288B, BBs exec'd 0 ====
+ 0x3A96CB2C: testl %ecx,%ecx
+ 0x3A96CB2E: leal 0x150(%edi), %eax
+ 0x3A96CB34: jz-8 0x3A96CB3A
+. 170 3A96CB2C 10
+. 85 C9 8D 87 50 01 00 00 74 04
+
+==== BB 171 (0x3A96CB3A) in 3043B, out 17363B, BBs exec'd 0 ====
+ 0x3A96CB3A: movl %eax,(%edx,%ecx,4)
+ 0x3A96CB3D: movl -32(%ebp),%eax
+ 0x3A96CB40: movl -32(%ebp),%edx
+ 0x3A96CB43: movl -16(%ebp),%ecx
+ 0x3A96CB46: addl $0x150, %eax
+ 0x3A96CB4B: movl %eax,0x1B4(%edx)
+ 0x3A96CB51: movzbl (%ecx),%ecx
+ 0x3A96CB54: testb %cl,%cl
+ 0x3A96CB56: movb %cl,-33(%ebp)
+ 0x3A96CB59: jz-32 0x3A96CC26
+. 171 3A96CB3A 37
+. 89 04 8A 8B 45 E0 8B 55 E0 8B 4D F0 05 50 01 00 00 89 82 B4 01 00 00 0F B6 09 84 C9 88 4D DF 0F 84 C7 00 00 00
+
+==== BB 172 (0x3A96CC26) in 3080B, out 17529B, BBs exec'd 0 ====
+ 0x3A96CC26: movl -32(%ebp),%eax
+ 0x3A96CC29: addl $0x2C, %esp
+ 0x3A96CC2C: popl %ebx
+ 0x3A96CC2D: popl %esi
+ 0x3A96CC2E: popl %edi
+ 0x3A96CC2F: popl %ebp
+ 0x3A96CC30: ret 4
+. 172 3A96CC26 13
+. 8B 45 E0 83 C4 2C 5B 5E 5F 5D C2 04 00
+
+==== BB 173 (0x3A9665B2) in 3093B, out 17651B, BBs exec'd 0 ====
+ 0x3A9665B2: movl 0xFFFFF994(%ebx),%ecx
+ 0x3A9665B8: subl $0x4, %esp
+ 0x3A9665BB: testl %ecx,%ecx
+ 0x3A9665BD: jz-32 0x3A9679C8
+. 173 3A9665B2 17
+. 8B 8B 94 F9 FF FF 83 EC 04 85 C9 0F 84 05 14 00 00
+
+==== BB 174 (0x3A9665C3) in 3110B, out 17739B, BBs exec'd 0 ====
+ 0x3A9665C3: movl 8(%ebp),%esi
+ 0x3A9665C6: movl 12(%ebp),%eax
+ 0x3A9665C9: movl %esi,0x144(%ecx)
+ 0x3A9665CF: movl 16(%ebp),%esi
+ 0x3A9665D2: movw %ax,0x14C(%ecx)
+ 0x3A9665D9: movl (%esi),%eax
+ 0x3A9665DB: movl %eax,0x148(%ecx)
+ 0x3A9665E1: incl 0x170(%ecx)
+ 0x3A9665E7: xorl %eax, %eax
+ 0x3A9665E9: movl 8(%ebp),%esi
+ 0x3A9665EC: movl %eax,0x198(%ecx)
+ 0x3A9665F2: movl $0xFFFFFFFF,%eax
+ 0x3A9665F7: movl %eax,0x194(%ecx)
+ 0x3A9665FD: shll $0x5, 12(%ebp)
+ 0x3A966601: movl 12(%ebp),%edx
+ 0x3A966604: leal (%edx,%esi,1), %eax
+ 0x3A966607: cmpl %eax,%esi
+ 0x3A966609: jnb-32 0x3A9666B9
+. 174 3A9665C3 76
+. 8B 75 08 8B 45 0C 89 B1 44 01 00 00 8B 75 10 66 89 81 4C 01 00 00 8B 06 89 81 48 01 00 00 FF 81 70 01 00 00 31 C0 8B 75 08 89 81 98 01 00 00 B8 FF FF FF FF 89 81 94 01 00 00 C1 65 0C 05 8B 55 0C 8D 04 32 39 C6 0F 83 AA 00 00 00
+
+==== BB 175 (0x3A96660F) in 3186B, out 18001B, BBs exec'd 0 ====
+ 0x3A96660F: movl %eax,0xFFFFFEE4(%ebp)
+ 0x3A966615: jmp-8 0x3A96663A
+. 175 3A96660F 8
+. 89 85 E4 FE FF FF EB 23
+
+==== BB 176 (0x3A96663A) in 3194B, out 18048B, BBs exec'd 0 ====
+ 0x3A96663A: movl (%esi),%eax
+ 0x3A96663C: cmpl $0x3, %eax
+ 0x3A96663F: jz-8 0x3A966670
+. 176 3A96663A 7
+. 8B 06 83 F8 03 74 2F
+
+==== BB 177 (0x3A966641) in 3201B, out 18115B, BBs exec'd 0 ====
+ 0x3A966641: cmpl $0x3, %eax
+ 0x3A966644: jbe-8 0x3A966617
+. 177 3A966641 5
+. 83 F8 03 76 D1
+
+==== BB 178 (0x3A966646) in 3206B, out 18172B, BBs exec'd 0 ====
+ 0x3A966646: cmpl $0x6474E551, %eax
+ 0x3A96664B: jz-32 0x3A966CC0
+. 178 3A966646 11
+. 3D 51 E5 74 64 0F 84 6F 06 00 00
+
+==== BB 179 (0x3A966651) in 3217B, out 18232B, BBs exec'd 0 ====
+ 0x3A966651: cmpl $0x6474E551, %eax
+ 0x3A966656: jnbe-32 0x3A966C9B
+. 179 3A966651 11
+. 3D 51 E5 74 64 0F 87 3F 06 00 00
+
+==== BB 180 (0x3A96665C) in 3228B, out 18292B, BBs exec'd 0 ====
+ 0x3A96665C: cmpl $0x6, %eax
+ 0x3A96665F: nop
+ 0x3A966660: jnz-8 0x3A96662F
+. 180 3A96665C 6
+. 83 F8 06 90 75 CD
+
+==== BB 181 (0x3A966662) in 3234B, out 18353B, BBs exec'd 0 ====
+ 0x3A966662: movl 8(%esi),%edi
+ 0x3A966665: movl 8(%ebp),%eax
+ 0x3A966668: subl %edi,%eax
+ 0x3A96666A: movl %eax,(%ecx)
+ 0x3A96666C: jmp-8 0x3A96662F
+. 181 3A966662 12
+. 8B 7E 08 8B 45 08 29 F8 89 01 EB C1
+
+==== BB 182 (0x3A96662F) in 3246B, out 18433B, BBs exec'd 0 ====
+ 0x3A96662F: addl $0x20, %esi
+ 0x3A966632: cmpl 0xFFFFFEE4(%ebp),%esi
+ 0x3A966638: jnb-8 0x3A9666B9
+. 182 3A96662F 11
+. 83 C6 20 3B B5 E4 FE FF FF 73 7F
+
+==== BB 183 (0x3A966670) in 3257B, out 18511B, BBs exec'd 0 ====
+ 0x3A966670: movl (%ecx),%eax
+ 0x3A966672: movl 8(%esi),%edx
+ 0x3A966675: addl %eax,%edx
+ 0x3A966677: movl %edx,0x94(%ebx)
+ 0x3A96667D: leal 0x94(%ebx), %eax
+ 0x3A966683: movl %eax,0xFFFFF9F8(%ebx)
+ 0x3A966689: movl 0xFFFFF9EC(%ebx),%eax
+ 0x3A96668F: testl %eax,%eax
+ 0x3A966691: jnz-32 0x3A967586
+. 183 3A966670 39
+. 8B 01 8B 56 08 01 C2 89 93 94 00 00 00 8D 83 94 00 00 00 89 83 F8 F9 FF FF 8B 83 EC F9 FF FF 85 C0 0F 85 EF 0E 00 00
+
+==== BB 184 (0x3A967586) in 3296B, out 18654B, BBs exec'd 0 ====
+ 0x3A967586: movb $0x1, 0xFFFFFF0B(%ebp)
+ 0x3A96758D: jmp 0x3A96662F
+. 184 3A967586 12
+. C6 85 0B FF FF FF 01 E9 9D F0 FF FF
+
+==== BB 185 (0x3A966617) in 3308B, out 18702B, BBs exec'd 0 ====
+ 0x3A966617: cmpl $0x1, %eax
+ 0x3A96661A: jz-32 0x3A966B96
+. 185 3A966617 9
+. 83 F8 01 0F 84 76 05 00 00
+
+==== BB 186 (0x3A966B96) in 3317B, out 18759B, BBs exec'd 0 ====
+ 0x3A966B96: movl 28(%esi),%eax
+ 0x3A966B99: movl 8(%esi),%edx
+ 0x3A966B9C: movl (%ecx),%edi
+ 0x3A966B9E: decl %eax
+ 0x3A966B9F: notl %eax
+ 0x3A966BA1: andl %edx,%eax
+ 0x3A966BA3: leal (%eax,%edi,1), %eax
+ 0x3A966BA6: cmpl %eax,0x194(%ecx)
+ 0x3A966BAC: jbe-8 0x3A966BB7
+. 186 3A966B96 24
+. 8B 46 1C 8B 56 08 8B 39 48 F7 D0 21 D0 8D 04 38 39 81 94 01 00 00 76 09
+
+==== BB 187 (0x3A966BAE) in 3341B, out 18888B, BBs exec'd 0 ====
+ 0x3A966BAE: movl %eax,0x194(%ecx)
+ 0x3A966BB4: movl 8(%esi),%edx
+ 0x3A966BB7: leal (%edx,%edi,1), %eax
+ 0x3A966BBA: movl 20(%esi),%edi
+ 0x3A966BBD: addl %edi,%eax
+ 0x3A966BBF: cmpl %eax,0x198(%ecx)
+ 0x3A966BC5: jnb-32 0x3A96662F
+. 187 3A966BAE 29
+. 89 81 94 01 00 00 8B 56 08 8D 04 3A 8B 7E 14 01 F8 39 81 98 01 00 00 0F 83 64 FA FF FF
+
+==== BB 188 (0x3A966BCB) in 3370B, out 19018B, BBs exec'd 0 ====
+ 0x3A966BCB: movl %eax,0x198(%ecx)
+ 0x3A966BD1: jmp 0x3A96662F
+. 188 3A966BCB 11
+. 89 81 98 01 00 00 E9 59 FA FF FF
+
+==== BB 189 (0x3A966BB7) in 3381B, out 19065B, BBs exec'd 0 ====
+ 0x3A966BB7: leal (%edx,%edi,1), %eax
+ 0x3A966BBA: movl 20(%esi),%edi
+ 0x3A966BBD: addl %edi,%eax
+ 0x3A966BBF: cmpl %eax,0x198(%ecx)
+ 0x3A966BC5: jnb-32 0x3A96662F
+. 189 3A966BB7 20
+. 8D 04 3A 8B 7E 14 01 F8 39 81 98 01 00 00 0F 83 64 FA FF FF
+
+==== BB 190 (0x3A966620) in 3401B, out 19169B, BBs exec'd 0 ====
+ 0x3A966620: cmpl $0x2, %eax
+ 0x3A966623: jnz-8 0x3A96662F
+. 190 3A966620 5
+. 83 F8 02 75 0A
+
+==== BB 191 (0x3A966625) in 3406B, out 19226B, BBs exec'd 0 ====
+ 0x3A966625: movl 8(%esi),%eax
+ 0x3A966628: movl (%ecx),%edx
+ 0x3A96662A: addl %edx,%eax
+ 0x3A96662C: movl %eax,8(%ecx)
+ 0x3A96662F: addl $0x20, %esi
+ 0x3A966632: cmpl 0xFFFFFEE4(%ebp),%esi
+ 0x3A966638: jnb-8 0x3A9666B9
+. 191 3A966625 21
+. 8B 46 08 8B 11 01 D0 89 41 08 83 C6 20 3B B5 E4 FE FF FF 73 7F
+
+==== BB 192 (0x3A966CC0) in 3427B, out 19346B, BBs exec'd 0 ====
+ 0x3A966CC0: movl 24(%esi),%eax
+ 0x3A966CC3: movl %eax,0xFFFFFC00(%ebx)
+ 0x3A966CC9: jmp 0x3A96662F
+. 192 3A966CC0 14
+. 8B 46 18 89 83 00 FC FF FF E9 61 F9 FF FF
+
+==== BB 193 (0x3A9666B9) in 3441B, out 19406B, BBs exec'd 0 ====
+ 0x3A9666B9: movl 0x198(%ecx),%edx
+ 0x3A9666BF: testl %edx,%edx
+ 0x3A9666C1: jnz-8 0x3A9666CE
+. 193 3A9666B9 10
+. 8B 91 98 01 00 00 85 D2 75 0B
+
+==== BB 194 (0x3A9666CE) in 3451B, out 19481B, BBs exec'd 0 ====
+ 0x3A9666CE: movl 0xFFFFF9F8(%ebx),%eax
+ 0x3A9666D4: testl %eax,%eax
+ 0x3A9666D6: jnz-8 0x3A9666F4
+. 194 3A9666CE 10
+. 8B 83 F8 F9 FF FF 85 C0 75 1C
+
+==== BB 195 (0x3A9666F4) in 3461B, out 19556B, BBs exec'd 0 ====
+ 0x3A9666F4: cmpb $0x0, 0xFFFFFF02(%ebp)
+ 0x3A9666FB: jnz-32 0x3A966837
+. 195 3A9666F4 13
+. 80 BD 02 FF FF FF 00 0F 85 36 01 00 00
+
+==== BB 196 (0x3A966701) in 3474B, out 19622B, BBs exec'd 0 ====
+ 0x3A966701: movl %ecx,0xFFFFFEE0(%ebp)
+ 0x3A966707: movl 8(%ecx),%esi
+ 0x3A96670A: testl %esi,%esi
+ 0x3A96670C: movl %esi,0xFFFFFEDC(%ebp)
+ 0x3A966712: jz-32 0x3A96682C
+. 196 3A966701 23
+. 89 8D E0 FE FF FF 8B 71 08 85 F6 89 B5 DC FE FF FF 0F 84 14 01 00 00
+
+==== BB 197 (0x3A966718) in 3497B, out 19723B, BBs exec'd 0 ====
+ 0x3A966718: movl (%esi),%esi
+ 0x3A96671A: leal 24(%ecx), %edi
+ 0x3A96671D: testl %esi,%esi
+ 0x3A96671F: jnz-8 0x3A966741
+. 197 3A966718 9
+. 8B 36 8D 79 18 85 F6 75 20
+
+==== BB 198 (0x3A966741) in 3506B, out 19805B, BBs exec'd 0 ====
+ 0x3A966741: cmpl $0x21, %esi
+ 0x3A966744: jle-8 0x3A966723
+. 198 3A966741 5
+. 83 FE 21 7E DD
+
+==== BB 199 (0x3A966723) in 3511B, out 19862B, BBs exec'd 0 ====
+ 0x3A966723: movl 0xFFFFFEDC(%ebp),%edx
+ 0x3A966729: movl %edx,(%edi,%esi,4)
+ 0x3A96672C: addl $0x8, 0xFFFFFEDC(%ebp)
+ 0x3A966733: movl 0xFFFFFEDC(%ebp),%esi
+ 0x3A966739: movl (%esi),%eax
+ 0x3A96673B: testl %eax,%eax
+ 0x3A96673D: movl %eax,%esi
+ 0x3A96673F: jz-8 0x3A966768
+. 199 3A966723 30
+. 8B 95 DC FE FF FF 89 14 B7 83 85 DC FE FF FF 08 8B B5 DC FE FF FF 8B 06 85 C0 89 C6 74 27
+
+==== BB 200 (0x3A966746) in 3541B, out 20003B, BBs exec'd 0 ====
+ 0x3A966746: movl $0x6FFFFFFF,%eax
+ 0x3A96674B: subl %esi,%eax
+ 0x3A96674D: cmpl $0xF, %eax
+ 0x3A966750: jnbe-32 0x3A966BD6
+. 200 3A966746 16
+. B8 FF FF FF 6F 29 F0 83 F8 0F 0F 87 80 04 00 00
+
+==== BB 201 (0x3A966756) in 3557B, out 20076B, BBs exec'd 0 ====
+ 0x3A966756: movl $0x70000021,%eax
+ 0x3A96675B: subl %esi,%eax
+ 0x3A96675D: movl 0xFFFFFEDC(%ebp),%esi
+ 0x3A966763: movl %esi,(%edi,%eax,4)
+ 0x3A966766: jmp-8 0x3A96672C
+. 201 3A966756 18
+. B8 21 00 00 70 29 F0 8B B5 DC FE FF FF 89 34 87 EB C4
+
+==== BB 202 (0x3A96672C) in 3575B, out 20160B, BBs exec'd 0 ====
+ 0x3A96672C: addl $0x8, 0xFFFFFEDC(%ebp)
+ 0x3A966733: movl 0xFFFFFEDC(%ebp),%esi
+ 0x3A966739: movl (%esi),%eax
+ 0x3A96673B: testl %eax,%eax
+ 0x3A96673D: movl %eax,%esi
+ 0x3A96673F: jz-8 0x3A966768
+. 202 3A96672C 21
+. 83 85 DC FE FF FF 08 8B B5 DC FE FF FF 8B 06 85 C0 89 C6 74 27
+
+==== BB 203 (0x3A966768) in 3596B, out 20268B, BBs exec'd 0 ====
+ 0x3A966768: movl (%ecx),%edx
+ 0x3A96676A: testl %edx,%edx
+ 0x3A96676C: jz-8 0x3A9667C7
+. 203 3A966768 6
+. 8B 11 85 D2 74 59
+
+==== BB 204 (0x3A9667C7) in 3602B, out 20337B, BBs exec'd 0 ====
+ 0x3A9667C7: movl 120(%edi),%edx
+ 0x3A9667CA: testl %edx,%edx
+ 0x3A9667CC: jz-8 0x3A9667FE
+. 204 3A9667C7 7
+. 8B 57 78 85 D2 74 30
+
+==== BB 205 (0x3A9667FE) in 3609B, out 20409B, BBs exec'd 0 ====
+ 0x3A9667FE: movl 0x98(%edi),%edx
+ 0x3A966804: testl %edx,%edx
+ 0x3A966806: jz-8 0x3A96681E
+. 205 3A9667FE 10
+. 8B 97 98 00 00 00 85 D2 74 16
+
+==== BB 206 (0x3A96681E) in 3619B, out 20487B, BBs exec'd 0 ====
+ 0x3A96681E: movl 116(%edi),%eax
+ 0x3A966821: testl %eax,%eax
+ 0x3A966823: jz-8 0x3A96682C
+. 206 3A96681E 7
+. 8B 47 74 85 C0 74 07
+
+==== BB 207 (0x3A96682C) in 3626B, out 20559B, BBs exec'd 0 ====
+ 0x3A96682C: movl 40(%ecx),%eax
+ 0x3A96682F: testl %eax,%eax
+ 0x3A966831: jnz-32 0x3A966D00
+. 207 3A96682C 11
+. 8B 41 28 85 C0 0F 85 C9 04 00 00
+
+==== BB 208 (0x3A966D00) in 3637B, out 20631B, BBs exec'd 0 ====
+ 0x3A966D00: movl %ecx,%eax
+ 0x3A966D02: call 0x3A96BD80
+. 208 3A966D00 7
+. 89 C8 E8 79 50 00 00
+
+==== BB 209 (0x3A966D07) in 3644B, out 20686B, BBs exec'd 0 ====
+ 0x3A966D07: jmp 0x3A966837
+. 209 3A966D07 5
+. E9 2B FB FF FF
+
+==== BB 210 (0x3A966837) in 3649B, out 20714B, BBs exec'd 0 ====
+ 0x3A966837: cmpl $0x2, 0xFFFFFF50(%ebp)
+ 0x3A96683E: jz-32 0x3A967D63
+. 210 3A966837 13
+. 83 BD 50 FF FF FF 02 0F 84 1F 15 00 00
+
+==== BB 211 (0x3A966844) in 3662B, out 20780B, BBs exec'd 0 ====
+ 0x3A966844: cmpb $0x0, 0xFFFFFF02(%ebp)
+ 0x3A96684B: jz-32 0x3A966CF0
+. 211 3A966844 13
+. 80 BD 02 FF FF FF 00 0F 84 9F 04 00 00
+
+==== BB 212 (0x3A966CF0) in 3675B, out 20846B, BBs exec'd 0 ====
+ 0x3A966CF0: movl 0xAC(%ebx),%eax
+ 0x3A966CF6: call 0x3A96AB30
+. 212 3A966CF0 11
+. 8B 83 AC 00 00 00 E8 35 3E 00 00
+
+==== BB 213 _dl_init_paths(0x3A96AB30) in 3686B, out 20910B, BBs exec'd 0 ====
+ 0x3A96AB30: pushl %ebp
+ 0x3A96AB31: movl %esp,%ebp
+ 0x3A96AB33: pushl %edi
+ 0x3A96AB34: pushl %esi
+ 0x3A96AB35: pushl %ebx
+ 0x3A96AB36: subl $0x2C, %esp
+ 0x3A96AB39: call 0x3A97592B
+. 213 3A96AB30 14
+. 55 89 E5 57 56 53 83 EC 2C E8 ED AD 00 00
+
+==== BB 214 (0x3A96AB3E) in 3700B, out 21043B, BBs exec'd 0 ====
+ 0x3A96AB3E: addl $0xDB2E, %ebx
+ 0x3A96AB44: movl %eax,-16(%ebp)
+ 0x3A96AB47: movl 0xFFFFFC24(%ebx),%edx
+ 0x3A96AB4D: leal 0xCC(%ebx), %ecx
+ 0x3A96AB53: movl 0xFFFFFC20(%ebx),%eax
+ 0x3A96AB59: movl %ecx,(%esp,,)
+ 0x3A96AB5C: leal 0xC8(%ebx), %ecx
+ 0x3A96AB62: call 0x3A972740
+. 214 3A96AB3E 41
+. 81 C3 2E DB 00 00 89 45 F0 8B 93 24 FC FF FF 8D 8B CC 00 00 00 8B 83 20 FC FF FF 89 0C 24 8D 8B C8 00 00 00 E8 D9 7B 00 00
+
+==== BB 215 _dl_important_hwcaps(0x3A972740) in 3741B, out 21186B, BBs exec'd 0 ====
+ 0x3A972740: pushl %ebp
+ 0x3A972741: movl %esp,%ebp
+ 0x3A972743: pushl %edi
+ 0x3A972744: pushl %esi
+ 0x3A972745: pushl %ebx
+ 0x3A972746: subl $0x38, %esp
+ 0x3A972749: call 0x3A97592B
+. 215 3A972740 14
+. 55 89 E5 57 56 53 83 EC 38 E8 DD 31 00 00
+
+==== BB 216 (0x3A97274E) in 3755B, out 21319B, BBs exec'd 0 ====
+ 0x3A97274E: addl $0x5F1E, %ebx
+ 0x3A972754: movl %edx,-20(%ebp)
+ 0x3A972757: testl %eax,%eax
+ 0x3A972759: movl 0xFFFFFC58(%ebx),%edx
+ 0x3A97275F: movl %eax,-16(%ebp)
+ 0x3A972762: setnz %al
+ 0x3A972765: xorl %edi, %edi
+ 0x3A972767: andl 0xFFFFFC54(%ebx),%edx
+ 0x3A97276D: movzbl %al,%eax
+ 0x3A972770: movl %ecx,-24(%ebp)
+ 0x3A972773: movl %eax,-32(%ebp)
+ 0x3A972776: movl %edx,-28(%ebp)
+ 0x3A972779: jz-8 0x3A9727A0
+. 216 3A97274E 45
+. 81 C3 1E 5F 00 00 89 55 EC 85 C0 8B 93 58 FC FF FF 89 45 F0 0F 95 C0 31 FF 23 93 54 FC FF FF 0F B6 C0 89 4D E8 89 45 E0 89 55 E4 74 25
+
+==== BB 217 (0x3A9727A0) in 3800B, out 21523B, BBs exec'd 0 ====
+ 0x3A9727A0: movl -32(%ebp),%eax
+ 0x3A9727A3: testl %eax,%eax
+ 0x3A9727A5: jz-32 0x3A9728CB
+. 217 3A9727A0 11
+. 8B 45 E0 85 C0 0F 84 20 01 00 00
+
+==== BB 218 (0x3A9727AB) in 3811B, out 21595B, BBs exec'd 0 ====
+ 0x3A9727AB: movl -32(%ebp),%edx
+ 0x3A9727AE: xorl %esi, %esi
+ 0x3A9727B0: xorl %edi, %edi
+ 0x3A9727B2: leal 0x10(,%edx,8), %eax
+ 0x3A9727B9: subl %eax,%esp
+ 0x3A9727BB: movl -28(%ebp),%eax
+ 0x3A9727BE: leal 27(%esp,,), %ecx
+ 0x3A9727C2: andl $0xFFFFFFF0, %ecx
+ 0x3A9727C5: testl %eax,%eax
+ 0x3A9727C7: movl %ecx,-40(%ebp)
+ 0x3A9727CA: jz-8 0x3A97280C
+. 218 3A9727AB 33
+. 8B 55 E0 31 F6 31 FF 8D 04 D5 10 00 00 00 29 C4 8B 45 E4 8D 4C 24 1B 83 E1 F0 85 C0 89 4D D8 74 40
+
+==== BB 219 (0x3A97280C) in 3844B, out 21764B, BBs exec'd 0 ====
+ 0x3A97280C: movl -16(%ebp),%edi
+ 0x3A97280F: testl %edi,%edi
+ 0x3A972811: jz-8 0x3A972823
+. 219 3A97280C 7
+. 8B 7D F0 85 FF 74 10
+
+==== BB 220 (0x3A972813) in 3851B, out 21836B, BBs exec'd 0 ====
+ 0x3A972813: movl -40(%ebp),%eax
+ 0x3A972816: movl -16(%ebp),%edx
+ 0x3A972819: movl -20(%ebp),%ecx
+ 0x3A97281C: movl %edx,(%eax,%esi,8)
+ 0x3A97281F: movl %ecx,4(%eax,%esi,8)
+ 0x3A972823: cmpl $0x1, -32(%ebp)
+ 0x3A972827: jz-32 0x3A9728FD
+. 220 3A972813 26
+. 8B 45 D8 8B 55 F0 8B 4D EC 89 14 F0 89 4C F0 04 83 7D E0 01 0F 84 D0 00 00 00
+
+==== BB 221 (0x3A9728FD) in 3877B, out 21963B, BBs exec'd 0 ====
+ 0x3A9728FD: movl -40(%ebp),%esi
+ 0x3A972900: movl 4(%esi),%edx
+ 0x3A972903: incl %edx
+ 0x3A972904: movzbl -32(%ebp),%ecx
+ 0x3A972908: movl $0x1,%esi
+ 0x3A97290D: movl %esi,%eax
+ 0x3A97290F: shll %cl, %eax
+ 0x3A972911: movl -24(%ebp),%ecx
+ 0x3A972914: movl %eax,(%ecx)
+ 0x3A972916: leal (%edx,%eax,8), %eax
+ 0x3A972919: movl %eax,(%esp,,)
+ 0x3A97291C: call 0x3A96581C
+. 221 3A9728FD 36
+. 8B 75 D8 8B 56 04 42 0F B6 4D E0 BE 01 00 00 00 89 F0 D3 E0 8B 4D E8 89 01 8D 04 C2 89 04 24 E8 FB 2E FF FF
+
+==== BB 222 (0x3A97374A) in 3913B, out 22127B, BBs exec'd 0 ====
+ 0x3A97374A: movl 0x138(%ebx),%eax
+ 0x3A973750: addl %esi,%eax
+ 0x3A973752: leal -1(%eax), %edx
+ 0x3A973755: negl %esi
+ 0x3A973757: andl %esi,%edx
+ 0x3A973759: leal (%edi,%edx,1), %eax
+ 0x3A97375C: cmpl %ecx,%eax
+ 0x3A97375E: jnb-8 0x3A973780
+. 222 3A97374A 22
+. 8B 83 38 01 00 00 01 F0 8D 50 FF F7 DE 21 F2 8D 04 17 39 C8 73 20
+
+==== BB 223 (0x3A972921) in 3935B, out 22246B, BBs exec'd 0 ====
+ 0x3A972921: movl %eax,-36(%ebp)
+ 0x3A972924: testl %eax,%eax
+ 0x3A972926: jz-8 0x3A9728B4
+. 223 3A972921 7
+. 89 45 DC 85 C0 74 8C
+
+==== BB 224 (0x3A972928) in 3942B, out 22318B, BBs exec'd 0 ====
+ 0x3A972928: cmpl $0x1, -32(%ebp)
+ 0x3A97292C: jz-32 0x3A972A0B
+. 224 3A972928 10
+. 83 7D E0 01 0F 84 D9 00 00 00
+
+==== BB 225 (0x3A972A0B) in 3952B, out 22381B, BBs exec'd 0 ====
+ 0x3A972A0B: movl -24(%ebp),%esi
+ 0x3A972A0E: movl -36(%ebp),%edx
+ 0x3A972A11: movl -40(%ebp),%ecx
+ 0x3A972A14: movl (%esi),%eax
+ 0x3A972A16: leal (%edx,%eax,8), %eax
+ 0x3A972A19: movl %eax,(%edx)
+ 0x3A972A1B: movl 4(%ecx),%eax
+ 0x3A972A1E: incl %eax
+ 0x3A972A1F: movl %eax,4(%edx)
+ 0x3A972A22: movl (%esi),%eax
+ 0x3A972A24: movl $0x0, 12(%edx)
+ 0x3A972A2B: leal (%edx,%eax,8), %eax
+ 0x3A972A2E: movl %eax,8(%edx)
+ 0x3A972A31: movl 4(%ecx),%eax
+ 0x3A972A34: movl %eax,8(%esp,,)
+ 0x3A972A38: movl (%ecx),%eax
+ 0x3A972A3A: movl %eax,4(%esp,,)
+ 0x3A972A3E: movl (%esi),%eax
+ 0x3A972A40: leal (%edx,%eax,8), %eax
+ 0x3A972A43: movl %eax,(%esp,,)
+ 0x3A972A46: call 0x3A975770
+. 225 3A972A0B 64
+. 8B 75 E8 8B 55 DC 8B 4D D8 8B 06 8D 04 C2 89 02 8B 41 04 40 89 42 04 8B 06 C7 42 0C 00 00 00 00 8D 04 C2 89 42 08 8B 41 04 89 44 24 08 8B 01 89 44 24 04 8B 06 8D 04 C2 89 04 24 E8 25 2D 00 00
+
+==== BB 226 mempcpy(0x3A975770) in 4016B, out 22625B, BBs exec'd 0 ====
+ 0x3A975770: pushl %edi
+ 0x3A975771: pushl %esi
+ 0x3A975772: movl 12(%esp,,),%edi
+ 0x3A975776: movl 16(%esp,,),%esi
+ 0x3A97577A: movl 20(%esp,,),%ecx
+ 0x3A97577E: movl %edi,%eax
+ 0x3A975780: cld
+ 0x3A975781: cmpl $0x20, %ecx
+ 0x3A975784: jbe-8 0x3A9757D8
+. 226 3A975770 22
+. 57 56 8B 7C 24 0C 8B 74 24 10 8B 4C 24 14 89 F8 FC 83 F9 20 76 52
+
+==== BB 227 (0x3A9757D8) in 4038B, out 22774B, BBs exec'd 0 ====
+ 0x3A9757D8: rep movsb
+. 227 3A9757D8 2
+. F3 A4
+
+==== BB 228 (0x3A9757DA) in 4040B, out 22869B, BBs exec'd 0 ====
+ 0x3A9757DA: movl %edi,%eax
+ 0x3A9757DC: popl %esi
+ 0x3A9757DD: popl %edi
+ 0x3A9757DE: ret
+. 228 3A9757DA 5
+. 89 F8 5E 5F C3
+
+==== BB 229 (0x3A972A4B) in 4045B, out 22941B, BBs exec'd 0 ====
+ 0x3A972A4B: movb $0x2F, (%eax)
+ 0x3A972A4E: movl 8(%ebp),%edx
+ 0x3A972A51: movl $0x2, (%esi)
+ 0x3A972A57: movl -36(%ebp),%esi
+ 0x3A972A5A: movl 4(%esi),%eax
+ 0x3A972A5D: movl %eax,(%edx)
+ 0x3A972A5F: jmp 0x3A9728F0
+. 229 3A972A4B 25
+. C6 00 2F 8B 55 08 C7 06 02 00 00 00 8B 75 DC 8B 46 04 89 02 E9 8C FE FF FF
+
+==== BB 230 (0x3A9728F0) in 4070B, out 23047B, BBs exec'd 0 ====
+ 0x3A9728F0: movl -36(%ebp),%eax
+ 0x3A9728F3: leal -12(%ebp), %esp
+ 0x3A9728F6: popl %ebx
+ 0x3A9728F7: popl %esi
+ 0x3A9728F8: popl %edi
+ 0x3A9728F9: popl %ebp
+ 0x3A9728FA: ret 4
+. 230 3A9728F0 13
+. 8B 45 DC 8D 65 F4 5B 5E 5F 5D C2 04 00
+
+==== BB 231 (0x3A96AB67) in 4083B, out 23162B, BBs exec'd 0 ====
+ 0x3A96AB67: movl %eax,0xC4(%ebx)
+ 0x3A96AB6D: subl $0x4, %esp
+ 0x3A96AB70: movl $0xC, (%esp,,)
+ 0x3A96AB77: call 0x3A96581C
+. 231 3A96AB67 21
+. 89 83 C4 00 00 00 83 EC 04 C7 04 24 0C 00 00 00 E8 A0 AC FF FF
+
+==== BB 232 (0x3A96AB7C) in 4104B, out 23252B, BBs exec'd 0 ====
+ 0x3A96AB7C: movl %eax,0xD0(%ebx)
+ 0x3A96AB82: testl %eax,%eax
+ 0x3A96AB84: movl %eax,%esi
+ 0x3A96AB86: jz-32 0x3A96AE1F
+. 232 3A96AB7C 16
+. 89 83 D0 00 00 00 85 C0 89 C6 0F 84 93 02 00 00
+
+==== BB 233 (0x3A96AB8C) in 4120B, out 23334B, BBs exec'd 0 ====
+ 0x3A96AB8C: movl 0xC8(%ebx),%edx
+ 0x3A96AB92: movl $0xCCCCCCCD,%eax
+ 0x3A96AB97: leal 0x27(,%edx,4), %edx
+ 0x3A96AB9E: mull %edx
+ 0x3A96ABA0: shrl $0x4, %edx
+ 0x3A96ABA3: leal (%edx,%edx,4), %edx
+ 0x3A96ABA6: movl %edx,-24(%ebp)
+ 0x3A96ABA9: movl %edx,%eax
+ 0x3A96ABAB: shll $0x6, %eax
+ 0x3A96ABAE: movl %eax,(%esp,,)
+ 0x3A96ABB1: call 0x3A96581C
+. 233 3A96AB8C 42
+. 8B 93 C8 00 00 00 B8 CD CC CC CC 8D 14 95 27 00 00 00 F7 E2 C1 EA 04 8D 14 92 89 55 E8 89 D0 C1 E0 06 89 04 24 E8 66 AC FF FF
+
+==== BB 234 (0x3A96ABB6) in 4162B, out 23505B, BBs exec'd 0 ====
+ 0x3A96ABB6: movl %eax,(%esi)
+ 0x3A96ABB8: movl 0xD0(%ebx),%eax
+ 0x3A96ABBE: leal 0xFFFFE390(%ebx), %edx
+ 0x3A96ABC4: movl (%eax),%eax
+ 0x3A96ABC6: testl %eax,%eax
+ 0x3A96ABC8: jz-32 0x3A96AE25
+. 234 3A96ABB6 24
+. 89 06 8B 83 D0 00 00 00 8D 93 90 E3 FF FF 8B 00 85 C0 0F 84 57 02 00 00
+
+==== BB 235 (0x3A96ABCE) in 4186B, out 23613B, BBs exec'd 0 ====
+ 0x3A96ABCE: movl %eax,0xFFFFF9DC(%ebx)
+ 0x3A96ABD4: xorl %edx, %edx
+ 0x3A96ABD6: movl 0xC8(%ebx),%ecx
+ 0x3A96ABDC: movl %edx,0xD4(%ebx)
+ 0x3A96ABE2: movl %eax,%edx
+ 0x3A96ABE4: leal 0xFFFFD61C(%ebx), %eax
+ 0x3A96ABEA: movl %eax,-20(%ebp)
+ 0x3A96ABED: movl -24(%ebp),%eax
+ 0x3A96ABF0: leal 0xFFFFF017(%ebx), %edi
+ 0x3A96ABF6: movl $0x0, -40(%ebp)
+ 0x3A96ABFD: shll $0x2, %eax
+ 0x3A96AC00: movl %edi,-32(%ebp)
+ 0x3A96AC03: movl %eax,-28(%ebp)
+ 0x3A96AC06: movl %edx,(%esi)
+ 0x3A96AC08: movl -32(%ebp),%edi
+ 0x3A96AC0B: addl $0x4, %esi
+ 0x3A96AC0E: movl $0x0, 8(%edx)
+ 0x3A96AC15: movl -20(%ebp),%eax
+ 0x3A96AC18: movl %edi,4(%edx)
+ 0x3A96AC1B: movl -40(%ebp),%edi
+ 0x3A96AC1E: movl %eax,12(%edx)
+ 0x3A96AC21: movl -10732(%ebx,%edi,4),%edi
+ 0x3A96AC28: leal 1(%edi,%eax,1), %eax
+ 0x3A96AC2C: movl %eax,-20(%ebp)
+ 0x3A96AC2F: xorl %eax, %eax
+ 0x3A96AC31: cmpl %ecx,%eax
+ 0x3A96AC33: movl %edi,16(%edx)
+ 0x3A96AC36: jnb-8 0x3A96AC4B
+. 235 3A96ABCE 106
+. 89 83 DC F9 FF FF 31 D2 8B 8B C8 00 00 00 89 93 D4 00 00 00 89 C2 8D 83 1C D6 FF FF 89 45 EC 8B 45 E8 8D BB 17 F0 FF FF C7 45 D8 00 00 00 00 C1 E0 02 89 7D E0 89 45 E4 89 16 8B 7D E0 83 C6 04 C7 42 08 00 00 00 00 8B 45 EC 89 7A 04 8B 7D D8 89 42 0C 8B BC BB 14 D6 FF FF 8D 44 07 01 89 45 EC 31 C0 39 C8 89 7A 10 73 13
+
+==== BB 236 (0x3A96AC38) in 4292B, out 23976B, BBs exec'd 0 ====
+ 0x3A96AC38: nop
+ 0x3A96AC39: leal 0(%esi,,), %esi
+ 0x3A96AC40: xorl %edi, %edi
+ 0x3A96AC42: movl %edi,20(%edx,%eax,4)
+ 0x3A96AC46: incl %eax
+ 0x3A96AC47: cmpl %ecx,%eax
+ 0x3A96AC49: jb-8 0x3A96AC40
+. 236 3A96AC38 19
+. 90 8D B4 26 00 00 00 00 31 FF 89 7C 82 14 40 39 C8 72 F5
+
+==== BB 237 (0x3A96AC40) in 4311B, out 24086B, BBs exec'd 0 ====
+ 0x3A96AC40: xorl %edi, %edi
+ 0x3A96AC42: movl %edi,20(%edx,%eax,4)
+ 0x3A96AC46: incl %eax
+ 0x3A96AC47: cmpl %ecx,%eax
+ 0x3A96AC49: jb-8 0x3A96AC40
+. 237 3A96AC40 11
+. 31 FF 89 7C 82 14 40 39 C8 72 F5
+
+==== BB 238 (0x3A96AC4B) in 4322B, out 24179B, BBs exec'd 0 ====
+ 0x3A96AC4B: incl -40(%ebp)
+ 0x3A96AC4E: movl $0x0, -36(%ebp)
+ 0x3A96AC55: cmpl $0x2, -40(%ebp)
+ 0x3A96AC59: jz-8 0x3A96AC63
+. 238 3A96AC4B 16
+. FF 45 D8 C7 45 DC 00 00 00 00 83 7D D8 02 74 08
+
+==== BB 239 (0x3A96AC5B) in 4338B, out 24271B, BBs exec'd 0 ====
+ 0x3A96AC5B: movl -28(%ebp),%edi
+ 0x3A96AC5E: addl %edx,%edi
+ 0x3A96AC60: movl %edi,-36(%ebp)
+ 0x3A96AC63: movl -36(%ebp),%eax
+ 0x3A96AC66: movl %eax,(%edx)
+ 0x3A96AC68: movl -28(%ebp),%eax
+ 0x3A96AC6B: addl %eax,%edx
+ 0x3A96AC6D: cmpl $0x1, -40(%ebp)
+ 0x3A96AC71: jbe-8 0x3A96AC06
+. 239 3A96AC5B 24
+. 8B 7D E4 01 D7 89 7D DC 8B 45 DC 89 02 8B 45 E4 01 C2 83 7D D8 01 76 93
+
+==== BB 240 (0x3A96AC06) in 4362B, out 24406B, BBs exec'd 0 ====
+ 0x3A96AC06: movl %edx,(%esi)
+ 0x3A96AC08: movl -32(%ebp),%edi
+ 0x3A96AC0B: addl $0x4, %esi
+ 0x3A96AC0E: movl $0x0, 8(%edx)
+ 0x3A96AC15: movl -20(%ebp),%eax
+ 0x3A96AC18: movl %edi,4(%edx)
+ 0x3A96AC1B: movl -40(%ebp),%edi
+ 0x3A96AC1E: movl %eax,12(%edx)
+ 0x3A96AC21: movl -10732(%ebx,%edi,4),%edi
+ 0x3A96AC28: leal 1(%edi,%eax,1), %eax
+ 0x3A96AC2C: movl %eax,-20(%ebp)
+ 0x3A96AC2F: xorl %eax, %eax
+ 0x3A96AC31: cmpl %ecx,%eax
+ 0x3A96AC33: movl %edi,16(%edx)
+ 0x3A96AC36: jnb-8 0x3A96AC4B
+. 240 3A96AC06 50
+. 89 16 8B 7D E0 83 C6 04 C7 42 08 00 00 00 00 8B 45 EC 89 7A 04 8B 7D D8 89 42 0C 8B BC BB 14 D6 FF FF 8D 44 07 01 89 45 EC 31 C0 39 C8 89 7A 10 73 13
+
+==== BB 241 (0x3A96AC63) in 4412B, out 24613B, BBs exec'd 0 ====
+ 0x3A96AC63: movl -36(%ebp),%eax
+ 0x3A96AC66: movl %eax,(%edx)
+ 0x3A96AC68: movl -28(%ebp),%eax
+ 0x3A96AC6B: addl %eax,%edx
+ 0x3A96AC6D: cmpl $0x1, -40(%ebp)
+ 0x3A96AC71: jbe-8 0x3A96AC06
+. 241 3A96AC63 16
+. 8B 45 DC 89 02 8B 45 E4 01 C2 83 7D D8 01 76 93
+
+==== BB 242 (0x3A96AC73) in 4428B, out 24718B, BBs exec'd 0 ====
+ 0x3A96AC73: movl $0x0, (%esi)
+ 0x3A96AC79: movl 0xFFFFF994(%ebx),%esi
+ 0x3A96AC7F: movl $0x9,%edi
+ 0x3A96AC84: movl %edi,0xD8(%ebx)
+ 0x3A96AC8A: testl %esi,%esi
+ 0x3A96AC8C: jz-8 0x3A96ACB9
+. 242 3A96AC73 27
+. C7 06 00 00 00 00 8B B3 94 F9 FF FF BF 09 00 00 00 89 BB D8 00 00 00 85 F6 74 2B
+
+==== BB 243 (0x3A96AC8E) in 4455B, out 24833B, BBs exec'd 0 ====
+ 0x3A96AC8E: movl 0x8C(%esi),%edx
+ 0x3A96AC94: testl %edx,%edx
+ 0x3A96AC96: jnz-8 0x3A96ACE7
+. 243 3A96AC8E 10
+. 8B 96 8C 00 00 00 85 D2 75 4F
+
+==== BB 244 (0x3A96AC98) in 4465B, out 24908B, BBs exec'd 0 ====
+ 0x3A96AC98: movl 84(%esi),%edx
+ 0x3A96AC9B: movl $0xFFFFFFFF,%edi
+ 0x3A96ACA0: movl %edi,0x1CC(%esi)
+ 0x3A96ACA6: testl %edx,%edx
+ 0x3A96ACA8: jnz-32 0x3A96ADD9
+. 244 3A96AC98 22
+. 8B 56 54 BF FF FF FF FF 89 BE CC 01 00 00 85 D2 0F 85 2B 01 00 00
+
+==== BB 245 (0x3A96ACAE) in 4487B, out 25005B, BBs exec'd 0 ====
+ 0x3A96ACAE: movl $0xFFFFFFFF,%edi
+ 0x3A96ACB3: movl %edi,0x180(%esi)
+ 0x3A96ACB9: movl -16(%ebp),%esi
+ 0x3A96ACBC: testl %esi,%esi
+ 0x3A96ACBE: jz-8 0x3A96ACC8
+. 245 3A96ACAE 18
+. BF FF FF FF FF 89 BE 80 01 00 00 8B 75 F0 85 F6 74 08
+
+==== BB 246 (0x3A96ACC0) in 4505B, out 25105B, BBs exec'd 0 ====
+ 0x3A96ACC0: movl -16(%ebp),%edi
+ 0x3A96ACC3: cmpb $0x0, (%edi)
+ 0x3A96ACC6: jnz-8 0x3A96AD0D
+. 246 3A96ACC0 8
+. 8B 7D F0 80 3F 00 75 45
+
+==== BB 247 (0x3A96AD0D) in 4513B, out 25178B, BBs exec'd 0 ====
+ 0x3A96AD0D: movl %edi,(%esp,,)
+ 0x3A96AD10: movl %edi,%esi
+ 0x3A96AD12: call 0x3A9752D0
+. 247 3A96AD0D 10
+. 89 3C 24 89 FE E8 B9 A5 00 00
+
+==== BB 248 (0x3A975311) in 4523B, out 25240B, BBs exec'd 0 ====
+ 0x3A975311: xorl %ecx,%edx
+ 0x3A975313: andl $0x1010100, %edx
+ 0x3A975319: jnz-8 0x3A975369
+. 248 3A975311 10
+. 31 CA 81 E2 00 01 01 01 75 4E
+
+==== BB 249 (0x3A97531B) in 4533B, out 25311B, BBs exec'd 0 ====
+ 0x3A97531B: movl (%eax),%ecx
+ 0x3A97531D: addl $0x4, %eax
+ 0x3A975320: subl %ecx,%edx
+ 0x3A975322: addl $0xFEFEFEFF, %ecx
+ 0x3A975328: decl %edx
+ 0x3A975329: jnb-8 0x3A975369
+. 249 3A97531B 16
+. 8B 08 83 C0 04 29 CA 81 C1 FF FE FE FE 4A 73 3E
+
+==== BB 250 (0x3A97532B) in 4549B, out 25408B, BBs exec'd 0 ====
+ 0x3A97532B: xorl %ecx,%edx
+ 0x3A97532D: andl $0x1010100, %edx
+ 0x3A975333: jnz-8 0x3A975369
+. 250 3A97532B 10
+. 31 CA 81 E2 00 01 01 01 75 34
+
+==== BB 251 (0x3A975335) in 4559B, out 25479B, BBs exec'd 0 ====
+ 0x3A975335: movl (%eax),%ecx
+ 0x3A975337: addl $0x4, %eax
+ 0x3A97533A: subl %ecx,%edx
+ 0x3A97533C: addl $0xFEFEFEFF, %ecx
+ 0x3A975342: decl %edx
+ 0x3A975343: jnb-8 0x3A975369
+. 251 3A975335 16
+. 8B 08 83 C0 04 29 CA 81 C1 FF FE FE FE 4A 73 24
+
+==== BB 252 (0x3A975345) in 4575B, out 25576B, BBs exec'd 0 ====
+ 0x3A975345: xorl %ecx,%edx
+ 0x3A975347: andl $0x1010100, %edx
+ 0x3A97534D: jnz-8 0x3A975369
+. 252 3A975345 10
+. 31 CA 81 E2 00 01 01 01 75 1A
+
+==== BB 253 (0x3A97534F) in 4585B, out 25647B, BBs exec'd 0 ====
+ 0x3A97534F: movl (%eax),%ecx
+ 0x3A975351: addl $0x4, %eax
+ 0x3A975354: subl %ecx,%edx
+ 0x3A975356: addl $0xFEFEFEFF, %ecx
+ 0x3A97535C: decl %edx
+ 0x3A97535D: jnb-8 0x3A975369
+. 253 3A97534F 16
+. 8B 08 83 C0 04 29 CA 81 C1 FF FE FE FE 4A 73 0A
+
+==== BB 254 (0x3A97535F) in 4601B, out 25744B, BBs exec'd 0 ====
+ 0x3A97535F: xorl %ecx,%edx
+ 0x3A975361: andl $0x1010100, %edx
+ 0x3A975367: jz-8 0x3A975301
+. 254 3A97535F 10
+. 31 CA 81 E2 00 01 01 01 74 98
+
+==== BB 255 (0x3A975301) in 4611B, out 25815B, BBs exec'd 0 ====
+ 0x3A975301: movl (%eax),%ecx
+ 0x3A975303: addl $0x4, %eax
+ 0x3A975306: subl %ecx,%edx
+ 0x3A975308: addl $0xFEFEFEFF, %ecx
+ 0x3A97530E: decl %edx
+ 0x3A97530F: jnb-8 0x3A975369
+. 255 3A975301 16
+. 8B 08 83 C0 04 29 CA 81 C1 FF FE FE FE 4A 73 58
+
+==== BB 256 (0x3A96AD17) in 4627B, out 25912B, BBs exec'd 0 ====
+ 0x3A96AD17: leal 1(%eax), %edx
+ 0x3A96AD1A: addl $0x13, %eax
+ 0x3A96AD1D: andl $0xFFFFFFFC, %eax
+ 0x3A96AD20: subl %eax,%esp
+ 0x3A96AD22: leal 27(%esp,,), %eax
+ 0x3A96AD26: andl $0xFFFFFFF0, %eax
+ 0x3A96AD29: movl %edx,8(%esp,,)
+ 0x3A96AD2D: movl %edi,4(%esp,,)
+ 0x3A96AD31: movl %eax,(%esp,,)
+ 0x3A96AD34: call 0x3A975870
+. 256 3A96AD17 34
+. 8D 50 01 83 C0 13 83 E0 FC 29 C4 8D 44 24 1B 83 E0 F0 89 54 24 08 89 7C 24 04 89 04 24 E8 37 AB 00 00
+
+==== BB 257 (0x3A975886) in 4661B, out 26052B, BBs exec'd 0 ====
+ 0x3A975886: negl %eax
+ 0x3A975888: andl $0x3, %eax
+ 0x3A97588B: subl %eax,%ecx
+ 0x3A97588D: xchgl %eax, %ecx
+ 0x3A97588E: rep movsb
+. 257 3A975886 10
+. F7 D8 83 E0 03 29 C1 91 F3 A4
+
+==== BB 258 (0x3A975890) in 4671B, out 26179B, BBs exec'd 0 ====
+ 0x3A975890: movl %eax,%ecx
+ 0x3A975892: subl $0x20, %ecx
+ 0x3A975895: js-8 0x3A9758D5
+. 258 3A975890 7
+. 89 C1 83 E9 20 78 3E
+
+==== BB 259 (0x3A975897) in 4678B, out 26243B, BBs exec'd 0 ====
+ 0x3A975897: movl (%edi),%eax
+ 0x3A975899: movl 28(%edi),%edx
+ 0x3A97589C: subl $0x20, %ecx
+ 0x3A97589F: movl (%esi),%eax
+ 0x3A9758A1: movl 4(%esi),%edx
+ 0x3A9758A4: movl %eax,(%edi)
+ 0x3A9758A6: movl %edx,4(%edi)
+ 0x3A9758A9: movl 8(%esi),%eax
+ 0x3A9758AC: movl 12(%esi),%edx
+ 0x3A9758AF: movl %eax,8(%edi)
+ 0x3A9758B2: movl %edx,12(%edi)
+ 0x3A9758B5: movl 16(%esi),%eax
+ 0x3A9758B8: movl 20(%esi),%edx
+ 0x3A9758BB: movl %eax,16(%edi)
+ 0x3A9758BE: movl %edx,20(%edi)
+ 0x3A9758C1: movl 24(%esi),%eax
+ 0x3A9758C4: movl 28(%esi),%edx
+ 0x3A9758C7: movl %eax,24(%edi)
+ 0x3A9758CA: movl %edx,28(%edi)
+ 0x3A9758CD: leal 32(%esi), %esi
+ 0x3A9758D0: leal 32(%edi), %edi
+ 0x3A9758D3: jns-8 0x3A975899
+. 259 3A975897 62
+. 8B 07 8B 57 1C 83 E9 20 8B 06 8B 56 04 89 07 89 57 04 8B 46 08 8B 56 0C 89 47 08 89 57 0C 8B 46 10 8B 56 14 89 47 10 89 57 14 8B 46 18 8B 56 1C 89 47 18 89 57 1C 8D 76 20 8D 7F 20 79 C4
+
+==== BB 260 (0x3A9758D5) in 4740B, out 26506B, BBs exec'd 0 ====
+ 0x3A9758D5: addl $0x20, %ecx
+ 0x3A9758D8: movl 12(%esp,,),%eax
+ 0x3A9758DC: rep movsb
+. 260 3A9758D5 9
+. 83 C1 20 8B 44 24 0C F3 A4
+
+==== BB 261 (0x3A96AD39) in 4749B, out 26623B, BBs exec'd 0 ====
+ 0x3A96AD39: movl %eax,%edi
+ 0x3A96AD3B: movzbl (%esi),%eax
+ 0x3A96AD3E: movl $0x1,%edx
+ 0x3A96AD43: testb %al,%al
+ 0x3A96AD45: jz-8 0x3A96AD64
+. 261 3A96AD39 14
+. 89 C7 0F B6 06 BA 01 00 00 00 84 C0 74 1D
+
+==== BB 262 (0x3A96AD47) in 4763B, out 26723B, BBs exec'd 0 ====
+ 0x3A96AD47: movl %esi,%esi
+ 0x3A96AD49: leal 0(%edi,,), %edi
+ 0x3A96AD50: subb $0x3A, %al
+ 0x3A96AD52: cmpb $0x1, %al
+ 0x3A96AD54: setbe %al
+ 0x3A96AD57: movzbl %al,%eax
+ 0x3A96AD5A: incl %esi
+ 0x3A96AD5B: addl %eax,%edx
+ 0x3A96AD5D: movzbl (%esi),%eax
+ 0x3A96AD60: testb %al,%al
+ 0x3A96AD62: jnz-8 0x3A96AD50
+. 262 3A96AD47 29
+. 89 F6 8D BC 27 00 00 00 00 2C 3A 3C 01 0F 96 C0 0F B6 C0 46 01 C2 0F B6 06 84 C0 75 EC
+
+==== BB 263 (0x3A96AD50) in 4792B, out 26887B, BBs exec'd 0 ====
+ 0x3A96AD50: subb $0x3A, %al
+ 0x3A96AD52: cmpb $0x1, %al
+ 0x3A96AD54: setbe %al
+ 0x3A96AD57: movzbl %al,%eax
+ 0x3A96AD5A: incl %esi
+ 0x3A96AD5B: addl %eax,%edx
+ 0x3A96AD5D: movzbl (%esi),%eax
+ 0x3A96AD60: testb %al,%al
+ 0x3A96AD62: jnz-8 0x3A96AD50
+. 263 3A96AD50 20
+. 2C 3A 3C 01 0F 96 C0 0F B6 C0 46 01 C2 0F B6 06 84 C0 75 EC
+
+==== BB 264 (0x3A96AD64) in 4812B, out 27028B, BBs exec'd 0 ====
+ 0x3A96AD64: leal 0x4(,%edx,4), %eax
+ 0x3A96AD6B: movl %eax,(%esp,,)
+ 0x3A96AD6E: call 0x3A96581C
+. 264 3A96AD64 15
+. 8D 04 95 04 00 00 00 89 04 24 E8 A9 AA FF FF
+
+==== BB 265 (0x3A96AD73) in 4827B, out 27099B, BBs exec'd 0 ====
+ 0x3A96AD73: movl %eax,0xBC(%ebx)
+ 0x3A96AD79: testl %eax,%eax
+ 0x3A96AD7B: movl %eax,%esi
+ 0x3A96AD7D: leal 0xFFFFE390(%ebx), %edx
+ 0x3A96AD83: jz-32 0x3A96AE25
+. 265 3A96AD73 22
+. 89 83 BC 00 00 00 85 C0 89 C6 8D 93 90 E3 FF FF 0F 84 9C 00 00 00
+
+==== BB 266 (0x3A96AD89) in 4849B, out 27194B, BBs exec'd 0 ====
+ 0x3A96AD89: xorl %ecx, %ecx
+ 0x3A96AD8B: leal 0xFFFFF02A(%ebx), %eax
+ 0x3A96AD91: movl %esi,%edx
+ 0x3A96AD93: movl %ecx,8(%esp,,)
+ 0x3A96AD97: leal 0xFFFFF03A(%ebx), %ecx
+ 0x3A96AD9D: movl %eax,4(%esp,,)
+ 0x3A96ADA1: movl 0x130(%ebx),%eax
+ 0x3A96ADA7: movl %eax,(%esp,,)
+ 0x3A96ADAA: movl %edi,%eax
+ 0x3A96ADAC: call 0x3A968AC0
+. 266 3A96AD89 40
+. 31 C9 8D 83 2A F0 FF FF 89 F2 89 4C 24 08 8D 8B 3A F0 FF FF 89 44 24 04 8B 83 30 01 00 00 89 04 24 89 F8 E8 0F DD FF FF
+
+==== BB 267 fillin_rpath(0x3A968AC0) in 4889B, out 27340B, BBs exec'd 0 ====
+ 0x3A968AC0: pushl %ebp
+ 0x3A968AC1: movl %esp,%ebp
+ 0x3A968AC3: pushl %edi
+ 0x3A968AC4: pushl %esi
+ 0x3A968AC5: pushl %ebx
+ 0x3A968AC6: subl $0x3C, %esp
+ 0x3A968AC9: call 0x3A97592B
+. 267 3A968AC0 14
+. 55 89 E5 57 56 53 83 EC 3C E8 5D CE 00 00
+
+==== BB 268 (0x3A968ACE) in 4903B, out 27473B, BBs exec'd 0 ====
+ 0x3A968ACE: addl $0xFB9E, %ebx
+ 0x3A968AD4: movl %eax,-16(%ebp)
+ 0x3A968AD7: leal -16(%ebp), %eax
+ 0x3A968ADA: movl %edx,-20(%ebp)
+ 0x3A968ADD: movl %ecx,-24(%ebp)
+ 0x3A968AE0: movl $0x0, -32(%ebp)
+ 0x3A968AE7: movl %eax,-60(%ebp)
+ 0x3A968AEA: leal 0x0(%esi), %esi
+ 0x3A968AF0: movl -24(%ebp),%eax
+ 0x3A968AF3: movl %eax,4(%esp,,)
+ 0x3A968AF7: movl -60(%ebp),%edx
+ 0x3A968AFA: movl %edx,(%esp,,)
+ 0x3A968AFD: call 0x3A973530
+. 268 3A968ACE 52
+. 81 C3 9E FB 00 00 89 45 F0 8D 45 F0 89 55 EC 89 4D E8 C7 45 E0 00 00 00 00 89 45 C4 8D B6 00 00 00 00 8B 45 E8 89 44 24 04 8B 55 C4 89 14 24 E8 2E AA 00 00
+
+==== BB 269 __strsep_g(0x3A973530) in 4955B, out 27668B, BBs exec'd 0 ====
+ 0x3A973530: pushl %ebp
+ 0x3A973531: movl %esp,%ebp
+ 0x3A973533: pushl %edi
+ 0x3A973534: pushl %esi
+ 0x3A973535: movl 8(%ebp),%eax
+ 0x3A973538: movl (%eax),%edi
+ 0x3A97353A: testl %edi,%edi
+ 0x3A97353C: jz-8 0x3A97358F
+. 269 3A973530 14
+. 55 89 E5 57 56 8B 45 08 8B 38 85 FF 74 51
+
+==== BB 270 (0x3A97353E) in 4969B, out 27808B, BBs exec'd 0 ====
+ 0x3A97353E: movzbl (%edi),%eax
+ 0x3A973541: movl %edi,%esi
+ 0x3A973543: testb %al,%al
+ 0x3A973545: jz-8 0x3A973588
+. 270 3A97353E 9
+. 0F B6 07 89 FE 84 C0 74 41
+
+==== BB 271 (0x3A973547) in 4978B, out 27892B, BBs exec'd 0 ====
+ 0x3A973547: movl %esi,%esi
+ 0x3A973549: leal 0(%edi,,), %edi
+ 0x3A973550: movl 12(%ebp),%ecx
+ 0x3A973553: movzbl (%ecx),%edx
+ 0x3A973556: cmpb %al,%dl
+ 0x3A973558: jz-8 0x3A97356C
+. 271 3A973547 19
+. 89 F6 8D BC 27 00 00 00 00 8B 4D 0C 0F B6 11 38 C2 74 12
+
+==== BB 272 (0x3A97355A) in 4997B, out 27999B, BBs exec'd 0 ====
+ 0x3A97355A: leal 0x0(%esi), %esi
+ 0x3A973560: incl %ecx
+ 0x3A973561: movzbl (%ecx),%edx
+ 0x3A973564: testb %dl,%dl
+ 0x3A973566: jz-8 0x3A973580
+. 272 3A97355A 14
+. 8D B6 00 00 00 00 41 0F B6 11 84 D2 74 18
+
+==== BB 273 (0x3A973568) in 5011B, out 28098B, BBs exec'd 0 ====
+ 0x3A973568: cmpb %al,%dl
+ 0x3A97356A: jnz-8 0x3A973560
+. 273 3A973568 4
+. 38 C2 75 F4
+
+==== BB 274 (0x3A973560) in 5015B, out 28156B, BBs exec'd 0 ====
+ 0x3A973560: incl %ecx
+ 0x3A973561: movzbl (%ecx),%edx
+ 0x3A973564: testb %dl,%dl
+ 0x3A973566: jz-8 0x3A973580
+. 274 3A973560 8
+. 41 0F B6 11 84 D2 74 18
+
+==== BB 275 (0x3A973580) in 5023B, out 28238B, BBs exec'd 0 ====
+ 0x3A973580: incl %esi
+ 0x3A973581: movzbl (%esi),%eax
+ 0x3A973584: testb %al,%al
+ 0x3A973586: jnz-8 0x3A973550
+. 275 3A973580 8
+. 46 0F B6 06 84 C0 75 C8
+
+==== BB 276 (0x3A973550) in 5031B, out 28320B, BBs exec'd 0 ====
+ 0x3A973550: movl 12(%ebp),%ecx
+ 0x3A973553: movzbl (%ecx),%edx
+ 0x3A973556: cmpb %al,%dl
+ 0x3A973558: jz-8 0x3A97356C
+. 276 3A973550 10
+. 8B 4D 0C 0F B6 11 38 C2 74 12
+
+==== BB 277 (0x3A973588) in 5041B, out 28404B, BBs exec'd 0 ====
+ 0x3A973588: xorl %esi, %esi
+ 0x3A97358A: movl 8(%ebp),%eax
+ 0x3A97358D: movl %esi,(%eax)
+ 0x3A97358F: popl %esi
+ 0x3A973590: movl %edi,%eax
+ 0x3A973592: popl %edi
+ 0x3A973593: popl %ebp
+ 0x3A973594: ret
+. 277 3A973588 13
+. 31 F6 8B 45 08 89 30 5E 89 F8 5F 5D C3
+
+==== BB 278 (0x3A968B02) in 5054B, out 28525B, BBs exec'd 0 ====
+ 0x3A968B02: movl %eax,-28(%ebp)
+ 0x3A968B05: testl %eax,%eax
+ 0x3A968B07: jz-32 0x3A968BFB
+. 278 3A968B02 11
+. 89 45 E4 85 C0 0F 84 EE 00 00 00
+
+==== BB 279 (0x3A968B0D) in 5065B, out 28597B, BBs exec'd 0 ====
+ 0x3A968B0D: movl %eax,(%esp,,)
+ 0x3A968B10: call 0x3A9752D0
+. 279 3A968B0D 8
+. 89 04 24 E8 BB C7 00 00
+
+==== BB 280 (0x3A968B15) in 5073B, out 28652B, BBs exec'd 0 ====
+ 0x3A968B15: movl %eax,-40(%ebp)
+ 0x3A968B18: testl %eax,%eax
+ 0x3A968B1A: jnz-8 0x3A968B25
+. 280 3A968B15 7
+. 89 45 D8 85 C0 75 09
+
+==== BB 281 (0x3A968B25) in 5080B, out 28724B, BBs exec'd 0 ====
+ 0x3A968B25: cmpl $0x1, -40(%ebp)
+ 0x3A968B29: jbe-8 0x3A968B3C
+. 281 3A968B25 6
+. 83 7D D8 01 76 11
+
+==== BB 282 (0x3A968B2B) in 5086B, out 28787B, BBs exec'd 0 ====
+ 0x3A968B2B: movl -28(%ebp),%ecx
+ 0x3A968B2E: movl -40(%ebp),%edi
+ 0x3A968B31: cmpb $0x2F, -1(%edi,%ecx,1)
+ 0x3A968B36: jz-32 0x3A968C12
+. 282 3A968B2B 17
+. 8B 4D E4 8B 7D D8 80 7C 0F FF 2F 0F 84 D6 00 00 00
+
+==== BB 283 (0x3A968B3C) in 5103B, out 28877B, BBs exec'd 0 ====
+ 0x3A968B3C: movl -40(%ebp),%eax
+ 0x3A968B3F: testl %eax,%eax
+ 0x3A968B41: jz-8 0x3A968B58
+. 283 3A968B3C 7
+. 8B 45 D8 85 C0 74 15
+
+==== BB 284 (0x3A968B43) in 5110B, out 28949B, BBs exec'd 0 ====
+ 0x3A968B43: movl -28(%ebp),%ecx
+ 0x3A968B46: movl -40(%ebp),%edi
+ 0x3A968B49: cmpb $0x2F, -1(%edi,%ecx,1)
+ 0x3A968B4E: jz-8 0x3A968B58
+. 284 3A968B43 13
+. 8B 4D E4 8B 7D D8 80 7C 0F FF 2F 74 08
+
+==== BB 285 (0x3A968B50) in 5123B, out 29039B, BBs exec'd 0 ====
+ 0x3A968B50: movb $0x2F, (%edi,%ecx,1)
+ 0x3A968B54: incl %edi
+ 0x3A968B55: movl %edi,-40(%ebp)
+ 0x3A968B58: movl 8(%ebp),%eax
+ 0x3A968B5B: testl %eax,%eax
+ 0x3A968B5D: jnz-32 0x3A968D35
+. 285 3A968B50 19
+. C6 04 0F 2F 47 89 7D D8 8B 45 08 85 C0 0F 85 D2 01 00 00
+
+==== BB 286 (0x3A968B63) in 5142B, out 29150B, BBs exec'd 0 ====
+ 0x3A968B63: movl 0xFFFFF9DC(%ebx),%edx
+ 0x3A968B69: testl %edx,%edx
+ 0x3A968B6B: movl %edx,-36(%ebp)
+ 0x3A968B6E: jnz-8 0x3A968B85
+. 286 3A968B63 13
+. 8B 93 DC F9 FF FF 85 D2 89 55 DC 75 15
+
+==== BB 287 (0x3A968B85) in 5155B, out 29238B, BBs exec'd 0 ====
+ 0x3A968B85: movl -36(%ebp),%ecx
+ 0x3A968B88: movl -40(%ebp),%edi
+ 0x3A968B8B: cmpl %edi,16(%ecx)
+ 0x3A968B8E: jnz-8 0x3A968B75
+. 287 3A968B85 11
+. 8B 4D DC 8B 7D D8 39 79 10 75 E5
+
+==== BB 288 (0x3A968B75) in 5166B, out 29326B, BBs exec'd 0 ====
+ 0x3A968B75: movl -36(%ebp),%edx
+ 0x3A968B78: movl (%edx),%edx
+ 0x3A968B7A: testl %edx,%edx
+ 0x3A968B7C: movl %edx,-36(%ebp)
+ 0x3A968B7F: jz-32 0x3A968C31
+. 288 3A968B75 16
+. 8B 55 DC 8B 12 85 D2 89 55 DC 0F 84 AC 00 00 00
+
+==== BB 289 (0x3A968C31) in 5182B, out 29415B, BBs exec'd 0 ====
+ 0x3A968C31: movl 16(%ebp),%ecx
+ 0x3A968C34: xorl %esi, %esi
+ 0x3A968C36: testl %ecx,%ecx
+ 0x3A968C38: jz-8 0x3A968C48
+. 289 3A968C31 9
+. 8B 4D 10 31 F6 85 C9 74 0E
+
+==== BB 290 (0x3A968C48) in 5191B, out 29501B, BBs exec'd 0 ====
+ 0x3A968C48: movl 0xC8(%ebx),%eax
+ 0x3A968C4E: movl -40(%ebp),%edx
+ 0x3A968C51: leal (%esi,%eax,4), %eax
+ 0x3A968C54: leal 21(%edx,%eax,1), %eax
+ 0x3A968C58: movl %eax,(%esp,,)
+ 0x3A968C5B: call 0x3A96581C
+. 290 3A968C48 24
+. 8B 83 C8 00 00 00 8B 55 D8 8D 04 86 8D 44 02 15 89 04 24 E8 BC CB FF FF
+
+==== BB 291 (0x3A968C60) in 5215B, out 29607B, BBs exec'd 0 ====
+ 0x3A968C60: movl %eax,-36(%ebp)
+ 0x3A968C63: testl %eax,%eax
+ 0x3A968C65: jz-32 0x3A968DBF
+. 291 3A968C60 11
+. 89 45 DC 85 C0 0F 84 54 01 00 00
+
+==== BB 292 (0x3A968C6B) in 5226B, out 29679B, BBs exec'd 0 ====
+ 0x3A968C6B: movl -36(%ebp),%ecx
+ 0x3A968C6E: movl 0xC8(%ebx),%eax
+ 0x3A968C74: movl -40(%ebp),%edi
+ 0x3A968C77: leal 20(%ecx,%eax,4), %eax
+ 0x3A968C7B: movl %eax,12(%ecx)
+ 0x3A968C7E: movl %edi,8(%esp,,)
+ 0x3A968C82: movl -28(%ebp),%eax
+ 0x3A968C85: movl %eax,4(%esp,,)
+ 0x3A968C89: movl 12(%ecx),%eax
+ 0x3A968C8C: movl %eax,(%esp,,)
+ 0x3A968C8F: call 0x3A975770
+. 292 3A968C6B 41
+. 8B 4D DC 8B 83 C8 00 00 00 8B 7D D8 8D 44 81 14 89 41 0C 89 7C 24 08 8B 45 E4 89 44 24 04 8B 41 0C 89 04 24 E8 DC CA 00 00
+
+==== BB 293 (0x3A975786) in 5267B, out 29837B, BBs exec'd 0 ====
+ 0x3A975786: negl %eax
+ 0x3A975788: andl $0x3, %eax
+ 0x3A97578B: subl %eax,%ecx
+ 0x3A97578D: xchgl %eax, %ecx
+ 0x3A97578E: rep movsb
+. 293 3A975786 10
+. F7 D8 83 E0 03 29 C1 91 F3 A4
+
+==== BB 294 (0x3A975790) in 5277B, out 29964B, BBs exec'd 0 ====
+ 0x3A975790: movl %eax,%ecx
+ 0x3A975792: subl $0x20, %ecx
+ 0x3A975795: js-8 0x3A9757D5
+. 294 3A975790 7
+. 89 C1 83 E9 20 78 3E
+
+==== BB 295 (0x3A975797) in 5284B, out 30028B, BBs exec'd 0 ====
+ 0x3A975797: movl (%edi),%eax
+ 0x3A975799: movl 28(%edi),%edx
+ 0x3A97579C: subl $0x20, %ecx
+ 0x3A97579F: movl (%esi),%eax
+ 0x3A9757A1: movl 4(%esi),%edx
+ 0x3A9757A4: movl %eax,(%edi)
+ 0x3A9757A6: movl %edx,4(%edi)
+ 0x3A9757A9: movl 8(%esi),%eax
+ 0x3A9757AC: movl 12(%esi),%edx
+ 0x3A9757AF: movl %eax,8(%edi)
+ 0x3A9757B2: movl %edx,12(%edi)
+ 0x3A9757B5: movl 16(%esi),%eax
+ 0x3A9757B8: movl 20(%esi),%edx
+ 0x3A9757BB: movl %eax,16(%edi)
+ 0x3A9757BE: movl %edx,20(%edi)
+ 0x3A9757C1: movl 24(%esi),%eax
+ 0x3A9757C4: movl 28(%esi),%edx
+ 0x3A9757C7: movl %eax,24(%edi)
+ 0x3A9757CA: movl %edx,28(%edi)
+ 0x3A9757CD: leal 32(%esi), %esi
+ 0x3A9757D0: leal 32(%edi), %edi
+ 0x3A9757D3: jns-8 0x3A975799
+. 295 3A975797 62
+. 8B 07 8B 57 1C 83 E9 20 8B 06 8B 56 04 89 07 89 57 04 8B 46 08 8B 56 0C 89 47 08 89 57 0C 8B 46 10 8B 56 14 89 47 10 89 57 14 8B 46 18 8B 56 1C 89 47 18 89 57 1C 8D 76 20 8D 7F 20 79 C4
+
+==== BB 296 (0x3A9757D5) in 5346B, out 30291B, BBs exec'd 0 ====
+ 0x3A9757D5: addl $0x20, %ecx
+ 0x3A9757D8: rep movsb
+. 296 3A9757D5 5
+. 83 C1 20 F3 A4
+
+==== BB 297 (0x3A968C94) in 5351B, out 30396B, BBs exec'd 0 ====
+ 0x3A968C94: movb $0x0, (%eax)
+ 0x3A968C97: movl -36(%ebp),%edx
+ 0x3A968C9A: cmpl 0xD8(%ebx),%edi
+ 0x3A968CA0: movl %edi,16(%edx)
+ 0x3A968CA3: jbe-8 0x3A968CAB
+. 297 3A968C94 17
+. C6 00 00 8B 55 DC 3B BB D8 00 00 00 89 7A 10 76 06
+
+==== BB 298 (0x3A968CA5) in 5368B, out 30507B, BBs exec'd 0 ====
+ 0x3A968CA5: movl %edi,0xD8(%ebx)
+ 0x3A968CAB: movl -28(%ebp),%ecx
+ 0x3A968CAE: xorl %eax, %eax
+ 0x3A968CB0: cmpb $0x2F, (%ecx)
+ 0x3A968CB3: movl 0xC8(%ebx),%ecx
+ 0x3A968CB9: setnz %al
+ 0x3A968CBC: xorl %edx, %edx
+ 0x3A968CBE: addl %eax,%eax
+ 0x3A968CC0: cmpl %ecx,%edx
+ 0x3A968CC2: jnb-8 0x3A968CDC
+. 298 3A968CA5 31
+. 89 BB D8 00 00 00 8B 4D E4 31 C0 80 39 2F 8B 8B C8 00 00 00 0F 95 C0 31 D2 01 C0 39 CA 73 18
+
+==== BB 299 (0x3A968CC4) in 5399B, out 30672B, BBs exec'd 0 ====
+ 0x3A968CC4: leal 0x0(%esi), %esi
+ 0x3A968CCA: leal 0x0(%edi), %edi
+ 0x3A968CD0: movl -36(%ebp),%edi
+ 0x3A968CD3: movl %eax,20(%edi,%edx,4)
+ 0x3A968CD7: incl %edx
+ 0x3A968CD8: cmpl %ecx,%edx
+ 0x3A968CDA: jb-8 0x3A968CD0
+. 299 3A968CC4 24
+. 8D B6 00 00 00 00 8D BF 00 00 00 00 8B 7D DC 89 44 97 14 42 39 CA 72 F4
+
+==== BB 300 (0x3A968CD0) in 5423B, out 30790B, BBs exec'd 0 ====
+ 0x3A968CD0: movl -36(%ebp),%edi
+ 0x3A968CD3: movl %eax,20(%edi,%edx,4)
+ 0x3A968CD7: incl %edx
+ 0x3A968CD8: cmpl %ecx,%edx
+ 0x3A968CDA: jb-8 0x3A968CD0
+. 300 3A968CD0 12
+. 8B 7D DC 89 44 97 14 42 39 CA 72 F4
+
+==== BB 301 (0x3A968CDC) in 5435B, out 30885B, BBs exec'd 0 ====
+ 0x3A968CDC: movl 12(%ebp),%edx
+ 0x3A968CDF: movl -36(%ebp),%eax
+ 0x3A968CE2: movl %edx,4(%eax)
+ 0x3A968CE5: movl 16(%ebp),%edx
+ 0x3A968CE8: testl %edx,%edx
+ 0x3A968CEA: jz-32 0x3A968DB0
+. 301 3A968CDC 20
+. 8B 55 0C 8B 45 DC 89 50 04 8B 55 10 85 D2 0F 84 C0 00 00 00
+
+==== BB 302 (0x3A968DB0) in 5455B, out 30990B, BBs exec'd 0 ====
+ 0x3A968DB0: movl -36(%ebp),%edi
+ 0x3A968DB3: movl $0x0, 8(%edi)
+ 0x3A968DBA: jmp 0x3A968D12
+. 302 3A968DB0 15
+. 8B 7D DC C7 47 08 00 00 00 00 E9 53 FF FF FF
+
+==== BB 303 (0x3A968D12) in 5470B, out 31049B, BBs exec'd 0 ====
+ 0x3A968D12: movl 0xFFFFF9DC(%ebx),%eax
+ 0x3A968D18: movl -36(%ebp),%edx
+ 0x3A968D1B: movl -32(%ebp),%ecx
+ 0x3A968D1E: movl -20(%ebp),%edi
+ 0x3A968D21: movl %eax,(%edx)
+ 0x3A968D23: movl %edx,0xFFFFF9DC(%ebx)
+ 0x3A968D29: movl %edx,(%edi,%ecx,4)
+ 0x3A968D2C: incl %ecx
+ 0x3A968D2D: movl %ecx,-32(%ebp)
+ 0x3A968D30: jmp 0x3A968AF0
+. 303 3A968D12 35
+. 8B 83 DC F9 FF FF 8B 55 DC 8B 4D E0 8B 7D EC 89 02 89 93 DC F9 FF FF 89 14 8F 41 89 4D E0 E9 BB FD FF FF
+
+==== BB 304 (0x3A968AF0) in 5505B, out 31198B, BBs exec'd 0 ====
+ 0x3A968AF0: movl -24(%ebp),%eax
+ 0x3A968AF3: movl %eax,4(%esp,,)
+ 0x3A968AF7: movl -60(%ebp),%edx
+ 0x3A968AFA: movl %edx,(%esp,,)
+ 0x3A968AFD: call 0x3A973530
+. 304 3A968AF0 18
+. 8B 45 E8 89 44 24 04 8B 55 C4 89 14 24 E8 2E AA 00 00
+
+==== BB 305 (0x3A97358F) in 5523B, out 31289B, BBs exec'd 0 ====
+ 0x3A97358F: popl %esi
+ 0x3A973590: movl %edi,%eax
+ 0x3A973592: popl %edi
+ 0x3A973593: popl %ebp
+ 0x3A973594: ret
+. 305 3A97358F 6
+. 5E 89 F8 5F 5D C3
+
+==== BB 306 (0x3A968BFB) in 5529B, out 31377B, BBs exec'd 0 ====
+ 0x3A968BFB: movl -20(%ebp),%edi
+ 0x3A968BFE: movl -32(%ebp),%ecx
+ 0x3A968C01: movl %edi,%eax
+ 0x3A968C03: movl $0x0, (%edi,%ecx,4)
+ 0x3A968C0A: leal -12(%ebp), %esp
+ 0x3A968C0D: popl %ebx
+ 0x3A968C0E: popl %esi
+ 0x3A968C0F: popl %edi
+ 0x3A968C10: popl %ebp
+ 0x3A968C11: ret
+. 306 3A968BFB 23
+. 8B 7D EC 8B 4D E0 89 F8 C7 04 8F 00 00 00 00 8D 65 F4 5B 5E 5F 5D C3
+
+==== BB 307 (0x3A96ADB1) in 5552B, out 31534B, BBs exec'd 0 ====
+ 0x3A96ADB1: movl 0xBC(%ebx),%eax
+ 0x3A96ADB7: movl (%eax),%edx
+ 0x3A96ADB9: testl %edx,%edx
+ 0x3A96ADBB: jz-8 0x3A96AE0A
+. 307 3A96ADB1 12
+. 8B 83 BC 00 00 00 8B 10 85 D2 74 4D
+
+==== BB 308 (0x3A96ADBD) in 5564B, out 31619B, BBs exec'd 0 ====
+ 0x3A96ADBD: xorl %eax, %eax
+ 0x3A96ADBF: movl %eax,0xC0(%ebx)
+ 0x3A96ADC5: movl 0xFFFFF9DC(%ebx),%eax
+ 0x3A96ADCB: movl %eax,0xFFFFFD8C(%ebx)
+ 0x3A96ADD1: leal -12(%ebp), %esp
+ 0x3A96ADD4: popl %ebx
+ 0x3A96ADD5: popl %esi
+ 0x3A96ADD6: popl %edi
+ 0x3A96ADD7: popl %ebp
+ 0x3A96ADD8: ret
+. 308 3A96ADBD 28
+. 31 C0 89 83 C0 00 00 00 8B 83 DC F9 FF FF 89 83 8C FD FF FF 8D 65 F4 5B 5E 5F 5D C3
+
+==== BB 309 (0x3A966CFB) in 5592B, out 31781B, BBs exec'd 0 ====
+ 0x3A966CFB: jmp 0x3A966851
+. 309 3A966CFB 5
+. E9 51 FB FF FF
+
+==== BB 310 (0x3A966851) in 5597B, out 31809B, BBs exec'd 0 ====
+ 0x3A966851: movl 0xFFFFF9E8(%ebx),%esi
+ 0x3A966857: testl %esi,%esi
+ 0x3A966859: jnz-8 0x3A966869
+. 310 3A966851 10
+. 8B B3 E8 F9 FF FF 85 F6 75 0E
+
+==== BB 311 (0x3A96685B) in 5607B, out 31884B, BBs exec'd 0 ====
+ 0x3A96685B: movl 0xFFFFF9F8(%ebx),%eax
+ 0x3A966861: movl (%eax),%eax
+ 0x3A966863: movl %eax,0xFFFFF9E8(%ebx)
+ 0x3A966869: movzbl 0xFFFFFB58(%ebx),%eax
+ 0x3A966870: incl 0xFFFFF998(%ebx)
+ 0x3A966876: andb $0xFC, %al
+ 0x3A966878: orb $0x1, %al
+ 0x3A96687A: movb %al,0xFFFFFB58(%ebx)
+ 0x3A966880: leal 0xFFFFF994(%ebx), %eax
+ 0x3A966886: movl %eax,%edx
+ 0x3A966888: movl %eax,0xFFFFFED0(%ebp)
+ 0x3A96688E: addl $0x50, %edx
+ 0x3A966891: movl 0xFFFFF994(%ebx),%eax
+ 0x3A966897: addl $0x1, 0xFFFFF9C4(%ebx)
+ 0x3A96689E: movl %edx,12(%eax)
+ 0x3A9668A1: movl 0xFFFFF994(%ebx),%ecx
+ 0x3A9668A7: adcl $0x0, 0xFFFFF9C8(%ebx)
+ 0x3A9668AE: cmpl $0xFFFFFFFE, 0xFFFFFD78(%ebx)
+ 0x3A9668B5: movl %ecx,0xFFFFF9F4(%ebx)
+ 0x3A9668BB: jz-32 0x3A966CD8
+. 311 3A96685B 102
+. 8B 83 F8 F9 FF FF 8B 00 89 83 E8 F9 FF FF 0F B6 83 58 FB FF FF FF 83 98 F9 FF FF 24 FC 0C 01 88 83 58 FB FF FF 8D 83 94 F9 FF FF 89 C2 89 85 D0 FE FF FF 83 C2 50 8B 83 94 F9 FF FF 83 83 C4 F9 FF FF 01 89 50 0C 8B 8B 94 F9 FF FF 83 93 C8 F9 FF FF 00 83 BB 78 FD FF FF FE 89 8B F4 F9 FF FF 0F 84 17 04 00 00
+
+==== BB 312 (0x3A966CD8) in 5709B, out 32207B, BBs exec'd 0 ====
+ 0x3A966CD8: movl (%ecx),%ecx
+ 0x3A966CDA: movl $0xFFFFFFFF,%eax
+ 0x3A966CDF: testl %ecx,%ecx
+ 0x3A966CE1: jz-8 0x3A966CE5
+. 312 3A966CD8 11
+. 8B 09 B8 FF FF FF FF 85 C9 74 02
+
+==== BB 313 (0x3A966CE5) in 5720B, out 32288B, BBs exec'd 0 ====
+ 0x3A966CE5: movl %eax,0xFFFFFD78(%ebx)
+ 0x3A966CEB: jmp 0x3A9668C1
+. 313 3A966CE5 11
+. 89 83 78 FD FF FF E9 D1 FB FF FF
+
+==== BB 314 (0x3A9668C1) in 5731B, out 32335B, BBs exec'd 0 ====
+ 0x3A9668C1: movl 0xFFFFFB78(%ebx),%eax
+ 0x3A9668C7: movl 28(%eax),%edx
+ 0x3A9668CA: movl %eax,%esi
+ 0x3A9668CC: addl %edx,%esi
+ 0x3A9668CE: movzwl 44(%eax),%edx
+ 0x3A9668D2: movl %esi,0xFFFFFB28(%ebx)
+ 0x3A9668D8: movw %dx,0xFFFFFB30(%ebx)
+ 0x3A9668DF: movzwl 44(%eax),%edx
+ 0x3A9668E3: movl %edx,%eax
+ 0x3A9668E5: decl %edx
+ 0x3A9668E6: testl %eax,%eax
+ 0x3A9668E8: jz-8 0x3A96690C
+. 314 3A9668C1 41
+. 8B 83 78 FB FF FF 8B 50 1C 89 C6 01 D6 0F B7 50 2C 89 B3 28 FB FF FF 66 89 93 30 FB FF FF 0F B7 50 2C 89 D0 4A 85 C0 74 22
+
+==== BB 315 (0x3A9668EA) in 5772B, out 32511B, BBs exec'd 0 ====
+ 0x3A9668EA: movl %edx,%eax
+ 0x3A9668EC: shll $0x5, %eax
+ 0x3A9668EF: addl %esi,%eax
+ 0x3A9668F1: movl %edx,%ecx
+ 0x3A9668F3: movl %edx,%edi
+ 0x3A9668F5: shll $0x5, %ecx
+ 0x3A9668F8: cmpl $0x6474E552, (%eax)
+ 0x3A9668FE: jz-32 0x3A967D4A
+. 315 3A9668EA 26
+. 89 D0 C1 E0 05 01 F0 89 D1 89 D7 C1 E1 05 81 38 52 E5 74 64 0F 84 46 14 00 00
+
+==== BB 316 (0x3A966904) in 5798B, out 32622B, BBs exec'd 0 ====
+ 0x3A966904: decl %edx
+ 0x3A966905: subl $0x20, %eax
+ 0x3A966908: testl %edi,%edi
+ 0x3A96690A: jnz-8 0x3A9668F1
+. 316 3A966904 8
+. 4A 83 E8 20 85 FF 75 E5
+
+==== BB 317 (0x3A9668F1) in 5806B, out 32705B, BBs exec'd 0 ====
+ 0x3A9668F1: movl %edx,%ecx
+ 0x3A9668F3: movl %edx,%edi
+ 0x3A9668F5: shll $0x5, %ecx
+ 0x3A9668F8: cmpl $0x6474E552, (%eax)
+ 0x3A9668FE: jz-32 0x3A967D4A
+. 317 3A9668F1 19
+. 89 D1 89 D7 C1 E1 05 81 38 52 E5 74 64 0F 84 46 14 00 00
+
+==== BB 318 (0x3A96690C) in 5825B, out 32795B, BBs exec'd 0 ====
+ 0x3A96690C: movl 0xB0(%ebx),%esi
+ 0x3A966912: xorl %eax, %eax
+ 0x3A966914: movl %eax,0xFFFFFF14(%ebp)
+ 0x3A96691A: xorl %eax, %eax
+ 0x3A96691C: testl %esi,%esi
+ 0x3A96691E: movl %eax,0xFFFFFF10(%ebp)
+ 0x3A966924: jnz-32 0x3A967BDA
+. 318 3A96690C 30
+. 8B B3 B0 00 00 00 31 C0 89 85 14 FF FF FF 31 C0 85 F6 89 85 10 FF FF FF 0F 85 B0 12 00 00
+
+==== BB 319 (0x3A967BDA) in 5855B, out 32924B, BBs exec'd 0 ====
+ 0x3A967BDA: movl %esi,(%esp,,)
+ 0x3A967BDD: leal 0xFFFFFF3C(%ebp), %edi
+ 0x3A967BE3: call 0x3A9752D0
+. 319 3A967BDA 14
+. 89 34 24 8D BD 3C FF FF FF E8 E8 D6 00 00
+
+==== BB 320 (0x3A9752E7) in 5869B, out 32995B, BBs exec'd 0 ====
+ 0x3A9752E7: incl %eax
+ 0x3A9752E8: cmpb %dh{si},(%eax)
+ 0x3A9752EA: jz-32 0x3A975386
+. 320 3A9752E7 9
+. 40 38 30 0F 84 96 00 00 00
+
+==== BB 321 (0x3A9752F0) in 5878B, out 33063B, BBs exec'd 0 ====
+ 0x3A9752F0: incl %eax
+ 0x3A9752F1: xorl $0x2, %edx
+ 0x3A9752F4: jz-8 0x3A975301
+. 321 3A9752F0 6
+. 40 83 F2 02 74 0B
+
+==== BB 322 (0x3A967BE8) in 5884B, out 33134B, BBs exec'd 0 ====
+ 0x3A967BE8: leal 1(%eax), %edx
+ 0x3A967BEB: addl $0x13, %eax
+ 0x3A967BEE: andl $0xFFFFFFFC, %eax
+ 0x3A967BF1: subl %eax,%esp
+ 0x3A967BF3: leal 47(%esp,,), %eax
+ 0x3A967BF7: andl $0xFFFFFFF0, %eax
+ 0x3A967BFA: movl %edx,8(%esp,,)
+ 0x3A967BFE: movl %esi,4(%esp,,)
+ 0x3A967C02: movl %eax,(%esp,,)
+ 0x3A967C05: call 0x3A975870
+. 322 3A967BE8 34
+. 8D 50 01 83 C0 13 83 E0 FC 29 C4 8D 44 24 2F 83 E0 F0 89 54 24 08 89 74 24 04 89 04 24 E8 66 DC 00 00
+
+==== BB 323 (0x3A967C0A) in 5918B, out 33277B, BBs exec'd 0 ====
+ 0x3A967C0A: movl %eax,0xFFFFFF3C(%ebp)
+ 0x3A967C10: leal 0xFFFFEDD7(%ebx), %edx
+ 0x3A967C16: movl %edx,0xFFFFFE60(%ebp)
+ 0x3A967C1C: movl 0xFFFFFE60(%ebp),%ecx
+ 0x3A967C22: movl %edi,(%esp,,)
+ 0x3A967C25: movl %ecx,4(%esp,,)
+ 0x3A967C29: call 0x3A973530
+. 323 3A967C0A 36
+. 89 85 3C FF FF FF 8D 93 D7 ED FF FF 89 95 60 FE FF FF 8B 8D 60 FE FF FF 89 3C 24 89 4C 24 04 E8 02 B9 00 00
+
+==== BB 324 (0x3A967C2E) in 5954B, out 33406B, BBs exec'd 0 ====
+ 0x3A967C2E: testl %eax,%eax
+ 0x3A967C30: movl %eax,%esi
+ 0x3A967C32: jz-32 0x3A96692A
+. 324 3A967C2E 10
+. 85 C0 89 C6 0F 84 F2 EC FF FF
+
+==== BB 325 (0x3A967C38) in 5964B, out 33472B, BBs exec'd 0 ====
+ 0x3A967C38: cmpb $0x0, (%esi)
+ 0x3A967C3B: jz-8 0x3A967C1C
+. 325 3A967C38 5
+. 80 3E 00 74 DF
+
+==== BB 326 (0x3A967C3D) in 5969B, out 33532B, BBs exec'd 0 ====
+ 0x3A967C3D: movl 0x130(%ebx),%eax
+ 0x3A967C43: testl %eax,%eax
+ 0x3A967C45: jnz-32 0x3A968175
+. 326 3A967C3D 14
+. 8B 83 30 01 00 00 85 C0 0F 85 2A 05 00 00
+
+==== BB 327 (0x3A967C4B) in 5983B, out 33607B, BBs exec'd 0 ====
+ 0x3A967C4B: movl 0xFFFFF994(%ebx),%eax
+ 0x3A967C51: xorl %ecx, %ecx
+ 0x3A967C53: xorl %edx, %edx
+ 0x3A967C55: movl %ecx,8(%esp,,)
+ 0x3A967C59: movl $0x1,%ecx
+ 0x3A967C5E: movl %edx,4(%esp,,)
+ 0x3A967C62: movl %esi,%edx
+ 0x3A967C64: movl $0x1, (%esp,,)
+ 0x3A967C6B: call 0x3A96AE40
+. 327 3A967C4B 37
+. 8B 83 94 F9 FF FF 31 C9 31 D2 89 4C 24 08 B9 01 00 00 00 89 54 24 04 89 F2 C7 04 24 01 00 00 00 E8 D0 31 00 00
+
+==== BB 328 _dl_map_object(0x3A96AE40) in 6020B, out 33751B, BBs exec'd 0 ====
+ 0x3A96AE40: pushl %ebp
+ 0x3A96AE41: movl %esp,%ebp
+ 0x3A96AE43: pushl %edi
+ 0x3A96AE44: pushl %esi
+ 0x3A96AE45: pushl %ebx
+ 0x3A96AE46: subl $0x258, %esp
+ 0x3A96AE4C: call 0x3A97592B
+. 328 3A96AE40 17
+. 55 89 E5 57 56 53 81 EC 58 02 00 00 E8 DA AA 00 00
+
+==== BB 329 (0x3A96AE51) in 6037B, out 33887B, BBs exec'd 0 ====
+ 0x3A96AE51: addl $0xD81B, %ebx
+ 0x3A96AE57: movl %eax,0xFFFFFDD8(%ebp)
+ 0x3A96AE5D: movl 0xFFFFF994(%ebx),%esi
+ 0x3A96AE63: movl %edx,0xFFFFFDD4(%ebp)
+ 0x3A96AE69: movl %ecx,0xFFFFFDD0(%ebp)
+ 0x3A96AE6F: testl %esi,%esi
+ 0x3A96AE71: jz-8 0x3A96AEB2
+. 329 3A96AE51 34
+. 81 C3 1B D8 00 00 89 85 D8 FD FF FF 8B B3 94 F9 FF FF 89 95 D4 FD FF FF 89 8D D0 FD FF FF 85 F6 74 3F
+
+==== BB 330 (0x3A96AE73) in 6071B, out 34026B, BBs exec'd 0 ====
+ 0x3A96AE73: leal 0x0(%esi), %esi
+ 0x3A96AE79: leal 0(%edi,,), %edi
+ 0x3A96AE80: testb $0x2, 0x175(%esi)
+ 0x3A96AE87: jnz-8 0x3A96AEAB
+. 330 3A96AE73 22
+. 8D B6 00 00 00 00 8D BC 27 00 00 00 00 F6 86 75 01 00 00 02 75 22
+
+==== BB 331 (0x3A96AE89) in 6093B, out 34123B, BBs exec'd 0 ====
+ 0x3A96AE89: movl 0xFFFFFDD4(%ebp),%eax
+ 0x3A96AE8F: movl %esi,%edx
+ 0x3A96AE91: call 0x3A970B80
+. 331 3A96AE89 13
+. 8B 85 D4 FD FF FF 89 F2 E8 EA 5C 00 00
+
+==== BB 332 _dl_name_match_p(0x3A970B80) in 6106B, out 34197B, BBs exec'd 0 ====
+ 0x3A970B80: pushl %ebp
+ 0x3A970B81: movl %esp,%ebp
+ 0x3A970B83: pushl %edi
+ 0x3A970B84: movl %eax,%edi
+ 0x3A970B86: pushl %esi
+ 0x3A970B87: movl %edx,%esi
+ 0x3A970B89: pushl %ebx
+ 0x3A970B8A: subl $0x8, %esp
+ 0x3A970B8D: movl 4(%edx),%eax
+ 0x3A970B90: call 0x3A97592B
+. 332 3A970B80 21
+. 55 89 E5 57 89 C7 56 89 D6 53 83 EC 08 8B 42 04 E8 96 4D 00 00
+
+==== BB 333 (0x3A970B95) in 6127B, out 34366B, BBs exec'd 0 ====
+ 0x3A970B95: addl $0x7AD7, %ebx
+ 0x3A970B9B: movl %edi,(%esp,,)
+ 0x3A970B9E: movl %eax,4(%esp,,)
+ 0x3A970BA2: call 0x3A975280
+. 333 3A970B95 18
+. 81 C3 D7 7A 00 00 89 3C 24 89 44 24 04 E8 D9 46 00 00
+
+==== BB 334 strcmp(0x3A975280) in 6145B, out 34454B, BBs exec'd 0 ====
+ 0x3A975280: pushl %ebp
+ 0x3A975281: movl %esp,%ebp
+ 0x3A975283: pushl %esi
+ 0x3A975284: subl $0x4, %esp
+ 0x3A975287: movl 8(%ebp),%ecx
+ 0x3A97528A: movl 12(%ebp),%edx
+ 0x3A97528D: leal 0(%esi), %esi
+ 0x3A975290: movzbl (%ecx),%esi
+ 0x3A975293: incl %ecx
+ 0x3A975294: movzbl (%edx),%eax
+ 0x3A975297: incl %edx
+ 0x3A975298: movb %al,-5(%ebp)
+ 0x3A97529B: movl %esi,%eax
+ 0x3A97529D: testb %al,%al
+ 0x3A97529F: jz-8 0x3A9752B7
+. 334 3A975280 33
+. 55 89 E5 56 83 EC 04 8B 4D 08 8B 55 0C 8D 76 00 0F B6 31 41 0F B6 02 42 88 45 FB 89 F0 84 C0 74 16
+
+==== BB 335 (0x3A9752A1) in 6178B, out 34665B, BBs exec'd 0 ====
+ 0x3A9752A1: movl %esi,%eax
+ 0x3A9752A3: cmpb -5(%ebp),%al
+ 0x3A9752A6: jz-8 0x3A975290
+. 335 3A9752A1 7
+. 89 F0 3A 45 FB 74 E8
+
+==== BB 336 (0x3A9752A8) in 6185B, out 34741B, BBs exec'd 0 ====
+ 0x3A9752A8: movzbl %al,%edx
+ 0x3A9752AB: movzbl -5(%ebp),%eax
+ 0x3A9752AF: subl %eax,%edx
+ 0x3A9752B1: movl %edx,%eax
+ 0x3A9752B3: popl %edx
+ 0x3A9752B4: popl %esi
+ 0x3A9752B5: popl %ebp
+ 0x3A9752B6: ret
+. 336 3A9752A8 15
+. 0F B6 D0 0F B6 45 FB 29 C2 89 D0 5A 5E 5D C3
+
+==== BB 337 (0x3A970BA7) in 6200B, out 34855B, BBs exec'd 0 ====
+ 0x3A970BA7: testl %eax,%eax
+ 0x3A970BA9: movl $0x1,%edx
+ 0x3A970BAE: jz-8 0x3A970BE0
+. 337 3A970BA7 9
+. 85 C0 BA 01 00 00 00 74 30
+
+==== BB 338 (0x3A970BB0) in 6209B, out 34926B, BBs exec'd 0 ====
+ 0x3A970BB0: movl 20(%esi),%esi
+ 0x3A970BB3: testl %esi,%esi
+ 0x3A970BB5: jz-8 0x3A970BDE
+. 338 3A970BB0 7
+. 8B 76 14 85 F6 74 27
+
+==== BB 339 (0x3A970BB7) in 6216B, out 34998B, BBs exec'd 0 ====
+ 0x3A970BB7: movl %esi,%esi
+ 0x3A970BB9: leal 0(%edi,,), %edi
+ 0x3A970BC0: movl (%esi),%eax
+ 0x3A970BC2: movl %edi,(%esp,,)
+ 0x3A970BC5: movl %eax,4(%esp,,)
+ 0x3A970BC9: call 0x3A975280
+. 339 3A970BB7 23
+. 89 F6 8D BC 27 00 00 00 00 8B 06 89 3C 24 89 44 24 04 E8 B2 46 00 00
+
+==== BB 340 (0x3A970BCE) in 6239B, out 35093B, BBs exec'd 0 ====
+ 0x3A970BCE: testl %eax,%eax
+ 0x3A970BD0: movl $0x1,%edx
+ 0x3A970BD5: jz-8 0x3A970BE0
+. 340 3A970BCE 9
+. 85 C0 BA 01 00 00 00 74 09
+
+==== BB 341 (0x3A970BD7) in 6248B, out 35164B, BBs exec'd 0 ====
+ 0x3A970BD7: movl 4(%esi),%esi
+ 0x3A970BDA: testl %esi,%esi
+ 0x3A970BDC: jnz-8 0x3A970BC0
+. 341 3A970BD7 7
+. 8B 76 04 85 F6 75 E2
+
+==== BB 342 (0x3A970BDE) in 6255B, out 35236B, BBs exec'd 0 ====
+ 0x3A970BDE: xorl %edx, %edx
+ 0x3A970BE0: addl $0x8, %esp
+ 0x3A970BE3: movl %edx,%eax
+ 0x3A970BE5: popl %ebx
+ 0x3A970BE6: popl %esi
+ 0x3A970BE7: popl %edi
+ 0x3A970BE8: popl %ebp
+ 0x3A970BE9: ret
+. 342 3A970BDE 12
+. 31 D2 83 C4 08 89 D0 5B 5E 5F 5D C3
+
+==== BB 343 (0x3A96AE96) in 6267B, out 35363B, BBs exec'd 0 ====
+ 0x3A96AE96: testl %eax,%eax
+ 0x3A96AE98: jnz-32 0x3A96AFA7
+. 343 3A96AE96 8
+. 85 C0 0F 85 09 01 00 00
+
+==== BB 344 (0x3A96AE9E) in 6275B, out 35422B, BBs exec'd 0 ====
+ 0x3A96AE9E: testb $0x1, 0x175(%esi)
+ 0x3A96AEA5: jz-32 0x3A96AFB3
+. 344 3A96AE9E 13
+. F6 86 75 01 00 00 01 0F 84 08 01 00 00
+
+==== BB 345 (0x3A96AFB3) in 6288B, out 35492B, BBs exec'd 0 ====
+ 0x3A96AFB3: movl 80(%esi),%edx
+ 0x3A96AFB6: testl %edx,%edx
+ 0x3A96AFB8: jz-32 0x3A96AEAB
+. 345 3A96AFB3 11
+. 8B 56 50 85 D2 0F 84 ED FE FF FF
+
+==== BB 346 (0x3A96AEAB) in 6299B, out 35564B, BBs exec'd 0 ====
+ 0x3A96AEAB: movl 12(%esi),%esi
+ 0x3A96AEAE: testl %esi,%esi
+ 0x3A96AEB0: jnz-8 0x3A96AE80
+. 346 3A96AEAB 7
+. 8B 76 0C 85 F6 75 CE
+
+==== BB 347 (0x3A96AE80) in 6306B, out 35636B, BBs exec'd 0 ====
+ 0x3A96AE80: testb $0x2, 0x175(%esi)
+ 0x3A96AE87: jnz-8 0x3A96AEAB
+. 347 3A96AE80 9
+. F6 86 75 01 00 00 02 75 22
+
+==== BB 348 (0x3A975290) in 6315B, out 35706B, BBs exec'd 0 ====
+ 0x3A975290: movzbl (%ecx),%esi
+ 0x3A975293: incl %ecx
+ 0x3A975294: movzbl (%edx),%eax
+ 0x3A975297: incl %edx
+ 0x3A975298: movb %al,-5(%ebp)
+ 0x3A97529B: movl %esi,%eax
+ 0x3A97529D: testb %al,%al
+ 0x3A97529F: jz-8 0x3A9752B7
+. 348 3A975290 17
+. 0F B6 31 41 0F B6 02 42 88 45 FB 89 F0 84 C0 74 16
+
+==== BB 349 (0x3A96AFBE) in 6332B, out 35838B, BBs exec'd 0 ====
+ 0x3A96AFBE: movl 44(%esi),%eax
+ 0x3A96AFC1: movl 4(%edx),%edi
+ 0x3A96AFC4: movl 4(%eax),%edx
+ 0x3A96AFC7: addl %edx,%edi
+ 0x3A96AFC9: movl %edi,4(%esp,,)
+ 0x3A96AFCD: movl 0xFFFFFDD4(%ebp),%eax
+ 0x3A96AFD3: movl %eax,(%esp,,)
+ 0x3A96AFD6: call 0x3A975280
+. 349 3A96AFBE 29
+. 8B 46 2C 8B 7A 04 8B 50 04 01 D7 89 7C 24 04 8B 85 D4 FD FF FF 89 04 24 E8 A5 A2 00 00
+
+==== BB 350 (0x3A96AFDB) in 6361B, out 35971B, BBs exec'd 0 ====
+ 0x3A96AFDB: testl %eax,%eax
+ 0x3A96AFDD: jnz-32 0x3A96AEAB
+. 350 3A96AFDB 8
+. 85 C0 0F 85 C8 FE FF FF
+
+==== BB 351 (0x3A96AEB2) in 6369B, out 36030B, BBs exec'd 0 ====
+ 0x3A96AEB2: testb $0x40, 0xFFFFFC14(%ebx)
+ 0x3A96AEB9: jnz-32 0x3A96B2BE
+. 351 3A96AEB2 13
+. F6 83 14 FC FF FF 40 0F 85 FF 03 00 00
+
+==== BB 352 (0x3A96AEBF) in 6382B, out 36100B, BBs exec'd 0 ====
+ 0x3A96AEBF: movl $0x2F,%eax
+ 0x3A96AEC4: movl %eax,4(%esp,,)
+ 0x3A96AEC8: movl 0xFFFFFDD4(%ebp),%eax
+ 0x3A96AECE: movl %eax,(%esp,,)
+ 0x3A96AED1: call 0x3A9750B0
+. 352 3A96AEBF 23
+. B8 2F 00 00 00 89 44 24 04 8B 85 D4 FD FF FF 89 04 24 E8 DA A1 00 00
+
+==== BB 353 strchr(0x3A9750B0) in 6405B, out 36190B, BBs exec'd 0 ====
+ 0x3A9750B0: pushl %edi
+ 0x3A9750B1: pushl %esi
+ 0x3A9750B2: pushl %ebx
+ 0x3A9750B3: pushl %ebp
+ 0x3A9750B4: movl 20(%esp,,),%eax
+ 0x3A9750B8: movl 24(%esp,,),%edx
+ 0x3A9750BC: movl %eax,%edi
+ 0x3A9750BE: xorl %ecx, %ecx
+ 0x3A9750C0: movb %dl,%dh{si}
+ 0x3A9750C2: movb %dl,%cl
+ 0x3A9750C4: shll $0x10, %edx
+ 0x3A9750C7: movb %cl,%ch{bp}
+ 0x3A9750C9: orl %ecx,%edx
+ 0x3A9750CB: andl $0x3, %edi
+ 0x3A9750CE: jz-8 0x3A975111
+. 353 3A9750B0 32
+. 57 56 53 55 8B 44 24 14 8B 54 24 18 89 C7 31 C9 88 D6 88 D1 C1 E2 10 88 CD 09 CA 83 E7 03 74 41
+
+==== BB 354 (0x3A975111) in 6437B, out 36417B, BBs exec'd 0 ====
+ 0x3A975111: movl (%eax),%ecx
+ 0x3A975113: movl $0xFEFEFEFF,%ebp
+ 0x3A975118: movl $0xFEFEFEFF,%edi
+ 0x3A97511D: addl %ecx,%ebp
+ 0x3A97511F: xorl %ecx,%ebp
+ 0x3A975121: addl %ecx,%edi
+ 0x3A975123: leal 4(%eax), %eax
+ 0x3A975126: jnb-32 0x3A975242
+. 354 3A975111 27
+. 8B 08 BD FF FE FE FE BF FF FE FE FE 01 CD 31 CD 01 CF 8D 40 04 0F 83 16 01 00 00
+
+==== BB 355 (0x3A97512C) in 6464B, out 36529B, BBs exec'd 0 ====
+ 0x3A97512C: movl %ecx,%ebx
+ 0x3A97512E: orl $0xFEFEFEFF, %ebp
+ 0x3A975134: addl $0x1, %ebp
+ 0x3A975137: jnz-32 0x3A975242
+. 355 3A97512C 17
+. 89 CB 81 CD FF FE FE FE 83 C5 01 0F 85 05 01 00 00
+
+==== BB 356 (0x3A97513D) in 6481B, out 36610B, BBs exec'd 0 ====
+ 0x3A97513D: movl $0xFEFEFEFF,%esi
+ 0x3A975142: xorl %edx,%ebx
+ 0x3A975144: movl (%eax),%ecx
+ 0x3A975146: addl %ebx,%esi
+ 0x3A975148: movl $0xFEFEFEFF,%edi
+ 0x3A97514D: jnb-32 0x3A975227
+. 356 3A97513D 22
+. BE FF FE FE FE 31 D3 8B 08 01 DE BF FF FE FE FE 0F 83 D4 00 00 00
+
+==== BB 357 (0x3A975153) in 6503B, out 36713B, BBs exec'd 0 ====
+ 0x3A975153: movl %edi,%ebp
+ 0x3A975155: xorl %ebx,%esi
+ 0x3A975157: addl %ecx,%ebp
+ 0x3A975159: orl $0xFEFEFEFF, %esi
+ 0x3A97515F: addl $0x1, %esi
+ 0x3A975162: jnz-32 0x3A975227
+. 357 3A975153 21
+. 89 FD 31 DE 01 CD 81 CE FF FE FE FE 83 C6 01 0F 85 BF 00 00 00
+
+==== BB 358 (0x3A975227) in 6524B, out 36808B, BBs exec'd 0 ====
+ 0x3A975227: subl $0x4, %eax
+ 0x3A97522A: testb %bl,%bl
+ 0x3A97522C: jz-8 0x3A97523D
+. 358 3A975227 7
+. 83 E8 04 84 DB 74 0F
+
+==== BB 359 (0x3A97523D) in 6531B, out 36882B, BBs exec'd 0 ====
+ 0x3A97523D: popl %ebp
+ 0x3A97523E: popl %ebx
+ 0x3A97523F: popl %esi
+ 0x3A975240: popl %edi
+ 0x3A975241: ret
+. 359 3A97523D 5
+. 5D 5B 5E 5F C3
+
+==== BB 360 (0x3A96AED6) in 6536B, out 36976B, BBs exec'd 0 ====
+ 0x3A96AED6: testl %eax,%eax
+ 0x3A96AED8: jz-32 0x3A96B088
+. 360 3A96AED6 8
+. 85 C0 0F 84 AA 01 00 00
+
+==== BB 361 (0x3A96AEDE) in 6544B, out 37035B, BBs exec'd 0 ====
+ 0x3A96AEDE: movl 0xFFFFFDD8(%ebp),%edi
+ 0x3A96AEE4: testl %edi,%edi
+ 0x3A96AEE6: jz-32 0x3A96B165
+. 361 3A96AEDE 14
+. 8B BD D8 FD FF FF 85 FF 0F 84 79 02 00 00
+
+==== BB 362 (0x3A96AEEC) in 6558B, out 37110B, BBs exec'd 0 ====
+ 0x3A96AEEC: movl 0xFFFFFDD4(%ebp),%edx
+ 0x3A96AEF2: movl 0xFFFFFDD8(%ebp),%eax
+ 0x3A96AEF8: call 0x3A96A5D0
+. 362 3A96AEEC 17
+. 8B 95 D4 FD FF FF 8B 85 D8 FD FF FF E8 D3 F6 FF FF
+
+==== BB 363 expand_dynamic_string_token(0x3A96A5D0) in 6575B, out 37190B, BBs exec'd 0 ====
+ 0x3A96A5D0: pushl %ebp
+ 0x3A96A5D1: movl $0x24,%ecx
+ 0x3A96A5D6: movl %esp,%ebp
+ 0x3A96A5D8: subl $0x24, %esp
+ 0x3A96A5DB: movl %ebx,-12(%ebp)
+ 0x3A96A5DE: movl %esi,-8(%ebp)
+ 0x3A96A5E1: xorl %esi, %esi
+ 0x3A96A5E3: movl %edi,-4(%ebp)
+ 0x3A96A5E6: movl %edx,%edi
+ 0x3A96A5E8: movl %eax,-16(%ebp)
+ 0x3A96A5EB: call 0x3A97592B
+. 363 3A96A5D0 32
+. 55 B9 24 00 00 00 89 E5 83 EC 24 89 5D F4 89 75 F8 31 F6 89 7D FC 89 D7 89 45 F0 E8 3B B3 00 00
+
+==== BB 364 (0x3A96A5F0) in 6607B, out 37363B, BBs exec'd 0 ====
+ 0x3A96A5F0: addl $0xE07C, %ebx
+ 0x3A96A5F6: movl %ecx,4(%esp,,)
+ 0x3A96A5FA: movl %edx,(%esp,,)
+ 0x3A96A5FD: call 0x3A9750B0
+. 364 3A96A5F0 18
+. 81 C3 7C E0 00 00 89 4C 24 04 89 14 24 E8 AE AA 00 00
+
+==== BB 365 (0x3A975168) in 6625B, out 37451B, BBs exec'd 0 ====
+ 0x3A975168: xorl %ecx,%ebp
+ 0x3A97516A: addl %ecx,%edi
+ 0x3A97516C: leal 4(%eax), %eax
+ 0x3A97516F: jnb-32 0x3A975242
+. 365 3A975168 13
+. 31 CD 01 CF 8D 40 04 0F 83 CD 00 00 00
+
+==== BB 366 (0x3A975175) in 6638B, out 37537B, BBs exec'd 0 ====
+ 0x3A975175: movl %ecx,%ebx
+ 0x3A975177: orl $0xFEFEFEFF, %ebp
+ 0x3A97517D: addl $0x1, %ebp
+ 0x3A975180: jnz-32 0x3A975242
+. 366 3A975175 17
+. 89 CB 81 CD FF FE FE FE 83 C5 01 0F 85 BC 00 00 00
+
+==== BB 367 (0x3A975186) in 6655B, out 37618B, BBs exec'd 0 ====
+ 0x3A975186: movl $0xFEFEFEFF,%esi
+ 0x3A97518B: xorl %edx,%ebx
+ 0x3A97518D: movl (%eax),%ecx
+ 0x3A97518F: addl %ebx,%esi
+ 0x3A975191: movl $0xFEFEFEFF,%edi
+ 0x3A975196: jnb-32 0x3A975227
+. 367 3A975186 22
+. BE FF FE FE FE 31 D3 8B 08 01 DE BF FF FE FE FE 0F 83 8B 00 00 00
+
+==== BB 368 (0x3A97519C) in 6677B, out 37721B, BBs exec'd 0 ====
+ 0x3A97519C: movl %edi,%ebp
+ 0x3A97519E: xorl %ebx,%esi
+ 0x3A9751A0: addl %ecx,%ebp
+ 0x3A9751A2: orl $0xFEFEFEFF, %esi
+ 0x3A9751A8: addl $0x1, %esi
+ 0x3A9751AB: jnz-8 0x3A975227
+. 368 3A97519C 17
+. 89 FD 31 DE 01 CD 81 CE FF FE FE FE 83 C6 01 75 7A
+
+==== BB 369 (0x3A9751AD) in 6694B, out 37816B, BBs exec'd 0 ====
+ 0x3A9751AD: xorl %ecx,%ebp
+ 0x3A9751AF: addl %ecx,%edi
+ 0x3A9751B1: leal 4(%eax), %eax
+ 0x3A9751B4: jnb-32 0x3A975242
+. 369 3A9751AD 13
+. 31 CD 01 CF 8D 40 04 0F 83 88 00 00 00
+
+==== BB 370 (0x3A9751BA) in 6707B, out 37902B, BBs exec'd 0 ====
+ 0x3A9751BA: movl %ecx,%ebx
+ 0x3A9751BC: orl $0xFEFEFEFF, %ebp
+ 0x3A9751C2: addl $0x1, %ebp
+ 0x3A9751C5: jnz-8 0x3A975242
+. 370 3A9751BA 13
+. 89 CB 81 CD FF FE FE FE 83 C5 01 75 7B
+
+==== BB 371 (0x3A9751C7) in 6720B, out 37983B, BBs exec'd 0 ====
+ 0x3A9751C7: movl $0xFEFEFEFF,%esi
+ 0x3A9751CC: xorl %edx,%ebx
+ 0x3A9751CE: movl (%eax),%ecx
+ 0x3A9751D0: addl %ebx,%esi
+ 0x3A9751D2: movl $0xFEFEFEFF,%edi
+ 0x3A9751D7: jnb-8 0x3A975227
+. 371 3A9751C7 18
+. BE FF FE FE FE 31 D3 8B 08 01 DE BF FF FE FE FE 73 4E
+
+==== BB 372 (0x3A9751D9) in 6738B, out 38086B, BBs exec'd 0 ====
+ 0x3A9751D9: movl %edi,%ebp
+ 0x3A9751DB: xorl %ebx,%esi
+ 0x3A9751DD: addl %ecx,%ebp
+ 0x3A9751DF: orl $0xFEFEFEFF, %esi
+ 0x3A9751E5: addl $0x1, %esi
+ 0x3A9751E8: jnz-8 0x3A975227
+. 372 3A9751D9 17
+. 89 FD 31 DE 01 CD 81 CE FF FE FE FE 83 C6 01 75 3D
+
+==== BB 373 (0x3A9751EA) in 6755B, out 38181B, BBs exec'd 0 ====
+ 0x3A9751EA: xorl %ecx,%ebp
+ 0x3A9751EC: addl %ecx,%edi
+ 0x3A9751EE: leal 4(%eax), %eax
+ 0x3A9751F1: jnb-8 0x3A975242
+. 373 3A9751EA 9
+. 31 CD 01 CF 8D 40 04 73 4F
+
+==== BB 374 (0x3A9751F3) in 6764B, out 38267B, BBs exec'd 0 ====
+ 0x3A9751F3: movl %ecx,%ebx
+ 0x3A9751F5: orl $0xFEFEFEFF, %ebp
+ 0x3A9751FB: addl $0x1, %ebp
+ 0x3A9751FE: jnz-8 0x3A975242
+. 374 3A9751F3 13
+. 89 CB 81 CD FF FE FE FE 83 C5 01 75 42
+
+==== BB 375 (0x3A975200) in 6777B, out 38348B, BBs exec'd 0 ====
+ 0x3A975200: movl $0xFEFEFEFF,%esi
+ 0x3A975205: xorl %edx,%ebx
+ 0x3A975207: movl (%eax),%ecx
+ 0x3A975209: addl %ebx,%esi
+ 0x3A97520B: movl $0xFEFEFEFF,%edi
+ 0x3A975210: jnb-8 0x3A975227
+. 375 3A975200 18
+. BE FF FE FE FE 31 D3 8B 08 01 DE BF FF FE FE FE 73 15
+
+==== BB 376 (0x3A975212) in 6795B, out 38451B, BBs exec'd 0 ====
+ 0x3A975212: movl %edi,%ebp
+ 0x3A975214: xorl %ebx,%esi
+ 0x3A975216: addl %ecx,%ebp
+ 0x3A975218: orl $0xFEFEFEFF, %esi
+ 0x3A97521E: addl $0x1, %esi
+ 0x3A975221: jz-32 0x3A97511F
+. 376 3A975212 21
+. 89 FD 31 DE 01 CD 81 CE FF FE FE FE 83 C6 01 0F 84 F8 FE FF FF
+
+==== BB 377 (0x3A97511F) in 6816B, out 38546B, BBs exec'd 0 ====
+ 0x3A97511F: xorl %ecx,%ebp
+ 0x3A975121: addl %ecx,%edi
+ 0x3A975123: leal 4(%eax), %eax
+ 0x3A975126: jnb-32 0x3A975242
+. 377 3A97511F 13
+. 31 CD 01 CF 8D 40 04 0F 83 16 01 00 00
+
+==== BB 378 (0x3A975242) in 6829B, out 38632B, BBs exec'd 0 ====
+ 0x3A975242: subl $0x4, %eax
+ 0x3A975245: cmpb %dl,%cl
+ 0x3A975247: jz-8 0x3A97523D
+. 378 3A975242 7
+. 83 E8 04 38 D1 74 F4
+
+==== BB 379 (0x3A975249) in 6836B, out 38703B, BBs exec'd 0 ====
+ 0x3A975249: cmpb $0x0, %cl
+ 0x3A97524C: jz-8 0x3A97526A
+. 379 3A975249 5
+. 80 F9 00 74 1C
+
+==== BB 380 (0x3A97526A) in 6841B, out 38761B, BBs exec'd 0 ====
+ 0x3A97526A: xorl %eax, %eax
+ 0x3A97526C: popl %ebp
+ 0x3A97526D: popl %ebx
+ 0x3A97526E: popl %esi
+ 0x3A97526F: popl %edi
+ 0x3A975270: ret
+. 380 3A97526A 7
+. 31 C0 5D 5B 5E 5F C3
+
+==== BB 381 (0x3A96A602) in 6848B, out 38871B, BBs exec'd 0 ====
+ 0x3A96A602: testl %eax,%eax
+ 0x3A96A604: jnz-8 0x3A96A647
+. 381 3A96A602 4
+. 85 C0 75 41
+
+==== BB 382 (0x3A96A606) in 6852B, out 38930B, BBs exec'd 0 ====
+ 0x3A96A606: testl %esi,%esi
+ 0x3A96A608: jnz-8 0x3A96A65C
+. 382 3A96A606 4
+. 85 F6 75 52
+
+==== BB 383 (0x3A96A60A) in 6856B, out 38989B, BBs exec'd 0 ====
+ 0x3A96A60A: movl %edi,(%esp,,)
+ 0x3A96A60D: leal 0(%esi), %esi
+ 0x3A96A610: call 0x3A9752D0
+. 383 3A96A60A 11
+. 89 3C 24 8D 76 00 E8 BB AC 00 00
+
+==== BB 384 (0x3A96A615) in 6867B, out 39057B, BBs exec'd 0 ====
+ 0x3A96A615: leal 1(%eax), %esi
+ 0x3A96A618: movl %esi,(%esp,,)
+ 0x3A96A61B: call 0x3A96581C
+. 384 3A96A615 11
+. 8D 70 01 89 34 24 E8 FC B1 FF FF
+
+==== BB 385 (0x3A96A620) in 6878B, out 39122B, BBs exec'd 0 ====
+ 0x3A96A620: xorl %edx, %edx
+ 0x3A96A622: testl %eax,%eax
+ 0x3A96A624: jz-8 0x3A96A638
+. 385 3A96A620 6
+. 31 D2 85 C0 74 12
+
+==== BB 386 (0x3A96A626) in 6884B, out 39195B, BBs exec'd 0 ====
+ 0x3A96A626: movl %esi,8(%esp,,)
+ 0x3A96A62A: movl %edi,4(%esp,,)
+ 0x3A96A62E: movl %eax,(%esp,,)
+ 0x3A96A631: call 0x3A975870
+. 386 3A96A626 16
+. 89 74 24 08 89 7C 24 04 89 04 24 E8 3A B2 00 00
+
+==== BB 387 (0x3A96A636) in 6900B, out 39276B, BBs exec'd 0 ====
+ 0x3A96A636: movl %eax,%edx
+ 0x3A96A638: movl %edx,%eax
+ 0x3A96A63A: movl -12(%ebp),%ebx
+ 0x3A96A63D: movl -8(%ebp),%esi
+ 0x3A96A640: movl -4(%ebp),%edi
+ 0x3A96A643: movl %ebp,%esp
+ 0x3A96A645: popl %ebp
+ 0x3A96A646: ret
+. 387 3A96A636 17
+. 89 C2 89 D0 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 388 (0x3A96AEFD) in 6917B, out 39383B, BBs exec'd 0 ====
+ 0x3A96AEFD: movl %eax,0xFFFFFDE0(%ebp)
+ 0x3A96AF03: testl %eax,%eax
+ 0x3A96AF05: jnz-32 0x3A96B010
+. 388 3A96AEFD 14
+. 89 85 E0 FD FF FF 85 C0 0F 85 05 01 00 00
+
+==== BB 389 (0x3A96B010) in 6931B, out 39461B, BBs exec'd 0 ====
+ 0x3A96B010: leal 0xFFFFFDE4(%ebp), %ecx
+ 0x3A96B016: movl %ecx,%edx
+ 0x3A96B018: movl %ecx,0xFFFFFDB8(%ebp)
+ 0x3A96B01E: call 0x3A968F20
+. 389 3A96B010 19
+. 8D 8D E4 FD FF FF 89 CA 89 8D B8 FD FF FF E8 FD DE FF FF
+
+==== BB 390 open_verify(0x3A968F20) in 6950B, out 39545B, BBs exec'd 0 ====
+ 0x3A968F20: pushl %ebp
+ 0x3A968F21: movl %esp,%ebp
+ 0x3A968F23: pushl %edi
+ 0x3A968F24: pushl %esi
+ 0x3A968F25: xorl %esi, %esi
+ 0x3A968F27: pushl %ebx
+ 0x3A968F28: subl $0x4C, %esp
+ 0x3A968F2B: call 0x3A97592B
+. 390 3A968F20 16
+. 55 89 E5 57 56 31 F6 53 83 EC 4C E8 FB C9 00 00
+
+==== BB 391 (0x3A968F30) in 6966B, out 39692B, BBs exec'd 0 ====
+ 0x3A968F30: addl $0xF73C, %ebx
+ 0x3A968F36: movl %eax,-48(%ebp)
+ 0x3A968F39: movl %edx,-52(%ebp)
+ 0x3A968F3C: movl $0x0, -60(%ebp)
+ 0x3A968F43: movl %esi,4(%esp,,)
+ 0x3A968F47: movl %eax,(%esp,,)
+ 0x3A968F4A: call 0x3A974430
+. 391 3A968F30 31
+. 81 C3 3C F7 00 00 89 45 D0 89 55 CC C7 45 C4 00 00 00 00 89 74 24 04 89 04 24 E8 E1 B4 00 00
+
+==== BB 392 open(0x3A974430) in 6997B, out 39821B, BBs exec'd 0 ====
+ 0x3A974430: pushl %ebx
+ 0x3A974431: movl 16(%esp,,),%edx
+ 0x3A974435: movl 12(%esp,,),%ecx
+ 0x3A974439: movl 8(%esp,,),%ebx
+ 0x3A97443D: movl $0x5,%eax
+ 0x3A974442: int $0x80
+. 392 3A974430 20
+. 53 8B 54 24 10 8B 4C 24 0C 8B 5C 24 08 B8 05 00 00 00 CD 80
+
+==== BB 393 (0x3A974444) in 7017B, out 39917B, BBs exec'd 0 ====
+ 0x3A974444: popl %ebx
+ 0x3A974445: cmpl $0xFFFFF001, %eax
+ 0x3A97444A: jnb-8 0x3A97444D
+. 393 3A974444 8
+. 5B 3D 01 F0 FF FF 73 01
+
+==== BB 394 (0x3A97444C) in 7025B, out 39996B, BBs exec'd 0 ====
+ 0x3A97444C: ret
+. 394 3A97444C 1
+. C3
+
+==== BB 395 (0x3A968F4F) in 7026B, out 40026B, BBs exec'd 0 ====
+ 0x3A968F4F: movl %eax,-56(%ebp)
+ 0x3A968F52: cmpl $0xFFFFFFFF, %eax
+ 0x3A968F55: jz-32 0x3A969150
+. 395 3A968F4F 12
+. 89 45 C8 83 F8 FF 0F 84 F5 01 00 00
+
+==== BB 396 (0x3A968F5B) in 7038B, out 40096B, BBs exec'd 0 ====
+ 0x3A968F5B: xorl %ecx, %ecx
+ 0x3A968F5D: movl $0x200,%edx
+ 0x3A968F62: movl %ecx,0x148(%ebx)
+ 0x3A968F68: movl %edx,8(%esp,,)
+ 0x3A968F6C: movl -52(%ebp),%edx
+ 0x3A968F6F: addl $0x4, %edx
+ 0x3A968F72: movl %edx,-72(%ebp)
+ 0x3A968F75: movl %edx,4(%esp,,)
+ 0x3A968F79: movl %eax,(%esp,,)
+ 0x3A968F7C: call 0x3A9744B0
+. 396 3A968F5B 38
+. 31 C9 BA 00 02 00 00 89 8B 48 01 00 00 89 54 24 08 8B 55 CC 83 C2 04 89 55 B8 89 54 24 04 89 04 24 E8 2F B5 00 00
+
+==== BB 397 read(0x3A9744B0) in 7076B, out 40247B, BBs exec'd 0 ====
+ 0x3A9744B0: pushl %ebx
+ 0x3A9744B1: movl 16(%esp,,),%edx
+ 0x3A9744B5: movl 12(%esp,,),%ecx
+ 0x3A9744B9: movl 8(%esp,,),%ebx
+ 0x3A9744BD: movl $0x3,%eax
+ 0x3A9744C2: int $0x80
+. 397 3A9744B0 20
+. 53 8B 54 24 10 8B 4C 24 0C 8B 5C 24 08 B8 03 00 00 00 CD 80
+
+==== BB 398 (0x3A9744C4) in 7096B, out 40343B, BBs exec'd 0 ====
+ 0x3A9744C4: popl %ebx
+ 0x3A9744C5: cmpl $0xFFFFF001, %eax
+ 0x3A9744CA: jnb-8 0x3A9744CD
+. 398 3A9744C4 8
+. 5B 3D 01 F0 FF FF 73 01
+
+==== BB 399 (0x3A9744CC) in 7104B, out 40422B, BBs exec'd 0 ====
+ 0x3A9744CC: ret
+. 399 3A9744CC 1
+. C3
+
+==== BB 400 (0x3A968F81) in 7105B, out 40452B, BBs exec'd 0 ====
+ 0x3A968F81: movl -52(%ebp),%esi
+ 0x3A968F84: cmpl $0x33, %eax
+ 0x3A968F87: movl %eax,(%esi)
+ 0x3A968F89: jle-32 0x3A96919F
+. 400 3A968F81 14
+. 8B 75 CC 83 F8 33 89 06 0F 8E 10 02 00 00
+
+==== BB 401 (0x3A968F8F) in 7119B, out 40535B, BBs exec'd 0 ====
+ 0x3A968F8F: cld
+ 0x3A968F90: movl -72(%ebp),%esi
+ 0x3A968F93: movl $0x9,%ecx
+ 0x3A968F98: leal 0xFFFFD62F(%ebx), %edi
+ 0x3A968F9E: repe cmpsb
+. 401 3A968F8F 17
+. FC 8B 75 B8 B9 09 00 00 00 8D BB 2F D6 FF FF F3 A6
+
+==== BB 402 (0x3A968F9E) in 7136B, out 40701B, BBs exec'd 0 ====
+ 0x3A968F9E: repe cmpsb
+. 402 3A968F9E 2
+. F3 A6
+
+==== BB 403 (0x3A968FA0) in 7138B, out 40826B, BBs exec'd 0 ====
+ 0x3A968FA0: jnz-32 0x3A9691BB
+. 403 3A968FA0 6
+. 0F 85 15 02 00 00
+
+==== BB 404 (0x3A968FA6) in 7144B, out 40873B, BBs exec'd 0 ====
+ 0x3A968FA6: movl -72(%ebp),%esi
+ 0x3A968FA9: leal 0xFFFFE3B4(%ebx), %edx
+ 0x3A968FAF: cmpl $0x1, 20(%esi)
+ 0x3A968FB3: jnz-32 0x3A9690D9
+. 404 3A968FA6 19
+. 8B 75 B8 8D 93 B4 E3 FF FF 83 7E 14 01 0F 85 20 01 00 00
+
+==== BB 405 (0x3A968FB9) in 7163B, out 40965B, BBs exec'd 0 ====
+ 0x3A968FB9: cmpw $0x3, 18(%esi)
+ 0x3A968FBE: jnz-32 0x3A969132
+. 405 3A968FB9 11
+. 66 83 7E 12 03 0F 85 6E 01 00 00
+
+==== BB 406 (0x3A968FC4) in 7174B, out 41029B, BBs exec'd 0 ====
+ 0x3A968FC4: cmpw $0x20, 42(%esi)
+ 0x3A968FC9: leal 0xFFFFE3E0(%ebx), %edx
+ 0x3A968FCF: jnz-32 0x3A9690D9
+. 406 3A968FC4 17
+. 66 83 7E 2A 20 8D 93 E0 E3 FF FF 0F 85 04 01 00 00
+
+==== BB 407 (0x3A968FD5) in 7191B, out 41109B, BBs exec'd 0 ====
+ 0x3A968FD5: movzwl 16(%esi),%eax
+ 0x3A968FD9: cmpl $0x3, %eax
+ 0x3A968FDC: jnz-32 0x3A969230
+. 407 3A968FD5 13
+. 0F B7 46 10 83 F8 03 0F 85 4E 02 00 00
+
+==== BB 408 (0x3A968FE2) in 7204B, out 41179B, BBs exec'd 0 ====
+ 0x3A968FE2: movl -72(%ebp),%edi
+ 0x3A968FE5: movl 28(%edi),%edx
+ 0x3A968FE8: movzwl 44(%edi),%ecx
+ 0x3A968FEC: movl -52(%ebp),%edi
+ 0x3A968FEF: leal 4(%edx,%edi,1), %edi
+ 0x3A968FF3: movl %edi,-64(%ebp)
+ 0x3A968FF6: movzwl %cx,%esi
+ 0x3A968FF9: movl -52(%ebp),%edi
+ 0x3A968FFC: shll $0x5, %esi
+ 0x3A968FFF: leal (%esi,%edx,1), %eax
+ 0x3A969002: cmpl (%edi),%eax
+ 0x3A969004: jnbe-32 0x3A969087
+. 408 3A968FE2 40
+. 8B 7D B8 8B 57 1C 0F B7 4F 2C 8B 7D CC 8D 7C 3A 04 89 7D C0 0F B7 F1 8B 7D CC C1 E6 05 8D 04 16 3B 07 0F 87 7D 00 00 00
+
+==== BB 409 (0x3A96900A) in 7244B, out 41347B, BBs exec'd 0 ====
+ 0x3A96900A: movl -64(%ebp),%esi
+ 0x3A96900D: movzwl %cx,%eax
+ 0x3A969010: shll $0x5, %eax
+ 0x3A969013: movl %esi,-68(%ebp)
+ 0x3A969016: addl %esi,%eax
+ 0x3A969018: cmpl %eax,%esi
+ 0x3A96901A: jb-8 0x3A969039
+. 409 3A96900A 18
+. 8B 75 C0 0F B7 C1 C1 E0 05 89 75 BC 01 F0 39 C6 72 1D
+
+==== BB 410 (0x3A969039) in 7262B, out 41450B, BBs exec'd 0 ====
+ 0x3A969039: movl -68(%ebp),%edi
+ 0x3A96903C: cmpl $0x4, (%edi)
+ 0x3A96903F: jnz-8 0x3A969021
+. 410 3A969039 8
+. 8B 7D BC 83 3F 04 75 E0
+
+==== BB 411 (0x3A969021) in 7270B, out 41523B, BBs exec'd 0 ====
+ 0x3A969021: addl $0x20, -68(%ebp)
+ 0x3A969025: movzwl %cx,%eax
+ 0x3A969028: movl -64(%ebp),%edx
+ 0x3A96902B: shll $0x5, %eax
+ 0x3A96902E: addl %edx,%eax
+ 0x3A969030: cmpl %eax,-68(%ebp)
+ 0x3A969033: jnb-32 0x3A969150
+. 411 3A969021 24
+. 83 45 BC 20 0F B7 C1 8B 55 C0 C1 E0 05 01 D0 39 45 BC 0F 83 17 01 00 00
+
+==== BB 412 (0x3A969150) in 7294B, out 41638B, BBs exec'd 0 ====
+ 0x3A969150: movl -56(%ebp),%eax
+ 0x3A969153: leal -12(%ebp), %esp
+ 0x3A969156: popl %ebx
+ 0x3A969157: popl %esi
+ 0x3A969158: popl %edi
+ 0x3A969159: popl %ebp
+ 0x3A96915A: ret
+. 412 3A969150 11
+. 8B 45 C8 8D 65 F4 5B 5E 5F 5D C3
+
+==== BB 413 (0x3A96B023) in 7305B, out 41753B, BBs exec'd 0 ====
+ 0x3A96B023: movl %eax,0xFFFFFDCC(%ebp)
+ 0x3A96B029: incl %eax
+ 0x3A96B02A: jz-32 0x3A96B4B0
+. 413 3A96B023 13
+. 89 85 CC FD FF FF 40 0F 84 80 04 00 00
+
+==== BB 414 (0x3A96B030) in 7318B, out 41831B, BBs exec'd 0 ====
+ 0x3A96B030: movl 0x128(%ebx),%eax
+ 0x3A96B036: movl %eax,0xFFFFFDDC(%ebp)
+ 0x3A96B03C: leal 0xFFFFFDDC(%ebp), %eax
+ 0x3A96B042: movl %eax,16(%esp,,)
+ 0x3A96B046: movl 16(%ebp),%eax
+ 0x3A96B049: movl %eax,12(%esp,,)
+ 0x3A96B04D: movl 8(%ebp),%ecx
+ 0x3A96B050: movl %ecx,8(%esp,,)
+ 0x3A96B054: movl 0xFFFFFDD8(%ebp),%eax
+ 0x3A96B05A: movl %eax,4(%esp,,)
+ 0x3A96B05E: movl 0xFFFFFDE0(%ebp),%eax
+ 0x3A96B064: movl %eax,(%esp,,)
+ 0x3A96B067: movl 0xFFFFFDB8(%ebp),%ecx
+ 0x3A96B06D: movl 0xFFFFFDCC(%ebp),%edx
+ 0x3A96B073: movl 0xFFFFFDD4(%ebp),%eax
+ 0x3A96B079: call 0x3A969790
+. 414 3A96B030 78
+. 8B 83 28 01 00 00 89 85 DC FD FF FF 8D 85 DC FD FF FF 89 44 24 10 8B 45 10 89 44 24 0C 8B 4D 08 89 4C 24 08 8B 85 D8 FD FF FF 89 44 24 04 8B 85 E0 FD FF FF 89 04 24 8B 8D B8 FD FF FF 8B 95 CC FD FF FF 8B 85 D4 FD FF FF E8 12 E7 FF FF
+
+==== BB 415 _dl_map_object_from_fd(0x3A969790) in 7396B, out 42059B, BBs exec'd 0 ====
+ 0x3A969790: pushl %ebp
+ 0x3A969791: movl %esp,%ebp
+ 0x3A969793: pushl %edi
+ 0x3A969794: pushl %esi
+ 0x3A969795: pushl %ebx
+ 0x3A969796: subl $0x108, %esp
+ 0x3A96979C: movl %eax,-112(%ebp)
+ 0x3A96979F: leal -108(%ebp), %eax
+ 0x3A9697A2: movl %ecx,-120(%ebp)
+ 0x3A9697A5: xorl %ecx, %ecx
+ 0x3A9697A7: movl %edx,-116(%ebp)
+ 0x3A9697AA: movl $0x0, -124(%ebp)
+ 0x3A9697B1: movl %ecx,0xFFFFFF74(%ebp)
+ 0x3A9697B7: movl %eax,8(%esp,,)
+ 0x3A9697BB: movl -116(%ebp),%eax
+ 0x3A9697BE: call 0x3A97592B
+. 415 3A969790 51
+. 55 89 E5 57 56 53 81 EC 08 01 00 00 89 45 90 8D 45 94 89 4D 88 31 C9 89 55 8C C7 45 84 00 00 00 00 89 8D 74 FF FF FF 89 44 24 08 8B 45 8C E8 68 C1 00 00
+
+==== BB 416 (0x3A9697C3) in 7447B, out 42306B, BBs exec'd 0 ====
+ 0x3A9697C3: addl $0xEEA9, %ebx
+ 0x3A9697C9: movl $0x3, (%esp,,)
+ 0x3A9697D0: movl %eax,4(%esp,,)
+ 0x3A9697D4: call 0x3A974320
+. 416 3A9697C3 22
+. 81 C3 A9 EE 00 00 C7 04 24 03 00 00 00 89 44 24 04 E8 47 AB 00 00
+
+==== BB 417 __GI___fxstat64(0x3A974320) in 7469B, out 42396B, BBs exec'd 0 ====
+ 0x3A974320: pushl %ebp
+ 0x3A974321: movl %esp,%ebp
+ 0x3A974323: subl $0x58, %esp
+ 0x3A974326: movl %ebx,-12(%ebp)
+ 0x3A974329: call 0x3A97592B
+. 417 3A974320 14
+. 55 89 E5 83 EC 58 89 5D F4 E8 FD 15 00 00
+
+==== BB 418 (0x3A97432E) in 7483B, out 42494B, BBs exec'd 0 ====
+ 0x3A97432E: addl $0x433E, %ebx
+ 0x3A974334: movl %esi,-8(%ebp)
+ 0x3A974337: movl 0x24(%ebx),%esi
+ 0x3A97433D: movl %edi,-4(%ebp)
+ 0x3A974340: movl (%esi),%eax
+ 0x3A974342: testl %eax,%eax
+ 0x3A974344: jnz-8 0x3A9743C0
+. 418 3A97432E 24
+. 81 C3 3E 43 00 00 89 75 F8 8B B3 24 00 00 00 89 7D FC 8B 06 85 C0 75 7A
+
+==== BB 419 (0x3A974346) in 7507B, out 42618B, BBs exec'd 0 ====
+ 0x3A974346: movl 0x148(%ebx),%edi
+ 0x3A97434C: movl 12(%ebp),%edx
+ 0x3A97434F: movl 16(%ebp),%ecx
+ 0x3A974352: xchgl %edx, %ebx
+ 0x3A974354: movl $0xC5,%eax
+ 0x3A974359: int $0x80
+. 419 3A974346 21
+. 8B BB 48 01 00 00 8B 55 0C 8B 4D 10 87 D3 B8 C5 00 00 00 CD 80
+
+==== BB 420 (0x3A97435B) in 7528B, out 42711B, BBs exec'd 0 ====
+ 0x3A97435B: xchgl %edx, %ebx
+ 0x3A97435D: cmpl $0xFFFFF000, %eax
+ 0x3A974362: jnbe-32 0x3A974416
+. 420 3A97435B 13
+. 87 D3 3D 00 F0 FF FF 0F 87 AE 00 00 00
+
+==== BB 421 (0x3A974368) in 7541B, out 42787B, BBs exec'd 0 ====
+ 0x3A974368: cmpl $0xFFFFFFFF, %eax
+ 0x3A97436B: movl %eax,%edx
+ 0x3A97436D: jz-8 0x3A9743A0
+. 421 3A974368 7
+. 83 F8 FF 89 C2 74 31
+
+==== BB 422 (0x3A97436F) in 7548B, out 42854B, BBs exec'd 0 ====
+ 0x3A97436F: testl %edx,%edx
+ 0x3A974371: jnz-8 0x3A974390
+. 422 3A97436F 4
+. 85 D2 75 1D
+
+==== BB 423 (0x3A974373) in 7552B, out 42913B, BBs exec'd 0 ====
+ 0x3A974373: movl 16(%ebp),%ecx
+ 0x3A974376: movl 88(%ecx),%eax
+ 0x3A974379: cmpl %eax,12(%ecx)
+ 0x3A97437C: jz-8 0x3A974390
+. 423 3A974373 11
+. 8B 4D 10 8B 41 58 39 41 0C 74 12
+
+==== BB 424 (0x3A974390) in 7563B, out 43001B, BBs exec'd 0 ====
+ 0x3A974390: movl -12(%ebp),%ebx
+ 0x3A974393: movl %edx,%eax
+ 0x3A974395: movl -8(%ebp),%esi
+ 0x3A974398: movl -4(%ebp),%edi
+ 0x3A97439B: movl %ebp,%esp
+ 0x3A97439D: popl %ebp
+ 0x3A97439E: ret
+. 424 3A974390 15
+. 8B 5D F4 89 D0 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 425 (0x3A9697D9) in 7578B, out 43103B, BBs exec'd 0 ====
+ 0x3A9697D9: testl %eax,%eax
+ 0x3A9697DB: js-32 0x3A969DCE
+. 425 3A9697D9 8
+. 85 C0 0F 88 ED 05 00 00
+
+==== BB 426 (0x3A9697E1) in 7586B, out 43162B, BBs exec'd 0 ====
+ 0x3A9697E1: movl 0xFFFFF994(%ebx),%edx
+ 0x3A9697E7: testl %edx,%edx
+ 0x3A9697E9: movl %edx,-124(%ebp)
+ 0x3A9697EC: jz-8 0x3A96985D
+. 426 3A9697E1 13
+. 8B 93 94 F9 FF FF 85 D2 89 55 84 74 6F
+
+==== BB 427 (0x3A9697EE) in 7599B, out 43250B, BBs exec'd 0 ====
+ 0x3A9697EE: movl -108(%ebp),%eax
+ 0x3A9697F1: movl -104(%ebp),%edx
+ 0x3A9697F4: movl -20(%ebp),%esi
+ 0x3A9697F7: movl %eax,0xFFFFFF6C(%ebp)
+ 0x3A9697FD: movl -16(%ebp),%edi
+ 0x3A969800: movl %edx,0xFFFFFF70(%ebp)
+ 0x3A969806: leal 0(%esi), %esi
+ 0x3A969809: leal 0(%edi,,), %edi
+ 0x3A969810: movl -124(%ebp),%ecx
+ 0x3A969813: movl 0x1C8(%ecx),%edx
+ 0x3A969819: movl 0x1C4(%ecx),%eax
+ 0x3A96981F: movl %edx,%ecx
+ 0x3A969821: xorl %edi,%ecx
+ 0x3A969823: xorl %esi,%eax
+ 0x3A969825: orl %eax,%ecx
+ 0x3A969827: jnz-8 0x3A969850
+. 427 3A9697EE 59
+. 8B 45 94 8B 55 98 8B 75 EC 89 85 6C FF FF FF 8B 7D F0 89 95 70 FF FF FF 8D 76 00 8D BC 27 00 00 00 00 8B 4D 84 8B 91 C8 01 00 00 8B 81 C4 01 00 00 89 D1 31 F9 31 F0 09 C1 75 27
+
+==== BB 428 (0x3A969850) in 7658B, out 43456B, BBs exec'd 0 ====
+ 0x3A969850: movl -124(%ebp),%eax
+ 0x3A969853: movl 12(%eax),%eax
+ 0x3A969856: testl %eax,%eax
+ 0x3A969858: movl %eax,-124(%ebp)
+ 0x3A96985B: jnz-8 0x3A969810
+. 428 3A969850 13
+. 8B 45 84 8B 40 0C 85 C0 89 45 84 75 B3
+
+==== BB 429 (0x3A969810) in 7671B, out 43548B, BBs exec'd 0 ====
+ 0x3A969810: movl -124(%ebp),%ecx
+ 0x3A969813: movl 0x1C8(%ecx),%edx
+ 0x3A969819: movl 0x1C4(%ecx),%eax
+ 0x3A96981F: movl %edx,%ecx
+ 0x3A969821: xorl %edi,%ecx
+ 0x3A969823: xorl %esi,%eax
+ 0x3A969825: orl %eax,%ecx
+ 0x3A969827: jnz-8 0x3A969850
+. 429 3A969810 25
+. 8B 4D 84 8B 91 C8 01 00 00 8B 81 C4 01 00 00 89 D1 31 F9 31 F0 09 C1 75 27
+
+==== BB 430 (0x3A96985D) in 7696B, out 43667B, BBs exec'd 0 ====
+ 0x3A96985D: xorl %eax, %eax
+ 0x3A96985F: testb $0x4, 20(%ebp)
+ 0x3A969863: jnz-32 0x3A969DC6
+. 430 3A96985D 12
+. 31 C0 F6 45 14 04 0F 85 5D 05 00 00
+
+==== BB 431 (0x3A969869) in 7708B, out 43752B, BBs exec'd 0 ====
+ 0x3A969869: testb $0x40, 0xFFFFFC14(%ebx)
+ 0x3A969870: jnz-32 0x3A96A050
+. 431 3A969869 13
+. F6 83 14 FC FF FF 40 0F 85 DA 07 00 00
+
+==== BB 432 (0x3A969876) in 7721B, out 43822B, BBs exec'd 0 ====
+ 0x3A969876: movl -120(%ebp),%ecx
+ 0x3A969879: movl 12(%ebp),%eax
+ 0x3A96987C: addl $0x4, %ecx
+ 0x3A96987F: movl %ecx,-128(%ebp)
+ 0x3A969882: movl %eax,(%esp,,)
+ 0x3A969885: movl -112(%ebp),%edx
+ 0x3A969888: movl 16(%ebp),%ecx
+ 0x3A96988B: movl 8(%ebp),%eax
+ 0x3A96988E: call 0x3A96C9D0
+. 432 3A969876 29
+. 8B 4D 88 8B 45 0C 83 C1 04 89 4D 80 89 04 24 8B 55 90 8B 4D 10 8B 45 08 E8 3D 31 00 00
+
+==== BB 433 (0x3A973780) in 7750B, out 43957B, BBs exec'd 0 ====
+ 0x3A973780: movl %edx,0x138(%ebx)
+ 0x3A973786: movl 0xFFFFFC18(%ebx),%eax
+ 0x3A97378C: xorl %ecx, %ecx
+ 0x3A97378E: movl %ecx,20(%esp,,)
+ 0x3A973792: movl $0xFFFFFFFF,%edx
+ 0x3A973797: movl %edx,16(%esp,,)
+ 0x3A97379B: leal -1(%eax,%edi,1), %esi
+ 0x3A97379F: negl %eax
+ 0x3A9737A1: movl $0x0, (%esp,,)
+ 0x3A9737A8: andl %eax,%esi
+ 0x3A9737AA: movl $0x22,%eax
+ 0x3A9737AF: movl %eax,12(%esp,,)
+ 0x3A9737B3: movl $0x3,%eax
+ 0x3A9737B8: movl %eax,8(%esp,,)
+ 0x3A9737BC: movl %esi,4(%esp,,)
+ 0x3A9737C0: call 0x3A974C50
+. 433 3A973780 69
+. 89 93 38 01 00 00 8B 83 18 FC FF FF 31 C9 89 4C 24 14 BA FF FF FF FF 89 54 24 10 8D 74 38 FF F7 D8 C7 04 24 00 00 00 00 21 C6 B8 22 00 00 00 89 44 24 0C B8 03 00 00 00 89 44 24 08 89 74 24 04 E8 8B 14 00 00
+
+==== BB 434 mmap(0x3A974C50) in 7819B, out 44173B, BBs exec'd 0 ====
+ 0x3A974C50: movl %ebx,%edx
+ 0x3A974C52: movl $0x5A,%eax
+ 0x3A974C57: leal 4(%esp,,), %ebx
+ 0x3A974C5B: int $0x80
+. 434 3A974C50 13
+. 89 DA B8 5A 00 00 00 8D 5C 24 04 CD 80
+
+==== BB 435 (0x3A974C5D) in 7832B, out 44234B, BBs exec'd 0 ====
+ 0x3A974C5D: movl %edx,%ebx
+ 0x3A974C5F: cmpl $0xFFFFF000, %eax
+ 0x3A974C64: jnbe-8 0x3A974C67
+. 435 3A974C5D 9
+. 89 D3 3D 00 F0 FF FF 77 01
+
+==== BB 436 (0x3A974C66) in 7841B, out 44304B, BBs exec'd 0 ====
+ 0x3A974C66: ret
+. 436 3A974C66 1
+. C3
+
+==== BB 437 (0x3A9737C5) in 7842B, out 44334B, BBs exec'd 0 ====
+ 0x3A9737C5: cmpl 0x13C(%ebx),%eax
+ 0x3A9737CB: jz-8 0x3A9737D3
+. 437 3A9737C5 8
+. 3B 83 3C 01 00 00 74 06
+
+==== BB 438 (0x3A9737CD) in 7850B, out 44402B, BBs exec'd 0 ====
+ 0x3A9737CD: movl %eax,0x138(%ebx)
+ 0x3A9737D3: movl 0x138(%ebx),%edx
+ 0x3A9737D9: addl %esi,%eax
+ 0x3A9737DB: movl %eax,0x13C(%ebx)
+ 0x3A9737E1: movl %edx,0x140(%ebx)
+ 0x3A9737E7: movl %edx,%eax
+ 0x3A9737E9: leal (%edi,%edx,1), %edx
+ 0x3A9737EC: movl %edx,0x138(%ebx)
+ 0x3A9737F2: movl -12(%ebp),%ebx
+ 0x3A9737F5: movl -8(%ebp),%esi
+ 0x3A9737F8: movl -4(%ebp),%edi
+ 0x3A9737FB: movl %ebp,%esp
+ 0x3A9737FD: popl %ebp
+ 0x3A9737FE: ret
+. 438 3A9737CD 50
+. 89 83 38 01 00 00 8B 93 38 01 00 00 01 F0 89 83 3C 01 00 00 89 93 40 01 00 00 89 D0 8D 14 17 89 93 38 01 00 00 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 439 (0x3A96CAB0) in 7900B, out 44603B, BBs exec'd 0 ====
+ 0x3A96CAB0: movl %eax,%edx
+ 0x3A96CAB2: movl 12(%eax),%eax
+ 0x3A96CAB5: testl %eax,%eax
+ 0x3A96CAB7: jz-8 0x3A96CAC9
+. 439 3A96CAB0 9
+. 89 C2 8B 40 0C 85 C0 74 10
+
+==== BB 440 (0x3A96CAB9) in 7909B, out 44685B, BBs exec'd 0 ====
+ 0x3A96CAB9: leal 0(%esi,,), %esi
+ 0x3A96CAC0: movl %eax,%edx
+ 0x3A96CAC2: movl 12(%eax),%eax
+ 0x3A96CAC5: testl %eax,%eax
+ 0x3A96CAC7: jnz-8 0x3A96CAC0
+. 440 3A96CAB9 16
+. 8D B4 26 00 00 00 00 89 C2 8B 40 0C 85 C0 75 F7
+
+==== BB 441 (0x3A96CAC9) in 7925B, out 44780B, BBs exec'd 0 ====
+ 0x3A96CAC9: movl -32(%ebp),%eax
+ 0x3A96CACC: movl %edx,16(%eax)
+ 0x3A96CACF: movl %eax,12(%edx)
+ 0x3A96CAD2: movl 0x1B0(%eax),%edx
+ 0x3A96CAD8: movl 0xFFFFF994(%ebx),%eax
+ 0x3A96CADE: addl $0x150, %eax
+ 0x3A96CAE3: movl %eax,(%edx,%ecx,4)
+ 0x3A96CAE6: movl $0x1,%ecx
+ 0x3A96CAEB: incl 0xFFFFF998(%ebx)
+ 0x3A96CAF1: addl $0x1, 0xFFFFF9C4(%ebx)
+ 0x3A96CAF8: adcl $0x0, 0xFFFFF9C8(%ebx)
+ 0x3A96CAFF: testl %edi,%edi
+ 0x3A96CB01: jz-32 0x3A96CC58
+. 441 3A96CAC9 62
+. 8B 45 E0 89 50 10 89 42 0C 8B 90 B0 01 00 00 8B 83 94 F9 FF FF 05 50 01 00 00 89 04 8A B9 01 00 00 00 FF 83 98 F9 FF FF 83 83 C4 F9 FF FF 01 83 93 C8 F9 FF FF 00 85 FF 0F 84 51 01 00 00
+
+==== BB 442 (0x3A96CB07) in 7987B, out 45004B, BBs exec'd 0 ====
+ 0x3A96CB07: movl 0x160(%edi),%eax
+ 0x3A96CB0D: testl %eax,%eax
+ 0x3A96CB0F: jz-8 0x3A96CB2C
+. 442 3A96CB07 10
+. 8B 87 60 01 00 00 85 C0 74 1B
+
+==== BB 443 (0x3A96CB36) in 7997B, out 45079B, BBs exec'd 0 ====
+ 0x3A96CB36: cmpl (%edx),%eax
+ 0x3A96CB38: jz-8 0x3A96CB3D
+. 443 3A96CB36 4
+. 3B 02 74 03
+
+==== BB 444 (0x3A96CB3D) in 8001B, out 45141B, BBs exec'd 0 ====
+ 0x3A96CB3D: movl -32(%ebp),%eax
+ 0x3A96CB40: movl -32(%ebp),%edx
+ 0x3A96CB43: movl -16(%ebp),%ecx
+ 0x3A96CB46: addl $0x150, %eax
+ 0x3A96CB4B: movl %eax,0x1B4(%edx)
+ 0x3A96CB51: movzbl (%ecx),%ecx
+ 0x3A96CB54: testb %cl,%cl
+ 0x3A96CB56: movb %cl,-33(%ebp)
+ 0x3A96CB59: jz-32 0x3A96CC26
+. 444 3A96CB3D 34
+. 8B 45 E0 8B 55 E0 8B 4D F0 05 50 01 00 00 89 82 B4 01 00 00 0F B6 09 84 C9 88 4D DF 0F 84 C7 00 00 00
+
+==== BB 445 (0x3A96CB5F) in 8035B, out 45287B, BBs exec'd 0 ====
+ 0x3A96CB5F: movl -16(%ebp),%eax
+ 0x3A96CB62: movl %eax,(%esp,,)
+ 0x3A96CB65: call 0x3A9752D0
+. 445 3A96CB5F 11
+. 8B 45 F0 89 04 24 E8 66 87 00 00
+
+==== BB 446 (0x3A96CB6A) in 8046B, out 45355B, BBs exec'd 0 ====
+ 0x3A96CB6A: incl %eax
+ 0x3A96CB6B: cmpb $0x2F, -33(%ebp)
+ 0x3A96CB6F: movl %eax,-40(%ebp)
+ 0x3A96CB72: jz-32 0x3A96CC60
+. 446 3A96CB6A 14
+. 40 80 7D DF 2F 89 45 D8 0F 84 E8 00 00 00
+
+==== BB 447 (0x3A96CC60) in 8060B, out 45439B, BBs exec'd 0 ====
+ 0x3A96CC60: movl %eax,(%esp,,)
+ 0x3A96CC63: call 0x3A96581C
+. 447 3A96CC60 8
+. 89 04 24 E8 B4 8B FF FF
+
+==== BB 448 (0x3A96CC68) in 8068B, out 45494B, BBs exec'd 0 ====
+ 0x3A96CC68: testl %eax,%eax
+ 0x3A96CC6A: movl %eax,%edi
+ 0x3A96CC6C: jnz-32 0x3A96CBEB
+. 448 3A96CC68 10
+. 85 C0 89 C7 0F 85 79 FF FF FF
+
+==== BB 449 (0x3A96CBEB) in 8078B, out 45560B, BBs exec'd 0 ====
+ 0x3A96CBEB: movl -40(%ebp),%edx
+ 0x3A96CBEE: movl %edx,8(%esp,,)
+ 0x3A96CBF2: movl -16(%ebp),%ecx
+ 0x3A96CBF5: movl %eax,(%esp,,)
+ 0x3A96CBF8: movl %ecx,4(%esp,,)
+ 0x3A96CBFC: call 0x3A975770
+. 449 3A96CBEB 22
+. 8B 55 D8 89 54 24 08 8B 4D F0 89 04 24 89 4C 24 04 E8 6F 8B 00 00
+
+==== BB 450 (0x3A96CC01) in 8100B, out 45664B, BBs exec'd 0 ====
+ 0x3A96CC01: jmp-8 0x3A96CC10
+. 450 3A96CC01 2
+. EB 0D
+
+==== BB 451 (0x3A96CC10) in 8102B, out 45692B, BBs exec'd 0 ====
+ 0x3A96CC10: decl %eax
+ 0x3A96CC11: cmpb $0x2F, (%eax)
+ 0x3A96CC14: jnz-8 0x3A96CC10
+. 451 3A96CC10 6
+. 48 80 38 2F 75 FA
+
+==== BB 452 (0x3A96CC16) in 8108B, out 45760B, BBs exec'd 0 ====
+ 0x3A96CC16: cmpl %edi,%eax
+ 0x3A96CC18: jz-8 0x3A96CC83
+. 452 3A96CC16 4
+. 39 F8 74 69
+
+==== BB 453 (0x3A96CC1A) in 8112B, out 45817B, BBs exec'd 0 ====
+ 0x3A96CC1A: movb $0x0, (%eax)
+ 0x3A96CC1D: movl -32(%ebp),%eax
+ 0x3A96CC20: movl %edi,0x190(%eax)
+ 0x3A96CC26: movl -32(%ebp),%eax
+ 0x3A96CC29: addl $0x2C, %esp
+ 0x3A96CC2C: popl %ebx
+ 0x3A96CC2D: popl %esi
+ 0x3A96CC2E: popl %edi
+ 0x3A96CC2F: popl %ebp
+ 0x3A96CC30: ret 4
+. 453 3A96CC1A 25
+. C6 00 00 8B 45 E0 89 B8 90 01 00 00 8B 45 E0 83 C4 2C 5B 5E 5F 5D C2 04 00
+
+==== BB 454 (0x3A969893) in 8137B, out 45981B, BBs exec'd 0 ====
+ 0x3A969893: movl %eax,-124(%ebp)
+ 0x3A969896: subl $0x4, %esp
+ 0x3A969899: testl %eax,%eax
+ 0x3A96989B: leal 0xFFFFE494(%ebx), %edx
+ 0x3A9698A1: jz-32 0x3A969D74
+. 454 3A969893 20
+. 89 45 84 83 EC 04 85 C0 8D 93 94 E4 FF FF 0F 84 CD 04 00 00
+
+==== BB 455 (0x3A9698A7) in 8157B, out 46082B, BBs exec'd 0 ====
+ 0x3A9698A7: movl -128(%ebp),%esi
+ 0x3A9698AA: movl -124(%ebp),%edx
+ 0x3A9698AD: movl 24(%esi),%eax
+ 0x3A9698B0: movzwl 16(%esi),%ecx
+ 0x3A9698B4: movl %eax,0x148(%edx)
+ 0x3A9698BA: movzwl 44(%esi),%eax
+ 0x3A9698BE: movl %ecx,0xFFFFFF78(%ebp)
+ 0x3A9698C4: movl -120(%ebp),%ecx
+ 0x3A9698C7: movw %ax,0x14C(%edx)
+ 0x3A9698CE: movl -128(%ebp),%edx
+ 0x3A9698D1: movzwl 44(%esi),%esi
+ 0x3A9698D5: movl 28(%edx),%eax
+ 0x3A9698D8: shll $0x5, %esi
+ 0x3A9698DB: movl %esi,0xFFFFFF28(%ebp)
+ 0x3A9698E1: leal (%esi,%eax,1), %edx
+ 0x3A9698E4: leal 4(%eax,%ecx,1), %eax
+ 0x3A9698E8: cmpl (%ecx),%edx
+ 0x3A9698EA: movl %eax,0xFFFFFF7C(%ebp)
+ 0x3A9698F0: jnbe-32 0x3A969D15
+. 455 3A9698A7 79
+. 8B 75 80 8B 55 84 8B 46 18 0F B7 4E 10 89 82 48 01 00 00 0F B7 46 2C 89 8D 78 FF FF FF 8B 4D 88 66 89 82 4C 01 00 00 8B 55 80 0F B7 76 2C 8B 42 1C C1 E6 05 89 B5 28 FF FF FF 8D 14 06 8D 44 08 04 3B 11 89 85 7C FF FF FF 0F 87 1F 04 00 00
+
+==== BB 456 (0x3A9698F6) in 8236B, out 46339B, BBs exec'd 0 ====
+ 0x3A9698F6: movl %esp,0xFFFFFF64(%ebp)
+ 0x3A9698FC: movl -124(%ebp),%ecx
+ 0x3A9698FF: movl $0x7,%edi
+ 0x3A969904: movl %edi,0xFFFFFF68(%ebp)
+ 0x3A96990A: movb $0x0, 0xFFFFFF5B(%ebp)
+ 0x3A969911: movzwl 0x14C(%ecx),%edx
+ 0x3A969918: leal -3(%edx,%edx,2), %eax
+ 0x3A96991C: leal 0x28(,%eax,8), %eax
+ 0x3A969923: subl %eax,%esp
+ 0x3A969925: shll $0x5, %edx
+ 0x3A969928: leal 67(%esp,,), %esi
+ 0x3A96992C: andl $0xFFFFFFF0, %esi
+ 0x3A96992F: movl %esi,0xFFFFFF60(%ebp)
+ 0x3A969935: xorl %esi, %esi
+ 0x3A969937: movl %esi,0xFFFFFF5C(%ebp)
+ 0x3A96993D: movl 0xFFFFFF7C(%ebp),%esi
+ 0x3A969943: movl %esi,%eax
+ 0x3A969945: addl %edx,%eax
+ 0x3A969947: cmpl %eax,%esi
+ 0x3A969949: jnb-32 0x3A969DD6
+. 456 3A9698F6 89
+. 89 A5 64 FF FF FF 8B 4D 84 BF 07 00 00 00 89 BD 68 FF FF FF C6 85 5B FF FF FF 00 0F B7 91 4C 01 00 00 8D 44 52 FD 8D 04 C5 28 00 00 00 29 C4 C1 E2 05 8D 74 24 43 83 E6 F0 89 B5 60 FF FF FF 31 F6 89 B5 5C FF FF FF 8B B5 7C FF FF FF 89 F0 01 D0 39 C6 0F 83 87 04 00 00
+
+==== BB 457 (0x3A96994F) in 8325B, out 46615B, BBs exec'd 0 ====
+ 0x3A96994F: movl %eax,0xFFFFFF54(%ebp)
+ 0x3A969955: movl 0xFFFFFF60(%ebp),%eax
+ 0x3A96995B: movl %eax,0xFFFFFF2C(%ebp)
+ 0x3A969961: jmp-8 0x3A96998B
+. 457 3A96994F 20
+. 89 85 54 FF FF FF 8B 85 60 FF FF FF 89 85 2C FF FF FF EB 28
+
+==== BB 458 (0x3A96998B) in 8345B, out 46691B, BBs exec'd 0 ====
+ 0x3A96998B: movl (%esi),%eax
+ 0x3A96998D: cmpl $0x6, %eax
+ 0x3A969990: jz-8 0x3A9699C5
+. 458 3A96998B 7
+. 8B 06 83 F8 06 74 33
+
+==== BB 459 (0x3A969992) in 8352B, out 46758B, BBs exec'd 0 ====
+ 0x3A969992: cmpl $0x6, %eax
+ 0x3A969995: jbe-8 0x3A969963
+. 459 3A969992 5
+. 83 F8 06 76 CC
+
+==== BB 460 (0x3A969963) in 8357B, out 46815B, BBs exec'd 0 ====
+ 0x3A969963: cmpl $0x1, %eax
+ 0x3A969966: jz-32 0x3A969C3A
+. 460 3A969963 9
+. 83 F8 01 0F 84 CE 02 00 00
+
+==== BB 461 (0x3A969C3A) in 8366B, out 46872B, BBs exec'd 0 ====
+ 0x3A969C3A: movl 0xFFFFFC18(%ebx),%eax
+ 0x3A969C40: movl 28(%esi),%edx
+ 0x3A969C43: decl %eax
+ 0x3A969C44: testl %eax,%edx
+ 0x3A969C46: jnz-32 0x3A96A1E5
+. 461 3A969C3A 18
+. 8B 83 18 FC FF FF 8B 56 1C 48 85 D0 0F 85 99 05 00 00
+
+==== BB 462 (0x3A969C4C) in 8384B, out 46965B, BBs exec'd 0 ====
+ 0x3A969C4C: movl 8(%esi),%eax
+ 0x3A969C4F: decl %edx
+ 0x3A969C50: movl 4(%esi),%ecx
+ 0x3A969C53: movl %eax,0xFFFFFF50(%ebp)
+ 0x3A969C59: subl %ecx,%eax
+ 0x3A969C5B: testl %edx,%eax
+ 0x3A969C5D: jnz-32 0x3A96A1F0
+. 462 3A969C4C 23
+. 8B 46 08 4A 8B 4E 04 89 85 50 FF FF FF 29 C8 85 C2 0F 85 8D 05 00 00
+
+==== BB 463 (0x3A969C63) in 8407B, out 47080B, BBs exec'd 0 ====
+ 0x3A969C63: incl 0xFFFFFF5C(%ebp)
+ 0x3A969C69: movl 0xFFFFFF2C(%ebp),%edi
+ 0x3A969C6F: movl 0xFFFFFF50(%ebp),%eax
+ 0x3A969C75: leal 24(%edi), %ecx
+ 0x3A969C78: movl %ecx,0xFFFFFF2C(%ebp)
+ 0x3A969C7E: movl %edx,%ecx
+ 0x3A969C80: notl %ecx
+ 0x3A969C82: andl %eax,%ecx
+ 0x3A969C84: movl 0xFFFFFF2C(%ebp),%eax
+ 0x3A969C8A: movl %ecx,-24(%eax)
+ 0x3A969C8D: movl 8(%esi),%edx
+ 0x3A969C90: movl 16(%esi),%eax
+ 0x3A969C93: addl %edx,%eax
+ 0x3A969C95: movl 0xFFFFFC18(%ebx),%edx
+ 0x3A969C9B: leal -1(%edx,%eax,1), %eax
+ 0x3A969C9F: negl %edx
+ 0x3A969CA1: andl %edx,%eax
+ 0x3A969CA3: movl 0xFFFFFF2C(%ebp),%edx
+ 0x3A969CA9: movl %eax,-20(%edx)
+ 0x3A969CAC: movl 16(%esi),%eax
+ 0x3A969CAF: addl 8(%esi),%eax
+ 0x3A969CB2: movl %eax,-16(%edx)
+ 0x3A969CB5: movl 20(%esi),%eax
+ 0x3A969CB8: addl 8(%esi),%eax
+ 0x3A969CBB: movl %eax,-12(%edx)
+ 0x3A969CBE: movl 28(%esi),%eax
+ 0x3A969CC1: decl %eax
+ 0x3A969CC2: notl %eax
+ 0x3A969CC4: andl 4(%esi),%eax
+ 0x3A969CC7: cmpl $0x1, 0xFFFFFF5C(%ebp)
+ 0x3A969CCE: movl %eax,-8(%edx)
+ 0x3A969CD1: jbe-8 0x3A969CDF
+. 463 3A969C63 112
+. FF 85 5C FF FF FF 8B BD 2C FF FF FF 8B 85 50 FF FF FF 8D 4F 18 89 8D 2C FF FF FF 89 D1 F7 D1 21 C1 8B 85 2C FF FF FF 89 48 E8 8B 56 08 8B 46 10 01 D0 8B 93 18 FC FF FF 8D 44 02 FF F7 DA 21 D0 8B 95 2C FF FF FF 89 42 EC 8B 46 10 03 46 08 89 42 F0 8B 46 14 03 46 08 89 42 F4 8B 46 1C 48 F7 D0 23 46 04 83 BD 5C FF FF FF 01 89 42 F8 76 0C
+
+==== BB 464 (0x3A969CDF) in 8519B, out 47458B, BBs exec'd 0 ====
+ 0x3A969CDF: movl 24(%esi),%ecx
+ 0x3A969CE2: movl $0x73516240,%eax
+ 0x3A969CE7: andl $0x7, %ecx
+ 0x3A969CEA: shll $0x2, %ecx
+ 0x3A969CED: sarl %cl, %eax
+ 0x3A969CEF: andl $0xF, %eax
+ 0x3A969CF2: movl %eax,20(%edi)
+ 0x3A969CF5: jmp 0x3A969980
+. 464 3A969CDF 27
+. 8B 4E 18 B8 40 62 51 73 83 E1 07 C1 E1 02 D3 F8 83 E0 0F 89 47 14 E9 86 FC FF FF
+
+==== BB 465 (0x3A969980) in 8546B, out 47578B, BBs exec'd 0 ====
+ 0x3A969980: addl $0x20, %esi
+ 0x3A969983: cmpl 0xFFFFFF54(%ebp),%esi
+ 0x3A969989: jnb-8 0x3A9699DC
+. 465 3A969980 11
+. 83 C6 20 3B B5 54 FF FF FF 73 51
+
+==== BB 466 (0x3A969CD3) in 8557B, out 47656B, BBs exec'd 0 ====
+ 0x3A969CD3: cmpl %ecx,-20(%edi)
+ 0x3A969CD6: jz-8 0x3A969CDF
+. 466 3A969CD3 5
+. 39 4F EC 74 07
+
+==== BB 467 (0x3A96996C) in 8562B, out 47719B, BBs exec'd 0 ====
+ 0x3A96996C: cmpl $0x2, %eax
+ 0x3A96996F: jz-32 0x3A969CFA
+. 467 3A96996C 9
+. 83 F8 02 0F 84 85 03 00 00
+
+==== BB 468 (0x3A969CFA) in 8571B, out 47776B, BBs exec'd 0 ====
+ 0x3A969CFA: movl 8(%esi),%eax
+ 0x3A969CFD: movl -124(%ebp),%edx
+ 0x3A969D00: movl %eax,8(%edx)
+ 0x3A969D03: movl 20(%esi),%eax
+ 0x3A969D06: shrl $0x3, %eax
+ 0x3A969D09: movw %ax,0x14E(%edx)
+ 0x3A969D10: jmp 0x3A969980
+. 468 3A969CFA 27
+. 8B 46 08 8B 55 84 89 42 08 8B 46 14 C1 E8 03 66 89 82 4E 01 00 00 E9 6B FC FF FF
+
+==== BB 469 (0x3A969997) in 8598B, out 47888B, BBs exec'd 0 ====
+ 0x3A969997: cmpl $0x6474E551, %eax
+ 0x3A96999C: jz-32 0x3A969C2C
+. 469 3A969997 11
+. 3D 51 E5 74 64 0F 84 8A 02 00 00
+
+==== BB 470 (0x3A969C2C) in 8609B, out 47948B, BBs exec'd 0 ====
+ 0x3A969C2C: movl 24(%esi),%ecx
+ 0x3A969C2F: movl %ecx,0xFFFFFF68(%ebp)
+ 0x3A969C35: jmp 0x3A969980
+. 470 3A969C2C 14
+. 8B 4E 18 89 8D 68 FF FF FF E9 46 FD FF FF
+
+==== BB 471 (0x3A9699DC) in 8623B, out 48008B, BBs exec'd 0 ====
+ 0x3A9699DC: movl 0xFFFFFF5C(%ebp),%eax
+ 0x3A9699E2: testl %eax,%eax
+ 0x3A9699E4: jz-32 0x3A969DD6
+. 471 3A9699DC 14
+. 8B 85 5C FF FF FF 85 C0 0F 84 EC 03 00 00
+
+==== BB 472 (0x3A9699EA) in 8637B, out 48083B, BBs exec'd 0 ====
+ 0x3A9699EA: movl 0xFFFFFF5C(%ebp),%ecx
+ 0x3A9699F0: movl 0xFFFFFF60(%ebp),%edi
+ 0x3A9699F6: leal (%ecx,%ecx,2), %eax
+ 0x3A9699F9: leal (%edi,%eax,8), %eax
+ 0x3A9699FC: movl (%edi),%edx
+ 0x3A9699FE: movl -12(%eax),%esi
+ 0x3A969A01: movl %eax,0xFFFFFF4C(%ebp)
+ 0x3A969A07: subl %edx,%esi
+ 0x3A969A09: cmpl $0x3, 0xFFFFFF78(%ebp)
+ 0x3A969A10: movl %esi,0xFFFFFF28(%ebp)
+ 0x3A969A16: jnz-32 0x3A96A1FB
+. 472 3A9699EA 50
+. 8B 8D 5C FF FF FF 8B BD 60 FF FF FF 8D 04 49 8D 04 C7 8B 17 8B 70 F4 89 85 4C FF FF FF 29 D6 83 BD 78 FF FF FF 03 89 B5 28 FF FF FF 0F 85 DF 07 00 00
+
+==== BB 473 (0x3A969A1C) in 8687B, out 48261B, BBs exec'd 0 ====
+ 0x3A969A1C: movl 0xFFFFFD78(%ebx),%eax
+ 0x3A969A22: andl %eax,%edx
+ 0x3A969A24: movl 16(%edi),%eax
+ 0x3A969A27: movl %eax,20(%esp,,)
+ 0x3A969A2B: movl -116(%ebp),%eax
+ 0x3A969A2E: movl %eax,16(%esp,,)
+ 0x3A969A32: movl $0x2,%eax
+ 0x3A969A37: movl %eax,12(%esp,,)
+ 0x3A969A3B: movl 20(%edi),%eax
+ 0x3A969A3E: movl %edx,(%esp,,)
+ 0x3A969A41: movl %esi,4(%esp,,)
+ 0x3A969A45: movl %eax,8(%esp,,)
+ 0x3A969A49: call 0x3A974C50
+. 473 3A969A1C 50
+. 8B 83 78 FD FF FF 21 C2 8B 47 10 89 44 24 14 8B 45 8C 89 44 24 10 B8 02 00 00 00 89 44 24 0C 8B 47 14 89 14 24 89 74 24 04 89 44 24 08 E8 02 B2 00 00
+
+==== BB 474 (0x3A969A4E) in 8737B, out 48446B, BBs exec'd 0 ====
+ 0x3A969A4E: movl -124(%ebp),%edx
+ 0x3A969A51: movl %eax,0x194(%edx)
+ 0x3A969A57: incl %eax
+ 0x3A969A58: jz-32 0x3A969BF6
+. 474 3A969A4E 16
+. 8B 55 84 89 82 94 01 00 00 40 0F 84 98 01 00 00
+
+==== BB 475 (0x3A969A5E) in 8753B, out 48537B, BBs exec'd 0 ====
+ 0x3A969A5E: movl 0xFFFFFC40(%ebx),%esi
+ 0x3A969A64: testl %esi,%esi
+ 0x3A969A66: jnz-32 0x3A96A06A
+. 475 3A969A5E 14
+. 8B B3 40 FC FF FF 85 F6 0F 85 FE 05 00 00
+
+==== BB 476 (0x3A96A06A) in 8767B, out 48612B, BBs exec'd 0 ====
+ 0x3A96A06A: movl $0x3,%ecx
+ 0x3A96A06F: movl %ecx,8(%esp,,)
+ 0x3A96A073: movl 0xFFFFFF28(%ebp),%ecx
+ 0x3A96A079: movl %ecx,4(%esp,,)
+ 0x3A96A07D: movl -124(%ebp),%esi
+ 0x3A96A080: movl 0x194(%esi),%eax
+ 0x3A96A086: movl %eax,(%esp,,)
+ 0x3A96A089: call 0x3A974D10
+. 476 3A96A06A 36
+. B9 03 00 00 00 89 4C 24 08 8B 8D 28 FF FF FF 89 4C 24 04 8B 75 84 8B 86 94 01 00 00 89 04 24 E8 82 AC 00 00
+
+==== BB 477 madvise(0x3A974D10) in 8803B, out 48741B, BBs exec'd 0 ====
+ 0x3A974D10: pushl %ebx
+ 0x3A974D11: movl 16(%esp,,),%edx
+ 0x3A974D15: movl 12(%esp,,),%ecx
+ 0x3A974D19: movl 8(%esp,,),%ebx
+ 0x3A974D1D: movl $0xDB,%eax
+ 0x3A974D22: int $0x80
+. 477 3A974D10 20
+. 53 8B 54 24 10 8B 4C 24 0C 8B 5C 24 08 B8 DB 00 00 00 CD 80
+
+==== BB 478 (0x3A974D24) in 8823B, out 48837B, BBs exec'd 0 ====
+ 0x3A974D24: popl %ebx
+ 0x3A974D25: cmpl $0xFFFFF001, %eax
+ 0x3A974D2A: jnb-8 0x3A974D2D
+. 478 3A974D24 8
+. 5B 3D 01 F0 FF FF 73 01
+
+==== BB 479 (0x3A974D2C) in 8831B, out 48916B, BBs exec'd 0 ====
+ 0x3A974D2C: ret
+. 479 3A974D2C 1
+. C3
+
+==== BB 480 (0x3A96A08E) in 8832B, out 48946B, BBs exec'd 0 ====
+ 0x3A96A08E: jmp 0x3A969A6C
+. 480 3A96A08E 5
+. E9 D9 F9 FF FF
+
+==== BB 481 (0x3A969A6C) in 8837B, out 48974B, BBs exec'd 0 ====
+ 0x3A969A6C: movl -124(%ebp),%edx
+ 0x3A969A6F: movl 0xFFFFFF28(%ebp),%ecx
+ 0x3A969A75: movl -124(%ebp),%esi
+ 0x3A969A78: movl 0x194(%edx),%eax
+ 0x3A969A7E: leal (%ecx,%eax,1), %edx
+ 0x3A969A81: movl %edx,0x198(%esi)
+ 0x3A969A87: movl (%edi),%edx
+ 0x3A969A89: subl %edx,%eax
+ 0x3A969A8B: cmpb $0x0, 0xFFFFFF5B(%ebp)
+ 0x3A969A92: movl %eax,(%esi)
+ 0x3A969A94: jnz-32 0x3A96A093
+. 481 3A969A6C 46
+. 8B 55 84 8B 8D 28 FF FF FF 8B 75 84 8B 82 94 01 00 00 8D 14 01 89 96 98 01 00 00 8B 17 29 D0 80 BD 5B FF FF FF 00 89 06 0F 85 F9 05 00 00
+
+==== BB 482 (0x3A969A9A) in 8883B, out 49142B, BBs exec'd 0 ====
+ 0x3A969A9A: movl -124(%ebp),%ecx
+ 0x3A969A9D: movl 0x144(%ecx),%eax
+ 0x3A969AA3: testl %eax,%eax
+ 0x3A969AA5: jnz-8 0x3A969AF0
+. 482 3A969A9A 13
+. 8B 4D 84 8B 81 44 01 00 00 85 C0 75 49
+
+==== BB 483 (0x3A969AA7) in 8896B, out 49230B, BBs exec'd 0 ====
+ 0x3A969AA7: movl -128(%ebp),%eax
+ 0x3A969AAA: movl 16(%edi),%esi
+ 0x3A969AAD: movl 28(%eax),%ecx
+ 0x3A969AB0: movl %esi,0xFFFFFF48(%ebp)
+ 0x3A969AB6: cmpl %ecx,%esi
+ 0x3A969AB8: jnbe-8 0x3A969AF0
+. 483 3A969AA7 19
+. 8B 45 80 8B 77 10 8B 48 1C 89 B5 48 FF FF FF 39 CE 77 36
+
+==== BB 484 (0x3A969ABA) in 8915B, out 49341B, BBs exec'd 0 ====
+ 0x3A969ABA: movzwl 44(%eax),%eax
+ 0x3A969ABE: movl (%edi),%esi
+ 0x3A969AC0: movl 4(%edi),%edx
+ 0x3A969AC3: movl %esi,0xFFFFFF44(%ebp)
+ 0x3A969AC9: shll $0x5, %eax
+ 0x3A969ACC: subl %esi,%edx
+ 0x3A969ACE: addl 0xFFFFFF48(%ebp),%edx
+ 0x3A969AD4: leal (%eax,%ecx,1), %eax
+ 0x3A969AD7: cmpl %eax,%edx
+ 0x3A969AD9: jb-8 0x3A969AF0
+. 484 3A969ABA 33
+. 0F B7 40 2C 8B 37 8B 57 04 89 B5 44 FF FF FF C1 E0 05 29 F2 03 95 48 FF FF FF 8D 04 08 39 C2 72 15
+
+==== BB 485 (0x3A969ADB) in 8948B, out 49491B, BBs exec'd 0 ====
+ 0x3A969ADB: movl %esi,%eax
+ 0x3A969ADD: movl -124(%ebp),%edx
+ 0x3A969AE0: addl %ecx,%eax
+ 0x3A969AE2: movl 0xFFFFFF48(%ebp),%ecx
+ 0x3A969AE8: subl %ecx,%eax
+ 0x3A969AEA: movl %eax,0x144(%edx)
+ 0x3A969AF0: movl 12(%edi),%ecx
+ 0x3A969AF3: movl 8(%edi),%edx
+ 0x3A969AF6: cmpl %edx,%ecx
+ 0x3A969AF8: jbe-32 0x3A969B8D
+. 485 3A969ADB 35
+. 89 F0 8B 55 84 01 C8 8B 8D 48 FF FF FF 29 C8 89 82 44 01 00 00 8B 4F 0C 8B 57 08 39 D1 0F 86 8F 00 00 00
+
+==== BB 486 (0x3A969B8D) in 8983B, out 49635B, BBs exec'd 0 ====
+ 0x3A969B8D: movl 0xFFFFFF5C(%ebp),%esi
+ 0x3A969B93: addl $0x18, %edi
+ 0x3A969B96: movl 0xFFFFFF60(%ebp),%edx
+ 0x3A969B9C: leal (%esi,%esi,2), %eax
+ 0x3A969B9F: leal (%edx,%eax,8), %eax
+ 0x3A969BA2: cmpl %eax,%edi
+ 0x3A969BA4: jnb-32 0x3A969DE4
+. 486 3A969B8D 29
+. 8B B5 5C FF FF FF 83 C7 18 8B 95 60 FF FF FF 8D 04 76 8D 04 C2 39 C7 0F 83 3A 02 00 00
+
+==== BB 487 (0x3A969BAA) in 9012B, out 49758B, BBs exec'd 0 ====
+ 0x3A969BAA: movl (%edi),%eax
+ 0x3A969BAC: cmpl %eax,4(%edi)
+ 0x3A969BAF: jbe-32 0x3A969A9A
+. 487 3A969BAA 11
+. 8B 07 39 47 04 0F 86 E5 FE FF FF
+
+==== BB 488 (0x3A969BB5) in 9023B, out 49830B, BBs exec'd 0 ====
+ 0x3A969BB5: movl 16(%edi),%eax
+ 0x3A969BB8: movl %eax,20(%esp,,)
+ 0x3A969BBC: movl -116(%ebp),%esi
+ 0x3A969BBF: movl $0x12,%eax
+ 0x3A969BC4: movl %eax,12(%esp,,)
+ 0x3A969BC8: movl %esi,16(%esp,,)
+ 0x3A969BCC: movl 20(%edi),%eax
+ 0x3A969BCF: movl %eax,8(%esp,,)
+ 0x3A969BD3: movl 4(%edi),%eax
+ 0x3A969BD6: movl (%edi),%esi
+ 0x3A969BD8: subl %esi,%eax
+ 0x3A969BDA: movl %eax,4(%esp,,)
+ 0x3A969BDE: movl -124(%ebp),%edx
+ 0x3A969BE1: movl (%edi),%eax
+ 0x3A969BE3: movl (%edx),%ecx
+ 0x3A969BE5: addl %ecx,%eax
+ 0x3A969BE7: movl %eax,(%esp,,)
+ 0x3A969BEA: call 0x3A974C50
+. 488 3A969BB5 58
+. 8B 47 10 89 44 24 14 8B 75 8C B8 12 00 00 00 89 44 24 0C 89 74 24 10 8B 47 14 89 44 24 08 8B 47 04 8B 37 29 F0 89 44 24 04 8B 55 84 8B 07 8B 0A 01 C8 89 04 24 E8 61 B0 00 00
+
+==== BB 489 (0x3A969BEF) in 9081B, out 50046B, BBs exec'd 0 ====
+ 0x3A969BEF: incl %eax
+ 0x3A969BF0: jnz-32 0x3A969A9A
+. 489 3A969BEF 7
+. 40 0F 85 A4 FE FF FF
+
+==== BB 490 (0x3A969AF0) in 9088B, out 50108B, BBs exec'd 0 ====
+ 0x3A969AF0: movl 12(%edi),%ecx
+ 0x3A969AF3: movl 8(%edi),%edx
+ 0x3A969AF6: cmpl %edx,%ecx
+ 0x3A969AF8: jbe-32 0x3A969B8D
+. 490 3A969AF0 14
+. 8B 4F 0C 8B 57 08 39 D1 0F 86 8F 00 00 00
+
+==== BB 491 (0x3A969AFE) in 9102B, out 50190B, BBs exec'd 0 ====
+ 0x3A969AFE: movl -124(%ebp),%esi
+ 0x3A969B01: movl 0xFFFFFC18(%ebx),%eax
+ 0x3A969B07: movl (%esi),%esi
+ 0x3A969B09: addl %esi,%edx
+ 0x3A969B0B: addl %esi,%ecx
+ 0x3A969B0D: movl %edx,0xFFFFFF40(%ebp)
+ 0x3A969B13: leal -1(%eax,%edx,1), %edx
+ 0x3A969B17: negl %eax
+ 0x3A969B19: movl %ecx,0xFFFFFF3C(%ebp)
+ 0x3A969B1F: andl %eax,%edx
+ 0x3A969B21: cmpl %edx,%ecx
+ 0x3A969B23: movl %edx,0xFFFFFF38(%ebp)
+ 0x3A969B29: jnb-8 0x3A969B31
+. 491 3A969AFE 45
+. 8B 75 84 8B 83 18 FC FF FF 8B 36 01 F2 01 F1 89 95 40 FF FF FF 8D 54 10 FF F7 D8 89 8D 3C FF FF FF 21 C2 39 D1 89 95 38 FF FF FF 73 06
+
+==== BB 492 (0x3A969B2B) in 9147B, out 50371B, BBs exec'd 0 ====
+ 0x3A969B2B: movl %ecx,0xFFFFFF38(%ebp)
+ 0x3A969B31: movl 0xFFFFFF40(%ebp),%ecx
+ 0x3A969B37: cmpl %ecx,0xFFFFFF38(%ebp)
+ 0x3A969B3D: jbe-8 0x3A969B7B
+. 492 3A969B2B 20
+. 89 8D 38 FF FF FF 8B 8D 40 FF FF FF 39 8D 38 FF FF FF 76 3C
+
+==== BB 493 (0x3A969B3F) in 9167B, out 50468B, BBs exec'd 0 ====
+ 0x3A969B3F: movl 20(%edi),%eax
+ 0x3A969B42: testb $0x2, %al
+ 0x3A969B44: jz-32 0x3A96A3D8
+. 493 3A969B3F 11
+. 8B 47 14 A8 02 0F 84 8E 08 00 00
+
+==== BB 494 (0x3A969B4A) in 9178B, out 50550B, BBs exec'd 0 ====
+ 0x3A969B4A: movl 0xFFFFFF38(%ebp),%eax
+ 0x3A969B50: movl 0xFFFFFF40(%ebp),%edx
+ 0x3A969B56: subl %edx,%eax
+ 0x3A969B58: movl %eax,8(%esp,,)
+ 0x3A969B5C: xorl %eax, %eax
+ 0x3A969B5E: movl %eax,4(%esp,,)
+ 0x3A969B62: movl 0xFFFFFF40(%ebp),%esi
+ 0x3A969B68: movl %esi,(%esp,,)
+ 0x3A969B6B: call 0x3A975700
+. 494 3A969B4A 38
+. 8B 85 38 FF FF FF 8B 95 40 FF FF FF 29 D0 89 44 24 08 31 C0 89 44 24 04 8B B5 40 FF FF FF 89 34 24 E8 90 BB 00 00
+
+==== BB 495 memset(0x3A975700) in 9216B, out 50694B, BBs exec'd 0 ====
+ 0x3A975700: pushl %edi
+ 0x3A975701: movl 8(%esp,,),%edi
+ 0x3A975705: movl 16(%esp,,),%edx
+ 0x3A975709: movb 12(%esp,,),%al
+ 0x3A97570D: movb %al,%ah{sp}
+ 0x3A97570F: movl %eax,%ecx
+ 0x3A975711: shll $0x10, %eax
+ 0x3A975714: movw %cx,%ax
+ 0x3A975717: cld
+ 0x3A975718: cmpl $0x24, %edx
+ 0x3A97571B: movl %edx,%ecx
+ 0x3A97571D: jl-8 0x3A975756
+. 495 3A975700 31
+. 57 8B 7C 24 08 8B 54 24 10 8A 44 24 0C 88 C4 89 C1 C1 E0 10 66 89 C8 FC 83 FA 24 89 D1 7C 37
+
+==== BB 496 (0x3A975756) in 9247B, out 50876B, BBs exec'd 0 ====
+ 0x3A975756: shrl $0x2, %ecx
+ 0x3A975759: rep stosl
+. 496 3A975756 5
+. C1 E9 02 F3 AB
+
+==== BB 497 (0x3A975759) in 9252B, out 50973B, BBs exec'd 0 ====
+ 0x3A975759: rep stosl
+. 497 3A975759 2
+. F3 AB
+
+==== BB 498 (0x3A97575B) in 9254B, out 51060B, BBs exec'd 0 ====
+ 0x3A97575B: movl %edx,%ecx
+ 0x3A97575D: andl $0x3, %ecx
+ 0x3A975760: rep stosb
+. 498 3A97575B 7
+. 89 D1 83 E1 03 F3 AA
+
+==== BB 499 (0x3A975762) in 9261B, out 51162B, BBs exec'd 0 ====
+ 0x3A975762: movl 8(%esp,,),%eax
+ 0x3A975766: popl %edi
+ 0x3A975767: ret
+. 499 3A975762 6
+. 8B 44 24 08 5F C3
+
+==== BB 500 (0x3A969B70) in 9267B, out 51221B, BBs exec'd 0 ====
+ 0x3A969B70: movl 20(%edi),%eax
+ 0x3A969B73: testb $0x2, %al
+ 0x3A969B75: jz-32 0x3A96A3B2
+. 500 3A969B70 11
+. 8B 47 14 A8 02 0F 84 37 08 00 00
+
+==== BB 501 (0x3A969B7B) in 9278B, out 51303B, BBs exec'd 0 ====
+ 0x3A969B7B: movl 0xFFFFFF38(%ebp),%eax
+ 0x3A969B81: cmpl %eax,0xFFFFFF3C(%ebp)
+ 0x3A969B87: jnbe-32 0x3A96A171
+. 501 3A969B7B 18
+. 8B 85 38 FF FF FF 39 85 3C FF FF FF 0F 87 E4 05 00 00
+
+==== BB 502 (0x3A969DE4) in 9296B, out 51384B, BBs exec'd 0 ====
+ 0x3A969DE4: movl -124(%ebp),%ecx
+ 0x3A969DE7: movl 0x144(%ecx),%eax
+ 0x3A969DED: testl %eax,%eax
+ 0x3A969DEF: jz-32 0x3A96A0E8
+. 502 3A969DE4 17
+. 8B 4D 84 8B 81 44 01 00 00 85 C0 0F 84 F3 02 00 00
+
+==== BB 503 (0x3A969DF5) in 9313B, out 51472B, BBs exec'd 0 ====
+ 0x3A969DF5: movl -124(%ebp),%ecx
+ 0x3A969DF8: movl (%ecx),%esi
+ 0x3A969DFA: addl %esi,%eax
+ 0x3A969DFC: movl %eax,0x144(%ecx)
+ 0x3A969E02: movl 0xFFFFFF64(%ebp),%esp
+ 0x3A969E08: movl -116(%ebp),%esi
+ 0x3A969E0B: movl %esi,(%esp,,)
+ 0x3A969E0E: call 0x3A974470
+. 503 3A969DF5 30
+. 8B 4D 84 8B 31 01 F0 89 81 44 01 00 00 8B A5 64 FF FF FF 8B 75 8C 89 34 24 E8 5D A6 00 00
+
+==== BB 504 close(0x3A974470) in 9343B, out 51605B, BBs exec'd 0 ====
+ 0x3A974470: movl %ebx,%edx
+ 0x3A974472: movl 4(%esp,,),%ebx
+ 0x3A974476: movl $0x6,%eax
+ 0x3A97447B: int $0x80
+. 504 3A974470 13
+. 89 DA 8B 5C 24 04 B8 06 00 00 00 CD 80
+
+==== BB 505 (0x3A97447D) in 9356B, out 51669B, BBs exec'd 0 ====
+ 0x3A97447D: movl %edx,%ebx
+ 0x3A97447F: cmpl $0xFFFFF001, %eax
+ 0x3A974484: jnb-8 0x3A974487
+. 505 3A97447D 9
+. 89 D3 3D 01 F0 FF FF 73 01
+
+==== BB 506 (0x3A974486) in 9365B, out 51739B, BBs exec'd 0 ====
+ 0x3A974486: ret
+. 506 3A974486 1
+. C3
+
+==== BB 507 (0x3A969E13) in 9366B, out 51769B, BBs exec'd 0 ====
+ 0x3A969E13: movl $0xFFFFFFFF, -116(%ebp)
+ 0x3A969E1A: movl -124(%ebp),%eax
+ 0x3A969E1D: movzbl 0x174(%eax),%ecx
+ 0x3A969E24: movb %cl,%al
+ 0x3A969E26: andb $0x3, %al
+ 0x3A969E28: decb %al
+ 0x3A969E2A: setz %dl
+ 0x3A969E2D: cmpl $0x2, 0xFFFFFF78(%ebp)
+ 0x3A969E34: setz %al
+ 0x3A969E37: andl %edx,%eax
+ 0x3A969E39: testb $0x1, %al
+ 0x3A969E3B: jz-8 0x3A969E49
+. 507 3A969E13 42
+. C7 45 8C FF FF FF FF 8B 45 84 0F B6 88 74 01 00 00 88 C8 24 03 FE C8 0F 94 C2 83 BD 78 FF FF FF 02 0F 94 C0 21 D0 A8 01 74 0C
+
+==== BB 508 (0x3A969E49) in 9408B, out 51975B, BBs exec'd 0 ====
+ 0x3A969E49: movl -124(%ebp),%ecx
+ 0x3A969E4C: movl 8(%ecx),%eax
+ 0x3A969E4F: testl %eax,%eax
+ 0x3A969E51: jnz-32 0x3A96A0D9
+. 508 3A969E49 14
+. 8B 4D 84 8B 41 08 85 C0 0F 85 82 02 00 00
+
+==== BB 509 (0x3A96A0D9) in 9422B, out 52060B, BBs exec'd 0 ====
+ 0x3A96A0D9: movl -124(%ebp),%esi
+ 0x3A96A0DC: movl (%esi),%edx
+ 0x3A96A0DE: addl %edx,%eax
+ 0x3A96A0E0: movl %eax,8(%esi)
+ 0x3A96A0E3: jmp 0x3A969E6F
+. 509 3A96A0D9 15
+. 8B 75 84 8B 16 01 D0 89 46 08 E9 87 FD FF FF
+
+==== BB 510 (0x3A969E6F) in 9437B, out 52140B, BBs exec'd 0 ====
+ 0x3A969E6F: movl -124(%ebp),%ecx
+ 0x3A969E72: addl %edx,0x148(%ecx)
+ 0x3A969E78: testb $0x40, 0xFFFFFC14(%ebx)
+ 0x3A969E7F: jnz-32 0x3A96A230
+. 510 3A969E6F 22
+. 8B 4D 84 01 91 48 01 00 00 F6 83 14 FC FF FF 40 0F 85 AB 03 00 00
+
+==== BB 511 (0x3A969E85) in 9459B, out 52245B, BBs exec'd 0 ====
+ 0x3A969E85: movl -124(%ebp),%eax
+ 0x3A969E88: movl 8(%eax),%esi
+ 0x3A969E8B: testl %esi,%esi
+ 0x3A969E8D: jz-32 0x3A969F9E
+. 511 3A969E85 14
+. 8B 45 84 8B 70 08 85 F6 0F 84 0B 01 00 00
+
+==== BB 512 (0x3A969E93) in 9473B, out 52330B, BBs exec'd 0 ====
+ 0x3A969E93: movl (%esi),%edx
+ 0x3A969E95: movl %eax,%edi
+ 0x3A969E97: addl $0x18, %edi
+ 0x3A969E9A: testl %edx,%edx
+ 0x3A969E9C: jnz-8 0x3A969EAE
+. 512 3A969E93 11
+. 8B 16 89 C7 83 C7 18 85 D2 75 10
+
+==== BB 513 (0x3A969EAE) in 9484B, out 52416B, BBs exec'd 0 ====
+ 0x3A969EAE: cmpl $0x21, %edx
+ 0x3A969EB1: jle-8 0x3A969EA0
+. 513 3A969EAE 5
+. 83 FA 21 7E ED
+
+==== BB 514 (0x3A969EA0) in 9489B, out 52473B, BBs exec'd 0 ====
+ 0x3A969EA0: movl %esi,(%edi,%edx,4)
+ 0x3A969EA3: addl $0x8, %esi
+ 0x3A969EA6: movl (%esi),%eax
+ 0x3A969EA8: testl %eax,%eax
+ 0x3A969EAA: movl %eax,%edx
+ 0x3A969EAC: jz-8 0x3A969EE6
+. 514 3A969EA0 14
+. 89 34 97 83 C6 08 8B 06 85 C0 89 C2 74 38
+
+==== BB 515 (0x3A969EB3) in 9503B, out 52576B, BBs exec'd 0 ====
+ 0x3A969EB3: movl $0x6FFFFFFF,%eax
+ 0x3A969EB8: subl %edx,%eax
+ 0x3A969EBA: cmpl $0xF, %eax
+ 0x3A969EBD: jnbe-8 0x3A969ECB
+. 515 3A969EB3 12
+. B8 FF FF FF 6F 29 D0 83 F8 0F 77 0C
+
+==== BB 516 (0x3A969EBF) in 9515B, out 52649B, BBs exec'd 0 ====
+ 0x3A969EBF: movl $0x70000021,%eax
+ 0x3A969EC4: subl %edx,%eax
+ 0x3A969EC6: movl %esi,(%edi,%eax,4)
+ 0x3A969EC9: jmp-8 0x3A969EA3
+. 516 3A969EBF 12
+. B8 21 00 00 70 29 D0 89 34 87 EB D8
+
+==== BB 517 (0x3A969EA3) in 9527B, out 52717B, BBs exec'd 0 ====
+ 0x3A969EA3: addl $0x8, %esi
+ 0x3A969EA6: movl (%esi),%eax
+ 0x3A969EA8: testl %eax,%eax
+ 0x3A969EAA: movl %eax,%edx
+ 0x3A969EAC: jz-8 0x3A969EE6
+. 517 3A969EA3 11
+. 83 C6 08 8B 06 85 C0 89 C2 74 38
+
+==== BB 518 (0x3A969EE6) in 9538B, out 52803B, BBs exec'd 0 ====
+ 0x3A969EE6: movl -124(%ebp),%ecx
+ 0x3A969EE9: movl (%ecx),%edx
+ 0x3A969EEB: testl %edx,%edx
+ 0x3A969EED: jz-8 0x3A969F42
+. 518 3A969EE6 9
+. 8B 4D 84 8B 11 85 D2 74 53
+
+==== BB 519 (0x3A969EEF) in 9547B, out 52885B, BBs exec'd 0 ====
+ 0x3A969EEF: movl 16(%edi),%eax
+ 0x3A969EF2: testl %eax,%eax
+ 0x3A969EF4: jz-8 0x3A969EF9
+. 519 3A969EEF 7
+. 8B 47 10 85 C0 74 03
+
+==== BB 520 (0x3A969EF6) in 9554B, out 52957B, BBs exec'd 0 ====
+ 0x3A969EF6: addl %edx,4(%eax)
+ 0x3A969EF9: movl 12(%edi),%eax
+ 0x3A969EFC: testl %eax,%eax
+ 0x3A969EFE: jz-8 0x3A969F03
+. 520 3A969EF6 10
+. 01 50 04 8B 47 0C 85 C0 74 03
+
+==== BB 521 (0x3A969F00) in 9564B, out 53048B, BBs exec'd 0 ====
+ 0x3A969F00: addl %edx,4(%eax)
+ 0x3A969F03: movl 20(%edi),%eax
+ 0x3A969F06: testl %eax,%eax
+ 0x3A969F08: jz-8 0x3A969F0D
+. 521 3A969F00 10
+. 01 50 04 8B 47 14 85 C0 74 03
+
+==== BB 522 (0x3A969F0A) in 9574B, out 53139B, BBs exec'd 0 ====
+ 0x3A969F0A: addl %edx,4(%eax)
+ 0x3A969F0D: movl 24(%edi),%eax
+ 0x3A969F10: testl %eax,%eax
+ 0x3A969F12: jz-8 0x3A969F17
+. 522 3A969F0A 10
+. 01 50 04 8B 47 18 85 C0 74 03
+
+==== BB 523 (0x3A969F14) in 9584B, out 53230B, BBs exec'd 0 ====
+ 0x3A969F14: addl %edx,4(%eax)
+ 0x3A969F17: movl 28(%edi),%eax
+ 0x3A969F1A: testl %eax,%eax
+ 0x3A969F1C: jz-8 0x3A969F21
+. 523 3A969F14 10
+. 01 50 04 8B 47 1C 85 C0 74 03
+
+==== BB 524 (0x3A969F21) in 9594B, out 53321B, BBs exec'd 0 ====
+ 0x3A969F21: movl 68(%edi),%eax
+ 0x3A969F24: testl %eax,%eax
+ 0x3A969F26: jz-8 0x3A969F2B
+. 524 3A969F21 7
+. 8B 47 44 85 C0 74 03
+
+==== BB 525 (0x3A969F28) in 9601B, out 53393B, BBs exec'd 0 ====
+ 0x3A969F28: addl %edx,4(%eax)
+ 0x3A969F2B: movl 92(%edi),%eax
+ 0x3A969F2E: testl %eax,%eax
+ 0x3A969F30: jz-8 0x3A969F35
+. 525 3A969F28 10
+. 01 50 04 8B 47 5C 85 C0 74 03
+
+==== BB 526 (0x3A969F32) in 9611B, out 53484B, BBs exec'd 0 ====
+ 0x3A969F32: addl %edx,4(%eax)
+ 0x3A969F35: movl 0xC4(%edi),%eax
+ 0x3A969F3B: testl %eax,%eax
+ 0x3A969F3D: jz-8 0x3A969F42
+. 526 3A969F32 13
+. 01 50 04 8B 87 C4 00 00 00 85 C0 74 03
+
+==== BB 527 (0x3A969F3F) in 9624B, out 53578B, BBs exec'd 0 ====
+ 0x3A969F3F: addl %edx,4(%eax)
+ 0x3A969F42: movl 120(%edi),%edx
+ 0x3A969F45: testl %edx,%edx
+ 0x3A969F47: jz-8 0x3A969F73
+. 527 3A969F3F 10
+. 01 50 04 8B 57 78 85 D2 74 2A
+
+==== BB 528 (0x3A969F73) in 9634B, out 53669B, BBs exec'd 0 ====
+ 0x3A969F73: movl 0x98(%edi),%edx
+ 0x3A969F79: testl %edx,%edx
+ 0x3A969F7B: jz-8 0x3A969F90
+. 528 3A969F73 10
+. 8B 97 98 00 00 00 85 D2 74 13
+
+==== BB 529 (0x3A969F7D) in 9644B, out 53744B, BBs exec'd 0 ====
+ 0x3A969F7D: movl 4(%edx),%eax
+ 0x3A969F80: movl -124(%ebp),%esi
+ 0x3A969F83: testb $0x1, %al
+ 0x3A969F85: movl %eax,0x1E8(%esi)
+ 0x3A969F8B: jz-8 0x3A969F90
+. 529 3A969F7D 16
+. 8B 42 04 8B 75 84 A8 01 89 86 E8 01 00 00 74 03
+
+==== BB 530 (0x3A969F90) in 9660B, out 53854B, BBs exec'd 0 ====
+ 0x3A969F90: movl 116(%edi),%eax
+ 0x3A969F93: testl %eax,%eax
+ 0x3A969F95: jz-8 0x3A969F9E
+. 530 3A969F90 7
+. 8B 47 74 85 C0 74 07
+
+==== BB 531 (0x3A969F9E) in 9667B, out 53926B, BBs exec'd 0 ====
+ 0x3A969F9E: movl -124(%ebp),%eax
+ 0x3A969FA1: testb $0x40, 0x1E8(%eax)
+ 0x3A969FA8: jnz-32 0x3A96A336
+. 531 3A969F9E 16
+. 8B 45 84 F6 80 E8 01 00 00 40 0F 85 88 03 00 00
+
+==== BB 532 (0x3A969FAE) in 9683B, out 54017B, BBs exec'd 0 ====
+ 0x3A969FAE: movl -124(%ebp),%eax
+ 0x3A969FB1: movl 40(%eax),%edx
+ 0x3A969FB4: testl %edx,%edx
+ 0x3A969FB6: jnz-32 0x3A96A1DA
+. 532 3A969FAE 14
+. 8B 45 84 8B 50 28 85 D2 0F 85 1E 02 00 00
+
+==== BB 533 (0x3A96A1DA) in 9697B, out 54102B, BBs exec'd 0 ====
+ 0x3A96A1DA: call 0x3A96BD80
+. 533 3A96A1DA 5
+. E8 A1 1B 00 00
+
+==== BB 534 (0x3A96A1DF) in 9702B, out 54147B, BBs exec'd 0 ====
+ 0x3A96A1DF: nop
+ 0x3A96A1E0: jmp 0x3A969FBC
+. 534 3A96A1DF 6
+. 90 E9 D7 FD FF FF
+
+==== BB 535 (0x3A969FBC) in 9708B, out 54179B, BBs exec'd 0 ====
+ 0x3A969FBC: movl -124(%ebp),%edx
+ 0x3A969FBF: movl 88(%edx),%eax
+ 0x3A969FC2: testl %eax,%eax
+ 0x3A969FC4: jnz-32 0x3A96A2AF
+. 535 3A969FBC 14
+. 8B 55 84 8B 42 58 85 C0 0F 85 E5 02 00 00
+
+==== BB 536 (0x3A969FCA) in 9722B, out 54264B, BBs exec'd 0 ====
+ 0x3A969FCA: movl -124(%ebp),%eax
+ 0x3A969FCD: testb $0x20, 0x1E8(%eax)
+ 0x3A969FD4: jz-8 0x3A969FDC
+. 536 3A969FCA 12
+. 8B 45 84 F6 80 E8 01 00 00 20 74 06
+
+==== BB 537 (0x3A969FD6) in 9734B, out 54355B, BBs exec'd 0 ====
+ 0x3A969FD6: movl %eax,0xFFFFF9CC(%ebx)
+ 0x3A969FDC: movl -108(%ebp),%eax
+ 0x3A969FDF: movl -104(%ebp),%edx
+ 0x3A969FE2: movl -124(%ebp),%ecx
+ 0x3A969FE5: movl %eax,0x1BC(%ecx)
+ 0x3A969FEB: movl %edx,0x1C0(%ecx)
+ 0x3A969FF1: movl -20(%ebp),%eax
+ 0x3A969FF4: movl -16(%ebp),%edx
+ 0x3A969FF7: movl %eax,0x1C4(%ecx)
+ 0x3A969FFD: movl 0xFFFFFC00(%ebx),%eax
+ 0x3A96A003: movl %edx,0x1C8(%ecx)
+ 0x3A96A009: notl %eax
+ 0x3A96A00B: andl %eax,0xFFFFFF68(%ebp)
+ 0x3A96A011: testb $0x1, 0xFFFFFF68(%ebp)
+ 0x3A96A018: jnz-32 0x3A96A390
+. 537 3A969FD6 72
+. 89 83 CC F9 FF FF 8B 45 94 8B 55 98 8B 4D 84 89 81 BC 01 00 00 89 91 C0 01 00 00 8B 45 EC 8B 55 F0 89 81 C4 01 00 00 8B 83 00 FC FF FF 89 91 C8 01 00 00 F7 D0 21 85 68 FF FF FF F6 85 68 FF FF FF 01 0F 85 72 03 00 00
+
+==== BB 538 (0x3A96A01E) in 9806B, out 54595B, BBs exec'd 0 ====
+ 0x3A96A01E: movl 0xFFFFFD7C(%ebx),%edi
+ 0x3A96A024: testl %edi,%edi
+ 0x3A96A026: jz-32 0x3A969DC3
+. 538 3A96A01E 14
+. 8B BB 7C FD FF FF 85 FF 0F 84 97 FD FF FF
+
+==== BB 539 (0x3A969DC3) in 9820B, out 54670B, BBs exec'd 0 ====
+ 0x3A969DC3: movl -124(%ebp),%eax
+ 0x3A969DC6: leal -12(%ebp), %esp
+ 0x3A969DC9: popl %ebx
+ 0x3A969DCA: popl %esi
+ 0x3A969DCB: popl %edi
+ 0x3A969DCC: popl %ebp
+ 0x3A969DCD: ret
+. 539 3A969DC3 11
+. 8B 45 84 8D 65 F4 5B 5E 5F 5D C3
+
+==== BB 540 (0x3A96B07E) in 9831B, out 54785B, BBs exec'd 0 ====
+ 0x3A96B07E: leal -12(%ebp), %esp
+ 0x3A96B081: popl %ebx
+ 0x3A96B082: popl %esi
+ 0x3A96B083: popl %edi
+ 0x3A96B084: popl %ebp
+ 0x3A96B085: ret 12
+. 540 3A96B07E 10
+. 8D 65 F4 5B 5E 5F 5D C2 0C 00
+
+==== BB 541 (0x3A967C70) in 9841B, out 54887B, BBs exec'd 0 ====
+ 0x3A967C70: movl 0x170(%eax),%edx
+ 0x3A967C76: subl $0xC, %esp
+ 0x3A967C79: incl %edx
+ 0x3A967C7A: movl %edx,0x170(%eax)
+ 0x3A967C80: xorl %eax, %eax
+ 0x3A967C82: cmpl $0x1, %edx
+ 0x3A967C85: setz %al
+ 0x3A967C88: addl %eax,0xFFFFFF10(%ebp)
+ 0x3A967C8E: jmp-8 0x3A967C1C
+. 541 3A967C70 32
+. 8B 90 70 01 00 00 83 EC 0C 42 89 90 70 01 00 00 31 C0 83 FA 01 0F 94 C0 01 85 10 FF FF FF EB 8C
+
+==== BB 542 (0x3A967C1C) in 9873B, out 55022B, BBs exec'd 0 ====
+ 0x3A967C1C: movl 0xFFFFFE60(%ebp),%ecx
+ 0x3A967C22: movl %edi,(%esp,,)
+ 0x3A967C25: movl %ecx,4(%esp,,)
+ 0x3A967C29: call 0x3A973530
+. 542 3A967C1C 18
+. 8B 8D 60 FE FF FF 89 3C 24 89 4C 24 04 E8 02 B9 00 00
+
+==== BB 543 (0x3A96692A) in 9891B, out 55106B, BBs exec'd 0 ====
+ 0x3A96692A: movl 0xFFFFEC7E(%ebx),%eax
+ 0x3A966930: leal -76(%ebp), %esi
+ 0x3A966933: movl $0x3,%ecx
+ 0x3A966938: movl %esi,0xFFFFFECC(%ebp)
+ 0x3A96693E: leal 0xFFFFFF38(%ebp), %edx
+ 0x3A966944: movl %eax,-76(%ebp)
+ 0x3A966947: movl 0xFFFFEC82(%ebx),%eax
+ 0x3A96694D: movl %eax,-72(%ebp)
+ 0x3A966950: movl 0xFFFFEC86(%ebx),%eax
+ 0x3A966956: movl %eax,-68(%ebp)
+ 0x3A966959: movl 0xFFFFEC8A(%ebx),%eax
+ 0x3A96695F: movl %eax,-64(%ebp)
+ 0x3A966962: movzwl 0xFFFFEC8E(%ebx),%eax
+ 0x3A966969: movw %ax,-60(%ebp)
+ 0x3A96696D: movzbl 0xFFFFEC90(%ebx),%eax
+ 0x3A966974: movb %al,-58(%ebp)
+ 0x3A966977: movl %esi,%eax
+ 0x3A966979: call 0x3A971070
+. 543 3A96692A 84
+. 8B 83 7E EC FF FF 8D 75 B4 B9 03 00 00 00 89 B5 CC FE FF FF 8D 95 38 FF FF FF 89 45 B4 8B 83 82 EC FF FF 89 45 B8 8B 83 86 EC FF FF 89 45 BC 8B 83 8A EC FF FF 89 45 C0 0F B7 83 8E EC FF FF 66 89 45 C4 0F B6 83 90 EC FF FF 88 45 C6 89 F0 E8 F2 A6 00 00
+
+==== BB 544 _dl_sysdep_read_whole_file(0x3A971070) in 9975B, out 55364B, BBs exec'd 0 ====
+ 0x3A971070: pushl %ebp
+ 0x3A971071: movl %esp,%ebp
+ 0x3A971073: subl $0x8C, %esp
+ 0x3A971079: movl %esi,-8(%ebp)
+ 0x3A97107C: xorl %esi, %esi
+ 0x3A97107E: movl %ebx,-12(%ebp)
+ 0x3A971081: movl %edi,-4(%ebp)
+ 0x3A971084: movl %edx,%edi
+ 0x3A971086: movl %ecx,-112(%ebp)
+ 0x3A971089: movl $0xFFFFFFFF, -116(%ebp)
+ 0x3A971090: call 0x3A97592B
+. 544 3A971070 37
+. 55 89 E5 81 EC 8C 00 00 00 89 75 F8 31 F6 89 5D F4 89 7D FC 89 D7 89 4D 90 C7 45 8C FF FF FF FF E8 96 48 00 00
+
+==== BB 545 (0x3A971095) in 10012B, out 55543B, BBs exec'd 0 ====
+ 0x3A971095: addl $0x75D7, %ebx
+ 0x3A97109B: movl %esi,4(%esp,,)
+ 0x3A97109F: movl %eax,(%esp,,)
+ 0x3A9710A2: call 0x3A974430
+. 545 3A971095 18
+. 81 C3 D7 75 00 00 89 74 24 04 89 04 24 E8 89 33 00 00
+
+==== BB 546 (0x3A97444D) in 10030B, out 55631B, BBs exec'd 0 ====
+ 0x3A97444D: call 0x3A975927
+. 546 3A97444D 5
+. E8 D5 14 00 00
+
+==== BB 547 __i686.get_pc_thunk.cx(0x3A975927) in 10035B, out 55676B, BBs exec'd 0 ====
+ 0x3A975927: movl (%esp,,),%ecx
+ 0x3A97592A: ret
+. 547 3A975927 4
+. 8B 0C 24 C3
+
+==== BB 548 (0x3A974452) in 10039B, out 55716B, BBs exec'd 0 ====
+ 0x3A974452: addl $0x421A, %ecx
+ 0x3A974458: xorl %edx, %edx
+ 0x3A97445A: subl %eax,%edx
+ 0x3A97445C: movl %edx,0x148(%ecx)
+ 0x3A974462: orl $0xFFFFFFFF, %eax
+ 0x3A974465: jmp-8 0x3A97444C
+. 548 3A974452 21
+. 81 C1 1A 42 00 00 31 D2 29 C2 89 91 48 01 00 00 83 C8 FF EB E5
+
+==== BB 549 (0x3A9710A7) in 10060B, out 55815B, BBs exec'd 0 ====
+ 0x3A9710A7: testl %eax,%eax
+ 0x3A9710A9: movl %eax,%esi
+ 0x3A9710AB: js-8 0x3A9710D9
+. 549 3A9710A7 6
+. 85 C0 89 C6 78 2C
+
+==== BB 550 (0x3A9710D9) in 10066B, out 55881B, BBs exec'd 0 ====
+ 0x3A9710D9: movl -116(%ebp),%eax
+ 0x3A9710DC: movl -12(%ebp),%ebx
+ 0x3A9710DF: movl -8(%ebp),%esi
+ 0x3A9710E2: movl -4(%ebp),%edi
+ 0x3A9710E5: movl %ebp,%esp
+ 0x3A9710E7: popl %ebp
+ 0x3A9710E8: ret
+. 550 3A9710D9 16
+. 8B 45 8C 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 551 (0x3A96697E) in 10082B, out 55986B, BBs exec'd 0 ====
+ 0x3A96697E: movl %eax,0xFFFFFF0C(%ebp)
+ 0x3A966984: cmpl $0xFFFFFFFF, %eax
+ 0x3A966987: jnz-32 0x3A967E6E
+. 551 3A96697E 15
+. 89 85 0C FF FF FF 83 F8 FF 0F 85 E1 14 00 00
+
+==== BB 552 (0x3A96698D) in 10097B, out 56059B, BBs exec'd 0 ====
+ 0x3A96698D: movl 0xFFFFF994(%ebx),%eax
+ 0x3A966993: movl 0xA4(%eax),%edi
+ 0x3A966999: testl %edi,%edi
+ 0x3A96699B: jz-32 0x3A9674A5
+. 552 3A96698D 20
+. 8B 83 94 F9 FF FF 8B B8 A4 00 00 00 85 FF 0F 84 04 0B 00 00
+
+==== BB 553 (0x3A9669A1) in 10117B, out 56150B, BBs exec'd 0 ====
+ 0x3A9669A1: movl 0xFFFFFF10(%ebp),%esi
+ 0x3A9669A7: testl %esi,%esi
+ 0x3A9669A9: jnz-32 0x3A967E28
+. 553 3A9669A1 14
+. 8B B5 10 FF FF FF 85 F6 0F 85 79 14 00 00
+
+==== BB 554 (0x3A967E28) in 10131B, out 56225B, BBs exec'd 0 ====
+ 0x3A967E28: movl 0xFFFFFF10(%ebp),%esi
+ 0x3A967E2E: xorl %ecx, %ecx
+ 0x3A967E30: movl %ecx,0xFFFFFF04(%ebp)
+ 0x3A967E36: leal 0x10(,%esi,4), %eax
+ 0x3A967E3D: subl %eax,%esp
+ 0x3A967E3F: leal 47(%esp,,), %edx
+ 0x3A967E43: movl 0xFFFFF9F0(%ebx),%eax
+ 0x3A967E49: andl $0xFFFFFFF0, %edx
+ 0x3A967E4C: movl %edx,0xFFFFFF14(%ebp)
+ 0x3A967E52: movl 0xFFFFFF04(%ebp),%ecx
+ 0x3A967E58: movl %eax,(%edx,%ecx,4)
+ 0x3A967E5B: movl 12(%eax),%eax
+ 0x3A967E5E: incl %ecx
+ 0x3A967E5F: movl %ecx,0xFFFFFF04(%ebp)
+ 0x3A967E65: testl %eax,%eax
+ 0x3A967E67: jnz-8 0x3A967E52
+. 554 3A967E28 65
+. 8B B5 10 FF FF FF 31 C9 89 8D 04 FF FF FF 8D 04 B5 10 00 00 00 29 C4 8D 54 24 2F 8B 83 F0 F9 FF FF 83 E2 F0 89 95 14 FF FF FF 8B 8D 04 FF FF FF 89 04 8A 8B 40 0C 41 89 8D 04 FF FF FF 85 C0 75 E9
+
+==== BB 555 (0x3A967E69) in 10196B, out 56457B, BBs exec'd 0 ====
+ 0x3A967E69: jmp 0x3A9669AF
+. 555 3A967E69 5
+. E9 41 EB FF FF
+
+==== BB 556 (0x3A9669AF) in 10201B, out 56485B, BBs exec'd 0 ====
+ 0x3A9669AF: movl 0xFFFFFD94(%ebx),%esi
+ 0x3A9669B5: xorl %edi, %edi
+ 0x3A9669B7: movl %edi,0xFFFFFEC4(%ebp)
+ 0x3A9669BD: testl %esi,%esi
+ 0x3A9669BF: jz-32 0x3A967064
+. 556 3A9669AF 22
+. 8B B3 94 FD FF FF 31 FF 89 BD C4 FE FF FF 85 F6 0F 84 9F 06 00 00
+
+==== BB 557 (0x3A967064) in 10223B, out 56590B, BBs exec'd 0 ====
+ 0x3A967064: xorl %edx, %edx
+ 0x3A967066: movl 0xFFFFF994(%ebx),%eax
+ 0x3A96706C: movl %edx,4(%esp,,)
+ 0x3A967070: xorl %edx, %edx
+ 0x3A967072: cmpl $0x3, 0xFFFFFF50(%ebp)
+ 0x3A967079: setz %dl
+ 0x3A96707C: movl %edx,(%esp,,)
+ 0x3A96707F: movl 0xFFFFFF10(%ebp),%ecx
+ 0x3A967085: movl 0xFFFFFF14(%ebp),%edx
+ 0x3A96708B: call 0x3A96F1A0
+. 557 3A967064 44
+. 31 D2 8B 83 94 F9 FF FF 89 54 24 04 31 D2 83 BD 50 FF FF FF 03 0F 94 C2 89 14 24 8B 8D 10 FF FF FF 8B 95 14 FF FF FF E8 10 81 00 00
+
+==== BB 558 _dl_map_object_deps(0x3A96F1A0) in 10267B, out 56764B, BBs exec'd 0 ====
+ 0x3A96F1A0: pushl %ebp
+ 0x3A96F1A1: movl %esp,%ebp
+ 0x3A96F1A3: pushl %edi
+ 0x3A96F1A4: pushl %esi
+ 0x3A96F1A5: pushl %ebx
+ 0x3A96F1A6: subl $0xA0, %esp
+ 0x3A96F1AC: movl %eax,-64(%ebp)
+ 0x3A96F1AF: leal (%ecx,%ecx,2), %eax
+ 0x3A96F1B2: leal 0x28(,%eax,4), %eax
+ 0x3A96F1B9: movl %edx,-68(%ebp)
+ 0x3A96F1BC: subl %eax,%esp
+ 0x3A96F1BE: movl -64(%ebp),%edx
+ 0x3A96F1C1: movl %ecx,-72(%ebp)
+ 0x3A96F1C4: leal 31(%esp,,), %eax
+ 0x3A96F1C8: andl $0xFFFFFFF0, %eax
+ 0x3A96F1CB: movl %edx,4(%eax)
+ 0x3A96F1CE: movl -64(%ebp),%ecx
+ 0x3A96F1D1: leal 12(%eax), %edx
+ 0x3A96F1D4: movl %eax,-16(%ebp)
+ 0x3A96F1D7: movl $0x0, (%eax)
+ 0x3A96F1DD: movl %edx,8(%eax)
+ 0x3A96F1E0: movzbl 0x174(%ecx),%eax
+ 0x3A96F1E7: movl $0x1, -20(%ebp)
+ 0x3A96F1EE: call 0x3A97592B
+. 558 3A96F1A0 83
+. 55 89 E5 57 56 53 81 EC A0 00 00 00 89 45 C0 8D 04 49 8D 04 85 28 00 00 00 89 55 BC 29 C4 8B 55 C0 89 4D B8 8D 44 24 1F 83 E0 F0 89 50 04 8B 4D C0 8D 50 0C 89 45 F0 C7 00 00 00 00 00 89 50 08 0F B6 81 74 01 00 00 C7 45 EC 01 00 00 00 E8 38 67 00 00
+
+==== BB 559 (0x3A96F1F3) in 10350B, out 57096B, BBs exec'd 0 ====
+ 0x3A96F1F3: addl $0x9479, %ebx
+ 0x3A96F1F9: andb $0x9F, %al
+ 0x3A96F1FB: orb $0x20, %al
+ 0x3A96F1FD: movb %al,0x174(%ecx)
+ 0x3A96F203: movl -72(%ebp),%esi
+ 0x3A96F206: movl $0x0, -84(%ebp)
+ 0x3A96F20D: cmpl %esi,-84(%ebp)
+ 0x3A96F210: jnb-8 0x3A96F25A
+. 559 3A96F1F3 31
+. 81 C3 79 94 00 00 24 9F 0C 20 88 81 74 01 00 00 8B 75 B8 C7 45 AC 00 00 00 00 39 75 AC 73 48
+
+==== BB 560 (0x3A96F212) in 10381B, out 57264B, BBs exec'd 0 ====
+ 0x3A96F212: movl -84(%ebp),%eax
+ 0x3A96F215: movl -68(%ebp),%edx
+ 0x3A96F218: movl -20(%ebp),%esi
+ 0x3A96F21B: movl (%edx,%eax,4),%edi
+ 0x3A96F21E: movl -16(%ebp),%eax
+ 0x3A96F221: leal (%esi,%esi,2), %edx
+ 0x3A96F224: shll $0x2, %edx
+ 0x3A96F227: incl %esi
+ 0x3A96F228: leal 12(%edx,%eax,1), %ecx
+ 0x3A96F22C: movl $0x0, (%eax,%edx,1)
+ 0x3A96F233: movl %ecx,8(%eax,%edx,1)
+ 0x3A96F237: movl %edi,4(%eax,%edx,1)
+ 0x3A96F23B: movzbl 0x174(%edi),%eax
+ 0x3A96F242: movl %esi,-20(%ebp)
+ 0x3A96F245: andb $0x9F, %al
+ 0x3A96F247: orb $0x20, %al
+ 0x3A96F249: movb %al,0x174(%edi)
+ 0x3A96F24F: movl -72(%ebp),%ecx
+ 0x3A96F252: incl -84(%ebp)
+ 0x3A96F255: cmpl %ecx,-84(%ebp)
+ 0x3A96F258: jb-8 0x3A96F212
+. 560 3A96F212 72
+. 8B 45 AC 8B 55 BC 8B 75 EC 8B 3C 82 8B 45 F0 8D 14 76 C1 E2 02 46 8D 4C 02 0C C7 04 10 00 00 00 00 89 4C 10 08 89 7C 10 04 0F B6 87 74 01 00 00 89 75 EC 24 9F 0C 20 88 87 74 01 00 00 8B 4D B8 FF 45 AC 39 4D AC 72 B8
+
+==== BB 561 (0x3A96F25A) in 10453B, out 57575B, BBs exec'd 0 ====
+ 0x3A96F25A: movl $0x0, -92(%ebp)
+ 0x3A96F261: movl -20(%ebp),%eax
+ 0x3A96F264: xorl %ecx, %ecx
+ 0x3A96F266: movl $0x0, -56(%ebp)
+ 0x3A96F26D: movl -16(%ebp),%edx
+ 0x3A96F270: movl 0x148(%ebx),%esi
+ 0x3A96F276: movl %ecx,0x148(%ebx)
+ 0x3A96F27C: leal (%eax,%eax,2), %eax
+ 0x3A96F27F: leal -12(%edx,%eax,4), %eax
+ 0x3A96F283: movl $0x0, 8(%eax)
+ 0x3A96F28A: testl %edx,%edx
+ 0x3A96F28C: movl %eax,-80(%ebp)
+ 0x3A96F28F: movl %esi,-88(%ebp)
+ 0x3A96F292: movl %edx,-76(%ebp)
+ 0x3A96F295: jz-32 0x3A96F605
+. 561 3A96F25A 65
+. C7 45 A4 00 00 00 00 8B 45 EC 31 C9 C7 45 C8 00 00 00 00 8B 55 F0 8B B3 48 01 00 00 89 8B 48 01 00 00 8D 04 40 8D 44 82 F4 C7 40 08 00 00 00 00 85 D2 89 45 B0 89 75 A8 89 55 B4 0F 84 6A 03 00 00
+
+==== BB 562 (0x3A96F29B) in 10518B, out 57809B, BBs exec'd 0 ====
+ 0x3A96F29B: movl $0x0, -100(%ebp)
+ 0x3A96F2A2: movl -76(%ebp),%eax
+ 0x3A96F2A5: movl -76(%ebp),%edx
+ 0x3A96F2A8: movl $0x0, -104(%ebp)
+ 0x3A96F2AF: movl 4(%eax),%eax
+ 0x3A96F2B2: movl $0x1, (%edx)
+ 0x3A96F2B8: movl 0x150(%eax),%edx
+ 0x3A96F2BE: movl %eax,-96(%ebp)
+ 0x3A96F2C1: testl %edx,%edx
+ 0x3A96F2C3: jnz-8 0x3A96F309
+. 562 3A96F29B 42
+. C7 45 9C 00 00 00 00 8B 45 B4 8B 55 B4 C7 45 98 00 00 00 00 8B 40 04 C7 02 01 00 00 00 8B 90 50 01 00 00 89 45 A0 85 D2 75 44
+
+==== BB 563 (0x3A96F2C5) in 10560B, out 57969B, BBs exec'd 0 ====
+ 0x3A96F2C5: movl 0x1D4(%eax),%eax
+ 0x3A96F2CB: movl -64(%ebp),%ecx
+ 0x3A96F2CE: testl %eax,%eax
+ 0x3A96F2D0: setz %al
+ 0x3A96F2D3: cmpl %ecx,-96(%ebp)
+ 0x3A96F2D6: setnz %dl
+ 0x3A96F2D9: andl %edx,%eax
+ 0x3A96F2DB: testb $0x1, %al
+ 0x3A96F2DD: jz-8 0x3A96F309
+. 563 3A96F2C5 26
+. 8B 80 D4 01 00 00 8B 4D C0 85 C0 0F 94 C0 39 4D A0 0F 95 C2 21 D0 A8 01 74 2A
+
+==== BB 564 (0x3A96F309) in 10586B, out 58126B, BBs exec'd 0 ====
+ 0x3A96F309: movl -96(%ebp),%edx
+ 0x3A96F30C: movl 28(%edx),%eax
+ 0x3A96F30F: testl %eax,%eax
+ 0x3A96F311: jnz-8 0x3A96F32B
+. 564 3A96F309 10
+. 8B 55 A0 8B 42 1C 85 C0 75 18
+
+==== BB 565 (0x3A96F32B) in 10596B, out 58211B, BBs exec'd 0 ====
+ 0x3A96F32B: movl -96(%ebp),%ecx
+ 0x3A96F32E: movl 8(%ebp),%esi
+ 0x3A96F331: movl -76(%ebp),%edx
+ 0x3A96F334: movl 44(%ecx),%eax
+ 0x3A96F337: movl 4(%eax),%eax
+ 0x3A96F33A: movl %ecx,-52(%ebp)
+ 0x3A96F33D: movl 8(%ecx),%ecx
+ 0x3A96F340: movl %eax,-108(%ebp)
+ 0x3A96F343: movl %eax,-40(%ebp)
+ 0x3A96F346: movl 12(%ebp),%eax
+ 0x3A96F349: movl %esi,-48(%ebp)
+ 0x3A96F34C: movl %edx,-112(%ebp)
+ 0x3A96F34F: movl %eax,-44(%ebp)
+ 0x3A96F352: movl (%ecx),%edx
+ 0x3A96F354: movl %ecx,-116(%ebp)
+ 0x3A96F357: testl %edx,%edx
+ 0x3A96F359: jnz-32 0x3A96F41C
+. 565 3A96F32B 52
+. 8B 4D A0 8B 75 08 8B 55 B4 8B 41 2C 8B 40 04 89 4D CC 8B 49 08 89 45 94 89 45 D8 8B 45 0C 89 75 D0 89 55 90 89 45 D4 8B 11 89 4D 8C 85 D2 0F 85 BD 00 00 00
+
+==== BB 566 (0x3A96F41C) in 10648B, out 58429B, BBs exec'd 0 ====
+ 0x3A96F41C: cmpl $0x1, %edx
+ 0x3A96F41F: jz-32 0x3A96F364
+. 566 3A96F41C 9
+. 83 FA 01 0F 84 3F FF FF FF
+
+==== BB 567 (0x3A96F364) in 10657B, out 58486B, BBs exec'd 0 ====
+ 0x3A96F364: movl -116(%ebp),%esi
+ 0x3A96F367: movl $0x24,%ecx
+ 0x3A96F36C: movl -108(%ebp),%edi
+ 0x3A96F36F: movl 4(%esi),%eax
+ 0x3A96F372: movl %ecx,4(%esp,,)
+ 0x3A96F376: addl %eax,%edi
+ 0x3A96F378: movl %edi,%esi
+ 0x3A96F37A: movl %edi,(%esp,,)
+ 0x3A96F37D: call 0x3A9750B0
+. 567 3A96F364 30
+. 8B 75 8C B9 24 00 00 00 8B 7D 94 8B 46 04 89 4C 24 04 01 C7 89 FE 89 3C 24 E8 2E 5D 00 00
+
+==== BB 568 (0x3A9750D0) in 10687B, out 58619B, BBs exec'd 0 ====
+ 0x3A9750D0: movb %dl,%cl
+ 0x3A9750D2: jp-8 0x3A9750FD
+. 568 3A9750D0 4
+. 88 D1 7A 29
+
+==== BB 569 (0x3A9750D4) in 10691B, out 58677B, BBs exec'd 0 ====
+ 0x3A9750D4: xorb (%eax),%cl
+ 0x3A9750D6: jz-32 0x3A97523D
+. 569 3A9750D4 8
+. 32 08 0F 84 61 01 00 00
+
+==== BB 570 (0x3A9750DC) in 10699B, out 58740B, BBs exec'd 0 ====
+ 0x3A9750DC: xorb %dl,%cl
+ 0x3A9750DE: jz-32 0x3A97526A
+. 570 3A9750DC 8
+. 30 D1 0F 84 86 01 00 00
+
+==== BB 571 (0x3A9750E4) in 10707B, out 58801B, BBs exec'd 0 ====
+ 0x3A9750E4: movb 1(%eax),%cl
+ 0x3A9750E7: incl %eax
+ 0x3A9750E8: cmpb %cl,%dl
+ 0x3A9750EA: jz-32 0x3A97523D
+. 571 3A9750E4 12
+. 8A 48 01 40 38 CA 0F 84 4D 01 00 00
+
+==== BB 572 (0x3A9750F0) in 10719B, out 58883B, BBs exec'd 0 ====
+ 0x3A9750F0: cmpb $0x0, %cl
+ 0x3A9750F3: jz-32 0x3A97526A
+. 572 3A9750F0 9
+. 80 F9 00 0F 84 71 01 00 00
+
+==== BB 573 (0x3A9750F9) in 10728B, out 58941B, BBs exec'd 0 ====
+ 0x3A9750F9: incl %eax
+ 0x3A9750FA: decl %edi
+ 0x3A9750FB: jnz-8 0x3A975111
+. 573 3A9750F9 4
+. 40 4F 75 14
+
+==== BB 574 (0x3A9750FD) in 10732B, out 59014B, BBs exec'd 0 ====
+ 0x3A9750FD: movb (%eax),%cl
+ 0x3A9750FF: cmpb %cl,%dl
+ 0x3A975101: jz-32 0x3A97523D
+. 574 3A9750FD 10
+. 8A 08 38 CA 0F 84 36 01 00 00
+
+==== BB 575 (0x3A975107) in 10742B, out 59088B, BBs exec'd 0 ====
+ 0x3A975107: cmpb $0x0, %cl
+ 0x3A97510A: jz-32 0x3A97526A
+. 575 3A975107 9
+. 80 F9 00 0F 84 5A 01 00 00
+
+==== BB 576 (0x3A975110) in 10751B, out 59146B, BBs exec'd 0 ====
+ 0x3A975110: incl %eax
+ 0x3A975111: movl (%eax),%ecx
+ 0x3A975113: movl $0xFEFEFEFF,%ebp
+ 0x3A975118: movl $0xFEFEFEFF,%edi
+ 0x3A97511D: addl %ecx,%ebp
+ 0x3A97511F: xorl %ecx,%ebp
+ 0x3A975121: addl %ecx,%edi
+ 0x3A975123: leal 4(%eax), %eax
+ 0x3A975126: jnb-32 0x3A975242
+. 576 3A975110 28
+. 40 8B 08 BD FF FE FE FE BF FF FE FE FE 01 CD 31 CD 01 CF 8D 40 04 0F 83 16 01 00 00
+
+==== BB 577 (0x3A97524E) in 10779B, out 59263B, BBs exec'd 0 ====
+ 0x3A97524E: incl %eax
+ 0x3A97524F: cmpb %dl,%ch{bp}
+ 0x3A975251: jz-8 0x3A97523D
+. 577 3A97524E 5
+. 40 38 D5 74 EA
+
+==== BB 578 (0x3A975253) in 10784B, out 59332B, BBs exec'd 0 ====
+ 0x3A975253: cmpb $0x0, %ch{bp}
+ 0x3A975256: jz-8 0x3A97526A
+. 578 3A975253 5
+. 80 FD 00 74 12
+
+==== BB 579 (0x3A975258) in 10789B, out 59390B, BBs exec'd 0 ====
+ 0x3A975258: shrl $0x10, %ecx
+ 0x3A97525B: incl %eax
+ 0x3A97525C: cmpb %dl,%cl
+ 0x3A97525E: jz-8 0x3A97523D
+. 579 3A975258 8
+. C1 E9 10 40 38 D1 74 DD
+
+==== BB 580 (0x3A975260) in 10797B, out 59472B, BBs exec'd 0 ====
+ 0x3A975260: cmpb $0x0, %cl
+ 0x3A975263: jz-8 0x3A97526A
+. 580 3A975260 5
+. 80 F9 00 74 05
+
+==== BB 581 (0x3A96F382) in 10802B, out 59530B, BBs exec'd 0 ====
+ 0x3A96F382: testl %eax,%eax
+ 0x3A96F384: jnz-32 0x3A96F8B4
+. 581 3A96F382 8
+. 85 C0 0F 85 2A 05 00 00
+
+==== BB 582 (0x3A96F38A) in 10810B, out 59589B, BBs exec'd 0 ====
+ 0x3A96F38A: movl %esi,-36(%ebp)
+ 0x3A96F38D: leal -52(%ebp), %eax
+ 0x3A96F390: leal -56(%ebp), %edx
+ 0x3A96F393: movl %eax,(%esp,,)
+ 0x3A96F396: leal 0xFFFF7834(%ebx), %ecx
+ 0x3A96F39C: leal -60(%ebp), %eax
+ 0x3A96F39F: call 0x3A9701D0
+. 582 3A96F38A 26
+. 89 75 DC 8D 45 CC 8D 55 C8 89 04 24 8D 8B 34 78 FF FF 8D 45 C4 E8 2C 0E 00 00
+
+==== BB 583 _dl_catch_error(0x3A9701D0) in 10836B, out 59700B, BBs exec'd 0 ====
+ 0x3A9701D0: pushl %ebp
+ 0x3A9701D1: movl %esp,%ebp
+ 0x3A9701D3: subl $0xF8, %esp
+ 0x3A9701D9: movl %eax,0xFFFFFF24(%ebp)
+ 0x3A9701DF: xorl %eax, %eax
+ 0x3A9701E1: movl %ebx,-12(%ebp)
+ 0x3A9701E4: movl %esi,-8(%ebp)
+ 0x3A9701E7: movl %edi,-4(%ebp)
+ 0x3A9701EA: call 0x3A97592B
+. 583 3A9701D0 31
+. 55 89 E5 81 EC F8 00 00 00 89 85 24 FF FF FF 31 C0 89 5D F4 89 75 F8 89 7D FC E8 3C 57 00 00
+
+==== BB 584 (0x3A9701EF) in 10867B, out 59857B, BBs exec'd 0 ====
+ 0x3A9701EF: addl $0x847D, %ebx
+ 0x3A9701F5: movl %edx,0xFFFFFF20(%ebp)
+ 0x3A9701FB: movl %ecx,0xFFFFFF1C(%ebp)
+ 0x3A970201: movl %eax,0xFFFFFF2C(%ebp)
+ 0x3A970207: call*l 0xFFFFF9E0(%ebx)
+. 584 3A9701EF 30
+. 81 C3 7D 84 00 00 89 95 20 FF FF FF 89 8D 1C FF FF FF 89 85 2C FF FF FF FF 93 E0 F9 FF FF
+
+==== BB 585 _dl_initial_error_catch_tsd(0x3A9658C0) in 10897B, out 59973B, BBs exec'd 0 ====
+ 0x3A9658C0: pushl %ebp
+ 0x3A9658C1: movl %esp,%ebp
+ 0x3A9658C3: popl %ebp
+ 0x3A9658C4: call 0x3A975927
+. 585 3A9658C0 9
+. 55 89 E5 5D E8 5E 00 01 00
+
+==== BB 586 (0x3A9658C9) in 10906B, out 60057B, BBs exec'd 0 ====
+ 0x3A9658C9: addl $0x12DA3, %ecx
+ 0x3A9658CF: leal 0x3C(%ecx), %eax
+ 0x3A9658D5: ret
+. 586 3A9658C9 13
+. 81 C1 A3 2D 01 00 8D 81 3C 00 00 00 C3
+
+==== BB 587 (0x3A97020D) in 10919B, out 60117B, BBs exec'd 0 ====
+ 0x3A97020D: movl %eax,0xFFFFFF18(%ebp)
+ 0x3A970213: movl (%eax),%eax
+ 0x3A970215: movl %eax,-28(%ebp)
+ 0x3A970218: leal 0xFFFFFF30(%ebp), %eax
+ 0x3A97021E: movl %eax,(%esp,,)
+ 0x3A970221: call 0x3A974F30
+. 587 3A97020D 25
+. 89 85 18 FF FF FF 8B 00 89 45 E4 8D 85 30 FF FF FF 89 04 24 E8 0A 4D 00 00
+
+==== BB 588 _setjmp(0x3A974F30) in 10944B, out 60218B, BBs exec'd 0 ====
+ 0x3A974F30: xorl %eax, %eax
+ 0x3A974F32: movl 4(%esp,,),%edx
+ 0x3A974F36: movl %ebx,0(%edx)
+ 0x3A974F39: movl %esi,4(%edx)
+ 0x3A974F3C: movl %edi,8(%edx)
+ 0x3A974F3F: leal 4(%esp,,), %ecx
+ 0x3A974F43: movl %ecx,16(%edx)
+ 0x3A974F46: movl 0(%esp,,),%ecx
+ 0x3A974F4A: movl %ecx,20(%edx)
+ 0x3A974F4D: movl %ebp,12(%edx)
+ 0x3A974F50: movl %eax,24(%edx)
+ 0x3A974F53: ret
+. 588 3A974F30 36
+. 31 C0 8B 54 24 04 89 5A 00 89 72 04 89 7A 08 8D 4C 24 04 89 4A 10 8B 4C 24 00 89 4A 14 89 6A 0C 89 42 18 C3
+
+==== BB 589 (0x3A970226) in 10980B, out 60379B, BBs exec'd 0 ====
+ 0x3A970226: testl %eax,%eax
+ 0x3A970228: movl %eax,%edx
+ 0x3A97022A: jnz-8 0x3A97027A
+. 589 3A970226 6
+. 85 C0 89 C2 75 4E
+
+==== BB 590 (0x3A97022C) in 10986B, out 60445B, BBs exec'd 0 ====
+ 0x3A97022C: movl 0xFFFFFF18(%ebp),%ecx
+ 0x3A970232: leal 0xFFFFFF28(%ebp), %eax
+ 0x3A970238: movl %eax,(%ecx)
+ 0x3A97023A: movl 8(%ebp),%eax
+ 0x3A97023D: movl %eax,(%esp,,)
+ 0x3A970240: call*l 0xFFFFFF1C(%ebp)
+. 590 3A97022C 26
+. 8B 8D 18 FF FF FF 8D 85 28 FF FF FF 89 01 8B 45 08 89 04 24 FF 95 1C FF FF FF
+
+==== BB 591 openaux(0x3A96FEA0) in 11012B, out 60543B, BBs exec'd 0 ====
+ 0x3A96FEA0: pushl %ebp
+ 0x3A96FEA1: movl $0x1,%ecx
+ 0x3A96FEA6: movl %esp,%ebp
+ 0x3A96FEA8: pushl %esi
+ 0x3A96FEA9: subl $0xC, %esp
+ 0x3A96FEAC: movl 8(%ebp),%esi
+ 0x3A96FEAF: movl 8(%esi),%eax
+ 0x3A96FEB2: movl 16(%esi),%edx
+ 0x3A96FEB5: movl %eax,8(%esp,,)
+ 0x3A96FEB9: movl 4(%esi),%eax
+ 0x3A96FEBC: movl %eax,4(%esp,,)
+ 0x3A96FEC0: movl (%esi),%eax
+ 0x3A96FEC2: movzbl 0x174(%eax),%eax
+ 0x3A96FEC9: testb $0x3, %al
+ 0x3A96FECB: jz-8 0x3A96FED2
+. 591 3A96FEA0 45
+. 55 B9 01 00 00 00 89 E5 56 83 EC 0C 8B 75 08 8B 46 08 8B 56 10 89 44 24 08 8B 46 04 89 44 24 04 8B 06 0F B6 80 74 01 00 00 A8 03 74 05
+
+==== BB 592 (0x3A96FED2) in 11057B, out 60761B, BBs exec'd 0 ====
+ 0x3A96FED2: movl %ecx,(%esp,,)
+ 0x3A96FED5: movl (%esi),%eax
+ 0x3A96FED7: xorl %ecx, %ecx
+ 0x3A96FED9: call 0x3A96AE40
+. 592 3A96FED2 12
+. 89 0C 24 8B 06 31 C9 E8 62 AF FF FF
+
+==== BB 593 (0x3A96B088) in 11069B, out 60847B, BBs exec'd 0 ====
+ 0x3A96B088: movl 0xFFFFFDD4(%ebp),%edx
+ 0x3A96B08E: movl %edx,(%esp,,)
+ 0x3A96B091: call 0x3A9752D0
+. 593 3A96B088 14
+. 8B 95 D4 FD FF FF 89 14 24 E8 3A A2 00 00
+
+==== BB 594 (0x3A96B096) in 11083B, out 60918B, BBs exec'd 0 ====
+ 0x3A96B096: incl %eax
+ 0x3A96B097: testb $0x1, 0xFFFFFC14(%ebx)
+ 0x3A96B09E: movl %eax,0xFFFFFDC8(%ebp)
+ 0x3A96B0A4: jnz-32 0x3A96B4D6
+. 594 3A96B096 20
+. 40 F6 83 14 FC FF FF 01 89 85 C8 FD FF FF 0F 85 2C 04 00 00
+
+==== BB 595 (0x3A96B0AA) in 11103B, out 61019B, BBs exec'd 0 ====
+ 0x3A96B0AA: movl 0xFFFFFDD8(%ebp),%esi
+ 0x3A96B0B0: movl $0xFFFFFFFF,%edi
+ 0x3A96B0B5: movl %edi,0xFFFFFDCC(%ebp)
+ 0x3A96B0BB: testl %esi,%esi
+ 0x3A96B0BD: jz-8 0x3A96B0D3
+. 595 3A96B0AA 21
+. 8B B5 D8 FD FF FF BF FF FF FF FF 89 BD CC FD FF FF 85 F6 74 14
+
+==== BB 596 (0x3A96B0BF) in 11124B, out 61119B, BBs exec'd 0 ====
+ 0x3A96B0BF: movl 0xFFFFFDD8(%ebp),%eax
+ 0x3A96B0C5: movl 0x8C(%eax),%ecx
+ 0x3A96B0CB: testl %ecx,%ecx
+ 0x3A96B0CD: jnz-32 0x3A96B276
+. 596 3A96B0BF 20
+. 8B 85 D8 FD FF FF 8B 88 8C 00 00 00 85 C9 0F 85 A3 01 00 00
+
+==== BB 597 (0x3A96B0D3) in 11144B, out 61210B, BBs exec'd 0 ====
+ 0x3A96B0D3: movl 0xFFFFFDD8(%ebp),%esi
+ 0x3A96B0D9: testl %esi,%esi
+ 0x3A96B0DB: jz-32 0x3A96B1A3
+. 597 3A96B0D3 14
+. 8B B5 D8 FD FF FF 85 F6 0F 84 C2 00 00 00
+
+==== BB 598 (0x3A96B0E1) in 11158B, out 61285B, BBs exec'd 0 ====
+ 0x3A96B0E1: leal 0xFFFFF009(%ebx), %edx
+ 0x3A96B0E7: movl %edx,0xFFFFFDB4(%ebp)
+ 0x3A96B0ED: jmp-8 0x3A96B10E
+. 598 3A96B0E1 14
+. 8D 93 09 F0 FF FF 89 95 B4 FD FF FF EB 1F
+
+==== BB 599 (0x3A96B10E) in 11172B, out 61345B, BBs exec'd 0 ====
+ 0x3A96B10E: movl 0xFFFFFDB4(%ebp),%ecx
+ 0x3A96B114: leal 0x180(%esi), %edi
+ 0x3A96B11A: movl %esi,%eax
+ 0x3A96B11C: movl %edi,%edx
+ 0x3A96B11E: movl %ecx,(%esp,,)
+ 0x3A96B121: movl $0xF,%ecx
+ 0x3A96B126: call 0x3A96A890
+. 599 3A96B10E 29
+. 8B 8D B4 FD FF FF 8D BE 80 01 00 00 89 F0 89 FA 89 0C 24 B9 0F 00 00 00 E8 65 F7 FF FF
+
+==== BB 600 cache_rpath(0x3A96A890) in 11201B, out 61455B, BBs exec'd 0 ====
+ 0x3A96A890: pushl %ebp
+ 0x3A96A891: movl %esp,%ebp
+ 0x3A96A893: subl $0xC, %esp
+ 0x3A96A896: movl %esi,-8(%ebp)
+ 0x3A96A899: movl %edx,%esi
+ 0x3A96A89B: movl %edi,-4(%ebp)
+ 0x3A96A89E: movl (%edx),%edx
+ 0x3A96A8A0: movl %eax,%edi
+ 0x3A96A8A2: xorl %eax, %eax
+ 0x3A96A8A4: cmpl $0xFFFFFFFF, %edx
+ 0x3A96A8A7: jz-8 0x3A96A8D0
+. 600 3A96A890 25
+. 55 89 E5 83 EC 0C 89 75 F8 89 D6 89 7D FC 8B 12 89 C7 31 C0 83 FA FF 74 27
+
+==== BB 601 (0x3A96A8D0) in 11226B, out 61621B, BBs exec'd 0 ====
+ 0x3A96A8D0: movl -8(%ebp),%esi
+ 0x3A96A8D3: movl -4(%ebp),%edi
+ 0x3A96A8D6: movl %ebp,%esp
+ 0x3A96A8D8: popl %ebp
+ 0x3A96A8D9: ret
+. 601 3A96A8D0 10
+. 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 602 (0x3A96B12B) in 11236B, out 61700B, BBs exec'd 0 ====
+ 0x3A96B12B: testb %al,%al
+ 0x3A96B12D: jz-8 0x3A96B0EF
+. 602 3A96B12B 4
+. 84 C0 74 C0
+
+==== BB 603 (0x3A96B0EF) in 11240B, out 61761B, BBs exec'd 0 ====
+ 0x3A96B0EF: cmpl $0xFFFFFFFF, 0xFFFFFDCC(%ebp)
+ 0x3A96B0F6: movl 0x160(%esi),%esi
+ 0x3A96B0FC: setz %al
+ 0x3A96B0FF: testl %esi,%esi
+ 0x3A96B101: setnz %dl
+ 0x3A96B104: andl %edx,%eax
+ 0x3A96B106: testb $0x1, %al
+ 0x3A96B108: jz-32 0x3A96B1A3
+. 603 3A96B0EF 31
+. 83 BD CC FD FF FF FF 8B B6 60 01 00 00 0F 94 C0 85 F6 0F 95 C2 21 D0 A8 01 0F 84 95 00 00 00
+
+==== BB 604 (0x3A96B1A3) in 11271B, out 61912B, BBs exec'd 0 ====
+ 0x3A96B1A3: cmpl $0xFFFFFFFF, 0xFFFFFDCC(%ebp)
+ 0x3A96B1AA: movl 0xFFFFF994(%ebx),%esi
+ 0x3A96B1B0: setz %al
+ 0x3A96B1B3: testl %esi,%esi
+ 0x3A96B1B5: setnz %dl
+ 0x3A96B1B8: andl %edx,%eax
+ 0x3A96B1BA: testb $0x1, %al
+ 0x3A96B1BC: jz-8 0x3A96B216
+. 604 3A96B1A3 27
+. 83 BD CC FD FF FF FF 8B B3 94 F9 FF FF 0F 94 C0 85 F6 0F 95 C2 21 D0 A8 01 74 58
+
+==== BB 605 (0x3A96B1BE) in 11298B, out 62060B, BBs exec'd 0 ====
+ 0x3A96B1BE: movzbl 0x174(%esi),%eax
+ 0x3A96B1C5: andb $0x3, %al
+ 0x3A96B1C7: cmpb $0x2, %al
+ 0x3A96B1C9: jz-8 0x3A96B216
+. 605 3A96B1BE 13
+. 0F B6 86 74 01 00 00 24 03 3C 02 74 4B
+
+==== BB 606 (0x3A96B1CB) in 11311B, out 62157B, BBs exec'd 0 ====
+ 0x3A96B1CB: cmpl 0xFFFFFDD8(%ebp),%esi
+ 0x3A96B1D1: jz-8 0x3A96B216
+. 606 3A96B1CB 8
+. 3B B5 D8 FD FF FF 74 43
+
+==== BB 607 (0x3A96B216) in 11319B, out 62225B, BBs exec'd 0 ====
+ 0x3A96B216: cmpl $0xFFFFFFFF, 0xFFFFFDCC(%ebp)
+ 0x3A96B21D: jz-8 0x3A96B276
+. 607 3A96B216 9
+. 83 BD CC FD FF FF FF 74 57
+
+==== BB 608 (0x3A96B276) in 11328B, out 62291B, BBs exec'd 0 ====
+ 0x3A96B276: cmpl $0xFFFFFFFF, 0xBC(%ebx)
+ 0x3A96B27D: jz-8 0x3A96B21F
+. 608 3A96B276 9
+. 83 BB BC 00 00 00 FF 74 A0
+
+==== BB 609 (0x3A96B27F) in 11337B, out 62357B, BBs exec'd 0 ====
+ 0x3A96B27F: leal 0xFFFFFDE0(%ebp), %eax
+ 0x3A96B285: leal 0xFFFFFDE4(%ebp), %ecx
+ 0x3A96B28B: movl %eax,4(%esp,,)
+ 0x3A96B28F: leal 0xBC(%ebx), %eax
+ 0x3A96B295: movl %ecx,8(%esp,,)
+ 0x3A96B299: movl %eax,(%esp,,)
+ 0x3A96B29C: movl 0xFFFFFDD0(%ebp),%ecx
+ 0x3A96B2A2: movl 0xFFFFFDC8(%ebp),%edx
+ 0x3A96B2A8: movl 0xFFFFFDD4(%ebp),%eax
+ 0x3A96B2AE: call 0x3A969250
+. 609 3A96B27F 52
+. 8D 85 E0 FD FF FF 8D 8D E4 FD FF FF 89 44 24 04 8D 83 BC 00 00 00 89 4C 24 08 89 04 24 8B 8D D0 FD FF FF 8B 95 C8 FD FF FF 8B 85 D4 FD FF FF E8 9D DF FF FF
+
+==== BB 610 open_path(0x3A969250) in 11389B, out 62513B, BBs exec'd 0 ====
+ 0x3A969250: pushl %ebp
+ 0x3A969251: movl %esp,%ebp
+ 0x3A969253: pushl %edi
+ 0x3A969254: xorl %edi, %edi
+ 0x3A969256: pushl %esi
+ 0x3A969257: xorl %esi, %esi
+ 0x3A969259: pushl %ebx
+ 0x3A96925A: subl $0xB4, %esp
+ 0x3A969260: movl %eax,-112(%ebp)
+ 0x3A969263: movl 8(%ebp),%eax
+ 0x3A969266: call 0x3A97592B
+. 610 3A969250 27
+. 55 89 E5 57 31 FF 56 31 F6 53 81 EC B4 00 00 00 89 45 90 8B 45 08 E8 C0 C6 00 00
+
+==== BB 611 (0x3A96926B) in 11416B, out 62703B, BBs exec'd 0 ====
+ 0x3A96926B: addl $0xF401, %ebx
+ 0x3A969271: movl %ecx,-120(%ebp)
+ 0x3A969274: movl (%eax),%eax
+ 0x3A969276: movl %edx,-116(%ebp)
+ 0x3A969279: movl 0xD8(%ebx),%ecx
+ 0x3A96927F: movl %edi,0xFFFFFF7C(%ebp)
+ 0x3A969285: movl %eax,-124(%ebp)
+ 0x3A969288: movl 0xCC(%ebx),%eax
+ 0x3A96928E: movl $0xFFFFFFFF, -128(%ebp)
+ 0x3A969295: movl %esi,0xFFFFFF78(%ebp)
+ 0x3A96929B: addl %ecx,%eax
+ 0x3A96929D: leal 18(%edx,%eax,1), %eax
+ 0x3A9692A1: movl -124(%ebp),%ecx
+ 0x3A9692A4: andl $0xFFFFFFFC, %eax
+ 0x3A9692A7: subl %eax,%esp
+ 0x3A9692A9: leal 27(%esp,,), %edx
+ 0x3A9692AD: movl (%ecx),%edi
+ 0x3A9692AF: andl $0xFFFFFFF0, %edx
+ 0x3A9692B2: movl %edx,0xFFFFFF74(%ebp)
+ 0x3A9692B8: nop
+ 0x3A9692B9: leal 0(%esi,,), %esi
+ 0x3A9692C0: xorl %eax, %eax
+ 0x3A9692C2: movl %eax,0xFFFFFF70(%ebp)
+ 0x3A9692C8: xorl %eax, %eax
+ 0x3A9692CA: testb $0x1, 0xFFFFFC14(%ebx)
+ 0x3A9692D1: movl %eax,0xFFFFFF68(%ebp)
+ 0x3A9692D7: jnz-32 0x3A969555
+. 611 3A96926B 114
+. 81 C3 01 F4 00 00 89 4D 88 8B 00 89 55 8C 8B 8B D8 00 00 00 89 BD 7C FF FF FF 89 45 84 8B 83 CC 00 00 00 C7 45 80 FF FF FF FF 89 B5 78 FF FF FF 01 C8 8D 44 02 12 8B 4D 84 83 E0 FC 29 C4 8D 54 24 1B 8B 39 83 E2 F0 89 95 74 FF FF FF 90 8D B4 26 00 00 00 00 31 C0 89 85 70 FF FF FF 31 C0 F6 83 14 FC FF FF 01 89 85 68 FF FF FF 0F 85 78 02 00 00
+
+==== BB 612 (0x3A9692DD) in 11530B, out 63073B, BBs exec'd 0 ====
+ 0x3A9692DD: movl 16(%edi),%eax
+ 0x3A9692E0: xorl %esi, %esi
+ 0x3A9692E2: movl %eax,8(%esp,,)
+ 0x3A9692E6: movl 12(%edi),%eax
+ 0x3A9692E9: movl %eax,4(%esp,,)
+ 0x3A9692ED: movl 0xFFFFFF74(%ebp),%ecx
+ 0x3A9692F3: movl %ecx,(%esp,,)
+ 0x3A9692F6: call 0x3A975770
+. 612 3A9692DD 30
+. 8B 47 10 31 F6 89 44 24 08 8B 47 0C 89 44 24 04 8B 8D 74 FF FF FF 89 0C 24 E8 75 C4 00 00
+
+==== BB 613 (0x3A9692FB) in 11560B, out 63208B, BBs exec'd 0 ====
+ 0x3A9692FB: cmpl $0xFFFFFFFF, -128(%ebp)
+ 0x3A9692FF: movl %eax,0xFFFFFF6C(%ebp)
+ 0x3A969305: jnz-32 0x3A9694A3
+. 613 3A9692FB 16
+. 83 7D 80 FF 89 85 6C FF FF FF 0F 85 98 01 00 00
+
+==== BB 614 (0x3A96930B) in 11576B, out 63290B, BBs exec'd 0 ====
+ 0x3A96930B: cmpl 0xC8(%ebx),%esi
+ 0x3A969311: jb-8 0x3A969332
+. 614 3A96930B 8
+. 3B B3 C8 00 00 00 72 1F
+
+==== BB 615 (0x3A969332) in 11584B, out 63358B, BBs exec'd 0 ====
+ 0x3A969332: cmpl $0x1, 20(%edi,%esi,4)
+ 0x3A969337: jz-8 0x3A969318
+. 615 3A969332 7
+. 83 7C B7 14 01 74 DF
+
+==== BB 616 (0x3A969339) in 11591B, out 63425B, BBs exec'd 0 ====
+ 0x3A969339: movl 0xC4(%ebx),%eax
+ 0x3A96933F: movl 4(%eax,%esi,8),%eax
+ 0x3A969343: movl %eax,8(%esp,,)
+ 0x3A969347: movl 0xC4(%ebx),%eax
+ 0x3A96934D: movl (%eax,%esi,8),%eax
+ 0x3A969350: movl %eax,4(%esp,,)
+ 0x3A969354: movl 0xFFFFFF6C(%ebp),%eax
+ 0x3A96935A: movl %eax,(%esp,,)
+ 0x3A96935D: call 0x3A975770
+. 616 3A969339 41
+. 8B 83 C4 00 00 00 8B 44 F0 04 89 44 24 08 8B 83 C4 00 00 00 8B 04 F0 89 44 24 04 8B 85 6C FF FF FF 89 04 24 E8 0E C4 00 00
+
+==== BB 617 (0x3A969362) in 11632B, out 63570B, BBs exec'd 0 ====
+ 0x3A969362: movl -116(%ebp),%edx
+ 0x3A969365: movl %edx,8(%esp,,)
+ 0x3A969369: movl -112(%ebp),%ecx
+ 0x3A96936C: movl %eax,(%esp,,)
+ 0x3A96936F: movl %ecx,4(%esp,,)
+ 0x3A969373: call 0x3A975770
+. 617 3A969362 22
+. 8B 55 8C 89 54 24 08 8B 4D 90 89 04 24 89 4C 24 04 E8 F8 C3 00 00
+
+==== BB 618 (0x3A969378) in 11654B, out 63674B, BBs exec'd 0 ====
+ 0x3A969378: movl %eax,0xFFFFFF70(%ebp)
+ 0x3A96937E: movl 0xFFFFFF74(%ebp),%eax
+ 0x3A969384: subl %eax,0xFFFFFF70(%ebp)
+ 0x3A96938A: testb $0x1, 0xFFFFFC14(%ebx)
+ 0x3A969391: jnz-32 0x3A9694E7
+. 618 3A969378 31
+. 89 85 70 FF FF FF 8B 85 74 FF FF FF 29 85 70 FF FF FF F6 83 14 FC FF FF 01 0F 85 50 01 00 00
+
+==== BB 619 (0x3A969397) in 11685B, out 63797B, BBs exec'd 0 ====
+ 0x3A969397: movl 16(%ebp),%edx
+ 0x3A96939A: movl 0xFFFFFF74(%ebp),%eax
+ 0x3A9693A0: call 0x3A968F20
+. 619 3A969397 14
+. 8B 55 10 8B 85 74 FF FF FF E8 7B FB FF FF
+
+==== BB 620 (0x3A9693A5) in 11699B, out 63874B, BBs exec'd 0 ====
+ 0x3A9693A5: movl %eax,-128(%ebp)
+ 0x3A9693A8: movl 20(%edi,%esi,4),%eax
+ 0x3A9693AC: testl %eax,%eax
+ 0x3A9693AE: jnz-8 0x3A9693C8
+. 620 3A9693A5 11
+. 89 45 80 8B 44 B7 14 85 C0 75 18
+
+==== BB 621 (0x3A9693B0) in 11710B, out 63966B, BBs exec'd 0 ====
+ 0x3A9693B0: cmpl $0xFFFFFFFF, -128(%ebp)
+ 0x3A9693B4: jz-32 0x3A9694FE
+. 621 3A9693B0 10
+. 83 7D 80 FF 0F 84 44 01 00 00
+
+==== BB 622 (0x3A9694FE) in 11720B, out 64029B, BBs exec'd 0 ====
+ 0x3A9694FE: movl 0xFFFFFF70(%ebp),%eax
+ 0x3A969504: movl -116(%ebp),%ecx
+ 0x3A969507: movl 0xFFFFFF74(%ebp),%edx
+ 0x3A96950D: subl %ecx,%eax
+ 0x3A96950F: movb $0x0, -1(%eax,%edx,1)
+ 0x3A969514: leal -108(%ebp), %eax
+ 0x3A969517: movl %eax,8(%esp,,)
+ 0x3A96951B: movl %edx,4(%esp,,)
+ 0x3A96951F: movl $0x3, (%esp,,)
+ 0x3A969526: call 0x3A974210
+. 622 3A9694FE 45
+. 8B 85 70 FF FF FF 8B 4D 8C 8B 95 74 FF FF FF 29 C8 C6 44 10 FF 00 8D 45 94 89 44 24 08 89 54 24 04 C7 04 24 03 00 00 00 E8 E5 AC 00 00
+
+==== BB 623 __GI___xstat64(0x3A974210) in 11765B, out 64189B, BBs exec'd 0 ====
+ 0x3A974210: pushl %ebp
+ 0x3A974211: movl %esp,%ebp
+ 0x3A974213: subl $0x58, %esp
+ 0x3A974216: movl %ebx,-12(%ebp)
+ 0x3A974219: call 0x3A97592B
+. 623 3A974210 14
+. 55 89 E5 83 EC 58 89 5D F4 E8 0D 17 00 00
+
+==== BB 624 (0x3A97421E) in 11779B, out 64287B, BBs exec'd 0 ====
+ 0x3A97421E: addl $0x444E, %ebx
+ 0x3A974224: movl %esi,-8(%ebp)
+ 0x3A974227: movl 0x24(%ebx),%esi
+ 0x3A97422D: movl %edi,-4(%ebp)
+ 0x3A974230: movl (%esi),%eax
+ 0x3A974232: testl %eax,%eax
+ 0x3A974234: jnz-8 0x3A9742B0
+. 624 3A97421E 24
+. 81 C3 4E 44 00 00 89 75 F8 8B B3 24 00 00 00 89 7D FC 8B 06 85 C0 75 7A
+
+==== BB 625 (0x3A974236) in 11803B, out 64411B, BBs exec'd 0 ====
+ 0x3A974236: movl 0x148(%ebx),%edi
+ 0x3A97423C: movl 12(%ebp),%edx
+ 0x3A97423F: movl 16(%ebp),%ecx
+ 0x3A974242: xchgl %edx, %ebx
+ 0x3A974244: movl $0xC3,%eax
+ 0x3A974249: int $0x80
+. 625 3A974236 21
+. 8B BB 48 01 00 00 8B 55 0C 8B 4D 10 87 D3 B8 C3 00 00 00 CD 80
+
+==== BB 626 (0x3A97424B) in 11824B, out 64504B, BBs exec'd 0 ====
+ 0x3A97424B: xchgl %edx, %ebx
+ 0x3A97424D: cmpl $0xFFFFF000, %eax
+ 0x3A974252: jnbe-32 0x3A974306
+. 626 3A97424B 13
+. 87 D3 3D 00 F0 FF FF 0F 87 AE 00 00 00
+
+==== BB 627 (0x3A974306) in 11837B, out 64580B, BBs exec'd 0 ====
+ 0x3A974306: negl %eax
+ 0x3A974308: movl %eax,0x148(%ebx)
+ 0x3A97430E: movl $0xFFFFFFFF,%eax
+ 0x3A974313: jmp 0x3A974258
+. 627 3A974306 18
+. F7 D8 89 83 48 01 00 00 B8 FF FF FF FF E9 40 FF FF FF
+
+==== BB 628 (0x3A974258) in 11855B, out 64649B, BBs exec'd 0 ====
+ 0x3A974258: cmpl $0xFFFFFFFF, %eax
+ 0x3A97425B: movl %eax,%edx
+ 0x3A97425D: jz-8 0x3A974290
+. 628 3A974258 7
+. 83 F8 FF 89 C2 74 31
+
+==== BB 629 (0x3A974290) in 11862B, out 64716B, BBs exec'd 0 ====
+ 0x3A974290: cmpl $0x26, 0x148(%ebx)
+ 0x3A974297: jnz-8 0x3A97425F
+. 629 3A974290 9
+. 83 BB 48 01 00 00 26 75 C6
+
+==== BB 630 (0x3A97425F) in 11871B, out 64782B, BBs exec'd 0 ====
+ 0x3A97425F: testl %edx,%edx
+ 0x3A974261: jnz-8 0x3A974280
+. 630 3A97425F 4
+. 85 D2 75 1D
+
+==== BB 631 (0x3A974280) in 11875B, out 64841B, BBs exec'd 0 ====
+ 0x3A974280: movl -12(%ebp),%ebx
+ 0x3A974283: movl %edx,%eax
+ 0x3A974285: movl -8(%ebp),%esi
+ 0x3A974288: movl -4(%ebp),%edi
+ 0x3A97428B: movl %ebp,%esp
+ 0x3A97428D: popl %ebp
+ 0x3A97428E: ret
+. 631 3A974280 15
+. 8B 5D F4 89 D0 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 632 (0x3A96952B) in 11890B, out 64943B, BBs exec'd 0 ====
+ 0x3A96952B: testl %eax,%eax
+ 0x3A96952D: jnz-8 0x3A969542
+. 632 3A96952B 4
+. 85 C0 75 13
+
+==== BB 633 (0x3A969542) in 11894B, out 65002B, BBs exec'd 0 ====
+ 0x3A969542: movl $0x1,%edx
+ 0x3A969547: movl $0x1,%eax
+ 0x3A96954C: movl %edx,20(%edi,%esi,4)
+ 0x3A969550: jmp 0x3A9693C8
+. 633 3A969542 19
+. BA 01 00 00 00 B8 01 00 00 00 89 54 B7 14 E9 73 FE FF FF
+
+==== BB 634 (0x3A9693C8) in 11913B, out 65071B, BBs exec'd 0 ====
+ 0x3A9693C8: cmpl $0x2, %eax
+ 0x3A9693CB: setz %al
+ 0x3A9693CE: movzbl %al,%eax
+ 0x3A9693D1: orl %eax,0xFFFFFF68(%ebp)
+ 0x3A9693D7: cmpl $0xFFFFFFFF, -128(%ebp)
+ 0x3A9693DB: jz-32 0x3A969318
+. 634 3A9693C8 25
+. 83 F8 02 0F 94 C0 0F B6 C0 09 85 68 FF FF FF 83 7D 80 FF 0F 84 37 FF FF FF
+
+==== BB 635 (0x3A969318) in 11938B, out 65187B, BBs exec'd 0 ====
+ 0x3A969318: incl %esi
+ 0x3A969319: cmpl $0xFFFFFFFF, -128(%ebp)
+ 0x3A96931D: leal 0(%esi), %esi
+ 0x3A969320: jnz-32 0x3A9694A3
+. 635 3A969318 14
+. 46 83 7D 80 FF 8D 76 00 0F 85 7D 01 00 00
+
+==== BB 636 (0x3A969326) in 11952B, out 65268B, BBs exec'd 0 ====
+ 0x3A969326: cmpl 0xC8(%ebx),%esi
+ 0x3A96932C: jnb-32 0x3A969444
+. 636 3A969326 12
+. 3B B3 C8 00 00 00 0F 83 12 01 00 00
+
+==== BB 637 (0x3A974263) in 11964B, out 65336B, BBs exec'd 0 ====
+ 0x3A974263: movl 16(%ebp),%ecx
+ 0x3A974266: movl 88(%ecx),%eax
+ 0x3A974269: cmpl %eax,12(%ecx)
+ 0x3A97426C: jz-8 0x3A974280
+. 637 3A974263 11
+. 8B 4D 10 8B 41 58 39 41 0C 74 12
+
+==== BB 638 (0x3A96952F) in 11975B, out 65424B, BBs exec'd 0 ====
+ 0x3A96952F: movl -92(%ebp),%eax
+ 0x3A969532: andl $0xF000, %eax
+ 0x3A969537: cmpl $0x4000, %eax
+ 0x3A96953C: jz-32 0x3A9693BA
+. 638 3A96952F 19
+. 8B 45 A4 25 00 F0 00 00 3D 00 40 00 00 0F 84 78 FE FF FF
+
+==== BB 639 (0x3A9693BA) in 11994B, out 65508B, BBs exec'd 0 ====
+ 0x3A9693BA: movl $0x2,%eax
+ 0x3A9693BF: movl %eax,20(%edi,%esi,4)
+ 0x3A9693C3: movl $0x2,%eax
+ 0x3A9693C8: cmpl $0x2, %eax
+ 0x3A9693CB: setz %al
+ 0x3A9693CE: movzbl %al,%eax
+ 0x3A9693D1: orl %eax,0xFFFFFF68(%ebp)
+ 0x3A9693D7: cmpl $0xFFFFFFFF, -128(%ebp)
+ 0x3A9693DB: jz-32 0x3A969318
+. 639 3A9693BA 39
+. B8 02 00 00 00 89 44 B7 14 B8 02 00 00 00 83 F8 02 0F 94 C0 0F B6 C0 09 85 68 FF FF FF 83 7D 80 FF 0F 84 37 FF FF FF
+
+==== BB 640 (0x3A969444) in 12033B, out 65663B, BBs exec'd 0 ====
+ 0x3A969444: cmpl $0xFFFFFFFF, -128(%ebp)
+ 0x3A969448: jnz-8 0x3A9694A3
+. 640 3A969444 6
+. 83 7D 80 FF 75 59
+
+==== BB 641 (0x3A96944A) in 12039B, out 65726B, BBs exec'd 0 ====
+ 0x3A96944A: movl 0xFFFFFF68(%ebp),%eax
+ 0x3A969450: testl %eax,%eax
+ 0x3A969452: jz-8 0x3A969469
+. 641 3A96944A 10
+. 8B 85 68 FF FF FF 85 C0 74 15
+
+==== BB 642 (0x3A969454) in 12049B, out 65801B, BBs exec'd 0 ====
+ 0x3A969454: movl 0x148(%ebx),%edx
+ 0x3A96945A: cmpl $0x2, %edx
+ 0x3A96945D: jz-8 0x3A969469
+. 642 3A969454 11
+. 8B 93 48 01 00 00 83 FA 02 74 0A
+
+==== BB 643 (0x3A969469) in 12060B, out 65874B, BBs exec'd 0 ====
+ 0x3A969469: addl $0x4, -124(%ebp)
+ 0x3A96946D: movl 0xFFFFFF68(%ebp),%ecx
+ 0x3A969473: orl %ecx,0xFFFFFF78(%ebp)
+ 0x3A969479: movl -124(%ebp),%edx
+ 0x3A96947C: movl (%edx),%eax
+ 0x3A96947E: testl %eax,%eax
+ 0x3A969480: movl %eax,%edi
+ 0x3A969482: jnz-32 0x3A9692C0
+. 643 3A969469 31
+. 83 45 84 04 8B 8D 68 FF FF FF 09 8D 78 FF FF FF 8B 55 84 8B 02 85 C0 89 C7 0F 85 38 FE FF FF
+
+==== BB 644 (0x3A969488) in 12091B, out 66013B, BBs exec'd 0 ====
+ 0x3A969488: movl 0xFFFFFF78(%ebp),%eax
+ 0x3A96948E: testl %eax,%eax
+ 0x3A969490: jz-32 0x3A969732
+. 644 3A969488 14
+. 8B 85 78 FF FF FF 85 C0 0F 84 9C 02 00 00
+
+==== BB 645 (0x3A969496) in 12105B, out 66088B, BBs exec'd 0 ====
+ 0x3A969496: movl $0xFFFFFFFF,%eax
+ 0x3A96949B: leal -12(%ebp), %esp
+ 0x3A96949E: popl %ebx
+ 0x3A96949F: popl %esi
+ 0x3A9694A0: popl %edi
+ 0x3A9694A1: popl %ebp
+ 0x3A9694A2: ret
+. 645 3A969496 13
+. B8 FF FF FF FF 8D 65 F4 5B 5E 5F 5D C3
+
+==== BB 646 (0x3A96B2B3) in 12118B, out 66202B, BBs exec'd 0 ====
+ 0x3A96B2B3: movl %eax,0xFFFFFDCC(%ebp)
+ 0x3A96B2B9: jmp 0x3A96B21F
+. 646 3A96B2B3 11
+. 89 85 CC FD FF FF E9 61 FF FF FF
+
+==== BB 647 (0x3A96B21F) in 12129B, out 66249B, BBs exec'd 0 ====
+ 0x3A96B21F: cmpl $0xFFFFFFFF, 0xFFFFFDCC(%ebp)
+ 0x3A96B226: movl 0xFFFFFDD8(%ebp),%edx
+ 0x3A96B22C: setz %al
+ 0x3A96B22F: testl %edx,%edx
+ 0x3A96B231: setnz %dl
+ 0x3A96B234: andl %edx,%eax
+ 0x3A96B236: testb $0x1, %al
+ 0x3A96B238: jnz-32 0x3A96B31F
+. 647 3A96B21F 31
+. 83 BD CC FD FF FF FF 8B 95 D8 FD FF FF 0F 94 C0 85 D2 0F 95 C2 21 D0 A8 01 0F 85 E1 00 00 00
+
+==== BB 648 (0x3A96B31F) in 12160B, out 66398B, BBs exec'd 0 ====
+ 0x3A96B31F: movl 0xFFFFFDD8(%ebp),%esi
+ 0x3A96B325: leal 0xFFFFF00F(%ebx), %eax
+ 0x3A96B32B: movl $0x1D,%ecx
+ 0x3A96B330: movl %eax,(%esp,,)
+ 0x3A96B333: movl 0xFFFFFDD8(%ebp),%eax
+ 0x3A96B339: addl $0x1CC, %esi
+ 0x3A96B33F: movl %esi,%edx
+ 0x3A96B341: call 0x3A96A890
+. 648 3A96B31F 39
+. 8B B5 D8 FD FF FF 8D 83 0F F0 FF FF B9 1D 00 00 00 89 04 24 8B 85 D8 FD FF FF 81 C6 CC 01 00 00 89 F2 E8 4A F5 FF FF
+
+==== BB 649 (0x3A96B346) in 12199B, out 66531B, BBs exec'd 0 ====
+ 0x3A96B346: testb %al,%al
+ 0x3A96B348: jz-32 0x3A96B23E
+. 649 3A96B346 8
+. 84 C0 0F 84 F0 FE FF FF
+
+==== BB 650 (0x3A96B23E) in 12207B, out 66592B, BBs exec'd 0 ====
+ 0x3A96B23E: cmpl $0xFFFFFFFF, 0xFFFFFDCC(%ebp)
+ 0x3A96B245: jz-32 0x3A96B387
+. 650 3A96B23E 13
+. 83 BD CC FD FF FF FF 0F 84 3C 01 00 00
+
+==== BB 651 (0x3A96B387) in 12220B, out 66658B, BBs exec'd 0 ====
+ 0x3A96B387: movl 0xFFFFFDD0(%ebp),%eax
+ 0x3A96B38D: testl %eax,%eax
+ 0x3A96B38F: jnz-32 0x3A96B4FE
+. 651 3A96B387 14
+. 8B 85 D0 FD FF FF 85 C0 0F 85 69 01 00 00
+
+==== BB 652 (0x3A96B395) in 12234B, out 66733B, BBs exec'd 0 ====
+ 0x3A96B395: movl 0xFFFFFDD4(%ebp),%eax
+ 0x3A96B39B: call 0x3A96B720
+. 652 3A96B395 11
+. 8B 85 D4 FD FF FF E8 80 03 00 00
+
+==== BB 653 _dl_load_cache_lookup(0x3A96B720) in 12245B, out 66797B, BBs exec'd 0 ====
+ 0x3A96B720: pushl %ebp
+ 0x3A96B721: movl %esp,%ebp
+ 0x3A96B723: pushl %edi
+ 0x3A96B724: pushl %esi
+ 0x3A96B725: pushl %ebx
+ 0x3A96B726: subl $0x64, %esp
+ 0x3A96B729: call 0x3A97592B
+. 653 3A96B720 14
+. 55 89 E5 57 56 53 83 EC 64 E8 FD A1 00 00
+
+==== BB 654 (0x3A96B72E) in 12259B, out 66930B, BBs exec'd 0 ====
+ 0x3A96B72E: addl $0xCF3E, %ebx
+ 0x3A96B734: testb $0x1, 0xFFFFFC14(%ebx)
+ 0x3A96B73B: movl %eax,-16(%ebp)
+ 0x3A96B73E: jnz-32 0x3A96BBA2
+. 654 3A96B72E 22
+. 81 C3 3E CF 00 00 F6 83 14 FC FF FF 01 89 45 F0 0F 85 5E 04 00 00
+
+==== BB 655 (0x3A96B744) in 12281B, out 67029B, BBs exec'd 0 ====
+ 0x3A96B744: movl 0xDC(%ebx),%ecx
+ 0x3A96B74A: testl %ecx,%ecx
+ 0x3A96B74C: jz-32 0x3A96B872
+. 655 3A96B744 14
+. 8B 8B DC 00 00 00 85 C9 0F 84 20 01 00 00
+
+==== BB 656 (0x3A96B872) in 12295B, out 67104B, BBs exec'd 0 ====
+ 0x3A96B872: movl $0x1,%ecx
+ 0x3A96B877: leal 0xE4(%ebx), %edx
+ 0x3A96B87D: leal 0xFFFFF072(%ebx), %eax
+ 0x3A96B883: call 0x3A971070
+. 656 3A96B872 22
+. B9 01 00 00 00 8D 93 E4 00 00 00 8D 83 72 F0 FF FF E8 E8 57 00 00
+
+==== BB 657 (0x3A9710AD) in 12317B, out 67190B, BBs exec'd 0 ====
+ 0x3A9710AD: movl %esi,4(%esp,,)
+ 0x3A9710B1: leal -108(%ebp), %eax
+ 0x3A9710B4: movl %eax,8(%esp,,)
+ 0x3A9710B8: movl $0x3, (%esp,,)
+ 0x3A9710BF: call 0x3A974320
+. 657 3A9710AD 23
+. 89 74 24 04 8D 45 94 89 44 24 08 C7 04 24 03 00 00 00 E8 5C 32 00 00
+
+==== BB 658 (0x3A9710C4) in 12340B, out 67283B, BBs exec'd 0 ====
+ 0x3A9710C4: testl %eax,%eax
+ 0x3A9710C6: js-8 0x3A9710D1
+. 658 3A9710C4 4
+. 85 C0 78 09
+
+==== BB 659 (0x3A9710C8) in 12344B, out 67342B, BBs exec'd 0 ====
+ 0x3A9710C8: movl -64(%ebp),%eax
+ 0x3A9710CB: testl %eax,%eax
+ 0x3A9710CD: movl %eax,(%edi)
+ 0x3A9710CF: jnz-8 0x3A9710F0
+. 659 3A9710C8 9
+. 8B 45 C0 85 C0 89 07 75 1F
+
+==== BB 660 (0x3A9710F0) in 12353B, out 67424B, BBs exec'd 0 ====
+ 0x3A9710F0: movl %esi,16(%esp,,)
+ 0x3A9710F4: xorl %ecx, %ecx
+ 0x3A9710F6: movl $0x2,%edx
+ 0x3A9710FB: movl %ecx,20(%esp,,)
+ 0x3A9710FF: movl %edx,12(%esp,,)
+ 0x3A971103: movl -112(%ebp),%edx
+ 0x3A971106: movl %eax,4(%esp,,)
+ 0x3A97110A: movl $0x0, (%esp,,)
+ 0x3A971111: movl %edx,8(%esp,,)
+ 0x3A971115: call 0x3A974C50
+. 660 3A9710F0 42
+. 89 74 24 10 31 C9 BA 02 00 00 00 89 4C 24 14 89 54 24 0C 8B 55 90 89 44 24 04 C7 04 24 00 00 00 00 89 54 24 08 E8 36 3B 00 00
+
+==== BB 661 (0x3A97111A) in 12395B, out 67583B, BBs exec'd 0 ====
+ 0x3A97111A: movl %eax,-116(%ebp)
+ 0x3A97111D: jmp-8 0x3A9710D1
+. 661 3A97111A 5
+. 89 45 8C EB B2
+
+==== BB 662 (0x3A9710D1) in 12400B, out 67627B, BBs exec'd 0 ====
+ 0x3A9710D1: movl %esi,(%esp,,)
+ 0x3A9710D4: call 0x3A974470
+. 662 3A9710D1 8
+. 89 34 24 E8 97 33 00 00
+
+==== BB 663 (0x3A96B888) in 12408B, out 67682B, BBs exec'd 0 ====
+ 0x3A96B888: movl %eax,-40(%ebp)
+ 0x3A96B88B: incl %eax
+ 0x3A96B88C: jz-32 0x3A96BA05
+. 663 3A96B888 10
+. 89 45 D8 40 0F 84 73 01 00 00
+
+==== BB 664 (0x3A96B892) in 12418B, out 67757B, BBs exec'd 0 ====
+ 0x3A96B892: movl 0xE4(%ebx),%eax
+ 0x3A96B898: cmpl $0x10, %eax
+ 0x3A96B89B: movl %eax,-96(%ebp)
+ 0x3A96B89E: jbe-32 0x3A96B9B2
+. 664 3A96B892 18
+. 8B 83 E4 00 00 00 83 F8 10 89 45 A0 0F 86 0E 01 00 00
+
+==== BB 665 (0x3A96B8A4) in 12436B, out 67846B, BBs exec'd 0 ====
+ 0x3A96B8A4: cld
+ 0x3A96B8A5: movl -40(%ebp),%esi
+ 0x3A96B8A8: movl $0xB,%edx
+ 0x3A96B8AD: leal 0xFFFFF083(%ebx), %edi
+ 0x3A96B8B3: movl %edx,%ecx
+ 0x3A96B8B5: repe cmpsb
+. 665 3A96B8A4 19
+. FC 8B 75 D8 BA 0B 00 00 00 8D BB 83 F0 FF FF 89 D1 F3 A6
+
+==== BB 666 (0x3A96B8B5) in 12455B, out 68019B, BBs exec'd 0 ====
+ 0x3A96B8B5: repe cmpsb
+. 666 3A96B8B5 2
+. F3 A6
+
+==== BB 667 (0x3A96B8B7) in 12457B, out 68144B, BBs exec'd 0 ====
+ 0x3A96B8B7: jnz-32 0x3A96B9B2
+. 667 3A96B8B7 6
+. 0F 85 F5 00 00 00
+
+==== BB 668 (0x3A96B8BD) in 12463B, out 68191B, BBs exec'd 0 ====
+ 0x3A96B8BD: movl -40(%ebp),%eax
+ 0x3A96B8C0: movl %eax,%edx
+ 0x3A96B8C2: movl %eax,0xDC(%ebx)
+ 0x3A96B8C8: movl 12(%eax),%eax
+ 0x3A96B8CB: leal (%eax,%eax,2), %eax
+ 0x3A96B8CE: leal 0x10(,%eax,4), %eax
+ 0x3A96B8D5: addl %eax,%edx
+ 0x3A96B8D7: addl $0x30, %eax
+ 0x3A96B8DA: cmpl %eax,-96(%ebp)
+ 0x3A96B8DD: jb-8 0x3A96B905
+. 668 3A96B8BD 34
+. 8B 45 D8 89 C2 89 83 DC 00 00 00 8B 40 0C 8D 04 40 8D 04 85 10 00 00 00 01 C2 83 C0 30 39 45 A0 72 26
+
+==== BB 669 (0x3A96B8DF) in 12497B, out 68345B, BBs exec'd 0 ====
+ 0x3A96B8DF: movl %edx,0xE0(%ebx)
+ 0x3A96B8E5: movl $0x14,%ecx
+ 0x3A96B8EA: movl %edx,%esi
+ 0x3A96B8EC: leal 0xFFFFF08F(%ebx), %edi
+ 0x3A96B8F2: repe cmpsb
+. 669 3A96B8DF 21
+. 89 93 E0 00 00 00 B9 14 00 00 00 89 D6 8D BB 8F F0 FF FF F3 A6
+
+==== BB 670 (0x3A96B8F2) in 12518B, out 68504B, BBs exec'd 0 ====
+ 0x3A96B8F2: repe cmpsb
+. 670 3A96B8F2 2
+. F3 A6
+
+==== BB 671 (0x3A96B8F4) in 12520B, out 68629B, BBs exec'd 0 ====
+ 0x3A96B8F4: setnbe %dl
+ 0x3A96B8F7: setb %al
+ 0x3A96B8FA: movl -40(%ebp),%ecx
+ 0x3A96B8FD: cmpb %al,%dl
+ 0x3A96B8FF: jz-32 0x3A96B752
+. 671 3A96B8F4 17
+. 0F 97 C2 0F 92 C0 8B 4D D8 38 C2 0F 84 4D FE FF FF
+
+==== BB 672 (0x3A96B752) in 12537B, out 68729B, BBs exec'd 0 ====
+ 0x3A96B752: xorl %eax, %eax
+ 0x3A96B754: cmpl $0xFFFFFFFF, %ecx
+ 0x3A96B757: jz-32 0x3A96BB5C
+. 672 3A96B752 11
+. 31 C0 83 F9 FF 0F 84 FF 03 00 00
+
+==== BB 673 (0x3A96B75D) in 12548B, out 68800B, BBs exec'd 0 ====
+ 0x3A96B75D: movl $0x0, -36(%ebp)
+ 0x3A96B764: movl 0xE0(%ebx),%eax
+ 0x3A96B76A: cmpl $0xFFFFFFFF, %eax
+ 0x3A96B76D: movl %eax,-44(%ebp)
+ 0x3A96B770: movl %eax,%edi
+ 0x3A96B772: jz-32 0x3A96B918
+. 673 3A96B75D 27
+. C7 45 DC 00 00 00 00 8B 83 E0 00 00 00 83 F8 FF 89 45 D4 89 C7 0F 84 A0 01 00 00
+
+==== BB 674 (0x3A96B778) in 12575B, out 68911B, BBs exec'd 0 ====
+ 0x3A96B778: movl 0xE4(%ebx),%edx
+ 0x3A96B77E: addl %edx,%ecx
+ 0x3A96B780: movl 0xFFFFFC20(%ebx),%edx
+ 0x3A96B786: subl %eax,%ecx
+ 0x3A96B788: movl %ecx,-32(%ebp)
+ 0x3A96B78B: testl %edx,%edx
+ 0x3A96B78D: movl %edx,-56(%ebp)
+ 0x3A96B790: jz-8 0x3A96B7C3
+. 674 3A96B778 26
+. 8B 93 E4 00 00 00 01 D1 8B 93 20 FC FF FF 29 C1 89 4D E0 85 D2 89 55 C8 74 31
+
+==== BB 675 (0x3A96B792) in 12601B, out 69041B, BBs exec'd 0 ====
+ 0x3A96B792: movl $0x0, -60(%ebp)
+ 0x3A96B799: leal 0xFFFFFD5C(%ebx), %esi
+ 0x3A96B79F: nop
+ 0x3A96B7A0: movl %esi,4(%esp,,)
+ 0x3A96B7A4: movl -56(%ebp),%ecx
+ 0x3A96B7A7: movl %ecx,(%esp,,)
+ 0x3A96B7AA: call 0x3A975280
+. 675 3A96B792 29
+. C7 45 C4 00 00 00 00 8D B3 5C FD FF FF 90 89 74 24 04 8B 4D C8 89 0C 24 E8 D1 9A 00 00
+
+==== BB 676 (0x3A96B7AF) in 12630B, out 69154B, BBs exec'd 0 ====
+ 0x3A96B7AF: testl %eax,%eax
+ 0x3A96B7B1: jz-32 0x3A96BBE0
+. 676 3A96B7AF 8
+. 85 C0 0F 84 29 04 00 00
+
+==== BB 677 (0x3A96B7B7) in 12638B, out 69213B, BBs exec'd 0 ====
+ 0x3A96B7B7: incl -60(%ebp)
+ 0x3A96B7BA: addl $0x5, %esi
+ 0x3A96B7BD: cmpl $0x3, -60(%ebp)
+ 0x3A96B7C1: jle-8 0x3A96B7A0
+. 677 3A96B7B7 12
+. FF 45 C4 83 C6 05 83 7D C4 03 7E DD
+
+==== BB 678 (0x3A96B7A0) in 12650B, out 69303B, BBs exec'd 0 ====
+ 0x3A96B7A0: movl %esi,4(%esp,,)
+ 0x3A96B7A4: movl -56(%ebp),%ecx
+ 0x3A96B7A7: movl %ecx,(%esp,,)
+ 0x3A96B7AA: call 0x3A975280
+. 678 3A96B7A0 15
+. 89 74 24 04 8B 4D C8 89 0C 24 E8 D1 9A 00 00
+
+==== BB 679 (0x3A9752B7) in 12665B, out 69384B, BBs exec'd 0 ====
+ 0x3A9752B7: movzbl -5(%ebp),%edx
+ 0x3A9752BB: negl %edx
+ 0x3A9752BD: movl %edx,%eax
+ 0x3A9752BF: popl %edx
+ 0x3A9752C0: popl %esi
+ 0x3A9752C1: popl %ebp
+ 0x3A9752C2: ret
+. 679 3A9752B7 12
+. 0F B6 55 FB F7 DA 89 D0 5A 5E 5D C3
+
+==== BB 680 (0x3A96BBE0) in 12677B, out 69490B, BBs exec'd 0 ====
+ 0x3A96BBE0: movl -60(%ebp),%eax
+ 0x3A96BBE3: addl $0x30, %eax
+ 0x3A96BBE6: jmp 0x3A96B7C8
+. 680 3A96BBE0 11
+. 8B 45 C4 83 C0 30 E9 DD FB FF FF
+
+==== BB 681 (0x3A96B7C8) in 12688B, out 69545B, BBs exec'd 0 ====
+ 0x3A96B7C8: movl %eax,-52(%ebp)
+ 0x3A96B7CB: cdqq
+ 0x3A96B7CC: movl -52(%ebp),%eax
+ 0x3A96B7CF: movl %edx,-48(%ebp)
+ 0x3A96B7D2: movl -48(%ebp),%esi
+ 0x3A96B7D5: andl %esi,%eax
+ 0x3A96B7D7: incl %eax
+ 0x3A96B7D8: jz-8 0x3A96B7F9
+. 681 3A96B7C8 18
+. 89 45 CC 99 8B 45 CC 89 55 D0 8B 75 D0 21 F0 40 74 1F
+
+==== BB 682 (0x3A96B7DA) in 12706B, out 69665B, BBs exec'd 0 ====
+ 0x3A96B7DA: movzbl -52(%ebp),%ecx
+ 0x3A96B7DE: movl $0x1,%eax
+ 0x3A96B7E3: xorl %edx, %edx
+ 0x3A96B7E5: shldl %cl, %eax, %edx
+ 0x3A96B7E8: shll %cl, %eax
+ 0x3A96B7EA: testb $0x20, %cl
+ 0x3A96B7ED: jz-8 0x3A96B7F3
+. 682 3A96B7DA 21
+. 0F B6 4D CC B8 01 00 00 00 31 D2 0F A5 C2 D3 E0 F6 C1 20 74 04
+
+==== BB 683 (0x3A96B7EF) in 12727B, out 69815B, BBs exec'd 0 ====
+ 0x3A96B7EF: movl %eax,%edx
+ 0x3A96B7F1: xorl %eax, %eax
+ 0x3A96B7F3: movl %eax,-52(%ebp)
+ 0x3A96B7F6: movl %edx,-48(%ebp)
+ 0x3A96B7F9: movl $0x0, -20(%ebp)
+ 0x3A96B800: movl -44(%ebp),%edx
+ 0x3A96B803: movl 20(%edx),%ecx
+ 0x3A96B806: decl %ecx
+ 0x3A96B807: cmpl %ecx,-20(%ebp)
+ 0x3A96B80A: movl %ecx,-24(%ebp)
+ 0x3A96B80D: jle-8 0x3A96B82A
+. 683 3A96B7EF 32
+. 89 C2 31 C0 89 45 CC 89 55 D0 C7 45 EC 00 00 00 00 8B 55 D4 8B 4A 14 49 39 4D EC 89 4D E8 7E 1B
+
+==== BB 684 (0x3A96B82A) in 12759B, out 69977B, BBs exec'd 0 ====
+ 0x3A96B82A: movl -20(%ebp),%eax
+ 0x3A96B82D: movl -24(%ebp),%ecx
+ 0x3A96B830: addl %ecx,%eax
+ 0x3A96B832: movl %eax,%edx
+ 0x3A96B834: shrl $0x1F, %edx
+ 0x3A96B837: leal (%edx,%eax,1), %esi
+ 0x3A96B83A: sarl $0x1, %esi
+ 0x3A96B83C: leal (%esi,%esi,2), %eax
+ 0x3A96B83F: shll $0x3, %eax
+ 0x3A96B842: movl %eax,-64(%ebp)
+ 0x3A96B845: movl 52(%edi,%eax,1),%eax
+ 0x3A96B849: cmpl -32(%ebp),%eax
+ 0x3A96B84C: jnb-32 0x3A96BB50
+. 684 3A96B82A 40
+. 8B 45 EC 8B 4D E8 01 C8 89 C2 C1 EA 1F 8D 34 02 D1 FE 8D 04 76 C1 E0 03 89 45 C0 8B 44 07 34 3B 45 E0 0F 83 FE 02 00 00
+
+==== BB 685 (0x3A96B852) in 12799B, out 70151B, BBs exec'd 0 ====
+ 0x3A96B852: movl -44(%ebp),%edx
+ 0x3A96B855: addl %eax,%edx
+ 0x3A96B857: movl -16(%ebp),%eax
+ 0x3A96B85A: call 0x3A96B5B0
+. 685 3A96B852 13
+. 8B 55 D4 01 C2 8B 45 F0 E8 51 FD FF FF
+
+==== BB 686 _dl_cache_libcmp(0x3A96B5B0) in 12812B, out 70236B, BBs exec'd 0 ====
+ 0x3A96B5B0: pushl %ebp
+ 0x3A96B5B1: movl %esp,%ebp
+ 0x3A96B5B3: pushl %edi
+ 0x3A96B5B4: movl %eax,%edi
+ 0x3A96B5B6: pushl %esi
+ 0x3A96B5B7: subl $0xC, %esp
+ 0x3A96B5BA: movl %edx,-12(%ebp)
+ 0x3A96B5BD: movzbl (%eax),%eax
+ 0x3A96B5C0: testb %al,%al
+ 0x3A96B5C2: movb %al,-17(%ebp)
+ 0x3A96B5C5: jz-32 0x3A96B6AA
+. 686 3A96B5B0 27
+. 55 89 E5 57 89 C7 56 83 EC 0C 89 55 F4 0F B6 00 84 C0 88 45 EF 0F 84 DF 00 00 00
+
+==== BB 687 (0x3A96B5CB) in 12839B, out 70417B, BBs exec'd 0 ====
+ 0x3A96B5CB: movzbl (%edx),%ecx
+ 0x3A96B5CE: movzbl -17(%ebp),%eax
+ 0x3A96B5D2: subb $0x30, %al
+ 0x3A96B5D4: cmpb $0x9, %al
+ 0x3A96B5D6: jnbe-32 0x3A96B686
+. 687 3A96B5CB 17
+. 0F B6 0A 0F B6 45 EF 2C 30 3C 09 0F 87 AA 00 00 00
+
+==== BB 688 (0x3A96B686) in 12856B, out 70520B, BBs exec'd 0 ====
+ 0x3A96B686: movb %cl,%al
+ 0x3A96B688: movl $0xFFFFFFFF,%edx
+ 0x3A96B68D: subb $0x30, %al
+ 0x3A96B68F: cmpb $0x9, %al
+ 0x3A96B691: jbe-8 0x3A96B6B9
+. 688 3A96B686 13
+. 88 C8 BA FF FF FF FF 2C 30 3C 09 76 26
+
+==== BB 689 (0x3A96B693) in 12869B, out 70615B, BBs exec'd 0 ====
+ 0x3A96B693: cmpb %cl,-17(%ebp)
+ 0x3A96B696: jnz-8 0x3A96B6B0
+. 689 3A96B693 5
+. 38 4D EF 75 18
+
+==== BB 690 (0x3A96B698) in 12874B, out 70678B, BBs exec'd 0 ====
+ 0x3A96B698: incl -12(%ebp)
+ 0x3A96B69B: incl %edi
+ 0x3A96B69C: movl -12(%ebp),%eax
+ 0x3A96B69F: movzbl (%edi),%ecx
+ 0x3A96B6A2: movb %cl,-17(%ebp)
+ 0x3A96B6A5: movzbl (%eax),%ecx
+ 0x3A96B6A8: jmp-8 0x3A96B672
+. 690 3A96B698 18
+. FF 45 F4 47 8B 45 F4 0F B6 0F 88 4D EF 0F B6 08 EB C8
+
+==== BB 691 (0x3A96B672) in 12892B, out 70788B, BBs exec'd 0 ====
+ 0x3A96B672: cmpb $0x0, -17(%ebp)
+ 0x3A96B676: jz-8 0x3A96B6B0
+. 691 3A96B672 6
+. 80 7D EF 00 74 38
+
+==== BB 692 (0x3A96B678) in 12898B, out 70851B, BBs exec'd 0 ====
+ 0x3A96B678: movzbl -17(%ebp),%eax
+ 0x3A96B67C: subb $0x30, %al
+ 0x3A96B67E: cmpb $0x9, %al
+ 0x3A96B680: jbe-32 0x3A96B5E0
+. 692 3A96B678 14
+. 0F B6 45 EF 2C 30 3C 09 0F 86 5A FF FF FF
+
+==== BB 693 (0x3A96B6B0) in 12912B, out 70939B, BBs exec'd 0 ====
+ 0x3A96B6B0: movsbl -17(%ebp),%edx
+ 0x3A96B6B4: movsbl %cl,%eax
+ 0x3A96B6B7: subl %eax,%edx
+ 0x3A96B6B9: addl $0xC, %esp
+ 0x3A96B6BC: movl %edx,%eax
+ 0x3A96B6BE: popl %esi
+ 0x3A96B6BF: popl %edi
+ 0x3A96B6C0: popl %ebp
+ 0x3A96B6C1: ret
+. 693 3A96B6B0 18
+. 0F BE 55 EF 0F BE C1 29 C2 83 C4 0C 89 D0 5E 5F 5D C3
+
+==== BB 694 (0x3A96B85F) in 12930B, out 71078B, BBs exec'd 0 ====
+ 0x3A96B85F: testl %eax,%eax
+ 0x3A96B861: jz-32 0x3A96BC8C
+. 694 3A96B85F 8
+. 85 C0 0F 84 25 04 00 00
+
+==== BB 695 (0x3A96B867) in 12938B, out 71137B, BBs exec'd 0 ====
+ 0x3A96B867: testl %eax,%eax
+ 0x3A96B869: jns-8 0x3A96B814
+. 695 3A96B867 4
+. 85 C0 79 A9
+
+==== BB 696 (0x3A96B86B) in 12942B, out 71196B, BBs exec'd 0 ====
+ 0x3A96B86B: incl %esi
+ 0x3A96B86C: movl %esi,-20(%ebp)
+ 0x3A96B86F: nop
+ 0x3A96B870: jmp-8 0x3A96B818
+. 696 3A96B86B 7
+. 46 89 75 EC 90 EB A6
+
+==== BB 697 (0x3A96B818) in 12949B, out 71260B, BBs exec'd 0 ====
+ 0x3A96B818: movl -24(%ebp),%ecx
+ 0x3A96B81B: cmpl %ecx,-20(%ebp)
+ 0x3A96B81E: jnle-32 0x3A96BB50
+. 697 3A96B818 12
+. 8B 4D E8 39 4D EC 0F 8F 2C 03 00 00
+
+==== BB 698 (0x3A96B824) in 12961B, out 71335B, BBs exec'd 0 ====
+ 0x3A96B824: movl 0xE0(%ebx),%edi
+ 0x3A96B82A: movl -20(%ebp),%eax
+ 0x3A96B82D: movl -24(%ebp),%ecx
+ 0x3A96B830: addl %ecx,%eax
+ 0x3A96B832: movl %eax,%edx
+ 0x3A96B834: shrl $0x1F, %edx
+ 0x3A96B837: leal (%edx,%eax,1), %esi
+ 0x3A96B83A: sarl $0x1, %esi
+ 0x3A96B83C: leal (%esi,%esi,2), %eax
+ 0x3A96B83F: shll $0x3, %eax
+ 0x3A96B842: movl %eax,-64(%ebp)
+ 0x3A96B845: movl 52(%edi,%eax,1),%eax
+ 0x3A96B849: cmpl -32(%ebp),%eax
+ 0x3A96B84C: jnb-32 0x3A96BB50
+. 698 3A96B824 46
+. 8B BB E0 00 00 00 8B 45 EC 8B 4D E8 01 C8 89 C2 C1 EA 1F 8D 34 02 D1 FE 8D 04 76 C1 E0 03 89 45 C0 8B 44 07 34 3B 45 E0 0F 83 FE 02 00 00
+
+==== BB 699 (0x3A96B814) in 13007B, out 71525B, BBs exec'd 0 ====
+ 0x3A96B814: decl %esi
+ 0x3A96B815: movl %esi,-24(%ebp)
+ 0x3A96B818: movl -24(%ebp),%ecx
+ 0x3A96B81B: cmpl %ecx,-20(%ebp)
+ 0x3A96B81E: jnle-32 0x3A96BB50
+. 699 3A96B814 16
+. 4E 89 75 E8 8B 4D E8 39 4D EC 0F 8F 2C 03 00 00
+
+==== BB 700 (0x3A96B5E0) in 13023B, out 71621B, BBs exec'd 0 ====
+ 0x3A96B5E0: movb %cl,%al
+ 0x3A96B5E2: movl $0x1,%edx
+ 0x3A96B5E7: subb $0x30, %al
+ 0x3A96B5E9: cmpb $0x9, %al
+ 0x3A96B5EB: jnbe-32 0x3A96B6B9
+. 700 3A96B5E0 17
+. 88 C8 BA 01 00 00 00 2C 30 3C 09 0F 87 C8 00 00 00
+
+==== BB 701 (0x3A96B5F1) in 13040B, out 71716B, BBs exec'd 0 ====
+ 0x3A96B5F1: movsbl -17(%ebp),%eax
+ 0x3A96B5F5: incl %edi
+ 0x3A96B5F6: incl -12(%ebp)
+ 0x3A96B5F9: subl $0x30, %eax
+ 0x3A96B5FC: movl %eax,-16(%ebp)
+ 0x3A96B5FF: movsbl %cl,%eax
+ 0x3A96B602: leal -48(%eax), %esi
+ 0x3A96B605: movzbl (%edi),%ecx
+ 0x3A96B608: movb %cl,%al
+ 0x3A96B60A: movb %cl,-17(%ebp)
+ 0x3A96B60D: subb $0x30, %al
+ 0x3A96B60F: movb %cl,%dl
+ 0x3A96B611: cmpb $0x9, %al
+ 0x3A96B613: jnbe-8 0x3A96B63F
+. 701 3A96B5F1 36
+. 0F BE 45 EF 47 FF 45 F4 83 E8 30 89 45 F0 0F BE C1 8D 70 D0 0F B6 0F 88 C8 88 4D EF 2C 30 88 CA 3C 09 77 2A
+
+==== BB 702 (0x3A96B63F) in 13076B, out 71924B, BBs exec'd 0 ====
+ 0x3A96B63F: movl -12(%ebp),%eax
+ 0x3A96B642: movzbl (%eax),%ecx
+ 0x3A96B645: movb %cl,%al
+ 0x3A96B647: movb %cl,%dl
+ 0x3A96B649: subb $0x30, %al
+ 0x3A96B64B: cmpb $0x9, %al
+ 0x3A96B64D: jnbe-8 0x3A96B66D
+. 702 3A96B63F 16
+. 8B 45 F4 0F B6 08 88 C8 88 CA 2C 30 3C 09 77 1E
+
+==== BB 703 (0x3A96B66D) in 13092B, out 72050B, BBs exec'd 0 ====
+ 0x3A96B66D: cmpl %esi,-16(%ebp)
+ 0x3A96B670: jnz-8 0x3A96B6C2
+. 703 3A96B66D 5
+. 39 75 F0 75 50
+
+==== BB 704 (0x3A96BC8C) in 13097B, out 72113B, BBs exec'd 0 ====
+ 0x3A96BC8C: movl %esi,-20(%ebp)
+ 0x3A96BC8F: testl %esi,%esi
+ 0x3A96BC91: jle-32 0x3A96BA2A
+. 704 3A96BC8C 11
+. 89 75 EC 85 F6 0F 8E 93 FD FF FF
+
+==== BB 705 (0x3A96BC97) in 13108B, out 72185B, BBs exec'd 0 ====
+ 0x3A96BC97: movl -64(%ebp),%ecx
+ 0x3A96BC9A: movl %ecx,-92(%ebp)
+ 0x3A96BC9D: leal 0(%esi), %esi
+ 0x3A96BCA0: movl 0xE0(%ebx),%edi
+ 0x3A96BCA6: movl -92(%ebp),%edx
+ 0x3A96BCA9: movl 28(%edi,%edx,1),%eax
+ 0x3A96BCAD: cmpl -32(%ebp),%eax
+ 0x3A96BCB0: jnb-32 0x3A96BA30
+. 705 3A96BC97 31
+. 8B 4D C0 89 4D A4 8D 76 00 8B BB E0 00 00 00 8B 55 A4 8B 44 17 1C 3B 45 E0 0F 83 7A FD FF FF
+
+==== BB 706 (0x3A96BCB6) in 13139B, out 72329B, BBs exec'd 0 ====
+ 0x3A96BCB6: movl -44(%ebp),%edx
+ 0x3A96BCB9: addl %eax,%edx
+ 0x3A96BCBB: movl -16(%ebp),%eax
+ 0x3A96BCBE: call 0x3A96B5B0
+. 706 3A96BCB6 13
+. 8B 55 D4 01 C2 8B 45 F0 E8 ED F8 FF FF
+
+==== BB 707 (0x3A96BCC3) in 13152B, out 72414B, BBs exec'd 0 ====
+ 0x3A96BCC3: testl %eax,%eax
+ 0x3A96BCC5: jnz-32 0x3A96BA2A
+. 707 3A96BCC3 8
+. 85 C0 0F 85 5F FD FF FF
+
+==== BB 708 (0x3A96BA2A) in 13160B, out 72473B, BBs exec'd 0 ====
+ 0x3A96BA2A: movl 0xE0(%ebx),%edi
+ 0x3A96BA30: cmpl -20(%ebp),%esi
+ 0x3A96BA33: leal (%esi,%esi,2), %eax
+ 0x3A96BA36: leal (%edi,%eax,8), %edi
+ 0x3A96BA39: leal 48(%edi), %ecx
+ 0x3A96BA3C: movl %ecx,-68(%ebp)
+ 0x3A96BA3F: jle-8 0x3A96BA62
+. 708 3A96BA2A 23
+. 8B BB E0 00 00 00 3B 75 EC 8D 04 76 8D 3C C7 8D 4F 30 89 4D BC 7E 21
+
+==== BB 709 (0x3A96BA62) in 13183B, out 72602B, BBs exec'd 0 ====
+ 0x3A96BA62: movl 48(%edi),%ecx
+ 0x3A96BA65: cmpl $0x1, %ecx
+ 0x3A96BA68: setz %al
+ 0x3A96BA6B: cmpl $0x3, %ecx
+ 0x3A96BA6E: setz %dl
+ 0x3A96BA71: orl %edx,%eax
+ 0x3A96BA73: testb $0x1, %al
+ 0x3A96BA75: jz-8 0x3A96BA20
+. 709 3A96BA62 21
+. 8B 4F 30 83 F9 01 0F 94 C0 83 F9 03 0F 94 C2 09 D0 A8 01 74 A9
+
+==== BB 710 (0x3A96BA77) in 13204B, out 72740B, BBs exec'd 0 ====
+ 0x3A96BA77: movl -68(%ebp),%eax
+ 0x3A96BA7A: movl 8(%eax),%edi
+ 0x3A96BA7D: cmpl -32(%ebp),%edi
+ 0x3A96BA80: jnb-8 0x3A96BA20
+. 710 3A96BA77 11
+. 8B 45 BC 8B 78 08 3B 7D E0 73 9E
+
+==== BB 711 (0x3A96BA82) in 13215B, out 72828B, BBs exec'd 0 ====
+ 0x3A96BA82: movl -36(%ebp),%edx
+ 0x3A96BA85: testl %edx,%edx
+ 0x3A96BA87: jz-8 0x3A96BA91
+. 711 3A96BA82 7
+. 8B 55 DC 85 D2 74 08
+
+==== BB 712 (0x3A96BA91) in 13222B, out 72900B, BBs exec'd 0 ====
+ 0x3A96BA91: movl 0xFFFFFC1C(%ebx),%eax
+ 0x3A96BA97: testl %eax,%eax
+ 0x3A96BA99: jz-8 0x3A96BAA7
+. 712 3A96BA91 10
+. 8B 83 1C FC FF FF 85 C0 74 0C
+
+==== BB 713 (0x3A96BA9B) in 13232B, out 72975B, BBs exec'd 0 ====
+ 0x3A96BA9B: movl -68(%ebp),%edx
+ 0x3A96BA9E: cmpl %eax,12(%edx)
+ 0x3A96BAA1: jnbe-32 0x3A96BA20
+. 713 3A96BA9B 12
+. 8B 55 BC 39 42 0C 0F 87 79 FF FF FF
+
+==== BB 714 (0x3A96BAA7) in 13244B, out 73051B, BBs exec'd 0 ====
+ 0x3A96BAA7: movl -48(%ebp),%edx
+ 0x3A96BAAA: movl -52(%ebp),%eax
+ 0x3A96BAAD: notl %edx
+ 0x3A96BAAF: notl %eax
+ 0x3A96BAB1: orl %eax,%edx
+ 0x3A96BAB3: jz-32 0x3A96BCD9
+. 714 3A96BAA7 18
+. 8B 55 D0 8B 45 CC F7 D2 F7 D0 09 C2 0F 84 20 02 00 00
+
+==== BB 715 (0x3A96BAB9) in 13262B, out 73145B, BBs exec'd 0 ====
+ 0x3A96BAB9: movl $0x0, -76(%ebp)
+ 0x3A96BAC0: movl -68(%ebp),%edx
+ 0x3A96BAC3: movl 16(%edx),%eax
+ 0x3A96BAC6: movl 20(%edx),%edx
+ 0x3A96BAC9: movl %eax,-88(%ebp)
+ 0x3A96BACC: movl %edx,-84(%ebp)
+ 0x3A96BACF: andl $0xF0000, %edx
+ 0x3A96BAD5: movl %edx,%eax
+ 0x3A96BAD7: orl -76(%ebp),%eax
+ 0x3A96BADA: movl %edx,-72(%ebp)
+ 0x3A96BADD: jz-8 0x3A96BAF1
+. 715 3A96BAB9 38
+. C7 45 B4 00 00 00 00 8B 55 BC 8B 42 10 8B 52 14 89 45 A8 89 55 AC 81 E2 00 00 0F 00 89 D0 0B 45 B4 89 55 B8 74 12
+
+==== BB 716 (0x3A96BAF1) in 13300B, out 73306B, BBs exec'd 0 ====
+ 0x3A96BAF1: movl 0xFFFFFC54(%ebx),%eax
+ 0x3A96BAF7: xorl %edx, %edx
+ 0x3A96BAF9: orl $0xF0000, %edx
+ 0x3A96BAFF: movl %edx,-100(%ebp)
+ 0x3A96BB02: movl %eax,%edx
+ 0x3A96BB04: movl -100(%ebp),%eax
+ 0x3A96BB07: notl %edx
+ 0x3A96BB09: movl %edx,-104(%ebp)
+ 0x3A96BB0C: notl %eax
+ 0x3A96BB0E: movl -88(%ebp),%edx
+ 0x3A96BB11: movl %eax,-100(%ebp)
+ 0x3A96BB14: movl -104(%ebp),%eax
+ 0x3A96BB17: andl %eax,%edx
+ 0x3A96BB19: movl %edx,-104(%ebp)
+ 0x3A96BB1C: movl -84(%ebp),%eax
+ 0x3A96BB1F: movl -100(%ebp),%edx
+ 0x3A96BB22: andl %edx,%eax
+ 0x3A96BB24: movl %eax,%edx
+ 0x3A96BB26: orl -104(%ebp),%edx
+ 0x3A96BB29: movl %eax,-100(%ebp)
+ 0x3A96BB2C: jnz-32 0x3A96BA20
+. 716 3A96BAF1 65
+. 8B 83 54 FC FF FF 31 D2 81 CA 00 00 0F 00 89 55 9C 89 C2 8B 45 9C F7 D2 89 55 98 F7 D0 8B 55 A8 89 45 9C 8B 45 98 21 C2 89 55 98 8B 45 AC 8B 55 9C 21 D0 89 C2 0B 55 98 89 45 9C 0F 85 EE FE FF FF
+
+==== BB 717 (0x3A96BB32) in 13365B, out 73550B, BBs exec'd 0 ====
+ 0x3A96BB32: movl -44(%ebp),%eax
+ 0x3A96BB35: addl %eax,%edi
+ 0x3A96BB37: cmpl 0xFFFFFC50(%ebx),%ecx
+ 0x3A96BB3D: movl %edi,-36(%ebp)
+ 0x3A96BB40: jnz-32 0x3A96BA20
+. 717 3A96BB32 20
+. 8B 45 D4 01 C7 3B 8B 50 FC FF FF 89 7D DC 0F 85 DA FE FF FF
+
+==== BB 718 (0x3A96BB46) in 13385B, out 73656B, BBs exec'd 0 ====
+ 0x3A96BB46: leal 0(%esi), %esi
+ 0x3A96BB49: leal 0(%edi,,), %edi
+ 0x3A96BB50: testb $0x1, 0xFFFFFC14(%ebx)
+ 0x3A96BB57: jnz-8 0x3A96BBBF
+. 718 3A96BB46 19
+. 8D 76 00 8D BC 27 00 00 00 00 F6 83 14 FC FF FF 01 75 66
+
+==== BB 719 (0x3A96BB59) in 13404B, out 73752B, BBs exec'd 0 ====
+ 0x3A96BB59: movl -36(%ebp),%eax
+ 0x3A96BB5C: addl $0x64, %esp
+ 0x3A96BB5F: popl %ebx
+ 0x3A96BB60: popl %esi
+ 0x3A96BB61: popl %edi
+ 0x3A96BB62: popl %ebp
+ 0x3A96BB63: ret
+. 719 3A96BB59 11
+. 8B 45 DC 83 C4 64 5B 5E 5F 5D C3
+
+==== BB 720 (0x3A96B3A0) in 13415B, out 73874B, BBs exec'd 0 ====
+ 0x3A96B3A0: movl %eax,0xFFFFFDC4(%ebp)
+ 0x3A96B3A6: testl %eax,%eax
+ 0x3A96B3A8: jz-32 0x3A96B438
+. 720 3A96B3A0 14
+. 89 85 C4 FD FF FF 85 C0 0F 84 8A 00 00 00
+
+==== BB 721 (0x3A96B3AE) in 13429B, out 73949B, BBs exec'd 0 ====
+ 0x3A96B3AE: movl 0xFFFFFDD8(%ebp),%esi
+ 0x3A96B3B4: testl %esi,%esi
+ 0x3A96B3B6: jz-32 0x3A96B4F3
+. 721 3A96B3AE 14
+. 8B B5 D8 FD FF FF 85 F6 0F 84 37 01 00 00
+
+==== BB 722 (0x3A96B3BC) in 13443B, out 74024B, BBs exec'd 0 ====
+ 0x3A96B3BC: testb $0x8, 0x1E9(%esi)
+ 0x3A96B3C3: jnz-32 0x3A96B511
+. 722 3A96B3BC 13
+. F6 86 E9 01 00 00 08 0F 85 48 01 00 00
+
+==== BB 723 (0x3A96B3C9) in 13456B, out 74094B, BBs exec'd 0 ====
+ 0x3A96B3C9: movl 0xFFFFFDC4(%ebp),%eax
+ 0x3A96B3CF: testl %eax,%eax
+ 0x3A96B3D1: jz-8 0x3A96B438
+. 723 3A96B3C9 10
+. 8B 85 C4 FD FF FF 85 C0 74 65
+
+==== BB 724 (0x3A96B3D3) in 13466B, out 74169B, BBs exec'd 0 ====
+ 0x3A96B3D3: movl 0xFFFFFDC4(%ebp),%eax
+ 0x3A96B3D9: leal 0xFFFFFDE4(%ebp), %edx
+ 0x3A96B3DF: movl %edx,0xFFFFFDB8(%ebp)
+ 0x3A96B3E5: call 0x3A968F20
+. 724 3A96B3D3 23
+. 8B 85 C4 FD FF FF 8D 95 E4 FD FF FF 89 95 B8 FD FF FF E8 36 DB FF FF
+
+==== BB 725 (0x3A969041) in 13489B, out 74259B, BBs exec'd 0 ====
+ 0x3A969041: cmpl $0x20, 16(%edi)
+ 0x3A969045: jnz-8 0x3A969021
+. 725 3A969041 6
+. 83 7F 10 20 75 DA
+
+==== BB 726 (0x3A969047) in 13495B, out 74322B, BBs exec'd 0 ====
+ 0x3A969047: cmpl $0x3, 28(%edi)
+ 0x3A96904B: jbe-8 0x3A969021
+. 726 3A969047 6
+. 83 7F 1C 03 76 D4
+
+==== BB 727 (0x3A96904D) in 13501B, out 74385B, BBs exec'd 0 ====
+ 0x3A96904D: movl 4(%edi),%eax
+ 0x3A969050: movl -52(%ebp),%ecx
+ 0x3A969053: leal 32(%eax), %edx
+ 0x3A969056: cmpl (%ecx),%edx
+ 0x3A969058: leal 4(%eax,%ecx,1), %eax
+ 0x3A96905C: movl %eax,-76(%ebp)
+ 0x3A96905F: jnbe-32 0x3A96915B
+. 727 3A96904D 24
+. 8B 47 04 8B 4D CC 8D 50 20 3B 11 8D 44 08 04 89 45 B4 0F 87 F6 00 00 00
+
+==== BB 728 (0x3A969065) in 13525B, out 74504B, BBs exec'd 0 ====
+ 0x3A969065: cld
+ 0x3A969066: movl -76(%ebp),%esi
+ 0x3A969069: movl $0x10,%edx
+ 0x3A96906E: leal 0xFFFFD638(%ebx), %edi
+ 0x3A969074: movl %edx,%ecx
+ 0x3A969076: repe cmpsb
+. 728 3A969065 19
+. FC 8B 75 B4 BA 10 00 00 00 8D BB 38 D6 FF FF 89 D1 F3 A6
+
+==== BB 729 (0x3A969076) in 13544B, out 74677B, BBs exec'd 0 ====
+ 0x3A969076: repe cmpsb
+. 729 3A969076 2
+. F3 A6
+
+==== BB 730 (0x3A969078) in 13546B, out 74802B, BBs exec'd 0 ====
+ 0x3A969078: jz-32 0x3A969104
+. 730 3A969078 6
+. 0F 84 86 00 00 00
+
+==== BB 731 (0x3A969104) in 13552B, out 74849B, BBs exec'd 0 ====
+ 0x3A969104: movl -76(%ebp),%esi
+ 0x3A969107: movzbl 20(%esi),%eax
+ 0x3A96910B: movzbl 24(%esi),%edx
+ 0x3A96910F: shll $0x8, %eax
+ 0x3A969112: addl %edx,%eax
+ 0x3A969114: movzbl 28(%esi),%edx
+ 0x3A969118: shll $0x8, %eax
+ 0x3A96911B: movl 16(%esi),%esi
+ 0x3A96911E: addl %edx,%eax
+ 0x3A969120: testl %esi,%esi
+ 0x3A969122: jnz-8 0x3A969132
+. 731 3A969104 32
+. 8B 75 B4 0F B6 46 14 0F B6 56 18 C1 E0 08 01 D0 0F B6 56 1C C1 E0 08 8B 76 10 01 D0 85 F6 75 0E
+
+==== BB 732 (0x3A969124) in 13584B, out 74993B, BBs exec'd 0 ====
+ 0x3A969124: movl 0xFFFFFC1C(%ebx),%edx
+ 0x3A96912A: testl %edx,%edx
+ 0x3A96912C: jz-8 0x3A969150
+. 732 3A969124 10
+. 8B 93 1C FC FF FF 85 D2 74 22
+
+==== BB 733 (0x3A96912E) in 13594B, out 75068B, BBs exec'd 0 ====
+ 0x3A96912E: cmpl %eax,%edx
+ 0x3A969130: jnb-8 0x3A969150
+. 733 3A96912E 4
+. 39 C2 73 1E
+
+==== BB 734 (0x3A96B3EA) in 13598B, out 75125B, BBs exec'd 0 ====
+ 0x3A96B3EA: movl %eax,0xFFFFFDCC(%ebp)
+ 0x3A96B3F0: incl %eax
+ 0x3A96B3F1: jz-8 0x3A96B445
+. 734 3A96B3EA 9
+. 89 85 CC FD FF FF 40 74 52
+
+==== BB 735 (0x3A96B3F3) in 13607B, out 75203B, BBs exec'd 0 ====
+ 0x3A96B3F3: movl 0xFFFFFDC4(%ebp),%ecx
+ 0x3A96B3F9: movl %ecx,(%esp,,)
+ 0x3A96B3FC: call 0x3A9752D0
+. 735 3A96B3F3 14
+. 8B 8D C4 FD FF FF 89 0C 24 E8 CF 9E 00 00
+
+==== BB 736 (0x3A96B401) in 13621B, out 75274B, BBs exec'd 0 ====
+ 0x3A96B401: leal 1(%eax), %esi
+ 0x3A96B404: movl %esi,(%esp,,)
+ 0x3A96B407: call 0x3A96581C
+. 736 3A96B401 11
+. 8D 70 01 89 34 24 E8 10 A4 FF FF
+
+==== BB 737 (0x3A96B40C) in 13632B, out 75339B, BBs exec'd 0 ====
+ 0x3A96B40C: movl %eax,%edx
+ 0x3A96B40E: xorl %eax, %eax
+ 0x3A96B410: testl %edx,%edx
+ 0x3A96B412: jz-8 0x3A96B42A
+. 737 3A96B40C 8
+. 89 C2 31 C0 85 D2 74 16
+
+==== BB 738 (0x3A96B414) in 13640B, out 75419B, BBs exec'd 0 ====
+ 0x3A96B414: movl %esi,8(%esp,,)
+ 0x3A96B418: movl 0xFFFFFDC4(%ebp),%eax
+ 0x3A96B41E: movl %edx,(%esp,,)
+ 0x3A96B421: movl %eax,4(%esp,,)
+ 0x3A96B425: call 0x3A975870
+. 738 3A96B414 22
+. 89 74 24 08 8B 85 C4 FD FF FF 89 14 24 89 44 24 04 E8 46 A4 00 00
+
+==== BB 739 (0x3A96B42A) in 13662B, out 75516B, BBs exec'd 0 ====
+ 0x3A96B42A: movl %eax,0xFFFFFDE0(%ebp)
+ 0x3A96B430: testl %eax,%eax
+ 0x3A96B432: jz-32 0x3A96B580
+. 739 3A96B42A 14
+. 89 85 E0 FD FF FF 85 C0 0F 84 48 01 00 00
+
+==== BB 740 (0x3A96B438) in 13676B, out 75591B, BBs exec'd 0 ====
+ 0x3A96B438: cmpl $0xFFFFFFFF, 0xFFFFFDCC(%ebp)
+ 0x3A96B43F: jnz-32 0x3A96B24B
+. 740 3A96B438 13
+. 83 BD CC FD FF FF FF 0F 85 06 FE FF FF
+
+==== BB 741 (0x3A96B24B) in 13689B, out 75657B, BBs exec'd 0 ====
+ 0x3A96B24B: testb $0x1, 0xFFFFFC14(%ebx)
+ 0x3A96B252: jnz-32 0x3A96B4C3
+. 741 3A96B24B 13
+. F6 83 14 FC FF FF 01 0F 85 6B 02 00 00
+
+==== BB 742 (0x3A96B258) in 13702B, out 75727B, BBs exec'd 0 ====
+ 0x3A96B258: cmpl $0xFFFFFFFF, 0xFFFFFDCC(%ebp)
+ 0x3A96B25F: leal 0xFFFFFDE4(%ebp), %eax
+ 0x3A96B265: movl %eax,0xFFFFFDB8(%ebp)
+ 0x3A96B26B: jnz-32 0x3A96B030
+. 742 3A96B258 25
+. 83 BD CC FD FF FF FF 8D 85 E4 FD FF FF 89 85 B8 FD FF FF 0F 85 BF FD FF FF
+
+==== BB 743 (0x3A96CAC0) in 13727B, out 75819B, BBs exec'd 0 ====
+ 0x3A96CAC0: movl %eax,%edx
+ 0x3A96CAC2: movl 12(%eax),%eax
+ 0x3A96CAC5: testl %eax,%eax
+ 0x3A96CAC7: jnz-8 0x3A96CAC0
+. 743 3A96CAC0 9
+. 89 C2 8B 40 0C 85 C0 75 F7
+
+==== BB 744 (0x3A9699C5) in 13736B, out 75901B, BBs exec'd 0 ====
+ 0x3A9699C5: movl 8(%esi),%eax
+ 0x3A9699C8: movl -124(%ebp),%ecx
+ 0x3A9699CB: movl %eax,0x144(%ecx)
+ 0x3A9699D1: addl $0x20, %esi
+ 0x3A9699D4: cmpl 0xFFFFFF54(%ebp),%esi
+ 0x3A9699DA: jb-8 0x3A96998B
+. 744 3A9699C5 23
+. 8B 46 08 8B 4D 84 89 81 44 01 00 00 83 C6 20 3B B5 54 FF FF FF 72 AF
+
+==== BB 745 (0x3A969975) in 13759B, out 76018B, BBs exec'd 0 ====
+ 0x3A969975: leal 0(%esi,,), %esi
+ 0x3A969979: leal 0(%edi,,), %edi
+ 0x3A969980: addl $0x20, %esi
+ 0x3A969983: cmpl 0xFFFFFF54(%ebp),%esi
+ 0x3A969989: jnb-8 0x3A9699DC
+. 745 3A969975 22
+. 8D 74 26 00 8D BC 27 00 00 00 00 83 C6 20 3B B5 54 FF FF FF 73 51
+
+==== BB 746 (0x3A9699A2) in 13781B, out 76116B, BBs exec'd 0 ====
+ 0x3A9699A2: cmpl $0x6474E551, %eax
+ 0x3A9699A7: jnbe-32 0x3A969C07
+. 746 3A9699A2 11
+. 3D 51 E5 74 64 0F 87 5A 02 00 00
+
+==== BB 747 (0x3A9699AD) in 13792B, out 76176B, BBs exec'd 0 ====
+ 0x3A9699AD: cmpl $0x7, %eax
+ 0x3A9699B0: jnz-8 0x3A969980
+. 747 3A9699AD 5
+. 83 F8 07 75 CE
+
+==== BB 748 (0x3A969B31) in 13797B, out 76233B, BBs exec'd 0 ====
+ 0x3A969B31: movl 0xFFFFFF40(%ebp),%ecx
+ 0x3A969B37: cmpl %ecx,0xFFFFFF38(%ebp)
+ 0x3A969B3D: jbe-8 0x3A969B7B
+. 748 3A969B31 14
+. 8B 8D 40 FF FF FF 39 8D 38 FF FF FF 76 3C
+
+==== BB 749 (0x3A97571F) in 13811B, out 76314B, BBs exec'd 0 ====
+ 0x3A97571F: movl %edi,%ecx
+ 0x3A975721: negl %ecx
+ 0x3A975723: andl $0x3, %ecx
+ 0x3A975726: subl %ecx,%edx
+ 0x3A975728: rep stosb
+. 749 3A97571F 11
+. 89 F9 F7 D9 83 E1 03 29 CA F3 AA
+
+==== BB 750 (0x3A97572A) in 13822B, out 76438B, BBs exec'd 0 ====
+ 0x3A97572A: subl $0x20, %edx
+ 0x3A97572D: movl (%edi),%ecx
+ 0x3A97572F: nop
+ 0x3A975730: movl 28(%edi),%ecx
+ 0x3A975733: subl $0x20, %edx
+ 0x3A975736: movl %eax,0(%edi)
+ 0x3A975739: movl %eax,4(%edi)
+ 0x3A97573C: movl %eax,8(%edi)
+ 0x3A97573F: movl %eax,12(%edi)
+ 0x3A975742: movl %eax,16(%edi)
+ 0x3A975745: movl %eax,20(%edi)
+ 0x3A975748: movl %eax,24(%edi)
+ 0x3A97574B: movl %eax,28(%edi)
+ 0x3A97574E: leal 32(%edi), %edi
+ 0x3A975751: jnl-8 0x3A975730
+. 750 3A97572A 41
+. 83 EA 20 8B 0F 90 8B 4F 1C 83 EA 20 89 47 00 89 47 04 89 47 08 89 47 0C 89 47 10 89 47 14 89 47 18 89 47 1C 8D 7F 20 7D DD
+
+==== BB 751 (0x3A975730) in 13863B, out 76625B, BBs exec'd 0 ====
+ 0x3A975730: movl 28(%edi),%ecx
+ 0x3A975733: subl $0x20, %edx
+ 0x3A975736: movl %eax,0(%edi)
+ 0x3A975739: movl %eax,4(%edi)
+ 0x3A97573C: movl %eax,8(%edi)
+ 0x3A97573F: movl %eax,12(%edi)
+ 0x3A975742: movl %eax,16(%edi)
+ 0x3A975745: movl %eax,20(%edi)
+ 0x3A975748: movl %eax,24(%edi)
+ 0x3A97574B: movl %eax,28(%edi)
+ 0x3A97574E: leal 32(%edi), %edi
+ 0x3A975751: jnl-8 0x3A975730
+. 751 3A975730 35
+. 8B 4F 1C 83 EA 20 89 47 00 89 47 04 89 47 08 89 47 0C 89 47 10 89 47 14 89 47 18 89 47 1C 8D 7F 20 7D DD
+
+==== BB 752 (0x3A975753) in 13898B, out 76794B, BBs exec'd 0 ====
+ 0x3A975753: leal 32(%edx), %ecx
+ 0x3A975756: shrl $0x2, %ecx
+ 0x3A975759: rep stosl
+. 752 3A975753 8
+. 8D 4A 20 C1 E9 02 F3 AB
+
+==== BB 753 (0x3A96A171) in 13906B, out 76898B, BBs exec'd 0 ====
+ 0x3A96A171: xorl %eax, %eax
+ 0x3A96A173: movl %eax,20(%esp,,)
+ 0x3A96A177: movl $0xFFFFFFFF,%eax
+ 0x3A96A17C: movl %eax,16(%esp,,)
+ 0x3A96A180: movl $0x32,%eax
+ 0x3A96A185: movl %eax,12(%esp,,)
+ 0x3A96A189: movl 20(%edi),%eax
+ 0x3A96A18C: movl %eax,8(%esp,,)
+ 0x3A96A190: movl 0xFFFFFF38(%ebp),%edx
+ 0x3A96A196: subl %edx,0xFFFFFF3C(%ebp)
+ 0x3A96A19C: movl 0xFFFFFF3C(%ebp),%ecx
+ 0x3A96A1A2: movl %edx,(%esp,,)
+ 0x3A96A1A5: movl %ecx,4(%esp,,)
+ 0x3A96A1A9: call 0x3A974C50
+. 753 3A96A171 61
+. 31 C0 89 44 24 14 B8 FF FF FF FF 89 44 24 10 B8 32 00 00 00 89 44 24 0C 8B 47 14 89 44 24 08 8B 95 38 FF FF FF 29 95 3C FF FF FF 8B 8D 3C FF FF FF 89 14 24 89 4C 24 04 E8 A2 AA 00 00
+
+==== BB 754 (0x3A96A1AE) in 13967B, out 77102B, BBs exec'd 0 ====
+ 0x3A96A1AE: incl %eax
+ 0x3A96A1AF: jnz-32 0x3A969B8D
+. 754 3A96A1AE 7
+. 40 0F 85 D8 F9 FF FF
+
+==== BB 755 (0x3A969FDC) in 13974B, out 77164B, BBs exec'd 0 ====
+ 0x3A969FDC: movl -108(%ebp),%eax
+ 0x3A969FDF: movl -104(%ebp),%edx
+ 0x3A969FE2: movl -124(%ebp),%ecx
+ 0x3A969FE5: movl %eax,0x1BC(%ecx)
+ 0x3A969FEB: movl %edx,0x1C0(%ecx)
+ 0x3A969FF1: movl -20(%ebp),%eax
+ 0x3A969FF4: movl -16(%ebp),%edx
+ 0x3A969FF7: movl %eax,0x1C4(%ecx)
+ 0x3A969FFD: movl 0xFFFFFC00(%ebx),%eax
+ 0x3A96A003: movl %edx,0x1C8(%ecx)
+ 0x3A96A009: notl %eax
+ 0x3A96A00B: andl %eax,0xFFFFFF68(%ebp)
+ 0x3A96A011: testb $0x1, 0xFFFFFF68(%ebp)
+ 0x3A96A018: jnz-32 0x3A96A390
+. 755 3A969FDC 66
+. 8B 45 94 8B 55 98 8B 4D 84 89 81 BC 01 00 00 89 91 C0 01 00 00 8B 45 EC 8B 55 F0 89 81 C4 01 00 00 8B 83 00 FC FF FF 89 91 C8 01 00 00 F7 D0 21 85 68 FF FF FF F6 85 68 FF FF FF 01 0F 85 72 03 00 00
+
+==== BB 756 (0x3A96FEDE) in 14040B, out 77388B, BBs exec'd 0 ====
+ 0x3A96FEDE: movl %eax,20(%esi)
+ 0x3A96FEE1: subl $0xC, %esp
+ 0x3A96FEE4: movl -4(%ebp),%esi
+ 0x3A96FEE7: leave 0x3A96FEE8: ret
+. 756 3A96FEDE 11
+. 89 46 14 83 EC 0C 8B 75 FC C9 C3
+
+==== BB 757 (0x3A970246) in 14051B, out 77481B, BBs exec'd 0 ====
+ 0x3A970246: movl -28(%ebp),%eax
+ 0x3A970249: movl 0xFFFFFF18(%ebp),%edx
+ 0x3A97024F: movl 0xFFFFFF24(%ebp),%ecx
+ 0x3A970255: movl %eax,(%edx)
+ 0x3A970257: movl 0xFFFFFF20(%ebp),%eax
+ 0x3A97025D: movl $0x0, (%ecx)
+ 0x3A970263: movl $0x0, (%eax)
+ 0x3A970269: xorl %eax, %eax
+ 0x3A97026B: movl -12(%ebp),%ebx
+ 0x3A97026E: movl -8(%ebp),%esi
+ 0x3A970271: movl -4(%ebp),%edi
+ 0x3A970274: movl %ebp,%esp
+ 0x3A970276: popl %ebp
+ 0x3A970277: ret 4
+. 757 3A970246 52
+. 8B 45 E4 8B 95 18 FF FF FF 8B 8D 24 FF FF FF 89 02 8B 85 20 FF FF FF C7 01 00 00 00 00 C7 00 00 00 00 00 31 C0 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C2 04 00
+
+==== BB 758 (0x3A96F3A4) in 14103B, out 77677B, BBs exec'd 0 ====
+ 0x3A96F3A4: movl -56(%ebp),%edx
+ 0x3A96F3A7: subl $0x4, %esp
+ 0x3A96F3AA: testl %edx,%edx
+ 0x3A96F3AC: jnz-32 0x3A96F5F6
+. 758 3A96F3A4 14
+. 8B 55 C8 83 EC 04 85 D2 0F 85 44 02 00 00
+
+==== BB 759 (0x3A96F3B2) in 14117B, out 77762B, BBs exec'd 0 ====
+ 0x3A96F3B2: movl -32(%ebp),%edx
+ 0x3A96F3B5: testb $0x60, 0x174(%edx)
+ 0x3A96F3BC: jnz-8 0x3A96F3F5
+. 759 3A96F3B2 12
+. 8B 55 E0 F6 82 74 01 00 00 60 75 37
+
+==== BB 760 (0x3A96F3BE) in 14129B, out 77853B, BBs exec'd 0 ====
+ 0x3A96F3BE: movl -80(%ebp),%ecx
+ 0x3A96F3C1: subl $0x1C, %esp
+ 0x3A96F3C4: leal 31(%esp,,), %eax
+ 0x3A96F3C8: andl $0xFFFFFFF0, %eax
+ 0x3A96F3CB: movl $0x0, (%eax)
+ 0x3A96F3D1: movl $0x0, 8(%eax)
+ 0x3A96F3D8: movl %edx,4(%eax)
+ 0x3A96F3DB: movl %eax,8(%ecx)
+ 0x3A96F3DE: movl %eax,-80(%ebp)
+ 0x3A96F3E1: movzbl 0x174(%edx),%eax
+ 0x3A96F3E8: incl -20(%ebp)
+ 0x3A96F3EB: andb $0x9F, %al
+ 0x3A96F3ED: orb $0x20, %al
+ 0x3A96F3EF: movb %al,0x174(%edx)
+ 0x3A96F3F5: movl -100(%ebp),%edi
+ 0x3A96F3F8: testl %edi,%edi
+ 0x3A96F3FA: jz-8 0x3A96F409
+. 760 3A96F3BE 62
+. 8B 4D B0 83 EC 1C 8D 44 24 1F 83 E0 F0 C7 00 00 00 00 00 C7 40 08 00 00 00 00 89 50 04 89 41 08 89 45 B0 0F B6 82 74 01 00 00 FF 45 EC 24 9F 0C 20 88 82 74 01 00 00 8B 7D 9C 85 FF 74 0D
+
+==== BB 761 (0x3A96F409) in 14191B, out 78111B, BBs exec'd 0 ====
+ 0x3A96F409: addl $0x8, -116(%ebp)
+ 0x3A96F40D: movl -116(%ebp),%esi
+ 0x3A96F410: movl (%esi),%eax
+ 0x3A96F412: testl %eax,%eax
+ 0x3A96F414: movl %eax,%edx
+ 0x3A96F416: jz-32 0x3A96F523
+. 761 3A96F409 19
+. 83 45 8C 08 8B 75 8C 8B 06 85 C0 89 C2 0F 84 07 01 00 00
+
+==== BB 762 (0x3A96F425) in 14210B, out 78216B, BBs exec'd 0 ====
+ 0x3A96F425: cmpl $0x7FFFFFFD, %edx
+ 0x3A96F42B: setz %al
+ 0x3A96F42E: cmpl $0x7FFFFFFF, %edx
+ 0x3A96F434: setz %dl
+ 0x3A96F437: orl %edx,%eax
+ 0x3A96F439: testb $0x1, %al
+ 0x3A96F43B: jz-8 0x3A96F409
+. 762 3A96F425 24
+. 81 FA FD FF FF 7F 0F 94 C0 81 FA FF FF FF 7F 0F 94 C2 09 D0 A8 01 74 CC
+
+==== BB 763 (0x3A96F523) in 14234B, out 78343B, BBs exec'd 0 ====
+ 0x3A96F523: movl -100(%ebp),%eax
+ 0x3A96F526: testl %eax,%eax
+ 0x3A96F528: jz-32 0x3A96F5CD
+. 763 3A96F523 11
+. 8B 45 9C 85 C0 0F 84 9F 00 00 00
+
+==== BB 764 (0x3A96F5CD) in 14245B, out 78415B, BBs exec'd 0 ====
+ 0x3A96F5CD: movl -76(%ebp),%ecx
+ 0x3A96F5D0: movl (%ecx),%eax
+ 0x3A96F5D2: testl %eax,%eax
+ 0x3A96F5D4: jz-8 0x3A96F5E9
+. 764 3A96F5CD 9
+. 8B 4D B4 8B 01 85 C0 74 13
+
+==== BB 765 (0x3A96F5D6) in 14254B, out 78497B, BBs exec'd 0 ====
+ 0x3A96F5D6: movl -76(%ebp),%esi
+ 0x3A96F5D9: movl 8(%esi),%esi
+ 0x3A96F5DC: testl %esi,%esi
+ 0x3A96F5DE: movl %esi,-76(%ebp)
+ 0x3A96F5E1: jz-8 0x3A96F605
+. 765 3A96F5D6 13
+. 8B 75 B4 8B 76 08 85 F6 89 75 B4 74 22
+
+==== BB 766 (0x3A96F5E3) in 14267B, out 78589B, BBs exec'd 0 ====
+ 0x3A96F5E3: movl (%esi),%eax
+ 0x3A96F5E5: testl %eax,%eax
+ 0x3A96F5E7: jnz-8 0x3A96F5D6
+. 766 3A96F5E3 6
+. 8B 06 85 C0 75 ED
+
+==== BB 767 (0x3A96F5E9) in 14273B, out 78658B, BBs exec'd 0 ====
+ 0x3A96F5E9: movl -76(%ebp),%eax
+ 0x3A96F5EC: testl %eax,%eax
+ 0x3A96F5EE: jnz-32 0x3A96F29B
+. 767 3A96F5E9 11
+. 8B 45 B4 85 C0 0F 85 A7 FC FF FF
+
+==== BB 768 (0x3A96F2DF) in 14284B, out 78730B, BBs exec'd 0 ====
+ 0x3A96F2DF: movl -96(%ebp),%esi
+ 0x3A96F2E2: movzwl 0x14E(%esi),%eax
+ 0x3A96F2E9: testw %ax,%ax
+ 0x3A96F2EC: jz-8 0x3A96F309
+. 768 3A96F2DF 15
+. 8B 75 A0 0F B7 86 4E 01 00 00 66 85 C0 74 1B
+
+==== BB 769 (0x3A96F2EE) in 14299B, out 78824B, BBs exec'd 0 ====
+ 0x3A96F2EE: movzwl %ax,%eax
+ 0x3A96F2F1: leal 0x12(,%eax,4), %eax
+ 0x3A96F2F8: andl $0xFFFFC, %eax
+ 0x3A96F2FD: subl %eax,%esp
+ 0x3A96F2FF: leal 31(%esp,,), %eax
+ 0x3A96F303: andl $0xFFFFFFF0, %eax
+ 0x3A96F306: movl %eax,-100(%ebp)
+ 0x3A96F309: movl -96(%ebp),%edx
+ 0x3A96F30C: movl 28(%edx),%eax
+ 0x3A96F30F: testl %eax,%eax
+ 0x3A96F311: jnz-8 0x3A96F32B
+. 769 3A96F2EE 37
+. 0F B7 C0 8D 04 85 12 00 00 00 25 FC FF 0F 00 29 C4 8D 44 24 1F 83 E0 F0 89 45 9C 8B 55 A0 8B 42 1C 85 C0 75 18
+
+==== BB 770 (0x3A96FECD) in 14336B, out 78984B, BBs exec'd 0 ====
+ 0x3A96FECD: movl %eax,%ecx
+ 0x3A96FECF: andl $0x3, %ecx
+ 0x3A96FED2: movl %ecx,(%esp,,)
+ 0x3A96FED5: movl (%esi),%eax
+ 0x3A96FED7: xorl %ecx, %ecx
+ 0x3A96FED9: call 0x3A96AE40
+. 770 3A96FECD 17
+. 89 C1 83 E1 03 89 0C 24 8B 06 31 C9 E8 62 AF FF FF
+
+==== BB 771 (0x3A970BE0) in 14353B, out 79085B, BBs exec'd 0 ====
+ 0x3A970BE0: addl $0x8, %esp
+ 0x3A970BE3: movl %edx,%eax
+ 0x3A970BE5: popl %ebx
+ 0x3A970BE6: popl %esi
+ 0x3A970BE7: popl %edi
+ 0x3A970BE8: popl %ebp
+ 0x3A970BE9: ret
+. 771 3A970BE0 10
+. 83 C4 08 89 D0 5B 5E 5F 5D C3
+
+==== BB 772 (0x3A96AFA7) in 14363B, out 79203B, BBs exec'd 0 ====
+ 0x3A96AFA7: movl %esi,%eax
+ 0x3A96AFA9: leal -12(%ebp), %esp
+ 0x3A96AFAC: popl %ebx
+ 0x3A96AFAD: popl %esi
+ 0x3A96AFAE: popl %edi
+ 0x3A96AFAF: popl %ebp
+ 0x3A96AFB0: ret 12
+. 772 3A96AFA7 12
+. 89 F0 8D 65 F4 5B 5E 5F 5D C2 0C 00
+
+==== BB 773 (0x3A96F3F5) in 14375B, out 79315B, BBs exec'd 0 ====
+ 0x3A96F3F5: movl -100(%ebp),%edi
+ 0x3A96F3F8: testl %edi,%edi
+ 0x3A96F3FA: jz-8 0x3A96F409
+. 773 3A96F3F5 7
+. 8B 7D 9C 85 FF 74 0D
+
+==== BB 774 (0x3A96F3FC) in 14382B, out 79387B, BBs exec'd 0 ====
+ 0x3A96F3FC: movl -104(%ebp),%esi
+ 0x3A96F3FF: movl -100(%ebp),%eax
+ 0x3A96F402: movl %edx,(%eax,%esi,4)
+ 0x3A96F405: incl %esi
+ 0x3A96F406: movl %esi,-104(%ebp)
+ 0x3A96F409: addl $0x8, -116(%ebp)
+ 0x3A96F40D: movl -116(%ebp),%esi
+ 0x3A96F410: movl (%esi),%eax
+ 0x3A96F412: testl %eax,%eax
+ 0x3A96F414: movl %eax,%edx
+ 0x3A96F416: jz-32 0x3A96F523
+. 774 3A96F3FC 32
+. 8B 75 98 8B 45 9C 89 14 B0 46 89 75 98 83 45 8C 08 8B 75 8C 8B 06 85 C0 89 C2 0F 84 07 01 00 00
+
+==== BB 775 (0x3A96F52E) in 14414B, out 79544B, BBs exec'd 0 ====
+ 0x3A96F52E: movl -104(%ebp),%eax
+ 0x3A96F531: movl -100(%ebp),%edx
+ 0x3A96F534: movl $0x0, (%edx,%eax,4)
+ 0x3A96F53B: incl %eax
+ 0x3A96F53C: movl %eax,-104(%ebp)
+ 0x3A96F53F: leal 0x4(,%eax,8), %eax
+ 0x3A96F546: movl %eax,(%esp,,)
+ 0x3A96F549: call 0x3A96581C
+. 775 3A96F52E 32
+. 8B 45 98 8B 55 9C C7 04 82 00 00 00 00 40 89 45 98 8D 04 C5 04 00 00 00 89 04 24 E8 CE 62 FF FF
+
+==== BB 776 (0x3A96F54E) in 14446B, out 79677B, BBs exec'd 0 ====
+ 0x3A96F54E: movl -96(%ebp),%ecx
+ 0x3A96F551: testl %eax,%eax
+ 0x3A96F553: movl %eax,%edx
+ 0x3A96F555: movl %eax,0x1D4(%ecx)
+ 0x3A96F55B: jz-32 0x3A96FAA9
+. 776 3A96F54E 19
+. 8B 4D A0 85 C0 89 C2 89 81 D4 01 00 00 0F 84 48 05 00 00
+
+==== BB 777 (0x3A96F561) in 14465B, out 79775B, BBs exec'd 0 ====
+ 0x3A96F561: movl -104(%ebp),%ecx
+ 0x3A96F564: leal 4(%edx), %edi
+ 0x3A96F567: movl -96(%ebp),%eax
+ 0x3A96F56A: movl -100(%ebp),%esi
+ 0x3A96F56D: shll $0x2, %ecx
+ 0x3A96F570: cmpl $0x7, %ecx
+ 0x3A96F573: movl %eax,(%edx)
+ 0x3A96F575: jbe-8 0x3A96F58D
+. 777 3A96F561 22
+. 8B 4D 98 8D 7A 04 8B 45 A0 8B 75 9C C1 E1 02 83 F9 07 89 02 76 16
+
+==== BB 778 (0x3A96F577) in 14487B, out 79898B, BBs exec'd 0 ====
+ 0x3A96F577: testl $0x4, %edi
+ 0x3A96F57D: jz-8 0x3A96F58D
+. 778 3A96F577 8
+. F7 C7 04 00 00 00 74 0E
+
+==== BB 779 (0x3A96F57F) in 14495B, out 79959B, BBs exec'd 0 ====
+ 0x3A96F57F: movl (%esi),%eax
+ 0x3A96F581: leal 8(%edx), %edi
+ 0x3A96F584: addl $0x4, %esi
+ 0x3A96F587: subl $0x4, %ecx
+ 0x3A96F58A: movl %eax,4(%edx)
+ 0x3A96F58D: cld
+ 0x3A96F58E: shrl $0x2, %ecx
+ 0x3A96F591: rep movsl
+. 779 3A96F57F 20
+. 8B 06 8D 7A 08 83 C6 04 83 E9 04 89 42 04 FC C1 E9 02 F3 A5
+
+==== BB 780 (0x3A96F591) in 14515B, out 80128B, BBs exec'd 0 ====
+ 0x3A96F591: rep movsl
+. 780 3A96F591 2
+. F3 A5
+
+==== BB 781 (0x3A96F593) in 14517B, out 80223B, BBs exec'd 0 ====
+ 0x3A96F593: movl -96(%ebp),%edx
+ 0x3A96F596: movl -104(%ebp),%eax
+ 0x3A96F599: movl 0x1D4(%edx),%esi
+ 0x3A96F59F: shll $0x2, %eax
+ 0x3A96F5A2: cmpl $0x7, %eax
+ 0x3A96F5A5: movl %eax,%edx
+ 0x3A96F5A7: leal (%esi,%eax,1), %ecx
+ 0x3A96F5AA: leal 4(%ecx), %edi
+ 0x3A96F5AD: jbe-8 0x3A96F5C5
+. 781 3A96F593 28
+. 8B 55 A0 8B 45 98 8B B2 D4 01 00 00 C1 E0 02 83 F8 07 89 C2 8D 0C 06 8D 79 04 76 16
+
+==== BB 782 (0x3A96F5AF) in 14545B, out 80360B, BBs exec'd 0 ====
+ 0x3A96F5AF: testl $0x4, %edi
+ 0x3A96F5B5: jz-8 0x3A96F5C5
+. 782 3A96F5AF 8
+. F7 C7 04 00 00 00 74 0E
+
+==== BB 783 (0x3A96F5B7) in 14553B, out 80421B, BBs exec'd 0 ====
+ 0x3A96F5B7: movl (%esi),%eax
+ 0x3A96F5B9: leal 8(%ecx), %edi
+ 0x3A96F5BC: addl $0x4, %esi
+ 0x3A96F5BF: subl $0x4, %edx
+ 0x3A96F5C2: movl %eax,4(%ecx)
+ 0x3A96F5C5: cld
+ 0x3A96F5C6: movl %edx,%ecx
+ 0x3A96F5C8: shrl $0x2, %ecx
+ 0x3A96F5CB: rep movsl
+. 783 3A96F5B7 22
+. 8B 06 8D 79 08 83 C6 04 83 EA 04 89 41 04 FC 89 D1 C1 E9 02 F3 A5
+
+==== BB 784 (0x3A96F5CB) in 14575B, out 80594B, BBs exec'd 0 ====
+ 0x3A96F5CB: rep movsl
+. 784 3A96F5CB 2
+. F3 A5
+
+==== BB 785 (0x3A96AFE3) in 14577B, out 80689B, BBs exec'd 0 ====
+ 0x3A96AFE3: movl %edi,%edx
+ 0x3A96AFE5: movl %esi,%eax
+ 0x3A96AFE7: call 0x3A968DE0
+. 785 3A96AFE3 9
+. 89 FA 89 F0 E8 F4 DD FF FF
+
+==== BB 786 add_name_to_object(0x3A968DE0) in 14586B, out 80754B, BBs exec'd 0 ====
+ 0x3A968DE0: pushl %ebp
+ 0x3A968DE1: movl %esp,%ebp
+ 0x3A968DE3: pushl %edi
+ 0x3A968DE4: movl %edx,%edi
+ 0x3A968DE6: pushl %esi
+ 0x3A968DE7: pushl %ebx
+ 0x3A968DE8: subl $0x14, %esp
+ 0x3A968DEB: movl 20(%eax),%esi
+ 0x3A968DEE: call 0x3A97592B
+. 786 3A968DE0 19
+. 55 89 E5 57 89 D7 56 53 83 EC 14 8B 70 14 E8 38 CB 00 00
+
+==== BB 787 (0x3A968DF3) in 14605B, out 80913B, BBs exec'd 0 ====
+ 0x3A968DF3: addl $0xF879, %ebx
+ 0x3A968DF9: movl $0x0, -16(%ebp)
+ 0x3A968E00: testl %esi,%esi
+ 0x3A968E02: jz-8 0x3A968E2C
+. 787 3A968DF3 17
+. 81 C3 79 F8 00 00 C7 45 F0 00 00 00 00 85 F6 74 28
+
+==== BB 788 (0x3A968E04) in 14622B, out 81009B, BBs exec'd 0 ====
+ 0x3A968E04: leal 0x0(%esi), %esi
+ 0x3A968E0A: leal 0x0(%edi), %edi
+ 0x3A968E10: movl (%esi),%eax
+ 0x3A968E12: movl %edi,(%esp,,)
+ 0x3A968E15: movl %eax,4(%esp,,)
+ 0x3A968E19: call 0x3A975280
+. 788 3A968E04 26
+. 8D B6 00 00 00 00 8D BF 00 00 00 00 8B 06 89 3C 24 89 44 24 04 E8 62 C4 00 00
+
+==== BB 789 (0x3A968E1E) in 14648B, out 81107B, BBs exec'd 0 ====
+ 0x3A968E1E: testl %eax,%eax
+ 0x3A968E20: jz-8 0x3A968E77
+. 789 3A968E1E 4
+. 85 C0 74 55
+
+==== BB 790 (0x3A968E22) in 14652B, out 81166B, BBs exec'd 0 ====
+ 0x3A968E22: movl %esi,-16(%ebp)
+ 0x3A968E25: movl 4(%esi),%esi
+ 0x3A968E28: testl %esi,%esi
+ 0x3A968E2A: jnz-8 0x3A968E10
+. 790 3A968E22 10
+. 89 75 F0 8B 76 04 85 F6 75 E4
+
+==== BB 791 (0x3A968E2C) in 14662B, out 81251B, BBs exec'd 0 ====
+ 0x3A968E2C: movl %edi,(%esp,,)
+ 0x3A968E2F: call 0x3A9752D0
+. 791 3A968E2C 8
+. 89 3C 24 E8 9C C4 00 00
+
+==== BB 792 (0x3A968E34) in 14670B, out 81306B, BBs exec'd 0 ====
+ 0x3A968E34: leal 1(%eax), %edx
+ 0x3A968E37: addl $0xD, %eax
+ 0x3A968E3A: movl %edx,-20(%ebp)
+ 0x3A968E3D: movl %eax,(%esp,,)
+ 0x3A968E40: call 0x3A96581C
+. 792 3A968E34 17
+. 8D 50 01 83 C0 0D 89 55 EC 89 04 24 E8 D7 C9 FF FF
+
+==== BB 793 (0x3A968E45) in 14687B, out 81398B, BBs exec'd 0 ====
+ 0x3A968E45: testl %eax,%eax
+ 0x3A968E47: movl %eax,%esi
+ 0x3A968E49: jz-8 0x3A968E7F
+. 793 3A968E45 6
+. 85 C0 89 C6 74 34
+
+==== BB 794 (0x3A968E4B) in 14693B, out 81464B, BBs exec'd 0 ====
+ 0x3A968E4B: movl -20(%ebp),%edx
+ 0x3A968E4E: leal 12(%eax), %eax
+ 0x3A968E51: movl %edi,4(%esp,,)
+ 0x3A968E55: movl %eax,(%esp,,)
+ 0x3A968E58: movl %edx,8(%esp,,)
+ 0x3A968E5C: call 0x3A975870
+. 794 3A968E4B 22
+. 8B 55 EC 8D 40 0C 89 7C 24 04 89 04 24 89 54 24 08 E8 0F CA 00 00
+
+==== BB 795 (0x3A968E61) in 14715B, out 81568B, BBs exec'd 0 ====
+ 0x3A968E61: movl %eax,(%esi)
+ 0x3A968E63: movl -16(%ebp),%eax
+ 0x3A968E66: movl $0x0, 4(%esi)
+ 0x3A968E6D: movl $0x0, 8(%esi)
+ 0x3A968E74: movl %esi,4(%eax)
+ 0x3A968E77: leal -12(%ebp), %esp
+ 0x3A968E7A: popl %ebx
+ 0x3A968E7B: popl %esi
+ 0x3A968E7C: popl %edi
+ 0x3A968E7D: popl %ebp
+ 0x3A968E7E: ret
+. 795 3A968E61 30
+. 89 06 8B 45 F0 C7 46 04 00 00 00 00 C7 46 08 00 00 00 00 89 70 04 8D 65 F4 5B 5E 5F 5D C3
+
+==== BB 796 (0x3A96AFEC) in 14745B, out 81738B, BBs exec'd 0 ====
+ 0x3A96AFEC: orb $0x1, 0x175(%esi)
+ 0x3A96AFF3: jmp-8 0x3A96AFA7
+. 796 3A96AFEC 9
+. 80 8E 75 01 00 00 01 EB B2
+
+==== BB 797 (0x3A96F313) in 14754B, out 81795B, BBs exec'd 0 ====
+ 0x3A96F313: movl 0xE8(%edx),%eax
+ 0x3A96F319: testl %eax,%eax
+ 0x3A96F31B: jnz-8 0x3A96F32B
+. 797 3A96F313 10
+. 8B 82 E8 00 00 00 85 C0 75 0E
+
+==== BB 798 (0x3A96F31D) in 14764B, out 81870B, BBs exec'd 0 ====
+ 0x3A96F31D: movl 0xE0(%edx),%eax
+ 0x3A96F323: testl %eax,%eax
+ 0x3A96F325: jz-32 0x3A96F523
+. 798 3A96F31D 14
+. 8B 82 E0 00 00 00 85 C0 0F 84 F8 01 00 00
+
+==== BB 799 (0x3A96F605) in 14778B, out 81945B, BBs exec'd 0 ====
+ 0x3A96F605: movl 0x148(%ebx),%eax
+ 0x3A96F60B: movl -88(%ebp),%edi
+ 0x3A96F60E: testl %eax,%eax
+ 0x3A96F610: setz %al
+ 0x3A96F613: testl %edi,%edi
+ 0x3A96F615: setnz %dl
+ 0x3A96F618: andl %edx,%eax
+ 0x3A96F61A: testb $0x1, %al
+ 0x3A96F61C: jz-8 0x3A96F627
+. 799 3A96F605 25
+. 8B 83 48 01 00 00 8B 7D A8 85 C0 0F 94 C0 85 FF 0F 95 C2 21 D0 A8 01 74 09
+
+==== BB 800 (0x3A96F61E) in 14803B, out 82099B, BBs exec'd 0 ====
+ 0x3A96F61E: movl -88(%ebp),%eax
+ 0x3A96F621: movl %eax,0x148(%ebx)
+ 0x3A96F627: movl -64(%ebp),%ecx
+ 0x3A96F62A: movl 0x1D4(%ecx),%edx
+ 0x3A96F630: testl %edx,%edx
+ 0x3A96F632: jz-8 0x3A96F645
+. 800 3A96F61E 22
+. 8B 45 A8 89 83 48 01 00 00 8B 4D C0 8B 91 D4 01 00 00 85 D2 74 11
+
+==== BB 801 (0x3A96F645) in 14825B, out 82216B, BBs exec'd 0 ====
+ 0x3A96F645: movl -20(%ebp),%eax
+ 0x3A96F648: leal 0x4(,%eax,8), %eax
+ 0x3A96F64F: movl %eax,(%esp,,)
+ 0x3A96F652: call 0x3A96581C
+. 801 3A96F645 18
+. 8B 45 EC 8D 04 C5 04 00 00 00 89 04 24 E8 C5 61 FF FF
+
+==== BB 802 (0x3A96F657) in 14843B, out 82297B, BBs exec'd 0 ====
+ 0x3A96F657: movl -64(%ebp),%esi
+ 0x3A96F65A: testl %eax,%eax
+ 0x3A96F65C: movl %eax,%ecx
+ 0x3A96F65E: movl %eax,0x1D4(%esi)
+ 0x3A96F664: jz-32 0x3A96FC0E
+. 802 3A96F657 19
+. 8B 75 C0 85 C0 89 C1 89 86 D4 01 00 00 0F 84 A4 05 00 00
+
+==== BB 803 (0x3A96F66A) in 14862B, out 82395B, BBs exec'd 0 ====
+ 0x3A96F66A: movl -20(%ebp),%eax
+ 0x3A96F66D: movl -64(%ebp),%edx
+ 0x3A96F670: leal 4(%ecx,%eax,4), %ecx
+ 0x3A96F674: movl %ecx,0x150(%edx)
+ 0x3A96F67A: movl -16(%ebp),%ecx
+ 0x3A96F67D: movl %eax,0x154(%edx)
+ 0x3A96F683: movl $0x0, -20(%ebp)
+ 0x3A96F68A: testl %ecx,%ecx
+ 0x3A96F68C: movl %ecx,-76(%ebp)
+ 0x3A96F68F: jz-8 0x3A96F6CF
+. 803 3A96F66A 39
+. 8B 45 EC 8B 55 C0 8D 4C 81 04 89 8A 50 01 00 00 8B 4D F0 89 82 54 01 00 00 C7 45 EC 00 00 00 00 85 C9 89 4D B4 74 3E
+
+==== BB 804 (0x3A96F691) in 14901B, out 82555B, BBs exec'd 0 ====
+ 0x3A96F691: movl 8(%ebp),%esi
+ 0x3A96F694: testl %esi,%esi
+ 0x3A96F696: jnz-32 0x3A96FAC4
+. 804 3A96F691 11
+. 8B 75 08 85 F6 0F 85 28 04 00 00
+
+==== BB 805 (0x3A96F69C) in 14912B, out 82627B, BBs exec'd 0 ====
+ 0x3A96F69C: movl -76(%ebp),%edx
+ 0x3A96F69F: movl 4(%edx),%ecx
+ 0x3A96F6A2: movl -64(%ebp),%esi
+ 0x3A96F6A5: movl -20(%ebp),%eax
+ 0x3A96F6A8: movl 0x150(%esi),%edx
+ 0x3A96F6AE: movl %ecx,(%edx,%eax,4)
+ 0x3A96F6B1: incl %eax
+ 0x3A96F6B2: movl %eax,-20(%ebp)
+ 0x3A96F6B5: movl -76(%ebp),%eax
+ 0x3A96F6B8: movl 4(%eax),%ecx
+ 0x3A96F6BB: andb $0xFFFFFF9F, 0x174(%ecx)
+ 0x3A96F6C2: movl -76(%ebp),%edx
+ 0x3A96F6C5: movl 8(%edx),%edx
+ 0x3A96F6C8: movl %edx,-76(%ebp)
+ 0x3A96F6CB: testl %edx,%edx
+ 0x3A96F6CD: jnz-8 0x3A96F691
+. 805 3A96F69C 51
+. 8B 55 B4 8B 4A 04 8B 75 C0 8B 45 EC 8B 96 50 01 00 00 89 0C 82 40 89 45 EC 8B 45 B4 8B 48 04 80 A1 74 01 00 00 9F 8B 55 B4 8B 52 08 89 55 B4 85 D2 75 C2
+
+==== BB 806 (0x3A96F6CF) in 14963B, out 82849B, BBs exec'd 0 ====
+ 0x3A96F6CF: testb $0x2, 0xFFFFFC15(%ebx)
+ 0x3A96F6D6: jnz-32 0x3A96FCFC
+. 806 3A96F6CF 13
+. F6 83 15 FC FF FF 02 0F 85 20 06 00 00
+
+==== BB 807 (0x3A96F6DC) in 14976B, out 82919B, BBs exec'd 0 ====
+ 0x3A96F6DC: movl -64(%ebp),%edx
+ 0x3A96F6DF: movl -20(%ebp),%eax
+ 0x3A96F6E2: movl 0x150(%edx),%edx
+ 0x3A96F6E8: movl %eax,0xFFFFFF78(%ebp)
+ 0x3A96F6EE: movl %edx,0xFFFFFF74(%ebp)
+ 0x3A96F6F4: movl $0x0, -84(%ebp)
+ 0x3A96F6FB: movl -64(%ebp),%edx
+ 0x3A96F6FE: movl 0x1DC(%edx),%ecx
+ 0x3A96F704: cmpl %ecx,-84(%ebp)
+ 0x3A96F707: jnb-8 0x3A96F752
+. 807 3A96F6DC 45
+. 8B 55 C0 8B 45 EC 8B 92 50 01 00 00 89 85 78 FF FF FF 89 95 74 FF FF FF C7 45 AC 00 00 00 00 8B 55 C0 8B 8A DC 01 00 00 39 4D AC 73 49
+
+==== BB 808 (0x3A96F752) in 15021B, out 83090B, BBs exec'd 0 ====
+ 0x3A96F752: movl 0xFFFFFF78(%ebp),%edx
+ 0x3A96F758: movl -64(%ebp),%eax
+ 0x3A96F75B: movl 0xFFFFFF74(%ebp),%esi
+ 0x3A96F761: shll $0x2, %edx
+ 0x3A96F764: cmpl $0x7, %edx
+ 0x3A96F767: movl 0x1D4(%eax),%edi
+ 0x3A96F76D: jbe-8 0x3A96F784
+. 808 3A96F752 29
+. 8B 95 78 FF FF FF 8B 45 C0 8B B5 74 FF FF FF C1 E2 02 83 FA 07 8B B8 D4 01 00 00 76 15
+
+==== BB 809 (0x3A96F76F) in 15050B, out 83215B, BBs exec'd 0 ====
+ 0x3A96F76F: testl $0x4, %edi
+ 0x3A96F775: jz-8 0x3A96F784
+. 809 3A96F76F 8
+. F7 C7 04 00 00 00 74 0D
+
+==== BB 810 (0x3A96F784) in 15058B, out 83276B, BBs exec'd 0 ====
+ 0x3A96F784: cld
+ 0x3A96F785: movl %edx,%ecx
+ 0x3A96F787: shrl $0x2, %ecx
+ 0x3A96F78A: rep movsl
+. 810 3A96F784 8
+. FC 89 D1 C1 E9 02 F3 A5
+
+==== BB 811 (0x3A96F78A) in 15066B, out 83399B, BBs exec'd 0 ====
+ 0x3A96F78A: rep movsl
+. 811 3A96F78A 2
+. F3 A5
+
+==== BB 812 (0x3A96F78C) in 15068B, out 83494B, BBs exec'd 0 ====
+ 0x3A96F78C: movl $0x1, -84(%ebp)
+ 0x3A96F793: movl -20(%ebp),%edx
+ 0x3A96F796: cmpl %edx,-84(%ebp)
+ 0x3A96F799: movl %edx,0xFFFFFF78(%ebp)
+ 0x3A96F79F: jnb-32 0x3A96FC92
+. 812 3A96F78C 25
+. C7 45 AC 01 00 00 00 8B 55 EC 39 55 AC 89 95 78 FF FF FF 0F 83 ED 04 00 00
+
+==== BB 813 (0x3A96F7A5) in 15093B, out 83597B, BBs exec'd 0 ====
+ 0x3A96F7A5: movl -64(%ebp),%esi
+ 0x3A96F7A8: movl 0x1D4(%esi),%ecx
+ 0x3A96F7AE: movl -64(%ebp),%edx
+ 0x3A96F7B1: movl -84(%ebp),%esi
+ 0x3A96F7B4: movl 0x150(%edx),%eax
+ 0x3A96F7BA: movl $0x1,%edx
+ 0x3A96F7BF: movl (%eax,%esi,4),%eax
+ 0x3A96F7C2: cmpl %eax,4(%ecx)
+ 0x3A96F7C5: movl %eax,0xFFFFFF7C(%ebp)
+ 0x3A96F7CB: jz-8 0x3A96F7DE
+. 813 3A96F7A5 40
+. 8B 75 C0 8B 8E D4 01 00 00 8B 55 C0 8B 75 AC 8B 82 50 01 00 00 BA 01 00 00 00 8B 04 B0 39 41 04 89 85 7C FF FF FF 74 11
+
+==== BB 814 (0x3A96F7DE) in 15133B, out 83760B, BBs exec'd 0 ====
+ 0x3A96F7DE: leal 1(%edx), %edi
+ 0x3A96F7E1: cmpl 0xFFFFFF78(%ebp),%edi
+ 0x3A96F7E7: jnb-32 0x3A96F89D
+. 814 3A96F7DE 15
+. 8D 7A 01 3B BD 78 FF FF FF 0F 83 B0 00 00 00
+
+==== BB 815 (0x3A96F7ED) in 15148B, out 83838B, BBs exec'd 0 ====
+ 0x3A96F7ED: shll $0x2, %edx
+ 0x3A96F7F0: movl %edx,0xFFFFFF6C(%ebp)
+ 0x3A96F7F6: negl %edx
+ 0x3A96F7F8: movl %edx,0xFFFFFF68(%ebp)
+ 0x3A96F7FE: movl %esi,%esi
+ 0x3A96F800: leal 0x0(,%edi,4), %esi
+ 0x3A96F807: movl (%ecx,%esi,1),%eax
+ 0x3A96F80A: movl 0x1D4(%eax),%edx
+ 0x3A96F810: testl %edx,%edx
+ 0x3A96F812: jz-8 0x3A96F890
+. 815 3A96F7ED 39
+. C1 E2 02 89 95 6C FF FF FF F7 DA 89 95 68 FF FF FF 89 F6 8D 34 BD 00 00 00 00 8B 04 31 8B 90 D4 01 00 00 85 D2 74 7C
+
+==== BB 816 (0x3A96F814) in 15187B, out 84001B, BBs exec'd 0 ====
+ 0x3A96F814: movl (%edx),%eax
+ 0x3A96F816: testl %eax,%eax
+ 0x3A96F818: jz-8 0x3A96F890
+. 816 3A96F814 6
+. 8B 02 85 C0 74 76
+
+==== BB 817 (0x3A96F81A) in 15193B, out 84070B, BBs exec'd 0 ====
+ 0x3A96F81A: addl 0xFFFFFF68(%ebp),%esi
+ 0x3A96F820: movl %esi,0xFFFFFF70(%ebp)
+ 0x3A96F826: jmp-8 0x3A96F82E
+. 817 3A96F81A 14
+. 03 B5 68 FF FF FF 89 B5 70 FF FF FF EB 06
+
+==== BB 818 (0x3A96F82E) in 15207B, out 84137B, BBs exec'd 0 ====
+ 0x3A96F82E: addl $0x4, %edx
+ 0x3A96F831: cmpl 0xFFFFFF7C(%ebp),%eax
+ 0x3A96F837: jnz-8 0x3A96F828
+. 818 3A96F82E 11
+. 83 C2 04 3B 85 7C FF FF FF 75 EF
+
+==== BB 819 (0x3A96F828) in 15218B, out 84218B, BBs exec'd 0 ====
+ 0x3A96F828: movl (%edx),%eax
+ 0x3A96F82A: testl %eax,%eax
+ 0x3A96F82C: jz-8 0x3A96F890
+. 819 3A96F828 6
+. 8B 02 85 C0 74 62
+
+==== BB 820 (0x3A96F890) in 15224B, out 84287B, BBs exec'd 0 ====
+ 0x3A96F890: incl %edi
+ 0x3A96F891: cmpl 0xFFFFFF78(%ebp),%edi
+ 0x3A96F897: jb-32 0x3A96F800
+. 820 3A96F890 13
+. 47 3B BD 78 FF FF FF 0F 82 63 FF FF FF
+
+==== BB 821 (0x3A96F800) in 15237B, out 84363B, BBs exec'd 0 ====
+ 0x3A96F800: leal 0x0(,%edi,4), %esi
+ 0x3A96F807: movl (%ecx,%esi,1),%eax
+ 0x3A96F80A: movl 0x1D4(%eax),%edx
+ 0x3A96F810: testl %edx,%edx
+ 0x3A96F812: jz-8 0x3A96F890
+. 821 3A96F800 20
+. 8D 34 BD 00 00 00 00 8B 04 31 8B 90 D4 01 00 00 85 D2 74 7C
+
+==== BB 822 (0x3A96F89D) in 15257B, out 84471B, BBs exec'd 0 ====
+ 0x3A96F89D: incl -84(%ebp)
+ 0x3A96F8A0: movl 0xFFFFFF78(%ebp),%eax
+ 0x3A96F8A6: cmpl %eax,-84(%ebp)
+ 0x3A96F8A9: jb-32 0x3A96F7AE
+. 822 3A96F89D 18
+. FF 45 AC 8B 85 78 FF FF FF 39 45 AC 0F 82 FF FE FF FF
+
+==== BB 823 (0x3A96F7AE) in 15275B, out 84563B, BBs exec'd 0 ====
+ 0x3A96F7AE: movl -64(%ebp),%edx
+ 0x3A96F7B1: movl -84(%ebp),%esi
+ 0x3A96F7B4: movl 0x150(%edx),%eax
+ 0x3A96F7BA: movl $0x1,%edx
+ 0x3A96F7BF: movl (%eax,%esi,4),%eax
+ 0x3A96F7C2: cmpl %eax,4(%ecx)
+ 0x3A96F7C5: movl %eax,0xFFFFFF7C(%ebp)
+ 0x3A96F7CB: jz-8 0x3A96F7DE
+. 823 3A96F7AE 31
+. 8B 55 C0 8B 75 AC 8B 82 50 01 00 00 BA 01 00 00 00 8B 04 B0 39 41 04 89 85 7C FF FF FF 74 11
+
+==== BB 824 (0x3A96F7CD) in 15306B, out 84703B, BBs exec'd 0 ====
+ 0x3A96F7CD: leal 4(%ecx), %eax
+ 0x3A96F7D0: addl $0x4, %eax
+ 0x3A96F7D3: movl 0xFFFFFF7C(%ebp),%esi
+ 0x3A96F7D9: incl %edx
+ 0x3A96F7DA: cmpl %esi,(%eax)
+ 0x3A96F7DC: jnz-8 0x3A96F7D0
+. 824 3A96F7CD 17
+. 8D 41 04 83 C0 04 8B B5 7C FF FF FF 42 39 30 75 F2
+
+==== BB 825 (0x3A96F7D0) in 15323B, out 84809B, BBs exec'd 0 ====
+ 0x3A96F7D0: addl $0x4, %eax
+ 0x3A96F7D3: movl 0xFFFFFF7C(%ebp),%esi
+ 0x3A96F7D9: incl %edx
+ 0x3A96F7DA: cmpl %esi,(%eax)
+ 0x3A96F7DC: jnz-8 0x3A96F7D0
+. 825 3A96F7D0 14
+. 83 C0 04 8B B5 7C FF FF FF 42 39 30 75 F2
+
+==== BB 826 (0x3A96F8AF) in 15337B, out 84908B, BBs exec'd 0 ====
+ 0x3A96F8AF: jmp 0x3A96FC9B
+. 826 3A96F8AF 5
+. E9 E7 03 00 00
+
+==== BB 827 (0x3A96FC9B) in 15342B, out 84936B, BBs exec'd 0 ====
+ 0x3A96FC9B: movl 0xFFFFFF78(%ebp),%esi
+ 0x3A96FCA1: movl $0x0, (%ecx,%esi,4)
+ 0x3A96FCA8: movl -92(%ebp),%esi
+ 0x3A96FCAB: testl %esi,%esi
+ 0x3A96FCAD: jnz-32 0x3A96FE5C
+. 827 3A96FC9B 24
+. 8B B5 78 FF FF FF C7 04 B1 00 00 00 00 8B 75 A4 85 F6 0F 85 A9 01 00 00
+
+==== BB 828 (0x3A96FCB3) in 15366B, out 85040B, BBs exec'd 0 ====
+ 0x3A96FCB3: leal -12(%ebp), %esp
+ 0x3A96FCB6: popl %ebx
+ 0x3A96FCB7: popl %esi
+ 0x3A96FCB8: popl %edi
+ 0x3A96FCB9: popl %ebp
+ 0x3A96FCBA: ret 8
+. 828 3A96FCB3 10
+. 8D 65 F4 5B 5E 5F 5D C2 08 00
+
+==== BB 829 (0x3A967090) in 15376B, out 85142B, BBs exec'd 0 ====
+ 0x3A967090: movl 0xFFFFF994(%ebx),%ecx
+ 0x3A967096: subl $0x8, %esp
+ 0x3A967099: movl 0x154(%ecx),%edx
+ 0x3A96709F: movl %edx,0xFFFFFF04(%ebp)
+ 0x3A9670A5: testl %edx,%edx
+ 0x3A9670A7: jz-8 0x3A9670E4
+. 829 3A967090 25
+. 8B 8B 94 F9 FF FF 83 EC 08 8B 91 54 01 00 00 89 95 04 FF FF FF 85 D2 74 3B
+
+==== BB 830 (0x3A9670A9) in 15401B, out 85262B, BBs exec'd 0 ====
+ 0x3A9670A9: decl 0xFFFFFF04(%ebp)
+ 0x3A9670AF: movl 0x150(%ecx),%eax
+ 0x3A9670B5: movl 0xFFFFFF04(%ebp),%ecx
+ 0x3A9670BB: movl (%eax,%ecx,4),%eax
+ 0x3A9670BE: orb $0x10, 0x174(%eax)
+ 0x3A9670C5: movl 0xFFFFF994(%ebx),%ecx
+ 0x3A9670CB: movl 0xFFFFFF04(%ebp),%esi
+ 0x3A9670D1: movl 0x150(%ecx),%eax
+ 0x3A9670D7: movl (%eax,%esi,4),%eax
+ 0x3A9670DA: incl 0x170(%eax)
+ 0x3A9670E0: testl %esi,%esi
+ 0x3A9670E2: jnz-8 0x3A9670A9
+. 830 3A9670A9 59
+. FF 8D 04 FF FF FF 8B 81 50 01 00 00 8B 8D 04 FF FF FF 8B 04 88 80 88 74 01 00 00 10 8B 8B 94 F9 FF FF 8B B5 04 FF FF FF 8B 81 50 01 00 00 8B 04 B0 FF 80 70 01 00 00 85 F6 75 C5
+
+==== BB 831 (0x3A9670E4) in 15460B, out 85479B, BBs exec'd 0 ====
+ 0x3A9670E4: movl 0xFFFFF9F0(%ebx),%eax
+ 0x3A9670EA: movl 0xFFFFF9F4(%ebx),%edx
+ 0x3A9670F0: movl %eax,12(%edx)
+ 0x3A9670F3: movl 0xFFFFF9F0(%ebx),%eax
+ 0x3A9670F9: testl %eax,%eax
+ 0x3A9670FB: jz-8 0x3A967100
+. 831 3A9670E4 25
+. 8B 83 F0 F9 FF FF 8B 93 F4 F9 FF FF 89 42 0C 8B 83 F0 F9 FF FF 85 C0 74 03
+
+==== BB 832 (0x3A9670FD) in 15485B, out 85593B, BBs exec'd 0 ====
+ 0x3A9670FD: movl %edx,16(%eax)
+ 0x3A967100: cmpl $0x1, 0xFFFFFB54(%ebx)
+ 0x3A967107: jbe-32 0x3A967B5F
+. 832 3A9670FD 16
+. 89 50 10 83 BB 54 FB FF FF 01 0F 86 52 0A 00 00
+
+==== BB 833 (0x3A96710D) in 15501B, out 85678B, BBs exec'd 0 ====
+ 0x3A96710D: movl 0xFFFFF994(%ebx),%ecx
+ 0x3A967113: movl $0x1,%eax
+ 0x3A967118: movl 0xFFFFFED0(%ebp),%edx
+ 0x3A96711E: movl %eax,0xFFFFFF04(%ebp)
+ 0x3A967124: movl 0x150(%ecx),%eax
+ 0x3A96712A: addl $0x50, %edx
+ 0x3A96712D: cmpl %edx,4(%eax)
+ 0x3A967130: jz-8 0x3A967143
+. 833 3A96710D 37
+. 8B 8B 94 F9 FF FF B8 01 00 00 00 8B 95 D0 FE FF FF 89 85 04 FF FF FF 8B 81 50 01 00 00 83 C2 50 39 50 04 74 11
+
+==== BB 834 (0x3A967132) in 15538B, out 85820B, BBs exec'd 0 ====
+ 0x3A967132: incl 0xFFFFFF04(%ebp)
+ 0x3A967138: movl 0xFFFFFF04(%ebp),%esi
+ 0x3A96713E: cmpl %edx,(%eax,%esi,4)
+ 0x3A967141: jnz-8 0x3A967132
+. 834 3A967132 17
+. FF 85 04 FF FF FF 8B B5 04 FF FF FF 39 14 B0 75 EF
+
+==== BB 835 (0x3A967143) in 15555B, out 85920B, BBs exec'd 0 ====
+ 0x3A967143: movl 0x150(%ecx),%eax
+ 0x3A967149: movl 0xFFFFFF04(%ebp),%esi
+ 0x3A96714F: movl 0xFFFFFF50(%ebp),%edi
+ 0x3A967155: movl %eax,0xFFFFFEA8(%ebp)
+ 0x3A96715B: movl -4(%eax,%esi,4),%edx
+ 0x3A96715F: testl %edi,%edi
+ 0x3A967161: movl %edx,0xFFFFF9F4(%ebx)
+ 0x3A967167: jnz-32 0x3A968345
+. 835 3A967143 42
+. 8B 81 50 01 00 00 8B B5 04 FF FF FF 8B BD 50 FF FF FF 89 85 A8 FE FF FF 8B 54 B0 FC 85 FF 89 93 F4 F9 FF FF 0F 85 D8 11 00 00
+
+==== BB 836 (0x3A96716D) in 15597B, out 86073B, BBs exec'd 0 ====
+ 0x3A96716D: movl %esi,%eax
+ 0x3A96716F: incl %eax
+ 0x3A967170: xorl %esi, %esi
+ 0x3A967172: cmpl 0x154(%ecx),%eax
+ 0x3A967178: jnb-8 0x3A96718A
+. 836 3A96716D 13
+. 89 F0 40 31 F6 3B 81 54 01 00 00 73 10
+
+==== BB 837 (0x3A96718A) in 15610B, out 86167B, BBs exec'd 0 ====
+ 0x3A96718A: movl %esi,0xFFFFF9F0(%ebx)
+ 0x3A967190: movl 0xFFFFFEC4(%ebp),%eax
+ 0x3A967196: testl %eax,%eax
+ 0x3A967198: jz-32 0x3A96833A
+. 837 3A96718A 20
+. 89 B3 F0 F9 FF FF 8B 85 C4 FE FF FF 85 C0 0F 84 9C 11 00 00
+
+==== BB 838 (0x3A96833A) in 15630B, out 86261B, BBs exec'd 0 ====
+ 0x3A96833A: movl 0xFFFFF9F4(%ebx),%edx
+ 0x3A968340: jmp 0x3A9671B3
+. 838 3A96833A 11
+. 8B 93 F4 F9 FF FF E9 6E EE FF FF
+
+==== BB 839 (0x3A9671B3) in 15641B, out 86308B, BBs exec'd 0 ====
+ 0x3A9671B3: movl 0xFFFFFED0(%ebp),%ecx
+ 0x3A9671B9: addl $0x50, %ecx
+ 0x3A9671BC: movl %ecx,12(%edx)
+ 0x3A9671BF: movl 0xFFFFF9F0(%ebx),%eax
+ 0x3A9671C5: testl %eax,%eax
+ 0x3A9671C7: jz-8 0x3A9671CC
+. 839 3A9671B3 22
+. 8B 8D D0 FE FF FF 83 C1 50 89 4A 0C 8B 83 F0 F9 FF FF 85 C0 74 03
+
+==== BB 840 (0x3A9671CC) in 15663B, out 86422B, BBs exec'd 0 ====
+ 0x3A9671CC: xorl %eax, %eax
+ 0x3A9671CE: testl %edi,%edi
+ 0x3A9671D0: setz %al
+ 0x3A9671D3: movl %eax,0xFFFFFF24(%ebp)
+ 0x3A9671D9: xorl %eax, %eax
+ 0x3A9671DB: cmpl $0x3, %edi
+ 0x3A9671DE: setz %al
+ 0x3A9671E1: leal 0xFFFFFF24(%ebp), %ecx
+ 0x3A9671E7: leal 0xFFFF0244(%ebx), %edx
+ 0x3A9671ED: movl %eax,0xFFFFFF28(%ebp)
+ 0x3A9671F3: leal 0xFFFED9B4(%ebx), %eax
+ 0x3A9671F9: call 0x3A970160
+. 840 3A9671CC 50
+. 31 C0 85 FF 0F 94 C0 89 85 24 FF FF FF 31 C0 83 FF 03 0F 94 C0 8D 8D 24 FF FF FF 8D 93 44 02 FF FF 89 85 28 FF FF FF 8D 83 B4 D9 FE FF E8 62 8F 00 00
+
+==== BB 841 _dl_receive_error(0x3A970160) in 15713B, out 86619B, BBs exec'd 0 ====
+ 0x3A970160: pushl %ebp
+ 0x3A970161: movl %esp,%ebp
+ 0x3A970163: subl $0x28, %esp
+ 0x3A970166: movl %ebx,-12(%ebp)
+ 0x3A970169: movl %esi,-8(%ebp)
+ 0x3A97016C: call 0x3A97592B
+. 841 3A970160 17
+. 55 89 E5 83 EC 28 89 5D F4 89 75 F8 E8 BA 57 00 00
+
+==== BB 842 (0x3A970171) in 15730B, out 86730B, BBs exec'd 0 ====
+ 0x3A970171: addl $0x84FB, %ebx
+ 0x3A970177: movl %edi,-4(%ebp)
+ 0x3A97017A: movl %edx,-20(%ebp)
+ 0x3A97017D: movl %ecx,-24(%ebp)
+ 0x3A970180: movl %eax,-16(%ebp)
+ 0x3A970183: call*l 0xFFFFF9E0(%ebx)
+. 842 3A970171 24
+. 81 C3 FB 84 00 00 89 7D FC 89 55 EC 89 4D E8 89 45 F0 FF 93 E0 F9 FF FF
+
+==== BB 843 (0x3A970189) in 15754B, out 86847B, BBs exec'd 0 ====
+ 0x3A970189: movl (%eax),%edi
+ 0x3A97018B: movl %eax,%esi
+ 0x3A97018D: movl 0xE8(%ebx),%eax
+ 0x3A970193: movl $0x0, (%esi)
+ 0x3A970199: movl %eax,-28(%ebp)
+ 0x3A97019C: movl -16(%ebp),%eax
+ 0x3A97019F: movl %eax,0xE8(%ebx)
+ 0x3A9701A5: movl -24(%ebp),%eax
+ 0x3A9701A8: movl %eax,(%esp,,)
+ 0x3A9701AB: call*l -20(%ebp)
+. 843 3A970189 37
+. 8B 38 89 C6 8B 83 E8 00 00 00 C7 06 00 00 00 00 89 45 E4 8B 45 F0 89 83 E8 00 00 00 8B 45 E8 89 04 24 FF 55 EC
+
+==== BB 844 version_check_doit(0x3A9688B0) in 15791B, out 86990B, BBs exec'd 0 ====
+ 0x3A9688B0: pushl %ebp
+ 0x3A9688B1: movl $0x1,%edx
+ 0x3A9688B6: movl %esp,%ebp
+ 0x3A9688B8: subl $0xC, %esp
+ 0x3A9688BB: movl %esi,-4(%ebp)
+ 0x3A9688BE: movl 8(%ebp),%esi
+ 0x3A9688C1: movl %ebx,-8(%ebp)
+ 0x3A9688C4: call 0x3A97592B
+. 844 3A9688B0 25
+. 55 BA 01 00 00 00 89 E5 83 EC 0C 89 75 FC 8B 75 08 89 5D F8 E8 62 D0 00 00
+
+==== BB 845 (0x3A9688C9) in 15816B, out 87126B, BBs exec'd 0 ====
+ 0x3A9688C9: addl $0xFDA3, %ebx
+ 0x3A9688CF: movl 4(%esi),%ecx
+ 0x3A9688D2: movl 0xFFFFF994(%ebx),%eax
+ 0x3A9688D8: call 0x3A971860
+. 845 3A9688C9 20
+. 81 C3 A3 FD 00 00 8B 4E 04 8B 83 94 F9 FF FF E8 83 8F 00 00
+
+==== BB 846 _dl_check_all_versions(0x3A971860) in 15836B, out 87223B, BBs exec'd 0 ====
+ 0x3A971860: pushl %ebp
+ 0x3A971861: movl %esp,%ebp
+ 0x3A971863: pushl %edi
+ 0x3A971864: xorl %edi, %edi
+ 0x3A971866: pushl %esi
+ 0x3A971867: movl %eax,%esi
+ 0x3A971869: pushl %ebx
+ 0x3A97186A: subl $0xC, %esp
+ 0x3A97186D: call 0x3A97592B
+. 846 3A971860 18
+. 55 89 E5 57 31 FF 56 89 C6 53 83 EC 0C E8 B9 40 00 00
+
+==== BB 847 (0x3A971872) in 15854B, out 87380B, BBs exec'd 0 ====
+ 0x3A971872: addl $0x6DFA, %ebx
+ 0x3A971878: movl %edx,-16(%ebp)
+ 0x3A97187B: testl %eax,%eax
+ 0x3A97187D: movl %ecx,-20(%ebp)
+ 0x3A971880: jnz-8 0x3A971890
+. 847 3A971872 16
+. 81 C3 FA 6D 00 00 89 55 F0 85 C0 89 4D EC 75 0E
+
+==== BB 848 (0x3A971890) in 15870B, out 87484B, BBs exec'd 0 ====
+ 0x3A971890: testb $0x2, 0x175(%esi)
+ 0x3A971897: movl $0x0, -24(%ebp)
+ 0x3A97189E: jnz-8 0x3A971884
+. 848 3A971890 16
+. F6 86 75 01 00 00 02 C7 45 E8 00 00 00 00 75 E4
+
+==== BB 849 (0x3A9718A0) in 15886B, out 87572B, BBs exec'd 0 ====
+ 0x3A9718A0: movl -20(%ebp),%ecx
+ 0x3A9718A3: movl %esi,%eax
+ 0x3A9718A5: movl -16(%ebp),%edx
+ 0x3A9718A8: call 0x3A9714A0
+. 849 3A9718A0 13
+. 8B 4D EC 89 F0 8B 55 F0 E8 F3 FB FF FF
+
+==== BB 850 _dl_check_map_versions(0x3A9714A0) in 15899B, out 87656B, BBs exec'd 0 ====
+ 0x3A9714A0: pushl %ebp
+ 0x3A9714A1: movl %esp,%ebp
+ 0x3A9714A3: pushl %edi
+ 0x3A9714A4: pushl %esi
+ 0x3A9714A5: pushl %ebx
+ 0x3A9714A6: subl $0x84, %esp
+ 0x3A9714AC: movl %eax,-80(%ebp)
+ 0x3A9714AF: movl 44(%eax),%eax
+ 0x3A9714B2: call 0x3A97592B
+. 850 3A9714A0 23
+. 55 89 E5 57 56 53 81 EC 84 00 00 00 89 45 B0 8B 40 2C E8 74 44 00 00
+
+==== BB 851 (0x3A9714B7) in 15922B, out 87818B, BBs exec'd 0 ====
+ 0x3A9714B7: addl $0x71B5, %ebx
+ 0x3A9714BD: movl %edx,-84(%ebp)
+ 0x3A9714C0: xorl %edx, %edx
+ 0x3A9714C2: testl %eax,%eax
+ 0x3A9714C4: movl %ecx,-88(%ebp)
+ 0x3A9714C7: movl $0x0, -92(%ebp)
+ 0x3A9714CE: movl $0x0, -108(%ebp)
+ 0x3A9714D5: movl $0x0, -112(%ebp)
+ 0x3A9714DC: jz-32 0x3A971630
+. 851 3A9714B7 43
+. 81 C3 B5 71 00 00 89 55 AC 31 D2 85 C0 89 4D A8 C7 45 A4 00 00 00 00 C7 45 94 00 00 00 00 C7 45 90 00 00 00 00 0F 84 4E 01 00 00
+
+==== BB 852 (0x3A9714E2) in 15965B, out 87981B, BBs exec'd 0 ====
+ 0x3A9714E2: movl 4(%eax),%eax
+ 0x3A9714E5: movl -80(%ebp),%ecx
+ 0x3A9714E8: movl %eax,-96(%ebp)
+ 0x3A9714EB: movl -80(%ebp),%eax
+ 0x3A9714EE: movl 0xA4(%ecx),%ecx
+ 0x3A9714F4: movl 0xAC(%eax),%eax
+ 0x3A9714FA: testl %ecx,%ecx
+ 0x3A9714FC: movl %ecx,-100(%ebp)
+ 0x3A9714FF: movl %eax,-104(%ebp)
+ 0x3A971502: jz-32 0x3A9715F2
+. 852 3A9714E2 38
+. 8B 40 04 8B 4D B0 89 45 A0 8B 45 B0 8B 89 A4 00 00 00 8B 80 AC 00 00 00 85 C9 89 4D 9C 89 45 98 0F 84 EA 00 00 00
+
+==== BB 853 (0x3A971508) in 16003B, out 88138B, BBs exec'd 0 ====
+ 0x3A971508: movl 4(%ecx),%edx
+ 0x3A97150B: movl -80(%ebp),%ecx
+ 0x3A97150E: movl (%ecx),%ecx
+ 0x3A971510: addl %ecx,%edx
+ 0x3A971512: cmpw $0x1, (%edx)
+ 0x3A971516: movl %edx,-116(%ebp)
+ 0x3A971519: jnz-32 0x3A971696
+. 853 3A971508 23
+. 8B 51 04 8B 4D B0 8B 09 01 CA 66 83 3A 01 89 55 8C 0F 85 77 01 00 00
+
+==== BB 854 (0x3A97151F) in 16026B, out 88251B, BBs exec'd 0 ====
+ 0x3A97151F: nop
+ 0x3A971520: movl -116(%ebp),%edx
+ 0x3A971523: movl -96(%ebp),%edi
+ 0x3A971526: movl 0xFFFFF994(%ebx),%esi
+ 0x3A97152C: movl 4(%edx),%eax
+ 0x3A97152F: addl %eax,%edi
+ 0x3A971531: testl %esi,%esi
+ 0x3A971533: jz-8 0x3A971557
+. 854 3A97151F 22
+. 90 8B 55 8C 8B 7D A0 8B B3 94 F9 FF FF 8B 42 04 01 C7 85 F6 74 22
+
+==== BB 855 (0x3A971535) in 16048B, out 88378B, BBs exec'd 0 ====
+ 0x3A971535: leal 0(%esi,,), %esi
+ 0x3A971539: leal 0(%edi,,), %edi
+ 0x3A971540: movl %esi,%edx
+ 0x3A971542: movl %edi,%eax
+ 0x3A971544: call 0x3A970B80
+. 855 3A971535 20
+. 8D 74 26 00 8D BC 27 00 00 00 00 89 F2 89 F8 E8 37 F6 FF FF
+
+==== BB 856 (0x3A971549) in 16068B, out 88463B, BBs exec'd 0 ====
+ 0x3A971549: movl %esi,-120(%ebp)
+ 0x3A97154C: testl %eax,%eax
+ 0x3A97154E: jnz-8 0x3A97156F
+. 856 3A971549 7
+. 89 75 88 85 C0 75 1F
+
+==== BB 857 (0x3A971550) in 16075B, out 88538B, BBs exec'd 0 ====
+ 0x3A971550: movl 12(%esi),%esi
+ 0x3A971553: testl %esi,%esi
+ 0x3A971555: jnz-8 0x3A971540
+. 857 3A971550 7
+. 8B 76 0C 85 F6 75 E9
+
+==== BB 858 (0x3A971540) in 16082B, out 88610B, BBs exec'd 0 ====
+ 0x3A971540: movl %esi,%edx
+ 0x3A971542: movl %edi,%eax
+ 0x3A971544: call 0x3A970B80
+. 858 3A971540 9
+. 89 F2 89 F8 E8 37 F6 FF FF
+
+==== BB 859 (0x3A97156F) in 16091B, out 88675B, BBs exec'd 0 ====
+ 0x3A97156F: movl -88(%ebp),%eax
+ 0x3A971572: testl %eax,%eax
+ 0x3A971574: jnz-32 0x3A971681
+. 859 3A97156F 11
+. 8B 45 A8 85 C0 0F 85 07 01 00 00
+
+==== BB 860 (0x3A97157A) in 16102B, out 88747B, BBs exec'd 0 ====
+ 0x3A97157A: movl -116(%ebp),%esi
+ 0x3A97157D: movl 8(%esi),%eax
+ 0x3A971580: addl %eax,%esi
+ 0x3A971582: movl -80(%ebp),%edx
+ 0x3A971585: movl 8(%esi),%edi
+ 0x3A971588: movl -96(%ebp),%ecx
+ 0x3A97158B: movl 4(%edx),%eax
+ 0x3A97158E: addl %edi,%ecx
+ 0x3A971590: movl %eax,%edi
+ 0x3A971592: cmpb $0x0, (%eax)
+ 0x3A971595: jnz-8 0x3A97159F
+. 860 3A97157A 29
+. 8B 75 8C 8B 46 08 01 C6 8B 55 B0 8B 7E 08 8B 4D A0 8B 42 04 01 F9 89 C7 80 38 00 75 08
+
+==== BB 861 (0x3A971597) in 16131B, out 88901B, BBs exec'd 0 ====
+ 0x3A971597: movl 0x38(%ebx),%eax
+ 0x3A97159D: movl (%eax),%edi
+ 0x3A97159F: movzwl 4(%esi),%eax
+ 0x3A9715A3: andl $0x2, %eax
+ 0x3A9715A6: movl %eax,8(%esp,,)
+ 0x3A9715AA: movl -84(%ebp),%eax
+ 0x3A9715AD: movl %eax,4(%esp,,)
+ 0x3A9715B1: movl -120(%ebp),%edx
+ 0x3A9715B4: movl %edi,%eax
+ 0x3A9715B6: movl %edx,(%esp,,)
+ 0x3A9715B9: movl (%esi),%edx
+ 0x3A9715BB: call 0x3A971120
+. 861 3A971597 41
+. 8B 83 38 00 00 00 8B 38 0F B7 46 04 83 E0 02 89 44 24 08 8B 45 AC 89 44 24 04 8B 55 88 89 F8 89 14 24 8B 16 E8 60 FB FF FF
+
+==== BB 862 match_symbol(0x3A971120) in 16172B, out 89064B, BBs exec'd 0 ====
+ 0x3A971120: pushl %ebp
+ 0x3A971121: movl %esp,%ebp
+ 0x3A971123: pushl %edi
+ 0x3A971124: movl %edx,%edi
+ 0x3A971126: pushl %esi
+ 0x3A971127: xorl %esi, %esi
+ 0x3A971129: pushl %ebx
+ 0x3A97112A: subl $0xB4, %esp
+ 0x3A971130: movl 8(%ebp),%edx
+ 0x3A971133: movl %eax,0xFFFFFF60(%ebp)
+ 0x3A971139: call 0x3A97592B
+. 862 3A971120 30
+. 55 89 E5 57 89 D7 56 31 F6 53 81 EC B4 00 00 00 8B 55 08 89 85 60 FF FF FF E8 ED 47 00 00
+
+==== BB 863 (0x3A97113E) in 16202B, out 89253B, BBs exec'd 0 ====
+ 0x3A97113E: addl $0x752E, %ebx
+ 0x3A971144: movl %ecx,0xFFFFFF5C(%ebp)
+ 0x3A97114A: movl 44(%edx),%eax
+ 0x3A97114D: testb $0x10, 0xFFFFFC14(%ebx)
+ 0x3A971154: movl 4(%eax),%eax
+ 0x3A971157: movl %esi,0xFFFFFF54(%ebp)
+ 0x3A97115D: movl %eax,0xFFFFFF58(%ebp)
+ 0x3A971163: jnz-32 0x3A97132A
+. 863 3A97113E 43
+. 81 C3 2E 75 00 00 89 8D 5C FF FF FF 8B 42 2C F6 83 14 FC FF FF 10 8B 40 04 89 B5 54 FF FF FF 89 85 58 FF FF FF 0F 85 C1 01 00 00
+
+==== BB 864 (0x3A971169) in 16245B, out 89410B, BBs exec'd 0 ====
+ 0x3A971169: movl 8(%ebp),%edx
+ 0x3A97116C: movl 0xAC(%edx),%eax
+ 0x3A971172: testl %eax,%eax
+ 0x3A971174: jz-32 0x3A9712B9
+. 864 3A971169 17
+. 8B 55 08 8B 82 AC 00 00 00 85 C0 0F 84 3F 01 00 00
+
+==== BB 865 (0x3A97117A) in 16262B, out 89498B, BBs exec'd 0 ====
+ 0x3A97117A: movl 8(%ebp),%edx
+ 0x3A97117D: movl (%edx),%esi
+ 0x3A97117F: movl 4(%eax),%edx
+ 0x3A971182: addl %edx,%esi
+ 0x3A971184: cmpw $0x1, (%esi)
+ 0x3A971188: jnz-8 0x3A9711A6
+. 865 3A97117A 16
+. 8B 55 08 8B 32 8B 50 04 01 D6 66 83 3E 01 75 1C
+
+==== BB 866 (0x3A97118A) in 16278B, out 89601B, BBs exec'd 0 ====
+ 0x3A97118A: cmpl 8(%esi),%edi
+ 0x3A97118D: jz-32 0x3A971280
+. 866 3A97118A 9
+. 3B 7E 08 0F 84 ED 00 00 00
+
+==== BB 867 (0x3A971193) in 16287B, out 89666B, BBs exec'd 0 ====
+ 0x3A971193: movl 16(%esi),%eax
+ 0x3A971196: testl %eax,%eax
+ 0x3A971198: jz-32 0x3A971365
+. 867 3A971193 11
+. 8B 46 10 85 C0 0F 84 C7 01 00 00
+
+==== BB 868 (0x3A97119E) in 16298B, out 89738B, BBs exec'd 0 ====
+ 0x3A97119E: addl %eax,%esi
+ 0x3A9711A0: cmpw $0x1, (%esi)
+ 0x3A9711A4: jz-8 0x3A97118A
+. 868 3A97119E 8
+. 01 C6 66 83 3E 01 74 E4
+
+==== BB 869 (0x3A971280) in 16306B, out 89809B, BBs exec'd 0 ====
+ 0x3A971280: movl 12(%esi),%edx
+ 0x3A971283: movl %esi,%eax
+ 0x3A971285: addl %edx,%eax
+ 0x3A971287: movl (%eax),%ecx
+ 0x3A971289: movl 0xFFFFFF58(%ebp),%edx
+ 0x3A97128F: addl %ecx,%edx
+ 0x3A971291: movl %edx,4(%esp,,)
+ 0x3A971295: movl 0xFFFFFF5C(%ebp),%eax
+ 0x3A97129B: movl %eax,(%esp,,)
+ 0x3A97129E: call 0x3A975280
+. 869 3A971280 35
+. 8B 56 0C 89 F0 01 D0 8B 08 8B 95 58 FF FF FF 01 CA 89 54 24 04 8B 85 5C FF FF FF 89 04 24 E8 DD 3F 00 00
+
+==== BB 870 (0x3A9712A3) in 16341B, out 89949B, BBs exec'd 0 ====
+ 0x3A9712A3: xorl %edx, %edx
+ 0x3A9712A5: testl %eax,%eax
+ 0x3A9712A7: jnz-32 0x3A971193
+. 870 3A9712A3 10
+. 31 D2 85 C0 0F 85 E6 FE FF FF
+
+==== BB 871 (0x3A9712AD) in 16351B, out 90022B, BBs exec'd 0 ====
+ 0x3A9712AD: leal -12(%ebp), %esp
+ 0x3A9712B0: movl %edx,%eax
+ 0x3A9712B2: popl %ebx
+ 0x3A9712B3: popl %esi
+ 0x3A9712B4: popl %edi
+ 0x3A9712B5: popl %ebp
+ 0x3A9712B6: ret 12
+. 871 3A9712AD 12
+. 8D 65 F4 89 D0 5B 5E 5F 5D C2 0C 00
+
+==== BB 872 (0x3A9715C0) in 16363B, out 90134B, BBs exec'd 0 ====
+ 0x3A9715C0: orl %eax,-92(%ebp)
+ 0x3A9715C3: subl $0xC, %esp
+ 0x3A9715C6: movzwl 6(%esi),%eax
+ 0x3A9715CA: andl $0x7FFF, %eax
+ 0x3A9715CF: cmpl -108(%ebp),%eax
+ 0x3A9715D2: jbe-8 0x3A9715D7
+. 872 3A9715C0 20
+. 09 45 A4 83 EC 0C 0F B7 46 06 25 FF 7F 00 00 3B 45 94 76 03
+
+==== BB 873 (0x3A9715D4) in 16383B, out 90254B, BBs exec'd 0 ====
+ 0x3A9715D4: movl %eax,-108(%ebp)
+ 0x3A9715D7: movl 12(%esi),%eax
+ 0x3A9715DA: testl %eax,%eax
+ 0x3A9715DC: jnz-8 0x3A971580
+. 873 3A9715D4 10
+. 89 45 94 8B 46 0C 85 C0 75 A2
+
+==== BB 874 (0x3A9715DE) in 16393B, out 90342B, BBs exec'd 0 ====
+ 0x3A9715DE: movl -116(%ebp),%ecx
+ 0x3A9715E1: movl 12(%ecx),%eax
+ 0x3A9715E4: testl %eax,%eax
+ 0x3A9715E6: jz-8 0x3A9715F2
+. 874 3A9715DE 10
+. 8B 4D 8C 8B 41 0C 85 C0 74 0A
+
+==== BB 875 (0x3A9715F2) in 16403B, out 90427B, BBs exec'd 0 ====
+ 0x3A9715F2: movl -104(%ebp),%esi
+ 0x3A9715F5: testl %esi,%esi
+ 0x3A9715F7: jz-8 0x3A971622
+. 875 3A9715F2 7
+. 8B 75 98 85 F6 74 29
+
+==== BB 876 (0x3A971622) in 16410B, out 90499B, BBs exec'd 0 ====
+ 0x3A971622: movl -108(%ebp),%eax
+ 0x3A971625: testl %eax,%eax
+ 0x3A971627: jnz-32 0x3A97174A
+. 876 3A971622 11
+. 8B 45 94 85 C0 0F 85 1D 01 00 00
+
+==== BB 877 (0x3A97174A) in 16421B, out 90571B, BBs exec'd 0 ====
+ 0x3A97174A: movl $0x10,%edi
+ 0x3A97174F: movl %edi,4(%esp,,)
+ 0x3A971753: movl -108(%ebp),%esi
+ 0x3A971756: incl %esi
+ 0x3A971757: movl %esi,(%esp,,)
+ 0x3A97175A: call 0x3A96582C
+. 877 3A97174A 21
+. BF 10 00 00 00 89 7C 24 04 8B 75 94 46 89 34 24 E8 CD 40 FF FF
+
+==== BB 878 (0x3A97175F) in 16442B, out 90674B, BBs exec'd 0 ====
+ 0x3A97175F: movl $0xC, -112(%ebp)
+ 0x3A971766: movl -80(%ebp),%edx
+ 0x3A971769: testl %eax,%eax
+ 0x3A97176B: movl %eax,%edi
+ 0x3A97176D: leal 0xFFFFEB7C(%ebx), %ecx
+ 0x3A971773: movl %eax,0x17C(%edx)
+ 0x3A971779: jz-8 0x3A97172A
+. 878 3A97175F 28
+. C7 45 90 0C 00 00 00 8B 55 B0 85 C0 89 C7 8D 8B 7C EB FF FF 89 82 7C 01 00 00 74 AF
+
+==== BB 879 (0x3A97177B) in 16470B, out 90803B, BBs exec'd 0 ====
+ 0x3A97177B: movl %esi,0x178(%edx)
+ 0x3A971781: movl 0xDC(%edx),%eax
+ 0x3A971787: movl -100(%ebp),%esi
+ 0x3A97178A: movl 4(%eax),%eax
+ 0x3A97178D: testl %esi,%esi
+ 0x3A97178F: movl %eax,0x18C(%edx)
+ 0x3A971795: jz-8 0x3A9717FA
+. 879 3A97177B 28
+. 89 B2 78 01 00 00 8B 82 DC 00 00 00 8B 75 9C 8B 40 04 85 F6 89 82 8C 01 00 00 74 63
+
+==== BB 880 (0x3A971797) in 16498B, out 90933B, BBs exec'd 0 ====
+ 0x3A971797: movl -100(%ebp),%ecx
+ 0x3A97179A: movl (%edx),%eax
+ 0x3A97179C: movl 4(%ecx),%ecx
+ 0x3A97179F: addl %eax,%ecx
+ 0x3A9717A1: movl %ecx,-124(%ebp)
+ 0x3A9717A4: movl -124(%ebp),%esi
+ 0x3A9717A7: movl 8(%esi),%ecx
+ 0x3A9717AA: addl %ecx,%esi
+ 0x3A9717AC: jmp-8 0x3A9717B2
+. 880 3A971797 23
+. 8B 4D 9C 8B 02 8B 49 04 01 C1 89 4D 84 8B 75 84 8B 4E 08 01 CE EB 04
+
+==== BB 881 (0x3A9717B2) in 16521B, out 91049B, BBs exec'd 0 ====
+ 0x3A9717B2: movzwl 6(%esi),%edx
+ 0x3A9717B6: movl (%esi),%eax
+ 0x3A9717B8: movl %edx,%ecx
+ 0x3A9717BA: andl $0x7FFF, %ecx
+ 0x3A9717C0: andl $0x8000, %edx
+ 0x3A9717C6: shll $0x4, %ecx
+ 0x3A9717C9: movl %eax,4(%edi,%ecx,1)
+ 0x3A9717CD: movl -96(%ebp),%eax
+ 0x3A9717D0: movl %edx,8(%edi,%ecx,1)
+ 0x3A9717D4: movl 8(%esi),%edx
+ 0x3A9717D7: addl %edx,%eax
+ 0x3A9717D9: movl %eax,(%edi,%ecx,1)
+ 0x3A9717DC: movl -124(%ebp),%edx
+ 0x3A9717DF: movl -96(%ebp),%eax
+ 0x3A9717E2: addl 4(%edx),%eax
+ 0x3A9717E5: movl %eax,12(%edi,%ecx,1)
+ 0x3A9717E9: movl 12(%esi),%eax
+ 0x3A9717EC: testl %eax,%eax
+ 0x3A9717EE: jnz-8 0x3A9717B0
+. 881 3A9717B2 62
+. 0F B7 56 06 8B 06 89 D1 81 E1 FF 7F 00 00 81 E2 00 80 00 00 C1 E1 04 89 44 0F 04 8B 45 A0 89 54 0F 08 8B 56 08 01 D0 89 04 0F 8B 55 84 8B 45 A0 03 42 04 89 44 0F 0C 8B 46 0C 85 C0 75 C0
+
+==== BB 882 (0x3A9717F0) in 16583B, out 91297B, BBs exec'd 0 ====
+ 0x3A9717F0: movl -124(%ebp),%ecx
+ 0x3A9717F3: movl 12(%ecx),%eax
+ 0x3A9717F6: testl %eax,%eax
+ 0x3A9717F8: jnz-8 0x3A97179F
+. 882 3A9717F0 10
+. 8B 4D 84 8B 41 0C 85 C0 75 A5
+
+==== BB 883 (0x3A9717FA) in 16593B, out 91382B, BBs exec'd 0 ====
+ 0x3A9717FA: movl -104(%ebp),%esi
+ 0x3A9717FD: testl %esi,%esi
+ 0x3A9717FF: jz-32 0x3A97162D
+. 883 3A9717FA 11
+. 8B 75 98 85 F6 0F 84 28 FE FF FF
+
+==== BB 884 (0x3A97162D) in 16604B, out 91454B, BBs exec'd 0 ====
+ 0x3A97162D: movl -92(%ebp),%edx
+ 0x3A971630: leal -12(%ebp), %esp
+ 0x3A971633: movl %edx,%eax
+ 0x3A971635: popl %ebx
+ 0x3A971636: popl %esi
+ 0x3A971637: popl %edi
+ 0x3A971638: popl %ebp
+ 0x3A971639: ret
+. 884 3A97162D 13
+. 8B 55 A4 8D 65 F4 89 D0 5B 5E 5F 5D C3
+
+==== BB 885 (0x3A9718AD) in 16617B, out 91576B, BBs exec'd 0 ====
+ 0x3A9718AD: testl %eax,%eax
+ 0x3A9718AF: jz-8 0x3A971884
+. 885 3A9718AD 4
+. 85 C0 74 D3
+
+==== BB 886 (0x3A971884) in 16621B, out 91635B, BBs exec'd 0 ====
+ 0x3A971884: movl -24(%ebp),%edx
+ 0x3A971887: movl 12(%esi),%esi
+ 0x3A97188A: orl %edx,%edi
+ 0x3A97188C: testl %esi,%esi
+ 0x3A97188E: jz-8 0x3A9718D0
+. 886 3A971884 12
+. 8B 55 E8 8B 76 0C 09 D7 85 F6 74 40
+
+==== BB 887 (0x3A97159F) in 16633B, out 91735B, BBs exec'd 0 ====
+ 0x3A97159F: movzwl 4(%esi),%eax
+ 0x3A9715A3: andl $0x2, %eax
+ 0x3A9715A6: movl %eax,8(%esp,,)
+ 0x3A9715AA: movl -84(%ebp),%eax
+ 0x3A9715AD: movl %eax,4(%esp,,)
+ 0x3A9715B1: movl -120(%ebp),%edx
+ 0x3A9715B4: movl %edi,%eax
+ 0x3A9715B6: movl %edx,(%esp,,)
+ 0x3A9715B9: movl (%esi),%edx
+ 0x3A9715BB: call 0x3A971120
+. 887 3A97159F 33
+. 0F B7 46 04 83 E0 02 89 44 24 08 8B 45 AC 89 44 24 04 8B 55 88 89 F8 89 14 24 8B 16 E8 60 FB FF FF
+
+==== BB 888 (0x3A971580) in 16666B, out 91878B, BBs exec'd 0 ====
+ 0x3A971580: addl %eax,%esi
+ 0x3A971582: movl -80(%ebp),%edx
+ 0x3A971585: movl 8(%esi),%edi
+ 0x3A971588: movl -96(%ebp),%ecx
+ 0x3A97158B: movl 4(%edx),%eax
+ 0x3A97158E: addl %edi,%ecx
+ 0x3A971590: movl %eax,%edi
+ 0x3A971592: cmpb $0x0, (%eax)
+ 0x3A971595: jnz-8 0x3A97159F
+. 888 3A971580 23
+. 01 C6 8B 55 B0 8B 7E 08 8B 4D A0 8B 42 04 01 F9 89 C7 80 38 00 75 08
+
+==== BB 889 (0x3A9715D7) in 16689B, out 92016B, BBs exec'd 0 ====
+ 0x3A9715D7: movl 12(%esi),%eax
+ 0x3A9715DA: testl %eax,%eax
+ 0x3A9715DC: jnz-8 0x3A971580
+. 889 3A9715D7 7
+. 8B 46 0C 85 C0 75 A2
+
+==== BB 890 (0x3A9717B0) in 16696B, out 92088B, BBs exec'd 0 ====
+ 0x3A9717B0: addl %eax,%esi
+ 0x3A9717B2: movzwl 6(%esi),%edx
+ 0x3A9717B6: movl (%esi),%eax
+ 0x3A9717B8: movl %edx,%ecx
+ 0x3A9717BA: andl $0x7FFF, %ecx
+ 0x3A9717C0: andl $0x8000, %edx
+ 0x3A9717C6: shll $0x4, %ecx
+ 0x3A9717C9: movl %eax,4(%edi,%ecx,1)
+ 0x3A9717CD: movl -96(%ebp),%eax
+ 0x3A9717D0: movl %edx,8(%edi,%ecx,1)
+ 0x3A9717D4: movl 8(%esi),%edx
+ 0x3A9717D7: addl %edx,%eax
+ 0x3A9717D9: movl %eax,(%edi,%ecx,1)
+ 0x3A9717DC: movl -124(%ebp),%edx
+ 0x3A9717DF: movl -96(%ebp),%eax
+ 0x3A9717E2: addl 4(%edx),%eax
+ 0x3A9717E5: movl %eax,12(%edi,%ecx,1)
+ 0x3A9717E9: movl 12(%esi),%eax
+ 0x3A9717EC: testl %eax,%eax
+ 0x3A9717EE: jnz-8 0x3A9717B0
+. 890 3A9717B0 64
+. 01 C6 0F B7 56 06 8B 06 89 D1 81 E1 FF 7F 00 00 81 E2 00 80 00 00 C1 E1 04 89 44 0F 04 8B 45 A0 89 54 0F 08 8B 56 08 01 D0 89 04 0F 8B 55 84 8B 45 A0 03 42 04 89 44 0F 0C 8B 46 0C 85 C0 75 C0
+
+==== BB 891 (0x3A970BC0) in 16760B, out 92346B, BBs exec'd 0 ====
+ 0x3A970BC0: movl (%esi),%eax
+ 0x3A970BC2: movl %edi,(%esp,,)
+ 0x3A970BC5: movl %eax,4(%esp,,)
+ 0x3A970BC9: call 0x3A975280
+. 891 3A970BC0 14
+. 8B 06 89 3C 24 89 44 24 04 E8 B2 46 00 00
+
+==== BB 892 (0x3A9715F9) in 16774B, out 92424B, BBs exec'd 0 ====
+ 0x3A9715F9: movl -104(%ebp),%ecx
+ 0x3A9715FC: movl -80(%ebp),%eax
+ 0x3A9715FF: movl 4(%ecx),%edx
+ 0x3A971602: movl (%eax),%ecx
+ 0x3A971604: addl %ecx,%edx
+ 0x3A971606: jmp-8 0x3A97160A
+. 892 3A9715F9 15
+. 8B 4D 98 8B 45 B0 8B 51 04 8B 08 01 CA EB 02
+
+==== BB 893 (0x3A97160A) in 16789B, out 92514B, BBs exec'd 0 ====
+ 0x3A97160A: movzwl 4(%edx),%eax
+ 0x3A97160E: andl $0x7FFF, %eax
+ 0x3A971613: cmpl -108(%ebp),%eax
+ 0x3A971616: jbe-8 0x3A97161B
+. 893 3A97160A 14
+. 0F B7 42 04 25 FF 7F 00 00 3B 45 94 76 03
+
+==== BB 894 (0x3A97161B) in 16803B, out 92603B, BBs exec'd 0 ====
+ 0x3A97161B: movl 16(%edx),%eax
+ 0x3A97161E: testl %eax,%eax
+ 0x3A971620: jnz-8 0x3A971608
+. 894 3A97161B 7
+. 8B 42 10 85 C0 75 E6
+
+==== BB 895 (0x3A971608) in 16810B, out 92675B, BBs exec'd 0 ====
+ 0x3A971608: addl %eax,%edx
+ 0x3A97160A: movzwl 4(%edx),%eax
+ 0x3A97160E: andl $0x7FFF, %eax
+ 0x3A971613: cmpl -108(%ebp),%eax
+ 0x3A971616: jbe-8 0x3A97161B
+. 895 3A971608 16
+. 01 C2 0F B7 42 04 25 FF 7F 00 00 3B 45 94 76 03
+
+==== BB 896 (0x3A971805) in 16826B, out 92774B, BBs exec'd 0 ====
+ 0x3A971805: movl -104(%ebp),%eax
+ 0x3A971808: movl -80(%ebp),%edx
+ 0x3A97180B: movl 4(%eax),%esi
+ 0x3A97180E: movl (%edx),%ecx
+ 0x3A971810: addl %ecx,%esi
+ 0x3A971812: jmp-8 0x3A971816
+. 896 3A971805 15
+. 8B 45 98 8B 55 B0 8B 70 04 8B 0A 01 CE EB 02
+
+==== BB 897 (0x3A971816) in 16841B, out 92864B, BBs exec'd 0 ====
+ 0x3A971816: movl 12(%esi),%eax
+ 0x3A971819: movl %esi,%edi
+ 0x3A97181B: addl %eax,%edi
+ 0x3A97181D: testb $0x1, 2(%esi)
+ 0x3A971821: jnz-8 0x3A97184D
+. 897 3A971816 13
+. 8B 46 0C 89 F7 01 C7 F6 46 02 01 75 2A
+
+==== BB 898 (0x3A97184D) in 16854B, out 92964B, BBs exec'd 0 ====
+ 0x3A97184D: movl 16(%esi),%eax
+ 0x3A971850: testl %eax,%eax
+ 0x3A971852: jnz-8 0x3A971814
+. 898 3A97184D 7
+. 8B 46 10 85 C0 75 C0
+
+==== BB 899 (0x3A971814) in 16861B, out 93036B, BBs exec'd 0 ====
+ 0x3A971814: addl %eax,%esi
+ 0x3A971816: movl 12(%esi),%eax
+ 0x3A971819: movl %esi,%edi
+ 0x3A97181B: addl %eax,%edi
+ 0x3A97181D: testb $0x1, 2(%esi)
+ 0x3A971821: jnz-8 0x3A97184D
+. 899 3A971814 15
+. 01 C6 8B 46 0C 89 F7 01 C7 F6 46 02 01 75 2A
+
+==== BB 900 (0x3A971823) in 16876B, out 93146B, BBs exec'd 0 ====
+ 0x3A971823: movzwl 4(%esi),%eax
+ 0x3A971827: movl -80(%ebp),%edx
+ 0x3A97182A: movl 0x17C(%edx),%ecx
+ 0x3A971830: movl 8(%esi),%edx
+ 0x3A971833: andl $0x7FFF, %eax
+ 0x3A971838: shll $0x4, %eax
+ 0x3A97183B: movl %edx,4(%ecx,%eax,1)
+ 0x3A97183F: movl -96(%ebp),%edx
+ 0x3A971842: addl (%edi),%edx
+ 0x3A971844: xorl %edi, %edi
+ 0x3A971846: movl %edi,12(%ecx,%eax,1)
+ 0x3A97184A: movl %edx,(%ecx,%eax,1)
+ 0x3A97184D: movl 16(%esi),%eax
+ 0x3A971850: testl %eax,%eax
+ 0x3A971852: jnz-8 0x3A971814
+. 900 3A971823 49
+. 0F B7 46 04 8B 55 B0 8B 8A 7C 01 00 00 8B 56 08 25 FF 7F 00 00 C1 E0 04 89 54 01 04 8B 55 A0 03 17 31 FF 89 7C 01 0C 89 14 01 8B 46 10 85 C0 75 C0
+
+==== BB 901 (0x3A971854) in 16925B, out 93357B, BBs exec'd 0 ====
+ 0x3A971854: jmp 0x3A97162D
+. 901 3A971854 5
+. E9 D4 FD FF FF
+
+==== BB 902 (0x3A971618) in 16930B, out 93385B, BBs exec'd 0 ====
+ 0x3A971618: movl %eax,-108(%ebp)
+ 0x3A97161B: movl 16(%edx),%eax
+ 0x3A97161E: testl %eax,%eax
+ 0x3A971620: jnz-8 0x3A971608
+. 902 3A971618 10
+. 89 45 94 8B 42 10 85 C0 75 E6
+
+==== BB 903 (0x3A9718D0) in 16940B, out 93473B, BBs exec'd 0 ====
+ 0x3A9718D0: addl $0xC, %esp
+ 0x3A9718D3: movl %edi,%eax
+ 0x3A9718D5: popl %ebx
+ 0x3A9718D6: popl %esi
+ 0x3A9718D7: popl %edi
+ 0x3A9718D8: popl %ebp
+ 0x3A9718D9: ret
+. 903 3A9718D0 10
+. 83 C4 0C 89 F8 5B 5E 5F 5D C3
+
+==== BB 904 (0x3A9688DD) in 16950B, out 93591B, BBs exec'd 0 ====
+ 0x3A9688DD: testl %eax,%eax
+ 0x3A9688DF: jz-8 0x3A9688E7
+. 904 3A9688DD 4
+. 85 C0 74 06
+
+==== BB 905 (0x3A9688E7) in 16954B, out 93650B, BBs exec'd 0 ====
+ 0x3A9688E7: movl -8(%ebp),%ebx
+ 0x3A9688EA: movl -4(%ebp),%esi
+ 0x3A9688ED: movl %ebp,%esp
+ 0x3A9688EF: popl %ebp
+ 0x3A9688F0: ret
+. 905 3A9688E7 10
+. 8B 5D F8 8B 75 FC 89 EC 5D C3
+
+==== BB 906 (0x3A9701AE) in 16964B, out 93729B, BBs exec'd 0 ====
+ 0x3A9701AE: movl %edi,(%esi)
+ 0x3A9701B0: movl -28(%ebp),%eax
+ 0x3A9701B3: movl %eax,0xE8(%ebx)
+ 0x3A9701B9: movl -12(%ebp),%ebx
+ 0x3A9701BC: movl -8(%ebp),%esi
+ 0x3A9701BF: movl -4(%ebp),%edi
+ 0x3A9701C2: movl %ebp,%esp
+ 0x3A9701C4: popl %ebp
+ 0x3A9701C5: ret
+. 906 3A9701AE 24
+. 89 3E 8B 45 E4 89 83 E8 00 00 00 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 907 (0x3A9671FE) in 16988B, out 93861B, BBs exec'd 0 ====
+ 0x3A9671FE: movl 0xFFFFFF50(%ebp),%edi
+ 0x3A967204: testl %edi,%edi
+ 0x3A967206: jnz-32 0x3A9681A2
+. 907 3A9671FE 14
+. 8B BD 50 FF FF FF 85 FF 0F 85 96 0F 00 00
+
+==== BB 908 (0x3A96720C) in 17002B, out 93939B, BBs exec'd 0 ====
+ 0x3A96720C: movl 0xFFFFF994(%ebx),%ecx
+ 0x3A967212: movl 0x134(%ecx),%edx
+ 0x3A967218: testl %edx,%edx
+ 0x3A96721A: jz-32 0x3A967313
+. 908 3A96720C 20
+. 8B 8B 94 F9 FF FF 8B 91 34 01 00 00 85 D2 0F 84 F3 00 00 00
+
+==== BB 909 (0x3A967313) in 17022B, out 94030B, BBs exec'd 0 ====
+ 0x3A967313: movl 0xFFFFF9E4(%ebx),%eax
+ 0x3A967319: call 0x3A970B30
+. 909 3A967313 11
+. 8B 83 E4 F9 FF FF E8 12 98 00 00
+
+==== BB 910 _dl_debug_initialize(0x3A970B30) in 17033B, out 94094B, BBs exec'd 0 ====
+ 0x3A970B30: call 0x3A975927
+. 910 3A970B30 5
+. E8 F2 4D 00 00
+
+==== BB 911 (0x3A970B35) in 17038B, out 94139B, BBs exec'd 0 ====
+ 0x3A970B35: addl $0x7B37, %ecx
+ 0x3A970B3B: pushl %ebp
+ 0x3A970B3C: movl 0x28(%ecx),%edx
+ 0x3A970B42: movl %esp,%ebp
+ 0x3A970B44: cmpl $0x0, 8(%edx)
+ 0x3A970B48: jnz-8 0x3A970B65
+. 911 3A970B35 21
+. 81 C1 37 7B 00 00 55 8B 91 28 00 00 00 89 E5 83 7A 08 00 75 1B
+
+==== BB 912 (0x3A970B4A) in 17059B, out 94254B, BBs exec'd 0 ====
+ 0x3A970B4A: movl %eax,16(%edx)
+ 0x3A970B4D: movl 0xFFFFF994(%ecx),%eax
+ 0x3A970B53: movl $0x1, (%edx)
+ 0x3A970B59: movl %eax,4(%edx)
+ 0x3A970B5C: leal 0xFFFF8504(%ecx), %eax
+ 0x3A970B62: movl %eax,8(%edx)
+ 0x3A970B65: popl %ebp
+ 0x3A970B66: movl %edx,%eax
+ 0x3A970B68: ret
+. 912 3A970B4A 31
+. 89 42 10 8B 81 94 F9 FF FF C7 02 01 00 00 00 89 42 04 8D 81 04 85 FF FF 89 42 08 5D 89 D0 C3
+
+==== BB 913 (0x3A96731E) in 17090B, out 94379B, BBs exec'd 0 ====
+ 0x3A96731E: movl %eax,0xFFFFFE78(%ebp)
+ 0x3A967324: movl 0xFFFFF994(%ebx),%eax
+ 0x3A96732A: movl 108(%eax),%eax
+ 0x3A96732D: testl %eax,%eax
+ 0x3A96732F: jz-8 0x3A96733A
+. 913 3A96731E 19
+. 89 85 78 FE FF FF 8B 83 94 F9 FF FF 8B 40 6C 85 C0 74 09
+
+==== BB 914 (0x3A967331) in 17109B, out 94483B, BBs exec'd 0 ====
+ 0x3A967331: movl 0xFFFFFE78(%ebp),%edx
+ 0x3A967337: movl %edx,4(%eax)
+ 0x3A96733A: movl 0xFFFFFA50(%ebx),%eax
+ 0x3A967340: testl %eax,%eax
+ 0x3A967342: jz-8 0x3A96734D
+. 914 3A967331 19
+. 8B 95 78 FE FF FF 89 50 04 8B 83 50 FA FF FF 85 C0 74 09
+
+==== BB 915 (0x3A96734D) in 17128B, out 94590B, BBs exec'd 0 ====
+ 0x3A96734D: cmpb $0x0, 0xFFFFFF03(%ebp)
+ 0x3A967354: movl 0xFFFFF994(%ebx),%esi
+ 0x3A96735A: leal 0x150(%esi), %eax
+ 0x3A967360: movl %eax,0xFFFFF9A4(%ebx)
+ 0x3A967366: movl 0x154(%esi),%edx
+ 0x3A96736C: movl %esi,%ecx
+ 0x3A96736E: movl %eax,0xFFFFF99C(%ebx)
+ 0x3A967374: movl 0x150(%esi),%eax
+ 0x3A96737A: movl %edx,0xFFFFFC2C(%ebx)
+ 0x3A967380: movl %eax,0xFFFFFC28(%ebx)
+ 0x3A967386: jz-32 0x3A967910
+. 915 3A96734D 63
+. 80 BD 03 FF FF FF 00 8B B3 94 F9 FF FF 8D 86 50 01 00 00 89 83 A4 F9 FF FF 8B 96 54 01 00 00 89 F1 89 83 9C F9 FF FF 8B 86 50 01 00 00 89 93 2C FC FF FF 89 83 28 FC FF FF 0F 84 84 05 00 00
+
+==== BB 916 (0x3A967910) in 17191B, out 94779B, BBs exec'd 0 ====
+ 0x3A967910: xorl %eax, %eax
+ 0x3A967912: cmpl $0x0, 0xFFFFFD7C(%ebx)
+ 0x3A967919: setnz %al
+ 0x3A96791C: orl %eax,0xFFFFFC3C(%ebx)
+ 0x3A967922: movl %eax,0xFFFFFE74(%ebp)
+ 0x3A967928: movl 12(%esi),%eax
+ 0x3A96792B: testl %eax,%eax
+ 0x3A96792D: jz-8 0x3A96798C
+. 916 3A967910 31
+. 31 C0 83 BB 7C FD FF FF 00 0F 95 C0 09 83 3C FC FF FF 89 85 74 FE FF FF 8B 46 0C 85 C0 74 5D
+
+==== BB 917 (0x3A96792F) in 17222B, out 94939B, BBs exec'd 0 ====
+ 0x3A96792F: movl %eax,%esi
+ 0x3A967931: movl 12(%eax),%eax
+ 0x3A967934: testl %eax,%eax
+ 0x3A967936: jnz-8 0x3A96792F
+. 917 3A96792F 9
+. 89 C6 8B 40 0C 85 C0 75 F7
+
+==== BB 918 (0x3A967938) in 17231B, out 95021B, BBs exec'd 0 ====
+ 0x3A967938: jmp-8 0x3A96798C
+. 918 3A967938 2
+. EB 52
+
+==== BB 919 (0x3A96798C) in 17233B, out 95049B, BBs exec'd 0 ====
+ 0x3A96798C: movl 20(%esi),%eax
+ 0x3A96798F: movl 4(%eax),%eax
+ 0x3A967992: testl %eax,%eax
+ 0x3A967994: jz-8 0x3A96794E
+. 919 3A96798C 10
+. 8B 46 14 8B 40 04 85 C0 74 B8
+
+==== BB 920 (0x3A967996) in 17243B, out 95131B, BBs exec'd 0 ====
+ 0x3A967996: jmp-8 0x3A967940
+. 920 3A967996 2
+. EB A8
+
+==== BB 921 (0x3A967940) in 17245B, out 95159B, BBs exec'd 0 ====
+ 0x3A967940: movl $0x1, 8(%eax)
+ 0x3A967947: movl 4(%eax),%eax
+ 0x3A96794A: testl %eax,%eax
+ 0x3A96794C: jnz-8 0x3A967940
+. 921 3A967940 14
+. C7 40 08 01 00 00 00 8B 40 04 85 C0 75 F2
+
+==== BB 922 (0x3A96794E) in 17259B, out 95246B, BBs exec'd 0 ====
+ 0x3A96794E: movl 0xFFFFFED0(%ebp),%edi
+ 0x3A967954: addl $0x50, %edi
+ 0x3A967957: cmpl %edi,%esi
+ 0x3A967959: jz-8 0x3A967981
+. 922 3A96794E 13
+. 8B BD D0 FE FF FF 83 C7 50 39 FE 74 26
+
+==== BB 923 (0x3A967981) in 17272B, out 95328B, BBs exec'd 0 ====
+ 0x3A967981: movl 16(%esi),%esi
+ 0x3A967984: testl %esi,%esi
+ 0x3A967986: jz-32 0x3A968122
+. 923 3A967981 11
+. 8B 76 10 85 F6 0F 84 96 07 00 00
+
+==== BB 924 (0x3A96795B) in 17283B, out 95400B, BBs exec'd 0 ====
+ 0x3A96795B: movl 0xFFFFFE74(%ebp),%eax
+ 0x3A967961: movl %eax,12(%esp,,)
+ 0x3A967965: movl 0xFFFFFC3C(%ebx),%eax
+ 0x3A96796B: movl %eax,8(%esp,,)
+ 0x3A96796F: movl 0x1B0(%esi),%eax
+ 0x3A967975: movl %esi,(%esp,,)
+ 0x3A967978: movl %eax,4(%esp,,)
+ 0x3A96797C: call 0x3A96DEB0
+. 924 3A96795B 38
+. 8B 85 74 FE FF FF 89 44 24 0C 8B 83 3C FC FF FF 89 44 24 08 8B 86 B0 01 00 00 89 34 24 89 44 24 04 E8 2F 65 00 00
+
+==== BB 925 _dl_relocate_object(0x3A96DEB0) in 17321B, out 95533B, BBs exec'd 0 ====
+ 0x3A96DEB0: pushl %ebp
+ 0x3A96DEB1: movl %esp,%ebp
+ 0x3A96DEB3: leal 8(%ebp), %eax
+ 0x3A96DEB6: pushl %edi
+ 0x3A96DEB7: pushl %esi
+ 0x3A96DEB8: pushl %ebx
+ 0x3A96DEB9: subl $0xFC, %esp
+ 0x3A96DEBF: movl 8(%ebp),%esi
+ 0x3A96DEC2: movl %eax,-20(%ebp)
+ 0x3A96DEC5: call 0x3A97592B
+. 925 3A96DEB0 26
+. 55 89 E5 8D 45 08 57 56 53 81 EC FC 00 00 00 8B 75 08 89 45 EC E8 61 7A 00 00
+
+==== BB 926 (0x3A96DECA) in 17347B, out 95702B, BBs exec'd 0 ====
+ 0x3A96DECA: addl $0xA7A2, %ebx
+ 0x3A96DED0: testb $0x4, 0x174(%esi)
+ 0x3A96DED7: movl $0x0, -104(%ebp)
+ 0x3A96DEDE: movl %esi,%edx
+ 0x3A96DEE0: jnz-32 0x3A96E300
+. 926 3A96DECA 28
+. 81 C3 A2 A7 00 00 F6 86 74 01 00 00 04 C7 45 98 00 00 00 00 89 F2 0F 85 1A 04 00 00
+
+==== BB 927 (0x3A96DEE6) in 17375B, out 95817B, BBs exec'd 0 ====
+ 0x3A96DEE6: movl 20(%ebp),%edi
+ 0x3A96DEE9: testl %edi,%edi
+ 0x3A96DEEB: jnz-8 0x3A96DEFB
+. 927 3A96DEE6 7
+. 8B 7D 14 85 FF 75 0E
+
+==== BB 928 (0x3A96DEED) in 17382B, out 95889B, BBs exec'd 0 ====
+ 0x3A96DEED: xorl %eax, %eax
+ 0x3A96DEEF: cmpl $0x0, 120(%esi)
+ 0x3A96DEF3: setz %al
+ 0x3A96DEF6: negl %eax
+ 0x3A96DEF8: andl %eax,16(%ebp)
+ 0x3A96DEFB: testb $0x20, 0xFFFFFC14(%ebx)
+ 0x3A96DF02: jnz-32 0x3A96E90C
+. 928 3A96DEED 27
+. 31 C0 83 7E 78 00 0F 94 C0 F7 D8 21 45 10 F6 83 14 FC FF FF 20 0F 85 04 0A 00 00
+
+==== BB 929 (0x3A96DF08) in 17409B, out 96040B, BBs exec'd 0 ====
+ 0x3A96DF08: movl 112(%esi),%ecx
+ 0x3A96DF0B: testl %ecx,%ecx
+ 0x3A96DF0D: jnz-32 0x3A96E94D
+. 929 3A96DF08 11
+. 8B 4E 70 85 C9 0F 85 3A 0A 00 00
+
+==== BB 930 (0x3A96DF13) in 17420B, out 96112B, BBs exec'd 0 ====
+ 0x3A96DF13: movl 44(%esi),%eax
+ 0x3A96DF16: movl 4(%eax),%eax
+ 0x3A96DF19: movl %eax,-16(%ebp)
+ 0x3A96DF1C: movl 116(%esi),%eax
+ 0x3A96DF1F: testl %eax,%eax
+ 0x3A96DF21: jz-8 0x3A96DF70
+. 930 3A96DF13 16
+. 8B 46 2C 8B 40 04 89 45 F0 8B 46 74 85 C0 74 4D
+
+==== BB 931 (0x3A96DF23) in 17436B, out 96217B, BBs exec'd 0 ====
+ 0x3A96DF23: movl 16(%ebp),%edi
+ 0x3A96DF26: testl %edi,%edi
+ 0x3A96DF28: jz-8 0x3A96DF70
+. 931 3A96DF23 7
+. 8B 7D 10 85 FF 74 46
+
+==== BB 932 (0x3A96DF2A) in 17443B, out 96289B, BBs exec'd 0 ====
+ 0x3A96DF2A: movl 36(%esi),%eax
+ 0x3A96DF2D: movl 4(%eax),%edx
+ 0x3A96DF30: movl 4(%edx),%eax
+ 0x3A96DF33: testl %eax,%eax
+ 0x3A96DF35: jz-8 0x3A96DF4A
+. 932 3A96DF2A 13
+. 8B 46 24 8B 50 04 8B 42 04 85 C0 74 13
+
+==== BB 933 (0x3A96DF4A) in 17456B, out 96384B, BBs exec'd 0 ====
+ 0x3A96DF4A: movl %esi,4(%edx)
+ 0x3A96DF4D: movl 20(%ebp),%eax
+ 0x3A96DF50: testl %eax,%eax
+ 0x3A96DF52: jnz-32 0x3A96EA37
+. 933 3A96DF4A 14
+. 89 72 04 8B 45 14 85 C0 0F 85 DF 0A 00 00
+
+==== BB 934 (0x3A96DF58) in 17470B, out 96472B, BBs exec'd 0 ====
+ 0x3A96DF58: leal 0xFFFF7884(%ebx), %eax
+ 0x3A96DF5E: movl %eax,8(%edx)
+ 0x3A96DF61: jmp-8 0x3A96DF70
+. 934 3A96DF58 11
+. 8D 83 84 78 FF FF 89 42 08 EB 0D
+
+==== BB 935 (0x3A96DF70) in 17481B, out 96529B, BBs exec'd 0 ====
+ 0x3A96DF70: movl $0x0, -44(%ebp)
+ 0x3A96DF77: movl 92(%esi),%eax
+ 0x3A96DF7A: movl $0x0, -36(%ebp)
+ 0x3A96DF81: movl $0x0, -48(%ebp)
+ 0x3A96DF88: testl %eax,%eax
+ 0x3A96DF8A: movl $0x0, -52(%ebp)
+ 0x3A96DF91: jz-8 0x3A96DFA2
+. 935 3A96DF70 35
+. C7 45 D4 00 00 00 00 8B 46 5C C7 45 DC 00 00 00 00 C7 45 D0 00 00 00 00 85 C0 C7 45 CC 00 00 00 00 74 0F
+
+==== BB 936 (0x3A96DF93) in 17516B, out 96664B, BBs exec'd 0 ====
+ 0x3A96DF93: movl 4(%eax),%eax
+ 0x3A96DF96: movl %eax,-52(%ebp)
+ 0x3A96DF99: movl 96(%esi),%eax
+ 0x3A96DF9C: movl 4(%eax),%eax
+ 0x3A96DF9F: movl %eax,-48(%ebp)
+ 0x3A96DFA2: movl 104(%esi),%eax
+ 0x3A96DFA5: testl %eax,%eax
+ 0x3A96DFA7: jz-8 0x3A96DFB3
+. 936 3A96DF93 22
+. 8B 40 04 89 45 CC 8B 46 60 8B 40 04 89 45 D0 8B 46 68 85 C0 74 0A
+
+==== BB 937 (0x3A96DFA9) in 17538B, out 96792B, BBs exec'd 0 ====
+ 0x3A96DFA9: cmpl $0x11, 4(%eax)
+ 0x3A96DFAD: jz-32 0x3A96E226
+. 937 3A96DFA9 10
+. 83 78 04 11 0F 84 73 02 00 00
+
+==== BB 938 (0x3A96E226) in 17548B, out 96855B, BBs exec'd 0 ====
+ 0x3A96E226: movl 16(%ebp),%edi
+ 0x3A96E229: movl 116(%esi),%eax
+ 0x3A96E22C: testl %edi,%edi
+ 0x3A96E22E: movl 4(%eax),%ecx
+ 0x3A96E231: jnz-8 0x3A96E23F
+. 938 3A96E226 13
+. 8B 7D 10 8B 46 74 85 FF 8B 48 04 75 0C
+
+==== BB 939 (0x3A96E23F) in 17561B, out 96956B, BBs exec'd 0 ====
+ 0x3A96E23F: movl %ecx,-40(%ebp)
+ 0x3A96E242: movl 32(%esi),%eax
+ 0x3A96E245: movl 16(%ebp),%edx
+ 0x3A96E248: movl 4(%eax),%eax
+ 0x3A96E24B: movl %edx,-32(%ebp)
+ 0x3A96E24E: movl %eax,-36(%ebp)
+ 0x3A96E251: jmp 0x3A96DFB3
+. 939 3A96E23F 23
+. 89 4D D8 8B 46 20 8B 55 10 8B 40 04 89 55 E0 89 45 DC E9 5D FD FF FF
+
+==== BB 940 (0x3A96DFB3) in 17584B, out 97059B, BBs exec'd 0 ====
+ 0x3A96DFB3: movl $0x0, -112(%ebp)
+ 0x3A96DFBA: movl %esi,-116(%ebp)
+ 0x3A96DFBD: movl -112(%ebp),%ecx
+ 0x3A96DFC0: leal (%ecx,%ecx,2), %eax
+ 0x3A96DFC3: leal -12(%ebp,%eax,4), %eax
+ 0x3A96DFC7: leal -40(%eax), %edx
+ 0x3A96DFCA: movl -40(%eax),%ecx
+ 0x3A96DFCD: movl 4(%edx),%edi
+ 0x3A96DFD0: movl %ecx,%eax
+ 0x3A96DFD2: addl %edi,%eax
+ 0x3A96DFD4: movl %eax,-124(%ebp)
+ 0x3A96DFD7: movl (%esi),%eax
+ 0x3A96DFD9: movl %ecx,-120(%ebp)
+ 0x3A96DFDC: movl %eax,-128(%ebp)
+ 0x3A96DFDF: movl 8(%edx),%eax
+ 0x3A96DFE2: testl %eax,%eax
+ 0x3A96DFE4: jz-8 0x3A96E035
+. 940 3A96DFB3 51
+. C7 45 90 00 00 00 00 89 75 8C 8B 4D 90 8D 04 49 8D 44 85 F4 8D 50 D8 8B 48 D8 8B 7A 04 89 C8 01 F8 89 45 84 8B 06 89 4D 88 89 45 80 8B 42 08 85 C0 74 4F
+
+==== BB 941 (0x3A96E035) in 17635B, out 97277B, BBs exec'd 0 ====
+ 0x3A96E035: movl 48(%esi),%eax
+ 0x3A96E038: xorl %edx, %edx
+ 0x3A96E03A: movl 4(%eax),%eax
+ 0x3A96E03D: movl %edx,0xFFFFFF78(%ebp)
+ 0x3A96E043: movl %eax,0xFFFFFF7C(%ebp)
+ 0x3A96E049: movl 0xB4(%esi),%eax
+ 0x3A96E04F: testl %eax,%eax
+ 0x3A96E051: jz-8 0x3A96E05C
+. 941 3A96E035 30
+. 8B 46 30 31 D2 8B 40 04 89 95 78 FF FF FF 89 85 7C FF FF FF 8B 86 B4 00 00 00 85 C0 74 09
+
+==== BB 942 (0x3A96E053) in 17665B, out 97415B, BBs exec'd 0 ====
+ 0x3A96E053: movl 4(%eax),%eax
+ 0x3A96E056: movl %eax,0xFFFFFF78(%ebp)
+ 0x3A96E05C: movl %edi,%eax
+ 0x3A96E05E: movl %ecx,%edx
+ 0x3A96E060: shrl $0x3, %eax
+ 0x3A96E063: cmpl 0xFFFFFF78(%ebp),%eax
+ 0x3A96E069: jbe-8 0x3A96E071
+. 942 3A96E053 24
+. 8B 40 04 89 85 78 FF FF FF 89 F8 89 CA C1 E8 03 3B 85 78 FF FF FF 76 06
+
+==== BB 943 (0x3A96E06B) in 17689B, out 97533B, BBs exec'd 0 ====
+ 0x3A96E06B: movl 0xFFFFFF78(%ebp),%eax
+ 0x3A96E071: leal 0xFFFFF9E4(%ebx), %ecx
+ 0x3A96E077: leal (%edx,%eax,8), %eax
+ 0x3A96E07A: cmpl %ecx,%esi
+ 0x3A96E07C: movl %eax,-120(%ebp)
+ 0x3A96E07F: jz-8 0x3A96E0B0
+. 943 3A96E06B 22
+. 8B 85 78 FF FF FF 8D 8B E4 F9 FF FF 8D 04 C2 39 CE 89 45 88 74 2F
+
+==== BB 944 (0x3A96E081) in 17711B, out 97645B, BBs exec'd 0 ====
+ 0x3A96E081: movl -128(%ebp),%edi
+ 0x3A96E084: testl %edi,%edi
+ 0x3A96E086: jz-8 0x3A96E0B0
+. 944 3A96E081 7
+. 8B 7D 80 85 FF 74 28
+
+==== BB 945 (0x3A96E088) in 17718B, out 97717B, BBs exec'd 0 ====
+ 0x3A96E088: cmpl %eax,%edx
+ 0x3A96E08A: jnb-8 0x3A96E0B0
+. 945 3A96E088 4
+. 39 C2 73 24
+
+==== BB 946 (0x3A96E08C) in 17722B, out 97774B, BBs exec'd 0 ====
+ 0x3A96E08C: leal 0(%esi,,), %esi
+ 0x3A96E090: movl (%edx),%ecx
+ 0x3A96E092: addl $0x8, %edx
+ 0x3A96E095: movl -128(%ebp),%eax
+ 0x3A96E098: movl -128(%ebp),%edi
+ 0x3A96E09B: addl %ecx,%eax
+ 0x3A96E09D: addl %edi,(%eax)
+ 0x3A96E09F: cmpl -120(%ebp),%edx
+ 0x3A96E0A2: jb-8 0x3A96E090
+. 946 3A96E08C 24
+. 8D 74 26 00 8B 0A 83 C2 08 8B 45 80 8B 7D 80 01 C8 01 38 3B 55 88 72 EC
+
+==== BB 947 (0x3A96E090) in 17746B, out 97916B, BBs exec'd 0 ====
+ 0x3A96E090: movl (%edx),%ecx
+ 0x3A96E092: addl $0x8, %edx
+ 0x3A96E095: movl -128(%ebp),%eax
+ 0x3A96E098: movl -128(%ebp),%edi
+ 0x3A96E09B: addl %ecx,%eax
+ 0x3A96E09D: addl %edi,(%eax)
+ 0x3A96E09F: cmpl -120(%ebp),%edx
+ 0x3A96E0A2: jb-8 0x3A96E090
+. 947 3A96E090 20
+. 8B 0A 83 C2 08 8B 45 80 8B 7D 80 01 C8 01 38 3B 55 88 72 EC
+
+==== BB 948 (0x3A96E0A4) in 17766B, out 98045B, BBs exec'd 0 ====
+ 0x3A96E0A4: leal 0x0(%esi), %esi
+ 0x3A96E0AA: leal 0x0(%edi), %edi
+ 0x3A96E0B0: movl 0xDC(%esi),%eax
+ 0x3A96E0B6: testl %eax,%eax
+ 0x3A96E0B8: jz-32 0x3A96E631
+. 948 3A96E0A4 26
+. 8D B6 00 00 00 00 8D BF 00 00 00 00 8B 86 DC 00 00 00 85 C0 0F 84 73 05 00 00
+
+==== BB 949 (0x3A96E0BE) in 17792B, out 98143B, BBs exec'd 0 ====
+ 0x3A96E0BE: movl 4(%eax),%eax
+ 0x3A96E0C1: movl %eax,0xFFFFFF74(%ebp)
+ 0x3A96E0C7: movl -124(%ebp),%eax
+ 0x3A96E0CA: cmpl %eax,-120(%ebp)
+ 0x3A96E0CD: jnb-32 0x3A96E330
+. 949 3A96E0BE 21
+. 8B 40 04 89 85 74 FF FF FF 8B 45 84 39 45 88 0F 83 5D 02 00 00
+
+==== BB 950 (0x3A96E0D3) in 17813B, out 98244B, BBs exec'd 0 ====
+ 0x3A96E0D3: leal 0x0(%esi), %esi
+ 0x3A96E0D9: leal 0(%edi,,), %edi
+ 0x3A96E0E0: movl -120(%ebp),%edx
+ 0x3A96E0E3: movl 0xFFFFFF74(%ebp),%edi
+ 0x3A96E0E9: movl 4(%edx),%edx
+ 0x3A96E0EC: movl %edx,0xFFFFFF0C(%ebp)
+ 0x3A96E0F2: movl %edx,%eax
+ 0x3A96E0F4: shrl $0x8, %eax
+ 0x3A96E0F7: movzwl (%edi,%eax,2),%ecx
+ 0x3A96E0FB: movl 0xFFFFFF7C(%ebp),%edi
+ 0x3A96E101: shll $0x4, %eax
+ 0x3A96E104: addl %eax,%edi
+ 0x3A96E106: movl -116(%ebp),%eax
+ 0x3A96E109: andl $0x7FFF, %ecx
+ 0x3A96E10F: movl %edi,-88(%ebp)
+ 0x3A96E112: shll $0x4, %ecx
+ 0x3A96E115: movl 0x17C(%eax),%edx
+ 0x3A96E11B: movl -128(%ebp),%eax
+ 0x3A96E11E: addl %edx,%ecx
+ 0x3A96E120: movl -120(%ebp),%edx
+ 0x3A96E123: addl (%edx),%eax
+ 0x3A96E125: movzbl 0xFFFFFF0C(%ebp),%edx
+ 0x3A96E12C: movl %eax,0xFFFFFF70(%ebp)
+ 0x3A96E132: cmpl $0x8, %edx
+ 0x3A96E135: movl %edx,0xFFFFFF6C(%ebp)
+ 0x3A96E13B: jz-32 0x3A96ECE5
+. 950 3A96E0D3 110
+. 8D B6 00 00 00 00 8D BC 27 00 00 00 00 8B 55 88 8B BD 74 FF FF FF 8B 52 04 89 95 0C FF FF FF 89 D0 C1 E8 08 0F B7 0C 47 8B BD 7C FF FF FF C1 E0 04 01 C7 8B 45 8C 81 E1 FF 7F 00 00 89 7D A8 C1 E1 04 8B 90 7C 01 00 00 8B 45 80 01 D1 8B 55 88 03 02 0F B6 95 0C FF FF FF 89 85 70 FF FF FF 83 FA 08 89 95 6C FF FF FF 0F 84 A4 0B 00 00
+
+==== BB 951 (0x3A96E141) in 17923B, out 98561B, BBs exec'd 0 ====
+ 0x3A96E141: movl 0xFFFFFF6C(%ebp),%eax
+ 0x3A96E147: testl %eax,%eax
+ 0x3A96E149: jz-32 0x3A96E320
+. 951 3A96E141 14
+. 8B 85 6C FF FF FF 85 C0 0F 84 D1 01 00 00
+
+==== BB 952 (0x3A96E14F) in 17937B, out 98636B, BBs exec'd 0 ====
+ 0x3A96E14F: movl %edi,0xFFFFFF68(%ebp)
+ 0x3A96E155: movzbl 12(%edi),%eax
+ 0x3A96E159: shrb $0x4, %al
+ 0x3A96E15C: testb %al,%al
+ 0x3A96E15E: jz-32 0x3A96E740
+. 952 3A96E14F 21
+. 89 BD 68 FF FF FF 0F B6 47 0C C0 E8 04 84 C0 0F 84 DC 05 00 00
+
+==== BB 953 (0x3A96E164) in 17958B, out 98751B, BBs exec'd 0 ====
+ 0x3A96E164: cmpl 0x1FC(%esi),%edi
+ 0x3A96E16A: jz-32 0x3A96ED40
+. 953 3A96E164 12
+. 3B BE FC 01 00 00 0F 84 D0 0B 00 00
+
+==== BB 954 (0x3A96E170) in 17970B, out 98819B, BBs exec'd 0 ====
+ 0x3A96E170: xorl %edx, %edx
+ 0x3A96E172: cmpl $0x7, 0xFFFFFF6C(%ebp)
+ 0x3A96E179: setz %dl
+ 0x3A96E17C: cmpl $0x5, 0xFFFFFF6C(%ebp)
+ 0x3A96E183: jz-32 0x3A96E904
+. 954 3A96E170 25
+. 31 D2 83 BD 6C FF FF FF 07 0F 94 C2 83 BD 6C FF FF FF 05 0F 84 7B 07 00 00
+
+==== BB 955 (0x3A96E189) in 17995B, out 98929B, BBs exec'd 0 ====
+ 0x3A96E189: movl %edx,0x200(%esi)
+ 0x3A96E18F: movl 0xFFFFFF68(%ebp),%edi
+ 0x3A96E195: movl %edi,0x1FC(%esi)
+ 0x3A96E19B: xorl %edi, %edi
+ 0x3A96E19D: testl %ecx,%ecx
+ 0x3A96E19F: movl $0x1,%esi
+ 0x3A96E1A4: jz-8 0x3A96E1B1
+. 955 3A96E189 29
+. 89 96 00 02 00 00 8B BD 68 FF FF FF 89 BE FC 01 00 00 31 FF 85 C9 BE 01 00 00 00 74 0B
+
+==== BB 956 (0x3A96E1A6) in 18024B, out 99062B, BBs exec'd 0 ====
+ 0x3A96E1A6: movl 4(%ecx),%eax
+ 0x3A96E1A9: testl %eax,%eax
+ 0x3A96E1AB: jz-8 0x3A96E1B1
+. 956 3A96E1A6 7
+. 8B 41 04 85 C0 74 04
+
+==== BB 957 (0x3A96E1AD) in 18031B, out 99134B, BBs exec'd 0 ====
+ 0x3A96E1AD: movl %ecx,%edi
+ 0x3A96E1AF: xorl %esi, %esi
+ 0x3A96E1B1: movl -88(%ebp),%eax
+ 0x3A96E1B4: movl -16(%ebp),%ecx
+ 0x3A96E1B7: movl (%eax),%eax
+ 0x3A96E1B9: movl %esi,12(%esp,,)
+ 0x3A96E1BD: movl %edi,4(%esp,,)
+ 0x3A96E1C1: addl %ecx,%eax
+ 0x3A96E1C3: xorl %ecx, %ecx
+ 0x3A96E1C5: movl %ecx,16(%esp,,)
+ 0x3A96E1C9: leal -88(%ebp), %ecx
+ 0x3A96E1CC: movl %edx,8(%esp,,)
+ 0x3A96E1D0: movl 12(%ebp),%edx
+ 0x3A96E1D3: movl %edx,(%esp,,)
+ 0x3A96E1D6: movl 8(%ebp),%edx
+ 0x3A96E1D9: call 0x3A96C0E0
+. 957 3A96E1AD 49
+. 89 CF 31 F6 8B 45 A8 8B 4D F0 8B 00 89 74 24 0C 89 7C 24 04 01 C8 31 C9 89 4C 24 10 8D 4D A8 89 54 24 08 8B 55 0C 89 14 24 8B 55 08 E8 02 DF FF FF
+
+==== BB 958 _dl_lookup_symbol_x(0x3A96C0E0) in 18080B, out 99346B, BBs exec'd 0 ====
+ 0x3A96C0E0: pushl %ebp
+ 0x3A96C0E1: movl %esp,%ebp
+ 0x3A96C0E3: pushl %edi
+ 0x3A96C0E4: xorl %edi, %edi
+ 0x3A96C0E6: pushl %esi
+ 0x3A96C0E7: pushl %ebx
+ 0x3A96C0E8: subl $0xA0, %esp
+ 0x3A96C0EE: call 0x3A97592B
+. 958 3A96C0E0 19
+. 55 89 E5 57 31 FF 56 53 81 EC A0 00 00 00 E8 38 98 00 00
+
+==== BB 959 (0x3A96C0F3) in 18099B, out 99496B, BBs exec'd 0 ====
+ 0x3A96C0F3: addl $0xC579, %ebx
+ 0x3A96C0F9: movl %eax,-88(%ebp)
+ 0x3A96C0FC: movl %edx,-92(%ebp)
+ 0x3A96C0FF: movl %ecx,-96(%ebp)
+ 0x3A96C102: call 0x3A96BCF0
+. 959 3A96C0F3 20
+. 81 C3 79 C5 00 00 89 45 A8 89 55 A4 89 4D A0 E8 E9 FB FF FF
+
+==== BB 960 _dl_elf_hash(0x3A96BCF0) in 18119B, out 99606B, BBs exec'd 0 ====
+ 0x3A96BCF0: pushl %ebp
+ 0x3A96BCF1: movl %eax,%ecx
+ 0x3A96BCF3: xorl %edx, %edx
+ 0x3A96BCF5: movzbl (%eax),%eax
+ 0x3A96BCF8: movl %esp,%ebp
+ 0x3A96BCFA: testb %al,%al
+ 0x3A96BCFC: jz-8 0x3A96BD70
+. 960 3A96BCF0 14
+. 55 89 C1 31 D2 0F B6 00 89 E5 84 C0 74 72
+
+==== BB 961 (0x3A96BCFE) in 18133B, out 99734B, BBs exec'd 0 ====
+ 0x3A96BCFE: incl %ecx
+ 0x3A96BCFF: movzbl %al,%edx
+ 0x3A96BD02: movzbl (%ecx),%eax
+ 0x3A96BD05: testb %al,%al
+ 0x3A96BD07: jz-8 0x3A96BD70
+. 961 3A96BCFE 11
+. 41 0F B6 D0 0F B6 01 84 C0 74 67
+
+==== BB 962 (0x3A96BD09) in 18144B, out 99830B, BBs exec'd 0 ====
+ 0x3A96BD09: shll $0x4, %edx
+ 0x3A96BD0C: movzbl %al,%eax
+ 0x3A96BD0F: incl %ecx
+ 0x3A96BD10: addl %eax,%edx
+ 0x3A96BD12: movzbl (%ecx),%eax
+ 0x3A96BD15: testb %al,%al
+ 0x3A96BD17: jz-8 0x3A96BD70
+. 962 3A96BD09 16
+. C1 E2 04 0F B6 C0 41 01 C2 0F B6 01 84 C0 74 57
+
+==== BB 963 (0x3A96BD19) in 18160B, out 99943B, BBs exec'd 0 ====
+ 0x3A96BD19: shll $0x4, %edx
+ 0x3A96BD1C: movzbl %al,%eax
+ 0x3A96BD1F: incl %ecx
+ 0x3A96BD20: addl %eax,%edx
+ 0x3A96BD22: movzbl (%ecx),%eax
+ 0x3A96BD25: testb %al,%al
+ 0x3A96BD27: jz-8 0x3A96BD70
+. 963 3A96BD19 16
+. C1 E2 04 0F B6 C0 41 01 C2 0F B6 01 84 C0 74 47
+
+==== BB 964 (0x3A96BD29) in 18176B, out 100056B, BBs exec'd 0 ====
+ 0x3A96BD29: shll $0x4, %edx
+ 0x3A96BD2C: movzbl %al,%eax
+ 0x3A96BD2F: incl %ecx
+ 0x3A96BD30: addl %eax,%edx
+ 0x3A96BD32: movzbl (%ecx),%eax
+ 0x3A96BD35: testb %al,%al
+ 0x3A96BD37: jz-8 0x3A96BD70
+. 964 3A96BD29 16
+. C1 E2 04 0F B6 C0 41 01 C2 0F B6 01 84 C0 74 37
+
+==== BB 965 (0x3A96BD39) in 18192B, out 100169B, BBs exec'd 0 ====
+ 0x3A96BD39: shll $0x4, %edx
+ 0x3A96BD3C: movzbl %al,%eax
+ 0x3A96BD3F: incl %ecx
+ 0x3A96BD40: addl %eax,%edx
+ 0x3A96BD42: movzbl (%ecx),%eax
+ 0x3A96BD45: testb %al,%al
+ 0x3A96BD47: jz-8 0x3A96BD70
+. 965 3A96BD39 16
+. C1 E2 04 0F B6 C0 41 01 C2 0F B6 01 84 C0 74 27
+
+==== BB 966 (0x3A96BD49) in 18208B, out 100282B, BBs exec'd 0 ====
+ 0x3A96BD49: leal 0(%esi,,), %esi
+ 0x3A96BD50: shll $0x4, %edx
+ 0x3A96BD53: movzbl %al,%eax
+ 0x3A96BD56: addl %eax,%edx
+ 0x3A96BD58: movl %edx,%eax
+ 0x3A96BD5A: incl %ecx
+ 0x3A96BD5B: andl $0xF0000000, %eax
+ 0x3A96BD60: xorl %eax,%edx
+ 0x3A96BD62: shrl $0x18, %eax
+ 0x3A96BD65: xorl %eax,%edx
+ 0x3A96BD67: movzbl (%ecx),%eax
+ 0x3A96BD6A: testb %al,%al
+ 0x3A96BD6C: jnz-8 0x3A96BD50
+. 966 3A96BD49 37
+. 8D B4 26 00 00 00 00 C1 E2 04 0F B6 C0 01 C2 89 D0 41 25 00 00 00 F0 31 C2 C1 E8 18 31 C2 0F B6 01 84 C0 75 E2
+
+==== BB 967 (0x3A96BD50) in 18245B, out 100444B, BBs exec'd 0 ====
+ 0x3A96BD50: shll $0x4, %edx
+ 0x3A96BD53: movzbl %al,%eax
+ 0x3A96BD56: addl %eax,%edx
+ 0x3A96BD58: movl %edx,%eax
+ 0x3A96BD5A: incl %ecx
+ 0x3A96BD5B: andl $0xF0000000, %eax
+ 0x3A96BD60: xorl %eax,%edx
+ 0x3A96BD62: shrl $0x18, %eax
+ 0x3A96BD65: xorl %eax,%edx
+ 0x3A96BD67: movzbl (%ecx),%eax
+ 0x3A96BD6A: testb %al,%al
+ 0x3A96BD6C: jnz-8 0x3A96BD50
+. 967 3A96BD50 30
+. C1 E2 04 0F B6 C0 01 C2 89 D0 41 25 00 00 00 F0 31 C2 C1 E8 18 31 C2 0F B6 01 84 C0 75 E2
+
+==== BB 968 (0x3A96BD6E) in 18275B, out 100597B, BBs exec'd 0 ====
+ 0x3A96BD6E: movl %esi,%esi
+ 0x3A96BD70: popl %ebp
+ 0x3A96BD71: movl %edx,%eax
+ 0x3A96BD73: ret
+. 968 3A96BD6E 6
+. 89 F6 5D 89 D0 C3
+
+==== BB 969 (0x3A96C107) in 18281B, out 100663B, BBs exec'd 0 ====
+ 0x3A96C107: movl %eax,-100(%ebp)
+ 0x3A96C10A: movl 24(%ebp),%eax
+ 0x3A96C10D: movl 8(%ebp),%esi
+ 0x3A96C110: incl 0xFFFFF9D4(%ebx)
+ 0x3A96C116: testl %eax,%eax
+ 0x3A96C118: movl $0x0, -68(%ebp)
+ 0x3A96C11F: movl $0x0, -64(%ebp)
+ 0x3A96C126: jnz-32 0x3A96C3BC
+. 969 3A96C107 37
+. 89 45 9C 8B 45 18 8B 75 08 FF 83 D4 F9 FF FF 85 C0 C7 45 BC 00 00 00 00 C7 45 C0 00 00 00 00 0F 85 90 02 00 00
+
+==== BB 970 (0x3A96C12C) in 18318B, out 100811B, BBs exec'd 0 ====
+ 0x3A96C12C: movl 8(%ebp),%eax
+ 0x3A96C12F: movl (%eax),%edx
+ 0x3A96C131: testl %edx,%edx
+ 0x3A96C133: movl %edi,%eax
+ 0x3A96C135: jz-8 0x3A96C195
+. 970 3A96C12C 11
+. 8B 45 08 8B 10 85 D2 89 F8 74 5E
+
+==== BB 971 (0x3A96C137) in 18329B, out 100900B, BBs exec'd 0 ====
+ 0x3A96C137: leal -68(%ebp), %edx
+ 0x3A96C13A: movl %edx,-124(%ebp)
+ 0x3A96C13D: leal 0(%esi), %esi
+ 0x3A96C140: movl 16(%ebp),%ecx
+ 0x3A96C143: movl %ecx,24(%esp,,)
+ 0x3A96C147: movl 24(%ebp),%edx
+ 0x3A96C14A: movl %edx,20(%esp,,)
+ 0x3A96C14E: movl 20(%ebp),%ecx
+ 0x3A96C151: movl %ecx,16(%esp,,)
+ 0x3A96C155: movl 12(%ebp),%edx
+ 0x3A96C158: movl %eax,8(%esp,,)
+ 0x3A96C15C: movl %edx,12(%esp,,)
+ 0x3A96C160: movl (%esi),%eax
+ 0x3A96C162: movl %eax,4(%esp,,)
+ 0x3A96C166: movl -124(%ebp),%ecx
+ 0x3A96C169: movl %ecx,(%esp,,)
+ 0x3A96C16C: movl -96(%ebp),%eax
+ 0x3A96C16F: movl -100(%ebp),%edx
+ 0x3A96C172: movl (%eax),%ecx
+ 0x3A96C174: movl -88(%ebp),%eax
+ 0x3A96C177: call 0x3A96BDB0
+. 971 3A96C137 69
+. 8D 55 BC 89 55 84 8D 76 00 8B 4D 10 89 4C 24 18 8B 55 18 89 54 24 14 8B 4D 14 89 4C 24 10 8B 55 0C 89 44 24 08 89 54 24 0C 8B 06 89 44 24 04 8B 4D 84 89 0C 24 8B 45 A0 8B 55 9C 8B 08 8B 45 A8 E8 34 FC FF FF
+
+==== BB 972 do_lookup_x(0x3A96BDB0) in 18398B, out 101151B, BBs exec'd 0 ====
+ 0x3A96BDB0: pushl %ebp
+ 0x3A96BDB1: movl %esp,%ebp
+ 0x3A96BDB3: pushl %edi
+ 0x3A96BDB4: pushl %esi
+ 0x3A96BDB5: pushl %ebx
+ 0x3A96BDB6: subl $0x3C, %esp
+ 0x3A96BDB9: movl %eax,-16(%ebp)
+ 0x3A96BDBC: movl 12(%ebp),%eax
+ 0x3A96BDBF: movl %edx,-20(%ebp)
+ 0x3A96BDC2: call 0x3A97592B
+. 972 3A96BDB0 23
+. 55 89 E5 57 56 53 83 EC 3C 89 45 F0 8B 45 0C 89 55 EC E8 64 9B 00 00
+
+==== BB 973 (0x3A96BDC7) in 18421B, out 101323B, BBs exec'd 0 ====
+ 0x3A96BDC7: addl $0xC8A5, %ebx
+ 0x3A96BDCD: movl %ecx,-24(%ebp)
+ 0x3A96BDD0: movl (%eax),%edx
+ 0x3A96BDD2: movl 4(%eax),%eax
+ 0x3A96BDD5: movl %edx,-28(%ebp)
+ 0x3A96BDD8: movl %eax,-32(%ebp)
+ 0x3A96BDDB: jmp-8 0x3A96BDEF
+. 973 3A96BDC7 22
+. 81 C3 A5 C8 00 00 89 4D E8 8B 10 8B 40 04 89 55 E4 89 45 E0 EB 12
+
+==== BB 974 (0x3A96BDEF) in 18443B, out 101433B, BBs exec'd 0 ====
+ 0x3A96BDEF: movl $0x0, -52(%ebp)
+ 0x3A96BDF6: movl -28(%ebp),%eax
+ 0x3A96BDF9: movl 16(%ebp),%ecx
+ 0x3A96BDFC: movl $0x0, -56(%ebp)
+ 0x3A96BE03: movl 28(%ebp),%edx
+ 0x3A96BE06: movl (%eax,%ecx,4),%ecx
+ 0x3A96BE09: movl 28(%ebp),%eax
+ 0x3A96BE0C: movl %ecx,-36(%ebp)
+ 0x3A96BE0F: testl %eax,%eax
+ 0x3A96BE11: setnz %al
+ 0x3A96BE14: cmpl %edx,%ecx
+ 0x3A96BE16: setz %dl
+ 0x3A96BE19: andl %edx,%eax
+ 0x3A96BE1B: testb $0x1, %al
+ 0x3A96BE1D: jnz-8 0x3A96BDE0
+. 974 3A96BDEF 48
+. C7 45 CC 00 00 00 00 8B 45 E4 8B 4D 10 C7 45 C8 00 00 00 00 8B 55 1C 8B 0C 88 8B 45 1C 89 4D DC 85 C0 0F 95 C0 39 D1 0F 94 C2 21 D0 A8 01 75 C1
+
+==== BB 975 (0x3A96BE1F) in 18491B, out 101655B, BBs exec'd 0 ====
+ 0x3A96BE1F: testb $0x2, 32(%ebp)
+ 0x3A96BE23: jz-8 0x3A96BE30
+. 975 3A96BE1F 6
+. F6 45 20 02 74 0B
+
+==== BB 976 (0x3A96BE30) in 18497B, out 101722B, BBs exec'd 0 ====
+ 0x3A96BE30: testb $0x8, 0xFFFFFC14(%ebx)
+ 0x3A96BE37: jnz-32 0x3A96C038
+. 976 3A96BE30 13
+. F6 83 14 FC FF FF 08 0F 85 FB 01 00 00
+
+==== BB 977 (0x3A96BE3D) in 18510B, out 101792B, BBs exec'd 0 ====
+ 0x3A96BE3D: movl -36(%ebp),%edx
+ 0x3A96BE40: movl 48(%edx),%eax
+ 0x3A96BE43: movl 0x18C(%edx),%ecx
+ 0x3A96BE49: movl 4(%eax),%eax
+ 0x3A96BE4C: movl %eax,-40(%ebp)
+ 0x3A96BE4F: movl 44(%edx),%eax
+ 0x3A96BE52: movl 4(%eax),%eax
+ 0x3A96BE55: movl %ecx,-48(%ebp)
+ 0x3A96BE58: movl %edx,%ecx
+ 0x3A96BE5A: xorl %edx, %edx
+ 0x3A96BE5C: movl %eax,-44(%ebp)
+ 0x3A96BE5F: movl -20(%ebp),%eax
+ 0x3A96BE62: divl 0x164(%ecx)
+ 0x3A96BE68: movl 0x168(%ecx),%eax
+ 0x3A96BE6E: movl (%eax,%edx,4),%esi
+ 0x3A96BE71: testl %esi,%esi
+ 0x3A96BE73: jnz-8 0x3A96BE94
+. 977 3A96BE3D 56
+. 8B 55 DC 8B 42 30 8B 8A 8C 01 00 00 8B 40 04 89 45 D8 8B 42 2C 8B 40 04 89 4D D0 89 D1 31 D2 89 45 D4 8B 45 EC F7 B1 64 01 00 00 8B 81 68 01 00 00 8B 34 90 85 F6 75 1F
+
+==== BB 978 (0x3A96BE94) in 18566B, out 102042B, BBs exec'd 0 ====
+ 0x3A96BE94: movl -40(%ebp),%edi
+ 0x3A96BE97: movl %esi,%eax
+ 0x3A96BE99: shll $0x4, %eax
+ 0x3A96BE9C: addl %eax,%edi
+ 0x3A96BE9E: movl 4(%edi),%eax
+ 0x3A96BEA1: testl %eax,%eax
+ 0x3A96BEA3: jz-8 0x3A96BE80
+. 978 3A96BE94 17
+. 8B 7D D8 89 F0 C1 E0 04 01 C7 8B 47 04 85 C0 74 DB
+
+==== BB 979 (0x3A96BE80) in 18583B, out 102147B, BBs exec'd 0 ====
+ 0x3A96BE80: movl -36(%ebp),%edx
+ 0x3A96BE83: movl 0x16C(%edx),%eax
+ 0x3A96BE89: movl (%eax,%esi,4),%esi
+ 0x3A96BE8C: testl %esi,%esi
+ 0x3A96BE8E: jz-32 0x3A96BF70
+. 979 3A96BE80 20
+. 8B 55 DC 8B 82 6C 01 00 00 8B 34 B0 85 F6 0F 84 DC 00 00 00
+
+==== BB 980 (0x3A96BF70) in 18603B, out 102252B, BBs exec'd 0 ====
+ 0x3A96BF70: cmpl $0x1, -52(%ebp)
+ 0x3A96BF74: movl -56(%ebp),%edi
+ 0x3A96BF77: jz-8 0x3A96BF7B
+. 980 3A96BF70 9
+. 83 7D CC 01 8B 7D C8 74 02
+
+==== BB 981 (0x3A96BF79) in 18612B, out 102328B, BBs exec'd 0 ====
+ 0x3A96BF79: xorl %edi, %edi
+ 0x3A96BF7B: testl %edi,%edi
+ 0x3A96BF7D: jz-8 0x3A96BF97
+. 981 3A96BF79 6
+. 31 FF 85 FF 74 18
+
+==== BB 982 (0x3A96BF97) in 18618B, out 102398B, BBs exec'd 0 ====
+ 0x3A96BF97: movl 20(%ebp),%edx
+ 0x3A96BF9A: testl %esi,%esi
+ 0x3A96BF9C: setz %al
+ 0x3A96BF9F: testl %edx,%edx
+ 0x3A96BFA1: setnz %dl
+ 0x3A96BFA4: andl %edx,%eax
+ 0x3A96BFA6: testb $0x1, %al
+ 0x3A96BFA8: jz-32 0x3A96BDE0
+. 982 3A96BF97 23
+. 8B 55 14 85 F6 0F 94 C0 85 D2 0F 95 C2 21 D0 A8 01 0F 84 32 FE FF FF
+
+==== BB 983 (0x3A96BFAE) in 18641B, out 102540B, BBs exec'd 0 ====
+ 0x3A96BFAE: movl 20(%ebp),%edx
+ 0x3A96BFB1: movl 12(%edx),%eax
+ 0x3A96BFB4: testl %eax,%eax
+ 0x3A96BFB6: jz-32 0x3A96BDE0
+. 983 3A96BFAE 14
+. 8B 55 14 8B 42 0C 85 C0 0F 84 24 FE FF FF
+
+==== BB 984 (0x3A96BDE0) in 18655B, out 102625B, BBs exec'd 0 ====
+ 0x3A96BDE0: incl 16(%ebp)
+ 0x3A96BDE3: movl -32(%ebp),%ecx
+ 0x3A96BDE6: cmpl %ecx,16(%ebp)
+ 0x3A96BDE9: jnb-32 0x3A96BFDC
+. 984 3A96BDE0 15
+. FF 45 10 8B 4D E0 39 4D 10 0F 83 ED 01 00 00
+
+==== BB 985 (0x3A96BEA5) in 18670B, out 102714B, BBs exec'd 0 ====
+ 0x3A96BEA5: cmpw $0x0, 14(%edi)
+ 0x3A96BEAA: jnz-8 0x3A96BEB2
+. 985 3A96BEA5 7
+. 66 83 7F 0E 00 75 06
+
+==== BB 986 (0x3A96BEB2) in 18677B, out 102778B, BBs exec'd 0 ====
+ 0x3A96BEB2: movzbl 12(%edi),%eax
+ 0x3A96BEB6: andl $0xF, %eax
+ 0x3A96BEB9: cmpl $0x2, %eax
+ 0x3A96BEBC: jnle-8 0x3A96BE80
+. 986 3A96BEB2 12
+. 0F B6 47 0C 83 E0 0F 83 F8 02 7F C2
+
+==== BB 987 (0x3A96BEBE) in 18689B, out 102859B, BBs exec'd 0 ====
+ 0x3A96BEBE: cmpl -24(%ebp),%edi
+ 0x3A96BEC1: jz-8 0x3A96BEDD
+. 987 3A96BEBE 5
+. 3B 7D E8 74 1A
+
+==== BB 988 (0x3A96BEC3) in 18694B, out 102924B, BBs exec'd 0 ====
+ 0x3A96BEC3: movl (%edi),%ecx
+ 0x3A96BEC5: movl -44(%ebp),%eax
+ 0x3A96BEC8: movl -16(%ebp),%edx
+ 0x3A96BECB: addl %ecx,%eax
+ 0x3A96BECD: movl %edx,4(%esp,,)
+ 0x3A96BED1: movl %eax,(%esp,,)
+ 0x3A96BED4: call 0x3A975280
+. 988 3A96BEC3 22
+. 8B 0F 8B 45 D4 8B 55 F0 01 C8 89 54 24 04 89 04 24 E8 A7 93 00 00
+
+==== BB 989 (0x3A96BED9) in 18716B, out 103038B, BBs exec'd 0 ====
+ 0x3A96BED9: testl %eax,%eax
+ 0x3A96BEDB: jnz-8 0x3A96BE80
+. 989 3A96BED9 4
+. 85 C0 75 A3
+
+==== BB 990 (0x3A96BEDD) in 18720B, out 103097B, BBs exec'd 0 ====
+ 0x3A96BEDD: movl 20(%ebp),%edx
+ 0x3A96BEE0: testl %edx,%edx
+ 0x3A96BEE2: jz-32 0x3A96C069
+. 990 3A96BEDD 11
+. 8B 55 14 85 D2 0F 84 81 01 00 00
+
+==== BB 991 (0x3A96BEE8) in 18731B, out 103169B, BBs exec'd 0 ====
+ 0x3A96BEE8: movl -48(%ebp),%eax
+ 0x3A96BEEB: testl %eax,%eax
+ 0x3A96BEED: jz-32 0x3A96BF7F
+. 991 3A96BEE8 11
+. 8B 45 D0 85 C0 0F 84 8C 00 00 00
+
+==== BB 992 (0x3A96BEF3) in 18742B, out 103241B, BBs exec'd 0 ====
+ 0x3A96BEF3: movl -48(%ebp),%ecx
+ 0x3A96BEF6: movl -36(%ebp),%eax
+ 0x3A96BEF9: movzwl (%ecx,%esi,2),%ecx
+ 0x3A96BEFD: movl 0x17C(%eax),%edx
+ 0x3A96BF03: andl $0x7FFF, %ecx
+ 0x3A96BF09: shll $0x4, %ecx
+ 0x3A96BF0C: movl %ecx,-60(%ebp)
+ 0x3A96BF0F: movl 20(%ebp),%ecx
+ 0x3A96BF12: movl 4(%ecx),%eax
+ 0x3A96BF15: movl -60(%ebp),%ecx
+ 0x3A96BF18: cmpl %eax,4(%edx,%ecx,1)
+ 0x3A96BF1C: jz-32 0x3A96BFE8
+. 992 3A96BEF3 47
+. 8B 4D D0 8B 45 DC 0F B7 0C 71 8B 90 7C 01 00 00 81 E1 FF 7F 00 00 C1 E1 04 89 4D C4 8B 4D 14 8B 41 04 8B 4D C4 39 44 0A 04 0F 84 C6 00 00 00
+
+==== BB 993 (0x3A96BFE8) in 18789B, out 103421B, BBs exec'd 0 ====
+ 0x3A96BFE8: movl 20(%ebp),%ecx
+ 0x3A96BFEB: movl (%ecx),%eax
+ 0x3A96BFED: movl %eax,4(%esp,,)
+ 0x3A96BFF1: movl -60(%ebp),%ecx
+ 0x3A96BFF4: movl (%edx,%ecx,1),%eax
+ 0x3A96BFF7: movl %eax,(%esp,,)
+ 0x3A96BFFA: call 0x3A975280
+. 993 3A96BFE8 23
+. 8B 4D 14 8B 01 89 44 24 04 8B 4D C4 8B 04 0A 89 04 24 E8 81 92 00 00
+
+==== BB 994 (0x3A96BFFF) in 18812B, out 103533B, BBs exec'd 0 ====
+ 0x3A96BFFF: testl %eax,%eax
+ 0x3A96C001: jnz-32 0x3A96BF22
+. 994 3A96BFFF 8
+. 85 C0 0F 85 1B FF FF FF
+
+==== BB 995 (0x3A96C007) in 18820B, out 103595B, BBs exec'd 0 ====
+ 0x3A96C007: jmp 0x3A96BF7F
+. 995 3A96C007 5
+. E9 73 FF FF FF
+
+==== BB 996 (0x3A96BF7F) in 18825B, out 103623B, BBs exec'd 0 ====
+ 0x3A96BF7F: movzbl 12(%edi),%eax
+ 0x3A96BF83: shrb $0x4, %al
+ 0x3A96BF86: movzbl %al,%eax
+ 0x3A96BF89: cmpl $0x1, %eax
+ 0x3A96BF8C: jz-32 0x3A96C01E
+. 996 3A96BF7F 19
+. 0F B6 47 0C C0 E8 04 0F B6 C0 83 F8 01 0F 84 8C 00 00 00
+
+==== BB 997 (0x3A96C01E) in 18844B, out 103718B, BBs exec'd 0 ====
+ 0x3A96C01E: movl 8(%ebp),%edx
+ 0x3A96C021: movl -36(%ebp),%ecx
+ 0x3A96C024: movl %edi,(%edx)
+ 0x3A96C026: movl %ecx,4(%edx)
+ 0x3A96C029: movl $0x1,%edx
+ 0x3A96C02E: addl $0x3C, %esp
+ 0x3A96C031: movl %edx,%eax
+ 0x3A96C033: popl %ebx
+ 0x3A96C034: popl %esi
+ 0x3A96C035: popl %edi
+ 0x3A96C036: popl %ebp
+ 0x3A96C037: ret
+. 997 3A96C01E 26
+. 8B 55 08 8B 4D DC 89 3A 89 4A 04 BA 01 00 00 00 83 C4 3C 89 D0 5B 5E 5F 5D C3
+
+==== BB 998 (0x3A96C17C) in 18870B, out 103889B, BBs exec'd 0 ====
+ 0x3A96C17C: testl %eax,%eax
+ 0x3A96C17E: movl %eax,%edx
+ 0x3A96C180: jnle-8 0x3A96C195
+. 998 3A96C17C 6
+. 85 C0 89 C2 7F 13
+
+==== BB 999 (0x3A96C195) in 18876B, out 103955B, BBs exec'd 0 ====
+ 0x3A96C195: movl -68(%ebp),%esi
+ 0x3A96C198: testl %esi,%esi
+ 0x3A96C19A: jz-32 0x3A96C3DE
+. 999 3A96C195 11
+. 8B 75 BC 85 F6 0F 84 3E 02 00 00
+
+==== BB 1000 (0x3A96C1A0) in 18887B, out 104027B, BBs exec'd 0 ====
+ 0x3A96C1A0: movl $0x0, -112(%ebp)
+ 0x3A96C1A7: movl -96(%ebp),%ecx
+ 0x3A96C1AA: movl (%ecx),%edx
+ 0x3A96C1AC: testl %edx,%edx
+ 0x3A96C1AE: jz-8 0x3A96C1BC
+. 1000 3A96C1A0 16
+. C7 45 90 00 00 00 00 8B 4D A0 8B 11 85 D2 74 0C
+
+==== BB 1001 (0x3A96C1B0) in 18903B, out 104124B, BBs exec'd 0 ====
+ 0x3A96C1B0: movzbl 13(%edx),%eax
+ 0x3A96C1B4: andl $0x3, %eax
+ 0x3A96C1B7: cmpl $0x3, %eax
+ 0x3A96C1BA: jz-8 0x3A96C204
+. 1001 3A96C1B0 12
+. 0F B6 42 0D 83 E0 03 83 F8 03 74 48
+
+==== BB 1002 (0x3A96C1BC) in 18915B, out 104205B, BBs exec'd 0 ====
+ 0x3A96C1BC: leal -68(%ebp), %edx
+ 0x3A96C1BF: movl %edx,-124(%ebp)
+ 0x3A96C1C2: movl -124(%ebp),%ecx
+ 0x3A96C1C5: movl 4(%ecx),%esi
+ 0x3A96C1C8: movzbl 0x174(%esi),%eax
+ 0x3A96C1CF: andb $0x3, %al
+ 0x3A96C1D1: cmpb $0x2, %al
+ 0x3A96C1D3: jz-32 0x3A96C607
+. 1002 3A96C1BC 29
+. 8D 55 BC 89 55 84 8B 4D 84 8B 71 04 0F B6 86 74 01 00 00 24 03 3C 02 0F 84 2E 04 00 00
+
+==== BB 1003 (0x3A96C1D9) in 18944B, out 104346B, BBs exec'd 0 ====
+ 0x3A96C1D9: movl 0xFFFFFC14(%ebx),%eax
+ 0x3A96C1DF: testl $0x204, %eax
+ 0x3A96C1E4: jnz-32 0x3A96C412
+. 1003 3A96C1D9 17
+. 8B 83 14 FC FF FF A9 04 02 00 00 0F 85 28 02 00 00
+
+==== BB 1004 (0x3A96C1EA) in 18961B, out 104423B, BBs exec'd 0 ====
+ 0x3A96C1EA: movl -68(%ebp),%eax
+ 0x3A96C1ED: movl -96(%ebp),%ecx
+ 0x3A96C1F0: movl -124(%ebp),%edx
+ 0x3A96C1F3: movl %eax,(%ecx)
+ 0x3A96C1F5: movl 4(%edx),%eax
+ 0x3A96C1F8: movl (%eax),%eax
+ 0x3A96C1FA: leal -12(%ebp), %esp
+ 0x3A96C1FD: popl %ebx
+ 0x3A96C1FE: popl %esi
+ 0x3A96C1FF: popl %edi
+ 0x3A96C200: popl %ebp
+ 0x3A96C201: ret 20
+. 1004 3A96C1EA 26
+. 8B 45 BC 8B 4D A0 8B 55 84 89 01 8B 42 04 8B 00 8D 65 F4 5B 5E 5F 5D C2 14 00
+
+==== BB 1005 (0x3A96E1DE) in 18987B, out 104591B, BBs exec'd 0 ====
+ 0x3A96E1DE: movl %eax,0xFFFFFF64(%ebp)
+ 0x3A96E1E4: movl -88(%ebp),%edx
+ 0x3A96E1E7: subl $0x14, %esp
+ 0x3A96E1EA: movl 8(%ebp),%esi
+ 0x3A96E1ED: movl %edx,%edi
+ 0x3A96E1EF: movl %edx,0x208(%esi)
+ 0x3A96E1F5: movl %eax,0x204(%esi)
+ 0x3A96E1FB: testl %edi,%edi
+ 0x3A96E1FD: jz-8 0x3A96E208
+. 1005 3A96E1DE 33
+. 89 85 64 FF FF FF 8B 55 A8 83 EC 14 8B 75 08 89 D7 89 96 08 02 00 00 89 86 04 02 00 00 85 FF 74 09
+
+==== BB 1006 (0x3A96E1FF) in 19020B, out 104741B, BBs exec'd 0 ====
+ 0x3A96E1FF: movl 4(%edi),%edx
+ 0x3A96E202: addl %edx,0xFFFFFF64(%ebp)
+ 0x3A96E208: cmpl $0x7, 0xFFFFFF6C(%ebp)
+ 0x3A96E20F: jnbe-32 0x3A96EA6B
+. 1006 3A96E1FF 22
+. 8B 57 04 01 95 64 FF FF FF 83 BD 6C FF FF FF 07 0F 87 56 08 00 00
+
+==== BB 1007 (0x3A96E215) in 19042B, out 104844B, BBs exec'd 0 ====
+ 0x3A96E215: movl 0xFFFFFF6C(%ebp),%ecx
+ 0x3A96E21B: movl -10320(%ebx,%ecx,4),%eax
+ 0x3A96E222: addl %ebx,%eax
+ 0x3A96E224: jmp*l %eax
+. 1007 3A96E215 17
+. 8B 8D 6C FF FF FF 8B 84 8B B0 D7 FF FF 01 D8 FF E0
+
+==== BB 1008 (0x3A96EADD) in 19059B, out 104911B, BBs exec'd 0 ====
+ 0x3A96EADD: movl 0xFFFFFF70(%ebp),%edx
+ 0x3A96EAE3: movl 0xFFFFFF64(%ebp),%ecx
+ 0x3A96EAE9: addl %ecx,(%edx)
+ 0x3A96EAEB: jmp 0x3A96E320
+. 1008 3A96EADD 19
+. 8B 95 70 FF FF FF 8B 8D 64 FF FF FF 01 0A E9 30 F8 FF FF
+
+==== BB 1009 (0x3A96E320) in 19078B, out 104990B, BBs exec'd 0 ====
+ 0x3A96E320: addl $0x8, -120(%ebp)
+ 0x3A96E324: movl -124(%ebp),%edi
+ 0x3A96E327: cmpl %edi,-120(%ebp)
+ 0x3A96E32A: jb-32 0x3A96E0E0
+. 1009 3A96E320 16
+. 83 45 88 08 8B 7D 84 39 7D 88 0F 82 B0 FD FF FF
+
+==== BB 1010 (0x3A96E0E0) in 19094B, out 105081B, BBs exec'd 0 ====
+ 0x3A96E0E0: movl -120(%ebp),%edx
+ 0x3A96E0E3: movl 0xFFFFFF74(%ebp),%edi
+ 0x3A96E0E9: movl 4(%edx),%edx
+ 0x3A96E0EC: movl %edx,0xFFFFFF0C(%ebp)
+ 0x3A96E0F2: movl %edx,%eax
+ 0x3A96E0F4: shrl $0x8, %eax
+ 0x3A96E0F7: movzwl (%edi,%eax,2),%ecx
+ 0x3A96E0FB: movl 0xFFFFFF7C(%ebp),%edi
+ 0x3A96E101: shll $0x4, %eax
+ 0x3A96E104: addl %eax,%edi
+ 0x3A96E106: movl -116(%ebp),%eax
+ 0x3A96E109: andl $0x7FFF, %ecx
+ 0x3A96E10F: movl %edi,-88(%ebp)
+ 0x3A96E112: shll $0x4, %ecx
+ 0x3A96E115: movl 0x17C(%eax),%edx
+ 0x3A96E11B: movl -128(%ebp),%eax
+ 0x3A96E11E: addl %edx,%ecx
+ 0x3A96E120: movl -120(%ebp),%edx
+ 0x3A96E123: addl (%edx),%eax
+ 0x3A96E125: movzbl 0xFFFFFF0C(%ebp),%edx
+ 0x3A96E12C: movl %eax,0xFFFFFF70(%ebp)
+ 0x3A96E132: cmpl $0x8, %edx
+ 0x3A96E135: movl %edx,0xFFFFFF6C(%ebp)
+ 0x3A96E13B: jz-32 0x3A96ECE5
+. 1010 3A96E0E0 97
+. 8B 55 88 8B BD 74 FF FF FF 8B 52 04 89 95 0C FF FF FF 89 D0 C1 E8 08 0F B7 0C 47 8B BD 7C FF FF FF C1 E0 04 01 C7 8B 45 8C 81 E1 FF 7F 00 00 89 7D A8 C1 E1 04 8B 90 7C 01 00 00 8B 45 80 01 D1 8B 55 88 03 02 0F B6 95 0C FF FF FF 89 85 70 FF FF FF 83 FA 08 89 95 6C FF FF FF 0F 84 A4 0B 00 00
+
+==== BB 1011 (0x3A96ED40) in 19191B, out 105375B, BBs exec'd 0 ====
+ 0x3A96ED40: xorl %eax, %eax
+ 0x3A96ED42: cmpl $0x7, 0xFFFFFF6C(%ebp)
+ 0x3A96ED49: movl 0x200(%esi),%edx
+ 0x3A96ED4F: setz %al
+ 0x3A96ED52: cmpl $0x5, 0xFFFFFF6C(%ebp)
+ 0x3A96ED59: jz-32 0x3A96EEBE
+. 1011 3A96ED40 31
+. 31 C0 83 BD 6C FF FF FF 07 8B 96 00 02 00 00 0F 94 C0 83 BD 6C FF FF FF 05 0F 84 5F 01 00 00
+
+==== BB 1012 (0x3A96ED5F) in 19222B, out 105500B, BBs exec'd 0 ====
+ 0x3A96ED5F: cmpl %edx,%eax
+ 0x3A96ED61: jnz-32 0x3A96E170
+. 1012 3A96ED5F 8
+. 39 D0 0F 85 09 F4 FF FF
+
+==== BB 1013 (0x3A96ED67) in 19230B, out 105557B, BBs exec'd 0 ====
+ 0x3A96ED67: incl 0xFFFFF9D8(%ebx)
+ 0x3A96ED6D: movl 0x208(%esi),%edi
+ 0x3A96ED73: movl 0x204(%esi),%eax
+ 0x3A96ED79: movl %edi,-88(%ebp)
+ 0x3A96ED7C: jmp 0x3A96E742
+. 1013 3A96ED67 26
+. FF 83 D8 F9 FF FF 8B BE 08 02 00 00 8B 86 04 02 00 00 89 7D A8 E9 C1 F9 FF FF
+
+==== BB 1014 (0x3A96E742) in 19256B, out 105661B, BBs exec'd 0 ====
+ 0x3A96E742: movl %eax,0xFFFFFF64(%ebp)
+ 0x3A96E748: jmp 0x3A96E1FB
+. 1014 3A96E742 11
+. 89 85 64 FF FF FF E9 AE FA FF FF
+
+==== BB 1015 (0x3A96E1FB) in 19267B, out 105708B, BBs exec'd 0 ====
+ 0x3A96E1FB: testl %edi,%edi
+ 0x3A96E1FD: jz-8 0x3A96E208
+. 1015 3A96E1FB 4
+. 85 FF 74 09
+
+==== BB 1016 (0x3A96E308) in 19271B, out 105767B, BBs exec'd 0 ====
+ 0x3A96E308: movl 0xFFFFFF64(%ebp),%eax
+ 0x3A96E30E: movl 0xFFFFFF70(%ebp),%edi
+ 0x3A96E314: movl %eax,(%edi)
+ 0x3A96E316: leal 0(%esi), %esi
+ 0x3A96E319: leal 0(%edi,,), %edi
+ 0x3A96E320: addl $0x8, -120(%ebp)
+ 0x3A96E324: movl -124(%ebp),%edi
+ 0x3A96E327: cmpl %edi,-120(%ebp)
+ 0x3A96E32A: jb-32 0x3A96E0E0
+. 1016 3A96E308 40
+. 8B 85 64 FF FF FF 8B BD 70 FF FF FF 89 07 8D 76 00 8D BC 27 00 00 00 00 83 45 88 08 8B 7D 84 39 7D 88 0F 82 B0 FD FF FF
+
+==== BB 1017 (0x3A96BF92) in 19311B, out 105914B, BBs exec'd 0 ====
+ 0x3A96BF92: cmpl $0x2, %eax
+ 0x3A96BF95: jz-8 0x3A96C010
+. 1017 3A96BF92 5
+. 83 F8 02 74 79
+
+==== BB 1018 (0x3A96C010) in 19316B, out 105971B, BBs exec'd 0 ====
+ 0x3A96C010: movl 0xFFFFFC48(%ebx),%eax
+ 0x3A96C016: testl %eax,%eax
+ 0x3A96C018: jnz-32 0x3A96C0C0
+. 1018 3A96C010 14
+. 8B 83 48 FC FF FF 85 C0 0F 85 A2 00 00 00
+
+==== BB 1019 (0x3A96BE75) in 19330B, out 106046B, BBs exec'd 0 ====
+ 0x3A96BE75: jmp 0x3A96BF79
+. 1019 3A96BE75 5
+. E9 FF 00 00 00
+
+==== BB 1020 (0x3A96BFBC) in 19335B, out 106074B, BBs exec'd 0 ====
+ 0x3A96BFBC: movl -36(%ebp),%edx
+ 0x3A96BFBF: call 0x3A970B80
+. 1020 3A96BFBC 8
+. 8B 55 DC E8 BC 4B 00 00
+
+==== BB 1021 (0x3A96BFC4) in 19343B, out 106135B, BBs exec'd 0 ====
+ 0x3A96BFC4: testl %eax,%eax
+ 0x3A96BFC6: movl $0xFFFFFFFF,%edx
+ 0x3A96BFCB: jnz-8 0x3A96C02E
+. 1021 3A96BFC4 9
+. 85 C0 BA FF FF FF FF 75 61
+
+==== BB 1022 (0x3A96BFCD) in 19352B, out 106206B, BBs exec'd 0 ====
+ 0x3A96BFCD: incl 16(%ebp)
+ 0x3A96BFD0: movl -32(%ebp),%ecx
+ 0x3A96BFD3: cmpl %ecx,16(%ebp)
+ 0x3A96BFD6: jb-32 0x3A96BDEF
+. 1022 3A96BFCD 15
+. FF 45 10 8B 4D E0 39 4D 10 0F 82 13 FE FF FF
+
+==== BB 1023 (0x3A96E1B1) in 19367B, out 106295B, BBs exec'd 0 ====
+ 0x3A96E1B1: movl -88(%ebp),%eax
+ 0x3A96E1B4: movl -16(%ebp),%ecx
+ 0x3A96E1B7: movl (%eax),%eax
+ 0x3A96E1B9: movl %esi,12(%esp,,)
+ 0x3A96E1BD: movl %edi,4(%esp,,)
+ 0x3A96E1C1: addl %ecx,%eax
+ 0x3A96E1C3: xorl %ecx, %ecx
+ 0x3A96E1C5: movl %ecx,16(%esp,,)
+ 0x3A96E1C9: leal -88(%ebp), %ecx
+ 0x3A96E1CC: movl %edx,8(%esp,,)
+ 0x3A96E1D0: movl 12(%ebp),%edx
+ 0x3A96E1D3: movl %edx,(%esp,,)
+ 0x3A96E1D6: movl 8(%ebp),%edx
+ 0x3A96E1D9: call 0x3A96C0E0
+. 1023 3A96E1B1 45
+. 8B 45 A8 8B 4D F0 8B 00 89 74 24 0C 89 7C 24 04 01 C8 31 C9 89 4C 24 10 8D 4D A8 89 54 24 08 8B 55 0C 89 14 24 8B 55 08 E8 02 DF FF FF
+
+==== BB 1024 (0x3A96BFDC) in 19412B, out 106483B, BBs exec'd 0 ====
+ 0x3A96BFDC: xorl %edx, %edx
+ 0x3A96BFDE: addl $0x3C, %esp
+ 0x3A96BFE1: movl %edx,%eax
+ 0x3A96BFE3: popl %ebx
+ 0x3A96BFE4: popl %esi
+ 0x3A96BFE5: popl %edi
+ 0x3A96BFE6: popl %ebp
+ 0x3A96BFE7: ret
+. 1024 3A96BFDC 12
+. 31 D2 83 C4 3C 89 D0 5B 5E 5F 5D C3
+
+==== BB 1025 (0x3A96C182) in 19424B, out 106610B, BBs exec'd 0 ====
+ 0x3A96C182: testl %eax,%eax
+ 0x3A96C184: js-32 0x3A96C2D0
+. 1025 3A96C182 8
+. 85 C0 0F 88 46 01 00 00
+
+==== BB 1026 (0x3A96C18A) in 19432B, out 106669B, BBs exec'd 0 ====
+ 0x3A96C18A: addl $0x4, %esi
+ 0x3A96C18D: xorl %eax, %eax
+ 0x3A96C18F: movl (%esi),%edx
+ 0x3A96C191: testl %edx,%edx
+ 0x3A96C193: jnz-8 0x3A96C140
+. 1026 3A96C18A 11
+. 83 C6 04 31 C0 8B 16 85 D2 75 AB
+
+==== BB 1027 (0x3A96C3DE) in 19443B, out 106762B, BBs exec'd 0 ====
+ 0x3A96C3DE: movl -96(%ebp),%edx
+ 0x3A96C3E1: movl (%edx),%eax
+ 0x3A96C3E3: testl %eax,%eax
+ 0x3A96C3E5: jz-8 0x3A96C3F2
+. 1027 3A96C3DE 9
+. 8B 55 A0 8B 02 85 C0 74 0B
+
+==== BB 1028 (0x3A96C3E7) in 19452B, out 106844B, BBs exec'd 0 ====
+ 0x3A96C3E7: movzbl 12(%eax),%eax
+ 0x3A96C3EB: shrb $0x4, %al
+ 0x3A96C3EE: cmpb $0x2, %al
+ 0x3A96C3F0: jz-8 0x3A96C3FD
+. 1028 3A96C3E7 11
+. 0F B6 40 0C C0 E8 04 3C 02 74 0B
+
+==== BB 1029 (0x3A96C3FD) in 19463B, out 106932B, BBs exec'd 0 ====
+ 0x3A96C3FD: movl -96(%ebp),%edx
+ 0x3A96C400: movl $0x0, (%edx)
+ 0x3A96C406: xorl %eax, %eax
+ 0x3A96C408: leal -12(%ebp), %esp
+ 0x3A96C40B: popl %ebx
+ 0x3A96C40C: popl %esi
+ 0x3A96C40D: popl %edi
+ 0x3A96C40E: popl %ebp
+ 0x3A96C40F: ret 20
+. 1029 3A96C3FD 21
+. 8B 55 A0 C7 02 00 00 00 00 31 C0 8D 65 F4 5B 5E 5F 5D C2 14 00
+
+==== BB 1030 (0x3A96E208) in 19484B, out 107080B, BBs exec'd 0 ====
+ 0x3A96E208: cmpl $0x7, 0xFFFFFF6C(%ebp)
+ 0x3A96E20F: jnbe-32 0x3A96EA6B
+. 1030 3A96E208 13
+. 83 BD 6C FF FF FF 07 0F 87 56 08 00 00
+
+==== BB 1031 (0x3A96BD70) in 19497B, out 107146B, BBs exec'd 0 ====
+ 0x3A96BD70: popl %ebp
+ 0x3A96BD71: movl %edx,%eax
+ 0x3A96BD73: ret
+. 1031 3A96BD70 4
+. 5D 89 D0 C3
+
+==== BB 1032 (0x3A96C069) in 19501B, out 107202B, BBs exec'd 0 ====
+ 0x3A96C069: movl -48(%ebp),%eax
+ 0x3A96C06C: testl %eax,%eax
+ 0x3A96C06E: jz-32 0x3A96BF7F
+. 1032 3A96C069 11
+. 8B 45 D0 85 C0 0F 84 0B FF FF FF
+
+==== BB 1033 (0x3A96C074) in 19512B, out 107274B, BBs exec'd 0 ====
+ 0x3A96C074: testb $0x2, 24(%ebp)
+ 0x3A96C078: jz-8 0x3A96C0AD
+. 1033 3A96C074 6
+. F6 45 18 02 74 33
+
+==== BB 1034 (0x3A96C0AD) in 19518B, out 107341B, BBs exec'd 0 ====
+ 0x3A96C0AD: movl -48(%ebp),%eax
+ 0x3A96C0B0: movzwl (%eax,%esi,2),%edx
+ 0x3A96C0B4: movl %edx,%eax
+ 0x3A96C0B6: andl $0x7FFF, %eax
+ 0x3A96C0BB: cmpl $0x2, %eax
+ 0x3A96C0BE: jmp-8 0x3A96C089
+. 1034 3A96C0AD 19
+. 8B 45 D0 0F B7 14 70 89 D0 25 FF 7F 00 00 83 F8 02 EB C9
+
+==== BB 1035 (0x3A96C089) in 19537B, out 107428B, BBs exec'd 0 ====
+ 0x3A96C089: jle-32 0x3A96BF7F
+. 1035 3A96C089 6
+. 0F 8E F0 FE FF FF
+
+==== BB 1036 (0x3A96E330) in 19543B, out 107487B, BBs exec'd 0 ====
+ 0x3A96E330: incl -112(%ebp)
+ 0x3A96E333: cmpl $0x1, -112(%ebp)
+ 0x3A96E337: jle-32 0x3A96DFBA
+. 1036 3A96E330 13
+. FF 45 90 83 7D 90 01 0F 8E 7D FC FF FF
+
+==== BB 1037 (0x3A96DFBA) in 19556B, out 107564B, BBs exec'd 0 ====
+ 0x3A96DFBA: movl %esi,-116(%ebp)
+ 0x3A96DFBD: movl -112(%ebp),%ecx
+ 0x3A96DFC0: leal (%ecx,%ecx,2), %eax
+ 0x3A96DFC3: leal -12(%ebp,%eax,4), %eax
+ 0x3A96DFC7: leal -40(%eax), %edx
+ 0x3A96DFCA: movl -40(%eax),%ecx
+ 0x3A96DFCD: movl 4(%edx),%edi
+ 0x3A96DFD0: movl %ecx,%eax
+ 0x3A96DFD2: addl %edi,%eax
+ 0x3A96DFD4: movl %eax,-124(%ebp)
+ 0x3A96DFD7: movl (%esi),%eax
+ 0x3A96DFD9: movl %ecx,-120(%ebp)
+ 0x3A96DFDC: movl %eax,-128(%ebp)
+ 0x3A96DFDF: movl 8(%edx),%eax
+ 0x3A96DFE2: testl %eax,%eax
+ 0x3A96DFE4: jz-8 0x3A96E035
+. 1037 3A96DFBA 44
+. 89 75 8C 8B 4D 90 8D 04 49 8D 44 85 F4 8D 50 D8 8B 48 D8 8B 7A 04 89 C8 01 F8 89 45 84 8B 06 89 4D 88 89 45 80 8B 42 08 85 C0 74 4F
+
+==== BB 1038 (0x3A96DFE6) in 19600B, out 107767B, BBs exec'd 0 ====
+ 0x3A96DFE6: movl -124(%ebp),%edx
+ 0x3A96DFE9: cmpl %edx,%ecx
+ 0x3A96DFEB: jb-8 0x3A96E015
+. 1038 3A96DFE6 7
+. 8B 55 84 39 D1 72 28
+
+==== BB 1039 (0x3A96E015) in 19607B, out 107839B, BBs exec'd 0 ====
+ 0x3A96E015: movl -120(%ebp),%edi
+ 0x3A96E018: movl -128(%ebp),%ecx
+ 0x3A96E01B: movl (%edi),%eax
+ 0x3A96E01D: movzbl 4(%edi),%edx
+ 0x3A96E021: addl %eax,%ecx
+ 0x3A96E023: cmpl $0x7, %edx
+ 0x3A96E026: jz-8 0x3A96DFF2
+. 1039 3A96E015 19
+. 8B 7D 88 8B 4D 80 8B 07 0F B6 57 04 01 C1 83 FA 07 74 CA
+
+==== BB 1040 (0x3A96DFF2) in 19626B, out 107951B, BBs exec'd 0 ====
+ 0x3A96DFF2: movl 0x1F4(%esi),%edx
+ 0x3A96DFF8: testl %edx,%edx
+ 0x3A96DFFA: jnz-32 0x3A96E8CE
+. 1040 3A96DFF2 14
+. 8B 96 F4 01 00 00 85 D2 0F 85 CE 08 00 00
+
+==== BB 1041 (0x3A96E000) in 19640B, out 108026B, BBs exec'd 0 ====
+ 0x3A96E000: movl -128(%ebp),%eax
+ 0x3A96E003: addl %eax,(%ecx)
+ 0x3A96E005: addl $0x8, -120(%ebp)
+ 0x3A96E009: movl -124(%ebp),%edx
+ 0x3A96E00C: cmpl %edx,-120(%ebp)
+ 0x3A96E00F: jnb-32 0x3A96E330
+. 1041 3A96E000 21
+. 8B 45 80 01 01 83 45 88 08 8B 55 84 39 55 88 0F 83 1B 03 00 00
+
+==== BB 1042 (0x3A96E33D) in 19661B, out 108145B, BBs exec'd 0 ====
+ 0x3A96E33D: movl $0x0, -76(%ebp)
+ 0x3A96E344: movl 52(%esi),%eax
+ 0x3A96E347: movl $0x0, -68(%ebp)
+ 0x3A96E34E: movl $0x0, -80(%ebp)
+ 0x3A96E355: testl %eax,%eax
+ 0x3A96E357: movl $0x0, -84(%ebp)
+ 0x3A96E35E: jz-8 0x3A96E36F
+. 1042 3A96E33D 35
+. C7 45 B4 00 00 00 00 8B 46 34 C7 45 BC 00 00 00 00 C7 45 B0 00 00 00 00 85 C0 C7 45 AC 00 00 00 00 74 0F
+
+==== BB 1043 (0x3A96E36F) in 19696B, out 108280B, BBs exec'd 0 ====
+ 0x3A96E36F: movl 104(%esi),%eax
+ 0x3A96E372: testl %eax,%eax
+ 0x3A96E374: jz-8 0x3A96E380
+. 1043 3A96E36F 7
+. 8B 46 68 85 C0 74 0A
+
+==== BB 1044 (0x3A96E376) in 19703B, out 108352B, BBs exec'd 0 ====
+ 0x3A96E376: cmpl $0x7, 4(%eax)
+ 0x3A96E37A: jz-32 0x3A96E5F1
+. 1044 3A96E376 10
+. 83 78 04 07 0F 84 71 02 00 00
+
+==== BB 1045 (0x3A96E380) in 19713B, out 108415B, BBs exec'd 0 ====
+ 0x3A96E380: xorl %eax, %eax
+ 0x3A96E382: leal 0xFFFFF9E4(%ebx), %edi
+ 0x3A96E388: movl %eax,0xFFFFFF54(%ebp)
+ 0x3A96E38E: movl %edi,0xFFFFFF14(%ebp)
+ 0x3A96E394: movl %esi,0xFFFFFF50(%ebp)
+ 0x3A96E39A: movl 0xFFFFFF54(%ebp),%edx
+ 0x3A96E3A0: xorl %edi, %edi
+ 0x3A96E3A2: movl (%esi),%ecx
+ 0x3A96E3A4: leal (%edx,%edx,2), %eax
+ 0x3A96E3A7: leal -12(%ebp,%eax,4), %eax
+ 0x3A96E3AB: movl %ecx,0xFFFFFF40(%ebp)
+ 0x3A96E3B1: movl -72(%eax),%edx
+ 0x3A96E3B4: movl -68(%eax),%eax
+ 0x3A96E3B7: movl %eax,0xFFFFFF4C(%ebp)
+ 0x3A96E3BD: addl %edx,%eax
+ 0x3A96E3BF: movl %eax,0xFFFFFF44(%ebp)
+ 0x3A96E3C5: movl 48(%esi),%eax
+ 0x3A96E3C8: movl 4(%eax),%eax
+ 0x3A96E3CB: movl %eax,0xFFFFFF3C(%ebp)
+ 0x3A96E3D1: movl 0xB8(%esi),%eax
+ 0x3A96E3D7: testl %eax,%eax
+ 0x3A96E3D9: jz-8 0x3A96E3DE
+. 1045 3A96E380 91
+. 31 C0 8D BB E4 F9 FF FF 89 85 54 FF FF FF 89 BD 14 FF FF FF 89 B5 50 FF FF FF 8B 95 54 FF FF FF 31 FF 8B 0E 8D 04 52 8D 44 85 F4 89 8D 40 FF FF FF 8B 50 B8 8B 40 BC 89 85 4C FF FF FF 01 D0 89 85 44 FF FF FF 8B 46 30 8B 40 04 89 85 3C FF FF FF 8B 86 B8 00 00 00 85 C0 74 03
+
+==== BB 1046 (0x3A96E3DE) in 19804B, out 108716B, BBs exec'd 0 ====
+ 0x3A96E3DE: movl 0xFFFFFF4C(%ebp),%eax
+ 0x3A96E3E4: movl %edx,%ecx
+ 0x3A96E3E6: movl $0xAAAAAAAB,%edx
+ 0x3A96E3EB: mull %edx
+ 0x3A96E3ED: shrl $0x3, %edx
+ 0x3A96E3F0: cmpl %edi,%edx
+ 0x3A96E3F2: jbe-8 0x3A96E3F6
+. 1046 3A96E3DE 22
+. 8B 85 4C FF FF FF 89 D1 BA AB AA AA AA F7 E2 C1 EA 03 39 FA 76 02
+
+==== BB 1047 (0x3A96E3F6) in 19826B, out 108844B, BBs exec'd 0 ====
+ 0x3A96E3F6: cmpl 0xFFFFFF14(%ebp),%esi
+ 0x3A96E3FC: leal (%edx,%edx,2), %eax
+ 0x3A96E3FF: leal (%ecx,%eax,4), %eax
+ 0x3A96E402: movl %eax,0xFFFFFF48(%ebp)
+ 0x3A96E408: jz-8 0x3A96E452
+. 1047 3A96E3F6 20
+. 3B B5 14 FF FF FF 8D 04 52 8D 04 81 89 85 48 FF FF FF 74 48
+
+==== BB 1048 (0x3A96E40A) in 19846B, out 108956B, BBs exec'd 0 ====
+ 0x3A96E40A: movl 0xFFFFFF40(%ebp),%eax
+ 0x3A96E410: testl %eax,%eax
+ 0x3A96E412: jnz-8 0x3A96E41E
+. 1048 3A96E40A 10
+. 8B 85 40 FF FF FF 85 C0 75 0A
+
+==== BB 1049 (0x3A96E41E) in 19856B, out 109031B, BBs exec'd 0 ====
+ 0x3A96E41E: cmpl 0xFFFFFF48(%ebp),%ecx
+ 0x3A96E424: jnb-8 0x3A96E452
+. 1049 3A96E41E 8
+. 3B 8D 48 FF FF FF 73 2C
+
+==== BB 1050 (0x3A96E452) in 19864B, out 109099B, BBs exec'd 0 ====
+ 0x3A96E452: movl 0xDC(%esi),%eax
+ 0x3A96E458: testl %eax,%eax
+ 0x3A96E45A: jz-32 0x3A96E750
+. 1050 3A96E452 14
+. 8B 86 DC 00 00 00 85 C0 0F 84 F0 02 00 00
+
+==== BB 1051 (0x3A96E460) in 19878B, out 109174B, BBs exec'd 0 ====
+ 0x3A96E460: movl 0xFFFFFF44(%ebp),%edx
+ 0x3A96E466: movl 4(%eax),%eax
+ 0x3A96E469: cmpl %edx,0xFFFFFF48(%ebp)
+ 0x3A96E46F: movl %eax,0xFFFFFF38(%ebp)
+ 0x3A96E475: jnb-32 0x3A96E2B0
+. 1051 3A96E460 27
+. 8B 95 44 FF FF FF 8B 40 04 39 95 48 FF FF FF 89 85 38 FF FF FF 0F 83 35 FE FF FF
+
+==== BB 1052 (0x3A96E2B0) in 19905B, out 109284B, BBs exec'd 0 ====
+ 0x3A96E2B0: incl 0xFFFFFF54(%ebp)
+ 0x3A96E2B6: cmpl $0x1, 0xFFFFFF54(%ebp)
+ 0x3A96E2BD: jle-32 0x3A96E394
+. 1052 3A96E2B0 19
+. FF 85 54 FF FF FF 83 BD 54 FF FF FF 01 0F 8E D1 00 00 00
+
+==== BB 1053 (0x3A96E394) in 19924B, out 109367B, BBs exec'd 0 ====
+ 0x3A96E394: movl %esi,0xFFFFFF50(%ebp)
+ 0x3A96E39A: movl 0xFFFFFF54(%ebp),%edx
+ 0x3A96E3A0: xorl %edi, %edi
+ 0x3A96E3A2: movl (%esi),%ecx
+ 0x3A96E3A4: leal (%edx,%edx,2), %eax
+ 0x3A96E3A7: leal -12(%ebp,%eax,4), %eax
+ 0x3A96E3AB: movl %ecx,0xFFFFFF40(%ebp)
+ 0x3A96E3B1: movl -72(%eax),%edx
+ 0x3A96E3B4: movl -68(%eax),%eax
+ 0x3A96E3B7: movl %eax,0xFFFFFF4C(%ebp)
+ 0x3A96E3BD: addl %edx,%eax
+ 0x3A96E3BF: movl %eax,0xFFFFFF44(%ebp)
+ 0x3A96E3C5: movl 48(%esi),%eax
+ 0x3A96E3C8: movl 4(%eax),%eax
+ 0x3A96E3CB: movl %eax,0xFFFFFF3C(%ebp)
+ 0x3A96E3D1: movl 0xB8(%esi),%eax
+ 0x3A96E3D7: testl %eax,%eax
+ 0x3A96E3D9: jz-8 0x3A96E3DE
+. 1053 3A96E394 71
+. 89 B5 50 FF FF FF 8B 95 54 FF FF FF 31 FF 8B 0E 8D 04 52 8D 44 85 F4 89 8D 40 FF FF FF 8B 50 B8 8B 40 BC 89 85 4C FF FF FF 01 D0 89 85 44 FF FF FF 8B 46 30 8B 40 04 89 85 3C FF FF FF 8B 86 B8 00 00 00 85 C0 74 03
+
+==== BB 1054 (0x3A96E2C3) in 19995B, out 109618B, BBs exec'd 0 ====
+ 0x3A96E2C3: movl 20(%ebp),%eax
+ 0x3A96E2C6: testl %eax,%eax
+ 0x3A96E2C8: jnz-32 0x3A96EDB7
+. 1054 3A96E2C3 11
+. 8B 45 14 85 C0 0F 85 E9 0A 00 00
+
+==== BB 1055 (0x3A96E2CE) in 20006B, out 109690B, BBs exec'd 0 ====
+ 0x3A96E2CE: orb $0x4, 0x174(%esi)
+ 0x3A96E2D5: movl -104(%ebp),%ecx
+ 0x3A96E2D8: testl %ecx,%ecx
+ 0x3A96E2DA: jnz-32 0x3A96ED81
+. 1055 3A96E2CE 18
+. 80 8E 74 01 00 00 04 8B 4D 98 85 C9 0F 85 A1 0A 00 00
+
+==== BB 1056 (0x3A96E2E0) in 20024B, out 109787B, BBs exec'd 0 ====
+ 0x3A96E2E0: movl 8(%ebp),%eax
+ 0x3A96E2E3: movl 0x210(%eax),%edx
+ 0x3A96E2E9: testl %edx,%edx
+ 0x3A96E2EB: jz-8 0x3A96E300
+. 1056 3A96E2E0 13
+. 8B 45 08 8B 90 10 02 00 00 85 D2 74 13
+
+==== BB 1057 (0x3A96E300) in 20037B, out 109875B, BBs exec'd 0 ====
+ 0x3A96E300: leal -12(%ebp), %esp
+ 0x3A96E303: popl %ebx
+ 0x3A96E304: popl %esi
+ 0x3A96E305: popl %edi
+ 0x3A96E306: popl %ebp
+ 0x3A96E307: ret
+. 1057 3A96E300 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+==== BB 1058 (0x3A96E05C) in 20045B, out 109977B, BBs exec'd 0 ====
+ 0x3A96E05C: movl %edi,%eax
+ 0x3A96E05E: movl %ecx,%edx
+ 0x3A96E060: shrl $0x3, %eax
+ 0x3A96E063: cmpl 0xFFFFFF78(%ebp),%eax
+ 0x3A96E069: jbe-8 0x3A96E071
+. 1058 3A96E05C 15
+. 89 F8 89 CA C1 E8 03 3B 85 78 FF FF FF 76 06
+
+==== BB 1059 (0x3A96E0B0) in 20060B, out 110069B, BBs exec'd 0 ====
+ 0x3A96E0B0: movl 0xDC(%esi),%eax
+ 0x3A96E0B6: testl %eax,%eax
+ 0x3A96E0B8: jz-32 0x3A96E631
+. 1059 3A96E0B0 14
+. 8B 86 DC 00 00 00 85 C0 0F 84 73 05 00 00
+
+==== BB 1060 (0x3A96E414) in 20074B, out 110144B, BBs exec'd 0 ====
+ 0x3A96E414: movl 0x114(%esi),%eax
+ 0x3A96E41A: testl %eax,%eax
+ 0x3A96E41C: jnz-8 0x3A96E452
+. 1060 3A96E414 10
+. 8B 86 14 01 00 00 85 C0 75 34
+
+==== BB 1061 (0x3A968122) in 20084B, out 110219B, BBs exec'd 0 ====
+ 0x3A968122: call 0x3A972730
+. 1061 3A968122 5
+. E8 09 A6 00 00
+
+==== BB 1062 _dl_sysdep_start_cleanup(0x3A972730) in 20089B, out 110264B, BBs exec'd 0 ====
+ 0x3A972730: pushl %ebp
+ 0x3A972731: movl %esp,%ebp
+ 0x3A972733: popl %ebp
+ 0x3A972734: ret
+. 1062 3A972730 5
+. 55 89 E5 5D C3
+
+==== BB 1063 (0x3A968127) in 20094B, out 110333B, BBs exec'd 0 ====
+ 0x3A968127: movl 0xFFFFF9D0(%ebx),%eax
+ 0x3A96812D: testl %eax,%eax
+ 0x3A96812F: jnz-8 0x3A968193
+. 1063 3A968127 10
+. 8B 83 D0 F9 FF FF 85 C0 75 62
+
+==== BB 1064 (0x3A968131) in 20104B, out 110408B, BBs exec'd 0 ====
+ 0x3A968131: cmpl $0x1, 0xFFFFFB54(%ebx)
+ 0x3A968138: jbe-32 0x3A9673C4
+. 1064 3A968131 13
+. 83 BB 54 FB FF FF 01 0F 86 86 F2 FF FF
+
+==== BB 1065 (0x3A96813E) in 20117B, out 110474B, BBs exec'd 0 ====
+ 0x3A96813E: xorl %eax, %eax
+ 0x3A968140: movl %eax,12(%esp,,)
+ 0x3A968144: xorl %eax, %eax
+ 0x3A968146: movl %eax,8(%esp,,)
+ 0x3A96814A: movl 0xFFFFF994(%ebx),%eax
+ 0x3A968150: movl 0x1B0(%eax),%eax
+ 0x3A968156: movl %edi,(%esp,,)
+ 0x3A968159: movl %eax,4(%esp,,)
+ 0x3A96815D: call 0x3A96DEB0
+. 1065 3A96813E 36
+. 31 C0 89 44 24 0C 31 C0 89 44 24 08 8B 83 94 F9 FF FF 8B 80 B0 01 00 00 89 3C 24 89 44 24 04 E8 4E 5D 00 00
+
+==== BB 1066 (0x3A96E233) in 20153B, out 110617B, BBs exec'd 0 ====
+ 0x3A96E233: movl -48(%ebp),%edx
+ 0x3A96E236: movl -52(%ebp),%eax
+ 0x3A96E239: addl %edx,%eax
+ 0x3A96E23B: cmpl %ecx,%eax
+ 0x3A96E23D: jz-8 0x3A96E256
+. 1066 3A96E233 12
+. 8B 55 D0 8B 45 CC 01 D0 39 C8 74 17
+
+==== BB 1067 (0x3A96E256) in 20165B, out 110706B, BBs exec'd 0 ====
+ 0x3A96E256: movl 32(%esi),%eax
+ 0x3A96E259: movl 4(%eax),%ecx
+ 0x3A96E25C: addl %ecx,%edx
+ 0x3A96E25E: movl %edx,-48(%ebp)
+ 0x3A96E261: jmp 0x3A96DFB3
+. 1067 3A96E256 16
+. 8B 46 20 8B 48 04 01 CA 89 55 D0 E9 4D FD FF FF
+
+==== BB 1068 (0x3A96DFED) in 20181B, out 110792B, BBs exec'd 0 ====
+ 0x3A96DFED: jmp 0x3A96E330
+. 1068 3A96DFED 5
+. E9 3E 03 00 00
+
+==== BB 1069 (0x3A968162) in 20186B, out 110820B, BBs exec'd 0 ====
+ 0x3A968162: jmp 0x3A9673C4
+. 1069 3A968162 5
+. E9 5D F2 FF FF
+
+==== BB 1070 (0x3A9673C4) in 20191B, out 110848B, BBs exec'd 0 ====
+ 0x3A9673C4: movl 0xFFFFFE78(%ebp),%edx
+ 0x3A9673CA: movl $0x1, 12(%edx)
+ 0x3A9673D1: call 0x3A970B70
+. 1070 3A9673C4 18
+. 8B 95 78 FE FF FF C7 42 0C 01 00 00 00 E8 9A 97 00 00
+
+==== BB 1071 _dl_debug_state(0x3A970B70) in 20209B, out 110927B, BBs exec'd 0 ====
+ 0x3A970B70: pushl %ebp
+ 0x3A970B71: movl %esp,%ebp
+ 0x3A970B73: popl %ebp
+ 0x3A970B74: ret
+. 1071 3A970B70 5
+. 55 89 E5 5D C3
+
+==== BB 1072 (0x3A9673D6) in 20214B, out 110996B, BBs exec'd 0 ====
+ 0x3A9673D6: call 0x3A96B6D0
+. 1072 3A9673D6 5
+. E8 F5 42 00 00
+
+==== BB 1073 _dl_unload_cache(0x3A96B6D0) in 20219B, out 111041B, BBs exec'd 0 ====
+ 0x3A96B6D0: pushl %ebp
+ 0x3A96B6D1: movl %esp,%ebp
+ 0x3A96B6D3: pushl %ebx
+ 0x3A96B6D4: subl $0x8, %esp
+ 0x3A96B6D7: call 0x3A97592B
+. 1073 3A96B6D0 12
+. 55 89 E5 53 83 EC 08 E8 4F A2 00 00
+
+==== BB 1074 (0x3A96B6DC) in 20231B, out 111142B, BBs exec'd 0 ====
+ 0x3A96B6DC: addl $0xCF90, %ebx
+ 0x3A96B6E2: movl 0xDC(%ebx),%ecx
+ 0x3A96B6E8: testl %ecx,%ecx
+ 0x3A96B6EA: setnz %al
+ 0x3A96B6ED: cmpl $0xFFFFFFFF, %ecx
+ 0x3A96B6F0: setnz %dl
+ 0x3A96B6F3: andl %edx,%eax
+ 0x3A96B6F5: testb $0x1, %al
+ 0x3A96B6F7: jnz-8 0x3A96B700
+. 1074 3A96B6DC 29
+. 81 C3 90 CF 00 00 8B 8B DC 00 00 00 85 C9 0F 95 C0 83 F9 FF 0F 95 C2 21 D0 A8 01 75 07
+
+==== BB 1075 (0x3A96B700) in 20260B, out 111299B, BBs exec'd 0 ====
+ 0x3A96B700: movl %ecx,(%esp,,)
+ 0x3A96B703: movl 0xE4(%ebx),%eax
+ 0x3A96B709: movl %eax,4(%esp,,)
+ 0x3A96B70D: call 0x3A974C90
+. 1075 3A96B700 18
+. 89 0C 24 8B 83 E4 00 00 00 89 44 24 04 E8 7E 95 00 00
+
+==== BB 1076 munmap(0x3A974C90) in 20278B, out 111383B, BBs exec'd 0 ====
+ 0x3A974C90: movl %ebx,%edx
+ 0x3A974C92: movl 8(%esp,,),%ecx
+ 0x3A974C96: movl 4(%esp,,),%ebx
+ 0x3A974C9A: movl $0x5B,%eax
+ 0x3A974C9F: int $0x80
+. 1076 3A974C90 17
+. 89 DA 8B 4C 24 08 8B 5C 24 04 B8 5B 00 00 00 CD 80
+
+==== BB 1077 (0x3A974CA1) in 20295B, out 111460B, BBs exec'd 0 ====
+ 0x3A974CA1: movl %edx,%ebx
+ 0x3A974CA3: cmpl $0xFFFFF001, %eax
+ 0x3A974CA8: jnb-8 0x3A974CAB
+. 1077 3A974CA1 9
+. 89 D3 3D 01 F0 FF FF 73 01
+
+==== BB 1078 (0x3A974CAA) in 20304B, out 111530B, BBs exec'd 0 ====
+ 0x3A974CAA: ret
+. 1078 3A974CAA 1
+. C3
+
+==== BB 1079 (0x3A96B712) in 20305B, out 111560B, BBs exec'd 0 ====
+ 0x3A96B712: xorl %eax, %eax
+ 0x3A96B714: movl %eax,0xDC(%ebx)
+ 0x3A96B71A: addl $0x8, %esp
+ 0x3A96B71D: popl %ebx
+ 0x3A96B71E: popl %ebp
+ 0x3A96B71F: ret
+. 1079 3A96B712 14
+. 31 C0 89 83 DC 00 00 00 83 C4 08 5B 5D C3
+
+==== BB 1080 (0x3A9673DB) in 20319B, out 111664B, BBs exec'd 0 ====
+ 0x3A9673DB: leal -12(%ebp), %esp
+ 0x3A9673DE: popl %ebx
+ 0x3A9673DF: popl %esi
+ 0x3A9673E0: popl %edi
+ 0x3A9673E1: popl %ebp
+ 0x3A9673E2: ret
+. 1080 3A9673DB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+==== BB 1081 (0x3A9730A0) in 20327B, out 111766B, BBs exec'd 0 ====
+ 0x3A9730A0: movl 0xFFFFFE20(%ebp),%eax
+ 0x3A9730A6: addl $0x204, %esp
+ 0x3A9730AC: popl %ebx
+ 0x3A9730AD: popl %esi
+ 0x3A9730AE: popl %edi
+ 0x3A9730AF: popl %ebp
+ 0x3A9730B0: ret
+. 1081 3A9730A0 17
+. 8B 85 20 FE FF FF 81 C4 04 02 00 00 5B 5E 5F 5D C3
+
+==== BB 1082 (0x3A965ECA) in 20344B, out 111894B, BBs exec'd 0 ====
+ 0x3A965ECA: cmpb $0x0, 0xFFFFFC14(%ebx)
+ 0x3A965ED1: movl %eax,%edi
+ 0x3A965ED3: js-8 0x3A965F30
+. 1082 3A965ECA 11
+. 80 BB 14 FC FF FF 00 89 C7 78 5B
+
+==== BB 1083 (0x3A965ED5) in 20355B, out 111970B, BBs exec'd 0 ====
+ 0x3A965ED5: addl $0x54, %esp
+ 0x3A965ED8: movl %edi,%eax
+ 0x3A965EDA: popl %ebx
+ 0x3A965EDB: popl %esi
+ 0x3A965EDC: popl %edi
+ 0x3A965EDD: popl %ebp
+ 0x3A965EDE: ret
+. 1083 3A965ED5 10
+. 83 C4 54 89 F8 5B 5E 5F 5D C3
+
+==== BB 1084 (0x3A965887) in 20365B, out 112088B, BBs exec'd 0 ====
+ 0x3A965887: movl %eax,%edi
+ 0x3A965889: call 0x3A965870
+. 1084 3A965887 7
+. 89 C7 E8 E2 FF FF FF
+
+==== BB 1085 (0x3A965870) in 20372B, out 112143B, BBs exec'd 0 ====
+ 0x3A965870: movl (%esp,,),%ebx
+ 0x3A965873: ret
+. 1085 3A965870 4
+. 8B 1C 24 C3
+
+==== BB 1086 (0x3A96588E) in 20376B, out 112183B, BBs exec'd 0 ====
+ 0x3A96588E: addl $0x12DDE, %ebx
+ 0x3A965894: movl 0x208(%ebx),%eax
+ 0x3A96589A: popl %edx
+ 0x3A96589B: leal (%esp,%eax,4), %esp
+ 0x3A96589E: subl %eax,%edx
+ 0x3A9658A0: pushl %edx
+ 0x3A9658A1: movl 0xFFFFF994(%ebx),%eax
+ 0x3A9658A7: leal 8(%esp,%edx,4), %esi
+ 0x3A9658AB: leal 4(%esp,,), %ecx
+ 0x3A9658AF: pushl %esi
+ 0x3A9658B0: call 0x3A970680
+. 1086 3A96588E 39
+. 81 C3 DE 2D 01 00 8B 83 08 02 00 00 5A 8D 24 84 29 C2 52 8B 83 94 F9 FF FF 8D 74 94 08 8D 4C 24 04 56 E8 CB AD 00 00
+
+==== BB 1087 _dl_init_internal(0x3A970680) in 20415B, out 112357B, BBs exec'd 0 ====
+ 0x3A970680: pushl %ebp
+ 0x3A970681: movl %esp,%ebp
+ 0x3A970683: pushl %edi
+ 0x3A970684: movl %eax,%edi
+ 0x3A970686: pushl %esi
+ 0x3A970687: pushl %ebx
+ 0x3A970688: subl $0x2C, %esp
+ 0x3A97068B: movl 0x98(%eax),%eax
+ 0x3A970691: call 0x3A97592B
+. 1087 3A970680 22
+. 55 89 E5 57 89 C7 56 53 83 EC 2C 8B 80 98 00 00 00 E8 95 52 00 00
+
+==== BB 1088 (0x3A970696) in 20437B, out 112519B, BBs exec'd 0 ====
+ 0x3A970696: addl $0x7FD6, %ebx
+ 0x3A97069C: movl %edx,-16(%ebp)
+ 0x3A97069F: movl 0x9C(%edi),%esi
+ 0x3A9706A5: movl %eax,-24(%ebp)
+ 0x3A9706A8: movl 0xFFFFF9CC(%ebx),%eax
+ 0x3A9706AE: movl %ecx,-20(%ebp)
+ 0x3A9706B1: testl %eax,%eax
+ 0x3A9706B3: jnz-32 0x3A97074A
+. 1088 3A970696 35
+. 81 C3 D6 7F 00 00 89 55 F0 8B B7 9C 00 00 00 89 45 E8 8B 83 CC F9 FF FF 89 4D EC 85 C0 0F 85 91 00 00 00
+
+==== BB 1089 (0x3A97074A) in 20472B, out 112668B, BBs exec'd 0 ====
+ 0x3A97074A: movl 8(%ebp),%edx
+ 0x3A97074D: movl %edx,(%esp,,)
+ 0x3A970750: movl -16(%ebp),%edx
+ 0x3A970753: call 0x3A970560
+. 1089 3A97074A 14
+. 8B 55 08 89 14 24 8B 55 F0 E8 08 FE FF FF
+
+==== BB 1090 call_init(0x3A970560) in 20486B, out 112746B, BBs exec'd 0 ====
+ 0x3A970560: pushl %ebp
+ 0x3A970561: movl %esp,%ebp
+ 0x3A970563: subl $0x28, %esp
+ 0x3A970566: movl %ebx,-12(%ebp)
+ 0x3A970569: movl %esi,-8(%ebp)
+ 0x3A97056C: movl %eax,%esi
+ 0x3A97056E: movl %edi,-4(%ebp)
+ 0x3A970571: movzbl 0x174(%eax),%eax
+ 0x3A970578: call 0x3A97592B
+. 1090 3A970560 29
+. 55 89 E5 83 EC 28 89 5D F4 89 75 F8 89 C6 89 7D FC 0F B6 80 74 01 00 00 E8 AE 53 00 00
+
+==== BB 1091 (0x3A97057D) in 20515B, out 112899B, BBs exec'd 0 ====
+ 0x3A97057D: addl $0x80EF, %ebx
+ 0x3A970583: movl %edx,-16(%ebp)
+ 0x3A970586: movl %ecx,-20(%ebp)
+ 0x3A970589: testb $0x8, %al
+ 0x3A97058B: jnz-8 0x3A9705C0
+. 1091 3A97057D 16
+. 81 C3 EF 80 00 00 89 55 F0 89 4D EC A8 08 75 33
+
+==== BB 1092 (0x3A97058D) in 20531B, out 113006B, BBs exec'd 0 ====
+ 0x3A97058D: movb %al,%dl
+ 0x3A97058F: movl 4(%esi),%eax
+ 0x3A970592: orb $0x8, %dl
+ 0x3A970595: movb %dl,0x174(%esi)
+ 0x3A97059B: movzbl (%eax),%ecx
+ 0x3A97059E: testb %cl,%cl
+ 0x3A9705A0: jz-32 0x3A97063E
+. 1092 3A97058D 25
+. 88 C2 8B 46 04 80 CA 08 88 96 74 01 00 00 0F B6 08 84 C9 0F 84 98 00 00 00
+
+==== BB 1093 (0x3A9705A6) in 20556B, out 113148B, BBs exec'd 0 ====
+ 0x3A9705A6: movl 72(%esi),%edx
+ 0x3A9705A9: testl %edx,%edx
+ 0x3A9705AB: jnz-8 0x3A9705D0
+. 1093 3A9705A6 7
+. 8B 56 48 85 D2 75 23
+
+==== BB 1094 (0x3A9705D0) in 20563B, out 113220B, BBs exec'd 0 ====
+ 0x3A9705D0: testb $0x2, 0xFFFFFC14(%ebx)
+ 0x3A9705D7: jnz-8 0x3A970655
+. 1094 3A9705D0 9
+. F6 83 14 FC FF FF 02 75 7C
+
+==== BB 1095 (0x3A9705D9) in 20572B, out 113290B, BBs exec'd 0 ====
+ 0x3A9705D9: testl %edx,%edx
+ 0x3A9705DB: jnz-8 0x3A97061F
+. 1095 3A9705D9 4
+. 85 D2 75 42
+
+==== BB 1096 (0x3A97061F) in 20576B, out 113349B, BBs exec'd 0 ====
+ 0x3A97061F: movl 4(%edx),%eax
+ 0x3A970622: movl 8(%ebp),%edx
+ 0x3A970625: movl (%esi),%edi
+ 0x3A970627: movl %edx,8(%esp,,)
+ 0x3A97062B: movl -20(%ebp),%edx
+ 0x3A97062E: addl %edi,%eax
+ 0x3A970630: movl %edx,4(%esp,,)
+ 0x3A970634: movl -16(%ebp),%edx
+ 0x3A970637: movl %edx,(%esp,,)
+ 0x3A97063A: call*l %eax
+. 1096 3A97061F 29
+. 8B 42 04 8B 55 08 8B 3E 89 54 24 08 8B 55 EC 01 F8 89 54 24 04 8B 55 F0 89 14 24 FF D0
+
+==== BB 1097 (0x3A97C92C) in 20605B, out 113486B, BBs exec'd 0 ====
+ 0x3A97C92C: pushl %ebp
+ 0x3A97C92D: movl %esp,%ebp
+ 0x3A97C92F: subl $0x8, %esp
+ 0x3A97C932: call 0x3A97C9C0
+. 1097 3A97C92C 11
+. 55 89 E5 83 EC 08 E8 89 00 00 00
+
+==== BB 1098 (0x3A97C9C0) in 20616B, out 113571B, BBs exec'd 0 ====
+ 0x3A97C9C0: pushl %ebp
+ 0x3A97C9C1: movl %esp,%ebp
+ 0x3A97C9C3: pushl %ebx
+ 0x3A97C9C4: call 0x3A97C9C9 ; popl %ebx
+ 0x3A97C9CA: addl $0x1417, %ebx
+ 0x3A97C9D0: pushl %edx
+ 0x3A97C9D1: movl 0x2C(%ebx),%eax
+ 0x3A97C9D7: testl %eax,%eax
+ 0x3A97C9D9: jz-8 0x3A97C9DD
+. 1098 3A97C9C0 27
+. 55 89 E5 53 E8 00 00 00 00 5B 81 C3 17 14 00 00 52 8B 83 2C 00 00 00 85 C0 74 02
+
+==== BB 1099 (0x3A97C9DD) in 20643B, out 113723B, BBs exec'd 0 ====
+ 0x3A97C9DD: popl %eax
+ 0x3A97C9DE: popl %ebx
+ 0x3A97C9DF: leave 0x3A97C9E0: ret
+. 1099 3A97C9DD 4
+. 58 5B C9 C3
+
+==== BB 1100 (0x3A97C937) in 20647B, out 113807B, BBs exec'd 0 ====
+ 0x3A97C937: call 0x3A97CA60
+. 1100 3A97C937 5
+. E8 24 01 00 00
+
+==== BB 1101 (0x3A97CA60) in 20652B, out 113852B, BBs exec'd 0 ====
+ 0x3A97CA60: pushl %ebp
+ 0x3A97CA61: movl %esp,%ebp
+ 0x3A97CA63: pushl %ebx
+ 0x3A97CA64: call 0x3A97CA69 ; popl %ebx
+ 0x3A97CA6A: addl $0x1377, %ebx
+ 0x3A97CA70: pushl %eax
+ 0x3A97CA71: movl 0xFFFFFFFC(%ebx),%eax
+ 0x3A97CA77: testl %eax,%eax
+ 0x3A97CA79: jz-8 0x3A97CA85
+. 1101 3A97CA60 27
+. 55 89 E5 53 E8 00 00 00 00 5B 81 C3 77 13 00 00 50 8B 83 FC FF FF FF 85 C0 74 0A
+
+==== BB 1102 (0x3A97CA85) in 20679B, out 114004B, BBs exec'd 0 ====
+ 0x3A97CA85: movl -4(%ebp),%ebx
+ 0x3A97CA88: leave 0x3A97CA89: ret
+. 1102 3A97CA85 5
+. 8B 5D FC C9 C3
+
+==== BB 1103 (0x3A97C93C) in 20684B, out 114066B, BBs exec'd 0 ====
+ 0x3A97C93C: call 0x3A97CCA0
+. 1103 3A97C93C 5
+. E8 5F 03 00 00
+
+==== BB 1104 (0x3A97CCA0) in 20689B, out 114111B, BBs exec'd 0 ====
+ 0x3A97CCA0: pushl %ebp
+ 0x3A97CCA1: movl %esp,%ebp
+ 0x3A97CCA3: pushl %esi
+ 0x3A97CCA4: pushl %ebx
+ 0x3A97CCA5: call 0x3A97CCAA ; popl %ebx
+ 0x3A97CCAB: addl $0x1136, %ebx
+ 0x3A97CCB1: leal 0xFFFFFFF0(%ebx), %eax
+ 0x3A97CCB7: leal -4(%eax), %esi
+ 0x3A97CCBA: movl -4(%eax),%eax
+ 0x3A97CCBD: cmpl $0xFFFFFFFF, %eax
+ 0x3A97CCC0: jz-8 0x3A97CCCE
+. 1104 3A97CCA0 34
+. 55 89 E5 56 53 E8 00 00 00 00 5B 81 C3 36 11 00 00 8D 83 F0 FF FF FF 8D 70 FC 8B 40 FC 83 F8 FF 74 0C
+
+==== BB 1105 (0x3A97CCCE) in 20723B, out 114278B, BBs exec'd 0 ====
+ 0x3A97CCCE: popl %ebx
+ 0x3A97CCCF: popl %esi
+ 0x3A97CCD0: popl %ebp
+ 0x3A97CCD1: ret
+. 1105 3A97CCCE 4
+. 5B 5E 5D C3
+
+==== BB 1106 (0x3A97C941) in 20727B, out 114356B, BBs exec'd 0 ====
+ 0x3A97C941: leave 0x3A97C942: ret
+. 1106 3A97C941 2
+. C9 C3
+
+==== BB 1107 (0x3A97063C) in 20729B, out 114405B, BBs exec'd 0 ====
+ 0x3A97063C: jmp-8 0x3A9705DD
+. 1107 3A97063C 2
+. EB 9F
+
+==== BB 1108 (0x3A9705DD) in 20731B, out 114433B, BBs exec'd 0 ====
+ 0x3A9705DD: movl 124(%esi),%edx
+ 0x3A9705E0: testl %edx,%edx
+ 0x3A9705E2: jz-8 0x3A9705C0
+. 1108 3A9705DD 7
+. 8B 56 7C 85 D2 74 DC
+
+==== BB 1109 (0x3A9705C0) in 20738B, out 114505B, BBs exec'd 0 ====
+ 0x3A9705C0: movl -12(%ebp),%ebx
+ 0x3A9705C3: movl -8(%ebp),%esi
+ 0x3A9705C6: movl -4(%ebp),%edi
+ 0x3A9705C9: movl %ebp,%esp
+ 0x3A9705CB: popl %ebp
+ 0x3A9705CC: ret
+. 1109 3A9705C0 13
+. 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 1110 (0x3A970758) in 20751B, out 114597B, BBs exec'd 0 ====
+ 0x3A970758: xorl %eax, %eax
+ 0x3A97075A: movl %eax,0xFFFFF9CC(%ebx)
+ 0x3A970760: movl -24(%ebp),%eax
+ 0x3A970763: testl %eax,%eax
+ 0x3A970765: jz-32 0x3A9706C4
+. 1110 3A970758 19
+. 31 C0 89 83 CC F9 FF FF 8B 45 E8 85 C0 0F 84 59 FF FF FF
+
+==== BB 1111 (0x3A9706C4) in 20770B, out 114696B, BBs exec'd 0 ====
+ 0x3A9706C4: xorl %eax, %eax
+ 0x3A9706C6: call 0x3A970B30
+. 1111 3A9706C4 7
+. 31 C0 E8 65 04 00 00
+
+==== BB 1112 (0x3A970B65) in 20777B, out 114759B, BBs exec'd 0 ====
+ 0x3A970B65: popl %ebp
+ 0x3A970B66: movl %edx,%eax
+ 0x3A970B68: ret
+. 1112 3A970B65 4
+. 5D 89 D0 C3
+
+==== BB 1113 (0x3A9706CB) in 20781B, out 114815B, BBs exec'd 0 ====
+ 0x3A9706CB: movl %eax,-28(%ebp)
+ 0x3A9706CE: movl $0x1, 12(%eax)
+ 0x3A9706D5: call 0x3A970B70
+. 1113 3A9706CB 15
+. 89 45 E4 C7 40 0C 01 00 00 00 E8 96 04 00 00
+
+==== BB 1114 (0x3A9706DA) in 20796B, out 114891B, BBs exec'd 0 ====
+ 0x3A9706DA: movl 0x154(%edi),%esi
+ 0x3A9706E0: movl %esi,%eax
+ 0x3A9706E2: decl %esi
+ 0x3A9706E3: testl %eax,%eax
+ 0x3A9706E5: jnz-8 0x3A970708
+. 1114 3A9706DA 13
+. 8B B7 54 01 00 00 89 F0 4E 85 C0 75 21
+
+==== BB 1115 (0x3A970708) in 20809B, out 114984B, BBs exec'd 0 ====
+ 0x3A970708: movl 0x1D4(%edi),%eax
+ 0x3A97070E: movl 8(%ebp),%edx
+ 0x3A970711: movl (%eax,%esi,4),%eax
+ 0x3A970714: movl %edx,(%esp,,)
+ 0x3A970717: movl -20(%ebp),%ecx
+ 0x3A97071A: movl -16(%ebp),%edx
+ 0x3A97071D: call 0x3A970560
+. 1115 3A970708 26
+. 8B 87 D4 01 00 00 8B 55 08 8B 04 B0 89 14 24 8B 4D EC 8B 55 F0 E8 3E FE FF FF
+
+==== BB 1116 (0x3A9705AD) in 20835B, out 115108B, BBs exec'd 0 ====
+ 0x3A9705AD: movl 124(%esi),%edi
+ 0x3A9705B0: testl %edi,%edi
+ 0x3A9705B2: jnz-8 0x3A9705D0
+. 1116 3A9705AD 7
+. 8B 7E 7C 85 FF 75 1C
+
+==== BB 1117 (0x3A9705B4) in 20842B, out 115180B, BBs exec'd 0 ====
+ 0x3A9705B4: leal 0x0(%esi), %esi
+ 0x3A9705BA: leal 0x0(%edi), %edi
+ 0x3A9705C0: movl -12(%ebp),%ebx
+ 0x3A9705C3: movl -8(%ebp),%esi
+ 0x3A9705C6: movl -4(%ebp),%edi
+ 0x3A9705C9: movl %ebp,%esp
+ 0x3A9705CB: popl %ebp
+ 0x3A9705CC: ret
+. 1117 3A9705B4 25
+. 8D B6 00 00 00 00 8D BF 00 00 00 00 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 1118 (0x3A970722) in 20867B, out 115290B, BBs exec'd 0 ====
+ 0x3A970722: movl %esi,%eax
+ 0x3A970724: decl %esi
+ 0x3A970725: testl %eax,%eax
+ 0x3A970727: jnz-8 0x3A970708
+. 1118 3A970722 7
+. 89 F0 4E 85 C0 75 DF
+
+==== BB 1119 _init(0x3A9B37C0) in 20874B, out 115367B, BBs exec'd 0 ====
+ 0x3A9B37C0: pushl %ebp
+ 0x3A9B37C1: xorl %eax, %eax
+ 0x3A9B37C3: movl %esp,%ebp
+ 0x3A9B37C5: subl $0x18, %esp
+ 0x3A9B37C8: movl %ebx,-12(%ebp)
+ 0x3A9B37CB: call 0x3A9B3791
+. 1119 3A9B37C0 16
+. 55 31 C0 89 E5 83 EC 18 89 5D F4 E8 C1 FF FF FF
+
+==== BB 1120 __i686.get_pc_thunk.bx(0x3A9B3791) in 20890B, out 115479B, BBs exec'd 0 ====
+ 0x3A9B3791: movl (%esp,,),%ebx
+ 0x3A9B3794: ret
+. 1120 3A9B3791 4
+. 8B 1C 24 C3
+
+==== BB 1121 (0x3A9B37D0) in 20894B, out 115519B, BBs exec'd 0 ====
+ 0x3A9B37D0: addl $0xFC840, %ebx
+ 0x3A9B37D6: movl %esi,-8(%ebp)
+ 0x3A9B37D9: movl 0xA4(%ebx),%edx
+ 0x3A9B37DF: movl 16(%ebp),%esi
+ 0x3A9B37E2: movl %edi,-4(%ebp)
+ 0x3A9B37E5: testl %edx,%edx
+ 0x3A9B37E7: movl 12(%ebp),%edi
+ 0x3A9B37EA: jz-8 0x3A9B3800
+. 1121 3A9B37D0 28
+. 81 C3 40 C8 0F 00 89 75 F8 8B 93 A4 00 00 00 8B 75 10 89 7D FC 85 D2 8B 7D 0C 74 14
+
+==== BB 1122 (0x3A9B37EC) in 20922B, out 115662B, BBs exec'd 0 ====
+ 0x3A9B37EC: movl (%edx),%edx
+ 0x3A9B37EE: testl %edx,%edx
+ 0x3A9B37F0: jnz-8 0x3A9B3800
+. 1122 3A9B37EC 6
+. 8B 12 85 D2 75 0E
+
+==== BB 1123 (0x3A9B3800) in 20928B, out 115731B, BBs exec'd 0 ====
+ 0x3A9B3800: movl %eax,0xFFFF9010(%ebx)
+ 0x3A9B3806: testl %eax,%eax
+ 0x3A9B3808: jnz-8 0x3A9B3830
+. 1123 3A9B3800 10
+. 89 83 10 90 FF FF 85 C0 75 26
+
+==== BB 1124 (0x3A9B380A) in 20938B, out 115806B, BBs exec'd 0 ====
+ 0x3A9B380A: movl 0x180(%ebx),%eax
+ 0x3A9B3810: movzwl (%eax),%edx
+ 0x3A9B3813: movl 0x168(%ebx),%eax
+ 0x3A9B3819: cmpw 56(%eax),%dx
+ 0x3A9B381D: jz-8 0x3A9B3830
+. 1124 3A9B380A 21
+. 8B 83 80 01 00 00 0F B7 10 8B 83 68 01 00 00 66 3B 50 38 74 11
+
+==== BB 1125 (0x3A9B3830) in 20959B, out 115912B, BBs exec'd 0 ====
+ 0x3A9B3830: movl %edi,0x28D8(%ebx)
+ 0x3A9B3836: movl 8(%ebp),%eax
+ 0x3A9B3839: movl %eax,0x28D4(%ebx)
+ 0x3A9B383F: movl 0x13C(%ebx),%eax
+ 0x3A9B3845: movl %esi,(%eax)
+ 0x3A9B3847: movl %esi,8(%esp,,)
+ 0x3A9B384B: movl %edi,4(%esp,,)
+ 0x3A9B384F: movl 8(%ebp),%eax
+ 0x3A9B3852: movl %eax,(%esp,,)
+ 0x3A9B3855: call 0x3AA57E00
+. 1125 3A9B3830 42
+. 89 BB D8 28 00 00 8B 45 08 89 83 D4 28 00 00 8B 83 3C 01 00 00 89 30 89 74 24 08 89 7C 24 04 8B 45 08 89 04 24 E8 A6 45 0A 00
+
+==== BB 1126 __init_misc(0x3AA57E00) in 21001B, out 116065B, BBs exec'd 0 ====
+ 0x3AA57E00: pushl %ebp
+ 0x3AA57E01: movl %esp,%ebp
+ 0x3AA57E03: subl $0x14, %esp
+ 0x3AA57E06: movl %edi,-4(%ebp)
+ 0x3AA57E09: movl 12(%ebp),%edi
+ 0x3AA57E0C: movl %ebx,-12(%ebp)
+ 0x3AA57E0F: call 0x3A9B3791
+. 1126 3AA57E00 20
+. 55 89 E5 83 EC 14 89 7D FC 8B 7D 0C 89 5D F4 E8 7D B9 F5 FF
+
+==== BB 1127 (0x3AA57E14) in 21021B, out 116189B, BBs exec'd 0 ====
+ 0x3AA57E14: addl $0x581FC, %ebx
+ 0x3AA57E1A: movl %esi,-8(%ebp)
+ 0x3AA57E1D: testl %edi,%edi
+ 0x3AA57E1F: jz-8 0x3AA57E51
+. 1127 3AA57E14 13
+. 81 C3 FC 81 05 00 89 75 F8 85 FF 74 30
+
+==== BB 1128 (0x3AA57E21) in 21034B, out 116280B, BBs exec'd 0 ====
+ 0x3AA57E21: movl (%edi),%esi
+ 0x3AA57E23: testl %esi,%esi
+ 0x3AA57E25: jz-8 0x3AA57E51
+. 1128 3AA57E21 6
+. 8B 37 85 F6 74 2A
+
+==== BB 1129 (0x3AA57E27) in 21040B, out 116349B, BBs exec'd 0 ====
+ 0x3AA57E27: movl %esi,(%esp,,)
+ 0x3AA57E2A: movl $0x2F,%eax
+ 0x3AA57E2F: movl %eax,4(%esp,,)
+ 0x3AA57E33: call 0x3A9B35E0
+. 1129 3AA57E27 17
+. 89 34 24 B8 2F 00 00 00 89 44 24 04 E8 A8 B7 F5 FF
+
+==== BB 1130 (0x3A9B35E0) in 21057B, out 116426B, BBs exec'd 0 ====
+ 0x3A9B35E0: jmp*l 0x40(%ebx)
+. 1130 3A9B35E0 6
+. FF A3 40 00 00 00
+
+==== BB 1131 (0x3A9B35E6) in 21063B, out 116453B, BBs exec'd 0 ====
+ 0x3A9B35E6: pushl $0x68
+ 0x3A9B35EB: jmp 0x3A9B3500
+. 1131 3A9B35E6 10
+. 68 68 00 00 00 E9 10 FF FF FF
+
+==== BB 1132 (0x3A9B3500) in 21073B, out 116502B, BBs exec'd 0 ====
+ 0x3A9B3500: pushl 0x4(%ebx)
+ 0x3A9B3506: jmp*l 0x8(%ebx)
+. 1132 3A9B3500 12
+. FF B3 04 00 00 00 FF A3 08 00 00 00
+
+==== BB 1133 _dl_runtime_resolve(0x3A96FEF0) in 21085B, out 116551B, BBs exec'd 0 ====
+ 0x3A96FEF0: pushl %eax
+ 0x3A96FEF1: pushl %ecx
+ 0x3A96FEF2: pushl %edx
+ 0x3A96FEF3: movl 16(%esp,,),%edx
+ 0x3A96FEF7: movl 12(%esp,,),%eax
+ 0x3A96FEFB: call 0x3A970060
+. 1133 3A96FEF0 16
+. 50 51 52 8B 54 24 10 8B 44 24 0C E8 60 01 00 00
+
+==== BB 1134 fixup(0x3A970060) in 21101B, out 116670B, BBs exec'd 0 ====
+ 0x3A970060: pushl %ebp
+ 0x3A970061: movl %esp,%ebp
+ 0x3A970063: pushl %edi
+ 0x3A970064: pushl %esi
+ 0x3A970065: movl %eax,%esi
+ 0x3A970067: pushl %ebx
+ 0x3A970068: subl $0x24, %esp
+ 0x3A97006B: movl 48(%eax),%ecx
+ 0x3A97006E: movl 44(%eax),%eax
+ 0x3A970071: call 0x3A97592B
+. 1134 3A970060 22
+. 55 89 E5 57 56 89 C6 53 83 EC 24 8B 48 30 8B 40 2C E8 B5 58 00 00
+
+==== BB 1135 (0x3A970076) in 21123B, out 116842B, BBs exec'd 0 ====
+ 0x3A970076: addl $0x85F6, %ebx
+ 0x3A97007C: movl 4(%eax),%eax
+ 0x3A97007F: movl %eax,-20(%ebp)
+ 0x3A970082: movl 116(%esi),%eax
+ 0x3A970085: movl 4(%eax),%edi
+ 0x3A970088: addl %edi,%edx
+ 0x3A97008A: movl 4(%edx),%edi
+ 0x3A97008D: movl (%edx),%edx
+ 0x3A97008F: shrl $0x8, %edi
+ 0x3A970092: movl %edi,%eax
+ 0x3A970094: shll $0x4, %eax
+ 0x3A970097: addl 4(%ecx),%eax
+ 0x3A97009A: movl (%esi),%ecx
+ 0x3A97009C: addl %ecx,%edx
+ 0x3A97009E: movl %edx,-24(%ebp)
+ 0x3A9700A1: movl %eax,-28(%ebp)
+ 0x3A9700A4: testb $0x3, 13(%eax)
+ 0x3A9700A8: movl %eax,-16(%ebp)
+ 0x3A9700AB: jnz-32 0x3A970148
+. 1135 3A970076 59
+. 81 C3 F6 85 00 00 8B 40 04 89 45 EC 8B 46 74 8B 78 04 01 FA 8B 7A 04 8B 12 C1 EF 08 89 F8 C1 E0 04 03 41 04 8B 0E 01 CA 89 55 E8 89 45 E4 F6 40 0D 03 89 45 F0 0F 85 97 00 00 00
+
+==== BB 1136 (0x3A9700B1) in 21182B, out 117085B, BBs exec'd 0 ====
+ 0x3A9700B1: movl 0xDC(%esi),%eax
+ 0x3A9700B7: xorl %edx, %edx
+ 0x3A9700B9: testl %eax,%eax
+ 0x3A9700BB: jz-8 0x3A9700E2
+. 1136 3A9700B1 12
+. 8B 86 DC 00 00 00 31 D2 85 C0 74 25
+
+==== BB 1137 (0x3A9700BD) in 21194B, out 117174B, BBs exec'd 0 ====
+ 0x3A9700BD: movl 4(%eax),%eax
+ 0x3A9700C0: movzwl (%eax,%edi,2),%edx
+ 0x3A9700C4: movl 0x17C(%esi),%eax
+ 0x3A9700CA: andl $0x7FFF, %edx
+ 0x3A9700D0: shll $0x4, %edx
+ 0x3A9700D3: addl %eax,%edx
+ 0x3A9700D5: xorl %eax, %eax
+ 0x3A9700D7: cmpl $0x0, 4(%edx)
+ 0x3A9700DB: setnz %al
+ 0x3A9700DE: negl %eax
+ 0x3A9700E0: andl %eax,%edx
+ 0x3A9700E2: movl -28(%ebp),%eax
+ 0x3A9700E5: movl $0x1,%edi
+ 0x3A9700EA: leal -16(%ebp), %ecx
+ 0x3A9700ED: movl (%eax),%eax
+ 0x3A9700EF: addl %eax,-20(%ebp)
+ 0x3A9700F2: xorl %eax, %eax
+ 0x3A9700F4: movl %eax,16(%esp,,)
+ 0x3A9700F8: movl $0x1,%eax
+ 0x3A9700FD: movl %edx,4(%esp,,)
+ 0x3A970101: movl %esi,%edx
+ 0x3A970103: movl %eax,12(%esp,,)
+ 0x3A970107: movl %edi,8(%esp,,)
+ 0x3A97010B: movl 0x1B0(%esi),%eax
+ 0x3A970111: movl %eax,(%esp,,)
+ 0x3A970114: movl -20(%ebp),%eax
+ 0x3A970117: call 0x3A96C0E0
+. 1137 3A9700BD 95
+. 8B 40 04 0F B7 14 78 8B 86 7C 01 00 00 81 E2 FF 7F 00 00 C1 E2 04 01 C2 31 C0 83 7A 04 00 0F 95 C0 F7 D8 21 C2 8B 45 E4 BF 01 00 00 00 8D 4D F0 8B 00 01 45 EC 31 C0 89 44 24 10 B8 01 00 00 00 89 54 24 04 89 F2 89 44 24 0C 89 7C 24 08 8B 86 B0 01 00 00 89 04 24 8B 45 EC E8 C4 BF FF FF
+
+==== BB 1138 (0x3A97011C) in 21289B, out 117515B, BBs exec'd 0 ====
+ 0x3A97011C: movl -16(%ebp),%edx
+ 0x3A97011F: subl $0x14, %esp
+ 0x3A970122: movl %eax,%ecx
+ 0x3A970124: xorl %eax, %eax
+ 0x3A970126: testl %edx,%edx
+ 0x3A970128: jz-8 0x3A970131
+. 1138 3A97011C 14
+. 8B 55 F0 83 EC 14 89 C1 31 C0 85 D2 74 07
+
+==== BB 1139 (0x3A97012A) in 21303B, out 117624B, BBs exec'd 0 ====
+ 0x3A97012A: movl %ecx,%eax
+ 0x3A97012C: movl 4(%edx),%ecx
+ 0x3A97012F: addl %ecx,%eax
+ 0x3A970131: movl 0xFFFFFC44(%ebx),%esi
+ 0x3A970137: testl %esi,%esi
+ 0x3A970139: jnz-8 0x3A970140
+. 1139 3A97012A 17
+. 89 C8 8B 4A 04 01 C8 8B B3 44 FC FF FF 85 F6 75 05
+
+==== BB 1140 (0x3A97013B) in 21320B, out 117731B, BBs exec'd 0 ====
+ 0x3A97013B: movl -24(%ebp),%edx
+ 0x3A97013E: movl %eax,(%edx)
+ 0x3A970140: leal -12(%ebp), %esp
+ 0x3A970143: popl %ebx
+ 0x3A970144: popl %esi
+ 0x3A970145: popl %edi
+ 0x3A970146: popl %ebp
+ 0x3A970147: ret
+. 1140 3A97013B 13
+. 8B 55 E8 89 02 8D 65 F4 5B 5E 5F 5D C3
+
+==== BB 1141 (0x3A96FF00) in 21333B, out 117856B, BBs exec'd 0 ====
+ 0x3A96FF00: popl %edx
+ 0x3A96FF01: popl %ecx
+ 0x3A96FF02: xchgl %eax, (%esp,,)
+ 0x3A96FF05: ret 8
+. 1141 3A96FF00 8
+. 5A 59 87 04 24 C2 08 00
+
+==== BB 1142 strrchr(0x3AA05860) in 21341B, out 117934B, BBs exec'd 0 ====
+ 0x3AA05860: pushl %edi
+ 0x3AA05861: pushl %esi
+ 0x3AA05862: xorl %eax, %eax
+ 0x3AA05864: movl 12(%esp,,),%esi
+ 0x3AA05868: movl 16(%esp,,),%ecx
+ 0x3AA0586C: movb %cl,%ch{bp}
+ 0x3AA0586E: movl %ecx,%edx
+ 0x3AA05870: shll $0x10, %ecx
+ 0x3AA05873: movw %dx,%cx
+ 0x3AA05876: testl $0x3, %esi
+ 0x3AA0587C: jz-32 0x3AA05903
+. 1142 3AA05860 34
+. 57 56 31 C0 8B 74 24 0C 8B 4C 24 10 88 CD 89 CA C1 E1 10 66 89 D1 F7 C6 03 00 00 00 0F 84 81 00 00 00
+
+==== BB 1143 (0x3AA05903) in 21375B, out 118113B, BBs exec'd 0 ====
+ 0x3AA05903: movl (%esi),%edx
+ 0x3AA05905: movl $0xFEFEFEFF,%edi
+ 0x3AA0590A: addl %edx,%edi
+ 0x3AA0590C: jnb-32 0x3AA059EC
+. 1143 3AA05903 15
+. 8B 16 BF FF FE FE FE 01 D7 0F 83 DA 00 00 00
+
+==== BB 1144 (0x3AA05912) in 21390B, out 118191B, BBs exec'd 0 ====
+ 0x3AA05912: xorl %edx,%edi
+ 0x3AA05914: orl $0xFEFEFEFF, %edi
+ 0x3AA0591A: incl %edi
+ 0x3AA0591B: jnz-32 0x3AA059EC
+. 1144 3AA05912 15
+. 31 D7 81 CF FF FE FE FE 47 0F 85 CB 00 00 00
+
+==== BB 1145 (0x3AA05921) in 21405B, out 118267B, BBs exec'd 0 ====
+ 0x3AA05921: xorl %ecx,%edx
+ 0x3AA05923: movl $0xFEFEFEFF,%edi
+ 0x3AA05928: addl %edx,%edi
+ 0x3AA0592A: jnb-8 0x3AA058CA
+. 1145 3AA05921 11
+. 31 CA BF FF FE FE FE 01 D7 73 9E
+
+==== BB 1146 (0x3AA0592C) in 21416B, out 118345B, BBs exec'd 0 ====
+ 0x3AA0592C: xorl %edx,%edi
+ 0x3AA0592E: orl $0xFEFEFEFF, %edi
+ 0x3AA05934: incl %edi
+ 0x3AA05935: jnz-8 0x3AA058E0
+. 1146 3AA0592C 11
+. 31 D7 81 CF FF FE FE FE 47 75 A9
+
+==== BB 1147 (0x3AA058E0) in 21427B, out 118421B, BBs exec'd 0 ====
+ 0x3AA058E0: subl $0x4, %esi
+ 0x3AA058E3: subl $0x4, %esi
+ 0x3AA058E6: subl $0x4, %esi
+ 0x3AA058E9: testl $0xFF0000, %edx
+ 0x3AA058EF: jnz-8 0x3AA058F6
+. 1147 3AA058E0 17
+. 83 EE 04 83 EE 04 83 EE 04 F7 C2 00 00 FF 00 75 05
+
+==== BB 1148 (0x3AA058F6) in 21444B, out 118509B, BBs exec'd 0 ====
+ 0x3AA058F6: leal 12(%esi), %eax
+ 0x3AA058F9: testb %dh{si},%dh{si}
+ 0x3AA058FB: jnz-8 0x3AA05900
+. 1148 3AA058F6 7
+. 8D 46 0C 84 F6 75 03
+
+==== BB 1149 (0x3AA058FD) in 21451B, out 118583B, BBs exec'd 0 ====
+ 0x3AA058FD: leal 13(%esi), %eax
+ 0x3AA05900: addl $0x10, %esi
+ 0x3AA05903: movl (%esi),%edx
+ 0x3AA05905: movl $0xFEFEFEFF,%edi
+ 0x3AA0590A: addl %edx,%edi
+ 0x3AA0590C: jnb-32 0x3AA059EC
+. 1149 3AA058FD 21
+. 8D 46 0D 83 C6 10 8B 16 BF FF FE FE FE 01 D7 0F 83 DA 00 00 00
+
+==== BB 1150 (0x3AA05937) in 21472B, out 118684B, BBs exec'd 0 ====
+ 0x3AA05937: movl 4(%esi),%edx
+ 0x3AA0593A: movl $0xFEFEFEFF,%edi
+ 0x3AA0593F: addl %edx,%edi
+ 0x3AA05941: jnb-32 0x3AA059E9
+. 1150 3AA05937 16
+. 8B 56 04 BF FF FE FE FE 01 D7 0F 83 A2 00 00 00
+
+==== BB 1151 (0x3AA05947) in 21488B, out 118765B, BBs exec'd 0 ====
+ 0x3AA05947: xorl %edx,%edi
+ 0x3AA05949: orl $0xFEFEFEFF, %edi
+ 0x3AA0594F: incl %edi
+ 0x3AA05950: jnz-32 0x3AA059E9
+. 1151 3AA05947 15
+. 31 D7 81 CF FF FE FE FE 47 0F 85 93 00 00 00
+
+==== BB 1152 (0x3AA059E9) in 21503B, out 118841B, BBs exec'd 0 ====
+ 0x3AA059E9: addl $0x4, %esi
+ 0x3AA059EC: cmpb %cl,%dl
+ 0x3AA059EE: jnz-8 0x3AA059F2
+. 1152 3AA059E9 7
+. 83 C6 04 38 CA 75 02
+
+==== BB 1153 (0x3AA059F2) in 21510B, out 118912B, BBs exec'd 0 ====
+ 0x3AA059F2: testb %dl,%dl
+ 0x3AA059F4: jz-8 0x3AA05A16
+. 1153 3AA059F2 4
+. 84 D2 74 20
+
+==== BB 1154 (0x3AA05A16) in 21514B, out 118973B, BBs exec'd 0 ====
+ 0x3AA05A16: popl %esi
+ 0x3AA05A17: popl %edi
+ 0x3AA05A18: ret
+. 1154 3AA05A16 3
+. 5E 5F C3
+
+==== BB 1155 (0x3AA57E38) in 21517B, out 119035B, BBs exec'd 0 ====
+ 0x3AA57E38: testl %eax,%eax
+ 0x3AA57E3A: jz-8 0x3AA57E5E
+. 1155 3AA57E38 4
+. 85 C0 74 22
+
+==== BB 1156 (0x3AA57E3C) in 21521B, out 119094B, BBs exec'd 0 ====
+ 0x3AA57E3C: leal 1(%eax), %edx
+ 0x3AA57E3F: movl 0x198(%ebx),%eax
+ 0x3AA57E45: movl %edx,(%eax)
+ 0x3AA57E47: movl (%edi),%edx
+ 0x3AA57E49: movl 0x270(%ebx),%eax
+ 0x3AA57E4F: movl %edx,(%eax)
+ 0x3AA57E51: movl -12(%ebp),%ebx
+ 0x3AA57E54: movl -8(%ebp),%esi
+ 0x3AA57E57: movl -4(%ebp),%edi
+ 0x3AA57E5A: movl %ebp,%esp
+ 0x3AA57E5C: popl %ebp
+ 0x3AA57E5D: ret
+. 1156 3AA57E3C 34
+. 8D 50 01 8B 83 98 01 00 00 89 10 8B 17 8B 83 70 02 00 00 89 10 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 1157 (0x3A9B385A) in 21555B, out 119255B, BBs exec'd 0 ====
+ 0x3A9B385A: call 0x3A9B3720
+. 1157 3A9B385A 5
+. E8 C1 FE FF FF
+
+==== BB 1158 __libc_global_ctors(0x3A9B3720) in 21560B, out 119300B, BBs exec'd 0 ====
+ 0x3A9B3720: pushl %ebp
+ 0x3A9B3721: movl %esp,%ebp
+ 0x3A9B3723: pushl %esi
+ 0x3A9B3724: pushl %ebx
+ 0x3A9B3725: call 0x3A9B3791
+. 1158 3A9B3720 10
+. 55 89 E5 56 53 E8 67 00 00 00
+
+==== BB 1159 (0x3A9B372A) in 21570B, out 119403B, BBs exec'd 0 ====
+ 0x3A9B372A: addl $0xFC8E6, %ebx
+ 0x3A9B3730: leal 0xFFFFFF94(%ebx), %esi
+ 0x3A9B3736: movl (%esi),%eax
+ 0x3A9B3738: testl %eax,%eax
+ 0x3A9B373A: jnz-8 0x3A9B3740
+. 1159 3A9B372A 18
+. 81 C3 E6 C8 0F 00 8D B3 94 FF FF FF 8B 06 85 C0 75 04
+
+==== BB 1160 (0x3A9B3740) in 21588B, out 119495B, BBs exec'd 0 ====
+ 0x3A9B3740: addl $0x4, %esi
+ 0x3A9B3743: call*l %eax
+. 1160 3A9B3740 5
+. 83 C6 04 FF D0
+
+==== BB 1161 _IO_check_libio(0x3A9FE7B0) in 21593B, out 119550B, BBs exec'd 0 ====
+ 0x3A9FE7B0: pushl %ebp
+ 0x3A9FE7B1: movl %esp,%ebp
+ 0x3A9FE7B3: subl $0x8, %esp
+ 0x3A9FE7B6: movl %ebx,(%esp,,)
+ 0x3A9FE7B9: call 0x3A9B3791
+. 1161 3A9FE7B0 14
+. 55 89 E5 83 EC 08 89 1C 24 E8 D3 4F FB FF
+
+==== BB 1162 (0x3A9FE7BE) in 21607B, out 119645B, BBs exec'd 0 ====
+ 0x3A9FE7BE: addl $0xB1852, %ebx
+ 0x3A9FE7C4: movl %esi,4(%esp,,)
+ 0x3A9FE7C8: movl 0x238(%ebx),%eax
+ 0x3A9FE7CE: testl %eax,%eax
+ 0x3A9FE7D0: jnz-8 0x3A9FE820
+. 1162 3A9FE7BE 20
+. 81 C3 52 18 0B 00 89 74 24 04 8B 83 38 02 00 00 85 C0 75 4E
+
+==== BB 1163 (0x3A9FE820) in 21627B, out 119749B, BBs exec'd 0 ====
+ 0x3A9FE820: movl (%esp,,),%ebx
+ 0x3A9FE823: movl 4(%esp,,),%esi
+ 0x3A9FE827: movl %ebp,%esp
+ 0x3A9FE829: popl %ebp
+ 0x3A9FE82A: ret
+. 1163 3A9FE820 11
+. 8B 1C 24 8B 74 24 04 89 EC 5D C3
+
+==== BB 1164 (0x3A9B3745) in 21638B, out 119826B, BBs exec'd 0 ====
+ 0x3A9B3745: movl (%esi),%eax
+ 0x3A9B3747: testl %eax,%eax
+ 0x3A9B3749: jnz-8 0x3A9B3740
+. 1164 3A9B3745 6
+. 8B 06 85 C0 75 F5
+
+==== BB 1165 (0x3A9B374B) in 21644B, out 119895B, BBs exec'd 0 ====
+ 0x3A9B374B: popl %ebx
+ 0x3A9B374C: popl %esi
+ 0x3A9B374D: popl %ebp
+ 0x3A9B374E: movl %esi,%esi
+ 0x3A9B3750: ret
+. 1165 3A9B374B 6
+. 5B 5E 5D 89 F6 C3
+
+==== BB 1166 (0x3A9B385F) in 21650B, out 119977B, BBs exec'd 0 ====
+ 0x3A9B385F: movl -12(%ebp),%ebx
+ 0x3A9B3862: movl -8(%ebp),%esi
+ 0x3A9B3865: movl -4(%ebp),%edi
+ 0x3A9B3868: movl %ebp,%esp
+ 0x3A9B386A: popl %ebp
+ 0x3A9B386B: ret
+. 1166 3A9B385F 13
+. 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 1167 (0x3A97063E) in 21663B, out 120069B, BBs exec'd 0 ====
+ 0x3A97063E: testb $0x3, %dl
+ 0x3A970641: jz-32 0x3A9705C0
+. 1167 3A97063E 9
+. F6 C2 03 0F 84 79 FF FF FF
+
+==== BB 1168 (0x3A970729) in 21672B, out 120131B, BBs exec'd 0 ====
+ 0x3A970729: movl -28(%ebp),%eax
+ 0x3A97072C: movl $0x0, 12(%eax)
+ 0x3A970733: call 0x3A970B70
+. 1168 3A970729 15
+. 8B 45 E4 C7 40 0C 00 00 00 00 E8 38 04 00 00
+
+==== BB 1169 (0x3A970738) in 21687B, out 120207B, BBs exec'd 0 ====
+ 0x3A970738: xorl %eax, %eax
+ 0x3A97073A: movl %eax,0x34(%ebx)
+ 0x3A970740: addl $0x2C, %esp
+ 0x3A970743: popl %ebx
+ 0x3A970744: popl %esi
+ 0x3A970745: popl %edi
+ 0x3A970746: popl %ebp
+ 0x3A970747: ret 4
+. 1169 3A970738 18
+. 31 C0 89 83 34 00 00 00 83 C4 2C 5B 5E 5F 5D C2 04 00
+
+==== BB 1170 (0x3A9658B5) in 21705B, out 120340B, BBs exec'd 0 ====
+ 0x3A9658B5: leal 0xFFFF8194(%ebx), %edx
+ 0x3A9658BB: jmp*l %edi
+. 1170 3A9658B5 8
+. 8D 93 94 81 FF FF FF E7
+
+==== BB 1171 (0x80482A0) in 21713B, out 120377B, BBs exec'd 0 ====
+ 0x80482A0: xorl %ebp, %ebp
+ 0x80482A2: popl %esi
+ 0x80482A3: movl %esp,%ecx
+ 0x80482A5: andl $0xFFFFFFF0, %esp
+ 0x80482A8: pushl %eax
+ 0x80482A9: pushl %esp
+ 0x80482AA: pushl %edx
+ 0x80482AB: pushl $0x8048370
+ 0x80482B0: pushl $0x80483E0
+ 0x80482B5: pushl %ecx
+ 0x80482B6: pushl %esi
+ 0x80482B7: pushl $0x804835C
+ 0x80482BC: call 0x804828C
+. 1171 80482A0 33
+. 31 ED 5E 89 E1 83 E4 F0 50 54 52 68 70 83 04 08 68 E0 83 04 08 51 56 68 5C 83 04 08 E8 CB FF FF FF
+
+==== BB 1172 (0x804828C) in 21746B, out 120608B, BBs exec'd 0 ====
+ 0x804828C: jmp*l (0x8049580)
+. 1172 804828C 6
+. FF 25 80 95 04 08
+
+==== BB 1173 (0x8048292) in 21752B, out 120634B, BBs exec'd 0 ====
+ 0x8048292: pushl $0x0
+ 0x8048297: jmp 0x804827C
+. 1173 8048292 10
+. 68 00 00 00 00 E9 E0 FF FF FF
+
+==== BB 1174 (0x804827C) in 21762B, out 120683B, BBs exec'd 0 ====
+ 0x804827C: pushl (0x8049578)
+ 0x8048282: jmp*l (0x804957C)
+. 1174 804827C 12
+. FF 35 78 95 04 08 FF 25 7C 95 04 08
+
+==== BB 1175 __libc_start_main(0x3A9B3870) in 21774B, out 120733B, BBs exec'd 0 ====
+ 0x3A9B3870: pushl %ebp
+ 0x3A9B3871: xorl %ecx, %ecx
+ 0x3A9B3873: movl %esp,%ebp
+ 0x3A9B3875: pushl %edi
+ 0x3A9B3876: pushl %esi
+ 0x3A9B3877: pushl %ebx
+ 0x3A9B3878: subl $0xC, %esp
+ 0x3A9B387B: movl 12(%ebp),%eax
+ 0x3A9B387E: movl 16(%ebp),%edi
+ 0x3A9B3881: call 0x3A9B3791
+. 1175 3A9B3870 22
+. 55 31 C9 89 E5 57 56 53 83 EC 0C 8B 45 0C 8B 7D 10 E8 0B FF FF FF
+
+==== BB 1176 (0x3A9B3886) in 21796B, out 120906B, BBs exec'd 0 ====
+ 0x3A9B3886: addl $0xFC78A, %ebx
+ 0x3A9B388C: movl 28(%ebp),%esi
+ 0x3A9B388F: leal 4(%edi,%eax,4), %edx
+ 0x3A9B3893: movl 0xA4(%ebx),%eax
+ 0x3A9B3899: testl %eax,%eax
+ 0x3A9B389B: jz-8 0x3A9B38B0
+. 1176 3A9B3886 23
+. 81 C3 8A C7 0F 00 8B 75 1C 8D 54 87 04 8B 83 A4 00 00 00 85 C0 74 13
+
+==== BB 1177 (0x3A9B389D) in 21819B, out 121027B, BBs exec'd 0 ====
+ 0x3A9B389D: movl (%eax),%eax
+ 0x3A9B389F: testl %eax,%eax
+ 0x3A9B38A1: jnz-8 0x3A9B38B0
+. 1177 3A9B389D 6
+. 8B 00 85 C0 75 0D
+
+==== BB 1178 (0x3A9B38A3) in 21825B, out 121096B, BBs exec'd 0 ====
+ 0x3A9B38A3: movl $0x1,%ecx
+ 0x3A9B38A8: nop
+ 0x3A9B38A9: leal 0(%esi,,), %esi
+ 0x3A9B38B0: movl 0xB4(%ebx),%eax
+ 0x3A9B38B6: testl %esi,%esi
+ 0x3A9B38B8: movl %ecx,(%eax)
+ 0x3A9B38BA: movl 0x13C(%ebx),%eax
+ 0x3A9B38C0: movl %edx,(%eax)
+ 0x3A9B38C2: jz-8 0x3A9B38D8
+. 1178 3A9B38A3 33
+. B9 01 00 00 00 90 8D B4 26 00 00 00 00 8B 83 B4 00 00 00 85 F6 89 08 8B 83 3C 01 00 00 89 10 74 14
+
+==== BB 1179 (0x3A9B38C4) in 21858B, out 121230B, BBs exec'd 0 ====
+ 0x3A9B38C4: movl %esi,(%esp,,)
+ 0x3A9B38C7: xorl %eax, %eax
+ 0x3A9B38C9: movl %eax,8(%esp,,)
+ 0x3A9B38CD: xorl %eax, %eax
+ 0x3A9B38CF: movl %eax,4(%esp,,)
+ 0x3A9B38D3: call 0x3A9C8E60
+. 1179 3A9B38C4 20
+. 89 34 24 31 C0 89 44 24 08 31 C0 89 44 24 04 E8 88 55 01 00
+
+==== BB 1180 __cxa_atexit_internal(0x3A9C8E60) in 21878B, out 121334B, BBs exec'd 0 ====
+ 0x3A9C8E60: pushl %ebp
+ 0x3A9C8E61: movl %esp,%ebp
+ 0x3A9C8E63: pushl %ebx
+ 0x3A9C8E64: call 0x3A9B3791
+. 1180 3A9C8E60 9
+. 55 89 E5 53 E8 28 A9 FE FF
+
+==== BB 1181 (0x3A9C8E69) in 21887B, out 121421B, BBs exec'd 0 ====
+ 0x3A9C8E69: addl $0xE71A7, %ebx
+ 0x3A9C8E6F: call 0x3A9C8D70
+. 1181 3A9C8E69 11
+. 81 C3 A7 71 0E 00 E8 FC FE FF FF
+
+==== BB 1182 __new_exitfn(0x3A9C8D70) in 21898B, out 121486B, BBs exec'd 0 ====
+ 0x3A9C8D70: pushl %ebp
+ 0x3A9C8D71: movl %esp,%ebp
+ 0x3A9C8D73: pushl %edi
+ 0x3A9C8D74: xorl %edi, %edi
+ 0x3A9C8D76: pushl %esi
+ 0x3A9C8D77: pushl %ebx
+ 0x3A9C8D78: subl $0x4, %esp
+ 0x3A9C8D7B: call 0x3A9B3791
+. 1182 3A9C8D70 16
+. 55 89 E5 57 31 FF 56 53 83 EC 04 E8 11 AA FE FF
+
+==== BB 1183 (0x3A9C8D80) in 21914B, out 121633B, BBs exec'd 0 ====
+ 0x3A9C8D80: addl $0xE7290, %ebx
+ 0x3A9C8D86: movl 0x2B3C(%ebx),%edx
+ 0x3A9C8D8C: testl %edx,%edx
+ 0x3A9C8D8E: jnz-32 0x3A9C8E34
+. 1183 3A9C8D80 20
+. 81 C3 90 72 0E 00 8B 93 3C 2B 00 00 85 D2 0F 85 A0 00 00 00
+
+==== BB 1184 (0x3A9C8D94) in 21934B, out 121721B, BBs exec'd 0 ====
+ 0x3A9C8D94: movl 0xFFFF9EBC(%ebx),%esi
+ 0x3A9C8D9A: testl %esi,%esi
+ 0x3A9C8D9C: jz-8 0x3A9C8DC9
+. 1184 3A9C8D94 10
+. 8B B3 BC 9E FF FF 85 F6 74 2B
+
+==== BB 1185 (0x3A9C8D9E) in 21944B, out 121796B, BBs exec'd 0 ====
+ 0x3A9C8D9E: movl %esi,%esi
+ 0x3A9C8DA0: movl 4(%esi),%edx
+ 0x3A9C8DA3: xorl %edi, %edi
+ 0x3A9C8DA5: cmpl %edx,%edi
+ 0x3A9C8DA7: jnb-8 0x3A9C8DBE
+. 1185 3A9C8D9E 11
+. 89 F6 8B 56 04 31 FF 39 D7 73 15
+
+==== BB 1186 (0x3A9C8DBE) in 21955B, out 121886B, BBs exec'd 0 ====
+ 0x3A9C8DBE: cmpl $0x1F, %edx
+ 0x3A9C8DC1: jbe-8 0x3A9C8DFD
+. 1186 3A9C8DBE 5
+. 83 FA 1F 76 3A
+
+==== BB 1187 (0x3A9C8DFD) in 21960B, out 121943B, BBs exec'd 0 ====
+ 0x3A9C8DFD: leal 1(%edx), %eax
+ 0x3A9C8E00: movl %edx,%edi
+ 0x3A9C8E02: movl %eax,4(%esi)
+ 0x3A9C8E05: testl %esi,%esi
+ 0x3A9C8E07: jz-8 0x3A9C8DC9
+. 1187 3A9C8DFD 12
+. 8D 42 01 89 D7 89 46 04 85 F6 74 C0
+
+==== BB 1188 (0x3A9C8E09) in 21972B, out 122035B, BBs exec'd 0 ====
+ 0x3A9C8E09: movl %edi,%eax
+ 0x3A9C8E0B: movl $0x1,%ecx
+ 0x3A9C8E10: shll $0x4, %eax
+ 0x3A9C8E13: movl %ecx,8(%esi,%eax,1)
+ 0x3A9C8E17: movl 0x2B44(%ebx),%edx
+ 0x3A9C8E1D: testl %edx,%edx
+ 0x3A9C8E1F: jnz-8 0x3A9C8E44
+. 1188 3A9C8E09 24
+. 89 F8 B9 01 00 00 00 C1 E0 04 89 4C 06 08 8B 93 44 2B 00 00 85 D2 75 23
+
+==== BB 1189 (0x3A9C8E21) in 21996B, out 122153B, BBs exec'd 0 ====
+ 0x3A9C8E21: xorl %eax, %eax
+ 0x3A9C8E23: testl %esi,%esi
+ 0x3A9C8E25: jz-8 0x3A9C8E2E
+. 1189 3A9C8E21 6
+. 31 C0 85 F6 74 07
+
+==== BB 1190 (0x3A9C8E27) in 22002B, out 122226B, BBs exec'd 0 ====
+ 0x3A9C8E27: shll $0x4, %edi
+ 0x3A9C8E2A: leal 8(%edi,%esi,1), %eax
+ 0x3A9C8E2E: popl %edx
+ 0x3A9C8E2F: popl %ebx
+ 0x3A9C8E30: popl %esi
+ 0x3A9C8E31: popl %edi
+ 0x3A9C8E32: popl %ebp
+ 0x3A9C8E33: ret
+. 1190 3A9C8E27 13
+. C1 E7 04 8D 44 37 08 5A 5B 5E 5F 5D C3
+
+==== BB 1191 (0x3A9C8E74) in 22015B, out 122362B, BBs exec'd 0 ====
+ 0x3A9C8E74: movl %eax,%edx
+ 0x3A9C8E76: testl %edx,%edx
+ 0x3A9C8E78: movl $0xFFFFFFFF,%eax
+ 0x3A9C8E7D: jz-8 0x3A9C8E99
+. 1191 3A9C8E74 11
+. 89 C2 85 D2 B8 FF FF FF FF 74 1A
+
+==== BB 1192 (0x3A9C8E7F) in 22026B, out 122440B, BBs exec'd 0 ====
+ 0x3A9C8E7F: movl $0x4, (%edx)
+ 0x3A9C8E85: movl 8(%ebp),%eax
+ 0x3A9C8E88: movl %eax,4(%edx)
+ 0x3A9C8E8B: movl 12(%ebp),%eax
+ 0x3A9C8E8E: movl %eax,8(%edx)
+ 0x3A9C8E91: movl 16(%ebp),%eax
+ 0x3A9C8E94: movl %eax,12(%edx)
+ 0x3A9C8E97: xorl %eax, %eax
+ 0x3A9C8E99: popl %ebx
+ 0x3A9C8E9A: popl %ebp
+ 0x3A9C8E9B: ret
+. 1192 3A9C8E7F 29
+. C7 02 04 00 00 00 8B 45 08 89 42 04 8B 45 0C 89 42 08 8B 45 10 89 42 0C 31 C0 5B 5D C3
+
+==== BB 1193 (0x3A9B38D8) in 22055B, out 122598B, BBs exec'd 0 ====
+ 0x3A9B38D8: movl 24(%ebp),%esi
+ 0x3A9B38DB: testl %esi,%esi
+ 0x3A9B38DD: jz-8 0x3A9B38F6
+. 1193 3A9B38D8 7
+. 8B 75 18 85 F6 74 17
+
+==== BB 1194 (0x3A9B38DF) in 22062B, out 122670B, BBs exec'd 0 ====
+ 0x3A9B38DF: xorl %edx, %edx
+ 0x3A9B38E1: xorl %ecx, %ecx
+ 0x3A9B38E3: movl %ecx,8(%esp,,)
+ 0x3A9B38E7: movl %edx,4(%esp,,)
+ 0x3A9B38EB: movl 24(%ebp),%edx
+ 0x3A9B38EE: movl %edx,(%esp,,)
+ 0x3A9B38F1: call 0x3A9C8E60
+. 1194 3A9B38DF 23
+. 31 D2 31 C9 89 4C 24 08 89 54 24 04 8B 55 18 89 14 24 E8 6A 55 01 00
+
+==== BB 1195 (0x3A9C8DA9) in 22085B, out 122787B, BBs exec'd 0 ====
+ 0x3A9C8DA9: leal 8(%esi), %eax
+ 0x3A9C8DAC: leal 0(%esi,,), %esi
+ 0x3A9C8DB0: movl (%eax),%ecx
+ 0x3A9C8DB2: testl %ecx,%ecx
+ 0x3A9C8DB4: jz-8 0x3A9C8DF4
+. 1195 3A9C8DA9 13
+. 8D 46 08 8D 74 26 00 8B 08 85 C9 74 3E
+
+==== BB 1196 (0x3A9C8DB6) in 22098B, out 122876B, BBs exec'd 0 ====
+ 0x3A9C8DB6: incl %edi
+ 0x3A9C8DB7: addl $0x10, %eax
+ 0x3A9C8DBA: cmpl %edx,%edi
+ 0x3A9C8DBC: jb-8 0x3A9C8DB0
+. 1196 3A9C8DB6 8
+. 47 83 C0 10 39 D7 72 F2
+
+==== BB 1197 (0x3A9B38F6) in 22106B, out 122954B, BBs exec'd 0 ====
+ 0x3A9B38F6: movl 0x168(%ebx),%esi
+ 0x3A9B38FC: testb $0x2, (%esi)
+ 0x3A9B38FF: jnz-8 0x3A9B3933
+. 1197 3A9B38F6 11
+. 8B B3 68 01 00 00 F6 06 02 75 32
+
+==== BB 1198 (0x3A9B3901) in 22117B, out 123038B, BBs exec'd 0 ====
+ 0x3A9B3901: movl 20(%ebp),%eax
+ 0x3A9B3904: testl %eax,%eax
+ 0x3A9B3906: jz-8 0x3A9B390B
+. 1198 3A9B3901 7
+. 8B 45 14 85 C0 74 03
+
+==== BB 1199 (0x3A9B3908) in 22124B, out 123110B, BBs exec'd 0 ====
+ 0x3A9B3908: call*l 20(%ebp)
+. 1199 3A9B3908 3
+. FF 55 14
+
+==== BB 1200 __libc_csu_init(0x80483E0) in 22127B, out 123154B, BBs exec'd 0 ====
+ 0x80483E0: pushl %ebp
+ 0x80483E1: movl %esp,%ebp
+ 0x80483E3: subl $0x18, %esp
+ 0x80483E6: movl %ebx,-12(%ebp)
+ 0x80483E9: movl %esi,-8(%ebp)
+ 0x80483EC: xorl %esi, %esi
+ 0x80483EE: call 0x8048438
+. 1200 80483E0 19
+. 55 89 E5 83 EC 18 89 5D F4 89 75 F8 31 F6 E8 45 00 00 00
+
+==== BB 1201 (0x8048438) in 22146B, out 123279B, BBs exec'd 0 ====
+ 0x8048438: movl (%esp,,),%ebx
+ 0x804843B: ret
+. 1201 8048438 4
+. 8B 1C 24 C3
+
+==== BB 1202 (0x80483F3) in 22150B, out 123319B, BBs exec'd 0 ====
+ 0x80483F3: addl $0x1181, %ebx
+ 0x80483F9: movl %edi,-4(%ebp)
+ 0x80483FC: call 0x8048264
+. 1202 80483F3 14
+. 81 C3 81 11 00 00 89 7D FC E8 63 FE FF FF
+
+==== BB 1203 (0x8048264) in 22164B, out 123400B, BBs exec'd 0 ====
+ 0x8048264: pushl %ebp
+ 0x8048265: movl %esp,%ebp
+ 0x8048267: subl $0x8, %esp
+ 0x804826A: call 0x80482C4
+. 1203 8048264 11
+. 55 89 E5 83 EC 08 E8 55 00 00 00
+
+==== BB 1204 (0x80482C4) in 22175B, out 123485B, BBs exec'd 0 ====
+ 0x80482C4: pushl %ebp
+ 0x80482C5: movl %esp,%ebp
+ 0x80482C7: pushl %ebx
+ 0x80482C8: call 0x80482CD ; popl %ebx
+ 0x80482CE: addl $0x12A7, %ebx
+ 0x80482D4: pushl %edx
+ 0x80482D5: movl 0x10(%ebx),%eax
+ 0x80482DB: testl %eax,%eax
+ 0x80482DD: jz-8 0x80482E1
+. 1204 80482C4 27
+. 55 89 E5 53 E8 00 00 00 00 5B 81 C3 A7 12 00 00 52 8B 83 10 00 00 00 85 C0 74 02
+
+==== BB 1205 (0x80482E1) in 22202B, out 123637B, BBs exec'd 0 ====
+ 0x80482E1: popl %eax
+ 0x80482E2: popl %ebx
+ 0x80482E3: leave 0x80482E4: ret
+. 1205 80482E1 4
+. 58 5B C9 C3
+
+==== BB 1206 (0x804826F) in 22206B, out 123721B, BBs exec'd 0 ====
+ 0x804826F: call 0x8048330
+. 1206 804826F 5
+. E8 BC 00 00 00
+
+==== BB 1207 (0x8048330) in 22211B, out 123766B, BBs exec'd 0 ====
+ 0x8048330: pushl %ebp
+ 0x8048331: movl %esp,%ebp
+ 0x8048333: pushl %ecx
+ 0x8048334: pushl %ecx
+ 0x8048335: movl (0x8049570),%edx
+ 0x804833B: testl %edx,%edx
+ 0x804833D: jz-8 0x8048358
+. 1207 8048330 15
+. 55 89 E5 51 51 8B 15 70 95 04 08 85 D2 74 19
+
+==== BB 1208 (0x8048358) in 22226B, out 123895B, BBs exec'd 0 ====
+ 0x8048358: leave 0x8048359: ret
+. 1208 8048358 2
+. C9 C3
+
+==== BB 1209 (0x8048274) in 22228B, out 123944B, BBs exec'd 0 ====
+ 0x8048274: call 0x8048440
+. 1209 8048274 5
+. E8 C7 01 00 00
+
+==== BB 1210 (0x8048440) in 22233B, out 123989B, BBs exec'd 0 ====
+ 0x8048440: pushl %ebp
+ 0x8048441: movl %esp,%ebp
+ 0x8048443: pushl %ebx
+ 0x8048444: pushl %edx
+ 0x8048445: movl $0x8049560,%ebx
+ 0x804844A: movl 0x8049560, %eax
+ 0x804844F: cmpl $0xFFFFFFFF, %eax
+ 0x8048452: jz-8 0x8048460
+. 1210 8048440 20
+. 55 89 E5 53 52 BB 60 95 04 08 A1 60 95 04 08 83 F8 FF 74 0C
+
+==== BB 1211 (0x8048460) in 22253B, out 124131B, BBs exec'd 0 ====
+ 0x8048460: popl %eax
+ 0x8048461: popl %ebx
+ 0x8048462: popl %ebp
+ 0x8048463: ret
+. 1211 8048460 4
+. 58 5B 5D C3
+
+==== BB 1212 (0x8048279) in 22257B, out 124209B, BBs exec'd 0 ====
+ 0x8048279: leave 0x804827A: ret
+. 1212 8048279 2
+. C9 C3
+
+==== BB 1213 (0x8048401) in 22259B, out 124258B, BBs exec'd 0 ====
+ 0x8048401: leal 0xFFFFFF14(%ebx), %edx
+ 0x8048407: leal 0xFFFFFF14(%ebx), %eax
+ 0x804840D: subl %eax,%edx
+ 0x804840F: sarl $0x2, %edx
+ 0x8048412: cmpl %edx,%esi
+ 0x8048414: jnb-8 0x804842B
+. 1213 8048401 21
+. 8D 93 14 FF FF FF 8D 83 14 FF FF FF 29 C2 C1 FA 02 39 D6 73 15
+
+==== BB 1214 (0x804842B) in 22280B, out 124356B, BBs exec'd 0 ====
+ 0x804842B: movl -12(%ebp),%ebx
+ 0x804842E: movl -8(%ebp),%esi
+ 0x8048431: movl -4(%ebp),%edi
+ 0x8048434: movl %ebp,%esp
+ 0x8048436: popl %ebp
+ 0x8048437: ret
+. 1214 804842B 13
+. 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 1215 (0x3A9B390B) in 22293B, out 124448B, BBs exec'd 0 ====
+ 0x3A9B390B: testb $0x2, (%esi)
+ 0x3A9B390E: movl %esi,%esi
+ 0x3A9B3910: jnz-8 0x3A9B394A
+. 1215 3A9B390B 7
+. F6 06 02 89 F6 75 38
+
+==== BB 1216 (0x3A9B3912) in 22300B, out 124519B, BBs exec'd 0 ====
+ 0x3A9B3912: movl 0x13C(%ebx),%edx
+ 0x3A9B3918: movl (%edx),%eax
+ 0x3A9B391A: movl %edi,4(%esp,,)
+ 0x3A9B391E: movl %eax,8(%esp,,)
+ 0x3A9B3922: movl 12(%ebp),%eax
+ 0x3A9B3925: movl %eax,(%esp,,)
+ 0x3A9B3928: call*l 8(%ebp)
+. 1216 3A9B3912 25
+. 8B 93 3C 01 00 00 8B 02 89 7C 24 04 89 44 24 08 8B 45 0C 89 04 24 FF 55 08
+
+==== BB 1217 main(0x804835C) in 22325B, out 124630B, BBs exec'd 0 ====
+ 0x804835C: pushl %ebp
+ 0x804835D: movl %esp,%ebp
+ 0x804835F: subl $0x8, %esp
+ 0x8048362: andl $0xFFFFFFF0, %esp
+ 0x8048365: movl $0x2A,%eax
+ 0x804836A: leave 0x804836B: ret
+. 1217 804835C 16
+. 55 89 E5 83 EC 08 83 E4 F0 B8 2A 00 00 00 C9 C3
+
+==== BB 1218 (0x3A9B392B) in 22341B, out 124740B, BBs exec'd 0 ====
+ 0x3A9B392B: movl %eax,(%esp,,)
+ 0x3A9B392E: call 0x3A9C8C50
+. 1218 3A9B392B 8
+. 89 04 24 E8 1D 53 01 00
+
+==== BB 1219 exit(0x3A9C8C50) in 22349B, out 124795B, BBs exec'd 0 ====
+ 0x3A9C8C50: pushl %ebp
+ 0x3A9C8C51: movl %esp,%ebp
+ 0x3A9C8C53: pushl %edi
+ 0x3A9C8C54: pushl %esi
+ 0x3A9C8C55: pushl %ebx
+ 0x3A9C8C56: subl $0xC, %esp
+ 0x3A9C8C59: call 0x3A9B3791
+. 1219 3A9C8C50 14
+. 55 89 E5 57 56 53 83 EC 0C E8 33 AB FE FF
+
+==== BB 1220 (0x3A9C8C5E) in 22363B, out 124928B, BBs exec'd 0 ====
+ 0x3A9C8C5E: addl $0xE73B2, %ebx
+ 0x3A9C8C64: movl 0xFFFF9EBC(%ebx),%edx
+ 0x3A9C8C6A: testl %edx,%edx
+ 0x3A9C8C6C: jz-8 0x3A9C8CDD
+. 1220 3A9C8C5E 16
+. 81 C3 B2 73 0E 00 8B 93 BC 9E FF FF 85 D2 74 6F
+
+==== BB 1221 (0x3A9C8C6E) in 22379B, out 125016B, BBs exec'd 0 ====
+ 0x3A9C8C6E: movl %esi,%esi
+ 0x3A9C8C70: movl 4(%edx),%eax
+ 0x3A9C8C73: testl %eax,%eax
+ 0x3A9C8C75: jz-8 0x3A9C8CBD
+. 1221 3A9C8C6E 9
+. 89 F6 8B 42 04 85 C0 74 46
+
+==== BB 1222 (0x3A9C8C77) in 22388B, out 125098B, BBs exec'd 0 ====
+ 0x3A9C8C77: movl %esi,%esi
+ 0x3A9C8C79: leal 0(%edi,,), %edi
+ 0x3A9C8C80: decl %eax
+ 0x3A9C8C81: movl %eax,4(%edx)
+ 0x3A9C8C84: shll $0x4, %eax
+ 0x3A9C8C87: leal (%eax,%edx,1), %eax
+ 0x3A9C8C8A: leal 8(%eax), %ecx
+ 0x3A9C8C8D: movl 8(%eax),%eax
+ 0x3A9C8C90: cmpl $0x4, %eax
+ 0x3A9C8C93: jnbe-8 0x3A9C8CB6
+. 1222 3A9C8C77 30
+. 89 F6 8D BC 27 00 00 00 00 48 89 42 04 C1 E0 04 8D 04 10 8D 48 08 8B 40 08 83 F8 04 77 21
+
+==== BB 1223 (0x3A9C8C95) in 22418B, out 125234B, BBs exec'd 0 ====
+ 0x3A9C8C95: movl -75896(%ebx,%eax,4),%eax
+ 0x3A9C8C9C: addl %ebx,%eax
+ 0x3A9C8C9E: jmp*l %eax
+. 1223 3A9C8C95 11
+. 8B 84 83 88 D7 FE FF 01 D8 FF E0
+
+==== BB 1224 (0x3A9C8CA0) in 22429B, out 125285B, BBs exec'd 0 ====
+ 0x3A9C8CA0: movl 8(%ebp),%eax
+ 0x3A9C8CA3: movl %eax,4(%esp,,)
+ 0x3A9C8CA7: movl 8(%ecx),%eax
+ 0x3A9C8CAA: movl %eax,(%esp,,)
+ 0x3A9C8CAD: call*l 4(%ecx)
+. 1224 3A9C8CA0 16
+. 8B 45 08 89 44 24 04 8B 41 08 89 04 24 FF 51 04
+
+==== BB 1225 __libc_csu_fini(0x8048370) in 22445B, out 125372B, BBs exec'd 0 ====
+ 0x8048370: pushl %ebp
+ 0x8048371: movl %esp,%ebp
+ 0x8048373: subl $0x18, %esp
+ 0x8048376: movl %ebx,-12(%ebp)
+ 0x8048379: call 0x8048438
+. 1225 8048370 14
+. 55 89 E5 83 EC 18 89 5D F4 E8 BA 00 00 00
+
+==== BB 1226 (0x804837E) in 22459B, out 125470B, BBs exec'd 0 ====
+ 0x804837E: addl $0x11F6, %ebx
+ 0x8048384: movl %edi,-4(%ebp)
+ 0x8048387: leal 0xFFFFFF14(%ebx), %eax
+ 0x804838D: leal 0xFFFFFF14(%ebx), %edi
+ 0x8048393: movl %esi,-8(%ebp)
+ 0x8048396: subl %edi,%eax
+ 0x8048398: sarl $0x2, %eax
+ 0x804839B: testl %eax,%eax
+ 0x804839D: leal -1(%eax), %esi
+ 0x80483A0: jnz-8 0x80483B4
+. 1226 804837E 36
+. 81 C3 F6 11 00 00 89 7D FC 8D 83 14 FF FF FF 8D BB 14 FF FF FF 89 75 F8 29 F8 C1 F8 02 85 C0 8D 70 FF 75 12
+
+==== BB 1227 (0x80483A2) in 22495B, out 125620B, BBs exec'd 0 ====
+ 0x80483A2: call 0x8048464
+. 1227 80483A2 5
+. E8 BD 00 00 00
+
+==== BB 1228 (0x8048464) in 22500B, out 125665B, BBs exec'd 0 ====
+ 0x8048464: pushl %ebp
+ 0x8048465: movl %esp,%ebp
+ 0x8048467: pushl %ebx
+ 0x8048468: call 0x804846D ; popl %ebx
+ 0x804846E: addl $0x1107, %ebx
+ 0x8048474: pushl %eax
+ 0x8048475: call 0x80482F0
+. 1228 8048464 22
+. 55 89 E5 53 E8 00 00 00 00 5B 81 C3 07 11 00 00 50 E8 76 FE FF FF
+
+==== BB 1229 (0x80482F0) in 22522B, out 125794B, BBs exec'd 0 ====
+ 0x80482F0: pushl %ebp
+ 0x80482F1: movl %esp,%ebp
+ 0x80482F3: pushl %eax
+ 0x80482F4: pushl %eax
+ 0x80482F5: cmpb $0x0, (0x8049588)
+ 0x80482FC: jnz-8 0x804832C
+. 1229 80482F0 14
+. 55 89 E5 50 50 80 3D 88 95 04 08 00 75 2E
+
+==== BB 1230 (0x80482FE) in 22536B, out 125916B, BBs exec'd 0 ====
+ 0x80482FE: movl 0x8049490, %eax
+ 0x8048303: movl (%eax),%edx
+ 0x8048305: testl %edx,%edx
+ 0x8048307: jz-8 0x8048325
+. 1230 80482FE 11
+. A1 90 94 04 08 8B 10 85 D2 74 1C
+
+==== BB 1231 (0x8048325) in 22547B, out 126000B, BBs exec'd 0 ====
+ 0x8048325: movb $0x1, (0x8049588)
+ 0x804832C: leave 0x804832D: ret
+. 1231 8048325 9
+. C6 05 88 95 04 08 01 C9 C3
+
+==== BB 1232 (0x804847A) in 22556B, out 126065B, BBs exec'd 0 ====
+ 0x804847A: popl %ecx
+ 0x804847B: popl %ebx
+ 0x804847C: leave 0x804847D: ret
+. 1232 804847A 4
+. 59 5B C9 C3
+
+==== BB 1233 (0x80483A7) in 22560B, out 126149B, BBs exec'd 0 ====
+ 0x80483A7: movl -12(%ebp),%ebx
+ 0x80483AA: movl -8(%ebp),%esi
+ 0x80483AD: movl -4(%ebp),%edi
+ 0x80483B0: movl %ebp,%esp
+ 0x80483B2: popl %ebp
+ 0x80483B3: ret
+. 1233 80483A7 13
+. 8B 5D F4 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+==== BB 1234 (0x3A9C8CB0) in 22573B, out 126241B, BBs exec'd 0 ====
+ 0x3A9C8CB0: movl 0xFFFF9EBC(%ebx),%edx
+ 0x3A9C8CB6: movl 4(%edx),%eax
+ 0x3A9C8CB9: testl %eax,%eax
+ 0x3A9C8CBB: jnz-8 0x3A9C8C80
+. 1234 3A9C8CB0 13
+. 8B 93 BC 9E FF FF 8B 42 04 85 C0 75 C3
+
+==== BB 1235 (0x3A9C8C80) in 22586B, out 126329B, BBs exec'd 0 ====
+ 0x3A9C8C80: decl %eax
+ 0x3A9C8C81: movl %eax,4(%edx)
+ 0x3A9C8C84: shll $0x4, %eax
+ 0x3A9C8C87: leal (%eax,%edx,1), %eax
+ 0x3A9C8C8A: leal 8(%eax), %ecx
+ 0x3A9C8C8D: movl 8(%eax),%eax
+ 0x3A9C8C90: cmpl $0x4, %eax
+ 0x3A9C8C93: jnbe-8 0x3A9C8CB6
+. 1235 3A9C8C80 21
+. 48 89 42 04 C1 E0 04 8D 04 10 8D 48 08 8B 40 08 83 F8 04 77 21
+
+==== BB 1236 _dl_fini(0x3A970800) in 22607B, out 126442B, BBs exec'd 0 ====
+ 0x3A970800: pushl %ebp
+ 0x3A970801: movl %esp,%ebp
+ 0x3A970803: pushl %edi
+ 0x3A970804: pushl %esi
+ 0x3A970805: pushl %ebx
+ 0x3A970806: subl $0x4C, %esp
+ 0x3A970809: call 0x3A97592B
+. 1236 3A970800 14
+. 55 89 E5 57 56 53 83 EC 4C E8 1D 51 00 00
+
+==== BB 1237 (0x3A97080E) in 22621B, out 126575B, BBs exec'd 0 ====
+ 0x3A97080E: addl $0x7E5E, %ebx
+ 0x3A970814: leal 0xFFFFF9AC(%ebx), %eax
+ 0x3A97081A: movl %eax,-52(%ebp)
+ 0x3A97081D: movl %eax,(%esp,,)
+ 0x3A970820: call*l 0xFFFFFBF8(%ebx)
+. 1237 3A97080E 24
+. 81 C3 5E 7E 00 00 8D 83 AC F9 FF FF 89 45 CC 89 04 24 FF 93 F8 FB FF FF
+
+==== BB 1238 rtld_lock_default_lock_recursive(0x3A9658E0) in 22645B, out 126670B, BBs exec'd 0 ====
+ 0x3A9658E0: pushl %ebp
+ 0x3A9658E1: movl %esp,%ebp
+ 0x3A9658E3: movl 8(%ebp),%eax
+ 0x3A9658E6: incl 4(%eax)
+ 0x3A9658E9: popl %ebp
+ 0x3A9658EA: ret
+. 1238 3A9658E0 11
+. 55 89 E5 8B 45 08 FF 40 04 5D C3
+
+==== BB 1239 (0x3A970826) in 22656B, out 126774B, BBs exec'd 0 ====
+ 0x3A970826: movl $0x0, -16(%ebp)
+ 0x3A97082D: movl 0xFFFFF998(%ebx),%edx
+ 0x3A970833: movl 0xFFFFF994(%ebx),%edi
+ 0x3A970839: leal 0xF(,%edx,4), %eax
+ 0x3A970840: andl $0xFFFFFFF0, %eax
+ 0x3A970843: subl %eax,%esp
+ 0x3A970845: leal 12(%esp,,), %ecx
+ 0x3A970849: testl %edi,%edi
+ 0x3A97084B: movl %edi,%eax
+ 0x3A97084D: movl %ecx,-20(%ebp)
+ 0x3A970850: jz-8 0x3A970872
+. 1239 3A970826 44
+. C7 45 F0 00 00 00 00 8B 93 98 F9 FF FF 8B BB 94 F9 FF FF 8D 04 95 0F 00 00 00 83 E0 F0 29 C4 8D 4C 24 0C 85 FF 89 F8 89 4D EC 74 20
+
+==== BB 1240 (0x3A970852) in 22700B, out 126946B, BBs exec'd 0 ====
+ 0x3A970852: incl 0x170(%edi)
+ 0x3A970858: movl -16(%ebp),%esi
+ 0x3A97085B: movl -20(%ebp),%edx
+ 0x3A97085E: movl %edi,(%edx,%esi,4)
+ 0x3A970861: movl 12(%edi),%edi
+ 0x3A970864: incl %esi
+ 0x3A970865: movl %esi,-16(%ebp)
+ 0x3A970868: testl %edi,%edi
+ 0x3A97086A: jnz-8 0x3A970852
+. 1240 3A970852 26
+. FF 87 70 01 00 00 8B 75 F0 8B 55 EC 89 3C B2 8B 7F 0C 46 89 75 F0 85 FF 75 E6
+
+==== BB 1241 (0x3A97086C) in 22726B, out 127090B, BBs exec'd 0 ====
+ 0x3A97086C: movl 0xFFFFF998(%ebx),%edx
+ 0x3A970872: movl 12(%eax),%edi
+ 0x3A970875: testl %edi,%edi
+ 0x3A970877: jz-32 0x3A97098E
+. 1241 3A97086C 17
+. 8B 93 98 F9 FF FF 8B 78 0C 85 FF 0F 84 11 01 00 00
+
+==== BB 1242 (0x3A97087D) in 22743B, out 127181B, BBs exec'd 0 ====
+ 0x3A97087D: movl $0x1, -24(%ebp)
+ 0x3A970884: movl -20(%ebp),%ecx
+ 0x3A970887: cmpl %edi,4(%ecx)
+ 0x3A97088A: jz-8 0x3A97089E
+. 1242 3A97087D 15
+. C7 45 E8 01 00 00 00 8B 4D EC 39 79 04 74 12
+
+==== BB 1243 (0x3A97089E) in 22758B, out 127272B, BBs exec'd 0 ====
+ 0x3A97089E: movl -24(%ebp),%ecx
+ 0x3A9708A1: incl %ecx
+ 0x3A9708A2: cmpl %edx,%ecx
+ 0x3A9708A4: movl %ecx,-68(%ebp)
+ 0x3A9708A7: jnb-32 0x3A970983
+. 1243 3A97089E 15
+. 8B 4D E8 41 39 D1 89 4D BC 0F 83 D6 00 00 00
+
+==== BB 1244 (0x3A9708AD) in 22773B, out 127360B, BBs exec'd 0 ====
+ 0x3A9708AD: movl -24(%ebp),%eax
+ 0x3A9708B0: movl -20(%ebp),%esi
+ 0x3A9708B3: shll $0x2, %eax
+ 0x3A9708B6: movl %eax,-64(%ebp)
+ 0x3A9708B9: addl %eax,%esi
+ 0x3A9708BB: negl -64(%ebp)
+ 0x3A9708BE: movl %esi,-60(%ebp)
+ 0x3A9708C1: jmp-8 0x3A9708D0
+. 1244 3A9708AD 22
+. 8B 45 E8 8B 75 EC C1 E0 02 89 45 C0 01 C6 F7 5D C0 89 75 C4 EB 0D
+
+==== BB 1245 (0x3A9708D0) in 22795B, out 127469B, BBs exec'd 0 ====
+ 0x3A9708D0: movl -20(%ebp),%edx
+ 0x3A9708D3: movl -68(%ebp),%eax
+ 0x3A9708D6: movl (%edx,%eax,4),%eax
+ 0x3A9708D9: movl %eax,-48(%ebp)
+ 0x3A9708DC: movl 0x1D4(%eax),%edx
+ 0x3A9708E2: movl %eax,-28(%ebp)
+ 0x3A9708E5: testl %edx,%edx
+ 0x3A9708E7: jz-8 0x3A970960
+. 1245 3A9708D0 25
+. 8B 55 EC 8B 45 BC 8B 04 82 89 45 D0 8B 90 D4 01 00 00 89 45 E4 85 D2 74 77
+
+==== BB 1246 (0x3A9708E9) in 22820B, out 127598B, BBs exec'd 0 ====
+ 0x3A9708E9: movl (%edx),%eax
+ 0x3A9708EB: testl %eax,%eax
+ 0x3A9708ED: jz-8 0x3A970960
+. 1246 3A9708E9 6
+. 8B 02 85 C0 74 71
+
+==== BB 1247 (0x3A9708EF) in 22826B, out 127667B, BBs exec'd 0 ====
+ 0x3A9708EF: movl -20(%ebp),%esi
+ 0x3A9708F2: movl -24(%ebp),%ecx
+ 0x3A9708F5: leal (%esi,%ecx,4), %ecx
+ 0x3A9708F8: movl %ecx,-56(%ebp)
+ 0x3A9708FB: movl -68(%ebp),%esi
+ 0x3A9708FE: movl -64(%ebp),%ecx
+ 0x3A970901: leal (%ecx,%esi,4), %esi
+ 0x3A970904: movl %esi,-72(%ebp)
+ 0x3A970907: cmpl %edi,%eax
+ 0x3A970909: jz-8 0x3A97091D
+. 1247 3A9708EF 28
+. 8B 75 EC 8B 4D E8 8D 0C 8E 89 4D C8 8B 75 BC 8B 4D C0 8D 34 B1 89 75 B8 39 F8 74 12
+
+==== BB 1248 (0x3A97090B) in 22854B, out 127812B, BBs exec'd 0 ====
+ 0x3A97090B: nop
+ 0x3A97090C: leal 0(%esi,,), %esi
+ 0x3A970910: addl $0x4, %edx
+ 0x3A970913: movl (%edx),%eax
+ 0x3A970915: testl %eax,%eax
+ 0x3A970917: jz-8 0x3A970960
+. 1248 3A97090B 14
+. 90 8D 74 26 00 83 C2 04 8B 02 85 C0 74 47
+
+==== BB 1249 (0x3A970919) in 22868B, out 127908B, BBs exec'd 0 ====
+ 0x3A970919: cmpl %edi,%eax
+ 0x3A97091B: jnz-8 0x3A970910
+. 1249 3A970919 4
+. 39 F8 75 F3
+
+==== BB 1250 (0x3A970910) in 22872B, out 127965B, BBs exec'd 0 ====
+ 0x3A970910: addl $0x4, %edx
+ 0x3A970913: movl (%edx),%eax
+ 0x3A970915: testl %eax,%eax
+ 0x3A970917: jz-8 0x3A970960
+. 1250 3A970910 9
+. 83 C2 04 8B 02 85 C0 74 47
+
+==== BB 1251 (0x3A970960) in 22881B, out 128044B, BBs exec'd 0 ====
+ 0x3A970960: movl -48(%ebp),%edx
+ 0x3A970963: movl 0x1E0(%edx),%ecx
+ 0x3A970969: testl %ecx,%ecx
+ 0x3A97096B: jnz-32 0x3A970A77
+. 1251 3A970960 17
+. 8B 55 D0 8B 8A E0 01 00 00 85 C9 0F 85 06 01 00 00
+
+==== BB 1252 (0x3A970971) in 22898B, out 128132B, BBs exec'd 0 ====
+ 0x3A970971: incl -68(%ebp)
+ 0x3A970974: movl 0xFFFFF998(%ebx),%edx
+ 0x3A97097A: cmpl %edx,-68(%ebp)
+ 0x3A97097D: jb-32 0x3A9708D0
+. 1252 3A970971 18
+. FF 45 BC 8B 93 98 F9 FF FF 39 55 BC 0F 82 4D FF FF FF
+
+==== BB 1253 (0x3A970983) in 22916B, out 128227B, BBs exec'd 0 ====
+ 0x3A970983: movl 12(%edi),%edi
+ 0x3A970986: testl %edi,%edi
+ 0x3A970988: jnz-32 0x3A97087D
+. 1253 3A970983 11
+. 8B 7F 0C 85 FF 0F 85 EF FE FF FF
+
+==== BB 1254 (0x3A97088C) in 22927B, out 128299B, BBs exec'd 0 ====
+ 0x3A97088C: leal 0(%esi,,), %esi
+ 0x3A970890: incl -24(%ebp)
+ 0x3A970893: movl -20(%ebp),%eax
+ 0x3A970896: movl -24(%ebp),%esi
+ 0x3A970899: cmpl %edi,(%eax,%esi,4)
+ 0x3A97089C: jnz-8 0x3A970890
+. 1254 3A97088C 18
+. 8D 74 26 00 FF 45 E8 8B 45 EC 8B 75 E8 39 3C B0 75 F2
+
+==== BB 1255 (0x3A970890) in 22945B, out 128413B, BBs exec'd 0 ====
+ 0x3A970890: incl -24(%ebp)
+ 0x3A970893: movl -20(%ebp),%eax
+ 0x3A970896: movl -24(%ebp),%esi
+ 0x3A970899: cmpl %edi,(%eax,%esi,4)
+ 0x3A97089C: jnz-8 0x3A970890
+. 1255 3A970890 14
+. FF 45 E8 8B 45 EC 8B 75 E8 39 3C B0 75 F2
+
+==== BB 1256 (0x3A97098E) in 22959B, out 128517B, BBs exec'd 0 ====
+ 0x3A97098E: movl $0x0, -16(%ebp)
+ 0x3A970995: cmpl %edx,-16(%ebp)
+ 0x3A970998: jb-8 0x3A9709C6
+. 1256 3A97098E 12
+. C7 45 F0 00 00 00 00 39 55 F0 72 2C
+
+==== BB 1257 (0x3A9709C6) in 22971B, out 128595B, BBs exec'd 0 ====
+ 0x3A9709C6: movl -16(%ebp),%edx
+ 0x3A9709C9: movl -20(%ebp),%ecx
+ 0x3A9709CC: movl (%ecx,%edx,4),%edi
+ 0x3A9709CF: movzbl 0x174(%edi),%edx
+ 0x3A9709D6: testb $0x8, %dl
+ 0x3A9709D9: jz-8 0x3A970A23
+. 1257 3A9709C6 21
+. 8B 55 F0 8B 4D EC 8B 3C 91 0F B6 97 74 01 00 00 F6 C2 08 74 48
+
+==== BB 1258 (0x3A9709DB) in 22992B, out 128713B, BBs exec'd 0 ====
+ 0x3A9709DB: jmp-8 0x3A97099F
+. 1258 3A9709DB 2
+. EB C2
+
+==== BB 1259 (0x3A97099F) in 22994B, out 128741B, BBs exec'd 0 ====
+ 0x3A97099F: movb %dl,%al
+ 0x3A9709A1: andb $0xF7, %al
+ 0x3A9709A3: movb %al,0x174(%edi)
+ 0x3A9709A9: movl 4(%edi),%eax
+ 0x3A9709AC: movzbl (%eax),%ecx
+ 0x3A9709AF: testb %cl,%cl
+ 0x3A9709B1: jnz-8 0x3A9709DD
+. 1259 3A97099F 20
+. 88 D0 24 F7 88 87 74 01 00 00 8B 47 04 0F B6 08 84 C9 75 2A
+
+==== BB 1260 (0x3A9709B3) in 23014B, out 128877B, BBs exec'd 0 ====
+ 0x3A9709B3: testb $0x3, %dl
+ 0x3A9709B6: jnz-8 0x3A9709DD
+. 1260 3A9709B3 5
+. F6 C2 03 75 25
+
+==== BB 1261 (0x3A9709B8) in 23019B, out 128939B, BBs exec'd 0 ====
+ 0x3A9709B8: incl -16(%ebp)
+ 0x3A9709BB: movl -16(%ebp),%edx
+ 0x3A9709BE: cmpl 0xFFFFF998(%ebx),%edx
+ 0x3A9709C4: jnb-8 0x3A970A37
+. 1261 3A9709B8 14
+. FF 45 F0 8B 55 F0 3B 93 98 F9 FF FF 73 71
+
+==== BB 1262 (0x3A9709DD) in 23033B, out 129034B, BBs exec'd 0 ====
+ 0x3A9709DD: movl 0x80(%edi),%edx
+ 0x3A9709E3: testl %edx,%edx
+ 0x3A9709E5: jnz-8 0x3A9709EE
+. 1262 3A9709DD 10
+. 8B 97 80 00 00 00 85 D2 75 07
+
+==== BB 1263 (0x3A9709E7) in 23043B, out 129109B, BBs exec'd 0 ====
+ 0x3A9709E7: movl 76(%edi),%esi
+ 0x3A9709EA: testl %esi,%esi
+ 0x3A9709EC: jz-8 0x3A9709B8
+. 1263 3A9709E7 7
+. 8B 77 4C 85 F6 74 CA
+
+==== BB 1264 (0x3A9709EE) in 23050B, out 129181B, BBs exec'd 0 ====
+ 0x3A9709EE: testb $0x2, 0xFFFFFC14(%ebx)
+ 0x3A9709F5: jnz-32 0x3A970ADC
+. 1264 3A9709EE 13
+. F6 83 14 FC FF FF 02 0F 85 E1 00 00 00
+
+==== BB 1265 (0x3A9709FB) in 23063B, out 129251B, BBs exec'd 0 ====
+ 0x3A9709FB: testl %edx,%edx
+ 0x3A9709FD: jz-8 0x3A970A1C
+. 1265 3A9709FB 4
+. 85 D2 74 1D
+
+==== BB 1266 (0x3A970A1C) in 23067B, out 129310B, BBs exec'd 0 ====
+ 0x3A970A1C: movl 76(%edi),%eax
+ 0x3A970A1F: testl %eax,%eax
+ 0x3A970A21: jnz-8 0x3A970A6C
+. 1266 3A970A1C 7
+. 8B 47 4C 85 C0 75 49
+
+==== BB 1267 (0x3A970A6C) in 23074B, out 129382B, BBs exec'd 0 ====
+ 0x3A970A6C: movl 4(%eax),%eax
+ 0x3A970A6F: movl (%edi),%edx
+ 0x3A970A71: addl %edx,%eax
+ 0x3A970A73: call*l %eax
+. 1267 3A970A6C 9
+. 8B 40 04 8B 17 01 D0 FF D0
+
+==== BB 1268 (0x3A97CCD4) in 23083B, out 129456B, BBs exec'd 0 ====
+ 0x3A97CCD4: pushl %ebp
+ 0x3A97CCD5: movl %esp,%ebp
+ 0x3A97CCD7: pushl %ebx
+ 0x3A97CCD8: call 0x3A97CCDD ; popl %ebx
+ 0x3A97CCDE: addl $0x1103, %ebx
+ 0x3A97CCE4: pushl %eax
+ 0x3A97CCE5: call 0x3A97C9F0
+. 1268 3A97CCD4 22
+. 55 89 E5 53 E8 00 00 00 00 5B 81 C3 03 11 00 00 50 E8 06 FD FF FF
+
+==== BB 1269 (0x3A97C9F0) in 23105B, out 129585B, BBs exec'd 0 ====
+ 0x3A97C9F0: pushl %ebp
+ 0x3A97C9F1: movl %esp,%ebp
+ 0x3A97C9F3: pushl %ebx
+ 0x3A97C9F4: call 0x3A97C9F9 ; popl %ebx
+ 0x3A97C9FA: addl $0x13E7, %ebx
+ 0x3A97CA00: pushl %ecx
+ 0x3A97CA01: cmpb $0x0, 0x30(%ebx)
+ 0x3A97CA08: jnz-8 0x3A97CA3E
+. 1269 3A97C9F0 26
+. 55 89 E5 53 E8 00 00 00 00 5B 81 C3 E7 13 00 00 51 80 BB 30 00 00 00 00 75 34
+
+==== BB 1270 (0x3A97CA0A) in 23131B, out 129731B, BBs exec'd 0 ====
+ 0x3A97CA0A: movl 0x24(%ebx),%edx
+ 0x3A97CA10: testl %edx,%edx
+ 0x3A97CA12: jnz-8 0x3A97CA43
+. 1270 3A97CA0A 10
+. 8B 93 24 00 00 00 85 D2 75 2F
+
+==== BB 1271 (0x3A97CA43) in 23141B, out 129803B, BBs exec'd 0 ====
+ 0x3A97CA43: subl $0xC, %esp
+ 0x3A97CA46: movl 0xFFFFFF10(%ebx),%eax
+ 0x3A97CA4C: pushl %eax
+ 0x3A97CA4D: call 0x3A97C984
+. 1271 3A97CA43 15
+. 83 EC 0C 8B 83 10 FF FF FF 50 E8 32 FF FF FF
+
+==== BB 1272 (0x3A97C984) in 23156B, out 129894B, BBs exec'd 0 ====
+ 0x3A97C984: jmp*l 0x18(%ebx)
+. 1272 3A97C984 6
+. FF A3 18 00 00 00
+
+==== BB 1273 (0x3A97C98A) in 23162B, out 129921B, BBs exec'd 0 ====
+ 0x3A97C98A: pushl $0x18
+ 0x3A97C98F: jmp 0x3A97C944
+. 1273 3A97C98A 10
+. 68 18 00 00 00 E9 B0 FF FF FF
+
+==== BB 1274 (0x3A97C944) in 23172B, out 129970B, BBs exec'd 0 ====
+ 0x3A97C944: pushl 0x4(%ebx)
+ 0x3A97C94A: jmp*l 0x8(%ebx)
+. 1274 3A97C944 12
+. FF B3 04 00 00 00 FF A3 08 00 00 00
+
+==== BB 1275 __cxa_finalize(0x3A9C8EA0) in 23184B, out 130019B, BBs exec'd 0 ====
+ 0x3A9C8EA0: pushl %ebp
+ 0x3A9C8EA1: movl %esp,%ebp
+ 0x3A9C8EA3: pushl %edi
+ 0x3A9C8EA4: pushl %esi
+ 0x3A9C8EA5: pushl %ebx
+ 0x3A9C8EA6: subl $0xC, %esp
+ 0x3A9C8EA9: call 0x3A9B3791
+. 1275 3A9C8EA0 14
+. 55 89 E5 57 56 53 83 EC 0C E8 E3 A8 FE FF
+
+==== BB 1276 (0x3A9C8EAE) in 23198B, out 130152B, BBs exec'd 0 ====
+ 0x3A9C8EAE: addl $0xE7162, %ebx
+ 0x3A9C8EB4: movl 0xFFFF9EBC(%ebx),%edi
+ 0x3A9C8EBA: testl %edi,%edi
+ 0x3A9C8EBC: jz-8 0x3A9C8F26
+. 1276 3A9C8EAE 16
+. 81 C3 62 71 0E 00 8B BB BC 9E FF FF 85 FF 74 68
+
+==== BB 1277 (0x3A9C8EBE) in 23214B, out 130240B, BBs exec'd 0 ====
+ 0x3A9C8EBE: movl %esi,%esi
+ 0x3A9C8EC0: movl 4(%edi),%eax
+ 0x3A9C8EC3: shll $0x4, %eax
+ 0x3A9C8EC6: leal -8(%eax,%edi,1), %esi
+ 0x3A9C8ECA: leal 8(%edi), %eax
+ 0x3A9C8ECD: cmpl %eax,%esi
+ 0x3A9C8ECF: movl %eax,-16(%ebp)
+ 0x3A9C8ED2: jnb-8 0x3A9C8EE6
+. 1277 3A9C8EBE 22
+. 89 F6 8B 47 04 C1 E0 04 8D 74 38 F8 8D 47 08 39 C6 89 45 F0 73 12
+
+==== BB 1278 (0x3A9C8ED4) in 23236B, out 130354B, BBs exec'd 0 ====
+ 0x3A9C8ED4: jmp-8 0x3A9C8F20
+. 1278 3A9C8ED4 2
+. EB 4A
+
+==== BB 1279 (0x3A9C8F20) in 23238B, out 130382B, BBs exec'd 0 ====
+ 0x3A9C8F20: movl (%edi),%edi
+ 0x3A9C8F22: testl %edi,%edi
+ 0x3A9C8F24: jnz-8 0x3A9C8EC0
+. 1279 3A9C8F20 6
+. 8B 3F 85 FF 75 9A
+
+==== BB 1280 (0x3A9C8F26) in 23244B, out 130451B, BBs exec'd 0 ====
+ 0x3A9C8F26: movl 8(%ebp),%eax
+ 0x3A9C8F29: testl %eax,%eax
+ 0x3A9C8F2B: jz-8 0x3A9C8F38
+. 1280 3A9C8F26 7
+. 8B 45 08 85 C0 74 0B
+
+==== BB 1281 (0x3A9C8F2D) in 23251B, out 130523B, BBs exec'd 0 ====
+ 0x3A9C8F2D: movl 8(%ebp),%eax
+ 0x3A9C8F30: movl %eax,(%esp,,)
+ 0x3A9C8F33: call 0x3AA648D0
+. 1281 3A9C8F2D 11
+. 8B 45 08 89 04 24 E8 98 B9 09 00
+
+==== BB 1282 __unregister_atfork(0x3AA648D0) in 23262B, out 130591B, BBs exec'd 0 ====
+ 0x3AA648D0: pushl %ebp
+ 0x3AA648D1: movl %esp,%ebp
+ 0x3AA648D3: pushl %edi
+ 0x3AA648D4: pushl %esi
+ 0x3AA648D5: pushl %ebx
+ 0x3AA648D6: subl $0x10, %esp
+ 0x3AA648D9: movl 8(%ebp),%edi
+ 0x3AA648DC: call 0x3A9B3791
+. 1282 3AA648D0 17
+. 55 89 E5 57 56 53 83 EC 10 8B 7D 08 E8 B0 EE F4 FF
+
+==== BB 1283 (0x3AA648E1) in 23279B, out 130737B, BBs exec'd 0 ====
+ 0x3AA648E1: addl $0x4B72F, %ebx
+ 0x3AA648E7: movl 0x2B3C(%ebx),%edx
+ 0x3AA648ED: testl %edx,%edx
+ 0x3AA648EF: jnz-32 0x3AA649D2
+. 1283 3AA648E1 20
+. 81 C3 2F B7 04 00 8B 93 3C 2B 00 00 85 D2 0F 85 DD 00 00 00
+
+==== BB 1284 (0x3AA648F5) in 23299B, out 130825B, BBs exec'd 0 ====
+ 0x3AA648F5: movl 0xFFFF9B8C(%ebx),%ecx
+ 0x3AA648FB: leal 0xFFFF9B88(%ebx), %eax
+ 0x3AA64901: movl %eax,-16(%ebp)
+ 0x3AA64904: cmpl %eax,%ecx
+ 0x3AA64906: movl 4(%ecx),%esi
+ 0x3AA64909: jnz-8 0x3AA6491A
+. 1284 3AA648F5 22
+. 8B 8B 8C 9B FF FF 8D 83 88 9B FF FF 89 45 F0 39 C1 8B 71 04 75 0F
+
+==== BB 1285 (0x3AA6490B) in 23321B, out 130942B, BBs exec'd 0 ====
+ 0x3AA6490B: jmp-8 0x3AA64940
+. 1285 3AA6490B 2
+. EB 33
+
+==== BB 1286 (0x3AA64940) in 23323B, out 130970B, BBs exec'd 0 ====
+ 0x3AA64940: movl 0xFFFF9B94(%ebx),%ecx
+ 0x3AA64946: leal 0xFFFF9B90(%ebx), %eax
+ 0x3AA6494C: movl %eax,-20(%ebp)
+ 0x3AA6494F: cmpl %eax,%ecx
+ 0x3AA64951: movl 4(%ecx),%esi
+ 0x3AA64954: jnz-8 0x3AA64962
+. 1286 3AA64940 22
+. 8B 8B 94 9B FF FF 8D 83 90 9B FF FF 89 45 EC 39 C1 8B 71 04 75 0C
+
+==== BB 1287 (0x3AA64956) in 23345B, out 131084B, BBs exec'd 0 ====
+ 0x3AA64956: jmp-8 0x3AA64980
+. 1287 3AA64956 2
+. EB 28
+
+==== BB 1288 (0x3AA64980) in 23347B, out 131112B, BBs exec'd 0 ====
+ 0x3AA64980: movl 0xFFFF9B9C(%ebx),%ecx
+ 0x3AA64986: leal 0xFFFF9B98(%ebx), %eax
+ 0x3AA6498C: movl %eax,-24(%ebp)
+ 0x3AA6498F: cmpl %eax,%ecx
+ 0x3AA64991: movl 4(%ecx),%esi
+ 0x3AA64994: jnz-8 0x3AA649A2
+. 1288 3AA64980 22
+. 8B 8B 9C 9B FF FF 8D 83 98 9B FF FF 89 45 E8 39 C1 8B 71 04 75 0C
+
+==== BB 1289 (0x3AA64996) in 23369B, out 131226B, BBs exec'd 0 ====
+ 0x3AA64996: jmp-8 0x3AA649C0
+. 1289 3AA64996 2
+. EB 28
+
+==== BB 1290 (0x3AA649C0) in 23371B, out 131254B, BBs exec'd 0 ====
+ 0x3AA649C0: movl 0x2B44(%ebx),%edx
+ 0x3AA649C6: testl %edx,%edx
+ 0x3AA649C8: jnz-8 0x3AA649E2
+. 1290 3AA649C0 10
+. 8B 93 44 2B 00 00 85 D2 75 18
+
+==== BB 1291 (0x3AA649CA) in 23381B, out 131329B, BBs exec'd 0 ====
+ 0x3AA649CA: addl $0x10, %esp
+ 0x3AA649CD: popl %ebx
+ 0x3AA649CE: popl %esi
+ 0x3AA649CF: popl %edi
+ 0x3AA649D0: popl %ebp
+ 0x3AA649D1: ret
+. 1291 3AA649CA 8
+. 83 C4 10 5B 5E 5F 5D C3
+
+==== BB 1292 (0x3A9C8F38) in 23389B, out 131437B, BBs exec'd 0 ====
+ 0x3A9C8F38: addl $0xC, %esp
+ 0x3A9C8F3B: popl %ebx
+ 0x3A9C8F3C: popl %esi
+ 0x3A9C8F3D: popl %edi
+ 0x3A9C8F3E: popl %ebp
+ 0x3A9C8F3F: ret
+. 1292 3A9C8F38 8
+. 83 C4 0C 5B 5E 5F 5D C3
+
+==== BB 1293 (0x3A97CA52) in 23397B, out 131545B, BBs exec'd 0 ====
+ 0x3A97CA52: addl $0x10, %esp
+ 0x3A97CA55: jmp-8 0x3A97CA14
+. 1293 3A97CA52 5
+. 83 C4 10 EB BD
+
+==== BB 1294 (0x3A97CA14) in 23402B, out 131590B, BBs exec'd 0 ====
+ 0x3A97CA14: movl 0xFFFFFF14(%ebx),%eax
+ 0x3A97CA1A: movl (%eax),%edx
+ 0x3A97CA1C: testl %edx,%edx
+ 0x3A97CA1E: jz-8 0x3A97CA37
+. 1294 3A97CA14 12
+. 8B 83 14 FF FF FF 8B 10 85 D2 74 17
+
+==== BB 1295 (0x3A97CA37) in 23414B, out 131675B, BBs exec'd 0 ====
+ 0x3A97CA37: movb $0x1, 0x30(%ebx)
+ 0x3A97CA3E: movl -4(%ebp),%ebx
+ 0x3A97CA41: leave 0x3A97CA42: ret
+. 1295 3A97CA37 12
+. C6 83 30 00 00 00 01 8B 5D FC C9 C3
+
+==== BB 1296 (0x3A97CCEA) in 23426B, out 131752B, BBs exec'd 0 ====
+ 0x3A97CCEA: popl %ecx
+ 0x3A97CCEB: popl %ebx
+ 0x3A97CCEC: leave 0x3A97CCED: ret
+. 1296 3A97CCEA 4
+. 59 5B C9 C3
+
+==== BB 1297 (0x3A970A75) in 23430B, out 131836B, BBs exec'd 0 ====
+ 0x3A970A75: jmp-8 0x3A970A23
+. 1297 3A970A75 2
+. EB AC
+
+==== BB 1298 (0x3A970A23) in 23432B, out 131864B, BBs exec'd 0 ====
+ 0x3A970A23: decl 0x170(%edi)
+ 0x3A970A29: incl -16(%ebp)
+ 0x3A970A2C: movl -16(%ebp),%edx
+ 0x3A970A2F: cmpl 0xFFFFF998(%ebx),%edx
+ 0x3A970A35: jb-8 0x3A9709C6
+. 1298 3A970A23 20
+. FF 8F 70 01 00 00 FF 45 F0 8B 55 F0 3B 93 98 F9 FF FF 72 8F
+
+==== BB 1299 (0x3A9709FF) in 23452B, out 131979B, BBs exec'd 0 ====
+ 0x3A9709FF: movl 4(%edx),%edx
+ 0x3A970A02: movl (%edi),%esi
+ 0x3A970A04: movl 0x88(%edi),%eax
+ 0x3A970A0A: addl %esi,%edx
+ 0x3A970A0C: movl %edx,-44(%ebp)
+ 0x3A970A0F: movl 4(%eax),%esi
+ 0x3A970A12: shrl $0x2, %esi
+ 0x3A970A15: movl %esi,%eax
+ 0x3A970A17: decl %esi
+ 0x3A970A18: testl %eax,%eax
+ 0x3A970A1A: jnz-8 0x3A970A58
+. 1299 3A9709FF 29
+. 8B 52 04 8B 37 8B 87 88 00 00 00 01 F2 89 55 D4 8B 70 04 C1 EE 02 89 F0 4E 85 C0 75 3C
+
+==== BB 1300 (0x3A970A58) in 23481B, out 132134B, BBs exec'd 0 ====
+ 0x3A970A58: movl -44(%ebp),%eax
+ 0x3A970A5B: call*l (%eax,%esi,4)
+. 1300 3A970A58 6
+. 8B 45 D4 FF 14 B0
+
+==== BB 1301 __libc_fini(0x3A9B3760) in 23487B, out 132195B, BBs exec'd 0 ====
+ 0x3A9B3760: pushl %ebp
+ 0x3A9B3761: movl %esp,%ebp
+ 0x3A9B3763: pushl %esi
+ 0x3A9B3764: pushl %ebx
+ 0x3A9B3765: call 0x3A9B3791
+. 1301 3A9B3760 10
+. 55 89 E5 56 53 E8 27 00 00 00
+
+==== BB 1302 (0x3A9B376A) in 23497B, out 132298B, BBs exec'd 0 ====
+ 0x3A9B376A: addl $0xFC8A6, %ebx
+ 0x3A9B3770: leal 0xFFFFFFA0(%ebx), %esi
+ 0x3A9B3776: movl (%esi),%eax
+ 0x3A9B3778: testl %eax,%eax
+ 0x3A9B377A: jnz-8 0x3A9B3780
+. 1302 3A9B376A 18
+. 81 C3 A6 C8 0F 00 8D B3 A0 FF FF FF 8B 06 85 C0 75 04
+
+==== BB 1303 (0x3A9B377C) in 23515B, out 132390B, BBs exec'd 0 ====
+ 0x3A9B377C: popl %ebx
+ 0x3A9B377D: popl %esi
+ 0x3A9B377E: popl %ebp
+ 0x3A9B377F: ret
+. 1303 3A9B377C 4
+. 5B 5E 5D C3
+
+==== BB 1304 (0x3A970A5E) in 23519B, out 132468B, BBs exec'd 0 ====
+ 0x3A970A5E: movl %esi,%eax
+ 0x3A970A60: decl %esi
+ 0x3A970A61: testl %eax,%eax
+ 0x3A970A63: jnz-8 0x3A970A58
+. 1304 3A970A5E 7
+. 89 F0 4E 85 C0 75 F3
+
+==== BB 1305 (0x3A970A65) in 23526B, out 132545B, BBs exec'd 0 ====
+ 0x3A970A65: movl 76(%edi),%eax
+ 0x3A970A68: testl %eax,%eax
+ 0x3A970A6A: jz-8 0x3A970A23
+. 1305 3A970A65 7
+. 8B 47 4C 85 C0 74 B7
+
+==== BB 1306 (0x3A970A37) in 23533B, out 132617B, BBs exec'd 0 ====
+ 0x3A970A37: movl -52(%ebp),%ecx
+ 0x3A970A3A: movl %ecx,(%esp,,)
+ 0x3A970A3D: call*l 0xFFFFFBFC(%ebx)
+. 1306 3A970A37 12
+. 8B 4D CC 89 0C 24 FF 93 FC FB FF FF
+
+==== BB 1307 rtld_lock_default_unlock_recursive(0x3A9658F0) in 23545B, out 132685B, BBs exec'd 0 ====
+ 0x3A9658F0: pushl %ebp
+ 0x3A9658F1: movl %esp,%ebp
+ 0x3A9658F3: movl 8(%ebp),%eax
+ 0x3A9658F6: decl 4(%eax)
+ 0x3A9658F9: popl %ebp
+ 0x3A9658FA: ret
+. 1307 3A9658F0 11
+. 55 89 E5 8B 45 08 FF 48 04 5D C3
+
+==== BB 1308 (0x3A970A43) in 23556B, out 132789B, BBs exec'd 0 ====
+ 0x3A970A43: cmpb $0x0, 0xFFFFFC14(%ebx)
+ 0x3A970A4A: js-32 0x3A970B05
+. 1308 3A970A43 13
+. 80 BB 14 FC FF FF 00 0F 88 B5 00 00 00
+
+==== BB 1309 (0x3A970A50) in 23569B, out 132855B, BBs exec'd 0 ====
+ 0x3A970A50: leal -12(%ebp), %esp
+ 0x3A970A53: popl %ebx
+ 0x3A970A54: popl %esi
+ 0x3A970A55: popl %edi
+ 0x3A970A56: popl %ebp
+ 0x3A970A57: ret
+. 1309 3A970A50 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+==== BB 1310 (0x3A9C8CBD) in 23577B, out 132957B, BBs exec'd 0 ====
+ 0x3A9C8CBD: movl %edx,%eax
+ 0x3A9C8CBF: movl (%edx),%edx
+ 0x3A9C8CC1: testl %edx,%edx
+ 0x3A9C8CC3: movl %edx,0xFFFF9EBC(%ebx)
+ 0x3A9C8CC9: jz-8 0x3A9C8CDD
+. 1310 3A9C8CBD 14
+. 89 D0 8B 12 85 D2 89 93 BC 9E FF FF 74 12
+
+==== BB 1311 (0x3A9C8CDD) in 23591B, out 133052B, BBs exec'd 0 ====
+ 0x3A9C8CDD: leal 0xFFFFFFF4(%ebx), %esi
+ 0x3A9C8CE3: leal 0xFFFFFFF8(%ebx), %edi
+ 0x3A9C8CE9: cmpl %edi,%esi
+ 0x3A9C8CEB: jb-8 0x3A9C8CF8
+. 1311 3A9C8CDD 16
+. 8D B3 F4 FF FF FF 8D BB F8 FF FF FF 39 FE 72 0B
+
+==== BB 1312 (0x3A9C8CF8) in 23607B, out 133128B, BBs exec'd 0 ====
+ 0x3A9C8CF8: call*l (%esi)
+. 1312 3A9C8CF8 2
+. FF 16
+
+==== BB 1313 _IO_cleanup(0x3A9FD870) in 23609B, out 133169B, BBs exec'd 0 ====
+ 0x3A9FD870: pushl %ebp
+ 0x3A9FD871: movl %esp,%ebp
+ 0x3A9FD873: pushl %edi
+ 0x3A9FD874: pushl %esi
+ 0x3A9FD875: pushl %ebx
+ 0x3A9FD876: subl $0xC, %esp
+ 0x3A9FD879: call 0x3A9B3791
+. 1313 3A9FD870 14
+. 55 89 E5 57 56 53 83 EC 0C E8 13 5F FB FF
+
+==== BB 1314 (0x3A9FD87E) in 23623B, out 133302B, BBs exec'd 0 ====
+ 0x3A9FD87E: addl $0xB2792, %ebx
+ 0x3A9FD884: movl $0x0, (%esp,,)
+ 0x3A9FD88B: call 0x3A9FD660
+. 1314 3A9FD87E 18
+. 81 C3 92 27 0B 00 C7 04 24 00 00 00 00 E8 D0 FD FF FF
+
+==== BB 1315 _IO_flush_all_lockp(0x3A9FD660) in 23641B, out 133379B, BBs exec'd 0 ====
+ 0x3A9FD660: pushl %ebp
+ 0x3A9FD661: xorl %eax, %eax
+ 0x3A9FD663: movl %esp,%ebp
+ 0x3A9FD665: pushl %edi
+ 0x3A9FD666: pushl %esi
+ 0x3A9FD667: pushl %ebx
+ 0x3A9FD668: subl $0x24, %esp
+ 0x3A9FD66B: call 0x3A9B3791
+. 1315 3A9FD660 16
+. 55 31 C0 89 E5 57 56 53 83 EC 24 E8 21 61 FB FF
+
+==== BB 1316 (0x3A9FD670) in 23657B, out 133526B, BBs exec'd 0 ====
+ 0x3A9FD670: addl $0xB29A0, %ebx
+ 0x3A9FD676: cmpl $0x0, 0x1B8(%ebx)
+ 0x3A9FD67D: movl $0x0, -32(%ebp)
+ 0x3A9FD684: setnz %al
+ 0x3A9FD687: testl %eax,%eax
+ 0x3A9FD689: movl %eax,-36(%ebp)
+ 0x3A9FD68C: jnz-32 0x3A9FD80D
+. 1316 3A9FD670 34
+. 81 C3 A0 29 0B 00 83 BB B8 01 00 00 00 C7 45 E0 00 00 00 00 0F 95 C0 85 C0 89 45 DC 0F 85 7B 01 00 00
+
+==== BB 1317 (0x3A9FD692) in 23691B, out 133655B, BBs exec'd 0 ====
+ 0x3A9FD692: movl 8(%ebp),%esi
+ 0x3A9FD695: testl %esi,%esi
+ 0x3A9FD697: jz-8 0x3A9FD6A7
+. 1317 3A9FD692 7
+. 8B 75 08 85 F6 74 0E
+
+==== BB 1318 (0x3A9FD6A7) in 23698B, out 133727B, BBs exec'd 0 ====
+ 0x3A9FD6A7: movl 0xFFFF9570(%ebx),%esi
+ 0x3A9FD6AD: movl 0x9B0(%ebx),%edi
+ 0x3A9FD6B3: testl %esi,%esi
+ 0x3A9FD6B5: jnz-8 0x3A9FD6D0
+. 1318 3A9FD6A7 16
+. 8B B3 70 95 FF FF 8B BB B0 09 00 00 85 F6 75 19
+
+==== BB 1319 (0x3A9FD6D0) in 23714B, out 133818B, BBs exec'd 0 ====
+ 0x3A9FD6D0: movl %esi,0x9B4(%ebx)
+ 0x3A9FD6D6: movl 8(%ebp),%ecx
+ 0x3A9FD6D9: testl %ecx,%ecx
+ 0x3A9FD6DB: jz-8 0x3A9FD6EE
+. 1319 3A9FD6D0 13
+. 89 B3 B4 09 00 00 8B 4D 08 85 C9 74 11
+
+==== BB 1320 (0x3A9FD6EE) in 23727B, out 133909B, BBs exec'd 0 ====
+ 0x3A9FD6EE: movl 92(%esi),%edx
+ 0x3A9FD6F1: testl %edx,%edx
+ 0x3A9FD6F3: jle-32 0x3A9FD7C0
+. 1320 3A9FD6EE 11
+. 8B 56 5C 85 D2 0F 8E C7 00 00 00
+
+==== BB 1321 (0x3A9FD7C0) in 23738B, out 133981B, BBs exec'd 0 ====
+ 0x3A9FD7C0: movl 16(%esi),%eax
+ 0x3A9FD7C3: cmpl %eax,20(%esi)
+ 0x3A9FD7C6: jbe-32 0x3A9FD6F9
+. 1321 3A9FD7C0 12
+. 8B 46 10 39 46 14 0F 86 2D FF FF FF
+
+==== BB 1322 (0x3A9FD6F9) in 23750B, out 134056B, BBs exec'd 0 ====
+ 0x3A9FD6F9: movzbl 70(%esi),%ecx
+ 0x3A9FD6FD: testb %cl,%cl
+ 0x3A9FD6FF: jnz-8 0x3A9FD730
+. 1322 3A9FD6F9 8
+. 0F B6 4E 46 84 C9 75 2F
+
+==== BB 1323 (0x3A9FD701) in 23758B, out 134133B, BBs exec'd 0 ====
+ 0x3A9FD701: testl %edx,%edx
+ 0x3A9FD703: jle-8 0x3A9FD730
+. 1323 3A9FD701 4
+. 85 D2 7E 2B
+
+==== BB 1324 (0x3A9FD730) in 23762B, out 134192B, BBs exec'd 0 ====
+ 0x3A9FD730: movl 8(%ebp),%eax
+ 0x3A9FD733: testl %eax,%eax
+ 0x3A9FD735: jz-8 0x3A9FD748
+. 1324 3A9FD730 7
+. 8B 45 08 85 C0 74 11
+
+==== BB 1325 (0x3A9FD748) in 23769B, out 134264B, BBs exec'd 0 ====
+ 0x3A9FD748: xorl %eax, %eax
+ 0x3A9FD74A: movl %eax,0x9B4(%ebx)
+ 0x3A9FD750: movl 0x9B0(%ebx),%eax
+ 0x3A9FD756: cmpl %eax,%edi
+ 0x3A9FD758: jnz-32 0x3A9FD6C0
+. 1325 3A9FD748 22
+. 31 C0 89 83 B4 09 00 00 8B 83 B0 09 00 00 39 C7 0F 85 62 FF FF FF
+
+==== BB 1326 (0x3A9FD75E) in 23791B, out 134363B, BBs exec'd 0 ====
+ 0x3A9FD75E: movl 52(%esi),%esi
+ 0x3A9FD761: testl %esi,%esi
+ 0x3A9FD763: jnz-32 0x3A9FD6D0
+. 1326 3A9FD75E 11
+. 8B 76 34 85 F6 0F 85 67 FF FF FF
+
+==== BB 1327 (0x3A9FD769) in 23802B, out 134435B, BBs exec'd 0 ====
+ 0x3A9FD769: leal 0(%esi,,), %esi
+ 0x3A9FD770: movl 8(%ebp),%eax
+ 0x3A9FD773: testl %eax,%eax
+ 0x3A9FD775: jz-8 0x3A9FD785
+. 1327 3A9FD769 14
+. 8D B4 26 00 00 00 00 8B 45 08 85 C0 74 0E
+
+==== BB 1328 (0x3A9FD785) in 23816B, out 134520B, BBs exec'd 0 ====
+ 0x3A9FD785: movl -36(%ebp),%edi
+ 0x3A9FD788: testl %edi,%edi
+ 0x3A9FD78A: jnz-32 0x3A9FD82D
+. 1328 3A9FD785 11
+. 8B 7D DC 85 FF 0F 85 9D 00 00 00
+
+==== BB 1329 (0x3A9FD790) in 23827B, out 134592B, BBs exec'd 0 ====
+ 0x3A9FD790: movl -32(%ebp),%eax
+ 0x3A9FD793: addl $0x24, %esp
+ 0x3A9FD796: popl %ebx
+ 0x3A9FD797: popl %esi
+ 0x3A9FD798: popl %edi
+ 0x3A9FD799: popl %ebp
+ 0x3A9FD79A: ret
+. 1329 3A9FD790 11
+. 8B 45 E0 83 C4 24 5B 5E 5F 5D C3
+
+==== BB 1330 (0x3A9FD890) in 23838B, out 134714B, BBs exec'd 0 ====
+ 0x3A9FD890: movl 0xFFFF9570(%ebx),%esi
+ 0x3A9FD896: movl %eax,%edi
+ 0x3A9FD898: testl %esi,%esi
+ 0x3A9FD89A: jz-8 0x3A9FD8CE
+. 1330 3A9FD890 12
+. 8B B3 70 95 FF FF 89 C7 85 F6 74 32
+
+==== BB 1331 (0x3A9FD89C) in 23850B, out 134799B, BBs exec'd 0 ====
+ 0x3A9FD89C: leal 0(%esi,,), %esi
+ 0x3A9FD8A0: movl (%esi),%eax
+ 0x3A9FD8A2: testb $0x2, %al
+ 0x3A9FD8A4: jnz-8 0x3A9FD8C0
+. 1331 3A9FD89C 10
+. 8D 74 26 00 8B 06 A8 02 75 1A
+
+==== BB 1332 (0x3A9FD8C0) in 23860B, out 134888B, BBs exec'd 0 ====
+ 0x3A9FD8C0: movl $0xFFFFFFFF, 92(%esi)
+ 0x3A9FD8C7: movl 52(%esi),%esi
+ 0x3A9FD8CA: testl %esi,%esi
+ 0x3A9FD8CC: jnz-8 0x3A9FD8A0
+. 1332 3A9FD8C0 14
+. C7 46 5C FF FF FF FF 8B 76 34 85 F6 75 D2
+
+==== BB 1333 (0x3A9FD8A0) in 23874B, out 134975B, BBs exec'd 0 ====
+ 0x3A9FD8A0: movl (%esi),%eax
+ 0x3A9FD8A2: testb $0x2, %al
+ 0x3A9FD8A4: jnz-8 0x3A9FD8C0
+. 1333 3A9FD8A0 6
+. 8B 06 A8 02 75 1A
+
+==== BB 1334 (0x3A9FD8A6) in 23880B, out 135050B, BBs exec'd 0 ====
+ 0x3A9FD8A6: andl $0x1008, %eax
+ 0x3A9FD8AB: cmpl $0x8, %eax
+ 0x3A9FD8AE: jz-8 0x3A9FD8C0
+. 1334 3A9FD8A6 10
+. 25 08 10 00 00 83 F8 08 74 10
+
+==== BB 1335 (0x3A9FD8B0) in 23890B, out 135121B, BBs exec'd 0 ====
+ 0x3A9FD8B0: movl 92(%esi),%eax
+ 0x3A9FD8B3: testl %eax,%eax
+ 0x3A9FD8B5: jnz-8 0x3A9FD8D8
+. 1335 3A9FD8B0 7
+. 8B 46 5C 85 C0 75 21
+
+==== BB 1336 (0x3A9FD8B7) in 23897B, out 135193B, BBs exec'd 0 ====
+ 0x3A9FD8B7: movl %esi,%esi
+ 0x3A9FD8B9: leal 0(%edi,,), %edi
+ 0x3A9FD8C0: movl $0xFFFFFFFF, 92(%esi)
+ 0x3A9FD8C7: movl 52(%esi),%esi
+ 0x3A9FD8CA: testl %esi,%esi
+ 0x3A9FD8CC: jnz-8 0x3A9FD8A0
+. 1336 3A9FD8B7 23
+. 89 F6 8D BC 27 00 00 00 00 C7 46 5C FF FF FF FF 8B 76 34 85 F6 75 D2
+
+==== BB 1337 (0x3A9FD8CE) in 23920B, out 135297B, BBs exec'd 0 ====
+ 0x3A9FD8CE: addl $0xC, %esp
+ 0x3A9FD8D1: movl %edi,%eax
+ 0x3A9FD8D3: popl %ebx
+ 0x3A9FD8D4: popl %esi
+ 0x3A9FD8D5: popl %edi
+ 0x3A9FD8D6: popl %ebp
+ 0x3A9FD8D7: ret
+. 1337 3A9FD8CE 10
+. 83 C4 0C 89 F8 5B 5E 5F 5D C3
+
+==== BB 1338 (0x3A9C8CFA) in 23930B, out 135415B, BBs exec'd 0 ====
+ 0x3A9C8CFA: addl $0x4, %esi
+ 0x3A9C8CFD: cmpl %edi,%esi
+ 0x3A9C8CFF: jb-8 0x3A9C8CF8
+. 1338 3A9C8CFA 7
+. 83 C6 04 39 FE 72 F7
+
+==== BB 1339 (0x3A9C8D01) in 23937B, out 135482B, BBs exec'd 0 ====
+ 0x3A9C8D01: jmp-8 0x3A9C8CED
+. 1339 3A9C8D01 2
+. EB EA
+
+==== BB 1340 (0x3A9C8CED) in 23939B, out 135510B, BBs exec'd 0 ====
+ 0x3A9C8CED: movl 8(%ebp),%eax
+ 0x3A9C8CF0: movl %eax,(%esp,,)
+ 0x3A9C8CF3: call 0x3AA2658C
+. 1340 3A9C8CED 11
+. 8B 45 08 89 04 24 E8 94 D8 05 00
+
+==== BB 1341 __GI__exit(0x3AA2658C) in 23950B, out 135578B, BBs exec'd 0 ====
+ 0x3AA2658C: movl 4(%esp,,),%ebx
+ 0x3AA26590: movl $0xFC,%eax
+ 0x3AA26595: int $0x80
+. 1341 3AA2658C 11
+. 8B 5C 24 04 B8 FC 00 00 00 CD 80
+
+==6382==
diff --git a/main/VEX/orig_x86/fpu_mmx_sse.orig b/main/VEX/orig_x86/fpu_mmx_sse.orig
new file mode 100644
index 0000000..3ce2487
--- /dev/null
+++ b/main/VEX/orig_x86/fpu_mmx_sse.orig
@@ -0,0 +1,35448 @@
+
+. 0 3A965880 7
+. 89 E0 E8 F9 03 00 00
+
+. 0 3A965C80 14
+. 55 89 E5 57 56 53 83 EC 54 E8 9D FC 00 00
+
+. 0 3A97592B 4
+. 8B 1C 24 C3
+
+. 0 3A965C8E 67
+. 81 C3 DE 29 01 00 89 45 D0 8B 93 00 00 00 00 8D 83 50 FF FF FF 29 D0 89 83 E4 F9 FF FF 01 D0 89 83 EC F9 FF FF 8D 83 94 F9 FF FF 89 45 C8 83 C0 50 8B 7D C8 89 45 CC 8B 70 08 83 C7 68 8B 16 85 D2 75 10
+
+. 0 3A965CE1 5
+. 83 FA 21 7E ED
+
+. 0 3A965CD3 14
+. 89 34 97 83 C6 08 8B 06 85 C0 89 C2 74 2F
+
+. 0 3A965CE6 16
+. B8 FF FF FF 6F 29 D0 83 F8 0F 0F 87 EA 01 00 00
+
+. 0 3A965CF6 21
+. B8 21 00 00 70 29 D0 89 34 87 83 C6 08 8B 06 85 C0 89 C2 75 D6
+
+. 0 3A965D0B 14
+. 90 8D 74 26 00 8B 4D CC 8B 11 85 D2 74 57
+
+. 0 3A965D19 7
+. 8B 47 10 85 C0 74 03
+
+. 0 3A965D20 10
+. 01 50 04 8B 47 0C 85 C0 74 03
+
+. 0 3A965D2A 10
+. 01 50 04 8B 47 14 85 C0 74 03
+
+. 0 3A965D34 10
+. 01 50 04 8B 47 18 85 C0 74 03
+
+. 0 3A965D3E 10
+. 01 50 04 8B 47 44 85 C0 74 03
+
+. 0 3A965D48 10
+. 01 50 04 8B 47 5C 85 C0 74 03
+
+. 0 3A965D52 13
+. 01 50 04 8B 87 C4 00 00 00 85 C0 74 11
+
+. 0 3A965D5F 27
+. 01 50 04 8D B4 26 00 00 00 00 8D BC 27 00 00 00 00 8B 83 E4 F9 FF FF 85 C0 75 0E
+
+. 0 3A965D88 44
+. C7 45 DC 00 00 00 00 8B 4D C8 8B 83 40 FA FF FF C7 45 E4 00 00 00 00 83 C1 50 85 C0 C7 45 D8 00 00 00 00 C7 45 D4 00 00 00 00 74 12
+
+. 0 3A965DB4 28
+. 8B 40 04 89 45 D4 8B 83 44 FA FF FF 8B 40 04 89 45 D8 8B BB 4C FA FF FF 85 FF 74 0C
+
+. 0 3A965DD0 51
+. 8B 83 04 FA FF FF 8B 40 04 01 45 D8 8B 55 D4 8B 75 D8 8D 04 16 89 45 C4 8B 45 C8 8B 78 50 8B 41 30 8B 40 04 89 45 C0 8B 81 B4 00 00 00 31 C9 85 C0 74 03
+
+. 0 3A965E03 12
+. 8B 48 04 89 F0 C1 E8 03 39 C8 76 02
+
+. 0 3A965E0F 9
+. 89 C8 8D 0C C2 39 CA 73 17
+
+. 0 3A965E18 23
+. 90 8D B4 26 00 00 00 00 8B 32 89 F8 83 C2 08 01 F0 01 38 39 CA 72 F1
+
+. 0 3A965E20 15
+. 8B 32 89 F8 83 C2 08 01 F0 01 38 39 CA 72 F1
+
+. 0 3A965E2F 5
+. 3B 4D C4 73 4D
+
+. 0 3A965E34 47
+. 8D B6 00 00 00 00 8D BF 00 00 00 00 8B 51 04 8B 75 C0 89 D0 C1 E8 08 C1 E0 04 01 F0 8B 31 01 FE 89 75 BC 0F B6 F2 31 D2 66 83 78 0E 00 74 06
+
+. 0 3A965E63 17
+. 8B 93 E4 F9 FF FF 03 50 04 8D 46 FA 83 F8 01 77 05
+
+. 0 3A965E74 13
+. 8B 45 BC 89 10 83 C1 08 3B 4D C4 72 BF
+
+. 0 3A965E40 35
+. 8B 51 04 8B 75 C0 89 D0 C1 E8 08 C1 E0 04 01 F0 8B 31 01 FE 89 75 BC 0F B6 F2 31 D2 66 83 78 0E 00 74 06
+
+. 0 3A965E81 16
+. 8B 45 C8 BE 01 00 00 00 83 C0 50 E8 EF 5E 00 00
+
+. 0 3A96BD80 12
+. 55 89 C1 8B 40 28 89 E5 85 C0 74 1D
+
+. 0 3A96BD8C 31
+. 8B 40 04 8B 10 83 C0 08 89 81 68 01 00 00 8D 04 90 89 91 64 01 00 00 89 81 6C 01 00 00 5D C3
+
+. 0 3A965E91 57
+. 89 B3 54 FB FF FF 8D 83 94 C9 FE FF 89 83 78 FB FF FF 8D 83 28 02 00 00 89 83 7C FB FF FF 8D 83 24 DD FE FF 89 44 24 04 8B 55 D0 89 AB 28 01 00 00 89 14 24 E8 F6 CE 00 00
+
+. 0 3A972DC0 44
+. 55 31 D2 89 E5 57 31 FF 31 C9 56 31 F6 53 81 EC 04 02 00 00 8B 45 08 89 95 1C FE FF FF 31 D2 89 95 0C FE FF FF 8B 10 E8 3F 2B 00 00
+
+. 0 3A972DEC 74
+. 81 C3 80 58 00 00 89 83 28 01 00 00 83 C0 04 89 93 0C 02 00 00 8D 14 90 89 B5 14 FE FF FF 8B 72 04 89 BD 18 FE FF FF 31 FF 85 F6 89 83 38 00 00 00 8D 42 04 89 8D 10 FE FF FF 89 C1 89 BD 08 FE FF FF 89 83 00 02 00 00 74 09
+
+. 0 3A972E36 9
+. 83 C1 04 8B 11 85 D2 75 F7
+
+. 0 3A972E3F 37
+. 83 C1 04 8D 83 14 D2 FE FF 89 CA 89 8B 34 01 00 00 8B 09 89 85 20 FE FF FF 31 C0 85 C9 89 83 20 FC FF FF 74 52
+
+. 0 3A972E64 20
+. 8D B6 00 00 00 00 8D BF 00 00 00 00 8D 41 FD 83 F8 1E 77 28
+
+. 0 3A972EA0 22
+. 83 C2 08 B8 01 00 00 00 D3 E0 09 85 0C FE FF FF 8B 0A 85 C9 75 BA
+
+. 0 3A972E70 8
+. 8D 41 FD 83 F8 1E 77 28
+
+. 0 3A972E78 11
+. 8B 84 83 54 DB FF FF 01 D8 FF E0
+
+. 0 3A9731AC 14
+. 8B 42 04 89 83 54 FC FF FF E9 E6 FC FF FF
+
+. 0 3A9731F2 14
+. 8B 42 04 89 83 18 FC FF FF E9 97 FC FF FF
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+
+. 0 80487FF 44
+. 9B DD B5 68 FF FF FF DD 45 E0 D9 E1 DD 5D D8 DD A5 68 FF FF FF B8 59 A4 0C DC BA 29 8C 67 41 52 50 FF 75 DC FF 75 D8 E8 57 FD FF FF
+
+. 0 8048582 57
+. 55 89 E5 83 EC 38 8B 45 08 8B 55 0C 89 45 F8 89 55 FC 8B 45 10 8B 55 14 89 45 F0 89 55 F4 C7 45 EC 00 00 00 00 DD 45 F8 DD 45 F0 D9 C9 DA E9 DF E0 80 E4 45 80 FC 40 74 6A
+
+. 0 8048625 12
+. C7 45 EC 01 00 00 00 8B 45 EC C9 C3
+
+. 0 804882B 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8048832 13
+. 83 EC 0C 68 BE 38 06 08 E8 D1 FB FF FF
+
+fabs_3 ... ok
+. 0 804883F 5
+. 83 C4 10 EB 44
+
+. 0 8048888 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E26 5
+. E8 65 5A FE FF
+
+. 0 8048890 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 59 A4 0C DC BA 29 8C 67 C1 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 27 FB FF FF
+
+. 0 80488C9 7
+. 83 C4 10 85 C0 75 79
+
+. 0 80488D0 44
+. 9B DD B5 68 FF FF FF DD 45 E0 D9 E1 DD 5D D8 DD A5 68 FF FF FF B8 59 A4 0C DC BA 29 8C 67 41 52 50 FF 75 DC FF 75 D8 E8 86 FC FF FF
+
+. 0 80488FC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8048903 13
+. 83 EC 0C 68 1D 39 06 08 E8 00 FB FF FF
+
+fabs_4 ... ok
+. 0 8048910 5
+. 83 C4 10 EB 44
+
+. 0 8048959 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E2B 5
+. E8 31 5B FE FF
+
+. 0 8048961 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 4F FA FF FF
+
+. 0 80489A1 7
+. 83 C4 10 85 C0 75 78
+
+. 0 80489A8 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 45 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 32 FB FF FF
+
+. 0 8048522 62
+. D9 45 08 D8 65 0C D9 E1 DD 5D F0 8B 45 08 89 45 E4 D9 45 E4 D9 E1 DD 05 18 38 06 08 DE C9 DD 5D E8 B8 00 00 00 00 BA 00 00 28 C0 52 50 B8 00 00 00 00 BA 00 00 00 40 52 50 E8 80 FE FF FF
+
+. 0 80483E0 6
+. FF 25 08 A1 06 08
+
+. 0 80483E6 10
+. 68 10 00 00 00 E9 C0 FF FF FF
+
+. 0 3A9A8860 20
+. 55 89 E5 53 83 EC 34 DD 45 08 DD 45 10 D9 C9 E8 DC B2 FF FF
+
+. 0 3A9A3B50 4
+. 8B 1C 24 C3
+
+. 0 3A9A8874 26
+. 81 C3 D0 6F 01 00 DD 55 F0 D9 C9 DD 55 E8 DD 5C 24 08 DD 1C 24 E8 72 D6 FF FF
+
+. 0 3A9A5F00 34
+. DD 44 24 0C D9 E5 E8 00 00 00 00 59 81 C1 39 99 01 00 DF E0 88 E2 80 E4 45 80 FC 40 0F 84 CE 00 00 00
+
+. 0 3A9A5F22 9
+. 80 FC 05 0F 84 D5 00 00 00
+
+. 0 3A9A5F2B 5
+. 80 FC 01 74 6A
+
+. 0 3A9A5F30 25
+. DD 44 24 04 83 EC 08 D9 E5 DF E0 88 E6 80 E4 45 80 FC 40 0F 84 87 01 00 00
+
+. 0 3A9A5F49 9
+. 80 FC 05 0F 84 FE 00 00 00
+
+. 0 3A9A5F52 17
+. D9 C9 D9 C0 DF 3C 24 DF 2C 24 DD E9 DF E0 9E 75 4D
+
+. 0 3A9A5F63 9
+. 58 5A 83 CA 00 DD D8 79 0D
+
+. 0 3A9A5F6C 27
+. DC B9 DC BD FF FF F7 D8 83 D2 00 F7 DA DD 81 DC BD FF FF D9 C9 0F AC D0 01 73 06
+
+. 0 3A9A5F8D 10
+. D8 C8 D1 EA 89 C1 09 D1 75 EA
+
+. 0 3A9A5F81 6
+. 0F AC D0 01 73 06
+
+. 0 3A9A5F87 16
+. D9 C9 D8 C9 D9 C9 D8 C8 D1 EA 89 C1 09 D1 75 EA
+
+. 0 3A9A5F97 3
+. DD D8 C3
+
+. 0 3A9A888E 18
+. 8B 83 38 00 00 00 DD 5D E0 83 38 FF 0F 84 40 01 00 00
+
+. 0 3A9A88A0 11
+. DD 45 E8 DD 1C 24 E8 45 29 00 00
+
+. 0 3A9AB1F0 40
+. 55 89 E5 8B 45 08 8B 55 0C 5D 89 D1 89 C2 F7 DA 81 E1 FF FF FF 7F 09 D0 C1 E8 1F 09 C1 B8 00 00 F0 7F 29 C8 C1 E8 1F C3
+
+. 0 3A9A88AB 8
+. 85 C0 0F 85 2D 01 00 00
+
+. 0 3A9A88B3 11
+. DD 45 F0 DD 1C 24 E8 32 29 00 00
+
+. 0 3A9A88BE 4
+. 85 C0 74 23
+
+. 0 3A9A88E5 14
+. DD 45 F0 D9 EE D9 C9 DD E9 DF E0 9E 75 72
+
+. 0 3A9A8965 13
+. DD D8 DD 45 E0 DD 1C 24 E8 AE 28 00 00
+
+. 0 3A9AB220 17
+. 8B 44 24 08 B9 FF FF EF FF 29 C1 31 C8 C1 E8 1F C3
+
+. 0 3A9A8972 4
+. 85 C0 75 3A
+
+. 0 3A9A89B0 14
+. DD 45 E0 D9 EE D9 C9 DA E9 DF E0 9E 75 22
+
+. 0 3A9A89E0 9
+. DD 45 E0 83 C4 34 5B 5D C3
+
+. 0 8048560 20
+. 83 C4 10 DC 4D E8 DD 45 F0 D9 C9 DA E9 DF E0 F6 C4 45 74 02
+
+. 0 80489CF 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80489D6 13
+. 83 EC 0C 68 52 39 06 08 E8 2D FA FF FF
+
+fadds_1 ... ok
+. 0 80489E3 5
+. 83 C4 10 EB 48
+
+. 0 8048A30 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E30 5
+. E8 03 5C FE FF
+
+. 0 8048A38 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 78 F9 FF FF
+
+. 0 8048A78 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8048A7F 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 45 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 5B FA FF FF
+
+. 0 8048AA6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8048AAD 13
+. 83 EC 0C 68 8A 39 06 08 E8 56 F9 FF FF
+
+fadds_2 ... ok
+. 0 8048ABA 5
+. 83 C4 10 EB 48
+
+. 0 8048B07 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E35 5
+. E8 D5 5C FE FF
+
+. 0 8048B0F 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 A1 F8 FF FF
+
+. 0 8048B4F 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8048B56 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 45 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 84 F9 FF FF
+
+. 0 8048B7D 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8048B84 13
+. 83 EC 0C 68 C2 39 06 08 E8 7F F8 FF FF
+
+fadds_3 ... ok
+. 0 8048B91 5
+. 83 C4 10 EB 48
+
+. 0 8048BDE 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E3A 5
+. E8 A7 5D FE FF
+
+. 0 8048BE6 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 CA F7 FF FF
+
+. 0 8048C26 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8048C2D 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 45 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 AD F8 FF FF
+
+. 0 8048C54 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8048C5B 13
+. 83 EC 0C 68 FA 39 06 08 E8 A8 F7 FF FF
+
+fadds_4 ... ok
+. 0 8048C68 5
+. 83 C4 10 EB 48
+
+. 0 8048CB5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E3F 5
+. E8 79 5E FE FF
+
+. 0 8048CBD 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 DC F6 FF FF
+
+. 0 8048D14 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8048D1B 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 45 D8 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 3A F8 FF FF
+
+. 0 8048D48 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8048D4F 13
+. 83 EC 0C 68 32 3A 06 08 E8 B4 F6 FF FF
+
+faddl_1 ... ok
+. 0 8048D5C 5
+. 83 C4 10 EB 44
+
+. 0 8048DA5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E44 5
+. E8 64 5F FE FF
+
+. 0 8048DAD 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 EC F5 FF FF
+
+. 0 8048E04 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8048E0B 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 45 D8 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 4A F7 FF FF
+
+. 0 8048E38 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8048E3F 13
+. 83 EC 0C 68 6A 3A 06 08 E8 C4 F5 FF FF
+
+faddl_2 ... ok
+. 0 8048E4C 5
+. 83 C4 10 EB 44
+
+. 0 8048E95 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E49 5
+. E8 4F 60 FE FF
+
+. 0 8048E9D 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 FC F4 FF FF
+
+. 0 8048EF4 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8048EFB 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 45 D8 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 5A F6 FF FF
+
+. 0 8048F28 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8048F2F 13
+. 83 EC 0C 68 A2 3A 06 08 E8 D4 F4 FF FF
+
+faddl_3 ... ok
+. 0 8048F3C 5
+. 83 C4 10 EB 44
+
+. 0 8048F85 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E4E 5
+. E8 3A 61 FE FF
+
+. 0 8048F8D 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 0C F4 FF FF
+
+. 0 8048FE4 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8048FEB 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 45 D8 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 6A F5 FF FF
+
+. 0 8049018 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804901F 13
+. 83 EC 0C 68 DA 3A 06 08 E8 E4 F3 FF FF
+
+faddl_4 ... ok
+. 0 804902C 5
+. 83 C4 10 EB 44
+
+. 0 8049075 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E53 5
+. E8 25 62 FE FF
+
+. 0 804907D 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 2C F3 FF FF
+
+. 0 80490C4 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 80490CF 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC C2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 03 F4 FF FF
+
+. 0 80490FE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8049105 13
+. 83 EC 0C 68 12 3B 06 08 E8 FE F2 FF FF
+
+fadd_1 ... ok
+. 0 8049112 5
+. 83 C4 10 EB 48
+
+. 0 804915F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E58 5
+. E8 0A 63 FE FF
+
+. 0 8049167 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 42 F2 FF FF
+
+. 0 80491AE 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 80491B9 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC C2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 19 F3 FF FF
+
+. 0 80491E8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80491EF 13
+. 83 EC 0C 68 47 3B 06 08 E8 14 F2 FF FF
+
+fadd_2 ... ok
+. 0 80491FC 5
+. 83 C4 10 EB 48
+
+. 0 8049249 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E5D 5
+. E8 EF 63 FE FF
+
+. 0 8049251 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 58 F1 FF FF
+
+. 0 8049298 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 80492A3 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC C2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 2F F2 FF FF
+
+. 0 80492D2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80492D9 13
+. 83 EC 0C 68 7C 3B 06 08 E8 2A F1 FF FF
+
+fadd_3 ... ok
+. 0 80492E6 5
+. 83 C4 10 EB 48
+
+. 0 8049333 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E62 5
+. E8 D4 64 FE FF
+
+. 0 804933B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 6E F0 FF FF
+
+. 0 8049382 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804938D 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC C2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 45 F1 FF FF
+
+. 0 80493BC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80493C3 13
+. 83 EC 0C 68 B1 3B 06 08 E8 40 F0 FF FF
+
+fadd_4 ... ok
+. 0 80493D0 5
+. 83 C4 10 EB 48
+
+. 0 804941D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E67 5
+. E8 B9 65 FE FF
+
+. 0 8049425 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 74 EF FF FF
+
+. 0 804947C 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 8049487 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC C2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 C6 F0 FF FF
+
+. 0 80494BC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80494C3 13
+. 83 EC 0C 68 E6 3B 06 08 E8 40 EF FF FF
+
+fadd_5 ... ok
+. 0 80494D0 5
+. 83 C4 10 EB 44
+
+. 0 8049519 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E6C 5
+. E8 B0 66 FE FF
+
+. 0 8049521 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 78 EE FF FF
+
+. 0 8049578 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 8049583 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC C2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 CA EF FF FF
+
+. 0 80495B8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80495BF 13
+. 83 EC 0C 68 1B 3C 06 08 E8 44 EE FF FF
+
+fadd_6 ... ok
+. 0 80495CC 5
+. 83 C4 10 EB 44
+
+. 0 8049615 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E71 5
+. E8 A7 67 FE FF
+
+. 0 804961D 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 7C ED FF FF
+
+. 0 8049674 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804967F 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC C2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 CE EE FF FF
+
+. 0 80496B4 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80496BB 13
+. 83 EC 0C 68 50 3C 06 08 E8 48 ED FF FF
+
+fadd_7 ... ok
+. 0 80496C8 5
+. 83 C4 10 EB 44
+
+. 0 8049711 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E76 5
+. E8 9E 68 FE FF
+
+. 0 8049719 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 80 EC FF FF
+
+. 0 8049770 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804977B 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC C2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 D2 ED FF FF
+
+. 0 80497B0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80497B7 13
+. 83 EC 0C 68 85 3C 06 08 E8 4C EC FF FF
+
+fadd_8 ... ok
+. 0 80497C4 5
+. 83 C4 10 EB 44
+
+. 0 804980D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E7B 5
+. E8 95 69 FE FF
+
+. 0 8049815 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 94 EB FF FF
+
+. 0 804985C 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8049863 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 C2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 73 EC FF FF
+
+. 0 804988E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8049895 13
+. 83 EC 0C 68 BA 3C 06 08 E8 6E EB FF FF
+
+fadd_9 ... ok
+. 0 80498A2 5
+. 83 C4 10 EB 48
+
+. 0 80498EF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E80 5
+. E8 72 6A FE FF
+
+. 0 80498F7 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 B2 EA FF FF
+
+. 0 804993E 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8049945 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 C2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 91 EB FF FF
+
+. 0 8049970 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8049977 13
+. 83 EC 0C 68 EF 3C 06 08 E8 8C EA FF FF
+
+fadd_10 ... ok
+. 0 8049984 5
+. 83 C4 10 EB 48
+
+. 0 80499D1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E85 5
+. E8 4F 6B FE FF
+
+. 0 80499D9 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 D0 E9 FF FF
+
+. 0 8049A20 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8049A27 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 C2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 AF EA FF FF
+
+. 0 8049A52 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8049A59 13
+. 83 EC 0C 68 27 3D 06 08 E8 AA E9 FF FF
+
+fadd_11 ... ok
+. 0 8049A66 5
+. 83 C4 10 EB 48
+
+. 0 8049AB3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E8A 5
+. E8 2C 6C FE FF
+
+. 0 8049ABB 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 EE E8 FF FF
+
+. 0 8049B02 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8049B09 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 C2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 CD E9 FF FF
+
+. 0 8049B34 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8049B3B 13
+. 83 EC 0C 68 5F 3D 06 08 E8 C8 E8 FF FF
+
+fadd_12 ... ok
+. 0 8049B48 5
+. 83 C4 10 EB 48
+
+. 0 8049B95 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E8F 5
+. E8 09 6D FE FF
+
+. 0 8049B9D 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 FC E7 FF FF
+
+. 0 8049BF4 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8049BFB 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 C2 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 56 E9 FF FF
+
+. 0 8049C2C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8049C33 13
+. 83 EC 0C 68 97 3D 06 08 E8 D0 E7 FF FF
+
+fadd_13 ... ok
+. 0 8049C40 5
+. 83 C4 10 EB 44
+
+. 0 8049C89 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E94 5
+. E8 F8 6D FE FF
+
+. 0 8049C91 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 08 E7 FF FF
+
+. 0 8049CE8 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8049CEF 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 C2 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 62 E8 FF FF
+
+. 0 8049D20 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8049D27 13
+. 83 EC 0C 68 CF 3D 06 08 E8 DC E6 FF FF
+
+fadd_14 ... ok
+. 0 8049D34 5
+. 83 C4 10 EB 44
+
+. 0 8049D7D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E99 5
+. E8 E7 6E FE FF
+
+. 0 8049D85 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 14 E6 FF FF
+
+. 0 8049DDC 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8049DE3 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 C2 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 6E E7 FF FF
+
+. 0 8049E14 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8049E1B 13
+. 83 EC 0C 68 07 3E 06 08 E8 E8 E5 FF FF
+
+fadd_15 ... ok
+. 0 8049E28 5
+. 83 C4 10 EB 44
+
+. 0 8049E71 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062E9E 5
+. E8 D6 6F FE FF
+
+. 0 8049E79 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 20 E5 FF FF
+
+. 0 8049ED0 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8049ED7 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 C2 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 7A E6 FF FF
+
+. 0 8049F08 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8049F0F 13
+. 83 EC 0C 68 3F 3E 06 08 E8 F4 E4 FF FF
+
+fadd_16 ... ok
+. 0 8049F1C 5
+. 83 C4 10 EB 44
+
+. 0 8049F65 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EA3 5
+. E8 C5 70 FE FF
+
+. 0 8049F6D 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 3C E4 FF FF
+
+. 0 8049FB4 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8049FBB 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE C2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 19 E5 FF FF
+
+. 0 8049FE8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8049FEF 13
+. 83 EC 0C 68 77 3E 06 08 E8 14 E4 FF FF
+
+faddp_1 ... ok
+. 0 8049FFC 5
+. 83 C4 10 EB 48
+
+. 0 804A049 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EA8 5
+. E8 A4 71 FE FF
+
+. 0 804A051 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 58 E3 FF FF
+
+. 0 804A098 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 804A09F 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE C2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 35 E4 FF FF
+
+. 0 804A0CC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804A0D3 13
+. 83 EC 0C 68 AF 3E 06 08 E8 30 E3 FF FF
+
+faddp_2 ... ok
+. 0 804A0E0 5
+. 83 C4 10 EB 48
+
+. 0 804A12D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EAD 5
+. E8 83 72 FE FF
+
+. 0 804A135 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 74 E2 FF FF
+
+. 0 804A17C 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 804A183 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE C2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 51 E3 FF FF
+
+. 0 804A1B0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804A1B7 13
+. 83 EC 0C 68 E7 3E 06 08 E8 4C E2 FF FF
+
+faddp_3 ... ok
+. 0 804A1C4 5
+. 83 C4 10 EB 48
+
+. 0 804A211 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EB2 5
+. E8 62 73 FE FF
+
+. 0 804A219 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 90 E1 FF FF
+
+. 0 804A260 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 804A267 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE C2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 6D E2 FF FF
+
+. 0 804A294 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804A29B 13
+. 83 EC 0C 68 1F 3F 06 08 E8 68 E1 FF FF
+
+faddp_4 ... ok
+. 0 804A2A8 5
+. 83 C4 10 EB 48
+
+. 0 804A2F5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EB7 5
+. E8 41 74 FE FF
+
+. 0 804A2FD 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 9C E0 FF FF
+
+. 0 804A354 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804A35F 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE C2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 F0 E1 FF FF
+
+. 0 804A392 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804A399 13
+. 83 EC 0C 68 57 3F 06 08 E8 6A E0 FF FF
+
+faddp_5 ... ok
+. 0 804A3A6 5
+. 83 C4 10 EB 44
+
+. 0 804A3EF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EBC 5
+. E8 36 75 FE FF
+
+. 0 804A3F7 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 A2 DF FF FF
+
+. 0 804A44E 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804A459 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE C2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 F6 E0 FF FF
+
+. 0 804A48C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804A493 13
+. 83 EC 0C 68 8F 3F 06 08 E8 70 DF FF FF
+
+faddp_6 ... ok
+. 0 804A4A0 5
+. 83 C4 10 EB 44
+
+. 0 804A4E9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EC1 5
+. E8 2B 76 FE FF
+
+. 0 804A4F1 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 A8 DE FF FF
+
+. 0 804A548 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804A553 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE C2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 FC DF FF FF
+
+. 0 804A586 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804A58D 13
+. 83 EC 0C 68 C7 3F 06 08 E8 76 DE FF FF
+
+faddp_7 ... ok
+. 0 804A59A 5
+. 83 C4 10 EB 44
+
+. 0 804A5E3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EC6 5
+. E8 20 77 FE FF
+
+. 0 804A5EB 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 AE DD FF FF
+
+. 0 804A642 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804A64D 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE C2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 02 DF FF FF
+
+. 0 804A680 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804A687 13
+. 83 EC 0C 68 FF 3F 06 08 E8 7C DD FF FF
+
+faddp_8 ... ok
+. 0 804A694 5
+. 83 C4 10 EB 44
+
+. 0 804A6DD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062ECB 5
+. E8 15 78 FE FF
+
+. 0 804A6E5 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 C4 DC FF FF
+
+. 0 804A72C 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804A733 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE C1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 A5 DD FF FF
+
+. 0 804A75C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804A763 13
+. 83 EC 0C 68 37 40 06 08 E8 A0 DC FF FF
+
+faddp_9 ... ok
+. 0 804A770 5
+. 83 C4 10 EB 48
+
+. 0 804A7BD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062ED0 5
+. E8 F0 78 FE FF
+
+. 0 804A7C5 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 E4 DB FF FF
+
+. 0 804A80C 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804A813 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE C1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 C5 DC FF FF
+
+. 0 804A83C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804A843 13
+. 83 EC 0C 68 6F 40 06 08 E8 C0 DB FF FF
+
+faddp_10 ... ok
+. 0 804A850 5
+. 83 C4 10 EB 48
+
+. 0 804A89D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062ED5 5
+. E8 CB 79 FE FF
+
+. 0 804A8A5 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 04 DB FF FF
+
+. 0 804A8EC 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804A8F3 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE C1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 E5 DB FF FF
+
+. 0 804A91C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804A923 13
+. 83 EC 0C 68 AA 40 06 08 E8 E0 DA FF FF
+
+faddp_11 ... ok
+. 0 804A930 5
+. 83 C4 10 EB 48
+
+. 0 804A97D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EDA 5
+. E8 A6 7A FE FF
+
+. 0 804A985 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 24 DA FF FF
+
+. 0 804A9CC 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804A9D3 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE C1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 05 DB FF FF
+
+. 0 804A9FC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804AA03 13
+. 83 EC 0C 68 E5 40 06 08 E8 00 DA FF FF
+
+faddp_12 ... ok
+. 0 804AA10 5
+. 83 C4 10 EB 48
+
+. 0 804AA5D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EDF 5
+. E8 81 7B FE FF
+
+. 0 804AA65 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 34 D9 FF FF
+
+. 0 804AABC 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 804AAC3 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE C1 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 90 DA FF FF
+
+. 0 804AAF2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804AAF9 13
+. 83 EC 0C 68 20 41 06 08 E8 0A D9 FF FF
+
+faddp_13 ... ok
+. 0 804AB06 5
+. 83 C4 10 EB 44
+
+. 0 804AB4F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EE4 5
+. E8 6E 7C FE FF
+
+. 0 804AB57 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 42 D8 FF FF
+
+. 0 804ABAE 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 804ABB5 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE C1 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 9E D9 FF FF
+
+. 0 804ABE4 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804ABEB 13
+. 83 EC 0C 68 5B 41 06 08 E8 18 D8 FF FF
+
+faddp_14 ... ok
+. 0 804ABF8 5
+. 83 C4 10 EB 44
+
+. 0 804AC41 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EE9 5
+. E8 5B 7D FE FF
+
+. 0 804AC49 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 50 D7 FF FF
+
+. 0 804ACA0 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 804ACA7 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE C1 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 AC D8 FF FF
+
+. 0 804ACD6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804ACDD 13
+. 83 EC 0C 68 96 41 06 08 E8 26 D7 FF FF
+
+faddp_15 ... ok
+. 0 804ACEA 5
+. 83 C4 10 EB 44
+
+. 0 804AD33 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EEE 5
+. E8 48 7E FE FF
+
+. 0 804AD3B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 5E D6 FF FF
+
+. 0 804AD92 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 804AD99 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE C1 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 BA D7 FF FF
+
+. 0 804ADC8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804ADCF 13
+. 83 EC 0C 68 D1 41 06 08 E8 34 D6 FF FF
+
+faddp_16 ... ok
+. 0 804ADDC 5
+. 83 C4 10 EB 44
+
+. 0 804AE25 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EF3 5
+. E8 35 7F FE FF
+
+. 0 804AE2D 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 86 D5 FF FF
+
+. 0 804AE6A 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804AE71 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 45 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 8B 9C AD 45 50 FF 75 D0 E8 69 D6 FF FF
+
+. 0 804AE98 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804AE9F 13
+. 83 EC 0C 68 0C 42 06 08 E8 64 D5 FF FF
+
+fiadds_1 ... ok
+. 0 804AEAC 5
+. 83 C4 10 EB 48
+
+. 0 804AEF9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EF8 5
+. E8 04 80 FE FF
+
+. 0 804AF01 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 B2 D4 FF FF
+
+. 0 804AF3E 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804AF45 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 45 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA E6 40 45 50 FF 75 D0 E8 95 D5 FF FF
+
+. 0 804AF6C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804AF73 13
+. 83 EC 0C 68 47 42 06 08 E8 90 D4 FF FF
+
+fiadds_2 ... ok
+. 0 804AF80 5
+. 83 C4 10 EB 48
+
+. 0 804AFCD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062EFD 5
+. E8 D3 80 FE FF
+
+. 0 804AFD5 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 DE D3 FF FF
+
+. 0 804B012 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804B019 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 45 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA E6 40 C5 50 FF 75 D0 E8 C1 D4 FF FF
+
+. 0 804B040 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B047 13
+. 83 EC 0C 68 82 42 06 08 E8 BC D3 FF FF
+
+fiadds_3 ... ok
+. 0 804B054 5
+. 83 C4 10 EB 48
+
+. 0 804B0A1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F02 5
+. E8 A2 81 FE FF
+
+. 0 804B0A9 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 0A D3 FF FF
+
+. 0 804B0E6 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804B0ED 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 45 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 8B 9C AD C5 50 FF 75 D0 E8 ED D3 FF FF
+
+. 0 804B114 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B11B 13
+. 83 EC 0C 68 BD 42 06 08 E8 E8 D2 FF FF
+
+fiadds_4 ... ok
+. 0 804B128 5
+. 83 C4 10 EB 48
+
+. 0 804B175 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F07 5
+. E8 71 82 FE FF
+
+. 0 804B17D 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 2E D2 FF FF
+
+. 0 804B1C2 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804B1C9 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 45 DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 68 E7 32 41 52 50 FF 75 D4 FF 75 D0 E8 8C D3 FF FF
+
+. 0 804B1F6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B1FD 13
+. 83 EC 0C 68 F8 42 06 08 E8 06 D2 FF FF
+
+fiadds_5 ... ok
+. 0 804B20A 5
+. 83 C4 10 EB 44
+
+. 0 804B253 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F0C 5
+. E8 4A 83 FE FF
+
+. 0 804B25B 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 50 D1 FF FF
+
+. 0 804B2A0 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804B2A7 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 45 DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA A6 C5 32 C1 52 50 FF 75 D4 FF 75 D0 E8 AE D2 FF FF
+
+. 0 804B2D4 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B2DB 13
+. 83 EC 0C 68 33 43 06 08 E8 28 D1 FF FF
+
+fiadds_6 ... ok
+. 0 804B2E8 5
+. 83 C4 10 EB 44
+
+. 0 804B331 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F11 5
+. E8 23 84 FE FF
+
+. 0 804B339 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 72 D0 FF FF
+
+. 0 804B37E 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804B385 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 45 DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA A6 C5 32 41 52 50 FF 75 D4 FF 75 D0 E8 D0 D1 FF FF
+
+. 0 804B3B2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B3B9 13
+. 83 EC 0C 68 6E 43 06 08 E8 4A D0 FF FF
+
+fiadds_7 ... ok
+. 0 804B3C6 5
+. 83 C4 10 EB 44
+
+. 0 804B40F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F16 5
+. E8 FC 84 FE FF
+
+. 0 804B417 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 94 CF FF FF
+
+. 0 804B45C 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804B463 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 45 DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 68 E7 32 C1 52 50 FF 75 D4 FF 75 D0 E8 F2 D0 FF FF
+
+. 0 804B490 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B497 13
+. 83 EC 0C 68 A9 43 06 08 E8 6C CF FF FF
+
+fiadds_8 ... ok
+. 0 804B4A4 5
+. 83 C4 10 EB 44
+
+. 0 804B4ED 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F1B 5
+. E8 D5 85 FE FF
+
+. 0 804B4F5 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 BC CE FF FF
+
+. 0 804B534 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804B53B 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 45 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 30 A7 4C 50 FF 75 D0 E8 9F CF FF FF
+
+. 0 804B562 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B569 13
+. 83 EC 0C 68 E4 43 06 08 E8 9A CE FF FF
+
+fiaddl_1 ... ok
+. 0 804B576 5
+. 83 C4 10 EB 48
+
+. 0 804B5C3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F20 5
+. E8 A6 86 FE FF
+
+. 0 804B5CB 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 E6 CD FF FF
+
+. 0 804B60A 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804B611 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 45 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 5C 2F A7 4C 50 FF 75 D0 E8 C9 CE FF FF
+
+. 0 804B638 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B63F 13
+. 83 EC 0C 68 1F 44 06 08 E8 C4 CD FF FF
+
+fiaddl_2 ... ok
+. 0 804B64C 5
+. 83 C4 10 EB 48
+
+. 0 804B699 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F25 5
+. E8 77 87 FE FF
+
+. 0 804B6A1 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 10 CD FF FF
+
+. 0 804B6E0 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804B6E7 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 45 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 5C 2F A7 CC 50 FF 75 D0 E8 F3 CD FF FF
+
+. 0 804B70E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B715 13
+. 83 EC 0C 68 5A 44 06 08 E8 EE CC FF FF
+
+fiaddl_3 ... ok
+. 0 804B722 5
+. 83 C4 10 EB 48
+
+. 0 804B76F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F2A 5
+. E8 48 88 FE FF
+
+. 0 804B777 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 3A CC FF FF
+
+. 0 804B7B6 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804B7BD 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 45 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 30 A7 CC 50 FF 75 D0 E8 1D CD FF FF
+
+. 0 804B7E4 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B7EB 13
+. 83 EC 0C 68 95 44 06 08 E8 18 CC FF FF
+
+fiaddl_4 ... ok
+. 0 804B7F8 5
+. 83 C4 10 EB 48
+
+. 0 804B845 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F2F 5
+. E8 19 89 FE FF
+
+. 0 804B84D 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 5C CB FF FF
+
+. 0 804B894 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804B89B 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 45 DC DD 5D D0 DD A5 58 FF FF FF B8 6F CD 0F E3 BA 58 31 95 41 52 50 FF 75 D4 FF 75 D0 E8 BA CC FF FF
+
+. 0 804B8C8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B8CF 13
+. 83 EC 0C 68 D0 44 06 08 E8 34 CB FF FF
+
+fiaddl_5 ... ok
+. 0 804B8DC 5
+. 83 C4 10 EB 44
+
+. 0 804B925 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F34 5
+. E8 F4 89 FE FF
+
+. 0 804B92D 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 7C CA FF FF
+
+. 0 804B974 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804B97B 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 45 DC DD 5D D0 DD A5 58 FF FF FF B8 91 32 F0 A4 BA A4 9A 94 41 52 50 FF 75 D4 FF 75 D0 E8 DA CB FF FF
+
+. 0 804B9A8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804B9AF 13
+. 83 EC 0C 68 0B 45 06 08 E8 54 CA FF FF
+
+fiaddl_6 ... ok
+. 0 804B9BC 5
+. 83 C4 10 EB 44
+
+. 0 804BA05 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F39 5
+. E8 CF 8A FE FF
+
+. 0 804BA0D 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 9C C9 FF FF
+
+. 0 804BA54 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804BA5B 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 45 DC DD 5D D0 DD A5 58 FF FF FF B8 91 32 F0 A4 BA A4 9A 94 C1 52 50 FF 75 D4 FF 75 D0 E8 FA CA FF FF
+
+. 0 804BA88 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804BA8F 13
+. 83 EC 0C 68 46 45 06 08 E8 74 C9 FF FF
+
+fiaddl_7 ... ok
+. 0 804BA9C 5
+. 83 C4 10 EB 44
+
+. 0 804BAE5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F3E 5
+. E8 AA 8B FE FF
+
+. 0 804BAED 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 BC C8 FF FF
+
+. 0 804BB34 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804BB3B 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 45 DC DD 5D D0 DD A5 58 FF FF FF B8 6F CD 0F E3 BA 58 31 95 C1 52 50 FF 75 D4 FF 75 D0 E8 1A CA FF FF
+
+. 0 804BB68 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804BB6F 13
+. 83 EC 0C 68 81 45 06 08 E8 94 C8 FF FF
+
+fiaddl_8 ... ok
+. 0 804BB7C 5
+. 83 C4 10 EB 44
+
+. 0 804BBC5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F43 5
+. E8 85 8C FE FF
+
+. 0 804BBCD 71
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2C 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 DC C7 FF FF
+
+. 0 804BC14 11
+. 83 C4 10 85 C0 0F 85 F2 00 00 00
+
+. 0 804BC1F 62
+. 9B DD B5 48 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 45 9D DB F2 9C 8F 45 C4 D9 5D D0 D9 F7 D9 5D C8 DD A5 48 FF FF FF 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 A4 C8 FF FF
+
+. 0 804BC5D 7
+. 83 C4 10 85 C0 74 37
+
+. 0 804BC64 17
+. 83 EC 08 B8 2C 52 9A 44 50 FF 75 C8 E8 8C C8 FF FF
+
+. 0 804BC75 7
+. 83 C4 10 85 C0 74 1F
+
+. 0 804BC7C 10
+. 8B 45 C4 83 E0 45 85 C0 75 15
+
+. 0 804BC86 13
+. 83 EC 0C 68 BC 45 06 08 E8 7D C7 FF FF
+
+fcomi_1 ... ok
+. 0 804BC93 8
+. 83 C4 10 E9 86 00 00 00
+
+. 0 804BD21 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F48 5
+. E8 DC 8D FE FF
+
+. 0 804BD29 71
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2A 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 80 C6 FF FF
+
+. 0 804BD70 11
+. 83 C4 10 85 C0 0F 85 F3 00 00 00
+
+. 0 804BD7B 62
+. 9B DD B5 48 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 44 9D DB F2 9C 8F 45 C4 D9 5D D0 D9 F7 D9 5D C8 DD A5 48 FF FF FF 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 48 C7 FF FF
+
+. 0 804BDB9 7
+. 83 C4 10 85 C0 74 38
+
+. 0 804BDC0 17
+. 83 EC 08 B8 2A 52 9A 44 50 FF 75 C8 E8 30 C7 FF FF
+
+. 0 804BDD1 7
+. 83 C4 10 85 C0 74 20
+
+. 0 804BDD8 11
+. 8B 45 C4 83 E0 45 83 F8 01 75 15
+
+. 0 804BDE3 13
+. 83 EC 0C 68 4B 46 06 08 E8 20 C6 FF FF
+
+fcomi_2 ... ok
+. 0 804BDF0 8
+. 83 C4 10 E9 86 00 00 00
+
+. 0 804BE7E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F4D 5
+. E8 34 8F FE FF
+
+. 0 804BE86 71
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2B 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 23 C5 FF FF
+
+. 0 804BECD 11
+. 83 C4 10 85 C0 0F 85 F3 00 00 00
+
+. 0 804BED8 62
+. 9B DD B5 48 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 05 9D DB F2 9C 8F 45 C4 D9 5D D0 D9 F7 D9 5D C8 DD A5 48 FF FF FF 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 EB C5 FF FF
+
+. 0 804BF16 7
+. 83 C4 10 85 C0 74 38
+
+. 0 804BF1D 17
+. 83 EC 08 B8 2B 52 9A 44 50 FF 75 C8 E8 D3 C5 FF FF
+
+. 0 804BF2E 7
+. 83 C4 10 85 C0 74 20
+
+. 0 804BF35 11
+. 8B 45 C4 83 E0 45 83 F8 40 75 15
+
+. 0 804BF40 13
+. 83 EC 0C 68 83 46 06 08 E8 C3 C4 FF FF
+
+fcomi_3 ... ok
+. 0 804BF4D 8
+. 83 C4 10 E9 86 00 00 00
+
+. 0 804BFDB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F52 5
+. E8 8C 90 FE FF
+
+. 0 804BFE3 87
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 5A 5D F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 B6 C3 FF FF
+
+. 0 804C03A 11
+. 83 C4 10 85 C0 0F 85 F3 00 00 00
+
+. 0 804C045 68
+. 9B DD B5 48 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 45 9D DB F2 9C 8F 45 C4 DD 5D D0 D9 F7 DD 5D C8 DD A5 48 FF FF FF B8 5A 5D F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 F9 C4 FF FF
+
+. 0 804C089 7
+. 83 C4 10 85 C0 74 3A
+
+. 0 804C090 23
+. B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 CC FF 75 C8 E8 DB C4 FF FF
+
+. 0 804C0A7 7
+. 83 C4 10 85 C0 74 1C
+
+. 0 804C0AE 10
+. 8B 45 C4 83 E0 45 85 C0 75 12
+
+. 0 804C0B8 13
+. 83 EC 0C 68 BB 46 06 08 E8 4B C3 FF FF
+
+fcomi_4 ... ok
+. 0 804C0C5 5
+. 83 C4 10 EB 7E
+
+. 0 804C148 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F57 5
+. E8 F4 91 FE FF
+
+. 0 804C150 87
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 FF 59 F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 49 C2 FF FF
+
+. 0 804C1A7 11
+. 83 C4 10 85 C0 0F 85 F4 00 00 00
+
+. 0 804C1B2 68
+. 9B DD B5 48 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 44 9D DB F2 9C 8F 45 C4 DD 5D D0 D9 F7 DD 5D C8 DD A5 48 FF FF FF B8 FF 59 F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 8C C3 FF FF
+
+. 0 804C1F6 7
+. 83 C4 10 85 C0 74 3B
+
+. 0 804C1FD 23
+. B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 CC FF 75 C8 E8 6E C3 FF FF
+
+. 0 804C214 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804C21B 11
+. 8B 45 C4 83 E0 45 83 F8 01 75 12
+
+. 0 804C226 13
+. 83 EC 0C 68 1E 47 06 08 E8 DD C1 FF FF
+
+fcomi_5 ... ok
+. 0 804C233 5
+. 83 C4 10 EB 7E
+
+. 0 804C2B6 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F5C 5
+. E8 5D 93 FE FF
+
+. 0 804C2BE 87
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 DB C0 FF FF
+
+. 0 804C315 11
+. 83 C4 10 85 C0 0F 85 F4 00 00 00
+
+. 0 804C320 68
+. 9B DD B5 48 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 05 9D DB F2 9C 8F 45 C4 DD 5D D0 D9 F7 DD 5D C8 DD A5 48 FF FF FF B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 1E C2 FF FF
+
+. 0 804C364 7
+. 83 C4 10 85 C0 74 3B
+
+. 0 804C36B 23
+. B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 CC FF 75 C8 E8 00 C2 FF FF
+
+. 0 804C382 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804C389 11
+. 8B 45 C4 83 E0 45 83 F8 40 75 12
+
+. 0 804C394 13
+. 83 EC 0C 68 56 47 06 08 E8 6F C0 FF FF
+
+fcomi_6 ... ok
+. 0 804C3A1 5
+. 83 C4 10 EB 7E
+
+. 0 804C424 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F61 5
+. E8 C6 94 FE FF
+
+. 0 804C42C 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2C 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 7D BF FF FF
+
+. 0 804C473 11
+. 83 C4 10 85 C0 0F 85 AE 00 00 00
+
+. 0 804C47E 59
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 45 9D DF F2 9C 8F 45 CC D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2C 52 9A 44 50 FF 75 D0 E8 48 C0 FF FF
+
+. 0 804C4B9 7
+. 83 C4 10 85 C0 74 1C
+
+. 0 804C4C0 10
+. 8B 45 CC 83 E0 45 85 C0 75 12
+
+. 0 804C4CA 13
+. 83 EC 0C 68 8E 47 06 08 E8 39 BF FF FF
+
+fcomip_1 ... ok
+. 0 804C4D7 5
+. 83 C4 10 EB 60
+
+. 0 804C53C 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F66 5
+. E8 D9 95 FE FF
+
+. 0 804C544 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2A 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 65 BE FF FF
+
+. 0 804C58B 11
+. 83 C4 10 85 C0 0F 85 AF 00 00 00
+
+. 0 804C596 59
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 44 9D DF F2 9C 8F 45 CC D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2A 52 9A 44 50 FF 75 D0 E8 30 BF FF FF
+
+. 0 804C5D1 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804C5D8 11
+. 8B 45 CC 83 E0 45 83 F8 01 75 12
+
+. 0 804C5E3 13
+. 83 EC 0C 68 C9 47 06 08 E8 20 BE FF FF
+
+fcomip_2 ... ok
+. 0 804C5F0 5
+. 83 C4 10 EB 60
+
+. 0 804C655 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F6B 5
+. E8 ED 96 FE FF
+
+. 0 804C65D 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2B 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 4C BD FF FF
+
+. 0 804C6A4 11
+. 83 C4 10 85 C0 0F 85 AF 00 00 00
+
+. 0 804C6AF 59
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 05 9D DF F2 9C 8F 45 CC D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 17 BE FF FF
+
+. 0 804C6EA 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804C6F1 11
+. 8B 45 CC 83 E0 45 83 F8 40 75 12
+
+. 0 804C6FC 13
+. 83 EC 0C 68 04 48 06 08 E8 07 BD FF FF
+
+fcomip_3 ... ok
+. 0 804C709 5
+. 83 C4 10 EB 60
+
+. 0 804C76E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F70 5
+. E8 01 98 FE FF
+
+. 0 804C776 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 5A 5D F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 23 BC FF FF
+
+. 0 804C7CD 11
+. 83 C4 10 85 C0 0F 85 B0 00 00 00
+
+. 0 804C7D8 65
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 45 9D DF F2 9C 8F 45 CC D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 69 BD FF FF
+
+. 0 804C819 7
+. 83 C4 10 85 C0 74 1C
+
+. 0 804C820 10
+. 8B 45 CC 83 E0 45 85 C0 75 12
+
+. 0 804C82A 13
+. 83 EC 0C 68 3F 48 06 08 E8 D9 BB FF FF
+
+fcomip_4 ... ok
+. 0 804C837 5
+. 83 C4 10 EB 5C
+
+. 0 804C898 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F75 5
+. E8 26 99 FE FF
+
+. 0 804C8A0 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 FF 59 F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 F9 BA FF FF
+
+. 0 804C8F7 11
+. 83 C4 10 85 C0 0F 85 B1 00 00 00
+
+. 0 804C902 65
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 44 9D DF F2 9C 8F 45 CC D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 3F BC FF FF
+
+. 0 804C943 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804C94A 11
+. 8B 45 CC 83 E0 45 83 F8 01 75 12
+
+. 0 804C955 13
+. 83 EC 0C 68 7A 48 06 08 E8 AE BA FF FF
+
+fcomip_5 ... ok
+. 0 804C962 5
+. 83 C4 10 EB 5C
+
+. 0 804C9C3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F7A 5
+. E8 4C 9A FE FF
+
+. 0 804C9CB 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 CE B9 FF FF
+
+. 0 804CA22 11
+. 83 C4 10 85 C0 0F 85 B1 00 00 00
+
+. 0 804CA2D 65
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 05 9D DF F2 9C 8F 45 CC D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 14 BB FF FF
+
+. 0 804CA6E 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804CA75 11
+. 8B 45 CC 83 E0 45 83 F8 40 75 12
+
+. 0 804CA80 13
+. 83 EC 0C 68 B5 48 06 08 E8 83 B9 FF FF
+
+fcomip_6 ... ok
+. 0 804CA8D 5
+. 83 C4 10 EB 5C
+
+. 0 804CAEE 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F7F 5
+. E8 72 9B FE FF
+
+. 0 804CAF6 71
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2C 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 B3 B8 FF FF
+
+. 0 804CB3D 11
+. 83 C4 10 85 C0 0F 85 F2 00 00 00
+
+. 0 804CB48 62
+. 9B DD B5 48 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 45 9D DB EA 9C 8F 45 C4 D9 5D D0 D9 F7 D9 5D C8 DD A5 48 FF FF FF 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 7B B9 FF FF
+
+. 0 804CB86 7
+. 83 C4 10 85 C0 74 37
+
+. 0 804CB8D 17
+. 83 EC 08 B8 2C 52 9A 44 50 FF 75 C8 E8 63 B9 FF FF
+
+. 0 804CB9E 7
+. 83 C4 10 85 C0 74 1F
+
+. 0 804CBA5 10
+. 8B 45 C4 83 E0 45 85 C0 75 15
+
+. 0 804CBAF 13
+. 83 EC 0C 68 F0 48 06 08 E8 54 B8 FF FF
+
+fucomi_1 ... ok
+. 0 804CBBC 8
+. 83 C4 10 E9 86 00 00 00
+
+. 0 804CC4A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F84 5
+. E8 C9 9C FE FF
+
+. 0 804CC52 71
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2A 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 57 B7 FF FF
+
+. 0 804CC99 11
+. 83 C4 10 85 C0 0F 85 F3 00 00 00
+
+. 0 804CCA4 62
+. 9B DD B5 48 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 44 9D DB EA 9C 8F 45 C4 D9 5D D0 D9 F7 D9 5D C8 DD A5 48 FF FF FF 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 1F B8 FF FF
+
+. 0 804CCE2 7
+. 83 C4 10 85 C0 74 38
+
+. 0 804CCE9 17
+. 83 EC 08 B8 2A 52 9A 44 50 FF 75 C8 E8 07 B8 FF FF
+
+. 0 804CCFA 7
+. 83 C4 10 85 C0 74 20
+
+. 0 804CD01 11
+. 8B 45 C4 83 E0 45 83 F8 01 75 15
+
+. 0 804CD0C 13
+. 83 EC 0C 68 2B 49 06 08 E8 F7 B6 FF FF
+
+fucomi_2 ... ok
+. 0 804CD19 8
+. 83 C4 10 E9 86 00 00 00
+
+. 0 804CDA7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F89 5
+. E8 21 9E FE FF
+
+. 0 804CDAF 71
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2B 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 FA B5 FF FF
+
+. 0 804CDF6 11
+. 83 C4 10 85 C0 0F 85 F3 00 00 00
+
+. 0 804CE01 62
+. 9B DD B5 48 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 05 9D DB EA 9C 8F 45 C4 D9 5D D0 D9 F7 D9 5D C8 DD A5 48 FF FF FF 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 C2 B6 FF FF
+
+. 0 804CE3F 7
+. 83 C4 10 85 C0 74 38
+
+. 0 804CE46 17
+. 83 EC 08 B8 2B 52 9A 44 50 FF 75 C8 E8 AA B6 FF FF
+
+. 0 804CE57 7
+. 83 C4 10 85 C0 74 20
+
+. 0 804CE5E 11
+. 8B 45 C4 83 E0 45 83 F8 40 75 15
+
+. 0 804CE69 13
+. 83 EC 0C 68 66 49 06 08 E8 9A B5 FF FF
+
+fucomi_3 ... ok
+. 0 804CE76 8
+. 83 C4 10 E9 86 00 00 00
+
+. 0 804CF04 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F8E 5
+. E8 79 9F FE FF
+
+. 0 804CF0C 87
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 5A 5D F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 8D B4 FF FF
+
+. 0 804CF63 11
+. 83 C4 10 85 C0 0F 85 F3 00 00 00
+
+. 0 804CF6E 68
+. 9B DD B5 48 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 45 9D DB EA 9C 8F 45 C4 DD 5D D0 D9 F7 DD 5D C8 DD A5 48 FF FF FF B8 5A 5D F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 D0 B5 FF FF
+
+. 0 804CFB2 7
+. 83 C4 10 85 C0 74 3A
+
+. 0 804CFB9 23
+. B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 CC FF 75 C8 E8 B2 B5 FF FF
+
+. 0 804CFD0 7
+. 83 C4 10 85 C0 74 1C
+
+. 0 804CFD7 10
+. 8B 45 C4 83 E0 45 85 C0 75 12
+
+. 0 804CFE1 13
+. 83 EC 0C 68 A1 49 06 08 E8 22 B4 FF FF
+
+fucomi_4 ... ok
+. 0 804CFEE 5
+. 83 C4 10 EB 7E
+
+. 0 804D071 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F93 5
+. E8 E1 A0 FE FF
+
+. 0 804D079 87
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 FF 59 F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 20 B3 FF FF
+
+. 0 804D0D0 11
+. 83 C4 10 85 C0 0F 85 F4 00 00 00
+
+. 0 804D0DB 68
+. 9B DD B5 48 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 44 9D DB EA 9C 8F 45 C4 DD 5D D0 D9 F7 DD 5D C8 DD A5 48 FF FF FF B8 FF 59 F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 63 B4 FF FF
+
+. 0 804D11F 7
+. 83 C4 10 85 C0 74 3B
+
+. 0 804D126 23
+. B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 CC FF 75 C8 E8 45 B4 FF FF
+
+. 0 804D13D 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804D144 11
+. 8B 45 C4 83 E0 45 83 F8 01 75 12
+
+. 0 804D14F 13
+. 83 EC 0C 68 DC 49 06 08 E8 B4 B2 FF FF
+
+fucomi_5 ... ok
+. 0 804D15C 5
+. 83 C4 10 EB 7E
+
+. 0 804D1DF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F98 5
+. E8 4A A2 FE FF
+
+. 0 804D1E7 87
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 B2 B1 FF FF
+
+. 0 804D23E 11
+. 83 C4 10 85 C0 0F 85 F4 00 00 00
+
+. 0 804D249 68
+. 9B DD B5 48 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 05 9D DB EA 9C 8F 45 C4 DD 5D D0 D9 F7 DD 5D C8 DD A5 48 FF FF FF B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 F5 B2 FF FF
+
+. 0 804D28D 7
+. 83 C4 10 85 C0 74 3B
+
+. 0 804D294 23
+. B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 CC FF 75 C8 E8 D7 B2 FF FF
+
+. 0 804D2AB 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804D2B2 11
+. 8B 45 C4 83 E0 45 83 F8 40 75 12
+
+. 0 804D2BD 13
+. 83 EC 0C 68 17 4A 06 08 E8 46 B1 FF FF
+
+fucomi_6 ... ok
+. 0 804D2CA 5
+. 83 C4 10 EB 7E
+
+. 0 804D34D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062F9D 5
+. E8 B3 A3 FE FF
+
+. 0 804D355 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2C 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 54 B0 FF FF
+
+. 0 804D39C 11
+. 83 C4 10 85 C0 0F 85 AE 00 00 00
+
+. 0 804D3A7 59
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 45 9D DF EA 9C 8F 45 CC D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2C 52 9A 44 50 FF 75 D0 E8 1F B1 FF FF
+
+. 0 804D3E2 7
+. 83 C4 10 85 C0 74 1C
+
+. 0 804D3E9 10
+. 8B 45 CC 83 E0 45 85 C0 75 12
+
+. 0 804D3F3 13
+. 83 EC 0C 68 52 4A 06 08 E8 10 B0 FF FF
+
+fucomip_1 ... ok
+. 0 804D400 5
+. 83 C4 10 EB 60
+
+. 0 804D465 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FA2 5
+. E8 C6 A4 FE FF
+
+. 0 804D46D 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2A 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 3C AF FF FF
+
+. 0 804D4B4 11
+. 83 C4 10 85 C0 0F 85 AF 00 00 00
+
+. 0 804D4BF 59
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 44 9D DF EA 9C 8F 45 CC D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2A 52 9A 44 50 FF 75 D0 E8 07 B0 FF FF
+
+. 0 804D4FA 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804D501 11
+. 8B 45 CC 83 E0 45 83 F8 01 75 12
+
+. 0 804D50C 13
+. 83 EC 0C 68 90 4A 06 08 E8 F7 AE FF FF
+
+fucomip_2 ... ok
+. 0 804D519 5
+. 83 C4 10 EB 60
+
+. 0 804D57E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FA7 5
+. E8 DA A5 FE FF
+
+. 0 804D586 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 2B 52 9A 44 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 23 AE FF FF
+
+. 0 804D5CD 11
+. 83 C4 10 85 C0 0F 85 AF 00 00 00
+
+. 0 804D5D8 59
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 9C 83 24 24 BA 83 0C 24 05 9D DF EA 9C 8F 45 CC D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 EE AE FF FF
+
+. 0 804D613 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804D61A 11
+. 8B 45 CC 83 E0 45 83 F8 40 75 12
+
+. 0 804D625 13
+. 83 EC 0C 68 CE 4A 06 08 E8 DE AD FF FF
+
+fucomip_3 ... ok
+. 0 804D632 5
+. 83 C4 10 EB 60
+
+. 0 804D697 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FAC 5
+. E8 EE A6 FE FF
+
+. 0 804D69F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 5A 5D F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 FA AC FF FF
+
+. 0 804D6F6 11
+. 83 C4 10 85 C0 0F 85 B0 00 00 00
+
+. 0 804D701 65
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 45 9D DF EA 9C 8F 45 CC D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 40 AE FF FF
+
+. 0 804D742 7
+. 83 C4 10 85 C0 74 1C
+
+. 0 804D749 10
+. 8B 45 CC 83 E0 45 85 C0 75 12
+
+. 0 804D753 13
+. 83 EC 0C 68 0C 4B 06 08 E8 B0 AC FF FF
+
+fucomip_4 ... ok
+. 0 804D760 5
+. 83 C4 10 EB 5C
+
+. 0 804D7C1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FB1 5
+. E8 13 A8 FE FF
+
+. 0 804D7C9 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 FF 59 F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 D0 AB FF FF
+
+. 0 804D820 11
+. 83 C4 10 85 C0 0F 85 B1 00 00 00
+
+. 0 804D82B 65
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 44 9D DF EA 9C 8F 45 CC D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 16 AD FF FF
+
+. 0 804D86C 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804D873 11
+. 8B 45 CC 83 E0 45 83 F8 01 75 12
+
+. 0 804D87E 13
+. 83 EC 0C 68 4A 4B 06 08 E8 85 AB FF FF
+
+fucomip_5 ... ok
+. 0 804D88B 5
+. 83 C4 10 EB 5C
+
+. 0 804D8EC 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FB6 5
+. E8 39 A9 FE FF
+
+. 0 804D8F4 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 A5 AA FF FF
+
+. 0 804D94B 11
+. 83 C4 10 85 C0 0F 85 B1 00 00 00
+
+. 0 804D956 65
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 9C 83 24 24 BA 83 0C 24 05 9D DF EA 9C 8F 45 CC D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 EB AB FF FF
+
+. 0 804D997 7
+. 83 C4 10 85 C0 74 1D
+
+. 0 804D99E 11
+. 8B 45 CC 83 E0 45 83 F8 40 75 12
+
+. 0 804D9A9 13
+. 83 EC 0C 68 88 4B 06 08 E8 5A AA FF FF
+
+fucomip_6 ... ok
+. 0 804D9B6 5
+. 83 C4 10 EB 5C
+
+. 0 804DA17 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FBB 5
+. E8 5F AA FE FF
+
+. 0 804DA1F 49
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 A0 A9 FF FF
+
+. 0 804DA50 7
+. 83 C4 10 85 C0 75 77
+
+. 0 804DA57 38
+. 9B DD B5 68 FF FF FF D9 45 E0 D9 E0 D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 2B 52 9A C4 50 FF 75 D8 E8 84 AA FF FF
+
+. 0 804DA7D 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804DA84 13
+. 83 EC 0C 68 C6 4B 06 08 E8 7F A9 FF FF
+
+fchs_1 ... ok
+. 0 804DA91 5
+. 83 C4 10 EB 48
+
+. 0 804DADE 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FC0 5
+. E8 21 AB FE FF
+
+. 0 804DAE6 49
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 D9 A8 FF FF
+
+. 0 804DB17 7
+. 83 C4 10 85 C0 75 77
+
+. 0 804DB1E 38
+. 9B DD B5 68 FF FF FF D9 45 E0 D9 E0 D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 2B 52 9A 44 50 FF 75 D8 E8 BD A9 FF FF
+
+. 0 804DB44 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804DB4B 13
+. 83 EC 0C 68 FB 4B 06 08 E8 B8 A8 FF FF
+
+fchs_2 ... ok
+. 0 804DB58 5
+. 83 C4 10 EB 48
+
+. 0 804DBA5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FC5 5
+. E8 E3 AB FE FF
+
+. 0 804DBAD 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 59 A4 0C DC BA 29 8C 67 41 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 0A A8 FF FF
+
+. 0 804DBE6 7
+. 83 C4 10 85 C0 75 79
+
+. 0 804DBED 44
+. 9B DD B5 68 FF FF FF DD 45 E0 D9 E0 DD 5D D8 DD A5 68 FF FF FF B8 59 A4 0C DC BA 29 8C 67 C1 52 50 FF 75 DC FF 75 D8 E8 69 A9 FF FF
+
+. 0 804DC19 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804DC20 13
+. 83 EC 0C 68 30 4C 06 08 E8 E3 A7 FF FF
+
+fchs_3 ... ok
+. 0 804DC2D 5
+. 83 C4 10 EB 44
+
+. 0 804DC76 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FCA 5
+. E8 AF AC FE FF
+
+. 0 804DC7E 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 59 A4 0C DC BA 29 8C 67 C1 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 39 A7 FF FF
+
+. 0 804DCB7 7
+. 83 C4 10 85 C0 75 79
+
+. 0 804DCBE 44
+. 9B DD B5 68 FF FF FF DD 45 E0 D9 E0 DD 5D D8 DD A5 68 FF FF FF B8 59 A4 0C DC BA 29 8C 67 41 52 50 FF 75 DC FF 75 D8 E8 98 A8 FF FF
+
+. 0 804DCEA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804DCF1 13
+. 83 EC 0C 68 65 4C 06 08 E8 12 A7 FF FF
+
+fchs_4 ... ok
+. 0 804DCFE 5
+. 83 C4 10 EB 44
+
+. 0 804DD47 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FCF 5
+. E8 7B AD FE FF
+
+. 0 804DD4F 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 61 A6 FF FF
+
+. 0 804DD8F 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804DD96 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 75 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 3E 50 FF 75 D0 E8 44 A7 FF FF
+
+. 0 804DDBD 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804DDC4 13
+. 83 EC 0C 68 9A 4C 06 08 E8 3F A6 FF FF
+
+fdivs_1 ... ok
+. 0 804DDD1 5
+. 83 C4 10 EB 48
+
+. 0 804DE1E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FD4 5
+. E8 4D AE FE FF
+
+. 0 804DE26 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 8A A5 FF FF
+
+. 0 804DE66 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804DE6D 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 75 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 BE 50 FF 75 D0 E8 6D A6 FF FF
+
+. 0 804DE94 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804DE9B 13
+. 83 EC 0C 68 D2 4C 06 08 E8 68 A5 FF FF
+
+fdivs_2 ... ok
+. 0 804DEA8 5
+. 83 C4 10 EB 48
+
+. 0 804DEF5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FD9 5
+. E8 1F AF FE FF
+
+. 0 804DEFD 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 B3 A4 FF FF
+
+. 0 804DF3D 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804DF44 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 75 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 BE 50 FF 75 D0 E8 96 A5 FF FF
+
+. 0 804DF6B 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804DF72 13
+. 83 EC 0C 68 0A 4D 06 08 E8 91 A4 FF FF
+
+fdivs_3 ... ok
+. 0 804DF7F 5
+. 83 C4 10 EB 48
+
+. 0 804DFCC 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FDE 5
+. E8 F1 AF FE FF
+
+. 0 804DFD4 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 DC A3 FF FF
+
+. 0 804E014 7
+. 83 C4 10 85 C0 75 78
+
+. 0 804E01B 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 75 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 3E 50 FF 75 D0 E8 BF A4 FF FF
+
+. 0 804E042 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E049 13
+. 83 EC 0C 68 42 4D 06 08 E8 BA A3 FF FF
+
+fdivs_4 ... ok
+. 0 804E056 5
+. 83 C4 10 EB 48
+
+. 0 804E0A3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FE3 5
+. E8 C3 B0 FE FF
+
+. 0 804E0AB 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 EE A2 FF FF
+
+. 0 804E102 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804E109 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 75 D8 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 3F 52 50 FF 75 D4 FF 75 D0 E8 4C A4 FF FF
+
+. 0 80485BB 84
+. DD 45 F8 DC 65 F0 DD 5D D0 8B 45 D0 8B 55 D4 81 E2 FF FF FF 7F 89 45 E0 89 55 E4 8B 45 F8 8B 55 FC 89 45 D0 89 55 D4 DD 45 D0 D9 E1 DD 05 20 38 06 08 DE C9 DD 5D D8 B8 00 00 00 00 BA 00 00 28 C0 52 50 B8 00 00 00 00 BA 00 00 00 40 52 50 E8 D1 FD FF FF
+
+. 0 804860F 20
+. 83 C4 10 DC 4D D8 DD 45 E0 D9 C9 DA E9 DF E0 F6 C4 45 74 02
+
+. 0 804E136 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E13D 13
+. 83 EC 0C 68 7A 4D 06 08 E8 C6 A2 FF FF
+
+fdivl_1 ... ok
+. 0 804E14A 5
+. 83 C4 10 EB 44
+
+. 0 804E193 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FE8 5
+. E8 AE B1 FE FF
+
+. 0 804E19B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 FE A1 FF FF
+
+. 0 804E1F2 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804E1F9 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 75 D8 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 BF 52 50 FF 75 D4 FF 75 D0 E8 5C A3 FF FF
+
+. 0 804E226 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E22D 13
+. 83 EC 0C 68 B2 4D 06 08 E8 D6 A1 FF FF
+
+fdivl_2 ... ok
+. 0 804E23A 5
+. 83 C4 10 EB 44
+
+. 0 804E283 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FED 5
+. E8 99 B2 FE FF
+
+. 0 804E28B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 0E A1 FF FF
+
+. 0 804E2E2 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804E2E9 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 75 D8 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 BF 52 50 FF 75 D4 FF 75 D0 E8 6C A2 FF FF
+
+. 0 804E316 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E31D 13
+. 83 EC 0C 68 EA 4D 06 08 E8 E6 A0 FF FF
+
+fdivl_3 ... ok
+. 0 804E32A 5
+. 83 C4 10 EB 44
+
+. 0 804E373 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FF2 5
+. E8 84 B3 FE FF
+
+. 0 804E37B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 1E A0 FF FF
+
+. 0 804E3D2 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804E3D9 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 75 D8 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 3F 52 50 FF 75 D4 FF 75 D0 E8 7C A1 FF FF
+
+. 0 804E406 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E40D 13
+. 83 EC 0C 68 22 4E 06 08 E8 F6 9F FF FF
+
+fdivl_4 ... ok
+. 0 804E41A 5
+. 83 C4 10 EB 44
+
+. 0 804E463 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FF7 5
+. E8 6F B4 FE FF
+
+. 0 804E46B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 3E 9F FF FF
+
+. 0 804E4B2 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804E4BD 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC F2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 3E 50 FF 75 D0 E8 15 A0 FF FF
+
+. 0 804E4EC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E4F3 13
+. 83 EC 0C 68 5A 4E 06 08 E8 10 9F FF FF
+
+fdiv_1 ... ok
+. 0 804E500 5
+. 83 C4 10 EB 48
+
+. 0 804E54D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8062FFC 5
+. E8 54 B5 FE FF
+
+. 0 804E555 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 54 9E FF FF
+
+. 0 804E59C 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804E5A7 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC F2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 BE 50 FF 75 D0 E8 2B 9F FF FF
+
+. 0 804E5D6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E5DD 13
+. 83 EC 0C 68 8F 4E 06 08 E8 26 9E FF FF
+
+fdiv_2 ... ok
+. 0 804E5EA 5
+. 83 C4 10 EB 48
+
+. 0 804E637 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063001 5
+. E8 39 B6 FE FF
+
+. 0 804E63F 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 6A 9D FF FF
+
+. 0 804E686 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804E691 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC F2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 BE 50 FF 75 D0 E8 41 9E FF FF
+
+. 0 804E6C0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E6C7 13
+. 83 EC 0C 68 C4 4E 06 08 E8 3C 9D FF FF
+
+fdiv_3 ... ok
+. 0 804E6D4 5
+. 83 C4 10 EB 48
+
+. 0 804E721 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063006 5
+. E8 1E B7 FE FF
+
+. 0 804E729 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 80 9C FF FF
+
+. 0 804E770 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804E77B 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC F2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 3E 50 FF 75 D0 E8 57 9D FF FF
+
+. 0 804E7AA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E7B1 13
+. 83 EC 0C 68 F9 4E 06 08 E8 52 9C FF FF
+
+fdiv_4 ... ok
+. 0 804E7BE 5
+. 83 C4 10 EB 48
+
+. 0 804E80B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806300B 5
+. E8 03 B8 FE FF
+
+. 0 804E813 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 86 9B FF FF
+
+. 0 804E86A 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804E875 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC F2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 3F 52 50 FF 75 D4 FF 75 D0 E8 D8 9C FF FF
+
+. 0 804E8AA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E8B1 13
+. 83 EC 0C 68 2E 4F 06 08 E8 52 9B FF FF
+
+fdiv_5 ... ok
+. 0 804E8BE 5
+. 83 C4 10 EB 44
+
+. 0 804E907 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063010 5
+. E8 FA B8 FE FF
+
+. 0 804E90F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 8A 9A FF FF
+
+. 0 804E966 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804E971 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC F2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 BF 52 50 FF 75 D4 FF 75 D0 E8 DC 9B FF FF
+
+. 0 804E9A6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E9AD 13
+. 83 EC 0C 68 63 4F 06 08 E8 56 9A FF FF
+
+fdiv_6 ... ok
+. 0 804E9BA 5
+. 83 C4 10 EB 44
+
+. 0 804EA03 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063015 5
+. E8 F1 B9 FE FF
+
+. 0 804EA0B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 8E 99 FF FF
+
+. 0 804EA62 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804EA6D 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC F2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 BF 52 50 FF 75 D4 FF 75 D0 E8 E0 9A FF FF
+
+. 0 804EAA2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804EAA9 13
+. 83 EC 0C 68 98 4F 06 08 E8 5A 99 FF FF
+
+fdiv_7 ... ok
+. 0 804EAB6 5
+. 83 C4 10 EB 44
+
+. 0 804EAFF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806301A 5
+. E8 E8 BA FE FF
+
+. 0 804EB07 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 92 98 FF FF
+
+. 0 804EB5E 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804EB69 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC F2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 3F 52 50 FF 75 D4 FF 75 D0 E8 E4 99 FF FF
+
+. 0 804EB9E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804EBA5 13
+. 83 EC 0C 68 CD 4F 06 08 E8 5E 98 FF FF
+
+fdiv_8 ... ok
+. 0 804EBB2 5
+. 83 C4 10 EB 44
+
+. 0 804EBFB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806301F 5
+. E8 DF BB FE FF
+
+. 0 804EC03 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 A6 97 FF FF
+
+. 0 804EC4A 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 804EC51 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 F2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 40 50 FF 75 D0 E8 85 98 FF FF
+
+. 0 804EC7C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804EC83 13
+. 83 EC 0C 68 02 50 06 08 E8 80 97 FF FF
+
+fdiv_9 ... ok
+. 0 804EC90 5
+. 83 C4 10 EB 48
+
+. 0 804ECDD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063024 5
+. E8 BC BC FE FF
+
+. 0 804ECE5 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 C4 96 FF FF
+
+. 0 804ED2C 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 804ED33 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 F2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 C0 50 FF 75 D0 E8 A3 97 FF FF
+
+. 0 804ED5E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804ED65 13
+. 83 EC 0C 68 37 50 06 08 E8 9E 96 FF FF
+
+fdiv_10 ... ok
+. 0 804ED72 5
+. 83 C4 10 EB 48
+
+. 0 804EDBF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063029 5
+. E8 99 BD FE FF
+
+. 0 804EDC7 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 E2 95 FF FF
+
+. 0 804EE0E 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 804EE15 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 F2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 C0 50 FF 75 D0 E8 C1 96 FF FF
+
+. 0 804EE40 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804EE47 13
+. 83 EC 0C 68 6F 50 06 08 E8 BC 95 FF FF
+
+fdiv_11 ... ok
+. 0 804EE54 5
+. 83 C4 10 EB 48
+
+. 0 804EEA1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806302E 5
+. E8 76 BE FE FF
+
+. 0 804EEA9 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 00 95 FF FF
+
+. 0 804EEF0 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 804EEF7 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 F2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 40 50 FF 75 D0 E8 DF 95 FF FF
+
+. 0 804EF22 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804EF29 13
+. 83 EC 0C 68 A7 50 06 08 E8 DA 94 FF FF
+
+fdiv_12 ... ok
+. 0 804EF36 5
+. 83 C4 10 EB 48
+
+. 0 804EF83 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063033 5
+. E8 53 BF FE FF
+
+. 0 804EF8B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 0E 94 FF FF
+
+. 0 804EFE2 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 804EFE9 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 F2 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 40 52 50 FF 75 D4 FF 75 D0 E8 68 95 FF FF
+
+. 0 804F01A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F021 13
+. 83 EC 0C 68 DF 50 06 08 E8 E2 93 FF FF
+
+fdiv_13 ... ok
+. 0 804F02E 5
+. 83 C4 10 EB 44
+
+. 0 804F077 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063038 5
+. E8 42 C0 FE FF
+
+. 0 804F07F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 1A 93 FF FF
+
+. 0 804F0D6 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 804F0DD 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 F2 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 C0 52 50 FF 75 D4 FF 75 D0 E8 74 94 FF FF
+
+. 0 804F10E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F115 13
+. 83 EC 0C 68 17 51 06 08 E8 EE 92 FF FF
+
+fdiv_14 ... ok
+. 0 804F122 5
+. 83 C4 10 EB 44
+
+. 0 804F16B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806303D 5
+. E8 31 C1 FE FF
+
+. 0 804F173 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 26 92 FF FF
+
+. 0 804F1CA 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 804F1D1 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 F2 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 C0 52 50 FF 75 D4 FF 75 D0 E8 80 93 FF FF
+
+. 0 804F202 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F209 13
+. 83 EC 0C 68 4F 51 06 08 E8 FA 91 FF FF
+
+fdiv_15 ... ok
+. 0 804F216 5
+. 83 C4 10 EB 44
+
+. 0 804F25F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063042 5
+. E8 20 C2 FE FF
+
+. 0 804F267 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 32 91 FF FF
+
+. 0 804F2BE 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 804F2C5 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 F2 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 40 52 50 FF 75 D4 FF 75 D0 E8 8C 92 FF FF
+
+. 0 804F2F6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F2FD 13
+. 83 EC 0C 68 87 51 06 08 E8 06 91 FF FF
+
+fdiv_16 ... ok
+. 0 804F30A 5
+. 83 C4 10 EB 44
+
+. 0 804F353 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063047 5
+. E8 0F C3 FE FF
+
+. 0 804F35B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 4E 90 FF FF
+
+. 0 804F3A2 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 804F3A9 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE F2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 3E 50 FF 75 D0 E8 2B 91 FF FF
+
+. 0 804F3D6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F3DD 13
+. 83 EC 0C 68 BF 51 06 08 E8 26 90 FF FF
+
+fdivp_1 ... ok
+. 0 804F3EA 5
+. 83 C4 10 EB 48
+
+. 0 804F437 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806304C 5
+. E8 EE C3 FE FF
+
+. 0 804F43F 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 6A 8F FF FF
+
+. 0 804F486 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 804F48D 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE F2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 BE 50 FF 75 D0 E8 47 90 FF FF
+
+. 0 804F4BA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F4C1 13
+. 83 EC 0C 68 F7 51 06 08 E8 42 8F FF FF
+
+fdivp_2 ... ok
+. 0 804F4CE 5
+. 83 C4 10 EB 48
+
+. 0 804F51B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063051 5
+. E8 CD C4 FE FF
+
+. 0 804F523 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 86 8E FF FF
+
+. 0 804F56A 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 804F571 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE F2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 BE 50 FF 75 D0 E8 63 8F FF FF
+
+. 0 804F59E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F5A5 13
+. 83 EC 0C 68 2F 52 06 08 E8 5E 8E FF FF
+
+fdivp_3 ... ok
+. 0 804F5B2 5
+. 83 C4 10 EB 48
+
+. 0 804F5FF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063056 5
+. E8 AC C5 FE FF
+
+. 0 804F607 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 A2 8D FF FF
+
+. 0 804F64E 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 804F655 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE F2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 3E 50 FF 75 D0 E8 7F 8E FF FF
+
+. 0 804F682 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F689 13
+. 83 EC 0C 68 67 52 06 08 E8 7A 8D FF FF
+
+fdivp_4 ... ok
+. 0 804F696 5
+. 83 C4 10 EB 48
+
+. 0 804F6E3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806305B 5
+. E8 8B C6 FE FF
+
+. 0 804F6EB 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 AE 8C FF FF
+
+. 0 804F742 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804F74D 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE F2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 3F 52 50 FF 75 D4 FF 75 D0 E8 02 8E FF FF
+
+. 0 804F780 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F787 13
+. 83 EC 0C 68 9F 52 06 08 E8 7C 8C FF FF
+
+fdivp_5 ... ok
+. 0 804F794 5
+. 83 C4 10 EB 44
+
+. 0 804F7DD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063060 5
+. E8 80 C7 FE FF
+
+. 0 804F7E5 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 B4 8B FF FF
+
+. 0 804F83C 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804F847 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE F2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 BF 52 50 FF 75 D4 FF 75 D0 E8 08 8D FF FF
+
+. 0 804F87A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F881 13
+. 83 EC 0C 68 D7 52 06 08 E8 82 8B FF FF
+
+fdivp_6 ... ok
+. 0 804F88E 5
+. 83 C4 10 EB 44
+
+. 0 804F8D7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063065 5
+. E8 75 C8 FE FF
+
+. 0 804F8DF 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 BA 8A FF FF
+
+. 0 804F936 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804F941 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE F2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 BF 52 50 FF 75 D4 FF 75 D0 E8 0E 8C FF FF
+
+. 0 804F974 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F97B 13
+. 83 EC 0C 68 0F 53 06 08 E8 88 8A FF FF
+
+fdivp_7 ... ok
+. 0 804F988 5
+. 83 C4 10 EB 44
+
+. 0 804F9D1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806306A 5
+. E8 6A C9 FE FF
+
+. 0 804F9D9 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 C0 89 FF FF
+
+. 0 804FA30 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 804FA3B 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE F2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 3F 52 50 FF 75 D4 FF 75 D0 E8 14 8B FF FF
+
+. 0 804FA6E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804FA75 13
+. 83 EC 0C 68 47 53 06 08 E8 8E 89 FF FF
+
+fdivp_8 ... ok
+. 0 804FA82 5
+. 83 C4 10 EB 44
+
+. 0 804FACB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806306F 5
+. E8 5F CA FE FF
+
+. 0 804FAD3 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 D6 88 FF FF
+
+. 0 804FB1A 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804FB21 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE F1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 3E 50 FF 75 D0 E8 B7 89 FF FF
+
+. 0 804FB4A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804FB51 13
+. 83 EC 0C 68 7F 53 06 08 E8 B2 88 FF FF
+
+fdivp_9 ... ok
+. 0 804FB5E 5
+. 83 C4 10 EB 48
+
+. 0 804FBAB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063074 5
+. E8 3A CB FE FF
+
+. 0 804FBB3 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 F6 87 FF FF
+
+. 0 804FBFA 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804FC01 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE F1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 BE 50 FF 75 D0 E8 D7 88 FF FF
+
+. 0 804FC2A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804FC31 13
+. 83 EC 0C 68 B7 53 06 08 E8 D2 87 FF FF
+
+fdivp_10 ... ok
+. 0 804FC3E 5
+. 83 C4 10 EB 48
+
+. 0 804FC8B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063079 5
+. E8 15 CC FE FF
+
+. 0 804FC93 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 16 87 FF FF
+
+. 0 804FCDA 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804FCE1 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE F1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 BE 50 FF 75 D0 E8 F7 87 FF FF
+
+. 0 804FD0A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804FD11 13
+. 83 EC 0C 68 F2 53 06 08 E8 F2 86 FF FF
+
+fdivp_11 ... ok
+. 0 804FD1E 5
+. 83 C4 10 EB 48
+
+. 0 804FD6B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806307E 5
+. E8 F0 CC FE FF
+
+. 0 804FD73 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 36 86 FF FF
+
+. 0 804FDBA 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804FDC1 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE F1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 3E 50 FF 75 D0 E8 17 87 FF FF
+
+. 0 804FDEA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804FDF1 13
+. 83 EC 0C 68 2D 54 06 08 E8 12 86 FF FF
+
+fdivp_12 ... ok
+. 0 804FDFE 5
+. 83 C4 10 EB 48
+
+. 0 804FE4B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063083 5
+. E8 CB CD FE FF
+
+. 0 804FE53 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 46 85 FF FF
+
+. 0 804FEAA 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 804FEB1 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE F1 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 3F 52 50 FF 75 D4 FF 75 D0 E8 A2 86 FF FF
+
+. 0 804FEE0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804FEE7 13
+. 83 EC 0C 68 68 54 06 08 E8 1C 85 FF FF
+
+fdivp_13 ... ok
+. 0 804FEF4 5
+. 83 C4 10 EB 44
+
+. 0 804FF3D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063088 5
+. E8 B8 CE FE FF
+
+. 0 804FF45 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 54 84 FF FF
+
+. 0 804FF9C 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 804FFA3 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE F1 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 BF 52 50 FF 75 D4 FF 75 D0 E8 B0 85 FF FF
+
+. 0 804FFD2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804FFD9 13
+. 83 EC 0C 68 A3 54 06 08 E8 2A 84 FF FF
+
+fdivp_14 ... ok
+. 0 804FFE6 5
+. 83 C4 10 EB 44
+
+. 0 805002F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806308D 5
+. E8 A5 CF FE FF
+
+. 0 8050037 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 62 83 FF FF
+
+. 0 805008E 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8050095 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE F1 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 BF 52 50 FF 75 D4 FF 75 D0 E8 BE 84 FF FF
+
+. 0 80500C4 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80500CB 13
+. 83 EC 0C 68 DE 54 06 08 E8 38 83 FF FF
+
+fdivp_15 ... ok
+. 0 80500D8 5
+. 83 C4 10 EB 44
+
+. 0 8050121 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063092 5
+. E8 92 D0 FE FF
+
+. 0 8050129 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 70 82 FF FF
+
+. 0 8050180 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8050187 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE F1 DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 3F 52 50 FF 75 D4 FF 75 D0 E8 CC 83 FF FF
+
+. 0 80501B6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80501BD 13
+. 83 EC 0C 68 19 55 06 08 E8 46 82 FF FF
+
+fdivp_16 ... ok
+. 0 80501CA 5
+. 83 C4 10 EB 44
+
+. 0 8050213 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063097 5
+. E8 7F D1 FE FF
+
+. 0 805021B 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 98 81 FF FF
+
+. 0 8050258 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805025F 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 75 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 08 49 92 3E 50 FF 75 D0 E8 7B 82 FF FF
+
+. 0 8050286 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805028D 13
+. 83 EC 0C 68 54 55 06 08 E8 76 81 FF FF
+
+fidivs_1 ... ok
+. 0 805029A 5
+. 83 C4 10 EB 48
+
+. 0 80502E7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806309C 5
+. E8 4E D2 FE FF
+
+. 0 80502EF 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 C4 80 FF FF
+
+. 0 805032C 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8050333 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 75 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 08 49 92 BE 50 FF 75 D0 E8 A7 81 FF FF
+
+. 0 805035A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050361 13
+. 83 EC 0C 68 8F 55 06 08 E8 A2 80 FF FF
+
+fidivs_2 ... ok
+. 0 805036E 5
+. 83 C4 10 EB 48
+
+. 0 80503BB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630A1 5
+. E8 1D D3 FE FF
+
+. 0 80503C3 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 F0 7F FF FF
+
+. 0 8050400 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8050407 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 75 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 08 49 92 BE 50 FF 75 D0 E8 D3 80 FF FF
+
+. 0 805042E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050435 13
+. 83 EC 0C 68 CA 55 06 08 E8 CE 7F FF FF
+
+fidivs_3 ... ok
+. 0 8050442 5
+. 83 C4 10 EB 48
+
+. 0 805048F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630A6 5
+. E8 EC D3 FE FF
+
+. 0 8050497 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 1C 7F FF FF
+
+. 0 80504D4 7
+. 83 C4 10 85 C0 75 78
+
+. 0 80504DB 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 75 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 08 49 92 3E 50 FF 75 D0 E8 FF 7F FF FF
+
+. 0 8050502 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050509 13
+. 83 EC 0C 68 05 56 06 08 E8 FA 7E FF FF
+
+fidivs_4 ... ok
+. 0 8050516 5
+. 83 C4 10 EB 48
+
+. 0 8050563 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630AB 5
+. E8 BB D4 FE FF
+
+. 0 805056B 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 40 7E FF FF
+
+. 0 80505B0 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 80505B7 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 75 DE DD 5D D0 DD A5 58 FF FF FF B8 2A 8D EC 3D BA 6A DB 71 40 52 50 FF 75 D4 FF 75 D0 E8 9E 7F FF FF
+
+. 0 80505E4 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80505EB 13
+. 83 EC 0C 68 40 56 06 08 E8 18 7E FF FF
+
+fidivs_5 ... ok
+. 0 80505F8 5
+. 83 C4 10 EB 44
+
+. 0 8050641 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630B0 5
+. E8 94 D5 FE FF
+
+. 0 8050649 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 62 7D FF FF
+
+. 0 805068E 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8050695 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 75 DE DD 5D D0 DD A5 58 FF FF FF B8 2A 8D EC 3D BA 6A DB 71 C0 52 50 FF 75 D4 FF 75 D0 E8 C0 7E FF FF
+
+. 0 80506C2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80506C9 13
+. 83 EC 0C 68 7B 56 06 08 E8 3A 7D FF FF
+
+fidivs_6 ... ok
+. 0 80506D6 5
+. 83 C4 10 EB 44
+
+. 0 805071F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630B5 5
+. E8 6D D6 FE FF
+
+. 0 8050727 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 84 7C FF FF
+
+. 0 805076C 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8050773 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 75 DE DD 5D D0 DD A5 58 FF FF FF B8 2A 8D EC 3D BA 6A DB 71 C0 52 50 FF 75 D4 FF 75 D0 E8 E2 7D FF FF
+
+. 0 80507A0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80507A7 13
+. 83 EC 0C 68 B6 56 06 08 E8 5C 7C FF FF
+
+fidivs_7 ... ok
+. 0 80507B4 5
+. 83 C4 10 EB 44
+
+. 0 80507FD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630BA 5
+. E8 46 D7 FE FF
+
+. 0 8050805 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 A6 7B FF FF
+
+. 0 805084A 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8050851 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 75 DE DD 5D D0 DD A5 58 FF FF FF B8 2A 8D EC 3D BA 6A DB 71 40 52 50 FF 75 D4 FF 75 D0 E8 04 7D FF FF
+
+. 0 805087E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050885 13
+. 83 EC 0C 68 F1 56 06 08 E8 7E 7B FF FF
+
+fidivs_8 ... ok
+. 0 8050892 5
+. 83 C4 10 EB 44
+
+. 0 80508DB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630BF 5
+. E8 1F D8 FE FF
+
+. 0 80508E3 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 CE 7A FF FF
+
+. 0 8050922 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8050929 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 75 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 7E 4C 6C 37 50 FF 75 D0 E8 B1 7B FF FF
+
+. 0 8050950 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050957 13
+. 83 EC 0C 68 2C 57 06 08 E8 AC 7A FF FF
+
+fidivl_1 ... ok
+. 0 8050964 5
+. 83 C4 10 EB 48
+
+. 0 80509B1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630C4 5
+. E8 F0 D8 FE FF
+
+. 0 80509B9 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 F8 79 FF FF
+
+. 0 80509F8 7
+. 83 C4 10 85 C0 75 78
+
+. 0 80509FF 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 75 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 7E 4C 6C B7 50 FF 75 D0 E8 DB 7A FF FF
+
+. 0 8050A26 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050A2D 13
+. 83 EC 0C 68 67 57 06 08 E8 D6 79 FF FF
+
+fidivl_2 ... ok
+. 0 8050A3A 5
+. 83 C4 10 EB 48
+
+. 0 8050A87 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630C9 5
+. E8 C1 D9 FE FF
+
+. 0 8050A8F 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 22 79 FF FF
+
+. 0 8050ACE 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8050AD5 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 75 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 7E 4C 6C B7 50 FF 75 D0 E8 05 7A FF FF
+
+. 0 8050AFC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050B03 13
+. 83 EC 0C 68 A2 57 06 08 E8 00 79 FF FF
+
+fidivl_3 ... ok
+. 0 8050B10 5
+. 83 C4 10 EB 48
+
+. 0 8050B5D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630CE 5
+. E8 92 DA FE FF
+
+. 0 8050B65 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 4C 78 FF FF
+
+. 0 8050BA4 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8050BAB 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 75 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 7E 4C 6C 37 50 FF 75 D0 E8 2F 79 FF FF
+
+. 0 8050BD2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050BD9 13
+. 83 EC 0C 68 DD 57 06 08 E8 2A 78 FF FF
+
+fidivl_4 ... ok
+. 0 8050BE6 5
+. 83 C4 10 EB 48
+
+. 0 8050C33 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630D3 5
+. E8 63 DB FE FF
+
+. 0 8050C3B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC F1 FB 09 00 83 EC 08 6A 01 68 40 A1 06 08 E8 6E 77 FF FF
+
+. 0 8050C82 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8050C89 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 75 DC DD 5D D0 DD A5 58 FF FF FF B8 17 FD 2E 07 BA 4D 30 FE 3F 52 50 FF 75 D4 FF 75 D0 E8 CC 78 FF FF
+
+. 0 8050CB6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050CBD 13
+. 83 EC 0C 68 18 58 06 08 E8 46 77 FF FF
+
+fidivl_5 ... ok
+. 0 8050CCA 5
+. 83 C4 10 EB 44
+
+. 0 8050D13 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630D8 5
+. E8 3E DC FE FF
+
+. 0 8050D1B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC F1 FB 09 00 83 EC 08 6A 01 68 40 A1 06 08 E8 8E 76 FF FF
+
+. 0 8050D62 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8050D69 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 75 DC DD 5D D0 DD A5 58 FF FF FF B8 17 FD 2E 07 BA 4D 30 FE BF 52 50 FF 75 D4 FF 75 D0 E8 EC 77 FF FF
+
+. 0 8050D96 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050D9D 13
+. 83 EC 0C 68 53 58 06 08 E8 66 76 FF FF
+
+fidivl_6 ... ok
+. 0 8050DAA 5
+. 83 C4 10 EB 44
+
+. 0 8050DF3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630DD 5
+. E8 19 DD FE FF
+
+. 0 8050DFB 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC 0F 04 F6 FF 83 EC 08 6A 01 68 40 A1 06 08 E8 AE 75 FF FF
+
+. 0 8050E42 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8050E49 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 75 DC DD 5D D0 DD A5 58 FF FF FF B8 17 FD 2E 07 BA 4D 30 FE BF 52 50 FF 75 D4 FF 75 D0 E8 0C 77 FF FF
+
+. 0 8050E76 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050E7D 13
+. 83 EC 0C 68 8E 58 06 08 E8 86 75 FF FF
+
+fidivl_7 ... ok
+. 0 8050E8A 5
+. 83 C4 10 EB 44
+
+. 0 8050ED3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630E2 5
+. E8 F4 DD FE FF
+
+. 0 8050EDB 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC 0F 04 F6 FF 83 EC 08 6A 01 68 40 A1 06 08 E8 CE 74 FF FF
+
+. 0 8050F22 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8050F29 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 75 DC DD 5D D0 DD A5 58 FF FF FF B8 17 FD 2E 07 BA 4D 30 FE 3F 52 50 FF 75 D4 FF 75 D0 E8 2C 76 FF FF
+
+. 0 8050F56 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8050F5D 13
+. 83 EC 0C 68 C9 58 06 08 E8 A6 74 FF FF
+
+fidivl_8 ... ok
+. 0 8050F6A 5
+. 83 C4 10 EB 44
+
+. 0 8050FB3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630E7 5
+. E8 CF DE FE FF
+
+. 0 8050FBB 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 F5 73 FF FF
+
+. 0 8050FFB 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8051002 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 7D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 40 50 FF 75 D0 E8 D8 74 FF FF
+
+. 0 8051029 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051030 13
+. 83 EC 0C 68 04 59 06 08 E8 D3 73 FF FF
+
+fdivrs_1 ... ok
+. 0 805103D 5
+. 83 C4 10 EB 48
+
+. 0 805108A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630EC 5
+. E8 A1 DF FE FF
+
+. 0 8051092 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 1E 73 FF FF
+
+. 0 80510D2 7
+. 83 C4 10 85 C0 75 78
+
+. 0 80510D9 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 7D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 C0 50 FF 75 D0 E8 01 74 FF FF
+
+. 0 8051100 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051107 13
+. 83 EC 0C 68 3F 59 06 08 E8 FC 72 FF FF
+
+fdivrs_2 ... ok
+. 0 8051114 5
+. 83 C4 10 EB 48
+
+. 0 8051161 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630F1 5
+. E8 73 E0 FE FF
+
+. 0 8051169 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 47 72 FF FF
+
+. 0 80511A9 7
+. 83 C4 10 85 C0 75 78
+
+. 0 80511B0 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 7D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 C0 50 FF 75 D0 E8 2A 73 FF FF
+
+. 0 80511D7 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80511DE 13
+. 83 EC 0C 68 7A 59 06 08 E8 25 72 FF FF
+
+fdivrs_3 ... ok
+. 0 80511EB 5
+. 83 C4 10 EB 48
+
+. 0 8051238 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630F6 5
+. E8 45 E1 FE FF
+
+. 0 8051240 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 70 71 FF FF
+
+. 0 8051280 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8051287 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 7D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 40 50 FF 75 D0 E8 53 72 FF FF
+
+. 0 80512AE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80512B5 13
+. 83 EC 0C 68 B5 59 06 08 E8 4E 71 FF FF
+
+fdivrs_4 ... ok
+. 0 80512C2 5
+. 83 C4 10 EB 48
+
+. 0 805130F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80630FB 5
+. E8 17 E2 FE FF
+
+. 0 8051317 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 82 70 FF FF
+
+. 0 805136E 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8051375 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 7D D8 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 40 52 50 FF 75 D4 FF 75 D0 E8 E0 71 FF FF
+
+. 0 80513A2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80513A9 13
+. 83 EC 0C 68 F0 59 06 08 E8 5A 70 FF FF
+
+fdivrl_1 ... ok
+. 0 80513B6 5
+. 83 C4 10 EB 44
+
+. 0 80513FF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063100 5
+. E8 02 E3 FE FF
+
+. 0 8051407 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 92 6F FF FF
+
+. 0 805145E 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8051465 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 7D D8 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 C0 52 50 FF 75 D4 FF 75 D0 E8 F0 70 FF FF
+
+. 0 8051492 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051499 13
+. 83 EC 0C 68 2B 5A 06 08 E8 6A 6F FF FF
+
+fdivrl_2 ... ok
+. 0 80514A6 5
+. 83 C4 10 EB 44
+
+. 0 80514EF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063105 5
+. E8 ED E3 FE FF
+
+. 0 80514F7 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 A2 6E FF FF
+
+. 0 805154E 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8051555 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 7D D8 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 C0 52 50 FF 75 D4 FF 75 D0 E8 00 70 FF FF
+
+. 0 8051582 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051589 13
+. 83 EC 0C 68 66 5A 06 08 E8 7A 6E FF FF
+
+fdivrl_3 ... ok
+. 0 8051596 5
+. 83 C4 10 EB 44
+
+. 0 80515DF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806310A 5
+. E8 D8 E4 FE FF
+
+. 0 80515E7 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 B2 6D FF FF
+
+. 0 805163E 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8051645 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 7D D8 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 40 52 50 FF 75 D4 FF 75 D0 E8 10 6F FF FF
+
+. 0 8051672 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051679 13
+. 83 EC 0C 68 A1 5A 06 08 E8 8A 6D FF FF
+
+fdivrl_4 ... ok
+. 0 8051686 5
+. 83 C4 10 EB 44
+
+. 0 80516CF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806310F 5
+. E8 C3 E5 FE FF
+
+. 0 80516D7 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 D2 6C FF FF
+
+. 0 805171E 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8051729 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC FA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 40 50 FF 75 D0 E8 A9 6D FF FF
+
+. 0 8051758 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805175F 13
+. 83 EC 0C 68 DC 5A 06 08 E8 A4 6C FF FF
+
+fdivr_1 ... ok
+. 0 805176C 5
+. 83 C4 10 EB 48
+
+. 0 80517B9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063114 5
+. E8 A8 E6 FE FF
+
+. 0 80517C1 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 E8 6B FF FF
+
+. 0 8051808 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8051813 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC FA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 C0 50 FF 75 D0 E8 BF 6C FF FF
+
+. 0 8051842 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051849 13
+. 83 EC 0C 68 14 5B 06 08 E8 BA 6B FF FF
+
+fdivr_2 ... ok
+. 0 8051856 5
+. 83 C4 10 EB 48
+
+. 0 80518A3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063119 5
+. E8 8D E7 FE FF
+
+. 0 80518AB 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 FE 6A FF FF
+
+. 0 80518F2 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 80518FD 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC FA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 C0 50 FF 75 D0 E8 D5 6B FF FF
+
+. 0 805192C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051933 13
+. 83 EC 0C 68 4C 5B 06 08 E8 D0 6A FF FF
+
+fdivr_3 ... ok
+. 0 8051940 5
+. 83 C4 10 EB 48
+
+. 0 805198D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806311E 5
+. E8 72 E8 FE FF
+
+. 0 8051995 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 14 6A FF FF
+
+. 0 80519DC 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 80519E7 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC FA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 40 50 FF 75 D0 E8 EB 6A FF FF
+
+. 0 8051A16 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051A1D 13
+. 83 EC 0C 68 84 5B 06 08 E8 E6 69 FF FF
+
+fdivr_4 ... ok
+. 0 8051A2A 5
+. 83 C4 10 EB 48
+
+. 0 8051A77 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063123 5
+. E8 57 E9 FE FF
+
+. 0 8051A7F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 1A 69 FF FF
+
+. 0 8051AD6 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 8051AE1 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC FA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 40 52 50 FF 75 D4 FF 75 D0 E8 6C 6A FF FF
+
+. 0 8051B16 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051B1D 13
+. 83 EC 0C 68 BC 5B 06 08 E8 E6 68 FF FF
+
+fdivr_5 ... ok
+. 0 8051B2A 5
+. 83 C4 10 EB 44
+
+. 0 8051B73 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063128 5
+. E8 4E EA FE FF
+
+. 0 8051B7B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 1E 68 FF FF
+
+. 0 8051BD2 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 8051BDD 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC FA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 C0 52 50 FF 75 D4 FF 75 D0 E8 70 69 FF FF
+
+. 0 8051C12 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051C19 13
+. 83 EC 0C 68 F4 5B 06 08 E8 EA 67 FF FF
+
+fdivr_6 ... ok
+. 0 8051C26 5
+. 83 C4 10 EB 44
+
+. 0 8051C6F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806312D 5
+. E8 45 EB FE FF
+
+. 0 8051C77 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 22 67 FF FF
+
+. 0 8051CCE 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 8051CD9 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC FA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 C0 52 50 FF 75 D4 FF 75 D0 E8 74 68 FF FF
+
+. 0 8051D0E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051D15 13
+. 83 EC 0C 68 2C 5C 06 08 E8 EE 66 FF FF
+
+fdivr_7 ... ok
+. 0 8051D22 5
+. 83 C4 10 EB 44
+
+. 0 8051D6B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063132 5
+. E8 3C EC FE FF
+
+. 0 8051D73 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 26 66 FF FF
+
+. 0 8051DCA 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 8051DD5 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC FA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 40 52 50 FF 75 D4 FF 75 D0 E8 78 67 FF FF
+
+. 0 8051E0A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051E11 13
+. 83 EC 0C 68 64 5C 06 08 E8 F2 65 FF FF
+
+fdivr_8 ... ok
+. 0 8051E1E 5
+. 83 C4 10 EB 44
+
+. 0 8051E67 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063137 5
+. E8 33 ED FE FF
+
+. 0 8051E6F 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 3A 65 FF FF
+
+. 0 8051EB6 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8051EBD 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 FA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 3E 50 FF 75 D0 E8 19 66 FF FF
+
+. 0 8051EE8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051EEF 13
+. 83 EC 0C 68 9C 5C 06 08 E8 14 65 FF FF
+
+fdivr_9 ... ok
+. 0 8051EFC 5
+. 83 C4 10 EB 48
+
+. 0 8051F49 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806313C 5
+. E8 10 EE FE FF
+
+. 0 8051F51 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 58 64 FF FF
+
+. 0 8051F98 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8051F9F 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 FA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 BE 50 FF 75 D0 E8 37 65 FF FF
+
+. 0 8051FCA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8051FD1 13
+. 83 EC 0C 68 D4 5C 06 08 E8 32 64 FF FF
+
+fdivr_10 ... ok
+. 0 8051FDE 5
+. 83 C4 10 EB 48
+
+. 0 805202B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063141 5
+. E8 ED EE FE FF
+
+. 0 8052033 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 76 63 FF FF
+
+. 0 805207A 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8052081 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 FA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 BE 50 FF 75 D0 E8 55 64 FF FF
+
+. 0 80520AC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80520B3 13
+. 83 EC 0C 68 0F 5D 06 08 E8 50 63 FF FF
+
+fdivr_11 ... ok
+. 0 80520C0 5
+. 83 C4 10 EB 48
+
+. 0 805210D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063146 5
+. E8 CA EF FE FF
+
+. 0 8052115 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 94 62 FF FF
+
+. 0 805215C 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8052163 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 FA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 B0 39 10 3E 50 FF 75 D0 E8 73 63 FF FF
+
+. 0 805218E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052195 13
+. 83 EC 0C 68 4A 5D 06 08 E8 6E 62 FF FF
+
+fdivr_12 ... ok
+. 0 80521A2 5
+. 83 C4 10 EB 48
+
+. 0 80521EF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806314B 5
+. E8 A7 F0 FE FF
+
+. 0 80521F7 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 A2 61 FF FF
+
+. 0 805224E 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8052255 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 FA DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 3F 52 50 FF 75 D4 FF 75 D0 E8 FC 62 FF FF
+
+. 0 8052286 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805228D 13
+. 83 EC 0C 68 85 5D 06 08 E8 76 61 FF FF
+
+fdivr_13 ... ok
+. 0 805229A 5
+. 83 C4 10 EB 44
+
+. 0 80522E3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063150 5
+. E8 96 F1 FE FF
+
+. 0 80522EB 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 AE 60 FF FF
+
+. 0 8052342 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8052349 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 FA DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 BF 52 50 FF 75 D4 FF 75 D0 E8 08 62 FF FF
+
+. 0 805237A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052381 13
+. 83 EC 0C 68 C0 5D 06 08 E8 82 60 FF FF
+
+fdivr_14 ... ok
+. 0 805238E 5
+. 83 C4 10 EB 44
+
+. 0 80523D7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063155 5
+. E8 85 F2 FE FF
+
+. 0 80523DF 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 BA 5F FF FF
+
+. 0 8052436 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 805243D 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 FA DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 BF 52 50 FF 75 D4 FF 75 D0 E8 14 61 FF FF
+
+. 0 805246E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052475 13
+. 83 EC 0C 68 FB 5D 06 08 E8 8E 5F FF FF
+
+fdivr_15 ... ok
+. 0 8052482 5
+. 83 C4 10 EB 44
+
+. 0 80524CB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806315A 5
+. E8 74 F3 FE FF
+
+. 0 80524D3 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 C6 5E FF FF
+
+. 0 805252A 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8052531 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 FA DD 5D D0 DD A5 58 FF FF FF B8 DB AA 13 1E BA 29 A5 C4 3F 52 50 FF 75 D4 FF 75 D0 E8 20 60 FF FF
+
+. 0 8052562 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052569 13
+. 83 EC 0C 68 36 5E 06 08 E8 9A 5E FF FF
+
+fdivr_16 ... ok
+. 0 8052576 5
+. 83 C4 10 EB 44
+
+. 0 80525BF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806315F 5
+. E8 63 F4 FE FF
+
+. 0 80525C7 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 E2 5D FF FF
+
+. 0 805260E 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8052615 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE FA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 40 50 FF 75 D0 E8 BF 5E FF FF
+
+. 0 8052642 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052649 13
+. 83 EC 0C 68 71 5E 06 08 E8 BA 5D FF FF
+
+fdivrp_1 ... ok
+. 0 8052656 5
+. 83 C4 10 EB 48
+
+. 0 80526A3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063164 5
+. E8 42 F5 FE FF
+
+. 0 80526AB 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 FE 5C FF FF
+
+. 0 80526F2 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 80526F9 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE FA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 C0 50 FF 75 D0 E8 DB 5D FF FF
+
+. 0 8052726 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805272D 13
+. 83 EC 0C 68 AC 5E 06 08 E8 D6 5C FF FF
+
+fdivrp_2 ... ok
+. 0 805273A 5
+. 83 C4 10 EB 48
+
+. 0 8052787 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063169 5
+. E8 21 F6 FE FF
+
+. 0 805278F 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 1A 5C FF FF
+
+. 0 80527D6 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 80527DD 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE FA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 C0 50 FF 75 D0 E8 F7 5C FF FF
+
+. 0 805280A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052811 13
+. 83 EC 0C 68 E7 5E 06 08 E8 F2 5B FF FF
+
+fdivrp_3 ... ok
+. 0 805281E 5
+. 83 C4 10 EB 48
+
+. 0 805286B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806316E 5
+. E8 00 F7 FE FF
+
+. 0 8052873 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 36 5B FF FF
+
+. 0 80528BA 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 80528C1 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE FA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 40 50 FF 75 D0 E8 13 5C FF FF
+
+. 0 80528EE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80528F5 13
+. 83 EC 0C 68 22 5F 06 08 E8 0E 5B FF FF
+
+fdivrp_4 ... ok
+. 0 8052902 5
+. 83 C4 10 EB 48
+
+. 0 805294F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063173 5
+. E8 DF F7 FE FF
+
+. 0 8052957 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 42 5A FF FF
+
+. 0 80529AE 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 80529B9 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE FA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 40 52 50 FF 75 D4 FF 75 D0 E8 96 5B FF FF
+
+. 0 80529EC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80529F3 13
+. 83 EC 0C 68 5D 5F 06 08 E8 10 5A FF FF
+
+fdivrp_5 ... ok
+. 0 8052A00 5
+. 83 C4 10 EB 44
+
+. 0 8052A49 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063178 5
+. E8 D4 F8 FE FF
+
+. 0 8052A51 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 48 59 FF FF
+
+. 0 8052AA8 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8052AB3 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE FA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 C0 52 50 FF 75 D4 FF 75 D0 E8 9C 5A FF FF
+
+. 0 8052AE6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052AED 13
+. 83 EC 0C 68 98 5F 06 08 E8 16 59 FF FF
+
+fdivrp_6 ... ok
+. 0 8052AFA 5
+. 83 C4 10 EB 44
+
+. 0 8052B43 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806317D 5
+. E8 C9 F9 FE FF
+
+. 0 8052B4B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 4E 58 FF FF
+
+. 0 8052BA2 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8052BAD 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE FA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 C0 52 50 FF 75 D4 FF 75 D0 E8 A2 59 FF FF
+
+. 0 8052BE0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052BE7 13
+. 83 EC 0C 68 D3 5F 06 08 E8 1C 58 FF FF
+
+fdivrp_7 ... ok
+. 0 8052BF4 5
+. 83 C4 10 EB 44
+
+. 0 8052C3D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063182 5
+. E8 BE FA FE FF
+
+. 0 8052C45 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 54 57 FF FF
+
+. 0 8052C9C 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8052CA7 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE FA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 40 52 50 FF 75 D4 FF 75 D0 E8 A8 58 FF FF
+
+. 0 8052CDA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052CE1 13
+. 83 EC 0C 68 0E 60 06 08 E8 22 57 FF FF
+
+fdivrp_8 ... ok
+. 0 8052CEE 5
+. 83 C4 10 EB 44
+
+. 0 8052D37 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063187 5
+. E8 B3 FB FE FF
+
+. 0 8052D3F 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 6A 56 FF FF
+
+. 0 8052D86 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8052D8D 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE F9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 40 50 FF 75 D0 E8 4B 57 FF FF
+
+. 0 8052DB6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052DBD 13
+. 83 EC 0C 68 49 60 06 08 E8 46 56 FF FF
+
+fdivrp_9 ... ok
+. 0 8052DCA 5
+. 83 C4 10 EB 48
+
+. 0 8052E17 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806318C 5
+. E8 8E FC FE FF
+
+. 0 8052E1F 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 8A 55 FF FF
+
+. 0 8052E66 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8052E6D 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE F9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 C0 50 FF 75 D0 E8 6B 56 FF FF
+
+. 0 8052E96 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052E9D 13
+. 83 EC 0C 68 84 60 06 08 E8 66 55 FF FF
+
+fdivrp_10 ... ok
+. 0 8052EAA 5
+. 83 C4 10 EB 48
+
+. 0 8052EF7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063191 5
+. E8 69 FD FE FF
+
+. 0 8052EFF 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 AA 54 FF FF
+
+. 0 8052F46 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8052F4D 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE F9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 C0 50 FF 75 D0 E8 8B 55 FF FF
+
+. 0 8052F76 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8052F7D 13
+. 83 EC 0C 68 C2 60 06 08 E8 86 54 FF FF
+
+fdivrp_11 ... ok
+. 0 8052F8A 5
+. 83 C4 10 EB 48
+
+. 0 8052FD7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063196 5
+. E8 44 FE FE FF
+
+. 0 8052FDF 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 CA 53 FF FF
+
+. 0 8053026 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805302D 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE F9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 34 33 E3 40 50 FF 75 D0 E8 AB 54 FF FF
+
+. 0 8053056 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805305D 13
+. 83 EC 0C 68 00 61 06 08 E8 A6 53 FF FF
+
+fdivrp_12 ... ok
+. 0 805306A 5
+. 83 C4 10 EB 48
+
+. 0 80530B7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806319B 5
+. E8 1F FF FE FF
+
+. 0 80530BF 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 DA 52 FF FF
+
+. 0 8053116 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805311D 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE F9 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 40 52 50 FF 75 D4 FF 75 D0 E8 36 54 FF FF
+
+. 0 805314C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053153 13
+. 83 EC 0C 68 3E 61 06 08 E8 B0 52 FF FF
+
+fdivrp_13 ... ok
+. 0 8053160 5
+. 83 C4 10 EB 44
+
+. 0 80531A9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631A0 5
+. E8 0C 00 FF FF
+
+. 0 80531B1 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 E8 51 FF FF
+
+. 0 8053208 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805320F 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE F9 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 C0 52 50 FF 75 D4 FF 75 D0 E8 44 53 FF FF
+
+. 0 805323E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053245 13
+. 83 EC 0C 68 7C 61 06 08 E8 BE 51 FF FF
+
+fdivrp_14 ... ok
+. 0 8053252 5
+. 83 C4 10 EB 44
+
+. 0 805329B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631A5 5
+. E8 F9 00 FF FF
+
+. 0 80532A3 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 F6 50 FF FF
+
+. 0 80532FA 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8053301 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE F9 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 C0 52 50 FF 75 D4 FF 75 D0 E8 52 52 FF FF
+
+. 0 8053330 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053337 13
+. 83 EC 0C 68 BA 61 06 08 E8 CC 50 FF FF
+
+fdivrp_15 ... ok
+. 0 8053344 5
+. 83 C4 10 EB 44
+
+. 0 805338D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631AA 5
+. E8 E6 01 FF FF
+
+. 0 8053395 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 04 50 FF FF
+
+. 0 80533EC 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 80533F3 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE F9 DD 5D D0 DD A5 58 FF FF FF B8 AE 41 F3 01 BA CD CC 18 40 52 50 FF 75 D4 FF 75 D0 E8 60 51 FF FF
+
+. 0 8053422 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053429 13
+. 83 EC 0C 68 F8 61 06 08 E8 DA 4F FF FF
+
+fdivrp_16 ... ok
+. 0 8053436 5
+. 83 C4 10 EB 44
+
+. 0 805347F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631AF 5
+. E8 D3 02 FF FF
+
+. 0 8053487 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 2C 4F FF FF
+
+. 0 80534C4 7
+. 83 C4 10 85 C0 75 78
+
+. 0 80534CB 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 7D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2B 00 60 40 50 FF 75 D0 E8 0F 50 FF FF
+
+. 0 80534F2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80534F9 13
+. 83 EC 0C 68 36 62 06 08 E8 0A 4F FF FF
+
+fidivrs_1 ... ok
+. 0 8053506 5
+. 83 C4 10 EB 48
+
+. 0 8053553 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631B4 5
+. E8 A2 03 FF FF
+
+. 0 805355B 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 58 4E FF FF
+
+. 0 8053598 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805359F 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 7D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2B 00 60 C0 50 FF 75 D0 E8 3B 4F FF FF
+
+. 0 80535C6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80535CD 13
+. 83 EC 0C 68 74 62 06 08 E8 36 4E FF FF
+
+fidivrs_2 ... ok
+. 0 80535DA 5
+. 83 C4 10 EB 48
+
+. 0 8053627 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631B9 5
+. E8 71 04 FF FF
+
+. 0 805362F 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 84 4D FF FF
+
+. 0 805366C 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8053673 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 7D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2B 00 60 C0 50 FF 75 D0 E8 67 4E FF FF
+
+. 0 805369A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80536A1 13
+. 83 EC 0C 68 B2 62 06 08 E8 62 4D FF FF
+
+fidivrs_3 ... ok
+. 0 80536AE 5
+. 83 C4 10 EB 48
+
+. 0 80536FB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631BE 5
+. E8 40 05 FF FF
+
+. 0 8053703 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 B0 4C FF FF
+
+. 0 8053740 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8053747 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 7D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2B 00 60 40 50 FF 75 D0 E8 93 4D FF FF
+
+. 0 805376E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053775 13
+. 83 EC 0C 68 F0 62 06 08 E8 8E 4C FF FF
+
+fidivrs_4 ... ok
+. 0 8053782 5
+. 83 C4 10 EB 48
+
+. 0 80537CF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631C3 5
+. E8 0F 06 FF FF
+
+. 0 80537D7 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 D4 4B FF FF
+
+. 0 805381C 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8053823 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 7D DE DD 5D D0 DD A5 58 FF FF FF B8 00 A8 74 C4 BA 0D AC 6C 3F 52 50 FF 75 D4 FF 75 D0 E8 32 4D FF FF
+
+. 0 8053850 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053857 13
+. 83 EC 0C 68 2E 63 06 08 E8 AC 4B FF FF
+
+fidivrs_5 ... ok
+. 0 8053864 5
+. 83 C4 10 EB 44
+
+. 0 80538AD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631C8 5
+. E8 E8 06 FF FF
+
+. 0 80538B5 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 F6 4A FF FF
+
+. 0 80538FA 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8053901 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 7D DE DD 5D D0 DD A5 58 FF FF FF B8 00 A8 74 C4 BA 0D AC 6C BF 52 50 FF 75 D4 FF 75 D0 E8 54 4C FF FF
+
+. 0 805392E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053935 13
+. 83 EC 0C 68 6C 63 06 08 E8 CE 4A FF FF
+
+fidivrs_6 ... ok
+. 0 8053942 5
+. 83 C4 10 EB 44
+
+. 0 805398B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631CD 5
+. E8 C1 07 FF FF
+
+. 0 8053993 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 18 4A FF FF
+
+. 0 80539D8 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 80539DF 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 7D DE DD 5D D0 DD A5 58 FF FF FF B8 00 A8 74 C4 BA 0D AC 6C BF 52 50 FF 75 D4 FF 75 D0 E8 76 4B FF FF
+
+. 0 8053A0C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053A13 13
+. 83 EC 0C 68 AA 63 06 08 E8 F0 49 FF FF
+
+fidivrs_7 ... ok
+. 0 8053A20 5
+. 83 C4 10 EB 44
+
+. 0 8053A69 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631D2 5
+. E8 9A 08 FF FF
+
+. 0 8053A71 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 3A 49 FF FF
+
+. 0 8053AB6 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8053ABD 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 7D DE DD 5D D0 DD A5 58 FF FF FF B8 00 A8 74 C4 BA 0D AC 6C 3F 52 50 FF 75 D4 FF 75 D0 E8 98 4A FF FF
+
+. 0 8053AEA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053AF1 13
+. 83 EC 0C 68 E8 63 06 08 E8 12 49 FF FF
+
+fidivrs_8 ... ok
+. 0 8053AFE 5
+. 83 C4 10 EB 44
+
+. 0 8053B47 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631D7 5
+. E8 73 09 FF FF
+
+. 0 8053B4F 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 62 48 FF FF
+
+. 0 8053B8E 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8053B95 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 7D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 01 AC 8A 47 50 FF 75 D0 E8 45 49 FF FF
+
+. 0 8053BBC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053BC3 13
+. 83 EC 0C 68 26 64 06 08 E8 40 48 FF FF
+
+fidivrl_1 ... ok
+. 0 8053BD0 5
+. 83 C4 10 EB 48
+
+. 0 8053C1D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631DC 5
+. E8 44 0A FF FF
+
+. 0 8053C25 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 8C 47 FF FF
+
+. 0 8053C64 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8053C6B 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 7D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 01 AC 8A C7 50 FF 75 D0 E8 6F 48 FF FF
+
+. 0 8053C92 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053C99 13
+. 83 EC 0C 68 64 64 06 08 E8 6A 47 FF FF
+
+fidivrl_2 ... ok
+. 0 8053CA6 5
+. 83 C4 10 EB 48
+
+. 0 8053CF3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631E1 5
+. E8 15 0B FF FF
+
+. 0 8053CFB 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 B6 46 FF FF
+
+. 0 8053D3A 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8053D41 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 7D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 01 AC 8A C7 50 FF 75 D0 E8 99 47 FF FF
+
+. 0 8053D68 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053D6F 13
+. 83 EC 0C 68 A2 64 06 08 E8 94 46 FF FF
+
+fidivrl_3 ... ok
+. 0 8053D7C 5
+. 83 C4 10 EB 48
+
+. 0 8053DC9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631E6 5
+. E8 E6 0B FF FF
+
+. 0 8053DD1 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 E0 45 FF FF
+
+. 0 8053E10 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8053E17 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 7D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 01 AC 8A 47 50 FF 75 D0 E8 C3 46 FF FF
+
+. 0 8053E3E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053E45 13
+. 83 EC 0C 68 E0 64 06 08 E8 BE 45 FF FF
+
+fidivrl_4 ... ok
+. 0 8053E52 5
+. 83 C4 10 EB 48
+
+. 0 8053E9F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631EB 5
+. E8 B7 0C FF FF
+
+. 0 8053EA7 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC F1 FB 09 00 83 EC 08 6A 01 68 40 A1 06 08 E8 02 45 FF FF
+
+. 0 8053EEE 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8053EF5 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 7D DC DD 5D D0 DD A5 58 FF FF FF B8 D2 3D 07 B4 BA C2 F5 E0 3F 52 50 FF 75 D4 FF 75 D0 E8 60 46 FF FF
+
+. 0 8053F22 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8053F29 13
+. 83 EC 0C 68 1E 65 06 08 E8 DA 44 FF FF
+
+fidivrl_5 ... ok
+. 0 8053F36 5
+. 83 C4 10 EB 44
+
+. 0 8053F7F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631F0 5
+. E8 92 0D FF FF
+
+. 0 8053F87 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC F1 FB 09 00 83 EC 08 6A 01 68 40 A1 06 08 E8 22 44 FF FF
+
+. 0 8053FCE 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8053FD5 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 7D DC DD 5D D0 DD A5 58 FF FF FF B8 D2 3D 07 B4 BA C2 F5 E0 BF 52 50 FF 75 D4 FF 75 D0 E8 80 45 FF FF
+
+. 0 8054002 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8054009 13
+. 83 EC 0C 68 5C 65 06 08 E8 FA 43 FF FF
+
+fidivrl_6 ... ok
+. 0 8054016 5
+. 83 C4 10 EB 44
+
+. 0 805405F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631F5 5
+. E8 6D 0E FF FF
+
+. 0 8054067 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC 0F 04 F6 FF 83 EC 08 6A 01 68 40 A1 06 08 E8 42 43 FF FF
+
+. 0 80540AE 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 80540B5 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 7D DC DD 5D D0 DD A5 58 FF FF FF B8 D2 3D 07 B4 BA C2 F5 E0 BF 52 50 FF 75 D4 FF 75 D0 E8 A0 44 FF FF
+
+. 0 80540E2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80540E9 13
+. 83 EC 0C 68 9A 65 06 08 E8 1A 43 FF FF
+
+fidivrl_7 ... ok
+. 0 80540F6 5
+. 83 C4 10 EB 44
+
+. 0 805413F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631FA 5
+. E8 48 0F FF FF
+
+. 0 8054147 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC 0F 04 F6 FF 83 EC 08 6A 01 68 40 A1 06 08 E8 62 42 FF FF
+
+. 0 805418E 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8054195 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 7D DC DD 5D D0 DD A5 58 FF FF FF B8 D2 3D 07 B4 BA C2 F5 E0 3F 52 50 FF 75 D4 FF 75 D0 E8 C0 43 FF FF
+
+. 0 80541C2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80541C9 13
+. 83 EC 0C 68 D8 65 06 08 E8 3A 42 FF FF
+
+fidivrl_8 ... ok
+. 0 80541D6 5
+. 83 C4 10 EB 44
+
+. 0 805421F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80631FF 5
+. E8 23 10 FF FF
+
+. 0 8054227 39
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 66 C7 45 E6 00 00 66 C7 45 E6 39 30 83 EC 08 6A 01 68 40 A1 06 08 E8 A2 41 FF FF
+
+. 0 805424E 7
+. 83 C4 10 85 C0 75 75
+
+. 0 8054255 36
+. 9B DD B5 68 FF FF FF DF 45 E6 D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 00 E4 40 46 50 FF 75 D8 E8 88 42 FF FF
+
+. 0 8054279 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8054280 13
+. 83 EC 0C 68 16 66 06 08 E8 83 41 FF FF
+
+filds_1 ... ok
+. 0 805428D 5
+. 83 C4 10 EB 48
+
+. 0 80542DA 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063204 5
+. E8 D9 10 FF FF
+
+. 0 80542E2 39
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 66 C7 45 E6 00 00 66 C7 45 E6 C7 CF 83 EC 08 6A 01 68 40 A1 06 08 E8 E7 40 FF FF
+
+. 0 8054309 7
+. 83 C4 10 85 C0 75 75
+
+. 0 8054310 36
+. 9B DD B5 68 FF FF FF DF 45 E6 D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 00 E4 40 C6 50 FF 75 D8 E8 CD 41 FF FF
+
+. 0 8054334 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805433B 13
+. 83 EC 0C 68 4E 66 06 08 E8 C8 40 FF FF
+
+filds_2 ... ok
+. 0 8054348 5
+. 83 C4 10 EB 48
+
+. 0 8054395 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063209 5
+. E8 8F 11 FF FF
+
+. 0 805439D 39
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 66 C7 45 E6 00 00 66 C7 45 E6 39 30 83 EC 08 6A 01 68 40 A1 06 08 E8 2C 40 FF FF
+
+. 0 80543C4 7
+. 83 C4 10 85 C0 75 77
+
+. 0 80543CB 42
+. 9B DD B5 68 FF FF FF DF 45 E6 DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 00 BA 80 1C C8 40 52 50 FF 75 DC FF 75 D8 E8 8D 41 FF FF
+
+. 0 80543F5 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80543FC 13
+. 83 EC 0C 68 86 66 06 08 E8 07 40 FF FF
+
+filds_3 ... ok
+. 0 8054409 5
+. 83 C4 10 EB 44
+
+. 0 8054452 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806320E 5
+. E8 47 12 FF FF
+
+. 0 805445A 39
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 66 C7 45 E6 00 00 66 C7 45 E6 C7 CF 83 EC 08 6A 01 68 40 A1 06 08 E8 6F 3F FF FF
+
+. 0 8054481 7
+. 83 C4 10 85 C0 75 77
+
+. 0 8054488 42
+. 9B DD B5 68 FF FF FF DF 45 E6 DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 00 BA 80 1C C8 C0 52 50 FF 75 DC FF 75 D8 E8 D0 40 FF FF
+
+. 0 80544B2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80544B9 13
+. 83 EC 0C 68 BE 66 06 08 E8 4A 3F FF FF
+
+filds_4 ... ok
+. 0 80544C6 5
+. 83 C4 10 EB 44
+
+. 0 805450F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063213 5
+. E8 FF 12 FF FF
+
+. 0 8054517 41
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E4 00 00 00 00 C7 45 E4 4E 61 BC 00 83 EC 08 6A 01 68 40 A1 06 08 E8 B0 3E FF FF
+
+. 0 8054540 7
+. 83 C4 10 85 C0 75 75
+
+. 0 8054547 36
+. 9B DD B5 68 FF FF FF DB 45 E4 D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 4E 61 3C 4B 50 FF 75 D8 E8 96 3F FF FF
+
+. 0 805456B 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8054572 13
+. 83 EC 0C 68 F6 66 06 08 E8 91 3E FF FF
+
+fildl_1 ... ok
+. 0 805457F 5
+. 83 C4 10 EB 48
+
+. 0 80545CC 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063218 5
+. E8 B7 13 FF FF
+
+. 0 80545D4 41
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E4 00 00 00 00 C7 45 E4 B2 9E 43 FF 83 EC 08 6A 01 68 40 A1 06 08 E8 F3 3D FF FF
+
+. 0 80545FD 7
+. 83 C4 10 85 C0 75 75
+
+. 0 8054604 36
+. 9B DD B5 68 FF FF FF DB 45 E4 D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 4E 61 3C CB 50 FF 75 D8 E8 D9 3E FF FF
+
+. 0 8054628 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805462F 13
+. 83 EC 0C 68 2E 67 06 08 E8 D4 3D FF FF
+
+fildl_2 ... ok
+. 0 805463C 5
+. 83 C4 10 EB 48
+
+. 0 8054689 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806321D 5
+. E8 6F 14 FF FF
+
+. 0 8054691 41
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E4 00 00 00 00 C7 45 E4 4E 61 BC 00 83 EC 08 6A 01 68 40 A1 06 08 E8 36 3D FF FF
+
+. 0 80546BA 7
+. 83 C4 10 85 C0 75 77
+
+. 0 80546C1 42
+. 9B DD B5 68 FF FF FF DB 45 E4 DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 C0 BA 29 8C 67 41 52 50 FF 75 DC FF 75 D8 E8 97 3E FF FF
+
+. 0 80546EB 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80546F2 13
+. 83 EC 0C 68 66 67 06 08 E8 11 3D FF FF
+
+fildl_3 ... ok
+. 0 80546FF 5
+. 83 C4 10 EB 44
+
+. 0 8054748 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063222 5
+. E8 29 15 FF FF
+
+. 0 8054750 41
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E4 00 00 00 00 C7 45 E4 B2 9E 43 FF 83 EC 08 6A 01 68 40 A1 06 08 E8 77 3C FF FF
+
+. 0 8054779 7
+. 83 C4 10 85 C0 75 77
+
+. 0 8054780 42
+. 9B DD B5 68 FF FF FF DB 45 E4 DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 C0 BA 29 8C 67 C1 52 50 FF 75 DC FF 75 D8 E8 D8 3D FF FF
+
+. 0 80547AA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80547B1 13
+. 83 EC 0C 68 9E 67 06 08 E8 52 3C FF FF
+
+fildl_4 ... ok
+. 0 80547BE 5
+. 83 C4 10 EB 44
+
+. 0 8054807 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063227 5
+. E8 E3 15 FF FF
+
+. 0 805480F 55
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 B1 26 F9 85 C7 45 E4 48 70 00 00 83 EC 08 6A 01 68 40 A1 06 08 E8 AA 3B FF FF
+
+. 0 8054846 7
+. 83 C4 10 85 C0 75 75
+
+. 0 805484D 36
+. 9B DD B5 68 FF FF FF DF 6D E0 D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 0C 91 E0 56 50 FF 75 D8 E8 90 3C FF FF
+
+. 0 8054871 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8054878 13
+. 83 EC 0C 68 D6 67 06 08 E8 8B 3B FF FF
+
+fildq_1 ... ok
+. 0 8054885 5
+. 83 C4 10 EB 48
+
+. 0 80548D2 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806322C 5
+. E8 A9 16 FF FF
+
+. 0 80548DA 55
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 4F D9 06 7A C7 45 E4 B7 8F FF FF 83 EC 08 6A 01 68 40 A1 06 08 E8 DF 3A FF FF
+
+. 0 8054911 7
+. 83 C4 10 85 C0 75 75
+
+. 0 8054918 36
+. 9B DD B5 68 FF FF FF DF 6D E0 D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 0C 91 E0 D6 50 FF 75 D8 E8 C5 3B FF FF
+
+. 0 805493C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8054943 13
+. 83 EC 0C 68 0E 68 06 08 E8 C0 3A FF FF
+
+fildq_2 ... ok
+. 0 8054950 5
+. 83 C4 10 EB 48
+
+. 0 805499D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063231 5
+. E8 6F 17 FF FF
+
+. 0 80549A5 55
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 B1 26 F9 85 C7 45 E4 48 70 00 00 83 EC 08 6A 01 68 40 A1 06 08 E8 14 3A FF FF
+
+. 0 80549DC 7
+. 83 C4 10 85 C0 75 77
+
+. 0 80549E3 42
+. 9B DD B5 68 FF FF FF DF 6D E0 DD 5D D8 DD A5 68 FF FF FF B8 40 AC 49 7E BA 21 12 DC 42 52 50 FF 75 DC FF 75 D8 E8 75 3B FF FF
+
+. 0 8054A0D 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8054A14 13
+. 83 EC 0C 68 46 68 06 08 E8 EF 39 FF FF
+
+fildq_3 ... ok
+. 0 8054A21 5
+. 83 C4 10 EB 44
+
+. 0 8054A6A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063236 5
+. E8 37 18 FF FF
+
+. 0 8054A72 55
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 4F D9 06 7A C7 45 E4 B7 8F FF FF 83 EC 08 6A 01 68 40 A1 06 08 E8 47 39 FF FF
+
+. 0 8054AA9 7
+. 83 C4 10 85 C0 75 77
+
+. 0 8054AB0 42
+. 9B DD B5 68 FF FF FF DF 6D E0 DD 5D D8 DD A5 68 FF FF FF B8 40 AC 49 7E BA 21 12 DC C2 52 50 FF 75 DC FF 75 D8 E8 A8 3A FF FF
+
+. 0 8054ADA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8054AE1 13
+. 83 EC 0C 68 7E 68 06 08 E8 22 39 FF FF
+
+fildq_4 ... ok
+. 0 8054AEE 5
+. 83 C4 10 EB 44
+
+. 0 8054B37 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806323B 5
+. E8 FF 18 FF FF
+
+. 0 8054B3F 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 8B 45 DE 66 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 72 38 FF FF
+
+. 0 8054B7E 11
+. 83 C4 10 85 C0 0F 85 B2 00 00 00
+
+. 0 8054B89 54
+. 9B DD B5 58 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 DF 55 DC D9 5D D0 DD A5 58 FF FF FF 66 81 7D DC D3 04 75 2A
+
+. 0 8054BBF 17
+. 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 31 39 FF FF
+
+. 0 8054BD0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8054BD7 13
+. 83 EC 0C 68 B6 68 06 08 E8 2C 38 FF FF
+
+fists_1 ... ok
+. 0 8054BE4 5
+. 83 C4 10 EB 62
+
+. 0 8054C4B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063240 5
+. E8 0E 1A FF FF
+
+. 0 8054C53 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 8B 45 DE 66 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 5E 37 FF FF
+
+. 0 8054C92 11
+. 83 C4 10 85 C0 0F 85 B2 00 00 00
+
+. 0 8054C9D 54
+. 9B DD B5 58 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 DF 55 DC D9 5D D0 DD A5 58 FF FF FF 66 81 7D DC 2D FB 75 2A
+
+. 0 8054CD3 17
+. 83 EC 08 B8 2B 52 9A C4 50 FF 75 D0 E8 1D 38 FF FF
+
+. 0 8054CE4 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8054CEB 13
+. 83 EC 0C 68 14 69 06 08 E8 18 37 FF FF
+
+fists_2 ... ok
+. 0 8054CF8 5
+. 83 C4 10 EB 62
+
+. 0 8054D5F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063245 5
+. E8 1D 1B FF FF
+
+. 0 8054D67 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 8B 45 DE 66 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 4A 36 FF FF
+
+. 0 8054DA6 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 8054DB1 55
+. 9B DD B5 58 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 DF 55 DC D9 5D D0 DD A5 58 FF FF FF 66 81 7D DC D2 04 75 2A
+
+. 0 8054DE8 17
+. 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 08 37 FF FF
+
+. 0 8054DF9 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8054E00 13
+. 83 EC 0C 68 4C 69 06 08 E8 03 36 FF FF
+
+fists_3 ... ok
+. 0 8054E0D 5
+. 83 C4 10 EB 62
+
+. 0 8054E74 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806324A 5
+. E8 2D 1C FF FF
+
+. 0 8054E7C 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 8B 45 DE 66 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 35 35 FF FF
+
+. 0 8054EBB 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 8054EC6 55
+. 9B DD B5 58 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 DF 55 DC D9 5D D0 DD A5 58 FF FF FF 66 81 7D DC 2D FB 75 2A
+
+. 0 8054EFD 17
+. 83 EC 08 B8 2B 52 9A C4 50 FF 75 D0 E8 F3 35 FF FF
+
+. 0 8054F0E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8054F15 13
+. 83 EC 0C 68 84 69 06 08 E8 EE 34 FF FF
+
+fists_4 ... ok
+. 0 8054F22 5
+. 83 C4 10 EB 62
+
+. 0 8054F89 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806324F 5
+. E8 3D 1D FF FF
+
+. 0 8054F91 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 8B 45 DE 66 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 20 34 FF FF
+
+. 0 8054FD0 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 8054FDB 55
+. 9B DD B5 58 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 DF 55 DC D9 5D D0 DD A5 58 FF FF FF 66 81 7D DC D3 04 75 2A
+
+. 0 8055012 17
+. 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 DE 34 FF FF
+
+. 0 8055023 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805502A 13
+. 83 EC 0C 68 BC 69 06 08 E8 D9 33 FF FF
+
+fists_5 ... ok
+. 0 8055037 5
+. 83 C4 10 EB 62
+
+. 0 805509E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063254 5
+. E8 4D 1E FF FF
+
+. 0 80550A6 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 8B 45 DE 66 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 0B 33 FF FF
+
+. 0 80550E5 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 80550F0 55
+. 9B DD B5 58 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 DF 55 DC D9 5D D0 DD A5 58 FF FF FF 66 81 7D DC 2E FB 75 2A
+
+. 0 8055127 17
+. 83 EC 08 B8 2B 52 9A C4 50 FF 75 D0 E8 C9 33 FF FF
+
+. 0 8055138 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805513F 13
+. 83 EC 0C 68 F4 69 06 08 E8 C4 32 FF FF
+
+fists_6 ... ok
+. 0 805514C 5
+. 83 C4 10 EB 62
+
+. 0 80551B3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063259 5
+. E8 5D 1F FF FF
+
+. 0 80551BB 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 8B 45 DE 66 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 F6 31 FF FF
+
+. 0 80551FA 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 8055205 55
+. 9B DD B5 58 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 DF 55 DC D9 5D D0 DD A5 58 FF FF FF 66 81 7D DC D2 04 75 2A
+
+. 0 805523C 17
+. 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 B4 32 FF FF
+
+. 0 805524D 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8055254 13
+. 83 EC 0C 68 2C 6A 06 08 E8 AF 31 FF FF
+
+fists_7 ... ok
+. 0 8055261 5
+. 83 C4 10 EB 62
+
+. 0 80552C8 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806325E 5
+. E8 6D 20 FF FF
+
+. 0 80552D0 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 8B 45 DE 66 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 E1 30 FF FF
+
+. 0 805530F 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 805531A 55
+. 9B DD B5 58 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 DF 55 DC D9 5D D0 DD A5 58 FF FF FF 66 81 7D DC 2E FB 75 2A
+
+. 0 8055351 17
+. 83 EC 08 B8 2B 52 9A C4 50 FF 75 D0 E8 9F 31 FF FF
+
+. 0 8055362 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8055369 13
+. 83 EC 0C 68 64 6A 06 08 E8 9A 30 FF FF
+
+fists_8 ... ok
+. 0 8055376 5
+. 83 C4 10 EB 62
+
+. 0 80553DD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063263 5
+. E8 7D 21 FF FF
+
+. 0 80553E5 70
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 8B 45 DC 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 C5 2F FF FF
+
+. 0 805542B 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 8055436 55
+. 9B DD B5 58 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 DB 55 D8 DD 5D D0 DD A5 58 FF FF FF 81 7D D8 88 D6 12 00 75 30
+
+. 0 805546D 23
+. B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 FE 30 FF FF
+
+. 0 8055484 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805548B 13
+. 83 EC 0C 68 9C 6A 06 08 E8 78 2F FF FF
+
+fistl_1 ... ok
+. 0 8055498 5
+. 83 C4 10 EB 5C
+
+. 0 80554F9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063268 5
+. E8 94 22 FF FF
+
+. 0 8055501 70
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 8B 45 DC 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 A9 2E FF FF
+
+. 0 8055547 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 8055552 55
+. 9B DD B5 58 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 DB 55 D8 DD 5D D0 DD A5 58 FF FF FF 81 7D D8 78 29 ED FF 75 30
+
+. 0 8055589 23
+. B8 AD 5B F3 C3 BA 87 D6 32 C1 52 50 FF 75 D4 FF 75 D0 E8 E2 2F FF FF
+
+. 0 80555A0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80555A7 13
+. 83 EC 0C 68 FA 6A 06 08 E8 5C 2E FF FF
+
+fistl_2 ... ok
+. 0 80555B4 5
+. 83 C4 10 EB 5C
+
+. 0 8055615 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806326D 5
+. E8 AB 23 FF FF
+
+. 0 805561D 70
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 8B 45 DC 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 8D 2D FF FF
+
+. 0 8055663 11
+. 83 C4 10 85 C0 0F 85 B4 00 00 00
+
+. 0 805566E 56
+. 9B DD B5 58 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 DB 55 D8 DD 5D D0 DD A5 58 FF FF FF 81 7D D8 87 D6 12 00 75 30
+
+. 0 80556A6 23
+. B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 C5 2E FF FF
+
+. 0 80556BD 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80556C4 13
+. 83 EC 0C 68 32 6B 06 08 E8 3F 2D FF FF
+
+fistl_3 ... ok
+. 0 80556D1 5
+. 83 C4 10 EB 5C
+
+. 0 8055732 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063272 5
+. E8 C3 24 FF FF
+
+. 0 805573A 70
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 8B 45 DC 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 70 2C FF FF
+
+. 0 8055780 11
+. 83 C4 10 85 C0 0F 85 B4 00 00 00
+
+. 0 805578B 56
+. 9B DD B5 58 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 DB 55 D8 DD 5D D0 DD A5 58 FF FF FF 81 7D D8 78 29 ED FF 75 30
+
+. 0 80557C3 23
+. B8 AD 5B F3 C3 BA 87 D6 32 C1 52 50 FF 75 D4 FF 75 D0 E8 A8 2D FF FF
+
+. 0 80557DA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80557E1 13
+. 83 EC 0C 68 6A 6B 06 08 E8 22 2C FF FF
+
+fistl_4 ... ok
+. 0 80557EE 5
+. 83 C4 10 EB 5C
+
+. 0 805584F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063277 5
+. E8 DB 25 FF FF
+
+. 0 8055857 70
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 8B 45 DC 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 53 2B FF FF
+
+. 0 805589D 11
+. 83 C4 10 85 C0 0F 85 B4 00 00 00
+
+. 0 80558A8 56
+. 9B DD B5 58 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 DB 55 D8 DD 5D D0 DD A5 58 FF FF FF 81 7D D8 88 D6 12 00 75 30
+
+. 0 80558E0 23
+. B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 8B 2C FF FF
+
+. 0 80558F7 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80558FE 13
+. 83 EC 0C 68 A2 6B 06 08 E8 05 2B FF FF
+
+fistl_5 ... ok
+. 0 805590B 5
+. 83 C4 10 EB 5C
+
+. 0 805596C 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806327C 5
+. E8 F3 26 FF FF
+
+. 0 8055974 70
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 8B 45 DC 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 36 2A FF FF
+
+. 0 80559BA 11
+. 83 C4 10 85 C0 0F 85 B4 00 00 00
+
+. 0 80559C5 56
+. 9B DD B5 58 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 DB 55 D8 DD 5D D0 DD A5 58 FF FF FF 81 7D D8 79 29 ED FF 75 30
+
+. 0 80559FD 23
+. B8 AD 5B F3 C3 BA 87 D6 32 C1 52 50 FF 75 D4 FF 75 D0 E8 6E 2B FF FF
+
+. 0 8055A14 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8055A1B 13
+. 83 EC 0C 68 DA 6B 06 08 E8 E8 29 FF FF
+
+fistl_6 ... ok
+. 0 8055A28 5
+. 83 C4 10 EB 5C
+
+. 0 8055A89 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063281 5
+. E8 0B 28 FF FF
+
+. 0 8055A91 70
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 8B 45 DC 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 19 29 FF FF
+
+. 0 8055AD7 11
+. 83 C4 10 85 C0 0F 85 B4 00 00 00
+
+. 0 8055AE2 56
+. 9B DD B5 58 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 DB 55 D8 DD 5D D0 DD A5 58 FF FF FF 81 7D D8 87 D6 12 00 75 30
+
+. 0 8055B1A 23
+. B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 51 2A FF FF
+
+. 0 8055B31 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8055B38 13
+. 83 EC 0C 68 12 6C 06 08 E8 CB 28 FF FF
+
+fistl_7 ... ok
+. 0 8055B45 5
+. 83 C4 10 EB 5C
+
+. 0 8055BA6 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063286 5
+. E8 23 29 FF FF
+
+. 0 8055BAE 70
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 8B 45 DC 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 FC 27 FF FF
+
+. 0 8055BF4 11
+. 83 C4 10 85 C0 0F 85 B4 00 00 00
+
+. 0 8055BFF 56
+. 9B DD B5 58 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 DB 55 D8 DD 5D D0 DD A5 58 FF FF FF 81 7D D8 79 29 ED FF 75 30
+
+. 0 8055C37 23
+. B8 AD 5B F3 C3 BA 87 D6 32 C1 52 50 FF 75 D4 FF 75 D0 E8 34 29 FF FF
+
+. 0 8055C4E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8055C55 13
+. 83 EC 0C 68 4A 6C 06 08 E8 AE 27 FF FF
+
+fistl_8 ... ok
+. 0 8055C62 5
+. 83 C4 10 EB 5C
+
+. 0 8055CC3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806328B 5
+. E8 3B 2A FF FF
+
+. 0 8055CCB 85
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 66 C7 45 D6 00 00 66 8B 45 D6 66 89 45 D4 83 EC 08 6A 01 68 40 A1 06 08 E8 D0 26 FF FF
+
+. 0 8055D20 11
+. 83 C4 10 85 C0 0F 85 B5 00 00 00
+
+. 0 8055D2B 57
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 DF 5D D4 D9 5D C8 DD A5 58 FF FF FF 66 81 7D D4 D3 04 75 2A
+
+. 0 8055D64 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 8C 27 FF FF
+
+. 0 8055D75 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8055D7C 13
+. 83 EC 0C 68 82 6C 06 08 E8 87 26 FF FF
+
+fistps_1 ... ok
+. 0 8055D89 5
+. 83 C4 10 EB 62
+
+. 0 8055DF0 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063290 5
+. E8 63 2B FF FF
+
+. 0 8055DF8 85
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 66 C7 45 D6 00 00 66 8B 45 D6 66 89 45 D4 83 EC 08 6A 01 68 40 A1 06 08 E8 A3 25 FF FF
+
+. 0 8055E4D 11
+. 83 C4 10 85 C0 0F 85 B5 00 00 00
+
+. 0 8055E58 57
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 DF 5D D4 D9 5D C8 DD A5 58 FF FF FF 66 81 7D D4 2D FB 75 2A
+
+. 0 8055E91 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 5F 26 FF FF
+
+. 0 8055EA2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8055EA9 13
+. 83 EC 0C 68 BD 6C 06 08 E8 5A 25 FF FF
+
+fistps_2 ... ok
+. 0 8055EB6 5
+. 83 C4 10 EB 62
+
+. 0 8055F1D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063295 5
+. E8 8B 2C FF FF
+
+. 0 8055F25 85
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 66 C7 45 D6 00 00 66 8B 45 D6 66 89 45 D4 83 EC 08 6A 01 68 40 A1 06 08 E8 76 24 FF FF
+
+. 0 8055F7A 11
+. 83 C4 10 85 C0 0F 85 B6 00 00 00
+
+. 0 8055F85 58
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 DF 5D D4 D9 5D C8 DD A5 58 FF FF FF 66 81 7D D4 D2 04 75 2A
+
+. 0 8055FBF 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 31 25 FF FF
+
+. 0 8055FD0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8055FD7 13
+. 83 EC 0C 68 F8 6C 06 08 E8 2C 24 FF FF
+
+fistps_3 ... ok
+. 0 8055FE4 5
+. 83 C4 10 EB 62
+
+. 0 805604B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806329A 5
+. E8 B4 2D FF FF
+
+. 0 8056053 85
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 66 C7 45 D6 00 00 66 8B 45 D6 66 89 45 D4 83 EC 08 6A 01 68 40 A1 06 08 E8 48 23 FF FF
+
+. 0 80560A8 11
+. 83 C4 10 85 C0 0F 85 B6 00 00 00
+
+. 0 80560B3 58
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 DF 5D D4 D9 5D C8 DD A5 58 FF FF FF 66 81 7D D4 2D FB 75 2A
+
+. 0 80560ED 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 03 24 FF FF
+
+. 0 80560FE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8056105 13
+. 83 EC 0C 68 33 6D 06 08 E8 FE 22 FF FF
+
+fistps_4 ... ok
+. 0 8056112 5
+. 83 C4 10 EB 62
+
+. 0 8056179 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806329F 5
+. E8 DD 2E FF FF
+
+. 0 8056181 85
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 66 C7 45 D6 00 00 66 8B 45 D6 66 89 45 D4 83 EC 08 6A 01 68 40 A1 06 08 E8 1A 22 FF FF
+
+. 0 80561D6 11
+. 83 C4 10 85 C0 0F 85 B6 00 00 00
+
+. 0 80561E1 58
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 DF 5D D4 D9 5D C8 DD A5 58 FF FF FF 66 81 7D D4 D3 04 75 2A
+
+. 0 805621B 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 D5 22 FF FF
+
+. 0 805622C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8056233 13
+. 83 EC 0C 68 6E 6D 06 08 E8 D0 21 FF FF
+
+fistps_5 ... ok
+. 0 8056240 5
+. 83 C4 10 EB 62
+
+. 0 80562A7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632A4 5
+. E8 06 30 FF FF
+
+. 0 80562AF 85
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 66 C7 45 D6 00 00 66 8B 45 D6 66 89 45 D4 83 EC 08 6A 01 68 40 A1 06 08 E8 EC 20 FF FF
+
+. 0 8056304 11
+. 83 C4 10 85 C0 0F 85 B6 00 00 00
+
+. 0 805630F 58
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 DF 5D D4 D9 5D C8 DD A5 58 FF FF FF 66 81 7D D4 2E FB 75 2A
+
+. 0 8056349 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 A7 21 FF FF
+
+. 0 805635A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8056361 13
+. 83 EC 0C 68 A9 6D 06 08 E8 A2 20 FF FF
+
+fistps_6 ... ok
+. 0 805636E 5
+. 83 C4 10 EB 62
+
+. 0 80563D5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632A9 5
+. E8 2F 31 FF FF
+
+. 0 80563DD 85
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 66 C7 45 D6 00 00 66 8B 45 D6 66 89 45 D4 83 EC 08 6A 01 68 40 A1 06 08 E8 BE 1F FF FF
+
+. 0 8056432 11
+. 83 C4 10 85 C0 0F 85 B6 00 00 00
+
+. 0 805643D 58
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 DF 5D D4 D9 5D C8 DD A5 58 FF FF FF 66 81 7D D4 D2 04 75 2A
+
+. 0 8056477 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 79 20 FF FF
+
+. 0 8056488 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805648F 13
+. 83 EC 0C 68 E4 6D 06 08 E8 74 1F FF FF
+
+fistps_7 ... ok
+. 0 805649C 5
+. 83 C4 10 EB 62
+
+. 0 8056503 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632AE 5
+. E8 58 32 FF FF
+
+. 0 805650B 85
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 66 C7 45 D6 00 00 66 8B 45 D6 66 89 45 D4 83 EC 08 6A 01 68 40 A1 06 08 E8 90 1E FF FF
+
+. 0 8056560 11
+. 83 C4 10 85 C0 0F 85 B6 00 00 00
+
+. 0 805656B 58
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 DF 5D D4 D9 5D C8 DD A5 58 FF FF FF 66 81 7D D4 2E FB 75 2A
+
+. 0 80565A5 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 4B 1F FF FF
+
+. 0 80565B6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80565BD 13
+. 83 EC 0C 68 1F 6E 06 08 E8 46 1E FF FF
+
+fistps_8 ... ok
+. 0 80565CA 5
+. 83 C4 10 EB 62
+
+. 0 8056631 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632B3 5
+. E8 81 33 FF FF
+
+. 0 8056639 92
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D4 00 00 00 00 8B 45 D4 89 45 D0 83 EC 08 6A 01 68 40 A1 06 08 E8 5B 1D FF FF
+
+. 0 8056695 11
+. 83 C4 10 85 C0 0F 85 B4 00 00 00
+
+. 0 80566A0 58
+. 9B DD B5 58 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 DB 5D D0 D9 5D C8 DD A5 58 FF FF FF 81 7D D0 88 D6 12 00 75 2A
+
+. 0 80566DA 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 16 1E FF FF
+
+. 0 80566EB 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80566F2 13
+. 83 EC 0C 68 5A 6E 06 08 E8 11 1D FF FF
+
+fistpl_1 ... ok
+. 0 80566FF 5
+. 83 C4 10 EB 60
+
+. 0 8056764 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632B8 5
+. E8 AF 34 FF FF
+
+. 0 805676C 92
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D4 00 00 00 00 8B 45 D4 89 45 D0 83 EC 08 6A 01 68 40 A1 06 08 E8 28 1C FF FF
+
+. 0 80567C8 11
+. 83 C4 10 85 C0 0F 85 B4 00 00 00
+
+. 0 80567D3 58
+. 9B DD B5 58 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 DB 5D D0 D9 5D C8 DD A5 58 FF FF FF 81 7D D0 78 29 ED FF 75 2A
+
+. 0 805680D 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 E3 1C FF FF
+
+. 0 805681E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8056825 13
+. 83 EC 0C 68 95 6E 06 08 E8 DE 1B FF FF
+
+fistpl_2 ... ok
+. 0 8056832 5
+. 83 C4 10 EB 60
+
+. 0 8056897 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632BD 5
+. E8 DD 35 FF FF
+
+. 0 805689F 92
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D4 00 00 00 00 8B 45 D4 89 45 D0 83 EC 08 6A 01 68 40 A1 06 08 E8 F5 1A FF FF
+
+. 0 80568FB 11
+. 83 C4 10 85 C0 0F 85 B5 00 00 00
+
+. 0 8056906 59
+. 9B DD B5 58 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 DB 5D D0 D9 5D C8 DD A5 58 FF FF FF 81 7D D0 87 D6 12 00 75 2A
+
+. 0 8056941 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 AF 1B FF FF
+
+. 0 8056952 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8056959 13
+. 83 EC 0C 68 D0 6E 06 08 E8 AA 1A FF FF
+
+fistpl_3 ... ok
+. 0 8056966 5
+. 83 C4 10 EB 60
+
+. 0 80569CB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632C2 5
+. E8 0C 37 FF FF
+
+. 0 80569D3 92
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D4 00 00 00 00 8B 45 D4 89 45 D0 83 EC 08 6A 01 68 40 A1 06 08 E8 C1 19 FF FF
+
+. 0 8056A2F 11
+. 83 C4 10 85 C0 0F 85 B5 00 00 00
+
+. 0 8056A3A 59
+. 9B DD B5 58 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 DB 5D D0 D9 5D C8 DD A5 58 FF FF FF 81 7D D0 78 29 ED FF 75 2A
+
+. 0 8056A75 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 7B 1A FF FF
+
+. 0 8056A86 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8056A8D 13
+. 83 EC 0C 68 0B 6F 06 08 E8 76 19 FF FF
+
+fistpl_4 ... ok
+. 0 8056A9A 5
+. 83 C4 10 EB 60
+
+. 0 8056AFF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632C7 5
+. E8 3B 38 FF FF
+
+. 0 8056B07 92
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D4 00 00 00 00 8B 45 D4 89 45 D0 83 EC 08 6A 01 68 40 A1 06 08 E8 8D 18 FF FF
+
+. 0 8056B63 11
+. 83 C4 10 85 C0 0F 85 B5 00 00 00
+
+. 0 8056B6E 59
+. 9B DD B5 58 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 DB 5D D0 D9 5D C8 DD A5 58 FF FF FF 81 7D D0 88 D6 12 00 75 2A
+
+. 0 8056BA9 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 47 19 FF FF
+
+. 0 8056BBA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8056BC1 13
+. 83 EC 0C 68 46 6F 06 08 E8 42 18 FF FF
+
+fistpl_5 ... ok
+. 0 8056BCE 5
+. 83 C4 10 EB 60
+
+. 0 8056C33 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632CC 5
+. E8 6A 39 FF FF
+
+. 0 8056C3B 92
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D4 00 00 00 00 8B 45 D4 89 45 D0 83 EC 08 6A 01 68 40 A1 06 08 E8 59 17 FF FF
+
+. 0 8056C97 11
+. 83 C4 10 85 C0 0F 85 B5 00 00 00
+
+. 0 8056CA2 59
+. 9B DD B5 58 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 DB 5D D0 D9 5D C8 DD A5 58 FF FF FF 81 7D D0 79 29 ED FF 75 2A
+
+. 0 8056CDD 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 13 18 FF FF
+
+. 0 8056CEE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8056CF5 13
+. 83 EC 0C 68 81 6F 06 08 E8 0E 17 FF FF
+
+fistpl_6 ... ok
+. 0 8056D02 5
+. 83 C4 10 EB 60
+
+. 0 8056D67 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632D1 5
+. E8 99 3A FF FF
+
+. 0 8056D6F 92
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D4 00 00 00 00 8B 45 D4 89 45 D0 83 EC 08 6A 01 68 40 A1 06 08 E8 25 16 FF FF
+
+. 0 8056DCB 11
+. 83 C4 10 85 C0 0F 85 B5 00 00 00
+
+. 0 8056DD6 59
+. 9B DD B5 58 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 DB 5D D0 D9 5D C8 DD A5 58 FF FF FF 81 7D D0 87 D6 12 00 75 2A
+
+. 0 8056E11 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 DF 16 FF FF
+
+. 0 8056E22 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8056E29 13
+. 83 EC 0C 68 BC 6F 06 08 E8 DA 15 FF FF
+
+fistpl_7 ... ok
+. 0 8056E36 5
+. 83 C4 10 EB 60
+
+. 0 8056E9B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632D6 5
+. E8 C8 3B FF FF
+
+. 0 8056EA3 92
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D4 00 00 00 00 8B 45 D4 89 45 D0 83 EC 08 6A 01 68 40 A1 06 08 E8 F1 14 FF FF
+
+. 0 8056EFF 11
+. 83 C4 10 85 C0 0F 85 B5 00 00 00
+
+. 0 8056F0A 59
+. 9B DD B5 58 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 DB 5D D0 D9 5D C8 DD A5 58 FF FF FF 81 7D D0 79 29 ED FF 75 2A
+
+. 0 8056F45 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C8 E8 AB 15 FF FF
+
+. 0 8056F56 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8056F5D 13
+. 83 EC 0C 68 F7 6F 06 08 E8 A6 14 FF FF
+
+fistpl_8 ... ok
+. 0 8056F6A 5
+. 83 C4 10 EB 60
+
+. 0 8056FCF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632DB 5
+. E8 F7 3C FF FF
+
+. 0 8056FD7 105
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 66 AC 49 7E BA 21 12 DC 42 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 8B 45 D0 8B 55 D4 89 45 C8 89 55 CC 83 EC 08 6A 01 68 40 A1 06 08 E8 B0 13 FF FF
+
+. 0 8057040 11
+. 83 C4 10 85 C0 0F 85 CA 00 00 00
+
+. 0 805704B 72
+. 9B DD B5 48 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 DF 7D C8 D9 5D C0 DD A5 48 FF FF FF 8B 45 CC 35 48 70 00 00 8B 55 C8 81 F2 B2 26 F9 85 09 D0 85 C0 75 2A
+
+. 0 8057093 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C0 E8 5D 14 FF FF
+
+. 0 80570A4 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80570AB 13
+. 83 EC 0C 68 32 70 06 08 E8 58 13 FF FF
+
+fistpq_1 ... ok
+. 0 80570B8 5
+. 83 C4 10 EB 68
+
+. 0 8057125 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632E0 5
+. E8 48 3E FF FF
+
+. 0 805712D 105
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 66 AC 49 7E BA 21 12 DC C2 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 8B 45 D0 8B 55 D4 89 45 C8 89 55 CC 83 EC 08 6A 01 68 40 A1 06 08 E8 5A 12 FF FF
+
+. 0 8057196 11
+. 83 C4 10 85 C0 0F 85 CA 00 00 00
+
+. 0 80571A1 72
+. 9B DD B5 48 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 DF 7D C8 D9 5D C0 DD A5 48 FF FF FF 8B 45 CC 35 B7 8F FF FF 8B 55 C8 81 F2 4E D9 06 7A 09 D0 85 C0 75 2A
+
+. 0 80571E9 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C0 E8 07 13 FF FF
+
+. 0 80571FA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8057201 13
+. 83 EC 0C 68 95 70 06 08 E8 02 12 FF FF
+
+fistpq_2 ... ok
+. 0 805720E 5
+. 83 C4 10 EB 68
+
+. 0 805727B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632E5 5
+. E8 99 3F FF FF
+
+. 0 8057283 105
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 66 AC 49 7E BA 21 12 DC 42 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 8B 45 D0 8B 55 D4 89 45 C8 89 55 CC 83 EC 08 6A 01 68 40 A1 06 08 E8 04 11 FF FF
+
+. 0 80572EC 11
+. 83 C4 10 85 C0 0F 85 CB 00 00 00
+
+. 0 80572F7 73
+. 9B DD B5 48 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 DF 7D C8 D9 5D C0 DD A5 48 FF FF FF 8B 45 CC 35 48 70 00 00 8B 55 C8 81 F2 B1 26 F9 85 09 D0 85 C0 75 2A
+
+. 0 8057340 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C0 E8 B0 11 FF FF
+
+. 0 8057351 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8057358 13
+. 83 EC 0C 68 D0 70 06 08 E8 AB 10 FF FF
+
+fistpq_3 ... ok
+. 0 8057365 5
+. 83 C4 10 EB 68
+
+. 0 80573D2 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632EA 5
+. E8 EB 40 FF FF
+
+. 0 80573DA 105
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 66 AC 49 7E BA 21 12 DC C2 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 8B 45 D0 8B 55 D4 89 45 C8 89 55 CC 83 EC 08 6A 01 68 40 A1 06 08 E8 AD 0F FF FF
+
+. 0 8057443 11
+. 83 C4 10 85 C0 0F 85 CB 00 00 00
+
+. 0 805744E 73
+. 9B DD B5 48 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 DF 7D C8 D9 5D C0 DD A5 48 FF FF FF 8B 45 CC 35 B7 8F FF FF 8B 55 C8 81 F2 4E D9 06 7A 09 D0 85 C0 75 2A
+
+. 0 8057497 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C0 E8 59 10 FF FF
+
+. 0 80574A8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80574AF 13
+. 83 EC 0C 68 0B 71 06 08 E8 54 0F FF FF
+
+fistpq_4 ... ok
+. 0 80574BC 5
+. 83 C4 10 EB 68
+
+. 0 8057529 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632EF 5
+. E8 3D 42 FF FF
+
+. 0 8057531 105
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 66 AC 49 7E BA 21 12 DC 42 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 8B 45 D0 8B 55 D4 89 45 C8 89 55 CC 83 EC 08 6A 01 68 40 A1 06 08 E8 56 0E FF FF
+
+. 0 805759A 11
+. 83 C4 10 85 C0 0F 85 CB 00 00 00
+
+. 0 80575A5 73
+. 9B DD B5 48 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 DF 7D C8 D9 5D C0 DD A5 48 FF FF FF 8B 45 CC 35 48 70 00 00 8B 55 C8 81 F2 B2 26 F9 85 09 D0 85 C0 75 2A
+
+. 0 80575EE 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C0 E8 02 0F FF FF
+
+. 0 80575FF 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8057606 13
+. 83 EC 0C 68 46 71 06 08 E8 FD 0D FF FF
+
+fistpq_5 ... ok
+. 0 8057613 5
+. 83 C4 10 EB 68
+
+. 0 8057680 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632F4 5
+. E8 8F 43 FF FF
+
+. 0 8057688 105
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 66 AC 49 7E BA 21 12 DC C2 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 8B 45 D0 8B 55 D4 89 45 C8 89 55 CC 83 EC 08 6A 01 68 40 A1 06 08 E8 FF 0C FF FF
+
+. 0 80576F1 11
+. 83 C4 10 85 C0 0F 85 CB 00 00 00
+
+. 0 80576FC 73
+. 9B DD B5 48 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 DF 7D C8 D9 5D C0 DD A5 48 FF FF FF 8B 45 CC 35 B7 8F FF FF 8B 55 C8 81 F2 4F D9 06 7A 09 D0 85 C0 75 2A
+
+. 0 8057745 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C0 E8 AB 0D FF FF
+
+. 0 8057756 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805775D 13
+. 83 EC 0C 68 81 71 06 08 E8 A6 0C FF FF
+
+fistpq_6 ... ok
+. 0 805776A 5
+. 83 C4 10 EB 68
+
+. 0 80577D7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632F9 5
+. E8 E1 44 FF FF
+
+. 0 80577DF 105
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 66 AC 49 7E BA 21 12 DC 42 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 8B 45 D0 8B 55 D4 89 45 C8 89 55 CC 83 EC 08 6A 01 68 40 A1 06 08 E8 A8 0B FF FF
+
+. 0 8057848 11
+. 83 C4 10 85 C0 0F 85 CB 00 00 00
+
+. 0 8057853 73
+. 9B DD B5 48 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 DF 7D C8 D9 5D C0 DD A5 48 FF FF FF 8B 45 CC 35 48 70 00 00 8B 55 C8 81 F2 B1 26 F9 85 09 D0 85 C0 75 2A
+
+. 0 805789C 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C0 E8 54 0C FF FF
+
+. 0 80578AD 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80578B4 13
+. 83 EC 0C 68 BC 71 06 08 E8 4F 0B FF FF
+
+fistpq_7 ... ok
+. 0 80578C1 5
+. 83 C4 10 EB 68
+
+. 0 805792E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80632FE 5
+. E8 33 46 FF FF
+
+. 0 8057936 105
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 66 AC 49 7E BA 21 12 DC C2 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 8E E3 8A 44 89 45 D8 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 8B 45 D0 8B 55 D4 89 45 C8 89 55 CC 83 EC 08 6A 01 68 40 A1 06 08 E8 51 0A FF FF
+
+. 0 805799F 11
+. 83 C4 10 85 C0 0F 85 CB 00 00 00
+
+. 0 80579AA 73
+. 9B DD B5 48 FF FF FF D9 45 D8 DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 DF 7D C8 D9 5D C0 DD A5 48 FF FF FF 8B 45 CC 35 B7 8F FF FF 8B 55 C8 81 F2 4F D9 06 7A 09 D0 85 C0 75 2A
+
+. 0 80579F3 17
+. 83 EC 08 B8 8E E3 8A 44 50 FF 75 C0 E8 FD 0A FF FF
+
+. 0 8057A04 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8057A0B 13
+. 83 EC 0C 68 F7 71 06 08 E8 F8 09 FF FF
+
+fistpq_8 ... ok
+. 0 8057A18 5
+. 83 C4 10 EB 68
+
+. 0 8057A85 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063303 5
+. E8 85 47 FF FF
+
+. 0 8057A8D 42
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 39 09 FF FF
+
+. 0 8057AB7 7
+. 83 C4 10 85 C0 75 75
+
+. 0 8057ABE 36
+. 9B DD B5 68 FF FF FF D9 45 E4 D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 2B 52 9A 44 50 FF 75 D8 E8 1F 0A FF FF
+
+. 0 8057AE2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8057AE9 13
+. 83 EC 0C 68 32 72 06 08 E8 1A 09 FF FF
+
+flds_1 ... ok
+. 0 8057AF6 5
+. 83 C4 10 EB 48
+
+. 0 8057B43 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063308 5
+. E8 3E 48 FF FF
+
+. 0 8057B4B 42
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 7B 08 FF FF
+
+. 0 8057B75 7
+. 83 C4 10 85 C0 75 75
+
+. 0 8057B7C 36
+. 9B DD B5 68 FF FF FF D9 45 E4 D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 2B 52 9A C4 50 FF 75 D8 E8 61 09 FF FF
+
+. 0 8057BA0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8057BA7 13
+. 83 EC 0C 68 67 72 06 08 E8 5C 08 FF FF
+
+flds_2 ... ok
+. 0 8057BB4 5
+. 83 C4 10 EB 48
+
+. 0 8057C01 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806330D 5
+. E8 F7 48 FF FF
+
+. 0 8057C09 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 AE 07 FF FF
+
+. 0 8057C42 7
+. 83 C4 10 85 C0 75 77
+
+. 0 8057C49 42
+. 9B DD B5 68 FF FF FF DD 45 E0 DD 5D D8 DD A5 68 FF FF FF B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 DC FF 75 D8 E8 0F 09 FF FF
+
+. 0 8057C73 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8057C7A 13
+. 83 EC 0C 68 9C 72 06 08 E8 89 07 FF FF
+
+fldl_1 ... ok
+. 0 8057C87 5
+. 83 C4 10 EB 44
+
+. 0 8057CD0 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063312 5
+. E8 C1 49 FF FF
+
+. 0 8057CD8 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 DF 06 FF FF
+
+. 0 8057D11 7
+. 83 C4 10 85 C0 75 77
+
+. 0 8057D18 42
+. 9B DD B5 68 FF FF FF DD 45 E0 DD 5D D8 DD A5 68 FF FF FF B8 AD 5B F3 C3 BA 87 D6 32 C1 52 50 FF 75 DC FF 75 D8 E8 40 08 FF FF
+
+. 0 8057D42 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8057D49 13
+. 83 EC 0C 68 D1 72 06 08 E8 BA 06 FF FF
+
+fldl_2 ... ok
+. 0 8057D56 5
+. 83 C4 10 EB 44
+
+. 0 8057D9F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063317 5
+. E8 8B 4A FF FF
+
+. 0 8057DA7 49
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 18 06 FF FF
+
+. 0 8057DD8 11
+. 83 C4 10 85 C0 0F 85 C0 00 00 00
+
+. 0 8057DE3 49
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 EE D9 C2 D9 5D D8 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2B 52 9A 44 50 FF 75 D8 E8 ED 06 FF FF
+
+. 0 8057E14 7
+. 83 C4 10 85 C0 74 2A
+
+. 0 8057E1B 17
+. 83 EC 08 B8 2B 52 9A 44 50 FF 75 D0 E8 D5 06 FF FF
+
+. 0 8057E2C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8057E33 13
+. 83 EC 0C 68 06 73 06 08 E8 D0 05 FF FF
+
+fld_1 ... ok
+. 0 8057E40 5
+. 83 C4 10 EB 6E
+
+. 0 8057EB3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806331C 5
+. E8 9A 4B FF FF
+
+. 0 8057EBB 49
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 04 05 FF FF
+
+. 0 8057EEC 11
+. 83 C4 10 85 C0 0F 85 C0 00 00 00
+
+. 0 8057EF7 49
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 EE D9 C2 D9 5D D8 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 2B 52 9A C4 50 FF 75 D8 E8 D9 05 FF FF
+
+. 0 8057F28 7
+. 83 C4 10 85 C0 74 2A
+
+. 0 8057F2F 17
+. 83 EC 08 B8 2B 52 9A C4 50 FF 75 D0 E8 C1 05 FF FF
+
+. 0 8057F40 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8057F47 13
+. 83 EC 0C 68 38 73 06 08 E8 BC 04 FF FF
+
+fld_2 ... ok
+. 0 8057F54 5
+. 83 C4 10 EB 6E
+
+. 0 8057FC7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063321 5
+. E8 A9 4C FF FF
+
+. 0 8057FCF 57
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 E8 03 FF FF
+
+. 0 8058008 11
+. 83 C4 10 85 C0 0F 85 C4 00 00 00
+
+. 0 8058013 55
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE D9 EE D9 C2 DD 5D D8 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 DC FF 75 D8 E8 38 05 FF FF
+
+. 0 805804A 7
+. 83 C4 10 85 C0 74 30
+
+. 0 8058051 23
+. B8 AD 5B F3 C3 BA 87 D6 32 41 52 50 FF 75 D4 FF 75 D0 E8 1A 05 FF FF
+
+. 0 8058068 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805806F 13
+. 83 EC 0C 68 6A 73 06 08 E8 94 03 FF FF
+
+fld_3 ... ok
+. 0 805807C 5
+. 83 C4 10 EB 66
+
+. 0 80580E7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063326 5
+. E8 C4 4D FF FF
+
+. 0 80580EF 27
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 83 EC 08 6A 01 68 40 A1 06 08 E8 E6 02 FF FF
+
+. 0 805810A 7
+. 83 C4 10 85 C0 75 76
+
+. 0 8058111 41
+. 9B DD B5 68 FF FF FF D9 E8 DD 5D E0 DD A5 68 FF FF FF B8 00 00 00 00 BA 00 00 F0 3F 52 50 FF 75 E4 FF 75 E0 E8 48 04 FF FF
+
+. 0 805813A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8058141 13
+. 83 EC 0C 68 9C 73 06 08 E8 C2 02 FF FF
+
+fld1_1 ... ok
+. 0 805814E 5
+. 83 C4 10 EB 44
+
+. 0 8058197 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806332B 5
+. E8 6F 4E FF FF
+
+. 0 805819F 27
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 83 EC 08 6A 01 68 40 A1 06 08 E8 36 02 FF FF
+
+. 0 80581BA 7
+. 83 C4 10 85 C0 75 76
+
+. 0 80581C1 41
+. 9B DD B5 68 FF FF FF D9 E9 DD 5D E0 DD A5 68 FF FF FF B8 71 A3 79 09 BA 4F 93 0A 40 52 50 FF 75 E4 FF 75 E0 E8 98 03 FF FF
+
+. 0 80581EA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80581F1 13
+. 83 EC 0C 68 D1 73 06 08 E8 12 02 FF FF
+
+fldl2t_1 ... ok
+. 0 80581FE 5
+. 83 C4 10 EB 44
+
+. 0 8058247 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063330 5
+. E8 1A 4F FF FF
+
+. 0 805824F 27
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 83 EC 08 6A 01 68 40 A1 06 08 E8 86 01 FF FF
+
+. 0 805826A 7
+. 83 C4 10 85 C0 75 76
+
+. 0 8058271 41
+. 9B DD B5 68 FF FF FF D9 EA DD 5D E0 DD A5 68 FF FF FF B8 FC 82 2B 65 BA 47 15 F7 3F 52 50 FF 75 E4 FF 75 E0 E8 E8 02 FF FF
+
+. 0 805829A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80582A1 13
+. 83 EC 0C 68 0C 74 06 08 E8 62 01 FF FF
+
+fldl2e_1 ... ok
+. 0 80582AE 5
+. 83 C4 10 EB 44
+
+. 0 80582F7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063335 5
+. E8 C5 4F FF FF
+
+. 0 80582FF 27
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 83 EC 08 6A 01 68 40 A1 06 08 E8 D6 00 FF FF
+
+. 0 805831A 7
+. 83 C4 10 85 C0 75 76
+
+. 0 8058321 41
+. 9B DD B5 68 FF FF FF D9 EB DD 5D E0 DD A5 68 FF FF FF B8 18 2D 44 54 BA FB 21 09 40 52 50 FF 75 E4 FF 75 E0 E8 38 02 FF FF
+
+. 0 805834A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8058351 13
+. 83 EC 0C 68 47 74 06 08 E8 B2 00 FF FF
+
+fldpi_1 ... ok
+. 0 805835E 5
+. 83 C4 10 EB 44
+
+. 0 80583A7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806333A 5
+. E8 70 50 FF FF
+
+. 0 80583AF 27
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 83 EC 08 6A 01 68 40 A1 06 08 E8 26 00 FF FF
+
+. 0 80583CA 7
+. 83 C4 10 85 C0 75 76
+
+. 0 80583D1 41
+. 9B DD B5 68 FF FF FF D9 EC DD 5D E0 DD A5 68 FF FF FF B8 FF 79 9F 50 BA 13 44 D3 3F 52 50 FF 75 E4 FF 75 E0 E8 88 01 FF FF
+
+. 0 80583FA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8058401 13
+. 83 EC 0C 68 7F 74 06 08 E8 02 00 FF FF
+
+fldlg2_1 ... ok
+. 0 805840E 5
+. 83 C4 10 EB 44
+
+. 0 8058457 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806333F 5
+. E8 1B 51 FF FF
+
+. 0 805845F 27
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 83 EC 08 6A 01 68 40 A1 06 08 E8 76 FF FE FF
+
+. 0 805847A 7
+. 83 C4 10 85 C0 75 76
+
+. 0 8058481 41
+. 9B DD B5 68 FF FF FF D9 ED DD 5D E0 DD A5 68 FF FF FF B8 EF 39 FA FE BA 42 2E E6 3F 52 50 FF 75 E4 FF 75 E0 E8 D8 00 FF FF
+
+. 0 80584AA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80584B1 13
+. 83 EC 0C 68 BA 74 06 08 E8 52 FF FE FF
+
+fldln2_1 ... ok
+. 0 80584BE 5
+. 83 C4 10 EB 44
+
+. 0 8058507 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063344 5
+. E8 C6 51 FF FF
+
+. 0 805850F 27
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 83 EC 08 6A 01 68 40 A1 06 08 E8 C6 FE FE FF
+
+. 0 805852A 7
+. 83 C4 10 85 C0 75 76
+
+. 0 8058531 41
+. 9B DD B5 68 FF FF FF D9 EE DD 5D E0 DD A5 68 FF FF FF B8 00 00 00 00 BA 00 00 00 00 52 50 FF 75 E4 FF 75 E0 E8 28 00 FF FF
+
+. 0 805855A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8058561 13
+. 83 EC 0C 68 F5 74 06 08 E8 A2 FE FE FF
+
+fldz_1 ... ok
+. 0 805856E 5
+. 83 C4 10 EB 44
+
+. 0 80585B7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063349 5
+. E8 71 52 FF FF
+
+. 0 80585BF 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 F1 FD FE FF
+
+. 0 80585FF 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8058606 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 4D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 4B 50 FF 75 D0 E8 D4 FE FE FF
+
+. 0 805862D 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8058634 13
+. 83 EC 0C 68 2A 75 06 08 E8 CF FD FE FF
+
+fmuls_1 ... ok
+. 0 8058641 5
+. 83 C4 10 EB 48
+
+. 0 805868E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806334E 5
+. E8 43 53 FF FF
+
+. 0 8058696 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 1A FD FE FF
+
+. 0 80586D6 7
+. 83 C4 10 85 C0 75 78
+
+. 0 80586DD 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 4D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 CB 50 FF 75 D0 E8 FD FD FE FF
+
+. 0 8058704 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805870B 13
+. 83 EC 0C 68 62 75 06 08 E8 F8 FC FE FF
+
+fmuls_2 ... ok
+. 0 8058718 5
+. 83 C4 10 EB 48
+
+. 0 8058765 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063353 5
+. E8 15 54 FF FF
+
+. 0 805876D 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 43 FC FE FF
+
+. 0 80587AD 7
+. 83 C4 10 85 C0 75 78
+
+. 0 80587B4 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 4D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 CB 50 FF 75 D0 E8 26 FD FE FF
+
+. 0 80587DB 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80587E2 13
+. 83 EC 0C 68 9A 75 06 08 E8 21 FC FE FF
+
+fmuls_3 ... ok
+. 0 80587EF 5
+. 83 C4 10 EB 48
+
+. 0 805883C 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063358 5
+. E8 E7 54 FF FF
+
+. 0 8058844 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 6C FB FE FF
+
+. 0 8058884 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805888B 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 4D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 4B 50 FF 75 D0 E8 4F FC FE FF
+
+. 0 80588B2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80588B9 13
+. 83 EC 0C 68 D2 75 06 08 E8 4A FB FE FF
+
+fmuls_4 ... ok
+. 0 80588C6 5
+. 83 C4 10 EB 48
+
+. 0 8058913 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806335D 5
+. E8 B9 55 FF FF
+
+. 0 805891B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 7E FA FE FF
+
+. 0 8058972 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8058979 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 4D D8 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 42 52 50 FF 75 D4 FF 75 D0 E8 DC FB FE FF
+
+. 0 80589A6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80589AD 13
+. 83 EC 0C 68 0A 76 06 08 E8 56 FA FE FF
+
+fmull_1 ... ok
+. 0 80589BA 5
+. 83 C4 10 EB 44
+
+. 0 8058A03 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063362 5
+. E8 A4 56 FF FF
+
+. 0 8058A0B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 8E F9 FE FF
+
+. 0 8058A62 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8058A69 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 4D D8 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 C2 52 50 FF 75 D4 FF 75 D0 E8 EC FA FE FF
+
+. 0 8058A96 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8058A9D 13
+. 83 EC 0C 68 42 76 06 08 E8 66 F9 FE FF
+
+fmull_2 ... ok
+. 0 8058AAA 5
+. 83 C4 10 EB 44
+
+. 0 8058AF3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063367 5
+. E8 8F 57 FF FF
+
+. 0 8058AFB 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 9E F8 FE FF
+
+. 0 8058B52 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8058B59 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 4D D8 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 C2 52 50 FF 75 D4 FF 75 D0 E8 FC F9 FE FF
+
+. 0 8058B86 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8058B8D 13
+. 83 EC 0C 68 7A 76 06 08 E8 76 F8 FE FF
+
+fmull_3 ... ok
+. 0 8058B9A 5
+. 83 C4 10 EB 44
+
+. 0 8058BE3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806336C 5
+. E8 7A 58 FF FF
+
+. 0 8058BEB 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 AE F7 FE FF
+
+. 0 8058C42 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8058C49 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 4D D8 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 42 52 50 FF 75 D4 FF 75 D0 E8 0C F9 FE FF
+
+. 0 8058C76 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8058C7D 13
+. 83 EC 0C 68 B2 76 06 08 E8 86 F7 FE FF
+
+fmull_4 ... ok
+. 0 8058C8A 5
+. 83 C4 10 EB 44
+
+. 0 8058CD3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063371 5
+. E8 65 59 FF FF
+
+. 0 8058CDB 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 CE F6 FE FF
+
+. 0 8058D22 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8058D2D 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC CA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 4B 50 FF 75 D0 E8 A5 F7 FE FF
+
+. 0 8058D5C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8058D63 13
+. 83 EC 0C 68 EA 76 06 08 E8 A0 F6 FE FF
+
+fmul_1 ... ok
+. 0 8058D70 5
+. 83 C4 10 EB 48
+
+. 0 8058DBD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063376 5
+. E8 4A 5A FF FF
+
+. 0 8058DC5 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 E4 F5 FE FF
+
+. 0 8058E0C 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8058E17 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC CA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 CB 50 FF 75 D0 E8 BB F6 FE FF
+
+. 0 8058E46 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8058E4D 13
+. 83 EC 0C 68 1F 77 06 08 E8 B6 F5 FE FF
+
+fmul_2 ... ok
+. 0 8058E5A 5
+. 83 C4 10 EB 48
+
+. 0 8058EA7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806337B 5
+. E8 2F 5B FF FF
+
+. 0 8058EAF 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 FA F4 FE FF
+
+. 0 8058EF6 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8058F01 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC CA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 CB 50 FF 75 D0 E8 D1 F5 FE FF
+
+. 0 8058F30 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8058F37 13
+. 83 EC 0C 68 54 77 06 08 E8 CC F4 FE FF
+
+fmul_3 ... ok
+. 0 8058F44 5
+. 83 C4 10 EB 48
+
+. 0 8058F91 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063380 5
+. E8 14 5C FF FF
+
+. 0 8058F99 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 10 F4 FE FF
+
+. 0 8058FE0 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8058FEB 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC CA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 4B 50 FF 75 D0 E8 E7 F4 FE FF
+
+. 0 805901A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059021 13
+. 83 EC 0C 68 89 77 06 08 E8 E2 F3 FE FF
+
+fmul_4 ... ok
+. 0 805902E 5
+. 83 C4 10 EB 48
+
+. 0 805907B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063385 5
+. E8 F9 5C FF FF
+
+. 0 8059083 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 16 F3 FE FF
+
+. 0 80590DA 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 80590E5 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC CA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 42 52 50 FF 75 D4 FF 75 D0 E8 68 F4 FE FF
+
+. 0 805911A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059121 13
+. 83 EC 0C 68 BE 77 06 08 E8 E2 F2 FE FF
+
+fmul_5 ... ok
+. 0 805912E 5
+. 83 C4 10 EB 44
+
+. 0 8059177 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806338A 5
+. E8 F0 5D FF FF
+
+. 0 805917F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 1A F2 FE FF
+
+. 0 80591D6 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 80591E1 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC CA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 C2 52 50 FF 75 D4 FF 75 D0 E8 6C F3 FE FF
+
+. 0 8059216 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805921D 13
+. 83 EC 0C 68 F3 77 06 08 E8 E6 F1 FE FF
+
+fmul_6 ... ok
+. 0 805922A 5
+. 83 C4 10 EB 44
+
+. 0 8059273 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806338F 5
+. E8 E7 5E FF FF
+
+. 0 805927B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 1E F1 FE FF
+
+. 0 80592D2 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 80592DD 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC CA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 C2 52 50 FF 75 D4 FF 75 D0 E8 70 F2 FE FF
+
+. 0 8059312 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059319 13
+. 83 EC 0C 68 28 78 06 08 E8 EA F0 FE FF
+
+fmul_7 ... ok
+. 0 8059326 5
+. 83 C4 10 EB 44
+
+. 0 805936F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063394 5
+. E8 DE 5F FF FF
+
+. 0 8059377 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 22 F0 FE FF
+
+. 0 80593CE 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 80593D9 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC CA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 42 52 50 FF 75 D4 FF 75 D0 E8 74 F1 FE FF
+
+. 0 805940E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059415 13
+. 83 EC 0C 68 5D 78 06 08 E8 EE EF FE FF
+
+fmul_8 ... ok
+. 0 8059422 5
+. 83 C4 10 EB 44
+
+. 0 805946B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063399 5
+. E8 D5 60 FF FF
+
+. 0 8059473 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 36 EF FE FF
+
+. 0 80594BA 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 80594C1 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 CA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 4B 50 FF 75 D0 E8 15 F0 FE FF
+
+. 0 80594EC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80594F3 13
+. 83 EC 0C 68 92 78 06 08 E8 10 EF FE FF
+
+fmul_9 ... ok
+. 0 8059500 5
+. 83 C4 10 EB 48
+
+. 0 805954D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806339E 5
+. E8 B2 61 FF FF
+
+. 0 8059555 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 54 EE FE FF
+
+. 0 805959C 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 80595A3 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 CA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 CB 50 FF 75 D0 E8 33 EF FE FF
+
+. 0 80595CE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80595D5 13
+. 83 EC 0C 68 C7 78 06 08 E8 2E EE FE FF
+
+fmul_10 ... ok
+. 0 80595E2 5
+. 83 C4 10 EB 48
+
+. 0 805962F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633A3 5
+. E8 8F 62 FF FF
+
+. 0 8059637 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 72 ED FE FF
+
+. 0 805967E 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8059685 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 CA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 CB 50 FF 75 D0 E8 51 EE FE FF
+
+. 0 80596B0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80596B7 13
+. 83 EC 0C 68 FF 78 06 08 E8 4C ED FE FF
+
+fmul_11 ... ok
+. 0 80596C4 5
+. 83 C4 10 EB 48
+
+. 0 8059711 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633A8 5
+. E8 6C 63 FF FF
+
+. 0 8059719 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 90 EC FE FF
+
+. 0 8059760 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8059767 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 CA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 4B 50 FF 75 D0 E8 6F ED FE FF
+
+. 0 8059792 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059799 13
+. 83 EC 0C 68 37 79 06 08 E8 6A EC FE FF
+
+fmul_12 ... ok
+. 0 80597A6 5
+. 83 C4 10 EB 48
+
+. 0 80597F3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633AD 5
+. E8 49 64 FF FF
+
+. 0 80597FB 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 9E EB FE FF
+
+. 0 8059852 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8059859 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 CA DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 42 52 50 FF 75 D4 FF 75 D0 E8 F8 EC FE FF
+
+. 0 805988A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059891 13
+. 83 EC 0C 68 6F 79 06 08 E8 72 EB FE FF
+
+fmul_13 ... ok
+. 0 805989E 5
+. 83 C4 10 EB 44
+
+. 0 80598E7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633B2 5
+. E8 38 65 FF FF
+
+. 0 80598EF 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 AA EA FE FF
+
+. 0 8059946 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 805994D 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 CA DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 C2 52 50 FF 75 D4 FF 75 D0 E8 04 EC FE FF
+
+. 0 805997E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059985 13
+. 83 EC 0C 68 A7 79 06 08 E8 7E EA FE FF
+
+fmul_14 ... ok
+. 0 8059992 5
+. 83 C4 10 EB 44
+
+. 0 80599DB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633B7 5
+. E8 27 66 FF FF
+
+. 0 80599E3 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 B6 E9 FE FF
+
+. 0 8059A3A 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8059A41 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 CA DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 C2 52 50 FF 75 D4 FF 75 D0 E8 10 EB FE FF
+
+. 0 8059A72 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059A79 13
+. 83 EC 0C 68 DF 79 06 08 E8 8A E9 FE FF
+
+fmul_15 ... ok
+. 0 8059A86 5
+. 83 C4 10 EB 44
+
+. 0 8059ACF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633BC 5
+. E8 16 67 FF FF
+
+. 0 8059AD7 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 C2 E8 FE FF
+
+. 0 8059B2E 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8059B35 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 CA DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 42 52 50 FF 75 D4 FF 75 D0 E8 1C EA FE FF
+
+. 0 8059B66 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059B6D 13
+. 83 EC 0C 68 17 7A 06 08 E8 96 E8 FE FF
+
+fmul_16 ... ok
+. 0 8059B7A 5
+. 83 C4 10 EB 44
+
+. 0 8059BC3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633C1 5
+. E8 05 68 FF FF
+
+. 0 8059BCB 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 DE E7 FE FF
+
+. 0 8059C12 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8059C19 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE CA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 4B 50 FF 75 D0 E8 BB E8 FE FF
+
+. 0 8059C46 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059C4D 13
+. 83 EC 0C 68 4F 7A 06 08 E8 B6 E7 FE FF
+
+fmulp_1 ... ok
+. 0 8059C5A 5
+. 83 C4 10 EB 48
+
+. 0 8059CA7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633C6 5
+. E8 E4 68 FF FF
+
+. 0 8059CAF 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 FA E6 FE FF
+
+. 0 8059CF6 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8059CFD 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE CA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 CB 50 FF 75 D0 E8 D7 E7 FE FF
+
+. 0 8059D2A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059D31 13
+. 83 EC 0C 68 87 7A 06 08 E8 D2 E6 FE FF
+
+fmulp_2 ... ok
+. 0 8059D3E 5
+. 83 C4 10 EB 48
+
+. 0 8059D8B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633CB 5
+. E8 C3 69 FF FF
+
+. 0 8059D93 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 16 E6 FE FF
+
+. 0 8059DDA 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8059DE1 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE CA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 CB 50 FF 75 D0 E8 F3 E6 FE FF
+
+. 0 8059E0E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059E15 13
+. 83 EC 0C 68 BF 7A 06 08 E8 EE E5 FE FF
+
+fmulp_3 ... ok
+. 0 8059E22 5
+. 83 C4 10 EB 48
+
+. 0 8059E6F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633D0 5
+. E8 A2 6A FF FF
+
+. 0 8059E77 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 32 E5 FE FF
+
+. 0 8059EBE 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8059EC5 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE CA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 4B 50 FF 75 D0 E8 0F E6 FE FF
+
+. 0 8059EF2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059EF9 13
+. 83 EC 0C 68 F7 7A 06 08 E8 0A E5 FE FF
+
+fmulp_4 ... ok
+. 0 8059F06 5
+. 83 C4 10 EB 48
+
+. 0 8059F53 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633D5 5
+. E8 81 6B FF FF
+
+. 0 8059F5B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 3E E4 FE FF
+
+. 0 8059FB2 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8059FBD 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE CA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 42 52 50 FF 75 D4 FF 75 D0 E8 92 E5 FE FF
+
+. 0 8059FF0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8059FF7 13
+. 83 EC 0C 68 2F 7B 06 08 E8 0C E4 FE FF
+
+fmulp_5 ... ok
+. 0 805A004 5
+. 83 C4 10 EB 44
+
+. 0 805A04D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633DA 5
+. E8 76 6C FF FF
+
+. 0 805A055 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 44 E3 FE FF
+
+. 0 805A0AC 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 805A0B7 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE CA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 C2 52 50 FF 75 D4 FF 75 D0 E8 98 E4 FE FF
+
+. 0 805A0EA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805A0F1 13
+. 83 EC 0C 68 67 7B 06 08 E8 12 E3 FE FF
+
+fmulp_6 ... ok
+. 0 805A0FE 5
+. 83 C4 10 EB 44
+
+. 0 805A147 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633DF 5
+. E8 6B 6D FF FF
+
+. 0 805A14F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 4A E2 FE FF
+
+. 0 805A1A6 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 805A1B1 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE CA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 C2 52 50 FF 75 D4 FF 75 D0 E8 9E E3 FE FF
+
+. 0 805A1E4 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805A1EB 13
+. 83 EC 0C 68 9F 7B 06 08 E8 18 E2 FE FF
+
+fmulp_7 ... ok
+. 0 805A1F8 5
+. 83 C4 10 EB 44
+
+. 0 805A241 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633E4 5
+. E8 60 6E FF FF
+
+. 0 805A249 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 50 E1 FE FF
+
+. 0 805A2A0 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 805A2AB 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE CA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 42 52 50 FF 75 D4 FF 75 D0 E8 A4 E2 FE FF
+
+. 0 805A2DE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805A2E5 13
+. 83 EC 0C 68 D7 7B 06 08 E8 1E E1 FE FF
+
+fmulp_8 ... ok
+. 0 805A2F2 5
+. 83 C4 10 EB 44
+
+. 0 805A33B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633E9 5
+. E8 55 6F FF FF
+
+. 0 805A343 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 66 E0 FE FF
+
+. 0 805A38A 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805A391 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE C9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 4B 50 FF 75 D0 E8 47 E1 FE FF
+
+. 0 805A3BA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805A3C1 13
+. 83 EC 0C 68 0F 7C 06 08 E8 42 E0 FE FF
+
+fmulp_9 ... ok
+. 0 805A3CE 5
+. 83 C4 10 EB 48
+
+. 0 805A41B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633EE 5
+. E8 30 70 FF FF
+
+. 0 805A423 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 86 DF FE FF
+
+. 0 805A46A 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805A471 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE C9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 CB 50 FF 75 D0 E8 67 E0 FE FF
+
+. 0 805A49A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805A4A1 13
+. 83 EC 0C 68 47 7C 06 08 E8 62 DF FE FF
+
+fmulp_10 ... ok
+. 0 805A4AE 5
+. 83 C4 10 EB 48
+
+. 0 805A4FB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633F3 5
+. E8 0B 71 FF FF
+
+. 0 805A503 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 A6 DE FE FF
+
+. 0 805A54A 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805A551 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE C9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 CB 50 FF 75 D0 E8 87 DF FE FF
+
+. 0 805A57A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805A581 13
+. 83 EC 0C 68 82 7C 06 08 E8 82 DE FE FF
+
+fmulp_11 ... ok
+. 0 805A58E 5
+. 83 C4 10 EB 48
+
+. 0 805A5DB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633F8 5
+. E8 E6 71 FF FF
+
+. 0 805A5E3 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 C6 DD FE FF
+
+. 0 805A62A 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805A631 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE C9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 1F 25 4B 50 FF 75 D0 E8 A7 DE FE FF
+
+. 0 805A65A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805A661 13
+. 83 EC 0C 68 BD 7C 06 08 E8 A2 DD FE FF
+
+fmulp_12 ... ok
+. 0 805A66E 5
+. 83 C4 10 EB 48
+
+. 0 805A6BB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80633FD 5
+. E8 C1 72 FF FF
+
+. 0 805A6C3 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 D6 DC FE FF
+
+. 0 805A71A 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805A721 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE C9 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 42 52 50 FF 75 D4 FF 75 D0 E8 32 DE FE FF
+
+. 0 805A750 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805A757 13
+. 83 EC 0C 68 F8 7C 06 08 E8 AC DC FE FF
+
+fmulp_13 ... ok
+. 0 805A764 5
+. 83 C4 10 EB 44
+
+. 0 805A7AD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063402 5
+. E8 AE 73 FF FF
+
+. 0 805A7B5 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 E4 DB FE FF
+
+. 0 805A80C 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805A813 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE C9 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 C2 52 50 FF 75 D4 FF 75 D0 E8 40 DD FE FF
+
+. 0 805A842 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805A849 13
+. 83 EC 0C 68 33 7D 06 08 E8 BA DB FE FF
+
+fmulp_14 ... ok
+. 0 805A856 5
+. 83 C4 10 EB 44
+
+. 0 805A89F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063407 5
+. E8 9B 74 FF FF
+
+. 0 805A8A7 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 F2 DA FE FF
+
+. 0 805A8FE 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805A905 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE C9 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 C2 52 50 FF 75 D4 FF 75 D0 E8 4E DC FE FF
+
+. 0 805A934 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805A93B 13
+. 83 EC 0C 68 6E 7D 06 08 E8 C8 DA FE FF
+
+fmulp_15 ... ok
+. 0 805A948 5
+. 83 C4 10 EB 44
+
+. 0 805A991 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806340C 5
+. E8 88 75 FF FF
+
+. 0 805A999 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 00 DA FE FF
+
+. 0 805A9F0 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805A9F7 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE C9 DD 5D D0 DD A5 58 FF FF FF B8 52 CB 33 56 BA 65 30 A1 42 52 50 FF 75 D4 FF 75 D0 E8 5C DB FE FF
+
+. 0 805AA26 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805AA2D 13
+. 83 EC 0C 68 A9 7D 06 08 E8 D6 D9 FE FF
+
+fmulp_16 ... ok
+. 0 805AA3A 5
+. 83 C4 10 EB 44
+
+. 0 805AA83 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063411 5
+. E8 75 76 FF FF
+
+. 0 805AA8B 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 28 D9 FE FF
+
+. 0 805AAC8 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805AACF 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 4D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 4F CC A2 4A 50 FF 75 D0 E8 0B DA FE FF
+
+. 0 805AAF6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805AAFD 13
+. 83 EC 0C 68 E4 7D 06 08 E8 06 D9 FE FF
+
+fimuls_1 ... ok
+. 0 805AB0A 5
+. 83 C4 10 EB 48
+
+. 0 805AB57 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063416 5
+. E8 44 77 FF FF
+
+. 0 805AB5F 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 54 D8 FE FF
+
+. 0 805AB9C 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805ABA3 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 4D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 4F CC A2 CA 50 FF 75 D0 E8 37 D9 FE FF
+
+. 0 805ABCA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805ABD1 13
+. 83 EC 0C 68 1F 7E 06 08 E8 32 D8 FE FF
+
+fimuls_2 ... ok
+. 0 805ABDE 5
+. 83 C4 10 EB 48
+
+. 0 805AC2B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806341B 5
+. E8 13 78 FF FF
+
+. 0 805AC33 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 80 D7 FE FF
+
+. 0 805AC70 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805AC77 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 4D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 4F CC A2 CA 50 FF 75 D0 E8 63 D8 FE FF
+
+. 0 805AC9E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805ACA5 13
+. 83 EC 0C 68 5A 7E 06 08 E8 5E D7 FE FF
+
+fimuls_3 ... ok
+. 0 805ACB2 5
+. 83 C4 10 EB 48
+
+. 0 805ACFF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063420 5
+. E8 E2 78 FF FF
+
+. 0 805AD07 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 AC D6 FE FF
+
+. 0 805AD44 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805AD4B 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 4D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 4F CC A2 4A 50 FF 75 D0 E8 8F D7 FE FF
+
+. 0 805AD72 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805AD79 13
+. 83 EC 0C 68 95 7E 06 08 E8 8A D6 FE FF
+
+fimuls_4 ... ok
+. 0 805AD86 5
+. 83 C4 10 EB 48
+
+. 0 805ADD3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063425 5
+. E8 B1 79 FF FF
+
+. 0 805ADDB 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 D0 D5 FE FF
+
+. 0 805AE20 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805AE27 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 4D DE DD 5D D0 DD A5 58 FF FF FF B8 E2 E9 26 99 BA 70 DF F3 41 52 50 FF 75 D4 FF 75 D0 E8 2E D7 FE FF
+
+. 0 805AE54 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805AE5B 13
+. 83 EC 0C 68 D0 7E 06 08 E8 A8 D5 FE FF
+
+fimuls_5 ... ok
+. 0 805AE68 5
+. 83 C4 10 EB 44
+
+. 0 805AEB1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806342A 5
+. E8 8A 7A FF FF
+
+. 0 805AEB9 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 F2 D4 FE FF
+
+. 0 805AEFE 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805AF05 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 4D DE DD 5D D0 DD A5 58 FF FF FF B8 E2 E9 26 99 BA 70 DF F3 C1 52 50 FF 75 D4 FF 75 D0 E8 50 D6 FE FF
+
+. 0 805AF32 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805AF39 13
+. 83 EC 0C 68 0B 7F 06 08 E8 CA D4 FE FF
+
+fimuls_6 ... ok
+. 0 805AF46 5
+. 83 C4 10 EB 44
+
+. 0 805AF8F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806342F 5
+. E8 63 7B FF FF
+
+. 0 805AF97 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 14 D4 FE FF
+
+. 0 805AFDC 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805AFE3 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 4D DE DD 5D D0 DD A5 58 FF FF FF B8 E2 E9 26 99 BA 70 DF F3 C1 52 50 FF 75 D4 FF 75 D0 E8 72 D5 FE FF
+
+. 0 805B010 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B017 13
+. 83 EC 0C 68 46 7F 06 08 E8 EC D3 FE FF
+
+fimuls_7 ... ok
+. 0 805B024 5
+. 83 C4 10 EB 44
+
+. 0 805B06D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063434 5
+. E8 3C 7C FF FF
+
+. 0 805B075 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 36 D3 FE FF
+
+. 0 805B0BA 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805B0C1 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 4D DE DD 5D D0 DD A5 58 FF FF FF B8 E2 E9 26 99 BA 70 DF F3 41 52 50 FF 75 D4 FF 75 D0 E8 94 D4 FE FF
+
+. 0 805B0EE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B0F5 13
+. 83 EC 0C 68 81 7F 06 08 E8 0E D3 FE FF
+
+fimuls_8 ... ok
+. 0 805B102 5
+. 83 C4 10 EB 44
+
+. 0 805B14B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063439 5
+. E8 15 7D FF FF
+
+. 0 805B153 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 5E D2 FE FF
+
+. 0 805B192 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805B199 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 4D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 08 91 C9 51 50 FF 75 D0 E8 41 D3 FE FF
+
+. 0 805B1C0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B1C7 13
+. 83 EC 0C 68 BC 7F 06 08 E8 3C D2 FE FF
+
+fimull_1 ... ok
+. 0 805B1D4 5
+. 83 C4 10 EB 48
+
+. 0 805B221 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806343E 5
+. E8 E6 7D FF FF
+
+. 0 805B229 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 88 D1 FE FF
+
+. 0 805B268 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805B26F 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 4D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 08 91 C9 D1 50 FF 75 D0 E8 6B D2 FE FF
+
+. 0 805B296 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B29D 13
+. 83 EC 0C 68 F7 7F 06 08 E8 66 D1 FE FF
+
+fimull_2 ... ok
+. 0 805B2AA 5
+. 83 C4 10 EB 48
+
+. 0 805B2F7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063443 5
+. E8 B7 7E FF FF
+
+. 0 805B2FF 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 B2 D0 FE FF
+
+. 0 805B33E 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805B345 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 4D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 08 91 C9 D1 50 FF 75 D0 E8 95 D1 FE FF
+
+. 0 805B36C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B373 13
+. 83 EC 0C 68 32 80 06 08 E8 90 D0 FE FF
+
+fimull_3 ... ok
+. 0 805B380 5
+. 83 C4 10 EB 48
+
+. 0 805B3CD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063448 5
+. E8 88 7F FF FF
+
+. 0 805B3D5 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 DC CF FE FF
+
+. 0 805B414 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805B41B 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 4D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 08 91 C9 51 50 FF 75 D0 E8 BF D0 FE FF
+
+. 0 805B442 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B449 13
+. 83 EC 0C 68 6D 80 06 08 E8 BA CF FE FF
+
+fimull_4 ... ok
+. 0 805B456 5
+. 83 C4 10 EB 48
+
+. 0 805B4A3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806344D 5
+. E8 59 80 FF FF
+
+. 0 805B4AB 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC F1 FB 09 00 83 EC 08 6A 01 68 40 A1 06 08 E8 FE CE FE FF
+
+. 0 805B4F2 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805B4F9 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 4D DC DD 5D D0 DD A5 58 FF FF FF B8 81 A9 CF 1E BA 9B 82 67 42 52 50 FF 75 D4 FF 75 D0 E8 5C D0 FE FF
+
+. 0 805B526 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B52D 13
+. 83 EC 0C 68 A8 80 06 08 E8 D6 CE FE FF
+
+fimull_5 ... ok
+. 0 805B53A 5
+. 83 C4 10 EB 44
+
+. 0 805B583 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063452 5
+. E8 34 81 FF FF
+
+. 0 805B58B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC F1 FB 09 00 83 EC 08 6A 01 68 40 A1 06 08 E8 1E CE FE FF
+
+. 0 805B5D2 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805B5D9 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 4D DC DD 5D D0 DD A5 58 FF FF FF B8 81 A9 CF 1E BA 9B 82 67 C2 52 50 FF 75 D4 FF 75 D0 E8 7C CF FE FF
+
+. 0 805B606 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B60D 13
+. 83 EC 0C 68 E3 80 06 08 E8 F6 CD FE FF
+
+fimull_6 ... ok
+. 0 805B61A 5
+. 83 C4 10 EB 44
+
+. 0 805B663 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063457 5
+. E8 0F 82 FF FF
+
+. 0 805B66B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC 0F 04 F6 FF 83 EC 08 6A 01 68 40 A1 06 08 E8 3E CD FE FF
+
+. 0 805B6B2 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805B6B9 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 4D DC DD 5D D0 DD A5 58 FF FF FF B8 81 A9 CF 1E BA 9B 82 67 C2 52 50 FF 75 D4 FF 75 D0 E8 9C CE FE FF
+
+. 0 805B6E6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B6ED 13
+. 83 EC 0C 68 1E 81 06 08 E8 16 CD FE FF
+
+fimull_7 ... ok
+. 0 805B6FA 5
+. 83 C4 10 EB 44
+
+. 0 805B743 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806345C 5
+. E8 EA 82 FF FF
+
+. 0 805B74B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC 0F 04 F6 FF 83 EC 08 6A 01 68 40 A1 06 08 E8 5E CC FE FF
+
+. 0 805B792 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805B799 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 4D DC DD 5D D0 DD A5 58 FF FF FF B8 81 A9 CF 1E BA 9B 82 67 42 52 50 FF 75 D4 FF 75 D0 E8 BC CD FE FF
+
+. 0 805B7C6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B7CD 13
+. 83 EC 0C 68 59 81 06 08 E8 36 CC FE FF
+
+fimull_8 ... ok
+. 0 805B7DA 5
+. 83 C4 10 EB 44
+
+. 0 805B823 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063461 5
+. E8 C5 83 FF FF
+
+. 0 805B82B 49
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 94 CB FE FF
+
+. 0 805B85C 11
+. 83 C4 10 85 C0 0F 85 8F 00 00 00
+
+. 0 805B867 62
+. 9B DD B5 68 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 D9 FC D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 00 60 9A 44 50 FF 75 D8 E8 5C CC FE FF
+
+. 0 805B8A5 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B8AC 13
+. 83 EC 0C 68 94 81 06 08 E8 57 CB FE FF
+
+frndint_1 ... ok
+. 0 805B8B9 5
+. 83 C4 10 EB 48
+
+. 0 805B906 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063466 5
+. E8 A3 84 FF FF
+
+. 0 805B90E 49
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 B1 CA FE FF
+
+. 0 805B93F 11
+. 83 C4 10 85 C0 0F 85 8F 00 00 00
+
+. 0 805B94A 62
+. 9B DD B5 68 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 D9 FC D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 00 60 9A C4 50 FF 75 D8 E8 79 CB FE FF
+
+. 0 805B988 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805B98F 13
+. 83 EC 0C 68 D2 81 06 08 E8 74 CA FE FF
+
+frndint_2 ... ok
+. 0 805B99C 5
+. 83 C4 10 EB 48
+
+. 0 805B9E9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806346B 5
+. E8 81 85 FF FF
+
+. 0 805B9F1 49
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 CE C9 FE FF
+
+. 0 805BA22 11
+. 83 C4 10 85 C0 0F 85 90 00 00 00
+
+. 0 805BA2D 63
+. 9B DD B5 68 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 D9 FC D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 00 40 9A 44 50 FF 75 D8 E8 95 CA FE FF
+
+. 0 805BA6C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805BA73 13
+. 83 EC 0C 68 10 82 06 08 E8 90 C9 FE FF
+
+frndint_3 ... ok
+. 0 805BA80 5
+. 83 C4 10 EB 48
+
+. 0 805BACD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063470 5
+. E8 60 86 FF FF
+
+. 0 805BAD5 49
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 EA C8 FE FF
+
+. 0 805BB06 11
+. 83 C4 10 85 C0 0F 85 90 00 00 00
+
+. 0 805BB11 63
+. 9B DD B5 68 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 D9 FC D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 00 60 9A C4 50 FF 75 D8 E8 B1 C9 FE FF
+
+. 0 805BB50 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805BB57 13
+. 83 EC 0C 68 4E 82 06 08 E8 AC C8 FE FF
+
+frndint_4 ... ok
+. 0 805BB64 5
+. 83 C4 10 EB 48
+
+. 0 805BBB1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063475 5
+. E8 3F 87 FF FF
+
+. 0 805BBB9 49
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 06 C8 FE FF
+
+. 0 805BBEA 11
+. 83 C4 10 85 C0 0F 85 90 00 00 00
+
+. 0 805BBF5 63
+. 9B DD B5 68 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 D9 FC D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 00 60 9A 44 50 FF 75 D8 E8 CD C8 FE FF
+
+. 0 805BC34 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805BC3B 13
+. 83 EC 0C 68 8C 82 06 08 E8 C8 C7 FE FF
+
+frndint_5 ... ok
+. 0 805BC48 5
+. 83 C4 10 EB 48
+
+. 0 805BC95 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806347A 5
+. E8 1E 88 FF FF
+
+. 0 805BC9D 49
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 22 C7 FE FF
+
+. 0 805BCCE 11
+. 83 C4 10 85 C0 0F 85 90 00 00 00
+
+. 0 805BCD9 63
+. 9B DD B5 68 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 D9 FC D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 00 40 9A C4 50 FF 75 D8 E8 E9 C7 FE FF
+
+. 0 805BD18 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805BD1F 13
+. 83 EC 0C 68 CA 82 06 08 E8 E4 C6 FE FF
+
+frndint_6 ... ok
+. 0 805BD2C 5
+. 83 C4 10 EB 48
+
+. 0 805BD79 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806347F 5
+. E8 FD 88 FF FF
+
+. 0 805BD81 49
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 3E C6 FE FF
+
+. 0 805BDB2 11
+. 83 C4 10 85 C0 0F 85 90 00 00 00
+
+. 0 805BDBD 63
+. 9B DD B5 68 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 D9 FC D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 00 40 9A 44 50 FF 75 D8 E8 05 C7 FE FF
+
+. 0 805BDFC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805BE03 13
+. 83 EC 0C 68 08 83 06 08 E8 00 C6 FE FF
+
+frndint_7 ... ok
+. 0 805BE10 5
+. 83 C4 10 EB 48
+
+. 0 805BE5D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063484 5
+. E8 DC 89 FF FF
+
+. 0 805BE65 49
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 83 EC 08 6A 01 68 40 A1 06 08 E8 5A C5 FE FF
+
+. 0 805BE96 11
+. 83 C4 10 85 C0 0F 85 90 00 00 00
+
+. 0 805BEA1 63
+. 9B DD B5 68 FF FF FF D9 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 D9 FC D9 5D D8 DD A5 68 FF FF FF 83 EC 08 B8 00 40 9A C4 50 FF 75 D8 E8 21 C6 FE FF
+
+. 0 805BEE0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805BEE7 13
+. 83 EC 0C 68 46 83 06 08 E8 1C C5 FE FF
+
+frndint_8 ... ok
+. 0 805BEF4 5
+. 83 C4 10 EB 48
+
+. 0 805BF41 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063489 5
+. E8 BB 8A FF FF
+
+. 0 805BF49 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 6E C4 FE FF
+
+. 0 805BF82 11
+. 83 C4 10 85 C0 0F 85 91 00 00 00
+
+. 0 805BF8D 68
+. 9B DD B5 68 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 D9 FC DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 00 BA 88 D6 32 41 52 50 FF 75 DC FF 75 D8 E8 B1 C5 FE FF
+
+. 0 805BFD1 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805BFD8 13
+. 83 EC 0C 68 84 83 06 08 E8 2B C4 FE FF
+
+frndint_9 ... ok
+. 0 805BFE5 5
+. 83 C4 10 EB 44
+
+. 0 805C02E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806348E 5
+. E8 A3 8B FF FF
+
+. 0 805C036 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 81 C3 FE FF
+
+. 0 805C06F 11
+. 83 C4 10 85 C0 0F 85 91 00 00 00
+
+. 0 805C07A 68
+. 9B DD B5 68 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 83 0C 24 00 D9 2C 24 83 C4 02 D9 FC DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 00 BA 88 D6 32 C1 52 50 FF 75 DC FF 75 D8 E8 C4 C4 FE FF
+
+. 0 805C0BE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805C0C5 13
+. 83 EC 0C 68 C2 83 06 08 E8 3E C3 FE FF
+
+frndint_10 ... ok
+. 0 805C0D2 5
+. 83 C4 10 EB 44
+
+. 0 805C11B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063493 5
+. E8 8B 8C FF FF
+
+. 0 805C123 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 94 C2 FE FF
+
+. 0 805C15C 11
+. 83 C4 10 85 C0 0F 85 92 00 00 00
+
+. 0 805C167 69
+. 9B DD B5 68 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 D9 FC DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 00 BA 87 D6 32 41 52 50 FF 75 DC FF 75 D8 E8 D6 C3 FE FF
+
+. 0 805C1AC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805C1B3 13
+. 83 EC 0C 68 03 84 06 08 E8 50 C2 FE FF
+
+frndint_11 ... ok
+. 0 805C1C0 5
+. 83 C4 10 EB 44
+
+. 0 805C209 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063498 5
+. E8 74 8D FF FF
+
+. 0 805C211 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 A6 C1 FE FF
+
+. 0 805C24A 11
+. 83 C4 10 85 C0 0F 85 92 00 00 00
+
+. 0 805C255 69
+. 9B DD B5 68 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 04 D9 2C 24 83 C4 02 D9 FC DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 00 BA 88 D6 32 C1 52 50 FF 75 DC FF 75 D8 E8 E8 C2 FE FF
+
+. 0 805C29A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805C2A1 13
+. 83 EC 0C 68 44 84 06 08 E8 62 C1 FE FF
+
+frndint_12 ... ok
+. 0 805C2AE 5
+. 83 C4 10 EB 44
+
+. 0 805C2F7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806349D 5
+. E8 5D 8E FF FF
+
+. 0 805C2FF 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 B8 C0 FE FF
+
+. 0 805C338 11
+. 83 C4 10 85 C0 0F 85 92 00 00 00
+
+. 0 805C343 69
+. 9B DD B5 68 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 D9 FC DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 00 BA 88 D6 32 41 52 50 FF 75 DC FF 75 D8 E8 FA C1 FE FF
+
+. 0 805C388 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805C38F 13
+. 83 EC 0C 68 85 84 06 08 E8 74 C0 FE FF
+
+frndint_13 ... ok
+. 0 805C39C 5
+. 83 C4 10 EB 44
+
+. 0 805C3E5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634A2 5
+. E8 46 8F FF FF
+
+. 0 805C3ED 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 CA BF FE FF
+
+. 0 805C426 11
+. 83 C4 10 85 C0 0F 85 92 00 00 00
+
+. 0 805C431 69
+. 9B DD B5 68 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 08 D9 2C 24 83 C4 02 D9 FC DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 00 BA 87 D6 32 C1 52 50 FF 75 DC FF 75 D8 E8 0C C1 FE FF
+
+. 0 805C476 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805C47D 13
+. 83 EC 0C 68 C6 84 06 08 E8 86 BF FE FF
+
+frndint_14 ... ok
+. 0 805C48A 5
+. 83 C4 10 EB 44
+
+. 0 805C4D3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634A7 5
+. E8 2F 90 FF FF
+
+. 0 805C4DB 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 DC BE FE FF
+
+. 0 805C514 11
+. 83 C4 10 85 C0 0F 85 92 00 00 00
+
+. 0 805C51F 69
+. 9B DD B5 68 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 D9 FC DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 00 BA 87 D6 32 41 52 50 FF 75 DC FF 75 D8 E8 1E C0 FE FF
+
+. 0 805C564 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805C56B 13
+. 83 EC 0C 68 07 85 06 08 E8 98 BE FE FF
+
+frndint_15 ... ok
+. 0 805C578 5
+. 83 C4 10 EB 44
+
+. 0 805C5C1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634AC 5
+. E8 18 91 FF FF
+
+. 0 805C5C9 57
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 83 EC 08 6A 01 68 40 A1 06 08 E8 EE BD FE FF
+
+. 0 805C602 11
+. 83 C4 10 85 C0 0F 85 92 00 00 00
+
+. 0 805C60D 69
+. 9B DD B5 68 FF FF FF DD 45 E0 83 EC 02 9B D9 3C 24 66 81 24 24 FF F3 66 81 0C 24 00 0C D9 2C 24 83 C4 02 D9 FC DD 5D D8 DD A5 68 FF FF FF B8 00 00 00 00 BA 87 D6 32 C1 52 50 FF 75 DC FF 75 D8 E8 30 BF FE FF
+
+. 0 805C652 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805C659 13
+. 83 EC 0C 68 48 85 06 08 E8 AA BD FE FF
+
+frndint_16 ... ok
+. 0 805C666 5
+. 83 C4 10 EB 44
+
+. 0 805C6AF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634B1 5
+. E8 01 92 FF FF
+
+. 0 805C6B7 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 F9 BC FE FF
+
+. 0 805C6F7 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805C6FE 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 65 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 DC BD FE FF
+
+. 0 805C725 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805C72C 13
+. 83 EC 0C 68 89 85 06 08 E8 D7 BC FE FF
+
+fsubs_1 ... ok
+. 0 805C739 5
+. 83 C4 10 EB 48
+
+. 0 805C786 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634B6 5
+. E8 D3 92 FF FF
+
+. 0 805C78E 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 22 BC FE FF
+
+. 0 805C7CE 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805C7D5 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 65 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 FF 3F 1C C6 50 FF 75 D0 E8 05 BD FE FF
+
+. 0 805C7FC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805C803 13
+. 83 EC 0C 68 C1 85 06 08 E8 00 BC FE FF
+
+fsubs_2 ... ok
+. 0 805C810 5
+. 83 C4 10 EB 48
+
+. 0 805C85D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634BB 5
+. E8 A5 93 FF FF
+
+. 0 805C865 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 4B BB FE FF
+
+. 0 805C8A5 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805C8AC 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 65 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 2E BC FE FF
+
+. 0 805C8D3 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805C8DA 13
+. 83 EC 0C 68 F9 85 06 08 E8 29 BB FE FF
+
+fsubs_3 ... ok
+. 0 805C8E7 5
+. 83 C4 10 EB 48
+
+. 0 805C934 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634C0 5
+. E8 77 94 FF FF
+
+. 0 805C93C 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 74 BA FE FF
+
+. 0 805C97C 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805C983 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 65 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 57 BB FE FF
+
+. 0 805C9AA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805C9B1 13
+. 83 EC 0C 68 31 86 06 08 E8 52 BA FE FF
+
+fsubs_4 ... ok
+. 0 805C9BE 5
+. 83 C4 10 EB 48
+
+. 0 805CA0B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634C5 5
+. E8 49 95 FF FF
+
+. 0 805CA13 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 86 B9 FE FF
+
+. 0 805CA6A 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805CA71 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 65 D8 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 E4 BA FE FF
+
+. 0 805CA9E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805CAA5 13
+. 83 EC 0C 68 69 86 06 08 E8 5E B9 FE FF
+
+fsubl_1 ... ok
+. 0 805CAB2 5
+. 83 C4 10 EB 44
+
+. 0 805CAFB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634CA 5
+. E8 34 96 FF FF
+
+. 0 805CB03 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 96 B8 FE FF
+
+. 0 805CB5A 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805CB61 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 65 D8 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 F4 B9 FE FF
+
+. 0 805CB8E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805CB95 13
+. 83 EC 0C 68 A1 86 06 08 E8 6E B8 FE FF
+
+fsubl_2 ... ok
+. 0 805CBA2 5
+. 83 C4 10 EB 44
+
+. 0 805CBEB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634CF 5
+. E8 1F 97 FF FF
+
+. 0 805CBF3 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 A6 B7 FE FF
+
+. 0 805CC4A 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805CC51 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 65 D8 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 04 B9 FE FF
+
+. 0 805CC7E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805CC85 13
+. 83 EC 0C 68 D9 86 06 08 E8 7E B7 FE FF
+
+fsubl_3 ... ok
+. 0 805CC92 5
+. 83 C4 10 EB 44
+
+. 0 805CCDB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634D4 5
+. E8 0A 98 FF FF
+
+. 0 805CCE3 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 B6 B6 FE FF
+
+. 0 805CD3A 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805CD41 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 65 D8 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 14 B8 FE FF
+
+. 0 805CD6E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805CD75 13
+. 83 EC 0C 68 11 87 06 08 E8 8E B6 FE FF
+
+fsubl_4 ... ok
+. 0 805CD82 5
+. 83 C4 10 EB 44
+
+. 0 805CDCB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634D9 5
+. E8 F5 98 FF FF
+
+. 0 805CDD3 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 D6 B5 FE FF
+
+. 0 805CE1A 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 805CE25 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC E2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 AD B6 FE FF
+
+. 0 805CE54 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805CE5B 13
+. 83 EC 0C 68 49 87 06 08 E8 A8 B5 FE FF
+
+fsub_1 ... ok
+. 0 805CE68 5
+. 83 C4 10 EB 48
+
+. 0 805CEB5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634DE 5
+. E8 DA 99 FF FF
+
+. 0 805CEBD 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 EC B4 FE FF
+
+. 0 805CF04 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 805CF0F 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC E2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 C3 B5 FE FF
+
+. 0 805CF3E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805CF45 13
+. 83 EC 0C 68 7E 87 06 08 E8 BE B4 FE FF
+
+fsub_2 ... ok
+. 0 805CF52 5
+. 83 C4 10 EB 48
+
+. 0 805CF9F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634E3 5
+. E8 BF 9A FF FF
+
+. 0 805CFA7 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 02 B4 FE FF
+
+. 0 805CFEE 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 805CFF9 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC E2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 D9 B4 FE FF
+
+. 0 805D028 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805D02F 13
+. 83 EC 0C 68 B3 87 06 08 E8 D4 B3 FE FF
+
+fsub_3 ... ok
+. 0 805D03C 5
+. 83 C4 10 EB 48
+
+. 0 805D089 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634E8 5
+. E8 A4 9B FF FF
+
+. 0 805D091 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 18 B3 FE FF
+
+. 0 805D0D8 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 805D0E3 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC E2 D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 EF B3 FE FF
+
+. 0 805D112 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805D119 13
+. 83 EC 0C 68 E8 87 06 08 E8 EA B2 FE FF
+
+fsub_4 ... ok
+. 0 805D126 5
+. 83 C4 10 EB 48
+
+. 0 805D173 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634ED 5
+. E8 89 9C FF FF
+
+. 0 805D17B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 1E B2 FE FF
+
+. 0 805D1D2 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 805D1DD 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC E2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 70 B3 FE FF
+
+. 0 805D212 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805D219 13
+. 83 EC 0C 68 1D 88 06 08 E8 EA B1 FE FF
+
+fsub_5 ... ok
+. 0 805D226 5
+. 83 C4 10 EB 44
+
+. 0 805D26F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634F2 5
+. E8 80 9D FF FF
+
+. 0 805D277 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 22 B1 FE FF
+
+. 0 805D2CE 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 805D2D9 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC E2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 74 B2 FE FF
+
+. 0 805D30E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805D315 13
+. 83 EC 0C 68 52 88 06 08 E8 EE B0 FE FF
+
+fsub_6 ... ok
+. 0 805D322 5
+. 83 C4 10 EB 44
+
+. 0 805D36B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634F7 5
+. E8 77 9E FF FF
+
+. 0 805D373 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 26 B0 FE FF
+
+. 0 805D3CA 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 805D3D5 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC E2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 78 B1 FE FF
+
+. 0 805D40A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805D411 13
+. 83 EC 0C 68 87 88 06 08 E8 F2 AF FE FF
+
+fsub_7 ... ok
+. 0 805D41E 5
+. 83 C4 10 EB 44
+
+. 0 805D467 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80634FC 5
+. E8 6E 9F FF FF
+
+. 0 805D46F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 2A AF FE FF
+
+. 0 805D4C6 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 805D4D1 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC E2 D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 7C B0 FE FF
+
+. 0 805D506 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805D50D 13
+. 83 EC 0C 68 BC 88 06 08 E8 F6 AE FE FF
+
+fsub_8 ... ok
+. 0 805D51A 5
+. 83 C4 10 EB 44
+
+. 0 805D563 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063501 5
+. E8 65 A0 FF FF
+
+. 0 805D56B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 3E AE FE FF
+
+. 0 805D5B2 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805D5B9 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 E2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 1D AF FE FF
+
+. 0 805D5E4 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805D5EB 13
+. 83 EC 0C 68 F1 88 06 08 E8 18 AE FE FF
+
+fsub_9 ... ok
+. 0 805D5F8 5
+. 83 C4 10 EB 48
+
+. 0 805D645 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063506 5
+. E8 42 A1 FF FF
+
+. 0 805D64D 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 5C AD FE FF
+
+. 0 805D694 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805D69B 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 E2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 3B AE FE FF
+
+. 0 805D6C6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805D6CD 13
+. 83 EC 0C 68 26 89 06 08 E8 36 AD FE FF
+
+fsub_10 ... ok
+. 0 805D6DA 5
+. 83 C4 10 EB 48
+
+. 0 805D727 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806350B 5
+. E8 1F A2 FF FF
+
+. 0 805D72F 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 7A AC FE FF
+
+. 0 805D776 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805D77D 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 E2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 59 AD FE FF
+
+. 0 805D7A8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805D7AF 13
+. 83 EC 0C 68 5E 89 06 08 E8 54 AC FE FF
+
+fsub_11 ... ok
+. 0 805D7BC 5
+. 83 C4 10 EB 48
+
+. 0 805D809 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063510 5
+. E8 FC A2 FF FF
+
+. 0 805D811 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 98 AB FE FF
+
+. 0 805D858 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805D85F 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 E2 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 77 AC FE FF
+
+. 0 805D88A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805D891 13
+. 83 EC 0C 68 96 89 06 08 E8 72 AB FE FF
+
+fsub_12 ... ok
+. 0 805D89E 5
+. 83 C4 10 EB 48
+
+. 0 805D8EB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063515 5
+. E8 D9 A3 FF FF
+
+. 0 805D8F3 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 A6 AA FE FF
+
+. 0 805D94A 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 805D951 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 E2 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 00 AC FE FF
+
+. 0 805D982 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805D989 13
+. 83 EC 0C 68 CE 89 06 08 E8 7A AA FE FF
+
+fsub_13 ... ok
+. 0 805D996 5
+. 83 C4 10 EB 44
+
+. 0 805D9DF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806351A 5
+. E8 C8 A4 FF FF
+
+. 0 805D9E7 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 B2 A9 FE FF
+
+. 0 805DA3E 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 805DA45 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 E2 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 0C AB FE FF
+
+. 0 805DA76 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805DA7D 13
+. 83 EC 0C 68 06 8A 06 08 E8 86 A9 FE FF
+
+fsub_14 ... ok
+. 0 805DA8A 5
+. 83 C4 10 EB 44
+
+. 0 805DAD3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806351F 5
+. E8 B7 A5 FF FF
+
+. 0 805DADB 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 BE A8 FE FF
+
+. 0 805DB32 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 805DB39 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 E2 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 18 AA FE FF
+
+. 0 805DB6A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805DB71 13
+. 83 EC 0C 68 3E 8A 06 08 E8 92 A8 FE FF
+
+fsub_15 ... ok
+. 0 805DB7E 5
+. 83 C4 10 EB 44
+
+. 0 805DBC7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063524 5
+. E8 A6 A6 FF FF
+
+. 0 805DBCF 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 CA A7 FE FF
+
+. 0 805DC26 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 805DC2D 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 E2 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 24 A9 FE FF
+
+. 0 805DC5E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805DC65 13
+. 83 EC 0C 68 76 8A 06 08 E8 9E A7 FE FF
+
+fsub_16 ... ok
+. 0 805DC72 5
+. 83 C4 10 EB 44
+
+. 0 805DCBB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063529 5
+. E8 95 A7 FF FF
+
+. 0 805DCC3 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 E6 A6 FE FF
+
+. 0 805DD0A 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 805DD11 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE E2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 C3 A7 FE FF
+
+. 0 805DD3E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805DD45 13
+. 83 EC 0C 68 AE 8A 06 08 E8 BE A6 FE FF
+
+fsubp_1 ... ok
+. 0 805DD52 5
+. 83 C4 10 EB 48
+
+. 0 805DD9F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806352E 5
+. E8 74 A8 FF FF
+
+. 0 805DDA7 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 02 A6 FE FF
+
+. 0 805DDEE 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 805DDF5 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE E2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 DF A6 FE FF
+
+. 0 805DE22 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805DE29 13
+. 83 EC 0C 68 E6 8A 06 08 E8 DA A5 FE FF
+
+fsubp_2 ... ok
+. 0 805DE36 5
+. 83 C4 10 EB 48
+
+. 0 805DE83 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063533 5
+. E8 53 A9 FF FF
+
+. 0 805DE8B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 1E A5 FE FF
+
+. 0 805DED2 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 805DED9 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE E2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 FB A5 FE FF
+
+. 0 805DF06 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805DF0D 13
+. 83 EC 0C 68 1E 8B 06 08 E8 F6 A4 FE FF
+
+fsubp_3 ... ok
+. 0 805DF1A 5
+. 83 C4 10 EB 48
+
+. 0 805DF67 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063538 5
+. E8 32 AA FF FF
+
+. 0 805DF6F 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 3A A4 FE FF
+
+. 0 805DFB6 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 805DFBD 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE E2 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 17 A5 FE FF
+
+. 0 805DFEA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805DFF1 13
+. 83 EC 0C 68 56 8B 06 08 E8 12 A4 FE FF
+
+fsubp_4 ... ok
+. 0 805DFFE 5
+. 83 C4 10 EB 48
+
+. 0 805E04B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806353D 5
+. E8 11 AB FF FF
+
+. 0 805E053 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 46 A3 FE FF
+
+. 0 805E0AA 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 805E0B5 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE E2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 9A A4 FE FF
+
+. 0 805E0E8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805E0EF 13
+. 83 EC 0C 68 8E 8B 06 08 E8 14 A3 FE FF
+
+fsubp_5 ... ok
+. 0 805E0FC 5
+. 83 C4 10 EB 44
+
+. 0 805E145 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063542 5
+. E8 06 AC FF FF
+
+. 0 805E14D 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 4C A2 FE FF
+
+. 0 805E1A4 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 805E1AF 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE E2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 A0 A3 FE FF
+
+. 0 805E1E2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805E1E9 13
+. 83 EC 0C 68 C6 8B 06 08 E8 1A A2 FE FF
+
+fsubp_6 ... ok
+. 0 805E1F6 5
+. 83 C4 10 EB 44
+
+. 0 805E23F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063547 5
+. E8 FB AC FF FF
+
+. 0 805E247 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 52 A1 FE FF
+
+. 0 805E29E 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 805E2A9 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE E2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 A6 A2 FE FF
+
+. 0 805E2DC 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805E2E3 13
+. 83 EC 0C 68 FE 8B 06 08 E8 20 A1 FE FF
+
+fsubp_7 ... ok
+. 0 805E2F0 5
+. 83 C4 10 EB 44
+
+. 0 805E339 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806354C 5
+. E8 F0 AD FF FF
+
+. 0 805E341 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 58 A0 FE FF
+
+. 0 805E398 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 805E3A3 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE E2 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 AC A1 FE FF
+
+. 0 805E3D6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805E3DD 13
+. 83 EC 0C 68 36 8C 06 08 E8 26 A0 FE FF
+
+fsubp_8 ... ok
+. 0 805E3EA 5
+. 83 C4 10 EB 44
+
+. 0 805E433 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063551 5
+. E8 E5 AE FF FF
+
+. 0 805E43B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 6E 9F FE FF
+
+. 0 805E482 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805E489 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE E1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 4F A0 FE FF
+
+. 0 805E4B2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805E4B9 13
+. 83 EC 0C 68 6E 8C 06 08 E8 4A 9F FE FF
+
+fsubp_9 ... ok
+. 0 805E4C6 5
+. 83 C4 10 EB 48
+
+. 0 805E513 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063556 5
+. E8 C0 AF FF FF
+
+. 0 805E51B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 8E 9E FE FF
+
+. 0 805E562 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805E569 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE E1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 6F 9F FE FF
+
+. 0 805E592 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805E599 13
+. 83 EC 0C 68 A6 8C 06 08 E8 6A 9E FE FF
+
+fsubp_10 ... ok
+. 0 805E5A6 5
+. 83 C4 10 EB 48
+
+. 0 805E5F3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806355B 5
+. E8 9B B0 FF FF
+
+. 0 805E5FB 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 AE 9D FE FF
+
+. 0 805E642 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805E649 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE E1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 8F 9E FE FF
+
+. 0 805E672 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805E679 13
+. 83 EC 0C 68 E1 8C 06 08 E8 8A 9D FE FF
+
+fsubp_11 ... ok
+. 0 805E686 5
+. 83 C4 10 EB 48
+
+. 0 805E6D3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063560 5
+. E8 76 B1 FF FF
+
+. 0 805E6DB 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 CE 9C FE FF
+
+. 0 805E722 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805E729 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE E1 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 AF 9D FE FF
+
+. 0 805E752 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805E759 13
+. 83 EC 0C 68 1C 8D 06 08 E8 AA 9C FE FF
+
+fsubp_12 ... ok
+. 0 805E766 5
+. 83 C4 10 EB 48
+
+. 0 805E7B3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063565 5
+. E8 51 B2 FF FF
+
+. 0 805E7BB 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 DE 9B FE FF
+
+. 0 805E812 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805E819 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE E1 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 3A 9D FE FF
+
+. 0 805E848 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805E84F 13
+. 83 EC 0C 68 57 8D 06 08 E8 B4 9B FE FF
+
+fsubp_13 ... ok
+. 0 805E85C 5
+. 83 C4 10 EB 44
+
+. 0 805E8A5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806356A 5
+. E8 3E B3 FF FF
+
+. 0 805E8AD 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 EC 9A FE FF
+
+. 0 805E904 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805E90B 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE E1 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 48 9C FE FF
+
+. 0 805E93A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805E941 13
+. 83 EC 0C 68 92 8D 06 08 E8 C2 9A FE FF
+
+fsubp_14 ... ok
+. 0 805E94E 5
+. 83 C4 10 EB 44
+
+. 0 805E997 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806356F 5
+. E8 2B B4 FF FF
+
+. 0 805E99F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 FA 99 FE FF
+
+. 0 805E9F6 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805E9FD 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE E1 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 56 9B FE FF
+
+. 0 805EA2C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805EA33 13
+. 83 EC 0C 68 CD 8D 06 08 E8 D0 99 FE FF
+
+fsubp_15 ... ok
+. 0 805EA40 5
+. 83 C4 10 EB 44
+
+. 0 805EA89 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063574 5
+. E8 18 B5 FF FF
+
+. 0 805EA91 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 08 99 FE FF
+
+. 0 805EAE8 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 805EAEF 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE E1 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 64 9A FE FF
+
+. 0 805EB1E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805EB25 13
+. 83 EC 0C 68 08 8E 06 08 E8 DE 98 FE FF
+
+fsubp_16 ... ok
+. 0 805EB32 5
+. 83 C4 10 EB 44
+
+. 0 805EB7B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063579 5
+. E8 05 B6 FF FF
+
+. 0 805EB83 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 30 98 FE FF
+
+. 0 805EBC0 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805EBC7 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 65 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA E6 40 C5 50 FF 75 D0 E8 13 99 FE FF
+
+. 0 805EBEE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805EBF5 13
+. 83 EC 0C 68 43 8E 06 08 E8 0E 98 FE FF
+
+fisubs_1 ... ok
+. 0 805EC02 5
+. 83 C4 10 EB 48
+
+. 0 805EC4F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806357E 5
+. E8 D4 B6 FF FF
+
+. 0 805EC57 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 5C 97 FE FF
+
+. 0 805EC94 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805EC9B 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 65 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 8B 9C AD C5 50 FF 75 D0 E8 3F 98 FE FF
+
+. 0 805ECC2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805ECC9 13
+. 83 EC 0C 68 7E 8E 06 08 E8 3A 97 FE FF
+
+fisubs_2 ... ok
+. 0 805ECD6 5
+. 83 C4 10 EB 48
+
+. 0 805ED23 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063583 5
+. E8 A3 B7 FF FF
+
+. 0 805ED2B 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 88 96 FE FF
+
+. 0 805ED68 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805ED6F 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 65 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 8B 9C AD 45 50 FF 75 D0 E8 6B 97 FE FF
+
+. 0 805ED96 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805ED9D 13
+. 83 EC 0C 68 B9 8E 06 08 E8 66 96 FE FF
+
+fisubs_3 ... ok
+. 0 805EDAA 5
+. 83 C4 10 EB 48
+
+. 0 805EDF7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063588 5
+. E8 72 B8 FF FF
+
+. 0 805EDFF 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 B4 95 FE FF
+
+. 0 805EE3C 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805EE43 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 65 DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA E6 40 45 50 FF 75 D0 E8 97 96 FE FF
+
+. 0 805EE6A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805EE71 13
+. 83 EC 0C 68 F4 8E 06 08 E8 92 95 FE FF
+
+fisubs_4 ... ok
+. 0 805EE7E 5
+. 83 C4 10 EB 48
+
+. 0 805EECB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806358D 5
+. E8 41 B9 FF FF
+
+. 0 805EED3 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 D8 94 FE FF
+
+. 0 805EF18 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805EF1F 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 65 DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA A6 C5 32 41 52 50 FF 75 D4 FF 75 D0 E8 36 96 FE FF
+
+. 0 805EF4C 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805EF53 13
+. 83 EC 0C 68 2F 8F 06 08 E8 B0 94 FE FF
+
+fisubs_5 ... ok
+. 0 805EF60 5
+. 83 C4 10 EB 44
+
+. 0 805EFA9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063592 5
+. E8 1A BA FF FF
+
+. 0 805EFB1 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 FA 93 FE FF
+
+. 0 805EFF6 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805EFFD 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 65 DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 68 E7 32 C1 52 50 FF 75 D4 FF 75 D0 E8 58 95 FE FF
+
+. 0 805F02A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F031 13
+. 83 EC 0C 68 6A 8F 06 08 E8 D2 93 FE FF
+
+fisubs_6 ... ok
+. 0 805F03E 5
+. 83 C4 10 EB 44
+
+. 0 805F087 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063597 5
+. E8 F3 BA FF FF
+
+. 0 805F08F 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 1C 93 FE FF
+
+. 0 805F0D4 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805F0DB 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 65 DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 68 E7 32 41 52 50 FF 75 D4 FF 75 D0 E8 7A 94 FE FF
+
+. 0 805F108 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F10F 13
+. 83 EC 0C 68 A5 8F 06 08 E8 F4 92 FE FF
+
+fisubs_7 ... ok
+. 0 805F11C 5
+. 83 C4 10 EB 44
+
+. 0 805F165 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806359C 5
+. E8 CC BB FF FF
+
+. 0 805F16D 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 3E 92 FE FF
+
+. 0 805F1B2 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805F1B9 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 65 DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA A6 C5 32 C1 52 50 FF 75 D4 FF 75 D0 E8 9C 93 FE FF
+
+. 0 805F1E6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F1ED 13
+. 83 EC 0C 68 E0 8F 06 08 E8 16 92 FE FF
+
+fisubs_8 ... ok
+. 0 805F1FA 5
+. 83 C4 10 EB 44
+
+. 0 805F243 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635A1 5
+. E8 A5 BC FF FF
+
+. 0 805F24B 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 66 91 FE FF
+
+. 0 805F28A 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805F291 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 65 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 5C 2F A7 CC 50 FF 75 D0 E8 49 92 FE FF
+
+. 0 805F2B8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F2BF 13
+. 83 EC 0C 68 1B 90 06 08 E8 44 91 FE FF
+
+fisubl_1 ... ok
+. 0 805F2CC 5
+. 83 C4 10 EB 48
+
+. 0 805F319 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635A6 5
+. E8 76 BD FF FF
+
+. 0 805F321 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 90 90 FE FF
+
+. 0 805F360 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805F367 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 65 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 30 A7 CC 50 FF 75 D0 E8 73 91 FE FF
+
+. 0 805F38E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F395 13
+. 83 EC 0C 68 56 90 06 08 E8 6E 90 FE FF
+
+fisubl_2 ... ok
+. 0 805F3A2 5
+. 83 C4 10 EB 48
+
+. 0 805F3EF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635AB 5
+. E8 47 BE FF FF
+
+. 0 805F3F7 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 BA 8F FE FF
+
+. 0 805F436 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805F43D 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 65 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 30 A7 4C 50 FF 75 D0 E8 9D 90 FE FF
+
+. 0 805F464 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F46B 13
+. 83 EC 0C 68 91 90 06 08 E8 98 8F FE FF
+
+fisubl_3 ... ok
+. 0 805F478 5
+. 83 C4 10 EB 48
+
+. 0 805F4C5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635B0 5
+. E8 18 BF FF FF
+
+. 0 805F4CD 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 E4 8E FE FF
+
+. 0 805F50C 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805F513 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 65 DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 5C 2F A7 4C 50 FF 75 D0 E8 C7 8F FE FF
+
+. 0 805F53A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F541 13
+. 83 EC 0C 68 CC 90 06 08 E8 C2 8E FE FF
+
+fisubl_4 ... ok
+. 0 805F54E 5
+. 83 C4 10 EB 48
+
+. 0 805F59B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635B5 5
+. E8 E9 BF FF FF
+
+. 0 805F5A3 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 06 8E FE FF
+
+. 0 805F5EA 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805F5F1 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 65 DC DD 5D D0 DD A5 58 FF FF FF B8 91 32 F0 A4 BA A4 9A 94 C1 52 50 FF 75 D4 FF 75 D0 E8 64 8F FE FF
+
+. 0 805F61E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F625 13
+. 83 EC 0C 68 07 91 06 08 E8 DE 8D FE FF
+
+fisubl_5 ... ok
+. 0 805F632 5
+. 83 C4 10 EB 44
+
+. 0 805F67B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635BA 5
+. E8 C4 C0 FF FF
+
+. 0 805F683 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 26 8D FE FF
+
+. 0 805F6CA 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805F6D1 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 65 DC DD 5D D0 DD A5 58 FF FF FF B8 6F CD 0F E3 BA 58 31 95 C1 52 50 FF 75 D4 FF 75 D0 E8 84 8E FE FF
+
+. 0 805F6FE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F705 13
+. 83 EC 0C 68 42 91 06 08 E8 FE 8C FE FF
+
+fisubl_6 ... ok
+. 0 805F712 5
+. 83 C4 10 EB 44
+
+. 0 805F75B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635BF 5
+. E8 9F C1 FF FF
+
+. 0 805F763 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 46 8C FE FF
+
+. 0 805F7AA 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805F7B1 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 65 DC DD 5D D0 DD A5 58 FF FF FF B8 6F CD 0F E3 BA 58 31 95 41 52 50 FF 75 D4 FF 75 D0 E8 A4 8D FE FF
+
+. 0 805F7DE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F7E5 13
+. 83 EC 0C 68 7D 91 06 08 E8 1E 8C FE FF
+
+fisubl_7 ... ok
+. 0 805F7F2 5
+. 83 C4 10 EB 44
+
+. 0 805F83B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635C4 5
+. E8 7A C2 FF FF
+
+. 0 805F843 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 DC 00 00 00 00 C7 45 DC 4F 80 C6 FA 83 EC 08 6A 01 68 40 A1 06 08 E8 66 8B FE FF
+
+. 0 805F88A 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805F891 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DA 65 DC DD 5D D0 DD A5 58 FF FF FF B8 91 32 F0 A4 BA A4 9A 94 41 52 50 FF 75 D4 FF 75 D0 E8 C4 8C FE FF
+
+. 0 805F8BE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F8C5 13
+. 83 EC 0C 68 B8 91 06 08 E8 3E 8B FE FF
+
+fisubl_8 ... ok
+. 0 805F8D2 5
+. 83 C4 10 EB 44
+
+. 0 805F91B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635C9 5
+. E8 55 C3 FF FF
+
+. 0 805F923 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 8D 8A FE FF
+
+. 0 805F963 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805F96A 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 6D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 70 8B FE FF
+
+. 0 805F991 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805F998 13
+. 83 EC 0C 68 F3 91 06 08 E8 6B 8A FE FF
+
+fsubrs_1 ... ok
+. 0 805F9A5 5
+. 83 C4 10 EB 48
+
+. 0 805F9F2 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635CE 5
+. E8 27 C4 FF FF
+
+. 0 805F9FA 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 B6 89 FE FF
+
+. 0 805FA3A 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805FA41 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 6D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 FF 3F 1C 46 50 FF 75 D0 E8 99 8A FE FF
+
+. 0 805FA68 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805FA6F 13
+. 83 EC 0C 68 2E 92 06 08 E8 94 89 FE FF
+
+fsubrs_2 ... ok
+. 0 805FA7C 5
+. 83 C4 10 EB 48
+
+. 0 805FAC9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635D3 5
+. E8 F9 C4 FF FF
+
+. 0 805FAD1 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 DF 88 FE FF
+
+. 0 805FB11 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805FB18 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 6D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 C2 89 FE FF
+
+. 0 805FB3F 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805FB46 13
+. 83 EC 0C 68 69 92 06 08 E8 BD 88 FE FF
+
+fsubrs_3 ... ok
+. 0 805FB53 5
+. 83 C4 10 EB 48
+
+. 0 805FBA0 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635D8 5
+. E8 CB C5 FF FF
+
+. 0 805FBA8 64
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 08 88 FE FF
+
+. 0 805FBE8 7
+. 83 C4 10 85 C0 75 78
+
+. 0 805FBEF 39
+. 9B DD B5 58 FF FF FF D9 45 E0 D8 6D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 EB 88 FE FF
+
+. 0 805FC16 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805FC1D 13
+. 83 EC 0C 68 A4 92 06 08 E8 E6 87 FE FF
+
+fsubrs_4 ... ok
+. 0 805FC2A 5
+. 83 C4 10 EB 48
+
+. 0 805FC77 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635DD 5
+. E8 9D C6 FF FF
+
+. 0 805FC7F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 1A 87 FE FF
+
+. 0 805FCD6 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805FCDD 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 6D D8 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 78 88 FE FF
+
+. 0 805FD0A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805FD11 13
+. 83 EC 0C 68 DF 92 06 08 E8 F2 86 FE FF
+
+fsubrl_1 ... ok
+. 0 805FD1E 5
+. 83 C4 10 EB 44
+
+. 0 805FD67 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635E2 5
+. E8 88 C7 FF FF
+
+. 0 805FD6F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 2A 86 FE FF
+
+. 0 805FDC6 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805FDCD 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 6D D8 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 88 87 FE FF
+
+. 0 805FDFA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805FE01 13
+. 83 EC 0C 68 1A 93 06 08 E8 02 86 FE FF
+
+fsubrl_2 ... ok
+. 0 805FE0E 5
+. 83 C4 10 EB 44
+
+. 0 805FE57 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635E7 5
+. E8 73 C8 FF FF
+
+. 0 805FE5F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 3A 85 FE FF
+
+. 0 805FEB6 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805FEBD 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 6D D8 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 98 86 FE FF
+
+. 0 805FEEA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805FEF1 13
+. 83 EC 0C 68 55 93 06 08 E8 12 85 FE FF
+
+fsubrl_3 ... ok
+. 0 805FEFE 5
+. 83 C4 10 EB 44
+
+. 0 805FF47 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635EC 5
+. E8 5E C9 FF FF
+
+. 0 805FF4F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 4A 84 FE FF
+
+. 0 805FFA6 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805FFAD 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DC 6D D8 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 A8 85 FE FF
+
+. 0 805FFDA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 805FFE1 13
+. 83 EC 0C 68 90 93 06 08 E8 22 84 FE FF
+
+fsubrl_4 ... ok
+. 0 805FFEE 5
+. 83 C4 10 EB 44
+
+. 0 8060037 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635F1 5
+. E8 49 CA FF FF
+
+. 0 806003F 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 6A 83 FE FF
+
+. 0 8060086 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8060091 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC EA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 41 84 FE FF
+
+. 0 80600C0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80600C7 13
+. 83 EC 0C 68 CB 93 06 08 E8 3C 83 FE FF
+
+fsubr_1 ... ok
+. 0 80600D4 5
+. 83 C4 10 EB 48
+
+. 0 8060121 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635F6 5
+. E8 2E CB FF FF
+
+. 0 8060129 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 80 82 FE FF
+
+. 0 8060170 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 806017B 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC EA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 57 83 FE FF
+
+. 0 80601AA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80601B1 13
+. 83 EC 0C 68 03 94 06 08 E8 52 82 FE FF
+
+fsubr_2 ... ok
+. 0 80601BE 5
+. 83 C4 10 EB 48
+
+. 0 806020B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80635FB 5
+. E8 13 CC FF FF
+
+. 0 8060213 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 96 81 FE FF
+
+. 0 806025A 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8060265 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC EA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 6D 82 FE FF
+
+. 0 8060294 7
+. 83 C4 10 85 C0 74 12
+
+. 0 806029B 13
+. 83 EC 0C 68 3B 94 06 08 E8 68 81 FE FF
+
+fsubr_3 ... ok
+. 0 80602A8 5
+. 83 C4 10 EB 48
+
+. 0 80602F5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063600 5
+. E8 F8 CC FF FF
+
+. 0 80602FD 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 AC 80 FE FF
+
+. 0 8060344 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 806034F 47
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DC EA D9 F7 D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 83 81 FE FF
+
+. 0 806037E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060385 13
+. 83 EC 0C 68 73 94 06 08 E8 7E 80 FE FF
+
+fsubr_4 ... ok
+. 0 8060392 5
+. 83 C4 10 EB 48
+
+. 0 80603DF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063605 5
+. E8 DD CD FF FF
+
+. 0 80603E7 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 B2 7F FE FF
+
+. 0 806043E 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 8060449 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC EA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 04 81 FE FF
+
+. 0 806047E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060485 13
+. 83 EC 0C 68 AB 94 06 08 E8 7E 7F FE FF
+
+fsubr_5 ... ok
+. 0 8060492 5
+. 83 C4 10 EB 44
+
+. 0 80604DB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806360A 5
+. E8 D4 CE FF FF
+
+. 0 80604E3 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 B6 7E FE FF
+
+. 0 806053A 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 8060545 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC EA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 08 80 FE FF
+
+. 0 806057A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060581 13
+. 83 EC 0C 68 E3 94 06 08 E8 82 7E FE FF
+
+fsubr_6 ... ok
+. 0 806058E 5
+. 83 C4 10 EB 44
+
+. 0 80605D7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806360F 5
+. E8 CB CF FF FF
+
+. 0 80605DF 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 BA 7D FE FF
+
+. 0 8060636 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 8060641 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC EA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 0C 7F FE FF
+
+. 0 8060676 7
+. 83 C4 10 85 C0 74 12
+
+. 0 806067D 13
+. 83 EC 0C 68 1B 95 06 08 E8 86 7D FE FF
+
+fsubr_7 ... ok
+. 0 806068A 5
+. 83 C4 10 EB 44
+
+. 0 80606D3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063614 5
+. E8 C2 D0 FF FF
+
+. 0 80606DB 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 BE 7C FE FF
+
+. 0 8060732 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 806073D 53
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DC EA D9 F7 D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 10 7E FE FF
+
+. 0 8060772 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060779 13
+. 83 EC 0C 68 53 95 06 08 E8 8A 7C FE FF
+
+fsubr_8 ... ok
+. 0 8060786 5
+. 83 C4 10 EB 44
+
+. 0 80607CF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063619 5
+. E8 B9 D1 FF FF
+
+. 0 80607D7 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 D2 7B FE FF
+
+. 0 806081E 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8060825 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 EA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 B1 7C FE FF
+
+. 0 8060850 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060857 13
+. 83 EC 0C 68 8B 95 06 08 E8 AC 7B FE FF
+
+fsubr_9 ... ok
+. 0 8060864 5
+. 83 C4 10 EB 48
+
+. 0 80608B1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806361E 5
+. E8 96 D2 FF FF
+
+. 0 80608B9 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 F0 7A FE FF
+
+. 0 8060900 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8060907 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 EA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 CF 7B FE FF
+
+. 0 8060932 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060939 13
+. 83 EC 0C 68 C3 95 06 08 E8 CA 7A FE FF
+
+fsubr_10 ... ok
+. 0 8060946 5
+. 83 C4 10 EB 48
+
+. 0 8060993 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063623 5
+. E8 73 D3 FF FF
+
+. 0 806099B 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 0E 7A FE FF
+
+. 0 80609E2 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 80609E9 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 EA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 ED 7A FE FF
+
+. 0 8060A14 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060A1B 13
+. 83 EC 0C 68 FE 95 06 08 E8 E8 79 FE FF
+
+fsubr_11 ... ok
+. 0 8060A28 5
+. 83 C4 10 EB 48
+
+. 0 8060A75 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063628 5
+. E8 50 D4 FF FF
+
+. 0 8060A7D 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 2C 79 FE FF
+
+. 0 8060AC4 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8060ACB 43
+. 9B DD B5 58 FF FF FF D9 45 E0 D9 EE D9 45 D8 D8 EA D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 0B 7A FE FF
+
+. 0 8060AF6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060AFD 13
+. 83 EC 0C 68 39 96 06 08 E8 06 79 FE FF
+
+fsubr_12 ... ok
+. 0 8060B0A 5
+. 83 C4 10 EB 48
+
+. 0 8060B57 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806362D 5
+. E8 2D D5 FF FF
+
+. 0 8060B5F 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 3A 78 FE FF
+
+. 0 8060BB6 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8060BBD 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 EA DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 94 79 FE FF
+
+. 0 8060BEE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060BF5 13
+. 83 EC 0C 68 74 96 06 08 E8 0E 78 FE FF
+
+fsubr_13 ... ok
+. 0 8060C02 5
+. 83 C4 10 EB 44
+
+. 0 8060C4B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063632 5
+. E8 1C D6 FF FF
+
+. 0 8060C53 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 46 77 FE FF
+
+. 0 8060CAA 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8060CB1 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 EA DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 A0 78 FE FF
+
+. 0 8060CE2 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060CE9 13
+. 83 EC 0C 68 AF 96 06 08 E8 1A 77 FE FF
+
+fsubr_14 ... ok
+. 0 8060CF6 5
+. 83 C4 10 EB 44
+
+. 0 8060D3F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063637 5
+. E8 0B D7 FF FF
+
+. 0 8060D47 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 52 76 FE FF
+
+. 0 8060D9E 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8060DA5 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 EA DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 AC 77 FE FF
+
+. 0 8060DD6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060DDD 13
+. 83 EC 0C 68 EA 96 06 08 E8 26 76 FE FF
+
+fsubr_15 ... ok
+. 0 8060DEA 5
+. 83 C4 10 EB 44
+
+. 0 8060E33 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806363C 5
+. E8 FA D7 FF FF
+
+. 0 8060E3B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 5E 75 FE FF
+
+. 0 8060E92 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8060E99 49
+. 9B DD B5 58 FF FF FF DD 45 E0 D9 EE DD 45 D8 D8 EA DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 B8 76 FE FF
+
+. 0 8060ECA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060ED1 13
+. 83 EC 0C 68 25 97 06 08 E8 32 75 FE FF
+
+fsubr_16 ... ok
+. 0 8060EDE 5
+. 83 C4 10 EB 44
+
+. 0 8060F27 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063641 5
+. E8 E9 D8 FF FF
+
+. 0 8060F2F 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 7A 74 FE FF
+
+. 0 8060F76 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8060F7D 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE EA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 57 75 FE FF
+
+. 0 8060FAA 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8060FB1 13
+. 83 EC 0C 68 60 97 06 08 E8 52 74 FE FF
+
+fsubrp_1 ... ok
+. 0 8060FBE 5
+. 83 C4 10 EB 48
+
+. 0 806100B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063646 5
+. E8 C8 D9 FF FF
+
+. 0 8061013 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 96 73 FE FF
+
+. 0 806105A 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8061061 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE EA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 73 74 FE FF
+
+. 0 806108E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061095 13
+. 83 EC 0C 68 9B 97 06 08 E8 6E 73 FE FF
+
+fsubrp_2 ... ok
+. 0 80610A2 5
+. 83 C4 10 EB 48
+
+. 0 80610EF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806364B 5
+. E8 A7 DA FF FF
+
+. 0 80610F7 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 B2 72 FE FF
+
+. 0 806113E 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8061145 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE EA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 8F 73 FE FF
+
+. 0 8061172 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061179 13
+. 83 EC 0C 68 D6 97 06 08 E8 8A 72 FE FF
+
+fsubrp_3 ... ok
+. 0 8061186 5
+. 83 C4 10 EB 48
+
+. 0 80611D3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063650 5
+. E8 86 DB FF FF
+
+. 0 80611DB 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 CE 71 FE FF
+
+. 0 8061222 7
+. 83 C4 10 85 C0 75 7E
+
+. 0 8061229 45
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 EE D9 45 E0 DE EA D9 F7 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 AB 72 FE FF
+
+. 0 8061256 7
+. 83 C4 10 85 C0 74 12
+
+. 0 806125D 13
+. 83 EC 0C 68 11 98 06 08 E8 A6 71 FE FF
+
+fsubrp_4 ... ok
+. 0 806126A 5
+. 83 C4 10 EB 48
+
+. 0 80612B7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063655 5
+. E8 65 DC FF FF
+
+. 0 80612BF 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 DA 70 FE FF
+
+. 0 8061316 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8061321 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE EA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 2E 72 FE FF
+
+. 0 8061354 7
+. 83 C4 10 85 C0 74 12
+
+. 0 806135B 13
+. 83 EC 0C 68 4C 98 06 08 E8 A8 70 FE FF
+
+fsubrp_5 ... ok
+. 0 8061368 5
+. 83 C4 10 EB 44
+
+. 0 80613B1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806365A 5
+. E8 5A DD FF FF
+
+. 0 80613B9 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 E0 6F FE FF
+
+. 0 8061410 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 806141B 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE EA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 34 71 FE FF
+
+. 0 806144E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061455 13
+. 83 EC 0C 68 87 98 06 08 E8 AE 6F FE FF
+
+fsubrp_6 ... ok
+. 0 8061462 5
+. 83 C4 10 EB 44
+
+. 0 80614AB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806365F 5
+. E8 4F DE FF FF
+
+. 0 80614B3 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 E6 6E FE FF
+
+. 0 806150A 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 8061515 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE EA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 3A 70 FE FF
+
+. 0 8061548 7
+. 83 C4 10 85 C0 74 12
+
+. 0 806154F 13
+. 83 EC 0C 68 C2 98 06 08 E8 B4 6E FE FF
+
+fsubrp_7 ... ok
+. 0 806155C 5
+. 83 C4 10 EB 44
+
+. 0 80615A5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063664 5
+. E8 44 DF FF FF
+
+. 0 80615AD 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 EC 6D FE FF
+
+. 0 8061604 11
+. 83 C4 10 85 C0 0F 85 80 00 00 00
+
+. 0 806160F 51
+. 9B DD B5 58 FF FF FF DD 45 D8 D9 EE DD 45 E0 DE EA D9 F7 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 40 6F FE FF
+
+. 0 8061642 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061649 13
+. 83 EC 0C 68 FD 98 06 08 E8 BA 6D FE FF
+
+fsubrp_8 ... ok
+. 0 8061656 5
+. 83 C4 10 EB 44
+
+. 0 806169F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063669 5
+. E8 39 E0 FF FF
+
+. 0 80616A7 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 02 6D FE FF
+
+. 0 80616EE 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 80616F5 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE E9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB 45 50 FF 75 D0 E8 E3 6D FE FF
+
+. 0 806171E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061725 13
+. 83 EC 0C 68 38 99 06 08 E8 DE 6C FE FF
+
+fsubrp_9 ... ok
+. 0 8061732 5
+. 83 C4 10 EB 48
+
+. 0 806177F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806366E 5
+. E8 14 E1 FF FF
+
+. 0 8061787 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 46 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 22 6C FE FF
+
+. 0 80617CE 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 80617D5 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE E9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C 46 50 FF 75 D0 E8 03 6D FE FF
+
+. 0 80617FE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061805 13
+. 83 EC 0C 68 73 99 06 08 E8 FE 6B FE FF
+
+fsubrp_10 ... ok
+. 0 8061812 5
+. 83 C4 10 EB 48
+
+. 0 806185F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063673 5
+. E8 EF E1 FF FF
+
+. 0 8061867 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 42 6B FE FF
+
+. 0 80618AE 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 80618B5 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE E9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 00 40 1C C6 50 FF 75 D0 E8 23 6C FE FF
+
+. 0 80618DE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80618E5 13
+. 83 EC 0C 68 B1 99 06 08 E8 1E 6B FE FF
+
+fsubrp_11 ... ok
+. 0 80618F2 5
+. 83 C4 10 EB 48
+
+. 0 806193F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063678 5
+. E8 CA E2 FF FF
+
+. 0 8061947 71
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 BA F5 08 C6 89 45 D8 83 EC 08 6A 01 68 40 A1 06 08 E8 62 6A FE FF
+
+. 0 806198E 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8061995 41
+. 9B DD B5 58 FF FF FF D9 45 D8 D9 45 E0 DE E9 D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA 56 EB C5 50 FF 75 D0 E8 43 6B FE FF
+
+. 0 80619BE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80619C5 13
+. 83 EC 0C 68 EF 99 06 08 E8 3E 6A FE FF
+
+fsubrp_12 ... ok
+. 0 80619D2 5
+. 83 C4 10 EB 48
+
+. 0 8061A1F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806367D 5
+. E8 A5 E3 FF FF
+
+. 0 8061A27 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 72 69 FE FF
+
+. 0 8061A7E 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8061A85 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE E9 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 41 52 50 FF 75 D4 FF 75 D0 E8 CE 6A FE FF
+
+. 0 8061AB4 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061ABB 13
+. 83 EC 0C 68 2D 9A 06 08 E8 48 69 FE FF
+
+fsubrp_13 ... ok
+. 0 8061AC8 5
+. 83 C4 10 EB 44
+
+. 0 8061B11 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063682 5
+. E8 92 E4 FF FF
+
+. 0 8061B19 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D 41 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 80 68 FE FF
+
+. 0 8061B70 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8061B77 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE E9 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 41 52 50 FF 75 D4 FF 75 D0 E8 DC 69 FE FF
+
+. 0 8061BA6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061BAD 13
+. 83 EC 0C 68 6B 9A 06 08 E8 56 68 FE FF
+
+fsubrp_14 ... ok
+. 0 8061BBA 5
+. 83 C4 10 EB 44
+
+. 0 8061C03 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063687 5
+. E8 7F E5 FF FF
+
+. 0 8061C0B 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 8E 67 FE FF
+
+. 0 8061C62 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8061C69 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE E9 DD 5D D0 DD A5 58 FF FF FF B8 ED C6 71 1C BA 47 F4 60 C1 52 50 FF 75 D4 FF 75 D0 E8 EA 68 FE FF
+
+. 0 8061C98 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061C9F 13
+. 83 EC 0C 68 A9 9A 06 08 E8 64 67 FE FF
+
+fsubrp_15 ... ok
+. 0 8061CAC 5
+. 83 C4 10 EB 44
+
+. 0 8061CF5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806368C 5
+. E8 6C E6 FF FF
+
+. 0 8061CFD 87
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 B8 EE B6 E6 47 BA EC 32 5D C1 89 45 D8 89 55 DC 83 EC 08 6A 01 68 40 A1 06 08 E8 9C 66 FE FF
+
+. 0 8061D54 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 8061D5B 47
+. 9B DD B5 58 FF FF FF DD 45 D8 DD 45 E0 DE E9 DD 5D D0 DD A5 58 FF FF FF B8 03 E0 E9 56 BA 4A 7D 58 C1 52 50 FF 75 D4 FF 75 D0 E8 F8 67 FE FF
+
+. 0 8061D8A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061D91 13
+. 83 EC 0C 68 E7 9A 06 08 E8 72 66 FE FF
+
+fsubrp_16 ... ok
+. 0 8061D9E 5
+. 83 C4 10 EB 44
+
+. 0 8061DE7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063691 5
+. E8 59 E7 FF FF
+
+. 0 8061DEF 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 C4 65 FE FF
+
+. 0 8061E2C 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8061E33 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 6D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA E6 40 45 50 FF 75 D0 E8 A7 66 FE FF
+
+. 0 8061E5A 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061E61 13
+. 83 EC 0C 68 25 9B 06 08 E8 A2 65 FE FF
+
+fisubrs_1 ... ok
+. 0 8061E6E 5
+. 83 C4 10 EB 48
+
+. 0 8061EBB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8063696 5
+. E8 28 E8 FF FF
+
+. 0 8061EC3 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 F0 64 FE FF
+
+. 0 8061F00 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8061F07 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 6D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 8B 9C AD 45 50 FF 75 D0 E8 D3 65 FE FF
+
+. 0 8061F2E 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8061F35 13
+. 83 EC 0C 68 63 9B 06 08 E8 CE 64 FE FF
+
+fisubrs_2 ... ok
+. 0 8061F42 5
+. 83 C4 10 EB 48
+
+. 0 8061F8F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 806369B 5
+. E8 F7 E8 FF FF
+
+. 0 8061F97 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 1C 64 FE FF
+
+. 0 8061FD4 7
+. 83 C4 10 85 C0 75 78
+
+. 0 8061FDB 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 6D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 8B 9C AD C5 50 FF 75 D0 E8 FF 64 FE FF
+
+. 0 8062002 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8062009 13
+. 83 EC 0C 68 A1 9B 06 08 E8 FA 63 FE FF
+
+fisubrs_3 ... ok
+. 0 8062016 5
+. 83 C4 10 EB 48
+
+. 0 8062063 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636A0 5
+. E8 C6 E9 FF FF
+
+. 0 806206B 61
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A C4 89 45 E0 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 48 63 FE FF
+
+. 0 80620A8 7
+. 83 C4 10 85 C0 75 78
+
+. 0 80620AF 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DE 6D DE D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 EA E6 40 C5 50 FF 75 D0 E8 2B 64 FE FF
+
+. 0 80620D6 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80620DD 13
+. 83 EC 0C 68 DF 9B 06 08 E8 26 63 FE FF
+
+fisubrs_4 ... ok
+. 0 80620EA 5
+. 83 C4 10 EB 48
+
+. 0 8062137 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636A5 5
+. E8 95 EA FF FF
+
+. 0 806213F 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 6C 62 FE FF
+
+. 0 8062184 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 806218B 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 6D DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA A6 C5 32 C1 52 50 FF 75 D4 FF 75 D0 E8 CA 63 FE FF
+
+. 0 80621B8 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80621BF 13
+. 83 EC 0C 68 1D 9C 06 08 E8 44 62 FE FF
+
+fisubrs_5 ... ok
+. 0 80621CC 5
+. 83 C4 10 EB 44
+
+. 0 8062215 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636AA 5
+. E8 6E EB FF FF
+
+. 0 806221D 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE E1 10 83 EC 08 6A 01 68 40 A1 06 08 E8 8E 61 FE FF
+
+. 0 8062262 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8062269 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 6D DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 68 E7 32 41 52 50 FF 75 D4 FF 75 D0 E8 EC 62 FE FF
+
+. 0 8062296 7
+. 83 C4 10 85 C0 74 12
+
+. 0 806229D 13
+. 83 EC 0C 68 5B 9C 06 08 E8 66 61 FE FF
+
+fisubrs_6 ... ok
+. 0 80622AA 5
+. 83 C4 10 EB 44
+
+. 0 80622F3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636AF 5
+. E8 47 EC FF FF
+
+. 0 80622FB 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 41 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 B0 60 FE FF
+
+. 0 8062340 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8062347 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 6D DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA 68 E7 32 C1 52 50 FF 75 D4 FF 75 D0 E8 0E 62 FE FF
+
+. 0 8062374 7
+. 83 C4 10 85 C0 74 12
+
+. 0 806237B 13
+. 83 EC 0C 68 99 9C 06 08 E8 88 60 FE FF
+
+fisubrs_7 ... ok
+. 0 8062388 5
+. 83 C4 10 EB 44
+
+. 0 80623D1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636B4 5
+. E8 20 ED FF FF
+
+. 0 80623D9 69
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 AD 5B F3 C3 BA 87 D6 32 C1 89 45 E0 89 55 E4 66 C7 45 DE 00 00 66 C7 45 DE 1F EF 83 EC 08 6A 01 68 40 A1 06 08 E8 D2 5F FE FF
+
+. 0 806241E 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 8062425 45
+. 9B DD B5 58 FF FF FF DD 45 E0 DE 6D DE DD 5D D0 DD A5 58 FF FF FF B8 AD 5B F3 C3 BA A6 C5 32 41 52 50 FF 75 D4 FF 75 D0 E8 30 61 FE FF
+
+. 0 8062452 7
+. 83 C4 10 85 C0 74 12
+
+. 0 8062459 13
+. 83 EC 0C 68 D7 9C 06 08 E8 AA 5F FE FF
+
+fisubrs_8 ... ok
+. 0 8062466 5
+. 83 C4 10 EB 44
+
+. 0 80624AF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636B9 5
+. E8 F9 ED FF FF
+
+. 0 80624B7 63
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 B8 2B 52 9A 44 89 45 E0 C7 45 DC 00 00 00 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 40 A1 06 08 E8 FA 5E FE FF
+
+. 0 80624F6 7
+. 83 C4 10 85 C0 75 78
+
+. 0 80624FD 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 6D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 90 30 A7 4C 50 FF 75 D0 E8 DD 5F FE FF
+
+. 0 8062524 7
+. 83 C4 10 85 C0 74 12
+
+. 0 806252B 13
+. 83 EC 0C 68 15 9D 06 08 E8 D8 5E FE FF
+
+fisubrl_1 ... ok
+. 0 8062538 5
+. 83 C4 10 EB 48
+
+. 0 8062585 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636BE 5
+. E8 CA EE FF FF
+
+. 0 806258D 63
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+
+. 0 80625CC 7
+. 83 C4 10 85 C0 75 78
+
+. 0 80625D3 39
+. 9B DD B5 58 FF FF FF D9 45 E0 DA 6D DC D9 5D D0 DD A5 58 FF FF FF 83 EC 08 B8 5C 2F A7 4C 50 FF 75 D0 E8 07 5F FE FF
+
+. 0 80625FA 7
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+
+. 0 8062601 13
+. 83 EC 0C 68 53 9D 06 08 E8 02 5E FE FF
+
+fisubrl_2 ... ok
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+. 83 C4 10 EB 48
+
+. 0 806265B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636C3 5
+. E8 9B EF FF FF
+
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+
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+
+. 0 80626A9 39
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+
+. 0 80626D0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 80626D7 13
+. 83 EC 0C 68 91 9D 06 08 E8 2C 5D FE FF
+
+fisubrl_3 ... ok
+. 0 80626E4 5
+. 83 C4 10 EB 48
+
+. 0 8062731 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636C8 5
+. E8 6C F0 FF FF
+
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+
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+
+. 0 806277F 39
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+
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+
+. 0 80627AD 13
+. 83 EC 0C 68 CF 9D 06 08 E8 56 5C FE FF
+
+fisubrl_4 ... ok
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+. 83 C4 10 EB 48
+
+. 0 8062807 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636CD 5
+. E8 3D F1 FF FF
+
+. 0 806280F 71
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+
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+
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+
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+
+. 0 8062891 13
+. 83 EC 0C 68 0D 9E 06 08 E8 72 5B FE FF
+
+fisubrl_5 ... ok
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+. 83 C4 10 EB 44
+
+. 0 80628E7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636D2 5
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+
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+
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+
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+
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+
+. 0 8062971 13
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+
+fisubrl_6 ... ok
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+. 83 C4 10 EB 44
+
+. 0 80629C7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636D7 5
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+
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+
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+
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+
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+
+. 0 8062A51 13
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+
+fisubrl_7 ... ok
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+
+. 0 8062AA7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80636DC 5
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+
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+
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+
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+
+. 0 8062B31 13
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+
+fisubrl_8 ... ok
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+
+. 0 8062B87 8
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+
+. 0 80636E1 5
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+. 0 8062B8F 71
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+
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+
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+
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+
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+. 0 8062C29 7
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+
+. 0 8062C30 13
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+
+fxch_1 ... ok
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+
+. 0 8062CB0 8
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+
+. 0 80636E6 5
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+
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+
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+
+. 0 8062D50 7
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+
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+
+. 0 8062D6E 7
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+
+. 0 8062D75 13
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+
+fxch_2 ... ok
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+
+. 0 8062DED 8
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+
+. 0 80636EB 10
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+
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+==2983==
+sewardj@phoenix:~/VgSVN/valgrind/trunk$ ./vsvn --tool=none --vex-guest-chase-thresh=0 ./none/testss/x86/insn_fpu[K[K[Kmmx
+==2988== Nulgrind, a binary JIT-compiler.
+==2988== Copyright (C) 2002-2004, and GNU GPL'd, by Nicholas Nethercote.
+==2988== Using valgrind-2.3.0.CVS, a dynamic binary instrumentation framework.
+==2988== Copyright (C) 2000-2004, and GNU GPL'd, by Julian Seward et al.
+==2988== For more details, rerun with: -v
+==2988==
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+
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+
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+
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+
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+
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+
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+
+. 0 3AA1EC84 21
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+
+. 0 3AA1E198 7
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+
+. 0 3AA1DE90 22
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+
+. 0 3AA1DEA6 18
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+
+. 0 3AA1DF26 10
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+
+. 0 3AA1DEC6 31
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+
+. 0 3AA1E430 15
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+
+. 0 3AA1E43F 9
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+
+. 0 3AA1E448 33
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+
+. 0 3AA6CE20 5
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+
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+
+. 0 3AA6CE34 20
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+
+movd_1 ... ok
+. 0 3AA6CE48 8
+. 5B 3D 01 F0 FF FF 73 2D
+
+. 0 3AA6CE50 1
+. C3
+
+. 0 3AA1E469 4
+. 85 C0 78 34
+
+. 0 3AA1E46D 9
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+
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+
+. 0 3AA1E4D1 10
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+
+. 0 3AA1DEE5 11
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+
+. 0 3AA1DEF4 29
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+
+. 0 3AA1DFB0 12
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+
+. 0 3AA1DF14 18
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+
+. 0 3AA1E19F 9
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+
+. 0 3AA1EC99 8
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+
+. 0 3AA20073 15
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+
+. 0 3AA1E14E 8
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+
+. 0 3AA1E0C4 21
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+
+. 0 3A9FB9DC 19
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+
+. 0 3A9FB9EF 21
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+
+. 0 3A9FBB30 16
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+
+. 0 3A9FBB5A 8
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+
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+
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+
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+
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+
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+
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+
+. 0 8048784 13
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+
+. 0 3A9FB8BB 8
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+
+. 0 3AA1E052 10
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+
+. 0 3AA1E05C 10
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+
+. 0 3AA1E06D 6
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+
+. 0 3AA1E073 17
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+
+. 0 3AA1E02A 5
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+
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+
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+
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+
+. 0 3AA1E040 10
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+
+. 0 3AA1E04A 8
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+
+. 0 3AA1E0B0 20
+. 8B 55 10 29 F2 89 55 F0 8B 45 F0 8B 55 EC 01 D0 85 C0 75 1C
+
+movd_2 ... ok
+. 0 8048791 5
+. 83 C4 10 EB 4F
+
+. 0 80487E5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050978 5
+. E8 70 7E FF FF
+
+. 0 80487ED 69
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+
+. 0 8048832 7
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+
+. 0 8048839 35
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+
+. 0 804885C 13
+. 83 EC 0C 68 62 0D 05 08 E8 A7 FB FF FF
+
+movd_3 ... ok
+. 0 8048869 5
+. 83 C4 10 EB 3A
+
+. 0 80488A8 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805097D 5
+. E8 2E 7F FF FF
+
+. 0 80488B0 75
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+
+. 0 80488FB 7
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+
+. 0 8048902 30
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+
+. 0 8048920 13
+. 83 EC 0C 68 97 0D 05 08 E8 E3 FA FF FF
+
+movd_4 ... ok
+. 0 804892D 5
+. 83 C4 10 EB 3A
+
+. 0 804896C 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050982 5
+. E8 ED 7F FF FF
+
+. 0 8048974 83
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+
+. 0 80489C7 7
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+
+. 0 80489CE 51
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+
+. 0 8048A01 13
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+
+movq_1 ... ok
+. 0 8048A0E 5
+. 83 C4 10 EB 42
+
+. 0 8048A55 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050987 5
+. E8 D1 80 FF FF
+
+. 0 8048A5D 83
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+
+. 0 8048AB0 7
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+
+. 0 8048AB7 48
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 6F 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 8B 45 D4 35 56 34 12 00 8B 55 D0 81 F2 EF CD AB 78 09 D0 85 C0 75 12
+
+. 0 8048AE7 13
+. 83 EC 0C 68 2B 0E 05 08 E8 1C F9 FF FF
+
+movq_2 ... ok
+. 0 8048AF4 5
+. 83 C4 10 EB 42
+
+. 0 8048B3B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805098C 5
+. E8 B2 81 FF FF
+
+. 0 8048B43 95
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+
+. 0 8048BA2 7
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+
+. 0 8048BA9 44
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 7F 45 D0 DD A5 58 FF FF FF 8B 45 D4 35 56 34 12 00 8B 55 D0 81 F2 EF CD AB 78 09 D0 85 C0 75 12
+
+. 0 8048BD5 13
+. 83 EC 0C 68 60 0E 05 08 E8 2E F8 FF FF
+
+movq_3 ... ok
+. 0 8048BE2 5
+. 83 C4 10 EB 42
+
+. 0 8048C29 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050991 5
+. E8 9B 82 FF FF
+
+. 0 8048C31 83
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+
+. 0 8048C84 11
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+
+. 0 8048C8F 36
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+
+. 0 8048CB3 8
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+
+. 0 8048CBB 8
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+
+. 0 8048CC3 8
+. 66 81 7D D6 FF 7F 75 15
+
+. 0 8048CCB 13
+. 83 EC 0C 68 95 0E 05 08 E8 38 F7 FF FF
+
+packssdw_1 ... ok
+. 0 8048CD8 8
+. 83 C4 10 E9 8A 00 00 00
+
+. 0 8048D6A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050996 5
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+
+. 0 8048D72 83
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+
+. 0 8048DC5 11
+. 83 C4 10 85 C0 0F 85 C8 00 00 00
+
+. 0 8048DD0 33
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 6B 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 C7 CF 75 2D
+
+. 0 8048DF1 8
+. 66 81 7D D2 00 80 75 25
+
+. 0 8048DF9 8
+. 66 81 7D D4 39 30 75 1D
+
+. 0 8048E01 8
+. 66 81 7D D6 FF 7F 75 15
+
+. 0 8048E09 13
+. 83 EC 0C 68 67 0F 05 08 E8 FA F5 FF FF
+
+packssdw_2 ... ok
+. 0 8048E16 8
+. 83 C4 10 E9 8A 00 00 00
+
+. 0 8048EA8 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805099B 5
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+
+. 0 8048EB0 103
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+
+. 0 8048F17 11
+. 83 C4 10 85 C0 0F 85 2B 01 00 00
+
+. 0 8048F22 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F 63 C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 15 75 3F
+
+. 0 8048F44 6
+. 80 7D D1 EB 75 39
+
+. 0 8048F4A 6
+. 80 7D D2 7F 75 33
+
+. 0 8048F50 6
+. 80 7D D3 80 75 2D
+
+. 0 8048F56 6
+. 80 7D D4 7B 75 27
+
+. 0 8048F5C 6
+. 80 7D D5 85 75 21
+
+. 0 8048F62 6
+. 80 7D D6 7F 75 1B
+
+. 0 8048F68 6
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+
+. 0 8048F6E 13
+. 83 EC 0C 68 A8 0F 05 08 E8 95 F4 FF FF
+
+packsswb_1 ... ok
+. 0 8048F7B 8
+. 83 C4 10 E9 DA 00 00 00
+
+. 0 804905D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509A0 5
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+
+. 0 8049065 103
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+
+. 0 80490CC 11
+. 83 C4 10 85 C0 0F 85 28 01 00 00
+
+. 0 80490D7 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 63 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 15 75 3F
+
+. 0 80490F6 6
+. 80 7D D1 EB 75 39
+
+. 0 80490FC 6
+. 80 7D D2 7F 75 33
+
+. 0 8049102 6
+. 80 7D D3 80 75 2D
+
+. 0 8049108 6
+. 80 7D D4 7B 75 27
+
+. 0 804910E 6
+. 80 7D D5 85 75 21
+
+. 0 8049114 6
+. 80 7D D6 7F 75 1B
+
+. 0 804911A 6
+. 80 7D D7 80 75 15
+
+. 0 8049120 13
+. 83 EC 0C 68 0B 11 05 08 E8 E3 F2 FF FF
+
+packsswb_2 ... ok
+. 0 804912D 8
+. 83 C4 10 E9 DA 00 00 00
+
+. 0 804920F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509A5 5
+. E8 6D 88 FF FF
+
+. 0 8049217 103
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+
+. 0 804927E 11
+. 83 C4 10 85 C0 0F 85 51 01 00 00
+
+. 0 8049289 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F 67 C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 15 75 3F
+
+. 0 80492AB 6
+. 80 7D D1 00 75 39
+
+. 0 80492B1 6
+. 80 7D D2 FF 75 33
+
+. 0 80492B7 6
+. 80 7D D3 00 75 2D
+
+. 0 80492BD 6
+. 80 7D D4 7B 75 27
+
+. 0 80492C3 6
+. 80 7D D5 00 75 21
+
+. 0 80492C9 6
+. 80 7D D6 FF 75 1B
+
+. 0 80492CF 6
+. 80 7D D7 00 75 15
+
+. 0 80492D5 13
+. 83 EC 0C 68 4C 11 05 08 E8 2E F1 FF FF
+
+packuswb_1 ... ok
+. 0 80492E2 8
+. 83 C4 10 E9 00 01 00 00
+
+. 0 80493EA 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509AA 5
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+
+. 0 80493F2 103
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+
+. 0 8049459 11
+. 83 C4 10 85 C0 0F 85 4E 01 00 00
+
+. 0 8049464 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 67 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 15 75 3F
+
+. 0 8049483 6
+. 80 7D D1 00 75 39
+
+. 0 8049489 6
+. 80 7D D2 FF 75 33
+
+. 0 804948F 6
+. 80 7D D3 00 75 2D
+
+. 0 8049495 6
+. 80 7D D4 7B 75 27
+
+. 0 804949B 6
+. 80 7D D5 00 75 21
+
+. 0 80494A1 6
+. 80 7D D6 FF 75 1B
+
+. 0 80494A7 6
+. 80 7D D7 00 75 15
+
+. 0 80494AD 13
+. 83 EC 0C 68 AF 12 05 08 E8 56 EF FF FF
+
+packuswb_2 ... ok
+. 0 80494BA 8
+. 83 C4 10 E9 00 01 00 00
+
+. 0 80495C2 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509AF 5
+. E8 16 8C FF FF
+
+. 0 80495CA 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 0C C6 45 E1 22 C6 45 E2 38 C6 45 E3 4E C6 45 E4 15 C6 45 E5 2B C6 45 E6 41 C6 45 E7 57 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 08 C6 45 D9 07 C6 45 DA 06 C6 45 DB 05 C6 45 DC 04 C6 45 DD 03 C6 45 DE 02 C6 45 DF 01 83 EC 08 6A 01 68 E0 39 05 08 E8 AF ED FF FF
+
+. 0 8049641 11
+. 83 C4 10 85 C0 0F 85 2B 01 00 00
+
+. 0 804964C 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F FC C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 14 75 3F
+
+. 0 804966E 6
+. 80 7D D1 29 75 39
+
+. 0 8049674 6
+. 80 7D D2 3E 75 33
+
+. 0 804967A 6
+. 80 7D D3 53 75 2D
+
+. 0 8049680 6
+. 80 7D D4 19 75 27
+
+. 0 8049686 6
+. 80 7D D5 2E 75 21
+
+. 0 804968C 6
+. 80 7D D6 43 75 1B
+
+. 0 8049692 6
+. 80 7D D7 58 75 15
+
+. 0 8049698 13
+. 83 EC 0C 68 F0 12 05 08 E8 6B ED FF FF
+
+paddb_1 ... ok
+. 0 80496A5 8
+. 83 C4 10 E9 DA 00 00 00
+
+. 0 8049787 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509B4 5
+. E8 D6 8D FF FF
+
+. 0 804978F 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 0C C6 45 E1 22 C6 45 E2 38 C6 45 E3 4E C6 45 E4 15 C6 45 E5 2B C6 45 E6 41 C6 45 E7 57 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 08 C6 45 D9 07 C6 45 DA 06 C6 45 DB 05 C6 45 DC 04 C6 45 DD 03 C6 45 DE 02 C6 45 DF 01 83 EC 08 6A 01 68 E0 39 05 08 E8 EA EB FF FF
+
+. 0 8049806 11
+. 83 C4 10 85 C0 0F 85 28 01 00 00
+
+. 0 8049811 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F FC 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 14 75 3F
+
+. 0 8049830 6
+. 80 7D D1 29 75 39
+
+. 0 8049836 6
+. 80 7D D2 3E 75 33
+
+. 0 804983C 6
+. 80 7D D3 53 75 2D
+
+. 0 8049842 6
+. 80 7D D4 19 75 27
+
+. 0 8049848 6
+. 80 7D D5 2E 75 21
+
+. 0 804984E 6
+. 80 7D D6 43 75 1B
+
+. 0 8049854 6
+. 80 7D D7 58 75 15
+
+. 0 804985A 13
+. 83 EC 0C 68 28 13 05 08 E8 A9 EB FF FF
+
+paddb_2 ... ok
+. 0 8049867 8
+. 83 C4 10 E9 DA 00 00 00
+
+. 0 8049949 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509B9 5
+. E8 93 8F FF FF
+
+. 0 8049951 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 4E 61 BC 00 C7 45 E4 B1 7F 39 05 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 3D 22 00 00 C7 45 DC E1 10 00 00 83 EC 08 6A 01 68 E0 39 05 08 E8 4C EA FF FF
+
+. 0 80499A4 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 80499AF 37
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F FE C8 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 8B 83 BC 00 75 1B
+
+. 0 80499D4 9
+. 81 7D D4 92 90 39 05 75 12
+
+. 0 80499DD 13
+. 83 EC 0C 68 60 13 05 08 E8 26 EA FF FF
+
+paddd_1 ... ok
+. 0 80499EA 5
+. 83 C4 10 EB 52
+
+. 0 8049A41 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509BE 5
+. E8 86 90 FF FF
+
+. 0 8049A49 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 4E 61 BC 00 C7 45 E4 B1 7F 39 05 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 3D 22 00 00 C7 45 DC E1 10 00 00 83 EC 08 6A 01 68 E0 39 05 08 E8 54 E9 FF FF
+
+. 0 8049A9C 7
+. 83 C4 10 85 C0 75 7F
+
+. 0 8049AA3 34
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F FE 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 8B 83 BC 00 75 1B
+
+. 0 8049AC5 9
+. 81 7D D4 92 90 39 05 75 12
+
+. 0 8049ACE 13
+. 83 EC 0C 68 98 13 05 08 E8 35 E9 FF FF
+
+paddd_2 ... ok
+. 0 8049ADB 5
+. 83 C4 10 EB 52
+
+. 0 8049B32 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509C3 5
+. E8 72 91 FF FF
+
+. 0 8049B3A 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 19 C6 45 E1 E7 C6 45 E2 32 C6 45 E3 CE C6 45 E4 64 C6 45 E5 9C C6 45 E6 7D C6 45 E7 83 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 28 C6 45 D9 D8 C6 45 DA 1E C6 45 DB E2 C6 45 DC 14 C6 45 DD EC C6 45 DE 0A C6 45 DF F6 83 EC 08 6A 01 68 E0 39 05 08 E8 3F E8 FF FF
+
+. 0 8049BB1 11
+. 83 C4 10 85 C0 0F 85 2B 01 00 00
+
+. 0 8049BBC 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F EC C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 41 75 3F
+
+. 0 8049BDE 6
+. 80 7D D1 BF 75 39
+
+. 0 8049BE4 6
+. 80 7D D2 50 75 33
+
+. 0 8049BEA 6
+. 80 7D D3 B0 75 2D
+
+. 0 8049BF0 6
+. 80 7D D4 78 75 27
+
+. 0 8049BF6 6
+. 80 7D D5 88 75 21
+
+. 0 8049BFC 6
+. 80 7D D6 7F 75 1B
+
+. 0 8049C02 6
+. 80 7D D7 80 75 15
+
+. 0 8049C08 13
+. 83 EC 0C 68 D0 13 05 08 E8 FB E7 FF FF
+
+paddsb_1 ... ok
+. 0 8049C15 8
+. 83 C4 10 E9 DA 00 00 00
+
+. 0 8049CF7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509C8 5
+. E8 32 93 FF FF
+
+. 0 8049CFF 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 19 C6 45 E1 E7 C6 45 E2 32 C6 45 E3 CE C6 45 E4 64 C6 45 E5 9C C6 45 E6 7D C6 45 E7 83 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 28 C6 45 D9 D8 C6 45 DA 1E C6 45 DB E2 C6 45 DC 14 C6 45 DD EC C6 45 DE 0A C6 45 DF F6 83 EC 08 6A 01 68 E0 39 05 08 E8 7A E6 FF FF
+
+. 0 8049D76 11
+. 83 C4 10 85 C0 0F 85 28 01 00 00
+
+. 0 8049D81 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F EC 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 41 75 3F
+
+. 0 8049DA0 6
+. 80 7D D1 BF 75 39
+
+. 0 8049DA6 6
+. 80 7D D2 50 75 33
+
+. 0 8049DAC 6
+. 80 7D D3 B0 75 2D
+
+. 0 8049DB2 6
+. 80 7D D4 78 75 27
+
+. 0 8049DB8 6
+. 80 7D D5 88 75 21
+
+. 0 8049DBE 6
+. 80 7D D6 7F 75 1B
+
+. 0 8049DC4 6
+. 80 7D D7 80 75 15
+
+. 0 8049DCA 13
+. 83 EC 0C 68 0B 14 05 08 E8 39 E6 FF FF
+
+paddsb_2 ... ok
+. 0 8049DD7 8
+. 83 C4 10 E9 DA 00 00 00
+
+. 0 8049EB9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509CD 5
+. E8 EF 94 FF FF
+
+. 0 8049EC1 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 39 30 66 C7 45 E2 C7 CF 66 C7 45 E4 91 7D 66 C7 45 E6 6F 82 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 91 7D 66 C7 45 DA 6F 82 66 C7 45 DC C7 CF 66 C7 45 DE 39 30 83 EC 08 6A 01 68 E0 39 05 08 E8 C8 E4 FF FF
+
+. 0 8049F28 11
+. 83 C4 10 85 C0 0F 85 CB 00 00 00
+
+. 0 8049F33 36
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F ED C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 FF 7F 75 2D
+
+. 0 8049F57 8
+. 66 81 7D D2 00 80 75 25
+
+. 0 8049F5F 8
+. 66 81 7D D4 58 4D 75 1D
+
+. 0 8049F67 8
+. 66 81 7D D6 A8 B2 75 15
+
+. 0 8049F6F 13
+. 83 EC 0C 68 46 14 05 08 E8 94 E4 FF FF
+
+paddsw_1 ... ok
+. 0 8049F7C 8
+. 83 C4 10 E9 8A 00 00 00
+
+. 0 804A00E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509D2 5
+. E8 3F 96 FF FF
+
+. 0 804A016 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 39 30 66 C7 45 E2 C7 CF 66 C7 45 E4 91 7D 66 C7 45 E6 6F 82 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 91 7D 66 C7 45 DA 6F 82 66 C7 45 DC C7 CF 66 C7 45 DE 39 30 83 EC 08 6A 01 68 E0 39 05 08 E8 73 E3 FF FF
+
+. 0 804A07D 11
+. 83 C4 10 85 C0 0F 85 C8 00 00 00
+
+. 0 804A088 33
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F ED 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 FF 7F 75 2D
+
+. 0 804A0A9 8
+. 66 81 7D D2 00 80 75 25
+
+. 0 804A0B1 8
+. 66 81 7D D4 58 4D 75 1D
+
+. 0 804A0B9 8
+. 66 81 7D D6 A8 B2 75 15
+
+. 0 804A0C1 13
+. 83 EC 0C 68 81 14 05 08 E8 42 E3 FF FF
+
+paddsw_2 ... ok
+. 0 804A0CE 8
+. 83 C4 10 E9 8A 00 00 00
+
+. 0 804A160 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509D7 5
+. E8 8C 97 FF FF
+
+. 0 804A168 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 19 C6 45 E1 32 C6 45 E2 4B C6 45 E3 64 C6 45 E4 7D C6 45 E5 96 C6 45 E6 AF C6 45 E7 C8 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 0A C6 45 D9 14 C6 45 DA 1E C6 45 DB 28 C6 45 DC 32 C6 45 DD 3C C6 45 DE 46 C6 45 DF 50 83 EC 08 6A 01 68 E0 39 05 08 E8 11 E2 FF FF
+
+. 0 804A1DF 11
+. 83 C4 10 85 C0 0F 85 5A 01 00 00
+
+. 0 804A1EA 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F DC C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 23 75 3F
+
+. 0 804A20C 6
+. 80 7D D1 46 75 39
+
+. 0 804A212 6
+. 80 7D D2 69 75 33
+
+. 0 804A218 6
+. 80 7D D3 8C 75 2D
+
+. 0 804A21E 6
+. 80 7D D4 AF 75 27
+
+. 0 804A224 6
+. 80 7D D5 D2 75 21
+
+. 0 804A22A 6
+. 80 7D D6 F5 75 1B
+
+. 0 804A230 6
+. 80 7D D7 FF 75 15
+
+. 0 804A236 13
+. 83 EC 0C 68 BC 14 05 08 E8 CD E1 FF FF
+
+paddusb_1 ... ok
+. 0 804A243 8
+. 83 C4 10 E9 09 01 00 00
+
+. 0 804A354 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509DC 5
+. E8 7B 99 FF FF
+
+. 0 804A35C 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 19 C6 45 E1 32 C6 45 E2 4B C6 45 E3 64 C6 45 E4 7D C6 45 E5 96 C6 45 E6 AF C6 45 E7 C8 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 0A C6 45 D9 14 C6 45 DA 1E C6 45 DB 28 C6 45 DC 32 C6 45 DD 3C C6 45 DE 46 C6 45 DF 50 83 EC 08 6A 01 68 E0 39 05 08 E8 1D E0 FF FF
+
+. 0 804A3D3 11
+. 83 C4 10 85 C0 0F 85 57 01 00 00
+
+. 0 804A3DE 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F DC 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 23 75 3F
+
+. 0 804A3FD 6
+. 80 7D D1 46 75 39
+
+. 0 804A403 6
+. 80 7D D2 69 75 33
+
+. 0 804A409 6
+. 80 7D D3 8C 75 2D
+
+. 0 804A40F 6
+. 80 7D D4 AF 75 27
+
+. 0 804A415 6
+. 80 7D D5 D2 75 21
+
+. 0 804A41B 6
+. 80 7D D6 F5 75 1B
+
+. 0 804A421 6
+. 80 7D D7 FF 75 15
+
+. 0 804A427 13
+. 83 EC 0C 68 FA 14 05 08 E8 DC DF FF FF
+
+paddusb_2 ... ok
+. 0 804A434 8
+. 83 C4 10 E9 09 01 00 00
+
+. 0 804A545 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509E1 5
+. E8 67 9B FF FF
+
+. 0 804A54D 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 CE 56 66 C7 45 E2 35 82 66 C7 45 E4 9C AD 66 C7 45 E6 03 D9 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 0A 1A 66 C7 45 DA 61 1E 66 C7 45 DC B8 22 66 C7 45 DE 0F 27 83 EC 08 6A 01 68 E0 39 05 08 E8 3C DE FF FF
+
+. 0 804A5B4 11
+. 83 C4 10 85 C0 0F 85 DC 00 00 00
+
+. 0 804A5BF 36
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F DD C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 D8 70 75 2C
+
+. 0 804A5E3 8
+. 66 81 7D D2 96 A0 75 24
+
+. 0 804A5EB 8
+. 66 81 7D D4 54 D0 75 1C
+
+. 0 804A5F3 7
+. 66 83 7D D6 FF 75 15
+
+. 0 804A5FA 13
+. 83 EC 0C 68 38 15 05 08 E8 09 DE FF FF
+
+paddusw_1 ... ok
+. 0 804A607 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 804A6AB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509E6 5
+. E8 C8 9C FF FF
+
+. 0 804A6B3 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 CE 56 66 C7 45 E2 35 82 66 C7 45 E4 9C AD 66 C7 45 E6 03 D9 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 0A 1A 66 C7 45 DA 61 1E 66 C7 45 DC B8 22 66 C7 45 DE 0F 27 83 EC 08 6A 01 68 E0 39 05 08 E8 D6 DC FF FF
+
+. 0 804A71A 11
+. 83 C4 10 85 C0 0F 85 D9 00 00 00
+
+. 0 804A725 33
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F DD 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 D8 70 75 2C
+
+. 0 804A746 8
+. 66 81 7D D2 96 A0 75 24
+
+. 0 804A74E 8
+. 66 81 7D D4 54 D0 75 1C
+
+. 0 804A756 7
+. 66 83 7D D6 FF 75 15
+
+. 0 804A75D 13
+. 83 EC 0C 68 06 16 05 08 E8 A6 DC FF FF
+
+paddusw_2 ... ok
+. 0 804A76A 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 804A80E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509EB 5
+. E8 26 9E FF FF
+
+. 0 804A816 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 D2 04 66 C7 45 E2 2E 16 66 C7 45 E4 E1 10 66 C7 45 E6 3D 22 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 57 00 66 C7 45 DA 41 00 66 C7 45 DC 2B 00 66 C7 45 DE 15 00 83 EC 08 6A 01 68 E0 39 05 08 E8 73 DB FF FF
+
+. 0 804A87D 11
+. 83 C4 10 85 C0 0F 85 CB 00 00 00
+
+. 0 804A888 36
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F FD C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 29 05 75 2D
+
+. 0 804A8AC 8
+. 66 81 7D D2 6F 16 75 25
+
+. 0 804A8B4 8
+. 66 81 7D D4 0C 11 75 1D
+
+. 0 804A8BC 8
+. 66 81 7D D6 52 22 75 15
+
+. 0 804A8C4 13
+. 83 EC 0C 68 44 16 05 08 E8 3F DB FF FF
+
+paddw_1 ... ok
+. 0 804A8D1 8
+. 83 C4 10 E9 8A 00 00 00
+
+. 0 804A963 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509F0 5
+. E8 76 9F FF FF
+
+. 0 804A96B 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 D2 04 66 C7 45 E2 2E 16 66 C7 45 E4 E1 10 66 C7 45 E6 3D 22 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 57 00 66 C7 45 DA 41 00 66 C7 45 DC 2B 00 66 C7 45 DE 15 00 83 EC 08 6A 01 68 E0 39 05 08 E8 1E DA FF FF
+
+. 0 804A9D2 11
+. 83 C4 10 85 C0 0F 85 C8 00 00 00
+
+. 0 804A9DD 33
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F FD 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 29 05 75 2D
+
+. 0 804A9FE 8
+. 66 81 7D D2 6F 16 75 25
+
+. 0 804AA06 8
+. 66 81 7D D4 0C 11 75 1D
+
+. 0 804AA0E 8
+. 66 81 7D D6 52 22 75 15
+
+. 0 804AA16 13
+. 83 EC 0C 68 7C 16 05 08 E8 ED D9 FF FF
+
+paddw_2 ... ok
+. 0 804AA23 8
+. 83 C4 10 E9 8A 00 00 00
+
+. 0 804AAB5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509F5 5
+. E8 C3 A0 FF FF
+
+. 0 804AABD 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 20 64 A8 EC C7 45 E4 31 75 B9 FD C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 EF CD AB 89 C7 45 DC 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 E0 D8 FF FF
+
+. 0 804AB10 7
+. 83 C4 10 85 C0 75 77
+
+. 0 804AB17 51
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F DB C8 0F 7F 4D D0 DD A5 58 FF FF FF 8B 45 D4 35 21 45 21 01 8B 55 D0 81 F2 20 44 A8 88 09 D0 85 C0 75 12
+
+. 0 804AB4A 13
+. 83 EC 0C 68 B4 16 05 08 E8 B9 D8 FF FF
+
+pand_1 ... ok
+. 0 804AB57 5
+. 83 C4 10 EB 42
+
+. 0 804AB9E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509FA 5
+. E8 A7 A1 FF FF
+
+. 0 804ABA6 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 20 64 A8 EC C7 45 E4 31 75 B9 FD C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 EF CD AB 89 C7 45 DC 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 F7 D7 FF FF
+
+. 0 804ABF9 7
+. 83 C4 10 85 C0 75 74
+
+. 0 804AC00 48
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F DB 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 8B 45 D4 35 21 45 21 01 8B 55 D0 81 F2 20 44 A8 88 09 D0 85 C0 75 12
+
+. 0 804AC30 13
+. 83 EC 0C 68 E9 16 05 08 E8 D3 D7 FF FF
+
+pand_2 ... ok
+. 0 804AC3D 5
+. 83 C4 10 EB 42
+
+. 0 804AC84 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80509FF 5
+. E8 88 A2 FF FF
+
+. 0 804AC8C 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 20 64 A8 EC C7 45 E4 31 75 B9 FD C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 EF CD AB 89 C7 45 DC 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 11 D7 FF FF
+
+. 0 804ACDF 7
+. 83 C4 10 85 C0 75 77
+
+. 0 804ACE6 51
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F DF C8 0F 7F 4D D0 DD A5 58 FF FF FF 8B 45 D4 35 10 30 98 FC 8B 55 D0 81 F2 00 20 00 64 09 D0 85 C0 75 12
+
+. 0 804AD19 13
+. 83 EC 0C 68 1E 17 05 08 E8 EA D6 FF FF
+
+pandn_1 ... ok
+. 0 804AD26 5
+. 83 C4 10 EB 42
+
+. 0 804AD6D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A04 5
+. E8 6C A3 FF FF
+
+. 0 804AD75 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 20 64 A8 EC C7 45 E4 31 75 B9 FD C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 EF CD AB 89 C7 45 DC 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 28 D6 FF FF
+
+. 0 804ADC8 7
+. 83 C4 10 85 C0 75 74
+
+. 0 804ADCF 48
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F DF 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 8B 45 D4 35 10 30 98 FC 8B 55 D0 81 F2 00 20 00 64 09 D0 85 C0 75 12
+
+. 0 804ADFF 13
+. 83 EC 0C 68 56 17 05 08 E8 04 D6 FF FF
+
+pandn_2 ... ok
+. 0 804AE0C 5
+. 83 C4 10 EB 42
+
+. 0 804AE53 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A09 5
+. E8 4D A4 FF FF
+
+. 0 804AE5B 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 0B C6 45 E1 16 C6 45 E2 21 C6 45 E3 2C C6 45 E4 37 C6 45 E5 42 C6 45 E6 4D C6 45 E7 58 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 0B C6 45 D9 0B C6 45 DA 21 C6 45 DB 21 C6 45 DC 37 C6 45 DD 37 C6 45 DE 4D C6 45 DF 4D 83 EC 08 6A 01 68 E0 39 05 08 E8 1E D5 FF FF
+
+. 0 804AED2 11
+. 83 C4 10 85 C0 0F 85 57 01 00 00
+
+. 0 804AEDD 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F 74 C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 FF 75 3F
+
+. 0 804AEFF 6
+. 80 7D D1 00 75 39
+
+. 0 804AF05 6
+. 80 7D D2 FF 75 33
+
+. 0 804AF0B 6
+. 80 7D D3 00 75 2D
+
+. 0 804AF11 6
+. 80 7D D4 FF 75 27
+
+. 0 804AF17 6
+. 80 7D D5 00 75 21
+
+. 0 804AF1D 6
+. 80 7D D6 FF 75 1B
+
+. 0 804AF23 6
+. 80 7D D7 00 75 15
+
+. 0 804AF29 13
+. 83 EC 0C 68 8E 17 05 08 E8 DA D4 FF FF
+
+pcmpeqb_1 ... ok
+. 0 804AF36 8
+. 83 C4 10 E9 06 01 00 00
+
+. 0 804B044 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A0E 5
+. E8 39 A6 FF FF
+
+. 0 804B04C 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 0B C6 45 E1 16 C6 45 E2 21 C6 45 E3 2C C6 45 E4 37 C6 45 E5 42 C6 45 E6 4D C6 45 E7 58 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 0B C6 45 D9 0B C6 45 DA 21 C6 45 DB 21 C6 45 DC 37 C6 45 DD 37 C6 45 DE 4D C6 45 DF 4D 83 EC 08 6A 01 68 E0 39 05 08 E8 2D D3 FF FF
+
+. 0 804B0C3 11
+. 83 C4 10 85 C0 0F 85 54 01 00 00
+
+. 0 804B0CE 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 74 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 FF 75 3F
+
+. 0 804B0ED 6
+. 80 7D D1 00 75 39
+
+. 0 804B0F3 6
+. 80 7D D2 FF 75 33
+
+. 0 804B0F9 6
+. 80 7D D3 00 75 2D
+
+. 0 804B0FF 6
+. 80 7D D4 FF 75 27
+
+. 0 804B105 6
+. 80 7D D5 00 75 21
+
+. 0 804B10B 6
+. 80 7D D6 FF 75 1B
+
+. 0 804B111 6
+. 80 7D D7 00 75 15
+
+. 0 804B117 13
+. 83 EC 0C 68 CC 17 05 08 E8 EC D2 FF FF
+
+pcmpeqb_2 ... ok
+. 0 804B124 8
+. 83 C4 10 E9 06 01 00 00
+
+. 0 804B232 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A13 5
+. E8 22 A8 FF FF
+
+. 0 804B23A 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 30 41 AB 00 C7 45 E4 4C 6C 51 03 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 30 41 AB 00 C7 45 DC 30 41 AB 00 83 EC 08 6A 01 68 E0 39 05 08 E8 63 D1 FF FF
+
+. 0 804B28D 7
+. 83 C4 10 85 C0 75 76
+
+. 0 804B294 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F 76 C8 0F 7F 4D D0 DD A5 58 FF FF FF 83 7D D0 FF 75 18
+
+. 0 804B2B6 6
+. 83 7D D4 00 75 12
+
+. 0 804B2BC 13
+. 83 EC 0C 68 0A 18 05 08 E8 47 D1 FF FF
+
+pcmpeqd_1 ... ok
+. 0 804B2C9 5
+. 83 C4 10 EB 4C
+
+. 0 804B31A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A18 5
+. E8 05 A9 FF FF
+
+. 0 804B322 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 30 41 AB 00 C7 45 E4 4C 6C 51 03 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 30 41 AB 00 C7 45 DC 30 41 AB 00 83 EC 08 6A 01 68 E0 39 05 08 E8 7B D0 FF FF
+
+. 0 804B375 7
+. 83 C4 10 85 C0 75 73
+
+. 0 804B37C 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 76 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 83 7D D0 FF 75 18
+
+. 0 804B39B 6
+. 83 7D D4 00 75 12
+
+. 0 804B3A1 13
+. 83 EC 0C 68 98 18 05 08 E8 62 D0 FF FF
+
+pcmpeqd_2 ... ok
+. 0 804B3AE 5
+. 83 C4 10 EB 4C
+
+. 0 804B3FF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A1D 5
+. E8 E5 A9 FF FF
+
+. 0 804B407 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 62 04 66 C7 45 E2 10 0D 66 C7 45 E4 BE 15 66 C7 45 E6 6C 1E C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 62 04 66 C7 45 DA 62 04 66 C7 45 DC BE 15 66 C7 45 DE BE 15 83 EC 08 6A 01 68 E0 39 05 08 E8 82 CF FF FF
+
+. 0 804B46E 11
+. 83 C4 10 85 C0 0F 85 D3 00 00 00
+
+. 0 804B479 35
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F 75 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 FF 75 2A
+
+. 0 804B49C 7
+. 66 83 7D D2 00 75 23
+
+. 0 804B4A3 7
+. 66 83 7D D4 FF 75 1C
+
+. 0 804B4AA 7
+. 66 83 7D D6 00 75 15
+
+. 0 804B4B1 13
+. 83 EC 0C 68 D6 18 05 08 E8 52 CF FF FF
+
+pcmpeqw_1 ... ok
+. 0 804B4BE 8
+. 83 C4 10 E9 96 00 00 00
+
+. 0 804B55C 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A22 5
+. E8 3D AB FF FF
+
+. 0 804B564 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 62 04 66 C7 45 E2 10 0D 66 C7 45 E4 BE 15 66 C7 45 E6 6C 1E C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 62 04 66 C7 45 DA 62 04 66 C7 45 DC BE 15 66 C7 45 DE BE 15 83 EC 08 6A 01 68 E0 39 05 08 E8 25 CE FF FF
+
+. 0 804B5CB 11
+. 83 C4 10 85 C0 0F 85 D0 00 00 00
+
+. 0 804B5D6 32
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 75 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 FF 75 2A
+
+. 0 804B5F6 7
+. 66 83 7D D2 00 75 23
+
+. 0 804B5FD 7
+. 66 83 7D D4 FF 75 1C
+
+. 0 804B604 7
+. 66 83 7D D6 00 75 15
+
+. 0 804B60B 13
+. 83 EC 0C 68 14 19 05 08 E8 F8 CD FF FF
+
+pcmpeqw_2 ... ok
+. 0 804B618 8
+. 83 C4 10 E9 96 00 00 00
+
+. 0 804B6B6 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A27 5
+. E8 92 AC FF FF
+
+. 0 804B6BE 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 B3 C6 45 E1 C9 C6 45 E2 DF C6 45 E3 F5 C6 45 E4 0B C6 45 E5 21 C6 45 E6 37 C6 45 E7 4D C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 4D C6 45 D9 37 C6 45 DA 21 C6 45 DB 0B C6 45 DC F5 C6 45 DD DF C6 45 DE C9 C6 45 DF B3 83 EC 08 6A 01 68 E0 39 05 08 E8 BB CC FF FF
+
+. 0 804B735 11
+. 83 C4 10 85 C0 0F 85 57 01 00 00
+
+. 0 804B740 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F 64 C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 FF 75 3F
+
+. 0 804B762 6
+. 80 7D D1 FF 75 39
+
+. 0 804B768 6
+. 80 7D D2 FF 75 33
+
+. 0 804B76E 6
+. 80 7D D3 FF 75 2D
+
+. 0 804B774 6
+. 80 7D D4 00 75 27
+
+. 0 804B77A 6
+. 80 7D D5 00 75 21
+
+. 0 804B780 6
+. 80 7D D6 00 75 1B
+
+. 0 804B786 6
+. 80 7D D7 00 75 15
+
+. 0 804B78C 13
+. 83 EC 0C 68 52 19 05 08 E8 77 CC FF FF
+
+pcmpgtb_1 ... ok
+. 0 804B799 8
+. 83 C4 10 E9 06 01 00 00
+
+. 0 804B8A7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A2C 5
+. E8 7E AE FF FF
+
+. 0 804B8AF 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 B3 C6 45 E1 C9 C6 45 E2 DF C6 45 E3 F5 C6 45 E4 0B C6 45 E5 21 C6 45 E6 37 C6 45 E7 4D C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 4D C6 45 D9 37 C6 45 DA 21 C6 45 DB 0B C6 45 DC F5 C6 45 DD DF C6 45 DE C9 C6 45 DF B3 83 EC 08 6A 01 68 E0 39 05 08 E8 CA CA FF FF
+
+. 0 804B926 11
+. 83 C4 10 85 C0 0F 85 54 01 00 00
+
+. 0 804B931 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 64 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 FF 75 3F
+
+. 0 804B950 6
+. 80 7D D1 FF 75 39
+
+. 0 804B956 6
+. 80 7D D2 FF 75 33
+
+. 0 804B95C 6
+. 80 7D D3 FF 75 2D
+
+. 0 804B962 6
+. 80 7D D4 00 75 27
+
+. 0 804B968 6
+. 80 7D D5 00 75 21
+
+. 0 804B96E 6
+. 80 7D D6 00 75 1B
+
+. 0 804B974 6
+. 80 7D D7 00 75 15
+
+. 0 804B97A 13
+. 83 EC 0C 68 90 19 05 08 E8 89 CA FF FF
+
+pcmpgtb_2 ... ok
+. 0 804B987 8
+. 83 C4 10 E9 06 01 00 00
+
+. 0 804BA95 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A31 5
+. E8 67 B0 FF FF
+
+. 0 804BA9D 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 39 75 56 FF C7 45 E4 C7 8A A9 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 C7 8A A9 00 C7 45 DC 39 75 56 FF 83 EC 08 6A 01 68 E0 39 05 08 E8 00 C9 FF FF
+
+. 0 804BAF0 7
+. 83 C4 10 85 C0 75 76
+
+. 0 804BAF7 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F 66 C8 0F 7F 4D D0 DD A5 58 FF FF FF 83 7D D0 FF 75 18
+
+. 0 804BB19 6
+. 83 7D D4 00 75 12
+
+. 0 804BB1F 13
+. 83 EC 0C 68 CE 19 05 08 E8 E4 C8 FF FF
+
+pcmpgtd_1 ... ok
+. 0 804BB2C 5
+. 83 C4 10 EB 4C
+
+. 0 804BB7D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A36 5
+. E8 4A B1 FF FF
+
+. 0 804BB85 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 39 75 56 FF C7 45 E4 C7 8A A9 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 C7 8A A9 00 C7 45 DC 39 75 56 FF 83 EC 08 6A 01 68 E0 39 05 08 E8 18 C8 FF FF
+
+. 0 804BBD8 7
+. 83 C4 10 85 C0 75 73
+
+. 0 804BBDF 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 66 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 83 7D D0 FF 75 18
+
+. 0 804BBFE 6
+. 83 7D D4 00 75 12
+
+. 0 804BC04 13
+. 83 EC 0C 68 0C 1A 05 08 E8 FF C7 FF FF
+
+pcmpgtd_2 ... ok
+. 0 804BC11 5
+. 83 C4 10 EB 4C
+
+. 0 804BC62 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A3B 5
+. E8 2A B2 FF FF
+
+. 0 804BC6A 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 FB F2 66 C7 45 E2 A9 FB 66 C7 45 E4 57 04 66 C7 45 E6 05 0D C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 05 0D 66 C7 45 DA 57 04 66 C7 45 DC A9 FB 66 C7 45 DE FB F2 83 EC 08 6A 01 68 E0 39 05 08 E8 1F C7 FF FF
+
+. 0 804BCD1 11
+. 83 C4 10 85 C0 0F 85 D3 00 00 00
+
+. 0 804BCDC 35
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F 65 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 FF 75 2A
+
+. 0 804BCFF 7
+. 66 83 7D D2 FF 75 23
+
+. 0 804BD06 7
+. 66 83 7D D4 00 75 1C
+
+. 0 804BD0D 7
+. 66 83 7D D6 00 75 15
+
+. 0 804BD14 13
+. 83 EC 0C 68 4A 1A 05 08 E8 EF C6 FF FF
+
+pcmpgtw_1 ... ok
+. 0 804BD21 8
+. 83 C4 10 E9 96 00 00 00
+
+. 0 804BDBF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A40 5
+. E8 82 B3 FF FF
+
+. 0 804BDC7 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 FB F2 66 C7 45 E2 A9 FB 66 C7 45 E4 57 04 66 C7 45 E6 05 0D C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 05 0D 66 C7 45 DA 57 04 66 C7 45 DC A9 FB 66 C7 45 DE FB F2 83 EC 08 6A 01 68 E0 39 05 08 E8 C2 C5 FF FF
+
+. 0 804BE2E 11
+. 83 C4 10 85 C0 0F 85 D0 00 00 00
+
+. 0 804BE39 32
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 65 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 FF 75 2A
+
+. 0 804BE59 7
+. 66 83 7D D2 FF 75 23
+
+. 0 804BE60 7
+. 66 83 7D D4 00 75 1C
+
+. 0 804BE67 7
+. 66 83 7D D6 00 75 15
+
+. 0 804BE6E 13
+. 83 EC 0C 68 88 1A 05 08 E8 95 C5 FF FF
+
+pcmpgtw_2 ... ok
+. 0 804BE7B 8
+. 83 C4 10 E9 96 00 00 00
+
+. 0 804BF19 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A45 5
+. E8 D7 B4 FF FF
+
+. 0 804BF21 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 D2 04 66 C7 45 E2 2E 16 66 C7 45 E4 1F EF 66 C7 45 E6 C3 DD C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 57 04 66 C7 45 DA 52 F7 66 C7 45 DC 05 0D 66 C7 45 DE A4 EE 83 EC 08 6A 01 68 E0 39 05 08 E8 68 C4 FF FF
+
+. 0 804BF88 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804BF93 37
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F F5 C8 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 1A 68 54 FF 75 1B
+
+. 0 804BFB8 9
+. 81 7D D4 87 99 76 01 75 12
+
+. 0 804BFC1 13
+. 83 EC 0C 68 C6 1A 05 08 E8 42 C4 FF FF
+
+pmaddwd_1 ... ok
+. 0 804BFCE 5
+. 83 C4 10 EB 52
+
+. 0 804C025 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A4A 5
+. E8 DE B5 FF FF
+
+. 0 804C02D 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 D2 04 66 C7 45 E2 2E 16 66 C7 45 E4 1F EF 66 C7 45 E6 C3 DD C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 57 04 66 C7 45 DA 52 F7 66 C7 45 DC 05 0D 66 C7 45 DE A4 EE 83 EC 08 6A 01 68 E0 39 05 08 E8 5C C3 FF FF
+
+. 0 804C094 7
+. 83 C4 10 85 C0 75 7F
+
+. 0 804C09B 34
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F F5 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 1A 68 54 FF 75 1B
+
+. 0 804C0BD 9
+. 81 7D D4 87 99 76 01 75 12
+
+. 0 804C0C6 13
+. 83 EC 0C 68 04 1B 05 08 E8 3D C3 FF FF
+
+pmaddwd_2 ... ok
+. 0 804C0D3 5
+. 83 C4 10 EB 52
+
+. 0 804C12A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A4F 5
+. E8 DE B6 FF FF
+
+. 0 804C132 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 57 04 66 C7 45 E2 AE 08 66 C7 45 E4 A9 FB 66 C7 45 E6 52 F7 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 05 0D 66 C7 45 DA A4 EE 66 C7 45 DC 05 0D 66 C7 45 DE A4 EE 83 EC 08 6A 01 68 E0 39 05 08 E8 57 C2 FF FF
+
+. 0 804C199 11
+. 83 C4 10 85 C0 0F 85 D8 00 00 00
+
+. 0 804C1A4 35
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F E5 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 38 75 2C
+
+. 0 804C1C7 8
+. 66 81 7D D2 69 FF 75 24
+
+. 0 804C1CF 7
+. 66 83 7D D4 C7 75 1D
+
+. 0 804C1D6 8
+. 66 81 7D D6 96 00 75 15
+
+. 0 804C1DE 13
+. 83 EC 0C 68 42 1B 05 08 E8 25 C2 FF FF
+
+pmulhw_1 ... ok
+. 0 804C1EB 8
+. 83 C4 10 E9 99 00 00 00
+
+. 0 804C28C 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A54 5
+. E8 3B B8 FF FF
+
+. 0 804C294 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 57 04 66 C7 45 E2 AE 08 66 C7 45 E4 A9 FB 66 C7 45 E6 52 F7 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 05 0D 66 C7 45 DA A4 EE 66 C7 45 DC 05 0D 66 C7 45 DE A4 EE 83 EC 08 6A 01 68 E0 39 05 08 E8 F5 C0 FF FF
+
+. 0 804C2FB 11
+. 83 C4 10 85 C0 0F 85 D5 00 00 00
+
+. 0 804C306 32
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F E5 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 38 75 2C
+
+. 0 804C326 8
+. 66 81 7D D2 69 FF 75 24
+
+. 0 804C32E 7
+. 66 83 7D D4 C7 75 1D
+
+. 0 804C335 8
+. 66 81 7D D6 96 00 75 15
+
+. 0 804C33D 13
+. 83 EC 0C 68 7D 1B 05 08 E8 C6 C0 FF FF
+
+pmulhw_2 ... ok
+. 0 804C34A 8
+. 83 C4 10 E9 99 00 00 00
+
+. 0 804C3EB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A59 5
+. E8 95 B9 FF FF
+
+. 0 804C3F3 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 57 04 66 C7 45 E2 AE 08 66 C7 45 E4 A9 FB 66 C7 45 E6 52 F7 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 05 0D 66 C7 45 DA A4 EE 66 C7 45 DC 05 0D 66 C7 45 DE A4 EE 83 EC 08 6A 01 68 E0 39 05 08 E8 96 BF FF FF
+
+. 0 804C45A 11
+. 83 C4 10 85 C0 0F 85 DD 00 00 00
+
+. 0 804C465 36
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F D5 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 B3 80 75 2D
+
+. 0 804C489 8
+. 66 81 7D D2 78 53 75 25
+
+. 0 804C491 8
+. 66 81 7D D4 4D 7F 75 1D
+
+. 0 804C499 8
+. 66 81 7D D6 88 AC 75 15
+
+. 0 804C4A1 13
+. 83 EC 0C 68 B8 1B 05 08 E8 62 BF FF FF
+
+pmullw_1 ... ok
+. 0 804C4AE 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 804C552 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A5E 5
+. E8 F7 BA FF FF
+
+. 0 804C55A 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 57 04 66 C7 45 E2 AE 08 66 C7 45 E4 A9 FB 66 C7 45 E6 52 F7 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 05 0D 66 C7 45 DA A4 EE 66 C7 45 DC 05 0D 66 C7 45 DE A4 EE 83 EC 08 6A 01 68 E0 39 05 08 E8 2F BE FF FF
+
+. 0 804C5C1 11
+. 83 C4 10 85 C0 0F 85 DA 00 00 00
+
+. 0 804C5CC 33
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F D5 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 B3 80 75 2D
+
+. 0 804C5ED 8
+. 66 81 7D D2 78 53 75 25
+
+. 0 804C5F5 8
+. 66 81 7D D4 4D 7F 75 1D
+
+. 0 804C5FD 8
+. 66 81 7D D6 88 AC 75 15
+
+. 0 804C605 13
+. 83 EC 0C 68 F3 1B 05 08 E8 FE BD FF FF
+
+pmullw_2 ... ok
+. 0 804C612 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 804C6B6 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A63 5
+. E8 56 BC FF FF
+
+. 0 804C6BE 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 20 64 A8 EC C7 45 E4 31 75 B9 FD C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 EF CD AB 89 C7 45 DC 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 DF BC FF FF
+
+. 0 804C711 7
+. 83 C4 10 85 C0 75 77
+
+. 0 804C718 51
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F EB C8 0F 7F 4D D0 DD A5 58 FF FF FF 8B 45 D4 35 77 75 BB FD 8B 55 D0 81 F2 EF ED AB ED 09 D0 85 C0 75 12
+
+. 0 804C74B 13
+. 83 EC 0C 68 2E 1C 05 08 E8 B8 BC FF FF
+
+por_1 ... ok
+. 0 804C758 5
+. 83 C4 10 EB 42
+
+. 0 804C79F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A68 5
+. E8 3A BD FF FF
+
+. 0 804C7A7 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 20 64 A8 EC C7 45 E4 31 75 B9 FD C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 EF CD AB 89 C7 45 DC 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 F6 BB FF FF
+
+. 0 804C7FA 7
+. 83 C4 10 85 C0 75 74
+
+. 0 804C801 48
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F EB 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 8B 45 D4 35 77 75 BB FD 8B 55 D0 81 F2 EF ED AB ED 09 D0 85 C0 75 12
+
+. 0 804C831 13
+. 83 EC 0C 68 60 1C 05 08 E8 D2 BB FF FF
+
+por_2 ... ok
+. 0 804C83E 5
+. 83 C4 10 EB 42
+
+. 0 804C885 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A6D 5
+. E8 1B BE FF FF
+
+. 0 804C88D 55
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 67 45 23 01 C7 45 E4 EF CD AB 89 83 EC 08 6A 01 68 E0 39 05 08 E8 2C BB FF FF
+
+. 0 804C8C4 7
+. 83 C4 10 85 C0 75 7F
+
+. 0 804C8CB 34
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 0F 72 F0 04 0F 7F 45 D8 DD A5 68 FF FF FF 81 7D D8 70 56 34 12 75 1B
+
+. 0 804C8ED 9
+. 81 7D DC F0 DE BC 9A 75 12
+
+. 0 804C8F6 13
+. 83 EC 0C 68 92 1C 05 08 E8 0D BB FF FF
+
+pslld_1 ... ok
+. 0 804C903 5
+. 83 C4 10 EB 52
+
+. 0 804C95A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A72 5
+. E8 EB BE FF FF
+
+. 0 804C962 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 67 45 23 01 C7 45 DC EF CD AB 89 83 EC 08 6A 01 68 E0 39 05 08 E8 3B BA FF FF
+
+. 0 804C9B5 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804C9C0 37
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F F2 C8 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 70 56 34 12 75 1B
+
+. 0 804C9E5 9
+. 81 7D D4 F0 DE BC 9A 75 12
+
+. 0 804C9EE 13
+. 83 EC 0C 68 CA 1C 05 08 E8 15 BA FF FF
+
+pslld_2 ... ok
+. 0 804C9FB 5
+. 83 C4 10 EB 52
+
+. 0 804CA52 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A77 5
+. E8 DE BF FF FF
+
+. 0 804CA5A 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 67 45 23 01 C7 45 DC EF CD AB 89 83 EC 08 6A 01 68 E0 39 05 08 E8 43 B9 FF FF
+
+. 0 804CAAD 7
+. 83 C4 10 85 C0 75 7F
+
+. 0 804CAB4 34
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F F2 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 70 56 34 12 75 1B
+
+. 0 804CAD6 9
+. 81 7D D4 F0 DE BC 9A 75 12
+
+. 0 804CADF 13
+. 83 EC 0C 68 02 1D 05 08 E8 24 B9 FF FF
+
+pslld_3 ... ok
+. 0 804CAEC 5
+. 83 C4 10 EB 52
+
+. 0 804CB43 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A7C 5
+. E8 CA C0 FF FF
+
+. 0 804CB4B 55
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 EF CD AB 89 C7 45 E4 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 6E B8 FF FF
+
+. 0 804CB82 7
+. 83 C4 10 85 C0 75 74
+
+. 0 804CB89 48
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 0F 73 F0 04 0F 7F 45 D8 DD A5 68 FF FF FF 8B 45 DC 35 78 56 34 12 8B 55 D8 81 F2 F0 DE BC 9A 09 D0 85 C0 75 12
+
+. 0 804CBB9 13
+. 83 EC 0C 68 3A 1D 05 08 E8 4A B8 FF FF
+
+psllq_1 ... ok
+. 0 804CBC6 5
+. 83 C4 10 EB 42
+
+. 0 804CC0D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A81 5
+. E8 8F C1 FF FF
+
+. 0 804CC15 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 EF CD AB 89 C7 45 DC 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 88 B7 FF FF
+
+. 0 804CC68 7
+. 83 C4 10 85 C0 75 77
+
+. 0 804CC6F 51
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F F3 C8 0F 7F 4D D0 DD A5 58 FF FF FF 8B 45 D4 35 78 56 34 12 8B 55 D0 81 F2 F0 DE BC 9A 09 D0 85 C0 75 12
+
+. 0 804CCA2 13
+. 83 EC 0C 68 72 1D 05 08 E8 61 B7 FF FF
+
+psllq_2 ... ok
+. 0 804CCAF 5
+. 83 C4 10 EB 42
+
+. 0 804CCF6 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A86 5
+. E8 73 C2 FF FF
+
+. 0 804CCFE 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 EF CD AB 89 C7 45 DC 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 9F B6 FF FF
+
+. 0 804CD51 7
+. 83 C4 10 85 C0 75 74
+
+. 0 804CD58 48
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F F3 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 8B 45 D4 35 78 56 34 12 8B 55 D0 81 F2 F0 DE BC 9A 09 D0 85 C0 75 12
+
+. 0 804CD88 13
+. 83 EC 0C 68 AA 1D 05 08 E8 7B B6 FF FF
+
+psllq_3 ... ok
+. 0 804CD95 5
+. 83 C4 10 EB 42
+
+. 0 804CDDC 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A8B 5
+. E8 54 C3 FF FF
+
+. 0 804CDE4 65
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 23 01 66 C7 45 E2 67 45 66 C7 45 E4 AB 89 66 C7 45 E6 EF CD 83 EC 08 6A 01 68 E0 39 05 08 E8 CB B5 FF FF
+
+. 0 804CE25 11
+. 83 C4 10 85 C0 0F 85 DA 00 00 00
+
+. 0 804CE30 33
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 0F 71 F0 04 0F 7F 45 D8 DD A5 68 FF FF FF 66 81 7D D8 30 12 75 2D
+
+. 0 804CE51 8
+. 66 81 7D DA 70 56 75 25
+
+. 0 804CE59 8
+. 66 81 7D DC B0 9A 75 1D
+
+. 0 804CE61 8
+. 66 81 7D DE F0 DE 75 15
+
+. 0 804CE69 13
+. 83 EC 0C 68 E2 1D 05 08 E8 9A B5 FF FF
+
+psllw_1 ... ok
+. 0 804CE76 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 804CF1A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A90 5
+. E8 8D C4 FF FF
+
+. 0 804CF22 93
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 23 01 66 C7 45 DA 67 45 66 C7 45 DC AB 89 66 C7 45 DE EF CD 83 EC 08 6A 01 68 E0 39 05 08 E8 71 B4 FF FF
+
+. 0 804CF7F 11
+. 83 C4 10 85 C0 0F 85 DD 00 00 00
+
+. 0 804CF8A 36
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F F1 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 30 12 75 2D
+
+. 0 804CFAE 8
+. 66 81 7D D2 70 56 75 25
+
+. 0 804CFB6 8
+. 66 81 7D D4 B0 9A 75 1D
+
+. 0 804CFBE 8
+. 66 81 7D D6 F0 DE 75 15
+
+. 0 804CFC6 13
+. 83 EC 0C 68 1A 1E 05 08 E8 3D B4 FF FF
+
+psllw_2 ... ok
+. 0 804CFD3 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 804D077 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A95 5
+. E8 E5 C5 FF FF
+
+. 0 804D07F 93
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 23 01 66 C7 45 DA 67 45 66 C7 45 DC AB 89 66 C7 45 DE EF CD 83 EC 08 6A 01 68 E0 39 05 08 E8 14 B3 FF FF
+
+. 0 804D0DC 11
+. 83 C4 10 85 C0 0F 85 DA 00 00 00
+
+. 0 804D0E7 33
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F F1 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 30 12 75 2D
+
+. 0 804D108 8
+. 66 81 7D D2 70 56 75 25
+
+. 0 804D110 8
+. 66 81 7D D4 B0 9A 75 1D
+
+. 0 804D118 8
+. 66 81 7D D6 F0 DE 75 15
+
+. 0 804D120 13
+. 83 EC 0C 68 52 1E 05 08 E8 E3 B2 FF FF
+
+psllw_3 ... ok
+. 0 804D12D 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 804D1D1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A9A 5
+. E8 3A C7 FF FF
+
+. 0 804D1D9 55
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 67 45 23 01 C7 45 E4 EF CD AB 89 83 EC 08 6A 01 68 E0 39 05 08 E8 E0 B1 FF FF
+
+. 0 804D210 7
+. 83 C4 10 85 C0 75 7F
+
+. 0 804D217 34
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 0F 72 E0 04 0F 7F 45 D8 DD A5 68 FF FF FF 81 7D D8 56 34 12 00 75 1B
+
+. 0 804D239 9
+. 81 7D DC DE BC 9A F8 75 12
+
+. 0 804D242 13
+. 83 EC 0C 68 8A 1E 05 08 E8 C1 B1 FF FF
+
+psrad_1 ... ok
+. 0 804D24F 5
+. 83 C4 10 EB 52
+
+. 0 804D2A6 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050A9F 5
+. E8 0A C8 FF FF
+
+. 0 804D2AE 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 67 45 23 01 C7 45 DC EF CD AB 89 83 EC 08 6A 01 68 E0 39 05 08 E8 EF B0 FF FF
+
+. 0 804D301 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804D30C 37
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F E2 C8 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 56 34 12 00 75 1B
+
+. 0 804D331 9
+. 81 7D D4 DE BC 9A F8 75 12
+
+. 0 804D33A 13
+. 83 EC 0C 68 C2 1E 05 08 E8 C9 B0 FF FF
+
+psrad_2 ... ok
+. 0 804D347 5
+. 83 C4 10 EB 52
+
+. 0 804D39E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AA4 5
+. E8 FD C8 FF FF
+
+. 0 804D3A6 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 67 45 23 01 C7 45 DC EF CD AB 89 83 EC 08 6A 01 68 E0 39 05 08 E8 F7 AF FF FF
+
+. 0 804D3F9 7
+. 83 C4 10 85 C0 75 7F
+
+. 0 804D400 34
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F E2 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 56 34 12 00 75 1B
+
+. 0 804D422 9
+. 81 7D D4 DE BC 9A F8 75 12
+
+. 0 804D42B 13
+. 83 EC 0C 68 FA 1E 05 08 E8 D8 AF FF FF
+
+psrad_3 ... ok
+. 0 804D438 5
+. 83 C4 10 EB 52
+
+. 0 804D48F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AA9 5
+. E8 E9 C9 FF FF
+
+. 0 804D497 65
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 23 01 66 C7 45 E2 67 45 66 C7 45 E4 AB 89 66 C7 45 E6 EF CD 83 EC 08 6A 01 68 E0 39 05 08 E8 18 AF FF FF
+
+. 0 804D4D8 11
+. 83 C4 10 85 C0 0F 85 D6 00 00 00
+
+. 0 804D4E3 32
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 0F 71 E0 04 0F 7F 45 D8 DD A5 68 FF FF FF 66 83 7D D8 12 75 2D
+
+. 0 804D503 8
+. 66 81 7D DA 56 04 75 25
+
+. 0 804D50B 8
+. 66 81 7D DC 9A F8 75 1D
+
+. 0 804D513 8
+. 66 81 7D DE DE FC 75 15
+
+. 0 804D51B 13
+. 83 EC 0C 68 32 1F 05 08 E8 E8 AE FF FF
+
+psraw_1 ... ok
+. 0 804D528 8
+. 83 C4 10 E9 99 00 00 00
+
+. 0 804D5C9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AAE 5
+. E8 1E CB FF FF
+
+. 0 804D5D1 93
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 23 01 66 C7 45 DA 67 45 66 C7 45 DC AB 89 66 C7 45 DE EF CD 83 EC 08 6A 01 68 E0 39 05 08 E8 C2 AD FF FF
+
+. 0 804D62E 11
+. 83 C4 10 85 C0 0F 85 D9 00 00 00
+
+. 0 804D639 35
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F E1 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 12 75 2D
+
+. 0 804D65C 8
+. 66 81 7D D2 56 04 75 25
+
+. 0 804D664 8
+. 66 81 7D D4 9A F8 75 1D
+
+. 0 804D66C 8
+. 66 81 7D D6 DE FC 75 15
+
+. 0 804D674 13
+. 83 EC 0C 68 6A 1F 05 08 E8 8F AD FF FF
+
+psraw_2 ... ok
+. 0 804D681 8
+. 83 C4 10 E9 99 00 00 00
+
+. 0 804D722 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AB3 5
+. E8 72 CC FF FF
+
+. 0 804D72A 93
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 23 01 66 C7 45 DA 67 45 66 C7 45 DC AB 89 66 C7 45 DE EF CD 83 EC 08 6A 01 68 E0 39 05 08 E8 69 AC FF FF
+
+. 0 804D787 11
+. 83 C4 10 85 C0 0F 85 D6 00 00 00
+
+. 0 804D792 32
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F E1 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 12 75 2D
+
+. 0 804D7B2 8
+. 66 81 7D D2 56 04 75 25
+
+. 0 804D7BA 8
+. 66 81 7D D4 9A F8 75 1D
+
+. 0 804D7C2 8
+. 66 81 7D D6 DE FC 75 15
+
+. 0 804D7CA 13
+. 83 EC 0C 68 A2 1F 05 08 E8 39 AC FF FF
+
+psraw_3 ... ok
+. 0 804D7D7 8
+. 83 C4 10 E9 99 00 00 00
+
+. 0 804D878 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AB8 5
+. E8 C3 CD FF FF
+
+. 0 804D880 55
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 67 45 23 01 C7 45 E4 EF CD AB 89 83 EC 08 6A 01 68 E0 39 05 08 E8 39 AB FF FF
+
+. 0 804D8B7 7
+. 83 C4 10 85 C0 75 7F
+
+. 0 804D8BE 34
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 0F 72 D0 04 0F 7F 45 D8 DD A5 68 FF FF FF 81 7D D8 56 34 12 00 75 1B
+
+. 0 804D8E0 9
+. 81 7D DC DE BC 9A 08 75 12
+
+. 0 804D8E9 13
+. 83 EC 0C 68 DA 1F 05 08 E8 1A AB FF FF
+
+psrld_1 ... ok
+. 0 804D8F6 5
+. 83 C4 10 EB 52
+
+. 0 804D94D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050ABD 5
+. E8 93 CE FF FF
+
+. 0 804D955 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 67 45 23 01 C7 45 DC EF CD AB 89 83 EC 08 6A 01 68 E0 39 05 08 E8 48 AA FF FF
+
+. 0 804D9A8 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804D9B3 37
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F D2 C8 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 56 34 12 00 75 1B
+
+. 0 804D9D8 9
+. 81 7D D4 DE BC 9A 08 75 12
+
+. 0 804D9E1 13
+. 83 EC 0C 68 12 20 05 08 E8 22 AA FF FF
+
+psrld_2 ... ok
+. 0 804D9EE 5
+. 83 C4 10 EB 52
+
+. 0 804DA45 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AC2 5
+. E8 86 CF FF FF
+
+. 0 804DA4D 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 67 45 23 01 C7 45 DC EF CD AB 89 83 EC 08 6A 01 68 E0 39 05 08 E8 50 A9 FF FF
+
+. 0 804DAA0 7
+. 83 C4 10 85 C0 75 7F
+
+. 0 804DAA7 34
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F D2 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 56 34 12 00 75 1B
+
+. 0 804DAC9 9
+. 81 7D D4 DE BC 9A 08 75 12
+
+. 0 804DAD2 13
+. 83 EC 0C 68 4A 20 05 08 E8 31 A9 FF FF
+
+psrld_3 ... ok
+. 0 804DADF 5
+. 83 C4 10 EB 52
+
+. 0 804DB36 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AC7 5
+. E8 72 D0 FF FF
+
+. 0 804DB3E 55
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 EF CD AB 89 C7 45 E4 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 7B A8 FF FF
+
+. 0 804DB75 7
+. 83 C4 10 85 C0 75 74
+
+. 0 804DB7C 48
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 0F 73 D0 04 0F 7F 45 D8 DD A5 68 FF FF FF 8B 45 DC 35 56 34 12 00 8B 55 D8 81 F2 DE BC 9A 78 09 D0 85 C0 75 12
+
+. 0 804DBAC 13
+. 83 EC 0C 68 82 20 05 08 E8 57 A8 FF FF
+
+psrlq_1 ... ok
+. 0 804DBB9 5
+. 83 C4 10 EB 42
+
+. 0 804DC00 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050ACC 5
+. E8 37 D1 FF FF
+
+. 0 804DC08 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 EF CD AB 89 C7 45 DC 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 95 A7 FF FF
+
+. 0 804DC5B 7
+. 83 C4 10 85 C0 75 77
+
+. 0 804DC62 51
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F D3 C8 0F 7F 4D D0 DD A5 58 FF FF FF 8B 45 D4 35 56 34 12 00 8B 55 D0 81 F2 DE BC 9A 78 09 D0 85 C0 75 12
+
+. 0 804DC95 13
+. 83 EC 0C 68 BA 20 05 08 E8 6E A7 FF FF
+
+psrlq_2 ... ok
+. 0 804DCA2 5
+. 83 C4 10 EB 42
+
+. 0 804DCE9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AD1 5
+. E8 1B D2 FF FF
+
+. 0 804DCF1 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 EF CD AB 89 C7 45 DC 67 45 23 01 83 EC 08 6A 01 68 E0 39 05 08 E8 AC A6 FF FF
+
+. 0 804DD44 7
+. 83 C4 10 85 C0 75 74
+
+. 0 804DD4B 48
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F D3 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 8B 45 D4 35 56 34 12 00 8B 55 D0 81 F2 DE BC 9A 78 09 D0 85 C0 75 12
+
+. 0 804DD7B 13
+. 83 EC 0C 68 F2 20 05 08 E8 88 A6 FF FF
+
+psrlq_3 ... ok
+. 0 804DD88 5
+. 83 C4 10 EB 42
+
+. 0 804DDCF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AD6 5
+. E8 FC D2 FF FF
+
+. 0 804DDD7 65
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 23 01 66 C7 45 E2 67 45 66 C7 45 E4 AB 89 66 C7 45 E6 EF CD 83 EC 08 6A 01 68 E0 39 05 08 E8 D8 A5 FF FF
+
+. 0 804DE18 11
+. 83 C4 10 85 C0 0F 85 D6 00 00 00
+
+. 0 804DE23 32
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 0F 71 D0 04 0F 7F 45 D8 DD A5 68 FF FF FF 66 83 7D D8 12 75 2D
+
+. 0 804DE43 8
+. 66 81 7D DA 56 04 75 25
+
+. 0 804DE4B 8
+. 66 81 7D DC 9A 08 75 1D
+
+. 0 804DE53 8
+. 66 81 7D DE DE 0C 75 15
+
+. 0 804DE5B 13
+. 83 EC 0C 68 2A 21 05 08 E8 A8 A5 FF FF
+
+psrlw_1 ... ok
+. 0 804DE68 8
+. 83 C4 10 E9 99 00 00 00
+
+. 0 804DF09 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050ADB 5
+. E8 31 D4 FF FF
+
+. 0 804DF11 93
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 23 01 66 C7 45 DA 67 45 66 C7 45 DC AB 89 66 C7 45 DE EF CD 83 EC 08 6A 01 68 E0 39 05 08 E8 82 A4 FF FF
+
+. 0 804DF6E 11
+. 83 C4 10 85 C0 0F 85 D9 00 00 00
+
+. 0 804DF79 35
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F D1 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 12 75 2D
+
+. 0 804DF9C 8
+. 66 81 7D D2 56 04 75 25
+
+. 0 804DFA4 8
+. 66 81 7D D4 9A 08 75 1D
+
+. 0 804DFAC 8
+. 66 81 7D D6 DE 0C 75 15
+
+. 0 804DFB4 13
+. 83 EC 0C 68 62 21 05 08 E8 4F A4 FF FF
+
+psrlw_2 ... ok
+. 0 804DFC1 8
+. 83 C4 10 E9 99 00 00 00
+
+. 0 804E062 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AE0 5
+. E8 85 D5 FF FF
+
+. 0 804E06A 93
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 04 00 00 00 C7 45 E4 00 00 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 23 01 66 C7 45 DA 67 45 66 C7 45 DC AB 89 66 C7 45 DE EF CD 83 EC 08 6A 01 68 E0 39 05 08 E8 29 A3 FF FF
+
+. 0 804E0C7 11
+. 83 C4 10 85 C0 0F 85 D6 00 00 00
+
+. 0 804E0D2 32
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F D1 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 12 75 2D
+
+. 0 804E0F2 8
+. 66 81 7D D2 56 04 75 25
+
+. 0 804E0FA 8
+. 66 81 7D D4 9A 08 75 1D
+
+. 0 804E102 8
+. 66 81 7D D6 DE 0C 75 15
+
+. 0 804E10A 13
+. 83 EC 0C 68 9A 21 05 08 E8 F9 A2 FF FF
+
+psrlw_3 ... ok
+. 0 804E117 8
+. 83 C4 10 E9 99 00 00 00
+
+. 0 804E1B8 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AE5 5
+. E8 D6 D6 FF FF
+
+. 0 804E1C0 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 08 C6 45 E1 07 C6 45 E2 06 C6 45 E3 05 C6 45 E4 04 C6 45 E5 03 C6 45 E6 02 C6 45 E7 01 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 0C C6 45 D9 22 C6 45 DA 38 C6 45 DB 4E C6 45 DC 15 C6 45 DD 2B C6 45 DE 41 C6 45 DF 57 83 EC 08 6A 01 68 E0 39 05 08 E8 B9 A1 FF FF
+
+. 0 804E237 11
+. 83 C4 10 85 C0 0F 85 2B 01 00 00
+
+. 0 804E242 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F F8 C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 04 75 3F
+
+. 0 804E264 6
+. 80 7D D1 1B 75 39
+
+. 0 804E26A 6
+. 80 7D D2 32 75 33
+
+. 0 804E270 6
+. 80 7D D3 49 75 2D
+
+. 0 804E276 6
+. 80 7D D4 11 75 27
+
+. 0 804E27C 6
+. 80 7D D5 28 75 21
+
+. 0 804E282 6
+. 80 7D D6 3F 75 1B
+
+. 0 804E288 6
+. 80 7D D7 56 75 15
+
+. 0 804E28E 13
+. 83 EC 0C 68 D2 21 05 08 E8 75 A1 FF FF
+
+psubb_1 ... ok
+. 0 804E29B 8
+. 83 C4 10 E9 DA 00 00 00
+
+. 0 804E37D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AEA 5
+. E8 96 D8 FF FF
+
+. 0 804E385 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 08 C6 45 E1 07 C6 45 E2 06 C6 45 E3 05 C6 45 E4 04 C6 45 E5 03 C6 45 E6 02 C6 45 E7 01 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 0C C6 45 D9 22 C6 45 DA 38 C6 45 DB 4E C6 45 DC 15 C6 45 DD 2B C6 45 DE 41 C6 45 DF 57 83 EC 08 6A 01 68 E0 39 05 08 E8 F4 9F FF FF
+
+. 0 804E3FC 11
+. 83 C4 10 85 C0 0F 85 28 01 00 00
+
+. 0 804E407 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F F8 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 04 75 3F
+
+. 0 804E426 6
+. 80 7D D1 1B 75 39
+
+. 0 804E42C 6
+. 80 7D D2 32 75 33
+
+. 0 804E432 6
+. 80 7D D3 49 75 2D
+
+. 0 804E438 6
+. 80 7D D4 11 75 27
+
+. 0 804E43E 6
+. 80 7D D5 28 75 21
+
+. 0 804E444 6
+. 80 7D D6 3F 75 1B
+
+. 0 804E44A 6
+. 80 7D D7 56 75 15
+
+. 0 804E450 13
+. 83 EC 0C 68 0A 22 05 08 E8 B3 9F FF FF
+
+psubb_2 ... ok
+. 0 804E45D 8
+. 83 C4 10 E9 DA 00 00 00
+
+. 0 804E53F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AEF 5
+. E8 53 DA FF FF
+
+. 0 804E547 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 3D 22 00 00 C7 45 E4 E1 10 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 4E 61 BC 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 E0 39 05 08 E8 56 9E FF FF
+
+. 0 804E59A 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804E5A5 37
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F FA C8 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 11 3F BC 00 75 1B
+
+. 0 804E5CA 9
+. 81 7D D4 D0 6E 39 05 75 12
+
+. 0 804E5D3 13
+. 83 EC 0C 68 42 22 05 08 E8 30 9E FF FF
+
+psubd_1 ... ok
+. 0 804E5E0 5
+. 83 C4 10 EB 52
+
+. 0 804E637 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AF4 5
+. E8 46 DB FF FF
+
+. 0 804E63F 83
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 3D 22 00 00 C7 45 E4 E1 10 00 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 4E 61 BC 00 C7 45 DC B1 7F 39 05 83 EC 08 6A 01 68 E0 39 05 08 E8 5E 9D FF FF
+
+. 0 804E692 7
+. 83 C4 10 85 C0 75 7F
+
+. 0 804E699 34
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F FA 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 11 3F BC 00 75 1B
+
+. 0 804E6BB 9
+. 81 7D D4 D0 6E 39 05 75 12
+
+. 0 804E6C4 13
+. 83 EC 0C 68 7A 22 05 08 E8 3F 9D FF FF
+
+psubd_2 ... ok
+. 0 804E6D1 5
+. 83 C4 10 EB 52
+
+. 0 804E728 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AF9 5
+. E8 32 DC FF FF
+
+. 0 804E730 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 CE C6 45 E1 32 C6 45 E2 D8 C6 45 E3 28 C6 45 E4 E2 C6 45 E5 1E C6 45 E6 EC C6 45 E7 14 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 19 C6 45 D9 E7 C6 45 DA 32 C6 45 DB CE C6 45 DC 64 C6 45 DD 9C C6 45 DE 7D C6 45 DF 83 83 EC 08 6A 01 68 E0 39 05 08 E8 49 9C FF FF
+
+. 0 804E7A7 11
+. 83 C4 10 85 C0 0F 85 2B 01 00 00
+
+. 0 804E7B2 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F E8 C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 4B 75 3F
+
+. 0 804E7D4 6
+. 80 7D D1 B5 75 39
+
+. 0 804E7DA 6
+. 80 7D D2 5A 75 33
+
+. 0 804E7E0 6
+. 80 7D D3 A6 75 2D
+
+. 0 804E7E6 6
+. 80 7D D4 7F 75 27
+
+. 0 804E7EC 6
+. 80 7D D5 80 75 21
+
+. 0 804E7F2 6
+. 80 7D D6 7F 75 1B
+
+. 0 804E7F8 6
+. 80 7D D7 80 75 15
+
+. 0 804E7FE 13
+. 83 EC 0C 68 B2 22 05 08 E8 05 9C FF FF
+
+psubsb_1 ... ok
+. 0 804E80B 8
+. 83 C4 10 E9 DA 00 00 00
+
+. 0 804E8ED 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050AFE 5
+. E8 F2 DD FF FF
+
+. 0 804E8F5 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 CE C6 45 E1 32 C6 45 E2 D8 C6 45 E3 28 C6 45 E4 E2 C6 45 E5 1E C6 45 E6 EC C6 45 E7 14 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 19 C6 45 D9 E7 C6 45 DA 32 C6 45 DB CE C6 45 DC 64 C6 45 DD 9C C6 45 DE 7D C6 45 DF 83 83 EC 08 6A 01 68 E0 39 05 08 E8 84 9A FF FF
+
+. 0 804E96C 11
+. 83 C4 10 85 C0 0F 85 28 01 00 00
+
+. 0 804E977 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F E8 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 4B 75 3F
+
+. 0 804E996 6
+. 80 7D D1 B5 75 39
+
+. 0 804E99C 6
+. 80 7D D2 5A 75 33
+
+. 0 804E9A2 6
+. 80 7D D3 A6 75 2D
+
+. 0 804E9A8 6
+. 80 7D D4 7F 75 27
+
+. 0 804E9AE 6
+. 80 7D D5 80 75 21
+
+. 0 804E9B4 6
+. 80 7D D6 7F 75 1B
+
+. 0 804E9BA 6
+. 80 7D D7 80 75 15
+
+. 0 804E9C0 13
+. 83 EC 0C 68 ED 22 05 08 E8 43 9A FF FF
+
+psubsb_2 ... ok
+. 0 804E9CD 8
+. 83 C4 10 E9 DA 00 00 00
+
+. 0 804EAAF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B03 5
+. E8 AF DF FF FF
+
+. 0 804EAB7 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 6F 82 66 C7 45 E2 91 7D 66 C7 45 E4 39 30 66 C7 45 E6 C7 CF C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 39 30 66 C7 45 DA C7 CF 66 C7 45 DC 91 7D 66 C7 45 DE 6F 82 83 EC 08 6A 01 68 E0 39 05 08 E8 D2 98 FF FF
+
+. 0 804EB1E 11
+. 83 C4 10 85 C0 0F 85 CB 00 00 00
+
+. 0 804EB29 36
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F E9 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 FF 7F 75 2D
+
+. 0 804EB4D 8
+. 66 81 7D D2 00 80 75 25
+
+. 0 804EB55 8
+. 66 81 7D D4 58 4D 75 1D
+
+. 0 804EB5D 8
+. 66 81 7D D6 A8 B2 75 15
+
+. 0 804EB65 13
+. 83 EC 0C 68 28 23 05 08 E8 9E 98 FF FF
+
+psubsw_1 ... ok
+. 0 804EB72 8
+. 83 C4 10 E9 8A 00 00 00
+
+. 0 804EC04 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B08 5
+. E8 FF E0 FF FF
+
+. 0 804EC0C 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 6F 82 66 C7 45 E2 91 7D 66 C7 45 E4 39 30 66 C7 45 E6 C7 CF C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 39 30 66 C7 45 DA C7 CF 66 C7 45 DC 91 7D 66 C7 45 DE 6F 82 83 EC 08 6A 01 68 E0 39 05 08 E8 7D 97 FF FF
+
+. 0 804EC73 11
+. 83 C4 10 85 C0 0F 85 C8 00 00 00
+
+. 0 804EC7E 33
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F E9 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 FF 7F 75 2D
+
+. 0 804EC9F 8
+. 66 81 7D D2 00 80 75 25
+
+. 0 804ECA7 8
+. 66 81 7D D4 58 4D 75 1D
+
+. 0 804ECAF 8
+. 66 81 7D D6 A8 B2 75 15
+
+. 0 804ECB7 13
+. 83 EC 0C 68 63 23 05 08 E8 4C 97 FF FF
+
+psubsw_2 ... ok
+. 0 804ECC4 8
+. 83 C4 10 E9 8A 00 00 00
+
+. 0 804ED56 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B0D 5
+. E8 4C E2 FF FF
+
+. 0 804ED5E 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 0B C6 45 E1 16 C6 45 E2 21 C6 45 E3 2C C6 45 E4 37 C6 45 E5 42 C6 45 E6 4D C6 45 E7 58 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 58 C6 45 D9 4D C6 45 DA 42 C6 45 DB 37 C6 45 DC 2C C6 45 DD 21 C6 45 DE 16 C6 45 DF 0B 83 EC 08 6A 01 68 E0 39 05 08 E8 1B 96 FF FF
+
+. 0 804EDD5 11
+. 83 C4 10 85 C0 0F 85 4B 01 00 00
+
+. 0 804EDE0 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F D8 C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 4D 75 3F
+
+. 0 804EE02 6
+. 80 7D D1 37 75 39
+
+. 0 804EE08 6
+. 80 7D D2 21 75 33
+
+. 0 804EE0E 6
+. 80 7D D3 0B 75 2D
+
+. 0 804EE14 6
+. 80 7D D4 00 75 27
+
+. 0 804EE1A 6
+. 80 7D D5 00 75 21
+
+. 0 804EE20 6
+. 80 7D D6 00 75 1B
+
+. 0 804EE26 6
+. 80 7D D7 00 75 15
+
+. 0 804EE2C 13
+. 83 EC 0C 68 9E 23 05 08 E8 D7 95 FF FF
+
+psubusb_1 ... ok
+. 0 804EE39 8
+. 83 C4 10 E9 FA 00 00 00
+
+. 0 804EF3B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B12 5
+. E8 2C E4 FF FF
+
+. 0 804EF43 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 0B C6 45 E1 16 C6 45 E2 21 C6 45 E3 2C C6 45 E4 37 C6 45 E5 42 C6 45 E6 4D C6 45 E7 58 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 58 C6 45 D9 4D C6 45 DA 42 C6 45 DB 37 C6 45 DC 2C C6 45 DD 21 C6 45 DE 16 C6 45 DF 0B 83 EC 08 6A 01 68 E0 39 05 08 E8 36 94 FF FF
+
+. 0 804EFBA 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 804EFC5 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F D8 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 4D 75 3F
+
+. 0 804EFE4 6
+. 80 7D D1 37 75 39
+
+. 0 804EFEA 6
+. 80 7D D2 21 75 33
+
+. 0 804EFF0 6
+. 80 7D D3 0B 75 2D
+
+. 0 804EFF6 6
+. 80 7D D4 00 75 27
+
+. 0 804EFFC 6
+. 80 7D D5 00 75 21
+
+. 0 804F002 6
+. 80 7D D6 00 75 1B
+
+. 0 804F008 6
+. 80 7D D7 00 75 15
+
+. 0 804F00E 13
+. 83 EC 0C 68 DC 23 05 08 E8 F5 93 FF FF
+
+psubusb_2 ... ok
+. 0 804F01B 8
+. 83 C4 10 E9 FA 00 00 00
+
+. 0 804F11D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B17 5
+. E8 09 E6 FF FF
+
+. 0 804F125 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 62 04 66 C7 45 E2 10 0D 66 C7 45 E4 BE 15 66 C7 45 E6 6C 1E C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 AD 22 66 C7 45 DA FF 19 66 C7 45 DC 51 11 66 C7 45 DE A3 08 83 EC 08 6A 01 68 E0 39 05 08 E8 64 92 FF FF
+
+. 0 804F18C 11
+. 83 C4 10 85 C0 0F 85 D5 00 00 00
+
+. 0 804F197 36
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F D9 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 4B 1E 75 2B
+
+. 0 804F1BB 8
+. 66 81 7D D2 EF 0C 75 23
+
+. 0 804F1C3 7
+. 66 83 7D D4 00 75 1C
+
+. 0 804F1CA 7
+. 66 83 7D D6 00 75 15
+
+. 0 804F1D1 13
+. 83 EC 0C 68 1A 24 05 08 E8 32 92 FF FF
+
+psubusw_1 ... ok
+. 0 804F1DE 8
+. 83 C4 10 E9 96 00 00 00
+
+. 0 804F27C 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B1C 5
+. E8 63 E7 FF FF
+
+. 0 804F284 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 62 04 66 C7 45 E2 10 0D 66 C7 45 E4 BE 15 66 C7 45 E6 6C 1E C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 AD 22 66 C7 45 DA FF 19 66 C7 45 DC 51 11 66 C7 45 DE A3 08 83 EC 08 6A 01 68 E0 39 05 08 E8 05 91 FF FF
+
+. 0 804F2EB 11
+. 83 C4 10 85 C0 0F 85 D2 00 00 00
+
+. 0 804F2F6 33
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F D9 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 4B 1E 75 2B
+
+. 0 804F317 8
+. 66 81 7D D2 EF 0C 75 23
+
+. 0 804F31F 7
+. 66 83 7D D4 00 75 1C
+
+. 0 804F326 7
+. 66 83 7D D6 00 75 15
+
+. 0 804F32D 13
+. 83 EC 0C 68 58 24 05 08 E8 D6 90 FF FF
+
+psubusw_2 ... ok
+. 0 804F33A 8
+. 83 C4 10 E9 96 00 00 00
+
+. 0 804F3D8 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B21 5
+. E8 BA E8 FF FF
+
+. 0 804F3E0 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 57 00 66 C7 45 E2 41 00 66 C7 45 E4 2B 00 66 C7 45 E6 15 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 D2 04 66 C7 45 DA 2E 16 66 C7 45 DC E1 10 66 C7 45 DE 3D 22 83 EC 08 6A 01 68 E0 39 05 08 E8 A9 8F FF FF
+
+. 0 804F447 11
+. 83 C4 10 85 C0 0F 85 CB 00 00 00
+
+. 0 804F452 36
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F F9 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 7B 04 75 2D
+
+. 0 804F476 8
+. 66 81 7D D2 ED 15 75 25
+
+. 0 804F47E 8
+. 66 81 7D D4 B6 10 75 1D
+
+. 0 804F486 8
+. 66 81 7D D6 28 22 75 15
+
+. 0 804F48E 13
+. 83 EC 0C 68 96 24 05 08 E8 75 8F FF FF
+
+psubw_1 ... ok
+. 0 804F49B 8
+. 83 C4 10 E9 8A 00 00 00
+
+. 0 804F52D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B26 5
+. E8 0A EA FF FF
+
+. 0 804F535 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 57 00 66 C7 45 E2 41 00 66 C7 45 E4 2B 00 66 C7 45 E6 15 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 D2 04 66 C7 45 DA 2E 16 66 C7 45 DC E1 10 66 C7 45 DE 3D 22 83 EC 08 6A 01 68 E0 39 05 08 E8 54 8E FF FF
+
+. 0 804F59C 11
+. 83 C4 10 85 C0 0F 85 C8 00 00 00
+
+. 0 804F5A7 33
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F F9 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 7B 04 75 2D
+
+. 0 804F5C8 8
+. 66 81 7D D2 ED 15 75 25
+
+. 0 804F5D0 8
+. 66 81 7D D4 B6 10 75 1D
+
+. 0 804F5D8 8
+. 66 81 7D D6 28 22 75 15
+
+. 0 804F5E0 13
+. 83 EC 0C 68 CE 24 05 08 E8 23 8E FF FF
+
+psubw_2 ... ok
+. 0 804F5ED 8
+. 83 C4 10 E9 8A 00 00 00
+
+. 0 804F67F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B2B 5
+. E8 57 EB FF FF
+
+. 0 804F687 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 0C C6 45 E1 22 C6 45 E2 38 C6 45 E3 4E C6 45 E4 15 C6 45 E5 2B C6 45 E6 41 C6 45 E7 57 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 0B C6 45 D9 16 C6 45 DA 21 C6 45 DB 2C C6 45 DC 37 C6 45 DD 42 C6 45 DE 4D C6 45 DF 58 83 EC 08 6A 01 68 E0 39 05 08 E8 F2 8C FF FF
+
+. 0 804F6FE 11
+. 83 C4 10 85 C0 0F 85 4B 01 00 00
+
+. 0 804F709 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F 68 C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 37 75 3F
+
+. 0 804F72B 6
+. 80 7D D1 15 75 39
+
+. 0 804F731 6
+. 80 7D D2 42 75 33
+
+. 0 804F737 6
+. 80 7D D3 2B 75 2D
+
+. 0 804F73D 6
+. 80 7D D4 4D 75 27
+
+. 0 804F743 6
+. 80 7D D5 41 75 21
+
+. 0 804F749 6
+. 80 7D D6 58 75 1B
+
+. 0 804F74F 6
+. 80 7D D7 57 75 15
+
+. 0 804F755 13
+. 83 EC 0C 68 06 25 05 08 E8 AE 8C FF FF
+
+punpckhbw_1 ... ok
+. 0 804F762 8
+. 83 C4 10 E9 FA 00 00 00
+
+. 0 804F864 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B30 5
+. E8 37 ED FF FF
+
+. 0 804F86C 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 0C C6 45 E1 22 C6 45 E2 38 C6 45 E3 4E C6 45 E4 15 C6 45 E5 2B C6 45 E6 41 C6 45 E7 57 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 0B C6 45 D9 16 C6 45 DA 21 C6 45 DB 2C C6 45 DC 37 C6 45 DD 42 C6 45 DE 4D C6 45 DF 58 83 EC 08 6A 01 68 E0 39 05 08 E8 0D 8B FF FF
+
+. 0 804F8E3 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 804F8EE 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 68 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 37 75 3F
+
+. 0 804F90D 6
+. 80 7D D1 15 75 39
+
+. 0 804F913 6
+. 80 7D D2 42 75 33
+
+. 0 804F919 6
+. 80 7D D3 2B 75 2D
+
+. 0 804F91F 6
+. 80 7D D4 4D 75 27
+
+. 0 804F925 6
+. 80 7D D5 41 75 21
+
+. 0 804F92B 6
+. 80 7D D6 58 75 1B
+
+. 0 804F931 6
+. 80 7D D7 57 75 15
+
+. 0 804F937 13
+. 83 EC 0C 68 4A 25 05 08 E8 CC 8A FF FF
+
+punpckhbw_2 ... ok
+. 0 804F944 8
+. 83 C4 10 E9 FA 00 00 00
+
+. 0 804FA46 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B35 5
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+
+. 0 804FA4E 83
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+
+. 0 804FAA1 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804FAAC 37
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F 6A C8 0F 7F 4D D0 DD A5 58 FF FF FF 81 7D D0 4C 6C 51 03 75 1B
+
+. 0 804FAD1 9
+. 81 7D D4 AB 18 47 01 75 12
+
+. 0 804FADA 13
+. 83 EC 0C 68 8E 25 05 08 E8 29 89 FF FF
+
+punpckhdq_1 ... ok
+. 0 804FAE7 5
+. 83 C4 10 EB 52
+
+. 0 804FB3E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B3A 5
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+
+. 0 804FB46 83
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+
+. 0 804FB99 7
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+
+. 0 804FBA0 34
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+
+. 0 804FBC2 9
+. 81 7D D4 AB 18 47 01 75 12
+
+. 0 804FBCB 13
+. 83 EC 0C 68 D2 25 05 08 E8 38 88 FF FF
+
+punpckhdq_2 ... ok
+. 0 804FBD8 5
+. 83 C4 10 EB 52
+
+. 0 804FC2F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B3F 5
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+
+. 0 804FC37 103
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+
+. 0 804FC9E 11
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+. 0 804FCA9 36
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+
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+
+. 0 804FCE5 13
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+
+punpckhwd_1 ... ok
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+. 83 C4 10 E9 9C 00 00 00
+
+. 0 804FD96 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B44 5
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+
+. 0 804FD9E 103
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+
+. 0 804FE05 11
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+
+. 0 804FE10 33
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+
+. 0 804FE31 8
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+. 0 804FE39 8
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+. 0 804FE41 8
+. 66 81 7D D6 BB 19 75 15
+
+. 0 804FE49 13
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+
+punpckhwd_2 ... ok
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+. 83 C4 10 E9 9C 00 00 00
+
+. 0 804FEFA 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B49 5
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+
+. 0 804FF02 119
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+
+. 0 804FF79 11
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+. 0 804FF84 34
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+
+. 0 804FFA6 6
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+. 0 804FFAC 6
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+. 0 804FFB2 6
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+
+. 0 804FFB8 6
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+
+. 0 804FFBE 6
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+. 0 804FFC4 6
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+
+. 0 804FFCA 6
+. 80 7D D7 4E 75 15
+
+. 0 804FFD0 13
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+
+punpcklbw_1 ... ok
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+. 83 C4 10 E9 FA 00 00 00
+
+. 0 80500DF 8
+. 8D 65 F4 5B 5E 5F 5D C3
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+. 0 8050B4E 5
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+
+. 0 805015E 11
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+
+. 0 8050169 31
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+
+. 0 8050188 6
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+
+. 0 80501B2 13
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+
+punpcklbw_2 ... ok
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+. 83 C4 10 E9 FA 00 00 00
+
+. 0 80502C1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B53 5
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+. 0 80502C9 83
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+
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+
+. 0 805034C 9
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+
+. 0 8050355 13
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+
+punpckldq_1 ... ok
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+. 83 C4 10 EB 52
+
+. 0 80503B9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B58 5
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+. 0 80503C1 83
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+
+. 0 8050414 7
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+
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+
+. 0 8050446 13
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+
+punpckldq_2 ... ok
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+
+. 0 80504AA 8
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+. 0 8050B5D 5
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+
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+
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+
+. 0 8050560 13
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+
+punpcklwd_1 ... ok
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+
+. 0 8050611 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B62 5
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+. 0 8050619 103
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+
+. 0 8050680 11
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+
+. 0 805068B 33
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+
+. 0 80506C4 13
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+
+punpcklwd_2 ... ok
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+. 83 C4 10 E9 9C 00 00 00
+
+. 0 8050775 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8050B67 5
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+. 0 805077D 83
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+
+. 0 80507D0 7
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+
+. 0 805080A 13
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+
+pxor_1 ... ok
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+
+. 0 805085E 8
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+
+. 0 8050B6C 5
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+
+. 0 80508F0 13
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+
+pxor_2 ... ok
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+
+. 0 8050944 8
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+
+. 0 8050B71 10
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+==2988==
+sewardj@phoenix:~/VgSVN/valgrind/trunk$ ./vsvn --tool=none --vex-guest-chase-thresh=0 ./none/testss/x86/insn_mmx[K[K[Ksse
+==2993== Nulgrind, a binary JIT-compiler.
+==2993== Copyright (C) 2002-2004, and GNU GPL'd, by Nicholas Nethercote.
+==2993== Using valgrind-2.3.0.CVS, a dynamic binary instrumentation framework.
+==2993== Copyright (C) 2000-2004, and GNU GPL'd, by Julian Seward et al.
+==2993== For more details, rerun with: -v
+==2993==
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+addps_1 ... ok
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+
+addps_2 ... ok
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+. 0 80489FC 8
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+addss_1 ... ok
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+
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+
+addss_2 ... ok
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+
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+
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+
+andnps_1 ... ok
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+. 0 80557EB 5
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+
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+
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+
+andnps_2 ... ok
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+
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+
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+
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+
+andps_1 ... ok
+. 0 804916B 5
+. 83 C4 10 EB 62
+
+. 0 80491D2 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80557F5 5
+. E8 E0 39 FF FF
+
+. 0 80491DA 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80491F8 2
+. F3 AB
+
+. 0 80491FA 48
+. C7 45 D8 20 64 A8 EC C7 45 DC 31 75 B9 FD C7 45 E0 EF CD AB 89 C7 45 E4 67 45 23 01 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049228 2
+. F3 AB
+
+. 0 804922A 43
+. C7 45 C8 EF CD AB 89 C7 45 CC 67 45 23 01 C7 45 D0 20 64 A8 EC C7 45 D4 31 75 B9 FD 83 EC 08 6A 01 68 C0 92 05 08 E8 9B F1 FF FF
+
+. 0 8049255 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 8049260 56
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F 54 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 8B 45 BC 35 21 45 21 01 8B 55 B8 81 F2 20 44 A8 88 09 D0 85 C0 75 29
+
+. 0 8049298 23
+. 8B 45 C4 35 21 45 21 01 8B 55 C0 81 F2 20 44 A8 88 09 D0 85 C0 75 12
+
+. 0 80492AF 13
+. 83 EC 0C 68 64 5E 05 08 E8 54 F1 FF FF
+
+andps_2 ... ok
+. 0 80492BC 5
+. 83 C4 10 EB 62
+
+. 0 8049323 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80557FA 5
+. E8 2C 3B FF FF
+
+. 0 804932B 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049349 2
+. F3 AB
+
+. 0 804934B 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804937D 2
+. F3 AB
+
+. 0 804937F 47
+. B8 5B 91 6A 43 89 45 C8 B8 62 91 6A 43 89 45 CC B8 5B 91 6A 43 89 45 D0 B8 62 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 42 F0 FF FF
+
+. 0 80493AE 11
+. 83 C4 10 85 C0 0F 85 B9 00 00 00
+
+. 0 80493B9 47
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F C2 C8 00 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 80493E8 6
+. 83 7D BC 00 75 1E
+
+. 0 80493EE 6
+. 83 7D C0 FF 75 18
+
+. 0 80493F4 6
+. 83 7D C4 00 75 12
+
+. 0 80493FA 13
+. 83 EC 0C 68 9C 5E 05 08 E8 09 F0 FF FF
+
+cmpeqps_1 ... ok
+. 0 8049407 5
+. 83 C4 10 EB 76
+
+. 0 8049482 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80557FF 5
+. E8 86 3C FF FF
+
+. 0 804948A 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80494A8 2
+. F3 AB
+
+. 0 80494AA 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80494DC 2
+. F3 AB
+
+. 0 80494DE 47
+. B8 5B 91 6A 43 89 45 C8 B8 62 91 6A 43 89 45 CC B8 5B 91 6A 43 89 45 D0 B8 62 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 E3 EE FF FF
+
+. 0 804950D 11
+. 83 C4 10 85 C0 0F 85 B2 00 00 00
+
+. 0 8049518 40
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F C2 4D D8 00 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 8049540 6
+. 83 7D BC 00 75 1E
+
+. 0 8049546 6
+. 83 7D C0 FF 75 18
+
+. 0 804954C 6
+. 83 7D C4 00 75 12
+
+. 0 8049552 13
+. 83 EC 0C 68 78 5F 05 08 E8 B1 EE FF FF
+
+cmpeqps_2 ... ok
+. 0 804955F 5
+. 83 C4 10 EB 76
+
+. 0 80495DA 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055804 5
+. E8 D9 3D FF FF
+
+. 0 80495E2 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049600 2
+. F3 AB
+
+. 0 8049602 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804961C 2
+. F3 AB
+
+. 0 804961E 23
+. B8 2B 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 BB ED FF FF
+
+. 0 8049635 11
+. 83 C4 10 85 C0 0F 85 BA 00 00 00
+
+. 0 8049640 48
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F C2 C8 00 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 8049670 6
+. 83 7D BC 00 75 1E
+
+. 0 8049676 6
+. 83 7D C0 00 75 18
+
+. 0 804967C 6
+. 83 7D C4 00 75 12
+
+. 0 8049682 13
+. 83 EC 0C 68 B6 5F 05 08 E8 81 ED FF FF
+
+cmpeqss_1 ... ok
+. 0 804968F 5
+. 83 C4 10 EB 76
+
+. 0 804970A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055809 5
+. E8 04 3F FF FF
+
+. 0 8049712 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049730 2
+. F3 AB
+
+. 0 8049732 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804974C 2
+. F3 AB
+
+. 0 804974E 23
+. B8 2C 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 8B EC FF FF
+
+. 0 8049765 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 8049770 41
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F C2 4D D8 00 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 00 75 24
+
+. 0 8049799 6
+. 83 7D BC 00 75 1E
+
+. 0 804979F 6
+. 83 7D C0 00 75 18
+
+. 0 80497A5 6
+. 83 7D C4 00 75 12
+
+. 0 80497AB 13
+. 83 EC 0C 68 F4 5F 05 08 E8 58 EC FF FF
+
+cmpeqss_2 ... ok
+. 0 80497B8 5
+. 83 C4 10 EB 76
+
+. 0 8049833 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805580E 5
+. E8 28 40 FF FF
+
+. 0 804983B 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049859 2
+. F3 AB
+
+. 0 804985B 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804988D 2
+. F3 AB
+
+. 0 804988F 47
+. B8 5B 91 6A 43 89 45 C8 B8 62 91 6A 43 89 45 CC B8 5B 91 6A 43 89 45 D0 B8 62 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 32 EB FF FF
+
+. 0 80498BE 11
+. 83 C4 10 85 C0 0F 85 B9 00 00 00
+
+. 0 80498C9 47
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F C2 C8 02 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 80498F8 6
+. 83 7D BC 00 75 1E
+
+. 0 80498FE 6
+. 83 7D C0 FF 75 18
+
+. 0 8049904 6
+. 83 7D C4 00 75 12
+
+. 0 804990A 13
+. 83 EC 0C 68 32 60 05 08 E8 F9 EA FF FF
+
+cmpleps_1 ... ok
+. 0 8049917 5
+. 83 C4 10 EB 76
+
+. 0 8049992 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055813 5
+. E8 82 41 FF FF
+
+. 0 804999A 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80499B8 2
+. F3 AB
+
+. 0 80499BA 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80499EC 2
+. F3 AB
+
+. 0 80499EE 47
+. B8 5B 91 6A 43 89 45 C8 B8 62 91 6A 43 89 45 CC B8 5B 91 6A 43 89 45 D0 B8 62 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 D3 E9 FF FF
+
+. 0 8049A1D 11
+. 83 C4 10 85 C0 0F 85 B2 00 00 00
+
+. 0 8049A28 40
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F C2 4D D8 02 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 8049A50 6
+. 83 7D BC 00 75 1E
+
+. 0 8049A56 6
+. 83 7D C0 FF 75 18
+
+. 0 8049A5C 6
+. 83 7D C4 00 75 12
+
+. 0 8049A62 13
+. 83 EC 0C 68 70 60 05 08 E8 A1 E9 FF FF
+
+cmpleps_2 ... ok
+. 0 8049A6F 5
+. 83 C4 10 EB 76
+
+. 0 8049AEA 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055818 5
+. E8 D5 42 FF FF
+
+. 0 8049AF2 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049B10 2
+. F3 AB
+
+. 0 8049B12 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049B2C 2
+. F3 AB
+
+. 0 8049B2E 23
+. B8 2B 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 AB E8 FF FF
+
+. 0 8049B45 11
+. 83 C4 10 85 C0 0F 85 BA 00 00 00
+
+. 0 8049B50 48
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F C2 C8 02 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 8049B80 6
+. 83 7D BC 00 75 1E
+
+. 0 8049B86 6
+. 83 7D C0 00 75 18
+
+. 0 8049B8C 6
+. 83 7D C4 00 75 12
+
+. 0 8049B92 13
+. 83 EC 0C 68 AE 60 05 08 E8 71 E8 FF FF
+
+cmpless_1 ... ok
+. 0 8049B9F 5
+. 83 C4 10 EB 76
+
+. 0 8049C1A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805581D 5
+. E8 00 44 FF FF
+
+. 0 8049C22 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049C40 2
+. F3 AB
+
+. 0 8049C42 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049C5C 2
+. F3 AB
+
+. 0 8049C5E 23
+. B8 2C 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 7B E7 FF FF
+
+. 0 8049C75 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 8049C80 41
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F C2 4D D8 02 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 00 75 24
+
+. 0 8049CA9 6
+. 83 7D BC 00 75 1E
+
+. 0 8049CAF 6
+. 83 7D C0 00 75 18
+
+. 0 8049CB5 6
+. 83 7D C4 00 75 12
+
+. 0 8049CBB 13
+. 83 EC 0C 68 EC 60 05 08 E8 48 E7 FF FF
+
+cmpless_2 ... ok
+. 0 8049CC8 5
+. 83 C4 10 EB 76
+
+. 0 8049D43 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055822 5
+. E8 24 45 FF FF
+
+. 0 8049D4B 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049D69 2
+. F3 AB
+
+. 0 8049D6B 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049D9D 2
+. F3 AB
+
+. 0 8049D9F 47
+. B8 55 91 6A 43 89 45 C8 B8 62 91 6A 43 89 45 CC B8 55 91 6A 43 89 45 D0 B8 62 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 22 E6 FF FF
+
+. 0 8049DCE 11
+. 83 C4 10 85 C0 0F 85 B9 00 00 00
+
+. 0 8049DD9 47
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F C2 C8 01 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 8049E08 6
+. 83 7D BC 00 75 1E
+
+. 0 8049E0E 6
+. 83 7D C0 FF 75 18
+
+. 0 8049E14 6
+. 83 7D C4 00 75 12
+
+. 0 8049E1A 13
+. 83 EC 0C 68 2A 61 05 08 E8 E9 E5 FF FF
+
+cmpltps_1 ... ok
+. 0 8049E27 5
+. 83 C4 10 EB 76
+
+. 0 8049EA2 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055827 5
+. E8 7E 46 FF FF
+
+. 0 8049EAA 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049EC8 2
+. F3 AB
+
+. 0 8049ECA 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8049EFC 2
+. F3 AB
+
+. 0 8049EFE 47
+. B8 55 91 6A 43 89 45 C8 B8 62 91 6A 43 89 45 CC B8 55 91 6A 43 89 45 D0 B8 62 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 C3 E4 FF FF
+
+. 0 8049F2D 11
+. 83 C4 10 85 C0 0F 85 B2 00 00 00
+
+. 0 8049F38 40
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F C2 4D D8 01 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 8049F60 6
+. 83 7D BC 00 75 1E
+
+. 0 8049F66 6
+. 83 7D C0 FF 75 18
+
+. 0 8049F6C 6
+. 83 7D C4 00 75 12
+
+. 0 8049F72 13
+. 83 EC 0C 68 68 61 05 08 E8 91 E4 FF FF
+
+cmpltps_2 ... ok
+. 0 8049F7F 5
+. 83 C4 10 EB 76
+
+. 0 8049FFA 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805582C 5
+. E8 D1 47 FF FF
+
+. 0 804A002 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A020 2
+. F3 AB
+
+. 0 804A022 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A03C 2
+. F3 AB
+
+. 0 804A03E 23
+. B8 2A 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 9B E3 FF FF
+
+. 0 804A055 11
+. 83 C4 10 85 C0 0F 85 BA 00 00 00
+
+. 0 804A060 48
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F C2 C8 01 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 804A090 6
+. 83 7D BC 00 75 1E
+
+. 0 804A096 6
+. 83 7D C0 00 75 18
+
+. 0 804A09C 6
+. 83 7D C4 00 75 12
+
+. 0 804A0A2 13
+. 83 EC 0C 68 A6 61 05 08 E8 61 E3 FF FF
+
+cmpltss_1 ... ok
+. 0 804A0AF 5
+. 83 C4 10 EB 76
+
+. 0 804A12A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055831 5
+. E8 FC 48 FF FF
+
+. 0 804A132 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A150 2
+. F3 AB
+
+. 0 804A152 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A16C 2
+. F3 AB
+
+. 0 804A16E 23
+. B8 2C 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 6B E2 FF FF
+
+. 0 804A185 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 804A190 41
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F C2 4D D8 01 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 00 75 24
+
+. 0 804A1B9 6
+. 83 7D BC 00 75 1E
+
+. 0 804A1BF 6
+. 83 7D C0 00 75 18
+
+. 0 804A1C5 6
+. 83 7D C4 00 75 12
+
+. 0 804A1CB 13
+. 83 EC 0C 68 E4 61 05 08 E8 38 E2 FF FF
+
+cmpltss_2 ... ok
+. 0 804A1D8 5
+. 83 C4 10 EB 76
+
+. 0 804A253 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055836 5
+. E8 20 4A FF FF
+
+. 0 804A25B 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A279 2
+. F3 AB
+
+. 0 804A27B 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A2AD 2
+. F3 AB
+
+. 0 804A2AF 47
+. B8 62 91 6A 43 89 45 C8 B8 5B 91 6A 43 89 45 CC B8 62 91 6A 43 89 45 D0 B8 5B 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 12 E1 FF FF
+
+. 0 804A2DE 11
+. 83 C4 10 85 C0 0F 85 B9 00 00 00
+
+. 0 804A2E9 47
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F C2 C8 04 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 804A318 6
+. 83 7D BC 00 75 1E
+
+. 0 804A31E 6
+. 83 7D C0 FF 75 18
+
+. 0 804A324 6
+. 83 7D C4 00 75 12
+
+. 0 804A32A 13
+. 83 EC 0C 68 22 62 05 08 E8 D9 E0 FF FF
+
+cmpneqps_1 ... ok
+. 0 804A337 5
+. 83 C4 10 EB 76
+
+. 0 804A3B2 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805583B 5
+. E8 7A 4B FF FF
+
+. 0 804A3BA 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A3D8 2
+. F3 AB
+
+. 0 804A3DA 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A40C 2
+. F3 AB
+
+. 0 804A40E 47
+. B8 62 91 6A 43 89 45 C8 B8 5B 91 6A 43 89 45 CC B8 62 91 6A 43 89 45 D0 B8 5B 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 B3 DF FF FF
+
+. 0 804A43D 11
+. 83 C4 10 85 C0 0F 85 B2 00 00 00
+
+. 0 804A448 40
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F C2 4D D8 04 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 804A470 6
+. 83 7D BC 00 75 1E
+
+. 0 804A476 6
+. 83 7D C0 FF 75 18
+
+. 0 804A47C 6
+. 83 7D C4 00 75 12
+
+. 0 804A482 13
+. 83 EC 0C 68 63 62 05 08 E8 81 DF FF FF
+
+cmpneqps_2 ... ok
+. 0 804A48F 5
+. 83 C4 10 EB 76
+
+. 0 804A50A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055840 5
+. E8 CD 4C FF FF
+
+. 0 804A512 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A530 2
+. F3 AB
+
+. 0 804A532 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A54C 2
+. F3 AB
+
+. 0 804A54E 23
+. B8 2C 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 8B DE FF FF
+
+. 0 804A565 11
+. 83 C4 10 85 C0 0F 85 BA 00 00 00
+
+. 0 804A570 48
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F C2 C8 04 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 804A5A0 6
+. 83 7D BC 00 75 1E
+
+. 0 804A5A6 6
+. 83 7D C0 00 75 18
+
+. 0 804A5AC 6
+. 83 7D C4 00 75 12
+
+. 0 804A5B2 13
+. 83 EC 0C 68 A4 62 05 08 E8 51 DE FF FF
+
+cmpneqss_1 ... ok
+. 0 804A5BF 5
+. 83 C4 10 EB 76
+
+. 0 804A63A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055845 5
+. E8 F8 4D FF FF
+
+. 0 804A642 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A660 2
+. F3 AB
+
+. 0 804A662 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A67C 2
+. F3 AB
+
+. 0 804A67E 23
+. B8 2B 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 5B DD FF FF
+
+. 0 804A695 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 804A6A0 41
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F C2 4D D8 04 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 00 75 24
+
+. 0 804A6C9 6
+. 83 7D BC 00 75 1E
+
+. 0 804A6CF 6
+. 83 7D C0 00 75 18
+
+. 0 804A6D5 6
+. 83 7D C4 00 75 12
+
+. 0 804A6DB 13
+. 83 EC 0C 68 E5 62 05 08 E8 28 DD FF FF
+
+cmpneqss_2 ... ok
+. 0 804A6E8 5
+. 83 C4 10 EB 76
+
+. 0 804A763 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805584A 5
+. E8 1C 4F FF FF
+
+. 0 804A76B 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A789 2
+. F3 AB
+
+. 0 804A78B 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A7BD 2
+. F3 AB
+
+. 0 804A7BF 47
+. B8 62 91 6A 43 89 45 C8 B8 5B 91 6A 43 89 45 CC B8 62 91 6A 43 89 45 D0 B8 5B 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 02 DC FF FF
+
+. 0 804A7EE 11
+. 83 C4 10 85 C0 0F 85 B9 00 00 00
+
+. 0 804A7F9 47
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F C2 C8 06 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 804A828 6
+. 83 7D BC 00 75 1E
+
+. 0 804A82E 6
+. 83 7D C0 FF 75 18
+
+. 0 804A834 6
+. 83 7D C4 00 75 12
+
+. 0 804A83A 13
+. 83 EC 0C 68 26 63 05 08 E8 C9 DB FF FF
+
+cmpnleps_1 ... ok
+. 0 804A847 5
+. 83 C4 10 EB 76
+
+. 0 804A8C2 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805584F 5
+. E8 76 50 FF FF
+
+. 0 804A8CA 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A8E8 2
+. F3 AB
+
+. 0 804A8EA 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804A91C 2
+. F3 AB
+
+. 0 804A91E 47
+. B8 62 91 6A 43 89 45 C8 B8 5B 91 6A 43 89 45 CC B8 62 91 6A 43 89 45 D0 B8 5B 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 A3 DA FF FF
+
+. 0 804A94D 11
+. 83 C4 10 85 C0 0F 85 B2 00 00 00
+
+. 0 804A958 40
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F C2 4D D8 06 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 804A980 6
+. 83 7D BC 00 75 1E
+
+. 0 804A986 6
+. 83 7D C0 FF 75 18
+
+. 0 804A98C 6
+. 83 7D C4 00 75 12
+
+. 0 804A992 13
+. 83 EC 0C 68 67 63 05 08 E8 71 DA FF FF
+
+cmpnleps_2 ... ok
+. 0 804A99F 5
+. 83 C4 10 EB 76
+
+. 0 804AA1A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055854 5
+. E8 C9 51 FF FF
+
+. 0 804AA22 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804AA40 2
+. F3 AB
+
+. 0 804AA42 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804AA5C 2
+. F3 AB
+
+. 0 804AA5E 23
+. B8 2C 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 7B D9 FF FF
+
+. 0 804AA75 11
+. 83 C4 10 85 C0 0F 85 BA 00 00 00
+
+. 0 804AA80 48
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F C2 C8 06 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 804AAB0 6
+. 83 7D BC 00 75 1E
+
+. 0 804AAB6 6
+. 83 7D C0 00 75 18
+
+. 0 804AABC 6
+. 83 7D C4 00 75 12
+
+. 0 804AAC2 13
+. 83 EC 0C 68 A8 63 05 08 E8 41 D9 FF FF
+
+cmpnless_1 ... ok
+. 0 804AACF 5
+. 83 C4 10 EB 76
+
+. 0 804AB4A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055859 5
+. E8 F4 52 FF FF
+
+. 0 804AB52 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804AB70 2
+. F3 AB
+
+. 0 804AB72 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804AB8C 2
+. F3 AB
+
+. 0 804AB8E 23
+. B8 2B 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 4B D8 FF FF
+
+. 0 804ABA5 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 804ABB0 41
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F C2 4D D8 06 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 00 75 24
+
+. 0 804ABD9 6
+. 83 7D BC 00 75 1E
+
+. 0 804ABDF 6
+. 83 7D C0 00 75 18
+
+. 0 804ABE5 6
+. 83 7D C4 00 75 12
+
+. 0 804ABEB 13
+. 83 EC 0C 68 E9 63 05 08 E8 18 D8 FF FF
+
+cmpnless_2 ... ok
+. 0 804ABF8 5
+. 83 C4 10 EB 76
+
+. 0 804AC73 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805585E 5
+. E8 18 54 FF FF
+
+. 0 804AC7B 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804AC99 2
+. F3 AB
+
+. 0 804AC9B 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804ACCD 2
+. F3 AB
+
+. 0 804ACCF 47
+. B8 62 91 6A 43 89 45 C8 B8 55 91 6A 43 89 45 CC B8 62 91 6A 43 89 45 D0 B8 55 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 F2 D6 FF FF
+
+. 0 804ACFE 11
+. 83 C4 10 85 C0 0F 85 B9 00 00 00
+
+. 0 804AD09 47
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F C2 C8 05 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 804AD38 6
+. 83 7D BC 00 75 1E
+
+. 0 804AD3E 6
+. 83 7D C0 FF 75 18
+
+. 0 804AD44 6
+. 83 7D C4 00 75 12
+
+. 0 804AD4A 13
+. 83 EC 0C 68 2A 64 05 08 E8 B9 D6 FF FF
+
+cmpnltps_1 ... ok
+. 0 804AD57 5
+. 83 C4 10 EB 76
+
+. 0 804ADD2 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055863 5
+. E8 72 55 FF FF
+
+. 0 804ADDA 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804ADF8 2
+. F3 AB
+
+. 0 804ADFA 52
+. B8 5B 91 6A 43 89 45 D8 B8 5B 91 6A 43 89 45 DC B8 5B 91 6A 43 89 45 E0 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804AE2C 2
+. F3 AB
+
+. 0 804AE2E 47
+. B8 62 91 6A 43 89 45 C8 B8 55 91 6A 43 89 45 CC B8 62 91 6A 43 89 45 D0 B8 55 91 6A 43 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 93 D5 FF FF
+
+. 0 804AE5D 11
+. 83 C4 10 85 C0 0F 85 B2 00 00 00
+
+. 0 804AE68 40
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F C2 4D D8 05 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 804AE90 6
+. 83 7D BC 00 75 1E
+
+. 0 804AE96 6
+. 83 7D C0 FF 75 18
+
+. 0 804AE9C 6
+. 83 7D C4 00 75 12
+
+. 0 804AEA2 13
+. 83 EC 0C 68 6B 64 05 08 E8 61 D5 FF FF
+
+cmpnltps_2 ... ok
+. 0 804AEAF 5
+. 83 C4 10 EB 76
+
+. 0 804AF2A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055868 5
+. E8 C5 56 FF FF
+
+. 0 804AF32 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804AF50 2
+. F3 AB
+
+. 0 804AF52 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804AF6C 2
+. F3 AB
+
+. 0 804AF6E 23
+. B8 2C 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 6B D4 FF FF
+
+. 0 804AF85 11
+. 83 C4 10 85 C0 0F 85 BA 00 00 00
+
+. 0 804AF90 48
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F C2 C8 05 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 FF 75 24
+
+. 0 804AFC0 6
+. 83 7D BC 00 75 1E
+
+. 0 804AFC6 6
+. 83 7D C0 00 75 18
+
+. 0 804AFCC 6
+. 83 7D C4 00 75 12
+
+. 0 804AFD2 13
+. 83 EC 0C 68 AC 64 05 08 E8 31 D4 FF FF
+
+cmpnltss_1 ... ok
+. 0 804AFDF 5
+. 83 C4 10 EB 76
+
+. 0 804B05A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805586D 5
+. E8 F0 57 FF FF
+
+. 0 804B062 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B080 2
+. F3 AB
+
+. 0 804B082 28
+. B8 2B 52 9A 44 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B09C 2
+. F3 AB
+
+. 0 804B09E 23
+. B8 2A 52 9A 44 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 3B D3 FF FF
+
+. 0 804B0B5 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 804B0C0 41
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F C2 4D D8 05 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 7D B8 00 75 24
+
+. 0 804B0E9 6
+. 83 7D BC 00 75 1E
+
+. 0 804B0EF 6
+. 83 7D C0 00 75 18
+
+. 0 804B0F5 6
+. 83 7D C4 00 75 12
+
+. 0 804B0FB 13
+. 83 EC 0C 68 ED 64 05 08 E8 08 D3 FF FF
+
+cmpnltss_2 ... ok
+. 0 804B108 5
+. 83 C4 10 EB 76
+
+. 0 804B183 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055872 5
+. E8 14 59 FF FF
+
+. 0 804B18B 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B1A9 2
+. F3 AB
+
+. 0 804B1AB 28
+. B8 5B 91 6A 43 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B1C5 2
+. F3 AB
+
+. 0 804B1C7 23
+. B8 62 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 12 D2 FF FF
+
+. 0 804B1DE 11
+. 83 C4 10 85 C0 0F 85 81 00 00 00
+
+. 0 804B1E9 64
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 9C 81 24 24 2A F7 FF FF 81 0C 24 D5 08 00 00 9D 0F 2F C8 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 85 C0 75 12
+
+. 0 804B229 13
+. 83 EC 0C 68 2E 65 05 08 E8 DA D1 FF FF
+
+comiss_1 ... ok
+. 0 804B236 5
+. 83 C4 10 EB 3F
+
+. 0 804B27A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055877 5
+. E8 06 5A FF FF
+
+. 0 804B282 47
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E4 00 00 00 00 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B2AF 2
+. F3 AB
+
+. 0 804B2B1 23
+. B8 62 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 28 D1 FF FF
+
+. 0 804B2C8 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804B2CF 57
+. 9B DD B5 48 FF FF FF 0F 12 45 C8 0F 16 45 D0 9C 81 24 24 2A F7 FF FF 81 0C 24 D5 08 00 00 9D 0F 2F 45 E4 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 85 C0 75 12
+
+. 0 804B308 13
+. 83 EC 0C 68 94 65 05 08 E8 FB D0 FF FF
+
+comiss_2 ... ok
+. 0 804B315 5
+. 83 C4 10 EB 3F
+
+. 0 804B359 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805587C 5
+. E8 E0 5A FF FF
+
+. 0 804B361 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B37F 2
+. F3 AB
+
+. 0 804B381 28
+. B8 5B 91 6A 43 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B39B 2
+. F3 AB
+
+. 0 804B39D 23
+. B8 55 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 3C D0 FF FF
+
+. 0 804B3B4 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804B3BF 65
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 9C 81 24 24 2A F7 FF FF 81 0C 24 D4 08 00 00 9D 0F 2F C8 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 83 F8 01 75 12
+
+. 0 804B400 13
+. 83 EC 0C 68 CF 65 05 08 E8 03 D0 FF FF
+
+comiss_3 ... ok
+. 0 804B40D 5
+. 83 C4 10 EB 3F
+
+. 0 804B451 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055881 5
+. E8 D3 5B FF FF
+
+. 0 804B459 47
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E4 00 00 00 00 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B486 2
+. F3 AB
+
+. 0 804B488 23
+. B8 55 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 51 CF FF FF
+
+. 0 804B49F 7
+. 83 C4 10 85 C0 75 7B
+
+. 0 804B4A6 58
+. 9B DD B5 48 FF FF FF 0F 12 45 C8 0F 16 45 D0 9C 81 24 24 2A F7 FF FF 81 0C 24 D4 08 00 00 9D 0F 2F 45 E4 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 83 F8 01 75 12
+
+. 0 804B4E0 13
+. 83 EC 0C 68 0A 66 05 08 E8 23 CF FF FF
+
+comiss_4 ... ok
+. 0 804B4ED 5
+. 83 C4 10 EB 3F
+
+. 0 804B531 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055886 5
+. E8 AE 5C FF FF
+
+. 0 804B539 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B557 2
+. F3 AB
+
+. 0 804B559 28
+. B8 5B 91 6A 43 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B573 2
+. F3 AB
+
+. 0 804B575 23
+. B8 5B 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 64 CE FF FF
+
+. 0 804B58C 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 804B597 65
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 9C 81 24 24 2A F7 FF FF 81 0C 24 95 08 00 00 9D 0F 2F C8 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 83 F8 40 75 12
+
+. 0 804B5D8 13
+. 83 EC 0C 68 45 66 05 08 E8 2B CE FF FF
+
+comiss_5 ... ok
+. 0 804B5E5 5
+. 83 C4 10 EB 3F
+
+. 0 804B629 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805588B 5
+. E8 A1 5D FF FF
+
+. 0 804B631 47
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E4 00 00 00 00 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B65E 2
+. F3 AB
+
+. 0 804B660 23
+. B8 5B 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 79 CD FF FF
+
+. 0 804B677 7
+. 83 C4 10 85 C0 75 7B
+
+. 0 804B67E 58
+. 9B DD B5 48 FF FF FF 0F 12 45 C8 0F 16 45 D0 9C 81 24 24 2A F7 FF FF 81 0C 24 95 08 00 00 9D 0F 2F 45 E4 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 83 F8 40 75 12
+
+. 0 804B6B8 13
+. 83 EC 0C 68 80 66 05 08 E8 4B CD FF FF
+
+comiss_6 ... ok
+. 0 804B6C5 5
+. 83 C4 10 EB 3F
+
+. 0 804B709 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055890 5
+. E8 7C 5E FF FF
+
+. 0 804B711 60
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 D2 04 00 00 C7 45 E4 2E 16 00 00 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B74B 2
+. F3 AB
+
+. 0 804B74D 47
+. B8 CD CC 8C 3F 89 45 C8 B8 CD CC 0C 40 89 45 CC B8 33 33 53 40 89 45 D0 B8 CD CC 8C 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 74 CC FF FF
+
+. 0 804B77C 11
+. 83 C4 10 85 C0 0F 85 43 01 00 00
+
+. 0 804B787 53
+. 9B DD B5 48 FF FF FF 0F 6F 45 E0 0F 12 45 C8 0F 16 45 D0 0F 2A C0 0F 13 45 B8 0F 17 45 C0 DD A5 48 FF FF FF 83 EC 08 B8 00 40 9A 44 50 FF 75 B8 E8 45 CD FF FF
+
+. 0 804B7BC 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804B7C3 17
+. 83 EC 08 B8 00 70 B1 45 50 FF 75 BC E8 2D CD FF FF
+
+. 0 804B7D4 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804B7DB 17
+. 83 EC 08 B8 33 33 53 40 50 FF 75 C0 E8 15 CD FF FF
+
+. 0 804B7EC 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804B7F3 17
+. 83 EC 08 B8 CD CC 8C 40 50 FF 75 C4 E8 FD CC FF FF
+
+. 0 804B804 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804B80B 13
+. 83 EC 0C 68 BB 66 05 08 E8 F8 CB FF FF
+
+cvtpi2ps_1 ... ok
+. 0 804B818 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804B8DA 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055895 5
+. E8 48 60 FF FF
+
+. 0 804B8E2 60
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 D2 04 00 00 C7 45 E4 2E 16 00 00 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804B91C 2
+. F3 AB
+
+. 0 804B91E 47
+. B8 CD CC 8C 3F 89 45 C8 B8 CD CC 0C 40 89 45 CC B8 33 33 53 40 89 45 D0 B8 CD CC 8C 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 A3 CA FF FF
+
+. 0 804B94D 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 804B958 50
+. 9B DD B5 48 FF FF FF 0F 12 45 C8 0F 16 45 D0 0F 2A 45 E0 0F 13 45 B8 0F 17 45 C0 DD A5 48 FF FF FF 83 EC 08 B8 00 40 9A 44 50 FF 75 B8 E8 77 CB FF FF
+
+. 0 804B98A 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804B991 17
+. 83 EC 08 B8 00 70 B1 45 50 FF 75 BC E8 5F CB FF FF
+
+. 0 804B9A2 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804B9A9 17
+. 83 EC 08 B8 33 33 53 40 50 FF 75 C0 E8 47 CB FF FF
+
+. 0 804B9BA 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804B9C1 17
+. 83 EC 08 B8 CD CC 8C 40 50 FF 75 C4 E8 2F CB FF FF
+
+. 0 804B9D2 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804B9D9 13
+. 83 EC 0C 68 FC 66 05 08 E8 2A CA FF FF
+
+cvtpi2ps_2 ... ok
+. 0 804B9E6 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804BAA8 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805589A 5
+. E8 11 62 FF FF
+
+. 0 804BAB0 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804BACE 2
+. F3 AB
+
+. 0 804BAD0 75
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 7B 14 8E 3F 89 45 E0 B8 7B 14 0E 40 89 45 E4 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 C7 45 D0 01 00 00 00 C7 45 D4 02 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 D5 C8 FF FF
+
+. 0 804BB1B 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804BB22 38
+. 9B DD B5 58 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 6F 45 D0 0F 2D C0 0F 7F 45 C8 DD A5 58 FF FF FF 83 7D C8 0C 75 18
+
+. 0 804BB48 6
+. 83 7D CC 39 75 12
+
+. 0 804BB4E 13
+. 83 EC 0C 68 3D 67 05 08 E8 B5 C8 FF FF
+
+cvtps2pi_1 ... ok
+. 0 804BB5B 5
+. 83 C4 10 EB 4C
+
+. 0 804BBAC 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805589F 5
+. E8 10 63 FF FF
+
+. 0 804BBB4 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804BBD2 2
+. F3 AB
+
+. 0 804BBD4 75
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 7B 14 8E 3F 89 45 E0 B8 7B 14 0E 40 89 45 E4 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 C7 45 D0 01 00 00 00 C7 45 D4 02 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 D1 C7 FF FF
+
+. 0 804BC1F 7
+. 83 C4 10 85 C0 75 73
+
+. 0 804BC26 31
+. 9B DD B5 58 FF FF FF 0F 6F 45 D0 0F 2D 45 D8 0F 7F 45 C8 DD A5 58 FF FF FF 83 7D C8 0C 75 18
+
+. 0 804BC45 6
+. 83 7D CC 39 75 12
+
+. 0 804BC4B 13
+. 83 EC 0C 68 CD 67 05 08 E8 B8 C7 FF FF
+
+cvtps2pi_2 ... ok
+. 0 804BC58 5
+. 83 C4 10 EB 4C
+
+. 0 804BCA9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558A4 5
+. E8 08 64 FF FF
+
+. 0 804BCB1 46
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E4 00 00 00 00 C7 45 E4 0C 00 00 00 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804BCDD 2
+. F3 AB
+
+. 0 804BCDF 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 E2 C6 FF FF
+
+. 0 804BD0E 11
+. 83 C4 10 85 C0 0F 85 43 01 00 00
+
+. 0 804BD19 53
+. 9B DD B5 48 FF FF FF 8B 45 E4 0F 12 45 C8 0F 16 45 D0 F3 0F 2A C0 0F 13 45 B8 0F 17 45 C0 DD A5 48 FF FF FF 83 EC 08 B8 00 00 40 41 50 FF 75 B8 E8 B3 C7 FF FF
+
+. 0 804BD4E 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804BD55 17
+. 83 EC 08 B8 7B 14 0E 40 50 FF 75 BC E8 9B C7 FF FF
+
+. 0 804BD66 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804BD6D 17
+. 83 EC 08 B8 B8 1E 55 40 50 FF 75 C0 E8 83 C7 FF FF
+
+. 0 804BD7E 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804BD85 17
+. 83 EC 08 B8 7B 14 8E 40 50 FF 75 C4 E8 6B C7 FF FF
+
+. 0 804BD96 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804BD9D 13
+. 83 EC 0C 68 0E 68 05 08 E8 66 C6 FF FF
+
+cvtsi2ss_1 ... ok
+. 0 804BDAA 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804BE6C 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558A9 5
+. E8 C6 65 FF FF
+
+. 0 804BE74 46
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E4 00 00 00 00 C7 45 E4 0C 00 00 00 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804BEA0 2
+. F3 AB
+
+. 0 804BEA2 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 1F C5 FF FF
+
+. 0 804BED1 11
+. 83 C4 10 85 C0 0F 85 41 01 00 00
+
+. 0 804BEDC 51
+. 9B DD B5 48 FF FF FF 0F 12 45 C8 0F 16 45 D0 F3 0F 2A 45 E4 0F 13 45 B8 0F 17 45 C0 DD A5 48 FF FF FF 83 EC 08 B8 00 00 40 41 50 FF 75 B8 E8 F2 C5 FF FF
+
+. 0 804BF0F 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804BF16 17
+. 83 EC 08 B8 7B 14 0E 40 50 FF 75 BC E8 DA C5 FF FF
+
+. 0 804BF27 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804BF2E 17
+. 83 EC 08 B8 B8 1E 55 40 50 FF 75 C0 E8 C2 C5 FF FF
+
+. 0 804BF3F 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804BF46 17
+. 83 EC 08 B8 7B 14 8E 40 50 FF 75 C4 E8 AA C5 FF FF
+
+. 0 804BF57 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804BF5E 13
+. 83 EC 0C 68 4F 68 05 08 E8 A5 C4 FF FF
+
+cvtsi2ss_2 ... ok
+. 0 804BF6B 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804C02D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558AE 5
+. E8 82 67 FF FF
+
+. 0 804C035 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C053 2
+. F3 AB
+
+. 0 804C055 61
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 C7 45 D4 00 00 00 00 C7 45 D4 63 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 5E C3 FF FF
+
+. 0 804C092 7
+. 83 C4 10 85 C0 75 5E
+
+. 0 804C099 37
+. 9B DD B5 58 FF FF FF 0F 12 45 D8 0F 16 45 E0 8B 45 D4 F3 0F 2D C0 89 45 D0 DD A5 58 FF FF FF 83 7D D0 0C 75 12
+
+. 0 804C0BE 13
+. 83 EC 0C 68 90 68 05 08 E8 45 C3 FF FF
+
+cvtss2si_1 ... ok
+. 0 804C0CB 5
+. 83 C4 10 EB 37
+
+. 0 804C107 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558B3 5
+. E8 57 68 FF FF
+
+. 0 804C10F 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C12D 2
+. F3 AB
+
+. 0 804C12F 61
+. B8 B8 1E 63 42 89 45 D8 B8 A4 70 45 41 89 45 DC B8 CD 4C AF 42 89 45 E0 B8 0A D7 2C 42 89 45 E4 C7 45 D4 00 00 00 00 C7 45 D4 63 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 84 C2 FF FF
+
+. 0 804C16C 7
+. 83 C4 10 85 C0 75 57
+
+. 0 804C173 30
+. 9B DD B5 58 FF FF FF 8B 45 D4 F3 0F 2D 45 D8 89 45 D0 DD A5 58 FF FF FF 83 7D D0 39 75 12
+
+. 0 804C191 13
+. 83 EC 0C 68 D1 68 05 08 E8 72 C2 FF FF
+
+cvtss2si_2 ... ok
+. 0 804C19E 5
+. 83 C4 10 EB 37
+
+. 0 804C1DA 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558B8 5
+. E8 25 69 FF FF
+
+. 0 804C1E2 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C200 2
+. F3 AB
+
+. 0 804C202 75
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 7B 14 8E 3F 89 45 E0 B8 7B 14 0E 40 89 45 E4 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 C7 45 D0 01 00 00 00 C7 45 D4 02 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 A3 C1 FF FF
+
+. 0 804C24D 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 804C254 38
+. 9B DD B5 58 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 6F 45 D0 0F 2C C0 0F 7F 45 C8 DD A5 58 FF FF FF 83 7D C8 0C 75 18
+
+. 0 804C27A 6
+. 83 7D CC 38 75 12
+
+. 0 804C280 13
+. 83 EC 0C 68 12 69 05 08 E8 83 C1 FF FF
+
+cvttps2pi_1 ... ok
+. 0 804C28D 5
+. 83 C4 10 EB 4C
+
+. 0 804C2DE 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558BD 5
+. E8 24 6A FF FF
+
+. 0 804C2E6 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C304 2
+. F3 AB
+
+. 0 804C306 75
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 7B 14 8E 3F 89 45 E0 B8 7B 14 0E 40 89 45 E4 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 C7 45 D0 01 00 00 00 C7 45 D4 02 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 9F C0 FF FF
+
+. 0 804C351 7
+. 83 C4 10 85 C0 75 73
+
+. 0 804C358 31
+. 9B DD B5 58 FF FF FF 0F 6F 45 D0 0F 2C 45 D8 0F 7F 45 C8 DD A5 58 FF FF FF 83 7D C8 0C 75 18
+
+. 0 804C377 6
+. 83 7D CC 38 75 12
+
+. 0 804C37D 13
+. 83 EC 0C 68 56 69 05 08 E8 86 C0 FF FF
+
+cvttps2pi_2 ... ok
+. 0 804C38A 5
+. 83 C4 10 EB 4C
+
+. 0 804C3DB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558C2 5
+. E8 1C 6B FF FF
+
+. 0 804C3E3 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C401 2
+. F3 AB
+
+. 0 804C403 61
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 C7 45 D4 00 00 00 00 C7 45 D4 63 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 B0 BF FF FF
+
+. 0 804C440 7
+. 83 C4 10 85 C0 75 5E
+
+. 0 804C447 37
+. 9B DD B5 58 FF FF FF 0F 12 45 D8 0F 16 45 E0 8B 45 D4 F3 0F 2C C0 89 45 D0 DD A5 58 FF FF FF 83 7D D0 0C 75 12
+
+. 0 804C46C 13
+. 83 EC 0C 68 9A 69 05 08 E8 97 BF FF FF
+
+cvttss2si_1 ... ok
+. 0 804C479 5
+. 83 C4 10 EB 37
+
+. 0 804C4B5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558C7 5
+. E8 F1 6B FF FF
+
+. 0 804C4BD 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C4DB 2
+. F3 AB
+
+. 0 804C4DD 61
+. B8 B8 1E 63 42 89 45 D8 B8 A4 70 45 41 89 45 DC B8 CD 4C AF 42 89 45 E0 B8 0A D7 2C 42 89 45 E4 C7 45 D4 00 00 00 00 C7 45 D4 63 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 D6 BE FF FF
+
+. 0 804C51A 7
+. 83 C4 10 85 C0 75 57
+
+. 0 804C521 30
+. 9B DD B5 58 FF FF FF 8B 45 D4 F3 0F 2C 45 D8 89 45 D0 DD A5 58 FF FF FF 83 7D D0 38 75 12
+
+. 0 804C53F 13
+. 83 EC 0C 68 DE 69 05 08 E8 C4 BE FF FF
+
+cvttss2si_2 ... ok
+. 0 804C54C 5
+. 83 C4 10 EB 37
+
+. 0 804C588 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558CC 5
+. E8 BF 6C FF FF
+
+. 0 804C590 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C5AE 2
+. F3 AB
+
+. 0 804C5B0 52
+. B8 00 00 00 40 89 45 D8 B8 00 00 40 40 89 45 DC B8 00 00 80 40 89 45 E0 B8 00 00 A0 40 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C5E2 2
+. F3 AB
+
+. 0 804C5E4 47
+. B8 A4 70 C5 41 89 45 C8 B8 F6 28 6C 40 89 45 CC B8 85 EB 41 42 89 45 D0 B8 33 33 5E 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 DD BD FF FF
+
+. 0 804C613 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 804C61E 57
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F 5E C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 AA BE FF FF
+
+. 0 804C657 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804C65E 17
+. 83 EC 08 B8 A4 70 9D 3F 50 FF 75 BC E8 92 BE FF FF
+
+. 0 804C66F 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804C676 17
+. 83 EC 08 B8 85 EB 41 41 50 FF 75 C0 E8 7A BE FF FF
+
+. 0 804C687 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804C68E 17
+. 83 EC 08 B8 8F C2 31 41 50 FF 75 C4 E8 62 BE FF FF
+
+. 0 804C69F 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804C6A6 13
+. 83 EC 0C 68 22 6A 05 08 E8 5D BD FF FF
+
+divps_1 ... ok
+. 0 804C6B3 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804C775 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558D1 5
+. E8 A7 6E FF FF
+
+. 0 804C77D 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C79B 2
+. F3 AB
+
+. 0 804C79D 52
+. B8 00 00 00 40 89 45 D8 B8 00 00 40 40 89 45 DC B8 00 00 80 40 89 45 E0 B8 00 00 A0 40 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C7CF 2
+. F3 AB
+
+. 0 804C7D1 47
+. B8 A4 70 C5 41 89 45 C8 B8 F6 28 6C 40 89 45 CC B8 85 EB 41 42 89 45 D0 B8 33 33 5E 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 F0 BB FF FF
+
+. 0 804C800 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 804C80B 50
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F 5E 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 C4 BC FF FF
+
+. 0 804C83D 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804C844 17
+. 83 EC 08 B8 A4 70 9D 3F 50 FF 75 BC E8 AC BC FF FF
+
+. 0 804C855 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804C85C 17
+. 83 EC 08 B8 85 EB 41 41 50 FF 75 C0 E8 94 BC FF FF
+
+. 0 804C86D 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804C874 17
+. 83 EC 08 B8 8F C2 31 41 50 FF 75 C4 E8 7C BC FF FF
+
+. 0 804C885 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804C88C 13
+. 83 EC 0C 68 5A 6A 05 08 E8 77 BB FF FF
+
+divps_2 ... ok
+. 0 804C899 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804C95B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558D6 5
+. E8 88 70 FF FF
+
+. 0 804C963 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C981 2
+. F3 AB
+
+. 0 804C983 52
+. B8 00 00 00 40 89 45 D8 B8 00 00 40 40 89 45 DC B8 00 00 80 40 89 45 E0 B8 00 00 A0 40 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804C9B5 2
+. F3 AB
+
+. 0 804C9B7 47
+. B8 A4 70 C5 41 89 45 C8 B8 F6 28 6C 40 89 45 CC B8 85 EB 41 42 89 45 D0 B8 33 33 5E 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 0A BA FF FF
+
+. 0 804C9E6 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 804C9F1 58
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F 5E C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 D6 BA FF FF
+
+. 0 804CA2B 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804CA32 17
+. 83 EC 08 B8 F6 28 6C 40 50 FF 75 BC E8 BE BA FF FF
+
+. 0 804CA43 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804CA4A 17
+. 83 EC 08 B8 85 EB 41 42 50 FF 75 C0 E8 A6 BA FF FF
+
+. 0 804CA5B 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804CA62 17
+. 83 EC 08 B8 33 33 5E 42 50 FF 75 C4 E8 8E BA FF FF
+
+. 0 804CA73 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804CA7A 13
+. 83 EC 0C 68 92 6A 05 08 E8 89 B9 FF FF
+
+divss_1 ... ok
+. 0 804CA87 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804CB49 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558DB 5
+. E8 71 72 FF FF
+
+. 0 804CB51 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804CB6F 2
+. F3 AB
+
+. 0 804CB71 52
+. B8 00 00 00 40 89 45 D8 B8 00 00 40 40 89 45 DC B8 00 00 80 40 89 45 E0 B8 00 00 A0 40 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804CBA3 2
+. F3 AB
+
+. 0 804CBA5 47
+. B8 A4 70 C5 41 89 45 C8 B8 F6 28 6C 40 89 45 CC B8 85 EB 41 42 89 45 D0 B8 33 33 5E 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 1C B8 FF FF
+
+. 0 804CBD4 11
+. 83 C4 10 85 C0 0F 85 41 01 00 00
+
+. 0 804CBDF 51
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F 5E 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 EF B8 FF FF
+
+. 0 804CC12 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804CC19 17
+. 83 EC 08 B8 F6 28 6C 40 50 FF 75 BC E8 D7 B8 FF FF
+
+. 0 804CC2A 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804CC31 17
+. 83 EC 08 B8 85 EB 41 42 50 FF 75 C0 E8 BF B8 FF FF
+
+. 0 804CC42 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804CC49 17
+. 83 EC 08 B8 33 33 5E 42 50 FF 75 C4 E8 A7 B8 FF FF
+
+. 0 804CC5A 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804CC61 13
+. 83 EC 0C 68 CA 6A 05 08 E8 A2 B7 FF FF
+
+divss_2 ... ok
+. 0 804CC6E 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804CD30 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558E0 5
+. E8 53 74 FF FF
+
+. 0 804CD38 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804CD56 2
+. F3 AB
+
+. 0 804CD58 52
+. B8 7B 14 0E 40 89 45 D8 B8 7B 14 8E 40 89 45 DC B8 B8 1E D5 40 89 45 E0 B8 7B 14 0E 41 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804CD8A 2
+. F3 AB
+
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+
+. 0 804CDBB 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 804CDC6 57
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+
+. 0 804CDFF 7
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+
+. 0 804CE06 17
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+
+. 0 804CE17 7
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+
+. 0 804CE1E 17
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+
+. 0 804CE2F 7
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+
+. 0 804CE36 17
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+
+. 0 804CE47 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804CE4E 13
+. 83 EC 0C 68 02 6B 05 08 E8 B5 B5 FF FF
+
+maxps_1 ... ok
+. 0 804CE5B 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804CF1D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558E5 5
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+
+. 0 804CF25 32
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+
+. 0 804CF43 2
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+
+. 0 804CF77 2
+. F3 AB
+
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+
+. 0 804CFA8 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 804CFB3 50
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+
+. 0 804CFE5 7
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+
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+
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+
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+
+. 0 804D015 7
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+
+. 0 804D01C 17
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+
+. 0 804D02D 7
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+
+. 0 804D034 13
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+
+maxps_2 ... ok
+. 0 804D041 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804D103 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558EA 5
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+
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+
+. 0 804D15D 2
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+
+. 0 804D18E 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 804D199 58
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+
+. 0 804D1D3 7
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+
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+
+. 0 804D1EB 7
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+. 0 804D1F2 17
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+
+. 0 804D203 7
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+
+. 0 804D20A 17
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+
+. 0 804D21B 7
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+
+. 0 804D222 13
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+
+maxss_1 ... ok
+. 0 804D22F 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804D2F1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558EF 5
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+
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+
+. 0 804D317 2
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+
+. 0 804D34B 2
+. F3 AB
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+
+. 0 804D37C 11
+. 83 C4 10 85 C0 0F 85 41 01 00 00
+
+. 0 804D387 51
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+
+. 0 804D3BA 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804D3C1 17
+. 83 EC 08 B8 B8 1E 55 40 50 FF 75 BC E8 2F B1 FF FF
+
+. 0 804D3D2 7
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+
+. 0 804D3D9 17
+. 83 EC 08 B8 9A 99 B1 40 50 FF 75 C0 E8 17 B1 FF FF
+
+. 0 804D3EA 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804D3F1 17
+. 83 EC 08 B8 D7 A3 F8 40 50 FF 75 C4 E8 FF B0 FF FF
+
+. 0 804D402 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804D409 13
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+
+maxss_2 ... ok
+. 0 804D416 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804D4D8 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558F4 5
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+
+. 0 804D4E0 32
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+
+. 0 804D4FE 2
+. F3 AB
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+. 0 804D500 52
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+
+. 0 804D532 2
+. F3 AB
+
+. 0 804D534 47
+. B8 D7 A3 F8 40 89 45 C8 B8 9A 99 B1 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 3F 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 8D AE FF FF
+
+. 0 804D563 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 804D56E 57
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+
+. 0 804D5A7 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804D5AE 17
+. 83 EC 08 B8 7B 14 8E 40 50 FF 75 BC E8 42 AF FF FF
+
+. 0 804D5BF 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804D5C6 17
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+
+. 0 804D5D7 7
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+
+. 0 804D5DE 17
+. 83 EC 08 B8 7B 14 8E 3F 50 FF 75 C4 E8 12 AF FF FF
+
+. 0 804D5EF 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804D5F6 13
+. 83 EC 0C 68 E2 6B 05 08 E8 0D AE FF FF
+
+minps_1 ... ok
+. 0 804D603 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804D6C5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558F9 5
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+
+. 0 804D6CD 32
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+
+. 0 804D6EB 2
+. F3 AB
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+. 0 804D6ED 52
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+
+. 0 804D71F 2
+. F3 AB
+
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+
+. 0 804D750 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 804D75B 50
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+
+. 0 804D78D 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804D794 17
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+
+. 0 804D7A5 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804D7AC 17
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+
+. 0 804D7BD 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804D7C4 17
+. 83 EC 08 B8 7B 14 8E 3F 50 FF 75 C4 E8 2C AD FF FF
+
+. 0 804D7D5 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804D7DC 13
+. 83 EC 0C 68 1A 6C 05 08 E8 27 AC FF FF
+
+minps_2 ... ok
+. 0 804D7E9 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804D8AB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80558FE 5
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+
+. 0 804D8B3 32
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+
+. 0 804D8D1 2
+. F3 AB
+
+. 0 804D8D3 52
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+
+. 0 804D905 2
+. F3 AB
+
+. 0 804D907 47
+. B8 D7 A3 F8 40 89 45 C8 B8 9A 99 B1 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 3F 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 BA AA FF FF
+
+. 0 804D936 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 804D941 58
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+
+. 0 804D97B 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804D982 17
+. 83 EC 08 B8 9A 99 B1 40 50 FF 75 BC E8 6E AB FF FF
+
+. 0 804D993 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804D99A 17
+. 83 EC 08 B8 B8 1E 55 40 50 FF 75 C0 E8 56 AB FF FF
+
+. 0 804D9AB 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804D9B2 17
+. 83 EC 08 B8 7B 14 8E 3F 50 FF 75 C4 E8 3E AB FF FF
+
+. 0 804D9C3 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804D9CA 13
+. 83 EC 0C 68 52 6C 05 08 E8 39 AA FF FF
+
+minss_1 ... ok
+. 0 804D9D7 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804DA99 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055903 5
+. E8 99 81 FF FF
+
+. 0 804DAA1 32
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+
+. 0 804DABF 2
+. F3 AB
+
+. 0 804DAC1 52
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+
+. 0 804DAF3 2
+. F3 AB
+
+. 0 804DAF5 47
+. B8 7B 14 8E 3F 89 45 C8 B8 B8 1E 55 40 89 45 CC B8 9A 99 B1 40 89 45 D0 B8 D7 A3 F8 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 CC A8 FF FF
+
+. 0 804DB24 11
+. 83 C4 10 85 C0 0F 85 41 01 00 00
+
+. 0 804DB2F 51
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F 5D 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 7B 14 8E 3F 50 FF 75 B8 E8 9F A9 FF FF
+
+. 0 804DB62 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804DB69 17
+. 83 EC 08 B8 B8 1E 55 40 50 FF 75 BC E8 87 A9 FF FF
+
+. 0 804DB7A 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804DB81 17
+. 83 EC 08 B8 9A 99 B1 40 50 FF 75 C0 E8 6F A9 FF FF
+
+. 0 804DB92 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804DB99 17
+. 83 EC 08 B8 D7 A3 F8 40 50 FF 75 C4 E8 57 A9 FF FF
+
+. 0 804DBAA 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804DBB1 13
+. 83 EC 0C 68 8A 6C 05 08 E8 52 A8 FF FF
+
+minss_2 ... ok
+. 0 804DBBE 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804DC80 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055908 5
+. E8 7B 83 FF FF
+
+. 0 804DC88 32
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+
+. 0 804DCA6 2
+. F3 AB
+
+. 0 804DCA8 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804DCDA 2
+. F3 AB
+
+. 0 804DCDC 47
+. B8 8F C2 31 41 89 45 C8 B8 8F C2 B1 41 89 45 CC B8 EC 51 05 42 89 45 D0 B8 8F C2 31 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 E5 A6 FF FF
+
+. 0 804DD0B 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 804DD16 57
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+
+. 0 804DD4F 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804DD56 17
+. 83 EC 08 B8 B8 1E 63 42 50 FF 75 BC E8 9A A7 FF FF
+
+. 0 804DD67 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804DD6E 17
+. 83 EC 08 B8 0A D7 2C 42 50 FF 75 C0 E8 82 A7 FF FF
+
+. 0 804DD7F 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804DD86 17
+. 83 EC 08 B8 CD 4C AF 42 50 FF 75 C4 E8 6A A7 FF FF
+
+. 0 804DD97 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804DD9E 13
+. 83 EC 0C 68 C2 6C 05 08 E8 65 A6 FF FF
+
+movaps_1 ... ok
+. 0 804DDAB 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804DE6D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805590D 5
+. E8 63 85 FF FF
+
+. 0 804DE75 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804DE93 2
+. F3 AB
+
+. 0 804DE95 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804DEC7 2
+. F3 AB
+
+. 0 804DEC9 47
+. B8 8F C2 31 41 89 45 C8 B8 8F C2 B1 41 89 45 CC B8 EC 51 05 42 89 45 D0 B8 8F C2 31 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 F8 A4 FF FF
+
+. 0 804DEF8 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 804DF03 50
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F 28 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 CC A5 FF FF
+
+. 0 804DF35 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804DF3C 17
+. 83 EC 08 B8 B8 1E 63 42 50 FF 75 BC E8 B4 A5 FF FF
+
+. 0 804DF4D 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804DF54 17
+. 83 EC 08 B8 0A D7 2C 42 50 FF 75 C0 E8 9C A5 FF FF
+
+. 0 804DF65 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804DF6C 17
+. 83 EC 08 B8 CD 4C AF 42 50 FF 75 C4 E8 84 A5 FF FF
+
+. 0 804DF7D 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804DF84 13
+. 83 EC 0C 68 FD 6C 05 08 E8 7F A4 FF FF
+
+movaps_2 ... ok
+. 0 804DF91 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804E053 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055912 5
+. E8 44 87 FF FF
+
+. 0 804E05B 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804E079 2
+. F3 AB
+
+. 0 804E07B 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804E0AD 2
+. F3 AB
+
+. 0 804E0AF 47
+. B8 8F C2 31 41 89 45 C8 B8 8F C2 B1 41 89 45 CC B8 EC 51 05 42 89 45 D0 B8 8F C2 31 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 12 A3 FF FF
+
+. 0 804E0DE 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 804E0E9 57
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F 12 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 0A D7 2C 42 50 FF 75 B8 E8 DF A3 FF FF
+
+. 0 804E122 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804E129 17
+. 83 EC 08 B8 CD 4C AF 42 50 FF 75 BC E8 C7 A3 FF FF
+
+. 0 804E13A 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804E141 17
+. 83 EC 08 B8 EC 51 05 42 50 FF 75 C0 E8 AF A3 FF FF
+
+. 0 804E152 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804E159 17
+. 83 EC 08 B8 8F C2 31 42 50 FF 75 C4 E8 97 A3 FF FF
+
+. 0 804E16A 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804E171 13
+. 83 EC 0C 68 38 6D 05 08 E8 92 A2 FF FF
+
+movhlps_1 ... ok
+. 0 804E17E 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804E240 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055917 5
+. E8 2C 89 FF FF
+
+. 0 804E248 62
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+
+. 0 804E284 2
+. F3 AB
+
+. 0 804E286 47
+. B8 8F C2 31 41 89 45 C8 B8 8F C2 B1 41 89 45 CC B8 EC 51 05 42 89 45 D0 B8 8F C2 31 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 3B A1 FF FF
+
+. 0 804E2B5 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 804E2C0 50
+. 9B DD B5 48 FF FF FF 0F 12 45 C8 0F 16 45 D0 0F 16 45 E0 0F 13 45 B8 0F 17 45 C0 DD A5 48 FF FF FF 83 EC 08 B8 8F C2 31 41 50 FF 75 B8 E8 0F A2 FF FF
+
+. 0 804E2F2 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804E2F9 17
+. 83 EC 08 B8 8F C2 B1 41 50 FF 75 BC E8 F7 A1 FF FF
+
+. 0 804E30A 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804E311 17
+. 83 EC 08 B8 A4 70 45 41 50 FF 75 C0 E8 DF A1 FF FF
+
+. 0 804E322 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804E329 17
+. 83 EC 08 B8 B8 1E 63 42 50 FF 75 C4 E8 C7 A1 FF FF
+
+. 0 804E33A 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804E341 13
+. 83 EC 0C 68 76 6D 05 08 E8 C2 A0 FF FF
+
+movhps_1 ... ok
+. 0 804E34E 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804E410 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805591C 5
+. E8 F7 8A FF FF
+
+. 0 804E418 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804E436 2
+. F3 AB
+
+. 0 804E438 89
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 B8 8F C2 31 41 89 45 D0 B8 8F C2 B1 41 89 45 D4 8B 45 D0 8B 55 D4 89 45 C8 89 55 CC 83 EC 08 6A 01 68 C0 92 05 08 E8 5F 9F FF FF
+
+. 0 804E491 11
+. 83 C4 10 85 C0 0F 85 B9 00 00 00
+
+. 0 804E49C 42
+. 9B DD B5 58 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 17 45 C8 DD A5 58 FF FF FF 83 EC 08 B8 0A D7 2C 42 50 FF 75 C8 E8 3B A0 FF FF
+
+. 0 804E4C6 7
+. 83 C4 10 85 C0 74 2A
+
+. 0 804E4CD 17
+. 83 EC 08 B8 CD 4C AF 42 50 FF 75 CC E8 23 A0 FF FF
+
+. 0 804E4DE 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E4E5 13
+. 83 EC 0C 68 B1 6D 05 08 E8 1E 9F FF FF
+
+movhps_2 ... ok
+. 0 804E4F2 5
+. 83 C4 10 EB 6E
+
+. 0 804E565 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055921 5
+. E8 47 8C FF FF
+
+. 0 804E56D 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804E58B 2
+. F3 AB
+
+. 0 804E58D 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804E5BF 2
+. F3 AB
+
+. 0 804E5C1 47
+. B8 8F C2 31 41 89 45 C8 B8 8F C2 B1 41 89 45 CC B8 EC 51 05 42 89 45 D0 B8 8F C2 31 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 00 9E FF FF
+
+. 0 804E5F0 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 804E5FB 57
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F 16 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 8F C2 31 41 50 FF 75 B8 E8 CD 9E FF FF
+
+. 0 804E634 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804E63B 17
+. 83 EC 08 B8 8F C2 B1 41 50 FF 75 BC E8 B5 9E FF FF
+
+. 0 804E64C 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804E653 17
+. 83 EC 08 B8 A4 70 45 41 50 FF 75 C0 E8 9D 9E FF FF
+
+. 0 804E664 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804E66B 17
+. 83 EC 08 B8 B8 1E 63 42 50 FF 75 C4 E8 85 9E FF FF
+
+. 0 804E67C 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804E683 13
+. 83 EC 0C 68 EC 6D 05 08 E8 80 9D FF FF
+
+movlhps_1 ... ok
+. 0 804E690 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804E752 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055926 5
+. E8 2F 8E FF FF
+
+. 0 804E75A 62
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+
+. 0 804E796 2
+. F3 AB
+
+. 0 804E798 47
+. B8 8F C2 31 41 89 45 C8 B8 8F C2 B1 41 89 45 CC B8 EC 51 05 42 89 45 D0 B8 8F C2 31 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 29 9C FF FF
+
+. 0 804E7C7 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 804E7D2 50
+. 9B DD B5 48 FF FF FF 0F 12 45 C8 0F 16 45 D0 0F 12 45 E0 0F 13 45 B8 0F 17 45 C0 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 FD 9C FF FF
+
+. 0 804E804 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804E80B 17
+. 83 EC 08 B8 B8 1E 63 42 50 FF 75 BC E8 E5 9C FF FF
+
+. 0 804E81C 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804E823 17
+. 83 EC 08 B8 EC 51 05 42 50 FF 75 C0 E8 CD 9C FF FF
+
+. 0 804E834 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804E83B 17
+. 83 EC 08 B8 8F C2 31 42 50 FF 75 C4 E8 B5 9C FF FF
+
+. 0 804E84C 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804E853 13
+. 83 EC 0C 68 2A 6E 05 08 E8 B0 9B FF FF
+
+movlps_1 ... ok
+. 0 804E860 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804E922 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805592B 5
+. E8 FA 8F FF FF
+
+. 0 804E92A 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804E948 2
+. F3 AB
+
+. 0 804E94A 89
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 C7 45 D0 00 00 00 00 C7 45 D4 00 00 00 00 B8 8F C2 31 41 89 45 D0 B8 8F C2 B1 41 89 45 D4 8B 45 D0 8B 55 D4 89 45 C8 89 55 CC 83 EC 08 6A 01 68 C0 92 05 08 E8 4D 9A FF FF
+
+. 0 804E9A3 11
+. 83 C4 10 85 C0 0F 85 B9 00 00 00
+
+. 0 804E9AE 42
+. 9B DD B5 58 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 13 45 C8 DD A5 58 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 C8 E8 29 9B FF FF
+
+. 0 804E9D8 7
+. 83 C4 10 85 C0 74 2A
+
+. 0 804E9DF 17
+. 83 EC 08 B8 B8 1E 63 42 50 FF 75 CC E8 11 9B FF FF
+
+. 0 804E9F0 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804E9F7 13
+. 83 EC 0C 68 65 6E 05 08 E8 0C 9A FF FF
+
+movlps_2 ... ok
+. 0 804EA04 5
+. 83 C4 10 EB 6E
+
+. 0 804EA77 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055930 5
+. E8 4A 91 FF FF
+
+. 0 804EA7F 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804EA9D 2
+. F3 AB
+
+. 0 804EA9F 54
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 C2 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF C2 89 45 E4 C7 45 D4 00 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 1B 99 FF FF
+
+. 0 804EAD5 7
+. 83 C4 10 85 C0 75 5D
+
+. 0 804EADC 36
+. 9B DD B5 58 FF FF FF 0F 12 6D D8 0F 16 6D E0 8B 45 D4 0F 50 C5 89 45 D0 DD A5 58 FF FF FF 83 7D D0 0A 75 12
+
+. 0 804EB00 13
+. 83 EC 0C 68 A0 6E 05 08 E8 03 99 FF FF
+
+movmskps_1 ... ok
+. 0 804EB0D 5
+. 83 C4 10 EB 37
+
+. 0 804EB49 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055935 5
+. E8 17 92 FF FF
+
+. 0 804EB51 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804EB6F 2
+. F3 AB
+
+. 0 804EB71 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804EBA3 2
+. F3 AB
+
+. 0 804EBA5 71
+. B8 8F C2 31 41 89 45 C8 B8 8F C2 B1 41 89 45 CC B8 EC 51 05 42 89 45 D0 B8 8F C2 31 42 89 45 D4 8B 45 C8 89 45 B8 8B 45 CC 89 45 BC 8B 45 D0 89 45 C0 8B 45 D4 89 45 C4 83 EC 08 6A 01 68 C0 92 05 08 E8 04 98 FF FF
+
+. 0 804EBEC 11
+. 83 C4 10 85 C0 0F 85 38 01 00 00
+
+. 0 804EBF7 42
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 2B 45 B8 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 E0 98 FF FF
+
+. 0 804EC21 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804EC28 17
+. 83 EC 08 B8 B8 1E 63 42 50 FF 75 BC E8 C8 98 FF FF
+
+. 0 804EC39 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804EC40 17
+. 83 EC 08 B8 0A D7 2C 42 50 FF 75 C0 E8 B0 98 FF FF
+
+. 0 804EC51 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804EC58 17
+. 83 EC 08 B8 CD 4C AF 42 50 FF 75 C4 E8 98 98 FF FF
+
+. 0 804EC69 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804EC70 13
+. 83 EC 0C 68 E1 6E 05 08 E8 93 97 FF FF
+
+movntps_1 ... ok
+. 0 804EC7D 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804ED3F 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805593A 5
+. E8 08 94 FF FF
+
+. 0 804ED47 95
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 EF CD AB 89 C7 45 E4 67 45 23 01 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C7 45 D8 34 34 34 34 C7 45 DC 12 12 12 12 8B 45 D8 8B 55 DC 89 45 D0 89 55 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 4A 96 FF FF
+
+. 0 804EDA6 7
+. 83 C4 10 85 C0 75 70
+
+. 0 804EDAD 44
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F E7 45 D0 DD A5 58 FF FF FF 8B 45 D4 35 67 45 23 01 8B 55 D0 81 F2 EF CD AB 89 09 D0 85 C0 75 12
+
+. 0 804EDD9 13
+. 83 EC 0C 68 1F 6F 05 08 E8 2A 96 FF FF
+
+movntq_1 ... ok
+. 0 804EDE6 5
+. 83 C4 10 EB 42
+
+. 0 804EE2D 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805593F 5
+. E8 F1 94 FF FF
+
+. 0 804EE35 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804EE53 2
+. F3 AB
+
+. 0 804EE55 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804EE87 2
+. F3 AB
+
+. 0 804EE89 47
+. B8 8F C2 31 41 89 45 C8 B8 8F C2 B1 41 89 45 CC B8 EC 51 05 42 89 45 D0 B8 8F C2 31 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 38 95 FF FF
+
+. 0 804EEB8 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 804EEC3 58
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F 10 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 04 96 FF FF
+
+. 0 804EEFD 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804EF04 17
+. 83 EC 08 B8 8F C2 B1 41 50 FF 75 BC E8 EC 95 FF FF
+
+. 0 804EF15 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804EF1C 17
+. 83 EC 08 B8 EC 51 05 42 50 FF 75 C0 E8 D4 95 FF FF
+
+. 0 804EF2D 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804EF34 17
+. 83 EC 08 B8 8F C2 31 42 50 FF 75 C4 E8 BC 95 FF FF
+
+. 0 804EF45 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804EF4C 13
+. 83 EC 0C 68 5A 6F 05 08 E8 B7 94 FF FF
+
+movss_1 ... ok
+. 0 804EF59 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804F01B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055944 5
+. E8 DA 96 FF FF
+
+. 0 804F023 47
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E4 00 00 00 00 B8 A4 70 45 41 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804F050 2
+. F3 AB
+
+. 0 804F052 47
+. B8 8F C2 31 41 89 45 C8 B8 8F C2 B1 41 89 45 CC B8 EC 51 05 42 89 45 D0 B8 8F C2 31 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 6F 93 FF FF
+
+. 0 804F081 11
+. 83 C4 10 85 C0 0F 85 41 01 00 00
+
+. 0 804F08C 51
+. 9B DD B5 48 FF FF FF 0F 12 45 C8 0F 16 45 D0 F3 0F 10 45 E4 0F 13 45 B8 0F 17 45 C0 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 42 94 FF FF
+
+. 0 804F0BF 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804F0C6 17
+. 83 EC 08 B8 00 00 00 00 50 FF 75 BC E8 2A 94 FF FF
+
+. 0 804F0D7 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804F0DE 17
+. 83 EC 08 B8 00 00 00 00 50 FF 75 C0 E8 12 94 FF FF
+
+. 0 804F0EF 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804F0F6 17
+. 83 EC 08 B8 00 00 00 00 50 FF 75 C4 E8 FA 93 FF FF
+
+. 0 804F107 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804F10E 13
+. 83 EC 0C 68 92 6F 05 08 E8 F5 92 FF FF
+
+movss_2 ... ok
+. 0 804F11B 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804F1DD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055949 5
+. E8 97 98 FF FF
+
+. 0 804F1E5 32
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804F203 2
+. F3 AB
+
+. 0 804F205 68
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 C7 45 D4 00 00 00 00 B8 8F C2 31 41 89 45 D4 8B 45 D4 89 45 D0 83 EC 08 6A 01 68 C0 92 05 08 E8 A7 91 FF FF
+
+. 0 804F249 7
+. 83 C4 10 85 C0 75 7C
+
+. 0 804F250 43
+. 9B DD B5 58 FF FF FF 0F 12 45 D8 0F 16 45 E0 F3 0F 11 45 D0 DD A5 58 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 D0 E8 86 92 FF FF
+
+. 0 804F27B 7
+. 83 C4 10 85 C0 74 12
+
+. 0 804F282 13
+. 83 EC 0C 68 CA 6F 05 08 E8 81 91 FF FF
+
+movss_3 ... ok
+. 0 804F28F 5
+. 83 C4 10 EB 48
+
+. 0 804F2DC 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805594E 5
+. E8 91 99 FF FF
+
+. 0 804F2E4 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804F302 2
+. F3 AB
+
+. 0 804F304 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804F336 2
+. F3 AB
+
+. 0 804F338 47
+. B8 8F C2 31 41 89 45 C8 B8 8F C2 B1 41 89 45 CC B8 EC 51 05 42 89 45 D0 B8 8F C2 31 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 89 90 FF FF
+
+. 0 804F367 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 804F372 57
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F 10 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 56 91 FF FF
+
+. 0 804F3AB 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804F3B2 17
+. 83 EC 08 B8 B8 1E 63 42 50 FF 75 BC E8 3E 91 FF FF
+
+. 0 804F3C3 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804F3CA 17
+. 83 EC 08 B8 0A D7 2C 42 50 FF 75 C0 E8 26 91 FF FF
+
+. 0 804F3DB 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804F3E2 17
+. 83 EC 08 B8 CD 4C AF 42 50 FF 75 C4 E8 0E 91 FF FF
+
+. 0 804F3F3 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804F3FA 13
+. 83 EC 0C 68 02 70 05 08 E8 09 90 FF FF
+
+movups_1 ... ok
+. 0 804F407 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804F4C9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055953 5
+. E8 79 9B FF FF
+
+. 0 804F4D1 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804F4EF 2
+. F3 AB
+
+. 0 804F4F1 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804F523 2
+. F3 AB
+
+. 0 804F525 47
+. B8 8F C2 31 41 89 45 C8 B8 8F C2 B1 41 89 45 CC B8 EC 51 05 42 89 45 D0 B8 8F C2 31 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 9C 8E FF FF
+
+. 0 804F554 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 804F55F 50
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F 10 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 70 8F FF FF
+
+. 0 804F591 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804F598 17
+. 83 EC 08 B8 B8 1E 63 42 50 FF 75 BC E8 58 8F FF FF
+
+. 0 804F5A9 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804F5B0 17
+. 83 EC 08 B8 0A D7 2C 42 50 FF 75 C0 E8 40 8F FF FF
+
+. 0 804F5C1 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804F5C8 17
+. 83 EC 08 B8 CD 4C AF 42 50 FF 75 C4 E8 28 8F FF FF
+
+. 0 804F5D9 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804F5E0 13
+. 83 EC 0C 68 3D 70 05 08 E8 23 8E FF FF
+
+movups_2 ... ok
+. 0 804F5ED 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804F6AF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055958 5
+. E8 5A 9D FF FF
+
+. 0 804F6B7 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804F6D5 2
+. F3 AB
+
+. 0 804F6D7 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804F709 2
+. F3 AB
+
+. 0 804F70B 47
+. B8 00 00 A0 40 89 45 C8 B8 00 00 80 40 89 45 CC B8 00 00 40 40 89 45 D0 B8 00 00 00 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 B6 8C FF FF
+
+. 0 804F73A 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 804F745 57
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F 59 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 CD CC 76 42 50 FF 75 B8 E8 83 8D FF FF
+
+. 0 804F77E 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804F785 17
+. 83 EC 08 B8 B8 1E 63 43 50 FF 75 BC E8 6B 8D FF FF
+
+. 0 804F796 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804F79D 17
+. 83 EC 08 B8 48 A1 01 43 50 FF 75 C0 E8 53 8D FF FF
+
+. 0 804F7AE 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804F7B5 17
+. 83 EC 08 B8 CD 4C 2F 43 50 FF 75 C4 E8 3B 8D FF FF
+
+. 0 804F7C6 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804F7CD 13
+. 83 EC 0C 68 78 70 05 08 E8 36 8C FF FF
+
+mulps_1 ... ok
+. 0 804F7DA 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804F89C 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805595D 5
+. E8 42 9F FF FF
+
+. 0 804F8A4 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804F8C2 2
+. F3 AB
+
+. 0 804F8C4 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804F8F6 2
+. F3 AB
+
+. 0 804F8F8 47
+. B8 00 00 A0 40 89 45 C8 B8 00 00 80 40 89 45 CC B8 00 00 40 40 89 45 D0 B8 00 00 00 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 C9 8A FF FF
+
+. 0 804F927 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 804F932 50
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F 59 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 CD CC 76 42 50 FF 75 B8 E8 9D 8B FF FF
+
+. 0 804F964 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804F96B 17
+. 83 EC 08 B8 B8 1E 63 43 50 FF 75 BC E8 85 8B FF FF
+
+. 0 804F97C 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804F983 17
+. 83 EC 08 B8 48 A1 01 43 50 FF 75 C0 E8 6D 8B FF FF
+
+. 0 804F994 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804F99B 17
+. 83 EC 08 B8 CD 4C 2F 43 50 FF 75 C4 E8 55 8B FF FF
+
+. 0 804F9AC 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804F9B3 13
+. 83 EC 0C 68 B0 70 05 08 E8 50 8A FF FF
+
+mulps_2 ... ok
+. 0 804F9C0 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804FA82 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055962 5
+. E8 23 A1 FF FF
+
+. 0 804FA8A 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804FAA8 2
+. F3 AB
+
+. 0 804FAAA 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804FADC 2
+. F3 AB
+
+. 0 804FADE 47
+. B8 00 00 A0 40 89 45 C8 B8 00 00 80 40 89 45 CC B8 00 00 40 40 89 45 D0 B8 00 00 00 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 E3 88 FF FF
+
+. 0 804FB0D 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 804FB18 58
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F 59 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 CD CC 76 42 50 FF 75 B8 E8 AF 89 FF FF
+
+. 0 804FB52 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804FB59 17
+. 83 EC 08 B8 00 00 80 40 50 FF 75 BC E8 97 89 FF FF
+
+. 0 804FB6A 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804FB71 17
+. 83 EC 08 B8 00 00 40 40 50 FF 75 C0 E8 7F 89 FF FF
+
+. 0 804FB82 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804FB89 17
+. 83 EC 08 B8 00 00 00 40 50 FF 75 C4 E8 67 89 FF FF
+
+. 0 804FB9A 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804FBA1 13
+. 83 EC 0C 68 E8 70 05 08 E8 62 88 FF FF
+
+mulss_1 ... ok
+. 0 804FBAE 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804FC70 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055967 5
+. E8 0C A3 FF FF
+
+. 0 804FC78 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804FC96 2
+. F3 AB
+
+. 0 804FC98 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804FCCA 2
+. F3 AB
+
+. 0 804FCCC 47
+. B8 00 00 A0 40 89 45 C8 B8 00 00 80 40 89 45 CC B8 00 00 40 40 89 45 D0 B8 00 00 00 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 F5 86 FF FF
+
+. 0 804FCFB 11
+. 83 C4 10 85 C0 0F 85 41 01 00 00
+
+. 0 804FD06 51
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F 59 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 CD CC 76 42 50 FF 75 B8 E8 C8 87 FF FF
+
+. 0 804FD39 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 804FD40 17
+. 83 EC 08 B8 00 00 80 40 50 FF 75 BC E8 B0 87 FF FF
+
+. 0 804FD51 7
+. 83 C4 10 85 C0 74 45
+
+. 0 804FD58 17
+. 83 EC 08 B8 00 00 40 40 50 FF 75 C0 E8 98 87 FF FF
+
+. 0 804FD69 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 804FD70 17
+. 83 EC 08 B8 00 00 00 40 50 FF 75 C4 E8 80 87 FF FF
+
+. 0 804FD81 7
+. 83 C4 10 85 C0 74 15
+
+. 0 804FD88 13
+. 83 EC 0C 68 20 71 05 08 E8 7B 86 FF FF
+
+mulss_2 ... ok
+. 0 804FD95 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 804FE57 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805596C 5
+. E8 EE A4 FF FF
+
+. 0 804FE5F 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804FE7D 2
+. F3 AB
+
+. 0 804FE7F 48
+. C7 45 D8 20 64 A8 EC C7 45 DC 31 75 B9 FD C7 45 E0 EF CD AB 89 C7 45 E4 67 45 23 01 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804FEAD 2
+. F3 AB
+
+. 0 804FEAF 43
+. C7 45 C8 EF CD AB 89 C7 45 CC 67 45 23 01 C7 45 D0 20 64 A8 EC C7 45 D4 31 75 B9 FD 83 EC 08 6A 01 68 C0 92 05 08 E8 16 85 FF FF
+
+. 0 804FEDA 11
+. 83 C4 10 85 C0 0F 85 BA 00 00 00
+
+. 0 804FEE5 63
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F 56 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 8B 45 BC 35 77 75 BB FD 8B 55 B8 81 F2 EF ED AB ED 09 D0 85 C0 75 29
+
+. 0 804FF24 23
+. 8B 45 C4 35 77 75 BB FD 8B 55 C0 81 F2 EF ED AB ED 09 D0 85 C0 75 12
+
+. 0 804FF3B 13
+. 83 EC 0C 68 58 71 05 08 E8 C8 84 FF FF
+
+orps_1 ... ok
+. 0 804FF48 5
+. 83 C4 10 EB 62
+
+. 0 804FFAF 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055971 5
+. E8 41 A6 FF FF
+
+. 0 804FFB7 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 804FFD5 2
+. F3 AB
+
+. 0 804FFD7 48
+. C7 45 D8 20 64 A8 EC C7 45 DC 31 75 B9 FD C7 45 E0 EF CD AB 89 C7 45 E4 67 45 23 01 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8050005 2
+. F3 AB
+
+. 0 8050007 43
+. C7 45 C8 EF CD AB 89 C7 45 CC 67 45 23 01 C7 45 D0 20 64 A8 EC C7 45 D4 31 75 B9 FD 83 EC 08 6A 01 68 C0 92 05 08 E8 BE 83 FF FF
+
+. 0 8050032 11
+. 83 C4 10 85 C0 0F 85 B3 00 00 00
+
+. 0 805003D 56
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F 56 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 8B 45 BC 35 77 75 BB FD 8B 55 B8 81 F2 EF ED AB ED 09 D0 85 C0 75 29
+
+. 0 8050075 23
+. 8B 45 C4 35 77 75 BB FD 8B 55 C0 81 F2 EF ED AB ED 09 D0 85 C0 75 12
+
+. 0 805008C 13
+. 83 EC 0C 68 8D 71 05 08 E8 77 83 FF FF
+
+orps_2 ... ok
+. 0 8050099 5
+. 83 C4 10 EB 62
+
+. 0 8050100 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055976 5
+. E8 8D A7 FF FF
+
+. 0 8050108 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 0B C6 45 E1 16 C6 45 E2 21 C6 45 E3 2C C6 45 E4 37 C6 45 E5 42 C6 45 E6 4D C6 45 E7 58 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 0F C6 45 D9 19 C6 45 DA 23 C6 45 DB 2D C6 45 DC 37 C6 45 DD 41 C6 45 DE 4B C6 45 DF 55 83 EC 08 6A 01 68 C0 92 05 08 E8 71 82 FF FF
+
+. 0 805017F 11
+. 83 C4 10 85 C0 0F 85 4B 01 00 00
+
+. 0 805018A 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F E0 C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 0D 75 3F
+
+. 0 80501AC 6
+. 80 7D D1 18 75 39
+
+. 0 80501B2 6
+. 80 7D D2 22 75 33
+
+. 0 80501B8 6
+. 80 7D D3 2D 75 2D
+
+. 0 80501BE 6
+. 80 7D D4 37 75 27
+
+. 0 80501C4 6
+. 80 7D D5 42 75 21
+
+. 0 80501CA 6
+. 80 7D D6 4C 75 1B
+
+. 0 80501D0 6
+. 80 7D D7 57 75 15
+
+. 0 80501D6 13
+. 83 EC 0C 68 C2 71 05 08 E8 2D 82 FF FF
+
+pavgb_1 ... ok
+. 0 80501E3 8
+. 83 C4 10 E9 FA 00 00 00
+
+. 0 80502E5 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805597B 5
+. E8 6D A9 FF FF
+
+. 0 80502ED 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 0B C6 45 E1 16 C6 45 E2 21 C6 45 E3 2C C6 45 E4 37 C6 45 E5 42 C6 45 E6 4D C6 45 E7 58 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 0F C6 45 D9 19 C6 45 DA 23 C6 45 DB 2D C6 45 DC 37 C6 45 DD 41 C6 45 DE 4B C6 45 DF 55 83 EC 08 6A 01 68 C0 92 05 08 E8 8C 80 FF FF
+
+. 0 8050364 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 805036F 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F E0 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 0D 75 3F
+
+. 0 805038E 6
+. 80 7D D1 18 75 39
+
+. 0 8050394 6
+. 80 7D D2 22 75 33
+
+. 0 805039A 6
+. 80 7D D3 2D 75 2D
+
+. 0 80503A0 6
+. 80 7D D4 37 75 27
+
+. 0 80503A6 6
+. 80 7D D5 42 75 21
+
+. 0 80503AC 6
+. 80 7D D6 4C 75 1B
+
+. 0 80503B2 6
+. 80 7D D7 57 75 15
+
+. 0 80503B8 13
+. 83 EC 0C 68 1C 73 05 08 E8 4B 80 FF FF
+
+pavgb_2 ... ok
+. 0 80503C5 8
+. 83 C4 10 E9 FA 00 00 00
+
+. 0 80504C7 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055980 5
+. E8 4A AB FF FF
+
+. 0 80504CF 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 62 04 66 C7 45 E2 10 0D 66 C7 45 E4 BE 15 66 C7 45 E6 6C 1E C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 F5 05 66 C7 45 DA D9 0D 66 C7 45 DC BD 15 66 C7 45 DE A1 1D 83 EC 08 6A 01 68 C0 92 05 08 E8 BA 7E FF FF
+
+. 0 8050536 11
+. 83 C4 10 85 C0 0F 85 DD 00 00 00
+
+. 0 8050541 36
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F E3 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 2C 05 75 2D
+
+. 0 8050565 8
+. 66 81 7D D2 75 0D 75 25
+
+. 0 805056D 8
+. 66 81 7D D4 BE 15 75 1D
+
+. 0 8050575 8
+. 66 81 7D D6 07 1E 75 15
+
+. 0 805057D 13
+. 83 EC 0C 68 54 73 05 08 E8 86 7E FF FF
+
+pavgw_1 ... ok
+. 0 805058A 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 805062E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055985 5
+. E8 AC AC FF FF
+
+. 0 8050636 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 62 04 66 C7 45 E2 10 0D 66 C7 45 E4 BE 15 66 C7 45 E6 6C 1E C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 F5 05 66 C7 45 DA D9 0D 66 C7 45 DC BD 15 66 C7 45 DE A1 1D 83 EC 08 6A 01 68 C0 92 05 08 E8 53 7D FF FF
+
+. 0 805069D 11
+. 83 C4 10 85 C0 0F 85 DA 00 00 00
+
+. 0 80506A8 33
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F E3 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 81 7D D0 2C 05 75 2D
+
+. 0 80506C9 8
+. 66 81 7D D2 75 0D 75 25
+
+. 0 80506D1 8
+. 66 81 7D D4 BE 15 75 1D
+
+. 0 80506D9 8
+. 66 81 7D D6 07 1E 75 15
+
+. 0 80506E1 13
+. 83 EC 0C 68 1C 74 05 08 E8 22 7D FF FF
+
+pavgw_2 ... ok
+. 0 80506EE 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 8050792 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805598A 5
+. E8 0B AE FF FF
+
+. 0 805079A 79
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 D2 04 66 C7 45 E2 2E 16 66 C7 45 E4 E1 10 66 C7 45 E6 3D 22 C7 45 DC 00 00 00 00 C7 45 DC FF FF FF FF 83 EC 08 6A 01 68 C0 92 05 08 E8 07 7C FF FF
+
+. 0 80507E9 7
+. 83 C4 10 85 C0 75 60
+
+. 0 80507F0 36
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 8B 45 DC 0F C5 C0 00 89 45 D8 DD A5 68 FF FF FF 81 7D D8 D2 04 00 00 75 12
+
+. 0 8050814 13
+. 83 EC 0C 68 54 74 05 08 E8 EF 7B FF FF
+
+pextrw_1 ... ok
+. 0 8050821 5
+. 83 C4 10 EB 3A
+
+. 0 8050860 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805598F 5
+. E8 D4 AE FF FF
+
+. 0 8050868 79
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 D2 04 66 C7 45 E2 2E 16 66 C7 45 E4 E1 10 66 C7 45 E6 3D 22 C7 45 DC 00 00 00 00 C7 45 DC FF FF FF FF 83 EC 08 6A 01 68 C0 92 05 08 E8 39 7B FF FF
+
+. 0 80508B7 7
+. 83 C4 10 85 C0 75 60
+
+. 0 80508BE 36
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 8B 45 DC 0F C5 C0 01 89 45 D8 DD A5 68 FF FF FF 81 7D D8 2E 16 00 00 75 12
+
+. 0 80508E2 13
+. 83 EC 0C 68 8F 74 05 08 E8 21 7B FF FF
+
+pextrw_2 ... ok
+. 0 80508EF 5
+. 83 C4 10 EB 3A
+
+. 0 805092E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055994 5
+. E8 9D AF FF FF
+
+. 0 8050936 79
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 D2 04 66 C7 45 E2 2E 16 66 C7 45 E4 E1 10 66 C7 45 E6 3D 22 C7 45 DC 00 00 00 00 C7 45 DC FF FF FF FF 83 EC 08 6A 01 68 C0 92 05 08 E8 6B 7A FF FF
+
+. 0 8050985 7
+. 83 C4 10 85 C0 75 60
+
+. 0 805098C 36
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 8B 45 DC 0F C5 C0 02 89 45 D8 DD A5 68 FF FF FF 81 7D D8 E1 10 00 00 75 12
+
+. 0 80509B0 13
+. 83 EC 0C 68 CA 74 05 08 E8 53 7A FF FF
+
+pextrw_3 ... ok
+. 0 80509BD 5
+. 83 C4 10 EB 3A
+
+. 0 80509FC 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055999 5
+. E8 66 B0 FF FF
+
+. 0 8050A04 79
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 D2 04 66 C7 45 E2 2E 16 66 C7 45 E4 E1 10 66 C7 45 E6 3D 22 C7 45 DC 00 00 00 00 C7 45 DC FF FF FF FF 83 EC 08 6A 01 68 C0 92 05 08 E8 9D 79 FF FF
+
+. 0 8050A53 7
+. 83 C4 10 85 C0 75 60
+
+. 0 8050A5A 36
+. 9B DD B5 68 FF FF FF 0F 6F 45 E0 8B 45 DC 0F C5 C0 03 89 45 D8 DD A5 68 FF FF FF 81 7D D8 3D 22 00 00 75 12
+
+. 0 8050A7E 13
+. 83 EC 0C 68 05 75 05 08 E8 85 79 FF FF
+
+pextrw_4 ... ok
+. 0 8050A8B 5
+. 83 C4 10 EB 3A
+
+. 0 8050ACA 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 805599E 5
+. E8 2F B1 FF FF
+
+. 0 8050AD2 79
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E4 00 00 00 00 C7 45 E4 FF FF FF FF C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 D2 04 66 C7 45 DA 2E 16 66 C7 45 DC E1 10 66 C7 45 DE 3D 22 83 EC 08 6A 01 68 C0 92 05 08 E8 CF 78 FF FF
+
+. 0 8050B21 11
+. 83 C4 10 85 C0 0F 85 DC 00 00 00
+
+. 0 8050B2C 35
+. 9B DD B5 58 FF FF FF 8B 45 E4 0F 6F 45 D8 0F C4 C0 00 0F 7F 45 D0 DD A5 58 FF FF FF 66 83 7D D0 FF 75 2D
+
+. 0 8050B4F 8
+. 66 81 7D D2 2E 16 75 25
+
+. 0 8050B57 8
+. 66 81 7D D4 E1 10 75 1D
+
+. 0 8050B5F 8
+. 66 81 7D D6 3D 22 75 15
+
+. 0 8050B67 13
+. 83 EC 0C 68 40 75 05 08 E8 9C 78 FF FF
+
+pinsrw_1 ... ok
+. 0 8050B74 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 8050C18 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559A3 5
+. E8 78 B2 FF FF
+
+. 0 8050C20 79
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E4 00 00 00 00 C7 45 E4 FF FF FF FF C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 D2 04 66 C7 45 DA 2E 16 66 C7 45 DC E1 10 66 C7 45 DE 3D 22 83 EC 08 6A 01 68 C0 92 05 08 E8 81 77 FF FF
+
+. 0 8050C6F 11
+. 83 C4 10 85 C0 0F 85 DC 00 00 00
+
+. 0 8050C7A 36
+. 9B DD B5 58 FF FF FF 8B 45 E4 0F 6F 45 D8 0F C4 C0 01 0F 7F 45 D0 DD A5 58 FF FF FF 66 81 7D D0 D2 04 75 2C
+
+. 0 8050C9E 7
+. 66 83 7D D2 FF 75 25
+
+. 0 8050CA5 8
+. 66 81 7D D4 E1 10 75 1D
+
+. 0 8050CAD 8
+. 66 81 7D D6 3D 22 75 15
+
+. 0 8050CB5 13
+. 83 EC 0C 68 7B 75 05 08 E8 4E 77 FF FF
+
+pinsrw_2 ... ok
+. 0 8050CC2 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 8050D66 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559A8 5
+. E8 C1 B3 FF FF
+
+. 0 8050D6E 79
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E4 00 00 00 00 C7 45 E4 FF FF FF FF C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 D2 04 66 C7 45 DA 2E 16 66 C7 45 DC E1 10 66 C7 45 DE 3D 22 83 EC 08 6A 01 68 C0 92 05 08 E8 33 76 FF FF
+
+. 0 8050DBD 11
+. 83 C4 10 85 C0 0F 85 DC 00 00 00
+
+. 0 8050DC8 36
+. 9B DD B5 58 FF FF FF 8B 45 E4 0F 6F 45 D8 0F C4 C0 02 0F 7F 45 D0 DD A5 58 FF FF FF 66 81 7D D0 D2 04 75 2C
+
+. 0 8050DEC 8
+. 66 81 7D D2 2E 16 75 24
+
+. 0 8050DF4 7
+. 66 83 7D D4 FF 75 1D
+
+. 0 8050DFB 8
+. 66 81 7D D6 3D 22 75 15
+
+. 0 8050E03 13
+. 83 EC 0C 68 B6 75 05 08 E8 00 76 FF FF
+
+pinsrw_3 ... ok
+. 0 8050E10 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 8050EB4 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559AD 5
+. E8 0A B5 FF FF
+
+. 0 8050EBC 79
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E4 00 00 00 00 C7 45 E4 FF FF FF FF C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 D2 04 66 C7 45 DA 2E 16 66 C7 45 DC E1 10 66 C7 45 DE 3D 22 83 EC 08 6A 01 68 C0 92 05 08 E8 E5 74 FF FF
+
+. 0 8050F0B 11
+. 83 C4 10 85 C0 0F 85 DC 00 00 00
+
+. 0 8050F16 36
+. 9B DD B5 58 FF FF FF 8B 45 E4 0F 6F 45 D8 0F C4 C0 03 0F 7F 45 D0 DD A5 58 FF FF FF 66 81 7D D0 D2 04 75 2C
+
+. 0 8050F3A 8
+. 66 81 7D D2 2E 16 75 24
+
+. 0 8050F42 8
+. 66 81 7D D4 E1 10 75 1C
+
+. 0 8050F4A 7
+. 66 83 7D D6 FF 75 15
+
+. 0 8050F51 13
+. 83 EC 0C 68 F1 75 05 08 E8 B2 74 FF FF
+
+pinsrw_4 ... ok
+. 0 8050F5E 8
+. 83 C4 10 E9 9C 00 00 00
+
+. 0 8051002 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559B2 5
+. E8 53 B6 FF FF
+
+. 0 805100A 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 FF FF 66 C7 45 E2 02 00 66 C7 45 E4 FD FF 66 C7 45 E6 04 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 02 00 66 C7 45 DA FD FF 66 C7 45 DC 04 00 66 C7 45 DE FB FF 83 EC 08 6A 01 68 C0 92 05 08 E8 7F 73 FF FF
+
+. 0 8051071 11
+. 83 C4 10 85 C0 0F 85 B8 00 00 00
+
+. 0 805107C 35
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F EE C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 02 75 27
+
+. 0 805109F 7
+. 66 83 7D D2 02 75 20
+
+. 0 80510A6 7
+. 66 83 7D D4 04 75 19
+
+. 0 80510AD 7
+. 66 83 7D D6 04 75 12
+
+. 0 80510B4 13
+. 83 EC 0C 68 2C 76 05 08 E8 4F 73 FF FF
+
+pmaxsw_1 ... ok
+. 0 80510C1 5
+. 83 C4 10 EB 7E
+
+. 0 8051144 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559B7 5
+. E8 90 B7 FF FF
+
+. 0 805114C 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 FF FF 66 C7 45 E2 02 00 66 C7 45 E4 FD FF 66 C7 45 E6 04 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 02 00 66 C7 45 DA FD FF 66 C7 45 DC 04 00 66 C7 45 DE FB FF 83 EC 08 6A 01 68 C0 92 05 08 E8 3D 72 FF FF
+
+. 0 80511B3 11
+. 83 C4 10 85 C0 0F 85 B5 00 00 00
+
+. 0 80511BE 32
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F EE 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 02 75 27
+
+. 0 80511DE 7
+. 66 83 7D D2 02 75 20
+
+. 0 80511E5 7
+. 66 83 7D D4 04 75 19
+
+. 0 80511EC 7
+. 66 83 7D D6 04 75 12
+
+. 0 80511F3 13
+. 83 EC 0C 68 F9 76 05 08 E8 10 72 FF FF
+
+pmaxsw_2 ... ok
+. 0 8051200 5
+. 83 C4 10 EB 7E
+
+. 0 8051283 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559BC 5
+. E8 CA B8 FF FF
+
+. 0 805128B 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 01 C6 45 E1 02 C6 45 E2 03 C6 45 E3 04 C6 45 E4 05 C6 45 E5 06 C6 45 E6 07 C6 45 E7 08 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 08 C6 45 D9 07 C6 45 DA 06 C6 45 DB 05 C6 45 DC 04 C6 45 DD 03 C6 45 DE 02 C6 45 DF 01 83 EC 08 6A 01 68 C0 92 05 08 E8 EE 70 FF FF
+
+. 0 8051302 11
+. 83 C4 10 85 C0 0F 85 4B 01 00 00
+
+. 0 805130D 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F DE C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 08 75 3F
+
+. 0 805132F 6
+. 80 7D D1 07 75 39
+
+. 0 8051335 6
+. 80 7D D2 06 75 33
+
+. 0 805133B 6
+. 80 7D D3 05 75 2D
+
+. 0 8051341 6
+. 80 7D D4 05 75 27
+
+. 0 8051347 6
+. 80 7D D5 06 75 21
+
+. 0 805134D 6
+. 80 7D D6 07 75 1B
+
+. 0 8051353 6
+. 80 7D D7 08 75 15
+
+. 0 8051359 13
+. 83 EC 0C 68 34 77 05 08 E8 AA 70 FF FF
+
+pmaxub_1 ... ok
+. 0 8051366 8
+. 83 C4 10 E9 FA 00 00 00
+
+. 0 8051468 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559C1 5
+. E8 AA BA FF FF
+
+. 0 8051470 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 01 C6 45 E1 02 C6 45 E2 03 C6 45 E3 04 C6 45 E4 05 C6 45 E5 06 C6 45 E6 07 C6 45 E7 08 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 08 C6 45 D9 07 C6 45 DA 06 C6 45 DB 05 C6 45 DC 04 C6 45 DD 03 C6 45 DE 02 C6 45 DF 01 83 EC 08 6A 01 68 C0 92 05 08 E8 09 6F FF FF
+
+. 0 80514E7 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 80514F2 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F DE 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 08 75 3F
+
+. 0 8051511 6
+. 80 7D D1 07 75 39
+
+. 0 8051517 6
+. 80 7D D2 06 75 33
+
+. 0 805151D 6
+. 80 7D D3 05 75 2D
+
+. 0 8051523 6
+. 80 7D D4 05 75 27
+
+. 0 8051529 6
+. 80 7D D5 06 75 21
+
+. 0 805152F 6
+. 80 7D D6 07 75 1B
+
+. 0 8051535 6
+. 80 7D D7 08 75 15
+
+. 0 805153B 13
+. 83 EC 0C 68 6F 77 05 08 E8 C8 6E FF FF
+
+pmaxub_2 ... ok
+. 0 8051548 8
+. 83 C4 10 E9 FA 00 00 00
+
+. 0 805164A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559C6 5
+. E8 87 BC FF FF
+
+. 0 8051652 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 FF FF 66 C7 45 E2 02 00 66 C7 45 E4 FD FF 66 C7 45 E6 04 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 02 00 66 C7 45 DA FD FF 66 C7 45 DC 04 00 66 C7 45 DE FB FF 83 EC 08 6A 01 68 C0 92 05 08 E8 37 6D FF FF
+
+. 0 80516B9 11
+. 83 C4 10 85 C0 0F 85 B8 00 00 00
+
+. 0 80516C4 35
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F EA C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 FF 75 27
+
+. 0 80516E7 7
+. 66 83 7D D2 FD 75 20
+
+. 0 80516EE 7
+. 66 83 7D D4 FD 75 19
+
+. 0 80516F5 7
+. 66 83 7D D6 FB 75 12
+
+. 0 80516FC 13
+. 83 EC 0C 68 AA 77 05 08 E8 07 6D FF FF
+
+pminsw_1 ... ok
+. 0 8051709 5
+. 83 C4 10 EB 7E
+
+. 0 805178C 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559CB 5
+. E8 C4 BD FF FF
+
+. 0 8051794 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 FF FF 66 C7 45 E2 02 00 66 C7 45 E4 FD FF 66 C7 45 E6 04 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 02 00 66 C7 45 DA FD FF 66 C7 45 DC 04 00 66 C7 45 DE FB FF 83 EC 08 6A 01 68 C0 92 05 08 E8 F5 6B FF FF
+
+. 0 80517FB 11
+. 83 C4 10 85 C0 0F 85 B5 00 00 00
+
+. 0 8051806 32
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F EA 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 FF 75 27
+
+. 0 8051826 7
+. 66 83 7D D2 FD 75 20
+
+. 0 805182D 7
+. 66 83 7D D4 FD 75 19
+
+. 0 8051834 7
+. 66 83 7D D6 FB 75 12
+
+. 0 805183B 13
+. 83 EC 0C 68 E5 77 05 08 E8 C8 6B FF FF
+
+pminsw_2 ... ok
+. 0 8051848 5
+. 83 C4 10 EB 7E
+
+. 0 80518CB 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559D0 5
+. E8 FE BE FF FF
+
+. 0 80518D3 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 01 C6 45 E1 02 C6 45 E2 03 C6 45 E3 04 C6 45 E4 05 C6 45 E5 06 C6 45 E6 07 C6 45 E7 08 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 08 C6 45 D9 07 C6 45 DA 06 C6 45 DB 05 C6 45 DC 04 C6 45 DD 03 C6 45 DE 02 C6 45 DF 01 83 EC 08 6A 01 68 C0 92 05 08 E8 A6 6A FF FF
+
+. 0 805194A 11
+. 83 C4 10 85 C0 0F 85 4B 01 00 00
+
+. 0 8051955 34
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F DA C8 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 01 75 3F
+
+. 0 8051977 6
+. 80 7D D1 02 75 39
+
+. 0 805197D 6
+. 80 7D D2 03 75 33
+
+. 0 8051983 6
+. 80 7D D3 04 75 2D
+
+. 0 8051989 6
+. 80 7D D4 04 75 27
+
+. 0 805198F 6
+. 80 7D D5 03 75 21
+
+. 0 8051995 6
+. 80 7D D6 02 75 1B
+
+. 0 805199B 6
+. 80 7D D7 01 75 15
+
+. 0 80519A1 13
+. 83 EC 0C 68 20 78 05 08 E8 62 6A FF FF
+
+pminub_1 ... ok
+. 0 80519AE 8
+. 83 C4 10 E9 FA 00 00 00
+
+. 0 8051AB0 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559D5 5
+. E8 DE C0 FF FF
+
+. 0 8051AB8 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 01 C6 45 E1 02 C6 45 E2 03 C6 45 E3 04 C6 45 E4 05 C6 45 E5 06 C6 45 E6 07 C6 45 E7 08 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 08 C6 45 D9 07 C6 45 DA 06 C6 45 DB 05 C6 45 DC 04 C6 45 DD 03 C6 45 DE 02 C6 45 DF 01 83 EC 08 6A 01 68 C0 92 05 08 E8 C1 68 FF FF
+
+. 0 8051B2F 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 8051B3A 31
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F DA 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 80 7D D0 01 75 3F
+
+. 0 8051B59 6
+. 80 7D D1 02 75 39
+
+. 0 8051B5F 6
+. 80 7D D2 03 75 33
+
+. 0 8051B65 6
+. 80 7D D3 04 75 2D
+
+. 0 8051B6B 6
+. 80 7D D4 04 75 27
+
+. 0 8051B71 6
+. 80 7D D5 03 75 21
+
+. 0 8051B77 6
+. 80 7D D6 02 75 1B
+
+. 0 8051B7D 6
+. 80 7D D7 01 75 15
+
+. 0 8051B83 13
+. 83 EC 0C 68 5B 78 05 08 E8 80 68 FF FF
+
+pminub_2 ... ok
+. 0 8051B90 8
+. 83 C4 10 E9 FA 00 00 00
+
+. 0 8051C92 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559DA 5
+. E8 BB C2 FF FF
+
+. 0 8051C9A 62
+. 55 89 E5 57 56 53 81 EC 8C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C7 45 E0 88 80 00 80 C7 45 E4 00 00 00 80 C7 45 DC 00 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 18 67 FF FF
+
+. 0 8051CD8 7
+. 83 C4 10 85 C0 75 5F
+
+. 0 8051CDF 35
+. 9B DD B5 68 FF FF FF 0F 6F 6D E0 8B 45 DC 0F D7 C5 89 45 D8 DD A5 68 FF FF FF 81 7D D8 8B 00 00 00 75 12
+
+. 0 8051D02 13
+. 83 EC 0C 68 96 78 05 08 E8 01 67 FF FF
+
+pmovmskb_1 ... ok
+. 0 8051D0F 5
+. 83 C4 10 EB 3A
+
+. 0 8051D4E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559DF 5
+. E8 72 C3 FF FF
+
+. 0 8051D56 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 57 04 66 C7 45 E2 AE 08 66 C7 45 E4 05 0D 66 C7 45 E6 5C 11 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 B3 15 66 C7 45 DA 0A 1A 66 C7 45 DC 61 1E 66 C7 45 DE B8 22 83 EC 08 6A 01 68 C0 92 05 08 E8 33 66 FF FF
+
+. 0 8051DBD 11
+. 83 C4 10 85 C0 0F 85 D9 00 00 00
+
+. 0 8051DC8 35
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F E4 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 5E 75 2D
+
+. 0 8051DEB 8
+. 66 81 7D D2 E2 00 75 25
+
+. 0 8051DF3 8
+. 66 81 7D D4 8B 01 75 1D
+
+. 0 8051DFB 8
+. 66 81 7D D6 5A 02 75 15
+
+. 0 8051E03 13
+. 83 EC 0C 68 D7 78 05 08 E8 00 66 FF FF
+
+pmulhuw_1 ... ok
+. 0 8051E10 8
+. 83 C4 10 E9 99 00 00 00
+
+. 0 8051EB1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559E4 5
+. E8 D0 C4 FF FF
+
+. 0 8051EB9 103
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 57 04 66 C7 45 E2 AE 08 66 C7 45 E4 05 0D 66 C7 45 E6 5C 11 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 66 C7 45 D8 B3 15 66 C7 45 DA 0A 1A 66 C7 45 DC 61 1E 66 C7 45 DE B8 22 83 EC 08 6A 01 68 C0 92 05 08 E8 D0 64 FF FF
+
+. 0 8051F20 11
+. 83 C4 10 85 C0 0F 85 D6 00 00 00
+
+. 0 8051F2B 32
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F E4 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 5E 75 2D
+
+. 0 8051F4B 8
+. 66 81 7D D2 E2 00 75 25
+
+. 0 8051F53 8
+. 66 81 7D D4 8B 01 75 1D
+
+. 0 8051F5B 8
+. 66 81 7D D6 5A 02 75 15
+
+. 0 8051F63 13
+. 83 EC 0C 68 15 79 05 08 E8 A0 64 FF FF
+
+pmulhuw_2 ... ok
+. 0 8051F70 8
+. 83 C4 10 E9 99 00 00 00
+
+. 0 8052011 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559E9 5
+. E8 2B C6 FF FF
+
+. 0 8052019 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 01 C6 45 E1 02 C6 45 E2 03 C6 45 E3 04 C6 45 E4 05 C6 45 E5 06 C6 45 E6 07 C6 45 E7 08 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 08 C6 45 D9 07 C6 45 DA 06 C6 45 DB 05 C6 45 DC 04 C6 45 DD 03 C6 45 DE 02 C6 45 DF 01 83 EC 08 6A 01 68 C0 92 05 08 E8 60 63 FF FF
+
+. 0 8052090 11
+. 83 C4 10 85 C0 0F 85 B8 00 00 00
+
+. 0 805209B 35
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F F6 C8 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 20 75 27
+
+. 0 80520BE 7
+. 66 83 7D D2 00 75 20
+
+. 0 80520C5 7
+. 66 83 7D D4 00 75 19
+
+. 0 80520CC 7
+. 66 83 7D D6 00 75 12
+
+. 0 80520D3 13
+. 83 EC 0C 68 53 79 05 08 E8 30 63 FF FF
+
+psadbw_1 ... ok
+. 0 80520E0 5
+. 83 C4 10 EB 7E
+
+. 0 8052163 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559EE 5
+. E8 78 C7 FF FF
+
+. 0 805216B 119
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 C6 45 E0 01 C6 45 E1 02 C6 45 E2 03 C6 45 E3 04 C6 45 E4 05 C6 45 E5 06 C6 45 E6 07 C6 45 E7 08 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 C6 45 D8 08 C6 45 D9 07 C6 45 DA 06 C6 45 DB 05 C6 45 DC 04 C6 45 DD 03 C6 45 DE 02 C6 45 DF 01 83 EC 08 6A 01 68 C0 92 05 08 E8 0E 62 FF FF
+
+. 0 80521E2 11
+. 83 C4 10 85 C0 0F 85 B5 00 00 00
+
+. 0 80521ED 32
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F F6 4D E0 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 20 75 27
+
+. 0 805220D 7
+. 66 83 7D D2 00 75 20
+
+. 0 8052214 7
+. 66 83 7D D4 00 75 19
+
+. 0 805221B 7
+. 66 83 7D D6 00 75 12
+
+. 0 8052222 13
+. 83 EC 0C 68 8E 79 05 08 E8 E1 61 FF FF
+
+psadbw_2 ... ok
+. 0 805222F 5
+. 83 C4 10 EB 7E
+
+. 0 80522B2 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559F3 5
+. E8 C2 C8 FF FF
+
+. 0 80522BA 79
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 0B 00 66 C7 45 E2 16 00 66 C7 45 E4 21 00 66 C7 45 E6 2C 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 E7 60 FF FF
+
+. 0 8052309 11
+. 83 C4 10 85 C0 0F 85 B9 00 00 00
+
+. 0 8052314 36
+. 9B DD B5 58 FF FF FF 0F 6F 45 E0 0F 6F 4D D8 0F 70 C8 1B 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 2C 75 27
+
+. 0 8052338 7
+. 66 83 7D D2 21 75 20
+
+. 0 805233F 7
+. 66 83 7D D4 16 75 19
+
+. 0 8052346 7
+. 66 83 7D D6 0B 75 12
+
+. 0 805234D 13
+. 83 EC 0C 68 C9 79 05 08 E8 B6 60 FF FF
+
+pshufw_1 ... ok
+. 0 805235A 5
+. 83 C4 10 EB 7E
+
+. 0 80523DD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559F8 5
+. E8 E8 C9 FF FF
+
+. 0 80523E5 79
+. 55 89 E5 57 56 53 81 EC 9C 00 00 00 C7 45 E0 00 00 00 00 C7 45 E4 00 00 00 00 66 C7 45 E0 0B 00 66 C7 45 E2 16 00 66 C7 45 E4 21 00 66 C7 45 E6 2C 00 C7 45 D8 00 00 00 00 C7 45 DC 00 00 00 00 83 EC 08 6A 01 68 C0 92 05 08 E8 BC 5F FF FF
+
+. 0 8052434 11
+. 83 C4 10 85 C0 0F 85 B6 00 00 00
+
+. 0 805243F 33
+. 9B DD B5 58 FF FF FF 0F 6F 4D D8 0F 70 4D E0 1B 0F 7F 4D D0 DD A5 58 FF FF FF 66 83 7D D0 2C 75 27
+
+. 0 8052460 7
+. 66 83 7D D2 21 75 20
+
+. 0 8052467 7
+. 66 83 7D D4 16 75 19
+
+. 0 805246E 7
+. 66 83 7D D6 0B 75 12
+
+. 0 8052475 13
+. 83 EC 0C 68 04 7A 05 08 E8 8E 5F FF FF
+
+pshufw_2 ... ok
+. 0 8052482 5
+. 83 C4 10 EB 7E
+
+. 0 8052505 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 80559FD 5
+. E8 0B CB FF FF
+
+. 0 805250D 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 805252B 2
+. F3 AB
+
+. 0 805252D 52
+. B8 00 00 00 40 89 45 D8 B8 00 00 80 40 89 45 DC B8 00 00 00 3F 89 45 E0 B8 00 00 80 3E 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 805255F 2
+. F3 AB
+
+. 0 8052561 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 60 5E FF FF
+
+. 0 8052590 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 805259B 57
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F 53 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 00 00 00 3F 50 FF 75 B8 E8 2D 5F FF FF
+
+. 0 8048522 62
+. D9 45 08 D8 65 0C D9 E1 DD 5D F0 8B 45 08 89 45 E4 D9 45 E4 D9 E1 DD 05 C8 5B 05 08 DE C9 DD 5D E8 B8 00 00 00 00 BA 00 00 28 C0 52 50 B8 00 00 00 00 BA 00 00 00 40 52 50 E8 80 FE FF FF
+
+. 0 80483E0 6
+. FF 25 70 92 05 08
+
+. 0 80483E6 10
+. 68 10 00 00 00 E9 C0 FF FF FF
+
+. 0 3A9A8860 20
+. 55 89 E5 53 83 EC 34 DD 45 08 DD 45 10 D9 C9 E8 DC B2 FF FF
+
+. 0 3A9A3B50 4
+. 8B 1C 24 C3
+
+. 0 3A9A8874 26
+. 81 C3 D0 6F 01 00 DD 55 F0 D9 C9 DD 55 E8 DD 5C 24 08 DD 1C 24 E8 72 D6 FF FF
+
+. 0 3A9A5F00 34
+. DD 44 24 0C D9 E5 E8 00 00 00 00 59 81 C1 39 99 01 00 DF E0 88 E2 80 E4 45 80 FC 40 0F 84 CE 00 00 00
+
+. 0 3A9A5F22 9
+. 80 FC 05 0F 84 D5 00 00 00
+
+. 0 3A9A5F2B 5
+. 80 FC 01 74 6A
+
+. 0 3A9A5F30 25
+. DD 44 24 04 83 EC 08 D9 E5 DF E0 88 E6 80 E4 45 80 FC 40 0F 84 87 01 00 00
+
+. 0 3A9A5F49 9
+. 80 FC 05 0F 84 FE 00 00 00
+
+. 0 3A9A5F52 17
+. D9 C9 D9 C0 DF 3C 24 DF 2C 24 DD E9 DF E0 9E 75 4D
+
+. 0 3A9A5F63 9
+. 58 5A 83 CA 00 DD D8 79 0D
+
+. 0 3A9A5F6C 27
+. DC B9 DC BD FF FF F7 D8 83 D2 00 F7 DA DD 81 DC BD FF FF D9 C9 0F AC D0 01 73 06
+
+. 0 3A9A5F8D 10
+. D8 C8 D1 EA 89 C1 09 D1 75 EA
+
+. 0 3A9A5F81 6
+. 0F AC D0 01 73 06
+
+. 0 3A9A5F87 16
+. D9 C9 D8 C9 D9 C9 D8 C8 D1 EA 89 C1 09 D1 75 EA
+
+. 0 3A9A5F97 3
+. DD D8 C3
+
+. 0 3A9A888E 18
+. 8B 83 38 00 00 00 DD 5D E0 83 38 FF 0F 84 40 01 00 00
+
+. 0 3A9A88A0 11
+. DD 45 E8 DD 1C 24 E8 45 29 00 00
+
+. 0 3A9AB1F0 40
+. 55 89 E5 8B 45 08 8B 55 0C 5D 89 D1 89 C2 F7 DA 81 E1 FF FF FF 7F 09 D0 C1 E8 1F 09 C1 B8 00 00 F0 7F 29 C8 C1 E8 1F C3
+
+. 0 3A9A88AB 8
+. 85 C0 0F 85 2D 01 00 00
+
+. 0 3A9A88B3 11
+. DD 45 F0 DD 1C 24 E8 32 29 00 00
+
+. 0 3A9A88BE 4
+. 85 C0 74 23
+
+. 0 3A9A88E5 14
+. DD 45 F0 D9 EE D9 C9 DD E9 DF E0 9E 75 72
+
+. 0 3A9A8965 13
+. DD D8 DD 45 E0 DD 1C 24 E8 AE 28 00 00
+
+. 0 3A9AB220 17
+. 8B 44 24 08 B9 FF FF EF FF 29 C1 31 C8 C1 E8 1F C3
+
+. 0 3A9A8972 4
+. 85 C0 75 3A
+
+. 0 3A9A89B0 14
+. DD 45 E0 D9 EE D9 C9 DA E9 DF E0 9E 75 22
+
+. 0 3A9A89E0 9
+. DD 45 E0 83 C4 34 5B 5D C3
+
+. 0 8048560 20
+. 83 C4 10 DC 4D E8 DD 45 F0 D9 C9 DA E9 DF E0 F6 C4 45 74 02
+
+. 0 80525D4 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 80525DB 17
+. 83 EC 08 B8 00 00 80 3E 50 FF 75 BC E8 15 5F FF FF
+
+. 0 80525EC 7
+. 83 C4 10 85 C0 74 45
+
+. 0 80525F3 17
+. 83 EC 08 B8 00 00 00 40 50 FF 75 C0 E8 FD 5E FF FF
+
+. 0 8052604 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 805260B 17
+. 83 EC 08 B8 00 00 80 40 50 FF 75 C4 E8 E5 5E FF FF
+
+. 0 805261C 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8052623 13
+. 83 EC 0C 68 3F 7A 05 08 E8 E0 5D FF FF
+
+rcpps_1 ... ok
+. 0 8052630 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 80526F2 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A02 5
+. E8 F3 CC FF FF
+
+. 0 80526FA 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8052718 2
+. F3 AB
+
+. 0 805271A 52
+. B8 00 00 00 40 89 45 D8 B8 00 00 80 40 89 45 DC B8 00 00 00 3F 89 45 E0 B8 00 00 80 3E 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 805274C 2
+. F3 AB
+
+. 0 805274E 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 73 5C FF FF
+
+. 0 805277D 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 8052788 50
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F 53 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 00 00 00 3F 50 FF 75 B8 E8 47 5D FF FF
+
+. 0 80527BA 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 80527C1 17
+. 83 EC 08 B8 00 00 80 3E 50 FF 75 BC E8 2F 5D FF FF
+
+. 0 80527D2 7
+. 83 C4 10 85 C0 74 45
+
+. 0 80527D9 17
+. 83 EC 08 B8 00 00 00 40 50 FF 75 C0 E8 17 5D FF FF
+
+. 0 80527EA 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 80527F1 17
+. 83 EC 08 B8 00 00 80 40 50 FF 75 C4 E8 FF 5C FF FF
+
+. 0 8052802 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8052809 13
+. 83 EC 0C 68 77 7A 05 08 E8 FA 5B FF FF
+
+rcpps_2 ... ok
+. 0 8052816 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 80528D8 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A07 5
+. E8 D4 CE FF FF
+
+. 0 80528E0 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80528FE 2
+. F3 AB
+
+. 0 8052900 52
+. B8 00 00 00 40 89 45 D8 B8 00 00 80 40 89 45 DC B8 00 00 00 3F 89 45 E0 B8 00 00 80 3E 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8052932 2
+. F3 AB
+
+. 0 8052934 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 8D 5A FF FF
+
+. 0 8052963 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 805296E 58
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F 53 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 00 00 00 3F 50 FF 75 B8 E8 59 5B FF FF
+
+. 0 80529A8 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 80529AF 17
+. 83 EC 08 B8 7B 14 0E 40 50 FF 75 BC E8 41 5B FF FF
+
+. 0 80529C0 7
+. 83 C4 10 85 C0 74 45
+
+. 0 80529C7 17
+. 83 EC 08 B8 B8 1E 55 40 50 FF 75 C0 E8 29 5B FF FF
+
+. 0 80529D8 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 80529DF 17
+. 83 EC 08 B8 7B 14 8E 40 50 FF 75 C4 E8 11 5B FF FF
+
+. 0 80529F0 7
+. 83 C4 10 85 C0 74 15
+
+. 0 80529F7 13
+. 83 EC 0C 68 AF 7A 05 08 E8 0C 5A FF FF
+
+rcpss_1 ... ok
+. 0 8052A04 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 8052AC6 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A0C 5
+. E8 BD D0 FF FF
+
+. 0 8052ACE 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8052AEC 2
+. F3 AB
+
+. 0 8052AEE 52
+. B8 00 00 00 40 89 45 D8 B8 00 00 80 40 89 45 DC B8 00 00 00 3F 89 45 E0 B8 00 00 80 3E 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8052B20 2
+. F3 AB
+
+. 0 8052B22 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 9F 58 FF FF
+
+. 0 8052B51 11
+. 83 C4 10 85 C0 0F 85 41 01 00 00
+
+. 0 8052B5C 51
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F 53 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 00 00 00 3F 50 FF 75 B8 E8 72 59 FF FF
+
+. 0 8052B8F 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 8052B96 17
+. 83 EC 08 B8 7B 14 0E 40 50 FF 75 BC E8 5A 59 FF FF
+
+. 0 8052BA7 7
+. 83 C4 10 85 C0 74 45
+
+. 0 8052BAE 17
+. 83 EC 08 B8 B8 1E 55 40 50 FF 75 C0 E8 42 59 FF FF
+
+. 0 8052BBF 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8052BC6 17
+. 83 EC 08 B8 7B 14 8E 40 50 FF 75 C4 E8 2A 59 FF FF
+
+. 0 8052BD7 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8052BDE 13
+. 83 EC 0C 68 E7 7A 05 08 E8 25 58 FF FF
+
+rcpss_2 ... ok
+. 0 8052BEB 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 8052CAD 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A11 5
+. E8 9F D2 FF FF
+
+. 0 8052CB5 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8052CD3 2
+. F3 AB
+
+. 0 8052CD5 52
+. B8 00 00 80 40 89 45 D8 B8 00 00 80 41 89 45 DC B8 00 00 C8 41 89 45 E0 B8 00 00 80 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8052D07 2
+. F3 AB
+
+. 0 8052D09 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 B8 56 FF FF
+
+. 0 8052D38 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 8052D43 57
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F 52 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 02 F0 FF 3E 50 FF 75 B8 E8 85 57 FF FF
+
+. 0 8052D7C 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 8052D83 17
+. 83 EC 08 B8 02 F0 7F 3E 50 FF 75 BC E8 6D 57 FF FF
+
+. 0 8052D94 7
+. 83 C4 10 85 C0 74 45
+
+. 0 8052D9B 17
+. 83 EC 08 B8 15 C8 4C 3E 50 FF 75 C0 E8 55 57 FF FF
+
+. 0 8052DAC 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8052DB3 17
+. 83 EC 08 B8 BF EF FF 3D 50 FF 75 C4 E8 3D 57 FF FF
+
+. 0 8052DC4 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8052DCB 13
+. 83 EC 0C 68 1F 7B 05 08 E8 38 56 FF FF
+
+rsqrtps_1 ... ok
+. 0 8052DD8 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 8052E9A 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A16 5
+. E8 87 D4 FF FF
+
+. 0 8052EA2 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8052EC0 2
+. F3 AB
+
+. 0 8052EC2 52
+. B8 00 00 80 40 89 45 D8 B8 00 00 80 41 89 45 DC B8 00 00 C8 41 89 45 E0 B8 00 00 80 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8052EF4 2
+. F3 AB
+
+. 0 8052EF6 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 CB 54 FF FF
+
+. 0 8052F25 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 8052F30 50
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F 52 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 02 F0 FF 3E 50 FF 75 B8 E8 9F 55 FF FF
+
+. 0 8052F62 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 8052F69 17
+. 83 EC 08 B8 02 F0 7F 3E 50 FF 75 BC E8 87 55 FF FF
+
+. 0 8052F7A 7
+. 83 C4 10 85 C0 74 45
+
+. 0 8052F81 17
+. 83 EC 08 B8 15 C8 4C 3E 50 FF 75 C0 E8 6F 55 FF FF
+
+. 0 8052F92 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8052F99 17
+. 83 EC 08 B8 BF EF FF 3D 50 FF 75 C4 E8 57 55 FF FF
+
+. 0 8052FAA 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8052FB1 13
+. 83 EC 0C 68 5D 7B 05 08 E8 52 54 FF FF
+
+rsqrtps_2 ... ok
+. 0 8052FBE 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 8053080 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A1B 5
+. E8 68 D6 FF FF
+
+. 0 8053088 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80530A6 2
+. F3 AB
+
+. 0 80530A8 52
+. B8 00 00 80 41 89 45 D8 B8 9A 99 B1 40 89 45 DC B8 B8 1E D5 40 89 45 E0 B8 D7 A3 F8 40 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80530DA 2
+. F3 AB
+
+. 0 80530DC 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 E5 52 FF FF
+
+. 0 805310B 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 8053116 58
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F 52 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 02 F0 7F 3E 50 FF 75 B8 E8 B1 53 FF FF
+
+. 0 8053150 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 8053157 17
+. 83 EC 08 B8 7B 14 0E 40 50 FF 75 BC E8 99 53 FF FF
+
+. 0 8053168 7
+. 83 C4 10 85 C0 74 45
+
+. 0 805316F 17
+. 83 EC 08 B8 B8 1E 55 40 50 FF 75 C0 E8 81 53 FF FF
+
+. 0 8053180 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8053187 17
+. 83 EC 08 B8 7B 14 8E 40 50 FF 75 C4 E8 69 53 FF FF
+
+. 0 8053198 7
+. 83 C4 10 85 C0 74 15
+
+. 0 805319F 13
+. 83 EC 0C 68 9B 7B 05 08 E8 64 52 FF FF
+
+rsqrtss_1 ... ok
+. 0 80531AC 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 805326E 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A20 5
+. E8 51 D8 FF FF
+
+. 0 8053276 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8053294 2
+. F3 AB
+
+. 0 8053296 52
+. B8 00 00 80 41 89 45 D8 B8 9A 99 B1 40 89 45 DC B8 B8 1E D5 40 89 45 E0 B8 D7 A3 F8 40 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80532C8 2
+. F3 AB
+
+. 0 80532CA 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 F7 50 FF FF
+
+. 0 80532F9 11
+. 83 C4 10 85 C0 0F 85 41 01 00 00
+
+. 0 8053304 51
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F 52 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 02 F0 7F 3E 50 FF 75 B8 E8 CA 51 FF FF
+
+. 0 8053337 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 805333E 17
+. 83 EC 08 B8 7B 14 0E 40 50 FF 75 BC E8 B2 51 FF FF
+
+. 0 805334F 7
+. 83 C4 10 85 C0 74 45
+
+. 0 8053356 17
+. 83 EC 08 B8 B8 1E 55 40 50 FF 75 C0 E8 9A 51 FF FF
+
+. 0 8053367 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 805336E 17
+. 83 EC 08 B8 7B 14 8E 40 50 FF 75 C4 E8 82 51 FF FF
+
+. 0 805337F 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8053386 13
+. 83 EC 0C 68 D9 7B 05 08 E8 7D 50 FF FF
+
+rsqrtss_2 ... ok
+. 0 8053393 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 8053455 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A25 5
+. E8 33 DA FF FF
+
+. 0 805345D 24
+. 55 89 E5 57 56 53 83 EC 7C 83 EC 08 6A 01 68 C0 92 05 08 E8 7B 4F FF FF
+
+. 0 8053475 7
+. 83 C4 10 85 C0 75 22
+
+. 0 805347C 29
+. 9B DD B5 78 FF FF FF 0F AE F8 DD A5 78 FF FF FF 83 EC 0C 68 17 7C 05 08 E8 77 4F FF FF
+
+sfence_1 ... ok
+. 0 8053499 5
+. 83 C4 10 EB 10
+
+. 0 80534AE 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A2A 5
+. E8 87 DA FF FF
+
+. 0 80534B6 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80534D4 2
+. F3 AB
+
+. 0 80534D6 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8053508 2
+. F3 AB
+
+. 0 805350A 47
+. B8 A4 70 45 41 89 45 C8 B8 B8 1E 63 42 89 45 CC B8 0A D7 2C 42 89 45 D0 B8 CD 4C AF 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 B7 4E FF FF
+
+. 0 8053539 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 8053544 58
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F C6 C8 E4 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 A4 70 45 41 50 FF 75 B8 E8 83 4F FF FF
+
+. 0 805357E 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 8053585 17
+. 83 EC 08 B8 B8 1E 63 42 50 FF 75 BC E8 6B 4F FF FF
+
+. 0 8053596 7
+. 83 C4 10 85 C0 74 45
+
+. 0 805359D 17
+. 83 EC 08 B8 0A D7 2C 42 50 FF 75 C0 E8 53 4F FF FF
+
+. 0 80535AE 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 80535B5 17
+. 83 EC 08 B8 CD 4C AF 42 50 FF 75 C4 E8 3B 4F FF FF
+
+. 0 80535C6 7
+. 83 C4 10 85 C0 74 15
+
+. 0 80535CD 13
+. 83 EC 0C 68 3D 7C 05 08 E8 36 4E FF FF
+
+shufps_1 ... ok
+. 0 80535DA 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 805369C 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A2F 5
+. E8 70 DC FF FF
+
+. 0 80536A4 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80536C2 2
+. F3 AB
+
+. 0 80536C4 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80536F6 2
+. F3 AB
+
+. 0 80536F8 47
+. B8 A4 70 45 41 89 45 C8 B8 B8 1E 63 42 89 45 CC B8 0A D7 2C 42 89 45 D0 B8 CD 4C AF 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 C9 4C FF FF
+
+. 0 8053727 11
+. 83 C4 10 85 C0 0F 85 41 01 00 00
+
+. 0 8053732 51
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F C6 4D D8 B1 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 B8 1E 63 42 50 FF 75 B8 E8 9C 4D FF FF
+
+. 0 8053765 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 805376C 17
+. 83 EC 08 B8 A4 70 45 41 50 FF 75 BC E8 84 4D FF FF
+
+. 0 805377D 7
+. 83 C4 10 85 C0 74 45
+
+. 0 8053784 17
+. 83 EC 08 B8 CD 4C AF 42 50 FF 75 C0 E8 6C 4D FF FF
+
+. 0 8053795 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 805379C 17
+. 83 EC 08 B8 0A D7 2C 42 50 FF 75 C4 E8 54 4D FF FF
+
+. 0 80537AD 7
+. 83 C4 10 85 C0 74 15
+
+. 0 80537B4 13
+. 83 EC 0C 68 78 7C 05 08 E8 4F 4C FF FF
+
+shufps_2 ... ok
+. 0 80537C1 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 8053883 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A34 5
+. E8 52 DE FF FF
+
+. 0 805388B 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80538A9 2
+. F3 AB
+
+. 0 80538AB 52
+. B8 00 00 80 41 89 45 D8 B8 00 00 C8 41 89 45 DC B8 00 00 10 42 89 45 E0 B8 00 00 44 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80538DD 2
+. F3 AB
+
+. 0 80538DF 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 E2 4A FF FF
+
+. 0 805390E 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 8053919 57
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F 51 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 00 00 80 40 50 FF 75 B8 E8 AF 4B FF FF
+
+. 0 8053952 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 8053959 17
+. 83 EC 08 B8 00 00 A0 40 50 FF 75 BC E8 97 4B FF FF
+
+. 0 805396A 7
+. 83 C4 10 85 C0 74 45
+
+. 0 8053971 17
+. 83 EC 08 B8 00 00 C0 40 50 FF 75 C0 E8 7F 4B FF FF
+
+. 0 8053982 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8053989 17
+. 83 EC 08 B8 00 00 E0 40 50 FF 75 C4 E8 67 4B FF FF
+
+. 0 805399A 7
+. 83 C4 10 85 C0 74 15
+
+. 0 80539A1 13
+. 83 EC 0C 68 B3 7C 05 08 E8 62 4A FF FF
+
+sqrtps_1 ... ok
+. 0 80539AE 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 8053A70 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A39 5
+. E8 3A E0 FF FF
+
+. 0 8053A78 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8053A96 2
+. F3 AB
+
+. 0 8053A98 52
+. B8 00 00 80 41 89 45 D8 B8 00 00 C8 41 89 45 DC B8 00 00 10 42 89 45 E0 B8 00 00 44 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8053ACA 2
+. F3 AB
+
+. 0 8053ACC 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 F5 48 FF FF
+
+. 0 8053AFB 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 8053B06 50
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F 51 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 00 00 80 40 50 FF 75 B8 E8 C9 49 FF FF
+
+. 0 8053B38 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 8053B3F 17
+. 83 EC 08 B8 00 00 A0 40 50 FF 75 BC E8 B1 49 FF FF
+
+. 0 8053B50 7
+. 83 C4 10 85 C0 74 45
+
+. 0 8053B57 17
+. 83 EC 08 B8 00 00 C0 40 50 FF 75 C0 E8 99 49 FF FF
+
+. 0 8053B68 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8053B6F 17
+. 83 EC 08 B8 00 00 E0 40 50 FF 75 C4 E8 81 49 FF FF
+
+. 0 8053B80 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8053B87 13
+. 83 EC 0C 68 EE 7C 05 08 E8 7C 48 FF FF
+
+sqrtps_2 ... ok
+. 0 8053B94 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 8053C56 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A3E 5
+. E8 1B E2 FF FF
+
+. 0 8053C5E 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8053C7C 2
+. F3 AB
+
+. 0 8053C7E 52
+. B8 00 00 80 41 89 45 D8 B8 9A 99 B1 40 89 45 DC B8 B8 1E D5 40 89 45 E0 B8 D7 A3 F8 40 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8053CB0 2
+. F3 AB
+
+. 0 8053CB2 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 0F 47 FF FF
+
+. 0 8053CE1 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 8053CEC 58
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F 51 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 00 00 80 40 50 FF 75 B8 E8 DB 47 FF FF
+
+. 0 8053D26 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 8053D2D 17
+. 83 EC 08 B8 7B 14 0E 40 50 FF 75 BC E8 C3 47 FF FF
+
+. 0 8053D3E 7
+. 83 C4 10 85 C0 74 45
+
+. 0 8053D45 17
+. 83 EC 08 B8 B8 1E 55 40 50 FF 75 C0 E8 AB 47 FF FF
+
+. 0 8053D56 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8053D5D 17
+. 83 EC 08 B8 7B 14 8E 40 50 FF 75 C4 E8 93 47 FF FF
+
+. 0 8053D6E 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8053D75 13
+. 83 EC 0C 68 29 7D 05 08 E8 8E 46 FF FF
+
+sqrtss_1 ... ok
+. 0 8053D82 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 8053E44 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A43 5
+. E8 04 E4 FF FF
+
+. 0 8053E4C 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8053E6A 2
+. F3 AB
+
+. 0 8053E6C 52
+. B8 00 00 80 41 89 45 D8 B8 9A 99 B1 40 89 45 DC B8 B8 1E D5 40 89 45 E0 B8 D7 A3 F8 40 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8053E9E 2
+. F3 AB
+
+. 0 8053EA0 47
+. B8 7B 14 8E 3F 89 45 C8 B8 7B 14 0E 40 89 45 CC B8 B8 1E 55 40 89 45 D0 B8 7B 14 8E 40 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 21 45 FF FF
+
+. 0 8053ECF 11
+. 83 C4 10 85 C0 0F 85 41 01 00 00
+
+. 0 8053EDA 51
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F 51 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 00 00 80 40 50 FF 75 B8 E8 F4 45 FF FF
+
+. 0 8053F0D 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 8053F14 17
+. 83 EC 08 B8 7B 14 0E 40 50 FF 75 BC E8 DC 45 FF FF
+
+. 0 8053F25 7
+. 83 C4 10 85 C0 74 45
+
+. 0 8053F2C 17
+. 83 EC 08 B8 B8 1E 55 40 50 FF 75 C0 E8 C4 45 FF FF
+
+. 0 8053F3D 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8053F44 17
+. 83 EC 08 B8 7B 14 8E 40 50 FF 75 C4 E8 AC 45 FF FF
+
+. 0 8053F55 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8053F5C 13
+. 83 EC 0C 68 64 7D 05 08 E8 A7 44 FF FF
+
+sqrtss_2 ... ok
+. 0 8053F69 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 805402B 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A48 5
+. E8 E6 E5 FF FF
+
+. 0 8054033 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054051 2
+. F3 AB
+
+. 0 8054053 52
+. B8 A4 70 45 41 89 45 D8 B8 7B 14 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054085 2
+. F3 AB
+
+. 0 8054087 47
+. B8 00 00 30 42 89 45 C8 B8 00 00 04 42 89 45 CC B8 00 00 B0 41 89 45 D0 B8 00 00 30 41 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 3A 43 FF FF
+
+. 0 80540B6 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 80540C1 57
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F 5C C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 AE 47 FD 41 50 FF 75 B8 E8 07 44 FF FF
+
+. 0 80540FA 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 8054101 17
+. 83 EC 08 B8 F6 28 BE C1 50 FF 75 BC E8 EF 43 FF FF
+
+. 0 8054112 7
+. 83 C4 10 85 C0 74 45
+
+. 0 8054119 17
+. 83 EC 08 B8 14 AE A9 C1 50 FF 75 C0 E8 D7 43 FF FF
+
+. 0 805412A 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8054131 17
+. 83 EC 08 B8 CD 4C 99 C2 50 FF 75 C4 E8 BF 43 FF FF
+
+. 0 8054142 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8054149 13
+. 83 EC 0C 68 9F 7D 05 08 E8 BA 42 FF FF
+
+subps_1 ... ok
+. 0 8054156 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 8054218 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A4D 5
+. E8 CE E7 FF FF
+
+. 0 8054220 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 805423E 2
+. F3 AB
+
+. 0 8054240 52
+. B8 A4 70 45 41 89 45 D8 B8 7B 14 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054272 2
+. F3 AB
+
+. 0 8054274 47
+. B8 00 00 30 42 89 45 C8 B8 00 00 04 42 89 45 CC B8 00 00 B0 41 89 45 D0 B8 00 00 30 41 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 4D 41 FF FF
+
+. 0 80542A3 11
+. 83 C4 10 85 C0 0F 85 40 01 00 00
+
+. 0 80542AE 50
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 0F 5C 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 AE 47 FD 41 50 FF 75 B8 E8 21 42 FF FF
+
+. 0 80542E0 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 80542E7 17
+. 83 EC 08 B8 F6 28 BE C1 50 FF 75 BC E8 09 42 FF FF
+
+. 0 80542F8 7
+. 83 C4 10 85 C0 74 45
+
+. 0 80542FF 17
+. 83 EC 08 B8 14 AE A9 C1 50 FF 75 C0 E8 F1 41 FF FF
+
+. 0 8054310 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8054317 17
+. 83 EC 08 B8 CD 4C 99 C2 50 FF 75 C4 E8 D9 41 FF FF
+
+. 0 8054328 7
+. 83 C4 10 85 C0 74 15
+
+. 0 805432F 13
+. 83 EC 0C 68 D7 7D 05 08 E8 D4 40 FF FF
+
+subps_2 ... ok
+. 0 805433C 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 80543FE 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A52 5
+. E8 AF E9 FF FF
+
+. 0 8054406 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054424 2
+. F3 AB
+
+. 0 8054426 52
+. B8 A4 70 45 41 89 45 D8 B8 7B 14 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054458 2
+. F3 AB
+
+. 0 805445A 47
+. B8 00 00 30 42 89 45 C8 B8 00 00 04 42 89 45 CC B8 00 00 B0 41 89 45 D0 B8 00 00 30 41 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 67 3F FF FF
+
+. 0 8054489 11
+. 83 C4 10 85 C0 0F 85 48 01 00 00
+
+. 0 8054494 58
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 F3 0F 5C C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 AE 47 FD 41 50 FF 75 B8 E8 33 40 FF FF
+
+. 0 80544CE 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 80544D5 17
+. 83 EC 08 B8 00 00 04 42 50 FF 75 BC E8 1B 40 FF FF
+
+. 0 80544E6 7
+. 83 C4 10 85 C0 74 45
+
+. 0 80544ED 17
+. 83 EC 08 B8 00 00 B0 41 50 FF 75 C0 E8 03 40 FF FF
+
+. 0 80544FE 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8054505 17
+. 83 EC 08 B8 00 00 30 41 50 FF 75 C4 E8 EB 3F FF FF
+
+. 0 8054516 7
+. 83 C4 10 85 C0 74 15
+
+. 0 805451D 13
+. 83 EC 0C 68 0F 7E 05 08 E8 E6 3E FF FF
+
+subss_1 ... ok
+. 0 805452A 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 80545EC 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A57 5
+. E8 98 EB FF FF
+
+. 0 80545F4 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054612 2
+. F3 AB
+
+. 0 8054614 52
+. B8 A4 70 45 41 89 45 D8 B8 7B 14 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054646 2
+. F3 AB
+
+. 0 8054648 47
+. B8 00 00 30 42 89 45 C8 B8 00 00 04 42 89 45 CC B8 00 00 B0 41 89 45 D0 B8 00 00 30 41 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 79 3D FF FF
+
+. 0 8054677 11
+. 83 C4 10 85 C0 0F 85 41 01 00 00
+
+. 0 8054682 51
+. 9B DD B5 48 FF FF FF 0F 12 4D C8 0F 16 4D D0 F3 0F 5C 4D D8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 AE 47 FD 41 50 FF 75 B8 E8 4C 3E FF FF
+
+. 0 80546B5 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 80546BC 17
+. 83 EC 08 B8 00 00 04 42 50 FF 75 BC E8 34 3E FF FF
+
+. 0 80546CD 7
+. 83 C4 10 85 C0 74 45
+
+. 0 80546D4 17
+. 83 EC 08 B8 00 00 B0 41 50 FF 75 C0 E8 1C 3E FF FF
+
+. 0 80546E5 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 80546EC 17
+. 83 EC 08 B8 00 00 30 41 50 FF 75 C4 E8 04 3E FF FF
+
+. 0 80546FD 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8054704 13
+. 83 EC 0C 68 47 7E 05 08 E8 FF 3C FF FF
+
+subss_2 ... ok
+. 0 8054711 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 80547D3 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A5C 5
+. E8 7A ED FF FF
+
+. 0 80547DB 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80547F9 2
+. F3 AB
+
+. 0 80547FB 28
+. B8 5B 91 6A 43 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054815 2
+. F3 AB
+
+. 0 8054817 23
+. B8 62 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 C2 3B FF FF
+
+. 0 805482E 11
+. 83 C4 10 85 C0 0F 85 81 00 00 00
+
+. 0 8054839 64
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 9C 81 24 24 2A F7 FF FF 81 0C 24 D5 08 00 00 9D 0F 2E C8 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 85 C0 75 12
+
+. 0 8054879 13
+. 83 EC 0C 68 7F 7E 05 08 E8 8A 3B FF FF
+
+ucomiss_1 ... ok
+. 0 8054886 5
+. 83 C4 10 EB 3F
+
+. 0 80548CA 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A61 5
+. E8 6C EE FF FF
+
+. 0 80548D2 47
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E4 00 00 00 00 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80548FF 2
+. F3 AB
+
+. 0 8054901 23
+. B8 62 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 D8 3A FF FF
+
+. 0 8054918 7
+. 83 C4 10 85 C0 75 7A
+
+. 0 805491F 57
+. 9B DD B5 48 FF FF FF 0F 12 45 C8 0F 16 45 D0 9C 81 24 24 2A F7 FF FF 81 0C 24 D5 08 00 00 9D 0F 2E 45 E4 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 85 C0 75 12
+
+. 0 8054958 13
+. 83 EC 0C 68 BD 7E 05 08 E8 AB 3A FF FF
+
+ucomiss_2 ... ok
+. 0 8054965 5
+. 83 C4 10 EB 3F
+
+. 0 80549A9 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A66 5
+. E8 46 EF FF FF
+
+. 0 80549B1 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80549CF 2
+. F3 AB
+
+. 0 80549D1 28
+. B8 5B 91 6A 43 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 80549EB 2
+. F3 AB
+
+. 0 80549ED 23
+. B8 55 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 EC 39 FF FF
+
+. 0 8054A04 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 8054A0F 65
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 9C 81 24 24 2A F7 FF FF 81 0C 24 D4 08 00 00 9D 0F 2E C8 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 83 F8 01 75 12
+
+. 0 8054A50 13
+. 83 EC 0C 68 FB 7E 05 08 E8 B3 39 FF FF
+
+ucomiss_3 ... ok
+. 0 8054A5D 5
+. 83 C4 10 EB 3F
+
+. 0 8054AA1 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A6B 5
+. E8 39 F0 FF FF
+
+. 0 8054AA9 47
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E4 00 00 00 00 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054AD6 2
+. F3 AB
+
+. 0 8054AD8 23
+. B8 55 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 01 39 FF FF
+
+. 0 8054AEF 7
+. 83 C4 10 85 C0 75 7B
+
+. 0 8054AF6 58
+. 9B DD B5 48 FF FF FF 0F 12 45 C8 0F 16 45 D0 9C 81 24 24 2A F7 FF FF 81 0C 24 D4 08 00 00 9D 0F 2E 45 E4 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 83 F8 01 75 12
+
+. 0 8054B30 13
+. 83 EC 0C 68 39 7F 05 08 E8 D3 38 FF FF
+
+ucomiss_4 ... ok
+. 0 8054B3D 5
+. 83 C4 10 EB 3F
+
+. 0 8054B81 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A70 5
+. E8 14 F1 FF FF
+
+. 0 8054B89 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054BA7 2
+. F3 AB
+
+. 0 8054BA9 28
+. B8 5B 91 6A 43 89 45 D8 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054BC3 2
+. F3 AB
+
+. 0 8054BC5 23
+. B8 5B 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 14 38 FF FF
+
+. 0 8054BDC 11
+. 83 C4 10 85 C0 0F 85 82 00 00 00
+
+. 0 8054BE7 65
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 9C 81 24 24 2A F7 FF FF 81 0C 24 95 08 00 00 9D 0F 2E C8 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 83 F8 40 75 12
+
+. 0 8054C28 13
+. 83 EC 0C 68 77 7F 05 08 E8 DB 37 FF FF
+
+ucomiss_5 ... ok
+. 0 8054C35 5
+. 83 C4 10 EB 3F
+
+. 0 8054C79 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A75 5
+. E8 07 F2 FF FF
+
+. 0 8054C81 47
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 C7 45 E4 00 00 00 00 B8 5B 91 6A 43 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054CAE 2
+. F3 AB
+
+. 0 8054CB0 23
+. B8 5B 91 6A 43 89 45 C8 83 EC 08 6A 01 68 C0 92 05 08 E8 29 37 FF FF
+
+. 0 8054CC7 7
+. 83 C4 10 85 C0 75 7B
+
+. 0 8054CCE 58
+. 9B DD B5 48 FF FF FF 0F 12 45 C8 0F 16 45 D0 9C 81 24 24 2A F7 FF FF 81 0C 24 95 08 00 00 9D 0F 2E 45 E4 9C 8F 45 C4 DD A5 48 FF FF FF 8B 45 C4 25 D5 08 00 00 83 F8 40 75 12
+
+. 0 8054D08 13
+. 83 EC 0C 68 B5 7F 05 08 E8 FB 36 FF FF
+
+ucomiss_6 ... ok
+. 0 8054D15 5
+. 83 C4 10 EB 3F
+
+. 0 8054D59 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A7A 5
+. E8 E2 F2 FF FF
+
+. 0 8054D61 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054D7F 2
+. F3 AB
+
+. 0 8054D81 52
+. B8 A4 70 45 41 89 45 D8 B8 B8 1E 63 42 89 45 DC B8 0A D7 2C 42 89 45 E0 B8 CD 4C AF 42 89 45 E4 8D 7D C8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054DB3 2
+. F3 AB
+
+. 0 8054DB5 47
+. B8 1F 85 33 41 89 45 C8 B8 8F C2 05 42 89 45 CC B8 D7 A3 5E 42 89 45 D0 B8 8F C2 9B 42 89 45 D4 83 EC 08 6A 01 68 C0 92 05 08 E8 0C 36 FF FF
+
+. 0 8054DE4 11
+. 83 C4 10 85 C0 0F 85 47 01 00 00
+
+. 0 8054DEF 57
+. 9B DD B5 48 FF FF FF 0F 12 45 D8 0F 16 45 E0 0F 12 4D C8 0F 16 4D D0 0F 15 C8 0F 13 4D B8 0F 17 4D C0 DD A5 48 FF FF FF 83 EC 08 B8 D7 A3 5E 42 50 FF 75 B8 E8 D9 36 FF FF
+
+. 0 8054E28 7
+. 83 C4 10 85 C0 74 5D
+
+. 0 8054E2F 17
+. 83 EC 08 B8 0A D7 2C 42 50 FF 75 BC E8 C1 36 FF FF
+
+. 0 8054E40 7
+. 83 C4 10 85 C0 74 45
+
+. 0 8054E47 17
+. 83 EC 08 B8 8F C2 9B 42 50 FF 75 C0 E8 A9 36 FF FF
+
+. 0 8054E58 7
+. 83 C4 10 85 C0 74 2D
+
+. 0 8054E5F 17
+. 83 EC 08 B8 CD 4C AF 42 50 FF 75 C4 E8 91 36 FF FF
+
+. 0 8054E70 7
+. 83 C4 10 85 C0 74 15
+
+. 0 8054E77 13
+. 83 EC 0C 68 F3 7F 05 08 E8 8C 35 FF FF
+
+unpckhps_1 ... ok
+. 0 8054E84 8
+. 83 C4 10 E9 BA 00 00 00
+
+. 0 8054F46 8
+. 8D 65 F4 5B 5E 5F 5D C3
+
+. 0 8055A7F 5
+. E8 CA F4 FF FF
+
+. 0 8054F4E 32
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 8D 7D D8 FC BA 00 00 00 00 B8 04 00 00 00 89 C1 89 D0 F3 AB
+
+. 0 8054F6C 2
+. F3 AB
+
+. 0 8054F6E 52
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+unpckhps_2 ... ok
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+unpcklps_1 ... ok
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+unpcklps_2 ... ok
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+xorps_1 ... ok
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+xorps_2 ... ok
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diff --git a/main/VEX/orig_x86/manyfp.orig b/main/VEX/orig_x86/manyfp.orig
new file mode 100644
index 0000000..207a4cb
--- /dev/null
+++ b/main/VEX/orig_x86/manyfp.orig
@@ -0,0 +1,9635 @@
+==13306== valgrind-1.0.4, a memory error detector for x86 GNU/Linux.
+==13306== Copyright (C) 2000-2002, and GNU GPL'd, by Julian Seward.
+==13306== Startup, with flags:
+==13306== --suppressions=/home/sewardj/trunk/hacked104/Inst/lib/valgrind/default.supp
+==13306== -v
+==13306== Estimated CPU clock rate is 1000 MHz
+==13306==
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+vex iropt: 2 x unrolling (34 sts -> 68 sts)
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+vex iropt: 4 x unrolling (26 sts -> 104 sts)
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+vex iropt: 8 x unrolling (15 sts -> 120 sts)
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+vex iropt: 4 x unrolling (29 sts -> 116 sts)
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+vex iropt: 2 x unrolling (59 sts -> 118 sts)
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+vex iropt: 2 x unrolling (34 sts -> 68 sts)
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+vex iropt: 2 x unrolling (34 sts -> 68 sts)
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+vex iropt: 2 x unrolling (49 sts -> 98 sts)
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+vex iropt: 2 x unrolling (39 sts -> 78 sts)
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+vex iropt: 2 x unrolling (40 sts -> 80 sts)
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+vex iropt: 2 x unrolling (32 sts -> 64 sts)
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+vex iropt: 4 x unrolling (30 sts -> 120 sts)
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+vex iropt: 2 x unrolling (37 sts -> 74 sts)
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+***** EXPENSIVE 771 76
+
+. 770 805AA1B 53
+. 31 D2 52 8B 45 C8 50 DD 83 44 F6 FF FF DD 5D B0 DF 2C 24 DC BB CC F5 FF FF 83 EC 08 DD 83 34 F6 FF FF D9 C9 DD 14 24 DD 9D 78 FF FF FF DD 5D B8 E8 E0 DC FE FF
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+
+. 771 805AA50 23
+. DD 85 78 FF FF FF DC 8B BC F8 FF FF DD 1C 24 DD 5D A8 E8 C9 DC FE FF
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+
+. 772 805AA67 33
+. D9 C0 8B 45 DC D8 C1 C7 45 D0 01 00 00 00 D1 E8 DE C9 83 C4 10 39 45 D0 DD 5D A0 0F 83 27 01 00 00
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+
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+
+. 780 8055943 15
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+
+. 781 8055952 60
+. 31 C9 8B 55 0C 0F AF D1 8B 45 08 8B 75 DC DD 04 D0 8D 04 0E 0F AF 45 0C 8B 7D 08 DD 04 C7 D9 C1 D8 C1 D9 CA DE E1 D9 C9 DD 1C D7 FF 45 CC DD 1C C7 8B 45 D8 03 4D E0 39 45 CC 72 C6
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+
+. 782 805598E 50
+. 31 D2 52 8B 45 E0 50 DD 83 44 F6 FF FF DD 5D B8 DF 2C 24 DC BB D4 F5 FF FF 83 EC 08 DD 83 34 F6 FF FF D9 C9 DD 14 24 DD 5D 88 DD 5D C0 E8 70 2D FF FF
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+
+. 783 80559C0 20
+. DD 45 88 DC 8B BC F8 FF FF DD 1C 24 DD 5D B0 E8 5C 2D FF FF
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+
+. 784 80559D4 33
+. D9 C0 8B 45 DC D8 C1 C7 45 D0 01 00 00 00 D1 E8 DE C9 83 C4 10 39 45 D0 DD 5D A8 0F 83 24 01 00 00
+
+. 785 8055B19 6
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+
+. 786 8055B73 24
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+. FF 75 E4 FF 75 10 FF 75 0C FF 75 08 E8 9C 6E FF FF
+
+. 788 8055B9C 10
+. 31 C0 8D 65 F4 5B 5E 5F C9 C3
+***** EXPENSIVE 790 83
+vex iropt: 2 x unrolling (36 sts -> 72 sts)
+
+. 789 8049C48 20
+. 8B 55 E8 DD 04 C2 D8 F1 41 DD 1C C2 03 45 F0 3B 4D EC 72 EC
+***** EXPENSIVE 791 84
+vex iropt: 2 x unrolling (41 sts -> 82 sts)
+
+. 790 805AC54 42
+. 89 F1 8B 45 08 47 DD 04 F0 C1 E1 04 8B 45 0C 03 75 10 3B 7D 14 DD 1C 08 C7 44 08 08 00 00 00 00 C7 44 08 0C 00 00 00 00 72 D6
+
+. 791 8048BA0 13
+. BB 01 00 00 00 83 C1 02 3B 5D 0C 73 4F
+vex iropt: 4 x unrolling (18 sts -> 72 sts)
+
+. 792 8049164 12
+. 46 89 D0 89 F1 D3 E0 39 45 EC 77 F4
+vex iropt: 4 x unrolling (19 sts -> 76 sts)
+
+. 793 8049194 16
+. 89 D0 D1 E1 83 E0 01 43 09 C1 D1 EA 39 F3 72 F0
+
+. 794 8048AAC 10
+. 8B 7D 10 D1 EF 39 75 F0 73 2E
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+
+. 795 8048AB6 50
+. 8B 4D 0C 0F AF CE 8B 45 08 C1 E1 04 DD 04 08 8B 5D E8 DD 04 18 D9 C9 01 C1 DD 1C 18 DD 44 18 08 DD 41 08 DD 5C 18 08 D9 C9 DD 19 DD 59 08 39 F7 77 08
+vex iropt: 8 x unrolling (12 sts -> 96 sts)
+
+. 796 8048AE8 8
+. 29 FE D1 EF 39 F7 76 F8
+vex iropt: 8 x unrolling (13 sts -> 104 sts)
+
+. 797 804CDDC 7
+. D1 E0 41 39 D0 72 F9
+
+. 798 804C9D8 10
+. 8B 7D 10 D1 EF 39 75 F4 73 2E
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+
+. 799 804C9E2 50
+. 8B 4D 0C 0F AF CE 8B 55 08 C1 E1 04 DD 04 0A 8B 45 EC DD 04 02 D9 C9 01 D1 DD 1C 02 DD 44 02 08 DD 41 08 DD 5C 02 08 D9 C9 DD 19 DD 59 08 39 F7 77 08
+vex iropt: 8 x unrolling (12 sts -> 96 sts)
+
+. 800 804CA14 8
+. 29 FE D1 EF 39 F7 76 F8
+***** EXPENSIVE 802 87
+vex iropt: not unrolling (62 sts)
+
+. 801 804FEF8 68
+. 8D 14 0F 8B 45 0C 0F AF C1 0F AF 55 0C C1 E2 04 C1 E0 04 DD 04 16 DD 04 06 01 F2 D8 E1 01 F0 DD 1A DD 42 08 DD 40 08 D8 E1 DD 5A 08 D9 C9 03 4D B8 DC 00 D9 C9 DC 40 08 D9 C9 3B 4D 10 DD 18 DD 58 08 72 BC
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+
+. 802 804FE9C 50
+. 31 D2 52 57 DF 2C 24 DD 83 34 F6 FF FF D9 C9 D8 C0 83 EC 08 DC 7D C8 D9 C9 DD 5D D8 DD 83 44 F6 FF FF D9 C9 DD 14 24 DD 5D A8 DD 5D D0 E8 62 88 FF FF
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+
+. 803 804FF4C 63
+. DD 45 C0 DC 4D D0 DD 45 D8 DE E1 DD 45 D8 D8 CA DD 45 C0 D9 CA DE E1 D9 C9 DC 4D D8 DD 45 D0 D9 C9 DC 45 D0 D9 C9 D8 CB 31 C9 DE E9 D9 C9 3B 4D 10 DD 55 D8 D9 C9 DD 55 D0 0F 83 8E 00 00 00
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+
+. 804 804FF8B 97
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+***** EXPENSIVE 806 91
+
+. 805 804FFEC 16
+. DD D8 DD D8 FF 45 BC 39 7D BC 0F 82 50 FF FF FF
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+
+. 806 804FFFC 19
+. DD D8 FF 45 E0 8B 45 E4 D1 E7 39 45 E0 0F 82 8D FE FF FF
+vex iropt: 4 x unrolling (18 sts -> 72 sts)
+
+. 807 80499D0 12
+. 47 89 D0 89 F9 D3 E0 39 45 EC 77 F4
+vex iropt: 4 x unrolling (19 sts -> 76 sts)
+
+. 808 8049A00 16
+. 89 D0 D1 E1 83 E0 01 43 09 C1 D1 EA 39 FB 72 F0
+
+. 809 8048B34 10
+. 8B 7D 10 D1 EF 39 75 EC 73 18
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+
+. 810 8048B3E 28
+. 8B 5D 0C 8B 4D 08 8B 55 E4 0F AF DE DD 04 D1 DD 04 D9 DD 1C D1 DD 1C D9 39 F7 77 0A
+
+. 811 8048B5A 10
+. 89 F6 29 FE D1 EF 39 F7 76 F8
+
+. 812 804CA5C 10
+. 8B 7D 10 D1 EF 39 75 F4 73 1B
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+
+. 813 804CA66 31
+. 8B 55 EC 8B 4D 08 DD 04 D1 8B 4D 0C 8B 45 08 0F AF CE DD 04 C8 DD 1C D0 DD 1C C8 39 F7 77 0B
+
+. 814 804CA85 11
+. 8D 76 00 29 FE D1 EF 39 F7 76 F8
+***** EXPENSIVE 816 95
+vex iropt: 2 x unrolling (58 sts -> 116 sts)
+
+. 815 805A9E4 55
+. 8B 75 DC 8B 55 0C 0F AF D1 8D 04 0E 8B 75 08 0F AF 45 0C DD 04 D6 DD 04 C6 D9 C1 D8 C1 D9 CA DE E1 D9 C9 DD 1C D6 FF 45 CC DD 1C C6 8B 45 C4 03 4D C8 39 45 CC 72 C9
+
+. 816 805ABB5 15
+. C7 45 CC 00 00 00 00 8B 45 C4 39 45 CC 73 30
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+
+. 817 805ABC4 46
+. D1 6D DC 8B 55 C8 DD 83 E4 F8 FF FF 2B 55 DC 8B 45 0C 0F AF C2 8B 4D 08 DD 04 C1 FF 45 CC 8B 75 C4 D8 C9 03 55 C8 39 75 CC DD 1C C1 72 E1
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+
+. 818 805ABF2 17
+. DD D8 FF 45 D4 8B 45 E4 39 45 D4 0F 86 B8 FD FF FF
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+
+. 819 8055D52 94
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+
+. 820 8055B1F 15
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+
+. 821 8055B2E 67
+. 8B 75 DC D1 EE 8B 55 DC DD 83 D4 F8 FF FF 01 F2 31 C9 8D 04 0E 0F AF 45 0C 8B 7D 08 DD 04 C7 D8 C0 DD 1C C7 8B 45 0C 0F AF C2 DD 04 C7 D8 C9 DD 1C C7 FF 45 CC 8B 45 D8 03 55 E0 03 4D E0 39 45 CC 72 CF
+***** EXPENSIVE 823 100
+
+. 822 8055B71 26
+. DD D8 FF 45 D4 8B 55 E4 D1 6D DC D1 6D E0 D1 65 D8 39 55 D4 0F 86 B8 FD FF FF
+***** EXPENSIVE 824 101
+vex iropt: not unrolling (61 sts)
+
+. 823 8055954 58
+. 8B 55 0C 0F AF D1 8B 45 08 8B 75 DC DD 04 D0 8D 04 0E 0F AF 45 0C 8B 7D 08 DD 04 C7 D9 C1 D8 C1 D9 CA DE E1 D9 C9 DD 1C D7 FF 45 CC DD 1C C7 8B 45 D8 03 4D E0 39 45 CC 72 C6
+***** EXPENSIVE 825 102
+vex iropt: not unrolling (86 sts)
+
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+vex iropt: 8 x unrolling (12 sts -> 96 sts)
+
+. 825 8048B5C 8
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+vex iropt: 8 x unrolling (12 sts -> 96 sts)
+
+. 826 804CA88 8
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+***** EXPENSIVE 828 103
+vex iropt: 2 x unrolling (43 sts -> 86 sts)
+
+. 827 805ABD3 31
+. 8B 45 0C 0F AF C2 8B 4D 08 DD 04 C1 FF 45 CC 8B 75 C4 D8 C9 03 55 C8 39 75 CC DD 1C C1 72 E1
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+
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+
+. 829 805AADF 137
+. 8B 7D 88 03 7D C8 C7 45 8C 00 00 00 00 8B 4D 8C 03 4D D0 8B 45 8C 0F AF 4D 0C 03 45 DC 8B 55 08 DD 04 CA 89 C2 2B 55 D0 03 45 D0 0F AF 55 0C 0F AF 45 0C 8B 75 08 DD 04 D6 DD 04 C6 8B 75 0C 0F AF F7 89 85 74 FF FF FF 8B 45 08 DD 04 F0 DD 45 98 DD 45 90 DD 45 98 D9 CA D8 CC D9 C9 D8 CB D9 CA DE CB D9 C5 D9 C5 D9 CD DC 4D 90 D9 C9 D8 C2 D9 CD D8 C4 D9 CD D8 E3 D9 CD D8 C1 D9 CF DE E2 D9 CD DE E3 D9 CB DD 1C C8
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+
+. 830 805AB68 51
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+
+. 831 805AB9B 20
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+vex iropt: not unrolling (69 sts)
+
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+. 8B 4D 14 2B 4D F0 8B 45 08 0F AF 4D 10 89 FE DD 04 F8 8B 14 C8 C1 E6 04 89 4D E8 8B 4C C8 04 8B 45 0C 89 4C 30 0C DD 14 30 89 54 30 08 8B 45 E8 C1 E0 04 8B 75 0C 81 F1 00 00 00 80 FF 45 F0 DD 1C 06 89 54 06 08 89 4C 06 0C 8B 45 14 2B 45 F0 03 7D 10 39 45 F0 72 A8
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+
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+***** EXPENSIVE 835 109
+
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+
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+***** EXPENSIVE 837 111
+
+. 836 8055B01 24
+. DD D8 DD D8 8B 45 DC FF 45 D0 D1 E8 FF 4D A0 39 45 D0 0F 82 E3 FE FF FF
+***** EXPENSIVE 838 112
+vex iropt: 2 x unrolling (55 sts -> 110 sts)
+
+. 837 8055B40 49
+. 8D 04 0E 0F AF 45 0C 8B 7D 08 DD 04 C7 D8 C0 DD 1C C7 8B 45 0C 0F AF C2 DD 04 C7 D8 C9 DD 1C C7 FF 45 CC 8B 45 D8 03 55 E0 03 4D E0 39 45 CC 72 CF
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+
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+
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+***** EXPENSIVE 841 115
+
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+***** EXPENSIVE 842 116
+
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+***** EXPENSIVE 843 117
+
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+
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+
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+
+. 850 8048C53 15
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+
+. 851 8048C62 79
+. DD 05 28 E9 05 08 DD 05 30 E9 05 08 DD 05 38 E9 05 08 89 C1 89 F6 31 D2 52 53 DF 2C 24 D9 C0 8B 75 E4 D8 C4 D9 C9 8B 45 E0 DD 14 DE D9 C9 DD 1C D8 D9 C0 D8 C3 D9 C9 8B 75 DC D8 C2 D9 C9 8B 45 D8 DD 1C DE DD 1C D8 43 83 C4 08 39 CB 72 C7
+***** EXPENSIVE 853 120
+vex iropt: not unrolling (63 sts)
+
+. 852 8048C78 57
+. 31 D2 52 53 DF 2C 24 D9 C0 8B 75 E4 D8 C4 D9 C9 8B 45 E0 DD 14 DE D9 C9 DD 1C D8 D9 C0 D8 C3 D9 C9 8B 75 DC D8 C2 D9 C9 8B 45 D8 DD 1C DE DD 1C D8 43 83 C4 08 39 CB 72 C7
+***** EXPENSIVE 854 121
+
+. 853 8048CB1 16
+. DD D8 DD D8 DD D8 83 EC 0C 6A 00 E8 5F 50 01 00
+
+. 854 8048CC1 8
+. 89 3C 24 E8 33 41 00 00
+
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+
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+vex iropt: 8 x unrolling (15 sts -> 120 sts)
+
+. 862 804CBD5 2
+. F3 A5
+
+. 863 804CBD7 5
+. E8 88 00 00 00
+
+. 864 804CC64 36
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+
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+
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+
+. 867 804CD91 4
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+
+. 868 804CD84 8
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+
+. 869 804CBDC 8
+. 8D 65 F4 5B 5E 5F C9 C3
+
+. 870 804CE92 11
+. 83 C4 10 85 C0 0F 85 8F 01 00 00
+***** EXPENSIVE 872 122
+
+. 871 804CE9D 61
+. 8B 4D E4 8B 55 C4 89 4A 04 31 D2 52 8B 45 08 50 DF 2C 24 C7 45 DC 00 00 00 00 83 C4 08 DC BB CC F5 FF FF 39 4D DC DD 5D C8 C7 45 D8 01 00 00 00 C7 45 E0 00 00 00 00 0F 83 12 01 00 00
+
+. 872 804CEDA 87
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+
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+. 874 804CFEC 8
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+. 876 804CE31 8
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+
+. 877 8048CC9 26
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+
+. 878 8048CE3 9
+. 83 C4 14 57 E8 A4 43 00 00
+
+. 879 804D090 28
+. 55 89 E5 57 56 53 83 EC 0C 8B 75 08 E8 00 00 00 00 5B 81 C3 73 40 01 00 85 F6 75 24
+
+. 880 804D0D0 10
+. 83 EC 0C 6A 08 E8 B6 B5 FF FF
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+
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+vex iropt: 2 x unrolling (59 sts -> 118 sts)
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+***** EXPENSIVE 1193 172
+vex iropt: not unrolling (61 sts)
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+vex iropt: 2 x unrolling (34 sts -> 68 sts)
+
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+vex iropt: 2 x unrolling (35 sts -> 70 sts)
+
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+vex iropt: 4 x unrolling (20 sts -> 80 sts)
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+vex iropt: 2 x unrolling (43 sts -> 86 sts)
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+vex iropt: 2 x unrolling (39 sts -> 78 sts)
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+vex iropt: 2 x unrolling (40 sts -> 80 sts)
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+vex iropt: 2 x unrolling (36 sts -> 72 sts)
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+vex iropt: 2 x unrolling (43 sts -> 86 sts)
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+. 31 C0 E9 07 FF FF FF
+vex iropt: 2 x unrolling (36 sts -> 72 sts)
+
+. 1392 804A5C8 26
+. 8B 04 D7 8B 4D DC 89 04 D1 8B 44 D7 04 43 89 44 D1 04 03 55 08 3B 5D 0C 72 E6
+***** EXPENSIVE 1394 204
+
+. 1393 804A0A8 49
+. 8B 45 0C D9 04 C8 8B 55 14 D9 44 C8 04 D9 C9 D8 2C CA D9 C9 D8 6C CA 04 D9 C9 D9 E1 D9 C9 D9 E1 DE C1 D8 C9 DD E2 DF E0 F6 C4 45 0F 85 FB 00 00 00
+***** EXPENSIVE 1395 205
+
+. 1394 804A0D9 11
+. DD DA 43 03 4D 18 3B 5D 1C 72 C4
+***** EXPENSIVE 1396 206
+vex iropt: 2 x unrolling (44 sts -> 88 sts)
+
+. 1395 80507B4 26
+. D9 04 C6 D8 C9 D9 1C C6 D9 44 C6 04 D8 C9 42 D9 5C C6 04 03 45 0C 39 FA 72 E6
+***** EXPENSIVE 1397 207
+vex iropt: 2 x unrolling (47 sts -> 94 sts)
+
+. 1396 804A6AC 30
+. 8B 55 E4 D9 04 C2 D8 C9 D9 1C C2 D9 44 C2 04 D8 C9 43 D9 5C C2 04 03 45 08 3B 5D 0C 72 E2
+vex iropt: 4 x unrolling (24 sts -> 96 sts)
+
+. 1397 804BFFC 23
+. 43 C7 04 C1 00 00 00 00 C7 44 C1 04 00 00 00 00 03 45 10 39 F3 72 E9
+***** EXPENSIVE 1399 208
+
+. 1398 804C04C 38
+. 89 F8 31 D2 F7 F6 89 D0 31 D2 52 50 DF 2C 24 DC 0D E0 06 06 08 83 EC 08 DC 75 D8 DD 14 24 DD 5D B8 E8 AE C5 FF FF
+***** EXPENSIVE 1400 209
+vex iropt: 2 x unrolling (35 sts -> 70 sts)
+
+. 1399 804C120 18
+. D9 C9 40 D9 14 CB D9 C9 D9 54 CB 04 01 F9 39 D0 72 EE
+vex iropt: 4 x unrolling (22 sts -> 88 sts)
+
+. 1400 804C13C 22
+. 40 C7 04 CE 00 00 00 00 C7 44 CE 04 00 00 00 00 01 F9 39 D0 72 EA
+***** EXPENSIVE 1402 210
+
+. 1401 804C1C8 39
+. 89 F0 31 D2 F7 75 0C 89 D0 31 D2 52 50 DF 2C 24 DC 0D E8 06 06 08 83 EC 08 DC 75 D8 DD 14 24 DD 5D C8 E8 31 C4 FF FF
+vex iropt: 4 x unrolling (27 sts -> 108 sts)
+
+. 1402 804C24C 27
+. 8B 55 20 43 C7 04 C2 00 00 00 00 C7 44 C2 04 00 00 00 00 03 45 10 3B 5D 0C 72 E5
+***** EXPENSIVE 1404 211
+
+. 1403 804C26E 59
+. 8B 45 08 31 D2 F7 75 0C 8B 4D 10 0F AF CA 31 D2 52 8B 45 0C 50 DF 2C 24 D9 45 14 8B 45 20 D8 C9 D9 C9 D8 4D 18 D9 C9 D9 1C C8 D9 5C C8 04 83 C4 08 31 C0 8D 65 F4 5B 5E 5F C9 C3
+
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+
+. 1407 805880A 21
+. 8B 55 C0 FF 45 C8 8B 4D C4 01 55 B0 39 4D C8 0F 82 61 FF FF FF
+vex iropt: 2 x unrolling (37 sts -> 74 sts)
+
+. 1408 80497D0 34
+. 89 D8 C1 E0 04 8B 75 DC 8B 54 06 04 41 8B 04 06 8B 75 E0 89 04 DE 89 54 DE 04 03 5D F0 3B 4D EC 72 DE
+
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+
+. 1413 8058AC9 41
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+
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+***** EXPENSIVE 1417 212
+
+. 1416 8058CB2 90
+. 8B 4D 18 49 31 FF 31 F6 89 F6 8B 45 EC 01 F0 8B 55 0C 0F AF D6 89 45 D0 8B 45 08 DD 04 D0 8B 45 D0 0F AF 45 0C 8B 55 08 DD 04 C2 D9 C1 8B 45 14 0F AF C7 8B 55 10 D8 C1 DD 1C C2 8B 45 14 0F AF C1 DE E9 DD 1C C2 FF 45 F0 8B 45 E8 03 4D 18 03 7D 18 03 75 E4 39 45 F0 72 B0
+
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+. 8B 75 0C C1 E6 03 8B 4D 08 89 75 D0 8B 75 E8 8B 04 FE 8B 54 FE 04 47 89 01 89 51 04 03 4D D0 3B 7D 10 72 E8
+vex iropt: 2 x unrolling (32 sts -> 64 sts)
+
+. 1424 8058B58 24
+. 8B 75 E8 8B 04 FE 8B 54 FE 04 47 89 01 89 51 04 03 4D D0 3B 7D 10 72 E8
+
+. 1425 8058B70 2
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+
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+
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+
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+
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+
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+
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+***** EXPENSIVE 1439 213
+
+. 1438 8053C39 89
+. 8B 45 E0 C1 E0 04 8D 50 F8 31 C9 89 C6 89 F6 8B 45 0C 0F AF C1 C1 E0 04 8B 7D 08 DD 04 07 8B 45 0C 0F AF C2 DD 04 38 D9 C1 8B 45 14 0F AF C1 8B 7D 10 D8 C1 DD 1C C7 8B 7D E8 8D 04 0F 0F AF 45 14 DE E9 8B 7D 10 DD 1C C7 FF 45 EC 8B 45 D8 01 F2 03 4D E0 39 45 EC 72 B6
+
+. 1439 8053C92 10
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+
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+
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+
+. 1444 8053AAF 12
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+***** EXPENSIVE 1446 214
+
+. 1445 8053ABB 35
+. 8B 75 0C C1 E6 03 8B 4D 08 89 75 CC 90 8B 45 D8 8B 55 F0 DD 04 C2 40 DD 19 03 4D CC 39 F8 89 45 D8 72 EA
+***** EXPENSIVE 1447 215
+vex iropt: 2 x unrolling (33 sts -> 66 sts)
+
+. 1446 8053AC8 22
+. 8B 45 D8 8B 55 F0 DD 04 C2 40 DD 19 03 4D CC 39 F8 89 45 D8 72 EA
+
+. 1447 8053ADE 2
+. EB C8
+
+. 1448 8053AA8 7
+. 31 C0 E9 0C FF FF FF
+***** EXPENSIVE 1450 216
+vex iropt: 2 x unrolling (36 sts -> 72 sts)
+
+. 1449 80498A4 20
+. 8B 55 E0 DD 04 C2 D8 F1 41 DD 1C C2 03 45 F0 3B 4D EC 72 EC
+
+. 1450 805AD0A 17
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+
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+
+. 1453 805ADFB 17
+. 8B 45 B8 FF 45 C0 8B 55 BC 01 45 AC 39 55 C0 72 DC
+
+. 1454 804C554 5
+. E8 F3 F3 FF FF
+vex iropt: 4 x unrolling (29 sts -> 116 sts)
+
+. 1455 804AFBC 21
+. 8B 5D E0 8B 04 D3 41 8B 5D E4 89 04 93 03 55 08 3B 4D 0C 72 EB
+
+. 1456 805B0A8 10
+. 8B 45 10 8B 75 14 3B 06 74 26
+
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+. 1459 805B0FF 34
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+
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+. 8B 75 08 89 75 E0 8B 4D 0C 8B 75 E8 89 4D DC 89 75 D8 C7 45 D4 01 00 00 00 C7 45 E4 01 00 00 00 83 FA 02 0F 84 12 01 00 00
+
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+. 50 8B 75 14 FF B4 BE 08 01 00 00 FF 75 10 FF 75 EC FF 75 D4 FF 75 D8 FF 75 DC FF 75 E0 E8 52 00 00 00
+
+. 1462 805B2D0 46
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+***** EXPENSIVE 1464 217
+
+. 1463 805B2FE 90
+. 8B 4D 18 49 31 FF 31 F6 89 F6 8B 45 EC 01 F0 8B 55 0C 0F AF D6 89 45 D4 8B 45 08 D9 04 90 8B 45 D4 0F AF 45 0C 8B 55 08 D9 04 82 D9 C1 8B 45 14 0F AF C7 8B 55 10 D8 C1 D9 1C 82 8B 45 14 0F AF C1 DE E9 D9 1C 82 FF 45 F0 8B 45 E8 03 4D 18 03 7D 18 03 75 E4 39 45 F0 72 B0
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+
+. 1470 805B1A4 28
+. 8B 4D 0C 8B 55 08 C1 E1 02 8D 76 00 8B 75 E8 8B 04 BE 47 89 02 01 CA 3B 7D 10 72 F0
+vex iropt: 4 x unrolling (24 sts -> 96 sts)
+
+. 1471 805B1B0 16
+. 8B 75 E8 8B 04 BE 47 89 02 01 CA 3B 7D 10 72 F0
+
+. 1472 805B1C0 2
+. EB D4
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+
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+
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+
+. 1481 80561FF 41
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+
+. 1482 8056228 41
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+
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+
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+***** EXPENSIVE 1486 218
+
+. 1485 8056431 86
+. 8B 45 E0 C1 E0 03 8D 50 FC 31 C9 89 C6 89 F6 8B 45 0C 0F AF C1 8B 7D 08 D9 04 C7 8B 45 0C 0F AF C2 D9 04 38 D9 C1 8B 45 14 0F AF C1 8B 7D 10 D8 C1 D9 1C 87 8B 7D E8 8D 04 0F 0F AF 45 14 DE E9 8B 7D 10 D9 1C 87 FF 45 EC 8B 45 D8 01 F2 03 4D E0 39 45 EC 72 B9
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+. 1487 8056661 8
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+. 1492 80562B6 36
+. 8B 7D 0C C1 E7 02 8B 55 08 89 7D CC 89 F6 8B 4D D8 8B 7D F0 8B 04 8F 41 89 02 03 55 CC 39 F1 89 4D D8 72 EA
+vex iropt: 4 x unrolling (27 sts -> 108 sts)
+
+. 1493 80562C4 22
+. 8B 4D D8 8B 7D F0 8B 04 8F 41 89 02 03 55 CC 39 F1 89 4D D8 72 EA
+
+. 1494 80562DA 2
+. EB C7
+
+. 1495 80562A3 7
+. 31 C0 E9 0D FF FF FF
+***** EXPENSIVE 1497 219
+vex iropt: 2 x unrolling (38 sts -> 76 sts)
+
+. 1496 804B084 20
+. 8B 55 E4 D9 04 82 D8 F1 41 D9 1C 82 03 45 08 3B 4D 0C 72 EC
+vex iropt: 2 x unrolling (32 sts -> 64 sts)
+
+. 1497 805D41C 26
+. 8B 75 08 8B 04 96 41 89 04 D7 C7 44 D7 04 00 00 00 00 03 55 10 3B 4D 14 72 E6
+
+. 1498 804A408 13
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+
+. 1499 804CF40 22
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+
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+
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+***** EXPENSIVE 1503 220
+
+. 1502 804D82C 116
+. 55 89 E5 57 56 53 83 EC 7C BE AB AA AA AA 8B 45 20 F7 E6 D1 EA 8B 4D 1C 89 55 E0 8B 45 20 31 D2 F7 F1 89 45 DC 89 C8 F7 E6 89 55 84 D1 EA E8 00 00 00 00 5B 81 C3 B5 38 01 00 89 95 7C FF FF FF D1 E2 C7 45 EC 00 00 00 00 31 FF 89 45 80 89 55 D8 DD 83 B4 F8 FF FF D9 FA 8B 45 DC DC 8B BC F8 FF FF 39 C7 DD 5D D0 C7 45 E8 00 00 00 00 0F 83 DC 01 00 00
+
+. 1503 804D8A0 27
+. C7 45 8C 00 00 00 00 C7 45 88 00 00 00 00 89 F6 8B 75 E8 85 F6 0F 85 CB 01 00 00
+***** EXPENSIVE 1505 221
+
+. 1504 804D8BB 52
+. DD 83 34 F6 FF FF DD 5D C8 DD 83 44 F6 FF FF DD 5D C0 DD 45 C8 DD 5D B8 DD 45 C0 DD 5D B0 C7 45 E4 00 00 00 00 8B 85 7C FF FF FF 39 45 E4 0F 83 77 01 00 00
+***** EXPENSIVE 1506 222
+
+. 1505 804D8EF 149
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+***** EXPENSIVE 1507 223
+
+. 1506 804D984 126
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+***** EXPENSIVE 1508 224
+
+. 1507 804DA02 100
+. DE C3 D9 CA DD 5C 02 08 8B 95 7C FF FF FF 8D 04 57 DD 45 B8 DD 45 B0 D9 C9 0F AF 45 14 D8 CB D9 C9 D8 CA D9 CB DC 4D B0 D9 CA DC 4D B8 D9 C9 C1 E0 04 8B 55 10 DE E3 DE C1 D9 C9 DD 1C 02 DD 5C 02 08 FF 45 E4 8B 45 0C 8B 95 7C FF FF FF 03 4D 90 01 45 88 FF 45 EC 03 75 94 47 39 55 E4 0F 82 B6 FE FF FF
+
+. 1508 804DA66 22
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+
+. 1509 804DA7C 10
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+
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+
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+
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+
+. 1513 80508CE 9
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+
+. 1514 8050A9C 45
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+***** EXPENSIVE 1516 225
+
+. 1515 8050CA0 113
+. 55 89 E5 57 56 53 83 EC 64 BE AB AA AA AA 8B 45 20 F7 E6 D1 EA 8B 4D 1C 89 55 DC 8B 45 20 31 D2 F7 F1 89 45 D8 89 C8 F7 E6 89 55 9C D1 EA E8 00 00 00 00 5B 81 C3 41 04 01 00 89 55 94 D1 E2 C7 45 E8 00 00 00 00 31 FF 89 45 98 89 55 D4 DD 83 B4 F8 FF FF D9 FA 8B 55 D8 DC 8B BC F8 FF FF 39 D7 D9 5D D0 C7 45 E4 00 00 00 00 0F 83 AD 01 00 00
+
+. 1516 8050D11 18
+. C7 45 A4 00 00 00 00 8B 45 E4 85 C0 0F 85 A5 01 00 00
+***** EXPENSIVE 1518 226
+
+. 1517 8050D23 49
+. D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D9 55 CC D9 C9 D9 55 C8 D9 C9 D9 5D C4 D9 5D C0 C7 45 E0 00 00 00 00 8B 45 94 39 45 E0 0F 83 54 01 00 00
+***** EXPENSIVE 1519 227
+
+. 1518 8050D54 146
+. D9 45 D0 DA 4D 18 8B 75 14 8B 4D E8 D9 5D B0 0F AF F7 0F AF 4D 0C 89 F6 8B 45 08 D9 04 C8 D9 44 C8 04 8B 45 E8 03 45 DC 0F AF 45 0C 8B 55 08 D9 04 C2 D9 C9 D9 5D B8 D9 44 C2 04 8B 55 E8 8B 45 DC 8D 04 42 89 45 98 8B 55 08 0F AF 45 0C D9 04 C2 D9 C2 D9 CC D9 5D BC DC C3 DD 83 BC F8 FF FF D8 CC D9 44 C2 04 D9 C9 D8 6D BC D9 C3 D8 C2 D9 C9 D9 5D EC DD 83 BC F8 FF FF D8 C9 D8 6D B8 D9 5D B4 D9 CC DE E2 DE EA D9 C9 D8 4D B0 D9 45 EC D9 CA
+***** EXPENSIVE 1520 228
+
+. 1519 8050DE6 126
+. D8 4D B0 D9 45 B4 D9 CD D8 45 BC D9 CC D8 45 B8 D9 CD D8 C1 D9 C3 D9 CA D8 6D B4 D9 CC D8 C3 D9 CA DE E3 D9 CC D9 55 BC D9 CD D9 55 B8 D9 C9 D9 55 AC D9 CB D9 55 A8 8B 45 10 8B 55 94 D9 45 CC D9 45 C8 D9 CF D9 1C F0 D9 CA D9 5C F0 04 D9 CD D8 CC D9 C9 8D 04 3A D8 CA D9 CC D8 4D CC D9 CA D8 4D C8 D9 CC 0F AF 45 14 DE E1 D9 C9 8B 55 10 DE C3 D9 1C C2 D9 C9 D9 5C C2 04 D9 45 C4
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+vex iropt: not unrolling (113 sts)
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+. 1895 8057938 90
+. 55 89 E5 57 56 53 81 EC EC 00 00 00 8B 45 20 31 D2 F7 75 18 89 45 D8 31 D2 8B 45 20 F7 75 1C 89 45 D4 31 D2 8B 45 1C F7 75 18 31 D2 52 89 45 D0 8B 45 18 50 E8 00 00 00 00 5B 81 C3 A3 97 00 00 DF 2C 24 DC BB D4 F5 FF FF 83 EC 08 DD 14 24 DD 9D 18 FF FF FF E8 8E 0C FF FF
+***** EXPENSIVE 1897 418
+
+. 1896 8057992 17
+. DD 85 18 FF FF FF DD 1C 24 D9 5D C8 E8 8D 0D FF FF
+***** EXPENSIVE 1898 419
+
+. 1897 80579A3 25
+. C7 45 DC 00 00 00 00 8B 55 D0 83 C4 10 39 55 DC D9 5D C4 0F 83 59 01 00 00
+***** EXPENSIVE 1899 420
+
+. 1898 80579BC 76
+. 8B 45 D4 D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D1 E0 D9 5D 88 D9 5D 84 C7 85 3C FF FF FF 00 00 00 00 C7 85 38 FF FF FF 00 00 00 00 89 85 44 FF FF FF C7 45 CC 00 00 00 00 8B 55 18 39 55 CC D9 45 88 D9 45 84 0F 83 E0 06 00 00
+***** EXPENSIVE 1900 421
+
+. 1899 8057A08 45
+. 0F AF 55 D4 8B 8D 38 FF FF FF 0F AF 55 DC C7 85 40 FF FF FF 00 00 00 00 89 4D C0 89 55 B8 8B 45 CC D9 45 84 85 C0 D9 45 88 D9 C1 74 24
+
+. 1900 8057A59 55
+. 8B 45 C0 0F AF 45 D4 0F AF 45 0C 89 45 BC 8B 45 18 0F AF 45 D4 0F AF 45 DC 8D 48 FF 8B 45 D4 8B 7D B8 D1 E0 31 F6 4F 89 85 48 FF FF FF 89 F6 85 F6 0F 85 E4 05 00 00
+***** EXPENSIVE 1902 422
+
+. 1901 8057A90 46
+. D9 C1 8B 55 BC 8B 45 08 D9 45 84 D9 C9 D8 0C 90 D9 C9 D8 CA DE E9 DE C3 46 8B 45 18 29 F0 03 8D 48 FF FF FF 03 BD 44 FF FF FF 39 C6 76 CA
+
+. 1902 8057A88 8
+. 85 F6 0F 85 E4 05 00 00
+***** EXPENSIVE 1904 423
+
+. 1903 8058074 35
+. D9 C4 D9 C4 D8 CA D9 C9 D8 CB DE E1 8B 45 18 D9 C5 DE CA D9 CA D8 CC 29 F0 DE C1 39 C6 D9 C1 D9 C1 74 39
+***** EXPENSIVE 1905 424
+
+. 1904 8058097 57
+. D9 CB 8D 04 8D 04 00 00 00 0F AF 45 0C 8B 55 0C 0F AF D1 89 85 14 FF FF FF 8B 45 08 D8 0C 90 D9 CA 8B 95 14 FF FF FF D8 0C 02 DE EA D9 C9 D8 C0 DE C3 D9 C9 E9 D8 F9 FF FF
+
+. 1905 8057AA8 22
+. 46 8B 45 18 29 F0 03 8D 48 FF FF FF 03 BD 44 FF FF FF 39 C6 76 CA
+***** EXPENSIVE 1907 425
+
+. 1906 8057ABE 50
+. DD D8 DD D8 8B 85 3C FF FF FF 03 85 40 FF FF FF 0F AF 45 14 8B 4D 10 D9 1C 81 8B 7D D8 FF 45 CC 8B 45 18 01 BD 40 FF FF FF 39 45 CC 0F 82 36 FF FF FF
+***** EXPENSIVE 1908 426
+
+. 1907 8057A26 15
+. 8B 45 CC D9 45 84 85 C0 D9 45 88 D9 C1 74 24
+***** EXPENSIVE 1909 427
+vex iropt: fold_Expr: no rule for: 32to1(0x1:I32)
+
+. 1908 8057A35 91
+. D9 45 C8 D8 CD D9 45 C4 D9 45 C4 D9 C9 D8 CE D9 C9 DE CF D9 CD D8 4D C8 D9 C9 DE E5 DE C5 D9 CB D9 CC D9 CB 8B 45 C0 0F AF 45 D4 0F AF 45 0C 89 45 BC 8B 45 18 0F AF 45 D4 0F AF 45 DC 8D 48 FF 8B 45 D4 8B 7D B8 D1 E0 31 F6 4F 89 85 48 FF FF FF 89 F6 85 F6 0F 85 E4 05 00 00
+***** EXPENSIVE 1910 428
+
+. 1909 8057AF0 37
+. DD D8 DD D8 8B 55 D4 8B 4D 18 FF 45 DC 8B 7D D0 01 95 3C FF FF FF 01 8D 38 FF FF FF 39 7D DC 0F 82 DA FE FF FF
+
+. 1910 8057B15 10
+. 83 7D D4 01 0F 84 D2 04 00 00
+
+. 1911 8057FF1 8
+. 8D 65 F4 5B 5E 5F C9 C3
+***** EXPENSIVE 1913 429
+
+. 1912 804CF5C 53
+. 8B 75 AC 01 75 B0 8B 45 B0 31 D2 F7 75 08 89 55 B0 31 D2 52 8B 45 B0 50 DF 2C 24 DC 4D C8 83 EC 08 8B 45 C4 8B B0 08 02 00 00 DD 55 88 DD 1C 24 E8 8F B6 FF FF
+
+. 1913 804CEE1 80
+. 8B 45 C4 8B 75 E0 8B 74 B0 08 8B 55 C4 8B 45 A8 03 82 08 02 00 00 89 75 BC 8B 75 E0 89 84 B2 08 01 00 00 8B 45 D8 89 C2 0F AF 55 BC 89 55 D8 89 45 D4 31 D2 8B 45 08 F7 75 D8 C7 45 C0 01 00 00 00 8B 55 BC 39 55 C0 89 45 B8 0F 83 AF 00 00 00
+
+. 1914 804DB5C 11
+. 8B 45 E4 85 C0 0F 85 64 02 00 00
+
+. 1915 804DDCB 6
+. 83 7D 18 FF 74 4E
+***** EXPENSIVE 1917 430
+
+. 1916 804DE1F 65
+. 8B 85 54 FF FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 28 DD 5D C8 DD 5D C0 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 2C DD 5D B8 DD 44 02 F0 D9 C9 DD 5D B0 DD 5D A8 DD 44 02 F8 E9 2C FD FF FF
+***** EXPENSIVE 1918 431
+
+. 1917 804DB8C 22
+. DD 5D A0 C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 00 02 00 00
+
+. 1918 804D3DC 37
+. 8B 45 EC 8B 55 14 8B 4C 82 08 8B 45 E8 0F AF C1 89 45 E8 31 D2 89 F0 F7 75 E8 8B 55 DC 85 D2 0F 85 5F 02 00 00
+
+. 1919 804D660 37
+. 8B 55 D8 89 55 D4 8B 55 08 89 55 CC 8B 55 0C C7 45 D0 01 00 00 00 89 55 C8 C7 45 DC 00 00 00 00 E9 9C FD FF FF
+
+. 1920 804D421 9
+. 83 F9 02 0F 84 06 02 00 00
+***** EXPENSIVE 1922 432
+
+. 1921 804D74C 130
+. 8B 45 F0 03 45 E4 8B 7D 08 0F AF 45 0C DD 04 17 DD 44 17 08 C1 E0 04 DD 04 07 DD 44 07 08 D9 C3 D9 C3 D9 C9 8B 45 10 D8 C3 D9 C9 D8 C2 D9 C9 DD 1C 08 DD 5C 08 08 D9 CB 8B 45 EC DE E1 D9 C9 DE E2 03 45 CC D9 C3 D9 C3 D9 C9 0F AF 45 14 D8 CA D9 C9 D8 CB D9 CA D8 CC D9 CB D8 CD D9 C9 C1 E0 04 8B 7D 10 DE E2 DE C2 DD 1C 07 DD 5C 07 08 46 8B 45 0C 03 55 D8 01 45 D0 FF 45 F0 03 4D DC FF 45 EC
+
+. 1922 804D7CE 9
+. 3B 75 CC 0F 82 75 FF FF FF
+***** EXPENSIVE 1924 433
+
+. 1923 804DDD1 78
+. 8B 85 54 FF FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 8B 55 28 DD 5D C0 DD 5D C8 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 2C DD 5D B0 DD 44 02 F8 D9 C9 DD 5D B8 DD 5D A0 DD 44 02 F0 80 75 C7 80 80 75 B7 80 DD 5D A8 80 75 A7 80 E9 70 FD FF FF
+
+. 1924 804DB8F 19
+. C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 00 02 00 00
+
+. 1925 8050F94 11
+. 8B 45 E8 85 C0 0F 85 02 02 00 00
+
+. 1926 80511A1 6
+. 83 7D 18 FF 74 4B
+***** EXPENSIVE 1928 434
+
+. 1927 80511F2 62
+. 8B 45 80 8B 55 24 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 28 D9 5D D0 D9 5D CC D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 2C D9 5D C8 D9 44 02 F8 D9 C9 D9 5D C4 D9 5D C0 D9 44 02 FC E9 94 FD FF FF
+***** EXPENSIVE 1929 435
+
+. 1928 8050FC4 22
+. D9 5D BC C7 45 E4 00 00 00 00 8B 45 D8 39 45 E4 0F 83 A4 01 00 00
+
+. 1929 8050880 37
+. 8B 55 EC 8B 7D 14 8B 4C 97 08 8B 45 E8 0F AF C1 89 45 E8 31 D2 89 F0 8B 7D DC F7 75 E8 85 FF 0F 85 5B 02 00 00
+
+. 1930 8050B00 37
+. 8B 7D D8 89 7D D4 8B 55 08 8B 7D 0C C7 45 D0 01 00 00 00 89 55 CC 89 7D C8 C7 45 DC 00 00 00 00 E9 A0 FD FF FF
+
+. 1931 80508C5 9
+. 83 F9 02 0F 84 02 02 00 00
+***** EXPENSIVE 1933 436
+vex iropt: not unrolling (126 sts)
+
+. 1932 8050BD0 123
+. 8B 45 F0 8B 7D 08 03 45 E4 D9 04 D7 D9 44 D7 04 0F AF 45 0C D9 04 C7 D9 44 C7 04 D9 C3 D9 C3 D9 C9 8B 45 10 D8 C3 D9 C9 D8 C2 D9 C9 D9 1C C8 D9 5C C8 04 D9 CB DE E1 D9 C9 DE E2 8B 45 EC D9 C3 D9 C3 D9 C9 03 45 D8 D8 CA D9 C9 D8 CB D9 CA D8 CC D9 CB D8 CD D9 C9 46 0F AF 45 14 8B 7D 10 DE E2 DE C2 03 55 0C FF 45 F0 03 4D 14 FF 45 EC 3B 75 D8 D9 1C C7 D9 5C C7 04 72 85
+***** EXPENSIVE 1934 437
+
+. 1933 80511A7 75
+. 8B 45 80 8B 55 24 D9 44 02 F8 D9 44 02 FC 8B 55 28 D9 5D CC D9 5D D0 D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 2C D9 5D C4 D9 44 02 FC D9 C9 D9 5D C8 D9 5D BC D9 44 02 F8 80 75 CF 80 80 75 C7 80 D9 5D C0 80 75 BF 80 E9 D5 FD FF FF
+
+. 1934 8050FC7 19
+. C7 45 E4 00 00 00 00 8B 45 D8 39 45 E4 0F 83 A4 01 00 00
+***** EXPENSIVE 1936 438
+
+. 1935 8059310 159
+. 8B 95 50 FF FF FF 03 55 E4 8B 75 E4 8D 0C 16 01 CE 8B 45 0C 0F AF 85 50 FF FF FF 0F AF 55 0C 0F AF 4D 0C 89 B5 3C FF FF FF 8B 75 08 DD 04 C6 DD 04 D6 DD 04 CE 8B B5 3C FF FF FF 0F AF 75 0C 8B 45 08 D9 C2 DD 04 F0 D9 C9 D8 C2 D9 C3 D8 C2 D9 CC DE E2 8B 45 14 D9 C0 0F AF 85 54 FF FF FF 8B 75 10 D8 C4 DD 1C C6 D9 CC 8B 45 14 0F AF C7 8B 4D D8 DE E2 D9 C9 DD 1C C6 8D 14 39 8D 04 FD 08 00 00 00 0F AF 45 14 0F AF 55 14 D9 E0 D9 CA DE E1 D9 C9 DD 1C 30 DD 1C D6 8B 45 18 8B 55 DC
+
+. 1936 80593AF 30
+. 03 7D 18 01 85 54 FF FF FF 01 95 50 FF FF FF FF 45 E8 8B 4D E0 39 4D E8 0F 82 43 FF FF FF
+
+. 1937 8058E4C 15
+. C7 45 F0 00 00 00 00 8B 55 E8 39 55 F0 73 6E
+***** EXPENSIVE 1939 439
+
+. 1938 8058E5B 110
+. 8B 4D E4 49 89 4D DC 89 CF 8B 45 EC 8D 34 38 8B 45 0C 0F AF C7 8B 55 08 8B 4D 14 DD 04 C2 0F AF 4D DC 8B 55 DC 8B 45 10 DD 1C C8 8D 0C D5 08 00 00 00 0F AF 4D 14 0F AF 75 0C 89 4D CC 8B 4D 08 8B 54 F1 04 8B 04 F1 81 F2 00 00 00 80 8B 75 10 8B 4D CC 89 04 31 89 54 31 04 FF 45 F0 8B 75 18 8B 45 E8 01 75 DC 03 7D E4 39 45 F0 72 9B
+
+. 1939 8054388 28
+. 8B 45 E0 40 C7 45 EC 01 00 00 00 89 85 6C FF FF FF D1 E8 39 45 EC 0F 83 DF 02 00 00
+
+. 1940 8054683 13
+. F7 45 E0 01 00 00 00 0F 85 01 01 00 00
+
+. 1941 8054690 19
+. C7 45 E8 00 00 00 00 8B 55 DC 39 55 E8 0F 83 EE 00 00 00
+***** EXPENSIVE 1943 440
+
+. 1942 80546A3 161
+. 8B 4D E0 8B 75 E0 49 C1 E6 02 DD 83 DC F8 FF FF 89 8D 68 FF FF FF 89 CF 89 B5 64 FF FF FF 8D 76 00 8B 45 E0 8D 14 47 8B 45 0C 8B 4D 08 0F AF C7 DD 04 C1 8D 04 FD 08 00 00 00 0F AF 45 0C DD 04 08 8B 45 0C 0F AF C2 8D 14 D5 08 00 00 00 0F AF 55 0C DD 04 C1 DD 04 0A D9 C4 D9 FA D9 C3 D8 C2 DE C9 D9 C5 D9 FA 8B 95 68 FF FF FF D9 C5 03 55 E4 D8 E4 8B 45 E4 8D 0C 10 DE C9 01 C8 D9 C0 D9 CE DE C4 D9 CA DE E4 D9 CA 8B 75 14 0F AF B5 68 FF FF FF 0F AF 55 14 0F AF 4D 14 89 85 34 FF FF FF
+***** EXPENSIVE 1944 441
+
+. 1943 8054744 75
+. D8 C0 D9 CC 8B 45 10 D8 E2 D9 CB D8 C0 D9 CC DD 1C F0 DE C1 D9 C9 DD 1C D0 D9 C9 8B B5 34 FF FF FF DD 1C C8 8B 55 E0 FF 45 E8 8B 4D DC 0F AF 75 14 D9 E0 01 95 68 FF FF FF 03 BD 64 FF FF FF 39 4D E8 DD 1C F0 0F 82 35 FF FF FF
+***** EXPENSIVE 1945 442
+
+. 1944 805478F 13
+. DD D8 81 C4 C4 00 00 00 5B 5E 5F C9 C3
+***** EXPENSIVE 1946 443
+
+. 1945 805B934 160
+. 8B 95 4C FF FF FF 03 55 E4 8B 75 E4 8D 0C 16 01 CE 8B 45 0C 0F AF 85 4C FF FF FF 89 B5 44 FF FF FF 8B 75 08 D9 04 86 0F AF 55 0C 0F AF 4D 0C D9 04 96 D9 04 8E D9 CA D9 5D D8 8B B5 44 FF FF FF 0F AF 75 0C 8B 45 08 D9 45 D8 D9 04 B0 D9 C9 D8 C3 8B 45 D0 D9 C2 D8 C2 D9 CB 8D 14 38 DE E2 8B 45 14 D9 C0 8B 4D 10 0F AF 85 50 FF FF FF D8 C3 D9 1C 81 D9 CB 8B 45 14 0F AF C7 D8 6D D8 D9 14 81 D9 C9 8D 04 BD 04 00 00 00 0F AF 45 14 D9 E0 D9 1C 08 D9 C9 0F AF 55 14 DE EA D9 C9 8B 45 18
+***** EXPENSIVE 1947 444
+
+. 1946 805B9D4 44
+. D9 14 91 D9 C9 03 7D 18 D9 5D D8 D9 5D D4 01 85 50 FF FF FF 8B 55 DC FF 45 E8 8B 4D E0 01 95 4C FF FF FF 39 4D E8 0F 82 34 FF FF FF
+
+. 1947 805B495 15
+. C7 45 F0 00 00 00 00 8B 55 E8 39 55 F0 73 63
+***** EXPENSIVE 1949 445
+
+. 1948 805B4A4 99
+. 8B 7D E4 4F 89 FE 89 F6 8B 45 EC 8B 55 14 0F AF D7 8D 0C 30 8B 45 0C 89 55 D0 0F AF C6 8B 55 08 D9 04 82 8B 45 D0 8B 55 10 D9 1C 82 8D 14 BD 04 00 00 00 0F AF 55 14 0F AF 4D 0C 89 55 D0 8B 55 08 8B 04 8A 35 00 00 00 80 8B 4D 10 8B 55 D0 89 04 0A FF 45 F0 8B 4D E8 03 7D 18 03 75 E4 39 4D F0 72 A5
+
+. 1949 8056B76 28
+. 8B 45 E0 40 C7 45 EC 01 00 00 00 89 85 5C FF FF FF D1 E8 39 45 EC 0F 83 FE 02 00 00
+
+. 1950 8056E90 13
+. F7 45 E0 01 00 00 00 0F 85 3E 01 00 00
+
+. 1951 8056E9D 19
+. C7 45 E8 00 00 00 00 8B 45 DC 39 45 E8 0F 83 2B 01 00 00
+***** EXPENSIVE 1953 446
+
+. 1952 8056EB0 188
+. 8B 55 E0 8B 4D E0 4A C1 E1 02 89 95 58 FF FF FF 89 D7 89 8D 54 FF FF FF 8B 45 0C 8B 4D 08 0F AF C7 D9 04 81 8D 04 BD 04 00 00 00 0F AF 45 0C 8B 75 E0 8D 14 77 D9 04 08 D9 C9 8B 45 0C 0F AF C2 8D 14 95 04 00 00 00 0F AF 55 0C D9 9D 70 FF FF FF D9 04 0A D9 9D 64 FF FF FF D9 95 6C FF FF FF D9 04 81 DD 83 DC F8 FF FF D9 FA D9 CA D8 85 64 FF FF FF DE CA D9 C9 D9 9D 60 FF FF FF DD 83 DC F8 FF FF D9 FA D9 85 70 FF FF FF D8 E2 8B 95 58 FF FF FF 03 55 E4 DE C9 8B 45 E4 D9 85 70 FF FF FF D9 C9 D9 5D F0 8D 0C 10 DE C1 D9 85 64 FF FF FF D9 45 F0 01 C8 D9 85 60 FF FF FF
+***** EXPENSIVE 1954 447
+
+. 1953 8056F6C 111
+. D9 CA D8 A5 6C FF FF FF D9 CA 8B 75 14 0F AF B5 58 FF FF FF 0F AF 55 14 0F AF 4D 14 D8 E9 D9 CB 89 85 34 FF FF FF D8 C0 D9 CA 8B 45 10 D8 C0 D9 CA D9 1C B0 D8 85 60 FF FF FF D9 CA D9 1C 90 8B B5 34 FF FF FF D9 1C 88 8B 55 E0 FF 45 E8 8B 4D DC 0F AF 75 14 D9 E0 01 95 58 FF FF FF 03 BD 54 FF FF FF 39 4D E8 D9 1C B0 0F 82 ED FE FF FF
+vex iropt: 2 x unrolling (32 sts -> 64 sts)
+
+. 1954 804CCAC 30
+. 89 C8 31 D2 F7 75 EC 89 C1 8B 55 14 8B 45 EC 89 04 BA 31 D2 89 C8 F7 75 EC 47 85 D2 74 E2
+
+. 1955 804D8B0 11
+. 8B 75 E8 85 F6 0F 85 CB 01 00 00
+
+. 1956 804DA86 6
+. 83 7D 18 FF 74 32
+***** EXPENSIVE 1958 448
+
+. 1957 804DABE 39
+. 8B 45 8C 8B 55 24 DD 44 02 F0 DD 5D C8 DD 44 02 F8 8B 55 28 DD 5D C0 DD 44 02 F0 DD 5D B8 DD 44 02 F8 E9 F1 FD FF FF
+***** EXPENSIVE 1959 449
+
+. 1958 804D8D6 25
+. DD 5D B0 C7 45 E4 00 00 00 00 8B 85 7C FF FF FF 39 45 E4 0F 83 77 01 00 00
+***** EXPENSIVE 1960 450
+
+. 1959 804D91C 140
+. 8B 45 08 DD 04 08 DD 5D A8 DD 44 08 08 8B 45 EC 03 45 E0 0F AF 45 0C C1 E0 04 8B 55 08 DD 04 02 D9 C9 DD 5D A0 DD 44 02 08 8B 55 EC 8B 45 E0 8D 04 42 89 45 80 0F AF 45 0C C1 E0 04 8B 55 08 DD 04 02 DD 44 02 08 D9 C3 D9 C3 D9 C9 D8 C3 D9 C9 D8 C2 DD 83 BC F8 FF FF DD 83 BC F8 FF FF D9 C9 D8 CB D9 C9 D8 CA D9 C9 DC 6D A8 D9 C9 DC 6D A0 D9 CF DE E5 D9 CD DE E3 D9 CB DC 4D 98 D9 CA DC 4D 98 D9 C9 8B 45 10 DC 45 A8 D9 CB
+***** EXPENSIVE 1961 451
+
+. 1960 804D9A8 132
+. DC 45 A0 8B 95 7C FF FF FF D9 C4 D9 C6 D9 C9 D8 E3 D9 C9 D8 C4 D9 CE DE C3 D9 CE DE E3 D9 CB DD 14 30 D9 CB DD 54 30 08 DD 45 C8 8D 04 3A DD 45 C0 0F AF 45 14 D8 CE D9 C9 D8 CF C1 E0 04 DE E1 D9 CC 8B 55 10 DD 5D A8 DD 5D A0 D9 CA DD 1C 02 D9 CA DC 4D C8 D9 CB DC 4D C0 DE C3 D9 CA DD 5C 02 08 8B 95 7C FF FF FF 8D 04 57 DD 45 B8 DD 45 B0 D9 C9 0F AF 45 14 D8 CB D9 C9 D8 CA D9 CB DC 4D B0 D9 CA
+***** EXPENSIVE 1962 452
+
+. 1961 804DA2C 58
+. DC 4D B8 D9 C9 C1 E0 04 8B 55 10 DE E3 DE C1 D9 C9 DD 1C 02 DD 5C 02 08 FF 45 E4 8B 45 0C 8B 95 7C FF FF FF 03 4D 90 01 45 88 FF 45 EC 03 75 94 47 39 55 E4 0F 82 B6 FE FF FF
+***** EXPENSIVE 1963 453
+
+. 1962 804DA8C 50
+. 8B 45 8C 8B 55 24 DD 44 02 F0 DD 5D C8 DD 44 02 F8 8B 55 28 DD 5D C0 DD 44 02 F0 DD 5D B8 DD 44 02 F8 DD 5D B0 80 75 C7 80 80 75 B7 80 E9 1B FE FF FF
+
+. 1963 804D8D9 22
+. C7 45 E4 00 00 00 00 8B 85 7C FF FF FF 39 45 E4 0F 83 77 01 00 00
+
+. 1964 8050D18 11
+. 8B 45 E4 85 C0 0F 85 A5 01 00 00
+
+. 1965 8050EC8 6
+. 83 7D 18 FF 74 34
+***** EXPENSIVE 1967 454
+
+. 1966 8050F02 43
+. 8B 45 A4 8B 55 24 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 28 D9 5D CC D9 44 02 F8 D9 C9 D9 5D C8 D9 5D C4 D9 44 02 FC E9 11 FE FF FF
+***** EXPENSIVE 1968 455
+
+. 1967 8050D3E 22
+. D9 5D C0 C7 45 E0 00 00 00 00 8B 45 94 39 45 E0 0F 83 54 01 00 00
+***** EXPENSIVE 1969 456
+
+. 1968 8050D6C 142
+. 8B 45 08 D9 04 C8 D9 44 C8 04 8B 45 E8 03 45 DC 0F AF 45 0C 8B 55 08 D9 04 C2 D9 C9 D9 5D B8 D9 44 C2 04 8B 55 E8 8B 45 DC 8D 04 42 89 45 98 8B 55 08 0F AF 45 0C D9 04 C2 D9 C2 D9 CC D9 5D BC DC C3 DD 83 BC F8 FF FF D8 CC D9 44 C2 04 D9 C9 D8 6D BC D9 C3 D8 C2 D9 C9 D9 5D EC DD 83 BC F8 FF FF D8 C9 D8 6D B8 D9 5D B4 D9 CC DE E2 DE EA D9 C9 D8 4D B0 D9 45 EC D9 CA D8 4D B0 D9 45 B4 D9 CD D8 45 BC D9 CC D8 45 B8 D9 CD D8 C1
+***** EXPENSIVE 1970 457
+
+. 1969 8050DFA 127
+. D9 C3 D9 CA D8 6D B4 D9 CC D8 C3 D9 CA DE E3 D9 CC D9 55 BC D9 CD D9 55 B8 D9 C9 D9 55 AC D9 CB D9 55 A8 8B 45 10 8B 55 94 D9 45 CC D9 45 C8 D9 CF D9 1C F0 D9 CA D9 5C F0 04 D9 CD D8 CC D9 C9 8D 04 3A D8 CA D9 CC D8 4D CC D9 CA D8 4D C8 D9 CC 0F AF 45 14 DE E1 D9 C9 8B 55 10 DE C3 D9 1C C2 D9 C9 D9 5C C2 04 D9 45 C4 8B 55 94 D9 45 C0 8D 04 57 D8 CB D9 C9 D8 CA 0F AF 45 14 DE E1
+***** EXPENSIVE 1971 458
+
+. 1970 8050E79 47
+. 8B 55 10 D9 1C C2 D9 45 C0 D9 45 C4 DE CB DE C9 DE C1 D9 5C C2 04 FF 45 E0 8B 45 94 03 4D 0C FF 45 E8 03 75 14 47 39 45 E0 0F 82 C4 FE FF FF
+***** EXPENSIVE 1972 459
+
+. 1971 8050ECE 52
+. 8B 45 A4 8B 55 24 D9 44 02 F8 D9 44 02 FC 8B 55 28 D9 5D C8 D9 44 02 FC D9 C9 D9 5D CC D9 5D C0 D9 44 02 F8 80 75 CB 80 D9 5D C4 80 75 C3 80 E9 3F FE FF FF
+
+. 1972 8050D41 19
+. C7 45 E0 00 00 00 00 8B 45 94 39 45 E0 0F 83 54 01 00 00
+
+. 1973 8058FD3 27
+. 8B 4D DC 41 89 C8 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 4D 94 0F 83 07 02 00 00
+***** EXPENSIVE 1975 460
+
+. 1974 8058FEE 76
+. C7 45 8C 10 00 00 00 8D 76 00 8B 45 8C 8B 55 20 DD 44 02 F0 DD 44 02 F8 8B 55 24 DD 5D C0 DD 44 02 F8 D9 C9 DD 5D C8 DD 5D B0 DD 44 02 F0 C7 45 E8 00 00 00 00 8B 45 E0 80 75 C7 80 80 75 B7 80 39 45 E8 DD 5D B8 0F 83 A6 01 00 00
+***** EXPENSIVE 1976 461
+
+. 1975 805903A 171
+. 8B 4D D4 81 F1 00 00 00 80 8B 45 DC 89 4D 9C 2B 45 EC 8B 4D EC 8B 55 D0 8D 44 00 FF 8D 74 09 FF 89 55 98 89 45 90 89 F7 89 F6 8B 45 E4 8D 14 38 01 D0 8B 4D 0C 89 85 7C FF FF FF 0F AF CF 8B 45 08 DD 04 C8 8D 04 FD 08 00 00 00 8B 4D 08 0F AF 45 0C DD 5D A8 DD 04 08 8B 45 0C 0F AF C2 8D 14 D5 08 00 00 00 DD 04 C1 0F AF 55 0C 8B 45 0C DD 04 0A 0F AF 85 7C FF FF FF 8B 95 7C FF FF FF DD 04 C1 D9 CB DD 5D A0 8D 0C D5 08 00 00 00 DD 45 C8 DD 45 C0 0F AF 4D 0C 8B 45 08 D8 CA D9 C9 D8 CB D9 CA DC 4D C8 D9 CB DC 4D C0
+***** EXPENSIVE 1977 462
+
+. 1976 80590E5 122
+. DD 04 01 D9 CB DE E2 DE C3 DD 45 B8 DD 45 B0 DD 45 B8 D9 C9 D8 CC D9 CA D8 CE D9 C9 DE CC D9 CD DC 4D B0 D9 CD DE E1 D9 CA DE C4 D9 C0 D9 C3 D9 C9 D8 C3 D9 C9 D8 C5 DD 83 BC F8 FF FF DD 83 BC F8 FF FF D9 C9 D8 CB D9 C9 D8 CA D9 CC DE E5 D9 CD DE E6 D9 C9 DC 45 A8 D9 CC DC 6D A8 D9 CA DC 6D A0 D9 CB DC 4D 98 D9 CD DC 4D 98 D9 CC DD 55 A8 8B 4D DC 8B 45 14 8D 14 4E
+***** EXPENSIVE 1978 463
+
+. 1977 805915F 129
+. 0F AF C6 8B 4D 10 DD 1C C1 8D 04 F5 08 00 00 00 0F AF 45 14 DC 45 A0 DD 14 08 D9 C1 8B 45 14 0F AF C2 D9 C3 D9 C9 D8 E5 8D 14 D5 08 00 00 00 DD 1C C1 0F AF 55 14 D8 C5 8B 45 14 DD 1C 0A D9 C9 0F AF 45 90 8B 55 90 DE C3 D9 CA DD 1C C1 DE E2 D9 C9 8D 04 D5 08 00 00 00 0F AF 45 14 D9 E0 DD 1C 08 FF 45 E8 8B 4D 18 8B 45 E0 01 CA 01 CE 03 7D DC 39 45 E8 DD 5D A0 89 55 90 0F 82 84 FE FF FF
+
+. 1978 80591E0 21
+. 8B 45 94 FF 45 EC D1 E8 83 45 8C 10 39 45 EC 0F 82 03 FE FF FF
+
+. 1979 80591F5 13
+. F7 45 DC 01 00 00 00 0F 85 9F 00 00 00
+***** EXPENSIVE 1981 464
+
+. 1980 8053754 57
+. 8B 7D A4 90 8B 75 AC 01 75 B4 8B 45 B4 31 D2 F7 75 08 89 55 B4 31 D2 52 8B 45 B4 50 DF 2C 24 DC 4D C8 83 EC 08 8B 45 C4 8B B0 08 02 00 00 DD 55 88 DD 1C 24 E8 93 4E FF FF
+***** EXPENSIVE 1982 465
+
+. 1981 805378D 23
+. DD 1C 3E 8B 55 C4 DD 45 88 8B B2 08 02 00 00 DD 1C 24 E8 8C 4F FF FF
+***** EXPENSIVE 1983 466
+
+. 1982 80537A4 34
+. 8B 45 B0 FF 45 B8 D1 E8 DD 5C 3E 08 83 45 A8 10 83 C7 10 83 45 A4 10 FF 45 DC 83 C4 10 39 45 B8 72 92
+***** EXPENSIVE 1984 467
+
+. 1983 8053FA6 70
+. C7 45 8C 10 00 00 00 C7 45 80 02 00 00 00 8B 4D 8C 8B 75 20 DD 44 0E F0 8B 45 24 DD 5D C8 DD 44 0E F8 DD 5D C0 DD 44 08 F0 DD 5D B8 C7 45 E8 00 00 00 00 DD 44 08 F8 8B 45 D4 39 45 E8 DD 5D B0 0F 83 A7 01 00 00
+***** EXPENSIVE 1985 468
+
+. 1984 8053FEC 170
+. 8B 55 80 8B 4D D8 89 D7 D1 E1 89 55 AC 4F 89 4D A8 C7 45 84 00 00 00 00 8B 55 AC 8B 75 84 8D 44 32 FF 8B 4D A8 8D 34 01 8B 4D 84 29 D1 8B 55 A8 8D 4C 0A FF 89 8D 74 FF FF FF 8B 4D 0C 8B 55 08 0F AF C8 8D 04 C5 08 00 00 00 DD 04 CA 0F AF 45 0C DD 5D A0 DD 04 10 8B 45 0C 0F AF C6 DD 04 C2 8B 45 0C 0F AF 85 74 FF FF FF DD 04 C2 8B 85 74 FF FF FF 8D 0C C5 08 00 00 00 8D 34 F5 08 00 00 00 0F AF 75 0C 0F AF 4D 0C D9 C1 D9 CB DD 5D 98 DD 04 11 DD 04 16 D9 CC D8 C2 DD 83 BC F8 FF FF D9 CA D9 E0 D9 C5 D9 CB D8 CA
+***** EXPENSIVE 1986 469
+
+. 1985 8054096 129
+. DC 6D A0 D9 CB D8 C1 D9 CA DC 45 A0 DD 83 BC F8 FF FF D9 CF DE E2 D9 C9 DC 4D E0 D9 C9 DD 5D A0 D9 CD D8 C9 D9 C2 D9 C9 8B 45 14 8B 75 10 DC 6D 98 D9 CA 0F AF C7 DC 45 98 D9 C9 D8 E6 D9 CB DE C6 D9 CC DE E3 DD 45 A0 D9 CB DC 4D E0 8B 4D DC D9 C1 D9 CD DD 55 98 D9 CC DD 1C C6 8D 04 FD 08 00 00 00 DC C4 DE E9 0F AF 45 14 DD 45 C8 DD 45 C0 D9 CC DD 1C 30 D9 CB 8D 14 39 D8 CC D9 CB D8 CA
+***** EXPENSIVE 1987 470
+
+. 1986 8054117 124
+. 8B 45 14 0F AF C2 DE E3 D9 CA DD 1C C6 8D 0C 11 DC 4D C0 D9 CA 8D 14 D5 08 00 00 00 DC 4D C8 8B 45 14 DD 45 B8 DD 45 B0 D9 C9 0F AF C1 0F AF 55 14 D8 CD D9 C9 D8 CB D9 CC DE C2 D9 CC 8D 0C CD 08 00 00 00 DC 4D B0 D9 CA DC 4D B8 D9 C9 DD 1C 32 D9 CB 0F AF 4D 14 DE E2 DE C2 8B 55 D8 DD 1C C6 FF 45 E8 DD 1C 31 8D 04 52 8B 4D D4 03 7D D8 01 45 84 39 4D E8 0F 82 71 FE FF FF
+
+. 1987 8054193 25
+. 8B 45 94 FF 45 EC D1 E8 83 45 8C 10 83 45 80 02 39 45 EC 0F 82 08 FE FF FF
+***** EXPENSIVE 1989 471
+vex iropt: not unrolling (110 sts)
+
+. 1988 8053EEC 147
+. 8B 75 D8 8B 45 0C 0F AF C7 8B 4D 08 D1 E6 DD 04 C1 8D 54 3E FF 8B 45 0C 0F AF C2 8D 14 D5 08 00 00 00 DD 04 C1 0F AF 55 0C D9 C1 8B 45 88 D9 C3 DC 0C 0A D9 C9 D8 E2 D9 CA 03 45 DC D8 C0 8B 55 DC 01 C2 DE C3 8B 4D 14 D9 C1 0F AF 4D 88 0F AF 45 14 03 75 D8 89 95 7C FF FF FF D8 E1 D9 CB 8B 55 10 DD 1C CA D9 CA 01 F7 DD 1C C2 8B 75 D8 8B 95 7C FF FF FF FF 45 E8 8B 45 D4 0F AF 55 14 DE C1 8B 4D 10 01 75 88 39 45 E8 DD 1C D1 0F 82 6D FF FF FF
+
+. 1989 805B612 27
+. 8B 55 DC 42 89 D0 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 55 B8 0F 83 F5 01 00 00
+***** EXPENSIVE 1991 472
+
+. 1990 805B62D 73
+. C7 45 AC 02 00 00 00 8B 4D AC 8B 45 20 D9 44 88 F8 D9 44 88 FC 8B 45 24 D9 5D D0 D9 44 88 FC D9 C9 D9 5D D4 D9 5D C8 D9 44 88 F8 C7 45 E8 00 00 00 00 8B 45 E0 80 75 D3 80 80 75 CB 80 39 45 E8 D9 5D CC 0F 83 97 01 00 00
+***** EXPENSIVE 1992 473
+
+. 1991 805B676 160
+. 8B 45 DC 2B 45 EC 8D 44 00 FF D9 45 D8 89 45 B0 8B 45 EC D9 83 EC F8 FF FF D9 C9 D9 E0 D9 C9 8D 74 00 FF D9 5D B4 D9 5D BC 89 F7 8D 76 00 8B 4D E4 8D 14 39 01 D1 8B 45 0C 89 4D A0 0F AF C7 8B 4D 08 D9 04 81 8D 04 BD 04 00 00 00 0F AF 45 0C D9 04 08 8B 45 0C 0F AF C2 8D 14 95 04 00 00 00 D9 04 81 D9 C9 0F AF 55 0C 8B 45 0C D9 5D C0 0F AF 45 A0 D9 04 0A 8B 55 A0 D9 04 81 D9 CB D9 5D C4 8D 0C 95 04 00 00 00 D9 45 D4 D9 45 D0 0F AF 4D 0C 8B 45 08 D8 CA D9 C9 D8 CB D9 CA D8 4D D4
+***** EXPENSIVE 1993 474
+
+. 1992 805B716 115
+. D9 CB D8 4D D0 D9 04 01 D9 CB DE E2 DE C3 D9 45 CC D9 45 C8 D9 45 CC D9 C9 D8 CC D9 CA D8 CE D9 C9 DE CC D9 CD D8 4D C8 D9 CD DE E1 D9 CA DE C4 D9 C0 D9 C3 D9 C9 D8 C3 D9 C9 D8 C5 D9 45 B4 D9 45 B4 D9 C9 D8 CB D9 C9 D8 CA D9 CC DE E5 D9 CD DE E6 D8 45 C0 D9 CC D8 6D C4 D9 CA D8 6D C0 D9 CB D8 4D BC D9 CD D8 4D BC D9 C9 D8 45 C4 D9 CC D9 55 C0
+***** EXPENSIVE 1994 475
+
+. 1993 805B789 132
+. D9 CC 8B 4D DC 8B 45 14 8D 14 4E 0F AF C6 8B 4D 10 D9 1C 81 D9 CB 8D 04 B5 04 00 00 00 0F AF 45 14 D9 1C 08 D9 C0 8B 45 14 0F AF C2 D9 C2 D9 C9 D8 E4 8D 14 95 04 00 00 00 D9 1C 81 0F AF 55 14 D8 C4 8B 45 14 D9 1C 0A 0F AF 45 B0 8B 55 B0 DE C2 D9 C9 D9 1C 81 DE E1 8D 04 95 04 00 00 00 0F AF 45 14 D9 E0 D9 1C 08 FF 45 E8 8B 4D 18 8B 45 E0 01 CA 01 CE 03 7D DC 39 45 E8 89 55 B0 0F 82 97 FE FF FF
+
+. 1994 805B80D 21
+. 8B 45 B8 FF 45 EC D1 E8 83 45 AC 02 39 45 EC 0F 82 12 FE FF FF
+
+. 1995 805B822 13
+. F7 45 DC 01 00 00 00 0F 85 9C 00 00 00
+***** EXPENSIVE 1997 476
+
+. 1996 8055FC4 45
+. 03 7D B0 89 F8 31 D2 F7 75 08 89 D7 31 D2 52 57 DF 2C 24 DC 4D C8 83 EC 08 8B 45 C4 8B B0 08 02 00 00 DD 55 98 DD 1C 24 E8 2F 26 FF FF
+***** EXPENSIVE 1998 477
+
+. 1997 8055FF1 26
+. 8B 55 D8 D9 1C D6 8B 45 C4 DD 45 98 8B B0 08 02 00 00 DD 1C 24 E8 25 27 FF FF
+***** EXPENSIVE 1999 478
+
+. 1998 805600B 27
+. 8B 45 B4 8B 55 D8 FF 45 B8 D1 E8 D9 5C D6 04 83 C4 10 42 39 45 B8 89 55 D8 72 9E
+
+. 1999 8056026 5
+. E9 34 FF FF FF
+***** EXPENSIVE 2001 479
+
+. 2000 8056790 68
+. C7 45 A4 02 00 00 00 90 8B 4D A4 8B 75 20 8B 45 24 D9 44 8E F8 D9 44 8E FC D9 C9 D9 5D D4 D9 5D D0 D9 44 88 F8 D9 44 88 FC D9 C9 C7 45 E8 00 00 00 00 8B 45 D8 39 45 E8 D9 5D CC D9 5D C8 0F 83 BA 01 00 00
+***** EXPENSIVE 2002 480
+
+. 2001 80567D4 167
+. 89 4D C4 8B 4D DC 8B 55 EC D1 E1 8D 7C 12 FF 89 4D C0 C7 45 9C 00 00 00 00 8D 76 00 8B 55 C4 8B 75 9C 8D 44 32 FF 8B 4D C0 8D 34 01 8B 4D 9C 29 D1 8B 55 C0 8D 4C 0A FF 89 4D 94 8B 4D 0C 0F AF C8 8D 04 85 04 00 00 00 8B 55 08 0F AF 45 0C D9 04 10 8B 45 0C 0F AF C6 D9 04 82 8B 45 0C D9 04 8A 0F AF 45 94 D9 04 82 D9 C9 D9 5D BC 8B 45 94 D9 C1 8D 0C 85 04 00 00 00 D8 C1 8D 34 B5 04 00 00 00 0F AF 75 0C 0F AF 4D 0C D9 5D B4 DD 83 BC F8 FF FF D9 04 11 D9 CC D9 5D B8 D8 4D B4 D9 04 16 D9 CC D9 E0 D9 C9
+***** EXPENSIVE 2003 481
+
+. 2002 805687B 135
+. D8 6D BC D9 C4 D9 C9 D9 5D F0 D8 C1 DD 83 BC F8 FF FF D8 C9 D8 6D B8 D9 45 F0 D9 C9 D9 5D F0 D9 45 BC D9 CE DE E3 D9 CD D8 45 B4 D9 CC DE E3 D9 C9 D8 4D E4 D9 45 F0 D9 CB D8 4D E4 D9 CC D9 5D BC 8B 45 E0 8D 14 38 D9 C2 8D 0C 10 D8 C4 8B 45 14 8B 75 10 0F AF C7 D9 5D B0 D9 45 BC D9 1C 86 D9 C4 8D 04 BD 04 00 00 00 D8 E1 D9 CD DE C1 D9 C9 0F AF 45 14 D8 45 B8 D9 45 D4 D9 45 D0 D9 CA D9 14 30 D9 C9 D8 CE
+***** EXPENSIVE 2004 482
+
+. 2003 8056902 140
+. D9 CA D8 4D B0 8B 45 14 0F AF C2 DE EA D9 C9 D9 1C 86 D9 45 D4 D8 4D B0 D9 CD D8 4D D0 D9 CB DE E4 D9 CA DE C4 8D 14 95 04 00 00 00 8B 45 14 D9 45 CC D9 45 C8 D9 C9 0F AF C1 0F AF 55 14 D8 CA D9 C9 D8 CC D9 CA 8D 0C 8D 04 00 00 00 D8 4D C8 D9 CC D8 4D CC D9 CD D9 1C 32 0F AF 4D 14 DE E1 D9 CA DE C3 D9 C9 8B 55 DC D9 1C 86 D9 C9 FF 45 E8 D9 1C 31 8D 04 52 8B 4D D8 03 7D DC 01 45 9C 39 4D E8 D9 5D B8 0F 82 62 FE FF FF
+
+. 2004 805698E 21
+. 8B 45 AC FF 45 EC D1 E8 83 45 A4 02 39 45 EC 0F 82 F5 FD FF FF
+***** EXPENSIVE 2006 483
+vex iropt: not unrolling (116 sts)
+
+. 2005 80566DC 141
+. 8B 75 DC 8B 45 0C 0F AF C7 8B 4D 08 D1 E6 D9 04 81 8D 54 3E FF 8B 45 0C 0F AF C2 8D 14 95 04 00 00 00 D9 04 81 0F AF 55 0C D9 C1 8B 45 A0 D9 C3 D8 0C 0A D9 C9 D8 E2 D9 CA 03 45 E0 D8 C0 8B 55 E0 01 C2 DE C3 8B 4D 14 D9 C1 0F AF 4D A0 0F AF 45 14 03 75 DC 89 55 98 D8 E1 D9 CB 8B 55 10 D9 1C 8A D9 CA 01 F7 D9 1C 82 8B 75 DC 8B 55 98 FF 45 E8 8B 45 D8 0F AF 55 14 DE C1 8B 4D 10 01 75 A0 39 45 E8 D9 1C 91 0F 82 73 FF FF FF
+
+. 2006 804DF14 11
+. 8B 45 E4 85 C0 0F 85 80 04 00 00
+
+. 2007 804E39F 6
+. 83 7D 18 FF 74 65
+***** EXPENSIVE 2009 484
+
+. 2008 804E40A 87
+. 8B 85 DC FE FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 28 DD 5D B8 DD 5D B0 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 2C DD 5D A8 DD 5D A0 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 30 DD 5D 98 DD 5D 90 DD 44 02 F0 DD 44 02 F8 D9 C9 DD 5D 88 DD 5D 80 E9 F2 FA FF FF
+
+. 2009 804DF53 19
+. C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 13 04 00 00
+***** EXPENSIVE 2011 485
+
+. 2010 804E3A5 101
+. 8B 85 DC FE FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 8B 55 28 DD 5D B0 DD 5D B8 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 2C DD 5D A0 DD 5D A8 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 30 DD 5D 90 DD 44 02 F8 D9 C9 DD 5D 98 DD 5D 80 DD 44 02 F0 80 75 B7 80 80 75 A7 80 80 75 97 80 DD 5D 88 80 75 87 80 E9 49 FB FF FF
+
+. 2011 80512DC 11
+. 8B 45 E0 85 C0 0F 85 91 04 00 00
+
+. 2012 8051778 6
+. 83 7D 18 FF 74 65
+***** EXPENSIVE 2014 486
+
+. 2013 80517E3 84
+. 8B 85 18 FF FF FF 8B 55 24 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 28 D9 5D C0 D9 5D BC D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 2C D9 5D B8 D9 5D B4 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 30 D9 5D B0 D9 44 02 F8 D9 C9 D9 5D AC D9 5D A8 D9 44 02 FC E9 DF FA FF FF
+***** EXPENSIVE 2015 487
+
+. 2014 8051316 22
+. D9 5D A4 C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 26 04 00 00
+***** EXPENSIVE 2016 488
+
+. 2015 805177E 101
+. 8B 85 18 FF FF FF 8B 55 24 D9 44 02 F8 D9 44 02 FC 8B 55 28 D9 5D BC D9 5D C0 D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 2C D9 5D B4 D9 5D B8 D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 30 D9 5D AC D9 44 02 FC D9 C9 D9 5D B0 D9 5D A4 D9 44 02 F8 80 75 BF 80 80 75 B7 80 80 75 AF 80 D9 5D A8 80 75 A7 80 E9 36 FB FF FF
+
+. 2016 8051319 19
+. C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 26 04 00 00
+***** EXPENSIVE 2018 489
+
+. 2017 805879C 53
+. 8B 45 B0 01 45 B8 8B 45 B8 31 D2 F7 75 08 89 55 B8 31 D2 52 8B 45 B8 50 DF 2C 24 DC 4D D0 83 EC 08 8B 4D CC 8B B1 08 02 00 00 DD 55 98 DD 1C 24 E8 4F FE FE FF
+***** EXPENSIVE 2019 490
+
+. 2018 80598BC 158
+. 8B 95 BC FE FF FF 03 55 E4 8B 75 E4 8D 0C 16 8D 34 0E 8B 7D E4 01 F7 8B 45 0C 89 BD 9C FE FF FF 0F AF 85 BC FE FF FF 8B 7D 08 0F AF 55 0C 0F AF 4D 0C 0F AF 75 0C DD 04 D7 DD 04 CF DD 04 F7 DD 04 C7 8B BD 9C FE FF FF 0F AF 7D 0C 8B 45 08 DD 04 F8 D9 C4 D8 C1 D9 C4 D8 C4 D9 C1 D9 CF DE E3 D9 CD DE E4 D9 CD D8 C4 DD 85 E8 FE FF FF D9 FA D9 CE DE E5 D9 CD DC 8D E0 FE FF FF DE CC DD 85 E0 FE FF FF D8 CD 8B 45 14 8B 4D 10 0F AF 85 C0 FE FF FF D8 EA D9 CA DE C5 D9 CC DD 1C C1
+***** EXPENSIVE 2020 491
+
+. 2019 805995A 150
+. D9 C0 DD 45 D0 D9 C9 8B 45 14 0F AF 85 C4 FE FF FF 8B B5 C4 FE FF FF D8 C4 D9 CA DE E4 D9 E0 DD 45 C8 D9 CA DD 1C C1 D9 C9 D8 CA D9 C9 8D 04 F5 08 00 00 00 D8 CC 0F AF 45 14 DE E1 8B 95 C4 FE FF FF DD 45 C8 D9 C9 03 55 C4 DD 1C 08 D9 E0 8B 45 14 0F AF C2 DE CB DC 4D D0 8D 14 D5 08 00 00 00 0F AF 55 14 DE C2 DD 1C C1 8B 7D 18 DD 1C 0A 8B 45 DC FF 45 E8 8B 55 E0 01 FE 01 BD C0 FE FF FF 01 85 BC FE FF FF 39 55 E8 89 B5 C4 FE FF FF 0F 82 CC FE FF FF
+***** EXPENSIVE 2021 492
+
+. 2020 8058D44 32
+. 8B 45 D8 C7 45 F0 00 00 00 00 8B 55 E8 DD 40 F8 39 55 F0 DD 40 F0 D9 C9 D9 E0 0F 83 6C 01 00 00
+
+. 2021 8054982 30
+. 8B 75 D0 46 89 F0 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 B5 FC FE FF FF 0F 83 EB 04 00 00
+
+. 2022 8054E8B 13
+. F7 45 D0 01 00 00 00 0F 85 86 01 00 00
+
+. 2023 8054E98 19
+. C7 45 E8 00 00 00 00 8B 75 CC 39 75 E8 0F 83 73 01 00 00
+***** EXPENSIVE 2025 493
+
+. 2024 8054EAB 174
+. 8B 45 D0 48 DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 DD 9D F0 FE FF FF DD 9D E8 FE FF FF 89 85 E4 FE FF FF 89 85 D4 FE FF FF 8D 76 00 8B B5 D4 FE FF FF 8B 45 0C 8B 7D 08 0F AF C6 DD 04 C7 8D 04 F5 08 00 00 00 8B 4D D0 0F AF 45 0C 8D 14 4E DD 04 38 D9 C9 8B 45 0C 0F AF C2 D8 C0 DD 04 C7 8D 0C 8E D8 C0 D9 C1 8D 14 D5 08 00 00 00 0F AF 55 0C 0F AF 4D 0C D8 C1 DD 85 E8 FE FF FF DD 04 3A DD 04 CF D9 CA D8 CB D9 CD DD 9D A8 FE FF FF D9 CD D8 C0 D9 CD D8 C0 D9 CC D8 E1 DD 85 F0 FE FF FF D9 FA D9 CC DC AD A8 FE FF FF D9 CC
+***** EXPENSIVE 2026 494
+
+. 2025 8054F59 145
+. DC 8D E8 FE FF FF D8 CC D9 CC DD 9D A8 FE FF FF DD 45 E0 DD 45 D8 D9 C9 D8 CE D9 C9 D8 CF 8B 95 E4 FE FF FF DE C1 03 55 D4 8B 45 D4 DD 45 E0 8D 0C 10 DE CF D9 CD DC 4D D8 DE EE 8D 34 08 D9 C3 01 F0 D8 C1 D9 CC 8B 7D 14 0F AF BD E4 FE FF FF DE E1 89 85 A4 FE FF FF D9 C3 D9 CB 8B 45 10 DE C2 D9 C9 DD 1C F8 0F AF 55 14 D9 C0 D9 CA D8 E4 D9 C9 D9 E0 D9 CB D9 E0 D9 C9 8B BD A4 FE FF FF DD 1C D0 D9 C9 0F AF 4D 14 0F AF 75 14 0F AF 7D 14
+***** EXPENSIVE 2027 495
+
+. 2026 8054FEA 52
+. 8B 55 D0 D8 E4 D9 CA DE E4 DE E2 DD 1C C8 D9 C9 FF 45 E8 DD 1C F0 8B 4D CC DD 1C F8 8D 04 92 01 95 E4 FE FF FF 01 85 D4 FE FF FF 39 4D E8 0F 82 BA FE FF FF
+***** EXPENSIVE 2028 496
+
+. 2027 805BF2C 161
+. 8B 95 8C FE FF FF 03 55 E0 8B 75 E0 8D 0C 16 8D 34 0E 8B 7D E0 01 F7 8B 45 0C 89 BD 7C FE FF FF 0F AF 85 8C FE FF FF 8B 7D 08 D9 04 87 0F AF 55 0C 0F AF 4D 0C 0F AF 75 0C D9 04 97 D9 04 B7 D9 CA D9 5D CC D9 04 8F 8B BD 7C FE FF FF 0F AF 7D 0C 8B 45 08 D9 5D C4 D9 04 B8 D9 C9 D9 55 C8 D8 C1 D9 5D C0 D8 6D C8 D9 45 C4 D8 C2 D9 C9 D9 5D B8 D9 45 C0 D8 C1 D9 CA D8 6D C4 D9 CA D9 5D B0 D9 5D BC D9 55 B4 DD 85 B8 FE FF FF D9 FA D9 45 C0 D8 65 BC D9 C9 DC 8D B0 FE FF FF DE C9 D9 5D AC
+***** EXPENSIVE 2029 497
+
+. 2028 805BFCD 161
+. DD 85 B0 FE FF FF D8 4D B0 D8 6D CC D9 5D A8 D9 45 A8 D8 45 AC D9 5D A4 D9 45 D4 D9 E0 D8 4D B8 D9 5D A0 D9 45 D0 D8 C9 D9 45 A8 D9 C9 D8 6D A0 D9 C9 D8 65 AC D9 C9 D9 5D A0 D9 45 D0 D9 C9 D9 5D A8 D9 E0 D9 45 D4 D9 C9 D8 4D B8 D9 C9 DE CA DE C1 8B 45 14 D9 45 CC 0F AF 85 90 FE FF FF D8 45 B0 8B 4D 10 D9 1C 81 8B 45 14 0F AF 85 94 FE FF FF 8B 95 94 FE FF FF D9 45 A4 03 55 9C D9 1C 81 8B 8D 94 FE FF FF 8D 04 8D 04 00 00 00 0F AF 45 14 8B 75 10 D9 45 A0 D9 1C 30 8B 45 14 0F AF C2
+***** EXPENSIVE 2030 498
+
+. 2029 805C06E 61
+. D9 45 A8 D9 1C 86 8D 14 95 04 00 00 00 8B 45 18 0F AF 55 14 01 C1 D9 1C 32 89 8D 94 FE FF FF 8B 55 D8 FF 45 E4 8B 4D DC 01 85 90 FE FF FF 01 95 8C FE FF FF 39 4D E4 0F 82 81 FE FF FF
+***** EXPENSIVE 2031 499
+
+. 2030 805B390 32
+. 8B 55 DC C7 45 F0 00 00 00 00 8B 4D E8 D9 42 FC 39 4D F0 D9 42 F8 D9 C9 D9 E0 0F 83 5E 01 00 00
+
+. 2031 80571F6 30
+. 8B 75 D4 46 89 F0 C7 45 E8 01 00 00 00 D1 E8 39 45 E8 89 B5 F8 FE FF FF 0F 83 4A 05 00 00
+
+. 2032 805775E 13
+. F7 45 D4 01 00 00 00 0F 85 C4 01 00 00
+
+. 2033 805776B 19
+. C7 45 E4 00 00 00 00 8B 75 D0 39 75 E4 0F 83 B1 01 00 00
+***** EXPENSIVE 2035 500
+
+. 2034 805777E 185
+. 8B 45 D4 48 DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 DD 9D F0 FE FF FF DD 9D E8 FE FF FF 89 85 E4 FE FF FF 89 85 D4 FE FF FF 8B B5 D4 FE FF FF 8B 45 0C 8B 7D 08 0F AF C6 D9 04 87 8D 04 B5 04 00 00 00 8B 4D D4 0F AF 45 0C 8D 14 4E D9 04 38 8B 45 0C 0F AF C2 D9 04 87 D9 CA D8 C0 D9 CA D8 C0 D9 CA 8D 0C 8E D9 95 18 FF FF FF D8 C2 D9 9D 0C FF FF FF 0F AF 4D 0C DD 85 E8 FE FF FF 8D 14 95 04 00 00 00 0F AF 55 0C D9 04 8F D9 C9 D8 8D 0C FF FF FF D8 E1 D9 04 3A D9 C9 D9 9D 08 FF FF FF D9 CA D8 C0 D9 CA D8 C0 DD 85 F0 FE FF FF D9 FA D9 CC D8 AD 18 FF FF FF
+***** EXPENSIVE 2036 501
+
+. 2035 8057837 179
+. D9 CC DC 8D E8 FE FF FF D8 CC D9 9D 04 FF FF FF D9 CB D9 9D 18 FF FF FF D9 45 E0 D9 45 DC D9 C9 D8 CC D9 C9 D8 CB 8B 95 E4 FE FF FF 03 55 D8 8B 45 D8 DE C1 D9 45 E0 8D 0C 10 DE CB D9 85 04 FF FF FF D9 CC D8 4D DC D9 CC D8 A5 08 FF FF FF 8D 34 08 D9 9D 00 FF FF FF D9 CA 01 F0 DE E3 D9 85 0C FF FF FF D9 85 04 FF FF FF 8B 7D 14 0F AF BD E4 FE FF FF D8 85 08 FF FF FF D9 C9 89 85 BC FE FF FF DE C2 D9 C9 8B 45 10 D9 1C B8 D9 85 00 FF FF FF D9 C1 80 B5 03 FF FF FF 80 8B BD BC FE FF FF D9 E0 D9 C9 0F AF 55 14 0F AF 4D 14 0F AF 75 14 D8 E4
+***** EXPENSIVE 2037 502
+
+. 2036 80578EA 69
+. D9 CC 0F AF 7D 14 D8 AD 00 FF FF FF D9 CA D8 E3 D9 C9 DE E3 D9 1C 90 D9 CA D9 1C 88 D9 C9 D9 1C B0 D9 1C B8 8B 55 D4 8D 04 92 FF 45 E4 8B 4D D0 01 95 E4 FE FF FF 01 85 D4 FE FF FF 39 4D E4 0F 82 79 FE FF FF
+
+. 2037 804D457 41
+. 83 EC 0C 8B 45 EC 8B 55 14 FF B4 82 08 01 00 00 56 FF 75 E8 51 FF 75 1C FF 75 C8 FF 75 CC FF 75 D0 FF 75 D4 E8 C4 21 00 00
+
+. 2038 804F644 77
+. 55 89 E5 57 56 53 81 EC AC 00 00 00 31 D2 8B 45 24 F7 75 1C 89 45 E0 31 D2 8B 45 24 F7 75 20 89 45 DC 31 D2 8B 45 20 F7 75 1C 8B 55 1C 4A 31 FF E8 00 00 00 00 5B 81 C3 9B 1A 01 00 89 55 D0 0F AF D0 3B 7D E0 89 45 D8 89 55 D4 73 42
+***** EXPENSIVE 2040 503
+
+. 2039 804F691 66
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+
+. 2138 8056B92 104
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+
+. 2139 8056BFA 185
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+
+. 2140 8056CB3 158
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+
+. 2141 8056D51 131
+. D9 45 94 D8 EA D9 C9 D9 1C 06 D9 C2 D9 45 D0 D9 CA D9 55 8C D9 C9 D8 C7 D9 CA DE C9 D9 45 CC D8 CA D9 CE 8B 45 14 8B 75 10 D8 6D 98 D9 CB D8 45 94 D9 CD 0F AF C2 D8 6D 9C D9 C9 DE E6 D9 5D 88 D9 C9 D9 55 84 D9 CB D9 55 80 D9 CC D9 1C 86 D9 45 CC D8 4D 8C D9 C9 D8 4D D0 DE C1 D9 45 C4 D9 45 C8 8B 45 14 D8 4D 88 D9 C9 D8 CC 8D 14 95 04 00 00 00 0F AF 55 14 0F AF C1 DE E9 D9 C9 D9 14 32 D9 C9
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+
+. 2142 8056DD4 154
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+
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+
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+
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+
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+
+. 2149 8051FC0 11
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+
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+
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+
+. 2152 805200E 22
+. D9 5D 84 C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 CE 08 00 00
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+
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+
+. 2154 8052011 19
+. C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 CE 08 00 00
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+vex iropt: not unrolling (81 sts)
+
+. 2155 8058CBC 80
+. 8B 45 EC 01 F0 8B 55 0C 0F AF D6 89 45 D0 8B 45 08 DD 04 D0 8B 45 D0 0F AF 45 0C 8B 55 08 DD 04 C2 D9 C1 8B 45 14 0F AF C7 8B 55 10 D8 C1 DD 1C C2 8B 45 14 0F AF C1 DE E9 DD 1C C2 FF 45 F0 8B 45 E8 03 4D 18 03 7D 18 03 75 E4 39 45 F0 72 B0
+
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+
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+
+. 2158 805A58E 33
+. 31 D2 52 8B 45 18 50 DF 2C 24 DC BB 3C F6 FF FF 83 EC 08 DD 14 24 DD 9D E8 FE FF FF E8 71 E0 FE FF
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+
+. 2159 805A5AF 20
+. DD 85 E8 FE FF FF DD 1C 24 DD 9D 78 FF FF FF E8 6D E1 FE FF
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+
+. 2160 805A5C3 35
+. DD 9D 70 FF FF FF C7 45 E0 00 00 00 00 8B 55 D8 80 B5 77 FF FF FF 80 83 C4 10 39 55 E0 0F 83 32 02 00 00
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+
+. 2161 805A5E6 103
+. DD 83 34 F6 FF FF DD 83 44 F6 FF FF D9 C9 DD 9D 40 FF FF FF DD 9D 38 FF FF FF C7 85 34 FF FF FF 00 00 00 00 C7 85 30 FF FF FF 00 00 00 00 31 FF C7 85 2C FF FF FF 00 00 00 00 C7 45 D0 00 00 00 00 8B 45 18 DD 85 40 FF FF FF DD 85 38 FF FF FF D9 C9 39 45 D0 DD 9D 68 FF FF FF DD 9D 60 FF FF FF 0F 83 A2 01 00 00
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+
+. 2162 805A64D 55
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+
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+
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+. 2165 805A738 89
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+
+. 2166 805A6D8 4
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+
+. 2167 805A6DC 136
+. DD 85 78 FF FF FF D8 C9 DD 85 70 FF FF FF DD 85 70 FF FF FF D9 C9 D8 CD D9 C9 DE CB D9 CC DC 8D 78 FF FF FF DD 85 68 FF FF FF D9 CA DE E5 DE C2 D8 CC DD 85 60 FF FF FF DD 85 60 FF FF FF D9 C9 D8 CC D9 C9 DE CE D9 CB DC 8D 68 FF FF FF D9 C9 DE E3 DE C4 D9 CA D9 C9 D9 CB D9 C9 8B 45 0C 0F AF C2 8B 75 08 DD 04 C6 D9 C1 D9 C4 D9 C9 D8 CA D9 C9 DE CA D9 C3 D9 C6 D8 CA D9 C9 D8 CB D9 CA D8 CD D9 CB D8 CF D9 C9
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+
+. 2168 805A764 45
+. DE E2 DE C2 41 DC 85 58 FF FF FF D9 C9 DC 85 50 FF FF FF D9 C9 03 55 DC 3B 4D 18 DD 9D 58 FF FF FF DD 9D 50 FF FF FF 0F 82 47 FF FF FF
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+
+. 2169 805A791 22
+. DD D8 DD D8 DD D8 DD D8 8B 4D D0 8B 45 18 41 2B 45 D0 39 C1 73 79
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+
+. 2170 805A7A7 72
+. 8B 45 D0 0F AF 45 D4 8B 55 E4 89 45 D0 8D 04 47 8D 44 50 FF 8B 55 14 0F AF D0 8D 04 C5 08 00 00 00 DD 85 58 FF FF FF 8B 75 10 0F AF 45 14 DD 1C D6 DD 85 50 FF FF FF DD 1C 30 8B 45 18 39 C1 89 4D D0 0F 82 70 FE FF FF
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+
+. 2171 805A65F 37
+. 8B 45 D0 DD 85 38 FF FF FF DD 85 40 FF FF FF D9 C9 85 C0 DD 95 50 FF FF FF DD 95 58 FF FF FF D9 C0 D9 C2 74 42
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+
+. 2172 805A684 77
+. DD 85 68 FF FF FF DD 85 68 FF FF FF DD 85 60 FF FF FF DD 85 60 FF FF FF D9 CB D9 E0 D9 CA DC 4D C8 D9 C9 DC 4D C0 D9 CA DC 4D C0 D9 CB DC 4D C8 D9 C9 DE C2 DE C2 DD 9D 68 FF FF FF DD 9D 60 FF FF FF 31 C9 3B 4D 18 0F 83 C0 01 00 00
+
+. 2173 805A820 4
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+
+. 2174 805A862 47
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+
+. 2175 805A7E1 14
+. 8B 45 18 39 C1 89 4D D0 0F 82 70 FE FF FF
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+
+. 2176 805A824 62
+. 8B 95 34 FF FF FF 0F AF 45 D4 8D 04 42 8B 55 E4 D1 E2 29 D0 48 8B 55 14 0F AF D0 DD 85 58 FF FF FF 8B 75 10 8D 04 C5 08 00 00 00 DD 1C D6 0F AF 45 14 80 B5 57 FF FF FF 80 E9 76 FF FF FF
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+
+. 2177 805A7D8 23
+. DD 85 50 FF FF FF DD 1C 30 8B 45 18 39 C1 89 4D D0 0F 82 70 FE FF FF
+
+. 2178 805A7EF 41
+. 8B 55 1C 8B 4D D4 FF 45 E0 8B 75 D8 01 95 34 FF FF FF 01 95 30 FF FF FF 01 D7 01 8D 2C FF FF FF 39 75 E0 0F 82 08 FE FF FF
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+
+. 2179 8053758 53
+. 8B 75 AC 01 75 B4 8B 45 B4 31 D2 F7 75 08 89 55 B4 31 D2 52 8B 45 B4 50 DF 2C 24 DC 4D C8 83 EC 08 8B 45 C4 8B B0 08 02 00 00 DD 55 88 DD 1C 24 E8 93 4E FF FF
+
+. 2180 8053C9C 27
+. 8B 55 E0 42 89 D0 C7 45 F0 01 00 00 00 D1 E8 39 45 F0 89 55 D4 0F 83 32 01 00 00
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+
+. 2181 8053CB7 49
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+
+. 2182 8053CE8 152
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+
+. 2183 8053D80 76
+. D9 C9 DD 1C 08 D9 C9 D8 CB 8B 45 14 0F AF 45 B0 DE E9 DD 1C C1 8B 45 B0 8D 0C C5 08 00 00 00 D8 CA D9 C9 D8 CB 0F AF 4D 14 DE C1 8B 55 10 DD 1C 11 FF 45 EC 8B 4D E0 8B 45 D8 03 7D CC 03 75 C8 01 4D C4 39 45 EC 0F 82 3C FF FF FF
+***** EXPENSIVE 2185 568
+
+. 2184 8053DCC 29
+. DD D8 DD D8 8B 45 D4 FF 45 F0 D1 E8 83 45 C0 10 83 6D BC 02 39 45 F0 0F 82 E3 FE FF FF
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+
+. 2185 8053CCC 28
+. C7 45 EC 00 00 00 00 8B 55 D8 8B 45 C0 39 55 EC DD 40 F0 DD 40 F8 0F 83 8D 01 00 00
+
+. 2186 8053DE9 9
+. F7 45 E0 01 00 00 00 75 7B
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+
+. 2187 80550E5 31
+. C7 45 D0 00 00 00 00 8B 55 18 39 55 D0 DD 85 60 FF FF FF DD 85 58 FF FF FF 0F 83 40 07 00 00
+***** EXPENSIVE 2189 571
+vex iropt: not unrolling (85 sts)
+
+. 2188 805B308 80
+. 8B 45 EC 01 F0 8B 55 0C 0F AF D6 89 45 D4 8B 45 08 D9 04 90 8B 45 D4 0F AF 45 0C 8B 55 08 D9 04 82 D9 C1 8B 45 14 0F AF C7 8B 55 10 D8 C1 D9 1C 82 8B 45 14 0F AF C1 DE E9 D9 1C 82 FF 45 F0 8B 45 E8 03 4D 18 03 7D 18 03 75 E4 39 45 F0 72 B0
+
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+
+. 2190 805CDA3 13
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+
+. 2191 805CDB0 33
+. 31 D2 52 8B 45 18 50 DF 2C 24 DC BB 3C F6 FF FF 83 EC 08 DD 14 24 DD 9D 28 FF FF FF E8 4F B8 FE FF
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+
+. 2192 805CDD1 17
+. DD 85 28 FF FF FF DD 1C 24 D9 5D 9C E8 4E B9 FE FF
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+
+. 2193 805CDE2 27
+. C7 45 DC 00 00 00 00 8B 55 D4 D9 E0 83 C4 10 39 55 DC D9 5D 98 0F 83 E6 01 00 00
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+
+. 2194 805CDFD 99
+. D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D9 5D 80 D9 9D 7C FF FF FF C7 85 78 FF FF FF 00 00 00 00 C7 85 74 FF FF FF 00 00 00 00 C7 85 70 FF FF FF 00 00 00 00 C7 85 6C FF FF FF 00 00 00 00 C7 45 CC 00 00 00 00 8B 45 18 D9 45 80 D9 85 7C FF FF FF D9 C9 39 45 CC D9 5D 94 D9 5D 90 0F 83 56 01 00 00
+***** EXPENSIVE 2196 576
+
+. 2195 805CE60 40
+. 8B 55 E0 8B 8D 6C FF FF FF 8D 3C 51 8B 45 CC D9 85 7C FF FF FF D9 45 80 D9 C9 85 C0 D9 55 88 D9 55 8C D9 C0 D9 C2 74 30
+
+. 2196 805CEB8 11
+. 31 F6 3B 75 18 0F 83 90 01 00 00
+
+. 2197 805CEC3 7
+. 8D 57 FF 85 F6 74 44
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+
+. 2198 805CF0E 77
+. 8B 45 0C 0F AF C2 8B 4D 08 D9 04 81 D9 C1 D9 C4 D9 C9 D8 CA D9 C9 DE CA D9 C3 D9 C6 D8 CA D9 C9 D8 CB D9 CA D8 CD D9 CB D8 CF D9 C9 DE E2 DE C2 46 D8 45 8C D9 C9 D8 45 88 D9 C9 03 55 D8 3B 75 18 D9 5D 8C D9 5D 88 0F 82 6B FF FF FF
+
+. 2199 805CEC6 4
+. 85 F6 74 44
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+
+. 2200 805CECA 112
+. D9 45 9C D8 C9 D9 45 98 D9 45 98 D9 C9 D8 CD D9 C9 DE CB D9 CC D8 4D 9C D9 45 94 D9 CA DE E5 DE C2 D8 CC D9 45 90 D9 45 90 D9 C9 D8 CC D9 C9 DE CE D9 CB D8 4D 94 D9 C9 DE E3 DE C4 D9 CA D9 C9 D9 CB D9 C9 8B 45 0C 0F AF C2 8B 4D 08 D9 04 81 D9 C1 D9 C4 D9 C9 D8 CA D9 C9 DE CA D9 C3 D9 C6 D8 CA D9 C9 D8 CB D9 CA D8 CD D9 CB D8 CF D9 C9
+***** EXPENSIVE 2202 579
+
+. 2201 805CF3A 33
+. DE E2 DE C2 46 D8 45 8C D9 C9 D8 45 88 D9 C9 03 55 D8 3B 75 18 D9 5D 8C D9 5D 88 0F 82 6B FF FF FF
+***** EXPENSIVE 2203 580
+
+. 2202 805CF5B 22
+. DD D8 DD D8 DD D8 DD D8 8B 4D CC 8B 45 18 41 2B 45 CC 39 C1 73 7A
+***** EXPENSIVE 2204 581
+
+. 2203 805CF71 69
+. 8B 75 CC 0F AF 75 D0 8B 95 70 FF FF FF 8D 04 72 8B 75 E0 8D 44 70 FF 8B 55 14 0F AF D0 8D 04 85 04 00 00 00 D9 45 8C 8B 75 10 0F AF 45 14 D9 1C 96 D9 45 88 D9 1C 30 8B 45 18 39 C1 89 4D CC 0F 82 B6 FE FF FF
+***** EXPENSIVE 2205 582
+
+. 2204 805CE6C 28
+. 8B 45 CC D9 85 7C FF FF FF D9 45 80 D9 C9 85 C0 D9 55 88 D9 55 8C D9 C0 D9 C2 74 30
+***** EXPENSIVE 2206 583
+
+. 2205 805CE88 59
+. D9 45 94 D9 45 94 D9 45 90 D9 45 90 D9 CB D9 E0 D9 CA D8 4D C8 D9 C9 D8 4D C4 D9 CA D8 4D C4 D9 CB D8 4D C8 D9 C9 DE C2 DE C2 D9 5D 94 D9 5D 90 31 F6 3B 75 18 0F 83 90 01 00 00
+
+. 2206 805CFEB 4
+. 39 C1 74 38
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+
+. 2207 805D027 44
+. 8B 45 CC 0F AF 45 D0 8B 95 74 FF FF FF 89 45 CC 8B 75 E0 8D 04 42 8D 44 70 FF 0F AF 45 14 D9 45 8C 8B 55 10 D9 1C 82 E9 55 FF FF FF
+
+. 2208 805CFA8 14
+. 8B 45 18 39 C1 89 4D CC 0F 82 B6 FE FF FF
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+
+. 2209 805CFEF 56
+. 8B 95 78 FF FF FF 0F AF 45 D0 8D 04 42 8B 55 E0 D1 E2 29 D0 48 8B 55 14 0F AF D0 D9 45 8C 8B 75 10 8D 04 85 04 00 00 00 D9 1C 96 0F AF 45 14 80 75 8B 80 E9 7B FF FF FF
+***** EXPENSIVE 2211 586
+
+. 2210 805CFA2 20
+. D9 45 88 D9 1C 30 8B 45 18 39 C1 89 4D CC 0F 82 B6 FE FF FF
+
+. 2211 805CFB6 45
+. 8B 55 1C 8B 4D D0 FF 45 DC 8B 75 D4 01 95 78 FF FF FF 01 95 74 FF FF FF 01 95 70 FF FF FF 01 8D 6C FF FF FF 39 75 DC 0F 82 59 FE FF FF
+
+. 2212 8056491 27
+. 8B 55 E0 42 89 D0 C7 45 F0 01 00 00 00 D1 E8 39 45 F0 89 55 D4 0F 83 31 01 00 00
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+
+. 2213 80564AC 48
+. 8B 4D 20 8B 7D E0 83 C1 08 8D 7C 3F FE 89 4D C0 89 7D BC 90 C7 45 EC 00 00 00 00 8B 55 D8 8B 45 C0 39 55 EC D9 40 F8 D9 40 FC 0F 83 8D 01 00 00
+***** EXPENSIVE 2215 588
+
+. 2214 80564DC 152
+. 8B 45 E0 D1 E0 8B 7D BC 8B 4D F0 4F 8D 74 09 FF C7 45 C4 00 00 00 00 89 45 CC 89 45 C8 8D 76 00 8B 45 0C 8B 55 08 0F AF C6 D9 04 82 8D 04 B5 04 00 00 00 0F AF 45 0C D9 04 10 8B 45 0C 0F AF C7 D9 04 82 8D 04 BD 04 00 00 00 0F AF 45 0C D9 04 10 8B 4D F0 8B 55 C4 8D 44 4A FF 8B 4D E8 8B 55 14 01 C1 0F AF D0 D9 C3 D9 C3 D9 CD 8D 04 85 04 00 00 00 D8 E3 D9 CC D8 C2 D9 C9 89 4D B0 0F AF 45 14 8B 4D 10 DE C3 D9 CC DE E1 D9 C4 D9 C6 D9 CB D9 1C 91 D9 CA D8 CB
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+
+. 2215 8056574 76
+. D9 C9 D9 1C 08 D9 C9 D8 CB 8B 45 14 0F AF 45 B0 DE E9 D9 1C 81 8B 45 B0 8D 0C 85 04 00 00 00 D8 CA D9 C9 D8 CB 0F AF 4D 14 DE C1 8B 55 10 D9 1C 11 FF 45 EC 8B 4D E0 8B 45 D8 03 7D CC 03 75 C8 01 4D C4 39 45 EC 0F 82 3C FF FF FF
+***** EXPENSIVE 2217 590
+
+. 2216 80565C0 29
+. DD D8 DD D8 8B 45 D4 FF 45 F0 D1 E8 83 45 C0 08 83 6D BC 02 39 45 F0 0F 82 E3 FE FF FF
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+
+. 2217 80564C0 28
+. C7 45 EC 00 00 00 00 8B 55 D8 8B 45 C0 39 55 EC D9 40 F8 D9 40 FC 0F 83 8D 01 00 00
+
+. 2218 80565DD 9
+. F7 45 E0 01 00 00 00 75 7B
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+
+. 2219 80579EF 25
+. C7 45 CC 00 00 00 00 8B 55 18 39 55 CC D9 45 88 D9 45 84 0F 83 E0 06 00 00
+***** EXPENSIVE 2221 593
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+
+. 2274 8059103 132
+. D9 CD DC 4D B0 D9 CD DE E1 D9 CA DE C4 D9 C0 D9 C3 D9 C9 D8 C3 D9 C9 D8 C5 DD 83 BC F8 FF FF DD 83 BC F8 FF FF D9 C9 D8 CB D9 C9 D8 CA D9 CC DE E5 D9 CD DE E6 D9 C9 DC 45 A8 D9 CC DC 6D A8 D9 CA DC 6D A0 D9 CB DC 4D 98 D9 CD DC 4D 98 D9 CC DD 55 A8 8B 4D DC 8B 45 14 8D 14 4E 0F AF C6 8B 4D 10 DD 1C C1 8D 04 F5 08 00 00 00 0F AF 45 14 DC 45 A0 DD 14 08 D9 C1 8B 45 14 0F AF C2 D9 C3 D9 C9 D8 E5
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+
+. 2276 8053FB4 56
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+***** EXPENSIVE 2278 638
+vex iropt: not unrolling (108 sts)
+
+. 2277 80541DC 144
+. 8B 45 0C 0F AF C7 8B 4D 08 8B 75 D8 DD 04 C1 D1 E6 8D 04 FD 08 00 00 00 8D 14 3E 0F AF 45 0C D9 C1 DC 0C 08 0F AF 55 0C 8B 45 90 DD 04 D1 03 45 DC 8B 55 DC 01 C2 D9 C2 8B 4D 14 D8 C0 D9 CB 0F AF 4D 90 D8 E1 D9 CB DE C1 89 95 74 FF FF FF 8B 55 10 DD 1C CA D9 C1 8B 8D 74 FF FF FF D9 E0 D9 CA 0F AF 4D 14 0F AF 45 14 D8 E1 D9 CA DE E1 D9 C9 DD 1C C2 DD 1C CA 8B 4D D8 01 CE 01 F7 FF 45 E8 8B 75 D4 01 4D 90 39 75 E8 0F 82 70 FF FF FF
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+
+. 2278 805B6A4 149
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+
+. 2279 805B739 126
+. D9 CD D8 4D C8 D9 CD DE E1 D9 CA DE C4 D9 C0 D9 C3 D9 C9 D8 C3 D9 C9 D8 C5 D9 45 B4 D9 45 B4 D9 C9 D8 CB D9 C9 D8 CA D9 CC DE E5 D9 CD DE E6 D8 45 C0 D9 CC D8 6D C4 D9 CA D8 6D C0 D9 CB D8 4D BC D9 CD D8 4D BC D9 C9 D8 45 C4 D9 CC D9 55 C0 D9 CC 8B 4D DC 8B 45 14 8D 14 4E 0F AF C6 8B 4D 10 D9 1C 81 D9 CB 8D 04 B5 04 00 00 00 0F AF 45 14 D9 1C 08 D9 C0 8B 45 14 0F AF C2 D9 C2
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+
+. 2280 805B7B7 86
+. D9 C9 D8 E4 8D 14 95 04 00 00 00 D9 1C 81 0F AF 55 14 D8 C4 8B 45 14 D9 1C 0A 0F AF 45 B0 8B 55 B0 DE C2 D9 C9 D9 1C 81 DE E1 8D 04 95 04 00 00 00 0F AF 45 14 D9 E0 D9 1C 08 FF 45 E8 8B 4D 18 8B 45 E0 01 CA 01 CE 03 7D DC 39 45 E8 89 55 B0 0F 82 97 FE FF FF
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+
+. 2281 8056798 60
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+***** EXPENSIVE 2283 643
+vex iropt: not unrolling (114 sts)
+
+. 2282 80569D4 138
+. 8B 45 0C 0F AF C7 8B 4D 08 8B 75 DC D9 04 81 D1 E6 8D 04 BD 04 00 00 00 8D 14 3E 0F AF 45 0C D9 C1 D8 0C 08 0F AF 55 0C 8B 45 A8 D9 04 91 03 45 E0 8B 55 E0 01 C2 D9 C2 8B 4D 14 D8 C0 D9 CB 0F AF 4D A8 D8 E1 D9 CB DE C1 89 55 94 8B 55 10 D9 1C 8A D9 C1 8B 4D 94 D9 E0 D9 CA 0F AF 4D 14 0F AF 45 14 D8 E1 D9 CA DE E1 D9 C9 D9 1C 82 D9 1C 8A 8B 4D DC 01 CE 01 F7 FF 45 E8 8B 75 D8 01 4D A8 39 75 E8 0F 82 76 FF FF FF
+***** EXPENSIVE 2284 644
+
+. 2283 8059400 92
+. 8B 85 58 FF FF FF 8B 55 20 DD 44 02 F0 DD 44 02 F8 8B 55 24 DD 5D C8 DD 5D D0 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 28 DD 5D B8 DD 44 02 F8 D9 C9 DD 5D C0 DD 5D A8 DD 44 02 F0 C7 45 E8 00 00 00 00 8B 45 E0 80 75 CF 80 80 75 BF 80 80 75 AF 80 39 45 E8 DD 5D B0 0F 83 77 02 00 00
+***** EXPENSIVE 2285 645
+
+. 2284 805BA34 92
+. 8B 85 54 FF FF FF 8B 55 20 D9 44 82 F8 D9 44 82 FC 8B 55 24 D9 5D C8 D9 5D CC D9 44 82 FC D9 44 82 F8 D9 C9 8B 55 28 D9 5D C0 D9 44 82 FC D9 C9 D9 5D C4 D9 5D B8 D9 44 82 F8 C7 45 E8 00 00 00 00 8B 45 E0 80 75 CB 80 80 75 C3 80 80 75 BB 80 39 45 E8 D9 5D BC 0F 83 82 02 00 00
+
+. 2285 805A331 19
+. C7 45 E0 00 00 00 00 8B 7D D8 39 7D E0 0F 83 29 02 00 00
+***** EXPENSIVE 2287 646
+
+. 2286 805A344 95
+. DD 83 34 F6 FF FF DD 83 44 F6 FF FF D9 C9 DD 9D 40 FF FF FF DD 9D 38 FF FF FF C7 85 24 FF FF FF 00 00 00 00 C7 85 20 FF FF FF 00 00 00 00 C7 85 1C FF FF FF 00 00 00 00 C7 45 D0 00 00 00 00 8B 45 18 DD 85 40 FF FF FF DD 85 38 FF FF FF D9 C9 39 45 D0 DD 5D A0 DD 5D 98 0F 83 A3 01 00 00
+***** EXPENSIVE 2288 647
+
+. 2287 805A3A3 46
+. 8B 95 1C FF FF FF C7 85 28 FF FF FF 00 00 00 00 89 55 84 89 F6 8B 45 D0 DD 85 38 FF FF FF 85 C0 DD 55 88 DD 55 90 DD 85 40 FF FF FF 74 30
+
+. 2288 805A401 11
+. 31 C9 3B 4D 18 0F 83 E4 04 00 00
+
+. 2289 805A40C 40
+. 8B 85 4C FF FF FF D1 E8 8B 75 E4 89 85 E4 FE FF FF 29 C6 8B 7D E4 8B 45 84 8D 54 78 FF 8D 76 00 85 C9 0F 85 A4 04 00 00
+***** EXPENSIVE 2291 648
+
+. 2290 805A434 68
+. DD 85 40 FF FF FF DD 85 38 FF FF FF 8B 45 0C 0F AF C2 8B 7D 08 DD 04 C7 8D 04 D5 08 00 00 00 0F AF 45 0C DD 04 38 D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CD DE CA D9 CB DE CA D9 CA 85 C9 DE E3 DE C1 74 24
+***** EXPENSIVE 2292 649
+
+. 2291 805A49C 67
+. D9 C2 D9 C4 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CD D9 CA D8 CC D9 C9 DE E3 DE C1 D9 C9 41 DC 45 90 D9 C9 DC 45 88 D9 C9 8B 85 E4 FE FF FF 03 55 DC 3B 4D 18 DD 5D 90 DD 5D 88 8D 74 06 FF 0F 82 4D FF FF FF
+
+. 2292 805A42C 8
+. 85 C9 0F 85 A4 04 00 00
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+
+. 2293 805A8D8 24
+. 89 F0 C1 E0 04 8B 7D 24 DD 44 07 08 DD 04 07 D9 C9 D9 E0 E9 50 FB FF FF
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+
+. 2294 805A440 56
+. 8B 45 0C 0F AF C2 8B 7D 08 DD 04 C7 8D 04 D5 08 00 00 00 0F AF 45 0C DD 04 38 D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CD DE CA D9 CB DE CA D9 CA 85 C9 DE E3 DE C1 74 24
+***** EXPENSIVE 2296 652
+
+. 2295 805A478 103
+. DD 45 A0 D8 CB DD 45 98 DD 45 98 D9 C9 D8 CE D9 C9 DE CD D9 CD DC 4D A0 D9 C9 DE E5 DE C3 D9 CA D9 CB D9 CA D9 C2 D9 C4 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CD D9 CA D8 CC D9 C9 DE E3 DE C1 D9 C9 41 DC 45 90 D9 C9 DC 45 88 D9 C9 8B 85 E4 FE FF FF 03 55 DC 3B 4D 18 DD 5D 90 DD 5D 88 8D 74 06 FF 0F 82 4D FF FF FF
+***** EXPENSIVE 2297 653
+
+. 2296 805A4DF 19
+. DD D8 DD D8 8B 45 18 2B 45 D0 39 45 D0 0F 83 AC 03 00 00
+***** EXPENSIVE 2298 654
+
+. 2297 805A4F2 84
+. 8B 85 20 FF FF FF 8B 55 E4 03 85 28 FF FF FF 8D 44 50 FF 8B 55 14 0F AF D0 8D 04 C5 08 00 00 00 DD 45 90 8B 4D 10 0F AF 45 14 DD 1C D1 DD 45 88 DD 1C 08 8B 95 28 FF FF FF 8B 45 D4 FF 45 D0 8B 4D 18 8D 14 42 39 4D D0 89 95 28 FF FF FF 0F 82 72 FE FF FF
+***** EXPENSIVE 2299 655
+
+. 2298 805A3B8 25
+. 8B 45 D0 DD 85 38 FF FF FF 85 C0 DD 55 88 DD 55 90 DD 85 40 FF FF FF 74 30
+***** EXPENSIVE 2300 656
+
+. 2299 805A3D1 59
+. DD 45 A0 DD 45 A0 DD 45 98 DD 45 98 D9 CB D9 E0 D9 CA DC 4D C8 D9 C9 DC 4D C0 D9 CA DC 4D C0 D9 CB DC 4D C8 D9 C9 DE C2 DE C2 DD 5D A0 DD 5D 98 31 C9 3B 4D 18 0F 83 E4 04 00 00
+***** EXPENSIVE 2301 657
+
+. 2300 805A89E 56
+. 8B 95 24 FF FF FF 0F AF 45 D4 8D 04 42 8B 55 E4 D1 E2 29 D0 48 8B 55 14 0F AF D0 DD 45 90 8B 4D 10 8D 04 C5 08 00 00 00 DD 1C D1 0F AF 45 14 80 75 8F 80 E9 49 FC FF FF
+***** EXPENSIVE 2302 658
+
+. 2301 805A51F 39
+. DD 45 88 DD 1C 08 8B 95 28 FF FF FF 8B 45 D4 FF 45 D0 8B 4D 18 8D 14 42 39 4D D0 89 95 28 FF FF FF 0F 82 72 FE FF FF
+
+. 2302 805A546 39
+. 8B 75 1C 8B 7D D4 FF 45 E0 8B 45 D8 01 B5 24 FF FF FF 01 B5 20 FF FF FF 01 BD 1C FF FF FF 39 45 E0 0F 82 0F FE FF FF
+
+. 2303 805A56D 20
+. 8B 85 4C FF FF FF FF 45 E4 D1 E8 39 45 E4 0F 82 B0 FD FF FF
+
+. 2304 805CB66 19
+. C7 45 DC 00 00 00 00 8B 7D D4 39 7D DC 0F 83 19 02 00 00
+***** EXPENSIVE 2306 659
+
+. 2305 805CB79 89
+. D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D9 5D 80 D9 9D 7C FF FF FF C7 85 64 FF FF FF 00 00 00 00 C7 85 60 FF FF FF 00 00 00 00 C7 85 5C FF FF FF 00 00 00 00 C7 45 CC 00 00 00 00 8B 45 18 D9 45 80 D9 85 7C FF FF FF D9 C9 39 45 CC D9 5D B0 D9 5D AC 0F 83 99 01 00 00
+***** EXPENSIVE 2307 660
+
+. 2306 805CBD2 44
+. 8B 95 5C FF FF FF C7 85 68 FF FF FF 00 00 00 00 89 55 A0 8D 76 00 8B 45 CC D9 85 7C FF FF FF 85 C0 D9 55 A4 D9 55 A8 D9 45 80 74 30
+
+. 2307 805CC2E 11
+. 31 F6 3B 75 18 0F 83 72 04 00 00
+
+. 2308 805CC39 35
+. 8B 45 84 D1 E8 8B 4D E0 89 85 24 FF FF FF 29 C1 8B 7D E0 8B 45 A0 8D 54 78 FF 90 85 F6 0F 85 3C 04 00 00
+***** EXPENSIVE 2310 661
+
+. 2309 805CC5C 65
+. D9 45 80 D9 85 7C FF FF FF 8B 45 0C 0F AF C2 8B 7D 08 D9 04 87 8D 04 95 04 00 00 00 0F AF 45 0C D9 04 38 D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CD DE CA D9 CB DE CA D9 CA 85 F6 DE E3 DE C1 74 24
+***** EXPENSIVE 2311 662
+
+. 2310 805CCC1 67
+. D9 C2 D9 C4 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CD D9 CA D8 CC D9 C9 DE E3 DE C1 D9 C9 46 D8 45 A8 D9 C9 D8 45 A4 D9 C9 8B 85 24 FF FF FF 03 55 D8 3B 75 18 D9 5D A8 D9 5D A4 8D 4C 01 FF 0F 82 50 FF FF FF
+
+. 2311 805CC54 8
+. 85 F6 0F 85 3C 04 00 00
+***** EXPENSIVE 2313 663
+
+. 2312 805D098 19
+. 8B 7D 24 D9 44 CF 04 D9 04 CF D9 C9 D9 E0 E9 BA FB FF FF
+***** EXPENSIVE 2314 664
+
+. 2313 805CC65 56
+. 8B 45 0C 0F AF C2 8B 7D 08 D9 04 87 8D 04 95 04 00 00 00 0F AF 45 0C D9 04 38 D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CD DE CA D9 CB DE CA D9 CA 85 F6 DE E3 DE C1 74 24
+***** EXPENSIVE 2315 665
+
+. 2314 805CC9D 103
+. D9 45 B0 D8 CB D9 45 AC D9 45 AC D9 C9 D8 CE D9 C9 DE CD D9 CD D8 4D B0 D9 C9 DE E5 DE C3 D9 CA D9 CB D9 CA D9 C2 D9 C4 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CD D9 CA D8 CC D9 C9 DE E3 DE C1 D9 C9 46 D8 45 A8 D9 C9 D8 45 A4 D9 C9 8B 85 24 FF FF FF 03 55 D8 3B 75 18 D9 5D A8 D9 5D A4 8D 4C 01 FF 0F 82 50 FF FF FF
+***** EXPENSIVE 2316 666
+
+. 2315 805CD04 19
+. DD D8 DD D8 8B 45 18 2B 45 CC 39 45 CC 0F 83 49 03 00 00
+***** EXPENSIVE 2317 667
+
+. 2316 805CD17 84
+. 8B 85 60 FF FF FF 8B 55 E0 03 85 68 FF FF FF 8D 44 50 FF 8B 55 14 0F AF D0 8D 04 85 04 00 00 00 D9 45 A8 8B 4D 10 0F AF 45 14 D9 1C 91 D9 45 A4 D9 1C 08 8B 95 68 FF FF FF 8B 45 D0 FF 45 CC 8B 4D 18 8D 14 42 39 4D CC 89 95 68 FF FF FF 0F 82 7D FE FF FF
+***** EXPENSIVE 2318 668
+
+. 2317 805CBE8 22
+. 8B 45 CC D9 85 7C FF FF FF 85 C0 D9 55 A4 D9 55 A8 D9 45 80 74 30
+***** EXPENSIVE 2319 669
+
+. 2318 805CBFE 59
+. D9 45 B0 D9 45 B0 D9 45 AC D9 45 AC D9 CB D9 E0 D9 CA D8 4D C8 D9 C9 D8 4D C4 D9 CA D8 4D C4 D9 CB D8 4D C8 D9 C9 DE C2 DE C2 D9 5D B0 D9 5D AC 31 F6 3B 75 18 0F 83 72 04 00 00
+***** EXPENSIVE 2320 670
+
+. 2319 805D060 56
+. 8B 95 64 FF FF FF 0F AF 45 D0 8D 04 42 8B 55 E0 D1 E2 29 D0 48 8B 55 14 0F AF D0 D9 45 A8 8B 4D 10 8D 04 85 04 00 00 00 D9 1C 91 0F AF 45 14 80 75 A7 80 E9 AC FC FF FF
+***** EXPENSIVE 2321 671
+
+. 2320 805CD44 39
+. D9 45 A4 D9 1C 08 8B 95 68 FF FF FF 8B 45 D0 FF 45 CC 8B 4D 18 8D 14 42 39 4D CC 89 95 68 FF FF FF 0F 82 7D FE FF FF
+
+. 2321 805CD6B 39
+. 8B 75 1C 8B 7D D0 FF 45 DC 8B 45 D4 01 B5 64 FF FF FF 01 B5 60 FF FF FF 01 BD 5C FF FF FF 39 45 DC 0F 82 1C FE FF FF
+
+. 2322 805CD92 17
+. 8B 45 84 FF 45 E0 D1 E8 39 45 E0 0F 82 C3 FD FF FF
+
+. 2323 804D708 11
+. 8B 4D E8 85 C9 0F 85 F1 00 00 00
+
+. 2324 804D804 6
+. 83 7D 18 FF 74 12
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+
+. 2325 804D81C 14
+. 8B 7D D4 DD 47 F0 DD 47 F8 E9 F5 FE FF FF
+
+. 2326 804D71F 11
+. 31 F6 3B 75 CC 0F 83 D4 00 00 00
+***** EXPENSIVE 2328 673
+vex iropt: 2 x unrolling (44 sts -> 88 sts)
+
+. 2327 804F6AD 38
+. 8B 45 08 DD 04 30 8B 55 10 DD 1C 0A DD 44 30 08 47 DD 5C 0A 08 03 B5 64 FF FF FF 03 8D 60 FF FF FF 3B 7D E0 72 DA
+***** EXPENSIVE 2329 674
+vex iropt: not unrolling (80 sts)
+
+. 2328 804F710 115
+. 8B 85 68 FF FF FF 8B 4D C0 01 F9 8D 14 38 8B 45 0C 0F AF C1 8B 75 14 0F AF F2 C1 E0 04 89 8D 54 FF FF FF 0F AF 55 0C 8B 4D 08 DD 04 01 C1 E2 04 DC 04 11 C1 E6 04 8B 4D 10 DD 1C 31 03 45 08 03 55 08 DD 40 08 DC 42 08 DD 5C 31 08 8B 8D 54 FF FF FF DD 00 0F AF 4D 14 C1 E1 04 DC 2A 8B 75 10 DD 1C 0E DD 40 08 47 DC 6A 08 3B 7D E0 DD 5C 0E 08 72 8D
+***** EXPENSIVE 2330 675
+vex iropt: 2 x unrolling (44 sts -> 88 sts)
+
+. 2329 804F7BE 38
+. 8B 55 10 DD 04 32 8B 45 08 DD 1C 08 DD 44 32 08 47 DD 5C 08 08 03 B5 70 FF FF FF 03 8D 6C FF FF FF 3B 7D E0 72 DA
+***** EXPENSIVE 2331 676
+vex iropt: 2 x unrolling (53 sts -> 106 sts)
+
+. 2330 804F820 55
+. 8D 04 3E 0F AF 45 14 C1 E0 04 8B 4D 10 DD 04 01 8B 4D 08 DC 04 11 DD 1C 11 8B 4D 10 DD 44 01 08 8B 45 08 DC 44 10 08 47 DD 5C 10 08 03 95 54 FF FF FF 3B 7D E0 72 C9
+***** EXPENSIVE 2332 677
+vex iropt: not unrolling (63 sts)
+
+. 2331 804F8BC 81
+. 8B 85 78 FF FF FF 8D 0C 38 8B 55 10 0F AF 4D 0C DD 04 32 C1 E1 04 8B 45 08 DD 1C 08 DD 44 32 08 8B 55 B0 DD 5C 08 08 8D 0C 3A 0F AF 4D 0C 8B 45 10 DD 04 30 C1 E1 04 8B 55 08 DD 1C 0A 47 DD 44 30 08 03 B5 7C FF FF FF 3B 7D E0 DD 5C 0A 08 72 AF
+***** EXPENSIVE 2333 678
+vex iropt: not unrolling (114 sts)
+
+. 2332 804F964 143
+. 8D 14 3E 8B 8D 54 FF FF FF 8D 04 39 0F AF 55 14 8B 4D 10 C1 E2 04 0F AF 45 14 D9 C1 DC 0C 11 C1 E0 04 D9 C1 DC 4C 01 08 D9 C1 D9 C4 DC 4C 11 08 D9 C9 D8 E2 D9 CB DE C2 8B 95 78 FF FF FF D9 C3 DC 0C 01 D9 CB 8D 04 3A 0F AF 45 0C 8B 4D 08 C1 E0 04 DC 04 01 D9 C1 D9 C9 DD 1C 01 D8 C3 01 C8 DC 40 08 8B 55 B0 DD 58 08 D9 C9 8D 04 3A 0F AF 45 0C C1 E0 04 DC 04 01 DD 1C 01 DE E1 01 C8 47 DC 40 08 3B 7D E0 DD 58 08 0F 82 71 FF FF FF
+vex iropt: 2 x unrolling (58 sts -> 116 sts)
+
+. 2333 804FA64 62
+. 8B 7D 08 8B 04 37 8B 54 37 04 8B 7D 10 89 04 0F 89 54 0F 04 8B 7D 08 8B 44 37 08 8B 54 37 0C 8B 7D 10 89 44 0F 08 FF 45 E4 8B 45 D8 89 54 0F 0C 03 75 88 03 8D 4C FF FF FF 39 45 E4 72 C2
+vex iropt: not unrolling (68 sts)
+
+. 2334 804FAE0 82
+. 8B 4D E4 8B 75 E4 03 8D 4C FF FF FF 03 75 A8 0F AF 4D 0C C1 E1 04 8B 7D 08 0F AF 75 14 8B 04 0F 8B 54 0F 04 C1 E6 04 8B 7D 10 89 04 37 89 54 37 04 8B 7D 08 8B 44 0F 08 8B 54 0F 0C 8B 4D 10 89 44 31 08 89 54 31 0C FF 45 E4 8B 75 D8 39 75 E4 72 AE
+***** EXPENSIVE 2336 679
+
+. 2335 804D80A 18
+. 8B 45 D4 DD 40 F8 DD 40 F0 D9 C9 D9 E0 E9 03 FF FF FF
+
+. 2336 8050BA0 11
+. 8B 45 E8 85 C0 0F 85 CD 00 00 00
+
+. 2337 8050C78 6
+. 83 7D 18 FF 74 12
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+
+. 2338 8050C90 14
+. 8B 7D DC D9 47 F8 D9 47 FC E9 19 FF FF FF
+
+. 2339 8050BB7 11
+. 31 F6 3B 75 D8 0F 83 B0 00 00 00
+vex iropt: 2 x unrolling (46 sts -> 92 sts)
+
+. 2340 8052A7E 38
+. 8B 75 08 8B 04 CE 8B 75 10 89 04 D6 8B 75 08 8B 44 CE 04 47 8B 75 10 89 44 D6 04 03 4D 0C 03 55 14 3B 7D E4 72 DA
+***** EXPENSIVE 2342 681
+vex iropt: not unrolling (104 sts)
+
+. 2341 8052AE4 110
+. 8B 55 C0 01 FA 89 55 80 8B 75 C4 8B 55 0C 0F AF 55 80 8D 04 3E 8B 4D 08 8B 75 14 D9 04 D1 0F AF F0 0F AF 45 0C D8 04 C1 8B 4D 10 D9 1C F1 8B 4D 08 D9 44 D1 04 D8 44 C1 04 8B 4D 10 D9 5C F1 04 8B 75 08 D9 04 D6 8B 4D 80 D8 2C C6 0F AF 4D 14 8B 75 10 D9 1C CE 8B 75 08 D9 44 D6 04 47 D8 6C C6 04 3B 7D E4 8B 45 10 D9 5C C8 04 72 92
+vex iropt: 2 x unrolling (46 sts -> 92 sts)
+
+. 2342 8052B72 38
+. 8B 75 10 8B 04 CE 8B 75 08 89 04 D6 8B 75 10 8B 44 CE 04 47 8B 75 08 89 44 D6 04 03 4D 14 03 55 0C 3B 7D E4 72 DA
+***** EXPENSIVE 2344 682
+vex iropt: 2 x unrolling (60 sts -> 120 sts)
+
+. 2343 8052BC8 49
+. 8D 04 39 0F AF 45 14 8B 75 10 D9 04 C6 8B 75 08 D8 04 D6 D9 1C D6 8B 75 10 D9 44 C6 04 8B 45 08 D8 44 D0 04 47 D9 5C D0 04 03 55 0C 3B 7D E4 72 CF
+vex iropt: not unrolling (76 sts)
+
+. 2344 8052C54 81
+. 8B 75 88 8D 04 3E 8B 75 10 8B 14 CE 0F AF 45 0C 8B 75 08 89 14 C6 8B 75 10 8B 54 CE 04 8B 75 08 89 54 C6 04 8B 55 AC 8D 04 3A 8B 75 10 8B 14 CE 0F AF 45 0C 8B 75 08 89 14 C6 47 8B 75 10 8B 54 CE 04 8B 75 08 03 4D 14 3B 7D E4 89 54 C6 04 72 AF
+***** EXPENSIVE 2346 683
+vex iropt: not unrolling (124 sts)
+
+. 2345 8052D00 127
+. 8D 14 3E 8B 4D 80 0F AF 55 14 8D 04 39 D9 C1 8B 4D 10 D8 0C D1 0F AF 45 14 D9 C1 D8 4C C1 04 D9 C1 D9 C4 D8 4C D1 04 D9 C9 D8 E2 D9 CB DE C2 8B 55 88 D9 C3 D8 0C C1 D9 C1 8D 04 3A 8B 4D 08 0F AF 45 0C D8 C1 D9 CC D8 04 C1 D9 CC D8 44 C1 04 D9 CC 8B 55 AC D9 1C C1 D9 CB D9 5C C1 04 8D 04 3A 0F AF 45 0C DE E2 47 D8 04 C1 D9 C9 D8 44 C1 04 D9 C9 3B 7D E4 D9 1C C1 D9 5C C1 04 72 81
+vex iropt: 2 x unrolling (49 sts -> 98 sts)
+
+. 2346 8052DD5 43
+. 8B 75 08 8B 04 CE 8B 75 10 89 04 D6 8B 75 08 8B 44 CE 04 8B 75 10 89 44 D6 04 FF 45 E8 8B 45 DC 03 4D 0C 03 55 14 39 45 E8 72 D5
+vex iropt: 2 x unrolling (54 sts -> 108 sts)
+
+. 2347 8052E38 56
+. 8B 45 E8 8B 4D E8 03 85 78 FF FF FF 0F AF 45 0C 01 F9 8B 75 08 8B 14 C6 0F AF 4D 14 8B 75 10 89 14 CE 8B 55 08 8B 44 C2 04 89 44 CE 04 FF 45 E8 8B 4D DC 39 4D E8 72 C8
+***** EXPENSIVE 2349 684
+
+. 2348 8050C7E 18
+. 8B 45 DC D9 40 FC D9 40 F8 D9 C9 D9 E0 E9 27 FF FF FF
+***** EXPENSIVE 2350 685
+vex iropt: not unrolling (111 sts)
+
+. 2349 8059220 127
+. 8B 4D E4 8D 04 39 01 C1 8B 55 0C 0F AF D7 0F AF 45 0C 89 8D 7C FF FF FF 8B 4D 08 DD 04 D1 DD 04 C1 8B 8D 7C FF FF FF 0F AF 4D 0C 8B 45 08 DD 04 C8 D9 C1 D8 E1 DD 83 BC F8 FF FF 8B 4D DC D8 C9 8B 45 14 0F AF C6 8D 14 4E D8 C4 8B 4D 10 DD 1C C1 D9 CA DE C1 8D 04 F5 08 00 00 00 0F AF 45 14 D8 CB DD 1C 08 FF 45 E8 8B 45 E0 0F AF 55 14 DE E9 03 75 18 03 7D DC 39 45 E8 DD 1C D1 72 81
+***** EXPENSIVE 2351 686
+
+. 2350 80543B8 82
+. 8B 95 54 FF FF FF 8B 4D 20 8B 45 24 DD 44 11 F0 DD 44 11 F8 D9 C9 DD 5D D0 DD 5D C8 DD 44 10 F0 DD 44 10 F8 D9 C9 8B 45 28 DD 5D C0 DD 5D B8 DD 44 10 F0 DD 44 10 F8 D9 C9 C7 45 E8 00 00 00 00 8B 45 DC 39 45 E8 DD 5D B0 DD 5D A8 0F 83 57 02 00 00
+***** EXPENSIVE 2352 687
+vex iropt: not unrolling (117 sts)
+
+. 2351 805B850 121
+. 8B 4D E4 8D 04 39 01 C1 8B 55 0C 0F AF D7 0F AF 45 0C 89 4D A0 8B 4D 08 D9 04 91 D9 04 81 8B 4D A0 0F AF 4D 0C 8B 45 08 D9 04 88 D9 C1 D8 E1 DD 83 BC F8 FF FF 8B 4D DC D8 C9 8B 45 14 0F AF C6 8D 14 4E D8 C4 8B 4D 10 D9 1C 81 D9 CA DE C1 8D 04 B5 04 00 00 00 0F AF 45 14 D8 CB D9 1C 08 FF 45 E8 8B 45 E0 0F AF 55 14 DE E9 03 75 18 03 7D DC 39 45 E8 D9 1C 91 72 87
+***** EXPENSIVE 2353 688
+
+. 2352 8056BA8 82
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+
+. 2353 804DFCC 190
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+
+. 2354 804E08A 184
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+
+. 2355 804E142 168
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+
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+
+. 2357 804E28E 162
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+
+. 2358 804E330 73
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+***** EXPENSIVE 2360 695
+
+. 2359 805138C 177
+. 8B 45 E8 03 45 D8 0F AF 45 0C D9 04 C6 D9 44 C6 04 D9 C9 8B 45 E8 03 85 7C FF FF FF 0F AF 45 0C D9 5D 84 D9 04 C6 D9 44 C6 04 8B 45 E8 8B 95 0C FF FF FF 03 85 74 FF FF FF D9 04 D6 D9 44 D6 04 D9 C9 0F AF 45 0C D9 5D 8C D9 5D 88 D9 04 C6 D9 44 C6 04 D9 C9 8B 55 E8 8B 45 D8 8D 04 82 89 85 10 FF FF FF 0F AF 45 0C D9 9D 78 FF FF FF D9 9D 70 FF FF FF D9 04 C6 D9 44 C6 04 D9 45 84 D9 CD D9 55 80 D9 CD D8 C2 D9 CD D8 C1 D9 CA D8 6D 84 D9 CA D9 9D 6C FF FF FF D9 85 70 FF FF FF D9 85 78 FF FF FF D9 CB D9 9D 68 FF FF FF D9 C9 D8 6D 80
+***** EXPENSIVE 2361 696
+
+. 2360 805143D 181
+. D9 CA D8 C4 D9 C9 D8 C3 D9 CA D9 9D 64 FF FF FF D9 C4 D9 85 6C FF FF FF D9 C9 D8 C2 D9 CD D8 A5 78 FF FF FF D9 CC D8 A5 70 FF FF FF D9 C9 D8 C3 D9 CD D9 9D 58 FF FF FF D9 CB D9 95 60 FF FF FF D9 CB D9 9D 5C FF FF FF D9 CB D9 9D 54 FF FF FF DD 85 28 FF FF FF D9 FA DC 8D 20 FF FF FF D9 CC DE E3 D9 CB DE CA D9 C9 D9 5D EC D9 45 EC DD 85 28 FF FF FF D9 FA D9 CB D8 AD 6C FF FF FF D9 CB DC 8D 20 FF FF FF D8 CB D9 5D EC DD 85 20 FF FF FF D8 8D 58 FF FF FF D8 6D 8C D9 9D 50 FF FF FF DD 85 20 FF FF FF D8 8D 54 FF FF FF D8 6D 88 D9 9D 4C FF FF FF
+***** EXPENSIVE 2362 697
+
+. 2361 80514F2 181
+. D9 45 C8 D8 8D 68 FF FF FF D9 9D 38 FF FF FF D9 85 50 FF FF FF D9 45 C4 D9 45 EC D9 CA D8 C3 D9 85 4C FF FF FF D9 CC D8 AD 50 FF FF FF D9 CA D8 CD D8 85 38 FF FF FF D9 CC D8 C3 D9 CA D9 9D 40 FF FF FF D9 85 1C FF FF FF D9 CB D8 AD 4C FF FF FF D9 CB DE CC D9 C9 D9 9D 44 FF FF FF D9 45 C4 D9 45 C8 D9 C9 D8 8D 5C FF FF FF D9 CA D9 9D 48 FF FF FF D9 CA D9 9D 3C FF FF FF D9 C9 D8 8D 64 FF FF FF D9 45 C4 D9 45 C8 D9 CC D9 9D 38 FF FF FF D9 C9 DE C2 D8 8D 68 FF FF FF D9 CA DE CB D9 45 C4 D9 45 C8 D8 8D 5C FF FF FF D9 CB DE E4 D8 8D 64 FF FF FF
+***** EXPENSIVE 2363 698
+
+. 2362 80515A7 169
+. D9 45 8C D9 C9 DE E3 D8 85 58 FF FF FF D9 C9 D8 8D 1C FF FF FF D9 CB D8 8D 1C FF FF FF D9 CA D8 8D 1C FF FF FF D9 CC D9 9D 6C FF FF FF D9 5D 8C D9 85 48 FF FF FF D8 E2 D9 5D A0 D9 45 88 D9 85 40 FF FF FF D9 C9 D8 85 54 FF FF FF D9 C9 D8 E4 D9 85 3C FF FF FF D9 CD D8 85 40 FF FF FF D9 CA D9 5D 88 D9 CC D8 C2 D9 85 44 FF FF FF D9 CB D8 AD 3C FF FF FF D9 CA D9 5D 98 D9 45 8C D9 1C CF D9 CA D8 85 38 FF FF FF D9 C9 D9 5D 94 8B 45 E4 D9 45 C0 D9 45 BC 03 45 D0 D8 CA D9 C9 D8 4D A0 D9 CD 0F AF 45 14 D9 5D 9C
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+
+. 2363 8051650 152
+. DE EC D9 45 88 D9 5C CF 04 D9 CB D9 1C C7 D9 45 BC D8 4D A0 D9 CB D8 4D C0 DE C3 D9 CA D9 5C C7 04 D9 45 B8 8B 45 E4 D9 45 B4 D9 CA D8 85 48 FF FF FF D9 CA 03 85 34 FF FF FF D8 CB D9 C9 D8 4D 9C 0F AF 45 14 DE E1 D9 C9 D9 5D 90 D9 85 44 FF FF FF D8 A5 38 FF FF FF D9 C9 D9 1C C7 D9 45 B4 D9 CA D8 4D B8 D9 CA D8 4D 9C DE C2 D9 C9 D9 5C C7 04 D9 45 B0 8B 45 E4 D9 45 AC 03 85 30 FF FF FF D8 4D 94 D9 C9 D8 4D 98 0F AF 45 14 DE E1 D9 1C C7 D9 45 B0 D9 45 AC
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+
+. 2364 80516E8 106
+. D8 4D 98 D9 C9 D8 4D 94 DE C1 D9 5C C7 04 8B 55 E4 8B 45 D0 D9 45 A8 D9 45 A4 D9 C9 8D 04 82 D8 4D 90 D9 C9 D8 CA 89 85 10 FF FF FF DE E9 0F AF 45 14 D9 1C C7 D9 45 A4 D9 C9 D8 4D A8 D9 C9 D8 4D 90 DE C1 42 D9 5C C7 04 8B 45 0C 01 85 0C FF FF FF FF 45 E8 03 4D 14 89 55 E4 FF 45 DC 8B 55 D0 39 55 DC 0F 82 3A FC FF FF
+
+. 2365 80599FA 30
+. 8B 4D DC 41 89 C8 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 8D F0 FE FF FF 0F 83 2E 05 00 00
+***** EXPENSIVE 2367 701
+
+. 2366 8059A18 127
+. C7 85 C8 FE FF FF 10 00 00 00 89 F6 8B B5 C8 FE FF FF 8B 7D 20 8B 45 24 DD 44 37 F0 DD 44 37 F8 DD 5D B0 DD 5D B8 DD 44 30 F8 DD 44 30 F0 D9 C9 8B 45 28 DD 5D A0 DD 5D A8 DD 44 30 F8 DD 44 30 F0 D9 C9 8B 45 2C DD 5D 90 DD 44 30 F8 D9 C9 DD 5D 98 DD 5D 80 DD 44 30 F0 C7 45 E8 00 00 00 00 8B 45 E0 80 75 B7 80 80 75 A7 80 80 75 97 80 80 75 87 80 39 45 E8 DD 5D 88 0F 83 94 04 00 00
+***** EXPENSIVE 2368 702
+
+. 2367 8059A97 219
+. 8B 45 DC 8B 55 EC 8D 54 12 FF DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 D1 E0 DD 9D E8 FE FF FF DD 9D E0 FE FF FF 89 85 F4 FE FF FF 89 95 D4 FE FF FF C7 85 D0 FE FF FF 00 00 00 00 89 95 CC FE FF FF 8D 76 00 8B 95 CC FE FF FF 03 55 E4 8B 75 E4 8D 0C 16 8D 34 0E 8B 7D E4 01 F7 8B 45 0C 89 BD 9C FE FF FF 0F AF 85 CC FE FF FF 8B 7D 08 DD 04 C7 8B 85 CC FE FF FF 8D 04 C5 08 00 00 00 0F AF 45 0C DD 9D 78 FF FF FF DD 04 38 8B 45 0C 0F AF C2 DD 04 C7 8B 45 0C 0F AF C1 DD 04 C7 8B 45 0C 0F AF C6 DD 04 C7 8B 45 0C 0F AF 85 9C FE FF FF 8D 14 D5 08 00 00 00 8D 0C CD 08 00 00 00 8D 34 F5 08 00 00 00 DD 04 C7 0F AF 55 0C 0F AF 4D 0C 0F AF 75 0C 8B 85 9C FE FF FF
+***** EXPENSIVE 2369 703
+
+. 2368 8059B72 167
+. DD 04 3A DD 04 39 D9 CE DD 9D 70 FF FF FF DD 04 3E 8D 3C C5 08 00 00 00 0F AF 7D 0C 8B 55 08 DD 9D 68 FF FF FF DD 04 17 D9 CA DD 9D 60 FF FF FF D9 C9 DD 9D 58 FF FF FF DD 45 B8 DD 45 B0 D9 C9 D8 CD D9 C9 D8 CA DE E9 DD 9D 50 FF FF FF DD 45 A8 D8 CB DD 9D A8 FE FF FF DD 45 A0 D8 CD DC AD A8 FE FF FF D9 C9 DC 4D B8 D9 C9 DD 9D A8 FE FF FF D9 CB DC 4D B0 DD 45 98 DD 45 90 DC 8D 68 FF FF FF D9 CA DE C5 D8 CA D9 CC DD 9D 48 FF FF FF DE EB DD 45 88 DD 45 80 D9 CB DC 4D A0 D9 CB DC 8D 58 FF FF FF D9 CD
+***** EXPENSIVE 2370 704
+
+. 2369 8059C19 169
+. DC 4D A8 D9 C9 DC 8D 60 FF FF FF D9 C9 DE C3 DD 45 98 D9 C9 DE E5 DD 45 80 DD 45 88 DD 85 A8 FE FF FF D9 CC DC 4D 90 D9 CA DC 8D 60 FF FF FF D9 CB DC 8D 68 FF FF FF D9 C9 DC 8D 58 FF FF FF D9 CC D8 C6 D9 C9 DE C2 D9 CB DE C2 D9 CA DD 9D 40 FF FF FF DD 85 50 FF FF FF D9 C3 D9 C9 D8 C6 DD 85 48 FF FF FF D9 CA D8 C4 D9 CF DC AD 50 FF FF FF D9 CA D8 C3 D9 CF DD 9D 38 FF FF FF D9 C9 DD 9D 30 FF FF FF D9 C9 DC AD 48 FF FF FF DD 9D 28 FF FF FF DD 85 40 FF FF FF D8 C1 DD 9D 20 FF FF FF DD 85 38 FF FF FF D8 C5
+***** EXPENSIVE 2371 705
+
+. 2370 8059CC2 171
+. DD 85 A8 FE FF FF D9 C9 DD 9D 18 FF FF FF DE E4 D9 CA DE E1 DD 85 E8 FE FF FF D9 FA DC 8D E0 FE FF FF D9 CA DC A5 40 FF FF FF DE CA DD 85 E8 FE FF FF D9 FA D9 CC DC A5 38 FF FF FF D9 CC DC 8D E0 FE FF FF DE CC DD 85 20 FF FF FF DC 8D E0 FE FF FF DC AD 78 FF FF FF DD 85 18 FF FF FF DC 8D E0 FE FF FF D9 C1 D9 C9 DC AD 70 FF FF FF D9 C9 D8 C4 DD 9D 10 FF FF FF D9 C9 DE E3 D9 C0 DD 45 D0 D9 C9 D8 C6 D9 CA DE E6 D9 E0 DD 85 30 FF FF FF DD 45 C8 D8 CE D9 C9 D8 CA DE E1 DD 45 C8 D8 CC D9 CA DC 8D 28 FF FF FF DE E2
+***** EXPENSIVE 2372 706
+
+. 2371 8059D6D 195
+. DD 45 C8 D9 CB DD 9D 08 FF FF FF D9 CA D9 E0 DD 85 30 FF FF FF D9 CE DC 4D D0 D9 CE D8 C9 DE C6 DD 85 78 FF FF FF DC 85 20 FF FF FF DD 9D 78 FF FF FF DD 85 70 FF FF FF DC 85 18 FF FF FF DD 9D 70 FF FF FF DD 85 10 FF FF FF D9 CC DC 4D D0 D9 CC D8 E2 D9 C9 DC 8D 28 FF FF FF DE C4 DD 9D A8 FE FF FF DD 85 08 FF FF FF D9 C4 D8 E4 D9 CA DC 85 10 FF FF FF D9 C9 D8 C3 D9 CB DC AD 08 FF FF FF D9 CA DD 9D 00 FF FF FF DD 95 10 FF FF FF D9 C9 DD 9D 08 FF FF FF D9 CB 8B 95 D4 FE FF FF 03 95 F4 FE FF FF 8B 85 F4 FE FF FF 8B 4D DC 01 D0 2B 4D EC 8B B5 D0 FE FF FF 89 85 98 FE FF FF 8D 4C 4E FF
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+
+. 2372 8059E30 201
+. 8B 85 F4 FE FF FF 8B 75 14 8D 3C 08 0F AF B5 D4 FE FF FF 8B 45 10 DE C2 DD 85 78 FF FF FF DD 1C F0 8B 85 D4 FE FF FF 8D 04 C5 08 00 00 00 8B 75 10 0F AF 45 14 DD 85 70 FF FF FF DD 1C 30 8B 45 14 0F AF C2 DD 85 A8 FE FF FF DD 1C C6 D9 C4 8B 45 14 8D 14 D5 08 00 00 00 0F AF 55 14 0F AF 85 98 FE FF FF D8 C4 D9 CD DE E4 DD 85 00 FF FF FF D9 C9 DD 1C 32 DD 1C C6 D9 CB 8B 85 98 FE FF FF 8D 34 C5 08 00 00 00 8B 45 14 8B 55 10 0F AF C1 0F AF 75 14 8D 0C CD 08 00 00 00 0F AF 4D 14 DD 1C 16 DD 1C C2 80 B5 0F FF FF FF 80 8B 45 14 0F AF C7 8D 3C FD 08 00 00 00 0F AF 7D 14 DD 85 08 FF FF FF D9 C9 D9 E0 D9 C9
+***** EXPENSIVE 2374 708
+
+. 2373 8059EF9 50
+. DD 1C 11 D9 C9 FF 45 E8 DD 1C C2 8B 4D E0 8B 45 18 DD 1C 17 8B 55 DC 01 85 D4 FE FF FF 01 85 D0 FE FF FF 01 95 CC FE FF FF 39 4D E8 0F 82 B1 FB FF FF
+
+. 2374 8059F2B 27
+. 8B 85 F0 FE FF FF FF 45 EC D1 E8 83 85 C8 FE FF FF 10 39 45 EC 0F 82 DE FA FF FF
+***** EXPENSIVE 2376 709
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+
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+vex iropt: 4 x unrolling (27 sts -> 108 sts)
+
+. 2754 4000A990 26
+. FF 87 70 01 00 00 8B 75 F0 8B 55 EC 89 3C B2 46 8B 7F 0C 89 75 F0 85 FF 75 E6
+
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+
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+
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+
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+
+. 2762 4000AA58 9
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+
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+
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+. 8B 75 CC 8B 8E E0 01 00 00 85 C9 0F 85 4F 01 00 00
+
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+. FF 45 BC 8B 93 6C FB FF FF 39 55 BC 72 90
+
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+. 8B 7F 0C 85 FF 0F 85 30 FF FF FF
+
+. 2767 4000A9CA 20
+. 8D B6 00 00 00 00 FF 45 E8 8B 75 EC 8B 45 E8 39 3C 86 75 F2
+vex iropt: 4 x unrolling (21 sts -> 84 sts)
+
+. 2768 4000A9D0 14
+. FF 45 E8 8B 75 EC 8B 45 E8 39 3C 86 75 F2
+
+. 2769 4000AA8B 16
+. C7 45 F0 00 00 00 00 39 55 F0 0F 83 9D 00 00 00
+
+. 2770 4000AA9B 21
+. 8B 75 F0 8B 45 EC 8B 3C B0 0F B6 8F 74 01 00 00 F6 C1 08 74 7C
+
+. 2771 4000AAB0 19
+. 88 CA 8B 47 04 80 E2 F7 88 97 74 01 00 00 80 38 00 75 07
+
+. 2772 4000AAC3 7
+. 80 E1 03 84 C9 74 5C
+
+. 2773 4000AB26 18
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+
+. 2774 4000AACA 10
+. 8B 87 80 00 00 00 85 C0 75 07
+
+. 2775 4000AAD4 7
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+
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+
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+
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+
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+
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+
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+
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+
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+
+. 2859 4206FDE0 30
+. 55 89 E5 83 EC 28 89 75 F8 8B 75 08 89 5D F4 89 7D FC 8B 7D 0C 0F BE 56 46 E8 5F 59 FA FF
+
+. 2860 4206FDFE 19
+. 81 C3 D2 A4 0B 00 8B 84 32 94 00 00 00 89 34 24 FF 50 30
+
+. 2861 4206FE11 5
+. 31 D2 40 74 58
+
+. 2862 4206FE16 4
+. 85 FF 74 07
+
+. 2863 4206FE21 33
+. 83 0E 02 8D 56 47 8D 46 48 89 34 24 89 54 24 04 89 44 24 08 C7 44 24 0C 00 00 00 00 E8 2E FE FF FF
+
+. 2864 4206FC91 10
+. 8B 16 F7 C2 01 00 00 00 74 2A
+
+. 2865 4206FCC5 27
+. 89 0C 24 8B 46 20 29 C8 05 FF 0F 00 00 25 00 F0 FF FF 89 44 24 04 E8 80 70 06 00
+
+. 2866 420D6D60 17
+. 89 DA 8B 4C 24 08 8B 5C 24 04 B8 5B 00 00 00 CD 80
+
+. 2867 420D6D71 9
+. 89 D3 3D 01 F0 FF FF 73 01
+
+. 2868 420D6D7A 1
+. C3
+
+. 2869 4206FCC0 5
+. 83 CA 01 EB EC
+
+. 2870 4206FCB1 12
+. 89 16 8B 5D F8 8B 75 FC 89 EC 5D C3
+
+. 2871 4206FE42 59
+. 89 F2 C7 46 18 00 00 00 00 C7 46 14 00 00 00 00 C7 46 10 00 00 00 00 C7 46 08 00 00 00 00 C7 46 04 00 00 00 00 C7 46 0C 00 00 00 00 8B 5D F4 89 D0 8B 75 F8 8B 7D FC 89 EC 5D C3
+
+. 2872 4206DF80 6
+. 31 D2 85 C0 74 17
+
+. 2873 4206DF86 35
+. 8B 46 1C 89 F2 89 46 18 89 46 14 89 46 10 89 46 0C 89 46 04 89 46 08 8B 5D F8 89 D0 8B 75 FC 89 EC 5D C3
+
+. 2874 42070223 2
+. EB C5
+
+. 2875 420701F8 10
+. 83 C4 0C 89 F8 5B 5E 5F 5D C3
+
+. 2876 4202B1A2 11
+. 83 C6 04 3B B3 88 02 00 00 72 F3
+
+. 2877 4202B1AD 2
+. EB 12
+
+. 2878 4202B1C1 8
+. 89 3C 24 E8 BB A4 FE FF
+
+. 2879 42015684 6
+. FF A3 34 01 00 00
+
+. 2880 4201568A 10
+. 68 50 02 00 00 E9 40 FB FF FF
+
+. 2881 420AE610 13
+. 89 DA 8B 5C 24 04 B8 01 00 00 00 CD 80
+==13306==
+--13306-- lru: 1494 epochs, 0 clearings.
+--13306-- translate: new 2882 (113298 -> 626759), discard 0 (0 -> 0).
+--13306-- dispatch: 149400000 basic blocks, 1495/98742 sched events, 66040 tt_fast misses.
+--13306-- reg-alloc: 0 t-req-spill, 0+0 orig+spill uis, 0 total-reg-r.
+--13306-- sanity: 1496 cheap, 60 expensive checks.
+vex storage: P 176, T total 158600256 (4015121), T curr 0 (0)
diff --git a/main/VEX/priv/guest_amd64_defs.h b/main/VEX/priv/guest_amd64_defs.h
index 33450c3..7d3ed34 100644
--- a/main/VEX/priv/guest_amd64_defs.h
+++ b/main/VEX/priv/guest_amd64_defs.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/priv/guest_amd64_helpers.c b/main/VEX/priv/guest_amd64_helpers.c
index f626f0a..d554918 100644
--- a/main/VEX/priv/guest_amd64_helpers.c
+++ b/main/VEX/priv/guest_amd64_helpers.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -877,6 +877,7 @@
# define unop(_op,_a1) IRExpr_Unop((_op),(_a1))
# define binop(_op,_a1,_a2) IRExpr_Binop((_op),(_a1),(_a2))
# define mkU64(_n) IRExpr_Const(IRConst_U64(_n))
+# define mkU32(_n) IRExpr_Const(IRConst_U32(_n))
# define mkU8(_n) IRExpr_Const(IRConst_U8(_n))
Int i, arity = 0;
@@ -959,34 +960,34 @@
if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondZ)) {
/* long sub/cmp, then Z --> test dst==src */
return unop(Iop_1Uto64,
- binop(Iop_CmpEQ64,
- binop(Iop_Shl64,cc_dep1,mkU8(32)),
- binop(Iop_Shl64,cc_dep2,mkU8(32))));
+ binop(Iop_CmpEQ32,
+ unop(Iop_64to32, cc_dep1),
+ unop(Iop_64to32, cc_dep2)));
}
if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondNZ)) {
/* long sub/cmp, then NZ --> test dst!=src */
return unop(Iop_1Uto64,
- binop(Iop_CmpNE64,
- binop(Iop_Shl64,cc_dep1,mkU8(32)),
- binop(Iop_Shl64,cc_dep2,mkU8(32))));
+ binop(Iop_CmpNE32,
+ unop(Iop_64to32, cc_dep1),
+ unop(Iop_64to32, cc_dep2)));
}
if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondL)) {
/* long sub/cmp, then L (signed less than)
--> test dst <s src */
return unop(Iop_1Uto64,
- binop(Iop_CmpLT64S,
- binop(Iop_Shl64,cc_dep1,mkU8(32)),
- binop(Iop_Shl64,cc_dep2,mkU8(32))));
+ binop(Iop_CmpLT32S,
+ unop(Iop_64to32, cc_dep1),
+ unop(Iop_64to32, cc_dep2)));
}
if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondLE)) {
/* long sub/cmp, then LE (signed less than or equal)
--> test dst <=s src */
return unop(Iop_1Uto64,
- binop(Iop_CmpLE64S,
- binop(Iop_Shl64,cc_dep1,mkU8(32)),
- binop(Iop_Shl64,cc_dep2,mkU8(32))));
+ binop(Iop_CmpLE32S,
+ unop(Iop_64to32, cc_dep1),
+ unop(Iop_64to32, cc_dep2)));
}
if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondNLE)) {
@@ -995,9 +996,9 @@
--> test (dst >s src)
--> test (src <s dst) */
return unop(Iop_1Uto64,
- binop(Iop_CmpLT64S,
- binop(Iop_Shl64,cc_dep2,mkU8(32)),
- binop(Iop_Shl64,cc_dep1,mkU8(32))));
+ binop(Iop_CmpLT32S,
+ unop(Iop_64to32, cc_dep2),
+ unop(Iop_64to32, cc_dep1)));
}
@@ -1005,28 +1006,37 @@
/* long sub/cmp, then BE (unsigned less than or equal)
--> test dst <=u src */
return unop(Iop_1Uto64,
- binop(Iop_CmpLE64U,
- binop(Iop_Shl64,cc_dep1,mkU8(32)),
- binop(Iop_Shl64,cc_dep2,mkU8(32))));
+ binop(Iop_CmpLE32U,
+ unop(Iop_64to32, cc_dep1),
+ unop(Iop_64to32, cc_dep2)));
}
if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondNBE)) {
/* long sub/cmp, then NBE (unsigned greater than)
--> test src <u dst */
/* Note, args are opposite way round from the usual */
return unop(Iop_1Uto64,
- binop(Iop_CmpLT64U,
- binop(Iop_Shl64,cc_dep2,mkU8(32)),
- binop(Iop_Shl64,cc_dep1,mkU8(32))));
+ binop(Iop_CmpLT32U,
+ unop(Iop_64to32, cc_dep2),
+ unop(Iop_64to32, cc_dep1)));
}
if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondS)) {
/* long sub/cmp, then S (negative) --> test (dst-src <s 0) */
return unop(Iop_1Uto64,
- binop(Iop_CmpLT64S,
- binop(Iop_Sub64,
- binop(Iop_Shl64, cc_dep1, mkU8(32)),
- binop(Iop_Shl64, cc_dep2, mkU8(32))),
- mkU64(0)));
+ binop(Iop_CmpLT32S,
+ binop(Iop_Sub32,
+ unop(Iop_64to32, cc_dep1),
+ unop(Iop_64to32, cc_dep2)),
+ mkU32(0)));
+ }
+
+ if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondB)) {
+ /* long sub/cmp, then B (unsigned less than)
+ --> test dst <u src */
+ return unop(Iop_1Uto64,
+ binop(Iop_CmpLT32U,
+ unop(Iop_64to32, cc_dep1),
+ unop(Iop_64to32, cc_dep2)));
}
/*---------------- SUBW ----------------*/
@@ -1073,6 +1083,15 @@
unop(Iop_64to8,cc_dep2)));
}
+ if (isU64(cc_op, AMD64G_CC_OP_SUBB) && isU64(cond, AMD64CondBE)) {
+ /* byte sub/cmp, then BE (unsigned less than or equal)
+ --> test dst <=u src */
+ return unop(Iop_1Uto64,
+ binop(Iop_CmpLE64U,
+ binop(Iop_And64, cc_dep1, mkU64(0xFF)),
+ binop(Iop_And64, cc_dep2, mkU64(0xFF))));
+ }
+
if (isU64(cc_op, AMD64G_CC_OP_SUBB) && isU64(cond, AMD64CondS)
&& isU64(cc_dep2, 0)) {
/* byte sub/cmp of zero, then S --> test (dst-0 <s 0)
@@ -1107,6 +1126,11 @@
return unop(Iop_1Uto64,
binop(Iop_CmpEQ64, cc_dep1, mkU64(0)));
}
+ if (isU64(cc_op, AMD64G_CC_OP_LOGICQ) && isU64(cond, AMD64CondNZ)) {
+ /* long long and/or/xor, then NZ --> test dst!=0 */
+ return unop(Iop_1Uto64,
+ binop(Iop_CmpNE64, cc_dep1, mkU64(0)));
+ }
if (isU64(cc_op, AMD64G_CC_OP_LOGICQ) && isU64(cond, AMD64CondL)) {
/* long long and/or/xor, then L
@@ -1126,17 +1150,16 @@
if (isU64(cc_op, AMD64G_CC_OP_LOGICL) && isU64(cond, AMD64CondZ)) {
/* long and/or/xor, then Z --> test dst==0 */
return unop(Iop_1Uto64,
- binop(Iop_CmpEQ64,
- binop(Iop_Shl64,cc_dep1,mkU8(32)),
- mkU64(0)));
+ binop(Iop_CmpEQ32,
+ unop(Iop_64to32, cc_dep1),
+ mkU32(0)));
}
-
if (isU64(cc_op, AMD64G_CC_OP_LOGICL) && isU64(cond, AMD64CondNZ)) {
/* long and/or/xor, then NZ --> test dst!=0 */
return unop(Iop_1Uto64,
- binop(Iop_CmpNE64,
- binop(Iop_Shl64,cc_dep1,mkU8(32)),
- mkU64(0)));
+ binop(Iop_CmpNE32,
+ unop(Iop_64to32, cc_dep1),
+ mkU32(0)));
}
if (isU64(cc_op, AMD64G_CC_OP_LOGICL) && isU64(cond, AMD64CondLE)) {
@@ -1147,9 +1170,24 @@
the result is <=signed 0. Hence ...
*/
return unop(Iop_1Uto64,
- binop(Iop_CmpLE64S,
- binop(Iop_Shl64,cc_dep1,mkU8(32)),
- mkU64(0)));
+ binop(Iop_CmpLE32S,
+ unop(Iop_64to32, cc_dep1),
+ mkU32(0)));
+ }
+
+ if (isU64(cc_op, AMD64G_CC_OP_LOGICL) && isU64(cond, AMD64CondS)) {
+ /* long and/or/xor, then S --> (ULong)result[31] */
+ return binop(Iop_And64,
+ binop(Iop_Shr64, cc_dep1, mkU8(31)),
+ mkU64(1));
+ }
+ if (isU64(cc_op, AMD64G_CC_OP_LOGICL) && isU64(cond, AMD64CondNS)) {
+ /* long and/or/xor, then S --> (ULong) ~ result[31] */
+ return binop(Iop_Xor64,
+ binop(Iop_And64,
+ binop(Iop_Shr64, cc_dep1, mkU8(31)),
+ mkU64(1)),
+ mkU64(1));
}
/*---------------- LOGICB ----------------*/
@@ -1179,6 +1217,14 @@
binop(Iop_Shr64,cc_dep1,mkU8(7)),
mkU64(1));
}
+ if (isU64(cc_op, AMD64G_CC_OP_LOGICB) && isU64(cond, AMD64CondNS)) {
+ /* byte and/or/xor, then NS --> (UInt)!result[7] */
+ return binop(Iop_Xor64,
+ binop(Iop_And64,
+ binop(Iop_Shr64,cc_dep1,mkU8(7)),
+ mkU64(1)),
+ mkU64(1));
+ }
/*---------------- INCB ----------------*/
@@ -1206,9 +1252,9 @@
if (isU64(cc_op, AMD64G_CC_OP_DECL) && isU64(cond, AMD64CondZ)) {
/* dec L, then Z --> test dst == 0 */
return unop(Iop_1Uto64,
- binop(Iop_CmpEQ64,
- binop(Iop_Shl64,cc_dep1,mkU8(32)),
- mkU64(0)));
+ binop(Iop_CmpEQ32,
+ unop(Iop_64to32, cc_dep1),
+ mkU32(0)));
}
/*---------------- DECW ----------------*/
@@ -1329,9 +1375,9 @@
if (isU64(cc_op, AMD64G_CC_OP_SUBL)) {
/* C after sub denotes unsigned less than */
return unop(Iop_1Uto64,
- binop(Iop_CmpLT64U,
- binop(Iop_Shl64,cc_dep1,mkU8(32)),
- binop(Iop_Shl64,cc_dep2,mkU8(32))));
+ binop(Iop_CmpLT32U,
+ unop(Iop_64to32, cc_dep1),
+ unop(Iop_64to32, cc_dep2)));
}
if (isU64(cc_op, AMD64G_CC_OP_SUBB)) {
/* C after sub denotes unsigned less than */
@@ -1365,6 +1411,7 @@
# undef unop
# undef binop
# undef mkU64
+# undef mkU32
# undef mkU8
return NULL;
diff --git a/main/VEX/priv/guest_amd64_toIR.c b/main/VEX/priv/guest_amd64_toIR.c
index 59105be..a3d817e 100644
--- a/main/VEX/priv/guest_amd64_toIR.c
+++ b/main/VEX/priv/guest_amd64_toIR.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -1104,6 +1104,13 @@
Ity_I16 );
}
+static void putIReg16 ( UInt regno, IRExpr* e )
+{
+ vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I16);
+ stmt( IRStmt_Put( integerGuestReg64Offset(regno),
+ unop(Iop_16Uto64,e) ) );
+}
+
static HChar* nameIReg16 ( UInt regno )
{
return nameIReg( 2, regno, False );
@@ -3271,7 +3278,7 @@
}
isShift = False;
- switch (gregLO3ofRM(modrm)) { case 4: case 5: case 7: isShift = True; }
+ switch (gregLO3ofRM(modrm)) { case 4: case 5: case 6: case 7: isShift = True; }
isRotate = False;
switch (gregLO3ofRM(modrm)) { case 0: case 1: isRotate = True; }
@@ -3279,11 +3286,6 @@
isRotateC = False;
switch (gregLO3ofRM(modrm)) { case 2: case 3: isRotateC = True; }
- if (gregLO3ofRM(modrm) == 6) {
- *decode_OK = False;
- return delta;
- }
-
if (!isShift && !isRotate && !isRotateC) {
/*NOTREACHED*/
vpanic("dis_Grp2(Reg): unhandled case(amd64)");
@@ -3358,6 +3360,7 @@
switch (gregLO3ofRM(modrm)) {
case 4: op64 = Iop_Shl64; break;
case 5: op64 = Iop_Shr64; break;
+ case 6: op64 = Iop_Shl64; break;
case 7: op64 = Iop_Sar64; break;
/*NOTREACHED*/
default: vpanic("dis_Grp2:shift"); break;
@@ -4115,7 +4118,7 @@
}
static
-void dis_string_op( void (*dis_OP)( Int, IRTemp ),
+void dis_string_op( void (*dis_OP)( Int, IRTemp, Prefix pfx ),
Int sz, HChar* name, Prefix pfx )
{
IRTemp t_inc = newTemp(Ity_I64);
@@ -4123,67 +4126,98 @@
The following assertion catches any resulting sillyness. */
vassert(pfx == clearSegBits(pfx));
dis_string_op_increment(sz, t_inc);
- dis_OP( sz, t_inc );
+ dis_OP( sz, t_inc, pfx );
DIP("%s%c\n", name, nameISize(sz));
}
static
-void dis_MOVS ( Int sz, IRTemp t_inc )
+void dis_MOVS ( Int sz, IRTemp t_inc, Prefix pfx )
{
IRType ty = szToITy(sz);
IRTemp td = newTemp(Ity_I64); /* RDI */
IRTemp ts = newTemp(Ity_I64); /* RSI */
+ IRExpr *incd, *incs;
- assign( td, getIReg64(R_RDI) );
- assign( ts, getIReg64(R_RSI) );
+ if (haveASO(pfx)) {
+ assign( td, unop(Iop_32Uto64, getIReg32(R_RDI)) );
+ assign( ts, unop(Iop_32Uto64, getIReg32(R_RSI)) );
+ } else {
+ assign( td, getIReg64(R_RDI) );
+ assign( ts, getIReg64(R_RSI) );
+ }
storeLE( mkexpr(td), loadLE(ty,mkexpr(ts)) );
- putIReg64( R_RDI, binop(Iop_Add64, mkexpr(td), mkexpr(t_inc)) );
- putIReg64( R_RSI, binop(Iop_Add64, mkexpr(ts), mkexpr(t_inc)) );
+ incd = binop(Iop_Add64, mkexpr(td), mkexpr(t_inc));
+ incs = binop(Iop_Add64, mkexpr(ts), mkexpr(t_inc));
+ if (haveASO(pfx)) {
+ incd = unop(Iop_32Uto64, unop(Iop_64to32, incd));
+ incs = unop(Iop_32Uto64, unop(Iop_64to32, incs));
+ }
+ putIReg64( R_RDI, incd );
+ putIReg64( R_RSI, incs );
}
static
-void dis_LODS ( Int sz, IRTemp t_inc )
+void dis_LODS ( Int sz, IRTemp t_inc, Prefix pfx )
{
IRType ty = szToITy(sz);
IRTemp ts = newTemp(Ity_I64); /* RSI */
+ IRExpr *incs;
- assign( ts, getIReg64(R_RSI) );
+ if (haveASO(pfx))
+ assign( ts, unop(Iop_32Uto64, getIReg32(R_RSI)) );
+ else
+ assign( ts, getIReg64(R_RSI) );
putIRegRAX ( sz, loadLE(ty, mkexpr(ts)) );
- putIReg64( R_RSI, binop(Iop_Add64, mkexpr(ts), mkexpr(t_inc)) );
+ incs = binop(Iop_Add64, mkexpr(ts), mkexpr(t_inc));
+ if (haveASO(pfx))
+ incs = unop(Iop_32Uto64, unop(Iop_64to32, incs));
+ putIReg64( R_RSI, incs );
}
static
-void dis_STOS ( Int sz, IRTemp t_inc )
+void dis_STOS ( Int sz, IRTemp t_inc, Prefix pfx )
{
IRType ty = szToITy(sz);
IRTemp ta = newTemp(ty); /* rAX */
IRTemp td = newTemp(Ity_I64); /* RDI */
+ IRExpr *incd;
assign( ta, getIRegRAX(sz) );
- assign( td, getIReg64(R_RDI) );
+ if (haveASO(pfx))
+ assign( td, unop(Iop_32Uto64, getIReg32(R_RDI)) );
+ else
+ assign( td, getIReg64(R_RDI) );
storeLE( mkexpr(td), mkexpr(ta) );
- putIReg64( R_RDI, binop(Iop_Add64, mkexpr(td), mkexpr(t_inc)) );
+ incd = binop(Iop_Add64, mkexpr(td), mkexpr(t_inc));
+ if (haveASO(pfx))
+ incd = unop(Iop_32Uto64, unop(Iop_64to32, incd));
+ putIReg64( R_RDI, incd );
}
static
-void dis_CMPS ( Int sz, IRTemp t_inc )
+void dis_CMPS ( Int sz, IRTemp t_inc, Prefix pfx )
{
IRType ty = szToITy(sz);
IRTemp tdv = newTemp(ty); /* (RDI) */
IRTemp tsv = newTemp(ty); /* (RSI) */
IRTemp td = newTemp(Ity_I64); /* RDI */
IRTemp ts = newTemp(Ity_I64); /* RSI */
+ IRExpr *incd, *incs;
- assign( td, getIReg64(R_RDI) );
-
- assign( ts, getIReg64(R_RSI) );
+ if (haveASO(pfx)) {
+ assign( td, unop(Iop_32Uto64, getIReg32(R_RDI)) );
+ assign( ts, unop(Iop_32Uto64, getIReg32(R_RSI)) );
+ } else {
+ assign( td, getIReg64(R_RDI) );
+ assign( ts, getIReg64(R_RSI) );
+ }
assign( tdv, loadLE(ty,mkexpr(td)) );
@@ -4191,28 +4225,40 @@
setFlags_DEP1_DEP2 ( Iop_Sub8, tsv, tdv, ty );
- putIReg64(R_RDI, binop(Iop_Add64, mkexpr(td), mkexpr(t_inc)) );
-
- putIReg64(R_RSI, binop(Iop_Add64, mkexpr(ts), mkexpr(t_inc)) );
+ incd = binop(Iop_Add64, mkexpr(td), mkexpr(t_inc));
+ incs = binop(Iop_Add64, mkexpr(ts), mkexpr(t_inc));
+ if (haveASO(pfx)) {
+ incd = unop(Iop_32Uto64, unop(Iop_64to32, incd));
+ incs = unop(Iop_32Uto64, unop(Iop_64to32, incs));
+ }
+ putIReg64( R_RDI, incd );
+ putIReg64( R_RSI, incs );
}
static
-void dis_SCAS ( Int sz, IRTemp t_inc )
+void dis_SCAS ( Int sz, IRTemp t_inc, Prefix pfx )
{
IRType ty = szToITy(sz);
IRTemp ta = newTemp(ty); /* rAX */
IRTemp td = newTemp(Ity_I64); /* RDI */
IRTemp tdv = newTemp(ty); /* (RDI) */
+ IRExpr *incd;
assign( ta, getIRegRAX(sz) );
- assign( td, getIReg64(R_RDI) );
+ if (haveASO(pfx))
+ assign( td, unop(Iop_32Uto64, getIReg32(R_RDI)) );
+ else
+ assign( td, getIReg64(R_RDI) );
assign( tdv, loadLE(ty,mkexpr(td)) );
setFlags_DEP1_DEP2 ( Iop_Sub8, ta, tdv, ty );
- putIReg64(R_RDI, binop(Iop_Add64, mkexpr(td), mkexpr(t_inc)) );
+ incd = binop(Iop_Add64, mkexpr(td), mkexpr(t_inc));
+ if (haveASO(pfx))
+ incd = unop(Iop_32Uto64, unop(Iop_64to32, incd));
+ putIReg64( R_RDI, incd );
}
@@ -4221,27 +4267,37 @@
the next insn, rather than just falling through. */
static
void dis_REP_op ( AMD64Condcode cond,
- void (*dis_OP)(Int, IRTemp),
+ void (*dis_OP)(Int, IRTemp, Prefix),
Int sz, Addr64 rip, Addr64 rip_next, HChar* name,
Prefix pfx )
{
IRTemp t_inc = newTemp(Ity_I64);
- IRTemp tc = newTemp(Ity_I64); /* RCX */
+ IRTemp tc;
+ IRExpr* cmp;
/* Really we ought to inspect the override prefixes, but we don't.
The following assertion catches any resulting sillyness. */
vassert(pfx == clearSegBits(pfx));
- assign( tc, getIReg64(R_RCX) );
+ if (haveASO(pfx)) {
+ tc = newTemp(Ity_I32); /* ECX */
+ assign( tc, getIReg32(R_RCX) );
+ cmp = binop(Iop_CmpEQ32, mkexpr(tc), mkU32(0));
+ } else {
+ tc = newTemp(Ity_I64); /* RCX */
+ assign( tc, getIReg64(R_RCX) );
+ cmp = binop(Iop_CmpEQ64, mkexpr(tc), mkU64(0));
+ }
- stmt( IRStmt_Exit( binop(Iop_CmpEQ64,mkexpr(tc),mkU64(0)),
- Ijk_Boring,
- IRConst_U64(rip_next) ) );
+ stmt( IRStmt_Exit( cmp, Ijk_Boring, IRConst_U64(rip_next) ) );
- putIReg64(R_RCX, binop(Iop_Sub64, mkexpr(tc), mkU64(1)) );
+ if (haveASO(pfx))
+ putIReg32(R_RCX, binop(Iop_Sub32, mkexpr(tc), mkU32(1)) );
+ else
+ putIReg64(R_RCX, binop(Iop_Sub64, mkexpr(tc), mkU64(1)) );
dis_string_op_increment(sz, t_inc);
- dis_OP (sz, t_inc);
+ dis_OP (sz, t_inc, pfx);
if (cond == AMD64CondAlways) {
jmp_lit(Ijk_Boring,rip);
@@ -6504,9 +6560,9 @@
case 0x65: op = Iop_CmpGT16Sx4; break;
case 0x66: op = Iop_CmpGT32Sx2; break;
- case 0x6B: op = Iop_QNarrow32Sx2; eLeft = True; break;
- case 0x63: op = Iop_QNarrow16Sx4; eLeft = True; break;
- case 0x67: op = Iop_QNarrow16Ux4; eLeft = True; break;
+ case 0x6B: op = Iop_QNarrowBin32Sto16Sx4; eLeft = True; break;
+ case 0x63: op = Iop_QNarrowBin16Sto8Sx8; eLeft = True; break;
+ case 0x67: op = Iop_QNarrowBin16Sto8Ux8; eLeft = True; break;
case 0x68: op = Iop_InterleaveHI8x8; eLeft = True; break;
case 0x69: op = Iop_InterleaveHI16x4; eLeft = True; break;
@@ -7629,18 +7685,23 @@
IRType ty = szToITy(sz);
IRTemp t1 = newTemp(ty);
IRTemp t2 = newTemp(ty);
- vassert(sz == 4 || sz == 8);
+ vassert(sz == 2 || sz == 4 || sz == 8);
vassert(regLo3 < 8);
if (sz == 8) {
assign( t1, getIReg64(R_RAX) );
assign( t2, getIRegRexB(8, pfx, regLo3) );
putIReg64( R_RAX, mkexpr(t2) );
putIRegRexB(8, pfx, regLo3, mkexpr(t1) );
- } else {
+ } else if (sz == 4) {
assign( t1, getIReg32(R_RAX) );
assign( t2, getIRegRexB(4, pfx, regLo3) );
putIReg32( R_RAX, mkexpr(t2) );
putIRegRexB(4, pfx, regLo3, mkexpr(t1) );
+ } else {
+ assign( t1, getIReg16(R_RAX) );
+ assign( t2, getIRegRexB(2, pfx, regLo3) );
+ putIReg16( R_RAX, mkexpr(t2) );
+ putIRegRexB(2, pfx, regLo3, mkexpr(t1) );
}
DIP("xchg%c %s, %s\n",
nameISize(sz), nameIRegRAX(sz),
@@ -11790,7 +11851,8 @@
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x6B) {
delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
- "packssdw", Iop_QNarrow32Sx4, True );
+ "packssdw",
+ Iop_QNarrowBin32Sto16Sx8, True );
goto decode_success;
}
@@ -11798,7 +11860,8 @@
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x63) {
delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
- "packsswb", Iop_QNarrow16Sx8, True );
+ "packsswb",
+ Iop_QNarrowBin16Sto8Sx16, True );
goto decode_success;
}
@@ -11806,7 +11869,8 @@
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x67) {
delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
- "packuswb", Iop_QNarrow16Ux8, True );
+ "packuswb",
+ Iop_QNarrowBin16Sto8Ux16, True );
goto decode_success;
}
@@ -15405,7 +15469,7 @@
isD ? getXMMRegLane64F( eregOfRexRM(pfx, modrm), 0 )
: getXMMRegLane32F( eregOfRexRM(pfx, modrm), 0 ) );
imm = insn[3+1];
- if (imm & ~7) goto decode_failure;
+ if (imm & ~15) goto decode_failure;
delta += 3+1+1;
DIP( "rounds%c $%d,%s,%s\n",
isD ? 'd' : 's',
@@ -15415,7 +15479,7 @@
addr = disAMode( &alen, vbi, pfx, delta+3, dis_buf, 0 );
assign( src, loadLE( isD ? Ity_F64 : Ity_F32, mkexpr(addr) ));
imm = insn[3+alen];
- if (imm & ~7) goto decode_failure;
+ if (imm & ~15) goto decode_failure;
delta += 3+alen+1;
DIP( "rounds%c $%d,%s,%s\n",
isD ? 'd' : 's',
@@ -15460,7 +15524,7 @@
assign( src1,
getXMMRegLane64F( eregOfRexRM(pfx, modrm), 1 ) );
imm = insn[3+1];
- if (imm & ~7) goto decode_failure;
+ if (imm & ~15) goto decode_failure;
delta += 3+1+1;
DIP( "roundpd $%d,%s,%s\n",
imm, nameXMMReg( eregOfRexRM(pfx, modrm) ),
@@ -15473,7 +15537,7 @@
assign( src1, loadLE(Ity_F64,
binop(Iop_Add64, mkexpr(addr), mkU64(8) )));
imm = insn[3+alen];
- if (imm & ~7) goto decode_failure;
+ if (imm & ~15) goto decode_failure;
delta += 3+alen+1;
DIP( "roundpd $%d,%s,%s\n",
imm, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
@@ -15523,7 +15587,7 @@
assign( src3,
getXMMRegLane32F( eregOfRexRM(pfx, modrm), 3 ) );
imm = insn[3+1];
- if (imm & ~7) goto decode_failure;
+ if (imm & ~15) goto decode_failure;
delta += 3+1+1;
DIP( "roundps $%d,%s,%s\n",
imm, nameXMMReg( eregOfRexRM(pfx, modrm) ),
@@ -15540,7 +15604,7 @@
assign( src3, loadLE(Ity_F32,
binop(Iop_Add64, mkexpr(addr), mkU64(12) )));
imm = insn[3+alen];
- if (imm & ~7) goto decode_failure;
+ if (imm & ~15) goto decode_failure;
delta += 3+alen+1;
DIP( "roundps $%d,%s,%s\n",
imm, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
@@ -15673,7 +15737,7 @@
switch (imm) {
case 0x00:
case 0x02: case 0x08: case 0x0A: case 0x0C: case 0x12:
- case 0x1A: case 0x3A: case 0x44: case 0x4A:
+ case 0x1A: case 0x38: case 0x3A: case 0x44: case 0x4A:
break;
default:
goto decode_failure;
@@ -15754,7 +15818,8 @@
/* 66 0f 38 17 /r = PTEST xmm1, xmm2/m128
Logical compare (set ZF and CF from AND/ANDN of the operands) */
- if (have66noF2noF3( pfx ) && sz == 2
+ if (have66noF2noF3( pfx )
+ && (sz == 2 || /* ignore redundant REX.W */ sz == 8)
&& insn[0] == 0x0F && insn[1] == 0x38 && insn[2] == 0x17) {
modrm = insn[3];
IRTemp vecE = newTemp(Ity_V128);
@@ -16000,6 +16065,92 @@
goto decode_success;
}
+ /* 66 0f 38 2B /r = PACKUSDW xmm1, xmm2/m128
+ 2x 32x4 S->U saturating narrow from xmm2/m128 to xmm1 */
+ if ( have66noF2noF3( pfx )
+ && sz == 2
+ && insn[0] == 0x0F && insn[1] == 0x38 && insn[2] == 0x2B ) {
+
+ modrm = insn[3];
+
+ IRTemp argL = newTemp(Ity_V128);
+ IRTemp argR = newTemp(Ity_V128);
+
+ if ( epartIsReg(modrm) ) {
+ assign( argL, getXMMReg( eregOfRexRM(pfx, modrm) ) );
+ delta += 3+1;
+ DIP( "packusdw %s,%s\n",
+ nameXMMReg( eregOfRexRM(pfx, modrm) ),
+ nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta+3, dis_buf, 0 );
+ gen_SEGV_if_not_16_aligned( addr );
+ assign( argL, loadLE( Ity_V128, mkexpr(addr) ));
+ delta += 3+alen;
+ DIP( "packusdw %s,%s\n",
+ dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ }
+
+ assign(argR, getXMMReg( gregOfRexRM(pfx, modrm) ));
+
+ putXMMReg( gregOfRexRM(pfx, modrm),
+ binop( Iop_QNarrowBin32Sto16Ux8,
+ mkexpr(argL), mkexpr(argR)) );
+
+ goto decode_success;
+ }
+
+ /* 66 0F 38 28 = PMULUDQ -- signed widening multiply of 32-lanes 0 x
+ 0 to form lower 64-bit half and lanes 2 x 2 to form upper 64-bit
+ half */
+ /* This is a really poor translation -- could be improved if
+ performance critical. It's a copy-paste of PMULDQ, too. */
+ if (have66noF2noF3(pfx) && sz == 2
+ && insn[0] == 0x0F && insn[1] == 0x38 && insn[2] == 0x28) {
+ IRTemp sV, dV;
+ IRTemp s3, s2, s1, s0, d3, d2, d1, d0;
+ sV = newTemp(Ity_V128);
+ dV = newTemp(Ity_V128);
+ s3 = s2 = s1 = s0 = d3 = d2 = d1 = d0 = IRTemp_INVALID;
+ t1 = newTemp(Ity_I64);
+ t0 = newTemp(Ity_I64);
+ modrm = insn[3];
+ assign( dV, getXMMReg(gregOfRexRM(pfx,modrm)) );
+
+ if (epartIsReg(modrm)) {
+ assign( sV, getXMMReg(eregOfRexRM(pfx,modrm)) );
+ delta += 3+1;
+ DIP("pmuldq %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
+ assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
+ delta += 3+alen;
+ DIP("pmuldq %s,%s\n", dis_buf,
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ }
+
+ breakup128to32s( dV, &d3, &d2, &d1, &d0 );
+ breakup128to32s( sV, &s3, &s2, &s1, &s0 );
+
+ assign( t0, binop( Iop_MullS32, mkexpr(d0), mkexpr(s0)) );
+ putXMMRegLane64( gregOfRexRM(pfx,modrm), 0, mkexpr(t0) );
+ assign( t1, binop( Iop_MullS32, mkexpr(d2), mkexpr(s2)) );
+ putXMMRegLane64( gregOfRexRM(pfx,modrm), 1, mkexpr(t1) );
+ goto decode_success;
+ }
+
+ /* 66 0F 38 29 = PCMPEQQ
+ 64x2 equality comparison
+ */
+ if ( have66noF2noF3( pfx ) && sz == 2
+ && insn[0] == 0x0F && insn[1] == 0x38 && insn[2] == 0x29) {
+ /* FIXME: this needs an alignment check */
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+3,
+ "pcmpeqq", Iop_CmpEQ64x2, False );
+ goto decode_success;
+ }
+
/* ---------------------------------------------------- */
/* --- end of the SSE4 decoder --- */
/* ---------------------------------------------------- */
@@ -16079,6 +16230,37 @@
//.. //-- DIP("enter 0x%x, 0x%x", d32, abyte);
//.. //-- break;
+ case 0xC8: /* ENTER */
+ /* Same comments re operand size as for LEAVE below apply.
+ Also, only handles the case "enter $imm16, $0"; other cases
+ for the second operand (nesting depth) are not handled. */
+ if (sz != 4)
+ goto decode_failure;
+ d64 = getUDisp16(delta);
+ delta += 2;
+ vassert(d64 >= 0 && d64 <= 0xFFFF);
+ if (getUChar(delta) != 0)
+ goto decode_failure;
+ delta++;
+ /* Intel docs seem to suggest:
+ push rbp
+ temp = rsp
+ rbp = temp
+ rsp = rsp - imm16
+ */
+ t1 = newTemp(Ity_I64);
+ assign(t1, getIReg64(R_RBP));
+ t2 = newTemp(Ity_I64);
+ assign(t2, binop(Iop_Sub64, getIReg64(R_RSP), mkU64(8)));
+ putIReg64(R_RSP, mkexpr(t2));
+ storeLE(mkexpr(t2), mkexpr(t1));
+ putIReg64(R_RBP, mkexpr(t2));
+ if (d64 > 0) {
+ putIReg64(R_RSP, binop(Iop_Sub64, mkexpr(t2), mkU64(d64)));
+ }
+ DIP("enter $%u, $0\n", (UInt)d64);
+ break;
+
case 0xC9: /* LEAVE */
/* In 64-bit mode this defaults to a 64-bit operand size. There
is no way to encode a 32-bit variant. Hence sz==4 but we do
@@ -17326,8 +17508,6 @@
case 0xAE:
case 0xAF:
/* F2 AE/AF: repne scasb/repne scas{w,l,q} */
- if (haveASO(pfx))
- goto decode_failure;
if (haveF2(pfx) && !haveF3(pfx)) {
if (opc == 0xAE)
sz = 1;
@@ -17338,8 +17518,6 @@
break;
}
/* F3 AE/AF: repe scasb/repe scas{w,l,q} */
- if (haveASO(pfx))
- goto decode_failure;
if (!haveF2(pfx) && haveF3(pfx)) {
if (opc == 0xAE)
sz = 1;
@@ -17362,8 +17540,6 @@
case 0xA6:
case 0xA7:
/* F3 A6/A7: repe cmps/rep cmps{w,l,q} */
- if (haveASO(pfx))
- goto decode_failure;
if (haveF3(pfx) && !haveF2(pfx)) {
if (opc == 0xA6)
sz = 1;
@@ -17379,8 +17555,6 @@
case 0xAA:
case 0xAB:
/* F3 AA/AB: rep stosb/rep stos{w,l,q} */
- if (haveASO(pfx))
- goto decode_failure;
if (haveF3(pfx) && !haveF2(pfx)) {
if (opc == 0xAA)
sz = 1;
@@ -17403,8 +17577,6 @@
case 0xA4:
case 0xA5:
/* F3 A4: rep movsb */
- if (haveASO(pfx))
- goto decode_failure;
if (haveF3(pfx) && !haveF2(pfx)) {
if (opc == 0xA4)
sz = 1;
@@ -17493,9 +17665,6 @@
/* guard against mutancy */
if (haveF2orF3(pfx)) goto decode_failure;
- /* sz == 2 could legitimately happen, but we don't handle it yet */
- if (sz == 2) goto decode_failure; /* awaiting test case */
-
codegen_xchg_rAX_Reg ( pfx, sz, opc - 0x90 );
break;
@@ -18559,13 +18728,15 @@
decode_failure:
/* All decode failures end up here. */
vex_printf("vex amd64->IR: unhandled instruction bytes: "
- "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
+ "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
(Int)getUChar(delta_start+0),
(Int)getUChar(delta_start+1),
(Int)getUChar(delta_start+2),
(Int)getUChar(delta_start+3),
(Int)getUChar(delta_start+4),
- (Int)getUChar(delta_start+5) );
+ (Int)getUChar(delta_start+5),
+ (Int)getUChar(delta_start+6),
+ (Int)getUChar(delta_start+7) );
/* Tell the dispatcher that this insn cannot be decoded, and so has
not been executed, and (is currently) the next to be executed.
diff --git a/main/VEX/priv/guest_arm_defs.h b/main/VEX/priv/guest_arm_defs.h
index 02078c4..be6dd1c 100644
--- a/main/VEX/priv/guest_arm_defs.h
+++ b/main/VEX/priv/guest_arm_defs.h
@@ -6,7 +6,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -148,6 +148,10 @@
that the definedness of the stored flags always depends on
all 3 DEP values.
+ Fields carrying only 1 or 2 bits of useful information (old_C,
+ shifter_co, old_V, oldC:oldV) must have their top 31 or 30 bits
+ (respectively) zero. The text "31x0:" or "30x0:" denotes this.
+
A summary of the field usages is:
OP DEP1 DEP2 DEP3
@@ -156,11 +160,11 @@
OP_COPY current NZCV unused unused
OP_ADD argL argR unused
OP_SUB argL argR unused
- OP_ADC argL argR old_C
- OP_SBB argL argR old_C
- OP_LOGIC result shifter_co old_V
- OP_MUL result unused old_C:old_V
- OP_MULL resLO32 resHI32 old_C:old_V
+ OP_ADC argL argR 31x0:old_C
+ OP_SBB argL argR 31x0:old_C
+ OP_LOGIC result 31x0:shifter_co 31x0:old_V
+ OP_MUL result unused 30x0:old_C:old_V
+ OP_MULL resLO32 resHI32 30x0:old_C:old_V
*/
enum {
diff --git a/main/VEX/priv/guest_arm_helpers.c b/main/VEX/priv/guest_arm_helpers.c
index f6689a0..90ec93f 100644
--- a/main/VEX/priv/guest_arm_helpers.c
+++ b/main/VEX/priv/guest_arm_helpers.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -51,14 +51,381 @@
*/
+/* Set to 1 to get detailed profiling info about individual N, Z, C
+ and V flag evaluation. */
+#define PROFILE_NZCV_FLAGS 0
-/* generalised left-shifter */
-static inline UInt lshift ( UInt x, Int n )
+#if PROFILE_NZCV_FLAGS
+
+static UInt tab_n_eval[ARMG_CC_OP_NUMBER];
+static UInt tab_z_eval[ARMG_CC_OP_NUMBER];
+static UInt tab_c_eval[ARMG_CC_OP_NUMBER];
+static UInt tab_v_eval[ARMG_CC_OP_NUMBER];
+static UInt initted = 0;
+static UInt tot_evals = 0;
+
+static void initCounts ( void )
{
- if (n >= 0)
- return x << n;
- else
- return x >> (-n);
+ UInt i;
+ for (i = 0; i < ARMG_CC_OP_NUMBER; i++) {
+ tab_n_eval[i] = tab_z_eval[i] = tab_c_eval[i] = tab_v_eval[i] = 0;
+ }
+ initted = 1;
+}
+
+static void showCounts ( void )
+{
+ UInt i;
+ vex_printf("\n N Z C V\n");
+ vex_printf( "---------------------------------------------------\n");
+ for (i = 0; i < ARMG_CC_OP_NUMBER; i++) {
+ vex_printf("CC_OP=%d %9d %9d %9d %9d\n",
+ i,
+ tab_n_eval[i], tab_z_eval[i],
+ tab_c_eval[i], tab_v_eval[i] );
+ }
+}
+
+#define NOTE_N_EVAL(_cc_op) NOTE_EVAL(_cc_op, tab_n_eval)
+#define NOTE_Z_EVAL(_cc_op) NOTE_EVAL(_cc_op, tab_z_eval)
+#define NOTE_C_EVAL(_cc_op) NOTE_EVAL(_cc_op, tab_c_eval)
+#define NOTE_V_EVAL(_cc_op) NOTE_EVAL(_cc_op, tab_v_eval)
+
+#define NOTE_EVAL(_cc_op, _tab) \
+ do { \
+ if (!initted) initCounts(); \
+ vassert( ((UInt)(_cc_op)) < ARMG_CC_OP_NUMBER); \
+ _tab[(UInt)(_cc_op)]++; \
+ tot_evals++; \
+ if (0 == (tot_evals & 0xFFFFF)) \
+ showCounts(); \
+ } while (0)
+
+#endif /* PROFILE_NZCV_FLAGS */
+
+
+/* Calculate the N flag from the supplied thunk components, in the
+ least significant bit of the word. Returned bits 31:1 are zero. */
+static
+UInt armg_calculate_flag_n ( UInt cc_op, UInt cc_dep1,
+ UInt cc_dep2, UInt cc_dep3 )
+{
+# if PROFILE_NZCV_FLAGS
+ NOTE_N_EVAL(cc_op);
+# endif
+
+ switch (cc_op) {
+ case ARMG_CC_OP_COPY: {
+ /* (nzcv:28x0, unused, unused) */
+ UInt nf = (cc_dep1 >> ARMG_CC_SHIFT_N) & 1;
+ return nf;
+ }
+ case ARMG_CC_OP_ADD: {
+ /* (argL, argR, unused) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt res = argL + argR;
+ UInt nf = res >> 31;
+ return nf;
+ }
+ case ARMG_CC_OP_SUB: {
+ /* (argL, argR, unused) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt res = argL - argR;
+ UInt nf = res >> 31;
+ return nf;
+ }
+ case ARMG_CC_OP_ADC: {
+ /* (argL, argR, oldC) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt oldC = cc_dep3;
+ vassert((oldC & ~1) == 0);
+ UInt res = argL + argR + oldC;
+ UInt nf = res >> 31;
+ return nf;
+ }
+ case ARMG_CC_OP_SBB: {
+ /* (argL, argR, oldC) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt oldC = cc_dep3;
+ vassert((oldC & ~1) == 0);
+ UInt res = argL - argR - (oldC ^ 1);
+ UInt nf = res >> 31;
+ return nf;
+ }
+ case ARMG_CC_OP_LOGIC: {
+ /* (res, shco, oldV) */
+ UInt res = cc_dep1;
+ UInt nf = res >> 31;
+ return nf;
+ }
+ case ARMG_CC_OP_MUL: {
+ /* (res, unused, oldC:oldV) */
+ UInt res = cc_dep1;
+ UInt nf = res >> 31;
+ return nf;
+ }
+ case ARMG_CC_OP_MULL: {
+ /* (resLo32, resHi32, oldC:oldV) */
+ UInt resHi32 = cc_dep2;
+ UInt nf = resHi32 >> 31;
+ return nf;
+ }
+ default:
+ /* shouldn't really make these calls from generated code */
+ vex_printf("armg_calculate_flag_n"
+ "( op=%u, dep1=0x%x, dep2=0x%x, dep3=0x%x )\n",
+ cc_op, cc_dep1, cc_dep2, cc_dep3 );
+ vpanic("armg_calculate_flags_n");
+ }
+}
+
+
+/* Calculate the Z flag from the supplied thunk components, in the
+ least significant bit of the word. Returned bits 31:1 are zero. */
+static
+UInt armg_calculate_flag_z ( UInt cc_op, UInt cc_dep1,
+ UInt cc_dep2, UInt cc_dep3 )
+{
+# if PROFILE_NZCV_FLAGS
+ NOTE_Z_EVAL(cc_op);
+# endif
+
+ switch (cc_op) {
+ case ARMG_CC_OP_COPY: {
+ /* (nzcv:28x0, unused, unused) */
+ UInt zf = (cc_dep1 >> ARMG_CC_SHIFT_Z) & 1;
+ return zf;
+ }
+ case ARMG_CC_OP_ADD: {
+ /* (argL, argR, unused) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt res = argL + argR;
+ UInt zf = res == 0;
+ return zf;
+ }
+ case ARMG_CC_OP_SUB: {
+ /* (argL, argR, unused) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt res = argL - argR;
+ UInt zf = res == 0;
+ return zf;
+ }
+ case ARMG_CC_OP_ADC: {
+ /* (argL, argR, oldC) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt oldC = cc_dep3;
+ vassert((oldC & ~1) == 0);
+ UInt res = argL + argR + oldC;
+ UInt zf = res == 0;
+ return zf;
+ }
+ case ARMG_CC_OP_SBB: {
+ /* (argL, argR, oldC) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt oldC = cc_dep3;
+ vassert((oldC & ~1) == 0);
+ UInt res = argL - argR - (oldC ^ 1);
+ UInt zf = res == 0;
+ return zf;
+ }
+ case ARMG_CC_OP_LOGIC: {
+ /* (res, shco, oldV) */
+ UInt res = cc_dep1;
+ UInt zf = res == 0;
+ return zf;
+ }
+ case ARMG_CC_OP_MUL: {
+ /* (res, unused, oldC:oldV) */
+ UInt res = cc_dep1;
+ UInt zf = res == 0;
+ return zf;
+ }
+ case ARMG_CC_OP_MULL: {
+ /* (resLo32, resHi32, oldC:oldV) */
+ UInt resLo32 = cc_dep1;
+ UInt resHi32 = cc_dep2;
+ UInt zf = (resHi32|resLo32) == 0;
+ return zf;
+ }
+ default:
+ /* shouldn't really make these calls from generated code */
+ vex_printf("armg_calculate_flags_z"
+ "( op=%u, dep1=0x%x, dep2=0x%x, dep3=0x%x )\n",
+ cc_op, cc_dep1, cc_dep2, cc_dep3 );
+ vpanic("armg_calculate_flags_z");
+ }
+}
+
+
+/* CALLED FROM GENERATED CODE: CLEAN HELPER */
+/* Calculate the C flag from the supplied thunk components, in the
+ least significant bit of the word. Returned bits 31:1 are zero. */
+UInt armg_calculate_flag_c ( UInt cc_op, UInt cc_dep1,
+ UInt cc_dep2, UInt cc_dep3 )
+{
+# if PROFILE_NZCV_FLAGS
+ NOTE_C_EVAL(cc_op);
+# endif
+
+ switch (cc_op) {
+ case ARMG_CC_OP_COPY: {
+ /* (nzcv:28x0, unused, unused) */
+ UInt cf = (cc_dep1 >> ARMG_CC_SHIFT_C) & 1;
+ return cf;
+ }
+ case ARMG_CC_OP_ADD: {
+ /* (argL, argR, unused) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt res = argL + argR;
+ UInt cf = res < argL;
+ return cf;
+ }
+ case ARMG_CC_OP_SUB: {
+ /* (argL, argR, unused) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt cf = argL >= argR;
+ return cf;
+ }
+ case ARMG_CC_OP_ADC: {
+ /* (argL, argR, oldC) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt oldC = cc_dep3;
+ vassert((oldC & ~1) == 0);
+ UInt res = argL + argR + oldC;
+ UInt cf = oldC ? (res <= argL) : (res < argL);
+ return cf;
+ }
+ case ARMG_CC_OP_SBB: {
+ /* (argL, argR, oldC) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt oldC = cc_dep3;
+ vassert((oldC & ~1) == 0);
+ UInt cf = oldC ? (argL >= argR) : (argL > argR);
+ return cf;
+ }
+ case ARMG_CC_OP_LOGIC: {
+ /* (res, shco, oldV) */
+ UInt shco = cc_dep2;
+ vassert((shco & ~1) == 0);
+ UInt cf = shco;
+ return cf;
+ }
+ case ARMG_CC_OP_MUL: {
+ /* (res, unused, oldC:oldV) */
+ UInt oldC = (cc_dep3 >> 1) & 1;
+ vassert((cc_dep3 & ~3) == 0);
+ UInt cf = oldC;
+ return cf;
+ }
+ case ARMG_CC_OP_MULL: {
+ /* (resLo32, resHi32, oldC:oldV) */
+ UInt oldC = (cc_dep3 >> 1) & 1;
+ vassert((cc_dep3 & ~3) == 0);
+ UInt cf = oldC;
+ return cf;
+ }
+ default:
+ /* shouldn't really make these calls from generated code */
+ vex_printf("armg_calculate_flag_c"
+ "( op=%u, dep1=0x%x, dep2=0x%x, dep3=0x%x )\n",
+ cc_op, cc_dep1, cc_dep2, cc_dep3 );
+ vpanic("armg_calculate_flag_c");
+ }
+}
+
+
+/* CALLED FROM GENERATED CODE: CLEAN HELPER */
+/* Calculate the V flag from the supplied thunk components, in the
+ least significant bit of the word. Returned bits 31:1 are zero. */
+UInt armg_calculate_flag_v ( UInt cc_op, UInt cc_dep1,
+ UInt cc_dep2, UInt cc_dep3 )
+{
+# if PROFILE_NZCV_FLAGS
+ NOTE_V_EVAL(cc_op);
+# endif
+
+ switch (cc_op) {
+ case ARMG_CC_OP_COPY: {
+ /* (nzcv:28x0, unused, unused) */
+ UInt vf = (cc_dep1 >> ARMG_CC_SHIFT_V) & 1;
+ return vf;
+ }
+ case ARMG_CC_OP_ADD: {
+ /* (argL, argR, unused) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt res = argL + argR;
+ UInt vf = ((res ^ argL) & (res ^ argR)) >> 31;
+ return vf;
+ }
+ case ARMG_CC_OP_SUB: {
+ /* (argL, argR, unused) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt res = argL - argR;
+ UInt vf = ((argL ^ argR) & (argL ^ res)) >> 31;
+ return vf;
+ }
+ case ARMG_CC_OP_ADC: {
+ /* (argL, argR, oldC) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt oldC = cc_dep3;
+ vassert((oldC & ~1) == 0);
+ UInt res = argL + argR + oldC;
+ UInt vf = ((res ^ argL) & (res ^ argR)) >> 31;
+ return vf;
+ }
+ case ARMG_CC_OP_SBB: {
+ /* (argL, argR, oldC) */
+ UInt argL = cc_dep1;
+ UInt argR = cc_dep2;
+ UInt oldC = cc_dep3;
+ vassert((oldC & ~1) == 0);
+ UInt res = argL - argR - (oldC ^ 1);
+ UInt vf = ((argL ^ argR) & (argL ^ res)) >> 31;
+ return vf;
+ }
+ case ARMG_CC_OP_LOGIC: {
+ /* (res, shco, oldV) */
+ UInt oldV = cc_dep3;
+ vassert((oldV & ~1) == 0);
+ UInt vf = oldV;
+ return vf;
+ }
+ case ARMG_CC_OP_MUL: {
+ /* (res, unused, oldC:oldV) */
+ UInt oldV = (cc_dep3 >> 0) & 1;
+ vassert((cc_dep3 & ~3) == 0);
+ UInt vf = oldV;
+ return vf;
+ }
+ case ARMG_CC_OP_MULL: {
+ /* (resLo32, resHi32, oldC:oldV) */
+ UInt oldV = (cc_dep3 >> 0) & 1;
+ vassert((cc_dep3 & ~3) == 0);
+ UInt vf = oldV;
+ return vf;
+ }
+ default:
+ /* shouldn't really make these calls from generated code */
+ vex_printf("armg_calculate_flag_v"
+ "( op=%u, dep1=0x%x, dep2=0x%x, dep3=0x%x )\n",
+ cc_op, cc_dep1, cc_dep2, cc_dep3 );
+ vpanic("armg_calculate_flag_v");
+ }
}
@@ -69,142 +436,21 @@
UInt armg_calculate_flags_nzcv ( UInt cc_op, UInt cc_dep1,
UInt cc_dep2, UInt cc_dep3 )
{
- switch (cc_op) {
- case ARMG_CC_OP_COPY:
- /* (nzcv, unused, unused) */
- return cc_dep1;
- case ARMG_CC_OP_ADD: {
- /* (argL, argR, unused) */
- UInt argL = cc_dep1;
- UInt argR = cc_dep2;
- UInt res = argL + argR;
- UInt nf = lshift( res & (1<<31), ARMG_CC_SHIFT_N - 31 );
- UInt zf = lshift( res == 0, ARMG_CC_SHIFT_Z );
- // CF and VF need verification
- UInt cf = lshift( res < argL, ARMG_CC_SHIFT_C );
- UInt vf = lshift( (res ^ argL) & (res ^ argR),
- ARMG_CC_SHIFT_V + 1 - 32 )
- & ARMG_CC_MASK_V;
- //vex_printf("%08x %08x -> n %x z %x c %x v %x\n",
- // argL, argR, nf, zf, cf, vf);
- return nf | zf | cf | vf;
- }
- case ARMG_CC_OP_SUB: {
- /* (argL, argR, unused) */
- UInt argL = cc_dep1;
- UInt argR = cc_dep2;
- UInt res = argL - argR;
- UInt nf = lshift( res & (1<<31), ARMG_CC_SHIFT_N - 31 );
- UInt zf = lshift( res == 0, ARMG_CC_SHIFT_Z );
- // XXX cf is inverted relative to normal sense
- UInt cf = lshift( argL >= argR, ARMG_CC_SHIFT_C );
- UInt vf = lshift( (argL ^ argR) & (argL ^ res),
- ARMG_CC_SHIFT_V + 1 - 32 )
- & ARMG_CC_MASK_V;
- //vex_printf("%08x %08x -> n %x z %x c %x v %x\n",
- // argL, argR, nf, zf, cf, vf);
- return nf | zf | cf | vf;
- }
- case ARMG_CC_OP_ADC: {
- /* (argL, argR, oldC) */
- UInt argL = cc_dep1;
- UInt argR = cc_dep2;
- UInt oldC = cc_dep3;
- UInt res = (argL + argR) + oldC;
- UInt nf = lshift( res & (1<<31), ARMG_CC_SHIFT_N - 31 );
- UInt zf = lshift( res == 0, ARMG_CC_SHIFT_Z );
- UInt cf = oldC ? lshift( res <= argL, ARMG_CC_SHIFT_C )
- : lshift( res < argL, ARMG_CC_SHIFT_C );
- UInt vf = lshift( (res ^ argL) & (res ^ argR),
- ARMG_CC_SHIFT_V + 1 - 32 )
- & ARMG_CC_MASK_V;
- //vex_printf("%08x %08x -> n %x z %x c %x v %x\n",
- // argL, argR, nf, zf, cf, vf);
- return nf | zf | cf | vf;
- }
- case ARMG_CC_OP_SBB: {
- /* (argL, argR, oldC) */
- UInt argL = cc_dep1;
- UInt argR = cc_dep2;
- UInt oldC = cc_dep3;
- UInt res = argL - argR - (oldC ^ 1);
- UInt nf = lshift( res & (1<<31), ARMG_CC_SHIFT_N - 31 );
- UInt zf = lshift( res == 0, ARMG_CC_SHIFT_Z );
- UInt cf = oldC ? lshift( argL >= argR, ARMG_CC_SHIFT_C )
- : lshift( argL > argR, ARMG_CC_SHIFT_C );
- UInt vf = lshift( (argL ^ argR) & (argL ^ res),
- ARMG_CC_SHIFT_V + 1 - 32 )
- & ARMG_CC_MASK_V;
- //vex_printf("%08x %08x -> n %x z %x c %x v %x\n",
- // argL, argR, nf, zf, cf, vf);
- return nf | zf | cf | vf;
- }
- case ARMG_CC_OP_LOGIC: {
- /* (res, shco, oldV) */
- UInt res = cc_dep1;
- UInt shco = cc_dep2;
- UInt oldV = cc_dep3;
- UInt nf = lshift( res & (1<<31), ARMG_CC_SHIFT_N - 31 );
- UInt zf = lshift( res == 0, ARMG_CC_SHIFT_Z );
- UInt cf = lshift( shco & 1, ARMG_CC_SHIFT_C );
- UInt vf = lshift( oldV & 1, ARMG_CC_SHIFT_V );
- return nf | zf | cf | vf;
- }
- case ARMG_CC_OP_MUL: {
- /* (res, unused, oldC:oldV) */
- UInt res = cc_dep1;
- UInt oldC = (cc_dep3 >> 1) & 1;
- UInt oldV = (cc_dep3 >> 0) & 1;
- UInt nf = lshift( res & (1<<31), ARMG_CC_SHIFT_N - 31 );
- UInt zf = lshift( res == 0, ARMG_CC_SHIFT_Z );
- UInt cf = lshift( oldC & 1, ARMG_CC_SHIFT_C );
- UInt vf = lshift( oldV & 1, ARMG_CC_SHIFT_V );
- return nf | zf | cf | vf;
- }
- case ARMG_CC_OP_MULL: {
- /* (resLo32, resHi32, oldC:oldV) */
- UInt resLo32 = cc_dep1;
- UInt resHi32 = cc_dep2;
- UInt oldC = (cc_dep3 >> 1) & 1;
- UInt oldV = (cc_dep3 >> 0) & 1;
- UInt nf = lshift( resHi32 & (1<<31), ARMG_CC_SHIFT_N - 31 );
- UInt zf = lshift( (resHi32|resLo32) == 0, ARMG_CC_SHIFT_Z );
- UInt cf = lshift( oldC & 1, ARMG_CC_SHIFT_C );
- UInt vf = lshift( oldV & 1, ARMG_CC_SHIFT_V );
- return nf | zf | cf | vf;
- }
- default:
- /* shouldn't really make these calls from generated code */
- vex_printf("armg_calculate_flags_nzcv"
- "( op=%u, dep1=0x%x, dep2=0x%x, dep3=0x%x )\n",
- cc_op, cc_dep1, cc_dep2, cc_dep3 );
- vpanic("armg_calculate_flags_nzcv");
- }
+ UInt f;
+ UInt res = 0;
+ f = armg_calculate_flag_n(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ res |= (f << ARMG_CC_SHIFT_N);
+ f = armg_calculate_flag_z(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ res |= (f << ARMG_CC_SHIFT_Z);
+ f = armg_calculate_flag_c(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ res |= (f << ARMG_CC_SHIFT_C);
+ f = armg_calculate_flag_v(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ res |= (f << ARMG_CC_SHIFT_V);
+ return res;
}
/* CALLED FROM GENERATED CODE: CLEAN HELPER */
-/* Calculate the C flag from the thunk components, in the lowest bit
- of the word (bit 0). */
-UInt armg_calculate_flag_c ( UInt cc_op, UInt cc_dep1,
- UInt cc_dep2, UInt cc_dep3 )
-{
- UInt r = armg_calculate_flags_nzcv(cc_op, cc_dep1, cc_dep2, cc_dep3);
- return (r >> ARMG_CC_SHIFT_C) & 1;
-}
-
-
-/* CALLED FROM GENERATED CODE: CLEAN HELPER */
-/* Calculate the V flag from the thunk components, in the lowest bit
- of the word (bit 0). */
-UInt armg_calculate_flag_v ( UInt cc_op, UInt cc_dep1,
- UInt cc_dep2, UInt cc_dep3 )
-{
- UInt r = armg_calculate_flags_nzcv(cc_op, cc_dep1, cc_dep2, cc_dep3);
- return (r >> ARMG_CC_SHIFT_V) & 1;
-}
-
-/* CALLED FROM GENERATED CODE: CLEAN HELPER */
/* Calculate the QC flag from the arguments, in the lowest bit
of the word (bit 0). Urr, having this out of line is bizarre.
Push back inline. */
@@ -219,15 +465,14 @@
/* CALLED FROM GENERATED CODE: CLEAN HELPER */
/* Calculate the specified condition from the thunk components, in the
- lowest bit of the word (bit 0). */
-extern
-UInt armg_calculate_condition ( UInt cond_n_op /* ARMCondcode << 4 | cc_op */,
+ lowest bit of the word (bit 0). Returned bits 31:1 are zero. */
+UInt armg_calculate_condition ( UInt cond_n_op /* (ARMCondcode << 4) | cc_op */,
UInt cc_dep1,
UInt cc_dep2, UInt cc_dep3 )
{
UInt cond = cond_n_op >> 4;
UInt cc_op = cond_n_op & 0xF;
- UInt nf, zf, vf, cf, nzcv, inv;
+ UInt nf, zf, vf, cf, inv;
// vex_printf("XXXXXXXX %x %x %x %x\n",
// cond_n_op, cc_dep1, cc_dep2, cc_dep3);
@@ -235,47 +480,46 @@
if (cond == ARMCondAL) return 1;
inv = cond & 1;
- nzcv = armg_calculate_flags_nzcv(cc_op, cc_dep1, cc_dep2, cc_dep3);
switch (cond) {
case ARMCondEQ: // Z=1 => z
case ARMCondNE: // Z=0
- zf = nzcv >> ARMG_CC_SHIFT_Z;
- return 1 & (inv ^ zf);
+ zf = armg_calculate_flag_z(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ return inv ^ zf;
case ARMCondHS: // C=1 => c
case ARMCondLO: // C=0
- cf = nzcv >> ARMG_CC_SHIFT_C;
- return 1 & (inv ^ cf);
+ cf = armg_calculate_flag_c(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ return inv ^ cf;
case ARMCondMI: // N=1 => n
case ARMCondPL: // N=0
- nf = nzcv >> ARMG_CC_SHIFT_N;
- return 1 & (inv ^ nf);
+ nf = armg_calculate_flag_n(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ return inv ^ nf;
case ARMCondVS: // V=1 => v
case ARMCondVC: // V=0
- vf = nzcv >> ARMG_CC_SHIFT_V;
- return 1 & (inv ^ vf);
+ vf = armg_calculate_flag_v(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ return inv ^ vf;
case ARMCondHI: // C=1 && Z=0 => c & ~z
case ARMCondLS: // C=0 || Z=1
- cf = nzcv >> ARMG_CC_SHIFT_C;
- zf = nzcv >> ARMG_CC_SHIFT_Z;
- return 1 & (inv ^ (cf & ~zf));
+ cf = armg_calculate_flag_c(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ zf = armg_calculate_flag_z(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ return inv ^ (cf & ~zf);
case ARMCondGE: // N=V => ~(n^v)
case ARMCondLT: // N!=V
- nf = nzcv >> ARMG_CC_SHIFT_N;
- vf = nzcv >> ARMG_CC_SHIFT_V;
- return 1 & (inv ^ ~(nf ^ vf));
+ nf = armg_calculate_flag_n(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ vf = armg_calculate_flag_v(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ return inv ^ (1 & ~(nf ^ vf));
case ARMCondGT: // Z=0 && N=V => ~z & ~(n^v) => ~(z | (n^v))
case ARMCondLE: // Z=1 || N!=V
- nf = nzcv >> ARMG_CC_SHIFT_N;
- vf = nzcv >> ARMG_CC_SHIFT_V;
- zf = nzcv >> ARMG_CC_SHIFT_Z;
- return 1 & (inv ^ ~(zf | (nf ^ vf)));
+ nf = armg_calculate_flag_n(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ vf = armg_calculate_flag_v(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ zf = armg_calculate_flag_z(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ return inv ^ (1 & ~(zf | (nf ^ vf)));
case ARMCondAL: // handled above
case ARMCondNV: // should never get here: Illegal instr
@@ -332,13 +576,17 @@
/* --------- specialising "armg_calculate_condition" --------- */
if (vex_streq(function_name, "armg_calculate_condition")) {
- /* specialise calls to above "armg_calculate condition" function */
- IRExpr *cond_n_op, *cc_dep1, *cc_dep2, *cc_dep3;
+
+ /* specialise calls to the "armg_calculate_condition" function.
+ Not sure whether this is strictly necessary, but: the
+ replacement IR must produce only the values 0 or 1. Bits
+ 31:1 are required to be zero. */
+ IRExpr *cond_n_op, *cc_dep1, *cc_dep2, *cc_ndep;
vassert(arity == 4);
- cond_n_op = args[0]; /* ARMCondcode << 4 | ARMG_CC_OP_* */
+ cond_n_op = args[0]; /* (ARMCondcode << 4) | ARMG_CC_OP_* */
cc_dep1 = args[1];
cc_dep2 = args[2];
- cc_dep3 = args[3];
+ cc_ndep = args[3];
/*---------------- SUB ----------------*/
@@ -353,6 +601,12 @@
binop(Iop_CmpNE32, cc_dep1, cc_dep2));
}
+ if (isU32(cond_n_op, (ARMCondGT << 4) | ARMG_CC_OP_SUB)) {
+ /* GT after SUB --> test argL >s argR
+ --> test argR <s argL */
+ return unop(Iop_1Uto32,
+ binop(Iop_CmpLT32S, cc_dep2, cc_dep1));
+ }
if (isU32(cond_n_op, (ARMCondLE << 4) | ARMG_CC_OP_SUB)) {
/* LE after SUB --> test argL <=s argR */
return unop(Iop_1Uto32,
@@ -378,6 +632,11 @@
return unop(Iop_1Uto32,
binop(Iop_CmpLE32U, cc_dep2, cc_dep1));
}
+ if (isU32(cond_n_op, (ARMCondLO << 4) | ARMG_CC_OP_SUB)) {
+ /* LO after SUB --> test argL <u argR */
+ return unop(Iop_1Uto32,
+ binop(Iop_CmpLT32U, cc_dep1, cc_dep2));
+ }
if (isU32(cond_n_op, (ARMCondLS << 4) | ARMG_CC_OP_SUB)) {
/* LS after SUB --> test argL <=u argR */
@@ -385,7 +644,27 @@
binop(Iop_CmpLE32U, cc_dep1, cc_dep2));
}
+ /*---------------- SBB ----------------*/
+
+ if (isU32(cond_n_op, (ARMCondHS << 4) | ARMG_CC_OP_SBB)) {
+ /* This seems to happen a lot in softfloat code, eg __divdf3+140 */
+ /* thunk is: (dep1=argL, dep2=argR, ndep=oldC) */
+ /* HS after SBB (same as C after SBB below)
+ --> oldC ? (argL >=u argR) : (argL >u argR)
+ --> oldC ? (argR <=u argL) : (argR <u argL)
+ */
+ return
+ IRExpr_Mux0X(
+ unop(Iop_32to8, cc_ndep),
+ /* case oldC == 0 */
+ unop(Iop_1Uto32, binop(Iop_CmpLT32U, cc_dep2, cc_dep1)),
+ /* case oldC != 0 */
+ unop(Iop_1Uto32, binop(Iop_CmpLE32U, cc_dep2, cc_dep1))
+ );
+ }
+
/*---------------- LOGIC ----------------*/
+
if (isU32(cond_n_op, (ARMCondEQ << 4) | ARMG_CC_OP_LOGIC)) {
/* EQ after LOGIC --> test res == 0 */
return unop(Iop_1Uto32,
@@ -397,7 +676,23 @@
binop(Iop_CmpNE32, cc_dep1, mkU32(0)));
}
+ if (isU32(cond_n_op, (ARMCondPL << 4) | ARMG_CC_OP_LOGIC)) {
+ /* PL after LOGIC --> test (res >> 31) == 0 */
+ return unop(Iop_1Uto32,
+ binop(Iop_CmpEQ32,
+ binop(Iop_Shr32, cc_dep1, mkU8(31)),
+ mkU32(0)));
+ }
+ if (isU32(cond_n_op, (ARMCondMI << 4) | ARMG_CC_OP_LOGIC)) {
+ /* MI after LOGIC --> test (res >> 31) == 1 */
+ return unop(Iop_1Uto32,
+ binop(Iop_CmpEQ32,
+ binop(Iop_Shr32, cc_dep1, mkU8(31)),
+ mkU32(1)));
+ }
+
/*----------------- AL -----------------*/
+
/* A critically important case for Thumb code.
What we're trying to spot is the case where cond_n_op is an
@@ -444,6 +739,126 @@
}
}
+ /* --------- specialising "armg_calculate_flag_c" --------- */
+
+ else
+ if (vex_streq(function_name, "armg_calculate_flag_c")) {
+
+ /* specialise calls to the "armg_calculate_flag_c" function.
+ Note that the returned value must be either 0 or 1; nonzero
+ bits 31:1 are not allowed. In turn, incoming oldV and oldC
+ values (from the thunk) are assumed to have bits 31:1
+ clear. */
+ IRExpr *cc_op, *cc_dep1, *cc_dep2, *cc_ndep;
+ vassert(arity == 4);
+ cc_op = args[0]; /* ARMG_CC_OP_* */
+ cc_dep1 = args[1];
+ cc_dep2 = args[2];
+ cc_ndep = args[3];
+
+ if (isU32(cc_op, ARMG_CC_OP_LOGIC)) {
+ /* Thunk args are (result, shco, oldV) */
+ /* C after LOGIC --> shco */
+ return cc_dep2;
+ }
+
+ if (isU32(cc_op, ARMG_CC_OP_SUB)) {
+ /* Thunk args are (argL, argR, unused) */
+ /* C after SUB --> argL >=u argR
+ --> argR <=u argL */
+ return unop(Iop_1Uto32,
+ binop(Iop_CmpLE32U, cc_dep2, cc_dep1));
+ }
+
+ if (isU32(cc_op, ARMG_CC_OP_SBB)) {
+ /* This happens occasionally in softfloat code, eg __divdf3+140 */
+ /* thunk is: (dep1=argL, dep2=argR, ndep=oldC) */
+ /* C after SBB (same as HS after SBB above)
+ --> oldC ? (argL >=u argR) : (argL >u argR)
+ --> oldC ? (argR <=u argL) : (argR <u argL)
+ */
+ return
+ IRExpr_Mux0X(
+ unop(Iop_32to8, cc_ndep),
+ /* case oldC == 0 */
+ unop(Iop_1Uto32, binop(Iop_CmpLT32U, cc_dep2, cc_dep1)),
+ /* case oldC != 0 */
+ unop(Iop_1Uto32, binop(Iop_CmpLE32U, cc_dep2, cc_dep1))
+ );
+ }
+
+ }
+
+ /* --------- specialising "armg_calculate_flag_v" --------- */
+
+ else
+ if (vex_streq(function_name, "armg_calculate_flag_v")) {
+
+ /* specialise calls to the "armg_calculate_flag_v" function.
+ Note that the returned value must be either 0 or 1; nonzero
+ bits 31:1 are not allowed. In turn, incoming oldV and oldC
+ values (from the thunk) are assumed to have bits 31:1
+ clear. */
+ IRExpr *cc_op, *cc_dep1, *cc_dep2, *cc_ndep;
+ vassert(arity == 4);
+ cc_op = args[0]; /* ARMG_CC_OP_* */
+ cc_dep1 = args[1];
+ cc_dep2 = args[2];
+ cc_ndep = args[3];
+
+ if (isU32(cc_op, ARMG_CC_OP_LOGIC)) {
+ /* Thunk args are (result, shco, oldV) */
+ /* V after LOGIC --> oldV */
+ return cc_ndep;
+ }
+
+ if (isU32(cc_op, ARMG_CC_OP_SUB)) {
+ /* Thunk args are (argL, argR, unused) */
+ /* V after SUB
+ --> let res = argL - argR
+ in ((argL ^ argR) & (argL ^ res)) >> 31
+ --> ((argL ^ argR) & (argL ^ (argL - argR))) >> 31
+ */
+ IRExpr* argL = cc_dep1;
+ IRExpr* argR = cc_dep2;
+ return
+ binop(Iop_Shr32,
+ binop(Iop_And32,
+ binop(Iop_Xor32, argL, argR),
+ binop(Iop_Xor32, argL, binop(Iop_Sub32, argL, argR))
+ ),
+ mkU8(31)
+ );
+ }
+
+ if (isU32(cc_op, ARMG_CC_OP_SBB)) {
+ /* This happens occasionally in softfloat code, eg __divdf3+140 */
+ /* thunk is: (dep1=argL, dep2=argR, ndep=oldC) */
+ /* V after SBB
+ --> let res = argL - argR - (oldC ^ 1)
+ in (argL ^ argR) & (argL ^ res) & 1
+ */
+ return
+ binop(
+ Iop_And32,
+ binop(
+ Iop_And32,
+ // argL ^ argR
+ binop(Iop_Xor32, cc_dep1, cc_dep2),
+ // argL ^ (argL - argR - (oldC ^ 1))
+ binop(Iop_Xor32,
+ cc_dep1,
+ binop(Iop_Sub32,
+ binop(Iop_Sub32, cc_dep1, cc_dep2),
+ binop(Iop_Xor32, cc_ndep, mkU32(1)))
+ )
+ ),
+ mkU32(1)
+ );
+ }
+
+ }
+
# undef unop
# undef binop
# undef mkU32
diff --git a/main/VEX/priv/guest_arm_toIR.c b/main/VEX/priv/guest_arm_toIR.c
index b38877b..4fd47db 100644
--- a/main/VEX/priv/guest_arm_toIR.c
+++ b/main/VEX/priv/guest_arm_toIR.c
@@ -7,11 +7,11 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
NEON support is
- Copyright (C) 2010-2010 Samsung Electronics
+ Copyright (C) 2010-2011 Samsung Electronics
contributed by Dmitry Zhurikhin <zhur@ispras.ru>
and Kirill Batuzov <batuzovk@ispras.ru>
@@ -1088,14 +1088,13 @@
static IRExpr* mk_armg_calculate_condition_dyn ( IRExpr* cond )
{
vassert(typeOfIRExpr(irsb->tyenv, cond) == Ity_I32);
- /* And 'cond' had better produce a value in which only bits 7:4
- bits are nonzero. However, obviously we can't assert for
- that. */
+ /* And 'cond' had better produce a value in which only bits 7:4 are
+ nonzero. However, obviously we can't assert for that. */
/* So what we're constructing for the first argument is
- "(cond << 4) | stored-operation-operation". However,
- as per comments above, must be supplied pre-shifted to this
- function.
+ "(cond << 4) | stored-operation".
+ However, as per comments above, 'cond' must be supplied
+ pre-shifted to this function.
This pairing scheme requires that the ARM_CC_OP_ values all fit
in 4 bits. Hence we are passing a (COND, OP) pair in the lowest
@@ -1700,6 +1699,12 @@
The calling convention for res and newC is a bit funny. They could
be passed by value, but instead are passed by ref.
+
+ The C (shco) value computed must be zero in bits 31:1, as the IR
+ optimisations for flag handling (guest_arm_spechelper) rely on
+ that, and the slow-path handlers (armg_calculate_flags_nzcv) assert
+ for it. Same applies to all these functions that compute shco
+ after a shift or rotate, not just this one.
*/
static void compute_result_and_C_after_LSL_by_imm5 (
@@ -1751,7 +1756,7 @@
/* mux0X(amt == 0,
mux0X(amt < 32,
0,
- Rm[(32-amt) & 31])
+ Rm[(32-amt) & 31]),
oldC)
*/
/* About the best you can do is pray that iropt is able
@@ -1767,16 +1772,19 @@
unop(Iop_1Uto8,
binop(Iop_CmpLE32U, mkexpr(amtT), mkU32(32))),
mkU32(0),
- binop(Iop_Shr32,
- mkexpr(rMt),
- unop(Iop_32to8,
- binop(Iop_And32,
- binop(Iop_Sub32,
- mkU32(32),
- mkexpr(amtT)),
- mkU32(31)
- )
- )
+ binop(Iop_And32,
+ binop(Iop_Shr32,
+ mkexpr(rMt),
+ unop(Iop_32to8,
+ binop(Iop_And32,
+ binop(Iop_Sub32,
+ mkU32(32),
+ mkexpr(amtT)),
+ mkU32(31)
+ )
+ )
+ ),
+ mkU32(1)
)
),
mkexpr(oldC)
@@ -1862,7 +1870,7 @@
/* mux0X(amt == 0,
mux0X(amt < 32,
0,
- Rm[(amt-1) & 31])
+ Rm[(amt-1) & 31]),
oldC)
*/
IRTemp oldC = newTemp(Ity_I32);
@@ -1876,16 +1884,19 @@
unop(Iop_1Uto8,
binop(Iop_CmpLE32U, mkexpr(amtT), mkU32(32))),
mkU32(0),
- binop(Iop_Shr32,
- mkexpr(rMt),
- unop(Iop_32to8,
- binop(Iop_And32,
- binop(Iop_Sub32,
- mkexpr(amtT),
- mkU32(1)),
- mkU32(31)
- )
- )
+ binop(Iop_And32,
+ binop(Iop_Shr32,
+ mkexpr(rMt),
+ unop(Iop_32to8,
+ binop(Iop_And32,
+ binop(Iop_Sub32,
+ mkexpr(amtT),
+ mkU32(1)),
+ mkU32(31)
+ )
+ )
+ ),
+ mkU32(1)
)
),
mkexpr(oldC)
@@ -1984,20 +1995,26 @@
IRExpr_Mux0X(
unop(Iop_1Uto8,
binop(Iop_CmpLE32U, mkexpr(amtT), mkU32(32))),
- binop(Iop_Shr32,
- mkexpr(rMt),
- mkU8(31)
+ binop(Iop_And32,
+ binop(Iop_Shr32,
+ mkexpr(rMt),
+ mkU8(31)
+ ),
+ mkU32(1)
),
- binop(Iop_Shr32,
- mkexpr(rMt),
- unop(Iop_32to8,
- binop(Iop_And32,
- binop(Iop_Sub32,
- mkexpr(amtT),
- mkU32(1)),
- mkU32(31)
- )
- )
+ binop(Iop_And32,
+ binop(Iop_Shr32,
+ mkexpr(rMt),
+ unop(Iop_32to8,
+ binop(Iop_And32,
+ binop(Iop_Sub32,
+ mkexpr(amtT),
+ mkU32(1)),
+ mkU32(31)
+ )
+ )
+ ),
+ mkU32(1)
)
),
mkexpr(oldC)
@@ -3794,7 +3811,7 @@
case 5:
if (B == 0) {
/* VRSHL */
- IROp op, op_shrn, op_shln, cmp_gt, op_sub, op_add;
+ IROp op, op_shrn, op_shln, cmp_gt, op_add;
IRTemp shval, old_shval, imm_val, round;
UInt i;
ULong imm;
@@ -3814,28 +3831,24 @@
switch (size) {
case 0:
op = Q ? Iop_Shl8x16 : Iop_Shl8x8;
- op_sub = Q ? Iop_Sub8x16 : Iop_Sub8x8;
op_add = Q ? Iop_Add8x16 : Iop_Add8x8;
op_shrn = Q ? Iop_ShrN8x16 : Iop_ShrN8x8;
op_shln = Q ? Iop_ShlN8x16 : Iop_ShlN8x8;
break;
case 1:
op = Q ? Iop_Shl16x8 : Iop_Shl16x4;
- op_sub = Q ? Iop_Sub16x8 : Iop_Sub16x4;
op_add = Q ? Iop_Add16x8 : Iop_Add16x4;
op_shrn = Q ? Iop_ShrN16x8 : Iop_ShrN16x4;
op_shln = Q ? Iop_ShlN16x8 : Iop_ShlN16x4;
break;
case 2:
op = Q ? Iop_Shl32x4 : Iop_Shl32x2;
- op_sub = Q ? Iop_Sub32x4 : Iop_Sub32x2;
op_add = Q ? Iop_Add32x4 : Iop_Add32x2;
op_shrn = Q ? Iop_ShrN32x4 : Iop_ShrN32x2;
op_shln = Q ? Iop_ShlN32x4 : Iop_ShlN32x2;
break;
case 3:
op = Q ? Iop_Shl64x2 : Iop_Shl64;
- op_sub = Q ? Iop_Sub64x2 : Iop_Sub64;
op_add = Q ? Iop_Add64x2 : Iop_Add64;
op_shrn = Q ? Iop_ShrN64x2 : Iop_Shr64;
op_shln = Q ? Iop_ShlN64x2 : Iop_Shl64;
@@ -3847,28 +3860,24 @@
switch (size) {
case 0:
op = Q ? Iop_Sal8x16 : Iop_Sal8x8;
- op_sub = Q ? Iop_Sub8x16 : Iop_Sub8x8;
op_add = Q ? Iop_Add8x16 : Iop_Add8x8;
op_shrn = Q ? Iop_ShrN8x16 : Iop_ShrN8x8;
op_shln = Q ? Iop_ShlN8x16 : Iop_ShlN8x8;
break;
case 1:
op = Q ? Iop_Sal16x8 : Iop_Sal16x4;
- op_sub = Q ? Iop_Sub16x8 : Iop_Sub16x4;
op_add = Q ? Iop_Add16x8 : Iop_Add16x4;
op_shrn = Q ? Iop_ShrN16x8 : Iop_ShrN16x4;
op_shln = Q ? Iop_ShlN16x8 : Iop_ShlN16x4;
break;
case 2:
op = Q ? Iop_Sal32x4 : Iop_Sal32x2;
- op_sub = Q ? Iop_Sub32x4 : Iop_Sub32x2;
op_add = Q ? Iop_Add32x4 : Iop_Add32x2;
op_shrn = Q ? Iop_ShrN32x4 : Iop_ShrN32x2;
op_shln = Q ? Iop_ShlN32x4 : Iop_ShlN32x2;
break;
case 3:
op = Q ? Iop_Sal64x2 : Iop_Sal64x1;
- op_sub = Q ? Iop_Sub64x2 : Iop_Sub64;
op_add = Q ? Iop_Add64x2 : Iop_Add64;
op_shrn = Q ? Iop_ShrN64x2 : Iop_Shr64;
op_shln = Q ? Iop_ShlN64x2 : Iop_Shl64;
@@ -3939,7 +3948,7 @@
nreg);
} else {
/* VQRSHL */
- IROp op, op_rev, op_shrn, op_shln, cmp_neq, cmp_gt, op_sub, op_add;
+ IROp op, op_rev, op_shrn, op_shln, cmp_neq, cmp_gt, op_add;
IRTemp tmp, shval, mask, old_shval, imm_val, round;
UInt i;
ULong esize, imm;
@@ -3960,7 +3969,6 @@
switch (size) {
case 0:
op = Q ? Iop_QShl8x16 : Iop_QShl8x8;
- op_sub = Q ? Iop_Sub8x16 : Iop_Sub8x8;
op_add = Q ? Iop_Add8x16 : Iop_Add8x8;
op_rev = Q ? Iop_Shr8x16 : Iop_Shr8x8;
op_shrn = Q ? Iop_ShrN8x16 : Iop_ShrN8x8;
@@ -3968,7 +3976,6 @@
break;
case 1:
op = Q ? Iop_QShl16x8 : Iop_QShl16x4;
- op_sub = Q ? Iop_Sub16x8 : Iop_Sub16x4;
op_add = Q ? Iop_Add16x8 : Iop_Add16x4;
op_rev = Q ? Iop_Shr16x8 : Iop_Shr16x4;
op_shrn = Q ? Iop_ShrN16x8 : Iop_ShrN16x4;
@@ -3976,7 +3983,6 @@
break;
case 2:
op = Q ? Iop_QShl32x4 : Iop_QShl32x2;
- op_sub = Q ? Iop_Sub32x4 : Iop_Sub32x2;
op_add = Q ? Iop_Add32x4 : Iop_Add32x2;
op_rev = Q ? Iop_Shr32x4 : Iop_Shr32x2;
op_shrn = Q ? Iop_ShrN32x4 : Iop_ShrN32x2;
@@ -3984,7 +3990,6 @@
break;
case 3:
op = Q ? Iop_QShl64x2 : Iop_QShl64x1;
- op_sub = Q ? Iop_Sub64x2 : Iop_Sub64;
op_add = Q ? Iop_Add64x2 : Iop_Add64;
op_rev = Q ? Iop_Shr64x2 : Iop_Shr64;
op_shrn = Q ? Iop_ShrN64x2 : Iop_Shr64;
@@ -3997,7 +4002,6 @@
switch (size) {
case 0:
op = Q ? Iop_QSal8x16 : Iop_QSal8x8;
- op_sub = Q ? Iop_Sub8x16 : Iop_Sub8x8;
op_add = Q ? Iop_Add8x16 : Iop_Add8x8;
op_rev = Q ? Iop_Sar8x16 : Iop_Sar8x8;
op_shrn = Q ? Iop_ShrN8x16 : Iop_ShrN8x8;
@@ -4005,7 +4009,6 @@
break;
case 1:
op = Q ? Iop_QSal16x8 : Iop_QSal16x4;
- op_sub = Q ? Iop_Sub16x8 : Iop_Sub16x4;
op_add = Q ? Iop_Add16x8 : Iop_Add16x4;
op_rev = Q ? Iop_Sar16x8 : Iop_Sar16x4;
op_shrn = Q ? Iop_ShrN16x8 : Iop_ShrN16x4;
@@ -4013,7 +4016,6 @@
break;
case 2:
op = Q ? Iop_QSal32x4 : Iop_QSal32x2;
- op_sub = Q ? Iop_Sub32x4 : Iop_Sub32x2;
op_add = Q ? Iop_Add32x4 : Iop_Add32x2;
op_rev = Q ? Iop_Sar32x4 : Iop_Sar32x2;
op_shrn = Q ? Iop_ShrN32x4 : Iop_ShrN32x2;
@@ -4021,7 +4023,6 @@
break;
case 3:
op = Q ? Iop_QSal64x2 : Iop_QSal64x1;
- op_sub = Q ? Iop_Sub64x2 : Iop_Sub64;
op_add = Q ? Iop_Add64x2 : Iop_Add64;
op_rev = Q ? Iop_Sar64x2 : Iop_Sar64;
op_shrn = Q ? Iop_ShrN64x2 : Iop_Shr64;
@@ -4814,15 +4815,15 @@
size = B;
switch (size) {
case 0:
- cvt = U ? Iop_Longen8Ux8 : Iop_Longen8Sx8;
+ cvt = U ? Iop_Widen8Uto16x8 : Iop_Widen8Sto16x8;
op = (A & 2) ? Iop_Sub16x8 : Iop_Add16x8;
break;
case 1:
- cvt = U ? Iop_Longen16Ux4 : Iop_Longen16Sx4;
+ cvt = U ? Iop_Widen16Uto32x4 : Iop_Widen16Sto32x4;
op = (A & 2) ? Iop_Sub32x4 : Iop_Add32x4;
break;
case 2:
- cvt = U ? Iop_Longen32Ux2 : Iop_Longen32Sx2;
+ cvt = U ? Iop_Widen32Uto64x2 : Iop_Widen32Sto64x2;
op = (A & 2) ? Iop_Sub64x2 : Iop_Add64x2;
break;
case 3:
@@ -4859,7 +4860,7 @@
switch (size) {
case 0:
op = Iop_Add16x8;
- cvt = Iop_Shorten16x8;
+ cvt = Iop_NarrowUn16to8x8;
sh = Iop_ShrN16x8;
imm = 1U << 7;
imm = (imm << 16) | imm;
@@ -4867,14 +4868,14 @@
break;
case 1:
op = Iop_Add32x4;
- cvt = Iop_Shorten32x4;
+ cvt = Iop_NarrowUn32to16x4;
sh = Iop_ShrN32x4;
imm = 1U << 15;
imm = (imm << 32) | imm;
break;
case 2:
op = Iop_Add64x2;
- cvt = Iop_Shorten64x2;
+ cvt = Iop_NarrowUn64to32x2;
sh = Iop_ShrN64x2;
imm = 1U << 31;
break;
@@ -4909,22 +4910,22 @@
switch (size) {
case 0:
cmp = U ? Iop_CmpGT8Ux8 : Iop_CmpGT8Sx8;
- cvt = U ? Iop_Longen8Ux8 : Iop_Longen8Sx8;
- cvt2 = Iop_Longen8Sx8;
+ cvt = U ? Iop_Widen8Uto16x8 : Iop_Widen8Sto16x8;
+ cvt2 = Iop_Widen8Sto16x8;
op = Iop_Sub16x8;
op2 = Iop_Add16x8;
break;
case 1:
cmp = U ? Iop_CmpGT16Ux4 : Iop_CmpGT16Sx4;
- cvt = U ? Iop_Longen16Ux4 : Iop_Longen16Sx4;
- cvt2 = Iop_Longen16Sx4;
+ cvt = U ? Iop_Widen16Uto32x4 : Iop_Widen16Sto32x4;
+ cvt2 = Iop_Widen16Sto32x4;
op = Iop_Sub32x4;
op2 = Iop_Add32x4;
break;
case 2:
cmp = U ? Iop_CmpGT32Ux2 : Iop_CmpGT32Sx2;
- cvt = U ? Iop_Longen32Ux2 : Iop_Longen32Sx2;
- cvt2 = Iop_Longen32Sx2;
+ cvt = U ? Iop_Widen32Uto64x2 : Iop_Widen32Sto64x2;
+ cvt2 = Iop_Widen32Sto64x2;
op = Iop_Sub64x2;
op2 = Iop_Add64x2;
break;
@@ -4967,7 +4968,7 @@
case 0:
op = Iop_Sub16x8;
op2 = Iop_Add16x8;
- cvt = Iop_Shorten16x8;
+ cvt = Iop_NarrowUn16to8x8;
sh = Iop_ShrN16x8;
imm = 1U << 7;
imm = (imm << 16) | imm;
@@ -4976,7 +4977,7 @@
case 1:
op = Iop_Sub32x4;
op2 = Iop_Add32x4;
- cvt = Iop_Shorten32x4;
+ cvt = Iop_NarrowUn32to16x4;
sh = Iop_ShrN32x4;
imm = 1U << 15;
imm = (imm << 32) | imm;
@@ -4984,7 +4985,7 @@
case 2:
op = Iop_Sub64x2;
op2 = Iop_Add64x2;
- cvt = Iop_Shorten64x2;
+ cvt = Iop_NarrowUn64to32x2;
sh = Iop_ShrN64x2;
imm = 1U << 31;
break;
@@ -5019,20 +5020,20 @@
switch (size) {
case 0:
cmp = U ? Iop_CmpGT8Ux8 : Iop_CmpGT8Sx8;
- cvt = U ? Iop_Longen8Ux8 : Iop_Longen8Sx8;
- cvt2 = Iop_Longen8Sx8;
+ cvt = U ? Iop_Widen8Uto16x8 : Iop_Widen8Sto16x8;
+ cvt2 = Iop_Widen8Sto16x8;
op = Iop_Sub16x8;
break;
case 1:
cmp = U ? Iop_CmpGT16Ux4 : Iop_CmpGT16Sx4;
- cvt = U ? Iop_Longen16Ux4 : Iop_Longen16Sx4;
- cvt2 = Iop_Longen16Sx4;
+ cvt = U ? Iop_Widen16Uto32x4 : Iop_Widen16Sto32x4;
+ cvt2 = Iop_Widen16Sto32x4;
op = Iop_Sub32x4;
break;
case 2:
cmp = U ? Iop_CmpGT32Ux2 : Iop_CmpGT32Sx2;
- cvt = U ? Iop_Longen32Ux2 : Iop_Longen32Sx2;
- cvt2 = Iop_Longen32Sx2;
+ cvt = U ? Iop_Widen32Uto64x2 : Iop_Widen32Sto64x2;
+ cvt2 = Iop_Widen32Sto64x2;
op = Iop_Sub64x2;
break;
case 3:
@@ -5526,25 +5527,40 @@
}
assign(arg_m, unop(dup, binop(get, getDRegI64(mreg), mkU8(index))));
}
- switch (size) {
- case 1:
- op = Q ? Iop_Mul16x8 : Iop_Mul16x4;
- break;
- case 2:
- op = Q ? Iop_Mul32x4 : Iop_Mul32x2;
- break;
- case 0:
- case 3:
- return False;
- default:
- vassert(0);
+ if (INSN(8,8)) {
+ switch (size) {
+ case 2:
+ op = Q ? Iop_Mul32Fx4 : Iop_Mul32Fx2;
+ break;
+ case 0:
+ case 1:
+ case 3:
+ return False;
+ default:
+ vassert(0);
+ }
+ } else {
+ switch (size) {
+ case 1:
+ op = Q ? Iop_Mul16x8 : Iop_Mul16x4;
+ break;
+ case 2:
+ op = Q ? Iop_Mul32x4 : Iop_Mul32x2;
+ break;
+ case 0:
+ case 3:
+ return False;
+ default:
+ vassert(0);
+ }
}
assign(res, binop(op, mkexpr(arg_n), mkexpr(arg_m)));
if (Q)
putQReg(dreg, mkexpr(res), condT);
else
putDRegI64(dreg, mkexpr(res), condT);
- DIP("vmul.i%u %c%u, %c%u, d%u[%u]\n", 8 << size, Q ? 'q' : 'd', dreg,
+ DIP("vmul.%c%u %c%u, %c%u, d%u[%u]\n", INSN(8,8) ? 'f' : 'i',
+ 8 << size, Q ? 'q' : 'd', dreg,
Q ? 'q' : 'd', nreg, mreg, index);
return True;
}
@@ -5597,11 +5613,10 @@
if (INSN(11,8) == BITS4(1,0,1,1) && !U) {
IROp op ,op2, dup, get;
ULong imm;
- IRTemp res, arg_m, arg_n;
+ IRTemp arg_m, arg_n;
if (dreg & 1)
return False;
dreg >>= 1;
- res = newTemp(Ity_V128);
arg_m = newTemp(Ity_I64);
arg_n = newTemp(Ity_I64);
assign(arg_n, getDRegI64(nreg));
@@ -6339,15 +6354,15 @@
switch (size) {
case 1:
op = Iop_ShrN16x8;
- narOp = Iop_Shorten16x8;
+ narOp = Iop_NarrowUn16to8x8;
break;
case 2:
op = Iop_ShrN32x4;
- narOp = Iop_Shorten32x4;
+ narOp = Iop_NarrowUn32to16x4;
break;
case 3:
op = Iop_ShrN64x2;
- narOp = Iop_Shorten64x2;
+ narOp = Iop_NarrowUn64to32x2;
break;
default:
vassert(0);
@@ -6380,17 +6395,17 @@
case 1:
addOp = Iop_Add16x8;
shOp = Iop_ShrN16x8;
- narOp = Iop_Shorten16x8;
+ narOp = Iop_NarrowUn16to8x8;
break;
case 2:
addOp = Iop_Add32x4;
shOp = Iop_ShrN32x4;
- narOp = Iop_Shorten32x4;
+ narOp = Iop_NarrowUn32to16x4;
break;
case 3:
addOp = Iop_Add64x2;
shOp = Iop_ShrN64x2;
- narOp = Iop_Shorten64x2;
+ narOp = Iop_NarrowUn64to32x2;
break;
default:
vassert(0);
@@ -6429,18 +6444,18 @@
switch (size) {
case 1:
op = U ? Iop_ShrN16x8 : Iop_SarN16x8;
- cvt = U ? Iop_QShortenU16Ux8 : Iop_QShortenS16Sx8;
- cvt2 = U ? Iop_Longen8Ux8 : Iop_Longen8Sx8;
+ cvt = U ? Iop_QNarrowUn16Uto8Ux8 : Iop_QNarrowUn16Sto8Sx8;
+ cvt2 = U ? Iop_Widen8Uto16x8 : Iop_Widen8Sto16x8;
break;
case 2:
op = U ? Iop_ShrN32x4 : Iop_SarN32x4;
- cvt = U ? Iop_QShortenU32Ux4 : Iop_QShortenS32Sx4;
- cvt2 = U ? Iop_Longen16Ux4 : Iop_Longen16Sx4;
+ cvt = U ? Iop_QNarrowUn32Uto16Ux4 : Iop_QNarrowUn32Sto16Sx4;
+ cvt2 = U ? Iop_Widen16Uto32x4 : Iop_Widen16Sto32x4;
break;
case 3:
op = U ? Iop_ShrN64x2 : Iop_SarN64x2;
- cvt = U ? Iop_QShortenU64Ux2 : Iop_QShortenS64Sx2;
- cvt2 = U ? Iop_Longen32Ux2 : Iop_Longen32Sx2;
+ cvt = U ? Iop_QNarrowUn64Uto32Ux2 : Iop_QNarrowUn64Sto32Sx2;
+ cvt2 = U ? Iop_Widen32Uto64x2 : Iop_Widen32Sto64x2;
break;
default:
vassert(0);
@@ -6452,18 +6467,18 @@
switch (size) {
case 1:
op = Iop_SarN16x8;
- cvt = Iop_QShortenU16Sx8;
- cvt2 = Iop_Longen8Ux8;
+ cvt = Iop_QNarrowUn16Sto8Ux8;
+ cvt2 = Iop_Widen8Uto16x8;
break;
case 2:
op = Iop_SarN32x4;
- cvt = Iop_QShortenU32Sx4;
- cvt2 = Iop_Longen16Ux4;
+ cvt = Iop_QNarrowUn32Sto16Ux4;
+ cvt2 = Iop_Widen16Uto32x4;
break;
case 3:
op = Iop_SarN64x2;
- cvt = Iop_QShortenU64Sx2;
- cvt2 = Iop_Longen32Ux2;
+ cvt = Iop_QNarrowUn64Sto32Ux2;
+ cvt2 = Iop_Widen32Uto64x2;
break;
default:
vassert(0);
@@ -6523,15 +6538,15 @@
switch (size) {
case 0:
op = Iop_ShlN16x8;
- cvt = U ? Iop_Longen8Ux8 : Iop_Longen8Sx8;
+ cvt = U ? Iop_Widen8Uto16x8 : Iop_Widen8Sto16x8;
break;
case 1:
op = Iop_ShlN32x4;
- cvt = U ? Iop_Longen16Ux4 : Iop_Longen16Sx4;
+ cvt = U ? Iop_Widen16Uto32x4 : Iop_Widen16Sto32x4;
break;
case 2:
op = Iop_ShlN64x2;
- cvt = U ? Iop_Longen32Ux2 : Iop_Longen32Sx2;
+ cvt = U ? Iop_Widen32Uto64x2 : Iop_Widen32Sto64x2;
break;
case 3:
return False;
@@ -7340,9 +7355,9 @@
IROp op;
mreg >>= 1;
switch (size) {
- case 0: op = Iop_Shorten16x8; break;
- case 1: op = Iop_Shorten32x4; break;
- case 2: op = Iop_Shorten64x2; break;
+ case 0: op = Iop_NarrowUn16to8x8; break;
+ case 1: op = Iop_NarrowUn32to16x4; break;
+ case 2: op = Iop_NarrowUn64to32x2; break;
case 3: return False;
default: vassert(0);
}
@@ -7359,9 +7374,9 @@
return False;
mreg >>= 1;
switch (size) {
- case 0: op2 = Iop_Shorten16x8; break;
- case 1: op2 = Iop_Shorten32x4; break;
- case 2: op2 = Iop_Shorten64x2; break;
+ case 0: op2 = Iop_NarrowUn16to8x8; break;
+ case 1: op2 = Iop_NarrowUn32to16x4; break;
+ case 2: op2 = Iop_NarrowUn64to32x2; break;
case 3: return False;
default: vassert(0);
}
@@ -7370,9 +7385,9 @@
vassert(0);
case 1:
switch (size) {
- case 0: op = Iop_QShortenU16Sx8; break;
- case 1: op = Iop_QShortenU32Sx4; break;
- case 2: op = Iop_QShortenU64Sx2; break;
+ case 0: op = Iop_QNarrowUn16Sto8Ux8; break;
+ case 1: op = Iop_QNarrowUn32Sto16Ux4; break;
+ case 2: op = Iop_QNarrowUn64Sto32Ux2; break;
case 3: return False;
default: vassert(0);
}
@@ -7380,9 +7395,9 @@
break;
case 2:
switch (size) {
- case 0: op = Iop_QShortenS16Sx8; break;
- case 1: op = Iop_QShortenS32Sx4; break;
- case 2: op = Iop_QShortenS64Sx2; break;
+ case 0: op = Iop_QNarrowUn16Sto8Sx8; break;
+ case 1: op = Iop_QNarrowUn32Sto16Sx4; break;
+ case 2: op = Iop_QNarrowUn64Sto32Sx2; break;
case 3: return False;
default: vassert(0);
}
@@ -7390,9 +7405,9 @@
break;
case 3:
switch (size) {
- case 0: op = Iop_QShortenU16Ux8; break;
- case 1: op = Iop_QShortenU32Ux4; break;
- case 2: op = Iop_QShortenU64Ux2; break;
+ case 0: op = Iop_QNarrowUn16Uto8Ux8; break;
+ case 1: op = Iop_QNarrowUn32Uto16Ux4; break;
+ case 2: op = Iop_QNarrowUn64Uto32Ux2; break;
case 3: return False;
default: vassert(0);
}
@@ -7422,9 +7437,9 @@
shift_imm = 8 << size;
res = newTemp(Ity_V128);
switch (size) {
- case 0: op = Iop_ShlN16x8; cvt = Iop_Longen8Ux8; break;
- case 1: op = Iop_ShlN32x4; cvt = Iop_Longen16Ux4; break;
- case 2: op = Iop_ShlN64x2; cvt = Iop_Longen32Ux2; break;
+ case 0: op = Iop_ShlN16x8; cvt = Iop_Widen8Uto16x8; break;
+ case 1: op = Iop_ShlN32x4; cvt = Iop_Widen16Uto32x4; break;
+ case 2: op = Iop_ShlN64x2; cvt = Iop_Widen32Uto64x2; break;
case 3: return False;
default: vassert(0);
}
@@ -7679,7 +7694,7 @@
break;
case 15:
imm = (imm_raw & 0x80) << 5;
- imm |= ~((imm_raw & 0x40) << 5);
+ imm |= ((~imm_raw & 0x40) << 5);
for(i = 1; i <= 4; i++)
imm |= (imm_raw & 0x40) << i;
imm |= (imm_raw & 0x7f);
@@ -7911,13 +7926,13 @@
/* A7.7 Advanced SIMD element or structure load/store instructions */
static
-Bool dis_neon_elem_or_struct_load ( UInt theInstr,
- Bool isT, IRTemp condT )
+Bool dis_neon_load_or_store ( UInt theInstr,
+ Bool isT, IRTemp condT )
{
# define INSN(_bMax,_bMin) SLICE_UInt(theInstr, (_bMax), (_bMin))
- UInt A = INSN(23,23);
- UInt B = INSN(11,8);
- UInt L = INSN(21,21);
+ UInt bA = INSN(23,23);
+ UInt fB = INSN(11,8);
+ UInt bL = INSN(21,21);
UInt rD = (INSN(22,22) << 4) | INSN(15,12);
UInt rN = INSN(19,16);
UInt rM = INSN(3,0);
@@ -7942,12 +7957,18 @@
IRTemp initialRm = newTemp(Ity_I32);
assign(initialRm, isT ? getIRegT(rM) : getIRegA(rM));
- if (A) {
- N = B & 3;
- if ((B >> 2) < 3) {
- /* VSTn / VLDn (n-element structure from/to one lane) */
+ /* There are 3 cases:
+ (1) VSTn / VLDn (n-element structure from/to one lane)
+ (2) VLDn (single element to all lanes)
+ (3) VSTn / VLDn (multiple n-element structures)
+ */
+ if (bA) {
+ N = fB & 3;
+ if ((fB >> 2) < 3) {
+ /* ------------ Case (1) ------------
+ VSTn / VLDn (n-element structure from/to one lane) */
- size = B >> 2;
+ size = fB >> 2;
switch (size) {
case 0: i = INSN(7,5); inc = 1; break;
@@ -7965,11 +7986,11 @@
mk_skip_over_T32_if_cond_is_false(condT);
// now uncond
- if (L)
+ if (bL)
mk_neon_elem_load_to_one_lane(rD, inc, i, N, size, addr);
else
mk_neon_elem_store_from_one_lane(rD, inc, i, N, size, addr);
- DIP("v%s%u.%u {", L ? "ld" : "st", N + 1, 8 << size);
+ DIP("v%s%u.%u {", bL ? "ld" : "st", N + 1, 8 << size);
for (j = 0; j <= N; j++) {
if (j)
DIP(", ");
@@ -7982,9 +8003,10 @@
DIP("%s\n", (rM != 15) ? "!" : "");
}
} else {
- /* VLDn (single element to all lanes) */
+ /* ------------ Case (2) ------------
+ VLDn (single element to all lanes) */
UInt r;
- if (L == 0)
+ if (bL == 0)
return False;
inc = INSN(5,5) + 1;
@@ -8100,31 +8122,32 @@
}
return True;
} else {
+ /* ------------ Case (3) ------------
+ VSTn / VLDn (multiple n-element structures) */
IRTemp tmp;
UInt r, elems;
- /* VSTn / VLDn (multiple n-element structures) */
- if (B == BITS4(0,0,1,0) || B == BITS4(0,1,1,0)
- || B == BITS4(0,1,1,1) || B == BITS4(1,0,1,0)) {
+ if (fB == BITS4(0,0,1,0) || fB == BITS4(0,1,1,0)
+ || fB == BITS4(0,1,1,1) || fB == BITS4(1,0,1,0)) {
N = 0;
- } else if (B == BITS4(0,0,1,1) || B == BITS4(1,0,0,0)
- || B == BITS4(1,0,0,1)) {
+ } else if (fB == BITS4(0,0,1,1) || fB == BITS4(1,0,0,0)
+ || fB == BITS4(1,0,0,1)) {
N = 1;
- } else if (B == BITS4(0,1,0,0) || B == BITS4(0,1,0,1)) {
+ } else if (fB == BITS4(0,1,0,0) || fB == BITS4(0,1,0,1)) {
N = 2;
- } else if (B == BITS4(0,0,0,0) || B == BITS4(0,0,0,1)) {
+ } else if (fB == BITS4(0,0,0,0) || fB == BITS4(0,0,0,1)) {
N = 3;
} else {
return False;
}
- inc = (B & 1) + 1;
- if (N == 1 && B == BITS4(0,0,1,1)) {
+ inc = (fB & 1) + 1;
+ if (N == 1 && fB == BITS4(0,0,1,1)) {
regs = 2;
} else if (N == 0) {
- if (B == BITS4(1,0,1,0)) {
+ if (fB == BITS4(1,0,1,0)) {
regs = 2;
- } else if (B == BITS4(0,1,1,0)) {
+ } else if (fB == BITS4(0,1,1,0)) {
regs = 3;
- } else if (B == BITS4(0,0,1,0)) {
+ } else if (fB == BITS4(0,0,1,0)) {
regs = 4;
}
}
@@ -8147,7 +8170,7 @@
for (r = 0; r < regs; r++) {
for (i = 0; i < elems; i++) {
- if (L)
+ if (bL)
mk_neon_elem_load_to_one_lane(rD + r, inc, i, N, size, addr);
else
mk_neon_elem_store_from_one_lane(rD + r, inc, i, N, size, addr);
@@ -8177,7 +8200,7 @@
putIRegA(rN, e, IRTemp_INVALID, Ijk_Boring);
}
}
- DIP("v%s%u.%u {", L ? "ld" : "st", N + 1, 8 << INSN(7,6));
+ DIP("v%s%u.%u {", bL ? "ld" : "st", N + 1, 8 << INSN(7,6));
if ((inc == 1 && regs * (N + 1) > 1)
|| (inc == 2 && regs > 1 && N > 0)) {
DIP("d%u-d%u", rD, rD + regs * (N + 1) - 1);
@@ -8269,12 +8292,12 @@
*/
if (!isT && INSN(31,24) == BITS8(1,1,1,1,0,1,0,0)) {
// ARM, memory
- return dis_neon_elem_or_struct_load(INSN(31,0), isT, condT);
+ return dis_neon_load_or_store(INSN(31,0), isT, condT);
}
if (isT && INSN(31,24) == BITS8(1,1,1,1,1,0,0,1)) {
UInt reformatted = INSN(23,0);
reformatted |= (BITS8(1,1,1,1,0,1,0,0) << 24);
- return dis_neon_elem_or_struct_load(reformatted, isT, condT);
+ return dis_neon_load_or_store(reformatted, isT, condT);
}
/* Doesn't match. */
@@ -10211,6 +10234,7 @@
UInt regList )
{
Int i, r, m, nRegs;
+ IRTemp jk = Ijk_Boring;
/* Get hold of the old Rn value. We might need to write its value
to memory during a store, and if it's also the writeback
@@ -10337,6 +10361,15 @@
}
}
+ /* According to the Cortex A8 TRM Sec. 5.2.1, LDM(1) with r13 as the base
+ register and PC in the register list is a return for purposes of branch
+ prediction.
+ The ARM ARM Sec. C9.10.1 further specifies that writeback must be enabled
+ to be counted in event 0x0E (Procedure return).*/
+ if (rN == 13 && bL == 1 && bINC && !bBEFORE && bW == 1) {
+ jk = Ijk_Ret;
+ }
+
/* Actually generate the transfers */
for (i = 0; i < nX; i++) {
r = xReg[i];
@@ -10345,7 +10378,7 @@
binop(opADDorSUB, mkexpr(anchorT),
mkU32(xOff[i])));
if (arm) {
- putIRegA( r, e, IRTemp_INVALID, Ijk_Ret );
+ putIRegA( r, e, IRTemp_INVALID, jk );
} else {
// no: putIRegT( r, e, IRTemp_INVALID );
// putIRegT refuses to write to R15. But that might happen.
@@ -11968,6 +12001,16 @@
break;
}
+ /* ------------------- CLREX ------------------ */
+ if (insn == 0xF57FF01F) {
+ /* AFAICS, this simply cancels a (all?) reservations made by a
+ (any?) preceding LDREX(es). Arrange to hand it through to
+ the back end. */
+ stmt( IRStmt_MBE(Imbe_CancelReservation) );
+ DIP("clrex\n");
+ return True;
+ }
+
/* ------------------- NEON ------------------- */
if (archinfo->hwcaps & VEX_HWCAPS_ARM_NEON) {
Bool ok_neon = decode_NEON_instruction(
@@ -12259,6 +12302,7 @@
case BITS4(1,1,0,1): /* MOV: Rd = shifter_operand */
case BITS4(1,1,1,1): { /* MVN: Rd = not(shifter_operand) */
Bool isMVN = INSN(24,21) == BITS4(1,1,1,1);
+ IRTemp jk = Ijk_Boring;
if (rN != 0)
break; /* rN must be zero */
ok = mk_shifter_operand(
@@ -12277,8 +12321,13 @@
} else {
vassert(shco == IRTemp_INVALID);
}
+ /* According to the Cortex A8 TRM Sec. 5.2.1, MOV PC, r14 is a
+ return for purposes of branch prediction. */
+ if (!isMVN && INSN(11,0) == 14) {
+ jk = Ijk_Ret;
+ }
// can't safely read guest state after here
- putIRegA( rD, mkexpr(res), condT, Ijk_Boring );
+ putIRegA( rD, mkexpr(res), condT, jk );
/* Update the flags thunk if necessary */
if (bitS) {
setFlags_D1_D2_ND( ARMG_CC_OP_LOGIC,
@@ -12582,8 +12631,18 @@
/* generate the transfer */
if (bB == 0) { // word load
+ IRTemp jk = Ijk_Boring;
+ /* According to the Cortex A8 TRM Sec. 5.2.1, LDR(1) with r13 as the
+ base register and PC as the destination register is a return for
+ purposes of branch prediction.
+ The ARM ARM Sec. C9.10.1 further specifies that it must use a
+ post-increment by immediate addressing mode to be counted in
+ event 0x0E (Procedure return).*/
+ if (rN == 13 && summary == (3 | 16) && bB == 0) {
+ jk = Ijk_Ret;
+ }
putIRegA( rD, loadLE(Ity_I32, mkexpr(taT)),
- IRTemp_INVALID, Ijk_Boring );
+ IRTemp_INVALID, jk );
} else { // byte load
vassert(bB == 1);
putIRegA( rD, unop(Iop_8Uto32, loadLE(Ity_I8, mkexpr(taT))),
@@ -12974,7 +13033,7 @@
stmt( IRStmt_Exit( unop(Iop_32to1, mkexpr(condT)),
jk, IRConst_U32(dst) ));
irsb->next = mkU32(guest_R15_curr_instr_notENC + 4);
- irsb->jumpkind = jk;
+ irsb->jumpkind = Ijk_Boring;
dres.whatNext = Dis_StopHere;
}
DIP("b%s%s 0x%x %s\n", link ? "l" : "", nCC(INSN_COND),
@@ -12989,7 +13048,7 @@
&& INSN(19,12) == BITS8(1,1,1,1,1,1,1,1)
&& (INSN(11,4) == BITS8(1,1,1,1,0,0,1,1)
|| INSN(11,4) == BITS8(1,1,1,1,0,0,0,1))) {
- IRExpr* dst;
+ IRTemp dst = newTemp(Ity_I32);
UInt link = (INSN(11,4) >> 1) & 1;
UInt rM = INSN(3,0);
// we don't decode the case (link && rM == 15), as that's
@@ -13001,12 +13060,12 @@
// rM contains an interworking address exactly as we require
// (with continuation CPSR.T in bit 0), so we can use it
// as-is, with no masking.
- dst = getIRegA(rM);
+ assign( dst, getIRegA(rM) );
if (link) {
putIRegA( 14, mkU32(guest_R15_curr_instr_notENC + 4),
IRTemp_INVALID/*because AL*/, Ijk_Boring );
}
- irsb->next = dst;
+ irsb->next = mkexpr(dst);
irsb->jumpkind = link ? Ijk_Call
: (rM == 14 ? Ijk_Ret : Ijk_Boring);
dres.whatNext = Dis_StopHere;
@@ -13370,52 +13429,107 @@
/* -- ARMv6 instructions -- */
/* ----------------------------------------------------------- */
- /* --------------------- ldrex, strex --------------------- */
+ /* ------------------- {ldr,str}ex{,b,h,d} ------------------- */
- // LDREX
- if (0x01900F9F == (insn & 0x0FF00FFF)) {
- UInt rT = INSN(15,12);
- UInt rN = INSN(19,16);
- if (rT == 15 || rN == 15) {
- /* undecodable; fall through */
+ // LDREXD, LDREX, LDREXH, LDREXB
+ if (0x01900F9F == (insn & 0x0F900FFF)) {
+ UInt rT = INSN(15,12);
+ UInt rN = INSN(19,16);
+ IRType ty = Ity_INVALID;
+ IROp widen = Iop_INVALID;
+ HChar* nm = NULL;
+ Bool valid = True;
+ switch (INSN(22,21)) {
+ case 0: nm = ""; ty = Ity_I32; break;
+ case 1: nm = "d"; ty = Ity_I64; break;
+ case 2: nm = "b"; ty = Ity_I8; widen = Iop_8Uto32; break;
+ case 3: nm = "h"; ty = Ity_I16; widen = Iop_16Uto32; break;
+ default: vassert(0);
+ }
+ if (ty == Ity_I32 || ty == Ity_I16 || ty == Ity_I8) {
+ if (rT == 15 || rN == 15)
+ valid = False;
} else {
+ vassert(ty == Ity_I64);
+ if ((rT & 1) == 1 || rT == 14 || rN == 15)
+ valid = False;
+ }
+ if (valid) {
IRTemp res;
/* make unconditional */
if (condT != IRTemp_INVALID) {
- mk_skip_over_A32_if_cond_is_false( condT );
- condT = IRTemp_INVALID;
+ mk_skip_over_A32_if_cond_is_false( condT );
+ condT = IRTemp_INVALID;
}
/* Ok, now we're unconditional. Do the load. */
- res = newTemp(Ity_I32);
+ res = newTemp(ty);
+ // FIXME: assumes little-endian guest
stmt( IRStmt_LLSC(Iend_LE, res, getIRegA(rN),
NULL/*this is a load*/) );
- putIRegA(rT, mkexpr(res), IRTemp_INVALID, Ijk_Boring);
- DIP("ldrex%s r%u, [r%u]\n", nCC(INSN_COND), rT, rN);
+ if (ty == Ity_I64) {
+ // FIXME: assumes little-endian guest
+ putIRegA(rT+0, unop(Iop_64to32, mkexpr(res)),
+ IRTemp_INVALID, Ijk_Boring);
+ putIRegA(rT+1, unop(Iop_64HIto32, mkexpr(res)),
+ IRTemp_INVALID, Ijk_Boring);
+ DIP("ldrex%s%s r%u, r%u, [r%u]\n",
+ nm, nCC(INSN_COND), rT+0, rT+1, rN);
+ } else {
+ putIRegA(rT, widen == Iop_INVALID
+ ? mkexpr(res) : unop(widen, mkexpr(res)),
+ IRTemp_INVALID, Ijk_Boring);
+ DIP("ldrex%s%s r%u, [r%u]\n", nm, nCC(INSN_COND), rT, rN);
+ }
goto decode_success;
}
- /* fall through */
+ /* undecodable; fall through */
}
- // STREX
- if (0x01800F90 == (insn & 0x0FF00FF0)) {
- UInt rT = INSN(3,0);
- UInt rN = INSN(19,16);
- UInt rD = INSN(15,12);
- if (rT == 15 || rN == 15 || rD == 15
- || rD == rT || rD == rN) {
- /* undecodable; fall through */
+ // STREXD, STREX, STREXH, STREXB
+ if (0x01800F90 == (insn & 0x0F900FF0)) {
+ UInt rT = INSN(3,0);
+ UInt rN = INSN(19,16);
+ UInt rD = INSN(15,12);
+ IRType ty = Ity_INVALID;
+ IROp narrow = Iop_INVALID;
+ HChar* nm = NULL;
+ Bool valid = True;
+ switch (INSN(22,21)) {
+ case 0: nm = ""; ty = Ity_I32; break;
+ case 1: nm = "d"; ty = Ity_I64; break;
+ case 2: nm = "b"; ty = Ity_I8; narrow = Iop_32to8; break;
+ case 3: nm = "h"; ty = Ity_I16; narrow = Iop_32to16; break;
+ default: vassert(0);
+ }
+ if (ty == Ity_I32 || ty == Ity_I16 || ty == Ity_I8) {
+ if (rD == 15 || rN == 15 || rT == 15
+ || rD == rN || rD == rT)
+ valid = False;
} else {
- IRTemp resSC1, resSC32;
-
+ vassert(ty == Ity_I64);
+ if (rD == 15 || (rT & 1) == 1 || rT == 14 || rN == 15
+ || rD == rN || rD == rT || rD == rT+1)
+ valid = False;
+ }
+ if (valid) {
+ IRTemp resSC1, resSC32, data;
/* make unconditional */
if (condT != IRTemp_INVALID) {
mk_skip_over_A32_if_cond_is_false( condT );
condT = IRTemp_INVALID;
}
-
/* Ok, now we're unconditional. Do the store. */
+ data = newTemp(ty);
+ assign(data,
+ ty == Ity_I64
+ // FIXME: assumes little-endian guest
+ ? binop(Iop_32HLto64, getIRegA(rT+1), getIRegA(rT+0))
+ : narrow == Iop_INVALID
+ ? getIRegA(rT)
+ : unop(narrow, getIRegA(rT)));
resSC1 = newTemp(Ity_I1);
- stmt( IRStmt_LLSC(Iend_LE, resSC1, getIRegA(rN), getIRegA(rT)) );
+ // FIXME: assumes little-endian guest
+ stmt( IRStmt_LLSC(Iend_LE, resSC1, getIRegA(rN), mkexpr(data)) );
/* Set rD to 1 on failure, 0 on success. Currently we have
resSC1 == 0 on failure, 1 on success. */
@@ -13425,7 +13539,13 @@
putIRegA(rD, mkexpr(resSC32),
IRTemp_INVALID, Ijk_Boring);
- DIP("strex%s r%u, r%u, [r%u]\n", nCC(INSN_COND), rD, rT, rN);
+ if (ty == Ity_I64) {
+ DIP("strex%s%s r%u, r%u, r%u, [r%u]\n",
+ nm, nCC(INSN_COND), rD, rT, rT+1, rN);
+ } else {
+ DIP("strex%s%s r%u, r%u, [r%u]\n",
+ nm, nCC(INSN_COND), rD, rT, rN);
+ }
goto decode_success;
}
/* fall through */
@@ -13956,69 +14076,6 @@
goto decode_success;
}
- // LDREXD
- if (0x01B00F9F == (insn & 0x0FF00FFF)) {
- UInt rT = INSN(15,12);
- UInt rN = INSN(19,16);
- if ((rT & 1) == 1 || rT == BITS4(1,1,1,0) || rN == 15) {
- /* undecodable; fall through */
- } else {
- IRTemp res;
- /* make unconditional */
- if (condT != IRTemp_INVALID) {
- mk_skip_over_A32_if_cond_is_false( condT );
- condT = IRTemp_INVALID;
- }
- /* Ok, now we're unconditional. Do the load. */
- res = newTemp(Ity_I64);
- stmt( IRStmt_LLSC(Iend_LE, res, getIRegA(rN),
- NULL/*this is a load*/) );
- putIRegA(rT+0, unop(Iop_64HIto32, mkexpr(res)), IRTemp_INVALID, Ijk_Boring);
- putIRegA(rT+1, unop(Iop_64to32, mkexpr(res)), IRTemp_INVALID, Ijk_Boring);
-
- DIP("ldrexd%s r%u, r%u, [r%u]\n", nCC(INSN_COND), rT+0, rT+1, rN);
- goto decode_success;
- }
- /* fall through */
- }
-
- // STREXD
- if (0x01A00F90 == (insn & 0xFF00FF0)) {
- UInt rT = INSN(3,0);
- UInt rD = INSN(15,12);
- UInt rN = INSN(19,16);
- if (rD == 15 || (rT & 1) == 1 || rT == BITS4(1,1,1,0) || rN == 15
- || rD == rN || rD == rT || rD == rT+1) {
- /* undecodable; fall through */
- } else {
- IRTemp data;
- IRTemp resSC1, resSC32;
-
- if (condT != IRTemp_INVALID) {
- mk_skip_over_A32_if_cond_is_false( condT );
- condT = IRTemp_INVALID;
- }
-
- /* Ok, now we're unconditional. Do the store. */
- data = newTemp(Ity_I64);
- assign( data, binop(Iop_32HLto64, getIRegA(rT+0), getIRegA(rT+1)) );
- resSC1 = newTemp(Ity_I1);
- stmt( IRStmt_LLSC(Iend_LE, resSC1, getIRegA(rN), mkexpr(data)) );
-
- /* Set rD to 1 on failure, 0 on success. Currently we have
- resSC1 == 0 on failure, 1 on success. */
- resSC32 = newTemp(Ity_I32);
- assign(resSC32,
- unop(Iop_1Uto32, unop(Iop_Not1, mkexpr(resSC1))));
-
- putIRegA(rD, mkexpr(resSC32),
- IRTemp_INVALID, Ijk_Boring);
- DIP("strexd%s r%u, r%u, r%u, [r%u]\n", nCC(INSN_COND), rD, rT+0, rT+1, rN);
- goto decode_success;
- }
- /* fall through */
- }
-
/* ----------------------------------------------------------- */
/* -- VFP (CP 10, CP 11) instructions (in ARM mode) -- */
/* ----------------------------------------------------------- */
@@ -14103,7 +14160,7 @@
assert here. */
vassert(dres.whatNext == Dis_Continue);
vassert(irsb->next == NULL);
- vassert(irsb->jumpkind = Ijk_Boring);
+ vassert(irsb->jumpkind == Ijk_Boring);
/* If r15 is unconditionally written, terminate the block by
jumping to it. If it's conditionally written, still
terminate the block (a shame, but we can't do side exits to
@@ -14140,6 +14197,8 @@
/*--- Disassemble a single Thumb2 instruction ---*/
/*------------------------------------------------------------*/
+static const UChar it_length_table[256]; /* fwds */
+
/* NB: in Thumb mode we do fetches of regs with getIRegT, which
automagically adds 4 to fetches of r15. However, writes to regs
are done with putIRegT, which disallows writes to r15. Hence any
@@ -14325,8 +14384,8 @@
if (pageoff >= 18) {
/* It's safe to poke about in the 9 halfwords preceding this
insn. So, have a look at them. */
- guaranteedUnconditional = True; /* assume no 'it' insn found, till we do */
-
+ guaranteedUnconditional = True; /* assume no 'it' insn found,
+ till we do */
UShort* hwp = (UShort*)(HWord)pc;
Int i;
for (i = -1; i >= -9; i--) {
@@ -14337,10 +14396,25 @@
== ( pc & 0xFFFFF000 ) );
*/
/* All valid IT instructions must have the form 0xBFxy,
- where x can be anything, but y must be nonzero. */
- if ((hwp[i] & 0xFF00) == 0xBF00 && (hwp[i] & 0xF) != 0) {
- /* might be an 'it' insn. Play safe. */
- guaranteedUnconditional = False;
+ where x can be anything, but y must be nonzero. Find
+ the number of insns covered by it (1 .. 4) and check to
+ see if it can possibly reach up to the instruction in
+ question. Some (x,y) combinations mean UNPREDICTABLE,
+ and the table is constructed to be conservative by
+ returning 4 for those cases, so the analysis is safe
+ even if the code uses unpredictable IT instructions (in
+ which case its authors are nuts, but hey.) */
+ UShort hwp_i = hwp[i];
+ if (UNLIKELY((hwp_i & 0xFF00) == 0xBF00 && (hwp_i & 0xF) != 0)) {
+ /* might be an 'it' insn. */
+ /* # guarded insns */
+ Int n_guarded = (Int)it_length_table[hwp_i & 0xFF];
+ vassert(n_guarded >= 1 && n_guarded <= 4);
+ if (n_guarded * 2 /* # guarded HWs, worst case */
+ > (-(i+1))) /* -(i+1): # remaining HWs after the IT */
+ /* -(i+0) also seems to work, even though I think
+ it's wrong. I don't understand that. */
+ guaranteedUnconditional = False;
break;
}
}
@@ -14901,7 +14975,7 @@
assign( dst, mkU32(guest_R15_curr_instr_notENC + 4) );
}
irsb->next = mkexpr(dst);
- irsb->jumpkind = Ijk_Boring;
+ irsb->jumpkind = rM == 14 ? Ijk_Ret : Ijk_Boring;
dres.whatNext = Dis_StopHere;
DIP("bx r%u (possibly switch to ARM mode)\n", rM);
goto decode_success;
@@ -15040,7 +15114,7 @@
// now uncond
/* non-interworking branch */
irsb->next = binop(Iop_Or32, mkexpr(val), mkU32(1));
- irsb->jumpkind = Ijk_Boring;
+ irsb->jumpkind = rM == 14 ? Ijk_Ret : Ijk_Boring;
dres.whatNext = Dis_StopHere;
}
DIP("mov r%u, r%u\n", rD, rM);
@@ -16003,7 +16077,7 @@
UInt rD = INSN1(11,8);
Bool valid = !isBadRegT(rN) && !isBadRegT(rD);
/* but allow "add.w reg, sp, #constT" */
- if (!valid && rN == 13)
+ if (!valid && rN == 13 && rD != 15)
valid = True;
if (valid) {
IRTemp argL = newTemp(Ity_I32);
@@ -16022,24 +16096,21 @@
}
}
- /* ---------------- (T4) ADDW Rd, Rn, #imm12 -------------- */
+ /* ---------------- (T4) ADDW Rd, Rn, #uimm12 -------------- */
if (INSN0(15,11) == BITS5(1,1,1,1,0)
&& INSN0(9,4) == BITS6(1,0,0,0,0,0)
&& INSN1(15,15) == 0) {
UInt rN = INSN0(3,0);
UInt rD = INSN1(11,8);
Bool valid = !isBadRegT(rN) && !isBadRegT(rD);
- /* but allow "addw reg, sp, #imm12" */
- if (!valid && rN == 13)
+ /* but allow "addw sp, sp, #uimm12" */
+ if (!valid && rD == 13 && rN == 13)
valid = True;
if (valid) {
IRTemp argL = newTemp(Ity_I32);
IRTemp argR = newTemp(Ity_I32);
IRTemp res = newTemp(Ity_I32);
- UInt imm1 = INSN0(10,10);
- UInt imm3 = INSN1(14,12);
- UInt imm8 = INSN1(7,0);
- UInt imm12 = (imm1 << 11) | (imm3 << 8) | imm8;
+ UInt imm12 = (INSN0(10,10) << 11) | (INSN1(14,12) << 8) | INSN1(7,0);
assign(argL, getIRegT(rN));
assign(argR, mkU32(imm12));
assign(res, binop(Iop_Add32, mkexpr(argL), mkexpr(argR)));
@@ -16113,8 +16184,9 @@
UInt rN = INSN0(3,0);
UInt rD = INSN1(11,8);
Bool valid = !isBadRegT(rN) && !isBadRegT(rD);
- /* but allow "sub.w sp, sp, #constT" */
- if (!valid && !isRSB && rN == 13 && rD == 13)
+ /* but allow "sub{s}.w reg, sp, #constT
+ this is (T2) of "SUB (SP minus immediate)" */
+ if (!valid && !isRSB && rN == 13 && rD != 15)
valid = True;
if (valid) {
IRTemp argL = newTemp(Ity_I32);
@@ -16139,14 +16211,15 @@
}
}
- /* -------------- (T4) SUBW Rd, Rn, #imm12 ------------------- */
+ /* -------------- (T4) SUBW Rd, Rn, #uimm12 ------------------- */
if (INSN0(15,11) == BITS5(1,1,1,1,0)
&& INSN0(9,4) == BITS6(1,0,1,0,1,0)
&& INSN1(15,15) == 0) {
UInt rN = INSN0(3,0);
UInt rD = INSN1(11,8);
Bool valid = !isBadRegT(rN) && !isBadRegT(rD);
- if (!valid && rN == 13 && rD == 13)
+ /* but allow "subw sp, sp, #uimm12" */
+ if (!valid && rD == 13 && rN == 13)
valid = True;
if (valid) {
IRTemp argL = newTemp(Ity_I32);
@@ -16162,33 +16235,6 @@
}
}
- /* -------------- (T2) SUB{S}.W Rd, SP, #constT ------------------- */
- if (INSN0(15,11) == BITS5(1,1,1,1,0)
- && INSN0(9,5) == BITS5(0,1,1,0,1)
- && INSN0(3,0) == BITS4(1,1,0,1)
- && INSN1(15,15) == 0) {
- UInt rN = 13; // SP
- UInt rD = INSN1(11,8);
- UInt bS = INSN0(4,4);
- Bool valid = !isBadRegT(rD);
- if (valid) {
- IRTemp argL = newTemp(Ity_I32);
- IRTemp argR = newTemp(Ity_I32);
- IRTemp res = newTemp(Ity_I32);
- UInt imm12 = (INSN0(10,10) << 11) | (INSN1(14,12) << 8) | INSN1(7,0);
- assign(argL, getIRegT(rN));
- assign(argR, mkU32(imm12));
- assign(res, binop(Iop_Sub32, mkexpr(argL), mkexpr(argR)));
- putIRegT(rD, mkexpr(res), condT);
- if (bS == 1) {
- setFlags_D1_D2( ARMG_CC_OP_SUB, argL, argR, condT );
- }
- DIP("sub%s.w r%u, sp, #%u\n",
- bS == 1 ? "s" : "", rD, imm12);
- goto decode_success;
- }
- }
-
/* -------------- (T1) ADC{S}.W Rd, Rn, #constT -------------- */
/* -------------- (T1) SBC{S}.W Rd, Rn, #constT -------------- */
if (INSN0(15,11) == BITS5(1,1,1,1,0)
@@ -16311,14 +16357,16 @@
UInt how = INSN1(5,4);
Bool valid = !isBadRegT(rD) && !isBadRegT(rN) && !isBadRegT(rM);
- /* but allow "add.w reg, sp, reg w/ no shift */
+ /* but allow "add.w reg, sp, reg w/ no shift
+ (T3) "ADD (SP plus register) */
if (!valid && INSN0(8,5) == BITS4(1,0,0,0) // add
- && rN == 13 && imm5 == 0 && how == 0) {
+ && rD != 15 && rN == 13 && imm5 == 0 && how == 0) {
valid = True;
}
- /* also allow "sub.w sp, sp, reg w/ no shift */
- if (!valid && INSN0(8,5) == BITS4(1,1,0,1) // add
- && rD == 13 && rN == 13 && imm5 == 0 && how == 0) {
+ /* also allow "sub.w reg, sp, reg w/ no shift
+ (T1) "SUB (SP minus register) */
+ if (!valid && INSN0(8,5) == BITS4(1,1,0,1) // sub
+ && rD != 15 && rN == 13 && imm5 == 0 && how == 0) {
valid = True;
}
if (valid) {
@@ -16519,7 +16567,6 @@
UInt rM = INSN1(3,0);
UInt bS = INSN0(4,4);
Bool valid = !isBadRegT(rN) && !isBadRegT(rM) && !isBadRegT(rD);
- if (how == 3) valid = False; //ATC
if (valid) {
IRTemp rNt = newTemp(Ity_I32);
IRTemp rMt = newTemp(Ity_I32);
@@ -17842,6 +17889,49 @@
}
}
+ /* --------------- (T1) LDREX{B,H} --------------- */
+ if (INSN0(15,4) == 0xE8D
+ && (INSN1(11,0) == 0xF4F || INSN1(11,0) == 0xF5F)) {
+ UInt rN = INSN0(3,0);
+ UInt rT = INSN1(15,12);
+ Bool isH = INSN1(11,0) == 0xF5F;
+ if (!isBadRegT(rT) && rN != 15) {
+ IRTemp res;
+ // go uncond
+ mk_skip_over_T32_if_cond_is_false( condT );
+ // now uncond
+ res = newTemp(isH ? Ity_I16 : Ity_I8);
+ stmt( IRStmt_LLSC(Iend_LE, res, getIRegT(rN),
+ NULL/*this is a load*/ ));
+ putIRegT(rT, unop(isH ? Iop_16Uto32 : Iop_8Uto32, mkexpr(res)),
+ IRTemp_INVALID);
+ DIP("ldrex%c r%u, [r%u]\n", isH ? 'h' : 'b', rT, rN);
+ goto decode_success;
+ }
+ }
+
+ /* --------------- (T1) LDREXD --------------- */
+ if (INSN0(15,4) == 0xE8D && INSN1(7,0) == 0x7F) {
+ UInt rN = INSN0(3,0);
+ UInt rT = INSN1(15,12);
+ UInt rT2 = INSN1(11,8);
+ if (!isBadRegT(rT) && !isBadRegT(rT2) && rT != rT2 && rN != 15) {
+ IRTemp res;
+ // go uncond
+ mk_skip_over_T32_if_cond_is_false( condT );
+ // now uncond
+ res = newTemp(Ity_I64);
+ // FIXME: assumes little-endian guest
+ stmt( IRStmt_LLSC(Iend_LE, res, getIRegT(rN),
+ NULL/*this is a load*/ ));
+ // FIXME: assumes little-endian guest
+ putIRegT(rT, unop(Iop_64to32, mkexpr(res)), IRTemp_INVALID);
+ putIRegT(rT2, unop(Iop_64HIto32, mkexpr(res)), IRTemp_INVALID);
+ DIP("ldrexd r%u, r%u, [r%u]\n", rT, rT2, rN);
+ goto decode_success;
+ }
+ }
+
/* ----------------- (T1) STREX ----------------- */
if (INSN0(15,4) == 0xE84) {
UInt rN = INSN0(3,0);
@@ -17851,50 +17941,87 @@
if (!isBadRegT(rD) && !isBadRegT(rT) && rN != 15
&& rD != rN && rD != rT) {
IRTemp resSC1, resSC32;
-
// go uncond
mk_skip_over_T32_if_cond_is_false( condT );
// now uncond
-
/* Ok, now we're unconditional. Do the store. */
resSC1 = newTemp(Ity_I1);
stmt( IRStmt_LLSC(Iend_LE,
resSC1,
binop(Iop_Add32, getIRegT(rN), mkU32(imm8 * 4)),
getIRegT(rT)) );
-
/* Set rD to 1 on failure, 0 on success. Currently we have
resSC1 == 0 on failure, 1 on success. */
resSC32 = newTemp(Ity_I32);
assign(resSC32,
unop(Iop_1Uto32, unop(Iop_Not1, mkexpr(resSC1))));
-
putIRegT(rD, mkexpr(resSC32), IRTemp_INVALID);
DIP("strex r%u, r%u, [r%u, #+%u]\n", rD, rT, rN, imm8 * 4);
goto decode_success;
}
}
- /* -------------- read CP15 TPIDRURO register ------------- */
- /* mrc p15, 0, r0, c13, c0, 3 up to
- mrc p15, 0, r14, c13, c0, 3
- */
- /* I don't know whether this is really v7-only. But anyway, we
- have to support it since arm-linux uses TPIDRURO as a thread
- state register. */
- if (INSN0(15,0) == 0xEE1D && INSN1(11,0) == 0xF70) {
- UInt rD = INSN1(15,12);
- if (rD <= 14) {
- /* skip r15, that's too stupid to handle */
- putIRegT(rD, IRExpr_Get(OFFB_TPIDRURO, Ity_I32),
- condT);
- DIP("mrc p15,0, r%u, c13, c0, 3\n", rD);
+ /* --------------- (T1) STREX{B,H} --------------- */
+ if (INSN0(15,4) == 0xE8C
+ && (INSN1(11,4) == 0xF4 || INSN1(11,4) == 0xF5)) {
+ UInt rN = INSN0(3,0);
+ UInt rT = INSN1(15,12);
+ UInt rD = INSN1(3,0);
+ Bool isH = INSN1(11,4) == 0xF5;
+ if (!isBadRegT(rD) && !isBadRegT(rT) && rN != 15
+ && rD != rN && rD != rT) {
+ IRTemp resSC1, resSC32;
+ // go uncond
+ mk_skip_over_T32_if_cond_is_false( condT );
+ // now uncond
+ /* Ok, now we're unconditional. Do the store. */
+ resSC1 = newTemp(Ity_I1);
+ stmt( IRStmt_LLSC(Iend_LE, resSC1, getIRegT(rN),
+ unop(isH ? Iop_32to16 : Iop_32to8,
+ getIRegT(rT))) );
+ /* Set rD to 1 on failure, 0 on success. Currently we have
+ resSC1 == 0 on failure, 1 on success. */
+ resSC32 = newTemp(Ity_I32);
+ assign(resSC32,
+ unop(Iop_1Uto32, unop(Iop_Not1, mkexpr(resSC1))));
+ putIRegT(rD, mkexpr(resSC32), IRTemp_INVALID);
+ DIP("strex%c r%u, r%u, [r%u]\n", isH ? 'h' : 'b', rD, rT, rN);
goto decode_success;
}
}
+ /* ---------------- (T1) STREXD ---------------- */
+ if (INSN0(15,4) == 0xE8C && INSN1(7,4) == BITS4(0,1,1,1)) {
+ UInt rN = INSN0(3,0);
+ UInt rT = INSN1(15,12);
+ UInt rT2 = INSN1(11,8);
+ UInt rD = INSN1(3,0);
+ if (!isBadRegT(rD) && !isBadRegT(rT) && !isBadRegT(rT2)
+ && rN != 15 && rD != rN && rD != rT && rD != rT) {
+ IRTemp resSC1, resSC32, data;
+ // go uncond
+ mk_skip_over_T32_if_cond_is_false( condT );
+ // now uncond
+ /* Ok, now we're unconditional. Do the store. */
+ resSC1 = newTemp(Ity_I1);
+ data = newTemp(Ity_I64);
+ // FIXME: assumes little-endian guest
+ assign(data, binop(Iop_32HLto64, getIRegT(rT2), getIRegT(rT)));
+ // FIXME: assumes little-endian guest
+ stmt( IRStmt_LLSC(Iend_LE, resSC1, getIRegT(rN), mkexpr(data)));
+ /* Set rD to 1 on failure, 0 on success. Currently we have
+ resSC1 == 0 on failure, 1 on success. */
+ resSC32 = newTemp(Ity_I32);
+ assign(resSC32,
+ unop(Iop_1Uto32, unop(Iop_Not1, mkexpr(resSC1))));
+ putIRegT(rD, mkexpr(resSC32), IRTemp_INVALID);
+ DIP("strexd r%u, r%u, r%u, [r%u]\n", rD, rT, rT2, rN);
+ goto decode_success;
+ }
+ }
/* -------------- v7 barrier insns -------------- */
if (INSN0(15,0) == 0xF3BF && (INSN1(15,0) & 0xFF00) == 0x8F00) {
+ /* FIXME: should this be unconditional? */
/* XXX this isn't really right, is it? The generated IR does
them unconditionally. I guess it doesn't matter since it
doesn't do any harm to do them even when the guarding
@@ -17931,6 +18058,41 @@
}
}
+ /* ---------------------- PLD{,W} ---------------------- */
+ if ((INSN0(15,4) & 0xFFD) == 0xF89 && INSN1(15,12) == 0xF) {
+ /* FIXME: should this be unconditional? */
+ /* PLD/PLDW immediate, encoding T1 */
+ UInt rN = INSN0(3,0);
+ UInt bW = INSN0(5,5);
+ UInt imm12 = INSN1(11,0);
+ DIP("pld%s [r%u, #%u]\n", bW ? "w" : "", rN, imm12);
+ goto decode_success;
+ }
+
+ if ((INSN0(15,4) & 0xFFD) == 0xF81 && INSN1(15,8) == 0xFC) {
+ /* FIXME: should this be unconditional? */
+ /* PLD/PLDW immediate, encoding T2 */
+ UInt rN = INSN0(3,0);
+ UInt bW = INSN0(5,5);
+ UInt imm8 = INSN1(7,0);
+ DIP("pld%s [r%u, #-%u]\n", bW ? "w" : "", rN, imm8);
+ goto decode_success;
+ }
+
+ if ((INSN0(15,4) & 0xFFD) == 0xF81 && INSN1(15,6) == 0x3C0) {
+ /* FIXME: should this be unconditional? */
+ /* PLD/PLDW register, encoding T1 */
+ UInt rN = INSN0(3,0);
+ UInt rM = INSN1(3,0);
+ UInt bW = INSN0(5,5);
+ UInt imm2 = INSN1(5,4);
+ if (!isBadRegT(rM)) {
+ DIP("pld%s [r%u, r%u, lsl %d]\n", bW ? "w" : "", rN, rM, imm2);
+ goto decode_success;
+ }
+ /* fall through */
+ }
+
/* -------------- read CP15 TPIDRURO register ------------- */
/* mrc p15, 0, r0, c13, c0, 3 up to
mrc p15, 0, r14, c13, c0, 3
@@ -17938,8 +18100,8 @@
/* I don't know whether this is really v7-only. But anyway, we
have to support it since arm-linux uses TPIDRURO as a thread
state register. */
-
if ((INSN0(15,0) == 0xEE1D) && (INSN1(11,0) == 0x0F70)) {
+ /* FIXME: should this be unconditional? */
UInt rD = INSN1(15,12);
if (!isBadRegT(rD)) {
putIRegT(rD, IRExpr_Get(OFFB_TPIDRURO, Ity_I32), IRTemp_INVALID);
@@ -17949,6 +18111,17 @@
/* fall through */
}
+ /* ------------------- CLREX ------------------ */
+ if (INSN0(15,0) == 0xF3BF && INSN1(15,0) == 0x8F2F) {
+ /* AFAICS, this simply cancels a (all?) reservations made by a
+ (any?) preceding LDREX(es). Arrange to hand it through to
+ the back end. */
+ mk_skip_over_T32_if_cond_is_false( condT );
+ stmt( IRStmt_MBE(Imbe_CancelReservation) );
+ DIP("clrex\n");
+ goto decode_success;
+ }
+
/* ------------------- NOP ------------------ */
if (INSN0(15,0) == 0xF3AF && INSN1(15,0) == 0x8000) {
DIP("nop\n");
@@ -18046,7 +18219,7 @@
assert here. */
vassert(dres.whatNext == Dis_Continue);
vassert(irsb->next == NULL);
- vassert(irsb->jumpkind = Ijk_Boring);
+ vassert(irsb->jumpkind == Ijk_Boring);
/* If r15 is unconditionally written, terminate the block by
jumping to it. If it's conditionally written, still
terminate the block (a shame, but we can't do side exits to
@@ -18083,6 +18256,85 @@
#undef DIS
+/* Helper table for figuring out how many insns an IT insn
+ conditionalises.
+
+ An ITxyz instruction of the format "1011 1111 firstcond mask"
+ conditionalises some number of instructions, as indicated by the
+ following table. A value of zero indicates the instruction is
+ invalid in some way.
+
+ mask = 0 means this isn't an IT instruction
+ fc = 15 (NV) means unpredictable
+
+ The line fc = 14 (AL) is different from the others; there are
+ additional constraints in this case.
+
+ mask(0 .. 15)
+ +--------------------------------
+ fc(0 | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ .. | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 0 2 0 0 0 1 0 0 0 0 0 0 0
+ 15) | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+
+ To be conservative with the analysis, let's rule out the mask = 0
+ case, since that isn't an IT insn at all. But for all the other
+ cases where the table contains zero, that means unpredictable, so
+ let's say 4 to be conservative. Hence we have a safe value for any
+ IT (mask,fc) pair that the CPU would actually identify as an IT
+ instruction. The final table is
+
+ mask(0 .. 15)
+ +--------------------------------
+ fc(0 | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ .. | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 3 4 1 4 3 4 2 4 3 4
+ | 0 4 3 4 2 4 4 4 1 4 4 4 4 4 4 4
+ 15) | 0 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4
+*/
+static const UChar it_length_table[256]
+ = { 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 3, 4, 1, 4, 3, 4, 2, 4, 3, 4,
+ 0, 4, 3, 4, 2, 4, 4, 4, 1, 4, 4, 4, 4, 4, 4, 4,
+ 0, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4
+ };
+
+
/*------------------------------------------------------------*/
/*--- Top-level fn ---*/
/*------------------------------------------------------------*/
diff --git a/main/VEX/priv/guest_generic_bb_to_IR.c b/main/VEX/priv/guest_generic_bb_to_IR.c
index f7dc020..32dca8c 100644
--- a/main/VEX/priv/guest_generic_bb_to_IR.c
+++ b/main/VEX/priv/guest_generic_bb_to_IR.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -42,33 +42,60 @@
/* Forwards .. */
-__attribute__((regparm(2)))
+VEX_REGPARM(2)
static UInt genericg_compute_checksum_4al ( HWord first_w32, HWord n_w32s );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_1 ( HWord first_w32 );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_2 ( HWord first_w32 );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_3 ( HWord first_w32 );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_4 ( HWord first_w32 );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_5 ( HWord first_w32 );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_6 ( HWord first_w32 );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_7 ( HWord first_w32 );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_8 ( HWord first_w32 );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_9 ( HWord first_w32 );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_10 ( HWord first_w32 );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_11 ( HWord first_w32 );
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_12 ( HWord first_w32 );
+VEX_REGPARM(2)
+static ULong genericg_compute_checksum_8al ( HWord first_w64, HWord n_w64s );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_1 ( HWord first_w64 );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_2 ( HWord first_w64 );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_3 ( HWord first_w64 );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_4 ( HWord first_w64 );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_5 ( HWord first_w64 );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_6 ( HWord first_w64 );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_7 ( HWord first_w64 );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_8 ( HWord first_w64 );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_9 ( HWord first_w64 );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_10 ( HWord first_w64 );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_11 ( HWord first_w64 );
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_12 ( HWord first_w64 );
+
/* Small helpers */
static Bool const_False ( void* callback_opaque, Addr64 a ) {
return False;
@@ -85,8 +112,16 @@
dis_instr_fn is the arch-specific fn to disassemble on function; it
is this that does the real work.
- do_self_check indicates that the caller needs a self-checking
- translation.
+ needs_self_check is a callback used to ask the caller which of the
+ extents, if any, a self check is required for. The returned value
+ is a bitmask with a 1 in position i indicating that the i'th extent
+ needs a check. Since there can be at most 3 extents, the returned
+ values must be between 0 and 7.
+
+ The number of extents which did get a self check (0 to 3) is put in
+ n_sc_extents. The caller already knows this because it told us
+ which extents to add checks for, via the needs_self_check callback,
+ but we ship the number back out here for the caller's convenience.
preamble_function is a callback which allows the caller to add
its own IR preamble (following the self-check, if any). May be
@@ -105,27 +140,31 @@
(In fact it's a VgInstrumentClosure.)
*/
-IRSB* bb_to_IR ( /*OUT*/VexGuestExtents* vge,
- /*IN*/ void* callback_opaque,
- /*IN*/ DisOneInstrFn dis_instr_fn,
- /*IN*/ UChar* guest_code,
- /*IN*/ Addr64 guest_IP_bbstart,
- /*IN*/ Bool (*chase_into_ok)(void*,Addr64),
- /*IN*/ Bool host_bigendian,
- /*IN*/ VexArch arch_guest,
- /*IN*/ VexArchInfo* archinfo_guest,
- /*IN*/ VexAbiInfo* abiinfo_both,
- /*IN*/ IRType guest_word_type,
- /*IN*/ Bool do_self_check,
- /*IN*/ Bool (*preamble_function)(void*,IRSB*),
- /*IN*/ Int offB_TISTART,
- /*IN*/ Int offB_TILEN )
+IRSB* bb_to_IR (
+ /*OUT*/VexGuestExtents* vge,
+ /*OUT*/UInt* n_sc_extents,
+ /*IN*/ void* callback_opaque,
+ /*IN*/ DisOneInstrFn dis_instr_fn,
+ /*IN*/ UChar* guest_code,
+ /*IN*/ Addr64 guest_IP_bbstart,
+ /*IN*/ Bool (*chase_into_ok)(void*,Addr64),
+ /*IN*/ Bool host_bigendian,
+ /*IN*/ VexArch arch_guest,
+ /*IN*/ VexArchInfo* archinfo_guest,
+ /*IN*/ VexAbiInfo* abiinfo_both,
+ /*IN*/ IRType guest_word_type,
+ /*IN*/ UInt (*needs_self_check)(void*,VexGuestExtents*),
+ /*IN*/ Bool (*preamble_function)(void*,IRSB*),
+ /*IN*/ Int offB_TISTART,
+ /*IN*/ Int offB_TILEN
+ )
{
Long delta;
Int i, n_instrs, first_stmt_idx;
Bool resteerOK, need_to_put_IP, debug_print;
DisResult dres;
IRStmt* imark;
+ IRStmt* nop;
static Int n_resteers = 0;
Int d_resteers = 0;
Int selfcheck_idx = 0;
@@ -138,11 +177,6 @@
debug_print = toBool(vex_traceflags & VEX_TRACE_FE);
- /* Note: for adler32 to work without % operation for the self
- check, need to limit length of stuff it scans to 5552 bytes.
- Therefore limiting the max bb len to 100 insns seems generously
- conservative. */
-
/* check sanity .. */
vassert(sizeof(HWord) == sizeof(void*));
vassert(vex_control.guest_max_insns >= 1);
@@ -155,6 +189,7 @@
vge->n_used = 1;
vge->base[0] = guest_IP_bbstart;
vge->len[0] = 0;
+ *n_sc_extents = 0;
/* And a new IR superblock to dump the result into. */
irsb = emptyIRSB();
@@ -164,26 +199,21 @@
delta = 0;
n_instrs = 0;
- /* Guest addresses as IRConsts. Used in the two self-checks
- generated. */
- if (do_self_check) {
- guest_IP_bbstart_IRConst
- = guest_word_type==Ity_I32
- ? IRConst_U32(toUInt(guest_IP_bbstart))
- : IRConst_U64(guest_IP_bbstart);
- }
+ /* Guest addresses as IRConsts. Used in self-checks to specify the
+ restart-after-discard point. */
+ guest_IP_bbstart_IRConst
+ = guest_word_type==Ity_I32
+ ? IRConst_U32(toUInt(guest_IP_bbstart))
+ : IRConst_U64(guest_IP_bbstart);
- /* If asked to make a self-checking translation, leave 5 spaces
- in which to put the check statements. We'll fill them in later
- when we know the length and adler32 of the area to check. */
- if (do_self_check) {
- selfcheck_idx = irsb->stmts_used;
- addStmtToIRSB( irsb, IRStmt_NoOp() );
- addStmtToIRSB( irsb, IRStmt_NoOp() );
- addStmtToIRSB( irsb, IRStmt_NoOp() );
- addStmtToIRSB( irsb, IRStmt_NoOp() );
- addStmtToIRSB( irsb, IRStmt_NoOp() );
- }
+ /* Leave 15 spaces in which to put the check statements for a self
+ checking translation (up to 3 extents, and 5 stmts required for
+ each). We won't know until later the extents and checksums of
+ the areas, if any, that need to be checked. */
+ nop = IRStmt_NoOp();
+ selfcheck_idx = irsb->stmts_used;
+ for (i = 0; i < 3 * 5; i++)
+ addStmtToIRSB( irsb, nop );
/* If the caller supplied a function to add its own preamble, use
it now. */
@@ -193,7 +223,7 @@
/* The callback has completed the IR block without any guest
insns being disassembled into it, so just return it at
this point, even if a self-check was requested - as there
- is nothing to self-check. The five self-check no-ops will
+ is nothing to self-check. The 15 self-check no-ops will
still be in place, but they are harmless. */
return irsb;
}
@@ -208,11 +238,6 @@
resteerOK
= toBool(
n_instrs < vex_control.guest_chase_thresh
- /* If making self-checking translations, don't chase
- .. it makes the checks too complicated. We only want
- to scan just one sequence of bytes in the check, not
- a whole bunch. */
- && !do_self_check
/* we can't afford to have a resteer once we're on the
last extent slot. */
&& vge->n_used < 3
@@ -241,8 +266,36 @@
/* Add an instruction-mark statement. We won't know until after
disassembling the instruction how long it instruction is, so
- just put in a zero length and we'll fix it up later. */
- addStmtToIRSB( irsb, IRStmt_IMark( guest_IP_curr_instr, 0 ));
+ just put in a zero length and we'll fix it up later.
+
+ On ARM, the least significant bit of the instr address
+ distinguishes ARM vs Thumb instructions. All instructions
+ actually start on at least 2-aligned addresses. So we need
+ to ignore the bottom bit of the insn address when forming the
+ IMark's address field, but put that bottom bit in the delta
+ field, so that comparisons against guest_R15T for Thumb can
+ be done correctly. By inspecting the delta field,
+ instruction processors can determine whether the instruction
+ was originally Thumb or ARM. For more details of this
+ convention, see comments on definition of guest_R15T in
+ libvex_guest_arm.h. */
+ if (arch_guest == VexArchARM && (guest_IP_curr_instr & (Addr64)1)) {
+ /* Thumb insn => mask out the T bit, but put it in delta */
+ addStmtToIRSB( irsb,
+ IRStmt_IMark(guest_IP_curr_instr & ~(Addr64)1,
+ 0, /* len */
+ 1 /* delta */
+ )
+ );
+ } else {
+ /* All other targets: store IP as-is, and set delta to zero. */
+ addStmtToIRSB( irsb,
+ IRStmt_IMark(guest_IP_curr_instr,
+ 0, /* len */
+ 0 /* delta */
+ )
+ );
+ }
/* for the first insn, the dispatch loop will have set
%IP, but for all the others we have to do it ourselves. */
@@ -375,7 +428,8 @@
done:
/* We're done. The only thing that might need attending to is that
- a self-checking preamble may need to be created.
+ a self-checking preamble may need to be created. If so it gets
+ placed in the 15 slots reserved above.
The scheme is to compute a rather crude checksum of the code
we're making a translation of, and add to the IR a call to a
@@ -384,89 +438,171 @@
match. This is obviously very expensive and considerable
efforts are made to speed it up:
- * the checksum is computed from all the 32-bit words that
- overlap the translated code. That means it could depend on up
- to 3 bytes before and 3 bytes after which aren't part of the
- translated area, and so if those change then we'll
- unnecessarily have to discard and retranslate. This seems
- like a pretty remote possibility and it seems as if the
- benefit of not having to deal with the ends of the range at
- byte precision far outweigh any possible extra translations
- needed.
+ * the checksum is computed from all the naturally aligned
+ host-sized words that overlap the translated code. That means
+ it could depend on up to 7 bytes before and 7 bytes after
+ which aren't part of the translated area, and so if those
+ change then we'll unnecessarily have to discard and
+ retranslate. This seems like a pretty remote possibility and
+ it seems as if the benefit of not having to deal with the ends
+ of the range at byte precision far outweigh any possible extra
+ translations needed.
* there's a generic routine and 12 specialised cases, which
handle the cases of 1 through 12-word lengths respectively.
They seem to cover about 90% of the cases that occur in
practice.
- */
- if (do_self_check) {
- UInt len2check, expected32;
+ We ask the caller, via needs_self_check, which of the 3 vge
+ extents needs a check, and only generate check code for those
+ that do.
+ */
+ {
+ Addr64 base2check;
+ UInt len2check;
+ HWord expectedhW;
IRTemp tistart_tmp, tilen_tmp;
- UInt (*fn_generic)(HWord, HWord) __attribute__((regparm(2)));
- UInt (*fn_spec)(HWord) __attribute__((regparm(1)));
+ HWord VEX_REGPARM(2) (*fn_generic)(HWord, HWord);
+ HWord VEX_REGPARM(1) (*fn_spec)(HWord);
HChar* nm_generic;
HChar* nm_spec;
HWord fn_generic_entry = 0;
HWord fn_spec_entry = 0;
+ UInt host_word_szB = sizeof(HWord);
+ IRType host_word_type = Ity_INVALID;
- vassert(vge->n_used == 1);
- len2check = vge->len[0];
+ VexGuestExtents vge_tmp = *vge;
+ UInt extents_needing_check
+ = needs_self_check(callback_opaque, &vge_tmp);
- /* stay sane */
- vassert(len2check >= 0 && len2check < 1000/*arbitrary*/);
+ if (host_word_szB == 4) host_word_type = Ity_I32;
+ if (host_word_szB == 8) host_word_type = Ity_I64;
+ vassert(host_word_type != Ity_INVALID);
- /* Skip the check if the translation involved zero bytes */
- if (len2check > 0) {
- HWord first_w32 = ((HWord)guest_code) & ~(HWord)3;
- HWord last_w32 = (((HWord)guest_code) + len2check - 1) & ~(HWord)3;
- vassert(first_w32 <= last_w32);
- HWord w32_diff = last_w32 - first_w32;
- vassert(0 == (w32_diff & 3));
- HWord w32s_to_check = (w32_diff + 4) / 4;
- vassert(w32s_to_check > 0 && w32s_to_check < 1004/*arbitrary*//4);
+ vassert(vge->n_used >= 1 && vge->n_used <= 3);
- /* vex_printf("%lx %lx %ld\n", first_w32, last_w32, w32s_to_check); */
+ /* Caller shouldn't claim that nonexistent extents need a
+ check. */
+ vassert((extents_needing_check >> vge->n_used) == 0);
- fn_generic = genericg_compute_checksum_4al;
- nm_generic = "genericg_compute_checksum_4al";
+ for (i = 0; i < vge->n_used; i++) {
+
+ /* Do we need to generate a check for this extent? */
+ if ((extents_needing_check & (1 << i)) == 0)
+ continue;
+
+ /* Tell the caller */
+ (*n_sc_extents)++;
+
+ /* the extent we're generating a check for */
+ base2check = vge->base[i];
+ len2check = vge->len[i];
+
+ /* stay sane */
+ vassert(len2check >= 0 && len2check < 1000/*arbitrary*/);
+
+ /* Skip the check if the translation involved zero bytes */
+ if (len2check == 0)
+ continue;
+
+ HWord first_hW = ((HWord)base2check)
+ & ~(HWord)(host_word_szB-1);
+ HWord last_hW = (((HWord)base2check) + len2check - 1)
+ & ~(HWord)(host_word_szB-1);
+ vassert(first_hW <= last_hW);
+ HWord hW_diff = last_hW - first_hW;
+ vassert(0 == (hW_diff & (host_word_szB-1)));
+ HWord hWs_to_check = (hW_diff + host_word_szB) / host_word_szB;
+ vassert(hWs_to_check > 0
+ && hWs_to_check < 1004/*arbitrary*/ / host_word_szB);
+
+ /* vex_printf("%lx %lx %ld\n", first_hW, last_hW, hWs_to_check); */
+
+ if (host_word_szB == 8) {
+ fn_generic = (VEX_REGPARM(2) HWord(*)(HWord, HWord))
+ genericg_compute_checksum_8al;
+ nm_generic = "genericg_compute_checksum_8al";
+ } else {
+ fn_generic = (VEX_REGPARM(2) HWord(*)(HWord, HWord))
+ genericg_compute_checksum_4al;
+ nm_generic = "genericg_compute_checksum_4al";
+ }
+
fn_spec = NULL;
nm_spec = NULL;
- switch (w32s_to_check) {
- case 1: fn_spec = genericg_compute_checksum_4al_1;
- nm_spec = "genericg_compute_checksum_4al_1"; break;
- case 2: fn_spec = genericg_compute_checksum_4al_2;
- nm_spec = "genericg_compute_checksum_4al_2"; break;
- case 3: fn_spec = genericg_compute_checksum_4al_3;
- nm_spec = "genericg_compute_checksum_4al_3"; break;
- case 4: fn_spec = genericg_compute_checksum_4al_4;
- nm_spec = "genericg_compute_checksum_4al_4"; break;
- case 5: fn_spec = genericg_compute_checksum_4al_5;
- nm_spec = "genericg_compute_checksum_4al_5"; break;
- case 6: fn_spec = genericg_compute_checksum_4al_6;
- nm_spec = "genericg_compute_checksum_4al_6"; break;
- case 7: fn_spec = genericg_compute_checksum_4al_7;
- nm_spec = "genericg_compute_checksum_4al_7"; break;
- case 8: fn_spec = genericg_compute_checksum_4al_8;
- nm_spec = "genericg_compute_checksum_4al_8"; break;
- case 9: fn_spec = genericg_compute_checksum_4al_9;
- nm_spec = "genericg_compute_checksum_4al_9"; break;
- case 10: fn_spec = genericg_compute_checksum_4al_10;
- nm_spec = "genericg_compute_checksum_4al_10"; break;
- case 11: fn_spec = genericg_compute_checksum_4al_11;
- nm_spec = "genericg_compute_checksum_4al_11"; break;
- case 12: fn_spec = genericg_compute_checksum_4al_12;
- nm_spec = "genericg_compute_checksum_4al_12"; break;
- default: break;
+ if (host_word_szB == 8) {
+ HChar* nm = NULL;
+ ULong VEX_REGPARM(1) (*fn)(HWord) = NULL;
+ switch (hWs_to_check) {
+ case 1: fn = genericg_compute_checksum_8al_1;
+ nm = "genericg_compute_checksum_8al_1"; break;
+ case 2: fn = genericg_compute_checksum_8al_2;
+ nm = "genericg_compute_checksum_8al_2"; break;
+ case 3: fn = genericg_compute_checksum_8al_3;
+ nm = "genericg_compute_checksum_8al_3"; break;
+ case 4: fn = genericg_compute_checksum_8al_4;
+ nm = "genericg_compute_checksum_8al_4"; break;
+ case 5: fn = genericg_compute_checksum_8al_5;
+ nm = "genericg_compute_checksum_8al_5"; break;
+ case 6: fn = genericg_compute_checksum_8al_6;
+ nm = "genericg_compute_checksum_8al_6"; break;
+ case 7: fn = genericg_compute_checksum_8al_7;
+ nm = "genericg_compute_checksum_8al_7"; break;
+ case 8: fn = genericg_compute_checksum_8al_8;
+ nm = "genericg_compute_checksum_8al_8"; break;
+ case 9: fn = genericg_compute_checksum_8al_9;
+ nm = "genericg_compute_checksum_8al_9"; break;
+ case 10: fn = genericg_compute_checksum_8al_10;
+ nm = "genericg_compute_checksum_8al_10"; break;
+ case 11: fn = genericg_compute_checksum_8al_11;
+ nm = "genericg_compute_checksum_8al_11"; break;
+ case 12: fn = genericg_compute_checksum_8al_12;
+ nm = "genericg_compute_checksum_8al_12"; break;
+ default: break;
+ }
+ fn_spec = (VEX_REGPARM(1) HWord(*)(HWord)) fn;
+ nm_spec = nm;
+ } else {
+ HChar* nm = NULL;
+ UInt VEX_REGPARM(1) (*fn)(HWord) = NULL;
+ switch (hWs_to_check) {
+ case 1: fn = genericg_compute_checksum_4al_1;
+ nm = "genericg_compute_checksum_4al_1"; break;
+ case 2: fn = genericg_compute_checksum_4al_2;
+ nm = "genericg_compute_checksum_4al_2"; break;
+ case 3: fn = genericg_compute_checksum_4al_3;
+ nm = "genericg_compute_checksum_4al_3"; break;
+ case 4: fn = genericg_compute_checksum_4al_4;
+ nm = "genericg_compute_checksum_4al_4"; break;
+ case 5: fn = genericg_compute_checksum_4al_5;
+ nm = "genericg_compute_checksum_4al_5"; break;
+ case 6: fn = genericg_compute_checksum_4al_6;
+ nm = "genericg_compute_checksum_4al_6"; break;
+ case 7: fn = genericg_compute_checksum_4al_7;
+ nm = "genericg_compute_checksum_4al_7"; break;
+ case 8: fn = genericg_compute_checksum_4al_8;
+ nm = "genericg_compute_checksum_4al_8"; break;
+ case 9: fn = genericg_compute_checksum_4al_9;
+ nm = "genericg_compute_checksum_4al_9"; break;
+ case 10: fn = genericg_compute_checksum_4al_10;
+ nm = "genericg_compute_checksum_4al_10"; break;
+ case 11: fn = genericg_compute_checksum_4al_11;
+ nm = "genericg_compute_checksum_4al_11"; break;
+ case 12: fn = genericg_compute_checksum_4al_12;
+ nm = "genericg_compute_checksum_4al_12"; break;
+ default: break;
+ }
+ fn_spec = (VEX_REGPARM(1) HWord(*)(HWord))fn;
+ nm_spec = nm;
}
- expected32 = fn_generic( first_w32, w32s_to_check );
+ expectedhW = fn_generic( first_hW, hWs_to_check );
/* If we got a specialised version, check it produces the same
result as the generic version! */
if (fn_spec) {
vassert(nm_spec);
- vassert(expected32 == fn_spec( first_w32 ));
+ vassert(expectedhW == fn_spec( first_hW ));
} else {
vassert(!nm_spec);
}
@@ -478,20 +614,23 @@
tistart_tmp = newIRTemp(irsb->tyenv, guest_word_type);
tilen_tmp = newIRTemp(irsb->tyenv, guest_word_type);
- irsb->stmts[selfcheck_idx+0]
- = IRStmt_WrTmp(tistart_tmp, IRExpr_Const(guest_IP_bbstart_IRConst) );
+ IRConst* base2check_IRConst
+ = guest_word_type==Ity_I32 ? IRConst_U32(toUInt(base2check))
+ : IRConst_U64(base2check);
+ IRConst* len2check_IRConst
+ = guest_word_type==Ity_I32 ? IRConst_U32(len2check)
+ : IRConst_U64(len2check);
- irsb->stmts[selfcheck_idx+1]
- = IRStmt_WrTmp(tilen_tmp,
- guest_word_type==Ity_I32
- ? IRExpr_Const(IRConst_U32(len2check))
- : IRExpr_Const(IRConst_U64(len2check))
- );
+ irsb->stmts[selfcheck_idx + i * 5 + 0]
+ = IRStmt_WrTmp(tistart_tmp, IRExpr_Const(base2check_IRConst) );
- irsb->stmts[selfcheck_idx+2]
+ irsb->stmts[selfcheck_idx + i * 5 + 1]
+ = IRStmt_WrTmp(tilen_tmp, IRExpr_Const(len2check_IRConst) );
+
+ irsb->stmts[selfcheck_idx + i * 5 + 2]
= IRStmt_Put( offB_TISTART, IRExpr_RdTmp(tistart_tmp) );
- irsb->stmts[selfcheck_idx+3]
+ irsb->stmts[selfcheck_idx + i * 5 + 3]
= IRStmt_Put( offB_TILEN, IRExpr_RdTmp(tilen_tmp) );
/* Generate the entry point descriptors */
@@ -516,34 +655,39 @@
IRExpr* callexpr = NULL;
if (fn_spec) {
callexpr = mkIRExprCCall(
- Ity_I32, 1/*regparms*/,
+ host_word_type, 1/*regparms*/,
nm_spec, (void*)fn_spec_entry,
mkIRExprVec_1(
- mkIRExpr_HWord( (HWord)first_w32 )
+ mkIRExpr_HWord( (HWord)first_hW )
)
);
} else {
callexpr = mkIRExprCCall(
- Ity_I32, 2/*regparms*/,
+ host_word_type, 2/*regparms*/,
nm_generic, (void*)fn_generic_entry,
mkIRExprVec_2(
- mkIRExpr_HWord( (HWord)first_w32 ),
- mkIRExpr_HWord( (HWord)w32s_to_check )
+ mkIRExpr_HWord( (HWord)first_hW ),
+ mkIRExpr_HWord( (HWord)hWs_to_check )
)
);
}
- irsb->stmts[selfcheck_idx+4]
+ irsb->stmts[selfcheck_idx + i * 5 + 4]
= IRStmt_Exit(
IRExpr_Binop(
- Iop_CmpNE32,
+ host_word_type==Ity_I64 ? Iop_CmpNE64 : Iop_CmpNE32,
callexpr,
- IRExpr_Const(IRConst_U32(expected32))
+ host_word_type==Ity_I64
+ ? IRExpr_Const(IRConst_U64(expectedhW))
+ : IRExpr_Const(IRConst_U32(expectedhW))
),
Ijk_TInval,
+ /* Where we must restart if there's a failure: at the
+ first extent, regardless of which extent the
+ failure actually happened in. */
guest_IP_bbstart_IRConst
);
- }
+ } /* for (i = 0; i < vge->n_used; i++) */
}
return irsb;
@@ -558,19 +702,19 @@
/* CALLED FROM GENERATED CODE */
/* Compute a checksum of host memory at [addr .. addr+len-1], as fast
- as possible. The _4al_4plus version is assured that the request is
- for 4-aligned memory and for a block of 4 or more long, whilst the
- _generic version must be able to handle any alignment, and lengths
- down to zero too. This fn is called once for every use of a
- self-checking translation, so it needs to be as fast as
- possible. */
+ as possible. All _4al versions assume that the supplied address is
+ 4 aligned. All length values are in 4-byte chunks. These fns
+ arecalled once for every use of a self-checking translation, so
+ they needs to be as fast as possible. */
+
+/* --- 32-bit versions, used only on 32-bit hosts --- */
static inline UInt ROL32 ( UInt w, Int n ) {
w = (w << n) | (w >> (32-n));
return w;
}
-__attribute((regparm(2)))
+VEX_REGPARM(2)
static UInt genericg_compute_checksum_4al ( HWord first_w32, HWord n_w32s )
{
UInt sum1 = 0, sum2 = 0;
@@ -598,7 +742,7 @@
/* Specialised versions of the above function */
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_1 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -609,7 +753,7 @@
return sum1 + sum2;
}
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_2 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -622,7 +766,7 @@
return sum1 + sum2;
}
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_3 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -637,7 +781,7 @@
return sum1 + sum2;
}
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_4 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -651,7 +795,7 @@
return sum1 + sum2;
}
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_5 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -667,7 +811,7 @@
return sum1 + sum2;
}
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_6 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -685,7 +829,7 @@
return sum1 + sum2;
}
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_7 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -705,7 +849,7 @@
return sum1 + sum2;
}
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_8 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -724,7 +868,7 @@
return sum1 + sum2;
}
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_9 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -745,7 +889,7 @@
return sum1 + sum2;
}
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_10 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -768,7 +912,7 @@
return sum1 + sum2;
}
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_11 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -793,7 +937,7 @@
return sum1 + sum2;
}
-__attribute__((regparm(1)))
+VEX_REGPARM(1)
static UInt genericg_compute_checksum_4al_12 ( HWord first_w32 )
{
UInt sum1 = 0, sum2 = 0;
@@ -817,6 +961,261 @@
return sum1 + sum2;
}
+
+/* --- 64-bit versions, used only on 64-bit hosts --- */
+
+static inline ULong ROL64 ( ULong w, Int n ) {
+ w = (w << n) | (w >> (64-n));
+ return w;
+}
+
+VEX_REGPARM(2)
+static ULong genericg_compute_checksum_8al ( HWord first_w64, HWord n_w64s )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ /* unrolled */
+ while (n_w64s >= 4) {
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ p += 4;
+ n_w64s -= 4;
+ sum1 ^= sum2;
+ }
+ while (n_w64s >= 1) {
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ p += 1;
+ n_w64s -= 1;
+ sum1 ^= sum2;
+ }
+ return sum1 + sum2;
+}
+
+/* Specialised versions of the above function */
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_1 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_2 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_3 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_4 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_5 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_6 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_7 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_8 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[7]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_9 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[7]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[8]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_10 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[7]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[8]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[9]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_11 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[7]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[8]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[9]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[10]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+VEX_REGPARM(1)
+static ULong genericg_compute_checksum_8al_12 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[7]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[8]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[9]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[10]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[11]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
/*--------------------------------------------------------------------*/
/*--- end guest_generic_bb_to_IR.c ---*/
/*--------------------------------------------------------------------*/
diff --git a/main/VEX/priv/guest_generic_bb_to_IR.h b/main/VEX/priv/guest_generic_bb_to_IR.h
index 9ea10cb..f623443 100644
--- a/main/VEX/priv/guest_generic_bb_to_IR.h
+++ b/main/VEX/priv/guest_generic_bb_to_IR.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -158,21 +158,24 @@
/* See detailed comment in bb_to_IR.c. */
extern
-IRSB* bb_to_IR ( /*OUT*/VexGuestExtents* vge,
- /*IN*/ void* closure_opaque,
- /*IN*/ DisOneInstrFn dis_instr_fn,
- /*IN*/ UChar* guest_code,
- /*IN*/ Addr64 guest_IP_bbstart,
- /*IN*/ Bool (*chase_into_ok)(void*,Addr64),
- /*IN*/ Bool host_bigendian,
- /*IN*/ VexArch arch_guest,
- /*IN*/ VexArchInfo* archinfo_guest,
- /*IN*/ VexAbiInfo* abiinfo_both,
- /*IN*/ IRType guest_word_type,
- /*IN*/ Bool do_self_check,
- /*IN*/ Bool (*preamble_function)(void*,IRSB*),
- /*IN*/ Int offB_TISTART,
- /*IN*/ Int offB_TILEN );
+IRSB* bb_to_IR (
+ /*OUT*/VexGuestExtents* vge,
+ /*OUT*/UInt* n_sc_extents,
+ /*IN*/ void* callback_opaque,
+ /*IN*/ DisOneInstrFn dis_instr_fn,
+ /*IN*/ UChar* guest_code,
+ /*IN*/ Addr64 guest_IP_bbstart,
+ /*IN*/ Bool (*chase_into_ok)(void*,Addr64),
+ /*IN*/ Bool host_bigendian,
+ /*IN*/ VexArch arch_guest,
+ /*IN*/ VexArchInfo* archinfo_guest,
+ /*IN*/ VexAbiInfo* abiinfo_both,
+ /*IN*/ IRType guest_word_type,
+ /*IN*/ UInt (*needs_self_check)(void*,VexGuestExtents*),
+ /*IN*/ Bool (*preamble_function)(void*,IRSB*),
+ /*IN*/ Int offB_TISTART,
+ /*IN*/ Int offB_TILEN
+ );
#endif /* ndef __VEX_GUEST_GENERIC_BB_TO_IR_H */
diff --git a/main/VEX/priv/guest_generic_x87.c b/main/VEX/priv/guest_generic_x87.c
index 306f660..9c683ab 100644
--- a/main/VEX/priv/guest_generic_x87.c
+++ b/main/VEX/priv/guest_generic_x87.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -717,7 +717,7 @@
switch (imm8) {
case 0x00:
case 0x02: case 0x08: case 0x0A: case 0x0C: case 0x12:
- case 0x1A: case 0x3A: case 0x44: case 0x4A:
+ case 0x1A: case 0x38: case 0x3A: case 0x44: case 0x4A:
break;
default:
return False;
diff --git a/main/VEX/priv/guest_generic_x87.h b/main/VEX/priv/guest_generic_x87.h
index 9cbe23b..997c2c2 100644
--- a/main/VEX/priv/guest_generic_x87.h
+++ b/main/VEX/priv/guest_generic_x87.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/priv/guest_ppc_defs.h b/main/VEX/priv/guest_ppc_defs.h
index dd3c62e..7c8dc8e 100644
--- a/main/VEX/priv/guest_ppc_defs.h
+++ b/main/VEX/priv/guest_ppc_defs.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -126,6 +126,10 @@
/* 11 */ PPCG_FLAG_OP_SRAWI, // srawi
/* 12 */ PPCG_FLAG_OP_SRAD, // srad
/* 13 */ PPCG_FLAG_OP_SRADI, // sradi
+ /* 14 */ PPCG_FLAG_OP_DIVDE, // divdeo
+ /* 15 */ PPCG_FLAG_OP_DIVWEU, // divweuo
+ /* 16 */ PPCG_FLAG_OP_DIVWE, // divweo
+ /* 17 */ PPCG_FLAG_OP_DIVDEU, // divdeuo
PPCG_FLAG_OP_NUMBER
};
diff --git a/main/VEX/priv/guest_ppc_helpers.c b/main/VEX/priv/guest_ppc_helpers.c
index 11aa428..b8a3cd0 100644
--- a/main/VEX/priv/guest_ppc_helpers.c
+++ b/main/VEX/priv/guest_ppc_helpers.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -385,74 +385,74 @@
vex_state->guest_GPR30 = 0;
vex_state->guest_GPR31 = 0;
- vex_state->guest_FPR0 = 0;
- vex_state->guest_FPR1 = 0;
- vex_state->guest_FPR2 = 0;
- vex_state->guest_FPR3 = 0;
- vex_state->guest_FPR4 = 0;
- vex_state->guest_FPR5 = 0;
- vex_state->guest_FPR6 = 0;
- vex_state->guest_FPR7 = 0;
- vex_state->guest_FPR8 = 0;
- vex_state->guest_FPR9 = 0;
- vex_state->guest_FPR10 = 0;
- vex_state->guest_FPR11 = 0;
- vex_state->guest_FPR12 = 0;
- vex_state->guest_FPR13 = 0;
- vex_state->guest_FPR14 = 0;
- vex_state->guest_FPR15 = 0;
- vex_state->guest_FPR16 = 0;
- vex_state->guest_FPR17 = 0;
- vex_state->guest_FPR18 = 0;
- vex_state->guest_FPR19 = 0;
- vex_state->guest_FPR20 = 0;
- vex_state->guest_FPR21 = 0;
- vex_state->guest_FPR22 = 0;
- vex_state->guest_FPR23 = 0;
- vex_state->guest_FPR24 = 0;
- vex_state->guest_FPR25 = 0;
- vex_state->guest_FPR26 = 0;
- vex_state->guest_FPR27 = 0;
- vex_state->guest_FPR28 = 0;
- vex_state->guest_FPR29 = 0;
- vex_state->guest_FPR30 = 0;
- vex_state->guest_FPR31 = 0;
/* Initialise the vector state. */
# define VECZERO(_vr) _vr[0]=_vr[1]=_vr[2]=_vr[3] = 0;
- VECZERO(vex_state->guest_VR0 );
- VECZERO(vex_state->guest_VR1 );
- VECZERO(vex_state->guest_VR2 );
- VECZERO(vex_state->guest_VR3 );
- VECZERO(vex_state->guest_VR4 );
- VECZERO(vex_state->guest_VR5 );
- VECZERO(vex_state->guest_VR6 );
- VECZERO(vex_state->guest_VR7 );
- VECZERO(vex_state->guest_VR8 );
- VECZERO(vex_state->guest_VR9 );
- VECZERO(vex_state->guest_VR10);
- VECZERO(vex_state->guest_VR11);
- VECZERO(vex_state->guest_VR12);
- VECZERO(vex_state->guest_VR13);
- VECZERO(vex_state->guest_VR14);
- VECZERO(vex_state->guest_VR15);
- VECZERO(vex_state->guest_VR16);
- VECZERO(vex_state->guest_VR17);
- VECZERO(vex_state->guest_VR18);
- VECZERO(vex_state->guest_VR19);
- VECZERO(vex_state->guest_VR20);
- VECZERO(vex_state->guest_VR21);
- VECZERO(vex_state->guest_VR22);
- VECZERO(vex_state->guest_VR23);
- VECZERO(vex_state->guest_VR24);
- VECZERO(vex_state->guest_VR25);
- VECZERO(vex_state->guest_VR26);
- VECZERO(vex_state->guest_VR27);
- VECZERO(vex_state->guest_VR28);
- VECZERO(vex_state->guest_VR29);
- VECZERO(vex_state->guest_VR30);
- VECZERO(vex_state->guest_VR31);
+ VECZERO(vex_state->guest_VSR0 );
+ VECZERO(vex_state->guest_VSR1 );
+ VECZERO(vex_state->guest_VSR2 );
+ VECZERO(vex_state->guest_VSR3 );
+ VECZERO(vex_state->guest_VSR4 );
+ VECZERO(vex_state->guest_VSR5 );
+ VECZERO(vex_state->guest_VSR6 );
+ VECZERO(vex_state->guest_VSR7 );
+ VECZERO(vex_state->guest_VSR8 );
+ VECZERO(vex_state->guest_VSR9 );
+ VECZERO(vex_state->guest_VSR10);
+ VECZERO(vex_state->guest_VSR11);
+ VECZERO(vex_state->guest_VSR12);
+ VECZERO(vex_state->guest_VSR13);
+ VECZERO(vex_state->guest_VSR14);
+ VECZERO(vex_state->guest_VSR15);
+ VECZERO(vex_state->guest_VSR16);
+ VECZERO(vex_state->guest_VSR17);
+ VECZERO(vex_state->guest_VSR18);
+ VECZERO(vex_state->guest_VSR19);
+ VECZERO(vex_state->guest_VSR20);
+ VECZERO(vex_state->guest_VSR21);
+ VECZERO(vex_state->guest_VSR22);
+ VECZERO(vex_state->guest_VSR23);
+ VECZERO(vex_state->guest_VSR24);
+ VECZERO(vex_state->guest_VSR25);
+ VECZERO(vex_state->guest_VSR26);
+ VECZERO(vex_state->guest_VSR27);
+ VECZERO(vex_state->guest_VSR28);
+ VECZERO(vex_state->guest_VSR29);
+ VECZERO(vex_state->guest_VSR30);
+ VECZERO(vex_state->guest_VSR31);
+ VECZERO(vex_state->guest_VSR32);
+ VECZERO(vex_state->guest_VSR33);
+ VECZERO(vex_state->guest_VSR34);
+ VECZERO(vex_state->guest_VSR35);
+ VECZERO(vex_state->guest_VSR36);
+ VECZERO(vex_state->guest_VSR37);
+ VECZERO(vex_state->guest_VSR38);
+ VECZERO(vex_state->guest_VSR39);
+ VECZERO(vex_state->guest_VSR40);
+ VECZERO(vex_state->guest_VSR41);
+ VECZERO(vex_state->guest_VSR42);
+ VECZERO(vex_state->guest_VSR43);
+ VECZERO(vex_state->guest_VSR44);
+ VECZERO(vex_state->guest_VSR45);
+ VECZERO(vex_state->guest_VSR46);
+ VECZERO(vex_state->guest_VSR47);
+ VECZERO(vex_state->guest_VSR48);
+ VECZERO(vex_state->guest_VSR49);
+ VECZERO(vex_state->guest_VSR50);
+ VECZERO(vex_state->guest_VSR51);
+ VECZERO(vex_state->guest_VSR52);
+ VECZERO(vex_state->guest_VSR53);
+ VECZERO(vex_state->guest_VSR54);
+ VECZERO(vex_state->guest_VSR55);
+ VECZERO(vex_state->guest_VSR56);
+ VECZERO(vex_state->guest_VSR57);
+ VECZERO(vex_state->guest_VSR58);
+ VECZERO(vex_state->guest_VSR59);
+ VECZERO(vex_state->guest_VSR60);
+ VECZERO(vex_state->guest_VSR61);
+ VECZERO(vex_state->guest_VSR62);
+ VECZERO(vex_state->guest_VSR63);
# undef VECZERO
@@ -542,74 +542,73 @@
vex_state->guest_GPR30 = 0;
vex_state->guest_GPR31 = 0;
- vex_state->guest_FPR0 = 0;
- vex_state->guest_FPR1 = 0;
- vex_state->guest_FPR2 = 0;
- vex_state->guest_FPR3 = 0;
- vex_state->guest_FPR4 = 0;
- vex_state->guest_FPR5 = 0;
- vex_state->guest_FPR6 = 0;
- vex_state->guest_FPR7 = 0;
- vex_state->guest_FPR8 = 0;
- vex_state->guest_FPR9 = 0;
- vex_state->guest_FPR10 = 0;
- vex_state->guest_FPR11 = 0;
- vex_state->guest_FPR12 = 0;
- vex_state->guest_FPR13 = 0;
- vex_state->guest_FPR14 = 0;
- vex_state->guest_FPR15 = 0;
- vex_state->guest_FPR16 = 0;
- vex_state->guest_FPR17 = 0;
- vex_state->guest_FPR18 = 0;
- vex_state->guest_FPR19 = 0;
- vex_state->guest_FPR20 = 0;
- vex_state->guest_FPR21 = 0;
- vex_state->guest_FPR22 = 0;
- vex_state->guest_FPR23 = 0;
- vex_state->guest_FPR24 = 0;
- vex_state->guest_FPR25 = 0;
- vex_state->guest_FPR26 = 0;
- vex_state->guest_FPR27 = 0;
- vex_state->guest_FPR28 = 0;
- vex_state->guest_FPR29 = 0;
- vex_state->guest_FPR30 = 0;
- vex_state->guest_FPR31 = 0;
-
/* Initialise the vector state. */
# define VECZERO(_vr) _vr[0]=_vr[1]=_vr[2]=_vr[3] = 0;
- VECZERO(vex_state->guest_VR0 );
- VECZERO(vex_state->guest_VR1 );
- VECZERO(vex_state->guest_VR2 );
- VECZERO(vex_state->guest_VR3 );
- VECZERO(vex_state->guest_VR4 );
- VECZERO(vex_state->guest_VR5 );
- VECZERO(vex_state->guest_VR6 );
- VECZERO(vex_state->guest_VR7 );
- VECZERO(vex_state->guest_VR8 );
- VECZERO(vex_state->guest_VR9 );
- VECZERO(vex_state->guest_VR10);
- VECZERO(vex_state->guest_VR11);
- VECZERO(vex_state->guest_VR12);
- VECZERO(vex_state->guest_VR13);
- VECZERO(vex_state->guest_VR14);
- VECZERO(vex_state->guest_VR15);
- VECZERO(vex_state->guest_VR16);
- VECZERO(vex_state->guest_VR17);
- VECZERO(vex_state->guest_VR18);
- VECZERO(vex_state->guest_VR19);
- VECZERO(vex_state->guest_VR20);
- VECZERO(vex_state->guest_VR21);
- VECZERO(vex_state->guest_VR22);
- VECZERO(vex_state->guest_VR23);
- VECZERO(vex_state->guest_VR24);
- VECZERO(vex_state->guest_VR25);
- VECZERO(vex_state->guest_VR26);
- VECZERO(vex_state->guest_VR27);
- VECZERO(vex_state->guest_VR28);
- VECZERO(vex_state->guest_VR29);
- VECZERO(vex_state->guest_VR30);
- VECZERO(vex_state->guest_VR31);
+ VECZERO(vex_state->guest_VSR0 );
+ VECZERO(vex_state->guest_VSR1 );
+ VECZERO(vex_state->guest_VSR2 );
+ VECZERO(vex_state->guest_VSR3 );
+ VECZERO(vex_state->guest_VSR4 );
+ VECZERO(vex_state->guest_VSR5 );
+ VECZERO(vex_state->guest_VSR6 );
+ VECZERO(vex_state->guest_VSR7 );
+ VECZERO(vex_state->guest_VSR8 );
+ VECZERO(vex_state->guest_VSR9 );
+ VECZERO(vex_state->guest_VSR10);
+ VECZERO(vex_state->guest_VSR11);
+ VECZERO(vex_state->guest_VSR12);
+ VECZERO(vex_state->guest_VSR13);
+ VECZERO(vex_state->guest_VSR14);
+ VECZERO(vex_state->guest_VSR15);
+ VECZERO(vex_state->guest_VSR16);
+ VECZERO(vex_state->guest_VSR17);
+ VECZERO(vex_state->guest_VSR18);
+ VECZERO(vex_state->guest_VSR19);
+ VECZERO(vex_state->guest_VSR20);
+ VECZERO(vex_state->guest_VSR21);
+ VECZERO(vex_state->guest_VSR22);
+ VECZERO(vex_state->guest_VSR23);
+ VECZERO(vex_state->guest_VSR24);
+ VECZERO(vex_state->guest_VSR25);
+ VECZERO(vex_state->guest_VSR26);
+ VECZERO(vex_state->guest_VSR27);
+ VECZERO(vex_state->guest_VSR28);
+ VECZERO(vex_state->guest_VSR29);
+ VECZERO(vex_state->guest_VSR30);
+ VECZERO(vex_state->guest_VSR31);
+ VECZERO(vex_state->guest_VSR32);
+ VECZERO(vex_state->guest_VSR33);
+ VECZERO(vex_state->guest_VSR34);
+ VECZERO(vex_state->guest_VSR35);
+ VECZERO(vex_state->guest_VSR36);
+ VECZERO(vex_state->guest_VSR37);
+ VECZERO(vex_state->guest_VSR38);
+ VECZERO(vex_state->guest_VSR39);
+ VECZERO(vex_state->guest_VSR40);
+ VECZERO(vex_state->guest_VSR41);
+ VECZERO(vex_state->guest_VSR42);
+ VECZERO(vex_state->guest_VSR43);
+ VECZERO(vex_state->guest_VSR44);
+ VECZERO(vex_state->guest_VSR45);
+ VECZERO(vex_state->guest_VSR46);
+ VECZERO(vex_state->guest_VSR47);
+ VECZERO(vex_state->guest_VSR48);
+ VECZERO(vex_state->guest_VSR49);
+ VECZERO(vex_state->guest_VSR50);
+ VECZERO(vex_state->guest_VSR51);
+ VECZERO(vex_state->guest_VSR52);
+ VECZERO(vex_state->guest_VSR53);
+ VECZERO(vex_state->guest_VSR54);
+ VECZERO(vex_state->guest_VSR55);
+ VECZERO(vex_state->guest_VSR56);
+ VECZERO(vex_state->guest_VSR57);
+ VECZERO(vex_state->guest_VSR58);
+ VECZERO(vex_state->guest_VSR59);
+ VECZERO(vex_state->guest_VSR60);
+ VECZERO(vex_state->guest_VSR61);
+ VECZERO(vex_state->guest_VSR62);
+ VECZERO(vex_state->guest_VSR63);
# undef VECZERO
diff --git a/main/VEX/priv/guest_ppc_toIR.c b/main/VEX/priv/guest_ppc_toIR.c
index f8d220d..8789c12 100644
--- a/main/VEX/priv/guest_ppc_toIR.c
+++ b/main/VEX/priv/guest_ppc_toIR.c
@@ -1,4 +1,5 @@
+
/*--------------------------------------------------------------------*/
/*--- begin guest_ppc_toIR.c ---*/
/*--------------------------------------------------------------------*/
@@ -7,7 +8,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -184,6 +185,11 @@
}
}
+#define SIGN_BIT 0x8000000000000000ULL
+#define SIGN_MASK 0x7fffffffffffffffULL
+#define SIGN_BIT32 0x80000000
+#define SIGN_MASK32 0x7fffffff
+
/*------------------------------------------------------------*/
/*--- Debugging output ---*/
@@ -257,22 +263,60 @@
return toUChar( IFIELD( instr, 21, 5 ) );
}
+/* Extract XT (destination register) field, instr[0,25:21] */
+static UChar ifieldRegXT ( UInt instr )
+{
+ UChar upper_bit = toUChar (IFIELD (instr, 0, 1));
+ UChar lower_bits = toUChar (IFIELD (instr, 21, 5));
+ return (upper_bit << 5) | lower_bits;
+}
+
+/* Extract XS (store source register) field, instr[0,25:21] */
+static inline UChar ifieldRegXS ( UInt instr )
+{
+ return ifieldRegXT ( instr );
+}
+
/* Extract RA (1st source register) field, instr[20:16] */
static UChar ifieldRegA ( UInt instr ) {
return toUChar( IFIELD( instr, 16, 5 ) );
}
+/* Extract XA (1st source register) field, instr[2,20:16] */
+static UChar ifieldRegXA ( UInt instr )
+{
+ UChar upper_bit = toUChar (IFIELD (instr, 2, 1));
+ UChar lower_bits = toUChar (IFIELD (instr, 16, 5));
+ return (upper_bit << 5) | lower_bits;
+}
+
/* Extract RB (2nd source register) field, instr[15:11] */
static UChar ifieldRegB ( UInt instr ) {
return toUChar( IFIELD( instr, 11, 5 ) );
}
+/* Extract XB (2nd source register) field, instr[1,15:11] */
+static UChar ifieldRegXB ( UInt instr )
+{
+ UChar upper_bit = toUChar (IFIELD (instr, 1, 1));
+ UChar lower_bits = toUChar (IFIELD (instr, 11, 5));
+ return (upper_bit << 5) | lower_bits;
+}
+
/* Extract RC (3rd source register) field, instr[10:6] */
static UChar ifieldRegC ( UInt instr ) {
return toUChar( IFIELD( instr, 6, 5 ) );
}
-/* Extract 2nd lowest bit, instr[1] */
+/* Extract XC (3rd source register) field, instr[3,10:6] */
+static UChar ifieldRegXC ( UInt instr )
+{
+ UChar upper_bit = toUChar (IFIELD (instr, 3, 1));
+ UChar lower_bits = toUChar (IFIELD (instr, 6, 5));
+ return (upper_bit << 5) | lower_bits;
+}
+
+/* Extract bit 10, instr[10] */
static UChar ifieldBIT10 ( UInt instr ) {
return toUChar( IFIELD( instr, 10, 1 ) );
}
@@ -297,6 +341,16 @@
return instr & 0x3FFFFFF;
}
+/* Extract DM field, instr[9:8] */
+static UChar ifieldDM ( UInt instr ) {
+ return toUChar( IFIELD( instr, 8, 2 ) );
+}
+
+/* Extract SHW field, instr[9:8] */
+static inline UChar ifieldSHW ( UInt instr )
+{
+ return ifieldDM ( instr );
+}
/*------------------------------------------------------------*/
/*--- Guest-state identifiers ---*/
@@ -506,6 +560,12 @@
return IRExpr_Const(IRConst_U64(i));
}
+static IRExpr* mkV128 ( UShort i )
+{
+ vassert(i == 0 || i == 0xffff);
+ return IRExpr_Const(IRConst_V128(i));
+}
+
/* This generates a normal (non load-linked) load. */
static IRExpr* loadBE ( IRType ty, IRExpr* addr )
{
@@ -600,6 +660,44 @@
binop(Iop_ShrV128, vIn, mkU8(16))) );
}
+/* break V128 to 4xF64's*/
+static void breakV128to4xF64( IRExpr* t128,
+ /*OUTs*/
+ IRTemp* t3, IRTemp* t2,
+ IRTemp* t1, IRTemp* t0 )
+{
+ IRTemp hi64 = newTemp(Ity_I64);
+ IRTemp lo64 = newTemp(Ity_I64);
+
+ vassert(typeOfIRExpr(irsb->tyenv, t128) == Ity_V128);
+ vassert(t0 && *t0 == IRTemp_INVALID);
+ vassert(t1 && *t1 == IRTemp_INVALID);
+ vassert(t2 && *t2 == IRTemp_INVALID);
+ vassert(t3 && *t3 == IRTemp_INVALID);
+ *t0 = newTemp(Ity_F64);
+ *t1 = newTemp(Ity_F64);
+ *t2 = newTemp(Ity_F64);
+ *t3 = newTemp(Ity_F64);
+
+ assign( hi64, unop(Iop_V128HIto64, t128) );
+ assign( lo64, unop(Iop_V128to64, t128) );
+ assign( *t3,
+ unop( Iop_F32toF64,
+ unop( Iop_ReinterpI32asF32,
+ unop( Iop_64HIto32, mkexpr( hi64 ) ) ) ) );
+ assign( *t2,
+ unop( Iop_F32toF64,
+ unop( Iop_ReinterpI32asF32, unop( Iop_64to32, mkexpr( hi64 ) ) ) ) );
+ assign( *t1,
+ unop( Iop_F32toF64,
+ unop( Iop_ReinterpI32asF32,
+ unop( Iop_64HIto32, mkexpr( lo64 ) ) ) ) );
+ assign( *t0,
+ unop( Iop_F32toF64,
+ unop( Iop_ReinterpI32asF32, unop( Iop_64to32, mkexpr( lo64 ) ) ) ) );
+}
+
+
/* break V128 to 4xI32's, then sign-extend to I64's */
static void breakV128to4x64S( IRExpr* t128,
/*OUTs*/
@@ -654,6 +752,33 @@
assign( *t0, unop(Iop_32Uto64, unop(Iop_64to32, mkexpr(lo64))) );
}
+static void breakV128to4x32( IRExpr* t128,
+ /*OUTs*/
+ IRTemp* t3, IRTemp* t2,
+ IRTemp* t1, IRTemp* t0 )
+{
+ IRTemp hi64 = newTemp(Ity_I64);
+ IRTemp lo64 = newTemp(Ity_I64);
+
+ vassert(typeOfIRExpr(irsb->tyenv, t128) == Ity_V128);
+ vassert(t0 && *t0 == IRTemp_INVALID);
+ vassert(t1 && *t1 == IRTemp_INVALID);
+ vassert(t2 && *t2 == IRTemp_INVALID);
+ vassert(t3 && *t3 == IRTemp_INVALID);
+ *t0 = newTemp(Ity_I32);
+ *t1 = newTemp(Ity_I32);
+ *t2 = newTemp(Ity_I32);
+ *t3 = newTemp(Ity_I32);
+
+ assign( hi64, unop(Iop_V128HIto64, t128) );
+ assign( lo64, unop(Iop_V128to64, t128) );
+ assign( *t3, unop(Iop_64HIto32, mkexpr(hi64)) );
+ assign( *t2, unop(Iop_64to32, mkexpr(hi64)) );
+ assign( *t1, unop(Iop_64HIto32, mkexpr(lo64)) );
+ assign( *t0, unop(Iop_64to32, mkexpr(lo64)) );
+}
+
+
/* Signed saturating narrow 64S to 32 */
static IRExpr* mkQNarrow64Sto32 ( IRExpr* t64 )
{
@@ -932,43 +1057,44 @@
}
+/* Floating point egisters are mapped to VSX registers[0..31]. */
static Int floatGuestRegOffset ( UInt archreg )
{
vassert(archreg < 32);
switch (archreg) {
- case 0: return offsetofPPCGuestState(guest_FPR0);
- case 1: return offsetofPPCGuestState(guest_FPR1);
- case 2: return offsetofPPCGuestState(guest_FPR2);
- case 3: return offsetofPPCGuestState(guest_FPR3);
- case 4: return offsetofPPCGuestState(guest_FPR4);
- case 5: return offsetofPPCGuestState(guest_FPR5);
- case 6: return offsetofPPCGuestState(guest_FPR6);
- case 7: return offsetofPPCGuestState(guest_FPR7);
- case 8: return offsetofPPCGuestState(guest_FPR8);
- case 9: return offsetofPPCGuestState(guest_FPR9);
- case 10: return offsetofPPCGuestState(guest_FPR10);
- case 11: return offsetofPPCGuestState(guest_FPR11);
- case 12: return offsetofPPCGuestState(guest_FPR12);
- case 13: return offsetofPPCGuestState(guest_FPR13);
- case 14: return offsetofPPCGuestState(guest_FPR14);
- case 15: return offsetofPPCGuestState(guest_FPR15);
- case 16: return offsetofPPCGuestState(guest_FPR16);
- case 17: return offsetofPPCGuestState(guest_FPR17);
- case 18: return offsetofPPCGuestState(guest_FPR18);
- case 19: return offsetofPPCGuestState(guest_FPR19);
- case 20: return offsetofPPCGuestState(guest_FPR20);
- case 21: return offsetofPPCGuestState(guest_FPR21);
- case 22: return offsetofPPCGuestState(guest_FPR22);
- case 23: return offsetofPPCGuestState(guest_FPR23);
- case 24: return offsetofPPCGuestState(guest_FPR24);
- case 25: return offsetofPPCGuestState(guest_FPR25);
- case 26: return offsetofPPCGuestState(guest_FPR26);
- case 27: return offsetofPPCGuestState(guest_FPR27);
- case 28: return offsetofPPCGuestState(guest_FPR28);
- case 29: return offsetofPPCGuestState(guest_FPR29);
- case 30: return offsetofPPCGuestState(guest_FPR30);
- case 31: return offsetofPPCGuestState(guest_FPR31);
+ case 0: return offsetofPPCGuestState(guest_VSR0);
+ case 1: return offsetofPPCGuestState(guest_VSR1);
+ case 2: return offsetofPPCGuestState(guest_VSR2);
+ case 3: return offsetofPPCGuestState(guest_VSR3);
+ case 4: return offsetofPPCGuestState(guest_VSR4);
+ case 5: return offsetofPPCGuestState(guest_VSR5);
+ case 6: return offsetofPPCGuestState(guest_VSR6);
+ case 7: return offsetofPPCGuestState(guest_VSR7);
+ case 8: return offsetofPPCGuestState(guest_VSR8);
+ case 9: return offsetofPPCGuestState(guest_VSR9);
+ case 10: return offsetofPPCGuestState(guest_VSR10);
+ case 11: return offsetofPPCGuestState(guest_VSR11);
+ case 12: return offsetofPPCGuestState(guest_VSR12);
+ case 13: return offsetofPPCGuestState(guest_VSR13);
+ case 14: return offsetofPPCGuestState(guest_VSR14);
+ case 15: return offsetofPPCGuestState(guest_VSR15);
+ case 16: return offsetofPPCGuestState(guest_VSR16);
+ case 17: return offsetofPPCGuestState(guest_VSR17);
+ case 18: return offsetofPPCGuestState(guest_VSR18);
+ case 19: return offsetofPPCGuestState(guest_VSR19);
+ case 20: return offsetofPPCGuestState(guest_VSR20);
+ case 21: return offsetofPPCGuestState(guest_VSR21);
+ case 22: return offsetofPPCGuestState(guest_VSR22);
+ case 23: return offsetofPPCGuestState(guest_VSR23);
+ case 24: return offsetofPPCGuestState(guest_VSR24);
+ case 25: return offsetofPPCGuestState(guest_VSR25);
+ case 26: return offsetofPPCGuestState(guest_VSR26);
+ case 27: return offsetofPPCGuestState(guest_VSR27);
+ case 28: return offsetofPPCGuestState(guest_VSR28);
+ case 29: return offsetofPPCGuestState(guest_VSR29);
+ case 30: return offsetofPPCGuestState(guest_VSR30);
+ case 31: return offsetofPPCGuestState(guest_VSR31);
default: break;
}
vpanic("floatGuestRegOffset(ppc)"); /*notreached*/
@@ -988,44 +1114,117 @@
stmt( IRStmt_Put(floatGuestRegOffset(archreg), e) );
}
+static Int vsxGuestRegOffset ( UInt archreg )
+{
+ vassert(archreg < 64);
+ switch (archreg) {
+ case 0: return offsetofPPCGuestState(guest_VSR0);
+ case 1: return offsetofPPCGuestState(guest_VSR1);
+ case 2: return offsetofPPCGuestState(guest_VSR2);
+ case 3: return offsetofPPCGuestState(guest_VSR3);
+ case 4: return offsetofPPCGuestState(guest_VSR4);
+ case 5: return offsetofPPCGuestState(guest_VSR5);
+ case 6: return offsetofPPCGuestState(guest_VSR6);
+ case 7: return offsetofPPCGuestState(guest_VSR7);
+ case 8: return offsetofPPCGuestState(guest_VSR8);
+ case 9: return offsetofPPCGuestState(guest_VSR9);
+ case 10: return offsetofPPCGuestState(guest_VSR10);
+ case 11: return offsetofPPCGuestState(guest_VSR11);
+ case 12: return offsetofPPCGuestState(guest_VSR12);
+ case 13: return offsetofPPCGuestState(guest_VSR13);
+ case 14: return offsetofPPCGuestState(guest_VSR14);
+ case 15: return offsetofPPCGuestState(guest_VSR15);
+ case 16: return offsetofPPCGuestState(guest_VSR16);
+ case 17: return offsetofPPCGuestState(guest_VSR17);
+ case 18: return offsetofPPCGuestState(guest_VSR18);
+ case 19: return offsetofPPCGuestState(guest_VSR19);
+ case 20: return offsetofPPCGuestState(guest_VSR20);
+ case 21: return offsetofPPCGuestState(guest_VSR21);
+ case 22: return offsetofPPCGuestState(guest_VSR22);
+ case 23: return offsetofPPCGuestState(guest_VSR23);
+ case 24: return offsetofPPCGuestState(guest_VSR24);
+ case 25: return offsetofPPCGuestState(guest_VSR25);
+ case 26: return offsetofPPCGuestState(guest_VSR26);
+ case 27: return offsetofPPCGuestState(guest_VSR27);
+ case 28: return offsetofPPCGuestState(guest_VSR28);
+ case 29: return offsetofPPCGuestState(guest_VSR29);
+ case 30: return offsetofPPCGuestState(guest_VSR30);
+ case 31: return offsetofPPCGuestState(guest_VSR31);
+ case 32: return offsetofPPCGuestState(guest_VSR32);
+ case 33: return offsetofPPCGuestState(guest_VSR33);
+ case 34: return offsetofPPCGuestState(guest_VSR34);
+ case 35: return offsetofPPCGuestState(guest_VSR35);
+ case 36: return offsetofPPCGuestState(guest_VSR36);
+ case 37: return offsetofPPCGuestState(guest_VSR37);
+ case 38: return offsetofPPCGuestState(guest_VSR38);
+ case 39: return offsetofPPCGuestState(guest_VSR39);
+ case 40: return offsetofPPCGuestState(guest_VSR40);
+ case 41: return offsetofPPCGuestState(guest_VSR41);
+ case 42: return offsetofPPCGuestState(guest_VSR42);
+ case 43: return offsetofPPCGuestState(guest_VSR43);
+ case 44: return offsetofPPCGuestState(guest_VSR44);
+ case 45: return offsetofPPCGuestState(guest_VSR45);
+ case 46: return offsetofPPCGuestState(guest_VSR46);
+ case 47: return offsetofPPCGuestState(guest_VSR47);
+ case 48: return offsetofPPCGuestState(guest_VSR48);
+ case 49: return offsetofPPCGuestState(guest_VSR49);
+ case 50: return offsetofPPCGuestState(guest_VSR50);
+ case 51: return offsetofPPCGuestState(guest_VSR51);
+ case 52: return offsetofPPCGuestState(guest_VSR52);
+ case 53: return offsetofPPCGuestState(guest_VSR53);
+ case 54: return offsetofPPCGuestState(guest_VSR54);
+ case 55: return offsetofPPCGuestState(guest_VSR55);
+ case 56: return offsetofPPCGuestState(guest_VSR56);
+ case 57: return offsetofPPCGuestState(guest_VSR57);
+ case 58: return offsetofPPCGuestState(guest_VSR58);
+ case 59: return offsetofPPCGuestState(guest_VSR59);
+ case 60: return offsetofPPCGuestState(guest_VSR60);
+ case 61: return offsetofPPCGuestState(guest_VSR61);
+ case 62: return offsetofPPCGuestState(guest_VSR62);
+ case 63: return offsetofPPCGuestState(guest_VSR63);
+ default: break;
+ }
+ vpanic("vsxGuestRegOffset(ppc)"); /*notreached*/
+}
+/* Vector registers are mapped to VSX registers[32..63]. */
static Int vectorGuestRegOffset ( UInt archreg )
{
vassert(archreg < 32);
switch (archreg) {
- case 0: return offsetofPPCGuestState(guest_VR0);
- case 1: return offsetofPPCGuestState(guest_VR1);
- case 2: return offsetofPPCGuestState(guest_VR2);
- case 3: return offsetofPPCGuestState(guest_VR3);
- case 4: return offsetofPPCGuestState(guest_VR4);
- case 5: return offsetofPPCGuestState(guest_VR5);
- case 6: return offsetofPPCGuestState(guest_VR6);
- case 7: return offsetofPPCGuestState(guest_VR7);
- case 8: return offsetofPPCGuestState(guest_VR8);
- case 9: return offsetofPPCGuestState(guest_VR9);
- case 10: return offsetofPPCGuestState(guest_VR10);
- case 11: return offsetofPPCGuestState(guest_VR11);
- case 12: return offsetofPPCGuestState(guest_VR12);
- case 13: return offsetofPPCGuestState(guest_VR13);
- case 14: return offsetofPPCGuestState(guest_VR14);
- case 15: return offsetofPPCGuestState(guest_VR15);
- case 16: return offsetofPPCGuestState(guest_VR16);
- case 17: return offsetofPPCGuestState(guest_VR17);
- case 18: return offsetofPPCGuestState(guest_VR18);
- case 19: return offsetofPPCGuestState(guest_VR19);
- case 20: return offsetofPPCGuestState(guest_VR20);
- case 21: return offsetofPPCGuestState(guest_VR21);
- case 22: return offsetofPPCGuestState(guest_VR22);
- case 23: return offsetofPPCGuestState(guest_VR23);
- case 24: return offsetofPPCGuestState(guest_VR24);
- case 25: return offsetofPPCGuestState(guest_VR25);
- case 26: return offsetofPPCGuestState(guest_VR26);
- case 27: return offsetofPPCGuestState(guest_VR27);
- case 28: return offsetofPPCGuestState(guest_VR28);
- case 29: return offsetofPPCGuestState(guest_VR29);
- case 30: return offsetofPPCGuestState(guest_VR30);
- case 31: return offsetofPPCGuestState(guest_VR31);
+ case 0: return offsetofPPCGuestState(guest_VSR32);
+ case 1: return offsetofPPCGuestState(guest_VSR33);
+ case 2: return offsetofPPCGuestState(guest_VSR34);
+ case 3: return offsetofPPCGuestState(guest_VSR35);
+ case 4: return offsetofPPCGuestState(guest_VSR36);
+ case 5: return offsetofPPCGuestState(guest_VSR37);
+ case 6: return offsetofPPCGuestState(guest_VSR38);
+ case 7: return offsetofPPCGuestState(guest_VSR39);
+ case 8: return offsetofPPCGuestState(guest_VSR40);
+ case 9: return offsetofPPCGuestState(guest_VSR41);
+ case 10: return offsetofPPCGuestState(guest_VSR42);
+ case 11: return offsetofPPCGuestState(guest_VSR43);
+ case 12: return offsetofPPCGuestState(guest_VSR44);
+ case 13: return offsetofPPCGuestState(guest_VSR45);
+ case 14: return offsetofPPCGuestState(guest_VSR46);
+ case 15: return offsetofPPCGuestState(guest_VSR47);
+ case 16: return offsetofPPCGuestState(guest_VSR48);
+ case 17: return offsetofPPCGuestState(guest_VSR49);
+ case 18: return offsetofPPCGuestState(guest_VSR50);
+ case 19: return offsetofPPCGuestState(guest_VSR51);
+ case 20: return offsetofPPCGuestState(guest_VSR52);
+ case 21: return offsetofPPCGuestState(guest_VSR53);
+ case 22: return offsetofPPCGuestState(guest_VSR54);
+ case 23: return offsetofPPCGuestState(guest_VSR55);
+ case 24: return offsetofPPCGuestState(guest_VSR56);
+ case 25: return offsetofPPCGuestState(guest_VSR57);
+ case 26: return offsetofPPCGuestState(guest_VSR58);
+ case 27: return offsetofPPCGuestState(guest_VSR59);
+ case 28: return offsetofPPCGuestState(guest_VSR60);
+ case 29: return offsetofPPCGuestState(guest_VSR61);
+ case 30: return offsetofPPCGuestState(guest_VSR62);
+ case 31: return offsetofPPCGuestState(guest_VSR63);
default: break;
}
vpanic("vextorGuestRegOffset(ppc)"); /*notreached*/
@@ -1045,6 +1244,22 @@
stmt( IRStmt_Put(vectorGuestRegOffset(archreg), e) );
}
+/* Get contents of VSX guest register */
+static IRExpr* getVSReg ( UInt archreg )
+{
+ vassert(archreg < 64);
+ return IRExpr_Get( vsxGuestRegOffset(archreg), Ity_V128 );
+}
+
+/* Ditto, but write to a VSX reg instead. */
+static void putVSReg ( UInt archreg, IRExpr* e )
+{
+ vassert(archreg < 64);
+ vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_V128);
+ stmt( IRStmt_Put(vsxGuestRegOffset(archreg), e) );
+}
+
+
static Int guestCR321offset ( UInt cr )
{
switch (cr) {
@@ -1075,6 +1290,69 @@
}
}
+/* Generate an IR sequence to do a popcount operation on the supplied
+ IRTemp, and return a new IRTemp holding the result. 'ty' may be
+ Ity_I32 or Ity_I64 only. */
+static IRTemp gen_POPCOUNT ( IRType ty, IRTemp src )
+{
+ Int i, shift[6];
+ IRTemp mask[6];
+ IRTemp old = IRTemp_INVALID;
+ IRTemp nyu = IRTemp_INVALID;
+
+ vassert(ty == Ity_I64 || ty == Ity_I32);
+
+ if (ty == Ity_I32) {
+ for (i = 0; i < 5; i++) {
+ mask[i] = newTemp(ty);
+ shift[i] = 1 << i;
+ }
+ assign(mask[0], mkU32(0x55555555));
+ assign(mask[1], mkU32(0x33333333));
+ assign(mask[2], mkU32(0x0F0F0F0F));
+ assign(mask[3], mkU32(0x00FF00FF));
+ assign(mask[4], mkU32(0x0000FFFF));
+ old = src;
+ for (i = 0; i < 5; i++) {
+ nyu = newTemp(ty);
+ assign(nyu,
+ binop(Iop_Add32,
+ binop(Iop_And32,
+ mkexpr(old),
+ mkexpr(mask[i])),
+ binop(Iop_And32,
+ binop(Iop_Shr32, mkexpr(old), mkU8(shift[i])),
+ mkexpr(mask[i]))));
+ old = nyu;
+ }
+ return nyu;
+ }
+// else, ty == Ity_I64
+ for (i = 0; i < 6; i++) {
+ mask[i] = newTemp( Ity_I64 );
+ shift[i] = 1 << i;
+ }
+ assign( mask[0], mkU64( 0x5555555555555555ULL ) );
+ assign( mask[1], mkU64( 0x3333333333333333ULL ) );
+ assign( mask[2], mkU64( 0x0F0F0F0F0F0F0F0FULL ) );
+ assign( mask[3], mkU64( 0x00FF00FF00FF00FFULL ) );
+ assign( mask[4], mkU64( 0x0000FFFF0000FFFFULL ) );
+ assign( mask[5], mkU64( 0x00000000FFFFFFFFULL ) );
+ old = src;
+ for (i = 0; i < 6; i++) {
+ nyu = newTemp( Ity_I64 );
+ assign( nyu,
+ binop( Iop_Add64,
+ binop( Iop_And64, mkexpr( old ), mkexpr( mask[i] ) ),
+ binop( Iop_And64,
+ binop( Iop_Shr64, mkexpr( old ), mkU8( shift[i] ) ),
+ mkexpr( mask[i] ) ) ) );
+ old = nyu;
+ }
+ return nyu;
+}
+
+
// ROTL(src32/64, rot_amt5/6)
static IRExpr* /* :: Ity_I32/64 */ ROTL ( IRExpr* src,
IRExpr* rot_amt )
@@ -1400,7 +1678,9 @@
}
-/* Set the CR6 flags following an AltiVec compare operation. */
+/* Set the CR6 flags following an AltiVec compare operation.
+ * NOTE: This also works for VSX single-precision compares.
+ * */
static void set_AV_CR6 ( IRExpr* result, Bool test_all_ones )
{
/* CR6[0:3] = {all_ones, 0, all_zeros, 0}
@@ -1620,6 +1900,28 @@
= binop(Iop_Shr32, xer_ov, mkU8(31) );
break;
+ case PPCG_FLAG_OP_DIVWEU:
+ xer_ov
+ = binop( Iop_Or32,
+ unop( Iop_1Uto32, binop( Iop_CmpEQ32, argR, mkU32( 0 ) ) ),
+ unop( Iop_1Uto32, binop( Iop_CmpLT32U, argR, argL ) ) );
+ break;
+
+ case PPCG_FLAG_OP_DIVWE:
+
+ /* If argR == 0 of if the result cannot fit in the 32-bit destination register,
+ * then OV <- 1. If dest reg is 0 AND both dividend and divisor are non-zero,
+ * an overflow is implied.
+ */
+ xer_ov = binop( Iop_Or32,
+ unop( Iop_1Uto32, binop( Iop_CmpEQ32, argR, mkU32( 0 ) ) ),
+ unop( Iop_1Uto32, mkAND1( binop( Iop_CmpEQ32, res, mkU32( 0 ) ),
+ mkAND1( binop( Iop_CmpNE32, argL, mkU32( 0 ) ),
+ binop( Iop_CmpNE32, argR, mkU32( 0 ) ) ) ) ) );
+ break;
+
+
+
default:
vex_printf("set_XER_OV: op = %u\n", op);
vpanic("set_XER_OV(ppc)");
@@ -1725,6 +2027,26 @@
= unop(Iop_64to1, binop(Iop_Shr64, xer_ov, mkU8(63)));
break;
+ case PPCG_FLAG_OP_DIVDE:
+
+ /* If argR == 0, we must set the OV bit. But there's another condition
+ * where we can get overflow set for divde . . . when the
+ * result cannot fit in the 64-bit destination register. If dest reg is 0 AND
+ * both dividend and divisor are non-zero, it implies an overflow.
+ */
+ xer_ov
+ = mkOR1( binop( Iop_CmpEQ64, argR, mkU64( 0 ) ),
+ mkAND1( binop( Iop_CmpEQ64, res, mkU64( 0 ) ),
+ mkAND1( binop( Iop_CmpNE64, argL, mkU64( 0 ) ),
+ binop( Iop_CmpNE64, argR, mkU64( 0 ) ) ) ) );
+ break;
+
+ case PPCG_FLAG_OP_DIVDEU:
+ /* If argR == 0 or if argL >= argR, set OV. */
+ xer_ov = mkOR1( binop( Iop_CmpEQ64, argR, mkU64( 0 ) ),
+ binop( Iop_CmpLE64U, argR, argL ) );
+ break;
+
default:
vex_printf("set_XER_OV: op = %u\n", op);
vpanic("set_XER_OV(ppc64)");
@@ -2345,7 +2667,220 @@
}
}
+/*------------------------------------------------------------*/
+/* Helpers for VSX instructions that do floating point
+ * operations and need to determine if a src contains a
+ * special FP value.
+ *
+ *------------------------------------------------------------*/
+#define NONZERO_FRAC_MASK 0x000fffffffffffffULL
+#define FP_FRAC_PART(x) binop( Iop_And64, \
+ mkexpr( x ), \
+ mkU64( NONZERO_FRAC_MASK ) )
+
+// Returns exponent part of a single precision floating point as I32
+static IRExpr * fp_exp_part_sp(IRTemp src)
+{
+ return binop( Iop_And32,
+ binop( Iop_Shr32, mkexpr( src ), mkU8( 23 ) ),
+ mkU32( 0xff ) );
+}
+
+// Returns exponent part of floating point as I32
+static IRExpr * fp_exp_part(IRTemp src, Bool sp)
+{
+ IRExpr * exp;
+ if (sp)
+ return fp_exp_part_sp(src);
+
+ if (!mode64)
+ exp = binop( Iop_And32, binop( Iop_Shr32, unop( Iop_64HIto32,
+ mkexpr( src ) ),
+ mkU8( 20 ) ), mkU32( 0x7ff ) );
+ else
+ exp = unop( Iop_64to32,
+ binop( Iop_And64,
+ binop( Iop_Shr64, mkexpr( src ), mkU8( 52 ) ),
+ mkU64( 0x7ff ) ) );
+ return exp;
+}
+
+static IRExpr * is_Inf_sp(IRTemp src)
+{
+ IRTemp frac_part = newTemp(Ity_I32);
+ IRExpr * Inf_exp;
+
+ assign( frac_part, binop( Iop_And32, mkexpr(src), mkU32(0x007fffff)) );
+ Inf_exp = binop( Iop_CmpEQ32, fp_exp_part( src, True /*single precision*/ ), mkU32( 0xff ) );
+ return mkAND1( Inf_exp, binop( Iop_CmpEQ32, mkexpr( frac_part ), mkU32( 0 ) ) );
+}
+
+
+// Infinity: exp = 7ff and fraction is zero; s = 0/1
+static IRExpr * is_Inf(IRTemp src, Bool sp)
+{
+ IRExpr * Inf_exp, * hi32, * low32;
+ IRTemp frac_part;
+
+ if (sp)
+ return is_Inf_sp(src);
+
+ frac_part = newTemp(Ity_I64);
+ assign( frac_part, FP_FRAC_PART(src) );
+ Inf_exp = binop( Iop_CmpEQ32, fp_exp_part( src, False /*not single precision*/ ), mkU32( 0x7ff ) );
+ hi32 = unop( Iop_64HIto32, mkexpr( frac_part ) );
+ low32 = unop( Iop_64to32, mkexpr( frac_part ) );
+ return mkAND1( Inf_exp, binop( Iop_CmpEQ32, binop( Iop_Or32, low32, hi32 ),
+ mkU32( 0 ) ) );
+}
+
+static IRExpr * is_Zero_sp(IRTemp src)
+{
+ IRTemp sign_less_part = newTemp(Ity_I32);
+ assign( sign_less_part, binop( Iop_And32, mkexpr( src ), mkU32( SIGN_MASK32 ) ) );
+ return binop( Iop_CmpEQ32, mkexpr( sign_less_part ), mkU32( 0 ) );
+}
+
+// Zero: exp is zero and fraction is zero; s = 0/1
+static IRExpr * is_Zero(IRTemp src, Bool sp)
+{
+ IRExpr * hi32, * low32;
+ IRTemp sign_less_part;
+ if (sp)
+ return is_Zero_sp(src);
+
+ sign_less_part = newTemp(Ity_I64);
+
+ assign( sign_less_part, binop( Iop_And64, mkexpr( src ), mkU64( SIGN_MASK ) ) );
+ hi32 = unop( Iop_64HIto32, mkexpr( sign_less_part ) );
+ low32 = unop( Iop_64to32, mkexpr( sign_less_part ) );
+ return binop( Iop_CmpEQ32, binop( Iop_Or32, low32, hi32 ),
+ mkU32( 0 ) );
+}
+
+/* SNAN: s = 1/0; exp = 0x7ff; fraction is nonzero, with highest bit '1'
+ * QNAN: s = 1/0; exp = 0x7ff; fraction is nonzero, with highest bit '0'
+ * This function returns an IRExpr value of '1' for any type of NaN.
+ */
+static IRExpr * is_NaN(IRTemp src)
+{
+ IRExpr * NaN_exp, * hi32, * low32;
+ IRTemp frac_part = newTemp(Ity_I64);
+
+ assign( frac_part, FP_FRAC_PART(src) );
+ hi32 = unop( Iop_64HIto32, mkexpr( frac_part ) );
+ low32 = unop( Iop_64to32, mkexpr( frac_part ) );
+ NaN_exp = binop( Iop_CmpEQ32, fp_exp_part( src, False /*not single precision*/ ),
+ mkU32( 0x7ff ) );
+
+ return mkAND1( NaN_exp, binop( Iop_CmpNE32, binop( Iop_Or32, low32, hi32 ),
+ mkU32( 0 ) ) );
+}
+
+/* This function returns an IRExpr value of '1' for any type of NaN.
+ * The passed 'src' argument is assumed to be Ity_I32.
+ */
+static IRExpr * is_NaN_32(IRTemp src)
+{
+#define NONZERO_FRAC_MASK32 0x007fffffULL
+#define FP_FRAC_PART32(x) binop( Iop_And32, \
+ mkexpr( x ), \
+ mkU32( NONZERO_FRAC_MASK32 ) )
+
+ IRExpr * frac_part = FP_FRAC_PART32(src);
+ IRExpr * exp_part = binop( Iop_And32,
+ binop( Iop_Shr32, mkexpr( src ), mkU8( 23 ) ),
+ mkU32( 0x0ff ) );
+ IRExpr * NaN_exp = binop( Iop_CmpEQ32, exp_part, mkU32( 0xff ) );
+
+ return mkAND1( NaN_exp, binop( Iop_CmpNE32, frac_part, mkU32( 0 ) ) );
+}
+
+/* This helper function performs the negation part of operations of the form:
+ * "Negate Multiply-<op>"
+ * where "<op>" is either "Add" or "Sub".
+ *
+ * This function takes one argument -- the floating point intermediate result (converted to
+ * Ity_I64 via Iop_ReinterpF64asI64) that was obtained from the "Multip-<op>" part of
+ * the operation described above.
+ */
+static IRTemp getNegatedResult(IRTemp intermediateResult)
+{
+ ULong signbit_mask = 0x8000000000000000ULL;
+ IRTemp signbit_32 = newTemp(Ity_I32);
+ IRTemp resultantSignbit = newTemp(Ity_I1);
+ IRTemp negatedResult = newTemp(Ity_I64);
+ assign( signbit_32, binop( Iop_Shr32,
+ unop( Iop_64HIto32,
+ binop( Iop_And64, mkexpr( intermediateResult ),
+ mkU64( signbit_mask ) ) ),
+ mkU8( 31 ) ) );
+ /* We negate the signbit if and only if the intermediate result from the
+ * multiply-<op> was NOT a NaN. This is an XNOR predicate.
+ */
+ assign( resultantSignbit,
+ unop( Iop_Not1,
+ binop( Iop_CmpEQ32,
+ binop( Iop_Xor32,
+ mkexpr( signbit_32 ),
+ unop( Iop_1Uto32, is_NaN( intermediateResult ) ) ),
+ mkU32( 1 ) ) ) );
+
+ assign( negatedResult,
+ binop( Iop_Or64,
+ binop( Iop_And64,
+ mkexpr( intermediateResult ),
+ mkU64( ~signbit_mask ) ),
+ binop( Iop_32HLto64,
+ binop( Iop_Shl32,
+ unop( Iop_1Uto32, mkexpr( resultantSignbit ) ),
+ mkU8( 31 ) ),
+ mkU32( 0 ) ) ) );
+
+ return negatedResult;
+}
+
+/* This helper function performs the negation part of operations of the form:
+ * "Negate Multiply-<op>"
+ * where "<op>" is either "Add" or "Sub".
+ *
+ * This function takes one argument -- the floating point intermediate result (converted to
+ * Ity_I32 via Iop_ReinterpF32asI32) that was obtained from the "Multip-<op>" part of
+ * the operation described above.
+ */
+static IRTemp getNegatedResult_32(IRTemp intermediateResult)
+{
+ UInt signbit_mask = 0x80000000;
+ IRTemp signbit_32 = newTemp(Ity_I32);
+ IRTemp resultantSignbit = newTemp(Ity_I1);
+ IRTemp negatedResult = newTemp(Ity_I32);
+ assign( signbit_32, binop( Iop_Shr32,
+ binop( Iop_And32, mkexpr( intermediateResult ),
+ mkU32( signbit_mask ) ),
+ mkU8( 31 ) ) );
+ /* We negate the signbit if and only if the intermediate result from the
+ * multiply-<op> was NOT a NaN. This is an XNOR predicate.
+ */
+ assign( resultantSignbit,
+ unop( Iop_Not1,
+ binop( Iop_CmpEQ32,
+ binop( Iop_Xor32,
+ mkexpr( signbit_32 ),
+ unop( Iop_1Uto32, is_NaN_32( intermediateResult ) ) ),
+ mkU32( 1 ) ) ) );
+
+ assign( negatedResult,
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ mkexpr( intermediateResult ),
+ mkU32( ~signbit_mask ) ),
+ binop( Iop_Shl32,
+ unop( Iop_1Uto32, mkexpr( resultantSignbit ) ),
+ mkU8( 31 ) ) ) );
+
+ return negatedResult;
+}
/*------------------------------------------------------------*/
/*--- Integer Instruction Translation --- */
@@ -2867,6 +3402,106 @@
break;
/* Note: ditto comment divd, for (x / 0) */
+ case 0x18B: // divweu (Divide Word Extended Unsigned)
+ {
+ /*
+ * If (RA) >= (RB), or if an attempt is made to perform the division
+ * <anything> / 0
+ * then the contents of register RD are undefined as are (if Rc=1) the contents of
+ * the LT, GT, and EQ bits of CR Field 0. In these cases, if OE=1 then OV is set
+ * to 1.
+ */
+ IRTemp res = newTemp(Ity_I32);
+ IRExpr * dividend, * divisor;
+ DIP("divweu%s%s r%u,r%u,r%u\n",
+ flag_OE ? "o" : "", flag_rC ? ".":"",
+ rD_addr, rA_addr, rB_addr);
+ if (mode64) {
+ dividend = unop( Iop_64to32, mkexpr( rA ) );
+ divisor = unop( Iop_64to32, mkexpr( rB ) );
+ assign( res, binop( Iop_DivU32E, dividend, divisor ) );
+ assign( rD, binop( Iop_32HLto64, mkU32( 0 ), mkexpr( res ) ) );
+ } else {
+ dividend = mkexpr( rA );
+ divisor = mkexpr( rB );
+ assign( res, binop( Iop_DivU32E, dividend, divisor ) );
+ assign( rD, mkexpr( res) );
+ }
+
+ if (flag_OE) {
+ set_XER_OV_32( PPCG_FLAG_OP_DIVWEU,
+ mkexpr(res), dividend, divisor );
+ }
+ break;
+ }
+
+ case 0x1AB: // divwe (Divide Word Extended)
+ {
+ /*
+ * If the quotient cannot be represented in 32 bits, or if an
+ * attempt is made to perform the division
+ * <anything> / 0
+ * then the contents of register RD are undefined as are (if
+ * Rc=1) the contents of the LT, GT, and EQ bits of CR
+ * Field 0. In these cases, if OE=1 then OV is set to 1.
+ */
+
+ IRTemp res = newTemp(Ity_I32);
+ IRExpr * dividend, * divisor;
+ DIP("divwe%s%s r%u,r%u,r%u\n",
+ flag_OE ? "o" : "", flag_rC ? ".":"",
+ rD_addr, rA_addr, rB_addr);
+ if (mode64) {
+ dividend = unop( Iop_64to32, mkexpr( rA ) );
+ divisor = unop( Iop_64to32, mkexpr( rB ) );
+ assign( res, binop( Iop_DivS32E, dividend, divisor ) );
+ assign( rD, binop( Iop_32HLto64, mkU32( 0 ), mkexpr( res ) ) );
+ } else {
+ dividend = mkexpr( rA );
+ divisor = mkexpr( rB );
+ assign( res, binop( Iop_DivS32E, dividend, divisor ) );
+ assign( rD, mkexpr( res) );
+ }
+
+ if (flag_OE) {
+ set_XER_OV_32( PPCG_FLAG_OP_DIVWE,
+ mkexpr(res), dividend, divisor );
+ }
+ break;
+ }
+
+
+ case 0x1A9: // divde (Divide Doubleword Extended)
+ /*
+ * If the quotient cannot be represented in 64 bits, or if an
+ * attempt is made to perform the division
+ * <anything> / 0
+ * then the contents of register RD are undefined as are (if
+ * Rc=1) the contents of the LT, GT, and EQ bits of CR
+ * Field 0. In these cases, if OE=1 then OV is set to 1.
+ */
+ DIP("divde%s%s r%u,r%u,r%u\n",
+ flag_OE ? "o" : "", flag_rC ? ".":"",
+ rD_addr, rA_addr, rB_addr);
+ assign( rD, binop(Iop_DivS64E, mkexpr(rA), mkexpr(rB)) );
+ if (flag_OE) {
+ set_XER_OV_64( PPCG_FLAG_OP_DIVDE, mkexpr( rD ),
+ mkexpr( rA ), mkexpr( rB ) );
+ }
+ break;
+
+ case 0x189: // divdeuo (Divide Doubleword Extended Unsigned)
+ // Same CR and OV rules as given for divweu above
+ DIP("divdeu%s%s r%u,r%u,r%u\n",
+ flag_OE ? "o" : "", flag_rC ? ".":"",
+ rD_addr, rA_addr, rB_addr);
+ assign( rD, binop(Iop_DivU64E, mkexpr(rA), mkexpr(rB)) );
+ if (flag_OE) {
+ set_XER_OV_64( PPCG_FLAG_OP_DIVDEU, mkexpr( rD ),
+ mkexpr( rA ), mkexpr( rB ) );
+ }
+ break;
+
default:
vex_printf("dis_int_arith(ppc)(opc2)\n");
return False;
@@ -3075,7 +3710,7 @@
/* X Form */
case 0x1F:
- do_rc = True; // All below record to CR
+ do_rc = True; // All below record to CR, except for where we return at case end.
switch (opc2) {
case 0x01C: // and (AND, PPC32 p356)
@@ -3264,6 +3899,88 @@
putFReg( rS_addr, mkexpr(frA));
return True;
}
+ case 0x1FA: // popcntd (population count doubleword
+ {
+ DIP("popcntd r%u,r%u\n", rA_addr, rS_addr);
+ IRTemp result = gen_POPCOUNT(ty, rS);
+ putIReg( rA_addr, mkexpr(result) );
+ return True;
+ }
+ case 0x17A: // popcntw (Population Count Words)
+ {
+ DIP("popcntw r%u,r%u\n", rA_addr, rS_addr);
+ if (mode64) {
+ IRTemp resultHi, resultLo;
+ IRTemp argLo = newTemp(Ity_I32);
+ IRTemp argHi = newTemp(Ity_I32);
+ assign(argLo, unop(Iop_64to32, mkexpr(rS)));
+ assign(argHi, unop(Iop_64HIto32, mkexpr(rS)));
+ resultLo = gen_POPCOUNT(Ity_I32, argLo);
+ resultHi = gen_POPCOUNT(Ity_I32, argHi);
+ putIReg( rA_addr, binop(Iop_32HLto64, mkexpr(resultHi), mkexpr(resultLo)));
+ } else {
+ IRTemp result = gen_POPCOUNT(ty, rS);
+ putIReg( rA_addr, mkexpr(result) );
+ }
+ return True;
+ }
+ case 0x0FC: // bpermd (Bit Permute Doubleword)
+ {
+ /* This is a lot of rigmarole to emulate bpermd like this, as it
+ * could be done much faster by implementing a call to the native
+ * instruction. However, where possible I want to avoid using new
+ * native instructions so that we can use valgrind to emulate those
+ * instructions on older PPC64 hardware.
+ */
+ #define BPERMD_IDX_MASK 0x00000000000000FFULL
+ #define BPERMD_BIT_MASK 0x8000000000000000ULL
+ int i;
+ IRExpr * rS_expr = mkexpr(rS);
+ IRExpr * res = binop(Iop_And64, mkU64(0), mkU64(0));
+ DIP("bpermd r%u,r%u,r%u\n", rA_addr, rS_addr, rB_addr);
+ for (i = 0; i < 8; i++) {
+ IRTemp idx_tmp = newTemp( Ity_I64 );
+ IRTemp perm_bit = newTemp( Ity_I64 );
+ IRTemp idx = newTemp( Ity_I8 );
+ IRTemp idx_LT64 = newTemp( Ity_I1 );
+ IRTemp idx_LT64_ity64 = newTemp( Ity_I64 );
+
+ assign( idx_tmp,
+ binop( Iop_And64, mkU64( BPERMD_IDX_MASK ), rS_expr ) );
+ assign( idx_LT64,
+ binop( Iop_CmpLT64U, mkexpr( idx_tmp ), mkU64( 64 ) ) );
+ assign( idx,
+ binop( Iop_And8,
+ unop( Iop_1Sto8,
+ mkexpr(idx_LT64) ),
+ unop( Iop_64to8, mkexpr( idx_tmp ) ) ) );
+ /* If idx_LT64 == 0, we must force the perm bit to '0'. Below, we se idx
+ * to determine which bit of rB to use for the perm bit, and then we shift
+ * that bit to the MSB position. We AND that with a 64-bit-ized idx_LT64
+ * to set the final perm bit.
+ */
+ assign( idx_LT64_ity64,
+ unop( Iop_32Uto64, unop( Iop_1Uto32, mkexpr(idx_LT64 ) ) ) );
+ assign( perm_bit,
+ binop( Iop_And64,
+ mkexpr( idx_LT64_ity64 ),
+ binop( Iop_Shr64,
+ binop( Iop_And64,
+ mkU64( BPERMD_BIT_MASK ),
+ binop( Iop_Shl64,
+ mkexpr( rB ),
+ mkexpr( idx ) ) ),
+ mkU8( 63 ) ) ) );
+ res = binop( Iop_Or64,
+ res,
+ binop( Iop_Shl64,
+ mkexpr( perm_bit ),
+ mkU8( i ) ) );
+ rS_expr = binop( Iop_Shr64, rS_expr, mkU8( 8 ) );
+ }
+ putIReg(rA_addr, res);
+ return True;
+ }
default:
vex_printf("dis_int_logic(ppc)(opc2)\n");
@@ -5485,7 +6202,23 @@
putIReg( rD_addr, mkWidenFrom32(ty, mkexpr(w2),
/* Signed */False) );
break;
-
+
+ case 0x214: // ldbrx (Load Doubleword Byte-Reverse Indexed)
+ {
+ IRExpr * nextAddr;
+ IRTemp w3 = newTemp( Ity_I32 );
+ IRTemp w4 = newTemp( Ity_I32 );
+ DIP("ldbrx r%u,r%u,r%u\n", rD_addr, rA_addr, rB_addr);
+ assign( w1, loadBE( Ity_I32, mkexpr( EA ) ) );
+ assign( w2, gen_byterev32( w1 ) );
+ nextAddr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ),
+ ty == Ity_I64 ? mkU64( 4 ) : mkU32( 4 ) );
+ assign( w3, loadBE( Ity_I32, nextAddr ) );
+ assign( w4, gen_byterev32( w3 ) );
+ putIReg( rD_addr, binop( Iop_32HLto64, mkexpr( w4 ), mkexpr( w2 ) ) );
+ break;
+ }
+
case 0x396: // sthbrx (Store Half Word Byte-Reverse Indexed, PPC32 p523)
DIP("sthbrx r%u,r%u,r%u\n", rS_addr, rA_addr, rB_addr);
assign( w1, mkNarrowTo32(ty, getIReg(rS_addr)) );
@@ -5497,7 +6230,21 @@
assign( w1, mkNarrowTo32(ty, getIReg(rS_addr)) );
storeBE( mkexpr(EA), gen_byterev32(w1) );
break;
-
+
+ case 0x294: // stdbrx (Store Doubleword Byte-Reverse Indexed)
+ {
+ IRTemp lo = newTemp(Ity_I32);
+ IRTemp hi = newTemp(Ity_I32);
+ IRTemp rS = newTemp(Ity_I64);
+ assign( rS, getIReg( rS_addr ) );
+ DIP("stdbrx r%u,r%u,r%u\n", rS_addr, rA_addr, rB_addr);
+ assign(lo, unop(Iop_64HIto32, mkexpr(rS)));
+ assign(hi, unop(Iop_64to32, mkexpr(rS)));
+ storeBE( mkexpr( EA ),
+ binop( Iop_32HLto64, gen_byterev32( hi ), gen_byterev32( lo ) ) );
+ break;
+ }
+
default:
vex_printf("dis_int_ldst_rev(ppc)(opc2)\n");
return False;
@@ -6059,6 +6806,17 @@
binop(Iop_32HLto64, mkexpr(iHi), mkexpr(iLo))) );
break;
+ case 0x377: // lfiwzx (Load floating-point as integer word, zero indexed
+ {
+ IRTemp dw = newTemp( Ity_I64 );
+ DIP("lfiwzx fr%u,r%u,r%u\n", frD_addr, rA_addr, rB_addr);
+ assign( EA, ea_rAor0_idxd( rA_addr, rB_addr ) );
+ assign( iLo, loadBE(Ity_I32, mkexpr(EA)) );
+ assign( dw, binop( Iop_32HLto64, mkU32( 0 ), mkexpr( iLo ) ) );
+ putFReg( frD_addr, unop( Iop_ReinterpI64asF64, mkexpr( dw ) ) );
+ break;
+ }
+
default:
vex_printf("dis_fp_load(ppc)(opc2)\n");
return False;
@@ -6591,7 +7349,390 @@
return True;
}
+/*
+ * fe_flag is set to 1 if any of the following conditions occurs:
+ * - The floating-point operand in register FRB is a Zero, a
+ * NaN, an Infinity, or a negative value.
+ * - e_b is less than or equal to: -970 for double precision; -103 for single precision
+ * Otherwise fe_flag is set to 0.
+ *
+ * fg_flag is set to 1 if either of the following conditions occurs.
+ * - The floating-point operand in register FRB is a Zero, an
+ * Infinity, or a denormalized value.
+ * Otherwise fg_flag is set to 0.
+ *
+ */
+static void do_fp_tsqrt(IRTemp frB_Int, Bool sp, IRTemp * fe_flag_tmp, IRTemp * fg_flag_tmp)
+{
+ // The following temps are for holding intermediate results
+ IRTemp e_b = newTemp(Ity_I32);
+ IRExpr * fe_flag, * fg_flag;
+ IRTemp frB_exp_shR = newTemp(Ity_I32);
+ UInt bias = sp? 127 : 1023;
+ IRExpr * frbNaN, * frbDenorm, * frBNeg;
+ IRExpr * eb_LTE;
+ IRTemp frbZero_tmp = newTemp(Ity_I1);
+ IRTemp frbInf_tmp = newTemp(Ity_I1);
+ *fe_flag_tmp = newTemp(Ity_I32);
+ *fg_flag_tmp = newTemp(Ity_I32);
+ assign( frB_exp_shR, fp_exp_part( frB_Int, sp ) );
+ assign(e_b, binop( Iop_Sub32, mkexpr(frB_exp_shR), mkU32( bias ) ));
+ ////////////////// fe_flag tests BEGIN //////////////////////
+ /* We first do all tests that may result in setting fe_flag to '1'.
+ * (NOTE: These tests are similar to those used for ftdiv. See do_fp_tdiv()
+ * for details.)
+ */
+ frbNaN = sp ? is_NaN_32(frB_Int) : is_NaN(frB_Int);
+ assign( frbInf_tmp, is_Inf(frB_Int, sp) );
+ assign( frbZero_tmp, is_Zero(frB_Int, sp ) );
+ {
+ // Test_value = -970 for double precision
+ UInt test_value = sp ? 0xffffff99 : 0xfffffc36;
+ eb_LTE = binop( Iop_CmpLE32S, mkexpr( e_b ), mkU32( test_value ) );
+ }
+ frBNeg = binop( Iop_CmpEQ32,
+ binop( Iop_Shr32,
+ sp ? mkexpr( frB_Int ) : unop( Iop_64HIto32, mkexpr( frB_Int ) ),
+ mkU8( 31 ) ),
+ mkU32( 1 ) );
+ ////////////////// fe_flag tests END //////////////////////
+
+ ////////////////// fg_flag tests BEGIN //////////////////////
+ /*
+ * The following tests were already performed above in the fe_flag
+ * tests. So these conditions will result in both fe_ and fg_ flags
+ * being set.
+ * - Test if FRB is Zero
+ * - Test if FRB is an Infinity
+ */
+
+ /*
+ * Test if FRB holds a denormalized value. A denormalized value is one where
+ * the exp is 0 and the fraction is non-zero.
+ */
+ if (sp) {
+ IRTemp frac_part = newTemp(Ity_I32);
+ assign( frac_part, binop( Iop_And32, mkexpr(frB_Int), mkU32(0x007fffff)) );
+ frbDenorm
+ = mkAND1( binop( Iop_CmpEQ32, mkexpr( frB_exp_shR ), mkU32( 0 ) ),
+ binop( Iop_CmpNE32, mkexpr( frac_part ), mkU32( 0 ) ) );
+ } else {
+ IRExpr * hi32, * low32, * fraction_is_nonzero;
+ IRTemp frac_part = newTemp(Ity_I64);
+
+ assign( frac_part, FP_FRAC_PART(frB_Int) );
+ hi32 = unop( Iop_64HIto32, mkexpr( frac_part ) );
+ low32 = unop( Iop_64to32, mkexpr( frac_part ) );
+ fraction_is_nonzero = binop( Iop_CmpNE32, binop( Iop_Or32, low32, hi32 ),
+ mkU32( 0 ) );
+ frbDenorm
+ = mkAND1( binop( Iop_CmpEQ32, mkexpr( frB_exp_shR ), mkU32( 0 ) ),
+ fraction_is_nonzero );
+ }
+ ////////////////// fg_flag tests END //////////////////////
+
+ /////////////////////////
+ fe_flag = mkOR1( mkexpr( frbZero_tmp ),
+ mkOR1( frbNaN,
+ mkOR1( mkexpr( frbInf_tmp ),
+ mkOR1( frBNeg, eb_LTE ) ) ) );
+
+ fe_flag = unop(Iop_1Uto32, fe_flag);
+
+ fg_flag = mkOR1( mkexpr( frbZero_tmp ),
+ mkOR1( mkexpr( frbInf_tmp ), frbDenorm ) );
+ fg_flag = unop(Iop_1Uto32, fg_flag);
+ assign (*fg_flag_tmp, fg_flag);
+ assign (*fe_flag_tmp, fe_flag);
+}
+/*
+ * fe_flag is set to 1 if any of the following conditions occurs:
+ * - The double-precision floating-point operand in register FRA is a NaN or an
+ * Infinity.
+ * - The double-precision floating-point operand in register FRB is a Zero, a
+ * NaN, or an Infinity.
+ * - e_b is less than or equal to -1022.
+ * - e_b is greater than or equal to 1021.
+ * - The double-precision floating-point operand in register FRA is not a zero
+ * and the difference, e_a - e_b, is greater than or equal to 1023.
+ * - The double-precision floating-point operand in register FRA is not a zero
+ * and the difference, e_a - e_b, is less than or equal to -1021.
+ * - The double-precision floating-point operand in register FRA is not a zero
+ * and e_a is less than or equal to -970
+ * Otherwise fe_flag is set to 0.
+ *
+ * fg_flag is set to 1 if either of the following conditions occurs.
+ * - The double-precision floating-point operand in register FRA is an Infinity.
+ * - The double-precision floating-point operand in register FRB is a Zero, an
+ * Infinity, or a denormalized value.
+ * Otherwise fg_flag is set to 0.
+ *
+ */
+static void _do_fp_tdiv(IRTemp frA_int, IRTemp frB_int, Bool sp, IRTemp * fe_flag_tmp, IRTemp * fg_flag_tmp)
+{
+ // The following temps are for holding intermediate results
+ IRTemp e_a = newTemp(Ity_I32);
+ IRTemp e_b = newTemp(Ity_I32);
+ IRTemp frA_exp_shR = newTemp(Ity_I32);
+ IRTemp frB_exp_shR = newTemp(Ity_I32);
+
+ UInt bias = sp? 127 : 1023;
+ *fe_flag_tmp = newTemp(Ity_I32);
+ *fg_flag_tmp = newTemp(Ity_I32);
+
+ /* The following variables hold boolean results from tests
+ * that are OR'ed together for setting the fe_ and fg_ flags.
+ * For some cases, the booleans are used more than once, so
+ * I make those IRTemp's instead of IRExpr's.
+ */
+ IRExpr * fraNaN, * frbNaN, * frbDenorm;
+ IRExpr * eb_LTE, * eb_GTE, * ea_eb_GTE, * ea_eb_LTE, * ea_LTE;
+ IRTemp fraInf_tmp = newTemp(Ity_I1);
+ IRTemp frbZero_tmp = newTemp(Ity_I1);
+ IRTemp frbInf_tmp = newTemp(Ity_I1);
+ IRTemp fraNotZero_tmp = newTemp(Ity_I1);
+
+/* The following are the flags that are set by OR'ing the results of
+ * all the tests done for tdiv. These flags are the input to the specified CR.
+ */
+ IRExpr * fe_flag, * fg_flag;
+
+ // Create temps that will be used throughout the following tests.
+ assign( frA_exp_shR, fp_exp_part( frA_int, sp ) );
+ assign( frB_exp_shR, fp_exp_part( frB_int, sp ) );
+ /* Let e_[a|b] be the unbiased exponent: i.e. exp - 1023. */
+ assign(e_a, binop( Iop_Sub32, mkexpr(frA_exp_shR), mkU32( bias ) ));
+ assign(e_b, binop( Iop_Sub32, mkexpr(frB_exp_shR), mkU32( bias ) ));
+
+
+ ////////////////// fe_flag tests BEGIN //////////////////////
+ /* We first do all tests that may result in setting fe_flag to '1'. */
+
+ /*
+ * Test if the double-precision floating-point operand in register FRA is
+ * a NaN:
+ */
+ fraNaN = sp ? is_NaN_32(frA_int) : is_NaN(frA_int);
+ /*
+ * Test if the double-precision floating-point operand in register FRA is
+ * an Infinity.
+ */
+ assign(fraInf_tmp, is_Inf(frA_int, sp));
+
+ /*
+ * Test if the double-precision floating-point operand in register FRB is
+ * a NaN:
+ */
+ frbNaN = sp ? is_NaN_32(frB_int) : is_NaN(frB_int);
+ /*
+ * Test if the double-precision floating-point operand in register FRB is
+ * an Infinity.
+ */
+ assign( frbInf_tmp, is_Inf(frB_int, sp) );
+ /*
+ * Test if the double-precision floating-point operand in register FRB is
+ * a Zero.
+ */
+ assign( frbZero_tmp, is_Zero(frB_int, sp) );
+
+ /*
+ * Test if e_b <= -1022 for double precision;
+ * or e_b <= -126 for single precision
+ */
+ {
+ UInt test_value = sp ? 0xffffff82 : 0xfffffc02;
+ eb_LTE = binop(Iop_CmpLE32S, mkexpr(e_b), mkU32(test_value));
+ }
+
+ /*
+ * Test if e_b >= 1021 (i.e., 1021 < e_b) for double precision;
+ * or e_b >= -125 (125 < e_b) for single precision
+ */
+ {
+ Int test_value = sp ? 125 : 1021;
+ eb_GTE = binop(Iop_CmpLT32S, mkU32(test_value), mkexpr(e_b));
+ }
+
+ /*
+ * Test if FRA != Zero and (e_a - e_b) >= bias
+ */
+ assign( fraNotZero_tmp, unop( Iop_Not1, is_Zero( frA_int, sp ) ) );
+ ea_eb_GTE = mkAND1( mkexpr( fraNotZero_tmp ),
+ binop( Iop_CmpLT32S, mkU32( bias ),
+ binop( Iop_Sub32, mkexpr( e_a ),
+ mkexpr( e_b ) ) ) );
+
+ /*
+ * Test if FRA != Zero and (e_a - e_b) <= [-1021 (double precision) or -125 (single precision)]
+ */
+ {
+ UInt test_value = sp ? 0xffffff83 : 0xfffffc03;
+
+ ea_eb_LTE = mkAND1( mkexpr( fraNotZero_tmp ),
+ binop( Iop_CmpLE32S,
+ binop( Iop_Sub32,
+ mkexpr( e_a ),
+ mkexpr( e_b ) ),
+ mkU32( test_value ) ) );
+ }
+
+ /*
+ * Test if FRA != Zero and e_a <= [-970 (double precision) or -103 (single precision)]
+ */
+ {
+ UInt test_value = 0xfffffc36; //Int test_value = -970;
+
+ ea_LTE = mkAND1( mkexpr( fraNotZero_tmp ), binop( Iop_CmpLE32S,
+ mkexpr( e_a ),
+ mkU32( test_value ) ) );
+ }
+ ////////////////// fe_flag tests END //////////////////////
+
+ ////////////////// fg_flag tests BEGIN //////////////////////
+ /*
+ * The following tests were already performed above in the fe_flag
+ * tests. So these conditions will result in both fe_ and fg_ flags
+ * being set.
+ * - Test if FRA is an Infinity
+ * - Test if FRB ix Zero
+ * - Test if FRB is an Infinity
+ */
+
+ /*
+ * Test if FRB holds a denormalized value. A denormalized value is one where
+ * the exp is 0 and the fraction is non-zero.
+ */
+ {
+ IRExpr * fraction_is_nonzero;
+
+ if (sp) {
+ fraction_is_nonzero = binop( Iop_CmpNE32, FP_FRAC_PART32(frB_int),
+ mkU32( 0 ) );
+ } else {
+ IRExpr * hi32, * low32;
+ IRTemp frac_part = newTemp(Ity_I64);
+ assign( frac_part, FP_FRAC_PART(frB_int) );
+
+ hi32 = unop( Iop_64HIto32, mkexpr( frac_part ) );
+ low32 = unop( Iop_64to32, mkexpr( frac_part ) );
+ fraction_is_nonzero = binop( Iop_CmpNE32, binop( Iop_Or32, low32, hi32 ),
+ mkU32( 0 ) );
+ }
+ frbDenorm = mkAND1( binop( Iop_CmpEQ32, mkexpr( frB_exp_shR ),
+ mkU32( 0x0 ) ), fraction_is_nonzero );
+
+ }
+ ////////////////// fg_flag tests END //////////////////////
+
+ fe_flag
+ = mkOR1(
+ fraNaN,
+ mkOR1(
+ mkexpr( fraInf_tmp ),
+ mkOR1(
+ mkexpr( frbZero_tmp ),
+ mkOR1(
+ frbNaN,
+ mkOR1(
+ mkexpr( frbInf_tmp ),
+ mkOR1( eb_LTE,
+ mkOR1( eb_GTE,
+ mkOR1( ea_eb_GTE,
+ mkOR1( ea_eb_LTE,
+ ea_LTE ) ) ) ) ) ) ) ) );
+
+ fe_flag = unop(Iop_1Uto32, fe_flag);
+
+ fg_flag = mkOR1( mkexpr( fraInf_tmp ), mkOR1( mkexpr( frbZero_tmp ),
+ mkOR1( mkexpr( frbInf_tmp ),
+ frbDenorm ) ) );
+ fg_flag = unop(Iop_1Uto32, fg_flag);
+ assign(*fe_flag_tmp, fe_flag);
+ assign(*fg_flag_tmp, fg_flag);
+}
+
+/* See description for _do_fp_tdiv() above. */
+static IRExpr * do_fp_tdiv(IRTemp frA_int, IRTemp frB_int)
+{
+ IRTemp fe_flag, fg_flag;
+ /////////////////////////
+ /* The CR field consists of fl_flag || fg_flag || fe_flag || 0b0
+ * where fl_flag == 1 on ppc64.
+ */
+ IRExpr * fl_flag = unop(Iop_Not32, mkU32(0xFFFFFE));
+ fe_flag = fg_flag = IRTemp_INVALID;
+ _do_fp_tdiv(frA_int, frB_int, False/*not single precision*/, &fe_flag, &fg_flag);
+ return binop( Iop_Or32,
+ binop( Iop_Or32,
+ binop( Iop_Shl32, fl_flag, mkU8( 3 ) ),
+ binop( Iop_Shl32, mkexpr(fg_flag), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flag), mkU8( 1 ) ) );
+}
+
+static Bool dis_fp_tests ( UInt theInstr )
+{
+ UChar opc1 = ifieldOPC(theInstr);
+ UChar crfD = toUChar( IFIELD( theInstr, 23, 3 ) );
+ UChar frB_addr = ifieldRegB(theInstr);
+ UChar b0 = ifieldBIT0(theInstr);
+ UInt opc2 = ifieldOPClo10(theInstr);
+ IRTemp frB_I64 = newTemp(Ity_I64);
+
+ if (opc1 != 0x3F || b0 != 0 ){
+ vex_printf("dis_fp_tests(ppc)(ftdiv)\n");
+ return False;
+ }
+ assign( frB_I64, unop( Iop_ReinterpF64asI64, getFReg( frB_addr ) ) );
+
+ switch (opc2) {
+ case 0x080: // ftdiv
+ {
+ UChar frA_addr = ifieldRegA(theInstr);
+ IRTemp frA_I64 = newTemp(Ity_I64);
+ UChar b21to22 = toUChar( IFIELD( theInstr, 21, 2 ) );
+ if (b21to22 != 0 ) {
+ vex_printf("dis_fp_tests(ppc)(ftdiv)\n");
+ return False;
+ }
+
+ assign( frA_I64, unop( Iop_ReinterpF64asI64, getFReg( frA_addr ) ) );
+ putGST_field( PPC_GST_CR, do_fp_tdiv(frA_I64, frB_I64), crfD );
+
+ DIP("ftdiv crf%d,fr%u,fr%u\n", crfD, frA_addr, frB_addr);
+ break;
+ }
+ case 0x0A0: // ftsqrt
+ {
+ IRTemp flags = newTemp(Ity_I32);
+ IRTemp fe_flag, fg_flag;
+ fe_flag = fg_flag = IRTemp_INVALID;
+ UChar b18to22 = toUChar( IFIELD( theInstr, 18, 5 ) );
+ if ( b18to22 != 0) {
+ vex_printf("dis_fp_tests(ppc)(ftsqrt)\n");
+ return False;
+ }
+ DIP("ftsqrt crf%d,fr%u\n", crfD, frB_addr);
+ do_fp_tsqrt(frB_I64, False /* not single precision*/, &fe_flag, &fg_flag);
+ /* The CR field consists of fl_flag || fg_flag || fe_flag || 0b0
+ * where fl_flag == 1 on ppc64.
+ */
+ assign( flags,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flag), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flag), mkU8( 1 ) ) ) );
+ putGST_field( PPC_GST_CR, mkexpr(flags), crfD );
+ break;
+ }
+
+ default:
+ vex_printf("dis_fp_tests(ppc)(opc2)\n");
+ return False;
+
+ }
+ return True;
+}
/*
Floating Point Compare Instructions
@@ -6721,13 +7862,33 @@
simulating exceptions, the exception status will appear to be
zero. Hence cr1 should be cleared if this is a . form insn. */
Bool clear_CR1 = True;
-
- if (opc1 != 0x3F || b16to20 != 0) {
+ if ((!(opc1 == 0x3F || opc1 == 0x3B)) || b16to20 != 0) {
vex_printf("dis_fp_round(ppc)(instr)\n");
return False;
}
assign( frB, getFReg(frB_addr));
+ if (opc1 == 0x3B) {
+ /* The fcfid[u]s instructions (from ISA 2.06) are a bit odd because
+ * they're very similar to the other instructions handled here, but have
+ * a different primary opcode.
+ */
+ switch (opc2) {
+ case 0x34E: // fcfids (Float convert from signed DWord to single precision)
+ DIP("fcfids%s fr%u,fr%u\n", flag_rC ? ".":"", frD_addr, frB_addr);
+ assign( r_tmp64, unop( Iop_ReinterpF64asI64, mkexpr(frB)) );
+ assign( frD, binop( Iop_RoundF64toF32, rm, binop( Iop_I64StoF64, rm,
+ mkexpr( r_tmp64 ) ) ) );
+ goto putFR;
+
+ case 0x3Ce: // fcfidus (Float convert from unsigned DWord to single precision)
+ DIP("fcfidus%s fr%u,fr%u\n", flag_rC ? ".":"", frD_addr, frB_addr);
+ assign( r_tmp64, unop( Iop_ReinterpF64asI64, mkexpr(frB)) );
+ assign( frD, unop( Iop_F32toF64, binop( Iop_I64UtoF32, rm, mkexpr( r_tmp64 ) ) ) );
+ goto putFR;
+ }
+ }
+
switch (opc2) {
case 0x00C: // frsp (Float Round to Single, PPC32 p423)
@@ -6755,6 +7916,20 @@
set_FPRF = False;
break;
+ case 0x08F: case 0x08E: // fctiwu[z]
+ DIP("fctiwu%s%s fr%u,fr%u\n", opc2 == 0x08F ? "z" : "",
+ flag_rC ? ".":"", frD_addr, frB_addr);
+ assign( r_tmp32,
+ binop( Iop_F64toI32U,
+ opc2 == 0x08F ? mkU32( Irrm_ZERO ) : rm,
+ mkexpr( frB ) ) );
+ assign( frD, unop( Iop_ReinterpI64asF64,
+ unop( Iop_32Uto64, mkexpr(r_tmp32))));
+ /* FPRF is undefined after fctiwz. Leave unchanged. */
+ set_FPRF = False;
+ break;
+
+
case 0x32E: // fctid (Float Conv to Int DWord, PPC64 p437)
DIP("fctid%s fr%u,fr%u\n", flag_rC ? ".":"", frD_addr, frB_addr);
assign( r_tmp64,
@@ -6773,6 +7948,17 @@
set_FPRF = False;
break;
+ case 0x3AE: case 0x3AF: // fctidu[z] (Float Conv to Int DWord Unsigned [Round to Zero])
+ {
+ DIP("fctidu%s%s fr%u,fr%u\n", opc2 == 0x3AE ? "" : "z",
+ flag_rC ? ".":"", frD_addr, frB_addr);
+ assign( r_tmp64,
+ binop(Iop_F64toI64U, opc2 == 0x3AE ? rm : mkU32(Irrm_ZERO), mkexpr(frB)) );
+ assign( frD, unop( Iop_ReinterpI64asF64, mkexpr(r_tmp64)) );
+ /* FPRF is undefined after fctidz. Leave unchanged. */
+ set_FPRF = False;
+ break;
+ }
case 0x34E: // fcfid (Float Conv from Int DWord, PPC64 p434)
DIP("fcfid%s fr%u,fr%u\n", flag_rC ? ".":"", frD_addr, frB_addr);
assign( r_tmp64, unop( Iop_ReinterpF64asI64, mkexpr(frB)) );
@@ -6780,6 +7966,12 @@
binop(Iop_I64StoF64, rm, mkexpr(r_tmp64)) );
break;
+ case 0x3CE: // fcfidu (Float convert from unsigned DWord)
+ DIP("fcfidu%s fr%u,fr%u\n", flag_rC ? ".":"", frD_addr, frB_addr);
+ assign( r_tmp64, unop( Iop_ReinterpF64asI64, mkexpr(frB)) );
+ assign( frD, binop( Iop_I64UtoF64, rm, mkexpr( r_tmp64 ) ) );
+ break;
+
case 0x188: case 0x1A8: case 0x1C8: case 0x1E8: // frin, friz, frip, frim
switch(opc2) {
case 0x188: // frin (Floating Round to Integer Nearest)
@@ -6830,7 +8022,7 @@
vex_printf("dis_fp_round(ppc)(opc2)\n");
return False;
}
-
+putFR:
putFReg( frD_addr, mkexpr(frD) );
if (set_FPRF) {
@@ -7271,6 +8463,2663 @@
}
/*
+ * VSX scalar and vector convert instructions
+ */
+static Bool
+dis_vx_conv ( UInt theInstr, UInt opc2 )
+{
+ /* XX2-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar XT = ifieldRegXT( theInstr );
+ UChar XB = ifieldRegXB( theInstr );
+ IRTemp xB, xB2;
+ IRTemp b3, b2, b1, b0;
+ xB = xB2 = IRTemp_INVALID;
+
+ if (opc1 != 0x3C) {
+ vex_printf( "dis_vx_conv(ppc)(instr)\n" );
+ return False;
+ }
+
+ /* Create and assign temps only as needed for the given instruction. */
+ switch (opc2) {
+ // scalar double-precision floating point argument
+ case 0x2B0: case 0x0b0: case 0x290: case 0x212: case 0x090:
+ xB = newTemp(Ity_F64);
+ assign( xB,
+ unop( Iop_ReinterpI64asF64,
+ unop( Iop_V128HIto64, getVSReg( XB ) ) ) );
+ break;
+ // vector double-precision floating point arguments
+ case 0x1b0: case 0x312: case 0x390: case 0x190: case 0x3B0:
+
+ xB = newTemp(Ity_F64);
+ xB2 = newTemp(Ity_F64);
+ assign( xB,
+ unop( Iop_ReinterpI64asF64,
+ unop( Iop_V128HIto64, getVSReg( XB ) ) ) );
+ assign( xB2,
+ unop( Iop_ReinterpI64asF64,
+ unop( Iop_V128to64, getVSReg( XB ) ) ) );
+ break;
+ // vector single precision or [un]signed integer word arguments
+ case 0x130: case 0x392: case 0x330: case 0x310: case 0x110:
+ case 0x1f0: case 0x1d0:
+ b3 = b2 = b1 = b0 = IRTemp_INVALID;
+ breakV128to4x32(getVSReg(XB), &b3, &b2, &b1, &b0);
+ break;
+ // vector [un]signed integer doubleword argument
+ case 0x3f0: case 0x370: case 0x3d0: case 0x350:
+ xB = newTemp(Ity_I64);
+ assign( xB, unop( Iop_V128HIto64, getVSReg( XB ) ) );
+ xB2 = newTemp(Ity_I64);
+ assign( xB2, unop( Iop_V128to64, getVSReg( XB ) ) );
+ break;
+ // scalar [un]signed integer doubleword argument
+ case 0x2F0: case 0x2D0:
+ xB = newTemp(Ity_I64);
+ assign( xB, unop( Iop_V128HIto64, getVSReg( XB ) ) );
+ break;
+ // scalar single precision argument
+ case 0x292: // xscvspdp
+ xB = newTemp(Ity_I32);
+ assign( xB,
+ unop( Iop_64HIto32, unop( Iop_V128HIto64, getVSReg( XB ) ) ) );
+ break;
+
+ /* Certain instructions have their complete implementation in the main switch statement
+ * that follows this one; thus we have a "do nothing" case for those instructions here.
+ */
+ case 0x170: case 0x150:
+ break; // do nothing
+
+ default:
+ vex_printf( "dis_vx_conv(ppc)(opc2)\n" );
+ return False;
+ }
+
+
+ switch (opc2) {
+ case 0x2B0:
+ // xscvdpsxds (VSX Scalar truncate Double-Precision to integer and Convert
+ // to Signed Integer Doubleword format with Saturate)
+ DIP("xscvdpsxds v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128, binop( Iop_F64toI64S,
+ mkU32( Irrm_ZERO ),
+ mkexpr( xB ) ), mkU64( 0 ) ) );
+ break;
+ case 0x0b0: // xscvdpsxws (VSX Scalar truncate Double-Precision to integer and
+ // Convert to Signed Integer Word format with Saturate)
+ DIP("xscvdpsxws v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_32Sto64,
+ binop( Iop_F64toI32S,
+ mkU32( Irrm_ZERO ),
+ mkexpr( xB ) ) ),
+ mkU64( 0ULL ) ) );
+ break;
+ case 0x290: // xscvdpuxds (VSX Scalar truncate Double-Precision integer and Convert
+ // to Unsigned Integer Doubleword format with Saturate)
+ DIP("xscvdpuxds v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_F64toI64U,
+ mkU32( Irrm_ZERO ),
+ mkexpr( xB ) ),
+ mkU64( 0ULL ) ) );
+ break;
+ case 0x2F0:
+ // xscvsxddp (VSX Scalar Convert and round Signed Integer Doubleword to
+ // Double-Precision format)
+ DIP("xscvsxddp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64,
+ binop( Iop_I64StoF64, get_IR_roundingmode(),
+ mkexpr( xB ) ) ),
+ mkU64( 0 ) ) );
+ break;
+ case 0x2D0:
+ // xscvuxddp (VSX Scalar Convert and round Unsigned Integer Doubleword to
+ // Double-Precision format)
+ DIP("xscvuxddp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64,
+ binop( Iop_I64UtoF64, get_IR_roundingmode(),
+ mkexpr( xB ) ) ),
+ mkU64( 0 ) ) );
+ break;
+ case 0x1b0: // xvcvdpsxws (VSX Vector truncate Double-Precision to integer and Convert
+ // to Signed Integer Word format with Saturate)
+ {
+ IRTemp hiResult_32 = newTemp(Ity_I32);
+ IRTemp loResult_32 = newTemp(Ity_I32);
+ IRExpr* rmZero = mkU32(Irrm_ZERO);
+
+ DIP("xvcvdpsxws v%u,v%u\n", (UInt)XT, (UInt)XB);
+ assign(hiResult_32, binop(Iop_F64toI32S, rmZero, mkexpr(xB)));
+ assign(loResult_32, binop(Iop_F64toI32S, rmZero, mkexpr(xB2)));
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_32Sto64, mkexpr( hiResult_32 ) ),
+ unop( Iop_32Sto64, mkexpr( loResult_32 ) ) ) );
+ break;
+ }
+ case 0x130: case 0x110: // xvcvspsxws, xvcvspuxws
+ // (VSX Vector truncate Single-Precision to integer and
+ // Convert to [Un]signed Integer Word format with Saturate)
+ {
+ IRExpr * b0_result, * b1_result, * b2_result, * b3_result;
+ IRTemp tempResult = newTemp(Ity_V128);
+ IRTemp res0 = newTemp(Ity_I32);
+ IRTemp res1 = newTemp(Ity_I32);
+ IRTemp res2 = newTemp(Ity_I32);
+ IRTemp res3 = newTemp(Ity_I32);
+ IRTemp hi64 = newTemp(Ity_I64);
+ IRTemp lo64 = newTemp(Ity_I64);
+ Bool un_signed = (opc2 == 0x110);
+ IROp op = un_signed ? Iop_QFtoI32Ux4_RZ : Iop_QFtoI32Sx4_RZ;
+
+ DIP("xvcvsp%sxws v%u,v%u\n", un_signed ? "u" : "s", (UInt)XT, (UInt)XB);
+ /* The xvcvsp{s|u}xws instruction is similar to vct{s|u}xs, except if src is a NaN,
+ * then result is set to 0x80000000. */
+ assign(tempResult, unop(op, getVSReg(XB)));
+ assign( hi64, unop(Iop_V128HIto64, mkexpr(tempResult)) );
+ assign( lo64, unop(Iop_V128to64, mkexpr(tempResult)) );
+ assign( res3, unop(Iop_64HIto32, mkexpr(hi64)) );
+ assign( res2, unop(Iop_64to32, mkexpr(hi64)) );
+ assign( res1, unop(Iop_64HIto32, mkexpr(lo64)) );
+ assign( res0, unop(Iop_64to32, mkexpr(lo64)) );
+
+ b3_result = IRExpr_Mux0X(unop(Iop_1Uto8, is_NaN_32(b3)),
+ // else: result is from the Iop_QFtoI32{s|u}x4_RZ
+ mkexpr(res3),
+ // then: result is 0x{8|0}80000000
+ mkU32(un_signed ? 0x00000000 : 0x80000000));
+ b2_result = IRExpr_Mux0X(unop(Iop_1Uto8, is_NaN_32(b2)),
+ // else: result is from the Iop_QFtoI32{s|u}x4_RZ
+ mkexpr(res2),
+ // then: result is 0x{8|0}80000000
+ mkU32(un_signed ? 0x00000000 : 0x80000000));
+ b1_result = IRExpr_Mux0X(unop(Iop_1Uto8, is_NaN_32(b1)),
+ // else: result is from the Iop_QFtoI32{s|u}x4_RZ
+ mkexpr(res1),
+ // then: result is 0x{8|0}80000000
+ mkU32(un_signed ? 0x00000000 : 0x80000000));
+ b0_result = IRExpr_Mux0X(unop(Iop_1Uto8, is_NaN_32(b0)),
+ // else: result is from the Iop_QFtoI32{s|u}x4_RZ
+ mkexpr(res0),
+ // then: result is 0x{8|0}80000000
+ mkU32(un_signed ? 0x00000000 : 0x80000000));
+
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64, b3_result, b2_result ),
+ binop( Iop_32HLto64, b1_result, b0_result ) ) );
+ break;
+ }
+ case 0x212: // xscvdpsp (VSX Scalar round Double-Precision to single-precision and
+ // Convert to Single-Precision format
+ DIP("xscvdpsp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ binop( Iop_RoundF64toF32,
+ get_IR_roundingmode(),
+ mkexpr( xB ) ) ) ),
+ mkU32( 0 ) ),
+ mkU64( 0ULL ) ) );
+ break;
+ case 0x090: // xscvdpuxws (VSX Scalar truncate Double-Precision to integer
+ // and Convert to Unsigned Integer Word format with Saturate)
+ DIP("xscvdpuxws v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64,
+ mkU32( 0 ),
+ binop( Iop_F64toI32U,
+ mkU32( Irrm_ZERO ),
+ mkexpr( xB ) ) ),
+ mkU64( 0ULL ) ) );
+ break;
+ case 0x292: // xscvspdp (VSX Scalar Convert Single-Precision to Double-Precision format)
+ DIP("xscvspdp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64,
+ unop( Iop_F32toF64,
+ unop( Iop_ReinterpI32asF32, mkexpr( xB ) ) ) ),
+ mkU64( 0ULL ) ) );
+ break;
+ case 0x312: // xvcvdpsp (VSX Vector round Double-Precision to single-precision
+ // and Convert to Single-Precision format)
+ DIP("xvcvdpsp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ binop( Iop_RoundF64toF32,
+ get_IR_roundingmode(),
+ mkexpr( xB ) ) ) ),
+ mkU32( 0 ) ),
+ binop( Iop_32HLto64,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ binop( Iop_RoundF64toF32,
+ get_IR_roundingmode(),
+ mkexpr( xB2 ) ) ) ),
+ mkU32( 0 ) ) ) );
+ break;
+ case 0x390: // xvcvdpuxds (VSX Vector truncate Double-Precision to integer
+ // and Convert to Unsigned Integer Doubleword format
+ // with Saturate)
+ DIP("xvcvdpuxds v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_F64toI64U, mkU32( Irrm_ZERO ), mkexpr( xB ) ),
+ binop( Iop_F64toI64U, mkU32( Irrm_ZERO ), mkexpr( xB2 ) ) ) );
+ break;
+ case 0x190: // xvcvdpuxws (VSX Vector truncate Double-Precision to integer and
+ // Convert to Unsigned Integer Word format with Saturate)
+ DIP("xvcvdpuxws v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64,
+ binop( Iop_F64toI32U,
+ mkU32( Irrm_ZERO ),
+ mkexpr( xB ) ),
+ mkU32( 0 ) ),
+ binop( Iop_32HLto64,
+ binop( Iop_F64toI32U,
+ mkU32( Irrm_ZERO ),
+ mkexpr( xB2 ) ),
+ mkU32( 0 ) ) ) );
+ break;
+ case 0x392: // xvcvspdp (VSX Vector Convert Single-Precision to Double-Precision format)
+ DIP("xvcvspdp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64,
+ unop( Iop_F32toF64,
+ unop( Iop_ReinterpI32asF32, mkexpr( b3 ) ) ) ),
+ unop( Iop_ReinterpF64asI64,
+ unop( Iop_F32toF64,
+ unop( Iop_ReinterpI32asF32, mkexpr( b1 ) ) ) ) ) );
+ break;
+ case 0x330: // xvcvspsxds (VSX Vector truncate Single-Precision to integer and
+ // Convert to Signed Integer Doubleword format with Saturate)
+ DIP("xvcvspsxds v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_F64toI64S,
+ mkU32( Irrm_ZERO ),
+ unop( Iop_F32toF64,
+ unop( Iop_ReinterpI32asF32, mkexpr( b3 ) ) ) ),
+ binop( Iop_F64toI64S,
+ mkU32( Irrm_ZERO ),
+ unop( Iop_F32toF64,
+ unop( Iop_ReinterpI32asF32, mkexpr( b1 ) ) ) ) ) );
+ break;
+ case 0x310: // xvcvspuxds (VSX Vector truncate Single-Precision to integer and
+ // Convert to Unsigned Integer Doubleword format with Saturate)
+ DIP("xvcvspuxds v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_F64toI64U,
+ mkU32( Irrm_ZERO ),
+ unop( Iop_F32toF64,
+ unop( Iop_ReinterpI32asF32, mkexpr( b3 ) ) ) ),
+ binop( Iop_F64toI64U,
+ mkU32( Irrm_ZERO ),
+ unop( Iop_F32toF64,
+ unop( Iop_ReinterpI32asF32, mkexpr( b1 ) ) ) ) ) );
+ break;
+ case 0x3B0: // xvcvdpsxds (VSX Vector truncate Double-Precision to integer and
+ // Convert to Signed Integer Doubleword format with Saturate)
+ DIP("xvcvdpsxds v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_F64toI64S, mkU32( Irrm_ZERO ), mkexpr( xB ) ),
+ binop( Iop_F64toI64S, mkU32( Irrm_ZERO ), mkexpr( xB2 ) ) ) );
+ break;
+ case 0x3f0: // xvcvsxddp (VSX Vector Convert and round Signed Integer Doubleword
+ // to Double-Precision format)
+ DIP("xvcvsxddp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64,
+ binop( Iop_I64StoF64,
+ get_IR_roundingmode(),
+ mkexpr( xB ) ) ),
+ unop( Iop_ReinterpF64asI64,
+ binop( Iop_I64StoF64,
+ get_IR_roundingmode(),
+ mkexpr( xB2 ) ) ) ) );
+ break;
+ case 0x3d0: // xvcvuxddp (VSX Vector Convert and round Unsigned Integer Doubleword
+ // to Double-Precision format)
+ DIP("xvcvuxddp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64,
+ binop( Iop_I64UtoF64,
+ get_IR_roundingmode(),
+ mkexpr( xB ) ) ),
+ unop( Iop_ReinterpF64asI64,
+ binop( Iop_I64UtoF64,
+ get_IR_roundingmode(),
+ mkexpr( xB2 ) ) ) ) );
+
+ break;
+ case 0x370: // xvcvsxdsp (VSX Vector Convert and round Signed Integer Doubleword
+ // to Single-Precision format)
+ DIP("xvcvsxddp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ binop( Iop_RoundF64toF32,
+ get_IR_roundingmode(),
+ binop( Iop_I64StoF64,
+ get_IR_roundingmode(),
+ mkexpr( xB ) ) ) ) ),
+ mkU32( 0 ) ),
+ binop( Iop_32HLto64,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ binop( Iop_RoundF64toF32,
+ get_IR_roundingmode(),
+ binop( Iop_I64StoF64,
+ get_IR_roundingmode(),
+ mkexpr( xB2 ) ) ) ) ),
+ mkU32( 0 ) ) ) );
+ break;
+ case 0x350: // xvcvuxdsp (VSX Vector Convert and round Unsigned Integer Doubleword
+ // to Single-Precision format)
+ DIP("xvcvuxddp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ binop( Iop_RoundF64toF32,
+ get_IR_roundingmode(),
+ binop( Iop_I64UtoF64,
+ get_IR_roundingmode(),
+ mkexpr( xB ) ) ) ) ),
+ mkU32( 0 ) ),
+ binop( Iop_32HLto64,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ binop( Iop_RoundF64toF32,
+ get_IR_roundingmode(),
+ binop( Iop_I64UtoF64,
+ get_IR_roundingmode(),
+ mkexpr( xB2 ) ) ) ) ),
+ mkU32( 0 ) ) ) );
+ break;
+
+ case 0x1f0: // xvcvsxwdp (VSX Vector Convert Signed Integer Word to Double-Precision format)
+ DIP("xvcvsxwdp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64,
+ binop( Iop_I64StoF64, get_IR_roundingmode(),
+ unop( Iop_32Sto64, mkexpr( b3 ) ) ) ),
+ unop( Iop_ReinterpF64asI64,
+ binop( Iop_I64StoF64, get_IR_roundingmode(),
+ unop( Iop_32Sto64, mkexpr( b1 ) ) ) ) ) );
+ break;
+ case 0x1d0: // xvcvuxwdp (VSX Vector Convert Unsigned Integer Word to Double-Precision format)
+ DIP("xvcvuxwdp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64,
+ binop( Iop_I64UtoF64, get_IR_roundingmode(),
+ unop( Iop_32Uto64, mkexpr( b3 ) ) ) ),
+ unop( Iop_ReinterpF64asI64,
+ binop( Iop_I64UtoF64, get_IR_roundingmode(),
+ unop( Iop_32Uto64, mkexpr( b1 ) ) ) ) ) );
+ break;
+ case 0x170: // xvcvsxwsp (VSX Vector Convert Signed Integer Word to Single-Precision format)
+ DIP("xvcvsxwsp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT, unop( Iop_I32StoFx4, getVSReg( XB ) ) );
+ break;
+ case 0x150: // xvcvuxwsp (VSX Vector Convert Unsigned Integer Word to Single-Precision format)
+ DIP("xvcvuxwsp v%u,v%u\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT, unop( Iop_I32UtoFx4, getVSReg( XB ) ) );
+ break;
+
+ default:
+ vex_printf( "dis_vx_conv(ppc)(opc2)\n" );
+ return False;
+ }
+ return True;
+}
+
+/*
+ * VSX vector Double Precision Floating Point Arithmetic Instructions
+ */
+static Bool
+dis_vxv_dp_arith ( UInt theInstr, UInt opc2 )
+{
+ /* XX3-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar XT = ifieldRegXT( theInstr );
+ UChar XA = ifieldRegXA( theInstr );
+ UChar XB = ifieldRegXB( theInstr );
+ IRExpr* rm = get_IR_roundingmode();
+ IRTemp frA = newTemp(Ity_F64);
+ IRTemp frB = newTemp(Ity_F64);
+ IRTemp frA2 = newTemp(Ity_F64);
+ IRTemp frB2 = newTemp(Ity_F64);
+
+ if (opc1 != 0x3C) {
+ vex_printf( "dis_vxv_dp_arith(ppc)(instr)\n" );
+ return False;
+ }
+
+ assign(frA, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XA ))));
+ assign(frB, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XB ))));
+ assign(frA2, unop(Iop_ReinterpI64asF64, unop(Iop_V128to64, getVSReg( XA ))));
+ assign(frB2, unop(Iop_ReinterpI64asF64, unop(Iop_V128to64, getVSReg( XB ))));
+
+ switch (opc2) {
+ case 0x1E0: // xvdivdp (VSX Vector Divide Double-Precision)
+ case 0x1C0: // xvmuldp (VSX Vector Multiply Double-Precision)
+ case 0x180: // xvadddp (VSX Vector Add Double-Precision)
+ case 0x1A0: // xvsubdp (VSX Vector Subtract Double-Precision)
+ {
+ IROp mOp;
+ Char * oper_name;
+ switch (opc2) {
+ case 0x1E0:
+ mOp = Iop_DivF64;
+ oper_name = "div";
+ break;
+ case 0x1C0:
+ mOp = Iop_MulF64;
+ oper_name = "mul";
+ break;
+ case 0x180:
+ mOp = Iop_AddF64;
+ oper_name = "add";
+ break;
+ case 0x1A0:
+ mOp = Iop_SubF64;
+ oper_name = "sub";
+ break;
+
+ default:
+ vpanic("The impossible happened: dis_vxv_dp_arith(ppc)");
+ }
+ IRTemp hiResult = newTemp(Ity_I64);
+ IRTemp loResult = newTemp(Ity_I64);
+ DIP("xv%sdp v%d,v%d,v%d\n", oper_name, (UInt)XT, (UInt)XA, (UInt)XB);
+
+ assign( hiResult,
+ unop( Iop_ReinterpF64asI64,
+ triop( mOp, rm, mkexpr( frA ), mkexpr( frB ) ) ) );
+ assign( loResult,
+ unop( Iop_ReinterpF64asI64,
+ triop( mOp, rm, mkexpr( frA2 ), mkexpr( frB2 ) ) ) );
+ putVSReg( XT,
+ binop( Iop_64HLtoV128, mkexpr( hiResult ), mkexpr( loResult ) ) );
+ break;
+ }
+ case 0x196: // xvsqrtdp
+ {
+ IRTemp hiResult = newTemp(Ity_I64);
+ IRTemp loResult = newTemp(Ity_I64);
+ DIP("xvsqrtdp v%d,v%d\n", (UInt)XT, (UInt)XB);
+
+ assign( hiResult,
+ unop( Iop_ReinterpF64asI64,
+ binop( Iop_SqrtF64, rm, mkexpr( frB ) ) ) );
+ assign( loResult,
+ unop( Iop_ReinterpF64asI64,
+ binop( Iop_SqrtF64, rm, mkexpr( frB2 ) ) ) );
+ putVSReg( XT,
+ binop( Iop_64HLtoV128, mkexpr( hiResult ), mkexpr( loResult ) ) );
+ break;
+ }
+ case 0x184: case 0x1A4: // xvmaddadp, xvmaddmdp (VSX Vector Multiply-Add Double-Precision)
+ case 0x1C4: case 0x1E4: // xvmsubadp, xvmsubmdp (VSX Vector Multiply-Subtract Double-Precision)
+ case 0x384: case 0x3A4: // xvnmaddadp, xvnmaddmdp (VSX Vector Negate Multiply-Add Double-Precision)
+ case 0x3C4: case 0x3E4: // xvnmsubadp, xvnmsubmdp (VSX Vector Negate Multiply-Subtract Double-Precision)
+ {
+ /* xvm{add|sub}mdp XT,XA,XB is element-wise equivalent to fm{add|sub} FRT,FRA,FRC,FRB with . . .
+ * XT == FRC
+ * XA == FRA
+ * XB == FRB
+ *
+ * and for xvm{add|sub}adp . . .
+ * XT == FRB
+ * XA == FRA
+ * XB == FRC
+ */
+ Bool negate;
+ IROp mOp = Iop_INVALID;
+ Char * oper_name = NULL;
+ Bool mdp = False;
+
+ switch (opc2) {
+ case 0x184: case 0x1A4:
+ case 0x384: case 0x3A4:
+ mOp = Iop_MAddF64;
+ oper_name = "add";
+ mdp = (opc2 & 0x0FF) == 0x0A4;
+ break;
+
+ case 0x1C4: case 0x1E4:
+ case 0x3C4: case 0x3E4:
+ mOp = Iop_MSubF64;
+ oper_name = "sub";
+ mdp = (opc2 & 0x0FF) == 0x0E4;
+ break;
+
+ default:
+ vpanic("The impossible happened: dis_vxv_sp_arith(ppc)");
+ }
+
+ switch (opc2) {
+ case 0x384: case 0x3A4:
+ case 0x3C4: case 0x3E4:
+ negate = True;
+ break;
+ default:
+ negate = False;
+ }
+ IRTemp hiResult = newTemp(Ity_I64);
+ IRTemp loResult = newTemp(Ity_I64);
+ IRTemp frT = newTemp(Ity_F64);
+ IRTemp frT2 = newTemp(Ity_F64);
+ DIP("xv%sm%s%s v%d,v%d,v%d\n", negate ? "n" : "", oper_name, mdp ? "mdp" : "adp",
+ (UInt)XT, (UInt)XA, (UInt)XB);
+ assign(frT, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XT ) ) ) );
+ assign(frT2, unop(Iop_ReinterpI64asF64, unop(Iop_V128to64, getVSReg( XT ) ) ) );
+
+ assign( hiResult,
+ unop( Iop_ReinterpF64asI64,
+ qop( mOp,
+ rm,
+ mkexpr( frA ),
+ mkexpr( mdp ? frT : frB ),
+ mkexpr( mdp ? frB : frT ) ) ) );
+ assign( loResult,
+ unop( Iop_ReinterpF64asI64,
+ qop( mOp,
+ rm,
+ mkexpr( frA2 ),
+ mkexpr( mdp ? frT2 : frB2 ),
+ mkexpr( mdp ? frB2 : frT2 ) ) ) );
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ mkexpr( negate ? getNegatedResult( hiResult )
+ : hiResult ),
+ mkexpr( negate ? getNegatedResult( loResult )
+ : loResult ) ) );
+ break;
+ }
+ case 0x1D4: // xvtsqrtdp (VSX Vector Test for software Square Root Double-Precision)
+ {
+ IRTemp frBHi_I64 = newTemp(Ity_I64);
+ IRTemp frBLo_I64 = newTemp(Ity_I64);
+ IRTemp flagsHi = newTemp(Ity_I32);
+ IRTemp flagsLo = newTemp(Ity_I32);
+ UChar crfD = toUChar( IFIELD( theInstr, 23, 3 ) );
+ IRTemp fe_flagHi, fg_flagHi, fe_flagLo, fg_flagLo;
+ fe_flagHi = fg_flagHi = fe_flagLo = fg_flagLo = IRTemp_INVALID;
+
+ DIP("xvtsqrtdp cr%d,v%d\n", (UInt)crfD, (UInt)XB);
+ assign( frBHi_I64, unop(Iop_V128HIto64, getVSReg( XB )) );
+ assign( frBLo_I64, unop(Iop_V128to64, getVSReg( XB )) );
+ do_fp_tsqrt(frBHi_I64, False /*not single precision*/, &fe_flagHi, &fg_flagHi);
+ do_fp_tsqrt(frBLo_I64, False /*not single precision*/, &fe_flagLo, &fg_flagLo);
+ /* The CR field consists of fl_flag || fg_flag || fe_flag || 0b0
+ * where fl_flag == 1 on ppc64.
+ */
+ assign( flagsHi,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flagHi), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flagHi), mkU8( 1 ) ) ) );
+ assign( flagsLo,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flagLo), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flagLo), mkU8( 1 ) ) ) );
+ putGST_field( PPC_GST_CR,
+ binop( Iop_Or32, mkexpr( flagsHi ), mkexpr( flagsLo ) ),
+ crfD );
+ break;
+ }
+ case 0x1F4: // xvtdivdp (VSX Vector Test for software Divide Double-Precision)
+ {
+ IRTemp frBHi_I64 = newTemp(Ity_I64);
+ IRTemp frBLo_I64 = newTemp(Ity_I64);
+ IRTemp frAHi_I64 = newTemp(Ity_I64);
+ IRTemp frALo_I64 = newTemp(Ity_I64);
+ IRTemp flagsHi = newTemp(Ity_I32);
+ IRTemp flagsLo = newTemp(Ity_I32);
+ UChar crfD = toUChar( IFIELD( theInstr, 23, 3 ) );
+ IRTemp fe_flagHi, fg_flagHi, fe_flagLo, fg_flagLo;
+ fe_flagHi = fg_flagHi = fe_flagLo = fg_flagLo = IRTemp_INVALID;
+
+ DIP("xvtdivdp cr%d,v%d,v%d\n", (UInt)crfD, (UInt)XA, (UInt)XB);
+ assign( frAHi_I64, unop(Iop_V128HIto64, getVSReg( XA )) );
+ assign( frALo_I64, unop(Iop_V128to64, getVSReg( XA )) );
+ assign( frBHi_I64, unop(Iop_V128HIto64, getVSReg( XB )) );
+ assign( frBLo_I64, unop(Iop_V128to64, getVSReg( XB )) );
+
+ _do_fp_tdiv(frAHi_I64, frBHi_I64, False/*dp*/, &fe_flagHi, &fg_flagHi);
+ _do_fp_tdiv(frALo_I64, frBLo_I64, False/*dp*/, &fe_flagLo, &fg_flagLo);
+ /* The CR field consists of fl_flag || fg_flag || fe_flag || 0b0
+ * where fl_flag == 1 on ppc64.
+ */
+ assign( flagsHi,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flagHi), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flagHi), mkU8( 1 ) ) ) );
+ assign( flagsLo,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flagLo), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flagLo), mkU8( 1 ) ) ) );
+ putGST_field( PPC_GST_CR,
+ binop( Iop_Or32, mkexpr( flagsHi ), mkexpr( flagsLo ) ),
+ crfD );
+ break;
+ }
+
+ default:
+ vex_printf( "dis_vxv_dp_arith(ppc)(opc2)\n" );
+ return False;
+ }
+ return True;
+}
+
+/*
+ * VSX vector Single Precision Floating Point Arithmetic Instructions
+ */
+static Bool
+dis_vxv_sp_arith ( UInt theInstr, UInt opc2 )
+{
+ /* XX3-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar XT = ifieldRegXT( theInstr );
+ UChar XA = ifieldRegXA( theInstr );
+ UChar XB = ifieldRegXB( theInstr );
+ IRExpr* rm = get_IR_roundingmode();
+ IRTemp a3, a2, a1, a0;
+ IRTemp b3, b2, b1, b0;
+ IRTemp res0 = newTemp(Ity_I32);
+ IRTemp res1 = newTemp(Ity_I32);
+ IRTemp res2 = newTemp(Ity_I32);
+ IRTemp res3 = newTemp(Ity_I32);
+
+ a3 = a2 = a1 = a0 = IRTemp_INVALID;
+ b3 = b2 = b1 = b0 = IRTemp_INVALID;
+
+ if (opc1 != 0x3C) {
+ vex_printf( "dis_vxv_sp_arith(ppc)(instr)\n" );
+ return False;
+ }
+
+ switch (opc2) {
+ case 0x100: // xvaddsp (VSX Vector Add Single-Precision)
+ DIP("xvaddsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop(Iop_Add32Fx4, getVSReg( XA ), getVSReg( XB )) );
+ break;
+
+ case 0x140: // xvmulsp (VSX Vector Multiply Single-Precision)
+ DIP("xvmulsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop(Iop_Mul32Fx4, getVSReg( XA ), getVSReg( XB )) );
+ break;
+
+ case 0x120: // xvsubsp (VSX Vector Subtract Single-Precision)
+ DIP("xvsubsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop(Iop_Sub32Fx4, getVSReg( XA ), getVSReg( XB )) );
+ break;
+
+ case 0x160: // xvdivsp (VSX Vector Divide Single-Precision)
+ {
+ /* Iop_Div32Fx4 is not implemented for ppc64 (in host_ppc_{isel|defs}.c.
+ * So there are two choices:
+ * 1. Implement the xvdivsp with a native insn; or
+ * 2. Extract the 4 single precision floats from each vector
+ * register inputs and perform fdivs on each pair
+ * I will do the latter, due to the general philosophy of
+ * reusing existing implementations when practical.
+ */
+ DIP("xvdivsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ breakV128to4xF64( getVSReg( XA ), &a3, &a2, &a1, &a0 );
+ breakV128to4xF64( getVSReg( XB ), &b3, &b2, &b1, &b0 );
+
+ assign( res0,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ triop( Iop_DivF64r32, rm, mkexpr( a0 ), mkexpr( b0 ) ) ) ) );
+ assign( res1,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ triop( Iop_DivF64r32, rm, mkexpr( a1 ), mkexpr( b1 ) ) ) ) );
+ assign( res2,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ triop( Iop_DivF64r32, rm, mkexpr( a2 ), mkexpr( b2 ) ) ) ) );
+ assign( res3,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ triop( Iop_DivF64r32, rm, mkexpr( a3 ), mkexpr( b3 ) ) ) ) );
+
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64, mkexpr( res3 ), mkexpr( res2 ) ),
+ binop( Iop_32HLto64, mkexpr( res1 ), mkexpr( res0 ) ) ) );
+ break;
+ }
+ case 0x116: // xvsqrtsp (VSX Vector Square Root Single-Precision)
+ {
+ DIP("xvsqrtsp v%d,v%d\n", (UInt)XT, (UInt)XB);
+ breakV128to4xF64( getVSReg( XB ), &b3, &b2, &b1, &b0 );
+ /* Note: The native xvsqrtsp insruction does not always give the same precision
+ * as what we get with Iop_SqrtF64. But it doesn't seem worthwhile to implement
+ * an Iop_SqrtF32 that would give us a lower precision result, albeit more true
+ * to the actual instruction.
+ */
+
+ assign( res0,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ binop(Iop_SqrtF64, rm, mkexpr( b0 ) ) ) ) );
+ assign( res1,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ binop(Iop_SqrtF64, rm, mkexpr( b1 ) ) ) ) );
+ assign( res2,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ binop(Iop_SqrtF64, rm, mkexpr( b2) ) ) ) );
+ assign( res3,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ binop(Iop_SqrtF64, rm, mkexpr( b3 ) ) ) ) );
+
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64, mkexpr( res3 ), mkexpr( res2 ) ),
+ binop( Iop_32HLto64, mkexpr( res1 ), mkexpr( res0 ) ) ) );
+ break;
+ }
+
+ case 0x104: case 0x124: // xvmaddasp, xvmaddmsp (VSX Vector Multiply-Add Single-Precision)
+ case 0x144: case 0x164: // xvmsubasp, xvmsubmsp (VSX Vector Multiply-Subtract Single-Precision)
+ case 0x304: case 0x324: // xvnmaddasp, xvnmaddmsp (VSX Vector Negate Multiply-Add Single-Precision)
+ case 0x344: case 0x364: // xvnmsubasp, xvnmsubmsp (VSX Vector Negate Multiply-Subtract Single-Precision)
+ {
+ IRTemp t3, t2, t1, t0;
+ Bool msp = False;
+ Bool negate;
+ Char * oper_name = NULL;
+ IROp mOp = Iop_INVALID;
+ switch (opc2) {
+ case 0x104: case 0x124:
+ case 0x304: case 0x324:
+ msp = (opc2 & 0x0FF) == 0x024;
+ mOp = Iop_MAddF64r32;
+ oper_name = "madd";
+ break;
+
+ case 0x144: case 0x164:
+ case 0x344: case 0x364:
+ msp = (opc2 & 0x0FF) == 0x064;
+ mOp = Iop_MSubF64r32;
+ oper_name = "sub";
+ break;
+
+ default:
+ vpanic("The impossible happened: dis_vxv_sp_arith(ppc)");
+ }
+
+ switch (opc2) {
+ case 0x304: case 0x324:
+ case 0x344: case 0x364:
+ negate = True;
+ break;
+
+ default:
+ negate = False;
+ }
+
+ DIP("xv%sm%s%s v%d,v%d,v%d\n", negate ? "n" : "", oper_name, msp ? "msp" : "asp",
+ (UInt)XT, (UInt)XA, (UInt)XB);
+
+ t3 = t2 = t1 = t0 = IRTemp_INVALID;
+ breakV128to4xF64( getVSReg( XA ), &a3, &a2, &a1, &a0 );
+ breakV128to4xF64( getVSReg( XB ), &b3, &b2, &b1, &b0 );
+ breakV128to4xF64( getVSReg( XT ), &t3, &t2, &t1, &t0 );
+
+ assign( res0,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ qop( mOp,
+ rm,
+ mkexpr( a0 ),
+ mkexpr( msp ? t0 : b0 ),
+ mkexpr( msp ? b0 : t0 ) ) ) ) );
+ assign( res1,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ qop( mOp,
+ rm,
+ mkexpr( a1 ),
+ mkexpr( msp ? t1 : b1 ),
+ mkexpr( msp ? b1 : t1 ) ) ) ) );
+ assign( res2,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ qop( mOp,
+ rm,
+ mkexpr( a2 ),
+ mkexpr( msp ? t2 : b2 ),
+ mkexpr( msp ? b2 : t2 ) ) ) ) );
+ assign( res3,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ qop( mOp,
+ rm,
+ mkexpr( a3 ),
+ mkexpr( msp ? t3 : b3 ),
+ mkexpr( msp ? b3 : t3 ) ) ) ) );
+
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64, mkexpr( negate ? getNegatedResult_32( res3 ) : res3 ),
+ mkexpr( negate ? getNegatedResult_32( res2 ) : res2 ) ),
+ binop( Iop_32HLto64, mkexpr( negate ? getNegatedResult_32( res1 ) : res1 ),
+ mkexpr( negate ? getNegatedResult_32( res0 ) : res0 ) ) ) );
+
+ break;
+ }
+ case 0x154: // xvtsqrtsp (VSX Vector Test for software Square Root Single-Precision)
+ {
+ IRTemp flags0 = newTemp(Ity_I32);
+ IRTemp flags1 = newTemp(Ity_I32);
+ IRTemp flags2 = newTemp(Ity_I32);
+ IRTemp flags3 = newTemp(Ity_I32);
+ UChar crfD = toUChar( IFIELD( theInstr, 23, 3 ) );
+ IRTemp fe_flag0, fg_flag0, fe_flag1, fg_flag1;
+ IRTemp fe_flag2, fg_flag2, fe_flag3, fg_flag3;
+ fe_flag0 = fg_flag0 = fe_flag1 = fg_flag1 = IRTemp_INVALID;
+ fe_flag2 = fg_flag2 = fe_flag3 = fg_flag3 = IRTemp_INVALID;
+ DIP("xvtsqrtsp cr%d,v%d\n", (UInt)crfD, (UInt)XB);
+
+ breakV128to4x32( getVSReg( XB ), &b3, &b2, &b1, &b0 );
+ do_fp_tsqrt(b0, True /* single precision*/, &fe_flag0, &fg_flag0);
+ do_fp_tsqrt(b1, True /* single precision*/, &fe_flag1, &fg_flag1);
+ do_fp_tsqrt(b2, True /* single precision*/, &fe_flag2, &fg_flag2);
+ do_fp_tsqrt(b3, True /* single precision*/, &fe_flag3, &fg_flag3);
+
+ /* The CR field consists of fl_flag || fg_flag || fe_flag || 0b0
+ * where fl_flag == 1 on ppc64.
+ */
+ assign( flags0,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flag0), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flag0), mkU8( 1 ) ) ) );
+ assign( flags1,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flag1), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flag1), mkU8( 1 ) ) ) );
+ assign( flags2,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flag2), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flag2), mkU8( 1 ) ) ) );
+ assign( flags3,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flag3), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flag3), mkU8( 1 ) ) ) );
+ putGST_field( PPC_GST_CR,
+ binop( Iop_Or32,
+ mkexpr( flags0 ),
+ binop( Iop_Or32,
+ mkexpr( flags1 ),
+ binop( Iop_Or32,
+ mkexpr( flags2 ),
+ mkexpr( flags3 ) ) ) ),
+ crfD );
+
+ break;
+ }
+ case 0x174: // xvtdivsp (VSX Vector Test for software Divide Single-Precision)
+ {
+ IRTemp flags0 = newTemp(Ity_I32);
+ IRTemp flags1 = newTemp(Ity_I32);
+ IRTemp flags2 = newTemp(Ity_I32);
+ IRTemp flags3 = newTemp(Ity_I32);
+ UChar crfD = toUChar( IFIELD( theInstr, 23, 3 ) );
+ IRTemp fe_flag0, fg_flag0, fe_flag1, fg_flag1;
+ IRTemp fe_flag2, fg_flag2, fe_flag3, fg_flag3;
+ fe_flag0 = fg_flag0 = fe_flag1 = fg_flag1 = IRTemp_INVALID;
+ fe_flag2 = fg_flag2 = fe_flag3 = fg_flag3 = IRTemp_INVALID;
+ DIP("xvtdivsp cr%d,v%d,v%d\n", (UInt)crfD, (UInt)XA, (UInt)XB);
+
+ breakV128to4x32( getVSReg( XA ), &a3, &a2, &a1, &a0 );
+ breakV128to4x32( getVSReg( XB ), &b3, &b2, &b1, &b0 );
+ _do_fp_tdiv(a0, b0, True /* single precision*/, &fe_flag0, &fg_flag0);
+ _do_fp_tdiv(a1, b1, True /* single precision*/, &fe_flag1, &fg_flag1);
+ _do_fp_tdiv(a2, b2, True /* single precision*/, &fe_flag2, &fg_flag2);
+ _do_fp_tdiv(a3, b3, True /* single precision*/, &fe_flag3, &fg_flag3);
+
+ /* The CR field consists of fl_flag || fg_flag || fe_flag || 0b0
+ * where fl_flag == 1 on ppc64.
+ */
+ assign( flags0,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flag0), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flag0), mkU8( 1 ) ) ) );
+ assign( flags1,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flag1), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flag1), mkU8( 1 ) ) ) );
+ assign( flags2,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flag2), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flag2), mkU8( 1 ) ) ) );
+ assign( flags3,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flag3), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flag3), mkU8( 1 ) ) ) );
+ putGST_field( PPC_GST_CR,
+ binop( Iop_Or32,
+ mkexpr( flags0 ),
+ binop( Iop_Or32,
+ mkexpr( flags1 ),
+ binop( Iop_Or32,
+ mkexpr( flags2 ),
+ mkexpr( flags3 ) ) ) ),
+ crfD );
+
+ break;
+ }
+
+ default:
+ vex_printf( "dis_vxv_sp_arith(ppc)(opc2)\n" );
+ return False;
+ }
+ return True;
+}
+
+typedef enum {
+ PPC_CMP_EQ = 2,
+ PPC_CMP_GT = 4,
+ PPC_CMP_GE = 6,
+ PPC_CMP_LT = 8
+} ppc_cmp_t;
+
+
+/*
+ This helper function takes as input the IRExpr returned
+ from a binop( Iop_CmpF64, fpA, fpB), whose result is returned
+ in IR form. This helper function converts it to PPC form.
+
+ Map compare result from IR to PPC
+
+ FP cmp result | PPC | IR
+ --------------------------
+ UN | 0x1 | 0x45
+ EQ | 0x2 | 0x40
+ GT | 0x4 | 0x00
+ LT | 0x8 | 0x01
+
+ condcode = Shl(1, (~(ccIR>>5) & 2)
+ | ((ccIR ^ (ccIR>>6)) & 1)
+*/
+static IRTemp
+get_fp_cmp_CR_val (IRExpr * ccIR_expr)
+{
+ IRTemp condcode = newTemp( Ity_I32 );
+ IRTemp ccIR = newTemp( Ity_I32 );
+
+ assign(ccIR, ccIR_expr);
+ assign( condcode,
+ binop( Iop_Shl32,
+ mkU32( 1 ),
+ unop( Iop_32to8,
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ unop( Iop_Not32,
+ binop( Iop_Shr32,
+ mkexpr( ccIR ),
+ mkU8( 5 ) ) ),
+ mkU32( 2 ) ),
+ binop( Iop_And32,
+ binop( Iop_Xor32,
+ mkexpr( ccIR ),
+ binop( Iop_Shr32,
+ mkexpr( ccIR ),
+ mkU8( 6 ) ) ),
+ mkU32( 1 ) ) ) ) ) );
+ return condcode;
+}
+
+/*
+ * Helper function for get_max_min_fp for ascertaining the max or min between two doubles
+ * following these special rules:
+ * - The max/min of a QNaN and any value is that value
+ * (When two QNaNs are being compared, the frA QNaN is the return value.)
+ * - The max/min of any value and an SNaN is that SNaN converted to a QNaN
+ * (When two SNaNs are being compared, the frA SNaN is converted to a QNaN.)
+ */
+static IRExpr * _get_maxmin_fp_NaN(IRTemp frA_I64, IRTemp frB_I64)
+{
+ IRTemp frA_isNaN = newTemp(Ity_I1);
+ IRTemp frB_isNaN = newTemp(Ity_I1);
+ IRTemp frA_isSNaN = newTemp(Ity_I1);
+ IRTemp frB_isSNaN = newTemp(Ity_I1);
+ IRTemp frA_isQNaN = newTemp(Ity_I1);
+ IRTemp frB_isQNaN = newTemp(Ity_I1);
+
+ assign( frA_isNaN, is_NaN( frA_I64 ) );
+ assign( frB_isNaN, is_NaN( frB_I64 ) );
+ // If operand is a NAN and bit 12 is '0', then it's an SNaN
+ assign( frA_isSNaN,
+ mkAND1( mkexpr(frA_isNaN),
+ binop( Iop_CmpEQ32,
+ binop( Iop_And32,
+ unop( Iop_64HIto32, mkexpr( frA_I64 ) ),
+ mkU32( 0x00080000 ) ),
+ mkU32( 0 ) ) ) );
+ assign( frB_isSNaN,
+ mkAND1( mkexpr(frB_isNaN),
+ binop( Iop_CmpEQ32,
+ binop( Iop_And32,
+ unop( Iop_64HIto32, mkexpr( frB_I64 ) ),
+ mkU32( 0x00080000 ) ),
+ mkU32( 0 ) ) ) );
+ assign( frA_isQNaN,
+ mkAND1( mkexpr( frA_isNaN ), unop( Iop_Not1, mkexpr( frA_isSNaN ) ) ) );
+ assign( frB_isQNaN,
+ mkAND1( mkexpr( frB_isNaN ), unop( Iop_Not1, mkexpr( frB_isSNaN ) ) ) );
+
+ /* Based on the rules specified in the function prologue, the algorithm is as follows:
+ * <<<<<<<<<>>>>>>>>>>>>>>>>>>
+ * if frA is a SNaN
+ * result = frA converted to QNaN
+ * else if frB is a SNaN
+ * result = frB converted to QNaN
+ * else if frB is a QNaN
+ * result = frA
+ * // One of frA or frB was a NaN in order for this function to be called, so
+ * // if we get to this point, we KNOW that frA must be a QNaN.
+ * else // frA is a QNaN
+ * result = frB
+ * <<<<<<<<<>>>>>>>>>>>>>>>>>>
+ */
+
+#define SNAN_MASK 0x0008000000000000ULL
+ return
+ IRExpr_Mux0X(unop(Iop_1Uto8, mkexpr(frA_isSNaN)),
+ /* else: if frB is a SNaN */
+ IRExpr_Mux0X(unop(Iop_1Uto8, mkexpr(frB_isSNaN)),
+ /* else: if frB is a QNaN */
+ IRExpr_Mux0X(unop(Iop_1Uto8, mkexpr(frB_isQNaN)),
+ /* else: frA is a QNaN, so result = frB */
+ mkexpr(frB_I64),
+ /* then: result = frA */
+ mkexpr(frA_I64)),
+ /* then: result = frB converted to QNaN */
+ binop(Iop_Or64, mkexpr(frB_I64), mkU64(SNAN_MASK))),
+ /* then: result = frA converted to QNaN */
+ binop(Iop_Or64, mkexpr(frA_I64), mkU64(SNAN_MASK)));
+}
+
+/*
+ * Helper function for get_max_min_fp.
+ */
+static IRExpr * _get_maxmin_fp_cmp(IRTemp src1, IRTemp src2, Bool isMin)
+{
+ IRTemp src1cmpsrc2 = get_fp_cmp_CR_val( binop( Iop_CmpF64,
+ unop( Iop_ReinterpI64asF64,
+ mkexpr( src1 ) ),
+ unop( Iop_ReinterpI64asF64,
+ mkexpr( src2 ) ) ) );
+
+ return IRExpr_Mux0X( unop( Iop_1Uto8,
+ binop( Iop_CmpEQ32,
+ mkexpr( src1cmpsrc2 ),
+ mkU32( isMin ? PPC_CMP_LT : PPC_CMP_GT ) ) ),
+ /* else: use src2 */
+ mkexpr( src2 ),
+ /* then: use src1 */
+ mkexpr( src1 ) );
+}
+
+/*
+ * Helper function for "Maximum/Minimum Double Precision" operations.
+ * Arguments: frA and frb are Ity_I64
+ * Returns Ity_I64 IRExpr that answers the "which is Maxiumum/Minimum" question
+ */
+static IRExpr * get_max_min_fp(IRTemp frA_I64, IRTemp frB_I64, Bool isMin)
+{
+ /* There are three special cases where get_fp_cmp_CR_val is not helpful
+ * for ascertaining the maximum between two doubles:
+ * 1. The max/min of +0 and -0 is +0.
+ * 2. The max/min of a QNaN and any value is that value.
+ * 3. The max/min of any value and an SNaN is that SNaN converted to a QNaN.
+ * We perform the check for [+/-]0 here in this function and use the
+ * _get_maxmin_fp_NaN helper for the two NaN cases; otherwise we call _get_maxmin_fp_cmp
+ * to do the standard comparison function.
+ */
+ IRTemp anyNaN = newTemp(Ity_I1);
+ IRTemp frA_isZero = newTemp(Ity_I1);
+ IRTemp frB_isZero = newTemp(Ity_I1);
+ assign(frA_isZero, is_Zero(frA_I64, False /*not single precision*/ ));
+ assign(frB_isZero, is_Zero(frB_I64, False /*not single precision*/ ));
+ assign(anyNaN, mkOR1(is_NaN(frA_I64), is_NaN(frB_I64)));
+#define MINUS_ZERO 0x8000000000000000ULL
+
+ return IRExpr_Mux0X( unop( Iop_1Uto8,
+ /* If both arguments are zero . . . */
+ mkAND1( mkexpr( frA_isZero ), mkexpr( frB_isZero ) ) ),
+ /* else: check if either input is a NaN*/
+ IRExpr_Mux0X( unop( Iop_1Uto8, mkexpr( anyNaN ) ),
+ /* else: use "comparison helper" */
+ _get_maxmin_fp_cmp( frB_I64, frA_I64, isMin ),
+ /* then: use "NaN helper" */
+ _get_maxmin_fp_NaN( frA_I64, frB_I64 ) ),
+ /* then: if frA is -0 and isMin==True, return -0;
+ * else if frA is +0 and isMin==False; return +0;
+ * otherwise, simply return frB. */
+ IRExpr_Mux0X( unop( Iop_1Uto8,
+ binop( Iop_CmpEQ32,
+ unop( Iop_64HIto32,
+ mkexpr( frA_I64 ) ),
+ mkU32( isMin ? 0x80000000 : 0 ) ) ),
+ mkexpr( frB_I64 ),
+ mkU64( isMin ? MINUS_ZERO : 0ULL ) ) );
+}
+
+/*
+ * Helper function for vector/scalar double precision fp round to integer instructions.
+ */
+static IRExpr * _do_vsx_fp_roundToInt(IRTemp frB_I64, UInt opc2, UChar * insn_suffix)
+{
+
+ /* The same rules apply for x{s|v}rdpi{m|p|c|z} as for floating point round operations (fri{m|n|p|z}). */
+ IRTemp frB = newTemp(Ity_F64);
+ IRTemp frD = newTemp(Ity_F64);
+ IRTemp intermediateResult = newTemp(Ity_I64);
+ IRTemp is_SNAN = newTemp(Ity_I1);
+ IRExpr * hi32;
+ IRExpr * rxpi_rm;
+ switch (opc2 & 0x7F) {
+ case 0x72:
+ insn_suffix = "m";
+ rxpi_rm = mkU32(Irrm_NegINF);
+ break;
+ case 0x52:
+ insn_suffix = "p";
+ rxpi_rm = mkU32(Irrm_PosINF);
+ break;
+ case 0x56:
+ insn_suffix = "c";
+ rxpi_rm = get_IR_roundingmode();
+ break;
+ case 0x32:
+ insn_suffix = "z";
+ rxpi_rm = mkU32(Irrm_ZERO);
+ break;
+ case 0x12:
+ insn_suffix = "";
+ rxpi_rm = mkU32(Irrm_NEAREST);
+ break;
+
+ default: // Impossible to get here
+ vex_printf( "_do_vsx_fp_roundToInt(ppc)(opc2)\n" );
+ return NULL;
+ }
+ assign(frB, unop(Iop_ReinterpI64asF64, mkexpr(frB_I64)));
+ assign( intermediateResult,
+ binop( Iop_F64toI64S, rxpi_rm,
+ mkexpr( frB ) ) );
+
+ /* don't use the rounded integer if frB is outside -9e18..9e18 */
+ /* F64 has only log10(2**52) significant digits anyway */
+ /* need to preserve sign of zero */
+ /* frD = (fabs(frB) > 9e18) ? frB :
+ (sign(frB)) ? -fabs((double)intermediateResult) : (double)intermediateResult */
+ assign( frD,
+ IRExpr_Mux0X( unop( Iop_32to8,
+ binop( Iop_CmpF64,
+ IRExpr_Const( IRConst_F64( 9e18 ) ),
+ unop( Iop_AbsF64, mkexpr( frB ) ) ) ),
+ IRExpr_Mux0X( unop( Iop_32to8,
+ binop( Iop_Shr32,
+ unop( Iop_64HIto32,
+ mkexpr( frB_I64 ) ),
+ mkU8( 31 ) ) ),
+ binop( Iop_I64StoF64,
+ mkU32( 0 ),
+ mkexpr( intermediateResult ) ),
+ unop( Iop_NegF64,
+ unop( Iop_AbsF64,
+ binop( Iop_I64StoF64,
+ mkU32( 0 ),
+ mkexpr( intermediateResult ) ) ) ) ),
+ mkexpr( frB ) ) );
+
+ /* See Appendix "Floating-Point Round to Integer Model" in ISA doc.
+ * If frB is a SNAN, then frD <- frB, with bit 12 set to '1'.
+ */
+#define SNAN_MASK 0x0008000000000000ULL
+ hi32 = unop( Iop_64HIto32, mkexpr(frB_I64) );
+ assign( is_SNAN,
+ mkAND1( is_NaN( frB_I64 ),
+ binop( Iop_CmpEQ32,
+ binop( Iop_And32, hi32, mkU32( 0x00080000 ) ),
+ mkU32( 0 ) ) ) );
+
+ return IRExpr_Mux0X( unop( Iop_1Uto8, mkexpr( is_SNAN ) ),
+ mkexpr( frD ),
+ unop( Iop_ReinterpI64asF64,
+ binop( Iop_Xor64,
+ mkU64( SNAN_MASK ),
+ mkexpr( frB_I64 ) ) ) );
+}
+
+/*
+ * Miscellaneous VSX vector instructions
+ */
+static Bool
+dis_vxv_misc ( UInt theInstr, UInt opc2 )
+{
+ /* XX3-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar XT = ifieldRegXT( theInstr );
+ UChar XB = ifieldRegXB( theInstr );
+
+ if (opc1 != 0x3C) {
+ vex_printf( "dis_vxv_misc(ppc)(instr)\n" );
+ return False;
+ }
+
+ switch (opc2) {
+ case 0x1B4: // xvredp (VSX Vector Reciprocal Estimate Double-Precision)
+ case 0x194: // xvrsqrtedp (VSX Vector Reciprocal Square Root Estimate
+ // Double-Precision)
+ {
+ IRExpr* ieee_one = IRExpr_Const(IRConst_F64i(0x3ff0000000000000ULL));
+ IRExpr* rm = get_IR_roundingmode();
+ IRTemp frB = newTemp(Ity_I64);
+ IRTemp frB2 = newTemp(Ity_I64);
+ Bool redp = opc2 == 0x1B4;
+ IRTemp sqrtHi = newTemp(Ity_F64);
+ IRTemp sqrtLo = newTemp(Ity_F64);
+ assign(frB, unop(Iop_V128HIto64, getVSReg( XB )));
+ assign(frB2, unop(Iop_V128to64, getVSReg( XB )));
+
+ DIP("%s v%d,v%d\n", redp ? "xvredp" : "xvrsqrtedp", (UInt)XT, (UInt)XB);
+ if (!redp) {
+ assign( sqrtHi,
+ binop( Iop_SqrtF64,
+ rm,
+ unop( Iop_ReinterpI64asF64, mkexpr( frB ) ) ) );
+ assign( sqrtLo,
+ binop( Iop_SqrtF64,
+ rm,
+ unop( Iop_ReinterpI64asF64, mkexpr( frB2 ) ) ) );
+ }
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64,
+ triop( Iop_DivF64,
+ rm,
+ ieee_one,
+ redp ? unop( Iop_ReinterpI64asF64,
+ mkexpr( frB ) )
+ : mkexpr( sqrtHi ) ) ),
+ unop( Iop_ReinterpF64asI64,
+ triop( Iop_DivF64,
+ rm,
+ ieee_one,
+ redp ? unop( Iop_ReinterpI64asF64,
+ mkexpr( frB2 ) )
+ : mkexpr( sqrtLo ) ) ) ) );
+ break;
+
+ }
+ case 0x134: // xvresp (VSX Vector Reciprocal Estimate Single-Precision)
+ case 0x114: // xvrsqrtesp (VSX Vector Reciprocal Square Root Estimate Single-Precision)
+ {
+ IRTemp b3, b2, b1, b0;
+ IRTemp res0 = newTemp(Ity_I32);
+ IRTemp res1 = newTemp(Ity_I32);
+ IRTemp res2 = newTemp(Ity_I32);
+ IRTemp res3 = newTemp(Ity_I32);
+ IRTemp sqrt3 = newTemp(Ity_F64);
+ IRTemp sqrt2 = newTemp(Ity_F64);
+ IRTemp sqrt1 = newTemp(Ity_F64);
+ IRTemp sqrt0 = newTemp(Ity_F64);
+ IRExpr* rm = get_IR_roundingmode();
+ Bool resp = opc2 == 0x134;
+
+ IRExpr* ieee_one = IRExpr_Const(IRConst_F64i(0x3ff0000000000000ULL));
+
+ b3 = b2 = b1 = b0 = IRTemp_INVALID;
+ DIP("%s v%d,v%d\n", resp ? "xvresp" : "xvrsqrtesp", (UInt)XT, (UInt)XB);
+ breakV128to4xF64( getVSReg( XB ), &b3, &b2, &b1, &b0 );
+
+ if (!resp) {
+ assign( sqrt3, binop( Iop_SqrtF64, rm, mkexpr( b3 ) ) );
+ assign( sqrt2, binop( Iop_SqrtF64, rm, mkexpr( b2 ) ) );
+ assign( sqrt1, binop( Iop_SqrtF64, rm, mkexpr( b1 ) ) );
+ assign( sqrt0, binop( Iop_SqrtF64, rm, mkexpr( b0 ) ) );
+ }
+
+ assign( res0,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ triop( Iop_DivF64r32,
+ rm,
+ ieee_one,
+ resp ? mkexpr( b0 ) : mkexpr( sqrt0 ) ) ) ) );
+ assign( res1,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ triop( Iop_DivF64r32,
+ rm,
+ ieee_one,
+ resp ? mkexpr( b1 ) : mkexpr( sqrt1 ) ) ) ) );
+ assign( res2,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ triop( Iop_DivF64r32,
+ rm,
+ ieee_one,
+ resp ? mkexpr( b2 ) : mkexpr( sqrt2 ) ) ) ) );
+ assign( res3,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ triop( Iop_DivF64r32,
+ rm,
+ ieee_one,
+ resp ? mkexpr( b3 ) : mkexpr( sqrt3 ) ) ) ) );
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64, mkexpr( res3 ), mkexpr( res2 ) ),
+ binop( Iop_32HLto64, mkexpr( res1 ), mkexpr( res0 ) ) ) );
+ break;
+ }
+ case 0x300: // xvmaxsp (VSX Vector Maximum Single-Precision)
+ case 0x320: // xvminsp (VSX Vector Minimum Single-Precision)
+ {
+ UChar XA = ifieldRegXA( theInstr );
+ IRTemp a3, a2, a1, a0;
+ IRTemp b3, b2, b1, b0;
+ IRTemp res0 = newTemp( Ity_I32 );
+ IRTemp res1 = newTemp( Ity_I32 );
+ IRTemp res2 = newTemp( Ity_I32 );
+ IRTemp res3 = newTemp( Ity_I32 );
+ IRTemp a0_I64 = newTemp( Ity_I64 );
+ IRTemp a1_I64 = newTemp( Ity_I64 );
+ IRTemp a2_I64 = newTemp( Ity_I64 );
+ IRTemp a3_I64 = newTemp( Ity_I64 );
+ IRTemp b0_I64 = newTemp( Ity_I64 );
+ IRTemp b1_I64 = newTemp( Ity_I64 );
+ IRTemp b2_I64 = newTemp( Ity_I64 );
+ IRTemp b3_I64 = newTemp( Ity_I64 );
+
+ Bool isMin = opc2 == 0x320 ? True : False;
+
+ a3 = a2 = a1 = a0 = IRTemp_INVALID;
+ b3 = b2 = b1 = b0 = IRTemp_INVALID;
+ DIP("%s v%d,v%d v%d\n", isMin ? "xvminsp" : "xvmaxsp", (UInt)XT, (UInt)XA, (UInt)XB);
+ breakV128to4xF64( getVSReg( XA ), &a3, &a2, &a1, &a0 );
+ breakV128to4xF64( getVSReg( XB ), &b3, &b2, &b1, &b0 );
+ assign( a0_I64, unop( Iop_ReinterpF64asI64, mkexpr( a0 ) ) );
+ assign( b0_I64, unop( Iop_ReinterpF64asI64, mkexpr( b0 ) ) );
+ assign( a1_I64, unop( Iop_ReinterpF64asI64, mkexpr( a1 ) ) );
+ assign( b1_I64, unop( Iop_ReinterpF64asI64, mkexpr( b1 ) ) );
+ assign( a2_I64, unop( Iop_ReinterpF64asI64, mkexpr( a2 ) ) );
+ assign( b2_I64, unop( Iop_ReinterpF64asI64, mkexpr( b2 ) ) );
+ assign( a3_I64, unop( Iop_ReinterpF64asI64, mkexpr( a3 ) ) );
+ assign( b3_I64, unop( Iop_ReinterpF64asI64, mkexpr( b3 ) ) );
+ assign( res0,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ unop( Iop_ReinterpI64asF64,
+ get_max_min_fp( a0_I64, b0_I64, isMin ) ) ) ) );
+ assign( res1,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ unop( Iop_ReinterpI64asF64,
+ get_max_min_fp( a1_I64, b1_I64, isMin ) ) ) ) );
+ assign( res2,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ unop( Iop_ReinterpI64asF64,
+ get_max_min_fp( a2_I64, b2_I64, isMin ) ) ) ) );
+ assign( res3,
+ unop( Iop_ReinterpF32asI32,
+ unop( Iop_TruncF64asF32,
+ unop( Iop_ReinterpI64asF64,
+ get_max_min_fp( a3_I64, b3_I64, isMin ) ) ) ) );
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64, mkexpr( res3 ), mkexpr( res2 ) ),
+ binop( Iop_32HLto64, mkexpr( res1 ), mkexpr( res0 ) ) ) );
+ break;
+ }
+ case 0x380: // xvmaxdp (VSX Vector Maximum Double-Precision)
+ case 0x3A0: // xvmindp (VSX Vector Minimum Double-Precision)
+ {
+ UChar XA = ifieldRegXA( theInstr );
+ IRTemp frA = newTemp(Ity_I64);
+ IRTemp frB = newTemp(Ity_I64);
+ IRTemp frA2 = newTemp(Ity_I64);
+ IRTemp frB2 = newTemp(Ity_I64);
+ Bool isMin = opc2 == 0x3A0 ? True : False;
+
+ assign(frA, unop(Iop_V128HIto64, getVSReg( XA )));
+ assign(frB, unop(Iop_V128HIto64, getVSReg( XB )));
+ assign(frA2, unop(Iop_V128to64, getVSReg( XA )));
+ assign(frB2, unop(Iop_V128to64, getVSReg( XB )));
+ DIP("%s v%d,v%d v%d\n", isMin ? "xvmindp" : "xvmaxdp", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop( Iop_64HLtoV128, get_max_min_fp(frA, frB, isMin), get_max_min_fp(frA2, frB2, isMin) ) );
+
+ break;
+ }
+ case 0x3c0: // xvcpsgndp (VSX Vector Copy Sign Double-Precision)
+ {
+ UChar XA = ifieldRegXA( theInstr );
+ IRTemp frA = newTemp(Ity_I64);
+ IRTemp frB = newTemp(Ity_I64);
+ IRTemp frA2 = newTemp(Ity_I64);
+ IRTemp frB2 = newTemp(Ity_I64);
+ assign(frA, unop(Iop_V128HIto64, getVSReg( XA )));
+ assign(frB, unop(Iop_V128HIto64, getVSReg( XB )));
+ assign(frA2, unop(Iop_V128to64, getVSReg( XA )));
+ assign(frB2, unop(Iop_V128to64, getVSReg( XB )));
+
+ DIP("xvcpsgndp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_Or64,
+ binop( Iop_And64,
+ mkexpr( frA ),
+ mkU64( SIGN_BIT ) ),
+ binop( Iop_And64,
+ mkexpr( frB ),
+ mkU64( SIGN_MASK ) ) ),
+ binop( Iop_Or64,
+ binop( Iop_And64,
+ mkexpr( frA2 ),
+ mkU64( SIGN_BIT ) ),
+ binop( Iop_And64,
+ mkexpr( frB2 ),
+ mkU64( SIGN_MASK ) ) ) ) );
+ break;
+ }
+ case 0x340: // xvcpsgnsp
+ {
+ UChar XA = ifieldRegXA( theInstr );
+ IRTemp a3_I64, a2_I64, a1_I64, a0_I64;
+ IRTemp b3_I64, b2_I64, b1_I64, b0_I64;
+ IRTemp resHi = newTemp(Ity_I64);
+ IRTemp resLo = newTemp(Ity_I64);
+
+ a3_I64 = a2_I64 = a1_I64 = a0_I64 = IRTemp_INVALID;
+ b3_I64 = b2_I64 = b1_I64 = b0_I64 = IRTemp_INVALID;
+ DIP("xvcpsgnsp v%d,v%d v%d\n",(UInt)XT, (UInt)XA, (UInt)XB);
+ breakV128to4x64U( getVSReg( XA ), &a3_I64, &a2_I64, &a1_I64, &a0_I64 );
+ breakV128to4x64U( getVSReg( XB ), &b3_I64, &b2_I64, &b1_I64, &b0_I64 );
+
+ assign( resHi,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ unop(Iop_64to32, mkexpr( a3_I64 ) ),
+ mkU32( SIGN_BIT32 ) ),
+ binop( Iop_And32,
+ unop(Iop_64to32, mkexpr( b3_I64 ) ),
+ mkU32( SIGN_MASK32) ) ),
+
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ unop(Iop_64to32, mkexpr( a2_I64 ) ),
+ mkU32( SIGN_BIT32 ) ),
+ binop( Iop_And32,
+ unop(Iop_64to32, mkexpr( b2_I64 ) ),
+ mkU32( SIGN_MASK32 ) ) ) ) );
+ assign( resLo,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ unop(Iop_64to32, mkexpr( a1_I64 ) ),
+ mkU32( SIGN_BIT32 ) ),
+ binop( Iop_And32,
+ unop(Iop_64to32, mkexpr( b1_I64 ) ),
+ mkU32( SIGN_MASK32 ) ) ),
+
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ unop(Iop_64to32, mkexpr( a0_I64 ) ),
+ mkU32( SIGN_BIT32 ) ),
+ binop( Iop_And32,
+ unop(Iop_64to32, mkexpr( b0_I64 ) ),
+ mkU32( SIGN_MASK32 ) ) ) ) );
+ putVSReg( XT, binop( Iop_64HLtoV128, mkexpr( resHi ), mkexpr( resLo ) ) );
+ break;
+ }
+ case 0x3B2: // xvabsdp (VSX Vector Absolute Value Double-Precision)
+ case 0x3D2: // xvnabsdp VSX Vector Negative Absolute Value Double-Precision)
+ {
+ IRTemp frB = newTemp(Ity_F64);
+ IRTemp frB2 = newTemp(Ity_F64);
+ IRTemp abs_resultHi = newTemp(Ity_F64);
+ IRTemp abs_resultLo = newTemp(Ity_F64);
+ Bool make_negative = (opc2 == 0x3D2) ? True : False;
+ assign(frB, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XB ))));
+ assign(frB2, unop(Iop_ReinterpI64asF64, unop(Iop_V128to64, getVSReg(XB))));
+
+ DIP("xv%sabsdp v%d,v%d\n", make_negative ? "n" : "", (UInt)XT, (UInt)XB);
+ if (make_negative) {
+ assign(abs_resultHi, unop( Iop_NegF64, unop( Iop_AbsF64, mkexpr( frB ) ) ) );
+ assign(abs_resultLo, unop( Iop_NegF64, unop( Iop_AbsF64, mkexpr( frB2 ) ) ) );
+
+ } else {
+ assign(abs_resultHi, unop( Iop_AbsF64, mkexpr( frB ) ) );
+ assign(abs_resultLo, unop( Iop_AbsF64, mkexpr( frB2 ) ) );
+ }
+ putVSReg( XT, binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64, mkexpr( abs_resultHi ) ),
+ unop( Iop_ReinterpF64asI64, mkexpr( abs_resultLo ) ) ) );
+ break;
+ }
+ case 0x332: // xvabssp (VSX Vector Absolute Value Single-Precision)
+ case 0x352: // xvnabssp (VSX Vector Negative Absolute Value Single-Precision)
+ {
+ /*
+ * The Iop_AbsF32 IRop is not implemented for ppc64 since, up until introduction
+ * of xvabssp, there has not been an abs(sp) type of instruction. But since emulation
+ * of this function is so easy using shifts, I choose to emulate this instruction that
+ * way versus a native instruction method of implementation.
+ */
+ Bool make_negative = (opc2 == 0x352) ? True : False;
+ IRTemp shiftVector = newTemp(Ity_V128);
+ IRTemp absVal_vector = newTemp(Ity_V128);
+ assign( shiftVector,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64, mkU32( 1 ), mkU32( 1 ) ),
+ binop( Iop_32HLto64, mkU32( 1 ), mkU32( 1 ) ) ) );
+ assign( absVal_vector,
+ binop( Iop_Shr32x4,
+ binop( Iop_Shl32x4,
+ getVSReg( XB ),
+ mkexpr( shiftVector ) ),
+ mkexpr( shiftVector ) ) );
+ if (make_negative) {
+ IRTemp signBit_vector = newTemp(Ity_V128);
+ assign( signBit_vector,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64,
+ mkU32( 0x80000000 ),
+ mkU32( 0x80000000 ) ),
+ binop( Iop_32HLto64,
+ mkU32( 0x80000000 ),
+ mkU32( 0x80000000 ) ) ) );
+ putVSReg( XT,
+ binop( Iop_OrV128,
+ mkexpr( absVal_vector ),
+ mkexpr( signBit_vector ) ) );
+ } else {
+ putVSReg( XT, mkexpr( absVal_vector ) );
+ }
+ break;
+ }
+ case 0x3F2: // xvnegdp (VSX Vector Negate Double-Precision)
+ {
+ IRTemp frB = newTemp(Ity_F64);
+ IRTemp frB2 = newTemp(Ity_F64);
+ assign(frB, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XB ))));
+ assign(frB2, unop(Iop_ReinterpI64asF64, unop(Iop_V128to64, getVSReg(XB))));
+ DIP("xvnegdp v%d,v%d\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64,
+ unop( Iop_NegF64, mkexpr( frB ) ) ),
+ unop( Iop_ReinterpF64asI64,
+ unop( Iop_NegF64, mkexpr( frB2 ) ) ) ) );
+ break;
+ }
+ case 0x192: // xvrdpi (VSX Vector Round to Double-Precision Integer using round toward Nearest Away)
+ case 0x1D6: // xvrdpic (VSX Vector Round to Double-Precision Integer using Current rounding mode)
+ case 0x1F2: // xvrdpim (VSX Vector Round to Double-Precision Integer using round toward -Infinity)
+ case 0x1D2: // xvrdpip (VSX Vector Round to Double-Precision Integer using round toward +Infinity)
+ case 0x1B2: // xvrdpiz (VSX Vector Round to Double-Precision Integer using round toward Zero)
+ {
+ IRTemp frBHi_I64 = newTemp(Ity_I64);
+ IRTemp frBLo_I64 = newTemp(Ity_I64);
+ IRExpr * frD_fp_roundHi = NULL;
+ IRExpr * frD_fp_roundLo = NULL;
+ UChar * insn_suffix = NULL;
+
+ assign( frBHi_I64, unop( Iop_V128HIto64, getVSReg( XB ) ) );
+ frD_fp_roundHi = _do_vsx_fp_roundToInt(frBHi_I64, opc2, insn_suffix);
+ assign( frBLo_I64, unop( Iop_V128to64, getVSReg( XB ) ) );
+ frD_fp_roundLo = _do_vsx_fp_roundToInt(frBLo_I64, opc2, insn_suffix);
+
+ DIP("xvrdpi%s v%d,v%d\n", insn_suffix, (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64, frD_fp_roundHi ),
+ unop( Iop_ReinterpF64asI64, frD_fp_roundLo ) ) );
+ break;
+ }
+ case 0x112: // xvrspi (VSX Vector Round to Single-Precision Integer using round toward Nearest Away)
+ case 0x156: // xvrspic (VSX Vector Round to SinglePrecision Integer using Current rounding mode)
+ case 0x172: // xvrspim (VSX Vector Round to SinglePrecision Integer using round toward -Infinity)
+ case 0x152: // xvrspip (VSX Vector Round to SinglePrecision Integer using round toward +Infinity)
+ case 0x132: // xvrspiz (VSX Vector Round to SinglePrecision Integer using round toward Zero)
+ {
+ UChar * insn_suffix = NULL;
+ IROp op;
+ if (opc2 != 0x156) {
+ // Use pre-defined IRop's for vrfi{m|n|p|z}
+ switch (opc2) {
+ case 0x112:
+ insn_suffix = "";
+ op = Iop_RoundF32x4_RN;
+ break;
+ case 0x172:
+ insn_suffix = "m";
+ op = Iop_RoundF32x4_RM;
+ break;
+ case 0x152:
+ insn_suffix = "p";
+ op = Iop_RoundF32x4_RP;
+ break;
+ case 0x132:
+ insn_suffix = "z";
+ op = Iop_RoundF32x4_RZ;
+ break;
+
+ default:
+ vex_printf( "dis_vxv_misc(ppc)(vrspi<x>)(opc2)\n" );
+ return False;
+ }
+ DIP("xvrspi%s v%d,v%d\n", insn_suffix, (UInt)XT, (UInt)XB);
+ putVSReg( XT, unop( op, getVSReg(XB) ) );
+ } else {
+ // Handle xvrspic. Unfortunately there is no corresponding "vfric" instruction.
+ IRExpr * frD_fp_roundb3, * frD_fp_roundb2, * frD_fp_roundb1, * frD_fp_roundb0;
+ IRTemp b3_F64, b2_F64, b1_F64, b0_F64;
+ IRTemp b3_I64 = newTemp(Ity_I64);
+ IRTemp b2_I64 = newTemp(Ity_I64);
+ IRTemp b1_I64 = newTemp(Ity_I64);
+ IRTemp b0_I64 = newTemp(Ity_I64);
+
+ b3_F64 = b2_F64 = b1_F64 = b0_F64 = IRTemp_INVALID;
+ frD_fp_roundb3 = frD_fp_roundb2 = frD_fp_roundb1 = frD_fp_roundb0 = NULL;
+ breakV128to4xF64( getVSReg(XB), &b3_F64, &b2_F64, &b1_F64, &b0_F64);
+ assign(b3_I64, unop(Iop_ReinterpF64asI64, mkexpr(b3_F64)));
+ assign(b2_I64, unop(Iop_ReinterpF64asI64, mkexpr(b2_F64)));
+ assign(b1_I64, unop(Iop_ReinterpF64asI64, mkexpr(b1_F64)));
+ assign(b0_I64, unop(Iop_ReinterpF64asI64, mkexpr(b0_F64)));
+ frD_fp_roundb3 = unop(Iop_TruncF64asF32,
+ _do_vsx_fp_roundToInt(b3_I64, opc2, insn_suffix));
+ frD_fp_roundb2 = unop(Iop_TruncF64asF32,
+ _do_vsx_fp_roundToInt(b2_I64, opc2, insn_suffix));
+ frD_fp_roundb1 = unop(Iop_TruncF64asF32,
+ _do_vsx_fp_roundToInt(b1_I64, opc2, insn_suffix));
+ frD_fp_roundb0 = unop(Iop_TruncF64asF32,
+ _do_vsx_fp_roundToInt(b0_I64, opc2, insn_suffix));
+ DIP("xvrspic v%d,v%d\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ binop( Iop_32HLto64,
+ unop( Iop_ReinterpF32asI32, frD_fp_roundb3 ),
+ unop( Iop_ReinterpF32asI32, frD_fp_roundb2 ) ),
+ binop( Iop_32HLto64,
+ unop( Iop_ReinterpF32asI32, frD_fp_roundb1 ),
+ unop( Iop_ReinterpF32asI32, frD_fp_roundb0 ) ) ) );
+ }
+ break;
+ }
+
+ default:
+ vex_printf( "dis_vxv_misc(ppc)(opc2)\n" );
+ return False;
+ }
+ return True;
+}
+
+
+/*
+ * VSX Scalar Floating Point Arithmetic Instructions
+ */
+static Bool
+dis_vxs_arith ( UInt theInstr, UInt opc2 )
+{
+ /* XX3-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar XT = ifieldRegXT( theInstr );
+ UChar XA = ifieldRegXA( theInstr );
+ UChar XB = ifieldRegXB( theInstr );
+ IRExpr* rm = get_IR_roundingmode();
+ IRTemp frA = newTemp(Ity_F64);
+ IRTemp frB = newTemp(Ity_F64);
+
+ if (opc1 != 0x3C) {
+ vex_printf( "dis_vxs_arith(ppc)(instr)\n" );
+ return False;
+ }
+
+ assign(frA, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XA ))));
+ assign(frB, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XB ))));
+
+ /* For all the VSX sclar arithmetic instructions, the contents of doubleword element 1
+ * of VSX[XT] are undefined after the operation; therefore, we can simply set
+ * element to zero where it makes sense to do so.
+ */
+ switch (opc2) {
+ case 0x080: // xsadddp (VSX scalar add double-precision)
+ DIP("xsadddp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64,
+ triop( Iop_AddF64, rm,
+ mkexpr( frA ),
+ mkexpr( frB ) ) ),
+ mkU64( 0 ) ) );
+ break;
+ case 0x0E0: // xsdivdp (VSX scalar divide double-precision)
+ DIP("xsdivdp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64,
+ triop( Iop_DivF64, rm,
+ mkexpr( frA ),
+ mkexpr( frB ) ) ),
+ mkU64( 0 ) ) );
+ break;
+ case 0x084: case 0x0A4: // xsmaddadp, xsmaddmdp (VSX scalar multiply-add double-precision)
+ {
+ IRTemp frT = newTemp(Ity_F64);
+ Bool mdp = opc2 == 0x0A4;
+ DIP("xsmadd%sdp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB);
+ assign( frT, unop( Iop_ReinterpI64asF64, unop( Iop_V128HIto64,
+ getVSReg( XT ) ) ) );
+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64,
+ qop( Iop_MAddF64, rm,
+ mkexpr( frA ),
+ mkexpr( mdp ? frT : frB ),
+ mkexpr( mdp ? frB : frT ) ) ),
+ mkU64( 0 ) ) );
+ break;
+ }
+ case 0x0C4: case 0x0E4: // xsmsubadp, xsmsubmdp (VSX scalar multiply-subtract double-precision)
+ {
+ IRTemp frT = newTemp(Ity_F64);
+ Bool mdp = opc2 == 0x0E4;
+ DIP("xsmsub%sdp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB);
+ assign( frT, unop( Iop_ReinterpI64asF64, unop( Iop_V128HIto64,
+ getVSReg( XT ) ) ) );
+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64,
+ qop( Iop_MSubF64, rm,
+ mkexpr( frA ),
+ mkexpr( mdp ? frT : frB ),
+ mkexpr( mdp ? frB : frT ) ) ),
+ mkU64( 0 ) ) );
+ break;
+ }
+ case 0x284: case 0x2A4: // xsnmaddadp, xsnmaddmdp (VSX scalar multiply-add double-precision)
+ {
+ /* TODO: mpj -- Naturally, I expected to be able to leverage the implementation
+ * of fnmadd and use pretty much the same code. However, that code has a bug in the
+ * way it blindly negates the signbit, even if the floating point result is a NaN.
+ * So, the TODO is to fix fnmadd (which I'll do in a different patch).
+ */
+ Bool mdp = opc2 == 0x2A4;
+ IRTemp frT = newTemp(Ity_F64);
+ IRTemp maddResult = newTemp(Ity_I64);
+
+ DIP("xsnmadd%sdp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB);
+ assign( frT, unop( Iop_ReinterpI64asF64, unop( Iop_V128HIto64,
+ getVSReg( XT ) ) ) );
+ assign( maddResult, unop( Iop_ReinterpF64asI64, qop( Iop_MAddF64, rm,
+ mkexpr( frA ),
+ mkexpr( mdp ? frT : frB ),
+ mkexpr( mdp ? frB : frT ) ) ) );
+
+ putVSReg( XT, binop( Iop_64HLtoV128, mkexpr( getNegatedResult(maddResult) ),
+ mkU64( 0 ) ) );
+ break;
+ }
+ case 0x2C4: case 0x2E4: // xsnmsubadp, xsnmsubmdp (VSX Scalar Negative Multiply-Subtract Double-Precision)
+ {
+ IRTemp frT = newTemp(Ity_F64);
+ Bool mdp = opc2 == 0x2E4;
+ IRTemp msubResult = newTemp(Ity_I64);
+
+ DIP("xsnmsub%sdp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB);
+ assign( frT, unop( Iop_ReinterpI64asF64, unop( Iop_V128HIto64,
+ getVSReg( XT ) ) ) );
+ assign(msubResult, unop( Iop_ReinterpF64asI64,
+ qop( Iop_MSubF64,
+ rm,
+ mkexpr( frA ),
+ mkexpr( mdp ? frT : frB ),
+ mkexpr( mdp ? frB : frT ) ) ));
+
+ putVSReg( XT, binop( Iop_64HLtoV128, mkexpr( getNegatedResult(msubResult) ), mkU64( 0 ) ) );
+
+ break;
+ }
+
+ case 0x0C0: // xsmuldp (VSX Scalar Multiply Double-Precision)
+ DIP("xsmuldp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64,
+ triop( Iop_MulF64, rm,
+ mkexpr( frA ),
+ mkexpr( frB ) ) ),
+ mkU64( 0 ) ) );
+ break;
+ case 0x0A0: // xssubdp (VSX Scalar Subtract Double-Precision)
+ DIP("xssubdp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64,
+ triop( Iop_SubF64, rm,
+ mkexpr( frA ),
+ mkexpr( frB ) ) ),
+ mkU64( 0 ) ) );
+ break;
+
+ case 0x096: // xssqrtdp (VSX Scalar Square Root Double-Precision)
+ DIP("xssqrtdp v%d,v%d\n", (UInt)XT, (UInt)XB);
+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64,
+ binop( Iop_SqrtF64, rm,
+ mkexpr( frB ) ) ),
+ mkU64( 0 ) ) );
+ break;
+
+ case 0x0F4: // xstdivdp (VSX Scalar Test for software Divide Double-Precision)
+ {
+ UChar crfD = toUChar( IFIELD( theInstr, 23, 3 ) );
+ IRTemp frA_I64 = newTemp(Ity_I64);
+ IRTemp frB_I64 = newTemp(Ity_I64);
+ DIP("xstdivdp crf%d,v%d,v%d\n", crfD, (UInt)XA, (UInt)XB);
+ assign( frA_I64, unop( Iop_ReinterpF64asI64, mkexpr( frA ) ) );
+ assign( frB_I64, unop( Iop_ReinterpF64asI64, mkexpr( frB ) ) );
+ putGST_field( PPC_GST_CR, do_fp_tdiv(frA_I64, frB_I64), crfD );
+ break;
+ }
+ case 0x0D4: // xstsqrtdp (VSX Vector Test for software Square Root Double-Precision)
+ {
+ IRTemp frB_I64 = newTemp(Ity_I64);
+ UChar crfD = toUChar( IFIELD( theInstr, 23, 3 ) );
+ IRTemp flags = newTemp(Ity_I32);
+ IRTemp fe_flag, fg_flag;
+ fe_flag = fg_flag = IRTemp_INVALID;
+ DIP("xstsqrtdp v%d,v%d\n", (UInt)XT, (UInt)XB);
+ assign( frB_I64, unop(Iop_V128HIto64, getVSReg( XB )) );
+ do_fp_tsqrt(frB_I64, False /*not single precision*/, &fe_flag, &fg_flag);
+ /* The CR field consists of fl_flag || fg_flag || fe_flag || 0b0
+ * where fl_flag == 1 on ppc64.
+ */
+ assign( flags,
+ binop( Iop_Or32,
+ binop( Iop_Or32, mkU32( 8 ), // fl_flag
+ binop( Iop_Shl32, mkexpr(fg_flag), mkU8( 2 ) ) ),
+ binop( Iop_Shl32, mkexpr(fe_flag), mkU8( 1 ) ) ) );
+ putGST_field( PPC_GST_CR, mkexpr(flags), crfD );
+ break;
+ }
+
+ default:
+ vex_printf( "dis_vxs_arith(ppc)(opc2)\n" );
+ return False;
+ }
+
+ return True;
+}
+
+
+/*
+ * VSX Floating Point Compare Instructions
+ */
+static Bool
+dis_vx_cmp( UInt theInstr, UInt opc2 )
+{
+ /* XX3-Form and XX2-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar crfD = toUChar( IFIELD( theInstr, 23, 3 ) );
+ IRTemp ccPPC32;
+ UChar XA = ifieldRegXA ( theInstr );
+ UChar XB = ifieldRegXB ( theInstr );
+ IRTemp frA = newTemp(Ity_F64);
+ IRTemp frB = newTemp(Ity_F64);
+
+ if (opc1 != 0x3C) {
+ vex_printf( "dis_vx_cmp(ppc)(instr)\n" );
+ return False;
+ }
+
+ assign(frA, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XA ))));
+ assign(frB, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XB ))));
+ switch (opc2) {
+ case 0x08C: case 0x0AC: // xscmpudp, xscmpodp
+ /* Note: Differences between xscmpudp and xscmpodp are only in
+ * exception flag settings, which aren't supported anyway. */
+ DIP("xscmp%sdp crf%d,fr%u,fr%u\n", opc2 == 0x08c ? "u" : "o",
+ crfD, (UInt)XA, (UInt)XB);
+ ccPPC32 = get_fp_cmp_CR_val( binop(Iop_CmpF64, mkexpr(frA), mkexpr(frB)));
+ putGST_field( PPC_GST_CR, mkexpr(ccPPC32), crfD );
+ break;
+
+ default:
+ vex_printf( "dis_vx_cmp(ppc)(opc2)\n" );
+ return False;
+ }
+ return True;
+}
+
+static void
+do_vvec_fp_cmp ( IRTemp vA, IRTemp vB, UChar XT, UChar flag_rC,
+ ppc_cmp_t cmp_type )
+{
+ IRTemp frA_hi = newTemp(Ity_F64);
+ IRTemp frB_hi = newTemp(Ity_F64);
+ IRTemp frA_lo = newTemp(Ity_F64);
+ IRTemp frB_lo = newTemp(Ity_F64);
+ IRTemp ccPPC32 = newTemp(Ity_I32);
+ IRTemp ccIR_hi;
+ IRTemp ccIR_lo;
+
+ IRTemp hiResult = newTemp(Ity_I64);
+ IRTemp loResult = newTemp(Ity_I64);
+ IRTemp hiEQlo = newTemp(Ity_I1);
+ IRTemp all_elem_true = newTemp(Ity_I32);
+ IRTemp all_elem_false = newTemp(Ity_I32);
+
+ assign(frA_hi, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, mkexpr( vA ))));
+ assign(frB_hi, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, mkexpr( vB ))));
+ assign(frA_lo, unop(Iop_ReinterpI64asF64, unop(Iop_V128to64, mkexpr( vA ))));
+ assign(frB_lo, unop(Iop_ReinterpI64asF64, unop(Iop_V128to64, mkexpr( vB ))));
+
+ ccIR_hi = get_fp_cmp_CR_val( binop( Iop_CmpF64,
+ mkexpr( frA_hi ),
+ mkexpr( frB_hi ) ) );
+ ccIR_lo = get_fp_cmp_CR_val( binop( Iop_CmpF64,
+ mkexpr( frA_lo ),
+ mkexpr( frB_lo ) ) );
+
+ if (cmp_type != PPC_CMP_GE) {
+ assign( hiResult,
+ unop( Iop_1Sto64,
+ binop( Iop_CmpEQ32, mkexpr( ccIR_hi ), mkU32( cmp_type ) ) ) );
+ assign( loResult,
+ unop( Iop_1Sto64,
+ binop( Iop_CmpEQ32, mkexpr( ccIR_lo ), mkU32( cmp_type ) ) ) );
+ } else {
+ // For PPC_CMP_GE, one element compare may return "4" (for "greater than") and
+ // the other element compare may return "2" (for "equal to").
+ IRTemp lo_GE = newTemp(Ity_I1);
+ IRTemp hi_GE = newTemp(Ity_I1);
+
+ assign(hi_GE, mkOR1( binop( Iop_CmpEQ32, mkexpr( ccIR_hi ), mkU32( 2 ) ),
+ binop( Iop_CmpEQ32, mkexpr( ccIR_hi ), mkU32( 4 ) ) ) );
+ assign( hiResult,unop( Iop_1Sto64, mkexpr( hi_GE ) ) );
+
+ assign(lo_GE, mkOR1( binop( Iop_CmpEQ32, mkexpr( ccIR_lo ), mkU32( 2 ) ),
+ binop( Iop_CmpEQ32, mkexpr( ccIR_lo ), mkU32( 4 ) ) ) );
+ assign( loResult, unop( Iop_1Sto64, mkexpr( lo_GE ) ) );
+ }
+
+ // The [hi/lo]Result will be all 1's or all 0's. We just look at the lower word.
+ assign( hiEQlo,
+ binop( Iop_CmpEQ32,
+ unop( Iop_64to32, mkexpr( hiResult ) ),
+ unop( Iop_64to32, mkexpr( loResult ) ) ) );
+ putVSReg( XT,
+ binop( Iop_64HLtoV128, mkexpr( hiResult ), mkexpr( loResult ) ) );
+
+ assign( all_elem_true,
+ unop( Iop_1Uto32,
+ mkAND1( mkexpr( hiEQlo ),
+ binop( Iop_CmpEQ32,
+ mkU32( 0xffffffff ),
+ unop( Iop_64to32,
+ mkexpr( hiResult ) ) ) ) ) );
+
+ assign( all_elem_false,
+ unop( Iop_1Uto32,
+ mkAND1( mkexpr( hiEQlo ),
+ binop( Iop_CmpEQ32,
+ mkU32( 0 ),
+ unop( Iop_64to32,
+ mkexpr( hiResult ) ) ) ) ) );
+ assign( ccPPC32,
+ binop( Iop_Or32,
+ binop( Iop_Shl32, mkexpr( all_elem_false ), mkU8( 1 ) ),
+ binop( Iop_Shl32, mkexpr( all_elem_true ), mkU8( 3 ) ) ) );
+
+ if (flag_rC) {
+ putGST_field( PPC_GST_CR, mkexpr(ccPPC32), 6 );
+ }
+}
+
+/*
+ * VSX Vector Compare Instructions
+ */
+static Bool
+dis_vvec_cmp( UInt theInstr, UInt opc2 )
+{
+ /* XX3-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar XT = ifieldRegXT ( theInstr );
+ UChar XA = ifieldRegXA ( theInstr );
+ UChar XB = ifieldRegXB ( theInstr );
+ UChar flag_rC = ifieldBIT10(theInstr);
+ IRTemp vA = newTemp( Ity_V128 );
+ IRTemp vB = newTemp( Ity_V128 );
+
+ if (opc1 != 0x3C) {
+ vex_printf( "dis_vvec_cmp(ppc)(instr)\n" );
+ return False;
+ }
+
+ assign( vA, getVSReg( XA ) );
+ assign( vB, getVSReg( XB ) );
+
+ switch (opc2) {
+ case 0x18C: case 0x38C: // xvcmpeqdp[.] (VSX Vector Compare Equal To Double-Precision [ & Record ])
+ {
+ DIP("xvcmpeqdp%s crf%d,fr%u,fr%u\n", (flag_rC ? ".":""),
+ (UInt)XT, (UInt)XA, (UInt)XB);
+ do_vvec_fp_cmp(vA, vB, XT, flag_rC, PPC_CMP_EQ);
+ break;
+ }
+
+ case 0x1CC: case 0x3CC: // xvcmpgedp[.] (VSX Vector Compare Greater Than or Equal To Double-Precision [ & Record ])
+ {
+ DIP("xvcmpgedp%s crf%d,fr%u,fr%u\n", (flag_rC ? ".":""),
+ (UInt)XT, (UInt)XA, (UInt)XB);
+ do_vvec_fp_cmp(vA, vB, XT, flag_rC, PPC_CMP_GE);
+ break;
+ }
+
+ case 0x1AC: case 0x3AC: // xvcmpgtdp[.] (VSX Vector Compare Greater Than Double-Precision [ & Record ])
+ {
+ DIP("xvcmpgtdp%s crf%d,fr%u,fr%u\n", (flag_rC ? ".":""),
+ (UInt)XT, (UInt)XA, (UInt)XB);
+ do_vvec_fp_cmp(vA, vB, XT, flag_rC, PPC_CMP_GT);
+ break;
+ }
+
+ case 0x10C: case 0x30C: // xvcmpeqsp[.] (VSX Vector Compare Equal To Single-Precision [ & Record ])
+ {
+ IRTemp vD = newTemp(Ity_V128);
+
+ DIP("xvcmpeqsp%s crf%d,fr%u,fr%u\n", (flag_rC ? ".":""),
+ (UInt)XT, (UInt)XA, (UInt)XB);
+ assign( vD, binop(Iop_CmpEQ32Fx4, mkexpr(vA), mkexpr(vB)) );
+ putVSReg( XT, mkexpr(vD) );
+ if (flag_rC) {
+ set_AV_CR6( mkexpr(vD), True );
+ }
+ break;
+ }
+
+ case 0x14C: case 0x34C: // xvcmpgesp[.] (VSX Vector Compare Greater Than or Equal To Single-Precision [ & Record ])
+ {
+ IRTemp vD = newTemp(Ity_V128);
+
+ DIP("xvcmpgesp%s crf%d,fr%u,fr%u\n", (flag_rC ? ".":""),
+ (UInt)XT, (UInt)XA, (UInt)XB);
+ assign( vD, binop(Iop_CmpGE32Fx4, mkexpr(vA), mkexpr(vB)) );
+ putVSReg( XT, mkexpr(vD) );
+ if (flag_rC) {
+ set_AV_CR6( mkexpr(vD), True );
+ }
+ break;
+ }
+
+ case 0x12C: case 0x32C: //xvcmpgtsp[.] (VSX Vector Compare Greater Than Single-Precision [ & Record ])
+ {
+ IRTemp vD = newTemp(Ity_V128);
+
+ DIP("xvcmpgtsp%s crf%d,fr%u,fr%u\n", (flag_rC ? ".":""),
+ (UInt)XT, (UInt)XA, (UInt)XB);
+ assign( vD, binop(Iop_CmpGT32Fx4, mkexpr(vA), mkexpr(vB)) );
+ putVSReg( XT, mkexpr(vD) );
+ if (flag_rC) {
+ set_AV_CR6( mkexpr(vD), True );
+ }
+ break;
+ }
+
+ default:
+ vex_printf( "dis_vvec_cmp(ppc)(opc2)\n" );
+ return False;
+ }
+ return True;
+}
+/*
+ * Miscellaneous VSX Scalar Instructions
+ */
+static Bool
+dis_vxs_misc( UInt theInstr, UInt opc2 )
+{
+ /* XX3-Form and XX2-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar XT = ifieldRegXT ( theInstr );
+ UChar XA = ifieldRegXA ( theInstr );
+ UChar XB = ifieldRegXB ( theInstr );
+ IRTemp vA = newTemp( Ity_V128 );
+ IRTemp vB = newTemp( Ity_V128 );
+
+ if (opc1 != 0x3C) {
+ vex_printf( "dis_vxs_misc(ppc)(instr)\n" );
+ return False;
+ }
+
+ assign( vA, getVSReg( XA ) );
+ assign( vB, getVSReg( XB ) );
+
+ /* For all the VSX move instructions, the contents of doubleword element 1
+ * of VSX[XT] are undefined after the operation; therefore, we can simply
+ * move the entire array element where it makes sense to do so.
+ */
+
+ switch (opc2) {
+ case 0x2B2: // xsabsdp (VSX scalar absolute value double-precision
+ {
+ /* Move abs val of dw 0 of VSX[XB] to dw 0 of VSX[XT]. */
+ IRTemp absVal = newTemp(Ity_V128);
+ assign(absVal, binop(Iop_ShrV128, binop(Iop_ShlV128, mkexpr(vB), mkU8(1)), mkU8(1)));
+ DIP("xsabsdp v%d,v%d\n", (UInt)XT, (UInt)XB);
+ putVSReg(XT, mkexpr(absVal));
+ break;
+ }
+ case 0x2C0: // xscpsgndp
+ {
+ /* Scalar copy sign double-precision */
+ IRTemp vecA_signbit = newTemp(Ity_V128);
+ IRTemp vecB_no_signbit = newTemp(Ity_V128);
+ IRTemp vec_result = newTemp(Ity_V128);
+ DIP("xscpsgndp v%d,v%d v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ assign( vecB_no_signbit, binop( Iop_ShrV128, binop( Iop_ShlV128,
+ mkexpr( vB ),
+ mkU8( 1 ) ),
+ mkU8( 1 ) ) );
+ assign( vecA_signbit, binop( Iop_ShlV128, binop( Iop_ShrV128,
+ mkexpr( vA ),
+ mkU8( 127 ) ),
+ mkU8( 127 ) ) );
+ assign( vec_result, binop( Iop_OrV128, mkexpr(vecA_signbit), mkexpr( vecB_no_signbit ) ) );
+ putVSReg(XT, mkexpr(vec_result));
+ break;
+ }
+ case 0x2D2: // xsnabsdp
+ {
+ /* Scalar negative absolute value double-precision */
+ IRTemp vec_neg_signbit = newTemp(Ity_V128);
+ DIP("xsnabsdp v%d,v%d\n", (UInt)XT, (UInt)XB);
+ assign( vec_neg_signbit, unop( Iop_NotV128, binop( Iop_ShrV128,
+ mkV128( 0xffff ),
+ mkU8( 1 ) ) ) );
+ putVSReg(XT, binop(Iop_OrV128, mkexpr(vec_neg_signbit), mkexpr(vB)));
+ break;
+ }
+ case 0x2F2: // xsnegdp
+ {
+ /* Scalar negate double-precision */
+ IRTemp vecB_no_signbit = newTemp(Ity_V128);
+ IRTemp vecB_signbit_comp = newTemp(Ity_V128);
+ DIP("xsnabsdp v%d,v%d\n", (UInt)XT, (UInt)XB);
+ assign( vecB_no_signbit, binop( Iop_ShrV128, binop( Iop_ShlV128,
+ mkexpr( vB ),
+ mkU8( 1 ) ),
+ mkU8( 1 ) ) );
+ assign( vecB_signbit_comp, binop( Iop_ShlV128,
+ unop( Iop_NotV128,
+ binop( Iop_ShrV128,
+ mkexpr( vB ),
+ mkU8( 127 ) ) ),
+ mkU8( 127 ) ) );
+ putVSReg( XT, binop( Iop_OrV128, mkexpr( vecB_no_signbit ),
+ mkexpr( vecB_signbit_comp ) ) );
+ break;
+ }
+ case 0x280: // xsmaxdp (VSX Scalar Maximum Double-Precision)
+ case 0x2A0: // xsmindp (VSX Scalar Minimum Double-Precision)
+ {
+ IRTemp frA = newTemp(Ity_I64);
+ IRTemp frB = newTemp(Ity_I64);
+ Bool isMin = opc2 == 0x2A0 ? True : False;
+ DIP("%s v%d,v%d v%d\n", isMin ? "xsmaxdp" : "xsmindp", (UInt)XT, (UInt)XA, (UInt)XB);
+
+ assign(frA, unop(Iop_V128HIto64, mkexpr( vA )));
+ assign(frB, unop(Iop_V128HIto64, mkexpr( vB )));
+ putVSReg( XT, binop( Iop_64HLtoV128, get_max_min_fp(frA, frB, isMin), mkU64( 0 ) ) );
+
+ break;
+ }
+ case 0x0F2: // xsrdpim (VSX Scalar Round to Double-Precision Integer using round toward -Infinity)
+ case 0x0D2: // xsrdpip (VSX Scalar Round to Double-Precision Integer using round toward +Infinity)
+ case 0x0D6: // xsrdpic (VSX Scalar Round to Double-Precision Integer using Current rounding mode)
+ case 0x0B2: // xsrdpiz (VSX Scalar Round to Double-Precision Integer using round toward Zero)
+ case 0x092: // xsrdpi (VSX Scalar Round to Double-Precision Integer using round toward Nearest Away)
+ {
+ IRTemp frB_I64 = newTemp(Ity_I64);
+ IRExpr * frD_fp_round = NULL;
+ UChar * insn_suffix = NULL;
+
+ assign(frB_I64, unop(Iop_V128HIto64, mkexpr( vB )));
+ frD_fp_round = _do_vsx_fp_roundToInt(frB_I64, opc2, insn_suffix);
+
+ DIP("xsrdpi%s v%d,v%d\n", insn_suffix, (UInt)XT, (UInt)XB);
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64, frD_fp_round),
+ mkU64( 0 ) ) );
+ break;
+ }
+ case 0x0B4: // xsredp (VSX Scalar Reciprocal Estimate Double-Precision)
+ case 0x094: // xsrsqrtedp (VSX Scalar Reciprocal Square Root Estimate Double-Precision)
+
+ {
+ IRTemp frB = newTemp(Ity_F64);
+ IRTemp sqrt = newTemp(Ity_F64);
+ IRExpr* ieee_one = IRExpr_Const(IRConst_F64i(0x3ff0000000000000ULL));
+ IRExpr* rm = get_IR_roundingmode();
+ Bool redp = opc2 == 0x0B4;
+ DIP("%s v%d,v%d\n", redp ? "xsredp" : "xsrsqrtedp", (UInt)XT, (UInt)XB);
+ assign( frB,
+ unop( Iop_ReinterpI64asF64,
+ unop( Iop_V128HIto64, mkexpr( vB ) ) ) );
+
+ if (!redp)
+ assign( sqrt,
+ binop( Iop_SqrtF64,
+ rm,
+ mkexpr(frB) ) );
+ putVSReg( XT,
+ binop( Iop_64HLtoV128,
+ unop( Iop_ReinterpF64asI64,
+ triop( Iop_DivF64,
+ rm,
+ ieee_one,
+ redp ? mkexpr( frB ) : mkexpr( sqrt ) ) ),
+ mkU64( 0 ) ) );
+ break;
+ }
+
+ default:
+ vex_printf( "dis_vxs_misc(ppc)(opc2)\n" );
+ return False;
+ }
+ return True;
+}
+
+/*
+ * VSX Logical Instructions
+ */
+static Bool
+dis_vx_logic ( UInt theInstr, UInt opc2 )
+{
+ /* XX3-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar XT = ifieldRegXT ( theInstr );
+ UChar XA = ifieldRegXA ( theInstr );
+ UChar XB = ifieldRegXB ( theInstr );
+ IRTemp vA = newTemp( Ity_V128 );
+ IRTemp vB = newTemp( Ity_V128 );
+
+ if (opc1 != 0x3C) {
+ vex_printf( "dis_vx_logic(ppc)(instr)\n" );
+ return False;
+ }
+
+ assign( vA, getVSReg( XA ) );
+ assign( vB, getVSReg( XB ) );
+
+ switch (opc2) {
+ case 0x268: // xxlxor
+ DIP("xxlxor v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop( Iop_XorV128, mkexpr( vA ), mkexpr( vB ) ) );
+ break;
+ case 0x248: // xxlor
+ DIP("xxlor v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop( Iop_OrV128, mkexpr( vA ), mkexpr( vB ) ) );
+ break;
+ case 0x288: // xxlnor
+ DIP("xxlnor v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, unop( Iop_NotV128, binop( Iop_OrV128, mkexpr( vA ),
+ mkexpr( vB ) ) ) );
+ break;
+ case 0x208: // xxland
+ DIP("xxland v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop( Iop_AndV128, mkexpr( vA ), mkexpr( vB ) ) );
+ break;
+ case 0x228: //xxlandc
+ DIP("xxlandc v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, binop( Iop_AndV128, mkexpr( vA ), unop( Iop_NotV128,
+ mkexpr( vB ) ) ) );
+ break;
+ default:
+ vex_printf( "dis_vx_logic(ppc)(opc2)\n" );
+ return False;
+ }
+ return True;
+}
+
+/*
+ * VSX Load Instructions
+ * NOTE: VSX supports word-aligned storage access.
+ */
+static Bool
+dis_vx_load ( UInt theInstr )
+{
+ /* XX1-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar XT = ifieldRegXT ( theInstr );
+ UChar rA_addr = ifieldRegA( theInstr );
+ UChar rB_addr = ifieldRegB( theInstr );
+ UInt opc2 = ifieldOPClo10( theInstr );
+
+ IRType ty = mode64 ? Ity_I64 : Ity_I32;
+ IRTemp EA = newTemp( ty );
+
+ if (opc1 != 0x1F) {
+ vex_printf( "dis_vx_load(ppc)(instr)\n" );
+ return False;
+ }
+
+ assign( EA, ea_rAor0_idxd( rA_addr, rB_addr ) );
+
+ switch (opc2) {
+ case 0x24C: // lxsdx
+ {
+ IRExpr * exp;
+ DIP("lxsdx %d,r%u,r%u\n", (UInt)XT, rA_addr, rB_addr);
+ exp = loadBE( Ity_I64, mkexpr( EA ) );
+ // We need to pass an expression of type Ity_V128 with putVSReg, but the load
+ // we just performed is only a DW. But since the contents of VSR[XT] element 1
+ // are undefined after this operation, we can just do a splat op.
+ putVSReg( XT, binop( Iop_64HLtoV128, exp, exp ) );
+ break;
+ }
+ case 0x34C: // lxvd2x
+ {
+ IROp addOp = ty == Ity_I64 ? Iop_Add64 : Iop_Add32;
+ IRExpr * high, *low;
+ ULong ea_off = 8;
+ IRExpr* high_addr;
+ DIP("lxvd2x %d,r%u,r%u\n", (UInt)XT, rA_addr, rB_addr);
+ high = loadBE( Ity_I64, mkexpr( EA ) );
+ high_addr = binop( addOp, mkexpr( EA ), ty == Ity_I64 ? mkU64( ea_off )
+ : mkU32( ea_off ) );
+ low = loadBE( Ity_I64, high_addr );
+ putVSReg( XT, binop( Iop_64HLtoV128, high, low ) );
+ break;
+ }
+ case 0x14C: // lxvdsx
+ {
+ IRTemp data = newTemp(Ity_I64);
+ DIP("lxvdsx %d,r%u,r%u\n", (UInt)XT, rA_addr, rB_addr);
+ assign( data, loadBE( Ity_I64, mkexpr( EA ) ) );
+ putVSReg( XT, binop( Iop_64HLtoV128, mkexpr( data ), mkexpr( data ) ) );
+ break;
+ }
+ case 0x30C:
+ {
+ IRExpr * t3, *t2, *t1, *t0;
+ UInt ea_off = 0;
+ IRExpr* irx_addr;
+
+ DIP("lxvw4x %d,r%u,r%u\n", (UInt)XT, rA_addr, rB_addr);
+ t3 = loadBE( Ity_I32, mkexpr( EA ) );
+ ea_off += 4;
+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ),
+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) );
+ t2 = loadBE( Ity_I32, irx_addr );
+ ea_off += 4;
+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ),
+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) );
+ t1 = loadBE( Ity_I32, irx_addr );
+ ea_off += 4;
+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ),
+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) );
+ t0 = loadBE( Ity_I32, irx_addr );
+ putVSReg( XT, binop( Iop_64HLtoV128, binop( Iop_32HLto64, t3, t2 ),
+ binop( Iop_32HLto64, t1, t0 ) ) );
+ break;
+ }
+ default:
+ vex_printf( "dis_vx_load(ppc)(opc2)\n" );
+ return False;
+ }
+ return True;
+}
+
+/*
+ * VSX Store Instructions
+ * NOTE: VSX supports word-aligned storage access.
+ */
+static Bool
+dis_vx_store ( UInt theInstr )
+{
+ /* XX1-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar XS = ifieldRegXS( theInstr );
+ UChar rA_addr = ifieldRegA( theInstr );
+ UChar rB_addr = ifieldRegB( theInstr );
+ IRTemp vS = newTemp( Ity_V128 );
+ UInt opc2 = ifieldOPClo10( theInstr );
+
+ IRType ty = mode64 ? Ity_I64 : Ity_I32;
+ IRTemp EA = newTemp( ty );
+
+ if (opc1 != 0x1F) {
+ vex_printf( "dis_vx_store(ppc)(instr)\n" );
+ return False;
+ }
+
+ assign( EA, ea_rAor0_idxd( rA_addr, rB_addr ) );
+ assign( vS, getVSReg( XS ) );
+
+ switch (opc2) {
+ case 0x2CC:
+ {
+ IRExpr * high64;
+ DIP("stxsdx %d,r%u,r%u\n", (UInt)XS, rA_addr, rB_addr);
+ high64 = unop( Iop_V128HIto64, mkexpr( vS ) );
+ storeBE( mkexpr( EA ), high64 );
+ break;
+ }
+ case 0x3CC:
+ {
+ IRExpr * high64, *low64;
+ DIP("stxvd2x %d,r%u,r%u\n", (UInt)XS, rA_addr, rB_addr);
+ high64 = unop( Iop_V128HIto64, mkexpr( vS ) );
+ low64 = unop( Iop_V128to64, mkexpr( vS ) );
+ storeBE( mkexpr( EA ), high64 );
+ storeBE( binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ), ty == Ity_I64 ? mkU64( 8 )
+ : mkU32( 8 ) ), low64 );
+ break;
+ }
+ case 0x38C:
+ {
+ UInt ea_off = 0;
+ IRExpr* irx_addr;
+ IRTemp hi64 = newTemp( Ity_I64 );
+ IRTemp lo64 = newTemp( Ity_I64 );
+
+ DIP("stxvw4x %d,r%u,r%u\n", (UInt)XS, rA_addr, rB_addr);
+
+ // This instruction supports word-aligned stores, so EA may not be
+ // quad-word aligned. Therefore, do 4 individual word-size stores.
+ assign( hi64, unop( Iop_V128HIto64, mkexpr( vS ) ) );
+ assign( lo64, unop( Iop_V128to64, mkexpr( vS ) ) );
+
+ storeBE( mkexpr( EA ), unop( Iop_64HIto32, mkexpr( hi64 ) ) );
+ ea_off += 4;
+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ),
+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) );
+ storeBE( irx_addr, unop( Iop_64to32, mkexpr( hi64 ) ) );
+ ea_off += 4;
+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ),
+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) );
+ storeBE( irx_addr, unop( Iop_64HIto32, mkexpr( lo64 ) ) );
+ ea_off += 4;
+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ),
+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) );
+ storeBE( irx_addr, unop( Iop_64to32, mkexpr( lo64 ) ) );
+
+ break;
+ }
+ default:
+ vex_printf( "dis_vx_store(ppc)(opc2)\n" );
+ return False;
+ }
+ return True;
+}
+
+/*
+ * VSX permute and other miscealleous instructions
+ */
+static Bool
+dis_vx_permute_misc( UInt theInstr, UInt opc2 )
+{
+ /* XX3-Form */
+ UChar opc1 = ifieldOPC( theInstr );
+ UChar XT = ifieldRegXT ( theInstr );
+ UChar XA = ifieldRegXA ( theInstr );
+ UChar XB = ifieldRegXB ( theInstr );
+ IRTemp vT = newTemp( Ity_V128 );
+ IRTemp vA = newTemp( Ity_V128 );
+ IRTemp vB = newTemp( Ity_V128 );
+
+ if (opc1 != 0x3C) {
+ vex_printf( "dis_vx_permute_misc(ppc)(instr)\n" );
+ return False;
+ }
+
+ assign( vA, getVSReg( XA ) );
+ assign( vB, getVSReg( XB ) );
+
+ switch (opc2) {
+ case 0x8: // xxsldwi (VSX Shift Left Double by Word Immediate)
+ {
+ UChar SHW = ifieldSHW ( theInstr );
+ IRTemp result = newTemp(Ity_V128);
+ if ( SHW != 0 ) {
+ IRTemp hi = newTemp(Ity_V128);
+ IRTemp lo = newTemp(Ity_V128);
+ assign( hi, binop(Iop_ShlV128, mkexpr(vA), mkU8(SHW*32)) );
+ assign( lo, binop(Iop_ShrV128, mkexpr(vB), mkU8(128-SHW*32)) );
+ assign ( result, binop(Iop_OrV128, mkexpr(hi), mkexpr(lo)) );
+ } else
+ assign ( result, mkexpr(vA) );
+ DIP("xxsldwi v%d,v%d,v%d,%d\n", (UInt)XT, (UInt)XA, (UInt)XB, (UInt)SHW);
+ putVSReg( XT, mkexpr(result) );
+ break;
+ }
+ case 0x28: // xpermdi (VSX Permute Doubleword Immediate)
+ {
+ UChar DM = ifieldDM ( theInstr );
+ IRTemp hi = newTemp(Ity_I64);
+ IRTemp lo = newTemp(Ity_I64);
+
+ if (DM & 0x2)
+ assign( hi, unop(Iop_V128to64, mkexpr(vA)) );
+ else
+ assign( hi, unop(Iop_V128HIto64, mkexpr(vA)) );
+
+ if (DM & 0x1)
+ assign( lo, unop(Iop_V128to64, mkexpr(vB)) );
+ else
+ assign( lo, unop(Iop_V128HIto64, mkexpr(vB)) );
+
+ assign( vT, binop(Iop_64HLtoV128, mkexpr(hi), mkexpr(lo)) );
+
+ DIP("xxpermdi v%d,v%d,v%d,0x%x\n", (UInt)XT, (UInt)XA, (UInt)XB, (UInt)DM);
+ putVSReg( XT, mkexpr( vT ) );
+ break;
+ }
+ case 0x48: // xxmrghw (VSX Merge High Word)
+ case 0xc8: // xxmrglw (VSX Merge Low Word)
+ {
+ char type = (opc2 == 0x48) ? 'h' : 'l';
+ IROp word_op = (opc2 == 0x48) ? Iop_V128HIto64 : Iop_V128to64;
+ IRTemp a64 = newTemp(Ity_I64);
+ IRTemp ahi32 = newTemp(Ity_I32);
+ IRTemp alo32 = newTemp(Ity_I32);
+ IRTemp b64 = newTemp(Ity_I64);
+ IRTemp bhi32 = newTemp(Ity_I32);
+ IRTemp blo32 = newTemp(Ity_I32);
+
+ assign( a64, unop(word_op, mkexpr(vA)) );
+ assign( ahi32, unop(Iop_64HIto32, mkexpr(a64)) );
+ assign( alo32, unop(Iop_64to32, mkexpr(a64)) );
+
+ assign( b64, unop(word_op, mkexpr(vB)) );
+ assign( bhi32, unop(Iop_64HIto32, mkexpr(b64)) );
+ assign( blo32, unop(Iop_64to32, mkexpr(b64)) );
+
+ assign( vT, binop(Iop_64HLtoV128,
+ binop(Iop_32HLto64, mkexpr(ahi32), mkexpr(bhi32)),
+ binop(Iop_32HLto64, mkexpr(alo32), mkexpr(blo32))) );
+
+ DIP("xxmrg%cw v%d,v%d,v%d\n", type, (UInt)XT, (UInt)XA, (UInt)XB);
+ putVSReg( XT, mkexpr( vT ) );
+ break;
+ }
+ case 0x018: // xxsel (VSX Select)
+ {
+ UChar XC = ifieldRegXC(theInstr);
+ IRTemp vC = newTemp( Ity_V128 );
+ assign( vC, getVSReg( XC ) );
+ DIP("xxsel v%d,v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB, (UInt)XC);
+ /* vD = (vA & ~vC) | (vB & vC) */
+ putVSReg( XT, binop(Iop_OrV128,
+ binop(Iop_AndV128, mkexpr(vA), unop(Iop_NotV128, mkexpr(vC))),
+ binop(Iop_AndV128, mkexpr(vB), mkexpr(vC))) );
+ break;
+ }
+ case 0x148: // xxspltw (VSX Splat Word)
+ {
+ UChar UIM = ifieldRegA(theInstr) & 3;
+ UChar sh_uim = (3 - (UIM)) * 32;
+ DIP("xxspltw v%d,v%d,%d\n", (UInt)XT, (UInt)XB, UIM);
+ putVSReg( XT,
+ unop( Iop_Dup32x4,
+ unop( Iop_V128to32,
+ binop( Iop_ShrV128, mkexpr( vB ), mkU8( sh_uim ) ) ) ) );
+ break;
+ }
+
+ default:
+ vex_printf( "dis_vx_permute_misc(ppc)(opc2)\n" );
+ return False;
+ }
+ return True;
+}
+
+/*
AltiVec Load Instructions
*/
static Bool dis_av_load ( VexAbiInfo* vbi, UInt theInstr )
@@ -7400,7 +11249,6 @@
return True;
}
-
/*
AltiVec Store Instructions
*/
@@ -8164,7 +12012,7 @@
mkU8(15))) );
putVReg( vD_addr,
- binop(Iop_QNarrow32Sx4, mkexpr(zHi), mkexpr(zLo)) );
+ binop(Iop_QNarrowBin32Sto16Sx8, mkexpr(zHi), mkexpr(zLo)) );
break;
}
case 0x21: { // vmhraddshs (Mult High Round, Add Signed HW Saturate, AV p186)
@@ -8198,7 +12046,8 @@
mkexpr(aHi), mkexpr(bHi))),
mkU8(15))) );
- putVReg( vD_addr, binop(Iop_QNarrow32Sx4, mkexpr(zHi), mkexpr(zLo)) );
+ putVReg( vD_addr,
+ binop(Iop_QNarrowBin32Sto16Sx8, mkexpr(zHi), mkexpr(zLo)) );
break;
}
case 0x22: { // vmladduhm (Mult Low, Add Unsigned HW Modulo, AV p194)
@@ -8216,7 +12065,8 @@
assign(zHi, binop(Iop_Add32x4,
binop(Iop_MullEven16Ux8, mkexpr(aHi), mkexpr(bHi)),
mkexpr(cHi)));
- putVReg(vD_addr, binop(Iop_Narrow32x4, mkexpr(zHi), mkexpr(zLo)));
+ putVReg( vD_addr,
+ binop(Iop_NarrowBin32to16x8, mkexpr(zHi), mkexpr(zLo)) );
break;
}
@@ -8700,25 +12550,27 @@
/* Packing */
case 0x00E: // vpkuhum (Pack Unsigned HW Unsigned Modulo, AV p224)
DIP("vpkuhum v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
- putVReg( vD_addr, binop(Iop_Narrow16x8, mkexpr(vA), mkexpr(vB)) );
+ putVReg( vD_addr,
+ binop(Iop_NarrowBin16to8x16, mkexpr(vA), mkexpr(vB)) );
return True;
case 0x04E: // vpkuwum (Pack Unsigned W Unsigned Modulo, AV p226)
DIP("vpkuwum v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
- putVReg( vD_addr, binop(Iop_Narrow32x4, mkexpr(vA), mkexpr(vB)) );
+ putVReg( vD_addr,
+ binop(Iop_NarrowBin32to16x8, mkexpr(vA), mkexpr(vB)) );
return True;
case 0x08E: // vpkuhus (Pack Unsigned HW Unsigned Saturate, AV p225)
DIP("vpkuhus v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
putVReg( vD_addr,
- binop(Iop_QNarrow16Ux8, mkexpr(vA), mkexpr(vB)) );
+ binop(Iop_QNarrowBin16Uto8Ux16, mkexpr(vA), mkexpr(vB)) );
// TODO: set VSCR[SAT]
return True;
case 0x0CE: // vpkuwus (Pack Unsigned W Unsigned Saturate, AV p227)
DIP("vpkuwus v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
putVReg( vD_addr,
- binop(Iop_QNarrow32Ux4, mkexpr(vA), mkexpr(vB)) );
+ binop(Iop_QNarrowBin32Uto16Ux8, mkexpr(vA), mkexpr(vB)) );
// TODO: set VSCR[SAT]
return True;
@@ -8737,7 +12589,7 @@
unop(Iop_NotV128,
binop(Iop_SarN16x8,
mkexpr(vB), mkU8(15)))) );
- putVReg( vD_addr, binop(Iop_QNarrow16Ux8,
+ putVReg( vD_addr, binop(Iop_QNarrowBin16Uto8Ux16,
mkexpr(vA_tmp), mkexpr(vB_tmp)) );
// TODO: set VSCR[SAT]
return True;
@@ -8757,7 +12609,7 @@
unop(Iop_NotV128,
binop(Iop_SarN32x4,
mkexpr(vB), mkU8(31)))) );
- putVReg( vD_addr, binop(Iop_QNarrow32Ux4,
+ putVReg( vD_addr, binop(Iop_QNarrowBin32Uto16Ux8,
mkexpr(vA_tmp), mkexpr(vB_tmp)) );
// TODO: set VSCR[SAT]
return True;
@@ -8765,14 +12617,14 @@
case 0x18E: // vpkshss (Pack Signed HW Signed Saturate, AV p220)
DIP("vpkshss v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
putVReg( vD_addr,
- binop(Iop_QNarrow16Sx8, mkexpr(vA), mkexpr(vB)) );
+ binop(Iop_QNarrowBin16Sto8Sx16, mkexpr(vA), mkexpr(vB)) );
// TODO: set VSCR[SAT]
return True;
case 0x1CE: // vpkswss (Pack Signed W Signed Saturate, AV p222)
DIP("vpkswss v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
putVReg( vD_addr,
- binop(Iop_QNarrow32Sx4, mkexpr(vA), mkexpr(vB)) );
+ binop(Iop_QNarrowBin32Sto16Sx8, mkexpr(vA), mkexpr(vB)) );
// TODO: set VSCR[SAT]
return True;
@@ -8812,7 +12664,7 @@
assign( b_tmp, binop(Iop_OrV128, mkexpr(b1),
binop(Iop_OrV128, mkexpr(b2), mkexpr(b3))) );
- putVReg( vD_addr, binop(Iop_Narrow32x4,
+ putVReg( vD_addr, binop(Iop_NarrowBin32to16x8,
mkexpr(a_tmp), mkexpr(b_tmp)) );
return True;
}
@@ -9238,8 +13090,221 @@
}
+/* The 0x3C primary opcode (VSX category) uses several different forms of
+ * extended opcodes:
+ * o XX2-form:
+ * - [10:2] (IBM notation [21:29])
+ * o XX3-form variants:
+ * - variant 1: [10:3] (IBM notation [21:28])
+ * - variant 2: [9:3] (IBM notation [22:28])
+ * - variant 3: [7:3] (IBM notation [24:28])
+ * o XX-4 form:
+ * - [10:6] (IBM notation [21:25])
+ *
+ * The XX2-form needs bit 0 masked from the standard extended opcode
+ * as returned by ifieldOPClo10; the XX3-form needs bits 0 and 1 masked;
+ * and the XX4-form needs bits 0, 1, and 2 masked. Additionally, the
+ * XX4 and XX3 (variants 2 and 3) forms need certain bits masked on the
+ * front end since their encoding does not begin at bit 21 like the standard
+ * format.
+ *
+ * The get_VSX60_opc2() function uses the vsx_insn array below to obtain the
+ * secondary opcode for such VSX instructions.
+ *
+*/
+struct vsx_insn {
+ UInt opcode;
+ Char * name;
+};
+
+// ATTENTION: Keep this array sorted on the opcocde!!!
+static struct vsx_insn vsx_all[] = {
+ { 0x8, "xxsldwi" },
+ { 0x18, "xxsel" },
+ { 0x28, "xxpermdi" },
+ { 0x48, "xxmrghw" },
+ { 0x80, "xsadddp" },
+ { 0x84, "xsmaddadp" },
+ { 0x8c, "xscmpudp" },
+ { 0x90, "xscvdpuxws" },
+ { 0x92, "xsrdpi" },
+ { 0x94, "xsrsqrtedp" },
+ { 0x96, "xssqrtdp" },
+ { 0xa0, "xssubdp" },
+ { 0xa4, "xsmaddmdp" },
+ { 0xac, "xscmpodp" },
+ { 0xb0, "xscvdpsxws" },
+ { 0xb2, "xsrdpiz" },
+ { 0xb4, "xsredp" },
+ { 0xc0, "xsmuldp" },
+ { 0xc4, "xsmsubadp" },
+ { 0xc8, "xxmrglw" },
+ { 0xd2, "xsrdpip" },
+ { 0xd4, "xstsqrtdp" },
+ { 0xd6, "xsrdpic" },
+ { 0xe0, "xsdivdp" },
+ { 0xe4, "xsmsubmdp" },
+ { 0xf2, "xsrdpim" },
+ { 0xf4, "xstdivdp" },
+ { 0x100, "xvaddsp" },
+ { 0x104, "xvmaddasp" },
+ { 0x10c, "xvcmpeqsp" },
+ { 0x110, "xvcvspuxws" },
+ { 0x112, "xvrspi" },
+ { 0x114, "xvrsqrtesp" },
+ { 0x116, "xvsqrtsp" },
+ { 0x120, "xvsubsp" },
+ { 0x124, "xvmaddmsp" },
+ { 0x12c, "xvcmpgtsp" },
+ { 0x130, "xvcvspsxws" },
+ { 0x132, "xvrspiz" },
+ { 0x134, "xvresp" },
+ { 0x140, "xvmulsp" },
+ { 0x144, "xvmsubasp" },
+ { 0x148, "xxspltw" },
+ { 0x14c, "xvcmpgesp" },
+ { 0x150, "xvcvuxwsp" },
+ { 0x152, "xvrspip" },
+ { 0x154, "xvtsqrtsp" },
+ { 0x156, "xvrspic" },
+ { 0x160, "xvdivsp" },
+ { 0x164, "xvmsubmsp" },
+ { 0x170, "xvcvsxwsp" },
+ { 0x172, "xvrspim" },
+ { 0x174, "xvtdivsp" },
+ { 0x180, "xvadddp" },
+ { 0x184, "xvmaddadp" },
+ { 0x18c, "xvcmpeqdp" },
+ { 0x190, "xvcvdpuxws" },
+ { 0x192, "xvrdpi" },
+ { 0x194, "xvrsqrtedp" },
+ { 0x196, "xvsqrtdp" },
+ { 0x1a0, "xvsubdp" },
+ { 0x1a4, "xvmaddmdp" },
+ { 0x1ac, "xvcmpgtdp" },
+ { 0x1b0, "xvcvdpsxws" },
+ { 0x1b2, "xvrdpiz" },
+ { 0x1b4, "xvredp" },
+ { 0x1c0, "xvmuldp" },
+ { 0x1c4, "xvmsubadp" },
+ { 0x1cc, "xvcmpgedp" },
+ { 0x1d0, "xvcvuxwdp" },
+ { 0x1d2, "xvrdpip" },
+ { 0x1d4, "xvtsqrtdp" },
+ { 0x1d6, "xvrdpic" },
+ { 0x1e0, "xvdivdp" },
+ { 0x1e4, "xvmsubmdp" },
+ { 0x1f0, "xvcvsxwdp" },
+ { 0x1f2, "xvrdpim" },
+ { 0x1f4, "xvtdivdp" },
+ { 0x208, "xxland" },
+ { 0x212, "xscvdpsp" },
+ { 0x228, "xxlandc" },
+ { 0x248 , "xxlor" },
+ { 0x268, "xxlxor" },
+ { 0x280, "xsmaxdp" },
+ { 0x284, "xsnmaddadp" },
+ { 0x288, "xxlnor" },
+ { 0x290, "xscvdpuxds" },
+ { 0x292, "xscvspdp" },
+ { 0x2a0, "xsmindp" },
+ { 0x2a4, "xsnmaddmdp" },
+ { 0x2b0, "xscvdpsxds" },
+ { 0x2b2, "xsabsdp" },
+ { 0x2c0, "xscpsgndp" },
+ { 0x2c4, "xsnmsubadp" },
+ { 0x2d0, "xscvuxddp" },
+ { 0x2d2, "xsnabsdp" },
+ { 0x2e4, "xsnmsubmdp" },
+ { 0x2f0, "xscvsxddp" },
+ { 0x2f2, "xsnegdp" },
+ { 0x300, "xvmaxsp" },
+ { 0x304, "xvnmaddasp" },
+ { 0x30c, "xvcmpeqsp." },
+ { 0x310, "xvcvspuxds" },
+ { 0x312, "xvcvdpsp" },
+ { 0x320, "xvminsp" },
+ { 0x324, "xvnmaddmsp" },
+ { 0x32c, "xvcmpgtsp." },
+ { 0x330, "xvcvspsxds" },
+ { 0x332, "xvabssp" },
+ { 0x340, "xvcpsgnsp" },
+ { 0x344, "xvnmsubasp" },
+ { 0x34c, "xvcmpgesp." },
+ { 0x350, "xvcvuxdsp" },
+ { 0x352, "xvnabssp" },
+ { 0x364, "xvnmsubmsp" },
+ { 0x370, "xvcvsxdsp" },
+ { 0x372, "xvnegsp" },
+ { 0x380, "xvmaxdp" },
+ { 0x384, "xvnmaddadp" },
+ { 0x38c, "xvcmpeqdp." },
+ { 0x390, "xvcvdpuxds" },
+ { 0x392, "xvcvspdp" },
+ { 0x3a0, "xvmindp" },
+ { 0x3a4, "xvnmaddmdp" },
+ { 0x3ac, "xvcmpgtdp." },
+ { 0x3b0, "xvcvdpsxds" },
+ { 0x3b2, "xvabsdp" },
+ { 0x3c0, "xvcpsgndp" },
+ { 0x3c4, "xvnmsubadp" },
+ { 0x3cc, "xvcmpgedp." },
+ { 0x3d0, "xvcvuxddp" },
+ { 0x3d2, "xvnabsdp" },
+ { 0x3e4, "xvnmsubmdp" },
+ { 0x3f0, "xvcvsxddp" },
+ { 0x3f2, "xvnegdp" }
+};
+#define VSX_ALL_LEN 135
+
+// ATTENTION: This search function assumes vsx_all array is sorted.
+static Int findVSXextOpCode(UInt opcode)
+{
+ Int low, mid, high;
+ low = 0;
+ high = VSX_ALL_LEN - 1;
+ while (low <= high) {
+ mid = (low + high)/2;
+ if (opcode < vsx_all[mid].opcode)
+ high = mid - 1;
+ else if (opcode > vsx_all[mid].opcode)
+ low = mid + 1;
+ else
+ return mid;
+ }
+ return -1;
+}
+
+
+/* The full 10-bit extended opcode retrieved via ifieldOPClo10 is
+ * passed, and we then try to match it up with one of the VSX forms
+ * below.
+ */
+static UInt get_VSX60_opc2(UInt opc2_full)
+{
+#define XX2_MASK 0x000003FE
+#define XX3_1_MASK 0x000003FC
+#define XX3_2_MASK 0x000001FC
+#define XX3_3_MASK 0x0000007C
+#define XX4_MASK 0x00000018
+ Int ret;
+ UInt vsxExtOpcode = 0;
+
+ if (( ret = findVSXextOpCode(opc2_full & XX2_MASK)) >= 0)
+ vsxExtOpcode = vsx_all[ret].opcode;
+ else if (( ret = findVSXextOpCode(opc2_full & XX3_1_MASK)) >= 0)
+ vsxExtOpcode = vsx_all[ret].opcode;
+ else if (( ret = findVSXextOpCode(opc2_full & XX3_2_MASK)) >= 0)
+ vsxExtOpcode = vsx_all[ret].opcode;
+ else if (( ret = findVSXextOpCode(opc2_full & XX3_3_MASK)) >= 0)
+ vsxExtOpcode = vsx_all[ret].opcode;
+ else if (( ret = findVSXextOpCode(opc2_full & XX4_MASK)) >= 0)
+ vsxExtOpcode = vsx_all[ret].opcode;
+
+ return vsxExtOpcode;
+}
/*------------------------------------------------------------*/
/*--- Disassemble a single instruction ---*/
@@ -9268,6 +13333,7 @@
Bool allow_V = False;
Bool allow_FX = False;
Bool allow_GX = False;
+ Bool allow_VX = False; // Equates to "supports Power ISA 2.06
UInt hwcaps = archinfo->hwcaps;
Long delta;
@@ -9277,11 +13343,13 @@
allow_V = (0 != (hwcaps & VEX_HWCAPS_PPC64_V));
allow_FX = (0 != (hwcaps & VEX_HWCAPS_PPC64_FX));
allow_GX = (0 != (hwcaps & VEX_HWCAPS_PPC64_GX));
+ allow_VX = (0 != (hwcaps & VEX_HWCAPS_PPC64_VX));
} else {
allow_F = (0 != (hwcaps & VEX_HWCAPS_PPC32_F));
allow_V = (0 != (hwcaps & VEX_HWCAPS_PPC32_V));
allow_FX = (0 != (hwcaps & VEX_HWCAPS_PPC32_FX));
allow_GX = (0 != (hwcaps & VEX_HWCAPS_PPC32_GX));
+ allow_VX = (0 != (hwcaps & VEX_HWCAPS_PPC32_VX));
}
/* The running delta */
@@ -9473,6 +13541,20 @@
case 0x3B:
if (!allow_F) goto decode_noF;
+ opc2 = ifieldOPClo10(theInstr);
+ switch (opc2) {
+ case 0x3CE: // fcfidus (implemented as native insn)
+ if (!allow_VX)
+ goto decode_noVX;
+ if (dis_fp_round( theInstr ))
+ goto decode_success;
+ goto decode_failure;
+ case 0x34E: // fcfids
+ if (dis_fp_round( theInstr ))
+ goto decode_success;
+ goto decode_failure;
+ }
+
opc2 = IFIELD(theInstr, 1, 5);
switch (opc2) {
/* Floating Point Arith Instructions */
@@ -9499,12 +13581,127 @@
if (!allow_GX) goto decode_noGX;
if (dis_fp_arith(theInstr)) goto decode_success;
goto decode_failure;
-
+
default:
goto decode_failure;
}
break;
+ case 0x3C: // VSX instructions (except load/store)
+ {
+ UInt vsxOpc2 = get_VSX60_opc2(opc2);
+ /* The vsxOpc2 returned is the "normalized" value, representing the
+ * instructions secondary opcode as taken from the standard secondary
+ * opcode field [21:30] (IBM notatition), even if the actual field
+ * is non-standard. These normalized values are given in the opcode
+ * appendices of the ISA 2.06 document.
+ */
+ if (vsxOpc2 == 0)
+ goto decode_failure;
+
+ switch (vsxOpc2) {
+ case 0x8: case 0x28: case 0x48: case 0xc8: // xxsldwi, xxpermdi, xxmrghw, xxmrglw
+ case 0x018: case 0x148: // xxsel, xxspltw
+ if (dis_vx_permute_misc(theInstr, vsxOpc2)) goto decode_success;
+ goto decode_failure;
+ case 0x268: case 0x248: case 0x288: case 0x208: case 0x228: // xxlxor, xxlor, xxlnor, xxland, xxlandc
+ if (dis_vx_logic(theInstr, vsxOpc2)) goto decode_success;
+ goto decode_failure;
+ case 0x2B2: case 0x2C0: // xsabsdp, xscpsgndp
+ case 0x2D2: case 0x2F2: // xsnabsdp, xsnegdp
+ case 0x280: case 0x2A0: // xsmaxdp, xsmindp
+ case 0x0F2: case 0x0D2: // xsrdpim, xsrdpip
+ case 0x0B4: case 0x094: // xsredp, xsrsqrtedp
+ case 0x0D6: case 0x0B2: // xsrdpic, xsrdpiz
+ case 0x092: // xsrdpi
+ if (dis_vxs_misc(theInstr, vsxOpc2)) goto decode_success;
+ goto decode_failure;
+ case 0x08C: case 0x0AC: // xscmpudp, xscmpodp
+ if (dis_vx_cmp(theInstr, vsxOpc2)) goto decode_success;
+ goto decode_failure;
+ case 0x080: case 0x0E0: // xsadddp, xsdivdp
+ case 0x084: case 0x0A4: // xsmaddadp, xsmaddmdp
+ case 0x0C4: case 0x0E4: // xsmsubadp, xsmsubmdp
+ case 0x284: case 0x2A4: // xsnmaddadp, xsnmaddmdp
+ case 0x2C4: case 0x2E4: // xsnmsubadp, xsnmsubmdp
+ case 0x0C0: case 0x0A0: // xsmuldp, xssubdp
+ case 0x096: case 0x0F4: // xssqrtdp, xstdivdp
+ case 0x0D4: // xstsqrtdp
+ if (dis_vxs_arith(theInstr, vsxOpc2)) goto decode_success;
+ goto decode_failure;
+ case 0x180: // xvadddp
+ case 0x1E0: // xvdivdp
+ case 0x1C0: // xvmuldp
+ case 0x1A0: // xvsubdp
+ case 0x184: case 0x1A4: // xvmaddadp, xvmaddmdp
+ case 0x1C4: case 0x1E4: // xvmsubadp, xvmsubmdp
+ case 0x384: case 0x3A4: // xvnmaddadp, xvnmaddmdp
+ case 0x3C4: case 0x3E4: // xvnmsubadp, xvnmsubmdp
+ case 0x1D4: case 0x1F4: // xvtsqrtdp, xvtdivdp
+ case 0x196: // xvsqrtdp
+ if (dis_vxv_dp_arith(theInstr, vsxOpc2)) goto decode_success;
+ goto decode_failure;
+ case 0x100: // xvaddsp
+ case 0x160: // xvdivsp
+ case 0x140: // xvmulsp
+ case 0x120: // xvsubsp
+ case 0x104: case 0x124: // xvmaddasp, xvmaddmsp
+ case 0x144: case 0x164: // xvmsubasp, xvmsubmsp
+ case 0x304: case 0x324: // xvnmaddasp, xvnmaddmsp
+ case 0x344: case 0x364: // xvnmsubasp, xvnmsubmsp
+ case 0x154: case 0x174: // xvtsqrtsp, xvtdivsp
+ case 0x116: // xvsqrtsp
+ if (dis_vxv_sp_arith(theInstr, vsxOpc2)) goto decode_success;
+ goto decode_failure;
+
+ case 0x2B0: case 0x2F0: case 0x2D0: // xscvdpsxds, xscvsxddp, xscvuxddp
+ case 0x1b0: case 0x130: // xvcvdpsxws, xvcvspsxws
+ case 0x0b0: case 0x290: // xscvdpsxws, xscvdpuxds
+ case 0x212: case 0x090: // xscvdpsp, xscvdpuxws
+ case 0x292: case 0x312: // xscvspdp, xvcvdpsp
+ case 0x390: case 0x190: // xvcvdpuxds, xvcvdpuxws
+ case 0x3B0: case 0x310: // xvcvdpsxds, xvcvspuxds
+ case 0x392: case 0x330: // xvcvspdp, xvcvspsxds
+ case 0x110: case 0x3f0: // xvcvspuxws, xvcvsxddp
+ case 0x370: case 0x1f0: // xvcvsxdsp, xvcvsxwdp
+ case 0x170: case 0x150: // xvcvsxwsp, xvcvuxwsp
+ case 0x3d0: case 0x350: // xvcvuxddp, xvcvuxdsp
+ case 0x1d0: // xvcvuxwdp
+ if (dis_vx_conv(theInstr, vsxOpc2)) goto decode_success;
+ goto decode_failure;
+
+ case 0x18C: case 0x38C: // xvcmpeqdp[.]
+ case 0x10C: case 0x30C: // xvcmpeqsp[.]
+ case 0x14C: case 0x34C: // xvcmpgesp[.]
+ case 0x12C: case 0x32C: // xvcmpgtsp[.]
+ case 0x1CC: case 0x3CC: // xvcmpgedp[.]
+ case 0x1AC: case 0x3AC: // xvcmpgtdp[.]
+ if (dis_vvec_cmp(theInstr, vsxOpc2)) goto decode_success;
+ goto decode_failure;
+
+ case 0x134: // xvresp
+ case 0x1B4: // xvredp
+ case 0x194: case 0x114: // xvrsqrtedp, xvrsqrtesp
+ case 0x380: case 0x3A0: // xvmaxdp, xvmindp
+ case 0x300: case 0x320: // xvmaxsp, xvminsp
+ case 0x3C0: case 0x340: // xvcpsgndp, xvcpsgnsp
+ case 0x3B2: case 0x332: // xvabsdp, xvabssp
+ case 0x3D2: case 0x352: // xvnabsdp, xvnabssp
+ case 0x192: case 0x1D6: // xvrdpi, xvrdpic
+ case 0x1F2: case 0x1D2: // xvrdpim, xvrdpip
+ case 0x1B2: case 0x3F2: // xvrdpiz, xvnegdp
+ case 0x112: case 0x156: // xvrspi, xvrspic
+ case 0x172: case 0x152: // xvrspim, xvrspip
+ case 0x132: // xvrspiz
+ if (dis_vxv_misc(theInstr, vsxOpc2)) goto decode_success;
+ goto decode_failure;
+
+ default:
+ goto decode_failure;
+ }
+ break;
+ }
+
/* 64bit Integer Stores */
case 0x3E: // std, stdu
if (!mode64) goto decode_failure;
@@ -9555,6 +13752,11 @@
if (dis_fp_cmp(theInstr)) goto decode_success;
goto decode_failure;
+ case 0x080: // ftdiv
+ case 0x0A0: // ftsqrt
+ if (dis_fp_tests(theInstr)) goto decode_success;
+ goto decode_failure;
+
/* Floating Point Rounding/Conversion Instructions */
case 0x00C: // frsp
case 0x00E: // fctiw
@@ -9564,6 +13766,11 @@
case 0x34E: // fcfid
if (dis_fp_round(theInstr)) goto decode_success;
goto decode_failure;
+ case 0x3CE: case 0x3AE: case 0x3AF: // fcfidu, fctidu[z] (implemented as native insns)
+ case 0x08F: case 0x08E: // fctiwu[z] (implemented as native insns)
+ if (!allow_VX) goto decode_noVX;
+ if (dis_fp_round(theInstr)) goto decode_success;
+ goto decode_failure;
/* Power6 rounding stuff */
case 0x1E8: // frim
@@ -9640,13 +13847,26 @@
case 0x1CB: case 0x04B: case 0x00B: // divwu, mulhw, mulhwu
case 0x0EB: case 0x068: case 0x028: // mullw, neg, subf
case 0x008: case 0x088: case 0x0E8: // subfc, subfe, subfme
- case 0x0C8: // subfze
+ case 0x0C8: // subfze
+ if (dis_int_arith( theInstr )) goto decode_success;
+ goto decode_failure;
+
+ case 0x18B: // divweu (implemented as native insn)
+ case 0x1AB: // divwe (implemented as native insn)
+ if (!allow_VX) goto decode_noVX;
if (dis_int_arith( theInstr )) goto decode_success;
goto decode_failure;
/* 64bit Integer Arithmetic */
case 0x009: case 0x049: case 0x0E9: // mulhdu, mulhd, mulld
- case 0x1C9: case 0x1E9: // divdu, divd
+ case 0x1C9: case 0x1E9: // divdu, divd
+ if (!mode64) goto decode_failure;
+ if (dis_int_arith( theInstr )) goto decode_success;
+ goto decode_failure;
+
+ case 0x1A9: // divde (implemented as native insn)
+ case 0x189: // divdeuo (implemented as native insn)
+ if (!allow_VX) goto decode_noVX;
if (!mode64) goto decode_failure;
if (dis_int_arith( theInstr )) goto decode_success;
goto decode_failure;
@@ -9730,7 +13950,8 @@
/* Integer Load and Store with Byte Reverse Instructions */
case 0x316: case 0x216: case 0x396: // lhbrx, lwbrx, sthbrx
- case 0x296: // stwbrx
+ case 0x296: case 0x214: // stwbrx, ldbrx
+ case 0x294: // stdbrx
if (dis_int_ldst_rev( theInstr )) goto decode_success;
goto decode_failure;
@@ -9815,6 +14036,11 @@
if (dis_fp_load( theInstr )) goto decode_success;
goto decode_failure;
+ case 0x377: // lfiwzx
+ if (!allow_F) goto decode_noF;
+ if (dis_fp_load( theInstr )) goto decode_success;
+ goto decode_failure;
+
/* AltiVec instructions */
/* AV Cache Control - Data streams */
@@ -9838,6 +14064,31 @@
if (dis_av_store( theInstr )) goto decode_success;
goto decode_failure;
+ /* VSX Load */
+ case 0x24C: // lxsdx
+ case 0x34C: // lxvd2x
+ case 0x14C: // lxvdsx
+ case 0x30C: // lxvw4x
+ if (dis_vx_load( theInstr )) goto decode_success;
+ goto decode_failure;
+
+ /* VSX Store */
+ case 0x2CC: // stxsdx
+ case 0x3CC: // stxvd2x
+ case 0x38C: // stxvw4x
+ if (dis_vx_store( theInstr )) goto decode_success;
+ goto decode_failure;
+
+ /* Miscellaneous ISA 2.06 instructions */
+ case 0x1FA: // popcntd
+ case 0x17A: // popcntw
+ if (dis_int_logic( theInstr )) goto decode_success;
+ goto decode_failure;
+
+ case 0x0FC: // bpermd
+ if (dis_int_logic( theInstr )) goto decode_success;
+ goto decode_failure;
+
default:
/* Deal with some other cases that we would otherwise have
punted on. */
@@ -10023,6 +14274,10 @@
vassert(!allow_V);
vex_printf("disInstr(ppc): declined to decode an AltiVec insn.\n");
goto decode_failure;
+ decode_noVX:
+ vassert(!allow_VX);
+ vex_printf("disInstr(ppc): declined to decode a Power ISA 2.06 insn.\n");
+ goto decode_failure;
decode_noFX:
vassert(!allow_FX);
vex_printf("disInstr(ppc): "
@@ -10105,10 +14360,10 @@
/* do some sanity checks */
mask32 = VEX_HWCAPS_PPC32_F | VEX_HWCAPS_PPC32_V
- | VEX_HWCAPS_PPC32_FX | VEX_HWCAPS_PPC32_GX;
+ | VEX_HWCAPS_PPC32_FX | VEX_HWCAPS_PPC32_GX | VEX_HWCAPS_PPC32_VX;
- mask64 = VEX_HWCAPS_PPC64_V
- | VEX_HWCAPS_PPC64_FX | VEX_HWCAPS_PPC64_GX;
+ mask64 = VEX_HWCAPS_PPC64_V | VEX_HWCAPS_PPC64_FX
+ | VEX_HWCAPS_PPC64_GX | VEX_HWCAPS_PPC64_VX;
if (mode64) {
vassert((hwcaps_guest & mask32) == 0);
diff --git a/main/VEX/priv/guest_s390_defs.h b/main/VEX/priv/guest_s390_defs.h
new file mode 100644
index 0000000..3c38955
--- /dev/null
+++ b/main/VEX/priv/guest_s390_defs.h
@@ -0,0 +1,199 @@
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+/*---------------------------------------------------------------*/
+/*--- begin guest_s390_defs.h ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* Contributed by Florian Krohm */
+
+#ifndef __VEX_GUEST_S390_DEFS_H
+#define __VEX_GUEST_S390_DEFS_H
+
+#include "libvex_basictypes.h" // offsetof
+#include "libvex_ir.h" // IRSB (needed by bb_to_IR.h)
+#include "libvex.h" // VexArch (needed by bb_to_IR.h)
+#include "guest_generic_bb_to_IR.h" // DisResult
+
+
+/* Convert one s390 insn to IR. See the type DisOneInstrFn in
+ bb_to_IR.h. */
+DisResult disInstr_S390 ( IRSB* irbb,
+ Bool put_IP,
+ Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool resteerCisOk,
+ void* callback_opaque,
+ UChar* guest_code,
+ Long delta,
+ Addr64 guest_IP,
+ VexArch guest_arch,
+ VexArchInfo* archinfo,
+ VexAbiInfo* abiinfo,
+ Bool host_bigendian );
+
+/* Used by the optimiser to specialise calls to helpers. */
+IRExpr* guest_s390x_spechelper ( HChar *function_name,
+ IRExpr **args,
+ IRStmt **precedingStmts,
+ Int n_precedingStmts);
+
+
+/* Describes to the optimser which part of the guest state require
+ precise memory exceptions. This is logically part of the guest
+ state description. */
+Bool guest_s390x_state_requires_precise_mem_exns ( Int, Int );
+
+extern VexGuestLayout s390xGuest_layout;
+
+
+#define S390X_GUEST_OFFSET(x) offsetof(VexGuestS390XState, x)
+
+/*------------------------------------------------------------*/
+/*--- Dirty Helper functions. ---*/
+/*------------------------------------------------------------*/
+void s390x_dirtyhelper_00(VexGuestS390XState *guest_state);
+void s390x_dirtyhelper_EX(ULong torun);
+ULong s390x_dirtyhelper_STCK(ULong *addr);
+ULong s390x_dirtyhelper_STCKF(ULong *addr);
+ULong s390x_dirtyhelper_STCKE(ULong *addr);
+ULong s390x_dirtyhelper_STFLE(VexGuestS390XState *guest_state, HWord addr);
+
+/* The various ways to compute the condition code. */
+enum {
+ S390_CC_OP_BITWISE = 0,
+ S390_CC_OP_SIGNED_COMPARE = 1,
+ S390_CC_OP_UNSIGNED_COMPARE = 2,
+ S390_CC_OP_SIGNED_ADD_32 = 3,
+ S390_CC_OP_SIGNED_ADD_64 = 4,
+ S390_CC_OP_UNSIGNED_ADD_32 = 5,
+ S390_CC_OP_UNSIGNED_ADD_64 = 6,
+ S390_CC_OP_UNSIGNED_ADDC_32 = 7,
+ S390_CC_OP_UNSIGNED_ADDC_64 = 8,
+ S390_CC_OP_SIGNED_SUB_32 = 9,
+ S390_CC_OP_SIGNED_SUB_64 = 10,
+ S390_CC_OP_UNSIGNED_SUB_32 = 11,
+ S390_CC_OP_UNSIGNED_SUB_64 = 12,
+ S390_CC_OP_UNSIGNED_SUBB_32 = 13,
+ S390_CC_OP_UNSIGNED_SUBB_64 = 14,
+ S390_CC_OP_LOAD_AND_TEST = 15,
+ S390_CC_OP_LOAD_POSITIVE_32 = 16,
+ S390_CC_OP_LOAD_POSITIVE_64 = 17,
+ S390_CC_OP_TEST_AND_SET = 18,
+ S390_CC_OP_TEST_UNDER_MASK_8 = 19,
+ S390_CC_OP_TEST_UNDER_MASK_16 = 20,
+ S390_CC_OP_SHIFT_LEFT_32 = 21,
+ S390_CC_OP_SHIFT_LEFT_64 = 22,
+ S390_CC_OP_INSERT_CHAR_MASK_32 = 23,
+ S390_CC_OP_BFP_RESULT_32 = 24,
+ S390_CC_OP_BFP_RESULT_64 = 25,
+ S390_CC_OP_BFP_RESULT_128 = 26,
+ S390_CC_OP_BFP_32_TO_INT_32 = 27,
+ S390_CC_OP_BFP_64_TO_INT_32 = 28,
+ S390_CC_OP_BFP_128_TO_INT_32 = 29,
+ S390_CC_OP_BFP_32_TO_INT_64 = 30,
+ S390_CC_OP_BFP_64_TO_INT_64 = 31,
+ S390_CC_OP_BFP_128_TO_INT_64 = 32,
+ S390_CC_OP_BFP_TDC_32 = 33,
+ S390_CC_OP_BFP_TDC_64 = 34,
+ S390_CC_OP_BFP_TDC_128 = 35,
+ S390_CC_OP_SET = 36
+};
+
+/*------------------------------------------------------------*/
+/*--- Thunk layout ---*/
+/*------------------------------------------------------------*/
+
+/*
+ Z -- value is zero extended to 32 / 64 bit
+ S -- value is sign extended to 32 / 64 bit
+ F -- a binary floating point value
+
+ +--------------------------------+-----------------------+----------------------+-------------+
+ | op | cc_dep1 | cc_dep2 | cc_ndep |
+ +--------------------------------+-----------------------+----------------------+-------------+
+ | S390_CC_OP_BITWISE | Z result | | |
+ | S390_CC_OP_SIGNED_COMPARE | S 1st operand | S 2nd operand | |
+ | S390_CC_OP_UNSIGNED_COMPARE | Z 1st operand | Z 2nd operand | |
+ | S390_CC_OP_SIGNED_ADD_32 | S 1st operand | S 2nd operand | |
+ | S390_CC_OP_SIGNED_ADD_64 | S 1st operand | S 2nd operand | |
+ | S390_CC_OP_UNSIGNED_ADD_32 | Z 1st operand | Z 2nd operand | |
+ | S390_CC_OP_UNSIGNED_ADD_64 | Z 1st operand | Z 2nd operand | |
+ | S390_CC_OP_UNSIGNED_ADDC_32 | Z 1st operand | Z 2nd operand | Z carry in |
+ | S390_CC_OP_UNSIGNED_ADDC_64 | Z 1st operand | Z 2nd operand | Z carry in |
+ | S390_CC_OP_SIGNED_SUB_32 | S left operand | S right operand | |
+ | S390_CC_OP_SIGNED_SUB_64 | S left operand | S right operand | |
+ | S390_CC_OP_UNSIGNED_SUB_32 | Z left operand | Z right operand | |
+ | S390_CC_OP_UNSIGNED_SUB_64 | Z left operand | Z right operand | |
+ | S390_CC_OP_UNSIGNED_SUBB_32 | Z left operand | Z right operand | Z borrow in |
+ | S390_CC_OP_UNSIGNED_SUBB_64 | Z left operand | Z right operand | Z borrow in |
+ | S390_CC_OP_LOAD_AND_TEST | S loaded value | | |
+ | S390_CC_OP_LOAD_POSITIVE_32 | S loaded value | | |
+ | S390_CC_OP_LOAD_POSITIVE_64 | S loaded value | | |
+ | S390_CC_OP_TEST_AND_SET | Z tested value | | |
+ | S390_CC_OP_TEST_UNDER_MASK_8 | Z tested value | Z mask | |
+ | S390_CC_OP_TEST_UNDER_MASK_16 | Z tested value | Z mask | |
+ | S390_CC_OP_SHIFT_LEFT_32 | Z value to be shifted | Z shift amount | |
+ | S390_CC_OP_SHIFT_LEFT_64 | Z value to be shifted | Z shift amount | |
+ | S390_CC_OP_INSERT_CHAR_MASK_32 | Z result | Z mask | |
+ | S390_CC_OP_BFP_RESULT_32 | F result | | |
+ | S390_CC_OP_BFP_RESULT_64 | F result | | |
+ | S390_CC_OP_BFP_RESULT_128 | F result hi 64 bits | F result low 64 bits | |
+ | S390_CC_OP_BFP_32_TO_INT_32 | F source | | |
+ | S390_CC_OP_BFP_64_TO_INT_32 | F source | | |
+ | S390_CC_OP_BFP_128_TO_INT_32 | F source hi 64 bits | | |
+ | S390_CC_OP_BFP_32_TO_INT_64 | F source | | |
+ | S390_CC_OP_BFP_64_TO_INT_64 | F source | | |
+ | S390_CC_OP_BFP_128_TO_INT_64 | F source hi 64 bits | | |
+ | S390_CC_OP_BFP_TDC_32 | F value | Z class | |
+ | S390_CC_OP_BFP_TDC_64 | F value | Z class | |
+ | S390_CC_OP_BFP_TDC_128 | F value hi 64 bits | F value low 64 bits | Z class |
+ | S390_CC_OP_SET | Z condition code | | |
+ +--------------------------------+-----------------------+----------------------+-------------+
+*/
+
+/*------------------------------------------------------------*/
+/*--- Condition code helpers. ---*/
+/*------------------------------------------------------------*/
+UInt s390_calculate_cc(ULong cc_op, ULong cc_dep1, ULong cc_dep2,
+ ULong cc_ndep);
+UInt s390_calculate_icc(ULong op, ULong dep1, ULong dep2);
+UInt s390_calculate_cond(ULong mask, ULong op, ULong dep1, ULong dep2,
+ ULong ndep);
+
+/* Size of special instruction preamble */
+#define S390_SPECIAL_OP_PREAMBLE_SIZE 8
+
+/* Size of special instructions */
+#define S390_SPECIAL_OP_SIZE 2
+
+/* Last target instruction for the EX helper */
+extern ULong last_execute_target;
+
+/*---------------------------------------------------------------*/
+/*--- end guest_s390_defs.h ---*/
+/*---------------------------------------------------------------*/
+
+#endif /* __VEX_GUEST_S390_DEFS_H */
diff --git a/main/VEX/priv/guest_s390_helpers.c b/main/VEX/priv/guest_s390_helpers.c
new file mode 100644
index 0000000..60149f0
--- /dev/null
+++ b/main/VEX/priv/guest_s390_helpers.c
@@ -0,0 +1,1263 @@
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+/*---------------------------------------------------------------*/
+/*--- begin guest_s390_helpers.c ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* Contributed by Florian Krohm */
+
+#include "libvex_basictypes.h"
+#include "libvex_emwarn.h"
+#include "libvex_guest_s390x.h"
+#include "libvex_ir.h"
+#include "libvex.h"
+#include "libvex_s390x_common.h"
+
+#include "main_util.h"
+#include "guest_generic_bb_to_IR.h"
+#include "guest_s390_defs.h"
+
+void
+LibVEX_GuestS390X_initialise(VexGuestS390XState *state)
+{
+/*------------------------------------------------------------*/
+/*--- Initialise ar registers ---*/
+/*------------------------------------------------------------*/
+
+ state->guest_a0 = 0;
+ state->guest_a1 = 0;
+ state->guest_a2 = 0;
+ state->guest_a3 = 0;
+ state->guest_a4 = 0;
+ state->guest_a5 = 0;
+ state->guest_a6 = 0;
+ state->guest_a7 = 0;
+ state->guest_a8 = 0;
+ state->guest_a9 = 0;
+ state->guest_a10 = 0;
+ state->guest_a11 = 0;
+ state->guest_a12 = 0;
+ state->guest_a13 = 0;
+ state->guest_a14 = 0;
+ state->guest_a15 = 0;
+
+/*------------------------------------------------------------*/
+/*--- Initialise fpr registers ---*/
+/*------------------------------------------------------------*/
+
+ state->guest_f0 = 0;
+ state->guest_f1 = 0;
+ state->guest_f2 = 0;
+ state->guest_f3 = 0;
+ state->guest_f4 = 0;
+ state->guest_f5 = 0;
+ state->guest_f6 = 0;
+ state->guest_f7 = 0;
+ state->guest_f8 = 0;
+ state->guest_f9 = 0;
+ state->guest_f10 = 0;
+ state->guest_f11 = 0;
+ state->guest_f12 = 0;
+ state->guest_f13 = 0;
+ state->guest_f14 = 0;
+ state->guest_f15 = 0;
+
+/*------------------------------------------------------------*/
+/*--- Initialise gpr registers ---*/
+/*------------------------------------------------------------*/
+
+ state->guest_r0 = 0;
+ state->guest_r1 = 0;
+ state->guest_r2 = 0;
+ state->guest_r3 = 0;
+ state->guest_r4 = 0;
+ state->guest_r5 = 0;
+ state->guest_r6 = 0;
+ state->guest_r7 = 0;
+ state->guest_r8 = 0;
+ state->guest_r9 = 0;
+ state->guest_r10 = 0;
+ state->guest_r11 = 0;
+ state->guest_r12 = 0;
+ state->guest_r13 = 0;
+ state->guest_r14 = 0;
+ state->guest_r15 = 0;
+
+/*------------------------------------------------------------*/
+/*--- Initialise S390 miscellaneous registers ---*/
+/*------------------------------------------------------------*/
+
+ state->guest_counter = 0;
+ state->guest_fpc = 0;
+ state->guest_IA = 0;
+
+/*------------------------------------------------------------*/
+/*--- Initialise S390 pseudo registers ---*/
+/*------------------------------------------------------------*/
+
+ state->guest_SYSNO = 0;
+
+/*------------------------------------------------------------*/
+/*--- Initialise generic pseudo registers ---*/
+/*------------------------------------------------------------*/
+
+ state->guest_NRADDR = 0;
+ state->guest_TISTART = 0;
+ state->guest_TILEN = 0;
+ state->guest_IP_AT_SYSCALL = 0;
+ state->guest_EMWARN = EmWarn_NONE;
+
+/*------------------------------------------------------------*/
+/*--- Initialise thunk ---*/
+/*------------------------------------------------------------*/
+
+ state->guest_CC_OP = 0;
+ state->guest_CC_DEP1 = 0;
+ state->guest_CC_DEP2 = 0;
+ state->guest_CC_NDEP = 0;
+}
+
+
+/* Figure out if any part of the guest state contained in minoff
+ .. maxoff requires precise memory exceptions. If in doubt return
+ True (but this is generates significantly slower code). */
+Bool
+guest_s390x_state_requires_precise_mem_exns(Int minoff, Int maxoff)
+{
+ Int lr_min = S390X_GUEST_OFFSET(guest_LR);
+ Int lr_max = lr_min + 8 - 1;
+ Int sp_min = S390X_GUEST_OFFSET(guest_SP);
+ Int sp_max = sp_min + 8 - 1;
+ Int fp_min = S390X_GUEST_OFFSET(guest_FP);
+ Int fp_max = fp_min + 8 - 1;
+ Int ia_min = S390X_GUEST_OFFSET(guest_IA);
+ Int ia_max = ia_min + 8 - 1;
+
+ if (maxoff < lr_min || minoff > lr_max) {
+ /* No overlap with LR */
+ } else {
+ return True;
+ }
+
+ if (maxoff < sp_min || minoff > sp_max) {
+ /* No overlap with SP */
+ } else {
+ return True;
+ }
+
+ if (maxoff < fp_min || minoff > fp_max) {
+ /* No overlap with FP */
+ } else {
+ return True;
+ }
+
+ if (maxoff < ia_min || minoff > ia_max) {
+ /* No overlap with IA */
+ } else {
+ return True;
+ }
+
+ return False;
+}
+
+
+#define ALWAYSDEFD(field) \
+ { S390X_GUEST_OFFSET(field), \
+ (sizeof ((VexGuestS390XState*)0)->field) }
+
+VexGuestLayout s390xGuest_layout = {
+
+ /* Total size of the guest state, in bytes. */
+ .total_sizeB = sizeof(VexGuestS390XState),
+
+ /* Describe the stack pointer. */
+ .offset_SP = S390X_GUEST_OFFSET(guest_SP),
+ .sizeof_SP = 8,
+
+ /* Describe the frame pointer. */
+ .offset_FP = S390X_GUEST_OFFSET(guest_FP),
+ .sizeof_FP = 8,
+
+ /* Describe the instruction pointer. */
+ .offset_IP = S390X_GUEST_OFFSET(guest_IA),
+ .sizeof_IP = 8,
+
+ /* Describe any sections to be regarded by Memcheck as
+ 'always-defined'. */
+ .n_alwaysDefd = 9,
+
+ /* Flags thunk: OP and NDEP are always defined, whereas DEP1
+ and DEP2 have to be tracked. See detailed comment in
+ gdefs.h on meaning of thunk fields. */
+ .alwaysDefd = {
+ /* 0 */ ALWAYSDEFD(guest_CC_OP), /* generic */
+ /* 1 */ ALWAYSDEFD(guest_CC_NDEP), /* generic */
+ /* 2 */ ALWAYSDEFD(guest_EMWARN), /* generic */
+ /* 3 */ ALWAYSDEFD(guest_TISTART), /* generic */
+ /* 4 */ ALWAYSDEFD(guest_TILEN), /* generic */
+ /* 5 */ ALWAYSDEFD(guest_IP_AT_SYSCALL), /* generic */
+ /* 6 */ ALWAYSDEFD(guest_IA), /* control reg */
+ /* 7 */ ALWAYSDEFD(guest_fpc), /* control reg */
+ /* 8 */ ALWAYSDEFD(guest_counter), /* internal usage register */
+ }
+};
+
+/*------------------------------------------------------------*/
+/*--- Dirty helper for invalid opcode 00 ---*/
+/*------------------------------------------------------------*/
+#if defined(VGA_s390x)
+void
+s390x_dirtyhelper_00(VexGuestS390XState *guest_state)
+{
+ /* Avoid infinite loop in case SIGILL is caught. See also
+ none/tests/s390x/op_exception.c */
+ guest_state->guest_IA += 2;
+
+ asm volatile(".hword 0\n");
+}
+#else
+void s390x_dirtyhelper_00(VexGuestS390XState *guest_state) { }
+#endif
+
+/*------------------------------------------------------------*/
+/*--- Dirty helper for EXecute ---*/
+/*------------------------------------------------------------*/
+void
+s390x_dirtyhelper_EX(ULong torun)
+{
+ last_execute_target = torun;
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Dirty helper for Clock instructions ---*/
+/*------------------------------------------------------------*/
+#if defined(VGA_s390x)
+ULong s390x_dirtyhelper_STCK(ULong *addr)
+{
+ int cc;
+
+ asm volatile("stck %0\n"
+ "ipm %1\n"
+ "srl %1,28\n"
+ : "+Q" (*addr), "=d" (cc) : : "cc");
+ return cc;
+}
+
+ULong s390x_dirtyhelper_STCKE(ULong *addr)
+{
+ int cc;
+
+ asm volatile("stcke %0\n"
+ "ipm %1\n"
+ "srl %1,28\n"
+ : "+Q" (*addr), "=d" (cc) : : "cc");
+ return cc;
+}
+
+ULong s390x_dirtyhelper_STCKF(ULong *addr)
+{
+ int cc;
+
+ asm volatile(".insn s,0xb27c0000,%0\n"
+ "ipm %1\n"
+ "srl %1,28\n"
+ : "+Q" (*addr), "=d" (cc) : : "cc");
+ return cc;
+}
+#else
+ULong s390x_dirtyhelper_STCK(ULong *addr) {return 3;}
+ULong s390x_dirtyhelper_STCKF(ULong *addr) {return 3;}
+ULong s390x_dirtyhelper_STCKE(ULong *addr) {return 3;}
+#endif /* VGA_s390x */
+
+/*------------------------------------------------------------*/
+/*--- Dirty helper for Store Facility instruction ---*/
+/*------------------------------------------------------------*/
+#if defined(VGA_s390x)
+ULong
+s390x_dirtyhelper_STFLE(VexGuestS390XState *guest_state, HWord addr)
+{
+ ULong hoststfle[S390_NUM_FACILITY_DW], cc, num_dw, i;
+ register ULong reg0 asm("0") = guest_state->guest_r0 & 0xF; /* r0[56:63] */
+
+ /* We cannot store more than S390_NUM_FACILITY_DW
+ (and it makes not much sense to do so anyhow) */
+ if (reg0 > S390_NUM_FACILITY_DW - 1)
+ reg0 = S390_NUM_FACILITY_DW - 1;
+
+ num_dw = reg0 + 1; /* number of double words written */
+
+ asm volatile(" .insn s,0xb2b00000,%0\n" /* stfle */
+ "ipm %2\n"
+ "srl %2,28\n"
+ : "=m" (hoststfle), "+d"(reg0), "=d"(cc) : : "cc", "memory");
+
+ /* Update guest register 0 with what STFLE set r0 to */
+ guest_state->guest_r0 = reg0;
+
+ for (i = 0; i < num_dw; ++i)
+ ((ULong *)addr)[i] = hoststfle[i];
+
+ return cc;
+}
+
+#else
+
+ULong
+s390x_dirtyhelper_STFLE(VexGuestS390XState *guest_state, HWord addr)
+{
+ return 3;
+}
+#endif /* VGA_s390x */
+
+/*------------------------------------------------------------*/
+/*--- Helper for condition code. ---*/
+/*------------------------------------------------------------*/
+
+#define S390_CC_FOR_BINARY(opcode,cc_dep1,cc_dep2) \
+({ \
+ __asm__ volatile ( \
+ opcode " %[op1],%[op2]\n\t" \
+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [op1] "+d"(cc_dep1) \
+ : [op2] "d"(cc_dep2) \
+ : "cc");\
+ psw >> 28; /* cc */ \
+})
+
+#define S390_CC_FOR_TERNARY_SUBB(opcode,cc_dep1,cc_dep2,cc_ndep) \
+({ \
+ /* Recover the original DEP2 value. See comment near s390_cc_thunk_put3 \
+ for rationale. */ \
+ cc_dep2 = cc_dep2 ^ cc_ndep; \
+ __asm__ volatile ( \
+ "lghi 0,1\n\t" \
+ "sr 0,%[op3]\n\t" /* borrow to cc */ \
+ opcode " %[op1],%[op2]\n\t" /* then redo the op */\
+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [op1] "+&d"(cc_dep1) \
+ : [op2] "d"(cc_dep2), [op3] "d"(cc_ndep) \
+ : "0", "cc");\
+ psw >> 28; /* cc */ \
+})
+
+#define S390_CC_FOR_TERNARY_ADDC(opcode,cc_dep1,cc_dep2,cc_ndep) \
+({ \
+ /* Recover the original DEP2 value. See comment near s390_cc_thunk_put3 \
+ for rationale. */ \
+ cc_dep2 = cc_dep2 ^ cc_ndep; \
+ __asm__ volatile ( \
+ "lgfr 0,%[op3]\n\t" /* first load cc_ndep */ \
+ "aghi 0,0\n\t" /* and convert it into a cc */ \
+ opcode " %[op1],%[op2]\n\t" /* then redo the op */\
+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [op1] "+&d"(cc_dep1) \
+ : [op2] "d"(cc_dep2), [op3] "d"(cc_ndep) \
+ : "0", "cc");\
+ psw >> 28; /* cc */ \
+})
+
+
+#define S390_CC_FOR_BFP_RESULT(opcode,cc_dep1) \
+({ \
+ __asm__ volatile ( \
+ opcode " 0,%[op]\n\t" \
+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \
+ : [op] "f"(cc_dep1) \
+ : "cc", "f0");\
+ psw >> 28; /* cc */ \
+})
+
+#define S390_CC_FOR_BFP128_RESULT(hi,lo) \
+({ \
+ __asm__ volatile ( \
+ "ldr 4,%[high]\n\t" \
+ "ldr 6,%[low]\n\t" \
+ "ltxbr 0,4\n\t" \
+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \
+ : [high] "f"(hi), [low] "f"(lo) \
+ : "cc", "f0", "f2", "f4", "f6");\
+ psw >> 28; /* cc */ \
+})
+
+#define S390_CC_FOR_BFP_CONVERT(opcode,cc_dep1) \
+({ \
+ __asm__ volatile ( \
+ opcode " 0,0,%[op]\n\t" \
+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \
+ : [op] "f"(cc_dep1) \
+ : "cc", "r0");\
+ psw >> 28; /* cc */ \
+})
+
+#define S390_CC_FOR_BFP128_CONVERT(opcode,hi,lo) \
+({ \
+ __asm__ volatile ( \
+ "ldr 4,%[high]\n\t" \
+ "ldr 6,%[low]\n\t" \
+ opcode " 0,0,4\n\t" \
+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \
+ : [high] "f"(hi), [low] "f"(lo) \
+ : "cc", "r0", "f4", "f6");\
+ psw >> 28; /* cc */ \
+})
+
+#define S390_CC_FOR_BFP_TDC(opcode,cc_dep1,cc_dep2) \
+({ \
+ __asm__ volatile ( \
+ opcode " %[value],0(%[class])\n\t" \
+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \
+ : [value] "f"(cc_dep1), \
+ [class] "a"(cc_dep2) \
+ : "cc");\
+ psw >> 28; /* cc */ \
+})
+
+#define S390_CC_FOR_BFP128_TDC(cc_dep1,cc_dep2,cc_ndep) \
+({ \
+ /* Recover the original DEP2 value. See comment near s390_cc_thunk_put1f128Z \
+ for rationale. */ \
+ cc_dep2 = cc_dep2 ^ cc_ndep; \
+ __asm__ volatile ( \
+ "ldr 4,%[high]\n\t" \
+ "ldr 6,%[low]\n\t" \
+ "tcxb 4,0(%[class])\n\t" \
+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \
+ : [high] "f"(cc_dep1), [low] "f"(cc_dep2), \
+ [class] "a"(cc_ndep) \
+ : "cc", "f4", "f6");\
+ psw >> 28; /* cc */ \
+})
+
+
+/* Return the value of the condition code from the supplied thunk parameters.
+ This is not the value of the PSW. It is the value of the 2 CC bits within
+ the PSW. The returned value is thusly in the interval [0:3]. */
+UInt
+s390_calculate_cc(ULong cc_op, ULong cc_dep1, ULong cc_dep2, ULong cc_ndep)
+{
+#if defined(VGA_s390x)
+ UInt psw;
+
+ switch (cc_op) {
+
+ case S390_CC_OP_BITWISE:
+ return S390_CC_FOR_BINARY("ogr", cc_dep1, (ULong)0);
+
+ case S390_CC_OP_SIGNED_COMPARE:
+ return S390_CC_FOR_BINARY("cgr", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_UNSIGNED_COMPARE:
+ return S390_CC_FOR_BINARY("clgr", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_SIGNED_ADD_64:
+ return S390_CC_FOR_BINARY("agr", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_SIGNED_ADD_32:
+ return S390_CC_FOR_BINARY("ar", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_SIGNED_SUB_64:
+ return S390_CC_FOR_BINARY("sgr", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_SIGNED_SUB_32:
+ return S390_CC_FOR_BINARY("sr", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_UNSIGNED_ADD_64:
+ return S390_CC_FOR_BINARY("algr", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_UNSIGNED_ADD_32:
+ return S390_CC_FOR_BINARY("alr", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_UNSIGNED_ADDC_64:
+ return S390_CC_FOR_TERNARY_ADDC("alcgr", cc_dep1, cc_dep2, cc_ndep);
+
+ case S390_CC_OP_UNSIGNED_ADDC_32:
+ return S390_CC_FOR_TERNARY_ADDC("alcr", cc_dep1, cc_dep2, cc_ndep);
+
+ case S390_CC_OP_UNSIGNED_SUB_64:
+ return S390_CC_FOR_BINARY("slgr", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_UNSIGNED_SUB_32:
+ return S390_CC_FOR_BINARY("slr", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_UNSIGNED_SUBB_64:
+ return S390_CC_FOR_TERNARY_SUBB("slbgr", cc_dep1, cc_dep2, cc_ndep);
+
+ case S390_CC_OP_UNSIGNED_SUBB_32:
+ return S390_CC_FOR_TERNARY_SUBB("slbr", cc_dep1, cc_dep2, cc_ndep);
+
+ case S390_CC_OP_LOAD_AND_TEST:
+ /* Like signed comparison with 0 */
+ return S390_CC_FOR_BINARY("cgr", cc_dep1, (Long)0);
+
+ case S390_CC_OP_TEST_AND_SET:
+ /* Shift the sign bit into the LSB. Note, that the tested value is an
+ 8-bit value which has been zero-extended to 32/64 bit. */
+ return cc_dep1 >> 7;
+
+ case S390_CC_OP_LOAD_POSITIVE_32:
+ __asm__ volatile (
+ "lpr %[result],%[op]\n\t"
+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [result] "=d"(cc_dep1)
+ : [op] "d"(cc_dep1)
+ : "cc");
+ return psw >> 28; /* cc */
+
+ case S390_CC_OP_LOAD_POSITIVE_64:
+ __asm__ volatile (
+ "lpgr %[result],%[op]\n\t"
+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [result] "=d"(cc_dep1)
+ : [op] "d"(cc_dep1)
+ : "cc");
+ return psw >> 28; /* cc */
+
+ case S390_CC_OP_TEST_UNDER_MASK_8: {
+ UChar value = cc_dep1;
+ UChar mask = cc_dep2;
+
+ __asm__ volatile (
+ "bras %%r2,1f\n\t" /* %r2 = address of next insn */
+ "tm %[value],0\n\t" /* this is skipped, then EXecuted */
+ "1: ex %[mask],0(%%r2)\n\t" /* EXecute TM after modifying mask */
+ "ipm %[psw]\n\t" : [psw] "=d"(psw)
+ : [value] "m"(value), [mask] "a"(mask)
+ : "r2", "cc");
+ return psw >> 28; /* cc */
+ }
+
+ case S390_CC_OP_TEST_UNDER_MASK_16: {
+ /* Create a TMLL insn with the mask as given by cc_dep2 */
+ UInt insn = (0xA701 << 16) | cc_dep2;
+ UInt value = cc_dep1;
+
+ __asm__ volatile (
+ "lr 1,%[value]\n\t"
+ "lhi 2,0x10\n\t"
+ "ex 2,%[insn]\n\t"
+ "ipm %[psw]\n\t" : [psw] "=d"(psw)
+ : [value] "d"(value), [insn] "m"(insn)
+ : "r1", "r2", "cc");
+ return psw >> 28; /* cc */
+ }
+
+ case S390_CC_OP_SHIFT_LEFT_32:
+ __asm__ volatile (
+ "sla %[op],0(%[amount])\n\t"
+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [op] "+d"(cc_dep1)
+ : [amount] "a"(cc_dep2)
+ : "cc");
+ return psw >> 28; /* cc */
+
+ case S390_CC_OP_SHIFT_LEFT_64: {
+ Int high = (Int)(cc_dep1 >> 32);
+ Int low = (Int)(cc_dep1 & 0xFFFFFFFF);
+
+ __asm__ volatile (
+ "lr 2,%[high]\n\t"
+ "lr 3,%[low]\n\t"
+ "slda 2,0(%[amount])\n\t"
+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [high] "+d"(high), [low] "+d"(low)
+ : [amount] "a"(cc_dep2)
+ : "cc", "r2", "r3");
+ return psw >> 28; /* cc */
+ }
+
+ case S390_CC_OP_INSERT_CHAR_MASK_32: {
+ Int inserted = 0;
+ Int msb = 0;
+
+ if (cc_dep2 & 1) {
+ inserted |= cc_dep1 & 0xff;
+ msb = 0x80;
+ }
+ if (cc_dep2 & 2) {
+ inserted |= cc_dep1 & 0xff00;
+ msb = 0x8000;
+ }
+ if (cc_dep2 & 4) {
+ inserted |= cc_dep1 & 0xff0000;
+ msb = 0x800000;
+ }
+ if (cc_dep2 & 8) {
+ inserted |= cc_dep1 & 0xff000000;
+ msb = 0x80000000;
+ }
+
+ if (inserted & msb) // MSB is 1
+ return 1;
+ if (inserted > 0)
+ return 2;
+ return 0;
+ }
+
+ case S390_CC_OP_BFP_RESULT_32:
+ return S390_CC_FOR_BFP_RESULT("ltebr", cc_dep1);
+
+ case S390_CC_OP_BFP_RESULT_64:
+ return S390_CC_FOR_BFP_RESULT("ltdbr", cc_dep1);
+
+ case S390_CC_OP_BFP_RESULT_128:
+ return S390_CC_FOR_BFP128_RESULT(cc_dep1, cc_dep2);
+
+ case S390_CC_OP_BFP_32_TO_INT_32:
+ return S390_CC_FOR_BFP_CONVERT("cfebr", cc_dep1);
+
+ case S390_CC_OP_BFP_64_TO_INT_32:
+ return S390_CC_FOR_BFP_CONVERT("cfdbr", cc_dep1);
+
+ case S390_CC_OP_BFP_128_TO_INT_32:
+ return S390_CC_FOR_BFP128_CONVERT("cfxbr", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_BFP_32_TO_INT_64:
+ return S390_CC_FOR_BFP_CONVERT("cgebr", cc_dep1);
+
+ case S390_CC_OP_BFP_64_TO_INT_64:
+ return S390_CC_FOR_BFP_CONVERT("cgdbr", cc_dep1);
+
+ case S390_CC_OP_BFP_128_TO_INT_64:
+ return S390_CC_FOR_BFP128_CONVERT("cgxbr", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_BFP_TDC_32:
+ return S390_CC_FOR_BFP_TDC("tceb", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_BFP_TDC_64:
+ return S390_CC_FOR_BFP_TDC("tcdb", cc_dep1, cc_dep2);
+
+ case S390_CC_OP_BFP_TDC_128:
+ return S390_CC_FOR_BFP128_TDC(cc_dep1, cc_dep2, cc_ndep);
+
+ case S390_CC_OP_SET:
+ return cc_dep1;
+
+ default:
+ break;
+ }
+#endif
+ vpanic("s390_calculate_cc");
+}
+
+
+UInt
+s390_calculate_icc(ULong op, ULong dep1, ULong dep2)
+{
+ return s390_calculate_cc(op, dep1, dep2, 0 /* unused */);
+}
+
+
+/* Note that this does *not* return a Boolean value. The result needs to be
+ explicitly tested against zero. */
+UInt
+s390_calculate_cond(ULong mask, ULong op, ULong dep1, ULong dep2, ULong ndep)
+{
+ UInt cc = s390_calculate_cc(op, dep1, dep2, ndep);
+
+ return ((mask << cc) & 0x8);
+}
+
+/*------------------------------------------------------------*/
+/*--- spechelper for performance ---*/
+/*------------------------------------------------------------*/
+
+
+/* Convenience macros */
+#define unop(op,a1) IRExpr_Unop((op),(a1))
+#define binop(op,a1,a2) IRExpr_Binop((op),(a1),(a2))
+#define mkU64(v) IRExpr_Const(IRConst_U64(v))
+#define mkU32(v) IRExpr_Const(IRConst_U32(v))
+#define mkU8(v) IRExpr_Const(IRConst_U8(v))
+
+
+static inline Bool
+isC64(IRExpr *expr)
+{
+ return expr->tag == Iex_Const && expr->Iex.Const.con->tag == Ico_U64;
+}
+
+
+/* The returned expression is NULL if no specialization was found. In that
+ case the helper function will be called. Otherwise, the expression has
+ type Ity_I32 and a Boolean value. */
+IRExpr *
+guest_s390x_spechelper(HChar *function_name, IRExpr **args,
+ IRStmt **precedingStmts, Int n_precedingStmts)
+{
+ UInt i, arity = 0;
+
+ for (i = 0; args[i]; i++)
+ arity++;
+
+# if 0
+ vex_printf("spec request:\n");
+ vex_printf(" %s ", function_name);
+ for (i = 0; i < arity; i++) {
+ vex_printf(" ");
+ ppIRExpr(args[i]);
+ }
+ vex_printf("\n");
+# endif
+
+ /* --------- Specialising "s390_calculate_cond" --------- */
+
+ if (vex_streq(function_name, "s390_calculate_cond")) {
+ IRExpr *cond_expr, *cc_op_expr, *cc_dep1, *cc_dep2;
+ ULong cond, cc_op;
+
+ vassert(arity == 5);
+
+ cond_expr = args[0];
+ cc_op_expr = args[1];
+
+ /* The necessary requirement for all optimizations here is that the
+ condition and the cc_op are constant. So check that upfront. */
+ if (! isC64(cond_expr)) return NULL;
+ if (! isC64(cc_op_expr)) return NULL;
+
+ cond = cond_expr->Iex.Const.con->Ico.U64;
+ cc_op = cc_op_expr->Iex.Const.con->Ico.U64;
+
+ vassert(cond <= 15);
+
+ /*
+ +------+---+---+---+---+
+ | cc | 0 | 1 | 2 | 3 |
+ | cond | 8 | 4 | 2 | 1 |
+ +------+---+---+---+---+
+ */
+ cc_dep1 = args[2];
+ cc_dep2 = args[3];
+
+ /* S390_CC_OP_SIGNED_COMPARE */
+ if (cc_op == S390_CC_OP_SIGNED_COMPARE) {
+ /*
+ cc == 0 --> cc_dep1 == cc_dep2 (cond == 8)
+ cc == 1 --> cc_dep1 < cc_dep2 (cond == 4)
+ cc == 2 --> cc_dep1 > cc_dep2 (cond == 2)
+
+ Because cc == 3 cannot occur the rightmost bit of cond is
+ a don't care.
+ */
+ if (cond == 8 || cond == 8 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, cc_dep1, cc_dep2));
+ }
+ if (cond == 4 + 2 || cond == 4 + 2 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, cc_dep1, cc_dep2));
+ }
+ if (cond == 4 || cond == 4 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLT64S, cc_dep1, cc_dep2));
+ }
+ if (cond == 8 + 4 || cond == 8 + 4 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLE64S, cc_dep1, cc_dep2));
+ }
+ /* cc_dep1 > cc_dep2 ----> cc_dep2 < cc_dep1 */
+ if (cond == 2 || cond == 2 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLT64S, cc_dep2, cc_dep1));
+ }
+ if (cond == 8 + 2 || cond == 8 + 2 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLE64S, cc_dep2, cc_dep1));
+ }
+ if (cond == 8 + 4 + 2 || cond == 8 + 4 + 2 + 1) {
+ return mkU32(1);
+ }
+ /* Remaining case */
+ return mkU32(0);
+ }
+
+ /* S390_CC_OP_UNSIGNED_COMPARE */
+ if (cc_op == S390_CC_OP_UNSIGNED_COMPARE) {
+ /*
+ cc == 0 --> cc_dep1 == cc_dep2 (cond == 8)
+ cc == 1 --> cc_dep1 < cc_dep2 (cond == 4)
+ cc == 2 --> cc_dep1 > cc_dep2 (cond == 2)
+
+ Because cc == 3 cannot occur the rightmost bit of cond is
+ a don't care.
+ */
+ if (cond == 8 || cond == 8 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, cc_dep1, cc_dep2));
+ }
+ if (cond == 4 + 2 || cond == 4 + 2 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, cc_dep1, cc_dep2));
+ }
+ if (cond == 4 || cond == 4 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLT64U, cc_dep1, cc_dep2));
+ }
+ if (cond == 8 + 4 || cond == 8 + 4 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLE64U, cc_dep1, cc_dep2));
+ }
+ /* cc_dep1 > cc_dep2 ----> cc_dep2 < cc_dep1 */
+ if (cond == 2 || cond == 2 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLT64U, cc_dep2, cc_dep1));
+ }
+ if (cond == 8 + 2 || cond == 8 + 2 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLE64U, cc_dep2, cc_dep1));
+ }
+ if (cond == 8 + 4 + 2 || cond == 8 + 4 + 2 + 1) {
+ return mkU32(1);
+ }
+ /* Remaining case */
+ return mkU32(0);
+ }
+
+ /* S390_CC_OP_LOAD_AND_TEST */
+ if (cc_op == S390_CC_OP_LOAD_AND_TEST) {
+ /*
+ cc == 0 --> cc_dep1 == 0 (cond == 8)
+ cc == 1 --> cc_dep1 < 0 (cond == 4)
+ cc == 2 --> cc_dep1 > 0 (cond == 2)
+
+ Because cc == 3 cannot occur the rightmost bit of cond is
+ a don't care.
+ */
+ if (cond == 8 || cond == 8 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, cc_dep1, mkU64(0)));
+ }
+ if (cond == 4 + 2 || cond == 4 + 2 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, cc_dep1, mkU64(0)));
+ }
+ if (cond == 4 || cond == 4 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLT64S, cc_dep1, mkU64(0)));
+ }
+ if (cond == 8 + 4 || cond == 8 + 4 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLE64S, cc_dep1, mkU64(0)));
+ }
+ /* cc_dep1 > 0 ----> 0 < cc_dep1 */
+ if (cond == 2 || cond == 2 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLT64S, mkU64(0), cc_dep1));
+ }
+ if (cond == 8 + 2 || cond == 8 + 2 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLE64S, mkU64(0), cc_dep1));
+ }
+ if (cond == 8 + 4 + 2 || cond == 8 + 4 + 2 + 1) {
+ return mkU32(1);
+ }
+ /* Remaining case */
+ return mkU32(0);
+ }
+
+ /* S390_CC_OP_BITWISE */
+ if (cc_op == S390_CC_OP_BITWISE) {
+ /*
+ cc_dep1 is the result of the boolean operation.
+
+ cc == 0 --> cc_dep1 == 0 (cond == 8)
+ cc == 1 --> cc_dep1 != 0 (cond == 4)
+
+ Because cc == 2 and cc == 3 cannot occur the two rightmost bits of
+ cond are don't cares. Therefore:
+
+ cond == 00xx -> always false
+ cond == 01xx -> not equal
+ cond == 10xx -> equal
+ cond == 11xx -> always true
+ */
+ if ((cond & (8 + 4)) == 8 + 4) {
+ return mkU32(1);
+ }
+ if (cond & 8) {
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, cc_dep1, mkU64(0)));
+ }
+ if (cond & 4) {
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, cc_dep1, mkU64(0)));
+ }
+ /* Remaining case */
+ return mkU32(0);
+ }
+
+ /* S390_CC_OP_INSERT_CHAR_MASK_32
+ Since the mask comes from an immediate field in the opcode, we
+ expect the mask to be a constant here. That simplifies matters. */
+ if (cc_op == S390_CC_OP_INSERT_CHAR_MASK_32) {
+ ULong mask;
+ UInt imask = 0, shift = 0;
+ IRExpr *word;
+
+ if (! isC64(cc_dep2)) goto missed;
+
+ mask = cc_dep2->Iex.Const.con->Ico.U64;
+
+ /* Extract the 32-bit value from the thunk */
+
+ word = unop(Iop_64to32, cc_dep1);
+
+ switch (mask) {
+ case 0: shift = 0; imask = 0x00000000; break;
+ case 1: shift = 24; imask = 0x000000FF; break;
+ case 2: shift = 16; imask = 0x0000FF00; break;
+ case 3: shift = 16; imask = 0x0000FFFF; break;
+ case 4: shift = 8; imask = 0x00FF0000; break;
+ case 5: shift = 8; imask = 0x00FF00FF; break;
+ case 6: shift = 8; imask = 0x00FFFF00; break;
+ case 7: shift = 8; imask = 0x00FFFFFF; break;
+ case 8: shift = 0; imask = 0xFF000000; break;
+ case 9: shift = 0; imask = 0xFF0000FF; break;
+ case 10: shift = 0; imask = 0xFF00FF00; break;
+ case 11: shift = 0; imask = 0xFF00FFFF; break;
+ case 12: shift = 0; imask = 0xFFFF0000; break;
+ case 13: shift = 0; imask = 0xFFFF00FF; break;
+ case 14: shift = 0; imask = 0xFFFFFF00; break;
+ case 15: shift = 0; imask = 0xFFFFFFFF; break;
+ }
+
+ /* Select the bits that were inserted */
+ word = binop(Iop_And32, word, mkU32(imask));
+
+ /* cc == 0 --> all inserted bits zero or mask == 0 (cond == 8)
+ cc == 1 --> leftmost inserted bit is one (cond == 4)
+ cc == 2 --> leftmost inserted bit is zero and not (cond == 2)
+ all inserted bits are zero
+
+ Because cc == 0,1,2 the rightmost bit of the mask is a don't care */
+ if (cond == 8 || cond == 8 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ32, word, mkU32(0)));
+ }
+ if (cond == 4 + 2 || cond == 4 + 2 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpNE32, word, mkU32(0)));
+ }
+
+ /* Sign extend */
+ if (shift != 0) {
+ word = binop(Iop_Sar32, binop(Iop_Shl32, word, mkU8(shift)),
+ mkU8(shift));
+ }
+
+ if (cond == 4 || cond == 4 + 1) { /* word < 0 */
+ return unop(Iop_1Uto32, binop(Iop_CmpLT32S, word, mkU32(0)));
+ }
+ if (cond == 2 || cond == 2 + 1) { /* word > 0 */
+ return unop(Iop_1Uto32, binop(Iop_CmpLT32S, mkU32(0), word));
+ }
+ if (cond == 8 + 4 || cond == 8 + 4 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLE32S, word, mkU32(0)));
+ }
+ if (cond == 8 + 2 || cond == 8 + 2 + 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpLE32S, mkU32(0), word));
+ }
+ if (cond == 8 + 4 + 2 || cond == 8 + 4 + 2 + 1) {
+ return mkU32(1);
+ }
+ /* Remaining case */
+ return mkU32(0);
+ }
+
+ /* S390_CC_OP_TEST_UNDER_MASK_8
+ Since the mask comes from an immediate field in the opcode, we
+ expect the mask to be a constant here. That simplifies matters. */
+ if (cc_op == S390_CC_OP_TEST_UNDER_MASK_8) {
+ ULong mask16;
+
+ if (! isC64(cc_dep2)) goto missed;
+
+ mask16 = cc_dep2->Iex.Const.con->Ico.U64;
+
+ /* Get rid of the mask16 == 0 case first. Some of the simplifications
+ below (e.g. for OVFL) only hold if mask16 == 0. */
+ if (mask16 == 0) { /* cc == 0 */
+ if (cond & 0x8) return mkU32(1);
+ return mkU32(0);
+ }
+
+ /* cc == 2 is a don't care */
+ if (cond == 8 || cond == 8 + 2) {
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64,
+ binop(Iop_And64, cc_dep1, cc_dep2),
+ mkU64(0)));
+ }
+ if (cond == 7 || cond == 7 - 2) {
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64,
+ binop(Iop_And64, cc_dep1, cc_dep2),
+ mkU64(0)));
+ }
+ if (cond == 1 || cond == 1 + 2) {
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64,
+ binop(Iop_And64, cc_dep1, cc_dep2),
+ cc_dep2));
+ }
+ if (cond == 14 || cond == 14 - 2) { /* ! OVFL */
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64,
+ binop(Iop_And64, cc_dep1, cc_dep2),
+ cc_dep2));
+ }
+ goto missed;
+ }
+
+ /* S390_CC_OP_TEST_UNDER_MASK_16
+ Since the mask comes from an immediate field in the opcode, we
+ expect the mask to be a constant here. That simplifies matters. */
+ if (cc_op == S390_CC_OP_TEST_UNDER_MASK_16) {
+ ULong mask16;
+ UInt msb;
+
+ if (! isC64(cc_dep2)) goto missed;
+
+ mask16 = cc_dep2->Iex.Const.con->Ico.U64;
+
+ /* Get rid of the mask16 == 0 case first. Some of the simplifications
+ below (e.g. for OVFL) only hold if mask16 == 0. */
+ if (mask16 == 0) { /* cc == 0 */
+ if (cond & 0x8) return mkU32(1);
+ return mkU32(0);
+ }
+
+ if (cond == 8) {
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64,
+ binop(Iop_And64, cc_dep1, cc_dep2),
+ mkU64(0)));
+ }
+ if (cond == 7) {
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64,
+ binop(Iop_And64, cc_dep1, cc_dep2),
+ mkU64(0)));
+ }
+ if (cond == 1) {
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64,
+ binop(Iop_And64, cc_dep1, cc_dep2),
+ mkU64(mask16)));
+ }
+ if (cond == 14) { /* ! OVFL */
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64,
+ binop(Iop_And64, cc_dep1, cc_dep2),
+ mkU64(mask16)));
+ }
+
+ /* Find MSB in mask */
+ msb = 0x8000;
+ while (msb > mask16)
+ msb >>= 1;
+
+ if (cond == 2) { /* cc == 2 */
+ IRExpr *c1, *c2;
+
+ /* (cc_dep & msb) != 0 && (cc_dep & mask16) != mask16 */
+ c1 = binop(Iop_CmpNE64,
+ binop(Iop_And64, cc_dep1, mkU64(msb)), mkU64(0));
+ c2 = binop(Iop_CmpNE64,
+ binop(Iop_And64, cc_dep1, cc_dep2),
+ mkU64(mask16));
+ return binop(Iop_And32, unop(Iop_1Uto32, c1),
+ unop(Iop_1Uto32, c2));
+ }
+
+ if (cond == 4) { /* cc == 1 */
+ IRExpr *c1, *c2;
+
+ /* (cc_dep & msb) == 0 && (cc_dep & mask16) != 0 */
+ c1 = binop(Iop_CmpEQ64,
+ binop(Iop_And64, cc_dep1, mkU64(msb)), mkU64(0));
+ c2 = binop(Iop_CmpNE64,
+ binop(Iop_And64, cc_dep1, cc_dep2),
+ mkU64(0));
+ return binop(Iop_And32, unop(Iop_1Uto32, c1),
+ unop(Iop_1Uto32, c2));
+ }
+
+ if (cond == 11) { /* cc == 0,2,3 */
+ IRExpr *c1, *c2;
+
+ c1 = binop(Iop_CmpNE64,
+ binop(Iop_And64, cc_dep1, mkU64(msb)), mkU64(0));
+ c2 = binop(Iop_CmpEQ64,
+ binop(Iop_And64, cc_dep1, cc_dep2),
+ mkU64(0));
+ return binop(Iop_Or32, unop(Iop_1Uto32, c1),
+ unop(Iop_1Uto32, c2));
+ }
+
+ if (cond == 3) { /* cc == 2 || cc == 3 */
+ return unop(Iop_1Uto32,
+ binop(Iop_CmpNE64,
+ binop(Iop_And64, cc_dep1, mkU64(msb)),
+ mkU64(0)));
+ }
+ if (cond == 12) { /* cc == 0 || cc == 1 */
+ return unop(Iop_1Uto32,
+ binop(Iop_CmpEQ64,
+ binop(Iop_And64, cc_dep1, mkU64(msb)),
+ mkU64(0)));
+ }
+ // vex_printf("TUM mask = 0x%llx\n", mask16);
+ goto missed;
+ }
+
+ /* S390_CC_OP_UNSIGNED_SUB_64/32 */
+ if (cc_op == S390_CC_OP_UNSIGNED_SUB_64 ||
+ cc_op == S390_CC_OP_UNSIGNED_SUB_32) {
+ /*
+ cc_dep1, cc_dep2 are the zero extended left and right operands
+
+ cc == 1 --> result != 0, borrow (cond == 4)
+ cc == 2 --> result == 0, no borrow (cond == 2)
+ cc == 3 --> result != 0, no borrow (cond == 1)
+
+ cc = (cc_dep1 == cc_dep2) ? 2
+ : (cc_dep1 > cc_dep2) ? 3 : 1;
+
+ Because cc == 0 cannot occur the leftmost bit of cond is
+ a don't care.
+ */
+ if (cond == 1 || cond == 1 + 8) { /* cc == 3 op2 < op1 */
+ return unop(Iop_1Uto32, binop(Iop_CmpLT64U, cc_dep2, cc_dep1));
+ }
+ if (cond == 2 || cond == 2 + 8) { /* cc == 2 */
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, cc_dep1, cc_dep2));
+ }
+ if (cond == 4 || cond == 4 + 8) { /* cc == 1 */
+ return unop(Iop_1Uto32, binop(Iop_CmpLT64U, cc_dep1, cc_dep2));
+ }
+ if (cond == 3 || cond == 3 + 8) { /* cc == 2 || cc == 3 */
+ return unop(Iop_1Uto32, binop(Iop_CmpLE64U, cc_dep2, cc_dep1));
+ }
+ if (cond == 6 || cond == 6 + 8) { /* cc == 2 || cc == 1 */
+ return unop(Iop_1Uto32, binop(Iop_CmpLE64U, cc_dep1, cc_dep2));
+ }
+
+ if (cond == 5 || cond == 5 + 8) { /* cc == 3 || cc == 1 */
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, cc_dep1, cc_dep2));
+ }
+ if (cond == 7 || cond == 7 + 8) {
+ return mkU32(1);
+ }
+ /* Remaining case */
+ return mkU32(0);
+ }
+
+ /* S390_CC_OP_UNSIGNED_ADD_64 */
+ if (cc_op == S390_CC_OP_UNSIGNED_ADD_64) {
+ /*
+ cc_dep1, cc_dep2 are the zero extended left and right operands
+
+ cc == 0 --> result == 0, no carry (cond == 8)
+ cc == 1 --> result != 0, no carry (cond == 4)
+ cc == 2 --> result == 0, carry (cond == 2)
+ cc == 3 --> result != 0, carry (cond == 1)
+ */
+ if (cond == 8) { /* cc == 0 */
+ /* Both inputs are 0 */
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64,
+ binop(Iop_Or64, cc_dep1, cc_dep2),
+ mkU64(0)));
+ }
+ if (cond == 7) { /* cc == 1,2,3 */
+ /* Not both inputs are 0 */
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64,
+ binop(Iop_Or64, cc_dep1, cc_dep2),
+ mkU64(0)));
+ }
+ if (cond == 8 + 2) { /* cc == 0,2 -> result is zero */
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64,
+ binop(Iop_Add64, cc_dep1, cc_dep2),
+ mkU64(0)));
+ }
+ if (cond == 4 + 1) { /* cc == 1,3 -> result is not zero */
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64,
+ binop(Iop_Add64, cc_dep1, cc_dep2),
+ mkU64(0)));
+ }
+ goto missed;
+ }
+
+ /* S390_CC_OP_UNSIGNED_ADD_32 */
+ if (cc_op == S390_CC_OP_UNSIGNED_ADD_32) {
+ /*
+ cc_dep1, cc_dep2 are the zero extended left and right operands
+
+ cc == 0 --> result == 0, no carry (cond == 8)
+ cc == 1 --> result != 0, no carry (cond == 4)
+ cc == 2 --> result == 0, carry (cond == 2)
+ cc == 3 --> result != 0, carry (cond == 1)
+ */
+ if (cond == 8) { /* cc == 0 */
+ /* Both inputs are 0 */
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64,
+ binop(Iop_Or64, cc_dep1, cc_dep2),
+ mkU64(0)));
+ }
+ if (cond == 7) { /* cc == 1,2,3 */
+ /* Not both inputs are 0 */
+ return unop(Iop_1Uto32, binop(Iop_CmpNE64,
+ binop(Iop_Or64, cc_dep1, cc_dep2),
+ mkU64(0)));
+ }
+ if (cond == 8 + 2) { /* cc == 0,2 -> result is zero */
+ return unop(Iop_1Uto32, binop(Iop_CmpEQ32,
+ binop(Iop_Add32,
+ unop(Iop_64to32, cc_dep1),
+ unop(Iop_64to32, cc_dep2)),
+ mkU32(0)));
+ }
+ if (cond == 4 + 1) { /* cc == 1,3 -> result is not zero */
+ return unop(Iop_1Uto32, binop(Iop_CmpNE32,
+ binop(Iop_Add32,
+ unop(Iop_64to32, cc_dep1),
+ unop(Iop_64to32, cc_dep2)),
+ mkU32(0)));
+ }
+ goto missed;
+ }
+
+ /* S390_CC_OP_SET */
+ if (cc_op == S390_CC_OP_SET) {
+ /* cc_dep1 is the condition code
+
+ Return 1, if ((cond << cc_dep1) & 0x8) != 0 */
+
+ return unop(Iop_1Uto32,
+ binop(Iop_CmpNE64,
+ binop(Iop_And64,
+ binop(Iop_Shl64, cond_expr,
+ unop(Iop_64to8, cc_dep1)),
+ mkU64(8)),
+ mkU64(0)));
+ }
+
+ /* S390_CC_OP_TEST_AND_SET */
+ if (cc_op == S390_CC_OP_TEST_AND_SET) {
+ /* cc_dep1 is the zero-extended loaded value
+
+ cc == 0 --> leftmost bit is zero (cond == 8)
+ cc == 1 --> leftmost bit is one (cond == 4)
+
+ As cc is either 0 or 1, only the two leftmost bits of the mask
+ are relevant. */
+ IRExpr *bit = binop(Iop_Shr64, cc_dep1, mkU8(7));
+
+ switch (cond & (8 + 4)) {
+ case 0: return mkU32(0);
+ case 4: return unop(Iop_1Uto32, binop(Iop_CmpNE64, bit, mkU64(0)));
+ case 8: return unop(Iop_1Uto32, binop(Iop_CmpEQ64, bit, mkU64(0)));
+ case 8 + 4: return mkU32(1);
+ }
+ /* not reached */
+ }
+
+missed:
+ ;
+ }
+
+ return NULL;
+}
+
+/*---------------------------------------------------------------*/
+/*--- end guest_s390_helpers.c ---*/
+/*---------------------------------------------------------------*/
diff --git a/main/VEX/priv/guest_s390_toIR.c b/main/VEX/priv/guest_s390_toIR.c
new file mode 100644
index 0000000..ec89860
--- /dev/null
+++ b/main/VEX/priv/guest_s390_toIR.c
@@ -0,0 +1,13357 @@
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+/*---------------------------------------------------------------*/
+/*--- begin guest_s390_toIR.c ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* Contributed by Florian Krohm and Christian Borntraeger */
+
+/* Translates s390 code to IR. */
+
+#include "libvex_basictypes.h"
+#include "libvex_ir.h"
+#include "libvex_guest_s390x.h" /* VexGuestS390XState */
+#include "libvex.h" /* needed for bb_to_IR.h */
+#include "libvex_guest_offsets.h" /* OFFSET_s390x_SYSNO */
+#include "libvex_s390x_common.h"
+#include "main_util.h" /* vassert */
+#include "main_globals.h" /* vex_traceflags */
+#include "guest_generic_bb_to_IR.h" /* DisResult */
+#include "guest_s390_defs.h" /* prototypes for this file's functions */
+#include "host_s390_disasm.h"
+#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
+
+
+/*------------------------------------------------------------*/
+/*--- Forward declarations ---*/
+/*------------------------------------------------------------*/
+static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
+
+
+/*------------------------------------------------------------*/
+/*--- Globals ---*/
+/*------------------------------------------------------------*/
+
+/* The IRSB* into which we're generating code. */
+static IRSB *irsb;
+
+/* The guest address for the instruction currently being
+ translated. */
+static Addr64 guest_IA_curr_instr;
+
+/* The guest address for the instruction following the current instruction. */
+static Addr64 guest_IA_next_instr;
+
+/* Result of disassembly step. */
+static DisResult *dis_res;
+
+/* Resteer function and callback data */
+static Bool (*resteer_fn)(void *, Addr64);
+static void *resteer_data;
+
+/* The last seen execute target instruction */
+ULong last_execute_target;
+
+/* The possible outcomes of a decoding operation */
+typedef enum {
+ S390_DECODE_OK,
+ S390_DECODE_UNKNOWN_INSN,
+ S390_DECODE_UNIMPLEMENTED_INSN,
+ S390_DECODE_UNKNOWN_SPECIAL_INSN,
+ S390_DECODE_ERROR
+} s390_decode_t;
+
+/*------------------------------------------------------------*/
+/*--- Helpers for constructing IR. ---*/
+/*------------------------------------------------------------*/
+
+/* Sign extend a value with the given number of bits. This is a
+ macro because it allows us to overload the type of the value.
+ Note that VALUE must have a signed type! */
+#undef sign_extend
+#define sign_extend(value,num_bits) \
+(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
+ (sizeof(__typeof__(value)) * 8 - (num_bits)))
+
+
+/* Add a statement to the current irsb. */
+static __inline__ void
+stmt(IRStmt *st)
+{
+ addStmtToIRSB(irsb, st);
+}
+
+/* Allocate a new temporary of the given type. */
+static __inline__ IRTemp
+newTemp(IRType type)
+{
+ vassert(isPlausibleIRType(type));
+
+ return newIRTemp(irsb->tyenv, type);
+}
+
+/* Create an expression node for a temporary */
+static __inline__ IRExpr *
+mkexpr(IRTemp tmp)
+{
+ return IRExpr_RdTmp(tmp);
+}
+
+/* Add a statement that assigns to a temporary */
+static __inline__ void
+assign(IRTemp dst, IRExpr *expr)
+{
+ stmt(IRStmt_WrTmp(dst, expr));
+}
+
+/* Create a temporary of the given type and assign the expression to it */
+static __inline__ IRTemp
+mktemp(IRType type, IRExpr *expr)
+{
+ IRTemp temp = newTemp(type);
+
+ assign(temp, expr);
+
+ return temp;
+}
+
+/* Create a unary expression */
+static __inline__ IRExpr *
+unop(IROp kind, IRExpr *op)
+{
+ return IRExpr_Unop(kind, op);
+}
+
+/* Create a binary expression */
+static __inline__ IRExpr *
+binop(IROp kind, IRExpr *op1, IRExpr *op2)
+{
+ return IRExpr_Binop(kind, op1, op2);
+}
+
+/* Create a ternary expression */
+static __inline__ IRExpr *
+triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
+{
+ return IRExpr_Triop(kind, op1, op2, op3);
+}
+
+/* Create a quaternary expression */
+static __inline__ IRExpr *
+qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
+{
+ return IRExpr_Qop(kind, op1, op2, op3, op4);
+}
+
+/* Create an expression node for an 8-bit integer constant */
+static __inline__ IRExpr *
+mkU8(UInt value)
+{
+ vassert(value < 256);
+
+ return IRExpr_Const(IRConst_U8((UChar)value));
+}
+
+/* Create an expression node for a 16-bit integer constant */
+static __inline__ IRExpr *
+mkU16(UInt value)
+{
+ vassert(value < 65536);
+
+ return IRExpr_Const(IRConst_U16((UShort)value));
+}
+
+/* Create an expression node for a 32-bit integer constant */
+static __inline__ IRExpr *
+mkU32(UInt value)
+{
+ return IRExpr_Const(IRConst_U32(value));
+}
+
+/* Create an expression node for a 64-bit integer constant */
+static __inline__ IRExpr *
+mkU64(ULong value)
+{
+ return IRExpr_Const(IRConst_U64(value));
+}
+
+/* Create an expression node for a 32-bit floating point constant
+ whose value is given by a bit pattern. */
+static __inline__ IRExpr *
+mkF32i(UInt value)
+{
+ return IRExpr_Const(IRConst_F32i(value));
+}
+
+/* Create an expression node for a 32-bit floating point constant
+ whose value is given by a bit pattern. */
+static __inline__ IRExpr *
+mkF64i(ULong value)
+{
+ return IRExpr_Const(IRConst_F64i(value));
+}
+
+/* Little helper function for my sanity. ITE = if-then-else */
+static IRExpr *
+mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
+
+ return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
+}
+
+/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
+static void __inline__
+store(IRExpr *addr, IRExpr *data)
+{
+ stmt(IRStmt_Store(Iend_BE, addr, data));
+}
+
+/* Create an expression that loads a TYPE sized value from ADDR.
+ This is a big-endian machine. */
+static __inline__ IRExpr *
+load(IRType type, IRExpr *addr)
+{
+ return IRExpr_Load(Iend_BE, type, addr);
+}
+
+/* Function call */
+static void
+call_function(IRExpr *callee_address)
+{
+ irsb->next = callee_address;
+ irsb->jumpkind = Ijk_Call;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* Function call with known target. */
+static void
+call_function_and_chase(Addr64 callee_address)
+{
+ if (resteer_fn(resteer_data, callee_address)) {
+ dis_res->whatNext = Dis_ResteerU;
+ dis_res->continueAt = callee_address;
+ } else {
+ irsb->next = mkU64(callee_address);
+ irsb->jumpkind = Ijk_Call;
+ dis_res->whatNext = Dis_StopHere;
+ }
+}
+
+/* Function return sequence */
+static void
+return_from_function(IRExpr *return_address)
+{
+ irsb->next = return_address;
+ irsb->jumpkind = Ijk_Ret;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* A conditional branch whose target is not known at instrumentation time.
+
+ if (condition) goto computed_target;
+
+ Needs to be represented as:
+
+ if (! condition) goto next_instruction;
+ goto computed_target;
+
+ This inversion is being handled at code generation time. So we just
+ take the condition here as is.
+*/
+static void
+if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
+
+ stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr)));
+
+ irsb->next = target;
+ irsb->jumpkind = Ijk_Boring;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* A conditional branch whose target is known at instrumentation time. */
+static void
+if_condition_goto(IRExpr *condition, Addr64 target)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
+
+ stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target)));
+ dis_res->whatNext = Dis_Continue;
+}
+
+/* An unconditional branch. Target may or may not be known at instrumentation
+ time. */
+static void
+always_goto(IRExpr *target)
+{
+ irsb->next = target;
+ irsb->jumpkind = Ijk_Boring;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* An unconditional branch to a known target. */
+static void
+always_goto_and_chase(Addr64 target)
+{
+ if (resteer_fn(resteer_data, target)) {
+ dis_res->whatNext = Dis_ResteerU;
+ dis_res->continueAt = target;
+ } else {
+ irsb->next = mkU64(target);
+ irsb->jumpkind = Ijk_Boring;
+ dis_res->whatNext = Dis_StopHere;
+ }
+}
+
+/* A system call */
+static void
+system_call(IRExpr *sysno)
+{
+ /* Store the system call number in the pseudo register. */
+ stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno));
+
+ /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
+ stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr)));
+
+ /* It's important that all ArchRegs carry their up-to-date value
+ at this point. So we declare an end-of-block here, which
+ forces any TempRegs caching ArchRegs to be flushed. */
+ irsb->next = mkU64(guest_IA_next_instr);
+
+ irsb->jumpkind = Ijk_Sys_syscall;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
+ instructions to VEX's IRRoundingMode. */
+static IRRoundingMode
+encode_rounding_mode(UChar mode)
+{
+ switch (mode) {
+ case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
+ case S390_ROUND_ZERO: return Irrm_ZERO;
+ case S390_ROUND_POSINF: return Irrm_PosINF;
+ case S390_ROUND_NEGINF: return Irrm_NegINF;
+ }
+ vpanic("encode_rounding_mode");
+}
+
+static __inline__ IRExpr *get_fpr_dw0(UInt);
+static __inline__ void put_fpr_dw0(UInt, IRExpr *);
+
+/* Read a floating point register pair and combine their contents into a
+ 128-bit value */
+static IRExpr *
+get_fpr_pair(UInt archreg)
+{
+ IRExpr *high = get_fpr_dw0(archreg);
+ IRExpr *low = get_fpr_dw0(archreg + 2);
+
+ return binop(Iop_F64HLtoF128, high, low);
+}
+
+/* Write a 128-bit floating point value into a register pair. */
+static void
+put_fpr_pair(UInt archreg, IRExpr *expr)
+{
+ IRExpr *high = unop(Iop_F128HItoF64, expr);
+ IRExpr *low = unop(Iop_F128LOtoF64, expr);
+
+ put_fpr_dw0(archreg, high);
+ put_fpr_dw0(archreg + 2, low);
+}
+
+
+/* Flags thunk offsets */
+#define S390X_GUEST_OFFSET_CC_OP S390X_GUEST_OFFSET(guest_CC_OP)
+#define S390X_GUEST_OFFSET_CC_DEP1 S390X_GUEST_OFFSET(guest_CC_DEP1)
+#define S390X_GUEST_OFFSET_CC_DEP2 S390X_GUEST_OFFSET(guest_CC_DEP2)
+#define S390X_GUEST_OFFSET_CC_NDEP S390X_GUEST_OFFSET(guest_CC_NDEP)
+
+/*------------------------------------------------------------*/
+/*--- Build the flags thunk. ---*/
+/*------------------------------------------------------------*/
+
+/* Completely fill the flags thunk. We're always filling all fields.
+ Apparently, that is better for redundant PUT elimination. */
+static void
+s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
+{
+ UInt op_off, dep1_off, dep2_off, ndep_off;
+
+ op_off = S390X_GUEST_OFFSET_CC_OP;
+ dep1_off = S390X_GUEST_OFFSET_CC_DEP1;
+ dep2_off = S390X_GUEST_OFFSET_CC_DEP2;
+ ndep_off = S390X_GUEST_OFFSET_CC_NDEP;
+
+ stmt(IRStmt_Put(op_off, op));
+ stmt(IRStmt_Put(dep1_off, dep1));
+ stmt(IRStmt_Put(dep2_off, dep2));
+ stmt(IRStmt_Put(ndep_off, ndep));
+}
+
+
+/* Create an expression for V and widen the result to 64 bit. */
+static IRExpr *
+s390_cc_widen(IRTemp v, Bool sign_extend)
+{
+ IRExpr *expr;
+
+ expr = mkexpr(v);
+
+ switch (typeOfIRTemp(irsb->tyenv, v)) {
+ case Ity_I64:
+ break;
+ case Ity_I32:
+ expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
+ break;
+ case Ity_I16:
+ expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
+ break;
+ case Ity_I8:
+ expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
+ break;
+ default:
+ vpanic("s390_cc_widen");
+ }
+
+ return expr;
+}
+
+static void
+s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
+{
+ IRExpr *op, *dep1, *dep2, *ndep;
+
+ op = mkU64(opc);
+ dep1 = s390_cc_widen(d1, sign_extend);
+ dep2 = mkU64(0);
+ ndep = mkU64(0);
+
+ s390_cc_thunk_fill(op, dep1, dep2, ndep);
+}
+
+
+static void
+s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
+{
+ IRExpr *op, *dep1, *dep2, *ndep;
+
+ op = mkU64(opc);
+ dep1 = s390_cc_widen(d1, sign_extend);
+ dep2 = s390_cc_widen(d2, sign_extend);
+ ndep = mkU64(0);
+
+ s390_cc_thunk_fill(op, dep1, dep2, ndep);
+}
+
+
+/* memcheck believes that the NDEP field in the flags thunk is always
+ defined. But for some flag computations (e.g. add with carry) that is
+ just not true. We therefore need to convey to memcheck that the value
+ of the ndep field does matter and therefore we make the DEP2 field
+ depend on it:
+
+ DEP2 = original_DEP2 ^ NDEP
+
+ In s390_calculate_cc we exploit that (a^b)^b == a
+ I.e. we xor the DEP2 value with the NDEP value to recover the
+ original_DEP2 value. */
+static void
+s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
+{
+ IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
+
+ op = mkU64(opc);
+ dep1 = s390_cc_widen(d1, sign_extend);
+ dep2 = s390_cc_widen(d2, sign_extend);
+ ndep = s390_cc_widen(nd, sign_extend);
+
+ dep2x = binop(Iop_Xor64, dep2, ndep);
+
+ s390_cc_thunk_fill(op, dep1, dep2x, ndep);
+}
+
+
+/* Write one floating point value into the flags thunk */
+static void
+s390_cc_thunk_put1f(UInt opc, IRTemp d1)
+{
+ IRExpr *op, *dep1, *dep2, *ndep;
+
+ op = mkU64(opc);
+ dep1 = mkexpr(d1);
+ dep2 = mkU64(0);
+ ndep = mkU64(0);
+
+ s390_cc_thunk_fill(op, dep1, dep2, ndep);
+}
+
+
+/* Write a floating point value and an integer into the flags thunk. The
+ integer value is zero-extended first. */
+static void
+s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
+{
+ IRExpr *op, *dep1, *dep2, *ndep;
+
+ op = mkU64(opc);
+ dep1 = mkexpr(d1);
+ dep2 = s390_cc_widen(d2, False);
+ ndep = mkU64(0);
+
+ s390_cc_thunk_fill(op, dep1, dep2, ndep);
+}
+
+
+/* Write a 128-bit floating point value into the flags thunk. This is
+ done by splitting the value into two 64-bits values. */
+static void
+s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
+{
+ IRExpr *op, *hi, *lo, *ndep;
+
+ op = mkU64(opc);
+ hi = unop(Iop_F128HItoF64, mkexpr(d1));
+ lo = unop(Iop_F128LOtoF64, mkexpr(d1));
+ ndep = mkU64(0);
+
+ s390_cc_thunk_fill(op, hi, lo, ndep);
+}
+
+
+/* Write a 128-bit floating point value and an integer into the flags thunk.
+ The integer value is zero-extended first. */
+static void
+s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
+{
+ IRExpr *op, *hi, *lo, *lox, *ndep;
+
+ op = mkU64(opc);
+ hi = unop(Iop_F128HItoF64, mkexpr(d1));
+ lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
+ ndep = s390_cc_widen(nd, False);
+
+ lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
+
+ s390_cc_thunk_fill(op, hi, lox, ndep);
+}
+
+
+static void
+s390_cc_set(UInt val)
+{
+ s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
+ mkU64(val), mkU64(0), mkU64(0));
+}
+
+/* Build IR to calculate the condition code from flags thunk.
+ Returns an expression of type Ity_I32 */
+static IRExpr *
+s390_call_calculate_cc(void)
+{
+ IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
+
+ op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
+ dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
+ dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
+ ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
+
+ args = mkIRExprVec_4(op, dep1, dep2, ndep);
+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
+ "s390_calculate_cc", &s390_calculate_cc, args);
+
+ /* Exclude OP and NDEP from definedness checking. We're only
+ interested in DEP1 and DEP2. */
+ call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
+
+ return call;
+}
+
+/* Build IR to calculate the internal condition code for a "compare and branch"
+ insn. Returns an expression of type Ity_I32 */
+static IRExpr *
+s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
+{
+ IRExpr **args, *call, *op, *dep1, *dep2;
+
+ op = mkU64(opc);
+ dep1 = s390_cc_widen(op1, sign_extend);
+ dep2 = s390_cc_widen(op2, sign_extend);
+
+ args = mkIRExprVec_3(op, dep1, dep2);
+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
+ "s390_calculate_icc", &s390_calculate_icc, args);
+
+ /* Exclude OP from definedness checking. We're only
+ interested in DEP1 and DEP2. */
+ call->Iex.CCall.cee->mcx_mask = (1<<0);
+
+ return call;
+}
+
+/* Build IR to calculate the condition code from flags thunk.
+ Returns an expression of type Ity_I32 */
+static IRExpr *
+s390_call_calculate_cond(UInt m)
+{
+ IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
+
+ mask = mkU64(m);
+ op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
+ dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
+ dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
+ ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
+
+ args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
+ "s390_calculate_cond", &s390_calculate_cond, args);
+
+ /* Exclude the requested condition, OP and NDEP from definedness
+ checking. We're only interested in DEP1 and DEP2. */
+ call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
+
+ return call;
+}
+
+#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
+#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
+#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
+#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
+#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
+#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
+#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
+ s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
+#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
+ s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
+#define s390_call_calculate_iccZZ(op,dep1,dep2) \
+ s390_call_calculate_icc(op,dep1,dep2,False)
+#define s390_call_calculate_iccSS(op,dep1,dep2) \
+ s390_call_calculate_icc(op,dep1,dep2,True)
+
+
+#define OFFB_TISTART S390X_GUEST_OFFSET(guest_TISTART)
+#define OFFB_TILEN S390X_GUEST_OFFSET(guest_TILEN)
+
+
+/*------------------------------------------------------------*/
+/*--- Guest register access ---*/
+/*------------------------------------------------------------*/
+
+
+/*------------------------------------------------------------*/
+/*--- ar registers ---*/
+/*------------------------------------------------------------*/
+
+/* Return the guest state offset of a ar register. */
+static UInt
+ar_offset(UInt archreg)
+{
+ static const UInt offset[16] = {
+ S390X_GUEST_OFFSET(guest_a0),
+ S390X_GUEST_OFFSET(guest_a1),
+ S390X_GUEST_OFFSET(guest_a2),
+ S390X_GUEST_OFFSET(guest_a3),
+ S390X_GUEST_OFFSET(guest_a4),
+ S390X_GUEST_OFFSET(guest_a5),
+ S390X_GUEST_OFFSET(guest_a6),
+ S390X_GUEST_OFFSET(guest_a7),
+ S390X_GUEST_OFFSET(guest_a8),
+ S390X_GUEST_OFFSET(guest_a9),
+ S390X_GUEST_OFFSET(guest_a10),
+ S390X_GUEST_OFFSET(guest_a11),
+ S390X_GUEST_OFFSET(guest_a12),
+ S390X_GUEST_OFFSET(guest_a13),
+ S390X_GUEST_OFFSET(guest_a14),
+ S390X_GUEST_OFFSET(guest_a15),
+ };
+
+ vassert(archreg < 16);
+
+ return offset[archreg];
+}
+
+
+/* Return the guest state offset of word #0 of a ar register. */
+static __inline__ UInt
+ar_w0_offset(UInt archreg)
+{
+ return ar_offset(archreg) + 0;
+}
+
+/* Write word #0 of a ar to the guest state. */
+static __inline__ void
+put_ar_w0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
+}
+
+/* Read word #0 of a ar register. */
+static __inline__ IRExpr *
+get_ar_w0(UInt archreg)
+{
+ return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
+}
+
+
+/*------------------------------------------------------------*/
+/*--- fpr registers ---*/
+/*------------------------------------------------------------*/
+
+/* Return the guest state offset of a fpr register. */
+static UInt
+fpr_offset(UInt archreg)
+{
+ static const UInt offset[16] = {
+ S390X_GUEST_OFFSET(guest_f0),
+ S390X_GUEST_OFFSET(guest_f1),
+ S390X_GUEST_OFFSET(guest_f2),
+ S390X_GUEST_OFFSET(guest_f3),
+ S390X_GUEST_OFFSET(guest_f4),
+ S390X_GUEST_OFFSET(guest_f5),
+ S390X_GUEST_OFFSET(guest_f6),
+ S390X_GUEST_OFFSET(guest_f7),
+ S390X_GUEST_OFFSET(guest_f8),
+ S390X_GUEST_OFFSET(guest_f9),
+ S390X_GUEST_OFFSET(guest_f10),
+ S390X_GUEST_OFFSET(guest_f11),
+ S390X_GUEST_OFFSET(guest_f12),
+ S390X_GUEST_OFFSET(guest_f13),
+ S390X_GUEST_OFFSET(guest_f14),
+ S390X_GUEST_OFFSET(guest_f15),
+ };
+
+ vassert(archreg < 16);
+
+ return offset[archreg];
+}
+
+
+/* Return the guest state offset of word #0 of a fpr register. */
+static __inline__ UInt
+fpr_w0_offset(UInt archreg)
+{
+ return fpr_offset(archreg) + 0;
+}
+
+/* Write word #0 of a fpr to the guest state. */
+static __inline__ void
+put_fpr_w0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
+
+ stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
+}
+
+/* Read word #0 of a fpr register. */
+static __inline__ IRExpr *
+get_fpr_w0(UInt archreg)
+{
+ return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
+}
+
+/* Return the guest state offset of double word #0 of a fpr register. */
+static __inline__ UInt
+fpr_dw0_offset(UInt archreg)
+{
+ return fpr_offset(archreg) + 0;
+}
+
+/* Write double word #0 of a fpr to the guest state. */
+static __inline__ void
+put_fpr_dw0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
+
+ stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
+}
+
+/* Read double word #0 of a fpr register. */
+static __inline__ IRExpr *
+get_fpr_dw0(UInt archreg)
+{
+ return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
+}
+
+
+/*------------------------------------------------------------*/
+/*--- gpr registers ---*/
+/*------------------------------------------------------------*/
+
+/* Return the guest state offset of a gpr register. */
+static UInt
+gpr_offset(UInt archreg)
+{
+ static const UInt offset[16] = {
+ S390X_GUEST_OFFSET(guest_r0),
+ S390X_GUEST_OFFSET(guest_r1),
+ S390X_GUEST_OFFSET(guest_r2),
+ S390X_GUEST_OFFSET(guest_r3),
+ S390X_GUEST_OFFSET(guest_r4),
+ S390X_GUEST_OFFSET(guest_r5),
+ S390X_GUEST_OFFSET(guest_r6),
+ S390X_GUEST_OFFSET(guest_r7),
+ S390X_GUEST_OFFSET(guest_r8),
+ S390X_GUEST_OFFSET(guest_r9),
+ S390X_GUEST_OFFSET(guest_r10),
+ S390X_GUEST_OFFSET(guest_r11),
+ S390X_GUEST_OFFSET(guest_r12),
+ S390X_GUEST_OFFSET(guest_r13),
+ S390X_GUEST_OFFSET(guest_r14),
+ S390X_GUEST_OFFSET(guest_r15),
+ };
+
+ vassert(archreg < 16);
+
+ return offset[archreg];
+}
+
+
+/* Return the guest state offset of word #0 of a gpr register. */
+static __inline__ UInt
+gpr_w0_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 0;
+}
+
+/* Write word #0 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_w0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
+}
+
+/* Read word #0 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_w0(UInt archreg)
+{
+ return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
+}
+
+/* Return the guest state offset of double word #0 of a gpr register. */
+static __inline__ UInt
+gpr_dw0_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 0;
+}
+
+/* Write double word #0 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_dw0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
+
+ stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
+}
+
+/* Read double word #0 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_dw0(UInt archreg)
+{
+ return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
+}
+
+/* Return the guest state offset of half word #1 of a gpr register. */
+static __inline__ UInt
+gpr_hw1_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 2;
+}
+
+/* Write half word #1 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_hw1(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
+
+ stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
+}
+
+/* Read half word #1 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_hw1(UInt archreg)
+{
+ return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
+}
+
+/* Return the guest state offset of byte #6 of a gpr register. */
+static __inline__ UInt
+gpr_b6_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 6;
+}
+
+/* Write byte #6 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b6(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
+}
+
+/* Read byte #6 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b6(UInt archreg)
+{
+ return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of byte #3 of a gpr register. */
+static __inline__ UInt
+gpr_b3_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 3;
+}
+
+/* Write byte #3 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b3(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
+}
+
+/* Read byte #3 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b3(UInt archreg)
+{
+ return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of byte #0 of a gpr register. */
+static __inline__ UInt
+gpr_b0_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 0;
+}
+
+/* Write byte #0 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
+}
+
+/* Read byte #0 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b0(UInt archreg)
+{
+ return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of word #1 of a gpr register. */
+static __inline__ UInt
+gpr_w1_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 4;
+}
+
+/* Write word #1 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_w1(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
+}
+
+/* Read word #1 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_w1(UInt archreg)
+{
+ return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
+}
+
+/* Return the guest state offset of half word #3 of a gpr register. */
+static __inline__ UInt
+gpr_hw3_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 6;
+}
+
+/* Write half word #3 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_hw3(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
+
+ stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
+}
+
+/* Read half word #3 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_hw3(UInt archreg)
+{
+ return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
+}
+
+/* Return the guest state offset of byte #7 of a gpr register. */
+static __inline__ UInt
+gpr_b7_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 7;
+}
+
+/* Write byte #7 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b7(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
+}
+
+/* Read byte #7 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b7(UInt archreg)
+{
+ return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of half word #0 of a gpr register. */
+static __inline__ UInt
+gpr_hw0_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 0;
+}
+
+/* Write half word #0 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_hw0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
+
+ stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
+}
+
+/* Read half word #0 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_hw0(UInt archreg)
+{
+ return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
+}
+
+/* Return the guest state offset of byte #4 of a gpr register. */
+static __inline__ UInt
+gpr_b4_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 4;
+}
+
+/* Write byte #4 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b4(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
+}
+
+/* Read byte #4 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b4(UInt archreg)
+{
+ return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of byte #1 of a gpr register. */
+static __inline__ UInt
+gpr_b1_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 1;
+}
+
+/* Write byte #1 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b1(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
+}
+
+/* Read byte #1 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b1(UInt archreg)
+{
+ return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of half word #2 of a gpr register. */
+static __inline__ UInt
+gpr_hw2_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 4;
+}
+
+/* Write half word #2 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_hw2(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
+
+ stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
+}
+
+/* Read half word #2 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_hw2(UInt archreg)
+{
+ return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
+}
+
+/* Return the guest state offset of byte #5 of a gpr register. */
+static __inline__ UInt
+gpr_b5_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 5;
+}
+
+/* Write byte #5 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b5(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
+}
+
+/* Read byte #5 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b5(UInt archreg)
+{
+ return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of byte #2 of a gpr register. */
+static __inline__ UInt
+gpr_b2_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 2;
+}
+
+/* Write byte #2 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b2(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
+}
+
+/* Read byte #2 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b2(UInt archreg)
+{
+ return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of the counter register. */
+static UInt
+counter_offset(void)
+{
+ return S390X_GUEST_OFFSET(guest_counter);
+}
+
+/* Return the guest state offset of double word #0 of the counter register. */
+static __inline__ UInt
+counter_dw0_offset(void)
+{
+ return counter_offset() + 0;
+}
+
+/* Write double word #0 of the counter to the guest state. */
+static __inline__ void
+put_counter_dw0(IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
+
+ stmt(IRStmt_Put(counter_dw0_offset(), expr));
+}
+
+/* Read double word #0 of the counter register. */
+static __inline__ IRExpr *
+get_counter_dw0(void)
+{
+ return IRExpr_Get(counter_dw0_offset(), Ity_I64);
+}
+
+/* Return the guest state offset of word #0 of the counter register. */
+static __inline__ UInt
+counter_w0_offset(void)
+{
+ return counter_offset() + 0;
+}
+
+/* Return the guest state offset of word #1 of the counter register. */
+static __inline__ UInt
+counter_w1_offset(void)
+{
+ return counter_offset() + 4;
+}
+
+/* Write word #0 of the counter to the guest state. */
+static __inline__ void
+put_counter_w0(IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(counter_w0_offset(), expr));
+}
+
+/* Read word #0 of the counter register. */
+static __inline__ IRExpr *
+get_counter_w0(void)
+{
+ return IRExpr_Get(counter_w0_offset(), Ity_I32);
+}
+
+/* Write word #1 of the counter to the guest state. */
+static __inline__ void
+put_counter_w1(IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(counter_w1_offset(), expr));
+}
+
+/* Read word #1 of the counter register. */
+static __inline__ IRExpr *
+get_counter_w1(void)
+{
+ return IRExpr_Get(counter_w1_offset(), Ity_I32);
+}
+
+/* Return the guest state offset of the fpc register. */
+static UInt
+fpc_offset(void)
+{
+ return S390X_GUEST_OFFSET(guest_fpc);
+}
+
+/* Return the guest state offset of word #0 of the fpc register. */
+static __inline__ UInt
+fpc_w0_offset(void)
+{
+ return fpc_offset() + 0;
+}
+
+/* Write word #0 of the fpc to the guest state. */
+static __inline__ void
+put_fpc_w0(IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(fpc_w0_offset(), expr));
+}
+
+/* Read word #0 of the fpc register. */
+static __inline__ IRExpr *
+get_fpc_w0(void)
+{
+ return IRExpr_Get(fpc_w0_offset(), Ity_I32);
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Build IR for formats ---*/
+/*------------------------------------------------------------*/
+static void
+s390_format_I(HChar *(*irgen)(UChar i),
+ UChar i)
+{
+ HChar *mnm = irgen(i);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(MNM, UINT), mnm, i);
+}
+
+static void
+s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
+ UChar r1, UShort i2)
+{
+ irgen(r1, i2);
+}
+
+static void
+s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
+ UChar r1, UShort i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
+}
+
+static void
+s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
+ UChar r1, UShort i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
+}
+
+static void
+s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
+ UChar r1, UShort i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
+}
+
+static void
+s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
+ UChar r1, UChar r3, UShort i2)
+{
+ HChar *mnm = irgen(r1, r3, i2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
+}
+
+static void
+s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
+ UChar r1, UChar r3, UShort i2)
+{
+ HChar *mnm = irgen(r1, r3, i2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
+}
+
+static void
+s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
+ UChar i5),
+ UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ HChar *mnm = irgen(r1, r2, i3, i4, i5);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
+ i5);
+}
+
+static void
+s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
+ UChar r1, UChar r2, UShort i4, UChar m3)
+{
+ HChar *mnm = irgen(r1, r2, i4, m3);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
+ r2, m3, (Int)(Short)i4);
+}
+
+static void
+s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
+ UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ HChar *mnm = irgen(r1, m3, i4, i2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
+ r1, i2, m3, (Int)(Short)i4);
+}
+
+static void
+s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
+ UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ HChar *mnm = irgen(r1, m3, i4, i2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
+ (Int)(Char)i2, m3, (Int)(Short)i4);
+}
+
+static void
+s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
+ UChar r1, UInt i2)
+{
+ irgen(r1, i2);
+}
+
+static void
+s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
+ UChar r1, UInt i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
+}
+
+static void
+s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
+ UChar r1, UInt i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
+}
+
+static void
+s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
+ UChar r1, UInt i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
+}
+
+static void
+s390_format_RIL_UP(HChar *(*irgen)(void),
+ UChar r1, UInt i2)
+{
+ HChar *mnm = irgen();
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
+}
+
+static void
+s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
+ IRTemp op4addr),
+ UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
+{
+ HChar *mnm;
+ IRTemp op4addr = newTemp(Ity_I64);
+
+ assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
+ mkU64(0)));
+
+ mnm = irgen(r1, m3, i2, op4addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
+ (Int)(Char)i2, m3, d4, 0, b4);
+}
+
+static void
+s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
+ IRTemp op4addr),
+ UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
+{
+ HChar *mnm;
+ IRTemp op4addr = newTemp(Ity_I64);
+
+ assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
+ mkU64(0)));
+
+ mnm = irgen(r1, m3, i2, op4addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
+ i2, m3, d4, 0, b4);
+}
+
+static void
+s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ irgen(r1, r2);
+}
+
+static void
+s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ irgen(r1, r2);
+}
+
+static void
+s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
+ UChar r1)
+{
+ HChar *mnm = irgen(r1);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(MNM, GPR), mnm, r1);
+}
+
+static void
+s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
+ UChar r1)
+{
+ HChar *mnm = irgen(r1);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(MNM, FPR), mnm, r1);
+}
+
+static void
+s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
+ UChar r1, UChar r3, UChar r2)
+{
+ HChar *mnm = irgen(r1, r3, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
+}
+
+static void
+s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
+ UChar m3, UChar r1, UChar r2, Int xmnm_kind)
+{
+ irgen(m3, r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
+}
+
+static void
+s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
+ UChar r3, UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r3, r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
+}
+
+static void
+s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
+ UChar r3, UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r3, r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
+}
+
+static void
+s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
+ UChar r3, UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r3, r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
+}
+
+static void
+s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
+ UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
+{
+ HChar *mnm;
+ IRTemp op4addr = newTemp(Ity_I64);
+
+ assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r2, m3, op4addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
+ r2, m3, d4, 0, b4);
+}
+
+static void
+s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
+}
+
+static void
+s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
+ UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
+}
+
+static void
+s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
+ UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
+}
+
+static void
+s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
+ UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
+}
+
+static void
+s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
+ UChar r1, UChar r3, UShort i2)
+{
+ HChar *mnm = irgen(r1, r3, i2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
+}
+
+static void
+s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
+ UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
+}
+
+static void
+s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
+ UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
+}
+
+static void
+s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
+ UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
+}
+
+static void
+s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
+ Int xmnm_kind)
+{
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
+ guest_IA_next_instr);
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ irgen(r1, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
+}
+
+static void
+s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
+ IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ irgen(r1, x2, b2, d2, op2addr);
+}
+
+static void
+s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
+}
+
+static void
+s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
+}
+
+static void
+s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
+}
+
+static void
+s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
+ UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r3, op2addr, r1);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
+}
+
+static void
+s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
+}
+
+static void
+s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
+}
+
+static void
+s390_format_RXY_URRD(HChar *(*irgen)(void),
+ UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen();
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
+}
+
+static void
+s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
+ UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
+}
+
+static void
+s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
+ UChar i2, UChar b1, UShort d1)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+
+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+
+ mnm = irgen(i2, op1addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
+}
+
+static void
+s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
+ UChar i2, UChar b1, UShort dl1, UChar dh1)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+ IRTemp d1 = newTemp(Ity_I64);
+
+ assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
+ assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+
+ mnm = irgen(i2, op1addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
+}
+
+static void
+s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
+ UChar i2, UChar b1, UShort dl1, UChar dh1)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+ IRTemp d1 = newTemp(Ity_I64);
+
+ assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
+ assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+
+ mnm = irgen(i2, op1addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
+}
+
+static void
+s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
+ UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(l, op1addr, op2addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
+}
+
+static void
+s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
+ UChar b1, UShort d1, UShort i2)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+
+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+
+ mnm = irgen(i2, op1addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
+}
+
+static void
+s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
+ UChar b1, UShort d1, UShort i2)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+
+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+
+ mnm = irgen(i2, op1addr);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
+}
+
+
+
+/*------------------------------------------------------------*/
+/*--- Build IR for opcodes ---*/
+/*------------------------------------------------------------*/
+
+static HChar *
+s390_irgen_00(UChar r1 __attribute__((unused)),
+ UChar r2 __attribute__((unused)))
+{
+ IRDirty *d;
+
+ d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_00", &s390x_dirtyhelper_00,
+ mkIRExprVec_0());
+ d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
+
+ d->fxState[0].fx = Ifx_Modify; /* read then write */
+ d->fxState[0].offset = S390X_GUEST_OFFSET(guest_IA);
+ d->fxState[0].size = sizeof(ULong);
+ d->nFxState = 1;
+
+ stmt(IRStmt_Dirty(d));
+
+ return "00";
+}
+
+static HChar *
+s390_irgen_AR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ar";
+}
+
+static HChar *
+s390_irgen_AGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "agr";
+}
+
+static HChar *
+s390_irgen_AGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "agfr";
+}
+
+static HChar *
+s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ark";
+}
+
+static HChar *
+s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "agrk";
+}
+
+static HChar *
+s390_irgen_A(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "a";
+}
+
+static HChar *
+s390_irgen_AY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ay";
+}
+
+static HChar *
+s390_irgen_AG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ag";
+}
+
+static HChar *
+s390_irgen_AGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "agf";
+}
+
+static HChar *
+s390_irgen_AFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "afi";
+}
+
+static HChar *
+s390_irgen_AGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Int)i2;
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "agfi";
+}
+
+static HChar *
+s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
+{
+ Int op2;
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ op2 = (Int)(Short)i2;
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
+ op2)), op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ahik";
+}
+
+static HChar *
+s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
+{
+ Long op2;
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ op2 = (Long)(Short)i2;
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
+ op2)), op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "aghik";
+}
+
+static HChar *
+s390_irgen_ASI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, load(Ity_I32, mkexpr(op1addr)));
+ op2 = (Int)(Char)i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
+ store(mkexpr(op1addr), mkexpr(result));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+
+ return "asi";
+}
+
+static HChar *
+s390_irgen_AGSI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, load(Ity_I64, mkexpr(op1addr)));
+ op2 = (Long)(Char)i2;
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
+ store(mkexpr(op1addr), mkexpr(result));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+
+ return "agsi";
+}
+
+static HChar *
+s390_irgen_AH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ah";
+}
+
+static HChar *
+s390_irgen_AHY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ahy";
+}
+
+static HChar *
+s390_irgen_AHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)(Short)i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ahi";
+}
+
+static HChar *
+s390_irgen_AGHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Short)i2;
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "aghi";
+}
+
+static HChar *
+s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r2));
+ assign(op3, get_gpr_w0(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "ahhhr";
+}
+
+static HChar *
+s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "ahhlr";
+}
+
+static HChar *
+s390_irgen_AIH(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = (Int)i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "aih";
+}
+
+static HChar *
+s390_irgen_ALR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alr";
+}
+
+static HChar *
+s390_irgen_ALGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "algr";
+}
+
+static HChar *
+s390_irgen_ALGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "algfr";
+}
+
+static HChar *
+s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alrk";
+}
+
+static HChar *
+s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "algrk";
+}
+
+static HChar *
+s390_irgen_AL(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "al";
+}
+
+static HChar *
+s390_irgen_ALY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "aly";
+}
+
+static HChar *
+s390_irgen_ALG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "alg";
+}
+
+static HChar *
+s390_irgen_ALGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "algf";
+}
+
+static HChar *
+s390_irgen_ALFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alfi";
+}
+
+static HChar *
+s390_irgen_ALGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (ULong)i2;
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
+ mkU64(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "algfi";
+}
+
+static HChar *
+s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r2));
+ assign(op3, get_gpr_w0(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "alhhhr";
+}
+
+static HChar *
+s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "alhhlr";
+}
+
+static HChar *
+s390_irgen_ALCR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp carry_in = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
+ assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
+ mkexpr(carry_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alcr";
+}
+
+static HChar *
+s390_irgen_ALCGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp carry_in = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
+ mkU8(1))));
+ assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
+ mkexpr(carry_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "alcgr";
+}
+
+static HChar *
+s390_irgen_ALC(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp carry_in = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
+ assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
+ mkexpr(carry_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alc";
+}
+
+static HChar *
+s390_irgen_ALCG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp carry_in = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
+ mkU8(1))));
+ assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
+ mkexpr(carry_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "alcg";
+}
+
+static HChar *
+s390_irgen_ALSI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, load(Ity_I32, mkexpr(op1addr)));
+ op2 = (UInt)(Int)(Char)i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "alsi";
+}
+
+static HChar *
+s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, load(Ity_I64, mkexpr(op1addr)));
+ op2 = (ULong)(Long)(Char)i2;
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
+ mkU64(op2)));
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "algsi";
+}
+
+static HChar *
+s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
+{
+ UInt op2;
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ op2 = (UInt)(Int)(Short)i2;
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
+ op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alhsik";
+}
+
+static HChar *
+s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
+{
+ ULong op2;
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ op2 = (ULong)(Long)(Short)i2;
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
+ op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "alghsik";
+}
+
+static HChar *
+s390_irgen_ALSIH(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "alsih";
+}
+
+static HChar *
+s390_irgen_ALSIHN(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "alsihn";
+}
+
+static HChar *
+s390_irgen_NR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "nr";
+}
+
+static HChar *
+s390_irgen_NGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ngr";
+}
+
+static HChar *
+s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "nrk";
+}
+
+static HChar *
+s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ngrk";
+}
+
+static HChar *
+s390_irgen_N(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "n";
+}
+
+static HChar *
+s390_irgen_NY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ny";
+}
+
+static HChar *
+s390_irgen_NG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ng";
+}
+
+static HChar *
+s390_irgen_NI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "ni";
+}
+
+static HChar *
+s390_irgen_NIY(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "niy";
+}
+
+static HChar *
+s390_irgen_NIHF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "nihf";
+}
+
+static HChar *
+s390_irgen_NIHH(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw0(r1, mkexpr(result));
+
+ return "nihh";
+}
+
+static HChar *
+s390_irgen_NIHL(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw1(r1, mkexpr(result));
+
+ return "nihl";
+}
+
+static HChar *
+s390_irgen_NILF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "nilf";
+}
+
+static HChar *
+s390_irgen_NILH(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw2(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw2(r1, mkexpr(result));
+
+ return "nilh";
+}
+
+static HChar *
+s390_irgen_NILL(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw3(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw3(r1, mkexpr(result));
+
+ return "nill";
+}
+
+static HChar *
+s390_irgen_BASR(UChar r1, UChar r2)
+{
+ IRTemp target = newTemp(Ity_I64);
+
+ if (r2 == 0) {
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
+ } else {
+ if (r1 != r2) {
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
+ call_function(get_gpr_dw0(r2));
+ } else {
+ assign(target, get_gpr_dw0(r2));
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
+ call_function(mkexpr(target));
+ }
+ }
+
+ return "basr";
+}
+
+static HChar *
+s390_irgen_BAS(UChar r1, IRTemp op2addr)
+{
+ IRTemp target = newTemp(Ity_I64);
+
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
+ assign(target, mkexpr(op2addr));
+ call_function(mkexpr(target));
+
+ return "bas";
+}
+
+static HChar *
+s390_irgen_BCR(UChar r1, UChar r2)
+{
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (r2 == 0 && (r1 >= 14)) { /* serialization */
+ stmt(IRStmt_MBE(Imbe_Fence));
+ }
+
+ if ((r2 == 0) || (r1 == 0)) {
+ } else {
+ if (r1 == 15) {
+ return_from_function(get_gpr_dw0(r2));
+ } else {
+ assign(cond, s390_call_calculate_cond(r1));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), get_gpr_dw0(r2));
+ }
+ }
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
+
+ return "bcr";
+}
+
+static HChar *
+s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
+{
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (r1 == 0) {
+ } else {
+ if (r1 == 15) {
+ always_goto(mkexpr(op2addr));
+ } else {
+ assign(cond, s390_call_calculate_cond(r1));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op2addr));
+ }
+ }
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
+
+ return "bc";
+}
+
+static HChar *
+s390_irgen_BCTR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
+ if (r2 != 0) {
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
+ ), get_gpr_dw0(r2));
+ }
+
+ return "bctr";
+}
+
+static HChar *
+s390_irgen_BCTGR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
+ if (r2 != 0) {
+ if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
+ mkU64(0)), get_gpr_dw0(r2));
+ }
+
+ return "bctgr";
+}
+
+static HChar *
+s390_irgen_BCT(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
+ mkexpr(op2addr));
+
+ return "bct";
+}
+
+static HChar *
+s390_irgen_BCTG(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
+ mkexpr(op2addr));
+
+ return "bctg";
+}
+
+static HChar *
+s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_I32);
+
+ assign(value, get_gpr_w1(r3 | 1));
+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
+ if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
+ mkexpr(value)), mkexpr(op2addr));
+
+ return "bxh";
+}
+
+static HChar *
+s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_I64);
+
+ assign(value, get_gpr_dw0(r3 | 1));
+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
+ if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
+ mkexpr(value)), mkexpr(op2addr));
+
+ return "bxhg";
+}
+
+static HChar *
+s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_I32);
+
+ assign(value, get_gpr_w1(r3 | 1));
+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
+ if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
+ get_gpr_w1(r1)), mkexpr(op2addr));
+
+ return "bxle";
+}
+
+static HChar *
+s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_I64);
+
+ assign(value, get_gpr_dw0(r3 | 1));
+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
+ if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
+ get_gpr_dw0(r1)), mkexpr(op2addr));
+
+ return "bxleg";
+}
+
+static HChar *
+s390_irgen_BRAS(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
+ call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "bras";
+}
+
+static HChar *
+s390_irgen_BRASL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
+ call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
+
+ return "brasl";
+}
+
+static HChar *
+s390_irgen_BRC(UChar r1, UShort i2)
+{
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (r1 == 0) {
+ } else {
+ if (r1 == 15) {
+ always_goto_and_chase(
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+ } else {
+ assign(cond, s390_call_calculate_cond(r1));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ }
+ }
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
+
+ return "brc";
+}
+
+static HChar *
+s390_irgen_BRCL(UChar r1, UInt i2)
+{
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (r1 == 0) {
+ } else {
+ if (r1 == 15) {
+ always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
+ } else {
+ assign(cond, s390_call_calculate_cond(r1));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
+ }
+ }
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
+
+ return "brcl";
+}
+
+static HChar *
+s390_irgen_BRCT(UChar r1, UShort i2)
+{
+ put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
+ if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brct";
+}
+
+static HChar *
+s390_irgen_BRCTG(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brctg";
+}
+
+static HChar *
+s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
+{
+ IRTemp value = newTemp(Ity_I32);
+
+ assign(value, get_gpr_w1(r3 | 1));
+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
+ if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brxh";
+}
+
+static HChar *
+s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
+{
+ IRTemp value = newTemp(Ity_I64);
+
+ assign(value, get_gpr_dw0(r3 | 1));
+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
+ if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brxhg";
+}
+
+static HChar *
+s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
+{
+ IRTemp value = newTemp(Ity_I32);
+
+ assign(value, get_gpr_w1(r3 | 1));
+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
+ if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brxle";
+}
+
+static HChar *
+s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
+{
+ IRTemp value = newTemp(Ity_I64);
+
+ assign(value, get_gpr_dw0(r3 | 1));
+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
+ if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brxlg";
+}
+
+static HChar *
+s390_irgen_CR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cr";
+}
+
+static HChar *
+s390_irgen_CGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgr";
+}
+
+static HChar *
+s390_irgen_CGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgfr";
+}
+
+static HChar *
+s390_irgen_C(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "c";
+}
+
+static HChar *
+s390_irgen_CY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cy";
+}
+
+static HChar *
+s390_irgen_CG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cg";
+}
+
+static HChar *
+s390_irgen_CGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgf";
+}
+
+static HChar *
+s390_irgen_CFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+
+ return "cfi";
+}
+
+static HChar *
+s390_irgen_CGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Int)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+
+ return "cgfi";
+}
+
+static HChar *
+s390_irgen_CRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "crl";
+}
+
+static HChar *
+s390_irgen_CGRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgrl";
+}
+
+static HChar *
+s390_irgen_CGFRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgfrl";
+}
+
+static HChar *
+s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "crb";
+}
+
+static HChar *
+s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "cgrb";
+}
+
+static HChar *
+s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto_and_chase(
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "crj";
+}
+
+static HChar *
+s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto_and_chase(
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "cgrj";
+}
+
+static HChar *
+s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)(Char)i2;
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ mktemp(Ity_I32, mkU32((UInt)op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "cib";
+}
+
+static HChar *
+s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Char)i2;
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ mktemp(Ity_I64, mkU64((ULong)op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "cgib";
+}
+
+static HChar *
+s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)(Char)i2;
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ mktemp(Ity_I32, mkU32((UInt)op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "cij";
+}
+
+static HChar *
+s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Char)i2;
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ mktemp(Ity_I64, mkU64((ULong)op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "cgij";
+}
+
+static HChar *
+s390_irgen_CH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "ch";
+}
+
+static HChar *
+s390_irgen_CHY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "chy";
+}
+
+static HChar *
+s390_irgen_CGH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgh";
+}
+
+static HChar *
+s390_irgen_CHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)(Short)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+
+ return "chi";
+}
+
+static HChar *
+s390_irgen_CGHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Short)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+
+ return "cghi";
+}
+
+static HChar *
+s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ Short op2;
+
+ assign(op1, load(Ity_I16, mkexpr(op1addr)));
+ op2 = (Short)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
+ mkU16((UShort)op2)));
+
+ return "chhsi";
+}
+
+static HChar *
+s390_irgen_CHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+
+ assign(op1, load(Ity_I32, mkexpr(op1addr)));
+ op2 = (Int)(Short)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+
+ return "chsi";
+}
+
+static HChar *
+s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+
+ assign(op1, load(Ity_I64, mkexpr(op1addr)));
+ op2 = (Long)(Short)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+
+ return "cghsi";
+}
+
+static HChar *
+s390_irgen_CHRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "chrl";
+}
+
+static HChar *
+s390_irgen_CGHRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cghrl";
+}
+
+static HChar *
+s390_irgen_CHHR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, get_gpr_w0(r2));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "chhr";
+}
+
+static HChar *
+s390_irgen_CHLR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, get_gpr_w1(r2));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "chlr";
+}
+
+static HChar *
+s390_irgen_CHF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "chf";
+}
+
+static HChar *
+s390_irgen_CIH(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = (Int)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+
+ return "cih";
+}
+
+static HChar *
+s390_irgen_CLR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clr";
+}
+
+static HChar *
+s390_irgen_CLGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clgr";
+}
+
+static HChar *
+s390_irgen_CLGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clgfr";
+}
+
+static HChar *
+s390_irgen_CL(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "cl";
+}
+
+static HChar *
+s390_irgen_CLY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "cly";
+}
+
+static HChar *
+s390_irgen_CLG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clg";
+}
+
+static HChar *
+s390_irgen_CLGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clgf";
+}
+
+static HChar *
+s390_irgen_CLFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+
+ return "clfi";
+}
+
+static HChar *
+s390_irgen_CLGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (ULong)i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
+ mkU64(op2)));
+
+ return "clgfi";
+}
+
+static HChar *
+s390_irgen_CLI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
+ mkU8(op2)));
+
+ return "cli";
+}
+
+static HChar *
+s390_irgen_CLIY(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
+ mkU8(op2)));
+
+ return "cliy";
+}
+
+static HChar *
+s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+
+ assign(op1, load(Ity_I32, mkexpr(op1addr)));
+ op2 = (UInt)i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+
+ return "clfhsi";
+}
+
+static HChar *
+s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+
+ assign(op1, load(Ity_I64, mkexpr(op1addr)));
+ op2 = (ULong)i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
+ mkU64(op2)));
+
+ return "clghsi";
+}
+
+static HChar *
+s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+
+ assign(op1, load(Ity_I16, mkexpr(op1addr)));
+ op2 = i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
+ mkU16(op2)));
+
+ return "clhhsi";
+}
+
+static HChar *
+s390_irgen_CLRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clrl";
+}
+
+static HChar *
+s390_irgen_CLGRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clgrl";
+}
+
+static HChar *
+s390_irgen_CLGFRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clgfrl";
+}
+
+static HChar *
+s390_irgen_CLHRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clhrl";
+}
+
+static HChar *
+s390_irgen_CLGHRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clghrl";
+}
+
+static HChar *
+s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "clrb";
+}
+
+static HChar *
+s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "clgrb";
+}
+
+static HChar *
+s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "clrj";
+}
+
+static HChar *
+s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "clgrj";
+}
+
+static HChar *
+s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ op2 = (UInt)i2;
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ mktemp(Ity_I32, mkU32(op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "clib";
+}
+
+static HChar *
+s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (ULong)i2;
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ mktemp(Ity_I64, mkU64(op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "clgib";
+}
+
+static HChar *
+s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ op2 = (UInt)i2;
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ mktemp(Ity_I32, mkU32(op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "clij";
+}
+
+static HChar *
+s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (ULong)i2;
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ mktemp(Ity_I64, mkU64(op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "clgij";
+}
+
+static HChar *
+s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp b0 = newTemp(Ity_I32);
+ IRTemp b1 = newTemp(Ity_I32);
+ IRTemp b2 = newTemp(Ity_I32);
+ IRTemp b3 = newTemp(Ity_I32);
+ IRTemp c0 = newTemp(Ity_I32);
+ IRTemp c1 = newTemp(Ity_I32);
+ IRTemp c2 = newTemp(Ity_I32);
+ IRTemp c3 = newTemp(Ity_I32);
+ UChar n;
+
+ n = 0;
+ if ((r3 & 8) != 0) {
+ assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
+ assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
+ n = n + 1;
+ } else {
+ assign(b0, mkU32(0));
+ assign(c0, mkU32(0));
+ }
+ if ((r3 & 4) != 0) {
+ assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
+ assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b1, mkU32(0));
+ assign(c1, mkU32(0));
+ }
+ if ((r3 & 2) != 0) {
+ assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
+ assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b2, mkU32(0));
+ assign(c2, mkU32(0));
+ }
+ if ((r3 & 1) != 0) {
+ assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
+ assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b3, mkU32(0));
+ assign(c3, mkU32(0));
+ }
+ assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
+ assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clm";
+}
+
+static HChar *
+s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp b0 = newTemp(Ity_I32);
+ IRTemp b1 = newTemp(Ity_I32);
+ IRTemp b2 = newTemp(Ity_I32);
+ IRTemp b3 = newTemp(Ity_I32);
+ IRTemp c0 = newTemp(Ity_I32);
+ IRTemp c1 = newTemp(Ity_I32);
+ IRTemp c2 = newTemp(Ity_I32);
+ IRTemp c3 = newTemp(Ity_I32);
+ UChar n;
+
+ n = 0;
+ if ((r3 & 8) != 0) {
+ assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
+ assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
+ n = n + 1;
+ } else {
+ assign(b0, mkU32(0));
+ assign(c0, mkU32(0));
+ }
+ if ((r3 & 4) != 0) {
+ assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
+ assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b1, mkU32(0));
+ assign(c1, mkU32(0));
+ }
+ if ((r3 & 2) != 0) {
+ assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
+ assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b2, mkU32(0));
+ assign(c2, mkU32(0));
+ }
+ if ((r3 & 1) != 0) {
+ assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
+ assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b3, mkU32(0));
+ assign(c3, mkU32(0));
+ }
+ assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
+ assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clmy";
+}
+
+static HChar *
+s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp b0 = newTemp(Ity_I32);
+ IRTemp b1 = newTemp(Ity_I32);
+ IRTemp b2 = newTemp(Ity_I32);
+ IRTemp b3 = newTemp(Ity_I32);
+ IRTemp c0 = newTemp(Ity_I32);
+ IRTemp c1 = newTemp(Ity_I32);
+ IRTemp c2 = newTemp(Ity_I32);
+ IRTemp c3 = newTemp(Ity_I32);
+ UChar n;
+
+ n = 0;
+ if ((r3 & 8) != 0) {
+ assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
+ assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
+ n = n + 1;
+ } else {
+ assign(b0, mkU32(0));
+ assign(c0, mkU32(0));
+ }
+ if ((r3 & 4) != 0) {
+ assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
+ assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b1, mkU32(0));
+ assign(c1, mkU32(0));
+ }
+ if ((r3 & 2) != 0) {
+ assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
+ assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b2, mkU32(0));
+ assign(c2, mkU32(0));
+ }
+ if ((r3 & 1) != 0) {
+ assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
+ assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b3, mkU32(0));
+ assign(c3, mkU32(0));
+ }
+ assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
+ assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clmh";
+}
+
+static HChar *
+s390_irgen_CLHHR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, get_gpr_w0(r2));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clhhr";
+}
+
+static HChar *
+s390_irgen_CLHLR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, get_gpr_w1(r2));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clhlr";
+}
+
+static HChar *
+s390_irgen_CLHF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clhf";
+}
+
+static HChar *
+s390_irgen_CLIH(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+
+ return "clih";
+}
+
+static HChar *
+s390_irgen_CPYA(UChar r1, UChar r2)
+{
+ put_ar_w0(r1, get_ar_w0(r2));
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
+
+ return "cpya";
+}
+
+static HChar *
+s390_irgen_XR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ if (r1 == r2) {
+ assign(result, mkU32(0));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
+ }
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "xr";
+}
+
+static HChar *
+s390_irgen_XGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ if (r1 == r2) {
+ assign(result, mkU64(0));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
+ }
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "xgr";
+}
+
+static HChar *
+s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "xrk";
+}
+
+static HChar *
+s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "xgrk";
+}
+
+static HChar *
+s390_irgen_X(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "x";
+}
+
+static HChar *
+s390_irgen_XY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "xy";
+}
+
+static HChar *
+s390_irgen_XG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "xg";
+}
+
+static HChar *
+s390_irgen_XI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "xi";
+}
+
+static HChar *
+s390_irgen_XIY(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "xiy";
+}
+
+static HChar *
+s390_irgen_XIHF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "xihf";
+}
+
+static HChar *
+s390_irgen_XILF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "xilf";
+}
+
+static HChar *
+s390_irgen_EAR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, get_ar_w0(r2));
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
+
+ return "ear";
+}
+
+static HChar *
+s390_irgen_IC(UChar r1, IRTemp op2addr)
+{
+ put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
+
+ return "ic";
+}
+
+static HChar *
+s390_irgen_ICY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
+
+ return "icy";
+}
+
+static HChar *
+s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar n;
+ IRTemp result = newTemp(Ity_I32);
+ UInt mask;
+
+ n = 0;
+ mask = (UInt)r3;
+ if ((mask & 8) != 0) {
+ put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ assign(result, get_gpr_w1(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
+ mkU32(mask)));
+
+ return "icm";
+}
+
+static HChar *
+s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar n;
+ IRTemp result = newTemp(Ity_I32);
+ UInt mask;
+
+ n = 0;
+ mask = (UInt)r3;
+ if ((mask & 8) != 0) {
+ put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ assign(result, get_gpr_w1(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
+ mkU32(mask)));
+
+ return "icmy";
+}
+
+static HChar *
+s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar n;
+ IRTemp result = newTemp(Ity_I32);
+ UInt mask;
+
+ n = 0;
+ mask = (UInt)r3;
+ if ((mask & 8) != 0) {
+ put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ assign(result, get_gpr_w0(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
+ mkU32(mask)));
+
+ return "icmh";
+}
+
+static HChar *
+s390_irgen_IIHF(UChar r1, UInt i2)
+{
+ put_gpr_w0(r1, mkU32(i2));
+
+ return "iihf";
+}
+
+static HChar *
+s390_irgen_IIHH(UChar r1, UShort i2)
+{
+ put_gpr_hw0(r1, mkU16(i2));
+
+ return "iihh";
+}
+
+static HChar *
+s390_irgen_IIHL(UChar r1, UShort i2)
+{
+ put_gpr_hw1(r1, mkU16(i2));
+
+ return "iihl";
+}
+
+static HChar *
+s390_irgen_IILF(UChar r1, UInt i2)
+{
+ put_gpr_w1(r1, mkU32(i2));
+
+ return "iilf";
+}
+
+static HChar *
+s390_irgen_IILH(UChar r1, UShort i2)
+{
+ put_gpr_hw2(r1, mkU16(i2));
+
+ return "iilh";
+}
+
+static HChar *
+s390_irgen_IILL(UChar r1, UShort i2)
+{
+ put_gpr_hw3(r1, mkU16(i2));
+
+ return "iill";
+}
+
+static HChar *
+s390_irgen_LR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, get_gpr_w1(r2));
+
+ return "lr";
+}
+
+static HChar *
+s390_irgen_LGR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, get_gpr_dw0(r2));
+
+ return "lgr";
+}
+
+static HChar *
+s390_irgen_LGFR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
+
+ return "lgfr";
+}
+
+static HChar *
+s390_irgen_L(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
+
+ return "l";
+}
+
+static HChar *
+s390_irgen_LY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
+
+ return "ly";
+}
+
+static HChar *
+s390_irgen_LG(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
+
+ return "lg";
+}
+
+static HChar *
+s390_irgen_LGF(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+
+ return "lgf";
+}
+
+static HChar *
+s390_irgen_LGFI(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
+
+ return "lgfi";
+}
+
+static HChar *
+s390_irgen_LRL(UChar r1, UInt i2)
+{
+ put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+
+ return "lrl";
+}
+
+static HChar *
+s390_irgen_LGRL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+
+ return "lgrl";
+}
+
+static HChar *
+s390_irgen_LGFRL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "lgfrl";
+}
+
+static HChar *
+s390_irgen_LA(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, mkexpr(op2addr));
+
+ return "la";
+}
+
+static HChar *
+s390_irgen_LAY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, mkexpr(op2addr));
+
+ return "lay";
+}
+
+static HChar *
+s390_irgen_LAE(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, mkexpr(op2addr));
+
+ return "lae";
+}
+
+static HChar *
+s390_irgen_LAEY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, mkexpr(op2addr));
+
+ return "laey";
+}
+
+static HChar *
+s390_irgen_LARL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
+
+ return "larl";
+}
+
+static HChar *
+s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_w1(r1, mkexpr(op2));
+
+ return "laa";
+}
+
+static HChar *
+s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_dw0(r1, mkexpr(op2));
+
+ return "laag";
+}
+
+static HChar *
+s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_w1(r1, mkexpr(op2));
+
+ return "laal";
+}
+
+static HChar *
+s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_dw0(r1, mkexpr(op2));
+
+ return "laalg";
+}
+
+static HChar *
+s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_w1(r1, mkexpr(op2));
+
+ return "lan";
+}
+
+static HChar *
+s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_dw0(r1, mkexpr(op2));
+
+ return "lang";
+}
+
+static HChar *
+s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_w1(r1, mkexpr(op2));
+
+ return "lax";
+}
+
+static HChar *
+s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_dw0(r1, mkexpr(op2));
+
+ return "laxg";
+}
+
+static HChar *
+s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_w1(r1, mkexpr(op2));
+
+ return "lao";
+}
+
+static HChar *
+s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_dw0(r1, mkexpr(op2));
+
+ return "laog";
+}
+
+static HChar *
+s390_irgen_LTR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ put_gpr_w1(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "ltr";
+}
+
+static HChar *
+s390_irgen_LTGR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ put_gpr_dw0(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "ltgr";
+}
+
+static HChar *
+s390_irgen_LTGFR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ put_gpr_dw0(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "ltgfr";
+}
+
+static HChar *
+s390_irgen_LT(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ put_gpr_w1(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "lt";
+}
+
+static HChar *
+s390_irgen_LTG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ put_gpr_dw0(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "ltg";
+}
+
+static HChar *
+s390_irgen_LTGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+ put_gpr_dw0(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "ltgf";
+}
+
+static HChar *
+s390_irgen_LBR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
+
+ return "lbr";
+}
+
+static HChar *
+s390_irgen_LGBR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
+
+ return "lgbr";
+}
+
+static HChar *
+s390_irgen_LB(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
+
+ return "lb";
+}
+
+static HChar *
+s390_irgen_LGB(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
+
+ return "lgb";
+}
+
+static HChar *
+s390_irgen_LBH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
+
+ return "lbh";
+}
+
+static HChar *
+s390_irgen_LCR(UChar r1, UChar r2)
+{
+ Int op1;
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ op1 = 0;
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
+ op1)), op2);
+
+ return "lcr";
+}
+
+static HChar *
+s390_irgen_LCGR(UChar r1, UChar r2)
+{
+ Long op1;
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ op1 = 0ULL;
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
+ op1)), op2);
+
+ return "lcgr";
+}
+
+static HChar *
+s390_irgen_LCGFR(UChar r1, UChar r2)
+{
+ Long op1;
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ op1 = 0ULL;
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
+ op1)), op2);
+
+ return "lcgfr";
+}
+
+static HChar *
+s390_irgen_LHR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
+
+ return "lhr";
+}
+
+static HChar *
+s390_irgen_LGHR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
+
+ return "lghr";
+}
+
+static HChar *
+s390_irgen_LH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+
+ return "lh";
+}
+
+static HChar *
+s390_irgen_LHY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+
+ return "lhy";
+}
+
+static HChar *
+s390_irgen_LGH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
+
+ return "lgh";
+}
+
+static HChar *
+s390_irgen_LHI(UChar r1, UShort i2)
+{
+ put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
+
+ return "lhi";
+}
+
+static HChar *
+s390_irgen_LGHI(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
+
+ return "lghi";
+}
+
+static HChar *
+s390_irgen_LHRL(UChar r1, UInt i2)
+{
+ put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "lhrl";
+}
+
+static HChar *
+s390_irgen_LGHRL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "lghrl";
+}
+
+static HChar *
+s390_irgen_LHH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+
+ return "lhh";
+}
+
+static HChar *
+s390_irgen_LFH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
+
+ return "lfh";
+}
+
+static HChar *
+s390_irgen_LLGFR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
+
+ return "llgfr";
+}
+
+static HChar *
+s390_irgen_LLGF(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
+
+ return "llgf";
+}
+
+static HChar *
+s390_irgen_LLGFRL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "llgfrl";
+}
+
+static HChar *
+s390_irgen_LLCR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
+
+ return "llcr";
+}
+
+static HChar *
+s390_irgen_LLGCR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
+
+ return "llgcr";
+}
+
+static HChar *
+s390_irgen_LLC(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
+
+ return "llc";
+}
+
+static HChar *
+s390_irgen_LLGC(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
+
+ return "llgc";
+}
+
+static HChar *
+s390_irgen_LLCH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
+
+ return "llch";
+}
+
+static HChar *
+s390_irgen_LLHR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
+
+ return "llhr";
+}
+
+static HChar *
+s390_irgen_LLGHR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
+
+ return "llghr";
+}
+
+static HChar *
+s390_irgen_LLH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
+
+ return "llh";
+}
+
+static HChar *
+s390_irgen_LLGH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
+
+ return "llgh";
+}
+
+static HChar *
+s390_irgen_LLHRL(UChar r1, UInt i2)
+{
+ put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "llhrl";
+}
+
+static HChar *
+s390_irgen_LLGHRL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "llghrl";
+}
+
+static HChar *
+s390_irgen_LLHH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
+
+ return "llhh";
+}
+
+static HChar *
+s390_irgen_LLIHF(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
+
+ return "llihf";
+}
+
+static HChar *
+s390_irgen_LLIHH(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
+
+ return "llihh";
+}
+
+static HChar *
+s390_irgen_LLIHL(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
+
+ return "llihl";
+}
+
+static HChar *
+s390_irgen_LLILF(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, mkU64(i2));
+
+ return "llilf";
+}
+
+static HChar *
+s390_irgen_LLILH(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
+
+ return "llilh";
+}
+
+static HChar *
+s390_irgen_LLILL(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64(i2));
+
+ return "llill";
+}
+
+static HChar *
+s390_irgen_LLGTR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
+ mkU32(2147483647))));
+
+ return "llgtr";
+}
+
+static HChar *
+s390_irgen_LLGT(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
+ mkexpr(op2addr)), mkU32(2147483647))));
+
+ return "llgt";
+}
+
+static HChar *
+s390_irgen_LNR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
+ binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
+
+ return "lnr";
+}
+
+static HChar *
+s390_irgen_LNGR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
+ binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
+
+ return "lngr";
+}
+
+static HChar *
+s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
+ assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
+ binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
+
+ return "lngfr";
+}
+
+static HChar *
+s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
+{
+ if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
+ guest_IA_next_instr);
+ put_gpr_w1(r1, get_gpr_w1(r2));
+
+ return "locr";
+}
+
+static HChar *
+s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
+{
+ if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
+ guest_IA_next_instr);
+ put_gpr_dw0(r1, get_gpr_dw0(r2));
+
+ return "locgr";
+}
+
+static HChar *
+s390_irgen_LOC(UChar r1, IRTemp op2addr)
+{
+ /* condition is checked in format handler */
+ put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
+
+ return "loc";
+}
+
+static HChar *
+s390_irgen_LOCG(UChar r1, IRTemp op2addr)
+{
+ /* condition is checked in format handler */
+ put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
+
+ return "locg";
+}
+
+static HChar *
+s390_irgen_LPQ(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
+ put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
+ ));
+
+ return "lpq";
+}
+
+static HChar *
+s390_irgen_LPR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
+ binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
+
+ return "lpr";
+}
+
+static HChar *
+s390_irgen_LPGR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
+ binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
+
+ return "lpgr";
+}
+
+static HChar *
+s390_irgen_LPGFR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
+ binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
+
+ return "lpgfr";
+}
+
+static HChar *
+s390_irgen_LRVR(UChar r1, UChar r2)
+{
+ IRTemp b0 = newTemp(Ity_I8);
+ IRTemp b1 = newTemp(Ity_I8);
+ IRTemp b2 = newTemp(Ity_I8);
+ IRTemp b3 = newTemp(Ity_I8);
+
+ assign(b3, get_gpr_b7(r2));
+ assign(b2, get_gpr_b6(r2));
+ assign(b1, get_gpr_b5(r2));
+ assign(b0, get_gpr_b4(r2));
+ put_gpr_b4(r1, mkexpr(b3));
+ put_gpr_b5(r1, mkexpr(b2));
+ put_gpr_b6(r1, mkexpr(b1));
+ put_gpr_b7(r1, mkexpr(b0));
+
+ return "lrvr";
+}
+
+static HChar *
+s390_irgen_LRVGR(UChar r1, UChar r2)
+{
+ IRTemp b0 = newTemp(Ity_I8);
+ IRTemp b1 = newTemp(Ity_I8);
+ IRTemp b2 = newTemp(Ity_I8);
+ IRTemp b3 = newTemp(Ity_I8);
+ IRTemp b4 = newTemp(Ity_I8);
+ IRTemp b5 = newTemp(Ity_I8);
+ IRTemp b6 = newTemp(Ity_I8);
+ IRTemp b7 = newTemp(Ity_I8);
+
+ assign(b7, get_gpr_b7(r2));
+ assign(b6, get_gpr_b6(r2));
+ assign(b5, get_gpr_b5(r2));
+ assign(b4, get_gpr_b4(r2));
+ assign(b3, get_gpr_b3(r2));
+ assign(b2, get_gpr_b2(r2));
+ assign(b1, get_gpr_b1(r2));
+ assign(b0, get_gpr_b0(r2));
+ put_gpr_b0(r1, mkexpr(b7));
+ put_gpr_b1(r1, mkexpr(b6));
+ put_gpr_b2(r1, mkexpr(b5));
+ put_gpr_b3(r1, mkexpr(b4));
+ put_gpr_b4(r1, mkexpr(b3));
+ put_gpr_b5(r1, mkexpr(b2));
+ put_gpr_b6(r1, mkexpr(b1));
+ put_gpr_b7(r1, mkexpr(b0));
+
+ return "lrvgr";
+}
+
+static HChar *
+s390_irgen_LRVH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I16);
+
+ assign(op2, load(Ity_I16, mkexpr(op2addr)));
+ put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
+ put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
+
+ return "lrvh";
+}
+
+static HChar *
+s390_irgen_LRV(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
+ put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
+ mkU8(8)), mkU32(255))));
+ put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
+ mkU8(16)), mkU32(255))));
+ put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
+ mkU8(24)), mkU32(255))));
+
+ return "lrv";
+}
+
+static HChar *
+s390_irgen_LRVG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
+ put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(8)), mkU64(255))));
+ put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(16)), mkU64(255))));
+ put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(24)), mkU64(255))));
+ put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(32)), mkU64(255))));
+ put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(40)), mkU64(255))));
+ put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(48)), mkU64(255))));
+ put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(56)), mkU64(255))));
+
+ return "lrvg";
+}
+
+static HChar *
+s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
+{
+ store(mkexpr(op1addr), mkU16(i2));
+
+ return "mvhhi";
+}
+
+static HChar *
+s390_irgen_MVHI(UShort i2, IRTemp op1addr)
+{
+ store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
+
+ return "mvhi";
+}
+
+static HChar *
+s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
+{
+ store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
+
+ return "mvghi";
+}
+
+static HChar *
+s390_irgen_MVI(UChar i2, IRTemp op1addr)
+{
+ store(mkexpr(op1addr), mkU8(i2));
+
+ return "mvi";
+}
+
+static HChar *
+s390_irgen_MVIY(UChar i2, IRTemp op1addr)
+{
+ store(mkexpr(op1addr), mkU8(i2));
+
+ return "mviy";
+}
+
+static HChar *
+s390_irgen_MR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1 + 1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mr";
+}
+
+static HChar *
+s390_irgen_M(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1 + 1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "m";
+}
+
+static HChar *
+s390_irgen_MFY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1 + 1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mfy";
+}
+
+static HChar *
+s390_irgen_MH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I16);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I16, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
+ ));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mh";
+}
+
+static HChar *
+s390_irgen_MHY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I16);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I16, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
+ ));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mhy";
+}
+
+static HChar *
+s390_irgen_MHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Short op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Short)i2;
+ assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
+ mkU16((UShort)op2))));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mhi";
+}
+
+static HChar *
+s390_irgen_MGHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Short op2;
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Short)i2;
+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
+ mkU16((UShort)op2))));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "mghi";
+}
+
+static HChar *
+s390_irgen_MLR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1 + 1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mlr";
+}
+
+static HChar *
+s390_irgen_MLGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1 + 1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
+
+ return "mlgr";
+}
+
+static HChar *
+s390_irgen_ML(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1 + 1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "ml";
+}
+
+static HChar *
+s390_irgen_MLG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1 + 1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
+
+ return "mlg";
+}
+
+static HChar *
+s390_irgen_MSR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "msr";
+}
+
+static HChar *
+s390_irgen_MSGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "msgr";
+}
+
+static HChar *
+s390_irgen_MSGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
+ ));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "msgfr";
+}
+
+static HChar *
+s390_irgen_MS(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "ms";
+}
+
+static HChar *
+s390_irgen_MSY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "msy";
+}
+
+static HChar *
+s390_irgen_MSG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "msg";
+}
+
+static HChar *
+s390_irgen_MSGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
+ ));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "msgf";
+}
+
+static HChar *
+s390_irgen_MSFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)i2;
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "msfi";
+}
+
+static HChar *
+s390_irgen_MSGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Int op2;
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Int)i2;
+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
+ op2))));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "msgfi";
+}
+
+static HChar *
+s390_irgen_OR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "or";
+}
+
+static HChar *
+s390_irgen_OGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ogr";
+}
+
+static HChar *
+s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ork";
+}
+
+static HChar *
+s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ogrk";
+}
+
+static HChar *
+s390_irgen_O(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "o";
+}
+
+static HChar *
+s390_irgen_OY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "oy";
+}
+
+static HChar *
+s390_irgen_OG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "og";
+}
+
+static HChar *
+s390_irgen_OI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "oi";
+}
+
+static HChar *
+s390_irgen_OIY(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "oiy";
+}
+
+static HChar *
+s390_irgen_OIHF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "oihf";
+}
+
+static HChar *
+s390_irgen_OIHH(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw0(r1, mkexpr(result));
+
+ return "oihh";
+}
+
+static HChar *
+s390_irgen_OIHL(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw1(r1, mkexpr(result));
+
+ return "oihl";
+}
+
+static HChar *
+s390_irgen_OILF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "oilf";
+}
+
+static HChar *
+s390_irgen_OILH(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw2(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw2(r1, mkexpr(result));
+
+ return "oilh";
+}
+
+static HChar *
+s390_irgen_OILL(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw3(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw3(r1, mkexpr(result));
+
+ return "oill";
+}
+
+static HChar *
+s390_irgen_PFD(void)
+{
+
+ return "pfd";
+}
+
+static HChar *
+s390_irgen_PFDRL(void)
+{
+
+ return "pfdrl";
+}
+
+static HChar *
+s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp amount = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
+ assign(op, get_gpr_w1(r3));
+ put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
+ mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
+ binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
+
+ return "rll";
+}
+
+static HChar *
+s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp amount = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I64);
+
+ assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
+ assign(op, get_gpr_dw0(r3));
+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
+ mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
+ binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
+
+ return "rllg";
+}
+
+static HChar *
+s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ UChar from;
+ UChar to;
+ UChar rot;
+ UChar t_bit;
+ ULong mask;
+ ULong maskc;
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ from = i3 & 63;
+ to = i4 & 63;
+ rot = i5 & 63;
+ t_bit = i3 & 128;
+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
+ mkU8(64 - rot))));
+ if (from <= to) {
+ mask = ~0ULL;
+ mask = (mask >> from) & (mask << (63 - to));
+ maskc = ~mask;
+ } else {
+ maskc = ~0ULL;
+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
+ mask = ~maskc;
+ }
+ assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
+ ), mkU64(mask)));
+ if (t_bit == 0) {
+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
+ mkU64(maskc)), mkexpr(result)));
+ }
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+
+ return "rnsbg";
+}
+
+static HChar *
+s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ UChar from;
+ UChar to;
+ UChar rot;
+ UChar t_bit;
+ ULong mask;
+ ULong maskc;
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ from = i3 & 63;
+ to = i4 & 63;
+ rot = i5 & 63;
+ t_bit = i3 & 128;
+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
+ mkU8(64 - rot))));
+ if (from <= to) {
+ mask = ~0ULL;
+ mask = (mask >> from) & (mask << (63 - to));
+ maskc = ~mask;
+ } else {
+ maskc = ~0ULL;
+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
+ mask = ~maskc;
+ }
+ assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
+ ), mkU64(mask)));
+ if (t_bit == 0) {
+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
+ mkU64(maskc)), mkexpr(result)));
+ }
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+
+ return "rxsbg";
+}
+
+static HChar *
+s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ UChar from;
+ UChar to;
+ UChar rot;
+ UChar t_bit;
+ ULong mask;
+ ULong maskc;
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ from = i3 & 63;
+ to = i4 & 63;
+ rot = i5 & 63;
+ t_bit = i3 & 128;
+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
+ mkU8(64 - rot))));
+ if (from <= to) {
+ mask = ~0ULL;
+ mask = (mask >> from) & (mask << (63 - to));
+ maskc = ~mask;
+ } else {
+ maskc = ~0ULL;
+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
+ mask = ~maskc;
+ }
+ assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
+ ), mkU64(mask)));
+ if (t_bit == 0) {
+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
+ mkU64(maskc)), mkexpr(result)));
+ }
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+
+ return "rosbg";
+}
+
+static HChar *
+s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ UChar from;
+ UChar to;
+ UChar rot;
+ UChar z_bit;
+ ULong mask;
+ ULong maskc;
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ from = i3 & 63;
+ to = i4 & 63;
+ rot = i5 & 63;
+ z_bit = i4 & 128;
+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
+ mkU8(64 - rot))));
+ if (from <= to) {
+ mask = ~0ULL;
+ mask = (mask >> from) & (mask << (63 - to));
+ maskc = ~mask;
+ } else {
+ maskc = ~0ULL;
+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
+ mask = ~maskc;
+ }
+ if (z_bit == 0) {
+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
+ mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
+ } else {
+ put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
+ }
+ assign(result, get_gpr_dw0(r1));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "risbg";
+}
+
+static HChar *
+s390_irgen_SAR(UChar r1, UChar r2)
+{
+ put_ar_w0(r1, get_gpr_w1(r2));
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
+
+ return "sar";
+}
+
+static HChar *
+s390_irgen_SLDA(UChar r1, IRTemp op2addr)
+{
+ IRTemp p1 = newTemp(Ity_I64);
+ IRTemp p2 = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ Long sign_mask;
+ IRTemp shift_amount = newTemp(Ity_I64);
+
+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
+ assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
+ ));
+ sign_mask = 1ULL << 63;
+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
+ assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
+ unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
+ binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
+
+ return "slda";
+}
+
+static HChar *
+s390_irgen_SLDL(UChar r1, IRTemp op2addr)
+{
+ IRTemp p1 = newTemp(Ity_I64);
+ IRTemp p2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
+ assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
+ mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "sldl";
+}
+
+static HChar *
+s390_irgen_SLA(UChar r1, IRTemp op2addr)
+{
+ IRTemp uop = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ UInt sign_mask;
+ IRTemp shift_amount = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r1));
+ assign(uop, get_gpr_w1(r1));
+ sign_mask = 2147483648U;
+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
+ assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
+ unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
+ binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
+
+ return "sla";
+}
+
+static HChar *
+s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp uop = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ UInt sign_mask;
+ IRTemp shift_amount = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r3));
+ assign(uop, get_gpr_w1(r3));
+ sign_mask = 2147483648U;
+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
+ assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
+ unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
+ binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
+
+ return "slak";
+}
+
+static HChar *
+s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp uop = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ ULong sign_mask;
+ IRTemp shift_amount = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I64);
+
+ assign(op, get_gpr_dw0(r3));
+ assign(uop, get_gpr_dw0(r3));
+ sign_mask = 9223372036854775808ULL;
+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
+ assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
+ unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
+ binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
+
+ return "slag";
+}
+
+static HChar *
+s390_irgen_SLL(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
+ binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
+
+ return "sll";
+}
+
+static HChar *
+s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
+{
+ put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
+ binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
+
+ return "sllk";
+}
+
+static HChar *
+s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
+ binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
+
+ return "sllg";
+}
+
+static HChar *
+s390_irgen_SRDA(UChar r1, IRTemp op2addr)
+{
+ IRTemp p1 = newTemp(Ity_I64);
+ IRTemp p2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
+ assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
+ mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
+
+ return "srda";
+}
+
+static HChar *
+s390_irgen_SRDL(UChar r1, IRTemp op2addr)
+{
+ IRTemp p1 = newTemp(Ity_I64);
+ IRTemp p2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
+ assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
+ mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "srdl";
+}
+
+static HChar *
+s390_irgen_SRA(UChar r1, IRTemp op2addr)
+{
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r1));
+ assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
+
+ return "sra";
+}
+
+static HChar *
+s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r3));
+ assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
+
+ return "srak";
+}
+
+static HChar *
+s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I64);
+
+ assign(op, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
+
+ return "srag";
+}
+
+static HChar *
+s390_irgen_SRL(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r1));
+ put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+
+ return "srl";
+}
+
+static HChar *
+s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r3));
+ put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+
+ return "srlk";
+}
+
+static HChar *
+s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_I64);
+
+ assign(op, get_gpr_dw0(r3));
+ put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+
+ return "srlg";
+}
+
+static HChar *
+s390_irgen_ST(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_w1(r1));
+
+ return "st";
+}
+
+static HChar *
+s390_irgen_STY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_w1(r1));
+
+ return "sty";
+}
+
+static HChar *
+s390_irgen_STG(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_dw0(r1));
+
+ return "stg";
+}
+
+static HChar *
+s390_irgen_STRL(UChar r1, UInt i2)
+{
+ store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
+ get_gpr_w1(r1));
+
+ return "strl";
+}
+
+static HChar *
+s390_irgen_STGRL(UChar r1, UInt i2)
+{
+ store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
+ get_gpr_dw0(r1));
+
+ return "stgrl";
+}
+
+static HChar *
+s390_irgen_STC(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b7(r1));
+
+ return "stc";
+}
+
+static HChar *
+s390_irgen_STCY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b7(r1));
+
+ return "stcy";
+}
+
+static HChar *
+s390_irgen_STCH(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b3(r1));
+
+ return "stch";
+}
+
+static HChar *
+s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar mask;
+ UChar n;
+
+ mask = (UChar)r3;
+ n = 0;
+ if ((mask & 8) != 0) {
+ store(mkexpr(op2addr), get_gpr_b4(r1));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
+ }
+
+ return "stcm";
+}
+
+static HChar *
+s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar mask;
+ UChar n;
+
+ mask = (UChar)r3;
+ n = 0;
+ if ((mask & 8) != 0) {
+ store(mkexpr(op2addr), get_gpr_b4(r1));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
+ }
+
+ return "stcmy";
+}
+
+static HChar *
+s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar mask;
+ UChar n;
+
+ mask = (UChar)r3;
+ n = 0;
+ if ((mask & 8) != 0) {
+ store(mkexpr(op2addr), get_gpr_b0(r1));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
+ }
+
+ return "stcmh";
+}
+
+static HChar *
+s390_irgen_STH(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_hw3(r1));
+
+ return "sth";
+}
+
+static HChar *
+s390_irgen_STHY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_hw3(r1));
+
+ return "sthy";
+}
+
+static HChar *
+s390_irgen_STHRL(UChar r1, UInt i2)
+{
+ store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
+ get_gpr_hw3(r1));
+
+ return "sthrl";
+}
+
+static HChar *
+s390_irgen_STHH(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_hw1(r1));
+
+ return "sthh";
+}
+
+static HChar *
+s390_irgen_STFH(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_w0(r1));
+
+ return "stfh";
+}
+
+static HChar *
+s390_irgen_STOC(UChar r1, IRTemp op2addr)
+{
+ /* condition is checked in format handler */
+ store(mkexpr(op2addr), get_gpr_w1(r1));
+
+ return "stoc";
+}
+
+static HChar *
+s390_irgen_STOCG(UChar r1, IRTemp op2addr)
+{
+ /* condition is checked in format handler */
+ store(mkexpr(op2addr), get_gpr_dw0(r1));
+
+ return "stocg";
+}
+
+static HChar *
+s390_irgen_STPQ(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_dw0(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
+
+ return "stpq";
+}
+
+static HChar *
+s390_irgen_STRVH(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b7(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
+
+ return "strvh";
+}
+
+static HChar *
+s390_irgen_STRV(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b7(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
+
+ return "strv";
+}
+
+static HChar *
+s390_irgen_STRVG(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b7(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
+
+ return "strvg";
+}
+
+static HChar *
+s390_irgen_SR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "sr";
+}
+
+static HChar *
+s390_irgen_SGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "sgr";
+}
+
+static HChar *
+s390_irgen_SGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "sgfr";
+}
+
+static HChar *
+s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "srk";
+}
+
+static HChar *
+s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "sgrk";
+}
+
+static HChar *
+s390_irgen_S(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "s";
+}
+
+static HChar *
+s390_irgen_SY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "sy";
+}
+
+static HChar *
+s390_irgen_SG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "sg";
+}
+
+static HChar *
+s390_irgen_SGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "sgf";
+}
+
+static HChar *
+s390_irgen_SH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "sh";
+}
+
+static HChar *
+s390_irgen_SHY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "shy";
+}
+
+static HChar *
+s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r1));
+ assign(op3, get_gpr_w0(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "shhhr";
+}
+
+static HChar *
+s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r1));
+ assign(op3, get_gpr_w1(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "shhlr";
+}
+
+static HChar *
+s390_irgen_SLR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "slr";
+}
+
+static HChar *
+s390_irgen_SLGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slgr";
+}
+
+static HChar *
+s390_irgen_SLGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slgfr";
+}
+
+static HChar *
+s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "slrk";
+}
+
+static HChar *
+s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slgrk";
+}
+
+static HChar *
+s390_irgen_SL(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "sl";
+}
+
+static HChar *
+s390_irgen_SLY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "sly";
+}
+
+static HChar *
+s390_irgen_SLG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slg";
+}
+
+static HChar *
+s390_irgen_SLGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slgf";
+}
+
+static HChar *
+s390_irgen_SLFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "slfi";
+}
+
+static HChar *
+s390_irgen_SLGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (ULong)i2;
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
+ mkU64(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slgfi";
+}
+
+static HChar *
+s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r1));
+ assign(op3, get_gpr_w0(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "slhhhr";
+}
+
+static HChar *
+s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r1));
+ assign(op3, get_gpr_w1(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "slhhlr";
+}
+
+static HChar *
+s390_irgen_SLBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp borrow_in = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
+ s390_call_calculate_cc(), mkU8(1))));
+ assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
+ mkexpr(borrow_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "slbr";
+}
+
+static HChar *
+s390_irgen_SLBGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp borrow_in = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
+ binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
+ assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
+ mkexpr(borrow_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slbgr";
+}
+
+static HChar *
+s390_irgen_SLB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp borrow_in = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
+ s390_call_calculate_cc(), mkU8(1))));
+ assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
+ mkexpr(borrow_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "slb";
+}
+
+static HChar *
+s390_irgen_SLBG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp borrow_in = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
+ binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
+ assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
+ mkexpr(borrow_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slbg";
+}
+
+static HChar *
+s390_irgen_SVC(UChar i)
+{
+ IRTemp sysno = newTemp(Ity_I64);
+
+ if (i != 0) {
+ assign(sysno, mkU64(i));
+ } else {
+ assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
+ }
+ system_call(mkexpr(sysno));
+
+ return "svc";
+}
+
+static HChar *
+s390_irgen_TS(IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_I8);
+
+ assign(value, load(Ity_I8, mkexpr(op2addr)));
+ s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value);
+ store(mkexpr(op2addr), mkU8(255));
+
+ return "ts";
+}
+
+static HChar *
+s390_irgen_TM(UChar i2, IRTemp op1addr)
+{
+ UChar mask;
+ IRTemp value = newTemp(Ity_I8);
+
+ mask = i2;
+ assign(value, load(Ity_I8, mkexpr(op1addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
+ mkU8(mask)));
+
+ return "tm";
+}
+
+static HChar *
+s390_irgen_TMY(UChar i2, IRTemp op1addr)
+{
+ UChar mask;
+ IRTemp value = newTemp(Ity_I8);
+
+ mask = i2;
+ assign(value, load(Ity_I8, mkexpr(op1addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
+ mkU8(mask)));
+
+ return "tmy";
+}
+
+static HChar *
+s390_irgen_TMHH(UChar r1, UShort i2)
+{
+ UShort mask;
+ IRTemp value = newTemp(Ity_I16);
+
+ mask = i2;
+ assign(value, get_gpr_hw0(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
+ mkU16(mask)));
+
+ return "tmhh";
+}
+
+static HChar *
+s390_irgen_TMHL(UChar r1, UShort i2)
+{
+ UShort mask;
+ IRTemp value = newTemp(Ity_I16);
+
+ mask = i2;
+ assign(value, get_gpr_hw1(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
+ mkU16(mask)));
+
+ return "tmhl";
+}
+
+static HChar *
+s390_irgen_TMLH(UChar r1, UShort i2)
+{
+ UShort mask;
+ IRTemp value = newTemp(Ity_I16);
+
+ mask = i2;
+ assign(value, get_gpr_hw2(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
+ mkU16(mask)));
+
+ return "tmlh";
+}
+
+static HChar *
+s390_irgen_TMLL(UChar r1, UShort i2)
+{
+ UShort mask;
+ IRTemp value = newTemp(Ity_I16);
+
+ mask = i2;
+ assign(value, get_gpr_hw3(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
+ mkU16(mask)));
+
+ return "tmll";
+}
+
+static HChar *
+s390_irgen_EFPC(UChar r1)
+{
+ put_gpr_w1(r1, get_fpc_w0());
+
+ return "efpc";
+}
+
+static HChar *
+s390_irgen_LER(UChar r1, UChar r2)
+{
+ put_fpr_w0(r1, get_fpr_w0(r2));
+
+ return "ler";
+}
+
+static HChar *
+s390_irgen_LDR(UChar r1, UChar r2)
+{
+ put_fpr_dw0(r1, get_fpr_dw0(r2));
+
+ return "ldr";
+}
+
+static HChar *
+s390_irgen_LXR(UChar r1, UChar r2)
+{
+ put_fpr_dw0(r1, get_fpr_dw0(r2));
+ put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
+
+ return "lxr";
+}
+
+static HChar *
+s390_irgen_LE(UChar r1, IRTemp op2addr)
+{
+ put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
+
+ return "le";
+}
+
+static HChar *
+s390_irgen_LD(UChar r1, IRTemp op2addr)
+{
+ put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
+
+ return "ld";
+}
+
+static HChar *
+s390_irgen_LEY(UChar r1, IRTemp op2addr)
+{
+ put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
+
+ return "ley";
+}
+
+static HChar *
+s390_irgen_LDY(UChar r1, IRTemp op2addr)
+{
+ put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
+
+ return "ldy";
+}
+
+static HChar *
+s390_irgen_LFPC(IRTemp op2addr)
+{
+ put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
+
+ return "lfpc";
+}
+
+static HChar *
+s390_irgen_LZER(UChar r1)
+{
+ put_fpr_w0(r1, mkF32i(0x0));
+
+ return "lzer";
+}
+
+static HChar *
+s390_irgen_LZDR(UChar r1)
+{
+ put_fpr_dw0(r1, mkF64i(0x0));
+
+ return "lzdr";
+}
+
+static HChar *
+s390_irgen_LZXR(UChar r1)
+{
+ put_fpr_dw0(r1, mkF64i(0x0));
+ put_fpr_dw0(r1 + 2, mkF64i(0x0));
+
+ return "lzxr";
+}
+
+static HChar *
+s390_irgen_SRNM(IRTemp op2addr)
+{
+ UInt mask;
+
+ mask = 3;
+ put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
+ binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
+ );
+
+ return "srnm";
+}
+
+static HChar *
+s390_irgen_SFPC(UChar r1)
+{
+ put_fpc_w0(get_gpr_w1(r1));
+
+ return "sfpc";
+}
+
+static HChar *
+s390_irgen_STE(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_fpr_w0(r1));
+
+ return "ste";
+}
+
+static HChar *
+s390_irgen_STD(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_fpr_dw0(r1));
+
+ return "std";
+}
+
+static HChar *
+s390_irgen_STEY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_fpr_w0(r1));
+
+ return "stey";
+}
+
+static HChar *
+s390_irgen_STDY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_fpr_dw0(r1));
+
+ return "stdy";
+}
+
+static HChar *
+s390_irgen_STFPC(IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_fpc_w0());
+
+ return "stfpc";
+}
+
+static HChar *
+s390_irgen_AEBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, get_fpr_w0(r2));
+ assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "aebr";
+}
+
+static HChar *
+s390_irgen_ADBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, get_fpr_dw0(r2));
+ assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "adbr";
+}
+
+static HChar *
+s390_irgen_AEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, load(Ity_F32, mkexpr(op2addr)));
+ assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "aeb";
+}
+
+static HChar *
+s390_irgen_ADB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, load(Ity_F64, mkexpr(op2addr)));
+ assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "adb";
+}
+
+static HChar *
+s390_irgen_CEFBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
+
+ return "cefbr";
+}
+
+static HChar *
+s390_irgen_CDFBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
+
+ return "cdfbr";
+}
+
+static HChar *
+s390_irgen_CEGBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
+
+ return "cegbr";
+}
+
+static HChar *
+s390_irgen_CDGBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
+
+ return "cdgbr";
+}
+
+static HChar *
+s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op, get_fpr_w0(r2));
+ assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
+
+ return "cfebr";
+}
+
+static HChar *
+s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op, get_fpr_dw0(r2));
+ assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
+
+ return "cfdbr";
+}
+
+static HChar *
+s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op, get_fpr_w0(r2));
+ assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
+
+ return "cgebr";
+}
+
+static HChar *
+s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op, get_fpr_dw0(r2));
+ assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
+
+ return "cgdbr";
+}
+
+static HChar *
+s390_irgen_DEBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, get_fpr_w0(r2));
+ assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "debr";
+}
+
+static HChar *
+s390_irgen_DDBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, get_fpr_dw0(r2));
+ assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "ddbr";
+}
+
+static HChar *
+s390_irgen_DEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, load(Ity_F32, mkexpr(op2addr)));
+ assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "deb";
+}
+
+static HChar *
+s390_irgen_DDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, load(Ity_F64, mkexpr(op2addr)));
+ assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "ddb";
+}
+
+static HChar *
+s390_irgen_LTEBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, get_fpr_w0(r2));
+ put_fpr_w0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+
+ return "ltebr";
+}
+
+static HChar *
+s390_irgen_LTDBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, get_fpr_dw0(r2));
+ put_fpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+
+ return "ltdbr";
+}
+
+static HChar *
+s390_irgen_LCEBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
+ put_fpr_w0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+
+ return "lcebr";
+}
+
+static HChar *
+s390_irgen_LCDBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+
+ return "lcdbr";
+}
+
+static HChar *
+s390_irgen_LDEBR(UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F32);
+
+ assign(op, get_fpr_w0(r2));
+ put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
+
+ return "ldebr";
+}
+
+static HChar *
+s390_irgen_LDEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_F32);
+
+ assign(op, load(Ity_F32, mkexpr(op2addr)));
+ put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
+
+ return "ldeb";
+}
+
+static HChar *
+s390_irgen_LEDBR(UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F64);
+
+ assign(op, get_fpr_dw0(r2));
+ put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
+
+ return "ledbr";
+}
+
+static HChar *
+s390_irgen_MEEBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, get_fpr_w0(r2));
+ assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "meebr";
+}
+
+static HChar *
+s390_irgen_MDBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, get_fpr_dw0(r2));
+ assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "mdbr";
+}
+
+static HChar *
+s390_irgen_MEEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, load(Ity_F32, mkexpr(op2addr)));
+ assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "meeb";
+}
+
+static HChar *
+s390_irgen_MDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, load(Ity_F64, mkexpr(op2addr)));
+ assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "mdb";
+}
+
+static HChar *
+s390_irgen_SEBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, get_fpr_w0(r2));
+ assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "sebr";
+}
+
+static HChar *
+s390_irgen_SDBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, get_fpr_dw0(r2));
+ assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "sdbr";
+}
+
+static HChar *
+s390_irgen_SEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, load(Ity_F32, mkexpr(op2addr)));
+ assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "seb";
+}
+
+static HChar *
+s390_irgen_SDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, load(Ity_F64, mkexpr(op2addr)));
+ assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "sdb";
+}
+
+
+static HChar *
+s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
+{
+ IRTemp current1 = newTemp(Ity_I8);
+ IRTemp current2 = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I64);
+
+ assign(counter, get_counter_dw0());
+ put_counter_dw0(mkU64(0));
+
+ assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
+ mkexpr(counter))));
+ assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
+ mkexpr(counter))));
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
+ False);
+
+ /* Both fields differ ? */
+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
+ guest_IA_next_instr);
+
+ /* Check for end of field */
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
+ guest_IA_curr_instr);
+ put_counter_dw0(mkU64(0));
+
+ return "clc";
+}
+
+static HChar *
+s390_irgen_CLCL(UChar r1, UChar r2)
+{
+ IRTemp addr1 = newTemp(Ity_I64);
+ IRTemp addr2 = newTemp(Ity_I64);
+ IRTemp addr1_load = newTemp(Ity_I64);
+ IRTemp addr2_load = newTemp(Ity_I64);
+ IRTemp len1 = newTemp(Ity_I32);
+ IRTemp len2 = newTemp(Ity_I32);
+ IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
+ IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
+ IRTemp single1 = newTemp(Ity_I8);
+ IRTemp single2 = newTemp(Ity_I8);
+ IRTemp pad = newTemp(Ity_I8);
+
+ assign(addr1, get_gpr_dw0(r1));
+ assign(r1p1, get_gpr_w1(r1 + 1));
+ assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
+ assign(addr2, get_gpr_dw0(r2));
+ assign(r2p1, get_gpr_w1(r2 + 1));
+ assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
+ assign(pad, get_gpr_b4(r2 + 1));
+
+ /* len1 == 0 and len2 == 0? Exit */
+ s390_cc_set(0);
+ if_condition_goto(binop(Iop_CmpEQ32, binop(Iop_Or32, mkexpr(len1),
+ mkexpr(len2)), mkU32(0)),
+ guest_IA_next_instr);
+
+ /* Because mkite evaluates both the then-clause and the else-clause
+ we cannot load directly from addr1 here. If len1 is 0, then adddr1
+ may be NULL and loading from there would segfault. So we provide a
+ valid dummy address in that case. Loading from there does no harm and
+ the value will be discarded at runtime. */
+ assign(addr1_load,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
+ mkU64(guest_IA_curr_instr), mkexpr(addr1)));
+ assign(single1,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
+ mkexpr(pad), load(Ity_I8, mkexpr(addr1_load))));
+
+ assign(addr2_load,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
+ mkU64(guest_IA_curr_instr), mkexpr(addr2)));
+ assign(single2,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
+ mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
+
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single2, False);
+ /* Fields differ ? */
+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single2)),
+ guest_IA_next_instr);
+
+ /* Update len1 and addr1, unless len1 == 0. */
+ put_gpr_dw0(r1,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
+ mkexpr(addr1),
+ binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
+
+ /* When updating len1 we must not modify bits (r1+1)[0:39] */
+ put_gpr_w1(r1 + 1,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
+ binop(Iop_And32, mkexpr(r1p1), mkU32(0xFF000000u)),
+ binop(Iop_Sub32, mkexpr(r1p1), mkU32(1))));
+
+ /* Update len2 and addr2, unless len2 == 0. */
+ put_gpr_dw0(r2,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
+ mkexpr(addr2),
+ binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
+
+ /* When updating len2 we must not modify bits (r2+1)[0:39] */
+ put_gpr_w1(r2 + 1,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
+ binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
+ binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
+
+ always_goto_and_chase(guest_IA_curr_instr);
+
+ return "clcl";
+}
+
+static HChar *
+s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
+{
+ IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
+
+ addr1 = newTemp(Ity_I64);
+ addr3 = newTemp(Ity_I64);
+ addr1_load = newTemp(Ity_I64);
+ addr3_load = newTemp(Ity_I64);
+ len1 = newTemp(Ity_I64);
+ len3 = newTemp(Ity_I64);
+ single1 = newTemp(Ity_I8);
+ single3 = newTemp(Ity_I8);
+
+ assign(addr1, get_gpr_dw0(r1));
+ assign(len1, get_gpr_dw0(r1 + 1));
+ assign(addr3, get_gpr_dw0(r3));
+ assign(len3, get_gpr_dw0(r3 + 1));
+
+ /* len1 == 0 and len3 == 0? Exit */
+ s390_cc_set(0);
+ if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
+ mkexpr(len3)), mkU64(0)),
+ guest_IA_next_instr);
+
+ /* A mux requires both ways to be possible. This is a way to prevent clcle
+ from reading from addr1 if it should read from the pad. Since the pad
+ has no address, just read from the instruction, we discard that anyway */
+ assign(addr1_load,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
+ mkU64(guest_IA_curr_instr), mkexpr(addr1)));
+
+ /* same for addr3 */
+ assign(addr3_load,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
+ mkU64(guest_IA_curr_instr), mkexpr(addr3)));
+
+ assign(single1,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
+ unop(Iop_64to8, mkexpr(pad2)),
+ load(Ity_I8, mkexpr(addr1_load))));
+
+ assign(single3,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
+ unop(Iop_64to8, mkexpr(pad2)),
+ load(Ity_I8, mkexpr(addr3_load))));
+
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
+ /* Both fields differ ? */
+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
+ guest_IA_next_instr);
+
+ /* If a length in 0 we must not change this length and the address */
+ put_gpr_dw0(r1,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
+ mkexpr(addr1),
+ binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
+
+ put_gpr_dw0(r1 + 1,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
+ mkU64(0), binop(Iop_Sub64, mkexpr(len1), mkU64(1))));
+
+ put_gpr_dw0(r3,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
+ mkexpr(addr3),
+ binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
+
+ put_gpr_dw0(r3 + 1,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
+ mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
+
+ /* The architecture requires that we exit with CC3 after a machine specific
+ amount of bytes. We do that if len1+len3 % 4096 == 0 */
+ s390_cc_set(3);
+ if_condition_goto(binop(Iop_CmpEQ64,
+ binop(Iop_And64,
+ binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
+ mkU64(0xfff)),
+ mkU64(0)),
+ guest_IA_next_instr);
+
+ always_goto_and_chase(guest_IA_curr_instr);
+
+ return "clcle";
+}
+
+static void
+s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
+{
+ IRTemp old1 = newTemp(Ity_I8);
+ IRTemp old2 = newTemp(Ity_I8);
+ IRTemp new1 = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I32);
+ IRTemp addr1 = newTemp(Ity_I64);
+
+ assign(counter, get_counter_w0());
+
+ assign(addr1, binop(Iop_Add64, mkexpr(start1),
+ unop(Iop_32Uto64, mkexpr(counter))));
+
+ assign(old1, load(Ity_I8, mkexpr(addr1)));
+ assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
+ unop(Iop_32Uto64,mkexpr(counter)))));
+ assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
+
+ store(mkexpr(addr1),
+ mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
+ mkU8(0), mkexpr(new1)));
+ put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
+ get_counter_w1()));
+
+ /* Check for end of field */
+ put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
+ guest_IA_curr_instr);
+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
+ False);
+ put_counter_dw0(mkU64(0));
+}
+
+
+static void
+s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
+{
+ IRTemp current1 = newTemp(Ity_I8);
+ IRTemp current2 = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I64);
+
+ assign(counter, get_counter_dw0());
+ put_counter_dw0(mkU64(0));
+
+ assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
+ mkexpr(counter))));
+ assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
+ mkexpr(counter))));
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
+ False);
+
+ /* Both fields differ ? */
+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
+ guest_IA_next_instr);
+
+ /* Check for end of field */
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
+ guest_IA_curr_instr);
+ put_counter_dw0(mkU64(0));
+}
+
+static void
+s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
+{
+ IRTemp counter = newTemp(Ity_I64);
+
+ assign(counter, get_counter_dw0());
+
+ store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
+ load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
+
+ /* Check for end of field */
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
+ guest_IA_curr_instr);
+ put_counter_dw0(mkU64(0));
+}
+
+
+
+static void
+s390_irgen_EX_SS(UChar r, IRTemp addr2,
+void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
+{
+ struct SS {
+ unsigned int op : 8;
+ unsigned int l : 8;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ };
+ union {
+ struct SS dec;
+ unsigned long bytes;
+ } ss;
+ IRTemp cond;
+ IRDirty *d;
+ IRTemp torun;
+
+ IRTemp start1 = newTemp(Ity_I64);
+ IRTemp start2 = newTemp(Ity_I64);
+ IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
+ cond = newTemp(Ity_I1);
+ torun = newTemp(Ity_I64);
+
+ assign(torun, load(Ity_I64, mkexpr(addr2)));
+ /* Start with a check that the saved code is still correct */
+ assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
+ /* If not, save the new value */
+ d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
+ mkIRExprVec_1(mkexpr(torun)));
+ d->guard = mkexpr(cond);
+ stmt(IRStmt_Dirty(d));
+
+ /* and restart */
+ stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
+ stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
+ stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
+ IRConst_U64(guest_IA_curr_instr)));
+
+ ss.bytes = last_execute_target;
+ assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
+ ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
+ assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
+ ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
+ assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
+ r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
+ irgen(len, start1, start2);
+ last_execute_target = 0;
+}
+
+static HChar *
+s390_irgen_EX(UChar r1, IRTemp addr2)
+{
+ switch(last_execute_target & 0xff00000000000000ULL) {
+ case 0:
+ {
+ /* no code information yet */
+ IRDirty *d;
+
+ /* so safe the code... */
+ d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
+ mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
+ stmt(IRStmt_Dirty(d));
+ /* and restart */
+ stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
+ stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
+ stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
+ IRConst_U64(guest_IA_curr_instr)));
+ /* we know that this will be invalidated */
+ irsb->next = mkU64(guest_IA_next_instr);
+ dis_res->whatNext = Dis_StopHere;
+ break;
+ }
+
+ case 0xd200000000000000ULL:
+ /* special case MVC */
+ s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
+ return "mvc via ex";
+
+ case 0xd500000000000000ULL:
+ /* special case CLC */
+ s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
+ return "clc via ex";
+
+ case 0xd700000000000000ULL:
+ /* special case XC */
+ s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
+ return "xc via ex";
+
+
+ default:
+ {
+ /* everything else will get a self checking prefix that also checks the
+ register content */
+ IRDirty *d;
+ UChar *bytes;
+ IRTemp cond;
+ IRTemp orperand;
+ IRTemp torun;
+
+ cond = newTemp(Ity_I1);
+ orperand = newTemp(Ity_I64);
+ torun = newTemp(Ity_I64);
+
+ if (r1 == 0)
+ assign(orperand, mkU64(0));
+ else
+ assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
+ /* This code is going to be translated */
+ assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
+ binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
+
+ /* Start with a check that saved code is still correct */
+ assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
+ mkU64(last_execute_target)));
+ /* If not, save the new value */
+ d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
+ mkIRExprVec_1(mkexpr(torun)));
+ d->guard = mkexpr(cond);
+ stmt(IRStmt_Dirty(d));
+
+ /* and restart */
+ stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
+ stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
+ stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
+ IRConst_U64(guest_IA_curr_instr)));
+
+ /* Now comes the actual translation */
+ bytes = (UChar *) &last_execute_target;
+ s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
+ dis_res);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ vex_printf(" which was executed by\n");
+ /* dont make useless translations in the next execute */
+ last_execute_target = 0;
+ }
+ }
+ return "ex";
+}
+
+static HChar *
+s390_irgen_EXRL(UChar r1, UInt offset)
+{
+ IRTemp addr = newTemp(Ity_I64);
+ /* we might save one round trip because we know the target */
+ if (!last_execute_target)
+ last_execute_target = *(ULong *)(HWord)
+ (guest_IA_curr_instr + offset * 2UL);
+ assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
+ s390_irgen_EX(r1, addr);
+ return "exrl";
+}
+
+static HChar *
+s390_irgen_IPM(UChar r1)
+{
+ // As long as we dont support SPM, lets just assume 0 as program mask
+ put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
+ binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
+
+ return "ipm";
+}
+
+
+static HChar *
+s390_irgen_SRST(UChar r1, UChar r2)
+{
+ IRTemp address = newTemp(Ity_I64);
+ IRTemp next = newTemp(Ity_I64);
+ IRTemp delim = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I64);
+ IRTemp byte = newTemp(Ity_I8);
+
+ assign(address, get_gpr_dw0(r2));
+ assign(next, get_gpr_dw0(r1));
+
+ assign(counter, get_counter_dw0());
+ put_counter_dw0(mkU64(0));
+
+ // start = next? CC=2 and out r1 and r2 unchanged
+ s390_cc_set(2);
+ put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
+ if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
+ guest_IA_next_instr);
+
+ assign(byte, load(Ity_I8, mkexpr(address)));
+ assign(delim, get_gpr_b7(0));
+
+ // byte = delim? CC=1, R1=address
+ s390_cc_set(1);
+ put_gpr_dw0(r1, mkexpr(address));
+ if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
+ guest_IA_next_instr);
+
+ // else: all equal, no end yet, loop
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ put_gpr_dw0(r1, mkexpr(next));
+ put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
+ stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
+ Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
+ // >= 256 bytes done CC=3
+ s390_cc_set(3);
+ put_counter_dw0(mkU64(0));
+
+ return "srst";
+}
+
+static HChar *
+s390_irgen_CLST(UChar r1, UChar r2)
+{
+ IRTemp address1 = newTemp(Ity_I64);
+ IRTemp address2 = newTemp(Ity_I64);
+ IRTemp end = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I64);
+ IRTemp byte1 = newTemp(Ity_I8);
+ IRTemp byte2 = newTemp(Ity_I8);
+
+ assign(address1, get_gpr_dw0(r1));
+ assign(address2, get_gpr_dw0(r2));
+ assign(end, get_gpr_b7(0));
+ assign(counter, get_counter_dw0());
+ put_counter_dw0(mkU64(0));
+ assign(byte1, load(Ity_I8, mkexpr(address1)));
+ assign(byte2, load(Ity_I8, mkexpr(address2)));
+
+ // end in both? all equal, reset r1 and r2 to start values
+ s390_cc_set(0);
+ put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
+ put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
+ if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
+ binop(Iop_Or8,
+ binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
+ binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
+ guest_IA_next_instr);
+
+ put_gpr_dw0(r1, mkexpr(address1));
+ put_gpr_dw0(r2, mkexpr(address2));
+
+ // End found in string1
+ s390_cc_set(1);
+ if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
+ guest_IA_next_instr);
+
+ // End found in string2
+ s390_cc_set(2);
+ if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
+ guest_IA_next_instr);
+
+ // string1 < string2
+ s390_cc_set(1);
+ if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
+ unop(Iop_8Uto32, mkexpr(byte2))),
+ guest_IA_next_instr);
+
+ // string2 < string1
+ s390_cc_set(2);
+ if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
+ unop(Iop_8Uto32, mkexpr(byte1))),
+ guest_IA_next_instr);
+
+ // else: all equal, no end yet, loop
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
+ put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
+ stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
+ Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
+ // >= 256 bytes done CC=3
+ s390_cc_set(3);
+ put_counter_dw0(mkU64(0));
+
+ return "clst";
+}
+
+static void
+s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while (reg != (r3 + 1));
+}
+
+static HChar *
+s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_load_multiple_32bit(r1, r3, op2addr);
+
+ return "lm";
+}
+
+static HChar *
+s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_load_multiple_32bit(r1, r3, op2addr);
+
+ return "lmy";
+}
+
+static HChar *
+s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while (reg != (r3 + 1));
+
+ return "lmh";
+}
+
+static HChar *
+s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
+ reg++;
+ } while (reg != (r3 + 1));
+
+ return "lmg";
+}
+
+static void
+s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ store(mkexpr(addr), get_gpr_w1(reg));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while( reg != (r3 + 1));
+}
+
+static HChar *
+s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_store_multiple_32bit(r1, r3, op2addr);
+
+ return "stm";
+}
+
+static HChar *
+s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_store_multiple_32bit(r1, r3, op2addr);
+
+ return "stmy";
+}
+
+static HChar *
+s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ store(mkexpr(addr), get_gpr_w0(reg));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while( reg != (r3 + 1));
+
+ return "stmh";
+}
+
+static HChar *
+s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ store(mkexpr(addr), get_gpr_dw0(reg));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
+ reg++;
+ } while( reg != (r3 + 1));
+
+ return "stmg";
+}
+
+static void
+s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2)
+{
+ IRTemp old1 = newTemp(Ity_I8);
+ IRTemp old2 = newTemp(Ity_I8);
+ IRTemp new1 = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I32);
+ IRTemp addr1 = newTemp(Ity_I64);
+
+ assign(counter, get_counter_w0());
+
+ assign(addr1, binop(Iop_Add64, mkexpr(start1),
+ unop(Iop_32Uto64, mkexpr(counter))));
+
+ assign(old1, load(Ity_I8, mkexpr(addr1)));
+ assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
+ unop(Iop_32Uto64,mkexpr(counter)))));
+ assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
+
+ /* Special case: xc is used to zero memory */
+ if (op == Iop_Xor8) {
+ store(mkexpr(addr1),
+ mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
+ mkU8(0), mkexpr(new1)));
+ } else
+ store(mkexpr(addr1), mkexpr(new1));
+ put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
+ get_counter_w1()));
+
+ /* Check for end of field */
+ put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
+ guest_IA_curr_instr);
+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
+ False);
+ put_counter_dw0(mkU64(0));
+}
+
+static HChar *
+s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
+{
+ s390_irgen_XONC(Iop_Xor8, length, start1, start2);
+
+ return "xc";
+}
+
+static void
+s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
+{
+ IRTemp counter = newTemp(Ity_I32);
+ IRTemp start = newTemp(Ity_I64);
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(start,
+ binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
+
+ if (length < 8) {
+ UInt i;
+
+ for (i = 0; i <= length; ++i) {
+ store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
+ }
+ } else {
+ assign(counter, get_counter_w0());
+
+ assign(addr, binop(Iop_Add64, mkexpr(start),
+ unop(Iop_32Uto64, mkexpr(counter))));
+
+ store(mkexpr(addr), mkU8(0));
+
+ /* Check for end of field */
+ put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
+ guest_IA_curr_instr);
+
+ /* Reset counter */
+ put_counter_dw0(mkU64(0));
+ }
+
+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
+}
+
+static HChar *
+s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
+{
+ s390_irgen_XONC(Iop_And8, length, start1, start2);
+
+ return "nc";
+}
+
+static HChar *
+s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
+{
+ s390_irgen_XONC(Iop_Or8, length, start1, start2);
+
+ return "oc";
+}
+
+
+static HChar *
+s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
+{
+ IRTemp counter = newTemp(Ity_I64);
+
+ assign(counter, get_counter_dw0());
+
+ store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
+ load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
+
+ /* Check for end of field */
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
+ guest_IA_curr_instr);
+ put_counter_dw0(mkU64(0));
+
+ return "mvc";
+}
+
+static HChar *
+s390_irgen_MVCL(UChar r1, UChar r2)
+{
+ IRTemp addr1 = newTemp(Ity_I64);
+ IRTemp addr2 = newTemp(Ity_I64);
+ IRTemp addr2_load = newTemp(Ity_I64);
+ IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
+ IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
+ IRTemp len1 = newTemp(Ity_I32);
+ IRTemp len2 = newTemp(Ity_I32);
+ IRTemp pad = newTemp(Ity_I8);
+ IRTemp single = newTemp(Ity_I8);
+
+ assign(addr1, get_gpr_dw0(r1));
+ assign(r1p1, get_gpr_w1(r1 + 1));
+ assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
+ assign(addr2, get_gpr_dw0(r2));
+ assign(r2p1, get_gpr_w1(r2 + 1));
+ assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
+ assign(pad, get_gpr_b4(r2 + 1));
+
+ /* len1 == 0 ? */
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
+ if_condition_goto(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
+ guest_IA_next_instr);
+
+ /* Check for destructive overlap:
+ addr1 > addr2 && addr2 + len1 > addr1 && (addr2 + len2) > addr1 */
+ s390_cc_set(3);
+ IRTemp cond1 = newTemp(Ity_I32);
+ assign(cond1, unop(Iop_1Uto32,
+ binop(Iop_CmpLT64U, mkexpr(addr2), mkexpr(addr1))));
+ IRTemp cond2 = newTemp(Ity_I32);
+ assign(cond2, unop(Iop_1Uto32,
+ binop(Iop_CmpLT64U, mkexpr(addr1),
+ binop(Iop_Add64, mkexpr(addr2),
+ unop(Iop_32Uto64, mkexpr(len1))))));
+ IRTemp cond3 = newTemp(Ity_I32);
+ assign(cond3, unop(Iop_1Uto32,
+ binop(Iop_CmpLT64U,
+ mkexpr(addr1),
+ binop(Iop_Add64, mkexpr(addr2),
+ unop(Iop_32Uto64, mkexpr(len2))))));
+
+ if_condition_goto(binop(Iop_CmpEQ32,
+ binop(Iop_And32,
+ binop(Iop_And32, mkexpr(cond1), mkexpr(cond2)),
+ mkexpr(cond3)),
+ mkU32(1)),
+ guest_IA_next_instr);
+
+ /* See s390_irgen_CLCL for explanation why we cannot load directly
+ and need two steps. */
+ assign(addr2_load,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
+ mkU64(guest_IA_curr_instr), mkexpr(addr2)));
+ assign(single,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
+ mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
+
+ store(mkexpr(addr1), mkexpr(single));
+
+ /* Update addr1 and len1 */
+ put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
+ put_gpr_w1(r1 + 1, binop(Iop_Sub32, mkexpr(r1p1), mkU32(1)));
+
+ /* Update addr2 and len2 */
+ put_gpr_dw0(r2,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
+ mkexpr(addr2),
+ binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
+
+ /* When updating len2 we must not modify bits (r2+1)[0:39] */
+ put_gpr_w1(r2 + 1,
+ mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
+ binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
+ binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
+
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(len1), mkU32(1)),
+ guest_IA_curr_instr);
+
+ return "mvcl";
+}
+
+
+static HChar *
+s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
+{
+ IRTemp addr1, addr3, addr3_load, len1, len3, single;
+
+ addr1 = newTemp(Ity_I64);
+ addr3 = newTemp(Ity_I64);
+ addr3_load = newTemp(Ity_I64);
+ len1 = newTemp(Ity_I64);
+ len3 = newTemp(Ity_I64);
+ single = newTemp(Ity_I8);
+
+ assign(addr1, get_gpr_dw0(r1));
+ assign(len1, get_gpr_dw0(r1 + 1));
+ assign(addr3, get_gpr_dw0(r3));
+ assign(len3, get_gpr_dw0(r3 + 1));
+
+ // len1 == 0 ?
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
+ if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
+ guest_IA_next_instr);
+
+ /* This is a hack to prevent mvcle from reading from addr3 if it
+ should read from the pad. Since the pad has no address, just
+ read from the instruction, we discard that anyway */
+ assign(addr3_load,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
+ mkU64(guest_IA_curr_instr), mkexpr(addr3)));
+
+ assign(single,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
+ unop(Iop_64to8, mkexpr(pad2)),
+ load(Ity_I8, mkexpr(addr3_load))));
+ store(mkexpr(addr1), mkexpr(single));
+
+ put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
+
+ put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
+
+ put_gpr_dw0(r3,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
+ mkexpr(addr3),
+ binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
+
+ put_gpr_dw0(r3 + 1,
+ mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
+ mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
+
+ /* We should set CC=3 (faked by overflow add) and leave after
+ a maximum of ~4096 bytes have been processed. This is simpler:
+ we leave whenever (len1 % 4096) == 0 */
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
+ mktemp(Ity_I64, mkU64(-1ULL)), False);
+ if_condition_goto(binop(Iop_CmpEQ64,
+ binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
+ mkU64(0)),
+ guest_IA_next_instr);
+
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
+ guest_IA_curr_instr);
+
+ return "mvcle";
+}
+
+static HChar *
+s390_irgen_MVST(UChar r1, UChar r2)
+{
+ IRTemp addr1 = newTemp(Ity_I64);
+ IRTemp addr2 = newTemp(Ity_I64);
+ IRTemp end = newTemp(Ity_I8);
+ IRTemp byte = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I64);
+
+ assign(addr1, get_gpr_dw0(r1));
+ assign(addr2, get_gpr_dw0(r2));
+ assign(counter, get_counter_dw0());
+ assign(end, get_gpr_b7(0));
+ assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
+ store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
+
+ // We use unlimited as cpu-determined number
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
+ guest_IA_curr_instr);
+
+ // and always set cc=1 at the end + update r1
+ s390_cc_set(1);
+ put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
+ put_counter_dw0(mkU64(0));
+
+ return "mvst";
+}
+
+static void
+s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, binop(Iop_32HLto64,
+ get_gpr_w1(r1), // high 32 bits
+ get_gpr_w1(r1 + 1))); // low 32 bits
+ assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
+}
+
+static void
+s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
+{
+ IRTemp op1 = newTemp(Ity_I128);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, binop(Iop_64HLto128,
+ get_gpr_dw0(r1), // high 64 bits
+ get_gpr_dw0(r1 + 1))); // low 64 bits
+ assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
+}
+
+static void
+s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1 + 1));
+ assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
+}
+
+static HChar *
+s390_irgen_DR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+
+ s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
+
+ return "dr";
+}
+
+static HChar *
+s390_irgen_D(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+
+ s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
+
+ return "d";
+}
+
+static HChar *
+s390_irgen_DLR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+
+ s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
+
+ return "dr";
+}
+
+static HChar *
+s390_irgen_DL(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+
+ s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
+
+ return "dl";
+}
+
+static HChar *
+s390_irgen_DLG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+
+ s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
+
+ return "dlg";
+}
+
+static HChar *
+s390_irgen_DLGR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+
+ s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
+
+ return "dlgr";
+}
+
+static HChar *
+s390_irgen_DSGR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+
+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
+
+ return "dsgr";
+}
+
+static HChar *
+s390_irgen_DSG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+
+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
+
+ return "dsg";
+}
+
+static HChar *
+s390_irgen_DSGFR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+
+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
+
+ return "dsgfr";
+}
+
+static HChar *
+s390_irgen_DSGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+
+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
+
+ return "dsgf";
+}
+
+static void
+s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while (reg != (r3 + 1));
+}
+
+static HChar *
+s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_load_ar_multiple(r1, r3, op2addr);
+
+ return "lam";
+}
+
+static HChar *
+s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_load_ar_multiple(r1, r3, op2addr);
+
+ return "lamy";
+}
+
+static void
+s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ store(mkexpr(addr), get_ar_w0(reg));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while (reg != (r3 + 1));
+}
+
+static HChar *
+s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_store_ar_multiple(r1, r3, op2addr);
+
+ return "stam";
+}
+
+static HChar *
+s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_store_ar_multiple(r1, r3, op2addr);
+
+ return "stamy";
+}
+
+
+/* Implementation for 32-bit compare-and-swap */
+static void
+s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRCAS *cas;
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp old_mem = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp nequal = newTemp(Ity_I1);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op3, get_gpr_w1(r3));
+
+ /* The first and second operands are compared. If they are equal,
+ the third operand is stored at the second- operand location. */
+ cas = mkIRCAS(IRTemp_INVALID, old_mem,
+ Iend_BE, mkexpr(op2addr),
+ NULL, mkexpr(op1), /* expected value */
+ NULL, mkexpr(op3) /* new value */);
+ stmt(IRStmt_CAS(cas));
+
+ /* Set CC. Operands compared equal -> 0, else 1. */
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
+
+ /* If operands were equal (cc == 0) just store the old value op1 in r1.
+ Otherwise, store the old_value from memory in r1 and yield. */
+ assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
+ put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
+ stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
+ IRConst_U64(guest_IA_next_instr)));
+}
+
+static HChar *
+s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_cas_32(r1, r3, op2addr);
+
+ return "cs";
+}
+
+static HChar *
+s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_cas_32(r1, r3, op2addr);
+
+ return "csy";
+}
+
+static HChar *
+s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRCAS *cas;
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp old_mem = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp nequal = newTemp(Ity_I1);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op3, get_gpr_dw0(r3));
+
+ /* The first and second operands are compared. If they are equal,
+ the third operand is stored at the second- operand location. */
+ cas = mkIRCAS(IRTemp_INVALID, old_mem,
+ Iend_BE, mkexpr(op2addr),
+ NULL, mkexpr(op1), /* expected value */
+ NULL, mkexpr(op3) /* new value */);
+ stmt(IRStmt_CAS(cas));
+
+ /* Set CC. Operands compared equal -> 0, else 1. */
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
+
+ /* If operands were equal (cc == 0) just store the old value op1 in r1.
+ Otherwise, store the old_value from memory in r1 and yield. */
+ assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
+ put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
+ stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
+ IRConst_U64(guest_IA_next_instr)));
+
+ return "csg";
+}
+
+
+/* Binary floating point */
+
+static HChar *
+s390_irgen_AXBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F128);
+ IRTemp op2 = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(op1, get_fpr_pair(r1));
+ assign(op2, get_fpr_pair(r2));
+ assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_pair(r1, mkexpr(result));
+
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "axbr";
+}
+
+/* The result of a Iop_CmdFxx operation is a condition code. It is
+ encoded using the values defined in type IRCmpFxxResult.
+ Before we can store the condition code into the guest state (or do
+ anything else with it for that matter) we need to convert it to
+ the encoding that s390 uses. This is what this function does.
+
+ s390 VEX b6 b2 b0 cc.1 cc.0
+ 0 0x40 EQ 1 0 0 0 0
+ 1 0x01 LT 0 0 1 0 1
+ 2 0x00 GT 0 0 0 1 0
+ 3 0x45 Unordered 1 1 1 1 1
+
+ The following bits from the VEX encoding are interesting:
+ b0, b2, b6 with b0 being the LSB. We observe:
+
+ cc.0 = b0;
+ cc.1 = b2 | (~b0 & ~b6)
+
+ with cc being the s390 condition code.
+*/
+static IRExpr *
+convert_vex_fpcc_to_s390(IRTemp vex_cc)
+{
+ IRTemp cc0 = newTemp(Ity_I32);
+ IRTemp cc1 = newTemp(Ity_I32);
+ IRTemp b0 = newTemp(Ity_I32);
+ IRTemp b2 = newTemp(Ity_I32);
+ IRTemp b6 = newTemp(Ity_I32);
+
+ assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
+ assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
+ mkU32(1)));
+ assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
+ mkU32(1)));
+
+ assign(cc0, mkexpr(b0));
+ assign(cc1, binop(Iop_Or32, mkexpr(b2),
+ binop(Iop_And32,
+ binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
+ binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
+ )));
+
+ return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
+}
+
+static HChar *
+s390_irgen_CEBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, get_fpr_w0(r2));
+ assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "cebr";
+}
+
+static HChar *
+s390_irgen_CDBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, get_fpr_dw0(r2));
+ assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "cdbr";
+}
+
+static HChar *
+s390_irgen_CXBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F128);
+ IRTemp op2 = newTemp(Ity_F128);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_fpr_pair(r1));
+ assign(op2, get_fpr_pair(r2));
+ assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "cxbr";
+}
+
+static HChar *
+s390_irgen_CEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, load(Ity_F32, mkexpr(op2addr)));
+ assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "ceb";
+}
+
+static HChar *
+s390_irgen_CDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, load(Ity_F64, mkexpr(op2addr)));
+ assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "cdb";
+}
+
+static HChar *
+s390_irgen_CXFBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
+
+ return "cxfbr";
+}
+
+static HChar *
+s390_irgen_CXGBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
+
+ return "cxgbr";
+}
+
+static HChar *
+s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op, get_fpr_pair(r2));
+ assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
+
+ return "cfxbr";
+}
+
+static HChar *
+s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op, get_fpr_pair(r2));
+ assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
+
+ return "cgxbr";
+}
+
+static HChar *
+s390_irgen_DXBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F128);
+ IRTemp op2 = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(op1, get_fpr_pair(r1));
+ assign(op2, get_fpr_pair(r2));
+ assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_pair(r1, mkexpr(result));
+
+ return "dxbr";
+}
+
+static HChar *
+s390_irgen_LTXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(result, get_fpr_pair(r2));
+ put_fpr_pair(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "ltxbr";
+}
+
+static HChar *
+s390_irgen_LCXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
+ put_fpr_pair(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "lcxbr";
+}
+
+static HChar *
+s390_irgen_LXDBR(UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F64);
+
+ assign(op, get_fpr_dw0(r2));
+ put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
+
+ return "lxdbr";
+}
+
+static HChar *
+s390_irgen_LXEBR(UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F32);
+
+ assign(op, get_fpr_w0(r2));
+ put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
+
+ return "lxebr";
+}
+
+static HChar *
+s390_irgen_LXDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_F64);
+
+ assign(op, load(Ity_F64, mkexpr(op2addr)));
+ put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
+
+ return "lxdb";
+}
+
+static HChar *
+s390_irgen_LXEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_F32);
+
+ assign(op, load(Ity_F32, mkexpr(op2addr)));
+ put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
+
+ return "lxeb";
+}
+
+static HChar *
+s390_irgen_LNEBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
+ put_fpr_w0(r1, mkexpr(result));
+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
+
+ return "lnebr";
+}
+
+static HChar *
+s390_irgen_LNDBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
+ put_fpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
+
+ return "lndbr";
+}
+
+static HChar *
+s390_irgen_LNXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
+ put_fpr_pair(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "lnxbr";
+}
+
+static HChar *
+s390_irgen_LPEBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
+ put_fpr_w0(r1, mkexpr(result));
+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
+
+ return "lpebr";
+}
+
+static HChar *
+s390_irgen_LPDBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
+
+ return "lpdbr";
+}
+
+static HChar *
+s390_irgen_LPXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
+ put_fpr_pair(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "lpxbr";
+}
+
+static HChar *
+s390_irgen_LDXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "ldxbr";
+}
+
+static HChar *
+s390_irgen_LEXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "lexbr";
+}
+
+static HChar *
+s390_irgen_MXBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F128);
+ IRTemp op2 = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(op1, get_fpr_pair(r1));
+ assign(op2, get_fpr_pair(r2));
+ assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_pair(r1, mkexpr(result));
+
+ return "mxbr";
+}
+
+static HChar *
+s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
+{
+ put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
+ get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
+
+ return "maebr";
+}
+
+static HChar *
+s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
+{
+ put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
+ get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
+
+ return "madbr";
+}
+
+static HChar *
+s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
+{
+ IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
+
+ put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
+ get_fpr_w0(r1), op2, get_fpr_w0(r3)));
+
+ return "maeb";
+}
+
+static HChar *
+s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
+{
+ IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
+
+ put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
+ get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
+
+ return "madb";
+}
+
+static HChar *
+s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
+{
+ put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
+ get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
+
+ return "msebr";
+}
+
+static HChar *
+s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
+{
+ put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
+ get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
+
+ return "msdbr";
+}
+
+static HChar *
+s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
+{
+ IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
+
+ put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
+ get_fpr_w0(r1), op2, get_fpr_w0(r3)));
+
+ return "mseb";
+}
+
+static HChar *
+s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
+{
+ IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
+
+ put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
+ get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
+
+ return "msdb";
+}
+
+static HChar *
+s390_irgen_SQEBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "sqebr";
+}
+
+static HChar *
+s390_irgen_SQDBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "sqdbr";
+}
+
+static HChar *
+s390_irgen_SQXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
+ put_fpr_pair(r1, mkexpr(result));
+
+ return "sqxbr";
+}
+
+static HChar *
+s390_irgen_SQEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_F32);
+
+ assign(op, load(Ity_F32, mkexpr(op2addr)));
+ put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
+
+ return "sqeb";
+}
+
+static HChar *
+s390_irgen_SQDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_F64);
+
+ assign(op, load(Ity_F64, mkexpr(op2addr)));
+ put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
+
+ return "sqdb";
+}
+
+static HChar *
+s390_irgen_SXBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F128);
+ IRTemp op2 = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(op1, get_fpr_pair(r1));
+ assign(op2, get_fpr_pair(r2));
+ assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_pair(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "sxbr";
+}
+
+static HChar *
+s390_irgen_TCEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_F32);
+
+ assign(value, get_fpr_w0(r1));
+
+ s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
+
+ return "tceb";
+}
+
+static HChar *
+s390_irgen_TCDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_F64);
+
+ assign(value, get_fpr_dw0(r1));
+
+ s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
+
+ return "tcdb";
+}
+
+static HChar *
+s390_irgen_TCXB(UChar r1, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_F128);
+
+ assign(value, get_fpr_pair(r1));
+
+ s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
+
+ return "tcxb";
+}
+
+static HChar *
+s390_irgen_LCDFR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "lcdfr";
+}
+
+static HChar *
+s390_irgen_LNDFR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "lndfr";
+}
+
+static HChar *
+s390_irgen_LPDFR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "lpdfr";
+}
+
+static HChar *
+s390_irgen_LDGR(UChar r1, UChar r2)
+{
+ put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
+
+ return "ldgr";
+}
+
+static HChar *
+s390_irgen_LGDR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
+
+ return "lgdr";
+}
+
+
+static HChar *
+s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp sign = newTemp(Ity_I64);
+ IRTemp value = newTemp(Ity_I64);
+
+ assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
+ mkU64(1ULL << 63)));
+ assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
+ mkU64((1ULL << 63) - 1)));
+ put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
+ mkexpr(sign))));
+
+ return "cpsdr";
+}
+
+
+static UInt
+s390_do_cvb(ULong decimal)
+{
+#if defined(VGA_s390x)
+ UInt binary;
+
+ __asm__ volatile (
+ "cvb %[result],%[input]\n\t"
+ : [result] "=d"(binary)
+ : [input] "m"(decimal)
+ );
+
+ return binary;
+#else
+ return 0;
+#endif
+}
+
+static IRExpr *
+s390_call_cvb(IRExpr *in)
+{
+ IRExpr **args, *call;
+
+ args = mkIRExprVec_1(in);
+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
+ "s390_do_cvb", &s390_do_cvb, args);
+
+ /* Nothing is excluded from definedness checking. */
+ call->Iex.CCall.cee->mcx_mask = 0;
+
+ return call;
+}
+
+static HChar *
+s390_irgen_CVB(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
+
+ return "cvb";
+}
+
+static HChar *
+s390_irgen_CVBY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
+
+ return "cvby";
+}
+
+
+static ULong
+s390_do_cvd(ULong binary_in)
+{
+#if defined(VGA_s390x)
+ UInt binary = binary_in & 0xffffffffULL;
+ ULong decimal;
+
+ __asm__ volatile (
+ "cvd %[input],%[result]\n\t"
+ : [result] "=m"(decimal)
+ : [input] "d"(binary)
+ );
+
+ return decimal;
+#else
+ return 0;
+#endif
+}
+
+static IRExpr *
+s390_call_cvd(IRExpr *in)
+{
+ IRExpr **args, *call;
+
+ args = mkIRExprVec_1(in);
+ call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
+ "s390_do_cvd", &s390_do_cvd, args);
+
+ /* Nothing is excluded from definedness checking. */
+ call->Iex.CCall.cee->mcx_mask = 0;
+
+ return call;
+}
+
+static HChar *
+s390_irgen_CVD(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
+
+ return "cvd";
+}
+
+static HChar *
+s390_irgen_CVDY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
+
+ return "cvdy";
+}
+
+static HChar *
+s390_irgen_FLOGR(UChar r1, UChar r2)
+{
+ IRTemp input = newTemp(Ity_I64);
+ IRTemp not_zero = newTemp(Ity_I64);
+ IRTemp tmpnum = newTemp(Ity_I64);
+ IRTemp num = newTemp(Ity_I64);
+ IRTemp shift_amount = newTemp(Ity_I8);
+
+ /* We use the "count leading zeroes" operator because the number of
+ leading zeroes is identical with the bit position of the first '1' bit.
+ However, that operator does not work when the input value is zero.
+ Therefore, we set the LSB of the input value to 1 and use Clz64 on
+ the modified value. If input == 0, then the result is 64. Otherwise,
+ the result of Clz64 is what we want. */
+
+ assign(input, get_gpr_dw0(r2));
+ assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
+ assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
+
+ /* num = (input == 0) ? 64 : tmpnum */
+ assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
+ /* == 0 */ mkU64(64),
+ /* != 0 */ mkexpr(tmpnum)));
+
+ put_gpr_dw0(r1, mkexpr(num));
+
+ /* Set the leftmost '1' bit of the input value to zero. The general scheme
+ is to first shift the input value by NUM + 1 bits to the left which
+ causes the leftmost '1' bit to disappear. Then we shift logically to
+ the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
+ Iop_Shr64 are undefined if the shift-amount is greater than or equal to
+ the width of the value-to-be-shifted, we need to special case
+ NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
+ For both such INPUT values the result will be 0. */
+
+ assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
+ mkU64(1))));
+
+ put_gpr_dw0(r1 + 1,
+ mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
+ /* == 0 || == 1*/ mkU64(0),
+ /* otherwise */
+ binop(Iop_Shr64,
+ binop(Iop_Shl64, mkexpr(input),
+ mkexpr(shift_amount)),
+ mkexpr(shift_amount))));
+
+ /* Compare the original value as an unsigned integer with 0. */
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
+ mktemp(Ity_I64, mkU64(0)), False);
+
+ return "flogr";
+}
+
+static HChar *
+s390_irgen_STCK(IRTemp op2addr)
+{
+ IRDirty *d;
+ IRTemp cc = newTemp(Ity_I64);
+
+ d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
+ &s390x_dirtyhelper_STCK,
+ mkIRExprVec_1(mkexpr(op2addr)));
+ d->mFx = Ifx_Write;
+ d->mAddr = mkexpr(op2addr);
+ d->mSize = 8;
+ stmt(IRStmt_Dirty(d));
+ s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
+ mkexpr(cc), mkU64(0), mkU64(0));
+ return "stck";
+}
+
+static HChar *
+s390_irgen_STCKF(IRTemp op2addr)
+{
+ IRDirty *d;
+ IRTemp cc = newTemp(Ity_I64);
+
+ d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
+ &s390x_dirtyhelper_STCKF,
+ mkIRExprVec_1(mkexpr(op2addr)));
+ d->mFx = Ifx_Write;
+ d->mAddr = mkexpr(op2addr);
+ d->mSize = 8;
+ stmt(IRStmt_Dirty(d));
+ s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
+ mkexpr(cc), mkU64(0), mkU64(0));
+ return "stckf";
+}
+
+static HChar *
+s390_irgen_STCKE(IRTemp op2addr)
+{
+ IRDirty *d;
+ IRTemp cc = newTemp(Ity_I64);
+
+ d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
+ &s390x_dirtyhelper_STCKE,
+ mkIRExprVec_1(mkexpr(op2addr)));
+ d->mFx = Ifx_Write;
+ d->mAddr = mkexpr(op2addr);
+ d->mSize = 16;
+ stmt(IRStmt_Dirty(d));
+ s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
+ mkexpr(cc), mkU64(0), mkU64(0));
+ return "stcke";
+}
+
+static HChar *
+s390_irgen_STFLE(IRTemp op2addr)
+{
+ IRDirty *d;
+ IRTemp cc = newTemp(Ity_I64);
+
+ d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
+ &s390x_dirtyhelper_STFLE,
+ mkIRExprVec_1(mkexpr(op2addr)));
+
+ d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
+
+ d->fxState[0].fx = Ifx_Modify; /* read then write */
+ d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0);
+ d->fxState[0].size = sizeof(ULong);
+ d->nFxState = 1;
+
+ d->mAddr = mkexpr(op2addr);
+ /* Pretend all double words are written */
+ d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong);
+ d->mFx = Ifx_Write;
+
+ stmt(IRStmt_Dirty(d));
+
+ s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0));
+
+ return "stfle";
+}
+
+static HChar *
+s390_irgen_CKSM(UChar r1,UChar r2)
+{
+ IRTemp addr = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I32);
+ IRTemp len = newTemp(Ity_I64);
+ IRTemp oldval = newTemp(Ity_I32);
+ IRTemp mask = newTemp(Ity_I32);
+ IRTemp newop = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp result1 = newTemp(Ity_I32);
+ IRTemp inc = newTemp(Ity_I64);
+
+ assign(oldval, get_gpr_w1(r1));
+ assign(addr, get_gpr_dw0(r2));
+ assign(len, get_gpr_dw0(r2+1));
+
+ /* Condition code is always zero. */
+ s390_cc_set(0);
+
+ /* If length is zero, there is no need to calculate the checksum */
+ if_condition_goto(binop(Iop_CmpEQ64, mkexpr(len), mkU64(0)),
+ guest_IA_next_instr);
+
+ /* Assiging the increment variable to adjust address and length
+ later on. */
+ assign(inc, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
+ mkexpr(len), mkU64(4)));
+
+ /* If length < 4 the final 4-byte 2nd operand value is computed by
+ appending the remaining bytes to the right with 0. This is done
+ by AND'ing the 4 bytes loaded from memory with an appropriate
+ mask. If length >= 4, that mask is simply 0xffffffff. */
+
+ assign(mask, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
+ /* Mask computation when len < 4:
+ 0xffffffff << (32 - (len % 4)*8) */
+ binop(Iop_Shl32, mkU32(0xffffffff),
+ unop(Iop_32to8,
+ binop(Iop_Sub32, mkU32(32),
+ binop(Iop_Shl32,
+ unop(Iop_64to32,
+ binop(Iop_And64,
+ mkexpr(len), mkU64(3))),
+ mkU8(3))))),
+ mkU32(0xffffffff)));
+
+ assign(op, load(Ity_I32, mkexpr(addr)));
+ assign(newop, binop(Iop_And32, mkexpr(op), mkexpr(mask)));
+ assign(result, binop(Iop_Add32, mkexpr(newop), mkexpr(oldval)));
+
+ /* Checking for carry */
+ assign(result1, mkite(binop(Iop_CmpLT32U, mkexpr(result), mkexpr(newop)),
+ binop(Iop_Add32, mkexpr(result), mkU32(1)),
+ mkexpr(result)));
+
+ put_gpr_w1(r1, mkexpr(result1));
+ put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr), mkexpr(inc)));
+ put_gpr_dw0(r2+1, binop(Iop_Sub64, mkexpr(len), mkexpr(inc)));
+
+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(len), mkU64(0)),
+ guest_IA_curr_instr);
+
+ return "cksm";
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Build IR for special instructions ---*/
+/*------------------------------------------------------------*/
+
+static void
+s390_irgen_client_request(void)
+{
+ if (0)
+ vex_printf("%%R3 = client_request ( %%R2 )\n");
+
+ irsb->next = mkU64((ULong)(guest_IA_curr_instr
+ + S390_SPECIAL_OP_PREAMBLE_SIZE
+ + S390_SPECIAL_OP_SIZE));
+ irsb->jumpkind = Ijk_ClientReq;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+static void
+s390_irgen_guest_NRADDR(void)
+{
+ if (0)
+ vex_printf("%%R3 = guest_NRADDR\n");
+
+ put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
+}
+
+static void
+s390_irgen_call_noredir(void)
+{
+ /* Continue after special op */
+ put_gpr_dw0(14, mkU64(guest_IA_curr_instr
+ + S390_SPECIAL_OP_PREAMBLE_SIZE
+ + S390_SPECIAL_OP_SIZE));
+
+ /* The address is in REG1, all parameters are in the right (guest) places */
+ irsb->next = get_gpr_dw0(1);
+ irsb->jumpkind = Ijk_NoRedir;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* Force proper alignment for the structures below. */
+#pragma pack(1)
+
+
+static s390_decode_t
+s390_decode_2byte_and_irgen(UChar *bytes)
+{
+ typedef union {
+ struct {
+ unsigned int op : 16;
+ } E;
+ struct {
+ unsigned int op : 8;
+ unsigned int i : 8;
+ } I;
+ struct {
+ unsigned int op : 8;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RR;
+ } formats;
+ union {
+ formats fmt;
+ UShort value;
+ } ovl;
+
+ vassert(sizeof(formats) == 2);
+
+ ((char *)(&ovl.value))[0] = bytes[0];
+ ((char *)(&ovl.value))[1] = bytes[1];
+
+ switch (ovl.value & 0xffff) {
+ case 0x0000: /* invalid opcode */
+ s390_format_RR_RR(s390_irgen_00, 0, 0); goto ok;
+ case 0x0101: /* PR */ goto unimplemented;
+ case 0x0102: /* UPT */ goto unimplemented;
+ case 0x0104: /* PTFF */ goto unimplemented;
+ case 0x0107: /* SCKPF */ goto unimplemented;
+ case 0x010a: /* PFPO */ goto unimplemented;
+ case 0x010b: /* TAM */ goto unimplemented;
+ case 0x010c: /* SAM24 */ goto unimplemented;
+ case 0x010d: /* SAM31 */ goto unimplemented;
+ case 0x010e: /* SAM64 */ goto unimplemented;
+ case 0x01ff: /* TRAP2 */ goto unimplemented;
+ }
+
+ switch ((ovl.value & 0xff00) >> 8) {
+ case 0x04: /* SPM */ goto unimplemented;
+ case 0x05: /* BALR */ goto unimplemented;
+ case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
+ case 0x0b: /* BSM */ goto unimplemented;
+ case 0x0c: /* BASSM */ goto unimplemented;
+ case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x0e: s390_format_RR(s390_irgen_MVCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x0f: s390_format_RR(s390_irgen_CLCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x20: /* LPDR */ goto unimplemented;
+ case 0x21: /* LNDR */ goto unimplemented;
+ case 0x22: /* LTDR */ goto unimplemented;
+ case 0x23: /* LCDR */ goto unimplemented;
+ case 0x24: /* HDR */ goto unimplemented;
+ case 0x25: /* LDXR */ goto unimplemented;
+ case 0x26: /* MXR */ goto unimplemented;
+ case 0x27: /* MXDR */ goto unimplemented;
+ case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x29: /* CDR */ goto unimplemented;
+ case 0x2a: /* ADR */ goto unimplemented;
+ case 0x2b: /* SDR */ goto unimplemented;
+ case 0x2c: /* MDR */ goto unimplemented;
+ case 0x2d: /* DDR */ goto unimplemented;
+ case 0x2e: /* AWR */ goto unimplemented;
+ case 0x2f: /* SWR */ goto unimplemented;
+ case 0x30: /* LPER */ goto unimplemented;
+ case 0x31: /* LNER */ goto unimplemented;
+ case 0x32: /* LTER */ goto unimplemented;
+ case 0x33: /* LCER */ goto unimplemented;
+ case 0x34: /* HER */ goto unimplemented;
+ case 0x35: /* LEDR */ goto unimplemented;
+ case 0x36: /* AXR */ goto unimplemented;
+ case 0x37: /* SXR */ goto unimplemented;
+ case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x39: /* CER */ goto unimplemented;
+ case 0x3a: /* AER */ goto unimplemented;
+ case 0x3b: /* SER */ goto unimplemented;
+ case 0x3c: /* MDER */ goto unimplemented;
+ case 0x3d: /* DER */ goto unimplemented;
+ case 0x3e: /* AUR */ goto unimplemented;
+ case 0x3f: /* SUR */ goto unimplemented;
+ }
+
+ return S390_DECODE_UNKNOWN_INSN;
+
+ok:
+ return S390_DECODE_OK;
+
+unimplemented:
+ return S390_DECODE_UNIMPLEMENTED_INSN;
+}
+
+static s390_decode_t
+s390_decode_4byte_and_irgen(UChar *bytes)
+{
+ typedef union {
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int op2 : 4;
+ unsigned int i2 : 16;
+ } RI;
+ struct {
+ unsigned int op : 16;
+ unsigned int : 8;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RRE;
+ struct {
+ unsigned int op : 16;
+ unsigned int r1 : 4;
+ unsigned int : 4;
+ unsigned int r3 : 4;
+ unsigned int r2 : 4;
+ } RRF;
+ struct {
+ unsigned int op : 16;
+ unsigned int r3 : 4;
+ unsigned int m4 : 4;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RRF2;
+ struct {
+ unsigned int op : 16;
+ unsigned int r3 : 4;
+ unsigned int : 4;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RRF3;
+ struct {
+ unsigned int op : 16;
+ unsigned int r3 : 4;
+ unsigned int : 4;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RRR;
+ struct {
+ unsigned int op : 16;
+ unsigned int r3 : 4;
+ unsigned int : 4;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RRF4;
+ struct {
+ unsigned int op : 8;
+ unsigned int r1 : 4;
+ unsigned int r3 : 4;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } RS;
+ struct {
+ unsigned int op : 8;
+ unsigned int r1 : 4;
+ unsigned int r3 : 4;
+ unsigned int i2 : 16;
+ } RSI;
+ struct {
+ unsigned int op : 8;
+ unsigned int r1 : 4;
+ unsigned int x2 : 4;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } RX;
+ struct {
+ unsigned int op : 16;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } S;
+ struct {
+ unsigned int op : 8;
+ unsigned int i2 : 8;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ } SI;
+ } formats;
+ union {
+ formats fmt;
+ UInt value;
+ } ovl;
+
+ vassert(sizeof(formats) == 4);
+
+ ((char *)(&ovl.value))[0] = bytes[0];
+ ((char *)(&ovl.value))[1] = bytes[1];
+ ((char *)(&ovl.value))[2] = bytes[2];
+ ((char *)(&ovl.value))[3] = bytes[3];
+
+ switch ((ovl.value & 0xff0f0000) >> 16) {
+ case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
+ goto ok;
+ case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
+ goto ok;
+ case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
+ goto ok;
+ case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
+ goto ok;
+ case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
+ goto ok;
+ case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ }
+
+ switch ((ovl.value & 0xffff0000) >> 16) {
+ case 0x8000: /* SSM */ goto unimplemented;
+ case 0x8200: /* LPSW */ goto unimplemented;
+ case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2);
+ goto ok;
+ case 0xb202: /* STIDP */ goto unimplemented;
+ case 0xb204: /* SCK */ goto unimplemented;
+ case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
+ case 0xb206: /* SCKC */ goto unimplemented;
+ case 0xb207: /* STCKC */ goto unimplemented;
+ case 0xb208: /* SPT */ goto unimplemented;
+ case 0xb209: /* STPT */ goto unimplemented;
+ case 0xb20a: /* SPKA */ goto unimplemented;
+ case 0xb20b: /* IPK */ goto unimplemented;
+ case 0xb20d: /* PTLB */ goto unimplemented;
+ case 0xb210: /* SPX */ goto unimplemented;
+ case 0xb211: /* STPX */ goto unimplemented;
+ case 0xb212: /* STAP */ goto unimplemented;
+ case 0xb214: /* SIE */ goto unimplemented;
+ case 0xb218: /* PC */ goto unimplemented;
+ case 0xb219: /* SAC */ goto unimplemented;
+ case 0xb21a: /* CFC */ goto unimplemented;
+ case 0xb221: /* IPTE */ goto unimplemented;
+ case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
+ case 0xb223: /* IVSK */ goto unimplemented;
+ case 0xb224: /* IAC */ goto unimplemented;
+ case 0xb225: /* SSAR */ goto unimplemented;
+ case 0xb226: /* EPAR */ goto unimplemented;
+ case 0xb227: /* ESAR */ goto unimplemented;
+ case 0xb228: /* PT */ goto unimplemented;
+ case 0xb229: /* ISKE */ goto unimplemented;
+ case 0xb22a: /* RRBE */ goto unimplemented;
+ case 0xb22b: /* SSKE */ goto unimplemented;
+ case 0xb22c: /* TB */ goto unimplemented;
+ case 0xb22d: /* DXR */ goto unimplemented;
+ case 0xb22e: /* PGIN */ goto unimplemented;
+ case 0xb22f: /* PGOUT */ goto unimplemented;
+ case 0xb230: /* CSCH */ goto unimplemented;
+ case 0xb231: /* HSCH */ goto unimplemented;
+ case 0xb232: /* MSCH */ goto unimplemented;
+ case 0xb233: /* SSCH */ goto unimplemented;
+ case 0xb234: /* STSCH */ goto unimplemented;
+ case 0xb235: /* TSCH */ goto unimplemented;
+ case 0xb236: /* TPI */ goto unimplemented;
+ case 0xb237: /* SAL */ goto unimplemented;
+ case 0xb238: /* RSCH */ goto unimplemented;
+ case 0xb239: /* STCRW */ goto unimplemented;
+ case 0xb23a: /* STCPS */ goto unimplemented;
+ case 0xb23b: /* RCHP */ goto unimplemented;
+ case 0xb23c: /* SCHM */ goto unimplemented;
+ case 0xb240: /* BAKR */ goto unimplemented;
+ case 0xb241: s390_format_RRE(s390_irgen_CKSM, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb244: /* SQDR */ goto unimplemented;
+ case 0xb245: /* SQER */ goto unimplemented;
+ case 0xb246: /* STURA */ goto unimplemented;
+ case 0xb247: /* MSTA */ goto unimplemented;
+ case 0xb248: /* PALB */ goto unimplemented;
+ case 0xb249: /* EREG */ goto unimplemented;
+ case 0xb24a: /* ESTA */ goto unimplemented;
+ case 0xb24b: /* LURA */ goto unimplemented;
+ case 0xb24c: /* TAR */ goto unimplemented;
+ case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
+ goto ok;
+ case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
+ goto ok;
+ case 0xb250: /* CSP */ goto unimplemented;
+ case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb254: /* MVPG */ goto unimplemented;
+ case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb257: /* CUSE */ goto unimplemented;
+ case 0xb258: /* BSG */ goto unimplemented;
+ case 0xb25a: /* BSA */ goto unimplemented;
+ case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb263: /* CMPSC */ goto unimplemented;
+ case 0xb274: /* SIGA */ goto unimplemented;
+ case 0xb276: /* XSCH */ goto unimplemented;
+ case 0xb277: /* RP */ goto unimplemented;
+ case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
+ case 0xb279: /* SACF */ goto unimplemented;
+ case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
+ case 0xb27d: /* STSI */ goto unimplemented;
+ case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
+ goto ok;
+ case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
+ goto ok;
+ case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
+ goto ok;
+ case 0xb2a5: /* TRE */ goto unimplemented;
+ case 0xb2a6: /* CU21 */ goto unimplemented;
+ case 0xb2a7: /* CU12 */ goto unimplemented;
+ case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2);
+ goto ok;
+ case 0xb2b1: /* STFL */ goto unimplemented;
+ case 0xb2b2: /* LPSWE */ goto unimplemented;
+ case 0xb2b8: /* SRNMB */ goto unimplemented;
+ case 0xb2b9: /* SRNMT */ goto unimplemented;
+ case 0xb2bd: /* LFAS */ goto unimplemented;
+ case 0xb2ff: /* TRAP4 */ goto unimplemented;
+ case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb307: /* MXDBR */ goto unimplemented;
+ case 0xb308: /* KEBR */ goto unimplemented;
+ case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb30c: /* MDEBR */ goto unimplemented;
+ case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
+ case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
+ case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb318: /* KDBR */ goto unimplemented;
+ case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
+ case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
+ case 0xb324: /* LDER */ goto unimplemented;
+ case 0xb325: /* LXDR */ goto unimplemented;
+ case 0xb326: /* LXER */ goto unimplemented;
+ case 0xb32e: /* MAER */ goto unimplemented;
+ case 0xb32f: /* MSER */ goto unimplemented;
+ case 0xb336: /* SQXR */ goto unimplemented;
+ case 0xb337: /* MEER */ goto unimplemented;
+ case 0xb338: /* MAYLR */ goto unimplemented;
+ case 0xb339: /* MYLR */ goto unimplemented;
+ case 0xb33a: /* MAYR */ goto unimplemented;
+ case 0xb33b: /* MYR */ goto unimplemented;
+ case 0xb33c: /* MAYHR */ goto unimplemented;
+ case 0xb33d: /* MYHR */ goto unimplemented;
+ case 0xb33e: /* MADR */ goto unimplemented;
+ case 0xb33f: /* MSDR */ goto unimplemented;
+ case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb347: /* FIXBR */ goto unimplemented;
+ case 0xb348: /* KXBR */ goto unimplemented;
+ case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb350: /* TBEDR */ goto unimplemented;
+ case 0xb351: /* TBDR */ goto unimplemented;
+ case 0xb353: /* DIEBR */ goto unimplemented;
+ case 0xb357: /* FIEBR */ goto unimplemented;
+ case 0xb358: /* THDER */ goto unimplemented;
+ case 0xb359: /* THDR */ goto unimplemented;
+ case 0xb35b: /* DIDBR */ goto unimplemented;
+ case 0xb35f: /* FIDBR */ goto unimplemented;
+ case 0xb360: /* LPXR */ goto unimplemented;
+ case 0xb361: /* LNXR */ goto unimplemented;
+ case 0xb362: /* LTXR */ goto unimplemented;
+ case 0xb363: /* LCXR */ goto unimplemented;
+ case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb366: /* LEXR */ goto unimplemented;
+ case 0xb367: /* FIXR */ goto unimplemented;
+ case 0xb369: /* CXR */ goto unimplemented;
+ case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
+ case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
+ case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
+ case 0xb377: /* FIER */ goto unimplemented;
+ case 0xb37f: /* FIDR */ goto unimplemented;
+ case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
+ case 0xb385: /* SFASR */ goto unimplemented;
+ case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
+ case 0xb390: /* CELFBR */ goto unimplemented;
+ case 0xb391: /* CDLFBR */ goto unimplemented;
+ case 0xb392: /* CXLFBR */ goto unimplemented;
+ case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb3a0: /* CELGBR */ goto unimplemented;
+ case 0xb3a1: /* CDLGBR */ goto unimplemented;
+ case 0xb3a2: /* CXLGBR */ goto unimplemented;
+ case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb3b4: /* CEFR */ goto unimplemented;
+ case 0xb3b5: /* CDFR */ goto unimplemented;
+ case 0xb3b6: /* CXFR */ goto unimplemented;
+ case 0xb3b8: /* CFER */ goto unimplemented;
+ case 0xb3b9: /* CFDR */ goto unimplemented;
+ case 0xb3ba: /* CFXR */ goto unimplemented;
+ case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb3c4: /* CEGR */ goto unimplemented;
+ case 0xb3c5: /* CDGR */ goto unimplemented;
+ case 0xb3c6: /* CXGR */ goto unimplemented;
+ case 0xb3c8: /* CGER */ goto unimplemented;
+ case 0xb3c9: /* CGDR */ goto unimplemented;
+ case 0xb3ca: /* CGXR */ goto unimplemented;
+ case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb3d0: /* MDTR */ goto unimplemented;
+ case 0xb3d1: /* DDTR */ goto unimplemented;
+ case 0xb3d2: /* ADTR */ goto unimplemented;
+ case 0xb3d3: /* SDTR */ goto unimplemented;
+ case 0xb3d4: /* LDETR */ goto unimplemented;
+ case 0xb3d5: /* LEDTR */ goto unimplemented;
+ case 0xb3d6: /* LTDTR */ goto unimplemented;
+ case 0xb3d7: /* FIDTR */ goto unimplemented;
+ case 0xb3d8: /* MXTR */ goto unimplemented;
+ case 0xb3d9: /* DXTR */ goto unimplemented;
+ case 0xb3da: /* AXTR */ goto unimplemented;
+ case 0xb3db: /* SXTR */ goto unimplemented;
+ case 0xb3dc: /* LXDTR */ goto unimplemented;
+ case 0xb3dd: /* LDXTR */ goto unimplemented;
+ case 0xb3de: /* LTXTR */ goto unimplemented;
+ case 0xb3df: /* FIXTR */ goto unimplemented;
+ case 0xb3e0: /* KDTR */ goto unimplemented;
+ case 0xb3e1: /* CGDTR */ goto unimplemented;
+ case 0xb3e2: /* CUDTR */ goto unimplemented;
+ case 0xb3e3: /* CSDTR */ goto unimplemented;
+ case 0xb3e4: /* CDTR */ goto unimplemented;
+ case 0xb3e5: /* EEDTR */ goto unimplemented;
+ case 0xb3e7: /* ESDTR */ goto unimplemented;
+ case 0xb3e8: /* KXTR */ goto unimplemented;
+ case 0xb3e9: /* CGXTR */ goto unimplemented;
+ case 0xb3ea: /* CUXTR */ goto unimplemented;
+ case 0xb3eb: /* CSXTR */ goto unimplemented;
+ case 0xb3ec: /* CXTR */ goto unimplemented;
+ case 0xb3ed: /* EEXTR */ goto unimplemented;
+ case 0xb3ef: /* ESXTR */ goto unimplemented;
+ case 0xb3f1: /* CDGTR */ goto unimplemented;
+ case 0xb3f2: /* CDUTR */ goto unimplemented;
+ case 0xb3f3: /* CDSTR */ goto unimplemented;
+ case 0xb3f4: /* CEDTR */ goto unimplemented;
+ case 0xb3f5: /* QADTR */ goto unimplemented;
+ case 0xb3f6: /* IEDTR */ goto unimplemented;
+ case 0xb3f7: /* RRDTR */ goto unimplemented;
+ case 0xb3f9: /* CXGTR */ goto unimplemented;
+ case 0xb3fa: /* CXUTR */ goto unimplemented;
+ case 0xb3fb: /* CXSTR */ goto unimplemented;
+ case 0xb3fc: /* CEXTR */ goto unimplemented;
+ case 0xb3fd: /* QAXTR */ goto unimplemented;
+ case 0xb3fe: /* IEXTR */ goto unimplemented;
+ case 0xb3ff: /* RRXTR */ goto unimplemented;
+ case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb905: /* LURAG */ goto unimplemented;
+ case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb90e: /* EREGG */ goto unimplemented;
+ case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb91e: /* KMAC */ goto unimplemented;
+ case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb925: /* STURG */ goto unimplemented;
+ case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb928: /* PCKMO */ goto unimplemented;
+ case 0xb92b: /* KMO */ goto unimplemented;
+ case 0xb92c: /* PCC */ goto unimplemented;
+ case 0xb92d: /* KMCTR */ goto unimplemented;
+ case 0xb92e: /* KM */ goto unimplemented;
+ case 0xb92f: /* KMC */ goto unimplemented;
+ case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb93e: /* KIMD */ goto unimplemented;
+ case 0xb93f: /* KLMD */ goto unimplemented;
+ case 0xb941: /* CFDTR */ goto unimplemented;
+ case 0xb942: /* CLGDTR */ goto unimplemented;
+ case 0xb943: /* CLFDTR */ goto unimplemented;
+ case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb949: /* CFXTR */ goto unimplemented;
+ case 0xb94a: /* CLGXTR */ goto unimplemented;
+ case 0xb94b: /* CLFXTR */ goto unimplemented;
+ case 0xb951: /* CDFTR */ goto unimplemented;
+ case 0xb952: /* CDLGTR */ goto unimplemented;
+ case 0xb953: /* CDLFTR */ goto unimplemented;
+ case 0xb959: /* CXFTR */ goto unimplemented;
+ case 0xb95a: /* CXLGTR */ goto unimplemented;
+ case 0xb95b: /* CXLFTR */ goto unimplemented;
+ case 0xb960: /* CGRT */ goto unimplemented;
+ case 0xb961: /* CLGRT */ goto unimplemented;
+ case 0xb972: /* CRT */ goto unimplemented;
+ case 0xb973: /* CLRT */ goto unimplemented;
+ case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb98a: /* CSPG */ goto unimplemented;
+ case 0xb98d: /* EPSW */ goto unimplemented;
+ case 0xb98e: /* IDTE */ goto unimplemented;
+ case 0xb990: /* TRTT */ goto unimplemented;
+ case 0xb991: /* TRTO */ goto unimplemented;
+ case 0xb992: /* TROT */ goto unimplemented;
+ case 0xb993: /* TROO */ goto unimplemented;
+ case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb99a: /* EPAIR */ goto unimplemented;
+ case 0xb99b: /* ESAIR */ goto unimplemented;
+ case 0xb99d: /* ESEA */ goto unimplemented;
+ case 0xb99e: /* PTI */ goto unimplemented;
+ case 0xb99f: /* SSAIR */ goto unimplemented;
+ case 0xb9a2: /* PTF */ goto unimplemented;
+ case 0xb9aa: /* LPTEA */ goto unimplemented;
+ case 0xb9ae: /* RRBM */ goto unimplemented;
+ case 0xb9af: /* PFMF */ goto unimplemented;
+ case 0xb9b0: /* CU14 */ goto unimplemented;
+ case 0xb9b1: /* CU24 */ goto unimplemented;
+ case 0xb9b2: /* CU41 */ goto unimplemented;
+ case 0xb9b3: /* CU42 */ goto unimplemented;
+ case 0xb9bd: /* TRTRE */ goto unimplemented;
+ case 0xb9be: /* SRSTU */ goto unimplemented;
+ case 0xb9bf: /* TRTE */ goto unimplemented;
+ case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb9e1: /* POPCNT */ goto unimplemented;
+ case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
+ S390_XMNM_LOCGR); goto ok;
+ case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
+ S390_XMNM_LOCR); goto ok;
+ case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ }
+
+ switch ((ovl.value & 0xff000000) >> 24) {
+ case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x45: /* BAL */ goto unimplemented;
+ case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x67: /* MXD */ goto unimplemented;
+ case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x69: /* CD */ goto unimplemented;
+ case 0x6a: /* AD */ goto unimplemented;
+ case 0x6b: /* SD */ goto unimplemented;
+ case 0x6c: /* MD */ goto unimplemented;
+ case 0x6d: /* DD */ goto unimplemented;
+ case 0x6e: /* AW */ goto unimplemented;
+ case 0x6f: /* SW */ goto unimplemented;
+ case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x79: /* CE */ goto unimplemented;
+ case 0x7a: /* AE */ goto unimplemented;
+ case 0x7b: /* SE */ goto unimplemented;
+ case 0x7c: /* MDE */ goto unimplemented;
+ case 0x7d: /* DE */ goto unimplemented;
+ case 0x7e: /* AU */ goto unimplemented;
+ case 0x7f: /* SU */ goto unimplemented;
+ case 0x83: /* DIAG */ goto unimplemented;
+ case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
+ ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
+ case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
+ ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
+ case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0x99: /* TRACE */ goto unimplemented;
+ case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
+ ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
+ goto ok;
+ case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
+ ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
+ goto ok;
+ case 0xac: /* STNSM */ goto unimplemented;
+ case 0xad: /* STOSM */ goto unimplemented;
+ case 0xae: /* SIGP */ goto unimplemented;
+ case 0xaf: /* MC */ goto unimplemented;
+ case 0xb1: /* LRA */ goto unimplemented;
+ case 0xb6: /* STCTL */ goto unimplemented;
+ case 0xb7: /* LCTL */ goto unimplemented;
+ case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0xbb: /* CDS */ goto unimplemented;
+ case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ }
+
+ return S390_DECODE_UNKNOWN_INSN;
+
+ok:
+ return S390_DECODE_OK;
+
+unimplemented:
+ return S390_DECODE_UNIMPLEMENTED_INSN;
+}
+
+static s390_decode_t
+s390_decode_6byte_and_irgen(UChar *bytes)
+{
+ typedef union {
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int r3 : 4;
+ unsigned int i2 : 16;
+ unsigned int : 8;
+ unsigned int op2 : 8;
+ } RIE;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ unsigned int i3 : 8;
+ unsigned int i4 : 8;
+ unsigned int i5 : 8;
+ unsigned int op2 : 8;
+ } RIE_RRUUU;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int : 4;
+ unsigned int i2 : 16;
+ unsigned int m3 : 4;
+ unsigned int : 4;
+ unsigned int op2 : 8;
+ } RIEv1;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ unsigned int i4 : 16;
+ unsigned int m3 : 4;
+ unsigned int : 4;
+ unsigned int op2 : 8;
+ } RIE_RRPU;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int m3 : 4;
+ unsigned int i4 : 16;
+ unsigned int i2 : 8;
+ unsigned int op2 : 8;
+ } RIEv3;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int op2 : 4;
+ unsigned int i2 : 32;
+ } RIL;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int m3 : 4;
+ unsigned int b4 : 4;
+ unsigned int d4 : 12;
+ unsigned int i2 : 8;
+ unsigned int op2 : 8;
+ } RIS;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ unsigned int b4 : 4;
+ unsigned int d4 : 12;
+ unsigned int m3 : 4;
+ unsigned int : 4;
+ unsigned int op2 : 8;
+ } RRS;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int l1 : 4;
+ unsigned int : 4;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int : 8;
+ unsigned int op2 : 8;
+ } RSL;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int r3 : 4;
+ unsigned int b2 : 4;
+ unsigned int dl2 : 12;
+ unsigned int dh2 : 8;
+ unsigned int op2 : 8;
+ } RSY;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int x2 : 4;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ unsigned int : 8;
+ unsigned int op2 : 8;
+ } RXE;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r3 : 4;
+ unsigned int x2 : 4;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ unsigned int r1 : 4;
+ unsigned int : 4;
+ unsigned int op2 : 8;
+ } RXF;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int x2 : 4;
+ unsigned int b2 : 4;
+ unsigned int dl2 : 12;
+ unsigned int dh2 : 8;
+ unsigned int op2 : 8;
+ } RXY;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int i2 : 8;
+ unsigned int b1 : 4;
+ unsigned int dl1 : 12;
+ unsigned int dh1 : 8;
+ unsigned int op2 : 8;
+ } SIY;
+ struct {
+ unsigned int op : 8;
+ unsigned int l : 8;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } SS;
+ struct {
+ unsigned int op : 8;
+ unsigned int l1 : 4;
+ unsigned int l2 : 4;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } SS_LLRDRD;
+ struct {
+ unsigned int op : 8;
+ unsigned int r1 : 4;
+ unsigned int r3 : 4;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ unsigned int b4 : 4;
+ unsigned int d4 : 12;
+ } SS_RRRDRD2;
+ struct {
+ unsigned int op : 16;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } SSE;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r3 : 4;
+ unsigned int op2 : 4;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } SSF;
+ struct {
+ unsigned int op : 16;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int i2 : 16;
+ } SIL;
+ } formats;
+ union {
+ formats fmt;
+ ULong value;
+ } ovl;
+
+ vassert(sizeof(formats) == 6);
+
+ ((char *)(&ovl.value))[0] = bytes[0];
+ ((char *)(&ovl.value))[1] = bytes[1];
+ ((char *)(&ovl.value))[2] = bytes[2];
+ ((char *)(&ovl.value))[3] = bytes[3];
+ ((char *)(&ovl.value))[4] = bytes[4];
+ ((char *)(&ovl.value))[5] = bytes[5];
+ ((char *)(&ovl.value))[6] = 0x0;
+ ((char *)(&ovl.value))[7] = 0x0;
+
+ switch ((ovl.value >> 16) & 0xff00000000ffULL) {
+ case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
+ case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
+ case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
+ case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
+ case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
+ ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
+ ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
+ ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
+ ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
+ case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
+ case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
+ case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
+ case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
+ case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
+ case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
+ case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
+ case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
+ case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2,
+ S390_XMNM_LOCG); goto ok;
+ case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2,
+ S390_XMNM_STOCG); goto ok;
+ case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2, S390_XMNM_LOC);
+ goto ok;
+ case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2,
+ S390_XMNM_STOC); goto ok;
+ case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
+ ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
+ goto ok;
+ case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
+ ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
+ goto ok;
+ case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
+ case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
+ ovl.fmt.RIE_RRUUU.r1,
+ ovl.fmt.RIE_RRUUU.r2,
+ ovl.fmt.RIE_RRUUU.i3,
+ ovl.fmt.RIE_RRUUU.i4,
+ ovl.fmt.RIE_RRUUU.i5);
+ goto ok;
+ case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
+ ovl.fmt.RIE_RRUUU.r1,
+ ovl.fmt.RIE_RRUUU.r2,
+ ovl.fmt.RIE_RRUUU.i3,
+ ovl.fmt.RIE_RRUUU.i4,
+ ovl.fmt.RIE_RRUUU.i5);
+ goto ok;
+ case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
+ ovl.fmt.RIE_RRUUU.r1,
+ ovl.fmt.RIE_RRUUU.r2,
+ ovl.fmt.RIE_RRUUU.i3,
+ ovl.fmt.RIE_RRUUU.i4,
+ ovl.fmt.RIE_RRUUU.i5);
+ goto ok;
+ case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
+ ovl.fmt.RIE_RRUUU.r1,
+ ovl.fmt.RIE_RRUUU.r2,
+ ovl.fmt.RIE_RRUUU.i3,
+ ovl.fmt.RIE_RRUUU.i4,
+ ovl.fmt.RIE_RRUUU.i5);
+ goto ok;
+ case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
+ case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
+ ovl.fmt.RIE_RRPU.r1,
+ ovl.fmt.RIE_RRPU.r2,
+ ovl.fmt.RIE_RRPU.i4,
+ ovl.fmt.RIE_RRPU.m3); goto ok;
+ case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
+ ovl.fmt.RIE_RRPU.r1,
+ ovl.fmt.RIE_RRPU.r2,
+ ovl.fmt.RIE_RRPU.i4,
+ ovl.fmt.RIE_RRPU.m3); goto ok;
+ case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
+ case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
+ case 0xec0000000072ULL: /* CIT */ goto unimplemented;
+ case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
+ case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
+ ovl.fmt.RIE_RRPU.r1,
+ ovl.fmt.RIE_RRPU.r2,
+ ovl.fmt.RIE_RRPU.i4,
+ ovl.fmt.RIE_RRPU.m3); goto ok;
+ case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
+ ovl.fmt.RIE_RRPU.r1,
+ ovl.fmt.RIE_RRPU.r2,
+ ovl.fmt.RIE_RRPU.i4,
+ ovl.fmt.RIE_RRPU.m3); goto ok;
+ case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
+ ovl.fmt.RIEv3.r1,
+ ovl.fmt.RIEv3.m3,
+ ovl.fmt.RIEv3.i4,
+ ovl.fmt.RIEv3.i2); goto ok;
+ case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
+ ovl.fmt.RIEv3.r1,
+ ovl.fmt.RIEv3.m3,
+ ovl.fmt.RIEv3.i4,
+ ovl.fmt.RIEv3.i2); goto ok;
+ case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
+ ovl.fmt.RIEv3.r1,
+ ovl.fmt.RIEv3.m3,
+ ovl.fmt.RIEv3.i4,
+ ovl.fmt.RIEv3.i2); goto ok;
+ case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
+ ovl.fmt.RIEv3.r1,
+ ovl.fmt.RIEv3.m3,
+ ovl.fmt.RIEv3.i4,
+ ovl.fmt.RIEv3.i2); goto ok;
+ case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
+ ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
+ goto ok;
+ case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
+ ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
+ ovl.fmt.RIE.i2); goto ok;
+ case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
+ ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
+ ovl.fmt.RIE.i2); goto ok;
+ case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
+ ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
+ ovl.fmt.RIE.i2); goto ok;
+ case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
+ goto ok;
+ case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
+ goto ok;
+ case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
+ goto ok;
+ case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
+ goto ok;
+ case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
+ ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
+ ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
+ ovl.fmt.RIS.i2); goto ok;
+ case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
+ ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
+ ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
+ ovl.fmt.RIS.i2); goto ok;
+ case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
+ ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
+ ovl.fmt.RIS.d4,
+ ovl.fmt.RIS.i2); goto ok;
+ case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
+ ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
+ ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
+ ovl.fmt.RIS.i2); goto ok;
+ case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
+ case 0xed0000000008ULL: /* KEB */ goto unimplemented;
+ case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000000cULL: /* MDEB */ goto unimplemented;
+ case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
+ ovl.fmt.RXF.r1); goto ok;
+ case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
+ ovl.fmt.RXF.r1); goto ok;
+ case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000018ULL: /* KDB */ goto unimplemented;
+ case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
+ ovl.fmt.RXF.r1); goto ok;
+ case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
+ ovl.fmt.RXF.r1); goto ok;
+ case 0xed0000000024ULL: /* LDE */ goto unimplemented;
+ case 0xed0000000025ULL: /* LXD */ goto unimplemented;
+ case 0xed0000000026ULL: /* LXE */ goto unimplemented;
+ case 0xed000000002eULL: /* MAE */ goto unimplemented;
+ case 0xed000000002fULL: /* MSE */ goto unimplemented;
+ case 0xed0000000034ULL: /* SQE */ goto unimplemented;
+ case 0xed0000000035ULL: /* SQD */ goto unimplemented;
+ case 0xed0000000037ULL: /* MEE */ goto unimplemented;
+ case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
+ case 0xed0000000039ULL: /* MYL */ goto unimplemented;
+ case 0xed000000003aULL: /* MAY */ goto unimplemented;
+ case 0xed000000003bULL: /* MY */ goto unimplemented;
+ case 0xed000000003cULL: /* MAYH */ goto unimplemented;
+ case 0xed000000003dULL: /* MYH */ goto unimplemented;
+ case 0xed000000003eULL: /* MAD */ goto unimplemented;
+ case 0xed000000003fULL: /* MSD */ goto unimplemented;
+ case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
+ case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
+ case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
+ case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
+ case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
+ case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
+ case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
+ case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
+ case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
+ case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
+ case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ }
+
+ switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
+ case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc800ULL: /* MVCOS */ goto unimplemented;
+ case 0xc801ULL: /* ECTG */ goto unimplemented;
+ case 0xc802ULL: /* CSST */ goto unimplemented;
+ case 0xc804ULL: /* LPD */ goto unimplemented;
+ case 0xc805ULL: /* LPDG */ goto unimplemented;
+ case 0xcc06ULL: /* BRCTH */ goto unimplemented;
+ case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ }
+
+ switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
+ case 0xd0ULL: /* TRTR */ goto unimplemented;
+ case 0xd1ULL: /* MVN */ goto unimplemented;
+ case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
+ ovl.fmt.SS.b1, ovl.fmt.SS.d1,
+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
+ case 0xd3ULL: /* MVZ */ goto unimplemented;
+ case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
+ ovl.fmt.SS.b1, ovl.fmt.SS.d1,
+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
+ case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
+ ovl.fmt.SS.b1, ovl.fmt.SS.d1,
+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
+ case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
+ ovl.fmt.SS.b1, ovl.fmt.SS.d1,
+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
+ case 0xd7ULL:
+ if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
+ s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
+ else
+ s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
+ ovl.fmt.SS.b1, ovl.fmt.SS.d1,
+ ovl.fmt.SS.b2, ovl.fmt.SS.d2);
+ goto ok;
+ case 0xd9ULL: /* MVCK */ goto unimplemented;
+ case 0xdaULL: /* MVCP */ goto unimplemented;
+ case 0xdbULL: /* MVCS */ goto unimplemented;
+ case 0xdcULL: /* TR */ goto unimplemented;
+ case 0xddULL: /* TRT */ goto unimplemented;
+ case 0xdeULL: /* ED */ goto unimplemented;
+ case 0xdfULL: /* EDMK */ goto unimplemented;
+ case 0xe1ULL: /* PKU */ goto unimplemented;
+ case 0xe2ULL: /* UNPKU */ goto unimplemented;
+ case 0xe8ULL: /* MVCIN */ goto unimplemented;
+ case 0xe9ULL: /* PKA */ goto unimplemented;
+ case 0xeaULL: /* UNPKA */ goto unimplemented;
+ case 0xeeULL: /* PLO */ goto unimplemented;
+ case 0xefULL: /* LMD */ goto unimplemented;
+ case 0xf0ULL: /* SRP */ goto unimplemented;
+ case 0xf1ULL: /* MVO */ goto unimplemented;
+ case 0xf2ULL: /* PACK */ goto unimplemented;
+ case 0xf3ULL: /* UNPK */ goto unimplemented;
+ case 0xf8ULL: /* ZAP */ goto unimplemented;
+ case 0xf9ULL: /* CP */ goto unimplemented;
+ case 0xfaULL: /* AP */ goto unimplemented;
+ case 0xfbULL: /* SP */ goto unimplemented;
+ case 0xfcULL: /* MP */ goto unimplemented;
+ case 0xfdULL: /* DP */ goto unimplemented;
+ }
+
+ switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
+ case 0xe500ULL: /* LASP */ goto unimplemented;
+ case 0xe501ULL: /* TPROT */ goto unimplemented;
+ case 0xe502ULL: /* STRAG */ goto unimplemented;
+ case 0xe50eULL: /* MVCSK */ goto unimplemented;
+ case 0xe50fULL: /* MVCDK */ goto unimplemented;
+ case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ }
+
+ return S390_DECODE_UNKNOWN_INSN;
+
+ok:
+ return S390_DECODE_OK;
+
+unimplemented:
+ return S390_DECODE_UNIMPLEMENTED_INSN;
+}
+
+/* Handle "special" instructions. */
+static s390_decode_t
+s390_decode_special_and_irgen(UChar *bytes)
+{
+ s390_decode_t status = S390_DECODE_OK;
+
+ /* Got a "Special" instruction preamble. Which one is it? */
+ if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
+ s390_irgen_client_request();
+ } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
+ s390_irgen_guest_NRADDR();
+ } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
+ s390_irgen_call_noredir();
+ } else {
+ /* We don't know what it is. */
+ return S390_DECODE_UNKNOWN_SPECIAL_INSN;
+ }
+
+ dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
+
+ return status;
+}
+
+
+/* Function returns # bytes that were decoded or 0 in case of failure */
+static UInt
+s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
+{
+ s390_decode_t status;
+
+ dis_res = dres;
+
+ /* Spot the 8-byte preamble: 18ff lr r15,r15
+ 1811 lr r1,r1
+ 1822 lr r2,r2
+ 1833 lr r3,r3 */
+ if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
+ bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
+ bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
+
+ /* Handle special instruction that follows that preamble. */
+ if (0) vex_printf("special function handling...\n");
+
+ insn_length = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
+ guest_IA_next_instr = guest_IA_curr_instr + insn_length;
+
+ status =
+ s390_decode_special_and_irgen(bytes + S390_SPECIAL_OP_PREAMBLE_SIZE);
+ } else {
+ /* Handle normal instructions. */
+ switch (insn_length) {
+ case 2:
+ status = s390_decode_2byte_and_irgen(bytes);
+ break;
+
+ case 4:
+ status = s390_decode_4byte_and_irgen(bytes);
+ break;
+
+ case 6:
+ status = s390_decode_6byte_and_irgen(bytes);
+ break;
+
+ default:
+ status = S390_DECODE_ERROR;
+ break;
+ }
+ }
+ /* If next instruction is execute, stop here */
+ if (irsb->next == NULL && dis_res->whatNext == Dis_Continue
+ && bytes[insn_length] == 0x44) {
+ irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
+ dis_res->whatNext = Dis_StopHere;
+ dis_res->continueAt = 0;
+ }
+
+ if (status == S390_DECODE_OK) return insn_length; /* OK */
+
+ /* Decoding failed somehow */
+ vex_printf("vex s390->IR: ");
+ switch (status) {
+ case S390_DECODE_UNKNOWN_INSN:
+ vex_printf("unknown insn: ");
+ break;
+
+ case S390_DECODE_UNIMPLEMENTED_INSN:
+ vex_printf("unimplemented insn: ");
+ break;
+
+ case S390_DECODE_UNKNOWN_SPECIAL_INSN:
+ vex_printf("unimplemented special insn: ");
+ break;
+
+ default:
+ case S390_DECODE_ERROR:
+ vex_printf("decoding error: ");
+ break;
+ }
+
+ vex_printf("%02x%02x", bytes[0], bytes[1]);
+ if (insn_length > 2) {
+ vex_printf(" %02x%02x", bytes[2], bytes[3]);
+ }
+ if (insn_length > 4) {
+ vex_printf(" %02x%02x", bytes[4], bytes[5]);
+ }
+ vex_printf("\n");
+
+ return 0; /* Failed */
+}
+
+
+/* Generate an IRExpr for an address. */
+static __inline__ IRExpr *
+mkaddr_expr(Addr64 addr)
+{
+ return IRExpr_Const(IRConst_U64(addr));
+}
+
+
+/* Disassemble a single instruction INSN into IR. */
+static DisResult
+disInstr_S390_WRK(UChar *insn)
+{
+ UChar byte;
+ UInt insn_length;
+ DisResult dres;
+
+ /* ---------------------------------------------------- */
+ /* --- Compute instruction length -- */
+ /* ---------------------------------------------------- */
+
+ /* Get the first byte of the insn. */
+ byte = insn[0];
+
+ /* The leftmost two bits (0:1) encode the length of the insn in bytes.
+ 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
+ insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
+
+ guest_IA_next_instr = guest_IA_curr_instr + insn_length;
+
+ /* ---------------------------------------------------- */
+ /* --- Initialise the DisResult data -- */
+ /* ---------------------------------------------------- */
+ dres.whatNext = Dis_Continue;
+ dres.len = insn_length;
+ dres.continueAt = 0;
+
+ /* fixs390: consider chasing of conditional jumps */
+
+ /* Normal and special instruction handling starts here. */
+ if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
+ /* All decode failures end up here. The decoder has already issued an
+ error message.
+ Tell the dispatcher that this insn cannot be decoded, and so has
+ not been executed, and (is currently) the next to be executed.
+ IA should be up-to-date since it made so at the start of each
+ insn, but nevertheless be paranoid and update it again right
+ now. */
+ addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
+ mkaddr_expr(guest_IA_curr_instr)));
+
+ irsb->next = mkaddr_expr(guest_IA_next_instr);
+ irsb->jumpkind = Ijk_NoDecode;
+ dres.whatNext = Dis_StopHere;
+ dres.len = 0;
+ }
+
+ return dres;
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Top-level fn ---*/
+/*------------------------------------------------------------*/
+
+/* Disassemble a single instruction into IR. The instruction
+ is located in host memory at &guest_code[delta]. */
+
+DisResult
+disInstr_S390(IRSB *irsb_IN,
+ Bool put_IP,
+ Bool (*resteerOkFn)(void *, Addr64),
+ Bool resteerCisOk,
+ void *callback_opaque,
+ UChar *guest_code,
+ Long delta,
+ Addr64 guest_IP,
+ VexArch guest_arch,
+ VexArchInfo *archinfo,
+ VexAbiInfo *abiinfo,
+ Bool host_bigendian)
+{
+ vassert(guest_arch == VexArchS390X);
+
+ /* The instruction decoder requires a big-endian machine. */
+ vassert(host_bigendian == True);
+
+ /* Set globals (see top of this file) */
+ guest_IA_curr_instr = guest_IP;
+ irsb = irsb_IN;
+ resteer_fn = resteerOkFn;
+ resteer_data = callback_opaque;
+
+ /* We may be asked to update the guest IA before going further. */
+ if (put_IP)
+ addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
+ mkaddr_expr(guest_IA_curr_instr)));
+
+ return disInstr_S390_WRK(guest_code + delta);
+}
+
+/*---------------------------------------------------------------*/
+/*--- end guest_s390_toIR.c ---*/
+/*---------------------------------------------------------------*/
diff --git a/main/VEX/priv/guest_x86_defs.h b/main/VEX/priv/guest_x86_defs.h
index 9633533..130d84d 100644
--- a/main/VEX/priv/guest_x86_defs.h
+++ b/main/VEX/priv/guest_x86_defs.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -86,7 +86,7 @@
UInt cc_op, UInt cc_dep1, UInt cc_dep2, UInt cc_ndep
);
-__attribute((regparm(3)))
+VEX_REGPARM(3)
extern UInt x86g_calculate_eflags_c (
UInt cc_op, UInt cc_dep1, UInt cc_dep2, UInt cc_ndep
);
diff --git a/main/VEX/priv/guest_x86_helpers.c b/main/VEX/priv/guest_x86_helpers.c
index c538c07..2bfe210 100644
--- a/main/VEX/priv/guest_x86_helpers.c
+++ b/main/VEX/priv/guest_x86_helpers.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -588,7 +588,7 @@
/* CALLED FROM GENERATED CODE: CLEAN HELPER */
/* Calculate just the carry flag from the supplied thunk parameters. */
-__attribute((regparm(3)))
+VEX_REGPARM(3)
UInt x86g_calculate_eflags_c ( UInt cc_op,
UInt cc_dep1,
UInt cc_dep2,
diff --git a/main/VEX/priv/guest_x86_toIR.c b/main/VEX/priv/guest_x86_toIR.c
index 9919fa6..363d66b 100644
--- a/main/VEX/priv/guest_x86_toIR.c
+++ b/main/VEX/priv/guest_x86_toIR.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -998,7 +998,10 @@
widenUto32(mkexpr(resUS)))) );
/* Set NDEP even though it isn't used. This makes redundant-PUT
elimination of previous stores to this field work better. */
- stmt( IRStmt_Put( OFFB_CC_NDEP, mkU32(0) ));
+ stmt( IRStmt_Put( OFFB_CC_NDEP,
+ IRExpr_Mux0X( mkexpr(guard),
+ IRExpr_Get(OFFB_CC_NDEP,Ity_I32),
+ mkU32(0) )));
}
@@ -2389,7 +2392,7 @@
}
isShift = False;
- switch (gregOfRM(modrm)) { case 4: case 5: case 7: isShift = True; }
+ switch (gregOfRM(modrm)) { case 4: case 5: case 6: case 7: isShift = True; }
isRotate = False;
switch (gregOfRM(modrm)) { case 0: case 1: isRotate = True; }
@@ -2397,11 +2400,6 @@
isRotateC = False;
switch (gregOfRM(modrm)) { case 2: case 3: isRotateC = True; }
- if (gregOfRM(modrm) == 6) {
- *decode_OK = False;
- return delta;
- }
-
if (!isShift && !isRotate && !isRotateC) {
/*NOTREACHED*/
vpanic("dis_Grp2(Reg): unhandled case(x86)");
@@ -2446,6 +2444,7 @@
switch (gregOfRM(modrm)) {
case 4: op32 = Iop_Shl32; break;
case 5: op32 = Iop_Shr32; break;
+ case 6: op32 = Iop_Shl32; break;
case 7: op32 = Iop_Sar32; break;
/*NOTREACHED*/
default: vpanic("dis_Grp2:shift"); break;
@@ -5472,9 +5471,9 @@
case 0x65: op = Iop_CmpGT16Sx4; break;
case 0x66: op = Iop_CmpGT32Sx2; break;
- case 0x6B: op = Iop_QNarrow32Sx2; eLeft = True; break;
- case 0x63: op = Iop_QNarrow16Sx4; eLeft = True; break;
- case 0x67: op = Iop_QNarrow16Ux4; eLeft = True; break;
+ case 0x6B: op = Iop_QNarrowBin32Sto16Sx4; eLeft = True; break;
+ case 0x63: op = Iop_QNarrowBin16Sto8Sx8; eLeft = True; break;
+ case 0x67: op = Iop_QNarrowBin16Sto8Ux8; eLeft = True; break;
case 0x68: op = Iop_InterleaveHI8x8; eLeft = True; break;
case 0x69: op = Iop_InterleaveHI16x4; eLeft = True; break;
@@ -8099,6 +8098,7 @@
addr = disAMode ( &alen, sorb, delta+2, dis_buf );
delta += 2+alen;
+ gen_SEGV_if_not_16_aligned(addr);
DIP("fxsave %s\n", dis_buf);
@@ -8169,11 +8169,15 @@
addr = disAMode ( &alen, sorb, delta+2, dis_buf );
delta += 2+alen;
+ gen_SEGV_if_not_16_aligned(addr);
DIP("fxrstor %s\n", dis_buf);
/* Uses dirty helper:
- void x86g_do_FXRSTOR ( VexGuestX86State*, UInt ) */
+ VexEmWarn x86g_do_FXRSTOR ( VexGuestX86State*, UInt )
+ NOTE:
+ the VexEmWarn value is simply ignored (unlike for FRSTOR)
+ */
d = unsafeIRDirty_0_N (
0/*regparms*/,
"x86g_dirtyhelper_FXRSTOR",
@@ -10528,21 +10532,24 @@
/* 66 0F 6B = PACKSSDW */
if (sz == 2 && insn[0] == 0x0F && insn[1] == 0x6B) {
delta = dis_SSEint_E_to_G( sorb, delta+2,
- "packssdw", Iop_QNarrow32Sx4, True );
+ "packssdw",
+ Iop_QNarrowBin32Sto16Sx8, True );
goto decode_success;
}
/* 66 0F 63 = PACKSSWB */
if (sz == 2 && insn[0] == 0x0F && insn[1] == 0x63) {
delta = dis_SSEint_E_to_G( sorb, delta+2,
- "packsswb", Iop_QNarrow16Sx8, True );
+ "packsswb",
+ Iop_QNarrowBin16Sto8Sx16, True );
goto decode_success;
}
/* 66 0F 67 = PACKUSWB */
if (sz == 2 && insn[0] == 0x0F && insn[1] == 0x67) {
delta = dis_SSEint_E_to_G( sorb, delta+2,
- "packuswb", Iop_QNarrow16Ux8, True );
+ "packuswb",
+ Iop_QNarrowBin16Sto8Ux16, True );
goto decode_success;
}
@@ -14999,11 +15006,12 @@
break;
}
+ case 0x0E: /* FEMMS */
case 0x77: /* EMMS */
if (sz != 4)
goto decode_failure;
do_EMMS_preamble();
- DIP("emms\n");
+ DIP("{f}emms\n");
break;
/* =-=-=-=-=-=-=-=-=- SGDT and SIDT =-=-=-=-=-=-=-=-=-=-= */
diff --git a/main/VEX/priv/host_amd64_defs.c b/main/VEX/priv/host_amd64_defs.c
index 01df33d..807ab4b 100644
--- a/main/VEX/priv/host_amd64_defs.c
+++ b/main/VEX/priv/host_amd64_defs.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -314,13 +314,16 @@
return op;
}
-void ppAMD64RMI ( AMD64RMI* op ) {
+static void ppAMD64RMI_wrk ( AMD64RMI* op, Bool lo32 ) {
switch (op->tag) {
case Armi_Imm:
vex_printf("$0x%x", op->Armi.Imm.imm32);
return;
- case Armi_Reg:
- ppHRegAMD64(op->Armi.Reg.reg);
+ case Armi_Reg:
+ if (lo32)
+ ppHRegAMD64_lo32(op->Armi.Reg.reg);
+ else
+ ppHRegAMD64(op->Armi.Reg.reg);
return;
case Armi_Mem:
ppAMD64AMode(op->Armi.Mem.am);
@@ -329,6 +332,12 @@
vpanic("ppAMD64RMI");
}
}
+void ppAMD64RMI ( AMD64RMI* op ) {
+ ppAMD64RMI_wrk(op, False/*!lo32*/);
+}
+void ppAMD64RMI_lo32 ( AMD64RMI* op ) {
+ ppAMD64RMI_wrk(op, True/*lo32*/);
+}
/* An AMD64RMI can only be used in a "read" context (what would it mean
to write or modify a literal?) and so we enumerate its registers
@@ -679,6 +688,19 @@
i->Ain.Lea64.dst = dst;
return i;
}
+AMD64Instr* AMD64Instr_Alu32R ( AMD64AluOp op, AMD64RMI* src, HReg dst ) {
+ AMD64Instr* i = LibVEX_Alloc(sizeof(AMD64Instr));
+ i->tag = Ain_Alu32R;
+ i->Ain.Alu32R.op = op;
+ i->Ain.Alu32R.src = src;
+ i->Ain.Alu32R.dst = dst;
+ switch (op) {
+ case Aalu_ADD: case Aalu_SUB: case Aalu_CMP:
+ case Aalu_AND: case Aalu_OR: case Aalu_XOR: break;
+ default: vassert(0);
+ }
+ return i;
+}
AMD64Instr* AMD64Instr_MulL ( Bool syned, AMD64RM* src ) {
AMD64Instr* i = LibVEX_Alloc(sizeof(AMD64Instr));
i->tag = Ain_MulL;
@@ -1083,6 +1105,12 @@
vex_printf(",");
ppHRegAMD64(i->Ain.Lea64.dst);
return;
+ case Ain_Alu32R:
+ vex_printf("%sl ", showAMD64AluOp(i->Ain.Alu32R.op));
+ ppAMD64RMI_lo32(i->Ain.Alu32R.src);
+ vex_printf(",");
+ ppHRegAMD64_lo32(i->Ain.Alu32R.dst);
+ return;
case Ain_MulL:
vex_printf("%cmulq ", i->Ain.MulL.syned ? 's' : 'u');
ppAMD64RM(i->Ain.MulL.src);
@@ -1423,6 +1451,15 @@
addRegUsage_AMD64AMode(u, i->Ain.Lea64.am);
addHRegUse(u, HRmWrite, i->Ain.Lea64.dst);
return;
+ case Ain_Alu32R:
+ vassert(i->Ain.Alu32R.op != Aalu_MOV);
+ addRegUsage_AMD64RMI(u, i->Ain.Alu32R.src);
+ if (i->Ain.Alu32R.op == Aalu_CMP) {
+ addHRegUse(u, HRmRead, i->Ain.Alu32R.dst);
+ return;
+ }
+ addHRegUse(u, HRmModify, i->Ain.Alu32R.dst);
+ return;
case Ain_MulL:
addRegUsage_AMD64RM(u, i->Ain.MulL.src, HRmRead);
addHRegUse(u, HRmModify, hregAMD64_RAX());
@@ -1719,6 +1756,10 @@
mapRegs_AMD64AMode(m, i->Ain.Lea64.am);
mapReg(m, &i->Ain.Lea64.dst);
return;
+ case Ain_Alu32R:
+ mapRegs_AMD64RMI(m, i->Ain.Alu32R.src);
+ mapReg(m, &i->Ain.Alu32R.dst);
+ return;
case Ain_MulL:
mapRegs_AMD64RM(m, i->Ain.MulL.src);
return;
@@ -2303,7 +2344,9 @@
imperative to emit position-independent code. */
Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64Instr* i,
- Bool mode64, void* dispatch )
+ Bool mode64,
+ void* dispatch_unassisted,
+ void* dispatch_assisted )
{
UInt /*irno,*/ opc, opc_rr, subopc_imm, opc_imma, opc_cl, opc_imm, subopc;
UInt xtra;
@@ -2325,9 +2368,20 @@
switch (i->tag) {
case Ain_Imm64:
- *p++ = toUChar(0x48 + (1 & iregBit3(i->Ain.Imm64.dst)));
- *p++ = toUChar(0xB8 + iregBits210(i->Ain.Imm64.dst));
- p = emit64(p, i->Ain.Imm64.imm64);
+ if (i->Ain.Imm64.imm64 <= 0xFFFFFULL) {
+ /* Use the short form (load into 32 bit reg, + default
+ widening rule) for constants under 1 million. We could
+ use this form for the range 0 to 0x7FFFFFFF inclusive, but
+ limit it to a smaller range for verifiability purposes. */
+ if (1 & iregBit3(i->Ain.Imm64.dst))
+ *p++ = 0x41;
+ *p++ = 0xB8 + iregBits210(i->Ain.Imm64.dst);
+ p = emit32(p, (UInt)i->Ain.Imm64.imm64);
+ } else {
+ *p++ = toUChar(0x48 + (1 & iregBit3(i->Ain.Imm64.dst)));
+ *p++ = toUChar(0xB8 + iregBits210(i->Ain.Imm64.dst));
+ p = emit64(p, i->Ain.Imm64.imm64);
+ }
goto done;
case Ain_Alu64R:
@@ -2335,7 +2389,7 @@
if (i->Ain.Alu64R.op == Aalu_MOV) {
switch (i->Ain.Alu64R.src->tag) {
case Armi_Imm:
- if (0 == (i->Ain.Alu64R.src->Armi.Imm.imm32 & ~0xFFF)) {
+ if (0 == (i->Ain.Alu64R.src->Armi.Imm.imm32 & ~0xFFFFF)) {
/* Actually we could use this form for constants in
the range 0 through 0x7FFFFFFF inclusive, but
limit it to a small range for verifiability
@@ -2573,6 +2627,69 @@
p = doAMode_M(p, i->Ain.Lea64.dst, i->Ain.Lea64.am);
goto done;
+ case Ain_Alu32R:
+ /* ADD/SUB/AND/OR/XOR/CMP */
+ opc = opc_rr = subopc_imm = opc_imma = 0;
+ switch (i->Ain.Alu32R.op) {
+ case Aalu_ADD: opc = 0x03; opc_rr = 0x01;
+ subopc_imm = 0; opc_imma = 0x05; break;
+ case Aalu_SUB: opc = 0x2B; opc_rr = 0x29;
+ subopc_imm = 5; opc_imma = 0x2D; break;
+ case Aalu_AND: opc = 0x23; opc_rr = 0x21;
+ subopc_imm = 4; opc_imma = 0x25; break;
+ case Aalu_XOR: opc = 0x33; opc_rr = 0x31;
+ subopc_imm = 6; opc_imma = 0x35; break;
+ case Aalu_OR: opc = 0x0B; opc_rr = 0x09;
+ subopc_imm = 1; opc_imma = 0x0D; break;
+ case Aalu_CMP: opc = 0x3B; opc_rr = 0x39;
+ subopc_imm = 7; opc_imma = 0x3D; break;
+ default: goto bad;
+ }
+ switch (i->Ain.Alu32R.src->tag) {
+ case Armi_Imm:
+ if (i->Ain.Alu32R.dst == hregAMD64_RAX()
+ && !fits8bits(i->Ain.Alu32R.src->Armi.Imm.imm32)) {
+ goto bad; /* FIXME: awaiting test case */
+ *p++ = toUChar(opc_imma);
+ p = emit32(p, i->Ain.Alu32R.src->Armi.Imm.imm32);
+ } else
+ if (fits8bits(i->Ain.Alu32R.src->Armi.Imm.imm32)) {
+ rex = clearWBit( rexAMode_R( fake(0), i->Ain.Alu32R.dst ) );
+ if (rex != 0x40) *p++ = rex;
+ *p++ = 0x83;
+ p = doAMode_R(p, fake(subopc_imm), i->Ain.Alu32R.dst);
+ *p++ = toUChar(0xFF & i->Ain.Alu32R.src->Armi.Imm.imm32);
+ } else {
+ rex = clearWBit( rexAMode_R( fake(0), i->Ain.Alu32R.dst) );
+ if (rex != 0x40) *p++ = rex;
+ *p++ = 0x81;
+ p = doAMode_R(p, fake(subopc_imm), i->Ain.Alu32R.dst);
+ p = emit32(p, i->Ain.Alu32R.src->Armi.Imm.imm32);
+ }
+ goto done;
+ case Armi_Reg:
+ rex = clearWBit(
+ rexAMode_R( i->Ain.Alu32R.src->Armi.Reg.reg,
+ i->Ain.Alu32R.dst) );
+ if (rex != 0x40) *p++ = rex;
+ *p++ = toUChar(opc_rr);
+ p = doAMode_R(p, i->Ain.Alu32R.src->Armi.Reg.reg,
+ i->Ain.Alu32R.dst);
+ goto done;
+ case Armi_Mem:
+ rex = clearWBit(
+ rexAMode_M( i->Ain.Alu32R.dst,
+ i->Ain.Alu32R.src->Armi.Mem.am) );
+ if (rex != 0x40) *p++ = rex;
+ *p++ = toUChar(opc);
+ p = doAMode_M(p, i->Ain.Alu32R.dst,
+ i->Ain.Alu32R.src->Armi.Mem.am);
+ goto done;
+ default:
+ goto bad;
+ }
+ break;
+
case Ain_MulL:
subopc = i->Ain.MulL.syned ? 5 : 4;
switch (i->Ain.MulL.src->tag) {
@@ -2705,7 +2822,11 @@
goto done;
}
- case Ain_Goto:
+ case Ain_Goto: {
+ void* dispatch_to_use = NULL;
+ vassert(dispatch_unassisted != NULL);
+ vassert(dispatch_assisted != NULL);
+
/* Use ptmp for backpatching conditional jumps. */
ptmp = NULL;
@@ -2721,7 +2842,10 @@
/* If a non-boring, set %rbp (the guest state pointer)
appropriately. Since these numbers are all small positive
integers, we can get away with "movl $N, %ebp" rather than
- the longer "movq $N, %rbp". */
+ the longer "movq $N, %rbp". Also, decide which dispatcher we
+ need to use. */
+ dispatch_to_use = dispatch_assisted;
+
/* movl $magic_number, %ebp */
switch (i->Ain.Goto.jk) {
case Ijk_ClientReq:
@@ -2763,6 +2887,7 @@
case Ijk_Ret:
case Ijk_Call:
case Ijk_Boring:
+ dispatch_to_use = dispatch_unassisted;
break;
default:
ppIRJumpKind(i->Ain.Goto.jk);
@@ -2790,19 +2915,18 @@
after the load of %rax since %rdx might be carrying the value
destined for %rax immediately prior to this Ain_Goto. */
vassert(sizeof(ULong) == sizeof(void*));
- vassert(dispatch != NULL);
- if (fitsIn32Bits(Ptr_to_ULong(dispatch))) {
+ if (fitsIn32Bits(Ptr_to_ULong(dispatch_to_use))) {
/* movl sign-extend(imm32), %rdx */
*p++ = 0x48;
*p++ = 0xC7;
*p++ = 0xC2;
- p = emit32(p, (UInt)Ptr_to_ULong(dispatch));
+ p = emit32(p, (UInt)Ptr_to_ULong(dispatch_to_use));
} else {
/* movabsq $imm64, %rdx */
*p++ = 0x48;
*p++ = 0xBA;
- p = emit64(p, Ptr_to_ULong(dispatch));
+ p = emit64(p, Ptr_to_ULong(dispatch_to_use));
}
/* jmp *%rdx */
*p++ = 0xFF;
@@ -2815,6 +2939,7 @@
*ptmp = toUChar(delta-1);
}
goto done;
+ }
case Ain_CMov64:
vassert(i->Ain.CMov64.cond != Acc_ALWAYS);
diff --git a/main/VEX/priv/host_amd64_defs.h b/main/VEX/priv/host_amd64_defs.h
index cf19bac..4e7ae05 100644
--- a/main/VEX/priv/host_amd64_defs.h
+++ b/main/VEX/priv/host_amd64_defs.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -189,7 +189,8 @@
extern AMD64RMI* AMD64RMI_Reg ( HReg );
extern AMD64RMI* AMD64RMI_Mem ( AMD64AMode* );
-extern void ppAMD64RMI ( AMD64RMI* );
+extern void ppAMD64RMI ( AMD64RMI* );
+extern void ppAMD64RMI_lo32 ( AMD64RMI* );
/* --------- Operand, which can be reg or immediate only. --------- */
@@ -359,6 +360,7 @@
Ain_Test64, /* 64-bit test (AND, set flags, discard result) */
Ain_Unary64, /* 64-bit not and neg */
Ain_Lea64, /* 64-bit compute EA into a reg */
+ Ain_Alu32R, /* 32-bit add/sub/and/or/xor/cmp, dst=REG (a la Alu64R) */
Ain_MulL, /* widening multiply */
Ain_Div, /* div and mod */
//.. Xin_Sh3232, /* shldl or shrdl */
@@ -449,6 +451,12 @@
AMD64AMode* am;
HReg dst;
} Lea64;
+ /* 32-bit add/sub/and/or/xor/cmp, dst=REG (a la Alu64R) */
+ struct {
+ AMD64AluOp op;
+ AMD64RMI* src;
+ HReg dst;
+ } Alu32R;
/* 64 x 64 -> 128 bit widening multiply: RDX:RAX = RAX *s/u
r/m64 */
struct {
@@ -676,6 +684,7 @@
extern AMD64Instr* AMD64Instr_Alu64M ( AMD64AluOp, AMD64RI*, AMD64AMode* );
extern AMD64Instr* AMD64Instr_Unary64 ( AMD64UnaryOp op, HReg dst );
extern AMD64Instr* AMD64Instr_Lea64 ( AMD64AMode* am, HReg dst );
+extern AMD64Instr* AMD64Instr_Alu32R ( AMD64AluOp, AMD64RMI*, HReg );
extern AMD64Instr* AMD64Instr_Sh64 ( AMD64ShiftOp, UInt, HReg );
extern AMD64Instr* AMD64Instr_Test64 ( UInt imm32, HReg dst );
extern AMD64Instr* AMD64Instr_MulL ( Bool syned, AMD64RM* );
@@ -734,7 +743,9 @@
extern void mapRegs_AMD64Instr ( HRegRemap*, AMD64Instr*, Bool );
extern Bool isMove_AMD64Instr ( AMD64Instr*, HReg*, HReg* );
extern Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64Instr*,
- Bool, void* dispatch );
+ Bool,
+ void* dispatch_unassisted,
+ void* dispatch_assisted );
extern void genSpill_AMD64 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
HReg rreg, Int offset, Bool );
diff --git a/main/VEX/priv/host_amd64_isel.c b/main/VEX/priv/host_amd64_isel.c
index 8f8e4a3..bcd213f 100644
--- a/main/VEX/priv/host_amd64_isel.c
+++ b/main/VEX/priv/host_amd64_isel.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -863,7 +863,10 @@
DECLARE_PATTERN(p_LDle16_then_16Uto64);
IRType ty = typeOfIRExpr(env->type_env,e);
- vassert(ty == Ity_I32 || Ity_I16 || Ity_I8);
+ switch (ty) {
+ case Ity_I64: case Ity_I32: case Ity_I16: case Ity_I8: break;
+ default: vassert(0);
+ }
switch (e->tag) {
@@ -1091,12 +1094,16 @@
case Iop_QAdd16Ux4:
fn = (HWord)h_generic_calc_QAdd16Ux4; break;
- case Iop_QNarrow32Sx2:
- fn = (HWord)h_generic_calc_QNarrow32Sx2; break;
- case Iop_QNarrow16Sx4:
- fn = (HWord)h_generic_calc_QNarrow16Sx4; break;
- case Iop_QNarrow16Ux4:
- fn = (HWord)h_generic_calc_QNarrow16Ux4; break;
+ case Iop_QNarrowBin32Sto16Sx4:
+ fn = (HWord)h_generic_calc_QNarrowBin32Sto16Sx4; break;
+ case Iop_QNarrowBin16Sto8Sx8:
+ fn = (HWord)h_generic_calc_QNarrowBin16Sto8Sx8; break;
+ case Iop_QNarrowBin16Sto8Ux8:
+ fn = (HWord)h_generic_calc_QNarrowBin16Sto8Ux8; break;
+ case Iop_NarrowBin16to8x8:
+ fn = (HWord)h_generic_calc_NarrowBin16to8x8; break;
+ case Iop_NarrowBin32to16x4:
+ fn = (HWord)h_generic_calc_NarrowBin32to16x4; break;
case Iop_QSub8Sx8:
fn = (HWord)h_generic_calc_QSub8Sx8; break;
@@ -1170,19 +1177,11 @@
/* Handle misc other ops. */
if (e->Iex.Binop.op == Iop_Max32U) {
- /* This generates a truly rotten piece of code. Just as well
- it doesn't happen very often. */
- HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
- HReg src1L = newVRegI(env);
- HReg src2 = iselIntExpr_R(env, e->Iex.Binop.arg2);
- HReg src2L = newVRegI(env);
- HReg dst = newVRegI(env);
- addInstr(env, mk_iMOVsd_RR(src1,dst));
- addInstr(env, mk_iMOVsd_RR(src1,src1L));
- addInstr(env, AMD64Instr_Sh64(Ash_SHL, 32, src1L));
- addInstr(env, mk_iMOVsd_RR(src2,src2L));
- addInstr(env, AMD64Instr_Sh64(Ash_SHL, 32, src2L));
- addInstr(env, AMD64Instr_Alu64R(Aalu_CMP, AMD64RMI_Reg(src2L), src1L));
+ HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
+ HReg dst = newVRegI(env);
+ HReg src2 = iselIntExpr_R(env, e->Iex.Binop.arg2);
+ addInstr(env, mk_iMOVsd_RR(src1, dst));
+ addInstr(env, AMD64Instr_Alu32R(Aalu_CMP, AMD64RMI_Reg(src2), dst));
addInstr(env, AMD64Instr_CMov64(Acc_B, AMD64RM_Reg(src2), dst));
return dst;
}
@@ -1419,6 +1418,36 @@
}
}
+ /* 32Uto64( Add32/Sub32/And32/Or32/Xor32(expr32, expr32) )
+ Use 32 bit arithmetic and let the default zero-extend rule
+ do the 32Uto64 for free. */
+ if (e->Iex.Unop.op == Iop_32Uto64 && e->Iex.Unop.arg->tag == Iex_Binop) {
+ IROp opi = e->Iex.Unop.arg->Iex.Binop.op; /* inner op */
+ IRExpr* argL = e->Iex.Unop.arg->Iex.Binop.arg1;
+ IRExpr* argR = e->Iex.Unop.arg->Iex.Binop.arg2;
+ AMD64AluOp aluOp = Aalu_INVALID;
+ switch (opi) {
+ case Iop_Add32: aluOp = Aalu_ADD; break;
+ case Iop_Sub32: aluOp = Aalu_SUB; break;
+ case Iop_And32: aluOp = Aalu_AND; break;
+ case Iop_Or32: aluOp = Aalu_OR; break;
+ case Iop_Xor32: aluOp = Aalu_XOR; break;
+ default: break;
+ }
+ if (aluOp != Aalu_INVALID) {
+ /* For commutative ops we assume any literal values are on
+ the second operand. */
+ HReg dst = newVRegI(env);
+ HReg reg = iselIntExpr_R(env, argL);
+ AMD64RMI* rmi = iselIntExpr_RMI(env, argR);
+ addInstr(env, mk_iMOVsd_RR(reg,dst));
+ addInstr(env, AMD64Instr_Alu32R(aluOp, rmi, dst));
+ return dst;
+ }
+ /* just fall through to normal handling for Iop_32Uto64 */
+ }
+
+ /* Fallback cases */
switch (e->Iex.Unop.op) {
case Iop_32Uto64:
case Iop_32Sto64: {
@@ -2173,10 +2202,8 @@
if (e->tag == Iex_Unop
&& e->Iex.Unop.op == Iop_CmpNEZ32) {
HReg r1 = iselIntExpr_R(env, e->Iex.Unop.arg);
- HReg tmp = newVRegI(env);
AMD64RMI* rmi2 = AMD64RMI_Imm(0);
- addInstr(env, AMD64Instr_MovxLQ(False, r1, tmp));
- addInstr(env, AMD64Instr_Alu64R(Aalu_CMP,rmi2,tmp));
+ addInstr(env, AMD64Instr_Alu32R(Aalu_CMP,rmi2,r1));
return Acc_NZ;
}
@@ -2246,23 +2273,24 @@
}
}
- /* CmpEQ32 / CmpNE32 */
+ /* CmpNE64(ccall, 64-bit constant) (--smc-check=all optimisation).
+ Saves a "movq %rax, %tmp" compared to the default route. */
if (e->tag == Iex_Binop
- && (e->Iex.Binop.op == Iop_CmpEQ32
- || e->Iex.Binop.op == Iop_CmpNE32
- || e->Iex.Binop.op == Iop_CasCmpEQ32
- || e->Iex.Binop.op == Iop_CasCmpNE32)) {
- HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
- AMD64RMI* rmi2 = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
- HReg r = newVRegI(env);
- addInstr(env, mk_iMOVsd_RR(r1,r));
- addInstr(env, AMD64Instr_Alu64R(Aalu_XOR,rmi2,r));
- addInstr(env, AMD64Instr_Sh64(Ash_SHL, 32, r));
- switch (e->Iex.Binop.op) {
- case Iop_CmpEQ32: case Iop_CasCmpEQ32: return Acc_Z;
- case Iop_CmpNE32: case Iop_CasCmpNE32: return Acc_NZ;
- default: vpanic("iselCondCode(amd64): CmpXX32");
- }
+ && e->Iex.Binop.op == Iop_CmpNE64
+ && e->Iex.Binop.arg1->tag == Iex_CCall
+ && e->Iex.Binop.arg2->tag == Iex_Const) {
+ IRExpr* cal = e->Iex.Binop.arg1;
+ IRExpr* con = e->Iex.Binop.arg2;
+ HReg tmp = newVRegI(env);
+ /* clone & partial-eval of generic Iex_CCall and Iex_Const cases */
+ vassert(cal->Iex.CCall.retty == Ity_I64); /* else ill-typed IR */
+ vassert(con->Iex.Const.con->tag == Ico_U64);
+ /* Marshal args, do the call. */
+ doHelperCall( env, False, NULL, cal->Iex.CCall.cee, cal->Iex.CCall.args );
+ addInstr(env, AMD64Instr_Imm64(con->Iex.Const.con->Ico.U64, tmp));
+ addInstr(env, AMD64Instr_Alu64R(Aalu_CMP,
+ AMD64RMI_Reg(hregAMD64_RAX()), tmp));
+ return Acc_NZ;
}
/* Cmp*64*(x,y) */
@@ -2289,6 +2317,30 @@
}
}
+ /* Cmp*32*(x,y) */
+ if (e->tag == Iex_Binop
+ && (e->Iex.Binop.op == Iop_CmpEQ32
+ || e->Iex.Binop.op == Iop_CmpNE32
+ || e->Iex.Binop.op == Iop_CmpLT32S
+ || e->Iex.Binop.op == Iop_CmpLT32U
+ || e->Iex.Binop.op == Iop_CmpLE32S
+ || e->Iex.Binop.op == Iop_CmpLE32U
+ || e->Iex.Binop.op == Iop_CasCmpEQ32
+ || e->Iex.Binop.op == Iop_CasCmpNE32)) {
+ HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
+ AMD64RMI* rmi2 = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
+ addInstr(env, AMD64Instr_Alu32R(Aalu_CMP,rmi2,r1));
+ switch (e->Iex.Binop.op) {
+ case Iop_CmpEQ32: case Iop_CasCmpEQ32: return Acc_Z;
+ case Iop_CmpNE32: case Iop_CasCmpNE32: return Acc_NZ;
+ case Iop_CmpLT32S: return Acc_L;
+ case Iop_CmpLT32U: return Acc_B;
+ case Iop_CmpLE32S: return Acc_LE;
+ case Iop_CmpLE32U: return Acc_BE;
+ default: vpanic("iselCondCode(amd64): CmpXX32");
+ }
+ }
+
ppIRExpr(e);
vpanic("iselCondCode(amd64)");
}
@@ -3496,11 +3548,11 @@
return dst;
}
- case Iop_QNarrow32Sx4:
+ case Iop_QNarrowBin32Sto16Sx8:
op = Asse_PACKSSD; arg1isEReg = True; goto do_SseReRg;
- case Iop_QNarrow16Sx8:
+ case Iop_QNarrowBin16Sto8Sx16:
op = Asse_PACKSSW; arg1isEReg = True; goto do_SseReRg;
- case Iop_QNarrow16Ux8:
+ case Iop_QNarrowBin16Sto8Ux16:
op = Asse_PACKUSW; arg1isEReg = True; goto do_SseReRg;
case Iop_InterleaveHI8x16:
@@ -3610,8 +3662,19 @@
goto do_SseAssistedBinary;
case Iop_Min8Sx16: fn = (HWord)h_generic_calc_Min8Sx16;
goto do_SseAssistedBinary;
+ case Iop_CmpEQ64x2: fn = (HWord)h_generic_calc_CmpEQ64x2;
+ goto do_SseAssistedBinary;
case Iop_CmpGT64Sx2: fn = (HWord)h_generic_calc_CmpGT64Sx2;
goto do_SseAssistedBinary;
+ case Iop_QNarrowBin32Sto16Ux8:
+ fn = (HWord)h_generic_calc_QNarrowBin32Sto16Ux8;
+ goto do_SseAssistedBinary;
+ case Iop_NarrowBin16to8x16:
+ fn = (HWord)h_generic_calc_NarrowBin16to8x16;
+ goto do_SseAssistedBinary;
+ case Iop_NarrowBin32to16x8:
+ fn = (HWord)h_generic_calc_NarrowBin32to16x8;
+ goto do_SseAssistedBinary;
do_SseAssistedBinary: {
/* RRRufff! RRRufff code is what we're generating here. Oh
well. */
diff --git a/main/VEX/priv/host_arm_defs.c b/main/VEX/priv/host_arm_defs.c
index db1e9c9..fc3c02c 100644
--- a/main/VEX/priv/host_arm_defs.c
+++ b/main/VEX/priv/host_arm_defs.c
@@ -7,11 +7,11 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
NEON support is
- Copyright (C) 2010-2010 Samsung Electronics
+ Copyright (C) 2010-2011 Samsung Electronics
contributed by Dmitry Zhurikhin <zhur@ispras.ru>
and Kirill Batuzov <batuzovk@ispras.ru>
@@ -588,7 +588,7 @@
return x;
case 10:
x |= (x & 0x80) << 5;
- x |= ~(x & 0x40) << 5;
+ x |= (~x & 0x40) << 5;
x &= 0x187F; /* 0001 1000 0111 1111 */
x |= (x & 0x40) << 4;
x |= (x & 0x40) << 3;
@@ -1206,14 +1206,14 @@
ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
i->tag = ARMin_LdrEX;
i->ARMin.LdrEX.szB = szB;
- vassert(szB == 8 || szB == 4 || szB == 1);
+ vassert(szB == 8 || szB == 4 || szB == 2 || szB == 1);
return i;
}
ARMInstr* ARMInstr_StrEX ( Int szB ) {
ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
i->tag = ARMin_StrEX;
i->ARMin.StrEX.szB = szB;
- vassert(szB == 8 || szB == 4 || szB == 1);
+ vassert(szB == 8 || szB == 4 || szB == 2 || szB == 1);
return i;
}
ARMInstr* ARMInstr_VLdStD ( Bool isLoad, HReg dD, ARMAModeV* am ) {
@@ -1338,6 +1338,11 @@
i->tag = ARMin_MFence;
return i;
}
+ARMInstr* ARMInstr_CLREX( void ) {
+ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
+ i->tag = ARMin_CLREX;
+ return i;
+}
ARMInstr* ARMInstr_NLdStQ ( Bool isLoad, HReg dQ, ARMAModeN *amode ) {
ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
@@ -1369,7 +1374,7 @@
return i;
}
-ARMInstr* ARMInstr_NUnaryS ( ARMNeonUnOp op, ARMNRS* dst, ARMNRS* src,
+ARMInstr* ARMInstr_NUnaryS ( ARMNeonUnOpS op, ARMNRS* dst, ARMNRS* src,
UInt size, Bool Q ) {
ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
i->tag = ARMin_NUnaryS;
@@ -1603,24 +1608,28 @@
vex_printf("r1:r0, r2, r3");
}
return;
- case ARMin_LdrEX:
- if (i->ARMin.LdrEX.szB == 8) {
- vex_printf("ldrexd r2, r3, [r0]");
- } else {
- vex_printf("ldrex%s ", i->ARMin.LdrEX.szB == 1 ? "b"
- : i->ARMin.LdrEX.szB == 2 ? "h" : "");
- vex_printf("r2, [r0]");
- }
+ case ARMin_LdrEX: {
+ HChar* sz = "";
+ switch (i->ARMin.LdrEX.szB) {
+ case 1: sz = "b"; break; case 2: sz = "h"; break;
+ case 8: sz = "d"; break; case 4: break;
+ default: vassert(0);
+ }
+ vex_printf("ldrex%s %sr2, [r4]",
+ sz, i->ARMin.LdrEX.szB == 8 ? "r3:" : "");
return;
- case ARMin_StrEX:
- if (i->ARMin.StrEX.szB == 8) {
- vex_printf("strexd r1, r2, r3, [r0]");
- } else {
- vex_printf("strex%s ", i->ARMin.StrEX.szB == 1 ? "b"
- : i->ARMin.StrEX.szB == 2 ? "h" : "");
- vex_printf("r1, r2, [r0]");
- }
+ }
+ case ARMin_StrEX: {
+ HChar* sz = "";
+ switch (i->ARMin.StrEX.szB) {
+ case 1: sz = "b"; break; case 2: sz = "h"; break;
+ case 8: sz = "d"; break; case 4: break;
+ default: vassert(0);
+ }
+ vex_printf("strex%s r0, %sr2, [r4]",
+ sz, i->ARMin.StrEX.szB == 8 ? "r3:" : "");
return;
+ }
case ARMin_VLdStD:
if (i->ARMin.VLdStD.isLoad) {
vex_printf("fldd ");
@@ -1755,6 +1764,9 @@
vex_printf("mfence (mcr 15,0,r0,c7,c10,4; 15,0,r0,c7,c10,5; "
"15,0,r0,c7,c5,4)");
return;
+ case ARMin_CLREX:
+ vex_printf("clrex");
+ return;
case ARMin_NLdStQ:
if (i->ARMin.NLdStQ.isLoad)
vex_printf("vld1.32 {");
@@ -1807,8 +1819,8 @@
return;
case ARMin_NUnaryS:
vex_printf("%s%s%s ",
- showARMNeonUnOpS(i->ARMin.NUnary.op),
- showARMNeonUnOpSDataType(i->ARMin.NUnary.op),
+ showARMNeonUnOpS(i->ARMin.NUnaryS.op),
+ showARMNeonUnOpSDataType(i->ARMin.NUnaryS.op),
showARMNeonDataSize(i));
ppARMNRS(i->ARMin.NUnaryS.dst);
vex_printf(", ");
@@ -1997,14 +2009,14 @@
addHRegUse(u, HRmWrite, hregARM_R1());
return;
case ARMin_LdrEX:
- addHRegUse(u, HRmRead, hregARM_R0());
+ addHRegUse(u, HRmRead, hregARM_R4());
addHRegUse(u, HRmWrite, hregARM_R2());
if (i->ARMin.LdrEX.szB == 8)
addHRegUse(u, HRmWrite, hregARM_R3());
return;
case ARMin_StrEX:
- addHRegUse(u, HRmRead, hregARM_R0());
- addHRegUse(u, HRmWrite, hregARM_R1());
+ addHRegUse(u, HRmRead, hregARM_R4());
+ addHRegUse(u, HRmWrite, hregARM_R0());
addHRegUse(u, HRmRead, hregARM_R2());
if (i->ARMin.StrEX.szB == 8)
addHRegUse(u, HRmRead, hregARM_R3());
@@ -2093,6 +2105,8 @@
return;
case ARMin_MFence:
return;
+ case ARMin_CLREX:
+ return;
case ARMin_NLdStQ:
if (i->ARMin.NLdStQ.isLoad)
addHRegUse(u, HRmWrite, i->ARMin.NLdStQ.dQ);
@@ -2271,6 +2285,8 @@
return;
case ARMin_MFence:
return;
+ case ARMin_CLREX:
+ return;
case ARMin_NLdStQ:
i->ARMin.NLdStQ.dQ = lookupHRegRemap(m, i->ARMin.NLdStQ.dQ);
mapRegs_ARMAModeN(m, i->ARMin.NLdStQ.amode);
@@ -2349,11 +2365,17 @@
return True;
}
break;
+ case ARMin_NUnary:
+ if (i->ARMin.NUnary.op == ARMneon_COPY) {
+ *src = i->ARMin.NUnary.src;
+ *dst = i->ARMin.NUnary.dst;
+ return True;
+ }
+ break;
default:
break;
}
- // todo: float, vector moves
return False;
}
@@ -2684,14 +2706,13 @@
Int emit_ARMInstr ( UChar* buf, Int nbuf, ARMInstr* i,
- Bool mode64, void* dispatch )
+ Bool mode64,
+ void* dispatch_unassisted, void* dispatch_assisted )
{
UInt* p = (UInt*)buf;
vassert(nbuf >= 32);
vassert(mode64 == False);
vassert(0 == (((HWord)buf) & 3));
- /* since we branch to lr(r13) to get back to dispatch: */
- vassert(dispatch == NULL);
switch (i->tag) {
case ARMin_Alu: {
@@ -2879,6 +2900,9 @@
ARMCondCode cond = i->ARMin.Goto.cond;
UInt rnext = iregNo(i->ARMin.Goto.gnext);
Int trc = -1;
+ /* since we branch to lr(r13) to get back to dispatch: */
+ vassert(dispatch_unassisted == NULL);
+ vassert(dispatch_assisted == NULL);
switch (jk) {
case Ijk_Ret: case Ijk_Call: case Ijk_Boring:
break; /* no need to set GST in these common cases */
@@ -2971,31 +2995,31 @@
goto bad;
}
case ARMin_LdrEX: {
- /* E1B01F9F ldrexd r2, r3, [r0]
- E1901F9F ldrex r2, [r0]
- E1F01F9F ldrexh r2, [r0]
- E1D01F9F ldrexb r2, [r0]
+ /* E1D42F9F ldrexb r2, [r4]
+ E1F42F9F ldrexh r2, [r4]
+ E1942F9F ldrex r2, [r4]
+ E1B42F9F ldrexd r2, r3, [r4]
*/
switch (i->ARMin.LdrEX.szB) {
- case 8: *p++ = 0xE1B02F9F; goto done;
- case 4: *p++ = 0xE1902F9F; goto done;
- //case 2: *p++ = 0xE1F02F9F; goto done;
- case 1: *p++ = 0xE1D02F9F; goto done;
+ case 1: *p++ = 0xE1D42F9F; goto done;
+ case 2: *p++ = 0xE1F42F9F; goto done;
+ case 4: *p++ = 0xE1942F9F; goto done;
+ case 8: *p++ = 0xE1B42F9F; goto done;
default: break;
}
goto bad;
}
case ARMin_StrEX: {
- /* E1A01F92 strexd r1, r2, r3, [r0]
- E1801F92 strex r1, r2, [r0]
- E1E01F92 strexh r1, r2, [r0]
- E1C01F92 strexb r1, r2, [r0]
+ /* E1C40F92 strexb r0, r2, [r4]
+ E1E40F92 strexh r0, r2, [r4]
+ E1840F92 strex r0, r2, [r4]
+ E1A40F92 strexd r0, r2, r3, [r4]
*/
switch (i->ARMin.StrEX.szB) {
- case 8: *p++ = 0xE1A01F92; goto done;
- case 4: *p++ = 0xE1801F92; goto done;
- //case 2: *p++ = 0xE1E01F92; goto done;
- case 1: *p++ = 0xE1C01F92; goto done;
+ case 1: *p++ = 0xE1C40F92; goto done;
+ case 2: *p++ = 0xE1E40F92; goto done;
+ case 4: *p++ = 0xE1840F92; goto done;
+ case 8: *p++ = 0xE1A40F92; goto done;
default: break;
}
goto bad;
@@ -3276,6 +3300,11 @@
*p++ = 0xEE070F95; /* mcr 15,0,r0,c7,c5,4 (ISB) */
goto done;
}
+ case ARMin_CLREX: {
+ *p++ = 0xF57FF01F; /* clrex */
+ goto done;
+ }
+
case ARMin_NLdStQ: {
UInt regD = qregNo(i->ARMin.NLdStQ.dQ) << 1;
UInt regN, regM;
diff --git a/main/VEX/priv/host_arm_defs.h b/main/VEX/priv/host_arm_defs.h
index 1901e80..0dea3f5 100644
--- a/main/VEX/priv/host_arm_defs.h
+++ b/main/VEX/priv/host_arm_defs.h
@@ -1,4 +1,3 @@
-
/*---------------------------------------------------------------*/
/*--- begin host_arm_defs.h ---*/
/*---------------------------------------------------------------*/
@@ -7,7 +6,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -587,6 +586,7 @@
ARMin_VCvtID,
ARMin_FPSCR,
ARMin_MFence,
+ ARMin_CLREX,
/* Neon */
ARMin_NLdStQ,
ARMin_NLdStD,
@@ -709,18 +709,21 @@
struct {
ARMMulOp op;
} Mul;
- /* LDREX{,H,B} r0, [r1]
+ /* LDREX{,H,B} r2, [r4] and
+ LDREXD r2, r3, [r4] (on LE hosts, transferred value is r3:r2)
Again, hardwired registers since this is not performance
critical, and there are possibly constraints on the
registers that we can't express in the register allocator.*/
struct {
- Int szB; /* currently only 4 is allowed */
+ Int szB; /* 1, 2, 4 or 8 */
} LdrEX;
- /* STREX{,H,B} r0, r1, [r2]
- r0 = SC( [r2] = r1 )
+ /* STREX{,H,B} r0, r2, [r4] and
+ STREXD r0, r2, r3, [r4] (on LE hosts, transferred value is r3:r2)
+ r0 = SC( [r4] = r2 ) (8, 16, 32 bit transfers)
+ r0 = SC( [r4] = r3:r2) (64 bit transfers)
Ditto comment re fixed registers. */
struct {
- Int szB; /* currently only 4 is allowed */
+ Int szB; /* 1, 2, 4 or 8 */
} StrEX;
/* VFP INSTRUCTIONS */
/* 64-bit Fp load/store */
@@ -824,6 +827,9 @@
*/
struct {
} MFence;
+ /* A CLREX instruction. */
+ struct {
+ } CLREX;
/* Neon data processing instruction: 3 registers of the same
length */
struct {
@@ -937,10 +943,11 @@
HReg dst, HReg src );
extern ARMInstr* ARMInstr_FPSCR ( Bool toFPSCR, HReg iReg );
extern ARMInstr* ARMInstr_MFence ( void );
+extern ARMInstr* ARMInstr_CLREX ( void );
extern ARMInstr* ARMInstr_NLdStQ ( Bool isLoad, HReg, ARMAModeN* );
extern ARMInstr* ARMInstr_NLdStD ( Bool isLoad, HReg, ARMAModeN* );
extern ARMInstr* ARMInstr_NUnary ( ARMNeonUnOp, HReg, HReg, UInt, Bool );
-extern ARMInstr* ARMInstr_NUnaryS ( ARMNeonUnOp, ARMNRS*, ARMNRS*,
+extern ARMInstr* ARMInstr_NUnaryS ( ARMNeonUnOpS, ARMNRS*, ARMNRS*,
UInt, Bool );
extern ARMInstr* ARMInstr_NDual ( ARMNeonDualOp, HReg, HReg, UInt, Bool );
extern ARMInstr* ARMInstr_NBinary ( ARMNeonBinOp, HReg, HReg, HReg,
@@ -960,7 +967,9 @@
extern void mapRegs_ARMInstr ( HRegRemap*, ARMInstr*, Bool );
extern Bool isMove_ARMInstr ( ARMInstr*, HReg*, HReg* );
extern Int emit_ARMInstr ( UChar* buf, Int nbuf, ARMInstr*,
- Bool, void* dispatch );
+ Bool,
+ void* dispatch_unassisted,
+ void* dispatch_assisted );
extern void genSpill_ARM ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
HReg rreg, Int offset, Bool );
diff --git a/main/VEX/priv/host_arm_isel.c b/main/VEX/priv/host_arm_isel.c
index 45c6f37..e695567 100644
--- a/main/VEX/priv/host_arm_isel.c
+++ b/main/VEX/priv/host_arm_isel.c
@@ -7,11 +7,11 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
NEON support is
- Copyright (C) 2010-2010 Samsung Electronics
+ Copyright (C) 2010-2011 Samsung Electronics
contributed by Dmitry Zhurikhin <zhur@ispras.ru>
and Kirill Batuzov <batuzovk@ispras.ru>
@@ -211,8 +211,8 @@
static ARMAModeV* iselIntExpr_AModeV_wrk ( ISelEnv* env, IRExpr* e );
static ARMAModeV* iselIntExpr_AModeV ( ISelEnv* env, IRExpr* e );
-static ARMAModeN* iselIntExpr_AModeN_wrk ( ISelEnv* env, IRExpr* e );
-static ARMAModeN* iselIntExpr_AModeN ( ISelEnv* env, IRExpr* e );
+static ARMAModeN* iselIntExpr_AModeN_wrk ( ISelEnv* env, IRExpr* e );
+static ARMAModeN* iselIntExpr_AModeN ( ISelEnv* env, IRExpr* e );
static ARMRI84* iselIntExpr_RI84_wrk
( /*OUT*/Bool* didInv, Bool mayInv, ISelEnv* env, IRExpr* e );
@@ -3351,64 +3351,64 @@
addInstr(env, ARMInstr_NUnary(ARMneon_NOT, res, tmp, 4, False));
return res;
}
- case Iop_Shorten16x8:
- case Iop_Shorten32x4:
- case Iop_Shorten64x2: {
+ case Iop_NarrowUn16to8x8:
+ case Iop_NarrowUn32to16x4:
+ case Iop_NarrowUn64to32x2: {
HReg res = newVRegD(env);
HReg arg = iselNeonExpr(env, e->Iex.Unop.arg);
UInt size = 0;
switch(e->Iex.Binop.op) {
- case Iop_Shorten16x8: size = 0; break;
- case Iop_Shorten32x4: size = 1; break;
- case Iop_Shorten64x2: size = 2; break;
+ case Iop_NarrowUn16to8x8: size = 0; break;
+ case Iop_NarrowUn32to16x4: size = 1; break;
+ case Iop_NarrowUn64to32x2: size = 2; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_COPYN,
res, arg, size, False));
return res;
}
- case Iop_QShortenS16Sx8:
- case Iop_QShortenS32Sx4:
- case Iop_QShortenS64Sx2: {
+ case Iop_QNarrowUn16Sto8Sx8:
+ case Iop_QNarrowUn32Sto16Sx4:
+ case Iop_QNarrowUn64Sto32Sx2: {
HReg res = newVRegD(env);
HReg arg = iselNeonExpr(env, e->Iex.Unop.arg);
UInt size = 0;
switch(e->Iex.Binop.op) {
- case Iop_QShortenS16Sx8: size = 0; break;
- case Iop_QShortenS32Sx4: size = 1; break;
- case Iop_QShortenS64Sx2: size = 2; break;
+ case Iop_QNarrowUn16Sto8Sx8: size = 0; break;
+ case Iop_QNarrowUn32Sto16Sx4: size = 1; break;
+ case Iop_QNarrowUn64Sto32Sx2: size = 2; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_COPYQNSS,
res, arg, size, False));
return res;
}
- case Iop_QShortenU16Sx8:
- case Iop_QShortenU32Sx4:
- case Iop_QShortenU64Sx2: {
+ case Iop_QNarrowUn16Sto8Ux8:
+ case Iop_QNarrowUn32Sto16Ux4:
+ case Iop_QNarrowUn64Sto32Ux2: {
HReg res = newVRegD(env);
HReg arg = iselNeonExpr(env, e->Iex.Unop.arg);
UInt size = 0;
switch(e->Iex.Binop.op) {
- case Iop_QShortenU16Sx8: size = 0; break;
- case Iop_QShortenU32Sx4: size = 1; break;
- case Iop_QShortenU64Sx2: size = 2; break;
+ case Iop_QNarrowUn16Sto8Ux8: size = 0; break;
+ case Iop_QNarrowUn32Sto16Ux4: size = 1; break;
+ case Iop_QNarrowUn64Sto32Ux2: size = 2; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_COPYQNUS,
res, arg, size, False));
return res;
}
- case Iop_QShortenU16Ux8:
- case Iop_QShortenU32Ux4:
- case Iop_QShortenU64Ux2: {
+ case Iop_QNarrowUn16Uto8Ux8:
+ case Iop_QNarrowUn32Uto16Ux4:
+ case Iop_QNarrowUn64Uto32Ux2: {
HReg res = newVRegD(env);
HReg arg = iselNeonExpr(env, e->Iex.Unop.arg);
UInt size = 0;
switch(e->Iex.Binop.op) {
- case Iop_QShortenU16Ux8: size = 0; break;
- case Iop_QShortenU32Ux4: size = 1; break;
- case Iop_QShortenU64Ux2: size = 2; break;
+ case Iop_QNarrowUn16Uto8Ux8: size = 0; break;
+ case Iop_QNarrowUn32Uto16Ux4: size = 1; break;
+ case Iop_QNarrowUn64Uto32Ux2: size = 2; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_COPYQNUU,
@@ -3974,32 +3974,32 @@
addInstr(env, ARMInstr_NUnary(ARMneon_NOT, res, tmp, 4, True));
return res;
}
- case Iop_Longen8Ux8:
- case Iop_Longen16Ux4:
- case Iop_Longen32Ux2: {
+ case Iop_Widen8Uto16x8:
+ case Iop_Widen16Uto32x4:
+ case Iop_Widen32Uto64x2: {
HReg res = newVRegV(env);
HReg arg = iselNeon64Expr(env, e->Iex.Unop.arg);
UInt size;
switch (e->Iex.Unop.op) {
- case Iop_Longen8Ux8: size = 0; break;
- case Iop_Longen16Ux4: size = 1; break;
- case Iop_Longen32Ux2: size = 2; break;
+ case Iop_Widen8Uto16x8: size = 0; break;
+ case Iop_Widen16Uto32x4: size = 1; break;
+ case Iop_Widen32Uto64x2: size = 2; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_COPYLU,
res, arg, size, True));
return res;
}
- case Iop_Longen8Sx8:
- case Iop_Longen16Sx4:
- case Iop_Longen32Sx2: {
+ case Iop_Widen8Sto16x8:
+ case Iop_Widen16Sto32x4:
+ case Iop_Widen32Sto64x2: {
HReg res = newVRegV(env);
HReg arg = iselNeon64Expr(env, e->Iex.Unop.arg);
UInt size;
switch (e->Iex.Unop.op) {
- case Iop_Longen8Sx8: size = 0; break;
- case Iop_Longen16Sx4: size = 1; break;
- case Iop_Longen32Sx2: size = 2; break;
+ case Iop_Widen8Sto16x8: size = 0; break;
+ case Iop_Widen16Sto32x4: size = 1; break;
+ case Iop_Widen32Sto64x2: size = 2; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_COPYLS,
@@ -4217,7 +4217,42 @@
}
}
}
- /* Does not match "VMOV Reg, Imm" form */
+ /* Does not match "VMOV Reg, Imm" form. We'll have to do
+ it the slow way. */
+ {
+ /* local scope */
+ /* Done via the stack for ease of use. */
+ /* FIXME: assumes little endian host */
+ HReg w3, w2, w1, w0;
+ HReg res = newVRegV(env);
+ ARMAMode1* sp_0 = ARMAMode1_RI(hregARM_R13(), 0);
+ ARMAMode1* sp_4 = ARMAMode1_RI(hregARM_R13(), 4);
+ ARMAMode1* sp_8 = ARMAMode1_RI(hregARM_R13(), 8);
+ ARMAMode1* sp_12 = ARMAMode1_RI(hregARM_R13(), 12);
+ ARMRI84* c_16 = ARMRI84_I84(16,0);
+ /* Make space for SP */
+ addInstr(env, ARMInstr_Alu(ARMalu_SUB, hregARM_R13(),
+ hregARM_R13(), c_16));
+
+ /* Store the less significant 64 bits */
+ iselInt64Expr(&w1, &w0, env, e->Iex.Binop.arg2);
+ addInstr(env, ARMInstr_LdSt32(False/*store*/, w0, sp_0));
+ addInstr(env, ARMInstr_LdSt32(False/*store*/, w1, sp_4));
+
+ /* Store the more significant 64 bits */
+ iselInt64Expr(&w3, &w2, env, e->Iex.Binop.arg1);
+ addInstr(env, ARMInstr_LdSt32(False/*store*/, w2, sp_8));
+ addInstr(env, ARMInstr_LdSt32(False/*store*/, w3, sp_12));
+
+ /* Load result back from stack. */
+ addInstr(env, ARMInstr_NLdStQ(True/*load*/, res,
+ mkARMAModeN_R(hregARM_R13())));
+
+ /* Restore SP */
+ addInstr(env, ARMInstr_Alu(ARMalu_ADD, hregARM_R13(),
+ hregARM_R13(), c_16));
+ return res;
+ } /* local scope */
goto neon_expr_bad;
case Iop_AndV128: {
HReg res = newVRegV(env);
@@ -5820,84 +5855,86 @@
/* LL */
IRTemp res = stmt->Ist.LLSC.result;
IRType ty = typeOfIRTemp(env->type_env, res);
- if (ty == Ity_I32 || ty == Ity_I8) {
+ if (ty == Ity_I32 || ty == Ity_I16 || ty == Ity_I8) {
Int szB = 0;
HReg r_dst = lookupIRTemp(env, res);
HReg raddr = iselIntExpr_R(env, stmt->Ist.LLSC.addr);
switch (ty) {
case Ity_I8: szB = 1; break;
+ case Ity_I16: szB = 2; break;
case Ity_I32: szB = 4; break;
default: vassert(0);
}
- addInstr(env, mk_iMOVds_RR(hregARM_R0(), raddr));
+ addInstr(env, mk_iMOVds_RR(hregARM_R4(), raddr));
addInstr(env, ARMInstr_LdrEX(szB));
addInstr(env, mk_iMOVds_RR(r_dst, hregARM_R2()));
return;
- } else if (ty == Ity_I64) {
+ }
+ if (ty == Ity_I64) {
HReg raddr = iselIntExpr_R(env, stmt->Ist.LLSC.addr);
- addInstr(env, mk_iMOVds_RR(hregARM_R0(), raddr));
- addInstr(env, ARMInstr_LdrEX(8 /* 64-bit */));
+ addInstr(env, mk_iMOVds_RR(hregARM_R4(), raddr));
+ addInstr(env, ARMInstr_LdrEX(8));
+ /* Result is in r3:r2. On a non-NEON capable CPU, we must
+ move it into a result register pair. On a NEON capable
+ CPU, the result register will be a 64 bit NEON
+ register, so we must move it there instead. */
if (arm_hwcaps & VEX_HWCAPS_ARM_NEON) {
- HReg tmp = lookupIRTemp(env, res);
- addInstr(env, ARMInstr_VXferD(True, tmp, hregARM_R2(),
- hregARM_R3()));
+ HReg dst = lookupIRTemp(env, res);
+ addInstr(env, ARMInstr_VXferD(True, dst, hregARM_R3(),
+ hregARM_R2()));
} else {
- HReg dstHi, dstLo;
- /* The returned value is in r1:r0. Park it in the
- register-pair associated with tmp. */
- lookupIRTemp64( &dstHi, &dstLo, env, res);
- addInstr(env, mk_iMOVds_RR(dstHi, hregARM_R2()) );
- addInstr(env, mk_iMOVds_RR(dstLo, hregARM_R3()) );
+ HReg r_dst_hi, r_dst_lo;
+ lookupIRTemp64(&r_dst_hi, &r_dst_lo, env, res);
+ addInstr(env, mk_iMOVds_RR(r_dst_lo, hregARM_R2()));
+ addInstr(env, mk_iMOVds_RR(r_dst_hi, hregARM_R3()));
}
return;
}
- /* else fall thru; is unhandled */
+ /*NOTREACHED*/
+ vassert(0);
} else {
/* SC */
- IRTemp res = stmt->Ist.LLSC.result;
- IRType ty = typeOfIRTemp(env->type_env, res);
IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.LLSC.storedata);
- vassert(ty == Ity_I1);
- if (tyd == Ity_I32 || tyd == Ity_I8) {
- Int szB = 0;
- HReg r_res = lookupIRTemp(env, res);
- HReg rD = iselIntExpr_R(env, stmt->Ist.LLSC.storedata);
- HReg rA = iselIntExpr_R(env, stmt->Ist.LLSC.addr);
- ARMRI84* one = ARMRI84_I84(1,0);
+ if (tyd == Ity_I32 || tyd == Ity_I16 || tyd == Ity_I8) {
+ Int szB = 0;
+ HReg rD = iselIntExpr_R(env, stmt->Ist.LLSC.storedata);
+ HReg rA = iselIntExpr_R(env, stmt->Ist.LLSC.addr);
switch (tyd) {
case Ity_I8: szB = 1; break;
+ case Ity_I16: szB = 2; break;
case Ity_I32: szB = 4; break;
default: vassert(0);
}
- addInstr(env, mk_iMOVds_RR(hregARM_R0(), rA));
addInstr(env, mk_iMOVds_RR(hregARM_R2(), rD));
+ addInstr(env, mk_iMOVds_RR(hregARM_R4(), rA));
addInstr(env, ARMInstr_StrEX(szB));
- /* now r1 is 1 if failed, 0 if success. Change to IR
- conventions (0 is fail, 1 is success). Also transfer
- result to r_res. */
- addInstr(env, ARMInstr_Alu(ARMalu_XOR, r_res, hregARM_R1(), one));
- /* And be conservative -- mask off all but the lowest bit */
- addInstr(env, ARMInstr_Alu(ARMalu_AND, r_res, r_res, one));
- return;
- } else if (tyd == Ity_I64) {
- HReg r_res = lookupIRTemp(env, res);
- HReg rA = iselIntExpr_R(env, stmt->Ist.LLSC.addr);
- ARMRI84* one = ARMRI84_I84(1,0);
- HReg rDHi, rDLo;
- iselInt64Expr(&rDHi, &rDLo, env, stmt->Ist.LLSC.storedata);
- addInstr(env, mk_iMOVds_RR(hregARM_R0(), rA));
- addInstr(env, mk_iMOVds_RR(hregARM_R2(), rDHi));
- addInstr(env, mk_iMOVds_RR(hregARM_R3(), rDLo));
- addInstr(env, ARMInstr_StrEX(8 /* 64-bit */));
- /* now r1 is 1 if failed, 0 if success. Change to IR
- conventions (0 is fail, 1 is success). Also transfer
- result to r_res. */
- addInstr(env, ARMInstr_Alu(ARMalu_XOR, r_res, hregARM_R1(), one));
- /* And be conservative -- mask off all but the lowest bit */
- addInstr(env, ARMInstr_Alu(ARMalu_AND, r_res, r_res, one));
- return;
+ } else {
+ vassert(tyd == Ity_I64);
+ /* This is really ugly. There is no is/is-not NEON
+ decision akin to the case for LL, because iselInt64Expr
+ fudges this for us, and always gets the result into two
+ GPRs even if this means moving it from a NEON
+ register. */
+ HReg rDhi, rDlo;
+ iselInt64Expr(&rDhi, &rDlo, env, stmt->Ist.LLSC.storedata);
+ HReg rA = iselIntExpr_R(env, stmt->Ist.LLSC.addr);
+ addInstr(env, mk_iMOVds_RR(hregARM_R2(), rDlo));
+ addInstr(env, mk_iMOVds_RR(hregARM_R3(), rDhi));
+ addInstr(env, mk_iMOVds_RR(hregARM_R4(), rA));
+ addInstr(env, ARMInstr_StrEX(8));
}
- /* else fall thru; is unhandled */
+ /* now r0 is 1 if failed, 0 if success. Change to IR
+ conventions (0 is fail, 1 is success). Also transfer
+ result to r_res. */
+ IRTemp res = stmt->Ist.LLSC.result;
+ IRType ty = typeOfIRTemp(env->type_env, res);
+ HReg r_res = lookupIRTemp(env, res);
+ ARMRI84* one = ARMRI84_I84(1,0);
+ vassert(ty == Ity_I1);
+ addInstr(env, ARMInstr_Alu(ARMalu_XOR, r_res, hregARM_R0(), one));
+ /* And be conservative -- mask off all but the lowest bit */
+ addInstr(env, ARMInstr_Alu(ARMalu_AND, r_res, r_res, one));
+ return;
}
break;
}
@@ -5906,7 +5943,10 @@
case Ist_MBE:
switch (stmt->Ist.MBE.event) {
case Imbe_Fence:
- addInstr(env,ARMInstr_MFence());
+ addInstr(env, ARMInstr_MFence());
+ return;
+ case Imbe_CancelReservation:
+ addInstr(env, ARMInstr_CLREX());
return;
default:
break;
@@ -5977,7 +6017,6 @@
HReg hreg, hregHI;
ISelEnv* env;
UInt hwcaps_host = archinfo_host->hwcaps;
- Bool neon = False;
static UInt counter = 0;
/* sanity ... */
@@ -6015,7 +6054,6 @@
case Ity_I64:
if (arm_hwcaps & VEX_HWCAPS_ARM_NEON) {
hreg = mkHReg(j++, HRcFlt64, True);
- neon = True;
} else {
hregHI = mkHReg(j++, HRcInt32, True);
hreg = mkHReg(j++, HRcInt32, True);
@@ -6023,8 +6061,7 @@
break;
case Ity_F32: hreg = mkHReg(j++, HRcFlt32, True); break;
case Ity_F64: hreg = mkHReg(j++, HRcFlt64, True); break;
- case Ity_V128: hreg = mkHReg(j++, HRcVec128, True);
- neon = True; break;
+ case Ity_V128: hreg = mkHReg(j++, HRcVec128, True); break;
default: ppIRType(bb->tyenv->types[i]);
vpanic("iselBB: IRTemp type");
}
diff --git a/main/VEX/priv/host_generic_reg_alloc2.c b/main/VEX/priv/host_generic_reg_alloc2.c
index 48303ff..5052d9d 100644
--- a/main/VEX/priv/host_generic_reg_alloc2.c
+++ b/main/VEX/priv/host_generic_reg_alloc2.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/priv/host_generic_regs.c b/main/VEX/priv/host_generic_regs.c
index e36b4dc..713add9 100644
--- a/main/VEX/priv/host_generic_regs.c
+++ b/main/VEX/priv/host_generic_regs.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -166,7 +166,7 @@
if (!hregIsVirtual(orig))
vpanic("addToHRegMap: orig is not a vreg");
if (hregIsVirtual(replacement))
- vpanic("addToHRegMap: replacement is not a vreg");
+ vpanic("addToHRegMap: replacement is a vreg");
vassert(map->n_used+1 < N_HREG_REMAP);
map->orig[map->n_used] = orig;
diff --git a/main/VEX/priv/host_generic_regs.h b/main/VEX/priv/host_generic_regs.h
index 1c6826c..0fde5ae 100644
--- a/main/VEX/priv/host_generic_regs.h
+++ b/main/VEX/priv/host_generic_regs.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/priv/host_generic_simd128.c b/main/VEX/priv/host_generic_simd128.c
index 2430e67..6e1100c 100644
--- a/main/VEX/priv/host_generic_simd128.c
+++ b/main/VEX/priv/host_generic_simd128.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2010-2010 OpenWorks GbR
+ Copyright (C) 2010-2011 OpenWorks GbR
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -88,6 +88,12 @@
return toUChar((xx < yy) ? xx : yy);
}
+static inline ULong cmpEQ64 ( Long xx, Long yy )
+{
+ return (((Long)xx) == ((Long)yy))
+ ? 0xFFFFFFFFFFFFFFFFULL : 0ULL;
+}
+
static inline ULong cmpGT64S ( Long xx, Long yy )
{
return (((Long)xx) > ((Long)yy))
@@ -104,7 +110,27 @@
return toUChar(((Char)v) >> n);
}
-void h_generic_calc_Mul32x4 ( /*OUT*/V128* res,
+static inline UShort qnarrow32Sto16U ( UInt xx0 )
+{
+ Int xx = (Int)xx0;
+ if (xx < 0) xx = 0;
+ if (xx > 65535) xx = 65535;
+ return (UShort)xx;
+}
+
+static inline UShort narrow32to16 ( UInt xx )
+{
+ return (UShort)xx;
+}
+
+static inline UChar narrow16to8 ( UShort xx )
+{
+ return (UChar)xx;
+}
+
+
+void VEX_REGPARM(3)
+ h_generic_calc_Mul32x4 ( /*OUT*/V128* res,
V128* argL, V128* argR )
{
res->w32[0] = mul32(argL->w32[0], argR->w32[0]);
@@ -113,7 +139,8 @@
res->w32[3] = mul32(argL->w32[3], argR->w32[3]);
}
-void h_generic_calc_Max32Sx4 ( /*OUT*/V128* res,
+void VEX_REGPARM(3)
+ h_generic_calc_Max32Sx4 ( /*OUT*/V128* res,
V128* argL, V128* argR )
{
res->w32[0] = max32S(argL->w32[0], argR->w32[0]);
@@ -122,7 +149,8 @@
res->w32[3] = max32S(argL->w32[3], argR->w32[3]);
}
-void h_generic_calc_Min32Sx4 ( /*OUT*/V128* res,
+void VEX_REGPARM(3)
+ h_generic_calc_Min32Sx4 ( /*OUT*/V128* res,
V128* argL, V128* argR )
{
res->w32[0] = min32S(argL->w32[0], argR->w32[0]);
@@ -131,7 +159,8 @@
res->w32[3] = min32S(argL->w32[3], argR->w32[3]);
}
-void h_generic_calc_Max32Ux4 ( /*OUT*/V128* res,
+void VEX_REGPARM(3)
+ h_generic_calc_Max32Ux4 ( /*OUT*/V128* res,
V128* argL, V128* argR )
{
res->w32[0] = max32U(argL->w32[0], argR->w32[0]);
@@ -140,7 +169,8 @@
res->w32[3] = max32U(argL->w32[3], argR->w32[3]);
}
-void h_generic_calc_Min32Ux4 ( /*OUT*/V128* res,
+void VEX_REGPARM(3)
+ h_generic_calc_Min32Ux4 ( /*OUT*/V128* res,
V128* argL, V128* argR )
{
res->w32[0] = min32U(argL->w32[0], argR->w32[0]);
@@ -149,7 +179,8 @@
res->w32[3] = min32U(argL->w32[3], argR->w32[3]);
}
-void h_generic_calc_Max16Ux8 ( /*OUT*/V128* res,
+void VEX_REGPARM(3)
+ h_generic_calc_Max16Ux8 ( /*OUT*/V128* res,
V128* argL, V128* argR )
{
res->w16[0] = max16U(argL->w16[0], argR->w16[0]);
@@ -162,7 +193,8 @@
res->w16[7] = max16U(argL->w16[7], argR->w16[7]);
}
-void h_generic_calc_Min16Ux8 ( /*OUT*/V128* res,
+void VEX_REGPARM(3)
+ h_generic_calc_Min16Ux8 ( /*OUT*/V128* res,
V128* argL, V128* argR )
{
res->w16[0] = min16U(argL->w16[0], argR->w16[0]);
@@ -175,7 +207,8 @@
res->w16[7] = min16U(argL->w16[7], argR->w16[7]);
}
-void h_generic_calc_Max8Sx16 ( /*OUT*/V128* res,
+void VEX_REGPARM(3)
+ h_generic_calc_Max8Sx16 ( /*OUT*/V128* res,
V128* argL, V128* argR )
{
res->w8[ 0] = max8S(argL->w8[ 0], argR->w8[ 0]);
@@ -196,7 +229,8 @@
res->w8[15] = max8S(argL->w8[15], argR->w8[15]);
}
-void h_generic_calc_Min8Sx16 ( /*OUT*/V128* res,
+void VEX_REGPARM(3)
+ h_generic_calc_Min8Sx16 ( /*OUT*/V128* res,
V128* argL, V128* argR )
{
res->w8[ 0] = min8S(argL->w8[ 0], argR->w8[ 0]);
@@ -217,7 +251,16 @@
res->w8[15] = min8S(argL->w8[15], argR->w8[15]);
}
-void h_generic_calc_CmpGT64Sx2 ( /*OUT*/V128* res,
+void VEX_REGPARM(3)
+ h_generic_calc_CmpEQ64x2 ( /*OUT*/V128* res,
+ V128* argL, V128* argR )
+{
+ res->w64[0] = cmpEQ64(argL->w64[0], argR->w64[0]);
+ res->w64[1] = cmpEQ64(argL->w64[1], argR->w64[1]);
+}
+
+void VEX_REGPARM(3)
+ h_generic_calc_CmpGT64Sx2 ( /*OUT*/V128* res,
V128* argL, V128* argR )
{
res->w64[0] = cmpGT64S(argL->w64[0], argR->w64[0]);
@@ -231,7 +274,8 @@
semantics of these primops (Sar64x2, etc) it is an error if in
fact we are ever given an out-of-range shift amount.
*/
-void h_generic_calc_SarN64x2 ( /*OUT*/V128* res,
+void /*not-regparm*/
+ h_generic_calc_SarN64x2 ( /*OUT*/V128* res,
V128* argL, UInt nn)
{
/* vassert(nn < 64); */
@@ -240,7 +284,8 @@
res->w64[1] = sar64(argL->w64[1], nn);
}
-void h_generic_calc_SarN8x16 ( /*OUT*/V128* res,
+void /*not-regparm*/
+ h_generic_calc_SarN8x16 ( /*OUT*/V128* res,
V128* argL, UInt nn)
{
/* vassert(nn < 8); */
@@ -263,6 +308,57 @@
res->w8[15] = sar8(argL->w8[15], nn);
}
+void VEX_REGPARM(3)
+ h_generic_calc_QNarrowBin32Sto16Ux8 ( /*OUT*/V128* res,
+ V128* argL, V128* argR )
+{
+ res->w16[0] = qnarrow32Sto16U(argR->w32[0]);
+ res->w16[1] = qnarrow32Sto16U(argR->w32[1]);
+ res->w16[2] = qnarrow32Sto16U(argR->w32[2]);
+ res->w16[3] = qnarrow32Sto16U(argR->w32[3]);
+ res->w16[4] = qnarrow32Sto16U(argL->w32[0]);
+ res->w16[5] = qnarrow32Sto16U(argL->w32[1]);
+ res->w16[6] = qnarrow32Sto16U(argL->w32[2]);
+ res->w16[7] = qnarrow32Sto16U(argL->w32[3]);
+}
+
+void VEX_REGPARM(3)
+ h_generic_calc_NarrowBin16to8x16 ( /*OUT*/V128* res,
+ V128* argL, V128* argR )
+{
+ res->w8[ 0] = narrow16to8(argR->w16[0]);
+ res->w8[ 1] = narrow16to8(argR->w16[1]);
+ res->w8[ 2] = narrow16to8(argR->w16[2]);
+ res->w8[ 3] = narrow16to8(argR->w16[3]);
+ res->w8[ 4] = narrow16to8(argR->w16[4]);
+ res->w8[ 5] = narrow16to8(argR->w16[5]);
+ res->w8[ 6] = narrow16to8(argR->w16[6]);
+ res->w8[ 7] = narrow16to8(argR->w16[7]);
+ res->w8[ 8] = narrow16to8(argL->w16[0]);
+ res->w8[ 9] = narrow16to8(argL->w16[1]);
+ res->w8[10] = narrow16to8(argL->w16[2]);
+ res->w8[11] = narrow16to8(argL->w16[3]);
+ res->w8[12] = narrow16to8(argL->w16[4]);
+ res->w8[13] = narrow16to8(argL->w16[5]);
+ res->w8[14] = narrow16to8(argL->w16[6]);
+ res->w8[15] = narrow16to8(argL->w16[7]);
+}
+
+void VEX_REGPARM(3)
+ h_generic_calc_NarrowBin32to16x8 ( /*OUT*/V128* res,
+ V128* argL, V128* argR )
+{
+ res->w16[0] = narrow32to16(argR->w32[0]);
+ res->w16[1] = narrow32to16(argR->w32[1]);
+ res->w16[2] = narrow32to16(argR->w32[2]);
+ res->w16[3] = narrow32to16(argR->w32[3]);
+ res->w16[4] = narrow32to16(argL->w32[0]);
+ res->w16[5] = narrow32to16(argL->w32[1]);
+ res->w16[6] = narrow32to16(argL->w32[2]);
+ res->w16[7] = narrow32to16(argL->w32[3]);
+}
+
+
/*---------------------------------------------------------------*/
/*--- end host_generic_simd128.c ---*/
/*---------------------------------------------------------------*/
diff --git a/main/VEX/priv/host_generic_simd128.h b/main/VEX/priv/host_generic_simd128.h
index d764439..6f9cc97 100644
--- a/main/VEX/priv/host_generic_simd128.h
+++ b/main/VEX/priv/host_generic_simd128.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2010-2010 OpenWorks GbR
+ Copyright (C) 2010-2011 OpenWorks GbR
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -45,22 +45,43 @@
#include "libvex_basictypes.h"
-/* DO NOT MAKE THESE INTO REGPARM FNS! THIS WILL BREAK CALLING
- SEQUENCES GENERATED BY host-x86/isel.c. */
+extern VEX_REGPARM(3)
+ void h_generic_calc_Mul32x4 ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_Max32Sx4 ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_Min32Sx4 ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_Max32Ux4 ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_Min32Ux4 ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_Max16Ux8 ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_Min16Ux8 ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_Max8Sx16 ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_Min8Sx16 ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_CmpEQ64x2 ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_CmpGT64Sx2 ( /*OUT*/V128*, V128*, V128* );
-extern void h_generic_calc_Mul32x4 ( /*OUT*/V128*, V128*, V128* );
-extern void h_generic_calc_Max32Sx4 ( /*OUT*/V128*, V128*, V128* );
-extern void h_generic_calc_Min32Sx4 ( /*OUT*/V128*, V128*, V128* );
-extern void h_generic_calc_Max32Ux4 ( /*OUT*/V128*, V128*, V128* );
-extern void h_generic_calc_Min32Ux4 ( /*OUT*/V128*, V128*, V128* );
-extern void h_generic_calc_Max16Ux8 ( /*OUT*/V128*, V128*, V128* );
-extern void h_generic_calc_Min16Ux8 ( /*OUT*/V128*, V128*, V128* );
-extern void h_generic_calc_Max8Sx16 ( /*OUT*/V128*, V128*, V128* );
-extern void h_generic_calc_Min8Sx16 ( /*OUT*/V128*, V128*, V128* );
-extern void h_generic_calc_CmpGT64Sx2 ( /*OUT*/V128*, V128*, V128* );
-extern void h_generic_calc_SarN64x2 ( /*OUT*/V128*, V128*, UInt );
-extern void h_generic_calc_SarN8x16 ( /*OUT*/V128*, V128*, UInt );
+extern /*not-regparm*/
+ void h_generic_calc_SarN64x2 ( /*OUT*/V128*, V128*, UInt );
+extern /*not-regparm*/
+ void h_generic_calc_SarN8x16 ( /*OUT*/V128*, V128*, UInt );
+extern VEX_REGPARM(3)
+ void h_generic_calc_QNarrowBin32Sto16Ux8
+ ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_NarrowBin16to8x16
+ ( /*OUT*/V128*, V128*, V128* );
+extern VEX_REGPARM(3)
+ void h_generic_calc_NarrowBin32to16x8
+ ( /*OUT*/V128*, V128*, V128* );
#endif /* ndef __VEX_HOST_GENERIC_SIMD128_H */
diff --git a/main/VEX/priv/host_generic_simd64.c b/main/VEX/priv/host_generic_simd64.c
index 03d6d2f..52af103 100644
--- a/main/VEX/priv/host_generic_simd64.c
+++ b/main/VEX/priv/host_generic_simd64.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -272,7 +272,7 @@
return toUChar(xx==0 ? 0 : 0xFF);
}
-static inline Short qnarrow32Sto16 ( UInt xx0 )
+static inline Short qnarrow32Sto16S ( UInt xx0 )
{
Int xx = (Int)xx0;
if (xx < -32768) xx = -32768;
@@ -280,7 +280,7 @@
return (Short)xx;
}
-static inline Char qnarrow16Sto8 ( UShort xx0 )
+static inline Char qnarrow16Sto8S ( UShort xx0 )
{
Short xx = (Short)xx0;
if (xx < -128) xx = -128;
@@ -288,7 +288,7 @@
return (Char)xx;
}
-static inline UChar qnarrow16Uto8 ( UShort xx0 )
+static inline UChar qnarrow16Sto8U ( UShort xx0 )
{
Short xx = (Short)xx0;
if (xx < 0) xx = 0;
@@ -296,6 +296,16 @@
return (UChar)xx;
}
+static inline UShort narrow32to16 ( UInt xx )
+{
+ return (UShort)xx;
+}
+
+static inline UChar narrow16to8 ( UShort xx )
+{
+ return (UChar)xx;
+}
+
/* shifts: we don't care about out-of-range ones, since
that is dealt with at a higher level. */
@@ -759,21 +769,21 @@
/* ------------ Saturating narrowing ------------ */
-ULong h_generic_calc_QNarrow32Sx2 ( ULong aa, ULong bb )
+ULong h_generic_calc_QNarrowBin32Sto16Sx4 ( ULong aa, ULong bb )
{
UInt d = sel32x2_1(aa);
UInt c = sel32x2_0(aa);
UInt b = sel32x2_1(bb);
UInt a = sel32x2_0(bb);
return mk16x4(
- qnarrow32Sto16(d),
- qnarrow32Sto16(c),
- qnarrow32Sto16(b),
- qnarrow32Sto16(a)
+ qnarrow32Sto16S(d),
+ qnarrow32Sto16S(c),
+ qnarrow32Sto16S(b),
+ qnarrow32Sto16S(a)
);
}
-ULong h_generic_calc_QNarrow16Sx4 ( ULong aa, ULong bb )
+ULong h_generic_calc_QNarrowBin16Sto8Sx8 ( ULong aa, ULong bb )
{
UShort h = sel16x4_3(aa);
UShort g = sel16x4_2(aa);
@@ -784,18 +794,18 @@
UShort b = sel16x4_1(bb);
UShort a = sel16x4_0(bb);
return mk8x8(
- qnarrow16Sto8(h),
- qnarrow16Sto8(g),
- qnarrow16Sto8(f),
- qnarrow16Sto8(e),
- qnarrow16Sto8(d),
- qnarrow16Sto8(c),
- qnarrow16Sto8(b),
- qnarrow16Sto8(a)
+ qnarrow16Sto8S(h),
+ qnarrow16Sto8S(g),
+ qnarrow16Sto8S(f),
+ qnarrow16Sto8S(e),
+ qnarrow16Sto8S(d),
+ qnarrow16Sto8S(c),
+ qnarrow16Sto8S(b),
+ qnarrow16Sto8S(a)
);
}
-ULong h_generic_calc_QNarrow16Ux4 ( ULong aa, ULong bb )
+ULong h_generic_calc_QNarrowBin16Sto8Ux8 ( ULong aa, ULong bb )
{
UShort h = sel16x4_3(aa);
UShort g = sel16x4_2(aa);
@@ -806,14 +816,52 @@
UShort b = sel16x4_1(bb);
UShort a = sel16x4_0(bb);
return mk8x8(
- qnarrow16Uto8(h),
- qnarrow16Uto8(g),
- qnarrow16Uto8(f),
- qnarrow16Uto8(e),
- qnarrow16Uto8(d),
- qnarrow16Uto8(c),
- qnarrow16Uto8(b),
- qnarrow16Uto8(a)
+ qnarrow16Sto8U(h),
+ qnarrow16Sto8U(g),
+ qnarrow16Sto8U(f),
+ qnarrow16Sto8U(e),
+ qnarrow16Sto8U(d),
+ qnarrow16Sto8U(c),
+ qnarrow16Sto8U(b),
+ qnarrow16Sto8U(a)
+ );
+}
+
+/* ------------ Truncating narrowing ------------ */
+
+ULong h_generic_calc_NarrowBin32to16x4 ( ULong aa, ULong bb )
+{
+ UInt d = sel32x2_1(aa);
+ UInt c = sel32x2_0(aa);
+ UInt b = sel32x2_1(bb);
+ UInt a = sel32x2_0(bb);
+ return mk16x4(
+ narrow32to16(d),
+ narrow32to16(c),
+ narrow32to16(b),
+ narrow32to16(a)
+ );
+}
+
+ULong h_generic_calc_NarrowBin16to8x8 ( ULong aa, ULong bb )
+{
+ UShort h = sel16x4_3(aa);
+ UShort g = sel16x4_2(aa);
+ UShort f = sel16x4_1(aa);
+ UShort e = sel16x4_0(aa);
+ UShort d = sel16x4_3(bb);
+ UShort c = sel16x4_2(bb);
+ UShort b = sel16x4_1(bb);
+ UShort a = sel16x4_0(bb);
+ return mk8x8(
+ narrow16to8(h),
+ narrow16to8(g),
+ narrow16to8(f),
+ narrow16to8(e),
+ narrow16to8(d),
+ narrow16to8(c),
+ narrow16to8(b),
+ narrow16to8(a)
);
}
diff --git a/main/VEX/priv/host_generic_simd64.h b/main/VEX/priv/host_generic_simd64.h
index e854fc7..5b6640c 100644
--- a/main/VEX/priv/host_generic_simd64.h
+++ b/main/VEX/priv/host_generic_simd64.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -87,9 +87,11 @@
extern ULong h_generic_calc_CmpNEZ16x4 ( ULong );
extern ULong h_generic_calc_CmpNEZ8x8 ( ULong );
-extern ULong h_generic_calc_QNarrow32Sx2 ( ULong, ULong );
-extern ULong h_generic_calc_QNarrow16Sx4 ( ULong, ULong );
-extern ULong h_generic_calc_QNarrow16Ux4 ( ULong, ULong );
+extern ULong h_generic_calc_QNarrowBin32Sto16Sx4 ( ULong, ULong );
+extern ULong h_generic_calc_QNarrowBin16Sto8Sx8 ( ULong, ULong );
+extern ULong h_generic_calc_QNarrowBin16Sto8Ux8 ( ULong, ULong );
+extern ULong h_generic_calc_NarrowBin32to16x4 ( ULong, ULong );
+extern ULong h_generic_calc_NarrowBin16to8x8 ( ULong, ULong );
extern ULong h_generic_calc_InterleaveHI8x8 ( ULong, ULong );
extern ULong h_generic_calc_InterleaveLO8x8 ( ULong, ULong );
diff --git a/main/VEX/priv/host_ppc_defs.c b/main/VEX/priv/host_ppc_defs.c
index 973e151..ea06495 100644
--- a/main/VEX/priv/host_ppc_defs.c
+++ b/main/VEX/priv/host_ppc_defs.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -286,6 +286,8 @@
return (cond.test == Pct_TRUE) ? "cr7.gt=1" : "cr7.gt=0";
case Pcf_7LT:
return (cond.test == Pct_TRUE) ? "cr7.lt=1" : "cr7.lt=0";
+ case Pcf_NONE:
+ return "no-flag";
default: vpanic("ppPPCCondCode");
}
}
@@ -296,6 +298,11 @@
PPCCondCode cc;
cc.flag = flag;
cc.test = test;
+ if (test == Pct_ALWAYS) {
+ vassert(flag == Pcf_NONE);
+ } else {
+ vassert(flag != Pcf_NONE);
+ }
return cc;
}
@@ -798,10 +805,11 @@
if (!hi) vassert(!syned);
return i;
}
-PPCInstr* PPCInstr_Div ( Bool syned, Bool sz32,
+PPCInstr* PPCInstr_Div ( Bool extended, Bool syned, Bool sz32,
HReg dst, HReg srcL, HReg srcR ) {
PPCInstr* i = LibVEX_Alloc(sizeof(PPCInstr));
i->tag = Pin_Div;
+ i->Pin.Div.extended = extended;
i->Pin.Div.syned = syned;
i->Pin.Div.sz32 = sz32;
i->Pin.Div.dst = dst;
@@ -962,15 +970,65 @@
i->Pin.FpRSP.src = src;
return i;
}
-PPCInstr* PPCInstr_FpCftI ( Bool fromI, Bool int32,
- HReg dst, HReg src ) {
+
+/*
+Valid combo | fromI | int32 | syned | flt64 |
+--------------------------------------------
+ | n n n n |
+--------------------------------------------
+ F64->I64U | n n n y |
+--------------------------------------------
+ | n n y n |
+--------------------------------------------
+ F64->I64S | n n y y |
+--------------------------------------------
+ | n y n n |
+--------------------------------------------
+ F64->I32U | n y n y |
+--------------------------------------------
+ | n y y n |
+--------------------------------------------
+ F64->I32S | n y y y |
+--------------------------------------------
+ I64U->F32 | y n n n |
+--------------------------------------------
+ I64U->F64 | y n n y |
+--------------------------------------------
+ | y n y n |
+--------------------------------------------
+ I64S->F64 | y n y y |
+--------------------------------------------
+ | y y n n |
+--------------------------------------------
+ | y y n y |
+--------------------------------------------
+ | y y y n |
+--------------------------------------------
+ | y y y y |
+--------------------------------------------
+*/
+PPCInstr* PPCInstr_FpCftI ( Bool fromI, Bool int32, Bool syned,
+ Bool flt64, HReg dst, HReg src ) {
+ Bool tmp = fromI | int32 | syned | flt64;
+ vassert(tmp == True || tmp == False); // iow, no high bits set
+ UShort conversion = 0;
+ conversion = (fromI << 3) | (int32 << 2) | (syned << 1) | flt64;
+ switch (conversion) {
+ // Supported conversion operations
+ case 1: case 3: case 5: case 7:
+ case 8: case 9: case 11:
+ break;
+ default:
+ vpanic("PPCInstr_FpCftI(ppc_host)");
+ }
PPCInstr* i = LibVEX_Alloc(sizeof(PPCInstr));
i->tag = Pin_FpCftI;
i->Pin.FpCftI.fromI = fromI;
i->Pin.FpCftI.int32 = int32;
+ i->Pin.FpCftI.syned = syned;
+ i->Pin.FpCftI.flt64 = flt64;
i->Pin.FpCftI.dst = dst;
i->Pin.FpCftI.src = src;
- vassert(!(int32 && fromI)); /* no such insn ("fcfiw"). */
return i;
}
PPCInstr* PPCInstr_FpCMov ( PPCCondCode cond, HReg dst, HReg src ) {
@@ -1065,7 +1123,7 @@
i->Pin.AvBin32x4.srcR = srcR;
return i;
}
-PPCInstr* PPCInstr_AvBin32Fx4 ( PPCAvOp op, HReg dst,
+PPCInstr* PPCInstr_AvBin32Fx4 ( PPCAvFpOp op, HReg dst,
HReg srcL, HReg srcR ) {
PPCInstr* i = LibVEX_Alloc(sizeof(PPCInstr));
i->tag = Pin_AvBin32Fx4;
@@ -1075,7 +1133,7 @@
i->Pin.AvBin32Fx4.srcR = srcR;
return i;
}
-PPCInstr* PPCInstr_AvUn32Fx4 ( PPCAvOp op, HReg dst, HReg src ) {
+PPCInstr* PPCInstr_AvUn32Fx4 ( PPCAvFpOp op, HReg dst, HReg src ) {
PPCInstr* i = LibVEX_Alloc(sizeof(PPCInstr));
i->tag = Pin_AvUn32Fx4;
i->Pin.AvUn32Fx4.op = op;
@@ -1246,8 +1304,9 @@
ppHRegPPC(i->Pin.MulL.srcR);
return;
case Pin_Div:
- vex_printf("div%c%s ",
+ vex_printf("div%c%s%s ",
i->Pin.Div.sz32 ? 'w' : 'd',
+ i->Pin.Div.extended ? "e" : "",
i->Pin.Div.syned ? "" : "u");
ppHRegPPC(i->Pin.Div.dst);
vex_printf(",");
@@ -1433,15 +1492,34 @@
ppHRegPPC(i->Pin.FpRSP.src);
return;
case Pin_FpCftI: {
- HChar* str = "fc???";
+ HChar* str = "fc?????";
+ /* Note that "fcfids" is missing from below. That instruction would
+ * satisfy the predicate:
+ * (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == False)
+ * which would go into a final "else" clause to make this if-else
+ * block balanced. But we're able to implement fcfids by leveraging
+ * the fcfid implementation, so it wasn't necessary to include it here.
+ */
if (i->Pin.FpCftI.fromI == False && i->Pin.FpCftI.int32 == False)
- str = "fctid";
- else
- if (i->Pin.FpCftI.fromI == False && i->Pin.FpCftI.int32 == True)
- str = "fctiw";
- else
- if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == False)
- str = "fcfid";
+ if (i->Pin.FpCftI.syned == True)
+ str = "fctid";
+ else
+ str = "fctidu";
+ else if (i->Pin.FpCftI.fromI == False && i->Pin.FpCftI.int32 == True)
+ if (i->Pin.FpCftI.syned == True)
+ str = "fctiw";
+ else
+ str = "fctiwu";
+ else if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == False) {
+ if (i->Pin.FpCftI.syned == True) {
+ str = "fcfid";
+ } else {
+ if (i->Pin.FpCftI.flt64 == True)
+ str = "fcfidu";
+ else
+ str = "fcfidus";
+ }
+ }
vex_printf("%s ", str);
ppHRegPPC(i->Pin.FpCftI.dst);
vex_printf(",");
@@ -2590,7 +2668,8 @@
code and back.
*/
Int emit_PPCInstr ( UChar* buf, Int nbuf, PPCInstr* i,
- Bool mode64, void* dispatch )
+ Bool mode64,
+ void* dispatch_unassisted, void* dispatch_assisted )
{
UChar* p = &buf[0];
UChar* ptmp = p;
@@ -2923,7 +3002,23 @@
if (!mode64)
vassert(sz32);
- if (sz32) {
+ if (i->Pin.Div.extended) {
+ if (sz32) {
+ if (syned)
+ // divwe r_dst,r_srcL,r_srcR
+ p = mkFormXO(p, 31, r_dst, r_srcL, r_srcR, 0, 427, 0);
+ else
+ // divweu r_dst,r_srcL,r_srcR
+ p = mkFormXO(p, 31, r_dst, r_srcL, r_srcR, 0, 395, 0);
+ } else {
+ if (syned)
+ // divde r_dst,r_srcL,r_srcR
+ p = mkFormXO(p, 31, r_dst, r_srcL, r_srcR, 0, 425, 0);
+ else
+ // divdeu r_dst,r_srcL,r_srcR
+ p = mkFormXO(p, 31, r_dst, r_srcL, r_srcR, 0, 393, 0);
+ }
+ } else if (sz32) {
if (syned) // divw r_dst,r_srcL,r_srcR
p = mkFormXO(p, 31, r_dst, r_srcL, r_srcR, 0, 491, 0);
else // divwu r_dst,r_srcL,r_srcR
@@ -2979,7 +3074,8 @@
UInt r_dst;
ULong imm_dst;
- vassert(dispatch == NULL);
+ vassert(dispatch_unassisted == NULL);
+ vassert(dispatch_assisted == NULL);
/* First off, if this is conditional, create a conditional
jump over the rest of it. */
@@ -3145,6 +3241,7 @@
// Just load 1 to dst => li dst,1
p = mkFormD(p, 14, r_dst, 0, 1);
} else {
+ vassert(cond.flag != Pcf_NONE);
rot_imm = 1 + cond.flag;
r_tmp = 0; // Not set in getAllocable, so no need to declare.
@@ -3376,19 +3473,41 @@
UInt fr_dst = fregNo(i->Pin.FpCftI.dst);
UInt fr_src = fregNo(i->Pin.FpCftI.src);
if (i->Pin.FpCftI.fromI == False && i->Pin.FpCftI.int32 == True) {
- // fctiw (conv f64 to i32), PPC32 p404
- p = mkFormX(p, 63, fr_dst, 0, fr_src, 14, 0);
- goto done;
+ if (i->Pin.FpCftI.syned == True) {
+ // fctiw (conv f64 to i32), PPC32 p404
+ p = mkFormX(p, 63, fr_dst, 0, fr_src, 14, 0);
+ goto done;
+ } else {
+ // fctiwu (conv f64 to u32)
+ p = mkFormX(p, 63, fr_dst, 0, fr_src, 142, 0);
+ goto done;
+ }
}
if (i->Pin.FpCftI.fromI == False && i->Pin.FpCftI.int32 == False) {
- // fctid (conv f64 to i64), PPC64 p437
- p = mkFormX(p, 63, fr_dst, 0, fr_src, 814, 0);
- goto done;
+ if (i->Pin.FpCftI.syned == True) {
+ // fctid (conv f64 to i64), PPC64 p437
+ p = mkFormX(p, 63, fr_dst, 0, fr_src, 814, 0);
+ goto done;
+ } else {
+ // fctidu (conv f64 to u64)
+ p = mkFormX(p, 63, fr_dst, 0, fr_src, 942, 0);
+ goto done;
+ }
}
if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == False) {
- // fcfid (conv i64 to f64), PPC64 p434
- p = mkFormX(p, 63, fr_dst, 0, fr_src, 846, 0);
- goto done;
+ if (i->Pin.FpCftI.syned == True) {
+ // fcfid (conv i64 to f64), PPC64 p434
+ p = mkFormX(p, 63, fr_dst, 0, fr_src, 846, 0);
+ goto done;
+ } else if (i->Pin.FpCftI.flt64 == True) {
+ // fcfidu (conv u64 to f64)
+ p = mkFormX(p, 63, fr_dst, 0, fr_src, 974, 0);
+ goto done;
+ } else {
+ // fcfidus (conv u64 to f32)
+ p = mkFormX(p, 59, fr_dst, 0, fr_src, 974, 0);
+ goto done;
+ }
}
goto bad;
}
diff --git a/main/VEX/priv/host_ppc_defs.h b/main/VEX/priv/host_ppc_defs.h
index accfd58..58ddb43 100644
--- a/main/VEX/priv/host_ppc_defs.h
+++ b/main/VEX/priv/host_ppc_defs.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -162,15 +162,16 @@
Pcf_7LT = 28, /* neg | lt */
Pcf_7GT = 29, /* pos | gt */
Pcf_7EQ = 30, /* zero | equal */
- Pcf_7SO = 31 /* summary overflow */
+ Pcf_7SO = 31, /* summary overflow */
+ Pcf_NONE = 32 /* no condition; used with Pct_ALWAYS */
}
PPCCondFlag;
typedef
enum { /* Maps bc bitfield BO */
- Pct_FALSE = 0x4,
- Pct_TRUE = 0xC,
- Pct_ALWAYS = 0x14
+ Pct_FALSE = 0x4, /* associated PPCCondFlag must not be Pcf_NONE */
+ Pct_TRUE = 0xC, /* associated PPCCondFlag must not be Pcf_NONE */
+ Pct_ALWAYS = 0x14 /* associated PPCCondFlag must be Pcf_NONE */
}
PPCCondTest;
@@ -461,7 +462,7 @@
Pin_FpLdSt, /* FP load/store */
Pin_FpSTFIW, /* stfiwx */
Pin_FpRSP, /* FP round IEEE754 double to IEEE754 single */
- Pin_FpCftI, /* fcfid/fctid/fctiw */
+ Pin_FpCftI, /* fcfid[u,s,us]/fctid[u]/fctiw[u] */
Pin_FpCMov, /* FP floating point conditional move */
Pin_FpLdFPSCR, /* mtfsf */
Pin_FpCmp, /* FP compare, generating value into int reg */
@@ -559,6 +560,7 @@
} MulL;
/* ppc32 div/divu instruction. */
struct {
+ Bool extended;
Bool syned;
Bool sz32; /* mode64 has both 32 & 64bit div */
HReg dst;
@@ -662,11 +664,15 @@
HReg src;
HReg dst;
} FpRSP;
- /* fcfid/fctid/fctiw. Note there's no fcfiw so fromI==True
- && int32==True is not allowed. */
+ /* fcfid[u,s,us]/fctid[u]/fctiw[u]. Only some combinations
+ of the various fields are allowed. This is asserted for
+ and documented in the code for the constructor,
+ PPCInstr_FpCftI, in host_ppc_defs.c. */
struct {
- Bool fromI; /* False==F->I, True==I->F */
- Bool int32; /* True== I is 32, False==I is 64 */
+ Bool fromI; /* True== I->F, False== F->I */
+ Bool int32; /* True== I is 32, False== I is 64 */
+ Bool syned;
+ Bool flt64; /* True== F is 64, False== F is 32 */
HReg src;
HReg dst;
} FpCftI;
@@ -788,7 +794,7 @@
extern PPCInstr* PPCInstr_Cmp ( Bool, Bool, UInt, HReg, PPCRH* );
extern PPCInstr* PPCInstr_Unary ( PPCUnaryOp op, HReg dst, HReg src );
extern PPCInstr* PPCInstr_MulL ( Bool syned, Bool hi32, Bool sz32, HReg, HReg, HReg );
-extern PPCInstr* PPCInstr_Div ( Bool syned, Bool sz32, HReg dst, HReg srcL, HReg srcR );
+extern PPCInstr* PPCInstr_Div ( Bool extended, Bool syned, Bool sz32, HReg dst, HReg srcL, HReg srcR );
extern PPCInstr* PPCInstr_Call ( PPCCondCode, Addr64, UInt );
extern PPCInstr* PPCInstr_Goto ( IRJumpKind, PPCCondCode cond, PPCRI* dst );
extern PPCInstr* PPCInstr_CMov ( PPCCondCode, HReg dst, PPCRI* src );
@@ -811,8 +817,8 @@
extern PPCInstr* PPCInstr_FpLdSt ( Bool isLoad, UChar sz, HReg, PPCAMode* );
extern PPCInstr* PPCInstr_FpSTFIW ( HReg addr, HReg data );
extern PPCInstr* PPCInstr_FpRSP ( HReg dst, HReg src );
-extern PPCInstr* PPCInstr_FpCftI ( Bool fromI, Bool int32,
- HReg dst, HReg src );
+extern PPCInstr* PPCInstr_FpCftI ( Bool fromI, Bool int32, Bool syned,
+ Bool dst64, HReg dst, HReg src );
extern PPCInstr* PPCInstr_FpCMov ( PPCCondCode, HReg dst, HReg src );
extern PPCInstr* PPCInstr_FpLdFPSCR ( HReg src );
extern PPCInstr* PPCInstr_FpCmp ( HReg dst, HReg srcL, HReg srcR );
@@ -825,8 +831,8 @@
extern PPCInstr* PPCInstr_AvBin8x16 ( PPCAvOp op, HReg dst, HReg srcL, HReg srcR );
extern PPCInstr* PPCInstr_AvBin16x8 ( PPCAvOp op, HReg dst, HReg srcL, HReg srcR );
extern PPCInstr* PPCInstr_AvBin32x4 ( PPCAvOp op, HReg dst, HReg srcL, HReg srcR );
-extern PPCInstr* PPCInstr_AvBin32Fx4 ( PPCAvOp op, HReg dst, HReg srcL, HReg srcR );
-extern PPCInstr* PPCInstr_AvUn32Fx4 ( PPCAvOp op, HReg dst, HReg src );
+extern PPCInstr* PPCInstr_AvBin32Fx4 ( PPCAvFpOp op, HReg dst, HReg srcL, HReg srcR );
+extern PPCInstr* PPCInstr_AvUn32Fx4 ( PPCAvFpOp op, HReg dst, HReg src );
extern PPCInstr* PPCInstr_AvPerm ( HReg dst, HReg srcL, HReg srcR, HReg ctl );
extern PPCInstr* PPCInstr_AvSel ( HReg ctl, HReg dst, HReg srcL, HReg srcR );
extern PPCInstr* PPCInstr_AvShlDbl ( UChar shift, HReg dst, HReg srcL, HReg srcR );
@@ -842,7 +848,9 @@
extern void mapRegs_PPCInstr ( HRegRemap*, PPCInstr* , Bool mode64);
extern Bool isMove_PPCInstr ( PPCInstr*, HReg*, HReg* );
extern Int emit_PPCInstr ( UChar* buf, Int nbuf, PPCInstr*,
- Bool mode64, void* dispatch );
+ Bool mode64,
+ void* dispatch_unassisted,
+ void* dispatch_assisted );
extern void genSpill_PPC ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
HReg rreg, Int offsetB, Bool mode64 );
diff --git a/main/VEX/priv/host_ppc_isel.c b/main/VEX/priv/host_ppc_isel.c
index 1609c74..642fc81 100644
--- a/main/VEX/priv/host_ppc_isel.c
+++ b/main/VEX/priv/host_ppc_isel.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -126,7 +126,10 @@
fadd[.] if . y y
fadds[.] if . y y
-fcfid[.] (i64->dbl) if . y y
+fcfid[.] (Si64->dbl) if . y y
+fcfidU[.] (Ui64->dbl) if . y y
+fcfids[.] (Si64->sngl) if . Y Y
+fcfidus[.] (Ui64->sngl) if . Y Y
fcmpo (cmp, result n n n
fcmpu to crfD) n n n
fctid[.] (dbl->i64) if . ->undef y
@@ -559,7 +562,7 @@
if (bias < -100 || bias > 100) /* somewhat arbitrarily */
vpanic("genGuestArrayOffset(ppc host)(3)");
- if (descr->base < 0 || descr->base > 4000) /* somewhat arbitrarily */
+ if (descr->base < 0 || descr->base > 5000) /* somewhat arbitrarily */
vpanic("genGuestArrayOffset(ppc host)(4)");
/* Compute off into a reg, %off. Then return:
@@ -782,7 +785,7 @@
}
/* Fast scheme only applies for unconditional calls. Hence: */
- cc.test = Pct_ALWAYS;
+ cc = mk_PPCCondCode( Pct_ALWAYS, Pcf_NONE );
} else {
@@ -825,7 +828,7 @@
because the argument computations could trash the condition
codes. Be a bit clever to handle the common case where the
guard is 1:Bit. */
- cc.test = Pct_ALWAYS;
+ cc = mk_PPCCondCode( Pct_ALWAYS, Pcf_NONE );
if (guard) {
if (guard->tag == Iex_Const
&& guard->Iex.Const.con->tag == Ico_U1
@@ -1281,24 +1284,42 @@
/* How about a div? */
if (e->Iex.Binop.op == Iop_DivS32 ||
- e->Iex.Binop.op == Iop_DivU32) {
- Bool syned = toBool(e->Iex.Binop.op == Iop_DivS32);
+ e->Iex.Binop.op == Iop_DivU32 ||
+ e->Iex.Binop.op == Iop_DivS32E ||
+ e->Iex.Binop.op == Iop_DivU32E) {
+ Bool syned = toBool((e->Iex.Binop.op == Iop_DivS32) || (e->Iex.Binop.op == Iop_DivS32E));
HReg r_dst = newVRegI(env);
HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
- addInstr(env, PPCInstr_Div(syned, True/*32bit div*/,
- r_dst, r_srcL, r_srcR));
+ addInstr( env,
+ PPCInstr_Div( ( ( e->Iex.Binop.op == Iop_DivU32E )
+ || ( e->Iex.Binop.op == Iop_DivS32E ) ) ? True
+ : False,
+ syned,
+ True/*32bit div*/,
+ r_dst,
+ r_srcL,
+ r_srcR ) );
return r_dst;
}
if (e->Iex.Binop.op == Iop_DivS64 ||
- e->Iex.Binop.op == Iop_DivU64) {
- Bool syned = toBool(e->Iex.Binop.op == Iop_DivS64);
+ e->Iex.Binop.op == Iop_DivU64 || e->Iex.Binop.op == Iop_DivS64E
+ || e->Iex.Binop.op == Iop_DivU64E ) {
+ Bool syned = toBool((e->Iex.Binop.op == Iop_DivS64) ||(e->Iex.Binop.op == Iop_DivS64E));
HReg r_dst = newVRegI(env);
HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
vassert(mode64);
- addInstr(env, PPCInstr_Div(syned, False/*64bit div*/,
- r_dst, r_srcL, r_srcR));
+ addInstr( env,
+ PPCInstr_Div( ( ( e->Iex.Binop.op == Iop_DivS64E )
+ || ( e->Iex.Binop.op
+ == Iop_DivU64E ) ) ? True
+ : False,
+ syned,
+ False/*64bit div*/,
+ r_dst,
+ r_srcL,
+ r_srcR ) );
return r_dst;
}
@@ -1456,7 +1477,8 @@
return r_ccIR;
}
- if (e->Iex.Binop.op == Iop_F64toI32S) {
+ if ( e->Iex.Binop.op == Iop_F64toI32S ||
+ e->Iex.Binop.op == Iop_F64toI32U ) {
/* This works in both mode64 and mode32. */
HReg r1 = StackFramePtr(env->mode64);
PPCAMode* zero_r1 = PPCAMode_IR( 0, r1 );
@@ -1468,7 +1490,10 @@
set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
sub_from_sp( env, 16 );
- addInstr(env, PPCInstr_FpCftI(False/*F->I*/, True/*int32*/,
+ addInstr(env, PPCInstr_FpCftI(False/*F->I*/, True/*int32*/,
+ e->Iex.Binop.op == Iop_F64toI32S ? True/*syned*/
+ : False,
+ True/*flt64*/,
ftmp, fsrc));
addInstr(env, PPCInstr_FpSTFIW(r1, ftmp));
addInstr(env, PPCInstr_Load(4, idst, zero_r1, mode64));
@@ -1484,7 +1509,7 @@
return idst;
}
- if (e->Iex.Binop.op == Iop_F64toI64S) {
+ if (e->Iex.Binop.op == Iop_F64toI64S || e->Iex.Binop.op == Iop_F64toI64U ) {
if (mode64) {
HReg r1 = StackFramePtr(env->mode64);
PPCAMode* zero_r1 = PPCAMode_IR( 0, r1 );
@@ -1497,7 +1522,9 @@
sub_from_sp( env, 16 );
addInstr(env, PPCInstr_FpCftI(False/*F->I*/, False/*int64*/,
- ftmp, fsrc));
+ ( e->Iex.Binop.op == Iop_F64toI64S ) ? True
+ : False,
+ True, ftmp, fsrc));
addInstr(env, PPCInstr_FpLdSt(False/*store*/, 8, ftmp, zero_r1));
addInstr(env, PPCInstr_Load(8, idst, zero_r1, True/*mode64*/));
add_to_sp( env, 16 );
@@ -1586,8 +1613,7 @@
case Iop_16Sto64: {
HReg r_dst = newVRegI(env);
HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
- UShort amt = toUShort(op_unop==Iop_8Sto64 ? 56 :
- op_unop==Iop_16Sto64 ? 48 : 32);
+ UShort amt = toUShort(op_unop==Iop_8Sto64 ? 56 : 48);
vassert(mode64);
addInstr(env,
PPCInstr_Shft(Pshft_SHL, False/*64bit shift*/,
@@ -1612,6 +1638,7 @@
case Iop_Not16:
case Iop_Not32:
case Iop_Not64: {
+ if (op_unop == Iop_Not64) vassert(mode64);
HReg r_dst = newVRegI(env);
HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
addInstr(env, PPCInstr_Unary(Pun_NOT,r_dst,r_src));
@@ -2400,8 +2427,10 @@
switch (e->Iex.Binop.op) {
case Iop_CmpEQ32: return mk_PPCCondCode( Pct_TRUE, Pcf_7EQ );
case Iop_CmpNE32: return mk_PPCCondCode( Pct_FALSE, Pcf_7EQ );
- case Iop_CmpLT32U: return mk_PPCCondCode( Pct_TRUE, Pcf_7LT );
- case Iop_CmpLE32U: return mk_PPCCondCode( Pct_FALSE, Pcf_7GT );
+ case Iop_CmpLT32U: case Iop_CmpLT32S:
+ return mk_PPCCondCode( Pct_TRUE, Pcf_7LT );
+ case Iop_CmpLE32U: case Iop_CmpLE32S:
+ return mk_PPCCondCode( Pct_FALSE, Pcf_7GT );
default: vpanic("iselCondCode(ppc): CmpXX32");
}
}
@@ -2731,8 +2760,8 @@
*rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
return;
- /* F64toI64S */
- case Iop_F64toI64S: {
+ /* F64toI64[S|U] */
+ case Iop_F64toI64S: case Iop_F64toI64U: {
HReg tLo = newVRegI(env);
HReg tHi = newVRegI(env);
HReg r1 = StackFramePtr(env->mode64);
@@ -2747,7 +2776,8 @@
sub_from_sp( env, 16 );
addInstr(env, PPCInstr_FpCftI(False/*F->I*/, False/*int64*/,
- ftmp, fsrc));
+ (op_binop == Iop_F64toI64S) ? True : False,
+ True, ftmp, fsrc));
addInstr(env, PPCInstr_FpLdSt(False/*store*/, 8, ftmp, zero_r1));
addInstr(env, PPCInstr_Load(4, tHi, zero_r1, False/*mode32*/));
addInstr(env, PPCInstr_Load(4, tLo, four_r1, False/*mode32*/));
@@ -2880,6 +2910,18 @@
return;
}
+ case Iop_Not64: {
+ HReg xLo, xHi;
+ HReg tmpLo = newVRegI(env);
+ HReg tmpHi = newVRegI(env);
+ iselInt64Expr(&xHi, &xLo, env, e->Iex.Unop.arg);
+ addInstr(env, PPCInstr_Unary(Pun_NOT,tmpLo,xLo));
+ addInstr(env, PPCInstr_Unary(Pun_NOT,tmpHi,xHi));
+ *rHi = tmpHi;
+ *rLo = tmpLo;
+ return;
+ }
+
/* ReinterpF64asI64(e) */
/* Given an IEEE754 double, produce an I64 with the same bit
pattern. */
@@ -2941,6 +2983,8 @@
/* DO NOT CALL THIS DIRECTLY */
static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e )
{
+ Bool mode64 = env->mode64;
+
IRType ty = typeOfIRExpr(env->type_env,e);
vassert(ty == Ity_F32);
@@ -3009,6 +3053,60 @@
return fdst;
}
+ if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_I64UtoF32) {
+ if (mode64) {
+ HReg fdst = newVRegF(env);
+ HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2);
+ HReg r1 = StackFramePtr(env->mode64);
+ PPCAMode* zero_r1 = PPCAMode_IR( 0, r1 );
+
+ /* Set host rounding mode */
+ set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
+
+ sub_from_sp( env, 16 );
+
+ addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/));
+ addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
+ addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/,
+ False, False,
+ fdst, fdst));
+
+ add_to_sp( env, 16 );
+
+ ///* Restore default FPU rounding. */
+ //set_FPU_rounding_default( env );
+ return fdst;
+ } else {
+ /* 32-bit mode */
+ HReg fdst = newVRegF(env);
+ HReg isrcHi, isrcLo;
+ HReg r1 = StackFramePtr(env->mode64);
+ PPCAMode* zero_r1 = PPCAMode_IR( 0, r1 );
+ PPCAMode* four_r1 = PPCAMode_IR( 4, r1 );
+
+ iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2);
+
+ /* Set host rounding mode */
+ set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
+
+ sub_from_sp( env, 16 );
+
+ addInstr(env, PPCInstr_Store(4, zero_r1, isrcHi, False/*mode32*/));
+ addInstr(env, PPCInstr_Store(4, four_r1, isrcLo, False/*mode32*/));
+ addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
+ addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/,
+ False, False,
+ fdst, fdst));
+
+ add_to_sp( env, 16 );
+
+ ///* Restore default FPU rounding. */
+ //set_FPU_rounding_default( env );
+ return fdst;
+ }
+
+ }
+
vex_printf("iselFltExpr(ppc): No such tag(%u)\n", e->tag);
ppIRExpr(e);
vpanic("iselFltExpr_wrk(ppc)");
@@ -3185,7 +3283,7 @@
return r_dst;
}
- if (e->Iex.Binop.op == Iop_I64StoF64) {
+ if (e->Iex.Binop.op == Iop_I64StoF64 || e->Iex.Binop.op == Iop_I64UtoF64) {
if (mode64) {
HReg fdst = newVRegF(env);
HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2);
@@ -3200,6 +3298,8 @@
addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/));
addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/,
+ e->Iex.Binop.op == Iop_I64StoF64,
+ True/*fdst is 64 bit*/,
fdst, fdst));
add_to_sp( env, 16 );
@@ -3226,6 +3326,8 @@
addInstr(env, PPCInstr_Store(4, four_r1, isrcLo, False/*mode32*/));
addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/,
+ e->Iex.Binop.op == Iop_I64StoF64,
+ True/*fdst is 64 bit*/,
fdst, fdst));
add_to_sp( env, 16 );
@@ -3272,7 +3374,31 @@
return mk_LoadR64toFPR( env, r_src );
}
}
+
case Iop_F32toF64: {
+ if (e->Iex.Unop.arg->tag == Iex_Unop &&
+ e->Iex.Unop.arg->Iex.Unop.op == Iop_ReinterpI32asF32 ) {
+ e = e->Iex.Unop.arg;
+
+ HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
+ HReg fr_dst = newVRegF(env);
+ PPCAMode *am_addr;
+
+ sub_from_sp( env, 16 ); // Move SP down 16 bytes
+ am_addr = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
+
+ // store src as Ity_I32's
+ addInstr(env, PPCInstr_Store( 4, am_addr, src, env->mode64 ));
+
+ // load single precision float, but the end results loads into a
+ // 64-bit FP register -- i.e., F64.
+ addInstr(env, PPCInstr_FpLdSt(True/*load*/, 4, fr_dst, am_addr));
+
+ add_to_sp( env, 16 ); // Reset SP
+ return fr_dst;
+ }
+
+
/* this is a no-op */
HReg res = iselFltExpr(env, e->Iex.Unop.arg);
return res;
@@ -3328,6 +3454,7 @@
{
Bool mode64 = env->mode64;
PPCAvOp op = Pav_INVALID;
+ PPCAvFpOp fpop = Pavfp_INVALID;
IRType ty = typeOfIRExpr(env->type_env,e);
vassert(e);
vassert(ty == Ity_V128);
@@ -3396,21 +3523,21 @@
return dst;
}
- case Iop_Recip32Fx4: op = Pavfp_RCPF; goto do_32Fx4_unary;
- case Iop_RSqrt32Fx4: op = Pavfp_RSQRTF; goto do_32Fx4_unary;
- case Iop_I32UtoFx4: op = Pavfp_CVTU2F; goto do_32Fx4_unary;
- case Iop_I32StoFx4: op = Pavfp_CVTS2F; goto do_32Fx4_unary;
- case Iop_QFtoI32Ux4_RZ: op = Pavfp_QCVTF2U; goto do_32Fx4_unary;
- case Iop_QFtoI32Sx4_RZ: op = Pavfp_QCVTF2S; goto do_32Fx4_unary;
- case Iop_RoundF32x4_RM: op = Pavfp_ROUNDM; goto do_32Fx4_unary;
- case Iop_RoundF32x4_RP: op = Pavfp_ROUNDP; goto do_32Fx4_unary;
- case Iop_RoundF32x4_RN: op = Pavfp_ROUNDN; goto do_32Fx4_unary;
- case Iop_RoundF32x4_RZ: op = Pavfp_ROUNDZ; goto do_32Fx4_unary;
+ case Iop_Recip32Fx4: fpop = Pavfp_RCPF; goto do_32Fx4_unary;
+ case Iop_RSqrt32Fx4: fpop = Pavfp_RSQRTF; goto do_32Fx4_unary;
+ case Iop_I32UtoFx4: fpop = Pavfp_CVTU2F; goto do_32Fx4_unary;
+ case Iop_I32StoFx4: fpop = Pavfp_CVTS2F; goto do_32Fx4_unary;
+ case Iop_QFtoI32Ux4_RZ: fpop = Pavfp_QCVTF2U; goto do_32Fx4_unary;
+ case Iop_QFtoI32Sx4_RZ: fpop = Pavfp_QCVTF2S; goto do_32Fx4_unary;
+ case Iop_RoundF32x4_RM: fpop = Pavfp_ROUNDM; goto do_32Fx4_unary;
+ case Iop_RoundF32x4_RP: fpop = Pavfp_ROUNDP; goto do_32Fx4_unary;
+ case Iop_RoundF32x4_RN: fpop = Pavfp_ROUNDN; goto do_32Fx4_unary;
+ case Iop_RoundF32x4_RZ: fpop = Pavfp_ROUNDZ; goto do_32Fx4_unary;
do_32Fx4_unary:
{
HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
HReg dst = newVRegV(env);
- addInstr(env, PPCInstr_AvUn32Fx4(op, dst, arg));
+ addInstr(env, PPCInstr_AvUn32Fx4(fpop, dst, arg));
return dst;
}
@@ -3513,20 +3640,20 @@
}
}
- case Iop_Add32Fx4: op = Pavfp_ADDF; goto do_32Fx4;
- case Iop_Sub32Fx4: op = Pavfp_SUBF; goto do_32Fx4;
- case Iop_Max32Fx4: op = Pavfp_MAXF; goto do_32Fx4;
- case Iop_Min32Fx4: op = Pavfp_MINF; goto do_32Fx4;
- case Iop_Mul32Fx4: op = Pavfp_MULF; goto do_32Fx4;
- case Iop_CmpEQ32Fx4: op = Pavfp_CMPEQF; goto do_32Fx4;
- case Iop_CmpGT32Fx4: op = Pavfp_CMPGTF; goto do_32Fx4;
- case Iop_CmpGE32Fx4: op = Pavfp_CMPGEF; goto do_32Fx4;
+ case Iop_Add32Fx4: fpop = Pavfp_ADDF; goto do_32Fx4;
+ case Iop_Sub32Fx4: fpop = Pavfp_SUBF; goto do_32Fx4;
+ case Iop_Max32Fx4: fpop = Pavfp_MAXF; goto do_32Fx4;
+ case Iop_Min32Fx4: fpop = Pavfp_MINF; goto do_32Fx4;
+ case Iop_Mul32Fx4: fpop = Pavfp_MULF; goto do_32Fx4;
+ case Iop_CmpEQ32Fx4: fpop = Pavfp_CMPEQF; goto do_32Fx4;
+ case Iop_CmpGT32Fx4: fpop = Pavfp_CMPGTF; goto do_32Fx4;
+ case Iop_CmpGE32Fx4: fpop = Pavfp_CMPGEF; goto do_32Fx4;
do_32Fx4:
{
HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
HReg dst = newVRegV(env);
- addInstr(env, PPCInstr_AvBin32Fx4(op, dst, argL, argR));
+ addInstr(env, PPCInstr_AvBin32Fx4(fpop, dst, argL, argR));
return dst;
}
@@ -3598,11 +3725,11 @@
case Iop_Shr16x8: op = Pav_SHR; goto do_AvBin16x8;
case Iop_Sar16x8: op = Pav_SAR; goto do_AvBin16x8;
case Iop_Rol16x8: op = Pav_ROTL; goto do_AvBin16x8;
- case Iop_Narrow16x8: op = Pav_PACKUU; goto do_AvBin16x8;
- case Iop_QNarrow16Ux8: op = Pav_QPACKUU; goto do_AvBin16x8;
- case Iop_QNarrow16Sx8: op = Pav_QPACKSS; goto do_AvBin16x8;
- case Iop_InterleaveHI16x8: op = Pav_MRGHI; goto do_AvBin16x8;
- case Iop_InterleaveLO16x8: op = Pav_MRGLO; goto do_AvBin16x8;
+ case Iop_NarrowBin16to8x16: op = Pav_PACKUU; goto do_AvBin16x8;
+ case Iop_QNarrowBin16Uto8Ux16: op = Pav_QPACKUU; goto do_AvBin16x8;
+ case Iop_QNarrowBin16Sto8Sx16: op = Pav_QPACKSS; goto do_AvBin16x8;
+ case Iop_InterleaveHI16x8: op = Pav_MRGHI; goto do_AvBin16x8;
+ case Iop_InterleaveLO16x8: op = Pav_MRGLO; goto do_AvBin16x8;
case Iop_Add16x8: op = Pav_ADDU; goto do_AvBin16x8;
case Iop_QAdd16Ux8: op = Pav_QADDU; goto do_AvBin16x8;
case Iop_QAdd16Sx8: op = Pav_QADDS; goto do_AvBin16x8;
@@ -3632,11 +3759,11 @@
case Iop_Shr32x4: op = Pav_SHR; goto do_AvBin32x4;
case Iop_Sar32x4: op = Pav_SAR; goto do_AvBin32x4;
case Iop_Rol32x4: op = Pav_ROTL; goto do_AvBin32x4;
- case Iop_Narrow32x4: op = Pav_PACKUU; goto do_AvBin32x4;
- case Iop_QNarrow32Ux4: op = Pav_QPACKUU; goto do_AvBin32x4;
- case Iop_QNarrow32Sx4: op = Pav_QPACKSS; goto do_AvBin32x4;
- case Iop_InterleaveHI32x4: op = Pav_MRGHI; goto do_AvBin32x4;
- case Iop_InterleaveLO32x4: op = Pav_MRGLO; goto do_AvBin32x4;
+ case Iop_NarrowBin32to16x8: op = Pav_PACKUU; goto do_AvBin32x4;
+ case Iop_QNarrowBin32Uto16Ux8: op = Pav_QPACKUU; goto do_AvBin32x4;
+ case Iop_QNarrowBin32Sto16Sx8: op = Pav_QPACKSS; goto do_AvBin32x4;
+ case Iop_InterleaveHI32x4: op = Pav_MRGHI; goto do_AvBin32x4;
+ case Iop_InterleaveLO32x4: op = Pav_MRGLO; goto do_AvBin32x4;
case Iop_Add32x4: op = Pav_ADDU; goto do_AvBin32x4;
case Iop_QAdd32Ux4: op = Pav_QADDU; goto do_AvBin32x4;
case Iop_QAdd32Sx4: op = Pav_QADDS; goto do_AvBin32x4;
@@ -4100,7 +4227,7 @@
ppIRExpr(next);
vex_printf("\n");
}
- cond = mk_PPCCondCode( Pct_ALWAYS, Pcf_7EQ );
+ cond = mk_PPCCondCode( Pct_ALWAYS, Pcf_NONE );
ri = iselWordExpr_RI(env, next);
addInstr(env, PPCInstr_RdWrLR(True, env->savedLR));
addInstr(env, PPCInstr_Goto(jk, cond, ri));
@@ -4129,10 +4256,10 @@
/* do some sanity checks */
mask32 = VEX_HWCAPS_PPC32_F | VEX_HWCAPS_PPC32_V
- | VEX_HWCAPS_PPC32_FX | VEX_HWCAPS_PPC32_GX;
+ | VEX_HWCAPS_PPC32_FX | VEX_HWCAPS_PPC32_GX | VEX_HWCAPS_PPC32_VX;
- mask64 = VEX_HWCAPS_PPC64_V
- | VEX_HWCAPS_PPC64_FX | VEX_HWCAPS_PPC64_GX;
+ mask64 = VEX_HWCAPS_PPC64_V | VEX_HWCAPS_PPC64_FX
+ | VEX_HWCAPS_PPC64_GX | VEX_HWCAPS_PPC64_VX;
if (mode64) {
vassert((hwcaps_host & mask32) == 0);
diff --git a/main/VEX/priv/host_s390_defs.c b/main/VEX/priv/host_s390_defs.c
new file mode 100644
index 0000000..a8052b5
--- /dev/null
+++ b/main/VEX/priv/host_s390_defs.c
@@ -0,0 +1,7157 @@
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+/*---------------------------------------------------------------*/
+/*--- begin host_s390_defs.c ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* Contributed by Florian Krohm */
+
+#include "libvex_basictypes.h"
+#include "libvex.h"
+#include "libvex_trc_values.h"
+#include "libvex_guest_offsets.h"
+#include "libvex_s390x_common.h"
+
+#include "main_util.h"
+#include "main_globals.h"
+#include "host_generic_regs.h"
+#include "host_s390_defs.h"
+#include "host_s390_disasm.h"
+#include <stdarg.h>
+
+/* KLUDGE: We need to know the hwcaps of the host when generating
+ code. But that info is not passed to emit_S390Instr. Only mode64 is
+ being passed. So, ideally, we want this passed as an argument, too.
+ Until then, we use a global variable. This variable is set as a side
+ effect of iselSB_S390. This is safe because instructions are selected
+ before they are emitted. */
+const VexArchInfo *s390_archinfo_host;
+
+
+/*------------------------------------------------------------*/
+/*--- Forward declarations ---*/
+/*------------------------------------------------------------*/
+
+static Bool s390_insn_is_reg_reg_move(const s390_insn *, HReg *src, HReg *dst);
+static void s390_insn_map_regs(HRegRemap *, s390_insn *);
+static void s390_insn_get_reg_usage(HRegUsage *u, const s390_insn *);
+
+
+/*------------------------------------------------------------*/
+/*--- Registers ---*/
+/*------------------------------------------------------------*/
+
+/* Decompile the given register into a static buffer and return it */
+const HChar *
+s390_hreg_as_string(HReg reg)
+{
+ static HChar buf[10];
+
+ static const HChar ireg_names[16][5] = {
+ "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
+ "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
+ };
+
+ static const HChar freg_names[16][5] = {
+ "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
+ "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15"
+ };
+
+ UInt r; /* hregNumber() returns an UInt */
+
+ r = hregNumber(reg);
+
+ /* Be generic for all virtual regs. */
+ if (hregIsVirtual(reg)) {
+ buf[0] = '\0';
+ switch (hregClass(reg)) {
+ case HRcInt64: vex_sprintf(buf, "%%vR%d", r); break;
+ case HRcFlt64: vex_sprintf(buf, "%%vF%d", r); break;
+ default: goto fail;
+ }
+ return buf;
+ }
+
+ /* But specific for real regs. */
+ vassert(r < 16);
+
+ switch (hregClass(reg)) {
+ case HRcInt64: return ireg_names[r];
+ case HRcFlt64: return freg_names[r];
+ default: goto fail;
+ }
+
+ fail: vpanic("s390_hreg_as_string");
+}
+
+
+/* Tell the register allocator which registers can be allocated. */
+static void
+s390_hreg_get_allocable(Int *nregs, HReg **arr)
+{
+ UInt i;
+
+ /* Total number of allocable registers (all classes) */
+ *nregs = 16 /* GPRs */
+ - 1 /* r0 */
+ - 1 /* r12 register holding VG_(dispatch_ctr) */
+ - 1 /* r13 guest state pointer */
+ - 1 /* r14 link register */
+ - 1 /* r15 stack pointer */
+ + 16 /* FPRs */
+ ;
+
+ *arr = LibVEX_Alloc(*nregs * sizeof(HReg));
+
+ i = 0;
+
+ /* GPR0 is not available because it is interpreted as 0, when used
+ as a base or index register. */
+ (*arr)[i++] = mkHReg(1, HRcInt64, False);
+ (*arr)[i++] = mkHReg(2, HRcInt64, False);
+ (*arr)[i++] = mkHReg(3, HRcInt64, False);
+ (*arr)[i++] = mkHReg(4, HRcInt64, False);
+ (*arr)[i++] = mkHReg(5, HRcInt64, False);
+ (*arr)[i++] = mkHReg(6, HRcInt64, False);
+ (*arr)[i++] = mkHReg(7, HRcInt64, False);
+ (*arr)[i++] = mkHReg(8, HRcInt64, False);
+ (*arr)[i++] = mkHReg(9, HRcInt64, False);
+ /* GPR10 and GPR11 are used for instructions that use register pairs.
+ Otherwise, they are available to the allocator */
+ (*arr)[i++] = mkHReg(10, HRcInt64, False);
+ (*arr)[i++] = mkHReg(11, HRcInt64, False);
+ /* GPR12 is not available because it caches VG_(dispatch_ctr) */
+ /* GPR13 is not available because it is used as guest state pointer */
+ /* GPR14 is not available because it is used as link register */
+ /* GPR15 is not available because it is used as stack pointer */
+
+ /* Add the available real (non-virtual) FPRs */
+ (*arr)[i++] = mkHReg(0, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(1, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(2, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(3, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(4, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(5, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(6, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(7, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(8, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(9, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(10, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(11, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(12, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(13, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(14, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(15, HRcFlt64, False);
+ /* FPR12 - FPR15 are also used as register pairs for 128-bit
+ floating point operations */
+}
+
+
+/* Return the real register that holds the guest state pointer */
+HReg
+s390_hreg_guest_state_pointer(void)
+{
+ return mkHReg(S390_REGNO_GUEST_STATE_POINTER, HRcInt64, False);
+}
+
+/* Is VALUE within the domain of a 20-bit signed integer. */
+static __inline__ Bool
+fits_signed_20bit(Int value)
+{
+ return ((value << 12) >> 12) == value;
+}
+
+
+/* Is VALUE within the domain of a 12-bit unsigned integer. */
+static __inline__ Bool
+fits_unsigned_12bit(Int value)
+{
+ return (value & 0xFFF) == value;
+}
+
+/*------------------------------------------------------------*/
+/*--- Addressing modes (amodes) ---*/
+/*------------------------------------------------------------*/
+
+/* Construct a b12 amode. */
+s390_amode *
+s390_amode_b12(Int d, HReg b)
+{
+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode));
+
+ vassert(fits_unsigned_12bit(d));
+
+ am->tag = S390_AMODE_B12;
+ am->d = d;
+ am->b = b;
+ am->x = 0; /* hregNumber(0) == 0 */
+
+ return am;
+}
+
+
+/* Construct a b20 amode. */
+s390_amode *
+s390_amode_b20(Int d, HReg b)
+{
+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode));
+
+ vassert(fits_signed_20bit(d));
+
+ am->tag = S390_AMODE_B20;
+ am->d = d;
+ am->b = b;
+ am->x = 0; /* hregNumber(0) == 0 */
+
+ return am;
+}
+
+
+/* Construct a bx12 amode. */
+s390_amode *
+s390_amode_bx12(Int d, HReg b, HReg x)
+{
+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode));
+
+ vassert(fits_unsigned_12bit(d));
+ vassert(b != 0);
+ vassert(x != 0);
+
+ am->tag = S390_AMODE_BX12;
+ am->d = d;
+ am->b = b;
+ am->x = x;
+
+ return am;
+}
+
+
+/* Construct a bx20 amode. */
+s390_amode *
+s390_amode_bx20(Int d, HReg b, HReg x)
+{
+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode));
+
+ vassert(fits_signed_20bit(d));
+ vassert(b != 0);
+ vassert(x != 0);
+
+ am->tag = S390_AMODE_BX20;
+ am->d = d;
+ am->b = b;
+ am->x = x;
+
+ return am;
+}
+
+
+/* Construct an AMODE for accessing the guest state at OFFSET */
+s390_amode *
+s390_amode_for_guest_state(Int offset)
+{
+ if (fits_unsigned_12bit(offset))
+ return s390_amode_b12(offset, s390_hreg_guest_state_pointer());
+
+ vpanic("invalid guest state offset");
+}
+
+
+/* Decompile the given amode into a static buffer and return it. */
+const HChar *
+s390_amode_as_string(const s390_amode *am)
+{
+ static HChar buf[30];
+ HChar *p;
+
+ buf[0] = '\0';
+ p = buf;
+
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_B20:
+ vex_sprintf(p, "%d(%s)", am->d, s390_hreg_as_string(am->b));
+ break;
+
+ case S390_AMODE_BX12:
+ case S390_AMODE_BX20:
+ /* s390_hreg_as_string returns pointer to local buffer. Need to
+ split this into two printfs */
+ p += vex_sprintf(p, "%d(%s,", am->d, s390_hreg_as_string(am->x));
+ vex_sprintf(p, "%s)", s390_hreg_as_string(am->b));
+ break;
+
+ default:
+ vpanic("s390_amode_as_string");
+ }
+
+ return buf;
+}
+
+
+/* Helper function for s390_amode_is_sane */
+static __inline__ Bool
+is_virtual_gpr(HReg reg)
+{
+ return hregIsVirtual(reg) && hregClass(reg) == HRcInt64;
+}
+
+
+/* Sanity check for an amode */
+Bool
+s390_amode_is_sane(const s390_amode *am)
+{
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ return is_virtual_gpr(am->b) && fits_unsigned_12bit(am->d);
+
+ case S390_AMODE_B20:
+ return is_virtual_gpr(am->b) && fits_signed_20bit(am->d);
+
+ case S390_AMODE_BX12:
+ return is_virtual_gpr(am->b) && is_virtual_gpr(am->x) &&
+ fits_unsigned_12bit(am->d);
+
+ case S390_AMODE_BX20:
+ return is_virtual_gpr(am->b) && is_virtual_gpr(am->x) &&
+ fits_signed_20bit(am->d);
+
+ default:
+ vpanic("s390_amode_is_sane");
+ }
+}
+
+
+/* Record the register use of an amode */
+static void
+s390_amode_get_reg_usage(HRegUsage *u, const s390_amode *am)
+{
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_B20:
+ addHRegUse(u, HRmRead, am->b);
+ return;
+
+ case S390_AMODE_BX12:
+ case S390_AMODE_BX20:
+ addHRegUse(u, HRmRead, am->b);
+ addHRegUse(u, HRmRead, am->x);
+ return;
+
+ default:
+ vpanic("s390_amode_get_reg_usage");
+ }
+}
+
+
+static void
+s390_amode_map_regs(HRegRemap *m, s390_amode *am)
+{
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_B20:
+ am->b = lookupHRegRemap(m, am->b);
+ return;
+
+ case S390_AMODE_BX12:
+ case S390_AMODE_BX20:
+ am->b = lookupHRegRemap(m, am->b);
+ am->x = lookupHRegRemap(m, am->x);
+ return;
+
+ default:
+ vpanic("s390_amode_map_regs");
+ }
+}
+
+
+void
+ppS390AMode(s390_amode *am)
+{
+ vex_printf("%s", s390_amode_as_string(am));
+}
+
+void
+ppS390Instr(s390_insn *insn, Bool mode64)
+{
+ vex_printf("%s", s390_insn_as_string(insn));
+}
+
+void
+ppHRegS390(HReg reg)
+{
+ vex_printf("%s", s390_hreg_as_string(reg));
+}
+
+/*------------------------------------------------------------*/
+/*--- Helpers for register allocation ---*/
+/*------------------------------------------------------------*/
+
+/* Called once per translation. */
+void
+getAllocableRegs_S390(Int *nregs, HReg **arr, Bool mode64)
+{
+ s390_hreg_get_allocable(nregs, arr);
+}
+
+
+/* Tell the register allocator how the given instruction uses the registers
+ it refers to. */
+void
+getRegUsage_S390Instr(HRegUsage *u, s390_insn *insn, Bool mode64)
+{
+ s390_insn_get_reg_usage(u, insn);
+}
+
+
+/* Map the registers of the given instruction */
+void
+mapRegs_S390Instr(HRegRemap *m, s390_insn *insn, Bool mode64)
+{
+ s390_insn_map_regs(m, insn);
+}
+
+
+/* Figure out if the given insn represents a reg-reg move, and if so
+ assign the source and destination to *src and *dst. If in doubt say No.
+ Used by the register allocator to do move coalescing. */
+Bool
+isMove_S390Instr(s390_insn *insn, HReg *src, HReg *dst)
+{
+ return s390_insn_is_reg_reg_move(insn, src, dst);
+}
+
+
+/* Generate s390 spill/reload instructions under the direction of the
+ register allocator. Note it's critical these don't write the
+ condition codes. This is like an Ist_Put */
+void
+genSpill_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64)
+{
+ s390_amode *am;
+
+ vassert(offsetB >= 0);
+ vassert(offsetB <= (1 << 12)); /* because we use b12 amode */
+ vassert(!hregIsVirtual(rreg));
+
+ *i1 = *i2 = NULL;
+
+ am = s390_amode_for_guest_state(offsetB);
+
+ switch (hregClass(rreg)) {
+ case HRcInt64:
+ case HRcFlt64:
+ *i1 = s390_insn_store(8, am, rreg);
+ return;
+
+ default:
+ ppHRegClass(hregClass(rreg));
+ vpanic("genSpill_S390: unimplemented regclass");
+ }
+}
+
+
+/* This is like an Iex_Get */
+void
+genReload_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64)
+{
+ s390_amode *am;
+
+ vassert(offsetB >= 0);
+ vassert(offsetB <= (1 << 12)); /* because we use b12 amode */
+ vassert(!hregIsVirtual(rreg));
+
+ *i1 = *i2 = NULL;
+
+ am = s390_amode_for_guest_state(offsetB);
+
+ switch (hregClass(rreg)) {
+ case HRcInt64:
+ case HRcFlt64:
+ *i1 = s390_insn_load(8, rreg, am);
+ return;
+
+ default:
+ ppHRegClass(hregClass(rreg));
+ vpanic("genReload_S390: unimplemented regclass");
+ }
+}
+
+/* Helper function for s390_insn_get_reg_usage */
+static void
+s390_opnd_RMI_get_reg_usage(HRegUsage *u, s390_opnd_RMI op)
+{
+ switch (op.tag) {
+ case S390_OPND_REG:
+ addHRegUse(u, HRmRead, op.variant.reg);
+ break;
+
+ case S390_OPND_AMODE:
+ s390_amode_get_reg_usage(u, op.variant.am);
+ break;
+
+ case S390_OPND_IMMEDIATE:
+ break;
+
+ default:
+ vpanic("s390_opnd_RMI_get_reg_usage");
+ }
+}
+
+
+/* Tell the register allocator how the given insn uses the registers */
+static void
+s390_insn_get_reg_usage(HRegUsage *u, const s390_insn *insn)
+{
+ initHRegUsage(u);
+
+ switch (insn->tag) {
+ case S390_INSN_LOAD:
+ addHRegUse(u, HRmWrite, insn->variant.load.dst);
+ s390_amode_get_reg_usage(u, insn->variant.load.src);
+ break;
+
+ case S390_INSN_LOAD_IMMEDIATE:
+ addHRegUse(u, HRmWrite, insn->variant.load_immediate.dst);
+ break;
+
+ case S390_INSN_STORE:
+ addHRegUse(u, HRmRead, insn->variant.store.src);
+ s390_amode_get_reg_usage(u, insn->variant.store.dst);
+ break;
+
+ case S390_INSN_MOVE:
+ addHRegUse(u, HRmRead, insn->variant.move.src);
+ addHRegUse(u, HRmWrite, insn->variant.move.dst);
+ break;
+
+ case S390_INSN_COND_MOVE:
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.cond_move.src);
+ addHRegUse(u, HRmWrite, insn->variant.cond_move.dst);
+ break;
+
+ case S390_INSN_ALU:
+ addHRegUse(u, HRmWrite, insn->variant.alu.dst);
+ addHRegUse(u, HRmRead, insn->variant.alu.dst); /* op1 */
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.alu.op2);
+ break;
+
+ case S390_INSN_MUL:
+ addHRegUse(u, HRmRead, insn->variant.mul.dst_lo); /* op1 */
+ addHRegUse(u, HRmWrite, insn->variant.mul.dst_lo);
+ addHRegUse(u, HRmWrite, insn->variant.mul.dst_hi);
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.mul.op2);
+ break;
+
+ case S390_INSN_DIV:
+ addHRegUse(u, HRmRead, insn->variant.div.op1_lo);
+ addHRegUse(u, HRmRead, insn->variant.div.op1_hi);
+ addHRegUse(u, HRmWrite, insn->variant.div.op1_lo);
+ addHRegUse(u, HRmWrite, insn->variant.div.op1_hi);
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.div.op2);
+ break;
+
+ case S390_INSN_DIVS:
+ addHRegUse(u, HRmRead, insn->variant.divs.op1);
+ addHRegUse(u, HRmWrite, insn->variant.divs.op1); /* quotient */
+ addHRegUse(u, HRmWrite, insn->variant.divs.rem); /* remainder */
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.divs.op2);
+ break;
+
+ case S390_INSN_CLZ:
+ addHRegUse(u, HRmWrite, insn->variant.clz.num_bits);
+ addHRegUse(u, HRmWrite, insn->variant.clz.clobber);
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.clz.src);
+ break;
+
+ case S390_INSN_UNOP:
+ addHRegUse(u, HRmWrite, insn->variant.unop.dst);
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.unop.src);
+ break;
+
+ case S390_INSN_TEST:
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.test.src);
+ break;
+
+ case S390_INSN_CC2BOOL:
+ addHRegUse(u, HRmWrite, insn->variant.cc2bool.dst);
+ break;
+
+ case S390_INSN_CAS:
+ addHRegUse(u, HRmRead, insn->variant.cas.op1);
+ s390_amode_get_reg_usage(u, insn->variant.cas.op2);
+ addHRegUse(u, HRmRead, insn->variant.cas.op3);
+ addHRegUse(u, HRmWrite, insn->variant.cas.old_mem);
+ break;
+
+ case S390_INSN_COMPARE:
+ addHRegUse(u, HRmRead, insn->variant.compare.src1);
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.compare.src2);
+ break;
+
+ case S390_INSN_BRANCH:
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.branch.dst);
+ /* The destination address is loaded into S390_REGNO_RETURN_VALUE.
+ See s390_insn_branch_emit. */
+ addHRegUse(u, HRmWrite,
+ mkHReg(S390_REGNO_RETURN_VALUE, HRcInt64, False));
+ break;
+
+ case S390_INSN_HELPER_CALL: {
+ UInt i;
+
+ /* Assume that all volatile registers are clobbered. ABI says,
+ volatile registers are: r0 - r5. Valgrind's register allocator
+ does not know about r0, so we can leave that out */
+ for (i = 1; i <= 5; ++i) {
+ addHRegUse(u, HRmWrite, mkHReg(i, HRcInt64, False));
+ }
+
+ /* Ditto for floating point registers. f0 - f7 are volatile */
+ for (i = 0; i <= 7; ++i) {
+ addHRegUse(u, HRmWrite, mkHReg(i, HRcFlt64, False));
+ }
+
+ /* The registers that are used for passing arguments will be read.
+ Not all of them may, but in general we need to assume that. */
+ for (i = 0; i < insn->variant.helper_call.num_args; ++i) {
+ addHRegUse(u, HRmRead, mkHReg(s390_gprno_from_arg_index(i),
+ HRcInt64, False));
+ }
+
+ /* s390_insn_helper_call_emit also reads / writes the link register
+ and stack pointer. But those registers are not visible to the
+ register allocator. So we don't need to do anything for them. */
+ break;
+ }
+
+ case S390_INSN_BFP_TRIOP:
+ addHRegUse(u, HRmWrite, insn->variant.bfp_triop.dst);
+ addHRegUse(u, HRmRead, insn->variant.bfp_triop.dst); /* first */
+ addHRegUse(u, HRmRead, insn->variant.bfp_triop.op2); /* second */
+ addHRegUse(u, HRmRead, insn->variant.bfp_triop.op3); /* third */
+ break;
+
+ case S390_INSN_BFP_BINOP:
+ addHRegUse(u, HRmWrite, insn->variant.bfp_binop.dst);
+ addHRegUse(u, HRmRead, insn->variant.bfp_binop.dst); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp_binop.op2); /* right */
+ break;
+
+ case S390_INSN_BFP_UNOP:
+ addHRegUse(u, HRmWrite, insn->variant.bfp_unop.dst);
+ addHRegUse(u, HRmRead, insn->variant.bfp_unop.op); /* operand */
+ break;
+
+ case S390_INSN_BFP_COMPARE:
+ addHRegUse(u, HRmWrite, insn->variant.bfp_compare.dst);
+ addHRegUse(u, HRmRead, insn->variant.bfp_compare.op1); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp_compare.op2); /* right */
+ break;
+
+ case S390_INSN_BFP128_BINOP:
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_binop.dst_hi);
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_binop.dst_lo);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.dst_hi); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.dst_lo); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.op2_hi); /* right */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.op2_lo); /* right */
+ break;
+
+ case S390_INSN_BFP128_COMPARE:
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_compare.dst);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op1_hi); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op1_lo); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op2_hi); /* right */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op2_lo); /* right */
+ break;
+
+ case S390_INSN_BFP128_UNOP:
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_hi);
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_lo);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_hi);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_lo);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_TO:
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_hi);
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_lo);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_hi);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_FROM:
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_hi);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_hi);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_lo);
+ break;
+
+ case S390_INSN_MFENCE:
+ break;
+
+ default:
+ vpanic("s390_insn_get_reg_usage");
+ }
+}
+
+
+/* Helper function for s390_insn_map_regs */
+static void
+s390_opnd_RMI_map_regs(HRegRemap *m, s390_opnd_RMI *op)
+{
+ switch (op->tag) {
+ case S390_OPND_REG:
+ op->variant.reg = lookupHRegRemap(m, op->variant.reg);
+ break;
+
+ case S390_OPND_IMMEDIATE:
+ break;
+
+ case S390_OPND_AMODE:
+ s390_amode_map_regs(m, op->variant.am);
+ break;
+
+ default:
+ vpanic("s390_opnd_RMI_map_regs");
+ }
+}
+
+
+static void
+s390_insn_map_regs(HRegRemap *m, s390_insn *insn)
+{
+ switch (insn->tag) {
+ case S390_INSN_LOAD:
+ insn->variant.load.dst = lookupHRegRemap(m, insn->variant.load.dst);
+ s390_amode_map_regs(m, insn->variant.load.src);
+ break;
+
+ case S390_INSN_STORE:
+ s390_amode_map_regs(m, insn->variant.store.dst);
+ insn->variant.store.src = lookupHRegRemap(m, insn->variant.store.src);
+ break;
+
+ case S390_INSN_MOVE:
+ insn->variant.move.dst = lookupHRegRemap(m, insn->variant.move.dst);
+ insn->variant.move.src = lookupHRegRemap(m, insn->variant.move.src);
+ break;
+
+ case S390_INSN_COND_MOVE:
+ insn->variant.cond_move.dst = lookupHRegRemap(m, insn->variant.cond_move.dst);
+ s390_opnd_RMI_map_regs(m, &insn->variant.cond_move.src);
+ break;
+
+ case S390_INSN_LOAD_IMMEDIATE:
+ insn->variant.load_immediate.dst =
+ lookupHRegRemap(m, insn->variant.load_immediate.dst);
+ break;
+
+ case S390_INSN_ALU:
+ insn->variant.alu.dst = lookupHRegRemap(m, insn->variant.alu.dst);
+ s390_opnd_RMI_map_regs(m, &insn->variant.alu.op2);
+ break;
+
+ case S390_INSN_MUL:
+ insn->variant.mul.dst_hi = lookupHRegRemap(m, insn->variant.mul.dst_hi);
+ insn->variant.mul.dst_lo = lookupHRegRemap(m, insn->variant.mul.dst_lo);
+ s390_opnd_RMI_map_regs(m, &insn->variant.mul.op2);
+ break;
+
+ case S390_INSN_DIV:
+ insn->variant.div.op1_hi = lookupHRegRemap(m, insn->variant.div.op1_hi);
+ insn->variant.div.op1_lo = lookupHRegRemap(m, insn->variant.div.op1_lo);
+ s390_opnd_RMI_map_regs(m, &insn->variant.div.op2);
+ break;
+
+ case S390_INSN_DIVS:
+ insn->variant.divs.op1 = lookupHRegRemap(m, insn->variant.divs.op1);
+ insn->variant.divs.rem = lookupHRegRemap(m, insn->variant.divs.rem);
+ s390_opnd_RMI_map_regs(m, &insn->variant.divs.op2);
+ break;
+
+ case S390_INSN_CLZ:
+ insn->variant.clz.num_bits = lookupHRegRemap(m, insn->variant.clz.num_bits);
+ insn->variant.clz.clobber = lookupHRegRemap(m, insn->variant.clz.clobber);
+ s390_opnd_RMI_map_regs(m, &insn->variant.clz.src);
+ break;
+
+ case S390_INSN_UNOP:
+ insn->variant.unop.dst = lookupHRegRemap(m, insn->variant.unop.dst);
+ s390_opnd_RMI_map_regs(m, &insn->variant.unop.src);
+ break;
+
+ case S390_INSN_TEST:
+ s390_opnd_RMI_map_regs(m, &insn->variant.test.src);
+ break;
+
+ case S390_INSN_CC2BOOL:
+ insn->variant.cc2bool.dst = lookupHRegRemap(m, insn->variant.cc2bool.dst);
+ break;
+
+ case S390_INSN_CAS:
+ insn->variant.cas.op1 = lookupHRegRemap(m, insn->variant.cas.op1);
+ s390_amode_map_regs(m, insn->variant.cas.op2);
+ insn->variant.cas.op3 = lookupHRegRemap(m, insn->variant.cas.op3);
+ insn->variant.cas.old_mem = lookupHRegRemap(m, insn->variant.cas.old_mem);
+ break;
+
+ case S390_INSN_COMPARE:
+ insn->variant.compare.src1 = lookupHRegRemap(m, insn->variant.compare.src1);
+ s390_opnd_RMI_map_regs(m, &insn->variant.compare.src2);
+ break;
+
+ case S390_INSN_BRANCH:
+ s390_opnd_RMI_map_regs(m, &insn->variant.branch.dst);
+ /* No need to map S390_REGNO_RETURN_VALUE. It's not virtual */
+ break;
+
+ case S390_INSN_HELPER_CALL:
+ /* s390_insn_helper_call_emit also reads / writes the link register
+ and stack pointer. But those registers are not visible to the
+ register allocator. So we don't need to do anything for them.
+ As for the arguments of the helper call -- they will be loaded into
+ non-virtual registers. Again, we don't need to do anything for those
+ here. */
+ break;
+
+ case S390_INSN_BFP_TRIOP:
+ insn->variant.bfp_triop.dst = lookupHRegRemap(m, insn->variant.bfp_triop.dst);
+ insn->variant.bfp_triop.op2 = lookupHRegRemap(m, insn->variant.bfp_triop.op2);
+ insn->variant.bfp_triop.op3 = lookupHRegRemap(m, insn->variant.bfp_triop.op3);
+ break;
+
+ case S390_INSN_BFP_BINOP:
+ insn->variant.bfp_binop.dst = lookupHRegRemap(m, insn->variant.bfp_binop.dst);
+ insn->variant.bfp_binop.op2 = lookupHRegRemap(m, insn->variant.bfp_binop.op2);
+ break;
+
+ case S390_INSN_BFP_UNOP:
+ insn->variant.bfp_unop.dst = lookupHRegRemap(m, insn->variant.bfp_unop.dst);
+ insn->variant.bfp_unop.op = lookupHRegRemap(m, insn->variant.bfp_unop.op);
+ break;
+
+ case S390_INSN_BFP_COMPARE:
+ insn->variant.bfp_compare.dst = lookupHRegRemap(m, insn->variant.bfp_compare.dst);
+ insn->variant.bfp_compare.op1 = lookupHRegRemap(m, insn->variant.bfp_compare.op1);
+ insn->variant.bfp_compare.op2 = lookupHRegRemap(m, insn->variant.bfp_compare.op2);
+ break;
+
+ case S390_INSN_BFP128_BINOP:
+ insn->variant.bfp128_binop.dst_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_binop.dst_hi);
+ insn->variant.bfp128_binop.dst_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_binop.dst_lo);
+ insn->variant.bfp128_binop.op2_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_binop.op2_hi);
+ insn->variant.bfp128_binop.op2_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_binop.op2_lo);
+ break;
+
+ case S390_INSN_BFP128_COMPARE:
+ insn->variant.bfp128_compare.dst =
+ lookupHRegRemap(m, insn->variant.bfp128_compare.dst);
+ insn->variant.bfp128_compare.op1_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_compare.op1_hi);
+ insn->variant.bfp128_compare.op1_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_compare.op1_lo);
+ insn->variant.bfp128_compare.op2_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_compare.op2_hi);
+ insn->variant.bfp128_compare.op2_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_compare.op2_lo);
+ break;
+
+ case S390_INSN_BFP128_UNOP:
+ insn->variant.bfp128_unop.dst_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_hi);
+ insn->variant.bfp128_unop.dst_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_lo);
+ insn->variant.bfp128_unop.op_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_hi);
+ insn->variant.bfp128_unop.op_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_lo);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_TO:
+ insn->variant.bfp128_unop.dst_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_hi);
+ insn->variant.bfp128_unop.dst_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_lo);
+ insn->variant.bfp128_unop.op_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_hi);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_FROM:
+ insn->variant.bfp128_unop.dst_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_hi);
+ insn->variant.bfp128_unop.op_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_hi);
+ insn->variant.bfp128_unop.op_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_lo);
+ break;
+
+ case S390_INSN_MFENCE:
+ break;
+
+ default:
+ vpanic("s390_insn_map_regs");
+ }
+}
+
+
+/* Return True, if INSN is a move between two registers of the same class.
+ In that case assign the source and destination registers to SRC and DST,
+ respectively. */
+static Bool
+s390_insn_is_reg_reg_move(const s390_insn *insn, HReg *src, HReg *dst)
+{
+ if (insn->tag == S390_INSN_MOVE &&
+ hregClass(insn->variant.move.src) == hregClass(insn->variant.move.dst)) {
+ *src = insn->variant.move.src;
+ *dst = insn->variant.move.dst;
+ return True;
+ }
+
+ return False;
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Functions to emit a sequence of bytes ---*/
+/*------------------------------------------------------------*/
+
+static __inline__ UChar *
+emit_2bytes(UChar *p, ULong val)
+{
+ return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 6, 2) + 2;
+}
+
+
+static __inline__ UChar *
+emit_4bytes(UChar *p, ULong val)
+{
+ return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 4, 4) + 4;
+}
+
+
+static __inline__ UChar *
+emit_6bytes(UChar *p, ULong val)
+{
+ return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 2, 6) + 6;
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Functions to emit various instruction formats ---*/
+/*------------------------------------------------------------*/
+
+static UChar *
+emit_RI(UChar *p, UInt op, UChar r1, UShort i2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 20;
+ the_insn |= ((ULong)i2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RIL(UChar *p, ULong op, UChar r1, UInt i2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 36;
+ the_insn |= ((ULong)i2) << 0;
+
+ return emit_6bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RR(UChar *p, UInt op, UChar r1, UChar r2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 4;
+ the_insn |= ((ULong)r2) << 0;
+
+ return emit_2bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RRE(UChar *p, UInt op, UChar r1, UChar r2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 4;
+ the_insn |= ((ULong)r2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RRF(UChar *p, UInt op, UChar r1, UChar r3, UChar r2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 12;
+ the_insn |= ((ULong)r3) << 4;
+ the_insn |= ((ULong)r2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RRF3(UChar *p, UInt op, UChar r3, UChar r1, UChar r2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r3) << 12;
+ the_insn |= ((ULong)r1) << 4;
+ the_insn |= ((ULong)r2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RS(UChar *p, UInt op, UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 20;
+ the_insn |= ((ULong)r3) << 16;
+ the_insn |= ((ULong)b2) << 12;
+ the_insn |= ((ULong)d2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RSY(UChar *p, ULong op, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 36;
+ the_insn |= ((ULong)r3) << 32;
+ the_insn |= ((ULong)b2) << 28;
+ the_insn |= ((ULong)dl2) << 16;
+ the_insn |= ((ULong)dh2) << 8;
+
+ return emit_6bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RX(UChar *p, UInt op, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 20;
+ the_insn |= ((ULong)x2) << 16;
+ the_insn |= ((ULong)b2) << 12;
+ the_insn |= ((ULong)d2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RXY(UChar *p, ULong op, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 36;
+ the_insn |= ((ULong)x2) << 32;
+ the_insn |= ((ULong)b2) << 28;
+ the_insn |= ((ULong)dl2) << 16;
+ the_insn |= ((ULong)dh2) << 8;
+
+ return emit_6bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_S(UChar *p, UInt op, UChar b2, UShort d2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)b2) << 12;
+ the_insn |= ((ULong)d2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Functions to emit particular instructions ---*/
+/*------------------------------------------------------------*/
+
+static UChar *
+s390_emit_AR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "ar", r1, r2);
+
+ return emit_RR(p, 0x1a00, r1, r2);
+}
+
+
+static UChar *
+s390_emit_AGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "agr", r1, r2);
+
+ return emit_RRE(p, 0xb9080000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_A(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "a", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x5a000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_AY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ay", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000005aULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_AG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ag", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000008ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_AFI(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "afi", r1, i2);
+
+ return emit_RIL(p, 0xc20900000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_AGFI(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "agfi", r1, i2);
+
+ return emit_RIL(p, 0xc20800000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_AH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "ah", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x4a000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_AHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ahy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000007aULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_AHI(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "ahi", r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa70a0000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_AGHI(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "aghi", r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa70b0000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_NR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "nr", r1, r2);
+
+ return emit_RR(p, 0x1400, r1, r2);
+}
+
+
+static UChar *
+s390_emit_NGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "ngr", r1, r2);
+
+ return emit_RRE(p, 0xb9800000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_N(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "n", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x54000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_NY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ny", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000054ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_NG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ng", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000080ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_NIHF(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "nihf", r1, i2);
+
+ return emit_RIL(p, 0xc00a00000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_NILF(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "nilf", r1, i2);
+
+ return emit_RIL(p, 0xc00b00000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_NILL(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "nill", r1, i2);
+
+ return emit_RI(p, 0xa5070000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_BASR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "basr", r1, r2);
+
+ return emit_RR(p, 0x0d00, r1, r2);
+}
+
+
+static UChar *
+s390_emit_BCR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
+
+ return emit_RR(p, 0x0700, r1, r2);
+}
+
+
+static UChar *
+s390_emit_BRC(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa7040000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_CR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "cr", r1, r2);
+
+ return emit_RR(p, 0x1900, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "cgr", r1, r2);
+
+ return emit_RRE(p, 0xb9200000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_C(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "c", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x59000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_CY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "cy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000059ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_CG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "cg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000020ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_CFI(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "cfi", r1, i2);
+
+ return emit_RIL(p, 0xc20d00000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_CS(UChar *p, UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, UDXB), "cs", r1, r3, d2, 0, b2);
+
+ return emit_RS(p, 0xba000000, r1, r3, b2, d2);
+}
+
+
+static UChar *
+s390_emit_CSY(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "csy", r1, r3, dh2, dl2, 0, b2);
+
+ return emit_RSY(p, 0xeb0000000014ULL, r1, r3, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_CSG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "csg", r1, r3, dh2, dl2, 0, b2);
+
+ return emit_RSY(p, 0xeb0000000030ULL, r1, r3, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_CLR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "clr", r1, r2);
+
+ return emit_RR(p, 0x1500, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CLGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "clgr", r1, r2);
+
+ return emit_RRE(p, 0xb9210000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CL(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "cl", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x55000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_CLY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "cly", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000055ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_CLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "clg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000021ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_CLFI(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "clfi", r1, i2);
+
+ return emit_RIL(p, 0xc20f00000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_DR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "dr", r1, r2);
+
+ return emit_RR(p, 0x1d00, r1, r2);
+}
+
+
+static UChar *
+s390_emit_D(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "d", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x5d000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_DLR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "dlr", r1, r2);
+
+ return emit_RRE(p, 0xb9970000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_DLGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "dlgr", r1, r2);
+
+ return emit_RRE(p, 0xb9870000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_DL(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "dl", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000097ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_DLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "dlg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000087ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_DSGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "dsgr", r1, r2);
+
+ return emit_RRE(p, 0xb90d0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_DSG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "dsg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000000dULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_XR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "xr", r1, r2);
+
+ return emit_RR(p, 0x1700, r1, r2);
+}
+
+
+static UChar *
+s390_emit_XGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "xgr", r1, r2);
+
+ return emit_RRE(p, 0xb9820000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_X(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "x", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x57000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_XY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "xy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000057ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_XG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "xg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000082ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_XIHF(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "xihf", r1, i2);
+
+ return emit_RIL(p, 0xc00600000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_XILF(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "xilf", r1, i2);
+
+ return emit_RIL(p, 0xc00700000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_FLOGR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "flogr", r1, r2);
+
+ return emit_RRE(p, 0xb9830000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_IC(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "ic", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x43000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_ICY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "icy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000073ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_IIHF(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iihf", r1, i2);
+
+ return emit_RIL(p, 0xc00800000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_IIHH(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iihh", r1, i2);
+
+ return emit_RI(p, 0xa5000000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_IIHL(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iihl", r1, i2);
+
+ return emit_RI(p, 0xa5010000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_IILF(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iilf", r1, i2);
+
+ return emit_RIL(p, 0xc00900000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_IILH(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iilh", r1, i2);
+
+ return emit_RI(p, 0xa5020000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_IILL(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iill", r1, i2);
+
+ return emit_RI(p, 0xa5030000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_IPM(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, GPR), "ipm", r1);
+
+ return emit_RRE(p, 0xb2220000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lr", r1, r2);
+
+ return emit_RR(p, 0x1800, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lgr", r1, r2);
+
+ return emit_RRE(p, 0xb9040000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LGFR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lgfr", r1, r2);
+
+ return emit_RRE(p, 0xb9140000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_L(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "l", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x58000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_LY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ly", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000058ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000004ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LGF(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lgf", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000014ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LGFI(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "lgfi", r1, i2);
+
+ return emit_RIL(p, 0xc00100000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_LTR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "ltr", r1, r2);
+
+ return emit_RR(p, 0x1200, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LTGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "ltgr", r1, r2);
+
+ return emit_RRE(p, 0xb9020000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LT(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lt", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000012ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LTG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ltg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000002ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LBR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lbr", r1, r2);
+
+ return emit_RRE(p, 0xb9260000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LGBR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lgbr", r1, r2);
+
+ return emit_RRE(p, 0xb9060000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LB(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lb", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000076ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LGB(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lgb", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000077ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LCR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lcr", r1, r2);
+
+ return emit_RR(p, 0x1300, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LCGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lcgr", r1, r2);
+
+ return emit_RRE(p, 0xb9030000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LHR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lhr", r1, r2);
+
+ return emit_RRE(p, 0xb9270000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LGHR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lghr", r1, r2);
+
+ return emit_RRE(p, 0xb9070000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "lh", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x48000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_LHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lhy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000078ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LGH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lgh", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000015ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LHI(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "lhi", r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa7080000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_LGHI(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "lghi", r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa7090000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_LLGFR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "llgfr", r1, r2);
+
+ return emit_RRE(p, 0xb9160000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LLGF(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "llgf", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000016ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LLCR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "llcr", r1, r2);
+
+ return emit_RRE(p, 0xb9940000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LLGCR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "llgcr", r1, r2);
+
+ return emit_RRE(p, 0xb9840000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LLC(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "llc", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000094ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LLGC(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "llgc", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000090ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LLHR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "llhr", r1, r2);
+
+ return emit_RRE(p, 0xb9950000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LLGHR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "llghr", r1, r2);
+
+ return emit_RRE(p, 0xb9850000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LLH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "llh", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000095ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LLGH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "llgh", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000091ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LLILF(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "llilf", r1, i2);
+
+ return emit_RIL(p, 0xc00f00000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_LLILH(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "llilh", r1, i2);
+
+ return emit_RI(p, 0xa50e0000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_LLILL(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "llill", r1, i2);
+
+ return emit_RI(p, 0xa50f0000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_MR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "mr", r1, r2);
+
+ return emit_RR(p, 0x1c00, r1, r2);
+}
+
+
+static UChar *
+s390_emit_M(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "m", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x5c000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_MFY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_gie);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "mfy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000005cULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_MH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "mh", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x4c000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_MHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_gie);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "mhy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000007cULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_MHI(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "mhi", r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa70c0000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_MLR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "mlr", r1, r2);
+
+ return emit_RRE(p, 0xb9960000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_MLGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "mlgr", r1, r2);
+
+ return emit_RRE(p, 0xb9860000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_ML(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ml", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000096ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_MLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "mlg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000086ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_MSR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "msr", r1, r2);
+
+ return emit_RRE(p, 0xb2520000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_MSGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "msgr", r1, r2);
+
+ return emit_RRE(p, 0xb90c0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_MS(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "ms", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x71000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_MSY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "msy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000051ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_MSG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "msg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000000cULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_MSFI(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_gie);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "msfi", r1, i2);
+
+ return emit_RIL(p, 0xc20100000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_MSGFI(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_gie);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "msgfi", r1, i2);
+
+ return emit_RIL(p, 0xc20000000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_OR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "or", r1, r2);
+
+ return emit_RR(p, 0x1600, r1, r2);
+}
+
+
+static UChar *
+s390_emit_OGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "ogr", r1, r2);
+
+ return emit_RRE(p, 0xb9810000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_O(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "o", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x56000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_OY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "oy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000056ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_OG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "og", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000081ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_OIHF(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "oihf", r1, i2);
+
+ return emit_RIL(p, 0xc00c00000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_OILF(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "oilf", r1, i2);
+
+ return emit_RIL(p, 0xc00d00000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_OILL(UChar *p, UChar r1, UShort i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "oill", r1, i2);
+
+ return emit_RI(p, 0xa50b0000, r1, i2);
+}
+
+
+static UChar *
+s390_emit_SLL(UChar *p, UChar r1, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "sll", r1, d2, 0, b2);
+
+ return emit_RS(p, 0x89000000, r1, 0, b2, d2);
+}
+
+
+static UChar *
+s390_emit_SLLG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "sllg", r1, r3, dh2, dl2, 0, b2);
+
+ return emit_RSY(p, 0xeb000000000dULL, r1, r3, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_SRA(UChar *p, UChar r1, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "sra", r1, d2, 0, b2);
+
+ return emit_RS(p, 0x8a000000, r1, 0, b2, d2);
+}
+
+
+static UChar *
+s390_emit_SRAG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "srag", r1, r3, dh2, dl2, 0, b2);
+
+ return emit_RSY(p, 0xeb000000000aULL, r1, r3, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_SRL(UChar *p, UChar r1, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "srl", r1, d2, 0, b2);
+
+ return emit_RS(p, 0x88000000, r1, 0, b2, d2);
+}
+
+
+static UChar *
+s390_emit_SRLG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "srlg", r1, r3, dh2, dl2, 0, b2);
+
+ return emit_RSY(p, 0xeb000000000cULL, r1, r3, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_ST(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "st", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x50000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_STY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "sty", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000050ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_STG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "stg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000024ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_STC(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "stc", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x42000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_STCY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "stcy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000072ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_STH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "sth", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x40000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_STHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "sthy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000070ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_SR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "sr", r1, r2);
+
+ return emit_RR(p, 0x1b00, r1, r2);
+}
+
+
+static UChar *
+s390_emit_SGR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "sgr", r1, r2);
+
+ return emit_RRE(p, 0xb9090000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_S(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "s", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x5b000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_SY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "sy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000005bULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_SG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "sg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000009ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_SH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "sh", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x4b000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_SHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "shy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000007bULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_SLFI(UChar *p, UChar r1, UInt i2)
+{
+ vassert(s390_host_has_eimm);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "slfi", r1, i2);
+
+ return emit_RIL(p, 0xc20500000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_SLGFI(UChar *p, UChar r1, UInt i2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "slgfi", r1, i2);
+
+ return emit_RIL(p, 0xc20400000000ULL, r1, i2);
+}
+
+
+static UChar *
+s390_emit_LDR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "ldr", r1, r2);
+
+ return emit_RR(p, 0x2800, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LE(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, UDXB), "le", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x78000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_LD(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, UDXB), "ld", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x68000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_LEY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, SDXB), "ley", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xed0000000064ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LDY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, SDXB), "ldy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xed0000000065ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_LFPC(UChar *p, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, UDXB), "lfpc", d2, 0, b2);
+
+ return emit_S(p, 0xb29d0000, b2, d2);
+}
+
+
+static UChar *
+s390_emit_LDGR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_fgx);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "ldgr", r1, r2);
+
+ return emit_RRE(p, 0xb3c10000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LGDR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_fgx);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, FPR), "lgdr", r1, r2);
+
+ return emit_RRE(p, 0xb3cd0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LZER(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, FPR), "lzer", r1);
+
+ return emit_RRE(p, 0xb3740000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LZDR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, FPR), "lzdr", r1);
+
+ return emit_RRE(p, 0xb3750000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_SFPC(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, GPR), "sfpc", r1);
+
+ return emit_RRE(p, 0xb3840000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_STE(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, UDXB), "ste", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x70000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_STD(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, UDXB), "std", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x60000000, r1, x2, b2, d2);
+}
+
+
+static UChar *
+s390_emit_STEY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, SDXB), "stey", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xed0000000066ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_STDY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, SDXB), "stdy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xed0000000067ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static UChar *
+s390_emit_STFPC(UChar *p, UChar b2, UShort d2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, UDXB), "stfpc", d2, 0, b2);
+
+ return emit_S(p, 0xb29c0000, b2, d2);
+}
+
+
+static UChar *
+s390_emit_AEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "aebr", r1, r2);
+
+ return emit_RRE(p, 0xb30a0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_ADBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "adbr", r1, r2);
+
+ return emit_RRE(p, 0xb31a0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_AXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "axbr", r1, r2);
+
+ return emit_RRE(p, 0xb34a0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "cebr", r1, r2);
+
+ return emit_RRE(p, 0xb3090000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "cdbr", r1, r2);
+
+ return emit_RRE(p, 0xb3190000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "cxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3490000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CEFBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cefbr", r1, r2);
+
+ return emit_RRE(p, 0xb3940000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CDFBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cdfbr", r1, r2);
+
+ return emit_RRE(p, 0xb3950000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CXFBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cxfbr", r1, r2);
+
+ return emit_RRE(p, 0xb3960000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CEGBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cegbr", r1, r2);
+
+ return emit_RRE(p, 0xb3a40000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CDGBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cdgbr", r1, r2);
+
+ return emit_RRE(p, 0xb3a50000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CXGBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cxgbr", r1, r2);
+
+ return emit_RRE(p, 0xb3a60000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CFEBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfebr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb3980000, r3, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CFDBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfdbr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb3990000, r3, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CFXBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfxbr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb39a0000, r3, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CGEBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgebr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb3a80000, r3, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CGDBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgdbr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb3a90000, r3, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CGXBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgxbr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb3aa0000, r3, r1, r2);
+}
+
+
+static UChar *
+s390_emit_DEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "debr", r1, r2);
+
+ return emit_RRE(p, 0xb30d0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_DDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "ddbr", r1, r2);
+
+ return emit_RRE(p, 0xb31d0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_DXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "dxbr", r1, r2);
+
+ return emit_RRE(p, 0xb34d0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LCEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lcebr", r1, r2);
+
+ return emit_RRE(p, 0xb3030000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LCDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lcdbr", r1, r2);
+
+ return emit_RRE(p, 0xb3130000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LCXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lcxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3430000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LDEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "ldebr", r1, r2);
+
+ return emit_RRE(p, 0xb3040000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LXDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lxdbr", r1, r2);
+
+ return emit_RRE(p, 0xb3050000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LXEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lxebr", r1, r2);
+
+ return emit_RRE(p, 0xb3060000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LNEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lnebr", r1, r2);
+
+ return emit_RRE(p, 0xb3010000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LNDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lndbr", r1, r2);
+
+ return emit_RRE(p, 0xb3110000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LNXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lnxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3410000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LPEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lpebr", r1, r2);
+
+ return emit_RRE(p, 0xb3000000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LPDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lpdbr", r1, r2);
+
+ return emit_RRE(p, 0xb3100000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LPXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lpxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3400000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LEDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "ledbr", r1, r2);
+
+ return emit_RRE(p, 0xb3440000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LDXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "ldxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3450000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LEXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lexbr", r1, r2);
+
+ return emit_RRE(p, 0xb3460000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_MEEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "meebr", r1, r2);
+
+ return emit_RRE(p, 0xb3170000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_MDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "mdbr", r1, r2);
+
+ return emit_RRE(p, 0xb31c0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_MXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "mxbr", r1, r2);
+
+ return emit_RRE(p, 0xb34c0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_MAEBR(UChar *p, UChar r1, UChar r3, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "maebr", r1, r3, r2);
+
+ return emit_RRF(p, 0xb30e0000, r1, r3, r2);
+}
+
+
+static UChar *
+s390_emit_MADBR(UChar *p, UChar r1, UChar r3, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "madbr", r1, r3, r2);
+
+ return emit_RRF(p, 0xb31e0000, r1, r3, r2);
+}
+
+
+static UChar *
+s390_emit_MSEBR(UChar *p, UChar r1, UChar r3, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "msebr", r1, r3, r2);
+
+ return emit_RRF(p, 0xb30f0000, r1, r3, r2);
+}
+
+
+static UChar *
+s390_emit_MSDBR(UChar *p, UChar r1, UChar r3, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "msdbr", r1, r3, r2);
+
+ return emit_RRF(p, 0xb31f0000, r1, r3, r2);
+}
+
+
+static UChar *
+s390_emit_SQEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sqebr", r1, r2);
+
+ return emit_RRE(p, 0xb3140000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_SQDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sqdbr", r1, r2);
+
+ return emit_RRE(p, 0xb3150000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_SQXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sqxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3160000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_SEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sebr", r1, r2);
+
+ return emit_RRE(p, 0xb30b0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_SDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sdbr", r1, r2);
+
+ return emit_RRE(p, 0xb31b0000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_SXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sxbr", r1, r2);
+
+ return emit_RRE(p, 0xb34b0000, r1, r2);
+}
+
+
+/* Provide a symbolic name for register "R0" */
+#define R0 0
+
+/* Split up a 20-bit displacement into its high and low piece
+ suitable for passing as function arguments */
+#define DISP20(d) (((UInt)d) & 0xFFF), ((((UInt)d) >> 12) & 0xFF)
+
+/*---------------------------------------------------------------*/
+/*--- Helper functions ---*/
+/*---------------------------------------------------------------*/
+
+static __inline__ Bool
+uint_fits_signed_16bit(UInt val)
+{
+ int v = val & 0xFFFFu;
+
+ /* sign extend */
+ v = (v << 16) >> 16;
+
+ return val == (UInt)v;
+}
+
+
+static __inline__ Bool
+ulong_fits_signed_16bit(ULong val)
+{
+ Long v = val & 0xFFFFu;
+
+ /* sign extend */
+ v = (v << 48) >> 48;
+
+ return val == (ULong)v;
+}
+
+
+static __inline__ Bool
+ulong_fits_signed_32bit(ULong val)
+{
+ Long v = val & 0xFFFFFFFFu;
+
+ /* sign extend */
+ v = (v << 32) >> 32;
+
+ return val == (ULong)v;
+}
+
+
+static __inline__ Bool
+ulong_fits_unsigned_32bit(ULong val)
+{
+ return (val & 0xFFFFFFFFu) == val;
+}
+
+
+/* Load a 64-bit immediate VAL into register REG. */
+static UChar *
+s390_emit_load_64imm(UChar *p, UChar reg, ULong val)
+{
+ if (ulong_fits_signed_16bit(val)) {
+ return s390_emit_LGHI(p, reg, val);
+ }
+
+ if (s390_host_has_eimm) {
+ if (ulong_fits_unsigned_32bit(val)) {
+ return s390_emit_LLILF(p, reg, val);
+ }
+ if (ulong_fits_signed_32bit(val)) {
+ /* LGFI's sign extension will recreate the correct 64-bit value */
+ return s390_emit_LGFI(p, reg, val);
+ }
+ /* Do it in two steps: upper half [0:31] and lower half [32:63] */
+ p = s390_emit_IIHF(p, reg, val >> 32);
+ return s390_emit_IILF(p, reg, val & 0xFFFFFFFF);
+ }
+
+ /* Fall back */
+ if (ulong_fits_unsigned_32bit(val)) {
+ p = s390_emit_LLILH(p, reg, (val >> 16) & 0xFFFF); /* sets val[32:47]
+ val[0:31] = 0 */
+ p = s390_emit_IILL(p, reg, val & 0xFFFF); /* sets val[48:63] */
+ return p;
+ }
+
+ p = s390_emit_IIHH(p, reg, (val >> 48) & 0xFFFF);
+ p = s390_emit_IIHL(p, reg, (val >> 32) & 0xFFFF);
+ p = s390_emit_IILH(p, reg, (val >> 16) & 0xFFFF);
+ p = s390_emit_IILL(p, reg, val & 0xFFFF);
+
+ return p;
+}
+
+/* Load a 32-bit immediate VAL into register REG. */
+static UChar *
+s390_emit_load_32imm(UChar *p, UChar reg, UInt val)
+{
+ if (uint_fits_signed_16bit(val)) {
+ /* LHI's sign extension will recreate the correct 32-bit value */
+ return s390_emit_LHI(p, reg, val);
+ }
+ if (s390_host_has_eimm) {
+ return s390_emit_IILF(p, reg, val);
+ }
+ /* val[0:15] --> (val >> 16) & 0xFFFF
+ val[16:31] --> val & 0xFFFF */
+ p = s390_emit_IILH(p, reg, (val >> 16) & 0xFFFF);
+ return s390_emit_IILL(p, reg, val & 0xFFFF);
+}
+
+/*------------------------------------------------------------*/
+/*--- Wrapper functions ---*/
+/*------------------------------------------------------------*/
+
+/* r1[32:63],r1+1[32:63] = r1+1[32:63] * memory[op2addr][0:31] */
+static UChar *
+s390_emit_MFYw(UChar *p, UChar r1, UChar x, UChar b, UShort dl, UChar dh)
+{
+ if (s390_host_has_gie) {
+ return s390_emit_MFY(p, r1, x, b, dl, dh);
+ }
+
+ /* Load from memory into R0, then MULTIPLY with R1 */
+ p = s390_emit_LY(p, R0, x, b, dl, dh);
+ return s390_emit_MR(p, r1, R0);
+}
+
+/* r1[32:63] = r1[32:63] * memory[op2addr][0:15] */
+static UChar *
+s390_emit_MHYw(UChar *p, UChar r1, UChar x, UChar b, UShort dl, UChar dh)
+{
+ if (s390_host_has_gie) {
+ return s390_emit_MHY(p, r1, x, b, dl, dh);
+ }
+
+ /* Load from memory into R0, then MULTIPLY with R1 */
+ p = s390_emit_LHY(p, R0, x, b, dl, dh);
+ return s390_emit_MSR(p, r1, R0);
+}
+
+/* r1[32:63] = r1[32:63] * i2 */
+static UChar *
+s390_emit_MSFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_gie) {
+ return s390_emit_MSFI(p, r1, i2);
+ }
+
+ /* Load I2 into R0; then MULTIPLY R0 with R1 */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_MSR(p, r1, R0);
+}
+
+
+/* r1[32:63] = r1[32:63] & i2 */
+static UChar *
+s390_emit_NILFw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_NILF(p, r1, i2);
+ }
+
+ /* Load I2 into R0; then AND R0 with R1 */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_NR(p, r1, R0);
+}
+
+
+/* r1[32:63] = r1[32:63] | i2 */
+static UChar *
+s390_emit_OILFw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_OILF(p, r1, i2);
+ }
+
+ /* Load I2 into R0; then AND R0 with R1 */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_OR(p, r1, R0);
+}
+
+
+/* r1[32:63] = r1[32:63] ^ i2 */
+static UChar *
+s390_emit_XILFw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_XILF(p, r1, i2);
+ }
+
+ /* Load I2 into R0; then AND R0 with R1 */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_XR(p, r1, R0);
+}
+
+
+/* r1[32:63] = sign_extend(mem[op2addr][0:7]) */
+static UChar *
+s390_emit_LBw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (s390_host_has_ldisp) {
+ return s390_emit_LB(p, r1, x2, b2, dl2, dh2);
+ }
+
+ p = s390_emit_IC(p, r1, x2, b2, dl2); /* r1[56:63] = mem[op2addr][0:7] */
+ p = s390_emit_SLL(p, r1, R0, 24); /* r1 = r1 << 24 */
+ return s390_emit_SRA(p, r1, R0, 24); /* r1 = r1 >>a 24 */
+}
+
+
+/* r1[32:63] = sign_extend(r2[56:63]) */
+static UChar *
+s390_emit_LBRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LBR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
+ p = s390_emit_SLL(p, r1, R0, 24); /* r1 = r1 << 24 */
+ return s390_emit_SRA(p, r1, R0, 24); /* r1 = r1 >>a 24 */
+}
+
+
+/* r1[0:63] = sign_extend(mem[op2addr][0:7]) */
+static UChar *
+s390_emit_LGBw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ vassert(s390_host_has_ldisp || dh2 == 0);
+
+ if (s390_host_has_ldisp) {
+ return s390_emit_LGB(p, r1, x2, b2, dl2, dh2);
+ }
+
+ p = s390_emit_IC(p, r1, x2, b2, dl2); /* r1[56:63] = mem[op2addr][0:7] */
+ p = s390_emit_SLLG(p, r1, r1, R0, DISP20(56)); /* r1 = r1 << 56 */
+ return s390_emit_SRAG(p, r1, r1, R0, DISP20(56)); /* r1 = r1 >>a 56 */
+}
+
+
+/* r1[0:63] = sign_extend(r2[56:63]) */
+static UChar *
+s390_emit_LGBRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LGBR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
+ p = s390_emit_SLLG(p, r1, r1, R0, DISP20(56)); /* r1 = r1 << 56 */
+ return s390_emit_SRAG(p, r1, r1, R0, DISP20(56)); /* r1 = r1 >>a 56 */
+}
+
+
+/* r1[32:63] = sign_extend(r2[48:63]) */
+static UChar *
+s390_emit_LHRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LHR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
+ p = s390_emit_SLL(p, r1, R0, 16); /* r1 = r1 << 16 */
+ return s390_emit_SRA(p, r1, R0, 16); /* r1 = r1 >>a 16 */
+}
+
+
+/* r1[0:63] = sign_extend(r2[48:63]) */
+static UChar *
+s390_emit_LGHRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LGHR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
+ p = s390_emit_SLLG(p, r1, r1, R0, DISP20(48)); /* r1 = r1 << 48 */
+ return s390_emit_SRAG(p, r1, r1, R0, DISP20(48)); /* r1 = r1 >>a 48 */
+}
+
+
+/* r1[0:63] = sign_extend(i2) */
+static UChar *
+s390_emit_LGFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LGFI(p, r1, i2);
+ }
+
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_LGFR(p, r1, R0);
+}
+
+
+/* r1[32:63] = zero_extend($r2[56:63]) */
+static UChar *
+s390_emit_LLCRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLCR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2);
+ p = s390_emit_LHI(p, R0, 0xFF);
+ return s390_emit_NR(p, r1, R0);
+}
+
+
+/* r1[0:63] = zero_extend($r2[56:63]) */
+static UChar *
+s390_emit_LLGCRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLGCR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2);
+ p = s390_emit_LLILL(p, R0, 0xFF);
+ return s390_emit_NGR(p, r1, R0);
+}
+
+
+/* r1[32:63] = zero_extend(r2[48:63]) */
+static UChar *
+s390_emit_LLHRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLHR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2);
+ p = s390_emit_LLILL(p, R0, 0xFFFF);
+ return s390_emit_NR(p, r1, R0);
+}
+
+
+/* r1[0:63] = zero_extend(r2[48:63]) */
+static UChar *
+s390_emit_LLGHRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLGHR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2);
+ p = s390_emit_LLILL(p, R0, 0xFFFF);
+ return s390_emit_NGR(p, r1, R0);
+}
+
+
+/* r1[32:63] = zero_extend(mem[op2addr][0:7]) */
+static UChar *
+s390_emit_LLCw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLC(p, r1, x2, b2, dl, dh);
+ }
+
+ if (dh == 0) {
+ p = s390_emit_IC(p, r1, x2, b2, dl);
+ } else {
+ p = s390_emit_ICY(p, r1, x2, b2, dl, dh);
+ }
+ p = s390_emit_LLILL(p, R0, 0xFF);
+ return s390_emit_NR(p, r1, R0);
+}
+
+
+/* r1[32:63] = zero_extend(mem[op2addr][0:15]) */
+static UChar *
+s390_emit_LLHw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLH(p, r1, x2, b2, dl, dh);
+ }
+
+ p = s390_emit_LLGH(p, r1, x2, b2, dl, dh);
+ p = s390_emit_LLILL(p, R0, 0xFFFF);
+ return s390_emit_NR(p, r1, R0);
+}
+
+
+/* r1[0:63] = zero_extend(i2) */
+static UChar *
+s390_emit_LLILFw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLILF(p, r1, i2);
+ }
+
+ p = s390_emit_LLILH(p, r1, (i2 >> 16) & 0xFFFF); /* i2[0:15] */
+ return s390_emit_OILL(p, r1, i2 & 0xFFFF);
+}
+
+
+/* r1[32:63] = r1[32:63] + i2 */
+static UChar *
+s390_emit_AFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_AFI(p, r1, i2);
+ }
+ /* Load 32 bit immediate to R0 then add */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_AR(p, r1, R0);
+}
+
+
+/* r1[32:63] = r1[32:63] - i2 */
+static UChar *
+s390_emit_SLFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_SLFI(p, r1, i2);
+ }
+
+ /* Load 32 bit immediate to R0 then subtract */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_SR(p, r1, R0);
+}
+
+
+/* r1[0:63] = r1[0:63] - zero_extend(i2) */
+static UChar *
+s390_emit_SLGFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_SLGFI(p, r1, i2);
+ }
+
+ /* Load zero-extended 32 bit immediate to R0 then subtract */
+ p = s390_emit_load_64imm(p, R0, i2);
+ return s390_emit_SGR(p, r1, R0);
+}
+
+
+static UChar *
+s390_emit_LTw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LT(p, r1, x2, b2, dl, dh);
+ }
+ /* Load 32 bit from memory to R0 then compare */
+ if (dh == 0) {
+ p = s390_emit_L(p, R0, x2, b2, dl);
+ } else {
+ p = s390_emit_LY(p, R0, x2, b2, dl, dh);
+ }
+ return s390_emit_LTR(p, r1, R0);
+}
+
+
+static UChar *
+s390_emit_LTGw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LTG(p, r1, x2, b2, dl, dh);
+ }
+ /* Load 64 bit from memory to R0 then compare */
+ p = s390_emit_LG(p, R0, x2, b2, dl, dh);
+ return s390_emit_LTGR(p, r1, R0);
+}
+
+
+static UChar *
+s390_emit_CFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_CFI(p, r1, i2);
+ }
+ /* Load 32 bit immediate to R0 then compare */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_CR(p, r1, R0);
+}
+
+
+static UChar *
+s390_emit_CLFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_CLFI(p, r1, i2);
+ }
+ /* Load 32 bit immediate to R0 then compare */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_CLR(p, r1, R0);
+}
+
+
+static UChar *
+s390_emit_LGDRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_fgx) {
+ return s390_emit_LGDR(p, r1, r2);
+ }
+
+ /* Store the FPR at memory[sp - 8]. This is safe because SP grows towards
+ smaller addresses and is 8-byte aligned. Then load the GPR from that
+ memory location/ */
+ if (s390_host_has_ldisp) {
+ p = s390_emit_STDY(p, r2, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
+ return s390_emit_LG(p, r1, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
+ }
+
+ /* No long displacement. Need to adjust SP explicitly as to avoid negative
+ displacements. */
+ p = s390_emit_AGHI(p, S390_REGNO_STACK_POINTER, -8);
+ p = s390_emit_STD(p, r2, R0, S390_REGNO_STACK_POINTER, 0);
+ p = s390_emit_LG(p, r1, R0, S390_REGNO_STACK_POINTER, DISP20(0));
+ return s390_emit_AGHI(p, S390_REGNO_STACK_POINTER, 8);
+}
+
+
+static UChar *
+s390_emit_LDGRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_fgx) {
+ return s390_emit_LDGR(p, r1, r2);
+ }
+
+ /* Store the GPR at memory[sp - 8]. This is safe because SP grows towards
+ smaller addresses and is 8-byte aligned. Then load the FPR from that
+ memory location/ */
+ if (s390_host_has_ldisp) {
+ p = s390_emit_STG(p, r2, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
+ return s390_emit_LDY(p, r1, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
+ }
+
+ /* No long displacement. Need to adjust SP explicitly as to avoid negative
+ displacements. */
+ p = s390_emit_AGHI(p, S390_REGNO_STACK_POINTER, -8);
+ p = s390_emit_STG(p, r2, R0, S390_REGNO_STACK_POINTER, DISP20(0));
+ p = s390_emit_LD(p, r1, R0, S390_REGNO_STACK_POINTER, 0);
+ return s390_emit_AGHI(p, S390_REGNO_STACK_POINTER, 8);
+}
+
+
+/*---------------------------------------------------------------*/
+/*--- Constructors for the various s390_insn kinds ---*/
+/*---------------------------------------------------------------*/
+
+s390_insn *
+s390_insn_load(UChar size, HReg dst, s390_amode *src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_LOAD;
+ insn->size = size;
+ insn->variant.load.src = src;
+ insn->variant.load.dst = dst;
+
+ vassert(size == 1 || size == 2 || size == 4 || size == 8);
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_store(UChar size, s390_amode *dst, HReg src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_STORE;
+ insn->size = size;
+ insn->variant.store.src = src;
+ insn->variant.store.dst = dst;
+
+ vassert(size == 1 || size == 2 || size == 4 || size == 8);
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_move(UChar size, HReg dst, HReg src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_MOVE;
+ insn->size = size;
+ insn->variant.move.src = src;
+ insn->variant.move.dst = dst;
+
+ vassert(size == 1 || size == 2 || size == 4 || size == 8);
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_cond_move(UChar size, s390_cc_t cond, HReg dst, s390_opnd_RMI src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_COND_MOVE;
+ insn->size = size;
+ insn->variant.cond_move.cond = cond;
+ insn->variant.cond_move.src = src;
+ insn->variant.cond_move.dst = dst;
+
+ vassert(size == 1 || size == 2 || size == 4 || size == 8);
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_load_immediate(UChar size, HReg dst, ULong value)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_LOAD_IMMEDIATE;
+ insn->size = size;
+ insn->variant.load_immediate.dst = dst;
+ insn->variant.load_immediate.value = value;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_alu(UChar size, s390_alu_t tag, HReg dst, s390_opnd_RMI op2)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_ALU;
+ insn->size = size;
+ insn->variant.alu.tag = tag;
+ insn->variant.alu.dst = dst;
+ insn->variant.alu.op2 = op2;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_mul(UChar size, HReg dst_hi, HReg dst_lo, s390_opnd_RMI op2,
+ Bool signed_multiply)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(! hregIsVirtual(dst_hi));
+ vassert(! hregIsVirtual(dst_lo));
+
+ insn->tag = S390_INSN_MUL;
+ insn->size = size;
+ insn->variant.mul.dst_hi = dst_hi;
+ insn->variant.mul.dst_lo = dst_lo;
+ insn->variant.mul.op2 = op2;
+ insn->variant.mul.signed_multiply = signed_multiply;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_div(UChar size, HReg op1_hi, HReg op1_lo, s390_opnd_RMI op2,
+ Bool signed_divide)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 4 || size == 8);
+ vassert(! hregIsVirtual(op1_hi));
+ vassert(! hregIsVirtual(op1_lo));
+
+ insn->tag = S390_INSN_DIV;
+ insn->size = size;
+ insn->variant.div.op1_hi = op1_hi;
+ insn->variant.div.op1_lo = op1_lo;
+ insn->variant.div.op2 = op2;
+ insn->variant.div.signed_divide = signed_divide;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_divs(UChar size, HReg rem, HReg op1, s390_opnd_RMI op2)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 8);
+ vassert(! hregIsVirtual(op1));
+ vassert(! hregIsVirtual(rem));
+
+ insn->tag = S390_INSN_DIVS;
+ insn->size = size;
+ insn->variant.divs.rem = rem; /* remainder */
+ insn->variant.divs.op1 = op1; /* also quotient */
+ insn->variant.divs.op2 = op2;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_clz(UChar size, HReg num_bits, HReg clobber, s390_opnd_RMI src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 8);
+ vassert(! hregIsVirtual(num_bits));
+ vassert(! hregIsVirtual(clobber));
+
+ insn->tag = S390_INSN_CLZ;
+ insn->size = size;
+ insn->variant.clz.num_bits = num_bits;
+ insn->variant.clz.clobber = clobber;
+ insn->variant.clz.src = src;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_unop(UChar size, s390_unop_t tag, HReg dst, s390_opnd_RMI opnd)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_UNOP;
+ insn->size = size;
+ insn->variant.unop.tag = tag;
+ insn->variant.unop.dst = dst;
+ insn->variant.unop.src = opnd;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_test(UChar size, s390_opnd_RMI src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 4 || size == 8);
+
+ insn->tag = S390_INSN_TEST;
+ insn->size = size;
+ insn->variant.test.src = src;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_cc2bool(HReg dst, s390_cc_t cond)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_CC2BOOL;
+ insn->size = 0; /* does not matter */
+ insn->variant.cc2bool.cond = cond;
+ insn->variant.cc2bool.dst = dst;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_cas(UChar size, HReg op1, s390_amode *op2, HReg op3, HReg old_mem)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 4 || size == 8);
+ vassert(op2->x == 0);
+
+ insn->tag = S390_INSN_CAS;
+ insn->size = size;
+ insn->variant.cas.op1 = op1;
+ insn->variant.cas.op2 = op2;
+ insn->variant.cas.op3 = op3;
+ insn->variant.cas.old_mem = old_mem;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_compare(UChar size, HReg src1, s390_opnd_RMI src2,
+ Bool signed_comparison)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 4 || size == 8);
+
+ insn->tag = S390_INSN_COMPARE;
+ insn->size = size;
+ insn->variant.compare.src1 = src1;
+ insn->variant.compare.src2 = src2;
+ insn->variant.compare.signed_comparison = signed_comparison;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_branch(IRJumpKind kind, s390_cc_t cond, s390_opnd_RMI dst)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BRANCH;
+ insn->size = 0; /* does not matter */
+ insn->variant.branch.kind = kind;
+ insn->variant.branch.dst = dst;
+ insn->variant.branch.cond = cond;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_helper_call(s390_cc_t cond, Addr64 target, UInt num_args,
+ HChar *name)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_HELPER_CALL;
+ insn->size = 0; /* does not matter */
+ insn->variant.helper_call.cond = cond;
+ insn->variant.helper_call.target = target;
+ insn->variant.helper_call.num_args = num_args;
+ insn->variant.helper_call.name = name;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp_triop(UChar size, s390_bfp_triop_t tag, HReg dst, HReg op2,
+ HReg op3, s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP_TRIOP;
+ insn->size = size;
+ insn->variant.bfp_triop.tag = tag;
+ insn->variant.bfp_triop.dst = dst;
+ insn->variant.bfp_triop.op2 = op2;
+ insn->variant.bfp_triop.op3 = op3;
+ insn->variant.bfp_triop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp_binop(UChar size, s390_bfp_binop_t tag, HReg dst, HReg op2,
+ s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP_BINOP;
+ insn->size = size;
+ insn->variant.bfp_binop.tag = tag;
+ insn->variant.bfp_binop.dst = dst;
+ insn->variant.bfp_binop.op2 = op2;
+ insn->variant.bfp_binop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp_unop(UChar size, s390_bfp_unop_t tag, HReg dst, HReg op,
+ s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP_UNOP;
+ insn->size = size;
+ insn->variant.bfp_unop.tag = tag;
+ insn->variant.bfp_unop.dst = dst;
+ insn->variant.bfp_unop.op = op;
+ insn->variant.bfp_unop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp_compare(UChar size, HReg dst, HReg op1, HReg op2)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 4 || size == 8);
+
+ insn->tag = S390_INSN_BFP_COMPARE;
+ insn->size = size;
+ insn->variant.bfp_compare.dst = dst;
+ insn->variant.bfp_compare.op1 = op1;
+ insn->variant.bfp_compare.op2 = op2;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp128_binop(UChar size, s390_bfp_binop_t tag, HReg dst_hi,
+ HReg dst_lo, HReg op2_hi, HReg op2_lo,
+ s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP128_BINOP;
+ insn->size = size;
+ insn->variant.bfp128_binop.tag = tag;
+ insn->variant.bfp128_binop.dst_hi = dst_hi;
+ insn->variant.bfp128_binop.dst_lo = dst_lo;
+ insn->variant.bfp128_binop.op2_hi = op2_hi;
+ insn->variant.bfp128_binop.op2_lo = op2_lo;
+ insn->variant.bfp128_binop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp128_unop(UChar size, s390_bfp_unop_t tag, HReg dst_hi,
+ HReg dst_lo, HReg op_hi, HReg op_lo,
+ s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP128_UNOP;
+ insn->size = size;
+ insn->variant.bfp128_unop.tag = tag;
+ insn->variant.bfp128_unop.dst_hi = dst_hi;
+ insn->variant.bfp128_unop.dst_lo = dst_lo;
+ insn->variant.bfp128_unop.op_hi = op_hi;
+ insn->variant.bfp128_unop.op_lo = op_lo;
+ insn->variant.bfp128_unop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp128_compare(UChar size, HReg dst, HReg op1_hi, HReg op1_lo,
+ HReg op2_hi, HReg op2_lo)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP128_COMPARE;
+ insn->size = size;
+ insn->variant.bfp128_compare.dst = dst;
+ insn->variant.bfp128_compare.op1_hi = op1_hi;
+ insn->variant.bfp128_compare.op1_lo = op1_lo;
+ insn->variant.bfp128_compare.op2_hi = op2_hi;
+ insn->variant.bfp128_compare.op2_lo = op2_lo;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp128_convert_to(UChar size, s390_bfp_unop_t tag, HReg dst_hi,
+ HReg dst_lo, HReg op)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP128_CONVERT_TO;
+ insn->size = size;
+ insn->variant.bfp128_unop.tag = tag;
+ insn->variant.bfp128_unop.dst_hi = dst_hi;
+ insn->variant.bfp128_unop.dst_lo = dst_lo;
+ insn->variant.bfp128_unop.op_hi = op;
+ insn->variant.bfp128_unop.op_lo = INVALID_HREG; /* unused */
+ insn->variant.bfp128_unop.rounding_mode = S390_ROUND_NEAREST_EVEN; /* unused */
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp128_convert_from(UChar size, s390_bfp_unop_t tag, HReg dst,
+ HReg op_hi, HReg op_lo,
+ s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP128_CONVERT_FROM;
+ insn->size = size;
+ insn->variant.bfp128_unop.tag = tag;
+ insn->variant.bfp128_unop.dst_hi = dst;
+ insn->variant.bfp128_unop.dst_lo = INVALID_HREG; /* unused */
+ insn->variant.bfp128_unop.op_hi = op_hi;
+ insn->variant.bfp128_unop.op_lo = op_lo;
+ insn->variant.bfp128_unop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_mfence(void)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_MFENCE;
+ insn->size = 0; /* not needed */
+
+ return insn;
+}
+
+
+/*---------------------------------------------------------------*/
+/*--- Debug print ---*/
+/*---------------------------------------------------------------*/
+
+static const HChar *
+s390_cc_as_string(s390_cc_t cc)
+{
+ switch (cc) {
+ case S390_CC_NEVER: return "never";
+ case S390_CC_OVFL: return "overflow";
+ case S390_CC_H: return "greater than"; /* A > B ; high */
+ case S390_CC_NLE: return "not low or equal";
+ case S390_CC_L: return "less than"; /* A < B ; low */
+ case S390_CC_NHE: return "not high or equal";
+ case S390_CC_LH: return "low or high";
+ case S390_CC_NE: return "not equal"; /* A != B ; not zero */
+ case S390_CC_E: return "equal"; /* A == B ; zero */
+ case S390_CC_NLH: return "not low or high";
+ case S390_CC_HE: return "greater or equal"; /* A >= B ; high or equal*/
+ case S390_CC_NL: return "not low"; /* not low */
+ case S390_CC_LE: return "less or equal"; /* A <= B ; low or equal */
+ case S390_CC_NH: return "not high";
+ case S390_CC_NO: return "not overflow";
+ case S390_CC_ALWAYS: return "always";
+ default:
+ vpanic("s390_cc_as_string");
+ }
+}
+
+
+/* Helper function for writing out a V insn */
+static void
+s390_sprintf(HChar *buf, HChar *fmt, ...)
+{
+ HChar *p;
+ ULong value;
+ va_list args;
+ va_start(args, fmt);
+
+ p = buf;
+ for ( ; *fmt; ++fmt) {
+ Int c = *fmt;
+
+ if (c != '%') {
+ *p++ = c;
+ continue;
+ }
+
+ c = *++fmt; /* next char */
+ switch (c) {
+ case '%':
+ *p++ = c; /* %% */
+ continue;
+
+ case 's': /* %s */
+ p += vex_sprintf(p, "%s", va_arg(args, HChar *));
+ continue;
+
+ case 'M': /* %M = mnemonic */
+ p += vex_sprintf(p, "%-8s", va_arg(args, HChar *));
+ continue;
+
+ case 'R': /* %R = register */
+ p += vex_sprintf(p, "%s", s390_hreg_as_string(va_arg(args, HReg)));
+ continue;
+
+ case 'A': /* %A = amode */
+ p += vex_sprintf(p, "%s",
+ s390_amode_as_string(va_arg(args, s390_amode *)));
+ continue;
+
+ case 'C': /* %C = condition code */
+ p += vex_sprintf(p, "%s", s390_cc_as_string(va_arg(args, s390_cc_t)));
+ continue;
+
+ case 'L': { /* %L = argument list in helper call*/
+ UInt i, num_args;
+
+ num_args = va_arg(args, UInt);
+
+ for (i = 0; i < num_args; ++i) {
+ if (i != 0) p += vex_sprintf(p, ", ");
+ p += vex_sprintf(p, "r%d", s390_gprno_from_arg_index(i));
+ }
+ continue;
+ }
+
+ case 'O': { /* %O = RMI operand */
+ s390_opnd_RMI *op = va_arg(args, s390_opnd_RMI *);
+
+ switch (op->tag) {
+ case S390_OPND_REG:
+ p += vex_sprintf(p, "%s", s390_hreg_as_string(op->variant.reg));
+ continue;
+
+ case S390_OPND_AMODE:
+ p += vex_sprintf(p, "%s", s390_amode_as_string(op->variant.am));
+ continue;
+
+ case S390_OPND_IMMEDIATE:
+ value = op->variant.imm;
+ goto print_value;
+
+ default:
+ goto fail;
+ }
+ }
+
+ case 'I': /* %I = immediate value */
+ value = va_arg(args, ULong);
+ goto print_value;
+
+ print_value:
+ if ((Long)value < 0)
+ p += vex_sprintf(p, "%lld", (Long)value);
+ else if (value < 100)
+ p += vex_sprintf(p, "%llu", value);
+ else
+ p += vex_sprintf(p, "0x%llx", value);
+ continue;
+
+ default:
+ goto fail;
+ }
+ }
+ *p = '\0';
+ va_end(args);
+
+ return;
+
+ fail: vpanic("s390_printf");
+}
+
+
+/* Decompile the given insn into a static buffer and return it */
+const HChar *
+s390_insn_as_string(const s390_insn *insn)
+{
+ static HChar buf[300];
+ const HChar *op;
+ HChar *p;
+
+ buf[0] = '\0';
+
+ switch (insn->tag) {
+ case S390_INSN_LOAD:
+ s390_sprintf(buf, "%M %R,%A", "v-load", insn->variant.load.dst,
+ insn->variant.load.src);
+ break;
+
+ case S390_INSN_STORE:
+ s390_sprintf(buf, "%M %R,%A", "v-store", insn->variant.store.src,
+ insn->variant.store.dst);
+ break;
+
+ case S390_INSN_MOVE:
+ s390_sprintf(buf, "%M %R,%R", "v-move", insn->variant.move.dst,
+ insn->variant.move.src);
+ break;
+
+ case S390_INSN_COND_MOVE:
+ s390_sprintf(buf, "%M if (%C) %R,%O", "v-move",
+ insn->variant.cond_move.cond, insn->variant.cond_move.dst,
+ &insn->variant.cond_move.src);
+ break;
+
+ case S390_INSN_LOAD_IMMEDIATE:
+ s390_sprintf(buf, "%M %R,%I", "v-loadi", insn->variant.load_immediate.dst,
+ insn->variant.load_immediate.value);
+ break;
+
+ case S390_INSN_ALU:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: op = "v-add"; break;
+ case S390_ALU_SUB: op = "v-sub"; break;
+ case S390_ALU_MUL: op = "v-mul"; break;
+ case S390_ALU_AND: op = "v-and"; break;
+ case S390_ALU_OR: op = "v-or"; break;
+ case S390_ALU_XOR: op = "v-xor"; break;
+ case S390_ALU_LSH: op = "v-lsh"; break;
+ case S390_ALU_RSH: op = "v-rsh"; break;
+ case S390_ALU_RSHA: op = "v-rsha"; break;
+ default: goto fail;
+ }
+ s390_sprintf(buf, "%M %R,%R,%O", op, insn->variant.alu.dst,
+ insn->variant.alu.dst /* op1 same as dst */,
+ &insn->variant.alu.op2);
+ break;
+
+ case S390_INSN_MUL:
+ if (insn->variant.mul.signed_multiply) {
+ op = "v-muls";
+ } else {
+ op = "v-mulu";
+ }
+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.mul.dst_hi,
+ &insn->variant.mul.op2);
+ break;
+
+ case S390_INSN_DIV:
+ if (insn->variant.div.signed_divide) {
+ op = "v-divs";
+ } else {
+ op = "v-divu";
+ }
+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.div.op1_hi,
+ &insn->variant.div.op2);
+ break;
+
+ case S390_INSN_DIVS:
+ s390_sprintf(buf, "%M %R,%O", "v-divsi", insn->variant.divs.op1,
+ &insn->variant.divs.op2);
+ break;
+
+ case S390_INSN_CLZ:
+ s390_sprintf(buf, "%M %R,%O", "v-clz", insn->variant.clz.num_bits,
+ &insn->variant.clz.src);
+ break;
+
+ case S390_INSN_UNOP:
+ switch (insn->variant.unop.tag) {
+ case S390_ZERO_EXTEND_8:
+ case S390_ZERO_EXTEND_16:
+ case S390_ZERO_EXTEND_32:
+ op = "v-zerox";
+ break;
+
+ case S390_SIGN_EXTEND_8:
+ case S390_SIGN_EXTEND_16:
+ case S390_SIGN_EXTEND_32:
+ op = "v-signx";
+ break;
+
+ case S390_NEGATE:
+ op = "v-neg";
+ break;
+
+ default:
+ goto fail;
+ }
+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.unop.dst,
+ &insn->variant.unop.src);
+ break;
+
+ case S390_INSN_TEST:
+ s390_sprintf(buf, "%M %O", "v-test", &insn->variant.test.src);
+ break;
+
+ case S390_INSN_CC2BOOL:
+ s390_sprintf(buf, "%M %R,%C", "v-cc2b", insn->variant.cc2bool.dst,
+ insn->variant.cc2bool.cond);
+ break;
+
+ case S390_INSN_CAS:
+ s390_sprintf(buf, "%M %R,%A,%R,%R", "v-cas", insn->variant.cas.op1,
+ insn->variant.cas.op2, insn->variant.cas.op3,
+ insn->variant.cas.old_mem);
+ break;
+
+ case S390_INSN_COMPARE:
+ if (insn->variant.compare.signed_comparison) {
+ op = "v-cmps";
+ } else {
+ op = "v-cmpu";
+ }
+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.compare.src1,
+ &insn->variant.compare.src2);
+ break;
+
+ case S390_INSN_BRANCH:
+ switch (insn->variant.branch.kind) {
+ case Ijk_ClientReq: op = "clientreq"; break;
+ case Ijk_Sys_syscall: op = "syscall"; break;
+ case Ijk_Yield: op = "yield"; break;
+ case Ijk_EmWarn: op = "emwarn"; break;
+ case Ijk_EmFail: op = "emfail"; break;
+ case Ijk_MapFail: op = "mapfail"; break;
+ case Ijk_NoDecode: op = "nodecode"; break;
+ case Ijk_TInval: op = "tinval"; break;
+ case Ijk_NoRedir: op = "noredir"; break;
+ case Ijk_SigTRAP: op = "sigtrap"; break;
+ case Ijk_Boring: op = "goto"; break;
+ case Ijk_Call: op = "call"; break;
+ case Ijk_Ret: op = "return"; break;
+ default:
+ goto fail;
+ }
+ s390_sprintf(buf, "if (%C) %s %O", insn->variant.branch.cond, op,
+ &insn->variant.branch.dst);
+ break;
+
+ case S390_INSN_HELPER_CALL: {
+
+ if (insn->variant.helper_call.cond != S390_CC_ALWAYS) {
+ s390_sprintf(buf, "%M if (%C) %s{%I}(%L)", "v-call",
+ insn->variant.helper_call.cond,
+ insn->variant.helper_call.name,
+ insn->variant.helper_call.target,
+ insn->variant.helper_call.num_args);
+ } else {
+ s390_sprintf(buf, "%M %s{%I}(%L)", "v-call",
+ insn->variant.helper_call.name,
+ insn->variant.helper_call.target,
+ insn->variant.helper_call.num_args);
+ }
+ break;
+ }
+
+ case S390_INSN_BFP_TRIOP:
+ switch (insn->variant.bfp_triop.tag) {
+ case S390_BFP_MADD: op = "v-fmadd"; break;
+ case S390_BFP_MSUB: op = "v-fmsub"; break;
+ default: goto fail;
+ }
+ s390_sprintf(buf, "%M %R,%R,%R,%R", op, insn->variant.bfp_triop.dst,
+ insn->variant.bfp_triop.dst /* op1 same as dst */,
+ insn->variant.bfp_triop.op2, insn->variant.bfp_triop.op3);
+ break;
+
+ case S390_INSN_BFP_BINOP:
+ switch (insn->variant.bfp_binop.tag) {
+ case S390_BFP_ADD: op = "v-fadd"; break;
+ case S390_BFP_SUB: op = "v-fsub"; break;
+ case S390_BFP_MUL: op = "v-fmul"; break;
+ case S390_BFP_DIV: op = "v-fdiv"; break;
+ default: goto fail;
+ }
+ s390_sprintf(buf, "%M %R,%R,%R", op, insn->variant.bfp_binop.dst,
+ insn->variant.bfp_binop.dst /* op1 same as dst */,
+ insn->variant.bfp_binop.op2);
+ break;
+
+ case S390_INSN_BFP_COMPARE:
+ s390_sprintf(buf, "%M %R,%R,%R", "v-fcmp", insn->variant.bfp_compare.dst,
+ insn->variant.bfp_compare.op1, insn->variant.bfp_compare.op2);
+ break;
+
+ case S390_INSN_BFP_UNOP:
+ switch (insn->variant.bfp_unop.tag) {
+ case S390_BFP_ABS: op = "v-fabs"; break;
+ case S390_BFP_NABS: op = "v-fnabs"; break;
+ case S390_BFP_NEG: op = "v-fneg"; break;
+ case S390_BFP_SQRT: op = "v-fsqrt"; break;
+ case S390_BFP_I32_TO_F32:
+ case S390_BFP_I32_TO_F64:
+ case S390_BFP_I32_TO_F128:
+ case S390_BFP_I64_TO_F32:
+ case S390_BFP_I64_TO_F64:
+ case S390_BFP_I64_TO_F128: op = "v-i2f"; break;
+ case S390_BFP_F32_TO_I32:
+ case S390_BFP_F32_TO_I64:
+ case S390_BFP_F64_TO_I32:
+ case S390_BFP_F64_TO_I64:
+ case S390_BFP_F128_TO_I32:
+ case S390_BFP_F128_TO_I64: op = "v-f2i"; break;
+ case S390_BFP_F32_TO_F64:
+ case S390_BFP_F32_TO_F128:
+ case S390_BFP_F64_TO_F32:
+ case S390_BFP_F64_TO_F128:
+ case S390_BFP_F128_TO_F32:
+ case S390_BFP_F128_TO_F64: op = "v-f2f"; break;
+ default: goto fail;
+ }
+ s390_sprintf(buf, "%M %R,%R", op, insn->variant.bfp_unop.dst,
+ insn->variant.bfp_unop.op);
+ break;
+
+ case S390_INSN_BFP128_BINOP:
+ switch (insn->variant.bfp128_binop.tag) {
+ case S390_BFP_ADD: op = "v-fadd"; break;
+ case S390_BFP_SUB: op = "v-fsub"; break;
+ case S390_BFP_MUL: op = "v-fmul"; break;
+ case S390_BFP_DIV: op = "v-fdiv"; break;
+ default: goto fail;
+ }
+ /* Only write the register that identifies the register pair */
+ s390_sprintf(buf, "%M %R,%R,%R", op, insn->variant.bfp128_binop.dst_hi,
+ insn->variant.bfp128_binop.dst_hi /* op1 same as dst */,
+ insn->variant.bfp128_binop.op2_hi);
+ break;
+
+ case S390_INSN_BFP128_COMPARE:
+ /* Only write the register that identifies the register pair */
+ s390_sprintf(buf, "%M %R,%R,%R", "v-fcmp", insn->variant.bfp128_compare.dst,
+ insn->variant.bfp128_compare.op1_hi,
+ insn->variant.bfp128_compare.op2_hi);
+ break;
+
+ case S390_INSN_BFP128_UNOP:
+ case S390_INSN_BFP128_CONVERT_TO:
+ case S390_INSN_BFP128_CONVERT_FROM:
+ switch (insn->variant.bfp128_unop.tag) {
+ case S390_BFP_ABS: op = "v-fabs"; break;
+ case S390_BFP_NABS: op = "v-fnabs"; break;
+ case S390_BFP_NEG: op = "v-fneg"; break;
+ case S390_BFP_SQRT: op = "v-fsqrt"; break;
+ case S390_BFP_I32_TO_F128:
+ case S390_BFP_I64_TO_F128: op = "v-i2f"; break;
+ case S390_BFP_F128_TO_I32:
+ case S390_BFP_F128_TO_I64: op = "v-f2i"; break;
+ case S390_BFP_F32_TO_F128:
+ case S390_BFP_F64_TO_F128:
+ case S390_BFP_F128_TO_F32:
+ case S390_BFP_F128_TO_F64: op = "v-f2f"; break;
+ default: goto fail;
+ }
+ /* Only write the register that identifies the register pair */
+ s390_sprintf(buf, "%M %R,%R", op, insn->variant.bfp128_unop.dst_hi,
+ insn->variant.bfp128_unop.op_hi);
+ break;
+
+ case S390_INSN_MFENCE:
+ s390_sprintf(buf, "%M", "v-mfence");
+ return buf; /* avoid printing "size = ..." which is meaningless */
+
+ default: goto fail;
+ }
+
+ /* Write out how many bytes are involved in the operation */
+
+ {
+ UInt len, i;
+
+ for (p = buf; *p; ++p)
+ continue;
+
+ len = p - buf;
+
+ if (len < 32) {
+ for (i = len; i < 32; ++i)
+ p += vex_sprintf(p, " ");
+ } else {
+ p += vex_sprintf(p, "\t");
+ }
+ }
+
+ /* Special cases first */
+ switch (insn->tag) {
+ case S390_INSN_UNOP:
+ switch (insn->variant.unop.tag) {
+ case S390_SIGN_EXTEND_8:
+ case S390_ZERO_EXTEND_8: p += vex_sprintf(p, "1 -> "); goto common;
+ case S390_SIGN_EXTEND_16:
+ case S390_ZERO_EXTEND_16: p += vex_sprintf(p, "2 -> "); goto common;
+ case S390_SIGN_EXTEND_32:
+ case S390_ZERO_EXTEND_32: p += vex_sprintf(p, "4 -> "); goto common;
+ default:
+ goto common;
+ }
+
+ case S390_INSN_BFP_UNOP:
+ switch (insn->variant.bfp_unop.tag) {
+ case S390_BFP_I32_TO_F32:
+ case S390_BFP_I32_TO_F64:
+ case S390_BFP_I32_TO_F128:
+ case S390_BFP_F32_TO_I32:
+ case S390_BFP_F32_TO_I64:
+ case S390_BFP_F32_TO_F64:
+ case S390_BFP_F32_TO_F128: p += vex_sprintf(p, "4 -> "); goto common;
+ case S390_BFP_I64_TO_F32:
+ case S390_BFP_I64_TO_F64:
+ case S390_BFP_I64_TO_F128:
+ case S390_BFP_F64_TO_I32:
+ case S390_BFP_F64_TO_I64:
+ case S390_BFP_F64_TO_F32:
+ case S390_BFP_F64_TO_F128: p += vex_sprintf(p, "8 -> "); goto common;
+ case S390_BFP_F128_TO_I32:
+ case S390_BFP_F128_TO_I64:
+ case S390_BFP_F128_TO_F32:
+ case S390_BFP_F128_TO_F64: p += vex_sprintf(p, "16 -> "); goto common;
+ default:
+ goto common;
+ }
+
+ case S390_INSN_BFP128_UNOP:
+ case S390_INSN_BFP128_CONVERT_TO:
+ case S390_INSN_BFP128_CONVERT_FROM:
+ switch (insn->variant.bfp128_unop.tag) {
+ case S390_BFP_I32_TO_F128:
+ case S390_BFP_F32_TO_F128: p += vex_sprintf(p, "4 -> "); goto common;
+ case S390_BFP_I64_TO_F128:
+ case S390_BFP_F64_TO_F128: p += vex_sprintf(p, "8 -> "); goto common;
+ case S390_BFP_F128_TO_I32:
+ case S390_BFP_F128_TO_I64:
+ case S390_BFP_F128_TO_F32:
+ case S390_BFP_F128_TO_F64: p += vex_sprintf(p, "16 -> "); goto common;
+ default:
+ goto common;
+ }
+
+ default:
+ goto common;
+ }
+
+ /* Common case */
+ common:
+ vex_sprintf(p, "%u bytes", (UInt)insn->size);
+
+ return buf;
+
+ fail: vpanic("s390_insn_as_string");
+}
+
+
+
+/* Load NUM bytes from memory into register REG using addressing mode AM. */
+static UChar *
+s390_emit_load_mem(UChar *p, UInt num, UChar reg, const s390_amode *am)
+{
+ UInt b = hregNumber(am->b);
+ UInt x = hregNumber(am->x); /* 0 for B12 and B20 */
+ UInt d = am->d;
+
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ switch (num) {
+ case 1: return s390_emit_IC(p, reg, x, b, d);
+ case 2: return s390_emit_LH(p, reg, x, b, d);
+ case 4: return s390_emit_L(p, reg, x, b, d);
+ case 8: return s390_emit_LG(p, reg, x, b, DISP20(d));
+ default: goto fail;
+ }
+ break;
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ switch (num) {
+ case 1: return s390_emit_ICY(p, reg, x, b, DISP20(d));
+ case 2: return s390_emit_LHY(p, reg, x, b, DISP20(d));
+ case 4: return s390_emit_LY(p, reg, x, b, DISP20(d));
+ case 8: return s390_emit_LG(p, reg, x, b, DISP20(d));
+ default: goto fail;
+ }
+ break;
+
+ default: goto fail;
+ }
+
+ fail:
+ vpanic("s390_emit_load_mem");
+}
+
+
+/* Load condition code into register REG */
+static UChar *
+s390_emit_load_cc(UChar *p, UChar reg)
+{
+ p = s390_emit_LGHI(p, reg, 0); /* Clear out, cc not affected */
+ p = s390_emit_IPM(p, reg, reg);
+ /* Shift 28 bits to the right --> [0,1,2,3] */
+ return s390_emit_SRL(p, reg, 0, 28); /* REG = cc */
+}
+
+
+/*---------------------------------------------------------------*/
+/*--- Code generation ---*/
+/*---------------------------------------------------------------*/
+
+/* Do not load more bytes than requested. */
+static UChar *
+s390_insn_load_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r, x, b, d;
+ const s390_amode *src;
+
+ src = insn->variant.load.src;
+
+ r = hregNumber(insn->variant.load.dst);
+
+ if (hregClass(insn->variant.load.dst) == HRcFlt64) {
+ b = hregNumber(src->b);
+ x = hregNumber(src->x); /* 0 for B12 and B20 */
+ d = src->d;
+
+ switch (insn->size) {
+
+ case 4:
+ switch (src->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_LE(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_LEY(buf, r, x, b, DISP20(d));
+ }
+ break;
+
+ case 8:
+ switch (src->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_LD(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_LDY(buf, r, x, b, DISP20(d));
+ }
+ break;
+ }
+ vpanic("s390_insn_load_emit");
+ }
+
+ /* Integer stuff */
+ return s390_emit_load_mem(buf, insn->size, r, src);
+}
+
+
+static UChar *
+s390_insn_store_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r, x, b, d;
+ const s390_amode *dst;
+
+ dst = insn->variant.store.dst;
+
+ r = hregNumber(insn->variant.store.src);
+ b = hregNumber(dst->b);
+ x = hregNumber(dst->x); /* 0 for B12 and B20 */
+ d = dst->d;
+
+ if (hregClass(insn->variant.store.src) == HRcFlt64) {
+ switch (insn->size) {
+
+ case 4:
+ switch (dst->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_STE(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_STEY(buf, r, x, b, DISP20(d));
+ }
+ break;
+
+ case 8:
+ switch (dst->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_STD(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_STDY(buf, r, x, b, DISP20(d));
+ }
+ break;
+ }
+ vpanic("s390_insn_store_emit");
+ }
+
+ /* Integer stuff */
+ switch (insn->size) {
+ case 1:
+ switch (dst->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_STC(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_STCY(buf, r, x, b, DISP20(d));
+ }
+ break;
+
+ case 2:
+ switch (dst->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_STH(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_STHY(buf, r, x, b, DISP20(d));
+ }
+ break;
+
+ case 4:
+ switch (dst->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_ST(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_STY(buf, r, x, b, DISP20(d));
+ }
+ break;
+
+ case 8:
+ return s390_emit_STG(buf, r, x, b, DISP20(d));
+
+ default:
+ break;
+ }
+
+ vpanic("s390_insn_store_emit");
+}
+
+
+static UChar *
+s390_insn_move_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt dst, src;
+ HRegClass dst_class, src_class;
+
+ dst = hregNumber(insn->variant.move.dst);
+ src = hregNumber(insn->variant.move.src);
+
+ dst_class = hregClass(insn->variant.move.dst);
+ src_class = hregClass(insn->variant.move.src);
+
+ if (dst_class == src_class) {
+ if (dst_class == HRcInt64)
+ return s390_emit_LGR(buf, dst, src);
+ if (dst_class == HRcFlt64)
+ return s390_emit_LDR(buf, dst, src);
+ } else {
+ if (dst_class == HRcFlt64 && src_class == HRcInt64)
+ return s390_emit_LDGRw(buf, dst, src);
+ if (dst_class == HRcInt64 && src_class == HRcFlt64)
+ return s390_emit_LGDRw(buf, dst, src);
+ /* A move between floating point registers and general purpose
+ registers of different size should never occur and indicates
+ an error elsewhere. */
+ }
+
+ vpanic("s390_insn_move_emit");
+}
+
+
+static UChar *
+s390_insn_load_immediate_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r;
+ ULong value = insn->variant.load_immediate.value;
+
+ r = hregNumber(insn->variant.load_immediate.dst);
+
+ if (hregClass(insn->variant.load_immediate.dst) == HRcFlt64) {
+ vassert(value == 0);
+ switch (insn->size) {
+ case 4: return s390_emit_LZER(buf, r, value);
+ case 8: return s390_emit_LZDR(buf, r, value);
+ }
+ vpanic("s390_insn_load_immediate_emit");
+ }
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ /* Load the immediate values as a 4 byte value. That does not hurt as
+ those extra bytes will not be looked at. Fall through .... */
+ case 4:
+ return s390_emit_load_32imm(buf, r, value);
+
+ case 8:
+ return s390_emit_load_64imm(buf, r, value);
+ }
+
+ vpanic("s390_insn_load_immediate_emit");
+}
+
+
+/* There is no easy way to do ALU operations on 1-byte or 2-byte operands.
+ So we simply perform a 4-byte operation. Doing so uses possibly undefined
+ bits and produces an undefined result in those extra bit positions. But
+ upstream does not look at those positions, so this is OK. */
+static UChar *
+s390_insn_alu_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI op2;
+ UInt dst;
+
+ dst = hregNumber(insn->variant.alu.dst);
+ op2 = insn->variant.alu.op2;
+
+ /* Second operand is in a register */
+ if (op2.tag == S390_OPND_REG) {
+ UInt r2 = hregNumber(op2.variant.reg);
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ case 4:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_AR(buf, dst, r2);
+ case S390_ALU_SUB: return s390_emit_SR(buf, dst, r2);
+ case S390_ALU_MUL: return s390_emit_MSR(buf, dst, r2);
+ case S390_ALU_AND: return s390_emit_NR(buf, dst, r2);
+ case S390_ALU_OR: return s390_emit_OR(buf, dst, r2);
+ case S390_ALU_XOR: return s390_emit_XR(buf, dst, r2);
+ case S390_ALU_LSH: return s390_emit_SLL(buf, dst, r2, 0);
+ case S390_ALU_RSH: return s390_emit_SRL(buf, dst, r2, 0);
+ case S390_ALU_RSHA: return s390_emit_SRA(buf, dst, r2, 0);
+ }
+ goto fail;
+
+ case 8:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_AGR(buf, dst, r2);
+ case S390_ALU_SUB: return s390_emit_SGR(buf, dst, r2);
+ case S390_ALU_MUL: return s390_emit_MSGR(buf, dst, r2);
+ case S390_ALU_AND: return s390_emit_NGR(buf, dst, r2);
+ case S390_ALU_OR: return s390_emit_OGR(buf, dst, r2);
+ case S390_ALU_XOR: return s390_emit_XGR(buf, dst, r2);
+ case S390_ALU_LSH: return s390_emit_SLLG(buf, dst, dst, r2, DISP20(0));
+ case S390_ALU_RSH: return s390_emit_SRLG(buf, dst, dst, r2, DISP20(0));
+ case S390_ALU_RSHA: return s390_emit_SRAG(buf, dst, dst, r2, DISP20(0));
+ }
+ goto fail;
+ }
+ goto fail;
+ }
+
+ /* 2nd operand is in memory */
+ if (op2.tag == S390_OPND_AMODE) {
+ UInt b, x, d;
+ const s390_amode *src = op2.variant.am;
+
+ b = hregNumber(src->b);
+ x = hregNumber(src->x); /* 0 for B12 and B20 */
+ d = src->d;
+
+ /* Shift operands are special here as there are no opcodes that
+ allow a memory operand. So we first load the 2nd operand into
+ some register. R0 is used to save restore the contents of the
+ chosen register.. */
+
+ if (insn->variant.alu.tag == S390_ALU_LSH ||
+ insn->variant.alu.tag == S390_ALU_RSH ||
+ insn->variant.alu.tag == S390_ALU_RSHA) {
+ UInt b2;
+
+ /* Choose a register (other than DST or R0) into which to stick the
+ shift amount. The following works because r15 is reserved and
+ thusly dst != 15. */
+ vassert(dst != 15); /* extra paranoia */
+ b2 = (dst + 1) % 16;
+
+ buf = s390_emit_LGR(buf, R0, b2); /* save */
+
+ /* Loading SRC to B2 does not modify R0. */
+ buf = s390_emit_load_mem(buf, insn->size, b2, src);
+
+ if (insn->size == 8) {
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_LSH:
+ buf = s390_emit_SLLG(buf, dst, dst, b2, DISP20(0));
+ break;
+ case S390_ALU_RSH:
+ buf = s390_emit_SRLG(buf, dst, dst, b2, DISP20(0));
+ break;
+ case S390_ALU_RSHA:
+ buf = s390_emit_SRAG(buf, dst, dst, b2, DISP20(0));
+ break;
+ default: /* unreachable */
+ goto fail;
+ }
+ } else {
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_LSH:
+ buf = s390_emit_SLL(buf, dst, b2, 0);
+ break;
+ case S390_ALU_RSH:
+ buf = s390_emit_SRL(buf, dst, b2, 0);
+ break;
+ case S390_ALU_RSHA:
+ buf = s390_emit_SRA(buf, dst, b2, 0);
+ break;
+ default: /* unreachable */
+ goto fail;
+ }
+ }
+ return s390_emit_LGR(buf, b2, R0); /* restore */
+ }
+
+ switch (insn->size) {
+ case 1:
+ /* Move the byte from memory into scratch register r0 */
+ buf = s390_emit_load_mem(buf, 1, R0, src);
+
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_AR(buf, dst, R0);
+ case S390_ALU_SUB: return s390_emit_SR(buf, dst, R0);
+ case S390_ALU_MUL: return s390_emit_MSR(buf, dst, R0);
+ case S390_ALU_AND: return s390_emit_NR(buf, dst, R0);
+ case S390_ALU_OR: return s390_emit_OR(buf, dst, R0);
+ case S390_ALU_XOR: return s390_emit_XR(buf, dst, R0);
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+
+ case 2:
+ switch (src->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD:
+ return s390_emit_AH(buf, dst, x, b, d);
+
+ case S390_ALU_SUB:
+ return s390_emit_SH(buf, dst, x, b, d);
+
+ case S390_ALU_MUL:
+ return s390_emit_MH(buf, dst, x, b, d);
+
+ /* For bitwise operations: Move two bytes from memory into scratch
+ register r0; then perform operation */
+ case S390_ALU_AND:
+ buf = s390_emit_LH(buf, R0, x, b, d);
+ return s390_emit_NR(buf, dst, R0);
+
+ case S390_ALU_OR:
+ buf = s390_emit_LH(buf, R0, x, b, d);
+ return s390_emit_OR(buf, dst, R0);
+
+ case S390_ALU_XOR:
+ buf = s390_emit_LH(buf, R0, x, b, d);
+ return s390_emit_XR(buf, dst, R0);
+
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD:
+ return s390_emit_AHY(buf, dst, x, b, DISP20(d));
+
+ case S390_ALU_SUB:
+ return s390_emit_SHY(buf, dst, x, b, DISP20(d));
+
+ case S390_ALU_MUL:
+ return s390_emit_MHYw(buf, dst, x, b, DISP20(d));
+
+ /* For bitwise operations: Move two bytes from memory into scratch
+ register r0; then perform operation */
+ case S390_ALU_AND:
+ buf = s390_emit_LHY(buf, R0, x, b, DISP20(d));
+ return s390_emit_NR(buf, dst, R0);
+
+ case S390_ALU_OR:
+ buf = s390_emit_LHY(buf, R0, x, b, DISP20(d));
+ return s390_emit_OR(buf, dst, R0);
+
+ case S390_ALU_XOR:
+ buf = s390_emit_LHY(buf, R0, x, b, DISP20(d));
+ return s390_emit_XR(buf, dst, R0);
+
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+ }
+ goto fail;
+
+ case 4:
+ switch (src->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_A(buf, dst, x, b, d);
+ case S390_ALU_SUB: return s390_emit_S(buf, dst, x, b, d);
+ case S390_ALU_MUL: return s390_emit_MS(buf, dst, x, b, d);
+ case S390_ALU_AND: return s390_emit_N(buf, dst, x, b, d);
+ case S390_ALU_OR: return s390_emit_O(buf, dst, x, b, d);
+ case S390_ALU_XOR: return s390_emit_X(buf, dst, x, b, d);
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_AY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_SUB: return s390_emit_SY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_MUL: return s390_emit_MSY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_AND: return s390_emit_NY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_OR: return s390_emit_OY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_XOR: return s390_emit_XY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+ }
+ goto fail;
+
+ case 8:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_AG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_SUB: return s390_emit_SG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_MUL: return s390_emit_MSG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_AND: return s390_emit_NG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_OR: return s390_emit_OG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_XOR: return s390_emit_XG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+ }
+ goto fail;
+ }
+
+ /* 2nd operand is an immediate value */
+ if (op2.tag == S390_OPND_IMMEDIATE) {
+ ULong value;
+
+ /* No masking of the value is required as it is not sign extended */
+ value = op2.variant.imm;
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ /* There is no 1-byte opcode. Do the computation in
+ 2 bytes. The extra byte will be ignored. */
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD:
+ return s390_emit_AHI(buf, dst, value);
+
+ case S390_ALU_SUB:
+ return s390_emit_SLFIw(buf, dst, value);
+
+ case S390_ALU_MUL:
+ return s390_emit_MHI(buf, dst, value);
+
+ case S390_ALU_AND: return s390_emit_NILL(buf, dst, value);
+ case S390_ALU_OR: return s390_emit_OILL(buf, dst, value);
+ case S390_ALU_XOR:
+ /* There is no XILL instruction. Load the immediate value into
+ R0 and combine with the destination register. */
+ buf = s390_emit_LHI(buf, R0, value);
+ return s390_emit_XR(buf, dst, R0);
+
+ case S390_ALU_LSH:
+ return s390_emit_SLL(buf, dst, 0, value);
+
+ case S390_ALU_RSH:
+ return s390_emit_SRL(buf, dst, 0, value);
+
+ case S390_ALU_RSHA:
+ return s390_emit_SRA(buf, dst, 0, value);
+ }
+ goto fail;
+
+ case 4:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD:
+ if (uint_fits_signed_16bit(value)) {
+ return s390_emit_AHI(buf, dst, value);
+ }
+ return s390_emit_AFIw(buf, dst, value);
+
+ case S390_ALU_SUB: return s390_emit_SLFIw(buf, dst, value);
+ case S390_ALU_MUL: return s390_emit_MSFIw(buf, dst, value);
+ case S390_ALU_AND: return s390_emit_NILFw(buf, dst, value);
+ case S390_ALU_OR: return s390_emit_OILFw(buf, dst, value);
+ case S390_ALU_XOR: return s390_emit_XILFw(buf, dst, value);
+ case S390_ALU_LSH: return s390_emit_SLL(buf, dst, 0, value);
+ case S390_ALU_RSH: return s390_emit_SRL(buf, dst, 0, value);
+ case S390_ALU_RSHA: return s390_emit_SRA(buf, dst, 0, value);
+ }
+ goto fail;
+
+ case 8:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD:
+ if (ulong_fits_signed_16bit(value)) {
+ return s390_emit_AGHI(buf, dst, value);
+ }
+ if (ulong_fits_signed_32bit(value) && s390_host_has_eimm) {
+ return s390_emit_AGFI(buf, dst, value);
+ }
+ /* Load constant into R0 then add */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_AGR(buf, dst, R0);
+
+ case S390_ALU_SUB:
+ if (ulong_fits_unsigned_32bit(value)) {
+ return s390_emit_SLGFIw(buf, dst, value);
+ }
+ /* Load value into R0; then subtract from destination reg */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_SGR(buf, dst, R0);
+
+ case S390_ALU_MUL:
+ if (ulong_fits_signed_32bit(value) && s390_host_has_gie) {
+ return s390_emit_MSGFI(buf, dst, value);
+ }
+ /* Load constant into R0 then add */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_MSGR(buf, dst, R0);
+
+ /* Do it in two steps: upper half [0:31] and lower half [32:63] */
+ case S390_ALU_AND:
+ if (s390_host_has_eimm) {
+ buf = s390_emit_NIHF(buf, dst, value >> 32);
+ return s390_emit_NILF(buf, dst, value & 0xFFFFFFFF);
+ }
+ /* Load value into R0; then combine with destination reg */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_NGR(buf, dst, R0);
+
+ case S390_ALU_OR:
+ if (s390_host_has_eimm) {
+ buf = s390_emit_OIHF(buf, dst, value >> 32);
+ return s390_emit_OILF(buf, dst, value & 0xFFFFFFFF);
+ }
+ /* Load value into R0; then combine with destination reg */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_OGR(buf, dst, R0);
+
+ case S390_ALU_XOR:
+ if (s390_host_has_eimm) {
+ buf = s390_emit_XIHF(buf, dst, value >> 32);
+ return s390_emit_XILF(buf, dst, value & 0xFFFFFFFF);
+ }
+ /* Load value into R0; then combine with destination reg */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_XGR(buf, dst, R0);
+
+ /* No special considerations for long displacement here. Only the six
+ least significant bits of VALUE will be taken; all other bits are
+ ignored. So the DH2 bits are irrelevant and do not influence the
+ shift operation, independent of whether long-displacement is available
+ or not. */
+ case S390_ALU_LSH: return s390_emit_SLLG(buf, dst, dst, 0, DISP20(value));
+ case S390_ALU_RSH: return s390_emit_SRLG(buf, dst, dst, 0, DISP20(value));
+ case S390_ALU_RSHA: return s390_emit_SRAG(buf, dst, dst, 0, DISP20(value));
+ }
+ goto fail;
+ }
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_alu_emit");
+}
+
+
+static UChar *
+s390_widen_emit(UChar *buf, const s390_insn *insn, UInt from_size,
+ Bool sign_extend)
+{
+ s390_opnd_RMI opnd = insn->variant.unop.src;
+
+ switch (opnd.tag) {
+ case S390_OPND_REG: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+ UChar r2 = hregNumber(opnd.variant.reg);
+
+ switch (from_size) {
+ case 1:
+ /* Widening to a half-word is implemented like widening to a word
+ because the upper half-word will not be looked at. */
+ if (insn->size == 4 || insn->size == 2) { /* 8 --> 32 8 --> 16 */
+ if (sign_extend)
+ return s390_emit_LBRw(buf, r1, r2);
+ else
+ return s390_emit_LLCRw(buf, r1, r2);
+ }
+ if (insn->size == 8) { /* 8 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGBRw(buf, r1, r2);
+ else
+ return s390_emit_LLGCRw(buf, r1, r2);
+ }
+ goto fail;
+
+ case 2:
+ if (insn->size == 4) { /* 16 --> 32 */
+ if (sign_extend)
+ return s390_emit_LHRw(buf, r1, r2);
+ else
+ return s390_emit_LLHRw(buf, r1, r2);
+ }
+ if (insn->size == 8) { /* 16 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGHRw(buf, r1, r2);
+ else
+ return s390_emit_LLGHRw(buf, r1, r2);
+ }
+ goto fail;
+
+ case 4:
+ if (insn->size == 8) { /* 32 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGFR(buf, r1, r2);
+ else
+ return s390_emit_LLGFR(buf, r1, r2);
+ }
+ goto fail;
+
+ default: /* unexpected "from" size */
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+ const s390_amode *src = opnd.variant.am;
+ UChar b = hregNumber(src->b);
+ UChar x = hregNumber(src->x);
+ Int d = src->d;
+
+ switch (from_size) {
+ case 1:
+ if (insn->size == 4 || insn->size == 2) {
+ if (sign_extend)
+ return s390_emit_LBw(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_LLCw(buf, r1, x, b, DISP20(d));
+ }
+ if (insn->size == 8) {
+ if (sign_extend)
+ return s390_emit_LGBw(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_LLGC(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+
+ case 2:
+ if (insn->size == 4) { /* 16 --> 32 */
+ if (sign_extend == 0)
+ return s390_emit_LLHw(buf, r1, x, b, DISP20(d));
+
+ switch (src->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_LH(buf, r1, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_LHY(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+ }
+ if (insn->size == 8) { /* 16 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGH(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_LLGH(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+
+ case 4:
+ if (insn->size == 8) { /* 32 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGF(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_LLGF(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+
+ default: /* unexpected "from" size */
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+ ULong value = opnd.variant.imm;
+
+ switch (from_size) {
+ case 1:
+ if (insn->size == 4 || insn->size == 2) { /* 8 --> 32 8 --> 16 */
+ if (sign_extend) {
+ /* host can do the sign extension to 16-bit; LHI does the rest */
+ return s390_emit_LHI(buf, r1, (Short)(Char)(UChar)value);
+ } else {
+ return s390_emit_LHI(buf, r1, value);
+ }
+ }
+ if (insn->size == 8) { /* 8 --> 64 */
+ if (sign_extend) {
+ /* host can do the sign extension to 16-bit; LGHI does the rest */
+ return s390_emit_LGHI(buf, r1, (Short)(Char)(UChar)value);
+ } else {
+ return s390_emit_LGHI(buf, r1, value);
+ }
+ }
+ goto fail;
+
+ case 2:
+ if (insn->size == 4) { /* 16 --> 32 */
+ return s390_emit_LHI(buf, r1, value);
+ }
+ if (insn->size == 8) { /* 16 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGHI(buf, r1, value);
+ else
+ return s390_emit_LLILL(buf, r1, value);
+ }
+ goto fail;
+
+ case 4:
+ if (insn->size == 8) { /* 32 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGFIw(buf, r1, value);
+ else
+ return s390_emit_LLILFw(buf, r1, value);
+ }
+ goto fail;
+
+ default: /* unexpected "from" size */
+ goto fail;
+ }
+ }
+ }
+
+ fail:
+ vpanic("s390_widen_emit");
+}
+
+
+static UChar *
+s390_negate_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI opnd;
+
+ opnd = insn->variant.unop.src;
+
+ switch (opnd.tag) {
+ case S390_OPND_REG: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+ UChar r2 = hregNumber(opnd.variant.reg);
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ case 4:
+ return s390_emit_LCR(buf, r1, r2);
+
+ case 8:
+ return s390_emit_LCGR(buf, r1, r2);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+
+ /* Load bytes into scratch register R0, then negate */
+ buf = s390_emit_load_mem(buf, insn->size, R0, opnd.variant.am);
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ case 4:
+ return s390_emit_LCR(buf, r1, R0);
+
+ case 8:
+ return s390_emit_LCGR(buf, r1, R0);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+ ULong value = opnd.variant.imm;
+
+ value = ~value + 1; /* two's complement */
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ /* Load the immediate values as a 4 byte value. That does not hurt as
+ those extra bytes will not be looked at. Fall through .... */
+ case 4:
+ return s390_emit_load_32imm(buf, r1, value);
+
+ case 8:
+ return s390_emit_load_64imm(buf, r1, value);
+
+ default:
+ goto fail;
+ }
+ }
+ }
+
+ fail:
+ vpanic("s390_negate_emit");
+}
+
+
+static UChar *
+s390_insn_unop_emit(UChar *buf, const s390_insn *insn)
+{
+ switch (insn->variant.unop.tag) {
+ case S390_ZERO_EXTEND_8: return s390_widen_emit(buf, insn, 1, 0);
+ case S390_ZERO_EXTEND_16: return s390_widen_emit(buf, insn, 2, 0);
+ case S390_ZERO_EXTEND_32: return s390_widen_emit(buf, insn, 4, 0);
+
+ case S390_SIGN_EXTEND_8: return s390_widen_emit(buf, insn, 1, 1);
+ case S390_SIGN_EXTEND_16: return s390_widen_emit(buf, insn, 2, 1);
+ case S390_SIGN_EXTEND_32: return s390_widen_emit(buf, insn, 4, 1);
+
+ case S390_NEGATE: return s390_negate_emit(buf, insn);
+ }
+
+ vpanic("s390_insn_unop_emit");
+}
+
+
+/* Only 4-byte and 8-byte operands are handled. 1-byte and 2-byte
+ comparisons will have been converted to 4-byte comparisons in
+ s390_isel_cc and should not occur here. */
+static UChar *
+s390_insn_test_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI opnd;
+
+ opnd = insn->variant.test.src;
+
+ switch (opnd.tag) {
+ case S390_OPND_REG: {
+ UInt reg = hregNumber(opnd.variant.reg);
+
+ switch (insn->size) {
+ case 4:
+ return s390_emit_LTR(buf, reg, reg);
+
+ case 8:
+ return s390_emit_LTGR(buf, reg, reg);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = opnd.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ switch (insn->size) {
+ case 4:
+ return s390_emit_LTw(buf, R0, x, b, DISP20(d));
+
+ case 8:
+ return s390_emit_LTGw(buf, R0, x, b, DISP20(d));
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = opnd.variant.imm;
+
+ switch (insn->size) {
+ case 4:
+ buf = s390_emit_load_32imm(buf, R0, value);
+ return s390_emit_LTR(buf, R0, R0);
+
+ case 8:
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_LTGR(buf, R0, R0);
+
+ default:
+ goto fail;
+ }
+ }
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_test_emit");
+}
+
+
+static UChar *
+s390_insn_cc2bool_emit(UChar *buf, const s390_insn *insn)
+{
+ UChar r1 = hregNumber(insn->variant.cc2bool.dst);
+ s390_cc_t cond = insn->variant.cc2bool.cond;
+
+ /* Make the destination register be 1 or 0, depending on whether
+ the relevant condition holds. A 64-bit value is computed. */
+ if (cond == S390_CC_ALWAYS)
+ return s390_emit_LGHI(buf, r1, 1); /* r1 = 1 */
+
+ buf = s390_emit_load_cc(buf, r1); /* r1 = cc */
+ buf = s390_emit_LGHI(buf, R0, cond); /* r0 = mask */
+ buf = s390_emit_SLLG(buf, r1, R0, r1, DISP20(0)); /* r1 = mask << cc */
+ buf = s390_emit_SRLG(buf, r1, r1, 0, DISP20(3)); /* r1 = r1 >> 3 */
+ buf = s390_emit_NILL(buf, r1, 1); /* r1 = r1 & 0x1 */
+
+ return buf;
+}
+
+
+/* Only 4-byte and 8-byte operands are handled. */
+static UChar *
+s390_insn_cas_emit(UChar *buf, const s390_insn *insn)
+{
+ UChar r1, r3, b, old;
+ Int d;
+ s390_amode *am;
+
+ r1 = hregNumber(insn->variant.cas.op1); /* expected value */
+ r3 = hregNumber(insn->variant.cas.op3);
+ old= hregNumber(insn->variant.cas.old_mem);
+ am = insn->variant.cas.op2;
+ b = hregNumber(am->b);
+ d = am->d;
+
+ switch (insn->size) {
+ case 4:
+ /* r1 must no be overwritten. So copy it to R0 and let CS clobber it */
+ buf = s390_emit_LR(buf, R0, r1);
+ if (am->tag == S390_AMODE_B12)
+ buf = s390_emit_CS(buf, R0, r3, b, d);
+ else
+ buf = s390_emit_CSY(buf, R0, r3, b, DISP20(d));
+ /* Now copy R0 which has the old memory value to OLD */
+ return s390_emit_LR(buf, old, R0);
+
+ case 8:
+ /* r1 must no be overwritten. So copy it to R0 and let CS clobber it */
+ buf = s390_emit_LGR(buf, R0, r1);
+ buf = s390_emit_CSG(buf, R0, r3, b, DISP20(d));
+ /* Now copy R0 which has the old memory value to OLD */
+ return s390_emit_LGR(buf, old, R0);
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_cas_emit");
+}
+
+
+/* Only 4-byte and 8-byte comparisons are handled. 1-byte and 2-byte
+ comparisons will have been converted to 4-byte comparisons in
+ s390_isel_cc and should not occur here. */
+static UChar *
+s390_insn_compare_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI op2;
+ HReg op1;
+ Bool signed_comparison;
+
+ op1 = insn->variant.compare.src1;
+ op2 = insn->variant.compare.src2;
+ signed_comparison = insn->variant.compare.signed_comparison;
+
+ switch (op2.tag) {
+ case S390_OPND_REG: {
+ UInt r1 = hregNumber(op1);
+ UInt r2 = hregNumber(op2.variant.reg);
+
+ switch (insn->size) {
+ case 4:
+ if (signed_comparison)
+ return s390_emit_CR(buf, r1, r2);
+ else
+ return s390_emit_CLR(buf, r1, r2);
+
+ case 8:
+ if (signed_comparison)
+ return s390_emit_CGR(buf, r1, r2);
+ else
+ return s390_emit_CLGR(buf, r1, r2);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ UChar r1 = hregNumber(op1);
+ const s390_amode *am = op2.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ switch (insn->size) {
+ case 4:
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ if (signed_comparison)
+ return s390_emit_C(buf, r1, x, b, d);
+ else
+ return s390_emit_CL(buf, r1, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ if (signed_comparison)
+ return s390_emit_CY(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_CLY(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+
+ case 8:
+ if (signed_comparison)
+ return s390_emit_CG(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_CLG(buf, r1, x, b, DISP20(d));
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ UChar r1 = hregNumber(op1);
+ ULong value = op2.variant.imm;
+
+ switch (insn->size) {
+ case 4:
+ if (signed_comparison)
+ return s390_emit_CFIw(buf, r1, value);
+ else
+ return s390_emit_CLFIw(buf, r1, value);
+
+ case 8:
+ buf = s390_emit_load_64imm(buf, R0, value);
+ if (signed_comparison)
+ return s390_emit_CGR(buf, r1, R0);
+ else
+ return s390_emit_CLGR(buf, r1, R0);
+
+ default:
+ goto fail;
+ }
+ }
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_compare_emit");
+}
+
+
+static UChar *
+s390_insn_mul_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI op2;
+ UChar r1;
+ Bool signed_multiply;
+
+ /* The register number identifying the register pair */
+ r1 = hregNumber(insn->variant.mul.dst_hi);
+
+ op2 = insn->variant.mul.op2;
+ signed_multiply = insn->variant.mul.signed_multiply;
+
+ switch (op2.tag) {
+ case S390_OPND_REG: {
+ UInt r2 = hregNumber(op2.variant.reg);
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ case 4:
+ if (signed_multiply)
+ return s390_emit_MR(buf, r1, r2);
+ else
+ return s390_emit_MLR(buf, r1, r2);
+
+ case 8:
+ if (signed_multiply)
+ vpanic("s390_insn_mul_emit");
+ else
+ return s390_emit_MLGR(buf, r1, r2);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = op2.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ /* Load bytes into scratch register R0, then multiply */
+ buf = s390_emit_load_mem(buf, insn->size, R0, am);
+ if (signed_multiply)
+ return s390_emit_MR(buf, r1, R0);
+ else
+ return s390_emit_MLR(buf, r1, R0);
+
+ case 4:
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ if (signed_multiply)
+ return s390_emit_M(buf, r1, x, b, d);
+ else
+ return s390_emit_ML(buf, r1, x, b, DISP20(d));
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ if (signed_multiply)
+ return s390_emit_MFYw(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_ML(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+
+ case 8:
+ if (signed_multiply)
+ vpanic("s390_insn_mul_emit");
+ else
+ return s390_emit_MLG(buf, r1, x, b, DISP20(d));
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = op2.variant.imm;
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ case 4:
+ buf = s390_emit_load_32imm(buf, R0, value);
+ if (signed_multiply)
+ return s390_emit_MR(buf, r1, R0);
+ else
+ return s390_emit_MLR(buf, r1, R0);
+
+ case 8:
+ buf = s390_emit_load_64imm(buf, R0, value);
+ if (signed_multiply)
+ vpanic("s390_insn_mul_emit");
+ else
+ return s390_emit_MLGR(buf, r1, R0);
+
+ default:
+ goto fail;
+ }
+ }
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_mul_emit");
+}
+
+
+static UChar *
+s390_insn_div_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI op2;
+ UChar r1;
+ Bool signed_divide;
+
+ r1 = hregNumber(insn->variant.div.op1_hi);
+ op2 = insn->variant.div.op2;
+ signed_divide = insn->variant.div.signed_divide;
+
+ switch (op2.tag) {
+ case S390_OPND_REG: {
+ UInt r2 = hregNumber(op2.variant.reg);
+
+ switch (insn->size) {
+ case 4:
+ if (signed_divide)
+ return s390_emit_DR(buf, r1, r2);
+ else
+ return s390_emit_DLR(buf, r1, r2);
+
+ case 8:
+ if (signed_divide)
+ vpanic("s390_insn_div_emit");
+ else
+ return s390_emit_DLGR(buf, r1, r2);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = op2.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ switch (insn->size) {
+ case 4:
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ if (signed_divide)
+ return s390_emit_D(buf, r1, x, b, d);
+ else
+ return s390_emit_DL(buf, r1, x, b, DISP20(d));
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ if (signed_divide) {
+ buf = s390_emit_LY(buf, R0, x, b, DISP20(d));
+ return s390_emit_DR(buf, r1, R0);
+ } else
+ return s390_emit_DL(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+
+ case 8:
+ if (signed_divide)
+ vpanic("s390_insn_div_emit");
+ else
+ return s390_emit_DLG(buf, r1, x, b, DISP20(d));
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = op2.variant.imm;
+
+ switch (insn->size) {
+ case 4:
+ buf = s390_emit_load_32imm(buf, R0, value);
+ if (signed_divide)
+ return s390_emit_DR(buf, r1, R0);
+ else
+ return s390_emit_DLR(buf, r1, R0);
+
+ case 8:
+ buf = s390_emit_load_64imm(buf, R0, value);
+ if (signed_divide)
+ vpanic("s390_insn_div_emit");
+ else
+ return s390_emit_DLGR(buf, r1, R0);
+
+ default:
+ goto fail;
+ }
+ }
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_div_emit");
+}
+
+
+static UChar *
+s390_insn_divs_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI op2;
+ UChar r1;
+
+ r1 = hregNumber(insn->variant.divs.rem);
+ op2 = insn->variant.divs.op2;
+
+ switch (op2.tag) {
+ case S390_OPND_REG: {
+ UInt r2 = hregNumber(op2.variant.reg);
+
+ return s390_emit_DSGR(buf, r1, r2);
+ }
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = op2.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ return s390_emit_DSG(buf, r1, x, b, DISP20(d));
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = op2.variant.imm;
+
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_DSGR(buf, r1, R0);
+ }
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_divs_emit");
+}
+
+
+static UChar *
+s390_insn_clz_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI src;
+ UChar r1, r1p1, r2, *p;
+
+ r1 = hregNumber(insn->variant.clz.num_bits);
+ r1p1 = hregNumber(insn->variant.clz.clobber);
+
+ vassert((r1 & 0x1) == 0);
+ vassert(r1p1 == r1 + 1);
+
+ p = buf;
+ src = insn->variant.clz.src;
+
+ /* Get operand and move it to r2 */
+ switch (src.tag) {
+ case S390_OPND_REG:
+ r2 = hregNumber(src.variant.reg);
+ break;
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = src.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ p = s390_emit_LG(p, R0, x, b, DISP20(d));
+ r2 = R0;
+ break;
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = src.variant.imm;
+
+ p = s390_emit_load_64imm(p, R0, value);
+ r2 = R0;
+ break;
+ }
+
+ default:
+ goto fail;
+ }
+
+ /* Use FLOGR if you can */
+ if (s390_host_has_eimm) {
+ return s390_emit_FLOGR(p, r1, r2);
+ }
+
+ /*
+ r0 = r2;
+ r1 = 64;
+ while (r0 != 0) {
+ r1 -= 1;
+ r0 >>= 1;
+ }
+ */
+ p = s390_emit_LTGR(p, R0, r2);
+ p = s390_emit_LLILL(p, r1, 64);
+
+ p = s390_emit_BRC(p, S390_CC_E, (4 + 4 + 6 + 4 + 4)/ 2); /* 4 bytes */
+ p = s390_emit_AGHI(p, r1, (UShort)-1); /* r1 -= 1; 4 bytes */
+ p = s390_emit_SRLG(p, R0, R0, R0, DISP20(1)); /* r0 >>= 1; 6 bytes */
+ p = s390_emit_LTGR(p, R0, R0); /* set cc 4 bytes */
+ p = s390_emit_BRC(p, S390_CC_NE, /* 4 bytes */
+ (UShort)(-(4 + 6 + 4) / 2));
+ return p;
+
+ fail:
+ vpanic("s390_insn_clz_emit");
+}
+
+
+static UChar *
+s390_insn_branch_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI dst;
+ s390_cc_t cond;
+ UInt trc;
+ UChar *p, *ptmp = 0; /* avoid compiler warnings */
+
+ cond = insn->variant.branch.cond;
+ dst = insn->variant.branch.dst;
+
+ p = buf;
+ trc = 0;
+
+ if (cond != S390_CC_ALWAYS) {
+ /* So we have something like this
+ if (cond) goto X;
+ Y: ...
+ We convert this into
+ if (! cond) goto Y; // BRC insn; 4 bytes
+ return_reg = X;
+ return to dispatcher
+ Y:
+ */
+ ptmp = p; /* 4 bytes (a BRC insn) to be filled in here */
+ p += 4;
+ }
+
+ /* If a non-boring, set guest-state-pointer appropriately. */
+
+ switch (insn->variant.branch.kind) {
+ case Ijk_ClientReq: trc = VEX_TRC_JMP_CLIENTREQ; break;
+ case Ijk_Sys_syscall: trc = VEX_TRC_JMP_SYS_SYSCALL; break;
+ case Ijk_Yield: trc = VEX_TRC_JMP_YIELD; break;
+ case Ijk_EmWarn: trc = VEX_TRC_JMP_EMWARN; break;
+ case Ijk_EmFail: trc = VEX_TRC_JMP_EMFAIL; break;
+ case Ijk_MapFail: trc = VEX_TRC_JMP_MAPFAIL; break;
+ case Ijk_NoDecode: trc = VEX_TRC_JMP_NODECODE; break;
+ case Ijk_TInval: trc = VEX_TRC_JMP_TINVAL; break;
+ case Ijk_NoRedir: trc = VEX_TRC_JMP_NOREDIR; break;
+ case Ijk_SigTRAP: trc = VEX_TRC_JMP_SIGTRAP; break;
+ case Ijk_Ret: trc = 0; break;
+ case Ijk_Call: trc = 0; break;
+ case Ijk_Boring: trc = 0; break;
+ break;
+
+ default:
+ vpanic("s390_insn_branch_emit: unknown jump kind");
+ }
+
+ /* Get the destination address into the return register */
+ switch (dst.tag) {
+ case S390_OPND_REG:
+ p = s390_emit_LGR(p, S390_REGNO_RETURN_VALUE, hregNumber(dst.variant.reg));
+ break;
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = dst.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ p = s390_emit_LG(p, S390_REGNO_RETURN_VALUE, x, b, DISP20(d));
+ break;
+ }
+
+ case S390_OPND_IMMEDIATE:
+ p = s390_emit_load_64imm(p, S390_REGNO_RETURN_VALUE, dst.variant.imm);
+ break;
+
+ default:
+ goto fail;
+ }
+
+ if (trc != 0) {
+ /* Something special. Set guest-state pointer appropriately */
+ p = s390_emit_LGHI(p, S390_REGNO_GUEST_STATE_POINTER, trc);
+ } else {
+ /* Nothing special needs to be done for calls and returns. */
+ }
+
+ p = s390_emit_BCR(p, S390_CC_ALWAYS, S390_REGNO_LINK_REGISTER);
+
+ if (cond != S390_CC_ALWAYS) {
+ Int delta = p - ptmp;
+
+ delta >>= 1; /* immediate constant is #half-words */
+ vassert(delta > 0 && delta < (1 << 16));
+ s390_emit_BRC(ptmp, s390_cc_invert(cond), delta);
+ }
+
+ return p;
+
+ fail:
+ vpanic("s390_insn_branch_emit");
+}
+
+
+static UChar *
+s390_insn_helper_call_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_cc_t cond;
+ ULong target;
+ UChar *ptmp = buf;
+
+ cond = insn->variant.helper_call.cond;
+ target = insn->variant.helper_call.target;
+
+ if (cond != S390_CC_ALWAYS) {
+ /* So we have something like this
+ if (cond) call X;
+ Y: ...
+ We convert this into
+ if (! cond) goto Y; // BRC opcode; 4 bytes
+ call X;
+ Y:
+ */
+ /* 4 bytes (a BRC insn) to be filled in here */
+ buf += 4;
+ }
+
+ /* Load the target address into a register, that
+ (a) is not used for passing parameters to the helper and
+ (b) can be clobbered by the callee
+ r1 looks like a good choice.
+ Also, need to arrange for the return address be put into the
+ link-register */
+ buf = s390_emit_load_64imm(buf, 1, target);
+
+ /* Stash away the client's FPC register because the helper might change it. */
+ buf = s390_emit_STFPC(buf, S390_REGNO_STACK_POINTER, S390_OFFSET_SAVED_FPC_C);
+
+ /* Before we can call the helper, we need to save the link register,
+ because the BASR will overwrite it. We cannot use a register for that.
+ (a) Volatile registers will be modified by the helper.
+ (b) For saved registers the client code assumes that they have not
+ changed after the function returns. So we cannot use it to store
+ the link register.
+ In the dispatcher, before calling the client code, we have arranged for
+ a location on the stack for this purpose. See dispatch-s390x-linux.S. */
+ buf = s390_emit_STG(buf, S390_REGNO_LINK_REGISTER, 0, // save LR
+ S390_REGNO_STACK_POINTER, S390_OFFSET_SAVED_LR, 0);
+ buf = s390_emit_BASR(buf, S390_REGNO_LINK_REGISTER, 1); // call helper
+ buf = s390_emit_LG(buf, S390_REGNO_LINK_REGISTER, 0, // restore LR
+ S390_REGNO_STACK_POINTER, S390_OFFSET_SAVED_LR, 0);
+ buf = s390_emit_LFPC(buf, S390_REGNO_STACK_POINTER, // restore FPC
+ S390_OFFSET_SAVED_FPC_C);
+
+ if (cond != S390_CC_ALWAYS) {
+ Int delta = buf - ptmp;
+
+ delta >>= 1; /* immediate constant is #half-words */
+ vassert(delta > 0 && delta < (1 << 16));
+ s390_emit_BRC(ptmp, s390_cc_invert(cond), delta);
+ }
+
+ return buf;
+}
+
+
+static UChar *
+s390_insn_cond_move_emit(UChar *buf, const s390_insn *insn)
+{
+ HReg dst;
+ s390_opnd_RMI src;
+ s390_cc_t cond;
+ UChar *p, *ptmp = 0; /* avoid compiler warnings */
+
+ cond = insn->variant.cond_move.cond;
+ dst = insn->variant.cond_move.dst;
+ src = insn->variant.cond_move.src;
+
+ p = buf;
+
+ /* Branch (if cond fails) over move instrs */
+ if (cond != S390_CC_ALWAYS) {
+ /* Don't know how many bytes to jump over yet.
+ Make space for a BRC instruction (4 bytes) and fill in later. */
+ ptmp = p; /* to be filled in here */
+ p += 4;
+ }
+
+ // cond true: move src => dst
+
+ switch (src.tag) {
+ case S390_OPND_REG:
+ p = s390_emit_LGR(p, hregNumber(dst), hregNumber(src.variant.reg));
+ break;
+
+ case S390_OPND_AMODE:
+ p = s390_emit_load_mem(p, insn->size, hregNumber(dst), src.variant.am);
+ break;
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = src.variant.imm;
+ UInt r = hregNumber(dst);
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ /* Load the immediate values as a 4 byte value. That does not hurt as
+ those extra bytes will not be looked at. Fall through .... */
+ case 4:
+ p = s390_emit_load_32imm(p, r, value);
+ break;
+
+ case 8:
+ p = s390_emit_load_64imm(p, r, value);
+ break;
+ }
+ break;
+ }
+
+ default:
+ goto fail;
+ }
+
+ if (cond != S390_CC_ALWAYS) {
+ Int delta = p - ptmp;
+
+ delta >>= 1; /* immediate constant is #half-words */
+ vassert(delta > 0 && delta < (1 << 16));
+ s390_emit_BRC(ptmp, s390_cc_invert(cond), delta);
+ }
+
+ return p;
+
+ fail:
+ vpanic("s390_insn_cond_move_emit");
+}
+
+
+/* Little helper function to the rounding mode in the real FPC
+ register */
+static UChar *
+s390_set_fpc_rounding_mode(UChar *buf, s390_round_t rounding_mode)
+{
+ UChar bits;
+
+ /* Determine BFP rounding bits */
+ switch (rounding_mode) {
+ case S390_ROUND_NEAREST_EVEN: bits = 0; break;
+ case S390_ROUND_ZERO: bits = 1; break;
+ case S390_ROUND_POSINF: bits = 2; break;
+ case S390_ROUND_NEGINF: bits = 3; break;
+ default: vpanic("invalid rounding mode\n");
+ }
+
+ /* Copy FPC from guest state to R0 and OR in the new rounding mode */
+ buf = s390_emit_L(buf, R0, 0, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc); // r0 = guest_fpc
+
+ buf = s390_emit_NILL(buf, R0, 0xFFFC); /* Clear out right-most 2 bits */
+ buf = s390_emit_OILL(buf, R0, bits); /* OR in the new rounding mode */
+ buf = s390_emit_SFPC(buf, R0, 0); /* Load FPC register from R0 */
+
+ return buf;
+}
+
+
+static UChar *
+s390_insn_bfp_triop_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1 = hregNumber(insn->variant.bfp_triop.dst);
+ UInt r2 = hregNumber(insn->variant.bfp_triop.op2);
+ UInt r3 = hregNumber(insn->variant.bfp_triop.op3);
+ s390_round_t rounding_mode = insn->variant.bfp_triop.rounding_mode;
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode);
+ }
+
+ switch (insn->size) {
+ case 4:
+ switch (insn->variant.bfp_triop.tag) {
+ case S390_BFP_MADD: buf = s390_emit_MAEBR(buf, r1, r3, r2); break;
+ case S390_BFP_MSUB: buf = s390_emit_MSEBR(buf, r1, r3, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case 8:
+ switch (insn->variant.bfp_triop.tag) {
+ case S390_BFP_MADD: buf = s390_emit_MADBR(buf, r1, r3, r2); break;
+ case S390_BFP_MSUB: buf = s390_emit_MSDBR(buf, r1, r3, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ default: goto fail;
+ }
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ /* Restore FPC register from guest state */
+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc); // fpc = guest_fpc
+ }
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp_triop_emit");
+}
+
+
+static UChar *
+s390_insn_bfp_binop_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1 = hregNumber(insn->variant.bfp_binop.dst);
+ UInt r2 = hregNumber(insn->variant.bfp_binop.op2);
+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode;
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode);
+ }
+
+ switch (insn->size) {
+ case 4:
+ switch (insn->variant.bfp_binop.tag) {
+ case S390_BFP_ADD: buf = s390_emit_AEBR(buf, r1, r2); break;
+ case S390_BFP_SUB: buf = s390_emit_SEBR(buf, r1, r2); break;
+ case S390_BFP_MUL: buf = s390_emit_MEEBR(buf, r1, r2); break;
+ case S390_BFP_DIV: buf = s390_emit_DEBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case 8:
+ switch (insn->variant.bfp_binop.tag) {
+ case S390_BFP_ADD: buf = s390_emit_ADBR(buf, r1, r2); break;
+ case S390_BFP_SUB: buf = s390_emit_SDBR(buf, r1, r2); break;
+ case S390_BFP_MUL: buf = s390_emit_MDBR(buf, r1, r2); break;
+ case S390_BFP_DIV: buf = s390_emit_DDBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ default: goto fail;
+ }
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ /* Restore FPC register from guest state */
+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc);
+ }
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp_binop_emit");
+}
+
+
+static UChar *
+s390_insn_bfp_unop_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1 = hregNumber(insn->variant.bfp_unop.dst);
+ UInt r2 = hregNumber(insn->variant.bfp_unop.op);
+ s390_round_t rounding_mode = insn->variant.bfp_unop.rounding_mode;
+ s390_round_t m3 = rounding_mode;
+
+ /* The "convert to fixed" instructions have a field for the rounding
+ mode and no FPC modification is necessary. So we handle them
+ upfront. */
+ switch (insn->variant.bfp_unop.tag) {
+ case S390_BFP_F32_TO_I32: return s390_emit_CFEBR(buf, m3, r1, r2);
+ case S390_BFP_F64_TO_I32: return s390_emit_CFDBR(buf, m3, r1, r2);
+ case S390_BFP_F32_TO_I64: return s390_emit_CGEBR(buf, m3, r1, r2);
+ case S390_BFP_F64_TO_I64: return s390_emit_CGDBR(buf, m3, r1, r2);
+ default: break;
+ }
+
+ /* For all other insns if a special rounding mode is requested,
+ we need to set the FPC first and restore it later. */
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode);
+ }
+
+ switch (insn->variant.bfp_unop.tag) {
+ case S390_BFP_ABS:
+ switch (insn->size) {
+ case 4: buf = s390_emit_LPEBR(buf, r1, r2); break;
+ case 8: buf = s390_emit_LPDBR(buf, r1, r2); break;
+ case 16: buf = s390_emit_LPXBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case S390_BFP_NABS:
+ switch (insn->size) {
+ case 4: buf = s390_emit_LNEBR(buf, r1, r2); break;
+ case 8: buf = s390_emit_LNDBR(buf, r1, r2); break;
+ case 16: buf = s390_emit_LNXBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case S390_BFP_NEG:
+ switch (insn->size) {
+ case 4: buf = s390_emit_LCEBR(buf, r1, r2); break;
+ case 8: buf = s390_emit_LCDBR(buf, r1, r2); break;
+ case 16: buf = s390_emit_LCXBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case S390_BFP_SQRT:
+ switch (insn->size) {
+ case 4: buf = s390_emit_SQEBR(buf, r1, r2); break;
+ case 8: buf = s390_emit_SQDBR(buf, r1, r2); break;
+ case 16: buf = s390_emit_SQXBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case S390_BFP_I32_TO_F32: buf = s390_emit_CEFBR(buf, r1, r2); break;
+ case S390_BFP_I32_TO_F64: buf = s390_emit_CDFBR(buf, r1, r2); break;
+ case S390_BFP_I32_TO_F128: buf = s390_emit_CXFBR(buf, r1, r2); break;
+ case S390_BFP_I64_TO_F32: buf = s390_emit_CEGBR(buf, r1, r2); break;
+ case S390_BFP_I64_TO_F64: buf = s390_emit_CDGBR(buf, r1, r2); break;
+ case S390_BFP_I64_TO_F128: buf = s390_emit_CXGBR(buf, r1, r2); break;
+
+ case S390_BFP_F32_TO_F64: buf = s390_emit_LDEBR(buf, r1, r2); break;
+ case S390_BFP_F32_TO_F128: buf = s390_emit_LXEBR(buf, r1, r2); break;
+ case S390_BFP_F64_TO_F32: buf = s390_emit_LEDBR(buf, r1, r2); break;
+ case S390_BFP_F64_TO_F128: buf = s390_emit_LXDBR(buf, r1, r2); break;
+
+ default: goto fail;
+ }
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ /* Restore FPC register from guest state */
+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc); // fpc = guest_fpc
+ }
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp_unop_emit");
+}
+
+
+static UChar *
+s390_insn_bfp_compare_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt dst = hregNumber(insn->variant.bfp_compare.dst);
+ UInt r1 = hregNumber(insn->variant.bfp_compare.op1);
+ UInt r2 = hregNumber(insn->variant.bfp_compare.op2);
+
+ switch (insn->size) {
+ case 4:
+ buf = s390_emit_CEBR(buf, r1, r2);
+ break;
+
+ case 8:
+ buf = s390_emit_CDBR(buf, r1, r2);
+ break;
+
+ default: goto fail;
+ }
+
+ return s390_emit_load_cc(buf, dst); /* Load condition code into DST */
+
+ fail:
+ vpanic("s390_insn_bfp_compare_emit");
+}
+
+
+static UChar *
+s390_insn_bfp128_binop_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1_hi = hregNumber(insn->variant.bfp128_binop.dst_hi);
+ UInt r1_lo = hregNumber(insn->variant.bfp128_binop.dst_lo);
+ UInt r2_hi = hregNumber(insn->variant.bfp128_binop.op2_hi);
+ UInt r2_lo = hregNumber(insn->variant.bfp128_binop.op2_lo);
+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode;
+
+ /* Paranoia */
+ vassert(insn->size == 16);
+ vassert(r1_lo == r1_hi + 2);
+ vassert(r2_lo == r2_hi + 2);
+ vassert((r1_hi & 0x2) == 0);
+ vassert((r2_hi & 0x2) == 0);
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode);
+ }
+
+ switch (insn->variant.bfp128_binop.tag) {
+ case S390_BFP_ADD: buf = s390_emit_AXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_SUB: buf = s390_emit_SXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_MUL: buf = s390_emit_MXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_DIV: buf = s390_emit_DXBR(buf, r1_hi, r2_hi); break;
+ default: goto fail;
+ }
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ /* Restore FPC register from guest state */
+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc); // fpc = guest_fpc
+ }
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp128_binop_emit");
+}
+
+
+static UChar *
+s390_insn_bfp128_compare_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt dst = hregNumber(insn->variant.bfp128_compare.dst);
+ UInt r1_hi = hregNumber(insn->variant.bfp128_compare.op1_hi);
+ UInt r1_lo = hregNumber(insn->variant.bfp128_compare.op1_lo);
+ UInt r2_hi = hregNumber(insn->variant.bfp128_compare.op2_hi);
+ UInt r2_lo = hregNumber(insn->variant.bfp128_compare.op2_lo);
+
+ /* Paranoia */
+ vassert(insn->size == 16);
+ vassert(r1_lo == r1_hi + 2);
+ vassert(r2_lo == r2_hi + 2);
+ vassert((r1_hi & 0x2) == 0);
+ vassert((r2_hi & 0x2) == 0);
+
+ buf = s390_emit_CXBR(buf, r1_hi, r2_hi);
+
+ /* Load condition code into DST */
+ return s390_emit_load_cc(buf, dst);
+}
+
+
+static UChar *
+s390_insn_bfp128_unop_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1_hi = hregNumber(insn->variant.bfp128_unop.dst_hi);
+ UInt r1_lo = hregNumber(insn->variant.bfp128_unop.dst_lo);
+ UInt r2_hi = hregNumber(insn->variant.bfp128_unop.op_hi);
+ UInt r2_lo = hregNumber(insn->variant.bfp128_unop.op_lo);
+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode;
+
+ /* Paranoia */
+ vassert(insn->size == 16);
+ vassert(r1_lo == r1_hi + 2);
+ vassert(r2_lo == r2_hi + 2);
+ vassert((r1_hi & 0x2) == 0);
+ vassert((r2_hi & 0x2) == 0);
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode);
+ }
+
+ switch (insn->variant.bfp128_unop.tag) {
+ case S390_BFP_ABS: buf = s390_emit_LPXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_NABS: buf = s390_emit_LNXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_NEG: buf = s390_emit_LCXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_SQRT: buf = s390_emit_SQXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_F128_TO_F32: buf = s390_emit_LEXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_F128_TO_F64: buf = s390_emit_LDXBR(buf, r1_hi, r2_hi); break;
+ default: goto fail;
+ }
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ /* Restore FPC register from guest state */
+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc); // fpc = guest_fpc
+ }
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp128_unop_emit");
+}
+
+
+/* Conversion to 128-bit BFP does not require a rounding mode */
+static UChar *
+s390_insn_bfp128_convert_to_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1_hi = hregNumber(insn->variant.bfp128_unop.dst_hi);
+ UInt r1_lo = hregNumber(insn->variant.bfp128_unop.dst_lo);
+ UInt r2 = hregNumber(insn->variant.bfp128_unop.op_hi);
+
+ /* Paranoia */
+ vassert(insn->size == 16);
+ vassert(r1_lo == r1_hi + 2);
+ vassert((r1_hi & 0x2) == 0);
+
+ switch (insn->variant.bfp128_unop.tag) {
+ case S390_BFP_I32_TO_F128: buf = s390_emit_CXFBR(buf, r1_hi, r2); break;
+ case S390_BFP_I64_TO_F128: buf = s390_emit_CXGBR(buf, r1_hi, r2); break;
+ case S390_BFP_F32_TO_F128: buf = s390_emit_LXEBR(buf, r1_hi, r2); break;
+ case S390_BFP_F64_TO_F128: buf = s390_emit_LXDBR(buf, r1_hi, r2); break;
+ default: goto fail;
+ }
+
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp128_convert_to_emit");
+}
+
+
+static UChar *
+s390_insn_bfp128_convert_from_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1 = hregNumber(insn->variant.bfp128_unop.dst_hi);
+ UInt r2_hi = hregNumber(insn->variant.bfp128_unop.op_hi);
+ UInt r2_lo = hregNumber(insn->variant.bfp128_unop.op_lo);
+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode;
+
+ /* Paranoia */
+ vassert(insn->size != 16);
+ vassert(r2_lo == r2_hi + 2);
+ vassert((r2_hi & 0x2) == 0);
+
+ /* The "convert to fixed" instructions have a field for the rounding
+ mode and no FPC modification is necessary. So we handle them
+ upfront. */
+ switch (insn->variant.bfp_unop.tag) {
+ case S390_BFP_F128_TO_I32: return s390_emit_CFXBR(buf, rounding_mode,
+ r1, r2_hi); break;
+ case S390_BFP_F128_TO_I64: return s390_emit_CGXBR(buf, rounding_mode,
+ r1, r2_hi); break;
+ default: break;
+ }
+
+ vpanic("s390_insn_bfp128_convert_from_emit");
+}
+
+
+static UChar *
+s390_insn_mfence_emit(UChar *buf, const s390_insn *insn)
+{
+ return s390_emit_BCR(buf, 0xF, 0x0);
+}
+
+
+Int
+emit_S390Instr(UChar *buf, Int nbuf, s390_insn *insn, Bool mode64,
+ void *dispatch_unassisted, void *dispatch_assisted)
+{
+ UChar *end;
+
+ switch (insn->tag) {
+ case S390_INSN_LOAD:
+ end = s390_insn_load_emit(buf, insn);
+ break;
+
+ case S390_INSN_STORE:
+ end = s390_insn_store_emit(buf, insn);
+ break;
+
+ case S390_INSN_MOVE:
+ end = s390_insn_move_emit(buf, insn);
+ break;
+
+ case S390_INSN_COND_MOVE:
+ end = s390_insn_cond_move_emit(buf, insn);
+ break;
+
+ case S390_INSN_LOAD_IMMEDIATE:
+ end = s390_insn_load_immediate_emit(buf, insn);
+ break;
+
+ case S390_INSN_ALU:
+ end = s390_insn_alu_emit(buf, insn);
+ break;
+
+ case S390_INSN_MUL:
+ end = s390_insn_mul_emit(buf, insn);
+ break;
+
+ case S390_INSN_DIV:
+ end = s390_insn_div_emit(buf, insn);
+ break;
+
+ case S390_INSN_DIVS:
+ end = s390_insn_divs_emit(buf, insn);
+ break;
+
+ case S390_INSN_CLZ:
+ end = s390_insn_clz_emit(buf, insn);
+ break;
+
+ case S390_INSN_UNOP:
+ end = s390_insn_unop_emit(buf, insn);
+ break;
+
+ case S390_INSN_TEST:
+ end = s390_insn_test_emit(buf, insn);
+ break;
+
+ case S390_INSN_CC2BOOL:
+ end = s390_insn_cc2bool_emit(buf, insn);
+ break;
+
+ case S390_INSN_CAS:
+ end = s390_insn_cas_emit(buf, insn);
+ break;
+
+ case S390_INSN_COMPARE:
+ end = s390_insn_compare_emit(buf, insn);
+ break;
+
+ case S390_INSN_BRANCH:
+ vassert(dispatch_unassisted == NULL);
+ vassert(dispatch_assisted == NULL);
+ end = s390_insn_branch_emit(buf, insn);
+ break;
+
+ case S390_INSN_HELPER_CALL:
+ end = s390_insn_helper_call_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP_TRIOP:
+ end = s390_insn_bfp_triop_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP_BINOP:
+ end = s390_insn_bfp_binop_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP_UNOP:
+ end = s390_insn_bfp_unop_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP_COMPARE:
+ end = s390_insn_bfp_compare_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP128_BINOP:
+ end = s390_insn_bfp128_binop_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP128_COMPARE:
+ end = s390_insn_bfp128_compare_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP128_UNOP:
+ end = s390_insn_bfp128_unop_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_TO:
+ end = s390_insn_bfp128_convert_to_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_FROM:
+ end = s390_insn_bfp128_convert_from_emit(buf, insn);
+ break;
+
+ case S390_INSN_MFENCE:
+ end = s390_insn_mfence_emit(buf, insn);
+ break;
+
+ default:
+ vpanic("s390_insn_emit");
+ }
+
+ vassert(end - buf <= nbuf);
+
+ return end - buf;
+}
+
+
+/*---------------------------------------------------------------*/
+/*--- end host_s390_defs.c ---*/
+/*---------------------------------------------------------------*/
diff --git a/main/VEX/priv/host_s390_defs.h b/main/VEX/priv/host_s390_defs.h
new file mode 100644
index 0000000..2a5eddd
--- /dev/null
+++ b/main/VEX/priv/host_s390_defs.h
@@ -0,0 +1,495 @@
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+/*---------------------------------------------------------------*/
+/*--- begin host_s390_defs.h ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* Contributed by Florian Krohm */
+
+#ifndef __VEX_HOST_S390_DEFS_H
+#define __VEX_HOST_S390_DEFS_H
+
+#include "libvex_basictypes.h" /* Bool */
+#include "libvex.h" /* VexArchInfo */
+#include "main_util.h" /* needed for host_generic_regs.h */
+#include "host_generic_regs.h" /* HReg */
+
+/* --------- Registers --------- */
+const HChar *s390_hreg_as_string(HReg);
+
+/* Dedicated registers */
+HReg s390_hreg_guest_state_pointer(void);
+
+
+/* Given the index of a function argument, return the number of the
+ general purpose register in which it is being passed. Arguments are
+ counted 0, 1, 2, ... and they are being passed in r2, r3, r4, ... */
+static __inline__ unsigned
+s390_gprno_from_arg_index(unsigned ix)
+{
+ return ix + 2;
+}
+
+/* --------- Memory address expressions (amodes). --------- */
+
+/* These are the address modes:
+ (1) b12: base register + 12-bit unsigned offset (e.g. RS)
+ (2) b20: base register + 20-bit signed offset (e.g. RSY)
+ (3) bx12: base register + index register + 12-bit unsigned offset (e.g. RX)
+ (4) bx20: base register + index register + 20-bit signed offset (e.g. RXY)
+ fixs390: There is also pc-relative stuff.. e.g. LARL
+*/
+
+typedef enum {
+ S390_AMODE_B12,
+ S390_AMODE_B20,
+ S390_AMODE_BX12,
+ S390_AMODE_BX20
+} s390_amode_t;
+
+typedef struct {
+ s390_amode_t tag;
+ HReg b;
+ HReg x; /* hregNumber(x) == 0 for S390_AMODE_B12/B20 kinds */
+ Int d; /* 12 bit unsigned or 20 bit signed */
+} s390_amode;
+
+
+s390_amode *s390_amode_b12(Int d, HReg b);
+s390_amode *s390_amode_b20(Int d, HReg b);
+s390_amode *s390_amode_bx12(Int d, HReg b, HReg x);
+s390_amode *s390_amode_bx20(Int d, HReg b, HReg x);
+s390_amode *s390_amode_for_guest_state(Int d);
+Bool s390_amode_is_sane(const s390_amode *);
+
+const HChar *s390_amode_as_string(const s390_amode *);
+
+/* ------------- 2nd (right) operand of binary operation ---------------- */
+
+typedef enum {
+ S390_OPND_REG,
+ S390_OPND_IMMEDIATE,
+ S390_OPND_AMODE
+} s390_opnd_t;
+
+
+/* Naming convention for operand locations:
+ R - GPR
+ I - immediate value
+ M - memory (any Amode may be used)
+*/
+
+/* An operand that is either in a GPR or is addressable via a BX20 amode */
+typedef struct {
+ s390_opnd_t tag;
+ union {
+ HReg reg;
+ s390_amode *am;
+ ULong imm;
+ } variant;
+} s390_opnd_RMI;
+
+
+/* The kind of instructions */
+typedef enum {
+ S390_INSN_LOAD, /* load register from memory */
+ S390_INSN_STORE, /* store register to memory */
+ S390_INSN_MOVE, /* from register to register */
+ S390_INSN_COND_MOVE, /* conditonal "move" to register */
+ S390_INSN_LOAD_IMMEDIATE,
+ S390_INSN_ALU,
+ S390_INSN_MUL, /* n-bit operands; 2n-bit result */
+ S390_INSN_DIV, /* 2n-bit dividend; n-bit divisor; n-bit quot/rem */
+ S390_INSN_DIVS, /* n-bit dividend; n-bit divisor; n-bit quot/rem */
+ S390_INSN_CLZ, /* count left-most zeroes */
+ S390_INSN_UNOP,
+ S390_INSN_TEST, /* test operand and set cc */
+ S390_INSN_CC2BOOL,/* convert condition code to 0/1 */
+ S390_INSN_COMPARE,
+ S390_INSN_BRANCH, /* un/conditional goto */
+ S390_INSN_HELPER_CALL,
+ S390_INSN_CAS, /* compare and swap */
+ S390_INSN_BFP_BINOP, /* Binary floating point 32-bit / 64-bit */
+ S390_INSN_BFP_UNOP,
+ S390_INSN_BFP_TRIOP,
+ S390_INSN_BFP_COMPARE,
+ S390_INSN_BFP128_BINOP, /* Binary floating point 128-bit */
+ S390_INSN_BFP128_UNOP,
+ S390_INSN_BFP128_COMPARE,
+ S390_INSN_BFP128_CONVERT_TO,
+ S390_INSN_BFP128_CONVERT_FROM,
+ S390_INSN_MFENCE
+} s390_insn_tag;
+
+
+/* The kind of ALU instructions */
+typedef enum {
+ S390_ALU_ADD,
+ S390_ALU_SUB,
+ S390_ALU_MUL, /* n-bit operands; result is lower n-bit of product */
+ S390_ALU_AND,
+ S390_ALU_OR,
+ S390_ALU_XOR,
+ S390_ALU_LSH,
+ S390_ALU_RSH,
+ S390_ALU_RSHA /* arithmetic */
+} s390_alu_t;
+
+
+/* The kind of unary integer operations */
+typedef enum {
+ S390_ZERO_EXTEND_8,
+ S390_ZERO_EXTEND_16,
+ S390_ZERO_EXTEND_32,
+ S390_SIGN_EXTEND_8,
+ S390_SIGN_EXTEND_16,
+ S390_SIGN_EXTEND_32,
+ S390_NEGATE
+} s390_unop_t;
+
+/* The kind of ternary BFP operations */
+typedef enum {
+ S390_BFP_MADD,
+ S390_BFP_MSUB,
+} s390_bfp_triop_t;
+
+/* The kind of binary BFP operations */
+typedef enum {
+ S390_BFP_ADD,
+ S390_BFP_SUB,
+ S390_BFP_MUL,
+ S390_BFP_DIV
+} s390_bfp_binop_t;
+
+
+/* The kind of unary BFP operations */
+typedef enum {
+ S390_BFP_ABS,
+ S390_BFP_NABS,
+ S390_BFP_NEG,
+ S390_BFP_SQRT,
+ S390_BFP_I32_TO_F32,
+ S390_BFP_I32_TO_F64,
+ S390_BFP_I32_TO_F128,
+ S390_BFP_I64_TO_F32,
+ S390_BFP_I64_TO_F64,
+ S390_BFP_I64_TO_F128,
+ S390_BFP_F32_TO_I32,
+ S390_BFP_F32_TO_I64,
+ S390_BFP_F32_TO_F64,
+ S390_BFP_F32_TO_F128,
+ S390_BFP_F64_TO_I32,
+ S390_BFP_F64_TO_I64,
+ S390_BFP_F64_TO_F32,
+ S390_BFP_F64_TO_F128,
+ S390_BFP_F128_TO_I32,
+ S390_BFP_F128_TO_I64,
+ S390_BFP_F128_TO_F32,
+ S390_BFP_F128_TO_F64
+} s390_bfp_unop_t;
+
+
+/* Condition code. The encoding of the enumerators matches the value of
+ the mask field in the various branch opcodes. */
+typedef enum {
+ S390_CC_NEVER= 0,
+ S390_CC_OVFL = 1, /* overflow */
+ S390_CC_H = 2, /* A > B ; high */
+ S390_CC_NLE = 3, /* not low or equal */
+ S390_CC_L = 4, /* A < B ; low */
+ S390_CC_NHE = 5, /* not high or equal */
+ S390_CC_LH = 6, /* low or high */
+ S390_CC_NE = 7, /* A != B ; not zero */
+ S390_CC_E = 8, /* A == B ; zero */
+ S390_CC_NLH = 9, /* not low or high */
+ S390_CC_HE = 10, /* A >= B ; high or equal*/
+ S390_CC_NL = 11, /* not low */
+ S390_CC_LE = 12, /* A <= B ; low or equal */
+ S390_CC_NH = 13, /* not high */
+ S390_CC_NO = 14, /* not overflow */
+ S390_CC_ALWAYS = 15
+} s390_cc_t;
+
+
+/* Rounding mode as it is encoded in the m3/m4 fields of certain
+ instructions (e.g. CFEBR) */
+typedef enum {
+/* S390_ROUND_NEAREST_AWAY = 1, not supported */
+ S390_ROUND_NEAREST_EVEN = 4,
+ S390_ROUND_ZERO = 5,
+ S390_ROUND_POSINF = 6,
+ S390_ROUND_NEGINF = 7
+} s390_round_t;
+
+
+/* Invert the condition code */
+static __inline__ s390_cc_t
+s390_cc_invert(s390_cc_t cond)
+{
+ return S390_CC_ALWAYS - cond;
+}
+
+
+typedef struct {
+ s390_insn_tag tag;
+ UChar size; /* size of the result in bytes */
+ union {
+ struct {
+ HReg dst;
+ s390_amode *src;
+ } load;
+ struct {
+ s390_amode *dst;
+ HReg src;
+ } store;
+ struct {
+ HReg dst;
+ HReg src;
+ } move;
+ struct {
+ s390_cc_t cond;
+ HReg dst;
+ s390_opnd_RMI src;
+ } cond_move;
+ struct {
+ HReg dst;
+ ULong value; /* not sign extended */
+ } load_immediate;
+ /* add, and, or, xor */
+ struct {
+ s390_alu_t tag;
+ HReg dst; /* op1 */
+ s390_opnd_RMI op2;
+ } alu;
+ struct {
+ Bool signed_multiply;
+ HReg dst_hi; /* r10 */
+ HReg dst_lo; /* also op1 r11 */
+ s390_opnd_RMI op2;
+ } mul;
+ struct {
+ Bool signed_divide;
+ HReg op1_hi; /* also remainder r10 */
+ HReg op1_lo; /* also quotient r11 */
+ s390_opnd_RMI op2;
+ } div;
+ struct {
+ HReg rem; /* remainder r10 */
+ HReg op1; /* also quotient r11 */
+ s390_opnd_RMI op2;
+ } divs;
+ struct {
+ HReg num_bits; /* number of leftmost '0' bits r10 */
+ HReg clobber; /* unspecified r11 */
+ s390_opnd_RMI src;
+ } clz;
+ struct {
+ s390_unop_t tag;
+ HReg dst;
+ s390_opnd_RMI src;
+ } unop;
+ struct {
+ Bool signed_comparison;
+ HReg src1;
+ s390_opnd_RMI src2;
+ } compare;
+ struct {
+ HReg dst; /* condition code in s390 encoding */
+ HReg op1;
+ HReg op2;
+ } bfp_compare;
+ struct {
+ s390_opnd_RMI src;
+ } test;
+ /* Convert the condition code to a boolean value. */
+ struct {
+ s390_cc_t cond;
+ HReg dst;
+ } cc2bool;
+ struct {
+ HReg op1;
+ s390_amode *op2;
+ HReg op3;
+ HReg old_mem;
+ } cas;
+ struct {
+ IRJumpKind kind;
+ s390_cc_t cond;
+ s390_opnd_RMI dst;
+ } branch;
+ /* Pseudo-insn for representing a helper call.
+ TARGET is the absolute address of the helper function
+ NUM_ARGS says how many arguments are being passed.
+ All arguments have integer type and are being passed according to ABI,
+ i.e. in registers r2, r3, r4, r5, and r6, with argument #0 being
+ passed in r2 and so forth. */
+ struct {
+ s390_cc_t cond;
+ Addr64 target;
+ UInt num_args;
+ HChar *name; /* callee's name (for debugging) */
+ } helper_call;
+ struct {
+ s390_bfp_triop_t tag;
+ s390_round_t rounding_mode;
+ HReg dst; /* first operand */
+ HReg op2; /* second operand */
+ HReg op3; /* third operand */
+ } bfp_triop;
+ struct {
+ s390_bfp_binop_t tag;
+ s390_round_t rounding_mode;
+ HReg dst; /* left operand */
+ HReg op2; /* right operand */
+ } bfp_binop;
+ struct {
+ s390_bfp_unop_t tag;
+ s390_round_t rounding_mode;
+ HReg dst; /* result */
+ HReg op; /* operand */
+ } bfp_unop;
+ struct {
+ s390_bfp_binop_t tag;
+ s390_round_t rounding_mode;
+ HReg dst_hi; /* left operand; high part */
+ HReg dst_lo; /* left operand; low part */
+ HReg op2_hi; /* right operand; high part */
+ HReg op2_lo; /* right operand; low part */
+ } bfp128_binop;
+ /* This variant is also used by the BFP128_CONVERT_TO and
+ BFP128_CONVERT_FROM insns. */
+ struct {
+ s390_bfp_unop_t tag;
+ s390_round_t rounding_mode;
+ HReg dst_hi; /* result; high part */
+ HReg dst_lo; /* result; low part */
+ HReg op_hi; /* operand; high part */
+ HReg op_lo; /* operand; low part */
+ } bfp128_unop;
+ struct {
+ HReg dst; /* condition code in s390 encoding */
+ HReg op1_hi; /* left operand; high part */
+ HReg op1_lo; /* left operand; low part */
+ HReg op2_hi; /* right operand; high part */
+ HReg op2_lo; /* right operand; low part */
+ } bfp128_compare;
+ } variant;
+} s390_insn;
+
+s390_insn *s390_insn_load(UChar size, HReg dst, s390_amode *src);
+s390_insn *s390_insn_store(UChar size, s390_amode *dst, HReg src);
+s390_insn *s390_insn_move(UChar size, HReg dst, HReg src);
+s390_insn *s390_insn_cond_move(UChar size, s390_cc_t cond, HReg dst,
+ s390_opnd_RMI src);
+s390_insn *s390_insn_load_immediate(UChar size, HReg dst, ULong val);
+s390_insn *s390_insn_alu(UChar size, s390_alu_t, HReg dst,
+ s390_opnd_RMI op2);
+s390_insn *s390_insn_mul(UChar size, HReg dst_hi, HReg dst_lo,
+ s390_opnd_RMI op2, Bool signed_multiply);
+s390_insn *s390_insn_div(UChar size, HReg op1_hi, HReg op1_lo,
+ s390_opnd_RMI op2, Bool signed_divide);
+s390_insn *s390_insn_divs(UChar size, HReg rem, HReg op1, s390_opnd_RMI op2);
+s390_insn *s390_insn_clz(UChar size, HReg num_bits, HReg clobber,
+ s390_opnd_RMI op);
+s390_insn *s390_insn_cas(UChar size, HReg op1, s390_amode *op2, HReg op3,
+ HReg old);
+s390_insn *s390_insn_unop(UChar size, s390_unop_t tag, HReg dst,
+ s390_opnd_RMI opnd);
+s390_insn *s390_insn_cc2bool(HReg dst, s390_cc_t src);
+s390_insn *s390_insn_test(UChar size, s390_opnd_RMI src);
+s390_insn *s390_insn_compare(UChar size, HReg dst, s390_opnd_RMI opnd,
+ Bool signed_comparison);
+s390_insn *s390_insn_branch(IRJumpKind jk, s390_cc_t cond, s390_opnd_RMI dst);
+s390_insn *s390_insn_helper_call(s390_cc_t cond, Addr64 target, UInt num_args,
+ HChar *name);
+s390_insn *s390_insn_bfp_triop(UChar size, s390_bfp_triop_t, HReg dst, HReg op2,
+ HReg op3, s390_round_t);
+s390_insn *s390_insn_bfp_binop(UChar size, s390_bfp_binop_t, HReg dst, HReg op2,
+ s390_round_t);
+s390_insn *s390_insn_bfp_unop(UChar size, s390_bfp_unop_t tag, HReg dst,
+ HReg op, s390_round_t);
+s390_insn *s390_insn_bfp_compare(UChar size, HReg dst, HReg op1, HReg op2);
+s390_insn *s390_insn_bfp128_binop(UChar size, s390_bfp_binop_t, HReg dst_hi,
+ HReg dst_lo, HReg op2_hi, HReg op2_lo,
+ s390_round_t);
+s390_insn *s390_insn_bfp128_unop(UChar size, s390_bfp_unop_t, HReg dst_hi,
+ HReg dst_lo, HReg op_hi, HReg op_lo,
+ s390_round_t);
+s390_insn *s390_insn_bfp128_compare(UChar size, HReg dst, HReg op1_hi,
+ HReg op1_lo, HReg op2_hi, HReg op2_lo);
+s390_insn *s390_insn_bfp128_convert_to(UChar size, s390_bfp_unop_t,
+ HReg dst_hi, HReg dst_lo, HReg op);
+s390_insn *s390_insn_bfp128_convert_from(UChar size, s390_bfp_unop_t,
+ HReg dst, HReg op_hi, HReg op_lo,
+ s390_round_t);
+s390_insn *s390_insn_mfence(void);
+UInt s390_insn_emit(UChar *buf, Int nbuf, const s390_insn *insn,
+ void *dispatch);
+
+const HChar *s390_insn_as_string(const s390_insn *);
+
+/*--------------------------------------------------------*/
+/* --- Interface exposed to VEX --- */
+/*--------------------------------------------------------*/
+
+void ppS390AMode(s390_amode *);
+void ppS390Instr(s390_insn *, Bool mode64);
+void ppHRegS390(HReg);
+
+/* Some functions that insulate the register allocator from details
+ of the underlying instruction set. */
+void getRegUsage_S390Instr( HRegUsage *, s390_insn *, Bool );
+void mapRegs_S390Instr ( HRegRemap *, s390_insn *, Bool );
+Bool isMove_S390Instr ( s390_insn *, HReg *, HReg * );
+Int emit_S390Instr ( UChar *, Int, s390_insn *, Bool,
+ void *, void * );
+void getAllocableRegs_S390( Int *, HReg **, Bool );
+void genSpill_S390 ( HInstr **, HInstr **, HReg , Int , Bool );
+void genReload_S390 ( HInstr **, HInstr **, HReg , Int , Bool );
+s390_insn *directReload_S390 ( s390_insn *, HReg, Short );
+HInstrArray *iselSB_S390 ( IRSB *, VexArch, VexArchInfo *, VexAbiInfo * );
+
+/* KLUDGE: See detailled comment in host_s390_defs.c. */
+extern const VexArchInfo *s390_archinfo_host;
+
+/* Convenience macros to test installed facilities */
+#define s390_host_has_ldisp \
+ (s390_archinfo_host->hwcaps & (VEX_HWCAPS_S390X_LDISP))
+#define s390_host_has_eimm \
+ (s390_archinfo_host->hwcaps & (VEX_HWCAPS_S390X_EIMM))
+#define s390_host_has_gie \
+ (s390_archinfo_host->hwcaps & (VEX_HWCAPS_S390X_GIE))
+#define s390_host_has_dfp \
+ (s390_archinfo_host->hwcaps & (VEX_HWCAPS_S390X_DFP))
+#define s390_host_has_fgx \
+ (s390_archinfo_host->hwcaps & (VEX_HWCAPS_S390X_FGX))
+
+#endif /* ndef __VEX_HOST_S390_DEFS_H */
+
+/*---------------------------------------------------------------*/
+/*--- end host_s390_defs.h ---*/
+/*---------------------------------------------------------------*/
diff --git a/main/VEX/priv/host_s390_disasm.c b/main/VEX/priv/host_s390_disasm.c
new file mode 100644
index 0000000..35f1010
--- /dev/null
+++ b/main/VEX/priv/host_s390_disasm.c
@@ -0,0 +1,463 @@
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+/*---------------------------------------------------------------*/
+/*--- begin host_s390_disasm.c ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* Contributed by Florian Krohm */
+
+#include <stdarg.h>
+#include "libvex_basictypes.h"
+#include "main_util.h" // vassert
+#include "main_globals.h" // vex_traceflags
+#include "host_s390_disasm.h"
+
+/* The format that is used to write out a mnemonic.
+ These should be declared as 'const HChar' but vex_printf needs
+ to be changed for that first */
+static HChar s390_mnm_fmt[] = "%-8s";
+
+
+/* Return the name of a general purpose register for dis-assembly purposes. */
+static const HChar *
+gpr_operand(UInt archreg)
+{
+ static const HChar names[16][5] = {
+ "%r0", "%r1", "%r2", "%r3",
+ "%r4", "%r5", "%r6", "%r7",
+ "%r8", "%r9", "%r10", "%r11",
+ "%r12", "%r13", "%r14", "%r15",
+ };
+
+ vassert(archreg < 16);
+
+ return names[archreg];
+}
+
+
+/* Return the name of a floating point register for dis-assembly purposes. */
+static const HChar *
+fpr_operand(UInt archreg)
+{
+ static const HChar names[16][5] = {
+ "%f0", "%f1", "%f2", "%f3",
+ "%f4", "%f5", "%f6", "%f7",
+ "%f8", "%f9", "%f10", "%f11",
+ "%f12", "%f13", "%f14", "%f15",
+ };
+
+ vassert(archreg < 16);
+
+ return names[archreg];
+}
+
+
+/* Return the name of an access register for dis-assembly purposes. */
+static const HChar *
+ar_operand(UInt archreg)
+{
+ static const HChar names[16][5] = {
+ "%a0", "%a1", "%a2", "%a3",
+ "%a4", "%a5", "%a6", "%a7",
+ "%a8", "%a9", "%a10", "%a11",
+ "%a12", "%a13", "%a14", "%a15",
+ };
+
+ vassert(archreg < 16);
+
+ return names[archreg];
+}
+
+
+/* Build and return the extended mnemonic for the compare and branch
+ opcodes as introduced by z10. See also the opcodes in file
+ opcodes/s390-opc.txt (from binutils) that have a '$' in their name. */
+static const HChar *
+cab_operand(const HChar *base, UInt mask)
+{
+ HChar *to;
+ const HChar *from;
+
+ static HChar buf[10]; /* Maximum is 6 + 2 */
+
+ static HChar *suffix[] = {
+ "", "h", "l", "ne", "e", "nl", "nh", ""
+ };
+
+ /* strcpy(buf, from); */
+ for (from = base, to = buf; *from; ++from, ++to) {
+ *to = *from;
+ }
+ /* strcat(buf, suffix); */
+ for (from = suffix[mask >> 1]; *from; ++from, ++to) {
+ *to = *from;
+ }
+ *to = '\0';
+
+ return buf;
+}
+
+/* Common function used to construct a mnemonic based on a condition code
+ mask. */
+static const HChar *
+construct_mnemonic(const HChar *prefix, const HChar *suffix, UInt mask)
+{
+ HChar *to;
+ const HChar *from;
+
+ static HChar buf[10];
+
+ static HChar mask_id[16][4] = {
+ "", /* 0 -> unused */
+ "o", "h", "nle", "l", "nhe", "lh", "ne",
+ "e", "nlh", "he", "nl", "le", "nh", "no",
+ "" /* 15 -> unused */
+ };
+
+ /* Guard against buffer overflow */
+ vassert(vex_strlen(prefix) + vex_strlen(suffix) + sizeof mask_id[0] <= sizeof buf);
+
+ /* strcpy(buf, prefix); */
+ for (from = prefix, to = buf; *from; ++from, ++to) {
+ *to = *from;
+ }
+ /* strcat(buf, mask_id); */
+ for (from = mask_id[mask]; *from; ++from, ++to) {
+ *to = *from;
+ }
+ /* strcat(buf, suffix); */
+ for (from = suffix; *from; ++from, ++to) {
+ *to = *from;
+ }
+ *to = '\0';
+
+ return buf;
+}
+
+
+/* Return the special mnemonic for the BCR opcode */
+static const HChar *
+bcr_operand(UInt m1)
+{
+ if (m1 == 0) return "nopr";
+ if (m1 == 15) return "br";
+
+ return construct_mnemonic("b", "r", m1);
+}
+
+
+/* Return the special mnemonic for the BC opcode */
+static const HChar *
+bc_operand(UInt m1)
+{
+ if (m1 == 0) return "nop";
+ if (m1 == 15) return "b";
+
+ return construct_mnemonic("b", "", m1);
+}
+
+
+/* Return the special mnemonic for the BRC opcode */
+static const HChar *
+brc_operand(UInt m1)
+{
+ if (m1 == 0) return "brc";
+ if (m1 == 15) return "j";
+
+ return construct_mnemonic("j", "", m1);
+}
+
+
+/* Return the special mnemonic for the BRCL opcode */
+static const HChar *
+brcl_operand(UInt m1)
+{
+ if (m1 == 0) return "brcl";
+ if (m1 == 15) return "jg";
+
+ return construct_mnemonic("jg", "", m1);
+}
+
+
+/* Return the special mnemonic for a conditional load/store opcode */
+static const HChar *
+cls_operand(Int kind, UInt mask)
+{
+ HChar *prefix;
+
+ switch (kind) {
+ case S390_XMNM_LOCR: prefix = "locr"; break;
+ case S390_XMNM_LOCGR: prefix = "locgr"; break;
+ case S390_XMNM_LOC: prefix = "loc"; break;
+ case S390_XMNM_LOCG: prefix = "locg"; break;
+ case S390_XMNM_STOC: prefix = "stoc"; break;
+ case S390_XMNM_STOCG: prefix = "stocg"; break;
+ default:
+ vpanic("cls_operand");
+ }
+
+ return construct_mnemonic(prefix, "", mask);
+}
+
+
+/* An operand with a base register, an index register, and a displacement.
+ If the displacement is signed, the rightmost 20 bit of D need to be
+ sign extended */
+static HChar *
+dxb_operand(HChar *p, UInt d, UInt x, UInt b, Bool displacement_is_signed)
+{
+ if (displacement_is_signed) {
+ Int displ = ((Int)d << 12) >> 12; /* sign extend */
+
+ p += vex_sprintf(p, "%d", displ);
+ } else {
+ p += vex_sprintf(p, "%u", d);
+ }
+ if (x != 0) {
+ p += vex_sprintf(p, "(%s", gpr_operand(x));
+ if (b != 0) {
+ p += vex_sprintf(p, ",%s", gpr_operand(b));
+ }
+ p += vex_sprintf(p, ")");
+ } else {
+ if (b != 0) {
+ p += vex_sprintf(p, "(%s)", gpr_operand(b));
+ }
+ }
+
+ return p;
+}
+
+
+/* An operand with base register, unsigned length, and a 12-bit
+ unsigned displacement */
+static HChar *
+udlb_operand(HChar *p, UInt d, UInt length, UInt b)
+{
+ p += vex_sprintf(p, "%u", d);
+ p += vex_sprintf(p, "(%u", length + 1); // actual length is +1
+ if (b != 0) {
+ p += vex_sprintf(p, ",%s", gpr_operand(b));
+ }
+ p += vex_sprintf(p, ")");
+
+ return p;
+}
+
+
+/* The first argument is the command that says how to write the disassembled
+ insn. It is understood that the mnemonic comes first and that arguments
+ are separated by a ','. The command holds the arguments. Each argument is
+ encoded using a 4-bit S390_ARG_xyz value. The first argument is placed
+ in the least significant bits of the command and so on. There are at most
+ 5 arguments in an insn and a sentinel (S390_ARG_DONE) is needed to identify
+ the end of the argument list. 6 * 4 = 24 bits are required for the
+ command. */
+void
+s390_disasm(UInt command, ...)
+{
+ va_list args;
+ unsigned argkind;
+ HChar buf[128]; /* holds the disassembled insn */
+ HChar *p;
+ HChar separator;
+ Int mask_suffix = -1;
+
+ va_start(args, command);
+
+ p = buf;
+ separator = 0;
+
+ while (42) {
+ argkind = command & 0xF;
+ command >>= 4;
+
+ if (argkind == S390_ARG_DONE) goto done;
+
+ if (argkind == S390_ARG_CABM) separator = 0; /* optional */
+
+ /* Write out the separator */
+ if (separator) *p++ = separator;
+
+ /* argument */
+ switch (argkind) {
+ case S390_ARG_MNM:
+ p += vex_sprintf(p, s390_mnm_fmt, va_arg(args, HChar *));
+ separator = ' ';
+ continue;
+
+ case S390_ARG_XMNM: {
+ UInt mask, kind;
+ const HChar *mnm;
+
+ kind = va_arg(args, UInt);
+
+ separator = ' ';
+ switch (kind) {
+ case S390_XMNM_BC:
+ case S390_XMNM_BCR:
+ mask = va_arg(args, UInt);
+ mnm = kind == S390_XMNM_BCR ? bcr_operand(mask) : bc_operand(mask);
+ p += vex_sprintf(p, s390_mnm_fmt, mnm);
+ /* mask == 0 is a NOP and has no argument */
+ if (mask == 0) goto done;
+ break;
+
+ case S390_XMNM_BRC:
+ case S390_XMNM_BRCL:
+ mask = va_arg(args, UInt);
+ mnm = kind == S390_XMNM_BRC ? brc_operand(mask) : brcl_operand(mask);
+ p += vex_sprintf(p, s390_mnm_fmt, mnm);
+
+ /* mask == 0 has no special mnemonic */
+ if (mask == 0) {
+ p += vex_sprintf(p, " 0");
+ separator = ',';
+ }
+ break;
+
+ case S390_XMNM_CAB:
+ mnm = va_arg(args, HChar *);
+ mask = va_arg(args, UInt);
+ p += vex_sprintf(p, s390_mnm_fmt, cab_operand(mnm, mask));
+ break;
+
+ case S390_XMNM_LOCR:
+ case S390_XMNM_LOCGR:
+ case S390_XMNM_LOC:
+ case S390_XMNM_LOCG:
+ case S390_XMNM_STOC:
+ case S390_XMNM_STOCG:
+ mask = va_arg(args, UInt);
+ mnm = cls_operand(kind, mask);
+ p += vex_sprintf(p, s390_mnm_fmt, mnm);
+ /* There are no special opcodes when mask == 0 or 15. In that case
+ the integer mask is appended as the final operand */
+ if (mask == 0 || mask == 15) mask_suffix = mask;
+ break;
+ }
+ }
+ continue;
+
+ case S390_ARG_GPR:
+ p += vex_sprintf(p, "%s", gpr_operand(va_arg(args, UInt)));
+ break;
+
+ case S390_ARG_FPR:
+ p += vex_sprintf(p, "%s", fpr_operand(va_arg(args, UInt)));
+ break;
+
+ case S390_ARG_AR:
+ p += vex_sprintf(p, "%s", ar_operand(va_arg(args, UInt)));
+ break;
+
+ case S390_ARG_UINT:
+ p += vex_sprintf(p, "%u", va_arg(args, UInt));
+ break;
+
+ case S390_ARG_INT:
+ p += vex_sprintf(p, "%d", (Int)(va_arg(args, UInt)));
+ break;
+
+ case S390_ARG_PCREL: {
+ Int offset = (Int)(va_arg(args, UInt));
+
+ /* Convert # halfwords to # bytes */
+ offset <<= 1;
+
+ if (offset < 0) {
+ p += vex_sprintf(p, ".%d", offset);
+ } else {
+ p += vex_sprintf(p, ".+%u", offset);
+ }
+ break;
+ }
+
+ case S390_ARG_SDXB: {
+ UInt dh, dl, x, b;
+
+ dh = va_arg(args, UInt);
+ dl = va_arg(args, UInt);
+ x = va_arg(args, UInt);
+ b = va_arg(args, UInt);
+
+ p = dxb_operand(p, (dh << 12) | dl, x, b, 1 /* signed_displacement */);
+ break;
+ }
+
+ case S390_ARG_UDXB: {
+ UInt d, x, b;
+
+ d = va_arg(args, UInt);
+ x = va_arg(args, UInt);
+ b = va_arg(args, UInt);
+
+ p = dxb_operand(p, d, x, b, 0 /* signed_displacement */);
+ break;
+ }
+
+ case S390_ARG_UDLB: {
+ UInt d, l, b;
+
+ d = va_arg(args, UInt);
+ l = va_arg(args, UInt);
+ b = va_arg(args, UInt);
+
+ p = udlb_operand(p, d, l, b);
+ break;
+ }
+
+ case S390_ARG_CABM: {
+ UInt mask;
+
+ mask = va_arg(args, UInt) & 0xE;
+ if (mask == 0 || mask == 14) {
+ p += vex_sprintf(p, ",%u", mask);
+ }
+ break;
+ }
+ }
+
+ separator = ',';
+ }
+
+ done:
+ va_end(args);
+
+ if (mask_suffix != -1)
+ p += vex_sprintf(p, ",%d", mask_suffix);
+ *p = '\0';
+
+ vassert(p < buf + sizeof buf); /* detect buffer overwrite */
+
+ /* Finally, write out the disassembled insn */
+ vex_printf("%s\n", buf);
+}
+
+/*---------------------------------------------------------------*/
+/*--- end host_s390_disasm.c ---*/
+/*---------------------------------------------------------------*/
diff --git a/main/VEX/priv/host_s390_disasm.h b/main/VEX/priv/host_s390_disasm.h
new file mode 100644
index 0000000..c01aa34
--- /dev/null
+++ b/main/VEX/priv/host_s390_disasm.h
@@ -0,0 +1,93 @@
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+/*---------------------------------------------------------------*/
+/*--- begin host_s390_disasm.h ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#ifndef __VEX_HOST_S390_DISASM_H
+#define __VEX_HOST_S390_DISASM_H
+
+#include "libvex_basictypes.h"
+
+/* Macros to encode a command for s390_disasm. */
+#undef P
+#define P(a) (S390_ARG_##a)
+#undef ENC1
+#define ENC1(a) ((P(DONE) << 4) | P(a))
+#undef ENC2
+#define ENC2(a,b) ((P(DONE) << 8) | (P(b) << 4) | P(a))
+#undef ENC3
+#define ENC3(a,b,c) ((P(DONE) << 12) | (P(c) << 8) | (P(b) << 4) | P(a))
+#undef ENC4
+#define ENC4(a,b,c,d) ((P(DONE) << 16) | (P(d) << 12) | (P(c) << 8) | \
+ (P(b) << 4) | P(a))
+#undef ENC5
+#define ENC5(a,b,c,d,e) ((P(DONE) << 20) | (P(e) << 16) | (P(d) << 12) | \
+ (P(c) << 8) | (P(b) << 4) | P(a))
+#undef ENC6
+#define ENC6(a,b,c,d,e,f) ((P(DONE) << 24) | (P(f) << 20) | (P(e) << 16) | \
+ (P(d) << 12) | (P(c) << 8) | (P(b) << 4) | P(a))
+
+/* The different kinds of operands in an asm insn */
+enum {
+ S390_ARG_DONE = 0,
+ S390_ARG_GPR = 1,
+ S390_ARG_FPR = 2,
+ S390_ARG_AR = 3,
+ S390_ARG_INT = 4,
+ S390_ARG_UINT = 5,
+ S390_ARG_PCREL = 6,
+ S390_ARG_SDXB = 7,
+ S390_ARG_UDXB = 8,
+ S390_ARG_UDLB = 9,
+ S390_ARG_CABM = 10,
+ S390_ARG_MNM = 11,
+ S390_ARG_XMNM = 12
+};
+
+/* The different kinds of extended mnemonics */
+enum {
+ S390_XMNM_CAB = 0,
+ S390_XMNM_BCR = 1,
+ S390_XMNM_BC = 2,
+ S390_XMNM_BRC = 3,
+ S390_XMNM_BRCL = 4,
+ S390_XMNM_LOCR = 5,
+ S390_XMNM_LOCGR = 6,
+ S390_XMNM_LOC = 7,
+ S390_XMNM_LOCG = 8,
+ S390_XMNM_STOC = 9,
+ S390_XMNM_STOCG = 10
+};
+
+void s390_disasm(UInt command, ...);
+
+/*---------------------------------------------------------------*/
+/*--- end host_s390_disasm.h ---*/
+/*---------------------------------------------------------------*/
+
+#endif /* __VEX_HOST_S390_DISASM_H */
diff --git a/main/VEX/priv/host_s390_isel.c b/main/VEX/priv/host_s390_isel.c
new file mode 100644
index 0000000..4cdf443
--- /dev/null
+++ b/main/VEX/priv/host_s390_isel.c
@@ -0,0 +1,2446 @@
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+/*---------------------------------------------------------------*/
+/*--- begin host_s390_isel.c ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* Contributed by Florian Krohm */
+
+#include "libvex_basictypes.h"
+#include "libvex_ir.h"
+#include "libvex.h"
+#include "libvex_s390x_common.h"
+
+#include "ir_match.h"
+#include "main_util.h"
+#include "main_globals.h"
+#include "host_generic_regs.h"
+#include "host_s390_defs.h"
+
+/*---------------------------------------------------------*/
+/*--- ISelEnv ---*/
+/*---------------------------------------------------------*/
+
+/* This carries around:
+
+ - A mapping from IRTemp to IRType, giving the type of any IRTemp we
+ might encounter. This is computed before insn selection starts,
+ and does not change.
+
+ - A mapping from IRTemp to HReg. This tells the insn selector
+ which virtual register(s) are associated with each IRTemp
+ temporary. This is computed before insn selection starts, and
+ does not change. We expect this mapping to map precisely the
+ same set of IRTemps as the type mapping does.
+
+ - vregmap holds the primary register for the IRTemp.
+ - vregmapHI holds the secondary register for the IRTemp,
+ if any is needed. That's only for Ity_I64 temps
+ in 32 bit mode or Ity_I128 temps in 64-bit mode.
+
+ - The code array, that is, the insns selected so far.
+
+ - A counter, for generating new virtual registers.
+
+ - The host subarchitecture we are selecting insns for.
+ This is set at the start and does not change.
+*/
+
+typedef struct {
+ IRTypeEnv *type_env;
+
+ HReg *vregmap;
+ HReg *vregmapHI;
+ UInt n_vregmap;
+
+ HInstrArray *code;
+
+ UInt vreg_ctr;
+
+ UInt hwcaps;
+
+} ISelEnv;
+
+
+/* Forward declarations */
+static HReg s390_isel_int_expr(ISelEnv *, IRExpr *);
+static s390_amode *s390_isel_amode(ISelEnv *, IRExpr *);
+static s390_cc_t s390_isel_cc(ISelEnv *, IRExpr *);
+static s390_opnd_RMI s390_isel_int_expr_RMI(ISelEnv *, IRExpr *);
+static void s390_isel_int128_expr(HReg *, HReg *, ISelEnv *, IRExpr *);
+static HReg s390_isel_float_expr(ISelEnv *, IRExpr *);
+static void s390_isel_float128_expr(HReg *, HReg *, ISelEnv *, IRExpr *);
+
+
+/* Add an instruction */
+static void
+addInstr(ISelEnv *env, s390_insn *insn)
+{
+ addHInstr(env->code, insn);
+
+ if (vex_traceflags & VEX_TRACE_VCODE) {
+ vex_printf("%s\n", s390_insn_as_string(insn));
+ }
+}
+
+
+static __inline__ IRExpr *
+mkU64(ULong value)
+{
+ return IRExpr_Const(IRConst_U64(value));
+}
+
+
+/*---------------------------------------------------------*/
+/*--- Registers ---*/
+/*---------------------------------------------------------*/
+
+/* Return the virtual register to which a given IRTemp is mapped. */
+static HReg
+lookupIRTemp(ISelEnv *env, IRTemp tmp)
+{
+ vassert(tmp < env->n_vregmap);
+ vassert(env->vregmap[tmp] != INVALID_HREG);
+
+ return env->vregmap[tmp];
+}
+
+
+/* Return the two virtual registers to which the IRTemp is mapped. */
+static void
+lookupIRTemp128(HReg *hi, HReg *lo, ISelEnv *env, IRTemp tmp)
+{
+ vassert(tmp < env->n_vregmap);
+ vassert(env->vregmapHI[tmp] != INVALID_HREG);
+
+ *lo = env->vregmap[tmp];
+ *hi = env->vregmapHI[tmp];
+}
+
+
+/* Allocate a new integer register */
+static HReg
+newVRegI(ISelEnv *env)
+{
+ HReg reg = mkHReg(env->vreg_ctr, HRcInt64, True /* virtual */ );
+ env->vreg_ctr++;
+
+ return reg;
+}
+
+
+/* Allocate a new floating point register */
+static HReg
+newVRegF(ISelEnv *env)
+{
+ HReg reg = mkHReg(env->vreg_ctr, HRcFlt64, True /* virtual */ );
+
+ env->vreg_ctr++;
+
+ return reg;
+}
+
+
+/* Construct a non-virtual general purpose register */
+static __inline__ HReg
+make_gpr(ISelEnv *env, UInt regno)
+{
+ return mkHReg(regno, HRcInt64, False /* virtual */ );
+}
+
+
+/* Construct a non-virtual floating point register */
+static __inline__ HReg
+make_fpr(UInt regno)
+{
+ return mkHReg(regno, HRcFlt64, False /* virtual */ );
+}
+
+
+/*---------------------------------------------------------*/
+/*--- Amode ---*/
+/*---------------------------------------------------------*/
+
+static __inline__ Bool
+ulong_fits_unsigned_12bit(ULong val)
+{
+ return (val & 0xFFFu) == val;
+}
+
+
+static __inline__ Bool
+ulong_fits_signed_20bit(ULong val)
+{
+ Long v = val & 0xFFFFFu;
+
+ v = (v << 44) >> 44; /* sign extend */
+
+ return val == (ULong)v;
+}
+
+
+/* EXPR is an expression that is used as an address. Return an s390_amode
+ for it. */
+static s390_amode *
+s390_isel_amode_wrk(ISelEnv *env, IRExpr *expr)
+{
+ if (expr->tag == Iex_Binop && expr->Iex.Binop.op == Iop_Add64) {
+ IRExpr *arg1 = expr->Iex.Binop.arg1;
+ IRExpr *arg2 = expr->Iex.Binop.arg2;
+
+ /* Move constant into right subtree */
+ if (arg1->tag == Iex_Const) {
+ IRExpr *tmp;
+ tmp = arg1;
+ arg1 = arg2;
+ arg2 = tmp;
+ }
+
+ /* r + constant: Check for b12 first, then b20 */
+ if (arg2->tag == Iex_Const && arg2->Iex.Const.con->tag == Ico_U64) {
+ ULong value = arg2->Iex.Const.con->Ico.U64;
+
+ if (ulong_fits_unsigned_12bit(value)) {
+ return s390_amode_b12((Int)value, s390_isel_int_expr(env, arg1));
+ }
+ /* If long-displacement is not available, do not construct B20 or
+ BX20 amodes because code generation cannot handle them. */
+ if (s390_host_has_ldisp && ulong_fits_signed_20bit(value)) {
+ return s390_amode_b20((Int)value, s390_isel_int_expr(env, arg1));
+ }
+ }
+ }
+
+ /* Doesn't match anything in particular. Generate it into
+ a register and use that. */
+ return s390_amode_b12(0, s390_isel_int_expr(env, expr));
+}
+
+
+static s390_amode *
+s390_isel_amode(ISelEnv *env, IRExpr *expr)
+{
+ s390_amode *am;
+
+ /* Address computation should yield a 64-bit value */
+ vassert(typeOfIRExpr(env->type_env, expr) == Ity_I64);
+
+ am = s390_isel_amode_wrk(env, expr);
+
+ /* Check post-condition */
+ vassert(s390_amode_is_sane(am));
+
+ return am;
+}
+
+
+/*---------------------------------------------------------*/
+/*--- Helper functions ---*/
+/*---------------------------------------------------------*/
+
+/* Constants and memory accesses should be right operands */
+#define order_commutative_operands(left, right) \
+ do { \
+ if (left->tag == Iex_Const || left->tag == Iex_Load || \
+ left->tag == Iex_Get) { \
+ IRExpr *tmp; \
+ tmp = left; \
+ left = right; \
+ right = tmp; \
+ } \
+ } while (0)
+
+
+/* Copy an RMI operand to the DST register */
+static s390_insn *
+s390_opnd_copy(UChar size, HReg dst, s390_opnd_RMI opnd)
+{
+ switch (opnd.tag) {
+ case S390_OPND_AMODE:
+ return s390_insn_load(size, dst, opnd.variant.am);
+
+ case S390_OPND_REG:
+ return s390_insn_move(size, dst, opnd.variant.reg);
+
+ case S390_OPND_IMMEDIATE:
+ return s390_insn_load_immediate(size, dst, opnd.variant.imm);
+
+ default:
+ vpanic("s390_opnd_copy");
+ }
+}
+
+
+/* Construct a RMI operand for a register */
+static __inline__ s390_opnd_RMI
+s390_opnd_reg(HReg reg)
+{
+ s390_opnd_RMI opnd;
+
+ opnd.tag = S390_OPND_REG;
+ opnd.variant.reg = reg;
+
+ return opnd;
+}
+
+
+/* Construct a RMI operand for an immediate constant */
+static __inline__ s390_opnd_RMI
+s390_opnd_imm(ULong value)
+{
+ s390_opnd_RMI opnd;
+
+ opnd.tag = S390_OPND_IMMEDIATE;
+ opnd.variant.imm = value;
+
+ return opnd;
+}
+
+
+/* Return 1, if EXPR represents the cosntant 0 */
+static int
+s390_expr_is_const_zero(IRExpr *expr)
+{
+ ULong value;
+
+ if (expr->tag == Iex_Const) {
+ switch (expr->Iex.Const.con->tag) {
+ case Ico_U1: value = expr->Iex.Const.con->Ico.U1; break;
+ case Ico_U8: value = expr->Iex.Const.con->Ico.U8; break;
+ case Ico_U16: value = expr->Iex.Const.con->Ico.U16; break;
+ case Ico_U32: value = expr->Iex.Const.con->Ico.U32; break;
+ case Ico_U64: value = expr->Iex.Const.con->Ico.U64; break;
+ default:
+ vpanic("s390_expr_is_const_zero");
+ }
+ return value == 0;
+ }
+
+ return 0;
+}
+
+
+/* Call a helper (clean or dirty)
+ Arguments must satisfy the following conditions:
+ (a) they are expressions yielding an integer result
+ (b) there can be no more than S390_NUM_GPRPARMS arguments
+ guard is a Ity_Bit expression indicating whether or not the
+ call happens. If guard==NULL, the call is unconditional.
+*/
+static void
+doHelperCall(ISelEnv *env, Bool passBBP, IRExpr *guard,
+ IRCallee *callee, IRExpr **args)
+{
+ UInt n_args, i, argreg, size;
+ ULong target;
+ HReg tmpregs[S390_NUM_GPRPARMS];
+ s390_cc_t cc;
+
+ n_args = 0;
+ for (i = 0; args[i]; i++)
+ ++n_args;
+
+ if (n_args > (S390_NUM_GPRPARMS - (passBBP ? 1 : 0))) {
+ vpanic("doHelperCall: too many arguments");
+ }
+
+ /* This is the "slow scheme". fixs390: implement the fast one */
+ argreg = 0;
+
+ /* If we need the guest state pointer put it in a temporary arg reg */
+ if (passBBP) {
+ tmpregs[argreg] = newVRegI(env);
+ addInstr(env, s390_insn_move(sizeof(ULong), tmpregs[argreg],
+ s390_hreg_guest_state_pointer()));
+ argreg++;
+ }
+
+ /* Compute the function arguments into a temporary register each */
+ for (i = 0; i < n_args; i++) {
+ tmpregs[argreg] = s390_isel_int_expr(env, args[i]);
+ argreg++;
+ }
+
+ /* Compute the condition */
+ cc = S390_CC_ALWAYS;
+ if (guard) {
+ if (guard->tag == Iex_Const
+ && guard->Iex.Const.con->tag == Ico_U1
+ && guard->Iex.Const.con->Ico.U1 == True) {
+ /* unconditional -- do nothing */
+ } else {
+ cc = s390_isel_cc(env, guard);
+ }
+ }
+
+ /* Move the args to the final register */
+ for (i = 0; i < argreg; i++) {
+ HReg finalreg;
+
+ finalreg = mkHReg(s390_gprno_from_arg_index(i), HRcInt64, False);
+ size = sizeofIRType(Ity_I64);
+ addInstr(env, s390_insn_move(size, finalreg, tmpregs[i]));
+ }
+
+ target = Ptr_to_ULong(callee->addr);
+
+ /* Finally, the call itself. */
+ addInstr(env, s390_insn_helper_call(cc, (Addr64)target, n_args,
+ callee->name));
+}
+
+
+/* Given an expression representing a rounding mode using IRRoundingMode
+ encoding convert it to an s390_round_t value. */
+static s390_round_t
+decode_rounding_mode(IRExpr *rounding_expr)
+{
+ if (rounding_expr->tag == Iex_Const &&
+ rounding_expr->Iex.Const.con->tag == Ico_U32) {
+ IRRoundingMode mode = rounding_expr->Iex.Const.con->Ico.U32;
+
+ switch (mode) {
+ case Irrm_NEAREST: return S390_ROUND_NEAREST_EVEN;
+ case Irrm_ZERO: return S390_ROUND_ZERO;
+ case Irrm_PosINF: return S390_ROUND_POSINF;
+ case Irrm_NegINF: return S390_ROUND_NEGINF;
+ }
+ }
+
+ vpanic("decode_rounding_mode");
+}
+
+
+/* CC_S390 holds the condition code in s390 encoding. Convert it to
+ VEX encoding
+
+ s390 VEX b6 b2 b0 cc.1 cc.0
+ 0 0x40 EQ 1 0 0 0 0
+ 1 0x01 LT 0 0 1 0 1
+ 2 0x00 GT 0 0 0 1 0
+ 3 0x45 Unordered 1 1 1 1 1
+
+ b0 = cc.0
+ b2 = cc.0 & cc.1
+ b6 = ~(cc.0 ^ cc.1) // ((cc.0 - cc.1) + 0x1 ) & 0x1
+
+ VEX = b0 | (b2 << 2) | (b6 << 6);
+*/
+static HReg
+convert_s390_fpcc_to_vex(ISelEnv *env, HReg cc_s390)
+{
+ HReg cc0, cc1, b2, b6, cc_vex;
+
+ cc0 = newVRegI(env);
+ addInstr(env, s390_insn_move(4, cc0, cc_s390));
+ addInstr(env, s390_insn_alu(4, S390_ALU_AND, cc0, s390_opnd_imm(1)));
+
+ cc1 = newVRegI(env);
+ addInstr(env, s390_insn_move(4, cc1, cc_s390));
+ addInstr(env, s390_insn_alu(4, S390_ALU_RSH, cc1, s390_opnd_imm(1)));
+
+ b2 = newVRegI(env);
+ addInstr(env, s390_insn_move(4, b2, cc0));
+ addInstr(env, s390_insn_alu(4, S390_ALU_AND, b2, s390_opnd_reg(cc1)));
+ addInstr(env, s390_insn_alu(4, S390_ALU_LSH, b2, s390_opnd_imm(2)));
+
+ b6 = newVRegI(env);
+ addInstr(env, s390_insn_move(4, b6, cc0));
+ addInstr(env, s390_insn_alu(4, S390_ALU_SUB, b6, s390_opnd_reg(cc1)));
+ addInstr(env, s390_insn_alu(4, S390_ALU_ADD, b6, s390_opnd_imm(1)));
+ addInstr(env, s390_insn_alu(4, S390_ALU_AND, b6, s390_opnd_imm(1)));
+ addInstr(env, s390_insn_alu(4, S390_ALU_LSH, b6, s390_opnd_imm(6)));
+
+ cc_vex = newVRegI(env);
+ addInstr(env, s390_insn_move(4, cc_vex, cc0));
+ addInstr(env, s390_insn_alu(4, S390_ALU_OR, cc_vex, s390_opnd_reg(b2)));
+ addInstr(env, s390_insn_alu(4, S390_ALU_OR, cc_vex, s390_opnd_reg(b6)));
+
+ return cc_vex;
+}
+
+
+/*---------------------------------------------------------*/
+/*--- ISEL: Integer expressions (128 bit) ---*/
+/*---------------------------------------------------------*/
+static void
+s390_isel_int128_expr_wrk(HReg *dst_hi, HReg *dst_lo, ISelEnv *env,
+ IRExpr *expr)
+{
+ IRType ty = typeOfIRExpr(env->type_env, expr);
+
+ vassert(ty == Ity_I128);
+
+ /* No need to consider the following
+ - 128-bit constants (they do not exist in VEX)
+ - 128-bit loads from memory (will not be generated)
+ */
+
+ /* Read 128-bit IRTemp */
+ if (expr->tag == Iex_RdTmp) {
+ lookupIRTemp128(dst_hi, dst_lo, env, expr->Iex.RdTmp.tmp);
+ return;
+ }
+
+ if (expr->tag == Iex_Binop) {
+ IRExpr *arg1 = expr->Iex.Binop.arg1;
+ IRExpr *arg2 = expr->Iex.Binop.arg2;
+ Bool is_signed_multiply, is_signed_divide;
+
+ switch (expr->Iex.Binop.op) {
+ case Iop_MullU64:
+ is_signed_multiply = False;
+ goto do_multiply64;
+
+ case Iop_MullS64:
+ is_signed_multiply = True;
+ goto do_multiply64;
+
+ case Iop_DivModU128to64:
+ is_signed_divide = False;
+ goto do_divide64;
+
+ case Iop_DivModS128to64:
+ is_signed_divide = True;
+ goto do_divide64;
+
+ case Iop_64HLto128:
+ *dst_hi = s390_isel_int_expr(env, arg1);
+ *dst_lo = s390_isel_int_expr(env, arg2);
+ return;
+
+ case Iop_DivModS64to64: {
+ HReg r10, r11, h1;
+ s390_opnd_RMI op2;
+
+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */
+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */
+
+ /* We use non-virtual registers r10 and r11 as pair */
+ r10 = make_gpr(env, 10);
+ r11 = make_gpr(env, 11);
+
+ /* Move 1st operand into r11 and */
+ addInstr(env, s390_insn_move(8, r11, h1));
+
+ /* Divide */
+ addInstr(env, s390_insn_divs(8, r10, r11, op2));
+
+ /* The result is in registers r10 (remainder) and r11 (quotient).
+ Move the result into the reg pair that is being returned such
+ such that the low 64 bits are the quotient and the upper 64 bits
+ are the remainder. (see libvex_ir.h). */
+ *dst_hi = newVRegI(env);
+ *dst_lo = newVRegI(env);
+ addInstr(env, s390_insn_move(8, *dst_hi, r10));
+ addInstr(env, s390_insn_move(8, *dst_lo, r11));
+ return;
+ }
+
+ default:
+ break;
+
+ do_multiply64: {
+ HReg r10, r11, h1;
+ s390_opnd_RMI op2;
+
+ order_commutative_operands(arg1, arg2);
+
+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */
+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */
+
+ /* We use non-virtual registers r10 and r11 as pair */
+ r10 = make_gpr(env, 10);
+ r11 = make_gpr(env, 11);
+
+ /* Move the first operand to r11 */
+ addInstr(env, s390_insn_move(8, r11, h1));
+
+ /* Multiply */
+ addInstr(env, s390_insn_mul(8, r10, r11, op2, is_signed_multiply));
+
+ /* The result is in registers r10 and r11. Assign to two virtual regs
+ and return. */
+ *dst_hi = newVRegI(env);
+ *dst_lo = newVRegI(env);
+ addInstr(env, s390_insn_move(8, *dst_hi, r10));
+ addInstr(env, s390_insn_move(8, *dst_lo, r11));
+ return;
+ }
+
+ do_divide64: {
+ HReg r10, r11, hi, lo;
+ s390_opnd_RMI op2;
+
+ s390_isel_int128_expr(&hi, &lo, env, arg1);
+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */
+
+ /* We use non-virtual registers r10 and r11 as pair */
+ r10 = make_gpr(env, 10);
+ r11 = make_gpr(env, 11);
+
+ /* Move high 64 bits of the 1st operand into r10 and
+ the low 64 bits into r11. */
+ addInstr(env, s390_insn_move(8, r10, hi));
+ addInstr(env, s390_insn_move(8, r11, lo));
+
+ /* Divide */
+ addInstr(env, s390_insn_div(8, r10, r11, op2, is_signed_divide));
+
+ /* The result is in registers r10 (remainder) and r11 (quotient).
+ Move the result into the reg pair that is being returned such
+ such that the low 64 bits are the quotient and the upper 64 bits
+ are the remainder. (see libvex_ir.h). */
+ *dst_hi = newVRegI(env);
+ *dst_lo = newVRegI(env);
+ addInstr(env, s390_insn_move(8, *dst_hi, r10));
+ addInstr(env, s390_insn_move(8, *dst_lo, r11));
+ return;
+ }
+ }
+ }
+
+ vpanic("s390_isel_int128_expr");
+}
+
+
+/* Compute a 128-bit value into two 64-bit registers. These may be either
+ real or virtual regs; in any case they must not be changed by subsequent
+ code emitted by the caller. */
+static void
+s390_isel_int128_expr(HReg *dst_hi, HReg *dst_lo, ISelEnv *env, IRExpr *expr)
+{
+ s390_isel_int128_expr_wrk(dst_hi, dst_lo, env, expr);
+
+ /* Sanity checks ... */
+ vassert(hregIsVirtual(*dst_hi));
+ vassert(hregIsVirtual(*dst_lo));
+ vassert(hregClass(*dst_hi) == HRcInt64);
+ vassert(hregClass(*dst_lo) == HRcInt64);
+}
+
+
+/*---------------------------------------------------------*/
+/*--- ISEL: Integer expressions (64/32/16/8 bit) ---*/
+/*---------------------------------------------------------*/
+
+/* Select insns for an integer-typed expression, and add them to the
+ code list. Return a reg holding the result. This reg will be a
+ virtual register. THE RETURNED REG MUST NOT BE MODIFIED. If you
+ want to modify it, ask for a new vreg, copy it in there, and modify
+ the copy. The register allocator will do its best to map both
+ vregs to the same real register, so the copies will often disappear
+ later in the game.
+
+ This should handle expressions of 64, 32, 16 and 8-bit type.
+ All results are returned in a 64bit register.
+ For 16- and 8-bit expressions, the upper (32/48/56 : 16/24) bits
+ are arbitrary, so you should mask or sign extend partial values
+ if necessary.
+*/
+
+/* DO NOT CALL THIS DIRECTLY ! */
+static HReg
+s390_isel_int_expr_wrk(ISelEnv *env, IRExpr *expr)
+{
+ IRType ty = typeOfIRExpr(env->type_env, expr);
+ UChar size;
+ s390_bfp_unop_t bfpop;
+
+ vassert(ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32 || ty == Ity_I64);
+
+ size = sizeofIRType(ty); /* size of the result after evaluating EXPR */
+
+ switch (expr->tag) {
+
+ /* --------- TEMP --------- */
+ case Iex_RdTmp:
+ /* Return the virtual register that holds the temporary. */
+ return lookupIRTemp(env, expr->Iex.RdTmp.tmp);
+
+ /* --------- LOAD --------- */
+ case Iex_Load: {
+ HReg dst = newVRegI(env);
+ s390_amode *am = s390_isel_amode(env, expr->Iex.Load.addr);
+
+ if (expr->Iex.Load.end != Iend_BE)
+ goto irreducible;
+
+ addInstr(env, s390_insn_load(size, dst, am));
+
+ return dst;
+ }
+
+ /* --------- BINARY OP --------- */
+ case Iex_Binop: {
+ IRExpr *arg1 = expr->Iex.Binop.arg1;
+ IRExpr *arg2 = expr->Iex.Binop.arg2;
+ HReg h1, res;
+ s390_alu_t opkind;
+ s390_opnd_RMI op2, value, opnd;
+ s390_insn *insn;
+ Bool is_commutative, is_signed_multiply, is_signed_divide;
+
+ is_commutative = True;
+
+ switch (expr->Iex.Binop.op) {
+ case Iop_MullU8:
+ case Iop_MullU16:
+ case Iop_MullU32:
+ is_signed_multiply = False;
+ goto do_multiply;
+
+ case Iop_MullS8:
+ case Iop_MullS16:
+ case Iop_MullS32:
+ is_signed_multiply = True;
+ goto do_multiply;
+
+ do_multiply: {
+ HReg r10, r11;
+ UInt arg_size = size / 2;
+
+ order_commutative_operands(arg1, arg2);
+
+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */
+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */
+
+ /* We use non-virtual registers r10 and r11 as pair */
+ r10 = make_gpr(env, 10);
+ r11 = make_gpr(env, 11);
+
+ /* Move the first operand to r11 */
+ addInstr(env, s390_insn_move(arg_size, r11, h1));
+
+ /* Multiply */
+ addInstr(env, s390_insn_mul(arg_size, r10, r11, op2, is_signed_multiply));
+
+ /* The result is in registers r10 and r11. Combine them into a SIZE-bit
+ value into the destination register. */
+ res = newVRegI(env);
+ addInstr(env, s390_insn_move(arg_size, res, r10));
+ value = s390_opnd_imm(arg_size * 8);
+ addInstr(env, s390_insn_alu(size, S390_ALU_LSH, res, value));
+ value = s390_opnd_imm((((ULong)1) << arg_size * 8) - 1);
+ addInstr(env, s390_insn_alu(size, S390_ALU_AND, r11, value));
+ opnd = s390_opnd_reg(r11);
+ addInstr(env, s390_insn_alu(size, S390_ALU_OR, res, opnd));
+ return res;
+ }
+
+ case Iop_DivModS64to32:
+ is_signed_divide = True;
+ goto do_divide;
+
+ case Iop_DivModU64to32:
+ is_signed_divide = False;
+ goto do_divide;
+
+ do_divide: {
+ HReg r10, r11;
+
+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */
+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */
+
+ /* We use non-virtual registers r10 and r11 as pair */
+ r10 = make_gpr(env, 10);
+ r11 = make_gpr(env, 11);
+
+ /* Split the first operand and put the high 32 bits into r10 and
+ the low 32 bits into r11. */
+ addInstr(env, s390_insn_move(8, r10, h1));
+ addInstr(env, s390_insn_move(8, r11, h1));
+ value = s390_opnd_imm(32);
+ addInstr(env, s390_insn_alu(8, S390_ALU_RSH, r10, value));
+
+ /* Divide */
+ addInstr(env, s390_insn_div(4, r10, r11, op2, is_signed_divide));
+
+ /* The result is in registers r10 (remainder) and r11 (quotient).
+ Combine them into a 64-bit value such that the low 32 bits are
+ the quotient and the upper 32 bits are the remainder. (see
+ libvex_ir.h). */
+ res = newVRegI(env);
+ addInstr(env, s390_insn_move(8, res, r10));
+ value = s390_opnd_imm(32);
+ addInstr(env, s390_insn_alu(8, S390_ALU_LSH, res, value));
+ value = s390_opnd_imm((((ULong)1) << 32) - 1);
+ addInstr(env, s390_insn_alu(8, S390_ALU_AND, r11, value));
+ opnd = s390_opnd_reg(r11);
+ addInstr(env, s390_insn_alu(8, S390_ALU_OR, res, opnd));
+ return res;
+ }
+
+ case Iop_F32toI32S: bfpop = S390_BFP_F32_TO_I32; goto do_convert;
+ case Iop_F32toI64S: bfpop = S390_BFP_F32_TO_I64; goto do_convert;
+ case Iop_F64toI32S: bfpop = S390_BFP_F64_TO_I32; goto do_convert;
+ case Iop_F64toI64S: bfpop = S390_BFP_F64_TO_I64; goto do_convert;
+ case Iop_F128toI32S: bfpop = S390_BFP_F128_TO_I32; goto do_convert_128;
+ case Iop_F128toI64S: bfpop = S390_BFP_F128_TO_I64; goto do_convert_128;
+
+ do_convert: {
+ s390_round_t rounding_mode;
+
+ res = newVRegI(env);
+ h1 = s390_isel_float_expr(env, arg2); /* Process operand */
+
+ rounding_mode = decode_rounding_mode(arg1);
+ addInstr(env, s390_insn_bfp_unop(size, bfpop, res, h1, rounding_mode));
+ return res;
+ }
+
+ do_convert_128: {
+ s390_round_t rounding_mode;
+ HReg op_hi, op_lo, f13, f15;
+
+ res = newVRegI(env);
+ s390_isel_float128_expr(&op_hi, &op_lo, env, arg2); /* operand */
+
+ /* We use non-virtual registers r13 and r15 as pair */
+ f13 = make_fpr(13);
+ f15 = make_fpr(15);
+
+ /* operand --> (f13, f15) */
+ addInstr(env, s390_insn_move(8, f13, op_hi));
+ addInstr(env, s390_insn_move(8, f15, op_lo));
+
+ rounding_mode = decode_rounding_mode(arg1);
+ addInstr(env, s390_insn_bfp128_convert_from(size, bfpop, res, f13, f15,
+ rounding_mode));
+ return res;
+ }
+
+ case Iop_8HLto16:
+ case Iop_16HLto32:
+ case Iop_32HLto64: {
+ HReg h2;
+ UInt arg_size = size / 2;
+
+ res = newVRegI(env);
+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */
+ h2 = s390_isel_int_expr(env, arg2); /* Process 2nd operand */
+
+ addInstr(env, s390_insn_move(arg_size, res, h1));
+ value = s390_opnd_imm(arg_size * 8);
+ addInstr(env, s390_insn_alu(size, S390_ALU_LSH, res, value));
+ value = s390_opnd_imm((((ULong)1) << arg_size * 8) - 1);
+ addInstr(env, s390_insn_alu(size, S390_ALU_AND, h2, value));
+ opnd = s390_opnd_reg(h2);
+ addInstr(env, s390_insn_alu(size, S390_ALU_OR, res, opnd));
+ return res;
+ }
+
+ case Iop_Max32U: {
+ /* arg1 > arg2 ? arg1 : arg2 using uint32_t arguments */
+ res = newVRegI(env);
+ h1 = s390_isel_int_expr(env, arg1);
+ op2 = s390_isel_int_expr_RMI(env, arg2);
+
+ addInstr(env, s390_insn_move(size, res, h1));
+ addInstr(env, s390_insn_compare(size, res, op2, False /* signed */));
+ addInstr(env, s390_insn_cond_move(size, S390_CC_L, res, op2));
+ return res;
+ }
+
+ case Iop_CmpF32:
+ case Iop_CmpF64: {
+ HReg cc_s390, h2;
+
+ h1 = s390_isel_float_expr(env, arg1);
+ h2 = s390_isel_float_expr(env, arg2);
+ cc_s390 = newVRegI(env);
+
+ size = (expr->Iex.Binop.op == Iop_CmpF32) ? 4 : 8;
+
+ addInstr(env, s390_insn_bfp_compare(size, cc_s390, h1, h2));
+
+ return convert_s390_fpcc_to_vex(env, cc_s390);
+ }
+
+ case Iop_CmpF128: {
+ HReg op1_hi, op1_lo, op2_hi, op2_lo, f12, f13, f14, f15, cc_s390;
+
+ s390_isel_float128_expr(&op1_hi, &op1_lo, env, arg1); /* 1st operand */
+ s390_isel_float128_expr(&op2_hi, &op2_lo, env, arg2); /* 2nd operand */
+ cc_s390 = newVRegI(env);
+
+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */
+ f12 = make_fpr(12);
+ f13 = make_fpr(13);
+ f14 = make_fpr(14);
+ f15 = make_fpr(15);
+
+ /* 1st operand --> (f12, f14) */
+ addInstr(env, s390_insn_move(8, f12, op1_hi));
+ addInstr(env, s390_insn_move(8, f14, op1_lo));
+
+ /* 2nd operand --> (f13, f15) */
+ addInstr(env, s390_insn_move(8, f13, op2_hi));
+ addInstr(env, s390_insn_move(8, f15, op2_lo));
+
+ res = newVRegI(env);
+ addInstr(env, s390_insn_bfp128_compare(16, cc_s390, f12, f14, f13, f15));
+
+ return convert_s390_fpcc_to_vex(env, cc_s390);
+ }
+
+ case Iop_Add8:
+ case Iop_Add16:
+ case Iop_Add32:
+ case Iop_Add64:
+ opkind = S390_ALU_ADD;
+ break;
+
+ case Iop_Sub8:
+ case Iop_Sub16:
+ case Iop_Sub32:
+ case Iop_Sub64:
+ opkind = S390_ALU_SUB;
+ is_commutative = False;
+ break;
+
+ case Iop_And8:
+ case Iop_And16:
+ case Iop_And32:
+ case Iop_And64:
+ opkind = S390_ALU_AND;
+ break;
+
+ case Iop_Or8:
+ case Iop_Or16:
+ case Iop_Or32:
+ case Iop_Or64:
+ opkind = S390_ALU_OR;
+ break;
+
+ case Iop_Xor8:
+ case Iop_Xor16:
+ case Iop_Xor32:
+ case Iop_Xor64:
+ opkind = S390_ALU_XOR;
+ break;
+
+ case Iop_Shl8:
+ case Iop_Shl16:
+ case Iop_Shl32:
+ case Iop_Shl64:
+ opkind = S390_ALU_LSH;
+ is_commutative = False;
+ break;
+
+ case Iop_Shr8:
+ case Iop_Shr16:
+ case Iop_Shr32:
+ case Iop_Shr64:
+ opkind = S390_ALU_RSH;
+ is_commutative = False;
+ break;
+
+ case Iop_Sar8:
+ case Iop_Sar16:
+ case Iop_Sar32:
+ case Iop_Sar64:
+ opkind = S390_ALU_RSHA;
+ is_commutative = False;
+ break;
+
+ default:
+ goto irreducible;
+ }
+
+ /* Pattern match: 0 - arg1 --> -arg1 */
+ if (opkind == S390_ALU_SUB && s390_expr_is_const_zero(arg1)) {
+ res = newVRegI(env);
+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */
+ insn = s390_insn_unop(size, S390_NEGATE, res, op2);
+ addInstr(env, insn);
+
+ return res;
+ }
+
+ if (is_commutative) {
+ order_commutative_operands(arg1, arg2);
+ }
+
+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */
+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */
+ res = newVRegI(env);
+ addInstr(env, s390_insn_move(size, res, h1));
+ insn = s390_insn_alu(size, opkind, res, op2);
+
+ addInstr(env, insn);
+
+ return res;
+ }
+
+ /* --------- UNARY OP --------- */
+ case Iex_Unop: {
+ static s390_opnd_RMI mask = { S390_OPND_IMMEDIATE };
+ static s390_opnd_RMI shift = { S390_OPND_IMMEDIATE };
+ s390_opnd_RMI opnd;
+ s390_insn *insn;
+ IRExpr *arg;
+ HReg dst, h1;
+ IROp unop, binop;
+
+ arg = expr->Iex.Unop.arg;
+
+ /* Special cases are handled here */
+
+ /* 32-bit multiply with 32-bit result or
+ 64-bit multiply with 64-bit result */
+ unop = expr->Iex.Unop.op;
+ binop = arg->Iex.Binop.op;
+
+ if ((arg->tag == Iex_Binop &&
+ ((unop == Iop_64to32 &&
+ (binop == Iop_MullS32 || binop == Iop_MullU32)) ||
+ (unop == Iop_128to64 &&
+ (binop == Iop_MullS64 || binop == Iop_MullU64))))) {
+ h1 = s390_isel_int_expr(env, arg->Iex.Binop.arg1); /* 1st opnd */
+ opnd = s390_isel_int_expr_RMI(env, arg->Iex.Binop.arg2); /* 2nd opnd */
+ dst = newVRegI(env); /* Result goes into a new register */
+ addInstr(env, s390_insn_move(size, dst, h1));
+ addInstr(env, s390_insn_alu(size, S390_ALU_MUL, dst, opnd));
+
+ return dst;
+ }
+
+ if (unop == Iop_ReinterpF64asI64) {
+ dst = newVRegI(env);
+ h1 = s390_isel_float_expr(env, arg); /* Process the operand */
+ addInstr(env, s390_insn_move(size, dst, h1));
+
+ return dst;
+ }
+
+ /* Expressions whose argument is 1-bit wide */
+ if (typeOfIRExpr(env->type_env, arg) == Ity_I1) {
+ s390_cc_t cond = s390_isel_cc(env, arg);
+ dst = newVRegI(env); /* Result goes into a new register */
+ addInstr(env, s390_insn_cc2bool(dst, cond));
+
+ switch (unop) {
+ case Iop_1Uto8:
+ case Iop_1Uto32:
+ case Iop_1Uto64:
+ /* Nothing to do */
+ break;
+
+ case Iop_1Sto8:
+ case Iop_1Sto16:
+ case Iop_1Sto32:
+ shift.variant.imm = 31;
+ addInstr(env, s390_insn_alu(4, S390_ALU_LSH, dst, shift));
+ addInstr(env, s390_insn_alu(4, S390_ALU_RSHA, dst, shift));
+ break;
+
+ case Iop_1Sto64:
+ shift.variant.imm = 63;
+ addInstr(env, s390_insn_alu(8, S390_ALU_LSH, dst, shift));
+ addInstr(env, s390_insn_alu(8, S390_ALU_RSHA, dst, shift));
+ break;
+
+ default:
+ goto irreducible;
+ }
+
+ return dst;
+ }
+
+ /* Regular processing */
+
+ if (unop == Iop_128to64) {
+ HReg dst_hi, dst_lo;
+
+ s390_isel_int128_expr(&dst_hi, &dst_lo, env, arg);
+ return dst_lo;
+ }
+
+ if (unop == Iop_128HIto64) {
+ HReg dst_hi, dst_lo;
+
+ s390_isel_int128_expr(&dst_hi, &dst_lo, env, arg);
+ return dst_hi;
+ }
+
+ dst = newVRegI(env); /* Result goes into a new register */
+ opnd = s390_isel_int_expr_RMI(env, arg); /* Process the operand */
+
+ switch (unop) {
+ case Iop_8Uto16:
+ case Iop_8Uto32:
+ case Iop_8Uto64:
+ insn = s390_insn_unop(size, S390_ZERO_EXTEND_8, dst, opnd);
+ break;
+
+ case Iop_16Uto32:
+ case Iop_16Uto64:
+ insn = s390_insn_unop(size, S390_ZERO_EXTEND_16, dst, opnd);
+ break;
+
+ case Iop_32Uto64:
+ insn = s390_insn_unop(size, S390_ZERO_EXTEND_32, dst, opnd);
+ break;
+
+ case Iop_8Sto16:
+ case Iop_8Sto32:
+ case Iop_8Sto64:
+ insn = s390_insn_unop(size, S390_SIGN_EXTEND_8, dst, opnd);
+ break;
+
+ case Iop_16Sto32:
+ case Iop_16Sto64:
+ insn = s390_insn_unop(size, S390_SIGN_EXTEND_16, dst, opnd);
+ break;
+
+ case Iop_32Sto64:
+ insn = s390_insn_unop(size, S390_SIGN_EXTEND_32, dst, opnd);
+ break;
+
+ case Iop_64to8:
+ case Iop_64to16:
+ case Iop_64to32:
+ case Iop_32to8:
+ case Iop_32to16:
+ case Iop_16to8:
+ /* Down-casts are no-ops. Upstream operations will only look at
+ the bytes that make up the result of the down-cast. So there
+ is no point setting the other bytes to 0. */
+ insn = s390_opnd_copy(8, dst, opnd);
+ break;
+
+ case Iop_64HIto32:
+ addInstr(env, s390_opnd_copy(8, dst, opnd));
+ shift.variant.imm = 32;
+ insn = s390_insn_alu(8, S390_ALU_RSH, dst, shift);
+ break;
+
+ case Iop_32HIto16:
+ addInstr(env, s390_opnd_copy(4, dst, opnd));
+ shift.variant.imm = 16;
+ insn = s390_insn_alu(4, S390_ALU_RSH, dst, shift);
+ break;
+
+ case Iop_16HIto8:
+ addInstr(env, s390_opnd_copy(2, dst, opnd));
+ shift.variant.imm = 8;
+ insn = s390_insn_alu(2, S390_ALU_RSH, dst, shift);
+ break;
+
+ case Iop_Not8:
+ case Iop_Not16:
+ case Iop_Not32:
+ case Iop_Not64:
+ /* XOR with ffff... */
+ mask.variant.imm = ~(ULong)0;
+ addInstr(env, s390_opnd_copy(size, dst, opnd));
+ insn = s390_insn_alu(size, S390_ALU_XOR, dst, mask);
+ break;
+
+ case Iop_Left8:
+ case Iop_Left16:
+ case Iop_Left32:
+ case Iop_Left64:
+ addInstr(env, s390_insn_unop(size, S390_NEGATE, dst, opnd));
+ insn = s390_insn_alu(size, S390_ALU_OR, dst, opnd);
+ break;
+
+ case Iop_CmpwNEZ32:
+ case Iop_CmpwNEZ64: {
+ /* Use the fact that x | -x == 0 iff x == 0. Otherwise, either X
+ or -X will have a 1 in the MSB. */
+ addInstr(env, s390_insn_unop(size, S390_NEGATE, dst, opnd));
+ addInstr(env, s390_insn_alu(size, S390_ALU_OR, dst, opnd));
+ shift.variant.imm = (unop == Iop_CmpwNEZ32) ? 31 : 63;
+ addInstr(env, s390_insn_alu(size, S390_ALU_RSHA, dst, shift));
+ return dst;
+ }
+
+ case Iop_Clz64: {
+ HReg r10, r11;
+
+ /* This will be implemented using FLOGR, if possible. So we need to
+ set aside a pair of non-virtual registers. The result (number of
+ left-most zero bits) will be in r10. The value in r11 is unspecified
+ and must not be used. */
+ r10 = make_gpr(env, 10);
+ r11 = make_gpr(env, 11);
+
+ addInstr(env, s390_insn_clz(8, r10, r11, opnd));
+ addInstr(env, s390_insn_move(8, dst, r10));
+ return dst;
+ }
+
+ default:
+ goto irreducible;
+ }
+
+ addInstr(env, insn);
+
+ return dst;
+ }
+
+ /* --------- GET --------- */
+ case Iex_Get: {
+ HReg dst = newVRegI(env);
+ s390_amode *am = s390_amode_for_guest_state(expr->Iex.Get.offset);
+
+ /* We never load more than 8 bytes from the guest state, because the
+ floating point register pair is not contiguous. */
+ vassert(size <= 8);
+
+ addInstr(env, s390_insn_load(size, dst, am));
+
+ return dst;
+ }
+
+ case Iex_GetI:
+ /* not needed */
+ break;
+
+ /* --------- CCALL --------- */
+ case Iex_CCall: {
+ HReg dst = newVRegI(env);
+
+ doHelperCall(env, False, NULL, expr->Iex.CCall.cee,
+ expr->Iex.CCall.args);
+
+ /* Move the returned value into the return register */
+ addInstr(env, s390_insn_move(sizeofIRType(expr->Iex.CCall.retty), dst,
+ mkHReg(S390_REGNO_RETURN_VALUE,
+ HRcInt64, False)));
+ return dst;
+ }
+
+ /* --------- LITERAL --------- */
+
+ /* Load a literal into a register. Create a "load immediate"
+ v-insn and return the register. */
+ case Iex_Const: {
+ ULong value;
+ HReg dst = newVRegI(env);
+ const IRConst *con = expr->Iex.Const.con;
+
+ /* Bitwise copy of the value. No sign/zero-extension */
+ switch (con->tag) {
+ case Ico_U64: value = con->Ico.U64; break;
+ case Ico_U32: value = con->Ico.U32; break;
+ case Ico_U16: value = con->Ico.U16; break;
+ case Ico_U8: value = con->Ico.U8; break;
+ default: vpanic("s390_isel_int_expr: invalid constant");
+ }
+
+ addInstr(env, s390_insn_load_immediate(size, dst, value));
+
+ return dst;
+ }
+
+ /* --------- MULTIPLEX --------- */
+ case Iex_Mux0X: {
+ IRExpr *cond_expr;
+ HReg dst, tmp, rX;
+ s390_opnd_RMI cond, r0, zero;
+
+ cond_expr = expr->Iex.Mux0X.cond;
+
+ dst = newVRegI(env);
+ r0 = s390_isel_int_expr_RMI(env, expr->Iex.Mux0X.expr0);
+ rX = s390_isel_int_expr(env, expr->Iex.Mux0X.exprX);
+ size = sizeofIRType(typeOfIRExpr(env->type_env, expr->Iex.Mux0X.exprX));
+
+ if (cond_expr->tag == Iex_Unop && cond_expr->Iex.Unop.op == Iop_1Uto8) {
+ s390_cc_t cc = s390_isel_cc(env, cond_expr->Iex.Unop.arg);
+
+ addInstr(env, s390_insn_move(size, dst, rX));
+ addInstr(env, s390_insn_cond_move(size, s390_cc_invert(cc), dst, r0));
+ return dst;
+ }
+
+ /* Assume the condition is true and move rX to the destination reg. */
+ addInstr(env, s390_insn_move(size, dst, rX));
+
+ /* Compute the condition ... */
+ cond = s390_isel_int_expr_RMI(env, cond_expr);
+
+ /* tmp = cond & 0xFF */
+ tmp = newVRegI(env);
+ addInstr(env, s390_insn_load_immediate(4, tmp, 0xFF));
+ addInstr(env, s390_insn_alu(4, S390_ALU_AND, tmp, cond));
+
+ /* ... and compare it with zero */
+ zero = s390_opnd_imm(0);
+ addInstr(env, s390_insn_compare(4, tmp, zero, 0 /* signed */));
+
+ /* ... and if it compared equal move r0 to the destination reg. */
+ size = sizeofIRType(typeOfIRExpr(env->type_env, expr->Iex.Mux0X.expr0));
+ addInstr(env, s390_insn_cond_move(size, S390_CC_E, dst, r0));
+
+ return dst;
+ }
+
+ default:
+ break;
+ }
+
+ /* We get here if no pattern matched. */
+ irreducible:
+ ppIRExpr(expr);
+ vpanic("s390_isel_int_expr: cannot reduce tree");
+}
+
+
+static HReg
+s390_isel_int_expr(ISelEnv *env, IRExpr *expr)
+{
+ HReg dst = s390_isel_int_expr_wrk(env, expr);
+
+ /* Sanity checks ... */
+ vassert(hregClass(dst) == HRcInt64);
+ vassert(hregIsVirtual(dst));
+
+ return dst;
+}
+
+
+static s390_opnd_RMI
+s390_isel_int_expr_RMI(ISelEnv *env, IRExpr *expr)
+{
+ IRType ty = typeOfIRExpr(env->type_env, expr);
+ s390_opnd_RMI dst;
+
+ vassert(ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32 ||
+ ty == Ity_I64);
+
+ if (expr->tag == Iex_Load) {
+ dst.tag = S390_OPND_AMODE;
+ dst.variant.am = s390_isel_amode(env, expr->Iex.Load.addr);
+ } else if (expr->tag == Iex_Get) {
+ dst.tag = S390_OPND_AMODE;
+ dst.variant.am = s390_amode_for_guest_state(expr->Iex.Get.offset);
+ } else if (expr->tag == Iex_Const) {
+ ULong value;
+
+ /* The bit pattern for the value will be stored as is in the least
+ significant bits of VALUE. */
+ switch (expr->Iex.Const.con->tag) {
+ case Ico_U1: value = expr->Iex.Const.con->Ico.U1; break;
+ case Ico_U8: value = expr->Iex.Const.con->Ico.U8; break;
+ case Ico_U16: value = expr->Iex.Const.con->Ico.U16; break;
+ case Ico_U32: value = expr->Iex.Const.con->Ico.U32; break;
+ case Ico_U64: value = expr->Iex.Const.con->Ico.U64; break;
+ default:
+ vpanic("s390_isel_int_expr_RMI");
+ }
+
+ dst.tag = S390_OPND_IMMEDIATE;
+ dst.variant.imm = value;
+ } else {
+ dst.tag = S390_OPND_REG;
+ dst.variant.reg = s390_isel_int_expr(env, expr);
+ }
+
+ return dst;
+}
+
+
+/*---------------------------------------------------------*/
+/*--- ISEL: Floating point expressions (128 bit) ---*/
+/*---------------------------------------------------------*/
+static void
+s390_isel_float128_expr_wrk(HReg *dst_hi, HReg *dst_lo, ISelEnv *env,
+ IRExpr *expr)
+{
+ IRType ty = typeOfIRExpr(env->type_env, expr);
+
+ vassert(ty == Ity_F128);
+
+ /* Read 128-bit IRTemp */
+ if (expr->tag == Iex_RdTmp) {
+ lookupIRTemp128(dst_hi, dst_lo, env, expr->Iex.RdTmp.tmp);
+ return;
+ }
+
+ switch (expr->tag) {
+ case Iex_RdTmp:
+ /* Return the virtual registers that hold the temporary. */
+ lookupIRTemp128(dst_hi, dst_lo, env, expr->Iex.RdTmp.tmp);
+ return;
+
+ /* --------- LOAD --------- */
+ case Iex_Load: {
+ IRExpr *addr_hi, *addr_lo;
+ s390_amode *am_hi, *am_lo;
+
+ if (expr->Iex.Load.end != Iend_BE)
+ goto irreducible;
+
+ addr_hi = expr->Iex.Load.addr;
+ addr_lo = IRExpr_Binop(Iop_Add64, addr_hi, mkU64(8));
+
+ am_hi = s390_isel_amode(env, addr_hi);
+ am_lo = s390_isel_amode(env, addr_lo);
+
+ *dst_hi = newVRegF(env);
+ *dst_lo = newVRegF(env);
+ addInstr(env, s390_insn_load(8, *dst_hi, am_hi));
+ addInstr(env, s390_insn_load(8, *dst_hi, am_lo));
+ return;
+ }
+
+
+ /* --------- GET --------- */
+ case Iex_Get:
+ /* This is not supported because loading 128-bit from the guest
+ state is almost certainly wrong. Use get_fpr_pair instead. */
+ vpanic("Iex_Get with F128 data");
+
+ /* --------- 4-ary OP --------- */
+ case Iex_Qop:
+ vpanic("Iex_Qop with F128 data");
+
+ /* --------- TERNARY OP --------- */
+ case Iex_Triop: {
+ IROp op = expr->Iex.Triop.op;
+ IRExpr *left = expr->Iex.Triop.arg2;
+ IRExpr *right = expr->Iex.Triop.arg3;
+ s390_bfp_binop_t bfpop;
+ s390_round_t rounding_mode;
+ HReg op1_hi, op1_lo, op2_hi, op2_lo, f12, f13, f14, f15;
+
+ s390_isel_float128_expr(&op1_hi, &op1_lo, env, left); /* 1st operand */
+ s390_isel_float128_expr(&op2_hi, &op2_lo, env, right); /* 2nd operand */
+
+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */
+ f12 = make_fpr(12);
+ f13 = make_fpr(13);
+ f14 = make_fpr(14);
+ f15 = make_fpr(15);
+
+ /* 1st operand --> (f12, f14) */
+ addInstr(env, s390_insn_move(8, f12, op1_hi));
+ addInstr(env, s390_insn_move(8, f14, op1_lo));
+
+ /* 2nd operand --> (f13, f15) */
+ addInstr(env, s390_insn_move(8, f13, op2_hi));
+ addInstr(env, s390_insn_move(8, f15, op2_lo));
+
+ switch (op) {
+ case Iop_AddF128: bfpop = S390_BFP_ADD; break;
+ case Iop_SubF128: bfpop = S390_BFP_SUB; break;
+ case Iop_MulF128: bfpop = S390_BFP_MUL; break;
+ case Iop_DivF128: bfpop = S390_BFP_DIV; break;
+ default:
+ goto irreducible;
+ }
+
+ rounding_mode = decode_rounding_mode(expr->Iex.Triop.arg1);
+ addInstr(env, s390_insn_bfp128_binop(16, bfpop, f12, f14, f13,
+ f15, rounding_mode));
+
+ /* Move result to virtual destination register */
+ *dst_hi = newVRegF(env);
+ *dst_lo = newVRegF(env);
+ addInstr(env, s390_insn_move(8, *dst_hi, f12));
+ addInstr(env, s390_insn_move(8, *dst_lo, f14));
+
+ return;
+ }
+
+ /* --------- BINARY OP --------- */
+ case Iex_Binop: {
+ HReg op_hi, op_lo, f12, f13, f14, f15;
+ s390_bfp_unop_t bfpop;
+ s390_round_t rounding_mode;
+
+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */
+ f12 = make_fpr(12);
+ f13 = make_fpr(13);
+ f14 = make_fpr(14);
+ f15 = make_fpr(15);
+
+ switch (expr->Iex.Binop.op) {
+ case Iop_SqrtF128:
+ s390_isel_float128_expr(&op_hi, &op_lo, env, expr->Iex.Binop.arg2);
+
+ /* operand --> (f13, f15) */
+ addInstr(env, s390_insn_move(8, f13, op_hi));
+ addInstr(env, s390_insn_move(8, f15, op_lo));
+
+ bfpop = S390_BFP_SQRT;
+ rounding_mode = decode_rounding_mode(expr->Iex.Binop.arg1);
+
+ addInstr(env, s390_insn_bfp128_unop(16, bfpop, f12, f14, f13, f15,
+ rounding_mode));
+
+ /* Move result to virtual destination registers */
+ *dst_hi = newVRegF(env);
+ *dst_lo = newVRegF(env);
+ addInstr(env, s390_insn_move(8, *dst_hi, f12));
+ addInstr(env, s390_insn_move(8, *dst_lo, f14));
+ return;
+
+ case Iop_F64HLtoF128:
+ *dst_hi = s390_isel_float_expr(env, expr->Iex.Binop.arg1);
+ *dst_lo = s390_isel_float_expr(env, expr->Iex.Binop.arg2);
+ return;
+
+ default:
+ goto irreducible;
+ }
+ }
+
+ /* --------- UNARY OP --------- */
+ case Iex_Unop: {
+ IRExpr *left = expr->Iex.Binop.arg1;
+ s390_bfp_unop_t bfpop;
+ s390_round_t rounding_mode;
+ HReg op_hi, op_lo, op, f12, f13, f14, f15;
+
+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */
+ f12 = make_fpr(12);
+ f13 = make_fpr(13);
+ f14 = make_fpr(14);
+ f15 = make_fpr(15);
+
+ switch (expr->Iex.Binop.op) {
+ case Iop_NegF128: bfpop = S390_BFP_NEG; goto float128_opnd;
+ case Iop_AbsF128: bfpop = S390_BFP_ABS; goto float128_opnd;
+ case Iop_I32StoF128: bfpop = S390_BFP_I32_TO_F128; goto convert_int;
+ case Iop_I64StoF128: bfpop = S390_BFP_I64_TO_F128; goto convert_int;
+ case Iop_F32toF128: bfpop = S390_BFP_F32_TO_F128; goto convert_float;
+ case Iop_F64toF128: bfpop = S390_BFP_F64_TO_F128; goto convert_float;
+ default:
+ goto irreducible;
+ }
+
+ float128_opnd:
+ s390_isel_float128_expr(&op_hi, &op_lo, env, left);
+
+ /* operand --> (f13, f15) */
+ addInstr(env, s390_insn_move(8, f13, op_hi));
+ addInstr(env, s390_insn_move(8, f15, op_lo));
+
+ rounding_mode = S390_ROUND_NEAREST_EVEN; /* will not be used later on */
+ addInstr(env, s390_insn_bfp128_unop(16, bfpop, f12, f14, f13, f15,
+ rounding_mode));
+ goto move_dst;
+
+ convert_float:
+ op = s390_isel_float_expr(env, left);
+ addInstr(env, s390_insn_bfp128_convert_to(16, bfpop, f12, f14,
+ op));
+ goto move_dst;
+
+ convert_int:
+ op = s390_isel_int_expr(env, left);
+ addInstr(env, s390_insn_bfp128_convert_to(16, bfpop, f12, f14,
+ op));
+ goto move_dst;
+
+ move_dst:
+ /* Move result to virtual destination registers */
+ *dst_hi = newVRegF(env);
+ *dst_lo = newVRegF(env);
+ addInstr(env, s390_insn_move(8, *dst_hi, f12));
+ addInstr(env, s390_insn_move(8, *dst_lo, f14));
+ return;
+ }
+
+ default:
+ goto irreducible;
+ }
+
+ /* We get here if no pattern matched. */
+ irreducible:
+ ppIRExpr(expr);
+ vpanic("s390_isel_int_expr: cannot reduce tree");
+}
+
+/* Compute a 128-bit value into two 64-bit registers. These may be either
+ real or virtual regs; in any case they must not be changed by subsequent
+ code emitted by the caller. */
+static void
+s390_isel_float128_expr(HReg *dst_hi, HReg *dst_lo, ISelEnv *env, IRExpr *expr)
+{
+ s390_isel_float128_expr_wrk(dst_hi, dst_lo, env, expr);
+
+ /* Sanity checks ... */
+ vassert(hregIsVirtual(*dst_hi));
+ vassert(hregIsVirtual(*dst_lo));
+ vassert(hregClass(*dst_hi) == HRcFlt64);
+ vassert(hregClass(*dst_lo) == HRcFlt64);
+}
+
+
+/*---------------------------------------------------------*/
+/*--- ISEL: Floating point expressions (64 bit) ---*/
+/*---------------------------------------------------------*/
+
+static HReg
+s390_isel_float_expr_wrk(ISelEnv *env, IRExpr *expr)
+{
+ IRType ty = typeOfIRExpr(env->type_env, expr);
+ UChar size;
+
+ vassert(ty == Ity_F32 || ty == Ity_F64);
+
+ size = sizeofIRType(ty);
+
+ switch (expr->tag) {
+ case Iex_RdTmp:
+ /* Return the virtual register that holds the temporary. */
+ return lookupIRTemp(env, expr->Iex.RdTmp.tmp);
+
+ /* --------- LOAD --------- */
+ case Iex_Load: {
+ HReg dst = newVRegF(env);
+ s390_amode *am = s390_isel_amode(env, expr->Iex.Load.addr);
+
+ if (expr->Iex.Load.end != Iend_BE)
+ goto irreducible;
+
+ addInstr(env, s390_insn_load(size, dst, am));
+
+ return dst;
+ }
+
+ /* --------- GET --------- */
+ case Iex_Get: {
+ HReg dst = newVRegF(env);
+ s390_amode *am = s390_amode_for_guest_state(expr->Iex.Get.offset);
+
+ addInstr(env, s390_insn_load(size, dst, am));
+
+ return dst;
+ }
+
+ /* --------- LITERAL --------- */
+
+ /* Load a literal into a register. Create a "load immediate"
+ v-insn and return the register. */
+ case Iex_Const: {
+ ULong value;
+ HReg dst = newVRegF(env);
+ const IRConst *con = expr->Iex.Const.con;
+
+ /* Bitwise copy of the value. No sign/zero-extension */
+ switch (con->tag) {
+ case Ico_F32i: value = con->Ico.F32i; break;
+ case Ico_F64i: value = con->Ico.F64i; break;
+ default: vpanic("s390_isel_float_expr: invalid constant");
+ }
+
+ if (value != 0) vpanic("cannot load immediate floating point constant");
+
+ addInstr(env, s390_insn_load_immediate(size, dst, value));
+
+ return dst;
+ }
+
+ /* --------- 4-ary OP --------- */
+ case Iex_Qop: {
+ HReg op1, op2, op3, dst;
+ s390_bfp_triop_t bfpop;
+ s390_round_t rounding_mode;
+
+ op1 = s390_isel_float_expr(env, expr->Iex.Qop.arg2);
+ op2 = s390_isel_float_expr(env, expr->Iex.Qop.arg3);
+ op3 = s390_isel_float_expr(env, expr->Iex.Qop.arg4);
+ dst = newVRegF(env);
+ addInstr(env, s390_insn_move(size, dst, op1));
+
+ switch (expr->Iex.Qop.op) {
+ case Iop_MAddF32:
+ case Iop_MAddF64: bfpop = S390_BFP_MADD; break;
+ case Iop_MSubF32:
+ case Iop_MSubF64: bfpop = S390_BFP_MSUB; break;
+
+ default:
+ goto irreducible;
+ }
+
+ rounding_mode = decode_rounding_mode(expr->Iex.Qop.arg1);
+ addInstr(env, s390_insn_bfp_triop(size, bfpop, dst, op2, op3,
+ rounding_mode));
+ return dst;
+ }
+
+ /* --------- TERNARY OP --------- */
+ case Iex_Triop: {
+ IROp op = expr->Iex.Triop.op;
+ IRExpr *left = expr->Iex.Triop.arg2;
+ IRExpr *right = expr->Iex.Triop.arg3;
+ s390_bfp_binop_t bfpop;
+ s390_round_t rounding_mode;
+ HReg h1, op2, dst;
+
+ h1 = s390_isel_float_expr(env, left); /* Process 1st operand */
+ op2 = s390_isel_float_expr(env, right); /* Process 2nd operand */
+ dst = newVRegF(env);
+ addInstr(env, s390_insn_move(size, dst, h1));
+ switch (op) {
+ case Iop_AddF32:
+ case Iop_AddF64: bfpop = S390_BFP_ADD; break;
+ case Iop_SubF32:
+ case Iop_SubF64: bfpop = S390_BFP_SUB; break;
+ case Iop_MulF32:
+ case Iop_MulF64: bfpop = S390_BFP_MUL; break;
+ case Iop_DivF32:
+ case Iop_DivF64: bfpop = S390_BFP_DIV; break;
+
+ default:
+ goto irreducible;
+ }
+
+ rounding_mode = decode_rounding_mode(expr->Iex.Triop.arg1);
+ addInstr(env, s390_insn_bfp_binop(size, bfpop, dst, op2, rounding_mode));
+ return dst;
+ }
+
+ /* --------- BINARY OP --------- */
+ case Iex_Binop: {
+ IROp op = expr->Iex.Binop.op;
+ IRExpr *left = expr->Iex.Binop.arg2;
+ HReg h1, dst;
+ s390_bfp_unop_t bfpop;
+ s390_round_t rounding_mode;
+ Int integer_operand;
+
+ integer_operand = 1;
+
+ switch (op) {
+ case Iop_SqrtF32:
+ case Iop_SqrtF64:
+ bfpop = S390_BFP_SQRT;
+ integer_operand = 0;
+ break;
+
+ case Iop_F64toF32:
+ bfpop = S390_BFP_F64_TO_F32;
+ integer_operand = 0;
+ break;
+
+ case Iop_I32StoF32: bfpop = S390_BFP_I32_TO_F32; break;
+ case Iop_I64StoF32: bfpop = S390_BFP_I64_TO_F32; break;
+ case Iop_I64StoF64: bfpop = S390_BFP_I64_TO_F64; break;
+ default:
+ goto irreducible;
+
+ case Iop_F128toF64:
+ case Iop_F128toF32: {
+ HReg op_hi, op_lo, f12, f13, f14, f15;
+
+ bfpop = op == Iop_F128toF32 ? S390_BFP_F128_TO_F32
+ : S390_BFP_F128_TO_F64;
+
+ rounding_mode = decode_rounding_mode(expr->Iex.Binop.arg1);
+
+ s390_isel_float128_expr(&op_hi, &op_lo, env, expr->Iex.Binop.arg2);
+
+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */
+ f12 = make_fpr(12);
+ f13 = make_fpr(13);
+ f14 = make_fpr(14);
+ f15 = make_fpr(15);
+
+ /* operand --> (f13, f15) */
+ addInstr(env, s390_insn_move(8, f13, op_hi));
+ addInstr(env, s390_insn_move(8, f15, op_lo));
+
+ dst = newVRegF(env);
+ addInstr(env, s390_insn_bfp128_unop(16, bfpop, f12, f14, f13, f15,
+ rounding_mode));
+
+ /* Move result to virtual destination registers */
+ addInstr(env, s390_insn_move(8, dst, f12));
+ return dst;
+ }
+ }
+
+ /* Process operand */
+ if (integer_operand) {
+ h1 = s390_isel_int_expr(env, left);
+ } else {
+ h1 = s390_isel_float_expr(env, left);
+ }
+
+ dst = newVRegF(env);
+ rounding_mode = decode_rounding_mode(expr->Iex.Binop.arg1);
+ addInstr(env, s390_insn_bfp_unop(size, bfpop, dst, h1, rounding_mode));
+ return dst;
+ }
+
+ /* --------- UNARY OP --------- */
+ case Iex_Unop: {
+ IROp op = expr->Iex.Unop.op;
+ IRExpr *left = expr->Iex.Unop.arg;
+ s390_bfp_unop_t bfpop;
+ s390_round_t rounding_mode;
+ HReg h1, dst;
+
+ if (op == Iop_F128HItoF64 || op == Iop_F128LOtoF64) {
+ HReg dst_hi, dst_lo;
+
+ s390_isel_float128_expr(&dst_hi, &dst_lo, env, left);
+ return op == Iop_F128LOtoF64 ? dst_lo : dst_hi;
+ }
+
+ if (op == Iop_ReinterpI64asF64) {
+ dst = newVRegF(env);
+ h1 = s390_isel_int_expr(env, left); /* Process the operand */
+ addInstr(env, s390_insn_move(size, dst, h1));
+
+ return dst;
+ }
+
+ switch (op) {
+ case Iop_NegF32:
+ case Iop_NegF64:
+ if (left->tag == Iex_Unop &&
+ (left->Iex.Unop.op == Iop_AbsF32 || left->Iex.Unop.op == Iop_AbsF64))
+ bfpop = S390_BFP_NABS;
+ else
+ bfpop = S390_BFP_NEG;
+ break;
+
+ case Iop_AbsF32:
+ case Iop_AbsF64: bfpop = S390_BFP_ABS; break;
+ case Iop_I32StoF64: bfpop = S390_BFP_I32_TO_F64; break;
+ case Iop_F32toF64: bfpop = S390_BFP_F32_TO_F64; break;
+ default:
+ goto irreducible;
+ }
+
+ /* Process operand */
+ if (op == Iop_I32StoF64)
+ h1 = s390_isel_int_expr(env, left);
+ else if (bfpop == S390_BFP_NABS)
+ h1 = s390_isel_float_expr(env, left->Iex.Unop.arg);
+ else
+ h1 = s390_isel_float_expr(env, left);
+
+ dst = newVRegF(env);
+ rounding_mode = S390_ROUND_NEAREST_EVEN; /* will not be used later on */
+ addInstr(env, s390_insn_bfp_unop(size, bfpop, dst, h1, rounding_mode));
+ return dst;
+ }
+
+ default:
+ goto irreducible;
+ }
+
+ /* We get here if no pattern matched. */
+ irreducible:
+ ppIRExpr(expr);
+ vpanic("s390_isel_float_expr: cannot reduce tree");
+}
+
+
+static HReg
+s390_isel_float_expr(ISelEnv *env, IRExpr *expr)
+{
+ HReg dst = s390_isel_float_expr_wrk(env, expr);
+
+ /* Sanity checks ... */
+ vassert(hregClass(dst) == HRcFlt64);
+ vassert(hregIsVirtual(dst));
+
+ return dst;
+}
+
+
+/*---------------------------------------------------------*/
+/*--- ISEL: Condition Code ---*/
+/*---------------------------------------------------------*/
+
+/* This function handles all operators that produce a 1-bit result */
+static s390_cc_t
+s390_isel_cc(ISelEnv *env, IRExpr *cond)
+{
+ UChar size;
+
+ vassert(typeOfIRExpr(env->type_env, cond) == Ity_I1);
+
+ /* Constant: either 1 or 0 */
+ if (cond->tag == Iex_Const) {
+ vassert(cond->Iex.Const.con->tag == Ico_U1);
+ vassert(cond->Iex.Const.con->Ico.U1 == True
+ || cond->Iex.Const.con->Ico.U1 == False);
+
+ return cond->Iex.Const.con->Ico.U1 == True ? S390_CC_ALWAYS : S390_CC_NEVER;
+ }
+
+ /* Variable: values are 1 or 0 */
+ if (cond->tag == Iex_RdTmp) {
+ IRTemp tmp = cond->Iex.RdTmp.tmp;
+ HReg reg = lookupIRTemp(env, tmp);
+
+ /* Load-and-test does not modify REG; so this is OK. */
+ if (typeOfIRTemp(env->type_env, tmp) == Ity_I1)
+ size = 4;
+ else
+ size = sizeofIRType(typeOfIRTemp(env->type_env, tmp));
+ addInstr(env, s390_insn_test(size, s390_opnd_reg(reg)));
+ return S390_CC_NE;
+ }
+
+ /* Unary operators */
+ if (cond->tag == Iex_Unop) {
+ IRExpr *arg = cond->Iex.Unop.arg;
+
+ switch (cond->Iex.Unop.op) {
+ case Iop_Not1: /* Not1(cond) */
+ /* Generate code for EXPR, and negate the test condition */
+ return s390_cc_invert(s390_isel_cc(env, arg));
+
+ /* Iop_32/64to1 select the LSB from their operand */
+ case Iop_32to1:
+ case Iop_64to1: {
+ HReg dst = s390_isel_int_expr(env, arg);
+
+ size = sizeofIRType(typeOfIRExpr(env->type_env, arg));
+
+ addInstr(env, s390_insn_alu(size, S390_ALU_AND, dst, s390_opnd_imm(1)));
+ addInstr(env, s390_insn_test(size, s390_opnd_reg(dst)));
+ return S390_CC_NE;
+ }
+
+ case Iop_CmpNEZ8:
+ case Iop_CmpNEZ16: {
+ s390_opnd_RMI src;
+ s390_unop_t op;
+ HReg dst;
+
+ op = (cond->Iex.Unop.op == Iop_CmpNEZ8) ? S390_ZERO_EXTEND_8
+ : S390_ZERO_EXTEND_16;
+ dst = newVRegI(env);
+ src = s390_isel_int_expr_RMI(env, arg);
+ addInstr(env, s390_insn_unop(4, op, dst, src));
+ addInstr(env, s390_insn_test(4, s390_opnd_reg(dst)));
+ return S390_CC_NE;
+ }
+
+ case Iop_CmpNEZ32:
+ case Iop_CmpNEZ64: {
+ s390_opnd_RMI src;
+
+ src = s390_isel_int_expr_RMI(env, arg);
+ size = sizeofIRType(typeOfIRExpr(env->type_env, arg));
+ addInstr(env, s390_insn_test(size, src));
+ return S390_CC_NE;
+ }
+
+ default:
+ goto fail;
+ }
+ }
+
+ /* Binary operators */
+ if (cond->tag == Iex_Binop) {
+ IRExpr *arg1 = cond->Iex.Binop.arg1;
+ IRExpr *arg2 = cond->Iex.Binop.arg2;
+ HReg reg1, reg2;
+
+ size = sizeofIRType(typeOfIRExpr(env->type_env, arg1));
+
+ switch (cond->Iex.Binop.op) {
+ s390_unop_t op;
+ s390_cc_t result;
+
+ case Iop_CmpEQ8:
+ case Iop_CasCmpEQ8:
+ op = S390_ZERO_EXTEND_8;
+ result = S390_CC_E;
+ goto do_compare_ze;
+
+ case Iop_CmpNE8:
+ case Iop_CasCmpNE8:
+ op = S390_ZERO_EXTEND_8;
+ result = S390_CC_NE;
+ goto do_compare_ze;
+
+ case Iop_CmpEQ16:
+ case Iop_CasCmpEQ16:
+ op = S390_ZERO_EXTEND_16;
+ result = S390_CC_E;
+ goto do_compare_ze;
+
+ case Iop_CmpNE16:
+ case Iop_CasCmpNE16:
+ op = S390_ZERO_EXTEND_16;
+ result = S390_CC_NE;
+ goto do_compare_ze;
+
+ do_compare_ze: {
+ s390_opnd_RMI op1, op2;
+
+ op1 = s390_isel_int_expr_RMI(env, arg1);
+ reg1 = newVRegI(env);
+ addInstr(env, s390_insn_unop(4, op, reg1, op1));
+
+ op2 = s390_isel_int_expr_RMI(env, arg2);
+ reg2 = newVRegI(env);
+ addInstr(env, s390_insn_unop(4, op, reg2, op2)); /* zero extend */
+
+ op2 = s390_opnd_reg(reg2);
+ addInstr(env, s390_insn_compare(4, reg1, op2, False));
+
+ return result;
+ }
+
+ case Iop_CmpEQ32:
+ case Iop_CmpEQ64:
+ case Iop_CasCmpEQ32:
+ case Iop_CasCmpEQ64:
+ result = S390_CC_E;
+ goto do_compare;
+
+ case Iop_CmpNE32:
+ case Iop_CmpNE64:
+ case Iop_CasCmpNE32:
+ case Iop_CasCmpNE64:
+ result = S390_CC_NE;
+ goto do_compare;
+
+ do_compare: {
+ HReg op1;
+ s390_opnd_RMI op2;
+
+ order_commutative_operands(arg1, arg2);
+
+ op1 = s390_isel_int_expr(env, arg1);
+ op2 = s390_isel_int_expr_RMI(env, arg2);
+
+ addInstr(env, s390_insn_compare(size, op1, op2, False));
+
+ return result;
+ }
+
+ case Iop_CmpLT32S:
+ case Iop_CmpLE32S:
+ case Iop_CmpLT64S:
+ case Iop_CmpLE64S: {
+ HReg op1;
+ s390_opnd_RMI op2;
+
+ op1 = s390_isel_int_expr(env, arg1);
+ op2 = s390_isel_int_expr_RMI(env, arg2);
+
+ addInstr(env, s390_insn_compare(size, op1, op2, True));
+
+ return (cond->Iex.Binop.op == Iop_CmpLT32S ||
+ cond->Iex.Binop.op == Iop_CmpLT64S) ? S390_CC_L : S390_CC_LE;
+ }
+
+ case Iop_CmpLT32U:
+ case Iop_CmpLE32U:
+ case Iop_CmpLT64U:
+ case Iop_CmpLE64U: {
+ HReg op1;
+ s390_opnd_RMI op2;
+
+ op1 = s390_isel_int_expr(env, arg1);
+ op2 = s390_isel_int_expr_RMI(env, arg2);
+
+ addInstr(env, s390_insn_compare(size, op1, op2, False));
+
+ return (cond->Iex.Binop.op == Iop_CmpLT32U ||
+ cond->Iex.Binop.op == Iop_CmpLT64U) ? S390_CC_L : S390_CC_LE;
+ }
+
+ default:
+ goto fail;
+ }
+ }
+
+ fail:
+ ppIRExpr(cond);
+ vpanic("s390_isel_cc: unexpected operator");
+}
+
+
+/*---------------------------------------------------------*/
+/*--- ISEL: Statements ---*/
+/*---------------------------------------------------------*/
+
+static void
+s390_isel_stmt(ISelEnv *env, IRStmt *stmt)
+{
+ if (vex_traceflags & VEX_TRACE_VCODE) {
+ vex_printf("\n -- ");
+ ppIRStmt(stmt);
+ vex_printf("\n");
+ }
+
+ switch (stmt->tag) {
+
+ /* --------- STORE --------- */
+ case Ist_Store: {
+ IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Store.data);
+ s390_amode *am;
+ HReg src;
+
+ if (stmt->Ist.Store.end != Iend_BE) goto stmt_fail;
+
+ am = s390_isel_amode(env, stmt->Ist.Store.addr);
+
+ switch (tyd) {
+ case Ity_I8:
+ case Ity_I16:
+ case Ity_I32:
+ case Ity_I64:
+ src = s390_isel_int_expr(env, stmt->Ist.Store.data);
+ break;
+
+ case Ity_F32:
+ case Ity_F64:
+ src = s390_isel_float_expr(env, stmt->Ist.Store.data);
+ break;
+
+ case Ity_F128:
+ /* Cannot occur. No such instruction */
+ vpanic("Ist_Store with F128 data");
+
+ default:
+ goto stmt_fail;
+ }
+
+ addInstr(env, s390_insn_store(sizeofIRType(tyd), am, src));
+ return;
+ }
+
+ /* --------- PUT --------- */
+ case Ist_Put: {
+ IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Put.data);
+ HReg src;
+ s390_amode *am;
+
+ am = s390_amode_for_guest_state(stmt->Ist.Put.offset);
+
+ switch (tyd) {
+ case Ity_I8:
+ case Ity_I16:
+ case Ity_I32:
+ case Ity_I64:
+ src = s390_isel_int_expr(env, stmt->Ist.Put.data);
+ break;
+
+ case Ity_F32:
+ case Ity_F64:
+ src = s390_isel_float_expr(env, stmt->Ist.Put.data);
+ break;
+
+ case Ity_F128:
+ /* Does not occur. See function put_fpr_pair. */
+ vpanic("Ist_Put with F128 data");
+
+ default:
+ goto stmt_fail;
+ }
+
+ addInstr(env, s390_insn_store(sizeofIRType(tyd), am, src));
+ return;
+ }
+
+ /* --------- TMP --------- */
+ case Ist_WrTmp: {
+ IRTemp tmp = stmt->Ist.WrTmp.tmp;
+ IRType tyd = typeOfIRTemp(env->type_env, tmp);
+ HReg src, dst;
+
+ switch (tyd) {
+ case Ity_I128: {
+ HReg dst_hi, dst_lo, res_hi, res_lo;
+
+ s390_isel_int128_expr(&res_hi, &res_lo, env, stmt->Ist.WrTmp.data);
+ lookupIRTemp128(&dst_hi, &dst_lo, env, tmp);
+
+ addInstr(env, s390_insn_move(8, dst_hi, res_hi));
+ addInstr(env, s390_insn_move(8, dst_lo, res_lo));
+ return;
+ }
+
+ case Ity_I8:
+ case Ity_I16:
+ case Ity_I32:
+ case Ity_I64:
+ src = s390_isel_int_expr(env, stmt->Ist.WrTmp.data);
+ dst = lookupIRTemp(env, tmp);
+ break;
+
+ case Ity_I1: {
+ s390_cc_t cond = s390_isel_cc(env, stmt->Ist.WrTmp.data);
+ dst = lookupIRTemp(env, tmp);
+ addInstr(env, s390_insn_cc2bool(dst, cond));
+ return;
+ }
+
+ case Ity_F32:
+ case Ity_F64:
+ src = s390_isel_float_expr(env, stmt->Ist.WrTmp.data);
+ dst = lookupIRTemp(env, tmp);
+ break;
+
+ case Ity_F128: {
+ HReg dst_hi, dst_lo, res_hi, res_lo;
+
+ s390_isel_float128_expr(&res_hi, &res_lo, env, stmt->Ist.WrTmp.data);
+ lookupIRTemp128(&dst_hi, &dst_lo, env, tmp);
+
+ addInstr(env, s390_insn_move(8, dst_hi, res_hi));
+ addInstr(env, s390_insn_move(8, dst_lo, res_lo));
+ return;
+ }
+
+ default:
+ goto stmt_fail;
+ }
+
+ addInstr(env, s390_insn_move(sizeofIRType(tyd), dst, src));
+ return;
+ }
+
+ /* --------- Call to DIRTY helper --------- */
+ case Ist_Dirty: {
+ IRType retty;
+ IRDirty* d = stmt->Ist.Dirty.details;
+ Bool passBBP;
+
+ if (d->nFxState == 0)
+ vassert(!d->needsBBP);
+
+ passBBP = toBool(d->nFxState > 0 && d->needsBBP);
+
+ doHelperCall(env, passBBP, d->guard, d->cee, d->args);
+
+ /* Now figure out what to do with the returned value, if any. */
+ if (d->tmp == IRTemp_INVALID)
+ /* No return value. Nothing to do. */
+ return;
+
+ retty = typeOfIRTemp(env->type_env, d->tmp);
+ if (retty == Ity_I64 || retty == Ity_I32
+ || retty == Ity_I16 || retty == Ity_I8) {
+ /* Move the returned value into the return register */
+ HReg dst = lookupIRTemp(env, d->tmp);
+ addInstr(env, s390_insn_move(sizeofIRType(retty), dst,
+ mkHReg(S390_REGNO_RETURN_VALUE,
+ HRcInt64, False)));
+ return;
+ }
+ break;
+ }
+
+ case Ist_CAS:
+ if (stmt->Ist.CAS.details->oldHi == IRTemp_INVALID) {
+ IRCAS *cas = stmt->Ist.CAS.details;
+ s390_amode *op2 = s390_isel_amode(env, cas->addr);
+ HReg op3 = s390_isel_int_expr(env, cas->dataLo); /* new value */
+ HReg op1 = s390_isel_int_expr(env, cas->expdLo); /* expected value */
+ HReg old = lookupIRTemp(env, cas->oldLo);
+
+ if (typeOfIRTemp(env->type_env, cas->oldLo) == Ity_I32) {
+ addInstr(env, s390_insn_cas(4, op1, op2, op3, old));
+ } else {
+ addInstr(env, s390_insn_cas(8, op1, op2, op3, old));
+ }
+ return;
+ } else {
+ vpanic("compare double and swap not implemented\n");
+ }
+ break;
+
+ /* --------- EXIT --------- */
+ case Ist_Exit: {
+ s390_opnd_RMI dst;
+ s390_cc_t cond;
+ IRConstTag tag = stmt->Ist.Exit.dst->tag;
+
+ if (tag != Ico_U64)
+ vpanic("s390_isel_stmt: Ist_Exit: dst is not a 64-bit value");
+
+ dst = s390_isel_int_expr_RMI(env, IRExpr_Const(stmt->Ist.Exit.dst));
+ cond = s390_isel_cc(env, stmt->Ist.Exit.guard);
+ addInstr(env, s390_insn_branch(stmt->Ist.Exit.jk, cond, dst));
+ return;
+ }
+
+ /* --------- MEM FENCE --------- */
+ case Ist_MBE:
+ switch (stmt->Ist.MBE.event) {
+ case Imbe_Fence:
+ addInstr(env, s390_insn_mfence());
+ return;
+ default:
+ break;
+ }
+ break;
+
+ /* --------- Miscellaneous --------- */
+
+ case Ist_PutI: /* Not needed */
+ case Ist_IMark: /* Doesn't generate any executable code */
+ case Ist_NoOp: /* Doesn't generate any executable code */
+ case Ist_AbiHint: /* Meaningless in IR */
+ return;
+
+ default:
+ break;
+ }
+
+ stmt_fail:
+ ppIRStmt(stmt);
+ vpanic("s390_isel_stmt");
+}
+
+
+/*---------------------------------------------------------*/
+/*--- ISEL: Basic block terminators (Nexts) ---*/
+/*---------------------------------------------------------*/
+
+static void
+iselNext(ISelEnv *env, IRExpr *next, IRJumpKind jk)
+{
+ s390_opnd_RMI dst;
+
+ if (vex_traceflags & VEX_TRACE_VCODE) {
+ vex_printf("\n-- goto {");
+ ppIRJumpKind(jk);
+ vex_printf("} ");
+ ppIRExpr(next);
+ vex_printf("\n");
+ }
+
+ dst = s390_isel_int_expr_RMI(env, next);
+ addInstr(env, s390_insn_branch(jk, S390_CC_ALWAYS, dst));
+}
+
+
+/*---------------------------------------------------------*/
+/*--- Insn selector top-level ---*/
+/*---------------------------------------------------------*/
+
+/* Translate an entire SB to s390 code. */
+
+HInstrArray *
+iselSB_S390(IRSB *bb, VexArch arch_host, VexArchInfo *archinfo_host,
+ VexAbiInfo *vbi)
+{
+ UInt i, j;
+ HReg hreg, hregHI;
+ ISelEnv *env;
+ UInt hwcaps_host = archinfo_host->hwcaps;
+
+ /* KLUDGE: export archinfo_host. */
+ s390_archinfo_host = archinfo_host;
+
+ /* Do some sanity checks */
+ vassert((VEX_HWCAPS_S390X(hwcaps_host) & ~(VEX_HWCAPS_S390X_ALL)) == 0);
+
+ /* Make up an initial environment to use. */
+ env = LibVEX_Alloc(sizeof(ISelEnv));
+ env->vreg_ctr = 0;
+
+ /* Set up output code array. */
+ env->code = newHInstrArray();
+
+ /* Copy BB's type env. */
+ env->type_env = bb->tyenv;
+
+ /* Make up an IRTemp -> virtual HReg mapping. This doesn't
+ change as we go along. For some reason types_used has Int type -- but
+ it should be unsigned. Internally we use an unsigned type; so we
+ assert it here. */
+ vassert(bb->tyenv->types_used >= 0);
+
+ env->n_vregmap = bb->tyenv->types_used;
+ env->vregmap = LibVEX_Alloc(env->n_vregmap * sizeof(HReg));
+ env->vregmapHI = LibVEX_Alloc(env->n_vregmap * sizeof(HReg));
+
+ /* and finally ... */
+ env->hwcaps = hwcaps_host;
+
+ /* For each IR temporary, allocate a suitably-kinded virtual
+ register. */
+ j = 0;
+ for (i = 0; i < env->n_vregmap; i++) {
+ hregHI = hreg = INVALID_HREG;
+ switch (bb->tyenv->types[i]) {
+ case Ity_I1:
+ case Ity_I8:
+ case Ity_I16:
+ case Ity_I32:
+ hreg = mkHReg(j++, HRcInt64, True);
+ break;
+
+ case Ity_I64:
+ hreg = mkHReg(j++, HRcInt64, True);
+ break;
+
+ case Ity_I128:
+ hreg = mkHReg(j++, HRcInt64, True);
+ hregHI = mkHReg(j++, HRcInt64, True);
+ break;
+
+ case Ity_F32:
+ case Ity_F64:
+ hreg = mkHReg(j++, HRcFlt64, True);
+ break;
+
+ case Ity_F128:
+ hreg = mkHReg(j++, HRcFlt64, True);
+ hregHI = mkHReg(j++, HRcFlt64, True);
+ break;
+
+ case Ity_V128: /* fall through */
+ default:
+ ppIRType(bb->tyenv->types[i]);
+ vpanic("s390_isel_sb: IRTemp type");
+ }
+
+ env->vregmap[i] = hreg;
+ env->vregmapHI[i] = hregHI;
+ }
+ env->vreg_ctr = j;
+
+ /* Ok, finally we can iterate over the statements. */
+ for (i = 0; i < bb->stmts_used; i++)
+ if (bb->stmts[i])
+ s390_isel_stmt(env, bb->stmts[i]);
+
+ iselNext(env, bb->next, bb->jumpkind);
+
+ /* Record the number of vregs we used. */
+ env->code->n_vregs = env->vreg_ctr;
+
+ return env->code;
+}
+
+/*---------------------------------------------------------------*/
+/*--- end host_s390_isel.c ---*/
+/*---------------------------------------------------------------*/
diff --git a/main/VEX/priv/host_x86_defs.c b/main/VEX/priv/host_x86_defs.c
index e11b916..e26a076 100644
--- a/main/VEX/priv/host_x86_defs.c
+++ b/main/VEX/priv/host_x86_defs.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -1989,7 +1989,9 @@
imperative to emit position-independent code. */
Int emit_X86Instr ( UChar* buf, Int nbuf, X86Instr* i,
- Bool mode64, void* dispatch )
+ Bool mode64,
+ void* dispatch_unassisted,
+ void* dispatch_assisted )
{
UInt irno, opc, opc_rr, subopc_imm, opc_imma, opc_cl, opc_imm, subopc;
@@ -2304,7 +2306,11 @@
*p++ = toUChar(0xD0 + irno);
goto done;
- case Xin_Goto:
+ case Xin_Goto: {
+ void* dispatch_to_use = NULL;
+ vassert(dispatch_unassisted != NULL);
+ vassert(dispatch_assisted != NULL);
+
/* Use ptmp for backpatching conditional jumps. */
ptmp = NULL;
@@ -2318,7 +2324,10 @@
}
/* If a non-boring, set %ebp (the guest state pointer)
- appropriately. */
+ appropriately. Also, decide which dispatcher we need to
+ use. */
+ dispatch_to_use = dispatch_assisted;
+
/* movl $magic_number, %ebp */
switch (i->Xin.Goto.jk) {
case Ijk_ClientReq:
@@ -2366,6 +2375,7 @@
case Ijk_Ret:
case Ijk_Call:
case Ijk_Boring:
+ dispatch_to_use = dispatch_unassisted;
break;
default:
ppIRJumpKind(i->Xin.Goto.jk);
@@ -2390,10 +2400,10 @@
after the load of %eax since %edx might be carrying the value
destined for %eax immediately prior to this Xin_Goto. */
vassert(sizeof(UInt) == sizeof(void*));
- vassert(dispatch != NULL);
+ vassert(dispatch_to_use != NULL);
/* movl $imm32, %edx */
*p++ = 0xBA;
- p = emit32(p, (UInt)Ptr_to_ULong(dispatch));
+ p = emit32(p, (UInt)Ptr_to_ULong(dispatch_to_use));
/* jmp *%edx */
*p++ = 0xFF;
@@ -2406,6 +2416,7 @@
*ptmp = toUChar(delta-1);
}
goto done;
+ }
case Xin_CMov32:
vassert(i->Xin.CMov32.cond != Xcc_ALWAYS);
diff --git a/main/VEX/priv/host_x86_defs.h b/main/VEX/priv/host_x86_defs.h
index fde700a..f68a426 100644
--- a/main/VEX/priv/host_x86_defs.h
+++ b/main/VEX/priv/host_x86_defs.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -673,7 +673,9 @@
extern void mapRegs_X86Instr ( HRegRemap*, X86Instr*, Bool );
extern Bool isMove_X86Instr ( X86Instr*, HReg*, HReg* );
extern Int emit_X86Instr ( UChar* buf, Int nbuf, X86Instr*,
- Bool, void* dispatch );
+ Bool,
+ void* dispatch_unassisted,
+ void* dispatch_assisted );
extern void genSpill_X86 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
HReg rreg, Int offset, Bool );
diff --git a/main/VEX/priv/host_x86_isel.c b/main/VEX/priv/host_x86_isel.c
index fc5cf05..81896b3 100644
--- a/main/VEX/priv/host_x86_isel.c
+++ b/main/VEX/priv/host_x86_isel.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -42,6 +42,7 @@
#include "main_globals.h"
#include "host_generic_regs.h"
#include "host_generic_simd64.h"
+#include "host_generic_simd128.h"
#include "host_x86_defs.h"
/* TODO 21 Apr 2005:
@@ -1835,6 +1836,25 @@
}
}
+ /* CmpNE32(ccall, 32-bit constant) (--smc-check=all optimisation).
+ Saves a "movl %eax, %tmp" compared to the default route. */
+ if (e->tag == Iex_Binop
+ && e->Iex.Binop.op == Iop_CmpNE32
+ && e->Iex.Binop.arg1->tag == Iex_CCall
+ && e->Iex.Binop.arg2->tag == Iex_Const) {
+ IRExpr* cal = e->Iex.Binop.arg1;
+ IRExpr* con = e->Iex.Binop.arg2;
+ /* clone & partial-eval of generic Iex_CCall and Iex_Const cases */
+ vassert(cal->Iex.CCall.retty == Ity_I32); /* else ill-typed IR */
+ vassert(con->Iex.Const.con->tag == Ico_U32);
+ /* Marshal args, do the call. */
+ doHelperCall( env, False, NULL, cal->Iex.CCall.cee, cal->Iex.CCall.args );
+ addInstr(env, X86Instr_Alu32R(Xalu_CMP,
+ X86RMI_Imm(con->Iex.Const.con->Ico.U32),
+ hregX86_EAX()));
+ return Xcc_NZ;
+ }
+
/* Cmp*32*(x,y) */
if (e->tag == Iex_Binop
&& (e->Iex.Binop.op == Iop_CmpEQ32
@@ -2367,12 +2387,16 @@
case Iop_QAdd16Ux4:
fn = (HWord)h_generic_calc_QAdd16Ux4; goto binnish;
- case Iop_QNarrow32Sx2:
- fn = (HWord)h_generic_calc_QNarrow32Sx2; goto binnish;
- case Iop_QNarrow16Sx4:
- fn = (HWord)h_generic_calc_QNarrow16Sx4; goto binnish;
- case Iop_QNarrow16Ux4:
- fn = (HWord)h_generic_calc_QNarrow16Ux4; goto binnish;
+ case Iop_QNarrowBin32Sto16Sx4:
+ fn = (HWord)h_generic_calc_QNarrowBin32Sto16Sx4; goto binnish;
+ case Iop_QNarrowBin16Sto8Sx8:
+ fn = (HWord)h_generic_calc_QNarrowBin16Sto8Sx8; goto binnish;
+ case Iop_QNarrowBin16Sto8Ux8:
+ fn = (HWord)h_generic_calc_QNarrowBin16Sto8Ux8; goto binnish;
+ case Iop_NarrowBin16to8x8:
+ fn = (HWord)h_generic_calc_NarrowBin16to8x8; goto binnish;
+ case Iop_NarrowBin32to16x4:
+ fn = (HWord)h_generic_calc_NarrowBin32to16x4; goto binnish;
case Iop_QSub8Sx8:
fn = (HWord)h_generic_calc_QSub8Sx8; goto binnish;
@@ -3116,6 +3140,7 @@
# define SSE2_OR_ABOVE \
(env->hwcaps & VEX_HWCAPS_X86_SSE2)
+ HWord fn = 0; /* address of helper fn, if required */
MatchInfo mi;
Bool arg1isEReg = False;
X86SseOp op = Xsse_INVALID;
@@ -3481,11 +3506,11 @@
return dst;
}
- case Iop_QNarrow32Sx4:
+ case Iop_QNarrowBin32Sto16Sx8:
op = Xsse_PACKSSD; arg1isEReg = True; goto do_SseReRg;
- case Iop_QNarrow16Sx8:
+ case Iop_QNarrowBin16Sto8Sx16:
op = Xsse_PACKSSW; arg1isEReg = True; goto do_SseReRg;
- case Iop_QNarrow16Ux8:
+ case Iop_QNarrowBin16Sto8Ux16:
op = Xsse_PACKUSW; arg1isEReg = True; goto do_SseReRg;
case Iop_InterleaveHI8x16:
@@ -3582,6 +3607,59 @@
return dst;
}
+ case Iop_NarrowBin32to16x8:
+ fn = (HWord)h_generic_calc_NarrowBin32to16x8;
+ goto do_SseAssistedBinary;
+ case Iop_NarrowBin16to8x16:
+ fn = (HWord)h_generic_calc_NarrowBin16to8x16;
+ goto do_SseAssistedBinary;
+ do_SseAssistedBinary: {
+ /* As with the amd64 case (where this is copied from) we
+ generate pretty bad code. */
+ vassert(fn != 0);
+ HReg dst = newVRegV(env);
+ HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
+ HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
+ HReg argp = newVRegI(env);
+ /* subl $112, %esp -- make a space */
+ sub_from_esp(env, 112);
+ /* leal 48(%esp), %r_argp -- point into it */
+ addInstr(env, X86Instr_Lea32(X86AMode_IR(48, hregX86_ESP()),
+ argp));
+ /* andl $-16, %r_argp -- 16-align the pointer */
+ addInstr(env, X86Instr_Alu32R(Xalu_AND,
+ X86RMI_Imm( ~(UInt)15 ),
+ argp));
+ /* Prepare 3 arg regs:
+ leal 0(%r_argp), %eax
+ leal 16(%r_argp), %edx
+ leal 32(%r_argp), %ecx
+ */
+ addInstr(env, X86Instr_Lea32(X86AMode_IR(0, argp),
+ hregX86_EAX()));
+ addInstr(env, X86Instr_Lea32(X86AMode_IR(16, argp),
+ hregX86_EDX()));
+ addInstr(env, X86Instr_Lea32(X86AMode_IR(32, argp),
+ hregX86_ECX()));
+ /* Store the two args, at (%edx) and (%ecx):
+ movupd %argL, 0(%edx)
+ movupd %argR, 0(%ecx)
+ */
+ addInstr(env, X86Instr_SseLdSt(False/*!isLoad*/, argL,
+ X86AMode_IR(0, hregX86_EDX())));
+ addInstr(env, X86Instr_SseLdSt(False/*!isLoad*/, argR,
+ X86AMode_IR(0, hregX86_ECX())));
+ /* call the helper */
+ addInstr(env, X86Instr_Call( Xcc_ALWAYS, (Addr32)fn, 3 ));
+ /* fetch the result from memory, using %r_argp, which the
+ register allocator will keep alive across the call. */
+ addInstr(env, X86Instr_SseLdSt(True/*isLoad*/, dst,
+ X86AMode_IR(0, argp)));
+ /* and finally, clear the space */
+ add_to_esp(env, 112);
+ return dst;
+ }
+
default:
break;
} /* switch (e->Iex.Binop.op) */
diff --git a/main/VEX/priv/ir_defs.c b/main/VEX/priv/ir_defs.c
index 25a87c9..f68f21f 100644
--- a/main/VEX/priv/ir_defs.c
+++ b/main/VEX/priv/ir_defs.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -56,6 +56,7 @@
case Ity_I128: vex_printf( "I128"); break;
case Ity_F32: vex_printf( "F32"); break;
case Ity_F64: vex_printf( "F64"); break;
+ case Ity_F128: vex_printf( "F128"); break;
case Ity_V128: vex_printf( "V128"); break;
default: vex_printf("ty = 0x%x\n", (Int)ty);
vpanic("ppIRType");
@@ -64,7 +65,7 @@
void ppIRConst ( IRConst* con )
{
- union { ULong i64; Double f64; } u;
+ union { ULong i64; Double f64; UInt i32; Float f32; } u;
vassert(sizeof(ULong) == sizeof(Double));
switch (con->tag) {
case Ico_U1: vex_printf( "%d:I1", con->Ico.U1 ? 1 : 0); break;
@@ -72,6 +73,10 @@
case Ico_U16: vex_printf( "0x%x:I16", (UInt)(con->Ico.U16)); break;
case Ico_U32: vex_printf( "0x%x:I32", (UInt)(con->Ico.U32)); break;
case Ico_U64: vex_printf( "0x%llx:I64", (ULong)(con->Ico.U64)); break;
+ case Ico_F32: u.f32 = con->Ico.F32;
+ vex_printf( "F32{0x%x}", u.i32);
+ break;
+ case Ico_F32i: vex_printf( "F32i{0x%x}", con->Ico.F32i); break;
case Ico_F64: u.f64 = con->Ico.F64;
vex_printf( "F64{0x%llx}", u.i64);
break;
@@ -215,6 +220,10 @@
case Iop_DivS32: vex_printf("DivS32"); return;
case Iop_DivU64: vex_printf("DivU64"); return;
case Iop_DivS64: vex_printf("DivS64"); return;
+ case Iop_DivU64E: vex_printf("DivU64E"); return;
+ case Iop_DivS64E: vex_printf("DivS64E"); return;
+ case Iop_DivU32E: vex_printf("DivU32E"); return;
+ case Iop_DivS32E: vex_printf("DivS32E"); return;
case Iop_DivModU64to32: vex_printf("DivModU64to32"); return;
case Iop_DivModS64to32: vex_printf("DivModS64to32"); return;
@@ -222,6 +231,8 @@
case Iop_DivModU128to64: vex_printf("DivModU128to64"); return;
case Iop_DivModS128to64: vex_printf("DivModS128to64"); return;
+ case Iop_DivModS64to64: vex_printf("DivModS64to64"); return;
+
case Iop_16HIto8: vex_printf("16HIto8"); return;
case Iop_16to8: vex_printf("16to8"); return;
case Iop_8HLto16: vex_printf("8HLto16"); return;
@@ -238,6 +249,14 @@
case Iop_128to64: vex_printf("128to64"); return;
case Iop_64HLto128: vex_printf("64HLto128"); return;
+ case Iop_CmpF32: vex_printf("CmpF32"); return;
+ case Iop_F32toI16S: vex_printf("F32toI16S"); return;
+ case Iop_F32toI32S: vex_printf("F32toI32S"); return;
+ case Iop_F32toI64S: vex_printf("F32toI64S"); return;
+ case Iop_I16StoF32: vex_printf("I16StoF32"); return;
+ case Iop_I32StoF32: vex_printf("I32StoF32"); return;
+ case Iop_I64StoF32: vex_printf("I64StoF32"); return;
+
case Iop_AddF64: vex_printf("AddF64"); return;
case Iop_SubF64: vex_printf("SubF64"); return;
case Iop_MulF64: vex_printf("MulF64"); return;
@@ -251,6 +270,32 @@
case Iop_MulF32: vex_printf("MulF32"); return;
case Iop_DivF32: vex_printf("DivF32"); return;
+ /* 128 bit floating point */
+ case Iop_AddF128: vex_printf("AddF128"); return;
+ case Iop_SubF128: vex_printf("SubF128"); return;
+ case Iop_MulF128: vex_printf("MulF128"); return;
+ case Iop_DivF128: vex_printf("DivF128"); return;
+ case Iop_AbsF128: vex_printf("AbsF128"); return;
+ case Iop_NegF128: vex_printf("NegF128"); return;
+ case Iop_SqrtF128: vex_printf("SqrtF128"); return;
+ case Iop_CmpF128: vex_printf("CmpF128"); return;
+
+ case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return;
+ case Iop_F128HItoF64: vex_printf("F128HItoF64"); return;
+ case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return;
+ case Iop_I32StoF128: vex_printf("I32StoF128"); return;
+ case Iop_I64StoF128: vex_printf("I64StoF128"); return;
+ case Iop_F128toI32S: vex_printf("F128toI32S"); return;
+ case Iop_F128toI64S: vex_printf("F128toI64S"); return;
+ case Iop_F32toF128: vex_printf("F32toF128"); return;
+ case Iop_F64toF128: vex_printf("F64toF128"); return;
+ case Iop_F128toF64: vex_printf("F128toF64"); return;
+ case Iop_F128toF32: vex_printf("F128toF32"); return;
+
+ /* s390 specific */
+ case Iop_MAddF32: vex_printf("s390_MAddF32"); return;
+ case Iop_MSubF32: vex_printf("s390_MSubF32"); return;
+
case Iop_ScaleF64: vex_printf("ScaleF64"); return;
case Iop_AtanF64: vex_printf("AtanF64"); return;
case Iop_Yl2xF64: vex_printf("Yl2xF64"); return;
@@ -315,12 +360,15 @@
case Iop_F64toI16S: vex_printf("F64toI16S"); return;
case Iop_F64toI32S: vex_printf("F64toI32S"); return;
case Iop_F64toI64S: vex_printf("F64toI64S"); return;
+ case Iop_F64toI64U: vex_printf("F64toI64U"); return;
case Iop_F64toI32U: vex_printf("F64toI32U"); return;
case Iop_I16StoF64: vex_printf("I16StoF64"); return;
case Iop_I32StoF64: vex_printf("I32StoF64"); return;
case Iop_I64StoF64: vex_printf("I64StoF64"); return;
+ case Iop_I64UtoF64: vex_printf("I64UtoF64"); return;
+ case Iop_I64UtoF32: vex_printf("I64UtoF32"); return;
case Iop_I32UtoF64: vex_printf("I32UtoF64"); return;
@@ -463,9 +511,11 @@
case Iop_SarN8x8: vex_printf("SarN8x8"); return;
case Iop_SarN16x4: vex_printf("SarN16x4"); return;
case Iop_SarN32x2: vex_printf("SarN32x2"); return;
- case Iop_QNarrow16Ux4: vex_printf("QNarrow16Ux4"); return;
- case Iop_QNarrow16Sx4: vex_printf("QNarrow16Sx4"); return;
- case Iop_QNarrow32Sx2: vex_printf("QNarrow32Sx2"); return;
+ case Iop_QNarrowBin16Sto8Ux8: vex_printf("QNarrowBin16Sto8Ux8"); return;
+ case Iop_QNarrowBin16Sto8Sx8: vex_printf("QNarrowBin16Sto8Sx8"); return;
+ case Iop_QNarrowBin32Sto16Sx4: vex_printf("QNarrowBin32Sto16Sx4"); return;
+ case Iop_NarrowBin16to8x8: vex_printf("NarrowBin16to8x8"); return;
+ case Iop_NarrowBin32to16x4: vex_printf("NarrowBin32to16x4"); return;
case Iop_InterleaveHI8x8: vex_printf("InterleaveHI8x8"); return;
case Iop_InterleaveHI16x4: vex_printf("InterleaveHI16x4"); return;
case Iop_InterleaveHI32x2: vex_printf("InterleaveHI32x2"); return;
@@ -729,6 +779,7 @@
case Iop_CmpEQ8x16: vex_printf("CmpEQ8x16"); return;
case Iop_CmpEQ16x8: vex_printf("CmpEQ16x8"); return;
case Iop_CmpEQ32x4: vex_printf("CmpEQ32x4"); return;
+ case Iop_CmpEQ64x2: vex_printf("CmpEQ64x2"); return;
case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return;
case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return;
case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return;
@@ -801,30 +852,32 @@
case Iop_Rol16x8: vex_printf("Rol16x8"); return;
case Iop_Rol32x4: vex_printf("Rol32x4"); return;
- case Iop_Narrow16x8: vex_printf("Narrow16x8"); return;
- case Iop_Narrow32x4: vex_printf("Narrow32x4"); return;
- case Iop_QNarrow16Ux8: vex_printf("QNarrow16Ux8"); return;
- case Iop_QNarrow32Ux4: vex_printf("QNarrow32Ux4"); return;
- case Iop_QNarrow16Sx8: vex_printf("QNarrow16Sx8"); return;
- case Iop_QNarrow32Sx4: vex_printf("QNarrow32Sx4"); return;
- case Iop_Shorten16x8: vex_printf("Shorten16x8"); return;
- case Iop_Shorten32x4: vex_printf("Shorten32x4"); return;
- case Iop_Shorten64x2: vex_printf("Shorten64x2"); return;
- case Iop_QShortenU16Ux8: vex_printf("QShortenU16Ux8"); return;
- case Iop_QShortenU32Ux4: vex_printf("QShortenU32Ux4"); return;
- case Iop_QShortenU64Ux2: vex_printf("QShortenU64Ux2"); return;
- case Iop_QShortenS16Sx8: vex_printf("QShortenS16Sx8"); return;
- case Iop_QShortenS32Sx4: vex_printf("QShortenS32Sx4"); return;
- case Iop_QShortenS64Sx2: vex_printf("QShortenS64Sx2"); return;
- case Iop_QShortenU16Sx8: vex_printf("QShortenU16Sx8"); return;
- case Iop_QShortenU32Sx4: vex_printf("QShortenU32Sx4"); return;
- case Iop_QShortenU64Sx2: vex_printf("QShortenU64Sx2"); return;
- case Iop_Longen8Ux8: vex_printf("Longen8Ux8"); return;
- case Iop_Longen16Ux4: vex_printf("Longen16Ux4"); return;
- case Iop_Longen32Ux2: vex_printf("Longen32Ux2"); return;
- case Iop_Longen8Sx8: vex_printf("Longen8Sx8"); return;
- case Iop_Longen16Sx4: vex_printf("Longen16Sx4"); return;
- case Iop_Longen32Sx2: vex_printf("Longen32Sx2"); return;
+ case Iop_NarrowBin16to8x16: vex_printf("NarrowBin16to8x16"); return;
+ case Iop_NarrowBin32to16x8: vex_printf("NarrowBin32to16x8"); return;
+ case Iop_QNarrowBin16Uto8Ux16: vex_printf("QNarrowBin16Uto8Ux16"); return;
+ case Iop_QNarrowBin32Sto16Ux8: vex_printf("QNarrowBin32Sto16Ux8"); return;
+ case Iop_QNarrowBin16Sto8Ux16: vex_printf("QNarrowBin16Sto8Ux16"); return;
+ case Iop_QNarrowBin32Uto16Ux8: vex_printf("QNarrowBin32Uto16Ux8"); return;
+ case Iop_QNarrowBin16Sto8Sx16: vex_printf("QNarrowBin16Sto8Sx16"); return;
+ case Iop_QNarrowBin32Sto16Sx8: vex_printf("QNarrowBin32Sto16Sx8"); return;
+ case Iop_NarrowUn16to8x8: vex_printf("NarrowUn16to8x8"); return;
+ case Iop_NarrowUn32to16x4: vex_printf("NarrowUn32to16x4"); return;
+ case Iop_NarrowUn64to32x2: vex_printf("NarrowUn64to32x2"); return;
+ case Iop_QNarrowUn16Uto8Ux8: vex_printf("QNarrowUn16Uto8Ux8"); return;
+ case Iop_QNarrowUn32Uto16Ux4: vex_printf("QNarrowUn32Uto16Ux4"); return;
+ case Iop_QNarrowUn64Uto32Ux2: vex_printf("QNarrowUn64Uto32Ux2"); return;
+ case Iop_QNarrowUn16Sto8Sx8: vex_printf("QNarrowUn16Sto8Sx8"); return;
+ case Iop_QNarrowUn32Sto16Sx4: vex_printf("QNarrowUn32Sto16Sx4"); return;
+ case Iop_QNarrowUn64Sto32Sx2: vex_printf("QNarrowUn64Sto32Sx2"); return;
+ case Iop_QNarrowUn16Sto8Ux8: vex_printf("QNarrowUn16Sto8Ux8"); return;
+ case Iop_QNarrowUn32Sto16Ux4: vex_printf("QNarrowUn32Sto16Ux4"); return;
+ case Iop_QNarrowUn64Sto32Ux2: vex_printf("QNarrowUn64Sto32Ux2"); return;
+ case Iop_Widen8Uto16x8: vex_printf("Widen8Uto16x8"); return;
+ case Iop_Widen16Uto32x4: vex_printf("Widen16Uto32x4"); return;
+ case Iop_Widen32Uto64x2: vex_printf("Widen32Uto64x2"); return;
+ case Iop_Widen8Sto16x8: vex_printf("Widen8Sto16x8"); return;
+ case Iop_Widen16Sto32x4: vex_printf("Widen16Sto32x4"); return;
+ case Iop_Widen32Sto64x2: vex_printf("Widen32Sto64x2"); return;
case Iop_InterleaveHI8x16: vex_printf("InterleaveHI8x16"); return;
case Iop_InterleaveHI16x8: vex_printf("InterleaveHI16x8"); return;
@@ -1090,8 +1143,12 @@
void ppIRMBusEvent ( IRMBusEvent event )
{
switch (event) {
- case Imbe_Fence: vex_printf("Fence"); break;
- default: vpanic("ppIRMBusEvent");
+ case Imbe_Fence:
+ vex_printf("Fence"); break;
+ case Imbe_CancelReservation:
+ vex_printf("CancelReservation"); break;
+ default:
+ vpanic("ppIRMBusEvent");
}
}
@@ -1106,8 +1163,9 @@
vex_printf("IR-NoOp");
break;
case Ist_IMark:
- vex_printf( "------ IMark(0x%llx, %d) ------",
- s->Ist.IMark.addr, s->Ist.IMark.len);
+ vex_printf( "------ IMark(0x%llx, %d, %u) ------",
+ s->Ist.IMark.addr, s->Ist.IMark.len,
+ (UInt)s->Ist.IMark.delta);
break;
case Ist_AbiHint:
vex_printf("====== AbiHint(");
@@ -1259,6 +1317,20 @@
c->Ico.U64 = u64;
return c;
}
+IRConst* IRConst_F32 ( Float f32 )
+{
+ IRConst* c = LibVEX_Alloc(sizeof(IRConst));
+ c->tag = Ico_F32;
+ c->Ico.F32 = f32;
+ return c;
+}
+IRConst* IRConst_F32i ( UInt f32i )
+{
+ IRConst* c = LibVEX_Alloc(sizeof(IRConst));
+ c->tag = Ico_F32i;
+ c->Ico.F32i = f32i;
+ return c;
+}
IRConst* IRConst_F64 ( Double f64 )
{
IRConst* c = LibVEX_Alloc(sizeof(IRConst));
@@ -1548,11 +1620,12 @@
static_closure.tag = Ist_NoOp;
return &static_closure;
}
-IRStmt* IRStmt_IMark ( Addr64 addr, Int len ) {
- IRStmt* s = LibVEX_Alloc(sizeof(IRStmt));
- s->tag = Ist_IMark;
- s->Ist.IMark.addr = addr;
- s->Ist.IMark.len = len;
+IRStmt* IRStmt_IMark ( Addr64 addr, Int len, UChar delta ) {
+ IRStmt* s = LibVEX_Alloc(sizeof(IRStmt));
+ s->tag = Ist_IMark;
+ s->Ist.IMark.addr = addr;
+ s->Ist.IMark.len = len;
+ s->Ist.IMark.delta = delta;
return s;
}
IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ) {
@@ -1707,6 +1780,8 @@
case Ico_U16: return IRConst_U16(c->Ico.U16);
case Ico_U32: return IRConst_U32(c->Ico.U32);
case Ico_U64: return IRConst_U64(c->Ico.U64);
+ case Ico_F32: return IRConst_F32(c->Ico.F32);
+ case Ico_F32i: return IRConst_F32i(c->Ico.F32i);
case Ico_F64: return IRConst_F64(c->Ico.F64);
case Ico_F64i: return IRConst_F64i(c->Ico.F64i);
case Ico_V128: return IRConst_V128(c->Ico.V128);
@@ -1813,7 +1888,9 @@
s->Ist.AbiHint.len,
deepCopyIRExpr(s->Ist.AbiHint.nia));
case Ist_IMark:
- return IRStmt_IMark(s->Ist.IMark.addr, s->Ist.IMark.len);
+ return IRStmt_IMark(s->Ist.IMark.addr,
+ s->Ist.IMark.len,
+ s->Ist.IMark.delta);
case Ist_Put:
return IRStmt_Put(s->Ist.Put.offset,
deepCopyIRExpr(s->Ist.Put.data));
@@ -1990,8 +2067,9 @@
case Iop_QAdd32Ux2: case Iop_QAdd64Ux1:
case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2:
case Iop_PwAdd32Fx2:
- case Iop_QNarrow32Sx2:
- case Iop_QNarrow16Sx4: case Iop_QNarrow16Ux4:
+ case Iop_QNarrowBin32Sto16Sx4:
+ case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin16Sto8Ux8:
+ case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4:
case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2:
case Iop_QSub8Sx8: case Iop_QSub16Sx4:
case Iop_QSub32Sx2: case Iop_QSub64Sx1:
@@ -2097,10 +2175,10 @@
case Iop_Clz64: case Iop_Ctz64:
UNARY(Ity_I64, Ity_I64);
- case Iop_DivU32: case Iop_DivS32:
+ case Iop_DivU32: case Iop_DivS32: case Iop_DivU32E: case Iop_DivS32E:
BINARY(Ity_I32,Ity_I32, Ity_I32);
- case Iop_DivU64: case Iop_DivS64:
+ case Iop_DivU64: case Iop_DivS64: case Iop_DivS64E: case Iop_DivU64E:
BINARY(Ity_I64,Ity_I64, Ity_I64);
case Iop_DivModU64to32: case Iop_DivModS64to32:
@@ -2109,6 +2187,9 @@
case Iop_DivModU128to64: case Iop_DivModS128to64:
BINARY(Ity_I128,Ity_I64, Ity_I128);
+ case Iop_DivModS64to64:
+ BINARY(Ity_I64,Ity_I64, Ity_I128);
+
case Iop_16HIto8: case Iop_16to8:
UNARY(Ity_I16, Ity_I8);
case Iop_8HLto16:
@@ -2185,21 +2266,38 @@
case Iop_RoundF32toInt:
BINARY(ity_RMode,Ity_F32, Ity_F32);
+ case Iop_CmpF32:
+ BINARY(Ity_F32,Ity_F32, Ity_I32);
+
case Iop_CmpF64:
BINARY(Ity_F64,Ity_F64, Ity_I32);
+ case Iop_CmpF128:
+ BINARY(Ity_F128,Ity_F128, Ity_I32);
+
case Iop_F64toI16S: BINARY(ity_RMode,Ity_F64, Ity_I16);
case Iop_F64toI32S: BINARY(ity_RMode,Ity_F64, Ity_I32);
- case Iop_F64toI64S: BINARY(ity_RMode,Ity_F64, Ity_I64);
+ case Iop_F64toI64S: case Iop_F64toI64U:
+ BINARY(ity_RMode,Ity_F64, Ity_I64);
case Iop_F64toI32U: BINARY(ity_RMode,Ity_F64, Ity_I32);
case Iop_I16StoF64: UNARY(Ity_I16, Ity_F64);
case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64);
case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
+ case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
+ case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64);
+ case Iop_F32toI16S: BINARY(ity_RMode,Ity_F32, Ity_I16);
+ case Iop_F32toI32S: BINARY(ity_RMode,Ity_F32, Ity_I32);
+ case Iop_F32toI64S: BINARY(ity_RMode,Ity_F32, Ity_I64);
+
+ case Iop_I16StoF32: UNARY(Ity_I16, Ity_F32);
+ case Iop_I32StoF32: BINARY(ity_RMode,Ity_I32, Ity_F32);
+ case Iop_I64StoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
+
case Iop_F32toF64: UNARY(Ity_F32, Ity_F64);
case Iop_F64toF32: BINARY(ity_RMode,Ity_F64, Ity_F32);
@@ -2249,17 +2347,31 @@
case Iop_Rsqrte32x4:
UNARY(Ity_V128, Ity_V128);
- case Iop_64HLtoV128: BINARY(Ity_I64,Ity_I64, Ity_V128);
+ case Iop_64HLtoV128:
+ BINARY(Ity_I64,Ity_I64, Ity_V128);
+
case Iop_V128to64: case Iop_V128HIto64:
- case Iop_Shorten16x8: case Iop_Shorten32x4: case Iop_Shorten64x2:
- case Iop_QShortenU16Ux8: case Iop_QShortenU32Ux4: case Iop_QShortenU64Ux2:
- case Iop_QShortenS16Sx8: case Iop_QShortenS32Sx4: case Iop_QShortenS64Sx2:
- case Iop_QShortenU16Sx8: case Iop_QShortenU32Sx4: case Iop_QShortenU64Sx2:
+ case Iop_NarrowUn16to8x8:
+ case Iop_NarrowUn32to16x4:
+ case Iop_NarrowUn64to32x2:
+ case Iop_QNarrowUn16Uto8Ux8:
+ case Iop_QNarrowUn32Uto16Ux4:
+ case Iop_QNarrowUn64Uto32Ux2:
+ case Iop_QNarrowUn16Sto8Sx8:
+ case Iop_QNarrowUn32Sto16Sx4:
+ case Iop_QNarrowUn64Sto32Sx2:
+ case Iop_QNarrowUn16Sto8Ux8:
+ case Iop_QNarrowUn32Sto16Ux4:
+ case Iop_QNarrowUn64Sto32Ux2:
case Iop_F32toF16x4:
UNARY(Ity_V128, Ity_I64);
- case Iop_Longen8Ux8: case Iop_Longen16Ux4: case Iop_Longen32Ux2:
- case Iop_Longen8Sx8: case Iop_Longen16Sx4: case Iop_Longen32Sx2:
+ case Iop_Widen8Uto16x8:
+ case Iop_Widen16Uto32x4:
+ case Iop_Widen32Uto64x2:
+ case Iop_Widen8Sto16x8:
+ case Iop_Widen16Sto32x4:
+ case Iop_Widen32Sto64x2:
case Iop_F16toF32x4:
UNARY(Ity_I64, Ity_V128);
@@ -2327,19 +2439,23 @@
case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4:
case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4:
case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4:
+ case Iop_CmpEQ64x2:
case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4:
case Iop_CmpGT64Sx2:
case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4:
case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2:
- case Iop_QShl8x16: case Iop_QShl16x8: case Iop_QShl32x4: case Iop_QShl64x2:
- case Iop_QSal8x16: case Iop_QSal16x8: case Iop_QSal32x4: case Iop_QSal64x2:
+ case Iop_QShl8x16: case Iop_QShl16x8:
+ case Iop_QShl32x4: case Iop_QShl64x2:
+ case Iop_QSal8x16: case Iop_QSal16x8:
+ case Iop_QSal32x4: case Iop_QSal64x2:
case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2:
case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2:
case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2:
case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4:
- case Iop_QNarrow16Ux8: case Iop_QNarrow32Ux4:
- case Iop_QNarrow16Sx8: case Iop_QNarrow32Sx4:
- case Iop_Narrow16x8: case Iop_Narrow32x4:
+ case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8:
+ case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8:
+ case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8:
+ case Iop_NarrowBin16to8x16: case Iop_NarrowBin32to16x8:
case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8:
case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2:
case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8:
@@ -2439,6 +2555,43 @@
case Iop_QDMulLong16Sx4: case Iop_QDMulLong32Sx2:
BINARY(Ity_I64, Ity_I64, Ity_V128);
+ /* s390 specific */
+ case Iop_MAddF32:
+ case Iop_MSubF32:
+ QUATERNARY(ity_RMode,Ity_F32,Ity_F32,Ity_F32, Ity_F32);
+
+ case Iop_F64HLtoF128:
+ BINARY(Ity_F64,Ity_F64, Ity_F128);
+
+ case Iop_F128HItoF64:
+ case Iop_F128LOtoF64:
+ UNARY(Ity_F128, Ity_F64);
+
+ case Iop_AddF128:
+ case Iop_SubF128:
+ case Iop_MulF128:
+ case Iop_DivF128:
+ TERNARY(ity_RMode,Ity_F128,Ity_F128, Ity_F128);
+
+ case Iop_NegF128:
+ case Iop_AbsF128:
+ UNARY(Ity_F128, Ity_F128);
+
+ case Iop_SqrtF128:
+ BINARY(ity_RMode,Ity_F128, Ity_F128);
+
+ case Iop_I32StoF128: UNARY(Ity_I32, Ity_F128);
+ case Iop_I64StoF128: UNARY(Ity_I64, Ity_F128);
+
+ case Iop_F128toI32S: BINARY(ity_RMode,Ity_F128, Ity_I32);
+ case Iop_F128toI64S: BINARY(ity_RMode,Ity_F128, Ity_I64);
+
+ case Iop_F32toF128: UNARY(Ity_F32, Ity_F128);
+ case Iop_F64toF128: UNARY(Ity_F64, Ity_F128);
+
+ case Iop_F128toF32: BINARY(ity_RMode,Ity_F128, Ity_F32);
+ case Iop_F128toF64: BINARY(ity_RMode,Ity_F128, Ity_F64);
+
default:
ppIROp(op);
vpanic("typeOfPrimop");
@@ -2521,6 +2674,8 @@
case Ico_U16: return Ity_I16;
case Ico_U32: return Ity_I32;
case Ico_U64: return Ity_I64;
+ case Ico_F32: return Ity_F32;
+ case Ico_F32i: return Ity_F32;
case Ico_F64: return Ity_F64;
case Ico_F64i: return Ity_F64;
case Ico_V128: return Ity_V128;
@@ -2580,7 +2735,7 @@
case Ity_INVALID: case Ity_I1:
case Ity_I8: case Ity_I16: case Ity_I32:
case Ity_I64: case Ity_I128:
- case Ity_F32: case Ity_F64:
+ case Ity_F32: case Ity_F64: case Ity_F128:
case Ity_V128:
return True;
default:
@@ -3098,9 +3253,11 @@
switch (stmt->tag) {
case Ist_IMark:
/* Somewhat heuristic, but rule out totally implausible
- instruction sizes. */
+ instruction sizes and deltas. */
if (stmt->Ist.IMark.len < 0 || stmt->Ist.IMark.len > 20)
sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible");
+ if (stmt->Ist.IMark.delta > 1)
+ sanityCheckFail(bb,stmt,"IRStmt.IMark.delta: implausible");
break;
case Ist_AbiHint:
if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.base) != gWordTy)
@@ -3203,14 +3360,16 @@
tyRes = typeOfIRTemp(tyenv, stmt->Ist.LLSC.result);
if (stmt->Ist.LLSC.storedata == NULL) {
/* it's a LL */
- if (tyRes != Ity_I64 && tyRes != Ity_I32 && tyRes != Ity_I8)
+ if (tyRes != Ity_I64 && tyRes != Ity_I32
+ && tyRes != Ity_I16 && tyRes != Ity_I8)
sanityCheckFail(bb,stmt,"Ist.LLSC(LL).result :: bogus");
} else {
/* it's a SC */
if (tyRes != Ity_I1)
sanityCheckFail(bb,stmt,"Ist.LLSC(SC).result: not :: Ity_I1");
tyData = typeOfIRExpr(tyenv, stmt->Ist.LLSC.storedata);
- if (tyData != Ity_I64 && tyData != Ity_I32 && tyData != Ity_I8)
+ if (tyData != Ity_I64 && tyData != Ity_I32
+ && tyData != Ity_I16 && tyData != Ity_I8)
sanityCheckFail(bb,stmt,
"Ist.LLSC(SC).result :: storedata bogus");
}
@@ -3259,7 +3418,7 @@
break;
case Ist_MBE:
switch (stmt->Ist.MBE.event) {
- case Imbe_Fence:
+ case Imbe_Fence: case Imbe_CancelReservation:
break;
default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown");
break;
@@ -3416,6 +3575,8 @@
case Ico_U16: return toBool( c1->Ico.U16 == c2->Ico.U16 );
case Ico_U32: return toBool( c1->Ico.U32 == c2->Ico.U32 );
case Ico_U64: return toBool( c1->Ico.U64 == c2->Ico.U64 );
+ case Ico_F32: return toBool( c1->Ico.F32 == c2->Ico.F32 );
+ case Ico_F32i: return toBool( c1->Ico.F32i == c2->Ico.F32i );
case Ico_F64: return toBool( c1->Ico.F64 == c2->Ico.F64 );
case Ico_F64i: return toBool( c1->Ico.F64i == c2->Ico.F64i );
case Ico_V128: return toBool( c1->Ico.V128 == c2->Ico.V128 );
@@ -3440,6 +3601,7 @@
case Ity_I128: return 16;
case Ity_F32: return 4;
case Ity_F64: return 8;
+ case Ity_F128: return 16;
case Ity_V128: return 16;
default: vex_printf("\n"); ppIRType(ty); vex_printf("\n");
vpanic("sizeofIRType");
diff --git a/main/VEX/priv/ir_match.c b/main/VEX/priv/ir_match.c
index fc32f2e..39e483c 100644
--- a/main/VEX/priv/ir_match.c
+++ b/main/VEX/priv/ir_match.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/priv/ir_match.h b/main/VEX/priv/ir_match.h
index 5755505..0db1be7 100644
--- a/main/VEX/priv/ir_match.h
+++ b/main/VEX/priv/ir_match.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/priv/ir_opt.c b/main/VEX/priv/ir_opt.c
index 4730680..cb7f507 100644
--- a/main/VEX/priv/ir_opt.c
+++ b/main/VEX/priv/ir_opt.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -917,6 +917,22 @@
}
}
+/* Is this literally IRExpr_Const(IRConst_U32(0)) ? */
+static Bool isZeroU32 ( IRExpr* e )
+{
+ return toBool( e->tag == Iex_Const
+ && e->Iex.Const.con->tag == Ico_U32
+ && e->Iex.Const.con->Ico.U32 == 0);
+}
+
+/* Is this literally IRExpr_Const(IRConst_U64(0)) ? */
+static Bool isZeroU64 ( IRExpr* e )
+{
+ return toBool( e->tag == Iex_Const
+ && e->Iex.Const.con->tag == Ico_U64
+ && e->Iex.Const.con->Ico.U64 == 0);
+}
+
static Bool notBool ( Bool b )
{
if (b == True) return False;
@@ -956,6 +972,31 @@
}
}
+/* Helpers for folding Clz32/64. */
+static UInt fold_Clz64 ( ULong value )
+{
+ UInt i;
+ vassert(value != 0ULL); /* no defined semantics for arg==0 */
+ for (i = 0; i < 64; ++i) {
+ if (0ULL != (value & (((ULong)1) << (63 - i)))) return i;
+ }
+ vassert(0);
+ /*NOTREACHED*/
+ return 0;
+}
+
+static UInt fold_Clz32 ( UInt value )
+{
+ UInt i;
+ vassert(value != 0); /* no defined semantics for arg==0 */
+ for (i = 0; i < 32; ++i) {
+ if (0 != (value & (((UInt)1) << (31 - i)))) return i;
+ }
+ vassert(0);
+ /*NOTREACHED*/
+ return 0;
+}
+
static IRExpr* fold_Expr ( IRExpr* e )
{
@@ -1010,6 +1051,13 @@
e2 = IRExpr_Const(IRConst_U32((UInt)s32));
break;
}
+ case Iop_16Sto32: {
+ /* signed */ Int s32 = e->Iex.Unop.arg->Iex.Const.con->Ico.U16;
+ s32 <<= 16;
+ s32 >>= 16;
+ e2 = IRExpr_Const(IRConst_U32( (UInt)s32) );
+ break;
+ }
case Iop_8Uto64:
e2 = IRExpr_Const(IRConst_U64(
0xFFULL & e->Iex.Unop.arg->Iex.Const.con->Ico.U8));
@@ -1022,6 +1070,17 @@
e2 = IRExpr_Const(IRConst_U32(
0xFF & e->Iex.Unop.arg->Iex.Const.con->Ico.U8));
break;
+ case Iop_8Sto16: {
+ /* signed */ Short s16 = e->Iex.Unop.arg->Iex.Const.con->Ico.U8;
+ s16 <<= 8;
+ s16 >>= 8;
+ e2 = IRExpr_Const(IRConst_U16( (UShort)s16) );
+ break;
+ }
+ case Iop_8Uto16:
+ e2 = IRExpr_Const(IRConst_U16(
+ 0xFF & e->Iex.Unop.arg->Iex.Const.con->Ico.U8));
+ break;
case Iop_16Uto32:
e2 = IRExpr_Const(IRConst_U32(
0xFFFF & e->Iex.Unop.arg->Iex.Const.con->Ico.U16));
@@ -1096,6 +1155,13 @@
0xFFFFFFFFULL
& e->Iex.Unop.arg->Iex.Const.con->Ico.U32));
break;
+ case Iop_16Sto64: {
+ /* signed */ Long s64 = e->Iex.Unop.arg->Iex.Const.con->Ico.U16;
+ s64 <<= 48;
+ s64 >>= 48;
+ e2 = IRExpr_Const(IRConst_U64((ULong)s64));
+ break;
+ }
case Iop_32Sto64: {
/* signed */ Long s64 = e->Iex.Unop.arg->Iex.Const.con->Ico.U32;
s64 <<= 32;
@@ -1103,6 +1169,21 @@
e2 = IRExpr_Const(IRConst_U64((ULong)s64));
break;
}
+
+ case Iop_16to8: {
+ UShort w16 = e->Iex.Unop.arg->Iex.Const.con->Ico.U16;
+ w16 &= 0xFF;
+ e2 = IRExpr_Const(IRConst_U8( (UChar)w16 ));
+ break;
+ }
+ case Iop_16HIto8: {
+ UShort w16 = e->Iex.Unop.arg->Iex.Const.con->Ico.U16;
+ w16 >>= 8;
+ w16 &= 0xFF;
+ e2 = IRExpr_Const(IRConst_U8( (UChar)w16 ));
+ break;
+ }
+
case Iop_CmpNEZ8:
e2 = IRExpr_Const(IRConst_U1(toBool(
0 !=
@@ -1154,6 +1235,19 @@
break;
}
+ case Iop_Clz32: {
+ UInt u32 = e->Iex.Unop.arg->Iex.Const.con->Ico.U32;
+ if (u32 != 0)
+ e2 = IRExpr_Const(IRConst_U32(fold_Clz32(u32)));
+ break;
+ }
+ case Iop_Clz64: {
+ ULong u64 = e->Iex.Unop.arg->Iex.Const.con->Ico.U64;
+ if (u64 != 0ULL)
+ e2 = IRExpr_Const(IRConst_U64(fold_Clz64(u64)));
+ break;
+ }
+
default:
goto unhandled;
}
@@ -1216,6 +1310,11 @@
(e->Iex.Binop.arg1->Iex.Const.con->Ico.U8
& e->Iex.Binop.arg2->Iex.Const.con->Ico.U8))));
break;
+ case Iop_And16:
+ e2 = IRExpr_Const(IRConst_U16(toUShort(
+ (e->Iex.Binop.arg1->Iex.Const.con->Ico.U16
+ & e->Iex.Binop.arg2->Iex.Const.con->Ico.U16))));
+ break;
case Iop_And32:
e2 = IRExpr_Const(IRConst_U32(
(e->Iex.Binop.arg1->Iex.Const.con->Ico.U32
@@ -1401,6 +1500,11 @@
((UInt)(e->Iex.Binop.arg1->Iex.Const.con->Ico.U32)
<= (UInt)(e->Iex.Binop.arg2->Iex.Const.con->Ico.U32)))));
break;
+ case Iop_CmpLE64U:
+ e2 = IRExpr_Const(IRConst_U1(toBool(
+ ((ULong)(e->Iex.Binop.arg1->Iex.Const.con->Ico.U64)
+ <= (ULong)(e->Iex.Binop.arg2->Iex.Const.con->Ico.U64)))));
+ break;
/* -- CmpLES -- */
case Iop_CmpLE32S:
@@ -1408,6 +1512,11 @@
((Int)(e->Iex.Binop.arg1->Iex.Const.con->Ico.U32)
<= (Int)(e->Iex.Binop.arg2->Iex.Const.con->Ico.U32)))));
break;
+ case Iop_CmpLE64S:
+ e2 = IRExpr_Const(IRConst_U1(toBool(
+ ((Long)(e->Iex.Binop.arg1->Iex.Const.con->Ico.U64)
+ <= (Long)(e->Iex.Binop.arg2->Iex.Const.con->Ico.U64)))));
+ break;
/* -- CmpLTS -- */
case Iop_CmpLT32S:
@@ -1415,6 +1524,11 @@
((Int)(e->Iex.Binop.arg1->Iex.Const.con->Ico.U32)
< (Int)(e->Iex.Binop.arg2->Iex.Const.con->Ico.U32)))));
break;
+ case Iop_CmpLT64S:
+ e2 = IRExpr_Const(IRConst_U1(toBool(
+ ((Long)(e->Iex.Binop.arg1->Iex.Const.con->Ico.U64)
+ < (Long)(e->Iex.Binop.arg2->Iex.Const.con->Ico.U64)))));
+ break;
/* -- CmpLTU -- */
case Iop_CmpLT32U:
@@ -1422,6 +1536,11 @@
((UInt)(e->Iex.Binop.arg1->Iex.Const.con->Ico.U32)
< (UInt)(e->Iex.Binop.arg2->Iex.Const.con->Ico.U32)))));
break;
+ case Iop_CmpLT64U:
+ e2 = IRExpr_Const(IRConst_U1(toBool(
+ ((ULong)(e->Iex.Binop.arg1->Iex.Const.con->Ico.U64)
+ < (ULong)(e->Iex.Binop.arg2->Iex.Const.con->Ico.U64)))));
+ break;
/* -- CmpORD -- */
case Iop_CmpORD32S: {
@@ -1491,11 +1610,18 @@
e2 = e->Iex.Binop.arg1;
} else
- /* Or32/Add32/Max32U(x,0) ==> x */
- if ((e->Iex.Binop.op == Iop_Add32
- || e->Iex.Binop.op == Iop_Or32 || e->Iex.Binop.op == Iop_Max32U)
- && e->Iex.Binop.arg2->tag == Iex_Const
- && e->Iex.Binop.arg2->Iex.Const.con->Ico.U32 == 0) {
+ /* Or32/Add32/Max32U(x,0) ==> x
+ Or32/Add32/Max32U(0,x) ==> x */
+ if (e->Iex.Binop.op == Iop_Add32
+ || e->Iex.Binop.op == Iop_Or32 || e->Iex.Binop.op == Iop_Max32U) {
+ if (isZeroU32(e->Iex.Binop.arg2))
+ e2 = e->Iex.Binop.arg1;
+ else if (isZeroU32(e->Iex.Binop.arg1))
+ e2 = e->Iex.Binop.arg2;
+ } else
+
+ /* Sub64(x,0) ==> x */
+ if (e->Iex.Binop.op == Iop_Sub64 && isZeroU64(e->Iex.Binop.arg2)) {
e2 = e->Iex.Binop.arg1;
} else
@@ -1536,11 +1662,13 @@
} else
/* NB no Add16(t,t) case yet as no known test case exists */
- /* Or64/Add64(x,0) ==> x */
- if ((e->Iex.Binop.op == Iop_Add64 || e->Iex.Binop.op == Iop_Or64)
- && e->Iex.Binop.arg2->tag == Iex_Const
- && e->Iex.Binop.arg2->Iex.Const.con->Ico.U64 == 0) {
- e2 = e->Iex.Binop.arg1;
+ /* Or64/Add64(x,0) ==> x
+ Or64/Add64(0,x) ==> x */
+ if (e->Iex.Binop.op == Iop_Add64 || e->Iex.Binop.op == Iop_Or64) {
+ if (isZeroU64(e->Iex.Binop.arg2))
+ e2 = e->Iex.Binop.arg1;
+ else if (isZeroU64(e->Iex.Binop.arg1))
+ e2 = e->Iex.Binop.arg2;
} else
/* And32(x,0xFFFFFFFF) ==> x */
@@ -1571,20 +1699,6 @@
e2 = e->Iex.Binop.arg2;
} else
- /* Or32/Max32U(0,x) ==> x */
- if ((e->Iex.Binop.op == Iop_Or32 || e->Iex.Binop.op == Iop_Max32U)
- && e->Iex.Binop.arg1->tag == Iex_Const
- && e->Iex.Binop.arg1->Iex.Const.con->Ico.U32 == 0) {
- e2 = e->Iex.Binop.arg2;
- } else
-
- /* Or64(0,x) ==> x */
- if (e->Iex.Binop.op == Iop_Or64
- && e->Iex.Binop.arg1->tag == Iex_Const
- && e->Iex.Binop.arg1->Iex.Const.con->Ico.U64 == 0) {
- e2 = e->Iex.Binop.arg2;
- } else
-
/* Or8/16/32/64/V128(t,t) ==> t, for some IRTemp t */
/* And8/16/32/64(t,t) ==> t, for some IRTemp t */
/* Max32U(t,t) ==> t, for some IRTemp t */
@@ -1894,7 +2008,9 @@
}
case Ist_IMark:
- return IRStmt_IMark(st->Ist.IMark.addr, st->Ist.IMark.len);
+ return IRStmt_IMark(st->Ist.IMark.addr,
+ st->Ist.IMark.len,
+ st->Ist.IMark.delta);
case Ist_NoOp:
return IRStmt_NoOp();
@@ -3945,6 +4061,14 @@
IRExpr_Binop( Iop_Or32, a1->Iex.Unop.arg,
a2->Iex.Unop.arg ) );
break;
+
+ case Iop_CmpNE32:
+ /* Since X has type Ity_I1 we can simplify:
+ CmpNE32(1Uto32(X),0)) ==> X */
+ if (is_Unop(a1, Iop_1Uto32) && isZeroU32(a2))
+ return a1->Iex.Unop.arg;
+ break;
+
default:
break;
}
@@ -3987,6 +4111,14 @@
/* CmpNEZ32( Left32(x) ) --> CmpNEZ32(x) */
if (is_Unop(aa, Iop_Left32))
return IRExpr_Unop(Iop_CmpNEZ32, aa->Iex.Unop.arg);
+ /* CmpNEZ32( 1Uto32(X) ) --> X */
+ if (is_Unop(aa, Iop_1Uto32))
+ return aa->Iex.Unop.arg;
+ break;
+ case Iop_CmpNEZ8:
+ /* CmpNEZ8( 1Uto8(X) ) --> X */
+ if (is_Unop(aa, Iop_1Uto8))
+ return aa->Iex.Unop.arg;
break;
case Iop_Left32:
/* Left32( Left32(x) ) --> Left32(x) */
@@ -4166,7 +4298,9 @@
st->Ist.Exit.dst
);
case Ist_IMark:
- return IRStmt_IMark(st->Ist.IMark.addr, st->Ist.IMark.len);
+ return IRStmt_IMark(st->Ist.IMark.addr,
+ st->Ist.IMark.len,
+ st->Ist.IMark.delta);
case Ist_NoOp:
return IRStmt_NoOp();
case Ist_MBE:
@@ -4506,7 +4640,7 @@
case Ity_I1: case Ity_I8: case Ity_I16:
case Ity_I32: case Ity_I64: case Ity_I128:
break;
- case Ity_F32: case Ity_F64: case Ity_V128:
+ case Ity_F32: case Ity_F64: case Ity_F128: case Ity_V128:
*hasVorFtemps = True;
break;
default:
@@ -4611,6 +4745,7 @@
bb = cprop_BB(bb);
bb = spec_helpers_BB ( bb, specHelper );
redundant_put_removal_BB ( bb, preciseMemExnsFn );
+ do_cse_BB( bb );
do_deadcode_BB( bb );
}
diff --git a/main/VEX/priv/ir_opt.h b/main/VEX/priv/ir_opt.h
index ecdb146..9390a1c 100644
--- a/main/VEX/priv/ir_opt.h
+++ b/main/VEX/priv/ir_opt.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/priv/main_globals.c b/main/VEX/priv/main_globals.c
index 716fa75..8da96be 100644
--- a/main/VEX/priv/main_globals.c
+++ b/main/VEX/priv/main_globals.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/priv/main_globals.h b/main/VEX/priv/main_globals.h
index 5b561a3..6404526 100644
--- a/main/VEX/priv/main_globals.h
+++ b/main/VEX/priv/main_globals.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/priv/main_main.c b/main/VEX/priv/main_main.c
index 1e80972..5b818ae 100644
--- a/main/VEX/priv/main_main.c
+++ b/main/VEX/priv/main_main.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -40,6 +40,7 @@
#include "libvex_guest_arm.h"
#include "libvex_guest_ppc32.h"
#include "libvex_guest_ppc64.h"
+#include "libvex_guest_s390x.h"
#include "main_globals.h"
#include "main_util.h"
@@ -50,12 +51,14 @@
#include "host_amd64_defs.h"
#include "host_ppc_defs.h"
#include "host_arm_defs.h"
+#include "host_s390_defs.h"
#include "guest_generic_bb_to_IR.h"
#include "guest_x86_defs.h"
#include "guest_amd64_defs.h"
#include "guest_arm_defs.h"
#include "guest_ppc_defs.h"
+#include "guest_s390_defs.h"
#include "host_generic_simd128.h"
@@ -182,7 +185,7 @@
void (*ppReg) ( HReg );
HInstrArray* (*iselSB) ( IRSB*, VexArch, VexArchInfo*,
VexAbiInfo* );
- Int (*emit) ( UChar*, Int, HInstr*, Bool, void* );
+ Int (*emit) ( UChar*, Int, HInstr*, Bool, void*, void* );
IRExpr* (*specHelper) ( HChar*, IRExpr**, IRStmt**, Int );
Bool (*preciseMemExnsFn) ( Int, Int );
@@ -195,7 +198,7 @@
HInstrArray* rcode;
Int i, j, k, out_used, guest_sizeB;
Int offB_TISTART, offB_TILEN;
- UChar insn_bytes[32];
+ UChar insn_bytes[48];
IRType guest_word_type;
IRType host_word_type;
Bool mode64;
@@ -225,6 +228,8 @@
vex_traceflags = vta->traceflags;
vassert(vex_initdone);
+ vassert(vta->needs_self_check != NULL);
+
vexSetAllocModeTEMP_and_clear();
vexAllocSanityCheck();
@@ -249,11 +254,14 @@
ppInstr = (void(*)(HInstr*, Bool)) ppX86Instr;
ppReg = (void(*)(HReg)) ppHRegX86;
iselSB = iselSB_X86;
- emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_X86Instr;
+ emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*,void*))
+ emit_X86Instr;
host_is_bigendian = False;
host_word_type = Ity_I32;
vassert(are_valid_hwcaps(VexArchX86, vta->archinfo_host.hwcaps));
- vassert(vta->dispatch != NULL); /* jump-to-dispatcher scheme */
+ /* jump-to-dispatcher scheme */
+ vassert(vta->dispatch_unassisted != NULL);
+ vassert(vta->dispatch_assisted != NULL);
break;
case VexArchAMD64:
@@ -271,11 +279,14 @@
ppInstr = (void(*)(HInstr*, Bool)) ppAMD64Instr;
ppReg = (void(*)(HReg)) ppHRegAMD64;
iselSB = iselSB_AMD64;
- emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_AMD64Instr;
+ emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*,void*))
+ emit_AMD64Instr;
host_is_bigendian = False;
host_word_type = Ity_I64;
vassert(are_valid_hwcaps(VexArchAMD64, vta->archinfo_host.hwcaps));
- vassert(vta->dispatch != NULL); /* jump-to-dispatcher scheme */
+ /* jump-to-dispatcher scheme */
+ vassert(vta->dispatch_unassisted != NULL);
+ vassert(vta->dispatch_assisted != NULL);
break;
case VexArchPPC32:
@@ -290,11 +301,14 @@
ppInstr = (void(*)(HInstr*,Bool)) ppPPCInstr;
ppReg = (void(*)(HReg)) ppHRegPPC;
iselSB = iselSB_PPC;
- emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_PPCInstr;
+ emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*,void*))
+ emit_PPCInstr;
host_is_bigendian = True;
host_word_type = Ity_I32;
vassert(are_valid_hwcaps(VexArchPPC32, vta->archinfo_host.hwcaps));
- vassert(vta->dispatch == NULL); /* return-to-dispatcher scheme */
+ /* return-to-dispatcher scheme */
+ vassert(vta->dispatch_unassisted == NULL);
+ vassert(vta->dispatch_assisted == NULL);
break;
case VexArchPPC64:
@@ -309,11 +323,36 @@
ppInstr = (void(*)(HInstr*, Bool)) ppPPCInstr;
ppReg = (void(*)(HReg)) ppHRegPPC;
iselSB = iselSB_PPC;
- emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_PPCInstr;
+ emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*,void*))
+ emit_PPCInstr;
host_is_bigendian = True;
host_word_type = Ity_I64;
vassert(are_valid_hwcaps(VexArchPPC64, vta->archinfo_host.hwcaps));
- vassert(vta->dispatch == NULL); /* return-to-dispatcher scheme */
+ /* return-to-dispatcher scheme */
+ vassert(vta->dispatch_unassisted == NULL);
+ vassert(vta->dispatch_assisted == NULL);
+ break;
+
+ case VexArchS390X:
+ mode64 = True;
+ getAllocableRegs_S390 ( &n_available_real_regs,
+ &available_real_regs, mode64 );
+ isMove = (Bool(*)(HInstr*,HReg*,HReg*)) isMove_S390Instr;
+ getRegUsage = (void(*)(HRegUsage*,HInstr*, Bool)) getRegUsage_S390Instr;
+ mapRegs = (void(*)(HRegRemap*,HInstr*, Bool)) mapRegs_S390Instr;
+ genSpill = (void(*)(HInstr**,HInstr**,HReg,Int,Bool)) genSpill_S390;
+ genReload = (void(*)(HInstr**,HInstr**,HReg,Int,Bool)) genReload_S390;
+ ppInstr = (void(*)(HInstr*, Bool)) ppS390Instr;
+ ppReg = (void(*)(HReg)) ppHRegS390;
+ iselSB = iselSB_S390;
+ emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*,void*))
+ emit_S390Instr;
+ host_is_bigendian = True;
+ host_word_type = Ity_I64;
+ vassert(are_valid_hwcaps(VexArchS390X, vta->archinfo_host.hwcaps));
+ /* return-to-dispatcher scheme */
+ vassert(vta->dispatch_unassisted == NULL);
+ vassert(vta->dispatch_assisted == NULL);
break;
case VexArchARM:
@@ -328,11 +367,14 @@
ppInstr = (void(*)(HInstr*, Bool)) ppARMInstr;
ppReg = (void(*)(HReg)) ppHRegARM;
iselSB = iselSB_ARM;
- emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_ARMInstr;
+ emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*,void*))
+ emit_ARMInstr;
host_is_bigendian = False;
host_word_type = Ity_I32;
vassert(are_valid_hwcaps(VexArchARM, vta->archinfo_host.hwcaps));
- vassert(vta->dispatch == NULL); /* return-to-dispatcher scheme */
+ vassert(vta->dispatch_unassisted == NULL);
+ vassert(vta->dispatch_assisted == NULL);
+ /* return-to-dispatcher scheme */
break;
default:
@@ -407,6 +449,22 @@
vassert(sizeof( ((VexGuestPPC64State*)0)->guest_NRADDR_GPR2) == 8);
break;
+ case VexArchS390X:
+ preciseMemExnsFn = guest_s390x_state_requires_precise_mem_exns;
+ disInstrFn = disInstr_S390;
+ specHelper = guest_s390x_spechelper;
+ guest_sizeB = sizeof(VexGuestS390XState);
+ guest_word_type = Ity_I64;
+ guest_layout = &s390xGuest_layout;
+ offB_TISTART = offsetof(VexGuestS390XState,guest_TISTART);
+ offB_TILEN = offsetof(VexGuestS390XState,guest_TILEN);
+ vassert(are_valid_hwcaps(VexArchS390X, vta->archinfo_guest.hwcaps));
+ vassert(0 == sizeof(VexGuestS390XState) % 16);
+ vassert(sizeof( ((VexGuestS390XState*)0)->guest_TISTART ) == 8);
+ vassert(sizeof( ((VexGuestS390XState*)0)->guest_TILEN ) == 8);
+ vassert(sizeof( ((VexGuestS390XState*)0)->guest_NRADDR ) == 8);
+ break;
+
case VexArchARM:
preciseMemExnsFn = guest_arm_state_requires_precise_mem_exns;
disInstrFn = disInstr_ARM;
@@ -427,6 +485,11 @@
vpanic("LibVEX_Translate: unsupported guest insn set");
}
+ /* Set up result struct. */
+ VexTranslateResult res;
+ res.status = VexTransOK;
+ res.n_sc_extents = 0;
+
/* yet more sanity checks ... */
if (vta->arch_guest == vta->arch_host) {
/* doesn't necessarily have to be true, but if it isn't it means
@@ -443,6 +506,7 @@
"------------------------\n\n");
irsb = bb_to_IR ( vta->guest_extents,
+ &res.n_sc_extents,
vta->callback_opaque,
disInstrFn,
vta->guest_bytes,
@@ -453,7 +517,7 @@
&vta->archinfo_guest,
&vta->abiinfo_both,
guest_word_type,
- vta->do_self_check,
+ vta->needs_self_check,
vta->preamble_function,
offB_TISTART,
offB_TILEN );
@@ -464,7 +528,7 @@
/* Access failure. */
vexSetAllocModeTEMP_and_clear();
vex_traceflags = 0;
- return VexTransAccessFail;
+ res.status = VexTransAccessFail; return res;
}
vassert(vta->guest_extents->n_used >= 1 && vta->guest_extents->n_used <= 3);
@@ -580,7 +644,10 @@
}
/* HACK */
- if (0) { *(vta->host_bytes_used) = 0; return VexTransOK; }
+ if (0) {
+ *(vta->host_bytes_used) = 0;
+ res.status = VexTransOK; return res;
+ }
/* end HACK */
if (vex_traceflags & VEX_TRACE_VCODE)
@@ -628,7 +695,10 @@
}
/* HACK */
- if (0) { *(vta->host_bytes_used) = 0; return VexTransOK; }
+ if (0) {
+ *(vta->host_bytes_used) = 0;
+ res.status = VexTransOK; return res;
+ }
/* end HACK */
/* Assemble */
@@ -644,7 +714,8 @@
ppInstr(rcode->arr[i], mode64);
vex_printf("\n");
}
- j = (*emit)( insn_bytes, 32, rcode->arr[i], mode64, vta->dispatch );
+ j = (*emit)( insn_bytes, sizeof insn_bytes, rcode->arr[i], mode64,
+ vta->dispatch_unassisted, vta->dispatch_assisted );
if (vex_traceflags & VEX_TRACE_ASM) {
for (k = 0; k < j; k++)
if (insn_bytes[k] < 16)
@@ -656,7 +727,8 @@
if (out_used + j > vta->host_bytes_size) {
vexSetAllocModeTEMP_and_clear();
vex_traceflags = 0;
- return VexTransOutputFull;
+ res.status = VexTransOutputFull;
+ return res;
}
for (k = 0; k < j; k++) {
vta->host_bytes[out_used] = insn_bytes[k];
@@ -671,7 +743,8 @@
vexSetAllocModeTEMP_and_clear();
vex_traceflags = 0;
- return VexTransOK;
+ res.status = VexTransOK;
+ return res;
}
@@ -716,6 +789,7 @@
case VexArchARM: return "ARM";
case VexArchPPC32: return "PPC32";
case VexArchPPC64: return "PPC64";
+ case VexArchS390X: return "S390X";
default: return "VexArch???";
}
}
@@ -815,6 +889,7 @@
const UInt V = VEX_HWCAPS_PPC32_V;
const UInt FX = VEX_HWCAPS_PPC32_FX;
const UInt GX = VEX_HWCAPS_PPC32_GX;
+ const UInt VX = VEX_HWCAPS_PPC32_VX;
UInt c = hwcaps;
if (c == 0) return "ppc32-int";
if (c == F) return "ppc32-int-flt";
@@ -825,6 +900,7 @@
if (c == (F|V|FX)) return "ppc32-int-flt-vmx-FX";
if (c == (F|V|GX)) return "ppc32-int-flt-vmx-GX";
if (c == (F|V|FX|GX)) return "ppc32-int-flt-vmx-FX-GX";
+ if (c == (F|V|FX|GX|VX)) return "ppc32-int-flt-vmx-FX-GX-VX";
return NULL;
}
@@ -835,6 +911,7 @@
const UInt V = VEX_HWCAPS_PPC64_V;
const UInt FX = VEX_HWCAPS_PPC64_FX;
const UInt GX = VEX_HWCAPS_PPC64_GX;
+ const UInt VX = VEX_HWCAPS_PPC64_VX;
UInt c = hwcaps;
if (c == 0) return "ppc64-int-flt";
if (c == FX) return "ppc64-int-flt-FX";
@@ -844,6 +921,7 @@
if (c == (V|FX)) return "ppc64-int-flt-vmx-FX";
if (c == (V|GX)) return "ppc64-int-flt-vmx-GX";
if (c == (V|FX|GX)) return "ppc64-int-flt-vmx-FX-GX";
+ if (c == (V|FX|GX|VX)) return "ppc64-int-flt-vmx-FX-GX-VX";
return NULL;
}
@@ -887,6 +965,42 @@
return NULL;
}
+static HChar* show_hwcaps_s390x ( UInt hwcaps )
+{
+ static const HChar prefix[] = "s390x";
+ static const HChar facilities[][6] = {
+ { "ldisp" },
+ { "eimm" },
+ { "gie" },
+ { "dfp" },
+ { "fgx" },
+ };
+ static HChar buf[sizeof facilities + sizeof prefix + 1];
+ static HChar *p;
+
+ if (buf[0] != '\0') return buf; /* already constructed */
+
+ hwcaps = VEX_HWCAPS_S390X(hwcaps);
+
+ p = buf + vex_sprintf(buf, "%s", prefix);
+ if (hwcaps & VEX_HWCAPS_S390X_LDISP)
+ p = p + vex_sprintf(p, "-%s", facilities[0]);
+ if (hwcaps & VEX_HWCAPS_S390X_EIMM)
+ p = p + vex_sprintf(p, "-%s", facilities[1]);
+ if (hwcaps & VEX_HWCAPS_S390X_GIE)
+ p = p + vex_sprintf(p, "-%s", facilities[2]);
+ if (hwcaps & VEX_HWCAPS_S390X_DFP)
+ p = p + vex_sprintf(p, "-%s", facilities[3]);
+ if (hwcaps & VEX_HWCAPS_S390X_FGX)
+ p = p + vex_sprintf(p, "-%s", facilities[4]);
+
+ /* If there are no facilities, add "zarch" */
+ if (hwcaps == 0)
+ vex_sprintf(p, "-%s", "zarch");
+
+ return buf;
+}
+
/* ---- */
static HChar* show_hwcaps ( VexArch arch, UInt hwcaps )
{
@@ -896,6 +1010,7 @@
case VexArchPPC32: return show_hwcaps_ppc32(hwcaps);
case VexArchPPC64: return show_hwcaps_ppc64(hwcaps);
case VexArchARM: return show_hwcaps_arm(hwcaps);
+ case VexArchS390X: return show_hwcaps_s390x(hwcaps);
default: return NULL;
}
}
diff --git a/main/VEX/priv/main_util.c b/main/VEX/priv/main_util.c
index d12380e..618254b 100644
--- a/main/VEX/priv/main_util.c
+++ b/main/VEX/priv/main_util.c
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -235,7 +235,7 @@
New code for vex_util.c should go above this point. */
#include <stdarg.h>
-static Int vex_strlen ( const HChar* str )
+Int vex_strlen ( const HChar* str )
{
Int i = 0;
while (str[i] != 0) i++;
diff --git a/main/VEX/priv/main_util.h b/main/VEX/priv/main_util.h
index 1392b4b..914dc64 100644
--- a/main/VEX/priv/main_util.h
+++ b/main/VEX/priv/main_util.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -43,13 +43,15 @@
#define NULL ((void*)0)
+#define LIKELY(x) __builtin_expect(!!(x), 1)
+#define UNLIKELY(x) __builtin_expect(!!(x), 0)
/* Stuff for panicking and assertion. */
#define VG__STRING(__str) #__str
#define vassert(expr) \
- ((void) ((expr) ? 0 : \
+ ((void) (LIKELY(expr) ? 0 : \
(vex_assert_fail (VG__STRING(expr), \
__FILE__, __LINE__, \
__PRETTY_FUNCTION__), 0)))
@@ -73,6 +75,7 @@
/* String ops */
extern Bool vex_streq ( const HChar* s1, const HChar* s2 );
+extern Int vex_strlen ( const HChar* str );
/* Storage management: clear the area, and allocate from it. */
diff --git a/main/VEX/pub/libvex.h b/main/VEX/pub/libvex.h
index a9e9bce..e2933c9 100644
--- a/main/VEX/pub/libvex.h
+++ b/main/VEX/pub/libvex.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -56,7 +56,8 @@
VexArchAMD64,
VexArchARM,
VexArchPPC32,
- VexArchPPC64
+ VexArchPPC64,
+ VexArchS390X
}
VexArch;
@@ -86,12 +87,57 @@
#define VEX_HWCAPS_PPC32_FX (1<<10) /* FP extns (fsqrt, fsqrts) */
#define VEX_HWCAPS_PPC32_GX (1<<11) /* Graphics extns
(fres,frsqrte,fsel,stfiwx) */
+#define VEX_HWCAPS_PPC32_VX (1<<12) /* Vector-scalar floating-point (VSX); implies ISA 2.06 or higher */
/* ppc64: baseline capability is integer and basic FP insns */
-#define VEX_HWCAPS_PPC64_V (1<<12) /* Altivec (VMX) */
-#define VEX_HWCAPS_PPC64_FX (1<<13) /* FP extns (fsqrt, fsqrts) */
-#define VEX_HWCAPS_PPC64_GX (1<<14) /* Graphics extns
+#define VEX_HWCAPS_PPC64_V (1<<13) /* Altivec (VMX) */
+#define VEX_HWCAPS_PPC64_FX (1<<14) /* FP extns (fsqrt, fsqrts) */
+#define VEX_HWCAPS_PPC64_GX (1<<15) /* Graphics extns
(fres,frsqrte,fsel,stfiwx) */
+#define VEX_HWCAPS_PPC64_VX (1<<16) /* Vector-scalar floating-point (VSX); implies ISA 2.06 or higher */
+
+/* s390x: Hardware capability encoding
+
+ Bits Information
+ [26:31] Machine model
+ [25] Long displacement facility
+ [24] Extended-immediate facility
+ [23] General-instruction-extension facility
+ [22] Decimal floating point facility
+ [21] FPR-GR transfer facility
+ [0:20] Currently unused; reserved for future use
+*/
+
+/* Model numbers must be assigned in chronological order.
+ They are used as array index. */
+#define VEX_S390X_MODEL_Z900 0
+#define VEX_S390X_MODEL_Z800 1
+#define VEX_S390X_MODEL_Z990 2
+#define VEX_S390X_MODEL_Z890 3
+#define VEX_S390X_MODEL_Z9_EC 4
+#define VEX_S390X_MODEL_Z9_BC 5
+#define VEX_S390X_MODEL_Z10_EC 6
+#define VEX_S390X_MODEL_Z10_BC 7
+#define VEX_S390X_MODEL_Z196 8
+#define VEX_S390X_MODEL_Z114 9
+#define VEX_S390X_MODEL_INVALID 10
+#define VEX_S390X_MODEL_MASK 0x3F
+
+#define VEX_HWCAPS_S390X_LDISP (1<<6) /* Long-displacement facility */
+#define VEX_HWCAPS_S390X_EIMM (1<<7) /* Extended-immediate facility */
+#define VEX_HWCAPS_S390X_GIE (1<<8) /* General-instruction-extension facility */
+#define VEX_HWCAPS_S390X_DFP (1<<9) /* Decimal floating point facility */
+#define VEX_HWCAPS_S390X_FGX (1<<10) /* FPR-GR transfer facility */
+
+/* Special value representing all available s390x hwcaps */
+#define VEX_HWCAPS_S390X_ALL (VEX_HWCAPS_S390X_LDISP | \
+ VEX_HWCAPS_S390X_EIMM | \
+ VEX_HWCAPS_S390X_GIE | \
+ VEX_HWCAPS_S390X_DFP | \
+ VEX_HWCAPS_S390X_FGX)
+
+#define VEX_HWCAPS_S390X(x) ((x) & ~VEX_S390X_MODEL_MASK)
+#define VEX_S390X_MODEL(x) ((x) & VEX_S390X_MODEL_MASK)
/* arm: baseline capability is ARMv4 */
/* Bits 5:0 - architecture level (e.g. 5 for v5, 6 for v6 etc) */
@@ -381,15 +427,25 @@
/* Initialise the library. You must call this first. */
extern void LibVEX_Init (
+
/* failure exit function */
+# if __cplusplus == 1 && __GNUC__ && __GNUC__ <= 3
+ /* g++ 3.x doesn't understand attributes on function parameters.
+ See #265762. */
+# else
__attribute__ ((noreturn))
+# endif
void (*failure_exit) ( void ),
+
/* logging output function */
void (*log_bytes) ( HChar*, Int nbytes ),
+
/* debug paranoia level */
Int debuglevel,
+
/* Are we supporting valgrind checking? */
Bool valgrind_support,
+
/* Control ... */
/*READONLY*/VexControl* vcon
);
@@ -401,10 +457,12 @@
/* Describes the outcome of a translation attempt. */
typedef
- enum {
- VexTransOK,
- VexTransAccessFail,
- VexTransOutputFull
+ struct {
+ /* overall status */
+ enum { VexTransOK,
+ VexTransAccessFail, VexTransOutputFull } status;
+ /* The number of extents that have a self-check (0 to 3) */
+ UInt n_sc_extents;
}
VexTranslateResult;
@@ -480,8 +538,13 @@
IRSB* (*finaltidy) ( IRSB* );
- /* IN: should this translation be self-checking? default: False */
- Bool do_self_check;
+ /* IN: a callback used to ask the caller which of the extents,
+ if any, a self check is required for. Must not be NULL.
+ The returned value is a bitmask with a 1 in position i indicating
+ that the i'th extent needs a check. Since there can be at most
+ 3 extents, the returned values must be between 0 and 7. */
+ UInt (*needs_self_check)( /*callback_opaque*/void*,
+ VexGuestExtents* );
/* IN: optionally, a callback which allows the caller to add its
own IR preamble following the self-check and any other
@@ -497,8 +560,8 @@
/* IN: debug: trace vex activity at various points */
Int traceflags;
- /* IN: address of the dispatcher entry point. Describes the
- place where generated code should jump to at the end of each
+ /* IN: address of the dispatcher entry points. Describes the
+ places where generated code should jump to at the end of each
bb.
At the end of each translation, the next guest address is
@@ -512,19 +575,26 @@
control; caller supplies this) in the following way:
- On host archs which lack a link register (x86, amd64), by a
- jump to the host address specified in 'dispatcher', which
- must be non-NULL.
+ jump to the host address specified in
+ 'dispatcher_assisted', if the guest state pointer has been
+ changed so as to request some action before the next block
+ is run, or 'dispatcher_unassisted' (the fast path), in
+ which it is assumed that the guest state pointer is
+ unchanged and we wish to continue directly with the next
+ translation. Both of these must be non-NULL.
- On host archs which have a link register (ppc32, ppc64), by
a branch to the link register (which is guaranteed to be
unchanged from whatever it was at entry to the
- translation). 'dispatch' must be NULL.
+ translation). 'dispatch_assisted' and
+ 'dispatch_unassisted' must be NULL.
The aim is to get back and forth between translations and the
dispatcher without creating memory traffic to store return
addresses.
*/
- void* dispatch;
+ void* dispatch_unassisted;
+ void* dispatch_assisted;
}
VexTranslateArgs;
diff --git a/main/VEX/pub/libvex_basictypes.h b/main/VEX/pub/libvex_basictypes.h
index a945913..4731d71 100644
--- a/main/VEX/pub/libvex_basictypes.h
+++ b/main/VEX/pub/libvex_basictypes.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -130,26 +130,46 @@
and ULong_to_Ptr in a way that doesn't cause compilers to complain.
These functions allow us to cast pointers to and from 64-bit
integers without complaints from compilers, regardless of the host
- word size. */
+ word size.
+
+ Also set up VEX_REGPARM.
+*/
#undef VEX_HOST_WORDSIZE
+#undef VEX_REGPARM
/* The following 4 work OK for Linux. */
#if defined(__x86_64__)
# define VEX_HOST_WORDSIZE 8
+# define VEX_REGPARM(_n) /* */
+
#elif defined(__i386__)
# define VEX_HOST_WORDSIZE 4
+# define VEX_REGPARM(_n) __attribute__((regparm(_n)))
+
#elif defined(__powerpc__) && defined(__powerpc64__)
# define VEX_HOST_WORDSIZE 8
+# define VEX_REGPARM(_n) /* */
+
#elif defined(__powerpc__) && !defined(__powerpc64__)
# define VEX_HOST_WORDSIZE 4
+# define VEX_REGPARM(_n) /* */
+
#elif defined(__arm__)
# define VEX_HOST_WORDSIZE 4
+# define VEX_REGPARM(_n) /* */
#elif defined(_AIX) && !defined(__64BIT__)
# define VEX_HOST_WORDSIZE 4
+# define VEX_REGPARM(_n) /* */
+
#elif defined(_AIX) && defined(__64BIT__)
# define VEX_HOST_WORDSIZE 8
+# define VEX_REGPARM(_n) /* */
+
+#elif defined(__s390x__)
+# define VEX_HOST_WORDSIZE 8
+# define VEX_REGPARM(_n) /* */
#else
# error "Vex: Fatal: Can't establish the host architecture"
diff --git a/main/VEX/pub/libvex_emwarn.h b/main/VEX/pub/libvex_emwarn.h
index 0bf263f..114388b 100644
--- a/main/VEX/pub/libvex_emwarn.h
+++ b/main/VEX/pub/libvex_emwarn.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/pub/libvex_guest_amd64.h b/main/VEX/pub/libvex_guest_amd64.h
index c37e6c8..564f6a0 100644
--- a/main/VEX/pub/libvex_guest_amd64.h
+++ b/main/VEX/pub/libvex_guest_amd64.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/pub/libvex_guest_arm.h b/main/VEX/pub/libvex_guest_arm.h
index d7b47e0..b6a6a4f 100644
--- a/main/VEX/pub/libvex_guest_arm.h
+++ b/main/VEX/pub/libvex_guest_arm.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/pub/libvex_guest_offsets.h b/main/VEX/pub/libvex_guest_offsets.h
index 333482d..6cf2d83 100644
--- a/main/VEX/pub/libvex_guest_offsets.h
+++ b/main/VEX/pub/libvex_guest_offsets.h
@@ -41,8 +41,8 @@
#define OFFSET_ppc32_GPR8 32
#define OFFSET_ppc32_GPR9 36
#define OFFSET_ppc32_GPR10 40
-#define OFFSET_ppc32_CIA 896
-#define OFFSET_ppc32_CR0_0 913
+#define OFFSET_ppc32_CIA 1152
+#define OFFSET_ppc32_CR0_0 1169
#define OFFSET_ppc64_GPR0 0
#define OFFSET_ppc64_GPR1 8
#define OFFSET_ppc64_GPR2 16
@@ -54,8 +54,8 @@
#define OFFSET_ppc64_GPR8 64
#define OFFSET_ppc64_GPR9 72
#define OFFSET_ppc64_GPR10 80
-#define OFFSET_ppc64_CIA 1024
-#define OFFSET_ppc64_CR0_0 1053
+#define OFFSET_ppc64_CIA 1280
+#define OFFSET_ppc64_CR0_0 1309
#define OFFSET_arm_R0 0
#define OFFSET_arm_R1 4
#define OFFSET_arm_R2 8
@@ -66,3 +66,14 @@
#define OFFSET_arm_R13 52
#define OFFSET_arm_R14 56
#define OFFSET_arm_R15T 60
+#define OFFSET_s390x_r2 208
+#define OFFSET_s390x_r3 216
+#define OFFSET_s390x_r4 224
+#define OFFSET_s390x_r5 232
+#define OFFSET_s390x_r6 240
+#define OFFSET_s390x_r7 248
+#define OFFSET_s390x_r15 312
+#define OFFSET_s390x_IA 336
+#define OFFSET_s390x_SYSNO 344
+#define OFFSET_s390x_IP_AT_SYSCALL 408
+#define OFFSET_s390x_fpc 328
diff --git a/main/VEX/pub/libvex_guest_ppc32.h b/main/VEX/pub/libvex_guest_ppc32.h
index 3353319..00b7649 100644
--- a/main/VEX/pub/libvex_guest_ppc32.h
+++ b/main/VEX/pub/libvex_guest_ppc32.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -82,120 +82,128 @@
/* 120 */ UInt guest_GPR30;
/* 124 */ UInt guest_GPR31;
- // Floating Point Registers
- /* 128 */ ULong guest_FPR0;
- /* 136 */ ULong guest_FPR1;
- /* 144 */ ULong guest_FPR2;
- /* 152 */ ULong guest_FPR3;
- /* 160 */ ULong guest_FPR4;
- /* 168 */ ULong guest_FPR5;
- /* 176 */ ULong guest_FPR6;
- /* 184 */ ULong guest_FPR7;
- /* 192 */ ULong guest_FPR8;
- /* 200 */ ULong guest_FPR9;
- /* 208 */ ULong guest_FPR10;
- /* 216 */ ULong guest_FPR11;
- /* 224 */ ULong guest_FPR12;
- /* 232 */ ULong guest_FPR13;
- /* 240 */ ULong guest_FPR14;
- /* 248 */ ULong guest_FPR15;
- /* 256 */ ULong guest_FPR16;
- /* 264 */ ULong guest_FPR17;
- /* 272 */ ULong guest_FPR18;
- /* 280 */ ULong guest_FPR19;
- /* 288 */ ULong guest_FPR20;
- /* 296 */ ULong guest_FPR21;
- /* 304 */ ULong guest_FPR22;
- /* 312 */ ULong guest_FPR23;
- /* 320 */ ULong guest_FPR24;
- /* 328 */ ULong guest_FPR25;
- /* 336 */ ULong guest_FPR26;
- /* 344 */ ULong guest_FPR27;
- /* 352 */ ULong guest_FPR28;
- /* 360 */ ULong guest_FPR29;
- /* 368 */ ULong guest_FPR30;
- /* 376 */ ULong guest_FPR31;
+ // Vector Registers, Floating Point Registers, and VSX Registers
+ // With ISA 2.06, the "Vector-Scalar Floating-point" category
+ // provides facilities to support vector and scalar binary floating-
+ // point operations. A unified register file is an integral part
+ // of this new facility, combining floating point and vector registers
+ // using a 64x128-bit vector. These are referred to as VSR[0..63].
+ // The floating point registers are now mapped into double word element 0
+ // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector
+ // Facility [Category: Vector]" are now mapped to VSR[32..63].
- // Vector Registers
// IMPORTANT: the user of libvex must place the guest state so as
- // to ensure that guest_VR{0..31}, and any shadows thereof, are
+ // to ensure that guest_VSR{0..63}, and any shadows thereof, are
// 16-aligned.
- /* 384 */ U128 guest_VR0;
- /* 400 */ U128 guest_VR1;
- /* 416 */ U128 guest_VR2;
- /* 432 */ U128 guest_VR3;
- /* 448 */ U128 guest_VR4;
- /* 464 */ U128 guest_VR5;
- /* 480 */ U128 guest_VR6;
- /* 496 */ U128 guest_VR7;
- /* 512 */ U128 guest_VR8;
- /* 528 */ U128 guest_VR9;
- /* 544 */ U128 guest_VR10;
- /* 560 */ U128 guest_VR11;
- /* 576 */ U128 guest_VR12;
- /* 592 */ U128 guest_VR13;
- /* 608 */ U128 guest_VR14;
- /* 624 */ U128 guest_VR15;
- /* 640 */ U128 guest_VR16;
- /* 656 */ U128 guest_VR17;
- /* 672 */ U128 guest_VR18;
- /* 688 */ U128 guest_VR19;
- /* 704 */ U128 guest_VR20;
- /* 720 */ U128 guest_VR21;
- /* 736 */ U128 guest_VR22;
- /* 752 */ U128 guest_VR23;
- /* 768 */ U128 guest_VR24;
- /* 784 */ U128 guest_VR25;
- /* 800 */ U128 guest_VR26;
- /* 816 */ U128 guest_VR27;
- /* 832 */ U128 guest_VR28;
- /* 848 */ U128 guest_VR29;
- /* 864 */ U128 guest_VR30;
- /* 880 */ U128 guest_VR31;
- /* 896 */ UInt guest_CIA; // IP (no arch visible register)
- /* 900 */ UInt guest_LR; // Link Register
- /* 904 */ UInt guest_CTR; // Count Register
+ /* 128 */ U128 guest_VSR0;
+ /* 144 */ U128 guest_VSR1;
+ /* 160 */ U128 guest_VSR2;
+ /* 176 */ U128 guest_VSR3;
+ /* 192 */ U128 guest_VSR4;
+ /* 208 */ U128 guest_VSR5;
+ /* 224 */ U128 guest_VSR6;
+ /* 240 */ U128 guest_VSR7;
+ /* 256 */ U128 guest_VSR8;
+ /* 272 */ U128 guest_VSR9;
+ /* 288 */ U128 guest_VSR10;
+ /* 304 */ U128 guest_VSR11;
+ /* 320 */ U128 guest_VSR12;
+ /* 336 */ U128 guest_VSR13;
+ /* 352 */ U128 guest_VSR14;
+ /* 368 */ U128 guest_VSR15;
+ /* 384 */ U128 guest_VSR16;
+ /* 400 */ U128 guest_VSR17;
+ /* 416 */ U128 guest_VSR18;
+ /* 432 */ U128 guest_VSR19;
+ /* 448 */ U128 guest_VSR20;
+ /* 464 */ U128 guest_VSR21;
+ /* 480 */ U128 guest_VSR22;
+ /* 496 */ U128 guest_VSR23;
+ /* 512 */ U128 guest_VSR24;
+ /* 528 */ U128 guest_VSR25;
+ /* 544 */ U128 guest_VSR26;
+ /* 560 */ U128 guest_VSR27;
+ /* 576 */ U128 guest_VSR28;
+ /* 592 */ U128 guest_VSR29;
+ /* 608 */ U128 guest_VSR30;
+ /* 624 */ U128 guest_VSR31;
+ /* 640 */ U128 guest_VSR32;
+ /* 656 */ U128 guest_VSR33;
+ /* 672 */ U128 guest_VSR34;
+ /* 688 */ U128 guest_VSR35;
+ /* 704 */ U128 guest_VSR36;
+ /* 720 */ U128 guest_VSR37;
+ /* 736 */ U128 guest_VSR38;
+ /* 752 */ U128 guest_VSR39;
+ /* 768 */ U128 guest_VSR40;
+ /* 784 */ U128 guest_VSR41;
+ /* 800 */ U128 guest_VSR42;
+ /* 816 */ U128 guest_VSR43;
+ /* 832 */ U128 guest_VSR44;
+ /* 848 */ U128 guest_VSR45;
+ /* 864 */ U128 guest_VSR46;
+ /* 880 */ U128 guest_VSR47;
+ /* 896 */ U128 guest_VSR48;
+ /* 912 */ U128 guest_VSR49;
+ /* 928 */ U128 guest_VSR50;
+ /* 944 */ U128 guest_VSR51;
+ /* 960 */ U128 guest_VSR52;
+ /* 976 */ U128 guest_VSR53;
+ /* 992 */ U128 guest_VSR54;
+ /* 1008 */ U128 guest_VSR55;
+ /* 1024 */ U128 guest_VSR56;
+ /* 1040 */ U128 guest_VSR57;
+ /* 1056 */ U128 guest_VSR58;
+ /* 1072 */ U128 guest_VSR59;
+ /* 1088 */ U128 guest_VSR60;
+ /* 1104 */ U128 guest_VSR61;
+ /* 1120 */ U128 guest_VSR62;
+ /* 1136 */ U128 guest_VSR63;
+
+ /* 1152 */ UInt guest_CIA; // IP (no arch visible register)
+ /* 1156 */ UInt guest_LR; // Link Register
+ /* 1160 */ UInt guest_CTR; // Count Register
/* XER pieces */
- /* 908 */ UChar guest_XER_SO; /* in lsb */
- /* 909 */ UChar guest_XER_OV; /* in lsb */
- /* 910 */ UChar guest_XER_CA; /* in lsb */
- /* 911 */ UChar guest_XER_BC; /* all bits */
+ /* 1164 */ UChar guest_XER_SO; /* in lsb */
+ /* 1165 */ UChar guest_XER_OV; /* in lsb */
+ /* 1166 */ UChar guest_XER_CA; /* in lsb */
+ /* 1167 */ UChar guest_XER_BC; /* all bits */
/* CR pieces */
- /* 912 */ UChar guest_CR0_321; /* in [3:1] */
- /* 913 */ UChar guest_CR0_0; /* in lsb */
- /* 914 */ UChar guest_CR1_321; /* in [3:1] */
- /* 915 */ UChar guest_CR1_0; /* in lsb */
- /* 916 */ UChar guest_CR2_321; /* in [3:1] */
- /* 917 */ UChar guest_CR2_0; /* in lsb */
- /* 918 */ UChar guest_CR3_321; /* in [3:1] */
- /* 919 */ UChar guest_CR3_0; /* in lsb */
- /* 920 */ UChar guest_CR4_321; /* in [3:1] */
- /* 921 */ UChar guest_CR4_0; /* in lsb */
- /* 922 */ UChar guest_CR5_321; /* in [3:1] */
- /* 923 */ UChar guest_CR5_0; /* in lsb */
- /* 924 */ UChar guest_CR6_321; /* in [3:1] */
- /* 925 */ UChar guest_CR6_0; /* in lsb */
- /* 926 */ UChar guest_CR7_321; /* in [3:1] */
- /* 927 */ UChar guest_CR7_0; /* in lsb */
+ /* 1168 */ UChar guest_CR0_321; /* in [3:1] */
+ /* 1169 */ UChar guest_CR0_0; /* in lsb */
+ /* 1170 */ UChar guest_CR1_321; /* in [3:1] */
+ /* 1171 */ UChar guest_CR1_0; /* in lsb */
+ /* 1172 */ UChar guest_CR2_321; /* in [3:1] */
+ /* 1173 */ UChar guest_CR2_0; /* in lsb */
+ /* 1174 */ UChar guest_CR3_321; /* in [3:1] */
+ /* 1175 */ UChar guest_CR3_0; /* in lsb */
+ /* 1176 */ UChar guest_CR4_321; /* in [3:1] */
+ /* 1177 */ UChar guest_CR4_0; /* in lsb */
+ /* 1178 */ UChar guest_CR5_321; /* in [3:1] */
+ /* 1179 */ UChar guest_CR5_0; /* in lsb */
+ /* 1180 */ UChar guest_CR6_321; /* in [3:1] */
+ /* 1181 */ UChar guest_CR6_0; /* in lsb */
+ /* 1182 */ UChar guest_CR7_321; /* in [3:1] */
+ /* 1183 */ UChar guest_CR7_0; /* in lsb */
/* FP Status & Control Register fields */
- /* 928 */ UInt guest_FPROUND; // FP Rounding Mode
+ /* 1184 */ UInt guest_FPROUND; // FP Rounding Mode
/* Vector Save/Restore Register */
- /* 932 */ UInt guest_VRSAVE;
+ /* 1188 */ UInt guest_VRSAVE;
/* Vector Status and Control Register */
- /* 936 */ UInt guest_VSCR;
+ /* 1192 */ UInt guest_VSCR;
/* Emulation warnings */
- /* 940 */ UInt guest_EMWARN;
+ /* 1196 */ UInt guest_EMWARN;
/* For icbi: record start and length of area to invalidate */
- /* 944 */ UInt guest_TISTART;
- /* 948 */ UInt guest_TILEN;
+ /* 1200 */ UInt guest_TISTART;
+ /* 1204 */ UInt guest_TILEN;
/* Used to record the unredirected guest address at the start of
a translation whose start has been redirected. By reading
@@ -203,27 +211,27 @@
find out what the corresponding no-redirection address was.
Note, this is only set for wrap-style redirects, not for
replace-style ones. */
- /* 952 */ UInt guest_NRADDR;
- /* 956 */ UInt guest_NRADDR_GPR2; /* needed by aix */
+ /* 1208 */ UInt guest_NRADDR;
+ /* 1212 */ UInt guest_NRADDR_GPR2; /* needed by aix */
/* A grows-upwards stack for hidden saves/restores of LR and R2
needed for function interception and wrapping on ppc32-aix5.
A horrible hack. REDIR_SP points to the highest live entry,
and so starts at -1. */
- /* 960 */ UInt guest_REDIR_SP;
- /* 964 */ UInt guest_REDIR_STACK[VEX_GUEST_PPC32_REDIR_STACK_SIZE];
+ /* 1216 */ UInt guest_REDIR_SP;
+ /* 1220 */ UInt guest_REDIR_STACK[VEX_GUEST_PPC32_REDIR_STACK_SIZE];
/* Needed for AIX (but mandated for all guest architectures):
CIA at the last SC insn. Used when backing up to restart a
syscall that has been interrupted by a signal. */
- /* ??? */ UInt guest_IP_AT_SYSCALL;
+ /* 1348 */ UInt guest_IP_AT_SYSCALL;
/* SPRG3, which AIUI is readonly in user space. Needed for
threading on AIX. */
- /* ??? */ UInt guest_SPRG3_RO;
+ /* 1352 */ UInt guest_SPRG3_RO;
/* Padding to make it have an 8-aligned size */
- /* UInt padding; */
+ /* 1356 */ UInt padding;
}
VexGuestPPC32State;
diff --git a/main/VEX/pub/libvex_guest_ppc64.h b/main/VEX/pub/libvex_guest_ppc64.h
index e2afcbb..631791b 100644
--- a/main/VEX/pub/libvex_guest_ppc64.h
+++ b/main/VEX/pub/libvex_guest_ppc64.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -120,123 +120,131 @@
/* 240 */ ULong guest_GPR30;
/* 248 */ ULong guest_GPR31;
- // Floating Point Registers
- /* 256 */ ULong guest_FPR0;
- /* 264 */ ULong guest_FPR1;
- /* 272 */ ULong guest_FPR2;
- /* 280 */ ULong guest_FPR3;
- /* 288 */ ULong guest_FPR4;
- /* 296 */ ULong guest_FPR5;
- /* 304 */ ULong guest_FPR6;
- /* 312 */ ULong guest_FPR7;
- /* 320 */ ULong guest_FPR8;
- /* 328 */ ULong guest_FPR9;
- /* 336 */ ULong guest_FPR10;
- /* 344 */ ULong guest_FPR11;
- /* 352 */ ULong guest_FPR12;
- /* 360 */ ULong guest_FPR13;
- /* 368 */ ULong guest_FPR14;
- /* 376 */ ULong guest_FPR15;
- /* 384 */ ULong guest_FPR16;
- /* 392 */ ULong guest_FPR17;
- /* 400 */ ULong guest_FPR18;
- /* 408 */ ULong guest_FPR19;
- /* 416 */ ULong guest_FPR20;
- /* 424 */ ULong guest_FPR21;
- /* 432 */ ULong guest_FPR22;
- /* 440 */ ULong guest_FPR23;
- /* 448 */ ULong guest_FPR24;
- /* 456 */ ULong guest_FPR25;
- /* 464 */ ULong guest_FPR26;
- /* 472 */ ULong guest_FPR27;
- /* 480 */ ULong guest_FPR28;
- /* 488 */ ULong guest_FPR29;
- /* 496 */ ULong guest_FPR30;
- /* 504 */ ULong guest_FPR31;
+ // Vector Registers, Floating Point Registers, and VSX Registers
+ // With ISA 2.06, the "Vector-Scalar Floating-point" category
+ // provides facilities to support vector and scalar binary floating-
+ // point operations. A unified register file is an integral part
+ // of this new facility, combining floating point and vector registers
+ // using a 64x128-bit vector. These are referred to as VSR[0..63].
+ // The floating point registers are now mapped into double word element 0
+ // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector
+ // Facility [Category: Vector]" are now mapped to VSR[32..63].
- // Vector Registers
// IMPORTANT: the user of libvex must place the guest state so as
- // to ensure that guest_VR{0..31}, and any shadows thereof, are
+ // to ensure that guest_VSR{0..63}, and any shadows thereof, are
// 16-aligned.
- /* 512 */ U128 guest_VR0;
- /* 528 */ U128 guest_VR1;
- /* 544 */ U128 guest_VR2;
- /* 560 */ U128 guest_VR3;
- /* 576 */ U128 guest_VR4;
- /* 592 */ U128 guest_VR5;
- /* 608 */ U128 guest_VR6;
- /* 624 */ U128 guest_VR7;
- /* 640 */ U128 guest_VR8;
- /* 656 */ U128 guest_VR9;
- /* 672 */ U128 guest_VR10;
- /* 688 */ U128 guest_VR11;
- /* 704 */ U128 guest_VR12;
- /* 720 */ U128 guest_VR13;
- /* 736 */ U128 guest_VR14;
- /* 752 */ U128 guest_VR15;
- /* 768 */ U128 guest_VR16;
- /* 784 */ U128 guest_VR17;
- /* 800 */ U128 guest_VR18;
- /* 816 */ U128 guest_VR19;
- /* 832 */ U128 guest_VR20;
- /* 848 */ U128 guest_VR21;
- /* 864 */ U128 guest_VR22;
- /* 880 */ U128 guest_VR23;
- /* 896 */ U128 guest_VR24;
- /* 912 */ U128 guest_VR25;
- /* 928 */ U128 guest_VR26;
- /* 944 */ U128 guest_VR27;
- /* 960 */ U128 guest_VR28;
- /* 976 */ U128 guest_VR29;
- /* 992 */ U128 guest_VR30;
- /* 1008 */ U128 guest_VR31;
- /* 1024 */ ULong guest_CIA; // IP (no arch visible register)
- /* 1032 */ ULong guest_LR; // Link Register
- /* 1040 */ ULong guest_CTR; // Count Register
+ /* 256 */ U128 guest_VSR0;
+ /* 272 */ U128 guest_VSR1;
+ /* 288 */ U128 guest_VSR2;
+ /* 304 */ U128 guest_VSR3;
+ /* 320 */ U128 guest_VSR4;
+ /* 336 */ U128 guest_VSR5;
+ /* 352 */ U128 guest_VSR6;
+ /* 368 */ U128 guest_VSR7;
+ /* 384 */ U128 guest_VSR8;
+ /* 400 */ U128 guest_VSR9;
+ /* 416 */ U128 guest_VSR10;
+ /* 432 */ U128 guest_VSR11;
+ /* 448 */ U128 guest_VSR12;
+ /* 464 */ U128 guest_VSR13;
+ /* 480 */ U128 guest_VSR14;
+ /* 496 */ U128 guest_VSR15;
+ /* 512 */ U128 guest_VSR16;
+ /* 528 */ U128 guest_VSR17;
+ /* 544 */ U128 guest_VSR18;
+ /* 560 */ U128 guest_VSR19;
+ /* 576 */ U128 guest_VSR20;
+ /* 592 */ U128 guest_VSR21;
+ /* 608 */ U128 guest_VSR22;
+ /* 624 */ U128 guest_VSR23;
+ /* 640 */ U128 guest_VSR24;
+ /* 656 */ U128 guest_VSR25;
+ /* 672 */ U128 guest_VSR26;
+ /* 688 */ U128 guest_VSR27;
+ /* 704 */ U128 guest_VSR28;
+ /* 720 */ U128 guest_VSR29;
+ /* 736 */ U128 guest_VSR30;
+ /* 752 */ U128 guest_VSR31;
+ /* 768 */ U128 guest_VSR32;
+ /* 784 */ U128 guest_VSR33;
+ /* 800 */ U128 guest_VSR34;
+ /* 816 */ U128 guest_VSR35;
+ /* 832 */ U128 guest_VSR36;
+ /* 848 */ U128 guest_VSR37;
+ /* 864 */ U128 guest_VSR38;
+ /* 880 */ U128 guest_VSR39;
+ /* 896 */ U128 guest_VSR40;
+ /* 912 */ U128 guest_VSR41;
+ /* 928 */ U128 guest_VSR42;
+ /* 944 */ U128 guest_VSR43;
+ /* 960 */ U128 guest_VSR44;
+ /* 976 */ U128 guest_VSR45;
+ /* 992 */ U128 guest_VSR46;
+ /* 1008 */ U128 guest_VSR47;
+ /* 1024 */ U128 guest_VSR48;
+ /* 1040 */ U128 guest_VSR49;
+ /* 1056 */ U128 guest_VSR50;
+ /* 1072 */ U128 guest_VSR51;
+ /* 1088 */ U128 guest_VSR52;
+ /* 1104 */ U128 guest_VSR53;
+ /* 1120 */ U128 guest_VSR54;
+ /* 1136 */ U128 guest_VSR55;
+ /* 1152 */ U128 guest_VSR56;
+ /* 1168 */ U128 guest_VSR57;
+ /* 1184 */ U128 guest_VSR58;
+ /* 1200 */ U128 guest_VSR59;
+ /* 1216 */ U128 guest_VSR60;
+ /* 1232 */ U128 guest_VSR61;
+ /* 1248 */ U128 guest_VSR62;
+ /* 1264 */ U128 guest_VSR63;
+
+ /* 1280 */ ULong guest_CIA; // IP (no arch visible register)
+ /* 1288 */ ULong guest_LR; // Link Register
+ /* 1296 */ ULong guest_CTR; // Count Register
/* XER pieces */
- /* 1048 */ UChar guest_XER_SO; /* in lsb */
- /* 1049 */ UChar guest_XER_OV; /* in lsb */
- /* 1050 */ UChar guest_XER_CA; /* in lsb */
- /* 1051 */ UChar guest_XER_BC; /* all bits */
+ /* 1304 */ UChar guest_XER_SO; /* in lsb */
+ /* 1305 */ UChar guest_XER_OV; /* in lsb */
+ /* 1306 */ UChar guest_XER_CA; /* in lsb */
+ /* 1307 */ UChar guest_XER_BC; /* all bits */
/* CR pieces */
- /* 1052 */ UChar guest_CR0_321; /* in [3:1] */
- /* 1053 */ UChar guest_CR0_0; /* in lsb */
- /* 1054 */ UChar guest_CR1_321; /* in [3:1] */
- /* 1055 */ UChar guest_CR1_0; /* in lsb */
- /* 1056 */ UChar guest_CR2_321; /* in [3:1] */
- /* 1057 */ UChar guest_CR2_0; /* in lsb */
- /* 1058 */ UChar guest_CR3_321; /* in [3:1] */
- /* 1059 */ UChar guest_CR3_0; /* in lsb */
- /* 1060 */ UChar guest_CR4_321; /* in [3:1] */
- /* 1061 */ UChar guest_CR4_0; /* in lsb */
- /* 1062 */ UChar guest_CR5_321; /* in [3:1] */
- /* 1063 */ UChar guest_CR5_0; /* in lsb */
- /* 1064 */ UChar guest_CR6_321; /* in [3:1] */
- /* 1065 */ UChar guest_CR6_0; /* in lsb */
- /* 1066 */ UChar guest_CR7_321; /* in [3:1] */
- /* 1067 */ UChar guest_CR7_0; /* in lsb */
+ /* 1308 */ UChar guest_CR0_321; /* in [3:1] */
+ /* 1309 */ UChar guest_CR0_0; /* in lsb */
+ /* 1310 */ UChar guest_CR1_321; /* in [3:1] */
+ /* 1311 */ UChar guest_CR1_0; /* in lsb */
+ /* 1312 */ UChar guest_CR2_321; /* in [3:1] */
+ /* 1313 */ UChar guest_CR2_0; /* in lsb */
+ /* 1314 */ UChar guest_CR3_321; /* in [3:1] */
+ /* 1315 */ UChar guest_CR3_0; /* in lsb */
+ /* 1316 */ UChar guest_CR4_321; /* in [3:1] */
+ /* 1317 */ UChar guest_CR4_0; /* in lsb */
+ /* 1318 */ UChar guest_CR5_321; /* in [3:1] */
+ /* 1319 */ UChar guest_CR5_0; /* in lsb */
+ /* 1320 */ UChar guest_CR6_321; /* in [3:1] */
+ /* 1321 */ UChar guest_CR6_0; /* in lsb */
+ /* 1322 */ UChar guest_CR7_321; /* in [3:1] */
+ /* 1323 */ UChar guest_CR7_0; /* in lsb */
/* FP Status & Control Register fields */
- /* 1068 */ UInt guest_FPROUND; // FP Rounding Mode
+ /* 1324 */ UInt guest_FPROUND; // FP Rounding Mode
/* Vector Save/Restore Register */
- /* 1072 */ UInt guest_VRSAVE;
+ /* 1328 */ UInt guest_VRSAVE;
/* Vector Status and Control Register */
- /* 1076 */ UInt guest_VSCR;
+ /* 1332 */ UInt guest_VSCR;
/* Emulation warnings */
- /* 1080 */ UInt guest_EMWARN;
+ /* 1336 */ UInt guest_EMWARN;
/* gcc adds 4 bytes padding here: pre-empt it. */
- /* 1084 */ UInt padding;
+ /* 1340 */ UInt padding;
/* For icbi: record start and length of area to invalidate */
- /* 1088 */ ULong guest_TISTART;
- /* 1096 */ ULong guest_TILEN;
+ /* 1344 */ ULong guest_TISTART;
+ /* 1352 */ ULong guest_TILEN;
/* Used to record the unredirected guest address at the start of
a translation whose start has been redirected. By reading
@@ -244,26 +252,26 @@
find out what the corresponding no-redirection address was.
Note, this is only set for wrap-style redirects, not for
replace-style ones. */
- /* 1104 */ ULong guest_NRADDR;
- /* 1112 */ ULong guest_NRADDR_GPR2;
+ /* 1360 */ ULong guest_NRADDR;
+ /* 1368 */ ULong guest_NRADDR_GPR2;
/* A grows-upwards stack for hidden saves/restores of LR and R2
needed for function interception and wrapping on ppc64-linux.
A horrible hack. REDIR_SP points to the highest live entry,
and so starts at -1. */
- /* 1120 */ ULong guest_REDIR_SP;
- /* 1128 */ ULong guest_REDIR_STACK[VEX_GUEST_PPC64_REDIR_STACK_SIZE];
+ /* 1376 */ ULong guest_REDIR_SP;
+ /* 1384 */ ULong guest_REDIR_STACK[VEX_GUEST_PPC64_REDIR_STACK_SIZE];
/* Needed for AIX: CIA at the last SC insn. Used when backing up
to restart a syscall that has been interrupted by a signal. */
- /* 1384 */ ULong guest_IP_AT_SYSCALL;
+ /* 1640 */ ULong guest_IP_AT_SYSCALL;
/* SPRG3, which AIUI is readonly in user space. Needed for
threading on AIX. */
- /* ???? */ ULong guest_SPRG3_RO;
+ /* 1648 */ ULong guest_SPRG3_RO;
- /* Padding to make it have an 8-aligned size */
- /* ???? */ ULong padding2;
+ /* Padding to make it have an 16-aligned size */
+ /* 1656 */ ULong padding2;
}
VexGuestPPC64State;
diff --git a/main/VEX/pub/libvex_guest_s390x.h b/main/VEX/pub/libvex_guest_s390x.h
new file mode 100644
index 0000000..3bbeaf2
--- /dev/null
+++ b/main/VEX/pub/libvex_guest_s390x.h
@@ -0,0 +1,174 @@
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+/*---------------------------------------------------------------*/
+/*--- begin libvex_guest_s390x.h ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#ifndef __LIBVEX_PUB_GUEST_S390X_H
+#define __LIBVEX_PUB_GUEST_S390X_H
+
+#include "libvex_basictypes.h"
+#include "libvex_emwarn.h"
+
+/*------------------------------------------------------------*/
+/*--- Vex's representation of the s390 CPU state. ---*/
+/*------------------------------------------------------------*/
+
+typedef struct {
+
+/*------------------------------------------------------------*/
+/*--- ar registers ---*/
+/*------------------------------------------------------------*/
+
+ /* 0 */ UInt guest_a0;
+ /* 4 */ UInt guest_a1;
+ /* 8 */ UInt guest_a2;
+ /* 12 */ UInt guest_a3;
+ /* 16 */ UInt guest_a4;
+ /* 20 */ UInt guest_a5;
+ /* 24 */ UInt guest_a6;
+ /* 28 */ UInt guest_a7;
+ /* 32 */ UInt guest_a8;
+ /* 36 */ UInt guest_a9;
+ /* 40 */ UInt guest_a10;
+ /* 44 */ UInt guest_a11;
+ /* 48 */ UInt guest_a12;
+ /* 52 */ UInt guest_a13;
+ /* 56 */ UInt guest_a14;
+ /* 60 */ UInt guest_a15;
+
+/*------------------------------------------------------------*/
+/*--- fpr registers ---*/
+/*------------------------------------------------------------*/
+
+ /* 64 */ ULong guest_f0;
+ /* 72 */ ULong guest_f1;
+ /* 80 */ ULong guest_f2;
+ /* 88 */ ULong guest_f3;
+ /* 96 */ ULong guest_f4;
+ /* 104 */ ULong guest_f5;
+ /* 112 */ ULong guest_f6;
+ /* 120 */ ULong guest_f7;
+ /* 128 */ ULong guest_f8;
+ /* 136 */ ULong guest_f9;
+ /* 144 */ ULong guest_f10;
+ /* 152 */ ULong guest_f11;
+ /* 160 */ ULong guest_f12;
+ /* 168 */ ULong guest_f13;
+ /* 176 */ ULong guest_f14;
+ /* 184 */ ULong guest_f15;
+
+/*------------------------------------------------------------*/
+/*--- gpr registers ---*/
+/*------------------------------------------------------------*/
+
+ /* 192 */ ULong guest_r0;
+ /* 200 */ ULong guest_r1;
+ /* 208 */ ULong guest_r2;
+ /* 216 */ ULong guest_r3;
+ /* 224 */ ULong guest_r4;
+ /* 232 */ ULong guest_r5;
+ /* 240 */ ULong guest_r6;
+ /* 248 */ ULong guest_r7;
+ /* 256 */ ULong guest_r8;
+ /* 264 */ ULong guest_r9;
+ /* 272 */ ULong guest_r10;
+ /* 280 */ ULong guest_r11;
+ /* 288 */ ULong guest_r12;
+ /* 296 */ ULong guest_r13;
+ /* 304 */ ULong guest_r14;
+ /* 312 */ ULong guest_r15;
+
+/*------------------------------------------------------------*/
+/*--- S390 miscellaneous registers ---*/
+/*------------------------------------------------------------*/
+
+ /* 320 */ ULong guest_counter;
+ /* 328 */ UInt guest_fpc;
+ /* 332 */ UChar unused[4]; /* 4-byte hole to get 8-byte alignment */
+ /* 336 */ ULong guest_IA;
+
+/*------------------------------------------------------------*/
+/*--- S390 pseudo registers ---*/
+/*------------------------------------------------------------*/
+
+ /* 344 */ ULong guest_SYSNO;
+
+/*------------------------------------------------------------*/
+/*--- 4-word thunk used to calculate the condition code ---*/
+/*------------------------------------------------------------*/
+
+ /* 352 */ ULong guest_CC_OP;
+ /* 360 */ ULong guest_CC_DEP1;
+ /* 368 */ ULong guest_CC_DEP2;
+ /* 376 */ ULong guest_CC_NDEP;
+
+/*------------------------------------------------------------*/
+/*--- Pseudo registers. Required by all architectures ---*/
+/*------------------------------------------------------------*/
+
+ /* See comments at bottom of libvex.h */
+ /* 384 */ ULong guest_NRADDR;
+ /* 392 */ ULong guest_TISTART;
+ /* 400 */ ULong guest_TILEN;
+
+ /* Used when backing up to restart a syscall that has
+ been interrupted by a signal. See also comment in
+ libvex_ir.h */
+ /* 408 */ ULong guest_IP_AT_SYSCALL;
+
+ /* Emulation warnings; see comments in libvex_emwarn.h */
+ /* 416 */ UInt guest_EMWARN;
+
+/*------------------------------------------------------------*/
+/*--- Force alignment to 16 bytes ---*/
+/*------------------------------------------------------------*/
+ /* 420 */ UChar padding[12];
+
+ /* 432 */ /* This is the size of the guest state */
+} VexGuestS390XState;
+
+
+/*------------------------------------------------------------*/
+/*--- Function prototypes ---*/
+/*------------------------------------------------------------*/
+
+void LibVEX_GuestS390X_initialise(VexGuestS390XState *);
+
+/*------------------------------------------------------------*/
+/*--- Dedicated registers ---*/
+/*------------------------------------------------------------*/
+
+#define guest_LR guest_r14 /* Link register */
+#define guest_SP guest_r15 /* Stack pointer */
+#define guest_FP guest_r11 /* Frame pointer */
+
+/*---------------------------------------------------------------*/
+/*--- end libvex_guest_s390x.h ---*/
+/*---------------------------------------------------------------*/
+
+#endif /* __LIBVEX_PUB_GUEST_S390X_H */
diff --git a/main/VEX/pub/libvex_guest_x86.h b/main/VEX/pub/libvex_guest_x86.h
index 0c61604..80ee423 100644
--- a/main/VEX/pub/libvex_guest_x86.h
+++ b/main/VEX/pub/libvex_guest_x86.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
diff --git a/main/VEX/pub/libvex_ir.h b/main/VEX/pub/libvex_ir.h
index 99865e8..0c316c5 100644
--- a/main/VEX/pub/libvex_ir.h
+++ b/main/VEX/pub/libvex_ir.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -104,7 +104,7 @@
One Vex IR translation for this code would be this:
- ------ IMark(0x24F275, 7) ------
+ ------ IMark(0x24F275, 7, 0) ------
t3 = GET:I32(0) # get %eax, a 32-bit integer
t2 = GET:I32(12) # get %ebx, a 32-bit integer
t1 = Add32(t3,t2) # addl
@@ -147,7 +147,7 @@
This becomes (again ignoring condition code and instruction pointer
updates):
- ------ IMark(0x4000ABA, 3) ------
+ ------ IMark(0x4000ABA, 3, 0) ------
t3 = Add32(GET:I32(0),0x4:I32)
t2 = LDle:I32(t3)
t1 = GET:I32(8)
@@ -227,6 +227,7 @@
Ity_I128, /* 128-bit scalar */
Ity_F32, /* IEEE 754 float */
Ity_F64, /* IEEE 754 double */
+ Ity_F128, /* 128-bit floating point; implementation defined */
Ity_V128 /* 128-bit SIMD */
}
IRType;
@@ -261,6 +262,9 @@
Ico_U16,
Ico_U32,
Ico_U64,
+ Ico_F32, /* 32-bit IEEE754 floating */
+ Ico_F32i, /* 32-bit unsigned int to be interpreted literally
+ as a IEEE754 single value. */
Ico_F64, /* 64-bit IEEE754 floating */
Ico_F64i, /* 64-bit unsigned int to be interpreted literally
as a IEEE754 double value. */
@@ -282,6 +286,8 @@
UShort U16;
UInt U32;
ULong U64;
+ Float F32;
+ UInt F32i;
Double F64;
ULong F64i;
UShort V128; /* 16-bit value; see Ico_V128 comment above */
@@ -295,6 +301,8 @@
extern IRConst* IRConst_U16 ( UShort );
extern IRConst* IRConst_U32 ( UInt );
extern IRConst* IRConst_U64 ( ULong );
+extern IRConst* IRConst_F32 ( Float );
+extern IRConst* IRConst_F32i ( UInt );
extern IRConst* IRConst_F64 ( Double );
extern IRConst* IRConst_F64i ( ULong );
extern IRConst* IRConst_V128 ( UShort );
@@ -314,9 +322,10 @@
/* Describes a helper function to call. The name part is purely for
pretty printing and not actually used. regparms=n tells the back
end that the callee has been declared
- "__attribute__((regparm(n)))". On some targets (x86) the back end
- will need to construct a non-standard sequence to call a function
- declared like this.
+ "__attribute__((regparm(n)))", although indirectly using the
+ VEX_REGPARM(n) macro. On some targets (x86) the back end will need
+ to construct a non-standard sequence to call a function declared
+ like this.
mcx_mask is a sop to Memcheck. It indicates which args should be
considered 'always defined' when lazily computing definedness of
@@ -460,6 +469,10 @@
Iop_DivS32, // ditto, signed
Iop_DivU64, // :: I64,I64 -> I64 (simple div, no mod)
Iop_DivS64, // ditto, signed
+ Iop_DivU64E, // :: I64,I64 -> I64 (dividend is 64-bit arg (hi) concat with 64 0's (low))
+ Iop_DivS64E, // ditto, signed
+ Iop_DivU32E, // :: I32,I32 -> I32 (dividend is 32-bit arg (hi) concat with 32 0's (low))
+ Iop_DivS32E, // ditto, signed
Iop_DivModU64to32, // :: I64,I32 -> I64
// of which lo half is div and hi half is mod
@@ -469,6 +482,9 @@
// of which lo half is div and hi half is mod
Iop_DivModS128to64, // ditto, signed
+ Iop_DivModS64to64, // :: I64,I64 -> I128
+ // of which lo half is div and hi half is mod
+
/* Integer conversions. Some of these are redundant (eg
Iop_64to8 is the same as Iop_64to32 and then Iop_32to8), but
having a complete set reduces the typical dynamic size of IR
@@ -552,6 +568,8 @@
*/
/* :: F64 x F64 -> IRCmpF64Result(I32) */
Iop_CmpF64,
+ Iop_CmpF32,
+ Iop_CmpF128,
/* --- Int to/from FP conversions. --- */
@@ -597,15 +615,26 @@
Iop_F64toI16S, /* IRRoundingMode(I32) x F64 -> signed I16 */
Iop_F64toI32S, /* IRRoundingMode(I32) x F64 -> signed I32 */
Iop_F64toI64S, /* IRRoundingMode(I32) x F64 -> signed I64 */
+ Iop_F64toI64U, /* IRRoundingMode(I32) x F64 -> unsigned I64 */
Iop_F64toI32U, /* IRRoundingMode(I32) x F64 -> unsigned I32 */
Iop_I16StoF64, /* signed I16 -> F64 */
Iop_I32StoF64, /* signed I32 -> F64 */
Iop_I64StoF64, /* IRRoundingMode(I32) x signed I64 -> F64 */
+ Iop_I64UtoF64, /* IRRoundingMode(I32) x unsigned I64 -> F64 */
+ Iop_I64UtoF32, /* IRRoundingMode(I32) x unsigned I64 -> F32 */
Iop_I32UtoF64, /* unsigned I32 -> F64 */
+ Iop_F32toI16S, /* IRRoundingMode(I32) x F32 -> signed I16 */
+ Iop_F32toI32S, /* IRRoundingMode(I32) x F32 -> signed I32 */
+ Iop_F32toI64S, /* IRRoundingMode(I32) x F32 -> signed I64 */
+
+ Iop_I16StoF32, /* signed I16 -> F32 */
+ Iop_I32StoF32, /* IRRoundingMode(I32) x signed I32 -> F32 */
+ Iop_I64StoF32, /* IRRoundingMode(I32) x signed I64 -> F32 */
+
/* Conversion between floating point formats */
Iop_F32toF64, /* F32 -> F64 */
Iop_F64toF32, /* IRRoundingMode(I32) x F64 -> F32 */
@@ -615,6 +644,30 @@
Iop_ReinterpF64asI64, Iop_ReinterpI64asF64,
Iop_ReinterpF32asI32, Iop_ReinterpI32asF32,
+ /* Support for 128-bit floating point */
+ Iop_F64HLtoF128,/* (high half of F128,low half of F128) -> F128 */
+ Iop_F128HItoF64,/* F128 -> high half of F128 into a F64 register */
+ Iop_F128LOtoF64,/* F128 -> low half of F128 into a F64 register */
+
+ /* :: IRRoundingMode(I32) x F128 x F128 -> F128 */
+ Iop_AddF128, Iop_SubF128, Iop_MulF128, Iop_DivF128,
+
+ /* :: F128 -> F128 */
+ Iop_NegF128, Iop_AbsF128,
+
+ /* :: IRRoundingMode(I32) x F128 -> F128 */
+ Iop_SqrtF128,
+
+ Iop_I32StoF128, /* signed I32 -> F128 */
+ Iop_I64StoF128, /* signed I64 -> F128 */
+ Iop_F32toF128, /* F32 -> F128 */
+ Iop_F64toF128, /* F64 -> F128 */
+
+ Iop_F128toI32S, /* IRRoundingMode(I32) x F128 -> signed I32 */
+ Iop_F128toI64S, /* IRRoundingMode(I32) x F128 -> signed I64 */
+ Iop_F128toF64, /* IRRoundingMode(I32) x F128 -> F64 */
+ Iop_F128toF32, /* IRRoundingMode(I32) x F128 -> F32 */
+
/* --- guest x86/amd64 specifics, not mandated by 754. --- */
/* Binary ops, with rounding. */
@@ -642,11 +695,19 @@
Iop_RoundF32toInt, /* F32 value to nearest integral value (still
as F32) */
+ /* --- guest s390 specifics, not mandated by 754. --- */
+
+ /* Fused multiply-add/sub */
+ /* :: IRRoundingMode(I32) x F32 x F32 x F32 -> F32
+ (computes op3 * op2 +/- op1 */
+ Iop_MAddF32, Iop_MSubF32,
+
/* --- guest ppc32/64 specifics, not mandated by 754. --- */
/* Ternary operations, with rounding. */
/* Fused multiply-add/sub, with 112-bit intermediate
- precision */
+ precision for ppc.
+ Also used to implement fused multiply-add/sub for s390. */
/* :: IRRoundingMode(I32) x F64 x F64 x F64 -> F64
(computes arg2 * arg3 +/- arg4) */
Iop_MAddF64, Iop_MSubF64,
@@ -839,10 +900,30 @@
Iop_QShlN8x8, Iop_QShlN16x4, Iop_QShlN32x2, Iop_QShlN64x1,
Iop_QSalN8x8, Iop_QSalN16x4, Iop_QSalN32x2, Iop_QSalN64x1,
- /* NARROWING -- narrow 2xI64 into 1xI64, hi half from left arg */
- Iop_QNarrow16Ux4,
- Iop_QNarrow16Sx4,
- Iop_QNarrow32Sx2,
+ /* NARROWING (binary)
+ -- narrow 2xI64 into 1xI64, hi half from left arg */
+ /* For saturated narrowing, I believe there are 4 variants of
+ the basic arithmetic operation, depending on the signedness
+ of argument and result. Here are examples that exemplify
+ what I mean:
+
+ QNarrow16Uto8U ( UShort x ) if (x >u 255) x = 255;
+ return x[7:0];
+
+ QNarrow16Sto8S ( Short x ) if (x <s -128) x = -128;
+ if (x >s 127) x = 127;
+ return x[7:0];
+
+ QNarrow16Uto8S ( UShort x ) if (x >u 127) x = 127;
+ return x[7:0];
+
+ QNarrow16Sto8U ( Short x ) if (x <s 0) x = 0;
+ if (x >s 255) x = 255;
+ return x[7:0];
+ */
+ Iop_QNarrowBin16Sto8Ux8,
+ Iop_QNarrowBin16Sto8Sx8, Iop_QNarrowBin32Sto16Sx4,
+ Iop_NarrowBin16to8x8, Iop_NarrowBin32to16x4,
/* INTERLEAVING */
/* Interleave lanes from low or high halves of
@@ -961,6 +1042,7 @@
Iop_Fixed32UToF32x4_RN, Iop_Fixed32SToF32x4_RN, /* fixed-point -> fp */
/* --- Single to/from half conversion --- */
+ /* FIXME: what kind of rounding in F32x4 -> F16x4 case? */
Iop_F32toF16x4, Iop_F16toF32x4, /* F32x4 <-> F16x4 */
/* --- 32x4 lowest-lane-only scalar FP --- */
@@ -1089,7 +1171,7 @@
Iop_Min8Ux16, Iop_Min16Ux8, Iop_Min32Ux4,
/* COMPARISON */
- Iop_CmpEQ8x16, Iop_CmpEQ16x8, Iop_CmpEQ32x4,
+ Iop_CmpEQ8x16, Iop_CmpEQ16x8, Iop_CmpEQ32x4, Iop_CmpEQ64x2,
Iop_CmpGT8Sx16, Iop_CmpGT16Sx8, Iop_CmpGT32Sx4, Iop_CmpGT64Sx2,
Iop_CmpGT8Ux16, Iop_CmpGT16Ux8, Iop_CmpGT32Ux4,
@@ -1119,30 +1201,32 @@
Iop_QShlN8x16, Iop_QShlN16x8, Iop_QShlN32x4, Iop_QShlN64x2,
Iop_QSalN8x16, Iop_QSalN16x8, Iop_QSalN32x4, Iop_QSalN64x2,
- /* NARROWING -- narrow 2xV128 into 1xV128, hi half from left arg */
- /* Note: the 16{U,S} and 32{U,S} are the pre-narrow lane widths. */
- Iop_QNarrow16Ux8, Iop_QNarrow32Ux4,
- Iop_QNarrow16Sx8, Iop_QNarrow32Sx4,
- Iop_Narrow16x8, Iop_Narrow32x4,
- /* Shortening V128->I64, lo half from each element */
- Iop_Shorten16x8, Iop_Shorten32x4, Iop_Shorten64x2,
- /* Saturating shortening from signed source to signed/unsigned destination */
- Iop_QShortenS16Sx8, Iop_QShortenS32Sx4, Iop_QShortenS64Sx2,
- Iop_QShortenU16Sx8, Iop_QShortenU32Sx4, Iop_QShortenU64Sx2,
- /* Saturating shortening from unsigned source to unsigned destination */
- Iop_QShortenU16Ux8, Iop_QShortenU32Ux4, Iop_QShortenU64Ux2,
+ /* NARROWING (binary)
+ -- narrow 2xV128 into 1xV128, hi half from left arg */
+ /* See comments above w.r.t. U vs S issues in saturated narrowing. */
+ Iop_QNarrowBin16Sto8Ux16, Iop_QNarrowBin32Sto16Ux8,
+ Iop_QNarrowBin16Sto8Sx16, Iop_QNarrowBin32Sto16Sx8,
+ Iop_QNarrowBin16Uto8Ux16, Iop_QNarrowBin32Uto16Ux8,
+ Iop_NarrowBin16to8x16, Iop_NarrowBin32to16x8,
- /* WIDENING */
- /* Longening --- sign or zero extends each element of the argument
- vector to the twice original size. The resulting vector consists of
+ /* NARROWING (unary) -- narrow V128 into I64 */
+ Iop_NarrowUn16to8x8, Iop_NarrowUn32to16x4, Iop_NarrowUn64to32x2,
+ /* Saturating narrowing from signed source to signed/unsigned destination */
+ Iop_QNarrowUn16Sto8Sx8, Iop_QNarrowUn32Sto16Sx4, Iop_QNarrowUn64Sto32Sx2,
+ Iop_QNarrowUn16Sto8Ux8, Iop_QNarrowUn32Sto16Ux4, Iop_QNarrowUn64Sto32Ux2,
+ /* Saturating narrowing from unsigned source to unsigned destination */
+ Iop_QNarrowUn16Uto8Ux8, Iop_QNarrowUn32Uto16Ux4, Iop_QNarrowUn64Uto32Ux2,
+
+ /* WIDENING -- sign or zero extend each element of the argument
+ vector to the twice original size. The resulting vector consists of
the same number of elements but each element and the vector itself
- are two times wider.
+ are twice as wide.
All operations are I64->V128.
Example
- Iop_Longen32Sx2( [a, b] ) = [c, d]
+ Iop_Widen32Sto64x2( [a, b] ) = [c, d]
where c = Iop_32Sto64(a) and d = Iop_32Sto64(b) */
- Iop_Longen8Ux8, Iop_Longen16Ux4, Iop_Longen32Ux2,
- Iop_Longen8Sx8, Iop_Longen16Sx4, Iop_Longen32Sx2,
+ Iop_Widen8Uto16x8, Iop_Widen16Uto32x4, Iop_Widen32Uto64x2,
+ Iop_Widen8Sto16x8, Iop_Widen16Sto32x4, Iop_Widen32Sto64x2,
/* INTERLEAVING */
/* Interleave lanes from low or high halves of
@@ -1228,6 +1312,8 @@
}
IRCmpF64Result;
+typedef IRCmpF64Result IRCmpF32Result;
+typedef IRCmpF64Result IRCmpF128Result;
/* ------------------ Expressions ------------------ */
@@ -1689,6 +1775,10 @@
typedef
enum {
Imbe_Fence=0x18000,
+ /* Needed only on ARM. It cancels a reservation made by a
+ preceding Linked-Load, and needs to be handed through to the
+ back end, just as LL and SC themselves are. */
+ Imbe_CancelReservation
}
IRMBusEvent;
@@ -1838,12 +1928,27 @@
the IRSB). Contains the address and length of the
instruction.
- ppIRStmt output: ------ IMark(<addr>, <len>) ------,
- eg. ------ IMark(0x4000792, 5) ------,
+ It also contains a delta value. The delta must be
+ subtracted from a guest program counter value before
+ attempting to establish, by comparison with the address
+ and length values, whether or not that program counter
+ value refers to this instruction. For x86, amd64, ppc32,
+ ppc64 and arm, the delta value is zero. For Thumb
+ instructions, the delta value is one. This is because, on
+ Thumb, guest PC values (guest_R15T) are encoded using the
+ top 31 bits of the instruction address and a 1 in the lsb;
+ hence they appear to be (numerically) 1 past the start of
+ the instruction they refer to. IOW, guest_R15T on ARM
+ holds a standard ARM interworking address.
+
+ ppIRStmt output: ------ IMark(<addr>, <len>, <delta>) ------,
+ eg. ------ IMark(0x4000792, 5, 0) ------,
*/
struct {
Addr64 addr; /* instruction address */
Int len; /* instruction length */
+ UChar delta; /* addr = program counter as encoded in guest state
+ - delta */
} IMark;
/* META: An ABI hint, which says something about this
@@ -2020,7 +2125,7 @@
/* Statement constructors. */
extern IRStmt* IRStmt_NoOp ( void );
-extern IRStmt* IRStmt_IMark ( Addr64 addr, Int len );
+extern IRStmt* IRStmt_IMark ( Addr64 addr, Int len, UChar delta );
extern IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia );
extern IRStmt* IRStmt_Put ( Int off, IRExpr* data );
extern IRStmt* IRStmt_PutI ( IRRegArray* descr, IRExpr* ix, Int bias,
diff --git a/main/VEX/pub/libvex_s390x_common.h b/main/VEX/pub/libvex_s390x_common.h
new file mode 100644
index 0000000..95efef6
--- /dev/null
+++ b/main/VEX/pub/libvex_s390x_common.h
@@ -0,0 +1,95 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Common defs for s390x libvex_s390x_common.h ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+#ifndef __LIBVEX_PUB_S390X_H
+#define __LIBVEX_PUB_S390X_H
+
+/* This file includes definitions for s390.
+
+ It must be suitable for inclusion in assembler source files. */
+
+
+/*--------------------------------------------------------------*/
+/*--- Dedicated registers ---*/
+/*--------------------------------------------------------------*/
+
+#define S390_REGNO_RETURN_VALUE 2
+#define S390_REGNO_DISPATCH_CTR 12 /* Holds VG_(dispatch_ctr) */
+#define S390_REGNO_GUEST_STATE_POINTER 13
+#define S390_REGNO_LINK_REGISTER 14
+#define S390_REGNO_STACK_POINTER 15
+
+
+/*--------------------------------------------------------------*/
+/*--- Offsets in the stack frame allocated by the dispatcher ---*/
+/*--------------------------------------------------------------*/
+
+/* Where the profiling dispatcher saves the r2 contents. */
+#define S390_OFFSET_SAVED_R2 160+96
+
+/* Where client's FPC register is saved. */
+#define S390_OFFSET_SAVED_FPC_C 160+88
+
+/* Where valgrind's FPC register is saved. */
+#define S390_OFFSET_SAVED_FPC_V 160+80
+
+/* Where client code will save the link register before calling a helper. */
+#define S390_OFFSET_SAVED_LR 160+72
+
+/* Location of saved guest state pointer */
+#define S390_OFFSET_SAVED_GSP 160+64
+
+/* Size of frame allocated by VG_(run_innerloop)
+ Need size for
+ 8 FPRs
+ + 3 GPRs (SAVED_GSP, SAVED_LR, and SAVED_R2)
+ + 2 FPCs (SAVED_FPC_C and SAVED_FPC_V).
+
+ Additionally, we need a standard frame for helper functions being called
+ from client code. (See figure 1-16 in zSeries ABI) */
+#define S390_INNERLOOP_FRAME_SIZE ((8+3+2)*8 + 160)
+
+
+/*--------------------------------------------------------------*/
+/*--- Miscellaneous ---*/
+/*--------------------------------------------------------------*/
+
+/* Number of arguments that can be passed in registers */
+#define S390_NUM_GPRPARMS 5
+
+/* Number of double words needed to store all facility bits. */
+#define S390_NUM_FACILITY_DW 2
+
+#endif /* __LIBVEX_PUB_S390X_H */
+
+/*--------------------------------------------------------------------*/
+/*--- end libvex_s390x_common.h ---*/
+/*--------------------------------------------------------------------*/
diff --git a/main/VEX/pub/libvex_trc_values.h b/main/VEX/pub/libvex_trc_values.h
index c16d38a..d983455 100644
--- a/main/VEX/pub/libvex_trc_values.h
+++ b/main/VEX/pub/libvex_trc_values.h
@@ -7,7 +7,7 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
- Copyright (C) 2004-2010 OpenWorks LLP
+ Copyright (C) 2004-2011 OpenWorks LLP
info@open-works.net
This program is free software; you can redistribute it and/or
@@ -46,6 +46,11 @@
These values should be 61 or above so as not to conflict
with Valgrind's VG_TRC_ values, which are 60 or below.
+
+ These values *must* be odd (have bit 0 set) because the dispatchers
+ (coregrind/m_dispatch/dispatch-*-*.S) use this fact to distinguish
+ a TRC value from the unchanged baseblock pointer -- which has 0 as
+ its lowest bit.
*/
#define VEX_TRC_JMP_TINVAL 61 /* invalidate translations before
diff --git a/main/VEX/switchback/Makefile b/main/VEX/switchback/Makefile
new file mode 100644
index 0000000..5836313
--- /dev/null
+++ b/main/VEX/switchback/Makefile
@@ -0,0 +1,10 @@
+
+all: switchback.c linker.c linker.h
+ gcc -m64 -Wall -O -g -o switchback switchback.c linker.c ../libvex_ppc64_linux.a
+# gcc -Wall -O -g -o switchback switchback.c linker.c ../libvex.a
+
+test_ppc:
+ gcc -Wall -m64 -mregnames -O -c test_ppc_jm1.c
+
+clean:
+ rm -f switchback switchback.o linker.o
diff --git a/main/VEX/switchback/binary_switchback.pl b/main/VEX/switchback/binary_switchback.pl
new file mode 100755
index 0000000..4b096ee
--- /dev/null
+++ b/main/VEX/switchback/binary_switchback.pl
@@ -0,0 +1,431 @@
+#!/usr/bin/env perl
+use strict;
+use warnings;
+
+######################################################
+# Binary search script for switchback
+# Finds bad basic block for seg faults and bad output.
+#
+# To test output, you need to create test_ref
+# test_ref should hold the correct output for running the test_xxx program:
+# - Everything between (not including) /^---START---$/ and /^---STOP---$/
+# - But NOT including output from /^---begin SWITCHBACK/
+# to /^--- end SWITCHBACK/ inclusive
+#
+# This script can't handle other vex output,
+# so e.g switchback.c::DEBUG_TRACE_FLAGS should be 0
+#
+
+######################################################
+# Global consts, vars
+use constant DEBUG => 0;
+use constant CONST_N_MAX => 10000000000;
+use constant CONST_N_MUL => 2;
+
+my $SWITCHBACK = "./switchback";
+my $N_START = 0;
+my $N_LAST_GOOD = 0;
+my $N_LAST_BAD = -1;
+my $GIVEN_LAST_GOOD = -1;
+my $GIVEN_LAST_BAD = -1;
+my $TEST_REF;
+
+
+
+######################################################
+# Helper functions
+
+sub Exit {
+ exit $_[0];
+}
+
+sub Usage {
+ print "Usage: binary_switchback.pl test_ref [last_good [last_bad]]\n";
+ print "where:\n";
+ print " test_ref = reference output from test_xxx\n";
+ print " last_good = last known good bb (search space minimum)\n";
+ print " last_bad = last known bad bb (search space maximum)\n";
+ print "\n";
+}
+
+sub QuitUsage {
+ print $_[0]."\n";
+ Usage();
+ Exit 1;
+}
+
+
+######################################################
+# Get & check cmdline args
+# - if given, override global vars.
+
+if (@ARGV < 1 || @ARGV > 3) {
+ QuitUsage "Error: Bad num args\n";
+}
+
+$TEST_REF = $ARGV[0];
+
+if ( ! -x "$SWITCHBACK" ) {
+ QuitUsage "File doesn't exist | not executable: '$SWITCHBACK'\n";
+}
+
+if (@ARGV >1) {
+ $N_LAST_GOOD = $ARGV[1];
+ $GIVEN_LAST_GOOD = $N_LAST_GOOD;
+ if (! ($N_LAST_GOOD =~ /^\d*$/)) {
+ QuitUsage "Error: bad arg for #last_good\n";
+ }
+ if ($N_LAST_GOOD >= CONST_N_MAX) {
+ QuitUsage "Error: #last_good >= N_MAX(".CONST_N_MAX.")\n";
+ }
+}
+if (@ARGV >2) {
+ $N_LAST_BAD = $ARGV[2];
+ $GIVEN_LAST_BAD = $N_LAST_BAD;
+ if (! ($N_LAST_BAD =~ /^\d*$/)) {
+ QuitUsage "Error: bad arg for 'last_bad'\n";
+ }
+}
+
+# Setup N_START
+if ($N_LAST_BAD != -1) {
+ # Start halfway:
+ my $diff = $N_LAST_BAD - $N_LAST_GOOD;
+ $N_START = $N_LAST_GOOD + ($diff - ($diff % 2)) / 2;
+} else {
+ # No known end: Start at beginning:
+ if ($N_LAST_GOOD > 0) { # User-given last_good
+ $N_START = $N_LAST_GOOD;
+ } else {
+ $N_START = 100; # Some reasonable number.
+ }
+}
+
+######################################################
+# Sanity checks (shouldn't ever happen)
+
+if ($N_START < $N_LAST_GOOD) {
+ print "Program Error: start < last_good\n";
+ exit 1;
+}
+if ($N_LAST_BAD != -1 && $N_START >= $N_LAST_BAD) {
+ print "Program Error: start >= last_bad\n";
+ exit 1;
+}
+if ($N_START < 1 || $N_START > CONST_N_MAX) {
+ print "Program Error: Bad N_START: '$N_START'\n";
+ exit 1;
+}
+if ($N_LAST_GOOD < 0 || $N_LAST_GOOD > CONST_N_MAX) {
+ print "Program Error: Bad N_LAST_GOOD: '$N_LAST_GOOD'\n";
+ exit 1;
+}
+if ($N_LAST_BAD < -1 || $N_LAST_BAD > CONST_N_MAX) {
+ print "Program Error: Bad N_LAST_BAD: '$N_LAST_BAD'\n";
+ exit 1;
+}
+
+
+
+
+
+
+######################################################
+# Helper functions
+
+# Run switchback for test, for N bbs
+# returns output results
+sub SwitchBack {
+ my $n = $_[0];
+ if ($n < 0 || $n > CONST_N_MAX) {
+ print "Error SwitchBack: Bad N: '$n'\n";
+ Exit 1;
+ }
+ my $TMPFILE = ".switchback_output.$n";
+
+ print "=== Calling switchback for bb $n ===\n";
+
+ system("$SWITCHBACK $n >& $TMPFILE");
+ my $ret = $?;
+
+ if ($ret == 256) {
+ print "Error running switchback - Quitting...\n---\n";
+ open(INFILE, "$TMPFILE");
+ print <INFILE>;
+ close(INFILE);
+
+ unlink($TMPFILE) if (! DEBUG);
+ exit 0;
+ }
+
+ if ($ret & 127) {
+ print "Ctrl-C pressed - Quitting...\n";
+ unlink($TMPFILE) if (! DEBUG);
+ exit 0;
+ }
+
+ if (DEBUG) {
+ if ($ret == -1) {
+ print "failed to execute: $!\n";
+ }
+ elsif ($ret & 127) {
+ printf "child died with signal %d, %s coredump\n",
+ ($ret & 127), ($ret & 128) ? 'with' : 'without';
+ }
+ else {
+ printf "child exited with value %d\n", $ret >> 8;
+ }
+ }
+ if ($ret != 0) { # Err: maybe seg fault
+ open(INFILE, "$TMPFILE");
+ my @results = <INFILE>;
+ close(INFILE);
+
+ while (@results && !((shift @results) =~ /^---START---/)) {}
+ print @results;
+
+ unlink($TMPFILE) if (! DEBUG);
+ return;
+ }
+
+ open(INFILE, "$TMPFILE");
+ my @results = <INFILE>;
+ close(INFILE);
+
+ unlink($TMPFILE) if (! DEBUG);
+ return @results;
+}
+
+# Returns N simulated bbs from output lines
+sub get_N_simulated {
+ my @lines = @{$_[0]};
+ pop @lines; # not the first...
+ my $line = pop @lines; # ...but the second line.
+
+ chomp $line;
+ my $n;
+ if (($n) = ($line =~ /^(\d*) bbs simulated$/)) {
+ return $n;
+ }
+ print "Error: Didn't find N bbs simultated, from output lines\n";
+ Exit 1;
+}
+
+# Calls test script to compare current output lines with a reference.
+# Returns 1 on success, 0 on failure
+sub TestOutput {
+ my @lines = @{$_[0]};
+ my $n = $_[1];
+ my $ref_output = "$TEST_REF";
+
+ # Get the current section we want to compare:
+ my @newlines;
+ my $ok=0;
+ my $halfline = "";
+ foreach my $line(@lines) {
+ chomp $line;
+ if ($line =~ /^---STOP---$/) { last; } # we're done
+
+ # output might be messed up here...
+ if ($line =~ /^.*---begin SWITCHBACK/) {
+ ($halfline) = ($line =~ /^(.*)---begin SWITCHBACK/);
+ $ok = 0; # stop on prev line
+ }
+
+ # A valid line:
+ if ($ok) {
+ if ($halfline ne "") { # Fix broken line
+ $line = $halfline.$line;
+ $halfline = "";
+ }
+
+ # Ignore Vex output
+ if ($line =~ /^vex /) { next; }
+
+ push(@newlines, $line);
+ }
+
+ if ($line =~ /^---START---$/) { # start on next line
+ $ok = 1;
+ }
+
+ if ($line =~ /^--- end SWITCHBACK/) { # start on next line
+ $ok = 1;
+
+ }
+ }
+
+ if (DEBUG) {
+ open(OUTFILE, ">.filtered_output.$n");
+ print OUTFILE join("\n",@newlines);
+ close(OUTFILE);
+ }
+
+ # Read in reference lines
+ open(REFERENCE, "$ref_output") || die "Error: Couldn't open $ref_output\n";
+ my @ref_lines = <REFERENCE>;
+ close(REFERENCE);
+
+ # Compare reference lines with current:
+ my $match = 1;
+ my $i = 0;
+ foreach my $ref_line(@ref_lines) {
+ chomp $ref_line;
+ my $line = $newlines[$i++];
+ chomp $line;
+ if ($ref_line ne $line) {
+ print "\nMismatch on output:\n";
+ print "ref: '$ref_line'\n";
+ print "new: '$line'\n\n";
+ $match = 0;
+ last;
+ }
+ }
+ return $match;
+}
+
+
+
+
+
+
+######################################################
+# Do the search
+
+if (DEBUG) {
+ print "\n------------\n";
+ print "START: N=$N_START\n";
+ print "START: lg=$N_LAST_GOOD\n";
+ print "START: lb=$N_LAST_BAD\n";
+ print "START: GIVEN_LAST_GOOD=$GIVEN_LAST_GOOD\n";
+ print "START: GIVEN_LAST_BAD =$GIVEN_LAST_BAD\n";
+ print "\n";
+}
+
+my $N = $N_START;
+my $success = 0;
+my @sb_output;
+while (1) {
+ if (DEBUG) {
+ print "\n------------\n";
+ print "SOL: lg=$N_LAST_GOOD\n";
+ print "SOL: lb=$N_LAST_BAD\n";
+ print "SOL: N=$N\n";
+ }
+ if ($N < 0) {
+ print "Error: $N<0\n";
+ Exit 1;
+ }
+
+ my $ok = 1;
+ # Run switchback:
+ @sb_output = SwitchBack($N);
+
+ if (@sb_output == 0) { # Switchback failed - maybe seg fault
+ $ok = 0;
+ }
+
+ if (DEBUG) {
+ open(fileOUT, ">.retrieved_output.$N") or die("Can't open file for writing: $!");
+ print fileOUT @sb_output;
+ close(fileOUT);
+ }
+
+ # If we're ok so far (no seg faults) then test for correct output
+ if ($ok) {
+ $ok = TestOutput( \@sb_output, $N );
+ }
+
+ if ($ok) {
+ if (get_N_simulated(\@sb_output) < $N) { # Done: No bad bbs
+ $success = 1;
+ last;
+ }
+ if ($N_LAST_BAD == -1) {
+ # No upper bound for search space
+ # Try again with a bigger N
+
+ $N_LAST_GOOD = $N;
+ $N *= CONST_N_MUL;
+ if ($N > CONST_N_MAX) {
+ print "\nError: Maxed out N($N): N_MAX=".CONST_N_MAX."\n";
+ print "\nWe're either in a loop, or this is a big test program (increase N_MAX)\n\n";
+ Exit 1;
+ }
+ if (DEBUG) {
+ print "Looks good so far: Trying bigger N...\n\n";
+ }
+ next;
+ }
+ }
+
+ # Narrow the search space:
+ if ($ok) { $N_LAST_GOOD = $N; }
+ else { $N_LAST_BAD = $N; }
+
+ # Calculate next step:
+ my $diff = $N_LAST_BAD - $N_LAST_GOOD;
+ $diff = $diff - ($diff % 2);
+ my $step = $diff / 2;
+
+ if ($step < 0) {
+ print "Error: step = $step\n";
+ Exit 1;
+ }
+
+ # This our last run-through?
+ if ($step!=0) {
+ $N = $N_LAST_GOOD + $step; # Keep on going...
+ } else {
+ last; # Get outta here
+ }
+
+ if (DEBUG) {
+ print "\nEOL: ok=$ok\n";
+ print "EOL: lg=$N_LAST_GOOD\n";
+ print "EOL: lb=$N_LAST_BAD\n";
+ print "EOL: s=$step\n";
+ print "EOL: N=$N\n";
+ }
+}
+
+
+
+######################################################
+# Done: Report results
+
+print "\n============================================\n";
+print "Done searching.\n\n";
+
+if ($N_LAST_BAD != -1 && $N != $N_LAST_BAD) {
+ print "Getting output for last bad bb:\n";
+ @sb_output = SwitchBack($N_LAST_BAD);
+}
+
+print @sb_output;
+print "\n\n";
+if ($success) {
+ print "*** Success! No bad bbs found. ***\n";
+} else {
+ if ($N_LAST_BAD == $GIVEN_LAST_BAD) {
+ print "*** No failures detected within given bb range ***\n";
+ print " - check given 'last_bad' argument\n";
+ } else {
+ if ($N_LAST_BAD == $GIVEN_LAST_GOOD) {
+ print "*** Failed on bb given as last_good ***\n";
+ print " - decrease the 'last_good' argument\n";
+ } else {
+ print "*** Failure: Last failed switchback bb: $N_LAST_BAD ***\n";
+ print "Hence bad bb: ". ($N_LAST_BAD - 1) ."\n";
+ }
+ }
+}
+print "\n";
+if (DEBUG) {
+ print "END: N=$N\n";
+ print "END: lg=$N_LAST_GOOD\n";
+ print "END: lb=$N_LAST_BAD\n";
+ print "END: GIVEN_LAST_BAD=$GIVEN_LAST_BAD\n";
+ print "\n";
+}
+Exit 0;
diff --git a/main/VEX/switchback/linker.c b/main/VEX/switchback/linker.c
new file mode 100644
index 0000000..d1f93c3
--- /dev/null
+++ b/main/VEX/switchback/linker.c
@@ -0,0 +1,1483 @@
+/*
+ 13 Dec '05
+ Linker no longer used - apart from mymalloc().
+ Instead, simply compile and link switchback.c with test_xxx.c, e.g.:
+ ./> (cd .. && make EXTRA_CFLAGS="-m64" libvex_ppc64_linux.a) && gcc -m64 -Wall -O -g -o switchback switchback.c linker.c ../libvex_ppc64_linux.a test_bzip2.c
+*/
+
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <assert.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <unistd.h>
+#include <elf.h>
+#include <fcntl.h>
+#include <string.h>
+//#include <malloc.h>
+
+#include "linker.h"
+
+#include "../pub/libvex_basictypes.h"
+
+#if 0
+#define IF_DEBUG(x,y) /* */
+static int debug_linker = 0;
+#endif
+
+
+#if defined(__x86_64__)
+# define x86_64_TARGET_ARCH
+#elif defined(__i386__)
+# define i386_TARGET_ARCH
+#elif defined (__powerpc__)
+# define ppc32_TARGET_ARCH
+#else
+# error "Unknown arch"
+#endif
+
+
+#if 0
+#define CALLOC_MAX 10000000
+static HChar calloc_area[CALLOC_MAX];
+static UInt calloc_used = 0;
+static void* calloc_below2G ( Int n, Int m )
+{
+ void* p;
+ int i;
+ while ((calloc_used % 16) > 0) calloc_used++;
+ assert(calloc_used + n*m < CALLOC_MAX);
+ p = &calloc_area[calloc_used];
+ for (i = 0; i < n*m; i++)
+ calloc_area[calloc_used+i] = 0;
+ calloc_used += n*m;
+ return p;
+}
+#endif
+
+#define MYMALLOC_MAX 50*1000*1000
+static HChar mymalloc_area[MYMALLOC_MAX];
+static UInt mymalloc_used = 0;
+void* mymalloc ( Int n )
+{
+ void* p;
+#if defined(__powerpc64__)
+ while ((ULong)(mymalloc_area+mymalloc_used) & 0xFFF)
+#else
+ while ((UInt)(mymalloc_area+mymalloc_used) & 0xFFF)
+#endif
+ mymalloc_used++;
+ assert(mymalloc_used+n < MYMALLOC_MAX);
+ p = (void*)(&mymalloc_area[mymalloc_used]);
+ mymalloc_used += n;
+ // printf("mymalloc(%d) = %p\n", n, p);
+ return p;
+}
+
+void myfree ( void* p )
+{
+}
+
+
+
+
+
+
+
+#if 0
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// TYPES
+
+#define FALSE 0
+#define TRUE 1
+
+typedef enum { OBJECT_LOADED, OBJECT_RESOLVED } OStatus;
+
+
+#define N_FIXUP_PAGES 1
+
+
+/* Indication of section kinds for loaded objects. Needed by
+ the GC for deciding whether or not a pointer on the stack
+ is a code pointer.
+*/
+typedef
+ enum { SECTIONKIND_CODE_OR_RODATA,
+ SECTIONKIND_RWDATA,
+ SECTIONKIND_OTHER,
+ SECTIONKIND_NOINFOAVAIL }
+ SectionKind;
+
+typedef
+ struct _Section {
+ void* start;
+ void* end;
+ SectionKind kind;
+ struct _Section* next;
+ }
+ Section;
+
+typedef
+ struct _ProddableBlock {
+ void* start;
+ int size;
+ struct _ProddableBlock* next;
+ }
+ ProddableBlock;
+
+/* Top-level structure for an object module. One of these is allocated
+ * for each object file in use.
+ */
+typedef struct _ObjectCode {
+ OStatus status;
+ char* fileName;
+ int fileSize;
+ char* formatName; /* eg "ELF32", "DLL", "COFF", etc. */
+
+ /* An array containing ptrs to all the symbol names copied from
+ this object into the global symbol hash table. This is so that
+ we know which parts of the latter mapping to nuke when this
+ object is removed from the system. */
+ char** symbols;
+ int n_symbols;
+
+ /* ptr to malloc'd lump of memory holding the obj file */
+ void* image;
+
+ /* Fixup area for long-distance jumps. */
+ char* fixup;
+ int fixup_used;
+ int fixup_size;
+
+ /* The section-kind entries for this object module. Linked
+ list. */
+ Section* sections;
+
+ /* A private hash table for local symbols. */
+ /* HashTable* */ void* lochash;
+
+ /* Allow a chain of these things */
+ struct _ObjectCode * next;
+
+ /* SANITY CHECK ONLY: a list of the only memory regions which may
+ safely be prodded during relocation. Any attempt to prod
+ outside one of these is an error in the linker. */
+ ProddableBlock* proddables;
+
+} ObjectCode;
+
+/*
+ * Define a set of types which can be used for both ELF32 and ELF64
+ */
+
+#if VEX_HOST_WORDSIZE == 8
+#define ELFCLASS ELFCLASS64
+#define Elf_Addr Elf64_Addr
+#define Elf_Word Elf64_Word
+#define Elf_Sword Elf64_Sword
+#define Elf_Ehdr Elf64_Ehdr
+#define Elf_Phdr Elf64_Phdr
+#define Elf_Shdr Elf64_Shdr
+#define Elf_Sym Elf64_Sym
+#define Elf_Rel Elf64_Rel
+#define Elf_Rela Elf64_Rela
+#define ELF_ST_TYPE ELF64_ST_TYPE
+#define ELF_ST_BIND ELF64_ST_BIND
+#define ELF_R_TYPE ELF64_R_TYPE
+#define ELF_R_SYM ELF64_R_SYM
+#else
+#define ELFCLASS ELFCLASS32
+#define Elf_Addr Elf32_Addr
+#define Elf_Word Elf32_Word
+#define Elf_Sword Elf32_Sword
+#define Elf_Ehdr Elf32_Ehdr
+#define Elf_Phdr Elf32_Phdr
+#define Elf_Shdr Elf32_Shdr
+#define Elf_Sym Elf32_Sym
+#define Elf_Rel Elf32_Rel
+#define Elf_Rela Elf32_Rela
+#ifndef ELF_ST_TYPE
+#define ELF_ST_TYPE ELF32_ST_TYPE
+#endif
+#ifndef ELF_ST_BIND
+#define ELF_ST_BIND ELF32_ST_BIND
+#endif
+#ifndef ELF_R_TYPE
+#define ELF_R_TYPE ELF32_R_TYPE
+#endif
+#ifndef ELF_R_SYM
+#define ELF_R_SYM ELF32_R_SYM
+#endif
+#endif
+
+
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// PARANOIA
+
+/* -----------------------------------------------------------------------
+ * Sanity checking. For each ObjectCode, maintain a list of address ranges
+ * which may be prodded during relocation, and abort if we try and write
+ * outside any of these.
+ */
+static void addProddableBlock ( ObjectCode* oc, void* start, int size )
+{
+ ProddableBlock* pb
+ = mymalloc(sizeof(ProddableBlock));
+ if (debug_linker)
+ fprintf(stderr, "aPB oc=%p %p %d (%p .. %p)\n", oc, start, size,
+ start, ((char*)start)+size-1 );
+ assert(size > 0);
+ pb->start = start;
+ pb->size = size;
+ pb->next = oc->proddables;
+ oc->proddables = pb;
+}
+
+static void checkProddableBlock ( ObjectCode* oc, void* addr )
+{
+ ProddableBlock* pb;
+ for (pb = oc->proddables; pb != NULL; pb = pb->next) {
+ char* s = (char*)(pb->start);
+ char* e = s + pb->size - 1;
+ char* a = (char*)addr;
+ /* Assumes that the biggest fixup involves a 4-byte write. This
+ probably needs to be changed to 8 (ie, +7) on 64-bit
+ plats. */
+ if (a >= s && (a+3) <= e) return;
+ }
+ fprintf(stderr,
+ "checkProddableBlock: invalid fixup %p in runtime linker\n",
+ addr);
+ exit(1);
+}
+
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// String->Addr mappings
+
+typedef
+ struct { char* mp_name; void* mp_addr; }
+ Maplet;
+
+typedef
+ struct {
+ int sm_size;
+ int sm_used;
+ Maplet* maplets;
+ }
+ StringMap;
+
+static StringMap* new_StringMap ( void )
+{
+ StringMap* sm = mymalloc(sizeof(StringMap));
+ sm->sm_size = 10;
+ sm->sm_used = 0;
+ sm->maplets = mymalloc(10 * sizeof(Maplet));
+ return sm;
+}
+
+static void delete_StringMap ( StringMap* sm )
+{
+ assert(sm->maplets != NULL);
+ myfree(sm->maplets);
+ sm->maplets = NULL;
+ myfree(sm);
+}
+
+static void ensure_StringMap ( StringMap* sm )
+{
+ int i;
+ Maplet* mp2;
+ assert(sm->maplets != NULL);
+ if (sm->sm_used < sm->sm_size)
+ return;
+ sm->sm_size *= 2;
+ mp2 = mymalloc(sm->sm_size * sizeof(Maplet));
+ for (i = 0; i < sm->sm_used; i++)
+ mp2[i] = sm->maplets[i];
+ myfree(sm->maplets);
+ sm->maplets = mp2;
+}
+
+static void* search_StringMap ( StringMap* sm, char* name )
+{
+ int i;
+ for (i = 0; i < sm->sm_used; i++)
+ if (0 == strcmp(name, sm->maplets[i].mp_name))
+ return sm->maplets[i].mp_addr;
+ return NULL;
+}
+
+static void addto_StringMap ( StringMap* sm, char* name, void* addr )
+{
+ ensure_StringMap(sm);
+ sm->maplets[sm->sm_used].mp_name = name;
+ sm->maplets[sm->sm_used].mp_addr = addr;
+ sm->sm_used++;
+}
+
+static void paranoid_addto_StringMap ( StringMap* sm, char* name, void* addr )
+{
+ if (0)
+ fprintf(stderr, "paranoid_addto_StringMap(%s,%p)\n", name, addr);
+ if (search_StringMap(sm,name) != NULL) {
+ fprintf(stderr, "duplicate: paranoid_addto_StringMap(%s,%p)\n", name, addr);
+ exit(1);
+ }
+ addto_StringMap(sm,name,addr);
+}
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// Top-level linker control.
+
+StringMap* global_symbol_table = NULL;
+ObjectCode* global_object_list = NULL;
+
+static void initLinker ( void )
+{
+ if (global_symbol_table != NULL)
+ return;
+ global_symbol_table = new_StringMap();
+}
+
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// SYMBOL TABLE(s)
+
+/* -----------------------------------------------------------------
+ * lookup a symbol in the global symbol table
+ */
+static
+void * lookupSymbol( char *lbl )
+{
+ void *val;
+ initLinker() ;
+ assert(global_symbol_table != NULL);
+ val = search_StringMap(global_symbol_table, lbl);
+ return val;
+}
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// HELPERS
+
+/*
+ * Generic ELF functions
+ */
+
+static char *
+findElfSection ( void* objImage, Elf_Word sh_type )
+{
+ char* ehdrC = (char*)objImage;
+ Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
+ Elf_Shdr* shdr = (Elf_Shdr*)(ehdrC + ehdr->e_shoff);
+ char* sh_strtab = ehdrC + shdr[ehdr->e_shstrndx].sh_offset;
+ char* ptr = NULL;
+ int i;
+
+ for (i = 0; i < ehdr->e_shnum; i++) {
+ if (shdr[i].sh_type == sh_type
+ /* Ignore the section header's string table. */
+ && i != ehdr->e_shstrndx
+ /* Ignore string tables named .stabstr, as they contain
+ debugging info. */
+ && 0 != memcmp(".stabstr", sh_strtab + shdr[i].sh_name, 8)
+ ) {
+ ptr = ehdrC + shdr[i].sh_offset;
+ break;
+ }
+ }
+ return ptr;
+}
+
+#ifdef arm_TARGET_ARCH
+static
+char* alloc_fixup_bytes ( ObjectCode* oc, int nbytes )
+{
+ char* res;
+ assert(nbytes % 4 == 0);
+ assert(nbytes > 0);
+ res = &(oc->fixup[oc->fixup_used]);
+ oc->fixup_used += nbytes;
+ if (oc->fixup_used >= oc->fixup_size) {
+ fprintf(stderr, "fixup area too small for %s\n", oc->fileName);
+ exit(1);
+ }
+ return res;
+}
+#endif
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// RESOLVE
+
+static
+void* lookup_magic_hacks ( char* sym )
+{
+ if (0==strcmp(sym, "printf")) return (void*)(&printf);
+ return NULL;
+}
+
+#ifdef arm_TARGET_ARCH
+static
+void arm_notify_new_code ( char* start, int length )
+{
+ __asm __volatile ("mov r1, %0\n\t"
+ "mov r2, %1\n\t"
+ "mov r3, %2\n\t"
+ "swi 0x9f0002\n\t"
+ :
+ : "ir" (start), "ir" (length), "ir" (0) );
+}
+
+
+static
+void gen_armle_goto ( char* fixup, char* dstP )
+{
+ Elf_Word w = (Elf_Word)dstP;
+ /*
+ 2 .text
+ 3 0000 04F01FE5 ldr pc, value
+ 4 0004 44332211 value: .word 0x11223344
+ */
+ fprintf(stderr,"at %p generating jump to %p\n", fixup, dstP );
+ fixup[0] = 0x04; fixup[1] = 0xF0; fixup[2] = 0x1F; fixup[3] = 0xE5;
+ fixup[4] = w & 0xFF; w >>= 8;
+ fixup[5] = w & 0xFF; w >>= 8;
+ fixup[6] = w & 0xFF; w >>= 8;
+ fixup[7] = w & 0xFF; w >>= 8;
+ arm_notify_new_code(fixup, 8);
+}
+#endif /* arm_TARGET_ARCH */
+
+
+#ifdef ppc32_TARGET_ARCH
+static void invalidate_icache(void *ptr, int nbytes)
+{
+ unsigned long startaddr = (unsigned long) ptr;
+ unsigned long endaddr = startaddr + nbytes;
+ unsigned long addr;
+ unsigned long cls = 16; //VG_(cache_line_size);
+
+ startaddr &= ~(cls - 1);
+ for (addr = startaddr; addr < endaddr; addr += cls)
+ asm volatile("dcbst 0,%0" : : "r" (addr));
+ asm volatile("sync");
+ for (addr = startaddr; addr < endaddr; addr += cls)
+ asm volatile("icbi 0,%0" : : "r" (addr));
+ asm volatile("sync; isync");
+}
+
+static UInt compute_ppc_HA ( UInt x ) {
+ return 0xFFFF & ( (x >> 16) + ((x & 0x8000) ? 1 : 0) );
+}
+static UInt compute_ppc_LO ( UInt x ) {
+ return 0xFFFF & x;
+}
+static UInt compute_ppc_HI ( UInt x ) {
+ return 0xFFFF & (x >> 16);
+}
+#endif /* ppc32_TARGET_ARCH */
+
+
+/* Do ELF relocations which lack an explicit addend. All x86-linux
+ relocations appear to be of this form. */
+static int
+do_Elf_Rel_relocations ( ObjectCode* oc, char* ehdrC,
+ Elf_Shdr* shdr, int shnum,
+ Elf_Sym* stab, char* strtab )
+{
+ int j;
+ char *symbol = NULL;
+ Elf_Word* targ;
+ Elf_Rel* rtab = (Elf_Rel*) (ehdrC + shdr[shnum].sh_offset);
+ int nent = shdr[shnum].sh_size / sizeof(Elf_Rel);
+ int target_shndx = shdr[shnum].sh_info;
+ int symtab_shndx = shdr[shnum].sh_link;
+
+ stab = (Elf_Sym*) (ehdrC + shdr[ symtab_shndx ].sh_offset);
+ targ = (Elf_Word*)(ehdrC + shdr[ target_shndx ].sh_offset);
+ IF_DEBUG(linker,belch( "relocations for section %d using symtab %d",
+ target_shndx, symtab_shndx ));
+
+ for (j = 0; j < nent; j++) {
+ Elf_Addr offset = rtab[j].r_offset;
+ Elf_Addr info = rtab[j].r_info;
+
+ Elf_Addr P = ((Elf_Addr)targ) + offset;
+ Elf_Word* pP = (Elf_Word*)P;
+ Elf_Addr A = *pP;
+ Elf_Addr S;
+ Elf_Addr value;
+
+ IF_DEBUG(linker,belch( "Rel entry %3d is raw(%6p %6p)",
+ j, (void*)offset, (void*)info ));
+ if (!info) {
+ IF_DEBUG(linker,belch( " ZERO" ));
+ S = 0;
+ } else {
+ Elf_Sym sym = stab[ELF_R_SYM(info)];
+ /* First see if it is a local symbol. */
+ if (ELF_ST_BIND(sym.st_info) == STB_LOCAL) {
+ /* Yes, so we can get the address directly from the ELF symbol
+ table. */
+ symbol = sym.st_name==0 ? "(noname)" : strtab+sym.st_name;
+ S = (Elf_Addr)
+ (ehdrC + shdr[ sym.st_shndx ].sh_offset
+ + stab[ELF_R_SYM(info)].st_value);
+
+ } else {
+ /* No, so look up the name in our global table. */
+ symbol = strtab + sym.st_name;
+ S = (Elf_Addr)lookupSymbol( symbol );
+ }
+ if (!S) {
+ S = (Elf_Addr)lookup_magic_hacks(symbol);
+ }
+ if (!S) {
+ fprintf(stderr,"%s: unknown symbol `%s'\n",
+ oc->fileName, symbol);
+ return 0;
+ }
+ if (debug_linker>1)
+ fprintf(stderr, "\n`%s' resolves to %p\n", symbol, (void*)S );
+ }
+
+ if (debug_linker>1)
+ fprintf(stderr, "Reloc: P = %p S = %p A = %p\n",
+ (void*)P, (void*)S, (void*)A );
+ checkProddableBlock ( oc, pP );
+
+ value = S + A;
+
+ switch (ELF_R_TYPE(info)) {
+# ifdef i386_TARGET_ARCH
+ case R_386_32: *pP = value; break;
+ case R_386_PC32: *pP = value - P; break;
+# endif
+# ifdef arm_TARGET_ARCH
+ case R_ARM_PC24: {
+ Elf_Word w, delta, deltaTop8;
+ /* Generate a jump sequence into the fixup area
+ and branch to that instead. */
+ char* fixup = alloc_fixup_bytes(oc, 8);
+ /* First of all, figure out where we're really trying to
+ jump to. */
+ // compensate for pc+8 bias
+ Elf_Word real_dst = (A & 0x00FFFFFF) + 2;
+ // sign-extend 24-to-32 of real_dst
+ if (real_dst & 0x00800000)
+ real_dst |= 0xFF000000;
+ else
+ real_dst &= 0x00FFFFFF;
+
+ real_dst <<= 2;
+ real_dst += S;
+
+ gen_armle_goto(fixup, (char*)real_dst);
+
+ /* Delta is in bytes .. */
+ delta = (((Elf_Word)fixup) - ((Elf_Word)pP) - 8);
+ deltaTop8 = (delta >> 24) & 0xFF;
+ if (deltaTop8 != 0 && deltaTop8 != 0xFF) {
+ fprintf(stderr,"R_ARM_PC24: out of range delta 0x%x for %s\n",
+ delta, symbol);
+ exit(1);
+ }
+ delta >>= 2;
+ w = *pP;
+ w &= 0xFF000000;
+ w |= (0x00FFFFFF & delta );
+ *pP = w;
+ break;
+ }
+ case R_ARM_ABS32:
+ *pP = value;
+ break;
+# endif
+ default:
+ fprintf(stderr,
+ "%s: unhandled ELF relocation(Rel) type %d\n\n",
+ oc->fileName, (Int)ELF_R_TYPE(info));
+ return 0;
+ }
+
+ }
+ return 1;
+}
+
+/* Do ELF relocations for which explicit addends are supplied.
+ sparc-solaris relocations appear to be of this form. */
+static int
+do_Elf_Rela_relocations ( ObjectCode* oc, char* ehdrC,
+ Elf_Shdr* shdr, int shnum,
+ Elf_Sym* stab, char* strtab )
+{
+ int j;
+ char *symbol;
+ Elf_Addr targ;
+ Elf_Rela* rtab = (Elf_Rela*) (ehdrC + shdr[shnum].sh_offset);
+ int nent = shdr[shnum].sh_size / sizeof(Elf_Rela);
+ int target_shndx = shdr[shnum].sh_info;
+ int symtab_shndx = shdr[shnum].sh_link;
+
+ stab = (Elf_Sym*) (ehdrC + shdr[ symtab_shndx ].sh_offset);
+ targ = (Elf_Addr) (ehdrC + shdr[ target_shndx ].sh_offset);
+ IF_DEBUG(linker,belch( "relocations for section %d using symtab %d",
+ target_shndx, symtab_shndx ));
+
+ for (j = 0; j < nent; j++) {
+#if defined(DEBUG) || defined(sparc_TARGET_ARCH) \
+ || defined(ia64_TARGET_ARCH) \
+ || defined(x86_64_TARGET_ARCH) \
+ || defined(ppc32_TARGET_ARCH)
+ /* This #ifdef only serves to avoid unused-var warnings. */
+ Elf_Addr offset = rtab[j].r_offset;
+ Elf_Addr P = targ + offset;
+#endif
+ Elf_Addr info = rtab[j].r_info;
+ Elf_Addr A = rtab[j].r_addend;
+ Elf_Addr S =0;
+ Elf_Addr value;
+# if defined(sparc_TARGET_ARCH)
+ Elf_Word* pP = (Elf_Word*)P;
+ Elf_Word w1, w2;
+# endif
+# if defined(ia64_TARGET_ARCH)
+ Elf64_Xword *pP = (Elf64_Xword *)P;
+ Elf_Addr addr;
+# endif
+# if defined(x86_64_TARGET_ARCH)
+ ULong* pP = (ULong*)P;
+# endif
+# if defined(ppc32_TARGET_ARCH)
+ Int sI, sI2;
+ Elf_Word* pP = (Elf_Word*)P;
+# endif
+
+ IF_DEBUG(linker,belch( "Rel entry %3d is raw(%6p %6p %6p) ",
+ j, (void*)offset, (void*)info,
+ (void*)A ));
+ if (!info) {
+ IF_DEBUG(linker,belch( " ZERO" ));
+ S = 0;
+ } else {
+ Elf_Sym sym = stab[ELF_R_SYM(info)];
+ /* First see if it is a local symbol. */
+ if (ELF_ST_BIND(sym.st_info) == STB_LOCAL) {
+ /* Yes, so we can get the address directly from the ELF symbol
+ table. */
+ symbol = sym.st_name==0 ? "(noname)" : strtab+sym.st_name;
+ S = (Elf_Addr)
+ (ehdrC + shdr[ sym.st_shndx ].sh_offset
+ + stab[ELF_R_SYM(info)].st_value);
+#ifdef ELF_FUNCTION_DESC
+ /* Make a function descriptor for this function */
+ if (S && ELF_ST_TYPE(sym.st_info) == STT_FUNC) {
+ S = allocateFunctionDesc(S + A);
+ A = 0;
+ }
+#endif
+ } else {
+ /* No, so look up the name in our global table. */
+ symbol = strtab + sym.st_name;
+ S = (Elf_Addr)lookupSymbol( symbol );
+
+#ifdef ELF_FUNCTION_DESC
+ /* If a function, already a function descriptor - we would
+ have to copy it to add an offset. */
+ if (S && (ELF_ST_TYPE(sym.st_info) == STT_FUNC) && (A != 0))
+ belch("%s: function %s with addend %p", oc->fileName, symbol, (void *)A);
+#endif
+ }
+ if (!S) {
+ fprintf(stderr,"%s: unknown symbol `%s'\n", oc->fileName, symbol);
+ return 0;
+ }
+ if (0)
+ fprintf(stderr, "`%s' resolves to %p\n", symbol, (void*)S );
+ }
+
+#if 0
+ fprintf ( stderr, "Reloc: offset = %p P = %p S = %p A = %p\n",
+ (void*)offset, (void*)P, (void*)S, (void*)A );
+#endif
+
+ /* checkProddableBlock ( oc, (void*)P ); */
+
+ value = S + A;
+
+ switch (ELF_R_TYPE(info)) {
+# if defined(sparc_TARGET_ARCH)
+ case R_SPARC_WDISP30:
+ w1 = *pP & 0xC0000000;
+ w2 = (Elf_Word)((value - P) >> 2);
+ ASSERT((w2 & 0xC0000000) == 0);
+ w1 |= w2;
+ *pP = w1;
+ break;
+ case R_SPARC_HI22:
+ w1 = *pP & 0xFFC00000;
+ w2 = (Elf_Word)(value >> 10);
+ ASSERT((w2 & 0xFFC00000) == 0);
+ w1 |= w2;
+ *pP = w1;
+ break;
+ case R_SPARC_LO10:
+ w1 = *pP & ~0x3FF;
+ w2 = (Elf_Word)(value & 0x3FF);
+ ASSERT((w2 & ~0x3FF) == 0);
+ w1 |= w2;
+ *pP = w1;
+ break;
+ /* According to the Sun documentation:
+ R_SPARC_UA32
+ This relocation type resembles R_SPARC_32, except it refers to an
+ unaligned word. That is, the word to be relocated must be treated
+ as four separate bytes with arbitrary alignment, not as a word
+ aligned according to the architecture requirements.
+
+ (JRS: which means that freeloading on the R_SPARC_32 case
+ is probably wrong, but hey ...)
+ */
+ case R_SPARC_UA32:
+ case R_SPARC_32:
+ w2 = (Elf_Word)value;
+ *pP = w2;
+ break;
+# endif
+# if defined(ia64_TARGET_ARCH)
+ case R_IA64_DIR64LSB:
+ case R_IA64_FPTR64LSB:
+ *pP = value;
+ break;
+ case R_IA64_PCREL64LSB:
+ *pP = value - P;
+ break;
+ case R_IA64_SEGREL64LSB:
+ addr = findElfSegment(ehdrC, value);
+ *pP = value - addr;
+ break;
+ case R_IA64_GPREL22:
+ ia64_reloc_gprel22(P, value);
+ break;
+ case R_IA64_LTOFF22:
+ case R_IA64_LTOFF22X:
+ case R_IA64_LTOFF_FPTR22:
+ addr = allocateGOTEntry(value);
+ ia64_reloc_gprel22(P, addr);
+ break;
+ case R_IA64_PCREL21B:
+ ia64_reloc_pcrel21(P, S, oc);
+ break;
+ case R_IA64_LDXMOV:
+ /* This goes with R_IA64_LTOFF22X and points to the load to
+ convert into a move. We don't implement relaxation. */
+ break;
+# endif
+# if defined(x86_64_TARGET_ARCH)
+ case R_X86_64_64: /* 1 *//* Direct 64 bit */
+ *((ULong*)pP) = (ULong)(S + A);
+ break;
+ case R_X86_64_PC32: /* 2 *//* PC relative 32 bit signed */
+ *((UInt*)pP) = (UInt)(S + A - P);
+ break;
+ case R_X86_64_32: /* 10 *//* Direct 32 bit zero extended */
+ *((UInt*)pP) = (UInt)(S + A);
+ break;
+ case R_X86_64_32S: /* 11 *//* Direct 32 bit sign extended */
+ *((UInt*)pP) = (UInt)(S + A);
+ break;
+# endif
+# if defined(ppc32_TARGET_ARCH)
+ case R_PPC_ADDR32: /* 1 *//* 32bit absolute address */
+ *((UInt*)pP) = S+A;
+ invalidate_icache(pP,4);
+ break;
+ case R_PPC_ADDR16_LO: /* 4 *//* lower 16bit of absolute address */
+ *((UInt*)pP) &= 0x0000FFFF;
+ *((UInt*)pP) |= 0xFFFF0000 & (compute_ppc_LO(S+A) << 16);
+ invalidate_icache(pP,4);
+ break;
+ case R_PPC_ADDR16_HA: /* 6 *//* adjusted high 16bit */
+ *((UInt*)pP) &= 0x0000FFFF;
+ *((UInt*)pP) |= 0xFFFF0000 & (compute_ppc_HA(S+A) << 16);
+ invalidate_icache(pP,4);
+ break;
+ case R_PPC_REL24: /* 10 *//* PC relative 26 bit */
+ sI = S+A-P;
+ sI >>= 2;
+ /* the top 9 bits of sI must be the same (all 0s or
+ all 1s) for this to be valid; else we have to fail. */
+ sI2 = sI >> 23; /* 23 == 32 - 9 */
+ if (sI2 != 0 && sI2 != 0xFFFFFFFF) {
+ fprintf(stderr, "%s: R_PPC_REL24 relocation failed\n", oc->fileName );
+ return 0;
+ }
+ *((UInt*)pP) &= ~(0x00FFFFFF << 2);
+ *((UInt*)pP) |= (0xFFFFFF & sI) << 2;
+ invalidate_icache(pP,4);
+ break;
+ case R_PPC_REL32: /* 26 */
+ *((UInt*)pP) = S+A-P;
+ invalidate_icache(pP,4);
+ break;
+# endif
+ default:
+ fprintf(stderr,
+ "%s: unhandled ELF relocation(RelA) type %d\n",
+ oc->fileName, (Int)ELF_R_TYPE(info));
+ return 0;
+ }
+
+ }
+ return 1;
+}
+
+
+static int
+ocResolve_ELF ( ObjectCode* oc )
+{
+ char *strtab;
+ int shnum, ok;
+ Elf_Sym* stab = NULL;
+ char* ehdrC = (char*)(oc->image);
+ Elf_Ehdr* ehdr = (Elf_Ehdr*) ehdrC;
+ Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
+ char* sh_strtab = ehdrC + shdr[ehdr->e_shstrndx].sh_offset;
+
+ /* first find "the" symbol table */
+ stab = (Elf_Sym*) findElfSection ( ehdrC, SHT_SYMTAB );
+
+ /* also go find the string table */
+ strtab = findElfSection ( ehdrC, SHT_STRTAB );
+
+ if (stab == NULL || strtab == NULL) {
+ fprintf(stderr,"%s: can't find string or symbol table\n", oc->fileName);
+ return 0;
+ }
+
+ /* Process the relocation sections. */
+ for (shnum = 0; shnum < ehdr->e_shnum; shnum++) {
+
+ /* Skip sections called ".rel.stab". These appear to contain
+ relocation entries that, when done, make the stabs debugging
+ info point at the right places. We ain't interested in all
+ dat jazz, mun. */
+ if (0 == memcmp(".rel.stab", sh_strtab + shdr[shnum].sh_name, 9))
+ continue;
+
+ if (shdr[shnum].sh_type == SHT_REL ) {
+ ok = do_Elf_Rel_relocations ( oc, ehdrC, shdr,
+ shnum, stab, strtab );
+ if (!ok) return ok;
+ }
+ else
+ if (shdr[shnum].sh_type == SHT_RELA) {
+ ok = do_Elf_Rela_relocations ( oc, ehdrC, shdr,
+ shnum, stab, strtab );
+ if (!ok) return ok;
+ }
+ }
+
+ /* Free the local symbol table; we won't need it again. */
+ delete_StringMap(oc->lochash);
+ oc->lochash = NULL;
+
+ return 1;
+}
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// VERIFY
+
+static int
+ocVerifyImage_ELF ( ObjectCode* oc )
+{
+ Elf_Shdr* shdr;
+ Elf_Sym* stab;
+ int i, j, nent, nstrtab, nsymtabs;
+ char* sh_strtab;
+ char* strtab;
+
+ char* ehdrC = (char*)(oc->image);
+ Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
+
+ if (ehdr->e_ident[EI_MAG0] != ELFMAG0 ||
+ ehdr->e_ident[EI_MAG1] != ELFMAG1 ||
+ ehdr->e_ident[EI_MAG2] != ELFMAG2 ||
+ ehdr->e_ident[EI_MAG3] != ELFMAG3) {
+ fprintf(stderr,"%s: not an ELF object\n", oc->fileName);
+ return 0;
+ }
+
+ if (ehdr->e_ident[EI_CLASS] != ELFCLASS) {
+ fprintf(stderr,"%s: unsupported ELF format\n", oc->fileName);
+ return 0;
+ }
+
+ if (ehdr->e_ident[EI_DATA] == ELFDATA2LSB) {
+ if (debug_linker)
+ fprintf(stderr, "Is little-endian\n" );
+ } else
+ if (ehdr->e_ident[EI_DATA] == ELFDATA2MSB) {
+ if (debug_linker)
+ fprintf(stderr, "Is big-endian\n" );
+ } else {
+ fprintf(stderr,"%s: unknown endiannness\n", oc->fileName);
+ return 0;
+ }
+
+ if (ehdr->e_type != ET_REL) {
+ fprintf(stderr,"%s: not a relocatable object (.o) file\n", oc->fileName);
+ return 0;
+ }
+ if (debug_linker)
+ fprintf(stderr, "Is a relocatable object (.o) file\n" );
+
+ if (debug_linker)
+ fprintf(stderr, "Architecture is " );
+ switch (ehdr->e_machine) {
+ case EM_386: if (debug_linker) fprintf(stderr, "x86\n" ); break;
+ case EM_SPARC: if (debug_linker) fprintf(stderr, "sparc\n" ); break;
+ case EM_ARM: if (debug_linker) fprintf(stderr, "arm\n" ); break;
+#ifdef EM_IA_64
+ case EM_IA_64: if (debug_linker) fprintf(stderr, "ia64\n" ); break;
+#endif
+ case EM_X86_64: if (debug_linker) fprintf(stderr, "x86_64\n" ); break;
+ case EM_PPC: if (debug_linker) fprintf(stderr, "ppc\n" ); break;
+ default: if (debug_linker) fprintf(stderr, "unknown\n" );
+ fprintf(stderr,"%s: unknown architecture\n", oc->fileName);
+ return 0;
+ }
+
+ if (debug_linker>1) fprintf(stderr,
+ "\nSection header table: start %lld, n_entries %d, ent_size %d\n",
+ (Long)ehdr->e_shoff,
+ ehdr->e_shnum, ehdr->e_shentsize );
+
+ assert (ehdr->e_shentsize == sizeof(Elf_Shdr));
+
+ shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
+
+ if (ehdr->e_shstrndx == SHN_UNDEF) {
+ fprintf(stderr,"%s: no section header string table\n", oc->fileName);
+ return 0;
+ } else {
+ if (debug_linker>1)
+ fprintf(stderr, "Section header string table is section %d\n",
+ ehdr->e_shstrndx);
+ sh_strtab = ehdrC + shdr[ehdr->e_shstrndx].sh_offset;
+ }
+
+ for (i = 0; i < ehdr->e_shnum; i++) {
+ if (debug_linker>1) fprintf(stderr, "%2d: ", i );
+ if (debug_linker>1) fprintf(stderr, "type=%2d ", (int)shdr[i].sh_type );
+ if (debug_linker>1) fprintf(stderr, "size=%4d ", (int)shdr[i].sh_size );
+ if (debug_linker>1) fprintf(stderr, "offs=%4d ", (int)shdr[i].sh_offset );
+ if (debug_linker>1) fprintf(stderr, " (%p .. %p) ",
+ ehdrC + shdr[i].sh_offset,
+ ehdrC + shdr[i].sh_offset + shdr[i].sh_size - 1);
+
+ if (shdr[i].sh_type == SHT_REL) {
+ if (debug_linker>1) fprintf(stderr, "Rel " );
+ } else if (shdr[i].sh_type == SHT_RELA) {
+ if (debug_linker>1) fprintf(stderr, "RelA " );
+ } else {
+ if (debug_linker>1) fprintf(stderr," ");
+ }
+ if (sh_strtab) {
+ if (debug_linker>1) fprintf(stderr, "sname=%s\n",
+ sh_strtab + shdr[i].sh_name );
+ }
+ }
+
+ if (debug_linker>1) fprintf(stderr, "\nString tables\n" );
+ strtab = NULL;
+ nstrtab = 0;
+ for (i = 0; i < ehdr->e_shnum; i++) {
+ if (shdr[i].sh_type == SHT_STRTAB
+ /* Ignore the section header's string table. */
+ && i != ehdr->e_shstrndx
+ /* Ignore string tables named .stabstr, as they contain
+ debugging info. */
+ && 0 != memcmp(".stabstr", sh_strtab + shdr[i].sh_name, 8)
+ ) {
+ if (debug_linker>1)
+ fprintf(stderr," section %d is a normal string table\n", i );
+ strtab = ehdrC + shdr[i].sh_offset;
+ nstrtab++;
+ }
+ }
+ if (nstrtab != 1) {
+ fprintf(stderr,"%s: no string tables, or too many\n", oc->fileName);
+ return 0;
+ }
+
+ nsymtabs = 0;
+ if (debug_linker>1) fprintf(stderr, "\nSymbol tables\n" );
+ for (i = 0; i < ehdr->e_shnum; i++) {
+ if (shdr[i].sh_type != SHT_SYMTAB) continue;
+ if (debug_linker>1) fprintf(stderr, "section %d is a symbol table\n", i );
+ nsymtabs++;
+ stab = (Elf_Sym*) (ehdrC + shdr[i].sh_offset);
+ nent = shdr[i].sh_size / sizeof(Elf_Sym);
+ if (debug_linker>1) fprintf(stderr,
+ " number of entries is apparently %d (%lld rem)\n",
+ nent,
+ (Long)(shdr[i].sh_size % sizeof(Elf_Sym))
+ );
+ if (0 != shdr[i].sh_size % sizeof(Elf_Sym)) {
+ fprintf(stderr,"%s: non-integral number of symbol table entries\n",
+ oc->fileName);
+ return 0;
+ }
+ for (j = 0; j < nent; j++) {
+ if (debug_linker>1) fprintf(stderr, " %2d ", j );
+ if (debug_linker>1) fprintf(stderr, " sec=%-5d size=%-3d val=%5p ",
+ (int)stab[j].st_shndx,
+ (int)stab[j].st_size,
+ (char*)stab[j].st_value );
+
+ if (debug_linker>1) fprintf(stderr, "type=" );
+ switch (ELF_ST_TYPE(stab[j].st_info)) {
+ case STT_NOTYPE: if (debug_linker>1) fprintf(stderr, "notype " ); break;
+ case STT_OBJECT: if (debug_linker>1) fprintf(stderr, "object " ); break;
+ case STT_FUNC : if (debug_linker>1) fprintf(stderr, "func " ); break;
+ case STT_SECTION: if (debug_linker>1) fprintf(stderr, "section" ); break;
+ case STT_FILE: if (debug_linker>1) fprintf(stderr, "file " ); break;
+ default: if (debug_linker>1) fprintf(stderr, "? " ); break;
+ }
+ if (debug_linker>1) fprintf(stderr, " " );
+
+ if (debug_linker>1) fprintf(stderr, "bind=" );
+ switch (ELF_ST_BIND(stab[j].st_info)) {
+ case STB_LOCAL : if (debug_linker>1) fprintf(stderr, "local " ); break;
+ case STB_GLOBAL: if (debug_linker>1) fprintf(stderr, "global" ); break;
+ case STB_WEAK : if (debug_linker>1) fprintf(stderr, "weak " ); break;
+ default: if (debug_linker>1) fprintf(stderr, "? " ); break;
+ }
+ if (debug_linker>1) fprintf(stderr, " " );
+
+ if (debug_linker>1) fprintf(stderr, "name=%s\n", strtab + stab[j].st_name );
+ }
+ }
+
+ if (nsymtabs == 0) {
+ fprintf(stderr,"%s: didn't find any symbol tables\n", oc->fileName);
+ return 0;
+ }
+
+ return 1;
+}
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// GETNAMES
+
+static int
+ocGetNames_ELF ( ObjectCode* oc )
+{
+ int i, j, k, nent;
+ Elf_Sym* stab;
+
+ char* ehdrC = (char*)(oc->image);
+ Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
+ char* strtab = findElfSection ( ehdrC, SHT_STRTAB );
+ Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
+
+ char* sh_strtab = ehdrC + shdr[ehdr->e_shstrndx].sh_offset;
+ char* sec_name;
+
+ assert(global_symbol_table != NULL);
+
+ if (!strtab) {
+ fprintf(stderr,"%s: no strtab\n", oc->fileName);
+ return 0;
+ }
+
+ k = 0;
+ for (i = 0; i < ehdr->e_shnum; i++) {
+ /* Figure out what kind of section it is. Logic derived from
+ Figure 1.14 ("Special Sections") of the ELF document
+ ("Portable Formats Specification, Version 1.1"). */
+ Elf_Shdr hdr = shdr[i];
+ SectionKind kind = SECTIONKIND_OTHER;
+ int is_bss = FALSE;
+
+ if (hdr.sh_type == SHT_PROGBITS
+ && (hdr.sh_flags & SHF_ALLOC) && (hdr.sh_flags & SHF_EXECINSTR)) {
+ /* .text-style section */
+ kind = SECTIONKIND_CODE_OR_RODATA;
+ }
+ else
+ if (hdr.sh_type == SHT_PROGBITS
+ && (hdr.sh_flags & SHF_ALLOC) && (hdr.sh_flags & SHF_WRITE)) {
+ /* .data-style section */
+ kind = SECTIONKIND_RWDATA;
+ }
+ else
+ if (hdr.sh_type == SHT_PROGBITS
+ && (hdr.sh_flags & SHF_ALLOC) && !(hdr.sh_flags & SHF_WRITE)) {
+ /* .rodata-style section */
+ kind = SECTIONKIND_CODE_OR_RODATA;
+ }
+ else
+ if (hdr.sh_type == SHT_NOBITS
+ && (hdr.sh_flags & SHF_ALLOC) && (hdr.sh_flags & SHF_WRITE)) {
+ /* .bss-style section */
+ kind = SECTIONKIND_RWDATA;
+ is_bss = TRUE;
+ }
+
+ if (is_bss && shdr[i].sh_size > 0) {
+ /* This is a non-empty .bss section. Allocate zeroed space for
+ it, and set its .sh_offset field such that
+ ehdrC + .sh_offset == addr_of_zeroed_space. */
+ char* zspace = calloc(1, shdr[i].sh_size);
+ shdr[i].sh_offset = ((char*)zspace) - ((char*)ehdrC);
+ if (1)
+ fprintf(stderr, "BSS section at %p, size %lld\n",
+ zspace, (Long)shdr[i].sh_size);
+ }
+
+ /* When loading objects compiled with -g, it seems there are
+ relocations in various debug-info sections. So we'd better
+ tell addProddableBlock to allow those bits to be prodded. */
+ //fprintf(stderr, "ZZZZZZZZZZ %s\n", sh_strtab + hdr.sh_name);
+ sec_name = sh_strtab + shdr[i].sh_name;
+ if (kind == SECTIONKIND_OTHER
+ && (0 == strcmp(".debug_info", sec_name)
+ || 0 == strcmp(".debug_line", sec_name)
+ || 0 == strcmp(".debug_pubnames", sec_name)
+ || 0 == strcmp(".debug_aranges", sec_name)
+ || 0 == strcmp(".debug_frame", sec_name))) {
+ kind = SECTIONKIND_CODE_OR_RODATA;
+ }
+
+ /* fill in the section info */
+ if (kind != SECTIONKIND_OTHER && shdr[i].sh_size > 0) {
+ addProddableBlock(oc, ehdrC + shdr[i].sh_offset, shdr[i].sh_size);
+ //addSection(oc, kind, ehdrC + shdr[i].sh_offset,
+ // ehdrC + shdr[i].sh_offset + shdr[i].sh_size - 1);
+ }
+
+ if (shdr[i].sh_type != SHT_SYMTAB) continue;
+
+ /* copy stuff into this module's object symbol table */
+ stab = (Elf_Sym*) (ehdrC + shdr[i].sh_offset);
+ nent = shdr[i].sh_size / sizeof(Elf_Sym);
+
+ oc->n_symbols = nent;
+ oc->symbols = mymalloc(oc->n_symbols * sizeof(char*));
+
+ for (j = 0; j < nent; j++) {
+
+ char isLocal = FALSE; /* avoids uninit-var warning */
+ char* ad = NULL;
+ char* nm = strtab + stab[j].st_name;
+ int secno = stab[j].st_shndx;
+
+ /* Figure out if we want to add it; if so, set ad to its
+ address. Otherwise leave ad == NULL. */
+
+ if (secno == SHN_COMMON) {
+ isLocal = FALSE;
+# if defined(__x86_64__)
+ ad = calloc_below2G(1, stab[j].st_size);
+# else
+ ad = calloc(1, stab[j].st_size);
+# endif
+ // assert( Ptr_to_ULong(ad) < 0xF0000000ULL );
+
+ if (0)
+ fprintf(stderr, "COMMON symbol, size %lld name %s allocd %p\n",
+ (Long)stab[j].st_size, nm, ad);
+ /* Pointless to do addProddableBlock() for this area,
+ since the linker should never poke around in it. */
+ }
+ else
+ if ( ( ELF_ST_BIND(stab[j].st_info)==STB_GLOBAL
+ || ELF_ST_BIND(stab[j].st_info)==STB_LOCAL
+ )
+ /* and not an undefined symbol */
+ && stab[j].st_shndx != SHN_UNDEF
+ /* and not in a "special section" */
+ && stab[j].st_shndx < SHN_LORESERVE
+ &&
+ /* and it's a not a section or string table or anything silly */
+ ( ELF_ST_TYPE(stab[j].st_info)==STT_FUNC ||
+ ELF_ST_TYPE(stab[j].st_info)==STT_OBJECT ||
+ ELF_ST_TYPE(stab[j].st_info)==STT_NOTYPE
+ )
+ ) {
+ /* Section 0 is the undefined section, hence > and not >=. */
+ assert(secno > 0 && secno < ehdr->e_shnum);
+ /*
+ if (shdr[secno].sh_type == SHT_NOBITS) {
+ fprintf(stderr, " BSS symbol, size %d off %d name %s\n",
+ stab[j].st_size, stab[j].st_value, nm);
+ }
+ */
+ ad = ehdrC + shdr[ secno ].sh_offset + stab[j].st_value;
+ if (ELF_ST_BIND(stab[j].st_info)==STB_LOCAL) {
+ isLocal = TRUE;
+ } else {
+#ifdef ELF_FUNCTION_DESC
+ /* dlsym() and the initialisation table both give us function
+ * descriptors, so to be consistent we store function descriptors
+ * in the symbol table */
+ if (ELF_ST_TYPE(stab[j].st_info) == STT_FUNC)
+ ad = (char *)allocateFunctionDesc((Elf_Addr)ad);
+#endif
+ if (0|| debug_linker)
+ fprintf(stderr, "addOTabName(GLOB): %10p %s %s\n",
+ ad, oc->fileName, nm );
+ isLocal = FALSE;
+ }
+ }
+
+ /* And the decision is ... */
+
+ if (ad != NULL) {
+ assert(nm != NULL);
+ oc->symbols[j] = nm;
+ /* Acquire! */
+ if (isLocal) {
+ /* Ignore entirely. */
+ } else {
+ //ghciInsertStrHashTable(oc->fileName, global_symbol_table, nm, ad);
+ paranoid_addto_StringMap(global_symbol_table, nm, ad);
+ }
+ } else {
+ /* Skip. */
+ if (debug_linker>1) fprintf(stderr, "skipping `%s'\n",
+ strtab + stab[j].st_name );
+ /*
+ fprintf(stderr,
+ "skipping bind = %d, type = %d, shndx = %d `%s'\n",
+ (int)ELF_ST_BIND(stab[j].st_info),
+ (int)ELF_ST_TYPE(stab[j].st_info),
+ (int)stab[j].st_shndx,
+ strtab + stab[j].st_name
+ );
+ */
+ oc->symbols[j] = NULL;
+ }
+
+ }
+ }
+
+ return 1;
+}
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// TOP-LEVEL CONTROL OF THE LINKER
+
+
+/* ---------------------------------------------------------------------
+ * Load an obj (populate the global symbol table, but don't resolve yet)
+ *
+ * Returns: 1 if ok, 0 on error.
+ */
+static
+int loadObj( char *path )
+{
+ ObjectCode* oc;
+ struct stat st;
+ int r;
+ int fd, pagesize;
+ char* p;
+
+ initLinker();
+
+ fprintf(stderr, "==== loadObj %s ====\n", path );
+
+ /* Check that we haven't already loaded this object. */
+ {
+ ObjectCode *o;
+ int is_dup = 0;
+ for (o = global_object_list; o; o = o->next) {
+ if (0 == strcmp(o->fileName, path))
+ is_dup = 1;
+ }
+ if (is_dup) {
+ fprintf(stderr,
+ "\n\n"
+ "GHCi runtime linker: warning: looks like you're trying to load the\n"
+ "same object file twice:\n"
+ " %s\n"
+ , path);
+ exit(1);
+ }
+ }
+
+ oc = mymalloc(sizeof(ObjectCode));
+
+ oc->formatName = "ELF";
+
+ r = stat(path, &st);
+ if (r == -1) { return 0; }
+
+ /* sigh, strdup() isn't a POSIX function, so do it the long way */
+ oc->fileName = mymalloc( strlen(path)+1 );
+ strcpy(oc->fileName, path);
+
+ oc->fileSize = st.st_size;
+ oc->symbols = NULL;
+ oc->sections = NULL;
+ oc->lochash = new_StringMap();
+ oc->proddables = NULL;
+ oc->fixup = NULL;
+ oc->fixup_used = 0;
+ oc->fixup_size = 0;
+
+ /* chain it onto the list of objects */
+ oc->next = global_object_list;
+ global_object_list = oc;
+
+ fd = open(path, O_RDONLY);
+ if (fd == -1) {
+ fprintf(stderr,"loadObj: can't open `%s'\n", path);
+ exit(1);
+ }
+
+ /* Allocate a 1-page area just prior to the image, so we can put
+ fixup code fragments there. Used for doing R_ARM_PC24
+ relocations for jump distances > 64M. */
+
+ pagesize = getpagesize();
+ // p = memalign(pagesize, N_FIXUP_PAGES * pagesize
+ // + oc->fileSize);
+ p = mymalloc(N_FIXUP_PAGES * pagesize + oc->fileSize);
+ if (0) fprintf(stderr,"XXXX p = %p\n", p);
+ if (p == NULL) {
+ fprintf(stderr,"loadObj: failed to allocate space for `%s'\n", path);
+ exit(1);
+ }
+
+ oc->fixup = p;
+ oc->fixup_size = N_FIXUP_PAGES * pagesize;
+ oc->fixup_used = 0;
+ oc->image = &(p[ oc->fixup_size ]);
+
+ r = read(fd, oc->image, oc->fileSize);
+ if (r != oc->fileSize) {
+ fprintf(stderr,"loadObj: failed to read `%s'\n", path);
+ exit(1);
+ }
+
+ fprintf(stderr, "loaded %s at %p (fixup = %p)\n",
+ oc->fileName, oc->image, oc->fixup );
+
+ close(fd);
+
+ /* verify the in-memory image */
+ r = ocVerifyImage_ELF ( oc );
+ if (!r) { return r; }
+
+ /* build the symbol list for this image */
+ r = ocGetNames_ELF ( oc );
+ if (!r) { return r; }
+
+ /* loaded, but not resolved yet */
+ oc->status = OBJECT_LOADED;
+
+#ifdef ppc32_TARGET_ARCH
+ invalidate_icache(oc->image, oc->fileSize);
+#endif
+
+ return 1;
+}
+
+
+
+/* ---------------------------------------------------------------------------
+ * resolve all the currently unlinked objects in memory
+ *
+ * Returns: 1 if ok, 0 on error.
+ */
+static
+int resolveObjs( void )
+{
+ ObjectCode *oc;
+ int r;
+
+ initLinker();
+
+ for (oc = global_object_list; oc; oc = oc->next) {
+ if (oc->status != OBJECT_RESOLVED) {
+ r = ocResolve_ELF ( oc );
+ if (!r) { return r; }
+ oc->status = OBJECT_RESOLVED;
+ }
+ }
+ return 1;
+}
+
+
+/* ---------------------------------------------------------------------------
+ * Top-level linker.
+ */
+
+/* Load and link a bunch of .o's, and return the address of
+ 'entry'. Or NULL if something borks.
+*/
+void* linker_top_level_LINK ( int n_object_names, char** object_names )
+{
+ int r, i;
+ void* mainp;
+
+ initLinker();
+ for (i = 0; i < n_object_names; i++) {
+ //fprintf(stderr, "linkloop %d %s\n", i, object_names[i] );
+ r = loadObj( object_names[i] );
+ if (r != 1) return NULL;
+ }
+ r = resolveObjs();
+ if (r != 1) return NULL;
+ mainp = search_StringMap ( global_symbol_table, "entry" );
+ if (mainp == NULL) return NULL;
+ printf("switchback: Linker: success!\n");
+ return mainp;
+}
+
+
+#endif
diff --git a/main/VEX/switchback/linker.h b/main/VEX/switchback/linker.h
new file mode 100644
index 0000000..e8b683e
--- /dev/null
+++ b/main/VEX/switchback/linker.h
@@ -0,0 +1,5 @@
+
+extern
+void* linker_top_level_LINK ( int n_object_names, char** object_names );
+
+extern void* mymalloc ( int );
diff --git a/main/VEX/switchback/switchback.c b/main/VEX/switchback/switchback.c
new file mode 100644
index 0000000..1cf98ef
--- /dev/null
+++ b/main/VEX/switchback/switchback.c
@@ -0,0 +1,1169 @@
+
+/* HOW TO USE
+
+13 Dec '05 - Linker no longer used (apart from mymalloc)
+Simply compile and link switchback.c with test_xxx.c,
+e.g. for ppc64:
+$ (cd .. && make EXTRA_CFLAGS="-m64" libvex_ppc64_linux.a) && gcc -m64 -mregnames -Wall -Wshadow -Wno-long-long -Winline -O -g -o switchback switchback.c linker.c ../libvex_ppc64_linux.a test_xxx.c
+
+Test file test_xxx.c must have an entry point called "entry",
+which expects to take a single argument which is a function pointer
+(to "serviceFn").
+
+Test file may not reference any other symbols.
+
+NOTE: POWERPC: it is critical, when using this on ppc, to set
+CacheLineSize to the right value. Values we currently know of:
+
+ imac (G3): 32
+ G5 (ppc970): 128
+*/
+
+#include <stdio.h>
+#include <assert.h>
+#include <stdlib.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <unistd.h>
+
+#include "../pub/libvex_basictypes.h"
+#include "../pub/libvex_guest_x86.h"
+#include "../pub/libvex_guest_amd64.h"
+#include "../pub/libvex_guest_ppc32.h"
+#include "../pub/libvex_guest_ppc64.h"
+#include "../pub/libvex.h"
+#include "../pub/libvex_trc_values.h"
+#include "linker.h"
+
+static ULong n_bbs_done = 0;
+static Int n_translations_made = 0;
+
+
+#if defined(__i386__)
+# define VexGuestState VexGuestX86State
+# define LibVEX_Guest_initialise LibVEX_GuestX86_initialise
+# define VexArch VexArchX86
+# define VexSubArch VexSubArchX86_sse1
+# define GuestPC guest_EIP
+# define CacheLineSize 0/*irrelevant*/
+#elif defined(__x86_64__)
+# define VexGuestState VexGuestAMD64State
+# define LibVEX_Guest_initialise LibVEX_GuestAMD64_initialise
+# define VexArch VexArchAMD64
+# define VexSubArch VexSubArch_NONE
+# define GuestPC guest_RIP
+# define CacheLineSize 0/*irrelevant*/
+#elif defined(__powerpc__)
+
+#if !defined(__powerpc64__) // ppc32
+# define VexGuestState VexGuestPPC32State
+# define LibVEX_Guest_initialise LibVEX_GuestPPC32_initialise
+# define VexArch VexArchPPC32
+# define VexSubArch VexSubArchPPC32_FI
+# define GuestPC guest_CIA
+# define CacheLineSize 128
+#else
+# define VexGuestState VexGuestPPC64State
+# define LibVEX_Guest_initialise LibVEX_GuestPPC64_initialise
+# define VexArch VexArchPPC64
+# define VexSubArch VexSubArchPPC64_FI
+# define GuestPC guest_CIA
+# define CacheLineSize 128
+#endif
+
+#else
+# error "Unknown arch"
+#endif
+
+/* 7: show conversion into IR */
+/* 6: show after initial opt */
+/* 5: show after instrumentation */
+/* 4: show after second opt */
+/* 3: show after tree building */
+/* 2: show selected insns */
+/* 1: show after reg-alloc */
+/* 0: show final assembly */
+#define TEST_FLAGS (1<<7)|(1<<3)|(1<<2)|(1<<1)|(1<<0)
+#define DEBUG_TRACE_FLAGS 0//(1<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0)
+
+
+/* guest state */
+UInt gstack[50000];
+VexGuestState gst;
+VexControl vcon;
+
+/* only used for the switchback transition */
+/* i386: helper1 = &gst, helper2 = %EFLAGS */
+/* amd64: helper1 = &gst, helper2 = %EFLAGS */
+/* ppc32: helper1 = &gst, helper2 = %CR, helper3 = %XER */
+HWord sb_helper1 = 0;
+HWord sb_helper2 = 0;
+HWord sb_helper3 = 0;
+
+/* translation cache */
+#define N_TRANS_CACHE 1000000
+#define N_TRANS_TABLE 10000
+
+ULong trans_cache[N_TRANS_CACHE];
+VexGuestExtents trans_table [N_TRANS_TABLE];
+ULong* trans_tableP[N_TRANS_TABLE];
+
+Int trans_cache_used = 0;
+Int trans_table_used = 0;
+
+static Bool chase_into_ok ( Addr64 dst ) { return False; }
+
+#if 0
+// local_sys_write_stderr(&c,1);
+static void local_sys_write_stderr ( HChar* buf, Int n )
+{
+ UInt __res;
+ __asm__ volatile (
+ "li %%r0,4\n\t" /* set %r0 = __NR_write */
+ "li %%r3,1\n\t" /* set %r3 = stdout */
+ "mr %%r4,%1\n\t" /* set %r4 = buf */
+ "mr %%r5,%2\n\t" /* set %r5 = n */
+ "sc\n\t" /* write(stderr, buf, n) */
+ "mr %0,%%r3\n" /* set __res = r3 */
+ : "=mr" (__res)
+ : "g" (buf), "g" (n)
+ : "r0", "r3", "r4", "r5" );
+}
+#endif
+
+/* For providing services. */
+static HWord serviceFn ( HWord arg1, HWord arg2 )
+{
+ switch (arg1) {
+ case 0: /* EXIT */
+ printf("---STOP---\n");
+ printf("serviceFn:EXIT\n");
+ printf("%llu bbs simulated\n", n_bbs_done);
+ printf("%d translations made, %d tt bytes\n",
+ n_translations_made, 8*trans_cache_used);
+ exit(0);
+ case 1: /* PUTC */
+ putchar(arg2);
+ return 0;
+ case 2: /* MALLOC */
+ return (HWord)malloc(arg2);
+ case 3: /* FREE */
+ free((void*)arg2);
+ return 0;
+ default:
+ assert(0);
+ }
+}
+
+
+/* -------------------- */
+/* continue execution on the real CPU (never returns) */
+extern void switchback_asm(void);
+
+#if defined(__i386__)
+
+asm(
+"switchback_asm:\n"
+" movl sb_helper1, %eax\n" // eax = guest state ptr
+" movl 16(%eax), %esp\n" // switch stacks
+" pushl 56(%eax)\n" // push continuation addr
+" movl sb_helper2, %ebx\n" // get eflags
+" pushl %ebx\n" // eflags:CA
+" pushl 0(%eax)\n" // EAX:eflags:CA
+" movl 4(%eax), %ecx\n"
+" movl 8(%eax), %edx\n"
+" movl 12(%eax), %ebx\n"
+" movl 20(%eax), %ebp\n"
+" movl 24(%eax), %esi\n"
+" movl 28(%eax), %edi\n"
+" popl %eax\n"
+" popfl\n"
+" ret\n"
+);
+void switchback ( void )
+{
+ sb_helper1 = (HWord)&gst;
+ sb_helper2 = LibVEX_GuestX86_get_eflags(&gst);
+ switchback_asm(); // never returns
+}
+
+#elif defined(__x86_64__)
+
+asm(
+"switchback_asm:\n"
+" movq sb_helper1, %rax\n" // rax = guest state ptr
+" movq 32(%rax), %rsp\n" // switch stacks
+" pushq 168(%rax)\n" // push continuation addr
+" movq sb_helper2, %rbx\n" // get eflags
+" pushq %rbx\n" // eflags:CA
+" pushq 0(%rax)\n" // RAX:eflags:CA
+" movq 8(%rax), %rcx\n"
+" movq 16(%rax), %rdx\n"
+" movq 24(%rax), %rbx\n"
+" movq 40(%rax), %rbp\n"
+" movq 48(%rax), %rsi\n"
+" movq 56(%rax), %rdi\n"
+
+" movq 64(%rax), %r8\n"
+" movq 72(%rax), %r9\n"
+" movq 80(%rax), %r10\n"
+" movq 88(%rax), %r11\n"
+" movq 96(%rax), %r12\n"
+" movq 104(%rax), %r13\n"
+" movq 112(%rax), %r14\n"
+" movq 120(%rax), %r15\n"
+
+" popq %rax\n"
+" popfq\n"
+" ret\n"
+);
+void switchback ( void )
+{
+ sb_helper1 = (HWord)&gst;
+ sb_helper2 = LibVEX_GuestAMD64_get_rflags(&gst);
+ switchback_asm(); // never returns
+}
+
+#elif defined(__powerpc__)
+
+static void invalidate_icache(void *ptr, int nbytes)
+{
+ unsigned long startaddr = (unsigned long) ptr;
+ unsigned long endaddr = startaddr + nbytes;
+ unsigned long addr;
+ unsigned long cls = CacheLineSize;
+
+ startaddr &= ~(cls - 1);
+ for (addr = startaddr; addr < endaddr; addr += cls)
+ asm volatile("dcbst 0,%0" : : "r" (addr));
+ asm volatile("sync");
+ for (addr = startaddr; addr < endaddr; addr += cls)
+ asm volatile("icbi 0,%0" : : "r" (addr));
+ asm volatile("sync; isync");
+}
+
+
+#if !defined(__powerpc64__) // ppc32
+asm(
+"switchback_asm:\n"
+// gst
+" lis %r31,sb_helper1@ha\n" // get hi-wd of guest_state_ptr addr
+" lwz %r31,sb_helper1@l(%r31)\n" // load word of guest_state_ptr to r31
+
+// LR
+" lwz %r3,900(%r31)\n" // guest_LR
+" mtlr %r3\n" // move to LR
+
+// CR
+" lis %r3,sb_helper2@ha\n" // get hi-wd of flags addr
+" lwz %r3,sb_helper2@l(%r3)\n" // load flags word to r3
+" mtcr %r3\n" // move r3 to CR
+
+// CTR
+" lwz %r3,904(%r31)\n" // guest_CTR
+" mtctr %r3\n" // move r3 to CTR
+
+// XER
+" lis %r3,sb_helper3@ha\n" // get hi-wd of xer addr
+" lwz %r3,sb_helper3@l(%r3)\n" // load xer word to r3
+" mtxer %r3\n" // move r3 to XER
+
+
+// GPR's
+" lwz %r0, 0(%r31)\n"
+" lwz %r1, 4(%r31)\n" // switch stacks (r1 = SP)
+" lwz %r2, 8(%r31)\n"
+" lwz %r3, 12(%r31)\n"
+" lwz %r4, 16(%r31)\n"
+" lwz %r5, 20(%r31)\n"
+" lwz %r6, 24(%r31)\n"
+" lwz %r7, 28(%r31)\n"
+" lwz %r8, 32(%r31)\n"
+" lwz %r9, 36(%r31)\n"
+" lwz %r10, 40(%r31)\n"
+" lwz %r11, 44(%r31)\n"
+" lwz %r12, 48(%r31)\n"
+" lwz %r13, 52(%r31)\n"
+" lwz %r14, 56(%r31)\n"
+" lwz %r15, 60(%r31)\n"
+" lwz %r16, 64(%r31)\n"
+" lwz %r17, 68(%r31)\n"
+" lwz %r18, 72(%r31)\n"
+" lwz %r19, 76(%r31)\n"
+" lwz %r20, 80(%r31)\n"
+" lwz %r21, 84(%r31)\n"
+" lwz %r22, 88(%r31)\n"
+" lwz %r23, 92(%r31)\n"
+" lwz %r24, 96(%r31)\n"
+" lwz %r25, 100(%r31)\n"
+" lwz %r26, 104(%r31)\n"
+" lwz %r27, 108(%r31)\n"
+" lwz %r28, 112(%r31)\n"
+" lwz %r29, 116(%r31)\n"
+" lwz %r30, 120(%r31)\n"
+" lwz %r31, 124(%r31)\n"
+"nop_start_point:\n"
+" nop\n"
+" nop\n"
+" nop\n"
+" nop\n"
+" nop\n"
+"nop_end_point:\n"
+);
+
+#else // ppc64
+
+asm(
+".text\n"
+" .global switchback_asm\n"
+" .section \".opd\",\"aw\"\n"
+" .align 3\n"
+"switchback_asm:\n"
+" .quad .switchback_asm,.TOC.@tocbase,0\n"
+" .previous\n"
+" .type .switchback_asm,@function\n"
+" .global .switchback_asm\n"
+".switchback_asm:\n"
+"switchback_asm_undotted:\n"
+
+// gst: load word of guest_state_ptr to r31
+" lis %r31,sb_helper1@highest\n"
+" ori %r31,%r31,sb_helper1@higher\n"
+" rldicr %r31,%r31,32,31\n"
+" oris %r31,%r31,sb_helper1@h\n"
+" ori %r31,%r31,sb_helper1@l\n"
+" ld %r31,0(%r31)\n"
+
+
+// LR
+" ld %r3,1032(%r31)\n" // guest_LR
+" mtlr %r3\n" // move to LR
+
+// CR
+" lis %r3,sb_helper2@highest\n"
+" ori %r3,%r3,sb_helper2@higher\n"
+" rldicr %r3,%r3,32,31\n"
+" oris %r3,%r3,sb_helper2@h\n"
+" ori %r3,%r3,sb_helper2@l\n"
+" ld %r3,0(%r3)\n" // load flags word to r3
+" mtcr %r3\n" // move r3 to CR
+
+// CTR
+" ld %r3,1040(%r31)\n" // guest_CTR
+" mtctr %r3\n" // move r3 to CTR
+
+// XER
+" lis %r3,sb_helper3@highest\n"
+" ori %r3,%r3,sb_helper3@higher\n"
+" rldicr %r3,%r3,32,31\n"
+" oris %r3,%r3,sb_helper3@h\n"
+" ori %r3,%r3,sb_helper3@l\n"
+" ld %r3,0(%r3)\n" // load xer word to r3
+" mtxer %r3\n" // move r3 to XER
+
+// GPR's
+" ld %r0, 0(%r31)\n"
+" ld %r1, 8(%r31)\n" // switch stacks (r1 = SP)
+" ld %r2, 16(%r31)\n"
+" ld %r3, 24(%r31)\n"
+" ld %r4, 32(%r31)\n"
+" ld %r5, 40(%r31)\n"
+" ld %r6, 48(%r31)\n"
+" ld %r7, 56(%r31)\n"
+" ld %r8, 64(%r31)\n"
+" ld %r9, 72(%r31)\n"
+" ld %r10, 80(%r31)\n"
+" ld %r11, 88(%r31)\n"
+" ld %r12, 96(%r31)\n"
+" ld %r13, 104(%r31)\n"
+" ld %r14, 112(%r31)\n"
+" ld %r15, 120(%r31)\n"
+" ld %r16, 128(%r31)\n"
+" ld %r17, 136(%r31)\n"
+" ld %r18, 144(%r31)\n"
+" ld %r19, 152(%r31)\n"
+" ld %r20, 160(%r31)\n"
+" ld %r21, 168(%r31)\n"
+" ld %r22, 176(%r31)\n"
+" ld %r23, 184(%r31)\n"
+" ld %r24, 192(%r31)\n"
+" ld %r25, 200(%r31)\n"
+" ld %r26, 208(%r31)\n"
+" ld %r27, 216(%r31)\n"
+" ld %r28, 224(%r31)\n"
+" ld %r29, 232(%r31)\n"
+" ld %r30, 240(%r31)\n"
+" ld %r31, 248(%r31)\n"
+"nop_start_point:\n"
+" nop\n"
+" nop\n"
+" nop\n"
+" nop\n"
+" nop\n"
+"nop_end_point:\n"
+);
+#endif
+
+extern void switchback_asm_undotted;
+extern void nop_start_point;
+extern void nop_end_point;
+void switchback ( void )
+{
+ Int i;
+ /* blargh. Copy the entire switchback_asm procedure into new
+ memory on which can can set both write and execute permissions,
+ so we can poke around with it and then run the results. */
+
+#if defined(__powerpc64__) // ppc32
+ UChar* sa_start = (UChar*)&switchback_asm_undotted;
+#else
+ UChar* sa_start = (UChar*)&switchback_asm;
+#endif
+ UChar* sa_nop_start = (UChar*)&nop_start_point;
+ UChar* sa_end = (UChar*)&nop_end_point;
+
+#if 0
+ printf("sa_start %p\n", sa_start );
+ printf("sa_nop_start %p\n", sa_nop_start);
+ printf("sa_end %p\n", sa_end);
+#endif
+ Int nbytes = sa_end - sa_start;
+ Int off_nopstart = sa_nop_start - sa_start;
+ if (0)
+ printf("nbytes = %d, nopstart = %d\n", nbytes, off_nopstart);
+
+ /* copy it into mallocville */
+ UChar* copy = mymalloc(nbytes);
+ assert(copy);
+ for (i = 0; i < nbytes; i++)
+ copy[i] = sa_start[i];
+
+ UInt* p = (UInt*)(©[off_nopstart]);
+
+#if !defined(__powerpc64__) // ppc32
+ Addr32 addr_of_nop = (Addr32)p;
+ Addr32 where_to_go = gst.guest_CIA;
+ Int diff = ((Int)where_to_go) - ((Int)addr_of_nop);
+
+#if 0
+ printf("addr of first nop = 0x%x\n", addr_of_nop);
+ printf("where to go = 0x%x\n", where_to_go);
+ printf("diff = 0x%x\n", diff);
+#endif
+
+#else // ppc64
+ Addr64 addr_of_nop = (Addr64)p;
+ Addr64 where_to_go = gst.guest_CIA;
+ Long diff = ((Long)where_to_go) - ((Long)addr_of_nop);
+
+#if 0
+ printf("addr of first nop = 0x%llx\n", addr_of_nop);
+ printf("where to go = 0x%llx\n", where_to_go);
+ printf("diff = 0x%llx\n", diff);
+#endif
+#endif
+
+ if (diff < -0x2000000 || diff >= 0x2000000) {
+ // we're hosed. Give up
+ printf("hosed -- offset too large\n");
+ assert(0);
+ }
+
+ sb_helper1 = (HWord)&gst;
+#if !defined(__powerpc64__) // ppc32
+ sb_helper2 = LibVEX_GuestPPC32_get_CR(&gst);
+ sb_helper3 = LibVEX_GuestPPC32_get_XER(&gst);
+#else // ppc64
+ sb_helper2 = LibVEX_GuestPPC64_get_CR(&gst);
+ sb_helper3 = LibVEX_GuestPPC64_get_XER(&gst);
+#endif
+
+ /* stay sane ... */
+ assert(p[0] == 24<<26); /* nop */
+
+ /* branch to diff */
+ p[0] = ((18<<26) | (((diff >> 2) & 0xFFFFFF) << 2) | (0<<1) | (0<<0));
+
+ invalidate_icache( copy, nbytes );
+
+#if defined(__powerpc64__)
+ //printf("jumping to %p\n", copy);
+ { ULong faketoc[3];
+ void* v;
+ faketoc[0] = (ULong)copy;
+ v = &faketoc[0];
+ ( (void(*)(void)) v )();
+ }
+#else
+ ( (void(*)(void))copy )();
+#endif
+}
+
+#else
+# error "Unknown arch (switchback)"
+#endif
+
+/* -------------------- */
+static HWord f, gp, res;
+extern void run_translation_asm(void);
+
+#if defined(__i386__)
+asm(
+"run_translation_asm:\n"
+" pushal\n"
+" movl gp, %ebp\n"
+" movl f, %eax\n"
+" call *%eax\n"
+" movl %eax, res\n"
+" popal\n"
+" ret\n"
+);
+
+#elif defined(__x86_64__)
+asm(
+"run_translation_asm:\n"
+
+" pushq %rax\n"
+" pushq %rbx\n"
+" pushq %rcx\n"
+" pushq %rdx\n"
+" pushq %rbp\n"
+" pushq %rsi\n"
+" pushq %rdi\n"
+" pushq %r8\n"
+" pushq %r9\n"
+" pushq %r10\n"
+" pushq %r11\n"
+" pushq %r12\n"
+" pushq %r13\n"
+" pushq %r14\n"
+" pushq %r15\n"
+
+" movq gp, %rbp\n"
+" movq f, %rax\n"
+" call *%rax\n"
+" movq %rax, res\n"
+
+" popq %r15\n"
+" popq %r14\n"
+" popq %r13\n"
+" popq %r12\n"
+" popq %r11\n"
+" popq %r10\n"
+" popq %r9\n"
+" popq %r8\n"
+" popq %rdi\n"
+" popq %rsi\n"
+" popq %rbp\n"
+" popq %rdx\n"
+" popq %rcx\n"
+" popq %rbx\n"
+" popq %rax\n"
+
+" ret\n"
+);
+
+#elif defined(__powerpc__)
+
+#if !defined(__powerpc64__) // ppc32
+asm(
+"run_translation_asm:\n"
+
+// create new stack:
+// save old sp at first word & update sp
+" stwu 1,-256(1)\n"
+
+// save LR
+" mflr %r0\n"
+" stw %r0,260(%r1)\n"
+
+// leave hole @ 4(%r1) for a callee to save it's LR
+// no params
+// no need to save non-volatile CR fields
+
+// store registers to stack: just the callee-saved regs
+" stw %r13, 8(%r1)\n"
+" stw %r14, 12(%r1)\n"
+" stw %r15, 16(%r1)\n"
+" stw %r16, 20(%r1)\n"
+" stw %r17, 24(%r1)\n"
+" stw %r18, 28(%r1)\n"
+" stw %r19, 32(%r1)\n"
+" stw %r20, 36(%r1)\n"
+" stw %r21, 40(%r1)\n"
+" stw %r22, 44(%r1)\n"
+" stw %r23, 48(%r1)\n"
+" stw %r24, 52(%r1)\n"
+" stw %r25, 56(%r1)\n"
+" stw %r26, 60(%r1)\n"
+" stw %r27, 64(%r1)\n"
+" stw %r28, 68(%r1)\n"
+" stw %r29, 72(%r1)\n"
+" stw %r30, 76(%r1)\n"
+" stw %r31, 80(%r1)\n"
+
+// r31 (guest state ptr) := global var "gp"
+" lis %r31,gp@ha\n"
+" lwz %r31,gp@l(%r31)\n"
+
+// call translation address in global var "f"
+" lis %r4,f@ha\n"
+" lwz %r4,f@l(%r4)\n"
+" mtctr %r4\n"
+" bctrl\n"
+
+// save return value (in r3) into global var "res"
+" lis %r5,res@ha\n"
+" stw %r3,res@l(%r5)\n"
+
+// save possibly modified guest state ptr (r31) in "gp"
+" lis %r5,gp@ha\n"
+" stw %r31,gp@l(%r5)\n"
+
+// reload registers from stack
+" lwz %r13, 8(%r1)\n"
+" lwz %r14, 12(%r1)\n"
+" lwz %r15, 16(%r1)\n"
+" lwz %r16, 20(%r1)\n"
+" lwz %r17, 24(%r1)\n"
+" lwz %r18, 28(%r1)\n"
+" lwz %r19, 32(%r1)\n"
+" lwz %r20, 36(%r1)\n"
+" lwz %r21, 40(%r1)\n"
+" lwz %r22, 44(%r1)\n"
+" lwz %r23, 48(%r1)\n"
+" lwz %r24, 52(%r1)\n"
+" lwz %r25, 56(%r1)\n"
+" lwz %r26, 60(%r1)\n"
+" lwz %r27, 64(%r1)\n"
+" lwz %r28, 68(%r1)\n"
+" lwz %r29, 72(%r1)\n"
+" lwz %r30, 76(%r1)\n"
+" lwz %r31, 80(%r1)\n"
+
+// restore LR
+" lwz %r0,260(%r1)\n"
+" mtlr %r0\n"
+
+// restore previous stack pointer
+" addi %r1,%r1,256\n"
+
+// return
+" blr"
+);
+
+#else // ppc64
+
+asm(
+".text\n"
+" .global run_translation_asm\n"
+" .section \".opd\",\"aw\"\n"
+" .align 3\n"
+"run_translation_asm:\n"
+" .quad .run_translation_asm,.TOC.@tocbase,0\n"
+" .previous\n"
+" .type .run_translation_asm,@function\n"
+" .global .run_translation_asm\n"
+".run_translation_asm:\n"
+
+// save LR,CTR
+" mflr %r0\n"
+" std %r0,16(%r1)\n"
+" mfctr %r0\n"
+" std %r0,8(%r1)\n"
+
+// create new stack:
+// save old sp at first word & update sp
+" stdu 1,-256(1)\n"
+
+// leave hole @ 4(%r1) for a callee to save it's LR
+// no params
+// no need to save non-volatile CR fields
+
+// store registers to stack: just the callee-saved regs
+" std %r13, 48(%r1)\n"
+" std %r14, 56(%r1)\n"
+" std %r15, 64(%r1)\n"
+" std %r16, 72(%r1)\n"
+" std %r17, 80(%r1)\n"
+" std %r18, 88(%r1)\n"
+" std %r19, 96(%r1)\n"
+" std %r20, 104(%r1)\n"
+" std %r21, 112(%r1)\n"
+" std %r22, 120(%r1)\n"
+" std %r23, 128(%r1)\n"
+" std %r24, 136(%r1)\n"
+" std %r25, 144(%r1)\n"
+" std %r26, 152(%r1)\n"
+" std %r27, 160(%r1)\n"
+" std %r28, 168(%r1)\n"
+" std %r29, 176(%r1)\n"
+" std %r30, 184(%r1)\n"
+" std %r31, 192(%r1)\n"
+
+// r31 (guest state ptr) := global var "gp"
+" lis %r31,gp@highest\n"
+" ori %r31,%r31,gp@higher\n"
+" rldicr %r31,%r31,32,31\n"
+" oris %r31,%r31,gp@h\n"
+" ori %r31,%r31,gp@l\n"
+" ld %r31,0(%r31)\n"
+
+// call translation address in global var "f"
+" lis %r4,f@highest\n"
+" ori %r4,%r4,f@higher\n"
+" rldicr %r4,%r4,32,31\n"
+" oris %r4,%r4,f@h\n"
+" ori %r4,%r4,f@l\n"
+" ld %r4,0(%r4)\n"
+" mtctr %r4\n"
+" bctrl\n"
+
+// save return value (in r3) into global var "res"
+" lis %r5,res@highest\n"
+" ori %r5,%r5,res@higher\n"
+" rldicr %r5,%r5,32,31\n"
+" oris %r5,%r5,res@h\n"
+" ori %r5,%r5,res@l\n"
+" std %r3,0(%r5)\n"
+
+// save possibly modified guest state ptr (r31) in "gp"
+" lis %r5,gp@highest\n"
+" ori %r5,%r5,gp@higher\n"
+" rldicr %r5,%r5,32,31\n"
+" oris %r5,%r5,gp@h\n"
+" ori %r5,%r5,gp@l\n"
+" std %r31,0(%r5)\n"
+
+// reload registers from stack
+" ld %r13, 48(%r1)\n"
+" ld %r14, 56(%r1)\n"
+" ld %r15, 64(%r1)\n"
+" ld %r16, 72(%r1)\n"
+" ld %r17, 80(%r1)\n"
+" ld %r18, 88(%r1)\n"
+" ld %r19, 96(%r1)\n"
+" ld %r20, 104(%r1)\n"
+" ld %r21, 112(%r1)\n"
+" ld %r22, 120(%r1)\n"
+" ld %r23, 128(%r1)\n"
+" ld %r24, 136(%r1)\n"
+" ld %r25, 144(%r1)\n"
+" ld %r26, 152(%r1)\n"
+" ld %r27, 160(%r1)\n"
+" ld %r28, 168(%r1)\n"
+" ld %r29, 176(%r1)\n"
+" ld %r30, 184(%r1)\n"
+" ld %r31, 192(%r1)\n"
+
+// restore previous stack pointer
+" addi %r1,%r1,256\n"
+
+// restore LR,CTR
+" ld %r0,16(%r1)\n"
+" mtlr %r0\n"
+" ld %r0,8(%r1)\n"
+" mtctr %r0\n"
+
+// return
+" blr"
+);
+#endif
+
+#else
+
+# error "Unknown arch"
+#endif
+
+/* Run a translation at host address 'translation'. Return
+ True if Vex asked for an translation cache flush as a result.
+*/
+Bool run_translation ( HWord translation )
+{
+ if (0 && DEBUG_TRACE_FLAGS) {
+ printf(" run translation %p\n", (void*)translation );
+ printf(" simulated bb: %llu\n", n_bbs_done);
+ }
+ f = translation;
+ gp = (HWord)&gst;
+ run_translation_asm();
+ gst.GuestPC = res;
+ n_bbs_done ++;
+ return gp==VEX_TRC_JMP_TINVAL;
+}
+
+HWord find_translation ( Addr64 guest_addr )
+{
+ Int i;
+ HWord __res;
+ if (0)
+ printf("find translation %p ... ", ULong_to_Ptr(guest_addr));
+ for (i = 0; i < trans_table_used; i++)
+ if (trans_table[i].base[0] == guest_addr)
+ break;
+ if (i == trans_table_used) {
+ if (0) printf("none\n");
+ return 0; /* not found */
+ }
+
+ /* Move this translation one step towards the front, so finding it
+ next time round is just that little bit cheaper. */
+ if (i > 2) {
+ VexGuestExtents tmpE = trans_table[i-1];
+ ULong* tmpP = trans_tableP[i-1];
+ trans_table[i-1] = trans_table[i];
+ trans_tableP[i-1] = trans_tableP[i];
+ trans_table[i] = tmpE;
+ trans_tableP[i] = tmpP;
+ i--;
+ }
+
+ __res = (HWord)trans_tableP[i];
+ if (0) printf("%p\n", (void*)__res);
+ return __res;
+}
+
+#define N_TRANSBUF 5000
+static UChar transbuf[N_TRANSBUF];
+void make_translation ( Addr64 guest_addr, Bool verbose )
+{
+ VexTranslateArgs vta;
+ VexTranslateResult tres;
+ VexArchInfo vex_archinfo;
+ Int trans_used, i, ws_needed;
+
+ if (trans_table_used >= N_TRANS_TABLE
+ || trans_cache_used >= N_TRANS_CACHE-1000) {
+ /* If things are looking to full, just dump
+ all the translations. */
+ trans_cache_used = 0;
+ trans_table_used = 0;
+ }
+
+ assert(trans_table_used < N_TRANS_TABLE);
+ if (0)
+ printf("make translation %p\n", ULong_to_Ptr(guest_addr));
+
+ LibVEX_default_VexArchInfo(&vex_archinfo);
+ vex_archinfo.subarch = VexSubArch;
+ vex_archinfo.ppc_cache_line_szB = CacheLineSize;
+
+ /* */
+ vta.arch_guest = VexArch;
+ vta.archinfo_guest = vex_archinfo;
+ vta.arch_host = VexArch;
+ vta.archinfo_host = vex_archinfo;
+ vta.guest_bytes = (UChar*)ULong_to_Ptr(guest_addr);
+ vta.guest_bytes_addr = (Addr64)guest_addr;
+ vta.guest_bytes_addr_noredir = (Addr64)guest_addr;
+ vta.chase_into_ok = chase_into_ok;
+// vta.guest_extents = &vge;
+ vta.guest_extents = &trans_table[trans_table_used];
+ vta.host_bytes = transbuf;
+ vta.host_bytes_size = N_TRANSBUF;
+ vta.host_bytes_used = &trans_used;
+ vta.instrument1 = NULL;
+ vta.instrument2 = NULL;
+ vta.do_self_check = False;
+ vta.traceflags = verbose ? TEST_FLAGS : DEBUG_TRACE_FLAGS;
+ vta.dispatch = NULL;
+
+ tres = LibVEX_Translate ( &vta );
+
+ assert(tres == VexTransOK);
+ ws_needed = (trans_used+7) / 8;
+ assert(ws_needed > 0);
+ assert(trans_cache_used + ws_needed < N_TRANS_CACHE);
+ n_translations_made++;
+
+ for (i = 0; i < trans_used; i++) {
+ HChar* dst = ((HChar*)(&trans_cache[trans_cache_used])) + i;
+ HChar* src = (HChar*)(&transbuf[i]);
+ *dst = *src;
+ }
+
+#if defined(__powerpc__)
+ invalidate_icache( &trans_cache[trans_cache_used], trans_used );
+#endif
+
+ trans_tableP[trans_table_used] = &trans_cache[trans_cache_used];
+ trans_table_used++;
+ trans_cache_used += ws_needed;
+}
+
+
+static Bool overlap ( Addr64 start, UInt len, VexGuestExtents* vge )
+{
+ Int i;
+ for (i = 0; i < vge->n_used; i++) {
+ if (vge->base[i]+vge->len[i] <= start
+ || vge->base[i] >= start+len) {
+ /* ok */
+ } else {
+ return True;
+ }
+ }
+ return False; /* no overlap */
+}
+
+static void dump_translations ( Addr64 start, UInt len )
+{
+ Int i, j;
+ j = 0;
+ for (i = 0; i < trans_table_used; i++) {
+ if (overlap(start, len, &trans_table[i])) {
+ /* do nothing */
+ } else {
+ assert(j <= i);
+ trans_table[j] = trans_table[i];
+ trans_tableP[j] = trans_tableP[i];
+ j++;
+ }
+ }
+ assert(j >= 0 && j <= trans_table_used);
+ if (0) printf("dumped %d translations\n", trans_table_used - j);
+ trans_table_used = j;
+}
+
+
+static ULong stopAfter = 0;
+static UChar* entryP = NULL;
+
+
+__attribute__ ((noreturn))
+static
+void failure_exit ( void )
+{
+ fprintf(stdout, "VEX did failure_exit. Bye.\n");
+ fprintf(stdout, "bb counter = %llu\n\n", n_bbs_done);
+ exit(1);
+}
+
+static
+void log_bytes ( HChar* bytes, Int nbytes )
+{
+ fwrite ( bytes, 1, nbytes, stdout );
+ fflush ( stdout );
+}
+
+
+/* run simulated code forever (it will exit by calling
+ serviceFn(0)). */
+static void run_simulator ( void )
+{
+ static Addr64 last_guest = 0;
+ Addr64 next_guest;
+ HWord next_host;
+ Bool need_inval;
+ while (1) {
+ next_guest = gst.GuestPC;
+
+ if (0)
+ printf("\nnext_guest: 0x%x\n", (UInt)next_guest);
+
+#if defined(__powerpc64__)
+ if (next_guest == Ptr_to_ULong( (void*)(*(ULong*)(&serviceFn)) )) {
+#else
+ if (next_guest == Ptr_to_ULong(&serviceFn)) {
+#endif
+ /* "do" the function call to serviceFn */
+# if defined(__i386__)
+ {
+ HWord esp = gst.guest_ESP;
+ gst.guest_EIP = *(UInt*)(esp+0);
+ gst.guest_EAX = serviceFn( *(UInt*)(esp+4), *(UInt*)(esp+8) );
+ gst.guest_ESP = esp+4;
+ next_guest = gst.guest_EIP;
+ }
+# elif defined(__x86_64__)
+ {
+ HWord esp = gst.guest_RSP;
+ gst.guest_RIP = *(UInt*)(esp+0);
+ gst.guest_RAX = serviceFn( gst.guest_RDI, gst.guest_RSI );
+ gst.guest_RSP = esp+8;
+ next_guest = gst.guest_RIP;
+ }
+# elif defined(__powerpc__)
+ {
+ gst.guest_GPR3 = serviceFn( gst.guest_GPR3, gst.guest_GPR4 );
+ gst.guest_CIA = gst.guest_LR;
+ next_guest = gst.guest_CIA;
+ }
+# else
+# error "Unknown arch"
+# endif
+ }
+
+ next_host = find_translation(next_guest);
+ if (next_host == 0) {
+ make_translation(next_guest,False);
+ next_host = find_translation(next_guest);
+ assert(next_host != 0);
+ }
+
+ // Switchback
+ if (n_bbs_done == stopAfter) {
+ printf("---begin SWITCHBACK at bb:%llu---\n", n_bbs_done);
+#if 1
+ if (last_guest) {
+ printf("\n*** Last run translation (bb:%llu):\n", n_bbs_done-1);
+ make_translation(last_guest,True);
+ }
+#endif
+#if 0
+ if (next_guest) {
+ printf("\n*** Current translation (bb:%llu):\n", n_bbs_done);
+ make_translation(next_guest,True);
+ }
+#endif
+ printf("--- end SWITCHBACK at bb:%llu ---\n", n_bbs_done);
+ switchback();
+ assert(0); /*NOTREACHED*/
+ }
+
+ last_guest = next_guest;
+ need_inval = run_translation(next_host);
+ if (need_inval) {
+#if defined(__powerpc__)
+ dump_translations( (Addr64)gst.guest_TISTART, gst.guest_TILEN );
+ if (0) printf("dump translations done\n");
+#endif
+ }
+ }
+}
+
+
+static void usage ( void )
+{
+ printf("usage: switchback #bbs\n");
+ printf(" - begins switchback for basic block #bbs\n");
+ printf(" - use -1 for largest possible run without switchback\n\n");
+ exit(1);
+}
+
+#if defined(__powerpc__)
+
+#if !defined(__powerpc64__) // ppc32
+UInt saved_R2;
+asm(
+"get_R2:\n"
+" lis %r10,saved_R2@ha\n"
+" stw %r2,saved_R2@l(%r10)\n"
+" blr\n"
+);
+#else // ppc64
+ULong saved_R2;
+ULong saved_R13;
+asm(
+".text\n"
+" .global get_R2\n"
+" .section \".opd\",\"aw\"\n"
+" .align 3\n"
+"get_R2:\n"
+" .quad .get_R2,.TOC.@tocbase,0\n"
+" .previous\n"
+" .type .get_R2,@function\n"
+" .global .get_R2\n"
+".get_R2:\n"
+" lis %r10,saved_R2@highest\n"
+" ori %r10,%r10,saved_R2@higher\n"
+" rldicr %r10,%r10,32,31\n"
+" oris %r10,%r10,saved_R2@h\n"
+" ori %r10,%r10,saved_R2@l\n"
+" std %r2,0(%r10)\n"
+" blr\n"
+);
+asm(
+".text\n"
+" .global get_R13\n"
+" .section \".opd\",\"aw\"\n"
+" .align 3\n"
+"get_R13:\n"
+" .quad .get_R13,.TOC.@tocbase,0\n"
+" .previous\n"
+" .type .get_R13,@function\n"
+" .global .get_R13\n"
+".get_R13:\n"
+" lis %r10,saved_R13@highest\n"
+" ori %r10,%r10,saved_R13@higher\n"
+" rldicr %r10,%r10,32,31\n"
+" oris %r10,%r10,saved_R13@h\n"
+" ori %r10,%r10,saved_R13@l\n"
+" std %r13,0(%r10)\n"
+" blr\n"
+);
+#endif
+extern void get_R2 ( void );
+extern void get_R13 ( void );
+#endif
+
+int main ( Int argc, HChar** argv )
+{
+ if (argc != 2)
+ usage();
+
+ stopAfter = (ULong)atoll(argv[1]);
+
+ extern void entry ( void*(*service)(int,int) );
+ entryP = (UChar*)&entry;
+
+ if (!entryP) {
+ printf("switchback: can't find entry point\n");
+ exit(1);
+ }
+
+ LibVEX_default_VexControl(&vcon);
+ vcon.guest_max_insns=50;
+ vcon.guest_chase_thresh=0;
+ vcon.iropt_level=2;
+
+ LibVEX_Init( failure_exit, log_bytes, 1, False, &vcon );
+ LibVEX_Guest_initialise(&gst);
+
+ /* set up as if a call to the entry point passing serviceFn as
+ the one and only parameter */
+# if defined(__i386__)
+ gst.guest_EIP = (UInt)entryP;
+ gst.guest_ESP = (UInt)&gstack[25000];
+ *(UInt*)(gst.guest_ESP+4) = (UInt)serviceFn;
+ *(UInt*)(gst.guest_ESP+0) = 0x12345678;
+# elif defined(__x86_64__)
+ gst.guest_RIP = (ULong)entryP;
+ gst.guest_RSP = (ULong)&gstack[25000];
+ gst.guest_RDI = (ULong)serviceFn;
+ *(ULong*)(gst.guest_RSP+0) = 0x12345678AABBCCDDULL;
+# elif defined(__powerpc__)
+ get_R2();
+
+#if !defined(__powerpc64__) // ppc32
+ gst.guest_CIA = (UInt)entryP;
+ gst.guest_GPR1 = (UInt)&gstack[25000]; /* stack pointer */
+ gst.guest_GPR3 = (UInt)serviceFn; /* param to entry */
+ gst.guest_GPR2 = saved_R2;
+ gst.guest_LR = 0x12345678; /* bogus return address */
+#else // ppc64
+ get_R13();
+ gst.guest_CIA = * (ULong*)entryP;
+ gst.guest_GPR1 = (ULong)&gstack[25000]; /* stack pointer */
+ gst.guest_GPR3 = (ULong)serviceFn; /* param to entry */
+ gst.guest_GPR2 = saved_R2;
+ gst.guest_GPR13 = saved_R13;
+ gst.guest_LR = 0x1234567812345678ULL; /* bogus return address */
+// printf("setting CIA to %p\n", (void*)gst.guest_CIA);
+#endif
+
+# else
+# error "Unknown arch"
+# endif
+
+ printf("\n---START---\n");
+
+#if 1
+ run_simulator();
+#else
+ ( (void(*)(HWord(*)(HWord,HWord))) entryP ) (serviceFn);
+#endif
+
+
+ return 0;
+}
diff --git a/main/VEX/switchback/test_bzip2.c b/main/VEX/switchback/test_bzip2.c
new file mode 100644
index 0000000..7d0af5a
--- /dev/null
+++ b/main/VEX/switchback/test_bzip2.c
@@ -0,0 +1,6117 @@
+
+#define BZ_NO_STDIO
+
+
+/*-------------------------------------------------------------*/
+/*--- Private header file for the library. ---*/
+/*--- bzlib_private.h ---*/
+/*-------------------------------------------------------------*/
+
+/*--
+ This file is a part of bzip2 and/or libbzip2, a program and
+ library for lossless, block-sorting data compression.
+
+ Copyright (C) 1996-2004 Julian R Seward. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ 1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+
+ 2. The origin of this software must not be misrepresented; you must
+ not claim that you wrote the original software. If you use this
+ software in a product, an acknowledgment in the product
+ documentation would be appreciated but is not required.
+
+ 3. Altered source versions must be plainly marked as such, and must
+ not be misrepresented as being the original software.
+
+ 4. The name of the author may not be used to endorse or promote
+ products derived from this software without specific prior written
+ permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+ Julian Seward, Cambridge, UK.
+ jseward@bzip.org
+ bzip2/libbzip2 version 1.0 of 21 March 2000
+
+ This program is based on (at least) the work of:
+ Mike Burrows
+ David Wheeler
+ Peter Fenwick
+ Alistair Moffat
+ Radford Neal
+ Ian H. Witten
+ Robert Sedgewick
+ Jon L. Bentley
+
+ For more information on these sources, see the manual.
+--*/
+
+
+#ifndef _BZLIB_PRIVATE_H
+#define _BZLIB_PRIVATE_H
+
+#include <stdlib.h>
+
+#ifndef BZ_NO_STDIO
+#include <stdio.h>
+#include <ctype.h>
+#include <string.h>
+#endif
+
+
+/*-------------------------------------------------------------*/
+/*--- Public header file for the library. ---*/
+/*--- bzlib.h ---*/
+/*-------------------------------------------------------------*/
+
+/*--
+ This file is a part of bzip2 and/or libbzip2, a program and
+ library for lossless, block-sorting data compression.
+
+ Copyright (C) 1996-2004 Julian R Seward. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ 1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+
+ 2. The origin of this software must not be misrepresented; you must
+ not claim that you wrote the original software. If you use this
+ software in a product, an acknowledgment in the product
+ documentation would be appreciated but is not required.
+
+ 3. Altered source versions must be plainly marked as such, and must
+ not be misrepresented as being the original software.
+
+ 4. The name of the author may not be used to endorse or promote
+ products derived from this software without specific prior written
+ permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+ Julian Seward, Cambridge, UK.
+ jseward@bzip.org
+ bzip2/libbzip2 version 1.0 of 21 March 2000
+
+ This program is based on (at least) the work of:
+ Mike Burrows
+ David Wheeler
+ Peter Fenwick
+ Alistair Moffat
+ Radford Neal
+ Ian H. Witten
+ Robert Sedgewick
+ Jon L. Bentley
+
+ For more information on these sources, see the manual.
+--*/
+
+
+#ifndef _BZLIB_H
+#define _BZLIB_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BZ_RUN 0
+#define BZ_FLUSH 1
+#define BZ_FINISH 2
+
+#define BZ_OK 0
+#define BZ_RUN_OK 1
+#define BZ_FLUSH_OK 2
+#define BZ_FINISH_OK 3
+#define BZ_STREAM_END 4
+#define BZ_SEQUENCE_ERROR (-1)
+#define BZ_PARAM_ERROR (-2)
+#define BZ_MEM_ERROR (-3)
+#define BZ_DATA_ERROR (-4)
+#define BZ_DATA_ERROR_MAGIC (-5)
+#define BZ_IO_ERROR (-6)
+#define BZ_UNEXPECTED_EOF (-7)
+#define BZ_OUTBUFF_FULL (-8)
+#define BZ_CONFIG_ERROR (-9)
+
+typedef
+ struct {
+ char *next_in;
+ unsigned int avail_in;
+ unsigned int total_in_lo32;
+ unsigned int total_in_hi32;
+
+ char *next_out;
+ unsigned int avail_out;
+ unsigned int total_out_lo32;
+ unsigned int total_out_hi32;
+
+ void *state;
+
+ void *(*bzalloc)(void *,int,int);
+ void (*bzfree)(void *,void *);
+ void *opaque;
+ }
+ bz_stream;
+
+
+#ifndef BZ_IMPORT
+#define BZ_EXPORT
+#endif
+
+#ifndef BZ_NO_STDIO
+/* Need a definitition for FILE */
+#include <stdio.h>
+#endif
+
+#ifdef _WIN32
+# include <windows.h>
+# ifdef small
+ /* windows.h define small to char */
+# undef small
+# endif
+# ifdef BZ_EXPORT
+# define BZ_API(func) WINAPI func
+# define BZ_EXTERN extern
+# else
+ /* import windows dll dynamically */
+# define BZ_API(func) (WINAPI * func)
+# define BZ_EXTERN
+# endif
+#else
+# define BZ_API(func) func
+# define BZ_EXTERN extern
+#endif
+
+
+/*-- Core (low-level) library functions --*/
+
+BZ_EXTERN int BZ_API(BZ2_bzCompressInit) (
+ bz_stream* strm,
+ int blockSize100k,
+ int verbosity,
+ int workFactor
+ );
+
+BZ_EXTERN int BZ_API(BZ2_bzCompress) (
+ bz_stream* strm,
+ int action
+ );
+
+BZ_EXTERN int BZ_API(BZ2_bzCompressEnd) (
+ bz_stream* strm
+ );
+
+BZ_EXTERN int BZ_API(BZ2_bzDecompressInit) (
+ bz_stream *strm,
+ int verbosity,
+ int small
+ );
+
+BZ_EXTERN int BZ_API(BZ2_bzDecompress) (
+ bz_stream* strm
+ );
+
+BZ_EXTERN int BZ_API(BZ2_bzDecompressEnd) (
+ bz_stream *strm
+ );
+
+
+
+/*-- High(er) level library functions --*/
+
+#ifndef BZ_NO_STDIO
+#define BZ_MAX_UNUSED 5000
+
+typedef void BZFILE;
+
+BZ_EXTERN BZFILE* BZ_API(BZ2_bzReadOpen) (
+ int* bzerror,
+ FILE* f,
+ int verbosity,
+ int small,
+ void* unused,
+ int nUnused
+ );
+
+BZ_EXTERN void BZ_API(BZ2_bzReadClose) (
+ int* bzerror,
+ BZFILE* b
+ );
+
+BZ_EXTERN void BZ_API(BZ2_bzReadGetUnused) (
+ int* bzerror,
+ BZFILE* b,
+ void** unused,
+ int* nUnused
+ );
+
+BZ_EXTERN int BZ_API(BZ2_bzRead) (
+ int* bzerror,
+ BZFILE* b,
+ void* buf,
+ int len
+ );
+
+BZ_EXTERN BZFILE* BZ_API(BZ2_bzWriteOpen) (
+ int* bzerror,
+ FILE* f,
+ int blockSize100k,
+ int verbosity,
+ int workFactor
+ );
+
+BZ_EXTERN void BZ_API(BZ2_bzWrite) (
+ int* bzerror,
+ BZFILE* b,
+ void* buf,
+ int len
+ );
+
+BZ_EXTERN void BZ_API(BZ2_bzWriteClose) (
+ int* bzerror,
+ BZFILE* b,
+ int abandon,
+ unsigned int* nbytes_in,
+ unsigned int* nbytes_out
+ );
+
+BZ_EXTERN void BZ_API(BZ2_bzWriteClose64) (
+ int* bzerror,
+ BZFILE* b,
+ int abandon,
+ unsigned int* nbytes_in_lo32,
+ unsigned int* nbytes_in_hi32,
+ unsigned int* nbytes_out_lo32,
+ unsigned int* nbytes_out_hi32
+ );
+#endif
+
+
+/*-- Utility functions --*/
+
+BZ_EXTERN int BZ_API(BZ2_bzBuffToBuffCompress) (
+ char* dest,
+ unsigned int* destLen,
+ char* source,
+ unsigned int sourceLen,
+ int blockSize100k,
+ int verbosity,
+ int workFactor
+ );
+
+BZ_EXTERN int BZ_API(BZ2_bzBuffToBuffDecompress) (
+ char* dest,
+ unsigned int* destLen,
+ char* source,
+ unsigned int sourceLen,
+ int small,
+ int verbosity
+ );
+
+
+/*--
+ Code contributed by Yoshioka Tsuneo
+ (QWF00133@niftyserve.or.jp/tsuneo-y@is.aist-nara.ac.jp),
+ to support better zlib compatibility.
+ This code is not _officially_ part of libbzip2 (yet);
+ I haven't tested it, documented it, or considered the
+ threading-safeness of it.
+ If this code breaks, please contact both Yoshioka and me.
+--*/
+
+BZ_EXTERN const char * BZ_API(BZ2_bzlibVersion) (
+ void
+ );
+
+#ifndef BZ_NO_STDIO
+BZ_EXTERN BZFILE * BZ_API(BZ2_bzopen) (
+ const char *path,
+ const char *mode
+ );
+
+BZ_EXTERN BZFILE * BZ_API(BZ2_bzdopen) (
+ int fd,
+ const char *mode
+ );
+
+BZ_EXTERN int BZ_API(BZ2_bzread) (
+ BZFILE* b,
+ void* buf,
+ int len
+ );
+
+BZ_EXTERN int BZ_API(BZ2_bzwrite) (
+ BZFILE* b,
+ void* buf,
+ int len
+ );
+
+BZ_EXTERN int BZ_API(BZ2_bzflush) (
+ BZFILE* b
+ );
+
+BZ_EXTERN void BZ_API(BZ2_bzclose) (
+ BZFILE* b
+ );
+
+BZ_EXTERN const char * BZ_API(BZ2_bzerror) (
+ BZFILE *b,
+ int *errnum
+ );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/*-------------------------------------------------------------*/
+/*--- end bzlib.h ---*/
+/*-------------------------------------------------------------*/
+
+
+
+
+/*-- General stuff. --*/
+
+#define BZ_VERSION "1.0.3, 17-Oct-2004"
+
+typedef char Char;
+typedef unsigned char Bool;
+typedef unsigned char UChar;
+typedef int Int32;
+typedef unsigned int UInt32;
+typedef short Int16;
+typedef unsigned short UInt16;
+
+#define True ((Bool)1)
+#define False ((Bool)0)
+
+#ifndef __GNUC__
+#define __inline__ /* */
+#endif
+
+#ifndef BZ_NO_STDIO
+extern void BZ2_bz__AssertH__fail ( int errcode );
+#define AssertH(cond,errcode) \
+ { if (!(cond)) BZ2_bz__AssertH__fail ( errcode ); }
+#if BZ_DEBUG
+#define AssertD(cond,msg) \
+ { if (!(cond)) { \
+ fprintf ( stderr, \
+ "\n\nlibbzip2(debug build): internal error\n\t%s\n", msg );\
+ exit(1); \
+ }}
+#else
+#define AssertD(cond,msg) /* */
+#endif
+#define VPrintf0(zf) \
+ fprintf(stderr,zf)
+#define VPrintf1(zf,za1) \
+ fprintf(stderr,zf,za1)
+#define VPrintf2(zf,za1,za2) \
+ fprintf(stderr,zf,za1,za2)
+#define VPrintf3(zf,za1,za2,za3) \
+ fprintf(stderr,zf,za1,za2,za3)
+#define VPrintf4(zf,za1,za2,za3,za4) \
+ fprintf(stderr,zf,za1,za2,za3,za4)
+#define VPrintf5(zf,za1,za2,za3,za4,za5) \
+ fprintf(stderr,zf,za1,za2,za3,za4,za5)
+#else
+extern void bz_internal_error ( int errcode );
+#define AssertH(cond,errcode) \
+ { if (!(cond)) bz_internal_error ( errcode ); }
+#define AssertD(cond,msg) /* */
+#define VPrintf0(zf) \
+ vexxx_printf(zf)
+#define VPrintf1(zf,za1) \
+ vexxx_printf(zf,za1)
+#define VPrintf2(zf,za1,za2) \
+ vexxx_printf(zf,za1,za2)
+#define VPrintf3(zf,za1,za2,za3) \
+ vexxx_printf(zf,za1,za2,za3)
+#define VPrintf4(zf,za1,za2,za3,za4) \
+ vexxx_printf(zf,za1,za2,za3,za4)
+#define VPrintf5(zf,za1,za2,za3,za4,za5) \
+ vexxx_printf(zf,za1,za2,za3,za4,za5)
+#endif
+
+
+#define BZALLOC(nnn) (strm->bzalloc)(strm->opaque,(nnn),1)
+#define BZFREE(ppp) (strm->bzfree)(strm->opaque,(ppp))
+
+
+/*-- Header bytes. --*/
+
+#define BZ_HDR_B 0x42 /* 'B' */
+#define BZ_HDR_Z 0x5a /* 'Z' */
+#define BZ_HDR_h 0x68 /* 'h' */
+#define BZ_HDR_0 0x30 /* '0' */
+
+/*-- Constants for the back end. --*/
+
+#define BZ_MAX_ALPHA_SIZE 258
+#define BZ_MAX_CODE_LEN 23
+
+#define BZ_RUNA 0
+#define BZ_RUNB 1
+
+#define BZ_N_GROUPS 6
+#define BZ_G_SIZE 50
+#define BZ_N_ITERS 4
+
+#define BZ_MAX_SELECTORS (2 + (900000 / BZ_G_SIZE))
+
+
+
+/*-- Stuff for randomising repetitive blocks. --*/
+
+extern Int32 BZ2_rNums[512];
+
+#define BZ_RAND_DECLS \
+ Int32 rNToGo; \
+ Int32 rTPos \
+
+#define BZ_RAND_INIT_MASK \
+ s->rNToGo = 0; \
+ s->rTPos = 0 \
+
+#define BZ_RAND_MASK ((s->rNToGo == 1) ? 1 : 0)
+
+#define BZ_RAND_UPD_MASK \
+ if (s->rNToGo == 0) { \
+ s->rNToGo = BZ2_rNums[s->rTPos]; \
+ s->rTPos++; \
+ if (s->rTPos == 512) s->rTPos = 0; \
+ } \
+ s->rNToGo--;
+
+
+
+/*-- Stuff for doing CRCs. --*/
+
+extern UInt32 BZ2_crc32Table[256];
+
+#define BZ_INITIALISE_CRC(crcVar) \
+{ \
+ crcVar = 0xffffffffL; \
+}
+
+#define BZ_FINALISE_CRC(crcVar) \
+{ \
+ crcVar = ~(crcVar); \
+}
+
+#define BZ_UPDATE_CRC(crcVar,cha) \
+{ \
+ crcVar = (crcVar << 8) ^ \
+ BZ2_crc32Table[(crcVar >> 24) ^ \
+ ((UChar)cha)]; \
+}
+
+
+
+/*-- States and modes for compression. --*/
+
+#define BZ_M_IDLE 1
+#define BZ_M_RUNNING 2
+#define BZ_M_FLUSHING 3
+#define BZ_M_FINISHING 4
+
+#define BZ_S_OUTPUT 1
+#define BZ_S_INPUT 2
+
+#define BZ_N_RADIX 2
+#define BZ_N_QSORT 12
+#define BZ_N_SHELL 18
+#define BZ_N_OVERSHOOT (BZ_N_RADIX + BZ_N_QSORT + BZ_N_SHELL + 2)
+
+
+
+
+/*-- Structure holding all the compression-side stuff. --*/
+
+typedef
+ struct {
+ /* pointer back to the struct bz_stream */
+ bz_stream* strm;
+
+ /* mode this stream is in, and whether inputting */
+ /* or outputting data */
+ Int32 mode;
+ Int32 state;
+
+ /* remembers avail_in when flush/finish requested */
+ UInt32 avail_in_expect;
+
+ /* for doing the block sorting */
+ UInt32* arr1;
+ UInt32* arr2;
+ UInt32* ftab;
+ Int32 origPtr;
+
+ /* aliases for arr1 and arr2 */
+ UInt32* ptr;
+ UChar* block;
+ UInt16* mtfv;
+ UChar* zbits;
+
+ /* for deciding when to use the fallback sorting algorithm */
+ Int32 workFactor;
+
+ /* run-length-encoding of the input */
+ UInt32 state_in_ch;
+ Int32 state_in_len;
+ BZ_RAND_DECLS;
+
+ /* input and output limits and current posns */
+ Int32 nblock;
+ Int32 nblockMAX;
+ Int32 numZ;
+ Int32 state_out_pos;
+
+ /* map of bytes used in block */
+ Int32 nInUse;
+ Bool inUse[256];
+ UChar unseqToSeq[256];
+
+ /* the buffer for bit stream creation */
+ UInt32 bsBuff;
+ Int32 bsLive;
+
+ /* block and combined CRCs */
+ UInt32 blockCRC;
+ UInt32 combinedCRC;
+
+ /* misc administratium */
+ Int32 verbosity;
+ Int32 blockNo;
+ Int32 blockSize100k;
+
+ /* stuff for coding the MTF values */
+ Int32 nMTF;
+ Int32 mtfFreq [BZ_MAX_ALPHA_SIZE];
+ UChar selector [BZ_MAX_SELECTORS];
+ UChar selectorMtf[BZ_MAX_SELECTORS];
+
+ UChar len [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];
+ Int32 code [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];
+ Int32 rfreq [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];
+ /* second dimension: only 3 needed; 4 makes index calculations faster */
+ UInt32 len_pack[BZ_MAX_ALPHA_SIZE][4];
+
+ }
+ EState;
+
+
+
+/*-- externs for compression. --*/
+
+extern void
+BZ2_blockSort ( EState* );
+
+extern void
+BZ2_compressBlock ( EState*, Bool );
+
+extern void
+BZ2_bsInitWrite ( EState* );
+
+extern void
+BZ2_hbAssignCodes ( Int32*, UChar*, Int32, Int32, Int32 );
+
+extern void
+BZ2_hbMakeCodeLengths ( UChar*, Int32*, Int32, Int32 );
+
+
+
+/*-- states for decompression. --*/
+
+#define BZ_X_IDLE 1
+#define BZ_X_OUTPUT 2
+
+#define BZ_X_MAGIC_1 10
+#define BZ_X_MAGIC_2 11
+#define BZ_X_MAGIC_3 12
+#define BZ_X_MAGIC_4 13
+#define BZ_X_BLKHDR_1 14
+#define BZ_X_BLKHDR_2 15
+#define BZ_X_BLKHDR_3 16
+#define BZ_X_BLKHDR_4 17
+#define BZ_X_BLKHDR_5 18
+#define BZ_X_BLKHDR_6 19
+#define BZ_X_BCRC_1 20
+#define BZ_X_BCRC_2 21
+#define BZ_X_BCRC_3 22
+#define BZ_X_BCRC_4 23
+#define BZ_X_RANDBIT 24
+#define BZ_X_ORIGPTR_1 25
+#define BZ_X_ORIGPTR_2 26
+#define BZ_X_ORIGPTR_3 27
+#define BZ_X_MAPPING_1 28
+#define BZ_X_MAPPING_2 29
+#define BZ_X_SELECTOR_1 30
+#define BZ_X_SELECTOR_2 31
+#define BZ_X_SELECTOR_3 32
+#define BZ_X_CODING_1 33
+#define BZ_X_CODING_2 34
+#define BZ_X_CODING_3 35
+#define BZ_X_MTF_1 36
+#define BZ_X_MTF_2 37
+#define BZ_X_MTF_3 38
+#define BZ_X_MTF_4 39
+#define BZ_X_MTF_5 40
+#define BZ_X_MTF_6 41
+#define BZ_X_ENDHDR_2 42
+#define BZ_X_ENDHDR_3 43
+#define BZ_X_ENDHDR_4 44
+#define BZ_X_ENDHDR_5 45
+#define BZ_X_ENDHDR_6 46
+#define BZ_X_CCRC_1 47
+#define BZ_X_CCRC_2 48
+#define BZ_X_CCRC_3 49
+#define BZ_X_CCRC_4 50
+
+
+
+/*-- Constants for the fast MTF decoder. --*/
+
+#define MTFA_SIZE 4096
+#define MTFL_SIZE 16
+
+
+
+/*-- Structure holding all the decompression-side stuff. --*/
+
+typedef
+ struct {
+ /* pointer back to the struct bz_stream */
+ bz_stream* strm;
+
+ /* state indicator for this stream */
+ Int32 state;
+
+ /* for doing the final run-length decoding */
+ UChar state_out_ch;
+ Int32 state_out_len;
+ Bool blockRandomised;
+ BZ_RAND_DECLS;
+
+ /* the buffer for bit stream reading */
+ UInt32 bsBuff;
+ Int32 bsLive;
+
+ /* misc administratium */
+ Int32 blockSize100k;
+ Bool smallDecompress;
+ Int32 currBlockNo;
+ Int32 verbosity;
+
+ /* for undoing the Burrows-Wheeler transform */
+ Int32 origPtr;
+ UInt32 tPos;
+ Int32 k0;
+ Int32 unzftab[256];
+ Int32 nblock_used;
+ Int32 cftab[257];
+ Int32 cftabCopy[257];
+
+ /* for undoing the Burrows-Wheeler transform (FAST) */
+ UInt32 *tt;
+
+ /* for undoing the Burrows-Wheeler transform (SMALL) */
+ UInt16 *ll16;
+ UChar *ll4;
+
+ /* stored and calculated CRCs */
+ UInt32 storedBlockCRC;
+ UInt32 storedCombinedCRC;
+ UInt32 calculatedBlockCRC;
+ UInt32 calculatedCombinedCRC;
+
+ /* map of bytes used in block */
+ Int32 nInUse;
+ Bool inUse[256];
+ Bool inUse16[16];
+ UChar seqToUnseq[256];
+
+ /* for decoding the MTF values */
+ UChar mtfa [MTFA_SIZE];
+ Int32 mtfbase[256 / MTFL_SIZE];
+ UChar selector [BZ_MAX_SELECTORS];
+ UChar selectorMtf[BZ_MAX_SELECTORS];
+ UChar len [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];
+
+ Int32 limit [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];
+ Int32 base [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];
+ Int32 perm [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];
+ Int32 minLens[BZ_N_GROUPS];
+
+ /* save area for scalars in the main decompress code */
+ Int32 save_i;
+ Int32 save_j;
+ Int32 save_t;
+ Int32 save_alphaSize;
+ Int32 save_nGroups;
+ Int32 save_nSelectors;
+ Int32 save_EOB;
+ Int32 save_groupNo;
+ Int32 save_groupPos;
+ Int32 save_nextSym;
+ Int32 save_nblockMAX;
+ Int32 save_nblock;
+ Int32 save_es;
+ Int32 save_N;
+ Int32 save_curr;
+ Int32 save_zt;
+ Int32 save_zn;
+ Int32 save_zvec;
+ Int32 save_zj;
+ Int32 save_gSel;
+ Int32 save_gMinlen;
+ Int32* save_gLimit;
+ Int32* save_gBase;
+ Int32* save_gPerm;
+
+ }
+ DState;
+
+
+
+/*-- Macros for decompression. --*/
+
+#define BZ_GET_FAST(cccc) \
+ s->tPos = s->tt[s->tPos]; \
+ cccc = (UChar)(s->tPos & 0xff); \
+ s->tPos >>= 8;
+
+#define BZ_GET_FAST_C(cccc) \
+ c_tPos = c_tt[c_tPos]; \
+ cccc = (UChar)(c_tPos & 0xff); \
+ c_tPos >>= 8;
+
+#define SET_LL4(i,n) \
+ { if (((i) & 0x1) == 0) \
+ s->ll4[(i) >> 1] = (s->ll4[(i) >> 1] & 0xf0) | (n); else \
+ s->ll4[(i) >> 1] = (s->ll4[(i) >> 1] & 0x0f) | ((n) << 4); \
+ }
+
+#define GET_LL4(i) \
+ ((((UInt32)(s->ll4[(i) >> 1])) >> (((i) << 2) & 0x4)) & 0xF)
+
+#define SET_LL(i,n) \
+ { s->ll16[i] = (UInt16)(n & 0x0000ffff); \
+ SET_LL4(i, n >> 16); \
+ }
+
+#define GET_LL(i) \
+ (((UInt32)s->ll16[i]) | (GET_LL4(i) << 16))
+
+#define BZ_GET_SMALL(cccc) \
+ cccc = BZ2_indexIntoF ( s->tPos, s->cftab ); \
+ s->tPos = GET_LL(s->tPos);
+
+
+/*-- externs for decompression. --*/
+
+extern Int32
+BZ2_indexIntoF ( Int32, Int32* );
+
+extern Int32
+BZ2_decompress ( DState* );
+
+extern void
+BZ2_hbCreateDecodeTables ( Int32*, Int32*, Int32*, UChar*,
+ Int32, Int32, Int32 );
+
+
+#endif
+
+
+/*-- BZ_NO_STDIO seems to make NULL disappear on some platforms. --*/
+
+#ifdef BZ_NO_STDIO
+#ifndef NULL
+#define NULL 0
+#endif
+#endif
+
+
+/*-------------------------------------------------------------*/
+/*--- end bzlib_private.h ---*/
+/*-------------------------------------------------------------*/
+
+
+/* Something which has the same size as void* on the host. That is,
+ it is 32 bits on a 32-bit host and 64 bits on a 64-bit host, and so
+ it can safely be coerced to and from a pointer type on the host
+ machine. */
+typedef unsigned long HWord;
+typedef char HChar;
+typedef signed int Int;
+typedef unsigned int UInt;
+
+typedef signed long long int Long;
+typedef unsigned long long int ULong;
+
+
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+
+//#include "/home/sewardj/VEX/trunk/pub/libvex_basictypes.h"
+
+static HWord (*serviceFn)(HWord,HWord) = 0;
+
+
+static char* my_strcpy ( char* dest, const char* src )
+{
+ char* dest_orig = dest;
+ while (*src) *dest++ = *src++;
+ *dest = 0;
+ return dest_orig;
+}
+
+static void* my_memcpy ( void *dest, const void *src, int sz )
+{
+ const char *s = (const char *)src;
+ char *d = (char *)dest;
+
+ while (sz--)
+ *d++ = *s++;
+
+ return dest;
+}
+
+static void* my_memmove( void *dst, const void *src, unsigned int len )
+{
+ register char *d;
+ register char *s;
+ if ( dst > src ) {
+ d = (char *)dst + len - 1;
+ s = (char *)src + len - 1;
+ while ( len >= 4 ) {
+ *d-- = *s--;
+ *d-- = *s--;
+ *d-- = *s--;
+ *d-- = *s--;
+ len -= 4;
+ }
+ while ( len-- ) {
+ *d-- = *s--;
+ }
+ } else if ( dst < src ) {
+ d = (char *)dst;
+ s = (char *)src;
+ while ( len >= 4 ) {
+ *d++ = *s++;
+ *d++ = *s++;
+ *d++ = *s++;
+ *d++ = *s++;
+ len -= 4;
+ }
+ while ( len-- ) {
+ *d++ = *s++;
+ }
+ }
+ return dst;
+}
+
+char* my_strcat ( char* dest, const char* src )
+{
+ char* dest_orig = dest;
+ while (*dest) dest++;
+ while (*src) *dest++ = *src++;
+ *dest = 0;
+ return dest_orig;
+}
+
+
+/////////////////////////////////////////////////////////////////////
+
+static void vexxx_log_bytes ( char* p, int n )
+{
+ int i;
+ for (i = 0; i < n; i++)
+ (*serviceFn)( 1, (int)p[i] );
+}
+
+/*---------------------------------------------------------*/
+/*--- vexxx_printf ---*/
+/*---------------------------------------------------------*/
+
+/* This should be the only <...> include in the entire VEX library.
+ New code for vexxx_util.c should go above this point. */
+#include <stdarg.h>
+
+static HChar vexxx_toupper ( HChar c )
+{
+ if (c >= 'a' && c <= 'z')
+ return c + ('A' - 'a');
+ else
+ return c;
+}
+
+static Int vexxx_strlen ( const HChar* str )
+{
+ Int i = 0;
+ while (str[i] != 0) i++;
+ return i;
+}
+
+Bool vexxx_streq ( const HChar* s1, const HChar* s2 )
+{
+ while (True) {
+ if (*s1 == 0 && *s2 == 0)
+ return True;
+ if (*s1 != *s2)
+ return False;
+ s1++;
+ s2++;
+ }
+}
+
+/* Some flags. */
+#define VG_MSG_SIGNED 1 /* The value is signed. */
+#define VG_MSG_ZJUSTIFY 2 /* Must justify with '0'. */
+#define VG_MSG_LJUSTIFY 4 /* Must justify on the left. */
+#define VG_MSG_PAREN 8 /* Parenthesize if present (for %y) */
+#define VG_MSG_COMMA 16 /* Add commas to numbers (for %d, %u) */
+
+/* Copy a string into the buffer. */
+static UInt
+myvprintf_str ( void(*send)(HChar), Int flags, Int width, HChar* str,
+ Bool capitalise )
+{
+# define MAYBE_TOUPPER(ch) (capitalise ? vexxx_toupper(ch) : (ch))
+ UInt ret = 0;
+ Int i, extra;
+ Int len = vexxx_strlen(str);
+
+ if (width == 0) {
+ ret += len;
+ for (i = 0; i < len; i++)
+ send(MAYBE_TOUPPER(str[i]));
+ return ret;
+ }
+
+ if (len > width) {
+ ret += width;
+ for (i = 0; i < width; i++)
+ send(MAYBE_TOUPPER(str[i]));
+ return ret;
+ }
+
+ extra = width - len;
+ if (flags & VG_MSG_LJUSTIFY) {
+ ret += extra;
+ for (i = 0; i < extra; i++)
+ send(' ');
+ }
+ ret += len;
+ for (i = 0; i < len; i++)
+ send(MAYBE_TOUPPER(str[i]));
+ if (!(flags & VG_MSG_LJUSTIFY)) {
+ ret += extra;
+ for (i = 0; i < extra; i++)
+ send(' ');
+ }
+
+# undef MAYBE_TOUPPER
+
+ return ret;
+}
+
+/* Write P into the buffer according to these args:
+ * If SIGN is true, p is a signed.
+ * BASE is the base.
+ * If WITH_ZERO is true, '0' must be added.
+ * WIDTH is the width of the field.
+ */
+static UInt
+myvprintf_int64 ( void(*send)(HChar), Int flags, Int base, Int width, ULong pL)
+{
+ HChar buf[40];
+ Int ind = 0;
+ Int i, nc = 0;
+ Bool neg = False;
+ HChar *digits = "0123456789ABCDEF";
+ UInt ret = 0;
+ UInt p = (UInt)pL;
+
+ if (base < 2 || base > 16)
+ return ret;
+
+ if ((flags & VG_MSG_SIGNED) && (Int)p < 0) {
+ p = - (Int)p;
+ neg = True;
+ }
+
+ if (p == 0)
+ buf[ind++] = '0';
+ else {
+ while (p > 0) {
+ if ((flags & VG_MSG_COMMA) && 10 == base &&
+ 0 == (ind-nc) % 3 && 0 != ind)
+ {
+ buf[ind++] = ',';
+ nc++;
+ }
+ buf[ind++] = digits[p % base];
+ p /= base;
+ }
+ }
+
+ if (neg)
+ buf[ind++] = '-';
+
+ if (width > 0 && !(flags & VG_MSG_LJUSTIFY)) {
+ for(; ind < width; ind++) {
+ //vassert(ind < 39);
+ buf[ind] = ((flags & VG_MSG_ZJUSTIFY) ? '0': ' ');
+ }
+ }
+
+ /* Reverse copy to buffer. */
+ ret += ind;
+ for (i = ind -1; i >= 0; i--) {
+ send(buf[i]);
+ }
+ if (width > 0 && (flags & VG_MSG_LJUSTIFY)) {
+ for(; ind < width; ind++) {
+ ret++;
+ send(' '); // Never pad with zeroes on RHS -- changes the value!
+ }
+ }
+ return ret;
+}
+
+
+/* A simple vprintf(). */
+static
+UInt vprintf_wrk ( void(*send)(HChar), const HChar *format, va_list vargs )
+{
+ UInt ret = 0;
+ int i;
+ int flags;
+ int width;
+ Bool is_long;
+
+ /* We assume that vargs has already been initialised by the
+ caller, using va_start, and that the caller will similarly
+ clean up with va_end.
+ */
+
+ for (i = 0; format[i] != 0; i++) {
+ if (format[i] != '%') {
+ send(format[i]);
+ ret++;
+ continue;
+ }
+ i++;
+ /* A '%' has been found. Ignore a trailing %. */
+ if (format[i] == 0)
+ break;
+ if (format[i] == '%') {
+ /* `%%' is replaced by `%'. */
+ send('%');
+ ret++;
+ continue;
+ }
+ flags = 0;
+ is_long = False;
+ width = 0; /* length of the field. */
+ if (format[i] == '(') {
+ flags |= VG_MSG_PAREN;
+ i++;
+ }
+ /* If ',' follows '%', commas will be inserted. */
+ if (format[i] == ',') {
+ flags |= VG_MSG_COMMA;
+ i++;
+ }
+ /* If '-' follows '%', justify on the left. */
+ if (format[i] == '-') {
+ flags |= VG_MSG_LJUSTIFY;
+ i++;
+ }
+ /* If '0' follows '%', pads will be inserted. */
+ if (format[i] == '0') {
+ flags |= VG_MSG_ZJUSTIFY;
+ i++;
+ }
+ /* Compute the field length. */
+ while (format[i] >= '0' && format[i] <= '9') {
+ width *= 10;
+ width += format[i++] - '0';
+ }
+ while (format[i] == 'l') {
+ i++;
+ is_long = True;
+ }
+
+ switch (format[i]) {
+ case 'd': /* %d */
+ flags |= VG_MSG_SIGNED;
+ if (is_long)
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, Long)));
+ else
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, Int)));
+ break;
+ case 'u': /* %u */
+ if (is_long)
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, ULong)));
+ else
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, UInt)));
+ break;
+ case 'p': /* %p */
+ ret += 2;
+ send('0');
+ send('x');
+ ret += myvprintf_int64(send, flags, 16, width,
+ (ULong)((HWord)va_arg (vargs, void *)));
+ break;
+ case 'x': /* %x */
+ if (is_long)
+ ret += myvprintf_int64(send, flags, 16, width,
+ (ULong)(va_arg (vargs, ULong)));
+ else
+ ret += myvprintf_int64(send, flags, 16, width,
+ (ULong)(va_arg (vargs, UInt)));
+ break;
+ case 'c': /* %c */
+ ret++;
+ send((va_arg (vargs, int)));
+ break;
+ case 's': case 'S': { /* %s */
+ char *str = va_arg (vargs, char *);
+ if (str == (char*) 0) str = "(null)";
+ ret += myvprintf_str(send, flags, width, str,
+ (format[i]=='S'));
+ break;
+ }
+# if 0
+ case 'y': { /* %y - print symbol */
+ Char buf[100];
+ Char *cp = buf;
+ Addr a = va_arg(vargs, Addr);
+
+ if (flags & VG_MSG_PAREN)
+ *cp++ = '(';
+ if (VG_(get_fnname_w_offset)(a, cp, sizeof(buf)-4)) {
+ if (flags & VG_MSG_PAREN) {
+ cp += VG_(strlen)(cp);
+ *cp++ = ')';
+ *cp = '\0';
+ }
+ ret += myvprintf_str(send, flags, width, buf, 0);
+ }
+ break;
+ }
+# endif
+ default:
+ break;
+ }
+ }
+ return ret;
+}
+
+
+/* A general replacement for printf(). Note that only low-level
+ debugging info should be sent via here. The official route is to
+ to use vg_message(). This interface is deprecated.
+*/
+static HChar myprintf_buf[1000];
+static Int n_myprintf_buf;
+
+static void add_to_myprintf_buf ( HChar c )
+{
+ if (c == '\n' || n_myprintf_buf >= 1000-10 /*paranoia*/ ) {
+ (*vexxx_log_bytes)( myprintf_buf, vexxx_strlen(myprintf_buf) );
+ n_myprintf_buf = 0;
+ myprintf_buf[n_myprintf_buf] = 0;
+ }
+ myprintf_buf[n_myprintf_buf++] = c;
+ myprintf_buf[n_myprintf_buf] = 0;
+}
+
+static UInt vexxx_printf ( const char *format, ... )
+{
+ UInt ret;
+ va_list vargs;
+ va_start(vargs,format);
+
+ n_myprintf_buf = 0;
+ myprintf_buf[n_myprintf_buf] = 0;
+ ret = vprintf_wrk ( add_to_myprintf_buf, format, vargs );
+
+ if (n_myprintf_buf > 0) {
+ (*vexxx_log_bytes)( myprintf_buf, n_myprintf_buf );
+ }
+
+ va_end(vargs);
+
+ return ret;
+}
+
+/*---------------------------------------------------------------*/
+/*--- end vexxx_util.c ---*/
+/*---------------------------------------------------------------*/
+
+
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+
+
+/*-------------------------------------------------------------*/
+/*--- Decompression machinery ---*/
+/*--- decompress.c ---*/
+/*-------------------------------------------------------------*/
+
+/*--
+ This file is a part of bzip2 and/or libbzip2, a program and
+ library for lossless, block-sorting data compression.
+
+ Copyright (C) 1996-2004 Julian R Seward. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ 1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+
+ 2. The origin of this software must not be misrepresented; you must
+ not claim that you wrote the original software. If you use this
+ software in a product, an acknowledgment in the product
+ documentation would be appreciated but is not required.
+
+ 3. Altered source versions must be plainly marked as such, and must
+ not be misrepresented as being the original software.
+
+ 4. The name of the author may not be used to endorse or promote
+ products derived from this software without specific prior written
+ permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+ Julian Seward, Cambridge, UK.
+ jseward@bzip.org
+ bzip2/libbzip2 version 1.0 of 21 March 2000
+
+ This program is based on (at least) the work of:
+ Mike Burrows
+ David Wheeler
+ Peter Fenwick
+ Alistair Moffat
+ Radford Neal
+ Ian H. Witten
+ Robert Sedgewick
+ Jon L. Bentley
+
+ For more information on these sources, see the manual.
+--*/
+
+
+
+
+/*---------------------------------------------------*/
+static
+void makeMaps_d ( DState* s )
+{
+ Int32 i;
+ s->nInUse = 0;
+ for (i = 0; i < 256; i++)
+ if (s->inUse[i]) {
+ s->seqToUnseq[s->nInUse] = i;
+ s->nInUse++;
+ }
+}
+
+
+/*---------------------------------------------------*/
+#define RETURN(rrr) \
+ { retVal = rrr; goto save_state_and_return; };
+
+#define GET_BITS(lll,vvv,nnn) \
+ case lll: s->state = lll; \
+ while (True) { \
+ if (s->bsLive >= nnn) { \
+ UInt32 v; \
+ v = (s->bsBuff >> \
+ (s->bsLive-nnn)) & ((1 << nnn)-1); \
+ s->bsLive -= nnn; \
+ vvv = v; \
+ break; \
+ } \
+ if (s->strm->avail_in == 0) RETURN(BZ_OK); \
+ s->bsBuff \
+ = (s->bsBuff << 8) | \
+ ((UInt32) \
+ (*((UChar*)(s->strm->next_in)))); \
+ s->bsLive += 8; \
+ s->strm->next_in++; \
+ s->strm->avail_in--; \
+ s->strm->total_in_lo32++; \
+ if (s->strm->total_in_lo32 == 0) \
+ s->strm->total_in_hi32++; \
+ }
+
+#define GET_UCHAR(lll,uuu) \
+ GET_BITS(lll,uuu,8)
+
+#define GET_BIT(lll,uuu) \
+ GET_BITS(lll,uuu,1)
+
+/*---------------------------------------------------*/
+#define GET_MTF_VAL(label1,label2,lval) \
+{ \
+ if (groupPos == 0) { \
+ groupNo++; \
+ if (groupNo >= nSelectors) \
+ RETURN(BZ_DATA_ERROR); \
+ groupPos = BZ_G_SIZE; \
+ gSel = s->selector[groupNo]; \
+ gMinlen = s->minLens[gSel]; \
+ gLimit = &(s->limit[gSel][0]); \
+ gPerm = &(s->perm[gSel][0]); \
+ gBase = &(s->base[gSel][0]); \
+ } \
+ groupPos--; \
+ zn = gMinlen; \
+ GET_BITS(label1, zvec, zn); \
+ while (1) { \
+ if (zn > 20 /* the longest code */) \
+ RETURN(BZ_DATA_ERROR); \
+ if (zvec <= gLimit[zn]) break; \
+ zn++; \
+ GET_BIT(label2, zj); \
+ zvec = (zvec << 1) | zj; \
+ }; \
+ if (zvec - gBase[zn] < 0 \
+ || zvec - gBase[zn] >= BZ_MAX_ALPHA_SIZE) \
+ RETURN(BZ_DATA_ERROR); \
+ lval = gPerm[zvec - gBase[zn]]; \
+}
+
+
+
+/*---------------------------------------------------*/
+__inline__ Int32 BZ2_indexIntoF ( Int32 indx, Int32 *cftab )
+{
+ Int32 nb, na, mid;
+ nb = 0;
+ na = 256;
+ do {
+ mid = (nb + na) >> 1;
+ if (indx >= cftab[mid]) nb = mid; else na = mid;
+ }
+ while (na - nb != 1);
+ return nb;
+}
+
+/*---------------------------------------------------*/
+Int32 BZ2_decompress ( DState* s )
+{
+ UChar uc;
+ Int32 retVal;
+ Int32 minLen, maxLen;
+ bz_stream* strm = s->strm;
+
+ /* stuff that needs to be saved/restored */
+ Int32 i;
+ Int32 j;
+ Int32 t;
+ Int32 alphaSize;
+ Int32 nGroups;
+ Int32 nSelectors;
+ Int32 EOB;
+ Int32 groupNo;
+ Int32 groupPos;
+ Int32 nextSym;
+ Int32 nblockMAX;
+ Int32 nblock;
+ Int32 es;
+ Int32 N;
+ Int32 curr;
+ Int32 zt;
+ Int32 zn;
+ Int32 zvec;
+ Int32 zj;
+ Int32 gSel;
+ Int32 gMinlen;
+ Int32* gLimit;
+ Int32* gBase;
+ Int32* gPerm;
+
+ if (s->state == BZ_X_MAGIC_1) {
+ /*initialise the save area*/
+ s->save_i = 0;
+ s->save_j = 0;
+ s->save_t = 0;
+ s->save_alphaSize = 0;
+ s->save_nGroups = 0;
+ s->save_nSelectors = 0;
+ s->save_EOB = 0;
+ s->save_groupNo = 0;
+ s->save_groupPos = 0;
+ s->save_nextSym = 0;
+ s->save_nblockMAX = 0;
+ s->save_nblock = 0;
+ s->save_es = 0;
+ s->save_N = 0;
+ s->save_curr = 0;
+ s->save_zt = 0;
+ s->save_zn = 0;
+ s->save_zvec = 0;
+ s->save_zj = 0;
+ s->save_gSel = 0;
+ s->save_gMinlen = 0;
+ s->save_gLimit = NULL;
+ s->save_gBase = NULL;
+ s->save_gPerm = NULL;
+ }
+
+ /*restore from the save area*/
+ i = s->save_i;
+ j = s->save_j;
+ t = s->save_t;
+ alphaSize = s->save_alphaSize;
+ nGroups = s->save_nGroups;
+ nSelectors = s->save_nSelectors;
+ EOB = s->save_EOB;
+ groupNo = s->save_groupNo;
+ groupPos = s->save_groupPos;
+ nextSym = s->save_nextSym;
+ nblockMAX = s->save_nblockMAX;
+ nblock = s->save_nblock;
+ es = s->save_es;
+ N = s->save_N;
+ curr = s->save_curr;
+ zt = s->save_zt;
+ zn = s->save_zn;
+ zvec = s->save_zvec;
+ zj = s->save_zj;
+ gSel = s->save_gSel;
+ gMinlen = s->save_gMinlen;
+ gLimit = s->save_gLimit;
+ gBase = s->save_gBase;
+ gPerm = s->save_gPerm;
+
+ retVal = BZ_OK;
+
+ switch (s->state) {
+
+ GET_UCHAR(BZ_X_MAGIC_1, uc);
+ if (uc != BZ_HDR_B) RETURN(BZ_DATA_ERROR_MAGIC);
+
+ GET_UCHAR(BZ_X_MAGIC_2, uc);
+ if (uc != BZ_HDR_Z) RETURN(BZ_DATA_ERROR_MAGIC);
+
+ GET_UCHAR(BZ_X_MAGIC_3, uc)
+ if (uc != BZ_HDR_h) RETURN(BZ_DATA_ERROR_MAGIC);
+
+ GET_BITS(BZ_X_MAGIC_4, s->blockSize100k, 8)
+ if (s->blockSize100k < (BZ_HDR_0 + 1) ||
+ s->blockSize100k > (BZ_HDR_0 + 9)) RETURN(BZ_DATA_ERROR_MAGIC);
+ s->blockSize100k -= BZ_HDR_0;
+
+ if (s->smallDecompress) {
+ s->ll16 = BZALLOC( s->blockSize100k * 100000 * sizeof(UInt16) );
+ s->ll4 = BZALLOC(
+ ((1 + s->blockSize100k * 100000) >> 1) * sizeof(UChar)
+ );
+ if (s->ll16 == NULL || s->ll4 == NULL) RETURN(BZ_MEM_ERROR);
+ } else {
+ s->tt = BZALLOC( s->blockSize100k * 100000 * sizeof(Int32) );
+ if (s->tt == NULL) RETURN(BZ_MEM_ERROR);
+ }
+
+ GET_UCHAR(BZ_X_BLKHDR_1, uc);
+
+ if (uc == 0x17) goto endhdr_2;
+ if (uc != 0x31) RETURN(BZ_DATA_ERROR);
+ GET_UCHAR(BZ_X_BLKHDR_2, uc);
+ if (uc != 0x41) RETURN(BZ_DATA_ERROR);
+ GET_UCHAR(BZ_X_BLKHDR_3, uc);
+ if (uc != 0x59) RETURN(BZ_DATA_ERROR);
+ GET_UCHAR(BZ_X_BLKHDR_4, uc);
+ if (uc != 0x26) RETURN(BZ_DATA_ERROR);
+ GET_UCHAR(BZ_X_BLKHDR_5, uc);
+ if (uc != 0x53) RETURN(BZ_DATA_ERROR);
+ GET_UCHAR(BZ_X_BLKHDR_6, uc);
+ if (uc != 0x59) RETURN(BZ_DATA_ERROR);
+
+ s->currBlockNo++;
+ if (s->verbosity >= 2)
+ VPrintf1 ( "\n [%d: huff+mtf ", s->currBlockNo );
+
+ s->storedBlockCRC = 0;
+ GET_UCHAR(BZ_X_BCRC_1, uc);
+ s->storedBlockCRC = (s->storedBlockCRC << 8) | ((UInt32)uc);
+ GET_UCHAR(BZ_X_BCRC_2, uc);
+ s->storedBlockCRC = (s->storedBlockCRC << 8) | ((UInt32)uc);
+ GET_UCHAR(BZ_X_BCRC_3, uc);
+ s->storedBlockCRC = (s->storedBlockCRC << 8) | ((UInt32)uc);
+ GET_UCHAR(BZ_X_BCRC_4, uc);
+ s->storedBlockCRC = (s->storedBlockCRC << 8) | ((UInt32)uc);
+
+ GET_BITS(BZ_X_RANDBIT, s->blockRandomised, 1);
+
+ s->origPtr = 0;
+ GET_UCHAR(BZ_X_ORIGPTR_1, uc);
+ s->origPtr = (s->origPtr << 8) | ((Int32)uc);
+ GET_UCHAR(BZ_X_ORIGPTR_2, uc);
+ s->origPtr = (s->origPtr << 8) | ((Int32)uc);
+ GET_UCHAR(BZ_X_ORIGPTR_3, uc);
+ s->origPtr = (s->origPtr << 8) | ((Int32)uc);
+
+ if (s->origPtr < 0)
+ RETURN(BZ_DATA_ERROR);
+ if (s->origPtr > 10 + 100000*s->blockSize100k)
+ RETURN(BZ_DATA_ERROR);
+
+ /*--- Receive the mapping table ---*/
+ for (i = 0; i < 16; i++) {
+ GET_BIT(BZ_X_MAPPING_1, uc);
+ if (uc == 1)
+ s->inUse16[i] = True; else
+ s->inUse16[i] = False;
+ }
+
+ for (i = 0; i < 256; i++) s->inUse[i] = False;
+
+ for (i = 0; i < 16; i++)
+ if (s->inUse16[i])
+ for (j = 0; j < 16; j++) {
+ GET_BIT(BZ_X_MAPPING_2, uc);
+ if (uc == 1) s->inUse[i * 16 + j] = True;
+ }
+ makeMaps_d ( s );
+ if (s->nInUse == 0) RETURN(BZ_DATA_ERROR);
+ alphaSize = s->nInUse+2;
+
+ /*--- Now the selectors ---*/
+ GET_BITS(BZ_X_SELECTOR_1, nGroups, 3);
+ if (nGroups < 2 || nGroups > 6) RETURN(BZ_DATA_ERROR);
+ GET_BITS(BZ_X_SELECTOR_2, nSelectors, 15);
+ if (nSelectors < 1) RETURN(BZ_DATA_ERROR);
+ for (i = 0; i < nSelectors; i++) {
+ j = 0;
+ while (True) {
+ GET_BIT(BZ_X_SELECTOR_3, uc);
+ if (uc == 0) break;
+ j++;
+ if (j >= nGroups) RETURN(BZ_DATA_ERROR);
+ }
+ s->selectorMtf[i] = j;
+ }
+
+ /*--- Undo the MTF values for the selectors. ---*/
+ {
+ UChar pos[BZ_N_GROUPS], tmp, v;
+ for (v = 0; v < nGroups; v++) pos[v] = v;
+
+ for (i = 0; i < nSelectors; i++) {
+ v = s->selectorMtf[i];
+ tmp = pos[v];
+ while (v > 0) { pos[v] = pos[v-1]; v--; }
+ pos[0] = tmp;
+ s->selector[i] = tmp;
+ }
+ }
+
+ /*--- Now the coding tables ---*/
+ for (t = 0; t < nGroups; t++) {
+ GET_BITS(BZ_X_CODING_1, curr, 5);
+ for (i = 0; i < alphaSize; i++) {
+ while (True) {
+ if (curr < 1 || curr > 20) RETURN(BZ_DATA_ERROR);
+ GET_BIT(BZ_X_CODING_2, uc);
+ if (uc == 0) break;
+ GET_BIT(BZ_X_CODING_3, uc);
+ if (uc == 0) curr++; else curr--;
+ }
+ s->len[t][i] = curr;
+ }
+ }
+
+ /*--- Create the Huffman decoding tables ---*/
+ for (t = 0; t < nGroups; t++) {
+ minLen = 32;
+ maxLen = 0;
+ for (i = 0; i < alphaSize; i++) {
+ if (s->len[t][i] > maxLen) maxLen = s->len[t][i];
+ if (s->len[t][i] < minLen) minLen = s->len[t][i];
+ }
+ BZ2_hbCreateDecodeTables (
+ &(s->limit[t][0]),
+ &(s->base[t][0]),
+ &(s->perm[t][0]),
+ &(s->len[t][0]),
+ minLen, maxLen, alphaSize
+ );
+ s->minLens[t] = minLen;
+ }
+
+ /*--- Now the MTF values ---*/
+
+ EOB = s->nInUse+1;
+ nblockMAX = 100000 * s->blockSize100k;
+ groupNo = -1;
+ groupPos = 0;
+
+ for (i = 0; i <= 255; i++) s->unzftab[i] = 0;
+
+ /*-- MTF init --*/
+ {
+ Int32 ii, jj, kk;
+ kk = MTFA_SIZE-1;
+ for (ii = 256 / MTFL_SIZE - 1; ii >= 0; ii--) {
+ for (jj = MTFL_SIZE-1; jj >= 0; jj--) {
+ s->mtfa[kk] = (UChar)(ii * MTFL_SIZE + jj);
+ kk--;
+ }
+ s->mtfbase[ii] = kk + 1;
+ }
+ }
+ /*-- end MTF init --*/
+
+ nblock = 0;
+ GET_MTF_VAL(BZ_X_MTF_1, BZ_X_MTF_2, nextSym);
+
+ while (True) {
+
+ if (nextSym == EOB) break;
+
+ if (nextSym == BZ_RUNA || nextSym == BZ_RUNB) {
+
+ es = -1;
+ N = 1;
+ do {
+ if (nextSym == BZ_RUNA) es = es + (0+1) * N; else
+ if (nextSym == BZ_RUNB) es = es + (1+1) * N;
+ N = N * 2;
+ GET_MTF_VAL(BZ_X_MTF_3, BZ_X_MTF_4, nextSym);
+ }
+ while (nextSym == BZ_RUNA || nextSym == BZ_RUNB);
+
+ es++;
+ uc = s->seqToUnseq[ s->mtfa[s->mtfbase[0]] ];
+ s->unzftab[uc] += es;
+
+ if (s->smallDecompress)
+ while (es > 0) {
+ if (nblock >= nblockMAX) RETURN(BZ_DATA_ERROR);
+ s->ll16[nblock] = (UInt16)uc;
+ nblock++;
+ es--;
+ }
+ else
+ while (es > 0) {
+ if (nblock >= nblockMAX) RETURN(BZ_DATA_ERROR);
+ s->tt[nblock] = (UInt32)uc;
+ nblock++;
+ es--;
+ };
+
+ continue;
+
+ } else {
+
+ if (nblock >= nblockMAX) RETURN(BZ_DATA_ERROR);
+
+ /*-- uc = MTF ( nextSym-1 ) --*/
+ {
+ Int32 ii, jj, kk, pp, lno, off;
+ UInt32 nn;
+ nn = (UInt32)(nextSym - 1);
+
+ if (nn < MTFL_SIZE) {
+ /* avoid general-case expense */
+ pp = s->mtfbase[0];
+ uc = s->mtfa[pp+nn];
+ while (nn > 3) {
+ Int32 z = pp+nn;
+ s->mtfa[(z) ] = s->mtfa[(z)-1];
+ s->mtfa[(z)-1] = s->mtfa[(z)-2];
+ s->mtfa[(z)-2] = s->mtfa[(z)-3];
+ s->mtfa[(z)-3] = s->mtfa[(z)-4];
+ nn -= 4;
+ }
+ while (nn > 0) {
+ s->mtfa[(pp+nn)] = s->mtfa[(pp+nn)-1]; nn--;
+ };
+ s->mtfa[pp] = uc;
+ } else {
+ /* general case */
+ lno = nn / MTFL_SIZE;
+ off = nn % MTFL_SIZE;
+ pp = s->mtfbase[lno] + off;
+ uc = s->mtfa[pp];
+ while (pp > s->mtfbase[lno]) {
+ s->mtfa[pp] = s->mtfa[pp-1]; pp--;
+ };
+ s->mtfbase[lno]++;
+ while (lno > 0) {
+ s->mtfbase[lno]--;
+ s->mtfa[s->mtfbase[lno]]
+ = s->mtfa[s->mtfbase[lno-1] + MTFL_SIZE - 1];
+ lno--;
+ }
+ s->mtfbase[0]--;
+ s->mtfa[s->mtfbase[0]] = uc;
+ if (s->mtfbase[0] == 0) {
+ kk = MTFA_SIZE-1;
+ for (ii = 256 / MTFL_SIZE-1; ii >= 0; ii--) {
+ for (jj = MTFL_SIZE-1; jj >= 0; jj--) {
+ s->mtfa[kk] = s->mtfa[s->mtfbase[ii] + jj];
+ kk--;
+ }
+ s->mtfbase[ii] = kk + 1;
+ }
+ }
+ }
+ }
+ /*-- end uc = MTF ( nextSym-1 ) --*/
+
+ s->unzftab[s->seqToUnseq[uc]]++;
+ if (s->smallDecompress)
+ s->ll16[nblock] = (UInt16)(s->seqToUnseq[uc]); else
+ s->tt[nblock] = (UInt32)(s->seqToUnseq[uc]);
+ nblock++;
+
+ GET_MTF_VAL(BZ_X_MTF_5, BZ_X_MTF_6, nextSym);
+ continue;
+ }
+ }
+
+ /* Now we know what nblock is, we can do a better sanity
+ check on s->origPtr.
+ */
+ if (s->origPtr < 0 || s->origPtr >= nblock)
+ RETURN(BZ_DATA_ERROR);
+
+ /*-- Set up cftab to facilitate generation of T^(-1) --*/
+ s->cftab[0] = 0;
+ for (i = 1; i <= 256; i++) s->cftab[i] = s->unzftab[i-1];
+ for (i = 1; i <= 256; i++) s->cftab[i] += s->cftab[i-1];
+ for (i = 0; i <= 256; i++) {
+ if (s->cftab[i] < 0 || s->cftab[i] > nblock) {
+ /* s->cftab[i] can legitimately be == nblock */
+ RETURN(BZ_DATA_ERROR);
+ }
+ }
+
+ s->state_out_len = 0;
+ s->state_out_ch = 0;
+ BZ_INITIALISE_CRC ( s->calculatedBlockCRC );
+ s->state = BZ_X_OUTPUT;
+ if (s->verbosity >= 2) VPrintf0 ( "rt+rld" );
+
+ if (s->smallDecompress) {
+
+ /*-- Make a copy of cftab, used in generation of T --*/
+ for (i = 0; i <= 256; i++) s->cftabCopy[i] = s->cftab[i];
+
+ /*-- compute the T vector --*/
+ for (i = 0; i < nblock; i++) {
+ uc = (UChar)(s->ll16[i]);
+ SET_LL(i, s->cftabCopy[uc]);
+ s->cftabCopy[uc]++;
+ }
+
+ /*-- Compute T^(-1) by pointer reversal on T --*/
+ i = s->origPtr;
+ j = GET_LL(i);
+ do {
+ Int32 tmp = GET_LL(j);
+ SET_LL(j, i);
+ i = j;
+ j = tmp;
+ }
+ while (i != s->origPtr);
+
+ s->tPos = s->origPtr;
+ s->nblock_used = 0;
+ if (s->blockRandomised) {
+ BZ_RAND_INIT_MASK;
+ BZ_GET_SMALL(s->k0); s->nblock_used++;
+ BZ_RAND_UPD_MASK; s->k0 ^= BZ_RAND_MASK;
+ } else {
+ BZ_GET_SMALL(s->k0); s->nblock_used++;
+ }
+
+ } else {
+
+ /*-- compute the T^(-1) vector --*/
+ for (i = 0; i < nblock; i++) {
+ uc = (UChar)(s->tt[i] & 0xff);
+ s->tt[s->cftab[uc]] |= (i << 8);
+ s->cftab[uc]++;
+ }
+
+ s->tPos = s->tt[s->origPtr] >> 8;
+ s->nblock_used = 0;
+ if (s->blockRandomised) {
+ BZ_RAND_INIT_MASK;
+ BZ_GET_FAST(s->k0); s->nblock_used++;
+ BZ_RAND_UPD_MASK; s->k0 ^= BZ_RAND_MASK;
+ } else {
+ BZ_GET_FAST(s->k0); s->nblock_used++;
+ }
+
+ }
+
+ RETURN(BZ_OK);
+
+
+
+ endhdr_2:
+
+ GET_UCHAR(BZ_X_ENDHDR_2, uc);
+ if (uc != 0x72) RETURN(BZ_DATA_ERROR);
+ GET_UCHAR(BZ_X_ENDHDR_3, uc);
+ if (uc != 0x45) RETURN(BZ_DATA_ERROR);
+ GET_UCHAR(BZ_X_ENDHDR_4, uc);
+ if (uc != 0x38) RETURN(BZ_DATA_ERROR);
+ GET_UCHAR(BZ_X_ENDHDR_5, uc);
+ if (uc != 0x50) RETURN(BZ_DATA_ERROR);
+ GET_UCHAR(BZ_X_ENDHDR_6, uc);
+ if (uc != 0x90) RETURN(BZ_DATA_ERROR);
+
+ s->storedCombinedCRC = 0;
+ GET_UCHAR(BZ_X_CCRC_1, uc);
+ s->storedCombinedCRC = (s->storedCombinedCRC << 8) | ((UInt32)uc);
+ GET_UCHAR(BZ_X_CCRC_2, uc);
+ s->storedCombinedCRC = (s->storedCombinedCRC << 8) | ((UInt32)uc);
+ GET_UCHAR(BZ_X_CCRC_3, uc);
+ s->storedCombinedCRC = (s->storedCombinedCRC << 8) | ((UInt32)uc);
+ GET_UCHAR(BZ_X_CCRC_4, uc);
+ s->storedCombinedCRC = (s->storedCombinedCRC << 8) | ((UInt32)uc);
+
+ s->state = BZ_X_IDLE;
+ RETURN(BZ_STREAM_END);
+
+ default: AssertH ( False, 4001 );
+ }
+
+ AssertH ( False, 4002 );
+
+ save_state_and_return:
+
+ s->save_i = i;
+ s->save_j = j;
+ s->save_t = t;
+ s->save_alphaSize = alphaSize;
+ s->save_nGroups = nGroups;
+ s->save_nSelectors = nSelectors;
+ s->save_EOB = EOB;
+ s->save_groupNo = groupNo;
+ s->save_groupPos = groupPos;
+ s->save_nextSym = nextSym;
+ s->save_nblockMAX = nblockMAX;
+ s->save_nblock = nblock;
+ s->save_es = es;
+ s->save_N = N;
+ s->save_curr = curr;
+ s->save_zt = zt;
+ s->save_zn = zn;
+ s->save_zvec = zvec;
+ s->save_zj = zj;
+ s->save_gSel = gSel;
+ s->save_gMinlen = gMinlen;
+ s->save_gLimit = gLimit;
+ s->save_gBase = gBase;
+ s->save_gPerm = gPerm;
+
+ return retVal;
+}
+
+
+/*-------------------------------------------------------------*/
+/*--- end decompress.c ---*/
+/*-------------------------------------------------------------*/
+
+/*-------------------------------------------------------------*/
+/*--- Block sorting machinery ---*/
+/*--- blocksort.c ---*/
+/*-------------------------------------------------------------*/
+
+/*--
+ This file is a part of bzip2 and/or libbzip2, a program and
+ library for lossless, block-sorting data compression.
+
+ Copyright (C) 1996-2004 Julian R Seward. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ 1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+
+ 2. The origin of this software must not be misrepresented; you must
+ not claim that you wrote the original software. If you use this
+ software in a product, an acknowledgment in the product
+ documentation would be appreciated but is not required.
+
+ 3. Altered source versions must be plainly marked as such, and must
+ not be misrepresented as being the original software.
+
+ 4. The name of the author may not be used to endorse or promote
+ products derived from this software without specific prior written
+ permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+ Julian Seward, Cambridge, UK.
+ jseward@bzip.org
+ bzip2/libbzip2 version 1.0 of 21 March 2000
+
+ This program is based on (at least) the work of:
+ Mike Burrows
+ David Wheeler
+ Peter Fenwick
+ Alistair Moffat
+ Radford Neal
+ Ian H. Witten
+ Robert Sedgewick
+ Jon L. Bentley
+
+ For more information on these sources, see the manual.
+
+ To get some idea how the block sorting algorithms in this file
+ work, read my paper
+ On the Performance of BWT Sorting Algorithms
+ in Proceedings of the IEEE Data Compression Conference 2000,
+ Snowbird, Utah, USA, 27-30 March 2000. The main sort in this
+ file implements the algorithm called cache in the paper.
+--*/
+
+
+
+/*---------------------------------------------*/
+/*--- Fallback O(N log(N)^2) sorting ---*/
+/*--- algorithm, for repetitive blocks ---*/
+/*---------------------------------------------*/
+
+/*---------------------------------------------*/
+static
+__inline__
+void fallbackSimpleSort ( UInt32* fmap,
+ UInt32* eclass,
+ Int32 lo,
+ Int32 hi )
+{
+ Int32 i, j, tmp;
+ UInt32 ec_tmp;
+
+ if (lo == hi) return;
+
+ if (hi - lo > 3) {
+ for ( i = hi-4; i >= lo; i-- ) {
+ tmp = fmap[i];
+ ec_tmp = eclass[tmp];
+ for ( j = i+4; j <= hi && ec_tmp > eclass[fmap[j]]; j += 4 )
+ fmap[j-4] = fmap[j];
+ fmap[j-4] = tmp;
+ }
+ }
+
+ for ( i = hi-1; i >= lo; i-- ) {
+ tmp = fmap[i];
+ ec_tmp = eclass[tmp];
+ for ( j = i+1; j <= hi && ec_tmp > eclass[fmap[j]]; j++ )
+ fmap[j-1] = fmap[j];
+ fmap[j-1] = tmp;
+ }
+}
+
+
+/*---------------------------------------------*/
+#define fswap(zz1, zz2) \
+ { Int32 zztmp = zz1; zz1 = zz2; zz2 = zztmp; }
+
+#define fvswap(zzp1, zzp2, zzn) \
+{ \
+ Int32 yyp1 = (zzp1); \
+ Int32 yyp2 = (zzp2); \
+ Int32 yyn = (zzn); \
+ while (yyn > 0) { \
+ fswap(fmap[yyp1], fmap[yyp2]); \
+ yyp1++; yyp2++; yyn--; \
+ } \
+}
+
+
+#define fmin(a,b) ((a) < (b)) ? (a) : (b)
+
+#define fpush(lz,hz) { stackLo[sp] = lz; \
+ stackHi[sp] = hz; \
+ sp++; }
+
+#define fpop(lz,hz) { sp--; \
+ lz = stackLo[sp]; \
+ hz = stackHi[sp]; }
+
+#define FALLBACK_QSORT_SMALL_THRESH 10
+#define FALLBACK_QSORT_STACK_SIZE 100
+
+
+static
+void fallbackQSort3 ( UInt32* fmap,
+ UInt32* eclass,
+ Int32 loSt,
+ Int32 hiSt )
+{
+ Int32 unLo, unHi, ltLo, gtHi, n, m;
+ Int32 sp, lo, hi;
+ UInt32 med, r, r3;
+ Int32 stackLo[FALLBACK_QSORT_STACK_SIZE];
+ Int32 stackHi[FALLBACK_QSORT_STACK_SIZE];
+
+ r = 0;
+
+ sp = 0;
+ fpush ( loSt, hiSt );
+
+ while (sp > 0) {
+
+ AssertH ( sp < FALLBACK_QSORT_STACK_SIZE, 1004 );
+
+ fpop ( lo, hi );
+ if (hi - lo < FALLBACK_QSORT_SMALL_THRESH) {
+ fallbackSimpleSort ( fmap, eclass, lo, hi );
+ continue;
+ }
+
+ /* Random partitioning. Median of 3 sometimes fails to
+ avoid bad cases. Median of 9 seems to help but
+ looks rather expensive. This too seems to work but
+ is cheaper. Guidance for the magic constants
+ 7621 and 32768 is taken from Sedgewick's algorithms
+ book, chapter 35.
+ */
+ r = ((r * 7621) + 1) % 32768;
+ r3 = r % 3;
+ if (r3 == 0) med = eclass[fmap[lo]]; else
+ if (r3 == 1) med = eclass[fmap[(lo+hi)>>1]]; else
+ med = eclass[fmap[hi]];
+
+ unLo = ltLo = lo;
+ unHi = gtHi = hi;
+
+ while (1) {
+ while (1) {
+ if (unLo > unHi) break;
+ n = (Int32)eclass[fmap[unLo]] - (Int32)med;
+ if (n == 0) {
+ fswap(fmap[unLo], fmap[ltLo]);
+ ltLo++; unLo++;
+ continue;
+ };
+ if (n > 0) break;
+ unLo++;
+ }
+ while (1) {
+ if (unLo > unHi) break;
+ n = (Int32)eclass[fmap[unHi]] - (Int32)med;
+ if (n == 0) {
+ fswap(fmap[unHi], fmap[gtHi]);
+ gtHi--; unHi--;
+ continue;
+ };
+ if (n < 0) break;
+ unHi--;
+ }
+ if (unLo > unHi) break;
+ fswap(fmap[unLo], fmap[unHi]); unLo++; unHi--;
+ }
+
+ AssertD ( unHi == unLo-1, "fallbackQSort3(2)" );
+
+ if (gtHi < ltLo) continue;
+
+ n = fmin(ltLo-lo, unLo-ltLo); fvswap(lo, unLo-n, n);
+ m = fmin(hi-gtHi, gtHi-unHi); fvswap(unLo, hi-m+1, m);
+
+ n = lo + unLo - ltLo - 1;
+ m = hi - (gtHi - unHi) + 1;
+
+ if (n - lo > hi - m) {
+ fpush ( lo, n );
+ fpush ( m, hi );
+ } else {
+ fpush ( m, hi );
+ fpush ( lo, n );
+ }
+ }
+}
+
+#undef fmin
+#undef fpush
+#undef fpop
+#undef fswap
+#undef fvswap
+#undef FALLBACK_QSORT_SMALL_THRESH
+#undef FALLBACK_QSORT_STACK_SIZE
+
+
+/*---------------------------------------------*/
+/* Pre:
+ nblock > 0
+ eclass exists for [0 .. nblock-1]
+ ((UChar*)eclass) [0 .. nblock-1] holds block
+ ptr exists for [0 .. nblock-1]
+
+ Post:
+ ((UChar*)eclass) [0 .. nblock-1] holds block
+ All other areas of eclass destroyed
+ fmap [0 .. nblock-1] holds sorted order
+ bhtab [ 0 .. 2+(nblock/32) ] destroyed
+*/
+
+#define SET_BH(zz) bhtab[(zz) >> 5] |= (1 << ((zz) & 31))
+#define CLEAR_BH(zz) bhtab[(zz) >> 5] &= ~(1 << ((zz) & 31))
+#define ISSET_BH(zz) (bhtab[(zz) >> 5] & (1 << ((zz) & 31)))
+#define WORD_BH(zz) bhtab[(zz) >> 5]
+#define UNALIGNED_BH(zz) ((zz) & 0x01f)
+
+static
+void fallbackSort ( UInt32* fmap,
+ UInt32* eclass,
+ UInt32* bhtab,
+ Int32 nblock,
+ Int32 verb )
+{
+ Int32 ftab[257];
+ Int32 ftabCopy[256];
+ Int32 H, i, j, k, l, r, cc, cc1;
+ Int32 nNotDone;
+ Int32 nBhtab;
+ UChar* eclass8 = (UChar*)eclass;
+
+ /*--
+ Initial 1-char radix sort to generate
+ initial fmap and initial BH bits.
+ --*/
+ if (verb >= 4)
+ VPrintf0 ( " bucket sorting ...\n" );
+ for (i = 0; i < 257; i++) ftab[i] = 0;
+ for (i = 0; i < nblock; i++) ftab[eclass8[i]]++;
+ for (i = 0; i < 256; i++) ftabCopy[i] = ftab[i];
+ for (i = 1; i < 257; i++) ftab[i] += ftab[i-1];
+
+ for (i = 0; i < nblock; i++) {
+ j = eclass8[i];
+ k = ftab[j] - 1;
+ ftab[j] = k;
+ fmap[k] = i;
+ }
+
+ nBhtab = 2 + (nblock / 32);
+ for (i = 0; i < nBhtab; i++) bhtab[i] = 0;
+ for (i = 0; i < 256; i++) SET_BH(ftab[i]);
+
+ /*--
+ Inductively refine the buckets. Kind-of an
+ "exponential radix sort" (!), inspired by the
+ Manber-Myers suffix array construction algorithm.
+ --*/
+
+ /*-- set sentinel bits for block-end detection --*/
+ for (i = 0; i < 32; i++) {
+ SET_BH(nblock + 2*i);
+ CLEAR_BH(nblock + 2*i + 1);
+ }
+
+ /*-- the log(N) loop --*/
+ H = 1;
+ while (1) {
+
+ if (verb >= 4)
+ VPrintf1 ( " depth %6d has ", H );
+
+ j = 0;
+ for (i = 0; i < nblock; i++) {
+ if (ISSET_BH(i)) j = i;
+ k = fmap[i] - H; if (k < 0) k += nblock;
+ eclass[k] = j;
+ }
+
+ nNotDone = 0;
+ r = -1;
+ while (1) {
+
+ /*-- find the next non-singleton bucket --*/
+ k = r + 1;
+ while (ISSET_BH(k) && UNALIGNED_BH(k)) k++;
+ if (ISSET_BH(k)) {
+ while (WORD_BH(k) == 0xffffffff) k += 32;
+ while (ISSET_BH(k)) k++;
+ }
+ l = k - 1;
+ if (l >= nblock) break;
+ while (!ISSET_BH(k) && UNALIGNED_BH(k)) k++;
+ if (!ISSET_BH(k)) {
+ while (WORD_BH(k) == 0x00000000) k += 32;
+ while (!ISSET_BH(k)) k++;
+ }
+ r = k - 1;
+ if (r >= nblock) break;
+
+ /*-- now [l, r] bracket current bucket --*/
+ if (r > l) {
+ nNotDone += (r - l + 1);
+ fallbackQSort3 ( fmap, eclass, l, r );
+
+ /*-- scan bucket and generate header bits-- */
+ cc = -1;
+ for (i = l; i <= r; i++) {
+ cc1 = eclass[fmap[i]];
+ if (cc != cc1) { SET_BH(i); cc = cc1; };
+ }
+ }
+ }
+
+ if (verb >= 4)
+ VPrintf1 ( "%6d unresolved strings\n", nNotDone );
+
+ H *= 2;
+ if (H > nblock || nNotDone == 0) break;
+ }
+
+ /*--
+ Reconstruct the original block in
+ eclass8 [0 .. nblock-1], since the
+ previous phase destroyed it.
+ --*/
+ if (verb >= 4)
+ VPrintf0 ( " reconstructing block ...\n" );
+ j = 0;
+ for (i = 0; i < nblock; i++) {
+ while (ftabCopy[j] == 0) j++;
+ ftabCopy[j]--;
+ eclass8[fmap[i]] = (UChar)j;
+ }
+ AssertH ( j < 256, 1005 );
+}
+
+#undef SET_BH
+#undef CLEAR_BH
+#undef ISSET_BH
+#undef WORD_BH
+#undef UNALIGNED_BH
+
+
+/*---------------------------------------------*/
+/*--- The main, O(N^2 log(N)) sorting ---*/
+/*--- algorithm. Faster for "normal" ---*/
+/*--- non-repetitive blocks. ---*/
+/*---------------------------------------------*/
+
+/*---------------------------------------------*/
+static
+__inline__
+Bool mainGtU ( UInt32 i1,
+ UInt32 i2,
+ UChar* block,
+ UInt16* quadrant,
+ UInt32 nblock,
+ Int32* budget )
+{
+ Int32 k;
+ UChar c1, c2;
+ UInt16 s1, s2;
+
+ AssertD ( i1 != i2, "mainGtU" );
+ /* 1 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+ /* 2 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+ /* 3 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+ /* 4 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+ /* 5 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+ /* 6 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+ /* 7 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+ /* 8 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+ /* 9 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+ /* 10 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+ /* 11 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+ /* 12 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ i1++; i2++;
+
+ k = nblock + 8;
+
+ do {
+ /* 1 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ s1 = quadrant[i1]; s2 = quadrant[i2];
+ if (s1 != s2) return (s1 > s2);
+ i1++; i2++;
+ /* 2 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ s1 = quadrant[i1]; s2 = quadrant[i2];
+ if (s1 != s2) return (s1 > s2);
+ i1++; i2++;
+ /* 3 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ s1 = quadrant[i1]; s2 = quadrant[i2];
+ if (s1 != s2) return (s1 > s2);
+ i1++; i2++;
+ /* 4 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ s1 = quadrant[i1]; s2 = quadrant[i2];
+ if (s1 != s2) return (s1 > s2);
+ i1++; i2++;
+ /* 5 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ s1 = quadrant[i1]; s2 = quadrant[i2];
+ if (s1 != s2) return (s1 > s2);
+ i1++; i2++;
+ /* 6 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ s1 = quadrant[i1]; s2 = quadrant[i2];
+ if (s1 != s2) return (s1 > s2);
+ i1++; i2++;
+ /* 7 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ s1 = quadrant[i1]; s2 = quadrant[i2];
+ if (s1 != s2) return (s1 > s2);
+ i1++; i2++;
+ /* 8 */
+ c1 = block[i1]; c2 = block[i2];
+ if (c1 != c2) return (c1 > c2);
+ s1 = quadrant[i1]; s2 = quadrant[i2];
+ if (s1 != s2) return (s1 > s2);
+ i1++; i2++;
+
+ if (i1 >= nblock) i1 -= nblock;
+ if (i2 >= nblock) i2 -= nblock;
+
+ k -= 8;
+ (*budget)--;
+ }
+ while (k >= 0);
+
+ return False;
+}
+
+
+/*---------------------------------------------*/
+/*--
+ Knuth's increments seem to work better
+ than Incerpi-Sedgewick here. Possibly
+ because the number of elems to sort is
+ usually small, typically <= 20.
+--*/
+static
+Int32 incs[14] = { 1, 4, 13, 40, 121, 364, 1093, 3280,
+ 9841, 29524, 88573, 265720,
+ 797161, 2391484 };
+
+static
+void mainSimpleSort ( UInt32* ptr,
+ UChar* block,
+ UInt16* quadrant,
+ Int32 nblock,
+ Int32 lo,
+ Int32 hi,
+ Int32 d,
+ Int32* budget )
+{
+ Int32 i, j, h, bigN, hp;
+ UInt32 v;
+
+ bigN = hi - lo + 1;
+ if (bigN < 2) return;
+
+ hp = 0;
+ while (incs[hp] < bigN) hp++;
+ hp--;
+
+ for (; hp >= 0; hp--) {
+ h = incs[hp];
+
+ i = lo + h;
+ while (True) {
+
+ /*-- copy 1 --*/
+ if (i > hi) break;
+ v = ptr[i];
+ j = i;
+ while ( mainGtU (
+ ptr[j-h]+d, v+d, block, quadrant, nblock, budget
+ ) ) {
+ ptr[j] = ptr[j-h];
+ j = j - h;
+ if (j <= (lo + h - 1)) break;
+ }
+ ptr[j] = v;
+ i++;
+
+ /*-- copy 2 --*/
+ if (i > hi) break;
+ v = ptr[i];
+ j = i;
+ while ( mainGtU (
+ ptr[j-h]+d, v+d, block, quadrant, nblock, budget
+ ) ) {
+ ptr[j] = ptr[j-h];
+ j = j - h;
+ if (j <= (lo + h - 1)) break;
+ }
+ ptr[j] = v;
+ i++;
+
+ /*-- copy 3 --*/
+ if (i > hi) break;
+ v = ptr[i];
+ j = i;
+ while ( mainGtU (
+ ptr[j-h]+d, v+d, block, quadrant, nblock, budget
+ ) ) {
+ ptr[j] = ptr[j-h];
+ j = j - h;
+ if (j <= (lo + h - 1)) break;
+ }
+ ptr[j] = v;
+ i++;
+
+ if (*budget < 0) return;
+ }
+ }
+}
+
+
+/*---------------------------------------------*/
+/*--
+ The following is an implementation of
+ an elegant 3-way quicksort for strings,
+ described in a paper "Fast Algorithms for
+ Sorting and Searching Strings", by Robert
+ Sedgewick and Jon L. Bentley.
+--*/
+
+#define mswap(zz1, zz2) \
+ { Int32 zztmp = zz1; zz1 = zz2; zz2 = zztmp; }
+
+#define mvswap(zzp1, zzp2, zzn) \
+{ \
+ Int32 yyp1 = (zzp1); \
+ Int32 yyp2 = (zzp2); \
+ Int32 yyn = (zzn); \
+ while (yyn > 0) { \
+ mswap(ptr[yyp1], ptr[yyp2]); \
+ yyp1++; yyp2++; yyn--; \
+ } \
+}
+
+static
+__inline__
+UChar mmed3 ( UChar a, UChar b, UChar c )
+{
+ UChar t;
+ if (a > b) { t = a; a = b; b = t; };
+ if (b > c) {
+ b = c;
+ if (a > b) b = a;
+ }
+ return b;
+}
+
+#define mmin(a,b) ((a) < (b)) ? (a) : (b)
+
+#define mpush(lz,hz,dz) { stackLo[sp] = lz; \
+ stackHi[sp] = hz; \
+ stackD [sp] = dz; \
+ sp++; }
+
+#define mpop(lz,hz,dz) { sp--; \
+ lz = stackLo[sp]; \
+ hz = stackHi[sp]; \
+ dz = stackD [sp]; }
+
+
+#define mnextsize(az) (nextHi[az]-nextLo[az])
+
+#define mnextswap(az,bz) \
+ { Int32 tz; \
+ tz = nextLo[az]; nextLo[az] = nextLo[bz]; nextLo[bz] = tz; \
+ tz = nextHi[az]; nextHi[az] = nextHi[bz]; nextHi[bz] = tz; \
+ tz = nextD [az]; nextD [az] = nextD [bz]; nextD [bz] = tz; }
+
+
+#define MAIN_QSORT_SMALL_THRESH 20
+#define MAIN_QSORT_DEPTH_THRESH (BZ_N_RADIX + BZ_N_QSORT)
+#define MAIN_QSORT_STACK_SIZE 100
+
+static
+void mainQSort3 ( UInt32* ptr,
+ UChar* block,
+ UInt16* quadrant,
+ Int32 nblock,
+ Int32 loSt,
+ Int32 hiSt,
+ Int32 dSt,
+ Int32* budget )
+{
+ Int32 unLo, unHi, ltLo, gtHi, n, m, med;
+ Int32 sp, lo, hi, d;
+
+ Int32 stackLo[MAIN_QSORT_STACK_SIZE];
+ Int32 stackHi[MAIN_QSORT_STACK_SIZE];
+ Int32 stackD [MAIN_QSORT_STACK_SIZE];
+
+ Int32 nextLo[3];
+ Int32 nextHi[3];
+ Int32 nextD [3];
+
+ sp = 0;
+ mpush ( loSt, hiSt, dSt );
+
+ while (sp > 0) {
+
+ AssertH ( sp < MAIN_QSORT_STACK_SIZE, 1001 );
+
+ mpop ( lo, hi, d );
+ if (hi - lo < MAIN_QSORT_SMALL_THRESH ||
+ d > MAIN_QSORT_DEPTH_THRESH) {
+ mainSimpleSort ( ptr, block, quadrant, nblock, lo, hi, d, budget );
+ if (*budget < 0) return;
+ continue;
+ }
+
+ med = (Int32)
+ mmed3 ( block[ptr[ lo ]+d],
+ block[ptr[ hi ]+d],
+ block[ptr[ (lo+hi)>>1 ]+d] );
+
+ unLo = ltLo = lo;
+ unHi = gtHi = hi;
+
+ while (True) {
+ while (True) {
+ if (unLo > unHi) break;
+ n = ((Int32)block[ptr[unLo]+d]) - med;
+ if (n == 0) {
+ mswap(ptr[unLo], ptr[ltLo]);
+ ltLo++; unLo++; continue;
+ };
+ if (n > 0) break;
+ unLo++;
+ }
+ while (True) {
+ if (unLo > unHi) break;
+ n = ((Int32)block[ptr[unHi]+d]) - med;
+ if (n == 0) {
+ mswap(ptr[unHi], ptr[gtHi]);
+ gtHi--; unHi--; continue;
+ };
+ if (n < 0) break;
+ unHi--;
+ }
+ if (unLo > unHi) break;
+ mswap(ptr[unLo], ptr[unHi]); unLo++; unHi--;
+ }
+
+ AssertD ( unHi == unLo-1, "mainQSort3(2)" );
+
+ if (gtHi < ltLo) {
+ mpush(lo, hi, d+1 );
+ continue;
+ }
+
+ n = mmin(ltLo-lo, unLo-ltLo); mvswap(lo, unLo-n, n);
+ m = mmin(hi-gtHi, gtHi-unHi); mvswap(unLo, hi-m+1, m);
+
+ n = lo + unLo - ltLo - 1;
+ m = hi - (gtHi - unHi) + 1;
+
+ nextLo[0] = lo; nextHi[0] = n; nextD[0] = d;
+ nextLo[1] = m; nextHi[1] = hi; nextD[1] = d;
+ nextLo[2] = n+1; nextHi[2] = m-1; nextD[2] = d+1;
+
+ if (mnextsize(0) < mnextsize(1)) mnextswap(0,1);
+ if (mnextsize(1) < mnextsize(2)) mnextswap(1,2);
+ if (mnextsize(0) < mnextsize(1)) mnextswap(0,1);
+
+ AssertD (mnextsize(0) >= mnextsize(1), "mainQSort3(8)" );
+ AssertD (mnextsize(1) >= mnextsize(2), "mainQSort3(9)" );
+
+ mpush (nextLo[0], nextHi[0], nextD[0]);
+ mpush (nextLo[1], nextHi[1], nextD[1]);
+ mpush (nextLo[2], nextHi[2], nextD[2]);
+ }
+}
+
+#undef mswap
+#undef mvswap
+#undef mpush
+#undef mpop
+#undef mmin
+#undef mnextsize
+#undef mnextswap
+#undef MAIN_QSORT_SMALL_THRESH
+#undef MAIN_QSORT_DEPTH_THRESH
+#undef MAIN_QSORT_STACK_SIZE
+
+
+/*---------------------------------------------*/
+/* Pre:
+ nblock > N_OVERSHOOT
+ block32 exists for [0 .. nblock-1 +N_OVERSHOOT]
+ ((UChar*)block32) [0 .. nblock-1] holds block
+ ptr exists for [0 .. nblock-1]
+
+ Post:
+ ((UChar*)block32) [0 .. nblock-1] holds block
+ All other areas of block32 destroyed
+ ftab [0 .. 65536 ] destroyed
+ ptr [0 .. nblock-1] holds sorted order
+ if (*budget < 0), sorting was abandoned
+*/
+
+#define BIGFREQ(b) (ftab[((b)+1) << 8] - ftab[(b) << 8])
+#define SETMASK (1 << 21)
+#define CLEARMASK (~(SETMASK))
+
+static
+void mainSort ( UInt32* ptr,
+ UChar* block,
+ UInt16* quadrant,
+ UInt32* ftab,
+ Int32 nblock,
+ Int32 verb,
+ Int32* budget )
+{
+ Int32 i, j, k, ss, sb;
+ Int32 runningOrder[256];
+ Bool bigDone[256];
+ Int32 copyStart[256];
+ Int32 copyEnd [256];
+ UChar c1;
+ Int32 numQSorted;
+ UInt16 s;
+ if (verb >= 4) VPrintf0 ( " main sort initialise ...\n" );
+
+ /*-- set up the 2-byte frequency table --*/
+ for (i = 65536; i >= 0; i--) ftab[i] = 0;
+
+ j = block[0] << 8;
+ i = nblock-1;
+ for (; i >= 3; i -= 4) {
+ quadrant[i] = 0;
+ j = (j >> 8) | ( ((UInt16)block[i]) << 8);
+ ftab[j]++;
+ quadrant[i-1] = 0;
+ j = (j >> 8) | ( ((UInt16)block[i-1]) << 8);
+ ftab[j]++;
+ quadrant[i-2] = 0;
+ j = (j >> 8) | ( ((UInt16)block[i-2]) << 8);
+ ftab[j]++;
+ quadrant[i-3] = 0;
+ j = (j >> 8) | ( ((UInt16)block[i-3]) << 8);
+ ftab[j]++;
+ }
+ for (; i >= 0; i--) {
+ quadrant[i] = 0;
+ j = (j >> 8) | ( ((UInt16)block[i]) << 8);
+ ftab[j]++;
+ }
+
+ /*-- (emphasises close relationship of block & quadrant) --*/
+ for (i = 0; i < BZ_N_OVERSHOOT; i++) {
+ block [nblock+i] = block[i];
+ quadrant[nblock+i] = 0;
+ }
+
+ if (verb >= 4) VPrintf0 ( " bucket sorting ...\n" );
+
+ /*-- Complete the initial radix sort --*/
+ for (i = 1; i <= 65536; i++) ftab[i] += ftab[i-1];
+
+ s = block[0] << 8;
+ i = nblock-1;
+ for (; i >= 3; i -= 4) {
+ s = (s >> 8) | (block[i] << 8);
+ j = ftab[s] -1;
+ ftab[s] = j;
+ ptr[j] = i;
+ s = (s >> 8) | (block[i-1] << 8);
+ j = ftab[s] -1;
+ ftab[s] = j;
+ ptr[j] = i-1;
+ s = (s >> 8) | (block[i-2] << 8);
+ j = ftab[s] -1;
+ ftab[s] = j;
+ ptr[j] = i-2;
+ s = (s >> 8) | (block[i-3] << 8);
+ j = ftab[s] -1;
+ ftab[s] = j;
+ ptr[j] = i-3;
+ }
+ for (; i >= 0; i--) {
+ s = (s >> 8) | (block[i] << 8);
+ j = ftab[s] -1;
+ ftab[s] = j;
+ ptr[j] = i;
+ }
+
+ /*--
+ Now ftab contains the first loc of every small bucket.
+ Calculate the running order, from smallest to largest
+ big bucket.
+ --*/
+ for (i = 0; i <= 255; i++) {
+ bigDone [i] = False;
+ runningOrder[i] = i;
+ }
+
+ {
+ Int32 vv;
+ Int32 h = 1;
+ do h = 3 * h + 1; while (h <= 256);
+ do {
+ h = h / 3;
+ for (i = h; i <= 255; i++) {
+ vv = runningOrder[i];
+ j = i;
+ while ( BIGFREQ(runningOrder[j-h]) > BIGFREQ(vv) ) {
+ runningOrder[j] = runningOrder[j-h];
+ j = j - h;
+ if (j <= (h - 1)) goto zero;
+ }
+ zero:
+ runningOrder[j] = vv;
+ }
+ } while (h != 1);
+ }
+
+ /*--
+ The main sorting loop.
+ --*/
+
+ numQSorted = 0;
+
+ for (i = 0; i <= 255; i++) {
+
+ /*--
+ Process big buckets, starting with the least full.
+ Basically this is a 3-step process in which we call
+ mainQSort3 to sort the small buckets [ss, j], but
+ also make a big effort to avoid the calls if we can.
+ --*/
+ ss = runningOrder[i];
+
+ /*--
+ Step 1:
+ Complete the big bucket [ss] by quicksorting
+ any unsorted small buckets [ss, j], for j != ss.
+ Hopefully previous pointer-scanning phases have already
+ completed many of the small buckets [ss, j], so
+ we don't have to sort them at all.
+ --*/
+ for (j = 0; j <= 255; j++) {
+ if (j != ss) {
+ sb = (ss << 8) + j;
+ if ( ! (ftab[sb] & SETMASK) ) {
+ Int32 lo = ftab[sb] & CLEARMASK;
+ Int32 hi = (ftab[sb+1] & CLEARMASK) - 1;
+ if (hi > lo) {
+ if (verb >= 4)
+ VPrintf4 ( " qsort [0x%x, 0x%x] "
+ "done %d this %d\n",
+ ss, j, numQSorted, hi - lo + 1 );
+ mainQSort3 (
+ ptr, block, quadrant, nblock,
+ lo, hi, BZ_N_RADIX, budget
+ );
+ numQSorted += (hi - lo + 1);
+ if (*budget < 0) return;
+ }
+ }
+ ftab[sb] |= SETMASK;
+ }
+ }
+
+ AssertH ( !bigDone[ss], 1006 );
+
+ /*--
+ Step 2:
+ Now scan this big bucket [ss] so as to synthesise the
+ sorted order for small buckets [t, ss] for all t,
+ including, magically, the bucket [ss,ss] too.
+ This will avoid doing Real Work in subsequent Step 1's.
+ --*/
+ {
+ for (j = 0; j <= 255; j++) {
+ copyStart[j] = ftab[(j << 8) + ss] & CLEARMASK;
+ copyEnd [j] = (ftab[(j << 8) + ss + 1] & CLEARMASK) - 1;
+ }
+ for (j = ftab[ss << 8] & CLEARMASK; j < copyStart[ss]; j++) {
+ k = ptr[j]-1; if (k < 0) k += nblock;
+ c1 = block[k];
+ if (!bigDone[c1])
+ ptr[ copyStart[c1]++ ] = k;
+ }
+ for (j = (ftab[(ss+1) << 8] & CLEARMASK) - 1; j > copyEnd[ss]; j--) {
+ k = ptr[j]-1; if (k < 0) k += nblock;
+ c1 = block[k];
+ if (!bigDone[c1])
+ ptr[ copyEnd[c1]-- ] = k;
+ }
+ }
+
+ AssertH ( (copyStart[ss]-1 == copyEnd[ss])
+ ||
+ /* Extremely rare case missing in bzip2-1.0.0 and 1.0.1.
+ Necessity for this case is demonstrated by compressing
+ a sequence of approximately 48.5 million of character
+ 251; 1.0.0/1.0.1 will then die here. */
+ (copyStart[ss] == 0 && copyEnd[ss] == nblock-1),
+ 1007 )
+
+ for (j = 0; j <= 255; j++) ftab[(j << 8) + ss] |= SETMASK;
+
+ /*--
+ Step 3:
+ The [ss] big bucket is now done. Record this fact,
+ and update the quadrant descriptors. Remember to
+ update quadrants in the overshoot area too, if
+ necessary. The "if (i < 255)" test merely skips
+ this updating for the last bucket processed, since
+ updating for the last bucket is pointless.
+
+ The quadrant array provides a way to incrementally
+ cache sort orderings, as they appear, so as to
+ make subsequent comparisons in fullGtU() complete
+ faster. For repetitive blocks this makes a big
+ difference (but not big enough to be able to avoid
+ the fallback sorting mechanism, exponential radix sort).
+
+ The precise meaning is: at all times:
+
+ for 0 <= i < nblock and 0 <= j <= nblock
+
+ if block[i] != block[j],
+
+ then the relative values of quadrant[i] and
+ quadrant[j] are meaningless.
+
+ else {
+ if quadrant[i] < quadrant[j]
+ then the string starting at i lexicographically
+ precedes the string starting at j
+
+ else if quadrant[i] > quadrant[j]
+ then the string starting at j lexicographically
+ precedes the string starting at i
+
+ else
+ the relative ordering of the strings starting
+ at i and j has not yet been determined.
+ }
+ --*/
+ bigDone[ss] = True;
+
+ if (i < 255) {
+ Int32 bbStart = ftab[ss << 8] & CLEARMASK;
+ Int32 bbSize = (ftab[(ss+1) << 8] & CLEARMASK) - bbStart;
+ Int32 shifts = 0;
+
+ while ((bbSize >> shifts) > 65534) shifts++;
+
+ for (j = bbSize-1; j >= 0; j--) {
+ Int32 a2update = ptr[bbStart + j];
+ UInt16 qVal = (UInt16)(j >> shifts);
+ quadrant[a2update] = qVal;
+ if (a2update < BZ_N_OVERSHOOT)
+ quadrant[a2update + nblock] = qVal;
+ }
+ AssertH ( ((bbSize-1) >> shifts) <= 65535, 1002 );
+ }
+
+ }
+
+ if (verb >= 4)
+ VPrintf3 ( " %d pointers, %d sorted, %d scanned\n",
+ nblock, numQSorted, nblock - numQSorted );
+}
+
+#undef BIGFREQ
+#undef SETMASK
+#undef CLEARMASK
+
+
+/*---------------------------------------------*/
+/* Pre:
+ nblock > 0
+ arr2 exists for [0 .. nblock-1 +N_OVERSHOOT]
+ ((UChar*)arr2) [0 .. nblock-1] holds block
+ arr1 exists for [0 .. nblock-1]
+
+ Post:
+ ((UChar*)arr2) [0 .. nblock-1] holds block
+ All other areas of block destroyed
+ ftab [ 0 .. 65536 ] destroyed
+ arr1 [0 .. nblock-1] holds sorted order
+*/
+void BZ2_blockSort ( EState* s )
+{
+ UInt32* ptr = s->ptr;
+ UChar* block = s->block;
+ UInt32* ftab = s->ftab;
+ Int32 nblock = s->nblock;
+ Int32 verb = s->verbosity;
+ Int32 wfact = s->workFactor;
+ UInt16* quadrant;
+ Int32 budget;
+ Int32 budgetInit;
+ Int32 i;
+
+ if (nblock < /* 10000 */1000 ) {
+ fallbackSort ( s->arr1, s->arr2, ftab, nblock, verb );
+ } else {
+ /* Calculate the location for quadrant, remembering to get
+ the alignment right. Assumes that &(block[0]) is at least
+ 2-byte aligned -- this should be ok since block is really
+ the first section of arr2.
+ */
+ i = nblock+BZ_N_OVERSHOOT;
+ if (i & 1) i++;
+ quadrant = (UInt16*)(&(block[i]));
+
+ /* (wfact-1) / 3 puts the default-factor-30
+ transition point at very roughly the same place as
+ with v0.1 and v0.9.0.
+ Not that it particularly matters any more, since the
+ resulting compressed stream is now the same regardless
+ of whether or not we use the main sort or fallback sort.
+ */
+ if (wfact < 1 ) wfact = 1;
+ if (wfact > 100) wfact = 100;
+ budgetInit = nblock * ((wfact-1) / 3);
+ budget = budgetInit;
+
+ mainSort ( ptr, block, quadrant, ftab, nblock, verb, &budget );
+ if (0 && verb >= 3)
+ VPrintf3 ( " %d work, %d block, ratio %5.2f\n",
+ budgetInit - budget,
+ nblock,
+ (float)(budgetInit - budget) /
+ (float)(nblock==0 ? 1 : nblock) );
+ if (budget < 0) {
+ if (verb >= 2)
+ VPrintf0 ( " too repetitive; using fallback"
+ " sorting algorithm\n" );
+ fallbackSort ( s->arr1, s->arr2, ftab, nblock, verb );
+ }
+ }
+
+ s->origPtr = -1;
+ for (i = 0; i < s->nblock; i++)
+ if (ptr[i] == 0)
+ { s->origPtr = i; break; };
+
+ AssertH( s->origPtr != -1, 1003 );
+}
+
+
+/*-------------------------------------------------------------*/
+/*--- end blocksort.c ---*/
+/*-------------------------------------------------------------*/
+
+/*-------------------------------------------------------------*/
+/*--- Huffman coding low-level stuff ---*/
+/*--- huffman.c ---*/
+/*-------------------------------------------------------------*/
+
+/*--
+ This file is a part of bzip2 and/or libbzip2, a program and
+ library for lossless, block-sorting data compression.
+
+ Copyright (C) 1996-2004 Julian R Seward. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ 1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+
+ 2. The origin of this software must not be misrepresented; you must
+ not claim that you wrote the original software. If you use this
+ software in a product, an acknowledgment in the product
+ documentation would be appreciated but is not required.
+
+ 3. Altered source versions must be plainly marked as such, and must
+ not be misrepresented as being the original software.
+
+ 4. The name of the author may not be used to endorse or promote
+ products derived from this software without specific prior written
+ permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+ Julian Seward, Cambridge, UK.
+ jseward@bzip.org
+ bzip2/libbzip2 version 1.0 of 21 March 2000
+
+ This program is based on (at least) the work of:
+ Mike Burrows
+ David Wheeler
+ Peter Fenwick
+ Alistair Moffat
+ Radford Neal
+ Ian H. Witten
+ Robert Sedgewick
+ Jon L. Bentley
+
+ For more information on these sources, see the manual.
+--*/
+
+
+
+/*---------------------------------------------------*/
+#define WEIGHTOF(zz0) ((zz0) & 0xffffff00)
+#define DEPTHOF(zz1) ((zz1) & 0x000000ff)
+#define MYMAX(zz2,zz3) ((zz2) > (zz3) ? (zz2) : (zz3))
+
+#define ADDWEIGHTS(zw1,zw2) \
+ (WEIGHTOF(zw1)+WEIGHTOF(zw2)) | \
+ (1 + MYMAX(DEPTHOF(zw1),DEPTHOF(zw2)))
+
+#define UPHEAP(z) \
+{ \
+ Int32 zz, tmp; \
+ zz = z; tmp = heap[zz]; \
+ while (weight[tmp] < weight[heap[zz >> 1]]) { \
+ heap[zz] = heap[zz >> 1]; \
+ zz >>= 1; \
+ } \
+ heap[zz] = tmp; \
+}
+
+#define DOWNHEAP(z) \
+{ \
+ Int32 zz, yy, tmp; \
+ zz = z; tmp = heap[zz]; \
+ while (True) { \
+ yy = zz << 1; \
+ if (yy > nHeap) break; \
+ if (yy < nHeap && \
+ weight[heap[yy+1]] < weight[heap[yy]]) \
+ yy++; \
+ if (weight[tmp] < weight[heap[yy]]) break; \
+ heap[zz] = heap[yy]; \
+ zz = yy; \
+ } \
+ heap[zz] = tmp; \
+}
+
+
+/*---------------------------------------------------*/
+void BZ2_hbMakeCodeLengths ( UChar *len,
+ Int32 *freq,
+ Int32 alphaSize,
+ Int32 maxLen )
+{
+ /*--
+ Nodes and heap entries run from 1. Entry 0
+ for both the heap and nodes is a sentinel.
+ --*/
+ Int32 nNodes, nHeap, n1, n2, i, j, k;
+ Bool tooLong;
+
+ Int32 heap [ BZ_MAX_ALPHA_SIZE + 2 ];
+ Int32 weight [ BZ_MAX_ALPHA_SIZE * 2 ];
+ Int32 parent [ BZ_MAX_ALPHA_SIZE * 2 ];
+
+ for (i = 0; i < alphaSize; i++)
+ weight[i+1] = (freq[i] == 0 ? 1 : freq[i]) << 8;
+
+ while (True) {
+
+ nNodes = alphaSize;
+ nHeap = 0;
+
+ heap[0] = 0;
+ weight[0] = 0;
+ parent[0] = -2;
+
+ for (i = 1; i <= alphaSize; i++) {
+ parent[i] = -1;
+ nHeap++;
+ heap[nHeap] = i;
+ UPHEAP(nHeap);
+ }
+
+ AssertH( nHeap < (BZ_MAX_ALPHA_SIZE+2), 2001 );
+
+ while (nHeap > 1) {
+ n1 = heap[1]; heap[1] = heap[nHeap]; nHeap--; DOWNHEAP(1);
+ n2 = heap[1]; heap[1] = heap[nHeap]; nHeap--; DOWNHEAP(1);
+ nNodes++;
+ parent[n1] = parent[n2] = nNodes;
+ weight[nNodes] = ADDWEIGHTS(weight[n1], weight[n2]);
+ parent[nNodes] = -1;
+ nHeap++;
+ heap[nHeap] = nNodes;
+ UPHEAP(nHeap);
+ }
+
+ AssertH( nNodes < (BZ_MAX_ALPHA_SIZE * 2), 2002 );
+
+ tooLong = False;
+ for (i = 1; i <= alphaSize; i++) {
+ j = 0;
+ k = i;
+ while (parent[k] >= 0) { k = parent[k]; j++; }
+ len[i-1] = j;
+ if (j > maxLen) tooLong = True;
+ }
+
+ if (! tooLong) break;
+
+ /* 17 Oct 04: keep-going condition for the following loop used
+ to be 'i < alphaSize', which missed the last element,
+ theoretically leading to the possibility of the compressor
+ looping. However, this count-scaling step is only needed if
+ one of the generated Huffman code words is longer than
+ maxLen, which up to and including version 1.0.2 was 20 bits,
+ which is extremely unlikely. In version 1.0.3 maxLen was
+ changed to 17 bits, which has minimal effect on compression
+ ratio, but does mean this scaling step is used from time to
+ time, enough to verify that it works.
+
+ This means that bzip2-1.0.3 and later will only produce
+ Huffman codes with a maximum length of 17 bits. However, in
+ order to preserve backwards compatibility with bitstreams
+ produced by versions pre-1.0.3, the decompressor must still
+ handle lengths of up to 20. */
+
+ for (i = 1; i <= alphaSize; i++) {
+ j = weight[i] >> 8;
+ j = 1 + (j / 2);
+ weight[i] = j << 8;
+ }
+ }
+}
+
+
+/*---------------------------------------------------*/
+void BZ2_hbAssignCodes ( Int32 *code,
+ UChar *length,
+ Int32 minLen,
+ Int32 maxLen,
+ Int32 alphaSize )
+{
+ Int32 n, vec, i;
+
+ vec = 0;
+ for (n = minLen; n <= maxLen; n++) {
+ for (i = 0; i < alphaSize; i++)
+ if (length[i] == n) { code[i] = vec; vec++; };
+ vec <<= 1;
+ }
+}
+
+
+/*---------------------------------------------------*/
+void BZ2_hbCreateDecodeTables ( Int32 *limit,
+ Int32 *base,
+ Int32 *perm,
+ UChar *length,
+ Int32 minLen,
+ Int32 maxLen,
+ Int32 alphaSize )
+{
+ Int32 pp, i, j, vec;
+
+ pp = 0;
+ for (i = minLen; i <= maxLen; i++)
+ for (j = 0; j < alphaSize; j++)
+ if (length[j] == i) { perm[pp] = j; pp++; };
+
+ for (i = 0; i < BZ_MAX_CODE_LEN; i++) base[i] = 0;
+ for (i = 0; i < alphaSize; i++) base[length[i]+1]++;
+
+ for (i = 1; i < BZ_MAX_CODE_LEN; i++) base[i] += base[i-1];
+
+ for (i = 0; i < BZ_MAX_CODE_LEN; i++) limit[i] = 0;
+ vec = 0;
+
+ for (i = minLen; i <= maxLen; i++) {
+ vec += (base[i+1] - base[i]);
+ limit[i] = vec-1;
+ vec <<= 1;
+ }
+ for (i = minLen + 1; i <= maxLen; i++)
+ base[i] = ((limit[i-1] + 1) << 1) - base[i];
+}
+
+
+/*-------------------------------------------------------------*/
+/*--- end huffman.c ---*/
+/*-------------------------------------------------------------*/
+
+/*-------------------------------------------------------------*/
+/*--- Compression machinery (not incl block sorting) ---*/
+/*--- compress.c ---*/
+/*-------------------------------------------------------------*/
+
+/*--
+ This file is a part of bzip2 and/or libbzip2, a program and
+ library for lossless, block-sorting data compression.
+
+ Copyright (C) 1996-2004 Julian R Seward. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ 1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+
+ 2. The origin of this software must not be misrepresented; you must
+ not claim that you wrote the original software. If you use this
+ software in a product, an acknowledgment in the product
+ documentation would be appreciated but is not required.
+
+ 3. Altered source versions must be plainly marked as such, and must
+ not be misrepresented as being the original software.
+
+ 4. The name of the author may not be used to endorse or promote
+ products derived from this software without specific prior written
+ permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+ Julian Seward, Cambridge, UK.
+ jseward@bzip.org
+ bzip2/libbzip2 version 1.0 of 21 March 2000
+
+ This program is based on (at least) the work of:
+ Mike Burrows
+ David Wheeler
+ Peter Fenwick
+ Alistair Moffat
+ Radford Neal
+ Ian H. Witten
+ Robert Sedgewick
+ Jon L. Bentley
+
+ For more information on these sources, see the manual.
+--*/
+
+/*--
+ CHANGES
+ ~~~~~~~
+ 0.9.0 -- original version.
+
+ 0.9.0a/b -- no changes in this file.
+
+ 0.9.0c
+ * changed setting of nGroups in sendMTFValues() so as to
+ do a bit better on small files
+--*/
+
+
+
+/*---------------------------------------------------*/
+/*--- Bit stream I/O ---*/
+/*---------------------------------------------------*/
+
+/*---------------------------------------------------*/
+void BZ2_bsInitWrite ( EState* s )
+{
+ s->bsLive = 0;
+ s->bsBuff = 0;
+}
+
+
+/*---------------------------------------------------*/
+static
+void bsFinishWrite ( EState* s )
+{
+ while (s->bsLive > 0) {
+ s->zbits[s->numZ] = (UChar)(s->bsBuff >> 24);
+ s->numZ++;
+ s->bsBuff <<= 8;
+ s->bsLive -= 8;
+ }
+}
+
+
+/*---------------------------------------------------*/
+#define bsNEEDW(nz) \
+{ \
+ while (s->bsLive >= 8) { \
+ s->zbits[s->numZ] \
+ = (UChar)(s->bsBuff >> 24); \
+ s->numZ++; \
+ s->bsBuff <<= 8; \
+ s->bsLive -= 8; \
+ } \
+}
+
+
+/*---------------------------------------------------*/
+static
+__inline__
+void bsW ( EState* s, Int32 n, UInt32 v )
+{
+ bsNEEDW ( n );
+ s->bsBuff |= (v << (32 - s->bsLive - n));
+ s->bsLive += n;
+}
+
+
+/*---------------------------------------------------*/
+static
+void bsPutUInt32 ( EState* s, UInt32 u )
+{
+ bsW ( s, 8, (u >> 24) & 0xffL );
+ bsW ( s, 8, (u >> 16) & 0xffL );
+ bsW ( s, 8, (u >> 8) & 0xffL );
+ bsW ( s, 8, u & 0xffL );
+}
+
+
+/*---------------------------------------------------*/
+static
+void bsPutUChar ( EState* s, UChar c )
+{
+ bsW( s, 8, (UInt32)c );
+}
+
+
+/*---------------------------------------------------*/
+/*--- The back end proper ---*/
+/*---------------------------------------------------*/
+
+/*---------------------------------------------------*/
+static
+void makeMaps_e ( EState* s )
+{
+ Int32 i;
+ s->nInUse = 0;
+ for (i = 0; i < 256; i++)
+ if (s->inUse[i]) {
+ s->unseqToSeq[i] = s->nInUse;
+ s->nInUse++;
+ }
+}
+
+
+/*---------------------------------------------------*/
+static
+void generateMTFValues ( EState* s )
+{
+ UChar yy[256];
+ Int32 i, j;
+ Int32 zPend;
+ Int32 wr;
+ Int32 EOB;
+
+ /*
+ After sorting (eg, here),
+ s->arr1 [ 0 .. s->nblock-1 ] holds sorted order,
+ and
+ ((UChar*)s->arr2) [ 0 .. s->nblock-1 ]
+ holds the original block data.
+
+ The first thing to do is generate the MTF values,
+ and put them in
+ ((UInt16*)s->arr1) [ 0 .. s->nblock-1 ].
+ Because there are strictly fewer or equal MTF values
+ than block values, ptr values in this area are overwritten
+ with MTF values only when they are no longer needed.
+
+ The final compressed bitstream is generated into the
+ area starting at
+ (UChar*) (&((UChar*)s->arr2)[s->nblock])
+
+ These storage aliases are set up in bzCompressInit(),
+ except for the last one, which is arranged in
+ compressBlock().
+ */
+ UInt32* ptr = s->ptr;
+ UChar* block = s->block;
+ UInt16* mtfv = s->mtfv;
+
+ makeMaps_e ( s );
+ EOB = s->nInUse+1;
+
+ for (i = 0; i <= EOB; i++) s->mtfFreq[i] = 0;
+
+ wr = 0;
+ zPend = 0;
+ for (i = 0; i < s->nInUse; i++) yy[i] = (UChar) i;
+
+ for (i = 0; i < s->nblock; i++) {
+ UChar ll_i;
+ AssertD ( wr <= i, "generateMTFValues(1)" );
+ j = ptr[i]-1; if (j < 0) j += s->nblock;
+ ll_i = s->unseqToSeq[block[j]];
+ AssertD ( ll_i < s->nInUse, "generateMTFValues(2a)" );
+
+ if (yy[0] == ll_i) {
+ zPend++;
+ } else {
+
+ if (zPend > 0) {
+ zPend--;
+ while (True) {
+ if (zPend & 1) {
+ mtfv[wr] = BZ_RUNB; wr++;
+ s->mtfFreq[BZ_RUNB]++;
+ } else {
+ mtfv[wr] = BZ_RUNA; wr++;
+ s->mtfFreq[BZ_RUNA]++;
+ }
+ if (zPend < 2) break;
+ zPend = (zPend - 2) / 2;
+ };
+ zPend = 0;
+ }
+ {
+ register UChar rtmp;
+ register UChar* ryy_j;
+ register UChar rll_i;
+ rtmp = yy[1];
+ yy[1] = yy[0];
+ ryy_j = &(yy[1]);
+ rll_i = ll_i;
+ while ( rll_i != rtmp ) {
+ register UChar rtmp2;
+ ryy_j++;
+ rtmp2 = rtmp;
+ rtmp = *ryy_j;
+ *ryy_j = rtmp2;
+ };
+ yy[0] = rtmp;
+ j = ryy_j - &(yy[0]);
+ mtfv[wr] = j+1; wr++; s->mtfFreq[j+1]++;
+ }
+
+ }
+ }
+
+ if (zPend > 0) {
+ zPend--;
+ while (True) {
+ if (zPend & 1) {
+ mtfv[wr] = BZ_RUNB; wr++;
+ s->mtfFreq[BZ_RUNB]++;
+ } else {
+ mtfv[wr] = BZ_RUNA; wr++;
+ s->mtfFreq[BZ_RUNA]++;
+ }
+ if (zPend < 2) break;
+ zPend = (zPend - 2) / 2;
+ };
+ zPend = 0;
+ }
+
+ mtfv[wr] = EOB; wr++; s->mtfFreq[EOB]++;
+
+ s->nMTF = wr;
+}
+
+
+/*---------------------------------------------------*/
+#define BZ_LESSER_ICOST 0
+#define BZ_GREATER_ICOST 15
+
+static
+void sendMTFValues ( EState* s )
+{
+ Int32 v, t, i, j, gs, ge, totc, bt, bc, iter;
+ Int32 nSelectors, alphaSize, minLen, maxLen, selCtr;
+ Int32 nGroups, nBytes;
+
+ /*--
+ UChar len [BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];
+ is a global since the decoder also needs it.
+
+ Int32 code[BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];
+ Int32 rfreq[BZ_N_GROUPS][BZ_MAX_ALPHA_SIZE];
+ are also globals only used in this proc.
+ Made global to keep stack frame size small.
+ --*/
+
+
+ UInt16 cost[BZ_N_GROUPS];
+ Int32 fave[BZ_N_GROUPS];
+
+ UInt16* mtfv = s->mtfv;
+
+ if (s->verbosity >= 3)
+ VPrintf3( " %d in block, %d after MTF & 1-2 coding, "
+ "%d+2 syms in use\n",
+ s->nblock, s->nMTF, s->nInUse );
+
+ alphaSize = s->nInUse+2;
+ for (t = 0; t < BZ_N_GROUPS; t++)
+ for (v = 0; v < alphaSize; v++)
+ s->len[t][v] = BZ_GREATER_ICOST;
+
+ /*--- Decide how many coding tables to use ---*/
+ AssertH ( s->nMTF > 0, 3001 );
+ if (s->nMTF < 200) nGroups = 2; else
+ if (s->nMTF < 600) nGroups = 3; else
+ if (s->nMTF < 1200) nGroups = 4; else
+ if (s->nMTF < 2400) nGroups = 5; else
+ nGroups = 6;
+
+ /*--- Generate an initial set of coding tables ---*/
+ {
+ Int32 nPart, remF, tFreq, aFreq;
+
+ nPart = nGroups;
+ remF = s->nMTF;
+ gs = 0;
+ while (nPart > 0) {
+ tFreq = remF / nPart;
+ ge = gs-1;
+ aFreq = 0;
+ while (aFreq < tFreq && ge < alphaSize-1) {
+ ge++;
+ aFreq += s->mtfFreq[ge];
+ }
+
+ if (ge > gs
+ && nPart != nGroups && nPart != 1
+ && ((nGroups-nPart) % 2 == 1)) {
+ aFreq -= s->mtfFreq[ge];
+ ge--;
+ }
+
+ if (0 && s->verbosity >= 3)
+ VPrintf5( " initial group %d, [%d .. %d], "
+ "has %d syms (%4.1f%%)\n",
+ nPart, gs, ge, aFreq,
+ (100.0 * (float)aFreq) / (float)(s->nMTF) );
+
+ for (v = 0; v < alphaSize; v++)
+ if (v >= gs && v <= ge)
+ s->len[nPart-1][v] = BZ_LESSER_ICOST; else
+ s->len[nPart-1][v] = BZ_GREATER_ICOST;
+
+ nPart--;
+ gs = ge+1;
+ remF -= aFreq;
+ }
+ }
+
+ /*---
+ Iterate up to BZ_N_ITERS times to improve the tables.
+ ---*/
+ for (iter = 0; iter < BZ_N_ITERS; iter++) {
+
+ for (t = 0; t < nGroups; t++) fave[t] = 0;
+
+ for (t = 0; t < nGroups; t++)
+ for (v = 0; v < alphaSize; v++)
+ s->rfreq[t][v] = 0;
+
+ /*---
+ Set up an auxiliary length table which is used to fast-track
+ the common case (nGroups == 6).
+ ---*/
+ if (nGroups == 6) {
+ for (v = 0; v < alphaSize; v++) {
+ s->len_pack[v][0] = (s->len[1][v] << 16) | s->len[0][v];
+ s->len_pack[v][1] = (s->len[3][v] << 16) | s->len[2][v];
+ s->len_pack[v][2] = (s->len[5][v] << 16) | s->len[4][v];
+ }
+ }
+
+ nSelectors = 0;
+ totc = 0;
+ gs = 0;
+ while (True) {
+
+ /*--- Set group start & end marks. --*/
+ if (gs >= s->nMTF) break;
+ ge = gs + BZ_G_SIZE - 1;
+ if (ge >= s->nMTF) ge = s->nMTF-1;
+
+ /*--
+ Calculate the cost of this group as coded
+ by each of the coding tables.
+ --*/
+ for (t = 0; t < nGroups; t++) cost[t] = 0;
+
+ if (nGroups == 6 && 50 == ge-gs+1) {
+ /*--- fast track the common case ---*/
+ register UInt32 cost01, cost23, cost45;
+ register UInt16 icv;
+ cost01 = cost23 = cost45 = 0;
+
+# define BZ_ITER(nn) \
+ icv = mtfv[gs+(nn)]; \
+ cost01 += s->len_pack[icv][0]; \
+ cost23 += s->len_pack[icv][1]; \
+ cost45 += s->len_pack[icv][2]; \
+
+ BZ_ITER(0); BZ_ITER(1); BZ_ITER(2); BZ_ITER(3); BZ_ITER(4);
+ BZ_ITER(5); BZ_ITER(6); BZ_ITER(7); BZ_ITER(8); BZ_ITER(9);
+ BZ_ITER(10); BZ_ITER(11); BZ_ITER(12); BZ_ITER(13); BZ_ITER(14);
+ BZ_ITER(15); BZ_ITER(16); BZ_ITER(17); BZ_ITER(18); BZ_ITER(19);
+ BZ_ITER(20); BZ_ITER(21); BZ_ITER(22); BZ_ITER(23); BZ_ITER(24);
+ BZ_ITER(25); BZ_ITER(26); BZ_ITER(27); BZ_ITER(28); BZ_ITER(29);
+ BZ_ITER(30); BZ_ITER(31); BZ_ITER(32); BZ_ITER(33); BZ_ITER(34);
+ BZ_ITER(35); BZ_ITER(36); BZ_ITER(37); BZ_ITER(38); BZ_ITER(39);
+ BZ_ITER(40); BZ_ITER(41); BZ_ITER(42); BZ_ITER(43); BZ_ITER(44);
+ BZ_ITER(45); BZ_ITER(46); BZ_ITER(47); BZ_ITER(48); BZ_ITER(49);
+
+# undef BZ_ITER
+
+ cost[0] = cost01 & 0xffff; cost[1] = cost01 >> 16;
+ cost[2] = cost23 & 0xffff; cost[3] = cost23 >> 16;
+ cost[4] = cost45 & 0xffff; cost[5] = cost45 >> 16;
+
+ } else {
+ /*--- slow version which correctly handles all situations ---*/
+ for (i = gs; i <= ge; i++) {
+ UInt16 icv = mtfv[i];
+ for (t = 0; t < nGroups; t++) cost[t] += s->len[t][icv];
+ }
+ }
+
+ /*--
+ Find the coding table which is best for this group,
+ and record its identity in the selector table.
+ --*/
+ bc = 999999999; bt = -1;
+ for (t = 0; t < nGroups; t++)
+ if (cost[t] < bc) { bc = cost[t]; bt = t; };
+ totc += bc;
+ fave[bt]++;
+ s->selector[nSelectors] = bt;
+ nSelectors++;
+
+ /*--
+ Increment the symbol frequencies for the selected table.
+ --*/
+ if (nGroups == 6 && 50 == ge-gs+1) {
+ /*--- fast track the common case ---*/
+
+# define BZ_ITUR(nn) s->rfreq[bt][ mtfv[gs+(nn)] ]++
+
+ BZ_ITUR(0); BZ_ITUR(1); BZ_ITUR(2); BZ_ITUR(3); BZ_ITUR(4);
+ BZ_ITUR(5); BZ_ITUR(6); BZ_ITUR(7); BZ_ITUR(8); BZ_ITUR(9);
+ BZ_ITUR(10); BZ_ITUR(11); BZ_ITUR(12); BZ_ITUR(13); BZ_ITUR(14);
+ BZ_ITUR(15); BZ_ITUR(16); BZ_ITUR(17); BZ_ITUR(18); BZ_ITUR(19);
+ BZ_ITUR(20); BZ_ITUR(21); BZ_ITUR(22); BZ_ITUR(23); BZ_ITUR(24);
+ BZ_ITUR(25); BZ_ITUR(26); BZ_ITUR(27); BZ_ITUR(28); BZ_ITUR(29);
+ BZ_ITUR(30); BZ_ITUR(31); BZ_ITUR(32); BZ_ITUR(33); BZ_ITUR(34);
+ BZ_ITUR(35); BZ_ITUR(36); BZ_ITUR(37); BZ_ITUR(38); BZ_ITUR(39);
+ BZ_ITUR(40); BZ_ITUR(41); BZ_ITUR(42); BZ_ITUR(43); BZ_ITUR(44);
+ BZ_ITUR(45); BZ_ITUR(46); BZ_ITUR(47); BZ_ITUR(48); BZ_ITUR(49);
+
+# undef BZ_ITUR
+
+ } else {
+ /*--- slow version which correctly handles all situations ---*/
+ for (i = gs; i <= ge; i++)
+ s->rfreq[bt][ mtfv[i] ]++;
+ }
+
+ gs = ge+1;
+ }
+ if (s->verbosity >= 3) {
+ VPrintf2 ( " pass %d: size is %d, grp uses are ",
+ iter+1, totc/8 );
+ for (t = 0; t < nGroups; t++)
+ VPrintf1 ( "%d ", fave[t] );
+ VPrintf0 ( "\n" );
+ }
+
+ /*--
+ Recompute the tables based on the accumulated frequencies.
+ --*/
+ /* maxLen was changed from 20 to 17 in bzip2-1.0.3. See
+ comment in huffman.c for details. */
+ for (t = 0; t < nGroups; t++)
+ BZ2_hbMakeCodeLengths ( &(s->len[t][0]), &(s->rfreq[t][0]),
+ alphaSize, 17 /*20*/ );
+ }
+
+
+ AssertH( nGroups < 8, 3002 );
+ AssertH( nSelectors < 32768 &&
+ nSelectors <= (2 + (900000 / BZ_G_SIZE)),
+ 3003 );
+
+
+ /*--- Compute MTF values for the selectors. ---*/
+ {
+ UChar pos[BZ_N_GROUPS], ll_i, tmp2, tmp;
+ for (i = 0; i < nGroups; i++) pos[i] = i;
+ for (i = 0; i < nSelectors; i++) {
+ ll_i = s->selector[i];
+ j = 0;
+ tmp = pos[j];
+ while ( ll_i != tmp ) {
+ j++;
+ tmp2 = tmp;
+ tmp = pos[j];
+ pos[j] = tmp2;
+ };
+ pos[0] = tmp;
+ s->selectorMtf[i] = j;
+ }
+ };
+
+ /*--- Assign actual codes for the tables. --*/
+ for (t = 0; t < nGroups; t++) {
+ minLen = 32;
+ maxLen = 0;
+ for (i = 0; i < alphaSize; i++) {
+ if (s->len[t][i] > maxLen) maxLen = s->len[t][i];
+ if (s->len[t][i] < minLen) minLen = s->len[t][i];
+ }
+ AssertH ( !(maxLen > 17 /*20*/ ), 3004 );
+ AssertH ( !(minLen < 1), 3005 );
+ BZ2_hbAssignCodes ( &(s->code[t][0]), &(s->len[t][0]),
+ minLen, maxLen, alphaSize );
+ }
+
+ /*--- Transmit the mapping table. ---*/
+ {
+ Bool inUse16[16];
+ for (i = 0; i < 16; i++) {
+ inUse16[i] = False;
+ for (j = 0; j < 16; j++)
+ if (s->inUse[i * 16 + j]) inUse16[i] = True;
+ }
+
+ nBytes = s->numZ;
+ for (i = 0; i < 16; i++)
+ if (inUse16[i]) bsW(s,1,1); else bsW(s,1,0);
+
+ for (i = 0; i < 16; i++)
+ if (inUse16[i])
+ for (j = 0; j < 16; j++) {
+ if (s->inUse[i * 16 + j]) bsW(s,1,1); else bsW(s,1,0);
+ }
+
+ if (s->verbosity >= 3)
+ VPrintf1( " bytes: mapping %d, ", s->numZ-nBytes );
+ }
+
+ /*--- Now the selectors. ---*/
+ nBytes = s->numZ;
+ bsW ( s, 3, nGroups );
+ bsW ( s, 15, nSelectors );
+ for (i = 0; i < nSelectors; i++) {
+ for (j = 0; j < s->selectorMtf[i]; j++) bsW(s,1,1);
+ bsW(s,1,0);
+ }
+ if (s->verbosity >= 3)
+ VPrintf1( "selectors %d, ", s->numZ-nBytes );
+
+ /*--- Now the coding tables. ---*/
+ nBytes = s->numZ;
+
+ for (t = 0; t < nGroups; t++) {
+ Int32 curr = s->len[t][0];
+ bsW ( s, 5, curr );
+ for (i = 0; i < alphaSize; i++) {
+ while (curr < s->len[t][i]) { bsW(s,2,2); curr++; /* 10 */ };
+ while (curr > s->len[t][i]) { bsW(s,2,3); curr--; /* 11 */ };
+ bsW ( s, 1, 0 );
+ }
+ }
+
+ if (s->verbosity >= 3)
+ VPrintf1 ( "code lengths %d, ", s->numZ-nBytes );
+
+ /*--- And finally, the block data proper ---*/
+ nBytes = s->numZ;
+ selCtr = 0;
+ gs = 0;
+ while (True) {
+ if (gs >= s->nMTF) break;
+ ge = gs + BZ_G_SIZE - 1;
+ if (ge >= s->nMTF) ge = s->nMTF-1;
+ AssertH ( s->selector[selCtr] < nGroups, 3006 );
+
+ if (nGroups == 6 && 50 == ge-gs+1) {
+ /*--- fast track the common case ---*/
+ UInt16 mtfv_i;
+ UChar* s_len_sel_selCtr
+ = &(s->len[s->selector[selCtr]][0]);
+ Int32* s_code_sel_selCtr
+ = &(s->code[s->selector[selCtr]][0]);
+
+# define BZ_ITAH(nn) \
+ mtfv_i = mtfv[gs+(nn)]; \
+ bsW ( s, \
+ s_len_sel_selCtr[mtfv_i], \
+ s_code_sel_selCtr[mtfv_i] )
+
+ BZ_ITAH(0); BZ_ITAH(1); BZ_ITAH(2); BZ_ITAH(3); BZ_ITAH(4);
+ BZ_ITAH(5); BZ_ITAH(6); BZ_ITAH(7); BZ_ITAH(8); BZ_ITAH(9);
+ BZ_ITAH(10); BZ_ITAH(11); BZ_ITAH(12); BZ_ITAH(13); BZ_ITAH(14);
+ BZ_ITAH(15); BZ_ITAH(16); BZ_ITAH(17); BZ_ITAH(18); BZ_ITAH(19);
+ BZ_ITAH(20); BZ_ITAH(21); BZ_ITAH(22); BZ_ITAH(23); BZ_ITAH(24);
+ BZ_ITAH(25); BZ_ITAH(26); BZ_ITAH(27); BZ_ITAH(28); BZ_ITAH(29);
+ BZ_ITAH(30); BZ_ITAH(31); BZ_ITAH(32); BZ_ITAH(33); BZ_ITAH(34);
+ BZ_ITAH(35); BZ_ITAH(36); BZ_ITAH(37); BZ_ITAH(38); BZ_ITAH(39);
+ BZ_ITAH(40); BZ_ITAH(41); BZ_ITAH(42); BZ_ITAH(43); BZ_ITAH(44);
+ BZ_ITAH(45); BZ_ITAH(46); BZ_ITAH(47); BZ_ITAH(48); BZ_ITAH(49);
+
+# undef BZ_ITAH
+
+ } else {
+ /*--- slow version which correctly handles all situations ---*/
+ for (i = gs; i <= ge; i++) {
+ bsW ( s,
+ s->len [s->selector[selCtr]] [mtfv[i]],
+ s->code [s->selector[selCtr]] [mtfv[i]] );
+ }
+ }
+
+
+ gs = ge+1;
+ selCtr++;
+ }
+ AssertH( selCtr == nSelectors, 3007 );
+
+ if (s->verbosity >= 3)
+ VPrintf1( "codes %d\n", s->numZ-nBytes );
+}
+
+
+/*---------------------------------------------------*/
+void BZ2_compressBlock ( EState* s, Bool is_last_block )
+{
+ if (s->nblock > 0) {
+
+ BZ_FINALISE_CRC ( s->blockCRC );
+ s->combinedCRC = (s->combinedCRC << 1) | (s->combinedCRC >> 31);
+ s->combinedCRC ^= s->blockCRC;
+ if (s->blockNo > 1) s->numZ = 0;
+
+ if (s->verbosity >= 2)
+ VPrintf4( " block %d: crc = 0x%08x, "
+ "combined CRC = 0x%08x, size = %d\n",
+ s->blockNo, s->blockCRC, s->combinedCRC, s->nblock );
+
+ BZ2_blockSort ( s );
+ }
+
+ s->zbits = (UChar*) (&((UChar*)s->arr2)[s->nblock]);
+
+ /*-- If this is the first block, create the stream header. --*/
+ if (s->blockNo == 1) {
+ BZ2_bsInitWrite ( s );
+ bsPutUChar ( s, BZ_HDR_B );
+ bsPutUChar ( s, BZ_HDR_Z );
+ bsPutUChar ( s, BZ_HDR_h );
+ bsPutUChar ( s, (UChar)(BZ_HDR_0 + s->blockSize100k) );
+ }
+
+ if (s->nblock > 0) {
+
+ bsPutUChar ( s, 0x31 ); bsPutUChar ( s, 0x41 );
+ bsPutUChar ( s, 0x59 ); bsPutUChar ( s, 0x26 );
+ bsPutUChar ( s, 0x53 ); bsPutUChar ( s, 0x59 );
+
+ /*-- Now the block's CRC, so it is in a known place. --*/
+ bsPutUInt32 ( s, s->blockCRC );
+
+ /*--
+ Now a single bit indicating (non-)randomisation.
+ As of version 0.9.5, we use a better sorting algorithm
+ which makes randomisation unnecessary. So always set
+ the randomised bit to 'no'. Of course, the decoder
+ still needs to be able to handle randomised blocks
+ so as to maintain backwards compatibility with
+ older versions of bzip2.
+ --*/
+ bsW(s,1,0);
+
+ bsW ( s, 24, s->origPtr );
+ generateMTFValues ( s );
+ sendMTFValues ( s );
+ }
+
+
+ /*-- If this is the last block, add the stream trailer. --*/
+ if (is_last_block) {
+
+ bsPutUChar ( s, 0x17 ); bsPutUChar ( s, 0x72 );
+ bsPutUChar ( s, 0x45 ); bsPutUChar ( s, 0x38 );
+ bsPutUChar ( s, 0x50 ); bsPutUChar ( s, 0x90 );
+ bsPutUInt32 ( s, s->combinedCRC );
+ if (s->verbosity >= 2)
+ VPrintf1( " final combined CRC = 0x%08x\n ", s->combinedCRC );
+ bsFinishWrite ( s );
+ }
+}
+
+
+/*-------------------------------------------------------------*/
+/*--- end compress.c ---*/
+/*-------------------------------------------------------------*/
+
+
+/*-------------------------------------------------------------*/
+/*--- Table for randomising repetitive blocks ---*/
+/*--- randtable.c ---*/
+/*-------------------------------------------------------------*/
+
+/*--
+ This file is a part of bzip2 and/or libbzip2, a program and
+ library for lossless, block-sorting data compression.
+
+ Copyright (C) 1996-2004 Julian R Seward. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ 1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+
+ 2. The origin of this software must not be misrepresented; you must
+ not claim that you wrote the original software. If you use this
+ software in a product, an acknowledgment in the product
+ documentation would be appreciated but is not required.
+
+ 3. Altered source versions must be plainly marked as such, and must
+ not be misrepresented as being the original software.
+
+ 4. The name of the author may not be used to endorse or promote
+ products derived from this software without specific prior written
+ permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+ Julian Seward, Cambridge, UK.
+ jseward@bzip.org
+ bzip2/libbzip2 version 1.0 of 21 March 2000
+
+ This program is based on (at least) the work of:
+ Mike Burrows
+ David Wheeler
+ Peter Fenwick
+ Alistair Moffat
+ Radford Neal
+ Ian H. Witten
+ Robert Sedgewick
+ Jon L. Bentley
+
+ For more information on these sources, see the manual.
+--*/
+
+
+
+
+/*---------------------------------------------*/
+Int32 BZ2_rNums[512] = {
+ 619, 720, 127, 481, 931, 816, 813, 233, 566, 247,
+ 985, 724, 205, 454, 863, 491, 741, 242, 949, 214,
+ 733, 859, 335, 708, 621, 574, 73, 654, 730, 472,
+ 419, 436, 278, 496, 867, 210, 399, 680, 480, 51,
+ 878, 465, 811, 169, 869, 675, 611, 697, 867, 561,
+ 862, 687, 507, 283, 482, 129, 807, 591, 733, 623,
+ 150, 238, 59, 379, 684, 877, 625, 169, 643, 105,
+ 170, 607, 520, 932, 727, 476, 693, 425, 174, 647,
+ 73, 122, 335, 530, 442, 853, 695, 249, 445, 515,
+ 909, 545, 703, 919, 874, 474, 882, 500, 594, 612,
+ 641, 801, 220, 162, 819, 984, 589, 513, 495, 799,
+ 161, 604, 958, 533, 221, 400, 386, 867, 600, 782,
+ 382, 596, 414, 171, 516, 375, 682, 485, 911, 276,
+ 98, 553, 163, 354, 666, 933, 424, 341, 533, 870,
+ 227, 730, 475, 186, 263, 647, 537, 686, 600, 224,
+ 469, 68, 770, 919, 190, 373, 294, 822, 808, 206,
+ 184, 943, 795, 384, 383, 461, 404, 758, 839, 887,
+ 715, 67, 618, 276, 204, 918, 873, 777, 604, 560,
+ 951, 160, 578, 722, 79, 804, 96, 409, 713, 940,
+ 652, 934, 970, 447, 318, 353, 859, 672, 112, 785,
+ 645, 863, 803, 350, 139, 93, 354, 99, 820, 908,
+ 609, 772, 154, 274, 580, 184, 79, 626, 630, 742,
+ 653, 282, 762, 623, 680, 81, 927, 626, 789, 125,
+ 411, 521, 938, 300, 821, 78, 343, 175, 128, 250,
+ 170, 774, 972, 275, 999, 639, 495, 78, 352, 126,
+ 857, 956, 358, 619, 580, 124, 737, 594, 701, 612,
+ 669, 112, 134, 694, 363, 992, 809, 743, 168, 974,
+ 944, 375, 748, 52, 600, 747, 642, 182, 862, 81,
+ 344, 805, 988, 739, 511, 655, 814, 334, 249, 515,
+ 897, 955, 664, 981, 649, 113, 974, 459, 893, 228,
+ 433, 837, 553, 268, 926, 240, 102, 654, 459, 51,
+ 686, 754, 806, 760, 493, 403, 415, 394, 687, 700,
+ 946, 670, 656, 610, 738, 392, 760, 799, 887, 653,
+ 978, 321, 576, 617, 626, 502, 894, 679, 243, 440,
+ 680, 879, 194, 572, 640, 724, 926, 56, 204, 700,
+ 707, 151, 457, 449, 797, 195, 791, 558, 945, 679,
+ 297, 59, 87, 824, 713, 663, 412, 693, 342, 606,
+ 134, 108, 571, 364, 631, 212, 174, 643, 304, 329,
+ 343, 97, 430, 751, 497, 314, 983, 374, 822, 928,
+ 140, 206, 73, 263, 980, 736, 876, 478, 430, 305,
+ 170, 514, 364, 692, 829, 82, 855, 953, 676, 246,
+ 369, 970, 294, 750, 807, 827, 150, 790, 288, 923,
+ 804, 378, 215, 828, 592, 281, 565, 555, 710, 82,
+ 896, 831, 547, 261, 524, 462, 293, 465, 502, 56,
+ 661, 821, 976, 991, 658, 869, 905, 758, 745, 193,
+ 768, 550, 608, 933, 378, 286, 215, 979, 792, 961,
+ 61, 688, 793, 644, 986, 403, 106, 366, 905, 644,
+ 372, 567, 466, 434, 645, 210, 389, 550, 919, 135,
+ 780, 773, 635, 389, 707, 100, 626, 958, 165, 504,
+ 920, 176, 193, 713, 857, 265, 203, 50, 668, 108,
+ 645, 990, 626, 197, 510, 357, 358, 850, 858, 364,
+ 936, 638
+};
+
+
+/*-------------------------------------------------------------*/
+/*--- end randtable.c ---*/
+/*-------------------------------------------------------------*/
+
+/*-------------------------------------------------------------*/
+/*--- Table for doing CRCs ---*/
+/*--- crctable.c ---*/
+/*-------------------------------------------------------------*/
+
+/*--
+ This file is a part of bzip2 and/or libbzip2, a program and
+ library for lossless, block-sorting data compression.
+
+ Copyright (C) 1996-2004 Julian R Seward. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ 1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+
+ 2. The origin of this software must not be misrepresented; you must
+ not claim that you wrote the original software. If you use this
+ software in a product, an acknowledgment in the product
+ documentation would be appreciated but is not required.
+
+ 3. Altered source versions must be plainly marked as such, and must
+ not be misrepresented as being the original software.
+
+ 4. The name of the author may not be used to endorse or promote
+ products derived from this software without specific prior written
+ permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+ Julian Seward, Cambridge, UK.
+ jseward@bzip.org
+ bzip2/libbzip2 version 1.0 of 21 March 2000
+
+ This program is based on (at least) the work of:
+ Mike Burrows
+ David Wheeler
+ Peter Fenwick
+ Alistair Moffat
+ Radford Neal
+ Ian H. Witten
+ Robert Sedgewick
+ Jon L. Bentley
+
+ For more information on these sources, see the manual.
+--*/
+
+
+
+
+
+/*--
+ I think this is an implementation of the AUTODIN-II,
+ Ethernet & FDDI 32-bit CRC standard. Vaguely derived
+ from code by Rob Warnock, in Section 51 of the
+ comp.compression FAQ.
+--*/
+
+UInt32 BZ2_crc32Table[256] = {
+
+ /*-- Ugly, innit? --*/
+
+ 0x00000000L, 0x04c11db7L, 0x09823b6eL, 0x0d4326d9L,
+ 0x130476dcL, 0x17c56b6bL, 0x1a864db2L, 0x1e475005L,
+ 0x2608edb8L, 0x22c9f00fL, 0x2f8ad6d6L, 0x2b4bcb61L,
+ 0x350c9b64L, 0x31cd86d3L, 0x3c8ea00aL, 0x384fbdbdL,
+ 0x4c11db70L, 0x48d0c6c7L, 0x4593e01eL, 0x4152fda9L,
+ 0x5f15adacL, 0x5bd4b01bL, 0x569796c2L, 0x52568b75L,
+ 0x6a1936c8L, 0x6ed82b7fL, 0x639b0da6L, 0x675a1011L,
+ 0x791d4014L, 0x7ddc5da3L, 0x709f7b7aL, 0x745e66cdL,
+ 0x9823b6e0L, 0x9ce2ab57L, 0x91a18d8eL, 0x95609039L,
+ 0x8b27c03cL, 0x8fe6dd8bL, 0x82a5fb52L, 0x8664e6e5L,
+ 0xbe2b5b58L, 0xbaea46efL, 0xb7a96036L, 0xb3687d81L,
+ 0xad2f2d84L, 0xa9ee3033L, 0xa4ad16eaL, 0xa06c0b5dL,
+ 0xd4326d90L, 0xd0f37027L, 0xddb056feL, 0xd9714b49L,
+ 0xc7361b4cL, 0xc3f706fbL, 0xceb42022L, 0xca753d95L,
+ 0xf23a8028L, 0xf6fb9d9fL, 0xfbb8bb46L, 0xff79a6f1L,
+ 0xe13ef6f4L, 0xe5ffeb43L, 0xe8bccd9aL, 0xec7dd02dL,
+ 0x34867077L, 0x30476dc0L, 0x3d044b19L, 0x39c556aeL,
+ 0x278206abL, 0x23431b1cL, 0x2e003dc5L, 0x2ac12072L,
+ 0x128e9dcfL, 0x164f8078L, 0x1b0ca6a1L, 0x1fcdbb16L,
+ 0x018aeb13L, 0x054bf6a4L, 0x0808d07dL, 0x0cc9cdcaL,
+ 0x7897ab07L, 0x7c56b6b0L, 0x71159069L, 0x75d48ddeL,
+ 0x6b93dddbL, 0x6f52c06cL, 0x6211e6b5L, 0x66d0fb02L,
+ 0x5e9f46bfL, 0x5a5e5b08L, 0x571d7dd1L, 0x53dc6066L,
+ 0x4d9b3063L, 0x495a2dd4L, 0x44190b0dL, 0x40d816baL,
+ 0xaca5c697L, 0xa864db20L, 0xa527fdf9L, 0xa1e6e04eL,
+ 0xbfa1b04bL, 0xbb60adfcL, 0xb6238b25L, 0xb2e29692L,
+ 0x8aad2b2fL, 0x8e6c3698L, 0x832f1041L, 0x87ee0df6L,
+ 0x99a95df3L, 0x9d684044L, 0x902b669dL, 0x94ea7b2aL,
+ 0xe0b41de7L, 0xe4750050L, 0xe9362689L, 0xedf73b3eL,
+ 0xf3b06b3bL, 0xf771768cL, 0xfa325055L, 0xfef34de2L,
+ 0xc6bcf05fL, 0xc27dede8L, 0xcf3ecb31L, 0xcbffd686L,
+ 0xd5b88683L, 0xd1799b34L, 0xdc3abdedL, 0xd8fba05aL,
+ 0x690ce0eeL, 0x6dcdfd59L, 0x608edb80L, 0x644fc637L,
+ 0x7a089632L, 0x7ec98b85L, 0x738aad5cL, 0x774bb0ebL,
+ 0x4f040d56L, 0x4bc510e1L, 0x46863638L, 0x42472b8fL,
+ 0x5c007b8aL, 0x58c1663dL, 0x558240e4L, 0x51435d53L,
+ 0x251d3b9eL, 0x21dc2629L, 0x2c9f00f0L, 0x285e1d47L,
+ 0x36194d42L, 0x32d850f5L, 0x3f9b762cL, 0x3b5a6b9bL,
+ 0x0315d626L, 0x07d4cb91L, 0x0a97ed48L, 0x0e56f0ffL,
+ 0x1011a0faL, 0x14d0bd4dL, 0x19939b94L, 0x1d528623L,
+ 0xf12f560eL, 0xf5ee4bb9L, 0xf8ad6d60L, 0xfc6c70d7L,
+ 0xe22b20d2L, 0xe6ea3d65L, 0xeba91bbcL, 0xef68060bL,
+ 0xd727bbb6L, 0xd3e6a601L, 0xdea580d8L, 0xda649d6fL,
+ 0xc423cd6aL, 0xc0e2d0ddL, 0xcda1f604L, 0xc960ebb3L,
+ 0xbd3e8d7eL, 0xb9ff90c9L, 0xb4bcb610L, 0xb07daba7L,
+ 0xae3afba2L, 0xaafbe615L, 0xa7b8c0ccL, 0xa379dd7bL,
+ 0x9b3660c6L, 0x9ff77d71L, 0x92b45ba8L, 0x9675461fL,
+ 0x8832161aL, 0x8cf30badL, 0x81b02d74L, 0x857130c3L,
+ 0x5d8a9099L, 0x594b8d2eL, 0x5408abf7L, 0x50c9b640L,
+ 0x4e8ee645L, 0x4a4ffbf2L, 0x470cdd2bL, 0x43cdc09cL,
+ 0x7b827d21L, 0x7f436096L, 0x7200464fL, 0x76c15bf8L,
+ 0x68860bfdL, 0x6c47164aL, 0x61043093L, 0x65c52d24L,
+ 0x119b4be9L, 0x155a565eL, 0x18197087L, 0x1cd86d30L,
+ 0x029f3d35L, 0x065e2082L, 0x0b1d065bL, 0x0fdc1becL,
+ 0x3793a651L, 0x3352bbe6L, 0x3e119d3fL, 0x3ad08088L,
+ 0x2497d08dL, 0x2056cd3aL, 0x2d15ebe3L, 0x29d4f654L,
+ 0xc5a92679L, 0xc1683bceL, 0xcc2b1d17L, 0xc8ea00a0L,
+ 0xd6ad50a5L, 0xd26c4d12L, 0xdf2f6bcbL, 0xdbee767cL,
+ 0xe3a1cbc1L, 0xe760d676L, 0xea23f0afL, 0xeee2ed18L,
+ 0xf0a5bd1dL, 0xf464a0aaL, 0xf9278673L, 0xfde69bc4L,
+ 0x89b8fd09L, 0x8d79e0beL, 0x803ac667L, 0x84fbdbd0L,
+ 0x9abc8bd5L, 0x9e7d9662L, 0x933eb0bbL, 0x97ffad0cL,
+ 0xafb010b1L, 0xab710d06L, 0xa6322bdfL, 0xa2f33668L,
+ 0xbcb4666dL, 0xb8757bdaL, 0xb5365d03L, 0xb1f740b4L
+};
+
+
+/*-------------------------------------------------------------*/
+/*--- end crctable.c ---*/
+/*-------------------------------------------------------------*/
+
+/*-------------------------------------------------------------*/
+/*--- Library top-level functions. ---*/
+/*--- bzlib.c ---*/
+/*-------------------------------------------------------------*/
+
+/*--
+ This file is a part of bzip2 and/or libbzip2, a program and
+ library for lossless, block-sorting data compression.
+
+ Copyright (C) 1996-2004 Julian R Seward. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ 1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+
+ 2. The origin of this software must not be misrepresented; you must
+ not claim that you wrote the original software. If you use this
+ software in a product, an acknowledgment in the product
+ documentation would be appreciated but is not required.
+
+ 3. Altered source versions must be plainly marked as such, and must
+ not be misrepresented as being the original software.
+
+ 4. The name of the author may not be used to endorse or promote
+ products derived from this software without specific prior written
+ permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+ Julian Seward, Cambridge, UK.
+ jseward@bzip.org
+ bzip2/libbzip2 version 1.0 of 21 March 2000
+
+ This program is based on (at least) the work of:
+ Mike Burrows
+ David Wheeler
+ Peter Fenwick
+ Alistair Moffat
+ Radford Neal
+ Ian H. Witten
+ Robert Sedgewick
+ Jon L. Bentley
+
+ For more information on these sources, see the manual.
+--*/
+
+/*--
+ CHANGES
+ ~~~~~~~
+ 0.9.0 -- original version.
+
+ 0.9.0a/b -- no changes in this file.
+
+ 0.9.0c
+ * made zero-length BZ_FLUSH work correctly in bzCompress().
+ * fixed bzWrite/bzRead to ignore zero-length requests.
+ * fixed bzread to correctly handle read requests after EOF.
+ * wrong parameter order in call to bzDecompressInit in
+ bzBuffToBuffDecompress. Fixed.
+--*/
+
+
+
+/*---------------------------------------------------*/
+/*--- Compression stuff ---*/
+/*---------------------------------------------------*/
+
+
+/*---------------------------------------------------*/
+void BZ2_bz__AssertH__fail ( int errcode )
+{
+ vexxx_printf("BZ2_bz__AssertH__fail(%d) called, exiting\n", errcode);
+ (*serviceFn)(0,0);
+}
+
+void bz_internal_error ( int errcode )
+{
+ vexxx_printf("bz_internal_error called, exiting\n", errcode);
+ (*serviceFn)(0,0);
+}
+
+/*---------------------------------------------------*/
+static
+int bz_config_ok ( void )
+{
+ if (sizeof(int) != 4) return 0;
+ if (sizeof(short) != 2) return 0;
+ if (sizeof(char) != 1) return 0;
+ return 1;
+}
+
+
+/*---------------------------------------------------*/
+static
+void* default_bzalloc ( void* opaque, Int32 items, Int32 size )
+{
+ void* v = (void*) (*serviceFn)(2, items * size );
+ return v;
+}
+
+static
+void default_bzfree ( void* opaque, void* addr )
+{
+ if (addr != NULL) (*serviceFn)( 3, (HWord)addr );
+}
+
+
+/*---------------------------------------------------*/
+static
+void prepare_new_block ( EState* s )
+{
+ Int32 i;
+ s->nblock = 0;
+ s->numZ = 0;
+ s->state_out_pos = 0;
+ BZ_INITIALISE_CRC ( s->blockCRC );
+ for (i = 0; i < 256; i++) s->inUse[i] = False;
+ s->blockNo++;
+}
+
+
+/*---------------------------------------------------*/
+static
+void init_RL ( EState* s )
+{
+ s->state_in_ch = 256;
+ s->state_in_len = 0;
+}
+
+
+static
+Bool isempty_RL ( EState* s )
+{
+ if (s->state_in_ch < 256 && s->state_in_len > 0)
+ return False; else
+ return True;
+}
+
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzCompressInit)
+ ( bz_stream* strm,
+ int blockSize100k,
+ int verbosity,
+ int workFactor )
+{
+ Int32 n;
+ EState* s;
+
+ if (!bz_config_ok()) return BZ_CONFIG_ERROR;
+
+ if (strm == NULL ||
+ blockSize100k < 1 || blockSize100k > 9 ||
+ workFactor < 0 || workFactor > 250)
+ return BZ_PARAM_ERROR;
+
+ if (workFactor == 0) workFactor = 30;
+ if (strm->bzalloc == NULL) strm->bzalloc = default_bzalloc;
+ if (strm->bzfree == NULL) strm->bzfree = default_bzfree;
+
+ s = BZALLOC( sizeof(EState) );
+ if (s == NULL) return BZ_MEM_ERROR;
+ s->strm = strm;
+
+ s->arr1 = NULL;
+ s->arr2 = NULL;
+ s->ftab = NULL;
+
+ n = 100000 * blockSize100k;
+ s->arr1 = BZALLOC( n * sizeof(UInt32) );
+ s->arr2 = BZALLOC( (n+BZ_N_OVERSHOOT) * sizeof(UInt32) );
+ s->ftab = BZALLOC( 65537 * sizeof(UInt32) );
+
+ if (s->arr1 == NULL || s->arr2 == NULL || s->ftab == NULL) {
+ if (s->arr1 != NULL) BZFREE(s->arr1);
+ if (s->arr2 != NULL) BZFREE(s->arr2);
+ if (s->ftab != NULL) BZFREE(s->ftab);
+ if (s != NULL) BZFREE(s);
+ return BZ_MEM_ERROR;
+ }
+
+ s->blockNo = 0;
+ s->state = BZ_S_INPUT;
+ s->mode = BZ_M_RUNNING;
+ s->combinedCRC = 0;
+ s->blockSize100k = blockSize100k;
+ s->nblockMAX = 100000 * blockSize100k - 19;
+ s->verbosity = verbosity;
+ s->workFactor = workFactor;
+
+ s->block = (UChar*)s->arr2;
+ s->mtfv = (UInt16*)s->arr1;
+ s->zbits = NULL;
+ s->ptr = (UInt32*)s->arr1;
+
+ strm->state = s;
+ strm->total_in_lo32 = 0;
+ strm->total_in_hi32 = 0;
+ strm->total_out_lo32 = 0;
+ strm->total_out_hi32 = 0;
+ init_RL ( s );
+ prepare_new_block ( s );
+ return BZ_OK;
+}
+
+
+/*---------------------------------------------------*/
+static
+void add_pair_to_block ( EState* s )
+{
+ Int32 i;
+ UChar ch = (UChar)(s->state_in_ch);
+ for (i = 0; i < s->state_in_len; i++) {
+ BZ_UPDATE_CRC( s->blockCRC, ch );
+ }
+ s->inUse[s->state_in_ch] = True;
+ switch (s->state_in_len) {
+ case 1:
+ s->block[s->nblock] = (UChar)ch; s->nblock++;
+ break;
+ case 2:
+ s->block[s->nblock] = (UChar)ch; s->nblock++;
+ s->block[s->nblock] = (UChar)ch; s->nblock++;
+ break;
+ case 3:
+ s->block[s->nblock] = (UChar)ch; s->nblock++;
+ s->block[s->nblock] = (UChar)ch; s->nblock++;
+ s->block[s->nblock] = (UChar)ch; s->nblock++;
+ break;
+ default:
+ s->inUse[s->state_in_len-4] = True;
+ s->block[s->nblock] = (UChar)ch; s->nblock++;
+ s->block[s->nblock] = (UChar)ch; s->nblock++;
+ s->block[s->nblock] = (UChar)ch; s->nblock++;
+ s->block[s->nblock] = (UChar)ch; s->nblock++;
+ s->block[s->nblock] = ((UChar)(s->state_in_len-4));
+ s->nblock++;
+ break;
+ }
+}
+
+
+/*---------------------------------------------------*/
+static
+void flush_RL ( EState* s )
+{
+ if (s->state_in_ch < 256) add_pair_to_block ( s );
+ init_RL ( s );
+}
+
+
+/*---------------------------------------------------*/
+#define ADD_CHAR_TO_BLOCK(zs,zchh0) \
+{ \
+ UInt32 zchh = (UInt32)(zchh0); \
+ /*-- fast track the common case --*/ \
+ if (zchh != zs->state_in_ch && \
+ zs->state_in_len == 1) { \
+ UChar ch = (UChar)(zs->state_in_ch); \
+ BZ_UPDATE_CRC( zs->blockCRC, ch ); \
+ zs->inUse[zs->state_in_ch] = True; \
+ zs->block[zs->nblock] = (UChar)ch; \
+ zs->nblock++; \
+ zs->state_in_ch = zchh; \
+ } \
+ else \
+ /*-- general, uncommon cases --*/ \
+ if (zchh != zs->state_in_ch || \
+ zs->state_in_len == 255) { \
+ if (zs->state_in_ch < 256) \
+ add_pair_to_block ( zs ); \
+ zs->state_in_ch = zchh; \
+ zs->state_in_len = 1; \
+ } else { \
+ zs->state_in_len++; \
+ } \
+}
+
+
+/*---------------------------------------------------*/
+static
+Bool copy_input_until_stop ( EState* s )
+{
+ Bool progress_in = False;
+
+ if (s->mode == BZ_M_RUNNING) {
+
+ /*-- fast track the common case --*/
+ while (True) {
+ /*-- block full? --*/
+ if (s->nblock >= s->nblockMAX) break;
+ /*-- no input? --*/
+ if (s->strm->avail_in == 0) break;
+ progress_in = True;
+ ADD_CHAR_TO_BLOCK ( s, (UInt32)(*((UChar*)(s->strm->next_in))) );
+ s->strm->next_in++;
+ s->strm->avail_in--;
+ s->strm->total_in_lo32++;
+ if (s->strm->total_in_lo32 == 0) s->strm->total_in_hi32++;
+ }
+
+ } else {
+
+ /*-- general, uncommon case --*/
+ while (True) {
+ /*-- block full? --*/
+ if (s->nblock >= s->nblockMAX) break;
+ /*-- no input? --*/
+ if (s->strm->avail_in == 0) break;
+ /*-- flush/finish end? --*/
+ if (s->avail_in_expect == 0) break;
+ progress_in = True;
+ ADD_CHAR_TO_BLOCK ( s, (UInt32)(*((UChar*)(s->strm->next_in))) );
+ s->strm->next_in++;
+ s->strm->avail_in--;
+ s->strm->total_in_lo32++;
+ if (s->strm->total_in_lo32 == 0) s->strm->total_in_hi32++;
+ s->avail_in_expect--;
+ }
+ }
+ return progress_in;
+}
+
+
+/*---------------------------------------------------*/
+static
+Bool copy_output_until_stop ( EState* s )
+{
+ Bool progress_out = False;
+
+ while (True) {
+
+ /*-- no output space? --*/
+ if (s->strm->avail_out == 0) break;
+
+ /*-- block done? --*/
+ if (s->state_out_pos >= s->numZ) break;
+
+ progress_out = True;
+ *(s->strm->next_out) = s->zbits[s->state_out_pos];
+ s->state_out_pos++;
+ s->strm->avail_out--;
+ s->strm->next_out++;
+ s->strm->total_out_lo32++;
+ if (s->strm->total_out_lo32 == 0) s->strm->total_out_hi32++;
+ }
+
+ return progress_out;
+}
+
+
+/*---------------------------------------------------*/
+static
+Bool handle_compress ( bz_stream* strm )
+{
+ Bool progress_in = False;
+ Bool progress_out = False;
+ EState* s = strm->state;
+
+ while (True) {
+
+ if (s->state == BZ_S_OUTPUT) {
+ progress_out |= copy_output_until_stop ( s );
+ if (s->state_out_pos < s->numZ) break;
+ if (s->mode == BZ_M_FINISHING &&
+ s->avail_in_expect == 0 &&
+ isempty_RL(s)) break;
+ prepare_new_block ( s );
+ s->state = BZ_S_INPUT;
+ if (s->mode == BZ_M_FLUSHING &&
+ s->avail_in_expect == 0 &&
+ isempty_RL(s)) break;
+ }
+
+ if (s->state == BZ_S_INPUT) {
+ progress_in |= copy_input_until_stop ( s );
+ if (s->mode != BZ_M_RUNNING && s->avail_in_expect == 0) {
+ flush_RL ( s );
+ BZ2_compressBlock ( s, (Bool)(s->mode == BZ_M_FINISHING) );
+ s->state = BZ_S_OUTPUT;
+ }
+ else
+ if (s->nblock >= s->nblockMAX) {
+ BZ2_compressBlock ( s, False );
+ s->state = BZ_S_OUTPUT;
+ }
+ else
+ if (s->strm->avail_in == 0) {
+ break;
+ }
+ }
+
+ }
+
+ return progress_in || progress_out;
+}
+
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzCompress) ( bz_stream *strm, int action )
+{
+ Bool progress;
+ EState* s;
+ if (strm == NULL) return BZ_PARAM_ERROR;
+ s = strm->state;
+ if (s == NULL) return BZ_PARAM_ERROR;
+ if (s->strm != strm) return BZ_PARAM_ERROR;
+
+ preswitch:
+ switch (s->mode) {
+
+ case BZ_M_IDLE:
+ return BZ_SEQUENCE_ERROR;
+
+ case BZ_M_RUNNING:
+ if (action == BZ_RUN) {
+ progress = handle_compress ( strm );
+ return progress ? BZ_RUN_OK : BZ_PARAM_ERROR;
+ }
+ else
+ if (action == BZ_FLUSH) {
+ s->avail_in_expect = strm->avail_in;
+ s->mode = BZ_M_FLUSHING;
+ goto preswitch;
+ }
+ else
+ if (action == BZ_FINISH) {
+ s->avail_in_expect = strm->avail_in;
+ s->mode = BZ_M_FINISHING;
+ goto preswitch;
+ }
+ else
+ return BZ_PARAM_ERROR;
+
+ case BZ_M_FLUSHING:
+ if (action != BZ_FLUSH) return BZ_SEQUENCE_ERROR;
+ if (s->avail_in_expect != s->strm->avail_in)
+ return BZ_SEQUENCE_ERROR;
+ progress = handle_compress ( strm );
+ if (s->avail_in_expect > 0 || !isempty_RL(s) ||
+ s->state_out_pos < s->numZ) return BZ_FLUSH_OK;
+ s->mode = BZ_M_RUNNING;
+ return BZ_RUN_OK;
+
+ case BZ_M_FINISHING:
+ if (action != BZ_FINISH) return BZ_SEQUENCE_ERROR;
+ if (s->avail_in_expect != s->strm->avail_in)
+ return BZ_SEQUENCE_ERROR;
+ progress = handle_compress ( strm );
+ if (!progress) return BZ_SEQUENCE_ERROR;
+ if (s->avail_in_expect > 0 || !isempty_RL(s) ||
+ s->state_out_pos < s->numZ) return BZ_FINISH_OK;
+ s->mode = BZ_M_IDLE;
+ return BZ_STREAM_END;
+ }
+ return BZ_OK; /*--not reached--*/
+}
+
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzCompressEnd) ( bz_stream *strm )
+{
+ EState* s;
+ if (strm == NULL) return BZ_PARAM_ERROR;
+ s = strm->state;
+ if (s == NULL) return BZ_PARAM_ERROR;
+ if (s->strm != strm) return BZ_PARAM_ERROR;
+
+ if (s->arr1 != NULL) BZFREE(s->arr1);
+ if (s->arr2 != NULL) BZFREE(s->arr2);
+ if (s->ftab != NULL) BZFREE(s->ftab);
+ BZFREE(strm->state);
+
+ strm->state = NULL;
+
+ return BZ_OK;
+}
+
+
+/*---------------------------------------------------*/
+/*--- Decompression stuff ---*/
+/*---------------------------------------------------*/
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzDecompressInit)
+ ( bz_stream* strm,
+ int verbosity,
+ int small )
+{
+ DState* s;
+
+ if (!bz_config_ok()) return BZ_CONFIG_ERROR;
+
+ if (strm == NULL) return BZ_PARAM_ERROR;
+ if (small != 0 && small != 1) return BZ_PARAM_ERROR;
+ if (verbosity < 0 || verbosity > 4) return BZ_PARAM_ERROR;
+
+ if (strm->bzalloc == NULL) strm->bzalloc = default_bzalloc;
+ if (strm->bzfree == NULL) strm->bzfree = default_bzfree;
+
+ s = BZALLOC( sizeof(DState) );
+ if (s == NULL) return BZ_MEM_ERROR;
+ s->strm = strm;
+ strm->state = s;
+ s->state = BZ_X_MAGIC_1;
+ s->bsLive = 0;
+ s->bsBuff = 0;
+ s->calculatedCombinedCRC = 0;
+ strm->total_in_lo32 = 0;
+ strm->total_in_hi32 = 0;
+ strm->total_out_lo32 = 0;
+ strm->total_out_hi32 = 0;
+ s->smallDecompress = (Bool)small;
+ s->ll4 = NULL;
+ s->ll16 = NULL;
+ s->tt = NULL;
+ s->currBlockNo = 0;
+ s->verbosity = verbosity;
+
+ return BZ_OK;
+}
+
+
+/*---------------------------------------------------*/
+/* Return True iff data corruption is discovered.
+ Returns False if there is no problem.
+*/
+static
+Bool unRLE_obuf_to_output_FAST ( DState* s )
+{
+ UChar k1;
+
+ if (s->blockRandomised) {
+
+ while (True) {
+ /* try to finish existing run */
+ while (True) {
+ if (s->strm->avail_out == 0) return False;
+ if (s->state_out_len == 0) break;
+ *( (UChar*)(s->strm->next_out) ) = s->state_out_ch;
+ BZ_UPDATE_CRC ( s->calculatedBlockCRC, s->state_out_ch );
+ s->state_out_len--;
+ s->strm->next_out++;
+ s->strm->avail_out--;
+ s->strm->total_out_lo32++;
+ if (s->strm->total_out_lo32 == 0) s->strm->total_out_hi32++;
+ }
+
+ /* can a new run be started? */
+ if (s->nblock_used == s->save_nblock+1) return False;
+
+ /* Only caused by corrupt data stream? */
+ if (s->nblock_used > s->save_nblock+1)
+ return True;
+
+ s->state_out_len = 1;
+ s->state_out_ch = s->k0;
+ BZ_GET_FAST(k1); BZ_RAND_UPD_MASK;
+ k1 ^= BZ_RAND_MASK; s->nblock_used++;
+ if (s->nblock_used == s->save_nblock+1) continue;
+ if (k1 != s->k0) { s->k0 = k1; continue; };
+
+ s->state_out_len = 2;
+ BZ_GET_FAST(k1); BZ_RAND_UPD_MASK;
+ k1 ^= BZ_RAND_MASK; s->nblock_used++;
+ if (s->nblock_used == s->save_nblock+1) continue;
+ if (k1 != s->k0) { s->k0 = k1; continue; };
+
+ s->state_out_len = 3;
+ BZ_GET_FAST(k1); BZ_RAND_UPD_MASK;
+ k1 ^= BZ_RAND_MASK; s->nblock_used++;
+ if (s->nblock_used == s->save_nblock+1) continue;
+ if (k1 != s->k0) { s->k0 = k1; continue; };
+
+ BZ_GET_FAST(k1); BZ_RAND_UPD_MASK;
+ k1 ^= BZ_RAND_MASK; s->nblock_used++;
+ s->state_out_len = ((Int32)k1) + 4;
+ BZ_GET_FAST(s->k0); BZ_RAND_UPD_MASK;
+ s->k0 ^= BZ_RAND_MASK; s->nblock_used++;
+ }
+
+ } else {
+
+ /* restore */
+ UInt32 c_calculatedBlockCRC = s->calculatedBlockCRC;
+ UChar c_state_out_ch = s->state_out_ch;
+ Int32 c_state_out_len = s->state_out_len;
+ Int32 c_nblock_used = s->nblock_used;
+ Int32 c_k0 = s->k0;
+ UInt32* c_tt = s->tt;
+ UInt32 c_tPos = s->tPos;
+ char* cs_next_out = s->strm->next_out;
+ unsigned int cs_avail_out = s->strm->avail_out;
+ /* end restore */
+
+ UInt32 avail_out_INIT = cs_avail_out;
+ Int32 s_save_nblockPP = s->save_nblock+1;
+ unsigned int total_out_lo32_old;
+
+ while (True) {
+
+ /* try to finish existing run */
+ if (c_state_out_len > 0) {
+ while (True) {
+ if (cs_avail_out == 0) goto return_notr;
+ if (c_state_out_len == 1) break;
+ *( (UChar*)(cs_next_out) ) = c_state_out_ch;
+ BZ_UPDATE_CRC ( c_calculatedBlockCRC, c_state_out_ch );
+ c_state_out_len--;
+ cs_next_out++;
+ cs_avail_out--;
+ }
+ s_state_out_len_eq_one:
+ {
+ if (cs_avail_out == 0) {
+ c_state_out_len = 1; goto return_notr;
+ };
+ *( (UChar*)(cs_next_out) ) = c_state_out_ch;
+ BZ_UPDATE_CRC ( c_calculatedBlockCRC, c_state_out_ch );
+ cs_next_out++;
+ cs_avail_out--;
+ }
+ }
+ /* Only caused by corrupt data stream? */
+ if (c_nblock_used > s_save_nblockPP)
+ return True;
+
+ /* can a new run be started? */
+ if (c_nblock_used == s_save_nblockPP) {
+ c_state_out_len = 0; goto return_notr;
+ };
+ c_state_out_ch = c_k0;
+ BZ_GET_FAST_C(k1); c_nblock_used++;
+ if (k1 != c_k0) {
+ c_k0 = k1; goto s_state_out_len_eq_one;
+ };
+ if (c_nblock_used == s_save_nblockPP)
+ goto s_state_out_len_eq_one;
+
+ c_state_out_len = 2;
+ BZ_GET_FAST_C(k1); c_nblock_used++;
+ if (c_nblock_used == s_save_nblockPP) continue;
+ if (k1 != c_k0) { c_k0 = k1; continue; };
+
+ c_state_out_len = 3;
+ BZ_GET_FAST_C(k1); c_nblock_used++;
+ if (c_nblock_used == s_save_nblockPP) continue;
+ if (k1 != c_k0) { c_k0 = k1; continue; };
+
+ BZ_GET_FAST_C(k1); c_nblock_used++;
+ c_state_out_len = ((Int32)k1) + 4;
+ BZ_GET_FAST_C(c_k0); c_nblock_used++;
+ }
+
+ return_notr:
+ total_out_lo32_old = s->strm->total_out_lo32;
+ s->strm->total_out_lo32 += (avail_out_INIT - cs_avail_out);
+ if (s->strm->total_out_lo32 < total_out_lo32_old)
+ s->strm->total_out_hi32++;
+
+ /* save */
+ s->calculatedBlockCRC = c_calculatedBlockCRC;
+ s->state_out_ch = c_state_out_ch;
+ s->state_out_len = c_state_out_len;
+ s->nblock_used = c_nblock_used;
+ s->k0 = c_k0;
+ s->tt = c_tt;
+ s->tPos = c_tPos;
+ s->strm->next_out = cs_next_out;
+ s->strm->avail_out = cs_avail_out;
+ /* end save */
+ }
+ return False;
+}
+
+
+
+/*---------------------------------------------------*/
+/* Return True iff data corruption is discovered.
+ Returns False if there is no problem.
+*/
+static
+Bool unRLE_obuf_to_output_SMALL ( DState* s )
+{
+ UChar k1;
+
+ if (s->blockRandomised) {
+
+ while (True) {
+ /* try to finish existing run */
+ while (True) {
+ if (s->strm->avail_out == 0) return False;
+ if (s->state_out_len == 0) break;
+ *( (UChar*)(s->strm->next_out) ) = s->state_out_ch;
+ BZ_UPDATE_CRC ( s->calculatedBlockCRC, s->state_out_ch );
+ s->state_out_len--;
+ s->strm->next_out++;
+ s->strm->avail_out--;
+ s->strm->total_out_lo32++;
+ if (s->strm->total_out_lo32 == 0) s->strm->total_out_hi32++;
+ }
+
+ /* can a new run be started? */
+ if (s->nblock_used == s->save_nblock+1) return False;
+
+ /* Only caused by corrupt data stream? */
+ if (s->nblock_used > s->save_nblock+1)
+ return True;
+
+ s->state_out_len = 1;
+ s->state_out_ch = s->k0;
+ BZ_GET_SMALL(k1); BZ_RAND_UPD_MASK;
+ k1 ^= BZ_RAND_MASK; s->nblock_used++;
+ if (s->nblock_used == s->save_nblock+1) continue;
+ if (k1 != s->k0) { s->k0 = k1; continue; };
+
+ s->state_out_len = 2;
+ BZ_GET_SMALL(k1); BZ_RAND_UPD_MASK;
+ k1 ^= BZ_RAND_MASK; s->nblock_used++;
+ if (s->nblock_used == s->save_nblock+1) continue;
+ if (k1 != s->k0) { s->k0 = k1; continue; };
+
+ s->state_out_len = 3;
+ BZ_GET_SMALL(k1); BZ_RAND_UPD_MASK;
+ k1 ^= BZ_RAND_MASK; s->nblock_used++;
+ if (s->nblock_used == s->save_nblock+1) continue;
+ if (k1 != s->k0) { s->k0 = k1; continue; };
+
+ BZ_GET_SMALL(k1); BZ_RAND_UPD_MASK;
+ k1 ^= BZ_RAND_MASK; s->nblock_used++;
+ s->state_out_len = ((Int32)k1) + 4;
+ BZ_GET_SMALL(s->k0); BZ_RAND_UPD_MASK;
+ s->k0 ^= BZ_RAND_MASK; s->nblock_used++;
+ }
+
+ } else {
+
+ while (True) {
+ /* try to finish existing run */
+ while (True) {
+ if (s->strm->avail_out == 0) return False;
+ if (s->state_out_len == 0) break;
+ *( (UChar*)(s->strm->next_out) ) = s->state_out_ch;
+ BZ_UPDATE_CRC ( s->calculatedBlockCRC, s->state_out_ch );
+ s->state_out_len--;
+ s->strm->next_out++;
+ s->strm->avail_out--;
+ s->strm->total_out_lo32++;
+ if (s->strm->total_out_lo32 == 0) s->strm->total_out_hi32++;
+ }
+
+ /* can a new run be started? */
+ if (s->nblock_used == s->save_nblock+1) return False;
+
+ /* Only caused by corrupt data stream? */
+ if (s->nblock_used > s->save_nblock+1)
+ return True;
+
+ s->state_out_len = 1;
+ s->state_out_ch = s->k0;
+ BZ_GET_SMALL(k1); s->nblock_used++;
+ if (s->nblock_used == s->save_nblock+1) continue;
+ if (k1 != s->k0) { s->k0 = k1; continue; };
+
+ s->state_out_len = 2;
+ BZ_GET_SMALL(k1); s->nblock_used++;
+ if (s->nblock_used == s->save_nblock+1) continue;
+ if (k1 != s->k0) { s->k0 = k1; continue; };
+
+ s->state_out_len = 3;
+ BZ_GET_SMALL(k1); s->nblock_used++;
+ if (s->nblock_used == s->save_nblock+1) continue;
+ if (k1 != s->k0) { s->k0 = k1; continue; };
+
+ BZ_GET_SMALL(k1); s->nblock_used++;
+ s->state_out_len = ((Int32)k1) + 4;
+ BZ_GET_SMALL(s->k0); s->nblock_used++;
+ }
+
+ }
+}
+
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzDecompress) ( bz_stream *strm )
+{
+ Bool corrupt;
+ DState* s;
+ if (strm == NULL) return BZ_PARAM_ERROR;
+ s = strm->state;
+ if (s == NULL) return BZ_PARAM_ERROR;
+ if (s->strm != strm) return BZ_PARAM_ERROR;
+
+ while (True) {
+ if (s->state == BZ_X_IDLE) return BZ_SEQUENCE_ERROR;
+ if (s->state == BZ_X_OUTPUT) {
+ if (s->smallDecompress)
+ corrupt = unRLE_obuf_to_output_SMALL ( s ); else
+ corrupt = unRLE_obuf_to_output_FAST ( s );
+ if (corrupt) return BZ_DATA_ERROR;
+ if (s->nblock_used == s->save_nblock+1 && s->state_out_len == 0) {
+ BZ_FINALISE_CRC ( s->calculatedBlockCRC );
+ if (s->verbosity >= 3)
+ VPrintf2 ( " {0x%08x, 0x%08x}", s->storedBlockCRC,
+ s->calculatedBlockCRC );
+ if (s->verbosity >= 2) VPrintf0 ( "]" );
+ if (s->calculatedBlockCRC != s->storedBlockCRC)
+ return BZ_DATA_ERROR;
+ s->calculatedCombinedCRC
+ = (s->calculatedCombinedCRC << 1) |
+ (s->calculatedCombinedCRC >> 31);
+ s->calculatedCombinedCRC ^= s->calculatedBlockCRC;
+ s->state = BZ_X_BLKHDR_1;
+ } else {
+ return BZ_OK;
+ }
+ }
+ if (s->state >= BZ_X_MAGIC_1) {
+ Int32 r = BZ2_decompress ( s );
+ if (r == BZ_STREAM_END) {
+ if (s->verbosity >= 3)
+ VPrintf2 ( "\n combined CRCs: stored = 0x%08x, computed = 0x%08x",
+ s->storedCombinedCRC, s->calculatedCombinedCRC );
+ if (s->calculatedCombinedCRC != s->storedCombinedCRC)
+ return BZ_DATA_ERROR;
+ return r;
+ }
+ if (s->state != BZ_X_OUTPUT) return r;
+ }
+ }
+
+ AssertH ( 0, 6001 );
+
+ return 0; /*NOTREACHED*/
+}
+
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzDecompressEnd) ( bz_stream *strm )
+{
+ DState* s;
+ if (strm == NULL) return BZ_PARAM_ERROR;
+ s = strm->state;
+ if (s == NULL) return BZ_PARAM_ERROR;
+ if (s->strm != strm) return BZ_PARAM_ERROR;
+
+ if (s->tt != NULL) BZFREE(s->tt);
+ if (s->ll16 != NULL) BZFREE(s->ll16);
+ if (s->ll4 != NULL) BZFREE(s->ll4);
+
+ BZFREE(strm->state);
+ strm->state = NULL;
+
+ return BZ_OK;
+}
+
+
+#ifndef BZ_NO_STDIO
+/*---------------------------------------------------*/
+/*--- File I/O stuff ---*/
+/*---------------------------------------------------*/
+
+#define BZ_SETERR(eee) \
+{ \
+ if (bzerror != NULL) *bzerror = eee; \
+ if (bzf != NULL) bzf->lastErr = eee; \
+}
+
+typedef
+ struct {
+ FILE* handle;
+ Char buf[BZ_MAX_UNUSED];
+ Int32 bufN;
+ Bool writing;
+ bz_stream strm;
+ Int32 lastErr;
+ Bool initialisedOk;
+ }
+ bzFile;
+
+
+/*---------------------------------------------*/
+static Bool myfeof ( FILE* f )
+{
+ Int32 c = fgetc ( f );
+ if (c == EOF) return True;
+ ungetc ( c, f );
+ return False;
+}
+
+
+/*---------------------------------------------------*/
+BZFILE* BZ_API(BZ2_bzWriteOpen)
+ ( int* bzerror,
+ FILE* f,
+ int blockSize100k,
+ int verbosity,
+ int workFactor )
+{
+ Int32 ret;
+ bzFile* bzf = NULL;
+
+ BZ_SETERR(BZ_OK);
+
+ if (f == NULL ||
+ (blockSize100k < 1 || blockSize100k > 9) ||
+ (workFactor < 0 || workFactor > 250) ||
+ (verbosity < 0 || verbosity > 4))
+ { BZ_SETERR(BZ_PARAM_ERROR); return NULL; };
+
+ if (ferror(f))
+ { BZ_SETERR(BZ_IO_ERROR); return NULL; };
+
+ bzf = malloc ( sizeof(bzFile) );
+ if (bzf == NULL)
+ { BZ_SETERR(BZ_MEM_ERROR); return NULL; };
+
+ BZ_SETERR(BZ_OK);
+ bzf->initialisedOk = False;
+ bzf->bufN = 0;
+ bzf->handle = f;
+ bzf->writing = True;
+ bzf->strm.bzalloc = NULL;
+ bzf->strm.bzfree = NULL;
+ bzf->strm.opaque = NULL;
+
+ if (workFactor == 0) workFactor = 30;
+ ret = BZ2_bzCompressInit ( &(bzf->strm), blockSize100k,
+ verbosity, workFactor );
+ if (ret != BZ_OK)
+ { BZ_SETERR(ret); free(bzf); return NULL; };
+
+ bzf->strm.avail_in = 0;
+ bzf->initialisedOk = True;
+ return bzf;
+}
+
+
+
+/*---------------------------------------------------*/
+void BZ_API(BZ2_bzWrite)
+ ( int* bzerror,
+ BZFILE* b,
+ void* buf,
+ int len )
+{
+ Int32 n, n2, ret;
+ bzFile* bzf = (bzFile*)b;
+
+ BZ_SETERR(BZ_OK);
+ if (bzf == NULL || buf == NULL || len < 0)
+ { BZ_SETERR(BZ_PARAM_ERROR); return; };
+ if (!(bzf->writing))
+ { BZ_SETERR(BZ_SEQUENCE_ERROR); return; };
+ if (ferror(bzf->handle))
+ { BZ_SETERR(BZ_IO_ERROR); return; };
+
+ if (len == 0)
+ { BZ_SETERR(BZ_OK); return; };
+
+ bzf->strm.avail_in = len;
+ bzf->strm.next_in = buf;
+
+ while (True) {
+ bzf->strm.avail_out = BZ_MAX_UNUSED;
+ bzf->strm.next_out = bzf->buf;
+ ret = BZ2_bzCompress ( &(bzf->strm), BZ_RUN );
+ if (ret != BZ_RUN_OK)
+ { BZ_SETERR(ret); return; };
+
+ if (bzf->strm.avail_out < BZ_MAX_UNUSED) {
+ n = BZ_MAX_UNUSED - bzf->strm.avail_out;
+ n2 = fwrite ( (void*)(bzf->buf), sizeof(UChar),
+ n, bzf->handle );
+ if (n != n2 || ferror(bzf->handle))
+ { BZ_SETERR(BZ_IO_ERROR); return; };
+ }
+
+ if (bzf->strm.avail_in == 0)
+ { BZ_SETERR(BZ_OK); return; };
+ }
+}
+
+
+/*---------------------------------------------------*/
+void BZ_API(BZ2_bzWriteClose)
+ ( int* bzerror,
+ BZFILE* b,
+ int abandon,
+ unsigned int* nbytes_in,
+ unsigned int* nbytes_out )
+{
+ BZ2_bzWriteClose64 ( bzerror, b, abandon,
+ nbytes_in, NULL, nbytes_out, NULL );
+}
+
+
+void BZ_API(BZ2_bzWriteClose64)
+ ( int* bzerror,
+ BZFILE* b,
+ int abandon,
+ unsigned int* nbytes_in_lo32,
+ unsigned int* nbytes_in_hi32,
+ unsigned int* nbytes_out_lo32,
+ unsigned int* nbytes_out_hi32 )
+{
+ Int32 n, n2, ret;
+ bzFile* bzf = (bzFile*)b;
+
+ if (bzf == NULL)
+ { BZ_SETERR(BZ_OK); return; };
+ if (!(bzf->writing))
+ { BZ_SETERR(BZ_SEQUENCE_ERROR); return; };
+ if (ferror(bzf->handle))
+ { BZ_SETERR(BZ_IO_ERROR); return; };
+
+ if (nbytes_in_lo32 != NULL) *nbytes_in_lo32 = 0;
+ if (nbytes_in_hi32 != NULL) *nbytes_in_hi32 = 0;
+ if (nbytes_out_lo32 != NULL) *nbytes_out_lo32 = 0;
+ if (nbytes_out_hi32 != NULL) *nbytes_out_hi32 = 0;
+
+ if ((!abandon) && bzf->lastErr == BZ_OK) {
+ while (True) {
+ bzf->strm.avail_out = BZ_MAX_UNUSED;
+ bzf->strm.next_out = bzf->buf;
+ ret = BZ2_bzCompress ( &(bzf->strm), BZ_FINISH );
+ if (ret != BZ_FINISH_OK && ret != BZ_STREAM_END)
+ { BZ_SETERR(ret); return; };
+
+ if (bzf->strm.avail_out < BZ_MAX_UNUSED) {
+ n = BZ_MAX_UNUSED - bzf->strm.avail_out;
+ n2 = fwrite ( (void*)(bzf->buf), sizeof(UChar),
+ n, bzf->handle );
+ if (n != n2 || ferror(bzf->handle))
+ { BZ_SETERR(BZ_IO_ERROR); return; };
+ }
+
+ if (ret == BZ_STREAM_END) break;
+ }
+ }
+
+ if ( !abandon && !ferror ( bzf->handle ) ) {
+ fflush ( bzf->handle );
+ if (ferror(bzf->handle))
+ { BZ_SETERR(BZ_IO_ERROR); return; };
+ }
+
+ if (nbytes_in_lo32 != NULL)
+ *nbytes_in_lo32 = bzf->strm.total_in_lo32;
+ if (nbytes_in_hi32 != NULL)
+ *nbytes_in_hi32 = bzf->strm.total_in_hi32;
+ if (nbytes_out_lo32 != NULL)
+ *nbytes_out_lo32 = bzf->strm.total_out_lo32;
+ if (nbytes_out_hi32 != NULL)
+ *nbytes_out_hi32 = bzf->strm.total_out_hi32;
+
+ BZ_SETERR(BZ_OK);
+ BZ2_bzCompressEnd ( &(bzf->strm) );
+ free ( bzf );
+}
+
+
+/*---------------------------------------------------*/
+BZFILE* BZ_API(BZ2_bzReadOpen)
+ ( int* bzerror,
+ FILE* f,
+ int verbosity,
+ int small,
+ void* unused,
+ int nUnused )
+{
+ bzFile* bzf = NULL;
+ int ret;
+
+ BZ_SETERR(BZ_OK);
+
+ if (f == NULL ||
+ (small != 0 && small != 1) ||
+ (verbosity < 0 || verbosity > 4) ||
+ (unused == NULL && nUnused != 0) ||
+ (unused != NULL && (nUnused < 0 || nUnused > BZ_MAX_UNUSED)))
+ { BZ_SETERR(BZ_PARAM_ERROR); return NULL; };
+
+ if (ferror(f))
+ { BZ_SETERR(BZ_IO_ERROR); return NULL; };
+
+ bzf = malloc ( sizeof(bzFile) );
+ if (bzf == NULL)
+ { BZ_SETERR(BZ_MEM_ERROR); return NULL; };
+
+ BZ_SETERR(BZ_OK);
+
+ bzf->initialisedOk = False;
+ bzf->handle = f;
+ bzf->bufN = 0;
+ bzf->writing = False;
+ bzf->strm.bzalloc = NULL;
+ bzf->strm.bzfree = NULL;
+ bzf->strm.opaque = NULL;
+
+ while (nUnused > 0) {
+ bzf->buf[bzf->bufN] = *((UChar*)(unused)); bzf->bufN++;
+ unused = ((void*)( 1 + ((UChar*)(unused)) ));
+ nUnused--;
+ }
+
+ ret = BZ2_bzDecompressInit ( &(bzf->strm), verbosity, small );
+ if (ret != BZ_OK)
+ { BZ_SETERR(ret); free(bzf); return NULL; };
+
+ bzf->strm.avail_in = bzf->bufN;
+ bzf->strm.next_in = bzf->buf;
+
+ bzf->initialisedOk = True;
+ return bzf;
+}
+
+
+/*---------------------------------------------------*/
+void BZ_API(BZ2_bzReadClose) ( int *bzerror, BZFILE *b )
+{
+ bzFile* bzf = (bzFile*)b;
+
+ BZ_SETERR(BZ_OK);
+ if (bzf == NULL)
+ { BZ_SETERR(BZ_OK); return; };
+
+ if (bzf->writing)
+ { BZ_SETERR(BZ_SEQUENCE_ERROR); return; };
+
+ if (bzf->initialisedOk)
+ (void)BZ2_bzDecompressEnd ( &(bzf->strm) );
+ free ( bzf );
+}
+
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzRead)
+ ( int* bzerror,
+ BZFILE* b,
+ void* buf,
+ int len )
+{
+ Int32 n, ret;
+ bzFile* bzf = (bzFile*)b;
+
+ BZ_SETERR(BZ_OK);
+
+ if (bzf == NULL || buf == NULL || len < 0)
+ { BZ_SETERR(BZ_PARAM_ERROR); return 0; };
+
+ if (bzf->writing)
+ { BZ_SETERR(BZ_SEQUENCE_ERROR); return 0; };
+
+ if (len == 0)
+ { BZ_SETERR(BZ_OK); return 0; };
+
+ bzf->strm.avail_out = len;
+ bzf->strm.next_out = buf;
+
+ while (True) {
+
+ if (ferror(bzf->handle))
+ { BZ_SETERR(BZ_IO_ERROR); return 0; };
+
+ if (bzf->strm.avail_in == 0 && !myfeof(bzf->handle)) {
+ n = fread ( bzf->buf, sizeof(UChar),
+ BZ_MAX_UNUSED, bzf->handle );
+ if (ferror(bzf->handle))
+ { BZ_SETERR(BZ_IO_ERROR); return 0; };
+ bzf->bufN = n;
+ bzf->strm.avail_in = bzf->bufN;
+ bzf->strm.next_in = bzf->buf;
+ }
+
+ ret = BZ2_bzDecompress ( &(bzf->strm) );
+
+ if (ret != BZ_OK && ret != BZ_STREAM_END)
+ { BZ_SETERR(ret); return 0; };
+
+ if (ret == BZ_OK && myfeof(bzf->handle) &&
+ bzf->strm.avail_in == 0 && bzf->strm.avail_out > 0)
+ { BZ_SETERR(BZ_UNEXPECTED_EOF); return 0; };
+
+ if (ret == BZ_STREAM_END)
+ { BZ_SETERR(BZ_STREAM_END);
+ return len - bzf->strm.avail_out; };
+ if (bzf->strm.avail_out == 0)
+ { BZ_SETERR(BZ_OK); return len; };
+
+ }
+
+ return 0; /*not reached*/
+}
+
+
+/*---------------------------------------------------*/
+void BZ_API(BZ2_bzReadGetUnused)
+ ( int* bzerror,
+ BZFILE* b,
+ void** unused,
+ int* nUnused )
+{
+ bzFile* bzf = (bzFile*)b;
+ if (bzf == NULL)
+ { BZ_SETERR(BZ_PARAM_ERROR); return; };
+ if (bzf->lastErr != BZ_STREAM_END)
+ { BZ_SETERR(BZ_SEQUENCE_ERROR); return; };
+ if (unused == NULL || nUnused == NULL)
+ { BZ_SETERR(BZ_PARAM_ERROR); return; };
+
+ BZ_SETERR(BZ_OK);
+ *nUnused = bzf->strm.avail_in;
+ *unused = bzf->strm.next_in;
+}
+#endif
+
+
+/*---------------------------------------------------*/
+/*--- Misc convenience stuff ---*/
+/*---------------------------------------------------*/
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzBuffToBuffCompress)
+ ( char* dest,
+ unsigned int* destLen,
+ char* source,
+ unsigned int sourceLen,
+ int blockSize100k,
+ int verbosity,
+ int workFactor )
+{
+ bz_stream strm;
+ int ret;
+
+ if (dest == NULL || destLen == NULL ||
+ source == NULL ||
+ blockSize100k < 1 || blockSize100k > 9 ||
+ verbosity < 0 || verbosity > 4 ||
+ workFactor < 0 || workFactor > 250)
+ return BZ_PARAM_ERROR;
+
+ if (workFactor == 0) workFactor = 30;
+ strm.bzalloc = NULL;
+ strm.bzfree = NULL;
+ strm.opaque = NULL;
+ ret = BZ2_bzCompressInit ( &strm, blockSize100k,
+ verbosity, workFactor );
+ if (ret != BZ_OK) return ret;
+
+ strm.next_in = source;
+ strm.next_out = dest;
+ strm.avail_in = sourceLen;
+ strm.avail_out = *destLen;
+
+ ret = BZ2_bzCompress ( &strm, BZ_FINISH );
+ if (ret == BZ_FINISH_OK) goto output_overflow;
+ if (ret != BZ_STREAM_END) goto errhandler;
+
+ /* normal termination */
+ *destLen -= strm.avail_out;
+ BZ2_bzCompressEnd ( &strm );
+ return BZ_OK;
+
+ output_overflow:
+ BZ2_bzCompressEnd ( &strm );
+ return BZ_OUTBUFF_FULL;
+
+ errhandler:
+ BZ2_bzCompressEnd ( &strm );
+ return ret;
+}
+
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzBuffToBuffDecompress)
+ ( char* dest,
+ unsigned int* destLen,
+ char* source,
+ unsigned int sourceLen,
+ int small,
+ int verbosity )
+{
+ bz_stream strm;
+ int ret;
+
+ if (dest == NULL || destLen == NULL ||
+ source == NULL ||
+ (small != 0 && small != 1) ||
+ verbosity < 0 || verbosity > 4)
+ return BZ_PARAM_ERROR;
+
+ strm.bzalloc = NULL;
+ strm.bzfree = NULL;
+ strm.opaque = NULL;
+ ret = BZ2_bzDecompressInit ( &strm, verbosity, small );
+ if (ret != BZ_OK) return ret;
+
+ strm.next_in = source;
+ strm.next_out = dest;
+ strm.avail_in = sourceLen;
+ strm.avail_out = *destLen;
+
+ ret = BZ2_bzDecompress ( &strm );
+ if (ret == BZ_OK) goto output_overflow_or_eof;
+ if (ret != BZ_STREAM_END) goto errhandler;
+
+ /* normal termination */
+ *destLen -= strm.avail_out;
+ BZ2_bzDecompressEnd ( &strm );
+ return BZ_OK;
+
+ output_overflow_or_eof:
+ if (strm.avail_out > 0) {
+ BZ2_bzDecompressEnd ( &strm );
+ return BZ_UNEXPECTED_EOF;
+ } else {
+ BZ2_bzDecompressEnd ( &strm );
+ return BZ_OUTBUFF_FULL;
+ };
+
+ errhandler:
+ BZ2_bzDecompressEnd ( &strm );
+ return ret;
+}
+
+
+/*---------------------------------------------------*/
+/*--
+ Code contributed by Yoshioka Tsuneo
+ (QWF00133@niftyserve.or.jp/tsuneo-y@is.aist-nara.ac.jp),
+ to support better zlib compatibility.
+ This code is not _officially_ part of libbzip2 (yet);
+ I haven't tested it, documented it, or considered the
+ threading-safeness of it.
+ If this code breaks, please contact both Yoshioka and me.
+--*/
+/*---------------------------------------------------*/
+
+/*---------------------------------------------------*/
+/*--
+ return version like "0.9.0c".
+--*/
+const char * BZ_API(BZ2_bzlibVersion)(void)
+{
+ return BZ_VERSION;
+}
+
+
+#ifndef BZ_NO_STDIO
+/*---------------------------------------------------*/
+
+#if defined(_WIN32) || defined(OS2) || defined(MSDOS)
+# include <fcntl.h>
+# include <io.h>
+# define SET_BINARY_MODE(file) setmode(fileno(file),O_BINARY)
+#else
+# define SET_BINARY_MODE(file)
+#endif
+static
+BZFILE * bzopen_or_bzdopen
+ ( const char *path, /* no use when bzdopen */
+ int fd, /* no use when bzdopen */
+ const char *mode,
+ int open_mode) /* bzopen: 0, bzdopen:1 */
+{
+ int bzerr;
+ char unused[BZ_MAX_UNUSED];
+ int blockSize100k = 9;
+ int writing = 0;
+ char mode2[10] = "";
+ FILE *fp = NULL;
+ BZFILE *bzfp = NULL;
+ int verbosity = 0;
+ int workFactor = 30;
+ int smallMode = 0;
+ int nUnused = 0;
+
+ if (mode == NULL) return NULL;
+ while (*mode) {
+ switch (*mode) {
+ case 'r':
+ writing = 0; break;
+ case 'w':
+ writing = 1; break;
+ case 's':
+ smallMode = 1; break;
+ default:
+ if (isdigit((int)(*mode))) {
+ blockSize100k = *mode-BZ_HDR_0;
+ }
+ }
+ mode++;
+ }
+ strcat(mode2, writing ? "w" : "r" );
+ strcat(mode2,"b"); /* binary mode */
+
+ if (open_mode==0) {
+ if (path==NULL || strcmp(path,"")==0) {
+ fp = (writing ? stdout : stdin);
+ SET_BINARY_MODE(fp);
+ } else {
+ fp = fopen(path,mode2);
+ }
+ } else {
+#ifdef BZ_STRICT_ANSI
+ fp = NULL;
+#else
+ fp = fdopen(fd,mode2);
+#endif
+ }
+ if (fp == NULL) return NULL;
+
+ if (writing) {
+ /* Guard against total chaos and anarchy -- JRS */
+ if (blockSize100k < 1) blockSize100k = 1;
+ if (blockSize100k > 9) blockSize100k = 9;
+ bzfp = BZ2_bzWriteOpen(&bzerr,fp,blockSize100k,
+ verbosity,workFactor);
+ } else {
+ bzfp = BZ2_bzReadOpen(&bzerr,fp,verbosity,smallMode,
+ unused,nUnused);
+ }
+ if (bzfp == NULL) {
+ if (fp != stdin && fp != stdout) fclose(fp);
+ return NULL;
+ }
+ return bzfp;
+}
+
+
+/*---------------------------------------------------*/
+/*--
+ open file for read or write.
+ ex) bzopen("file","w9")
+ case path="" or NULL => use stdin or stdout.
+--*/
+BZFILE * BZ_API(BZ2_bzopen)
+ ( const char *path,
+ const char *mode )
+{
+ return bzopen_or_bzdopen(path,-1,mode,/*bzopen*/0);
+}
+
+
+/*---------------------------------------------------*/
+BZFILE * BZ_API(BZ2_bzdopen)
+ ( int fd,
+ const char *mode )
+{
+ return bzopen_or_bzdopen(NULL,fd,mode,/*bzdopen*/1);
+}
+
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzread) (BZFILE* b, void* buf, int len )
+{
+ int bzerr, nread;
+ if (((bzFile*)b)->lastErr == BZ_STREAM_END) return 0;
+ nread = BZ2_bzRead(&bzerr,b,buf,len);
+ if (bzerr == BZ_OK || bzerr == BZ_STREAM_END) {
+ return nread;
+ } else {
+ return -1;
+ }
+}
+
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzwrite) (BZFILE* b, void* buf, int len )
+{
+ int bzerr;
+
+ BZ2_bzWrite(&bzerr,b,buf,len);
+ if(bzerr == BZ_OK){
+ return len;
+ }else{
+ return -1;
+ }
+}
+
+
+/*---------------------------------------------------*/
+int BZ_API(BZ2_bzflush) (BZFILE *b)
+{
+ /* do nothing now... */
+ return 0;
+}
+
+
+/*---------------------------------------------------*/
+void BZ_API(BZ2_bzclose) (BZFILE* b)
+{
+ int bzerr;
+ FILE *fp = ((bzFile *)b)->handle;
+
+ if (b==NULL) {return;}
+ if(((bzFile*)b)->writing){
+ BZ2_bzWriteClose(&bzerr,b,0,NULL,NULL);
+ if(bzerr != BZ_OK){
+ BZ2_bzWriteClose(NULL,b,1,NULL,NULL);
+ }
+ }else{
+ BZ2_bzReadClose(&bzerr,b);
+ }
+ if(fp!=stdin && fp!=stdout){
+ fclose(fp);
+ }
+}
+
+
+/*---------------------------------------------------*/
+/*--
+ return last error code
+--*/
+static char *bzerrorstrings[] = {
+ "OK"
+ ,"SEQUENCE_ERROR"
+ ,"PARAM_ERROR"
+ ,"MEM_ERROR"
+ ,"DATA_ERROR"
+ ,"DATA_ERROR_MAGIC"
+ ,"IO_ERROR"
+ ,"UNEXPECTED_EOF"
+ ,"OUTBUFF_FULL"
+ ,"CONFIG_ERROR"
+ ,"???" /* for future */
+ ,"???" /* for future */
+ ,"???" /* for future */
+ ,"???" /* for future */
+ ,"???" /* for future */
+ ,"???" /* for future */
+};
+
+
+const char * BZ_API(BZ2_bzerror) (BZFILE *b, int *errnum)
+{
+ int err = ((bzFile *)b)->lastErr;
+
+ if(err>0) err = 0;
+ *errnum = err;
+ return bzerrorstrings[err*-1];
+}
+#endif
+
+
+/*-------------------------------------------------------------*/
+/*--- end bzlib.c ---*/
+/*-------------------------------------------------------------*/
+
+
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+
+
+/* A test program written to test robustness to decompression of
+ corrupted data. Usage is
+ unzcrash filename
+ and the program will read the specified file, compress it (in memory),
+ and then repeatedly decompress it, each time with a different bit of
+ the compressed data inverted, so as to test all possible one-bit errors.
+ This should not cause any invalid memory accesses. If it does,
+ I want to know about it!
+
+ p.s. As you can see from the above description, the process is
+ incredibly slow. A file of size eg 5KB will cause it to run for
+ many hours.
+*/
+
+//#include <stdio.h>
+//#include <assert.h>
+//#include "bzlib.h"
+
+#define M_BLOCK 1000000
+
+typedef unsigned char uchar;
+
+#define M_BLOCK_OUT (M_BLOCK + 1000000)
+uchar inbuf[M_BLOCK];
+uchar outbuf[M_BLOCK_OUT];
+uchar zbuf[M_BLOCK + 600 + (M_BLOCK / 100)];
+
+int nIn, nOut, nZ;
+
+static char *bzerrorstrings[] = {
+ "OK"
+ ,"SEQUENCE_ERROR"
+ ,"PARAM_ERROR"
+ ,"MEM_ERROR"
+ ,"DATA_ERROR"
+ ,"DATA_ERROR_MAGIC"
+ ,"IO_ERROR"
+ ,"UNEXPECTED_EOF"
+ ,"OUTBUFF_FULL"
+ ,"???" /* for future */
+ ,"???" /* for future */
+ ,"???" /* for future */
+ ,"???" /* for future */
+ ,"???" /* for future */
+ ,"???" /* for future */
+};
+
+void flip_bit ( int bit )
+{
+ int byteno = bit / 8;
+ int bitno = bit % 8;
+ uchar mask = 1 << bitno;
+ //fprintf ( stderr, "(byte %d bit %d mask %d)",
+ // byteno, bitno, (int)mask );
+ zbuf[byteno] ^= mask;
+}
+
+void set_inbuf ( void )
+{
+ inbuf[0] = 0;
+ my_strcat(inbuf, "At her sixtieth birthday party, Margaret Thatcher ");
+ my_strcat(inbuf, "blew on the cake to light the candles.\n");
+ my_strcat(inbuf, "This program, bzip2, the associated library libbzip2, and all\n");
+ my_strcat(inbuf, "documentation, are copyright (C) 1996-2004 Julian R Seward. All\n");
+ my_strcat(inbuf, "rights reserved.\n");
+ my_strcat(inbuf, "\n");
+ my_strcat(inbuf, "Redistribution and use in source and binary forms, with or without\n");
+ my_strcat(inbuf, "modification, are permitted provided that the following conditions\n");
+ my_strcat(inbuf, "are met:\n");
+ my_strcat(inbuf, "\n");
+ my_strcat(inbuf, "1. Redistributions of source code must retain the above copyright\n");
+ my_strcat(inbuf, " notice, this list of conditions and the following disclaimer.\n");
+ my_strcat(inbuf, "\n");
+ my_strcat(inbuf, "2. The origin of this software must not be misrepresented; you must\n");
+ my_strcat(inbuf, " not claim that you wrote the original software. If you use this\n");
+ my_strcat(inbuf, " software in a product, an acknowledgment in the product\n");
+ my_strcat(inbuf, " documentation would be appreciated but is not required.\n");
+ my_strcat(inbuf, "\n");
+ my_strcat(inbuf, "3. Altered source versions must be plainly marked as such, and must\n");
+ my_strcat(inbuf, " not be misrepresented as being the original software.\n");
+ my_strcat(inbuf, "\n");
+ my_strcat(inbuf, "4. The name of the author may not be used to endorse or promote\n");
+ my_strcat(inbuf, " products derived from this software without specific prior written\n");
+ my_strcat(inbuf, " permission.\n");
+ my_strcat(inbuf, "\n");
+ my_strcat(inbuf, "THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\n");
+ my_strcat(inbuf, "OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n");
+ my_strcat(inbuf, "WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n");
+ my_strcat(inbuf, "ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\n");
+ my_strcat(inbuf, "DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\n");
+ my_strcat(inbuf, "DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\n");
+ my_strcat(inbuf, "GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n");
+ my_strcat(inbuf, "INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\n");
+ my_strcat(inbuf, "WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\n");
+ my_strcat(inbuf, "NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n");
+ my_strcat(inbuf, "SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "ababababababababababababababababababababababababababababababab");
+ my_strcat(inbuf, "\n");
+}
+
+
+void entry ( HWord(*service)(HWord,HWord) )
+{
+ int r;
+ int bit;
+ int i;
+
+ serviceFn = service;
+
+ set_inbuf();
+ nIn = vexxx_strlen(inbuf)+1;
+ vexxx_printf( "%d bytes read\n", nIn );
+
+ nZ = M_BLOCK;
+ r = BZ2_bzBuffToBuffCompress (
+ zbuf, &nZ, inbuf, nIn, 9, 4/*verb*/, 30 );
+
+ if (r != BZ_OK) {
+ vexxx_printf("initial compress failed!\n");
+ (*serviceFn)(0,0);
+ }
+ vexxx_printf( "%d after compression\n", nZ );
+
+ for (bit = 0; bit < nZ*8; bit += (bit < 35 ? 1 : 377)) {
+ vexxx_printf( "bit %d ", bit );
+ flip_bit ( bit );
+ nOut = M_BLOCK_OUT;
+ r = BZ2_bzBuffToBuffDecompress (
+ outbuf, &nOut, zbuf, nZ, 1/*small*/, 0 );
+ vexxx_printf( " %d %s ", r, bzerrorstrings[-r] );
+
+ if (r != BZ_OK) {
+ vexxx_printf( "\n" );
+ } else {
+ if (nOut != nIn) {
+ vexxx_printf( "nIn/nOut mismatch %d %d\n", nIn, nOut );
+ (*serviceFn)(0,0);
+ } else {
+ for (i = 0; i < nOut; i++)
+ if (inbuf[i] != outbuf[i]) {
+ vexxx_printf( "mismatch at %d\n", i );
+ (*serviceFn)(0,0);
+ }
+ if (i == nOut) vexxx_printf( "really ok!\n" );
+ }
+ }
+
+ flip_bit ( bit );
+ }
+
+#if 0
+ assert (nOut == nIn);
+ for (i = 0; i < nOut; i++) {
+ if (inbuf[i] != outbuf[i]) {
+ vexxx_printf( "difference at %d !\n", i );
+ return 1;
+ }
+ }
+#endif
+
+ vexxx_printf( "all ok\n" );
+ (*serviceFn)(0,0);
+}
diff --git a/main/VEX/switchback/test_emfloat.c b/main/VEX/switchback/test_emfloat.c
new file mode 100644
index 0000000..9274e71
--- /dev/null
+++ b/main/VEX/switchback/test_emfloat.c
@@ -0,0 +1,1944 @@
+/*
+** emfloat.c
+** Source for emulated floating-point routines.
+** BYTEmark (tm)
+** BYTE's Native Mode Benchmarks
+** Rick Grehan, BYTE Magazine.
+**
+** Created:
+** Last update: 3/95
+**
+** DISCLAIMER
+** The source, executable, and documentation files that comprise
+** the BYTEmark benchmarks are made available on an "as is" basis.
+** This means that we at BYTE Magazine have made every reasonable
+** effort to verify that the there are no errors in the source and
+** executable code. We cannot, however, guarantee that the programs
+** are error-free. Consequently, McGraw-HIll and BYTE Magazine make
+** no claims in regard to the fitness of the source code, executable
+** code, and documentation of the BYTEmark.
+** Furthermore, BYTE Magazine, McGraw-Hill, and all employees
+** of McGraw-Hill cannot be held responsible for any damages resulting
+** from the use of this code or the results obtained from using
+** this code.
+*/
+
+#include "../pub/libvex_basictypes.h"
+
+static HWord (*serviceFn)(HWord,HWord) = 0;
+
+
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+
+static char* my_strcpy ( char* dest, const char* src )
+{
+ char* dest_orig = dest;
+ while (*src) *dest++ = *src++;
+ *dest = 0;
+ return dest_orig;
+}
+
+static void* my_memcpy ( void *dest, const void *src, int sz )
+{
+ const char *s = (const char *)src;
+ char *d = (char *)dest;
+
+ while (sz--)
+ *d++ = *s++;
+
+ return dest;
+}
+
+static void* my_memmove( void *dst, const void *src, unsigned int len )
+{
+ register char *d;
+ register char *s;
+ if ( dst > src ) {
+ d = (char *)dst + len - 1;
+ s = (char *)src + len - 1;
+ while ( len >= 4 ) {
+ *d-- = *s--;
+ *d-- = *s--;
+ *d-- = *s--;
+ *d-- = *s--;
+ len -= 4;
+ }
+ while ( len-- ) {
+ *d-- = *s--;
+ }
+ } else if ( dst < src ) {
+ d = (char *)dst;
+ s = (char *)src;
+ while ( len >= 4 ) {
+ *d++ = *s++;
+ *d++ = *s++;
+ *d++ = *s++;
+ *d++ = *s++;
+ len -= 4;
+ }
+ while ( len-- ) {
+ *d++ = *s++;
+ }
+ }
+ return dst;
+}
+
+/////////////////////////////////////////////////////////////////////
+
+static void vexxx_log_bytes ( char* p, int n )
+{
+ int i;
+ for (i = 0; i < n; i++)
+ (*serviceFn)( 1, (int)p[i] );
+}
+
+/*---------------------------------------------------------*/
+/*--- vexxx_printf ---*/
+/*---------------------------------------------------------*/
+
+/* This should be the only <...> include in the entire VEXXX library.
+ New code for vexxx_util.c should go above this point. */
+#include <stdarg.h>
+
+static HChar vexxx_toupper ( HChar c )
+{
+ if (c >= 'a' && c <= 'z')
+ return toHChar(c + ('A' - 'a'));
+ else
+ return c;
+}
+
+static Int vexxx_strlen ( const HChar* str )
+{
+ Int i = 0;
+ while (str[i] != 0) i++;
+ return i;
+}
+
+Bool vexxx_streq ( const HChar* s1, const HChar* s2 )
+{
+ while (True) {
+ if (*s1 == 0 && *s2 == 0)
+ return True;
+ if (*s1 != *s2)
+ return False;
+ s1++;
+ s2++;
+ }
+}
+
+/* Some flags. */
+#define VG_MSG_SIGNED 1 /* The value is signed. */
+#define VG_MSG_ZJUSTIFY 2 /* Must justify with '0'. */
+#define VG_MSG_LJUSTIFY 4 /* Must justify on the left. */
+#define VG_MSG_PAREN 8 /* Parenthesize if present (for %y) */
+#define VG_MSG_COMMA 16 /* Add commas to numbers (for %d, %u) */
+
+/* Copy a string into the buffer. */
+static UInt
+myvprintf_str ( void(*send)(HChar), Int flags, Int width, HChar* str,
+ Bool capitalise )
+{
+# define MAYBE_TOUPPER(ch) toHChar(capitalise ? vexxx_toupper(ch) : (ch))
+ UInt ret = 0;
+ Int i, extra;
+ Int len = vexxx_strlen(str);
+
+ if (width == 0) {
+ ret += len;
+ for (i = 0; i < len; i++)
+ send(MAYBE_TOUPPER(str[i]));
+ return ret;
+ }
+
+ if (len > width) {
+ ret += width;
+ for (i = 0; i < width; i++)
+ send(MAYBE_TOUPPER(str[i]));
+ return ret;
+ }
+
+ extra = width - len;
+ if (flags & VG_MSG_LJUSTIFY) {
+ ret += extra;
+ for (i = 0; i < extra; i++)
+ send(' ');
+ }
+ ret += len;
+ for (i = 0; i < len; i++)
+ send(MAYBE_TOUPPER(str[i]));
+ if (!(flags & VG_MSG_LJUSTIFY)) {
+ ret += extra;
+ for (i = 0; i < extra; i++)
+ send(' ');
+ }
+
+# undef MAYBE_TOUPPER
+
+ return ret;
+}
+
+/* Write P into the buffer according to these args:
+ * If SIGN is true, p is a signed.
+ * BASE is the base.
+ * If WITH_ZERO is true, '0' must be added.
+ * WIDTH is the width of the field.
+ */
+static UInt
+myvprintf_int64 ( void(*send)(HChar), Int flags, Int base, Int width, ULong pL)
+{
+ HChar buf[40];
+ Int ind = 0;
+ Int i, nc = 0;
+ Bool neg = False;
+ HChar *digits = "0123456789ABCDEF";
+ UInt ret = 0;
+ UInt p = (UInt)pL;
+
+ if (base < 2 || base > 16)
+ return ret;
+
+ if ((flags & VG_MSG_SIGNED) && (Int)p < 0) {
+ p = - (Int)p;
+ neg = True;
+ }
+
+ if (p == 0)
+ buf[ind++] = '0';
+ else {
+ while (p > 0) {
+ if ((flags & VG_MSG_COMMA) && 10 == base &&
+ 0 == (ind-nc) % 3 && 0 != ind)
+ {
+ buf[ind++] = ',';
+ nc++;
+ }
+ buf[ind++] = digits[p % base];
+ p /= base;
+ }
+ }
+
+ if (neg)
+ buf[ind++] = '-';
+
+ if (width > 0 && !(flags & VG_MSG_LJUSTIFY)) {
+ for(; ind < width; ind++) {
+ //vassert(ind < 39);
+ buf[ind] = toHChar((flags & VG_MSG_ZJUSTIFY) ? '0': ' ');
+ }
+ }
+
+ /* Reverse copy to buffer. */
+ ret += ind;
+ for (i = ind -1; i >= 0; i--) {
+ send(buf[i]);
+ }
+ if (width > 0 && (flags & VG_MSG_LJUSTIFY)) {
+ for(; ind < width; ind++) {
+ ret++;
+ send(' '); // Never pad with zeroes on RHS -- changes the value!
+ }
+ }
+ return ret;
+}
+
+
+/* A simple vprintf(). */
+static
+UInt vprintf_wrk ( void(*send)(HChar), const HChar *format, va_list vargs )
+{
+ UInt ret = 0;
+ int i;
+ int flags;
+ int width;
+ Bool is_long;
+
+ /* We assume that vargs has already been initialised by the
+ caller, using va_start, and that the caller will similarly
+ clean up with va_end.
+ */
+
+ for (i = 0; format[i] != 0; i++) {
+ if (format[i] != '%') {
+ send(format[i]);
+ ret++;
+ continue;
+ }
+ i++;
+ /* A '%' has been found. Ignore a trailing %. */
+ if (format[i] == 0)
+ break;
+ if (format[i] == '%') {
+ /* `%%' is replaced by `%'. */
+ send('%');
+ ret++;
+ continue;
+ }
+ flags = 0;
+ is_long = False;
+ width = 0; /* length of the field. */
+ if (format[i] == '(') {
+ flags |= VG_MSG_PAREN;
+ i++;
+ }
+ /* If ',' follows '%', commas will be inserted. */
+ if (format[i] == ',') {
+ flags |= VG_MSG_COMMA;
+ i++;
+ }
+ /* If '-' follows '%', justify on the left. */
+ if (format[i] == '-') {
+ flags |= VG_MSG_LJUSTIFY;
+ i++;
+ }
+ /* If '0' follows '%', pads will be inserted. */
+ if (format[i] == '0') {
+ flags |= VG_MSG_ZJUSTIFY;
+ i++;
+ }
+ /* Compute the field length. */
+ while (format[i] >= '0' && format[i] <= '9') {
+ width *= 10;
+ width += format[i++] - '0';
+ }
+ while (format[i] == 'l') {
+ i++;
+ is_long = True;
+ }
+
+ switch (format[i]) {
+ case 'd': /* %d */
+ flags |= VG_MSG_SIGNED;
+ if (is_long)
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, Long)));
+ else
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, Int)));
+ break;
+ case 'u': /* %u */
+ if (is_long)
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, ULong)));
+ else
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, UInt)));
+ break;
+ case 'p': /* %p */
+ ret += 2;
+ send('0');
+ send('x');
+ ret += myvprintf_int64(send, flags, 16, width,
+ (ULong)((HWord)va_arg (vargs, void *)));
+ break;
+ case 'x': /* %x */
+ if (is_long)
+ ret += myvprintf_int64(send, flags, 16, width,
+ (ULong)(va_arg (vargs, ULong)));
+ else
+ ret += myvprintf_int64(send, flags, 16, width,
+ (ULong)(va_arg (vargs, UInt)));
+ break;
+ case 'c': /* %c */
+ ret++;
+ send(toHChar(va_arg (vargs, int)));
+ break;
+ case 's': case 'S': { /* %s */
+ char *str = va_arg (vargs, char *);
+ if (str == (char*) 0) str = "(null)";
+ ret += myvprintf_str(send, flags, width, str,
+ toBool(format[i]=='S'));
+ break;
+ }
+# if 0
+ case 'y': { /* %y - print symbol */
+ Char buf[100];
+ Char *cp = buf;
+ Addr a = va_arg(vargs, Addr);
+
+ if (flags & VG_MSG_PAREN)
+ *cp++ = '(';
+ if (VG_(get_fnname_w_offset)(a, cp, sizeof(buf)-4)) {
+ if (flags & VG_MSG_PAREN) {
+ cp += VG_(strlen)(cp);
+ *cp++ = ')';
+ *cp = '\0';
+ }
+ ret += myvprintf_str(send, flags, width, buf, 0);
+ }
+ break;
+ }
+# endif
+ default:
+ break;
+ }
+ }
+ return ret;
+}
+
+
+/* A general replacement for printf(). Note that only low-level
+ debugging info should be sent via here. The official route is to
+ to use vg_message(). This interface is deprecated.
+*/
+static HChar myprintf_buf[1000];
+static Int n_myprintf_buf;
+
+static void add_to_myprintf_buf ( HChar c )
+{
+ if (c == '\n' || n_myprintf_buf >= 1000-10 /*paranoia*/ ) {
+ (*vexxx_log_bytes)( myprintf_buf, vexxx_strlen(myprintf_buf) );
+ n_myprintf_buf = 0;
+ myprintf_buf[n_myprintf_buf] = 0;
+ }
+ myprintf_buf[n_myprintf_buf++] = c;
+ myprintf_buf[n_myprintf_buf] = 0;
+}
+
+static UInt vexxx_printf ( const char *format, ... )
+{
+ UInt ret;
+ va_list vargs;
+ va_start(vargs,format);
+
+ n_myprintf_buf = 0;
+ myprintf_buf[n_myprintf_buf] = 0;
+ ret = vprintf_wrk ( add_to_myprintf_buf, format, vargs );
+
+ if (n_myprintf_buf > 0) {
+ (*vexxx_log_bytes)( myprintf_buf, n_myprintf_buf );
+ }
+
+ va_end(vargs);
+
+ return ret;
+}
+
+/*---------------------------------------------------------------*/
+/*--- end vexxx_util.c ---*/
+/*---------------------------------------------------------------*/
+
+
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+
+//#include <stdio.h>
+//#include <string.h>
+//#include <malloc.h>
+
+typedef unsigned char uchar;
+typedef unsigned int uint;
+typedef unsigned short ushort;
+typedef unsigned long ulong;
+typedef int int32; /* Signed 32 bit integer */
+
+#define INTERNAL_FPF_PRECISION 4
+#define CPUEMFLOATLOOPMAX 500000L
+#define EMFARRAYSIZE 3000L
+
+typedef struct {
+ int adjust; /* Set adjust code */
+ ulong request_secs; /* # of seconds requested */
+ ulong arraysize; /* Size of array */
+ ulong loops; /* Loops per iterations */
+ double emflops; /* Results */
+} EmFloatStruct;
+
+
+
+/* Is this a 64 bit architecture? If so, this will define LONG64 */
+/* Uwe F. Mayer 15 November 1997 */
+// #include "pointer.h"
+
+#define u8 unsigned char
+#define u16 unsigned short
+#ifdef LONG64
+#define u32 unsigned int
+#else
+#define u32 unsigned long
+#endif
+#define uchar unsigned char
+#define ulong unsigned long
+
+#define MAX_EXP 32767L
+#define MIN_EXP (-32767L)
+
+#define IFPF_IS_ZERO 0
+#define IFPF_IS_SUBNORMAL 1
+#define IFPF_IS_NORMAL 2
+#define IFPF_IS_INFINITY 3
+#define IFPF_IS_NAN 4
+#define IFPF_TYPE_COUNT 5
+
+#define ZERO_ZERO 0
+#define ZERO_SUBNORMAL 1
+#define ZERO_NORMAL 2
+#define ZERO_INFINITY 3
+#define ZERO_NAN 4
+
+#define SUBNORMAL_ZERO 5
+#define SUBNORMAL_SUBNORMAL 6
+#define SUBNORMAL_NORMAL 7
+#define SUBNORMAL_INFINITY 8
+#define SUBNORMAL_NAN 9
+
+#define NORMAL_ZERO 10
+#define NORMAL_SUBNORMAL 11
+#define NORMAL_NORMAL 12
+#define NORMAL_INFINITY 13
+#define NORMAL_NAN 14
+
+#define INFINITY_ZERO 15
+#define INFINITY_SUBNORMAL 16
+#define INFINITY_NORMAL 17
+#define INFINITY_INFINITY 18
+#define INFINITY_NAN 19
+
+#define NAN_ZERO 20
+#define NAN_SUBNORMAL 21
+#define NAN_NORMAL 22
+#define NAN_INFINITY 23
+#define NAN_NAN 24
+#define OPERAND_ZERO 0
+#define OPERAND_SUBNORMAL 1
+#define OPERAND_NORMAL 2
+#define OPERAND_INFINITY 3
+#define OPERAND_NAN 4
+
+typedef struct
+{
+ u8 type; /* Indicates, NORMAL, SUBNORMAL, etc. */
+ u8 sign; /* Mantissa sign */
+ short exp; /* Signed exponent...no bias */
+ u16 mantissa[INTERNAL_FPF_PRECISION];
+} InternalFPF;
+
+static
+void SetupCPUEmFloatArrays(InternalFPF *abase,
+ InternalFPF *bbase, InternalFPF *cbase, ulong arraysize);
+static
+ulong DoEmFloatIteration(InternalFPF *abase,
+ InternalFPF *bbase, InternalFPF *cbase,
+ ulong arraysize, ulong loops);
+
+static void SetInternalFPFZero(InternalFPF *dest,
+ uchar sign);
+static void SetInternalFPFInfinity(InternalFPF *dest,
+ uchar sign);
+static void SetInternalFPFNaN(InternalFPF *dest);
+static int IsMantissaZero(u16 *mant);
+static void Add16Bits(u16 *carry,u16 *a,u16 b,u16 c);
+static void Sub16Bits(u16 *borrow,u16 *a,u16 b,u16 c);
+static void ShiftMantLeft1(u16 *carry,u16 *mantissa);
+static void ShiftMantRight1(u16 *carry,u16 *mantissa);
+static void StickyShiftRightMant(InternalFPF *ptr,int amount);
+static void normalize(InternalFPF *ptr);
+static void denormalize(InternalFPF *ptr,int minimum_exponent);
+static void RoundInternalFPF(InternalFPF *ptr);
+static void choose_nan(InternalFPF *x,InternalFPF *y,InternalFPF *z,
+ int intel_flag);
+static void AddSubInternalFPF(uchar operation,InternalFPF *x,
+ InternalFPF *y,InternalFPF *z);
+static void MultiplyInternalFPF(InternalFPF *x,InternalFPF *y,
+ InternalFPF *z);
+static void DivideInternalFPF(InternalFPF *x,InternalFPF *y,
+ InternalFPF *z);
+
+static void Int32ToInternalFPF(int32 mylong,
+ InternalFPF *dest);
+static int InternalFPFToString(char *dest,
+ InternalFPF *src);
+
+static int32 randnum(int32 lngval);
+
+static int32 randwc(int32 num)
+{
+ return(randnum((int32)0)%num);
+}
+
+static int32 randw[2] = { (int32)13 , (int32)117 };
+static int32 randnum(int32 lngval)
+{
+ register int32 interm;
+
+ if (lngval!=(int32)0)
+ { randw[0]=(int32)13; randw[1]=(int32)117; }
+
+ interm=(randw[0]*(int32)254754+randw[1]*(int32)529562)%(int32)999563;
+ randw[1]=randw[0];
+ randw[0]=interm;
+ return(interm);
+}
+
+
+static
+void SetupCPUEmFloatArrays(InternalFPF *abase,
+ InternalFPF *bbase,
+ InternalFPF *cbase,
+ ulong arraysize)
+{
+ulong i;
+InternalFPF locFPF1,locFPF2;
+
+randnum((int32)13);
+
+for(i=0;i<arraysize;i++)
+{/* LongToInternalFPF(randwc(50000L),&locFPF1); */
+ Int32ToInternalFPF(randwc((int32)50000),&locFPF1);
+ /* LongToInternalFPF(randwc(50000L)+1L,&locFPF2); */
+ Int32ToInternalFPF(randwc((int32)50000)+(int32)1,&locFPF2);
+ DivideInternalFPF(&locFPF1,&locFPF2,abase+i);
+ /* LongToInternalFPF(randwc(50000L)+1L,&locFPF2); */
+ Int32ToInternalFPF(randwc((int32)50000)+(int32)1,&locFPF2);
+ DivideInternalFPF(&locFPF1,&locFPF2,bbase+i);
+}
+return;
+}
+
+
+static char* str1 = "loops %d\n";
+static
+ulong DoEmFloatIteration(InternalFPF *abase,
+ InternalFPF *bbase,
+ InternalFPF *cbase,
+ ulong arraysize, ulong loops)
+{
+static uchar jtable[16] = {0,0,0,0,1,1,1,1,2,2,2,2,2,3,3,3};
+ulong i;
+int number_of_loops;
+ loops = 100;
+number_of_loops=loops-1; /* the index of the first loop we run */
+
+vexxx_printf(str1, (int)loops);
+
+/*
+** Each pass through the array performs operations in
+** the followingratios:
+** 4 adds, 4 subtracts, 5 multiplies, 3 divides
+** (adds and subtracts being nearly the same operation)
+*/
+
+{
+ for(i=0;i<arraysize;i++)
+ switch(jtable[i % 16])
+ {
+ case 0: /* Add */
+ AddSubInternalFPF(0,abase+i,
+ bbase+i,
+ cbase+i);
+ break;
+ case 1: /* Subtract */
+ AddSubInternalFPF(1,abase+i,
+ bbase+i,
+ cbase+i);
+ break;
+ case 2: /* Multiply */
+ MultiplyInternalFPF(abase+i,
+ bbase+i,
+ cbase+i);
+ break;
+ case 3: /* Divide */
+ DivideInternalFPF(abase+i,
+ bbase+i,
+ cbase+i);
+ break;
+ }
+{
+ ulong j[8]; /* we test 8 entries */
+ int k;
+ ulong i;
+ char buffer[1024];
+ if (100==loops) /* the first loop */
+ {
+ j[0]=(ulong)2;
+ j[1]=(ulong)6;
+ j[2]=(ulong)10;
+ j[3]=(ulong)14;
+ j[4]=(ulong)(arraysize-14);
+ j[5]=(ulong)(arraysize-10);
+ j[6]=(ulong)(arraysize-6);
+ j[7]=(ulong)(arraysize-2);
+ for(k=0;k<8;k++){
+ i=j[k];
+ InternalFPFToString(buffer,abase+i);
+ vexxx_printf("%6d: (%s) ",i,buffer);
+ switch(jtable[i % 16])
+ {
+ case 0: my_strcpy(buffer,"+"); break;
+ case 1: my_strcpy(buffer,"-"); break;
+ case 2: my_strcpy(buffer,"*"); break;
+ case 3: my_strcpy(buffer,"/"); break;
+ }
+ vexxx_printf("%s ",buffer);
+ InternalFPFToString(buffer,bbase+i);
+ vexxx_printf("(%s) = ",buffer);
+ InternalFPFToString(buffer,cbase+i);
+ vexxx_printf("%s\n",buffer);
+ }
+return 0;
+ }
+}
+}
+return 0;
+}
+
+/***********************
+** SetInternalFPFZero **
+************************
+** Set an internal floating-point-format number to zero.
+** sign determines the sign of the zero.
+*/
+static void SetInternalFPFZero(InternalFPF *dest,
+ uchar sign)
+{
+int i; /* Index */
+
+dest->type=IFPF_IS_ZERO;
+dest->sign=sign;
+dest->exp=MIN_EXP;
+for(i=0;i<INTERNAL_FPF_PRECISION;i++)
+ dest->mantissa[i]=0;
+return;
+}
+
+/***************************
+** SetInternalFPFInfinity **
+****************************
+** Set an internal floating-point-format number to infinity.
+** This can happen if the exponent exceeds MAX_EXP.
+** As above, sign picks the sign of infinity.
+*/
+static void SetInternalFPFInfinity(InternalFPF *dest,
+ uchar sign)
+{
+int i; /* Index */
+
+dest->type=IFPF_IS_INFINITY;
+dest->sign=sign;
+dest->exp=MIN_EXP;
+for(i=0;i<INTERNAL_FPF_PRECISION;i++)
+ dest->mantissa[i]=0;
+return;
+}
+
+/**********************
+** SetInternalFPFNaN **
+***********************
+** Set an internal floating-point-format number to Nan
+** (not a number). Note that we "emulate" an 80x87 as far
+** as the mantissa bits go.
+*/
+static void SetInternalFPFNaN(InternalFPF *dest)
+{
+int i; /* Index */
+
+dest->type=IFPF_IS_NAN;
+dest->exp=MAX_EXP;
+dest->sign=1;
+dest->mantissa[0]=0x4000;
+for(i=1;i<INTERNAL_FPF_PRECISION;i++)
+ dest->mantissa[i]=0;
+
+return;
+}
+
+/*******************
+** IsMantissaZero **
+********************
+** Pass this routine a pointer to an internal floating point format
+** number's mantissa. It checks for an all-zero mantissa.
+** Returns 0 if it is NOT all zeros, !=0 otherwise.
+*/
+static int IsMantissaZero(u16 *mant)
+{
+int i; /* Index */
+int n; /* Return value */
+
+n=0;
+for(i=0;i<INTERNAL_FPF_PRECISION;i++)
+ n|=mant[i];
+
+return(!n);
+}
+
+/**************
+** Add16Bits **
+***************
+** Add b, c, and carry. Retult in a. New carry in carry.
+*/
+static void Add16Bits(u16 *carry,
+ u16 *a,
+ u16 b,
+ u16 c)
+{
+u32 accum; /* Accumulator */
+
+/*
+** Do the work in the 32-bit accumulator so we can return
+** the carry.
+*/
+accum=(u32)b;
+accum+=(u32)c;
+accum+=(u32)*carry;
+*carry=(u16)((accum & 0x00010000) ? 1 : 0); /* New carry */
+*a=(u16)(accum & 0xFFFF); /* Result is lo 16 bits */
+return;
+}
+
+/**************
+** Sub16Bits **
+***************
+** Additive inverse of above.
+*/
+static void Sub16Bits(u16 *borrow,
+ u16 *a,
+ u16 b,
+ u16 c)
+{
+u32 accum; /* Accumulator */
+
+accum=(u32)b;
+accum-=(u32)c;
+accum-=(u32)*borrow;
+*borrow=(u32)((accum & 0x00010000) ? 1 : 0); /* New borrow */
+*a=(u16)(accum & 0xFFFF);
+return;
+}
+
+/*******************
+** ShiftMantLeft1 **
+********************
+** Shift a vector of 16-bit numbers left 1 bit. Also provides
+** a carry bit, which is shifted in at the beginning, and
+** shifted out at the end.
+*/
+static void ShiftMantLeft1(u16 *carry,
+ u16 *mantissa)
+{
+int i; /* Index */
+int new_carry;
+u16 accum; /* Temporary holding placed */
+
+for(i=INTERNAL_FPF_PRECISION-1;i>=0;i--)
+{ accum=mantissa[i];
+ new_carry=accum & 0x8000; /* Get new carry */
+ accum=accum<<1; /* Do the shift */
+ if(*carry)
+ accum|=1; /* Insert previous carry */
+ *carry=new_carry;
+ mantissa[i]=accum; /* Return shifted value */
+}
+return;
+}
+
+/********************
+** ShiftMantRight1 **
+*********************
+** Shift a mantissa right by 1 bit. Provides carry, as
+** above
+*/
+static void ShiftMantRight1(u16 *carry,
+ u16 *mantissa)
+{
+int i; /* Index */
+int new_carry;
+u16 accum;
+
+for(i=0;i<INTERNAL_FPF_PRECISION;i++)
+{ accum=mantissa[i];
+ new_carry=accum & 1; /* Get new carry */
+ accum=accum>>1;
+ if(*carry)
+ accum|=0x8000;
+ *carry=new_carry;
+ mantissa[i]=accum;
+}
+return;
+}
+
+
+/*****************************
+** StickyShiftMantRight **
+******************************
+** This is a shift right of the mantissa with a "sticky bit".
+** I.E., if a carry of 1 is shifted out of the least significant
+** bit, the least significant bit is set to 1.
+*/
+static void StickyShiftRightMant(InternalFPF *ptr,
+ int amount)
+{
+int i; /* Index */
+u16 carry; /* Self-explanatory */
+u16 *mantissa;
+
+mantissa=ptr->mantissa;
+
+if(ptr->type!=IFPF_IS_ZERO) /* Don't bother shifting a zero */
+{
+ /*
+ ** If the amount of shifting will shift everyting
+ ** out of existence, then just clear the whole mantissa
+ ** and set the lowmost bit to 1.
+ */
+ if(amount>=INTERNAL_FPF_PRECISION * 16)
+ {
+ for(i=0;i<INTERNAL_FPF_PRECISION-1;i++)
+ mantissa[i]=0;
+ mantissa[INTERNAL_FPF_PRECISION-1]=1;
+ }
+ else
+ for(i=0;i<amount;i++)
+ {
+ carry=0;
+ ShiftMantRight1(&carry,mantissa);
+ if(carry)
+ mantissa[INTERNAL_FPF_PRECISION-1] |= 1;
+ }
+}
+return;
+}
+
+
+/**************************************************
+** POST ARITHMETIC PROCESSING **
+** (NORMALIZE, ROUND, OVERFLOW, AND UNDERFLOW) **
+**************************************************/
+
+/**************
+** normalize **
+***************
+** Normalize an internal-representation number. Normalization
+** discards empty most-significant bits.
+*/
+static void normalize(InternalFPF *ptr)
+{
+u16 carry;
+
+/*
+** As long as there's a highmost 0 bit, shift the significand
+** left 1 bit. Each time you do this, though, you've
+** gotta decrement the exponent.
+*/
+while ((ptr->mantissa[0] & 0x8000) == 0)
+{
+ carry = 0;
+ ShiftMantLeft1(&carry, ptr->mantissa);
+ ptr->exp--;
+}
+return;
+}
+
+/****************
+** denormalize **
+*****************
+** Denormalize an internal-representation number. This means
+** shifting it right until its exponent is equivalent to
+** minimum_exponent. (You have to do this often in order
+** to perform additions and subtractions).
+*/
+static void denormalize(InternalFPF *ptr,
+ int minimum_exponent)
+{
+long exponent_difference;
+
+if (IsMantissaZero(ptr->mantissa))
+{
+ vexxx_printf("Error: zero significand in denormalize\n");
+}
+
+exponent_difference = ptr->exp-minimum_exponent;
+if (exponent_difference < 0)
+{
+ /*
+ ** The number is subnormal
+ */
+ exponent_difference = -exponent_difference;
+ if (exponent_difference >= (INTERNAL_FPF_PRECISION * 16))
+ {
+ /* Underflow */
+ SetInternalFPFZero(ptr, ptr->sign);
+ }
+ else
+ {
+ ptr->exp+=exponent_difference;
+ StickyShiftRightMant(ptr, exponent_difference);
+ }
+}
+return;
+}
+
+
+/*********************
+** RoundInternalFPF **
+**********************
+** Round an internal-representation number.
+** The kind of rounding we do here is simplest...referred to as
+** "chop". "Extraneous" rightmost bits are simply hacked off.
+*/
+void RoundInternalFPF(InternalFPF *ptr)
+{
+/* int i; */
+
+if (ptr->type == IFPF_IS_NORMAL ||
+ ptr->type == IFPF_IS_SUBNORMAL)
+{
+ denormalize(ptr, MIN_EXP);
+ if (ptr->type != IFPF_IS_ZERO)
+ {
+
+ /* clear the extraneous bits */
+ ptr->mantissa[3] &= 0xfff8;
+/* for (i=4; i<INTERNAL_FPF_PRECISION; i++)
+ {
+ ptr->mantissa[i] = 0;
+ }
+*/
+ /*
+ ** Check for overflow
+ */
+/* Does not do anything as ptr->exp is a short and MAX_EXP=37268
+ if (ptr->exp > MAX_EXP)
+ {
+ SetInternalFPFInfinity(ptr, ptr->sign);
+ }
+*/
+ }
+}
+return;
+}
+
+/*******************************************************
+** ARITHMETIC OPERATIONS ON INTERNAL REPRESENTATION **
+*******************************************************/
+
+/***************
+** choose_nan **
+****************
+** Called by routines that are forced to perform math on
+** a pair of NaN's. This routine "selects" which NaN is
+** to be returned.
+*/
+static void choose_nan(InternalFPF *x,
+ InternalFPF *y,
+ InternalFPF *z,
+ int intel_flag)
+{
+int i;
+
+/*
+** Compare the two mantissas,
+** return the larger. Note that we will be emulating
+** an 80387 in this operation.
+*/
+for (i=0; i<INTERNAL_FPF_PRECISION; i++)
+{
+ if (x->mantissa[i] > y->mantissa[i])
+ {
+ my_memmove((void *)x,(void *)z,sizeof(InternalFPF));
+ return;
+ }
+ if (x->mantissa[i] < y->mantissa[i])
+ {
+ my_memmove((void *)y,(void *)z,sizeof(InternalFPF));
+ return;
+ }
+}
+
+/*
+** They are equal
+*/
+if (!intel_flag)
+ /* if the operation is addition */
+ my_memmove((void *)x,(void *)z,sizeof(InternalFPF));
+else
+ /* if the operation is multiplication */
+ my_memmove((void *)y,(void *)z,sizeof(InternalFPF));
+return;
+}
+
+
+/**********************
+** AddSubInternalFPF **
+***********************
+** Adding or subtracting internal-representation numbers.
+** Internal-representation numbers pointed to by x and y are
+** added/subtracted and the result returned in z.
+*/
+static void AddSubInternalFPF(uchar operation,
+ InternalFPF *x,
+ InternalFPF *y,
+ InternalFPF *z)
+{
+int exponent_difference;
+u16 borrow;
+u16 carry;
+int i;
+InternalFPF locx,locy; /* Needed since we alter them */
+
+/*
+** Following big switch statement handles the
+** various combinations of operand types.
+*/
+switch ((x->type * IFPF_TYPE_COUNT) + y->type)
+{
+case ZERO_ZERO:
+ my_memmove((void *)x,(void *)z,sizeof(InternalFPF));
+ if (x->sign ^ y->sign ^ operation)
+ {
+ z->sign = 0; /* positive */
+ }
+ break;
+
+case NAN_ZERO:
+case NAN_SUBNORMAL:
+case NAN_NORMAL:
+case NAN_INFINITY:
+case SUBNORMAL_ZERO:
+case NORMAL_ZERO:
+case INFINITY_ZERO:
+case INFINITY_SUBNORMAL:
+case INFINITY_NORMAL:
+ my_memmove((void *)x,(void *)z,sizeof(InternalFPF));
+ break;
+
+
+case ZERO_NAN:
+case SUBNORMAL_NAN:
+case NORMAL_NAN:
+case INFINITY_NAN:
+ my_memmove((void *)y,(void *)z,sizeof(InternalFPF));
+ break;
+
+case ZERO_SUBNORMAL:
+case ZERO_NORMAL:
+case ZERO_INFINITY:
+case SUBNORMAL_INFINITY:
+case NORMAL_INFINITY:
+ my_memmove((void *)y,(void *)z,sizeof(InternalFPF));
+ z->sign ^= operation;
+ break;
+
+case SUBNORMAL_SUBNORMAL:
+case SUBNORMAL_NORMAL:
+case NORMAL_SUBNORMAL:
+case NORMAL_NORMAL:
+ /*
+ ** Copy x and y to locals, since we may have
+ ** to alter them.
+ */
+ my_memmove((void *)&locx,(void *)x,sizeof(InternalFPF));
+ my_memmove((void *)&locy,(void *)y,sizeof(InternalFPF));
+
+ /* compute sum/difference */
+ exponent_difference = locx.exp-locy.exp;
+ if (exponent_difference == 0)
+ {
+ /*
+ ** locx.exp == locy.exp
+ ** so, no shifting required
+ */
+ if (locx.type == IFPF_IS_SUBNORMAL ||
+ locy.type == IFPF_IS_SUBNORMAL)
+ z->type = IFPF_IS_SUBNORMAL;
+ else
+ z->type = IFPF_IS_NORMAL;
+
+ /*
+ ** Assume that locx.mantissa > locy.mantissa
+ */
+ z->sign = locx.sign;
+ z->exp= locx.exp;
+ }
+ else
+ if (exponent_difference > 0)
+ {
+ /*
+ ** locx.exp > locy.exp
+ */
+ StickyShiftRightMant(&locy,
+ exponent_difference);
+ z->type = locx.type;
+ z->sign = locx.sign;
+ z->exp = locx.exp;
+ }
+ else /* if (exponent_difference < 0) */
+ {
+ /*
+ ** locx.exp < locy.exp
+ */
+ StickyShiftRightMant(&locx,
+ -exponent_difference);
+ z->type = locy.type;
+ z->sign = locy.sign ^ operation;
+ z->exp = locy.exp;
+ }
+
+ if (locx.sign ^ locy.sign ^ operation)
+ {
+ /*
+ ** Signs are different, subtract mantissas
+ */
+ borrow = 0;
+ for (i=(INTERNAL_FPF_PRECISION-1); i>=0; i--)
+ Sub16Bits(&borrow,
+ &z->mantissa[i],
+ locx.mantissa[i],
+ locy.mantissa[i]);
+
+ if (borrow)
+ {
+ /* The y->mantissa was larger than the
+ ** x->mantissa leaving a negative
+ ** result. Change the result back to
+ ** an unsigned number and flip the
+ ** sign flag.
+ */
+ z->sign = locy.sign ^ operation;
+ borrow = 0;
+ for (i=(INTERNAL_FPF_PRECISION-1); i>=0; i--)
+ {
+ Sub16Bits(&borrow,
+ &z->mantissa[i],
+ 0,
+ z->mantissa[i]);
+ }
+ }
+ else
+ {
+ /* The assumption made above
+ ** (i.e. x->mantissa >= y->mantissa)
+ ** was correct. Therefore, do nothing.
+ ** z->sign = x->sign;
+ */
+ }
+
+ if (IsMantissaZero(z->mantissa))
+ {
+ z->type = IFPF_IS_ZERO;
+ z->sign = 0; /* positive */
+ }
+ else
+ if (locx.type == IFPF_IS_NORMAL ||
+ locy.type == IFPF_IS_NORMAL)
+ {
+ normalize(z);
+ }
+ }
+ else
+ {
+ /* signs are the same, add mantissas */
+ carry = 0;
+ for (i=(INTERNAL_FPF_PRECISION-1); i>=0; i--)
+ {
+ Add16Bits(&carry,
+ &z->mantissa[i],
+ locx.mantissa[i],
+ locy.mantissa[i]);
+ }
+
+ if (carry)
+ {
+ z->exp++;
+ carry=0;
+ ShiftMantRight1(&carry,z->mantissa);
+ z->mantissa[0] |= 0x8000;
+ z->type = IFPF_IS_NORMAL;
+ }
+ else
+ if (z->mantissa[0] & 0x8000)
+ z->type = IFPF_IS_NORMAL;
+ }
+ break;
+
+case INFINITY_INFINITY:
+ SetInternalFPFNaN(z);
+ break;
+
+case NAN_NAN:
+ choose_nan(x, y, z, 1);
+ break;
+}
+
+/*
+** All the math is done; time to round.
+*/
+RoundInternalFPF(z);
+return;
+}
+
+
+/************************
+** MultiplyInternalFPF **
+*************************
+** Two internal-representation numbers x and y are multiplied; the
+** result is returned in z.
+*/
+static void MultiplyInternalFPF(InternalFPF *x,
+ InternalFPF *y,
+ InternalFPF *z)
+{
+int i;
+int j;
+u16 carry;
+u16 extra_bits[INTERNAL_FPF_PRECISION];
+InternalFPF locy; /* Needed since this will be altered */
+/*
+** As in the preceding function, this large switch
+** statement selects among the many combinations
+** of operands.
+*/
+switch ((x->type * IFPF_TYPE_COUNT) + y->type)
+{
+case INFINITY_SUBNORMAL:
+case INFINITY_NORMAL:
+case INFINITY_INFINITY:
+case ZERO_ZERO:
+case ZERO_SUBNORMAL:
+case ZERO_NORMAL:
+ my_memmove((void *)x,(void *)z,sizeof(InternalFPF));
+ z->sign ^= y->sign;
+ break;
+
+case SUBNORMAL_INFINITY:
+case NORMAL_INFINITY:
+case SUBNORMAL_ZERO:
+case NORMAL_ZERO:
+ my_memmove((void *)y,(void *)z,sizeof(InternalFPF));
+ z->sign ^= x->sign;
+ break;
+
+case ZERO_INFINITY:
+case INFINITY_ZERO:
+ SetInternalFPFNaN(z);
+ break;
+
+case NAN_ZERO:
+case NAN_SUBNORMAL:
+case NAN_NORMAL:
+case NAN_INFINITY:
+ my_memmove((void *)x,(void *)z,sizeof(InternalFPF));
+ break;
+
+case ZERO_NAN:
+case SUBNORMAL_NAN:
+case NORMAL_NAN:
+case INFINITY_NAN:
+ my_memmove((void *)y,(void *)z,sizeof(InternalFPF));
+ break;
+
+
+case SUBNORMAL_SUBNORMAL:
+case SUBNORMAL_NORMAL:
+case NORMAL_SUBNORMAL:
+case NORMAL_NORMAL:
+ /*
+ ** Make a local copy of the y number, since we will be
+ ** altering it in the process of multiplying.
+ */
+ my_memmove((void *)&locy,(void *)y,sizeof(InternalFPF));
+
+ /*
+ ** Check for unnormal zero arguments
+ */
+ if (IsMantissaZero(x->mantissa) || IsMantissaZero(y->mantissa))
+ SetInternalFPFInfinity(z, 0);
+
+ /*
+ ** Initialize the result
+ */
+ if (x->type == IFPF_IS_SUBNORMAL ||
+ y->type == IFPF_IS_SUBNORMAL)
+ z->type = IFPF_IS_SUBNORMAL;
+ else
+ z->type = IFPF_IS_NORMAL;
+
+ z->sign = x->sign ^ y->sign;
+ z->exp = x->exp + y->exp ;
+ for (i=0; i<INTERNAL_FPF_PRECISION; i++)
+ {
+ z->mantissa[i] = 0;
+ extra_bits[i] = 0;
+ }
+
+ for (i=0; i<(INTERNAL_FPF_PRECISION*16); i++)
+ {
+ /*
+ ** Get rightmost bit of the multiplier
+ */
+ carry = 0;
+ ShiftMantRight1(&carry, locy.mantissa);
+ if (carry)
+ {
+ /*
+ ** Add the multiplicand to the product
+ */
+ carry = 0;
+ for (j=(INTERNAL_FPF_PRECISION-1); j>=0; j--)
+ Add16Bits(&carry,
+ &z->mantissa[j],
+ z->mantissa[j],
+ x->mantissa[j]);
+ }
+ else
+ {
+ carry = 0;
+ }
+
+ /*
+ ** Shift the product right. Overflow bits get
+ ** shifted into extra_bits. We'll use it later
+ ** to help with the "sticky" bit.
+ */
+ ShiftMantRight1(&carry, z->mantissa);
+ ShiftMantRight1(&carry, extra_bits);
+ }
+
+ /*
+ ** Normalize
+ ** Note that we use a "special" normalization routine
+ ** because we need to use the extra bits. (These are
+ ** bits that may have been shifted off the bottom that
+ ** we want to reclaim...if we can.
+ */
+ while ((z->mantissa[0] & 0x8000) == 0)
+ {
+ carry = 0;
+ ShiftMantLeft1(&carry, extra_bits);
+ ShiftMantLeft1(&carry, z->mantissa);
+ z->exp--;
+ }
+
+ /*
+ ** Set the sticky bit if any bits set in extra bits.
+ */
+ if (IsMantissaZero(extra_bits))
+ {
+ z->mantissa[INTERNAL_FPF_PRECISION-1] |= 1;
+ }
+ break;
+
+case NAN_NAN:
+ choose_nan(x, y, z, 0);
+ break;
+}
+
+/*
+** All math done...do rounding.
+*/
+RoundInternalFPF(z);
+return;
+}
+
+
+/**********************
+** DivideInternalFPF **
+***********************
+** Divide internal FPF number x by y. Return result in z.
+*/
+static void DivideInternalFPF(InternalFPF *x,
+ InternalFPF *y,
+ InternalFPF *z)
+{
+int i;
+int j;
+u16 carry;
+u16 extra_bits[INTERNAL_FPF_PRECISION];
+InternalFPF locx; /* Local for x number */
+
+/*
+** As with preceding function, the following switch
+** statement selects among the various possible
+** operands.
+*/
+switch ((x->type * IFPF_TYPE_COUNT) + y->type)
+{
+case ZERO_ZERO:
+case INFINITY_INFINITY:
+ SetInternalFPFNaN(z);
+ break;
+
+case ZERO_SUBNORMAL:
+case ZERO_NORMAL:
+ if (IsMantissaZero(y->mantissa))
+ {
+ SetInternalFPFNaN(z);
+ break;
+ }
+
+case ZERO_INFINITY:
+case SUBNORMAL_INFINITY:
+case NORMAL_INFINITY:
+ SetInternalFPFZero(z, x->sign ^ y->sign);
+ break;
+
+case SUBNORMAL_ZERO:
+case NORMAL_ZERO:
+ if (IsMantissaZero(x->mantissa))
+ {
+ SetInternalFPFNaN(z);
+ break;
+ }
+
+case INFINITY_ZERO:
+case INFINITY_SUBNORMAL:
+case INFINITY_NORMAL:
+ SetInternalFPFInfinity(z, 0);
+ z->sign = x->sign ^ y->sign;
+ break;
+
+case NAN_ZERO:
+case NAN_SUBNORMAL:
+case NAN_NORMAL:
+case NAN_INFINITY:
+ my_memmove((void *)x,(void *)z,sizeof(InternalFPF));
+ break;
+
+case ZERO_NAN:
+case SUBNORMAL_NAN:
+case NORMAL_NAN:
+case INFINITY_NAN:
+ my_memmove((void *)y,(void *)z,sizeof(InternalFPF));
+ break;
+
+case SUBNORMAL_SUBNORMAL:
+case NORMAL_SUBNORMAL:
+case SUBNORMAL_NORMAL:
+case NORMAL_NORMAL:
+ /*
+ ** Make local copy of x number, since we'll be
+ ** altering it in the process of dividing.
+ */
+ my_memmove((void *)&locx,(void *)x,sizeof(InternalFPF));
+
+ /*
+ ** Check for unnormal zero arguments
+ */
+ if (IsMantissaZero(locx.mantissa))
+ {
+ if (IsMantissaZero(y->mantissa))
+ SetInternalFPFNaN(z);
+ else
+ SetInternalFPFZero(z, 0);
+ break;
+ }
+ if (IsMantissaZero(y->mantissa))
+ {
+ SetInternalFPFInfinity(z, 0);
+ break;
+ }
+
+ /*
+ ** Initialize the result
+ */
+ z->type = x->type;
+ z->sign = x->sign ^ y->sign;
+ z->exp = x->exp - y->exp +
+ ((INTERNAL_FPF_PRECISION * 16 * 2));
+ for (i=0; i<INTERNAL_FPF_PRECISION; i++)
+ {
+ z->mantissa[i] = 0;
+ extra_bits[i] = 0;
+ }
+
+ while ((z->mantissa[0] & 0x8000) == 0)
+ {
+ carry = 0;
+ ShiftMantLeft1(&carry, locx.mantissa);
+ ShiftMantLeft1(&carry, extra_bits);
+
+ /*
+ ** Time to subtract yet?
+ */
+ if (carry == 0)
+ for (j=0; j<INTERNAL_FPF_PRECISION; j++)
+ {
+ if (y->mantissa[j] > extra_bits[j])
+ {
+ carry = 0;
+ goto no_subtract;
+ }
+ if (y->mantissa[j] < extra_bits[j])
+ break;
+ }
+ /*
+ ** Divisor (y) <= dividend (x), subtract
+ */
+ carry = 0;
+ for (j=(INTERNAL_FPF_PRECISION-1); j>=0; j--)
+ Sub16Bits(&carry,
+ &extra_bits[j],
+ extra_bits[j],
+ y->mantissa[j]);
+ carry = 1; /* 1 shifted into quotient */
+ no_subtract:
+ ShiftMantLeft1(&carry, z->mantissa);
+ z->exp--;
+ }
+ break;
+
+case NAN_NAN:
+ choose_nan(x, y, z, 0);
+ break;
+}
+
+/*
+** Math complete...do rounding
+*/
+RoundInternalFPF(z);
+}
+
+/**********************
+** LongToInternalFPF **
+** Int32ToInternalFPF **
+***********************
+** Convert a signed (long) 32-bit integer into an internal FPF number.
+*/
+/* static void LongToInternalFPF(long mylong, */
+static void Int32ToInternalFPF(int32 mylong,
+ InternalFPF *dest)
+{
+int i; /* Index */
+u16 myword; /* Used to hold converted stuff */
+/*
+** Save the sign and get the absolute value. This will help us
+** with 64-bit machines, since we use only the lower 32
+** bits just in case. (No longer necessary after we use int32.)
+*/
+/* if(mylong<0L) */
+if(mylong<(int32)0)
+{ dest->sign=1;
+ mylong=(int32)0-mylong;
+}
+else
+ dest->sign=0;
+/*
+** Prepare the destination floating point number
+*/
+dest->type=IFPF_IS_NORMAL;
+for(i=0;i<INTERNAL_FPF_PRECISION;i++)
+ dest->mantissa[i]=0;
+
+/*
+** See if we've got a zero. If so, make the resultant FP
+** number a true zero and go home.
+*/
+if(mylong==0)
+{ dest->type=IFPF_IS_ZERO;
+ dest->exp=0;
+ return;
+}
+
+/*
+** Not a true zero. Set the exponent to 32 (internal FPFs have
+** no bias) and load the low and high words into their proper
+** locations in the mantissa. Then normalize. The action of
+** normalizing slides the mantissa bits into place and sets
+** up the exponent properly.
+*/
+dest->exp=32;
+myword=(u16)((mylong >> 16) & 0xFFFFL);
+dest->mantissa[0]=myword;
+myword=(u16)(mylong & 0xFFFFL);
+dest->mantissa[1]=myword;
+normalize(dest);
+return;
+}
+
+#if 1
+/************************
+** InternalFPFToString **
+*************************
+** FOR DEBUG PURPOSES
+** This routine converts an internal floating point representation
+** number to a string. Used in debugging the package.
+** Returns length of converted number.
+** NOTE: dest must point to a buffer big enough to hold the
+** result. Also, this routine does append a null (an effect
+** of using the sprintf() function). It also returns
+** a length count.
+** NOTE: This routine returns 5 significant digits. Thats
+** about all I feel safe with, given the method of
+** conversion. It should be more than enough for programmers
+** to determine whether the package is properly ported.
+*/
+static int InternalFPFToString(char *dest,
+ InternalFPF *src)
+{
+InternalFPF locFPFNum; /* Local for src (will be altered) */
+InternalFPF IFPF10; /* Floating-point 10 */
+InternalFPF IFPFComp; /* For doing comparisons */
+int msign; /* Holding for mantissa sign */
+int expcount; /* Exponent counter */
+int ccount; /* Character counter */
+int i,j,k; /* Index */
+u16 carryaccum; /* Carry accumulator */
+u16 mycarry; /* Local for carry */
+
+/*
+** Check first for the simple things...Nan, Infinity, Zero.
+** If found, copy the proper string in and go home.
+*/
+switch(src->type)
+{
+ case IFPF_IS_NAN:
+ my_memcpy(dest,"NaN",3);
+ return(3);
+
+ case IFPF_IS_INFINITY:
+ if(src->sign==0)
+ my_memcpy(dest,"+Inf",4);
+ else
+ my_memcpy(dest,"-Inf",4);
+ return(4);
+
+ case IFPF_IS_ZERO:
+ if(src->sign==0)
+ my_memcpy(dest,"+0",2);
+ else
+ my_memcpy(dest,"-0",2);
+ return(2);
+}
+
+/*
+** Move the internal number into our local holding area, since
+** we'll be altering it to print it out.
+*/
+my_memcpy((void *)&locFPFNum,(void *)src,sizeof(InternalFPF));
+
+/*
+** Set up a floating-point 10...which we'll use a lot in a minute.
+*/
+/* LongToInternalFPF(10L,&IFPF10); */
+Int32ToInternalFPF((int32)10,&IFPF10);
+
+/*
+** Save the mantissa sign and make it positive.
+*/
+msign=src->sign;
+
+/* src->sign=0 */ /* bug, fixed Nov. 13, 1997 */
+(&locFPFNum)->sign=0;
+
+expcount=0; /* Init exponent counter */
+
+/*
+** See if the number is less than 10. If so, multiply
+** the number repeatedly by 10 until it's not. For each
+** multiplication, decrement a counter so we can keep track
+** of the exponent.
+*/
+
+while(1)
+{ AddSubInternalFPF(1,&locFPFNum,&IFPF10,&IFPFComp);
+ if(IFPFComp.sign==0) break;
+ MultiplyInternalFPF(&locFPFNum,&IFPF10,&IFPFComp);
+ expcount--;
+ my_memcpy((void *)&locFPFNum,(void *)&IFPFComp,sizeof(InternalFPF));
+}
+/*
+** Do the reverse of the above. As long as the number is
+** greater than or equal to 10, divide it by 10. Increment the
+** exponent counter for each multiplication.
+*/
+
+while(1)
+{
+ AddSubInternalFPF(1,&locFPFNum,&IFPF10,&IFPFComp);
+ if(IFPFComp.sign!=0) break;
+ DivideInternalFPF(&locFPFNum,&IFPF10,&IFPFComp);
+ expcount++;
+ my_memcpy((void *)&locFPFNum,(void *)&IFPFComp,sizeof(InternalFPF));
+}
+
+/*
+** About time to start storing things. First, store the
+** mantissa sign.
+*/
+ccount=1; /* Init character counter */
+if(msign==0)
+ *dest++='+';
+else
+ *dest++='-';
+
+/*
+** At this point we know that the number is in the range
+** 10 > n >=1. We need to "strip digits" out of the
+** mantissa. We do this by treating the mantissa as
+** an integer and multiplying by 10. (Not a floating-point
+** 10, but an integer 10. Since this is debug code and we
+** could care less about speed, we'll do it the stupid
+** way and simply add the number to itself 10 times.
+** Anything that makes it to the left of the implied binary point
+** gets stripped off and emitted. We'll do this for
+** 5 significant digits (which should be enough to
+** verify things).
+*/
+/*
+** Re-position radix point
+*/
+carryaccum=0;
+while(locFPFNum.exp>0)
+{
+ mycarry=0;
+ ShiftMantLeft1(&mycarry,locFPFNum.mantissa);
+ carryaccum=(carryaccum<<1);
+ if(mycarry) carryaccum++;
+ locFPFNum.exp--;
+}
+
+while(locFPFNum.exp<0)
+{
+ mycarry=0;
+ ShiftMantRight1(&mycarry,locFPFNum.mantissa);
+ locFPFNum.exp++;
+}
+
+for(i=0;i<6;i++)
+ if(i==1)
+ { /* Emit decimal point */
+ *dest++='.';
+ ccount++;
+ }
+ else
+ { /* Emit a digit */
+ *dest++=('0'+carryaccum);
+ ccount++;
+
+ carryaccum=0;
+ my_memcpy((void *)&IFPF10,
+ (void *)&locFPFNum,
+ sizeof(InternalFPF));
+
+ /* Do multiply via repeated adds */
+ for(j=0;j<9;j++)
+ {
+ mycarry=0;
+ for(k=(INTERNAL_FPF_PRECISION-1);k>=0;k--)
+ Add16Bits(&mycarry,&(IFPFComp.mantissa[k]),
+ locFPFNum.mantissa[k],
+ IFPF10.mantissa[k]);
+ carryaccum+=mycarry ? 1 : 0;
+ my_memcpy((void *)&locFPFNum,
+ (void *)&IFPFComp,
+ sizeof(InternalFPF));
+ }
+ }
+
+/*
+** Now move the 'E', the exponent sign, and the exponent
+** into the string.
+*/
+*dest++='E';
+
+/* sprint is supposed to return an integer, but it caused problems on SunOS
+ * with the native cc. Hence we force it.
+ * Uwe F. Mayer
+ */
+if (expcount < 0) {
+ *dest++ = '-';
+ expcount =- expcount;
+}
+else *dest++ = ' ';
+
+*dest++ = (char)(expcount + '0');
+*dest++ = 0;
+
+ccount += 3;
+/*
+** All done, go home.
+*/
+return(ccount);
+
+}
+
+#endif
+
+
+
+////////////////////////////////////////////////////////////////////////
+static
+void* AllocateMemory ( unsigned long n, int* p )
+{
+ *p = 0;
+ void* r = (void*) (*serviceFn)(2,n);
+ return r;
+}
+static
+void FreeMemory ( void* p, int* zz )
+{
+ *zz = 0;
+ // free(p);
+}
+
+
+
+/**************
+** DoEmFloat **
+***************
+** Perform the floating-point emulation routines portion of the
+** CPU benchmark. Returns the operations per second.
+*/
+static
+void DoEmFloat(void)
+{
+EmFloatStruct *locemfloatstruct; /* Local structure */
+InternalFPF *abase; /* Base of A array */
+InternalFPF *bbase; /* Base of B array */
+InternalFPF *cbase; /* Base of C array */
+ulong tickcount; /* # of ticks */
+char *errorcontext; /* Error context string pointer */
+int systemerror; /* For holding error code */
+ulong loops; /* # of loops */
+
+/*
+** Link to global structure
+*/
+EmFloatStruct global_emfloatstruct;
+ global_emfloatstruct.adjust = 0;
+ global_emfloatstruct.request_secs = 0;
+ global_emfloatstruct.arraysize = 100;
+ global_emfloatstruct.loops = 1;
+ global_emfloatstruct.emflops = 0.0;
+locemfloatstruct=&global_emfloatstruct;
+
+/*
+** Set the error context
+*/
+errorcontext="CPU:Floating Emulation";
+
+
+abase=(InternalFPF *)AllocateMemory(locemfloatstruct->arraysize*sizeof(InternalFPF),
+ &systemerror);
+
+bbase=(InternalFPF *)AllocateMemory(locemfloatstruct->arraysize*sizeof(InternalFPF),
+ &systemerror);
+
+cbase=(InternalFPF *)AllocateMemory(locemfloatstruct->arraysize*sizeof(InternalFPF),
+ &systemerror);
+
+/*
+** Set up the arrays
+*/
+SetupCPUEmFloatArrays(abase,bbase,cbase,locemfloatstruct->arraysize);
+
+ loops=100;
+ tickcount=DoEmFloatIteration(abase,bbase,cbase,
+ locemfloatstruct->arraysize,
+ loops);
+
+FreeMemory((void *)abase,&systemerror);
+FreeMemory((void *)bbase,&systemerror);
+FreeMemory((void *)cbase,&systemerror);
+
+return;
+}
+
+//////////////////
+void entry ( HWord(*f)(HWord,HWord) )
+{
+ serviceFn = f;
+ vexxx_printf("starting\n");
+ DoEmFloat();
+ (*serviceFn)(0,0);
+}
diff --git a/main/VEX/switchback/test_hello.c b/main/VEX/switchback/test_hello.c
new file mode 100644
index 0000000..d4318d0
--- /dev/null
+++ b/main/VEX/switchback/test_hello.c
@@ -0,0 +1,20 @@
+
+
+static void bar ( void*(*service)(int,int) )
+{
+ int i;
+ for (i = 0; i < 100000; i++) ;
+ service(1, 'h');
+ service(1, 'e');
+ service(1, 'l');
+ service(1, 'l');
+ service(1, 'o');
+ service(1, '\n');
+}
+
+void entry ( void*(*service)(int,int) )
+{
+ bar(service);
+ service(0,0);
+}
+
diff --git a/main/VEX/switchback/test_ppc_jm1.c b/main/VEX/switchback/test_ppc_jm1.c
new file mode 100644
index 0000000..a17c75c
--- /dev/null
+++ b/main/VEX/switchback/test_ppc_jm1.c
@@ -0,0 +1,4613 @@
+
+/* HOW TO COMPILE FOR SWITCHBACK:
+
+ gcc -O -c test_ppc_jm1.c -mregnames -Wall
+
+*/
+
+#undef HAS_ALTIVEC
+#define NO_FLOAT
+#undef IS_PPC405
+
+
+/*
+ * test-ppc.c:
+ * PPC tests for qemu-PPC CPU emulation checks
+ *
+ * Copyright (c) 2005 Jocelyn Mayer
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License V2
+ * as published by the Free Software Foundation.
+ */
+
+/*
+ * Theory of operations:
+ * a few registers are reserved for the test program:
+ * r14 => r18
+ * f14 => f18
+ * I do preload test values in r14 thru r17 (or less, depending on the number
+ * of register operands needed), patch the test opcode if any immediate
+ * operands are required, execute the tested opcode.
+ * XER, CCR and FPSCR are cleared before every test.
+ * I always get the result in r17 and also save XER and CCR for fixed-point
+ * operations. I also check FPSCR for floating points operations.
+ *
+ * Improvments:
+ * a more cleaver FPSCR management is needed: for now, I always test
+ * the round-to-zero case. Other rounding modes also need to be tested.
+ */
+
+#include <stdint.h>
+//#include <stdlib.h>
+//#include <stdio.h>
+//#include <string.h>
+//#include <unistd.h>
+//#include <fcntl.h>
+//#include <ctype.h>
+//#include <math.h>
+//#include <fenv.h>
+
+#define NULL ((void*)0)
+
+//#include "test-ppc.h"
+
+// BEGIN #include "test-ppc.h"
+/*
+ * test-ppc.h:
+ * PPC tests for qemu-PPC CPU emulation checks - definitions
+ *
+ * Copyright (c) 2005 Jocelyn Mayer
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License V2
+ * as published by the Free Software Foundation.
+ */
+
+#if !defined (__TEST_PPC_H__)
+#define __TEST_PPC_H__
+
+typedef void (*test_func_t) (void);
+typedef struct test_t test_t;
+typedef struct test_table_t test_table_t;
+struct test_t {
+ test_func_t func;
+ const unsigned char *name;
+};
+
+struct test_table_t {
+ test_t *tests;
+ const unsigned char *name;
+ int flags;
+};
+
+typedef void (*test_loop_t) (const unsigned char *name, test_func_t func);
+
+enum test_flags {
+ /* Nb arguments */
+ PPC_ONE_ARG = 0x00000001,
+ PPC_TWO_ARGS = 0x00000002,
+ PPC_THREE_ARGS = 0x00000003,
+ PPC_CMP_ARGS = 0x00000004,
+ PPC_CMPI_ARGS = 0x00000005,
+ PPC_TWO_I16 = 0x00000006,
+ PPC_SPECIAL = 0x00000007,
+ PPC_NB_ARGS = 0x0000000F,
+ /* Type */
+ PPC_ARITH = 0x00000100,
+ PPC_LOGICAL = 0x00000200,
+ PPC_COMPARE = 0x00000300,
+ PPC_CROP = 0x00000400,
+ PPC_TYPE = 0x00000F00,
+ /* Family */
+ PPC_INTEGER = 0x00010000,
+ PPC_FLOAT = 0x00020000,
+ PPC_405 = 0x00030000,
+ PPC_ALTIVEC = 0x00040000,
+ PPC_FALTIVEC = 0x00050000,
+ PPC_FAMILY = 0x000F0000,
+ /* Flags */
+ PPC_CR = 0x01000000,
+};
+
+#endif /* !defined (__TEST_PPC_H__) */
+
+// END #include "test-ppc.h"
+
+
+
+
+//#define DEBUG_ARGS_BUILD
+#if defined (DEBUG_ARGS_BUILD)
+#define AB_DPRINTF(fmt, args...) do { vexxx_printf(fmt , ##args); } while (0)
+#else
+#define AB_DPRINTF(fmt, args...) do { } while (0)
+#endif
+
+//#define DEBUG_FILTER
+#if defined (DEBUG_FILTER)
+#define FDPRINTF(fmt, args...) do { vexxx_printf(fmt , ##args); } while (0)
+#else
+#define FDPRINTF(fmt, args...) do { } while (0)
+#endif
+
+#if !defined (NO_FLOAT)
+register double f14 __asm__ ("f14");
+register double f15 __asm__ ("f15");
+register double f16 __asm__ ("f16");
+register double f17 __asm__ ("f17");
+register double f18 __asm__ ("f18");
+#endif
+register uint32_t r14 __asm__ ("r14");
+register uint32_t r15 __asm__ ("r15");
+register uint32_t r16 __asm__ ("r16");
+register uint32_t r17 __asm__ ("r17");
+register uint32_t r18 __asm__ ("r18");
+
+
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+
+/* Something which has the same size as void* on the host. That is,
+ it is 32 bits on a 32-bit host and 64 bits on a 64-bit host, and so
+ it can safely be coerced to and from a pointer type on the host
+ machine. */
+typedef unsigned long HWord;
+typedef char HChar;
+typedef signed int Int;
+typedef unsigned int UInt;
+typedef unsigned char UChar;
+
+typedef signed long long int Long;
+typedef unsigned long long int ULong;
+
+typedef unsigned char Bool;
+#define True ((Bool)1)
+#define False ((Bool)0)
+
+
+//#include "/home/sewardj/VEX/trunk/pub/libvex_basictypes.h"
+
+static HWord (*serviceFn)(HWord,HWord) = 0;
+
+static Bool my_isspace ( UChar c )
+{
+ return c == ' '
+ || c == '\f'
+ || c == '\n'
+ || c == '\r'
+ || c == '\t'
+ || c == '\v';
+}
+
+#if 0 // unused
+static char* my_strcpy ( char* dest, const char* src )
+{
+ char* dest_orig = dest;
+ while (*src) *dest++ = *src++;
+ *dest = 0;
+ return dest_orig;
+}
+
+static void* my_memcpy ( void *dest, const void *src, int sz )
+{
+ const char *s = (const char *)src;
+ char *d = (char *)dest;
+
+ while (sz--)
+ *d++ = *s++;
+
+ return dest;
+}
+
+static void* my_memmove( void *dst, const void *src, unsigned int len )
+{
+ register char *d;
+ register char *s;
+ if ( dst > src ) {
+ d = (char *)dst + len - 1;
+ s = (char *)src + len - 1;
+ while ( len >= 4 ) {
+ *d-- = *s--;
+ *d-- = *s--;
+ *d-- = *s--;
+ *d-- = *s--;
+ len -= 4;
+ }
+ while ( len-- ) {
+ *d-- = *s--;
+ }
+ } else if ( dst < src ) {
+ d = (char *)dst;
+ s = (char *)src;
+ while ( len >= 4 ) {
+ *d++ = *s++;
+ *d++ = *s++;
+ *d++ = *s++;
+ *d++ = *s++;
+ len -= 4;
+ }
+ while ( len-- ) {
+ *d++ = *s++;
+ }
+ }
+ return dst;
+}
+#endif
+
+char* my_strcat ( char* dest, const char* src )
+{
+ char* dest_orig = dest;
+ while (*dest) dest++;
+ while (*src) *dest++ = *src++;
+ *dest = 0;
+ return dest_orig;
+}
+
+int my_strcmp ( const char* s1, const char* s2 )
+{
+ register unsigned char c1;
+ register unsigned char c2;
+ while (True) {
+ c1 = *(unsigned char *)s1;
+ c2 = *(unsigned char *)s2;
+ if (c1 != c2) break;
+ if (c1 == 0) break;
+ s1++; s2++;
+ }
+ if ((unsigned char)c1 < (unsigned char)c2) return -1;
+ if ((unsigned char)c1 > (unsigned char)c2) return 1;
+ return 0;
+}
+
+
+int my_memcmp ( const void *s1V, const void *s2V, int n )
+{
+ int res;
+ unsigned char a0;
+ unsigned char b0;
+ unsigned char* s1 = (unsigned char*)s1V;
+ unsigned char* s2 = (unsigned char*)s2V;
+
+ while (n != 0) {
+ a0 = s1[0];
+ b0 = s2[0];
+ s1 += 1;
+ s2 += 1;
+ res = ((int)a0) - ((int)b0);
+ if (res != 0)
+ return res;
+ n -= 1;
+ }
+ return 0;
+}
+
+char* my_strchr ( const char* s, int c )
+{
+ UChar ch = (UChar)((UInt)c);
+ UChar* p = (UChar*)s;
+ while (True) {
+ if (*p == ch) return p;
+ if (*p == 0) return NULL;
+ p++;
+ }
+}
+
+void* my_malloc ( int n )
+{
+ void* r = (void*) (*serviceFn)(2,n);
+ return r;
+}
+
+
+/////////////////////////////////////////////////////////////////////
+
+static void vexxx_log_bytes ( char* p, int n )
+{
+ int i;
+ for (i = 0; i < n; i++)
+ (*serviceFn)( 1, (int)p[i] );
+}
+
+/*---------------------------------------------------------*/
+/*--- vexxx_printf ---*/
+/*---------------------------------------------------------*/
+
+/* This should be the only <...> include in the entire VEX library.
+ New code for vex_util.c should go above this point. */
+#include <stdarg.h>
+
+static HChar vexxx_toupper ( HChar c )
+{
+ if (c >= 'a' && c <= 'z')
+ return c + ('A' - 'a');
+ else
+ return c;
+}
+
+static Int vexxx_strlen ( const HChar* str )
+{
+ Int i = 0;
+ while (str[i] != 0) i++;
+ return i;
+}
+
+Bool vexxx_streq ( const HChar* s1, const HChar* s2 )
+{
+ while (True) {
+ if (*s1 == 0 && *s2 == 0)
+ return True;
+ if (*s1 != *s2)
+ return False;
+ s1++;
+ s2++;
+ }
+}
+
+/* Some flags. */
+#define VG_MSG_SIGNED 1 /* The value is signed. */
+#define VG_MSG_ZJUSTIFY 2 /* Must justify with '0'. */
+#define VG_MSG_LJUSTIFY 4 /* Must justify on the left. */
+#define VG_MSG_PAREN 8 /* Parenthesize if present (for %y) */
+#define VG_MSG_COMMA 16 /* Add commas to numbers (for %d, %u) */
+
+/* Copy a string into the buffer. */
+static UInt
+myvprintf_str ( void(*send)(HChar), Int flags, Int width, HChar* str,
+ Bool capitalise )
+{
+# define MAYBE_TOUPPER(ch) (capitalise ? vexxx_toupper(ch) : (ch))
+ UInt ret = 0;
+ Int i, extra;
+ Int len = vexxx_strlen(str);
+
+ if (width == 0) {
+ ret += len;
+ for (i = 0; i < len; i++)
+ send(MAYBE_TOUPPER(str[i]));
+ return ret;
+ }
+
+ if (len > width) {
+ ret += width;
+ for (i = 0; i < width; i++)
+ send(MAYBE_TOUPPER(str[i]));
+ return ret;
+ }
+
+ extra = width - len;
+ if (flags & VG_MSG_LJUSTIFY) {
+ ret += extra;
+ for (i = 0; i < extra; i++)
+ send(' ');
+ }
+ ret += len;
+ for (i = 0; i < len; i++)
+ send(MAYBE_TOUPPER(str[i]));
+ if (!(flags & VG_MSG_LJUSTIFY)) {
+ ret += extra;
+ for (i = 0; i < extra; i++)
+ send(' ');
+ }
+
+# undef MAYBE_TOUPPER
+
+ return ret;
+}
+
+/* Write P into the buffer according to these args:
+ * If SIGN is true, p is a signed.
+ * BASE is the base.
+ * If WITH_ZERO is true, '0' must be added.
+ * WIDTH is the width of the field.
+ */
+static UInt
+myvprintf_int64 ( void(*send)(HChar), Int flags, Int base, Int width, ULong pL)
+{
+ HChar buf[40];
+ Int ind = 0;
+ Int i, nc = 0;
+ Bool neg = False;
+ HChar *digits = "0123456789ABCDEF";
+ UInt ret = 0;
+ UInt p = (UInt)pL;
+
+ if (base < 2 || base > 16)
+ return ret;
+
+ if ((flags & VG_MSG_SIGNED) && (Int)p < 0) {
+ p = - (Int)p;
+ neg = True;
+ }
+
+ if (p == 0)
+ buf[ind++] = '0';
+ else {
+ while (p > 0) {
+ if ((flags & VG_MSG_COMMA) && 10 == base &&
+ 0 == (ind-nc) % 3 && 0 != ind)
+ {
+ buf[ind++] = ',';
+ nc++;
+ }
+ buf[ind++] = digits[p % base];
+ p /= base;
+ }
+ }
+
+ if (neg)
+ buf[ind++] = '-';
+
+ if (width > 0 && !(flags & VG_MSG_LJUSTIFY)) {
+ for(; ind < width; ind++) {
+ //vassert(ind < 39);
+ buf[ind] = ((flags & VG_MSG_ZJUSTIFY) ? '0': ' ');
+ }
+ }
+
+ /* Reverse copy to buffer. */
+ ret += ind;
+ for (i = ind -1; i >= 0; i--) {
+ send(buf[i]);
+ }
+ if (width > 0 && (flags & VG_MSG_LJUSTIFY)) {
+ for(; ind < width; ind++) {
+ ret++;
+ send(' '); // Never pad with zeroes on RHS -- changes the value!
+ }
+ }
+ return ret;
+}
+
+
+/* A simple vprintf(). */
+static
+UInt vprintf_wrk ( void(*send)(HChar), const HChar *format, va_list vargs )
+{
+ UInt ret = 0;
+ int i;
+ int flags;
+ int width;
+ Bool is_long;
+
+ /* We assume that vargs has already been initialised by the
+ caller, using va_start, and that the caller will similarly
+ clean up with va_end.
+ */
+
+ for (i = 0; format[i] != 0; i++) {
+ if (format[i] != '%') {
+ send(format[i]);
+ ret++;
+ continue;
+ }
+ i++;
+ /* A '%' has been found. Ignore a trailing %. */
+ if (format[i] == 0)
+ break;
+ if (format[i] == '%') {
+ /* `%%' is replaced by `%'. */
+ send('%');
+ ret++;
+ continue;
+ }
+ flags = 0;
+ is_long = False;
+ width = 0; /* length of the field. */
+ if (format[i] == '(') {
+ flags |= VG_MSG_PAREN;
+ i++;
+ }
+ /* If ',' follows '%', commas will be inserted. */
+ if (format[i] == ',') {
+ flags |= VG_MSG_COMMA;
+ i++;
+ }
+ /* If '-' follows '%', justify on the left. */
+ if (format[i] == '-') {
+ flags |= VG_MSG_LJUSTIFY;
+ i++;
+ }
+ /* If '0' follows '%', pads will be inserted. */
+ if (format[i] == '0') {
+ flags |= VG_MSG_ZJUSTIFY;
+ i++;
+ }
+ /* Compute the field length. */
+ while (format[i] >= '0' && format[i] <= '9') {
+ width *= 10;
+ width += format[i++] - '0';
+ }
+ while (format[i] == 'l') {
+ i++;
+ is_long = True;
+ }
+
+ switch (format[i]) {
+ case 'd': /* %d */
+ flags |= VG_MSG_SIGNED;
+ if (is_long)
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, Long)));
+ else
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, Int)));
+ break;
+ case 'u': /* %u */
+ if (is_long)
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, ULong)));
+ else
+ ret += myvprintf_int64(send, flags, 10, width,
+ (ULong)(va_arg (vargs, UInt)));
+ break;
+ case 'p': /* %p */
+ ret += 2;
+ send('0');
+ send('x');
+ ret += myvprintf_int64(send, flags, 16, width,
+ (ULong)((HWord)va_arg (vargs, void *)));
+ break;
+ case 'x': /* %x */
+ if (is_long)
+ ret += myvprintf_int64(send, flags, 16, width,
+ (ULong)(va_arg (vargs, ULong)));
+ else
+ ret += myvprintf_int64(send, flags, 16, width,
+ (ULong)(va_arg (vargs, UInt)));
+ break;
+ case 'c': /* %c */
+ ret++;
+ send((va_arg (vargs, int)));
+ break;
+ case 's': case 'S': { /* %s */
+ char *str = va_arg (vargs, char *);
+ if (str == (char*) 0) str = "(null)";
+ ret += myvprintf_str(send, flags, width, str,
+ (format[i]=='S'));
+ break;
+ }
+# if 0
+ case 'y': { /* %y - print symbol */
+ Char buf[100];
+ Char *cp = buf;
+ Addr a = va_arg(vargs, Addr);
+
+ if (flags & VG_MSG_PAREN)
+ *cp++ = '(';
+ if (VG_(get_fnname_w_offset)(a, cp, sizeof(buf)-4)) {
+ if (flags & VG_MSG_PAREN) {
+ cp += VG_(strlen)(cp);
+ *cp++ = ')';
+ *cp = '\0';
+ }
+ ret += myvprintf_str(send, flags, width, buf, 0);
+ }
+ break;
+ }
+# endif
+ default:
+ break;
+ }
+ }
+ return ret;
+}
+
+
+/* A general replacement for printf(). Note that only low-level
+ debugging info should be sent via here. The official route is to
+ to use vg_message(). This interface is deprecated.
+*/
+static HChar myprintf_buf[1000];
+static Int n_myprintf_buf;
+
+static void add_to_myprintf_buf ( HChar c )
+{
+ if (c == '\n' || n_myprintf_buf >= 1000-10 /*paranoia*/ ) {
+ (*vexxx_log_bytes)( myprintf_buf, vexxx_strlen(myprintf_buf) );
+ n_myprintf_buf = 0;
+ myprintf_buf[n_myprintf_buf] = 0;
+ }
+ myprintf_buf[n_myprintf_buf++] = c;
+ myprintf_buf[n_myprintf_buf] = 0;
+}
+
+static UInt vexxx_printf ( const char *format, ... )
+{
+ UInt ret;
+ va_list vargs;
+ va_start(vargs,format);
+
+ n_myprintf_buf = 0;
+ myprintf_buf[n_myprintf_buf] = 0;
+ ret = vprintf_wrk ( add_to_myprintf_buf, format, vargs );
+
+ if (n_myprintf_buf > 0) {
+ (*vexxx_log_bytes)( myprintf_buf, n_myprintf_buf );
+ }
+
+ va_end(vargs);
+
+ return ret;
+}
+
+/*---------------------------------------------------------------*/
+/*--- end vex_util.c ---*/
+/*---------------------------------------------------------------*/
+
+
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+
+// BEGIN #include "ops-ppc.c"
+/*
+ * WARNING:
+ * This file has been auto-generated by './gen-ppc' program
+ * Please don't edit by hand
+ */
+
+
+//BEGIN #include "test-ppc.h"
+/*
+ * test-ppc.h:
+ * PPC tests for qemu-PPC CPU emulation checks - definitions
+ *
+ * Copyright (c) 2005 Jocelyn Mayer
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License V2
+ * as published by the Free Software Foundation.
+ */
+
+#if !defined (__TEST_PPC_H__)
+#define __TEST_PPC_H__
+
+typedef void (*test_func_t) (void);
+typedef struct test_t test_t;
+typedef struct test_table_t test_table_t;
+struct test_t {
+ test_func_t func;
+ const unsigned char *name;
+};
+
+struct test_table_t {
+ test_t *tests;
+ const unsigned char *name;
+ int flags;
+};
+
+typedef void (*test_loop_t) (const unsigned char *name, test_func_t func);
+
+enum test_flags {
+ /* Nb arguments */
+ PPC_ONE_ARG = 0x00000001,
+ PPC_TWO_ARGS = 0x00000002,
+ PPC_THREE_ARGS = 0x00000003,
+ PPC_CMP_ARGS = 0x00000004,
+ PPC_CMPI_ARGS = 0x00000005,
+ PPC_TWO_I16 = 0x00000006,
+ PPC_SPECIAL = 0x00000007,
+ PPC_NB_ARGS = 0x0000000F,
+ /* Type */
+ PPC_ARITH = 0x00000100,
+ PPC_LOGICAL = 0x00000200,
+ PPC_COMPARE = 0x00000300,
+ PPC_CROP = 0x00000400,
+ PPC_TYPE = 0x00000F00,
+ /* Family */
+ PPC_INTEGER = 0x00010000,
+ PPC_FLOAT = 0x00020000,
+ PPC_405 = 0x00030000,
+ PPC_ALTIVEC = 0x00040000,
+ PPC_FALTIVEC = 0x00050000,
+ PPC_FAMILY = 0x000F0000,
+ /* Flags */
+ PPC_CR = 0x01000000,
+};
+
+#endif /* !defined (__TEST_PPC_H__) */
+
+//END #include "test-ppc.h"
+
+static void test_add (void)
+{
+ __asm__ __volatile__ ("add 17, 14, 15");
+}
+
+static void test_addo (void)
+{
+ __asm__ __volatile__ ("addo 17, 14, 15");
+}
+
+static void test_addc (void)
+{
+ __asm__ __volatile__ ("addc 17, 14, 15");
+}
+
+static void test_addco (void)
+{
+ __asm__ __volatile__ ("addco 17, 14, 15");
+}
+
+static void test_adde (void)
+{
+ __asm__ __volatile__ ("adde 17, 14, 15");
+}
+
+static void test_addeo (void)
+{
+ __asm__ __volatile__ ("addeo 17, 14, 15");
+}
+
+static void test_divw (void)
+{
+ __asm__ __volatile__ ("divw 17, 14, 15");
+}
+
+static void test_divwo (void)
+{
+ __asm__ __volatile__ ("divwo 17, 14, 15");
+}
+
+static void test_divwu (void)
+{
+ __asm__ __volatile__ ("divwu 17, 14, 15");
+}
+
+static void test_divwuo (void)
+{
+ __asm__ __volatile__ ("divwuo 17, 14, 15");
+}
+
+static void test_mulhw (void)
+{
+ __asm__ __volatile__ ("mulhw 17, 14, 15");
+}
+
+static void test_mulhwu (void)
+{
+ __asm__ __volatile__ ("mulhwu 17, 14, 15");
+}
+
+static void test_mullw (void)
+{
+ __asm__ __volatile__ ("mullw 17, 14, 15");
+}
+
+static void test_mullwo (void)
+{
+ __asm__ __volatile__ ("mullwo 17, 14, 15");
+}
+
+static void test_subf (void)
+{
+ __asm__ __volatile__ ("subf 17, 14, 15");
+}
+
+static void test_subfo (void)
+{
+ __asm__ __volatile__ ("subfo 17, 14, 15");
+}
+
+static void test_subfc (void)
+{
+ __asm__ __volatile__ ("subfc 17, 14, 15");
+}
+
+static void test_subfco (void)
+{
+ __asm__ __volatile__ ("subfco 17, 14, 15");
+}
+
+static void test_subfe (void)
+{
+ __asm__ __volatile__ ("subfe 17, 14, 15");
+}
+
+static void test_subfeo (void)
+{
+ __asm__ __volatile__ ("subfeo 17, 14, 15");
+}
+
+static test_t tests_ia_ops_two[] = {
+ { &test_add , " add", },
+ { &test_addo , " addo", },
+ { &test_addc , " addc", },
+ { &test_addco , " addco", },
+ { &test_adde , " adde", },
+ { &test_addeo , " addeo", },
+ { &test_divw , " divw", },
+ { &test_divwo , " divwo", },
+ { &test_divwu , " divwu", },
+ { &test_divwuo , " divwuo", },
+ { &test_mulhw , " mulhw", },
+ { &test_mulhwu , " mulhwu", },
+ { &test_mullw , " mullw", },
+ { &test_mullwo , " mullwo", },
+ { &test_subf , " subf", },
+ { &test_subfo , " subfo", },
+ { &test_subfc , " subfc", },
+ { &test_subfco , " subfco", },
+ { &test_subfe , " subfe", },
+ { &test_subfeo , " subfeo", },
+ { NULL, NULL, },
+};
+
+static void test_add_ (void)
+{
+ __asm__ __volatile__ ("add. 17, 14, 15");
+}
+
+static void test_addo_ (void)
+{
+ __asm__ __volatile__ ("addo. 17, 14, 15");
+}
+
+static void test_addc_ (void)
+{
+ __asm__ __volatile__ ("addc. 17, 14, 15");
+}
+
+static void test_addco_ (void)
+{
+ __asm__ __volatile__ ("addco. 17, 14, 15");
+}
+
+static void test_adde_ (void)
+{
+ __asm__ __volatile__ ("adde. 17, 14, 15");
+}
+
+static void test_addeo_ (void)
+{
+ __asm__ __volatile__ ("addeo. 17, 14, 15");
+}
+
+static void test_divw_ (void)
+{
+ __asm__ __volatile__ ("divw. 17, 14, 15");
+}
+
+static void test_divwo_ (void)
+{
+ __asm__ __volatile__ ("divwo. 17, 14, 15");
+}
+
+static void test_divwu_ (void)
+{
+ __asm__ __volatile__ ("divwu. 17, 14, 15");
+}
+
+static void test_divwuo_ (void)
+{
+ __asm__ __volatile__ ("divwuo. 17, 14, 15");
+}
+
+static void test_subf_ (void)
+{
+ __asm__ __volatile__ ("subf. 17, 14, 15");
+}
+
+static void test_subfo_ (void)
+{
+ __asm__ __volatile__ ("subfo. 17, 14, 15");
+}
+
+static void test_subfc_ (void)
+{
+ __asm__ __volatile__ ("subfc. 17, 14, 15");
+}
+
+static void test_subfco_ (void)
+{
+ __asm__ __volatile__ ("subfco. 17, 14, 15");
+}
+
+static void test_subfe_ (void)
+{
+ __asm__ __volatile__ ("subfe. 17, 14, 15");
+}
+
+static void test_subfeo_ (void)
+{
+ __asm__ __volatile__ ("subfeo. 17, 14, 15");
+}
+
+static test_t tests_iar_ops_two[] = {
+ { &test_add_ , " add.", },
+ { &test_addo_ , " addo.", },
+ { &test_addc_ , " addc.", },
+ { &test_addco_ , " addco.", },
+ { &test_adde_ , " adde.", },
+ { &test_addeo_ , " addeo.", },
+ { &test_divw_ , " divw.", },
+ { &test_divwo_ , " divwo.", },
+ { &test_divwu_ , " divwu.", },
+ { &test_divwuo_ , " divwuo.", },
+ { &test_subf_ , " subf.", },
+ { &test_subfo_ , " subfo.", },
+ { &test_subfc_ , " subfc.", },
+ { &test_subfco_ , " subfco.", },
+ { &test_subfe_ , " subfe.", },
+ { &test_subfeo_ , " subfeo.", },
+ { NULL, NULL, },
+};
+
+static void test_and (void)
+{
+ __asm__ __volatile__ ("and 17, 14, 15");
+}
+
+static void test_andc (void)
+{
+ __asm__ __volatile__ ("andc 17, 14, 15");
+}
+
+static void test_eqv (void)
+{
+ __asm__ __volatile__ ("eqv 17, 14, 15");
+}
+
+static void test_nand (void)
+{
+ __asm__ __volatile__ ("nand 17, 14, 15");
+}
+
+static void test_nor (void)
+{
+ __asm__ __volatile__ ("nor 17, 14, 15");
+}
+
+static void test_or (void)
+{
+ __asm__ __volatile__ ("or 17, 14, 15");
+}
+
+static void test_orc (void)
+{
+ __asm__ __volatile__ ("orc 17, 14, 15");
+}
+
+static void test_xor (void)
+{
+ __asm__ __volatile__ ("xor 17, 14, 15");
+}
+
+static void test_slw (void)
+{
+ __asm__ __volatile__ ("slw 17, 14, 15");
+}
+
+static void test_sraw (void)
+{
+ __asm__ __volatile__ ("sraw 17, 14, 15");
+}
+
+static void test_srw (void)
+{
+ __asm__ __volatile__ ("srw 17, 14, 15");
+}
+
+static test_t tests_il_ops_two[] = {
+ { &test_and , " and", },
+ { &test_andc , " andc", },
+ { &test_eqv , " eqv", },
+ { &test_nand , " nand", },
+ { &test_nor , " nor", },
+ { &test_or , " or", },
+ { &test_orc , " orc", },
+ { &test_xor , " xor", },
+ { &test_slw , " slw", },
+ { &test_sraw , " sraw", },
+ { &test_srw , " srw", },
+ { NULL, NULL, },
+};
+
+static void test_and_ (void)
+{
+ __asm__ __volatile__ ("and. 17, 14, 15");
+}
+
+static void test_andc_ (void)
+{
+ __asm__ __volatile__ ("andc. 17, 14, 15");
+}
+
+static void test_eqv_ (void)
+{
+ __asm__ __volatile__ ("eqv. 17, 14, 15");
+}
+
+static void test_mulhw_ (void)
+{
+ __asm__ __volatile__ ("mulhw. 17, 14, 15");
+}
+
+static void test_mulhwu_ (void)
+{
+ __asm__ __volatile__ ("mulhwu. 17, 14, 15");
+}
+
+static void test_mullw_ (void)
+{
+ __asm__ __volatile__ ("mullw. 17, 14, 15");
+}
+
+static void test_mullwo_ (void)
+{
+ __asm__ __volatile__ ("mullwo. 17, 14, 15");
+}
+
+static void test_nand_ (void)
+{
+ __asm__ __volatile__ ("nand. 17, 14, 15");
+}
+
+static void test_nor_ (void)
+{
+ __asm__ __volatile__ ("nor. 17, 14, 15");
+}
+
+static void test_or_ (void)
+{
+ __asm__ __volatile__ ("or. 17, 14, 15");
+}
+
+static void test_orc_ (void)
+{
+ __asm__ __volatile__ ("orc. 17, 14, 15");
+}
+
+static void test_xor_ (void)
+{
+ __asm__ __volatile__ ("xor. 17, 14, 15");
+}
+
+static void test_slw_ (void)
+{
+ __asm__ __volatile__ ("slw. 17, 14, 15");
+}
+
+static void test_sraw_ (void)
+{
+ __asm__ __volatile__ ("sraw. 17, 14, 15");
+}
+
+static void test_srw_ (void)
+{
+ __asm__ __volatile__ ("srw. 17, 14, 15");
+}
+
+static test_t tests_ilr_ops_two[] = {
+ { &test_and_ , " and.", },
+ { &test_andc_ , " andc.", },
+ { &test_eqv_ , " eqv.", },
+ { &test_mulhw_ , " mulhw.", },
+ { &test_mulhwu_ , " mulhwu.", },
+ { &test_mullw_ , " mullw.", },
+ { &test_mullwo_ , " mullwo.", },
+ { &test_nand_ , " nand.", },
+ { &test_nor_ , " nor.", },
+ { &test_or_ , " or.", },
+ { &test_orc_ , " orc.", },
+ { &test_xor_ , " xor.", },
+ { &test_slw_ , " slw.", },
+ { &test_sraw_ , " sraw.", },
+ { &test_srw_ , " srw.", },
+ { NULL, NULL, },
+};
+
+static void test_cmp (void)
+{
+ __asm__ __volatile__ ("cmp 2, 14, 15");
+}
+
+static void test_cmpl (void)
+{
+ __asm__ __volatile__ ("cmpl 2, 14, 15");
+}
+
+static test_t tests_icr_ops_two[] = {
+ { &test_cmp , " cmp", },
+ { &test_cmpl , " cmpl", },
+ { NULL, NULL, },
+};
+
+static void test_cmpi (void)
+{
+ __asm__ __volatile__ ("cmpi 2, 14, 15");
+}
+
+static void test_cmpli (void)
+{
+ __asm__ __volatile__ ("cmpli 2, 14, 15");
+}
+
+static test_t tests_icr_ops_two_i16[] = {
+ { &test_cmpi , " cmpi", },
+ { &test_cmpli , " cmpli", },
+ { NULL, NULL, },
+};
+
+static void test_addi (void)
+{
+ __asm__ __volatile__ ("addi 17, 14, 0");
+}
+
+static void test_addic (void)
+{
+ __asm__ __volatile__ ("addic 17, 14, 0");
+}
+
+static void test_addis (void)
+{
+ __asm__ __volatile__ ("addis 17, 14, 0");
+}
+
+static void test_mulli (void)
+{
+ __asm__ __volatile__ ("mulli 17, 14, 0");
+}
+
+static void test_subfic (void)
+{
+ __asm__ __volatile__ ("subfic 17, 14, 0");
+}
+
+static test_t tests_ia_ops_two_i16[] = {
+ { &test_addi , " addi", },
+ { &test_addic , " addic", },
+ { &test_addis , " addis", },
+ { &test_mulli , " mulli", },
+ { &test_subfic , " subfic", },
+ { NULL, NULL, },
+};
+
+static void test_addic_ (void)
+{
+ __asm__ __volatile__ ("addic. 17, 14, 0");
+}
+
+static test_t tests_iar_ops_two_i16[] = {
+ { &test_addic_ , " addic.", },
+ { NULL, NULL, },
+};
+
+static void test_ori (void)
+{
+ __asm__ __volatile__ ("ori 17, 14, 0");
+}
+
+static void test_oris (void)
+{
+ __asm__ __volatile__ ("oris 17, 14, 0");
+}
+
+static void test_xori (void)
+{
+ __asm__ __volatile__ ("xori 17, 14, 0");
+}
+
+static void test_xoris (void)
+{
+ __asm__ __volatile__ ("xoris 17, 14, 0");
+}
+
+static test_t tests_il_ops_two_i16[] = {
+ { &test_ori , " ori", },
+ { &test_oris , " oris", },
+ { &test_xori , " xori", },
+ { &test_xoris , " xoris", },
+ { NULL, NULL, },
+};
+
+static void test_andi_ (void)
+{
+ __asm__ __volatile__ ("andi. 17, 14, 0");
+}
+
+static void test_andis_ (void)
+{
+ __asm__ __volatile__ ("andis. 17, 14, 0");
+}
+
+static test_t tests_ilr_ops_two_i16[] = {
+ { &test_andi_ , " andi.", },
+ { &test_andis_ , " andis.", },
+ { NULL, NULL, },
+};
+
+static void test_crand (void)
+{
+ __asm__ __volatile__ ("crand 17, 14, 15");
+}
+
+static void test_crandc (void)
+{
+ __asm__ __volatile__ ("crandc 17, 14, 15");
+}
+
+static void test_creqv (void)
+{
+ __asm__ __volatile__ ("creqv 17, 14, 15");
+}
+
+static void test_crnand (void)
+{
+ __asm__ __volatile__ ("crnand 17, 14, 15");
+}
+
+static void test_crnor (void)
+{
+ __asm__ __volatile__ ("crnor 17, 14, 15");
+}
+
+static void test_cror (void)
+{
+ __asm__ __volatile__ ("cror 17, 14, 15");
+}
+
+static void test_crorc (void)
+{
+ __asm__ __volatile__ ("crorc 17, 14, 15");
+}
+
+static void test_crxor (void)
+{
+ __asm__ __volatile__ ("crxor 17, 14, 15");
+}
+
+static test_t tests_crl_ops_two[] = {
+ { &test_crand , " crand", },
+ { &test_crandc , " crandc", },
+ { &test_creqv , " creqv", },
+ { &test_crnand , " crnand", },
+ { &test_crnor , " crnor", },
+ { &test_cror , " cror", },
+ { &test_crorc , " crorc", },
+ { &test_crxor , " crxor", },
+ { NULL, NULL, },
+};
+
+static void test_addme (void)
+{
+ __asm__ __volatile__ ("addme 17, 14");
+}
+
+static void test_addmeo (void)
+{
+ __asm__ __volatile__ ("addmeo 17, 14");
+}
+
+static void test_addze (void)
+{
+ __asm__ __volatile__ ("addze 17, 14");
+}
+
+static void test_addzeo (void)
+{
+ __asm__ __volatile__ ("addzeo 17, 14");
+}
+
+static void test_subfme (void)
+{
+ __asm__ __volatile__ ("subfme 17, 14");
+}
+
+static void test_subfmeo (void)
+{
+ __asm__ __volatile__ ("subfmeo 17, 14");
+}
+
+static void test_subfze (void)
+{
+ __asm__ __volatile__ ("subfze 17, 14");
+}
+
+static void test_subfzeo (void)
+{
+ __asm__ __volatile__ ("subfzeo 17, 14");
+}
+
+static test_t tests_ia_ops_one[] = {
+ { &test_addme , " addme", },
+ { &test_addmeo , " addmeo", },
+ { &test_addze , " addze", },
+ { &test_addzeo , " addzeo", },
+ { &test_subfme , " subfme", },
+ { &test_subfmeo , " subfmeo", },
+ { &test_subfze , " subfze", },
+ { &test_subfzeo , " subfzeo", },
+ { NULL, NULL, },
+};
+
+static void test_addme_ (void)
+{
+ __asm__ __volatile__ ("addme. 17, 14");
+}
+
+static void test_addmeo_ (void)
+{
+ __asm__ __volatile__ ("addmeo. 17, 14");
+}
+
+static void test_addze_ (void)
+{
+ __asm__ __volatile__ ("addze. 17, 14");
+}
+
+static void test_addzeo_ (void)
+{
+ __asm__ __volatile__ ("addzeo. 17, 14");
+}
+
+static void test_subfme_ (void)
+{
+ __asm__ __volatile__ ("subfme. 17, 14");
+}
+
+static void test_subfmeo_ (void)
+{
+ __asm__ __volatile__ ("subfmeo. 17, 14");
+}
+
+static void test_subfze_ (void)
+{
+ __asm__ __volatile__ ("subfze. 17, 14");
+}
+
+static void test_subfzeo_ (void)
+{
+ __asm__ __volatile__ ("subfzeo. 17, 14");
+}
+
+static test_t tests_iar_ops_one[] = {
+ { &test_addme_ , " addme.", },
+ { &test_addmeo_ , " addmeo.", },
+ { &test_addze_ , " addze.", },
+ { &test_addzeo_ , " addzeo.", },
+ { &test_subfme_ , " subfme.", },
+ { &test_subfmeo_ , " subfmeo.", },
+ { &test_subfze_ , " subfze.", },
+ { &test_subfzeo_ , " subfzeo.", },
+ { NULL, NULL, },
+};
+
+static void test_cntlzw (void)
+{
+ __asm__ __volatile__ ("cntlzw 17, 14");
+}
+
+static void test_extsb (void)
+{
+ __asm__ __volatile__ ("extsb 17, 14");
+}
+
+static void test_extsh (void)
+{
+ __asm__ __volatile__ ("extsh 17, 14");
+}
+
+static void test_neg (void)
+{
+ __asm__ __volatile__ ("neg 17, 14");
+}
+
+static void test_nego (void)
+{
+ __asm__ __volatile__ ("nego 17, 14");
+}
+
+static test_t tests_il_ops_one[] = {
+ { &test_cntlzw , " cntlzw", },
+ { &test_extsb , " extsb", },
+ { &test_extsh , " extsh", },
+ { &test_neg , " neg", },
+ { &test_nego , " nego", },
+ { NULL, NULL, },
+};
+
+static void test_cntlzw_ (void)
+{
+ __asm__ __volatile__ ("cntlzw. 17, 14");
+}
+
+static void test_extsb_ (void)
+{
+ __asm__ __volatile__ ("extsb. 17, 14");
+}
+
+static void test_extsh_ (void)
+{
+ __asm__ __volatile__ ("extsh. 17, 14");
+}
+
+static void test_neg_ (void)
+{
+ __asm__ __volatile__ ("neg. 17, 14");
+}
+
+static void test_nego_ (void)
+{
+ __asm__ __volatile__ ("nego. 17, 14");
+}
+
+static test_t tests_ilr_ops_one[] = {
+ { &test_cntlzw_ , " cntlzw.", },
+ { &test_extsb_ , " extsb.", },
+ { &test_extsh_ , " extsh.", },
+ { &test_neg_ , " neg.", },
+ { &test_nego_ , " nego.", },
+ { NULL, NULL, },
+};
+
+static void test_rlwimi (void)
+{
+ __asm__ __volatile__ ("rlwimi 17, 14, 0, 0, 0");
+}
+
+static void test_rlwinm (void)
+{
+ __asm__ __volatile__ ("rlwinm 17, 14, 0, 0, 0");
+}
+
+static void test_rlwnm (void)
+{
+ __asm__ __volatile__ ("rlwnm 17, 14, 15, 0, 0");
+}
+
+static void test_srawi (void)
+{
+ __asm__ __volatile__ ("srawi 17, 14, 0");
+}
+
+static test_t tests_il_ops_spe[] = {
+ { &test_rlwimi , " rlwimi", },
+ { &test_rlwinm , " rlwinm", },
+ { &test_rlwnm , " rlwnm", },
+ { &test_srawi , " srawi", },
+ { NULL, NULL, },
+};
+
+static void test_rlwimi_ (void)
+{
+ __asm__ __volatile__ ("rlwimi. 17, 14, 0, 0, 0");
+}
+
+static void test_rlwinm_ (void)
+{
+ __asm__ __volatile__ ("rlwinm. 17, 14, 0, 0, 0");
+}
+
+static void test_rlwnm_ (void)
+{
+ __asm__ __volatile__ ("rlwnm. 17, 14, 15, 0, 0");
+}
+
+static void test_srawi_ (void)
+{
+ __asm__ __volatile__ ("srawi. 17, 14, 0");
+}
+
+static test_t tests_ilr_ops_spe[] = {
+ { &test_rlwimi_ , " rlwimi.", },
+ { &test_rlwinm_ , " rlwinm.", },
+ { &test_rlwnm_ , " rlwnm.", },
+ { &test_srawi_ , " srawi.", },
+ { NULL, NULL, },
+};
+
+#if !defined (NO_FLOAT)
+static void test_fsel (void)
+{
+ __asm__ __volatile__ ("fsel 17, 14, 15, 16");
+}
+
+static void test_fmadd (void)
+{
+ __asm__ __volatile__ ("fmadd 17, 14, 15, 16");
+}
+
+static void test_fmadds (void)
+{
+ __asm__ __volatile__ ("fmadds 17, 14, 15, 16");
+}
+
+static void test_fmsub (void)
+{
+ __asm__ __volatile__ ("fmsub 17, 14, 15, 16");
+}
+
+static void test_fmsubs (void)
+{
+ __asm__ __volatile__ ("fmsubs 17, 14, 15, 16");
+}
+
+static void test_fnmadd (void)
+{
+ __asm__ __volatile__ ("fnmadd 17, 14, 15, 16");
+}
+
+static void test_fnmadds (void)
+{
+ __asm__ __volatile__ ("fnmadds 17, 14, 15, 16");
+}
+
+static void test_fnmsub (void)
+{
+ __asm__ __volatile__ ("fnmsub 17, 14, 15, 16");
+}
+
+static void test_fnmsubs (void)
+{
+ __asm__ __volatile__ ("fnmsubs 17, 14, 15, 16");
+}
+
+static test_t tests_fa_ops_three[] = {
+ { &test_fsel , " fsel", },
+ { &test_fmadd , " fmadd", },
+ { &test_fmadds , " fmadds", },
+ { &test_fmsub , " fmsub", },
+ { &test_fmsubs , " fmsubs", },
+ { &test_fnmadd , " fnmadd", },
+ { &test_fnmadds , " fnmadds", },
+ { &test_fnmsub , " fnmsub", },
+ { &test_fnmsubs , " fnmsubs", },
+ { NULL, NULL, },
+};
+#endif /* !defined (NO_FLOAT) */
+
+#if !defined (NO_FLOAT)
+static void test_fsel_ (void)
+{
+ __asm__ __volatile__ ("fsel. 17, 14, 15, 16");
+}
+
+static void test_fmadd_ (void)
+{
+ __asm__ __volatile__ ("fmadd. 17, 14, 15, 16");
+}
+
+static void test_fmadds_ (void)
+{
+ __asm__ __volatile__ ("fmadds. 17, 14, 15, 16");
+}
+
+static void test_fmsub_ (void)
+{
+ __asm__ __volatile__ ("fmsub. 17, 14, 15, 16");
+}
+
+static void test_fmsubs_ (void)
+{
+ __asm__ __volatile__ ("fmsubs. 17, 14, 15, 16");
+}
+
+static void test_fnmadd_ (void)
+{
+ __asm__ __volatile__ ("fnmadd. 17, 14, 15, 16");
+}
+
+static void test_fnmadds_ (void)
+{
+ __asm__ __volatile__ ("fnmadds. 17, 14, 15, 16");
+}
+
+static void test_fnmsub_ (void)
+{
+ __asm__ __volatile__ ("fnmsub. 17, 14, 15, 16");
+}
+
+static void test_fnmsubs_ (void)
+{
+ __asm__ __volatile__ ("fnmsubs. 17, 14, 15, 16");
+}
+
+static test_t tests_far_ops_three[] = {
+ { &test_fsel_ , " fsel.", },
+ { &test_fmadd_ , " fmadd.", },
+ { &test_fmadds_ , " fmadds.", },
+ { &test_fmsub_ , " fmsub.", },
+ { &test_fmsubs_ , " fmsubs.", },
+ { &test_fnmadd_ , " fnmadd.", },
+ { &test_fnmadds_ , " fnmadds.", },
+ { &test_fnmsub_ , " fnmsub.", },
+ { &test_fnmsubs_ , " fnmsubs.", },
+ { NULL, NULL, },
+};
+#endif /* !defined (NO_FLOAT) */
+
+#if !defined (NO_FLOAT)
+static void test_fadd (void)
+{
+ __asm__ __volatile__ ("fadd 17, 14, 15");
+}
+
+static void test_fadds (void)
+{
+ __asm__ __volatile__ ("fadds 17, 14, 15");
+}
+
+static void test_fsub (void)
+{
+ __asm__ __volatile__ ("fsub 17, 14, 15");
+}
+
+static void test_fsubs (void)
+{
+ __asm__ __volatile__ ("fsubs 17, 14, 15");
+}
+
+static void test_fmul (void)
+{
+ __asm__ __volatile__ ("fmul 17, 14, 15");
+}
+
+static void test_fmuls (void)
+{
+ __asm__ __volatile__ ("fmuls 17, 14, 15");
+}
+
+static void test_fdiv (void)
+{
+ __asm__ __volatile__ ("fdiv 17, 14, 15");
+}
+
+static void test_fdivs (void)
+{
+ __asm__ __volatile__ ("fdivs 17, 14, 15");
+}
+
+static test_t tests_fa_ops_two[] = {
+ { &test_fadd , " fadd", },
+ { &test_fadds , " fadds", },
+ { &test_fsub , " fsub", },
+ { &test_fsubs , " fsubs", },
+ { &test_fmul , " fmul", },
+ { &test_fmuls , " fmuls", },
+ { &test_fdiv , " fdiv", },
+ { &test_fdivs , " fdivs", },
+ { NULL, NULL, },
+};
+#endif /* !defined (NO_FLOAT) */
+
+#if !defined (NO_FLOAT)
+static void test_fadd_ (void)
+{
+ __asm__ __volatile__ ("fadd. 17, 14, 15");
+}
+
+static void test_fadds_ (void)
+{
+ __asm__ __volatile__ ("fadds. 17, 14, 15");
+}
+
+static void test_fsub_ (void)
+{
+ __asm__ __volatile__ ("fsub. 17, 14, 15");
+}
+
+static void test_fsubs_ (void)
+{
+ __asm__ __volatile__ ("fsubs. 17, 14, 15");
+}
+
+static void test_fmul_ (void)
+{
+ __asm__ __volatile__ ("fmul. 17, 14, 15");
+}
+
+static void test_fmuls_ (void)
+{
+ __asm__ __volatile__ ("fmuls. 17, 14, 15");
+}
+
+static void test_fdiv_ (void)
+{
+ __asm__ __volatile__ ("fdiv. 17, 14, 15");
+}
+
+static void test_fdivs_ (void)
+{
+ __asm__ __volatile__ ("fdivs. 17, 14, 15");
+}
+
+static test_t tests_far_ops_two[] = {
+ { &test_fadd_ , " fadd.", },
+ { &test_fadds_ , " fadds.", },
+ { &test_fsub_ , " fsub.", },
+ { &test_fsubs_ , " fsubs.", },
+ { &test_fmul_ , " fmul.", },
+ { &test_fmuls_ , " fmuls.", },
+ { &test_fdiv_ , " fdiv.", },
+ { &test_fdivs_ , " fdivs.", },
+ { NULL, NULL, },
+};
+#endif /* !defined (NO_FLOAT) */
+
+#if !defined (NO_FLOAT)
+static void test_fcmpo (void)
+{
+ __asm__ __volatile__ ("fcmpo 2, 14, 15");
+}
+
+static void test_fcmpu (void)
+{
+ __asm__ __volatile__ ("fcmpu 2, 14, 15");
+}
+
+static test_t tests_fcr_ops_two[] = {
+ { &test_fcmpo , " fcmpo", },
+ { &test_fcmpu , " fcmpu", },
+ { NULL, NULL, },
+};
+#endif /* !defined (NO_FLOAT) */
+
+#if !defined (NO_FLOAT)
+static void test_fres (void)
+{
+ __asm__ __volatile__ ("fres 17, 14");
+}
+
+static void test_frsqrte (void)
+{
+ __asm__ __volatile__ ("frsqrte 17, 14");
+}
+
+static void test_frsp (void)
+{
+ __asm__ __volatile__ ("frsp 17, 14");
+}
+
+static void test_fctiw (void)
+{
+ __asm__ __volatile__ ("fctiw 17, 14");
+}
+
+static void test_fctiwz (void)
+{
+ __asm__ __volatile__ ("fctiwz 17, 14");
+}
+
+static void test_fmr (void)
+{
+ __asm__ __volatile__ ("fmr 17, 14");
+}
+
+static void test_fneg (void)
+{
+ __asm__ __volatile__ ("fneg 17, 14");
+}
+
+static void test_fabs (void)
+{
+ __asm__ __volatile__ ("fabs 17, 14");
+}
+
+static void test_fnabs (void)
+{
+ __asm__ __volatile__ ("fnabs 17, 14");
+}
+
+static test_t tests_fa_ops_one[] = {
+ { &test_fres , " fres", },
+ { &test_frsqrte , " frsqrte", },
+ { &test_frsp , " frsp", },
+ { &test_fctiw , " fctiw", },
+ { &test_fctiwz , " fctiwz", },
+ { &test_fmr , " fmr", },
+ { &test_fneg , " fneg", },
+ { &test_fabs , " fabs", },
+ { &test_fnabs , " fnabs", },
+ { NULL, NULL, },
+};
+#endif /* !defined (NO_FLOAT) */
+
+#if !defined (NO_FLOAT)
+static void test_fres_ (void)
+{
+ __asm__ __volatile__ ("fres. 17, 14");
+}
+
+static void test_frsqrte_ (void)
+{
+ __asm__ __volatile__ ("frsqrte. 17, 14");
+}
+
+static void test_frsp_ (void)
+{
+ __asm__ __volatile__ ("frsp. 17, 14");
+}
+
+static void test_fctiw_ (void)
+{
+ __asm__ __volatile__ ("fctiw. 17, 14");
+}
+
+static void test_fctiwz_ (void)
+{
+ __asm__ __volatile__ ("fctiwz. 17, 14");
+}
+
+static void test_fmr_ (void)
+{
+ __asm__ __volatile__ ("fmr. 17, 14");
+}
+
+static void test_fneg_ (void)
+{
+ __asm__ __volatile__ ("fneg. 17, 14");
+}
+
+static void test_fabs_ (void)
+{
+ __asm__ __volatile__ ("fabs. 17, 14");
+}
+
+static void test_fnabs_ (void)
+{
+ __asm__ __volatile__ ("fnabs. 17, 14");
+}
+
+static test_t tests_far_ops_one[] = {
+ { &test_fres_ , " fres.", },
+ { &test_frsqrte_ , " frsqrte.", },
+ { &test_frsp_ , " frsp.", },
+ { &test_fctiw_ , " fctiw.", },
+ { &test_fctiwz_ , " fctiwz.", },
+ { &test_fmr_ , " fmr.", },
+ { &test_fneg_ , " fneg.", },
+ { &test_fabs_ , " fabs.", },
+ { &test_fnabs_ , " fnabs.", },
+ { NULL, NULL, },
+};
+#endif /* !defined (NO_FLOAT) */
+
+#if !defined (NO_FLOAT)
+static test_t tests_fl_ops_spe[] = {
+ { NULL, NULL, },
+};
+#endif /* !defined (NO_FLOAT) */
+
+#if !defined (NO_FLOAT)
+static test_t tests_flr_ops_spe[] = {
+ { NULL, NULL, },
+};
+#endif /* !defined (NO_FLOAT) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vmhaddshs (void)
+{
+ __asm__ __volatile__ ("vmhaddshs 17, 14, 15, 16");
+}
+
+static void test_vmhraddshs (void)
+{
+ __asm__ __volatile__ ("vmhraddshs 17, 14, 15, 16");
+}
+
+static void test_vmladduhm (void)
+{
+ __asm__ __volatile__ ("vmladduhm 17, 14, 15, 16");
+}
+
+static void test_vmsumubm (void)
+{
+ __asm__ __volatile__ ("vmsumubm 17, 14, 15, 16");
+}
+
+static void test_vmsumuhm (void)
+{
+ __asm__ __volatile__ ("vmsumuhm 17, 14, 15, 16");
+}
+
+static void test_vmsumshs (void)
+{
+ __asm__ __volatile__ ("vmsumshs 17, 14, 15, 16");
+}
+
+static void test_vmsumuhs (void)
+{
+ __asm__ __volatile__ ("vmsumuhs 17, 14, 15, 16");
+}
+
+static void test_vmsummbm (void)
+{
+ __asm__ __volatile__ ("vmsummbm 17, 14, 15, 16");
+}
+
+static void test_vmsumshm (void)
+{
+ __asm__ __volatile__ ("vmsumshm 17, 14, 15, 16");
+}
+
+static test_t tests_aa_ops_three[] = {
+ { &test_vmhaddshs , " vmhaddshs", },
+ { &test_vmhraddshs , " vmhraddshs", },
+ { &test_vmladduhm , " vmladduhm", },
+ { &test_vmsumubm , " vmsumubm", },
+ { &test_vmsumuhm , " vmsumuhm", },
+ { &test_vmsumshs , " vmsumshs", },
+ { &test_vmsumuhs , " vmsumuhs", },
+ { &test_vmsummbm , " vmsummbm", },
+ { &test_vmsumshm , " vmsumshm", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vperm (void)
+{
+ __asm__ __volatile__ ("vperm 17, 14, 15, 16");
+}
+
+static void test_vsel (void)
+{
+ __asm__ __volatile__ ("vsel 17, 14, 15, 16");
+}
+
+static test_t tests_al_ops_three[] = {
+ { &test_vperm , " vperm", },
+ { &test_vsel , " vsel", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vaddubm (void)
+{
+ __asm__ __volatile__ ("vaddubm 17, 14, 15");
+}
+
+static void test_vadduhm (void)
+{
+ __asm__ __volatile__ ("vadduhm 17, 14, 15");
+}
+
+static void test_vadduwm (void)
+{
+ __asm__ __volatile__ ("vadduwm 17, 14, 15");
+}
+
+static void test_vaddubs (void)
+{
+ __asm__ __volatile__ ("vaddubs 17, 14, 15");
+}
+
+static void test_vadduhs (void)
+{
+ __asm__ __volatile__ ("vadduhs 17, 14, 15");
+}
+
+static void test_vadduws (void)
+{
+ __asm__ __volatile__ ("vadduws 17, 14, 15");
+}
+
+static void test_vaddsbs (void)
+{
+ __asm__ __volatile__ ("vaddsbs 17, 14, 15");
+}
+
+static void test_vaddshs (void)
+{
+ __asm__ __volatile__ ("vaddshs 17, 14, 15");
+}
+
+static void test_vaddsws (void)
+{
+ __asm__ __volatile__ ("vaddsws 17, 14, 15");
+}
+
+static void test_vaddcuw (void)
+{
+ __asm__ __volatile__ ("vaddcuw 17, 14, 15");
+}
+
+static void test_vsububm (void)
+{
+ __asm__ __volatile__ ("vsububm 17, 14, 15");
+}
+
+static void test_vsubuhm (void)
+{
+ __asm__ __volatile__ ("vsubuhm 17, 14, 15");
+}
+
+static void test_vsubuwm (void)
+{
+ __asm__ __volatile__ ("vsubuwm 17, 14, 15");
+}
+
+static void test_vsububs (void)
+{
+ __asm__ __volatile__ ("vsububs 17, 14, 15");
+}
+
+static void test_vsubuhs (void)
+{
+ __asm__ __volatile__ ("vsubuhs 17, 14, 15");
+}
+
+static void test_vsubuws (void)
+{
+ __asm__ __volatile__ ("vsubuws 17, 14, 15");
+}
+
+static void test_vsubcuw (void)
+{
+ __asm__ __volatile__ ("vsubcuw 17, 14, 15");
+}
+
+static void test_vmuloub (void)
+{
+ __asm__ __volatile__ ("vmuloub 17, 14, 15");
+}
+
+static void test_vmulouh (void)
+{
+ __asm__ __volatile__ ("vmulouh 17, 14, 15");
+}
+
+static void test_vmulosb (void)
+{
+ __asm__ __volatile__ ("vmulosb 17, 14, 15");
+}
+
+static void test_vmulosh (void)
+{
+ __asm__ __volatile__ ("vmulosh 17, 14, 15");
+}
+
+static void test_vmuleub (void)
+{
+ __asm__ __volatile__ ("vmuleub 17, 14, 15");
+}
+
+static void test_vmuleuh (void)
+{
+ __asm__ __volatile__ ("vmuleuh 17, 14, 15");
+}
+
+static void test_vmulesb (void)
+{
+ __asm__ __volatile__ ("vmulesb 17, 14, 15");
+}
+
+static void test_vmulesh (void)
+{
+ __asm__ __volatile__ ("vmulesh 17, 14, 15");
+}
+
+static void test_vsumsws (void)
+{
+ __asm__ __volatile__ ("vsumsws 17, 14, 15");
+}
+
+static void test_vsum2sws (void)
+{
+ __asm__ __volatile__ ("vsum2sws 17, 14, 15");
+}
+
+static void test_vsum4ubs (void)
+{
+ __asm__ __volatile__ ("vsum4ubs 17, 14, 15");
+}
+
+static void test_vsum4sbs (void)
+{
+ __asm__ __volatile__ ("vsum4sbs 17, 14, 15");
+}
+
+static void test_vsum4shs (void)
+{
+ __asm__ __volatile__ ("vsum4shs 17, 14, 15");
+}
+
+static void test_vavgub (void)
+{
+ __asm__ __volatile__ ("vavgub 17, 14, 15");
+}
+
+static void test_vavguh (void)
+{
+ __asm__ __volatile__ ("vavguh 17, 14, 15");
+}
+
+static void test_vavguw (void)
+{
+ __asm__ __volatile__ ("vavguw 17, 14, 15");
+}
+
+static void test_vavgsb (void)
+{
+ __asm__ __volatile__ ("vavgsb 17, 14, 15");
+}
+
+static void test_vavgsh (void)
+{
+ __asm__ __volatile__ ("vavgsh 17, 14, 15");
+}
+
+static void test_vavgsw (void)
+{
+ __asm__ __volatile__ ("vavgsw 17, 14, 15");
+}
+
+static void test_vmaxub (void)
+{
+ __asm__ __volatile__ ("vmaxub 17, 14, 15");
+}
+
+static void test_vmaxuh (void)
+{
+ __asm__ __volatile__ ("vmaxuh 17, 14, 15");
+}
+
+static void test_vmaxuw (void)
+{
+ __asm__ __volatile__ ("vmaxuw 17, 14, 15");
+}
+
+static void test_vmaxsb (void)
+{
+ __asm__ __volatile__ ("vmaxsb 17, 14, 15");
+}
+
+static void test_vmaxsh (void)
+{
+ __asm__ __volatile__ ("vmaxsh 17, 14, 15");
+}
+
+static void test_vmaxsw (void)
+{
+ __asm__ __volatile__ ("vmaxsw 17, 14, 15");
+}
+
+static void test_vminub (void)
+{
+ __asm__ __volatile__ ("vminub 17, 14, 15");
+}
+
+static void test_vminuh (void)
+{
+ __asm__ __volatile__ ("vminuh 17, 14, 15");
+}
+
+static void test_vminuw (void)
+{
+ __asm__ __volatile__ ("vminuw 17, 14, 15");
+}
+
+static void test_vminsb (void)
+{
+ __asm__ __volatile__ ("vminsb 17, 14, 15");
+}
+
+static void test_vminsh (void)
+{
+ __asm__ __volatile__ ("vminsh 17, 14, 15");
+}
+
+static void test_vminsw (void)
+{
+ __asm__ __volatile__ ("vminsw 17, 14, 15");
+}
+
+static test_t tests_aa_ops_two[] = {
+ { &test_vaddubm , " vaddubm", },
+ { &test_vadduhm , " vadduhm", },
+ { &test_vadduwm , " vadduwm", },
+ { &test_vaddubs , " vaddubs", },
+ { &test_vadduhs , " vadduhs", },
+ { &test_vadduws , " vadduws", },
+ { &test_vaddsbs , " vaddsbs", },
+ { &test_vaddshs , " vaddshs", },
+ { &test_vaddsws , " vaddsws", },
+ { &test_vaddcuw , " vaddcuw", },
+ { &test_vsububm , " vsububm", },
+ { &test_vsubuhm , " vsubuhm", },
+ { &test_vsubuwm , " vsubuwm", },
+ { &test_vsububs , " vsububs", },
+ { &test_vsubuhs , " vsubuhs", },
+ { &test_vsubuws , " vsubuws", },
+ { &test_vsubcuw , " vsubcuw", },
+ { &test_vmuloub , " vmuloub", },
+ { &test_vmulouh , " vmulouh", },
+ { &test_vmulosb , " vmulosb", },
+ { &test_vmulosh , " vmulosh", },
+ { &test_vmuleub , " vmuleub", },
+ { &test_vmuleuh , " vmuleuh", },
+ { &test_vmulesb , " vmulesb", },
+ { &test_vmulesh , " vmulesh", },
+ { &test_vsumsws , " vsumsws", },
+ { &test_vsum2sws , " vsum2sws", },
+ { &test_vsum4ubs , " vsum4ubs", },
+ { &test_vsum4sbs , " vsum4sbs", },
+ { &test_vsum4shs , " vsum4shs", },
+ { &test_vavgub , " vavgub", },
+ { &test_vavguh , " vavguh", },
+ { &test_vavguw , " vavguw", },
+ { &test_vavgsb , " vavgsb", },
+ { &test_vavgsh , " vavgsh", },
+ { &test_vavgsw , " vavgsw", },
+ { &test_vmaxub , " vmaxub", },
+ { &test_vmaxuh , " vmaxuh", },
+ { &test_vmaxuw , " vmaxuw", },
+ { &test_vmaxsb , " vmaxsb", },
+ { &test_vmaxsh , " vmaxsh", },
+ { &test_vmaxsw , " vmaxsw", },
+ { &test_vminub , " vminub", },
+ { &test_vminuh , " vminuh", },
+ { &test_vminuw , " vminuw", },
+ { &test_vminsb , " vminsb", },
+ { &test_vminsh , " vminsh", },
+ { &test_vminsw , " vminsw", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vand (void)
+{
+ __asm__ __volatile__ ("vand 17, 14, 15");
+}
+
+static void test_vor (void)
+{
+ __asm__ __volatile__ ("vor 17, 14, 15");
+}
+
+static void test_vxor (void)
+{
+ __asm__ __volatile__ ("vxor 17, 14, 15");
+}
+
+static void test_vandc (void)
+{
+ __asm__ __volatile__ ("vandc 17, 14, 15");
+}
+
+static void test_vnor (void)
+{
+ __asm__ __volatile__ ("vnor 17, 14, 15");
+}
+
+static void test_vrlb (void)
+{
+ __asm__ __volatile__ ("vrlb 17, 14, 15");
+}
+
+static void test_vrlh (void)
+{
+ __asm__ __volatile__ ("vrlh 17, 14, 15");
+}
+
+static void test_vrlw (void)
+{
+ __asm__ __volatile__ ("vrlw 17, 14, 15");
+}
+
+static void test_vslb (void)
+{
+ __asm__ __volatile__ ("vslb 17, 14, 15");
+}
+
+static void test_vslh (void)
+{
+ __asm__ __volatile__ ("vslh 17, 14, 15");
+}
+
+static void test_vslw (void)
+{
+ __asm__ __volatile__ ("vslw 17, 14, 15");
+}
+
+static void test_vsrb (void)
+{
+ __asm__ __volatile__ ("vsrb 17, 14, 15");
+}
+
+static void test_vsrh (void)
+{
+ __asm__ __volatile__ ("vsrh 17, 14, 15");
+}
+
+static void test_vsrw (void)
+{
+ __asm__ __volatile__ ("vsrw 17, 14, 15");
+}
+
+static void test_vsrab (void)
+{
+ __asm__ __volatile__ ("vsrab 17, 14, 15");
+}
+
+static void test_vsrah (void)
+{
+ __asm__ __volatile__ ("vsrah 17, 14, 15");
+}
+
+static void test_vsraw (void)
+{
+ __asm__ __volatile__ ("vsraw 17, 14, 15");
+}
+
+static void test_vpkuhum (void)
+{
+ __asm__ __volatile__ ("vpkuhum 17, 14, 15");
+}
+
+static void test_vpkuwum (void)
+{
+ __asm__ __volatile__ ("vpkuwum 17, 14, 15");
+}
+
+static void test_vpkuhus (void)
+{
+ __asm__ __volatile__ ("vpkuhus 17, 14, 15");
+}
+
+static void test_vpkuwus (void)
+{
+ __asm__ __volatile__ ("vpkuwus 17, 14, 15");
+}
+
+static void test_vpkshus (void)
+{
+ __asm__ __volatile__ ("vpkshus 17, 14, 15");
+}
+
+static void test_vpkswus (void)
+{
+ __asm__ __volatile__ ("vpkswus 17, 14, 15");
+}
+
+static void test_vpkshss (void)
+{
+ __asm__ __volatile__ ("vpkshss 17, 14, 15");
+}
+
+static void test_vpkswss (void)
+{
+ __asm__ __volatile__ ("vpkswss 17, 14, 15");
+}
+
+static void test_vpkpx (void)
+{
+ __asm__ __volatile__ ("vpkpx 17, 14, 15");
+}
+
+static void test_vmrghb (void)
+{
+ __asm__ __volatile__ ("vmrghb 17, 14, 15");
+}
+
+static void test_vmrghh (void)
+{
+ __asm__ __volatile__ ("vmrghh 17, 14, 15");
+}
+
+static void test_vmrghw (void)
+{
+ __asm__ __volatile__ ("vmrghw 17, 14, 15");
+}
+
+static void test_vmrglb (void)
+{
+ __asm__ __volatile__ ("vmrglb 17, 14, 15");
+}
+
+static void test_vmrglh (void)
+{
+ __asm__ __volatile__ ("vmrglh 17, 14, 15");
+}
+
+static void test_vmrglw (void)
+{
+ __asm__ __volatile__ ("vmrglw 17, 14, 15");
+}
+
+static void test_vsl (void)
+{
+ __asm__ __volatile__ ("vsl 17, 14, 15");
+}
+
+static void test_vsr (void)
+{
+ __asm__ __volatile__ ("vsr 17, 14, 15");
+}
+
+static void test_vslo (void)
+{
+ __asm__ __volatile__ ("vslo 17, 14, 15");
+}
+
+static void test_vsro (void)
+{
+ __asm__ __volatile__ ("vsro 17, 14, 15");
+}
+
+static test_t tests_al_ops_two[] = {
+ { &test_vand , " vand", },
+ { &test_vor , " vor", },
+ { &test_vxor , " vxor", },
+ { &test_vandc , " vandc", },
+ { &test_vnor , " vnor", },
+ { &test_vrlb , " vrlb", },
+ { &test_vrlh , " vrlh", },
+ { &test_vrlw , " vrlw", },
+ { &test_vslb , " vslb", },
+ { &test_vslh , " vslh", },
+ { &test_vslw , " vslw", },
+ { &test_vsrb , " vsrb", },
+ { &test_vsrh , " vsrh", },
+ { &test_vsrw , " vsrw", },
+ { &test_vsrab , " vsrab", },
+ { &test_vsrah , " vsrah", },
+ { &test_vsraw , " vsraw", },
+ { &test_vpkuhum , " vpkuhum", },
+ { &test_vpkuwum , " vpkuwum", },
+ { &test_vpkuhus , " vpkuhus", },
+ { &test_vpkuwus , " vpkuwus", },
+ { &test_vpkshus , " vpkshus", },
+ { &test_vpkswus , " vpkswus", },
+ { &test_vpkshss , " vpkshss", },
+ { &test_vpkswss , " vpkswss", },
+ { &test_vpkpx , " vpkpx", },
+ { &test_vmrghb , " vmrghb", },
+ { &test_vmrghh , " vmrghh", },
+ { &test_vmrghw , " vmrghw", },
+ { &test_vmrglb , " vmrglb", },
+ { &test_vmrglh , " vmrglh", },
+ { &test_vmrglw , " vmrglw", },
+ { &test_vsl , " vsl", },
+ { &test_vsr , " vsr", },
+ { &test_vslo , " vslo", },
+ { &test_vsro , " vsro", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vupkhsb (void)
+{
+ __asm__ __volatile__ ("vupkhsb 17, 14");
+}
+
+static void test_vupkhsh (void)
+{
+ __asm__ __volatile__ ("vupkhsh 17, 14");
+}
+
+static void test_vupkhpx (void)
+{
+ __asm__ __volatile__ ("vupkhpx 17, 14");
+}
+
+static void test_vupklsb (void)
+{
+ __asm__ __volatile__ ("vupklsb 17, 14");
+}
+
+static void test_vupklsh (void)
+{
+ __asm__ __volatile__ ("vupklsh 17, 14");
+}
+
+static void test_vupklpx (void)
+{
+ __asm__ __volatile__ ("vupklpx 17, 14");
+}
+
+static test_t tests_al_ops_one[] = {
+ { &test_vupkhsb , " vupkhsb", },
+ { &test_vupkhsh , " vupkhsh", },
+ { &test_vupkhpx , " vupkhpx", },
+ { &test_vupklsb , " vupklsb", },
+ { &test_vupklsh , " vupklsh", },
+ { &test_vupklpx , " vupklpx", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vcmpgtub (void)
+{
+ __asm__ __volatile__ ("vcmpgtub 17, 14, 15");
+}
+
+static void test_vcmpgtuh (void)
+{
+ __asm__ __volatile__ ("vcmpgtuh 17, 14, 15");
+}
+
+static void test_vcmpgtuw (void)
+{
+ __asm__ __volatile__ ("vcmpgtuw 17, 14, 15");
+}
+
+static void test_vcmpgtsb (void)
+{
+ __asm__ __volatile__ ("vcmpgtsb 17, 14, 15");
+}
+
+static void test_vcmpgtsh (void)
+{
+ __asm__ __volatile__ ("vcmpgtsh 17, 14, 15");
+}
+
+static void test_vcmpgtsw (void)
+{
+ __asm__ __volatile__ ("vcmpgtsw 17, 14, 15");
+}
+
+static void test_vcmpequb (void)
+{
+ __asm__ __volatile__ ("vcmpequb 17, 14, 15");
+}
+
+static void test_vcmpequh (void)
+{
+ __asm__ __volatile__ ("vcmpequh 17, 14, 15");
+}
+
+static void test_vcmpequw (void)
+{
+ __asm__ __volatile__ ("vcmpequw 17, 14, 15");
+}
+
+static test_t tests_ac_ops_two[] = {
+ { &test_vcmpgtub , " vcmpgtub", },
+ { &test_vcmpgtuh , " vcmpgtuh", },
+ { &test_vcmpgtuw , " vcmpgtuw", },
+ { &test_vcmpgtsb , " vcmpgtsb", },
+ { &test_vcmpgtsh , " vcmpgtsh", },
+ { &test_vcmpgtsw , " vcmpgtsw", },
+ { &test_vcmpequb , " vcmpequb", },
+ { &test_vcmpequh , " vcmpequh", },
+ { &test_vcmpequw , " vcmpequw", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vcmpgtub_ (void)
+{
+ __asm__ __volatile__ ("vcmpgtub. 17, 14, 15");
+}
+
+static void test_vcmpgtuh_ (void)
+{
+ __asm__ __volatile__ ("vcmpgtuh. 17, 14, 15");
+}
+
+static void test_vcmpgtuw_ (void)
+{
+ __asm__ __volatile__ ("vcmpgtuw. 17, 14, 15");
+}
+
+static void test_vcmpgtsb_ (void)
+{
+ __asm__ __volatile__ ("vcmpgtsb. 17, 14, 15");
+}
+
+static void test_vcmpgtsh_ (void)
+{
+ __asm__ __volatile__ ("vcmpgtsh. 17, 14, 15");
+}
+
+static void test_vcmpgtsw_ (void)
+{
+ __asm__ __volatile__ ("vcmpgtsw. 17, 14, 15");
+}
+
+static void test_vcmpequb_ (void)
+{
+ __asm__ __volatile__ ("vcmpequb. 17, 14, 15");
+}
+
+static void test_vcmpequh_ (void)
+{
+ __asm__ __volatile__ ("vcmpequh. 17, 14, 15");
+}
+
+static void test_vcmpequw_ (void)
+{
+ __asm__ __volatile__ ("vcmpequw. 17, 14, 15");
+}
+
+static test_t tests_acr_ops_two[] = {
+ { &test_vcmpgtub_ , " vcmpgtub.", },
+ { &test_vcmpgtuh_ , " vcmpgtuh.", },
+ { &test_vcmpgtuw_ , " vcmpgtuw.", },
+ { &test_vcmpgtsb_ , " vcmpgtsb.", },
+ { &test_vcmpgtsh_ , " vcmpgtsh.", },
+ { &test_vcmpgtsw_ , " vcmpgtsw.", },
+ { &test_vcmpequb_ , " vcmpequb.", },
+ { &test_vcmpequh_ , " vcmpequh.", },
+ { &test_vcmpequw_ , " vcmpequw.", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vmaddfp (void)
+{
+ __asm__ __volatile__ ("vmaddfp 17, 14, 15, 16");
+}
+
+static void test_vnmsubfp (void)
+{
+ __asm__ __volatile__ ("vnmsubfp 17, 14, 15, 16");
+}
+
+static test_t tests_afa_ops_three[] = {
+ { &test_vmaddfp , " vmaddfp", },
+ { &test_vnmsubfp , " vnmsubfp", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vaddfp (void)
+{
+ __asm__ __volatile__ ("vaddfp 17, 14, 15");
+}
+
+static void test_vsubfp (void)
+{
+ __asm__ __volatile__ ("vsubfp 17, 14, 15");
+}
+
+static void test_vmaxfp (void)
+{
+ __asm__ __volatile__ ("vmaxfp 17, 14, 15");
+}
+
+static void test_vminfp (void)
+{
+ __asm__ __volatile__ ("vminfp 17, 14, 15");
+}
+
+static test_t tests_afa_ops_two[] = {
+ { &test_vaddfp , " vaddfp", },
+ { &test_vsubfp , " vsubfp", },
+ { &test_vmaxfp , " vmaxfp", },
+ { &test_vminfp , " vminfp", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vrfin (void)
+{
+ __asm__ __volatile__ ("vrfin 17, 14");
+}
+
+static void test_vrfiz (void)
+{
+ __asm__ __volatile__ ("vrfiz 17, 14");
+}
+
+static void test_vrfip (void)
+{
+ __asm__ __volatile__ ("vrfip 17, 14");
+}
+
+static void test_vrfim (void)
+{
+ __asm__ __volatile__ ("vrfim 17, 14");
+}
+
+static void test_vrefp (void)
+{
+ __asm__ __volatile__ ("vrefp 17, 14");
+}
+
+static void test_vrsqrtefp (void)
+{
+ __asm__ __volatile__ ("vrsqrtefp 17, 14");
+}
+
+static void test_vlogefp (void)
+{
+ __asm__ __volatile__ ("vlogefp 17, 14");
+}
+
+static void test_vexptefp (void)
+{
+ __asm__ __volatile__ ("vexptefp 17, 14");
+}
+
+static test_t tests_afa_ops_one[] = {
+ { &test_vrfin , " vrfin", },
+ { &test_vrfiz , " vrfiz", },
+ { &test_vrfip , " vrfip", },
+ { &test_vrfim , " vrfim", },
+ { &test_vrefp , " vrefp", },
+ { &test_vrsqrtefp , " vrsqrtefp", },
+ { &test_vlogefp , " vlogefp", },
+ { &test_vexptefp , " vexptefp", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vcmpgtfp (void)
+{
+ __asm__ __volatile__ ("vcmpgtfp 17, 14, 15");
+}
+
+static void test_vcmpeqfp (void)
+{
+ __asm__ __volatile__ ("vcmpeqfp 17, 14, 15");
+}
+
+static void test_vcmpgefp (void)
+{
+ __asm__ __volatile__ ("vcmpgefp 17, 14, 15");
+}
+
+static void test_vcmpbfp (void)
+{
+ __asm__ __volatile__ ("vcmpbfp 17, 14, 15");
+}
+
+static test_t tests_afc_ops_two[] = {
+ { &test_vcmpgtfp , " vcmpgtfp", },
+ { &test_vcmpeqfp , " vcmpeqfp", },
+ { &test_vcmpgefp , " vcmpgefp", },
+ { &test_vcmpbfp , " vcmpbfp", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (HAS_ALTIVEC)
+static void test_vcmpgtfp_ (void)
+{
+ __asm__ __volatile__ ("vcmpgtfp. 17, 14, 15");
+}
+
+static void test_vcmpeqfp_ (void)
+{
+ __asm__ __volatile__ ("vcmpeqfp. 17, 14, 15");
+}
+
+static void test_vcmpgefp_ (void)
+{
+ __asm__ __volatile__ ("vcmpgefp. 17, 14, 15");
+}
+
+static void test_vcmpbfp_ (void)
+{
+ __asm__ __volatile__ ("vcmpbfp. 17, 14, 15");
+}
+
+static test_t tests_afcr_ops_two[] = {
+ { &test_vcmpgtfp_ , " vcmpgtfp.", },
+ { &test_vcmpeqfp_ , " vcmpeqfp.", },
+ { &test_vcmpgefp_ , " vcmpgefp.", },
+ { &test_vcmpbfp_ , " vcmpbfp.", },
+ { NULL, NULL, },
+};
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (IS_PPC405)
+static void test_macchw (void)
+{
+ __asm__ __volatile__ ("macchw 17, 14, 15");
+}
+
+static void test_macchwo (void)
+{
+ __asm__ __volatile__ ("macchwo 17, 14, 15");
+}
+
+static void test_macchws (void)
+{
+ __asm__ __volatile__ ("macchws 17, 14, 15");
+}
+
+static void test_macchwso (void)
+{
+ __asm__ __volatile__ ("macchwso 17, 14, 15");
+}
+
+static void test_macchwsu (void)
+{
+ __asm__ __volatile__ ("macchwsu 17, 14, 15");
+}
+
+static void test_macchwsuo (void)
+{
+ __asm__ __volatile__ ("macchwsuo 17, 14, 15");
+}
+
+static void test_macchwu (void)
+{
+ __asm__ __volatile__ ("macchwu 17, 14, 15");
+}
+
+static void test_macchwuo (void)
+{
+ __asm__ __volatile__ ("macchwuo 17, 14, 15");
+}
+
+static void test_machhw (void)
+{
+ __asm__ __volatile__ ("machhw 17, 14, 15");
+}
+
+static void test_machhwo (void)
+{
+ __asm__ __volatile__ ("machhwo 17, 14, 15");
+}
+
+static void test_machhws (void)
+{
+ __asm__ __volatile__ ("machhws 17, 14, 15");
+}
+
+static void test_machhwso (void)
+{
+ __asm__ __volatile__ ("machhwso 17, 14, 15");
+}
+
+static void test_machhwsu (void)
+{
+ __asm__ __volatile__ ("machhwsu 17, 14, 15");
+}
+
+static void test_machhwsuo (void)
+{
+ __asm__ __volatile__ ("machhwsuo 17, 14, 15");
+}
+
+static void test_machhwu (void)
+{
+ __asm__ __volatile__ ("machhwu 17, 14, 15");
+}
+
+static void test_machhwuo (void)
+{
+ __asm__ __volatile__ ("machhwuo 17, 14, 15");
+}
+
+static void test_maclhw (void)
+{
+ __asm__ __volatile__ ("maclhw 17, 14, 15");
+}
+
+static void test_maclhwo (void)
+{
+ __asm__ __volatile__ ("maclhwo 17, 14, 15");
+}
+
+static void test_maclhws (void)
+{
+ __asm__ __volatile__ ("maclhws 17, 14, 15");
+}
+
+static void test_maclhwso (void)
+{
+ __asm__ __volatile__ ("maclhwso 17, 14, 15");
+}
+
+static void test_maclhwsu (void)
+{
+ __asm__ __volatile__ ("maclhwsu 17, 14, 15");
+}
+
+static void test_maclhwsuo (void)
+{
+ __asm__ __volatile__ ("maclhwsuo 17, 14, 15");
+}
+
+static void test_maclhwu (void)
+{
+ __asm__ __volatile__ ("maclhwu 17, 14, 15");
+}
+
+static void test_maclhwuo (void)
+{
+ __asm__ __volatile__ ("maclhwuo 17, 14, 15");
+}
+
+static void test_mulchw (void)
+{
+ __asm__ __volatile__ ("mulchw 17, 14, 15");
+}
+
+static void test_mulchwu (void)
+{
+ __asm__ __volatile__ ("mulchwu 17, 14, 15");
+}
+
+static void test_mulhhw (void)
+{
+ __asm__ __volatile__ ("mulhhw 17, 14, 15");
+}
+
+static void test_mulhhwu (void)
+{
+ __asm__ __volatile__ ("mulhhwu 17, 14, 15");
+}
+
+static void test_mullhw (void)
+{
+ __asm__ __volatile__ ("mullhw 17, 14, 15");
+}
+
+static void test_mullhwu (void)
+{
+ __asm__ __volatile__ ("mullhwu 17, 14, 15");
+}
+
+static void test_nmacchw (void)
+{
+ __asm__ __volatile__ ("nmacchw 17, 14, 15");
+}
+
+static void test_nmacchwo (void)
+{
+ __asm__ __volatile__ ("nmacchwo 17, 14, 15");
+}
+
+static void test_nmacchws (void)
+{
+ __asm__ __volatile__ ("nmacchws 17, 14, 15");
+}
+
+static void test_nmacchwso (void)
+{
+ __asm__ __volatile__ ("nmacchwso 17, 14, 15");
+}
+
+static void test_nmachhw (void)
+{
+ __asm__ __volatile__ ("nmachhw 17, 14, 15");
+}
+
+static void test_nmachhwo (void)
+{
+ __asm__ __volatile__ ("nmachhwo 17, 14, 15");
+}
+
+static void test_nmachhws (void)
+{
+ __asm__ __volatile__ ("nmachhws 17, 14, 15");
+}
+
+static void test_nmachhwso (void)
+{
+ __asm__ __volatile__ ("nmachhwso 17, 14, 15");
+}
+
+static void test_nmaclhw (void)
+{
+ __asm__ __volatile__ ("nmaclhw 17, 14, 15");
+}
+
+static void test_nmaclhwo (void)
+{
+ __asm__ __volatile__ ("nmaclhwo 17, 14, 15");
+}
+
+static void test_nmaclhws (void)
+{
+ __asm__ __volatile__ ("nmaclhws 17, 14, 15");
+}
+
+static void test_nmaclhwso (void)
+{
+ __asm__ __volatile__ ("nmaclhwso 17, 14, 15");
+}
+
+static test_t tests_p4m_ops_two[] = {
+ { &test_macchw , " macchw", },
+ { &test_macchwo , " macchwo", },
+ { &test_macchws , " macchws", },
+ { &test_macchwso , " macchwso", },
+ { &test_macchwsu , " macchwsu", },
+ { &test_macchwsuo , " macchwsuo", },
+ { &test_macchwu , " macchwu", },
+ { &test_macchwuo , " macchwuo", },
+ { &test_machhw , " machhw", },
+ { &test_machhwo , " machhwo", },
+ { &test_machhws , " machhws", },
+ { &test_machhwso , " machhwso", },
+ { &test_machhwsu , " machhwsu", },
+ { &test_machhwsuo , " machhwsuo", },
+ { &test_machhwu , " machhwu", },
+ { &test_machhwuo , " machhwuo", },
+ { &test_maclhw , " maclhw", },
+ { &test_maclhwo , " maclhwo", },
+ { &test_maclhws , " maclhws", },
+ { &test_maclhwso , " maclhwso", },
+ { &test_maclhwsu , " maclhwsu", },
+ { &test_maclhwsuo , " maclhwsuo", },
+ { &test_maclhwu , " maclhwu", },
+ { &test_maclhwuo , " maclhwuo", },
+ { &test_mulchw , " mulchw", },
+ { &test_mulchwu , " mulchwu", },
+ { &test_mulhhw , " mulhhw", },
+ { &test_mulhhwu , " mulhhwu", },
+ { &test_mullhw , " mullhw", },
+ { &test_mullhwu , " mullhwu", },
+ { &test_nmacchw , " nmacchw", },
+ { &test_nmacchwo , " nmacchwo", },
+ { &test_nmacchws , " nmacchws", },
+ { &test_nmacchwso , " nmacchwso", },
+ { &test_nmachhw , " nmachhw", },
+ { &test_nmachhwo , " nmachhwo", },
+ { &test_nmachhws , " nmachhws", },
+ { &test_nmachhwso , " nmachhwso", },
+ { &test_nmaclhw , " nmaclhw", },
+ { &test_nmaclhwo , " nmaclhwo", },
+ { &test_nmaclhws , " nmaclhws", },
+ { &test_nmaclhwso , " nmaclhwso", },
+ { NULL, NULL, },
+};
+#endif /* defined (IS_PPC405) */
+
+#if defined (IS_PPC405)
+static void test_macchw_ (void)
+{
+ __asm__ __volatile__ ("macchw. 17, 14, 15");
+}
+
+static void test_macchwo_ (void)
+{
+ __asm__ __volatile__ ("macchwo. 17, 14, 15");
+}
+
+static void test_macchws_ (void)
+{
+ __asm__ __volatile__ ("macchws. 17, 14, 15");
+}
+
+static void test_macchwso_ (void)
+{
+ __asm__ __volatile__ ("macchwso. 17, 14, 15");
+}
+
+static void test_macchwsu_ (void)
+{
+ __asm__ __volatile__ ("macchwsu. 17, 14, 15");
+}
+
+static void test_macchwsuo_ (void)
+{
+ __asm__ __volatile__ ("macchwsuo. 17, 14, 15");
+}
+
+static void test_macchwu_ (void)
+{
+ __asm__ __volatile__ ("macchwu. 17, 14, 15");
+}
+
+static void test_macchwuo_ (void)
+{
+ __asm__ __volatile__ ("macchwuo. 17, 14, 15");
+}
+
+static void test_machhw_ (void)
+{
+ __asm__ __volatile__ ("machhw. 17, 14, 15");
+}
+
+static void test_machhwo_ (void)
+{
+ __asm__ __volatile__ ("machhwo. 17, 14, 15");
+}
+
+static void test_machhws_ (void)
+{
+ __asm__ __volatile__ ("machhws. 17, 14, 15");
+}
+
+static void test_machhwso_ (void)
+{
+ __asm__ __volatile__ ("machhwso. 17, 14, 15");
+}
+
+static void test_machhwsu_ (void)
+{
+ __asm__ __volatile__ ("machhwsu. 17, 14, 15");
+}
+
+static void test_machhwsuo_ (void)
+{
+ __asm__ __volatile__ ("machhwsuo. 17, 14, 15");
+}
+
+static void test_machhwu_ (void)
+{
+ __asm__ __volatile__ ("machhwu. 17, 14, 15");
+}
+
+static void test_machhwuo_ (void)
+{
+ __asm__ __volatile__ ("machhwuo. 17, 14, 15");
+}
+
+static void test_maclhw_ (void)
+{
+ __asm__ __volatile__ ("maclhw. 17, 14, 15");
+}
+
+static void test_maclhwo_ (void)
+{
+ __asm__ __volatile__ ("maclhwo. 17, 14, 15");
+}
+
+static void test_maclhws_ (void)
+{
+ __asm__ __volatile__ ("maclhws. 17, 14, 15");
+}
+
+static void test_maclhwso_ (void)
+{
+ __asm__ __volatile__ ("maclhwso. 17, 14, 15");
+}
+
+static void test_maclhwsu_ (void)
+{
+ __asm__ __volatile__ ("maclhwsu. 17, 14, 15");
+}
+
+static void test_maclhwsuo_ (void)
+{
+ __asm__ __volatile__ ("maclhwsuo. 17, 14, 15");
+}
+
+static void test_maclhwu_ (void)
+{
+ __asm__ __volatile__ ("maclhwu. 17, 14, 15");
+}
+
+static void test_maclhwuo_ (void)
+{
+ __asm__ __volatile__ ("maclhwuo. 17, 14, 15");
+}
+
+static void test_mulchw_ (void)
+{
+ __asm__ __volatile__ ("mulchw. 17, 14, 15");
+}
+
+static void test_mulchwu_ (void)
+{
+ __asm__ __volatile__ ("mulchwu. 17, 14, 15");
+}
+
+static void test_mulhhw_ (void)
+{
+ __asm__ __volatile__ ("mulhhw. 17, 14, 15");
+}
+
+static void test_mulhhwu_ (void)
+{
+ __asm__ __volatile__ ("mulhhwu. 17, 14, 15");
+}
+
+static void test_mullhw_ (void)
+{
+ __asm__ __volatile__ ("mullhw. 17, 14, 15");
+}
+
+static void test_mullhwu_ (void)
+{
+ __asm__ __volatile__ ("mullhwu. 17, 14, 15");
+}
+
+static void test_nmacchw_ (void)
+{
+ __asm__ __volatile__ ("nmacchw. 17, 14, 15");
+}
+
+static void test_nmacchwo_ (void)
+{
+ __asm__ __volatile__ ("nmacchwo. 17, 14, 15");
+}
+
+static void test_nmacchws_ (void)
+{
+ __asm__ __volatile__ ("nmacchws. 17, 14, 15");
+}
+
+static void test_nmacchwso_ (void)
+{
+ __asm__ __volatile__ ("nmacchwso. 17, 14, 15");
+}
+
+static void test_nmachhw_ (void)
+{
+ __asm__ __volatile__ ("nmachhw. 17, 14, 15");
+}
+
+static void test_nmachhwo_ (void)
+{
+ __asm__ __volatile__ ("nmachhwo. 17, 14, 15");
+}
+
+static void test_nmachhws_ (void)
+{
+ __asm__ __volatile__ ("nmachhws. 17, 14, 15");
+}
+
+static void test_nmachhwso_ (void)
+{
+ __asm__ __volatile__ ("nmachhwso. 17, 14, 15");
+}
+
+static void test_nmaclhw_ (void)
+{
+ __asm__ __volatile__ ("nmaclhw. 17, 14, 15");
+}
+
+static void test_nmaclhwo_ (void)
+{
+ __asm__ __volatile__ ("nmaclhwo. 17, 14, 15");
+}
+
+static void test_nmaclhws_ (void)
+{
+ __asm__ __volatile__ ("nmaclhws. 17, 14, 15");
+}
+
+static void test_nmaclhwso_ (void)
+{
+ __asm__ __volatile__ ("nmaclhwso. 17, 14, 15");
+}
+
+static test_t tests_p4mc_ops_two[] = {
+ { &test_macchw_ , " macchw.", },
+ { &test_macchwo_ , " macchwo.", },
+ { &test_macchws_ , " macchws.", },
+ { &test_macchwso_ , " macchwso.", },
+ { &test_macchwsu_ , " macchwsu.", },
+ { &test_macchwsuo_ , " macchwsuo.", },
+ { &test_macchwu_ , " macchwu.", },
+ { &test_macchwuo_ , " macchwuo.", },
+ { &test_machhw_ , " machhw.", },
+ { &test_machhwo_ , " machhwo.", },
+ { &test_machhws_ , " machhws.", },
+ { &test_machhwso_ , " machhwso.", },
+ { &test_machhwsu_ , " machhwsu.", },
+ { &test_machhwsuo_ , " machhwsuo.", },
+ { &test_machhwu_ , " machhwu.", },
+ { &test_machhwuo_ , " machhwuo.", },
+ { &test_maclhw_ , " maclhw.", },
+ { &test_maclhwo_ , " maclhwo.", },
+ { &test_maclhws_ , " maclhws.", },
+ { &test_maclhwso_ , " maclhwso.", },
+ { &test_maclhwsu_ , " maclhwsu.", },
+ { &test_maclhwsuo_ , " maclhwsuo.", },
+ { &test_maclhwu_ , " maclhwu.", },
+ { &test_maclhwuo_ , " maclhwuo.", },
+ { &test_mulchw_ , " mulchw.", },
+ { &test_mulchwu_ , " mulchwu.", },
+ { &test_mulhhw_ , " mulhhw.", },
+ { &test_mulhhwu_ , " mulhhwu.", },
+ { &test_mullhw_ , " mullhw.", },
+ { &test_mullhwu_ , " mullhwu.", },
+ { &test_nmacchw_ , " nmacchw.", },
+ { &test_nmacchwo_ , " nmacchwo.", },
+ { &test_nmacchws_ , " nmacchws.", },
+ { &test_nmacchwso_ , " nmacchwso.", },
+ { &test_nmachhw_ , " nmachhw.", },
+ { &test_nmachhwo_ , " nmachhwo.", },
+ { &test_nmachhws_ , " nmachhws.", },
+ { &test_nmachhwso_ , " nmachhwso.", },
+ { &test_nmaclhw_ , " nmaclhw.", },
+ { &test_nmaclhwo_ , " nmaclhwo.", },
+ { &test_nmaclhws_ , " nmaclhws.", },
+ { &test_nmaclhwso_ , " nmaclhwso.", },
+ { NULL, NULL, },
+};
+#endif /* defined (IS_PPC405) */
+
+static test_table_t all_tests[] = {
+ {
+ tests_ia_ops_two ,
+ "PPC integer arithmetic instructions with two arguments",
+ 0x00010102,
+ },
+ {
+ tests_iar_ops_two ,
+ "PPC integer instructions with two arguments with flags update",
+ 0x01010102,
+ },
+ {
+ tests_il_ops_two ,
+ "PPC integer logical instructions with two arguments",
+ 0x00010202,
+ },
+ {
+ tests_ilr_ops_two ,
+ "PPC integer logical instructions with two arguments with flags update",
+ 0x01010202,
+ },
+ {
+ tests_icr_ops_two ,
+ "PPC integer compare instructions (two arguents)",
+ 0x01010304,
+ },
+ {
+ tests_icr_ops_two_i16 ,
+ "PPC integer compare with immediate instructions (two arguents)",
+ 0x01010304,
+ },
+ {
+ tests_ia_ops_two_i16 ,
+ "PPC integer arithmetic instructions\n with one register + one 16 bits immediate arguments",
+ 0x00010106,
+ },
+ {
+ tests_iar_ops_two_i16 ,
+ "PPC integer arithmetic instructions\n with one register + one 16 bits immediate arguments with flags update",
+ 0x01010106,
+ },
+ {
+ tests_il_ops_two_i16 ,
+ "PPC integer logical instructions\n with one register + one 16 bits immediate arguments",
+ 0x00010206,
+ },
+ {
+ tests_ilr_ops_two_i16 ,
+ "PPC integer logical instructions\n with one register + one 16 bits immediate arguments with flags update",
+ 0x01010206,
+ },
+ {
+ tests_crl_ops_two ,
+ "PPC condition register logical instructions - two operands",
+ 0x01000602,
+ },
+ {
+ tests_ia_ops_one ,
+ "PPC integer arithmetic instructions with one argument",
+ 0x00010101,
+ },
+ {
+ tests_iar_ops_one ,
+ "PPC integer arithmetic instructions with one argument with flags update",
+ 0x01010101,
+ },
+ {
+ tests_il_ops_one ,
+ "PPC integer logical instructions with one argument",
+ 0x00010201,
+ },
+ {
+ tests_ilr_ops_one ,
+ "PPC integer logical instructions with one argument with flags update",
+ 0x01010201,
+ },
+ {
+ tests_il_ops_spe ,
+ "PPC logical instructions with special forms",
+ 0x00010207,
+ },
+ {
+ tests_ilr_ops_spe ,
+ "PPC logical instructions with special forms with flags update",
+ 0x01010207,
+ },
+#if !defined (NO_FLOAT)
+ {
+ tests_fa_ops_three ,
+ "PPC floating point arithmetic instructions with three arguments",
+ 0x00020103,
+ },
+#endif /* !defined (NO_FLOAT) */
+#if !defined (NO_FLOAT)
+ {
+ tests_far_ops_three ,
+ "PPC floating point arithmetic instructions\n with three arguments with flags update",
+ 0x01020103,
+ },
+#endif /* !defined (NO_FLOAT) */
+#if !defined (NO_FLOAT)
+ {
+ tests_fa_ops_two ,
+ "PPC floating point arithmetic instructions with two arguments",
+ 0x00020102,
+ },
+#endif /* !defined (NO_FLOAT) */
+#if !defined (NO_FLOAT)
+ {
+ tests_far_ops_two ,
+ "PPC floating point arithmetic instructions\n with two arguments with flags update",
+ 0x01020102,
+ },
+#endif /* !defined (NO_FLOAT) */
+#if !defined (NO_FLOAT)
+ {
+ tests_fcr_ops_two ,
+ "PPC floating point compare instructions (two arguments)",
+ 0x01020304,
+ },
+#endif /* !defined (NO_FLOAT) */
+#if !defined (NO_FLOAT)
+ {
+ tests_fa_ops_one ,
+ "PPC floating point arithmetic instructions with one argument",
+ 0x00020101,
+ },
+#endif /* !defined (NO_FLOAT) */
+#if !defined (NO_FLOAT)
+ {
+ tests_far_ops_one ,
+ "PPC floating point arithmetic instructions\n with one argument with flags update",
+ 0x01020101,
+ },
+#endif /* !defined (NO_FLOAT) */
+#if !defined (NO_FLOAT)
+ {
+ tests_fl_ops_spe ,
+ "PPC floating point status register manipulation instructions",
+ 0x00020207,
+ },
+#endif /* !defined (NO_FLOAT) */
+#if !defined (NO_FLOAT)
+ {
+ tests_flr_ops_spe ,
+ "PPC floating point status register manipulation instructions\n with flags update",
+ 0x01020207,
+ },
+#endif /* !defined (NO_FLOAT) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_aa_ops_three ,
+ "PPC altivec integer arithmetic instructions with three arguments",
+ 0x00040103,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_al_ops_three ,
+ "PPC altivec integer logical instructions with three arguments",
+ 0x00040203,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_aa_ops_two ,
+ "PPC altivec integer arithmetic instructions with two arguments",
+ 0x00040102,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_al_ops_two ,
+ "PPC altivec integer logical instructions with two arguments",
+ 0x00040202,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_al_ops_one ,
+ "PPC altivec integer logical instructions with one argument",
+ 0x00040201,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_ac_ops_two ,
+ "Altivec integer compare instructions",
+ 0x00040302,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_acr_ops_two ,
+ "Altivec integer compare instructions with flags update",
+ 0x01040302,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_afa_ops_three ,
+ "Altivec floating point arithmetic instructions with three arguments",
+ 0x00050103,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_afa_ops_two ,
+ "Altivec floating point arithmetic instructions with two arguments",
+ 0x00050102,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_afa_ops_one ,
+ "Altivec floating point arithmetic instructions with one argument",
+ 0x00050101,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_afc_ops_two ,
+ "Altivec floating point compare instructions",
+ 0x00050302,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (HAS_ALTIVEC)
+ {
+ tests_afcr_ops_two ,
+ "Altivec floating point compare instructions with flags update",
+ 0x01050302,
+ },
+#endif /* defined (HAS_ALTIVEC) */
+#if defined (IS_PPC405)
+ {
+ tests_p4m_ops_two ,
+ "PPC 405 mac instructions with three arguments",
+ 0x00030102,
+ },
+#endif /* defined (IS_PPC405) */
+#if defined (IS_PPC405)
+ {
+ tests_p4mc_ops_two ,
+ "PPC 405 mac instructions with three arguments with flags update",
+ 0x01030102,
+ },
+#endif /* defined (IS_PPC405) */
+ { NULL, NULL, 0x00000000, },
+};
+
+// END #include "ops-ppc.c"
+
+
+static int verbose = 0;
+
+static double *fargs;
+static int nb_fargs;
+static uint32_t *iargs;
+static int nb_iargs;
+static uint16_t *ii16;
+static int nb_ii16;
+
+static inline void register_farg (void *farg,
+ int s, uint16_t _exp, uint64_t mant)
+{
+ uint64_t tmp;
+
+ tmp = ((uint64_t)s << 63) | ((uint64_t)_exp << 52) | mant;
+ *(uint64_t *)farg = tmp;
+ AB_DPRINTF("%d %03x %013llx => %016llx %0e\n",
+ s, _exp, mant, *(uint64_t *)farg, *(double *)farg);
+}
+
+static void build_fargs_table (void)
+{
+ /* Sign goes from zero to one
+ * Exponent goes from 0 to ((1 << 12) - 1)
+ * Mantissa goes from 1 to ((1 << 52) - 1)
+ * + special values:
+ * +0.0 : 0 0x000 0x0000000000000
+ * -0.0 : 1 0x000 0x0000000000000
+ * +infinity : 0 0x7FF 0x0000000000000
+ * -infinity : 1 0x7FF 0x0000000000000
+ * +SNaN : 0 0x7FF 0x7FFFFFFFFFFFF
+ * -SNaN : 1 0x7FF 0x7FFFFFFFFFFFF
+ * +QNaN : 0 0x7FF 0x8000000000000
+ * -QNaN : 1 0x7FF 0x8000000000000
+ * (8 values)
+ */
+ uint64_t mant;
+ uint16_t _exp, e0, e1;
+ int s;
+ int i;
+
+ fargs = my_malloc(200 * sizeof(double));
+ i = 0;
+ for (s = 0; s < 2; s++) {
+ for (e0 = 0; e0 < 2; e0++) {
+ for (e1 = 0x000; ; e1 = ((e1 + 1) << 2) + 6) {
+ if (e1 >= 0x400)
+ e1 = 0x3fe;
+ _exp = (e0 << 10) | e1;
+ for (mant = 0x0000000000001ULL; mant < (1ULL << 52);
+ /* Add 'random' bits */
+ mant = ((mant + 0x4A6) << 13) + 0x359) {
+ register_farg(&fargs[i++], s, _exp, mant);
+ }
+ if (e1 == 0x3fe)
+ break;
+ }
+ }
+ }
+ /* Special values */
+ /* +0.0 : 0 0x000 0x0000000000000 */
+ s = 0;
+ _exp = 0x000;
+ mant = 0x0000000000000ULL;
+ register_farg(&fargs[i++], s, _exp, mant);
+ /* -0.0 : 1 0x000 0x0000000000000 */
+ s = 1;
+ _exp = 0x000;
+ mant = 0x0000000000000ULL;
+ register_farg(&fargs[i++], s, _exp, mant);
+ /* +infinity : 0 0x7FF 0x0000000000000 */
+ s = 0;
+ _exp = 0x7FF;
+ mant = 0x0000000000000ULL;
+ register_farg(&fargs[i++], s, _exp, mant);
+ /* -infinity : 1 0x7FF 0x0000000000000 */
+ s = 1;
+ _exp = 0x7FF;
+ mant = 0x0000000000000ULL;
+ register_farg(&fargs[i++], s, _exp, mant);
+ /* +SNaN : 0 0x7FF 0x7FFFFFFFFFFFF */
+ s = 0;
+ _exp = 0x7FF;
+ mant = 0x7FFFFFFFFFFFFULL;
+ register_farg(&fargs[i++], s, _exp, mant);
+ /* -SNaN : 1 0x7FF 0x7FFFFFFFFFFFF */
+ s = 1;
+ _exp = 0x7FF;
+ mant = 0x7FFFFFFFFFFFFULL;
+ register_farg(&fargs[i++], s, _exp, mant);
+ /* +QNaN : 0 0x7FF 0x8000000000000 */
+ s = 0;
+ _exp = 0x7FF;
+ mant = 0x8000000000000ULL;
+ register_farg(&fargs[i++], s, _exp, mant);
+ /* -QNaN : 1 0x7FF 0x8000000000000 */
+ s = 1;
+ _exp = 0x7FF;
+ mant = 0x8000000000000ULL;
+ register_farg(&fargs[i++], s, _exp, mant);
+ AB_DPRINTF("Registered %d floats values\n", i);
+ nb_fargs = i;
+}
+
+static void build_iargs_table (void)
+{
+ uint64_t tmp;
+ int i;
+
+ iargs = my_malloc(400 * sizeof(uint32_t));
+ i = 0;
+ for (tmp = 0; ; tmp = tmp + 1 + (tmp>>1)+(tmp>>2)+(tmp>>3)) {
+ if (tmp >= 0x100000000ULL)
+ tmp = 0xFFFFFFFF;
+ iargs[i++] = tmp;
+ AB_DPRINTF("val %08llx\n", tmp);
+ if (tmp == 0xFFFFFFFF)
+ break;
+ }
+ AB_DPRINTF("Registered %d ints values\n", i);
+ nb_iargs = i;
+}
+
+static void build_ii16_table (void)
+{
+ uint32_t tmp;
+ int i;
+
+ ii16 = my_malloc(200 * sizeof(uint32_t));
+ i = 0;
+ for (tmp = 0; ; tmp = tmp + 1 + (tmp>>1)+(tmp>>2)+(tmp>>3)) {
+ if (tmp >= 0x10000)
+ tmp = 0xFFFF;
+ ii16[i++] = tmp;
+ AB_DPRINTF("val %08llx\n", tmp);
+ if (tmp == 0xFFFF)
+ break;
+ }
+ AB_DPRINTF("Registered %d ints values\n", i);
+ nb_ii16 = i;
+}
+
+static void test_int_three_args (const unsigned char *name, test_func_t func)
+{
+ uint32_t res, flags, xer;
+ int i, j, k;
+
+ if (verbose > 1)
+ vexxx_printf( "Test instruction %s\n", name);
+ for (i = 0; i < nb_iargs; i++) {
+ for (j = 0; j < nb_iargs; j++) {
+ for (k = 0;k < nb_iargs; k++) {
+ r14 = iargs[i];
+ r15 = iargs[j];
+ r16 = iargs[k];
+ r18 = 0;
+ __asm__ __volatile__ ("mtcr 18");
+ __asm__ __volatile__ ("mtxer 18");
+ (*func)();
+ __asm__ __volatile__ ("mfcr 18");
+ flags = r18;
+ __asm__ __volatile__ ("mfxer 18");
+ xer = r18;
+ res = r17;
+ vexxx_printf("%s %08x, %08x, %08x => %08x (%08x %08x)\n",
+ name, iargs[i], iargs[j], iargs[k], res, flags, xer);
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+}
+
+static void test_int_two_args (const unsigned char *name, test_func_t func)
+{
+ uint32_t res, flags, xer;
+ int i, j;
+
+ if (verbose > 1)
+ vexxx_printf( "Test instruction %s\n", name);
+ for (i = 0; i < nb_iargs; i++) {
+ for (j = 0; j < nb_iargs; j++) {
+ r14 = iargs[i];
+ r15 = iargs[j];
+ r18 = 0;
+ __asm__ __volatile__ ("mtcr 18");
+ __asm__ __volatile__ ("mtxer 18");
+ (*func)();
+ __asm__ __volatile__ ("mfcr 18");
+ flags = r18;
+ __asm__ __volatile__ ("mfxer 18");
+ xer = r18;
+ res = r17;
+ vexxx_printf("%s %08x, %08x => %08x (%08x %08x)\n",
+ name, iargs[i], iargs[j], res, flags, xer);
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+}
+
+static void test_int_one_arg (const unsigned char *name, test_func_t func)
+{
+ uint32_t res, flags, xer;
+ int i;
+
+ if (verbose > 1)
+ vexxx_printf( "Test instruction %s\n", name);
+ for (i = 0; i < nb_iargs; i++) {
+ r14 = iargs[i];
+ r18 = 0;
+ __asm__ __volatile__ ("mtcr 18");
+// r18 = 0x20000000; // set xer_ca
+ __asm__ __volatile__ ("mtxer 18");
+ (*func)();
+ res = r17;
+ __asm__ __volatile__ ("mfcr 18");
+ flags = r18;
+ __asm__ __volatile__ ("mfxer 18");
+ xer = r18;
+ vexxx_printf("%s %08x => %08x (%08x %08x)\n",
+ name, iargs[i], res, flags, xer);
+ }
+ vexxx_printf("\n");
+}
+
+static inline void _patch_op_imm (void *out, void *in,
+ uint16_t imm, int sh, int len)
+{
+ volatile uint32_t *p, *q;
+
+ p = out;
+ q = in;
+ *p = (*q & ~(((1 << len) - 1) << sh)) | ((imm & ((1 << len) - 1)) << sh);
+}
+
+static inline void patch_op_imm (void *out, void *in,
+ uint16_t imm, int sh, int len)
+{
+ volatile uint32_t *p;
+
+ p = out;
+ _patch_op_imm(out, in, imm, sh, len);
+ __asm__ __volatile__ ("dcbf 0, %0 ; icbi 0, %0 ; isync" ::"r"(p));
+}
+
+static inline void patch_op_imm16 (void *out, void *in, uint16_t imm)
+{
+ patch_op_imm(out, in, imm, 0, 16);
+}
+
+static void test_int_one_reg_imm16 (const unsigned char *name,
+ test_func_t func)
+{
+ uint32_t func_buf[2], *p;
+ uint32_t res, flags, xer;
+ int i, j;
+
+ if (verbose > 1)
+ vexxx_printf( "Test instruction %s\n", name);
+ for (i = 0; i < nb_iargs; i++) {
+ for (j = 0; j < nb_ii16; j++) {
+ p = (void *)func;
+#if 0
+ vexxx_printf("copy func %s from %p to %p (%08x %08x)\n",
+ name, func, func_buf, p[0], p[1]);
+#endif
+ func_buf[1] = p[1];
+ patch_op_imm16(func_buf, p, ii16[j]);
+ func = (void *)func_buf;
+#if 0
+ vexxx_printf(" => func %s from %p to %p (%08x %08x)\n",
+ name, func, func_buf, func_buf[0], func_buf[1]);
+#endif
+ r14 = iargs[i];
+ r18 = 0;
+ __asm__ __volatile__ ("mtcr 18");
+ __asm__ __volatile__ ("mtxer 18");
+ (*func)();
+ __asm__ __volatile__ ("mfcr 18");
+ flags = r18;
+ __asm__ __volatile__ ("mfxer 18");
+ xer = r18;
+ res = r17;
+ vexxx_printf("%s %08x, %08x => %08x (%08x %08x)\n",
+ name, iargs[i], ii16[j], res, flags, xer);
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+}
+
+/* Special test cases for:
+ * rlwimi
+ * rlwinm
+ * rlwnm
+ * srawi
+ * mcrf
+ * mcrfs
+ * mffs
+ * mtfsb0
+ * mtfsb1
+ */
+
+static void rlwi_cb (const unsigned char *name, test_func_t func)
+{
+ uint32_t func_buf[2], *p;
+ uint32_t res, flags, xer;
+ int i, j, k, l;
+
+ if (verbose > 1)
+ vexxx_printf( "Test instruction %s\n", name);
+ for (i = 0;;) {
+ if (i >= nb_iargs)
+ i = nb_iargs - 1;
+ for (j = 0; j < 32; j++) {
+ for (k = 0; k < 32; k++) {
+ for (l = 0; l < 32; l++) {
+ p = (void *)func;
+ func_buf[1] = p[1];
+ _patch_op_imm(func_buf, p, j, 11, 5);
+ _patch_op_imm(func_buf, p, k, 6, 5);
+ patch_op_imm(func_buf, p, l, 1, 5);
+ func = (void *)func_buf;
+ r14 = iargs[i];
+ r18 = 0;
+ __asm__ __volatile__ ("mtcr 18");
+ __asm__ __volatile__ ("mtxer 18");
+ (*func)();
+ __asm__ __volatile__ ("mfcr 18");
+ flags = r18;
+ __asm__ __volatile__ ("mfxer 18");
+ xer = r18;
+ res = r17;
+ vexxx_printf("%s %08x, %d, %d, %d => %08x (%08x %08x)\n",
+ name, iargs[i], j, k, l, res, flags, xer);
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+ if (i == 0)
+ i = 1;
+ else if (i == nb_iargs - 1)
+ break;
+ else
+ i += 3;
+ }
+ vexxx_printf("\n");
+}
+
+static void rlwnm_cb (const unsigned char *name, test_func_t func)
+{
+ uint32_t func_buf[2], *p;
+ uint32_t res, flags, xer;
+ int i, j, k, l;
+
+ if (verbose > 1)
+ vexxx_printf( "Test instruction %s\n", name);
+ for (i = 0; i < nb_iargs; i++) {
+ for (j = 0; j < 64; j++) {
+ for (k = 0; k < 32; k++) {
+ for (l = 0; l < 32; l++) {
+ p = (void *)func;
+ func_buf[1] = p[1];
+ _patch_op_imm(func_buf, p, k, 6, 5);
+ patch_op_imm(func_buf, p, l, 1, 5);
+ func = (void *)func_buf;
+ r14 = iargs[i];
+ r15 = j;
+ r18 = 0;
+ __asm__ __volatile__ ("mtcr 18");
+ __asm__ __volatile__ ("mtxer 18");
+ (*func)();
+ __asm__ __volatile__ ("mfcr 18");
+ flags = r18;
+ __asm__ __volatile__ ("mfxer 18");
+ xer = r18;
+ res = r17;
+ vexxx_printf("%s %08x, %08x, %d, %d => %08x (%08x %08x)\n",
+ name, iargs[i], j, k, l, res, flags, xer);
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+}
+
+static void srawi_cb (const unsigned char *name, test_func_t func)
+{
+ uint32_t func_buf[2], *p;
+ uint32_t res, flags, xer;
+ int i, j;
+
+ if (verbose > 1)
+ vexxx_printf( "Test instruction %s\n", name);
+ for (i = 0; i < nb_iargs; i++) {
+ for (j = 0; j < 32; j++) {
+ p = (void *)func;
+ func_buf[1] = p[1];
+ patch_op_imm(func_buf, p, j, 11, 5);
+ func = (void *)func_buf;
+ r14 = iargs[i];
+ r18 = 0;
+ __asm__ __volatile__ ("mtcr 18");
+ __asm__ __volatile__ ("mtxer 18");
+ (*func)();
+ __asm__ __volatile__ ("mfcr 18");
+ flags = r18;
+ __asm__ __volatile__ ("mfxer 18");
+ xer = r18;
+ res = r17;
+ vexxx_printf("%s %08x, %d => %08x (%08x %08x)\n",
+ name, iargs[i], j, res, flags, xer);
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+}
+
+typedef struct special_t special_t;
+struct special_t {
+ const unsigned char *name;
+ void (*test_cb)(const unsigned char *name, test_func_t func);
+};
+
+static void test_special (special_t *table,
+ const unsigned char *name, test_func_t func)
+{
+ const unsigned char *tmp;
+ int i;
+
+ for (tmp = name; my_isspace(*tmp); tmp++)
+ continue;
+ for (i = 0; table[i].name != NULL; i++) {
+#if 0
+ vexxx_printf( "look for handler for '%s' (%s)\n", name,
+ table[i].name);
+#endif
+ if (my_strcmp(table[i].name, tmp) == 0) {
+ (*table[i].test_cb)(name, func);
+ return;
+ }
+ }
+ vexxx_printf( "ERROR: no test found for op '%s'\n", name);
+}
+
+static special_t special_int_ops[] = {
+#if 0
+ {
+ "rlwimi", /* One register + 3 5 bits immediate arguments */
+ &rlwi_cb,
+ },
+ {
+ "rlwimi.", /* One register + 3 5 bits immediate arguments */
+ &rlwi_cb,
+ },
+ {
+ "rlwinm", /* One register + 3 5 bits immediate arguments */
+ &rlwi_cb,
+ },
+ {
+ "rlwinm.", /* One register + 3 5 bits immediate arguments */
+ &rlwi_cb,
+ },
+ {
+ "rlwnm", /* Two registers + 3 5 bits immediate arguments */
+ &rlwnm_cb,
+ },
+ {
+ "rlwnm.", /* Two registers + 3 5 bits immediate arguments */
+ &rlwnm_cb,
+ },
+ {
+ "srawi", /* One register + 1 5 bits immediate arguments */
+ &srawi_cb,
+ },
+ {
+ "srawi.", /* One register + 1 5 bits immediate arguments */
+ &srawi_cb,
+ },
+#endif
+#if 0
+ {
+ "mcrf", /* 2 3 bits immediate arguments */
+ &mcrf_cb,
+ },
+ {
+ "mcrf", /* 2 3 bits immediate arguments */
+ &mcrf_cb,
+ },
+#endif
+ {
+ NULL,
+ NULL,
+ },
+};
+
+static void test_int_special (const unsigned char *name, test_func_t func)
+{
+ test_special(special_int_ops, name, func);
+}
+
+static test_loop_t int_loops[] = {
+ &test_int_one_arg,
+ &test_int_two_args,
+ &test_int_three_args,
+ &test_int_two_args,
+ &test_int_one_reg_imm16,
+ &test_int_one_reg_imm16,
+ &test_int_special,
+};
+
+#if !defined (NO_FLOAT)
+static void test_float_three_args (const unsigned char *name, test_func_t func)
+{
+ double res;
+ uint64_t u0, u1, u2, ur;
+ uint32_t flags;
+ int i, j, k;
+
+ if (verbose > 1)
+ vexxx_printf( "Test instruction %s\n", name);
+ for (i = 0; i < nb_fargs; i++) {
+ for (j = 0; j < nb_fargs; j++) {
+ for (k = 0;k < nb_fargs; k++) {
+ u0 = *(uint64_t *)(&fargs[i]);
+ u1 = *(uint64_t *)(&fargs[j]);
+ u2 = *(uint64_t *)(&fargs[k]);
+ f14 = fargs[i];
+ f15 = fargs[j];
+ f16 = fargs[k];
+ r18 = 0;
+ __asm__ __volatile__ ("mtcr 18");
+ __asm__ __volatile__ ("mtxer 18");
+ f18 = +0.0;
+ __asm__ __volatile__ ("mtfsf 0xFF, 18");
+ (*func)();
+ __asm__ __volatile__ ("mfcr 18");
+ flags = r18;
+ res = f17;
+ ur = *(uint64_t *)(&res);
+ vexxx_printf("%s %016llx, %016llx, %016llx => %016llx (%08x)\n",
+ name, u0, u1, u2, ur, flags);
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+}
+
+static void test_float_two_args (const unsigned char *name, test_func_t func)
+{
+ double res;
+ uint64_t u0, u1, ur;
+ uint32_t flags;
+ int i, j;
+
+ if (verbose > 1)
+ vexxx_printf( "Test instruction %s\n", name);
+ for (i = 0; i < nb_fargs; i++) {
+ for (j = 0; j < nb_fargs; j++) {
+ u0 = *(uint64_t *)(&fargs[i]);
+ u1 = *(uint64_t *)(&fargs[j]);
+ f14 = fargs[i];
+ f15 = fargs[j];
+ r18 = 0;
+ __asm__ __volatile__ ("mtcr 18");
+ __asm__ __volatile__ ("mtxer 18");
+ f18 = +0.0;
+ __asm__ __volatile__ ("mtfsf 0xFF, 18");
+ (*func)();
+ __asm__ __volatile__ ("mfcr 18");
+ flags = r18;
+ res = f17;
+ ur = *(uint64_t *)(&res);
+ vexxx_printf("%s %016llx, %016llx => %016llx (%08x)\n",
+ name, u0, u1, ur, flags);
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+}
+
+static void test_float_one_arg (const unsigned char *name, test_func_t func)
+{
+ double res;
+ uint64_t u0, ur;
+ uint32_t flags;
+ int i;
+
+ if (verbose > 1)
+ vexxx_printf( "Test instruction %s\n", name);
+ for (i = 0; i < nb_fargs; i++) {
+ u0 = *(uint64_t *)(&fargs[i]);
+ f14 = fargs[i];
+ r18 = 0;
+ __asm__ __volatile__ ("mtcr 18");
+ __asm__ __volatile__ ("mtxer 18");
+ f18 = +0.0;
+ __asm__ __volatile__ ("mtfsf 0xFF, 18");
+ (*func)();
+ __asm__ __volatile__ ("mfcr 18");
+ flags = r18;
+ res = f17;
+ ur = *(uint64_t *)(&res);
+ vexxx_printf("%s %016llx => %016llx (%08x)\n", name, u0, ur, flags);
+ }
+ vexxx_printf("\n");
+}
+
+static special_t special_float_ops[] = {
+#if 0
+ {
+ "mffs", /* One 5 bits immediate argument */
+ &mffs_cb,
+ },
+ {
+ "mffs.", /* One 5 bits immediate argument */
+ &mffs_cb,
+ },
+ {
+ "mtfsb0", /* One 5 bits immediate argument */
+ &mffs_cb,
+ },
+ {
+ "mtfsb0.", /* One 5 bits immediate argument */
+ &mffs_cb,
+ },
+ {
+ "mtfsb1", /* One 5 bits immediate argument */
+ &mffs_cb,
+ },
+ {
+ "mtfsb1.", /* One 5 bits immediate argument */
+ &mffs_cb,
+ },
+ {
+ "mtfsf", /* One register + 1 8 bits immediate argument */
+ &mtfsf_cb,
+ },
+ {
+ "mtfsf.", /* One register + 1 8 bits immediate argument */
+ &mtfsf_cb,
+ },
+ {
+ "mtfsfi", /* One 5 bits argument + 1 5 bits argument */
+ &mtfsfi_cb,
+ },
+ {
+ "mtfsfi.", /* One 5 bits argument + 1 5 bits argument */
+ &mtfsfi_cb,
+ },
+#endif
+ {
+ NULL,
+ NULL,
+ },
+};
+
+static void test_float_special (const unsigned char *name, test_func_t func)
+{
+ test_special(special_float_ops, name, func);
+}
+
+static test_loop_t float_loops[] = {
+ &test_float_one_arg,
+ &test_float_two_args,
+ &test_float_three_args,
+ &test_float_two_args,
+ NULL,
+ NULL,
+ &test_float_special,
+};
+#endif /* !defined (NO_FLOAT) */
+
+
+#if defined (HAS_ALTIVEC) /* XXX: TODO */
+#endif /* defined (HAS_ALTIVEC) */
+
+#if defined (IS_PPC405)
+static void test_ppc405 (const unsigned char *name, test_func_t func)
+{
+ uint32_t res, flags, xer;
+ int i, j, k;
+
+ if (verbose > 1)
+ vexxx_printf( "Test instruction %s\n", name);
+ for (i = 0; i < nb_iargs; i++) {
+ for (j = 0; j < nb_iargs; j++) {
+ for (k = 0;k < nb_iargs; k++) {
+ r14 = iargs[i];
+ r15 = iargs[j];
+ /* Beware: the third argument and the result
+ * are in the same register
+ */
+ r17 = iargs[k];
+ r18 = 0;
+ __asm__ __volatile__ ("mtcr 18");
+ __asm__ __volatile__ ("mtxer 18");
+ (*func)();
+ __asm__ __volatile__ ("mfcr 18");
+ flags = r18;
+ __asm__ __volatile__ ("mfxer 18");
+ xer = r18;
+ res = r17;
+ vexxx_printf("%s %08x, %08x, %08x => %08x (%08x %08x)\n",
+ name, iargs[i], iargs[j], iargs[k], res, flags, xer);
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf("\n");
+}
+#endif /* defined (IS_PPC405) */
+
+static int check_filter (unsigned char *filter)
+{
+ unsigned char *c;
+ int ret = 1;
+
+ if (filter != NULL) {
+ c = my_strchr(filter, '*');
+ if (c != NULL) {
+ *c = '\0';
+ ret = 0;
+ }
+ }
+
+ return ret;
+}
+
+static int check_name (const unsigned char *name, const unsigned char *filter,
+ int exact)
+{
+ int nlen, flen;
+ int ret = 0;
+
+ if (filter != NULL) {
+ for (; my_isspace(*name); name++)
+ continue;
+ FDPRINTF("Check '%s' againt '%s' (%s match)\n",
+ name, filter, exact ? "exact" : "starting");
+ nlen = vexxx_strlen(name);
+ flen = vexxx_strlen(filter);
+ if (exact) {
+ if (nlen == flen && my_memcmp(name, filter, flen) == 0)
+ ret = 1;
+ } else {
+ if (flen <= nlen && my_memcmp(name, filter, flen) == 0)
+ ret = 1;
+ }
+ } else {
+ ret = 1;
+ }
+
+ return ret;
+}
+
+static void do_tests (int one_arg, int two_args, int three_args,
+ int arith, int logical, int compare,
+ int integer, int floats, int p405,
+ int altivec, int faltivec,
+ int cr, unsigned char *filter)
+{
+#if defined (IS_PPC405)
+ test_loop_t tmpl;
+#endif
+ test_loop_t *loop;
+ test_t *tests;
+ int nb_args, type, family;
+ int i, j, n;
+ int exact;
+
+ exact = check_filter(filter);
+ n = 0;
+ for (i = 0; all_tests[i].name != NULL; i++) {
+ nb_args = all_tests[i].flags & PPC_NB_ARGS;
+ /* Check number of arguments */
+ if ((nb_args == 1 && !one_arg) ||
+ (nb_args == 2 && !two_args) ||
+ (nb_args == 3 && !three_args))
+ continue;
+ /* Check instruction type */
+ type = all_tests[i].flags & PPC_TYPE;
+ if ((type == PPC_ARITH && !arith) ||
+ (type == PPC_LOGICAL && !logical) ||
+ (type == PPC_COMPARE && !compare))
+ continue;
+ /* Check instruction family */
+ family = all_tests[i].flags & PPC_FAMILY;
+ if ((family == PPC_INTEGER && !integer) ||
+ (family == PPC_FLOAT && !floats) ||
+ (family == PPC_405 && !p405) ||
+ (family == PPC_ALTIVEC && !altivec) ||
+ (family == PPC_FALTIVEC && !faltivec))
+ continue;
+ /* Check flags update */
+ if (((all_tests[i].flags & PPC_CR) && cr == 0) ||
+ (!(all_tests[i].flags & PPC_CR) && cr == 1))
+ continue;
+ /* All passed, do the tests */
+ tests = all_tests[i].tests;
+ /* Select the test loop */
+ switch (family) {
+ case PPC_INTEGER:
+ loop = &int_loops[nb_args - 1];
+ break;
+ case PPC_FLOAT:
+#if !defined (NO_FLOAT)
+ loop = &float_loops[nb_args - 1];
+ break;
+#else
+ vexxx_printf( "Sorry. "
+ "PPC floating point instructions tests "
+ "are disabled on your host\n");
+#endif /* !defined (NO_FLOAT) */
+
+ case PPC_405:
+#if defined (IS_PPC405)
+ tmpl = &test_ppc405;
+ loop = &tmpl;
+ break;
+#else
+ vexxx_printf( "Sorry. "
+ "PPC405 instructions tests are disabled on your host\n");
+ continue;
+#endif /* defined (IS_PPC405) */
+ case PPC_ALTIVEC:
+#if defined (HAS_ALTIVEC)
+#if 0
+ loop = &altivec_int_loops[nb_args - 1];
+ break;
+#else
+ vexxx_printf( "Sorry. "
+ "Altivec instructions tests are not yet implemented\n");
+ continue;
+#endif
+#else
+ vexxx_printf( "Sorry. "
+ "Altivec instructions tests are disabled on your host\n");
+ continue;
+#endif
+ case PPC_FALTIVEC:
+#if defined (HAS_ALTIVEC)
+#if 0
+ loop = &altivec_float_loops[nb_args - 1];
+ break;
+#else
+ vexxx_printf( "Sorry. "
+ "Altivec instructions tests are not yet implemented\n");
+ continue;
+#endif
+#else
+ vexxx_printf( "Sorry. "
+ "Altivec float instructions tests "
+ "are disabled on your host\n");
+#endif
+ continue;
+ default:
+ vexxx_printf("ERROR: unknown insn family %08x\n", family);
+ continue;
+ }
+ if (verbose > 0)
+ vexxx_printf( "%s:\n", all_tests[i].name);
+ for (j = 0; tests[j].name != NULL; j++) {
+ if (check_name(tests[j].name, filter, exact))
+ (*loop)(tests[j].name, tests[j].func);
+ n++;
+ }
+ vexxx_printf("\n");
+ }
+ vexxx_printf( "All done. Tested %d different instructions\n", n);
+}
+
+#if 0 // unused
+static void usage (void)
+{
+ vexxx_printf(
+ "test-ppc [-1] [-2] [-3] [-*] [-t <type>] [-f <family>] [-u] "
+ "[-n <filter>] [-x] [-h]\n"
+ "\t-1: test opcodes with one argument\n"
+ "\t-2: test opcodes with two arguments\n"
+ "\t-3: test opcodes with three arguments\n"
+ "\t-*: launch test without checking the number of arguments\n"
+ "\t-t: launch test for instructions of type <type>\n"
+ "\t recognized types:\n"
+ "\t\tarith (or a)\n"
+ "\t\tlogical (or l)\n"
+ "\t\tcompare (or c)\n"
+ "\t-f: launch test for instructions of family <family>\n"
+ "\t recognized families:\n"
+ "\t\tinteger (or i)\n"
+ "\t\tfloat (or f)\n"
+ "\t\tppc405 (or mac)\n"
+ "\t\taltivec (or a)\n"
+ "\t-u: test instructions that update flags\n"
+ "\t-n: filter instructions with <filter>\n"
+ "\t <filter> can be in two forms:\n"
+ "\t\tname : filter functions that exactly match <name>\n"
+ "\t\tname* : filter functions that start with <name>\n"
+ "\t-h: print this help\n"
+ );
+}
+#endif
+
+int _main (int argc, char **argv)
+{
+ unsigned char /* *tmp, */ *filter = NULL;
+ int one_arg = 0, two_args = 0, three_args = 0;
+ int arith = 0, logical = 0, compare = 0;
+ int integer = 0, floats = 0, p405 = 0, altivec = 0, faltivec = 0;
+ int cr = -1;
+ //int c;
+
+ // while ((c = getopt(argc, argv, "123t:f:n:uvh")) != -1) {
+ // switch (c) {
+ // case '1':
+ // one_arg = 1;
+ // break;
+ // case '2':
+ // two_args = 1;
+ // break;
+ // case '3':
+ // three_args = 1;
+ // break;
+ // case 't':
+ // tmp = optarg;
+ // if (my_strcmp(tmp, "arith") == 0 || my_strcmp(tmp, "a") == 0) {
+ // arith = 1;
+ // } else if (my_strcmp(tmp, "logical") == 0 || my_strcmp(tmp, "l") == 0) {
+ // logical = 1;
+ // } else if (my_strcmp(tmp, "compare") == 0 || my_strcmp(tmp, "c") == 0) {
+ // compare = 1;
+ // } else {
+ // goto bad_arg;
+ // }
+ // break;
+ // case 'f':
+ // tmp = optarg;
+ // if (my_strcmp(tmp, "integer") == 0 || my_strcmp(tmp, "i") == 0) {
+ // integer = 1;
+ // } else if (my_strcmp(tmp, "float") == 0 || my_strcmp(tmp, "f") == 0) {
+ // floats = 1;
+ // } else if (my_strcmp(tmp, "ppc405") == 0 || my_strcmp(tmp, "mac") == 0) {
+ // p405 = 1;
+ // } else if (my_strcmp(tmp, "altivec") == 0 || my_strcmp(tmp, "a") == 0) {
+ // altivec = 1;
+ // faltivec = 1;
+ // } else {
+ // goto bad_arg;
+ // }
+ // break;
+ // case 'n':
+ // filter = optarg;
+ // break;
+ // case 'u':
+ // cr = 1;
+ // break;
+ // case 'h':
+ // usage();
+ // return 0;
+ // case 'v':
+ // verbose++;
+ // break;
+ // default:
+ // usage();
+ // vexxx_printf( "Unknown argument: '%c'\n", c);
+ // return 1;
+ // bad_arg:
+ // usage();
+ // vexxx_printf( "Bad argument for '%c': '%s'\n", c, tmp);
+ // return 1;
+ // }
+ // }
+ // if (argc != optind) {
+ // usage();
+ // vexxx_printf( "Bad number of arguments\n");
+ // return 1;
+ // }
+
+ if (one_arg == 0 && two_args == 0 && three_args == 0) {
+ one_arg = 1;
+ two_args = 1;
+ three_args = 1;
+ }
+ if (arith == 0 && logical == 0 && compare == 0) {
+ arith = 1;
+ logical = 1;
+ compare = 1;
+ }
+ if (integer == 0 && floats == 0 && altivec == 0 && faltivec == 0 &&
+ p405 == 0) {
+ integer = 1;
+ floats = 1;
+ altivec = 1;
+ faltivec = 1;
+ p405 = 1;
+ }
+ if (cr == -1)
+ cr = 2;
+ build_iargs_table();
+ build_fargs_table();
+ build_ii16_table();
+
+#if 1
+ one_arg=1;
+ two_args=1;
+ three_args=1;
+
+ arith=1;
+ logical=1;
+ compare=1;
+
+ integer=1;
+ floats=0;
+
+ p405=0;
+ altivec=0;
+ faltivec=0;
+#endif
+
+ do_tests(one_arg, two_args, three_args,
+ arith, logical, compare,
+ integer, floats, p405, altivec, faltivec,
+ cr, filter);
+
+ return 0;
+}
+
+
+void entry ( HWord(*service)(HWord,HWord) )
+{
+ char* argv[2] = { NULL, NULL };
+ serviceFn = service;
+ _main(0, argv);
+ (*service)(0,0);
+}
diff --git a/main/VEX/switchback/test_simple.c b/main/VEX/switchback/test_simple.c
new file mode 100644
index 0000000..9a7756a
--- /dev/null
+++ b/main/VEX/switchback/test_simple.c
@@ -0,0 +1,12 @@
+
+
+static void bar ( void*(*service)(int,int) )
+{
+ __asm__ __volatile__ ("addi 17, 14, 5");
+}
+
+void entry ( void*(*service)(int,int) )
+{
+ bar(service);
+ service(0,0);
+}
diff --git a/main/VEX/test/fldenv.c b/main/VEX/test/fldenv.c
new file mode 100644
index 0000000..4f37d61
--- /dev/null
+++ b/main/VEX/test/fldenv.c
@@ -0,0 +1,32 @@
+
+#include <stdio.h>
+#include <stdlib.h>
+
+void do_fstenv ( void* p )
+{
+ asm("movl 8(%esp), %eax ; fstenv (%eax)");
+}
+
+void do_fldenv ( void* p )
+{
+ asm("movl 8(%esp), %eax ; fldenv (%eax)");
+}
+
+int main ( void )
+{
+ int i;
+ unsigned short* buf = malloc(14*sizeof(short));
+ for (i = 0; i < 14; i++)
+ buf[i] = i;
+ buf[0] = 0x037f;
+
+ do_fldenv(buf);
+ do_fstenv(buf);
+ for (i = 0; i < 14; i++) {
+ printf("%04x ", buf[i]);
+ if (i > 0 && ((i % 12) == 11))
+ printf("\n");
+ }
+ printf("\n");
+ return 0;
+}
diff --git a/main/VEX/test/fp1.c b/main/VEX/test/fp1.c
new file mode 100644
index 0000000..3f3aca3
--- /dev/null
+++ b/main/VEX/test/fp1.c
@@ -0,0 +1,17 @@
+
+#include <stdio.h>
+
+double a[10];
+
+int main ( void )
+{
+ int i;
+ double s;
+ for (i = 0; i < 10; i++)
+ a[i] = 11.11 * i;
+ s = 0.0;
+ for (i = 0; i < 10; i++)
+ s += a[i];
+ printf("result = %f\n", s);
+ return 0;
+}
diff --git a/main/VEX/test/fp1.s b/main/VEX/test/fp1.s
new file mode 100644
index 0000000..8d3d9fd
--- /dev/null
+++ b/main/VEX/test/fp1.s
@@ -0,0 +1,52 @@
+ .file "fp1.c"
+ .version "01.01"
+gcc2_compiled.:
+ .section .rodata.str1.1,"aMS",@progbits,1
+.LC2:
+ .string "result = %f\n"
+ .section .rodata.cst8,"aM",@progbits,8
+ .align 8
+.LC0:
+ .long 0xeb851eb8,0x40263851
+.text
+ .align 4
+.globl main
+ .type main,@function
+main:
+ pushl %ebp
+ movl %esp, %ebp
+ subl $8, %esp
+ movl $0, %eax
+ movl $a, %edx
+ fldl .LC0
+ .p2align 2
+.L21:
+ fld %st(0)
+ pushl %eax
+ fimull (%esp)
+ popl %eax
+ fstpl (%edx,%eax,8)
+ incl %eax
+ cmpl $9, %eax
+ jle .L21
+ fstp %st(0)
+ fldz
+ movl $0, %eax
+ movl $a, %edx
+ .p2align 2
+.L26:
+ faddl (%edx,%eax,8)
+ incl %eax
+ cmpl $9, %eax
+ jle .L26
+ subl $12, %esp
+ fstpl (%esp)
+ pushl $.LC2
+ call printf
+ movl $0, %eax
+ leave
+ ret
+.Lfe1:
+ .size main,.Lfe1-main
+ .comm a,80,32
+ .ident "GCC: (GNU) 2.96 20000731 (Red Hat Linux 7.3 2.96-110)"
diff --git a/main/VEX/test/fpconst.c b/main/VEX/test/fpconst.c
new file mode 100644
index 0000000..c6ebdc3
--- /dev/null
+++ b/main/VEX/test/fpconst.c
@@ -0,0 +1,77 @@
+
+#include <stdio.h>
+#include <stdlib.h>
+
+void do_fld1 ( void* p )
+{
+ asm __volatile__("fninit");
+ asm __volatile__("fld1");
+ asm __volatile__("fstpl (%0)" : : "r" (p) : "memory" );
+}
+
+void do_fldl2t ( void* p )
+{
+ asm __volatile__("fninit");
+ asm __volatile__("fldl2t");
+ asm __volatile__("fstpl (%0)" : : "r" (p) : "memory" );
+}
+
+void do_fldl2e ( void* p )
+{
+ asm __volatile__("fninit");
+ asm __volatile__("fldl2e");
+ asm __volatile__("fstpl (%0)" : : "r" (p) : "memory" );
+}
+
+void do_fldpi ( void* p )
+{
+ asm __volatile__("fninit");
+ asm __volatile__("fldpi");
+ asm __volatile__("fstpl (%0)" : : "r" (p) : "memory" );
+}
+
+void do_fldlg2 ( void* p )
+{
+ asm __volatile__("fninit");
+ asm __volatile__("fldlg2");
+ asm __volatile__("fstpl (%0)" : : "r" (p) : "memory" );
+}
+
+void do_fldln2 ( void* p )
+{
+ asm __volatile__("fninit");
+ asm __volatile__("fldln2");
+ asm __volatile__("fstpl (%0)" : : "r" (p) : "memory" );
+}
+
+void do_fldz ( void* p )
+{
+ asm __volatile__("fninit");
+ asm __volatile__("fldz");
+ asm __volatile__("fstpl (%0)" : : "r" (p) : "memory" );
+}
+
+typedef unsigned char UChar;
+
+void foo ( void (*f)(void*), char* name )
+{
+ int i;
+ UChar* b = malloc(8);
+ f(b);
+ printf("%s IRConst_F64i(0x", name);
+ for (i = 7; i >= 0; i--)
+ printf("%02x", (int)b[i]);
+ printf(")\n");
+}
+
+int main ( void )
+{
+ foo( do_fld1, "fld1 ");
+ foo( do_fldl2t, "fldl2t");
+ foo( do_fldl2e, "fldl2e");
+ foo( do_fldpi, "fldpi ");
+ foo( do_fldlg2, "fldlg2");
+ foo( do_fldln2, "fldln2");
+ foo( do_fldz, "fldz ");
+ return 0;
+}
diff --git a/main/VEX/test/fpgames.s b/main/VEX/test/fpgames.s
new file mode 100644
index 0000000..222f33b
--- /dev/null
+++ b/main/VEX/test/fpgames.s
@@ -0,0 +1,103 @@
+ .file "fpgames.c"
+ .version "01.01"
+gcc2_compiled.:
+ .section .rodata.str1.1,"aMS",@progbits,1
+.LC0:
+ .string "%02x "
+.LC1:
+ .string "\n"
+.text
+ .align 4
+.globl show
+ .type show,@function
+show:
+ pushl %ebp
+ movl %esp, %ebp
+ pushl %ebx
+ subl $4, %esp
+ movl $0, %ebx
+ .p2align 2
+.L21:
+ subl $8, %esp
+ movzbl st(%ebx), %eax
+ pushl %eax
+ pushl $.LC0
+ call printf
+ addl $16, %esp
+ testl %ebx, %ebx
+ jle .L20
+ movl %ebx, %eax
+ andl $3, %eax
+ cmpl $3, %eax
+ jne .L20
+ subl $12, %esp
+ pushl $.LC1
+ call printf
+ addl $16, %esp
+.L20:
+ incl %ebx
+ cmpl $27, %ebx
+ jle .L21
+ movl $0, %ebx
+ .p2align 2
+.L27:
+ subl $8, %esp
+ movzbl st+28(%ebx), %eax
+ pushl %eax
+ pushl $.LC0
+ call printf
+ addl $16, %esp
+ testl %ebx, %ebx
+ jle .L26
+ movl $10, %edx
+ movl %ebx, %eax
+ movl %edx, %ecx
+ cltd
+ idivl %ecx
+ cmpl $9, %edx
+ jne .L26
+ subl $12, %esp
+ pushl $.LC1
+ call printf
+ addl $16, %esp
+.L26:
+ incl %ebx
+ cmpl $79, %ebx
+ jle .L27
+ subl $12, %esp
+ pushl $.LC1
+ call printf
+ movl -4(%ebp), %ebx
+ leave
+ ret
+.Lfe1:
+ .size show,.Lfe1-show
+ .section .rodata.str1.1,"aMS",@progbits,1
+.LC2:
+ .string "\n\n"
+.text
+ .align 4
+.globl main
+ .type main,@function
+main:
+ pushl %ebp
+ movl %esp, %ebp
+ subl $8, %esp
+#APP
+ finit ; fnsave st
+#NO_APP
+ call show
+ subl $12, %esp
+ pushl $.LC2
+ call printf
+#APP
+ fld1 ; fnsave st
+#NO_APP
+ call show
+ movl $0, %eax
+ leave
+ ret
+.Lfe2:
+ .size main,.Lfe2-main
+ .comm st,108,32
+ .ident "GCC: (GNU) 2.96 20000731 (Red Hat Linux 7.3 2.96-110)"
diff --git a/main/VEX/test/fpspeed.c b/main/VEX/test/fpspeed.c
new file mode 100644
index 0000000..83996ea
--- /dev/null
+++ b/main/VEX/test/fpspeed.c
@@ -0,0 +1,29 @@
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+
+int main ( void )
+{
+ int i, j;
+ double s, r;
+ s = 0.0;
+ double* a1 = malloc(1000 * sizeof(double));
+ double* a2 = malloc(1000 * sizeof(double));
+ for (i = 0; i < 1000; i++) {
+ a1[i] = s;
+ s += 0.3374893482232;
+ a2[i] = s;
+ }
+
+ s = 0.0;
+ r = 0.0;
+ for (j = 0; j < 5000; j++) {
+ for (i = 0; i < 1000; i++) {
+ s += (a1[i] - a2[i]) * (a1[i] + a2[i]) - sqrt(r + 1.0);
+ r += 0.001;
+ }
+ }
+ printf("s = %f, r = %f\n", s, r );
+ return 0;
+}
diff --git a/main/VEX/test/fpucw.c b/main/VEX/test/fpucw.c
new file mode 100644
index 0000000..0130897
--- /dev/null
+++ b/main/VEX/test/fpucw.c
@@ -0,0 +1,43 @@
+
+#include <stdio.h>
+
+void fldcw_default ( void )
+{
+ asm(" pushw $0x037F ; fldcw (%esp) ; addl $2, %esp");
+}
+
+void fldcw_exns ( void )
+{
+ asm(" pushw $0x037E ; fldcw (%esp) ; addl $2, %esp");
+}
+
+void fldcw_precision ( void )
+{
+ asm(" pushw $0x007F ; fldcw (%esp) ; addl $2, %esp");
+}
+
+void fldcw_rounding ( void )
+{
+ asm(" pushw $0x077F ; fldcw (%esp) ; addl $2, %esp");
+}
+
+int main ( void )
+{
+ printf("default\n");
+ fldcw_default();
+ printf("\n");
+
+ printf("exns\n");
+ fldcw_exns();
+ printf("\n");
+
+ printf("precision\n");
+ fldcw_precision();
+ printf("\n");
+
+ printf("rounding\n");
+ fldcw_rounding();
+ printf("\n");
+
+ return 0;
+}
diff --git a/main/VEX/test/frstor.c b/main/VEX/test/frstor.c
new file mode 100644
index 0000000..006e19e
--- /dev/null
+++ b/main/VEX/test/frstor.c
@@ -0,0 +1,82 @@
+
+#include <stdio.h>
+#include <stdlib.h>
+
+void do_fsave_interesting_stuff ( void* p )
+{
+ asm __volatile__("fninit");
+ asm __volatile__("fldpi");
+ asm __volatile__("fld1");
+ asm __volatile__("fldln2");
+ asm __volatile__("fsave (%0)" : : "r" (p) : "memory" );
+}
+
+void do_fsave ( void* p )
+{
+ asm __volatile__("fsave (%0)" : : "r" (p) : "memory" );
+}
+
+void do_frstor ( void* p )
+{
+ asm __volatile__("frstor (%0)" : : "r" (p) : "memory" );
+}
+
+
+int isFPLsbs ( int i )
+{
+ int q;
+ q = 0; if (i == q || i == q+1) return 1;
+ q = 10; if (i == q || i == q+1) return 1;
+ q = 20; if (i == q || i == q+1) return 1;
+ q = 30; if (i == q || i == q+1) return 1;
+ q = 40; if (i == q || i == q+1) return 1;
+ q = 50; if (i == q || i == q+1) return 1;
+ q = 60; if (i == q || i == q+1) return 1;
+ q = 70; if (i == q || i == q+1) return 1;
+ return 0;
+}
+
+void show_fpustate ( unsigned char* buf, int hide64to80 )
+{
+ int i;
+ printf(" 0 ");
+ for (i = 0; i < 14; i++)
+ printf("%02x ", buf[i]);
+ printf("\n");
+
+ printf(" 14 ");
+ for (i = 14; i < 28; i++)
+ printf("%02x ", buf[i]);
+ printf("\n");
+
+ for (i = 0; i < 80; i++) {
+ if ((i % 10) == 0)
+ printf("%3d ", i+28);
+ if (hide64to80 && isFPLsbs(i))
+ printf("xx ");
+ else
+ printf("%02x ", buf[i+28]);
+ if (i > 0 && ((i % 10) == 9))
+ printf("\n");
+ }
+}
+
+int main ( int argc, char** argv )
+{
+ unsigned short* buf1 = malloc(54*sizeof(short));
+ unsigned short* buf2 = malloc(54*sizeof(short));
+ int xx = argc > 1;
+ printf("Re-run with any arg to suppress least-significant\n"
+ " 16 bits of FP numbers\n");
+
+ /* Create an initial image. */
+ do_fsave_interesting_stuff(buf1);
+ show_fpustate( (unsigned char*)buf1, xx );
+
+ /* Reload it into buf2. */
+ do_frstor(buf1);
+ do_fsave(buf2);
+ show_fpustate( (unsigned char*)buf2, xx );
+
+ return 0;
+}
diff --git a/main/VEX/test/fsave.c b/main/VEX/test/fsave.c
new file mode 100644
index 0000000..293711d
--- /dev/null
+++ b/main/VEX/test/fsave.c
@@ -0,0 +1,68 @@
+
+#include <stdio.h>
+#include <stdlib.h>
+
+void do_fsave ( void* p )
+{
+ asm __volatile__("fninit");
+ asm __volatile__("fldpi");
+ asm __volatile__("fld1");
+ asm __volatile__("fldln2");
+ asm __volatile__("fsave (%0)" : : "r" (p) : "memory" );
+}
+
+int isFPLsbs ( int i )
+{
+ int q;
+ q = 0; if (i == q || i == q+1) return 1;
+ q = 10; if (i == q || i == q+1) return 1;
+ q = 20; if (i == q || i == q+1) return 1;
+ q = 30; if (i == q || i == q+1) return 1;
+ q = 40; if (i == q || i == q+1) return 1;
+ q = 50; if (i == q || i == q+1) return 1;
+ q = 60; if (i == q || i == q+1) return 1;
+ q = 70; if (i == q || i == q+1) return 1;
+ return 0;
+}
+
+void show_fpustate ( unsigned char* buf, int hide64to80 )
+{
+ int i;
+ printf(" 0 ");
+ for (i = 0; i < 14; i++)
+ printf("%02x ", buf[i]);
+ printf("\n");
+
+ printf(" 14 ");
+ for (i = 14; i < 28; i++)
+ printf("%02x ", buf[i]);
+ printf("\n");
+
+ for (i = 0; i < 80; i++) {
+ if ((i % 10) == 0)
+ printf("%3d ", i+28);
+ if (hide64to80 && isFPLsbs(i))
+ printf("xx ");
+ else
+ printf("%02x ", buf[i+28]);
+ if (i > 0 && ((i % 10) == 9))
+ printf("\n");
+ }
+}
+
+int main ( int argc, char** argv )
+{
+ int i;
+ unsigned char* buf = malloc(108);
+ int xx = argc > 1;
+ printf("Re-run with any arg to suppress least-significant\n"
+ " 16 bits of FP numbers\n");
+ for (i = 0; i < 108; i++)
+ buf[i] = 0xAA;
+
+ /* dump FPU state in buf, and show it. */
+ do_fsave(buf);
+ show_fpustate( buf, xx );
+
+ return 0;
+}
diff --git a/main/VEX/test/fstenv.c b/main/VEX/test/fstenv.c
new file mode 100644
index 0000000..331714d
--- /dev/null
+++ b/main/VEX/test/fstenv.c
@@ -0,0 +1,22 @@
+
+#include <stdio.h>
+#include <stdlib.h>
+
+void do_fstenv ( void* p )
+{
+ asm("fldpi ; fld1; fldln2 ; movl 8(%esp), %eax ; fstenv (%eax)");
+}
+
+int main ( void )
+{
+ int i;
+ unsigned int* buf = malloc(7*sizeof(int));
+ do_fstenv(buf);
+ for (i = 0; i < 7; i++) {
+ printf("%08x ", buf[i]);
+ if (i > 0 && ((i % 6) == 5))
+ printf("\n");
+ }
+ printf("\n");
+ return 0;
+}
diff --git a/main/VEX/test/fxsave.c b/main/VEX/test/fxsave.c
new file mode 100644
index 0000000..6557907
--- /dev/null
+++ b/main/VEX/test/fxsave.c
@@ -0,0 +1,136 @@
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <malloc.h>
+#include <string.h>
+
+const unsigned int vec0[4]
+ = { 0x12345678, 0x11223344, 0x55667788, 0x87654321 };
+
+const unsigned int vec1[4]
+ = { 0xABCDEF01, 0xAABBCCDD, 0xEEFF0011, 0x10FEDCBA };
+
+const unsigned int vecZ[4]
+ = { 0, 0, 0, 0 };
+
+void do_fxsave ( void* p ) {
+ asm __volatile__("fxsave (%0)" : : "r" (p) : "memory" );
+}
+
+void do_fxrstor ( void* p ) {
+ asm __volatile__("fxrstor (%0)" : : "r" (p) : "memory" );
+}
+
+void do_zeroise ( void )
+{
+ asm __volatile__("finit");
+ asm __volatile__(
+ "fldz\n\t"
+ "fldz\n\t"
+ "fldz\n\t"
+ "fldz\n\t"
+ "fldz\n\t"
+ "fldz\n\t"
+ "fldz\n\t"
+ "fldz\n\t"
+ "finit\n");
+ asm __volatile__("movups vecZ, %xmm0");
+ asm __volatile__("movups vecZ, %xmm1");
+ asm __volatile__("movups vecZ, %xmm2");
+ asm __volatile__("movups vecZ, %xmm3");
+ asm __volatile__("movups vecZ, %xmm4");
+ asm __volatile__("movups vecZ, %xmm5");
+ asm __volatile__("movups vecZ, %xmm6");
+ asm __volatile__("movups vecZ, %xmm7");
+ asm __volatile__(
+ "pushl $0\n\t"
+ "ldmxcsr 0(%esp)\n\t"
+ "addl $4,%esp\n");
+}
+
+/* set up the FP and SSE state, and then dump it. */
+void do_setup_then_fxsave ( void* p )
+{
+ asm __volatile__("finit");
+ asm __volatile__("fldpi");
+ asm __volatile__("fld1");
+ asm __volatile__("fldln2");
+ asm __volatile__("fldlg2");
+ asm __volatile__("fld %st(3)");
+ asm __volatile__("fld %st(3)");
+ asm __volatile__("movups vec0, %xmm0");
+ asm __volatile__("movups vec1, %xmm1");
+ asm __volatile__("xorps %xmm2, %xmm2");
+ asm __volatile__("movaps %xmm2, %xmm3");
+ asm __volatile__("movaps %xmm2, %xmm4");
+ asm __volatile__("movaps %xmm2, %xmm5");
+ asm __volatile__("movaps %xmm2, %xmm6");
+ asm __volatile__("movaps %xmm1, %xmm7");
+ asm __volatile__("xorps %xmm0, %xmm7");
+ do_fxsave (p);
+}
+
+int isFPLsbs ( int i )
+{
+ int q;
+ q = 32; if (i == q || i == q+1) return 1;
+ q = 48; if (i == q || i == q+1) return 1;
+ q = 64; if (i == q || i == q+1) return 1;
+ q = 80; if (i == q || i == q+1) return 1;
+ q = 96; if (i == q || i == q+1) return 1;
+ q = 112; if (i == q || i == q+1) return 1;
+ q = 128; if (i == q || i == q+1) return 1;
+ q = 144; if (i == q || i == q+1) return 1;
+ return 0;
+}
+
+void show ( unsigned char* buf, int xx )
+{
+ int i;
+ for (i = 0; i < 512; i++) {
+ if ((i % 16) == 0)
+ printf("%3d ", i);
+ if (xx && isFPLsbs(i))
+ printf("xx ");
+ else
+ printf("%02x ", buf[i]);
+ if (i > 0 && ((i % 16) == 15))
+ printf("\n");
+ }
+}
+
+
+int main ( int argc, char** argv )
+{
+ unsigned char* buf1 = memalign(16,512);
+ unsigned char* buf2 = memalign(16,512);
+ unsigned char* buf3 = memalign(16,512);
+ int xx = argc > 1;
+ printf("Re-run with any arg to suppress least-significant\n"
+ " 16 bits of FP numbers\n");
+ memset(buf1, 0x55, 512);
+ memset(buf2, 0x55, 512);
+ memset(buf3, 0x55, 512);
+
+ /* Load up x87/xmm state and dump it. */
+ do_setup_then_fxsave(buf1);
+ printf("\nBEFORE\n");
+ show(buf1, xx);
+
+ /* Zeroise x87/xmm state and dump it, to show that the
+ regs have been cleared out. */
+ do_zeroise();
+ do_fxsave(buf2);
+ printf("\nZEROED\n");
+ show(buf2, xx);
+
+ /* Reload x87/xmm state from buf1 and dump it in buf3. */
+ do_fxrstor(buf1);
+ do_fxsave(buf3);
+ printf("\nRESTORED\n");
+ show(buf3, xx);
+
+ free(buf1); free(buf2); free(buf3);
+
+ return 0;
+}
diff --git a/main/VEX/test/mmxtest.c b/main/VEX/test/mmxtest.c
new file mode 100644
index 0000000..e1ca547
--- /dev/null
+++ b/main/VEX/test/mmxtest.c
@@ -0,0 +1,605 @@
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#define HAVE_SSE2 1
+
+/* DO NOT COMPILE WITH -O/-O2/-O3 ! GENERATES INVALID ASSEMBLY. */
+
+
+/* mmx.h
+
+ MultiMedia eXtensions GCC interface library for IA32.
+
+ To use this library, simply include this header file
+ and compile with GCC. You MUST have inlining enabled
+ in order for mmx_ok() to work; this can be done by
+ simply using -O on the GCC command line.
+
+ Compiling with -DMMX_TRACE will cause detailed trace
+ output to be sent to stderr for each mmx operation.
+ This adds lots of code, and obviously slows execution to
+ a crawl, but can be very useful for debugging.
+
+ THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY
+ EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT
+ LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ AND FITNESS FOR ANY PARTICULAR PURPOSE.
+
+ June 11, 1998 by H. Dietz and R. Fisher
+*/
+
+
+/* The type of an value that fits in an MMX register
+ (note that long long constant values MUST be suffixed
+ by LL and unsigned long long values by ULL, lest
+ they be truncated by the compiler)
+*/
+typedef union {
+ long long q; /* Quadword (64-bit) value */
+ unsigned long long uq; /* Unsigned Quadword */
+ int d[2]; /* 2 Doubleword (32-bit) values */
+ unsigned int ud[2]; /* 2 Unsigned Doubleword */
+ short w[4]; /* 4 Word (16-bit) values */
+ unsigned short uw[4]; /* 4 Unsigned Word */
+ char b[8]; /* 8 Byte (8-bit) values */
+ unsigned char ub[8]; /* 8 Unsigned Byte */
+} mmx_t;
+
+
+/* Function to test if mmx instructions are supported...
+*/
+inline extern int
+mmx_ok(void)
+{
+ /* Returns 1 if mmx instructions are ok,
+ 0 if hardware does not support mmx
+ */
+ register int ok = 0;
+
+ __asm__ __volatile__ (
+ /* Get CPU version information */
+ "movl $1, %%eax\n\t"
+ "cpuid\n\t"
+ "movl %%edx, %0"
+ : "=a" (ok)
+ : /* no input */
+ );
+ return((ok & 0x800000) == 0x800000);
+}
+
+
+/* Helper functions for the instruction macros that follow...
+ (note that memory-to-register, m2r, instructions are nearly
+ as efficient as register-to-register, r2r, instructions;
+ however, memory-to-memory instructions are really simulated
+ as a convenience, and are only 1/3 as efficient)
+*/
+#ifdef MMX_TRACE
+
+/* Include the stuff for printing a trace to stderr...
+*/
+
+#include <stdio.h>
+
+#define mmx_m2r(op, mem, reg) \
+ { \
+ mmx_t mmx_trace; \
+ mmx_trace = (mem); \
+ fprintf(stderr, #op "_m2r(" #mem "=0x%016llx, ", mmx_trace.q); \
+ __asm__ __volatile__ ("movq %%" #reg ", %0" \
+ : "=X" (mmx_trace) \
+ : /* nothing */ ); \
+ fprintf(stderr, #reg "=0x%016llx) => ", mmx_trace.q); \
+ __asm__ __volatile__ (#op " %0, %%" #reg \
+ : /* nothing */ \
+ : "X" (mem)); \
+ __asm__ __volatile__ ("movq %%" #reg ", %0" \
+ : "=X" (mmx_trace) \
+ : /* nothing */ ); \
+ fprintf(stderr, #reg "=0x%016llx\n", mmx_trace.q); \
+ }
+
+#define mmx_r2m(op, reg, mem) \
+ { \
+ mmx_t mmx_trace; \
+ __asm__ __volatile__ ("movq %%" #reg ", %0" \
+ : "=X" (mmx_trace) \
+ : /* nothing */ ); \
+ fprintf(stderr, #op "_r2m(" #reg "=0x%016llx, ", mmx_trace.q); \
+ mmx_trace = (mem); \
+ fprintf(stderr, #mem "=0x%016llx) => ", mmx_trace.q); \
+ __asm__ __volatile__ (#op " %%" #reg ", %0" \
+ : "=X" (mem) \
+ : /* nothing */ ); \
+ mmx_trace = (mem); \
+ fprintf(stderr, #mem "=0x%016llx\n", mmx_trace.q); \
+ }
+
+#define mmx_r2r(op, regs, regd) \
+ { \
+ mmx_t mmx_trace; \
+ __asm__ __volatile__ ("movq %%" #regs ", %0" \
+ : "=X" (mmx_trace) \
+ : /* nothing */ ); \
+ fprintf(stderr, #op "_r2r(" #regs "=0x%016llx, ", mmx_trace.q); \
+ __asm__ __volatile__ ("movq %%" #regd ", %0" \
+ : "=X" (mmx_trace) \
+ : /* nothing */ ); \
+ fprintf(stderr, #regd "=0x%016llx) => ", mmx_trace.q); \
+ __asm__ __volatile__ (#op " %" #regs ", %" #regd); \
+ __asm__ __volatile__ ("movq %%" #regd ", %0" \
+ : "=X" (mmx_trace) \
+ : /* nothing */ ); \
+ fprintf(stderr, #regd "=0x%016llx\n", mmx_trace.q); \
+ }
+
+#define mmx_m2m(op, mems, memd) \
+ { \
+ mmx_t mmx_trace; \
+ mmx_trace = (mems); \
+ fprintf(stderr, #op "_m2m(" #mems "=0x%016llx, ", mmx_trace.q); \
+ mmx_trace = (memd); \
+ fprintf(stderr, #memd "=0x%016llx) => ", mmx_trace.q); \
+ __asm__ __volatile__ ("movq %0, %%mm0\n\t" \
+ #op " %1, %%mm0\n\t" \
+ "movq %%mm0, %0" \
+ : "=X" (memd) \
+ : "X" (mems)); \
+ mmx_trace = (memd); \
+ fprintf(stderr, #memd "=0x%016llx\n", mmx_trace.q); \
+ }
+
+#else
+
+/* These macros are a lot simpler without the tracing...
+*/
+
+#define mmx_m2r(op, mem, reg) \
+ __asm__ __volatile__ (#op " %0, %%" #reg \
+ : /* nothing */ \
+ : "X" (mem))
+
+#define mmx_r2m(op, reg, mem) \
+ __asm__ __volatile__ (#op " %%" #reg ", %0" \
+ : "=X" (mem) \
+ : /* nothing */ )
+
+#define mmx_r2r(op, regs, regd) \
+ __asm__ __volatile__ (#op " %" #regs ", %" #regd)
+
+#define mmx_m2m(op, mems, memd) \
+ __asm__ __volatile__ ("movq %0, %%mm0\n\t" \
+ #op " %1, %%mm0\n\t" \
+ "movq %%mm0, %0" \
+ : "=X" (memd) \
+ : "X" (mems))
+
+#endif
+
+
+/* 1x64 MOVe Quadword
+ (this is both a load and a store...
+ in fact, it is the only way to store)
+*/
+#define movq_m2r(var, reg) mmx_m2r(movq, var, reg)
+#define movq_r2m(reg, var) mmx_r2m(movq, reg, var)
+#define movq_r2r(regs, regd) mmx_r2r(movq, regs, regd)
+#define movq(vars, vard) \
+ __asm__ __volatile__ ("movq %1, %%mm0\n\t" \
+ "movq %%mm0, %0" \
+ : "=X" (vard) \
+ : "X" (vars))
+
+
+/* 1x64 MOVe Doubleword
+ (like movq, this is both load and store...
+ but is most useful for moving things between
+ mmx registers and ordinary registers)
+*/
+#define movd_m2r(var, reg) mmx_m2r(movd, var, reg)
+#define movd_r2m(reg, var) mmx_r2m(movd, reg, var)
+#define movd_r2r(regs, regd) mmx_r2r(movd, regs, regd)
+#define movd(vars, vard) \
+ __asm__ __volatile__ ("movd %1, %%mm0\n\t" \
+ "movd %%mm0, %0" \
+ : "=X" (vard) \
+ : "X" (vars))
+
+
+/* 2x32, 4x16, and 8x8 Parallel ADDs
+*/
+#define paddd_m2r(var, reg) mmx_m2r(paddd, var, reg)
+#define paddd_r2r(regs, regd) mmx_r2r(paddd, regs, regd)
+#define paddd(vars, vard) mmx_m2m(paddd, vars, vard)
+
+#define paddw_m2r(var, reg) mmx_m2r(paddw, var, reg)
+#define paddw_r2r(regs, regd) mmx_r2r(paddw, regs, regd)
+#define paddw(vars, vard) mmx_m2m(paddw, vars, vard)
+
+#define paddb_m2r(var, reg) mmx_m2r(paddb, var, reg)
+#define paddb_r2r(regs, regd) mmx_r2r(paddb, regs, regd)
+#define paddb(vars, vard) mmx_m2m(paddb, vars, vard)
+
+
+/* 4x16 and 8x8 Parallel ADDs using Saturation arithmetic
+*/
+#define paddsw_m2r(var, reg) mmx_m2r(paddsw, var, reg)
+#define paddsw_r2r(regs, regd) mmx_r2r(paddsw, regs, regd)
+#define paddsw(vars, vard) mmx_m2m(paddsw, vars, vard)
+
+#define paddsb_m2r(var, reg) mmx_m2r(paddsb, var, reg)
+#define paddsb_r2r(regs, regd) mmx_r2r(paddsb, regs, regd)
+#define paddsb(vars, vard) mmx_m2m(paddsb, vars, vard)
+
+
+/* 4x16 and 8x8 Parallel ADDs using Unsigned Saturation arithmetic
+*/
+#define paddusw_m2r(var, reg) mmx_m2r(paddusw, var, reg)
+#define paddusw_r2r(regs, regd) mmx_r2r(paddusw, regs, regd)
+#define paddusw(vars, vard) mmx_m2m(paddusw, vars, vard)
+
+#define paddusb_m2r(var, reg) mmx_m2r(paddusb, var, reg)
+#define paddusb_r2r(regs, regd) mmx_r2r(paddusb, regs, regd)
+#define paddusb(vars, vard) mmx_m2m(paddusb, vars, vard)
+
+
+/* 2x32, 4x16, and 8x8 Parallel SUBs
+*/
+#define psubd_m2r(var, reg) mmx_m2r(psubd, var, reg)
+#define psubd_r2r(regs, regd) mmx_r2r(psubd, regs, regd)
+#define psubd(vars, vard) mmx_m2m(psubd, vars, vard)
+
+#define psubw_m2r(var, reg) mmx_m2r(psubw, var, reg)
+#define psubw_r2r(regs, regd) mmx_r2r(psubw, regs, regd)
+#define psubw(vars, vard) mmx_m2m(psubw, vars, vard)
+
+#define psubb_m2r(var, reg) mmx_m2r(psubb, var, reg)
+#define psubb_r2r(regs, regd) mmx_r2r(psubb, regs, regd)
+#define psubb(vars, vard) mmx_m2m(psubb, vars, vard)
+
+
+/* 4x16 and 8x8 Parallel SUBs using Saturation arithmetic
+*/
+#define psubsw_m2r(var, reg) mmx_m2r(psubsw, var, reg)
+#define psubsw_r2r(regs, regd) mmx_r2r(psubsw, regs, regd)
+#define psubsw(vars, vard) mmx_m2m(psubsw, vars, vard)
+
+#define psubsb_m2r(var, reg) mmx_m2r(psubsb, var, reg)
+#define psubsb_r2r(regs, regd) mmx_r2r(psubsb, regs, regd)
+#define psubsb(vars, vard) mmx_m2m(psubsb, vars, vard)
+
+
+/* 4x16 and 8x8 Parallel SUBs using Unsigned Saturation arithmetic
+*/
+#define psubusw_m2r(var, reg) mmx_m2r(psubusw, var, reg)
+#define psubusw_r2r(regs, regd) mmx_r2r(psubusw, regs, regd)
+#define psubusw(vars, vard) mmx_m2m(psubusw, vars, vard)
+
+#define psubusb_m2r(var, reg) mmx_m2r(psubusb, var, reg)
+#define psubusb_r2r(regs, regd) mmx_r2r(psubusb, regs, regd)
+#define psubusb(vars, vard) mmx_m2m(psubusb, vars, vard)
+
+
+/* 4x16 Parallel MULs giving Low 4x16 portions of results
+*/
+#define pmullw_m2r(var, reg) mmx_m2r(pmullw, var, reg)
+#define pmullw_r2r(regs, regd) mmx_r2r(pmullw, regs, regd)
+#define pmullw(vars, vard) mmx_m2m(pmullw, vars, vard)
+
+
+/* 4x16 Parallel MULs giving High 4x16 portions of results
+*/
+#define pmulhw_m2r(var, reg) mmx_m2r(pmulhw, var, reg)
+#define pmulhw_r2r(regs, regd) mmx_r2r(pmulhw, regs, regd)
+#define pmulhw(vars, vard) mmx_m2m(pmulhw, vars, vard)
+
+
+/* 4x16->2x32 Parallel Mul-ADD
+ (muls like pmullw, then adds adjacent 16-bit fields
+ in the multiply result to make the final 2x32 result)
+*/
+#define pmaddwd_m2r(var, reg) mmx_m2r(pmaddwd, var, reg)
+#define pmaddwd_r2r(regs, regd) mmx_r2r(pmaddwd, regs, regd)
+#define pmaddwd(vars, vard) mmx_m2m(pmaddwd, vars, vard)
+
+
+/* 1x64 bitwise AND
+*/
+#define pand_m2r(var, reg) mmx_m2r(pand, var, reg)
+#define pand_r2r(regs, regd) mmx_r2r(pand, regs, regd)
+#define pand(vars, vard) mmx_m2m(pand, vars, vard)
+
+
+/* 1x64 bitwise AND with Not the destination
+*/
+#define pandn_m2r(var, reg) mmx_m2r(pandn, var, reg)
+#define pandn_r2r(regs, regd) mmx_r2r(pandn, regs, regd)
+#define pandn(vars, vard) mmx_m2m(pandn, vars, vard)
+
+
+/* 1x64 bitwise OR
+*/
+#define por_m2r(var, reg) mmx_m2r(por, var, reg)
+#define por_r2r(regs, regd) mmx_r2r(por, regs, regd)
+#define por(vars, vard) mmx_m2m(por, vars, vard)
+
+
+/* 1x64 bitwise eXclusive OR
+*/
+#define pxor_m2r(var, reg) mmx_m2r(pxor, var, reg)
+#define pxor_r2r(regs, regd) mmx_r2r(pxor, regs, regd)
+#define pxor(vars, vard) mmx_m2m(pxor, vars, vard)
+
+
+/* 2x32, 4x16, and 8x8 Parallel CoMPare for EQuality
+ (resulting fields are either 0 or -1)
+*/
+#define pcmpeqd_m2r(var, reg) mmx_m2r(pcmpeqd, var, reg)
+#define pcmpeqd_r2r(regs, regd) mmx_r2r(pcmpeqd, regs, regd)
+#define pcmpeqd(vars, vard) mmx_m2m(pcmpeqd, vars, vard)
+
+#define pcmpeqw_m2r(var, reg) mmx_m2r(pcmpeqw, var, reg)
+#define pcmpeqw_r2r(regs, regd) mmx_r2r(pcmpeqw, regs, regd)
+#define pcmpeqw(vars, vard) mmx_m2m(pcmpeqw, vars, vard)
+
+#define pcmpeqb_m2r(var, reg) mmx_m2r(pcmpeqb, var, reg)
+#define pcmpeqb_r2r(regs, regd) mmx_r2r(pcmpeqb, regs, regd)
+#define pcmpeqb(vars, vard) mmx_m2m(pcmpeqb, vars, vard)
+
+
+/* 2x32, 4x16, and 8x8 Parallel CoMPare for Greater Than
+ (resulting fields are either 0 or -1)
+*/
+#define pcmpgtd_m2r(var, reg) mmx_m2r(pcmpgtd, var, reg)
+#define pcmpgtd_r2r(regs, regd) mmx_r2r(pcmpgtd, regs, regd)
+#define pcmpgtd(vars, vard) mmx_m2m(pcmpgtd, vars, vard)
+
+#define pcmpgtw_m2r(var, reg) mmx_m2r(pcmpgtw, var, reg)
+#define pcmpgtw_r2r(regs, regd) mmx_r2r(pcmpgtw, regs, regd)
+#define pcmpgtw(vars, vard) mmx_m2m(pcmpgtw, vars, vard)
+
+#define pcmpgtb_m2r(var, reg) mmx_m2r(pcmpgtb, var, reg)
+#define pcmpgtb_r2r(regs, regd) mmx_r2r(pcmpgtb, regs, regd)
+#define pcmpgtb(vars, vard) mmx_m2m(pcmpgtb, vars, vard)
+
+
+/* 1x64, 2x32, and 4x16 Parallel Shift Left Logical
+*/
+#define psllq_m2r(var, reg) mmx_m2r(psllq, var, reg)
+#define psllq_r2r(regs, regd) mmx_r2r(psllq, regs, regd)
+#define psllq(vars, vard) mmx_m2m(psllq, vars, vard)
+
+#define pslld_m2r(var, reg) mmx_m2r(pslld, var, reg)
+#define pslld_r2r(regs, regd) mmx_r2r(pslld, regs, regd)
+#define pslld(vars, vard) mmx_m2m(pslld, vars, vard)
+
+#define psllw_m2r(var, reg) mmx_m2r(psllw, var, reg)
+#define psllw_r2r(regs, regd) mmx_r2r(psllw, regs, regd)
+#define psllw(vars, vard) mmx_m2m(psllw, vars, vard)
+
+
+/* 1x64, 2x32, and 4x16 Parallel Shift Right Logical
+*/
+#define psrlq_m2r(var, reg) mmx_m2r(psrlq, var, reg)
+#define psrlq_r2r(regs, regd) mmx_r2r(psrlq, regs, regd)
+#define psrlq(vars, vard) mmx_m2m(psrlq, vars, vard)
+
+#define psrld_m2r(var, reg) mmx_m2r(psrld, var, reg)
+#define psrld_r2r(regs, regd) mmx_r2r(psrld, regs, regd)
+#define psrld(vars, vard) mmx_m2m(psrld, vars, vard)
+
+#define psrlw_m2r(var, reg) mmx_m2r(psrlw, var, reg)
+#define psrlw_r2r(regs, regd) mmx_r2r(psrlw, regs, regd)
+#define psrlw(vars, vard) mmx_m2m(psrlw, vars, vard)
+
+
+/* 2x32 and 4x16 Parallel Shift Right Arithmetic
+*/
+#define psrad_m2r(var, reg) mmx_m2r(psrad, var, reg)
+#define psrad_r2r(regs, regd) mmx_r2r(psrad, regs, regd)
+#define psrad(vars, vard) mmx_m2m(psrad, vars, vard)
+
+#define psraw_m2r(var, reg) mmx_m2r(psraw, var, reg)
+#define psraw_r2r(regs, regd) mmx_r2r(psraw, regs, regd)
+#define psraw(vars, vard) mmx_m2m(psraw, vars, vard)
+
+
+/* 2x32->4x16 and 4x16->8x8 PACK and Signed Saturate
+ (packs source and dest fields into dest in that order)
+*/
+#define packssdw_m2r(var, reg) mmx_m2r(packssdw, var, reg)
+#define packssdw_r2r(regs, regd) mmx_r2r(packssdw, regs, regd)
+#define packssdw(vars, vard) mmx_m2m(packssdw, vars, vard)
+
+#define packsswb_m2r(var, reg) mmx_m2r(packsswb, var, reg)
+#define packsswb_r2r(regs, regd) mmx_r2r(packsswb, regs, regd)
+#define packsswb(vars, vard) mmx_m2m(packsswb, vars, vard)
+
+
+/* 4x16->8x8 PACK and Unsigned Saturate
+ (packs source and dest fields into dest in that order)
+*/
+#define packuswb_m2r(var, reg) mmx_m2r(packuswb, var, reg)
+#define packuswb_r2r(regs, regd) mmx_r2r(packuswb, regs, regd)
+#define packuswb(vars, vard) mmx_m2m(packuswb, vars, vard)
+
+
+/* 2x32->1x64, 4x16->2x32, and 8x8->4x16 UNPaCK Low
+ (interleaves low half of dest with low half of source
+ as padding in each result field)
+*/
+#define punpckldq_m2r(var, reg) mmx_m2r(punpckldq, var, reg)
+#define punpckldq_r2r(regs, regd) mmx_r2r(punpckldq, regs, regd)
+#define punpckldq(vars, vard) mmx_m2m(punpckldq, vars, vard)
+
+#define punpcklwd_m2r(var, reg) mmx_m2r(punpcklwd, var, reg)
+#define punpcklwd_r2r(regs, regd) mmx_r2r(punpcklwd, regs, regd)
+#define punpcklwd(vars, vard) mmx_m2m(punpcklwd, vars, vard)
+
+#define punpcklbw_m2r(var, reg) mmx_m2r(punpcklbw, var, reg)
+#define punpcklbw_r2r(regs, regd) mmx_r2r(punpcklbw, regs, regd)
+#define punpcklbw(vars, vard) mmx_m2m(punpcklbw, vars, vard)
+
+
+/* 2x32->1x64, 4x16->2x32, and 8x8->4x16 UNPaCK High
+ (interleaves high half of dest with high half of source
+ as padding in each result field)
+*/
+#define punpckhdq_m2r(var, reg) mmx_m2r(punpckhdq, var, reg)
+#define punpckhdq_r2r(regs, regd) mmx_r2r(punpckhdq, regs, regd)
+#define punpckhdq(vars, vard) mmx_m2m(punpckhdq, vars, vard)
+
+#define punpckhwd_m2r(var, reg) mmx_m2r(punpckhwd, var, reg)
+#define punpckhwd_r2r(regs, regd) mmx_r2r(punpckhwd, regs, regd)
+#define punpckhwd(vars, vard) mmx_m2m(punpckhwd, vars, vard)
+
+#define punpckhbw_m2r(var, reg) mmx_m2r(punpckhbw, var, reg)
+#define punpckhbw_r2r(regs, regd) mmx_r2r(punpckhbw, regs, regd)
+#define punpckhbw(vars, vard) mmx_m2m(punpckhbw, vars, vard)
+
+
+/* 1x64 add/sub -- this is in sse2, not in mmx. */
+#define paddq_m2r(var, reg) mmx_m2r(paddq, var, reg)
+#define paddq_r2r(regs, regd) mmx_r2r(paddq, regs, regd)
+#define paddq(vars, vard) mmx_m2m(paddq, vars, vard)
+
+#define psubq_m2r(var, reg) mmx_m2r(psubq, var, reg)
+#define psubq_r2r(regs, regd) mmx_r2r(psubq, regs, regd)
+#define psubq(vars, vard) mmx_m2m(psubq, vars, vard)
+
+
+
+/* Empty MMx State
+ (used to clean-up when going from mmx to float use
+ of the registers that are shared by both; note that
+ there is no float-to-mmx operation needed, because
+ only the float tag word info is corruptible)
+*/
+#ifdef MMX_TRACE
+
+#define emms() \
+ { \
+ fprintf(stderr, "emms()\n"); \
+ __asm__ __volatile__ ("emms"); \
+ }
+
+#else
+
+#define emms() __asm__ __volatile__ ("emms")
+
+#endif
+
+void mkRand( mmx_t* mm )
+{
+ mm->uw[0] = 0xFFFF & (random() >> 7);
+ mm->uw[1] = 0xFFFF & (random() >> 7);
+ mm->uw[2] = 0xFFFF & (random() >> 7);
+ mm->uw[3] = 0xFFFF & (random() >> 7);
+}
+
+
+
+int main( void )
+{
+ int i;
+ // int rval;
+ mmx_t ma;
+ mmx_t mb;
+ mmx_t ma0, mb0;
+ movq_r2r(mm0, mm1);
+
+// rval = mmx_ok();
+
+ /* Announce return value of mmx_ok() */
+// printf("Value returned from init was %x.", rval);
+// printf(" (Indicates MMX %s available)\n\n",(rval)? "is" : "not");
+// fflush(stdout); fflush(stdout);
+
+// if(rval)
+
+#define do_test(_name, _operation) \
+ for (i = 0; i < 25000; i++) { \
+ mkRand(&ma); \
+ mkRand(&mb); \
+ ma0 = ma; mb0 = mb; \
+ _operation; \
+ fprintf(stdout, "%s ( %016llx, %016llx ) -> %016llx\n", \
+ _name, ma0.q, mb0.q, mb.q); \
+ fflush(stdout); \
+ }
+
+
+ {
+ do_test("paddd", paddd(ma,mb));
+ do_test("paddw", paddw(ma,mb));
+ do_test("paddb", paddb(ma,mb));
+
+ do_test("paddsw", paddsw(ma,mb));
+ do_test("paddsb", paddsb(ma,mb));
+
+ do_test("paddusw", paddusw(ma,mb));
+ do_test("paddusb", paddusb(ma,mb));
+
+ do_test("psubd", psubd(ma,mb));
+ do_test("psubw", psubw(ma,mb));
+ do_test("psubb", psubb(ma,mb));
+
+ do_test("psubsw", psubsw(ma,mb));
+ do_test("psubsb", psubsb(ma,mb));
+
+ do_test("psubusw", psubusw(ma,mb));
+ do_test("psubusb", psubusb(ma,mb));
+
+ do_test("pmulhw", pmulhw(ma,mb));
+ do_test("pmullw", pmullw(ma,mb));
+
+ do_test("pmaddwd", pmaddwd(ma,mb));
+
+ do_test("pcmpeqd", pcmpeqd(ma,mb));
+ do_test("pcmpeqw", pcmpeqw(ma,mb));
+ do_test("pcmpeqb", pcmpeqb(ma,mb));
+
+ do_test("pcmpgtd", pcmpgtd(ma,mb));
+ do_test("pcmpgtw", pcmpgtw(ma,mb));
+ do_test("pcmpgtb", pcmpgtb(ma,mb));
+
+ do_test("packssdw", packssdw(ma,mb));
+ do_test("packsswb", packsswb(ma,mb));
+ do_test("packuswb", packuswb(ma,mb));
+
+ do_test("punpckhdq", punpckhdq(ma,mb));
+ do_test("punpckhwd", punpckhwd(ma,mb));
+ do_test("punpckhbw", punpckhbw(ma,mb));
+
+ do_test("punpckldq", punpckldq(ma,mb));
+ do_test("punpcklwd", punpcklwd(ma,mb));
+ do_test("punpcklbw", punpcklbw(ma,mb));
+
+ do_test("pand", pand(ma,mb));
+ do_test("pandn", pandn(ma,mb));
+ do_test("por", por(ma,mb));
+ do_test("pxor", pxor(ma,mb));
+
+ do_test("psllq", psllq(ma,mb));
+ do_test("pslld", pslld(ma,mb));
+ do_test("psllw", psllw(ma,mb));
+
+ do_test("psrlq", psrlq(ma,mb));
+ do_test("psrld", psrld(ma,mb));
+ do_test("psrlw", psrlw(ma,mb));
+
+ do_test("psrad", psrad(ma,mb));
+ do_test("psraw", psraw(ma,mb));
+
+#if HAVE_SSE2
+ do_test("paddq", paddq(ma,mb));
+ do_test("psubq", psubq(ma,mb));
+#endif
+
+ emms();
+ }
+
+ /* Clean-up and exit nicely */
+ exit(0);
+}
diff --git a/main/VEX/test/mxcsr.c b/main/VEX/test/mxcsr.c
new file mode 100644
index 0000000..cc92f54
--- /dev/null
+++ b/main/VEX/test/mxcsr.c
@@ -0,0 +1,45 @@
+
+#include <stdio.h>
+
+void mxcsr_default ( void )
+{
+ asm(" pushl $0x1F80 ; ldmxcsr (%esp) ; addl $4, %esp");
+}
+
+void mxcsr_exns ( void )
+{
+ asm(" pushl $0x1F00 ; ldmxcsr (%esp) ; addl $4, %esp");
+}
+
+/* PIII doesn't have DAZ, so this segfaults (!) on PIII. */a
+void mxcsr_daz ( void )
+{
+ asm(" pushl $0x1FC0 ; ldmxcsr (%esp) ; addl $4, %esp");
+}
+
+void mxcsr_fz ( void )
+{
+ asm(" pushl $0x9F80 ; ldmxcsr (%esp) ; addl $4, %esp");
+}
+
+
+int main ( void )
+{
+ printf("default\n");
+ mxcsr_default();
+ printf("\n");
+
+ printf("exns\n");
+ mxcsr_exns();
+ printf("\n");
+
+ printf("daz\n");
+ mxcsr_daz();
+ printf("\n");
+
+ printf("fz\n");
+ mxcsr_fz();
+ printf("\n");
+
+ return 0;
+}
diff --git a/main/VEX/test/rounderr.c b/main/VEX/test/rounderr.c
new file mode 100644
index 0000000..0055a09
--- /dev/null
+++ b/main/VEX/test/rounderr.c
@@ -0,0 +1,97 @@
+
+/* peach (7400, altivec supported, 450MHz, gcc -O)
+ m1 = 1.20000000000000018, exp = 1.19999999999999996
+ m2 = 1.19999999999998885, exp = 1.19999999999999996
+*/
+
+/* peach (7400, altivec supported, 450MHz, gcc)
+ m1 = 1.20000000000000018, exp = 1.19999999999999996
+ m2 = 1.19999999999998885, exp = 1.19999999999999996
+*/
+
+/* phoenix, gcc -O
+ m1 = 1.19999999999999996, exp = 1.19999999999999996
+ m2 = 1.19999999999999996, exp = 1.19999999999999996
+*/
+
+/* phoenix, icc -O
+ m1 = 1.19999999999999996, exp = 1.19999999999999996
+ m2 = 1.19999999999999996, exp = 1.19999999999999996
+*/
+
+/* phoenix, gcc -O, iropt-level=2
+ m1 = 1.20000000000000040, exp = 1.19999999999999996
+ m2 = 1.19999999999999440, exp = 1.19999999999999996
+*/
+
+/* phoenix, gcc -O, iropt-level=1/0
+ m1 = 1.20000000000000018, exp = 1.19999999999999996
+ m2 = 1.19999999999998885, exp = 1.19999999999999996
+*/
+
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <math.h>
+
+#define NNN 1000
+
+
+double
+my_mean1 (const double data[], size_t stride, const size_t size)
+{
+ /* Compute the arithmetic mean of a dataset using the recurrence relation
+ mean_(n) = mean(n-1) + (data[n] - mean(n-1))/(n+1) */
+ long double mean = 0;
+ size_t i;
+
+ for (i = 0; i < size; i++)
+ {
+ mean += (data[i * stride] - mean) / (i + 1);
+ }
+ return mean;
+}
+
+double
+my_mean2 (const double data[], size_t stride, const size_t size)
+{
+ /* Compute the arithmetic mean of a dataset using the
+ obvious scheme. */
+ int i;
+ long double sum = 0;
+ for (i = 0; i < size; i++)
+ sum += data[i * stride];
+ return sum / (double)size;
+}
+
+
+int main (void)
+{
+ int i;
+ const size_t nacc2 = NNN+1;
+ double numacc2[NNN+1] ;
+
+ numacc2[0] = 1.2 ;
+
+ for (i = 1 ; i < NNN; i += 2)
+ numacc2[i] = 1.1 ;
+
+ for (i = 1 ; i < NNN; i += 2)
+ numacc2[i+1] = 1.3 ;
+
+#if 1
+ asm __volatile__("fninit");
+#endif
+
+ {
+ double m1 = my_mean1 (numacc2, 1, nacc2);
+ double m2 = my_mean2 (numacc2, 1, nacc2);
+ double expected_mean = 1.2;
+ printf("m1 = %19.17f, exp = %19.17f\n", m1, expected_mean);
+ printf("m2 = %19.17f, exp = %19.17f\n", m2, expected_mean);
+ }
+
+ return 0;
+}
+
+
diff --git a/main/VEX/test/test-amd64-muldiv.h b/main/VEX/test/test-amd64-muldiv.h
new file mode 100644
index 0000000..f8fb2de
--- /dev/null
+++ b/main/VEX/test/test-amd64-muldiv.h
@@ -0,0 +1,74 @@
+
+void glue(glue(test_, OP), b)(int64 op0, int64 op1)
+{
+ int64 res, s1, s0, flags;
+ s0 = op0;
+ s1 = op1;
+ res = s0;
+ flags = 0;
+ asm ("pushq %4\n\t"
+ "popfq\n\t"
+ stringify(OP)"b %b2\n\t"
+ "pushfq\n\t"
+ "popq %1\n\t"
+ : "=a" (res), "=g" (flags)
+ : "q" (s1), "0" (res), "1" (flags));
+ printf("%-10s A=%016llx B=%016llx R=%016llx CC=%04llx\n",
+ stringify(OP) "b", s0, s1, res, flags & CC_MASK);
+}
+
+void glue(glue(test_, OP), w)(int64 op0h, int64 op0, int64 op1)
+{
+ int64 res, s1, flags, resh;
+ s1 = op1;
+ resh = op0h;
+ res = op0;
+ flags = 0;
+ asm ("pushq %5\n\t"
+ "popfq\n\t"
+ stringify(OP) "w %w3\n\t"
+ "pushfq\n\t"
+ "popq %1\n\t"
+ : "=a" (res), "=g" (flags), "=d" (resh)
+ : "q" (s1), "0" (res), "1" (flags), "2" (resh));
+ printf("%-10s AH=%016llx AL=%016llx B=%016llx RH=%016llx RL=%016llx CC=%04llx\n",
+ stringify(OP) "w", op0h, op0, s1, resh, res, flags & CC_MASK);
+}
+
+void glue(glue(test_, OP), l)(int64 op0h, int64 op0, int64 op1)
+{
+ int64 res, s1, flags, resh;
+ s1 = op1;
+ resh = op0h;
+ res = op0;
+ flags = 0;
+ asm ("pushq %5\n\t"
+ "popfq\n\t"
+ stringify(OP) "l %3\n\t"
+ "pushfq\n\t"
+ "popq %1\n\t"
+ : "=a" (res), "=g" (flags), "=d" (resh)
+ : "q" ((int)s1), "0" (res), "1" (flags), "2" (resh));
+ printf("%-10s AH=%016llx AL=%016llx B=%016llx RH=%016llx RL=%016llx CC=%04llx\n",
+ stringify(OP) "l", op0h, op0, s1, resh, res, flags & CC_MASK);
+}
+
+void glue(glue(test_, OP), q)(int64 op0h, int64 op0, int64 op1)
+{
+ int64 res, s1, flags, resh;
+ s1 = op1;
+ resh = op0h;
+ res = op0;
+ flags = 0;
+ asm ("pushq %5\n\t"
+ "popfq\n\t"
+ stringify(OP) "q %3\n\t"
+ "pushfq\n\t"
+ "popq %1\n\t"
+ : "=a" (res), "=g" (flags), "=d" (resh)
+ : "q" (s1), "0" (res), "1" (flags), "2" (resh));
+ printf("%-10s AH=%016llx AL=%016llx B=%016llx RH=%016llx RL=%016llx CC=%04llx\n",
+ stringify(OP) "q", op0h, op0, s1, resh, res, flags & CC_MASK);
+}
+
+#undef OP
diff --git a/main/VEX/test/test-amd64-shift.h b/main/VEX/test/test-amd64-shift.h
new file mode 100644
index 0000000..e5ded43
--- /dev/null
+++ b/main/VEX/test/test-amd64-shift.h
@@ -0,0 +1,178 @@
+
+#define exec_op glue(exec_, OP)
+#define exec_opq glue(glue(exec_, OP), q)
+#define exec_opl glue(glue(exec_, OP), l)
+#define exec_opw glue(glue(exec_, OP), w)
+#define exec_opb glue(glue(exec_, OP), b)
+
+#ifndef OP_SHIFTD
+
+#ifdef OP_NOBYTE
+#define EXECSHIFT(size, res, s1, s2, flags) \
+ asm ("pushq %4\n\t"\
+ "popfq\n\t"\
+ stringify(OP) size " %" size "2, %" size "0\n\t" \
+ "pushfq\n\t"\
+ "popq %1\n\t"\
+ : "=g" (res), "=g" (flags)\
+ : "r" (s1), "0" (res), "1" (flags));
+#else
+#define EXECSHIFT(size, res, s1, s2, flags) \
+ asm ("pushq %4\n\t"\
+ "popfq\n\t"\
+ stringify(OP) size " %%cl, %" size "0\n\t" \
+ "pushfq\n\t"\
+ "popq %1\n\t"\
+ : "=q" (res), "=g" (flags)\
+ : "c" (s1), "0" (res), "1" (flags));
+#endif
+
+void exec_opq(int64 s2, int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("q", res, s1, s2, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%016llx B=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "q", s0, s1, res, iflags, flags & CC_MASK);
+}
+
+void exec_opl(int64 s2, int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("", res, s1, s2, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%016llx B=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
+}
+
+void exec_opw(int64 s2, int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("w", res, s1, s2, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%016llx B=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
+}
+
+#else
+#define EXECSHIFT(size, res, s1, s2, flags) \
+ asm ("pushq %4\n\t"\
+ "popfq\n\t"\
+ stringify(OP) size " %%cl, %" size "5, %" size "0\n\t" \
+ "pushfq\n\t"\
+ "popq %1\n\t"\
+ : "=g" (res), "=g" (flags)\
+ : "c" (s1), "0" (res), "1" (flags), "r" (s2));
+
+void exec_opl(int64 s2, int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("", res, s1, s2, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%016llx B=%016llx C=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "l", s0, s2, s1, res, iflags, flags & CC_MASK);
+}
+
+void exec_opw(int64 s2, int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("w", res, s1, s2, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%016llx B=%016llx C=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "w", s0, s2, s1, res, iflags, flags & CC_MASK);
+}
+
+#endif
+
+#ifndef OP_NOBYTE
+void exec_opb(int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("b", res, s1, 0, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%016llx B=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
+}
+#endif
+
+void exec_op(int64 s2, int64 s0, int64 s1)
+{
+ int64 o,s,z,a,c,p,flags_in;
+ for (o = 0; o < 2; o++) {
+ for (s = 0; s < 2; s++) {
+ for (z = 0; z < 2; z++) {
+ for (a = 0; a < 2; a++) {
+ for (c = 0; c < 2; c++) {
+ for (p = 0; p < 2; p++) {
+
+ flags_in = (o ? CC_O : 0)
+ | (s ? CC_S : 0)
+ | (z ? CC_Z : 0)
+ | (a ? CC_A : 0)
+ | (c ? CC_C : 0)
+ | (p ? CC_P : 0);
+
+ exec_opq(s2, s0, s1, flags_in);
+ if (s1 <= 31)
+ exec_opl(s2, s0, s1, flags_in);
+#ifdef OP_SHIFTD
+ if (s1 <= 15)
+ exec_opw(s2, s0, s1, flags_in);
+#else
+ exec_opw(s2, s0, s1, flags_in);
+#endif
+#ifndef OP_NOBYTE
+ exec_opb(s0, s1, flags_in);
+#endif
+#ifdef OP_CC
+ exec_opq(s2, s0, s1, flags_in);
+ exec_opl(s2, s0, s1, flags_in);
+ exec_opw(s2, s0, s1, flags_in);
+ exec_opb(s0, s1, flags_in);
+#endif
+
+ }}}}}}
+
+}
+
+void glue(test_, OP)(void)
+{
+ int64 i;
+ for(i = 0; i < 64; i++)
+ exec_op(0x3141592721ad3d34, 0x2718284612345678, i);
+ for(i = 0; i < 64; i++)
+ exec_op(0x31415927813f3421, 0x2718284682345678, i);
+}
+
+void *glue(_test_, OP) __init_call = glue(test_, OP);
+
+#undef OP
+#undef OP_CC
+#undef OP_SHIFTD
+#undef OP_NOBYTE
+#undef EXECSHIFT
+
diff --git a/main/VEX/test/test-amd64.c b/main/VEX/test/test-amd64.c
new file mode 100644
index 0000000..cfb745e
--- /dev/null
+++ b/main/VEX/test/test-amd64.c
@@ -0,0 +1,1709 @@
+
+/* To build:
+
+ gcc -g -o test-amd64 test-amd64.c -lm
+
+ */
+
+/* Contrary to what the next comment says, this is now an amd64 CPU
+ test. */
+
+/*
+ * x86 CPU test
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#define _GNU_SOURCE
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <inttypes.h>
+#include <math.h>
+#include <signal.h>
+#include <setjmp.h>
+#include <errno.h>
+#include <sys/ucontext.h>
+#include <sys/mman.h>
+
+/* Setting this to 1 creates a very comprehensive test of
+ integer condition codes. */
+#define TEST_INTEGER_VERBOSE 1
+
+typedef long long int int64;
+
+//#define LINUX_VM86_IOPL_FIX
+//#define TEST_P4_FLAGS
+
+#define xglue(x, y) x ## y
+#define glue(x, y) xglue(x, y)
+#define stringify(s) tostring(s)
+#define tostring(s) #s
+
+#define CC_C 0x0001
+#define CC_P 0x0004
+#define CC_A 0x0010
+#define CC_Z 0x0040
+#define CC_S 0x0080
+#define CC_O 0x0800
+
+#define __init_call __attribute__ ((unused,__section__ (".initcall.init")))
+
+static void *call_start __init_call = NULL;
+
+#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
+
+#define OP add
+#include "test-amd64.h"
+
+#define OP sub
+#include "test-amd64.h"
+
+#define OP xor
+#include "test-amd64.h"
+
+#define OP and
+#include "test-amd64.h"
+
+#define OP or
+#include "test-amd64.h"
+
+#define OP cmp
+#include "test-amd64.h"
+
+#define OP adc
+#define OP_CC
+#include "test-amd64.h"
+
+#define OP sbb
+#define OP_CC
+#include "test-amd64.h"
+
+#define OP inc
+#define OP_CC
+#define OP1
+#include "test-amd64.h"
+
+#define OP dec
+#define OP_CC
+#define OP1
+#include "test-amd64.h"
+
+#define OP neg
+#define OP_CC
+#define OP1
+#include "test-amd64.h"
+
+#define OP not
+#define OP_CC
+#define OP1
+#include "test-amd64.h"
+
+#undef CC_MASK
+#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
+
+#define OP shl
+#include "test-amd64-shift.h"
+
+#define OP shr
+#include "test-amd64-shift.h"
+
+#define OP sar
+#include "test-amd64-shift.h"
+
+#define OP rol
+#include "test-amd64-shift.h"
+
+#define OP ror
+#include "test-amd64-shift.h"
+
+#define OP rcr
+#define OP_CC
+#include "test-amd64-shift.h"
+
+#define OP rcl
+#define OP_CC
+#include "test-amd64-shift.h"
+
+#if 0
+#define OP shld
+#define OP_SHIFTD
+#define OP_NOBYTE
+#include "test-amd64-shift.h"
+
+#define OP shrd
+#define OP_SHIFTD
+#define OP_NOBYTE
+#include "test-amd64-shift.h"
+#endif
+
+/* XXX: should be more precise ? */
+#undef CC_MASK
+#define CC_MASK (CC_C)
+
+#if 0
+#define OP bt
+#define OP_NOBYTE
+#include "test-amd64-shift.h"
+
+#define OP bts
+#define OP_NOBYTE
+#include "test-amd64-shift.h"
+
+#define OP btr
+#define OP_NOBYTE
+#include "test-amd64-shift.h"
+
+#define OP btc
+#define OP_NOBYTE
+#include "test-amd64-shift.h"
+#endif
+
+/* lea test (modrm support) */
+#define TEST_LEA(STR)\
+{\
+ asm("leaq " STR ", %0"\
+ : "=r" (res)\
+ : "a" (rax), "b" (rbx), "c" (rcx), "d" (rdx), "S" (rsi), "D" (rdi));\
+ printf("lea %s = %016llx\n", STR, res);\
+}
+
+#define TEST_LEA16(STR)\
+{\
+ asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
+ : "=wq" (res)\
+ : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
+ printf("lea %s = %08x\n", STR, res);\
+}
+
+
+void test_lea(void)
+{
+ int64 rax, rbx, rcx, rdx, rsi, rdi, res;
+ rax = 0x0001;
+ rbx = 0x0002;
+ rcx = 0x0004;
+ rdx = 0x0008;
+ rsi = 0x0010;
+ rdi = 0x0020;
+
+ TEST_LEA("0x4000");
+
+ TEST_LEA("(%%rax)");
+ TEST_LEA("(%%rbx)");
+ TEST_LEA("(%%rcx)");
+ TEST_LEA("(%%rdx)");
+ TEST_LEA("(%%rsi)");
+ TEST_LEA("(%%rdi)");
+
+ TEST_LEA("0x40(%%rax)");
+ TEST_LEA("0x40(%%rbx)");
+ TEST_LEA("0x40(%%rcx)");
+ TEST_LEA("0x40(%%rdx)");
+ TEST_LEA("0x40(%%rsi)");
+ TEST_LEA("0x40(%%rdi)");
+
+ TEST_LEA("0x4000(%%rax)");
+ TEST_LEA("0x4000(%%rbx)");
+ TEST_LEA("0x4000(%%rcx)");
+ TEST_LEA("0x4000(%%rdx)");
+ TEST_LEA("0x4000(%%rsi)");
+ TEST_LEA("0x4000(%%rdi)");
+
+ TEST_LEA("(%%rax, %%rcx)");
+ TEST_LEA("(%%rbx, %%rdx)");
+ TEST_LEA("(%%rcx, %%rcx)");
+ TEST_LEA("(%%rdx, %%rcx)");
+ TEST_LEA("(%%rsi, %%rcx)");
+ TEST_LEA("(%%rdi, %%rcx)");
+
+ TEST_LEA("0x40(%%rax, %%rcx)");
+ TEST_LEA("0x4000(%%rbx, %%rdx)");
+
+ TEST_LEA("(%%rcx, %%rcx, 2)");
+ TEST_LEA("(%%rdx, %%rcx, 4)");
+ TEST_LEA("(%%rsi, %%rcx, 8)");
+
+ TEST_LEA("(,%%rax, 2)");
+ TEST_LEA("(,%%rbx, 4)");
+ TEST_LEA("(,%%rcx, 8)");
+
+ TEST_LEA("0x40(,%%rax, 2)");
+ TEST_LEA("0x40(,%%rbx, 4)");
+ TEST_LEA("0x40(,%%rcx, 8)");
+
+
+ TEST_LEA("-10(%%rcx, %%rcx, 2)");
+ TEST_LEA("-10(%%rdx, %%rcx, 4)");
+ TEST_LEA("-10(%%rsi, %%rcx, 8)");
+
+ TEST_LEA("0x4000(%%rcx, %%rcx, 2)");
+ TEST_LEA("0x4000(%%rdx, %%rcx, 4)");
+ TEST_LEA("0x4000(%%rsi, %%rcx, 8)");
+}
+
+#define TEST_JCC(JCC, v1, v2)\
+{ int one = 1; \
+ int res;\
+ asm("movl $1, %0\n\t"\
+ "cmpl %2, %1\n\t"\
+ "j" JCC " 1f\n\t"\
+ "movl $0, %0\n\t"\
+ "1:\n\t"\
+ : "=r" (res)\
+ : "r" (v1), "r" (v2));\
+ printf("%-10s %d\n", "j" JCC, res);\
+\
+ asm("movl $0, %0\n\t"\
+ "cmpl %2, %1\n\t"\
+ "set" JCC " %b0\n\t"\
+ : "=r" (res)\
+ : "r" (v1), "r" (v2));\
+ printf("%-10s %d\n", "set" JCC, res);\
+ {\
+ asm("movl $0x12345678, %0\n\t"\
+ "cmpl %2, %1\n\t"\
+ "cmov" JCC "l %3, %0\n\t"\
+ : "=r" (res)\
+ : "r" (v1), "r" (v2), "m" (one));\
+ printf("%-10s R=0x%08x\n", "cmov" JCC "l", res);\
+ asm("movl $0x12345678, %0\n\t"\
+ "cmpl %2, %1\n\t"\
+ "cmov" JCC "w %w3, %w0\n\t"\
+ : "=r" (res)\
+ : "r" (v1), "r" (v2), "r" (one));\
+ printf("%-10s R=0x%08x\n", "cmov" JCC "w", res);\
+ } \
+}
+
+/* various jump tests */
+void test_jcc(void)
+{
+ TEST_JCC("ne", 1, 1);
+ TEST_JCC("ne", 1, 0);
+
+ TEST_JCC("e", 1, 1);
+ TEST_JCC("e", 1, 0);
+
+ TEST_JCC("l", 1, 1);
+ TEST_JCC("l", 1, 0);
+ TEST_JCC("l", 1, -1);
+
+ TEST_JCC("le", 1, 1);
+ TEST_JCC("le", 1, 0);
+ TEST_JCC("le", 1, -1);
+
+ TEST_JCC("ge", 1, 1);
+ TEST_JCC("ge", 1, 0);
+ TEST_JCC("ge", -1, 1);
+
+ TEST_JCC("g", 1, 1);
+ TEST_JCC("g", 1, 0);
+ TEST_JCC("g", 1, -1);
+
+ TEST_JCC("b", 1, 1);
+ TEST_JCC("b", 1, 0);
+ TEST_JCC("b", 1, -1);
+
+ TEST_JCC("be", 1, 1);
+ TEST_JCC("be", 1, 0);
+ TEST_JCC("be", 1, -1);
+
+ TEST_JCC("ae", 1, 1);
+ TEST_JCC("ae", 1, 0);
+ TEST_JCC("ae", 1, -1);
+
+ TEST_JCC("a", 1, 1);
+ TEST_JCC("a", 1, 0);
+ TEST_JCC("a", 1, -1);
+
+
+ TEST_JCC("p", 1, 1);
+ TEST_JCC("p", 1, 0);
+
+ TEST_JCC("np", 1, 1);
+ TEST_JCC("np", 1, 0);
+
+ TEST_JCC("o", 0x7fffffff, 0);
+ TEST_JCC("o", 0x7fffffff, -1);
+
+ TEST_JCC("no", 0x7fffffff, 0);
+ TEST_JCC("no", 0x7fffffff, -1);
+
+ TEST_JCC("s", 0, 1);
+ TEST_JCC("s", 0, -1);
+ TEST_JCC("s", 0, 0);
+
+ TEST_JCC("ns", 0, 1);
+ TEST_JCC("ns", 0, -1);
+ TEST_JCC("ns", 0, 0);
+}
+
+#undef CC_MASK
+#ifdef TEST_P4_FLAGS
+#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
+#else
+#define CC_MASK (CC_O | CC_C)
+#endif
+
+#define OP mul
+#include "test-amd64-muldiv.h"
+
+#define OP imul
+#include "test-amd64-muldiv.h"
+
+void test_imulw2(int64 op0, int64 op1)
+{
+ int64 res, s1, s0, flags;
+ s0 = op0;
+ s1 = op1;
+ res = s0;
+ flags = 0;
+ asm ("pushq %4\n\t"
+ "popfq\n\t"
+ "imulw %w2, %w0\n\t"
+ "pushfq\n\t"
+ "popq %1\n\t"
+ : "=q" (res), "=g" (flags)
+ : "q" (s1), "0" (res), "1" (flags));
+ printf("%-10s A=%016llx B=%016llx R=%016llx CC=%04llx\n",
+ "imulw", s0, s1, res, flags & CC_MASK);
+}
+
+void test_imull2(int64 op0, int64 op1)
+{
+ int res, s1;
+ int64 s0, flags;
+ s0 = op0;
+ s1 = op1;
+ res = s0;
+ flags = 0;
+ asm ("pushq %4\n\t"
+ "popfq\n\t"
+ "imull %2, %0\n\t"
+ "pushfq\n\t"
+ "popq %1\n\t"
+ : "=q" (res), "=g" (flags)
+ : "q" (s1), "0" (res), "1" (flags));
+ printf("%-10s A=%016llx B=%08x R=%08x CC=%04llx\n",
+ "imull", s0, s1, res, flags & CC_MASK);
+}
+
+#define TEST_IMUL_IM(size, size1, op0, op1)\
+{\
+ int64 res, flags;\
+ flags = 0;\
+ res = 0;\
+ asm ("pushq %3\n\t"\
+ "popfq\n\t"\
+ "imul" size " $" #op0 ", %" size1 "2, %" size1 "0\n\t" \
+ "pushfq\n\t"\
+ "popq %1\n\t"\
+ : "=r" (res), "=g" (flags)\
+ : "r" (op1), "1" (flags), "0" (res));\
+ printf("%-10s A=%08x B=%08x R=%016llx CC=%04llx\n",\
+ "imul" size, op0, op1, res, flags & CC_MASK);\
+}
+
+#define TEST_IMUL_IM_L(op0, op1)\
+{\
+ int64 flags = 0;\
+ int res = 0;\
+ int res64 = 0;\
+ asm ("pushq %3\n\t"\
+ "popfq\n\t"\
+ "imul $" #op0 ", %2, %0\n\t" \
+ "pushfq\n\t"\
+ "popq %1\n\t"\
+ : "=r" (res64), "=g" (flags)\
+ : "r" (op1), "1" (flags), "0" (res));\
+ printf("%-10s A=%08x B=%08x R=%08x CC=%04llx\n",\
+ "imull", op0, op1, res, flags & CC_MASK);\
+}
+
+
+#undef CC_MASK
+#define CC_MASK (0)
+
+#define OP div
+#include "test-amd64-muldiv.h"
+
+#define OP idiv
+#include "test-amd64-muldiv.h"
+
+void test_mul(void)
+{
+ test_imulb(0x1234561d, 4);
+ test_imulb(3, -4);
+ test_imulb(0x80, 0x80);
+ test_imulb(0x10, 0x10);
+
+ test_imulw(0, 0, 0);
+ test_imulw(0, 0xFF, 0xFF);
+ test_imulw(0, 0xFF, 0x100);
+ test_imulw(0, 0x1234001d, 45);
+ test_imulw(0, 23, -45);
+ test_imulw(0, 0x8000, 0x8000);
+ test_imulw(0, 0x100, 0x100);
+
+ test_imull(0, 0, 0);
+ test_imull(0, 0xFFFF, 0xFFFF);
+ test_imull(0, 0xFFFF, 0x10000);
+ test_imull(0, 0x1234001d, 45);
+ test_imull(0, 23, -45);
+ test_imull(0, 0x80000000, 0x80000000);
+ test_imull(0, 0x10000, 0x10000);
+
+ test_mulb(0x1234561d, 4);
+ test_mulb(3, -4);
+ test_mulb(0x80, 0x80);
+ test_mulb(0x10, 0x10);
+
+ test_mulw(0, 0x1234001d, 45);
+ test_mulw(0, 23, -45);
+ test_mulw(0, 0x8000, 0x8000);
+ test_mulw(0, 0x100, 0x100);
+
+ test_mull(0, 0x1234001d, 45);
+ test_mull(0, 23, -45);
+ test_mull(0, 0x80000000, 0x80000000);
+ test_mull(0, 0x10000, 0x10000);
+
+ test_imulw2(0x1234001d, 45);
+ test_imulw2(23, -45);
+ test_imulw2(0x8000, 0x8000);
+ test_imulw2(0x100, 0x100);
+
+ test_imull2(0x1234001d, 45);
+ test_imull2(23, -45);
+ test_imull2(0x80000000, 0x80000000);
+ test_imull2(0x10000, 0x10000);
+
+ TEST_IMUL_IM("w", "w", 45, 0x1234);
+ TEST_IMUL_IM("w", "w", -45, 23);
+ TEST_IMUL_IM("w", "w", 0x8000, 0x80000000);
+ TEST_IMUL_IM("w", "w", 0x7fff, 0x1000);
+
+ TEST_IMUL_IM_L(45, 0x1234);
+ TEST_IMUL_IM_L(-45, 23);
+ TEST_IMUL_IM_L(0x8000, 0x80000000);
+ TEST_IMUL_IM_L(0x7fff, 0x1000);
+
+ test_idivb(0x12341678, 0x127e);
+ test_idivb(0x43210123, -5);
+ test_idivb(0x12340004, -1);
+
+ test_idivw(0, 0x12345678, 12347);
+ test_idivw(0, -23223, -45);
+ test_idivw(0, 0x12348000, -1);
+ test_idivw(0x12343, 0x12345678, 0x81238567);
+
+ test_idivl(0, 0x12345678, 12347);
+ test_idivl(0, -233223, -45);
+ test_idivl(0, 0x80000000, -1);
+ test_idivl(0x12343, 0x12345678, 0x81234567);
+
+ test_idivq(0, 0x12345678, 12347);
+ test_idivq(0, -233223, -45);
+ test_idivq(0, 0x80000000, -1);
+ test_idivq(0x12343, 0x12345678, 0x81234567);
+
+ test_divb(0x12341678, 0x127e);
+ test_divb(0x43210123, -5);
+ test_divb(0x12340004, -1);
+
+ test_divw(0, 0x12345678, 12347);
+ test_divw(0, -23223, -45);
+ test_divw(0, 0x12348000, -1);
+ test_divw(0x12343, 0x12345678, 0x81238567);
+
+ test_divl(0, 0x12345678, 12347);
+ test_divl(0, -233223, -45);
+ test_divl(0, 0x80000000, -1);
+ test_divl(0x12343, 0x12345678, 0x81234567);
+
+ test_divq(0, 0x12345678, 12347);
+ test_divq(0, -233223, -45);
+ test_divq(0, 0x80000000, -1);
+ test_divq(0x12343, 0x12345678, 0x81234567);
+}
+
+#define TEST_BSX(op, size, op0)\
+{\
+ int res, val, resz;\
+ val = op0;\
+ asm("xorl %1, %1\n"\
+ "movl $0x12345678, %0\n"\
+ #op " %" size "2, %" size "0 ; setz %b1" \
+ : "=r" (res), "=q" (resz)\
+ : "r" (val));\
+ printf("%-10s A=%08x R=%08x %d\n", #op, val, res, resz);\
+}
+
+void test_bsx(void)
+{
+ TEST_BSX(bsrw, "w", 0);
+ TEST_BSX(bsrw, "w", 0x12340128);
+ TEST_BSX(bsrl, "", 0);
+ TEST_BSX(bsrl, "", 0x00340128);
+ TEST_BSX(bsfw, "w", 0);
+ TEST_BSX(bsfw, "w", 0x12340128);
+ TEST_BSX(bsfl, "", 0);
+ TEST_BSX(bsfl, "", 0x00340128);
+}
+
+/**********************************************/
+
+void test_fops(double a, double b)
+{
+ printf("a=%f b=%f a+b=%f\n", a, b, a + b);
+ printf("a=%f b=%f a-b=%f\n", a, b, a - b);
+ printf("a=%f b=%f a*b=%f\n", a, b, a * b);
+ printf("a=%f b=%f a/b=%f\n", a, b, a / b);
+ printf("a=%f b=%f fmod(a, b)=%f\n", a, b, fmod(a, b));
+ printf("a=%f sqrt(a)=%f\n", a, sqrt(a));
+ printf("a=%f sin(a)=%f\n", a, sin(a));
+ printf("a=%f cos(a)=%f\n", a, cos(a));
+ printf("a=%f tan(a)=%f\n", a, tan(a));
+ printf("a=%f log(a)=%f\n", a, log(a));
+ printf("a=%f exp(a)=%f\n", a, exp(a));
+ printf("a=%f b=%f atan2(a, b)=%f\n", a, b, atan2(a, b));
+ /* just to test some op combining */
+ printf("a=%f asin(sin(a))=%f\n", a, asin(sin(a)));
+ printf("a=%f acos(cos(a))=%f\n", a, acos(cos(a)));
+ printf("a=%f atan(tan(a))=%f\n", a, atan(tan(a)));
+}
+
+void test_fcmp(double a, double b)
+{
+ printf("(%f<%f)=%d\n",
+ a, b, a < b);
+ printf("(%f<=%f)=%d\n",
+ a, b, a <= b);
+ printf("(%f==%f)=%d\n",
+ a, b, a == b);
+ printf("(%f>%f)=%d\n",
+ a, b, a > b);
+ printf("(%f<=%f)=%d\n",
+ a, b, a >= b);
+ {
+ unsigned long long int rflags;
+ /* test f(u)comi instruction */
+ asm("fcomi %2, %1\n"
+ "pushfq\n"
+ "popq %0\n"
+ : "=r" (rflags)
+ : "t" (a), "u" (b));
+ printf("fcomi(%f %f)=%016llx\n", a, b, rflags & (CC_Z | CC_P | CC_C));
+ }
+}
+
+void test_fcvt(double a)
+{
+ float fa;
+ long double la;
+ int16_t fpuc;
+ int i;
+ int64 lla;
+ int ia;
+ int16_t wa;
+ double ra;
+
+ fa = a;
+ la = a;
+ printf("(float)%f = %f\n", a, fa);
+ printf("(long double)%f = %Lf\n", a, la);
+ printf("a=%016Lx\n", *(long long *)&a);
+ printf("la=%016Lx %04x\n", *(long long *)&la,
+ *(unsigned short *)((char *)(&la) + 8));
+
+ /* test all roundings */
+ asm volatile ("fstcw %0" : "=m" (fpuc));
+ for(i=0;i<4;i++) {
+ short zz = (fpuc & ~0x0c00) | (i << 10);
+ asm volatile ("fldcw %0" : : "m" (zz));
+ asm volatile ("fist %0" : "=m" (wa) : "t" (a));
+ asm volatile ("fistl %0" : "=m" (ia) : "t" (a));
+ asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st");
+ asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a));
+ asm volatile ("fldcw %0" : : "m" (fpuc));
+ printf("(short)a = %d\n", wa);
+ printf("(int)a = %d\n", ia);
+ printf("(int64_t)a = %Ld\n", lla);
+ printf("rint(a) = %f\n", ra);
+ }
+}
+
+#define TEST(N) \
+ asm("fld" #N : "=t" (a)); \
+ printf("fld" #N "= %f\n", a);
+
+void test_fconst(void)
+{
+ double a;
+ TEST(1);
+ TEST(l2t);
+ TEST(l2e);
+ TEST(pi);
+ TEST(lg2);
+ TEST(ln2);
+ TEST(z);
+}
+
+void test_fbcd(double a)
+{
+ unsigned short bcd[5];
+ double b;
+
+ asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st");
+ asm("fbld %1" : "=t" (b) : "m" (bcd[0]));
+ printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n",
+ a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b);
+}
+
+#define TEST_ENV(env, save, restore)\
+{\
+ memset((env), 0xaa, sizeof(*(env)));\
+ for(i=0;i<5;i++)\
+ asm volatile ("fldl %0" : : "m" (dtab[i]));\
+ asm(save " %0\n" : : "m" (*(env)));\
+ asm(restore " %0\n": : "m" (*(env)));\
+ for(i=0;i<5;i++)\
+ asm volatile ("fstpl %0" : "=m" (rtab[i]));\
+ for(i=0;i<5;i++)\
+ printf("res[%d]=%f\n", i, rtab[i]);\
+ printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
+ (env)->fpuc,\
+ (env)->fpus & 0xff00,\
+ (env)->fptag);\
+}
+
+void test_fenv(void)
+{
+ struct __attribute__((packed)) {
+ uint16_t fpuc;
+ uint16_t dummy1;
+ uint16_t fpus;
+ uint16_t dummy2;
+ uint16_t fptag;
+ uint16_t dummy3;
+ uint32_t ignored[4];
+ long double fpregs[8];
+ } float_env32;
+ struct __attribute__((packed)) {
+ uint16_t fpuc;
+ uint16_t fpus;
+ uint16_t fptag;
+ uint16_t ignored[4];
+ long double fpregs[8];
+ } float_env16;
+ double dtab[8];
+ double rtab[8];
+ int i;
+
+ for(i=0;i<8;i++)
+ dtab[i] = i + 1;
+
+ TEST_ENV(&float_env16, "data16 fnstenv", "data16 fldenv");
+ TEST_ENV(&float_env16, "data16 fnsave", "data16 frstor");
+ TEST_ENV(&float_env32, "fnstenv", "fldenv");
+ TEST_ENV(&float_env32, "fnsave", "frstor");
+
+ /* test for ffree */
+ for(i=0;i<5;i++)
+ asm volatile ("fldl %0" : : "m" (dtab[i]));
+ asm volatile("ffree %st(2)");
+ asm volatile ("fnstenv %0\n" : : "m" (float_env32));
+ asm volatile ("fninit");
+ printf("fptag=%04x\n", float_env32.fptag);
+}
+
+
+#define TEST_FCMOV(a, b, rflags, CC)\
+{\
+ double res;\
+ asm("pushq %3\n"\
+ "popfq\n"\
+ "fcmov" CC " %2, %0\n"\
+ : "=t" (res)\
+ : "0" (a), "u" (b), "g" (rflags));\
+ printf("fcmov%s rflags=0x%04llx-> %f\n", \
+ CC, rflags, res);\
+}
+
+void test_fcmov(void)
+{
+ double a, b;
+ int64 rflags, i;
+
+ a = 1.0;
+ b = 2.0;
+ for(i = 0; i < 4; i++) {
+ rflags = 0;
+ if (i & 1)
+ rflags |= CC_C;
+ if (i & 2)
+ rflags |= CC_Z;
+ TEST_FCMOV(a, b, rflags, "b");
+ TEST_FCMOV(a, b, rflags, "e");
+ TEST_FCMOV(a, b, rflags, "be");
+ TEST_FCMOV(a, b, rflags, "nb");
+ TEST_FCMOV(a, b, rflags, "ne");
+ TEST_FCMOV(a, b, rflags, "nbe");
+ }
+ TEST_FCMOV(a, b, (int64)0, "u");
+ TEST_FCMOV(a, b, (int64)CC_P, "u");
+ TEST_FCMOV(a, b, (int64)0, "nu");
+ TEST_FCMOV(a, b, (int64)CC_P, "nu");
+}
+
+void test_floats(void)
+{
+ test_fops(2, 3);
+ test_fops(1.4, -5);
+ test_fcmp(2, -1);
+ test_fcmp(2, 2);
+ test_fcmp(2, 3);
+ test_fcvt(0.5);
+ test_fcvt(-0.5);
+ test_fcvt(1.0/7.0);
+ test_fcvt(-1.0/9.0);
+ test_fcvt(32768);
+ test_fcvt(-1e20);
+ test_fconst();
+ // REINSTATE (maybe): test_fbcd(1234567890123456);
+ // REINSTATE (maybe): test_fbcd(-123451234567890);
+ // REINSTATE: test_fenv();
+ // REINSTATE: test_fcmov();
+}
+
+/**********************************************/
+#if 0
+
+#define TEST_BCD(op, op0, cc_in, cc_mask)\
+{\
+ int res, flags;\
+ res = op0;\
+ flags = cc_in;\
+ asm ("push %3\n\t"\
+ "popf\n\t"\
+ #op "\n\t"\
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=a" (res), "=g" (flags)\
+ : "0" (res), "1" (flags));\
+ printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
+ #op, op0, res, cc_in, flags & cc_mask);\
+}
+
+void test_bcd(void)
+{
+ TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+
+ TEST_BCD(das, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+
+ TEST_BCD(aaa, 0x12340205, CC_A, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x12340306, CC_A, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x1234040a, CC_A, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x123405fa, CC_A, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x12340205, 0, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
+
+ TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
+ TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
+ TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
+ TEST_BCD(aas, 0x123405fa, CC_A, (CC_C | CC_A));
+ TEST_BCD(aas, 0x12340205, 0, (CC_C | CC_A));
+ TEST_BCD(aas, 0x12340306, 0, (CC_C | CC_A));
+ TEST_BCD(aas, 0x1234040a, 0, (CC_C | CC_A));
+ TEST_BCD(aas, 0x123405fa, 0, (CC_C | CC_A));
+
+ TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
+ TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
+}
+#endif /* 0 */
+
+#define TEST_XCHG(op, size, opconst)\
+{\
+ int op0, op1;\
+ op0 = 0x12345678;\
+ op1 = 0xfbca7654;\
+ asm(#op " %" size "0, %" size "1" \
+ : "=q" (op0), opconst (op1) \
+ : "0" (op0), "1" (op1));\
+ printf("%-10s A=%08x B=%08x\n",\
+ #op, op0, op1);\
+}
+
+#define TEST_CMPXCHG(op, size, opconst, eax)\
+{\
+ int op0, op1;\
+ op0 = 0x12345678;\
+ op1 = 0xfbca7654;\
+ asm(#op " %" size "0, %" size "1" \
+ : "=q" (op0), opconst (op1) \
+ : "0" (op0), "1" (op1), "a" (eax));\
+ printf("%-10s EAX=%08x A=%08x C=%08x\n",\
+ #op, eax, op0, op1);\
+}
+
+void test_xchg(void)
+{
+ TEST_XCHG(xchgl, "", "=q");
+ TEST_XCHG(xchgw, "w", "=q");
+ TEST_XCHG(xchgb, "b", "=q");
+
+ TEST_XCHG(xchgl, "", "=m");
+ TEST_XCHG(xchgw, "w", "=m");
+ TEST_XCHG(xchgb, "b", "=m");
+
+#if 0
+ TEST_XCHG(xaddl, "", "=q");
+ TEST_XCHG(xaddw, "w", "=q");
+ TEST_XCHG(xaddb, "b", "=q");
+
+ {
+ int res;
+ res = 0x12345678;
+ asm("xaddl %1, %0" : "=r" (res) : "0" (res));
+ printf("xaddl same res=%08x\n", res);
+ }
+
+ TEST_XCHG(xaddl, "", "=m");
+ TEST_XCHG(xaddw, "w", "=m");
+ TEST_XCHG(xaddb, "b", "=m");
+#endif
+ TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfbca7654);
+ TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654);
+ TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654);
+
+ TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfffefdfc);
+ TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc);
+ TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc);
+
+ TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfbca7654);
+ TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654);
+ TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654);
+
+ TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfffefdfc);
+ TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc);
+ TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc);
+#if 0
+ {
+ uint64_t op0, op1, op2;
+ int i, eflags;
+
+ for(i = 0; i < 2; i++) {
+ op0 = 0x123456789abcd;
+ if (i == 0)
+ op1 = 0xfbca765423456;
+ else
+ op1 = op0;
+ op2 = 0x6532432432434;
+ asm("cmpxchg8b %1\n"
+ "pushf\n"
+ "popl %2\n"
+ : "=A" (op0), "=m" (op1), "=g" (eflags)
+ : "0" (op0), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
+ printf("cmpxchg8b: op0=%016llx op1=%016llx CC=%02x\n",
+ op0, op1, eflags & CC_Z);
+ }
+ }
+#endif
+}
+
+/**********************************************/
+/* segmentation tests */
+#if 0
+#include <asm/ldt.h>
+#include <linux/unistd.h>
+#include <linux/version.h>
+
+_syscall3(int, modify_ldt, int, func, void *, ptr, unsigned long, bytecount)
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 66)
+#define modify_ldt_ldt_s user_desc
+#endif
+
+uint8_t seg_data1[4096];
+uint8_t seg_data2[4096];
+
+#define MK_SEL(n) (((n) << 3) | 7)
+
+#define TEST_LR(op, size, seg, mask)\
+{\
+ int res, res2;\
+ res = 0x12345678;\
+ asm (op " %" size "2, %" size "0\n" \
+ "movl $0, %1\n"\
+ "jnz 1f\n"\
+ "movl $1, %1\n"\
+ "1:\n"\
+ : "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\
+ printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
+}
+
+/* NOTE: we use Linux modify_ldt syscall */
+void test_segs(void)
+{
+ struct modify_ldt_ldt_s ldt;
+ long long ldt_table[3];
+ int res, res2;
+ char tmp;
+ struct {
+ uint32_t offset;
+ uint16_t seg;
+ } __attribute__((packed)) segoff;
+
+ ldt.entry_number = 1;
+ ldt.base_addr = (unsigned long)&seg_data1;
+ ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
+ ldt.seg_32bit = 1;
+ ldt.contents = MODIFY_LDT_CONTENTS_DATA;
+ ldt.read_exec_only = 0;
+ ldt.limit_in_pages = 1;
+ ldt.seg_not_present = 0;
+ ldt.useable = 1;
+ modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
+
+ ldt.entry_number = 2;
+ ldt.base_addr = (unsigned long)&seg_data2;
+ ldt.limit = (sizeof(seg_data2) + 0xfff) >> 12;
+ ldt.seg_32bit = 1;
+ ldt.contents = MODIFY_LDT_CONTENTS_DATA;
+ ldt.read_exec_only = 0;
+ ldt.limit_in_pages = 1;
+ ldt.seg_not_present = 0;
+ ldt.useable = 1;
+ modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
+
+ modify_ldt(0, &ldt_table, sizeof(ldt_table)); /* read ldt entries */
+#if 0
+ {
+ int i;
+ for(i=0;i<3;i++)
+ printf("%d: %016Lx\n", i, ldt_table[i]);
+ }
+#endif
+ /* do some tests with fs or gs */
+ asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
+
+ seg_data1[1] = 0xaa;
+ seg_data2[1] = 0x55;
+
+ asm volatile ("fs movzbl 0x1, %0" : "=r" (res));
+ printf("FS[1] = %02x\n", res);
+
+ asm volatile ("pushl %%gs\n"
+ "movl %1, %%gs\n"
+ "gs movzbl 0x1, %0\n"
+ "popl %%gs\n"
+ : "=r" (res)
+ : "r" (MK_SEL(2)));
+ printf("GS[1] = %02x\n", res);
+
+ /* tests with ds/ss (implicit segment case) */
+ tmp = 0xa5;
+ asm volatile ("pushl %%ebp\n\t"
+ "pushl %%ds\n\t"
+ "movl %2, %%ds\n\t"
+ "movl %3, %%ebp\n\t"
+ "movzbl 0x1, %0\n\t"
+ "movzbl (%%ebp), %1\n\t"
+ "popl %%ds\n\t"
+ "popl %%ebp\n\t"
+ : "=r" (res), "=r" (res2)
+ : "r" (MK_SEL(1)), "r" (&tmp));
+ printf("DS[1] = %02x\n", res);
+ printf("SS[tmp] = %02x\n", res2);
+
+ segoff.seg = MK_SEL(2);
+ segoff.offset = 0xabcdef12;
+ asm volatile("lfs %2, %0\n\t"
+ "movl %%fs, %1\n\t"
+ : "=r" (res), "=g" (res2)
+ : "m" (segoff));
+ printf("FS:reg = %04x:%08x\n", res2, res);
+
+ TEST_LR("larw", "w", MK_SEL(2), 0x0100);
+ TEST_LR("larl", "", MK_SEL(2), 0x0100);
+ TEST_LR("lslw", "w", MK_SEL(2), 0);
+ TEST_LR("lsll", "", MK_SEL(2), 0);
+
+ TEST_LR("larw", "w", 0xfff8, 0);
+ TEST_LR("larl", "", 0xfff8, 0);
+ TEST_LR("lslw", "w", 0xfff8, 0);
+ TEST_LR("lsll", "", 0xfff8, 0);
+}
+#endif
+
+#if 0
+/* 16 bit code test */
+extern char code16_start, code16_end;
+extern char code16_func1;
+extern char code16_func2;
+extern char code16_func3;
+
+void test_code16(void)
+{
+ struct modify_ldt_ldt_s ldt;
+ int res, res2;
+
+ /* build a code segment */
+ ldt.entry_number = 1;
+ ldt.base_addr = (unsigned long)&code16_start;
+ ldt.limit = &code16_end - &code16_start;
+ ldt.seg_32bit = 0;
+ ldt.contents = MODIFY_LDT_CONTENTS_CODE;
+ ldt.read_exec_only = 0;
+ ldt.limit_in_pages = 0;
+ ldt.seg_not_present = 0;
+ ldt.useable = 1;
+ modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
+
+ /* call the first function */
+ asm volatile ("lcall %1, %2"
+ : "=a" (res)
+ : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
+ printf("func1() = 0x%08x\n", res);
+ asm volatile ("lcall %2, %3"
+ : "=a" (res), "=c" (res2)
+ : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
+ printf("func2() = 0x%08x spdec=%d\n", res, res2);
+ asm volatile ("lcall %1, %2"
+ : "=a" (res)
+ : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
+ printf("func3() = 0x%08x\n", res);
+}
+#endif
+
+extern char func_lret32;
+extern char func_iret32;
+
+void test_misc(void)
+{
+ // char table[256];
+ // int res, i;
+
+#if 0
+ // REINSTATE
+ for(i=0;i<256;i++) table[i] = 256 - i;
+ res = 0x12345678;
+ asm ("xlat" : "=a" (res) : "b" (table), "0" (res));
+ printf("xlat: EAX=%08x\n", res);
+#endif
+#if 0
+ // REINSTATE
+ asm volatile ("pushl %%cs ; call %1"
+ : "=a" (res)
+ : "m" (func_lret32): "memory", "cc");
+ printf("func_lret32=%x\n", res);
+
+ asm volatile ("pushfl ; pushl %%cs ; call %1"
+ : "=a" (res)
+ : "m" (func_iret32): "memory", "cc");
+ printf("func_iret32=%x\n", res);
+#endif
+#if 0
+ /* specific popl test */
+ asm volatile ("pushq $0x9abcdef12345678 ; popl (%%rsp) ; addq $4,%%rsp"
+ : "=g" (res));
+ printf("popl esp=%x\n", res);
+#endif
+#if 0
+ // REINSTATE
+ /* specific popw test */
+ asm volatile ("pushq $12345432 ; pushq $0x9abcdef ; popw (%%rsp) ; addl $2, %%rsp ; popq %0"
+ : "=g" (res));
+ printf("popw rsp=%x\n", res);
+#endif
+}
+
+uint8_t str_buffer[4096];
+
+#define TEST_STRING1(OP, size, DF, REP)\
+{\
+ int64 rsi, rdi, rax, rcx, rflags;\
+\
+ rsi = (long)(str_buffer + sizeof(str_buffer) / 2);\
+ rdi = (long)(str_buffer + sizeof(str_buffer) / 2) + 16;\
+ rax = 0x12345678;\
+ rcx = 17;\
+\
+ asm volatile ("pushq $0\n\t"\
+ "popfq\n\t"\
+ DF "\n\t"\
+ REP #OP size "\n\t"\
+ "cld\n\t"\
+ "pushfq\n\t"\
+ "popq %4\n\t"\
+ : "=S" (rsi), "=D" (rdi), "=a" (rax), "=c" (rcx), "=g" (rflags)\
+ : "0" (rsi), "1" (rdi), "2" (rax), "3" (rcx));\
+ printf("%-10s ESI=%016llx EDI=%016llx EAX=%016llx ECX=%016llx EFL=%04llx\n",\
+ REP #OP size, rsi, rdi, rax, rcx,\
+ rflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
+}
+
+#define TEST_STRING(OP, REP)\
+ TEST_STRING1(OP, "b", "", REP);\
+ TEST_STRING1(OP, "w", "", REP);\
+ TEST_STRING1(OP, "l", "", REP);\
+ TEST_STRING1(OP, "b", "std", REP);\
+ TEST_STRING1(OP, "w", "std", REP);\
+ TEST_STRING1(OP, "l", "std", REP)
+
+void test_string(void)
+{
+ int64 i;
+ for(i = 0;i < sizeof(str_buffer); i++)
+ str_buffer[i] = i + 0x56;
+ TEST_STRING(stos, "");
+ TEST_STRING(stos, "rep ");
+ // REINSTATE: TEST_STRING(lods, ""); /* to verify stos */
+ // REINSTATE: TEST_STRING(lods, "rep ");
+ TEST_STRING(movs, "");
+ TEST_STRING(movs, "rep ");
+ // REINSTATE: TEST_STRING(lods, ""); /* to verify stos */
+
+ /* XXX: better tests */
+ TEST_STRING(scas, "");
+ // REINSTATE: TEST_STRING(scas, "repz ");
+ TEST_STRING(scas, "repnz ");
+ // REINSTATE: TEST_STRING(cmps, "");
+ TEST_STRING(cmps, "repz ");
+ // REINSTATE: TEST_STRING(cmps, "repnz ");
+}
+
+/* VM86 test */
+#if 0
+static inline void set_bit(uint8_t *a, unsigned int bit)
+{
+ a[bit / 8] |= (1 << (bit % 8));
+}
+
+static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg)
+{
+ return (uint8_t *)((seg << 4) + (reg & 0xffff));
+}
+
+static inline void pushw(struct vm86_regs *r, int val)
+{
+ r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff);
+ *(uint16_t *)seg_to_linear(r->ss, r->esp) = val;
+}
+
+#undef __syscall_return
+#define __syscall_return(type, res) \
+do { \
+ return (type) (res); \
+} while (0)
+
+_syscall2(int, vm86, int, func, struct vm86plus_struct *, v86)
+
+extern char vm86_code_start;
+extern char vm86_code_end;
+
+#define VM86_CODE_CS 0x100
+#define VM86_CODE_IP 0x100
+
+void test_vm86(void)
+{
+ struct vm86plus_struct ctx;
+ struct vm86_regs *r;
+ uint8_t *vm86_mem;
+ int seg, ret;
+
+ vm86_mem = mmap((void *)0x00000000, 0x110000,
+ PROT_WRITE | PROT_READ | PROT_EXEC,
+ MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
+ if (vm86_mem == MAP_FAILED) {
+ printf("ERROR: could not map vm86 memory");
+ return;
+ }
+ memset(&ctx, 0, sizeof(ctx));
+
+ /* init basic registers */
+ r = &ctx.regs;
+ r->eip = VM86_CODE_IP;
+ r->esp = 0xfffe;
+ seg = VM86_CODE_CS;
+ r->cs = seg;
+ r->ss = seg;
+ r->ds = seg;
+ r->es = seg;
+ r->fs = seg;
+ r->gs = seg;
+ r->eflags = VIF_MASK;
+
+ /* move code to proper address. We use the same layout as a .com
+ dos program. */
+ memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP,
+ &vm86_code_start, &vm86_code_end - &vm86_code_start);
+
+ /* mark int 0x21 as being emulated */
+ set_bit((uint8_t *)&ctx.int_revectored, 0x21);
+
+ for(;;) {
+ ret = vm86(VM86_ENTER, &ctx);
+ switch(VM86_TYPE(ret)) {
+ case VM86_INTx:
+ {
+ int int_num, ah, v;
+
+ int_num = VM86_ARG(ret);
+ if (int_num != 0x21)
+ goto unknown_int;
+ ah = (r->eax >> 8) & 0xff;
+ switch(ah) {
+ case 0x00: /* exit */
+ goto the_end;
+ case 0x02: /* write char */
+ {
+ uint8_t c = r->edx;
+ putchar(c);
+ }
+ break;
+ case 0x09: /* write string */
+ {
+ uint8_t c, *ptr;
+ ptr = seg_to_linear(r->ds, r->edx);
+ for(;;) {
+ c = *ptr++;
+ if (c == '$')
+ break;
+ putchar(c);
+ }
+ r->eax = (r->eax & ~0xff) | '$';
+ }
+ break;
+ case 0xff: /* extension: write eflags number in edx */
+ v = (int)r->edx;
+#ifndef LINUX_VM86_IOPL_FIX
+ v &= ~0x3000;
+#endif
+ printf("%08x\n", v);
+ break;
+ default:
+ unknown_int:
+ printf("unsupported int 0x%02x\n", int_num);
+ goto the_end;
+ }
+ }
+ break;
+ case VM86_SIGNAL:
+ /* a signal came, we just ignore that */
+ break;
+ case VM86_STI:
+ break;
+ default:
+ printf("ERROR: unhandled vm86 return code (0x%x)\n", ret);
+ goto the_end;
+ }
+ }
+ the_end:
+ printf("VM86 end\n");
+ munmap(vm86_mem, 0x110000);
+}
+#endif
+
+/* exception tests */
+#if 0
+#ifndef REG_EAX
+#define REG_EAX EAX
+#define REG_EBX EBX
+#define REG_ECX ECX
+#define REG_EDX EDX
+#define REG_ESI ESI
+#define REG_EDI EDI
+#define REG_EBP EBP
+#define REG_ESP ESP
+#define REG_EIP EIP
+#define REG_EFL EFL
+#define REG_TRAPNO TRAPNO
+#define REG_ERR ERR
+#endif
+
+jmp_buf jmp_env;
+int v1;
+int tab[2];
+
+void sig_handler(int sig, siginfo_t *info, void *puc)
+{
+ struct ucontext *uc = puc;
+
+ printf("si_signo=%d si_errno=%d si_code=%d",
+ info->si_signo, info->si_errno, info->si_code);
+ printf(" si_addr=0x%08lx",
+ (unsigned long)info->si_addr);
+ printf("\n");
+
+ printf("trapno=0x%02x err=0x%08x",
+ uc->uc_mcontext.gregs[REG_TRAPNO],
+ uc->uc_mcontext.gregs[REG_ERR]);
+ printf(" EIP=0x%08x", uc->uc_mcontext.gregs[REG_EIP]);
+ printf("\n");
+ longjmp(jmp_env, 1);
+}
+
+void test_exceptions(void)
+{
+ struct modify_ldt_ldt_s ldt;
+ struct sigaction act;
+ volatile int val;
+
+ act.sa_sigaction = sig_handler;
+ sigemptyset(&act.sa_mask);
+ act.sa_flags = SA_SIGINFO;
+ sigaction(SIGFPE, &act, NULL);
+ sigaction(SIGILL, &act, NULL);
+ sigaction(SIGSEGV, &act, NULL);
+ sigaction(SIGBUS, &act, NULL);
+ sigaction(SIGTRAP, &act, NULL);
+
+ /* test division by zero reporting */
+ printf("DIVZ exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* now divide by zero */
+ v1 = 0;
+ v1 = 2 / v1;
+ }
+
+ printf("BOUND exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* bound exception */
+ tab[0] = 1;
+ tab[1] = 10;
+ asm volatile ("bound %0, %1" : : "r" (11), "m" (tab));
+ }
+
+ printf("segment exceptions:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* load an invalid segment */
+ asm volatile ("movl %0, %%fs" : : "r" ((0x1234 << 3) | 1));
+ }
+ if (setjmp(jmp_env) == 0) {
+ /* null data segment is valid */
+ asm volatile ("movl %0, %%fs" : : "r" (3));
+ /* null stack segment */
+ asm volatile ("movl %0, %%ss" : : "r" (3));
+ }
+
+ ldt.entry_number = 1;
+ ldt.base_addr = (unsigned long)&seg_data1;
+ ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
+ ldt.seg_32bit = 1;
+ ldt.contents = MODIFY_LDT_CONTENTS_DATA;
+ ldt.read_exec_only = 0;
+ ldt.limit_in_pages = 1;
+ ldt.seg_not_present = 1;
+ ldt.useable = 1;
+ modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
+
+ if (setjmp(jmp_env) == 0) {
+ /* segment not present */
+ asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
+ }
+
+ /* test SEGV reporting */
+ printf("PF exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ val = 1;
+ /* we add a nop to test a weird PC retrieval case */
+ asm volatile ("nop");
+ /* now store in an invalid address */
+ *(char *)0x1234 = 1;
+ }
+
+ /* test SEGV reporting */
+ printf("PF exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ val = 1;
+ /* read from an invalid address */
+ v1 = *(char *)0x1234;
+ }
+
+ /* test illegal instruction reporting */
+ printf("UD2 exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* now execute an invalid instruction */
+ asm volatile("ud2");
+ }
+ printf("lock nop exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* now execute an invalid instruction */
+ asm volatile("lock nop");
+ }
+
+ printf("INT exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("int $0xfd");
+ }
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("int $0x01");
+ }
+ if (setjmp(jmp_env) == 0) {
+ asm volatile (".byte 0xcd, 0x03");
+ }
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("int $0x04");
+ }
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("int $0x05");
+ }
+
+ printf("INT3 exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("int3");
+ }
+
+ printf("CLI exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("cli");
+ }
+
+ printf("STI exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("cli");
+ }
+
+ printf("INTO exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* overflow exception */
+ asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff));
+ }
+
+ printf("OUTB exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("outb %%al, %%dx" : : "d" (0x4321), "a" (0));
+ }
+
+ printf("INB exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("inb %%dx, %%al" : "=a" (val) : "d" (0x4321));
+ }
+
+ printf("REP OUTSB exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("rep outsb" : : "d" (0x4321), "S" (tab), "c" (1));
+ }
+
+ printf("REP INSB exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("rep insb" : : "d" (0x4321), "D" (tab), "c" (1));
+ }
+
+ printf("HLT exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("hlt");
+ }
+
+ printf("single step exception:\n");
+ val = 0;
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("pushf\n"
+ "orl $0x00100, (%%esp)\n"
+ "popf\n"
+ "movl $0xabcd, %0\n"
+ "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory");
+ }
+ printf("val=0x%x\n", val);
+}
+
+/* specific precise single step test */
+void sig_trap_handler(int sig, siginfo_t *info, void *puc)
+{
+ struct ucontext *uc = puc;
+ printf("EIP=0x%08x\n", uc->uc_mcontext.gregs[REG_EIP]);
+}
+
+const uint8_t sstep_buf1[4] = { 1, 2, 3, 4};
+uint8_t sstep_buf2[4];
+
+void test_single_step(void)
+{
+ struct sigaction act;
+ volatile int val;
+ int i;
+
+ val = 0;
+ act.sa_sigaction = sig_trap_handler;
+ sigemptyset(&act.sa_mask);
+ act.sa_flags = SA_SIGINFO;
+ sigaction(SIGTRAP, &act, NULL);
+ asm volatile ("pushf\n"
+ "orl $0x00100, (%%esp)\n"
+ "popf\n"
+ "movl $0xabcd, %0\n"
+
+ /* jmp test */
+ "movl $3, %%ecx\n"
+ "1:\n"
+ "addl $1, %0\n"
+ "decl %%ecx\n"
+ "jnz 1b\n"
+
+ /* movsb: the single step should stop at each movsb iteration */
+ "movl $sstep_buf1, %%esi\n"
+ "movl $sstep_buf2, %%edi\n"
+ "movl $0, %%ecx\n"
+ "rep movsb\n"
+ "movl $3, %%ecx\n"
+ "rep movsb\n"
+ "movl $1, %%ecx\n"
+ "rep movsb\n"
+
+ /* cmpsb: the single step should stop at each cmpsb iteration */
+ "movl $sstep_buf1, %%esi\n"
+ "movl $sstep_buf2, %%edi\n"
+ "movl $0, %%ecx\n"
+ "rep cmpsb\n"
+ "movl $4, %%ecx\n"
+ "rep cmpsb\n"
+
+ /* getpid() syscall: single step should skip one
+ instruction */
+ "movl $20, %%eax\n"
+ "int $0x80\n"
+ "movl $0, %%eax\n"
+
+ /* when modifying SS, trace is not done on the next
+ instruction */
+ "movl %%ss, %%ecx\n"
+ "movl %%ecx, %%ss\n"
+ "addl $1, %0\n"
+ "movl $1, %%eax\n"
+ "movl %%ecx, %%ss\n"
+ "jmp 1f\n"
+ "addl $1, %0\n"
+ "1:\n"
+ "movl $1, %%eax\n"
+ "pushl %%ecx\n"
+ "popl %%ss\n"
+ "addl $1, %0\n"
+ "movl $1, %%eax\n"
+
+ "pushf\n"
+ "andl $~0x00100, (%%esp)\n"
+ "popf\n"
+ : "=m" (val)
+ :
+ : "cc", "memory", "eax", "ecx", "esi", "edi");
+ printf("val=%d\n", val);
+ for(i = 0; i < 4; i++)
+ printf("sstep_buf2[%d] = %d\n", i, sstep_buf2[i]);
+}
+
+/* self modifying code test */
+uint8_t code[] = {
+ 0xb8, 0x1, 0x00, 0x00, 0x00, /* movl $1, %eax */
+ 0xc3, /* ret */
+};
+
+asm("smc_code2:\n"
+ "movl 4(%esp), %eax\n"
+ "movl %eax, smc_patch_addr2 + 1\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "smc_patch_addr2:\n"
+ "movl $1, %eax\n"
+ "ret\n");
+
+typedef int FuncType(void);
+extern int smc_code2(int);
+void test_self_modifying_code(void)
+{
+ int i;
+
+ printf("self modifying code:\n");
+ printf("func1 = 0x%x\n", ((FuncType *)code)());
+ for(i = 2; i <= 4; i++) {
+ code[1] = i;
+ printf("func%d = 0x%x\n", i, ((FuncType *)code)());
+ }
+
+ /* more difficult test : the modified code is just after the
+ modifying instruction. It is forbidden in Intel specs, but it
+ is used by old DOS programs */
+ for(i = 2; i <= 4; i++) {
+ printf("smc_code2(%d) = %d\n", i, smc_code2(i));
+ }
+}
+
+static void *call_end __init_call = NULL;
+#endif
+
+int main(int argc, char **argv)
+{
+ void **ptr;
+ void (*func)(void);
+
+#if 1
+ ptr = &call_start + 1;
+ while (*ptr != NULL) {
+ func = *ptr++;
+ func();
+ }
+#endif
+ test_bsx(); //REINSTATE64
+ test_mul();
+ test_jcc();
+ // test_floats(); REINSTATE64
+ //test_bcd();
+ //test_xchg(); REINSTATE64
+ test_string();
+ //test_misc(); // REINSTATE
+ test_lea();
+ // test_segs();
+ //test_code16();
+ //test_vm86();
+ //test_exceptions();
+ //test_self_modifying_code();
+ //test_single_step();
+ printf("bye\n");
+ return 0;
+}
diff --git a/main/VEX/test/test-amd64.h b/main/VEX/test/test-amd64.h
new file mode 100644
index 0000000..94b32fe
--- /dev/null
+++ b/main/VEX/test/test-amd64.h
@@ -0,0 +1,227 @@
+
+#define exec_op glue(exec_, OP)
+#define exec_opq glue(glue(exec_, OP), q)
+#define exec_opl glue(glue(exec_, OP), l)
+#define exec_opw glue(glue(exec_, OP), w)
+#define exec_opb glue(glue(exec_, OP), b)
+
+#define EXECOP2(size, res, s1, flags) \
+ asm ("pushq %4\n\t"\
+ "popfq\n\t"\
+ stringify(OP) size " %" size "2, %" size "0\n\t" \
+ "pushfq\n\t"\
+ "popq %1\n\t"\
+ : "=q" (res), "=g" (flags)\
+ : "q" (s1), "0" (res), "1" (flags));
+
+#define EXECOP1(size, res, flags) \
+ asm ("pushq %3\n\t"\
+ "popfq\n\t"\
+ stringify(OP) size " %" size "0\n\t" \
+ "pushfq\n\t"\
+ "popq %1\n\t"\
+ : "=q" (res), "=g" (flags)\
+ : "0" (res), "1" (flags));
+
+#ifdef OP1
+inline void exec_opq(int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP1("", res, flags);
+ printf("%-6s A=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "q", s0, res, iflags, flags & CC_MASK);
+}
+inline void exec_opl(int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP1("", res, flags);
+ printf("%-6s A=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "l", s0, res, iflags, flags & CC_MASK);
+}
+inline void exec_opw(int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP1("w", res, flags);
+ printf("%-6s A=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "w", s0, res, iflags, flags & CC_MASK);
+}
+inline void exec_opb(int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP1("b", res, flags);
+ printf("%-6s A=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "b", s0, res, iflags, flags & CC_MASK);
+}
+#else
+inline void exec_opq(int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP2("q", res, s1, flags);
+ printf("%-6s A=%016llx B=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "q", s0, s1, res, iflags, flags & CC_MASK);
+}
+
+inline void exec_opl(int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP2("", res, s1, flags);
+ printf("%-6s A=%016llx B=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
+}
+
+inline void exec_opw(int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP2("w", res, s1, flags);
+ printf("%-6s A=%016llx B=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
+}
+
+inline void exec_opb(int64 s0, int64 s1, int64 iflags)
+{
+ int64 res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP2("b", res, s1, flags);
+ printf("%-6s A=%016llx B=%016llx R=%016llx CCIN=%04llx CC=%04llx\n",
+ stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
+}
+#endif
+
+void exec_op(int64 s0, int64 s1)
+{
+#if 1
+ int64 o,s,z,a,c,p,flags_in;
+ for (o = 0; o < 2; o++) {
+ for (s = 0; s < 2; s++) {
+ for (z = 0; z < 2; z++) {
+ for (a = 0; a < 2; a++) {
+ for (c = 0; c < 2; c++) {
+ for (p = 0; p < 2; p++) {
+
+ flags_in = (o ? CC_O : 0)
+ | (s ? CC_S : 0)
+ | (z ? CC_Z : 0)
+ | (a ? CC_A : 0)
+ | (c ? CC_C : 0)
+ | (p ? CC_P : 0);
+ exec_opq(s0, s1, flags_in);
+ exec_opl(s0, s1, flags_in);
+ exec_opw(s0, s1, flags_in);
+ exec_opb(s0, s1, flags_in);
+ }}}}}}
+#else
+ exec_opq(s0, s1, 0);
+ exec_opl(s0, s1, 0);
+ exec_opw(s0, s1, 0);
+ exec_opb(s0, s1, 0);
+ exec_opq(s0, s1, CC_C);
+ exec_opl(s0, s1, CC_C);
+ exec_opw(s0, s1, CC_C);
+ exec_opb(s0, s1, CC_C);
+#endif
+}
+
+void glue(test_, OP)(void)
+{
+#define NVALS 57
+ int64 i, j;
+ static unsigned int val[NVALS]
+ = { 0x00, 0x01, 0x02, 0x03,
+ 0x3F, 0x40, 0x41,
+ 0x7E, 0x7F, 0x80, 0x81, 0x82,
+ 0xBF, 0xC0, 0xC1,
+ 0xFC, 0xFD, 0xFE, 0xFF,
+
+ 0xFF00, 0xFF01, 0xFF02, 0xFF03,
+ 0xFF3F, 0xFF40, 0xFF41,
+ 0xFF7E, 0xFF7F, 0xFF80, 0xFF81, 0xFF82,
+ 0xFFBF, 0xFFC0, 0xFFC1,
+ 0xFFFC, 0xFFFD, 0xFFFE, 0xFFFF,
+
+ 0xFFFFFF00, 0xFFFFFF01, 0xFFFFFF02, 0xFFFFFF03,
+ 0xFFFFFF3F, 0xFFFFFF40, 0xFFFFFF41,
+ 0xFFFFFF7E, 0xFFFFFF7F, 0xFFFFFF80, 0xFFFFFF81, 0xFFFFFF82,
+ 0xFFFFFFBF, 0xFFFFFFC0, 0xFFFFFFC1,
+ 0xFFFFFFFC, 0xFFFFFFFD, 0xFFFFFFFE, 0xFFFFFFFF
+ };
+
+ exec_op(0xabcd12345678, 0x4321812FADA);
+ exec_op(0x12345678, 0x812FADA);
+ exec_op(0xabcd00012341, 0xabcd00012341);
+ exec_op(0x12341, 0x12341);
+ exec_op(0x12341, -0x12341);
+ exec_op(0xffffffff, 0);
+ exec_op(0xffffffff, -1);
+ exec_op(0xffffffff, 1);
+ exec_op(0xffffffff, 2);
+ exec_op(0x7fffffff, 0);
+ exec_op(0x7fffffff, 1);
+ exec_op(0x7fffffff, -1);
+ exec_op(0x80000000, -1);
+ exec_op(0x80000000, 1);
+ exec_op(0x80000000, -2);
+ exec_op(0x12347fff, 0);
+ exec_op(0x12347fff, 1);
+ exec_op(0x12347fff, -1);
+ exec_op(0x12348000, -1);
+ exec_op(0x12348000, 1);
+ exec_op(0x12348000, -2);
+ exec_op(0x12347f7f, 0);
+ exec_op(0x12347f7f, 1);
+ exec_op(0x12347f7f, -1);
+ exec_op(0x12348080, -1);
+ exec_op(0x12348080, 1);
+ exec_op(0x12348080, -2);
+
+ exec_op(0xFFFFFFFFffffffff, 0);
+ exec_op(0xFFFFFFFFffffffff, -1);
+ exec_op(0xFFFFFFFFffffffff, 1);
+ exec_op(0xFFFFFFFFffffffff, 2);
+ exec_op(0x7fffffffFFFFFFFF, 0);
+ exec_op(0x7fffffffFFFFFFFF, 1);
+ exec_op(0x7fffffffFFFFFFFF, -1);
+ exec_op(0x8000000000000000, -1);
+ exec_op(0x8000000000000000, 1);
+ exec_op(0x8000000000000000, -2);
+ exec_op(0x123443217FFFFFFF, 0);
+ exec_op(0x123443217FFFFFFF, 1);
+ exec_op(0x123443217FFFFFFF, -1);
+ exec_op(0x1234432180000000, -1);
+ exec_op(0x1234432180000000, 1);
+ exec_op(0x1234432180000000, -2);
+ exec_op(0x123443217F7F7f7f, 0);
+ exec_op(0x123443217F7F7f7f, 1);
+ exec_op(0x123443217F7F7f7f, -1);
+ exec_op(0x1234432180808080, -1);
+ exec_op(0x1234432180808080, 1);
+ exec_op(0x1234432180808080, -2);
+
+#if TEST_INTEGER_VERBOSE
+ if (1)
+ for (i = 0; i < NVALS; i++)
+ for (j = 0; j < NVALS; j++)
+ exec_op(val[i], val[j]);
+#endif
+
+#undef NVALS
+}
+
+void *glue(_test_, OP) __init_call = glue(test_, OP);
+
+#undef OP
+#undef OP_CC
diff --git a/main/VEX/test/test-i386-muldiv.h b/main/VEX/test/test-i386-muldiv.h
new file mode 100644
index 0000000..5dba315
--- /dev/null
+++ b/main/VEX/test/test-i386-muldiv.h
@@ -0,0 +1,56 @@
+
+void glue(glue(test_, OP), b)(int op0, int op1)
+{
+ int res, s1, s0, flags;
+ s0 = op0;
+ s1 = op1;
+ res = s0;
+ flags = 0;
+ asm ("push %4\n\t"
+ "popf\n\t"
+ stringify(OP)"b %b2\n\t"
+ "pushf\n\t"
+ "popl %1\n\t"
+ : "=a" (res), "=g" (flags)
+ : "q" (s1), "0" (res), "1" (flags));
+ printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
+ stringify(OP) "b", s0, s1, res, flags & CC_MASK);
+}
+
+void glue(glue(test_, OP), w)(int op0h, int op0, int op1)
+{
+ int res, s1, flags, resh;
+ s1 = op1;
+ resh = op0h;
+ res = op0;
+ flags = 0;
+ asm ("push %5\n\t"
+ "popf\n\t"
+ stringify(OP) "w %w3\n\t"
+ "pushf\n\t"
+ "popl %1\n\t"
+ : "=a" (res), "=g" (flags), "=d" (resh)
+ : "q" (s1), "0" (res), "1" (flags), "2" (resh));
+ printf("%-10s AH=%08x AL=%08x B=%08x RH=%08x RL=%08x CC=%04x\n",
+ stringify(OP) "w", op0h, op0, s1, resh, res, flags & CC_MASK);
+}
+
+void glue(glue(test_, OP), l)(int op0h, int op0, int op1)
+{
+ int res, s1, flags, resh;
+ s1 = op1;
+ resh = op0h;
+ res = op0;
+ flags = 0;
+ asm ("push %5\n\t"
+ "popf\n\t"
+ stringify(OP) "l %3\n\t"
+ "pushf\n\t"
+ "popl %1\n\t"
+ : "=a" (res), "=g" (flags), "=d" (resh)
+ : "q" (s1), "0" (res), "1" (flags), "2" (resh));
+ printf("%-10s AH=%08x AL=%08x B=%08x RH=%08x RL=%08x CC=%04x\n",
+ stringify(OP) "l", op0h, op0, s1, resh, res, flags & CC_MASK);
+}
+
+#undef OP
diff --git a/main/VEX/test/test-i386-shift.h b/main/VEX/test/test-i386-shift.h
new file mode 100644
index 0000000..e86b85f
--- /dev/null
+++ b/main/VEX/test/test-i386-shift.h
@@ -0,0 +1,161 @@
+
+#define exec_op glue(exec_, OP)
+#define exec_opl glue(glue(exec_, OP), l)
+#define exec_opw glue(glue(exec_, OP), w)
+#define exec_opb glue(glue(exec_, OP), b)
+
+#ifndef OP_SHIFTD
+
+#ifdef OP_NOBYTE
+#define EXECSHIFT(size, res, s1, s2, flags) \
+ asm ("push %4\n\t"\
+ "popf\n\t"\
+ stringify(OP) size " %" size "2, %" size "0\n\t" \
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=g" (res), "=g" (flags)\
+ : "r" (s1), "0" (res), "1" (flags));
+#else
+#define EXECSHIFT(size, res, s1, s2, flags) \
+ asm ("push %4\n\t"\
+ "popf\n\t"\
+ stringify(OP) size " %%cl, %" size "0\n\t" \
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=q" (res), "=g" (flags)\
+ : "c" (s1), "0" (res), "1" (flags));
+#endif
+
+void exec_opl(int s2, int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("", res, s1, s2, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
+}
+
+void exec_opw(int s2, int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("w", res, s1, s2, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
+}
+
+#else
+#define EXECSHIFT(size, res, s1, s2, flags) \
+ asm ("push %4\n\t"\
+ "popf\n\t"\
+ stringify(OP) size " %%cl, %" size "5, %" size "0\n\t" \
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=g" (res), "=g" (flags)\
+ : "c" (s1), "0" (res), "1" (flags), "r" (s2));
+
+void exec_opl(int s2, int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("", res, s1, s2, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%08x B=%08x C=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "l", s0, s2, s1, res, iflags, flags & CC_MASK);
+}
+
+void exec_opw(int s2, int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("w", res, s1, s2, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%08x B=%08x C=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "w", s0, s2, s1, res, iflags, flags & CC_MASK);
+}
+
+#endif
+
+#ifndef OP_NOBYTE
+void exec_opb(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("b", res, s1, 0, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
+}
+#endif
+
+void exec_op(int s2, int s0, int s1)
+{
+ int o,s,z,a,c,p,flags_in;
+ for (o = 0; o < 2; o++) {
+ for (s = 0; s < 2; s++) {
+ for (z = 0; z < 2; z++) {
+ for (a = 0; a < 2; a++) {
+ for (c = 0; c < 2; c++) {
+ for (p = 0; p < 2; p++) {
+
+ flags_in = (o ? CC_O : 0)
+ | (s ? CC_S : 0)
+ | (z ? CC_Z : 0)
+ | (a ? CC_A : 0)
+ | (c ? CC_C : 0)
+ | (p ? CC_P : 0);
+
+ exec_opl(s2, s0, s1, flags_in);
+#ifdef OP_SHIFTD
+ if (s1 <= 15)
+ exec_opw(s2, s0, s1, flags_in);
+#else
+ exec_opw(s2, s0, s1, flags_in);
+#endif
+#ifndef OP_NOBYTE
+ exec_opb(s0, s1, flags_in);
+#endif
+#ifdef OP_CC
+ exec_opl(s2, s0, s1, flags_in);
+ exec_opw(s2, s0, s1, flags_in);
+ exec_opb(s0, s1, flags_in);
+#endif
+
+ }}}}}}
+
+}
+
+void glue(test_, OP)(void)
+{
+ int i;
+ for(i = 0; i < 32; i++)
+ exec_op(0x21ad3d34, 0x12345678, i);
+ for(i = 0; i < 32; i++)
+ exec_op(0x813f3421, 0x82345678, i);
+}
+
+void *glue(_test_, OP) __init_call = glue(test_, OP);
+
+#undef OP
+#undef OP_CC
+#undef OP_SHIFTD
+#undef OP_NOBYTE
+#undef EXECSHIFT
+
diff --git a/main/VEX/test/test-i386.c b/main/VEX/test/test-i386.c
new file mode 100644
index 0000000..cd47930
--- /dev/null
+++ b/main/VEX/test/test-i386.c
@@ -0,0 +1,1668 @@
+/*
+ * x86 CPU test
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#define _GNU_SOURCE
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <inttypes.h>
+#include <math.h>
+#include <signal.h>
+#include <setjmp.h>
+#include <errno.h>
+#include <sys/ucontext.h>
+#include <sys/mman.h>
+#include <asm/vm86.h>
+
+/* Setting this to 1 creates a very comprehensive test of
+ integer condition codes. */
+#define TEST_INTEGER_VERBOSE 1
+
+
+//#define LINUX_VM86_IOPL_FIX
+//#define TEST_P4_FLAGS
+
+#define xglue(x, y) x ## y
+#define glue(x, y) xglue(x, y)
+#define stringify(s) tostring(s)
+#define tostring(s) #s
+
+#define CC_C 0x0001
+#define CC_P 0x0004
+#define CC_A 0x0010
+#define CC_Z 0x0040
+#define CC_S 0x0080
+#define CC_O 0x0800
+
+#define __init_call __attribute__ ((unused,__section__ (".initcall.init")))
+
+static void *call_start __init_call = NULL;
+
+#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
+
+#define OP add
+#include "test-i386.h"
+
+#define OP sub
+#include "test-i386.h"
+
+#define OP xor
+#include "test-i386.h"
+
+#define OP and
+#include "test-i386.h"
+
+#define OP or
+#include "test-i386.h"
+
+#define OP cmp
+#include "test-i386.h"
+
+#define OP adc
+#define OP_CC
+#include "test-i386.h"
+
+#define OP sbb
+#define OP_CC
+#include "test-i386.h"
+
+#define OP inc
+#define OP_CC
+#define OP1
+#include "test-i386.h"
+
+#define OP dec
+#define OP_CC
+#define OP1
+#include "test-i386.h"
+
+#define OP neg
+#define OP_CC
+#define OP1
+#include "test-i386.h"
+
+#define OP not
+#define OP_CC
+#define OP1
+#include "test-i386.h"
+
+#undef CC_MASK
+#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
+
+#define OP shl
+#include "test-i386-shift.h"
+
+#define OP shr
+#include "test-i386-shift.h"
+
+#define OP sar
+#include "test-i386-shift.h"
+
+#define OP rol
+#include "test-i386-shift.h"
+
+#define OP ror
+#include "test-i386-shift.h"
+
+#define OP rcr
+#define OP_CC
+#include "test-i386-shift.h"
+
+#define OP rcl
+#define OP_CC
+#include "test-i386-shift.h"
+
+#define OP shld
+#define OP_SHIFTD
+#define OP_NOBYTE
+#include "test-i386-shift.h"
+
+#define OP shrd
+#define OP_SHIFTD
+#define OP_NOBYTE
+#include "test-i386-shift.h"
+
+
+/* XXX: should be more precise ? */
+#undef CC_MASK
+#define CC_MASK (CC_C)
+
+#define OP bt
+#define OP_NOBYTE
+#include "test-i386-shift.h"
+
+#define OP bts
+#define OP_NOBYTE
+#include "test-i386-shift.h"
+
+#define OP btr
+#define OP_NOBYTE
+#include "test-i386-shift.h"
+
+#define OP btc
+#define OP_NOBYTE
+#include "test-i386-shift.h"
+
+
+/* lea test (modrm support) */
+#define TEST_LEA(STR)\
+{\
+ asm("leal " STR ", %0"\
+ : "=r" (res)\
+ : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
+ printf("lea %s = %08x\n", STR, res);\
+}
+
+#define TEST_LEA16(STR)\
+{\
+ asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
+ : "=wq" (res)\
+ : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
+ printf("lea %s = %08x\n", STR, res);\
+}
+
+
+void test_lea(void)
+{
+ int eax, ebx, ecx, edx, esi, edi, res;
+ eax = 0x0001;
+ ebx = 0x0002;
+ ecx = 0x0004;
+ edx = 0x0008;
+ esi = 0x0010;
+ edi = 0x0020;
+
+ TEST_LEA("0x4000");
+
+ TEST_LEA("(%%eax)");
+ TEST_LEA("(%%ebx)");
+ TEST_LEA("(%%ecx)");
+ TEST_LEA("(%%edx)");
+ TEST_LEA("(%%esi)");
+ TEST_LEA("(%%edi)");
+
+ TEST_LEA("0x40(%%eax)");
+ TEST_LEA("0x40(%%ebx)");
+ TEST_LEA("0x40(%%ecx)");
+ TEST_LEA("0x40(%%edx)");
+ TEST_LEA("0x40(%%esi)");
+ TEST_LEA("0x40(%%edi)");
+
+ TEST_LEA("0x4000(%%eax)");
+ TEST_LEA("0x4000(%%ebx)");
+ TEST_LEA("0x4000(%%ecx)");
+ TEST_LEA("0x4000(%%edx)");
+ TEST_LEA("0x4000(%%esi)");
+ TEST_LEA("0x4000(%%edi)");
+
+ TEST_LEA("(%%eax, %%ecx)");
+ TEST_LEA("(%%ebx, %%edx)");
+ TEST_LEA("(%%ecx, %%ecx)");
+ TEST_LEA("(%%edx, %%ecx)");
+ TEST_LEA("(%%esi, %%ecx)");
+ TEST_LEA("(%%edi, %%ecx)");
+
+ TEST_LEA("0x40(%%eax, %%ecx)");
+ TEST_LEA("0x4000(%%ebx, %%edx)");
+
+ TEST_LEA("(%%ecx, %%ecx, 2)");
+ TEST_LEA("(%%edx, %%ecx, 4)");
+ TEST_LEA("(%%esi, %%ecx, 8)");
+
+ TEST_LEA("(,%%eax, 2)");
+ TEST_LEA("(,%%ebx, 4)");
+ TEST_LEA("(,%%ecx, 8)");
+
+ TEST_LEA("0x40(,%%eax, 2)");
+ TEST_LEA("0x40(,%%ebx, 4)");
+ TEST_LEA("0x40(,%%ecx, 8)");
+
+
+ TEST_LEA("-10(%%ecx, %%ecx, 2)");
+ TEST_LEA("-10(%%edx, %%ecx, 4)");
+ TEST_LEA("-10(%%esi, %%ecx, 8)");
+
+ TEST_LEA("0x4000(%%ecx, %%ecx, 2)");
+ TEST_LEA("0x4000(%%edx, %%ecx, 4)");
+ TEST_LEA("0x4000(%%esi, %%ecx, 8)");
+}
+
+#define TEST_JCC(JCC, v1, v2)\
+{\
+ int res;\
+ asm("movl $1, %0\n\t"\
+ "cmpl %2, %1\n\t"\
+ "j" JCC " 1f\n\t"\
+ "movl $0, %0\n\t"\
+ "1:\n\t"\
+ : "=r" (res)\
+ : "r" (v1), "r" (v2));\
+ printf("%-10s %d\n", "j" JCC, res);\
+\
+ asm("movl $0, %0\n\t"\
+ "cmpl %2, %1\n\t"\
+ "set" JCC " %b0\n\t"\
+ : "=r" (res)\
+ : "r" (v1), "r" (v2));\
+ printf("%-10s %d\n", "set" JCC, res);\
+ { int one = 1; \
+ asm("movl $0x12345678, %0\n\t"\
+ "cmpl %2, %1\n\t"\
+ "cmov" JCC "l %3, %0\n\t"\
+ : "=r" (res)\
+ : "r" (v1), "r" (v2), "m" (one));\
+ printf("%-10s R=0x%08x\n", "cmov" JCC "l", res);\
+ asm("movl $0x12345678, %0\n\t"\
+ "cmpl %2, %1\n\t"\
+ "cmov" JCC "w %w3, %w0\n\t"\
+ : "=r" (res)\
+ : "r" (v1), "r" (v2), "r" (1));\
+ printf("%-10s R=0x%08x\n", "cmov" JCC "w", res);\
+ } \
+}
+
+/* various jump tests */
+void test_jcc(void)
+{
+ TEST_JCC("ne", 1, 1);
+ TEST_JCC("ne", 1, 0);
+
+ TEST_JCC("e", 1, 1);
+ TEST_JCC("e", 1, 0);
+
+ TEST_JCC("l", 1, 1);
+ TEST_JCC("l", 1, 0);
+ TEST_JCC("l", 1, -1);
+
+ TEST_JCC("le", 1, 1);
+ TEST_JCC("le", 1, 0);
+ TEST_JCC("le", 1, -1);
+
+ TEST_JCC("ge", 1, 1);
+ TEST_JCC("ge", 1, 0);
+ TEST_JCC("ge", -1, 1);
+
+ TEST_JCC("g", 1, 1);
+ TEST_JCC("g", 1, 0);
+ TEST_JCC("g", 1, -1);
+
+ TEST_JCC("b", 1, 1);
+ TEST_JCC("b", 1, 0);
+ TEST_JCC("b", 1, -1);
+
+ TEST_JCC("be", 1, 1);
+ TEST_JCC("be", 1, 0);
+ TEST_JCC("be", 1, -1);
+
+ TEST_JCC("ae", 1, 1);
+ TEST_JCC("ae", 1, 0);
+ TEST_JCC("ae", 1, -1);
+
+ TEST_JCC("a", 1, 1);
+ TEST_JCC("a", 1, 0);
+ TEST_JCC("a", 1, -1);
+
+
+ TEST_JCC("p", 1, 1);
+ TEST_JCC("p", 1, 0);
+
+ TEST_JCC("np", 1, 1);
+ TEST_JCC("np", 1, 0);
+
+ TEST_JCC("o", 0x7fffffff, 0);
+ TEST_JCC("o", 0x7fffffff, -1);
+
+ TEST_JCC("no", 0x7fffffff, 0);
+ TEST_JCC("no", 0x7fffffff, -1);
+
+ TEST_JCC("s", 0, 1);
+ TEST_JCC("s", 0, -1);
+ TEST_JCC("s", 0, 0);
+
+ TEST_JCC("ns", 0, 1);
+ TEST_JCC("ns", 0, -1);
+ TEST_JCC("ns", 0, 0);
+}
+
+#undef CC_MASK
+#ifdef TEST_P4_FLAGS
+#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
+#else
+#define CC_MASK (CC_O | CC_C)
+#endif
+
+#define OP mul
+#include "test-i386-muldiv.h"
+
+#define OP imul
+#include "test-i386-muldiv.h"
+
+void test_imulw2(int op0, int op1)
+{
+ int res, s1, s0, flags;
+ s0 = op0;
+ s1 = op1;
+ res = s0;
+ flags = 0;
+ asm ("push %4\n\t"
+ "popf\n\t"
+ "imulw %w2, %w0\n\t"
+ "pushf\n\t"
+ "popl %1\n\t"
+ : "=q" (res), "=g" (flags)
+ : "q" (s1), "0" (res), "1" (flags));
+ printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
+ "imulw", s0, s1, res, flags & CC_MASK);
+}
+
+void test_imull2(int op0, int op1)
+{
+ int res, s1, s0, flags;
+ s0 = op0;
+ s1 = op1;
+ res = s0;
+ flags = 0;
+ asm ("push %4\n\t"
+ "popf\n\t"
+ "imull %2, %0\n\t"
+ "pushf\n\t"
+ "popl %1\n\t"
+ : "=q" (res), "=g" (flags)
+ : "q" (s1), "0" (res), "1" (flags));
+ printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
+ "imull", s0, s1, res, flags & CC_MASK);
+}
+
+#define TEST_IMUL_IM(size, size1, op0, op1)\
+{\
+ int res, flags;\
+ flags = 0;\
+ res = 0;\
+ asm ("push %3\n\t"\
+ "popf\n\t"\
+ "imul" size " $" #op0 ", %" size1 "2, %" size1 "0\n\t" \
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=r" (res), "=g" (flags)\
+ : "r" (op1), "1" (flags), "0" (res));\
+ printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",\
+ "imul" size, op0, op1, res, flags & CC_MASK);\
+}
+
+
+#undef CC_MASK
+#define CC_MASK (0)
+
+#define OP div
+#include "test-i386-muldiv.h"
+
+#define OP idiv
+#include "test-i386-muldiv.h"
+
+void test_mul(void)
+{
+ test_imulb(0x1234561d, 4);
+ test_imulb(3, -4);
+ test_imulb(0x80, 0x80);
+ test_imulb(0x10, 0x10);
+
+ test_imulw(0, 0, 0);
+ test_imulw(0, 0xFF, 0xFF);
+ test_imulw(0, 0xFF, 0x100);
+ test_imulw(0, 0x1234001d, 45);
+ test_imulw(0, 23, -45);
+ test_imulw(0, 0x8000, 0x8000);
+ test_imulw(0, 0x100, 0x100);
+
+ test_imull(0, 0, 0);
+ test_imull(0, 0xFFFF, 0xFFFF);
+ test_imull(0, 0xFFFF, 0x10000);
+ test_imull(0, 0x1234001d, 45);
+ test_imull(0, 23, -45);
+ test_imull(0, 0x80000000, 0x80000000);
+ test_imull(0, 0x10000, 0x10000);
+
+ test_mulb(0x1234561d, 4);
+ test_mulb(3, -4);
+ test_mulb(0x80, 0x80);
+ test_mulb(0x10, 0x10);
+
+ test_mulw(0, 0x1234001d, 45);
+ test_mulw(0, 23, -45);
+ test_mulw(0, 0x8000, 0x8000);
+ test_mulw(0, 0x100, 0x100);
+
+ test_mull(0, 0x1234001d, 45);
+ test_mull(0, 23, -45);
+ test_mull(0, 0x80000000, 0x80000000);
+ test_mull(0, 0x10000, 0x10000);
+
+ test_imulw2(0x1234001d, 45);
+ test_imulw2(23, -45);
+ test_imulw2(0x8000, 0x8000);
+ test_imulw2(0x100, 0x100);
+
+ test_imull2(0x1234001d, 45);
+ test_imull2(23, -45);
+ test_imull2(0x80000000, 0x80000000);
+ test_imull2(0x10000, 0x10000);
+
+ TEST_IMUL_IM("w", "w", 45, 0x1234);
+ TEST_IMUL_IM("w", "w", -45, 23);
+ TEST_IMUL_IM("w", "w", 0x8000, 0x80000000);
+ TEST_IMUL_IM("w", "w", 0x7fff, 0x1000);
+
+ TEST_IMUL_IM("l", "", 45, 0x1234);
+ TEST_IMUL_IM("l", "", -45, 23);
+ TEST_IMUL_IM("l", "", 0x8000, 0x80000000);
+ TEST_IMUL_IM("l", "", 0x7fff, 0x1000);
+
+ test_idivb(0x12341678, 0x127e);
+ test_idivb(0x43210123, -5);
+ test_idivb(0x12340004, -1);
+
+ test_idivw(0, 0x12345678, 12347);
+ test_idivw(0, -23223, -45);
+ test_idivw(0, 0x12348000, -1);
+ test_idivw(0x12343, 0x12345678, 0x81238567);
+
+ test_idivl(0, 0x12345678, 12347);
+ test_idivl(0, -233223, -45);
+ test_idivl(0, 0x80000000, -1);
+ test_idivl(0x12343, 0x12345678, 0x81234567);
+
+ test_divb(0x12341678, 0x127e);
+ test_divb(0x43210123, -5);
+ test_divb(0x12340004, -1);
+
+ test_divw(0, 0x12345678, 12347);
+ test_divw(0, -23223, -45);
+ test_divw(0, 0x12348000, -1);
+ test_divw(0x12343, 0x12345678, 0x81238567);
+
+ test_divl(0, 0x12345678, 12347);
+ test_divl(0, -233223, -45);
+ test_divl(0, 0x80000000, -1);
+ test_divl(0x12343, 0x12345678, 0x81234567);
+}
+
+#define TEST_BSX(op, size, op0)\
+{\
+ int res, val, resz;\
+ val = op0;\
+ asm("xorl %1, %1\n\t"\
+ "movl $0x12345678, %0\n\t"\
+ #op " %" size "2, %" size "0\n\t" \
+ "setz %b1" \
+ : "=r" (res), "=q" (resz)\
+ : "r" (val));\
+ printf("%-10s A=%08x R=%08x %d\n", #op, val, res, resz);\
+}
+
+void test_bsx(void)
+{
+ TEST_BSX(bsrw, "w", 0);
+ TEST_BSX(bsrw, "w", 0x12340128);
+ TEST_BSX(bsrl, "", 0);
+ TEST_BSX(bsrl, "", 0x00340128);
+ TEST_BSX(bsfw, "w", 0);
+ TEST_BSX(bsfw, "w", 0x12340128);
+ TEST_BSX(bsfl, "", 0);
+ TEST_BSX(bsfl, "", 0x00340128);
+}
+
+/**********************************************/
+
+void test_fops(double a, double b)
+{
+ printf("a=%f b=%f a+b=%f\n", a, b, a + b);
+ printf("a=%f b=%f a-b=%f\n", a, b, a - b);
+ printf("a=%f b=%f a*b=%f\n", a, b, a * b);
+ printf("a=%f b=%f a/b=%f\n", a, b, a / b);
+ printf("a=%f b=%f fmod(a, b)=%f\n", a, b, fmod(a, b));
+ printf("a=%f sqrt(a)=%f\n", a, sqrt(a));
+ printf("a=%f sin(a)=%f\n", a, sin(a));
+ printf("a=%f cos(a)=%f\n", a, cos(a));
+ printf("a=%f tan(a)=%f\n", a, tan(a));
+ printf("a=%f log(a)=%f\n", a, log(a));
+ printf("a=%f exp(a)=%f\n", a, exp(a));
+ printf("a=%f b=%f atan2(a, b)=%f\n", a, b, atan2(a, b));
+ /* just to test some op combining */
+ printf("a=%f asin(sin(a))=%f\n", a, asin(sin(a)));
+ printf("a=%f acos(cos(a))=%f\n", a, acos(cos(a)));
+ printf("a=%f atan(tan(a))=%f\n", a, atan(tan(a)));
+}
+
+void test_fcmp(double a, double b)
+{
+ printf("(%f<%f)=%d\n",
+ a, b, a < b);
+ printf("(%f<=%f)=%d\n",
+ a, b, a <= b);
+ printf("(%f==%f)=%d\n",
+ a, b, a == b);
+ printf("(%f>%f)=%d\n",
+ a, b, a > b);
+ printf("(%f<=%f)=%d\n",
+ a, b, a >= b);
+ {
+ unsigned int eflags;
+ /* test f(u)comi instruction */
+ asm("fcomi %2, %1\n"
+ "pushf\n"
+ "pop %0\n"
+ : "=r" (eflags)
+ : "t" (a), "u" (b));
+ printf("fcomi(%f %f)=%08x\n", a, b, eflags & (CC_Z | CC_P | CC_C));
+ }
+}
+
+void test_fcvt(double a)
+{
+ float fa;
+ long double la;
+ int16_t fpuc;
+ int i;
+ int64_t lla;
+ int ia;
+ int16_t wa;
+ double ra;
+
+ fa = a;
+ la = a;
+ printf("(float)%f = %f\n", a, fa);
+ printf("(long double)%f = %Lf\n", a, la);
+ printf("a=%016Lx\n", *(long long *)&a);
+ printf("la=%016Lx %04x\n", *(long long *)&la,
+ *(unsigned short *)((char *)(&la) + 8));
+
+ /* test all roundings */
+ asm volatile ("fstcw %0" : "=m" (fpuc));
+ for(i=0;i<4;i++) {
+ int16_t tmp = (fpuc & ~0x0c00) | (i << 10);
+ asm volatile ("fldcw %0" : : "m" (tmp));
+ asm volatile ("fist %0" : "=m" (wa) : "t" (a));
+ asm volatile ("fistl %0" : "=m" (ia) : "t" (a));
+ asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st");
+ asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a));
+ asm volatile ("fldcw %0" : : "m" (fpuc));
+ printf("(short)a = %d\n", wa);
+ printf("(int)a = %d\n", ia);
+ printf("(int64_t)a = %Ld\n", lla);
+ printf("rint(a) = %f\n", ra);
+ }
+}
+
+#define TEST(N) \
+ asm("fld" #N : "=t" (a)); \
+ printf("fld" #N "= %f\n", a);
+
+void test_fconst(void)
+{
+ double a;
+ TEST(1);
+ TEST(l2t);
+ TEST(l2e);
+ TEST(pi);
+ TEST(lg2);
+ TEST(ln2);
+ TEST(z);
+}
+
+void test_fbcd(double a)
+{
+ unsigned short bcd[5];
+ double b;
+
+ asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st");
+ asm("fbld %1" : "=t" (b) : "m" (bcd[0]));
+ printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n",
+ a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b);
+}
+
+#define TEST_ENV(env, save, restore)\
+{\
+ memset((env), 0xaa, sizeof(*(env)));\
+ for(i=0;i<5;i++)\
+ asm volatile ("fldl %0" : : "m" (dtab[i]));\
+ asm(save " %0\n" : : "m" (*(env)));\
+ asm(restore " %0\n": : "m" (*(env)));\
+ for(i=0;i<5;i++)\
+ asm volatile ("fstpl %0" : "=m" (rtab[i]));\
+ for(i=0;i<5;i++)\
+ printf("res[%d]=%f\n", i, rtab[i]);\
+ printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
+ (env)->fpuc,\
+ (env)->fpus & 0xff00,\
+ (env)->fptag);\
+}
+
+void test_fenv(void)
+{
+ struct __attribute__((packed)) {
+ uint16_t fpuc;
+ uint16_t dummy1;
+ uint16_t fpus;
+ uint16_t dummy2;
+ uint16_t fptag;
+ uint16_t dummy3;
+ uint32_t ignored[4];
+ long double fpregs[8];
+ } float_env32;
+ struct __attribute__((packed)) {
+ uint16_t fpuc;
+ uint16_t fpus;
+ uint16_t fptag;
+ uint16_t ignored[4];
+ long double fpregs[8];
+ } float_env16;
+ double dtab[8];
+ double rtab[8];
+ int i;
+
+ for(i=0;i<8;i++)
+ dtab[i] = i + 1;
+
+ TEST_ENV(&float_env16, "data16 fnstenv", "data16 fldenv");
+ TEST_ENV(&float_env16, "data16 fnsave", "data16 frstor");
+ TEST_ENV(&float_env32, "fnstenv", "fldenv");
+ TEST_ENV(&float_env32, "fnsave", "frstor");
+
+ /* test for ffree */
+ for(i=0;i<5;i++)
+ asm volatile ("fldl %0" : : "m" (dtab[i]));
+ asm volatile("ffree %st(2)");
+ asm volatile ("fnstenv %0\n" : : "m" (float_env32));
+ asm volatile ("fninit");
+ printf("fptag=%04x\n", float_env32.fptag);
+}
+
+
+#define TEST_FCMOV(a, b, eflags, CC)\
+{\
+ double res;\
+ asm("push %3\n"\
+ "popf\n"\
+ "fcmov" CC " %2, %0\n"\
+ : "=t" (res)\
+ : "0" (a), "u" (b), "g" (eflags));\
+ printf("fcmov%s eflags=0x%04x-> %f\n", \
+ CC, eflags, res);\
+}
+
+void test_fcmov(void)
+{
+ double a, b;
+ int eflags, i;
+
+ a = 1.0;
+ b = 2.0;
+ for(i = 0; i < 4; i++) {
+ eflags = 0;
+ if (i & 1)
+ eflags |= CC_C;
+ if (i & 2)
+ eflags |= CC_Z;
+ TEST_FCMOV(a, b, eflags, "b");
+ TEST_FCMOV(a, b, eflags, "e");
+ TEST_FCMOV(a, b, eflags, "be");
+ TEST_FCMOV(a, b, eflags, "nb");
+ TEST_FCMOV(a, b, eflags, "ne");
+ TEST_FCMOV(a, b, eflags, "nbe");
+ }
+ TEST_FCMOV(a, b, 0, "u");
+ TEST_FCMOV(a, b, CC_P, "u");
+ TEST_FCMOV(a, b, 0, "nu");
+ TEST_FCMOV(a, b, CC_P, "nu");
+}
+
+void test_floats(void)
+{
+ test_fops(2, 3);
+ test_fops(1.4, -5);
+ test_fcmp(2, -1);
+ test_fcmp(2, 2);
+ test_fcmp(2, 3);
+ test_fcvt(0.5);
+ test_fcvt(-0.5);
+ test_fcvt(1.0/7.0);
+ test_fcvt(-1.0/9.0);
+ test_fcvt(32768);
+ test_fcvt(-1e20);
+ test_fconst();
+ // REINSTATE (maybe): test_fbcd(1234567890123456);
+ // REINSTATE (maybe): test_fbcd(-123451234567890);
+ // REINSTATE: test_fenv();
+ // REINSTATE: test_fcmov();
+}
+
+/**********************************************/
+#if 0
+
+#define TEST_BCD(op, op0, cc_in, cc_mask)\
+{\
+ int res, flags;\
+ res = op0;\
+ flags = cc_in;\
+ asm ("push %3\n\t"\
+ "popf\n\t"\
+ #op "\n\t"\
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=a" (res), "=g" (flags)\
+ : "0" (res), "1" (flags));\
+ printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
+ #op, op0, res, cc_in, flags & cc_mask);\
+}
+
+void test_bcd(void)
+{
+ TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(daa, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+
+ TEST_BCD(das, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+ TEST_BCD(das, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
+
+ TEST_BCD(aaa, 0x12340205, CC_A, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x12340306, CC_A, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x1234040a, CC_A, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x123405fa, CC_A, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x12340205, 0, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
+ TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
+
+ TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
+ TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
+ TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
+ TEST_BCD(aas, 0x123405fa, CC_A, (CC_C | CC_A));
+ TEST_BCD(aas, 0x12340205, 0, (CC_C | CC_A));
+ TEST_BCD(aas, 0x12340306, 0, (CC_C | CC_A));
+ TEST_BCD(aas, 0x1234040a, 0, (CC_C | CC_A));
+ TEST_BCD(aas, 0x123405fa, 0, (CC_C | CC_A));
+
+ TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
+ TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
+}
+#endif /* 0 */
+
+#define TEST_XCHG(op, size, opconst)\
+{\
+ int op0, op1;\
+ op0 = 0x12345678;\
+ op1 = 0xfbca7654;\
+ asm(#op " %" size "0, %" size "1" \
+ : "=q" (op0), opconst (op1) \
+ : "0" (op0), "1" (op1));\
+ printf("%-10s A=%08x B=%08x\n",\
+ #op, op0, op1);\
+}
+
+#define TEST_CMPXCHG(op, size, opconst, eax)\
+{\
+ int op0, op1;\
+ op0 = 0x12345678;\
+ op1 = 0xfbca7654;\
+ asm(#op " %" size "0, %" size "1" \
+ : "=q" (op0), opconst (op1) \
+ : "0" (op0), "1" (op1), "a" (eax));\
+ printf("%-10s EAX=%08x A=%08x C=%08x\n",\
+ #op, eax, op0, op1);\
+}
+
+void test_xchg(void)
+{
+ TEST_XCHG(xchgl, "", "=q");
+ TEST_XCHG(xchgw, "w", "=q");
+ TEST_XCHG(xchgb, "b", "=q");
+
+ TEST_XCHG(xchgl, "", "=m");
+ TEST_XCHG(xchgw, "w", "=m");
+ TEST_XCHG(xchgb, "b", "=m");
+
+#if 0
+ TEST_XCHG(xaddl, "", "=q");
+ TEST_XCHG(xaddw, "w", "=q");
+ TEST_XCHG(xaddb, "b", "=q");
+
+ {
+ int res;
+ res = 0x12345678;
+ asm("xaddl %1, %0" : "=r" (res) : "0" (res));
+ printf("xaddl same res=%08x\n", res);
+ }
+
+ TEST_XCHG(xaddl, "", "=m");
+ TEST_XCHG(xaddw, "w", "=m");
+ TEST_XCHG(xaddb, "b", "=m");
+#endif
+ TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfbca7654);
+ TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654);
+ TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654);
+
+ TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfffefdfc);
+ TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc);
+ TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc);
+
+ TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfbca7654);
+ TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654);
+ TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654);
+
+ TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfffefdfc);
+ TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc);
+ TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc);
+#if 0
+ {
+ uint64_t op0, op1, op2;
+ int i, eflags;
+
+ for(i = 0; i < 2; i++) {
+ op0 = 0x123456789abcd;
+ if (i == 0)
+ op1 = 0xfbca765423456;
+ else
+ op1 = op0;
+ op2 = 0x6532432432434;
+ asm("cmpxchg8b %1\n"
+ "pushf\n"
+ "popl %2\n"
+ : "=A" (op0), "=m" (op1), "=g" (eflags)
+ : "0" (op0), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
+ printf("cmpxchg8b: op0=%016llx op1=%016llx CC=%02x\n",
+ op0, op1, eflags & CC_Z);
+ }
+ }
+#endif
+}
+
+/**********************************************/
+/* segmentation tests */
+#if 0
+#include <asm/ldt.h>
+#include <linux/unistd.h>
+#include <linux/version.h>
+
+_syscall3(int, modify_ldt, int, func, void *, ptr, unsigned long, bytecount)
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 66)
+#define modify_ldt_ldt_s user_desc
+#endif
+
+uint8_t seg_data1[4096];
+uint8_t seg_data2[4096];
+
+#define MK_SEL(n) (((n) << 3) | 7)
+
+#define TEST_LR(op, size, seg, mask)\
+{\
+ int res, res2;\
+ res = 0x12345678;\
+ asm (op " %" size "2, %" size "0\n" \
+ "movl $0, %1\n"\
+ "jnz 1f\n"\
+ "movl $1, %1\n"\
+ "1:\n"\
+ : "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\
+ printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
+}
+
+/* NOTE: we use Linux modify_ldt syscall */
+void test_segs(void)
+{
+ struct modify_ldt_ldt_s ldt;
+ long long ldt_table[3];
+ int res, res2;
+ char tmp;
+ struct {
+ uint32_t offset;
+ uint16_t seg;
+ } __attribute__((packed)) segoff;
+
+ ldt.entry_number = 1;
+ ldt.base_addr = (unsigned long)&seg_data1;
+ ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
+ ldt.seg_32bit = 1;
+ ldt.contents = MODIFY_LDT_CONTENTS_DATA;
+ ldt.read_exec_only = 0;
+ ldt.limit_in_pages = 1;
+ ldt.seg_not_present = 0;
+ ldt.useable = 1;
+ modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
+
+ ldt.entry_number = 2;
+ ldt.base_addr = (unsigned long)&seg_data2;
+ ldt.limit = (sizeof(seg_data2) + 0xfff) >> 12;
+ ldt.seg_32bit = 1;
+ ldt.contents = MODIFY_LDT_CONTENTS_DATA;
+ ldt.read_exec_only = 0;
+ ldt.limit_in_pages = 1;
+ ldt.seg_not_present = 0;
+ ldt.useable = 1;
+ modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
+
+ modify_ldt(0, &ldt_table, sizeof(ldt_table)); /* read ldt entries */
+#if 0
+ {
+ int i;
+ for(i=0;i<3;i++)
+ printf("%d: %016Lx\n", i, ldt_table[i]);
+ }
+#endif
+ /* do some tests with fs or gs */
+ asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
+
+ seg_data1[1] = 0xaa;
+ seg_data2[1] = 0x55;
+
+ asm volatile ("fs movzbl 0x1, %0" : "=r" (res));
+ printf("FS[1] = %02x\n", res);
+
+ asm volatile ("pushl %%gs\n"
+ "movl %1, %%gs\n"
+ "gs movzbl 0x1, %0\n"
+ "popl %%gs\n"
+ : "=r" (res)
+ : "r" (MK_SEL(2)));
+ printf("GS[1] = %02x\n", res);
+
+ /* tests with ds/ss (implicit segment case) */
+ tmp = 0xa5;
+ asm volatile ("pushl %%ebp\n\t"
+ "pushl %%ds\n\t"
+ "movl %2, %%ds\n\t"
+ "movl %3, %%ebp\n\t"
+ "movzbl 0x1, %0\n\t"
+ "movzbl (%%ebp), %1\n\t"
+ "popl %%ds\n\t"
+ "popl %%ebp\n\t"
+ : "=r" (res), "=r" (res2)
+ : "r" (MK_SEL(1)), "r" (&tmp));
+ printf("DS[1] = %02x\n", res);
+ printf("SS[tmp] = %02x\n", res2);
+
+ segoff.seg = MK_SEL(2);
+ segoff.offset = 0xabcdef12;
+ asm volatile("lfs %2, %0\n\t"
+ "movl %%fs, %1\n\t"
+ : "=r" (res), "=g" (res2)
+ : "m" (segoff));
+ printf("FS:reg = %04x:%08x\n", res2, res);
+
+ TEST_LR("larw", "w", MK_SEL(2), 0x0100);
+ TEST_LR("larl", "", MK_SEL(2), 0x0100);
+ TEST_LR("lslw", "w", MK_SEL(2), 0);
+ TEST_LR("lsll", "", MK_SEL(2), 0);
+
+ TEST_LR("larw", "w", 0xfff8, 0);
+ TEST_LR("larl", "", 0xfff8, 0);
+ TEST_LR("lslw", "w", 0xfff8, 0);
+ TEST_LR("lsll", "", 0xfff8, 0);
+}
+#endif
+
+#if 0
+/* 16 bit code test */
+extern char code16_start, code16_end;
+extern char code16_func1;
+extern char code16_func2;
+extern char code16_func3;
+
+void test_code16(void)
+{
+ struct modify_ldt_ldt_s ldt;
+ int res, res2;
+
+ /* build a code segment */
+ ldt.entry_number = 1;
+ ldt.base_addr = (unsigned long)&code16_start;
+ ldt.limit = &code16_end - &code16_start;
+ ldt.seg_32bit = 0;
+ ldt.contents = MODIFY_LDT_CONTENTS_CODE;
+ ldt.read_exec_only = 0;
+ ldt.limit_in_pages = 0;
+ ldt.seg_not_present = 0;
+ ldt.useable = 1;
+ modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
+
+ /* call the first function */
+ asm volatile ("lcall %1, %2"
+ : "=a" (res)
+ : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
+ printf("func1() = 0x%08x\n", res);
+ asm volatile ("lcall %2, %3"
+ : "=a" (res), "=c" (res2)
+ : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
+ printf("func2() = 0x%08x spdec=%d\n", res, res2);
+ asm volatile ("lcall %1, %2"
+ : "=a" (res)
+ : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
+ printf("func3() = 0x%08x\n", res);
+}
+#endif
+
+extern char func_lret32;
+extern char func_iret32;
+
+void test_misc(void)
+{
+ char table[256];
+ int res, i;
+
+#if 0
+ // REINSTATE
+ for(i=0;i<256;i++) table[i] = 256 - i;
+ res = 0x12345678;
+ asm ("xlat" : "=a" (res) : "b" (table), "0" (res));
+ printf("xlat: EAX=%08x\n", res);
+#endif
+#if 0
+ // REINSTATE
+ asm volatile ("pushl %%cs ; call %1"
+ : "=a" (res)
+ : "m" (func_lret32): "memory", "cc");
+ printf("func_lret32=%x\n", res);
+
+ asm volatile ("pushfl ; pushl %%cs ; call %1"
+ : "=a" (res)
+ : "m" (func_iret32): "memory", "cc");
+ printf("func_iret32=%x\n", res);
+#endif
+ /* specific popl test */
+ asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0"
+ : "=g" (res));
+ printf("popl esp=%x\n", res);
+#if 0
+ // REINSTATE
+ /* specific popw test */
+ asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0"
+ : "=g" (res));
+ printf("popw esp=%x\n", res);
+#endif
+}
+
+uint8_t str_buffer[4096];
+
+#define TEST_STRING1(OP, size, DF, REP)\
+{\
+ int esi, edi, eax, ecx, eflags;\
+\
+ esi = (long)(str_buffer + sizeof(str_buffer) / 2);\
+ edi = (long)(str_buffer + sizeof(str_buffer) / 2) + 16;\
+ eax = 0x12345678;\
+ ecx = 17;\
+\
+ asm volatile ("pushl $0\n\t"\
+ "popf\n\t"\
+ DF "\n\t"\
+ REP #OP size "\n\t"\
+ "cld\n\t"\
+ "pushf\n\t"\
+ "popl %4\n\t"\
+ : "=S" (esi), "=D" (edi), "=a" (eax), "=c" (ecx), "=g" (eflags)\
+ : "0" (esi), "1" (edi), "2" (eax), "3" (ecx));\
+ printf("%-10s ESI=%08x EDI=%08x EAX=%08x ECX=%08x EFL=%04x\n",\
+ REP #OP size, esi, edi, eax, ecx,\
+ eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
+}
+
+#define TEST_STRING(OP, REP)\
+ TEST_STRING1(OP, "b", "", REP);\
+ TEST_STRING1(OP, "w", "", REP);\
+ TEST_STRING1(OP, "l", "", REP);\
+ TEST_STRING1(OP, "b", "std", REP);\
+ TEST_STRING1(OP, "w", "std", REP);\
+ TEST_STRING1(OP, "l", "std", REP)
+
+void test_string(void)
+{
+ int i;
+ for(i = 0;i < sizeof(str_buffer); i++)
+ str_buffer[i] = i + 0x56;
+ TEST_STRING(stos, "");
+ TEST_STRING(stos, "rep ");
+ // REINSTATE: TEST_STRING(lods, ""); /* to verify stos */
+ // REINSTATE: TEST_STRING(lods, "rep ");
+ TEST_STRING(movs, "");
+ TEST_STRING(movs, "rep ");
+ // REINSTATE: TEST_STRING(lods, ""); /* to verify stos */
+
+ /* XXX: better tests */
+ TEST_STRING(scas, "");
+ // REINSTATE: TEST_STRING(scas, "repz ");
+ TEST_STRING(scas, "repnz ");
+ // REINSTATE: TEST_STRING(cmps, "");
+ TEST_STRING(cmps, "repz ");
+ // REINSTATE: TEST_STRING(cmps, "repnz ");
+}
+
+/* VM86 test */
+#if 0
+static inline void set_bit(uint8_t *a, unsigned int bit)
+{
+ a[bit / 8] |= (1 << (bit % 8));
+}
+
+static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg)
+{
+ return (uint8_t *)((seg << 4) + (reg & 0xffff));
+}
+
+static inline void pushw(struct vm86_regs *r, int val)
+{
+ r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff);
+ *(uint16_t *)seg_to_linear(r->ss, r->esp) = val;
+}
+
+#undef __syscall_return
+#define __syscall_return(type, res) \
+do { \
+ return (type) (res); \
+} while (0)
+
+_syscall2(int, vm86, int, func, struct vm86plus_struct *, v86)
+
+extern char vm86_code_start;
+extern char vm86_code_end;
+
+#define VM86_CODE_CS 0x100
+#define VM86_CODE_IP 0x100
+
+void test_vm86(void)
+{
+ struct vm86plus_struct ctx;
+ struct vm86_regs *r;
+ uint8_t *vm86_mem;
+ int seg, ret;
+
+ vm86_mem = mmap((void *)0x00000000, 0x110000,
+ PROT_WRITE | PROT_READ | PROT_EXEC,
+ MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
+ if (vm86_mem == MAP_FAILED) {
+ printf("ERROR: could not map vm86 memory");
+ return;
+ }
+ memset(&ctx, 0, sizeof(ctx));
+
+ /* init basic registers */
+ r = &ctx.regs;
+ r->eip = VM86_CODE_IP;
+ r->esp = 0xfffe;
+ seg = VM86_CODE_CS;
+ r->cs = seg;
+ r->ss = seg;
+ r->ds = seg;
+ r->es = seg;
+ r->fs = seg;
+ r->gs = seg;
+ r->eflags = VIF_MASK;
+
+ /* move code to proper address. We use the same layout as a .com
+ dos program. */
+ memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP,
+ &vm86_code_start, &vm86_code_end - &vm86_code_start);
+
+ /* mark int 0x21 as being emulated */
+ set_bit((uint8_t *)&ctx.int_revectored, 0x21);
+
+ for(;;) {
+ ret = vm86(VM86_ENTER, &ctx);
+ switch(VM86_TYPE(ret)) {
+ case VM86_INTx:
+ {
+ int int_num, ah, v;
+
+ int_num = VM86_ARG(ret);
+ if (int_num != 0x21)
+ goto unknown_int;
+ ah = (r->eax >> 8) & 0xff;
+ switch(ah) {
+ case 0x00: /* exit */
+ goto the_end;
+ case 0x02: /* write char */
+ {
+ uint8_t c = r->edx;
+ putchar(c);
+ }
+ break;
+ case 0x09: /* write string */
+ {
+ uint8_t c, *ptr;
+ ptr = seg_to_linear(r->ds, r->edx);
+ for(;;) {
+ c = *ptr++;
+ if (c == '$')
+ break;
+ putchar(c);
+ }
+ r->eax = (r->eax & ~0xff) | '$';
+ }
+ break;
+ case 0xff: /* extension: write eflags number in edx */
+ v = (int)r->edx;
+#ifndef LINUX_VM86_IOPL_FIX
+ v &= ~0x3000;
+#endif
+ printf("%08x\n", v);
+ break;
+ default:
+ unknown_int:
+ printf("unsupported int 0x%02x\n", int_num);
+ goto the_end;
+ }
+ }
+ break;
+ case VM86_SIGNAL:
+ /* a signal came, we just ignore that */
+ break;
+ case VM86_STI:
+ break;
+ default:
+ printf("ERROR: unhandled vm86 return code (0x%x)\n", ret);
+ goto the_end;
+ }
+ }
+ the_end:
+ printf("VM86 end\n");
+ munmap(vm86_mem, 0x110000);
+}
+#endif
+
+/* exception tests */
+#if 0
+#ifndef REG_EAX
+#define REG_EAX EAX
+#define REG_EBX EBX
+#define REG_ECX ECX
+#define REG_EDX EDX
+#define REG_ESI ESI
+#define REG_EDI EDI
+#define REG_EBP EBP
+#define REG_ESP ESP
+#define REG_EIP EIP
+#define REG_EFL EFL
+#define REG_TRAPNO TRAPNO
+#define REG_ERR ERR
+#endif
+
+jmp_buf jmp_env;
+int v1;
+int tab[2];
+
+void sig_handler(int sig, siginfo_t *info, void *puc)
+{
+ struct ucontext *uc = puc;
+
+ printf("si_signo=%d si_errno=%d si_code=%d",
+ info->si_signo, info->si_errno, info->si_code);
+ printf(" si_addr=0x%08lx",
+ (unsigned long)info->si_addr);
+ printf("\n");
+
+ printf("trapno=0x%02x err=0x%08x",
+ uc->uc_mcontext.gregs[REG_TRAPNO],
+ uc->uc_mcontext.gregs[REG_ERR]);
+ printf(" EIP=0x%08x", uc->uc_mcontext.gregs[REG_EIP]);
+ printf("\n");
+ longjmp(jmp_env, 1);
+}
+
+void test_exceptions(void)
+{
+ struct modify_ldt_ldt_s ldt;
+ struct sigaction act;
+ volatile int val;
+
+ act.sa_sigaction = sig_handler;
+ sigemptyset(&act.sa_mask);
+ act.sa_flags = SA_SIGINFO;
+ sigaction(SIGFPE, &act, NULL);
+ sigaction(SIGILL, &act, NULL);
+ sigaction(SIGSEGV, &act, NULL);
+ sigaction(SIGBUS, &act, NULL);
+ sigaction(SIGTRAP, &act, NULL);
+
+ /* test division by zero reporting */
+ printf("DIVZ exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* now divide by zero */
+ v1 = 0;
+ v1 = 2 / v1;
+ }
+
+ printf("BOUND exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* bound exception */
+ tab[0] = 1;
+ tab[1] = 10;
+ asm volatile ("bound %0, %1" : : "r" (11), "m" (tab));
+ }
+
+ printf("segment exceptions:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* load an invalid segment */
+ asm volatile ("movl %0, %%fs" : : "r" ((0x1234 << 3) | 1));
+ }
+ if (setjmp(jmp_env) == 0) {
+ /* null data segment is valid */
+ asm volatile ("movl %0, %%fs" : : "r" (3));
+ /* null stack segment */
+ asm volatile ("movl %0, %%ss" : : "r" (3));
+ }
+
+ ldt.entry_number = 1;
+ ldt.base_addr = (unsigned long)&seg_data1;
+ ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
+ ldt.seg_32bit = 1;
+ ldt.contents = MODIFY_LDT_CONTENTS_DATA;
+ ldt.read_exec_only = 0;
+ ldt.limit_in_pages = 1;
+ ldt.seg_not_present = 1;
+ ldt.useable = 1;
+ modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
+
+ if (setjmp(jmp_env) == 0) {
+ /* segment not present */
+ asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
+ }
+
+ /* test SEGV reporting */
+ printf("PF exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ val = 1;
+ /* we add a nop to test a weird PC retrieval case */
+ asm volatile ("nop");
+ /* now store in an invalid address */
+ *(char *)0x1234 = 1;
+ }
+
+ /* test SEGV reporting */
+ printf("PF exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ val = 1;
+ /* read from an invalid address */
+ v1 = *(char *)0x1234;
+ }
+
+ /* test illegal instruction reporting */
+ printf("UD2 exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* now execute an invalid instruction */
+ asm volatile("ud2");
+ }
+ printf("lock nop exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* now execute an invalid instruction */
+ asm volatile("lock nop");
+ }
+
+ printf("INT exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("int $0xfd");
+ }
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("int $0x01");
+ }
+ if (setjmp(jmp_env) == 0) {
+ asm volatile (".byte 0xcd, 0x03");
+ }
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("int $0x04");
+ }
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("int $0x05");
+ }
+
+ printf("INT3 exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("int3");
+ }
+
+ printf("CLI exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("cli");
+ }
+
+ printf("STI exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("cli");
+ }
+
+ printf("INTO exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ /* overflow exception */
+ asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff));
+ }
+
+ printf("OUTB exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("outb %%al, %%dx" : : "d" (0x4321), "a" (0));
+ }
+
+ printf("INB exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("inb %%dx, %%al" : "=a" (val) : "d" (0x4321));
+ }
+
+ printf("REP OUTSB exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("rep outsb" : : "d" (0x4321), "S" (tab), "c" (1));
+ }
+
+ printf("REP INSB exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("rep insb" : : "d" (0x4321), "D" (tab), "c" (1));
+ }
+
+ printf("HLT exception:\n");
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("hlt");
+ }
+
+ printf("single step exception:\n");
+ val = 0;
+ if (setjmp(jmp_env) == 0) {
+ asm volatile ("pushf\n"
+ "orl $0x00100, (%%esp)\n"
+ "popf\n"
+ "movl $0xabcd, %0\n"
+ "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory");
+ }
+ printf("val=0x%x\n", val);
+}
+
+/* specific precise single step test */
+void sig_trap_handler(int sig, siginfo_t *info, void *puc)
+{
+ struct ucontext *uc = puc;
+ printf("EIP=0x%08x\n", uc->uc_mcontext.gregs[REG_EIP]);
+}
+
+const uint8_t sstep_buf1[4] = { 1, 2, 3, 4};
+uint8_t sstep_buf2[4];
+
+void test_single_step(void)
+{
+ struct sigaction act;
+ volatile int val;
+ int i;
+
+ val = 0;
+ act.sa_sigaction = sig_trap_handler;
+ sigemptyset(&act.sa_mask);
+ act.sa_flags = SA_SIGINFO;
+ sigaction(SIGTRAP, &act, NULL);
+ asm volatile ("pushf\n"
+ "orl $0x00100, (%%esp)\n"
+ "popf\n"
+ "movl $0xabcd, %0\n"
+
+ /* jmp test */
+ "movl $3, %%ecx\n"
+ "1:\n"
+ "addl $1, %0\n"
+ "decl %%ecx\n"
+ "jnz 1b\n"
+
+ /* movsb: the single step should stop at each movsb iteration */
+ "movl $sstep_buf1, %%esi\n"
+ "movl $sstep_buf2, %%edi\n"
+ "movl $0, %%ecx\n"
+ "rep movsb\n"
+ "movl $3, %%ecx\n"
+ "rep movsb\n"
+ "movl $1, %%ecx\n"
+ "rep movsb\n"
+
+ /* cmpsb: the single step should stop at each cmpsb iteration */
+ "movl $sstep_buf1, %%esi\n"
+ "movl $sstep_buf2, %%edi\n"
+ "movl $0, %%ecx\n"
+ "rep cmpsb\n"
+ "movl $4, %%ecx\n"
+ "rep cmpsb\n"
+
+ /* getpid() syscall: single step should skip one
+ instruction */
+ "movl $20, %%eax\n"
+ "int $0x80\n"
+ "movl $0, %%eax\n"
+
+ /* when modifying SS, trace is not done on the next
+ instruction */
+ "movl %%ss, %%ecx\n"
+ "movl %%ecx, %%ss\n"
+ "addl $1, %0\n"
+ "movl $1, %%eax\n"
+ "movl %%ecx, %%ss\n"
+ "jmp 1f\n"
+ "addl $1, %0\n"
+ "1:\n"
+ "movl $1, %%eax\n"
+ "pushl %%ecx\n"
+ "popl %%ss\n"
+ "addl $1, %0\n"
+ "movl $1, %%eax\n"
+
+ "pushf\n"
+ "andl $~0x00100, (%%esp)\n"
+ "popf\n"
+ : "=m" (val)
+ :
+ : "cc", "memory", "eax", "ecx", "esi", "edi");
+ printf("val=%d\n", val);
+ for(i = 0; i < 4; i++)
+ printf("sstep_buf2[%d] = %d\n", i, sstep_buf2[i]);
+}
+
+/* self modifying code test */
+uint8_t code[] = {
+ 0xb8, 0x1, 0x00, 0x00, 0x00, /* movl $1, %eax */
+ 0xc3, /* ret */
+};
+
+asm("smc_code2:\n"
+ "movl 4(%esp), %eax\n"
+ "movl %eax, smc_patch_addr2 + 1\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "nop\n"
+ "smc_patch_addr2:\n"
+ "movl $1, %eax\n"
+ "ret\n");
+
+typedef int FuncType(void);
+extern int smc_code2(int);
+void test_self_modifying_code(void)
+{
+ int i;
+
+ printf("self modifying code:\n");
+ printf("func1 = 0x%x\n", ((FuncType *)code)());
+ for(i = 2; i <= 4; i++) {
+ code[1] = i;
+ printf("func%d = 0x%x\n", i, ((FuncType *)code)());
+ }
+
+ /* more difficult test : the modified code is just after the
+ modifying instruction. It is forbidden in Intel specs, but it
+ is used by old DOS programs */
+ for(i = 2; i <= 4; i++) {
+ printf("smc_code2(%d) = %d\n", i, smc_code2(i));
+ }
+}
+
+static void *call_end __init_call = NULL;
+#endif
+
+int main(int argc, char **argv)
+{
+ void **ptr;
+ void (*func)(void);
+
+#if 1
+ ptr = &call_start + 1;
+ while (*ptr != NULL) {
+ func = *ptr++;
+ func();
+ }
+#endif
+ test_bsx();
+ test_mul();
+ test_jcc();
+ test_floats();
+ //test_bcd();
+ test_xchg();
+ test_string();
+ test_misc(); // REINSTATE
+ test_lea();
+ // test_segs();
+ //test_code16();
+ //test_vm86();
+ //test_exceptions();
+ //test_self_modifying_code();
+ //test_single_step();
+ return 0;
+}
diff --git a/main/VEX/test/test-i386.h b/main/VEX/test/test-i386.h
new file mode 100644
index 0000000..4ea12a3
--- /dev/null
+++ b/main/VEX/test/test-i386.h
@@ -0,0 +1,210 @@
+
+#define FULLTXT 1
+
+#define exec_op glue(exec_, OP)
+#define exec_opl glue(glue(exec_, OP), l)
+#define exec_opw glue(glue(exec_, OP), w)
+#define exec_opb glue(glue(exec_, OP), b)
+
+#define EXECOP2(size, res, s1, flags) \
+ asm ("push %4\n\t"\
+ "popf\n\t"\
+ stringify(OP) size " %" size "2, %" size "0\n\t" \
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=q" (res), "=g" (flags)\
+ : "q" (s1), "0" (res), "1" (flags));
+
+#define EXECOP1(size, res, flags) \
+ asm ("push %3\n\t"\
+ "popf\n\t"\
+ stringify(OP) size " %" size "0\n\t" \
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=q" (res), "=g" (flags)\
+ : "0" (res), "1" (flags));
+
+#ifdef OP1
+inline void exec_opl(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP1("", res, flags);
+ if (FULLTXT)
+ printf("%-6s A=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "l", s0, res, iflags, flags & CC_MASK);
+ else
+ printf("%08x %04x %04x\n",
+ res, iflags, flags & CC_MASK);
+
+}
+inline void exec_opw(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP1("w", res, flags);
+ if (FULLTXT)
+ printf("%-6s A=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "w", s0, res, iflags, flags & CC_MASK);
+ else
+ printf("%08x %04x %04x\n",
+ res, iflags, flags & CC_MASK);
+
+}
+inline void exec_opb(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP1("b", res, flags);
+ if (FULLTXT)
+ printf("%-6s A=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "b", s0, res, iflags, flags & CC_MASK);
+ else
+ printf("%08x %04x %04x\n",
+ res, iflags, flags & CC_MASK);
+
+}
+#else
+inline void exec_opl(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP2("", res, s1, flags);
+ if (FULLTXT)
+ printf("%-6s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
+ else
+ printf("%08x %04x %04x\n",
+ res, iflags, flags & CC_MASK);
+}
+
+inline void exec_opw(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP2("w", res, s1, flags);
+ if (FULLTXT)
+ printf("%-6s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
+ else
+ printf("%08x %04x %04x\n",
+ res, iflags, flags & CC_MASK);
+}
+
+inline void exec_opb(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP2("b", res, s1, flags);
+ if (FULLTXT)
+ printf("%-6s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
+ else
+ printf("%08x %04x %04x\n",
+ res, iflags, flags & CC_MASK);
+}
+#endif
+
+void exec_op(int s0, int s1)
+{
+#if 1
+ int o,s,z,a,c,p,flags_in;
+ for (o = 0; o < 2; o++) {
+ for (s = 0; s < 2; s++) {
+ for (z = 0; z < 2; z++) {
+ for (a = 0; a < 2; a++) {
+ for (c = 0; c < 2; c++) {
+ for (p = 0; p < 2; p++) {
+
+ flags_in = (o ? CC_O : 0)
+ | (s ? CC_S : 0)
+ | (z ? CC_Z : 0)
+ | (a ? CC_A : 0)
+ | (c ? CC_C : 0)
+ | (p ? CC_P : 0);
+ exec_opl(s0, s1, flags_in);
+ exec_opw(s0, s1, flags_in);
+ exec_opb(s0, s1, flags_in);
+ }}}}}}
+#else
+ exec_opl(s0, s1, 0);
+ exec_opw(s0, s1, 0);
+ exec_opb(s0, s1, 0);
+ exec_opl(s0, s1, CC_C);
+ exec_opw(s0, s1, CC_C);
+ exec_opb(s0, s1, CC_C);
+#endif
+}
+
+void glue(test_, OP)(void)
+{
+#define NVALS 57
+ int i, j;
+ static unsigned int val[NVALS]
+ = { 0x00, 0x01, 0x02, 0x03,
+ 0x3F, 0x40, 0x41,
+ 0x7E, 0x7F, 0x80, 0x81, 0x82,
+ 0xBF, 0xC0, 0xC1,
+ 0xFC, 0xFD, 0xFE, 0xFF,
+
+ 0xFF00, 0xFF01, 0xFF02, 0xFF03,
+ 0xFF3F, 0xFF40, 0xFF41,
+ 0xFF7E, 0xFF7F, 0xFF80, 0xFF81, 0xFF82,
+ 0xFFBF, 0xFFC0, 0xFFC1,
+ 0xFFFC, 0xFFFD, 0xFFFE, 0xFFFF,
+
+ 0xFFFFFF00, 0xFFFFFF01, 0xFFFFFF02, 0xFFFFFF03,
+ 0xFFFFFF3F, 0xFFFFFF40, 0xFFFFFF41,
+ 0xFFFFFF7E, 0xFFFFFF7F, 0xFFFFFF80, 0xFFFFFF81, 0xFFFFFF82,
+ 0xFFFFFFBF, 0xFFFFFFC0, 0xFFFFFFC1,
+ 0xFFFFFFFC, 0xFFFFFFFD, 0xFFFFFFFE, 0xFFFFFFFF
+ };
+
+ exec_op(0x12345678, 0x812FADA);
+ exec_op(0x12341, 0x12341);
+ exec_op(0x12341, -0x12341);
+ exec_op(0xffffffff, 0);
+ exec_op(0xffffffff, -1);
+ exec_op(0xffffffff, 1);
+ exec_op(0xffffffff, 2);
+ exec_op(0x7fffffff, 0);
+ exec_op(0x7fffffff, 1);
+ exec_op(0x7fffffff, -1);
+ exec_op(0x80000000, -1);
+ exec_op(0x80000000, 1);
+ exec_op(0x80000000, -2);
+ exec_op(0x12347fff, 0);
+ exec_op(0x12347fff, 1);
+ exec_op(0x12347fff, -1);
+ exec_op(0x12348000, -1);
+ exec_op(0x12348000, 1);
+ exec_op(0x12348000, -2);
+ exec_op(0x12347f7f, 0);
+ exec_op(0x12347f7f, 1);
+ exec_op(0x12347f7f, -1);
+ exec_op(0x12348080, -1);
+ exec_op(0x12348080, 1);
+ exec_op(0x12348080, -2);
+
+#if TEST_INTEGER_VERBOSE
+ if (1)
+ for (i = 0; i < NVALS; i++)
+ for (j = 0; j < NVALS; j++)
+ exec_op(val[i], val[j]);
+#endif
+
+#undef NVALS
+}
+
+void *glue(_test_, OP) __init_call = glue(test_, OP);
+
+#undef OP
+#undef OP_CC
+
+#undef FULLTXT
diff --git a/main/VEX/test/x87fxam.c b/main/VEX/test/x87fxam.c
new file mode 100644
index 0000000..680b7ff
--- /dev/null
+++ b/main/VEX/test/x87fxam.c
@@ -0,0 +1,44 @@
+
+#include <stdio.h>
+#include <math.h>
+
+double d;
+int i;
+
+extern void do_fxam ( void );
+
+asm(
+"\n"
+"do_fxam:\n"
+"\txorl %eax,%eax\n"
+"\tfld d\n"
+"\tfxam\n"
+"\tfnstsw %ax\n"
+"\tffree %st(0)\n"
+"\tmovl %eax, i\n"
+"\tret\n"
+);
+
+
+double inf ( void ) { return 1.0 / 0.0; }
+double nAn ( void ) { return 0.0 / 0.0; }
+double den ( void ) { return 9.1e-220 / 1e100; }
+
+/* Try positive and negative variants of: zero, infinity,
+ nAn, and denorm */
+
+int main ( void )
+{
+ d = 0.0; do_fxam(); printf("0x%4x: %f\n", i, d );
+ d = -0.0; do_fxam(); printf("0x%4x: %f\n", i, d );
+
+ d = inf(); do_fxam(); printf("0x%4x: %f\n", i, d );
+ d = -inf(); do_fxam(); printf("0x%4x: %f\n", i, d );
+
+ d = nAn(); do_fxam(); printf("0x%4x: %f\n", i, d );
+ d = -nAn(); do_fxam(); printf("0x%4x: %f\n", i, d );
+
+ d = den(); do_fxam(); printf("0x%4x: %f\n", i, d );
+ d = -den(); do_fxam(); printf("0x%4x: %f\n", i, d );
+ return 0;
+}
diff --git a/main/VEX/test/x87tst.c b/main/VEX/test/x87tst.c
new file mode 100644
index 0000000..d079477
--- /dev/null
+++ b/main/VEX/test/x87tst.c
@@ -0,0 +1,27 @@
+
+#include <stdio.h>
+#include <math.h>
+
+double d;
+int i;
+
+extern void do_tst ( void );
+
+asm(
+"\n"
+"do_tst:\n"
+"\txorl %eax,%eax\n"
+"\tfld d\n"
+"\tftst\n"
+"\tfnstsw %ax\n"
+"\tmovl %eax, i\n"
+"\tret\n"
+);
+
+int main ( void )
+{
+ d = -1.23; do_tst(); printf("%f -> 0x%x\n", d, i );
+ d = 0.0; do_tst(); printf("%f -> 0x%x\n", d, i );
+ d = 9.87; do_tst(); printf("%f -> 0x%x\n", d, i );
+ return 0;
+}
diff --git a/main/VEX/test_main.c b/main/VEX/test_main.c
new file mode 100644
index 0000000..cb79408
--- /dev/null
+++ b/main/VEX/test_main.c
@@ -0,0 +1,2712 @@
+
+/*---------------------------------------------------------------*/
+/*--- begin test_main.c ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2004-2011 OpenWorks LLP
+ info@open-works.net
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+
+ Neither the names of the U.S. Department of Energy nor the
+ University of California nor the names of its contributors may be
+ used to endorse or promote products derived from this software
+ without prior written permission.
+*/
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <assert.h>
+#include <string.h>
+
+#include "libvex_basictypes.h"
+#include "libvex.h"
+
+#include "test_main.h"
+
+
+/*---------------------------------------------------------------*/
+/*--- Test ---*/
+/*---------------------------------------------------------------*/
+
+
+__attribute__ ((noreturn))
+static
+void failure_exit ( void )
+{
+ fprintf(stdout, "VEX did failure_exit. Bye.\n");
+ exit(1);
+}
+
+static
+void log_bytes ( HChar* bytes, Int nbytes )
+{
+ fwrite ( bytes, 1, nbytes, stdout );
+}
+
+#define N_LINEBUF 10000
+static HChar linebuf[N_LINEBUF];
+
+#define N_ORIGBUF 10000
+#define N_TRANSBUF 5000
+
+static UChar origbuf[N_ORIGBUF];
+static UChar transbuf[N_TRANSBUF];
+
+static Bool verbose = True;
+
+/* Forwards */
+#if 1 /* UNUSED */
+//static IRSB* ac_instrument ( IRSB*, VexGuestLayout*, IRType );
+static
+IRSB* mc_instrument ( void* closureV,
+ IRSB* bb_in, VexGuestLayout* layout,
+ VexGuestExtents* vge,
+ IRType gWordTy, IRType hWordTy );
+#endif
+
+static Bool chase_into_not_ok ( void* opaque, Addr64 dst ) {
+ return False;
+}
+static UInt needs_self_check ( void* opaque, VexGuestExtents* vge ) {
+ return 0;
+}
+
+int main ( int argc, char** argv )
+{
+ FILE* f;
+ Int i;
+ UInt u, sum;
+ Addr32 orig_addr;
+ Int bb_number, n_bbs_done = 0;
+ Int orig_nbytes, trans_used;
+ VexTranslateResult tres;
+ VexControl vcon;
+ VexGuestExtents vge;
+ VexArchInfo vai_x86, vai_amd64, vai_ppc32;
+ VexAbiInfo vbi;
+ VexTranslateArgs vta;
+
+ if (argc != 2) {
+ fprintf(stderr, "usage: vex file.org\n");
+ exit(1);
+ }
+ f = fopen(argv[1], "r");
+ if (!f) {
+ fprintf(stderr, "can't open `%s'\n", argv[1]);
+ exit(1);
+ }
+
+ /* Run with default params. However, we can't allow bb chasing
+ since that causes the front end to get segfaults when it tries
+ to read code outside the initial BB we hand it. So when calling
+ LibVEX_Translate, send in a chase-into predicate that always
+ returns False. */
+ LibVEX_default_VexControl ( &vcon );
+ vcon.iropt_level = 2;
+ vcon.guest_max_insns = 50;
+
+ LibVEX_Init ( &failure_exit, &log_bytes,
+ 1, /* debug_paranoia */
+ TEST_VSUPPORT, /* valgrind support */
+ &vcon );
+
+
+ while (!feof(f)) {
+
+ __attribute__((unused))
+ char* unused1 = fgets(linebuf, N_LINEBUF,f);
+ if (linebuf[0] == 0) continue;
+ if (linebuf[0] != '.') continue;
+
+ if (n_bbs_done == TEST_N_BBS) break;
+ n_bbs_done++;
+
+ /* first line is: . bb-number bb-addr n-bytes */
+ assert(3 == sscanf(&linebuf[1], " %d %x %d\n",
+ & bb_number,
+ & orig_addr, & orig_nbytes ));
+ assert(orig_nbytes >= 1);
+ assert(!feof(f));
+ __attribute__((unused))
+ char* unused2 = fgets(linebuf, N_LINEBUF,f);
+ assert(linebuf[0] == '.');
+
+ /* second line is: . byte byte byte etc */
+ if (verbose)
+ printf("============ Basic Block %d, Done %d, "
+ "Start %x, nbytes %2d ============",
+ bb_number, n_bbs_done-1, orig_addr, orig_nbytes);
+
+ assert(orig_nbytes >= 1 && orig_nbytes <= N_ORIGBUF);
+ for (i = 0; i < orig_nbytes; i++) {
+ assert(1 == sscanf(&linebuf[2 + 3*i], "%x", &u));
+ origbuf[i] = (UChar)u;
+ }
+
+ /* FIXME: put sensible values into the .hwcaps fields */
+ LibVEX_default_VexArchInfo(&vai_x86);
+ vai_x86.hwcaps = VEX_HWCAPS_X86_SSE1
+ | VEX_HWCAPS_X86_SSE2 | VEX_HWCAPS_X86_SSE3;
+
+ LibVEX_default_VexArchInfo(&vai_amd64);
+ vai_amd64.hwcaps = 0;
+
+ LibVEX_default_VexArchInfo(&vai_ppc32);
+ vai_ppc32.hwcaps = 0;
+ vai_ppc32.ppc_cache_line_szB = 128;
+
+ LibVEX_default_VexAbiInfo(&vbi);
+
+ /* ----- Set up args for LibVEX_Translate ----- */
+#if 0 /* ppc32 -> ppc32 */
+ vta.arch_guest = VexArchPPC32;
+ vta.archinfo_guest = vai_ppc32;
+ vta.arch_host = VexArchPPC32;
+ vta.archinfo_host = vai_ppc32;
+#endif
+#if 0 /* amd64 -> amd64 */
+ vta.arch_guest = VexArchAMD64;
+ vta.archinfo_guest = vai_amd64;
+ vta.arch_host = VexArchAMD64;
+ vta.archinfo_host = vai_amd64;
+#endif
+#if 1 /* x86 -> x86 */
+ vta.arch_guest = VexArchX86;
+ vta.archinfo_guest = vai_x86;
+ vta.arch_host = VexArchX86;
+ vta.archinfo_host = vai_x86;
+#endif
+ vta.abiinfo_both = vbi;
+ vta.guest_bytes = origbuf;
+ vta.guest_bytes_addr = (Addr64)orig_addr;
+ vta.callback_opaque = NULL;
+ vta.chase_into_ok = chase_into_not_ok;
+ vta.guest_extents = &vge;
+ vta.host_bytes = transbuf;
+ vta.host_bytes_size = N_TRANSBUF;
+ vta.host_bytes_used = &trans_used;
+#if 0 /* no instrumentation */
+ vta.instrument1 = NULL;
+ vta.instrument2 = NULL;
+#endif
+#if 0 /* addrcheck */
+ vta.instrument1 = ac_instrument;
+ vta.instrument2 = NULL;
+#endif
+#if 1 /* memcheck */
+ vta.instrument1 = mc_instrument;
+ vta.instrument2 = NULL;
+#endif
+ vta.needs_self_check = needs_self_check;
+ vta.preamble_function = NULL;
+ vta.traceflags = TEST_FLAGS;
+#if 1 /* x86, amd64 hosts */
+ vta.dispatch_unassisted = (void*)0x12345678;
+ vta.dispatch_assisted = (void*)0x12345678;
+#else /* ppc32, ppc64 hosts */
+ vta.dispatch = NULL;
+#endif
+
+ vta.finaltidy = NULL;
+
+ for (i = 0; i < TEST_N_ITERS; i++)
+ tres = LibVEX_Translate ( &vta );
+
+ if (tres.status != VexTransOK)
+ printf("\ntres = %d\n", (Int)tres.status);
+ assert(tres.status == VexTransOK);
+ assert(tres.n_sc_extents == 0);
+ assert(vge.n_used == 1);
+ assert((UInt)(vge.len[0]) == orig_nbytes);
+
+ sum = 0;
+ for (i = 0; i < trans_used; i++)
+ sum += (UInt)transbuf[i];
+ printf ( " %6.2f ... %u\n",
+ (double)trans_used / (double)vge.len[0], sum );
+ }
+
+ fclose(f);
+ printf("\n");
+ LibVEX_ShowAllocStats();
+
+ return 0;
+}
+
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+
+#if 0 /* UNUSED */
+
+static
+__attribute((noreturn))
+void panic ( HChar* s )
+{
+ printf("\npanic: %s\n", s);
+ failure_exit();
+}
+
+static
+IRSB* ac_instrument (IRSB* bb_in, VexGuestLayout* layout, IRType hWordTy )
+{
+/* Use this rather than eg. -1 because it's a UInt. */
+#define INVALID_DATA_SIZE 999999
+
+ Int i;
+ Int sz;
+ IRCallee* helper;
+ IRStmt* st;
+ IRExpr* data;
+ IRExpr* addr;
+ Bool needSz;
+
+ /* Set up BB */
+ IRSB* bb = emptyIRSB();
+ bb->tyenv = dopyIRTypeEnv(bb_in->tyenv);
+ bb->next = dopyIRExpr(bb_in->next);
+ bb->jumpkind = bb_in->jumpkind;
+
+ /* No loads to consider in ->next. */
+ assert(isIRAtom(bb_in->next));
+
+ for (i = 0; i < bb_in->stmts_used; i++) {
+ st = bb_in->stmts[i];
+ if (!st) continue;
+
+ switch (st->tag) {
+
+ case Ist_Tmp:
+ data = st->Ist.Tmp.data;
+ if (data->tag == Iex_LDle) {
+ addr = data->Iex.LDle.addr;
+ sz = sizeofIRType(data->Iex.LDle.ty);
+ needSz = False;
+ switch (sz) {
+ case 4: helper = mkIRCallee(1, "ac_helperc_LOAD4",
+ (void*)0x12345601); break;
+ case 2: helper = mkIRCallee(0, "ac_helperc_LOAD2",
+ (void*)0x12345602); break;
+ case 1: helper = mkIRCallee(1, "ac_helperc_LOAD1",
+ (void*)0x12345603); break;
+ default: helper = mkIRCallee(0, "ac_helperc_LOADN",
+ (void*)0x12345604);
+ needSz = True; break;
+ }
+ if (needSz) {
+ addStmtToIRSB(
+ bb,
+ IRStmt_Dirty(
+ unsafeIRDirty_0_N( helper->regparms,
+ helper->name, helper->addr,
+ mkIRExprVec_2(addr, mkIRExpr_HWord(sz)))
+ ));
+ } else {
+ addStmtToIRSB(
+ bb,
+ IRStmt_Dirty(
+ unsafeIRDirty_0_N( helper->regparms,
+ helper->name, helper->addr,
+ mkIRExprVec_1(addr) )
+ ));
+ }
+ }
+ break;
+
+ case Ist_STle:
+ data = st->Ist.STle.data;
+ addr = st->Ist.STle.addr;
+ assert(isIRAtom(data));
+ assert(isIRAtom(addr));
+ sz = sizeofIRType(typeOfIRExpr(bb_in->tyenv, data));
+ needSz = False;
+ switch (sz) {
+ case 4: helper = mkIRCallee(1, "ac_helperc_STORE4",
+ (void*)0x12345605); break;
+ case 2: helper = mkIRCallee(0, "ac_helperc_STORE2",
+ (void*)0x12345606); break;
+ case 1: helper = mkIRCallee(1, "ac_helperc_STORE1",
+ (void*)0x12345607); break;
+ default: helper = mkIRCallee(0, "ac_helperc_STOREN",
+ (void*)0x12345608);
+ needSz = True; break;
+ }
+ if (needSz) {
+ addStmtToIRSB(
+ bb,
+ IRStmt_Dirty(
+ unsafeIRDirty_0_N( helper->regparms,
+ helper->name, helper->addr,
+ mkIRExprVec_2(addr, mkIRExpr_HWord(sz)))
+ ));
+ } else {
+ addStmtToIRSB(
+ bb,
+ IRStmt_Dirty(
+ unsafeIRDirty_0_N( helper->regparms,
+ helper->name, helper->addr,
+ mkIRExprVec_1(addr) )
+ ));
+ }
+ break;
+
+ case Ist_Put:
+ assert(isIRAtom(st->Ist.Put.data));
+ break;
+
+ case Ist_PutI:
+ assert(isIRAtom(st->Ist.PutI.ix));
+ assert(isIRAtom(st->Ist.PutI.data));
+ break;
+
+ case Ist_Exit:
+ assert(isIRAtom(st->Ist.Exit.guard));
+ break;
+
+ case Ist_Dirty:
+ /* If the call doesn't interact with memory, we ain't
+ interested. */
+ if (st->Ist.Dirty.details->mFx == Ifx_None)
+ break;
+ goto unhandled;
+
+ default:
+ unhandled:
+ printf("\n");
+ ppIRStmt(st);
+ printf("\n");
+ panic("addrcheck: unhandled IRStmt");
+ }
+
+ addStmtToIRSB( bb, dopyIRStmt(st));
+ }
+
+ return bb;
+}
+#endif /* UNUSED */
+
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////
+
+#if 1 /* UNUSED */
+
+static
+__attribute((noreturn))
+void panic ( HChar* s )
+{
+ printf("\npanic: %s\n", s);
+ failure_exit();
+}
+
+#define tl_assert(xxx) assert(xxx)
+#define VG_(xxxx) xxxx
+#define tool_panic(zzz) panic(zzz)
+#define MC_(zzzz) MC_##zzzz
+#define TL_(zzzz) SK_##zzzz
+
+
+static void MC_helperc_complain_undef ( void );
+static void MC_helperc_LOADV8 ( void );
+static void MC_helperc_LOADV4 ( void );
+static void MC_helperc_LOADV2 ( void );
+static void MC_helperc_LOADV1 ( void );
+static void MC_helperc_STOREV8( void );
+static void MC_helperc_STOREV4( void );
+static void MC_helperc_STOREV2( void );
+static void MC_helperc_STOREV1( void );
+static void MC_helperc_value_check0_fail( void );
+static void MC_helperc_value_check1_fail( void );
+static void MC_helperc_value_check4_fail( void );
+
+static void MC_helperc_complain_undef ( void ) { }
+static void MC_helperc_LOADV8 ( void ) { }
+static void MC_helperc_LOADV4 ( void ) { }
+static void MC_helperc_LOADV2 ( void ) { }
+static void MC_helperc_LOADV1 ( void ) { }
+static void MC_helperc_STOREV8( void ) { }
+static void MC_helperc_STOREV4( void ) { }
+static void MC_helperc_STOREV2( void ) { }
+static void MC_helperc_STOREV1( void ) { }
+static void MC_helperc_value_check0_fail( void ) { }
+static void MC_helperc_value_check1_fail( void ) { }
+static void MC_helperc_value_check4_fail( void ) { }
+
+
+/*--------------------------------------------------------------------*/
+/*--- Instrument IR to perform memory checking operations. ---*/
+/*--- mc_translate.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of MemCheck, a heavyweight Valgrind tool for
+ detecting memory errors.
+
+ Copyright (C) 2000-2011 Julian Seward
+ jseward@acm.org
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+//#include "mc_include.h"
+
+
+/*------------------------------------------------------------*/
+/*--- Forward decls ---*/
+/*------------------------------------------------------------*/
+
+struct _MCEnv;
+
+static IRType shadowType ( IRType ty );
+static IRExpr* expr2vbits ( struct _MCEnv* mce, IRExpr* e );
+
+
+/*------------------------------------------------------------*/
+/*--- Memcheck running state, and tmp management. ---*/
+/*------------------------------------------------------------*/
+
+/* Carries around state during memcheck instrumentation. */
+typedef
+ struct _MCEnv {
+ /* MODIFIED: the bb being constructed. IRStmts are added. */
+ IRSB* bb;
+
+ /* MODIFIED: a table [0 .. #temps_in_original_bb-1] which maps
+ original temps to their current their current shadow temp.
+ Initially all entries are IRTemp_INVALID. Entries are added
+ lazily since many original temps are not used due to
+ optimisation prior to instrumentation. Note that floating
+ point original tmps are shadowed by integer tmps of the same
+ size, and Bit-typed original tmps are shadowed by the type
+ Ity_I8. See comment below. */
+ IRTemp* tmpMap;
+ Int n_originalTmps; /* for range checking */
+
+ /* READONLY: the guest layout. This indicates which parts of
+ the guest state should be regarded as 'always defined'. */
+ VexGuestLayout* layout;
+ /* READONLY: the host word type. Needed for constructing
+ arguments of type 'HWord' to be passed to helper functions.
+ Ity_I32 or Ity_I64 only. */
+ IRType hWordTy;
+ }
+ MCEnv;
+
+/* SHADOW TMP MANAGEMENT. Shadow tmps are allocated lazily (on
+ demand), as they are encountered. This is for two reasons.
+
+ (1) (less important reason): Many original tmps are unused due to
+ initial IR optimisation, and we do not want to spaces in tables
+ tracking them.
+
+ Shadow IRTemps are therefore allocated on demand. mce.tmpMap is a
+ table indexed [0 .. n_types-1], which gives the current shadow for
+ each original tmp, or INVALID_IRTEMP if none is so far assigned.
+ It is necessary to support making multiple assignments to a shadow
+ -- specifically, after testing a shadow for definedness, it needs
+ to be made defined. But IR's SSA property disallows this.
+
+ (2) (more important reason): Therefore, when a shadow needs to get
+ a new value, a new temporary is created, the value is assigned to
+ that, and the tmpMap is updated to reflect the new binding.
+
+ A corollary is that if the tmpMap maps a given tmp to
+ INVALID_IRTEMP and we are hoping to read that shadow tmp, it means
+ there's a read-before-write error in the original tmps. The IR
+ sanity checker should catch all such anomalies, however.
+*/
+
+/* Find the tmp currently shadowing the given original tmp. If none
+ so far exists, allocate one. */
+static IRTemp findShadowTmp ( MCEnv* mce, IRTemp orig )
+{
+ tl_assert(orig < mce->n_originalTmps);
+ if (mce->tmpMap[orig] == IRTemp_INVALID) {
+ mce->tmpMap[orig]
+ = newIRTemp(mce->bb->tyenv,
+ shadowType(mce->bb->tyenv->types[orig]));
+ }
+ return mce->tmpMap[orig];
+}
+
+/* Allocate a new shadow for the given original tmp. This means any
+ previous shadow is abandoned. This is needed because it is
+ necessary to give a new value to a shadow once it has been tested
+ for undefinedness, but unfortunately IR's SSA property disallows
+ this. Instead we must abandon the old shadow, allocate a new one
+ and use that instead. */
+static void newShadowTmp ( MCEnv* mce, IRTemp orig )
+{
+ tl_assert(orig < mce->n_originalTmps);
+ mce->tmpMap[orig]
+ = newIRTemp(mce->bb->tyenv,
+ shadowType(mce->bb->tyenv->types[orig]));
+}
+
+
+/*------------------------------------------------------------*/
+/*--- IRAtoms -- a subset of IRExprs ---*/
+/*------------------------------------------------------------*/
+
+/* An atom is either an IRExpr_Const or an IRExpr_Tmp, as defined by
+ isIRAtom() in libvex_ir.h. Because this instrumenter expects flat
+ input, most of this code deals in atoms. Usefully, a value atom
+ always has a V-value which is also an atom: constants are shadowed
+ by constants, and temps are shadowed by the corresponding shadow
+ temporary. */
+
+typedef IRExpr IRAtom;
+
+/* (used for sanity checks only): is this an atom which looks
+ like it's from original code? */
+static Bool isOriginalAtom ( MCEnv* mce, IRAtom* a1 )
+{
+ if (a1->tag == Iex_Const)
+ return True;
+ if (a1->tag == Iex_RdTmp && a1->Iex.RdTmp.tmp < mce->n_originalTmps)
+ return True;
+ return False;
+}
+
+/* (used for sanity checks only): is this an atom which looks
+ like it's from shadow code? */
+static Bool isShadowAtom ( MCEnv* mce, IRAtom* a1 )
+{
+ if (a1->tag == Iex_Const)
+ return True;
+ if (a1->tag == Iex_RdTmp && a1->Iex.RdTmp.tmp >= mce->n_originalTmps)
+ return True;
+ return False;
+}
+
+/* (used for sanity checks only): check that both args are atoms and
+ are identically-kinded. */
+static Bool sameKindedAtoms ( IRAtom* a1, IRAtom* a2 )
+{
+ if (a1->tag == Iex_RdTmp && a1->tag == Iex_RdTmp)
+ return True;
+ if (a1->tag == Iex_Const && a1->tag == Iex_Const)
+ return True;
+ return False;
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Type management ---*/
+/*------------------------------------------------------------*/
+
+/* Shadow state is always accessed using integer types. This returns
+ an integer type with the same size (as per sizeofIRType) as the
+ given type. The only valid shadow types are Bit, I8, I16, I32,
+ I64, V128. */
+
+static IRType shadowType ( IRType ty )
+{
+ switch (ty) {
+ case Ity_I1:
+ case Ity_I8:
+ case Ity_I16:
+ case Ity_I32:
+ case Ity_I64: return ty;
+ case Ity_F32: return Ity_I32;
+ case Ity_F64: return Ity_I64;
+ case Ity_V128: return Ity_V128;
+ default: ppIRType(ty);
+ VG_(tool_panic)("memcheck:shadowType");
+ }
+}
+
+/* Produce a 'defined' value of the given shadow type. Should only be
+ supplied shadow types (Bit/I8/I16/I32/UI64). */
+static IRExpr* definedOfType ( IRType ty ) {
+ switch (ty) {
+ case Ity_I1: return IRExpr_Const(IRConst_U1(False));
+ case Ity_I8: return IRExpr_Const(IRConst_U8(0));
+ case Ity_I16: return IRExpr_Const(IRConst_U16(0));
+ case Ity_I32: return IRExpr_Const(IRConst_U32(0));
+ case Ity_I64: return IRExpr_Const(IRConst_U64(0));
+ case Ity_V128: return IRExpr_Const(IRConst_V128(0x0000));
+ default: VG_(tool_panic)("memcheck:definedOfType");
+ }
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Constructing IR fragments ---*/
+/*------------------------------------------------------------*/
+
+/* assign value to tmp */
+#define assign(_bb,_tmp,_expr) \
+ addStmtToIRSB((_bb), IRStmt_WrTmp((_tmp),(_expr)))
+
+/* add stmt to a bb */
+#define stmt(_bb,_stmt) \
+ addStmtToIRSB((_bb), (_stmt))
+
+/* build various kinds of expressions */
+#define binop(_op, _arg1, _arg2) IRExpr_Binop((_op),(_arg1),(_arg2))
+#define unop(_op, _arg) IRExpr_Unop((_op),(_arg))
+#define mkU8(_n) IRExpr_Const(IRConst_U8(_n))
+#define mkU16(_n) IRExpr_Const(IRConst_U16(_n))
+#define mkU32(_n) IRExpr_Const(IRConst_U32(_n))
+#define mkU64(_n) IRExpr_Const(IRConst_U64(_n))
+#define mkV128(_n) IRExpr_Const(IRConst_V128(_n))
+#define mkexpr(_tmp) IRExpr_RdTmp((_tmp))
+
+/* bind the given expression to a new temporary, and return the
+ temporary. This effectively converts an arbitrary expression into
+ an atom. */
+static IRAtom* assignNew ( MCEnv* mce, IRType ty, IRExpr* e ) {
+ IRTemp t = newIRTemp(mce->bb->tyenv, ty);
+ assign(mce->bb, t, e);
+ return mkexpr(t);
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Constructing definedness primitive ops ---*/
+/*------------------------------------------------------------*/
+
+/* --------- Defined-if-either-defined --------- */
+
+static IRAtom* mkDifD8 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ tl_assert(isShadowAtom(mce,a2));
+ return assignNew(mce, Ity_I8, binop(Iop_And8, a1, a2));
+}
+
+static IRAtom* mkDifD16 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ tl_assert(isShadowAtom(mce,a2));
+ return assignNew(mce, Ity_I16, binop(Iop_And16, a1, a2));
+}
+
+static IRAtom* mkDifD32 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ tl_assert(isShadowAtom(mce,a2));
+ return assignNew(mce, Ity_I32, binop(Iop_And32, a1, a2));
+}
+
+static IRAtom* mkDifD64 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ tl_assert(isShadowAtom(mce,a2));
+ return assignNew(mce, Ity_I64, binop(Iop_And64, a1, a2));
+}
+
+static IRAtom* mkDifDV128 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ tl_assert(isShadowAtom(mce,a2));
+ return assignNew(mce, Ity_V128, binop(Iop_AndV128, a1, a2));
+}
+
+/* --------- Undefined-if-either-undefined --------- */
+
+static IRAtom* mkUifU8 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ tl_assert(isShadowAtom(mce,a2));
+ return assignNew(mce, Ity_I8, binop(Iop_Or8, a1, a2));
+}
+
+static IRAtom* mkUifU16 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ tl_assert(isShadowAtom(mce,a2));
+ return assignNew(mce, Ity_I16, binop(Iop_Or16, a1, a2));
+}
+
+static IRAtom* mkUifU32 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ tl_assert(isShadowAtom(mce,a2));
+ return assignNew(mce, Ity_I32, binop(Iop_Or32, a1, a2));
+}
+
+static IRAtom* mkUifU64 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ tl_assert(isShadowAtom(mce,a2));
+ return assignNew(mce, Ity_I64, binop(Iop_Or64, a1, a2));
+}
+
+static IRAtom* mkUifUV128 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ tl_assert(isShadowAtom(mce,a2));
+ return assignNew(mce, Ity_V128, binop(Iop_OrV128, a1, a2));
+}
+
+static IRAtom* mkUifU ( MCEnv* mce, IRType vty, IRAtom* a1, IRAtom* a2 ) {
+ switch (vty) {
+ case Ity_I8: return mkUifU8(mce, a1, a2);
+ case Ity_I16: return mkUifU16(mce, a1, a2);
+ case Ity_I32: return mkUifU32(mce, a1, a2);
+ case Ity_I64: return mkUifU64(mce, a1, a2);
+ case Ity_V128: return mkUifUV128(mce, a1, a2);
+ default:
+ VG_(printf)("\n"); ppIRType(vty); VG_(printf)("\n");
+ VG_(tool_panic)("memcheck:mkUifU");
+ }
+}
+
+/* --------- The Left-family of operations. --------- */
+
+static IRAtom* mkLeft8 ( MCEnv* mce, IRAtom* a1 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ /* It's safe to duplicate a1 since it's only an atom */
+ return assignNew(mce, Ity_I8,
+ binop(Iop_Or8, a1,
+ assignNew(mce, Ity_I8,
+ /* unop(Iop_Neg8, a1)))); */
+ binop(Iop_Sub8, mkU8(0), a1) )));
+}
+
+static IRAtom* mkLeft16 ( MCEnv* mce, IRAtom* a1 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ /* It's safe to duplicate a1 since it's only an atom */
+ return assignNew(mce, Ity_I16,
+ binop(Iop_Or16, a1,
+ assignNew(mce, Ity_I16,
+ /* unop(Iop_Neg16, a1)))); */
+ binop(Iop_Sub16, mkU16(0), a1) )));
+}
+
+static IRAtom* mkLeft32 ( MCEnv* mce, IRAtom* a1 ) {
+ tl_assert(isShadowAtom(mce,a1));
+ /* It's safe to duplicate a1 since it's only an atom */
+ return assignNew(mce, Ity_I32,
+ binop(Iop_Or32, a1,
+ assignNew(mce, Ity_I32,
+ /* unop(Iop_Neg32, a1)))); */
+ binop(Iop_Sub32, mkU32(0), a1) )));
+}
+
+/* --------- 'Improvement' functions for AND/OR. --------- */
+
+/* ImproveAND(data, vbits) = data OR vbits. Defined (0) data 0s give
+ defined (0); all other -> undefined (1).
+*/
+static IRAtom* mkImproveAND8 ( MCEnv* mce, IRAtom* data, IRAtom* vbits )
+{
+ tl_assert(isOriginalAtom(mce, data));
+ tl_assert(isShadowAtom(mce, vbits));
+ tl_assert(sameKindedAtoms(data, vbits));
+ return assignNew(mce, Ity_I8, binop(Iop_Or8, data, vbits));
+}
+
+static IRAtom* mkImproveAND16 ( MCEnv* mce, IRAtom* data, IRAtom* vbits )
+{
+ tl_assert(isOriginalAtom(mce, data));
+ tl_assert(isShadowAtom(mce, vbits));
+ tl_assert(sameKindedAtoms(data, vbits));
+ return assignNew(mce, Ity_I16, binop(Iop_Or16, data, vbits));
+}
+
+static IRAtom* mkImproveAND32 ( MCEnv* mce, IRAtom* data, IRAtom* vbits )
+{
+ tl_assert(isOriginalAtom(mce, data));
+ tl_assert(isShadowAtom(mce, vbits));
+ tl_assert(sameKindedAtoms(data, vbits));
+ return assignNew(mce, Ity_I32, binop(Iop_Or32, data, vbits));
+}
+
+static IRAtom* mkImproveAND64 ( MCEnv* mce, IRAtom* data, IRAtom* vbits )
+{
+ tl_assert(isOriginalAtom(mce, data));
+ tl_assert(isShadowAtom(mce, vbits));
+ tl_assert(sameKindedAtoms(data, vbits));
+ return assignNew(mce, Ity_I64, binop(Iop_Or64, data, vbits));
+}
+
+static IRAtom* mkImproveANDV128 ( MCEnv* mce, IRAtom* data, IRAtom* vbits )
+{
+ tl_assert(isOriginalAtom(mce, data));
+ tl_assert(isShadowAtom(mce, vbits));
+ tl_assert(sameKindedAtoms(data, vbits));
+ return assignNew(mce, Ity_V128, binop(Iop_OrV128, data, vbits));
+}
+
+/* ImproveOR(data, vbits) = ~data OR vbits. Defined (0) data 1s give
+ defined (0); all other -> undefined (1).
+*/
+static IRAtom* mkImproveOR8 ( MCEnv* mce, IRAtom* data, IRAtom* vbits )
+{
+ tl_assert(isOriginalAtom(mce, data));
+ tl_assert(isShadowAtom(mce, vbits));
+ tl_assert(sameKindedAtoms(data, vbits));
+ return assignNew(
+ mce, Ity_I8,
+ binop(Iop_Or8,
+ assignNew(mce, Ity_I8, unop(Iop_Not8, data)),
+ vbits) );
+}
+
+static IRAtom* mkImproveOR16 ( MCEnv* mce, IRAtom* data, IRAtom* vbits )
+{
+ tl_assert(isOriginalAtom(mce, data));
+ tl_assert(isShadowAtom(mce, vbits));
+ tl_assert(sameKindedAtoms(data, vbits));
+ return assignNew(
+ mce, Ity_I16,
+ binop(Iop_Or16,
+ assignNew(mce, Ity_I16, unop(Iop_Not16, data)),
+ vbits) );
+}
+
+static IRAtom* mkImproveOR32 ( MCEnv* mce, IRAtom* data, IRAtom* vbits )
+{
+ tl_assert(isOriginalAtom(mce, data));
+ tl_assert(isShadowAtom(mce, vbits));
+ tl_assert(sameKindedAtoms(data, vbits));
+ return assignNew(
+ mce, Ity_I32,
+ binop(Iop_Or32,
+ assignNew(mce, Ity_I32, unop(Iop_Not32, data)),
+ vbits) );
+}
+
+static IRAtom* mkImproveOR64 ( MCEnv* mce, IRAtom* data, IRAtom* vbits )
+{
+ tl_assert(isOriginalAtom(mce, data));
+ tl_assert(isShadowAtom(mce, vbits));
+ tl_assert(sameKindedAtoms(data, vbits));
+ return assignNew(
+ mce, Ity_I64,
+ binop(Iop_Or64,
+ assignNew(mce, Ity_I64, unop(Iop_Not64, data)),
+ vbits) );
+}
+
+static IRAtom* mkImproveORV128 ( MCEnv* mce, IRAtom* data, IRAtom* vbits )
+{
+ tl_assert(isOriginalAtom(mce, data));
+ tl_assert(isShadowAtom(mce, vbits));
+ tl_assert(sameKindedAtoms(data, vbits));
+ return assignNew(
+ mce, Ity_V128,
+ binop(Iop_OrV128,
+ assignNew(mce, Ity_V128, unop(Iop_NotV128, data)),
+ vbits) );
+}
+
+/* --------- Pessimising casts. --------- */
+
+static IRAtom* mkPCastTo( MCEnv* mce, IRType dst_ty, IRAtom* vbits )
+{
+ IRType ty;
+ IRAtom* tmp1;
+ /* Note, dst_ty is a shadow type, not an original type. */
+ /* First of all, collapse vbits down to a single bit. */
+ tl_assert(isShadowAtom(mce,vbits));
+ ty = typeOfIRExpr(mce->bb->tyenv, vbits);
+ tmp1 = NULL;
+ switch (ty) {
+ case Ity_I1:
+ tmp1 = vbits;
+ break;
+ case Ity_I8:
+ tmp1 = assignNew(mce, Ity_I1, binop(Iop_CmpNE8, vbits, mkU8(0)));
+ break;
+ case Ity_I16:
+ tmp1 = assignNew(mce, Ity_I1, binop(Iop_CmpNE16, vbits, mkU16(0)));
+ break;
+ case Ity_I32:
+ tmp1 = assignNew(mce, Ity_I1, binop(Iop_CmpNE32, vbits, mkU32(0)));
+ break;
+ case Ity_I64:
+ tmp1 = assignNew(mce, Ity_I1, binop(Iop_CmpNE64, vbits, mkU64(0)));
+ break;
+ default:
+ VG_(tool_panic)("mkPCastTo(1)");
+ }
+ tl_assert(tmp1);
+ /* Now widen up to the dst type. */
+ switch (dst_ty) {
+ case Ity_I1:
+ return tmp1;
+ case Ity_I8:
+ return assignNew(mce, Ity_I8, unop(Iop_1Sto8, tmp1));
+ case Ity_I16:
+ return assignNew(mce, Ity_I16, unop(Iop_1Sto16, tmp1));
+ case Ity_I32:
+ return assignNew(mce, Ity_I32, unop(Iop_1Sto32, tmp1));
+ case Ity_I64:
+ return assignNew(mce, Ity_I64, unop(Iop_1Sto64, tmp1));
+ case Ity_V128:
+ tmp1 = assignNew(mce, Ity_I64, unop(Iop_1Sto64, tmp1));
+ tmp1 = assignNew(mce, Ity_V128, binop(Iop_64HLtoV128, tmp1, tmp1));
+ return tmp1;
+ default:
+ ppIRType(dst_ty);
+ VG_(tool_panic)("mkPCastTo(2)");
+ }
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Emit a test and complaint if something is undefined. ---*/
+/*------------------------------------------------------------*/
+
+/* Set the annotations on a dirty helper to indicate that the stack
+ pointer and instruction pointers might be read. This is the
+ behaviour of all 'emit-a-complaint' style functions we might
+ call. */
+
+static void setHelperAnns ( MCEnv* mce, IRDirty* di ) {
+ di->nFxState = 2;
+ di->fxState[0].fx = Ifx_Read;
+ di->fxState[0].offset = mce->layout->offset_SP;
+ di->fxState[0].size = mce->layout->sizeof_SP;
+ di->fxState[1].fx = Ifx_Read;
+ di->fxState[1].offset = mce->layout->offset_IP;
+ di->fxState[1].size = mce->layout->sizeof_IP;
+}
+
+
+/* Check the supplied **original** atom for undefinedness, and emit a
+ complaint if so. Once that happens, mark it as defined. This is
+ possible because the atom is either a tmp or literal. If it's a
+ tmp, it will be shadowed by a tmp, and so we can set the shadow to
+ be defined. In fact as mentioned above, we will have to allocate a
+ new tmp to carry the new 'defined' shadow value, and update the
+ original->tmp mapping accordingly; we cannot simply assign a new
+ value to an existing shadow tmp as this breaks SSAness -- resulting
+ in the post-instrumentation sanity checker spluttering in disapproval.
+*/
+static void complainIfUndefined ( MCEnv* mce, IRAtom* atom )
+{
+ IRAtom* vatom;
+ IRType ty;
+ Int sz;
+ IRDirty* di;
+ IRAtom* cond;
+
+ /* Since the original expression is atomic, there's no duplicated
+ work generated by making multiple V-expressions for it. So we
+ don't really care about the possibility that someone else may
+ also create a V-interpretion for it. */
+ tl_assert(isOriginalAtom(mce, atom));
+ vatom = expr2vbits( mce, atom );
+ tl_assert(isShadowAtom(mce, vatom));
+ tl_assert(sameKindedAtoms(atom, vatom));
+
+ ty = typeOfIRExpr(mce->bb->tyenv, vatom);
+
+ /* sz is only used for constructing the error message */
+ sz = ty==Ity_I1 ? 0 : sizeofIRType(ty);
+
+ cond = mkPCastTo( mce, Ity_I1, vatom );
+ /* cond will be 0 if all defined, and 1 if any not defined. */
+
+ switch (sz) {
+ case 0:
+ di = unsafeIRDirty_0_N( 0/*regparms*/,
+ "MC_(helperc_value_check0_fail)",
+ &MC_(helperc_value_check0_fail),
+ mkIRExprVec_0()
+ );
+ break;
+ case 1:
+ di = unsafeIRDirty_0_N( 0/*regparms*/,
+ "MC_(helperc_value_check1_fail)",
+ &MC_(helperc_value_check1_fail),
+ mkIRExprVec_0()
+ );
+ break;
+ case 4:
+ di = unsafeIRDirty_0_N( 0/*regparms*/,
+ "MC_(helperc_value_check4_fail)",
+ &MC_(helperc_value_check4_fail),
+ mkIRExprVec_0()
+ );
+ break;
+ default:
+ di = unsafeIRDirty_0_N( 1/*regparms*/,
+ "MC_(helperc_complain_undef)",
+ &MC_(helperc_complain_undef),
+ mkIRExprVec_1( mkIRExpr_HWord( sz ))
+ );
+ break;
+ }
+ di->guard = cond;
+ setHelperAnns( mce, di );
+ stmt( mce->bb, IRStmt_Dirty(di));
+
+ /* Set the shadow tmp to be defined. First, update the
+ orig->shadow tmp mapping to reflect the fact that this shadow is
+ getting a new value. */
+ tl_assert(isIRAtom(vatom));
+ /* sameKindedAtoms ... */
+ if (vatom->tag == Iex_RdTmp) {
+ tl_assert(atom->tag == Iex_RdTmp);
+ newShadowTmp(mce, atom->Iex.RdTmp.tmp);
+ assign(mce->bb, findShadowTmp(mce, atom->Iex.RdTmp.tmp),
+ definedOfType(ty));
+ }
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Shadowing PUTs/GETs, and indexed variants thereof ---*/
+/*------------------------------------------------------------*/
+
+/* Examine the always-defined sections declared in layout to see if
+ the (offset,size) section is within one. Note, is is an error to
+ partially fall into such a region: (offset,size) should either be
+ completely in such a region or completely not-in such a region.
+*/
+static Bool isAlwaysDefd ( MCEnv* mce, Int offset, Int size )
+{
+ Int minoffD, maxoffD, i;
+ Int minoff = offset;
+ Int maxoff = minoff + size - 1;
+ tl_assert((minoff & ~0xFFFF) == 0);
+ tl_assert((maxoff & ~0xFFFF) == 0);
+
+ for (i = 0; i < mce->layout->n_alwaysDefd; i++) {
+ minoffD = mce->layout->alwaysDefd[i].offset;
+ maxoffD = minoffD + mce->layout->alwaysDefd[i].size - 1;
+ tl_assert((minoffD & ~0xFFFF) == 0);
+ tl_assert((maxoffD & ~0xFFFF) == 0);
+
+ if (maxoff < minoffD || maxoffD < minoff)
+ continue; /* no overlap */
+ if (minoff >= minoffD && maxoff <= maxoffD)
+ return True; /* completely contained in an always-defd section */
+
+ VG_(tool_panic)("memcheck:isAlwaysDefd:partial overlap");
+ }
+ return False; /* could not find any containing section */
+}
+
+
+/* Generate into bb suitable actions to shadow this Put. If the state
+ slice is marked 'always defined', do nothing. Otherwise, write the
+ supplied V bits to the shadow state. We can pass in either an
+ original atom or a V-atom, but not both. In the former case the
+ relevant V-bits are then generated from the original.
+*/
+static
+void do_shadow_PUT ( MCEnv* mce, Int offset,
+ IRAtom* atom, IRAtom* vatom )
+{
+ IRType ty;
+ if (atom) {
+ tl_assert(!vatom);
+ tl_assert(isOriginalAtom(mce, atom));
+ vatom = expr2vbits( mce, atom );
+ } else {
+ tl_assert(vatom);
+ tl_assert(isShadowAtom(mce, vatom));
+ }
+
+ ty = typeOfIRExpr(mce->bb->tyenv, vatom);
+ tl_assert(ty != Ity_I1);
+ if (isAlwaysDefd(mce, offset, sizeofIRType(ty))) {
+ /* later: no ... */
+ /* emit code to emit a complaint if any of the vbits are 1. */
+ /* complainIfUndefined(mce, atom); */
+ } else {
+ /* Do a plain shadow Put. */
+ stmt( mce->bb, IRStmt_Put( offset + mce->layout->total_sizeB, vatom ) );
+ }
+}
+
+
+/* Return an expression which contains the V bits corresponding to the
+ given GETI (passed in in pieces).
+*/
+static
+void do_shadow_PUTI ( MCEnv* mce,
+ IRRegArray* descr, IRAtom* ix, Int bias, IRAtom* atom )
+{
+ IRAtom* vatom;
+ IRType ty, tyS;
+ Int arrSize;;
+
+ tl_assert(isOriginalAtom(mce,atom));
+ vatom = expr2vbits( mce, atom );
+ tl_assert(sameKindedAtoms(atom, vatom));
+ ty = descr->elemTy;
+ tyS = shadowType(ty);
+ arrSize = descr->nElems * sizeofIRType(ty);
+ tl_assert(ty != Ity_I1);
+ tl_assert(isOriginalAtom(mce,ix));
+ complainIfUndefined(mce,ix);
+ if (isAlwaysDefd(mce, descr->base, arrSize)) {
+ /* later: no ... */
+ /* emit code to emit a complaint if any of the vbits are 1. */
+ /* complainIfUndefined(mce, atom); */
+ } else {
+ /* Do a cloned version of the Put that refers to the shadow
+ area. */
+ IRRegArray* new_descr
+ = mkIRRegArray( descr->base + mce->layout->total_sizeB,
+ tyS, descr->nElems);
+ stmt( mce->bb, IRStmt_PutI( new_descr, ix, bias, vatom ));
+ }
+}
+
+
+/* Return an expression which contains the V bits corresponding to the
+ given GET (passed in in pieces).
+*/
+static
+IRExpr* shadow_GET ( MCEnv* mce, Int offset, IRType ty )
+{
+ IRType tyS = shadowType(ty);
+ tl_assert(ty != Ity_I1);
+ if (isAlwaysDefd(mce, offset, sizeofIRType(ty))) {
+ /* Always defined, return all zeroes of the relevant type */
+ return definedOfType(tyS);
+ } else {
+ /* return a cloned version of the Get that refers to the shadow
+ area. */
+ return IRExpr_Get( offset + mce->layout->total_sizeB, tyS );
+ }
+}
+
+
+/* Return an expression which contains the V bits corresponding to the
+ given GETI (passed in in pieces).
+*/
+static
+IRExpr* shadow_GETI ( MCEnv* mce, IRRegArray* descr, IRAtom* ix, Int bias )
+{
+ IRType ty = descr->elemTy;
+ IRType tyS = shadowType(ty);
+ Int arrSize = descr->nElems * sizeofIRType(ty);
+ tl_assert(ty != Ity_I1);
+ tl_assert(isOriginalAtom(mce,ix));
+ complainIfUndefined(mce,ix);
+ if (isAlwaysDefd(mce, descr->base, arrSize)) {
+ /* Always defined, return all zeroes of the relevant type */
+ return definedOfType(tyS);
+ } else {
+ /* return a cloned version of the Get that refers to the shadow
+ area. */
+ IRRegArray* new_descr
+ = mkIRRegArray( descr->base + mce->layout->total_sizeB,
+ tyS, descr->nElems);
+ return IRExpr_GetI( new_descr, ix, bias );
+ }
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Generating approximations for unknown operations, ---*/
+/*--- using lazy-propagate semantics ---*/
+/*------------------------------------------------------------*/
+
+/* Lazy propagation of undefinedness from two values, resulting in the
+ specified shadow type.
+*/
+static
+IRAtom* mkLazy2 ( MCEnv* mce, IRType finalVty, IRAtom* va1, IRAtom* va2 )
+{
+ /* force everything via 32-bit intermediaries. */
+ IRAtom* at;
+ tl_assert(isShadowAtom(mce,va1));
+ tl_assert(isShadowAtom(mce,va2));
+ at = mkPCastTo(mce, Ity_I32, va1);
+ at = mkUifU(mce, Ity_I32, at, mkPCastTo(mce, Ity_I32, va2));
+ at = mkPCastTo(mce, finalVty, at);
+ return at;
+}
+
+
+/* Do the lazy propagation game from a null-terminated vector of
+ atoms. This is presumably the arguments to a helper call, so the
+ IRCallee info is also supplied in order that we can know which
+ arguments should be ignored (via the .mcx_mask field).
+*/
+static
+IRAtom* mkLazyN ( MCEnv* mce,
+ IRAtom** exprvec, IRType finalVtype, IRCallee* cee )
+{
+ Int i;
+ IRAtom* here;
+ IRAtom* curr = definedOfType(Ity_I32);
+ for (i = 0; exprvec[i]; i++) {
+ tl_assert(i < 32);
+ tl_assert(isOriginalAtom(mce, exprvec[i]));
+ /* Only take notice of this arg if the callee's mc-exclusion
+ mask does not say it is to be excluded. */
+ if (cee->mcx_mask & (1<<i)) {
+ /* the arg is to be excluded from definedness checking. Do
+ nothing. */
+ if (0) VG_(printf)("excluding %s(%d)\n", cee->name, i);
+ } else {
+ /* calculate the arg's definedness, and pessimistically merge
+ it in. */
+ here = mkPCastTo( mce, Ity_I32, expr2vbits(mce, exprvec[i]) );
+ curr = mkUifU32(mce, here, curr);
+ }
+ }
+ return mkPCastTo(mce, finalVtype, curr );
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Generating expensive sequences for exact carry-chain ---*/
+/*--- propagation in add/sub and related operations. ---*/
+/*------------------------------------------------------------*/
+
+static
+__attribute__((unused))
+IRAtom* expensiveAdd32 ( MCEnv* mce, IRAtom* qaa, IRAtom* qbb,
+ IRAtom* aa, IRAtom* bb )
+{
+ IRAtom *a_min, *b_min, *a_max, *b_max;
+ IRType ty;
+ IROp opAND, opOR, opXOR, opNOT, opADD;
+
+ tl_assert(isShadowAtom(mce,qaa));
+ tl_assert(isShadowAtom(mce,qbb));
+ tl_assert(isOriginalAtom(mce,aa));
+ tl_assert(isOriginalAtom(mce,bb));
+ tl_assert(sameKindedAtoms(qaa,aa));
+ tl_assert(sameKindedAtoms(qbb,bb));
+
+ ty = Ity_I32;
+ opAND = Iop_And32;
+ opOR = Iop_Or32;
+ opXOR = Iop_Xor32;
+ opNOT = Iop_Not32;
+ opADD = Iop_Add32;
+
+ // a_min = aa & ~qaa
+ a_min = assignNew(mce,ty,
+ binop(opAND, aa,
+ assignNew(mce,ty, unop(opNOT, qaa))));
+
+ // b_min = bb & ~qbb
+ b_min = assignNew(mce,ty,
+ binop(opAND, bb,
+ assignNew(mce,ty, unop(opNOT, qbb))));
+
+ // a_max = aa | qaa
+ a_max = assignNew(mce,ty, binop(opOR, aa, qaa));
+
+ // b_max = bb | qbb
+ b_max = assignNew(mce,ty, binop(opOR, bb, qbb));
+
+ // result = (qaa | qbb) | ((a_min + b_min) ^ (a_max + b_max))
+ return
+ assignNew(mce,ty,
+ binop( opOR,
+ assignNew(mce,ty, binop(opOR, qaa, qbb)),
+ assignNew(mce,ty,
+ binop(opXOR, assignNew(mce,ty, binop(opADD, a_min, b_min)),
+ assignNew(mce,ty, binop(opADD, a_max, b_max))
+ )
+ )
+ )
+ );
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Helpers for dealing with vector primops. ---*/
+/*------------------------------------------------------------*/
+
+/* Vector pessimisation -- pessimise within each lane individually. */
+
+static IRAtom* mkPCast8x16 ( MCEnv* mce, IRAtom* at )
+{
+ return assignNew(mce, Ity_V128, unop(Iop_CmpNEZ8x16, at));
+}
+
+static IRAtom* mkPCast16x8 ( MCEnv* mce, IRAtom* at )
+{
+ return assignNew(mce, Ity_V128, unop(Iop_CmpNEZ16x8, at));
+}
+
+static IRAtom* mkPCast32x4 ( MCEnv* mce, IRAtom* at )
+{
+ return assignNew(mce, Ity_V128, unop(Iop_CmpNEZ32x4, at));
+}
+
+static IRAtom* mkPCast64x2 ( MCEnv* mce, IRAtom* at )
+{
+ return assignNew(mce, Ity_V128, unop(Iop_CmpNEZ64x2, at));
+}
+
+
+/* Here's a simple scheme capable of handling ops derived from SSE1
+ code and while only generating ops that can be efficiently
+ implemented in SSE1. */
+
+/* All-lanes versions are straightforward:
+
+ binary32Fx4(x,y) ==> PCast32x4(UifUV128(x#,y#))
+
+ unary32Fx4(x,y) ==> PCast32x4(x#)
+
+ Lowest-lane-only versions are more complex:
+
+ binary32F0x4(x,y) ==> SetV128lo32(
+ x#,
+ PCast32(V128to32(UifUV128(x#,y#)))
+ )
+
+ This is perhaps not so obvious. In particular, it's faster to
+ do a V128-bit UifU and then take the bottom 32 bits than the more
+ obvious scheme of taking the bottom 32 bits of each operand
+ and doing a 32-bit UifU. Basically since UifU is fast and
+ chopping lanes off vector values is slow.
+
+ Finally:
+
+ unary32F0x4(x) ==> SetV128lo32(
+ x#,
+ PCast32(V128to32(x#))
+ )
+
+ Where:
+
+ PCast32(v#) = 1Sto32(CmpNE32(v#,0))
+ PCast32x4(v#) = CmpNEZ32x4(v#)
+*/
+
+static
+IRAtom* binary32Fx4 ( MCEnv* mce, IRAtom* vatomX, IRAtom* vatomY )
+{
+ IRAtom* at;
+ tl_assert(isShadowAtom(mce, vatomX));
+ tl_assert(isShadowAtom(mce, vatomY));
+ at = mkUifUV128(mce, vatomX, vatomY);
+ at = assignNew(mce, Ity_V128, mkPCast32x4(mce, at));
+ return at;
+}
+
+static
+IRAtom* unary32Fx4 ( MCEnv* mce, IRAtom* vatomX )
+{
+ IRAtom* at;
+ tl_assert(isShadowAtom(mce, vatomX));
+ at = assignNew(mce, Ity_V128, mkPCast32x4(mce, vatomX));
+ return at;
+}
+
+static
+IRAtom* binary32F0x4 ( MCEnv* mce, IRAtom* vatomX, IRAtom* vatomY )
+{
+ IRAtom* at;
+ tl_assert(isShadowAtom(mce, vatomX));
+ tl_assert(isShadowAtom(mce, vatomY));
+ at = mkUifUV128(mce, vatomX, vatomY);
+ at = assignNew(mce, Ity_I32, unop(Iop_V128to32, at));
+ at = mkPCastTo(mce, Ity_I32, at);
+ at = assignNew(mce, Ity_V128, binop(Iop_SetV128lo32, vatomX, at));
+ return at;
+}
+
+static
+IRAtom* unary32F0x4 ( MCEnv* mce, IRAtom* vatomX )
+{
+ IRAtom* at;
+ tl_assert(isShadowAtom(mce, vatomX));
+ at = assignNew(mce, Ity_I32, unop(Iop_V128to32, vatomX));
+ at = mkPCastTo(mce, Ity_I32, at);
+ at = assignNew(mce, Ity_V128, binop(Iop_SetV128lo32, vatomX, at));
+ return at;
+}
+
+/* --- ... and ... 64Fx2 versions of the same ... --- */
+
+static
+IRAtom* binary64Fx2 ( MCEnv* mce, IRAtom* vatomX, IRAtom* vatomY )
+{
+ IRAtom* at;
+ tl_assert(isShadowAtom(mce, vatomX));
+ tl_assert(isShadowAtom(mce, vatomY));
+ at = mkUifUV128(mce, vatomX, vatomY);
+ at = assignNew(mce, Ity_V128, mkPCast64x2(mce, at));
+ return at;
+}
+
+static
+IRAtom* unary64Fx2 ( MCEnv* mce, IRAtom* vatomX )
+{
+ IRAtom* at;
+ tl_assert(isShadowAtom(mce, vatomX));
+ at = assignNew(mce, Ity_V128, mkPCast64x2(mce, vatomX));
+ return at;
+}
+
+static
+IRAtom* binary64F0x2 ( MCEnv* mce, IRAtom* vatomX, IRAtom* vatomY )
+{
+ IRAtom* at;
+ tl_assert(isShadowAtom(mce, vatomX));
+ tl_assert(isShadowAtom(mce, vatomY));
+ at = mkUifUV128(mce, vatomX, vatomY);
+ at = assignNew(mce, Ity_I64, unop(Iop_V128to64, at));
+ at = mkPCastTo(mce, Ity_I64, at);
+ at = assignNew(mce, Ity_V128, binop(Iop_SetV128lo64, vatomX, at));
+ return at;
+}
+
+static
+IRAtom* unary64F0x2 ( MCEnv* mce, IRAtom* vatomX )
+{
+ IRAtom* at;
+ tl_assert(isShadowAtom(mce, vatomX));
+ at = assignNew(mce, Ity_I64, unop(Iop_V128to64, vatomX));
+ at = mkPCastTo(mce, Ity_I64, at);
+ at = assignNew(mce, Ity_V128, binop(Iop_SetV128lo64, vatomX, at));
+ return at;
+}
+
+/* --- --- Vector saturated narrowing --- --- */
+
+/* This is quite subtle. What to do is simple:
+
+ Let the original narrowing op be QNarrowW{S,U}xN. Produce:
+
+ the-narrowing-op( PCastWxN(vatom1), PCastWxN(vatom2))
+
+ Why this is right is not so simple. Consider a lane in the args,
+ vatom1 or 2, doesn't matter.
+
+ After the PCast, that lane is all 0s (defined) or all
+ 1s(undefined).
+
+ Both signed and unsigned saturating narrowing of all 0s produces
+ all 0s, which is what we want.
+
+ The all-1s case is more complex. Unsigned narrowing interprets an
+ all-1s input as the largest unsigned integer, and so produces all
+ 1s as a result since that is the largest unsigned value at the
+ smaller width.
+
+ Signed narrowing interprets all 1s as -1. Fortunately, -1 narrows
+ to -1, so we still wind up with all 1s at the smaller width.
+
+ So: In short, pessimise the args, then apply the original narrowing
+ op.
+*/
+static
+IRAtom* vectorNarrowV128 ( MCEnv* mce, IROp narrow_op,
+ IRAtom* vatom1, IRAtom* vatom2)
+{
+ IRAtom *at1, *at2, *at3;
+ IRAtom* (*pcast)( MCEnv*, IRAtom* );
+ switch (narrow_op) {
+ case Iop_QNarrowBin32Sto16Sx8: pcast = mkPCast32x4; break;
+ case Iop_QNarrowBin16Sto8Sx16: pcast = mkPCast16x8; break;
+ case Iop_QNarrowBin16Sto8Ux16: pcast = mkPCast16x8; break;
+ default: VG_(tool_panic)("vectorNarrowV128");
+ }
+ tl_assert(isShadowAtom(mce,vatom1));
+ tl_assert(isShadowAtom(mce,vatom2));
+ at1 = assignNew(mce, Ity_V128, pcast(mce, vatom1));
+ at2 = assignNew(mce, Ity_V128, pcast(mce, vatom2));
+ at3 = assignNew(mce, Ity_V128, binop(narrow_op, at1, at2));
+ return at3;
+}
+
+
+/* --- --- Vector integer arithmetic --- --- */
+
+/* Simple ... UifU the args and per-lane pessimise the results. */
+static
+IRAtom* binary8Ix16 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 )
+{
+ IRAtom* at;
+ at = mkUifUV128(mce, vatom1, vatom2);
+ at = mkPCast8x16(mce, at);
+ return at;
+}
+
+static
+IRAtom* binary16Ix8 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 )
+{
+ IRAtom* at;
+ at = mkUifUV128(mce, vatom1, vatom2);
+ at = mkPCast16x8(mce, at);
+ return at;
+}
+
+static
+IRAtom* binary32Ix4 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 )
+{
+ IRAtom* at;
+ at = mkUifUV128(mce, vatom1, vatom2);
+ at = mkPCast32x4(mce, at);
+ return at;
+}
+
+static
+IRAtom* binary64Ix2 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 )
+{
+ IRAtom* at;
+ at = mkUifUV128(mce, vatom1, vatom2);
+ at = mkPCast64x2(mce, at);
+ return at;
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Generate shadow values from all kinds of IRExprs. ---*/
+/*------------------------------------------------------------*/
+
+static
+IRAtom* expr2vbits_Binop ( MCEnv* mce,
+ IROp op,
+ IRAtom* atom1, IRAtom* atom2 )
+{
+ IRType and_or_ty;
+ IRAtom* (*uifu) (MCEnv*, IRAtom*, IRAtom*);
+ IRAtom* (*difd) (MCEnv*, IRAtom*, IRAtom*);
+ IRAtom* (*improve) (MCEnv*, IRAtom*, IRAtom*);
+
+ IRAtom* vatom1 = expr2vbits( mce, atom1 );
+ IRAtom* vatom2 = expr2vbits( mce, atom2 );
+
+ tl_assert(isOriginalAtom(mce,atom1));
+ tl_assert(isOriginalAtom(mce,atom2));
+ tl_assert(isShadowAtom(mce,vatom1));
+ tl_assert(isShadowAtom(mce,vatom2));
+ tl_assert(sameKindedAtoms(atom1,vatom1));
+ tl_assert(sameKindedAtoms(atom2,vatom2));
+ switch (op) {
+
+ /* V128-bit SIMD (SSE2-esque) */
+
+ case Iop_ShrN16x8:
+ case Iop_ShrN32x4:
+ case Iop_ShrN64x2:
+ case Iop_SarN16x8:
+ case Iop_SarN32x4:
+ case Iop_ShlN16x8:
+ case Iop_ShlN32x4:
+ case Iop_ShlN64x2:
+ /* Same scheme as with all other shifts. */
+ complainIfUndefined(mce, atom2);
+ return assignNew(mce, Ity_V128, binop(op, vatom1, atom2));
+
+ case Iop_QSub8Ux16:
+ case Iop_QSub8Sx16:
+ case Iop_Sub8x16:
+ case Iop_Min8Ux16:
+ case Iop_Max8Ux16:
+ case Iop_CmpGT8Sx16:
+ case Iop_CmpEQ8x16:
+ case Iop_Avg8Ux16:
+ case Iop_QAdd8Ux16:
+ case Iop_QAdd8Sx16:
+ case Iop_Add8x16:
+ return binary8Ix16(mce, vatom1, vatom2);
+
+ case Iop_QSub16Ux8:
+ case Iop_QSub16Sx8:
+ case Iop_Sub16x8:
+ case Iop_Mul16x8:
+ case Iop_MulHi16Sx8:
+ case Iop_MulHi16Ux8:
+ case Iop_Min16Sx8:
+ case Iop_Max16Sx8:
+ case Iop_CmpGT16Sx8:
+ case Iop_CmpEQ16x8:
+ case Iop_Avg16Ux8:
+ case Iop_QAdd16Ux8:
+ case Iop_QAdd16Sx8:
+ case Iop_Add16x8:
+ return binary16Ix8(mce, vatom1, vatom2);
+
+ case Iop_Sub32x4:
+ case Iop_QSub32Sx4:
+ case Iop_QSub32Ux4:
+ case Iop_CmpGT32Sx4:
+ case Iop_CmpEQ32x4:
+ case Iop_Add32x4:
+ case Iop_QAdd32Ux4:
+ case Iop_QAdd32Sx4:
+ return binary32Ix4(mce, vatom1, vatom2);
+
+ case Iop_Sub64x2:
+ case Iop_QSub64Ux2:
+ case Iop_QSub64Sx2:
+ case Iop_Add64x2:
+ case Iop_QAdd64Ux2:
+ case Iop_QAdd64Sx2:
+ return binary64Ix2(mce, vatom1, vatom2);
+
+ case Iop_QNarrowBin32Sto16Sx8:
+ case Iop_QNarrowBin16Sto8Sx16:
+ case Iop_QNarrowBin16Sto8Ux16:
+ return vectorNarrowV128(mce, op, vatom1, vatom2);
+
+ case Iop_Sub64Fx2:
+ case Iop_Mul64Fx2:
+ case Iop_Min64Fx2:
+ case Iop_Max64Fx2:
+ case Iop_Div64Fx2:
+ case Iop_CmpLT64Fx2:
+ case Iop_CmpLE64Fx2:
+ case Iop_CmpEQ64Fx2:
+ case Iop_Add64Fx2:
+ return binary64Fx2(mce, vatom1, vatom2);
+
+ case Iop_Sub64F0x2:
+ case Iop_Mul64F0x2:
+ case Iop_Min64F0x2:
+ case Iop_Max64F0x2:
+ case Iop_Div64F0x2:
+ case Iop_CmpLT64F0x2:
+ case Iop_CmpLE64F0x2:
+ case Iop_CmpEQ64F0x2:
+ case Iop_Add64F0x2:
+ return binary64F0x2(mce, vatom1, vatom2);
+
+ /* V128-bit SIMD (SSE1-esque) */
+
+ case Iop_Sub32Fx4:
+ case Iop_Mul32Fx4:
+ case Iop_Min32Fx4:
+ case Iop_Max32Fx4:
+ case Iop_Div32Fx4:
+ case Iop_CmpLT32Fx4:
+ case Iop_CmpLE32Fx4:
+ case Iop_CmpEQ32Fx4:
+ case Iop_Add32Fx4:
+ return binary32Fx4(mce, vatom1, vatom2);
+
+ case Iop_Sub32F0x4:
+ case Iop_Mul32F0x4:
+ case Iop_Min32F0x4:
+ case Iop_Max32F0x4:
+ case Iop_Div32F0x4:
+ case Iop_CmpLT32F0x4:
+ case Iop_CmpLE32F0x4:
+ case Iop_CmpEQ32F0x4:
+ case Iop_Add32F0x4:
+ return binary32F0x4(mce, vatom1, vatom2);
+
+ /* V128-bit data-steering */
+ case Iop_SetV128lo32:
+ case Iop_SetV128lo64:
+ case Iop_64HLtoV128:
+ case Iop_InterleaveLO64x2:
+ case Iop_InterleaveLO32x4:
+ case Iop_InterleaveLO16x8:
+ case Iop_InterleaveLO8x16:
+ case Iop_InterleaveHI64x2:
+ case Iop_InterleaveHI32x4:
+ case Iop_InterleaveHI16x8:
+ case Iop_InterleaveHI8x16:
+ return assignNew(mce, Ity_V128, binop(op, vatom1, vatom2));
+
+ /* Scalar floating point */
+
+ // case Iop_RoundF64:
+ case Iop_F64toI64S:
+ case Iop_I64StoF64:
+ /* First arg is I32 (rounding mode), second is F64 or I64
+ (data). */
+ return mkLazy2(mce, Ity_I64, vatom1, vatom2);
+
+ case Iop_PRemC3210F64: case Iop_PRem1C3210F64:
+ /* Takes two F64 args. */
+ case Iop_F64toI32S:
+ case Iop_F64toF32:
+ /* First arg is I32 (rounding mode), second is F64 (data). */
+ return mkLazy2(mce, Ity_I32, vatom1, vatom2);
+
+ case Iop_F64toI16S:
+ /* First arg is I32 (rounding mode), second is F64 (data). */
+ return mkLazy2(mce, Ity_I16, vatom1, vatom2);
+
+ case Iop_ScaleF64:
+ case Iop_Yl2xF64:
+ case Iop_Yl2xp1F64:
+ case Iop_PRemF64:
+ case Iop_AtanF64:
+ case Iop_AddF64:
+ case Iop_DivF64:
+ case Iop_SubF64:
+ case Iop_MulF64:
+ return mkLazy2(mce, Ity_I64, vatom1, vatom2);
+
+ case Iop_CmpF64:
+ return mkLazy2(mce, Ity_I32, vatom1, vatom2);
+
+ /* non-FP after here */
+
+ case Iop_DivModU64to32:
+ case Iop_DivModS64to32:
+ return mkLazy2(mce, Ity_I64, vatom1, vatom2);
+
+ case Iop_16HLto32:
+ return assignNew(mce, Ity_I32, binop(op, vatom1, vatom2));
+ case Iop_32HLto64:
+ return assignNew(mce, Ity_I64, binop(op, vatom1, vatom2));
+
+ case Iop_MullS32:
+ case Iop_MullU32: {
+ IRAtom* vLo32 = mkLeft32(mce, mkUifU32(mce, vatom1,vatom2));
+ IRAtom* vHi32 = mkPCastTo(mce, Ity_I32, vLo32);
+ return assignNew(mce, Ity_I64, binop(Iop_32HLto64, vHi32, vLo32));
+ }
+
+ case Iop_MullS16:
+ case Iop_MullU16: {
+ IRAtom* vLo16 = mkLeft16(mce, mkUifU16(mce, vatom1,vatom2));
+ IRAtom* vHi16 = mkPCastTo(mce, Ity_I16, vLo16);
+ return assignNew(mce, Ity_I32, binop(Iop_16HLto32, vHi16, vLo16));
+ }
+
+ case Iop_MullS8:
+ case Iop_MullU8: {
+ IRAtom* vLo8 = mkLeft8(mce, mkUifU8(mce, vatom1,vatom2));
+ IRAtom* vHi8 = mkPCastTo(mce, Ity_I8, vLo8);
+ return assignNew(mce, Ity_I16, binop(Iop_8HLto16, vHi8, vLo8));
+ }
+
+ case Iop_Add32:
+# if 0
+ return expensiveAdd32(mce, vatom1,vatom2, atom1,atom2);
+# endif
+ case Iop_Sub32:
+ case Iop_Mul32:
+ return mkLeft32(mce, mkUifU32(mce, vatom1,vatom2));
+
+ case Iop_Mul16:
+ case Iop_Add16:
+ case Iop_Sub16:
+ return mkLeft16(mce, mkUifU16(mce, vatom1,vatom2));
+
+ case Iop_Sub8:
+ case Iop_Add8:
+ return mkLeft8(mce, mkUifU8(mce, vatom1,vatom2));
+
+ case Iop_CmpLE32S: case Iop_CmpLE32U:
+ case Iop_CmpLT32U: case Iop_CmpLT32S:
+ case Iop_CmpEQ32: case Iop_CmpNE32:
+ return mkPCastTo(mce, Ity_I1, mkUifU32(mce, vatom1,vatom2));
+
+ case Iop_CmpEQ16: case Iop_CmpNE16:
+ return mkPCastTo(mce, Ity_I1, mkUifU16(mce, vatom1,vatom2));
+
+ case Iop_CmpEQ8: case Iop_CmpNE8:
+ return mkPCastTo(mce, Ity_I1, mkUifU8(mce, vatom1,vatom2));
+
+ case Iop_Shl32: case Iop_Shr32: case Iop_Sar32:
+ /* Complain if the shift amount is undefined. Then simply
+ shift the first arg's V bits by the real shift amount. */
+ complainIfUndefined(mce, atom2);
+ return assignNew(mce, Ity_I32, binop(op, vatom1, atom2));
+
+ case Iop_Shl16: case Iop_Shr16: case Iop_Sar16:
+ /* Same scheme as with 32-bit shifts. */
+ complainIfUndefined(mce, atom2);
+ return assignNew(mce, Ity_I16, binop(op, vatom1, atom2));
+
+ case Iop_Shl8: case Iop_Shr8:
+ /* Same scheme as with 32-bit shifts. */
+ complainIfUndefined(mce, atom2);
+ return assignNew(mce, Ity_I8, binop(op, vatom1, atom2));
+
+ case Iop_Shl64: case Iop_Shr64:
+ /* Same scheme as with 32-bit shifts. */
+ complainIfUndefined(mce, atom2);
+ return assignNew(mce, Ity_I64, binop(op, vatom1, atom2));
+
+ case Iop_AndV128:
+ uifu = mkUifUV128; difd = mkDifDV128;
+ and_or_ty = Ity_V128; improve = mkImproveANDV128; goto do_And_Or;
+ case Iop_And64:
+ uifu = mkUifU64; difd = mkDifD64;
+ and_or_ty = Ity_I64; improve = mkImproveAND64; goto do_And_Or;
+ case Iop_And32:
+ uifu = mkUifU32; difd = mkDifD32;
+ and_or_ty = Ity_I32; improve = mkImproveAND32; goto do_And_Or;
+ case Iop_And16:
+ uifu = mkUifU16; difd = mkDifD16;
+ and_or_ty = Ity_I16; improve = mkImproveAND16; goto do_And_Or;
+ case Iop_And8:
+ uifu = mkUifU8; difd = mkDifD8;
+ and_or_ty = Ity_I8; improve = mkImproveAND8; goto do_And_Or;
+
+ case Iop_OrV128:
+ uifu = mkUifUV128; difd = mkDifDV128;
+ and_or_ty = Ity_V128; improve = mkImproveORV128; goto do_And_Or;
+ case Iop_Or64:
+ uifu = mkUifU64; difd = mkDifD64;
+ and_or_ty = Ity_I64; improve = mkImproveOR64; goto do_And_Or;
+ case Iop_Or32:
+ uifu = mkUifU32; difd = mkDifD32;
+ and_or_ty = Ity_I32; improve = mkImproveOR32; goto do_And_Or;
+ case Iop_Or16:
+ uifu = mkUifU16; difd = mkDifD16;
+ and_or_ty = Ity_I16; improve = mkImproveOR16; goto do_And_Or;
+ case Iop_Or8:
+ uifu = mkUifU8; difd = mkDifD8;
+ and_or_ty = Ity_I8; improve = mkImproveOR8; goto do_And_Or;
+
+ do_And_Or:
+ return
+ assignNew(
+ mce,
+ and_or_ty,
+ difd(mce, uifu(mce, vatom1, vatom2),
+ difd(mce, improve(mce, atom1, vatom1),
+ improve(mce, atom2, vatom2) ) ) );
+
+ case Iop_Xor8:
+ return mkUifU8(mce, vatom1, vatom2);
+ case Iop_Xor16:
+ return mkUifU16(mce, vatom1, vatom2);
+ case Iop_Xor32:
+ return mkUifU32(mce, vatom1, vatom2);
+ case Iop_Xor64:
+ return mkUifU64(mce, vatom1, vatom2);
+ case Iop_XorV128:
+ return mkUifUV128(mce, vatom1, vatom2);
+
+ default:
+ ppIROp(op);
+ VG_(tool_panic)("memcheck:expr2vbits_Binop");
+ }
+}
+
+
+static
+IRExpr* expr2vbits_Unop ( MCEnv* mce, IROp op, IRAtom* atom )
+{
+ IRAtom* vatom = expr2vbits( mce, atom );
+ tl_assert(isOriginalAtom(mce,atom));
+ switch (op) {
+
+ case Iop_Sqrt64Fx2:
+ return unary64Fx2(mce, vatom);
+
+ case Iop_Sqrt64F0x2:
+ return unary64F0x2(mce, vatom);
+
+ case Iop_Sqrt32Fx4:
+ case Iop_RSqrt32Fx4:
+ case Iop_Recip32Fx4:
+ return unary32Fx4(mce, vatom);
+
+ case Iop_Sqrt32F0x4:
+ case Iop_RSqrt32F0x4:
+ case Iop_Recip32F0x4:
+ return unary32F0x4(mce, vatom);
+
+ case Iop_32UtoV128:
+ case Iop_64UtoV128:
+ return assignNew(mce, Ity_V128, unop(op, vatom));
+
+ case Iop_F32toF64:
+ case Iop_I32StoF64:
+ case Iop_NegF64:
+ case Iop_SinF64:
+ case Iop_CosF64:
+ case Iop_TanF64:
+ case Iop_SqrtF64:
+ case Iop_AbsF64:
+ case Iop_2xm1F64:
+ return mkPCastTo(mce, Ity_I64, vatom);
+
+ case Iop_Clz32:
+ case Iop_Ctz32:
+ return mkPCastTo(mce, Ity_I32, vatom);
+
+ case Iop_32Sto64:
+ case Iop_32Uto64:
+ case Iop_V128to64:
+ case Iop_V128HIto64:
+ return assignNew(mce, Ity_I64, unop(op, vatom));
+
+ case Iop_64to32:
+ case Iop_64HIto32:
+ case Iop_1Uto32:
+ case Iop_8Uto32:
+ case Iop_16Uto32:
+ case Iop_16Sto32:
+ case Iop_8Sto32:
+ return assignNew(mce, Ity_I32, unop(op, vatom));
+
+ case Iop_8Sto16:
+ case Iop_8Uto16:
+ case Iop_32to16:
+ case Iop_32HIto16:
+ return assignNew(mce, Ity_I16, unop(op, vatom));
+
+ case Iop_1Uto8:
+ case Iop_16to8:
+ case Iop_32to8:
+ return assignNew(mce, Ity_I8, unop(op, vatom));
+
+ case Iop_32to1:
+ return assignNew(mce, Ity_I1, unop(Iop_32to1, vatom));
+
+ case Iop_ReinterpF64asI64:
+ case Iop_ReinterpI64asF64:
+ case Iop_ReinterpI32asF32:
+ case Iop_NotV128:
+ case Iop_Not64:
+ case Iop_Not32:
+ case Iop_Not16:
+ case Iop_Not8:
+ case Iop_Not1:
+ return vatom;
+
+ default:
+ ppIROp(op);
+ VG_(tool_panic)("memcheck:expr2vbits_Unop");
+ }
+}
+
+
+/* Worker function; do not call directly. */
+static
+IRAtom* expr2vbits_LDle_WRK ( MCEnv* mce, IRType ty, IRAtom* addr, UInt bias )
+{
+ void* helper;
+ HChar* hname;
+ IRDirty* di;
+ IRTemp datavbits;
+ IRAtom* addrAct;
+
+ tl_assert(isOriginalAtom(mce,addr));
+
+ /* First, emit a definedness test for the address. This also sets
+ the address (shadow) to 'defined' following the test. */
+ complainIfUndefined( mce, addr );
+
+ /* Now cook up a call to the relevant helper function, to read the
+ data V bits from shadow memory. */
+ ty = shadowType(ty);
+ switch (ty) {
+ case Ity_I64: helper = &MC_(helperc_LOADV8);
+ hname = "MC_(helperc_LOADV8)";
+ break;
+ case Ity_I32: helper = &MC_(helperc_LOADV4);
+ hname = "MC_(helperc_LOADV4)";
+ break;
+ case Ity_I16: helper = &MC_(helperc_LOADV2);
+ hname = "MC_(helperc_LOADV2)";
+ break;
+ case Ity_I8: helper = &MC_(helperc_LOADV1);
+ hname = "MC_(helperc_LOADV1)";
+ break;
+ default: ppIRType(ty);
+ VG_(tool_panic)("memcheck:do_shadow_LDle");
+ }
+
+ /* Generate the actual address into addrAct. */
+ if (bias == 0) {
+ addrAct = addr;
+ } else {
+ IROp mkAdd;
+ IRAtom* eBias;
+ IRType tyAddr = mce->hWordTy;
+ tl_assert( tyAddr == Ity_I32 || tyAddr == Ity_I64 );
+ mkAdd = tyAddr==Ity_I32 ? Iop_Add32 : Iop_Add64;
+ eBias = tyAddr==Ity_I32 ? mkU32(bias) : mkU64(bias);
+ addrAct = assignNew(mce, tyAddr, binop(mkAdd, addr, eBias) );
+ }
+
+ /* We need to have a place to park the V bits we're just about to
+ read. */
+ datavbits = newIRTemp(mce->bb->tyenv, ty);
+ di = unsafeIRDirty_1_N( datavbits,
+ 1/*regparms*/, hname, helper,
+ mkIRExprVec_1( addrAct ));
+ setHelperAnns( mce, di );
+ stmt( mce->bb, IRStmt_Dirty(di) );
+
+ return mkexpr(datavbits);
+}
+
+
+static
+IRAtom* expr2vbits_LDle ( MCEnv* mce, IRType ty, IRAtom* addr, UInt bias )
+{
+ IRAtom *v64hi, *v64lo;
+ switch (shadowType(ty)) {
+ case Ity_I8:
+ case Ity_I16:
+ case Ity_I32:
+ case Ity_I64:
+ return expr2vbits_LDle_WRK(mce, ty, addr, bias);
+ case Ity_V128:
+ v64lo = expr2vbits_LDle_WRK(mce, Ity_I64, addr, bias);
+ v64hi = expr2vbits_LDle_WRK(mce, Ity_I64, addr, bias+8);
+ return assignNew( mce,
+ Ity_V128,
+ binop(Iop_64HLtoV128, v64hi, v64lo));
+ default:
+ VG_(tool_panic)("expr2vbits_LDle");
+ }
+}
+
+
+static
+IRAtom* expr2vbits_Mux0X ( MCEnv* mce,
+ IRAtom* cond, IRAtom* expr0, IRAtom* exprX )
+{
+ IRAtom *vbitsC, *vbits0, *vbitsX;
+ IRType ty;
+ /* Given Mux0X(cond,expr0,exprX), generate
+ Mux0X(cond,expr0#,exprX#) `UifU` PCast(cond#)
+ That is, steer the V bits like the originals, but trash the
+ result if the steering value is undefined. This gives
+ lazy propagation. */
+ tl_assert(isOriginalAtom(mce, cond));
+ tl_assert(isOriginalAtom(mce, expr0));
+ tl_assert(isOriginalAtom(mce, exprX));
+
+ vbitsC = expr2vbits(mce, cond);
+ vbits0 = expr2vbits(mce, expr0);
+ vbitsX = expr2vbits(mce, exprX);
+ ty = typeOfIRExpr(mce->bb->tyenv, vbits0);
+
+ return
+ mkUifU(mce, ty, assignNew(mce, ty, IRExpr_Mux0X(cond, vbits0, vbitsX)),
+ mkPCastTo(mce, ty, vbitsC) );
+}
+
+/* --------- This is the main expression-handling function. --------- */
+
+static
+IRExpr* expr2vbits ( MCEnv* mce, IRExpr* e )
+{
+ switch (e->tag) {
+
+ case Iex_Get:
+ return shadow_GET( mce, e->Iex.Get.offset, e->Iex.Get.ty );
+
+ case Iex_GetI:
+ return shadow_GETI( mce, e->Iex.GetI.descr,
+ e->Iex.GetI.ix, e->Iex.GetI.bias );
+
+ case Iex_RdTmp:
+ return IRExpr_RdTmp( findShadowTmp(mce, e->Iex.RdTmp.tmp) );
+
+ case Iex_Const:
+ return definedOfType(shadowType(typeOfIRExpr(mce->bb->tyenv, e)));
+
+ case Iex_Binop:
+ return expr2vbits_Binop(
+ mce,
+ e->Iex.Binop.op,
+ e->Iex.Binop.arg1, e->Iex.Binop.arg2
+ );
+
+ case Iex_Unop:
+ return expr2vbits_Unop( mce, e->Iex.Unop.op, e->Iex.Unop.arg );
+
+ case Iex_Load:
+ return expr2vbits_LDle( mce, e->Iex.Load.ty,
+ e->Iex.Load.addr, 0/*addr bias*/ );
+
+ case Iex_CCall:
+ return mkLazyN( mce, e->Iex.CCall.args,
+ e->Iex.CCall.retty,
+ e->Iex.CCall.cee );
+
+ case Iex_Mux0X:
+ return expr2vbits_Mux0X( mce, e->Iex.Mux0X.cond, e->Iex.Mux0X.expr0,
+ e->Iex.Mux0X.exprX);
+
+ default:
+ VG_(printf)("\n");
+ ppIRExpr(e);
+ VG_(printf)("\n");
+ VG_(tool_panic)("memcheck: expr2vbits");
+ }
+}
+
+/*------------------------------------------------------------*/
+/*--- Generate shadow stmts from all kinds of IRStmts. ---*/
+/*------------------------------------------------------------*/
+
+/* Widen a value to the host word size. */
+
+static
+IRExpr* zwidenToHostWord ( MCEnv* mce, IRAtom* vatom )
+{
+ IRType ty, tyH;
+
+ /* vatom is vbits-value and as such can only have a shadow type. */
+ tl_assert(isShadowAtom(mce,vatom));
+
+ ty = typeOfIRExpr(mce->bb->tyenv, vatom);
+ tyH = mce->hWordTy;
+
+ if (tyH == Ity_I32) {
+ switch (ty) {
+ case Ity_I32: return vatom;
+ case Ity_I16: return assignNew(mce, tyH, unop(Iop_16Uto32, vatom));
+ case Ity_I8: return assignNew(mce, tyH, unop(Iop_8Uto32, vatom));
+ default: goto unhandled;
+ }
+ } else {
+ goto unhandled;
+ }
+ unhandled:
+ VG_(printf)("\nty = "); ppIRType(ty); VG_(printf)("\n");
+ VG_(tool_panic)("zwidenToHostWord");
+}
+
+
+/* Generate a shadow store. addr is always the original address atom.
+ You can pass in either originals or V-bits for the data atom, but
+ obviously not both. */
+
+static
+void do_shadow_STle ( MCEnv* mce,
+ IRAtom* addr, UInt bias,
+ IRAtom* data, IRAtom* vdata )
+{
+ IROp mkAdd;
+ IRType ty, tyAddr;
+ IRDirty *di, *diLo64, *diHi64;
+ IRAtom *addrAct, *addrLo64, *addrHi64;
+ IRAtom *vdataLo64, *vdataHi64;
+ IRAtom *eBias, *eBias0, *eBias8;
+ void* helper = NULL;
+ HChar* hname = NULL;
+
+ tyAddr = mce->hWordTy;
+ mkAdd = tyAddr==Ity_I32 ? Iop_Add32 : Iop_Add64;
+ tl_assert( tyAddr == Ity_I32 || tyAddr == Ity_I64 );
+
+ di = diLo64 = diHi64 = NULL;
+ eBias = eBias0 = eBias8 = NULL;
+ addrAct = addrLo64 = addrHi64 = NULL;
+ vdataLo64 = vdataHi64 = NULL;
+
+ if (data) {
+ tl_assert(!vdata);
+ tl_assert(isOriginalAtom(mce, data));
+ tl_assert(bias == 0);
+ vdata = expr2vbits( mce, data );
+ } else {
+ tl_assert(vdata);
+ }
+
+ tl_assert(isOriginalAtom(mce,addr));
+ tl_assert(isShadowAtom(mce,vdata));
+
+ ty = typeOfIRExpr(mce->bb->tyenv, vdata);
+
+ /* First, emit a definedness test for the address. This also sets
+ the address (shadow) to 'defined' following the test. */
+ complainIfUndefined( mce, addr );
+
+ /* Now decide which helper function to call to write the data V
+ bits into shadow memory. */
+ switch (ty) {
+ case Ity_V128: /* we'll use the helper twice */
+ case Ity_I64: helper = &MC_(helperc_STOREV8);
+ hname = "MC_(helperc_STOREV8)";
+ break;
+ case Ity_I32: helper = &MC_(helperc_STOREV4);
+ hname = "MC_(helperc_STOREV4)";
+ break;
+ case Ity_I16: helper = &MC_(helperc_STOREV2);
+ hname = "MC_(helperc_STOREV2)";
+ break;
+ case Ity_I8: helper = &MC_(helperc_STOREV1);
+ hname = "MC_(helperc_STOREV1)";
+ break;
+ default: VG_(tool_panic)("memcheck:do_shadow_STle");
+ }
+
+ if (ty == Ity_V128) {
+
+ /* V128-bit case */
+ /* See comment in next clause re 64-bit regparms */
+ eBias0 = tyAddr==Ity_I32 ? mkU32(bias) : mkU64(bias);
+ addrLo64 = assignNew(mce, tyAddr, binop(mkAdd, addr, eBias0) );
+ vdataLo64 = assignNew(mce, Ity_I64, unop(Iop_V128to64, vdata));
+ diLo64 = unsafeIRDirty_0_N(
+ 1/*regparms*/, hname, helper,
+ mkIRExprVec_2( addrLo64, vdataLo64 ));
+
+ eBias8 = tyAddr==Ity_I32 ? mkU32(bias+8) : mkU64(bias+8);
+ addrHi64 = assignNew(mce, tyAddr, binop(mkAdd, addr, eBias8) );
+ vdataHi64 = assignNew(mce, Ity_I64, unop(Iop_V128HIto64, vdata));
+ diHi64 = unsafeIRDirty_0_N(
+ 1/*regparms*/, hname, helper,
+ mkIRExprVec_2( addrHi64, vdataHi64 ));
+
+ setHelperAnns( mce, diLo64 );
+ setHelperAnns( mce, diHi64 );
+ stmt( mce->bb, IRStmt_Dirty(diLo64) );
+ stmt( mce->bb, IRStmt_Dirty(diHi64) );
+
+ } else {
+
+ /* 8/16/32/64-bit cases */
+ /* Generate the actual address into addrAct. */
+ if (bias == 0) {
+ addrAct = addr;
+ } else {
+ eBias = tyAddr==Ity_I32 ? mkU32(bias) : mkU64(bias);
+ addrAct = assignNew(mce, tyAddr, binop(mkAdd, addr, eBias) );
+ }
+
+ if (ty == Ity_I64) {
+ /* We can't do this with regparm 2 on 32-bit platforms, since
+ the back ends aren't clever enough to handle 64-bit
+ regparm args. Therefore be different. */
+ di = unsafeIRDirty_0_N(
+ 1/*regparms*/, hname, helper,
+ mkIRExprVec_2( addrAct, vdata ));
+ } else {
+ di = unsafeIRDirty_0_N(
+ 2/*regparms*/, hname, helper,
+ mkIRExprVec_2( addrAct,
+ zwidenToHostWord( mce, vdata )));
+ }
+ setHelperAnns( mce, di );
+ stmt( mce->bb, IRStmt_Dirty(di) );
+ }
+
+}
+
+
+/* Do lazy pessimistic propagation through a dirty helper call, by
+ looking at the annotations on it. This is the most complex part of
+ Memcheck. */
+
+static IRType szToITy ( Int n )
+{
+ switch (n) {
+ case 1: return Ity_I8;
+ case 2: return Ity_I16;
+ case 4: return Ity_I32;
+ case 8: return Ity_I64;
+ default: VG_(tool_panic)("szToITy(memcheck)");
+ }
+}
+
+static
+void do_shadow_Dirty ( MCEnv* mce, IRDirty* d )
+{
+ Int i, n, offset, toDo, gSz, gOff;
+ IRAtom *src, *here, *curr;
+ IRType tyAddr, tySrc, tyDst;
+ IRTemp dst;
+
+ /* First check the guard. */
+ complainIfUndefined(mce, d->guard);
+
+ /* Now round up all inputs and PCast over them. */
+ curr = definedOfType(Ity_I32);
+
+ /* Inputs: unmasked args */
+ for (i = 0; d->args[i]; i++) {
+ if (d->cee->mcx_mask & (1<<i)) {
+ /* ignore this arg */
+ } else {
+ here = mkPCastTo( mce, Ity_I32, expr2vbits(mce, d->args[i]) );
+ curr = mkUifU32(mce, here, curr);
+ }
+ }
+
+ /* Inputs: guest state that we read. */
+ for (i = 0; i < d->nFxState; i++) {
+ tl_assert(d->fxState[i].fx != Ifx_None);
+ if (d->fxState[i].fx == Ifx_Write)
+ continue;
+
+ /* Ignore any sections marked as 'always defined'. */
+ if (isAlwaysDefd(mce, d->fxState[i].offset, d->fxState[i].size )) {
+ if (0)
+ VG_(printf)("memcheck: Dirty gst: ignored off %d, sz %d\n",
+ d->fxState[i].offset, d->fxState[i].size );
+ continue;
+ }
+
+ /* This state element is read or modified. So we need to
+ consider it. If larger than 8 bytes, deal with it in 8-byte
+ chunks. */
+ gSz = d->fxState[i].size;
+ gOff = d->fxState[i].offset;
+ tl_assert(gSz > 0);
+ while (True) {
+ if (gSz == 0) break;
+ n = gSz <= 8 ? gSz : 8;
+ /* update 'curr' with UifU of the state slice
+ gOff .. gOff+n-1 */
+ tySrc = szToITy( n );
+ src = assignNew( mce, tySrc,
+ shadow_GET(mce, gOff, tySrc ) );
+ here = mkPCastTo( mce, Ity_I32, src );
+ curr = mkUifU32(mce, here, curr);
+ gSz -= n;
+ gOff += n;
+ }
+
+ }
+
+ /* Inputs: memory. First set up some info needed regardless of
+ whether we're doing reads or writes. */
+ tyAddr = Ity_INVALID;
+
+ if (d->mFx != Ifx_None) {
+ /* Because we may do multiple shadow loads/stores from the same
+ base address, it's best to do a single test of its
+ definedness right now. Post-instrumentation optimisation
+ should remove all but this test. */
+ tl_assert(d->mAddr);
+ complainIfUndefined(mce, d->mAddr);
+
+ tyAddr = typeOfIRExpr(mce->bb->tyenv, d->mAddr);
+ tl_assert(tyAddr == Ity_I32 || tyAddr == Ity_I64);
+ tl_assert(tyAddr == mce->hWordTy); /* not really right */
+ }
+
+ /* Deal with memory inputs (reads or modifies) */
+ if (d->mFx == Ifx_Read || d->mFx == Ifx_Modify) {
+ offset = 0;
+ toDo = d->mSize;
+ /* chew off 32-bit chunks */
+ while (toDo >= 4) {
+ here = mkPCastTo(
+ mce, Ity_I32,
+ expr2vbits_LDle ( mce, Ity_I32,
+ d->mAddr, d->mSize - toDo )
+ );
+ curr = mkUifU32(mce, here, curr);
+ toDo -= 4;
+ }
+ /* chew off 16-bit chunks */
+ while (toDo >= 2) {
+ here = mkPCastTo(
+ mce, Ity_I32,
+ expr2vbits_LDle ( mce, Ity_I16,
+ d->mAddr, d->mSize - toDo )
+ );
+ curr = mkUifU32(mce, here, curr);
+ toDo -= 2;
+ }
+ tl_assert(toDo == 0); /* also need to handle 1-byte excess */
+ }
+
+ /* Whew! So curr is a 32-bit V-value summarising pessimistically
+ all the inputs to the helper. Now we need to re-distribute the
+ results to all destinations. */
+
+ /* Outputs: the destination temporary, if there is one. */
+ if (d->tmp != IRTemp_INVALID) {
+ dst = findShadowTmp(mce, d->tmp);
+ tyDst = typeOfIRTemp(mce->bb->tyenv, d->tmp);
+ assign( mce->bb, dst, mkPCastTo( mce, tyDst, curr) );
+ }
+
+ /* Outputs: guest state that we write or modify. */
+ for (i = 0; i < d->nFxState; i++) {
+ tl_assert(d->fxState[i].fx != Ifx_None);
+ if (d->fxState[i].fx == Ifx_Read)
+ continue;
+ /* Ignore any sections marked as 'always defined'. */
+ if (isAlwaysDefd(mce, d->fxState[i].offset, d->fxState[i].size ))
+ continue;
+ /* This state element is written or modified. So we need to
+ consider it. If larger than 8 bytes, deal with it in 8-byte
+ chunks. */
+ gSz = d->fxState[i].size;
+ gOff = d->fxState[i].offset;
+ tl_assert(gSz > 0);
+ while (True) {
+ if (gSz == 0) break;
+ n = gSz <= 8 ? gSz : 8;
+ /* Write suitably-casted 'curr' to the state slice
+ gOff .. gOff+n-1 */
+ tyDst = szToITy( n );
+ do_shadow_PUT( mce, gOff,
+ NULL, /* original atom */
+ mkPCastTo( mce, tyDst, curr ) );
+ gSz -= n;
+ gOff += n;
+ }
+ }
+
+ /* Outputs: memory that we write or modify. */
+ if (d->mFx == Ifx_Write || d->mFx == Ifx_Modify) {
+ offset = 0;
+ toDo = d->mSize;
+ /* chew off 32-bit chunks */
+ while (toDo >= 4) {
+ do_shadow_STle( mce, d->mAddr, d->mSize - toDo,
+ NULL, /* original data */
+ mkPCastTo( mce, Ity_I32, curr ) );
+ toDo -= 4;
+ }
+ /* chew off 16-bit chunks */
+ while (toDo >= 2) {
+ do_shadow_STle( mce, d->mAddr, d->mSize - toDo,
+ NULL, /* original data */
+ mkPCastTo( mce, Ity_I16, curr ) );
+ toDo -= 2;
+ }
+ tl_assert(toDo == 0); /* also need to handle 1-byte excess */
+ }
+
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Memcheck main ---*/
+/*------------------------------------------------------------*/
+
+static Bool isBogusAtom ( IRAtom* at )
+{
+ ULong n = 0;
+ IRConst* con;
+ tl_assert(isIRAtom(at));
+ if (at->tag == Iex_RdTmp)
+ return False;
+ tl_assert(at->tag == Iex_Const);
+ con = at->Iex.Const.con;
+ switch (con->tag) {
+ case Ico_U8: n = (ULong)con->Ico.U8; break;
+ case Ico_U16: n = (ULong)con->Ico.U16; break;
+ case Ico_U32: n = (ULong)con->Ico.U32; break;
+ case Ico_U64: n = (ULong)con->Ico.U64; break;
+ default: ppIRExpr(at); tl_assert(0);
+ }
+ /* VG_(printf)("%llx\n", n); */
+ return (n == 0xFEFEFEFF
+ || n == 0x80808080
+ || n == 0x1010101
+ || n == 1010100);
+}
+
+__attribute__((unused))
+static Bool checkForBogusLiterals ( /*FLAT*/ IRStmt* st )
+{
+ Int i;
+ IRExpr* e;
+ switch (st->tag) {
+ case Ist_WrTmp:
+ e = st->Ist.WrTmp.data;
+ switch (e->tag) {
+ case Iex_Get:
+ case Iex_RdTmp:
+ return False;
+ case Iex_Unop:
+ return isBogusAtom(e->Iex.Unop.arg);
+ case Iex_Binop:
+ return isBogusAtom(e->Iex.Binop.arg1)
+ || isBogusAtom(e->Iex.Binop.arg2);
+ case Iex_Mux0X:
+ return isBogusAtom(e->Iex.Mux0X.cond)
+ || isBogusAtom(e->Iex.Mux0X.expr0)
+ || isBogusAtom(e->Iex.Mux0X.exprX);
+ case Iex_Load:
+ return isBogusAtom(e->Iex.Load.addr);
+ case Iex_CCall:
+ for (i = 0; e->Iex.CCall.args[i]; i++)
+ if (isBogusAtom(e->Iex.CCall.args[i]))
+ return True;
+ return False;
+ default:
+ goto unhandled;
+ }
+ case Ist_Put:
+ return isBogusAtom(st->Ist.Put.data);
+ case Ist_Store:
+ return isBogusAtom(st->Ist.Store.addr)
+ || isBogusAtom(st->Ist.Store.data);
+ case Ist_Exit:
+ return isBogusAtom(st->Ist.Exit.guard);
+ default:
+ unhandled:
+ ppIRStmt(st);
+ VG_(tool_panic)("hasBogusLiterals");
+ }
+}
+
+IRSB* mc_instrument ( void* closureV,
+ IRSB* bb_in, VexGuestLayout* layout,
+ VexGuestExtents* vge,
+ IRType gWordTy, IRType hWordTy )
+{
+ Bool verboze = False; //True;
+
+ /* Bool hasBogusLiterals = False; */
+
+ Int i, j, first_stmt;
+ IRStmt* st;
+ MCEnv mce;
+
+ /* Set up BB */
+ IRSB* bb = emptyIRSB();
+ bb->tyenv = deepCopyIRTypeEnv(bb_in->tyenv);
+ bb->next = deepCopyIRExpr(bb_in->next);
+ bb->jumpkind = bb_in->jumpkind;
+
+ /* Set up the running environment. Only .bb is modified as we go
+ along. */
+ mce.bb = bb;
+ mce.layout = layout;
+ mce.n_originalTmps = bb->tyenv->types_used;
+ mce.hWordTy = hWordTy;
+ mce.tmpMap = LibVEX_Alloc(mce.n_originalTmps * sizeof(IRTemp));
+ for (i = 0; i < mce.n_originalTmps; i++)
+ mce.tmpMap[i] = IRTemp_INVALID;
+
+ /* Iterate over the stmts. */
+
+ for (i = 0; i < bb_in->stmts_used; i++) {
+ st = bb_in->stmts[i];
+ if (!st) continue;
+
+ tl_assert(isFlatIRStmt(st));
+
+ /*
+ if (!hasBogusLiterals) {
+ hasBogusLiterals = checkForBogusLiterals(st);
+ if (hasBogusLiterals) {
+ VG_(printf)("bogus: ");
+ ppIRStmt(st);
+ VG_(printf)("\n");
+ }
+ }
+ */
+ first_stmt = bb->stmts_used;
+
+ if (verboze) {
+ ppIRStmt(st);
+ VG_(printf)("\n\n");
+ }
+
+ switch (st->tag) {
+
+ case Ist_WrTmp:
+ assign( bb, findShadowTmp(&mce, st->Ist.WrTmp.tmp),
+ expr2vbits( &mce, st->Ist.WrTmp.data) );
+ break;
+
+ case Ist_Put:
+ do_shadow_PUT( &mce,
+ st->Ist.Put.offset,
+ st->Ist.Put.data,
+ NULL /* shadow atom */ );
+ break;
+
+ case Ist_PutI:
+ do_shadow_PUTI( &mce,
+ st->Ist.PutI.descr,
+ st->Ist.PutI.ix,
+ st->Ist.PutI.bias,
+ st->Ist.PutI.data );
+ break;
+
+ case Ist_Store:
+ do_shadow_STle( &mce, st->Ist.Store.addr, 0/* addr bias */,
+ st->Ist.Store.data,
+ NULL /* shadow data */ );
+ break;
+
+ case Ist_Exit:
+ /* if (!hasBogusLiterals) */
+ complainIfUndefined( &mce, st->Ist.Exit.guard );
+ break;
+
+ case Ist_Dirty:
+ do_shadow_Dirty( &mce, st->Ist.Dirty.details );
+ break;
+
+ case Ist_IMark:
+ case Ist_NoOp:
+ break;
+
+ default:
+ VG_(printf)("\n");
+ ppIRStmt(st);
+ VG_(printf)("\n");
+ VG_(tool_panic)("memcheck: unhandled IRStmt");
+
+ } /* switch (st->tag) */
+
+ if (verboze) {
+ for (j = first_stmt; j < bb->stmts_used; j++) {
+ VG_(printf)(" ");
+ ppIRStmt(bb->stmts[j]);
+ VG_(printf)("\n");
+ }
+ VG_(printf)("\n");
+ }
+
+ addStmtToIRSB(bb, st);
+
+ }
+
+ /* Now we need to complain if the jump target is undefined. */
+ first_stmt = bb->stmts_used;
+
+ if (verboze) {
+ VG_(printf)("bb->next = ");
+ ppIRExpr(bb->next);
+ VG_(printf)("\n\n");
+ }
+
+ complainIfUndefined( &mce, bb->next );
+
+ if (verboze) {
+ for (j = first_stmt; j < bb->stmts_used; j++) {
+ VG_(printf)(" ");
+ ppIRStmt(bb->stmts[j]);
+ VG_(printf)("\n");
+ }
+ VG_(printf)("\n");
+ }
+
+ return bb;
+}
+#endif /* UNUSED */
+
+/*--------------------------------------------------------------------*/
+/*--- end test_main.c ---*/
+/*--------------------------------------------------------------------*/
diff --git a/main/VEX/test_main.h b/main/VEX/test_main.h
new file mode 100644
index 0000000..0005fd6
--- /dev/null
+++ b/main/VEX/test_main.h
@@ -0,0 +1,35 @@
+
+/* Copy this file (test_main.h.in) to test_main.h, and edit */
+
+/* DEBUG RUN, ON V */
+#if 0
+#define TEST_VSUPPORT True
+#define TEST_N_ITERS 1
+#define TEST_N_BBS 1
+#define TEST_FLAGS (1<<7) /* |(1<<2)|(1<<1) */
+#endif
+
+/* CHECKING RUN, ON V */
+#if 1
+#define TEST_VSUPPORT True
+#define TEST_N_ITERS 1
+#define TEST_N_BBS 100000
+#define TEST_FLAGS 0
+#endif
+
+/* PROFILING RUN, NATIVE */
+#if 0
+#define TEST_VSUPPORT False
+#define TEST_N_ITERS 100
+#define TEST_N_BBS 1000
+#define TEST_FLAGS 0
+#endif
+
+/* PROFILING RUN, REDUCED WORKLOAD */
+#if 0
+#define TEST_VSUPPORT False
+#define TEST_N_ITERS 3
+#define TEST_N_BBS 1000
+#define TEST_FLAGS 0
+#endif
+
diff --git a/main/VEX/test_main.h.base b/main/VEX/test_main.h.base
new file mode 100644
index 0000000..9087629
--- /dev/null
+++ b/main/VEX/test_main.h.base
@@ -0,0 +1,35 @@
+
+/* Copy this file (test_main.h.in) to test_main.h, and edit */
+
+/* DEBUG RUN, ON V */
+#if 1
+#define TEST_VSUPPORT True
+#define TEST_N_ITERS 1
+#define TEST_N_BBS 1
+#define TEST_FLAGS (1<<7)
+#endif
+
+/* CHECKING RUN, ON V */
+#if 0
+#define TEST_VSUPPORT True
+#define TEST_N_ITERS 1
+#define TEST_N_BBS 100000
+#define TEST_FLAGS 0
+#endif
+
+/* PROFILING RUN, NATIVE */
+#if 0
+#define TEST_VSUPPORT False
+#define TEST_N_ITERS 100
+#define TEST_N_BBS 1000
+#define TEST_FLAGS 0
+#endif
+
+/* PROFILING RUN, REDUCED WORKLOAD */
+#if 0
+#define TEST_VSUPPORT False
+#define TEST_N_ITERS 3
+#define TEST_N_BBS 1000
+#define TEST_FLAGS 0
+#endif
+
diff --git a/main/VEX/unused/arena.h b/main/VEX/unused/arena.h
new file mode 100644
index 0000000..a74936c
--- /dev/null
+++ b/main/VEX/unused/arena.h
@@ -0,0 +1,47 @@
+
+/* This is a modified version of the file "arena.h" from
+ "C Interfaces and Implementations", by David R. Hanson.
+ The license is below.
+*/
+/*
+
+The author of this software is David R. Hanson.
+
+Copyright (c) 1994,1995,1996,1997 by David R. Hanson. All Rights Reserved.
+
+Permission to use, copy, modify, and distribute this software for any
+purpose, subject to the provisions described below, without fee is
+hereby granted, provided that this entire notice is included in all
+copies of any software that is or includes a copy or modification of
+this software and in all copies of the supporting documentation for
+such software.
+
+THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED
+WARRANTY. IN PARTICULAR, THE AUTHOR DOES MAKE ANY REPRESENTATION OR
+WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY OF THIS SOFTWARE OR
+ITS FITNESS FOR ANY PARTICULAR PURPOSE.
+
+David Hanson / drh@microsoft.com / http://www.research.microsoft.com/~drh/
+$Id: CPYRIGHT,v 1.2 1997/11/04 22:31:40 drh Exp $
+*/
+
+/* $Id: H:/drh/idioms/book/RCS/arena.doc,v 1.10 1997/02/21 19:45:19 drh Exp $ */
+
+#ifndef _CII_ARENA_H
+#define _CII_ARENA_H
+
+//#include "except.h"
+#define T Arena_T
+typedef struct T *T;
+//extern const Except_T Arena_NewFailed;
+//extern const Except_T Arena_Failed;
+extern T Arena_new (void);
+extern void Arena_dispose(T *ap);
+extern void *Arena_alloc (T arena, long nbytes,
+ const char *file, int line);
+extern void *Arena_calloc(T arena, long count,
+ long nbytes, const char *file, int line);
+extern void Arena_free (T arena);
+#undef T
+
+#endif /* ndef _CII_ARENA_H */
diff --git a/main/VEX/unused/dispatch.c b/main/VEX/unused/dispatch.c
new file mode 100644
index 0000000..d5fc6f3
--- /dev/null
+++ b/main/VEX/unused/dispatch.c
@@ -0,0 +1,97 @@
+
+/*---------------------------------------------------------------*/
+/*--- begin dispatch.c ---*/
+/*---------------------------------------------------------------*/
+
+#include "basictypes.h"
+
+
+/* --------------------------------------------------------- */
+/* TRANSLATION TABLE/CACHE */
+/* --------------------------------------------------------- */
+
+static
+char* find_translation ( char* orig )
+{
+ int i;
+ for (i = 0; i < n_transtab_used; i++)
+ if (transtab[i].orig == orig)
+ return transtab[i].trans;
+ return NULL;
+}
+
+
+#define N_TT_ENTRIES 1000
+
+typedef
+ struct {
+ char* orig;
+ int orig_size;
+ char* trans;
+ int trans_size;
+ }
+ TTEntry;
+
+int n_transtab_used = 0;
+TTEntry transtab[N_TT_ENTRIES];
+
+
+/* Call here to add a translation to the trans cache.
+ Supplied translation is in mallocville. add_translation should
+ copy it out as the caller will free it on return. */
+
+/* EXPORTED */
+void add_translation ( char* orig, int orig_size, char* trans, int trans_size )
+{
+ int i;
+ assert(n_transtab_used < N_TT_ENTRIES);
+ transtab[n_transtab_used].orig = orig;
+ transtab[n_transtab_used].orig_size = orig_size;
+ transtab[n_transtab_used].trans_size = trans_size;
+
+ transtab[n_transtab_used].trans = malloc(trans_size);
+ assert(transtab[n_transtab_used].trans != NULL);
+ for (i = 0; i < trans_size; i++)
+ transtab[n_transtab_used].trans[i] = trans[i];
+
+#ifdef arm_TARGET_ARCH
+ arm_notify_new_code(transtab[n_transtab_used].trans, trans_size);
+#endif
+
+ n_transtab_used++;
+}
+
+/* Run the simulated machine for a while. Returns when a new BB needs
+ to be translated, and returns its address. Returns NULL when we
+ want to stop. */
+
+/* EXPORTED */
+char* run_machine ( void )
+{
+ char* nextpc_orig;
+ char* nextpc_trans;
+ while (1) {
+ nextpc_orig = (char*)(regs_arm[REG_PC]);
+ if (nextpc_orig == stop_at)
+ return NULL;
+ nextpc_trans = find_translation(nextpc_orig);
+ if (nextpc_trans == NULL)
+ return nextpc_orig;
+ run_translation(nextpc_trans, (char*) ®s_arm[0] );
+ }
+}
+
+
+/* HOW TO USE:
+
+ for a main fn :: void main ( void )
+
+ * load .o's, link, etc
+
+ * call initialise_machine with & main
+
+ * call run_machine repeatedly. If it returns NULL, stop. Else
+ make a translation of the returned address, pass it to
+ add_translation, and resume running by calling run_machine.
+
+*/
diff --git a/main/VEX/unused/linker.c b/main/VEX/unused/linker.c
new file mode 100644
index 0000000..78c2903
--- /dev/null
+++ b/main/VEX/unused/linker.c
@@ -0,0 +1,1422 @@
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <assert.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <unistd.h>
+#include <elf.h>
+#include <fcntl.h>
+#include <string.h>
+#include <malloc.h>
+
+
+#define IF_DEBUG(x,y) /* */
+static int debug_linker = 0;
+
+#define i386_TARGET_ARCH
+// #define arm_TARGET_ARCH
+
+#if !defined(i386_TARGET_ARCH) && !defined(arm_TARGET_ARCH)
+# error "Must #define i386_TARGET_ARCH or arm_TARGET_ARCH"
+#endif
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// TYPES
+
+#define FALSE 0
+#define TRUE 1
+
+typedef enum { OBJECT_LOADED, OBJECT_RESOLVED } OStatus;
+
+
+#define N_FIXUP_PAGES 1
+
+
+/* Indication of section kinds for loaded objects. Needed by
+ the GC for deciding whether or not a pointer on the stack
+ is a code pointer.
+*/
+typedef
+ enum { SECTIONKIND_CODE_OR_RODATA,
+ SECTIONKIND_RWDATA,
+ SECTIONKIND_OTHER,
+ SECTIONKIND_NOINFOAVAIL }
+ SectionKind;
+
+typedef
+ struct _Section {
+ void* start;
+ void* end;
+ SectionKind kind;
+ struct _Section* next;
+ }
+ Section;
+
+typedef
+ struct _ProddableBlock {
+ void* start;
+ int size;
+ struct _ProddableBlock* next;
+ }
+ ProddableBlock;
+
+/* Top-level structure for an object module. One of these is allocated
+ * for each object file in use.
+ */
+typedef struct _ObjectCode {
+ OStatus status;
+ char* fileName;
+ int fileSize;
+ char* formatName; /* eg "ELF32", "DLL", "COFF", etc. */
+
+ /* An array containing ptrs to all the symbol names copied from
+ this object into the global symbol hash table. This is so that
+ we know which parts of the latter mapping to nuke when this
+ object is removed from the system. */
+ char** symbols;
+ int n_symbols;
+
+ /* ptr to malloc'd lump of memory holding the obj file */
+ void* image;
+
+ /* Fixup area for long-distance jumps. */
+ char* fixup;
+ int fixup_used;
+ int fixup_size;
+
+ /* The section-kind entries for this object module. Linked
+ list. */
+ Section* sections;
+
+ /* A private hash table for local symbols. */
+ /* HashTable* */ void* lochash;
+
+ /* Allow a chain of these things */
+ struct _ObjectCode * next;
+
+ /* SANITY CHECK ONLY: a list of the only memory regions which may
+ safely be prodded during relocation. Any attempt to prod
+ outside one of these is an error in the linker. */
+ ProddableBlock* proddables;
+
+} ObjectCode;
+
+/*
+ * Define a set of types which can be used for both ELF32 and ELF64
+ */
+
+#ifdef ELF_64BIT
+#define ELFCLASS ELFCLASS64
+#define Elf_Addr Elf64_Addr
+#define Elf_Word Elf64_Word
+#define Elf_Sword Elf64_Sword
+#define Elf_Ehdr Elf64_Ehdr
+#define Elf_Phdr Elf64_Phdr
+#define Elf_Shdr Elf64_Shdr
+#define Elf_Sym Elf64_Sym
+#define Elf_Rel Elf64_Rel
+#define Elf_Rela Elf64_Rela
+#define ELF_ST_TYPE ELF64_ST_TYPE
+#define ELF_ST_BIND ELF64_ST_BIND
+#define ELF_R_TYPE ELF64_R_TYPE
+#define ELF_R_SYM ELF64_R_SYM
+#else
+#define ELFCLASS ELFCLASS32
+#define Elf_Addr Elf32_Addr
+#define Elf_Word Elf32_Word
+#define Elf_Sword Elf32_Sword
+#define Elf_Ehdr Elf32_Ehdr
+#define Elf_Phdr Elf32_Phdr
+#define Elf_Shdr Elf32_Shdr
+#define Elf_Sym Elf32_Sym
+#define Elf_Rel Elf32_Rel
+#define Elf_Rela Elf32_Rela
+#ifndef ELF_ST_TYPE
+#define ELF_ST_TYPE ELF32_ST_TYPE
+#endif
+#ifndef ELF_ST_BIND
+#define ELF_ST_BIND ELF32_ST_BIND
+#endif
+#ifndef ELF_R_TYPE
+#define ELF_R_TYPE ELF32_R_TYPE
+#endif
+#ifndef ELF_R_SYM
+#define ELF_R_SYM ELF32_R_SYM
+#endif
+#endif
+
+
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// PARANOIA
+
+/* -----------------------------------------------------------------------
+ * Sanity checking. For each ObjectCode, maintain a list of address ranges
+ * which may be prodded during relocation, and abort if we try and write
+ * outside any of these.
+ */
+static void addProddableBlock ( ObjectCode* oc, void* start, int size )
+{
+ ProddableBlock* pb
+ = malloc(sizeof(ProddableBlock));
+ if (debug_linker)
+ fprintf(stderr, "aPB oc=%p %p %d (%p .. %p)\n", oc, start, size,
+ start, ((char*)start)+size-1 );
+ assert(size > 0);
+ pb->start = start;
+ pb->size = size;
+ pb->next = oc->proddables;
+ oc->proddables = pb;
+}
+
+static void checkProddableBlock ( ObjectCode* oc, void* addr )
+{
+ ProddableBlock* pb;
+ for (pb = oc->proddables; pb != NULL; pb = pb->next) {
+ char* s = (char*)(pb->start);
+ char* e = s + pb->size - 1;
+ char* a = (char*)addr;
+ /* Assumes that the biggest fixup involves a 4-byte write. This
+ probably needs to be changed to 8 (ie, +7) on 64-bit
+ plats. */
+ if (a >= s && (a+3) <= e) return;
+ }
+ fprintf(stderr,
+ "checkProddableBlock: invalid fixup %p in runtime linker\n",
+ addr);
+ exit(1);
+}
+
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// String->Addr mappings
+
+typedef
+ struct { char* mp_name; void* mp_addr; }
+ Maplet;
+
+typedef
+ struct {
+ int sm_size;
+ int sm_used;
+ Maplet* maplets;
+ }
+ StringMap;
+
+static StringMap* new_StringMap ( void )
+{
+ StringMap* sm = malloc(sizeof(StringMap));
+ sm->sm_size = 10;
+ sm->sm_used = 0;
+ sm->maplets = malloc(10 * sizeof(Maplet));
+ return sm;
+}
+
+static void delete_StringMap ( StringMap* sm )
+{
+ assert(sm->maplets != NULL);
+ free(sm->maplets);
+ sm->maplets = NULL;
+ free(sm);
+}
+
+static void ensure_StringMap ( StringMap* sm )
+{
+ int i;
+ Maplet* mp2;
+ assert(sm->maplets != NULL);
+ if (sm->sm_used < sm->sm_size)
+ return;
+ sm->sm_size *= 2;
+ mp2 = malloc(sm->sm_size * sizeof(Maplet));
+ for (i = 0; i < sm->sm_used; i++)
+ mp2[i] = sm->maplets[i];
+ free(sm->maplets);
+ sm->maplets = mp2;
+}
+
+static void* search_StringMap ( StringMap* sm, char* name )
+{
+ int i;
+ for (i = 0; i < sm->sm_used; i++)
+ if (0 == strcmp(name, sm->maplets[i].mp_name))
+ return sm->maplets[i].mp_addr;
+ return NULL;
+}
+
+static void addto_StringMap ( StringMap* sm, char* name, void* addr )
+{
+ ensure_StringMap(sm);
+ sm->maplets[sm->sm_used].mp_name = name;
+ sm->maplets[sm->sm_used].mp_addr = addr;
+ sm->sm_used++;
+}
+
+static void paranoid_addto_StringMap ( StringMap* sm, char* name, void* addr )
+{
+ if (search_StringMap(sm,name) != NULL) {
+ fprintf(stderr, "paranoid_addto_StringMap(%s,%p)\n", name, addr);
+ exit(1);
+ }
+ addto_StringMap(sm,name,addr);
+}
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// Top-level linker control.
+
+StringMap* global_symbol_table = NULL;
+ObjectCode* global_object_list = NULL;
+
+static void initLinker ( void )
+{
+ if (global_symbol_table != NULL)
+ return;
+ global_symbol_table = new_StringMap();
+}
+
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// SYMBOL TABLE(s)
+
+/* -----------------------------------------------------------------
+ * lookup a symbol in the global symbol table
+ */
+static
+void * lookupSymbol( char *lbl )
+{
+ void *val;
+ initLinker() ;
+ assert(global_symbol_table != NULL);
+ val = search_StringMap(global_symbol_table, lbl);
+ return val;
+}
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// HELPERS
+
+/*
+ * Generic ELF functions
+ */
+
+static char *
+findElfSection ( void* objImage, Elf_Word sh_type )
+{
+ char* ehdrC = (char*)objImage;
+ Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
+ Elf_Shdr* shdr = (Elf_Shdr*)(ehdrC + ehdr->e_shoff);
+ char* sh_strtab = ehdrC + shdr[ehdr->e_shstrndx].sh_offset;
+ char* ptr = NULL;
+ int i;
+
+ for (i = 0; i < ehdr->e_shnum; i++) {
+ if (shdr[i].sh_type == sh_type
+ /* Ignore the section header's string table. */
+ && i != ehdr->e_shstrndx
+ /* Ignore string tables named .stabstr, as they contain
+ debugging info. */
+ && 0 != memcmp(".stabstr", sh_strtab + shdr[i].sh_name, 8)
+ ) {
+ ptr = ehdrC + shdr[i].sh_offset;
+ break;
+ }
+ }
+ return ptr;
+}
+
+#ifdef arm_TARGET_ARCH
+static
+char* alloc_fixup_bytes ( ObjectCode* oc, int nbytes )
+{
+ char* res;
+ assert(nbytes % 4 == 0);
+ assert(nbytes > 0);
+ res = &(oc->fixup[oc->fixup_used]);
+ oc->fixup_used += nbytes;
+ if (oc->fixup_used >= oc->fixup_size) {
+ fprintf(stderr, "fixup area too small for %s\n", oc->fileName);
+ exit(1);
+ }
+ return res;
+}
+#endif
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// RESOLVE
+
+static
+void* lookup_magic_hacks ( char* sym )
+{
+ if (0==strcmp(sym, "printf")) return (void*)(&printf);
+ return NULL;
+}
+
+#ifdef arm_TARGET_ARCH
+static
+void arm_notify_new_code ( char* start, int length )
+{
+ __asm __volatile ("mov r1, %0\n\t"
+ "mov r2, %1\n\t"
+ "mov r3, %2\n\t"
+ "swi 0x9f0002\n\t"
+ :
+ : "ir" (start), "ir" (length), "ir" (0) );
+}
+
+
+static
+void gen_armle_goto ( char* fixup, char* dstP )
+{
+ Elf_Word w = (Elf_Word)dstP;
+ /*
+ 2 .text
+ 3 0000 04F01FE5 ldr pc, value
+ 4 0004 44332211 value: .word 0x11223344
+ */
+ fprintf(stderr,"at %p generating jump to %p\n", fixup, dstP );
+ fixup[0] = 0x04; fixup[1] = 0xF0; fixup[2] = 0x1F; fixup[3] = 0xE5;
+ fixup[4] = w & 0xFF; w >>= 8;
+ fixup[5] = w & 0xFF; w >>= 8;
+ fixup[6] = w & 0xFF; w >>= 8;
+ fixup[7] = w & 0xFF; w >>= 8;
+ arm_notify_new_code(fixup, 8);
+}
+#endif /* arm_TARGET_ARCH */
+
+
+
+/* Do ELF relocations which lack an explicit addend. All x86-linux
+ relocations appear to be of this form. */
+static int
+do_Elf_Rel_relocations ( ObjectCode* oc, char* ehdrC,
+ Elf_Shdr* shdr, int shnum,
+ Elf_Sym* stab, char* strtab )
+{
+ int j;
+ char *symbol = NULL;
+ Elf_Word* targ;
+ Elf_Rel* rtab = (Elf_Rel*) (ehdrC + shdr[shnum].sh_offset);
+ int nent = shdr[shnum].sh_size / sizeof(Elf_Rel);
+ int target_shndx = shdr[shnum].sh_info;
+ int symtab_shndx = shdr[shnum].sh_link;
+
+ stab = (Elf_Sym*) (ehdrC + shdr[ symtab_shndx ].sh_offset);
+ targ = (Elf_Word*)(ehdrC + shdr[ target_shndx ].sh_offset);
+ IF_DEBUG(linker,belch( "relocations for section %d using symtab %d",
+ target_shndx, symtab_shndx ));
+
+ for (j = 0; j < nent; j++) {
+ Elf_Addr offset = rtab[j].r_offset;
+ Elf_Addr info = rtab[j].r_info;
+
+ Elf_Addr P = ((Elf_Addr)targ) + offset;
+ Elf_Word* pP = (Elf_Word*)P;
+ Elf_Addr A = *pP;
+ Elf_Addr S;
+ Elf_Addr value;
+
+ IF_DEBUG(linker,belch( "Rel entry %3d is raw(%6p %6p)",
+ j, (void*)offset, (void*)info ));
+ if (!info) {
+ IF_DEBUG(linker,belch( " ZERO" ));
+ S = 0;
+ } else {
+ Elf_Sym sym = stab[ELF_R_SYM(info)];
+ /* First see if it is a local symbol. */
+ if (ELF_ST_BIND(sym.st_info) == STB_LOCAL) {
+ /* Yes, so we can get the address directly from the ELF symbol
+ table. */
+ symbol = sym.st_name==0 ? "(noname)" : strtab+sym.st_name;
+ S = (Elf_Addr)
+ (ehdrC + shdr[ sym.st_shndx ].sh_offset
+ + stab[ELF_R_SYM(info)].st_value);
+
+ } else {
+ /* No, so look up the name in our global table. */
+ symbol = strtab + sym.st_name;
+ S = (Elf_Addr)lookupSymbol( symbol );
+ }
+ if (!S) {
+ S = (Elf_Addr)lookup_magic_hacks(symbol);
+ }
+ if (!S) {
+ fprintf(stderr,"%s: unknown symbol `%s'\n",
+ oc->fileName, symbol);
+ return 0;
+ }
+ if (debug_linker>1)
+ fprintf(stderr, "\n`%s' resolves to %p\n", symbol, (void*)S );
+ }
+
+ if (debug_linker>1)
+ fprintf(stderr, "Reloc: P = %p S = %p A = %p\n",
+ (void*)P, (void*)S, (void*)A );
+ checkProddableBlock ( oc, pP );
+
+ value = S + A;
+
+ switch (ELF_R_TYPE(info)) {
+# ifdef i386_TARGET_ARCH
+ case R_386_32: *pP = value; break;
+ case R_386_PC32: *pP = value - P; break;
+# endif
+# ifdef arm_TARGET_ARCH
+ case R_ARM_PC24: {
+ Elf_Word w, delta, deltaTop8;
+ /* Generate a jump sequence into the fixup area
+ and branch to that instead. */
+ char* fixup = alloc_fixup_bytes(oc, 8);
+ /* First of all, figure out where we're really trying to
+ jump to. */
+ // compensate for pc+8 bias
+ Elf_Word real_dst = (A & 0x00FFFFFF) + 2;
+ // sign-extend 24-to-32 of real_dst
+ if (real_dst & 0x00800000)
+ real_dst |= 0xFF000000;
+ else
+ real_dst &= 0x00FFFFFF;
+
+ real_dst <<= 2;
+ real_dst += S;
+
+ gen_armle_goto(fixup, (char*)real_dst);
+
+ /* Delta is in bytes .. */
+ delta = (((Elf_Word)fixup) - ((Elf_Word)pP) - 8);
+ deltaTop8 = (delta >> 24) & 0xFF;
+ if (deltaTop8 != 0 && deltaTop8 != 0xFF) {
+ fprintf(stderr,"R_ARM_PC24: out of range delta 0x%x for %s\n",
+ delta, symbol);
+ exit(1);
+ }
+ delta >>= 2;
+ w = *pP;
+ w &= 0xFF000000;
+ w |= (0x00FFFFFF & delta );
+ *pP = w;
+ break;
+ }
+ case R_ARM_ABS32:
+ *pP = value;
+ break;
+# endif
+ default:
+ fprintf(stderr,
+ "%s: unhandled ELF relocation(Rel) type %d\n\n",
+ oc->fileName, ELF_R_TYPE(info));
+ return 0;
+ }
+
+ }
+ return 1;
+}
+
+/* Do ELF relocations for which explicit addends are supplied.
+ sparc-solaris relocations appear to be of this form. */
+static int
+do_Elf_Rela_relocations ( ObjectCode* oc, char* ehdrC,
+ Elf_Shdr* shdr, int shnum,
+ Elf_Sym* stab, char* strtab )
+{
+ int j;
+ char *symbol;
+ Elf_Addr targ;
+ Elf_Rela* rtab = (Elf_Rela*) (ehdrC + shdr[shnum].sh_offset);
+ int nent = shdr[shnum].sh_size / sizeof(Elf_Rela);
+ int target_shndx = shdr[shnum].sh_info;
+ int symtab_shndx = shdr[shnum].sh_link;
+
+ stab = (Elf_Sym*) (ehdrC + shdr[ symtab_shndx ].sh_offset);
+ targ = (Elf_Addr) (ehdrC + shdr[ target_shndx ].sh_offset);
+ IF_DEBUG(linker,belch( "relocations for section %d using symtab %d",
+ target_shndx, symtab_shndx ));
+
+ for (j = 0; j < nent; j++) {
+#if defined(DEBUG) || defined(sparc_TARGET_ARCH) || defined(ia64_TARGET_ARCH)
+ /* This #ifdef only serves to avoid unused-var warnings. */
+ Elf_Addr offset = rtab[j].r_offset;
+ Elf_Addr P = targ + offset;
+#endif
+ Elf_Addr info = rtab[j].r_info;
+ Elf_Addr A = rtab[j].r_addend;
+ Elf_Addr S;
+ Elf_Addr value;
+# if defined(sparc_TARGET_ARCH)
+ Elf_Word* pP = (Elf_Word*)P;
+ Elf_Word w1, w2;
+# elif defined(ia64_TARGET_ARCH)
+ Elf64_Xword *pP = (Elf64_Xword *)P;
+ Elf_Addr addr;
+# endif
+
+ IF_DEBUG(linker,belch( "Rel entry %3d is raw(%6p %6p %6p) ",
+ j, (void*)offset, (void*)info,
+ (void*)A ));
+ if (!info) {
+ IF_DEBUG(linker,belch( " ZERO" ));
+ S = 0;
+ } else {
+ Elf_Sym sym = stab[ELF_R_SYM(info)];
+ /* First see if it is a local symbol. */
+ if (ELF_ST_BIND(sym.st_info) == STB_LOCAL) {
+ /* Yes, so we can get the address directly from the ELF symbol
+ table. */
+ symbol = sym.st_name==0 ? "(noname)" : strtab+sym.st_name;
+ S = (Elf_Addr)
+ (ehdrC + shdr[ sym.st_shndx ].sh_offset
+ + stab[ELF_R_SYM(info)].st_value);
+#ifdef ELF_FUNCTION_DESC
+ /* Make a function descriptor for this function */
+ if (S && ELF_ST_TYPE(sym.st_info) == STT_FUNC) {
+ S = allocateFunctionDesc(S + A);
+ A = 0;
+ }
+#endif
+ } else {
+ /* No, so look up the name in our global table. */
+ symbol = strtab + sym.st_name;
+ S = (Elf_Addr)lookupSymbol( symbol );
+
+#ifdef ELF_FUNCTION_DESC
+ /* If a function, already a function descriptor - we would
+ have to copy it to add an offset. */
+ if (S && (ELF_ST_TYPE(sym.st_info) == STT_FUNC) && (A != 0))
+ belch("%s: function %s with addend %p", oc->fileName, symbol, (void *)A);
+#endif
+ }
+ if (!S) {
+ fprintf(stderr,"%s: unknown symbol `%s'\n", oc->fileName, symbol);
+ return 0;
+ }
+ IF_DEBUG(linker,belch( "`%s' resolves to %p\n", symbol, (void*)S ));
+ }
+
+ IF_DEBUG(linker,fprintf ( stderr, "Reloc: P = %p S = %p A = %p\n",
+ (void*)P, (void*)S, (void*)A ));
+ /* checkProddableBlock ( oc, (void*)P ); */
+
+ value = S + A;
+
+ switch (ELF_R_TYPE(info)) {
+# if defined(sparc_TARGET_ARCH)
+ case R_SPARC_WDISP30:
+ w1 = *pP & 0xC0000000;
+ w2 = (Elf_Word)((value - P) >> 2);
+ ASSERT((w2 & 0xC0000000) == 0);
+ w1 |= w2;
+ *pP = w1;
+ break;
+ case R_SPARC_HI22:
+ w1 = *pP & 0xFFC00000;
+ w2 = (Elf_Word)(value >> 10);
+ ASSERT((w2 & 0xFFC00000) == 0);
+ w1 |= w2;
+ *pP = w1;
+ break;
+ case R_SPARC_LO10:
+ w1 = *pP & ~0x3FF;
+ w2 = (Elf_Word)(value & 0x3FF);
+ ASSERT((w2 & ~0x3FF) == 0);
+ w1 |= w2;
+ *pP = w1;
+ break;
+ /* According to the Sun documentation:
+ R_SPARC_UA32
+ This relocation type resembles R_SPARC_32, except it refers to an
+ unaligned word. That is, the word to be relocated must be treated
+ as four separate bytes with arbitrary alignment, not as a word
+ aligned according to the architecture requirements.
+
+ (JRS: which means that freeloading on the R_SPARC_32 case
+ is probably wrong, but hey ...)
+ */
+ case R_SPARC_UA32:
+ case R_SPARC_32:
+ w2 = (Elf_Word)value;
+ *pP = w2;
+ break;
+# elif defined(ia64_TARGET_ARCH)
+ case R_IA64_DIR64LSB:
+ case R_IA64_FPTR64LSB:
+ *pP = value;
+ break;
+ case R_IA64_PCREL64LSB:
+ *pP = value - P;
+ break;
+ case R_IA64_SEGREL64LSB:
+ addr = findElfSegment(ehdrC, value);
+ *pP = value - addr;
+ break;
+ case R_IA64_GPREL22:
+ ia64_reloc_gprel22(P, value);
+ break;
+ case R_IA64_LTOFF22:
+ case R_IA64_LTOFF22X:
+ case R_IA64_LTOFF_FPTR22:
+ addr = allocateGOTEntry(value);
+ ia64_reloc_gprel22(P, addr);
+ break;
+ case R_IA64_PCREL21B:
+ ia64_reloc_pcrel21(P, S, oc);
+ break;
+ case R_IA64_LDXMOV:
+ /* This goes with R_IA64_LTOFF22X and points to the load to
+ * convert into a move. We don't implement relaxation. */
+ break;
+# endif
+ default:
+ fprintf(stderr,
+ "%s: unhandled ELF relocation(RelA) type %d\n",
+ oc->fileName, ELF_R_TYPE(info));
+ return 0;
+ }
+
+ }
+ return 1;
+}
+
+
+static int
+ocResolve_ELF ( ObjectCode* oc )
+{
+ char *strtab;
+ int shnum, ok;
+ Elf_Sym* stab = NULL;
+ char* ehdrC = (char*)(oc->image);
+ Elf_Ehdr* ehdr = (Elf_Ehdr*) ehdrC;
+ Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
+ char* sh_strtab = ehdrC + shdr[ehdr->e_shstrndx].sh_offset;
+
+ /* first find "the" symbol table */
+ stab = (Elf_Sym*) findElfSection ( ehdrC, SHT_SYMTAB );
+
+ /* also go find the string table */
+ strtab = findElfSection ( ehdrC, SHT_STRTAB );
+
+ if (stab == NULL || strtab == NULL) {
+ fprintf(stderr,"%s: can't find string or symbol table\n", oc->fileName);
+ return 0;
+ }
+
+ /* Process the relocation sections. */
+ for (shnum = 0; shnum < ehdr->e_shnum; shnum++) {
+
+ /* Skip sections called ".rel.stab". These appear to contain
+ relocation entries that, when done, make the stabs debugging
+ info point at the right places. We ain't interested in all
+ dat jazz, mun. */
+ if (0 == memcmp(".rel.stab", sh_strtab + shdr[shnum].sh_name, 9))
+ continue;
+
+ if (shdr[shnum].sh_type == SHT_REL ) {
+ ok = do_Elf_Rel_relocations ( oc, ehdrC, shdr,
+ shnum, stab, strtab );
+ if (!ok) return ok;
+ }
+ else
+ if (shdr[shnum].sh_type == SHT_RELA) {
+ ok = do_Elf_Rela_relocations ( oc, ehdrC, shdr,
+ shnum, stab, strtab );
+ if (!ok) return ok;
+ }
+ }
+
+ /* Free the local symbol table; we won't need it again. */
+ delete_StringMap(oc->lochash);
+ oc->lochash = NULL;
+
+ return 1;
+}
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// VERIFY
+
+static int
+ocVerifyImage_ELF ( ObjectCode* oc )
+{
+ Elf_Shdr* shdr;
+ Elf_Sym* stab;
+ int i, j, nent, nstrtab, nsymtabs;
+ char* sh_strtab;
+ char* strtab;
+
+ char* ehdrC = (char*)(oc->image);
+ Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
+
+ if (ehdr->e_ident[EI_MAG0] != ELFMAG0 ||
+ ehdr->e_ident[EI_MAG1] != ELFMAG1 ||
+ ehdr->e_ident[EI_MAG2] != ELFMAG2 ||
+ ehdr->e_ident[EI_MAG3] != ELFMAG3) {
+ fprintf(stderr,"%s: not an ELF object\n", oc->fileName);
+ return 0;
+ }
+
+ if (ehdr->e_ident[EI_CLASS] != ELFCLASS) {
+ fprintf(stderr,"%s: unsupported ELF format\n", oc->fileName);
+ return 0;
+ }
+
+ if (ehdr->e_ident[EI_DATA] == ELFDATA2LSB) {
+ if (debug_linker)
+ fprintf(stderr, "Is little-endian\n" );
+ } else
+ if (ehdr->e_ident[EI_DATA] == ELFDATA2MSB) {
+ if (debug_linker)
+ fprintf(stderr, "Is big-endian\n" );
+ } else {
+ fprintf(stderr,"%s: unknown endiannness\n", oc->fileName);
+ return 0;
+ }
+
+ if (ehdr->e_type != ET_REL) {
+ fprintf(stderr,"%s: not a relocatable object (.o) file\n", oc->fileName);
+ return 0;
+ }
+ if (debug_linker)
+ fprintf(stderr, "Is a relocatable object (.o) file\n" );
+
+ if (debug_linker)
+ fprintf(stderr, "Architecture is " );
+ switch (ehdr->e_machine) {
+ case EM_386: if (debug_linker) fprintf(stderr, "x86\n" ); break;
+ case EM_SPARC: if (debug_linker) fprintf(stderr, "sparc\n" ); break;
+ case EM_ARM: if (debug_linker) fprintf(stderr, "arm\n" ); break;
+#ifdef EM_IA_64
+ case EM_IA_64: if (debug_linker) fprintf(stderr, "ia64\n" ); break;
+#endif
+ default: if (debug_linker) fprintf(stderr, "unknown\n" );
+ fprintf(stderr,"%s: unknown architecture\n", oc->fileName);
+ return 0;
+ }
+
+ if (debug_linker>1) fprintf(stderr,
+ "\nSection header table: start %d, n_entries %d, ent_size %d\n",
+ ehdr->e_shoff, ehdr->e_shnum, ehdr->e_shentsize );
+
+ assert (ehdr->e_shentsize == sizeof(Elf_Shdr));
+
+ shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
+
+ if (ehdr->e_shstrndx == SHN_UNDEF) {
+ fprintf(stderr,"%s: no section header string table\n", oc->fileName);
+ return 0;
+ } else {
+ if (debug_linker>1)
+ fprintf(stderr, "Section header string table is section %d\n",
+ ehdr->e_shstrndx);
+ sh_strtab = ehdrC + shdr[ehdr->e_shstrndx].sh_offset;
+ }
+
+ for (i = 0; i < ehdr->e_shnum; i++) {
+ if (debug_linker>1) fprintf(stderr, "%2d: ", i );
+ if (debug_linker>1) fprintf(stderr, "type=%2d ", (int)shdr[i].sh_type );
+ if (debug_linker>1) fprintf(stderr, "size=%4d ", (int)shdr[i].sh_size );
+ if (debug_linker>1) fprintf(stderr, "offs=%4d ", (int)shdr[i].sh_offset );
+ if (debug_linker>1) fprintf(stderr, " (%p .. %p) ",
+ ehdrC + shdr[i].sh_offset,
+ ehdrC + shdr[i].sh_offset + shdr[i].sh_size - 1);
+
+ if (shdr[i].sh_type == SHT_REL) {
+ if (debug_linker>1) fprintf(stderr, "Rel " );
+ } else if (shdr[i].sh_type == SHT_RELA) {
+ if (debug_linker>1) fprintf(stderr, "RelA " );
+ } else {
+ if (debug_linker>1) fprintf(stderr," ");
+ }
+ if (sh_strtab) {
+ if (debug_linker>1) fprintf(stderr, "sname=%s\n",
+ sh_strtab + shdr[i].sh_name );
+ }
+ }
+
+ if (debug_linker>1) fprintf(stderr, "\nString tables\n" );
+ strtab = NULL;
+ nstrtab = 0;
+ for (i = 0; i < ehdr->e_shnum; i++) {
+ if (shdr[i].sh_type == SHT_STRTAB
+ /* Ignore the section header's string table. */
+ && i != ehdr->e_shstrndx
+ /* Ignore string tables named .stabstr, as they contain
+ debugging info. */
+ && 0 != memcmp(".stabstr", sh_strtab + shdr[i].sh_name, 8)
+ ) {
+ if (debug_linker>1)
+ fprintf(stderr," section %d is a normal string table\n", i );
+ strtab = ehdrC + shdr[i].sh_offset;
+ nstrtab++;
+ }
+ }
+ if (nstrtab != 1) {
+ fprintf(stderr,"%s: no string tables, or too many\n", oc->fileName);
+ return 0;
+ }
+
+ nsymtabs = 0;
+ if (debug_linker>1) fprintf(stderr, "\nSymbol tables\n" );
+ for (i = 0; i < ehdr->e_shnum; i++) {
+ if (shdr[i].sh_type != SHT_SYMTAB) continue;
+ if (debug_linker>1) fprintf(stderr, "section %d is a symbol table\n", i );
+ nsymtabs++;
+ stab = (Elf_Sym*) (ehdrC + shdr[i].sh_offset);
+ nent = shdr[i].sh_size / sizeof(Elf_Sym);
+ if (debug_linker>1) fprintf(stderr,
+ " number of entries is apparently %d (%d rem)\n",
+ nent,
+ shdr[i].sh_size % sizeof(Elf_Sym)
+ );
+ if (0 != shdr[i].sh_size % sizeof(Elf_Sym)) {
+ fprintf(stderr,"%s: non-integral number of symbol table entries\n",
+ oc->fileName);
+ return 0;
+ }
+ for (j = 0; j < nent; j++) {
+ if (debug_linker>1) fprintf(stderr, " %2d ", j );
+ if (debug_linker>1) fprintf(stderr, " sec=%-5d size=%-3d val=%5p ",
+ (int)stab[j].st_shndx,
+ (int)stab[j].st_size,
+ (char*)stab[j].st_value );
+
+ if (debug_linker>1) fprintf(stderr, "type=" );
+ switch (ELF_ST_TYPE(stab[j].st_info)) {
+ case STT_NOTYPE: if (debug_linker>1) fprintf(stderr, "notype " ); break;
+ case STT_OBJECT: if (debug_linker>1) fprintf(stderr, "object " ); break;
+ case STT_FUNC : if (debug_linker>1) fprintf(stderr, "func " ); break;
+ case STT_SECTION: if (debug_linker>1) fprintf(stderr, "section" ); break;
+ case STT_FILE: if (debug_linker>1) fprintf(stderr, "file " ); break;
+ default: if (debug_linker>1) fprintf(stderr, "? " ); break;
+ }
+ if (debug_linker>1) fprintf(stderr, " " );
+
+ if (debug_linker>1) fprintf(stderr, "bind=" );
+ switch (ELF_ST_BIND(stab[j].st_info)) {
+ case STB_LOCAL : if (debug_linker>1) fprintf(stderr, "local " ); break;
+ case STB_GLOBAL: if (debug_linker>1) fprintf(stderr, "global" ); break;
+ case STB_WEAK : if (debug_linker>1) fprintf(stderr, "weak " ); break;
+ default: if (debug_linker>1) fprintf(stderr, "? " ); break;
+ }
+ if (debug_linker>1) fprintf(stderr, " " );
+
+ if (debug_linker>1) fprintf(stderr, "name=%s\n", strtab + stab[j].st_name );
+ }
+ }
+
+ if (nsymtabs == 0) {
+ fprintf(stderr,"%s: didn't find any symbol tables\n", oc->fileName);
+ return 0;
+ }
+
+ return 1;
+}
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// GETNAMES
+
+static int
+ocGetNames_ELF ( ObjectCode* oc )
+{
+ int i, j, k, nent;
+ Elf_Sym* stab;
+
+ char* ehdrC = (char*)(oc->image);
+ Elf_Ehdr* ehdr = (Elf_Ehdr*)ehdrC;
+ char* strtab = findElfSection ( ehdrC, SHT_STRTAB );
+ Elf_Shdr* shdr = (Elf_Shdr*) (ehdrC + ehdr->e_shoff);
+
+ char* sh_strtab = ehdrC + shdr[ehdr->e_shstrndx].sh_offset;
+ char* sec_name;
+
+ assert(global_symbol_table != NULL);
+
+ if (!strtab) {
+ fprintf(stderr,"%s: no strtab\n", oc->fileName);
+ return 0;
+ }
+
+ k = 0;
+ for (i = 0; i < ehdr->e_shnum; i++) {
+ /* Figure out what kind of section it is. Logic derived from
+ Figure 1.14 ("Special Sections") of the ELF document
+ ("Portable Formats Specification, Version 1.1"). */
+ Elf_Shdr hdr = shdr[i];
+ SectionKind kind = SECTIONKIND_OTHER;
+ int is_bss = FALSE;
+
+ if (hdr.sh_type == SHT_PROGBITS
+ && (hdr.sh_flags & SHF_ALLOC) && (hdr.sh_flags & SHF_EXECINSTR)) {
+ /* .text-style section */
+ kind = SECTIONKIND_CODE_OR_RODATA;
+ }
+ else
+ if (hdr.sh_type == SHT_PROGBITS
+ && (hdr.sh_flags & SHF_ALLOC) && (hdr.sh_flags & SHF_WRITE)) {
+ /* .data-style section */
+ kind = SECTIONKIND_RWDATA;
+ }
+ else
+ if (hdr.sh_type == SHT_PROGBITS
+ && (hdr.sh_flags & SHF_ALLOC) && !(hdr.sh_flags & SHF_WRITE)) {
+ /* .rodata-style section */
+ kind = SECTIONKIND_CODE_OR_RODATA;
+ }
+ else
+ if (hdr.sh_type == SHT_NOBITS
+ && (hdr.sh_flags & SHF_ALLOC) && (hdr.sh_flags & SHF_WRITE)) {
+ /* .bss-style section */
+ kind = SECTIONKIND_RWDATA;
+ is_bss = TRUE;
+ }
+
+ if (is_bss && shdr[i].sh_size > 0) {
+ /* This is a non-empty .bss section. Allocate zeroed space for
+ it, and set its .sh_offset field such that
+ ehdrC + .sh_offset == addr_of_zeroed_space. */
+ char* zspace = calloc(1, shdr[i].sh_size);
+ shdr[i].sh_offset = ((char*)zspace) - ((char*)ehdrC);
+ /*
+ fprintf(stderr, "BSS section at 0x%x, size %d\n",
+ zspace, shdr[i].sh_size);
+ */
+ }
+
+ /* When loading objects compiled with -g, it seems there are
+ relocations in various debug-info sections. So we'd better
+ tell addProddableBlock to allow those bits to be prodded. */
+ //fprintf(stderr, "ZZZZZZZZZZ %s\n", sh_strtab + hdr.sh_name);
+ sec_name = sh_strtab + shdr[i].sh_name;
+ if (kind == SECTIONKIND_OTHER
+ && (0 == strcmp(".debug_info", sec_name)
+ || 0 == strcmp(".debug_line", sec_name)
+ || 0 == strcmp(".debug_pubnames", sec_name)
+ || 0 == strcmp(".debug_aranges", sec_name)
+ || 0 == strcmp(".debug_frame", sec_name))) {
+ kind = SECTIONKIND_CODE_OR_RODATA;
+ }
+
+ /* fill in the section info */
+ if (kind != SECTIONKIND_OTHER && shdr[i].sh_size > 0) {
+ addProddableBlock(oc, ehdrC + shdr[i].sh_offset, shdr[i].sh_size);
+ //addSection(oc, kind, ehdrC + shdr[i].sh_offset,
+ // ehdrC + shdr[i].sh_offset + shdr[i].sh_size - 1);
+ }
+
+ if (shdr[i].sh_type != SHT_SYMTAB) continue;
+
+ /* copy stuff into this module's object symbol table */
+ stab = (Elf_Sym*) (ehdrC + shdr[i].sh_offset);
+ nent = shdr[i].sh_size / sizeof(Elf_Sym);
+
+ oc->n_symbols = nent;
+ oc->symbols = malloc(oc->n_symbols * sizeof(char*));
+
+ for (j = 0; j < nent; j++) {
+
+ char isLocal = FALSE; /* avoids uninit-var warning */
+ char* ad = NULL;
+ char* nm = strtab + stab[j].st_name;
+ int secno = stab[j].st_shndx;
+
+ /* Figure out if we want to add it; if so, set ad to its
+ address. Otherwise leave ad == NULL. */
+
+ if (secno == SHN_COMMON) {
+ isLocal = FALSE;
+ ad = calloc(1, stab[j].st_size);
+ /*
+ fprintf(stderr, "COMMON symbol, size %d name %s\n",
+ stab[j].st_size, nm);
+ */
+ /* Pointless to do addProddableBlock() for this area,
+ since the linker should never poke around in it. */
+ }
+ else
+ if ( ( ELF_ST_BIND(stab[j].st_info)==STB_GLOBAL
+ || ELF_ST_BIND(stab[j].st_info)==STB_LOCAL
+ )
+ /* and not an undefined symbol */
+ && stab[j].st_shndx != SHN_UNDEF
+ /* and not in a "special section" */
+ && stab[j].st_shndx < SHN_LORESERVE
+ &&
+ /* and it's a not a section or string table or anything silly */
+ ( ELF_ST_TYPE(stab[j].st_info)==STT_FUNC ||
+ ELF_ST_TYPE(stab[j].st_info)==STT_OBJECT ||
+ ELF_ST_TYPE(stab[j].st_info)==STT_NOTYPE
+ )
+ ) {
+ /* Section 0 is the undefined section, hence > and not >=. */
+ assert(secno > 0 && secno < ehdr->e_shnum);
+ /*
+ if (shdr[secno].sh_type == SHT_NOBITS) {
+ fprintf(stderr, " BSS symbol, size %d off %d name %s\n",
+ stab[j].st_size, stab[j].st_value, nm);
+ }
+ */
+ ad = ehdrC + shdr[ secno ].sh_offset + stab[j].st_value;
+ if (ELF_ST_BIND(stab[j].st_info)==STB_LOCAL) {
+ isLocal = TRUE;
+ } else {
+#ifdef ELF_FUNCTION_DESC
+ /* dlsym() and the initialisation table both give us function
+ * descriptors, so to be consistent we store function descriptors
+ * in the symbol table */
+ if (ELF_ST_TYPE(stab[j].st_info) == STT_FUNC)
+ ad = (char *)allocateFunctionDesc((Elf_Addr)ad);
+#endif
+ if (debug_linker)
+ fprintf(stderr, "addOTabName(GLOB): %10p %s %s\n",
+ ad, oc->fileName, nm );
+ isLocal = FALSE;
+ }
+ }
+
+ /* And the decision is ... */
+
+ if (ad != NULL) {
+ assert(nm != NULL);
+ oc->symbols[j] = nm;
+ /* Acquire! */
+ if (isLocal) {
+ /* Ignore entirely. */
+ } else {
+ //ghciInsertStrHashTable(oc->fileName, global_symbol_table, nm, ad);
+ paranoid_addto_StringMap(global_symbol_table, nm, ad);
+ }
+ } else {
+ /* Skip. */
+ if (debug_linker>1) fprintf(stderr, "skipping `%s'\n",
+ strtab + stab[j].st_name );
+ /*
+ fprintf(stderr,
+ "skipping bind = %d, type = %d, shndx = %d `%s'\n",
+ (int)ELF_ST_BIND(stab[j].st_info),
+ (int)ELF_ST_TYPE(stab[j].st_info),
+ (int)stab[j].st_shndx,
+ strtab + stab[j].st_name
+ );
+ */
+ oc->symbols[j] = NULL;
+ }
+
+ }
+ }
+
+ return 1;
+}
+
+
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////
+//
+// TOP-LEVEL CONTROL OF THE LINKER
+
+
+/* ---------------------------------------------------------------------
+ * Load an obj (populate the global symbol table, but don't resolve yet)
+ *
+ * Returns: 1 if ok, 0 on error.
+ */
+static
+int loadObj( char *path )
+{
+ ObjectCode* oc;
+ struct stat st;
+ int r;
+ int fd, pagesize;
+ char* p;
+
+ initLinker();
+
+ fprintf(stderr, "==== loadObj %s ====\n", path );
+
+ /* Check that we haven't already loaded this object. */
+ {
+ ObjectCode *o;
+ int is_dup = 0;
+ for (o = global_object_list; o; o = o->next) {
+ if (0 == strcmp(o->fileName, path))
+ is_dup = 1;
+ }
+ if (is_dup) {
+ fprintf(stderr,
+ "\n\n"
+ "GHCi runtime linker: warning: looks like you're trying to load the\n"
+ "same object file twice:\n"
+ " %s\n"
+ , path);
+ exit(1);
+ }
+ }
+
+ oc = malloc(sizeof(ObjectCode));
+
+ oc->formatName = "ELF";
+
+ r = stat(path, &st);
+ if (r == -1) { return 0; }
+
+ /* sigh, strdup() isn't a POSIX function, so do it the long way */
+ oc->fileName = malloc( strlen(path)+1 );
+ strcpy(oc->fileName, path);
+
+ oc->fileSize = st.st_size;
+ oc->symbols = NULL;
+ oc->sections = NULL;
+ oc->lochash = new_StringMap();
+ oc->proddables = NULL;
+ oc->fixup = NULL;
+ oc->fixup_used = 0;
+ oc->fixup_size = 0;
+
+ /* chain it onto the list of objects */
+ oc->next = global_object_list;
+ global_object_list = oc;
+
+ fd = open(path, O_RDONLY);
+ if (fd == -1) {
+ fprintf(stderr,"loadObj: can't open `%s'\n", path);
+ exit(1);
+ }
+
+ /* Allocate a 1-page area just prior to the image, so we can put
+ fixup code fragments there. Used for doing R_ARM_PC24
+ relocations for jump distances > 64M. */
+
+ pagesize = getpagesize();
+ p = memalign(pagesize, N_FIXUP_PAGES * pagesize
+ + oc->fileSize);
+
+ if (p == NULL) {
+ fprintf(stderr,"loadObj: failed to allocate space for `%s'\n", path);
+ exit(1);
+ }
+
+ oc->fixup = p;
+ oc->fixup_size = N_FIXUP_PAGES * pagesize;
+ oc->fixup_used = 0;
+ oc->image = &(p[ oc->fixup_size ]);
+
+ r = read(fd, oc->image, oc->fileSize);
+ if (r != oc->fileSize) {
+ fprintf(stderr,"loadObj: failed to read `%s'\n", path);
+ exit(1);
+ }
+
+ fprintf(stderr, "loaded %s at %p (fixup = %p)\n",
+ oc->fileName, oc->image, oc->fixup );
+
+ close(fd);
+
+ /* verify the in-memory image */
+ r = ocVerifyImage_ELF ( oc );
+ if (!r) { return r; }
+
+ /* build the symbol list for this image */
+ r = ocGetNames_ELF ( oc );
+ if (!r) { return r; }
+
+ /* loaded, but not resolved yet */
+ oc->status = OBJECT_LOADED;
+
+ return 1;
+}
+
+
+
+/* ---------------------------------------------------------------------------
+ * resolve all the currently unlinked objects in memory
+ *
+ * Returns: 1 if ok, 0 on error.
+ */
+static
+int resolveObjs( void )
+{
+ ObjectCode *oc;
+ int r;
+
+ initLinker();
+
+ for (oc = global_object_list; oc; oc = oc->next) {
+ if (oc->status != OBJECT_RESOLVED) {
+ r = ocResolve_ELF ( oc );
+ if (!r) { return r; }
+ oc->status = OBJECT_RESOLVED;
+ }
+ }
+ return 1;
+}
+
+
+/* ---------------------------------------------------------------------------
+ * Top-level linker.
+ */
+
+/* Load and link a bunch of .o's, and return the address of
+ 'main'. Or NULL if something borks.
+*/
+void* linker_top_level_LINK ( int n_object_names, char** object_names )
+{
+ int r, i;
+ void* mainp;
+
+ initLinker();
+ for (i = 0; i < n_object_names; i++) {
+ //fprintf(stderr, "linkloop %d %s\n", i, object_names[i] );
+ r = loadObj( object_names[i] );
+ if (r != 1) return NULL;
+ }
+ r = resolveObjs();
+ if (r != 1) return NULL;
+ mainp = search_StringMap ( global_symbol_table, "main" );
+ if (mainp == NULL) return NULL;
+ printf("Linker: success!\n");
+ return mainp;
+}
+
+
+#if 1
+int main ( int argc, char** argv )
+{
+ void* mainp;
+ linker_top_level_LINK( argc - 1 , &argv[1]);
+ /* find and run "main" */
+
+ mainp = search_StringMap ( global_symbol_table, "main" );
+ if (mainp == NULL) {
+ fprintf(stderr, "no binding for main\n");
+ exit(1);
+ }
+
+ printf("\nSTARTING PROGRAM\n");
+ ( (int(*)(int,char**)) mainp ) (argc,argv);
+ printf("FINISHED\n");
+
+ return 0;
+}
+#endif
+
+////////////////////////////////////////////////////////////////////////////
+////////////////////////////////////////////////////////////////////////////
+////////////////////////////////////////////////////////////////////////////
+////////////////////////////////////////////////////////////////////////////
+////////////////////////////////////////////////////////////////////////////
+////////////////////////////////////////////////////////////////////////////
+//
+// VIRTUAL MACHINE ...
+
+/* --------------------------------------------------------- */
+/* SIMULATED STATE */
+/* --------------------------------------------------------- */
+
+typedef unsigned int Word;
+
+/* Stack for the simulation */
+Word* sim_stack;
+
+/* Stop when we get a jump to here. */
+char* stop_at;
+
+
+/* ARM state */
+/* r0 .. r15, flags */
+Word regs_arm[16+1];
+
+#define REG_PC 15
+#define REG_SP 14
+
+
+//---------------------------------------------
+
+/* Calling convention: enter the translation with r0 pointing at
+ regs_arm. Translation may trash r1 .. r12 inclusive. Translation
+ should update all regs in regs_arm, and put the next pc value
+ in regs_arm[REG_PC]. */
+
+static
+void run_translation ( char* trans, char* baseblock )
+{
+ /* r0 holds trans */
+ __asm __volatile
+ ("stmfd sp!, {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13}\n\t"
+ "mov r12, %0\n\t"
+ "mov r0, %1\n\t"
+ "bl r12\n\t"
+ "ldmea sp!, {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13}\n\t"
+ :
+ : "ir" (trans), "ir" (baseblock) );
+}
+
+
+
+
+/* Called by Haskell to initialise the simulated machine. The
+ supplied address is the entry point of some procedure to call. */
+
+/* EXPORTED */
+void initialise_machine ( char* first_pc )
+{
+ static char start[12];
+ Word w = (Word)first_pc;
+
+ n_transtab_used = 0;
+
+ sim_stack = malloc(10000 * sizeof(Word));
+ regs_arm[REG_SP] = (Word)(&sim_stack[9999]);
+
+ regs_arm[REG_PC] = (Word)first_pc;
+
+ /* Generate this. Note, we'll be returning directly to the
+ data, so the JIT must stop at this point! */
+ /*
+ 3 0000 00C09FE5 ldr ip, value
+ 4 0004 FEFFFFEB bl ip
+ 5 value:
+ 6 0008 44332211 .word 0x11223344
+ */
+ start[0] = 0x00; start[1] = 0xC0; start[2] = 0x9F; start[3] = 0xE5;
+ start[4] = 0xFE; start[5] = 0xFF; start[6] = 0xFF; start[7] = 0xEB;
+ start[8] = w & 0xFF; w >>= 8;
+ start[9] = w & 0xFF; w >>= 8;
+ start[10] = w & 0xFF; w >>= 8;
+ start[11] = w & 0xFF; w >>= 8;
+
+ stop_at = &start[8];
+ arm_notify_new_code(stop_at, 12);
+}
+
diff --git a/main/VEX/useful/cpuid.c b/main/VEX/useful/cpuid.c
new file mode 100644
index 0000000..bf6e6f1
--- /dev/null
+++ b/main/VEX/useful/cpuid.c
@@ -0,0 +1,144 @@
+
+#include <stdio.h>
+
+typedef unsigned int UInt;
+typedef unsigned long long int ULong;
+
+void cpuid ( UInt* eax, UInt* ebx, UInt* ecx, UInt* edx,
+ UInt index, UInt ecx_in )
+{
+ UInt a,b,c,d;
+ asm volatile ("cpuid"
+ : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
+ : "0" (index), "2"(ecx_in) );
+ *eax = a; *ebx = b; *ecx = c; *edx = d;
+ printf("%08x %08x -> %08x %08x %08x %08x\n",
+ index,ecx_in, a,b,c,d );
+}
+
+int main ( void )
+{
+ UInt eax, ebx, ecx, edx;
+ UInt maxidx, maxextidx, i,ecx_in;
+
+ printf("\n");
+ cpuid(&eax,&ebx,&ecx,&edx, 0,0);
+ maxidx = eax;
+ for (i = 1; i <= maxidx +2; i++) {
+
+ cpuid(&eax,&ebx,&ecx,&edx, i,0);
+
+ if (i == 4) {
+ printf("\n");
+ for (ecx_in = 1; ecx_in < 10; ecx_in++) {
+ cpuid(&eax,&ebx,&ecx,&edx, i,ecx_in);
+ }
+ printf("\n");
+ }
+
+ if (i == 0xb) {
+ printf("\n");
+ for (ecx_in = 1; ecx_in < 10; ecx_in++) {
+ cpuid(&eax,&ebx,&ecx,&edx, i,ecx_in);
+ }
+ printf("\n");
+ }
+
+ if (i == 0xd) {
+ printf("\n");
+ for (ecx_in = 1; ecx_in < 5; ecx_in++) {
+ cpuid(&eax,&ebx,&ecx,&edx, i,ecx_in);
+ }
+ printf("\n");
+ }
+
+
+ }
+
+ printf("\n");
+
+ cpuid(&eax,&ebx,&ecx,&edx, 0x80000000,0);
+ maxextidx = eax;
+ for (i = 0x80000001; i <= maxextidx +2; i++) {
+ cpuid(&eax,&ebx,&ecx,&edx, i,0);
+ }
+
+ printf("invalid\n");
+ cpuid(&eax,&ebx,&ecx,&edx, 1234,0);
+ cpuid(&eax,&ebx,&ecx,&edx, 0x800004d3,0);
+
+
+ return 0;
+}
+
+#include <stdio.h>
+
+typedef unsigned int UInt;
+typedef unsigned long long int ULong;
+
+void cpuid ( UInt* eax, UInt* ebx, UInt* ecx, UInt* edx,
+ UInt index, UInt ecx_in )
+{
+ UInt a,b,c,d;
+ asm volatile ("cpuid"
+ : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
+ : "0" (index), "2"(ecx_in) );
+ *eax = a; *ebx = b; *ecx = c; *edx = d;
+ printf("%08x %08x -> %08x %08x %08x %08x\n",
+ index,ecx_in, a,b,c,d );
+}
+
+int main ( void )
+{
+ UInt eax, ebx, ecx, edx;
+ UInt maxidx, maxextidx, i,ecx_in;
+
+ printf("\n");
+ cpuid(&eax,&ebx,&ecx,&edx, 0,0);
+ maxidx = eax;
+ for (i = 1; i <= maxidx +2; i++) {
+
+ cpuid(&eax,&ebx,&ecx,&edx, i,0);
+
+ if (i == 4) {
+ printf("\n");
+ for (ecx_in = 1; ecx_in < 10; ecx_in++) {
+ cpuid(&eax,&ebx,&ecx,&edx, i,ecx_in);
+ }
+ printf("\n");
+ }
+
+ if (i == 0xb) {
+ printf("\n");
+ for (ecx_in = 1; ecx_in < 10; ecx_in++) {
+ cpuid(&eax,&ebx,&ecx,&edx, i,ecx_in);
+ }
+ printf("\n");
+ }
+
+ if (i == 0xd) {
+ printf("\n");
+ for (ecx_in = 1; ecx_in < 5; ecx_in++) {
+ cpuid(&eax,&ebx,&ecx,&edx, i,ecx_in);
+ }
+ printf("\n");
+ }
+
+
+ }
+
+ printf("\n");
+
+ cpuid(&eax,&ebx,&ecx,&edx, 0x80000000,0);
+ maxextidx = eax;
+ for (i = 0x80000001; i <= maxextidx +2; i++) {
+ cpuid(&eax,&ebx,&ecx,&edx, i,0);
+ }
+
+ printf("invalid\n");
+ cpuid(&eax,&ebx,&ecx,&edx, 1234,0);
+ cpuid(&eax,&ebx,&ecx,&edx, 0x800004d3,0);
+
+
+ return 0;
+}
diff --git a/main/VEX/useful/fp_80_64.c b/main/VEX/useful/fp_80_64.c
new file mode 100644
index 0000000..2c328b7
--- /dev/null
+++ b/main/VEX/useful/fp_80_64.c
@@ -0,0 +1,636 @@
+
+#ifndef USED_AS_INCLUDE
+
+#include "../pub/libvex_basictypes.h"
+#include <stdio.h>
+#include <malloc.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+
+
+/* Test program for developing code for conversions between
+ x87 64-bit and 80-bit floats.
+
+ 80-bit format exists only for x86/x86-64, and so the routines
+ hardwire it as little-endian. The 64-bit format (IEEE double)
+ could exist on any platform, little or big-endian and so we
+ have to take that into account. IOW, these routines have to
+ work correctly when compiled on both big- and little-endian
+ targets, but the 80-bit images only ever have to exist in
+ little-endian format.
+*/
+static void show_f80 ( UChar* );
+static void show_f64 ( UChar* );
+
+static inline
+UInt read_bit_array ( UChar* arr, UInt n )
+{
+ UChar c = arr[n >> 3];
+ c >>= (n&7);
+ return c & 1;
+}
+
+static inline
+void write_bit_array ( UChar* arr, UInt n, UInt b )
+{
+ UChar c = arr[n >> 3];
+ c &= ~(1 << (n&7));
+ c |= ((b&1) << (n&7));
+ arr[n >> 3] = c;
+}
+
+
+static void convert_f80le_to_f64le_HW ( /*IN*/UChar* f80, /*OUT*/UChar* f64 )
+{
+ asm volatile ("ffree %%st(7); fldt (%0); fstpl (%1)"
+ :
+ : "r" (&f80[0]), "r" (&f64[0])
+ : "memory" );
+}
+
+static void convert_f64le_to_f80le_HW ( /*IN*/UChar* f64, /*OUT*/UChar* f80 )
+{
+ asm volatile ("ffree %%st(7); fldl (%0); fstpt (%1)"
+ :
+ : "r" (&f64[0]), "r" (&f80[0])
+ : "memory" );
+}
+
+#endif /* ndef USED_AS_INCLUDE */
+
+
+
+/* 80 and 64-bit floating point formats:
+
+ 80-bit:
+
+ S 0 0-------0 zero
+ S 0 0X------X denormals
+ S 1-7FFE 1X------X normals (all normals have leading 1)
+ S 7FFF 10------0 infinity
+ S 7FFF 10X-----X snan
+ S 7FFF 11X-----X qnan
+
+ S is the sign bit. For runs X----X, at least one of the Xs must be
+ nonzero. Exponent is 15 bits, fractional part is 63 bits, and
+ there is an explicitly represented leading 1, and a sign bit,
+ giving 80 in total.
+
+ 64-bit avoids the confusion of an explicitly represented leading 1
+ and so is simpler:
+
+ S 0 0------0 zero
+ S 0 X------X denormals
+ S 1-7FE any normals
+ S 7FF 0------0 infinity
+ S 7FF 0X-----X snan
+ S 7FF 1X-----X qnan
+
+ Exponent is 11 bits, fractional part is 52 bits, and there is a
+ sign bit, giving 64 in total.
+*/
+
+/* Convert a IEEE754 double (64-bit) into an x87 extended double
+ (80-bit), mimicing the hardware fairly closely. Both numbers are
+ stored little-endian. Limitations, all of which could be fixed,
+ given some level of hassle:
+
+ * Identity of NaNs is not preserved.
+
+ See comments in the code for more details.
+*/
+static void convert_f64le_to_f80le ( /*IN*/UChar* f64, /*OUT*/UChar* f80 )
+{
+ Bool mantissaIsZero;
+ Int bexp, i, j, shift;
+ UChar sign;
+
+ sign = toUChar( (f64[7] >> 7) & 1 );
+ bexp = (f64[7] << 4) | ((f64[6] >> 4) & 0x0F);
+ bexp &= 0x7FF;
+
+ mantissaIsZero = False;
+ if (bexp == 0 || bexp == 0x7FF) {
+ /* We'll need to know whether or not the mantissa (bits 51:0) is
+ all zeroes in order to handle these cases. So figure it
+ out. */
+ mantissaIsZero
+ = toBool(
+ (f64[6] & 0x0F) == 0
+ && f64[5] == 0 && f64[4] == 0 && f64[3] == 0
+ && f64[2] == 0 && f64[1] == 0 && f64[0] == 0
+ );
+ }
+
+ /* If the exponent is zero, either we have a zero or a denormal.
+ Produce a zero. This is a hack in that it forces denormals to
+ zero. Could do better. */
+ if (bexp == 0) {
+ f80[9] = toUChar( sign << 7 );
+ f80[8] = f80[7] = f80[6] = f80[5] = f80[4]
+ = f80[3] = f80[2] = f80[1] = f80[0] = 0;
+
+ if (mantissaIsZero)
+ /* It really is zero, so that's all we can do. */
+ return;
+
+ /* There is at least one 1-bit in the mantissa. So it's a
+ potentially denormalised double -- but we can produce a
+ normalised long double. Count the leading zeroes in the
+ mantissa so as to decide how much to bump the exponent down
+ by. Note, this is SLOW. */
+ shift = 0;
+ for (i = 51; i >= 0; i--) {
+ if (read_bit_array(f64, i))
+ break;
+ shift++;
+ }
+
+ /* and copy into place as many bits as we can get our hands on. */
+ j = 63;
+ for (i = 51 - shift; i >= 0; i--) {
+ write_bit_array( f80, j,
+ read_bit_array( f64, i ) );
+ j--;
+ }
+
+ /* Set the exponent appropriately, and we're done. */
+ bexp -= shift;
+ bexp += (16383 - 1023);
+ f80[9] = toUChar( (sign << 7) | ((bexp >> 8) & 0xFF) );
+ f80[8] = toUChar( bexp & 0xFF );
+ return;
+ }
+
+ /* If the exponent is 7FF, this is either an Infinity, a SNaN or
+ QNaN, as determined by examining bits 51:0, thus:
+ 0 ... 0 Inf
+ 0X ... X SNaN
+ 1X ... X QNaN
+ where at least one of the Xs is not zero.
+ */
+ if (bexp == 0x7FF) {
+ if (mantissaIsZero) {
+ /* Produce an appropriately signed infinity:
+ S 1--1 (15) 1 0--0 (63)
+ */
+ f80[9] = toUChar( (sign << 7) | 0x7F );
+ f80[8] = 0xFF;
+ f80[7] = 0x80;
+ f80[6] = f80[5] = f80[4] = f80[3]
+ = f80[2] = f80[1] = f80[0] = 0;
+ return;
+ }
+ /* So it's either a QNaN or SNaN. Distinguish by considering
+ bit 51. Note, this destroys all the trailing bits
+ (identity?) of the NaN. IEEE754 doesn't require preserving
+ these (it only requires that there be one QNaN value and one
+ SNaN value), but x87 does seem to have some ability to
+ preserve them. Anyway, here, the NaN's identity is
+ destroyed. Could be improved. */
+ if (f64[6] & 8) {
+ /* QNaN. Make a QNaN:
+ S 1--1 (15) 1 1--1 (63)
+ */
+ f80[9] = toUChar( (sign << 7) | 0x7F );
+ f80[8] = 0xFF;
+ f80[7] = 0xFF;
+ f80[6] = f80[5] = f80[4] = f80[3]
+ = f80[2] = f80[1] = f80[0] = 0xFF;
+ } else {
+ /* SNaN. Make a SNaN:
+ S 1--1 (15) 0 1--1 (63)
+ */
+ f80[9] = toUChar( (sign << 7) | 0x7F );
+ f80[8] = 0xFF;
+ f80[7] = 0x7F;
+ f80[6] = f80[5] = f80[4] = f80[3]
+ = f80[2] = f80[1] = f80[0] = 0xFF;
+ }
+ return;
+ }
+
+ /* It's not a zero, denormal, infinity or nan. So it must be a
+ normalised number. Rebias the exponent and build the new
+ number. */
+ bexp += (16383 - 1023);
+
+ f80[9] = toUChar( (sign << 7) | ((bexp >> 8) & 0xFF) );
+ f80[8] = toUChar( bexp & 0xFF );
+ f80[7] = toUChar( (1 << 7) | ((f64[6] << 3) & 0x78)
+ | ((f64[5] >> 5) & 7) );
+ f80[6] = toUChar( ((f64[5] << 3) & 0xF8) | ((f64[4] >> 5) & 7) );
+ f80[5] = toUChar( ((f64[4] << 3) & 0xF8) | ((f64[3] >> 5) & 7) );
+ f80[4] = toUChar( ((f64[3] << 3) & 0xF8) | ((f64[2] >> 5) & 7) );
+ f80[3] = toUChar( ((f64[2] << 3) & 0xF8) | ((f64[1] >> 5) & 7) );
+ f80[2] = toUChar( ((f64[1] << 3) & 0xF8) | ((f64[0] >> 5) & 7) );
+ f80[1] = toUChar( ((f64[0] << 3) & 0xF8) );
+ f80[0] = toUChar( 0 );
+}
+
+
+/* Convert a x87 extended double (80-bit) into an IEEE 754 double
+ (64-bit), mimicking the hardware fairly closely. Both numbers are
+ stored little-endian. Limitations, both of which could be fixed,
+ given some level of hassle:
+
+ * Rounding following truncation could be a bit better.
+
+ * Identity of NaNs is not preserved.
+
+ See comments in the code for more details.
+*/
+static void convert_f80le_to_f64le ( /*IN*/UChar* f80, /*OUT*/UChar* f64 )
+{
+ Bool isInf;
+ Int bexp, i, j;
+ UChar sign;
+
+ sign = toUChar((f80[9] >> 7) & 1);
+ bexp = (((UInt)f80[9]) << 8) | (UInt)f80[8];
+ bexp &= 0x7FFF;
+
+ /* If the exponent is zero, either we have a zero or a denormal.
+ But an extended precision denormal becomes a double precision
+ zero, so in either case, just produce the appropriately signed
+ zero. */
+ if (bexp == 0) {
+ f64[7] = toUChar(sign << 7);
+ f64[6] = f64[5] = f64[4] = f64[3] = f64[2] = f64[1] = f64[0] = 0;
+ return;
+ }
+
+ /* If the exponent is 7FFF, this is either an Infinity, a SNaN or
+ QNaN, as determined by examining bits 62:0, thus:
+ 0 ... 0 Inf
+ 0X ... X SNaN
+ 1X ... X QNaN
+ where at least one of the Xs is not zero.
+ */
+ if (bexp == 0x7FFF) {
+ isInf = toBool(
+ (f80[7] & 0x7F) == 0
+ && f80[6] == 0 && f80[5] == 0 && f80[4] == 0
+ && f80[3] == 0 && f80[2] == 0 && f80[1] == 0
+ && f80[0] == 0
+ );
+ if (isInf) {
+ if (0 == (f80[7] & 0x80))
+ goto wierd_NaN;
+ /* Produce an appropriately signed infinity:
+ S 1--1 (11) 0--0 (52)
+ */
+ f64[7] = toUChar((sign << 7) | 0x7F);
+ f64[6] = 0xF0;
+ f64[5] = f64[4] = f64[3] = f64[2] = f64[1] = f64[0] = 0;
+ return;
+ }
+ /* So it's either a QNaN or SNaN. Distinguish by considering
+ bit 62. Note, this destroys all the trailing bits
+ (identity?) of the NaN. IEEE754 doesn't require preserving
+ these (it only requires that there be one QNaN value and one
+ SNaN value), but x87 does seem to have some ability to
+ preserve them. Anyway, here, the NaN's identity is
+ destroyed. Could be improved. */
+ if (f80[8] & 0x40) {
+ /* QNaN. Make a QNaN:
+ S 1--1 (11) 1 1--1 (51)
+ */
+ f64[7] = toUChar((sign << 7) | 0x7F);
+ f64[6] = 0xFF;
+ f64[5] = f64[4] = f64[3] = f64[2] = f64[1] = f64[0] = 0xFF;
+ } else {
+ /* SNaN. Make a SNaN:
+ S 1--1 (11) 0 1--1 (51)
+ */
+ f64[7] = toUChar((sign << 7) | 0x7F);
+ f64[6] = 0xF7;
+ f64[5] = f64[4] = f64[3] = f64[2] = f64[1] = f64[0] = 0xFF;
+ }
+ return;
+ }
+
+ /* If it's not a Zero, NaN or Inf, and the integer part (bit 62) is
+ zero, the x87 FPU appears to consider the number denormalised
+ and converts it to a QNaN. */
+ if (0 == (f80[7] & 0x80)) {
+ wierd_NaN:
+ /* Strange hardware QNaN:
+ S 1--1 (11) 1 0--0 (51)
+ */
+ /* On a PIII, these QNaNs always appear with sign==1. I have
+ no idea why. */
+ f64[7] = (1 /*sign*/ << 7) | 0x7F;
+ f64[6] = 0xF8;
+ f64[5] = f64[4] = f64[3] = f64[2] = f64[1] = f64[0] = 0;
+ return;
+ }
+
+ /* It's not a zero, denormal, infinity or nan. So it must be a
+ normalised number. Rebias the exponent and consider. */
+ bexp -= (16383 - 1023);
+ if (bexp >= 0x7FF) {
+ /* It's too big for a double. Construct an infinity. */
+ f64[7] = toUChar((sign << 7) | 0x7F);
+ f64[6] = 0xF0;
+ f64[5] = f64[4] = f64[3] = f64[2] = f64[1] = f64[0] = 0;
+ return;
+ }
+
+ if (bexp <= 0) {
+ /* It's too small for a normalised double. First construct a
+ zero and then see if it can be improved into a denormal. */
+ f64[7] = toUChar(sign << 7);
+ f64[6] = f64[5] = f64[4] = f64[3] = f64[2] = f64[1] = f64[0] = 0;
+
+ if (bexp < -52)
+ /* Too small even for a denormal. */
+ return;
+
+ /* Ok, let's make a denormal. Note, this is SLOW. */
+ /* Copy bits 63, 62, 61, etc of the src mantissa into the dst,
+ indexes 52+bexp, 51+bexp, etc, until k+bexp < 0. */
+ /* bexp is in range -52 .. 0 inclusive */
+ for (i = 63; i >= 0; i--) {
+ j = i - 12 + bexp;
+ if (j < 0) break;
+ /* We shouldn't really call vassert from generated code. */
+ assert(j >= 0 && j < 52);
+ write_bit_array ( f64,
+ j,
+ read_bit_array ( f80, i ) );
+ }
+ /* and now we might have to round ... */
+ if (read_bit_array(f80, 10+1 - bexp) == 1)
+ goto do_rounding;
+
+ return;
+ }
+
+ /* Ok, it's a normalised number which is representable as a double.
+ Copy the exponent and mantissa into place. */
+ /*
+ for (i = 0; i < 52; i++)
+ write_bit_array ( f64,
+ i,
+ read_bit_array ( f80, i+11 ) );
+ */
+ f64[0] = toUChar( (f80[1] >> 3) | (f80[2] << 5) );
+ f64[1] = toUChar( (f80[2] >> 3) | (f80[3] << 5) );
+ f64[2] = toUChar( (f80[3] >> 3) | (f80[4] << 5) );
+ f64[3] = toUChar( (f80[4] >> 3) | (f80[5] << 5) );
+ f64[4] = toUChar( (f80[5] >> 3) | (f80[6] << 5) );
+ f64[5] = toUChar( (f80[6] >> 3) | (f80[7] << 5) );
+
+ f64[6] = toUChar( ((bexp << 4) & 0xF0) | ((f80[7] >> 3) & 0x0F) );
+
+ f64[7] = toUChar( (sign << 7) | ((bexp >> 4) & 0x7F) );
+
+ /* Now consider any rounding that needs to happen as a result of
+ truncating the mantissa. */
+ if (f80[1] & 4) /* read_bit_array(f80, 10) == 1) */ {
+
+ /* If the bottom bits of f80 are "100 0000 0000", then the
+ infinitely precise value is deemed to be mid-way between the
+ two closest representable values. Since we're doing
+ round-to-nearest (the default mode), in that case it is the
+ bit immediately above which indicates whether we should round
+ upwards or not -- if 0, we don't. All that is encapsulated
+ in the following simple test. */
+ if ((f80[1] & 0xF) == 4/*0100b*/ && f80[0] == 0)
+ return;
+
+ do_rounding:
+ /* Round upwards. This is a kludge. Once in every 2^24
+ roundings (statistically) the bottom three bytes are all 0xFF
+ and so we don't round at all. Could be improved. */
+ if (f64[0] != 0xFF) {
+ f64[0]++;
+ }
+ else
+ if (f64[0] == 0xFF && f64[1] != 0xFF) {
+ f64[0] = 0;
+ f64[1]++;
+ }
+ else
+ if (f64[0] == 0xFF && f64[1] == 0xFF && f64[2] != 0xFF) {
+ f64[0] = 0;
+ f64[1] = 0;
+ f64[2]++;
+ }
+ /* else we don't round, but we should. */
+ }
+}
+
+
+#ifndef USED_AS_INCLUDE
+
+//////////////
+
+static void show_f80 ( UChar* f80 )
+{
+ Int i;
+ printf("%d ", read_bit_array(f80, 79));
+
+ for (i = 78; i >= 64; i--)
+ printf("%d", read_bit_array(f80, i));
+
+ printf(" %d ", read_bit_array(f80, 63));
+
+ for (i = 62; i >= 0; i--)
+ printf("%d", read_bit_array(f80, i));
+}
+
+static void show_f64le ( UChar* f64 )
+{
+ Int i;
+ printf("%d ", read_bit_array(f64, 63));
+
+ for (i = 62; i >= 52; i--)
+ printf("%d", read_bit_array(f64, i));
+
+ printf(" ");
+ for (i = 51; i >= 0; i--)
+ printf("%d", read_bit_array(f64, i));
+}
+
+//////////////
+
+
+/* Convert f80 to a 64-bit IEEE double using both the hardware and the
+ soft version, and compare the results. If they differ, print
+ details and return 1. If they are identical, return 0.
+*/
+int do_80_to_64_test ( Int test_no, UChar* f80, UChar* f64h, UChar* f64s)
+{
+ Char buf64s[100], buf64h[100];
+ Bool same;
+ Int k;
+ convert_f80le_to_f64le_HW(f80, f64h);
+ convert_f80le_to_f64le(f80, f64s);
+ same = True;
+ for (k = 0; k < 8; k++) {
+ if (f64s[k] != f64h[k]) {
+ same = False; break;
+ }
+ }
+ /* bitwise identical */
+ if (same)
+ return 0;
+
+ sprintf(buf64s, "%.16e", *(double*)f64s);
+ sprintf(buf64h, "%.16e", *(double*)f64h);
+
+ /* Not bitwise identical, but pretty darn close */
+ if (0 == strcmp(buf64s, buf64h))
+ return 0;
+
+ printf("\n");
+ printf("f80: "); show_f80(f80); printf("\n");
+ printf("f64h: "); show_f64le(f64h); printf("\n");
+ printf("f64s: "); show_f64le(f64s); printf("\n");
+
+ printf("[test %d] %.16Le -> (hw %s, sw %s)\n",
+ test_no, *(long double*)f80,
+ buf64h, buf64s );
+
+ return 1;
+}
+
+
+/* Convert an IEEE 64-bit double to a x87 extended double (80 bit)
+ using both the hardware and the soft version, and compare the
+ results. If they differ, print details and return 1. If they are
+ identical, return 0.
+*/
+int do_64_to_80_test ( Int test_no, UChar* f64, UChar* f80h, UChar* f80s)
+{
+ Char buf80s[100], buf80h[100];
+ Bool same;
+ Int k;
+ convert_f64le_to_f80le_HW(f64, f80h);
+ convert_f64le_to_f80le(f64, f80s);
+ same = True;
+ for (k = 0; k < 10; k++) {
+ if (f80s[k] != f80h[k]) {
+ same = False; break;
+ }
+ }
+ /* bitwise identical */
+ if (same)
+ return 0;
+
+ sprintf(buf80s, "%.20Le", *(long double*)f80s);
+ sprintf(buf80h, "%.20Le", *(long double*)f80h);
+
+ /* Not bitwise identical, but pretty darn close */
+ if (0 == strcmp(buf80s, buf80h))
+ return 0;
+
+ printf("\n");
+ printf("f64: "); show_f64le(f64); printf("\n");
+ printf("f80h: "); show_f80(f80h); printf("\n");
+ printf("f80s: "); show_f80(f80s); printf("\n");
+
+ printf("[test %d] %.16e -> (hw %s, sw %s)\n",
+ test_no, *(double*)f64,
+ buf80h, buf80s );
+
+ return 1;
+}
+
+
+
+void do_80_to_64_tests ( void )
+{
+ UInt b9,b8,b7,i, j;
+ Int fails=0, tests=0;
+ UChar* f64h = malloc(8);
+ UChar* f64s = malloc(8);
+ UChar* f80 = malloc(10);
+ int STEP = 1;
+
+ srandom(4343);
+
+ /* Ten million random bit patterns */
+ for (i = 0; i < 10000000; i++) {
+ tests++;
+ for (j = 0; j < 10; j++)
+ f80[j] = (random() >> 7) & 255;
+
+ fails += do_80_to_64_test(tests, f80, f64h, f64s);
+ }
+
+ /* 2^24 numbers in which the first 24 bits are tested exhaustively
+ -- this covers the sign, exponent and leading part of the
+ mantissa. */
+ for (b9 = 0; b9 < 256; b9 += STEP) {
+ for (b8 = 0; b8 < 256; b8 += STEP) {
+ for (b7 = 0; b7 < 256; b7 += STEP) {
+ tests++;
+ for (i = 0; i < 10; i++)
+ f80[i] = 0;
+ for (i = 0; i < 8; i++)
+ f64h[i] = f64s[i] = 0;
+ f80[9] = b9;
+ f80[8] = b8;
+ f80[7] = b7;
+
+ fails += do_80_to_64_test(tests, f80, f64h, f64s);
+ }}}
+
+ printf("\n80 -> 64: %d tests, %d fails\n\n", tests, fails);
+}
+
+
+void do_64_to_80_tests ( void )
+{
+ UInt b7,b6,b5,i, j;
+ Int fails=0, tests=0;
+ UChar* f80h = malloc(10);
+ UChar* f80s = malloc(10);
+ UChar* f64 = malloc(8);
+ int STEP = 1;
+
+ srandom(2323);
+
+ /* Ten million random bit patterns */
+ for (i = 0; i < 10000000; i++) {
+ tests++;
+ for (j = 0; j < 8; j++)
+ f64[j] = (random() >> 13) & 255;
+
+ fails += do_64_to_80_test(tests, f64, f80h, f80s);
+ }
+
+ /* 2^24 numbers in which the first 24 bits are tested exhaustively
+ -- this covers the sign, exponent and leading part of the
+ mantissa. */
+ for (b7 = 0; b7 < 256; b7 += STEP) {
+ for (b6 = 0; b6 < 256; b6 += STEP) {
+ for (b5 = 0; b5 < 256; b5 += STEP) {
+ tests++;
+ for (i = 0; i < 8; i++)
+ f64[i] = 0;
+ for (i = 0; i < 10; i++)
+ f80h[i] = f80s[i] = 0;
+ f64[7] = b7;
+ f64[6] = b6;
+ f64[5] = b5;
+
+ fails += do_64_to_80_test(tests, f64, f80h, f80s);
+ }}}
+
+ printf("\n64 -> 80: %d tests, %d fails\n\n", tests, fails);
+}
+
+
+int main ( void )
+{
+ do_80_to_64_tests();
+ do_64_to_80_tests();
+ return 0;
+}
+
+#endif /* ndef USED_AS_INCLUDE */
diff --git a/main/VEX/useful/fpround.c b/main/VEX/useful/fpround.c
new file mode 100644
index 0000000..3a186bb
--- /dev/null
+++ b/main/VEX/useful/fpround.c
@@ -0,0 +1,13 @@
+
+#include <stdio.h>
+
+int main ( void )
+{
+ double d = 0.0;
+ int i;
+ for (i = 0; i < 30; i++) {
+ printf("i = %d, d = %f, (int)d = %d\n", i, d, (int)d);
+ d += 0.11;
+ }
+ return 0;
+}
diff --git a/main/VEX/useful/fspill.c b/main/VEX/useful/fspill.c
new file mode 100644
index 0000000..41e7eda
--- /dev/null
+++ b/main/VEX/useful/fspill.c
@@ -0,0 +1,19 @@
+
+#include <stdio.h>
+
+double qq ( void )
+{int i;
+ long double a = 0.0, b = 0.0, c = 0.0, d = 0.0, e = 0.0, f = 0.0, g = 0.0, h = 0.0;
+ for (i = 0; i < 10; i++) {
+ a += 1.1; b += 1.2; c += 1.3; d += 1.4; e += 1.5; f += 1.6;
+ g += 1.7; h += 1.8001;
+ }
+ return a+b+c+d+e+f+g+h;
+}
+
+int main ( void )
+{
+ double r = qq();
+ printf("answer is %f %d\n", r, (int)r );
+ return 0;
+}
diff --git a/main/VEX/useful/gradual_underflow.c b/main/VEX/useful/gradual_underflow.c
new file mode 100644
index 0000000..53886d8
--- /dev/null
+++ b/main/VEX/useful/gradual_underflow.c
@@ -0,0 +1,15 @@
+
+#include <stdio.h>
+
+int main ( void )
+{
+double d = 7.25063790881233303e-303;
+ int i;
+
+ for (i = 0; i < 26; i++) {
+ printf("%.16e\n", d);
+ d *= 0.1012198489248992489422;
+ }
+ return 0;
+}
+
diff --git a/main/VEX/useful/hd_fpu.c b/main/VEX/useful/hd_fpu.c
new file mode 100644
index 0000000..3007029
--- /dev/null
+++ b/main/VEX/useful/hd_fpu.c
@@ -0,0 +1,1707 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Implementation of the floating point instruction set. ---*/
+/*--- hd_fpu.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Heimdall, an x86 protected-mode emulator
+ designed for debugging and profiling binaries on x86-Unixes.
+
+ Copyright (C) 2000 Julian Seward
+ jseward@acm.org
+ Julian_Seward@muraroa.demon.co.uk
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file LICENSE.
+*/
+
+#include "hd_include.h"
+
+
+/* ---------------------------------------------------------------------
+ Packing and unpacking the FPU data registers.
+ ------------------------------------------------------------------ */
+
+INLINE
+UInt fp_get_tos ( void )
+{
+ return (m_fpu_state.env[FP_ENV_STAT] >> FP_F_TOS_LO) & 7;
+}
+
+static
+UInt read_bit_array ( UChar* arr, UInt n )
+{
+ UChar c = arr[n >> 3];
+ c >>= (n&7);
+ return c & 1;
+}
+
+static
+void write_bit_array ( UChar* arr, UInt n, UInt b )
+{
+ UChar c = arr[n >> 3];
+ c &= ~(1 << (n&7));
+ b &= 1;
+ c |= (b << (n&7));
+ arr[n >> 3] = c;
+}
+
+/* Read an IEEE double from the memory image of an Intel 80-bit
+ extended floating-point number.
+*/
+static
+double fp_double_from_extended ( UChar* e_lsb )
+{
+ int i;
+ double d;
+ UChar* d_lsb = (UChar*)(&d);
+
+ UInt sign = e_lsb[9] >> 7;
+ Int bexp = ((UInt)e_lsb[9] << 8) | (UInt)e_lsb[8];
+ bexp &= 0x7fff;
+
+ if (bexp == 0)
+ bexp = 0; /* preserve zeroes */
+ else
+ if (bexp == 0x7FFF)
+ bexp = 0x7FF; /* preserve Infs/Nans */
+ else {
+ bexp -= (16383 - 1023);
+ if (bexp < 0) bexp = 0;
+ if (bexp > 0x7FF) bexp = 0x7FF;
+ }
+
+ d_lsb[6] = (bexp & 0xF) << 4;
+ d_lsb[7] = ((bexp >> 4) & 0x7F) | ((sign & 0x1) << 7);
+
+ for (i = 0; i < 52; i++)
+ write_bit_array ( d_lsb,
+ i,
+ read_bit_array ( e_lsb, i+11 ) );
+ return d;
+}
+
+/* Given an IEEE double, create the memory image of an Intel 80-bit
+ extended floating-point number.
+*/
+static
+void fp_extended_from_double ( UChar* e_lsb, double d )
+{
+ int i;
+ UChar* d_lsb = (UChar*)(&d);
+
+ UInt sign = d_lsb[7] >> 7;
+ Int bexp = ((UInt)d_lsb[7] << 4) |
+ ((((UInt)d_lsb[6]) >> 4) & 0xF);
+ bexp &= 0x7ff;
+
+ if (bexp == 0)
+ bexp = 0; /* preserve zeroes */
+ else
+ if (bexp == 0x7FF)
+ bexp = 0x7FFF; /* preserve Infs/Nans */
+ else
+ bexp += (16383 - 1023);
+
+ e_lsb[9] = ((bexp >> 8) & 0x7F) | ((sign & 0x1) << 7);
+ e_lsb[8] = bexp & 0xFF;
+
+ for (i = 0; i < 52; i++)
+ write_bit_array ( e_lsb,
+ i+11,
+ read_bit_array ( d_lsb, i ) );
+ for (i = 0; i < 11; i++)
+ write_bit_array ( e_lsb, i, 0 );
+
+ /* this isn't really right, but I can't get fpclassify to work. */
+ i = 0;
+ if (isnan(d) || isinf(d) || d != 0.0) i = 1;
+ write_bit_array ( e_lsb, 63, i );
+}
+
+/* For the transition Real CPU -> Simulated CPU, copy the
+ .reg values in m_fpu_state, which are in stack order, to
+ the m_fpu_data_regs array, in register (non-stack) order.
+*/
+void fp_unpack_data_regs ( void )
+{
+ Int reg, st;
+ reg = fp_get_tos();
+ for (st = 0; st < 8; st++) {
+ m_fpu_data_regs[reg]
+ = fp_double_from_extended ( &m_fpu_state.reg[FP_REG(st)] );
+ if (reg == 7) reg = 0; else reg++;
+ }
+}
+
+void fp_repack_data_regs ( void )
+{
+ Int reg, st;
+ st = fp_get_tos();
+ for (reg = 0; reg < 8; reg++) {
+ fp_extended_from_double ( &m_fpu_state.reg[FP_REG(reg)],
+ m_fpu_data_regs[st] );
+ if (st == 7) st = 0; else st++;
+ }
+}
+
+/* ---------------------------------------------------------------------
+ Helper functions for the floating point unit.
+ ------------------------------------------------------------------ */
+
+static
+INLINE
+void setFMem ( UInt addr, double f )
+{
+ * ((float*)addr) = (float)f;
+}
+
+static
+INLINE
+double getFMem ( UInt addr )
+{
+ return (double) (* ((float*)addr));
+}
+
+static
+INLINE
+void setDMem ( UInt addr, double f )
+{
+ * ((double*)addr) = f;
+}
+
+static
+INLINE
+double getDMem ( UInt addr )
+{
+ return (* ((double*)addr));
+}
+
+static
+INLINE
+void setTMem ( UInt addr, double f )
+{
+ fp_extended_from_double ( (Addr)addr, f );
+}
+
+static
+INLINE
+double getTMem ( UInt addr )
+{
+ return fp_double_from_extended ( (Addr)addr );
+}
+
+#define fp_extended_from_double ERROR__fp_extended_from_double_used
+#define fp_double_from_extended ERROR__fp_double_from_extended_used
+
+static
+INLINE
+UInt fp_get_statusword_flag ( UInt flagno )
+{
+ if (flagno < 0 || flagno > 15) panic("fp_get_statusword_flag");
+ return (m_fpu_state.env[FP_ENV_STAT] >> flagno) & 0x1;
+}
+
+#if DEBUG
+static
+UInt fp_get_controlword_flag ( UInt flagno )
+{
+ if (flagno < 0 || flagno > 15) panic("fp_get_controlword_flag");
+ return (m_fpu_state.env[FP_ENV_CTRL] >> flagno) & 0x1;
+}
+#endif
+
+static
+INLINE
+void fp_set_statusword_flag_to ( UInt flagno, UInt bit )
+{
+ if (flagno < 0 || flagno > 15) panic("fp_set_statusword_flag_to");
+ if (bit)
+ m_fpu_state.env[FP_ENV_STAT] |= (1 << flagno);
+ else
+ m_fpu_state.env[FP_ENV_STAT] &= ~(1 << flagno);
+}
+
+static
+void fp_set_stack_overflow ( void )
+{
+ fprintf(stderr, "--- FP STACK OVERFLOW!\n" );
+ fp_set_statusword_flag_to(FP_E_INVAL,1);
+ fp_set_statusword_flag_to(FP_E_STACKF,1);
+ fp_set_statusword_flag_to(FP_F_C1,1);
+}
+
+static
+void fp_set_stack_underflow ( void )
+{
+ fprintf(stderr, "--- FP STACK UNDERFLOW!\n" );
+ fp_set_statusword_flag_to(FP_E_INVAL,1);
+ fp_set_statusword_flag_to(FP_E_STACKF,1);
+ fp_set_statusword_flag_to(FP_F_C1,0);
+}
+
+static
+INLINE
+void fp_set_tos ( UInt tos )
+{
+ if (tos < 0 || tos > 7) panic("fp_set_tos");
+ fp_set_statusword_flag_to(FP_F_TOS_LO,0);
+ fp_set_statusword_flag_to(FP_F_TOS_LO+1,0);
+ fp_set_statusword_flag_to(FP_F_TOS_HI,0);
+ m_fpu_state.env[FP_ENV_STAT] |= (tos << FP_F_TOS_LO);
+}
+
+static
+INLINE
+UInt fp_STno_to_regno ( UInt stregno )
+{
+ UInt regno = fp_get_tos();
+ assert(regno >= 0 && regno < 8);
+ regno += stregno;
+ if (regno >= 8) regno -= 8;
+ assert(regno >= 0 && regno < 8);
+ return regno;
+}
+
+static
+INLINE
+void fp_dec_tos ( void )
+{
+ fp_set_tos ( fp_STno_to_regno ( 7 ));
+}
+
+static
+INLINE
+void fp_inc_tos ( void )
+{
+ fp_set_tos ( fp_STno_to_regno ( 1 ));
+}
+
+static
+INLINE
+Bool fp_is_empty_tag ( UInt tag )
+{
+ return tag == FP_TAG_EMPTY;
+}
+
+static
+INLINE
+UInt fp_get_tag ( UInt regno )
+{
+ if (regno < 0 || regno > 7) panic("fp_get_tag");
+ return (m_fpu_state.env[FP_ENV_TAG] >> (2*regno)) & 3;
+}
+
+static
+INLINE
+UInt fp_get_tag_ST ( UInt stregno )
+{
+ if (stregno < 0 || stregno > 7) panic("fp_get_tag_ST");
+ return fp_get_tag ( fp_STno_to_regno(stregno) );
+}
+
+static
+INLINE
+void fp_set_tag ( UInt regno, UInt val )
+{
+ if (regno < 0 || regno > 7 ||
+ val < 0 || val > 3) panic("fp_get_tag");
+ m_fpu_state.env[FP_ENV_TAG] &= ~(3 << (2*regno));
+ m_fpu_state.env[FP_ENV_TAG] |= (val << (2*regno));
+}
+
+static
+INLINE
+void fp_set_tag_ST ( UInt stregno, UInt val )
+{
+ if (stregno < 0 || stregno > 7) panic("fp_set_tag_ST");
+ fp_set_tag ( fp_STno_to_regno(stregno), val );
+}
+
+
+static
+INLINE
+void fp_set_reg ( UInt r, double d )
+{
+ if (r < 0 || r > 7) panic("fp_set_reg");
+ m_fpu_data_regs[r] = d;
+ fp_set_tag ( r, d==0.0 ? FP_TAG_ZERO
+ : (finite(d) ? FP_TAG_VALID : FP_TAG_SPEC) );
+}
+
+static
+INLINE
+void fp_set_reg_ST ( UInt str, double d )
+{
+ UInt r;
+ if (str < 0 || str > 7) panic("fp_set_reg_ST");
+ r = fp_STno_to_regno(str);
+ fp_set_reg ( r, d );
+}
+
+static
+INLINE
+double fp_get_reg ( UInt r )
+{
+ double d;
+ if (r < 0 || r > 7) panic("fp_get_reg");
+ d = m_fpu_data_regs[r];
+ return d;
+}
+
+static
+INLINE
+double fp_get_reg_ST ( UInt str )
+{
+ UInt r;
+ if (str < 0 || str > 7) panic("fp_get_reg_ST");
+ r = fp_STno_to_regno(str);
+ return fp_get_reg(r);
+}
+
+static
+INLINE
+void fp_set_tos_reg ( double d )
+{
+ fp_set_reg ( fp_get_tos(), d );
+}
+
+static
+INLINE
+double fp_get_tos_reg ( void )
+{
+ return fp_get_reg ( fp_get_tos() );
+}
+
+static
+INLINE
+void fp_set_tos_reg_QNaN ( void )
+{
+ fp_set_reg ( fp_get_tos(), NAN /* see <nan.h> */ );
+}
+
+static
+INLINE
+double fp_pop ( void )
+{
+ double d = fp_get_tos_reg();
+ fp_set_tag ( fp_get_tos(), FP_TAG_EMPTY );
+ fp_inc_tos();
+ return d;
+}
+
+/* Push d and update flags. */
+static
+INLINE
+void fp_push ( double d )
+{
+ if (fp_is_empty_tag(fp_get_tag_ST(7))) {
+ fp_dec_tos();
+ fp_set_tos_reg(d);
+ fp_set_statusword_flag_to(FP_F_C1, d == 0.0);
+ } else {
+ fp_dec_tos();
+ fp_set_tos_reg_QNaN();
+ fp_set_stack_overflow();
+ }
+}
+
+static
+void fp_set_statusword_flags_COM ( double vd_dst, double vd_src )
+{
+ UInt vis_dst;
+ if (isnan(vd_src) || isnan(vd_dst)) vis_dst = 7;
+ else if (vd_dst > vd_src) vis_dst = 0;
+ else if (vd_dst < vd_src) vis_dst = 1;
+ else if (vd_dst == vd_src) vis_dst = 4;
+ else vis_dst = 7;
+ fp_set_statusword_flag_to(FP_F_C3, (vis_dst >> 2) & 1);
+ fp_set_statusword_flag_to(FP_F_C2, (vis_dst >> 1) & 1);
+ fp_set_statusword_flag_to(FP_F_C0, vis_dst & 1);
+}
+
+static
+void fp_set_statusword_flags_COM_STACKF ( void )
+{
+ UInt vis_dst = 7;
+ fp_set_statusword_flag_to(FP_F_C3, (vis_dst >> 2) & 1);
+ fp_set_statusword_flag_to(FP_F_C2, (vis_dst >> 1) & 1);
+ fp_set_statusword_flag_to(FP_F_C0, vis_dst & 1);
+}
+
+static
+double fp_calc_yl2xp1 ( double st_0, double st_1 )
+{
+ st_0 += 1.0;
+ st_0 = log(st_0) / log(2.0);
+ st_0 *= st_1;
+ return st_0;
+}
+
+static
+double fp_calc_yl2x ( double st_0, double st_1 )
+{
+ st_0 = log(st_0) / log(2.0);
+ st_0 *= st_1;
+ return st_0;
+}
+
+static
+double fp_calc_2xm1 ( double st_0 )
+{
+ st_0 = st_0 * 0.69314718055994530942;
+ st_0 = exp(st_0);
+ st_0 = st_0 - 1.0;
+ return st_0;
+}
+
+static
+double fp_calc_scale ( double st_0, double st_1 )
+{
+ Int n = 0;
+ if (st_1 > 0.0) {
+ if (st_1 > 2.0*308.0) st_1 = 2.0*308.0;
+ n = (Int)(floor(st_1));
+ if (n < 0) n = 0; /* impossible, but ... */
+ if (n > 2*308) n = 2*308; /* limit exponent change */
+ while (n > 0) { n--; st_0 *= 2.0; };
+ }
+ else
+ if (st_1 < 0.0) {
+ if (st_1 < -2.0*308.0) st_1 = -2.0*308.0;
+ n = ((Int)(floor(-st_1)));
+ if (n < 0) n = 0;
+ if (n > 2*308) n = 2*308;
+ while (n > 0) { n--; st_0 *= 0.5; };
+ }
+ return st_0;
+}
+
+static
+void fp_calc_fprem ( Int* qq, double* result, double st_0, double st_1 )
+{
+ double tmp = st_0 / st_1;
+ if (tmp < 0)
+ *qq = - (Int)floor(-tmp);
+ else
+ *qq = (Int)floor(tmp);
+ *result = st_0 - (st_1 * (double)(*qq));
+}
+
+#if DEBUG
+static
+void printFpuState ( void )
+{
+ Int i;
+ assert(sizeof(Fpu_State)==108);
+ for (i = 7; i >= 0; i--) {
+ printf ( " %s fpreg%d: 0x",
+ (UInt)i == fp_get_tos() ? "**" : " ", i );
+ //for (j = FP_REG(i+1)-1; j >= FP_REG(i); j--)
+ // printf ( "%2x", (UInt)m_fpu_state.reg[j]);
+ printf ( " %5s ", fp_tag_names[fp_get_tag(i)] );
+ printf ( "%20.16e\n", fp_get_reg(i) );
+ }
+ printf(" fctrl: 0x%4x masked: ",
+ (UInt)m_fpu_state.env[FP_ENV_CTRL] );
+ for (i = FP_E_INVAL; i <= FP_E_LOS; i++)
+ if (fp_get_controlword_flag(i))
+ printf ( "%s ", fp_exception_names[i] );
+ printf ( "\n" );
+
+ printf(" fstat: 0x%4x except:",
+ (UInt)m_fpu_state.env[FP_ENV_STAT] );
+ for (i = FP_E_INVAL; i <= FP_E_LOS; i++)
+ if (fp_get_statusword_flag(i))
+ printf ( "%s ", fp_exception_names[i] );
+ printf ( " top: %d ", fp_get_tos() );
+ printf ( "c3210: %d%d%d%d",
+ fp_get_statusword_flag(FP_F_C3),
+ fp_get_statusword_flag(FP_F_C2),
+ fp_get_statusword_flag(FP_F_C1),
+ fp_get_statusword_flag(FP_F_C0) );
+ printf ( " STACKF: %d\n", fp_get_statusword_flag(FP_E_STACKF) );
+
+ printf(" ftag: 0x%4x ", (UInt)m_fpu_state.env[FP_ENV_TAG] );
+ for (i = 7; i >= 0; i--)
+ printf ( "%s ", fp_tag_names[fp_get_tag(i)] );
+ printf("\n");
+
+ printf(" fip: 0x%8x\n",
+ (((UInt)m_fpu_state.env[FP_ENV_IP+1]) << 16) |
+ ((UInt)m_fpu_state.env[FP_ENV_IP]) );
+ printf(" fcs: 0x%4x\n",
+ ((UInt)m_fpu_state.env[FP_ENV_CS]) );
+ printf(" fopoff: 0x%8x\n",
+ (((UInt)m_fpu_state.env[FP_ENV_OPOFF+1]) << 16) |
+ ((UInt)m_fpu_state.env[FP_ENV_OPOFF]) );
+ printf(" fopsel: 0x%4x\n",
+ ((UInt)m_fpu_state.env[FP_ENV_OPSEL]) );
+}
+#endif
+
+/* ---------------------------------------------------------------------
+ Implementation of the floating point instruction set.
+ ------------------------------------------------------------------ */
+
+/* A pretty nasty kludge. Arithmetic is done using standard IEEE
+ doubles, which means that programs which rely on the extra accuracy
+ supplied by Intel's internal 80-bit format will get different
+ results.
+
+ To make exception handling tractable, we assume that the FPU is
+ running with all exceptions masked, so we do the "default fixup"
+ action for all exceptions. Fortunately that's fairly simple.
+
+ Support for non-normal numbers (infinities, nans, denorms, etc) is
+ minimal and probably wrong.
+*/
+
+typedef
+ enum { Fp_Add, Fp_Sub, Fp_Mul, Fp_Div, Fp_SubR, Fp_DivR }
+ Fp_Op;
+
+#if DEBUG
+char* fp_Op_name ( Fp_Op op )
+{
+ switch (op) {
+ case Fp_Add: return "add"; case Fp_Sub: return "sub";
+ case Fp_Mul: return "mul"; case Fp_Div: return "div";
+ case Fp_SubR: return "subr"; case Fp_DivR: return "divr";
+ default: panic("fp_Op_name");
+ }
+ return NULL; /*notreached*/
+}
+#endif
+
+static
+void fp_do_op_ST_ST ( UInt a_src, UInt a_dst, Fp_Op op, Bool pop )
+{
+ double vd_src, vd_dst;
+ IFDB( if (dis) printf("\tf%s%s\t%%st(%d),%%st(%d)\n",
+ fp_Op_name(op), pop?"p":"",
+ a_src, a_dst ); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(a_src)) &&
+ !fp_is_empty_tag(fp_get_tag_ST(a_dst))) {
+ vd_dst = fp_get_reg_ST(a_dst);
+ vd_src = fp_get_reg_ST(a_src);
+ switch (op) {
+ case Fp_Add: vd_dst = vd_dst + vd_src; break;
+ case Fp_Sub: vd_dst = vd_dst - vd_src; break;
+ case Fp_Mul: vd_dst = vd_dst * vd_src; break;
+ case Fp_Div: vd_dst = vd_dst / vd_src; break;
+ case Fp_SubR: vd_dst = vd_src - vd_dst; break;
+ case Fp_DivR: vd_dst = vd_src / vd_dst; break;
+ default: panic("fp_do_op_ST_ST");
+ }
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(a_dst,vd_dst);
+ if (pop) (void)fp_pop();
+}
+
+static
+void fp_do_COM_ST_ST ( UInt a_src, UInt a_dst, UInt nPops )
+{
+ double vd_src, vd_dst;
+ IFDB( if (dis) printf("\tfcom%s\t%%st(%d),%%st(%d)\n",
+ nPops==0 ? "" : (nPops==1 ? "p" : "pp"),
+ a_src, a_dst ); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(a_src)) &&
+ !fp_is_empty_tag(fp_get_tag_ST(a_dst))) {
+ vd_dst = fp_get_reg_ST(a_dst);
+ vd_src = fp_get_reg_ST(a_src);
+ fp_set_statusword_flags_COM(vd_dst,vd_src);
+ } else {
+ fp_set_statusword_flags_COM_STACKF();
+ fp_set_stack_underflow();
+ }
+ while (nPops > 0) {
+ (void)fp_pop();
+ nPops--;
+ }
+}
+
+static
+void fp_do_op_mem_ST_0 ( UInt a_src,
+ IFDB(Text t_src CC)
+ Fp_Op op, Bool dbl )
+{
+ double vd_src, vd_dst;
+ IFDB( if (dis) printf("\tf%s%c\t%s,%%st(0)\n",
+ fp_Op_name(op), dbl?'D':'F', t_src ); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = fp_get_reg_ST(0);
+ vd_src = dbl ? getDMem(a_src) : getFMem(a_src);
+ switch (op) {
+ case Fp_Add: vd_dst = vd_dst + vd_src; break;
+ case Fp_Sub: vd_dst = vd_dst - vd_src; break;
+ case Fp_Mul: vd_dst = vd_dst * vd_src; break;
+ case Fp_Div: vd_dst = vd_dst / vd_src; break;
+ case Fp_SubR: vd_dst = vd_src - vd_dst; break;
+ case Fp_DivR: vd_dst = vd_src / vd_dst; break;
+ default: panic("fp_do_op_mem_ST_0");
+ }
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(0,vd_dst);
+}
+
+static
+void fp_do_COM_mem_ST_0 ( UInt a_src,
+ IFDB( Text t_src CC)
+ Bool dbl, Bool pop )
+{
+ double vd_src, vd_dst;
+ IFDB( if (dis) printf("\tfcom%s%c\t%s,%%st(0)\n",
+ pop?"p":"", dbl?'D':'F', t_src ); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = fp_get_reg_ST(0);
+ vd_src = dbl ? getDMem(a_src) : getFMem(a_src);
+ fp_set_statusword_flags_COM(vd_dst,vd_src);
+ } else {
+ fp_set_statusword_flags_COM_STACKF();
+ fp_set_stack_underflow();
+ }
+ if (pop) (void)fp_pop();
+}
+
+
+Addr do_one_insn_fp ( Addr r_eip, UChar first_opcode )
+{
+ UChar modrm;
+ UInt a_addr, a_src, a_dst;
+ UInt opc_aux;
+ Bool isreg;
+ Int vis_addr;
+ Int vis_dst;
+ double vd_addr, vd_src, vd_dst;
+
+# if DEBUG
+ Text t_opc_aux;
+ Text t_addr, t_dst;
+ Bool ppFpuState = False;
+
+ if (ppFpuState) {
+ printf("\n\nBEFORE\n");
+ printFpuState();
+ printf("\n");
+ }
+# endif
+
+ /* assert that we are running with all exceptions masked */
+ assert( (m_fpu_state.env[FP_ENV_CTRL] & 0x3F) == 0x3F );
+ /* and the implication is that there are no unmasked exceptions
+ reported by the exception status flag. */
+ assert( fp_get_statusword_flag(FP_E_SUMMARY) == 0 );
+
+ modrm = *r_eip;
+
+ /* -+-+-+-+-+-+-+-+-+-+-+-+ 0xD8 opcodes +-+-+-+-+-+-+-+ */
+
+ if (first_opcode == 0xD8) {
+ if (modrm < 0xC0) {
+ /* bits 5,4,3 are an opcode extension, and the modRM also
+ specifies an address. */
+ opc_aux = regno_from_modRM ( r_eip, 4 IFDB(CC &t_opc_aux) );
+ r_eip = amode_from_modRM ( r_eip, 4, &a_addr
+ IFDB(CC &t_addr), &isreg );
+ assert(!isreg);
+ switch (opc_aux) {
+
+ case 0: /* FADD single-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC)
+ Fp_Add, False );
+ break;
+
+ case 1: /* FMUL single-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC)
+ Fp_Mul, False );
+ break;
+
+ case 2: /* FCOM single-real */
+ fp_do_COM_mem_ST_0 ( a_addr, IFDB(t_addr CC)
+ False, False );
+ break;
+
+ case 3: /* FCOMP single-real */
+ fp_do_COM_mem_ST_0 ( a_addr, IFDB(t_addr CC)
+ False, True );
+ break;
+
+ case 4: /* FSUB single-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC)
+ Fp_Sub, False );
+ break;
+
+ case 5: /* FSUBR single-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC)
+ Fp_SubR, False );
+ break;
+
+ case 6: /* FDIV single-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC)
+ Fp_Div, False );
+ break;
+
+ case 7: /* FDIVR single-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC)
+ Fp_DivR, False );
+ break;
+
+ default:
+ printf("unhandled opc_aux = 0x%2x\n", opc_aux);
+ panic("do_one_insn_fp: first_opcode == 0xD8");
+ break;
+ }
+ } else {
+ /* The entire modRM byte is an opcode extension. */
+ r_eip++;
+ switch (modrm) {
+
+ case 0xC0 ... 0xC7: /* FADD %st(?),%st(0) */
+ fp_do_op_ST_ST ( modrm - 0xC0, 0, Fp_Add, False );
+ break;
+
+ case 0xC8 ... 0xCF: /* FMUL %st(?),%st(0) */
+ fp_do_op_ST_ST ( modrm - 0xC8, 0, Fp_Mul, False );
+ break;
+
+ case 0xD0 ... 0xD7: /* FCOM %st(?),%st(0) */
+ fp_do_COM_ST_ST ( modrm - 0xD0, 0, 0 );
+ break;
+
+ case 0xD8 ... 0xDF: /* FCOMP %st(?),%st(0) */
+ fp_do_COM_ST_ST ( modrm - 0xD8, 0, 1 );
+ break;
+
+ case 0xE0 ... 0xE7: /* FSUB %st(?),%st(0) */
+ fp_do_op_ST_ST ( modrm - 0xE0, 0, Fp_Sub, False );
+ break;
+
+ case 0xE8 ... 0xEF: /* FSUBR %st(?),%st(0) */
+ fp_do_op_ST_ST ( modrm - 0xE8, 0, Fp_SubR, False );
+ break;
+
+ case 0xF0 ... 0xF7: /* FDIV %st(?),%st(0) */
+ fp_do_op_ST_ST ( modrm - 0xF0, 0, Fp_Div, False );
+ break;
+
+ case 0xF8 ... 0xFF: /* FDIVR %st(?),%st(0) */
+ fp_do_op_ST_ST ( modrm - 0xF8, 0, Fp_DivR, False );
+ break;
+
+ default:
+ goto unhandled;
+ }
+ }
+ }
+
+ /* -+-+-+-+-+-+-+-+-+-+-+-+ 0xD9 opcodes +-+-+-+-+-+-+-+ */
+ else
+ if (first_opcode == 0xD9) {
+ if (modrm < 0xC0) {
+ /* bits 5,4,3 are an opcode extension, and the modRM also
+ specifies an address. */
+ opc_aux = regno_from_modRM ( r_eip, 4 IFDB(CC &t_opc_aux) );
+ r_eip = amode_from_modRM ( r_eip, 4, &a_addr
+ IFDB(CC &t_addr), &isreg );
+ assert(!isreg);
+ switch (opc_aux) {
+
+ case 0: /* FLD single-real */
+ IFDB( if (dis) printf("\tfldF\t%s\n",t_addr); )
+ vd_addr = getFMem(a_addr);
+ fp_push(vd_addr);
+ break;
+
+ case 2: /* FST single-real */
+ IFDB( if (dis) printf("\tfstF\t%s\n",t_addr); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_get_reg_ST(0);
+ } else {
+ vd_addr = NAN;
+ fp_set_stack_underflow();
+ }
+ setFMem(a_addr,vd_addr);
+ break;
+
+ case 3: /* FSTP single-real */
+ IFDB( if (dis) printf("\tfstpF\t%s\n",t_addr); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_pop();
+ } else {
+ vd_addr = fp_pop(); /* then throw away result */
+ vd_addr = NAN;
+ fp_set_stack_underflow();
+ }
+ setFMem(a_addr,vd_addr);
+ break;
+
+ case 5: /* FLDCW */
+ IFDB( if (dis) printf("\tfldcw\t%s\n",t_addr); )
+ m_fpu_state.env[FP_ENV_CTRL] = (UShort)getIMem2(a_addr);
+ break;
+
+ case 7: /* FNSTCW */
+ IFDB( if (dis) printf("\tfnstcw\t%s\n",t_addr); )
+ setIMem2(a_addr,(UInt)m_fpu_state.env[FP_ENV_CTRL]);
+ break;
+
+ default:
+ printf("unhandled opc_aux = 0x%2x\n", opc_aux);
+ panic("do_one_insn_fp: first_opcode == 0xD9");
+ break;
+ }
+ } else {
+ /* The entire modRM byte is an opcode extension. */
+ r_eip++;
+ switch (modrm) {
+
+ case 0xC0 ... 0xC7: /* FLD %st(?) */
+ a_dst = (UInt)modrm - 0xC0;
+ IFDB( if (dis) printf("\tfld\t%%st(%d)\n",a_dst); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(a_dst)) &&
+ fp_is_empty_tag(fp_get_tag_ST(7))) {
+ vd_dst = fp_get_reg_ST(a_dst);
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_push(vd_dst);
+ break;
+
+ case 0xC8 ... 0xCF: /* FXCH %st(?) */
+ a_dst = (UInt)modrm - 0xC8;
+ IFDB( if (dis) printf("\tfxch\t%%st(%d)\n",a_dst); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(a_dst)) &&
+ !fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = fp_get_reg_ST(a_dst);
+ vd_src = fp_get_reg_ST(0);
+ } else {
+ vd_dst = NAN;
+ vd_src = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(a_dst,vd_src);
+ fp_set_reg_ST(0,vd_dst);
+ break;
+
+ case 0xE0: /* FCHS */
+ IFDB( if (dis) printf("\tfchs\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = - fp_get_reg_ST(0);
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(0,vd_dst);
+ break;
+
+ case 0xE1: /* FABS */
+ IFDB( if (dis) printf("\tfabs\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = fabs(fp_get_reg_ST(0));
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(0,vd_dst);
+ break;
+
+ case 0xE5:
+ /* An approximation to the correct behaviour */
+ IFDB( if (dis) printf("\tfxam\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = fabs(fp_get_reg_ST(0));
+ if (isnan(vd_dst))
+ vis_dst = 1; /* C320 = 001 */
+ else if (isinf(vd_dst))
+ vis_dst = 3; /* C320 = 011 */
+ else if (vd_dst == 0.0 || vd_dst == -0.0)
+ vis_dst = 4; /* C320 = 100 */
+ else
+ vis_dst = 2; /* C320 = 010 */
+ fp_set_statusword_flag_to(FP_F_C1,
+ vd_dst < 0.0 ? 1 : 0);
+ } else {
+ vis_dst = 5; /* C320 = 101 */
+ /* no idea if this is right */
+ fp_set_statusword_flag_to(FP_F_C1, 0);
+ }
+ fp_set_statusword_flag_to(FP_F_C3, (vis_dst >> 2) & 1);
+ fp_set_statusword_flag_to(FP_F_C2, (vis_dst >> 1) & 1);
+ fp_set_statusword_flag_to(FP_F_C0, vis_dst & 1);
+ break;
+
+ case 0xE8: /* FLD1 */
+ IFDB( t_dst = "1"; )
+ vd_dst = 1.0;
+ goto do_fld_CONST;
+ case 0xEC: /* FLDLG2 */
+ IFDB( t_dst = "lg2"; )
+ vd_dst = 0.301029995663981143;
+ goto do_fld_CONST;
+ case 0xED: /* FLDLN2 */
+ IFDB( t_dst = "ln2"; )
+ vd_dst = 0.69314718055994530942;
+ goto do_fld_CONST;
+ case 0xEE: /* FLDZ */
+ IFDB( t_dst = "z"; )
+ vd_dst = 0.0;
+ goto do_fld_CONST;
+ do_fld_CONST:
+ IFDB( if (dis) printf("\tfld%s\n",t_dst); )
+ fp_push(vd_dst);
+ break;
+
+ case 0xF0: /* F2XM1 */
+ IFDB( if (dis) printf("\tf2xm1\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = fp_calc_2xm1(fp_get_reg_ST(0));
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(0,vd_dst);
+ break;
+
+ case 0xF1: /* FYL2X */
+ IFDB( if (dis) printf("\tfyl2x\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0)) &&
+ !fp_is_empty_tag(fp_get_tag_ST(1))) {
+ vd_dst = fp_calc_yl2x(
+ fp_get_reg_ST(0), fp_get_reg_ST(1));
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(1,vd_dst);
+ (void)fp_pop();
+ break;
+
+ case 0xF3: /* FPATAN */
+ IFDB( if (dis) printf("\tfpatan\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0)) &&
+ !fp_is_empty_tag(fp_get_tag_ST(1))) {
+ vd_dst = atan2(
+ fp_get_reg_ST(1), fp_get_reg_ST(0));
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(1,vd_dst);
+ (void)fp_pop();
+ break;
+
+ case 0xF8: { /* FPREM */
+ /* Very incomplete implementation. */
+ Int qq;
+ IFDB( if (dis) printf("\tfprem\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0)) &&
+ !fp_is_empty_tag(fp_get_tag_ST(1))) {
+ fp_calc_fprem( &qq, &vd_dst,
+ fp_get_reg_ST(0), fp_get_reg_ST(1) );
+ fp_set_statusword_flag_to(FP_F_C0, (qq & 4) ? 1 : 0);
+ fp_set_statusword_flag_to(FP_F_C1, (qq & 1) ? 1 : 0);
+ fp_set_statusword_flag_to(FP_F_C2, 0); /* reduction complete */
+ fp_set_statusword_flag_to(FP_F_C3, (qq & 2) ? 1 : 0);
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ fp_set_statusword_flag_to(FP_F_C1, 0); /* stack underflow */
+ }
+ fp_set_reg_ST(0,vd_dst);
+ break;
+ }
+ case 0xF9: /* FYL2XP1 */
+ IFDB( if (dis) printf("\tfyl2xp1\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0)) &&
+ !fp_is_empty_tag(fp_get_tag_ST(1))) {
+ vd_dst = fp_calc_yl2xp1(
+ fp_get_reg_ST(0), fp_get_reg_ST(1));
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(1,vd_dst);
+ (void)fp_pop();
+ break;
+
+ case 0xFA: /* FSQRT */
+ IFDB( if (dis) printf("\tfsqrt\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = sqrt(fp_get_reg_ST(0));
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(0,vd_dst);
+ break;
+
+ case 0xFC: /* FRNDINT */
+ IFDB( if (dis) printf("\tfrndint\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = rint(fp_get_reg_ST(0));
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(0,vd_dst);
+ break;
+
+ case 0xFD: /* FSCALE */
+ IFDB( if (dis) printf("\tfscale\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0)) &&
+ !fp_is_empty_tag(fp_get_tag_ST(1))) {
+ vd_dst = fp_calc_scale(
+ fp_get_reg_ST(0), fp_get_reg_ST(1));
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(0,vd_dst);
+ break;
+
+ case 0xFE: /* FSIN */
+ IFDB( if (dis) printf("\tfsin\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = sin(fp_get_reg_ST(0));
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(0,vd_dst);
+ break;
+
+ case 0xFF: /* FCOS */
+ IFDB( if (dis) printf("\tfcos\n"); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = cos(fp_get_reg_ST(0));
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(0,vd_dst);
+ break;
+
+ default:
+ goto unhandled;
+ }
+ }
+ }
+
+ /* -+-+-+-+-+-+-+-+-+-+-+-+ 0xDA opcodes +-+-+-+-+-+-+-+ */
+ else
+ if (first_opcode == 0xDA) {
+ if (modrm < 0xC0) {
+ /* bits 5,4,3 are an opcode extension, and the modRM also
+ specifies an address. */
+ opc_aux = regno_from_modRM ( r_eip, 4 IFDB(CC &t_opc_aux) );
+ r_eip = amode_from_modRM ( r_eip, 4, &a_addr
+ IFDB(CC &t_addr), &isreg );
+ assert(!isreg);
+ switch (opc_aux) {
+
+ case 0: /* FIADD m32int */
+ IFDB( if (dis) printf("\tfiaddl\t%s\n",t_addr); )
+ vis_addr = getIMem4(a_addr);
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_get_reg_ST(0) + (double)vis_addr;
+ fp_set_reg_ST(0, vd_addr);
+ /* we should set C1 here */
+ } else {
+ fp_set_reg_ST(0, NAN);
+ fp_set_stack_underflow();
+ }
+ break;
+
+ case 1: /* FIMUL m32int */
+ IFDB( if (dis) printf("\tfimull\t%s\n",t_addr); )
+ vis_addr = getIMem4(a_addr);
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_get_reg_ST(0) * (double)vis_addr;
+ fp_set_reg_ST(0, vd_addr);
+ /* we should set C1 here */
+ } else {
+ fp_set_reg_ST(0, NAN);
+ fp_set_stack_underflow();
+ }
+ break;
+
+ case 2: /* FICOM m32int */
+ IFDB( if (dis) printf("\tficoml\t%s\n",t_addr); )
+ vis_addr = getIMem4(a_addr);
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = fp_get_reg_ST(0);
+ vd_src = (double)vis_addr;
+ fp_set_statusword_flags_COM(vd_dst,vd_src);
+ /* we should set C1 here */
+ } else {
+ fp_set_statusword_flags_COM_STACKF();
+ fp_set_stack_underflow();
+ }
+ break;
+
+ case 3: /* FICOMP m32int */
+ IFDB( if (dis) printf("\tficompl\t%s\n",t_addr); )
+ vis_addr = getIMem4(a_addr);
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = fp_get_reg_ST(0);
+ vd_src = (double)vis_addr;
+ fp_set_statusword_flags_COM(vd_dst,vd_src);
+ /* we should set C1 here */
+ } else {
+ fp_set_statusword_flags_COM_STACKF();
+ fp_set_stack_underflow();
+ }
+ (void)fp_pop();
+ break;
+
+ case 4: /* FISUB m32int */
+ IFDB( if (dis) printf("\tfisubl\t%s\n",t_addr); )
+ vis_addr = getIMem4(a_addr);
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_get_reg_ST(0) - (double)vis_addr;
+ fp_set_reg_ST(0, vd_addr);
+ /* we should set C1 here */
+ } else {
+ fp_set_reg_ST(0, NAN);
+ fp_set_stack_underflow();
+ }
+ break;
+
+ case 5: /* FISUBR m32int */
+ IFDB( if (dis) printf("\tfisubrl\t%s\n",t_addr); )
+ vis_addr = getIMem4(a_addr);
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = (double)vis_addr - fp_get_reg_ST(0);
+ fp_set_reg_ST(0, vd_addr);
+ /* we should set C1 here */
+ } else {
+ fp_set_reg_ST(0, NAN);
+ fp_set_stack_underflow();
+ }
+ break;
+
+ case 6: /* FIDIV m32int */
+ IFDB( if (dis) printf("\tfidivl\t%s\n",t_addr); )
+ vis_addr = getIMem4(a_addr);
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_get_reg_ST(0) / (double)vis_addr;
+ fp_set_reg_ST(0, vd_addr);
+ /* we should set C1 here */
+ } else {
+ fp_set_reg_ST(0, NAN);
+ fp_set_stack_underflow();
+ }
+ break;
+
+ case 7: /* FIDIVR m32int */
+ IFDB( if (dis) printf("\tfidivl\t%s\n",t_addr); )
+ vis_addr = getIMem4(a_addr);
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = (double)vis_addr / fp_get_reg_ST(0);
+ fp_set_reg_ST(0, vd_addr);
+ /* we should set C1 here */
+ } else {
+ fp_set_reg_ST(0, NAN);
+ fp_set_stack_underflow();
+ }
+ break;
+
+ default:
+ printf("unhandled opc_aux = 0x%2x\n", opc_aux);
+ panic("do_one_insn_fp: first_opcode == 0xDA");
+ break;
+ }
+ } else {
+ /* The entire modRM byte is an opcode extension. */
+ r_eip++;
+ switch (modrm) {
+
+ case 0xE9: /* FUCOMPP %st(0),%st(1) */
+ /* seems the wrong way round. */
+ fp_do_COM_ST_ST ( 1, 0, 2 );
+ break;
+
+ default:
+ goto unhandled;
+ }
+ }
+ }
+
+ /* -+-+-+-+-+-+-+-+-+-+-+-+ 0xDB opcodes +-+-+-+-+-+-+-+ */
+ else
+ if (first_opcode == 0xDB) {
+ if (modrm < 0xC0) {
+ /* bits 5,4,3 are an opcode extension, and the modRM also
+ specifies an address. */
+ opc_aux = regno_from_modRM ( r_eip, 4 IFDB(CC &t_opc_aux) );
+ r_eip = amode_from_modRM ( r_eip, 4, &a_addr
+ IFDB(CC &t_addr), &isreg );
+ assert(!isreg);
+ switch (opc_aux) {
+
+ case 0: /* FILD m32int */
+ IFDB( if (dis) printf("\tfildl\t%s\n",t_addr); )
+ vis_addr = getIMem4(a_addr);
+ fp_push ( (double)vis_addr );
+ break;
+
+ case 2: /* FIST m32 */
+ IFDB( if (dis) printf("\tfistl\t%s\n",t_addr); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_get_reg_ST(0);
+ if (vd_addr <= -2147483648.5 ||
+ vd_addr >= 2147483647.5)
+ vis_addr = 0x80000000; /* 32-bit int indefinite */
+ else
+ vis_addr = (Int)vd_addr;
+ } else {
+ vis_addr = 0x80000000; /* 32-bit indefinite */
+ fp_set_stack_underflow();
+ }
+ setIMem4(a_addr,vis_addr);
+ break;
+
+ case 3: /* FISTP m32 */
+ IFDB( if (dis) printf("\tfistpl\t%s\n",t_addr); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_pop();
+ if (vd_addr <= -2147483648.5 ||
+ vd_addr >= 2147483647.5)
+ vis_addr = 0x80000000; /* 32-bit int indefinite */
+ else
+ vis_addr = (Int)vd_addr;
+ } else {
+ vd_addr = fp_pop(); /* then throw away result */
+ vis_addr = 0x80000000; /* 32-bit indefinite */
+ fp_set_stack_underflow();
+ }
+ setIMem4(a_addr,vis_addr);
+ break;
+
+ case 5: /* FLD extended-real */
+ IFDB( if (dis) printf("\tfldT\t%s\n",t_addr); )
+ vd_addr = getTMem(a_addr);
+ fp_push(vd_addr);
+ break;
+
+ case 7: /* FSTP extended-real */
+ IFDB( if (dis) printf("\tfstpT\t%s\n",t_addr); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_pop();
+ } else {
+ vd_addr = fp_pop(); /* then throw away result */
+ vd_addr = NAN;
+ fp_set_stack_underflow();
+ }
+ setTMem(a_addr,vd_addr);
+ break;
+
+ default:
+ printf("unhandled opc_aux = 0x%2x\n", opc_aux);
+ panic("do_one_insn_fp: first_opcode == 0xDB");
+ break;
+ }
+ } else {
+ /* The entire modRM byte is an opcode extension. */
+ r_eip++;
+ switch (modrm) {
+ default:
+ goto unhandled;
+ }
+ }
+ }
+
+ /* -+-+-+-+-+-+-+-+-+-+-+-+ 0xDC opcodes +-+-+-+-+-+-+-+ */
+ else
+ if (first_opcode == 0xDC) {
+ if (modrm < 0xC0) {
+ /* bits 5,4,3 are an opcode extension, and the modRM also
+ specifies an address. */
+ opc_aux = regno_from_modRM ( r_eip, 4 IFDB(CC &t_opc_aux) );
+ r_eip = amode_from_modRM ( r_eip, 4, &a_addr
+ IFDB(CC &t_addr), &isreg );
+ assert(!isreg);
+ switch (opc_aux) {
+
+ case 0: /* FADD double-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC) Fp_Add, True );
+ break;
+
+ case 1: /* FMUL double-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC) Fp_Mul, True );
+ break;
+
+ case 2: /* FCOM double-real */
+ fp_do_COM_mem_ST_0 ( a_addr, IFDB(t_addr CC) True, False );
+ break;
+
+ case 3: /* FCOMP double-real */
+ fp_do_COM_mem_ST_0 ( a_addr, IFDB(t_addr CC) True, True );
+ break;
+
+ case 4: /* FSUB double-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC) Fp_Sub, True );
+ break;
+
+ case 5: /* FSUBR double-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC) Fp_SubR, True );
+ break;
+
+ case 6: /* FDIV double-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC) Fp_Div, True );
+ break;
+
+ case 7: /* FDIVR double-real */
+ fp_do_op_mem_ST_0 ( a_addr, IFDB(t_addr CC) Fp_DivR, True );
+ break;
+
+ default:
+ printf("unhandled opc_aux = 0x%2x\n", opc_aux);
+ panic("do_one_insn_fp: first_opcode == 0xDC");
+ break;
+ }
+ } else {
+ /* The entire modRM byte is an opcode extension. */
+ r_eip++;
+ switch (modrm) {
+
+ case 0xC0 ... 0xC7: /* FADD %st(0),%st(?) */
+ fp_do_op_ST_ST ( 0, modrm - 0xC0, Fp_Add, False );
+ break;
+
+ case 0xC8 ... 0xCF: /* FMUL %st(0),%st(?) */
+ fp_do_op_ST_ST ( 0, modrm - 0xC8, Fp_Mul, False );
+ break;
+
+ case 0xE0 ... 0xE7: /* FSUBR %st(0),%st(?) */
+ fp_do_op_ST_ST ( 0, modrm - 0xE0, Fp_SubR, False );
+ break;
+
+ case 0xE8 ... 0xEF: /* FSUB %st(0),%st(?) */
+ fp_do_op_ST_ST ( 0, modrm - 0xE8, Fp_Sub, False );
+ break;
+
+ case 0xF8 ... 0xFF: /* FDIV %st(0),%st(?) */
+ fp_do_op_ST_ST ( 0, modrm - 0xF8, Fp_Div, False );
+ break;
+
+ default:
+ goto unhandled;
+ }
+ }
+ }
+
+ /* -+-+-+-+-+-+-+-+-+-+-+-+ 0xDD opcodes +-+-+-+-+-+-+-+ */
+ else
+ if (first_opcode == 0xDD) {
+ if (modrm < 0xC0) {
+ /* bits 5,4,3 are an opcode extension, and the modRM also
+ specifies an address. */
+ opc_aux = regno_from_modRM ( r_eip, 4 IFDB(CC &t_opc_aux) );
+ r_eip = amode_from_modRM ( r_eip, 4, &a_addr
+ IFDB(CC &t_addr), &isreg );
+ assert(!isreg);
+ switch (opc_aux) {
+
+ case 0: /* FLD double-real */
+ IFDB( if (dis) printf("\tfldD\t%s\n",t_addr); )
+ vd_addr = getDMem(a_addr);
+ fp_push(vd_addr);
+ break;
+
+ case 2: /* FST double-real */
+ IFDB( if (dis) printf("\tfstD\t%s\n",t_addr); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_get_reg_ST(0);
+ } else {
+ vd_addr = NAN;
+ fp_set_stack_underflow();
+ }
+ setDMem(a_addr,vd_addr);
+ break;
+
+ case 3: /* FSTP double-real */
+ IFDB( if (dis) printf("\tfstpD\t%s\n",t_addr); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_pop();
+ } else {
+ vd_addr = fp_pop(); /* then throw away result */
+ vd_addr = NAN;
+ fp_set_stack_underflow();
+ }
+ setDMem(a_addr,vd_addr);
+ break;
+ default:
+ printf("unhandled opc_aux = 0x%2x\n", opc_aux);
+ panic("do_one_insn_fp: first_opcode == 0xDD");
+ break;
+ }
+ } else {
+ /* The entire modRM byte is an opcode extension. */
+ r_eip++;
+ switch (modrm) {
+
+ case 0xC0 ... 0xC7: /* FFREE %st(?) */
+ a_dst = (UInt)modrm - 0xC0;
+ IFDB( if (dis) printf("\tffree\t%%st(%d)\n", a_dst); )
+ fp_set_tag_ST( a_dst, FP_TAG_EMPTY );
+ break;
+
+ case 0xD0 ... 0xD7: /* FST %st(0),%st(?) */
+ a_dst = (UInt)modrm - 0xD0;
+ IFDB( if (dis) printf("\tfst\t%%st(0),%%st(%d)\n",
+ a_dst); )
+ if ( /* don't check the destination tag */
+ !fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = fp_get_reg_ST(0);
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(a_dst,vd_dst);
+ break;
+
+ case 0xD8 ... 0xDF: /* FSTP %st(0),%st(?) */
+ a_dst = (UInt)modrm - 0xD8;
+ IFDB( if (dis) printf("\tfstp\t%%st(0),%%st(%d)\n",
+ a_dst); )
+ if ( /* don't check the destination tag */
+ !fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_dst = fp_get_reg_ST(0);
+ } else {
+ vd_dst = NAN;
+ fp_set_stack_underflow();
+ }
+ fp_set_reg_ST(a_dst,vd_dst);
+ (void)fp_pop();
+ break;
+
+ case 0xE0 ... 0xE7: /* FUCOM %st(0),%st(?) */
+ a_src = (UInt)modrm - 0xE0;
+ IFDB( if (dis) printf("\tfucom\t%%st(0),%%st(%d)\n",
+ a_src); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(a_src)) &&
+ !fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_src = fp_get_reg_ST(a_src);
+ vd_dst = fp_get_reg_ST(0);
+ fp_set_statusword_flags_COM(vd_dst,vd_src);
+ } else {
+ fp_set_statusword_flags_COM_STACKF();
+ fp_set_stack_underflow();
+ }
+ break;
+
+ case 0xE8 ... 0xEF: /* FUCOMP %st(0),%st(?) */
+ a_src = (UInt)modrm - 0xE8;
+ IFDB( if (dis) printf("\tfucomp\t%%st(0),%%st(%d)\n",
+ a_src); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(a_src)) &&
+ !fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_src = fp_get_reg_ST(a_src);
+ vd_dst = fp_get_reg_ST(0);
+ fp_set_statusword_flags_COM(vd_dst,vd_src);
+ } else {
+ fp_set_statusword_flags_COM_STACKF();
+ fp_set_stack_underflow();
+ }
+ (void)fp_pop();
+ break;
+
+ default:
+ goto unhandled;
+ }
+ }
+ }
+
+ /* -+-+-+-+-+-+-+-+-+-+-+-+ 0xDE opcodes +-+-+-+-+-+-+-+ */
+ else
+ if (first_opcode == 0xDE) {
+ if (modrm < 0xC0) {
+ /* bits 5,4,3 are an opcode extension, and the modRM also
+ specifies an address. */
+ opc_aux = regno_from_modRM ( r_eip, 4 IFDB(CC &t_opc_aux) );
+ r_eip = amode_from_modRM ( r_eip, 4, &a_addr
+ IFDB(CC &t_addr), &isreg );
+ assert(!isreg);
+ switch (opc_aux) {
+ default:
+ printf("unhandled opc_aux = 0x%2x\n", opc_aux);
+ panic("do_one_insn_fp: first_opcode == 0xDE");
+ break;
+ }
+ } else {
+ /* The entire modRM byte is an opcode extension. */
+ r_eip++;
+ switch (modrm) {
+
+ case 0xC0 ... 0xC7: /* FADDP %st(0),%st(?) */
+ fp_do_op_ST_ST ( 0, modrm - 0xC0, Fp_Add, True );
+ break;
+
+ case 0xC8 ... 0xCF: /* FMULP %st(0),%st(?) */
+ fp_do_op_ST_ST ( 0, modrm - 0xC8, Fp_Mul, True );
+ break;
+
+ case 0xD9: /* FCOMPP %st(0),%st(1) */
+ /* seems the wrong way round. */
+ fp_do_COM_ST_ST ( 1, 0, 2 );
+ break;
+
+ case 0xE0 ... 0xE7: /* FSUBRP %st(0),%st(?) */
+ fp_do_op_ST_ST ( 0, modrm - 0xE0, Fp_SubR, True );
+ break;
+
+ case 0xE8 ... 0xEF: /* FSUBP %st(0),%st(?) */
+ fp_do_op_ST_ST ( 0, modrm - 0xE8, Fp_Sub, True );
+ break;
+
+ case 0xF0 ... 0xF7: /* FDIVRP %st(0),%st(?) */
+ fp_do_op_ST_ST ( 0, modrm - 0xF0, Fp_DivR, True );
+ break;
+
+ case 0xF8 ... 0xFF: /* FDIVP %st(0),%st(?) */
+ fp_do_op_ST_ST ( 0, modrm - 0xF8, Fp_Div, True );
+ break;
+
+ default:
+ goto unhandled;
+ }
+ }
+ }
+
+ /* -+-+-+-+-+-+-+-+-+-+-+-+ 0xDF opcodes +-+-+-+-+-+-+-+ */
+ else
+ if (first_opcode == 0xDF) {
+ if (modrm < 0xC0) {
+ /* bits 5,4,3 are an opcode extension, and the modRM also
+ specifies an address. */
+ opc_aux = regno_from_modRM ( r_eip, 4 IFDB(CC &t_opc_aux) );
+ r_eip = amode_from_modRM ( r_eip, 4, &a_addr
+ IFDB(CC &t_addr), &isreg );
+ assert(!isreg);
+ switch (opc_aux) {
+
+ case 0: /* FILD m16int */
+ IFDB( if (dis) printf("\tfildw\t%s\n",t_addr); )
+ vis_addr = extend_s_16to32(getIMem2(a_addr));
+ fp_push ( (double) vis_addr );
+ break;
+
+ case 3: /* FISTP m16 */
+ IFDB( if (dis) printf("\tfistpw\t%s\n",t_addr); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_pop();
+ if (vd_addr <= -32768.50 ||
+ vd_addr >= 32767.50)
+ vis_addr = 0x00008000; /* 16-bit int indefinite */
+ else
+ vis_addr = (Short)vd_addr;
+ } else {
+ vd_addr = fp_pop(); /* then throw away result */
+ vis_addr = 0x00008000; /* 32-bit indefinite */
+ fp_set_stack_underflow();
+ }
+ setIMem2(a_addr,vis_addr);
+ break;
+
+ case 5: { /* FILD m64int */
+ ULong vis_addr64;
+ IFDB( if (dis) printf("\tfildq\t%s\n",t_addr); )
+ vis_addr = getIMem4(a_addr+4);
+ vis_addr64 = ((ULong)vis_addr) << 32;
+ vis_addr = getIMem4(a_addr);
+ vis_addr64 += (ULong)vis_addr;
+ fp_push ( (double) ((Long)vis_addr64) );
+ break;
+ }
+
+ case 7: { /* FISTP m64int */
+ ULong vis_addr64;
+ IFDB( if (dis) printf("\tfistpq\t%s\n",t_addr); )
+ if (!fp_is_empty_tag(fp_get_tag_ST(0))) {
+ vd_addr = fp_pop();
+ if (vd_addr <= -9223372036854775808.5 ||
+ vd_addr >= 9223372036854775807.5)
+ vis_addr64 = 0x8000000000000000LL;
+ /* 64-bit int indefinite */
+ else
+ vis_addr64 = (Long)vd_addr;
+ } else {
+ vd_addr = fp_pop(); /* then throw away result */
+ vis_addr64 = 0x8000000000000000LL; /* 64-bit indefinite */
+ fp_set_stack_underflow();
+ }
+ setIMem4(a_addr,vis_addr64 & 0xFFFFFFFFLL);
+ setIMem4(a_addr+4, (((Long)vis_addr64) >> 32)
+ & 0xFFFFFFFFLL);
+ break;
+ }
+
+ default:
+ printf("unhandled opc_aux = 0x%2x\n", opc_aux);
+ panic("do_one_insn_fp: first_opcode == 0xDF");
+ break;
+ }
+ } else {
+ /* The entire modRM byte is an opcode extension. */
+ r_eip++;
+ switch (modrm) {
+
+ case 0xE0: /* FNSTSW %ax */
+ IFDB( if (dis) printf("\tfnstsw\t%%ax\n"); )
+ setIReg2(R_EAX, (UInt)m_fpu_state.env[FP_ENV_STAT]);
+ break;
+
+ default:
+ goto unhandled;
+ }
+ }
+ }
+
+ /* -+-+-+-+-+-+-+-+-+-+-+-+ Unhandled ESC opcode +-+-+-+ */
+ else goto unhandled;
+
+# if DEBUG
+ if (ppFpuState) {
+ printf("\nAFTER\n");
+ printFpuState();
+ printf("\n");
+ }
+# endif
+
+ return r_eip;
+
+ unhandled:
+ hd_message(Hd_DebugMsg,
+ "first opcode = 0x%x, modRM = 0x%x",
+ (UInt)first_opcode, (UInt)modrm );
+ panic("do_one_insn_fp: unhandled first_opcode/modrm combination");
+ assert(0);
+}
+
+/*--------------------------------------------------------------------*/
+/*--- end hd_fpu.c ---*/
+/*--------------------------------------------------------------------*/
diff --git a/main/VEX/useful/show_fp_state.c b/main/VEX/useful/show_fp_state.c
new file mode 100644
index 0000000..06eab5a
--- /dev/null
+++ b/main/VEX/useful/show_fp_state.c
@@ -0,0 +1,184 @@
+
+#include <stdio.h>
+#include <assert.h>
+
+
+/* ------------------------------------------------- */
+
+typedef unsigned char UChar;
+typedef unsigned short UShort;
+typedef unsigned int UInt;
+typedef unsigned long long int ULong;
+
+typedef signed char Char;
+typedef short Short;
+typedef int Int;
+typedef long long int Long;
+
+typedef
+ struct {
+ UShort env[14];
+ UChar reg[80];
+ }
+ Fpu_State;
+
+/* Offsets, in 16-bit ints, into the FPU environment (env) area. */
+#define FP_ENV_CTRL 0
+#define FP_ENV_STAT 2
+#define FP_ENV_TAG 4
+#define FP_ENV_IP 6 /* and 7 */
+#define FP_ENV_CS 8
+#define FP_ENV_OPOFF 10 /* and 11 */
+#define FP_ENV_OPSEL 12
+#define FP_REG(ii) (10*(7-(ii)))
+
+/* Bitfield offsets for exceptions in the FPU status and control words. */
+#define FP_E_INVAL 0
+#define FP_E_DENOR 1
+#define FP_E_DIVZ 2
+#define FP_E_OVERF 3
+#define FP_E_UNDER 4
+#define FP_E_LOS 5
+
+/* More bitfield offsets, but for the status word only. */
+#define FP_E_STACKF 6
+#define FP_E_SUMMARY 7
+#define FP_F_C0 8
+#define FP_F_C1 9
+#define FP_F_C2 10
+#define FP_F_C3 14
+/* top-of-stack ptr is bits 13,12,11 of the word */
+#define FP_F_TOS_LO 11
+#define FP_F_TOS_HI 13
+
+/* Register tags. */
+#define FP_TAG_VALID 0
+#define FP_TAG_ZERO 1
+#define FP_TAG_SPEC 2
+#define FP_TAG_EMPTY 3
+
+char* fp_tag_names[4]
+ = { "Valid", "Zero", "Spec", "Empty" };
+
+char* fp_exception_names[6]
+ = { "INVAL", "DENOR", "DIVZ", "OVERF", "UNDERF", "LOS" };
+
+Fpu_State m_fpu_state;
+
+
+
+UInt fp_get_tos ( void )
+{
+ return (m_fpu_state.env[FP_ENV_STAT] >> FP_F_TOS_LO) & 7;
+}
+
+UInt fp_get_tag ( UInt regno )
+{
+ assert(!(regno < 0 || regno > 7));
+ return (m_fpu_state.env[FP_ENV_TAG] >> (2*regno)) & 3;
+}
+
+UInt fp_get_statusword_flag ( UInt flagno )
+{
+ assert(!(flagno < 0 || flagno > 15));
+ return (m_fpu_state.env[FP_ENV_STAT] >> flagno) & 0x1;
+}
+
+UInt fp_get_controlword_flag ( UInt flagno )
+{
+ assert(!(flagno < 0 || flagno > 15));
+ return (m_fpu_state.env[FP_ENV_CTRL] >> flagno) & 0x1;
+}
+
+static
+void printFpuState ( void )
+{
+ Int i, j, k;
+ assert(sizeof(Fpu_State)==108);
+ for (i = 7; i >= 0; i--) {
+ printf ( " %s fpreg%d: 0x",
+ (UInt)i == fp_get_tos() ? "**" : " ", i );
+ for (k = 0, j = FP_REG(i)+9; k < 10; k++,j--)
+ printf ( "%02x", (UInt)m_fpu_state.reg[j]);
+ printf ( " %5s ", fp_tag_names[fp_get_tag(i)] );
+ printf("\n");
+ //printf ( "%20.16e\n", fp_get_reg(i) );
+ }
+ printf(" fctrl: 0x%04x masked: ",
+ (UInt)m_fpu_state.env[FP_ENV_CTRL] );
+ for (i = FP_E_INVAL; i <= FP_E_LOS; i++)
+ if (fp_get_controlword_flag(i))
+ printf ( "%s ", fp_exception_names[i] );
+ printf ( "\n" );
+
+ printf(" fstat: 0x%04x except:",
+ (UInt)m_fpu_state.env[FP_ENV_STAT] );
+ for (i = FP_E_INVAL; i <= FP_E_LOS; i++)
+ if (fp_get_statusword_flag(i))
+ printf ( "%s ", fp_exception_names[i] );
+ printf ( " top: %d ", fp_get_tos() );
+ printf ( "c3210: %d%d%d%d",
+ fp_get_statusword_flag(FP_F_C3),
+ fp_get_statusword_flag(FP_F_C2),
+ fp_get_statusword_flag(FP_F_C1),
+ fp_get_statusword_flag(FP_F_C0) );
+ printf ( " STACKF: %d\n", fp_get_statusword_flag(FP_E_STACKF) );
+
+ printf(" ftag: 0x%04x ", (UInt)m_fpu_state.env[FP_ENV_TAG] );
+ for (i = 7; i >= 0; i--)
+ printf ( "%d:%s ", i, fp_tag_names[fp_get_tag(i)] );
+ printf("\n");
+
+ printf(" fip: 0x%08x\n",
+ (((UInt)m_fpu_state.env[FP_ENV_IP+1]) << 16) |
+ ((UInt)m_fpu_state.env[FP_ENV_IP]) );
+ printf(" fcs: 0x%04x\n",
+ ((UInt)m_fpu_state.env[FP_ENV_CS]) );
+ printf(" fopoff: 0x%08x\n",
+ (((UInt)m_fpu_state.env[FP_ENV_OPOFF+1]) << 16) |
+ ((UInt)m_fpu_state.env[FP_ENV_OPOFF]) );
+ printf(" fopsel: 0x%04x\n",
+ ((UInt)m_fpu_state.env[FP_ENV_OPSEL]) );
+}
+
+
+/* ------------------------------------------------- */
+
+
+/* Initialise the FPU, dump its state, and print it. */
+
+
+void show ( unsigned char* st )
+{
+ int i;
+ for (i = 0; i < 28; i++) {
+ printf("%02x ", st[i]);
+ if (i > 0 && ((i & 3) == 3)) printf("\n");
+ }
+ for (i = 0; i < 80; i++) {
+ printf("%02x ", st[i+28]);
+ if (i > 0 && ((i % 10) == 9)) printf("\n");
+ }
+ printf("\n");
+}
+
+int main ( void )
+{
+ Fpu_State* st = &m_fpu_state;
+ assert(sizeof(m_fpu_state) == 108);
+ asm volatile ("finit ; fnsave %0"
+ : "=m" (m_fpu_state)
+ :
+ : "memory" );
+ printFpuState();
+ printf("\n\n");
+
+ asm volatile ("fildl 0(%%esp) ; pushl $17 ; fildl 0(%%esp) ; addl $4, %%esp ; fnsave %0"
+ : "=m" (m_fpu_state)
+ :
+ : "memory" );
+ printFpuState();
+ printf("\n");
+ show(st);
+ return 0;
+}
diff --git a/main/VEX/useful/smchash.c b/main/VEX/useful/smchash.c
new file mode 100644
index 0000000..b13e5c2
--- /dev/null
+++ b/main/VEX/useful/smchash.c
@@ -0,0 +1,324 @@
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <assert.h>
+
+typedef signed int Int;
+typedef unsigned int UInt;
+typedef unsigned long long int Addr64;
+typedef unsigned char UChar;
+typedef unsigned long int UWord;
+
+static inline UInt ROL32 ( UInt x, UInt n ) {
+ assert(n != 0);
+ n &= 31;
+ x = (x << n) | (x >> (32-n));
+ return x;
+}
+
+//////////////////////////////////////////////////////////
+
+typedef
+ struct {
+ Addr64 ga;
+ Int nbytes;
+ UChar* bytes;
+ UChar* actual;
+ }
+ GuestBytes;
+
+GuestBytes* read_one ( FILE* f )
+{
+ Int r;
+ UInt i;
+ UInt esum, csum;
+
+ GuestBytes* gb = malloc(sizeof(GuestBytes));
+ assert(gb);
+
+ if (feof(f)) return NULL;
+ assert(!ferror(f));
+
+ r= fscanf(f, "GuestBytes %llx %d ", &gb->ga, &gb->nbytes);
+ if (0) printf("r = %d\n", r);
+ assert(r == 2);
+
+ assert(gb->ga != 0);
+ assert(gb->nbytes > 0);
+ assert(gb->nbytes < 5000); // let's say
+
+ Int nToAlloc = gb->nbytes + (gb->ga & 3);
+
+ gb->bytes = malloc( gb->nbytes + nToAlloc);
+ gb->actual = gb->bytes + (gb->ga & 3);
+ assert(gb->bytes);
+
+ csum = 0;
+ for (i = 0; i < gb->nbytes; i++) {
+ UInt b;
+ r= fscanf(f, "%02x ", &b);
+ assert(r == 1);
+ gb->actual[i] = b;
+ csum = (csum << 1) ^ b;
+ }
+
+ r= fscanf(f, " %08x\n", &esum);
+ assert(r == 1);
+
+ assert(esum == csum);
+
+ return gb;
+}
+
+//////////////////////////////////////////////////////////
+
+void apply_to_all ( FILE* f,
+ void(*fn)( GuestBytes*, void* ),
+ void* opaque )
+{
+ while (!feof(f)) {
+ GuestBytes* gb = read_one(f);
+ if (0) printf("got %llu %d\n", gb->ga, gb->nbytes);
+ fn( gb, opaque );
+ free(gb->bytes);
+ free(gb);
+ }
+}
+
+//////////////////////////////////////////////////////////
+
+UInt hash_const_zero ( GuestBytes* gb ) {
+ return 0;
+}
+
+UInt hash_sum ( GuestBytes* gb ) {
+ UInt i, sum = 0;
+ for (i = 0; i < gb->nbytes; i++)
+ sum += (UInt)gb->actual[i];
+ return sum;
+}
+
+UInt hash_rol ( GuestBytes* gb ) {
+ UInt i, sum = 0;
+ for (i = 0; i < gb->nbytes; i++) {
+ sum ^= (UInt)gb->actual[i];
+ sum = ROL32(sum,7);
+ }
+ return sum;
+}
+
+static UInt cand0 ( GuestBytes* gb )
+{
+ UWord addr = (UWord)gb->actual;
+ UWord len = gb->nbytes;
+ UInt sum = 0;
+ /* pull up to 4-alignment */
+ while ((addr & 3) != 0 && len >= 1) {
+ UChar* p = (UChar*)addr;
+ sum = (sum << 8) | (UInt)p[0];
+ addr++;
+ len--;
+ }
+ /* vectorised + unrolled */
+ while (len >= 16) {
+ UInt* p = (UInt*)addr;
+ sum = ROL32(sum ^ p[0], 13);
+ sum = ROL32(sum ^ p[1], 13);
+ sum = ROL32(sum ^ p[2], 13);
+ sum = ROL32(sum ^ p[3], 13);
+ addr += 16;
+ len -= 16;
+ }
+ /* vectorised fixup */
+ while (len >= 4) {
+ UInt* p = (UInt*)addr;
+ sum = ROL32(sum ^ p[0], 13);
+ addr += 4;
+ len -= 4;
+ }
+ /* scalar fixup */
+ while (len >= 1) {
+ UChar* p = (UChar*)addr;
+ sum = ROL32(sum ^ (UInt)p[0], 19);
+ addr++;
+ len--;
+ }
+ return sum;
+}
+
+static UInt cand1 ( GuestBytes* gb )
+{
+ UWord addr = (UWord)gb->actual;
+ UWord len = gb->nbytes;
+ UInt sum1 = 0, sum2 = 0;
+ /* pull up to 4-alignment */
+ while ((addr & 3) != 0 && len >= 1) {
+ UChar* p = (UChar*)addr;
+ sum1 = (sum1 << 8) | (UInt)p[0];
+ addr++;
+ len--;
+ }
+ /* vectorised + unrolled */
+ while (len >= 16) {
+ UInt* p = (UInt*)addr;
+ UInt w;
+ w = p[0]; sum1 = ROL32(sum1 ^ w, 31); sum2 += w;
+ w = p[1]; sum1 = ROL32(sum1 ^ w, 31); sum2 += w;
+ w = p[2]; sum1 = ROL32(sum1 ^ w, 31); sum2 += w;
+ w = p[3]; sum1 = ROL32(sum1 ^ w, 31); sum2 += w;
+ addr += 16;
+ len -= 16;
+ sum1 ^= sum2;
+ }
+ /* vectorised fixup */
+ while (len >= 4) {
+ UInt* p = (UInt*)addr;
+ UInt w = p[0];
+ sum1 = ROL32(sum1 ^ w, 31); sum2 += w;
+ addr += 4;
+ len -= 4;
+ sum1 ^= sum2;
+ }
+ /* scalar fixup */
+ while (len >= 1) {
+ UChar* p = (UChar*)addr;
+ UInt w = (UInt)p[0];
+ sum1 = ROL32(sum1 ^ w, 31); sum2 += w;
+ addr++;
+ len--;
+ }
+ return sum1 + sum2;
+}
+
+static UInt adler32 ( GuestBytes* gb )
+{
+ UWord addr = (UWord)gb->actual;
+ UWord len = gb->nbytes;
+ UInt s1 = 1;
+ UInt s2 = 0;
+ UChar* buf = (UChar*)addr;
+ while (len >= 4) {
+ s1 += buf[0];
+ s2 += s1;
+ s1 += buf[1];
+ s2 += s1;
+ s1 += buf[2];
+ s2 += s1;
+ s1 += buf[3];
+ s2 += s1;
+ buf += 4;
+ len -= 4;
+ }
+ while (len > 0) {
+ s1 += buf[0];
+ s2 += s1;
+ len--;
+ buf++;
+ }
+ return (s2 << 16) + s1;
+}
+
+
+
+
+//////////////////////////////////////////////////////////
+
+UInt (*theFn)(GuestBytes*) =
+ //hash_const_zero;
+ //hash_sum;
+//hash_rol;
+//cand0;
+ cand1;
+ //adler32;
+
+Int cmp_UInt_ps ( UInt* p1, UInt* p2 ) {
+ if (*p1 < *p2) return -1;
+ if (*p1 > *p2) return 1;
+ return 0;
+}
+
+Int nSetBits ( UInt w )
+{
+ Int i, j;
+ j = 0;
+ for (i = 0; i < 32; i++)
+ if (w & (1<<i))
+ j++;
+ return j;
+}
+
+Int toc_nblocks = 0;
+Int toc_nblocks_with_zero = 0;
+double toc_sum_of_avgs = 0.0;
+
+void invertBit ( UChar* b, UInt ix, UInt bix ) {
+ b[ix] ^= (1 << bix);
+}
+
+void try_onebit_changes( GuestBytes* gb, void* opaque )
+{
+ toc_nblocks++;
+ /* collect up the hash values for all one bit changes of the key,
+ and also that for the unmodified key. Then compute the number
+ of changed bits for all of them. */
+ UInt hashIx = 0;
+ UInt nHashes = 8 * gb->nbytes;
+ UInt* hashes = malloc( nHashes * sizeof(UInt) );
+
+ UInt byteIx, bitIx;
+ UInt hInit, hFinal, hRunning;
+ Int dist, totDist = 0, nNoDist = 0;
+ assert(hashes);
+ hInit = theFn( gb );
+ for (byteIx = 0; byteIx < gb->nbytes; byteIx++) {
+ for (bitIx = 0; bitIx < 8; bitIx++) {
+
+ invertBit(gb->actual, byteIx, bitIx);
+ //invertBit(gb->actual, byteIx, bitIx ^ 4);
+
+ hRunning = theFn( gb );
+
+ dist = nSetBits(hRunning ^ hInit);
+ totDist += dist;
+ if (dist == 0) nNoDist++;
+
+ hashes[hashIx++] = hRunning;
+
+ invertBit(gb->actual, byteIx, bitIx);
+ //invertBit(gb->actual, byteIx, bitIx ^ 4);
+
+ if (0) printf(" %02d.%d %08x %d\n",
+ byteIx, bitIx, hRunning ^ hInit, dist);
+ }
+ }
+ hFinal = theFn( gb );
+ assert(hFinal == hInit);
+ assert(hashIx == nHashes);
+
+ if (nNoDist > 0)
+ printf("%4d measurements, %5.2f avg dist, %2d zeroes\n",
+ (Int)nHashes, (double)totDist / (double)nHashes, nNoDist);
+ else
+ printf("%4d measurements, %5.2f avg dist\n",
+ (Int)nHashes, (double)totDist / (double)nHashes);
+
+ if (nNoDist > 0)
+ toc_nblocks_with_zero++;
+
+ toc_sum_of_avgs += (double)totDist / (double)nHashes;
+
+ free(hashes);
+}
+
+//////////////////////////////////////////////////////////
+
+int main ( void )
+{
+ FILE* f = stdin;
+ apply_to_all(f, try_onebit_changes, NULL);
+ printf("\n%d blocks, %d with a zero, %5.2f avg avg\n\n",
+ toc_nblocks, toc_nblocks_with_zero, toc_sum_of_avgs / (double)toc_nblocks );
+ return 0;
+}
+
+//////////////////////////////////////////////////////////
diff --git a/main/VEX/useful/x87_to_vex_and_back.c b/main/VEX/useful/x87_to_vex_and_back.c
new file mode 100644
index 0000000..ed5de3d
--- /dev/null
+++ b/main/VEX/useful/x87_to_vex_and_back.c
@@ -0,0 +1,291 @@
+
+/* Testing framework, for developing code to copy vex's x87 simulation
+ state to and from a real x87 state image (the 108-byte thing).
+
+ Includes code from fp_80_64.c.
+*/
+
+#include "../pub/libvex_basictypes.h"
+#include "../pub/libvex_ir.h"
+#include "../priv/guest-x86/gdefs.h"
+#include <stdio.h>
+#include <assert.h>
+#include <stdlib.h>
+
+/* Get definitions of convert_f64le_to_f80le and
+ convert_f80le_to_f64le. */
+#define USED_AS_INCLUDE
+#include "fp_80_64.c"
+#undef USED_AS_INCLUDE
+
+
+////////////////////////////////////////////////////////////////
+
+/* Layout of the real x87 state. */
+
+typedef
+ struct {
+ UShort env[14];
+ UChar reg[80];
+ }
+ Fpu_State;
+
+/* Offsets, in 16-bit ints, into the FPU environment (env) area. */
+#define FP_ENV_CTRL 0
+#define FP_ENV_STAT 2
+#define FP_ENV_TAG 4
+#define FP_ENV_IP 6 /* and 7 */
+#define FP_ENV_CS 8
+#define FP_ENV_OPOFF 10 /* and 11 */
+#define FP_ENV_OPSEL 12
+#define FP_REG(ii) (10*(7-(ii)))
+
+
+/* Layout of vex's FP state is defined in ../priv/guest-x86/gdefs.h */
+
+static void x87_to_vex ( /*IN*/UChar* x87_state, /*OUT*/UChar* vex_state )
+{
+ Int r;
+ UInt tag;
+ Double* vexRegs = (Double*)(vex_state + OFFB_F0);
+ UChar* vexTags = (UChar*)(vex_state + OFFB_FTAG0);
+ Fpu_State* x87 = (Fpu_State*)x87_state;
+ UInt ftop = (x87->env[FP_ENV_STAT] >> 11) & 7;
+ UInt tagw = x87->env[FP_ENV_TAG];
+
+ /* Copy registers and tags */
+ for (r = 0; r < 8; r++) {
+ tag = (tagw >> (2*r)) & 3;
+ if (tag == 3) {
+ /* register is empty */
+ vexRegs[r] = 0.0;
+ vexTags[r] = 0;
+ } else {
+ /* register is non-empty */
+ convert_f80le_to_f64le( &x87->reg[FP_REG(r)], (UChar*)&vexRegs[r] );
+ vexTags[r] = 1;
+ }
+ }
+
+ /* stack pointer */
+ *(UInt*)(vex_state + OFFB_FTOP) = ftop;
+
+ /* TODO: Check the CW is 037F. Or at least, bottom 6 bits are 1
+ (all exceptions masked), and 11:10, which is rounding control,
+ is set to ..?
+ */
+}
+
+
+static void vex_to_x87 ( /*IN*/UChar* vex_state, /*OUT*/UChar* x87_state )
+{
+ Int i, r;
+ UInt tagw;
+ Double* vexRegs = (Double*)(vex_state + OFFB_F0);
+ UChar* vexTags = (UChar*)(vex_state + OFFB_FTAG0);
+ Fpu_State* x87 = (Fpu_State*)x87_state;
+ UInt ftop = *(UInt*)(vex_state + OFFB_FTOP);
+
+ for (i = 0; i < 14; i++)
+ x87->env[i] = 0;
+
+ x87->env[1] = x87->env[3] = x87->env[5] = x87->env[13] = 0xFFFF;
+ x87->env[FP_ENV_CTRL] = 0x037F;
+ x87->env[FP_ENV_STAT] = (ftop & 7) << 11;
+
+ tagw = 0;
+ for (r = 0; r < 8; r++) {
+ if (vexTags[r] == 0) {
+ /* register is empty */
+ tagw |= (3 << (2*r));
+ convert_f64le_to_f80le( (UChar*)&vexRegs[r], &x87->reg[FP_REG(r)] );
+ } else {
+ /* register is full. */
+ tagw |= (0 << (2*r));
+ convert_f64le_to_f80le( (UChar*)&vexRegs[r], &x87->reg[FP_REG(r)] );
+ }
+ }
+ x87->env[FP_ENV_TAG] = tagw;
+}
+
+////////////////////////////////////////////////////////////////
+
+// fwds ...
+static void printFpuState ( UChar* fpu_state );
+static void printVexState ( UChar* vex_state );
+
+
+/* Capture the FPU state. Convert it to vex. Convert it back
+ to x87. Print it at all stages.
+*/
+void capture_convert_show ( /* preallocated storage */
+ UChar* x87_state0,
+ UChar* x87_state1,
+ UChar* vex_state )
+{
+ asm volatile ("fsave (%0)"
+ :
+ : "r" (x87_state0)
+ : "memory" );
+ x87_to_vex(x87_state0, vex_state);
+ vex_to_x87(vex_state, x87_state1);
+ printf("\n\n=================================================\n\n");
+ printFpuState(x87_state0);
+ printf("\n\n");
+ printVexState(vex_state);
+ printf("\n\n");
+#if 0
+ asm volatile("frstor (%0) ; fsave (%0)"
+ :
+ : "r" (x87_state1)
+ : "memory" );
+#endif
+ printFpuState(x87_state1);
+ printf("\n\n");
+ x87_to_vex(x87_state1, vex_state);
+ printVexState(vex_state);
+ printf("\n\n");
+}
+
+int main ( void )
+{
+ UChar* x87_state0 = malloc(sizeof(Fpu_State));
+ UChar* x87_state1 = malloc(sizeof(Fpu_State));
+ UChar* vex_state = malloc(1000);
+ asm volatile ("finit");
+ capture_convert_show(x87_state0, x87_state1, vex_state);
+ asm volatile ("fldpi");
+ capture_convert_show(x87_state0, x87_state1, vex_state);
+ asm volatile ("fldz ; fld1 ; fdiv %st(1)");
+ asm volatile ("fldln2 ; fldlg2 ; fchs ; fsqrt");
+ capture_convert_show(x87_state0, x87_state1, vex_state);
+ return 1;
+}
+
+////////////////////////////////////////////////////////////////
+
+/* Bitfield offsets for exceptions in the FPU status and control words. */
+#define FP_E_INVAL 0
+#define FP_E_DENOR 1
+#define FP_E_DIVZ 2
+#define FP_E_OVERF 3
+#define FP_E_UNDER 4
+#define FP_E_LOS 5
+
+/* More bitfield offsets, but for the status word only. */
+#define FP_E_STACKF 6
+#define FP_E_SUMMARY 7
+#define FP_F_C0 8
+#define FP_F_C1 9
+#define FP_F_C2 10
+#define FP_F_C3 14
+/* top-of-stack ptr is bits 13,12,11 of the word */
+#define FP_F_TOS_LO 11
+#define FP_F_TOS_HI 13
+
+/* Register tags. */
+#define FP_TAG_VALID 0
+#define FP_TAG_ZERO 1
+#define FP_TAG_SPEC 2
+#define FP_TAG_EMPTY 3
+
+char* fp_tag_names[4]
+ = { "Valid", "Zero", "Spec", "Empty" };
+
+char* fp_exception_names[6]
+ = { "INVAL", "DENOR", "DIVZ", "OVERF", "UNDERF", "LOS" };
+
+
+UInt fp_get_tos ( Fpu_State* x87 )
+{
+ return (x87->env[FP_ENV_STAT] >> FP_F_TOS_LO) & 7;
+}
+
+UInt fp_get_tag ( Fpu_State* x87, UInt regno )
+{
+ assert(!(regno < 0 || regno > 7));
+ return (x87->env[FP_ENV_TAG] >> (2*regno)) & 3;
+}
+
+UInt fp_get_statusword_flag ( Fpu_State* x87, UInt flagno )
+{
+ assert(!(flagno < 0 || flagno > 15));
+ return (x87->env[FP_ENV_STAT] >> flagno) & 0x1;
+}
+
+UInt fp_get_controlword_flag ( Fpu_State* x87, UInt flagno )
+{
+ assert(!(flagno < 0 || flagno > 15));
+ return (x87->env[FP_ENV_CTRL] >> flagno) & 0x1;
+}
+
+
+static void printFpuState ( UChar* fpu_state )
+{
+ Fpu_State* x87 = (Fpu_State*)fpu_state;
+
+ Int i, j, k;
+ assert(sizeof(Fpu_State)==108);
+ for (i = 7; i >= 0; i--) {
+ printf ( " %s fpreg%d: 0x",
+ (UInt)i == fp_get_tos(x87) ? "**" : " ", i );
+ for (k = 0, j = FP_REG(i)+9; k < 10; k++,j--)
+ printf ( "%02x", (UInt)x87->reg[j]);
+ printf ( " %5s ", fp_tag_names[fp_get_tag(x87,i)] );
+ printf("\n");
+ //printf ( "%20.16e\n", fp_get_reg(i) );
+ }
+ printf(" fctrl: 0x%04x masked: ",
+ (UInt)x87->env[FP_ENV_CTRL] );
+ for (i = FP_E_INVAL; i <= FP_E_LOS; i++)
+ if (fp_get_controlword_flag(x87,i))
+ printf ( "%s ", fp_exception_names[i] );
+ printf ( "\n" );
+
+ printf(" fstat: 0x%04x except:",
+ (UInt)x87->env[FP_ENV_STAT] );
+ for (i = FP_E_INVAL; i <= FP_E_LOS; i++)
+ if (fp_get_statusword_flag(x87,i))
+ printf ( "%s ", fp_exception_names[i] );
+ printf ( " top: %d ", fp_get_tos(x87) );
+ printf ( "c3210: %d%d%d%d",
+ fp_get_statusword_flag(x87,FP_F_C3),
+ fp_get_statusword_flag(x87,FP_F_C2),
+ fp_get_statusword_flag(x87,FP_F_C1),
+ fp_get_statusword_flag(x87,FP_F_C0) );
+ printf ( " STACKF: %d\n", fp_get_statusword_flag(x87,FP_E_STACKF) );
+
+ printf(" ftag: 0x%04x ", (UInt)x87->env[FP_ENV_TAG] );
+ for (i = 7; i >= 0; i--)
+ printf ( "%d:%s ", i, fp_tag_names[fp_get_tag(x87,i)] );
+ printf("\n");
+
+ printf(" fip: 0x%08x\n",
+ (((UInt)x87->env[FP_ENV_IP+1]) << 16) |
+ ((UInt)x87->env[FP_ENV_IP]) );
+ printf(" fcs: 0x%04x\n",
+ ((UInt)x87->env[FP_ENV_CS]) );
+ printf(" fopoff: 0x%08x\n",
+ (((UInt)x87->env[FP_ENV_OPOFF+1]) << 16) |
+ ((UInt)x87->env[FP_ENV_OPOFF]) );
+ printf(" fopsel: 0x%04x\n",
+ ((UInt)x87->env[FP_ENV_OPSEL]) );
+}
+
+
+static void printVexState ( UChar* vex_state )
+{
+ Int r;
+ ULong* vexRegs = (ULong*)(vex_state + OFFB_F0);
+ UChar* vexTags = (UChar*)(vex_state + OFFB_FTAG0);
+ UInt ftop = *(UInt*)(vex_state + OFFB_FTOP);
+
+ for (r = 7; r >= 0; r--) {
+ printf("%s %%f%d: 0x%llx %s\n",
+ r == ftop ? "##" : " ",
+ r,
+ vexRegs[r],
+ vexTags[r] == 0 ? "Empty" : "Full" );
+ }
+
+}