Added beginnings of an AMD64 port, so lots of new files and directories.
It compiles, but aborts immediately if you try to run it.
I didn't include ldt.c; I'm not sure how the LDT is used on AMD64. It can be
added later if necessary.
While doing this, did some 64-bit cleanness fixes:
- Added necessary intermediate casts to ULong to avoid warnings when converting
ThreadId to void* and vice versa, in vg_scheduler.c.
- Fixed VALGRIND_NON_SIMD_CALL[0123] to use 'long' as the return type.
- Fixed VALGRIND_PRINTF{,BACKTRACE} to use unsigned longs instead of unsigned
ints, as needed.
- Converted some offsets in vg_symtab2.h from "Int" to "OffT".
- Made strlen, strncat, etc, use SizeT instead of 'unsigned int' for the length
parameter.
- Couple of other minor things.
I had to insert some "#ifdef __amd64__" and "#ifndef __amd64__" guards in
places. In particular, in vg_mylibc.c, some of our syscall wrappers aren't
appropriate for AMD64 because the syscall numbering is a bit different in
places. This difference will have to be abstracted out somehow.
Also rewrote the sys_fcntl and sys_fcntl64 wrappers, as required for AMD64.
Also moved the ipc wrapper into x86, since it's not applicable for
AMD64. However, it is applicable (I think) for ARM, so it would be nice
to work out a way to share syscall wrappers between some, but not all,
archs. Hmm. Also now using the real IPC constants rather than magic
numbers in the wrapper.
Other non-AMD64-related fixes:
- ARM: fixed syscall table by accounting for the fact that syscall
numbers don't start at 0, but rather at 0x900000.
- Converted a few places to use ThreadId instead of 'int' or 'Int' for
thread IDs.
- Added both AMD64 and ARM (which I'd forgotten) entries to valgrind.spec.in.
- Tweaked comments in various places.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@3136 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/include/valgrind.h.in b/include/valgrind.h.in
index 9718c0f..cf28de9 100644
--- a/include/valgrind.h.in
+++ b/include/valgrind.h.in
@@ -98,6 +98,50 @@
eg. x86/ subdirectories like we do within the rest of Valgrind.
*/
+#ifdef __arm__
+// XXX: termporary, until MAGIC_SEQUENCE is written properly
+extern int printf (__const char *__restrict __format, ...);
+extern void exit (int __status);
+#define VALGRIND_MAGIC_SEQUENCE( \
+ _zzq_rlval, _zzq_default, _zzq_request, \
+ _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4) \
+ \
+ { volatile unsigned int _zzq_args[5]; \
+ _zzq_args[0] = (volatile unsigned int)(_zzq_request); \
+ _zzq_args[1] = (volatile unsigned int)(_zzq_arg1); \
+ _zzq_args[2] = (volatile unsigned int)(_zzq_arg2); \
+ _zzq_args[3] = (volatile unsigned int)(_zzq_arg3); \
+ _zzq_args[4] = (volatile unsigned int)(_zzq_arg4); \
+ (_zzq_rlval) = (_zzq_default);/* temporary only */ \
+ printf("argh: MAGIC_SEQUENCE"); exit(1); \
+ asm volatile(""); \
+ }
+// XXX: make sure that the register holding the args and the register taking
+// the return value match ARCH_CLREQ_ARGS and ARCH_CLREQ_RET in
+// arm/core_arch.h!
+#endif // __arm__
+#ifdef __amd64__
+// XXX: termporary, until MAGIC_SEQUENCE is written properly
+extern int printf (__const char *__restrict __format, ...);
+extern void exit (int __status);
+#define VALGRIND_MAGIC_SEQUENCE( \
+ _zzq_rlval, _zzq_default, _zzq_request, \
+ _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4) \
+ \
+ { volatile unsigned long _zzq_args[5]; \
+ _zzq_args[0] = (volatile unsigned long)(_zzq_request); \
+ _zzq_args[1] = (volatile unsigned long)(_zzq_arg1); \
+ _zzq_args[2] = (volatile unsigned long)(_zzq_arg2); \
+ _zzq_args[3] = (volatile unsigned long)(_zzq_arg3); \
+ _zzq_args[4] = (volatile unsigned long)(_zzq_arg4); \
+ (_zzq_rlval) = (_zzq_default);/* temporary only */ \
+ printf("argh: MAGIC_SEQUENCE"); exit(1); \
+ asm volatile(""); \
+ }
+// XXX: make sure that the register holding the args and the register taking
+// the return value match ARCH_CLREQ_ARGS and ARCH_CLREQ_RET in
+// amd64/core_arch.h!
+#endif // __amd64__
#ifdef __x86__
#define VALGRIND_MAGIC_SEQUENCE( \
_zzq_rlval, _zzq_default, _zzq_request, \
@@ -121,29 +165,6 @@
); \
}
#endif // __x86__
-#ifdef __arm__
-// XXX: termporary, until MAGIC_SEQUENCE is written properly
-extern int printf (__const char *__restrict __format, ...);
-extern void exit (int __status);
-#define VALGRIND_MAGIC_SEQUENCE( \
- _zzq_rlval, _zzq_default, _zzq_request, \
- _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4) \
- \
- { volatile unsigned int _zzq_args[5]; \
- _zzq_args[0] = (volatile unsigned int)(_zzq_request); \
- _zzq_args[1] = (volatile unsigned int)(_zzq_arg1); \
- _zzq_args[2] = (volatile unsigned int)(_zzq_arg2); \
- _zzq_args[3] = (volatile unsigned int)(_zzq_arg3); \
- _zzq_args[4] = (volatile unsigned int)(_zzq_arg4); \
- (_zzq_rlval) = (_zzq_default);/* temporary only */ \
- printf("argh: MAGIC_SEQUENCE"); exit(1); \
- asm volatile(""); \
- }
-// XXX: make sure that the register holding the args and the register taking
-// the return value match ARCH_CLREQ_ARGS and ARCH_CLREQ_RET in
-// arm/core_arch.h!
-#endif // __arm__
-
// Insert assembly code for other architectures here...
#else /* NVALGRIND */
@@ -241,13 +262,13 @@
int
VALGRIND_PRINTF(const char *format, ...)
{
- unsigned int _qzz_res;
+ unsigned long _qzz_res;
va_list vargs;
va_start(vargs, format);
VALGRIND_MAGIC_SEQUENCE(_qzz_res, 0, VG_USERREQ__PRINTF,
- (unsigned int)format, (unsigned int)vargs, 0, 0);
+ (unsigned long)format, (unsigned long)vargs, 0, 0);
va_end(vargs);
- return _qzz_res;
+ return (int)_qzz_res;
}
int VALGRIND_PRINTF_BACKTRACE(const char *format, ...)
@@ -256,13 +277,13 @@
int
VALGRIND_PRINTF_BACKTRACE(const char *format, ...)
{
- unsigned int _qzz_res;
+ unsigned long _qzz_res;
va_list vargs;
va_start(vargs, format);
VALGRIND_MAGIC_SEQUENCE(_qzz_res, 0, VG_USERREQ__PRINTF_BACKTRACE,
- (unsigned int)format, (unsigned int)vargs, 0, 0);
+ (unsigned long)format, (unsigned long)vargs, 0, 0);
va_end(vargs);
- return _qzz_res;
+ return (int)_qzz_res;
}
#else /* NVALGRIND */
@@ -275,7 +296,7 @@
/* These requests allow control to move from the simulated CPU to the
real CPU, calling an arbitary function */
#define VALGRIND_NON_SIMD_CALL0(_qyy_fn) \
- ({unsigned int _qyy_res; \
+ ({unsigned long _qyy_res; \
VALGRIND_MAGIC_SEQUENCE(_qyy_res, 0 /* default return */, \
VG_USERREQ__CLIENT_CALL0, \
_qyy_fn, \
@@ -284,7 +305,7 @@
})
#define VALGRIND_NON_SIMD_CALL1(_qyy_fn, _qyy_arg1) \
- ({unsigned int _qyy_res; \
+ ({unsigned long _qyy_res; \
VALGRIND_MAGIC_SEQUENCE(_qyy_res, 0 /* default return */, \
VG_USERREQ__CLIENT_CALL1, \
_qyy_fn, \
@@ -293,7 +314,7 @@
})
#define VALGRIND_NON_SIMD_CALL2(_qyy_fn, _qyy_arg1, _qyy_arg2) \
- ({unsigned int _qyy_res; \
+ ({unsigned long _qyy_res; \
VALGRIND_MAGIC_SEQUENCE(_qyy_res, 0 /* default return */, \
VG_USERREQ__CLIENT_CALL2, \
_qyy_fn, \
@@ -302,7 +323,7 @@
})
#define VALGRIND_NON_SIMD_CALL3(_qyy_fn, _qyy_arg1, _qyy_arg2, _qyy_arg3) \
- ({unsigned int _qyy_res; \
+ ({unsigned long _qyy_res; \
VALGRIND_MAGIC_SEQUENCE(_qyy_res, 0 /* default return */, \
VG_USERREQ__CLIENT_CALL3, \
_qyy_fn, \