Rename VG_(have_altivec) => VG_(have_altivec_ppc) for consistency.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@4641 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/coregrind/m_dispatch/dispatch-ppc32.S b/coregrind/m_dispatch/dispatch-ppc32.S
index 5b50f89..5147a9d 100644
--- a/coregrind/m_dispatch/dispatch-ppc32.S
+++ b/coregrind/m_dispatch/dispatch-ppc32.S
@@ -92,8 +92,8 @@
/* set host AltiVec control word to the default mode expected
by VEX-generated code. */
- lis 3,VG_(have_altivec)@ha
- lwz 3,VG_(have_altivec)@l(3)
+ lis 3,VG_(have_altivec_ppc)@ha
+ lwz 3,VG_(have_altivec_ppc)@l(3)
cmplwi 3,0
beq L1
/* generate vector {0x0,0x0,0x0,0x00010000} */
diff --git a/coregrind/m_machine.c b/coregrind/m_machine.c
index 99a0434..79955ae 100644
--- a/coregrind/m_machine.c
+++ b/coregrind/m_machine.c
@@ -220,7 +220,7 @@
// not-yet-set.
Int VG_(cache_line_size_ppc32) = 0;
// Altivec enabled? Harvested on startup from the AT_HWCAP entry
-Int VG_(have_altivec) = 0;
+Int VG_(have_altivec_ppc) = 0;
#endif
// X86: set to 1 if the host is able to do {ld,st}mxcsr (load/store
diff --git a/coregrind/m_main.c b/coregrind/m_main.c
index b1c944e..71f4129 100644
--- a/coregrind/m_main.c
+++ b/coregrind/m_main.c
@@ -183,8 +183,8 @@
case AT_HWCAP:
VG_(debugLog)(1, "main", "PPC32 hwcaps: 0x%x\n", (UInt)auxv->u.a_val);
if ((auxv->u.a_val & 0x10000000) > 0)
- VG_(have_altivec) = 1;
- VG_(debugLog)(1, "main", "PPC32 AltiVec support: %u\n", VG_(have_altivec));
+ VG_(have_altivec_ppc) = 1;
+ VG_(debugLog)(1, "main", "PPC32 AltiVec support: %u\n", VG_(have_altivec_ppc));
break;
# endif
diff --git a/coregrind/m_translate.c b/coregrind/m_translate.c
index 0eb8142..9e7adfb 100644
--- a/coregrind/m_translate.c
+++ b/coregrind/m_translate.c
@@ -34,7 +34,7 @@
#include "pub_core_aspacemgr.h"
#include "pub_core_cpuid.h"
#include "pub_core_machine.h" // For VG_(cache_line_size_ppc32)
- // and VG_(have_altivec)
+ // and VG_(have_altivec_ppc)
// and VG_(get_SP)
// and VG_(have_mxcsr_x86)
#include "pub_core_libcbase.h"
@@ -113,8 +113,8 @@
#elif defined(VGA_ppc32)
*vex_arch = VexArchPPC32;
- vai->subarch = VG_(have_altivec) ? VexSubArchPPC32_AV
- : VexSubArchPPC32_noAV;
+ vai->subarch = VG_(have_altivec_ppc) ? VexSubArchPPC32_AV
+ : VexSubArchPPC32_noAV;
vai->ppc32_cache_line_szB = VG_(cache_line_size_ppc32);
return True;
diff --git a/coregrind/pub_core_machine.h b/coregrind/pub_core_machine.h
index 281d4bd..0e4d8e9 100644
--- a/coregrind/pub_core_machine.h
+++ b/coregrind/pub_core_machine.h
@@ -84,7 +84,7 @@
// entries.
extern Int VG_(cache_line_size_ppc32);
// Altivec enabled? Harvested on startup from the AT_HWCAP entry
-extern Int VG_(have_altivec);
+extern Int VG_(have_altivec_ppc);
#endif
// X86: set to 1 if the host is able to do {ld,st}mxcsr (load/store