Restructure the x86->IR phase somewhat, so that it can optionally
disassemble across basic block boundaries, when branch destinations
are known (calls to known locs, unconditional branches to known locs).
This can significantly improve performance for some programs.



git-svn-id: svn://svn.valgrind.org/vex/trunk@364 8f6e269a-dfd6-0310-a8e1-e2731360e62c
1 file changed