commit d3f9de7a4da4e76694e0e970b024d562ba903d51
author sewardj <sewardj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> Sat Jan 15 20:43:10 2005 +0000
committer sewardj <sewardj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> Sat Jan 15 20:43:10 2005 +0000
tree ff4245d23f2fe96d1aaa9a2ad563a0eb96de0e6a
parent 1806918ae2783af5808f00876581e01c7b650a0d

Instruction selection/emission for Add64 and Sub64.


git-svn-id: svn://svn.valgrind.org/vex/trunk@716 8f6e269a-dfd6-0310-a8e1-e2731360e62c

priv/host-x86/hdefs.c

diff --git a/priv/host-x86/hdefs.c b/priv/host-x86/hdefs.c
index c24b082..f08be77 100644
--- a/priv/host-x86/hdefs.c
+++ b/priv/host-x86/hdefs.c
@@ -1905,6 +1905,8 @@
       /* ADD/SUB/ADC/SBB/AND/OR/XOR/CMP */
       opc = opc_rr = subopc_imm = opc_imma = 0;
       switch (i->Xin.Alu32R.op) {
+         case Xalu_ADC: opc = 0x13; opc_rr = 0x11; 
+                        subopc_imm = 2; opc_imma = 0x15; break;
          case Xalu_ADD: opc = 0x03; opc_rr = 0x01; 
                         subopc_imm = 0; opc_imma = 0x05; break;
          case Xalu_SUB: opc = 0x2B; opc_rr = 0x29; 
@@ -1928,7 +1930,7 @@
                *p++ = opc_imma;
                p = emit32(p, i->Xin.Alu32R.src->Xrmi.Imm.imm32);
             } else
-               if (fits8bits(i->Xin.Alu32R.src->Xrmi.Imm.imm32)) {
+            if (fits8bits(i->Xin.Alu32R.src->Xrmi.Imm.imm32)) {
                *p++ = 0x83; 
                p    = doAMode_R(p, fake(subopc_imm), i->Xin.Alu32R.dst);
                *p++ = 0xFF & i->Xin.Alu32R.src->Xrmi.Imm.imm32;