| commit | e71e56a90e91ce37b0ee846a4ff94493d59f2095 | [log] [tgz] |
|---|---|---|
| author | sewardj <sewardj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> | Mon Sep 05 12:11:06 2011 +0000 |
| committer | sewardj <sewardj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> | Mon Sep 05 12:11:06 2011 +0000 |
| tree | 181f1b14a7d4bf01eadffd513ceb5575ec101878 | |
| parent | 87b48b69ee1bda198d6955264ecbc27708801e87 [diff] |
Add support for IBM Power ISA 2.06 -- stage 3. The purpose of this bug is to add support for the third and final subset of the new instructions in IBM Power ISA 2.06 (i.e., IBM POWER7 processor). (VEX changes. Bug 279994 comment 1). (Maynard Johnson, maynardj@us.ibm.com) git-svn-id: svn://svn.valgrind.org/vex/trunk@2199 8f6e269a-dfd6-0310-a8e1-e2731360e62c