Try and fill in jit_main.c.


git-svn-id: svn://svn.valgrind.org/vex/trunk@51 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/main/jit_main.c b/priv/main/jit_main.c
index 411f430..adfcce0 100644
--- a/priv/main/jit_main.c
+++ b/priv/main/jit_main.c
@@ -7,8 +7,11 @@
 /*---------------------------------------------------------------*/
 
 #include "libjit.h"
+
 #include "jit_globals.h"
 #include "vex_util.h"
+#include "host_regs.h"
+#include "x86h_defs.h"
 
 
 /* This file contains the top level interface to the library. */
@@ -67,13 +70,81 @@
    /* OUT: how much of the output area is used. */
    Int* host_bytes_used,
    /* IN: optionally, an instrumentation function. */
-   IRBB (*instrument) ( IRBB* ),
+   IRBB* (*instrument) ( IRBB* ),
    /* IN: optionally, an access check function for guest code. */
    Bool (*byte_accessible) ( Addr64 )
 )
 {
+   /* Stuff we need to know for reg-alloc. */
+   HReg* available_real_regs;
+   Int   n_available_real_regs;
+   Bool (*isMove) (HInstr*, HReg*, HReg*);
+   void (*getRegUsage) (HRegUsage*, HInstr*);
+   void (*mapRegs) (HRegRemap*, HInstr*);
+   HInstr* (*genSpill) ( HReg, Int );
+   HInstr* (*genReload) ( HReg, Int );
+   HInstrArray* (*iselBB) ( IRBB* );
+   IRBB* (*bbToIR) ( Char*, Addr64, Int*, Bool(*)(Addr64) );
+
+   IRBB*        irbb;
+   HInstrArray* vcode;
+   HInstrArray* rcode;
+
    vassert(vex_initdone);
    LibJIT_Clear(False);
+
+   /* First off, check that the guest and host insn sets
+      are supported. */
+   switch (iset_host) {
+      case InsnSetX86:
+         getAllocableRegs_X86 ( &n_available_real_regs,
+                                &available_real_regs );
+         isMove      = (Bool(*)(HInstr*,HReg*,HReg*)) isMove_X86Instr;
+         getRegUsage = (void(*)(HRegUsage*,HInstr*)) getRegUsage_X86Instr;
+         mapRegs     = (void(*)(HRegRemap*,HInstr*)) mapRegs_X86Instr;
+         genSpill    = (HInstr*(*)(HReg,Int)) genSpill_X86;
+         genReload   = (HInstr*(*)(HReg,Int)) genReload_X86;
+         iselBB      = iselBB_X86;
+         break;
+      default:
+         vpanic("LibJIT_Translate: unsupported target insn set");
+   }
+
+   switch (iset_guest) {
+      case InsnSetX86:
+         bbToIR = NULL; //bbToIR_X86Instr;
+         break;
+      default:
+         vpanic("LibJIT_Translate: unsupported guest insn set");
+   }
+
+   irbb = bbToIR ( guest_bytes, 
+		   guest_bytes_addr,
+		   guest_bytes_read,
+		   byte_accessible );
+
+   if (irbb == NULL) {
+      /* Access failure. */
+      LibJIT_Clear(False);
+      return TransAccessFail;
+   }
+
+   /* Get the thing instrumented. */
+   if (instrument)
+      irbb = (*instrument)(irbb);
+
+   /* Turn it into virtual-registerised code. */
+   vcode = iselBB ( irbb );
+
+   /* Register allocate. */
+   rcode = doRegisterAllocation ( vcode, available_real_regs,
+                  	       	  n_available_real_regs,
+			          isMove, getRegUsage, mapRegs, 
+			          genSpill, genReload );
+
+   /* Assemble, etc. */
+   LibJIT_Clear(True);
+
    return TransOK;
 }