Adjust the vbit tester to deal with shift operations that require
an immediate constant as the shift amount. This is needed for
powerpc Iop_ShlD64 etc. What it basically means that we do not
iterate over the bits in the 2nd operand because there are no
V-bits to set. An immediate constant is always completely defined.
Fixes bugzilla #305948.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12969 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/NEWS b/NEWS
index 831a060..acd5ad1 100644
--- a/NEWS
+++ b/NEWS
@@ -45,6 +45,7 @@
305690 m [381] DRD reporting invalid semaphore when sem_trywait returns
EAGAIN or sem_timedwait returns ETIMEDOUT
305926 m [381] Invalid alignment checks for some AVX instructions
+305948 [390] ppc64: code generation for ShlD64 / ShrD64 asserts
306054 [390] s390x: Condition code computation for convert-to-int/logical
306310 [390] 3.8.0 release tarball missing some files
n-i-bz m [381] shmat of a segment > 4Gb does not work