njn | c953984 | 2002-10-02 13:26:35 +0000 | [diff] [blame] | 1 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 2 | /*--------------------------------------------------------------------*/ |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 3 | /*--- An example Valgrind tool. lk_main.c ---*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 4 | /*--------------------------------------------------------------------*/ |
| 5 | |
| 6 | /* |
nethercote | 137bc55 | 2003-11-14 17:47:54 +0000 | [diff] [blame] | 7 | This file is part of Lackey, an example Valgrind tool that does |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 8 | some simple program measurement and tracing. |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 9 | |
sewardj | ec062e8 | 2011-10-23 07:32:08 +0000 | [diff] [blame] | 10 | Copyright (C) 2002-2011 Nicholas Nethercote |
njn | 2bc1012 | 2005-05-08 02:10:27 +0000 | [diff] [blame] | 11 | njn@valgrind.org |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 12 | |
| 13 | This program is free software; you can redistribute it and/or |
| 14 | modify it under the terms of the GNU General Public License as |
| 15 | published by the Free Software Foundation; either version 2 of the |
| 16 | License, or (at your option) any later version. |
| 17 | |
| 18 | This program is distributed in the hope that it will be useful, but |
| 19 | WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 21 | General Public License for more details. |
| 22 | |
| 23 | You should have received a copy of the GNU General Public License |
| 24 | along with this program; if not, write to the Free Software |
| 25 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
| 26 | 02111-1307, USA. |
| 27 | |
| 28 | The GNU General Public License is contained in the file COPYING. |
| 29 | */ |
| 30 | |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 31 | // This tool shows how to do some basic instrumentation. |
| 32 | // |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 33 | // There are four kinds of instrumentation it can do. They can be turned |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 34 | // on/off independently with command line options: |
| 35 | // |
| 36 | // * --basic-counts : do basic counts, eg. number of instructions |
| 37 | // executed, jumps executed, etc. |
| 38 | // * --detailed-counts: do more detailed counts: number of loads, stores |
| 39 | // and ALU operations of different sizes. |
| 40 | // * --trace-mem=yes: trace all (data) memory accesses. |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 41 | // * --trace-superblocks=yes: |
| 42 | // trace all superblock entries. Mostly of interest |
| 43 | // to the Valgrind developers. |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 44 | // |
| 45 | // The code for each kind of instrumentation is guarded by a clo_* variable: |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 46 | // clo_basic_counts, clo_detailed_counts, clo_trace_mem and clo_trace_sbs. |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 47 | // |
| 48 | // If you want to modify any of the instrumentation code, look for the code |
| 49 | // that is guarded by the relevant clo_* variable (eg. clo_trace_mem) |
| 50 | // If you're not interested in the other kinds of instrumentation you can |
| 51 | // remove them. If you want to do more complex modifications, please read |
| 52 | // VEX/pub/libvex_ir.h to understand the intermediate representation. |
| 53 | // |
| 54 | // |
| 55 | // Specific Details about --trace-mem=yes |
| 56 | // -------------------------------------- |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 57 | // Lackey's --trace-mem code is a good starting point for building Valgrind |
| 58 | // tools that act on memory loads and stores. It also could be used as is, |
| 59 | // with its output used as input to a post-mortem processing step. However, |
| 60 | // because memory traces can be very large, online analysis is generally |
| 61 | // better. |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 62 | // |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 63 | // It prints memory data access traces that look like this: |
| 64 | // |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 65 | // I 0023C790,2 # instruction read at 0x0023C790 of size 2 |
| 66 | // I 0023C792,5 |
| 67 | // S BE80199C,4 # data store at 0xBE80199C of size 4 |
| 68 | // I 0025242B,3 |
| 69 | // L BE801950,4 # data load at 0xBE801950 of size 4 |
| 70 | // I 0023D476,7 |
| 71 | // M 0025747C,1 # data modify at 0x0025747C of size 1 |
| 72 | // I 0023DC20,2 |
| 73 | // L 00254962,1 |
| 74 | // L BE801FB3,1 |
| 75 | // I 00252305,1 |
| 76 | // L 00254AEB,1 |
| 77 | // S 00257998,1 |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 78 | // |
| 79 | // Every instruction executed has an "instr" event representing it. |
| 80 | // Instructions that do memory accesses are followed by one or more "load", |
| 81 | // "store" or "modify" events. Some instructions do more than one load or |
| 82 | // store, as in the last two examples in the above trace. |
| 83 | // |
| 84 | // Here are some examples of x86 instructions that do different combinations |
| 85 | // of loads, stores, and modifies. |
| 86 | // |
| 87 | // Instruction Memory accesses Event sequence |
| 88 | // ----------- --------------- -------------- |
| 89 | // add %eax, %ebx No loads or stores instr |
| 90 | // |
| 91 | // movl (%eax), %ebx loads (%eax) instr, load |
| 92 | // |
| 93 | // movl %eax, (%ebx) stores (%ebx) instr, store |
| 94 | // |
| 95 | // incl (%ecx) modifies (%ecx) instr, modify |
| 96 | // |
| 97 | // cmpsb loads (%esi), loads(%edi) instr, load, load |
| 98 | // |
| 99 | // call*l (%edx) loads (%edx), stores -4(%esp) instr, load, store |
| 100 | // pushl (%edx) loads (%edx), stores -4(%esp) instr, load, store |
| 101 | // movsw loads (%esi), stores (%edi) instr, load, store |
| 102 | // |
| 103 | // Instructions using x86 "rep" prefixes are traced as if they are repeated |
| 104 | // N times. |
| 105 | // |
| 106 | // Lackey with --trace-mem gives good traces, but they are not perfect, for |
| 107 | // the following reasons: |
| 108 | // |
| 109 | // - It does not trace into the OS kernel, so system calls and other kernel |
| 110 | // operations (eg. some scheduling and signal handling code) are ignored. |
| 111 | // |
njn | e8d217d | 2006-10-18 23:46:26 +0000 | [diff] [blame] | 112 | // - It could model loads and stores done at the system call boundary using |
| 113 | // the pre_mem_read/post_mem_write events. For example, if you call |
| 114 | // fstat() you know that the passed in buffer has been written. But it |
| 115 | // currently does not do this. |
| 116 | // |
| 117 | // - Valgrind replaces some code (not much) with its own, notably parts of |
| 118 | // code for scheduling operations and signal handling. This code is not |
| 119 | // traced. |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 120 | // |
| 121 | // - There is no consideration of virtual-to-physical address mapping. |
| 122 | // This may not matter for many purposes. |
| 123 | // |
| 124 | // - Valgrind modifies the instruction stream in some very minor ways. For |
| 125 | // example, on x86 the bts, btc, btr instructions are incorrectly |
| 126 | // considered to always touch memory (this is a consequence of these |
| 127 | // instructions being very difficult to simulate). |
| 128 | // |
| 129 | // - Valgrind tools layout memory differently to normal programs, so the |
| 130 | // addresses you get will not be typical. Thus Lackey (and all Valgrind |
| 131 | // tools) is suitable for getting relative memory traces -- eg. if you |
| 132 | // want to analyse locality of memory accesses -- but is not good if |
| 133 | // absolute addresses are important. |
| 134 | // |
njn | 6fb923b | 2009-08-05 06:57:45 +0000 | [diff] [blame] | 135 | // Despite all these warnings, Lackey's results should be good enough for a |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 136 | // wide range of purposes. For example, Cachegrind shares all the above |
| 137 | // shortcomings and it is still useful. |
njn | 9dd7277 | 2006-03-11 06:48:20 +0000 | [diff] [blame] | 138 | // |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 139 | // For further inspiration, you should look at cachegrind/cg_main.c which |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 140 | // uses the same basic technique for tracing memory accesses, but also groups |
| 141 | // events together for processing into twos and threes so that fewer C calls |
| 142 | // are made and things run faster. |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 143 | // |
| 144 | // Specific Details about --trace-superblocks=yes |
| 145 | // ---------------------------------------------- |
| 146 | // Valgrind splits code up into single entry, multiple exit blocks |
| 147 | // known as superblocks. By itself, --trace-superblocks=yes just |
| 148 | // prints a message as each superblock is run: |
| 149 | // |
| 150 | // SB 04013170 |
| 151 | // SB 04013177 |
| 152 | // SB 04013173 |
| 153 | // SB 04013177 |
| 154 | // |
| 155 | // The hex number is the address of the first instruction in the |
| 156 | // superblock. You can see the relationship more obviously if you use |
| 157 | // --trace-superblocks=yes and --trace-mem=yes together. Then a "SB" |
| 158 | // message at address X is immediately followed by an "instr:" message |
| 159 | // for that address, as the first instruction in the block is |
| 160 | // executed, for example: |
| 161 | // |
| 162 | // SB 04014073 |
| 163 | // I 04014073,3 |
| 164 | // L 7FEFFF7F8,8 |
| 165 | // I 04014076,4 |
| 166 | // I 0401407A,3 |
| 167 | // I 0401407D,3 |
| 168 | // I 04014080,3 |
| 169 | // I 04014083,6 |
| 170 | |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 171 | |
njn | c7561b9 | 2005-06-19 01:24:32 +0000 | [diff] [blame] | 172 | #include "pub_tool_basics.h" |
njn | 43b9a8a | 2005-05-10 04:37:01 +0000 | [diff] [blame] | 173 | #include "pub_tool_tooliface.h" |
njn | f39e9a3 | 2005-06-12 02:43:17 +0000 | [diff] [blame] | 174 | #include "pub_tool_libcassert.h" |
njn | 36a20fa | 2005-06-03 03:08:39 +0000 | [diff] [blame] | 175 | #include "pub_tool_libcprint.h" |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 176 | #include "pub_tool_debuginfo.h" |
| 177 | #include "pub_tool_libcbase.h" |
| 178 | #include "pub_tool_options.h" |
sewardj | 5fed8c0 | 2005-12-23 12:56:11 +0000 | [diff] [blame] | 179 | #include "pub_tool_machine.h" // VG_(fnptr_to_fnentry) |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 180 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 181 | /*------------------------------------------------------------*/ |
| 182 | /*--- Command line options ---*/ |
| 183 | /*------------------------------------------------------------*/ |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 184 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 185 | /* Command line options controlling instrumentation kinds, as described at |
| 186 | * the top of this file. */ |
| 187 | static Bool clo_basic_counts = True; |
| 188 | static Bool clo_detailed_counts = False; |
| 189 | static Bool clo_trace_mem = False; |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 190 | static Bool clo_trace_sbs = False; |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 191 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 192 | /* The name of the function of which the number of calls (under |
| 193 | * --basic-counts=yes) is to be counted, with default. Override with command |
| 194 | * line option --fnname. */ |
njn | 6fb923b | 2009-08-05 06:57:45 +0000 | [diff] [blame] | 195 | static Char* clo_fnname = "main"; |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 196 | |
| 197 | static Bool lk_process_cmd_line_option(Char* arg) |
| 198 | { |
njn | 83df0b6 | 2009-02-25 01:01:05 +0000 | [diff] [blame] | 199 | if VG_STR_CLO(arg, "--fnname", clo_fnname) {} |
| 200 | else if VG_BOOL_CLO(arg, "--basic-counts", clo_basic_counts) {} |
| 201 | else if VG_BOOL_CLO(arg, "--detailed-counts", clo_detailed_counts) {} |
| 202 | else if VG_BOOL_CLO(arg, "--trace-mem", clo_trace_mem) {} |
| 203 | else if VG_BOOL_CLO(arg, "--trace-superblocks", clo_trace_sbs) {} |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 204 | else |
| 205 | return False; |
| 206 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 207 | tl_assert(clo_fnname); |
| 208 | tl_assert(clo_fnname[0]); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 209 | return True; |
| 210 | } |
| 211 | |
| 212 | static void lk_print_usage(void) |
| 213 | { |
| 214 | VG_(printf)( |
njn | 6fb923b | 2009-08-05 06:57:45 +0000 | [diff] [blame] | 215 | " --basic-counts=no|yes count instructions, jumps, etc. [yes]\n" |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 216 | " --detailed-counts=no|yes count loads, stores and alu ops [no]\n" |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 217 | " --trace-mem=no|yes trace all loads and stores [no]\n" |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 218 | " --trace-superblocks=no|yes trace all superblock entries [no]\n" |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 219 | " --fnname=<name> count calls to <name> (only used if\n" |
njn | 6fb923b | 2009-08-05 06:57:45 +0000 | [diff] [blame] | 220 | " --basic-count=yes) [main]\n" |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 221 | ); |
| 222 | } |
| 223 | |
| 224 | static void lk_print_debug_usage(void) |
| 225 | { |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 226 | VG_(printf)( |
| 227 | " (none)\n" |
| 228 | ); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 229 | } |
| 230 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 231 | /*------------------------------------------------------------*/ |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 232 | /*--- Stuff for --basic-counts ---*/ |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 233 | /*------------------------------------------------------------*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 234 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 235 | /* Nb: use ULongs because the numbers can get very big */ |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 236 | static ULong n_func_calls = 0; |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 237 | static ULong n_SBs_entered = 0; |
| 238 | static ULong n_SBs_completed = 0; |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 239 | static ULong n_IRStmts = 0; |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 240 | static ULong n_guest_instrs = 0; |
| 241 | static ULong n_Jccs = 0; |
| 242 | static ULong n_Jccs_untaken = 0; |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 243 | static ULong n_IJccs = 0; |
| 244 | static ULong n_IJccs_untaken = 0; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 245 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 246 | static void add_one_func_call(void) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 247 | { |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 248 | n_func_calls++; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 249 | } |
| 250 | |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 251 | static void add_one_SB_entered(void) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 252 | { |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 253 | n_SBs_entered++; |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 254 | } |
| 255 | |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 256 | static void add_one_SB_completed(void) |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 257 | { |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 258 | n_SBs_completed++; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 259 | } |
| 260 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 261 | static void add_one_IRStmt(void) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 262 | { |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 263 | n_IRStmts++; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 264 | } |
| 265 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 266 | static void add_one_guest_instr(void) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 267 | { |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 268 | n_guest_instrs++; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 269 | } |
| 270 | |
| 271 | static void add_one_Jcc(void) |
| 272 | { |
| 273 | n_Jccs++; |
| 274 | } |
| 275 | |
| 276 | static void add_one_Jcc_untaken(void) |
| 277 | { |
| 278 | n_Jccs_untaken++; |
| 279 | } |
| 280 | |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 281 | static void add_one_inverted_Jcc(void) |
| 282 | { |
| 283 | n_IJccs++; |
| 284 | } |
| 285 | |
| 286 | static void add_one_inverted_Jcc_untaken(void) |
| 287 | { |
| 288 | n_IJccs_untaken++; |
| 289 | } |
| 290 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 291 | /*------------------------------------------------------------*/ |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 292 | /*--- Stuff for --detailed-counts ---*/ |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 293 | /*------------------------------------------------------------*/ |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 294 | |
| 295 | /* --- Operations --- */ |
| 296 | |
| 297 | typedef enum { OpLoad=0, OpStore=1, OpAlu=2 } Op; |
| 298 | |
| 299 | #define N_OPS 3 |
| 300 | |
| 301 | |
| 302 | /* --- Types --- */ |
| 303 | |
sewardj | 574d9a8 | 2012-05-21 13:44:54 +0000 | [diff] [blame] | 304 | #define N_TYPES 11 |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 305 | |
| 306 | static Int type2index ( IRType ty ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 307 | { |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 308 | switch (ty) { |
| 309 | case Ity_I1: return 0; |
| 310 | case Ity_I8: return 1; |
| 311 | case Ity_I16: return 2; |
| 312 | case Ity_I32: return 3; |
| 313 | case Ity_I64: return 4; |
| 314 | case Ity_I128: return 5; |
| 315 | case Ity_F32: return 6; |
| 316 | case Ity_F64: return 7; |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 317 | case Ity_F128: return 8; |
| 318 | case Ity_V128: return 9; |
sewardj | 574d9a8 | 2012-05-21 13:44:54 +0000 | [diff] [blame] | 319 | case Ity_V256: return 10; |
njn | f36ae99 | 2007-11-22 23:33:20 +0000 | [diff] [blame] | 320 | default: tl_assert(0); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 321 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 322 | } |
| 323 | |
njn | ab9c37e | 2007-08-27 22:18:58 +0000 | [diff] [blame] | 324 | static HChar* nameOfTypeIndex ( Int i ) |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 325 | { |
njn | ab9c37e | 2007-08-27 22:18:58 +0000 | [diff] [blame] | 326 | switch (i) { |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 327 | case 0: return "I1"; break; |
| 328 | case 1: return "I8"; break; |
| 329 | case 2: return "I16"; break; |
| 330 | case 3: return "I32"; break; |
| 331 | case 4: return "I64"; break; |
| 332 | case 5: return "I128"; break; |
| 333 | case 6: return "F32"; break; |
| 334 | case 7: return "F64"; break; |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 335 | case 8: return "F128"; break; |
| 336 | case 9: return "V128"; break; |
sewardj | 574d9a8 | 2012-05-21 13:44:54 +0000 | [diff] [blame] | 337 | case 10: return "V256"; break; |
njn | f36ae99 | 2007-11-22 23:33:20 +0000 | [diff] [blame] | 338 | default: tl_assert(0); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 339 | } |
| 340 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 341 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 342 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 343 | /* --- Counts --- */ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 344 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 345 | static ULong detailCounts[N_OPS][N_TYPES]; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 346 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 347 | /* The helper that is called from the instrumented code. */ |
| 348 | static VG_REGPARM(1) |
| 349 | void increment_detail(ULong* detail) |
| 350 | { |
| 351 | (*detail)++; |
| 352 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 353 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 354 | /* A helper that adds the instrumentation for a detail. */ |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 355 | static void instrument_detail(IRSB* sb, Op op, IRType type) |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 356 | { |
| 357 | IRDirty* di; |
| 358 | IRExpr** argv; |
| 359 | const UInt typeIx = type2index(type); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 360 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 361 | tl_assert(op < N_OPS); |
| 362 | tl_assert(typeIx < N_TYPES); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 363 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 364 | argv = mkIRExprVec_1( mkIRExpr_HWord( (HWord)&detailCounts[op][typeIx] ) ); |
sewardj | 5fed8c0 | 2005-12-23 12:56:11 +0000 | [diff] [blame] | 365 | di = unsafeIRDirty_0_N( 1, "increment_detail", |
| 366 | VG_(fnptr_to_fnentry)( &increment_detail ), |
| 367 | argv); |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 368 | addStmtToIRSB( sb, IRStmt_Dirty(di) ); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 369 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 370 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 371 | /* Summarize and print the details. */ |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 372 | static void print_details ( void ) |
| 373 | { |
| 374 | Int typeIx; |
sewardj | b5dc2d6 | 2009-07-15 14:51:48 +0000 | [diff] [blame] | 375 | VG_(umsg)(" Type Loads Stores AluOps\n"); |
| 376 | VG_(umsg)(" -------------------------------------------\n"); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 377 | for (typeIx = 0; typeIx < N_TYPES; typeIx++) { |
sewardj | b5dc2d6 | 2009-07-15 14:51:48 +0000 | [diff] [blame] | 378 | VG_(umsg)(" %4s %'12llu %'12llu %'12llu\n", |
| 379 | nameOfTypeIndex( typeIx ), |
| 380 | detailCounts[OpLoad ][typeIx], |
| 381 | detailCounts[OpStore][typeIx], |
| 382 | detailCounts[OpAlu ][typeIx] |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 383 | ); |
| 384 | } |
| 385 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 386 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 387 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 388 | /*------------------------------------------------------------*/ |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 389 | /*--- Stuff for --trace-mem ---*/ |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 390 | /*------------------------------------------------------------*/ |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 391 | |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 392 | #define MAX_DSIZE 512 |
| 393 | |
| 394 | typedef |
| 395 | IRExpr |
| 396 | IRAtom; |
| 397 | |
| 398 | typedef |
| 399 | enum { Event_Ir, Event_Dr, Event_Dw, Event_Dm } |
| 400 | EventKind; |
| 401 | |
| 402 | typedef |
| 403 | struct { |
| 404 | EventKind ekind; |
| 405 | IRAtom* addr; |
| 406 | Int size; |
| 407 | } |
| 408 | Event; |
| 409 | |
| 410 | /* Up to this many unnotified events are allowed. Must be at least two, |
| 411 | so that reads and writes to the same address can be merged into a modify. |
| 412 | Beyond that, larger numbers just potentially induce more spilling due to |
| 413 | extending live ranges of address temporaries. */ |
| 414 | #define N_EVENTS 4 |
| 415 | |
| 416 | /* Maintain an ordered list of memory events which are outstanding, in |
| 417 | the sense that no IR has yet been generated to do the relevant |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 418 | helper calls. The SB is scanned top to bottom and memory events |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 419 | are added to the end of the list, merging with the most recent |
| 420 | notified event where possible (Dw immediately following Dr and |
| 421 | having the same size and EA can be merged). |
| 422 | |
| 423 | This merging is done so that for architectures which have |
| 424 | load-op-store instructions (x86, amd64), the instr is treated as if |
| 425 | it makes just one memory reference (a modify), rather than two (a |
| 426 | read followed by a write at the same address). |
| 427 | |
| 428 | At various points the list will need to be flushed, that is, IR |
| 429 | generated from it. That must happen before any possible exit from |
| 430 | the block (the end, or an IRStmt_Exit). Flushing also takes place |
| 431 | when there is no space to add a new event. |
| 432 | |
| 433 | If we require the simulation statistics to be up to date with |
| 434 | respect to possible memory exceptions, then the list would have to |
| 435 | be flushed before each memory reference. That's a pain so we don't |
| 436 | bother. |
| 437 | |
| 438 | Flushing the list consists of walking it start to end and emitting |
| 439 | instrumentation IR for each event, in the order in which they |
| 440 | appear. */ |
| 441 | |
| 442 | static Event events[N_EVENTS]; |
| 443 | static Int events_used = 0; |
| 444 | |
| 445 | |
| 446 | static VG_REGPARM(2) void trace_instr(Addr addr, SizeT size) |
| 447 | { |
njn | 8a7b41b | 2007-09-23 00:51:24 +0000 | [diff] [blame] | 448 | VG_(printf)("I %08lx,%lu\n", addr, size); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 449 | } |
| 450 | |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 451 | static VG_REGPARM(2) void trace_load(Addr addr, SizeT size) |
| 452 | { |
njn | 8a7b41b | 2007-09-23 00:51:24 +0000 | [diff] [blame] | 453 | VG_(printf)(" L %08lx,%lu\n", addr, size); |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 454 | } |
| 455 | |
| 456 | static VG_REGPARM(2) void trace_store(Addr addr, SizeT size) |
| 457 | { |
njn | 8a7b41b | 2007-09-23 00:51:24 +0000 | [diff] [blame] | 458 | VG_(printf)(" S %08lx,%lu\n", addr, size); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 459 | } |
| 460 | |
| 461 | static VG_REGPARM(2) void trace_modify(Addr addr, SizeT size) |
| 462 | { |
njn | 8a7b41b | 2007-09-23 00:51:24 +0000 | [diff] [blame] | 463 | VG_(printf)(" M %08lx,%lu\n", addr, size); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 464 | } |
| 465 | |
| 466 | |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 467 | static void flushEvents(IRSB* sb) |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 468 | { |
| 469 | Int i; |
| 470 | Char* helperName; |
| 471 | void* helperAddr; |
| 472 | IRExpr** argv; |
| 473 | IRDirty* di; |
| 474 | Event* ev; |
| 475 | |
| 476 | for (i = 0; i < events_used; i++) { |
| 477 | |
| 478 | ev = &events[i]; |
| 479 | |
| 480 | // Decide on helper fn to call and args to pass it. |
| 481 | switch (ev->ekind) { |
| 482 | case Event_Ir: helperName = "trace_instr"; |
| 483 | helperAddr = trace_instr; break; |
| 484 | |
| 485 | case Event_Dr: helperName = "trace_load"; |
| 486 | helperAddr = trace_load; break; |
| 487 | |
| 488 | case Event_Dw: helperName = "trace_store"; |
| 489 | helperAddr = trace_store; break; |
| 490 | |
| 491 | case Event_Dm: helperName = "trace_modify"; |
| 492 | helperAddr = trace_modify; break; |
| 493 | default: |
| 494 | tl_assert(0); |
| 495 | } |
| 496 | |
| 497 | // Add the helper. |
| 498 | argv = mkIRExprVec_2( ev->addr, mkIRExpr_HWord( ev->size ) ); |
| 499 | di = unsafeIRDirty_0_N( /*regparms*/2, |
| 500 | helperName, VG_(fnptr_to_fnentry)( helperAddr ), |
| 501 | argv ); |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 502 | addStmtToIRSB( sb, IRStmt_Dirty(di) ); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 503 | } |
| 504 | |
| 505 | events_used = 0; |
| 506 | } |
| 507 | |
| 508 | // WARNING: If you aren't interested in instruction reads, you can omit the |
| 509 | // code that adds calls to trace_instr() in flushEvents(). However, you |
| 510 | // must still call this function, addEvent_Ir() -- it is necessary to add |
| 511 | // the Ir events to the events list so that merging of paired load/store |
| 512 | // events into modify events works correctly. |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 513 | static void addEvent_Ir ( IRSB* sb, IRAtom* iaddr, UInt isize ) |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 514 | { |
| 515 | Event* evt; |
njn | dbb9c8e | 2007-02-12 11:28:38 +0000 | [diff] [blame] | 516 | tl_assert(clo_trace_mem); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 517 | tl_assert( (VG_MIN_INSTR_SZB <= isize && isize <= VG_MAX_INSTR_SZB) |
| 518 | || VG_CLREQ_SZB == isize ); |
| 519 | if (events_used == N_EVENTS) |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 520 | flushEvents(sb); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 521 | tl_assert(events_used >= 0 && events_used < N_EVENTS); |
| 522 | evt = &events[events_used]; |
| 523 | evt->ekind = Event_Ir; |
| 524 | evt->addr = iaddr; |
| 525 | evt->size = isize; |
| 526 | events_used++; |
| 527 | } |
| 528 | |
| 529 | static |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 530 | void addEvent_Dr ( IRSB* sb, IRAtom* daddr, Int dsize ) |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 531 | { |
| 532 | Event* evt; |
njn | dbb9c8e | 2007-02-12 11:28:38 +0000 | [diff] [blame] | 533 | tl_assert(clo_trace_mem); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 534 | tl_assert(isIRAtom(daddr)); |
| 535 | tl_assert(dsize >= 1 && dsize <= MAX_DSIZE); |
| 536 | if (events_used == N_EVENTS) |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 537 | flushEvents(sb); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 538 | tl_assert(events_used >= 0 && events_used < N_EVENTS); |
| 539 | evt = &events[events_used]; |
| 540 | evt->ekind = Event_Dr; |
| 541 | evt->addr = daddr; |
| 542 | evt->size = dsize; |
| 543 | events_used++; |
| 544 | } |
| 545 | |
| 546 | static |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 547 | void addEvent_Dw ( IRSB* sb, IRAtom* daddr, Int dsize ) |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 548 | { |
| 549 | Event* lastEvt; |
| 550 | Event* evt; |
njn | dbb9c8e | 2007-02-12 11:28:38 +0000 | [diff] [blame] | 551 | tl_assert(clo_trace_mem); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 552 | tl_assert(isIRAtom(daddr)); |
| 553 | tl_assert(dsize >= 1 && dsize <= MAX_DSIZE); |
| 554 | |
| 555 | // Is it possible to merge this write with the preceding read? |
| 556 | lastEvt = &events[events_used-1]; |
| 557 | if (events_used > 0 |
| 558 | && lastEvt->ekind == Event_Dr |
| 559 | && lastEvt->size == dsize |
| 560 | && eqIRAtom(lastEvt->addr, daddr)) |
| 561 | { |
| 562 | lastEvt->ekind = Event_Dm; |
| 563 | return; |
| 564 | } |
| 565 | |
| 566 | // No. Add as normal. |
| 567 | if (events_used == N_EVENTS) |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 568 | flushEvents(sb); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 569 | tl_assert(events_used >= 0 && events_used < N_EVENTS); |
| 570 | evt = &events[events_used]; |
| 571 | evt->ekind = Event_Dw; |
| 572 | evt->size = dsize; |
| 573 | evt->addr = daddr; |
| 574 | events_used++; |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 575 | } |
| 576 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 577 | |
| 578 | /*------------------------------------------------------------*/ |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 579 | /*--- Stuff for --trace-superblocks ---*/ |
| 580 | /*------------------------------------------------------------*/ |
| 581 | |
| 582 | static void trace_superblock(Addr addr) |
| 583 | { |
| 584 | VG_(printf)("SB %08lx\n", addr); |
| 585 | } |
| 586 | |
| 587 | |
| 588 | /*------------------------------------------------------------*/ |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 589 | /*--- Basic tool functions ---*/ |
| 590 | /*------------------------------------------------------------*/ |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 591 | |
| 592 | static void lk_post_clo_init(void) |
| 593 | { |
| 594 | Int op, tyIx; |
| 595 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 596 | if (clo_detailed_counts) { |
| 597 | for (op = 0; op < N_OPS; op++) |
| 598 | for (tyIx = 0; tyIx < N_TYPES; tyIx++) |
| 599 | detailCounts[op][tyIx] = 0; |
| 600 | } |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 601 | } |
| 602 | |
sewardj | 4ba057c | 2005-10-18 12:04:18 +0000 | [diff] [blame] | 603 | static |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 604 | IRSB* lk_instrument ( VgCallbackClosure* closure, |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 605 | IRSB* sbIn, |
sewardj | 461df9c | 2006-01-17 02:06:39 +0000 | [diff] [blame] | 606 | VexGuestLayout* layout, |
| 607 | VexGuestExtents* vge, |
| 608 | IRType gWordTy, IRType hWordTy ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 609 | { |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 610 | IRDirty* di; |
| 611 | Int i; |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 612 | IRSB* sbOut; |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 613 | Char fnname[100]; |
| 614 | IRType type; |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 615 | IRTypeEnv* tyenv = sbIn->tyenv; |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 616 | Addr iaddr = 0, dst; |
| 617 | UInt ilen = 0; |
| 618 | Bool condition_inverted = False; |
sewardj | d54babf | 2005-03-21 00:55:49 +0000 | [diff] [blame] | 619 | |
| 620 | if (gWordTy != hWordTy) { |
| 621 | /* We don't currently support this case. */ |
| 622 | VG_(tool_panic)("host/guest word size mismatch"); |
| 623 | } |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 624 | |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 625 | /* Set up SB */ |
| 626 | sbOut = deepCopyIRSBExceptStmts(sbIn); |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 627 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 628 | // Copy verbatim any IR preamble preceding the first IMark |
| 629 | i = 0; |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 630 | while (i < sbIn->stmts_used && sbIn->stmts[i]->tag != Ist_IMark) { |
| 631 | addStmtToIRSB( sbOut, sbIn->stmts[i] ); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 632 | i++; |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 633 | } |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 634 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 635 | if (clo_basic_counts) { |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 636 | /* Count this superblock. */ |
| 637 | di = unsafeIRDirty_0_N( 0, "add_one_SB_entered", |
| 638 | VG_(fnptr_to_fnentry)( &add_one_SB_entered ), |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 639 | mkIRExprVec_0() ); |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 640 | addStmtToIRSB( sbOut, IRStmt_Dirty(di) ); |
| 641 | } |
| 642 | |
| 643 | if (clo_trace_sbs) { |
| 644 | /* Print this superblock's address. */ |
| 645 | di = unsafeIRDirty_0_N( |
| 646 | 0, "trace_superblock", |
| 647 | VG_(fnptr_to_fnentry)( &trace_superblock ), |
| 648 | mkIRExprVec_1( mkIRExpr_HWord( vge->base[0] ) ) |
| 649 | ); |
| 650 | addStmtToIRSB( sbOut, IRStmt_Dirty(di) ); |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 651 | } |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 652 | |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 653 | if (clo_trace_mem) { |
| 654 | events_used = 0; |
| 655 | } |
| 656 | |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 657 | for (/*use current i*/; i < sbIn->stmts_used; i++) { |
| 658 | IRStmt* st = sbIn->stmts[i]; |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 659 | if (!st || st->tag == Ist_NoOp) continue; |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 660 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 661 | if (clo_basic_counts) { |
| 662 | /* Count one VEX statement. */ |
| 663 | di = unsafeIRDirty_0_N( 0, "add_one_IRStmt", |
| 664 | VG_(fnptr_to_fnentry)( &add_one_IRStmt ), |
| 665 | mkIRExprVec_0() ); |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 666 | addStmtToIRSB( sbOut, IRStmt_Dirty(di) ); |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 667 | } |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 668 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 669 | switch (st->tag) { |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 670 | case Ist_NoOp: |
| 671 | case Ist_AbiHint: |
| 672 | case Ist_Put: |
| 673 | case Ist_PutI: |
sewardj | 72d7513 | 2007-11-09 23:06:35 +0000 | [diff] [blame] | 674 | case Ist_MBE: |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 675 | addStmtToIRSB( sbOut, st ); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 676 | break; |
| 677 | |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 678 | case Ist_IMark: |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 679 | if (clo_basic_counts) { |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 680 | /* Needed to be able to check for inverted condition in Ist_Exit */ |
| 681 | iaddr = st->Ist.IMark.addr; |
| 682 | ilen = st->Ist.IMark.len; |
| 683 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 684 | /* Count guest instruction. */ |
| 685 | di = unsafeIRDirty_0_N( 0, "add_one_guest_instr", |
| 686 | VG_(fnptr_to_fnentry)( &add_one_guest_instr ), |
| 687 | mkIRExprVec_0() ); |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 688 | addStmtToIRSB( sbOut, IRStmt_Dirty(di) ); |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 689 | |
| 690 | /* An unconditional branch to a known destination in the |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 691 | * guest's instructions can be represented, in the IRSB to |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 692 | * instrument, by the VEX statements that are the |
| 693 | * translation of that known destination. This feature is |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 694 | * called 'SB chasing' and can be influenced by command |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 695 | * line option --vex-guest-chase-thresh. |
| 696 | * |
| 697 | * To get an accurate count of the calls to a specific |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 698 | * function, taking SB chasing into account, we need to |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 699 | * check for each guest instruction (Ist_IMark) if it is |
| 700 | * the entry point of a function. |
| 701 | */ |
| 702 | tl_assert(clo_fnname); |
| 703 | tl_assert(clo_fnname[0]); |
| 704 | if (VG_(get_fnname_if_entry)(st->Ist.IMark.addr, |
| 705 | fnname, sizeof(fnname)) |
| 706 | && 0 == VG_(strcmp)(fnname, clo_fnname)) { |
| 707 | di = unsafeIRDirty_0_N( |
| 708 | 0, "add_one_func_call", |
| 709 | VG_(fnptr_to_fnentry)( &add_one_func_call ), |
| 710 | mkIRExprVec_0() ); |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 711 | addStmtToIRSB( sbOut, IRStmt_Dirty(di) ); |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 712 | } |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 713 | } |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 714 | if (clo_trace_mem) { |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 715 | // WARNING: do not remove this function call, even if you |
| 716 | // aren't interested in instruction reads. See the comment |
| 717 | // above the function itself for more detail. |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 718 | addEvent_Ir( sbOut, mkIRExpr_HWord( (HWord)st->Ist.IMark.addr ), |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 719 | st->Ist.IMark.len ); |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 720 | } |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 721 | addStmtToIRSB( sbOut, st ); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 722 | break; |
| 723 | |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 724 | case Ist_WrTmp: |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 725 | // Add a call to trace_load() if --trace-mem=yes. |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 726 | if (clo_trace_mem) { |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 727 | IRExpr* data = st->Ist.WrTmp.data; |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 728 | if (data->tag == Iex_Load) { |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 729 | addEvent_Dr( sbOut, data->Iex.Load.addr, |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 730 | sizeofIRType(data->Iex.Load.ty) ); |
njn | fd73ebb | 2005-12-30 22:39:58 +0000 | [diff] [blame] | 731 | } |
| 732 | } |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 733 | if (clo_detailed_counts) { |
sewardj | 0b9d74a | 2006-12-24 02:24:11 +0000 | [diff] [blame] | 734 | IRExpr* expr = st->Ist.WrTmp.data; |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 735 | type = typeOfIRExpr(sbOut->tyenv, expr); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 736 | tl_assert(type != Ity_INVALID); |
| 737 | switch (expr->tag) { |
| 738 | case Iex_Load: |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 739 | instrument_detail( sbOut, OpLoad, type ); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 740 | break; |
| 741 | case Iex_Unop: |
| 742 | case Iex_Binop: |
sewardj | e91cea7 | 2006-02-08 19:32:02 +0000 | [diff] [blame] | 743 | case Iex_Triop: |
| 744 | case Iex_Qop: |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 745 | case Iex_Mux0X: |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 746 | instrument_detail( sbOut, OpAlu, type ); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 747 | break; |
| 748 | default: |
| 749 | break; |
| 750 | } |
| 751 | } |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 752 | addStmtToIRSB( sbOut, st ); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 753 | break; |
| 754 | |
| 755 | case Ist_Store: |
| 756 | if (clo_trace_mem) { |
| 757 | IRExpr* data = st->Ist.Store.data; |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 758 | addEvent_Dw( sbOut, st->Ist.Store.addr, |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 759 | sizeofIRType(typeOfIRExpr(tyenv, data)) ); |
| 760 | } |
| 761 | if (clo_detailed_counts) { |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 762 | type = typeOfIRExpr(sbOut->tyenv, st->Ist.Store.data); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 763 | tl_assert(type != Ity_INVALID); |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 764 | instrument_detail( sbOut, OpStore, type ); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 765 | } |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 766 | addStmtToIRSB( sbOut, st ); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 767 | break; |
| 768 | |
| 769 | case Ist_Dirty: { |
njn | dbb9c8e | 2007-02-12 11:28:38 +0000 | [diff] [blame] | 770 | if (clo_trace_mem) { |
| 771 | Int dsize; |
| 772 | IRDirty* d = st->Ist.Dirty.details; |
| 773 | if (d->mFx != Ifx_None) { |
| 774 | // This dirty helper accesses memory. Collect the details. |
| 775 | tl_assert(d->mAddr != NULL); |
| 776 | tl_assert(d->mSize != 0); |
| 777 | dsize = d->mSize; |
| 778 | if (d->mFx == Ifx_Read || d->mFx == Ifx_Modify) |
| 779 | addEvent_Dr( sbOut, d->mAddr, dsize ); |
| 780 | if (d->mFx == Ifx_Write || d->mFx == Ifx_Modify) |
| 781 | addEvent_Dw( sbOut, d->mAddr, dsize ); |
| 782 | } else { |
| 783 | tl_assert(d->mAddr == NULL); |
| 784 | tl_assert(d->mSize == 0); |
| 785 | } |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 786 | } |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 787 | addStmtToIRSB( sbOut, st ); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 788 | break; |
| 789 | } |
| 790 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 791 | case Ist_CAS: { |
| 792 | /* We treat it as a read and a write of the location. I |
| 793 | think that is the same behaviour as it was before IRCAS |
| 794 | was introduced, since prior to that point, the Vex |
| 795 | front ends would translate a lock-prefixed instruction |
| 796 | into a (normal) read followed by a (normal) write. */ |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 797 | Int dataSize; |
| 798 | IRType dataTy; |
| 799 | IRCAS* cas = st->Ist.CAS.details; |
| 800 | tl_assert(cas->addr != NULL); |
| 801 | tl_assert(cas->dataLo != NULL); |
| 802 | dataTy = typeOfIRExpr(tyenv, cas->dataLo); |
| 803 | dataSize = sizeofIRType(dataTy); |
| 804 | if (cas->dataHi != NULL) |
| 805 | dataSize *= 2; /* since it's a doubleword-CAS */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 806 | if (clo_trace_mem) { |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 807 | addEvent_Dr( sbOut, cas->addr, dataSize ); |
| 808 | addEvent_Dw( sbOut, cas->addr, dataSize ); |
| 809 | } |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 810 | if (clo_detailed_counts) { |
| 811 | instrument_detail( sbOut, OpLoad, dataTy ); |
| 812 | if (cas->dataHi != NULL) /* dcas */ |
| 813 | instrument_detail( sbOut, OpLoad, dataTy ); |
| 814 | instrument_detail( sbOut, OpStore, dataTy ); |
| 815 | if (cas->dataHi != NULL) /* dcas */ |
| 816 | instrument_detail( sbOut, OpStore, dataTy ); |
| 817 | } |
| 818 | addStmtToIRSB( sbOut, st ); |
| 819 | break; |
| 820 | } |
| 821 | |
| 822 | case Ist_LLSC: { |
| 823 | IRType dataTy; |
| 824 | if (st->Ist.LLSC.storedata == NULL) { |
| 825 | /* LL */ |
| 826 | dataTy = typeOfIRTemp(tyenv, st->Ist.LLSC.result); |
| 827 | if (clo_trace_mem) |
| 828 | addEvent_Dr( sbOut, st->Ist.LLSC.addr, |
| 829 | sizeofIRType(dataTy) ); |
| 830 | if (clo_detailed_counts) |
| 831 | instrument_detail( sbOut, OpLoad, dataTy ); |
| 832 | } else { |
| 833 | /* SC */ |
| 834 | dataTy = typeOfIRExpr(tyenv, st->Ist.LLSC.storedata); |
| 835 | if (clo_trace_mem) |
| 836 | addEvent_Dw( sbOut, st->Ist.LLSC.addr, |
| 837 | sizeofIRType(dataTy) ); |
| 838 | if (clo_detailed_counts) |
| 839 | instrument_detail( sbOut, OpStore, dataTy ); |
| 840 | } |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 841 | addStmtToIRSB( sbOut, st ); |
| 842 | break; |
| 843 | } |
| 844 | |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 845 | case Ist_Exit: |
| 846 | if (clo_basic_counts) { |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 847 | // The condition of a branch was inverted by VEX if a taken |
| 848 | // branch is in fact a fall trough according to client address |
| 849 | tl_assert(iaddr != 0); |
| 850 | dst = (sizeof(Addr) == 4) ? st->Ist.Exit.dst->Ico.U32 : |
| 851 | st->Ist.Exit.dst->Ico.U64; |
| 852 | condition_inverted = (dst == iaddr + ilen); |
| 853 | |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 854 | /* Count Jcc */ |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 855 | if (!condition_inverted) |
| 856 | di = unsafeIRDirty_0_N( 0, "add_one_Jcc", |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 857 | VG_(fnptr_to_fnentry)( &add_one_Jcc ), |
| 858 | mkIRExprVec_0() ); |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 859 | else |
| 860 | di = unsafeIRDirty_0_N( 0, "add_one_inverted_Jcc", |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 861 | VG_(fnptr_to_fnentry)( |
| 862 | &add_one_inverted_Jcc ), |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 863 | mkIRExprVec_0() ); |
| 864 | |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 865 | addStmtToIRSB( sbOut, IRStmt_Dirty(di) ); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 866 | } |
| 867 | if (clo_trace_mem) { |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 868 | flushEvents(sbOut); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 869 | } |
| 870 | |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 871 | addStmtToIRSB( sbOut, st ); // Original statement |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 872 | |
| 873 | if (clo_basic_counts) { |
| 874 | /* Count non-taken Jcc */ |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 875 | if (!condition_inverted) |
| 876 | di = unsafeIRDirty_0_N( 0, "add_one_Jcc_untaken", |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 877 | VG_(fnptr_to_fnentry)( |
| 878 | &add_one_Jcc_untaken ), |
| 879 | mkIRExprVec_0() ); |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 880 | else |
| 881 | di = unsafeIRDirty_0_N( 0, "add_one_inverted_Jcc_untaken", |
| 882 | VG_(fnptr_to_fnentry)( |
| 883 | &add_one_inverted_Jcc_untaken ), |
| 884 | mkIRExprVec_0() ); |
| 885 | |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 886 | addStmtToIRSB( sbOut, IRStmt_Dirty(di) ); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 887 | } |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 888 | break; |
| 889 | |
| 890 | default: |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 891 | tl_assert(0); |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 892 | } |
| 893 | } |
| 894 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 895 | if (clo_basic_counts) { |
| 896 | /* Count this basic block. */ |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 897 | di = unsafeIRDirty_0_N( 0, "add_one_SB_completed", |
| 898 | VG_(fnptr_to_fnentry)( &add_one_SB_completed ), |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 899 | mkIRExprVec_0() ); |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 900 | addStmtToIRSB( sbOut, IRStmt_Dirty(di) ); |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 901 | } |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 902 | |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 903 | if (clo_trace_mem) { |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 904 | /* At the end of the sbIn. Flush outstandings. */ |
| 905 | flushEvents(sbOut); |
njn | eaf0ca9 | 2006-04-09 01:23:29 +0000 | [diff] [blame] | 906 | } |
| 907 | |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 908 | return sbOut; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 909 | } |
| 910 | |
njn | 51d827b | 2005-05-09 01:02:08 +0000 | [diff] [blame] | 911 | static void lk_fini(Int exitcode) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 912 | { |
sewardj | 8a5c06b | 2011-09-30 07:11:13 +0000 | [diff] [blame] | 913 | char percentify_buf[5]; /* Two digits, '%' and 0. */ |
| 914 | const int percentify_size = sizeof(percentify_buf) - 1; |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 915 | const int percentify_decs = 0; |
| 916 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 917 | tl_assert(clo_fnname); |
| 918 | tl_assert(clo_fnname[0]); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 919 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 920 | if (clo_basic_counts) { |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 921 | ULong total_Jccs = n_Jccs + n_IJccs; |
| 922 | ULong taken_Jccs = (n_Jccs - n_Jccs_untaken) + n_IJccs_untaken; |
| 923 | |
njn | 6fb923b | 2009-08-05 06:57:45 +0000 | [diff] [blame] | 924 | VG_(umsg)("Counted %'llu call%s to %s()\n", |
| 925 | n_func_calls, ( n_func_calls==1 ? "" : "s" ), clo_fnname); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 926 | |
sewardj | b5dc2d6 | 2009-07-15 14:51:48 +0000 | [diff] [blame] | 927 | VG_(umsg)("\n"); |
| 928 | VG_(umsg)("Jccs:\n"); |
| 929 | VG_(umsg)(" total: %'llu\n", total_Jccs); |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 930 | VG_(percentify)(taken_Jccs, (total_Jccs ? total_Jccs : 1), |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 931 | percentify_decs, percentify_size, percentify_buf); |
sewardj | b5dc2d6 | 2009-07-15 14:51:48 +0000 | [diff] [blame] | 932 | VG_(umsg)(" taken: %'llu (%s)\n", |
weidendo | ba5b3b2 | 2007-02-16 11:13:53 +0000 | [diff] [blame] | 933 | taken_Jccs, percentify_buf); |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 934 | |
sewardj | b5dc2d6 | 2009-07-15 14:51:48 +0000 | [diff] [blame] | 935 | VG_(umsg)("\n"); |
| 936 | VG_(umsg)("Executed:\n"); |
| 937 | VG_(umsg)(" SBs entered: %'llu\n", n_SBs_entered); |
| 938 | VG_(umsg)(" SBs completed: %'llu\n", n_SBs_completed); |
| 939 | VG_(umsg)(" guest instrs: %'llu\n", n_guest_instrs); |
| 940 | VG_(umsg)(" IRStmts: %'llu\n", n_IRStmts); |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 941 | |
sewardj | b5dc2d6 | 2009-07-15 14:51:48 +0000 | [diff] [blame] | 942 | VG_(umsg)("\n"); |
| 943 | VG_(umsg)("Ratios:\n"); |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 944 | tl_assert(n_SBs_entered); // Paranoia time. |
sewardj | b5dc2d6 | 2009-07-15 14:51:48 +0000 | [diff] [blame] | 945 | VG_(umsg)(" guest instrs : SB entered = %'llu : 10\n", |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 946 | 10 * n_guest_instrs / n_SBs_entered); |
sewardj | b5dc2d6 | 2009-07-15 14:51:48 +0000 | [diff] [blame] | 947 | VG_(umsg)(" IRStmts : SB entered = %'llu : 10\n", |
sewardj | 5d1c901 | 2007-02-12 08:42:13 +0000 | [diff] [blame] | 948 | 10 * n_IRStmts / n_SBs_entered); |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 949 | tl_assert(n_guest_instrs); // Paranoia time. |
sewardj | b5dc2d6 | 2009-07-15 14:51:48 +0000 | [diff] [blame] | 950 | VG_(umsg)(" IRStmts : guest instr = %'llu : 10\n", |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 951 | 10 * n_IRStmts / n_guest_instrs); |
| 952 | } |
| 953 | |
| 954 | if (clo_detailed_counts) { |
sewardj | b5dc2d6 | 2009-07-15 14:51:48 +0000 | [diff] [blame] | 955 | VG_(umsg)("\n"); |
| 956 | VG_(umsg)("IR-level counts by type:\n"); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 957 | print_details(); |
| 958 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 959 | |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 960 | if (clo_basic_counts) { |
sewardj | b5dc2d6 | 2009-07-15 14:51:48 +0000 | [diff] [blame] | 961 | VG_(umsg)("\n"); |
| 962 | VG_(umsg)("Exit code: %d\n", exitcode); |
njn | d99644d | 2006-04-07 11:52:55 +0000 | [diff] [blame] | 963 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 964 | } |
| 965 | |
njn | 51d827b | 2005-05-09 01:02:08 +0000 | [diff] [blame] | 966 | static void lk_pre_clo_init(void) |
| 967 | { |
| 968 | VG_(details_name) ("Lackey"); |
| 969 | VG_(details_version) (NULL); |
| 970 | VG_(details_description) ("an example Valgrind tool"); |
| 971 | VG_(details_copyright_author)( |
sewardj | ec062e8 | 2011-10-23 07:32:08 +0000 | [diff] [blame] | 972 | "Copyright (C) 2002-2011, and GNU GPL'd, by Nicholas Nethercote."); |
njn | 51d827b | 2005-05-09 01:02:08 +0000 | [diff] [blame] | 973 | VG_(details_bug_reports_to) (VG_BUGS_TO); |
sewardj | 4082356 | 2006-10-17 02:21:17 +0000 | [diff] [blame] | 974 | VG_(details_avg_translation_sizeB) ( 200 ); |
njn | 51d827b | 2005-05-09 01:02:08 +0000 | [diff] [blame] | 975 | |
| 976 | VG_(basic_tool_funcs) (lk_post_clo_init, |
| 977 | lk_instrument, |
| 978 | lk_fini); |
sewardj | 7a26f02 | 2005-11-01 17:52:34 +0000 | [diff] [blame] | 979 | VG_(needs_command_line_options)(lk_process_cmd_line_option, |
| 980 | lk_print_usage, |
| 981 | lk_print_debug_usage); |
njn | 51d827b | 2005-05-09 01:02:08 +0000 | [diff] [blame] | 982 | } |
| 983 | |
sewardj | 45f4e7c | 2005-09-27 19:20:21 +0000 | [diff] [blame] | 984 | VG_DETERMINE_INTERFACE_VERSION(lk_pre_clo_init) |
fitzhardinge | 98abfc7 | 2003-12-16 02:05:15 +0000 | [diff] [blame] | 985 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 986 | /*--------------------------------------------------------------------*/ |
njn25 | cac76cb | 2002-09-23 11:21:57 +0000 | [diff] [blame] | 987 | /*--- end lk_main.c ---*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 988 | /*--------------------------------------------------------------------*/ |