njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1 | |
| 2 | /*--------------------------------------------------------------------*/ |
nethercote | 137bc55 | 2003-11-14 17:47:54 +0000 | [diff] [blame] | 3 | /*--- The AddrCheck tool: like MemCheck, but only does address ---*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 4 | /*--- checking. No definedness checking. ---*/ |
njn25 | cac76cb | 2002-09-23 11:21:57 +0000 | [diff] [blame] | 5 | /*--- ac_main.c ---*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 6 | /*--------------------------------------------------------------------*/ |
| 7 | |
| 8 | /* |
nethercote | 137bc55 | 2003-11-14 17:47:54 +0000 | [diff] [blame] | 9 | This file is part of AddrCheck, a lightweight Valgrind tool for |
njn | c953984 | 2002-10-02 13:26:35 +0000 | [diff] [blame] | 10 | detecting memory errors. |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 11 | |
njn | 5361242 | 2005-03-12 16:22:54 +0000 | [diff] [blame] | 12 | Copyright (C) 2000-2005 Julian Seward |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 13 | jseward@acm.org |
| 14 | |
| 15 | This program is free software; you can redistribute it and/or |
| 16 | modify it under the terms of the GNU General Public License as |
| 17 | published by the Free Software Foundation; either version 2 of the |
| 18 | License, or (at your option) any later version. |
| 19 | |
| 20 | This program is distributed in the hope that it will be useful, but |
| 21 | WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 23 | General Public License for more details. |
| 24 | |
| 25 | You should have received a copy of the GNU General Public License |
| 26 | along with this program; if not, write to the Free Software |
| 27 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
| 28 | 02111-1307, USA. |
| 29 | |
| 30 | The GNU General Public License is contained in the file COPYING. |
| 31 | */ |
| 32 | |
njn | 43c799e | 2003-04-08 00:08:52 +0000 | [diff] [blame] | 33 | #include "mac_shared.h" |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 34 | #include "memcheck.h" |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 35 | //#include "vg_profile.c" |
| 36 | |
njn | 9b007f6 | 2003-04-07 14:40:25 +0000 | [diff] [blame] | 37 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 38 | /*------------------------------------------------------------*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 39 | /*--- Comparing and printing errors ---*/ |
| 40 | /*------------------------------------------------------------*/ |
| 41 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 42 | void TL_(pp_Error) ( Error* err ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 43 | { |
njn | 43c799e | 2003-04-08 00:08:52 +0000 | [diff] [blame] | 44 | MAC_Error* err_extra = VG_(get_error_extra)(err); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 45 | |
njn | 810086f | 2002-11-14 12:42:47 +0000 | [diff] [blame] | 46 | switch (VG_(get_error_kind)(err)) { |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 47 | case CoreMemErr: |
njn | 43c799e | 2003-04-08 00:08:52 +0000 | [diff] [blame] | 48 | VG_(message)(Vg_UserMsg, "%s contains unaddressable byte(s)", |
| 49 | VG_(get_error_string)(err)); |
| 50 | VG_(pp_ExeContext)( VG_(get_error_where)(err) ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 51 | break; |
| 52 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 53 | case ParamErr: |
njn | 43c799e | 2003-04-08 00:08:52 +0000 | [diff] [blame] | 54 | VG_(message)(Vg_UserMsg, |
| 55 | "Syscall param %s contains unaddressable byte(s)", |
| 56 | VG_(get_error_string)(err) ); |
| 57 | VG_(pp_ExeContext)( VG_(get_error_where)(err) ); |
| 58 | MAC_(pp_AddrInfo)(VG_(get_error_address)(err), &err_extra->addrinfo); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 59 | break; |
| 60 | |
| 61 | case UserErr: |
njn | 43c799e | 2003-04-08 00:08:52 +0000 | [diff] [blame] | 62 | VG_(message)(Vg_UserMsg, |
| 63 | "Unaddressable byte(s) found during client check request"); |
| 64 | VG_(pp_ExeContext)( VG_(get_error_where)(err) ); |
| 65 | MAC_(pp_AddrInfo)(VG_(get_error_address)(err), &err_extra->addrinfo); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 66 | break; |
| 67 | |
| 68 | default: |
njn | b126f73 | 2004-11-22 17:57:07 +0000 | [diff] [blame] | 69 | MAC_(pp_shared_Error)(err); |
njn | 43c799e | 2003-04-08 00:08:52 +0000 | [diff] [blame] | 70 | break; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 71 | } |
| 72 | } |
| 73 | |
| 74 | /*------------------------------------------------------------*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 75 | /*--- Suppressions ---*/ |
| 76 | /*------------------------------------------------------------*/ |
| 77 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 78 | Bool TL_(recognised_suppression) ( Char* name, Supp* su ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 79 | { |
njn | 43c799e | 2003-04-08 00:08:52 +0000 | [diff] [blame] | 80 | return MAC_(shared_recognised_suppression)(name, su); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 81 | } |
| 82 | |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 83 | #define DEBUG(fmt, args...) //VG_(printf)(fmt, ## args) |
| 84 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 85 | /*------------------------------------------------------------*/ |
| 86 | /*--- Low-level support for memory checking. ---*/ |
| 87 | /*------------------------------------------------------------*/ |
| 88 | |
| 89 | /* All reads and writes are checked against a memory map, which |
| 90 | records the state of all memory in the process. The memory map is |
| 91 | organised like this: |
| 92 | |
| 93 | The top 16 bits of an address are used to index into a top-level |
| 94 | map table, containing 65536 entries. Each entry is a pointer to a |
| 95 | second-level map, which records the accesibililty and validity |
| 96 | permissions for the 65536 bytes indexed by the lower 16 bits of the |
| 97 | address. Each byte is represented by one bit, indicating |
| 98 | accessibility. So each second-level map contains 8192 bytes. This |
| 99 | two-level arrangement conveniently divides the 4G address space |
| 100 | into 64k lumps, each size 64k bytes. |
| 101 | |
| 102 | All entries in the primary (top-level) map must point to a valid |
| 103 | secondary (second-level) map. Since most of the 4G of address |
| 104 | space will not be in use -- ie, not mapped at all -- there is a |
| 105 | distinguished secondary map, which indicates `not addressible and |
| 106 | not valid' writeable for all bytes. Entries in the primary map for |
| 107 | which the entire 64k is not in use at all point at this |
| 108 | distinguished map. |
| 109 | |
| 110 | [...] lots of stuff deleted due to out of date-ness |
| 111 | |
| 112 | As a final optimisation, the alignment and address checks for |
| 113 | 4-byte loads and stores are combined in a neat way. The primary |
| 114 | map is extended to have 262144 entries (2^18), rather than 2^16. |
| 115 | The top 3/4 of these entries are permanently set to the |
| 116 | distinguished secondary map. For a 4-byte load/store, the |
| 117 | top-level map is indexed not with (addr >> 16) but instead f(addr), |
| 118 | where |
| 119 | |
| 120 | f( XXXX XXXX XXXX XXXX ____ ____ ____ __YZ ) |
| 121 | = ____ ____ ____ __YZ XXXX XXXX XXXX XXXX or |
| 122 | = ____ ____ ____ __ZY XXXX XXXX XXXX XXXX |
| 123 | |
| 124 | ie the lowest two bits are placed above the 16 high address bits. |
| 125 | If either of these two bits are nonzero, the address is misaligned; |
| 126 | this will select a secondary map from the upper 3/4 of the primary |
| 127 | map. Because this is always the distinguished secondary map, a |
| 128 | (bogus) address check failure will result. The failure handling |
| 129 | code can then figure out whether this is a genuine addr check |
| 130 | failure or whether it is a possibly-legitimate access at a |
| 131 | misaligned address. */ |
| 132 | |
| 133 | |
| 134 | /*------------------------------------------------------------*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 135 | /*--- Function declarations. ---*/ |
| 136 | /*------------------------------------------------------------*/ |
| 137 | |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 138 | static void ac_ACCESS4_SLOWLY ( Addr a, Bool isWrite ); |
| 139 | static void ac_ACCESS2_SLOWLY ( Addr a, Bool isWrite ); |
| 140 | static void ac_ACCESS1_SLOWLY ( Addr a, Bool isWrite ); |
nethercote | 928a5f7 | 2004-11-03 18:10:37 +0000 | [diff] [blame] | 141 | static void ac_fpu_ACCESS_check_SLOWLY ( Addr addr, SizeT size, Bool isWrite ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 142 | |
| 143 | /*------------------------------------------------------------*/ |
| 144 | /*--- Data defns. ---*/ |
| 145 | /*------------------------------------------------------------*/ |
| 146 | |
| 147 | typedef |
| 148 | struct { |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 149 | UChar abits[SECONDARY_SIZE / 8]; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 150 | } |
| 151 | AcSecMap; |
| 152 | |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 153 | static AcSecMap* primary_map[ /*PRIMARY_SIZE*/ PRIMARY_SIZE*4 ]; |
| 154 | static const AcSecMap distinguished_secondary_maps[2] = { |
| 155 | [ VGM_BIT_INVALID ] = { { [0 ... (SECONDARY_SIZE/8) - 1] = VGM_BYTE_INVALID } }, |
| 156 | [ VGM_BIT_VALID ] = { { [0 ... (SECONDARY_SIZE/8) - 1] = VGM_BYTE_VALID } }, |
| 157 | }; |
| 158 | #define N_SECONDARY_MAPS (sizeof(distinguished_secondary_maps)/sizeof(*distinguished_secondary_maps)) |
| 159 | |
| 160 | #define DSM_IDX(a) ((a) & 1) |
| 161 | |
| 162 | #define DSM(a) ((AcSecMap *)&distinguished_secondary_maps[DSM_IDX(a)]) |
| 163 | |
| 164 | #define DSM_NOTADDR DSM(VGM_BIT_INVALID) |
| 165 | #define DSM_ADDR DSM(VGM_BIT_VALID) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 166 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 167 | static void init_shadow_memory ( void ) |
| 168 | { |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 169 | Int i, a; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 170 | |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 171 | /* check construction of the distinguished secondaries */ |
sewardj | 76754cf | 2005-03-14 00:14:04 +0000 | [diff] [blame] | 172 | tl_assert(VGM_BIT_INVALID == 1); |
| 173 | tl_assert(VGM_BIT_VALID == 0); |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 174 | |
| 175 | for(a = 0; a <= 1; a++) |
sewardj | 76754cf | 2005-03-14 00:14:04 +0000 | [diff] [blame] | 176 | tl_assert(distinguished_secondary_maps[DSM_IDX(a)].abits[0] == BIT_EXPAND(a)); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 177 | |
| 178 | /* These entries gradually get overwritten as the used address |
| 179 | space expands. */ |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 180 | for (i = 0; i < PRIMARY_SIZE; i++) |
| 181 | primary_map[i] = DSM_NOTADDR; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 182 | |
| 183 | /* These ones should never change; it's a bug in Valgrind if they do. */ |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 184 | for (i = PRIMARY_SIZE; i < PRIMARY_SIZE*4; i++) |
| 185 | primary_map[i] = DSM_NOTADDR; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 186 | } |
| 187 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 188 | /*------------------------------------------------------------*/ |
| 189 | /*--- Basic bitmap management, reading and writing. ---*/ |
| 190 | /*------------------------------------------------------------*/ |
| 191 | |
| 192 | /* Allocate and initialise a secondary map. */ |
| 193 | |
| 194 | static AcSecMap* alloc_secondary_map ( __attribute__ ((unused)) |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 195 | Char* caller, |
| 196 | const AcSecMap *prototype) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 197 | { |
| 198 | AcSecMap* map; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 199 | PROF_EVENT(10); |
| 200 | |
fitzhardinge | 98abfc7 | 2003-12-16 02:05:15 +0000 | [diff] [blame] | 201 | map = (AcSecMap *)VG_(shadow_alloc)(sizeof(AcSecMap)); |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 202 | VG_(memcpy)(map, prototype, sizeof(*map)); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 203 | |
| 204 | /* VG_(printf)("ALLOC_2MAP(%s)\n", caller ); */ |
| 205 | return map; |
| 206 | } |
| 207 | |
| 208 | |
| 209 | /* Basic reading/writing of the bitmaps, for byte-sized accesses. */ |
| 210 | |
| 211 | static __inline__ UChar get_abit ( Addr a ) |
| 212 | { |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 213 | AcSecMap* sm = primary_map[PM_IDX(a)]; |
| 214 | UInt sm_off = SM_OFF(a); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 215 | PROF_EVENT(20); |
| 216 | # if 0 |
| 217 | if (IS_DISTINGUISHED_SM(sm)) |
| 218 | VG_(message)(Vg_DebugMsg, |
| 219 | "accessed distinguished 2ndary (A)map! 0x%x\n", a); |
| 220 | # endif |
| 221 | return BITARR_TEST(sm->abits, sm_off) |
| 222 | ? VGM_BIT_INVALID : VGM_BIT_VALID; |
| 223 | } |
| 224 | |
sewardj | 5686735 | 2003-10-12 10:27:06 +0000 | [diff] [blame] | 225 | static /* __inline__ */ void set_abit ( Addr a, UChar abit ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 226 | { |
| 227 | AcSecMap* sm; |
| 228 | UInt sm_off; |
| 229 | PROF_EVENT(22); |
| 230 | ENSURE_MAPPABLE(a, "set_abit"); |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 231 | sm = primary_map[PM_IDX(a)]; |
| 232 | sm_off = SM_OFF(a); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 233 | if (abit) |
| 234 | BITARR_SET(sm->abits, sm_off); |
| 235 | else |
| 236 | BITARR_CLEAR(sm->abits, sm_off); |
| 237 | } |
| 238 | |
| 239 | |
| 240 | /* Reading/writing of the bitmaps, for aligned word-sized accesses. */ |
| 241 | |
| 242 | static __inline__ UChar get_abits4_ALIGNED ( Addr a ) |
| 243 | { |
| 244 | AcSecMap* sm; |
| 245 | UInt sm_off; |
| 246 | UChar abits8; |
| 247 | PROF_EVENT(24); |
| 248 | # ifdef VG_DEBUG_MEMORY |
njn | edfa0f6 | 2004-11-30 18:08:05 +0000 | [diff] [blame] | 249 | tl_assert(IS_4_ALIGNED(a)); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 250 | # endif |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 251 | sm = primary_map[PM_IDX(a)]; |
| 252 | sm_off = SM_OFF(a); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 253 | abits8 = sm->abits[sm_off >> 3]; |
| 254 | abits8 >>= (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */ |
| 255 | abits8 &= 0x0F; |
| 256 | return abits8; |
| 257 | } |
| 258 | |
| 259 | |
| 260 | |
| 261 | /*------------------------------------------------------------*/ |
| 262 | /*--- Setting permissions over address ranges. ---*/ |
| 263 | /*------------------------------------------------------------*/ |
| 264 | |
sewardj | 5686735 | 2003-10-12 10:27:06 +0000 | [diff] [blame] | 265 | static /* __inline__ */ |
nethercote | 451eae9 | 2004-11-02 13:06:32 +0000 | [diff] [blame] | 266 | void set_address_range_perms ( Addr a, SizeT len, UInt example_a_bit ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 267 | { |
| 268 | UChar abyte8; |
| 269 | UInt sm_off; |
| 270 | AcSecMap* sm; |
| 271 | |
| 272 | PROF_EVENT(30); |
| 273 | |
| 274 | if (len == 0) |
| 275 | return; |
| 276 | |
| 277 | if (len > 100 * 1000 * 1000) { |
| 278 | VG_(message)(Vg_UserMsg, |
| 279 | "Warning: set address range perms: " |
| 280 | "large range %u, a %d", |
| 281 | len, example_a_bit ); |
| 282 | } |
| 283 | |
| 284 | VGP_PUSHCC(VgpSetMem); |
| 285 | |
| 286 | /* Requests to change permissions of huge address ranges may |
| 287 | indicate bugs in our machinery. 30,000,000 is arbitrary, but so |
| 288 | far all legitimate requests have fallen beneath that size. */ |
| 289 | /* 4 Mar 02: this is just stupid; get rid of it. */ |
njn | ca82cc0 | 2004-11-22 17:18:48 +0000 | [diff] [blame] | 290 | /* tl_assert(len < 30000000); */ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 291 | |
| 292 | /* Check the permissions make sense. */ |
njn | ca82cc0 | 2004-11-22 17:18:48 +0000 | [diff] [blame] | 293 | tl_assert(example_a_bit == VGM_BIT_VALID |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 294 | || example_a_bit == VGM_BIT_INVALID); |
| 295 | |
| 296 | /* In order that we can charge through the address space at 8 |
| 297 | bytes/main-loop iteration, make up some perms. */ |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 298 | abyte8 = BIT_EXPAND(example_a_bit); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 299 | |
| 300 | # ifdef VG_DEBUG_MEMORY |
| 301 | /* Do it ... */ |
| 302 | while (True) { |
| 303 | PROF_EVENT(31); |
| 304 | if (len == 0) break; |
| 305 | set_abit ( a, example_a_bit ); |
| 306 | set_vbyte ( a, vbyte ); |
| 307 | a++; |
| 308 | len--; |
| 309 | } |
| 310 | |
| 311 | # else |
| 312 | /* Slowly do parts preceding 8-byte alignment. */ |
| 313 | while (True) { |
| 314 | PROF_EVENT(31); |
| 315 | if (len == 0) break; |
| 316 | if ((a % 8) == 0) break; |
| 317 | set_abit ( a, example_a_bit ); |
| 318 | a++; |
| 319 | len--; |
| 320 | } |
| 321 | |
| 322 | if (len == 0) { |
| 323 | VGP_POPCC(VgpSetMem); |
| 324 | return; |
| 325 | } |
njn | ca82cc0 | 2004-11-22 17:18:48 +0000 | [diff] [blame] | 326 | tl_assert((a % 8) == 0 && len > 0); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 327 | |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 328 | /* Once aligned, go fast up to primary boundary. */ |
| 329 | for (; (a & SECONDARY_MASK) && len >= 8; a += 8, len -= 8) { |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 330 | PROF_EVENT(32); |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 331 | |
| 332 | /* If the primary is already pointing to a distinguished map |
| 333 | with the same properties as we're trying to set, then leave |
| 334 | it that way. */ |
| 335 | if (primary_map[PM_IDX(a)] == DSM(example_a_bit)) |
| 336 | continue; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 337 | ENSURE_MAPPABLE(a, "set_address_range_perms(fast)"); |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 338 | sm = primary_map[PM_IDX(a)]; |
| 339 | sm_off = SM_OFF(a); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 340 | sm->abits[sm_off >> 3] = abyte8; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 341 | } |
| 342 | |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 343 | /* Now set whole secondary maps to the right distinguished value. |
| 344 | |
| 345 | Note that if the primary already points to a non-distinguished |
| 346 | secondary, then don't replace the reference. That would just |
| 347 | leak memory. |
| 348 | */ |
| 349 | for(; len >= SECONDARY_SIZE; a += SECONDARY_SIZE, len -= SECONDARY_SIZE) { |
| 350 | sm = primary_map[PM_IDX(a)]; |
| 351 | |
| 352 | if (IS_DISTINGUISHED_SM(sm)) |
| 353 | primary_map[PM_IDX(a)] = DSM(example_a_bit); |
| 354 | else |
| 355 | VG_(memset)(sm->abits, abyte8, sizeof(sm->abits)); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 356 | } |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 357 | |
| 358 | /* Now finished the remains. */ |
| 359 | for (; len >= 8; a += 8, len -= 8) { |
| 360 | PROF_EVENT(32); |
| 361 | |
| 362 | /* If the primary is already pointing to a distinguished map |
| 363 | with the same properties as we're trying to set, then leave |
| 364 | it that way. */ |
| 365 | if (primary_map[PM_IDX(a)] == DSM(example_a_bit)) |
| 366 | continue; |
| 367 | ENSURE_MAPPABLE(a, "set_address_range_perms(fast)"); |
| 368 | sm = primary_map[PM_IDX(a)]; |
| 369 | sm_off = SM_OFF(a); |
| 370 | sm->abits[sm_off >> 3] = abyte8; |
| 371 | } |
| 372 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 373 | |
| 374 | /* Finish the upper fragment. */ |
| 375 | while (True) { |
| 376 | PROF_EVENT(33); |
| 377 | if (len == 0) break; |
| 378 | set_abit ( a, example_a_bit ); |
| 379 | a++; |
| 380 | len--; |
| 381 | } |
| 382 | # endif |
| 383 | |
| 384 | /* Check that zero page and highest page have not been written to |
| 385 | -- this could happen with buggy syscall wrappers. Today |
| 386 | (2001-04-26) had precisely such a problem with __NR_setitimer. */ |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 387 | tl_assert(TL_(cheap_sanity_check)()); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 388 | VGP_POPCC(VgpSetMem); |
| 389 | } |
| 390 | |
| 391 | /* Set permissions for address ranges ... */ |
| 392 | |
nethercote | 451eae9 | 2004-11-02 13:06:32 +0000 | [diff] [blame] | 393 | static void ac_make_noaccess ( Addr a, SizeT len ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 394 | { |
| 395 | PROF_EVENT(35); |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 396 | DEBUG("ac_make_noaccess(%p, %x)\n", a, len); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 397 | set_address_range_perms ( a, len, VGM_BIT_INVALID ); |
| 398 | } |
| 399 | |
nethercote | 451eae9 | 2004-11-02 13:06:32 +0000 | [diff] [blame] | 400 | static void ac_make_accessible ( Addr a, SizeT len ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 401 | { |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 402 | PROF_EVENT(38); |
| 403 | DEBUG("ac_make_accessible(%p, %x)\n", a, len); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 404 | set_address_range_perms ( a, len, VGM_BIT_VALID ); |
| 405 | } |
| 406 | |
njn | 9b007f6 | 2003-04-07 14:40:25 +0000 | [diff] [blame] | 407 | static __inline__ |
| 408 | void make_aligned_word_noaccess(Addr a) |
| 409 | { |
| 410 | AcSecMap* sm; |
| 411 | UInt sm_off; |
| 412 | UChar mask; |
| 413 | |
| 414 | VGP_PUSHCC(VgpESPAdj); |
| 415 | ENSURE_MAPPABLE(a, "make_aligned_word_noaccess"); |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 416 | sm = primary_map[PM_IDX(a)]; |
| 417 | sm_off = SM_OFF(a); |
njn | 9b007f6 | 2003-04-07 14:40:25 +0000 | [diff] [blame] | 418 | mask = 0x0F; |
| 419 | mask <<= (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */ |
| 420 | /* mask now contains 1s where we wish to make address bits invalid (1s). */ |
| 421 | sm->abits[sm_off >> 3] |= mask; |
| 422 | VGP_POPCC(VgpESPAdj); |
| 423 | } |
| 424 | |
| 425 | static __inline__ |
| 426 | void make_aligned_word_accessible(Addr a) |
| 427 | { |
| 428 | AcSecMap* sm; |
| 429 | UInt sm_off; |
| 430 | UChar mask; |
| 431 | |
| 432 | VGP_PUSHCC(VgpESPAdj); |
| 433 | ENSURE_MAPPABLE(a, "make_aligned_word_accessible"); |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 434 | sm = primary_map[PM_IDX(a)]; |
| 435 | sm_off = SM_OFF(a); |
njn | 9b007f6 | 2003-04-07 14:40:25 +0000 | [diff] [blame] | 436 | mask = 0x0F; |
| 437 | mask <<= (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */ |
| 438 | /* mask now contains 1s where we wish to make address bits |
| 439 | invalid (0s). */ |
| 440 | sm->abits[sm_off >> 3] &= ~mask; |
| 441 | VGP_POPCC(VgpESPAdj); |
| 442 | } |
| 443 | |
| 444 | /* Nb: by "aligned" here we mean 8-byte aligned */ |
| 445 | static __inline__ |
| 446 | void make_aligned_doubleword_accessible(Addr a) |
| 447 | { |
| 448 | AcSecMap* sm; |
| 449 | UInt sm_off; |
| 450 | |
| 451 | VGP_PUSHCC(VgpESPAdj); |
| 452 | ENSURE_MAPPABLE(a, "make_aligned_doubleword_accessible"); |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 453 | sm = primary_map[PM_IDX(a)]; |
| 454 | sm_off = SM_OFF(a); |
njn | 9b007f6 | 2003-04-07 14:40:25 +0000 | [diff] [blame] | 455 | sm->abits[sm_off >> 3] = VGM_BYTE_VALID; |
| 456 | VGP_POPCC(VgpESPAdj); |
| 457 | } |
| 458 | |
| 459 | static __inline__ |
| 460 | void make_aligned_doubleword_noaccess(Addr a) |
| 461 | { |
| 462 | AcSecMap* sm; |
| 463 | UInt sm_off; |
| 464 | |
| 465 | VGP_PUSHCC(VgpESPAdj); |
| 466 | ENSURE_MAPPABLE(a, "make_aligned_doubleword_noaccess"); |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 467 | sm = primary_map[PM_IDX(a)]; |
| 468 | sm_off = SM_OFF(a); |
njn | 9b007f6 | 2003-04-07 14:40:25 +0000 | [diff] [blame] | 469 | sm->abits[sm_off >> 3] = VGM_BYTE_INVALID; |
| 470 | VGP_POPCC(VgpESPAdj); |
| 471 | } |
| 472 | |
| 473 | /* The %esp update handling functions */ |
| 474 | ESP_UPDATE_HANDLERS ( make_aligned_word_accessible, |
| 475 | make_aligned_word_noaccess, |
| 476 | make_aligned_doubleword_accessible, |
| 477 | make_aligned_doubleword_noaccess, |
| 478 | ac_make_accessible, |
| 479 | ac_make_noaccess |
| 480 | ); |
| 481 | |
| 482 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 483 | /* Block-copy permissions (needed for implementing realloc()). */ |
| 484 | |
nethercote | 451eae9 | 2004-11-02 13:06:32 +0000 | [diff] [blame] | 485 | static void ac_copy_address_range_state ( Addr src, Addr dst, SizeT len ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 486 | { |
| 487 | UInt i; |
| 488 | |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 489 | DEBUG("ac_copy_address_range_state\n"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 490 | |
| 491 | PROF_EVENT(40); |
| 492 | for (i = 0; i < len; i++) { |
| 493 | UChar abit = get_abit ( src+i ); |
| 494 | PROF_EVENT(41); |
| 495 | set_abit ( dst+i, abit ); |
| 496 | } |
| 497 | } |
| 498 | |
| 499 | |
| 500 | /* Check permissions for address range. If inadequate permissions |
| 501 | exist, *bad_addr is set to the offending address, so the caller can |
| 502 | know what it is. */ |
| 503 | |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 504 | static __inline__ |
nethercote | 451eae9 | 2004-11-02 13:06:32 +0000 | [diff] [blame] | 505 | Bool ac_check_accessible ( Addr a, SizeT len, Addr* bad_addr ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 506 | { |
| 507 | UInt i; |
| 508 | UChar abit; |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 509 | PROF_EVENT(48); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 510 | for (i = 0; i < len; i++) { |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 511 | PROF_EVENT(49); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 512 | abit = get_abit(a); |
| 513 | if (abit == VGM_BIT_INVALID) { |
| 514 | if (bad_addr != NULL) *bad_addr = a; |
| 515 | return False; |
| 516 | } |
| 517 | a++; |
| 518 | } |
| 519 | return True; |
| 520 | } |
| 521 | |
sewardj | ecf8e10 | 2003-07-12 12:11:39 +0000 | [diff] [blame] | 522 | /* The opposite; check that an address range is inaccessible. */ |
| 523 | static |
nethercote | 451eae9 | 2004-11-02 13:06:32 +0000 | [diff] [blame] | 524 | Bool ac_check_noaccess ( Addr a, SizeT len, Addr* bad_addr ) |
sewardj | ecf8e10 | 2003-07-12 12:11:39 +0000 | [diff] [blame] | 525 | { |
| 526 | UInt i; |
| 527 | UChar abit; |
| 528 | PROF_EVENT(48); |
| 529 | for (i = 0; i < len; i++) { |
| 530 | PROF_EVENT(49); |
| 531 | abit = get_abit(a); |
| 532 | if (abit == VGM_BIT_VALID) { |
| 533 | if (bad_addr != NULL) *bad_addr = a; |
| 534 | return False; |
| 535 | } |
| 536 | a++; |
| 537 | } |
| 538 | return True; |
| 539 | } |
| 540 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 541 | /* Check a zero-terminated ascii string. Tricky -- don't want to |
| 542 | examine the actual bytes, to find the end, until we're sure it is |
| 543 | safe to do so. */ |
| 544 | |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 545 | static __inline__ |
| 546 | Bool ac_check_readable_asciiz ( Addr a, Addr* bad_addr ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 547 | { |
| 548 | UChar abit; |
| 549 | PROF_EVENT(46); |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 550 | DEBUG("ac_check_readable_asciiz\n"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 551 | while (True) { |
| 552 | PROF_EVENT(47); |
| 553 | abit = get_abit(a); |
| 554 | if (abit != VGM_BIT_VALID) { |
| 555 | if (bad_addr != NULL) *bad_addr = a; |
| 556 | return False; |
| 557 | } |
| 558 | /* Ok, a is safe to read. */ |
| 559 | if (* ((UChar*)a) == 0) return True; |
| 560 | a++; |
| 561 | } |
| 562 | } |
| 563 | |
| 564 | |
| 565 | /*------------------------------------------------------------*/ |
| 566 | /*--- Memory event handlers ---*/ |
| 567 | /*------------------------------------------------------------*/ |
| 568 | |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 569 | static __inline__ |
njn | 7271864 | 2003-07-24 08:45:32 +0000 | [diff] [blame] | 570 | void ac_check_is_accessible ( CorePart part, ThreadId tid, |
nethercote | 451eae9 | 2004-11-02 13:06:32 +0000 | [diff] [blame] | 571 | Char* s, Addr base, SizeT size, Bool isWrite ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 572 | { |
| 573 | Bool ok; |
njn | 86f12dc | 2005-03-14 01:16:05 +0000 | [diff] [blame] | 574 | Addr bad_addr = 0; // Initialise to shut gcc up |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 575 | |
| 576 | VGP_PUSHCC(VgpCheckMem); |
| 577 | |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 578 | ok = ac_check_accessible ( base, size, &bad_addr ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 579 | if (!ok) { |
| 580 | switch (part) { |
| 581 | case Vg_CoreSysCall: |
nethercote | 8b76fe5 | 2004-11-08 19:20:09 +0000 | [diff] [blame] | 582 | MAC_(record_param_error) ( tid, bad_addr, /*isReg*/False, |
| 583 | /*isUnaddr*/True, s ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 584 | break; |
| 585 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 586 | case Vg_CoreSignal: |
njn | ca82cc0 | 2004-11-22 17:18:48 +0000 | [diff] [blame] | 587 | tl_assert(isWrite); /* Should only happen with isWrite case */ |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 588 | /* fall through */ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 589 | case Vg_CorePThread: |
nethercote | 8b76fe5 | 2004-11-08 19:20:09 +0000 | [diff] [blame] | 590 | MAC_(record_core_mem_error)( tid, /*isUnaddr*/True, s ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 591 | break; |
| 592 | |
| 593 | /* If we're being asked to jump to a silly address, record an error |
| 594 | message before potentially crashing the entire system. */ |
| 595 | case Vg_CoreTranslate: |
njn | ca82cc0 | 2004-11-22 17:18:48 +0000 | [diff] [blame] | 596 | tl_assert(!isWrite); /* Should only happen with !isWrite case */ |
njn | 7271864 | 2003-07-24 08:45:32 +0000 | [diff] [blame] | 597 | MAC_(record_jump_error)( tid, bad_addr ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 598 | break; |
| 599 | |
| 600 | default: |
njn | 6799325 | 2004-11-22 18:02:32 +0000 | [diff] [blame] | 601 | VG_(tool_panic)("ac_check_is_accessible: unexpected CorePart"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 602 | } |
| 603 | } |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 604 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 605 | VGP_POPCC(VgpCheckMem); |
| 606 | } |
| 607 | |
| 608 | static |
njn | 7271864 | 2003-07-24 08:45:32 +0000 | [diff] [blame] | 609 | void ac_check_is_writable ( CorePart part, ThreadId tid, |
nethercote | 451eae9 | 2004-11-02 13:06:32 +0000 | [diff] [blame] | 610 | Char* s, Addr base, SizeT size ) |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 611 | { |
njn | 7271864 | 2003-07-24 08:45:32 +0000 | [diff] [blame] | 612 | ac_check_is_accessible ( part, tid, s, base, size, /*isWrite*/True ); |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 613 | } |
| 614 | |
| 615 | static |
njn | 7271864 | 2003-07-24 08:45:32 +0000 | [diff] [blame] | 616 | void ac_check_is_readable ( CorePart part, ThreadId tid, |
nethercote | 451eae9 | 2004-11-02 13:06:32 +0000 | [diff] [blame] | 617 | Char* s, Addr base, SizeT size ) |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 618 | { |
njn | 7271864 | 2003-07-24 08:45:32 +0000 | [diff] [blame] | 619 | ac_check_is_accessible ( part, tid, s, base, size, /*isWrite*/False ); |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 620 | } |
| 621 | |
| 622 | static |
njn | 7271864 | 2003-07-24 08:45:32 +0000 | [diff] [blame] | 623 | void ac_check_is_readable_asciiz ( CorePart part, ThreadId tid, |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 624 | Char* s, Addr str ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 625 | { |
| 626 | Bool ok = True; |
njn | 86f12dc | 2005-03-14 01:16:05 +0000 | [diff] [blame] | 627 | Addr bad_addr = 0; // Initialise to shut gcc up |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 628 | |
| 629 | VGP_PUSHCC(VgpCheckMem); |
| 630 | |
njn | ca82cc0 | 2004-11-22 17:18:48 +0000 | [diff] [blame] | 631 | tl_assert(part == Vg_CoreSysCall); |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 632 | ok = ac_check_readable_asciiz ( (Addr)str, &bad_addr ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 633 | if (!ok) { |
nethercote | 8b76fe5 | 2004-11-08 19:20:09 +0000 | [diff] [blame] | 634 | MAC_(record_param_error) ( tid, bad_addr, /*IsReg*/False, |
| 635 | /*IsUnaddr*/True, s ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 636 | } |
| 637 | |
| 638 | VGP_POPCC(VgpCheckMem); |
| 639 | } |
| 640 | |
| 641 | static |
nethercote | 451eae9 | 2004-11-02 13:06:32 +0000 | [diff] [blame] | 642 | void ac_new_mem_startup( Addr a, SizeT len, Bool rr, Bool ww, Bool xx ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 643 | { |
njn | 1f3a909 | 2002-10-04 09:22:30 +0000 | [diff] [blame] | 644 | /* Ignore the permissions, just make it readable. Seems to work... */ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 645 | DEBUG("new_mem_startup(%p, %u, rr=%u, ww=%u, xx=%u)\n", a,len,rr,ww,xx); |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 646 | ac_make_accessible(a, len); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 647 | } |
| 648 | |
| 649 | static |
nethercote | 451eae9 | 2004-11-02 13:06:32 +0000 | [diff] [blame] | 650 | void ac_new_mem_heap ( Addr a, SizeT len, Bool is_inited ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 651 | { |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 652 | ac_make_accessible(a, len); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 653 | } |
| 654 | |
| 655 | static |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 656 | void ac_new_mem_mmap (Addr a, SizeT len, Bool rr, Bool ww, Bool xx) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 657 | { |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 658 | DEBUG("ac_set_perms(%p, %u, rr=%u ww=%u, xx=%u)\n", |
sewardj | 40f8ebe | 2002-10-23 21:46:13 +0000 | [diff] [blame] | 659 | a, len, rr, ww, xx); |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 660 | ac_make_accessible(a, len); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 661 | } |
| 662 | |
njn | cf45fd4 | 2004-11-24 16:30:22 +0000 | [diff] [blame] | 663 | static |
| 664 | void ac_post_mem_write(CorePart part, ThreadId tid, Addr a, SizeT len) |
| 665 | { |
| 666 | ac_make_accessible(a, len); |
| 667 | } |
| 668 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 669 | |
| 670 | /*------------------------------------------------------------*/ |
| 671 | /*--- Functions called directly from generated code. ---*/ |
| 672 | /*------------------------------------------------------------*/ |
| 673 | |
| 674 | static __inline__ UInt rotateRight16 ( UInt x ) |
| 675 | { |
| 676 | /* Amazingly, gcc turns this into a single rotate insn. */ |
| 677 | return (x >> 16) | (x << 16); |
| 678 | } |
| 679 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 680 | static __inline__ UInt shiftRight16 ( UInt x ) |
| 681 | { |
| 682 | return x >> 16; |
| 683 | } |
| 684 | |
| 685 | |
| 686 | /* Read/write 1/2/4 sized V bytes, and emit an address error if |
| 687 | needed. */ |
| 688 | |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 689 | /* ac_helperc_ACCESS{1,2,4} handle the common case fast. |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 690 | Under all other circumstances, it defers to the relevant _SLOWLY |
| 691 | function, which can handle all situations. |
| 692 | */ |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 693 | static __inline__ void ac_helperc_ACCESS4 ( Addr a, Bool isWrite ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 694 | { |
| 695 | # ifdef VG_DEBUG_MEMORY |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 696 | return ac_ACCESS4_SLOWLY(a, isWrite); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 697 | # else |
| 698 | UInt sec_no = rotateRight16(a) & 0x3FFFF; |
njn | da2e36d | 2003-09-30 13:33:24 +0000 | [diff] [blame] | 699 | AcSecMap* sm = primary_map[sec_no]; |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 700 | UInt a_off = (SM_OFF(a)) >> 3; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 701 | UChar abits = sm->abits[a_off]; |
| 702 | abits >>= (a & 4); |
| 703 | abits &= 15; |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 704 | PROF_EVENT(66); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 705 | if (abits == VGM_NIBBLE_VALID) { |
| 706 | /* Handle common case quickly: a is suitably aligned, is mapped, |
| 707 | and is addressible. So just return. */ |
| 708 | return; |
| 709 | } else { |
| 710 | /* Slow but general case. */ |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 711 | ac_ACCESS4_SLOWLY(a, isWrite); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 712 | } |
| 713 | # endif |
| 714 | } |
| 715 | |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 716 | static __inline__ void ac_helperc_ACCESS2 ( Addr a, Bool isWrite ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 717 | { |
| 718 | # ifdef VG_DEBUG_MEMORY |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 719 | return ac_ACCESS2_SLOWLY(a, isWrite); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 720 | # else |
| 721 | UInt sec_no = rotateRight16(a) & 0x1FFFF; |
| 722 | AcSecMap* sm = primary_map[sec_no]; |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 723 | UInt a_off = (SM_OFF(a)) >> 3; |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 724 | PROF_EVENT(67); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 725 | if (sm->abits[a_off] == VGM_BYTE_VALID) { |
| 726 | /* Handle common case quickly. */ |
| 727 | return; |
| 728 | } else { |
| 729 | /* Slow but general case. */ |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 730 | ac_ACCESS2_SLOWLY(a, isWrite); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 731 | } |
| 732 | # endif |
| 733 | } |
| 734 | |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 735 | static __inline__ void ac_helperc_ACCESS1 ( Addr a, Bool isWrite ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 736 | { |
| 737 | # ifdef VG_DEBUG_MEMORY |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 738 | return ac_ACCESS1_SLOWLY(a, isWrite); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 739 | # else |
| 740 | UInt sec_no = shiftRight16(a); |
| 741 | AcSecMap* sm = primary_map[sec_no]; |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 742 | UInt a_off = (SM_OFF(a)) >> 3; |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 743 | PROF_EVENT(68); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 744 | if (sm->abits[a_off] == VGM_BYTE_VALID) { |
| 745 | /* Handle common case quickly. */ |
| 746 | return; |
| 747 | } else { |
| 748 | /* Slow but general case. */ |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 749 | ac_ACCESS1_SLOWLY(a, isWrite); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 750 | } |
| 751 | # endif |
| 752 | } |
| 753 | |
nethercote | eec4630 | 2004-08-23 15:06:23 +0000 | [diff] [blame] | 754 | REGPARM(1) |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 755 | static void ach_LOAD4 ( Addr a ) |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 756 | { |
| 757 | ac_helperc_ACCESS4 ( a, /*isWrite*/False ); |
| 758 | } |
nethercote | eec4630 | 2004-08-23 15:06:23 +0000 | [diff] [blame] | 759 | REGPARM(1) |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 760 | static void ach_STORE4 ( Addr a ) |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 761 | { |
| 762 | ac_helperc_ACCESS4 ( a, /*isWrite*/True ); |
| 763 | } |
| 764 | |
nethercote | eec4630 | 2004-08-23 15:06:23 +0000 | [diff] [blame] | 765 | REGPARM(1) |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 766 | static void ach_LOAD2 ( Addr a ) |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 767 | { |
| 768 | ac_helperc_ACCESS2 ( a, /*isWrite*/False ); |
| 769 | } |
nethercote | eec4630 | 2004-08-23 15:06:23 +0000 | [diff] [blame] | 770 | REGPARM(1) |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 771 | static void ach_STORE2 ( Addr a ) |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 772 | { |
| 773 | ac_helperc_ACCESS2 ( a, /*isWrite*/True ); |
| 774 | } |
| 775 | |
nethercote | eec4630 | 2004-08-23 15:06:23 +0000 | [diff] [blame] | 776 | REGPARM(1) |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 777 | static void ach_LOAD1 ( Addr a ) |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 778 | { |
| 779 | ac_helperc_ACCESS1 ( a, /*isWrite*/False ); |
| 780 | } |
nethercote | eec4630 | 2004-08-23 15:06:23 +0000 | [diff] [blame] | 781 | REGPARM(1) |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 782 | static void ach_STORE1 ( Addr a ) |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 783 | { |
| 784 | ac_helperc_ACCESS1 ( a, /*isWrite*/True ); |
| 785 | } |
| 786 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 787 | |
| 788 | /*------------------------------------------------------------*/ |
| 789 | /*--- Fallback functions to handle cases that the above ---*/ |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 790 | /*--- ac_helperc_ACCESS{1,2,4} can't manage. ---*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 791 | /*------------------------------------------------------------*/ |
| 792 | |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 793 | static void ac_ACCESS4_SLOWLY ( Addr a, Bool isWrite ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 794 | { |
| 795 | Bool a0ok, a1ok, a2ok, a3ok; |
| 796 | |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 797 | PROF_EVENT(76); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 798 | |
| 799 | /* First establish independently the addressibility of the 4 bytes |
| 800 | involved. */ |
| 801 | a0ok = get_abit(a+0) == VGM_BIT_VALID; |
| 802 | a1ok = get_abit(a+1) == VGM_BIT_VALID; |
| 803 | a2ok = get_abit(a+2) == VGM_BIT_VALID; |
| 804 | a3ok = get_abit(a+3) == VGM_BIT_VALID; |
| 805 | |
| 806 | /* Now distinguish 3 cases */ |
| 807 | |
| 808 | /* Case 1: the address is completely valid, so: |
| 809 | - no addressing error |
| 810 | */ |
| 811 | if (a0ok && a1ok && a2ok && a3ok) { |
| 812 | return; |
| 813 | } |
| 814 | |
| 815 | /* Case 2: the address is completely invalid. |
| 816 | - emit addressing error |
| 817 | */ |
| 818 | /* VG_(printf)("%p (%d %d %d %d)\n", a, a0ok, a1ok, a2ok, a3ok); */ |
njn | 43c799e | 2003-04-08 00:08:52 +0000 | [diff] [blame] | 819 | if (!MAC_(clo_partial_loads_ok) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 820 | || ((a & 3) != 0) |
| 821 | || (!a0ok && !a1ok && !a2ok && !a3ok)) { |
sewardj | 76754cf | 2005-03-14 00:14:04 +0000 | [diff] [blame] | 822 | MAC_(record_address_error)( VG_(get_running_tid)(), a, 4, isWrite ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 823 | return; |
| 824 | } |
| 825 | |
| 826 | /* Case 3: the address is partially valid. |
| 827 | - no addressing error |
njn | 43c799e | 2003-04-08 00:08:52 +0000 | [diff] [blame] | 828 | Case 3 is only allowed if MAC_(clo_partial_loads_ok) is True |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 829 | (which is the default), and the address is 4-aligned. |
| 830 | If not, Case 2 will have applied. |
| 831 | */ |
njn | ca82cc0 | 2004-11-22 17:18:48 +0000 | [diff] [blame] | 832 | tl_assert(MAC_(clo_partial_loads_ok)); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 833 | { |
| 834 | return; |
| 835 | } |
| 836 | } |
| 837 | |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 838 | static void ac_ACCESS2_SLOWLY ( Addr a, Bool isWrite ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 839 | { |
| 840 | /* Check the address for validity. */ |
| 841 | Bool aerr = False; |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 842 | PROF_EVENT(77); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 843 | |
| 844 | if (get_abit(a+0) != VGM_BIT_VALID) aerr = True; |
| 845 | if (get_abit(a+1) != VGM_BIT_VALID) aerr = True; |
| 846 | |
| 847 | /* If an address error has happened, report it. */ |
| 848 | if (aerr) { |
sewardj | 76754cf | 2005-03-14 00:14:04 +0000 | [diff] [blame] | 849 | MAC_(record_address_error)( VG_(get_running_tid)(), a, 2, isWrite ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 850 | } |
| 851 | } |
| 852 | |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 853 | static void ac_ACCESS1_SLOWLY ( Addr a, Bool isWrite) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 854 | { |
| 855 | /* Check the address for validity. */ |
| 856 | Bool aerr = False; |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 857 | PROF_EVENT(78); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 858 | |
| 859 | if (get_abit(a+0) != VGM_BIT_VALID) aerr = True; |
| 860 | |
| 861 | /* If an address error has happened, report it. */ |
| 862 | if (aerr) { |
sewardj | 76754cf | 2005-03-14 00:14:04 +0000 | [diff] [blame] | 863 | MAC_(record_address_error)( VG_(get_running_tid)(), a, 1, isWrite ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 864 | } |
| 865 | } |
| 866 | |
| 867 | |
| 868 | /* --------------------------------------------------------------------- |
| 869 | FPU load and store checks, called from generated code. |
| 870 | ------------------------------------------------------------------ */ |
| 871 | |
sewardj | 5686735 | 2003-10-12 10:27:06 +0000 | [diff] [blame] | 872 | static |
nethercote | 928a5f7 | 2004-11-03 18:10:37 +0000 | [diff] [blame] | 873 | void ac_fpu_ACCESS_check ( Addr addr, SizeT size, Bool isWrite ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 874 | { |
| 875 | /* Ensure the read area is both addressible and valid (ie, |
| 876 | readable). If there's an address error, don't report a value |
| 877 | error too; but if there isn't an address error, check for a |
| 878 | value error. |
| 879 | |
| 880 | Try to be reasonably fast on the common case; wimp out and defer |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 881 | to ac_fpu_ACCESS_check_SLOWLY for everything else. */ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 882 | |
| 883 | AcSecMap* sm; |
| 884 | UInt sm_off, a_off; |
| 885 | Addr addr4; |
| 886 | |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 887 | PROF_EVENT(90); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 888 | |
| 889 | # ifdef VG_DEBUG_MEMORY |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 890 | ac_fpu_ACCESS_check_SLOWLY ( addr, size, isWrite ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 891 | # else |
| 892 | |
| 893 | if (size == 4) { |
njn | edfa0f6 | 2004-11-30 18:08:05 +0000 | [diff] [blame] | 894 | if (!IS_4_ALIGNED(addr)) goto slow4; |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 895 | PROF_EVENT(91); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 896 | /* Properly aligned. */ |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 897 | sm = primary_map[PM_IDX(addr)]; |
| 898 | sm_off = SM_OFF(addr); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 899 | a_off = sm_off >> 3; |
| 900 | if (sm->abits[a_off] != VGM_BYTE_VALID) goto slow4; |
| 901 | /* Properly aligned and addressible. */ |
| 902 | return; |
| 903 | slow4: |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 904 | ac_fpu_ACCESS_check_SLOWLY ( addr, 4, isWrite ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 905 | return; |
| 906 | } |
| 907 | |
| 908 | if (size == 8) { |
njn | edfa0f6 | 2004-11-30 18:08:05 +0000 | [diff] [blame] | 909 | if (!IS_4_ALIGNED(addr)) goto slow8; |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 910 | PROF_EVENT(92); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 911 | /* Properly aligned. Do it in two halves. */ |
| 912 | addr4 = addr + 4; |
| 913 | /* First half. */ |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 914 | sm = primary_map[PM_IDX(addr)]; |
| 915 | sm_off = SM_OFF(addr); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 916 | a_off = sm_off >> 3; |
| 917 | if (sm->abits[a_off] != VGM_BYTE_VALID) goto slow8; |
| 918 | /* First half properly aligned and addressible. */ |
| 919 | /* Second half. */ |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 920 | sm = primary_map[PM_IDX(addr4)]; |
| 921 | sm_off = SM_OFF(addr4); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 922 | a_off = sm_off >> 3; |
| 923 | if (sm->abits[a_off] != VGM_BYTE_VALID) goto slow8; |
| 924 | /* Second half properly aligned and addressible. */ |
| 925 | /* Both halves properly aligned and addressible. */ |
| 926 | return; |
| 927 | slow8: |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 928 | ac_fpu_ACCESS_check_SLOWLY ( addr, 8, isWrite ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 929 | return; |
| 930 | } |
| 931 | |
| 932 | /* Can't be bothered to huff'n'puff to make these (allegedly) rare |
| 933 | cases go quickly. */ |
| 934 | if (size == 2) { |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 935 | PROF_EVENT(93); |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 936 | ac_fpu_ACCESS_check_SLOWLY ( addr, 2, isWrite ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 937 | return; |
| 938 | } |
| 939 | |
jseward | fca6018 | 2004-01-04 23:30:55 +0000 | [diff] [blame] | 940 | if (size == 16 || size == 10 || size == 28 || size == 108 || size == 512) { |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 941 | PROF_EVENT(94); |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 942 | ac_fpu_ACCESS_check_SLOWLY ( addr, size, isWrite ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 943 | return; |
| 944 | } |
| 945 | |
| 946 | VG_(printf)("size is %d\n", size); |
njn | 6799325 | 2004-11-22 18:02:32 +0000 | [diff] [blame] | 947 | VG_(tool_panic)("fpu_ACCESS_check: unhandled size"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 948 | # endif |
| 949 | } |
| 950 | |
nethercote | eec4630 | 2004-08-23 15:06:23 +0000 | [diff] [blame] | 951 | REGPARM(2) |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 952 | static void ach_LOADN ( Addr addr, SizeT size ) |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 953 | { |
| 954 | ac_fpu_ACCESS_check ( addr, size, /*isWrite*/False ); |
| 955 | } |
| 956 | |
nethercote | eec4630 | 2004-08-23 15:06:23 +0000 | [diff] [blame] | 957 | REGPARM(2) |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 958 | static void ach_STOREN ( Addr addr, SizeT size ) |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 959 | { |
| 960 | ac_fpu_ACCESS_check ( addr, size, /*isWrite*/True ); |
| 961 | } |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 962 | |
sewardj | d62e03b | 2004-12-10 12:01:14 +0000 | [diff] [blame] | 963 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 964 | /* --------------------------------------------------------------------- |
| 965 | Slow, general cases for FPU access checks. |
| 966 | ------------------------------------------------------------------ */ |
| 967 | |
nethercote | 928a5f7 | 2004-11-03 18:10:37 +0000 | [diff] [blame] | 968 | void ac_fpu_ACCESS_check_SLOWLY ( Addr addr, SizeT size, Bool isWrite ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 969 | { |
| 970 | Int i; |
| 971 | Bool aerr = False; |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 972 | PROF_EVENT(100); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 973 | for (i = 0; i < size; i++) { |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 974 | PROF_EVENT(101); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 975 | if (get_abit(addr+i) != VGM_BIT_VALID) |
| 976 | aerr = True; |
| 977 | } |
| 978 | |
| 979 | if (aerr) { |
sewardj | 76754cf | 2005-03-14 00:14:04 +0000 | [diff] [blame] | 980 | MAC_(record_address_error)( VG_(get_running_tid)(), addr, size, isWrite ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 981 | } |
| 982 | } |
| 983 | |
| 984 | |
| 985 | /*------------------------------------------------------------*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 986 | /*--- Our instrumenter ---*/ |
| 987 | /*------------------------------------------------------------*/ |
| 988 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 989 | IRBB* TL_(instrument)(IRBB* bb_in, VexGuestLayout* layout, IRType hWordTy ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 990 | { |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 991 | Int i, hsz; |
| 992 | IRStmt* st; |
| 993 | IRExpr* data; |
| 994 | IRExpr* aexpr; |
| 995 | IRExpr* guard; |
| 996 | IRDirty* di; |
| 997 | Bool isLoad; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 998 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 999 | /* Set up BB */ |
| 1000 | IRBB* bb = emptyIRBB(); |
| 1001 | bb->tyenv = dopyIRTypeEnv(bb_in->tyenv); |
| 1002 | bb->next = dopyIRExpr(bb_in->next); |
| 1003 | bb->jumpkind = bb_in->jumpkind; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1004 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1005 | /* No loads to consider in ->next. */ |
sewardj | 710d6c2 | 2005-03-20 18:55:15 +0000 | [diff] [blame] | 1006 | tl_assert(isIRAtom(bb_in->next)); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1007 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1008 | for (i = 0; i < bb_in->stmts_used; i++) { |
| 1009 | st = bb_in->stmts[i]; |
| 1010 | if (!st) continue; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1011 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1012 | /* Examine each stmt in turn to figure out if it needs to be |
| 1013 | preceded by a memory access check. If so, collect up the |
| 1014 | relevant pieces of information. */ |
| 1015 | hsz = 0; |
| 1016 | aexpr = NULL; |
| 1017 | guard = NULL; |
| 1018 | isLoad = True; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1019 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1020 | switch (st->tag) { |
| 1021 | |
| 1022 | case Ist_Tmp: |
| 1023 | data = st->Ist.Tmp.data; |
| 1024 | if (data->tag == Iex_LDle) { |
| 1025 | aexpr = data->Iex.LDle.addr; |
| 1026 | hsz = sizeofIRType(data->Iex.LDle.ty); |
| 1027 | isLoad = True; |
| 1028 | } |
| 1029 | break; |
| 1030 | |
| 1031 | case Ist_STle: |
| 1032 | data = st->Ist.STle.data; |
| 1033 | aexpr = st->Ist.STle.addr; |
sewardj | 710d6c2 | 2005-03-20 18:55:15 +0000 | [diff] [blame] | 1034 | tl_assert(isIRAtom(data)); |
| 1035 | tl_assert(isIRAtom(aexpr)); |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1036 | hsz = sizeofIRType(typeOfIRExpr(bb_in->tyenv, data)); |
| 1037 | isLoad = False; |
sewardj | 08ccc5c | 2005-03-17 03:17:54 +0000 | [diff] [blame] | 1038 | break; |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1039 | |
| 1040 | case Ist_Put: |
sewardj | 710d6c2 | 2005-03-20 18:55:15 +0000 | [diff] [blame] | 1041 | tl_assert(isIRAtom(st->Ist.Put.data)); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1042 | break; |
| 1043 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1044 | case Ist_PutI: |
sewardj | 710d6c2 | 2005-03-20 18:55:15 +0000 | [diff] [blame] | 1045 | tl_assert(isIRAtom(st->Ist.PutI.ix)); |
| 1046 | tl_assert(isIRAtom(st->Ist.PutI.data)); |
njn | c2699f6 | 2003-09-05 23:29:33 +0000 | [diff] [blame] | 1047 | break; |
| 1048 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1049 | case Ist_Exit: |
sewardj | 710d6c2 | 2005-03-20 18:55:15 +0000 | [diff] [blame] | 1050 | tl_assert(isIRAtom(st->Ist.Exit.guard)); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1051 | break; |
| 1052 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1053 | case Ist_Dirty: |
| 1054 | if (st->Ist.Dirty.details->mFx != Ifx_None) { |
| 1055 | /* We classify Ifx_Modify as a load. */ |
| 1056 | isLoad = st->Ist.Dirty.details->mFx != Ifx_Write; |
| 1057 | hsz = st->Ist.Dirty.details->mSize; |
| 1058 | aexpr = st->Ist.Dirty.details->mAddr; |
| 1059 | guard = st->Ist.Dirty.details->guard; |
sewardj | 710d6c2 | 2005-03-20 18:55:15 +0000 | [diff] [blame] | 1060 | tl_assert(isIRAtom(aexpr)); |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1061 | } |
| 1062 | break; |
sewardj | e3891fa | 2003-06-15 03:13:48 +0000 | [diff] [blame] | 1063 | |
sewardj | 29faa50 | 2005-03-16 18:20:21 +0000 | [diff] [blame] | 1064 | case Ist_IMark: |
sewardj | bd598e1 | 2005-01-07 12:10:21 +0000 | [diff] [blame] | 1065 | case Ist_MFence: |
| 1066 | break; |
| 1067 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1068 | default: |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1069 | VG_(printf)("\n"); |
| 1070 | ppIRStmt(st); |
| 1071 | VG_(printf)("\n"); |
| 1072 | VG_(tool_panic)("addrcheck: unhandled IRStmt"); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1073 | } |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1074 | |
| 1075 | /* If needed, add a helper call. */ |
| 1076 | if (aexpr) { |
| 1077 | tl_assert(hsz > 0); |
| 1078 | switch (hsz) { |
| 1079 | case 4: |
| 1080 | if (isLoad) |
| 1081 | di = unsafeIRDirty_0_N( 1, "ach_LOAD4", &ach_LOAD4, |
| 1082 | mkIRExprVec_1(aexpr)); |
| 1083 | else |
| 1084 | di = unsafeIRDirty_0_N( 1, "ach_STORE4", &ach_STORE4, |
| 1085 | mkIRExprVec_1(aexpr)); |
| 1086 | break; |
| 1087 | case 2: |
| 1088 | if (isLoad) |
| 1089 | di = unsafeIRDirty_0_N( 1, "ach_LOAD2", &ach_LOAD2, |
| 1090 | mkIRExprVec_1(aexpr)); |
| 1091 | else |
| 1092 | di = unsafeIRDirty_0_N( 1, "ach_STORE2", &ach_STORE2, |
| 1093 | mkIRExprVec_1(aexpr)); |
| 1094 | break; |
| 1095 | case 1: |
| 1096 | if (isLoad) |
| 1097 | di = unsafeIRDirty_0_N( 1, "ach_LOAD1", &ach_LOAD1, |
| 1098 | mkIRExprVec_1(aexpr)); |
| 1099 | else |
| 1100 | di = unsafeIRDirty_0_N( 1, "ach_STORE1", &ach_STORE1, |
| 1101 | mkIRExprVec_1(aexpr)); |
| 1102 | break; |
| 1103 | default: |
| 1104 | if (isLoad) |
| 1105 | di = unsafeIRDirty_0_N( |
| 1106 | 2, "ach_LOADN", &ach_LOADN, |
| 1107 | mkIRExprVec_2(aexpr,mkIRExpr_HWord(hsz))); |
| 1108 | else |
| 1109 | di = unsafeIRDirty_0_N( |
| 1110 | 2, "ach_STOREN", &ach_STOREN, |
| 1111 | mkIRExprVec_2(aexpr,mkIRExpr_HWord(hsz))); |
| 1112 | break; |
| 1113 | } |
| 1114 | |
| 1115 | /* If the call has arisen as a result of a dirty helper which |
| 1116 | references memory, we need to inherit the guard from the |
| 1117 | dirty helper. */ |
| 1118 | if (guard) |
| 1119 | di->guard = dopyIRExpr(guard); |
| 1120 | |
| 1121 | /* emit the helper call */ |
| 1122 | addStmtToIRBB( bb, IRStmt_Dirty(di) ); |
| 1123 | |
| 1124 | } |
| 1125 | |
| 1126 | /* And finally, copy the expr itself to the output. */ |
sewardj | bd598e1 | 2005-01-07 12:10:21 +0000 | [diff] [blame] | 1127 | addStmtToIRBB( bb, st ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1128 | } |
| 1129 | |
sewardj | 9f649aa | 2004-11-22 20:38:40 +0000 | [diff] [blame] | 1130 | return bb; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1131 | } |
| 1132 | |
| 1133 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1134 | /*------------------------------------------------------------*/ |
| 1135 | /*--- Detecting leaked (unreachable) malloc'd blocks. ---*/ |
| 1136 | /*------------------------------------------------------------*/ |
| 1137 | |
sewardj | a449568 | 2002-10-21 07:29:59 +0000 | [diff] [blame] | 1138 | /* For the memory leak detector, say whether an entire 64k chunk of |
| 1139 | address space is possibly in use, or not. If in doubt return |
| 1140 | True. |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1141 | */ |
sewardj | a449568 | 2002-10-21 07:29:59 +0000 | [diff] [blame] | 1142 | static |
| 1143 | Bool ac_is_valid_64k_chunk ( UInt chunk_number ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1144 | { |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 1145 | tl_assert(chunk_number >= 0 && chunk_number < PRIMARY_SIZE); |
| 1146 | if (primary_map[chunk_number] == DSM_NOTADDR) { |
sewardj | a449568 | 2002-10-21 07:29:59 +0000 | [diff] [blame] | 1147 | /* Definitely not in use. */ |
| 1148 | return False; |
| 1149 | } else { |
| 1150 | return True; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1151 | } |
| 1152 | } |
| 1153 | |
| 1154 | |
sewardj | a449568 | 2002-10-21 07:29:59 +0000 | [diff] [blame] | 1155 | /* For the memory leak detector, say whether or not a given word |
| 1156 | address is to be regarded as valid. */ |
| 1157 | static |
| 1158 | Bool ac_is_valid_address ( Addr a ) |
| 1159 | { |
| 1160 | UChar abits; |
njn | edfa0f6 | 2004-11-30 18:08:05 +0000 | [diff] [blame] | 1161 | tl_assert(IS_4_ALIGNED(a)); |
sewardj | a449568 | 2002-10-21 07:29:59 +0000 | [diff] [blame] | 1162 | abits = get_abits4_ALIGNED(a); |
| 1163 | if (abits == VGM_NIBBLE_VALID) { |
| 1164 | return True; |
| 1165 | } else { |
| 1166 | return False; |
| 1167 | } |
| 1168 | } |
| 1169 | |
| 1170 | |
nethercote | 996901a | 2004-08-03 13:29:09 +0000 | [diff] [blame] | 1171 | /* Leak detector for this tool. We don't actually do anything, merely |
sewardj | a449568 | 2002-10-21 07:29:59 +0000 | [diff] [blame] | 1172 | run the generic leak detector with suitable parameters for this |
nethercote | 996901a | 2004-08-03 13:29:09 +0000 | [diff] [blame] | 1173 | tool. */ |
njn | b8dca86 | 2005-03-14 02:42:44 +0000 | [diff] [blame] | 1174 | static void ac_detect_memory_leaks ( ThreadId tid, LeakCheckMode mode ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1175 | { |
njn | b8dca86 | 2005-03-14 02:42:44 +0000 | [diff] [blame] | 1176 | MAC_(do_detect_memory_leaks) ( tid, mode, ac_is_valid_64k_chunk, ac_is_valid_address ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1177 | } |
| 1178 | |
| 1179 | |
| 1180 | /* --------------------------------------------------------------------- |
| 1181 | Sanity check machinery (permanently engaged). |
| 1182 | ------------------------------------------------------------------ */ |
| 1183 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 1184 | Bool TL_(cheap_sanity_check) ( void ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1185 | { |
jseward | 9800fd3 | 2004-01-04 23:08:04 +0000 | [diff] [blame] | 1186 | /* nothing useful we can rapidly check */ |
| 1187 | return True; |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1188 | } |
| 1189 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 1190 | Bool TL_(expensive_sanity_check) ( void ) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1191 | { |
| 1192 | Int i; |
| 1193 | |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 1194 | #if 0 |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1195 | /* Make sure nobody changed the distinguished secondary. */ |
| 1196 | for (i = 0; i < 8192; i++) |
| 1197 | if (distinguished_secondary_map.abits[i] != VGM_BYTE_INVALID) |
| 1198 | return False; |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 1199 | #endif |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1200 | |
| 1201 | /* Make sure that the upper 3/4 of the primary map hasn't |
| 1202 | been messed with. */ |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 1203 | for (i = PRIMARY_SIZE; i < PRIMARY_SIZE*4; i++) |
| 1204 | if (primary_map[i] != DSM_NOTADDR) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1205 | return False; |
| 1206 | |
| 1207 | return True; |
| 1208 | } |
| 1209 | |
njn | 47363ab | 2003-04-21 13:24:40 +0000 | [diff] [blame] | 1210 | /*------------------------------------------------------------*/ |
| 1211 | /*--- Client requests ---*/ |
| 1212 | /*------------------------------------------------------------*/ |
| 1213 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 1214 | Bool TL_(handle_client_request) ( ThreadId tid, UWord* arg, UWord *ret ) |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1215 | { |
sewardj | bf310d9 | 2002-12-28 13:09:57 +0000 | [diff] [blame] | 1216 | #define IGNORE(what) \ |
| 1217 | do { \ |
| 1218 | if (moans-- > 0) { \ |
| 1219 | VG_(message)(Vg_UserMsg, \ |
| 1220 | "Warning: Addrcheck: ignoring `%s' request.", what); \ |
| 1221 | VG_(message)(Vg_UserMsg, \ |
nethercote | 137bc55 | 2003-11-14 17:47:54 +0000 | [diff] [blame] | 1222 | " To honour this request, rerun with --tool=memcheck."); \ |
sewardj | bf310d9 | 2002-12-28 13:09:57 +0000 | [diff] [blame] | 1223 | } \ |
| 1224 | } while (0) |
| 1225 | |
sewardj | bf310d9 | 2002-12-28 13:09:57 +0000 | [diff] [blame] | 1226 | static Int moans = 3; |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1227 | |
| 1228 | /* Overload memcheck client reqs */ |
njn | fc26ff9 | 2004-11-22 19:12:49 +0000 | [diff] [blame] | 1229 | if (!VG_IS_TOOL_USERREQ('M','C',arg[0]) |
sewardj | d62e03b | 2004-12-10 12:01:14 +0000 | [diff] [blame] | 1230 | && VG_USERREQ__MALLOCLIKE_BLOCK != arg[0] |
| 1231 | && VG_USERREQ__FREELIKE_BLOCK != arg[0] |
| 1232 | && VG_USERREQ__CREATE_MEMPOOL != arg[0] |
| 1233 | && VG_USERREQ__DESTROY_MEMPOOL != arg[0] |
| 1234 | && VG_USERREQ__MEMPOOL_ALLOC != arg[0] |
| 1235 | && VG_USERREQ__MEMPOOL_FREE != arg[0]) |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1236 | return False; |
| 1237 | |
| 1238 | switch (arg[0]) { |
| 1239 | case VG_USERREQ__DO_LEAK_CHECK: |
njn | b8dca86 | 2005-03-14 02:42:44 +0000 | [diff] [blame] | 1240 | ac_detect_memory_leaks(tid, arg[1] ? LC_Summary : LC_Full); |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1241 | *ret = 0; /* return value is meaningless */ |
| 1242 | break; |
| 1243 | |
sewardj | bf310d9 | 2002-12-28 13:09:57 +0000 | [diff] [blame] | 1244 | /* Ignore these */ |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1245 | case VG_USERREQ__CHECK_WRITABLE: /* check writable */ |
sewardj | bf310d9 | 2002-12-28 13:09:57 +0000 | [diff] [blame] | 1246 | IGNORE("VALGRIND_CHECK_WRITABLE"); |
| 1247 | return False; |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1248 | case VG_USERREQ__CHECK_READABLE: /* check readable */ |
sewardj | bf310d9 | 2002-12-28 13:09:57 +0000 | [diff] [blame] | 1249 | IGNORE("VALGRIND_CHECK_READABLE"); |
| 1250 | return False; |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1251 | case VG_USERREQ__MAKE_NOACCESS: /* make no access */ |
sewardj | bf310d9 | 2002-12-28 13:09:57 +0000 | [diff] [blame] | 1252 | IGNORE("VALGRIND_MAKE_NOACCESS"); |
| 1253 | return False; |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1254 | case VG_USERREQ__MAKE_WRITABLE: /* make writable */ |
sewardj | bf310d9 | 2002-12-28 13:09:57 +0000 | [diff] [blame] | 1255 | IGNORE("VALGRIND_MAKE_WRITABLE"); |
| 1256 | return False; |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1257 | case VG_USERREQ__MAKE_READABLE: /* make readable */ |
sewardj | bf310d9 | 2002-12-28 13:09:57 +0000 | [diff] [blame] | 1258 | IGNORE("VALGRIND_MAKE_READABLE"); |
| 1259 | return False; |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1260 | case VG_USERREQ__DISCARD: /* discard */ |
sewardj | bf310d9 | 2002-12-28 13:09:57 +0000 | [diff] [blame] | 1261 | IGNORE("VALGRIND_CHECK_DISCARD"); |
| 1262 | return False; |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1263 | |
| 1264 | default: |
nethercote | d1b64b2 | 2004-11-04 18:22:28 +0000 | [diff] [blame] | 1265 | if (MAC_(handle_common_client_requests)(tid, arg, ret )) { |
njn | 47363ab | 2003-04-21 13:24:40 +0000 | [diff] [blame] | 1266 | return True; |
| 1267 | } else { |
| 1268 | VG_(message)(Vg_UserMsg, |
nethercote | d1b64b2 | 2004-11-04 18:22:28 +0000 | [diff] [blame] | 1269 | "Warning: unknown addrcheck client request code %llx", |
| 1270 | (ULong)arg[0]); |
njn | 47363ab | 2003-04-21 13:24:40 +0000 | [diff] [blame] | 1271 | return False; |
| 1272 | } |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1273 | } |
| 1274 | return True; |
sewardj | bf310d9 | 2002-12-28 13:09:57 +0000 | [diff] [blame] | 1275 | |
| 1276 | #undef IGNORE |
sewardj | d8033d9 | 2002-12-08 22:16:58 +0000 | [diff] [blame] | 1277 | } |
| 1278 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1279 | /*------------------------------------------------------------*/ |
| 1280 | /*--- Setup ---*/ |
| 1281 | /*------------------------------------------------------------*/ |
| 1282 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 1283 | Bool TL_(process_cmd_line_option)(Char* arg) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1284 | { |
njn | 43c799e | 2003-04-08 00:08:52 +0000 | [diff] [blame] | 1285 | return MAC_(process_common_cmd_line_option)(arg); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1286 | } |
| 1287 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 1288 | void TL_(print_usage)(void) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1289 | { |
njn | 3e88418 | 2003-04-15 13:03:23 +0000 | [diff] [blame] | 1290 | MAC_(print_common_usage)(); |
| 1291 | } |
| 1292 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 1293 | void TL_(print_debug_usage)(void) |
njn | 3e88418 | 2003-04-15 13:03:23 +0000 | [diff] [blame] | 1294 | { |
| 1295 | MAC_(print_common_debug_usage)(); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1296 | } |
| 1297 | |
| 1298 | |
| 1299 | /*------------------------------------------------------------*/ |
| 1300 | /*--- Setup ---*/ |
| 1301 | /*------------------------------------------------------------*/ |
| 1302 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 1303 | void TL_(pre_clo_init)(void) |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1304 | { |
njn | 810086f | 2002-11-14 12:42:47 +0000 | [diff] [blame] | 1305 | VG_(details_name) ("Addrcheck"); |
| 1306 | VG_(details_version) (NULL); |
| 1307 | VG_(details_description) ("a fine-grained address checker"); |
| 1308 | VG_(details_copyright_author)( |
njn | 5361242 | 2005-03-12 16:22:54 +0000 | [diff] [blame] | 1309 | "Copyright (C) 2002-2005, and GNU GPL'd, by Julian Seward et al."); |
nethercote | 421281e | 2003-11-20 16:20:55 +0000 | [diff] [blame] | 1310 | VG_(details_bug_reports_to) (VG_BUGS_TO); |
sewardj | 78210aa | 2002-12-01 02:55:46 +0000 | [diff] [blame] | 1311 | VG_(details_avg_translation_sizeB) ( 135 ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1312 | |
njn | 810086f | 2002-11-14 12:42:47 +0000 | [diff] [blame] | 1313 | VG_(needs_core_errors) (); |
njn | 95ec870 | 2004-11-22 16:46:13 +0000 | [diff] [blame] | 1314 | VG_(needs_tool_errors) (); |
njn | 810086f | 2002-11-14 12:42:47 +0000 | [diff] [blame] | 1315 | VG_(needs_libc_freeres) (); |
njn | 810086f | 2002-11-14 12:42:47 +0000 | [diff] [blame] | 1316 | VG_(needs_command_line_options)(); |
| 1317 | VG_(needs_client_requests) (); |
njn | 810086f | 2002-11-14 12:42:47 +0000 | [diff] [blame] | 1318 | VG_(needs_sanity_checks) (); |
fitzhardinge | 98abfc7 | 2003-12-16 02:05:15 +0000 | [diff] [blame] | 1319 | VG_(needs_shadow_memory) (); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1320 | |
njn | 3e88418 | 2003-04-15 13:03:23 +0000 | [diff] [blame] | 1321 | MAC_( new_mem_heap) = & ac_new_mem_heap; |
| 1322 | MAC_( ban_mem_heap) = & ac_make_noaccess; |
| 1323 | MAC_(copy_mem_heap) = & ac_copy_address_range_state; |
| 1324 | MAC_( die_mem_heap) = & ac_make_noaccess; |
sewardj | ecf8e10 | 2003-07-12 12:11:39 +0000 | [diff] [blame] | 1325 | MAC_(check_noaccess) = & ac_check_noaccess; |
njn | 3e88418 | 2003-04-15 13:03:23 +0000 | [diff] [blame] | 1326 | |
fitzhardinge | 98abfc7 | 2003-12-16 02:05:15 +0000 | [diff] [blame] | 1327 | VG_(init_new_mem_startup) ( & ac_new_mem_startup ); |
| 1328 | VG_(init_new_mem_stack_signal) ( & ac_make_accessible ); |
| 1329 | VG_(init_new_mem_brk) ( & ac_make_accessible ); |
sewardj | b5f6f51 | 2005-03-10 23:59:00 +0000 | [diff] [blame] | 1330 | VG_(init_new_mem_mmap) ( & ac_new_mem_mmap ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1331 | |
fitzhardinge | 98abfc7 | 2003-12-16 02:05:15 +0000 | [diff] [blame] | 1332 | VG_(init_copy_mem_remap) ( & ac_copy_address_range_state ); |
njn | 3e88418 | 2003-04-15 13:03:23 +0000 | [diff] [blame] | 1333 | |
fitzhardinge | 98abfc7 | 2003-12-16 02:05:15 +0000 | [diff] [blame] | 1334 | VG_(init_die_mem_stack_signal) ( & ac_make_noaccess ); |
| 1335 | VG_(init_die_mem_brk) ( & ac_make_noaccess ); |
| 1336 | VG_(init_die_mem_munmap) ( & ac_make_noaccess ); |
njn | 3e88418 | 2003-04-15 13:03:23 +0000 | [diff] [blame] | 1337 | |
fitzhardinge | 98abfc7 | 2003-12-16 02:05:15 +0000 | [diff] [blame] | 1338 | VG_(init_new_mem_stack_4) ( & MAC_(new_mem_stack_4) ); |
| 1339 | VG_(init_new_mem_stack_8) ( & MAC_(new_mem_stack_8) ); |
| 1340 | VG_(init_new_mem_stack_12) ( & MAC_(new_mem_stack_12) ); |
| 1341 | VG_(init_new_mem_stack_16) ( & MAC_(new_mem_stack_16) ); |
| 1342 | VG_(init_new_mem_stack_32) ( & MAC_(new_mem_stack_32) ); |
| 1343 | VG_(init_new_mem_stack) ( & MAC_(new_mem_stack) ); |
njn | 9b007f6 | 2003-04-07 14:40:25 +0000 | [diff] [blame] | 1344 | |
fitzhardinge | 98abfc7 | 2003-12-16 02:05:15 +0000 | [diff] [blame] | 1345 | VG_(init_die_mem_stack_4) ( & MAC_(die_mem_stack_4) ); |
| 1346 | VG_(init_die_mem_stack_8) ( & MAC_(die_mem_stack_8) ); |
| 1347 | VG_(init_die_mem_stack_12) ( & MAC_(die_mem_stack_12) ); |
| 1348 | VG_(init_die_mem_stack_16) ( & MAC_(die_mem_stack_16) ); |
| 1349 | VG_(init_die_mem_stack_32) ( & MAC_(die_mem_stack_32) ); |
| 1350 | VG_(init_die_mem_stack) ( & MAC_(die_mem_stack) ); |
njn | 9b007f6 | 2003-04-07 14:40:25 +0000 | [diff] [blame] | 1351 | |
fitzhardinge | 98abfc7 | 2003-12-16 02:05:15 +0000 | [diff] [blame] | 1352 | VG_(init_ban_mem_stack) ( & ac_make_noaccess ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1353 | |
fitzhardinge | 98abfc7 | 2003-12-16 02:05:15 +0000 | [diff] [blame] | 1354 | VG_(init_pre_mem_read) ( & ac_check_is_readable ); |
| 1355 | VG_(init_pre_mem_read_asciiz) ( & ac_check_is_readable_asciiz ); |
| 1356 | VG_(init_pre_mem_write) ( & ac_check_is_writable ); |
njn | abb14ad | 2004-11-24 16:57:16 +0000 | [diff] [blame] | 1357 | VG_(init_post_mem_write) ( & ac_post_mem_write ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1358 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1359 | VGP_(register_profile_event) ( VgpSetMem, "set-mem-perms" ); |
| 1360 | VGP_(register_profile_event) ( VgpCheckMem, "check-mem-perms" ); |
njn | 9b007f6 | 2003-04-07 14:40:25 +0000 | [diff] [blame] | 1361 | VGP_(register_profile_event) ( VgpESPAdj, "adjust-ESP" ); |
njn | d04b7c6 | 2002-10-03 14:05:52 +0000 | [diff] [blame] | 1362 | |
| 1363 | init_shadow_memory(); |
njn | 3e88418 | 2003-04-15 13:03:23 +0000 | [diff] [blame] | 1364 | MAC_(common_pre_clo_init)(); |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 1365 | } |
| 1366 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 1367 | void TL_(post_clo_init) ( void ) |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 1368 | { |
| 1369 | } |
| 1370 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 1371 | void TL_(fini) ( Int exitcode ) |
njn | 5c004e4 | 2002-11-18 11:04:50 +0000 | [diff] [blame] | 1372 | { |
njn | 3e88418 | 2003-04-15 13:03:23 +0000 | [diff] [blame] | 1373 | MAC_(common_fini)( ac_detect_memory_leaks ); |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1374 | } |
| 1375 | |
njn | 26f0251 | 2004-11-22 18:33:15 +0000 | [diff] [blame] | 1376 | VG_DETERMINE_INTERFACE_VERSION(TL_(pre_clo_init), 1./8) |
fitzhardinge | 98abfc7 | 2003-12-16 02:05:15 +0000 | [diff] [blame] | 1377 | |
| 1378 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1379 | /*--------------------------------------------------------------------*/ |
njn25 | cac76cb | 2002-09-23 11:21:57 +0000 | [diff] [blame] | 1380 | /*--- end ac_main.c ---*/ |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 1381 | /*--------------------------------------------------------------------*/ |