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gerrit-public.fairphone.software / platform / external / valgrind / 06c2573cc942742709da524b5f19126b9adbced0
  1. 06c2573 Remove unused computations. Spotted by Coverity. by florian · 9 years ago
  2. 095b4cb * Fix ubsan failures in mullS64 due to signed integer overflow. by sewardj · 9 years ago
  3. a52a638 mips64: do not use 64-bit loads for lwl/lwr instructions by petarj · 9 years ago
  4. 36f940a Fix a few undefined shift operations as spotted by ubsan. by florian · 9 years ago
  5. 7ffce01 * x86: on an SSE2 only host, Valgrind in 32 bits now claims to be a Pentium 4. by philippe · 9 years ago
  6. 6d7c8e4 A SSE2 only CPU was reported to the guest as a SSE3 CPU. by philippe · 9 years ago
  7. 94318d0 mips64: add support for Cavium LHX by petarj · 9 years ago
  8. 24e0c13 Just a dummy white space change to record the fact that in by florian · 9 years ago
  9. bc2c60d Fix a condition that was always true. Found by cppcheck. See BZ #348565. by florian · 9 years ago
  10. b6bea7d Opps, missed a change in the previous patch. Forgot to remove the format by carll · 9 years ago
  11. 646a4fa The dcbt and dcbtst instructions provide a non-zero hint that describes by carll · 9 years ago
  12. d937beb Bug #348247. Fix SUBQ 0, long long sub/cmp, then O (overflow) case. by mjw · 9 years ago
  13. 5434227 Cleanups to allow compilation with -Wold-style-declaration. by florian · 9 years ago
  14. 0c4e9e8 Improve the error messages for the PPC platform to be more clear when Valgrind detects that by carll · 9 years ago
  15. 80d145c Remove VexGuestTILEGXStateAlignment as the guest state size of any architecture by florian · 9 years ago
  16. 486db12 Add support for the TEXASRU register. This register contains information on by carll · 9 years ago
  17. e054218 Add spec rules for EQ, MI, PL, GT and LE after COPY. These result by sewardj · 9 years ago
  18. 999ef56 Fix for an error in the stq, stqcx, lqarx and lq instructions with LE. by carll · 9 years ago
  19. d826889 Add support for the lbarx, lharx, stbcx and sthcs instructions. by carll · 9 years ago
  20. bc6db6e The vbpermq for Powerpc64 big endian has the same issue as the little by carll · 9 years ago
  21. 256df59 The following regression tests failures occur on PPC64 little endian only. by carll · 9 years ago
  22. 009b5fc Add Iop_Add8, Iop_Add16 and other 8 or 16 bit ALU Iop in the host_tilegx_isel.c by zliu · 9 years ago
  23. f2349b7 Removed "extern" by zliu · 9 years ago
  24. 32bf413 Removed #if __tilegx__ ... #endif in guest_tilegx_toIR.c by zliu · 9 years ago
  25. b597f20 Fix the evCheck assertion for TileGX by zliu · 9 years ago
  26. 6faff00 Remove unused function "lshift". by sewardj · 9 years ago
  27. 7e5aa0d VEX side for revision 15084 (multi arch testing) by philippe · 9 years ago
  28. 0de8019 Add a port to Linux/TileGx. Zhi-Gang Liu (zliu@tilera.com) VEX aspects. by sewardj · 9 years ago
  29. 012d5f5 Fix a typo in the example given in the comment by philippe · 9 years ago
  30. 8bb1c9e x86 front and back ends: track vex r3120, which changed the type of by sewardj · 9 years ago
  31. cd4637e amd64 front and back ends: track the change of type of Iop_Sqrt32Fx4 by sewardj · 9 years ago
  32. 4b21c3d arm64: implement FSQRT 2d_2d, 4s_4s, 2s_2s by sewardj · 9 years ago
  33. 2130b34 arm64: add support for the following insns. This completes support by sewardj · 9 years ago
  34. a2cdc9f Tweak STATIC_ASSERT such that there is no warning about an unused by florian · 9 years ago
  35. f886165 Add the standard end of the file marker used elsewhere by philippe · 9 years ago
  36. 6941bc8 Improve comments, add the copyright notice by philippe · 9 years ago
  37. 12b2b5b This patch reduces the size of all tools by about 2MB of text by philippe · 9 years ago
  38. bc0b722 arm64: add support for FCVT{N,M,A,P,Z}{S,U} 2d_2d, 4s_4s, 2s_2s by sewardj · 9 years ago
  39. 400d6b9 arm64: add support for by sewardj · 9 years ago
  40. 3738bfc Add IR level support for 16 bit floating point types (Ity_F16) and add by sewardj · 9 years ago
  41. 1996df0 Add STATIC_ASSERT. Remove VG__STRING. by florian · 9 years ago
  42. a2f370a mips64: extract correct immediate value for Cavium SEQI and SNEI by petarj · 9 years ago
  43. a5b5022 Bug 345215 - Performance improvements for the register allocator by sewardj · 9 years ago
  44. 5775c3c Minor updates to deal with mips32 and mips64. by sewardj · 9 years ago
  45. 514a3b9 Add source dependencies, and improve the 'clean' target. by sewardj · 9 years ago
  46. dee60ed Add z13 (s390). by florian · 9 years ago
  47. d8e3eca r2974 moved the inline definition of LibVEX_Alloc from libvex.h by florian · 9 years ago
  48. 65eec5e Fix build problems. The code has been bitrotting for some time. by florian · 9 years ago
  49. 45f8de6 Fix two undefined behaviours found by ubsan. by florian · 9 years ago
  50. 2f93145 Fix for bugzilla 343597 - ppc64le: incorrect use of offseof macro by carll · 9 years ago
  51. 108e03f Fix a few undefined behaviours that were found by compiling valgrind by florian · 9 years ago
  52. 9edbbd9 Fix problems due to generating Neon instructions on non-Neon capable hosts: by sewardj · 9 years ago
  53. 16caded Add machinery to try and transform A ^ ((A ^ B) & M) into (A ^ ~M) | (B & M). by sewardj · 9 years ago
  54. 2608c69 Enhance the CSE pass so it can common up loads from memory. Disabled by sewardj · 9 years ago
  55. 581cf07 Tidy up of CSE. Create functions irExpr_to_TmpOrConst, by sewardj · 9 years ago
  56. 9e2a008 fold_Expr: add rules Xor8/16/32/64(0,t) ==> t Xor8/16/32/64(t,0) ==> t by sewardj · 9 years ago
  57. f4edb1d arm64: enable all remaining cases in the by sewardj · 9 years ago
  58. 89cefe4 arm64: implement: by sewardj · 9 years ago
  59. 5074b49 Add symbolic constant LibVEX_GUEST_STATE_ALIGN. Use it. by florian · 9 years ago
  60. 8cf6637 Remove an unused macro (which also had undefined behaviours). by florian · 9 years ago
  61. 6a785df Implement FP instructions: by sewardj · 9 years ago
  62. ee3db33 Implement all remaining FP multiple style instructions: by sewardj · 9 years ago
  63. 5cb53e7 Implement all remaining FP min/max style instructions: by sewardj · 9 years ago
  64. 13830dc Implement all remaining FP compare instructions: by sewardj · 9 years ago
  65. 6d5985e Enable FCVTMU Xd,Sn. Fixes #343332. by sewardj · 9 years ago
  66. ca2c3c7 Make a very minor change to the LibVEX_Translate interface (sub-arg of by sewardj · 9 years ago
  67. 18bf154 Fix bug 343802. We need to handle one more special case in the spechelper by cborntra · 9 years ago
  68. 66a5e81 guest_amd64_spechelper: by sewardj · 9 years ago
  69. c8ca773 dis_VMASKMOV: create per-lane transfer/no-transfer guard expressions by sewardj · 9 years ago
  70. 75ba130 Fix hwcaps validity checking for x86. by florian · 9 years ago
  71. d8a2bcb ppIRStoreG: print braces around guarded section, so as to be more by sewardj · 9 years ago
  72. 40ad9b3 Implement AVX-1 conditional vector stores: VMASKMOVP{D,S} xmm/ymm to memory. by sewardj · 9 years ago
  73. 6f1ec58 Use IR conditional stores (IRStoreG) to implement AVX-2 conditional by sewardj · 9 years ago
  74. e357c67 Change AMD64Instr_CMov64 so that the source can only be a register by sewardj · 9 years ago
  75. bdea550 AMD64 front end: translate AVX2 PMASKMOV load instructions (vector by sewardj · 9 years ago
  76. 802bbae Add ILGop_Ident64 to enum type IRLoadGOp so as to make it by sewardj · 9 years ago
  77. 79459e3 Fix an assert. Unbreak build on 32-bit platforms. by florian · 9 years ago
  78. d749c7a Add an assert to check that we're getting the expected alignment. by florian · 9 years ago
  79. 7ce2cc8 The size of an event check never depends on the endianess by florian · 9 years ago
  80. 2322360 Clean up a few leftovers from the AIX port which no longer exists. by florian · 9 years ago
  81. 93a0974 Remove the definitons of Ptr_to_ULong and ULong_to_Ptr. by florian · 9 years ago
  82. a672d19 The following two lines of code always convert the 64-bit pointer to a 32-bit by carll · 9 years ago
  83. 471d006 Fix assert by philippe · 9 years ago
  84. 4047e01 Fixed missing ULL on constants per compiler warnings: by carll · 9 years ago
  85. 44a1471 Fix an incorrect truncation of an address value to 32 bits. by florian · 9 years ago
  86. bdf99f0 Change remaining use of Addr64 in the VEX API to Addr. The reduces by florian · 9 years ago
  87. dcd6d23 Change the IMark statement. The address is now type Addr and the by florian · 10 years ago
  88. 8e2d971 The length of a disassemnled insn is always positive. by florian · 10 years ago
  89. 0eaa35f Give DisResult::continueAt Addr type. by florian · 10 years ago
  90. d4cc0de Make VexTranslateArgs::guest_bytes_addr an Addr value. Fix ripple. by florian · 10 years ago
  91. 43cc179 Synch compiler flags with those in valgrind's Makefile.all.am. Add -std=gnu99. by florian · 10 years ago
  92. beac530 It has long been assumed that host and guest architectures by florian · 10 years ago
  93. a0ef1de As a library, VEX should not export the offsetof and vg_alignof by florian · 10 years ago
  94. 9190bef Add a missing header file. by florian · 10 years ago
  95. 04fc6b1 Change a few prototypes to use SizeT. Also, offsetof returns a SizeT value. by florian · 10 years ago
  96. c66ba65 Add type SizeT (moved here from valgrind's pub_tool_basics.h). by florian · 10 years ago
  97. dc36943 Remove a few dead assignments. by florian · 10 years ago
  98. 8a45a4e Audit a buffer. by florian · 10 years ago
  99. e2cc4de Fix 197259 Unsupported arch_prtctl PR_SET_GS option by philippe · 10 years ago
  100. 5665ca3 Remove quote.txt and newline.txt as they are no longer needed. by florian · 10 years ago