- 09f4155 x86 guest: implement SSE1 movaps G -> E (stores) by sewardj · 20 years ago
- fa89fdc #if 0 some unused fns in an attempt to reduce the noise level from gcc. by sewardj · 20 years ago
- 5edfc26 Give different emulation warnings for setting of %mxcsr.fz and %mxcsr.daz. by sewardj · 20 years ago
- 519d66f Fixes to get gsl-1.5 regressions to work with icc-8.0 -xK (SSE1) by sewardj · 20 years ago
- dee0867 fixed oldFlagC usage by cerion · 20 years ago
- b64821b Fix push/pop/load/store of segment registers. by sewardj · 20 years ago
- 9ee8286 * x86 host: make SSE spills/restores work by sewardj · 20 years ago
- c819ec1 Improve redundant-PutI elimination a bit, so it is not completely by sewardj · 20 years ago
- 1d8ce20 Even more folding rules. by sewardj · 20 years ago
- 52444cb Mechanism for dealing with failures of instruction decodes, and also by sewardj · 20 years ago
- 3bd6f3e x86 guest: simulate LDT/GDT enough that code using segment override by sewardj · 20 years ago
- 3701059 Folding rule for Iop_64to32. by sewardj · 20 years ago
- 2e38386 x86 guest/host: fix enough 128-bit vector stuff that memcheck works for by sewardj · 20 years ago
- 109ffdb x86 host: Stuff in support of memchecking of 64x2 vector FP. by sewardj · 20 years ago
- a0037df Stuff needed for Memcheck of SSE1 instructions. by sewardj · 20 years ago
- 060c542 Dealt with more 'unpredictables' (all of them?) by cerion · 20 years ago
- 70f676d More support for memchecking 128-bit SIMD code. by sewardj · 20 years ago
- a512a65 Dealt with undefined instr's properly by cerion · 20 years ago
- ce57cd2 added padding to VexGuestArmState by cerion · 20 years ago
- 19e8a61 Finished dis_branch, so we get IR code for a complete bb now - yay! by cerion · 20 years ago
- 9e20359 Finish almost all SSE2 integer instructions. (!) by sewardj · 20 years ago
- b9fa69b x86 host/guest: SSE2 integer shifts and subtracts by sewardj · 20 years ago
- f7da63d by cerion · 20 years ago
- e5854d6 x86 guest/host: implement a whole bunch of SSE2 integer insns by sewardj · 20 years ago
- 164f927 IR level for support of 128 integer SIMD operations. Use this to do by sewardj · 20 years ago
- f13f37b Delete commented-out bits of the old UCode insn decoder. by sewardj · 20 years ago
- 008754b x86 guest: finish SSE2 floating point insns. by sewardj · 20 years ago
- c2feffc x86 guest: another stack of SSE2 insns. by sewardj · 20 years ago
- fd22645 x86 guest: Implement a whole bunch of SSE2 instructions, mostly by sewardj · 20 years ago
- 07358c0 Redundant-Get elimination: only do the substitution when the types by sewardj · 20 years ago
- 636ad76 Copy-n-paste 32x4 floating point stuff into 64x2 floating point stuff so by sewardj · 20 years ago
- 7df596b x86 guest: Implement various insns: by sewardj · 20 years ago
- 0181665 Tests for x86 fldenv/fstenv; also fix error in frstor test. by sewardj · 20 years ago
- 58c87fc Program for testing setting of MXCSR. by sewardj · 20 years ago
- 35579be Fix bug exposed by improved insn_sse test. by sewardj · 20 years ago
- 4e1fa9f Another test case, containing a lot of FP code, which generally stresses by sewardj · 20 years ago
- 7ec7d73 Move to new place. by sewardj · 20 years ago
- da4ab7d Contains most fpu, mmx and sse1 insns. by sewardj · 20 years ago
- d7385e5 Place for storing x86 original code files. by sewardj · 20 years ago
- 855f32d Make small procedures to add/sub small amounts from esp. by sewardj · 20 years ago
- c1e7dfc Finish SSE1 instructions! Finallyatlast. by sewardj · 20 years ago
- 129b3d9 Fix a load of confusion with SSE scalar float insns and memory. by sewardj · 20 years ago
- 0bd7ce6 Even more SSE insns. by sewardj · 20 years ago
- b545208 x86 host/guest: even more SSE instructions by sewardj · 20 years ago
- 3bca906 Rationalisation/cleanup of float to/from int conversions and rounding by sewardj · 20 years ago
- 9636b44 x86 guest/host: a whole bunch more SSE instructions. by sewardj · 20 years ago
- 176a59c Add a bunch of easy SSE insns. by sewardj · 20 years ago
- 4cb918d Mucho messing around with x86 FP/SSE rounding modes etc. As a result by sewardj · 20 years ago
- a70a37b cleaned up dis_mov & dis_shift_lsl, and made a stab at dis_ldm_stm: load/store multiple by cerion · 20 years ago
- fb183d2 Try to reduce the number of warnings gcc gives. by sewardj · 20 years ago
- fd7474a trying to get shift_lsl to work + cleaned up a little by cerion · 20 years ago
- 6cd9163 Add another comment and actually complete the commit message :-) by sewardj · 20 years ago
- cca7194 Try to answer a few q by sewardj · 20 years ago
- c60c01e Ceri's first attempts at figuring out what the heck is going on! by cerion · 20 years ago
- 67e002d x86 guest/host: do SSE comiss instruction by sewardj · 20 years ago
- 1e6ad74 x86 guest/host: do SSE comparisons. by sewardj · 20 years ago
- d08f2d7 x86 host: make a start on SSE code generation. by sewardj · 20 years ago
- 4a31b26 In the back end, rename the register classes (in enum HRegClass) more by sewardj · 20 years ago
- c9a4366 Make a start on SSE for x86 guest. by sewardj · 20 years ago
- 9c6acb0 by njn · 20 years ago
- a2498ac Loop unroller: do not unroll loops in which the conditional branch is by sewardj · 20 years ago
- 70dff0c Add -Wmissing-prototypes as a flag. by sewardj · 20 years ago
- d01a963 guest x86: fix x87 FP rounding modes enough so that by sewardj · 20 years ago
- feeb8a8 guest x87: Add enough x87 FP gunk to get through by sewardj · 20 years ago
- d93ee4c Make Valgrind's AMD64 and ARM ports compile again. by njn · 20 years ago
- 893aada Create a new mechanism: "emulation warnings", which is a way for Vex by sewardj · 20 years ago
- 95f7386 Added %rip to the AMD64 guest state. by njn · 20 years ago
- 4ba6ed0 x86g_dirtyhelper_CPUID: Claim to be a P55C (Intel Pentium/MMX) by sewardj · 20 years ago
- 2b7a920 x86 guest: finish off MMX instructions. Blargh. by sewardj · 20 years ago
- 9fc9e78 x86 guest: implement fsave/frstor instructions by sewardj · 20 years ago
- c4278f4 Make VEX define the special thread-return-code values it uses. by sewardj · 20 years ago
- 43126d4 Handle Ijk_Yield properly. This fixes V regtest "none/tests/yield". by sewardj · 20 years ago
- 43b8df1 Implement "rep nop" (P4 pause). by sewardj · 20 years ago
- cb7a96f Test driver stuff for arm. by sewardj · 20 years ago
- 33dba64 Build stuff for arm. by sewardj · 20 years ago
- c2c8716 Add a skeletal ARM insn decoder. by sewardj · 20 years ago
- 2a9ad02 Start adding some ARM guest infrastructure stuff, but as a result get by sewardj · 20 years ago
- e77b88b Add a pseudo-guest-register to hold the 'next syscall number.' by sewardj · 20 years ago
- 285f22c Make Vex less verbose, so regression tests pass again. by njn · 20 years ago
- 9a7b75d Make a start on a guest state definition for AMD64. by sewardj · 20 years ago
- f27e1db Do 32Uto64. by sewardj · 20 years ago
- d584f8f by sewardj · 20 years ago
- 810dcf0 Make VEX's "Char" type always be signed, so as to bring it into line by sewardj · 20 years ago
- 8fc9374 gcc-2.95 build fixes. by sewardj · 20 years ago
- da771f5 rec_alloc.c is defunct; reg_alloc2.c replaced it a while back. by sewardj · 20 years ago
- aee11b5 Fix behaviour so that out-of-range shifts behave the same as on a PIII. by sewardj · 20 years ago
- dc67c62 Test each insn 25000 times with random data, rather than just once or twice. by sewardj · 20 years ago
- 81f017c Fix various failings in the MMX simulation code. by sewardj · 20 years ago
- 8d14a59 Add MMX shift-by-vector (not correct yet). by sewardj · 20 years ago
- b4acca5 Complete MMX and/or/xor/andn. by sewardj · 20 years ago
- 63ba409 Implement a bunch more MMX insns. by sewardj · 20 years ago
- 4340dac Some more MMX insns. by sewardj · 20 years ago
- 464efa4 Partial support for MMX, using a low-performance scheme. by sewardj · 20 years ago
- c3a4ecb An MMX test program. by sewardj · 20 years ago
- c8882fe Nuke this useless bunch of tests. by sewardj · 20 years ago
- 9e7448b Restore ability to run with no instrumentation. by sewardj · 20 years ago
- b9457c3 CSE enhancements: handle binop(const,temp), and get rid of by sewardj · 20 years ago
- 108b301 x86 guest: finally redo marshalling of register-passed parameters so by sewardj · 20 years ago
- 14d3ddf Use improved 80 <-> 64 bit FP conversion routines, as developed in by sewardj · 20 years ago
- b298562 Further improve accuracy of 80->64 bit conversions, by rounding by sewardj · 20 years ago