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gerrit-public.fairphone.software / platform / external / valgrind / 2d258d88bb76dc2bb33230d1b2aba60460d3802e
  1. 2d258d8 More copyright updates. by sewardj · 18 years ago
  2. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  3. 3be608d Specialisation rule which reduces memcheck false error rate for by sewardj · 18 years ago
  4. c5fd972 Comment-only change. by sewardj · 18 years ago
  5. b83767e Yet another %eflags folding rule - this one for performance reasons. by sewardj · 18 years ago
  6. cd90bfe ppc backend: handle vector constant of zero. by cerion · 18 years ago
  7. 6204590 Get rid of assertion getting in the way of handling 'sbbb G,E' where E by sewardj · 18 years ago
  8. 5328b10 Got a sudden attach of the implicit-type-casting paranoias whilst by sewardj · 18 years ago
  9. 346d9a1 A couple of IR simplification hacks for the amd64 front end, so as to by sewardj · 18 years ago
  10. 9088540 Clear up yet another gcc-4.1.0 stunt leading to false uninitialised by sewardj · 18 years ago
  11. 275ccdf A few more x86 eflags-helper rewrite cases, which further reduce the by sewardj · 18 years ago
  12. 89d89e9 Add an IR folding rule to convert Add32(x,x) into Shl32(x,1). This by sewardj · 18 years ago
  13. 54be8dd Add specialisation rules to simplify the IR for 'testl .. ; js ..', by sewardj · 18 years ago
  14. 1287ab4 Enable 'SHLDv imm8,Gv,Ev'. Fixes #126583. by sewardj · 18 years ago
  15. 5fadaf9 Enable 'sbb $imm,%al'. Fixes #126668. by sewardj · 18 years ago
  16. 3180446 Implement CLC/STC/CMC. Fixes #125651. by sewardj · 18 years ago
  17. 25d2386 (1) Fix longstanding bug causing erroneous register zeroing for 'btl'. by sewardj · 18 years ago
  18. fcff178 Support 'popw m16'. Fixes #126243. by sewardj · 18 years ago
  19. afd1639 Fix for 32-bit mode, as per comment. by sewardj · 18 years ago
  20. 413a468 Implement sthbrx. by sewardj · 18 years ago
  21. 40d8c09 Implement lhbrx. by sewardj · 18 years ago
  22. 6ba982f Fix incorrect behaviour of mov{s,z}bw (#126253). by sewardj · 18 years ago
  23. 8f07359 Counterpart to r1605: in the ppc insn selector, don't use the bits by sewardj · 18 years ago
  24. a5f55da Don't use the bits VexArchInfo.hwcaps to distinguish ppc32 and ppc64, by sewardj · 18 years ago
  25. ae84d78 Fix for instruction-decoding failures reported in #124499. by sewardj · 18 years ago
  26. 576f323 Allow 'repe scas' (possible fix for #124892). by sewardj · 18 years ago
  27. db85903 Implement amd64 pmaddwd for SSE2. by sewardj · 18 years ago
  28. f32d5a5 Add a function to set/clear the x86 carry flag. (untested) by sewardj · 18 years ago
  29. 5c5f72c Fix some segment register pushes/pops. by sewardj · 18 years ago
  30. 21bd7c7 upmerge r1597 (ppc32 needs a lot of spill slots sometimes) by sewardj · 18 years ago
  31. 879cee0 Move the helper function for x86 'fxtract' to g_generic_x87.c so by sewardj · 18 years ago
  32. 7c2d282 Implement fnstsw. by sewardj · 18 years ago
  33. d8862cf Fix debug printing. by sewardj · 18 years ago
  34. 3368e10 Implement fcmovnu. by sewardj · 18 years ago
  35. 8531768 Implement 3DNow! prefetch insn (prefetch, prefetchw). Fixes #120410. by sewardj · 18 years ago
  36. 0092e0d Handle byte-size 'xadd reg,mem'. Also, don't bomb out for the by sewardj · 18 years ago
  37. 72aefb2 Implement mtocrf/mfocrf. by sewardj · 18 years ago
  38. 1a866b4 Oops, stuff that should have been part of r1573 (4-arg primop change). by sewardj · 18 years ago
  39. 40c8026 Redo the way FP multiply-accumulate insns are done on ppc32/64. by sewardj · 18 years ago
  40. 2d19fe3 Word size fixes for twi/tdi (is trickier than it looks :-). Also add by sewardj · 18 years ago
  41. 334870d ppc32/64: handle twi/tdi (conditional trap) instructions by sewardj · 18 years ago
  42. 56de421 fre: observe the current rounding mode by sewardj · 18 years ago
  43. c3778a2 Redo x86g_calculate_FXTRACT to only use integer arithmetic. by sewardj · 18 years ago
  44. fa7fc6b Comment-only changes by sewardj · 18 years ago
  45. 4796d66 Fixups following recent FP rounding mode changes. by sewardj · 18 years ago
  46. 9b0cc58 Make the CSE pass more aggressive. It now commons up Mux0X and GetI by sewardj · 18 years ago
  47. f47286e More x86 tidying up following rounding changes. by sewardj · 18 years ago
  48. f1b5b1a Followup to r1562: fixes for x86 by sewardj · 18 years ago
  49. 1a3bfac Followup to r1562: fixes for ppc64 by sewardj · 18 years ago
  50. b183b85 by sewardj · 18 years ago
  51. 157b19b Do fre/fres in a way which makes minimal demands on the backend. by sewardj · 18 years ago
  52. 7bbac21 F64i isel fix. by sewardj · 18 years ago
  53. 79fd33f Handle fre and frsqrtes. Even though the IBM docs manage to by sewardj · 18 years ago
  54. 2ef8a37 Make lsw work in 64-bit mode. by sewardj · 18 years ago
  55. 3fd3967 Un-break ppc64 following recent hw-capabilities hackery. (sigh) by sewardj · 18 years ago
  56. 7c54586 Unbreak ppc32 following recent hw-capabilities hackery. by sewardj · 18 years ago
  57. 5117ce1 Change the way Vex represents architecture variants into something by sewardj · 18 years ago
  58. 09e88d1 Re-enable stfiwx. by sewardj · 18 years ago
  59. baf971a Handle ppc32/64 fres, frsqrte. by sewardj · 18 years ago
  60. c74373d In 32-bit mode, handle F64toI64 and I64toF64. by sewardj · 18 years ago
  61. 7fd5bb0 A bit more backend tidying: by sewardj · 18 years ago
  62. 92923de by sewardj · 18 years ago
  63. 6332740 C89 fixes. by sewardj · 18 years ago
  64. 2bb062d Tidy up the ppc instruction selector a bit. This is almost all cosmetic: by sewardj · 18 years ago
  65. 7c6dbff Comment-only change: remove commented out code (lots of), change by sewardj · 18 years ago
  66. 6be6723 Minor tweaks to handle instructions created by xlc 7.0. by sewardj · 18 years ago
  67. 870c84b Re-enable fsqrts. by sewardj · 18 years ago
  68. aa60ddf The ppc32 port ran itself out of spill slots on some heavy duty FP code. by sewardj · 18 years ago
  69. 5ff11dd More ppc64-only function wrapping hacks: by sewardj · 19 years ago
  70. 9dd9cf1 Add Ijk_EmFail, a new kind of IR block exit: an emulation failure by sewardj · 19 years ago
  71. cf8986c For ppc64, emit AbiHints from the front end so as to tell tools when by sewardj · 19 years ago
  72. c716aea Two different sets of changes (hard to disentangle): by sewardj · 19 years ago
  73. be482ae Give the ppc64 guest state a 16-entry pseudo-register array, by sewardj · 19 years ago
  74. 6e53088 Teach the ppc back end (64-bit mode only) how to deal with PutI and by sewardj · 19 years ago
  75. 1eb7e6b Update fn redirect/wrap hooks for ppc64. by sewardj · 19 years ago
  76. ce02aa7 Merge in function wrapping support from the FNWRAP branch. That by sewardj · 19 years ago
  77. 3e616e6 Implement clflush. by sewardj · 19 years ago
  78. e43bc88 ppc: deal with L flag properly for different sync forms. by cerion · 19 years ago
  79. 3ea49ee ppc: re-enable mtfsb1 instruction. by cerion · 19 years ago
  80. 7277be5 Fix magic-sequence spotting in 64-bit mode. by sewardj · 19 years ago
  81. 20f4061 Add missing function. by sewardj · 19 years ago
  82. dba87e2 ppc64 altivec: by cerion · 19 years ago
  83. 4c4f5ef Handle ppc64's function ptr's for toIR.c's dirtyhelper calls. by cerion · 19 years ago
  84. 36d982b Handle ppc64's function ptr's in bb_to_IR::do_self_check. by cerion · 19 years ago
  85. 4e2c2b3 ppc64 fixes: by cerion · 19 years ago
  86. 88a9908 ppc64: handle 32HLto64, 64HLtoV128 by cerion · 19 years ago
  87. aa87c71 ppc64: handle V128to64, V128HIto64. by sewardj · 19 years ago
  88. 33c69e5 x86 counterpart to r1521: For SSE scalar comparison operations where by sewardj · 19 years ago
  89. ab9055b For SSE scalar comparison operations where one operand is in memory, by sewardj · 19 years ago
  90. b029a61 Apparently "sync" has an undocumented relative called "lwsync". Sigh. by sewardj · 19 years ago
  91. cb1f68e Handle dcbz in 64-bit mode. by sewardj · 19 years ago
  92. a9e4a80 Performance improvements for flag handling. by sewardj · 19 years ago
  93. dc12d39 Comment-only fix by sewardj · 19 years ago
  94. 7594920 Comment only changes - misc refs to ppc32 changed to ppc. by cerion · 19 years ago
  95. 4628ccd Put mode64 in ISelEnv, removing global variable. by cerion · 19 years ago
  96. fb197c4 Fix AltiVec load/store on ppc64 - was only considering lo32 bits of address. by cerion · 19 years ago
  97. 347da2c Handle 64HLto128 in 64-bit mode. by sewardj · 19 years ago
  98. d0eae2d renamed VEX dirs guest-ppc32/ -> guest-ppc/, host-ppc32/ -> host-ppc/ by cerion · 19 years ago
  99. a5e5f5f Update comment. by sewardj · 19 years ago
  100. 47bd753 Deal with backend case of 1Sto64 by cerion · 19 years ago